diff --git a/.gitattributes b/.gitattributes index 91863791e07cc..7d1fdfe33e5c2 100644 --- a/.gitattributes +++ b/.gitattributes @@ -12,13 +12,13 @@ *.dxf binary *.mpy binary *.deb binary +*.zip binary +*.pdf binary # These should also not be modified by git. tests/basics/string_cr_conversion.py -text tests/basics/string_crlf_conversion.py -text ports/stm32/pybcdc.inf_template -text -ports/stm32/usbd_* -text -ports/stm32/usbdev/** -text ports/stm32/usbhost/** -text ports/cc3200/hal/aes.c -text ports/cc3200/hal/aes.h -text diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml new file mode 100644 index 0000000000000..ddd41412f4a60 --- /dev/null +++ b/.github/workflows/build.yml @@ -0,0 +1,343 @@ +name: Build CI + +on: + push: + pull_request: + release: + types: [published] + check_suite: + types: [rerequested] + +jobs: + test: + runs-on: ubuntu-16.04 + steps: + - name: Dump GitHub context + env: + GITHUB_CONTEXT: ${{ toJson(github) }} + run: echo "$GITHUB_CONTEXT" + - uses: actions/checkout@v2 + with: + submodules: true + fetch-depth: 0 + - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* + - run: git submodule sync + - run: git submodule foreach git remote -v + - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* + - name: CircuitPython version + run: git describe --dirty --tags + - name: Set up Python 3.8 + uses: actions/setup-python@v1 + with: + python-version: 3.8 + - name: Install deps + run: | + sudo apt-get install -y eatmydata + sudo eatmydata apt-get install -y gettext librsvg2-bin mingw-w64 + pip install requests sh click setuptools cpp-coveralls "Sphinx<4" sphinx-rtd-theme recommonmark sphinxcontrib-svg2pdfconverter polib pyyaml + - name: Versions + run: | + gcc --version + python3 --version + - name: Build mpy-cross + run: make -C mpy-cross -j2 + - name: Build unix port + run: | + make -C ports/unix deplibs -j2 + make -C ports/unix -j2 + make -C ports/unix coverage -j2 + - name: Test all + run: MICROPY_CPYTHON3=python3.8 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -j1 + working-directory: tests + - name: Print failure info + run: | + for exp in *.exp; + do testbase=$(basename $exp .exp); + echo -e "\nFAILURE $testbase"; + diff -u $testbase.exp $testbase.out; + done + working-directory: tests + if: failure() + - name: Native Tests + run: MICROPY_CPYTHON3=python3.8 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -j1 --emit native + working-directory: tests + - name: mpy Tests + run: MICROPY_CPYTHON3=python3.8 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -j1 --via-mpy -d basics float + working-directory: tests + - name: Docs + run: sphinx-build -E -W -b html . _build/html + - name: Translations + run: make check-translate + - name: New boards check + run: python3 -u ci_new_boards_check.py + working-directory: tools + + - name: Build mpy-cross.static-raspbian + run: make -C mpy-cross -j2 -f Makefile.static-raspbian + - uses: actions/upload-artifact@v1.0.0 + with: + name: mpy-cross.static-raspbian + path: mpy-cross/mpy-cross.static-raspbian + + - name: Build mpy-cross.static + run: make -C mpy-cross -j2 -f Makefile.static + - uses: actions/upload-artifact@v1.0.0 + with: + name: mpy-cross.static-amd64-linux + path: mpy-cross/mpy-cross.static + + - name: Build mpy-cross.static-mingw + run: make -C mpy-cross -j2 -f Makefile.static-mingw + - uses: actions/upload-artifact@v1.0.0 + with: + name: mpy-cross.static-x64-windows + path: mpy-cross/mpy-cross.static.exe + + mpy-cross-mac: + runs-on: macos-latest + steps: + - name: Dump GitHub context + env: + GITHUB_CONTEXT: ${{ toJson(github) }} + run: echo "$GITHUB_CONTEXT" + - name: Install deps + run: | + brew link --force gettext + - name: Versions + run: | + gcc --version + python3 --version + msgfmt --version + - uses: actions/checkout@v2 + with: + submodules: true + fetch-depth: 0 + - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* + - run: git submodule sync + - run: git submodule foreach git remote -v + - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* + - name: CircuitPython version + run: git describe --dirty --tags + - name: Build mpy-cross + run: make -C mpy-cross -j2 + - uses: actions/upload-artifact@v1.0.0 + with: + name: mpy-cross-macos-catalina + path: mpy-cross/mpy-cross + + build-arm: + runs-on: ubuntu-16.04 + needs: test + strategy: + fail-fast: false + matrix: + board: + - "8086_commander" + - "TG-Watch02A" + - "aramcon_badge_2019" + - "arduino_mkr1300" + - "arduino_mkrzero" + - "arduino_nano_33_ble" + - "arduino_nano_33_iot" + - "arduino_zero" + - "bast_pro_mini_m0" + - "bdmicro_vina_m0" + - "capablerobot_usbhub" + - "catwan_usbstick" + - "circuitbrains_basic_m0" + - "circuitbrains_deluxe_m4" + - "circuitplayground_bluefruit" + - "circuitplayground_express" + - "circuitplayground_express_crickit" + - "circuitplayground_express_displayio" + - "clue_nrf52840_express" + - "cp32-m4" + - "datalore_ip_m4" + - "datum_distance" + - "datum_imu" + - "datum_light" + - "datum_weather" + - "electronut_labs_blip" + - "electronut_labs_papyr" + - "escornabot_makech" + - "espruino_pico" + - "espruino_wifi" + - "feather_bluefruit_sense" + - "feather_m0_adalogger" + - "feather_m0_basic" + - "feather_m0_express" + - "feather_m0_express_crickit" + - "feather_m0_rfm69" + - "feather_m0_rfm9x" + - "feather_m0_supersized" + - "feather_m4_express" + - "feather_m7_1011" + - "feather_mimxrt1011" + - "feather_mimxrt1062" + - "feather_nrf52840_express" + - "feather_radiofruit_zigbee" + - "feather_stm32f405_express" + - "gemma_m0" + - "grandcentral_m4_express" + - "hallowing_m0_express" + - "hallowing_m4_express" + - "imxrt1010_evk" + - "imxrt1020_evk" + - "imxrt1060_evk" + - "itsybitsy_m0_express" + - "itsybitsy_m4_express" + - "itsybitsy_nrf52840_express" + - "kicksat-sprite" + - "makerdiary_nrf52840_mdk" + - "makerdiary_nrf52840_mdk_usb_dongle" + - "meowbit_v121" + - "meowmeow" + - "metro_m0_express" + - "metro_m4_airlift_lite" + - "metro_m4_express" + - "metro_nrf52840_express" + - "mini_sam_m4" + - "monster_m4sk" + - "ndgarage_ndbit6" + - "nfc_copy_cat" + - "ohs2020_badge" + - "openbook_m4" + - "particle_argon" + - "particle_boron" + - "particle_xenon" + - "pca10056" + - "pca10059" + - "pewpew10" + - "pewpew_m4" + - "pirkey_m0" + - "pyb_nano_v2" + - "pybadge" + - "pybadge_airlift" + - "pyboard_v11" + - "pycubed" + - "pygamer" + - "pygamer_advance" + - "pyportal" + - "pyportal_titano" + - "pyruler" + - "robohatmm1_m4" + - "sam32" + - "seeeduino_xiao" + - "serpente" + - "shirtty" + - "snekboard" + - "sparkfun_lumidrive" + - "sparkfun_nrf52840_mini" + - "sparkfun_qwiic_micro_no_flash" + - "sparkfun_qwiic_micro_with_flash" + - "sparkfun_redboard_turbo" + - "sparkfun_samd21_dev" + - "sparkfun_samd21_mini" + - "sparkfun_samd51_thing_plus" + - "spresense" + - "stm32f411ce_blackpill" + - "stm32f411ve_discovery" + - "stm32f412zg_discovery" + - "stm32f4_discovery" + - "stringcar_m0_express" + - "teensy40" + - "teknikio_bluebird" + - "thunderpack" + - "trellis_m4_express" + - "trinket_m0" + - "trinket_m0_haxpress" + - "uartlogger2" + - "uchip" + - "ugame10" + - "winterbloom_big_honking_button" + - "winterbloom_sol" + - "xinabox_cc03" + - "xinabox_cs11" + + steps: + - name: Set up Python 3.8 + uses: actions/setup-python@v1 + with: + python-version: 3.8 + - name: Install deps + run: | + sudo apt-get install -y gettext + pip install requests sh click setuptools awscli + wget https://adafruit-circuit-python.s3.amazonaws.com/gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 + sudo tar -C /usr --strip-components=1 -xaf gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 + - name: Versions + run: | + gcc --version + arm-none-eabi-gcc --version + python3 --version + - uses: actions/checkout@v2 + with: + submodules: true + fetch-depth: 0 + - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* + - run: git submodule sync + - run: git submodule foreach git remote -v + - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* + - name: mpy-cross + run: make -C mpy-cross -j2 + - name: build + run: python3 -u build_release_files.py + working-directory: tools + env: + BOARDS: ${{ matrix.board }} + - uses: actions/upload-artifact@v1.0.0 + with: + name: ${{ matrix.board }} + path: bin/${{ matrix.board }} + - name: Upload to S3 + run: "[ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp bin/ s3://adafruit-circuit-python/bin/ --recursive --no-progress --region us-east-1" + env: + AWS_ACCESS_KEY_ID: ${{ secrets.AWS_ACCESS_KEY_ID }} + AWS_SECRET_ACCESS_KEY: ${{ secrets.AWS_SECRET_ACCESS_KEY }} + if: github.event_name == 'push' || (github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested')) + + build-riscv: + runs-on: ubuntu-16.04 + needs: test + strategy: + fail-fast: false + matrix: + board: + - "fomu" + + steps: + - name: Set up Python 3.8 + uses: actions/setup-python@v1 + with: + python-version: 3.8 + - name: Install deps + run: | + sudo apt-get install -y gettext + pip install requests sh click setuptools awscli + wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-centos6.tar.gz + sudo tar -C /usr --strip-components=1 -xaf riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-centos6.tar.gz + - name: Versions + run: | + gcc --version + riscv64-unknown-elf-gcc --version + python3 --version + - uses: actions/checkout@v1 + with: + submodules: true + - name: mpy-cross + run: make -C mpy-cross -j2 + - name: build + run: python3 -u build_release_files.py + working-directory: tools + env: + BOARDS: ${{ matrix.board }} + - uses: actions/upload-artifact@v1.0.0 + with: + name: ${{ matrix.board }} + path: bin/${{ matrix.board }} + - name: Upload to S3 + run: "[ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp bin/ s3://adafruit-circuit-python/bin/ --recursive --no-progress --region us-east-1" + env: + AWS_ACCESS_KEY_ID: ${{ secrets.AWS_ACCESS_KEY_ID }} + AWS_SECRET_ACCESS_KEY: ${{ secrets.AWS_SECRET_ACCESS_KEY }} + if: github.event_name == 'push' || (github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested')) diff --git a/.github/workflows/create_website_pr.yml b/.github/workflows/create_website_pr.yml new file mode 100644 index 0000000000000..da4dad17907d2 --- /dev/null +++ b/.github/workflows/create_website_pr.yml @@ -0,0 +1,40 @@ +name: Update CircuitPython.org + +on: + release: + types: [published] + +jobs: + website: + runs-on: ubuntu-latest + steps: + - name: Dump GitHub context + env: + GITHUB_CONTEXT: ${{ toJson(github) }} + run: echo "$GITHUB_CONTEXT" + - name: Set up Python 3.8 + uses: actions/setup-python@v1 + with: + python-version: 3.8 + - name: Install deps + run: | + pip install requests sh click + - name: Versions + run: | + gcc --version + python3 --version + - uses: actions/checkout@v2 + with: + submodules: true + fetch-depth: 0 + - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* + - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* + - name: CircuitPython version + run: git describe --dirty --tags + - name: Website + run: python3 build_board_info.py + working-directory: tools + env: + RELEASE_TAG: ${{ github.event.release.tag_name }} + ADABOT_GITHUB_ACCESS_TOKEN: ${{ secrets.BLINKA_GITHUB_ACCESS_TOKEN }} + if: github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested') diff --git a/.gitignore b/.gitignore index 09ffb164d1bcd..435ed73a7886d 100644 --- a/.gitignore +++ b/.gitignore @@ -7,12 +7,13 @@ *.bin *.map *.hex -!ports/nrf/**/bootloader/*.hex *.dis *.exe # Packages ############ +dist/ +*.egg-info # Logs and Databases ###################### @@ -26,6 +27,7 @@ ###################### build/ bin/ +circuitpython-stubs/ # Test failure outputs ###################### @@ -58,3 +60,16 @@ TAGS ################# *.orig +# Emacs backup files +#################### +*~ + +*.DS_Store +**/*.DS_Store +*.icloud + +# POEdit mo files +#################### +*.mo + +.vscode diff --git a/.gitmodules b/.gitmodules index a7f31837a376c..365d9ff72f97b 100644 --- a/.gitmodules +++ b/.gitmodules @@ -5,12 +5,12 @@ [submodule "lib/libffi"] path = lib/libffi url = https://github.com/atgreen/libffi -[submodule "lib/lwip"] - path = lib/lwip - url = http://git.savannah.gnu.org/r/lwip.git [submodule "lib/berkeley-db-1.xx"] path = lib/berkeley-db-1.xx url = https://github.com/pfalcon/berkeley-db-1.xx +[submodule "lib/uzlib"] + path = lib/uzlib + url = https://github.com/pfalcon/uzlib [submodule "tools/uf2"] path = tools/uf2 url = https://github.com/Microsoft/uf2.git @@ -29,20 +29,93 @@ [submodule "tools/python-semver"] path = tools/python-semver url = https://github.com/k-bx/python-semver.git -[submodule "lib/stm32lib"] - path = lib/stm32lib - url = https://github.com/micropython/stm32lib - branch = work-F4-1.13.1+F7-1.5.0+L4-1.3.0 -[submodule "freetouch2"] - path = ports/atmel-samd/freetouch - url = https://github.com/adafruit/Adafruit_FreeTouch.git [submodule "atmel-samd/asf4"] - path = ports/atmel-samd/asf4 - url = https://github.com/adafruit/asf4.git - branch = circuitpython + path = ports/atmel-samd/asf4 + url = https://github.com/adafruit/asf4.git + branch = circuitpython [submodule "tools/usb_descriptor"] path = tools/usb_descriptor url = https://github.com/adafruit/usb_descriptor.git [submodule "lib/nrfutil"] path = lib/nrfutil url = https://github.com/adafruit/nRF52_nrfutil +[submodule "ports/atmel-samd/freetouch"] + path = ports/atmel-samd/freetouch + url = https://github.com/adafruit/Adafruit_FreeTouch.git +[submodule "frozen/Adafruit_CircuitPython_CircuitPlayground"] + path = frozen/Adafruit_CircuitPython_CircuitPlayground + url = https://github.com/adafruit/Adafruit_CircuitPython_CircuitPlayground.git +[submodule "frozen/Adafruit_CircuitPython_HID"] + path = frozen/Adafruit_CircuitPython_HID + url = https://github.com/adafruit/Adafruit_CircuitPython_HID.git +[submodule "ports/atmel-samd/Adafruit_CircuitPython_Motor"] + path = frozen/Adafruit_CircuitPython_Motor + url = https://github.com/adafruit/Adafruit_CircuitPython_Motor.git +[submodule "ports/atmel-samd/Adafruit_CircuitPython_seesaw"] + path = frozen/Adafruit_CircuitPython_seesaw + url = https://github.com/adafruit/Adafruit_CircuitPython_seesaw.git +[submodule "frozen/Adafruit_CircuitPython_IRRemote"] + path = frozen/Adafruit_CircuitPython_IRRemote + url = https://github.com/adafruit/Adafruit_CircuitPython_IRRemote.git +[submodule "frozen/Adafruit_CircuitPython_DotStar"] + path = frozen/Adafruit_CircuitPython_DotStar + url = https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git +[submodule "ports/atmel-samd/peripherals"] + path = ports/atmel-samd/peripherals + url = https://github.com/adafruit/samd-peripherals.git +[submodule "frozen/Adafruit_CircuitPython_Crickit"] + path = frozen/Adafruit_CircuitPython_Crickit + url = https://github.com/adafruit/Adafruit_CircuitPython_Crickit +[submodule "ports/nrf/nrfx"] + path = ports/nrf/nrfx + url = https://github.com/adafruit/nrfx.git +[submodule "lib/tinyusb"] + path = lib/tinyusb + url = https://github.com/hathach/tinyusb.git + branch = master + fetchRecurseSubmodules = false +[submodule "tools/huffman"] + path = tools/huffman + url = https://github.com/tannewt/huffman.git +[submodule "tools/adabot"] + path = tools/adabot + url = https://github.com/adafruit/adabot.git +[submodule "tools/bitmap_font"] + path = tools/bitmap_font + url = https://github.com/adafruit/Adafruit_CircuitPython_BitmapFont.git +[submodule "tools/Tecate-bitmap-fonts"] + path = tools/Tecate-bitmap-fonts + url = https://github.com/Tecate/bitmap-fonts.git +[submodule "frozen/pew-pewpew-standalone-10.x"] + path = frozen/pew-pewpew-standalone-10.x + url = https://github.com/pewpew-game/pew-pewpew-standalone-10.x.git +[submodule "frozen/circuitpython-stage"] + path = frozen/circuitpython-stage + url = https://github.com/python-ugame/circuitpython-stage.git +[submodule "ports/cxd56/spresense-exported-sdk"] + path = ports/cxd56/spresense-exported-sdk + url = https://github.com/sonydevworld/spresense-exported-sdk.git +[submodule "frozen/Adafruit_CircuitPython_SD"] + path = frozen/Adafruit_CircuitPython_SD + url = https://github.com/adafruit/Adafruit_CircuitPython_SD.git +[submodule "lib/mp3"] + path = lib/mp3 + url = https://github.com/adafruit/Adafruit_MP3 +[submodule "ports/mimxrt10xx/sdk"] + path = ports/mimxrt10xx/sdk + url = https://github.com/adafruit/MIMXRT10xx_SDK +[submodule "frozen/Adafruit_CircuitPython_Register"] + path = frozen/Adafruit_CircuitPython_Register + url = https://github.com/adafruit/Adafruit_CircuitPython_Register.git +[submodule "extmod/ulab"] + path = extmod/ulab + url = https://github.com/v923z/micropython-ulab +[submodule "frozen/Adafruit_CircuitPython_ESP32SPI"] + path = frozen/Adafruit_CircuitPython_ESP32SPI + url = https://github.com/adafruit/Adafruit_CircuitPython_ESP32SPI +[submodule "frozen/Adafruit_CircuitPython_Requests"] + path = frozen/Adafruit_CircuitPython_Requests + url = https://github.com/adafruit/Adafruit_CircuitPython_Requests +[submodule "ports/stm/st_driver"] + path = ports/stm/st_driver + url = https://github.com/hathach/st_driver.git diff --git a/.readthedocs.yml b/.readthedocs.yml index 8b77f690a1bb7..6ff5f2422de28 100644 --- a/.readthedocs.yml +++ b/.readthedocs.yml @@ -1,2 +1,10 @@ +# .readthedocs.yml +# Read the Docs configuration file +# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details + +version: 2 + python: version: 3 + install: + - requirements: docs/requirements.txt diff --git a/.rosie.yml b/.rosie.yml index beb963484931d..3f7f9bb1d7bde 100644 --- a/.rosie.yml +++ b/.rosie.yml @@ -6,7 +6,7 @@ binaries: bucket: adafruit-circuit-python file_pattern: bin/{board}/adafruit-circuitpython-{board}-*-{short_sha}.{extension} rosie_upload: - file_pattern: adafruit-circuitpython-{board}*{short_sha}.{extension} + file_pattern: adafruit-circuitpython-{board}-*{short_sha}.{extension} circuitpython_tests: test_directories: diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index efb4ec35ffb59..0000000000000 --- a/.travis.yml +++ /dev/null @@ -1,111 +0,0 @@ -sudo: required -dist: trusty -language: c -compiler: - - gcc -env: - - TRAVIS_BOARD=arduino_zero - - TRAVIS_BOARD=circuitplayground_express - - TRAVIS_BOARD=feather_m0_basic - - TRAVIS_BOARD=feather_m0_adalogger - - TRAVIS_BOARD=feather_m0_rfm69 - - TRAVIS_BOARD=feather_m0_rfm9x - - TRAVIS_BOARD=feather_m0_express - - TRAVIS_BOARD=feather_m4_express - - TRAVIS_BOARD=itsybitsy_m0_express - - TRAVIS_BOARD=metro_m0_express - - TRAVIS_BOARD=metro_m4_express - - TRAVIS_BOARD=metro_m4_express_revb - - TRAVIS_BOARD=trinket_m0 - - TRAVIS_BOARD=gemma_m0 - - TRAVIS_BOARD=feather52 - - TRAVIS_TEST=qemu - - TRAVIS_TEST=unix - - TRAVIS_TEST=docs - -addons: - artifacts: - paths: - - $(ls -d1 bin/*/* | tr "\n" ":") - target_paths: / - -notifications: - webhooks: - urls: - - https://rosie-ci.ngrok.io/travis - on_success: always - on_failure: always - on_start: always - on_cancel: always - on_error: always - -before_script: - - sudo dpkg --add-architecture i386 - - sudo apt-get install -y python3 gcc-multilib pkg-config libffi-dev libffi-dev:i386 qemu-system - - ([[ -z "$TRAVIS_TEST" ]] || sudo apt-get install -y qemu-system) - - ([[ -z "$TRAVIS_BOARD" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb)) - - ([[ $TRAVIS_TEST != "qemu" ]] || (wget https://s3.amazonaws.com/adafruit-circuit-python/gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb && sudo dpkg -i gcc-arm-embedded*_amd64.deb)) - - # For teensy build - - sudo apt-get install realpath - # For nrf builds - - ([[ $TRAVIS_BOARD != "feather52" ]] || sudo ports/nrf/drivers/bluetooth/download_ble_stack.sh) - # For coverage testing (upgrade is used to get latest urllib3 version) - - ([[ -z "$TRAVIS_TEST" ]] || sudo pip install --upgrade cpp-coveralls) - - ([[ $TRAVIS_TEST != "docs" ]] || sudo pip install Sphinx sphinx-rtd-theme recommonmark) - - gcc --version - - ([[ -z "$TRAVIS_BOARD" ]] || arm-none-eabi-gcc --version) - - python3 --version - -script: - # Build mpy-cross first because other builds depend on it. - - echo 'Building mpy-cross' && echo -en 'travis_fold:start:mpy-cross\\r' - - make -C mpy-cross - - echo -en 'travis_fold:end:mpy-cross\\r' - - - echo 'Building Adafruit binaries' && echo -en 'travis_fold:start:adafruit-bins\\r' - - ([[ -z "$TRAVIS_BOARD" ]] || tools/build_adafruit_bins.sh) - - echo -en 'travis_fold:end:adafruit-bins\\r' - - - echo 'Building unix' && echo -en 'travis_fold:start:unix\\r' - - ([[ $TRAVIS_TEST != "unix" ]] || make -C ports/unix deplibs) - - ([[ $TRAVIS_TEST != "unix" ]] || make -C ports/unix) - - ([[ $TRAVIS_TEST != "unix" ]] || make -C ports/unix coverage) - - echo -en 'travis_fold:end:unix\\r' - - - echo 'Building qemu' && echo -en 'travis_fold:start:qemu\\r' - - ([[ $TRAVIS_TEST != "qemu" ]] || make -C ports/qemu-arm test) - - echo -en 'travis_fold:end:qemu\\r' - - # run tests without coverage info - #- (cd tests && MICROPY_CPYTHON3=python3.4 ./run-tests) - #- (cd tests && MICROPY_CPYTHON3=python3.4 ./run-tests --emit native) - - # run tests with coverage info - - echo 'Test all' && echo -en 'travis_fold:start:test_all\\r' - - ([[ $TRAVIS_TEST != "unix" ]] || (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests)) - - echo -en 'travis_fold:end:test_all\\r' - - - echo 'Test threads' && echo -en 'travis_fold:start:test_threads\\r' - - ([[ $TRAVIS_TEST != "unix" ]] || (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests -d thread)) - - echo -en 'travis_fold:end:test_threads\\r' - - - echo 'Testing with native' && echo -en 'travis_fold:start:test_native\\r' - - ([[ $TRAVIS_TEST != "unix" ]] || (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests --emit native)) - - echo -en 'travis_fold:end:test_native\\r' - - - (echo 'Testing with mpy' && echo -en 'travis_fold:start:test_mpy\\r') - - ([[ $TRAVIS_TEST != "unix" ]] || (cd tests && MICROPY_CPYTHON3=python3.4 MICROPY_MICROPYTHON=../ports/unix/micropython_coverage ./run-tests --via-mpy -d basics float)) - - echo -en 'travis_fold:end:test_mpy\\r' - - - (echo 'Building docs' && echo -en 'travis_fold:start:build_docs\\r') - - ([[ $TRAVIS_TEST != "docs" ]] || sphinx-build -E -W -b html . _build/html) - - echo -en 'travis_fold:end:build_docs\\r' - - - # run coveralls coverage analysis (try to, even if some builds/tests failed) - #- (cd ports/unix && coveralls --root ../.. --build-root . --gcov $(which gcov) --gcov-options '\-o build-coverage/' --include py --include extmod) - -after_failure: - - (cd tests && for exp in *.exp; do testbase=$(basename $exp .exp); echo -e "\nFAILURE $testbase"; diff -u $testbase.exp $testbase.out; done) - - (grep "FAIL" ports/qemu-arm/build/console.out) diff --git a/BUILDING.md b/BUILDING.md new file mode 100644 index 0000000000000..73499d65d5e9e --- /dev/null +++ b/BUILDING.md @@ -0,0 +1,82 @@ + +# Building CircuitPython + +Welcome to CircuitPython! + +This document is a quick-start guide only. + +Detailed guides on how to build CircuitPython can be found in the Adafruit Learn system at +https://learn.adafruit.com/building-circuitpython/ + +## Setup + +Please ensure you setup your build environment appropriately, as per the guide. You will need: + +* Linux: https://learn.adafruit.com/building-circuitpython/linux +* MacOS: https://learn.adafruit.com/building-circuitpython/macos +* Windows Subsystem for Linux (WSL): https://learn.adafruit.com/building-circuitpython/windows-subsystem-for-linux + +### Submodules + +This project has a bunch of git submodules. You will need to update them regularly. + + git submodule sync + git submodule update --init + +### mpy-cross + +As part of the build process, mpy-cross is needed to compile .py files into .mpy files. +To compile (or recompile) mpy-cross: + + make -C mpy-cross + +# Building + +There a number of ports of CircuitPython! To build for your board, change to the appropriate ports directory and build. + +Examples: + + cd ports/atmel-samd + make BOARD=circuitplayground_express + + cd ports/nrf + make BOARD=circuitplayground_bluefruit + +If you aren't sure what boards exist, have a peek in the boards subdirectory of your port. +If you have a fast computer with many cores, consider adding `-j` to your build flags, such as `-j17` on +a 6-core 12-thread machine. + +# Testing + +If you are working on changes to the core language, you might find it useful to run the test suite. +The test suite in the top level `tests` directory. It needs the unix port to run. + + cd ports/unix + make axtls + make micropython + +Then you can run the test suite: + + cd ../../tests + ./run-tests + +A successful run will say something like + + 676 tests performed (19129 individual testcases) + 676 tests passed + 30 tests skipped: buffered_writer builtin_help builtin_range_binop class_delattr_setattr cmd_parsetree extra_coverage framebuf1 framebuf16 framebuf2 framebuf4 framebuf8 framebuf_subclass mpy_invalid namedtuple_asdict non_compliant resource_stream schedule sys_getsizeof urandom_extra ure_groups ure_span ure_sub ure_sub_unmatched vfs_basic vfs_fat_fileio1 vfs_fat_fileio2 vfs_fat_more vfs_fat_oldproto vfs_fat_ramdisk vfs_userfs + +# Debugging + +The easiest way to debug CircuitPython on hardware is with a JLink device, JLinkGDBServer, and an appropriate GDB. +Instructions can be found at https://learn.adafruit.com/debugging-the-samd21-with-gdb + +If using JLink, you'll need both the `JLinkGDBServer` and `arm-none-eabi-gdb` running. + +Example: + + JLinkGDBServer -if SWD -device ATSAMD51J19 + arm-none-eabi-gdb build-metro_m4_express/firmware.elf -iex "target extended-remote :2331" + +If your port/build includes `arm-none-eabi-gdb-py`, consider using it instead, as it can be used for better register +debugging with https://github.com/bnahill/PyCortexMDebug diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 2eb0214da450f..7477df61cfdd0 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -5,12 +5,6 @@ By participating in this project you agree to abide by its terms. Participation covers any forum used to converse about CircuitPython including unofficial and official spaces. Failure to do so will result in corrective actions such as time out or ban from the project. -## Developer contact -[@tannewt](https://github.com/tannewt) is the main developer of CircuitPython -and is sponsored by [Adafruit Industries LLC](https://adafruit.com). He is -reachable on [Discord](https://adafru.it/discord) as tannewt during US West Coast -working hours. He also checks GitHub issues and the [Adafruit support forum](https://forums.adafruit.com/viewforum.php?f=60). - ## Licensing By contributing to this repository you are certifying that you have all necessary permissions to license the code under an MIT License. You still retain the @@ -20,6 +14,31 @@ If you have an employment contract with your employer please make sure that they don't automatically own your work product. Make sure to get any necessary approvals before contributing. Another term for this contribution off-hours is moonlighting. +## Ways to contribute +As CircuitPython grows, there are more and more ways to contribute. Here are some ideas: + +* Build a project with CircuitPython and share how to do it online. +* Test the latest libraries and CircuitPython versions with your projects and file issues for any bugs you find. +* Contribute Python code to CircuitPython libraries that support new devices or features of an existing device. +* Contribute C code to CircuitPython which fixes an open issue or adds a new feature. + +## Getting started with C +CircuitPython developer Dan Halbert (@dhalbert) has written up build instructions using native build +tools [here](https://learn.adafruit.com/building-circuitpython). + +For SAMD21 debugging workflow tips check out [this learn guide](https://learn.adafruit.com/debugging-the-samd21-with-gdb) from Scott (@tannewt). + +## Developer contacts +Scott Shawcroft ([@tannewt](https://github.com/tannewt)) is the lead developer of CircuitPython +and is sponsored by [Adafruit Industries LLC](https://adafruit.com). Scott is usually available +during US West Coast working hours. Dan Halbert ([@dhalbert](https://github.com/dhalbert)) and +Kattni Rembor ([@kattni](https://github.com/kattni)) are also sponsored by [Adafruit Industries + LLC](https://adafruit.com) and are usually available during US East Coast daytime hours including +some weekends. + +They are all reachable on [Discord](https://adafru.it/discord), GitHub issues and the [Adafruit +support forum](https://forums.adafruit.com/viewforum.php?f=60). + ## Code guidelines We aim to keep our code and commit style compatible with MicroPython upstream. Please review their diff --git a/Makefile b/Makefile new file mode 100644 index 0000000000000..5e949cd40feca --- /dev/null +++ b/Makefile @@ -0,0 +1,221 @@ +# Top-level Makefile for documentation builds and miscellaneous tasks. +# + +# You can set these variables from the command line. +PYTHON = python3 +SPHINXOPTS = +SPHINXBUILD = sphinx-build +PAPER = +# path to build the generated docs +BUILDDIR = _build +# path to source files to process +SOURCEDIR = . +# path to conf.py +CONFDIR = . +# Run "make FORCE= ..." to avoid rebuilding from scratch (and risk +# producing incorrect docs). +FORCE = -E +VERBOSE = -v + +# path to generated type stubs +STUBDIR = circuitpython-stubs +# Run "make VALIDATE= stubs" to avoid validating generated stub files +VALIDATE = -v +# path to pypi source distributions +DISTDIR = dist + +# Make sure you have Sphinx installed, then set the SPHINXBUILD environment variable to point to the +# full path of the '$(SPHINXBUILD)' executable. Alternatively you can add the directory with the +# executable to your PATH. If you don't have Sphinx installed, grab it from http://sphinx-doc.org/) + +# Internal variables. +PAPEROPT_a4 = -D latex_paper_size=a4 +PAPEROPT_letter = -D latex_paper_size=letter +BASEOPTS = -c $(CONFDIR) $(PAPEROPT_$(PAPER)) $(FORCE) $(VERBOSE) $(SPHINXOPTS) $(SOURCEDIR) +ALLSPHINXOPTS = -d $(BUILDDIR)/doctrees $(BASEOPTS) +# the i18n builder cannot share the environment and doctrees with the others +I18NSPHINXOPTS = $(BASEOPTS) + +TRANSLATE_SOURCES = extmod lib main.c ports/atmel-samd ports/cxd56 ports/mimxrt10xx ports/nrf ports/stm py shared-bindings shared-module supervisor + +.PHONY: help clean html dirhtml singlehtml pickle json htmlhelp qthelp devhelp epub latex latexpdf text man changes linkcheck doctest gettext stubs + +help: + @echo "Please use \`make ' where is one of" + @echo " html to make standalone HTML files" + @echo " dirhtml to make HTML files named index.html in directories" + @echo " singlehtml to make a single large HTML file" + @echo " pickle to make pickle files" + @echo " json to make JSON files" + @echo " htmlhelp to make HTML files and a HTML help project" + @echo " qthelp to make HTML files and a qthelp project" + @echo " devhelp to make HTML files and a Devhelp project" + @echo " epub to make an epub" + @echo " latex to make LaTeX files, you can set PAPER=a4 or PAPER=letter" + @echo " latexpdf to make LaTeX files and run them through pdflatex" + @echo " latexpdfja to make LaTeX files and run them through platex/dvipdfmx" + @echo " text to make text files" + @echo " man to make manual pages" + @echo " texinfo to make Texinfo files" + @echo " info to make Texinfo files and run them through makeinfo" + @echo " gettext to make PO message catalogs" + @echo " changes to make an overview of all changed/added/deprecated items" + @echo " xml to make Docutils-native XML files" + @echo " pseudoxml to make pseudoxml-XML files for display purposes" + @echo " linkcheck to check all external links for integrity" + @echo " doctest to run all doctests embedded in the documentation (if enabled)" + +clean: + rm -rf $(BUILDDIR)/* + rm -rf $(STUBDIR) $(DISTDIR) *.egg-info + +html: + $(SPHINXBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/html + @echo + @echo "Build finished. The HTML pages are in $(BUILDDIR)/html." + +dirhtml: + $(SPHINXBUILD) -b dirhtml $(ALLSPHINXOPTS) $(BUILDDIR)/dirhtml + @echo + @echo "Build finished. The HTML pages are in $(BUILDDIR)/dirhtml." + +singlehtml: + $(SPHINXBUILD) -b singlehtml $(ALLSPHINXOPTS) $(BUILDDIR)/singlehtml + @echo + @echo "Build finished. The HTML page is in $(BUILDDIR)/singlehtml." + +pickle: + $(SPHINXBUILD) -b pickle $(ALLSPHINXOPTS) $(BUILDDIR)/pickle + @echo + @echo "Build finished; now you can process the pickle files." + +json: + $(SPHINXBUILD) -b json $(ALLSPHINXOPTS) $(BUILDDIR)/json + @echo + @echo "Build finished; now you can process the JSON files." + +htmlhelp: + $(SPHINXBUILD) -b htmlhelp $(ALLSPHINXOPTS) $(BUILDDIR)/htmlhelp + @echo + @echo "Build finished; now you can run HTML Help Workshop with the" \ + ".hhp project file in $(BUILDDIR)/htmlhelp." + +qthelp: + $(SPHINXBUILD) -b qthelp $(ALLSPHINXOPTS) $(BUILDDIR)/qthelp + @echo + @echo "Build finished; now you can run "qcollectiongenerator" with the" \ + ".qhcp project file in $(BUILDDIR)/qthelp, like this:" + @echo "# qcollectiongenerator $(BUILDDIR)/qthelp/MicroPython.qhcp" + @echo "To view the help file:" + @echo "# assistant -collectionFile $(BUILDDIR)/qthelp/MicroPython.qhc" + +devhelp: + $(SPHINXBUILD) -b devhelp $(ALLSPHINXOPTS) $(BUILDDIR)/devhelp + @echo + @echo "Build finished." + @echo "To view the help file:" + @echo "# mkdir -p $$HOME/.local/share/devhelp/MicroPython" + @echo "# ln -s $(BUILDDIR)/devhelp $$HOME/.local/share/devhelp/MicroPython" + @echo "# devhelp" + +epub: + $(SPHINXBUILD) -b epub $(ALLSPHINXOPTS) $(BUILDDIR)/epub + @echo + @echo "Build finished. The epub file is in $(BUILDDIR)/epub." + +latex: + $(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex + @echo + @echo "Build finished; the LaTeX files are in $(BUILDDIR)/latex." + @echo "Run \`make' in that directory to run these through (pdf)latex" \ + "(use \`make latexpdf' here to do that automatically)." + +# seems to be malfunctioning +latexpdf: + $(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex + @echo "Running LaTeX files through pdflatex..." + $(MAKE) -C $(BUILDDIR)/latex all-pdf + @echo "pdflatex finished; the PDF files are in $(BUILDDIR)/latex." + +# seems to be malfunctioning +latexpdfja: + $(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex + @echo "Running LaTeX files through platex and dvipdfmx..." + $(MAKE) -C $(BUILDDIR)/latex all-pdf-ja + @echo "pdflatex finished; the PDF files are in $(BUILDDIR)/latex." + +# seems to be malfunctioning +text: + $(SPHINXBUILD) -b text $(ALLSPHINXOPTS) $(BUILDDIR)/text + @echo + @echo "Build finished. The text files are in $(BUILDDIR)/text." + +# seems to be malfunctioning +man: + $(SPHINXBUILD) -b man $(ALLSPHINXOPTS) $(BUILDDIR)/man + @echo + @echo "Build finished. The manual pages are in $(BUILDDIR)/man." + +texinfo: + $(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/texinfo + @echo + @echo "Build finished. The Texinfo files are in $(BUILDDIR)/texinfo." + @echo "Run \`make' in that directory to run these through makeinfo" \ + "(use \`make info' here to do that automatically)." + +info: + $(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/texinfo + @echo "Running Texinfo files through makeinfo..." + make -C $(BUILDDIR)/texinfo info + @echo "makeinfo finished; the Info files are in $(BUILDDIR)/texinfo." + +gettext: + $(SPHINXBUILD) -b gettext $(I18NSPHINXOPTS) $(BUILDDIR)/locale + @echo + @echo "Build finished. The message catalogs are in $(BUILDDIR)/locale." + +changes: + $(SPHINXBUILD) -b changes $(ALLSPHINXOPTS) $(BUILDDIR)/changes + @echo + @echo "The overview file is in $(BUILDDIR)/changes." + +linkcheck: + $(SPHINXBUILD) -b linkcheck $(ALLSPHINXOPTS) $(BUILDDIR)/linkcheck + @echo + @echo "Link check complete; look for any errors in the above output " \ + "or in $(BUILDDIR)/linkcheck/output.txt." + +doctest: + $(SPHINXBUILD) -b doctest $(ALLSPHINXOPTS) $(BUILDDIR)/doctest + @echo "Testing of doctests in the sources finished, look at the " \ + "results in $(BUILDDIR)/doctest/output.txt." + +xml: + $(SPHINXBUILD) -b xml $(ALLSPHINXOPTS) $(BUILDDIR)/xml + @echo + @echo "Build finished. The XML files are in $(BUILDDIR)/xml." + +pseudoxml: + $(SPHINXBUILD) -b pseudoxml $(ALLSPHINXOPTS) $(BUILDDIR)/pseudoxml + @echo + @echo "Build finished. The pseudo-XML files are in $(BUILDDIR)/pseudoxml." + +# phony target so we always run +all-source: + +locale/circuitpython.pot: all-source + find $(TRANSLATE_SOURCES) -iname "*.c" -print | (LC_ALL=C sort) | xgettext -f- -L C -s --add-location=file --keyword=translate -o circuitpython.pot -p locale + +translate: locale/circuitpython.pot + for po in $(shell ls locale/*.po); do msgmerge -U $$po -s --no-fuzzy-matching --add-location=file locale/circuitpython.pot; done + +check-translate: locale/circuitpython.pot $(wildcard locale/*.po) + $(PYTHON) tools/check_translations.py $^ + +stubs: + rst2pyi $(VALIDATE) shared-bindings/ $(STUBDIR) + python setup.py sdist + +update-frozen-libraries: + @echo "Updating all frozen libraries to latest tagged version." + cd frozen; for library in *; do cd $$library; ../../tools/git-checkout-latest-tag.sh; cd ..; done diff --git a/README.rst b/README.rst index 31c0cce5956b8..51db41a8bc2b9 100644 --- a/README.rst +++ b/README.rst @@ -1,76 +1,55 @@ -Adafruit CircuitPython -====================== - -|Build Status| |Doc Status| |Discord| - -`Status <#status>`__ \| `Supported Boards <#supported-boards>`__ -\| `Download <#download>`__ \| -`Documentation <#documentation>`__ \| -`Contributing <#contributing>`__ \| `Differences from -Micropython <#differences-from-micropython>`__ \| `Project -Structure <#project-structure>`__ - -**CircuitPython** is an *education friendly* open source derivative of -`MicroPython `_. CircuitPython supports use -on educational development boards designed and sold by -`Adafruit `_. Adafruit CircuitPython features -unified Python core APIs and a growing list of Adafruit libraries and -drivers of that work with it. - -Status ------- - -This project is stable. Most APIs should be stable going forward. Those -that change will change on major version numbers such as 2.0.0 and -3.0.0. - -Supported Boards ----------------- - -Designed for CircuitPython -~~~~~~~~~~~~~~~~~~~~~~~~~~ - -- `Adafruit CircuitPlayground - Express `__ -- `Adafruit Feather M0 - Express `__ -- `Adafruit Metro M0 Express `__ -- `Adafruit Gemma M0 `__ - -Other -~~~~~ +CircuitPython +============= + +.. image:: https://s3.amazonaws.com/adafruit-circuit-python/CircuitPython_Repo_header_logo.png + +|Build Status| |Doc Status| |License| |Discord| + +`circuitpython.org `__ \| `Get CircuitPython <#get-circuitpython>`__ \| +`Documentation <#documentation>`__ \| `Contributing <#contributing>`__ \| +`Branding <#branding>`__ \| `Differences from Micropython <#differences-from-micropython>`__ \| +`Project Structure <#project-structure>`__ + +**CircuitPython** is a *beginner friendly*, open source version of Python for tiny, inexpensive +computers called microcontrollers. Microcontrollers are the brains of many electronics including a +wide variety of development boards used to build hobby projects and prototypes. CircuitPython in +electronics is one of the best ways to learn to code because it connects code to reality. Simply +install CircuitPython on a supported board via drag and drop and then edit a ``code.py`` file on +the CIRCUITPY drive. The code will automatically reload. No software installs are needed besides a +text editor (we recommend `Mu `_ for beginners.) + +CircuitPython features unified Python core APIs and a growing list of 150+ device libraries and +drivers that work with it. These libraries also work on single board computers with regular +Python via the `Adafruit Blinka Library `_. + +CircuitPython is based on `MicroPython `_. See +`below <#differences-from-micropython>`_ for differences. CircuitPython development is sponsored by +`Adafruit `_ and is available on their educational development boards. Please +support both MicroPython and Adafruit. + +Get CircuitPython +------------------ -- `Adafruit Feather HUZZAH `__ -- `Adafruit Feather M0 - Basic `__ -- `Adafruit Feather M0 Bluefruit - LE `__ (uses M0 Basic - binaries) -- `Adafruit Feather M0 - Adalogger `__ (MicroSD card - supported using the `Adafruit CircuitPython SD - library `__) -- `Arduino Zero `__ - -Download --------- - -Official binaries are available through the `latest GitHub -releases `__. -Continuous (one per commit) builds are available -`here `__ -and includes experimental hardware support. +Official binaries for all supported boards are available through +`circuitpython.org/downloads `_. The site includes stable, unstable and +continuous builds. Full release notes and assets are available through +`GitHub releases `_ as well. Documentation ------------- Guides and videos are available through the `Adafruit Learning System `__ under the `CircuitPython -category `__ and -`MicroPython -category `__. An API -reference is also available on `Read the -Docs `__. +category `__. An API +reference is also available on `Read the Docs +`__. A collection of awesome +resources can be found at `Awesome CircuitPython `__. + +Specifically useful documentation when starting out: + +- `Welcome to CircuitPython `__ +- `CircuitPython Essentials `__ +- `Example Code `__ Contributing ------------ @@ -84,7 +63,29 @@ Contributors who follow the `Code of Conduct `__ are welcome to submit pull requests and they will be promptly reviewed by project admins. Please join the -`Discord `__ too. +`Discord `__ too. + +Branding +------------ + +While we are happy to see CircuitPython forked and modified, we'd appreciate it if forked releases +not use the name "CircuitPython" or the Blinka logo. "CircuitPython" means something special to +us and those who learn about it. As a result, we'd like to make sure products referring to it meet a +common set of requirements. + +If you'd like to use the term "CircuitPython" and Blinka for your product here is what we ask: + +* Your product is supported by the primary + `"adafruit/circuitpython" `_ repo. This way we can + update any custom code as we update the CircuitPython internals. +* Your product is listed on `circuitpython.org `__ (source + `here `_). This is to ensure that a user of your + product can always download the latest version of CircuitPython from the standard place. +* Your product has a user accessible USB plug which appears as a CIRCUITPY drive when plugged in. + +If you choose not to meet these requirements, then we ask you call your version of CircuitPython +something else (for example, SuperDuperPython) and not use the Blinka logo. You can say it is +"CircuitPython-compatible" if most CircuitPython drivers will work with it. -------------- @@ -93,10 +94,13 @@ Differences from `MicroPython `__ CircuitPython: -- includes a port for Atmel SAMD21 (Commonly known as M0 in Adafruit - product names.) -- supports only Atmel SAMD21 and ESP8266 ports. -- tracks MicroPython's releases (not master). +- Supports native USB on all boards, allowing file editing without special tools. +- Supports only SAMD21, SAMD51, nRF52840, CXD56, STM32F4 and i.MX RT ports. +- Tracks MicroPython's releases (not master). +- Floats (aka decimals) are enabled for all builds. +- Error messages are translated into 10+ languages. +- Does not support concurrency within Python (including interrupts and threading). Some concurrency + is achieved with native modules for tasks that require it such as audio file playback. Behavior ~~~~~~~~ @@ -110,8 +114,8 @@ Behavior output is written to ``boot_out.txt``. - ``code.py`` (or ``main.py``) is run after every reload until it finishes or is interrupted. After it is done running, the vm and - hardware is reinitialized. **This means you cannot read state from - ``code.py`` in the REPL anymore.** CircuitPython's goal for this + hardware is reinitialized. **This means you cannot read state from** + ``code.py`` **in the REPL anymore.** CircuitPython's goal for this change includes reduce confusion about pins and memory being used. - After ``code.py`` the REPL can be entered by pressing any key. It no longer shares state with ``code.py`` so it is a fresh vm. @@ -121,12 +125,23 @@ Behavior causes nasty crashes by making it available through mass storage after the crash. A reset (the button) is needed after its fixed to get back into normal mode. +- RGB status LED indicating CircuitPython state, and errors through a sequence of colored flashes. +- Re-runs ``code.py`` or other main file after file system writes over USB mass storage. (Disable with + ``samd.disable_autoreload()``) +- Entering the REPL after the main code is finished requires a key press which enters the REPL and + disables autoreload. +- Main is one of these: ``code.txt``, ``code.py``, ``main.py``, + ``main.txt`` +- Boot is one of these: ``settings.txt``, ``settings.py``, ``boot.py``, + ``boot.txt`` API ~~~ -- Unified hardware APIs: `audioio `_, `analogio `_, `busio `_, `digitalio `_, `pulseio `_, `touchio `_, `microcontroller `_, `board `_, `bitbangio `_ -- No ``machine`` API on Atmel SAMD21 port. +- Unified hardware APIs. Documented + `on ReadTheDocs `_. +- API docs are rST within the C files in ``shared-bindings``. +- No ``machine`` API. Modules ~~~~~~~ @@ -146,18 +161,6 @@ Modules - tick count is available as `time.monotonic() `__ -atmel-samd21 features -~~~~~~~~~~~~~~~~~~~~~ - -- RGB status LED -- Auto-reload after file write over mass storage. (Disable with - ``samd.disable_autoreload()``) -- Wait state after boot and main run, before REPL. -- Main is one of these: ``code.txt``, ``code.py``, ``main.py``, - ``main.txt`` -- Boot is one of these: ``settings.txt``, ``settings.py``, ``boot.py``, - ``boot.txt`` - -------------- Project Structure @@ -179,7 +182,7 @@ amongst ports including CircuitPython: - ``extmod`` Shared C code used in multiple ports' modules. - ``lib`` Shared core C code including externally developed libraries such as FATFS. -- ``logo`` The MicroPython logo. +- ``logo`` The CircuitPython logo. - ``mpy-cross`` A cross compiler that converts Python files to byte code prior to being run in MicroPython. Useful for reducing library size. @@ -199,44 +202,20 @@ Ports Ports include the code unique to a microcontroller line and also variations based on the board. -- ``atmel-samd`` Support for SAMD21 based boards such as `Arduino - Zero `__, `Adafruit - Feather M0 Basic `__, and - `Adafruit Feather M0 Bluefruit - LE `__. -- ``bare-arm`` A bare minimum version of MicroPython for ARM MCUs. -- ``cc3200`` Support for boards based - `CC3200 `__ from TI such as the - `WiPy 1.0 `__. -- ``esp8266`` Support for boards based on ESP8266 WiFi modules such as - the `Adafruit Feather - HUZZAH `__. -- ``minimal`` A minimal MicroPython port. Start with this if you want - to port MicroPython to another microcontroller. -- ``pic16bit`` Support for 16-bit PIC microcontrollers. -- ``qemu-arm`` Support for ARM emulation through - `QEMU `__. -- ``stmhal`` Support for boards based on STM32 microcontrollers - including the MicroPython flagship - `PyBoard `__. -- ``teensy`` Support for the Teensy line of boards such as the `Teensy - 3.1 `__. -- ``unix`` Support for UNIX. -- ``windows`` Support for - `Windows `__. -- ``zephyr`` Support for `Zephyr `__, a - real-time operating system by the Linux Foundation. - -CircuitPython only maintains the ``atmel-samd`` and ``esp8266`` ports. -The rest are here to maintain compatibility with the -`MicroPython `__ parent -project. - -`⬆ back to top <#adafruit-circuitpython>`__ - -.. |Build Status| image:: https://travis-ci.org/adafruit/circuitpython.svg?branch=master +- ``atmel-samd`` Support for SAMD21 and SAMD51 based boards. +- ``nrf`` Support for the nRF52840 based boards. +- ``unix`` Support for UNIX. Only used for automated testing. + +The remaining port directories not listed above are in the repo to maintain compatibility with the +`MicroPython `__ parent project. + +`back to top <#circuitpython>`__ + +.. |Build Status| image:: https://travis-ci.com/adafruit/circuitpython.svg?branch=master :target: https://travis-ci.org/adafruit/circuitpython .. |Doc Status| image:: https://readthedocs.org/projects/circuitpython/badge/?version=latest :target: http://circuitpython.readthedocs.io/ .. |Discord| image:: https://img.shields.io/discord/327254708534116352.svg - :target: https://discord.gg/nBQh6qu + :target: https://adafru.it/discord +.. |License| image:: https://img.shields.io/badge/License-MIT-brightgreen.svg + :target: https://choosealicense.com/licenses/mit/ diff --git a/conf.py b/conf.py index eb4b1490f75d5..19542ad9f0651 100644 --- a/conf.py +++ b/conf.py @@ -13,10 +13,11 @@ # All configuration values have a default; values that are commented out # serve to show the default. +import json import sys import os -from recommonmark.parser import CommonMarkParser +import recommonmark # If extensions (or modules to document with autodoc) are in another directory, # add these directories to sys.path here. If the directory is relative to the @@ -24,8 +25,20 @@ sys.path.insert(0, os.path.abspath('docs')) sys.path.insert(0, os.path.abspath('.')) +import shared_bindings_matrix + master_doc = 'docs/index' +# Grab the JSON values to use while building the module support matrix +# in 'shared-bindings/index.rst' + +#modules_support_matrix = shared_bindings_matrix.support_matrix_excluded_boards() +modules_support_matrix = shared_bindings_matrix.support_matrix_by_board() + +html_context = { + 'support_matrix': modules_support_matrix +} + # -- General configuration ------------------------------------------------ # If your documentation needs a minimal Sphinx version, state it here. @@ -37,19 +50,25 @@ extensions = [ 'sphinx.ext.autodoc', 'sphinx.ext.doctest', + 'sphinxcontrib.rsvgconverter', 'sphinx.ext.intersphinx', 'sphinx.ext.todo', - 'sphinx.ext.coverage' + 'sphinx.ext.coverage', + 'rstjinja', + 'c2rst', + 'recommonmark', ] # Add any paths that contain templates here, relative to this directory. templates_path = ['templates'] # The suffix of source filenames. -source_suffix = ['.rst', '.md', '.c', '.h'] +source_suffix = { + '.rst': 'restructuredtext', + '.md': 'markdown', + '.c': '' +} -source_parsers = {'.md': CommonMarkParser, - '.c': "c2rst.CStrip", '.h': "c2rst.CStrip"} # The encoding of source files. #source_encoding = 'utf-8-sig' @@ -83,7 +102,9 @@ # List of patterns, relative to source directory, that match files and # directories to ignore when looking for source files. exclude_patterns = ["**/build*", + ".git", ".venv", + ".direnv", "docs/README.md", "drivers", "examples", @@ -101,31 +122,25 @@ "ports/atmel-samd/asf4_conf", "ports/atmel-samd/external_flash", "ports/atmel-samd/freetouch", + "ports/atmel-samd/peripherals", "ports/atmel-samd/QTouch", "ports/atmel-samd/tools", - "ports/bare-arm", - "ports/cc3200", - "ports/cc3200/FreeRTOS", - "ports/cc3200/hal", - "ports/esp8266/boards", - "ports/esp8266/common-hal", - "ports/esp8266/modules", + "ports/cxd56/mkspk", + "ports/cxd56/spresense-exported-sdk", + "ports/litex/hw", "ports/minimal", + "ports/mimxrt10xx/peripherals", + "ports/mimxrt10xx/sdk", "ports/nrf/device", - "ports/nrf/drivers", - "ports/nrf/hal", + "ports/nrf/bluetooth", "ports/nrf/modules", - "ports/pic16bit", - "ports/qemu-arm", - "ports/stm32", - "ports/stm32/hal", - "ports/stm32/cmsis", - "ports/stm32/usbdev", - "ports/stm32/usbhost", - "ports/teensy", + "ports/nrf/nrfx", + "ports/nrf/peripherals", + "ports/nrf/usb", + "ports/stm/st_driver", + "ports/stm/peripherals", + "ports/stm/ref", "ports/unix", - "ports/windows", - "ports/zephyr", "py", "shared-bindings/util.*", "shared-module", @@ -279,7 +294,7 @@ # author, documentclass [howto, manual, or own class]). latex_documents = [ (master_doc, 'CircuitPython.tex', 'CircuitPython Documentation', - 'Damien P. George, Paul Sokolovsky, and contributors', 'manual'), + 'CircuitPython Contributors', 'manual'), ] # The name of an image file (relative to this directory) to place at the top of @@ -309,7 +324,7 @@ # (source start file, name, description, authors, manual section). man_pages = [ ('index', 'CircuitPython', 'CircuitPython Documentation', - ['Damien P. George, Paul Sokolovsky, and contributors'], 1), + ['CircuitPython contributors'], 1), ] # If true, show URL addresses after external links. @@ -323,7 +338,7 @@ # dir menu entry, description, category) texinfo_documents = [ (master_doc, 'CircuitPython', 'CircuitPython Documentation', - 'Damien P. George, Paul Sokolovsky, and contributors', 'CircuitPython', 'One line description of project.', + 'CircuitPython contributors', 'CircuitPython', 'Python for Microcontrollers.', 'Miscellaneous'), ] @@ -344,3 +359,6 @@ intersphinx_mapping = {"cpython": ('https://docs.python.org/3/', None), "bus_device": ('https://circuitpython.readthedocs.io/projects/busdevice/en/latest/', None), "register": ('https://circuitpython.readthedocs.io/projects/register/en/latest/', None)} + +def setup(app): + app.add_css_file("customstyle.css") diff --git a/docs/Makefile b/docs/Makefile deleted file mode 100644 index e9c128e900788..0000000000000 --- a/docs/Makefile +++ /dev/null @@ -1,191 +0,0 @@ -# Makefile for Sphinx documentation -# - -# You can set these variables from the command line. -PYTHON = python3 -SPHINXOPTS = -SPHINXBUILD = sphinx-build -PAPER = -BUILDDIR = build/$(MICROPY_PORT) -CPYDIFFDIR = ../tools -CPYDIFF = gen-cpydiff.py -GENRSTDIR = genrst -# Run "make FORCE= ..." to avoid rebuilding from scratch (and risk -# producing incorrect docs). -FORCE = -E - -# User-friendly check for sphinx-build -ifeq ($(shell which $(SPHINXBUILD) >/dev/null 2>&1; echo $$?), 1) -$(error The '$(SPHINXBUILD)' command was not found. Make sure you have Sphinx installed, then set the SPHINXBUILD environment variable to point to the full path of the '$(SPHINXBUILD)' executable. Alternatively you can add the directory with the executable to your PATH. If you don't have Sphinx installed, grab it from http://sphinx-doc.org/) -endif - -# Internal variables. -PAPEROPT_a4 = -D latex_paper_size=a4 -PAPEROPT_letter = -D latex_paper_size=letter -ALLSPHINXOPTS = -d $(BUILDDIR)/doctrees $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) . -# the i18n builder cannot share the environment and doctrees with the others -I18NSPHINXOPTS = $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) . - -.PHONY: help clean html dirhtml singlehtml pickle json htmlhelp qthelp devhelp epub latex latexpdf text man changes linkcheck doctest gettext - -help: - @echo "Please use \`make ' where is one of" - @echo " html to make standalone HTML files" - @echo " dirhtml to make HTML files named index.html in directories" - @echo " singlehtml to make a single large HTML file" - @echo " pickle to make pickle files" - @echo " json to make JSON files" - @echo " htmlhelp to make HTML files and a HTML help project" - @echo " qthelp to make HTML files and a qthelp project" - @echo " devhelp to make HTML files and a Devhelp project" - @echo " epub to make an epub" - @echo " latex to make LaTeX files, you can set PAPER=a4 or PAPER=letter" - @echo " latexpdf to make LaTeX files and run them through pdflatex" - @echo " latexpdfja to make LaTeX files and run them through platex/dvipdfmx" - @echo " text to make text files" - @echo " man to make manual pages" - @echo " texinfo to make Texinfo files" - @echo " info to make Texinfo files and run them through makeinfo" - @echo " gettext to make PO message catalogs" - @echo " changes to make an overview of all changed/added/deprecated items" - @echo " xml to make Docutils-native XML files" - @echo " pseudoxml to make pseudoxml-XML files for display purposes" - @echo " linkcheck to check all external links for integrity" - @echo " doctest to run all doctests embedded in the documentation (if enabled)" - @echo " cpydiff to generate the MicroPython differences from CPython" - -clean: - rm -rf $(BUILDDIR)/* - rm -f $(GENRSTDIR)/* - -cpydiff: - @echo "Generating MicroPython Differences." - rm -f $(GENRSTDIR)/* - cd $(CPYDIFFDIR) && $(PYTHON) $(CPYDIFF) - -html: cpydiff - $(SPHINXBUILD) $(FORCE) -b html $(ALLSPHINXOPTS) $(BUILDDIR)/html - @echo - @echo "Build finished. The HTML pages are in $(BUILDDIR)/html." - -dirhtml: - $(SPHINXBUILD) -b dirhtml $(ALLSPHINXOPTS) $(BUILDDIR)/dirhtml - @echo - @echo "Build finished. The HTML pages are in $(BUILDDIR)/dirhtml." - -singlehtml: - $(SPHINXBUILD) -b singlehtml $(ALLSPHINXOPTS) $(BUILDDIR)/singlehtml - @echo - @echo "Build finished. The HTML page is in $(BUILDDIR)/singlehtml." - -pickle: - $(SPHINXBUILD) -b pickle $(ALLSPHINXOPTS) $(BUILDDIR)/pickle - @echo - @echo "Build finished; now you can process the pickle files." - -json: - $(SPHINXBUILD) -b json $(ALLSPHINXOPTS) $(BUILDDIR)/json - @echo - @echo "Build finished; now you can process the JSON files." - -htmlhelp: - $(SPHINXBUILD) -b htmlhelp $(ALLSPHINXOPTS) $(BUILDDIR)/htmlhelp - @echo - @echo "Build finished; now you can run HTML Help Workshop with the" \ - ".hhp project file in $(BUILDDIR)/htmlhelp." - -qthelp: - $(SPHINXBUILD) -b qthelp $(ALLSPHINXOPTS) $(BUILDDIR)/qthelp - @echo - @echo "Build finished; now you can run "qcollectiongenerator" with the" \ - ".qhcp project file in $(BUILDDIR)/qthelp, like this:" - @echo "# qcollectiongenerator $(BUILDDIR)/qthelp/MicroPython.qhcp" - @echo "To view the help file:" - @echo "# assistant -collectionFile $(BUILDDIR)/qthelp/MicroPython.qhc" - -devhelp: - $(SPHINXBUILD) -b devhelp $(ALLSPHINXOPTS) $(BUILDDIR)/devhelp - @echo - @echo "Build finished." - @echo "To view the help file:" - @echo "# mkdir -p $$HOME/.local/share/devhelp/MicroPython" - @echo "# ln -s $(BUILDDIR)/devhelp $$HOME/.local/share/devhelp/MicroPython" - @echo "# devhelp" - -epub: - $(SPHINXBUILD) -b epub $(ALLSPHINXOPTS) $(BUILDDIR)/epub - @echo - @echo "Build finished. The epub file is in $(BUILDDIR)/epub." - -latex: cpydiff - $(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex - @echo - @echo "Build finished; the LaTeX files are in $(BUILDDIR)/latex." - @echo "Run \`make' in that directory to run these through (pdf)latex" \ - "(use \`make latexpdf' here to do that automatically)." - -latexpdf: cpydiff - $(SPHINXBUILD) $(FORCE) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex - @echo "Running LaTeX files through pdflatex..." - $(MAKE) -C $(BUILDDIR)/latex all-pdf - @echo "pdflatex finished; the PDF files are in $(BUILDDIR)/latex." - -latexpdfja: cpydiff - $(SPHINXBUILD) -b latex $(ALLSPHINXOPTS) $(BUILDDIR)/latex - @echo "Running LaTeX files through platex and dvipdfmx..." - $(MAKE) -C $(BUILDDIR)/latex all-pdf-ja - @echo "pdflatex finished; the PDF files are in $(BUILDDIR)/latex." - -text: - $(SPHINXBUILD) -b text $(ALLSPHINXOPTS) $(BUILDDIR)/text - @echo - @echo "Build finished. The text files are in $(BUILDDIR)/text." - -man: - $(SPHINXBUILD) -b man $(ALLSPHINXOPTS) $(BUILDDIR)/man - @echo - @echo "Build finished. The manual pages are in $(BUILDDIR)/man." - -texinfo: - $(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/texinfo - @echo - @echo "Build finished. The Texinfo files are in $(BUILDDIR)/texinfo." - @echo "Run \`make' in that directory to run these through makeinfo" \ - "(use \`make info' here to do that automatically)." - -info: - $(SPHINXBUILD) -b texinfo $(ALLSPHINXOPTS) $(BUILDDIR)/texinfo - @echo "Running Texinfo files through makeinfo..." - make -C $(BUILDDIR)/texinfo info - @echo "makeinfo finished; the Info files are in $(BUILDDIR)/texinfo." - -gettext: - $(SPHINXBUILD) -b gettext $(I18NSPHINXOPTS) $(BUILDDIR)/locale - @echo - @echo "Build finished. The message catalogs are in $(BUILDDIR)/locale." - -changes: - $(SPHINXBUILD) -b changes $(ALLSPHINXOPTS) $(BUILDDIR)/changes - @echo - @echo "The overview file is in $(BUILDDIR)/changes." - -linkcheck: - $(SPHINXBUILD) -b linkcheck $(ALLSPHINXOPTS) $(BUILDDIR)/linkcheck - @echo - @echo "Link check complete; look for any errors in the above output " \ - "or in $(BUILDDIR)/linkcheck/output.txt." - -doctest: - $(SPHINXBUILD) -b doctest $(ALLSPHINXOPTS) $(BUILDDIR)/doctest - @echo "Testing of doctests in the sources finished, look at the " \ - "results in $(BUILDDIR)/doctest/output.txt." - -xml: - $(SPHINXBUILD) -b xml $(ALLSPHINXOPTS) $(BUILDDIR)/xml - @echo - @echo "Build finished. The XML files are in $(BUILDDIR)/xml." - -pseudoxml: - $(SPHINXBUILD) -b pseudoxml $(ALLSPHINXOPTS) $(BUILDDIR)/pseudoxml - @echo - @echo "Build finished. The pseudo-XML files are in $(BUILDDIR)/pseudoxml." diff --git a/docs/README.md b/docs/README.md index 15db6aef13d95..b01ae9d491d12 100644 --- a/docs/README.md +++ b/docs/README.md @@ -22,6 +22,27 @@ preferably in a virtualenv: In `circuitpython/`, build the docs: - sphinx-build -v -b html . _build/html + make html You'll find the index page at `_build/html/index.html`. + +### More flexibility + +Running `make` by itself will list out the multiple doc generating commands available. + +All commands will, by default, run with `-E` (forces a rebuild from scratch of docs) and `-v` (verbosity level 1). This can be customized as desired: + + # will turn OFF the force rebuild + make html FORCE= + + # will turn OFF the verbosity + make html VERBOSE= + + # will turn OFF the force rebuild and make it doubly verbose when running + make html FORCE= VERBOSE="-v -v" + +You can also pass other options to sphinx by using `SPHINXOPTS`. + + make html SPHINXOPTS="-T" + +For more flexibility and customization, take a look at the Makefile for all variables you can pass in and overwrite. diff --git a/docs/c2rst.py b/docs/c2rst.py index 9ca8bc1bb387b..76489dca30f94 100644 --- a/docs/c2rst.py +++ b/docs/c2rst.py @@ -1,18 +1,31 @@ -import sphinx.parsers +def c2rst(app, docname, source): + """ Pre-parse '.c' & '.h' files that contain rST source. + """ + # Make sure we're outputting HTML + if app.builder.format != 'html': + return -class CStrip(sphinx.parsers.Parser): - def __init__(self): - self.rst_parser = sphinx.parsers.RSTParser() + fname = app.env.doc2path(docname) + if (not fname.endswith(".c") and + not fname.endswith(".h")): + #print("skipping:", fname) + return - def parse(self, inputstring, document): - # This setting is missing starting with Sphinx 1.7.1 so we set it ourself. - document.settings.tab_width = 4 - stripped = [] - for line in inputstring.split("\n"): - line = line.strip() - if line == "//|": - stripped.append("") - elif line.startswith("//| "): - stripped.append(line[len("//| "):]) - stripped = "\r\n".join(stripped) - self.rst_parser.parse(stripped, document) + src = source[0] + + stripped = [] + for line in src.split("\n"): + line = line.strip() + if line == "//|": + stripped.append("") + elif line.startswith("//| "): + stripped.append(line[len("//| "):]) + stripped = "\r\n".join(stripped) + + rendered = app.builder.templates.render_string( + stripped, app.config.html_context + ) + source[0] = rendered + +def setup(app): + app.connect("source-read", c2rst) diff --git a/docs/design_guide.rst b/docs/design_guide.rst index a1524eaa2b4a8..6f87ecf7986c7 100644 --- a/docs/design_guide.rst +++ b/docs/design_guide.rst @@ -60,6 +60,7 @@ For example, a user can then use ``deinit()```:: import digitalio import board + import time led = digitalio.DigitalInOut(board.D13) led.direction = digitalio.Direction.OUTPUT @@ -79,6 +80,7 @@ Alternatively, using a ``with`` statement ensures that the hardware is deinitial import digitalio import board + import time with digitalio.DigitalInOut(board.D13) as led: led.direction = digitalio.Direction.OUTPUT @@ -441,10 +443,10 @@ buffers. Examples ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -ustruct.pack +struct.pack ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Use `ustruct.pack_into` instead of `ustruct.pack`. +Use `struct.pack_into` instead of `struct.pack`. Sensor properties and units -------------------------------------------------------------------------------- @@ -474,6 +476,8 @@ properties. +-----------------------+-----------------------+-------------------------------------------------------------------------+ | ``distance`` | float | centimeters | +-----------------------+-----------------------+-------------------------------------------------------------------------+ +| ``proximity`` | int | non-unit-specifc proximity values (monotonic but not actual distance) | ++-----------------------+-----------------------+-------------------------------------------------------------------------+ | ``light`` | float | non-unit-specific light levels (should be monotonic but is not lux) | +-----------------------+-----------------------+-------------------------------------------------------------------------+ | ``lux`` | float | SI lux | @@ -500,6 +504,10 @@ properties. +-----------------------+-----------------------+-------------------------------------------------------------------------+ | ``value`` | int | 16-bit Analog value, unit-less | +-----------------------+-----------------------+-------------------------------------------------------------------------+ +| ``weight`` | float | grams (g) | ++-----------------------+-----------------------+-------------------------------------------------------------------------+ +| ``sound_level`` | float | non-unit-specific sound level (monotonic but not actual decibels) | ++-----------------------+-----------------------+-------------------------------------------------------------------------+ Adding native modules -------------------------------------------------------------------------------- diff --git a/docs/drivers.rst b/docs/drivers.rst index 951967e09e542..241415cc1cd27 100644 --- a/docs/drivers.rst +++ b/docs/drivers.rst @@ -1,16 +1,13 @@ -.. _adafruit-libndrivers: - -Additional Adafruit Libraries and Drivers on GitHub -=================================================== +Additional CircuitPython Libraries and Drivers on GitHub +========================================================= These are libraries and drivers available in separate GitHub repos. They are designed for use with CircuitPython and may or may not work with `MicroPython `_. -.. _bundle_installation: -Bundle ------- +Adafruit CircuitPython Library Bundle +-------------------------------------- We provide a bundle of all our libraries to ease installation of drivers and their dependencies. The bundle is primarily geared to the Adafruit Express line @@ -18,201 +15,19 @@ of boards which feature a relatively large external flash. With Express boards, its easy to copy them all onto the filesystem. However, if you don't have enough space simply copy things over as they are needed. -The bundles are available `on GitHub `_. - -To install them: - -#. `Download `_ - and unzip the latest zip that's not a source zip. -#. Copy the ``lib`` folder to the ``CIRCUITPY`` or ``MICROPYTHON``. - -Foundational ------------- - -These libraries provide critical functionality to many of the drivers below. It -is recommended to always have them installed onto the CircuitPython file system in -the ``lib/`` directory. Some drivers may not work without them. - -.. toctree:: - - Register Library - BusDevice Library - -Board-specific Helpers ----------------------- - -These libraries tie lower-level libraries together to provide an easy, out-of-box experience for -specific boards. - -.. toctree:: - - Adafruit CircuitPlayground Express - Adafruit FeatherWings - -Helper Libraries ------------------ - -These libraries build on top of the low level APIs to simplify common tasks. - -.. toctree:: - - USB Human Interface Device (Keyboard and Mouse) - Waveform Generation - OneWire - Ring Tone Text Transfer Language (RTTTL) - InfraRed Remote - Fancy LED (similar to FastLED) - SimpleIO - AVR programming - DC Motor and Servo - SD Card - -Blinky --------- - -Multi-color led drivers. - -.. toctree:: - - NeoPixel - DotStar - WS2801 - -Displays -------------- - -Drivers used to display information. Either pixel or segment based. - -.. toctree:: - - RGB Displays - Character LCD - HT16K33 LED Matrices and Segment Displays - IS31FL3731 Charlieplexed LED Matrix - MAX7219 LED Matrix - SSD1306 OLED Driver - -Real-time clocks ------------------ - -Chips that keep current calendar time with a backup battery. The current date and time is available -through ``datetime``. - -.. toctree:: - - DS1307 Real-time Clock (5V RTC Breakout) - DS3231 Real-time Clock (Precision RTC) - PCF8523 Real-time Clock (Adalogger RTC) - -Motion Sensors ----------------- - -Motion relating sensing including ``acceleration``, ``magnetic``, ``gyro``, and ``orientation``. - -.. toctree:: - - BNO055 Accelerometer, Magnetometer, Gyroscope and Absolution Orientation - FXAS21002C Gyroscope - FXOS8700 Accelerometer - GPS Global Position - LIS3DH Accelerometer - LSM303 Accelerometer and Magnetometer - LSM9DS0 Accelerometer, Magnetometer, Gyroscope and Temperature - LSM9DS1 Accelerometer, Magnetometer, Gyroscope and Temperature - MMA8451 3 axis accelerometer - -Environmental Sensors ----------------------- - -Sense attributes of the environment including ``temperature``, ``relative_humidity``, ``pressure``, -equivalent carbon dioxide (``eco2`` / ``eCO2``), and total volatile organic compounds (``tvoc`` / -``TVOC``). - -.. toctree:: - - AM2320 Temperature and Humidity - BME280 Temperature, Humidity and Pressure - BME680 Temperature, Humidity, Pressure and Gas - BMP280 Barometric Pressure and Altitude - CCS811 Air Quality - DHT Temperature and Humidity - DS18x20 Temperature - MAX31865 Thermocouple Amplifier, Temperature - MAX31855 Thermocouple Amplifier, Temperature - MCP9808 Temperature - MPL3115A2 Barometric Pressure, Altitude and Temperature Sensor - SGP30 Air Quality - SHT31-D Temperature and Humidity - Si7021 Temperature and Humidity - Thermistor Temperature - -Light Sensors ---------------- - -These sensors detect light related attributes such as ``color``, ``light`` (unit-less), and -``lux`` (light in SI lux). - -.. toctree:: - - APDS9960 Proximity, Light, RGB, and Gesture - AS726x Color Spectrum Sensor - TCS34725 Color Sensor - TSL2561 Light Sensor - TSL2591 High Dynamic Range Light Sensor - VCNL4010 Proximity and Light - VEML6070 UV Index - -Distance Sensors ------------------- - -These sensors measure the ``distance`` to another object and may also measure light level (``light`` and ``lux``). - -.. toctree:: - - VL6180x 5 - 100 mm - VL53L0x ~30 - 1000 mm - -Radio --------- - -These chips communicate to other's over radio. - -.. toctree:: - - RFM9x LoRa - RFM69 Packet Radio - -IO Expansion --------------- - -These provide functionality similar to `analogio`, `digitalio`, `pulseio`, and `touchio`. +- The Adafruit bundles are available on GitHub: . -.. toctree:: +- Documentation for the bundle, which includes links to documentation for all + libraries, is available here: . - Adafruit SeeSaw - ADS1x15 Analog-to-Digital Converter - DS2413 OneWire GPIO Expander - FocalTech Capacitive Touch - MCP230xx GPIO Expander - MCP4725 Digital-to-Analog Converter - PCA9685 16 x 12-bit PWM Driver - TLC5947 24 x 12-bit PWM Driver - TLC59711 12 x 16-bit PWM Driver - MPR121 Capacitive Touch Sensor +CircuitPython Community Library Bundle +--------------------------------------- -Miscellaneous ----------------- +This bundle contains non-Adafruit sponsored libraries, that are written and submitted +by members of the community. -.. toctree:: +- The Community bundles are available on GitHub: . - Si4713 Stereo FM Transmitter - AMG88xx Grid-Eye IR Camera - Trellis 4x4 Keypad - DRV2605 Haptic Motor Controller - MAX9744 Audio Amplifier - Si5351 Clock Generator - Thermal Printer - VC0706 TTL Camera - INA219 High Side Current - Fingerprint +- Documentation is not available on ReadTheDocs at this time. See each library for any + included documentation. diff --git a/docs/index.rst b/docs/index.rst index a85772fdc9cb3..6dadddfc1a258 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -43,6 +43,7 @@ Full Table of Contents ../README ../CONTRIBUTING + ../BUILDING ../CODE_OF_CONDUCT ../license.rst diff --git a/docs/library/array.rst b/docs/library/array.rst index dfaef0ff6c7b9..d0121cb3ea0cc 100644 --- a/docs/library/array.rst +++ b/docs/library/array.rst @@ -1,8 +1,6 @@ :mod:`array` -- arrays of numeric data ====================================== -.. include:: ../templates/unsupported_in_circuitpython.inc - .. module:: array :synopsis: efficient arrays of numeric data @@ -23,9 +21,9 @@ Classes .. method:: append(val) - Append new element to the end of array, growing it. + Append new element ``val`` to the end of array, growing it. .. method:: extend(iterable) - Append new elements as contained in an iterable to the end of + Append new elements as contained in `iterable` to the end of array, growing it. diff --git a/docs/library/binascii.rst b/docs/library/binascii.rst new file mode 100644 index 0000000000000..e4878a6faadb7 --- /dev/null +++ b/docs/library/binascii.rst @@ -0,0 +1,40 @@ +:mod:`binascii` -- binary/ASCII conversions +============================================ + +.. module:: binascii + :synopsis: binary/ASCII conversions + +|see_cpython_module| :mod:`cpython:binascii`. + +This module implements conversions between binary data and various +encodings of it in ASCII form (in both directions). + +Functions +--------- + +.. function:: hexlify(data, [sep]) + + Convert binary data to hexadecimal representation. Returns bytes string. + + .. admonition:: Difference to CPython + :class: attention + + If additional argument, *sep* is supplied, it is used as a separator + between hexadecimal values. + +.. function:: unhexlify(data) + + Convert hexadecimal data to binary representation. Returns bytes string. + (i.e. inverse of hexlify) + +.. function:: a2b_base64(data) + + Decode base64-encoded data, ignoring invalid characters in the input. + Conforms to `RFC 2045 s.6.8 `_. + Returns a bytes object. + +.. function:: b2a_base64(data) + + Encode binary data in base64 format, as in `RFC 3548 + `_. Returns the encoded data + followed by a newline character, as a bytes object. diff --git a/docs/library/btree.rst b/docs/library/btree.rst index 303a936ad98c1..4c7b30d5ca78a 100644 --- a/docs/library/btree.rst +++ b/docs/library/btree.rst @@ -7,7 +7,7 @@ :synopsis: simple BTree database The ``btree`` module implements a simple key-value database using external -storage (disk files, or in general case, a random-access stream). Keys are +storage (disk files, or in general case, a random-access ``stream``). Keys are stored sorted in the database, and besides efficient retrieval by a key value, a database also supports efficient ordered range scans (retrieval of values with the keys in a given range). On the application interface diff --git a/docs/library/builtins.rst b/docs/library/builtins.rst index b45b6fe380b8f..6cbf95d53c554 100644 --- a/docs/library/builtins.rst +++ b/docs/library/builtins.rst @@ -1,18 +1,14 @@ Builtin functions and exceptions ================================ -.. warning:: - - These builtins are inherited from MicroPython and may not work in CircuitPython - as documented or at all! If work differently from CPython, then their behavior - may change. - All builtin functions and exceptions are described here. They are also available via ``builtins`` module. Functions and types ------------------- +Not all of these functions and types are turned on in all CircuitPython ports, for space reasons. + .. function:: abs() .. function:: all() @@ -62,6 +58,8 @@ Functions and types .. class:: frozenset() +`frozenset()` is not enabled on non-Express CircuitPython boards. + .. function:: getattr() .. function:: globals() @@ -80,12 +78,12 @@ Functions and types .. classmethod:: from_bytes(bytes, byteorder) - In MicroPython, `byteorder` parameter must be positional (this is + In CircuitPython, ``byteorder`` parameter must be positional (this is compatible with CPython). .. method:: to_bytes(size, byteorder) - In MicroPython, `byteorder` parameter must be positional (this is + In CircuitPython, ``byteorder`` parameter must be positional (this is compatible with CPython). .. function:: isinstance() @@ -130,6 +128,8 @@ Functions and types .. function:: reversed() +`reversed()` is not enabled on non-Express CircuitPython boards. + .. function:: round() .. class:: set() @@ -182,23 +182,27 @@ Exceptions .. exception:: OSError - |see_cpython| `OSError`. MicroPython doesn't implement ``errno`` + |see_cpython| :py:class:`cpython:OSError`. CircuitPython doesn't implement the ``errno`` attribute, instead use the standard way to access exception arguments: ``exc.args[0]``. .. exception:: RuntimeError +.. exception:: ReloadException + + `ReloadException` is used internally to deal with soft restarts. + .. exception:: StopIteration .. exception:: SyntaxError .. exception:: SystemExit - |see_cpython| :py:class:`python:SystemExit`. + |see_cpython| :py:class:`cpython:SystemExit`. .. exception:: TypeError - |see_cpython| :py:class:`python:TypeError`. + |see_cpython| :py:class:`cpython:TypeError`. .. exception:: ValueError diff --git a/docs/library/collections.rst b/docs/library/collections.rst new file mode 100644 index 0000000000000..849e8b69445fe --- /dev/null +++ b/docs/library/collections.rst @@ -0,0 +1,57 @@ +:mod:`collections` -- collection and container types +===================================================== + +.. include:: ../templates/unsupported_in_circuitpython.inc + +.. module:: collections + :synopsis: collection and container types + +|see_cpython_module| :mod:`cpython:collections`. + +This module implements advanced collection and container types to +hold/accumulate various objects. + +Classes +------- + +.. function:: namedtuple(name, fields) + + This is factory function to create a new namedtuple type with a specific + name and set of fields. A namedtuple is a subclass of tuple which allows + to access its fields not just by numeric index, but also with an attribute + access syntax using symbolic field names. Fields is a sequence of strings + specifying field names. For compatibility with CPython it can also be a + a string with space-separated field named (but this is less efficient). + Example of use:: + + from collections import namedtuple + + MyTuple = namedtuple("MyTuple", ("id", "name")) + t1 = MyTuple(1, "foo") + t2 = MyTuple(2, "bar") + print(t1.name) + assert t2.name == t2[1] + +.. function:: OrderedDict(...) + + ``dict`` type subclass which remembers and preserves the order of keys + added. When ordered dict is iterated over, keys/items are returned in + the order they were added:: + + from collections import OrderedDict + + # To make benefit of ordered keys, OrderedDict should be initialized + # from sequence of (key, value) pairs. + d = OrderedDict([("z", 1), ("a", 2)]) + # More items can be added as usual + d["w"] = 5 + d["b"] = 3 + for k, v in d.items(): + print(k, v) + + Output:: + + z 1 + a 2 + w 5 + b 3 diff --git a/docs/library/framebuf.rst b/docs/library/framebuf.rst index 80961b8724be6..3117525dda3ff 100644 --- a/docs/library/framebuf.rst +++ b/docs/library/framebuf.rst @@ -150,6 +150,14 @@ Constants Red Green Blue (16-bit, 5+6+5) color format +.. data:: framebuf.GS2_HMSB + + Grayscale (2-bit) color format + .. data:: framebuf.GS4_HMSB Grayscale (4-bit) color format + +.. data:: framebuf.GS8 + + Grayscale (8-bit) color format diff --git a/docs/library/gc.rst b/docs/library/gc.rst index 01bd925e99631..1a6c3d68c053a 100644 --- a/docs/library/gc.rst +++ b/docs/library/gc.rst @@ -31,7 +31,7 @@ Functions .. admonition:: Difference to CPython :class: attention - This function is MicroPython extension. + This function is a MicroPython extension. .. function:: mem_free() @@ -41,7 +41,7 @@ Functions .. admonition:: Difference to CPython :class: attention - This function is MicroPython extension. + This function is a MicroPython extension. .. function:: threshold([amount]) @@ -63,6 +63,6 @@ Functions .. admonition:: Difference to CPython :class: attention - This function is a MicroPython extension. CPython has a similar + This function is a a MicroPython extension. CPython has a similar function - ``set_threshold()``, but due to different GC implementations, its signature and semantics are different. diff --git a/docs/library/hashlib.rst b/docs/library/hashlib.rst new file mode 100644 index 0000000000000..0205d5e6a8c72 --- /dev/null +++ b/docs/library/hashlib.rst @@ -0,0 +1,59 @@ +:mod:`hashlib` -- hashing algorithms +===================================== + +.. include:: ../templates/unsupported_in_circuitpython.inc + +.. module:: hashlib + :synopsis: hashing algorithms + +|see_cpython_module| :mod:`cpython:hashlib`. + +This module implements binary data hashing algorithms. The exact inventory +of available algorithms depends on a board. Among the algorithms which may +be implemented: + +* SHA256 - The current generation, modern hashing algorithm (of SHA2 series). + It is suitable for cryptographically-secure purposes. Included in the + MicroPython core and any board is recommended to provide this, unless + it has particular code size constraints. + +* SHA1 - A previous generation algorithm. Not recommended for new usages, + but SHA1 is a part of number of Internet standards and existing + applications, so boards targeting network connectivity and + interoperatiability will try to provide this. + +* MD5 - A legacy algorithm, not considered cryptographically secure. Only + selected boards, targeting interoperatibility with legacy applications, + will offer this. + +Constructors +------------ + +.. class:: hashlib.sha256([data]) + + Create an SHA256 hasher object and optionally feed ``data`` into it. + +.. class:: hashlib.sha1([data]) + + Create an SHA1 hasher object and optionally feed ``data`` into it. + +.. class:: hashlib.md5([data]) + + Create an MD5 hasher object and optionally feed ``data`` into it. + +Methods +------- + +.. method:: hash.update(data) + + Feed more binary data into hash. + +.. method:: hash.digest() + + Return hash for all data passed through hash, as a bytes object. After this + method is called, more data cannot be fed into the hash any longer. + +.. method:: hash.hexdigest() + + This method is NOT implemented. Use ``binascii.hexlify(hash.digest())`` + to achieve a similar effect. diff --git a/docs/library/index.rst b/docs/library/index.rst index 647a25c8a5a1e..6c2e576e7de4d 100644 --- a/docs/library/index.rst +++ b/docs/library/index.rst @@ -3,43 +3,74 @@ MicroPython libraries ===================== +Python standard libraries and micro-libraries +--------------------------------------------- + +These libraries are inherited from MicroPython. +They are similar to the standard Python libraries with the same name +or with the "u" prefix dropped. +They implement a subset of or a variant of the corresponding +standard Python library. + .. warning:: - These modules are inherited from MicroPython and may not work in CircuitPython - as documented or at all! If they do work, they may change at any time. + Though these MicroPython-based libraries are available in CircuitPython, + their functionality may change in the future, perhaps significantly. + As CircuitPython continues to develop, new versions of these libraries will + be created that are more compliant with the standard Python libraries. + You may need to change your code later if you rely + on any non-standard functionality they currently provide. +CircuitPython's goal long-term goalis that code written in CircuitPython +using Python standard libraries will be runnable on CPython without changes. -Python standard libraries and micro-libraries ---------------------------------------------- +Some libraries below are not enabled on CircuitPython builds with +limited flash memory, usually on non-Express builds: +``uerrno``, ``ure``. +Some libraries are not currently enabled in any CircuitPython build, but may be in the future: +``uio``, ``ujson``, ``uzlib``. + +Some libraries are only enabled only WiFi-capable ports (ESP8266, nRF) +because they are typically used for network software: +``binascii``, ``hashlib``, ``uheapq``, ``uselect``, ``ussl``. +Not all of these are enabled on all WiFi-capable ports. .. toctree:: :maxdepth: 1 builtins.rst + uheapq.rst array.rst + binascii.rst + collections.rst gc.rst + hashlib.rst sys.rst - ubinascii.rst - ucollections.rst uerrno.rst - uhashlib.rst - uheapq.rst uio.rst ujson.rst ure.rst uselect.rst usocket.rst ussl.rst - ustruct.rst uzlib.rst +Omitted functions in the ``string`` library +------------------------------------------- + +A few string operations are not enabled on CircuitPython +M0 non-Express builds, due to limited flash memory: +``string.center()``, ``string.partition()``, ``string.splitlines()``, +``string.reversed()``. + -MicroPython-specific libraries ------------------------------- +CircuitPython/MicroPython-specific libraries +-------------------------------------------- -Functionality specific to the MicroPython implementation is available in -the following libraries. +Functionality specific to the CircuitPython/MicroPython implementation is available in +the following libraries. These libraries may change signficantly or be removed in future +versions of CircuitPtyon. .. toctree:: :maxdepth: 1 diff --git a/docs/library/micropython.rst b/docs/library/micropython.rst index 59e1886fa2f19..31065fbe55a19 100644 --- a/docs/library/micropython.rst +++ b/docs/library/micropython.rst @@ -35,16 +35,17 @@ Functions compilation of scripts, and returns ``None``. Otherwise it returns the current optimisation level. -.. function:: alloc_emergency_exception_buf(size) + The optimisation level controls the following compilation features: - Allocate *size* bytes of RAM for the emergency exception buffer (a good - size is around 100 bytes). The buffer is used to create exceptions in cases - when normal RAM allocation would fail (eg within an interrupt handler) and - therefore give useful traceback information in these situations. + - Assertions: at level 0 assertion statements are enabled and compiled into the + bytecode; at levels 1 and higher assertions are not compiled. + - Built-in ``__debug__`` variable: at level 0 this variable expands to ``True``; + at levels 1 and higher it expands to ``False``. + - Source-code line numbers: at levels 0, 1 and 2 source-code line number are + stored along with the bytecode so that exceptions can report the line number + they occurred at; at levels 3 and higher line numbers are not stored. - A good way to use this function is to put it at the start of your main script - (eg ``boot.py`` or ``main.py``) and then the emergency exception buffer will be active - for all the code following it. + The default optimisation level is usually level 0. .. function:: mem_info([verbose]) @@ -90,29 +91,3 @@ Functions This function can be used to prevent the capturing of Ctrl-C on the incoming stream of characters that is usually used for the REPL, in case that stream is used for other purposes. - -.. function:: schedule(func, arg) - - Schedule the function *func* to be executed "very soon". The function - is passed the value *arg* as its single argument. "Very soon" means that - the MicroPython runtime will do its best to execute the function at the - earliest possible time, given that it is also trying to be efficient, and - that the following conditions hold: - - - A scheduled function will never preempt another scheduled function. - - Scheduled functions are always executed "between opcodes" which means - that all fundamental Python operations (such as appending to a list) - are guaranteed to be atomic. - - A given port may define "critical regions" within which scheduled - functions will never be executed. Functions may be scheduled within - a critical region but they will not be executed until that region - is exited. An example of a critical region is a preempting interrupt - handler (an IRQ). - - A use for this function is to schedule a callback from a preempting IRQ. - Such an IRQ puts restrictions on the code that runs in the IRQ (for example - the heap may be locked) and scheduling a function to call later will lift - those restrictions. - - There is a finite stack to hold the scheduled functions and `schedule` - will raise a `RuntimeError` if the stack is full. diff --git a/docs/library/network.rst b/docs/library/network.rst index 60c9756dbb7fc..bd32267fe9af8 100644 --- a/docs/library/network.rst +++ b/docs/library/network.rst @@ -5,6 +5,7 @@ .. include:: ../templates/unsupported_in_circuitpython.inc .. module:: network + :noindex: :synopsis: network configuration This module provides network drivers and routing configuration. To use this @@ -202,7 +203,7 @@ Methods (ssid, bssid, channel, RSSI, authmode, hidden) *bssid* is hardware address of an access point, in binary form, returned as - bytes object. You can use `ubinascii.hexlify()` to convert it to ASCII form. + bytes object. You can use `binascii.hexlify()` to convert it to ASCII form. There are five values for authmode: @@ -246,7 +247,7 @@ Methods nic.ifconfig(('192.168.0.4', '255.255.255.0', '192.168.0.1', '8.8.8.8')) .. method:: wlan.config('param') -.. method:: wlan.config(param=value, ...) + wlan.config(param=value, ...) Get or set general network interface parameters. These methods allow to work with additional parameters beyond standard IP configuration (as dealt with by diff --git a/docs/library/sys.rst b/docs/library/sys.rst index de2ec2dcd2232..2aa15531a31ef 100644 --- a/docs/library/sys.rst +++ b/docs/library/sys.rst @@ -45,12 +45,12 @@ Constants .. data:: implementation Object with information about the current Python implementation. For - MicroPython, it has following attributes: + CircuitPython, it has following attributes: - * *name* - string "micropython" + * *name* - string "circuitpython" * *version* - tuple (major, minor, micro), e.g. (1, 7, 0) - This object is the recommended way to distinguish MicroPython from other + This object is the recommended way to distinguish CircuitPython from other Python implementations (note that it still may not exist in the very minimal ports). @@ -58,13 +58,13 @@ Constants :class: attention CPython mandates more attributes for this object, but the actual useful - bare minimum is implemented in MicroPython. + bare minimum is implemented in CircuitPython. .. data:: maxsize Maximum value which a native integer type can hold on the current platform, - or maximum value representable by MicroPython integer type, if it's smaller - than platform max value (that is the case for MicroPython ports without + or maximum value representable by CircuitPython integer type, if it's smaller + than platform max value (that is the case for CircuitPython ports without long int support). This attribute is useful for detecting "bitness" of a platform (32-bit vs @@ -96,24 +96,24 @@ Constants .. data:: platform - The platform that MicroPython is running on. For OS/RTOS ports, this is + The platform that CircuitPython is running on. For OS/RTOS ports, this is usually an identifier of the OS, e.g. ``"linux"``. For baremetal ports it - is an identifier of a board, e.g. ``"pyboard"`` for the original MicroPython - reference board. It thus can be used to distinguish one board from another. - If you need to check whether your program runs on MicroPython (vs other + is an identifier of the chip on a board, e.g. ``"MicroChip SAMD51"``. + It thus can be used to distinguish one board from another. + If you need to check whether your program runs on CircuitPython (vs other Python implementation), use `sys.implementation` instead. .. data:: stderr - Standard error stream. + Standard error ``stream``. .. data:: stdin - Standard input stream. + Standard input ``stream``. .. data:: stdout - Standard output stream. + Standard output ``stream``. .. data:: version diff --git a/docs/library/ubinascii.rst b/docs/library/ubinascii.rst deleted file mode 100644 index edf4a9fdf5750..0000000000000 --- a/docs/library/ubinascii.rst +++ /dev/null @@ -1,42 +0,0 @@ -:mod:`ubinascii` -- binary/ASCII conversions -============================================ - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: ubinascii - :synopsis: binary/ASCII conversions - -|see_cpython_module| :mod:`cpython:binascii`. - -This module implements conversions between binary data and various -encodings of it in ASCII form (in both directions). - -Functions ---------- - -.. function:: hexlify(data, [sep]) - - Convert binary data to hexadecimal representation. Returns bytes string. - - .. admonition:: Difference to CPython - :class: attention - - If additional argument, *sep* is supplied, it is used as a separator - between hexadecimal values. - -.. function:: unhexlify(data) - - Convert hexadecimal data to binary representation. Returns bytes string. - (i.e. inverse of hexlify) - -.. function:: a2b_base64(data) - - Decode base64-encoded data, ignoring invalid characters in the input. - Conforms to `RFC 2045 s.6.8 `_. - Returns a bytes object. - -.. function:: b2a_base64(data) - - Encode binary data in base64 format, as in `RFC 3548 - `_. Returns the encoded data - followed by a newline character, as a bytes object. diff --git a/docs/library/ucollections.rst b/docs/library/ucollections.rst deleted file mode 100644 index 396ba3c87ddad..0000000000000 --- a/docs/library/ucollections.rst +++ /dev/null @@ -1,57 +0,0 @@ -:mod:`ucollections` -- collection and container types -===================================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: ucollections - :synopsis: collection and container types - -|see_cpython_module| :mod:`cpython:collections`. - -This module implements advanced collection and container types to -hold/accumulate various objects. - -Classes -------- - -.. function:: namedtuple(name, fields) - - This is factory function to create a new namedtuple type with a specific - name and set of fields. A namedtuple is a subclass of tuple which allows - to access its fields not just by numeric index, but also with an attribute - access syntax using symbolic field names. Fields is a sequence of strings - specifying field names. For compatibility with CPython it can also be a - a string with space-separated field named (but this is less efficient). - Example of use:: - - from ucollections import namedtuple - - MyTuple = namedtuple("MyTuple", ("id", "name")) - t1 = MyTuple(1, "foo") - t2 = MyTuple(2, "bar") - print(t1.name) - assert t2.name == t2[1] - -.. function:: OrderedDict(...) - - ``dict`` type subclass which remembers and preserves the order of keys - added. When ordered dict is iterated over, keys/items are returned in - the order they were added:: - - from ucollections import OrderedDict - - # To make benefit of ordered keys, OrderedDict should be initialized - # from sequence of (key, value) pairs. - d = OrderedDict([("z", 1), ("a", 2)]) - # More items can be added as usual - d["w"] = 5 - d["b"] = 3 - for k, v in d.items(): - print(k, v) - - Output:: - - z 1 - a 2 - w 5 - b 3 diff --git a/docs/library/uctypes.rst b/docs/library/uctypes.rst index 55de9a0a24a16..f71b00c1e46f7 100644 --- a/docs/library/uctypes.rst +++ b/docs/library/uctypes.rst @@ -10,7 +10,7 @@ This module implements "foreign data interface" for MicroPython. The idea behind it is similar to CPython's ``ctypes`` modules, but the actual API is different, streamlined and optimized for small size. The basic idea of the module is to define data structure layout with about the same power as the -C language allows, and the access it using familiar dot-syntax to reference +C language allows, and then access it using familiar dot-syntax to reference sub-fields. .. seealso:: @@ -31,25 +31,25 @@ Following are encoding examples for various field types: * Scalar types:: - "field_name": uctypes.UINT32 | 0 + "field_name": offset | uctypes.UINT32 in other words, value is scalar type identifier ORed with field offset (in bytes) from the start of the structure. * Recursive structures:: - "sub": (2, { - "b0": uctypes.UINT8 | 0, - "b1": uctypes.UINT8 | 1, + "sub": (offset, { + "b0": 0 | uctypes.UINT8, + "b1": 1 | uctypes.UINT8, }) i.e. value is a 2-tuple, first element of which is offset, and second is a structure descriptor dictionary (note: offsets in recursive descriptors - are relative to a structure it defines). + are relative to the structure it defines). * Arrays of primitive types:: - "arr": (uctypes.ARRAY | 0, uctypes.UINT8 | 2), + "arr": (offset | uctypes.ARRAY, size | uctypes.UINT8), i.e. value is a 2-tuple, first element of which is ARRAY flag ORed with offset, and second is scalar element type ORed number of elements @@ -57,7 +57,7 @@ Following are encoding examples for various field types: * Arrays of aggregate types:: - "arr2": (uctypes.ARRAY | 0, 2, {"b": uctypes.UINT8 | 0}), + "arr2": (offset | uctypes.ARRAY, size, {"b": 0 | uctypes.UINT8}), i.e. value is a 3-tuple, first element of which is ARRAY flag ORed with offset, second is a number of elements in array, and third is @@ -65,21 +65,21 @@ Following are encoding examples for various field types: * Pointer to a primitive type:: - "ptr": (uctypes.PTR | 0, uctypes.UINT8), + "ptr": (offset | uctypes.PTR, uctypes.UINT8), i.e. value is a 2-tuple, first element of which is PTR flag ORed with offset, and second is scalar element type. * Pointer to an aggregate type:: - "ptr2": (uctypes.PTR | 0, {"b": uctypes.UINT8 | 0}), + "ptr2": (offset | uctypes.PTR, {"b": 0 | uctypes.UINT8}), i.e. value is a 2-tuple, first element of which is PTR flag ORed with offset, second is descriptor of type pointed to. * Bitfields:: - "bitf0": uctypes.BFUINT16 | 0 | 0 << uctypes.BF_POS | 8 << uctypes.BF_LEN, + "bitf0": offset | uctypes.BFUINT16 | lsbit << uctypes.BF_POS | bitsize << uctypes.BF_LEN, i.e. value is type of scalar value containing given bitfield (typenames are similar to scalar types, but prefixes with "BF"), ORed with offset for @@ -88,20 +88,21 @@ Following are encoding examples for various field types: BF_POS and BF_LEN positions, respectively. Bitfield position is counted from the least significant bit, and is the number of right-most bit of a field (in other words, it's a number of bits a scalar needs to be shifted - right to extra the bitfield). + right to extract the bitfield). - In the example above, first UINT16 value will be extracted at offset 0 + In the example above, first a UINT16 value will be extracted at offset 0 (this detail may be important when accessing hardware registers, where particular access size and alignment are required), and then bitfield - whose rightmost bit is least-significant bit of this UINT16, and length - is 8 bits, will be extracted - effectively, this will access - least-significant byte of UINT16. + whose rightmost bit is *lsbit* bit of this UINT16, and length + is *bitsize* bits, will be extracted. For example, if *lsbit* is 0 and + *bitsize* is 8, then effectively it will access least-significant byte + of UINT16. Note that bitfield operations are independent of target byte endianness, in particular, example above will access least-significant byte of UINT16 in both little- and big-endian structures. But it depends on the least significant bit being numbered 0. Some targets may use different - numbering in their native ABI, but ``uctypes`` always uses normalized + numbering in their native ABI, but ``uctypes`` always uses the normalized numbering described above. Module contents diff --git a/docs/library/uhashlib.rst b/docs/library/uhashlib.rst deleted file mode 100644 index 0f20413f75ac8..0000000000000 --- a/docs/library/uhashlib.rst +++ /dev/null @@ -1,59 +0,0 @@ -:mod:`uhashlib` -- hashing algorithms -===================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: uhashlib - :synopsis: hashing algorithms - -|see_cpython_module| :mod:`cpython:hashlib`. - -This module implements binary data hashing algorithms. The exact inventory -of available algorithms depends on a board. Among the algorithms which may -be implemented: - -* SHA256 - The current generation, modern hashing algorithm (of SHA2 series). - It is suitable for cryptographically-secure purposes. Included in the - MicroPython core and any board is recommended to provide this, unless - it has particular code size constraints. - -* SHA1 - A previous generation algorithm. Not recommended for new usages, - but SHA1 is a part of number of Internet standards and existing - applications, so boards targeting network connectivity and - interoperatiability will try to provide this. - -* MD5 - A legacy algorithm, not considered cryptographically secure. Only - selected boards, targeting interoperatibility with legacy applications, - will offer this. - -Constructors ------------- - -.. class:: uhashlib.sha256([data]) - - Create an SHA256 hasher object and optionally feed ``data`` into it. - -.. class:: uhashlib.sha1([data]) - - Create an SHA1 hasher object and optionally feed ``data`` into it. - -.. class:: uhashlib.md5([data]) - - Create an MD5 hasher object and optionally feed ``data`` into it. - -Methods -------- - -.. method:: hash.update(data) - - Feed more binary data into hash. - -.. method:: hash.digest() - - Return hash for all data passed through hash, as a bytes object. After this - method is called, more data cannot be fed into the hash any longer. - -.. method:: hash.hexdigest() - - This method is NOT implemented. Use ``ubinascii.hexlify(hash.digest())`` - to achieve a similar effect. diff --git a/docs/library/uio.rst b/docs/library/uio.rst index 5ae8b9ecba422..d1f7c111fa516 100644 --- a/docs/library/uio.rst +++ b/docs/library/uio.rst @@ -8,7 +8,7 @@ |see_cpython_module| :mod:`cpython:io`. -This module contains additional types of stream (file-like) objects +This module contains additional types of ``stream`` (file-like) objects and helper functions. Conceptual hierarchy diff --git a/docs/library/ujson.rst b/docs/library/ujson.rst index 080ee2d036f79..4ed91f053a10f 100644 --- a/docs/library/ujson.rst +++ b/docs/library/ujson.rst @@ -14,11 +14,24 @@ data format. Functions --------- +.. function:: dump(obj, stream) + + Serialise ``obj`` to a JSON string, writing it to the given *stream*. + .. function:: dumps(obj) Return ``obj`` represented as a JSON string. +.. function:: load(stream) + + Parse the given ``stream``, interpreting it as a JSON string and + deserialising the data to a Python object. The resulting object is + returned. + + Parsing continues until end-of-file is encountered. + A :exc:`ValueError` is raised if the data in ``stream`` is not correctly formed. + .. function:: loads(str) - Parse the JSON ``str`` and return an object. Raises ValueError if the + Parse the JSON *str* and return an object. Raises :exc:`ValueError` if the string is not correctly formed. diff --git a/docs/library/ure.rst b/docs/library/ure.rst index c6457de9a85d1..4af182b016879 100644 --- a/docs/library/ure.rst +++ b/docs/library/ure.rst @@ -17,8 +17,9 @@ Supported operators are: ``'.'`` Match any character. -``'[]'`` - Match set of characters. Individual characters and ranges are supported. +``'[...]'`` + Match set of characters. Individual characters and ranges are supported, + including negated sets (e.g. ``[^a-c]``). ``'^'`` @@ -38,18 +39,19 @@ Supported operators are: ``'|'`` -``'()'`` +``'(...)'`` Grouping. Each group is capturing (a substring it captures can be accessed with `match.group()` method). -Counted repetitions (``{m,n}``), more advanced assertions, named groups, -etc. are not supported. +**NOT SUPPORTED**: Counted repetitions (``{m,n}``), more advanced assertions +(``\b``, ``\B``), named groups (``(?P...)``), non-capturing groups +(``(?:...)``), etc. Functions --------- -.. function:: compile(regex_str) +.. function:: compile(regex_str, [flags]) Compile regular expression, return `regex ` object. diff --git a/docs/library/uselect.rst b/docs/library/uselect.rst index 685f5b318b5e8..a2b408b2060ed 100644 --- a/docs/library/uselect.rst +++ b/docs/library/uselect.rst @@ -9,7 +9,7 @@ |see_cpython_module| :mod:`cpython:select`. This module provides functions to efficiently wait for events on multiple -streams (select streams which are ready for operations). +``stream`` objects (select streams which are ready for operations). Functions --------- @@ -35,14 +35,17 @@ Methods .. method:: poll.register(obj[, eventmask]) - Register *obj* for polling. *eventmask* is logical OR of: + Register ``stream`` *obj* for polling. *eventmask* is logical OR of: - * ``select.POLLIN`` - data available for reading - * ``select.POLLOUT`` - more data can be written - * ``select.POLLERR`` - error occurred - * ``select.POLLHUP`` - end of stream/connection termination detected + * ``uselect.POLLIN`` - data available for reading + * ``uselect.POLLOUT`` - more data can be written - *eventmask* defaults to ``select.POLLIN | select.POLLOUT``. + Note that flags like ``uselect.POLLHUP`` and ``uselect.POLLERR`` are + *not* valid as input eventmask (these are unsolicited events which + will be returned from `poll()` regardless of whether they are asked + for). This semantics is per POSIX. + + *eventmask* defaults to ``uselect.POLLIN | uselect.POLLOUT``. .. method:: poll.unregister(obj) @@ -52,16 +55,23 @@ Methods Modify the *eventmask* for *obj*. -.. method:: poll.poll([timeout]) +.. method:: poll.poll(timeout=-1) + + Wait for at least one of the registered objects to become ready or have an + exceptional condition, with optional timeout in milliseconds (if *timeout* + arg is not specified or -1, there is no timeout). - Wait for at least one of the registered objects to become ready. Returns - list of (``obj``, ``event``, ...) tuples, ``event`` element specifies - which events happened with a stream and is a combination of ``select.POLL*`` - constants described above. There may be other elements in tuple, depending - on a platform and version, so don't assume that its size is 2. In case of - timeout, an empty list is returned. + Returns list of (``obj``, ``event``, ...) tuples. There may be other elements in + tuple, depending on a platform and version, so don't assume that its size is 2. + The ``event`` element specifies which events happened with a stream and + is a combination of ``uselect.POLL*`` constants described above. Note that + flags ``uselect.POLLHUP`` and ``uselect.POLLERR`` can be returned at any time + (even if were not asked for), and must be acted on accordingly (the + corresponding stream unregistered from poll and likely closed), because + otherwise all further invocations of `poll()` may return immediately with + these flags set for this stream again. - Timeout is in milliseconds. + In case of timeout, an empty list is returned. .. admonition:: Difference to CPython :class: attention @@ -70,15 +80,15 @@ Methods .. method:: poll.ipoll(timeout=-1, flags=0) - Like :meth:`poll.poll`, but instead returns an iterator which yields + Like :meth:`poll.poll`, but instead returns an iterator which yields a ``callee-owned tuples``. This function provides efficient, allocation-free way to poll on streams. If *flags* is 1, one-shot behavior for events is employed: streams for - which events happened, event mask will be automatically reset (equivalent - to ``poll.modify(obj, 0)``), so new events for such a stream won't be - processed until new mask is set with `poll.modify()`. This behavior is - useful for asynchronous I/O schedulers. + which events happened will have their event masks automatically reset + (equivalent to ``poll.modify(obj, 0)``), so new events for such a stream + won't be processed until new mask is set with `poll.modify()`. This + behavior is useful for asynchronous I/O schedulers. .. admonition:: Difference to CPython :class: attention diff --git a/docs/library/usocket.rst b/docs/library/usocket.rst index b07ba441305d5..2115085a311d5 100644 --- a/docs/library/usocket.rst +++ b/docs/library/usocket.rst @@ -14,7 +14,7 @@ This module provides access to the BSD socket interface. .. admonition:: Difference to CPython :class: attention - For efficiency and consistency, socket objects in MicroPython implement a stream + For efficiency and consistency, socket objects in MicroPython implement a ``stream`` (file-like) interface directly. In CPython, you need to convert a socket to a file-like object using `makefile()` method. This method is still supported by MicroPython (but is a no-op), so where compatibility with CPython matters, @@ -138,16 +138,16 @@ Constants Note that you don't need to specify these in a call to `usocket.socket()`, because `SOCK_STREAM` socket type automatically selects `IPPROTO_TCP`, and `SOCK_DGRAM` - `IPPROTO_UDP`. Thus, the only real use of these constants - is as an argument to `setsockopt()`. + is as an argument to `usocket.socket.setsockopt()`. .. data:: usocket.SOL_* - Socket option levels (an argument to `setsockopt()`). The exact + Socket option levels (an argument to `usocket.socket.setsockopt()`). The exact inventory depends on a ``MicroPython port``. .. data:: usocket.SO_* - Socket options (an argument to `setsockopt()`). The exact + Socket options (an argument to `usocket.socket.setsockopt()`). The exact inventory depends on a ``MicroPython port``. Constants specific to WiPy: @@ -245,7 +245,7 @@ Methods Not every ``MicroPython port`` supports this method. A more portable and generic solution is to use `uselect.poll` object. This allows to wait on multiple objects at the same time (and not just on sockets, but on generic - stream objects which support polling). Example:: + ``stream`` objects which support polling). Example:: # Instead of: s.settimeout(1.0) # time in seconds diff --git a/docs/library/ussl.rst b/docs/library/ussl.rst index 34db3151d65c7..91a64b025fca7 100644 --- a/docs/library/ussl.rst +++ b/docs/library/ussl.rst @@ -17,13 +17,13 @@ Functions .. function:: ussl.wrap_socket(sock, server_side=False, keyfile=None, certfile=None, cert_reqs=CERT_NONE, ca_certs=None) - Takes a stream *sock* (usually usocket.socket instance of ``SOCK_STREAM`` type), + Takes a ``stream`` *sock* (usually usocket.socket instance of ``SOCK_STREAM`` type), and returns an instance of ssl.SSLSocket, which wraps the underlying stream in - an SSL context. Returned object has the usual stream interface methods like + an SSL context. Returned object has the usual ``stream`` interface methods like ``read()``, ``write()``, etc. In MicroPython, the returned object does not expose socket interface and methods like ``recv()``, ``send()``. In particular, a server-side SSL socket should be created from a normal socket returned from - `accept()` on a non-SSL listening server socket. + :meth:`~usocket.socket.accept()` on a non-SSL listening server socket. Depending on the underlying module implementation in a particular ``MicroPython port``, some or all keyword arguments above may be not supported. diff --git a/docs/library/ustruct.rst b/docs/library/ustruct.rst deleted file mode 100644 index c378a94bbe325..0000000000000 --- a/docs/library/ustruct.rst +++ /dev/null @@ -1,44 +0,0 @@ -:mod:`ustruct` -- pack and unpack primitive data types -====================================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: ustruct - :synopsis: pack and unpack primitive data types - -|see_cpython_module| :mod:`cpython:struct`. - -Supported size/byte order prefixes: ``@``, ``<``, ``>``, ``!``. - -Supported format codes: ``b``, ``B``, ``h``, ``H``, ``i``, ``I``, ``l``, -``L``, ``q``, ``Q``, ``s``, ``P``, ``f``, ``d`` (the latter 2 depending -on the floating-point support). - -Functions ---------- - -.. function:: calcsize(fmt) - - Return the number of bytes needed to store the given *fmt*. - -.. function:: pack(fmt, v1, v2, ...) - - Pack the values *v1*, *v2*, ... according to the format string *fmt*. - The return value is a bytes object encoding the values. - -.. function:: pack_into(fmt, buffer, offset, v1, v2, ...) - - Pack the values *v1*, *v2*, ... according to the format string *fmt* - into a *buffer* starting at *offset*. *offset* may be negative to count - from the end of *buffer*. - -.. function:: unpack(fmt, data) - - Unpack from the *data* according to the format string *fmt*. - The return value is a tuple of the unpacked values. - -.. function:: unpack_from(fmt, data, offset=0) - - Unpack from the *data* starting at *offset* according to the format string - *fmt*. *offset* may be negative to count from the end of *buffer*. The return - value is a tuple of the unpacked values. diff --git a/docs/library/uzlib.rst b/docs/library/uzlib.rst index 2a2d9668c4c6a..ba08b535cf28d 100644 --- a/docs/library/uzlib.rst +++ b/docs/library/uzlib.rst @@ -27,7 +27,7 @@ Functions .. class:: DecompIO(stream, wbits=0) - Create a stream wrapper which allows transparent decompression of + Create a ``stream`` wrapper which allows transparent decompression of compressed data in another *stream*. This allows to process compressed streams with data larger than available heap size. In addition to values described in :func:`decompress`, *wbits* may take values diff --git a/docs/requirements.txt b/docs/requirements.txt new file mode 100644 index 0000000000000..9edf6d328d8fe --- /dev/null +++ b/docs/requirements.txt @@ -0,0 +1,3 @@ +sphinx==1.8.5 +recommonmark==0.5.0 +sphinxcontrib-svg2pdfconverter==0.1.0 diff --git a/docs/rstjinja.py b/docs/rstjinja.py new file mode 100644 index 0000000000000..3a08b2599771b --- /dev/null +++ b/docs/rstjinja.py @@ -0,0 +1,24 @@ +# Derived from code on Eric Holscher's blog, found at: +# https://www.ericholscher.com/blog/2016/jul/25/integrating-jinja-rst-sphinx/ + +def rstjinja(app, docname, source): + """ + Render our pages as a jinja template for fancy templating goodness. + """ + # Make sure we're outputting HTML + if app.builder.format != 'html': + return + + # we only want our one jinja template to run through this func + if "shared-bindings/support_matrix" not in docname: + return + + src = source[0] + print(docname) + rendered = app.builder.templates.render_string( + src, app.config.html_context + ) + source[0] = rendered + +def setup(app): + app.connect("source-read", rstjinja) diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py new file mode 100644 index 0000000000000..e327d6ec6add9 --- /dev/null +++ b/docs/shared_bindings_matrix.py @@ -0,0 +1,287 @@ +# The MIT License (MIT) +# +# Copyright (c) 2019 Michael Schroeder +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. +# + +import json +import os +import re + + +SUPPORTED_PORTS = ["atmel-samd", "nrf", "mimxrt10xx"] + + +def parse_port_config(contents, chip_keyword=None): + """ Compile a dictionary of port-wide module configs, which may + be categorized by chipset. + """ + chip_fam = "all" + ifeq_found = False + port_config_results = {"all": []} + + chip_pattern = "" + if chip_keyword: + chip_pattern = ( + re.compile("(?<=ifeq\s\(\$\({}\)\,)(\w+)".format(chip_keyword)) + ) + + for line in contents: + if chip_keyword: + if not ifeq_found: + check_ifeq = chip_pattern.search(line) + if check_ifeq: + ifeq_found = True + chip_fam = check_ifeq.group(1) + #print("found chip:", chip_fam) + else: + ifeq_found = False + chip_fam = "all" + else: + if "endif" in line: + ifeq_found = False + chip_fam = "all" + + if "CIRCUITPY_" in line: + if chip_fam in port_config_results: + port_config_results[chip_fam].append(line.rstrip("\n")) + else: + port_config_results[chip_fam] = [line.rstrip("\n")] + + #print(port_config_results) + return port_config_results + +def get_shared_bindings(): + """ Get a list of modules in shared-bindings based on folder names + """ + return [item for item in os.listdir("./shared-bindings")] + + +def read_mpconfig(): + """ Open 'circuitpy_mpconfig.mk' and return the contents. + """ + configs = [] + with open("py/circuitpy_mpconfig.mk") as mpconfig: + configs = mpconfig.read() + + return configs + + +def build_module_map(): + """ Establish the base of the JSON file, based on the contents from + `configs`. Base will contain module names, if they're part of + the `FULL_BUILD`, or their default value (0, 1, or a list of + modules that determine default [see audiocore, audiomixer, etc.]). + + """ + base = dict() + modules = get_shared_bindings() + configs = read_mpconfig() + full_build = False + for module in modules: + full_name = module + search_name = module.lstrip("_") + re_pattern = "CIRCUITPY_{}\s=\s(.+)".format(search_name.upper()) + find_config = re.findall(re_pattern, configs) + if not find_config: + continue + find_config = ", ".join([x.strip("$()") for x in find_config]) + + full_build = int("CIRCUITPY_FULL_BUILD" in find_config) + if not full_build: + default_val = find_config + else: + default_val = "None" + + base[search_name] = { + "name": full_name, + "full_build": str(full_build), + "default_value": default_val, + "excluded": {} + } + + #print(base) + return base + + +def get_excluded_boards(base): + """ Cycles through each board's `mpconfigboard.mk` file to determine + if each module is included or not. Boards are selected by existence + in a port listed in `SUPPORTED_PORTS` (e.g. `/port/nrf/feather_52840`) + + Boards are further categorized by their respective chipset (SAMD21, + SAMD51, nRF52840, etc.) + """ + modules = list(base.keys()) + + re_board_chip = None + chip_keyword = None + for port in SUPPORTED_PORTS: + # each port appears to use its own define for the chipset + if port in ["atmel-samd"]: + re_board_chip = re.compile("CHIP_FAMILY\s=\s(\w+)") + chip_keyword = "CHIP_FAMILY" + elif port in ["nrf"]: + re_board_chip = re.compile("MCU_VARIANT\s=\s(\w+)") + + port_dir = "ports/{}".format(port) + + port_config_contents = "" + with open(os.path.join(port_dir, "mpconfigport.mk")) as port_config: + port_config_contents = port_config.readlines() + port_config = parse_port_config(port_config_contents, chip_keyword) + + for entry in os.scandir(os.path.join(port_dir, "boards")): + if not entry.is_dir(): + continue + + contents = "" + board_dir = os.path.join(entry.path, "mpconfigboard.mk") + with open(board_dir) as board: + contents = board.read() + + board_chip = re_board_chip.search(contents) + #print(entry.name, board_chip.group(1)) + if not board_chip: + board_chip = "Unknown Chip" + else: + board_chip = board_chip.group(1) + + # add port_config results to contents + contents += "\n" + "\n".join(port_config["all"]) + if board_chip in port_config: + contents += "\n" + "\n".join(port_config[board_chip]) + + check_dependent_modules = dict() + for module in modules: + board_is_excluded = False + # check if board uses `SMALL_BUILD`. if yes, and current + # module is marked as `FULL_BUILD`, board is excluded + small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) + if small_build and base[module]["full_build"] == "1": + board_is_excluded = True + + # check if board uses `MINIMAL_BUILD`. if yes, and current + # module is marked as `DEFAULT_BUILD`, board is excluded + min_build = re.search("CIRCUITPY_MINIMAL_BUILD = 1", contents) + if min_build and base[module]["default_value"] == "CIRCUITPY_DEFAULT_BUILD": + board_is_excluded = True + + # check if module is specifically disabled for this board + re_pattern = r"CIRCUITPY_{}\s=\s(\w)".format(module.upper()) + find_module = re.search(re_pattern, contents) + if not find_module: + if base[module]["default_value"].isdigit(): + # check if default inclusion is off ('0'). if the board doesn't + # have it explicitly enabled, its excluded. + if base[module]["default_value"] == "0": + board_is_excluded = True + else: + # this module is dependent on another module. add it + # to the list to check after processing all other modules. + # only need to check exclusion if it isn't already excluded. + if (not board_is_excluded and + base[module]["default_value"] not in [ + "None", + "CIRCUITPY_DEFAULT_BUILD" + ]): + check_dependent_modules[module] = base[module]["default_value"] + else: + board_is_excluded = find_module.group(1) == "0" + + if board_is_excluded: + if board_chip in base[module]["excluded"]: + base[module]["excluded"][board_chip].append(entry.name) + else: + base[module]["excluded"][board_chip] = [entry.name] + + for module in check_dependent_modules: + depend_results = set() + + parents = check_dependent_modules[module].split("CIRCUITPY_") + parents = [item.strip(", ").lower() for item in parents if item] + + for parent in parents: + if parent in base: + if (board_chip in base[parent]["excluded"] and + entry.name in base[parent]["excluded"][board_chip]): + depend_results.add(False) + else: + depend_results.add(True) + + # only exclude the module if there were zero parents enabled + # as determined by the 'depend_results' set. + if not any(depend_results): + if board_chip in base[module]["excluded"]: + base[module]["excluded"][board_chip].append(entry.name) + else: + base[module]["excluded"][board_chip] = [entry.name] + + #print(json.dumps(base, indent=2)) + return base + + +def support_matrix_excluded_boards(): + """ Compiles a list of available modules, and which board definitions + do not include them. + """ + base = build_module_map() + + return get_excluded_boards(base) + +def support_matrix_by_board(): + """ Compiles a list of the available core modules available for each + board. + """ + base = build_module_map() + base_with_exclusions = get_excluded_boards(base) + + boards = dict() + for port in SUPPORTED_PORTS: + port_dir = "ports/{}/boards".format(port) + for entry in os.scandir(port_dir): + if not entry.is_dir(): + continue + board_modules = [] + + board_name = entry.name + board_contents = "" + with open(os.path.join(entry.path, "mpconfigboard.h")) as get_name: + board_contents = get_name.read() + board_name_re = re.search("(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", + board_contents) + if board_name_re: + board_name = board_name_re.group(1).strip('"') + + for module in base_with_exclusions.keys(): + #print(module) + board_has_module = True + if base_with_exclusions[module]["excluded"]: + for port in base_with_exclusions[module]["excluded"].values(): + #print(port) + if entry.name in port: + board_has_module = False + + if board_has_module: + board_modules.append(base_with_exclusions[module]["name"]) + boards[board_name] = sorted(board_modules) + + #print(json.dumps(boards, indent=2)) + return boards diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 039ddea68bd6a..bd237fb5dad5b 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -8,5 +8,7 @@ and ESP8266. :maxdepth: 2 ../ports/atmel-samd/README - ../ports/esp8266/README + ../ports/mimxrt10xx/README ../ports/nrf/README + ../ports/stm/README + ../ports/cxd56/README diff --git a/docs/templates/unsupported_in_circuitpython.inc b/docs/templates/unsupported_in_circuitpython.inc index 18c9215a84734..582bd9dd0d32f 100644 --- a/docs/templates/unsupported_in_circuitpython.inc +++ b/docs/templates/unsupported_in_circuitpython.inc @@ -1,5 +1,9 @@ .. warning:: - This module is inherited from MicroPython and may not work in CircuitPython - as documented or at all! If they do work, they may change at any time. It is - unsupported. + Though this MicroPython-based library may be available for use + in some builds of CircuitPython, it is unsupported and its functionality + may change in the future, perhaps significantly. + As CircuitPython continues to develop, it may be changed + to comply more closely with the corresponding standard Python library. + You will likely need to change your code later if you rely + on any non-standard functionality it currently provides. diff --git a/drivers/bus/qspi.h b/drivers/bus/qspi.h new file mode 100644 index 0000000000000..31c9d14fca9e3 --- /dev/null +++ b/drivers/bus/qspi.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H +#define MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H + +#include "py/mphal.h" + +enum { + MP_QSPI_IOCTL_INIT, + MP_QSPI_IOCTL_DEINIT, + MP_QSPI_IOCTL_BUS_ACQUIRE, + MP_QSPI_IOCTL_BUS_RELEASE, +}; + +typedef struct _mp_qspi_proto_t { + int (*ioctl)(void *self, uint32_t cmd); + void (*write_cmd_data)(void *self, uint8_t cmd, size_t len, uint32_t data); + void (*write_cmd_addr_data)(void *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src); + uint32_t (*read_cmd)(void *self, uint8_t cmd, size_t len); + void (*read_cmd_qaddr_qdata)(void *self, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest); +} mp_qspi_proto_t; + +typedef struct _mp_soft_qspi_obj_t { + mp_hal_pin_obj_t cs; + mp_hal_pin_obj_t clk; + mp_hal_pin_obj_t io0; + mp_hal_pin_obj_t io1; + mp_hal_pin_obj_t io2; + mp_hal_pin_obj_t io3; +} mp_soft_qspi_obj_t; + +extern const mp_qspi_proto_t mp_soft_qspi_proto; + +#endif // MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H diff --git a/drivers/bus/softqspi.c b/drivers/bus/softqspi.c new file mode 100644 index 0000000000000..10c5992466d82 --- /dev/null +++ b/drivers/bus/softqspi.c @@ -0,0 +1,203 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "drivers/bus/qspi.h" + +#define CS_LOW(self) mp_hal_pin_write(self->cs, 0) +#define CS_HIGH(self) mp_hal_pin_write(self->cs, 1) + +#ifdef MICROPY_HW_SOFTQSPI_SCK_LOW + +// Use externally provided functions for SCK control and IO reading +#define SCK_LOW(self) MICROPY_HW_SOFTQSPI_SCK_LOW(self) +#define SCK_HIGH(self) MICROPY_HW_SOFTQSPI_SCK_HIGH(self) +#define NIBBLE_READ(self) MICROPY_HW_SOFTQSPI_NIBBLE_READ(self) + +#else + +// Use generic pin functions for SCK control and IO reading +#define SCK_LOW(self) mp_hal_pin_write(self->clk, 0) +#define SCK_HIGH(self) mp_hal_pin_write(self->clk, 1) +#define NIBBLE_READ(self) ( \ + mp_hal_pin_read(self->io0) \ + | (mp_hal_pin_read(self->io1) << 1) \ + | (mp_hal_pin_read(self->io2) << 2) \ + | (mp_hal_pin_read(self->io3) << 3)) + +#endif + +STATIC void nibble_write(mp_soft_qspi_obj_t *self, uint8_t v) { + mp_hal_pin_write(self->io0, v & 1); + mp_hal_pin_write(self->io1, (v >> 1) & 1); + mp_hal_pin_write(self->io2, (v >> 2) & 1); + mp_hal_pin_write(self->io3, (v >> 3) & 1); +} + +STATIC int mp_soft_qspi_ioctl(void *self_in, uint32_t cmd) { + mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; + + switch (cmd) { + case MP_QSPI_IOCTL_INIT: + mp_hal_pin_high(self->cs); + mp_hal_pin_output(self->cs); + + // Configure pins + mp_hal_pin_write(self->clk, 0); + mp_hal_pin_output(self->clk); + //mp_hal_pin_write(self->clk, 1); + mp_hal_pin_output(self->io0); + mp_hal_pin_input(self->io1); + mp_hal_pin_write(self->io2, 1); + mp_hal_pin_output(self->io2); + mp_hal_pin_write(self->io3, 1); + mp_hal_pin_output(self->io3); + break; + } + + return 0; // success +} + +STATIC void mp_soft_qspi_transfer(mp_soft_qspi_obj_t *self, size_t len, const uint8_t *src, uint8_t *dest) { + // Will run as fast as possible, limited only by CPU speed and GPIO time + mp_hal_pin_input(self->io1); + mp_hal_pin_output(self->io0); + if (self->io3) { + mp_hal_pin_write(self->io2, 1); + mp_hal_pin_output(self->io2); + mp_hal_pin_write(self->io3, 1); + mp_hal_pin_output(self->io3); + } + if (src) { + for (size_t i = 0; i < len; ++i) { + uint8_t data_out = src[i]; + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + mp_hal_pin_write(self->io0, (data_out >> 7) & 1); + mp_hal_pin_write(self->clk, 1); + data_in = (data_in << 1) | mp_hal_pin_read(self->io1); + mp_hal_pin_write(self->clk, 0); + } + if (dest != NULL) { + dest[i] = data_in; + } + } + } else { + for (size_t i = 0; i < len; ++i) { + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j) { + mp_hal_pin_write(self->clk, 1); + data_in = (data_in << 1) | mp_hal_pin_read(self->io1); + mp_hal_pin_write(self->clk, 0); + } + if (dest != NULL) { + dest[i] = data_in; + } + } + } +} + +STATIC void mp_soft_qspi_qread(mp_soft_qspi_obj_t *self, size_t len, uint8_t *buf) { + // Make all IO lines input + mp_hal_pin_input(self->io2); + mp_hal_pin_input(self->io3); + mp_hal_pin_input(self->io0); + mp_hal_pin_input(self->io1); + + // Will run as fast as possible, limited only by CPU speed and GPIO time + while (len--) { + SCK_HIGH(self); + uint8_t data_in = NIBBLE_READ(self); + SCK_LOW(self); + SCK_HIGH(self); + *buf++ = (data_in << 4) | NIBBLE_READ(self); + SCK_LOW(self); + } +} + +STATIC void mp_soft_qspi_qwrite(mp_soft_qspi_obj_t *self, size_t len, const uint8_t *buf) { + // Make all IO lines output + mp_hal_pin_output(self->io2); + mp_hal_pin_output(self->io3); + mp_hal_pin_output(self->io0); + mp_hal_pin_output(self->io1); + + // Will run as fast as possible, limited only by CPU speed and GPIO time + for (size_t i = 0; i < len; ++i) { + nibble_write(self, buf[i] >> 4); + SCK_HIGH(self); + SCK_LOW(self); + + nibble_write(self, buf[i]); + SCK_HIGH(self); + SCK_LOW(self); + } + + //mp_hal_pin_input(self->io1); +} + +STATIC void mp_soft_qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t data) { + mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; + uint32_t cmd_buf = cmd | data << 8; + CS_LOW(self); + mp_soft_qspi_transfer(self, 1 + len, (uint8_t*)&cmd_buf, NULL); + CS_HIGH(self); +} + +STATIC void mp_soft_qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) { + mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; + uint8_t cmd_buf[4] = {cmd, addr >> 16, addr >> 8, addr}; + CS_LOW(self); + mp_soft_qspi_transfer(self, 4, cmd_buf, NULL); + mp_soft_qspi_transfer(self, len, src, NULL); + CS_HIGH(self); +} + +STATIC uint32_t mp_soft_qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { + mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; + uint32_t cmd_buf = cmd; + CS_LOW(self); + mp_soft_qspi_transfer(self, 1 + len, (uint8_t*)&cmd_buf, (uint8_t*)&cmd_buf); + CS_HIGH(self); + return cmd_buf >> 8; +} + +STATIC void mp_soft_qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) { + mp_soft_qspi_obj_t *self = (mp_soft_qspi_obj_t*)self_in; + uint8_t cmd_buf[7] = {cmd, addr >> 16, addr >> 8, addr}; + CS_LOW(self); + mp_soft_qspi_transfer(self, 1, cmd_buf, NULL); + mp_soft_qspi_qwrite(self, 6, &cmd_buf[1]); // 3 addr bytes, 1 extra byte (0), 2 dummy bytes (4 dummy cycles) + mp_soft_qspi_qread(self, len, dest); + CS_HIGH(self); +} + +const mp_qspi_proto_t mp_soft_qspi_proto = { + .ioctl = mp_soft_qspi_ioctl, + .write_cmd_data = mp_soft_qspi_write_cmd_data, + .write_cmd_addr_data = mp_soft_qspi_write_cmd_addr_data, + .read_cmd = mp_soft_qspi_read_cmd, + .read_cmd_qaddr_qdata = mp_soft_qspi_read_cmd_qaddr_qdata, +}; diff --git a/drivers/bus/softspi.c b/drivers/bus/softspi.c new file mode 100644 index 0000000000000..bc12d89d3b7e6 --- /dev/null +++ b/drivers/bus/softspi.c @@ -0,0 +1,105 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "drivers/bus/spi.h" + +int mp_soft_spi_ioctl(void *self_in, uint32_t cmd) { + mp_soft_spi_obj_t *self = (mp_soft_spi_obj_t*)self_in; + + switch (cmd) { + case MP_SPI_IOCTL_INIT: + mp_hal_pin_write(self->sck, self->polarity); + mp_hal_pin_output(self->sck); + mp_hal_pin_output(self->mosi); + mp_hal_pin_input(self->miso); + break; + + case MP_SPI_IOCTL_DEINIT: + break; + } + + return 0; +} + +void mp_soft_spi_transfer(void *self_in, size_t len, const uint8_t *src, uint8_t *dest) { + mp_soft_spi_obj_t *self = (mp_soft_spi_obj_t*)self_in; + uint32_t delay_half = self->delay_half; + + // only MSB transfer is implemented + + // If a port defines MICROPY_HW_SOFTSPI_MIN_DELAY, and the configured + // delay_half is equal to this value, then the software SPI implementation + // will run as fast as possible, limited only by CPU speed and GPIO time. + #ifdef MICROPY_HW_SOFTSPI_MIN_DELAY + if (delay_half == MICROPY_HW_SOFTSPI_MIN_DELAY) { + for (size_t i = 0; i < len; ++i) { + uint8_t data_out = src[i]; + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + mp_hal_pin_write(self->mosi, (data_out >> 7) & 1); + mp_hal_pin_write(self->sck, 1 - self->polarity); + data_in = (data_in << 1) | mp_hal_pin_read(self->miso); + mp_hal_pin_write(self->sck, self->polarity); + } + if (dest != NULL) { + dest[i] = data_in; + } + } + return; + } + #endif + + for (size_t i = 0; i < len; ++i) { + uint8_t data_out = src[i]; + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + mp_hal_pin_write(self->mosi, (data_out >> 7) & 1); + if (self->phase == 0) { + mp_hal_delay_us_fast(delay_half); + mp_hal_pin_write(self->sck, 1 - self->polarity); + } else { + mp_hal_pin_write(self->sck, 1 - self->polarity); + mp_hal_delay_us_fast(delay_half); + } + data_in = (data_in << 1) | mp_hal_pin_read(self->miso); + if (self->phase == 0) { + mp_hal_delay_us_fast(delay_half); + mp_hal_pin_write(self->sck, self->polarity); + } else { + mp_hal_pin_write(self->sck, self->polarity); + mp_hal_delay_us_fast(delay_half); + } + } + if (dest != NULL) { + dest[i] = data_in; + } + } +} + +const mp_spi_proto_t mp_soft_spi_proto = { + .ioctl = mp_soft_spi_ioctl, + .transfer = mp_soft_spi_transfer, +}; diff --git a/drivers/bus/spi.h b/drivers/bus/spi.h new file mode 100644 index 0000000000000..6d1b9c2f832ef --- /dev/null +++ b/drivers/bus/spi.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_DRIVERS_BUS_SPI_H +#define MICROPY_INCLUDED_DRIVERS_BUS_SPI_H + +#include "py/mphal.h" + +enum { + MP_SPI_IOCTL_INIT, + MP_SPI_IOCTL_DEINIT, +}; + +typedef struct _mp_spi_proto_t { + int (*ioctl)(void *self, uint32_t cmd); + void (*transfer)(void *self, size_t len, const uint8_t *src, uint8_t *dest); +} mp_spi_proto_t; + +typedef struct _mp_soft_spi_obj_t { + uint32_t delay_half; // microsecond delay for half SCK period + uint8_t polarity; + uint8_t phase; + mp_hal_pin_obj_t sck; + mp_hal_pin_obj_t mosi; + mp_hal_pin_obj_t miso; +} mp_soft_spi_obj_t; + +extern const mp_spi_proto_t mp_soft_spi_proto; + +int mp_soft_spi_ioctl(void *self, uint32_t cmd); +void mp_soft_spi_transfer(void *self, size_t len, const uint8_t *src, uint8_t *dest); + +#endif // MICROPY_INCLUDED_DRIVERS_BUS_SPI_H diff --git a/drivers/wiznet5k/README.md b/drivers/wiznet5k/README.md new file mode 100644 index 0000000000000..88f25a2b8dbcb --- /dev/null +++ b/drivers/wiznet5k/README.md @@ -0,0 +1,6 @@ +This is the driver for the WIZnet5x00 series of Ethernet controllers. + +Adapted for MicroPython. + +Original source: https://github.com/Wiznet/W5500_EVB/tree/master/ioLibrary +Taken on: 30 August 2014 diff --git a/drivers/wiznet5k/ethernet/socket.c b/drivers/wiznet5k/ethernet/socket.c new file mode 100644 index 0000000000000..bea98601de72f --- /dev/null +++ b/drivers/wiznet5k/ethernet/socket.c @@ -0,0 +1,718 @@ +//***************************************************************************** +// +//! \file socket.c +//! \brief SOCKET APIs Implements file. +//! \details SOCKET APIs like as Berkeley Socket APIs. +//! \version 1.0.3 +//! \date 2013/10/21 +//! \par Revision history +//! <2018/10/09> Nick Moore fixes for CircuitPython +//! <2014/05/01> V1.0.3. Refer to M20140501 +//! 1. Implicit type casting -> Explicit type casting. +//! 2. replace 0x01 with PACK_REMAINED in recvfrom() +//! 3. Validation a destination ip in connect() & sendto(): +//! It occurs a fatal error on converting unint32 address if uint8* addr parameter is not aligned by 4byte address. +//! Copy 4 byte addr value into temporary uint32 variable and then compares it. +//! <2013/12/20> V1.0.2 Refer to M20131220 +//! Remove Warning. +//! <2013/11/04> V1.0.1 2nd Release. Refer to "20131104". +//! In sendto(), Add to clear timeout interrupt status (Sn_IR_TIMEOUT) +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#include + +#include "py/mpthread.h" +#include "socket.h" + +#define SOCK_ANY_PORT_NUM 0xC000; + +static uint16_t sock_any_port = SOCK_ANY_PORT_NUM; +static uint16_t sock_io_mode = 0; +static uint16_t sock_is_sending = 0; +static uint16_t sock_remained_size[_WIZCHIP_SOCK_NUM_] = {0,0,}; +static uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_] = {0,}; + +#if _WIZCHIP_ == 5200 + static uint16_t sock_next_rd[_WIZCHIP_SOCK_NUM_] ={0,}; +#endif + +#define CHECK_SOCKNUM() \ + do{ \ + if(sn > _WIZCHIP_SOCK_NUM_) return SOCKERR_SOCKNUM; \ + }while(0); \ + +#define CHECK_SOCKMODE(mode) \ + do{ \ + if((getSn_MR(sn) & 0x0F) != mode) return SOCKERR_SOCKMODE; \ + }while(0); \ + +#define CHECK_SOCKINIT() \ + do{ \ + if((getSn_SR(sn) != SOCK_INIT)) return SOCKERR_SOCKINIT; \ + }while(0); \ + +#define CHECK_SOCKDATA() \ + do{ \ + if(len == 0) return SOCKERR_DATALEN; \ + }while(0); \ + +void WIZCHIP_EXPORT(socket_reset)(void) { + sock_any_port = SOCK_ANY_PORT_NUM; + sock_io_mode = 0; + sock_is_sending = 0; + /* + memset(sock_remained_size, 0, _WIZCHIP_SOCK_NUM_ * sizeof(uint16_t)); + memset(sock_pack_info, 0, _WIZCHIP_SOCK_NUM_ * sizeof(uint8_t)); + */ + +#if _WIZCHIP_ == 5200 + memset(sock_next_rd, 0, _WIZCHIP_SOCK_NUM_ * sizeof(uint16_t)); +#endif +} + +int8_t WIZCHIP_EXPORT(socket)(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag) +{ + CHECK_SOCKNUM(); + switch(protocol) + { + case Sn_MR_TCP : + case Sn_MR_UDP : + case Sn_MR_MACRAW : + break; + #if ( _WIZCHIP_ < 5200 ) + case Sn_MR_IPRAW : + case Sn_MR_PPPoE : + break; + #endif + default : + return SOCKERR_SOCKMODE; + } + if((flag & 0x06) != 0) return SOCKERR_SOCKFLAG; +#if _WIZCHIP_ == 5200 + if(flag & 0x10) return SOCKERR_SOCKFLAG; +#endif + + if(flag != 0) + { + switch(protocol) + { + case Sn_MR_TCP: + if((flag & (SF_TCP_NODELAY|SF_IO_NONBLOCK))==0) return SOCKERR_SOCKFLAG; + break; + case Sn_MR_UDP: + if(flag & SF_IGMP_VER2) + { + if((flag & SF_MULTI_ENABLE)==0) return SOCKERR_SOCKFLAG; + } + #if _WIZCHIP_ == 5500 + if(flag & SF_UNI_BLOCK) + { + if((flag & SF_MULTI_ENABLE) == 0) return SOCKERR_SOCKFLAG; + } + #endif + break; + default: + break; + } + } + WIZCHIP_EXPORT(close)(sn); + setSn_MR(sn, (protocol | (flag & 0xF0))); + if(!port) + { + port = sock_any_port++; + if(sock_any_port == 0xFFF0) sock_any_port = SOCK_ANY_PORT_NUM; + } + setSn_PORT(sn,port); + setSn_CR(sn,Sn_CR_OPEN); + while(getSn_CR(sn)); + sock_io_mode |= ((flag & SF_IO_NONBLOCK) << sn); + sock_is_sending &= ~(1< freesize) len = freesize; // check size not to exceed MAX size. + while(1) + { + freesize = getSn_TX_FSR(sn); + tmp = getSn_SR(sn); + if ((tmp != SOCK_ESTABLISHED) && (tmp != SOCK_CLOSE_WAIT)) + { + WIZCHIP_EXPORT(close)(sn); + return SOCKERR_SOCKSTATUS; + } + if( (sock_io_mode & (1< freesize) ) return SOCK_BUSY; + if(len <= freesize) break; + MICROPY_THREAD_YIELD(); + } + wiz_send_data(sn, buf, len); + #if _WIZCHIP_ == 5200 + sock_next_rd[sn] = getSn_TX_RD(sn) + len; + #endif + setSn_CR(sn,Sn_CR_SEND); + /* wait to process the command... */ + while(getSn_CR(sn)); + sock_is_sending |= (1 << sn); + return len; +} + + +int32_t WIZCHIP_EXPORT(recv)(uint8_t sn, uint8_t * buf, uint16_t len) +{ + uint8_t tmp = 0; + uint16_t recvsize = 0; + CHECK_SOCKNUM(); + CHECK_SOCKMODE(Sn_MR_TCP); + CHECK_SOCKDATA(); + + recvsize = getSn_RxMAX(sn); + if(recvsize < len) len = recvsize; + while(1) + { + recvsize = getSn_RX_RSR(sn); + tmp = getSn_SR(sn); + if (tmp != SOCK_ESTABLISHED) + { + if(tmp == SOCK_CLOSE_WAIT) + { + if(recvsize != 0) break; + else if(getSn_TX_FSR(sn) == getSn_TxMAX(sn)) + { + // dpgeorge: Getting here seems to be an orderly shutdown of the + // socket, and trying to get POSIX behaviour we return 0 because: + // "If no messages are available to be received and the peer has per‐ + // formed an orderly shutdown, recv() shall return 0". + // TODO this return value clashes with SOCK_BUSY in non-blocking mode. + WIZCHIP_EXPORT(close)(sn); + return 0; + } + } + else + { + WIZCHIP_EXPORT(close)(sn); + return SOCKERR_SOCKSTATUS; + } + } + if((sock_io_mode & (1< freesize) len = freesize; // check size not to exceed MAX size. + while(1) + { + freesize = getSn_TX_FSR(sn); + if(getSn_SR(sn) == SOCK_CLOSED) return SOCKERR_SOCKCLOSED; + if( (sock_io_mode & (1< freesize) ) return SOCK_BUSY; + if(len <= freesize) break; + MICROPY_THREAD_YIELD(); + }; + wiz_send_data(sn, buf, len); + + #if _WIZCHIP_ == 5200 // for W5200 ARP errata + setSUBR(wizchip_getsubn()); + #endif + + setSn_CR(sn,Sn_CR_SEND); + /* wait to process the command... */ + while(getSn_CR(sn)); + while(1) + { + tmp = getSn_IR(sn); + if(tmp & Sn_IR_SENDOK) + { + setSn_IR(sn, Sn_IR_SENDOK); + break; + } + //M:20131104 + //else if(tmp & Sn_IR_TIMEOUT) return SOCKERR_TIMEOUT; + else if(tmp & Sn_IR_TIMEOUT) + { + setSn_IR(sn, Sn_IR_TIMEOUT); + #if _WIZCHIP_ == 5200 // for W5200 ARP errata + setSUBR((uint8_t*)"\x00\x00\x00\x00"); + #endif + return SOCKERR_TIMEOUT; + } + //////////// + MICROPY_THREAD_YIELD(); + } + #if _WIZCHIP_ == 5200 // for W5200 ARP errata + setSUBR((uint8_t*)"\x00\x00\x00\x00"); + #endif + return len; +} + + + +int32_t WIZCHIP_EXPORT(recvfrom)(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port) +{ + uint8_t mr; + uint8_t head[8]; + uint16_t pack_len=0; + + CHECK_SOCKNUM(); + //CHECK_SOCKMODE(Sn_MR_UDP); + switch((mr=getSn_MR(sn)) & 0x0F) + { + case Sn_MR_UDP: + case Sn_MR_MACRAW: + break; + #if ( _WIZCHIP_ < 5200 ) + case Sn_MR_IPRAW: + case Sn_MR_PPPoE: + break; + #endif + default: + return SOCKERR_SOCKMODE; + } + CHECK_SOCKDATA(); + if(sock_remained_size[sn] == 0) + { + while(1) + { + pack_len = getSn_RX_RSR(sn); + if(getSn_SR(sn) == SOCK_CLOSED) return SOCKERR_SOCKCLOSED; + if( (sock_io_mode & (1< 1514) + { + WIZCHIP_EXPORT(close)(sn); + return SOCKFATAL_PACKLEN; + } + sock_pack_info[sn] = PACK_FIRST; + } + if(len < sock_remained_size[sn]) pack_len = len; + else pack_len = sock_remained_size[sn]; + wiz_recv_data(sn,buf,pack_len); + break; + #if ( _WIZCHIP_ < 5200 ) + case Sn_MR_IPRAW: + if(sock_remained_size[sn] == 0) + { + wiz_recv_data(sn, head, 6); + setSn_CR(sn,Sn_CR_RECV); + while(getSn_CR(sn)); + addr[0] = head[0]; + addr[1] = head[1]; + addr[2] = head[2]; + addr[3] = head[3]; + sock_remained_size[sn] = head[4]; + sock_remaiend_size[sn] = (sock_remained_size[sn] << 8) + head[5]; + sock_pack_info[sn] = PACK_FIRST; + } + // + // Need to packet length check + // + if(len < sock_remained_size[sn]) pack_len = len; + else pack_len = sock_remained_size[sn]; + wiz_recv_data(sn, buf, pack_len); // data copy. + break; + #endif + default: + wiz_recv_ignore(sn, pack_len); // data copy. + sock_remained_size[sn] = pack_len; + break; + } + setSn_CR(sn,Sn_CR_RECV); + /* wait to process the command... */ + while(getSn_CR(sn)) ; + sock_remained_size[sn] -= pack_len; + //M20140501 : replace 0x01 with PACK_REMAINED + //if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= 0x01; + if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= PACK_REMAINED; + // + return pack_len; +} + + +int8_t WIZCHIP_EXPORT(ctlsocket)(uint8_t sn, ctlsock_type cstype, void* arg) +{ + uint8_t tmp = 0; + CHECK_SOCKNUM(); + switch(cstype) + { + case CS_SET_IOMODE: + tmp = *((uint8_t*)arg); + if(tmp == SOCK_IO_NONBLOCK) sock_io_mode |= (1< explict type casting + //*((uint8_t*)arg) = (sock_io_mode >> sn) & 0x0001; + *((uint8_t*)arg) = (uint8_t)((sock_io_mode >> sn) & 0x0001); + // + break; + case CS_GET_MAXTXBUF: + *((uint16_t*)arg) = getSn_TxMAX(sn); + break; + case CS_GET_MAXRXBUF: + *((uint16_t*)arg) = getSn_RxMAX(sn); + break; + case CS_CLR_INTERRUPT: + if( (*(uint8_t*)arg) > SIK_ALL) return SOCKERR_ARG; + setSn_IR(sn,*(uint8_t*)arg); + break; + case CS_GET_INTERRUPT: + *((uint8_t*)arg) = getSn_IR(sn); + break; + case CS_SET_INTMASK: + if( (*(uint8_t*)arg) > SIK_ALL) return SOCKERR_ARG; + setSn_IMR(sn,*(uint8_t*)arg); + break; + case CS_GET_INTMASK: + *((uint8_t*)arg) = getSn_IMR(sn); + default: + return SOCKERR_ARG; + } + return SOCK_OK; +} + +int8_t WIZCHIP_EXPORT(setsockopt)(uint8_t sn, sockopt_type sotype, void* arg) +{ + // M20131220 : Remove warning + //uint8_t tmp; + CHECK_SOCKNUM(); + switch(sotype) + { + case SO_TTL: + setSn_TTL(sn,*(uint8_t*)arg); + break; + case SO_TOS: + setSn_TOS(sn,*(uint8_t*)arg); + break; + case SO_MSS: + setSn_MSSR(sn,*(uint16_t*)arg); + break; + case SO_DESTIP: + setSn_DIPR(sn, (uint8_t*)arg); + break; + case SO_DESTPORT: + setSn_DPORT(sn, *(uint16_t*)arg); + break; +#if _WIZCHIP_ != 5100 + case SO_KEEPALIVESEND: + CHECK_SOCKMODE(Sn_MR_TCP); + #if _WIZCHIP_ > 5200 + if(getSn_KPALVTR(sn) != 0) return SOCKERR_SOCKOPT; + #endif + setSn_CR(sn,Sn_CR_SEND_KEEP); + while(getSn_CR(sn) != 0) + { + // M20131220 + //if ((tmp = getSn_IR(sn)) & Sn_IR_TIMEOUT) + if (getSn_IR(sn) & Sn_IR_TIMEOUT) + { + setSn_IR(sn, Sn_IR_TIMEOUT); + return SOCKERR_TIMEOUT; + } + } + break; + #if _WIZCHIP_ > 5200 + case SO_KEEPALIVEAUTO: + CHECK_SOCKMODE(Sn_MR_TCP); + setSn_KPALVTR(sn,*(uint8_t*)arg); + break; + #endif +#endif + default: + return SOCKERR_ARG; + } + return SOCK_OK; +} + +int8_t WIZCHIP_EXPORT(getsockopt)(uint8_t sn, sockopt_type sotype, void* arg) +{ + CHECK_SOCKNUM(); + switch(sotype) + { + case SO_FLAG: + *(uint8_t*)arg = getSn_MR(sn) & 0xF0; + break; + case SO_TTL: + *(uint8_t*) arg = getSn_TTL(sn); + break; + case SO_TOS: + *(uint8_t*) arg = getSn_TOS(sn); + break; + case SO_MSS: + *(uint8_t*) arg = getSn_MSSR(sn); + case SO_DESTIP: + getSn_DIPR(sn, (uint8_t*)arg); + break; + case SO_DESTPORT: + *(uint16_t*) arg = getSn_DPORT(sn); + break; + #if _WIZCHIP_ > 5200 + case SO_KEEPALIVEAUTO: + CHECK_SOCKMODE(Sn_MR_TCP); + *(uint16_t*) arg = getSn_KPALVTR(sn); + break; + #endif + case SO_SENDBUF: + *(uint16_t*) arg = getSn_TX_FSR(sn); + case SO_RECVBUF: + *(uint16_t*) arg = getSn_RX_RSR(sn); + case SO_STATUS: + *(uint8_t*) arg = getSn_SR(sn); + break; + case SO_REMAINSIZE: + if(getSn_MR(sn) == Sn_MR_TCP) + *(uint16_t*)arg = getSn_RX_RSR(sn); + else + *(uint16_t*)arg = sock_remained_size[sn]; + break; + case SO_PACKINFO: + CHECK_SOCKMODE(Sn_MR_TCP); + *(uint8_t*)arg = sock_pack_info[sn]; + break; + default: + return SOCKERR_SOCKOPT; + } + return SOCK_OK; +} diff --git a/drivers/wiznet5k/ethernet/socket.h b/drivers/wiznet5k/ethernet/socket.h new file mode 100644 index 0000000000000..2f03a34eba015 --- /dev/null +++ b/drivers/wiznet5k/ethernet/socket.h @@ -0,0 +1,472 @@ +//***************************************************************************** +// +//! \file socket.h +//! \brief SOCKET APIs Header file. +//! \details SOCKET APIs like as berkeley socket api. +//! \version 1.0.2 +//! \date 2013/10/21 +//! \par Revision history +//! <2014/05/01> V1.0.2. Refer to M20140501 +//! 1. Modify the comment : SO_REMAINED -> PACK_REMAINED +//! 2. Add the comment as zero byte udp data reception in getsockopt(). +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** +/** + * @defgroup WIZnet_socket_APIs 1. WIZnet socket APIs + * @brief WIZnet socket APIs are based on Berkeley socket APIs, thus it has much similar name and interface. + * But there is a little bit of difference. + * @details + * Comparison between WIZnet and Berkeley SOCKET APIs + * + * + * + * + * + * + * + * + * + * + * + * + *
API WIZnet Berkeley
socket() O O
bind() X O
listen() O O
connect() O O
accept() X O
recv() O O
send() O O
recvfrom() O O
sendto() O O
closesocket() O
close() & disconnect()		 O
+ * There are @b bind() and @b accept() functions in @b Berkeley SOCKET API but, + * not in @b WIZnet SOCKET API. Because socket() of WIZnet is not only creating a SOCKET but also binding a local port number, + * and listen() of WIZnet is not only listening to connection request from client but also accepting the connection request. \n + * When you program "TCP SERVER" with Berkeley SOCKET API, you can use only one listen port. + * When the listen SOCKET accepts a connection request from a client, it keeps listening. + * After accepting the connection request, a new SOCKET is created and the new SOCKET is used in communication with the client. \n + * Following figure shows network flow diagram by Berkeley SOCKET API. + * @image html Berkeley_SOCKET.jpg "" + * But, When you program "TCP SERVER" with WIZnet SOCKET API, you can use as many as 8 listen SOCKET with same port number. \n + * Because there's no accept() in WIZnet SOCKET APIs, when the listen SOCKET accepts a connection request from a client, + * it is changed in order to communicate with the client. + * And the changed SOCKET is not listening any more and is dedicated for communicating with the client. \n + * If there're many listen SOCKET with same listen port number and a client requests a connection, + * the SOCKET which has the smallest SOCKET number accepts the request and is changed as communication SOCKET. \n + * Following figure shows network flow diagram by WIZnet SOCKET API. + * @image html WIZnet_SOCKET.jpg "" + */ +#ifndef _WIZCHIP_SOCKET_H_ +#define _WIZCHIP_SOCKET_H_ + +// use this macro for exported names to avoid name clashes +#define WIZCHIP_EXPORT(name) wizchip_ ## name + +#include "wizchip_conf.h" + +#define SOCKET uint8_t ///< SOCKET type define for legacy driver + +#define SOCK_OK 1 ///< Result is OK about socket process. +#define SOCK_BUSY 0 ///< Socket is busy on processing the operation. Valid only Non-block IO Mode. +#define SOCK_FATAL -1000 ///< Result is fatal error about socket process. + +#define SOCK_ERROR 0 +#define SOCKERR_SOCKNUM (SOCK_ERROR - 1) ///< Invalid socket number +#define SOCKERR_SOCKOPT (SOCK_ERROR - 2) ///< Invalid socket option +#define SOCKERR_SOCKINIT (SOCK_ERROR - 3) ///< Socket is not initialized +#define SOCKERR_SOCKCLOSED (SOCK_ERROR - 4) ///< Socket unexpectedly closed. +#define SOCKERR_SOCKMODE (SOCK_ERROR - 5) ///< Invalid socket mode for socket operation. +#define SOCKERR_SOCKFLAG (SOCK_ERROR - 6) ///< Invalid socket flag +#define SOCKERR_SOCKSTATUS (SOCK_ERROR - 7) ///< Invalid socket status for socket operation. +#define SOCKERR_ARG (SOCK_ERROR - 10) ///< Invalid argument. +#define SOCKERR_PORTZERO (SOCK_ERROR - 11) ///< Port number is zero +#define SOCKERR_IPINVALID (SOCK_ERROR - 12) ///< Invalid IP address +#define SOCKERR_TIMEOUT (SOCK_ERROR - 13) ///< Timeout occurred +#define SOCKERR_DATALEN (SOCK_ERROR - 14) ///< Data length is zero or greater than buffer max size. +#define SOCKERR_BUFFER (SOCK_ERROR - 15) ///< Socket buffer is not enough for data communication. + +#define SOCKFATAL_PACKLEN (SOCK_FATAL - 1) ///< Invalid packet length. Fatal Error. + +/* + * SOCKET FLAG + */ +#define SF_ETHER_OWN (Sn_MR_MFEN) ///< In \ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet +#define SF_IGMP_VER2 (Sn_MR_MC) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2. +#define SF_TCP_NODELAY (Sn_MR_ND) ///< In \ref Sn_MR_TCP, Use to nodelayed ack. +#define SF_MULTI_ENABLE (Sn_MR_MULTI) ///< In \ref Sn_MR_UDP, Enable multicast mode. + +#if _WIZCHIP_ == 5500 + #define SF_BROAD_BLOCK (Sn_MR_BCASTB) ///< In \ref Sn_MR_UDP or \ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500 + #define SF_MULTI_BLOCK (Sn_MR_MMB) ///< In \ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500 + #define SF_IPv6_BLOCK (Sn_MR_MIP6B) ///< In \ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500 + #define SF_UNI_BLOCK (Sn_MR_UCASTB) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500 +#endif + +#define SF_IO_NONBLOCK 0x01 ///< Socket nonblock io mode. It used parameter in \ref socket(). + +/* + * UDP & MACRAW Packet Infomation + */ +#define PACK_FIRST 0x80 ///< In Non-TCP packet, It indicates to start receiving a packet. +#define PACK_REMAINED 0x01 ///< In Non-TCP packet, It indicates to remain a packet to be received. +#define PACK_COMPLETED 0x00 ///< In Non-TCP packet, It indicates to complete to receive a packet. + +// resets all global state associated with the socket interface +void WIZCHIP_EXPORT(socket_reset)(void); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Open a socket. + * @details Initializes the socket with 'sn' passed as parameter and open. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param protocol Protocol type to operate such as TCP, UDP and MACRAW. + * @param port Port number to be bined. + * @param flag Socket flags as \ref SF_ETHER_OWN, \ref SF_IGMP_VER2, \ref SF_TCP_NODELAY, \ref SF_MULTI_ENABLE, \ref SF_IO_NONBLOCK and so on.\n + * Valid flags only in W5500 : @ref SF_BROAD_BLOCK, @ref SF_MULTI_BLOCK, @ref SF_IPv6_BLOCK, and @ref SF_UNI_BLOCK. + * @sa Sn_MR + * + * @return @b Success : The socket number @b 'sn' passed as parameter\n + * @b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number\n + * @ref SOCKERR_SOCKMODE - Not support socket mode as TCP, UDP, and so on. \n + * @ref SOCKERR_SOCKFLAG - Invaild socket flag. + */ +int8_t WIZCHIP_EXPORT(socket)(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Close a socket. + * @details It closes the socket with @b'sn' passed as parameter. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * + * @return @b Success : @ref SOCK_OK \n + * @b Fail : @ref SOCKERR_SOCKNUM - Invalid socket number + */ +int8_t WIZCHIP_EXPORT(close)(uint8_t sn); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Listen to a connection request from a client. + * @details It is listening to a connection request from a client. + * If connection request is accepted successfully, the connection is established. Socket sn is used in passive(server) mode. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @return @b Success : @ref SOCK_OK \n + * @b Fail :\n @ref SOCKERR_SOCKINIT - Socket is not initialized \n + * @ref SOCKERR_SOCKCLOSED - Socket closed unexpectedly. + */ +int8_t WIZCHIP_EXPORT(listen)(uint8_t sn); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Try to connect a server. + * @details It requests connection to the server with destination IP address and port number passed as parameter.\n + * @note It is valid only in TCP client mode. + * In block io mode, it does not return until connection is completed. + * In Non-block io mode, it return @ref SOCK_BUSY immediately. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param addr Pointer variable of destination IP address. It should be allocated 4 bytes. + * @param port Destination port number. + * + * @return @b Success : @ref SOCK_OK \n + * @b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number\n + * @ref SOCKERR_SOCKMODE - Invalid socket mode\n + * @ref SOCKERR_SOCKINIT - Socket is not initialized\n + * @ref SOCKERR_IPINVALID - Wrong server IP address\n + * @ref SOCKERR_PORTZERO - Server port zero\n + * @ref SOCKERR_TIMEOUT - Timeout occurred during request connection\n + * @ref SOCK_BUSY - In non-block io mode, it returned immediately\n + */ +int8_t WIZCHIP_EXPORT(connect)(uint8_t sn, uint8_t * addr, uint16_t port); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Try to disconnect a connection socket. + * @details It sends request message to disconnect the TCP socket 'sn' passed as parameter to the server or client. + * @note It is valid only in TCP server or client mode. \n + * In block io mode, it does not return until disconnection is completed. \n + * In Non-block io mode, it return @ref SOCK_BUSY immediately. \n + + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @return @b Success : @ref SOCK_OK \n + * @b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number \n + * @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n + * @ref SOCKERR_TIMEOUT - Timeout occurred \n + * @ref SOCK_BUSY - Socket is busy. + */ +int8_t WIZCHIP_EXPORT(disconnect)(uint8_t sn); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Send data to the connected peer in TCP socket. + * @details It is used to send outgoing data to the connected socket. + * @note It is valid only in TCP server or client mode. It can't send data greater than socket buffer size. \n + * In block io mode, It doesn't return until data send is completed - socket buffer size is greater than data. \n + * In non-block io mode, It return @ref SOCK_BUSY immediately when socket buffer is not enough. \n + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param buf Pointer buffer containing data to be sent. + * @param len The byte length of data in buf. + * @return @b Success : The sent data size \n + * @b Fail : \n @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n + * @ref SOCKERR_TIMEOUT - Timeout occurred \n + * @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n + * @ref SOCKERR_SOCKNUM - Invalid socket number \n + * @ref SOCKERR_DATALEN - zero data length \n + * @ref SOCK_BUSY - Socket is busy. + */ +int32_t WIZCHIP_EXPORT(send)(uint8_t sn, uint8_t * buf, uint16_t len); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Receive data from the connected peer. + * @details It is used to read incoming data from the connected socket.\n + * It waits for data as much as the application wants to receive. + * @note It is valid only in TCP server or client mode. It can't receive data greater than socket buffer size. \n + * In block io mode, it doesn't return until data reception is completed - data is filled as len in socket buffer. \n + * In non-block io mode, it return @ref SOCK_BUSY immediately when len is greater than data size in socket buffer. \n + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param buf Pointer buffer to read incoming data. + * @param len The max data length of data in buf. + * @return @b Success : The real received data size \n + * @b Fail :\n + * @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n + * @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n + * @ref SOCKERR_SOCKNUM - Invalid socket number \n + * @ref SOCKERR_DATALEN - zero data length \n + * @ref SOCK_BUSY - Socket is busy. + */ +int32_t WIZCHIP_EXPORT(recv)(uint8_t sn, uint8_t * buf, uint16_t len); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Sends datagram to the peer with destination IP address and port number passed as parameter. + * @details It sends datagram of UDP or MACRAW to the peer with destination IP address and port number passed as parameter.\n + * Even if the connectionless socket has been previously connected to a specific address, + * the address and port number parameters override the destination address for that particular datagram only. + * @note In block io mode, It doesn't return until data send is completed - socket buffer size is greater than len. + * In non-block io mode, It return @ref SOCK_BUSY immediately when socket buffer is not enough. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param buf Pointer buffer to send outgoing data. + * @param len The byte length of data in buf. + * @param addr Pointer variable of destination IP address. It should be allocated 4 bytes. + * @param port Destination port number. + * + * @return @b Success : The sent data size \n + * @b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number \n + * @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n + * @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n + * @ref SOCKERR_DATALEN - zero data length \n + * @ref SOCKERR_IPINVALID - Wrong server IP address\n + * @ref SOCKERR_PORTZERO - Server port zero\n + * @ref SOCKERR_SOCKCLOSED - Socket unexpectedly closed \n + * @ref SOCKERR_TIMEOUT - Timeout occurred \n + * @ref SOCK_BUSY - Socket is busy. + */ +int32_t WIZCHIP_EXPORT(sendto)(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port); + +/** + * @ingroup WIZnet_socket_APIs + * @brief Receive datagram of UDP or MACRAW + * @details This function is an application I/F function which is used to receive the data in other then TCP mode. \n + * This function is used to receive UDP and MAC_RAW mode, and handle the header as well. + * This function can divide to received the packet data. + * On the MACRAW SOCKET, the addr and port parameters are ignored. + * @note In block io mode, it doesn't return until data reception is completed - data is filled as len in socket buffer + * In non-block io mode, it return @ref SOCK_BUSY immediately when len is greater than data size in socket buffer. + * + * @param sn Socket number. It should be 0 ~ @ref \_WIZCHIP_SOCK_NUM_. + * @param buf Pointer buffer to read incoming data. + * @param len The max data length of data in buf. + * When the received packet size <= len, receives data as packet sized. + * When others, receives data as len. + * @param addr Pointer variable of destination IP address. It should be allocated 4 bytes. + * It is valid only when the first call recvfrom for receiving the packet. + * When it is valid, @ref packinfo[7] should be set as '1' after call @ref getsockopt(sn, SO_PACKINFO, &packinfo). + * @param port Pointer variable of destination port number. + * It is valid only when the first call recvform for receiving the packet. +* When it is valid, @ref packinfo[7] should be set as '1' after call @ref getsockopt(sn, SO_PACKINFO, &packinfo). + * + * @return @b Success : This function return real received data size for success.\n + * @b Fail : @ref SOCKERR_DATALEN - zero data length \n + * @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n + * @ref SOCKERR_SOCKNUM - Invalid socket number \n + * @ref SOCKBUSY - Socket is busy. + */ +int32_t WIZCHIP_EXPORT(recvfrom)(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port); + + +///////////////////////////// +// SOCKET CONTROL & OPTION // +///////////////////////////// +#define SOCK_IO_BLOCK 0 ///< Socket Block IO Mode in @ref setsockopt(). +#define SOCK_IO_NONBLOCK 1 ///< Socket Non-block IO Mode in @ref setsockopt(). + +/** + * @defgroup DATA_TYPE DATA TYPE + */ + +/** + * @ingroup DATA_TYPE + * @brief The kind of Socket Interrupt. + * @sa Sn_IR, Sn_IMR, setSn_IR(), getSn_IR(), setSn_IMR(), getSn_IMR() + */ +typedef enum +{ + SIK_CONNECTED = (1 << 0), ///< connected + SIK_DISCONNECTED = (1 << 1), ///< disconnected + SIK_RECEIVED = (1 << 2), ///< data received + SIK_TIMEOUT = (1 << 3), ///< timeout occurred + SIK_SENT = (1 << 4), ///< send ok + SIK_ALL = 0x1F, ///< all interrupt +}sockint_kind; + +/** + * @ingroup DATA_TYPE + * @brief The type of @ref ctlsocket(). + */ +typedef enum +{ + CS_SET_IOMODE, ///< set socket IO mode with @ref SOCK_IO_BLOCK or @ref SOCK_IO_NONBLOCK + CS_GET_IOMODE, ///< get socket IO mode + CS_GET_MAXTXBUF, ///< get the size of socket buffer allocated in TX memory + CS_GET_MAXRXBUF, ///< get the size of socket buffer allocated in RX memory + CS_CLR_INTERRUPT, ///< clear the interrupt of socket with @ref sockint_kind + CS_GET_INTERRUPT, ///< get the socket interrupt. refer to @ref sockint_kind + CS_SET_INTMASK, ///< set the interrupt mask of socket with @ref sockint_kind + CS_GET_INTMASK ///< get the masked interrupt of socket. refer to @ref sockint_kind +}ctlsock_type; + + +/** + * @ingroup DATA_TYPE + * @brief The type of socket option in @ref setsockopt() or @ref getsockopt() + */ +typedef enum +{ + SO_FLAG, ///< Valid only in getsockopt(), For set flag of socket refer to flag in @ref socket(). + SO_TTL, ///< Set/Get TTL. @ref Sn_TTL ( @ref setSn_TTL(), @ref getSn_TTL() ) + SO_TOS, ///< Set/Get TOS. @ref Sn_TOS ( @ref setSn_TOS(), @ref getSn_TOS() ) + SO_MSS, ///< Set/Get MSS. @ref Sn_MSSR ( @ref setSn_MSSR(), @ref getSn_MSSR() ) + SO_DESTIP, ///< Set/Get the destination IP address. @ref Sn_DIPR ( @ref setSn_DIPR(), @ref getSn_DIPR() ) + SO_DESTPORT, ///< Set/Get the destination Port number. @ref Sn_DPORT ( @ref setSn_DPORT(), @ref getSn_DPORT() ) +#if _WIZCHIP_ != 5100 + SO_KEEPALIVESEND, ///< Valid only in setsockopt. Manually send keep-alive packet in TCP mode + #if _WIZCHIP_ > 5200 + SO_KEEPALIVEAUTO, ///< Set/Get keep-alive auto transmission timer in TCP mode + #endif +#endif + SO_SENDBUF, ///< Valid only in getsockopt. Get the free data size of Socekt TX buffer. @ref Sn_TX_FSR, @ref getSn_TX_FSR() + SO_RECVBUF, ///< Valid only in getsockopt. Get the received data size in socket RX buffer. @ref Sn_RX_RSR, @ref getSn_RX_RSR() + SO_STATUS, ///< Valid only in getsockopt. Get the socket status. @ref Sn_SR, @ref getSn_SR() + SO_REMAINSIZE, ///< Valid only in getsockopt. Get the remained packet size in other then TCP mode. + SO_PACKINFO ///< Valid only in getsockopt. Get the packet information as @ref PACK_FIRST, @ref PACK_REMAINED, and @ref PACK_COMPLETED in other then TCP mode. +}sockopt_type; + +/** + * @ingroup WIZnet_socket_APIs + * @brief Control socket. + * @details Control IO mode, Interrupt & Mask of socket and get the socket buffer information. + * Refer to @ref ctlsock_type. + * @param sn socket number + * @param cstype type of control socket. refer to @ref ctlsock_type. + * @param arg Data type and value is determined according to @ref ctlsock_type. \n + * + * + * + * + * + *
@b cstype @b data type@b value
@ref CS_SET_IOMODE \n @ref CS_GET_IOMODE uint8_t @ref SOCK_IO_BLOCK @ref SOCK_IO_NONBLOCK
@ref CS_GET_MAXTXBUF \n @ref CS_GET_MAXRXBUF uint16_t 0 ~ 16K
@ref CS_CLR_INTERRUPT \n @ref CS_GET_INTERRUPT \n @ref CS_SET_INTMASK \n @ref CS_GET_INTMASK @ref sockint_kind @ref SIK_CONNECTED, etc.
+ * @return @b Success @ref SOCK_OK \n + * @b fail @ref SOCKERR_ARG - Invalid argument\n + */ +int8_t WIZCHIP_EXPORT(ctlsocket)(uint8_t sn, ctlsock_type cstype, void* arg); + +/** + * @ingroup WIZnet_socket_APIs + * @brief set socket options + * @details Set socket option like as TTL, MSS, TOS, and so on. Refer to @ref sockopt_type. + * + * @param sn socket number + * @param sotype socket option type. refer to @ref sockopt_type + * @param arg Data type and value is determined according to sotype. \n + * + * + * + * + * + * + * + * + * + *
@b sotype @b data type@b value
@ref SO_TTL uint8_t 0 ~ 255
@ref SO_TOS uint8_t 0 ~ 255
@ref SO_MSS uint16_t 0 ~ 65535
@ref SO_DESTIP uint8_t[4]
@ref SO_DESTPORT uint16_t 0 ~ 65535
@ref SO_KEEPALIVESEND null null
@ref SO_KEEPALIVEAUTO uint8_t 0 ~ 255
+ * @return + * - @b Success : @ref SOCK_OK \n + * - @b Fail + * - @ref SOCKERR_SOCKNUM - Invalid Socket number \n + * - @ref SOCKERR_SOCKMODE - Invalid socket mode \n + * - @ref SOCKERR_SOCKOPT - Invalid socket option or its value \n + * - @ref SOCKERR_TIMEOUT - Timeout occurred when sending keep-alive packet \n + */ +int8_t WIZCHIP_EXPORT(setsockopt)(uint8_t sn, sockopt_type sotype, void* arg); + +/** + * @ingroup WIZnet_socket_APIs + * @brief get socket options + * @details Get socket option like as FLAG, TTL, MSS, and so on. Refer to @ref sockopt_type + * @param sn socket number + * @param sotype socket option type. refer to @ref sockopt_type + * @param arg Data type and value is determined according to sotype. \n + * + * + * + * + * + * + * + * + * + * + * + * + * + *
@b sotype @b data type@b value
@ref SO_FLAG uint8_t @ref SF_ETHER_OWN, etc...
@ref SO_TOS uint8_t 0 ~ 255
@ref SO_MSS uint16_t 0 ~ 65535
@ref SO_DESTIP uint8_t[4]
@ref SO_DESTPORT uint16_t
@ref SO_KEEPALIVEAUTO uint8_t 0 ~ 255
@ref SO_SENDBUF uint16_t 0 ~ 65535
@ref SO_RECVBUF uint16_t 0 ~ 65535
@ref SO_STATUS uint8_t @ref SOCK_ESTABLISHED, etc..
@ref SO_REMAINSIZE uint16_t 0~ 65535
@ref SO_PACKINFO uint8_t @ref PACK_FIRST, etc...
+ * @return + * - @b Success : @ref SOCK_OK \n + * - @b Fail + * - @ref SOCKERR_SOCKNUM - Invalid Socket number \n + * - @ref SOCKERR_SOCKOPT - Invalid socket option or its value \n + * - @ref SOCKERR_SOCKMODE - Invalid socket mode \n + * @note + * The option as PACK_REMAINED and SO_PACKINFO is valid only in NON-TCP mode and after call @ref recvfrom(). \n + * When SO_PACKINFO value is PACK_FIRST and the return value of recvfrom() is zero, + * This means the zero byte UDP data(UDP Header only) received. + */ +int8_t WIZCHIP_EXPORT(getsockopt)(uint8_t sn, sockopt_type sotype, void* arg); + +#endif // _WIZCHIP_SOCKET_H_ diff --git a/drivers/wiznet5k/ethernet/w5200/w5200.c b/drivers/wiznet5k/ethernet/w5200/w5200.c new file mode 100644 index 0000000000000..8c3780792eff7 --- /dev/null +++ b/drivers/wiznet5k/ethernet/w5200/w5200.c @@ -0,0 +1,206 @@ +// dpgeorge: this file taken from w5500/w5500.c and adapted to W5200 + +//***************************************************************************** +// +//! \file w5500.c +//! \brief W5500 HAL Interface. +//! \version 1.0.1 +//! \date 2013/10/21 +//! \par Revision history +//! <2014/05/01> V1.0.2 +//! 1. Implicit type casting -> Explicit type casting. Refer to M20140501 +//! Fixed the problem on porting into under 32bit MCU +//! Issued by Mathias ClauBen, wizwiki forum ID Think01 and bobh +//! Thank for your interesting and serious advices. +//! <2013/10/21> 1st Release +//! <2013/12/20> V1.0.1 +//! 1. Remove warning +//! 2. WIZCHIP_READ_BUF WIZCHIP_WRITE_BUF in case _WIZCHIP_IO_MODE_SPI_FDM_ +//! for loop optimized(removed). refer to M20131220 +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#include "w5200.h" + +#define SMASK (0x7ff) /* tx buffer mask */ +#define RMASK (0x7ff) /* rx buffer mask */ +#define SSIZE (2048) /* max tx buffer size */ +#define RSIZE (2048) /* max rx buffer size */ + +#define TXBUF_BASE (0x8000) +#define RXBUF_BASE (0xc000) +#define SBASE(sn) (TXBUF_BASE + SSIZE * (sn)) /* tx buffer base for socket sn */ +#define RBASE(sn) (RXBUF_BASE + RSIZE * (sn)) /* rx buffer base for socket sn */ + +uint8_t WIZCHIP_READ(uint32_t AddrSel) { + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + uint8_t spi_data[4] = { + AddrSel >> 8, + AddrSel, + 0x00, + 0x01, + }; + WIZCHIP.IF.SPI._write_bytes(spi_data, 4); + uint8_t ret; + WIZCHIP.IF.SPI._read_bytes(&ret, 1); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); + + return ret; +} + +void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb) { + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + uint8_t spi_data[5] = { + AddrSel >> 8, + AddrSel, + 0x80, + 0x01, + wb, + }; + WIZCHIP.IF.SPI._write_bytes(spi_data, 5); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + +void WIZCHIP_READ_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len) { + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + uint8_t spi_data[4] = { + AddrSel >> 8, + AddrSel, + 0x00 | ((len >> 8) & 0x7f), + len & 0xff, + }; + WIZCHIP.IF.SPI._write_bytes(spi_data, 4); + WIZCHIP.IF.SPI._read_bytes(pBuf, len); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + +void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len) { + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + uint8_t spi_data[4] = { + AddrSel >> 8, + AddrSel, + 0x80 | ((len >> 8) & 0x7f), + len & 0xff, + }; + WIZCHIP.IF.SPI._write_bytes(spi_data, 4); + WIZCHIP.IF.SPI._write_bytes(pBuf, len); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + +uint16_t getSn_TX_FSR(uint8_t sn) { + uint16_t val = 0, val1 = 0; + do { + val1 = (WIZCHIP_READ(Sn_TX_FSR(sn)) << 8) | WIZCHIP_READ(Sn_TX_FSR(sn) + 1); + if (val1 != 0) { + val = (WIZCHIP_READ(Sn_TX_FSR(sn)) << 8) | WIZCHIP_READ(Sn_TX_FSR(sn) + 1); + } + } while (val != val1); + return val; +} + +uint16_t getSn_RX_RSR(uint8_t sn) { + uint16_t val = 0, val1 = 0; + do { + val1 = (WIZCHIP_READ(Sn_RX_RSR(sn)) << 8) | WIZCHIP_READ(Sn_RX_RSR(sn) + 1); + if (val1 != 0) { + val = (WIZCHIP_READ(Sn_RX_RSR(sn)) << 8) | WIZCHIP_READ(Sn_RX_RSR(sn) + 1); + } + } while (val != val1); + return val; +} + +void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len) { + if (len == 0) { + return; + } + + uint16_t ptr = getSn_TX_WR(sn); + uint16_t offset = ptr & SMASK; + uint32_t addr = offset + SBASE(sn); + + if (offset + len > SSIZE) { + // implement wrap-around circular buffer + uint16_t size = SSIZE - offset; + WIZCHIP_WRITE_BUF(addr, wizdata, size); + WIZCHIP_WRITE_BUF(SBASE(sn), wizdata + size, len - size); + } else { + WIZCHIP_WRITE_BUF(addr, wizdata, len); + } + + ptr += len; + setSn_TX_WR(sn, ptr); +} + +void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len) { + if (len == 0) { + return; + } + + uint16_t ptr = getSn_RX_RD(sn); + uint16_t offset = ptr & RMASK; + uint16_t addr = RBASE(sn) + offset; + + if (offset + len > RSIZE) { + // implement wrap-around circular buffer + uint16_t size = RSIZE - offset; + WIZCHIP_READ_BUF(addr, wizdata, size); + WIZCHIP_READ_BUF(RBASE(sn), wizdata + size, len - size); + } else { + WIZCHIP_READ_BUF(addr, wizdata, len); + } + + ptr += len; + setSn_RX_RD(sn, ptr); +} + +void wiz_recv_ignore(uint8_t sn, uint16_t len) { + uint16_t ptr = getSn_RX_RD(sn); + ptr += len; + setSn_RX_RD(sn, ptr); +} diff --git a/drivers/wiznet5k/ethernet/w5200/w5200.h b/drivers/wiznet5k/ethernet/w5200/w5200.h new file mode 100644 index 0000000000000..63561940f8b55 --- /dev/null +++ b/drivers/wiznet5k/ethernet/w5200/w5200.h @@ -0,0 +1,2092 @@ +// dpgeorge: this file taken from w5500/w5500.h and adapted to W5200 + +//***************************************************************************** +// +//! \file w5500.h +//! \brief W5500 HAL Header File. +//! \version 1.0.0 +//! \date 2013/10/21 +//! \par Revision history +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#ifndef _W5200_H_ +#define _W5200_H_ + +#include +#include "../wizchip_conf.h" +//#include "board.h" + +#define _W5200_IO_BASE_ 0x00000000 + +#define WIZCHIP_CREG_ADDR(addr) (_W5200_IO_BASE_ + (addr)) + +#define WIZCHIP_CH_BASE (0x4000) +#define WIZCHIP_CH_SIZE (0x100) +#define WIZCHIP_SREG_ADDR(sn, addr) (_W5200_IO_BASE_ + WIZCHIP_CH_BASE + (sn) * WIZCHIP_CH_SIZE + (addr)) + +////////////////////////////// +//-------------------------- defgroup --------------------------------- +/** + * @defgroup W5500 W5500 + * + * @brief WHIZCHIP register defines and I/O functions of @b W5500. + * + * - @ref WIZCHIP_register : @ref Common_register_group and @ref Socket_register_group + * - @ref WIZCHIP_IO_Functions : @ref Basic_IO_function, @ref Common_register_access_function and @ref Socket_register_access_function + */ + + +/** + * @defgroup WIZCHIP_register WIZCHIP register + * @ingroup W5500 + * + * @brief WHIZCHIP register defines register group of @b W5500. + * + * - @ref Common_register_group : Common register group + * - @ref Socket_register_group : \c SOCKET n register group + */ + + +/** + * @defgroup WIZCHIP_IO_Functions WIZCHIP I/O functions + * @ingroup W5500 + * + * @brief This supports the basic I/O functions for @ref WIZCHIP_register. + * + * - Basic I/O function \n + * WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() \n\n + * + * - @ref Common_register_group access functions \n + * -# @b Mode \n + * getMR(), setMR() + * -# @b Interrupt \n + * getIR(), setIR(), getIMR(), setIMR(), getSIR(), setSIR(), getSIMR(), setSIMR(), getINTLEVEL(), setINTLEVEL() + * -# Network Information \n + * getSHAR(), setSHAR(), getGAR(), setGAR(), getSUBR(), setSUBR(), getSIPR(), setSIPR() + * -# @b Retransmission \n + * getRCR(), setRCR(), getRTR(), setRTR() + * -# @b PPPoE \n + * getPTIMER(), setPTIMER(), getPMAGIC(), getPMAGIC(), getPSID(), setPSID(), getPHAR(), setPHAR(), getPMRU(), setPMRU() + * -# ICMP packet \n + * getUIPR(), getUPORTR() + * -# @b etc. \n + * getPHYCFGR(), setPHYCFGR(), getVERSIONR() \n\n + * + * - \ref Socket_register_group access functions \n + * -# SOCKET control \n + * getSn_MR(), setSn_MR(), getSn_CR(), setSn_CR(), getSn_IMR(), setSn_IMR(), getSn_IR(), setSn_IR() + * -# SOCKET information \n + * getSn_SR(), getSn_DHAR(), setSn_DHAR(), getSn_PORT(), setSn_PORT(), getSn_DIPR(), setSn_DIPR(), getSn_DPORT(), setSn_DPORT() + * getSn_MSSR(), setSn_MSSR() + * -# SOCKET communication \n + * getSn_RXBUF_SIZE(), setSn_RXBUF_SIZE(), getSn_TXBUF_SIZE(), setSn_TXBUF_SIZE() \n + * getSn_TX_RD(), getSn_TX_WR(), setSn_TX_WR() \n + * getSn_RX_RD(), setSn_RX_RD(), getSn_RX_WR() \n + * getSn_TX_FSR(), getSn_RX_RSR(), getSn_KPALVTR(), setSn_KPALVTR() + * -# IP header field \n + * getSn_FRAG(), setSn_FRAG(), getSn_TOS(), setSn_TOS() \n + * getSn_TTL(), setSn_TTL() + */ + + + +/** + * @defgroup Common_register_group Common register + * @ingroup WIZCHIP_register + * + * @brief Common register group\n + * It set the basic for the networking\n + * It set the configuration such as interrupt, network information, ICMP, etc. + * @details + * @sa MR : Mode register. + * @sa GAR, SUBR, SHAR, SIPR + * @sa INTLEVEL, IR, IMR, SIR, SIMR : Interrupt. + * @sa RTR, RCR : Data retransmission. + * @sa PTIMER, PMAGIC, PHAR, PSID, PMRU : PPPoE. + * @sa UIPR, UPORTR : ICMP message. + * @sa PHYCFGR, VERSIONR : etc. + */ + + + +/** + * @defgroup Socket_register_group Socket register + * @ingroup WIZCHIP_register + * + * @brief Socket register group.\n + * Socket register configures and control SOCKETn which is necessary to data communication. + * @details + * @sa Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control + * @sa Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information + * @sa Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol. + * @sa Sn_RXBUF_SIZE, Sn_TXBUF_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication + */ + + + + /** + * @defgroup Basic_IO_function Basic I/O function + * @ingroup WIZCHIP_IO_Functions + * @brief These are basic input/output functions to read values from register or write values to register. + */ + +/** + * @defgroup Common_register_access_function Common register access functions + * @ingroup WIZCHIP_IO_Functions + * @brief These are functions to access common registers. + */ + +/** + * @defgroup Socket_register_access_function Socket register access functions + * @ingroup WIZCHIP_IO_Functions + * @brief These are functions to access socket registers. + */ + +//------------------------------- defgroup end -------------------------------------------- +//----------------------------- W5500 Common Registers IOMAP ----------------------------- +/** + * @ingroup Common_register_group + * @brief Mode Register address(R/W)\n + * @ref MR is used for S/W reset, ping block mode, PPPoE mode and etc. + * @details Each bit of @ref MR defined as follows. + * + * + * + *
7 6 5 4 3 2 1 0
RST Reserved WOL PB PPPoE Reserved FARP Reserved
+ * - \ref MR_RST : Reset + * - \ref MR_WOL : Wake on LAN + * - \ref MR_PB : Ping block + * - \ref MR_PPPOE : PPPoE mode + * - \ref MR_FARP : Force ARP mode + */ +#define MR WIZCHIP_CREG_ADDR(0x0000) + +/** + * @ingroup Common_register_group + * @brief Gateway IP Register address(R/W) + * @details @ref GAR configures the default gateway address. + */ +#define GAR WIZCHIP_CREG_ADDR(0x0001) + +/** + * @ingroup Common_register_group + * @brief Subnet mask Register address(R/W) + * @details @ref SUBR configures the subnet mask address. + */ +#define SUBR WIZCHIP_CREG_ADDR(0x0005) + +/** + * @ingroup Common_register_group + * @brief Source MAC Register address(R/W) + * @details @ref SHAR configures the source hardware address. + */ +#define SHAR WIZCHIP_CREG_ADDR(0x0009) + +/** + * @ingroup Common_register_group + * @brief Source IP Register address(R/W) + * @details @ref SIPR configures the source IP address. + */ +#define SIPR WIZCHIP_CREG_ADDR(0x000f) + +/** + * @ingroup Common_register_group + * @brief Set Interrupt low level timer register address(R/W) + * @details @ref INTLEVEL configures the Interrupt Assert Time. + */ +//#define INTLEVEL (_W5500_IO_BASE_ + (0x0013 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Interrupt Register(R/W) + * @details @ref IR indicates the interrupt status. Each bit of @ref IR will be still until the bit will be written to by the host. + * If @ref IR is not equal to x00 INTn PIN is asserted to low until it is x00\n\n + * Each bit of @ref IR defined as follows. + * + * + * + *
7 6 5 4 3 2 1 0
CONFLICT UNREACH PPPoE MP Reserved Reserved Reserved Reserved
+ * - \ref IR_CONFLICT : IP conflict + * - \ref IR_UNREACH : Destination unreachable + * - \ref IR_PPPoE : PPPoE connection close + * - \ref IR_MP : Magic packet + */ +#define IR WIZCHIP_CREG_ADDR(0x0015) + +/** + * @ingroup Common_register_group + * @brief Interrupt mask register(R/W) + * @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR. + * When a bit of @ref IMR is and the corresponding bit of @ref IR is an interrupt will be issued. In other words, + * if a bit of @ref IMR is an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n + * Each bit of @ref IMR defined as the following. + * + * + * + *
7 6 5 4 3 2 1 0
IM_IR7 IM_IR6 IM_IR5 IM_IR4 Reserved Reserved Reserved Reserved
+ * - \ref IM_IR7 : IP Conflict Interrupt Mask + * - \ref IM_IR6 : Destination unreachable Interrupt Mask + * - \ref IM_IR5 : PPPoE Close Interrupt Mask + * - \ref IM_IR4 : Magic Packet Interrupt Mask + */ +#define IMR WIZCHIP_CREG_ADDR(0x0016) + +/** + * @ingroup Common_register_group + * @brief Socket Interrupt Register(R/W) + * @details @ref SIR indicates the interrupt status of Socket.\n + * Each bit of @ref SIR be still until @ref Sn_IR is cleared by the host.\n + * If @ref Sn_IR is not equal to x00 the n-th bit of @ref SIR is and INTn PIN is asserted until @ref SIR is x00 */ +//#define SIR (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Socket Interrupt Mask Register(R/W) + * @details Each bit of @ref SIMR corresponds to each bit of @ref SIR. + * When a bit of @ref SIMR is and the corresponding bit of @ref SIR is Interrupt will be issued. + * In other words, if a bit of @ref SIMR is an interrupt will be not issued even if the corresponding bit of @ref SIR is + */ +//#define SIMR (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Timeout register address( 1 is 100us )(R/W) + * @details @ref RTR configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref RTR is x07D0or 000 + * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref RTR, W5500 waits for the peer response + * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command). + * If the peer does not respond within the @ref RTR time, W5500 retransmits the packet or issues timeout. + */ +#define RTR WIZCHIP_CREG_ADDR(0x0017) + +/** + * @ingroup Common_register_group + * @brief Retry count register(R/W) + * @details @ref RCR configures the number of time of retransmission. + * When retransmission occurs as many as ref RCR+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = . + */ +#define RCR WIZCHIP_CREG_ADDR(0x0019) + +/** + * @ingroup Common_register_group + * @brief PPP LCP Request Timer register in PPPoE mode(R/W) + * @details @ref PTIMER configures the time for sending LCP echo request. The unit of time is 25ms. + */ +#define PTIMER WIZCHIP_CREG_ADDR(0x0028) + +/** + * @ingroup Common_register_group + * @brief PPP LCP Magic number register in PPPoE mode(R/W) + * @details @ref PMAGIC configures the 4bytes magic number to be used in LCP negotiation. + */ +#define PMAGIC WIZCHIP_CREG_ADDR(0x0029) + +/** + * @ingroup Common_register_group + * @brief PPP Destination MAC Register address(R/W) + * @details @ref PHAR configures the PPPoE server hardware address that is acquired during PPPoE connection process. + */ +//#define PHAR (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP Session Identification Register(R/W) + * @details @ref PSID configures the PPPoE sever session ID acquired during PPPoE connection process. + */ +//#define PSID (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP Maximum Segment Size(MSS) register(R/W) + * @details @ref PMRU configures the maximum receive unit of PPPoE. + */ +//#define PMRU (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Unreachable IP register address in UDP mode(R) + * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number + * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates + * the destination IP address & port number respectively. + */ +//#define UIPR (_W5500_IO_BASE_ + (0x002a << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Unreachable Port register address in UDP mode(R) + * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number + * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR + * indicates the destination IP address & port number respectively. + */ +//#define UPORTR (_W5500_IO_BASE_ + (0x002e << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PHY Status Register(R/W) + * @details @ref PHYCFGR configures PHY operation mode and resets PHY. In addition, @ref PHYCFGR indicates the status of PHY such as duplex, Speed, Link. + */ +//#define PHYCFGR (_W5500_IO_BASE_ + (0x002E << 8) + (WIZCHIP_CREG_BLOCK << 3)) +#define PHYSTATUS WIZCHIP_CREG_ADDR(0x0035) + +// Reserved (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0031 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0032 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0033 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0034 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0035 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0036 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0037 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0038 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief chip version register address(R) + * @details @ref VERSIONR always indicates the W5500 version as @b 0x04. + */ +//#define VERSIONR (_W5200_IO_BASE_ + (0x0039 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + + +//----------------------------- W5500 Socket Registers IOMAP ----------------------------- +/** + * @ingroup Socket_register_group + * @brief socket Mode register(R/W) + * @details @ref Sn_MR configures the option or protocol type of Socket n.\n\n + * Each bit of @ref Sn_MR defined as the following. + * + * + * + *
7 6 5 4 3 2 1 0
MULTI/MFEN BCASTB ND/MC/MMB UCASTB/MIP6B Protocol[3] Protocol[2] Protocol[1] Protocol[0]
+ * - @ref Sn_MR_MULTI : Support UDP Multicasting + * - @ref Sn_MR_BCASTB : Broadcast block in UDP Multicasting + * - @ref Sn_MR_ND : No Delayed Ack(TCP) flag + * - @ref Sn_MR_MC : IGMP version used in UDP mulitcasting + * - @ref Sn_MR_MMB : Multicast Blocking in @ref Sn_MR_MACRAW mode + * - @ref Sn_MR_UCASTB : Unicast Block in UDP Multicating + * - @ref Sn_MR_MIP6B : IPv6 packet Blocking in @ref Sn_MR_MACRAW mode + * - Protocol + * + * + * + * + * + * + *
Protocol[3] Protocol[2] Protocol[1] Protocol[0] @b Meaning
0 0 0 0 Closed
0 0 0 1 TCP
0 0 1 0 UDP
0 1 0 0 MACRAW
+ * - @ref Sn_MR_MACRAW : MAC LAYER RAW SOCK \n + * - @ref Sn_MR_UDP : UDP + * - @ref Sn_MR_TCP : TCP + * - @ref Sn_MR_CLOSE : Unused socket + * @note MACRAW mode should be only used in Socket 0. + */ +#define Sn_MR(N) WIZCHIP_SREG_ADDR(N, 0x0000) + +/** + * @ingroup Socket_register_group + * @brief Socket command register(R/W) + * @details This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.\n + * After W5500 accepts the command, the @ref Sn_CR register is automatically cleared to 0x00. + * Even though @ref Sn_CR is cleared to 0x00, the command is still being processed.\n + * To check whether the command is completed or not, please check the @ref Sn_IR or @ref Sn_SR. + * - @ref Sn_CR_OPEN : Initialize or open socket. + * - @ref Sn_CR_LISTEN : Wait connection request in TCP mode(Server mode) + * - @ref Sn_CR_CONNECT : Send connection request in TCP mode(Client mode) + * - @ref Sn_CR_DISCON : Send closing request in TCP mode. + * - @ref Sn_CR_CLOSE : Close socket. + * - @ref Sn_CR_SEND : Update TX buffer pointer and send data. + * - @ref Sn_CR_SEND_MAC : Send data with MAC address, so without ARP process. + * - @ref Sn_CR_SEND_KEEP : Send keep alive message. + * - @ref Sn_CR_RECV : Update RX buffer pointer and receive data. + */ +#define Sn_CR(N) WIZCHIP_SREG_ADDR(N, 0x0001) + +/** + * @ingroup Socket_register_group + * @brief Socket interrupt register(R) + * @details @ref Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).\n + * When an interrupt occurs and the corresponding bit of @ref Sn_IMR is the corresponding bit of @ref Sn_IR becomes \n + * In order to clear the @ref Sn_IR bit, the host should write the bit to \n + * + * + * + *
7 6 5 4 3 2 1 0
Reserved Reserved Reserved SEND_OK TIMEOUT RECV DISCON CON
+ * - \ref Sn_IR_SENDOK : SEND_OK Interrupt + * - \ref Sn_IR_TIMEOUT : TIMEOUT Interrupt + * - \ref Sn_IR_RECV : RECV Interrupt + * - \ref Sn_IR_DISCON : DISCON Interrupt + * - \ref Sn_IR_CON : CON Interrupt + */ +#define Sn_IR(N) WIZCHIP_SREG_ADDR(N, 0x0002) + +/** + * @ingroup Socket_register_group + * @brief Socket status register(R) + * @details @ref Sn_SR indicates the status of Socket n.\n + * The status of Socket n is changed by @ref Sn_CR or some special control packet as SYN, FIN packet in TCP. + * @par Normal status + * - @ref SOCK_CLOSED : Closed + * - @ref SOCK_INIT : Initiate state + * - @ref SOCK_LISTEN : Listen state + * - @ref SOCK_ESTABLISHED : Success to connect + * - @ref SOCK_CLOSE_WAIT : Closing state + * - @ref SOCK_UDP : UDP socket + * - @ref SOCK_MACRAW : MAC raw mode socket + *@par Temporary status during changing the status of Socket n. + * - @ref SOCK_SYNSENT : This indicates Socket n sent the connect-request packet (SYN packet) to a peer. + * - @ref SOCK_SYNRECV : It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer. + * - @ref SOCK_FIN_WAIT : Connection state + * - @ref SOCK_CLOSING : Closing state + * - @ref SOCK_TIME_WAIT : Closing state + * - @ref SOCK_LAST_ACK : Closing state + */ +#define Sn_SR(N) WIZCHIP_SREG_ADDR(N, 0x0003) + +/** + * @ingroup Socket_register_group + * @brief source port register(R/W) + * @details @ref Sn_PORT configures the source port number of Socket n. + * It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered. + */ +#define Sn_PORT(N) WIZCHIP_SREG_ADDR(N, 0x0004) + +/** + * @ingroup Socket_register_group + * @brief Peer MAC register address(R/W) + * @details @ref Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or + * it indicates that it is acquired in ARP-process by CONNECT/SEND command. + */ +#define Sn_DHAR(N) WIZCHIP_SREG_ADDR(N, 0x0006) + +/** + * @ingroup Socket_register_group + * @brief Peer IP register address(R/W) + * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. + * In TCP client mode, it configures an IP address of �TCP serverbefore CONNECT command. + * In TCP server mode, it indicates an IP address of �TCP clientafter successfully establishing connection. + * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command. + */ +#define Sn_DIPR(N) WIZCHIP_SREG_ADDR(N, 0x000c) + +/** + * @ingroup Socket_register_group + * @brief Peer port register address(R/W) + * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. + * In �TCP clientmode, it configures the listen port number of �TCP serverbefore CONNECT command. + * In �TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. + * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command. + */ +#define Sn_DPORT(N) WIZCHIP_SREG_ADDR(N, 0x0010) + +/** + * @ingroup Socket_register_group + * @brief Maximum Segment Size(Sn_MSSR0) register address(R/W) + * @details @ref Sn_MSSR configures or indicates the MTU(Maximum Transfer Unit) of Socket n. + */ +#define Sn_MSSR(N) WIZCHIP_SREG_ADDR(N, 0x0012) + +// Reserved (_W5500_IO_BASE_ + (0x0014 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief IP Type of Service(TOS) Register(R/W) + * @details @ref Sn_TOS configures the TOS(Type Of Service field in IP Header) of Socket n. + * It is set before OPEN command. + */ +#define Sn_TOS(N) WIZCHIP_SREG_ADDR(N, 0x0015) +/** + * @ingroup Socket_register_group + * @brief IP Time to live(TTL) Register(R/W) + * @details @ref Sn_TTL configures the TTL(Time To Live field in IP header) of Socket n. + * It is set before OPEN command. + */ +#define Sn_TTL(N) WIZCHIP_SREG_ADDR(N, 0x0016) +// Reserved (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Receive memory size register(R/W) + * @details @ref Sn_RXBUF_SIZE configures the RX buffer block size of Socket n. + * Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. + * If a different size is configured, the data cannot be normally received from a peer. + * Although Socket n RX Buffer Block size is initially configured to 2Kbytes, + * user can re-configure its size using @ref Sn_RXBUF_SIZE. The total sum of @ref Sn_RXBUF_SIZE can not be exceed 16Kbytes. + * When exceeded, the data reception error is occurred. + */ +#define Sn_RXBUF_SIZE(N) WIZCHIP_SREG_ADDR(N, 0x001e) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory size register(R/W) + * @details @ref Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. + * If a different size is configured, the data can�t be normally transmitted to a peer. + * Although Socket n TX Buffer Block size is initially configured to 2Kbytes, + * user can be re-configure its size using @ref Sn_TXBUF_SIZE. The total sum of @ref Sn_TXBUF_SIZE can not be exceed 16Kbytes. + * When exceeded, the data transmission error is occurred. + */ +#define Sn_TXBUF_SIZE(N) WIZCHIP_SREG_ADDR(N, 0x001f) + +/** + * @ingroup Socket_register_group + * @brief Transmit free memory size register(R) + * @details @ref Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by @ref Sn_TXBUF_SIZE. + * Data bigger than @ref Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent. + * Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size, + * transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size, + * transmit the data after dividing into the checked size and saving in the Socket n TX buffer. + */ +#define Sn_TX_FSR(N) WIZCHIP_SREG_ADDR(N, 0x0020) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory read pointer register address(R) + * @details @ref Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP. + * After its initialization, it is auto-increased by SEND command. + * SEND command transmits the saved data from the current @ref Sn_TX_RD to the @ref Sn_TX_WR in the Socket n TX Buffer. + * After transmitting the saved data, the SEND command increases the @ref Sn_TX_RD as same as the @ref Sn_TX_WR. + * If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value. + */ +#define Sn_TX_RD(N) WIZCHIP_SREG_ADDR(N, 0x0022) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory write pointer register address(R/W) + * @details @ref Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.\n + * It should be read or be updated like as follows.\n + * 1. Read the starting address for saving the transmitting data.\n + * 2. Save the transmitting data from the starting address of Socket n TX buffer.\n + * 3. After saving the transmitting data, update @ref Sn_TX_WR to the increased value as many as transmitting data size. + * If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value.\n + * 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND command + */ +#define Sn_TX_WR(N) WIZCHIP_SREG_ADDR(N, 0x0024) + +/** + * @ingroup Socket_register_group + * @brief Received data size register(R) + * @details @ref Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer. + * @ref Sn_RX_RSR does not exceed the @ref Sn_RXBUF_SIZE and is calculated as the difference between + * �Socket n RX Write Pointer (@ref Sn_RX_WR)and �Socket n RX Read Pointer (@ref Sn_RX_RD) + */ +#define Sn_RX_RSR(N) WIZCHIP_SREG_ADDR(N, 0x0026) + +/** + * @ingroup Socket_register_group + * @brief Read point of Receive memory(R/W) + * @details @ref Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.\n + * 1. Read the starting save address of the received data.\n + * 2. Read data from the starting address of Socket n RX Buffer.\n + * 3. After reading the received data, Update @ref Sn_RX_RD to the increased value as many as the reading size. + * If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs, + * update with the lower 16bits value ignored the carry bit.\n + * 4. Order RECV command is for notifying the updated @ref Sn_RX_RD to W5500. + */ +#define Sn_RX_RD(N) WIZCHIP_SREG_ADDR(N, 0x0028) + +/** + * @ingroup Socket_register_group + * @brief Write point of Receive memory(R) + * @details @ref Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception. + * If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value. + */ +#define Sn_RX_WR(N) WIZCHIP_SREG_ADDR(N, 0x002a) + +/** + * @ingroup Socket_register_group + * @brief socket interrupt mask register(R) + * @details @ref Sn_IMR masks the interrupt of Socket n. + * Each bit corresponds to each bit of @ref Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of @ref Sn_IMR is + * the corresponding bit of @ref Sn_IR becomes When both the corresponding bit of @ref Sn_IMR and @ref Sn_IR are and the n-th bit of @ref IR is + * Host is interrupted by asserted INTn PIN to low. + */ +//#define Sn_IMR(N) (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Fragment field value in IP header register(R/W) + * @details @ref Sn_FRAG configures the FRAG(Fragment field in IP header). + */ +//#define Sn_FRAG(N) (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Keep Alive Timer register(R/W) + * @details @ref Sn_KPALVTR configures the transmitting timer of �KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode, + * and ignored in other modes. The time unit is 5s. + * KA packet is transmittable after @ref Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once. + * In case of '@ref Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process). + * In case of '@ref Sn_KPALVTR = 0', Auto-keep-alive-process will not operate, + * and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process). + * Manual-keep-alive-process is ignored in case of '@ref Sn_KPALVTR > 0'. + */ +//#define Sn_KPALVTR(N) (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +//#define Sn_TSR(N) (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + + +//----------------------------- W5500 Register values ----------------------------- + +/* MODE register values */ +/** + * @brief Reset + * @details If this bit is All internal registers will be initialized. It will be automatically cleared as after S/W reset. + */ +#define MR_RST 0x80 + +/** + * @brief Wake on LAN + * @details 0 : Disable WOL mode\n + * 1 : Enable WOL mode\n + * If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low. + * When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (@ref Sn_MR) for opening Socket.) + * @note The magic packet over UDP supported by W5500 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and + * 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode. + */ +#define MR_WOL 0x20 + +/** + * @brief Ping block + * @details 0 : Disable Ping block\n + * 1 : Enable Ping block\n + * If the bit is it blocks the response to a ping request. + */ +#define MR_PB 0x10 + +/** + * @brief Enable PPPoE + * @details 0 : DisablePPPoE mode\n + * 1 : EnablePPPoE mode\n + * If you use ADSL, this bit should be + */ +#define MR_PPPOE 0x08 + +/** + * @brief Enable UDP_FORCE_ARP CHECHK + * @details 0 : Disable Force ARP mode\n + * 1 : Enable Force ARP mode\n + * In Force ARP mode, It forces on sending ARP Request whenever data is sent. + */ +#define MR_FARP 0x02 + +/* IR register values */ +/** + * @brief Check IP conflict. + * @details Bit is set as when own source IP address is same with the sender IP address in the received ARP request. + */ +#define IR_CONFLICT 0x80 + +/** + * @brief Get the destination unreachable message in UDP sending. + * @details When receiving the ICMP (Destination port unreachable) packet, this bit is set as + * When this bit is Destination Information such as IP address and Port number may be checked with the corresponding @ref UIPR & @ref UPORTR. + */ +#define IR_UNREACH 0x40 + +/** + * @brief Get the PPPoE close message. + * @details When PPPoE is disconnected during PPPoE mode, this bit is set. + */ +#define IR_PPPoE 0x20 + +/** + * @brief Get the magic packet interrupt. + * @details When WOL mode is enabled and receives the magic packet over UDP, this bit is set. + */ +#define IR_MP 0x10 + + +/* PHYCFGR register value */ +#define PHYCFGR_RST ~(1<<7) //< For PHY reset, must operate AND mask. +#define PHYCFGR_OPMD (1<<6) // Configre PHY with OPMDC value +#define PHYCFGR_OPMDC_ALLA (7<<3) +#define PHYCFGR_OPMDC_PDOWN (6<<3) +#define PHYCFGR_OPMDC_NA (5<<3) +#define PHYCFGR_OPMDC_100FA (4<<3) +#define PHYCFGR_OPMDC_100F (3<<3) +#define PHYCFGR_OPMDC_100H (2<<3) +#define PHYCFGR_OPMDC_10F (1<<3) +#define PHYCFGR_OPMDC_10H (0<<3) +#define PHYCFGR_DPX_FULL (1<<2) +#define PHYCFGR_DPX_HALF (0<<2) +#define PHYCFGR_SPD_100 (1<<1) +#define PHYCFGR_SPD_10 (0<<1) +#define PHYCFGR_LNK_ON (1<<0) +#define PHYCFGR_LNK_OFF (0<<0) + +// PHYSTATUS register +#define PHYSTATUS_POWERDOWN (0x08) +#define PHYSTATUS_LINK (0x20) + +/* IMR register values */ +/** + * @brief IP Conflict Interrupt Mask. + * @details 0: Disable IP Conflict Interrupt\n + * 1: Enable IP Conflict Interrupt + */ +#define IM_IR7 0x80 + +/** + * @brief Destination unreachable Interrupt Mask. + * @details 0: Disable Destination unreachable Interrupt\n + * 1: Enable Destination unreachable Interrupt + */ +#define IM_IR6 0x40 + +/** + * @brief PPPoE Close Interrupt Mask. + * @details 0: Disable PPPoE Close Interrupt\n + * 1: Enable PPPoE Close Interrupt + */ +#define IM_IR5 0x20 + +/** + * @brief Magic Packet Interrupt Mask. + * @details 0: Disable Magic Packet Interrupt\n + * 1: Enable Magic Packet Interrupt + */ +#define IM_IR4 0x10 + +/* Sn_MR Default values */ +/** + * @brief Support UDP Multicasting + * @details 0 : disable Multicasting\n + * 1 : enable Multicasting\n + * This bit is applied only during UDP mode(P[3:0] = 010.\n + * To use multicasting, @ref Sn_DIPR & @ref Sn_DPORT should be respectively configured with the multicast group IP address & port number + * before Socket n is opened by OPEN command of @ref Sn_CR. + */ +#define Sn_MR_MULTI 0x80 + +/** + * @brief Broadcast block in UDP Multicasting. + * @details 0 : disable Broadcast Blocking\n + * 1 : enable Broadcast Blocking\n + * This bit blocks to receive broadcasting packet during UDP mode(P[3:0] = 010.\m + * In addition, This bit does when MACRAW mode(P[3:0] = 100 + */ +//#define Sn_MR_BCASTB 0x40 + +/** + * @brief No Delayed Ack(TCP), Multicast flag + * @details 0 : Disable No Delayed ACK option\n + * 1 : Enable No Delayed ACK option\n + * This bit is applied only during TCP mode (P[3:0] = 001.\n + * When this bit is It sends the ACK packet without delay as soon as a Data packet is received from a peer.\n + * When this bit is It sends the ACK packet after waiting for the timeout time configured by @ref RTR. + */ +#define Sn_MR_ND 0x20 + +/** + * @brief Unicast Block in UDP Multicasting + * @details 0 : disable Unicast Blocking\n + * 1 : enable Unicast Blocking\n + * This bit blocks receiving the unicast packet during UDP mode(P[3:0] = 010 and MULTI = + */ +//#define Sn_MR_UCASTB 0x10 + +/** + * @brief MAC LAYER RAW SOCK + * @details This configures the protocol mode of Socket n. + * @note MACRAW mode should be only used in Socket 0. + */ +#define Sn_MR_MACRAW 0x04 + +#define Sn_MR_IPRAW 0x03 /**< IP LAYER RAW SOCK */ + +/** + * @brief UDP + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_UDP 0x02 + +/** + * @brief TCP + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_TCP 0x01 + +/** + * @brief Unused socket + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_CLOSE 0x00 + +/* Sn_MR values used with Sn_MR_MACRAW */ +/** + * @brief MAC filter enable in @ref Sn_MR_MACRAW mode + * @details 0 : disable MAC Filtering\n + * 1 : enable MAC Filtering\n + * This bit is applied only during MACRAW mode(P[3:0] = 100.\n + * When set as W5500 can only receive broadcasting packet or packet sent to itself. + * When this bit is W5500 can receive all packets on Ethernet. + * If user wants to implement Hybrid TCP/IP stack, + * it is recommended that this bit is set as for reducing host overhead to process the all received packets. + */ +#define Sn_MR_MFEN Sn_MR_MULTI + +/** + * @brief Multicast Blocking in @ref Sn_MR_MACRAW mode + * @details 0 : using IGMP version 2\n + * 1 : using IGMP version 1\n + * This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = + * It configures the version for IGMP messages (Join/Leave/Report). + */ +#define Sn_MR_MMB Sn_MR_ND + +/** + * @brief IPv6 packet Blocking in @ref Sn_MR_MACRAW mode + * @details 0 : disable IPv6 Blocking\n + * 1 : enable IPv6 Blocking\n + * This bit is applied only during MACRAW mode (P[3:0] = 100. It blocks to receiving the IPv6 packet. + */ +#define Sn_MR_MIP6B Sn_MR_UCASTB + +/* Sn_MR value used with Sn_MR_UDP & Sn_MR_MULTI */ +/** + * @brief IGMP version used in UDP mulitcasting + * @details 0 : disable Multicast Blocking\n + * 1 : enable Multicast Blocking\n + * This bit is applied only when MACRAW mode(P[3:0] = 100. It blocks to receive the packet with multicast MAC address. + */ +#define Sn_MR_MC Sn_MR_ND + +/* Sn_MR alternate values */ +/** + * @brief For Berkeley Socket API + */ +#define SOCK_STREAM Sn_MR_TCP + +/** + * @brief For Berkeley Socket API + */ +#define SOCK_DGRAM Sn_MR_UDP + + +/* Sn_CR values */ +/** + * @brief Initialize or open socket + * @details Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0). + * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n + * + * + * + * + * + * + *
\b Sn_MR (P[3:0]) \b Sn_SR
Sn_MR_CLOSE (000
Sn_MR_TCP (001 SOCK_INIT (0x13)
Sn_MR_UDP (010 SOCK_UDP (0x22)
S0_MR_MACRAW (100 SOCK_MACRAW (0x02)
+ */ +#define Sn_CR_OPEN 0x01 + +/** + * @brief Wait connection request in TCP mode(Server mode) + * @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP). + * In this mode, Socket n operates as a �TCP serverand waits for connection-request (SYN packet) from any �TCP client + * The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN. + * When a �TCP clientconnection request is successfully established, + * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes + * But when a �TCP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED. + */ +#define Sn_CR_LISTEN 0x02 + +/** + * @brief Send connection request in TCP mode(Client mode) + * @details To connect, a connect-request (SYN packet) is sent to b>TCP serverconfigured by @ref Sn_DIPR & Sn_DPORT(destination address & port). + * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n + * The connect-request fails in the following three cases.\n + * 1. When a @b ARPTO occurs (@ref Sn_IR[3] = ) because destination hardware address is not acquired through the ARP-process.\n + * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) = )\n + * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED. + * @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client + */ +#define Sn_CR_CONNECT 0x04 + +/** + * @brief Send closing request in TCP mode + * @details Regardless of b>TCP serveror b>TCP client the DISCON command processes the disconnect-process (b>Active closeor b>Passive close.\n + * @par Active close + * it transmits disconnect-request(FIN packet) to the connected peer\n + * @par Passive close + * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n + * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n + * Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED. + * @note Valid only in TCP mode. + */ +#define Sn_CR_DISCON 0x08 + +/** + * @brief Close socket + * @details Sn_SR is changed to @ref SOCK_CLOSED. + */ +#define Sn_CR_CLOSE 0x10 + +/** + * @brief Update TX buffer pointer and send data + * @details SEND transmits all the data in the Socket n TX buffer.\n + * For more details, please refer to Socket n TX Free Size Register (@ref Sn_TX_FSR), Socket n, + * TX Write Pointer Register(@ref Sn_TX_WR), and Socket n TX Read Pointer Register(@ref Sn_TX_RD). + */ +#define Sn_CR_SEND 0x20 + +/** + * @brief Send data with MAC address, so without ARP process + * @details The basic operation is same as SEND.\n + * Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).\n + * But SEND_MAC transmits data without the automatic ARP-process.\n + * In this case, the destination hardware address is acquired from @ref Sn_DHAR configured by host, instead of APR-process. + * @note Valid only in UDP mode. + */ +#define Sn_CR_SEND_MAC 0x21 + +/** + * @brief Send keep alive message + * @details It checks the connection status by sending 1byte keep-alive packet.\n + * If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur. + * @note Valid only in TCP mode. + */ +#define Sn_CR_SEND_KEEP 0x22 + +/** + * @brief Update RX buffer pointer and receive data + * @details RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (@ref Sn_RX_RD).\n + * For more details, refer to Socket n RX Received Size Register (@ref Sn_RX_RSR), Socket n RX Write Pointer Register (@ref Sn_RX_WR), + * and Socket n RX Read Pointer Register (@ref Sn_RX_RD). + */ +#define Sn_CR_RECV 0x40 + +/* Sn_IR values */ +/** + * @brief SEND_OK Interrupt + * @details This is issued when SEND command is completed. + */ +#define Sn_IR_SENDOK 0x10 + +/** + * @brief TIMEOUT Interrupt + * @details This is issued when ARPTO or TCPTO occurs. + */ +#define Sn_IR_TIMEOUT 0x08 + +/** + * @brief RECV Interrupt + * @details This is issued whenever data is received from a peer. + */ +#define Sn_IR_RECV 0x04 + +/** + * @brief DISCON Interrupt + * @details This is issued when FIN or FIN/ACK packet is received from a peer. + */ +#define Sn_IR_DISCON 0x02 + +/** + * @brief CON Interrupt + * @details This is issued one time when the connection with peer is successful and then @ref Sn_SR is changed to @ref SOCK_ESTABLISHED. + */ +#define Sn_IR_CON 0x01 + +/* Sn_SR values */ +/** + * @brief Closed + * @details This indicates that Socket n is released.\N + * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status. + */ +#define SOCK_CLOSED 0x00 + +/** + * @brief Initiate state + * @details This indicates Socket n is opened with TCP mode.\N + * It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N + * After @ref SOCK_INIT, user can use LISTEN /CONNECT command. + */ +#define SOCK_INIT 0x13 + +/** + * @brief Listen state + * @details This indicates Socket n is operating as b>TCP servermode and waiting for connection-request (SYN packet) from a peer (b>TCP client.\n + * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n + * Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = . + */ +#define SOCK_LISTEN 0x14 + +/** + * @brief Connection state + * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n + * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n + * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n + * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] = is occurred. + */ +#define SOCK_SYNSENT 0x15 + +/** + * @brief Connection state + * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n + * If socket n sends the response (SYN/ACK packet) to the peer successfully, it changes to @ref SOCK_ESTABLISHED. \n + * If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = . + */ +#define SOCK_SYNRECV 0x16 + +/** + * @brief Success to connect + * @details This indicates the status of the connection of Socket n.\n + * It changes to @ref SOCK_ESTABLISHED when the b>TCP SERVERprocessed the SYN packet from the b>TCP CLIENTduring @ref SOCK_LISTEN, or + * when the CONNECT command is successful.\n + * During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command. + */ +#define SOCK_ESTABLISHED 0x17 + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_FIN_WAIT 0x18 + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_CLOSING 0x1A + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_TIME_WAIT 0x1B + +/** + * @brief Closing state + * @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n + * This is half-closing status, and data can be transferred.\n + * For full-closing, DISCON command is used. But For just-closing, CLOSE command is used. + */ +#define SOCK_CLOSE_WAIT 0x1C + +/** + * @brief Closing state + * @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n + * It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs (@ref Sn_IR[TIMEOUT] = . + */ +#define SOCK_LAST_ACK 0x1D + +/** + * @brief UDP socket + * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010.\n + * It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n + * Unlike TCP mode, data can be transfered without the connection-process. + */ +#define SOCK_UDP 0x22 + +//#define SOCK_IPRAW 0x32 /**< IP raw mode socket */ + +/** + * @brief MAC raw mode socket + * @details This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.\n + * It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100and OPEN command is ordered.\n + * Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process. + */ +#define SOCK_MACRAW 0x42 + +//#define SOCK_PPPOE 0x5F + +/* IP PROTOCOL */ +#define IPPROTO_IP 0 //< Dummy for IP +#define IPPROTO_ICMP 1 //< Control message protocol +#define IPPROTO_IGMP 2 //< Internet group management protocol +#define IPPROTO_GGP 3 //< Gateway^2 (deprecated) +#define IPPROTO_TCP 6 //< TCP +#define IPPROTO_PUP 12 //< PUP +#define IPPROTO_UDP 17 //< UDP +#define IPPROTO_IDP 22 //< XNS idp +#define IPPROTO_ND 77 //< UNOFFICIAL net disk protocol +#define IPPROTO_RAW 255 //< Raw IP packet + + +/** + * @brief Enter a critical section + * + * @details It is provided to protect your shared code which are executed without distribution. \n \n + * + * In non-OS environment, It can be just implemented by disabling whole interrupt.\n + * In OS environment, You can replace it to critical section api supported by OS. + * + * \sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() + * \sa WIZCHIP_CRITICAL_EXIT() + */ +#define WIZCHIP_CRITICAL_ENTER() WIZCHIP.CRIS._enter() + +/** + * @brief Exit a critical section + * + * @details It is provided to protect your shared code which are executed without distribution. \n\n + * + * In non-OS environment, It can be just implemented by disabling whole interrupt. \n + * In OS environment, You can replace it to critical section api supported by OS. + * + * @sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() + * @sa WIZCHIP_CRITICAL_ENTER() + */ +#ifdef _exit +#undef _exit +#endif +#define WIZCHIP_CRITICAL_EXIT() WIZCHIP.CRIS._exit() + + + +//////////////////////// +// Basic I/O Function // +//////////////////////// + +/** + * @ingroup Basic_IO_function + * @brief It reads 1 byte value from a register. + * @param AddrSel Register address + * @return The value of register + */ +uint8_t WIZCHIP_READ (uint32_t AddrSel); + +/** + * @ingroup Basic_IO_function + * @brief It writes 1 byte value to a register. + * @param AddrSel Register address + * @param wb Write data + * @return void + */ +void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb ); + +/** + * @ingroup Basic_IO_function + * @brief It reads sequence data from registers. + * @param AddrSel Register address + * @param pBuf Pointer buffer to read data + * @param len Data length + */ +void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It writes sequence data to registers. + * @param AddrSel Register address + * @param pBuf Pointer buffer to write data + * @param len Data length + */ +void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len); + +///////////////////////////////// +// Common Register I/O function // +///////////////////////////////// +/** + * @ingroup Common_register_access_function + * @brief Set Mode Register + * @param (uint8_t)mr The value to be set. + * @sa getMR() + */ +#define setMR(mr) \ + WIZCHIP_WRITE(MR,mr) + + +/** + * @ingroup Common_register_access_function + * @brief Get Mode Register + * @return uint8_t. The value of Mode register. + * @sa setMR() + */ +#define getMR() \ + WIZCHIP_READ(MR) + +/** + * @ingroup Common_register_access_function + * @brief Set gateway IP address + * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes. + * @sa getGAR() + */ +#define setGAR(gar) \ + WIZCHIP_WRITE_BUF(GAR,gar,4) + +/** + * @ingroup Common_register_access_function + * @brief Get gateway IP address + * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes. + * @sa setGAR() + */ +#define getGAR(gar) \ + WIZCHIP_READ_BUF(GAR,gar,4) + +/** + * @ingroup Common_register_access_function + * @brief Set subnet mask address + * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes. + * @sa getSUBR() + */ +#define setSUBR(subr) \ + WIZCHIP_WRITE_BUF(SUBR, subr,4) + + +/** + * @ingroup Common_register_access_function + * @brief Get subnet mask address + * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes. + * @sa setSUBR() + */ +#define getSUBR(subr) \ + WIZCHIP_READ_BUF(SUBR, subr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Set local MAC address + * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes. + * @sa getSHAR() + */ +#define setSHAR(shar) \ + WIZCHIP_WRITE_BUF(SHAR, shar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Get local MAC address + * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes. + * @sa setSHAR() + */ +#define getSHAR(shar) \ + WIZCHIP_READ_BUF(SHAR, shar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Set local IP address + * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes. + * @sa getSIPR() + */ +#define setSIPR(sipr) \ + WIZCHIP_WRITE_BUF(SIPR, sipr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Get local IP address + * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes. + * @sa setSIPR() + */ +#define getSIPR(sipr) \ + WIZCHIP_READ_BUF(SIPR, sipr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Set INTLEVEL register + * @param (uint16_t)intlevel Value to set @ref INTLEVEL register. + * @sa getINTLEVEL() + */ +// dpgeorge: not yet implemented +#define setINTLEVEL(intlevel) (void)intlevel +#if 0 +#define setINTLEVEL(intlevel) {\ + WIZCHIP_WRITE(INTLEVEL, (uint8_t)(intlevel >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(INTLEVEL,1), (uint8_t) intlevel); \ + } +#endif + + +/** + * @ingroup Common_register_access_function + * @brief Get INTLEVEL register + * @return uint16_t. Value of @ref INTLEVEL register. + * @sa setINTLEVEL() + */ +// dpgeorge: not yet implemented +#define getINTLEVEL() (0) +#if 0 +#define getINTLEVEL() \ + ((WIZCHIP_READ(INTLEVEL) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(INTLEVEL,1))) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Set @ref IR register + * @param (uint8_t)ir Value to set @ref IR register. + * @sa getIR() + */ +#define setIR(ir) \ + WIZCHIP_WRITE(IR, (ir & 0xF0)) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref IR register + * @return uint8_t. Value of @ref IR register. + * @sa setIR() + */ +#define getIR() \ + (WIZCHIP_READ(IR) & 0xF0) +/** + * @ingroup Common_register_access_function + * @brief Set @ref IMR register + * @param (uint8_t)imr Value to set @ref IMR register. + * @sa getIMR() + */ +#define setIMR(imr) \ + WIZCHIP_WRITE(IMR, imr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref IMR register + * @return uint8_t. Value of @ref IMR register. + * @sa setIMR() + */ +#define getIMR() \ + WIZCHIP_READ(IMR) + + +/** + * @ingroup Common_register_access_function + * @brief Set @ref SIR register + * @param (uint8_t)sir Value to set @ref SIR register. + * @sa getSIR() + */ +// dpgeorge: not yet implemented +#define setSIR(sir) ((void)sir) +#if 0 +#define setSIR(sir) \ + WIZCHIP_WRITE(SIR, sir) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Get @ref SIR register + * @return uint8_t. Value of @ref SIR register. + * @sa setSIR() + */ +// dpgeorge: not yet implemented +#define getSIR() (0) +#if 0 +#define getSIR() \ + WIZCHIP_READ(SIR) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Set @ref SIMR register + * @param (uint8_t)simr Value to set @ref SIMR register. + * @sa getSIMR() + */ +// dpgeorge: not yet implemented +#define setSIMR(simr) ((void)simr) +#if 0 +#define setSIMR(simr) \ + WIZCHIP_WRITE(SIMR, simr) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Get @ref SIMR register + * @return uint8_t. Value of @ref SIMR register. + * @sa setSIMR() + */ +// dpgeorge: not yet implemented +#define getSIMR() (0) +#if 0 +#define getSIMR() \ + WIZCHIP_READ(SIMR) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Set @ref RTR register + * @param (uint16_t)rtr Value to set @ref RTR register. + * @sa getRTR() + */ +#define setRTR(rtr) {\ + WIZCHIP_WRITE(RTR, (uint8_t)(rtr >> 8)); \ + WIZCHIP_WRITE(RTR + 1, (uint8_t) rtr); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref RTR register + * @return uint16_t. Value of @ref RTR register. + * @sa setRTR() + */ +#define getRTR() \ + ((WIZCHIP_READ(RTR) << 8) + WIZCHIP_READ(RTR + 1)) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref RCR register + * @param (uint8_t)rcr Value to set @ref RCR register. + * @sa getRCR() + */ +#define setRCR(rcr) \ + WIZCHIP_WRITE(RCR, rcr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref RCR register + * @return uint8_t. Value of @ref RCR register. + * @sa setRCR() + */ +#define getRCR() \ + WIZCHIP_READ(RCR) + +//================================================== test done =========================================================== + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PTIMER register + * @param (uint8_t)ptimer Value to set @ref PTIMER register. + * @sa getPTIMER() + */ +#define setPTIMER(ptimer) \ + WIZCHIP_WRITE(PTIMER, ptimer) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PTIMER register + * @return uint8_t. Value of @ref PTIMER register. + * @sa setPTIMER() + */ +#define getPTIMER() \ + WIZCHIP_READ(PTIMER) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PMAGIC register + * @param (uint8_t)pmagic Value to set @ref PMAGIC register. + * @sa getPMAGIC() + */ +#define setPMAGIC(pmagic) \ + WIZCHIP_WRITE(PMAGIC, pmagic) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PMAGIC register + * @return uint8_t. Value of @ref PMAGIC register. + * @sa setPMAGIC() + */ +#define getPMAGIC() \ + WIZCHIP_READ(PMAGIC) + +/** + * @ingroup Common_register_access_function + * @brief Set PHAR address + * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes. + * @sa getPHAR() + */ +#if 0 +#define setPHAR(phar) \ + WIZCHIP_WRITE_BUF(PHAR, phar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Get local IP address + * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes. + * @sa setPHAR() + */ +#define getPHAR(phar) \ + WIZCHIP_READ_BUF(PHAR, phar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PSID register + * @param (uint16_t)psid Value to set @ref PSID register. + * @sa getPSID() + */ +#define setPSID(psid) {\ + WIZCHIP_WRITE(PSID, (uint8_t)(psid >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PSID,1), (uint8_t) psid); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PSID register + * @return uint16_t. Value of @ref PSID register. + * @sa setPSID() + */ +//uint16_t getPSID(void); +#define getPSID() \ + ((WIZCHIP_READ(PSID) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PSID,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PMRU register + * @param (uint16_t)pmru Value to set @ref PMRU register. + * @sa getPMRU() + */ +#define setPMRU(pmru) { \ + WIZCHIP_WRITE(PMRU, (uint8_t)(pmru>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PMRU,1), (uint8_t) pmru); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PMRU register + * @return uint16_t. Value of @ref PMRU register. + * @sa setPMRU() + */ +#define getPMRU() \ + ((WIZCHIP_READ(PMRU) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PMRU,1))) + +/** + * @ingroup Common_register_access_function + * @brief Get unreachable IP address + * @param (uint8_t*)uipr Pointer variable to get unreachable IP address. It should be allocated 4 bytes. + */ +#define getUIPR(uipr) \ + WIZCHIP_READ_BUF(UIPR,uipr,6) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref UPORTR register + * @return uint16_t. Value of @ref UPORTR register. + */ +#define getUPORTR() \ + ((WIZCHIP_READ(UPORTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(UPORTR,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PHYCFGR register + * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register. + * @sa getPHYCFGR() + */ +#define setPHYCFGR(phycfgr) \ + WIZCHIP_WRITE(PHYCFGR, phycfgr) +#endif + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PHYCFGR register + * @return uint8_t. Value of @ref PHYCFGR register. + * @sa setPHYCFGR() + */ +#define getPHYSTATUS() \ + WIZCHIP_READ(PHYSTATUS) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref VERSIONR register + * @return uint8_t. Value of @ref VERSIONR register. + */ +/* +#define getVERSIONR() \ + WIZCHIP_READ(VERSIONR) + */ +///////////////////////////////////// + +/////////////////////////////////// +// Socket N register I/O function // +/////////////////////////////////// +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)mr Value to set @ref Sn_MR + * @sa getSn_MR() + */ +#define setSn_MR(sn, mr) \ + WIZCHIP_WRITE(Sn_MR(sn),mr) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_MR. + * @sa setSn_MR() + */ +#define getSn_MR(sn) \ + WIZCHIP_READ(Sn_MR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_CR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)cr Value to set @ref Sn_CR + * @sa getSn_CR() + */ +#define setSn_CR(sn, cr) \ + WIZCHIP_WRITE(Sn_CR(sn), cr) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_CR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_CR. + * @sa setSn_CR() + */ +#define getSn_CR(sn) \ + WIZCHIP_READ(Sn_CR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_IR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)ir Value to set @ref Sn_IR + * @sa getSn_IR() + */ +#define setSn_IR(sn, ir) \ + WIZCHIP_WRITE(Sn_IR(sn), (ir & 0x1F)) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_IR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_IR. + * @sa setSn_IR() + */ +#define getSn_IR(sn) \ + (WIZCHIP_READ(Sn_IR(sn)) & 0x1F) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_IMR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)imr Value to set @ref Sn_IMR + * @sa getSn_IMR() + */ +// dpgeorge: not yet implemented +#define setSn_IMR(sn, imr) (void)sn; (void)imr +#if 0 +#define setSn_IMR(sn, imr) \ + WIZCHIP_WRITE(Sn_IMR(sn), (imr & 0x1F)) +#endif + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_IMR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_IMR. + * @sa setSn_IMR() + */ +// dpgeorge: not yet implemented +#define getSn_IMR(sn) (0) +#if 0 +#define getSn_IMR(sn) \ + (WIZCHIP_READ(Sn_IMR(sn)) & 0x1F) +#endif + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_SR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_SR. + */ +#define getSn_SR(sn) \ + WIZCHIP_READ(Sn_SR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_PORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)port Value to set @ref Sn_PORT. + * @sa getSn_PORT() + */ +#define setSn_PORT(sn, port) { \ + WIZCHIP_WRITE(Sn_PORT(sn), (uint8_t)(port >> 8)); \ + WIZCHIP_WRITE(Sn_PORT(sn) + 1, (uint8_t) port); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_PORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_PORT. + * @sa setSn_PORT() + */ +#define getSn_PORT(sn) \ + ((WIZCHIP_READ(Sn_PORT(sn)) << 8) | WIZCHIP_READ(Sn_PORT(sn) + 1)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DHAR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes. + * @sa getSn_DHAR() + */ +#define setSn_DHAR(sn, dhar) \ + WIZCHIP_WRITE_BUF(Sn_DHAR(sn), dhar, 6) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes. + * @sa setSn_DHAR() + */ +#define getSn_DHAR(sn, dhar) \ + WIZCHIP_READ_BUF(Sn_DHAR(sn), dhar, 6) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DIPR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes. + * @sa getSn_DIPR() + */ +#define setSn_DIPR(sn, dipr) \ + WIZCHIP_WRITE_BUF(Sn_DIPR(sn), dipr, 4) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_DIPR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes. + * @sa SetSn_DIPR() + */ +#define getSn_DIPR(sn, dipr) \ + WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DPORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)dport Value to set @ref Sn_DPORT + * @sa getSn_DPORT() + */ +#define setSn_DPORT(sn, dport) { \ + WIZCHIP_WRITE(Sn_DPORT(sn), (uint8_t) (dport>>8)); \ + WIZCHIP_WRITE(Sn_DPORT(sn) + 1, (uint8_t) dport); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_DPORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_DPORT. + * @sa setSn_DPORT() + */ +#define getSn_DPORT(sn) \ + ((WIZCHIP_READ(Sn_DPORT(sn)) << 8) + WIZCHIP_READ((Sn_DPORT(sn)+1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_MSSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)mss Value to set @ref Sn_MSSR + * @sa setSn_MSSR() + */ +#define setSn_MSSR(sn, mss) { \ + WIZCHIP_WRITE(Sn_MSSR(sn), (uint8_t)(mss>>8)); \ + WIZCHIP_WRITE((Sn_MSSR(sn)+1), (uint8_t) mss); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MSSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_MSSR. + * @sa setSn_MSSR() + */ +#define getSn_MSSR(sn) \ + ((WIZCHIP_READ(Sn_MSSR(sn)) << 8) + WIZCHIP_READ((Sn_MSSR(sn)+1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TOS register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)tos Value to set @ref Sn_TOS + * @sa getSn_TOS() + */ +#define setSn_TOS(sn, tos) \ + WIZCHIP_WRITE(Sn_TOS(sn), tos) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TOS register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of Sn_TOS. + * @sa setSn_TOS() + */ +#define getSn_TOS(sn) \ + WIZCHIP_READ(Sn_TOS(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TTL register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)ttl Value to set @ref Sn_TTL + * @sa getSn_TTL() + */ +#define setSn_TTL(sn, ttl) \ + WIZCHIP_WRITE(Sn_TTL(sn), ttl) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TTL register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_TTL. + * @sa setSn_TTL() + */ +#define getSn_TTL(sn) \ + WIZCHIP_READ(Sn_TTL(sn)) + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_RXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE + * @sa getSn_RXBUF_SIZE() + */ +#define setSn_RXBUF_SIZE(sn, rxbufsize) \ + WIZCHIP_WRITE(Sn_RXBUF_SIZE(sn),rxbufsize) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_RXBUF_SIZE. + * @sa setSn_RXBUF_SIZE() + */ +#define getSn_RXBUF_SIZE(sn) \ + WIZCHIP_READ(Sn_RXBUF_SIZE(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE + * @sa getSn_TXBUF_SIZE() + */ +#define setSn_TXBUF_SIZE(sn, txbufsize) \ + WIZCHIP_WRITE(Sn_TXBUF_SIZE(sn), txbufsize) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_TXBUF_SIZE. + * @sa setSn_TXBUF_SIZE() + */ +#define getSn_TXBUF_SIZE(sn) \ + WIZCHIP_READ(Sn_TXBUF_SIZE(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_FSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_FSR. + */ +uint16_t getSn_TX_FSR(uint8_t sn); + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_RD. + */ +#define getSn_TX_RD(sn) \ + ((WIZCHIP_READ(Sn_TX_RD(sn)) << 8) + WIZCHIP_READ((Sn_TX_RD(sn)+1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)txwr Value to set @ref Sn_TX_WR + * @sa GetSn_TX_WR() + */ +#define setSn_TX_WR(sn, txwr) { \ + WIZCHIP_WRITE(Sn_TX_WR(sn), (uint8_t)(txwr>>8)); \ + WIZCHIP_WRITE((Sn_TX_WR(sn)+1), (uint8_t) txwr); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_WR. + * @sa setSn_TX_WR() + */ +#define getSn_TX_WR(sn) \ + ((WIZCHIP_READ(Sn_TX_WR(sn)) << 8) + WIZCHIP_READ((Sn_TX_WR(sn)+1))) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_RSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_RX_RSR. + */ +uint16_t getSn_RX_RSR(uint8_t sn); + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_RX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD + * @sa getSn_RX_RD() + */ +#define setSn_RX_RD(sn, rxrd) { \ + WIZCHIP_WRITE(Sn_RX_RD(sn), (uint8_t)(rxrd>>8)); \ + WIZCHIP_WRITE((Sn_RX_RD(sn)+1), (uint8_t) rxrd); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @regurn uint16_t. Value of @ref Sn_RX_RD. + * @sa setSn_RX_RD() + */ +#define getSn_RX_RD(sn) \ + ((WIZCHIP_READ(Sn_RX_RD(sn)) << 8) + WIZCHIP_READ((Sn_RX_RD(sn)+1))) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_RX_WR. + */ +#define getSn_RX_WR(sn) \ + ((WIZCHIP_READ(Sn_RX_WR(sn)) << 8) + WIZCHIP_READ((Sn_RX_WR(sn)+1))) + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_FRAG register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)frag Value to set @ref Sn_FRAG + * @sa getSn_FRAD() + */ +#if 0 // dpgeorge +#define setSn_FRAG(sn, frag) { \ + WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1), (uint8_t) frag); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_FRAG register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_FRAG. + * @sa setSn_FRAG() + */ +#define getSn_FRAG(sn) \ + ((WIZCHIP_READ(Sn_FRAG(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_KPALVTR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)kpalvt Value to set @ref Sn_KPALVTR + * @sa getSn_KPALVTR() + */ +#define setSn_KPALVTR(sn, kpalvt) \ + WIZCHIP_WRITE(Sn_KPALVTR(sn), kpalvt) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_KPALVTR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_KPALVTR. + * @sa setSn_KPALVTR() + */ +#define getSn_KPALVTR(sn) \ + WIZCHIP_READ(Sn_KPALVTR(sn)) + +////////////////////////////////////// +#endif + +///////////////////////////////////// +// Sn_TXBUF & Sn_RXBUF IO function // +///////////////////////////////////// +/** + * @brief Gets the max buffer size of socket sn passed as parameter. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of Socket n RX max buffer size. + */ +#define getSn_RxMAX(sn) \ + (getSn_RXBUF_SIZE(sn) << 10) + +/** + * @brief Gets the max buffer size of socket sn passed as parameters. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of Socket n TX max buffer size. + */ +//uint16_t getSn_TxMAX(uint8_t sn); +#define getSn_TxMAX(sn) \ + (getSn_TXBUF_SIZE(sn) << 10) + +void wiz_init(void); + +/** + * @ingroup Basic_IO_function + * @brief It copies data to internal TX memory + * + * @details This function reads the Tx write pointer register and after that, + * it copies the wizdata(pointer buffer) of the length of len(variable) bytes to internal TX memory + * and updates the Tx write pointer register. + * This function is being called by send() and sendto() function also. + * + * @note User should read upper byte first and lower byte later to get proper value. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param wizdata Pointer buffer to write data + * @param len Data length + * @sa wiz_recv_data() + */ +void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It copies data to your buffer from internal RX memory + * + * @details This function read the Rx read pointer register and after that, + * it copies the received data from internal RX memory + * to wizdata(pointer variable) of the length of len(variable) bytes. + * This function is being called by recv() also. + * + * @note User should read upper byte first and lower byte later to get proper value. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param wizdata Pointer buffer to read data + * @param len Data length + * @sa wiz_send_data() + */ +void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It discard the received data in RX memory. + * @details It discards the data of the length of len(variable) bytes in internal RX memory. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param len Data length + */ +void wiz_recv_ignore(uint8_t sn, uint16_t len); + +#endif // _W5500_H_ diff --git a/drivers/wiznet5k/ethernet/w5500/w5500.c b/drivers/wiznet5k/ethernet/w5500/w5500.c new file mode 100644 index 0000000000000..3107b1b71aa39 --- /dev/null +++ b/drivers/wiznet5k/ethernet/w5500/w5500.c @@ -0,0 +1,247 @@ +//***************************************************************************** +// +//! \file w5500.c +//! \brief W5500 HAL Interface. +//! \version 1.0.1 +//! \date 2013/10/21 +//! \par Revision history +//! <2014/05/01> V1.0.2 +//! 1. Implicit type casting -> Explicit type casting. Refer to M20140501 +//! Fixed the problem on porting into under 32bit MCU +//! Issued by Mathias ClauBen, wizwiki forum ID Think01 and bobh +//! Thank for your interesting and serious advices. +//! <2013/10/21> 1st Release +//! <2013/12/20> V1.0.1 +//! 1. Remove warning +//! 2. WIZCHIP_READ_BUF WIZCHIP_WRITE_BUF in case _WIZCHIP_IO_MODE_SPI_FDM_ +//! for loop optimized(removed). refer to M20131220 +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** +//#include +#include "w5500.h" + +#define _W5500_SPI_VDM_OP_ 0x00 +#define _W5500_SPI_FDM_OP_LEN1_ 0x01 +#define _W5500_SPI_FDM_OP_LEN2_ 0x02 +#define _W5500_SPI_FDM_OP_LEN4_ 0x03 + +//////////////////////////////////////////////////// + +#define LPC_SSP0 (0) + +static void Chip_SSP_ReadFrames_Blocking(int dummy, uint8_t *buf, uint32_t len) { + WIZCHIP.IF.SPI._read_bytes(buf, len); +} + +static void Chip_SSP_WriteFrames_Blocking(int dummy, const uint8_t *buf, uint32_t len) { + WIZCHIP.IF.SPI._write_bytes(buf, len); +} + +uint8_t WIZCHIP_READ(uint32_t AddrSel) +{ + uint8_t ret; + uint8_t spi_data[3]; + + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_); + + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0); + //ret = WIZCHIP.IF.SPI._read_byte(); + spi_data[0] = (AddrSel & 0x00FF0000) >> 16; + spi_data[1] = (AddrSel & 0x0000FF00) >> 8; + spi_data[2] = (AddrSel & 0x000000FF) >> 0; + Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3); + Chip_SSP_ReadFrames_Blocking(LPC_SSP0, &ret, 1); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); + return ret; +} + +void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb ) +{ + uint8_t spi_data[4]; + + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_); + + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0); + //WIZCHIP.IF.SPI._write_byte(wb); + spi_data[0] = (AddrSel & 0x00FF0000) >> 16; + spi_data[1] = (AddrSel & 0x0000FF00) >> 8; + spi_data[2] = (AddrSel & 0x000000FF) >> 0; + spi_data[3] = wb; + Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 4); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + +void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len) +{ + uint8_t spi_data[3]; + //uint16_t i; + + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_); + + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0); + //for(i = 0; i < len; i++) + // pBuf[i] = WIZCHIP.IF.SPI._read_byte(); + spi_data[0] = (AddrSel & 0x00FF0000) >> 16; + spi_data[1] = (AddrSel & 0x0000FF00) >> 8; + spi_data[2] = (AddrSel & 0x000000FF) >> 0; + Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3); + Chip_SSP_ReadFrames_Blocking(LPC_SSP0, pBuf, len); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + +void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len) +{ + uint8_t spi_data[3]; + //uint16_t i; + + WIZCHIP_CRITICAL_ENTER(); + WIZCHIP.CS._select(); + + AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_); + + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8); + //WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0); + //for(i = 0; i < len; i++) + // WIZCHIP.IF.SPI._write_byte(pBuf[i]); + spi_data[0] = (AddrSel & 0x00FF0000) >> 16; + spi_data[1] = (AddrSel & 0x0000FF00) >> 8; + spi_data[2] = (AddrSel & 0x000000FF) >> 0; + Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3); + Chip_SSP_WriteFrames_Blocking(LPC_SSP0, pBuf, len); + + WIZCHIP.CS._deselect(); + WIZCHIP_CRITICAL_EXIT(); +} + + +uint16_t getSn_TX_FSR(uint8_t sn) +{ + uint16_t val=0,val1=0; + + do + { + val1 = WIZCHIP_READ(Sn_TX_FSR(sn)); + val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1)); + if (val1 != 0) + { + val = WIZCHIP_READ(Sn_TX_FSR(sn)); + val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1)); + } + }while (val != val1); + return val; +} + + +uint16_t getSn_RX_RSR(uint8_t sn) +{ + uint16_t val=0,val1=0; + + do + { + val1 = WIZCHIP_READ(Sn_RX_RSR(sn)); + val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1)); + if (val1 != 0) + { + val = WIZCHIP_READ(Sn_RX_RSR(sn)); + val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1)); + } + }while (val != val1); + return val; +} + +void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len) +{ + uint16_t ptr = 0; + uint32_t addrsel = 0; + + if(len == 0) return; + ptr = getSn_TX_WR(sn); + //M20140501 : implict type casting -> explict type casting + //addrsel = (ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3); + addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3); + // + WIZCHIP_WRITE_BUF(addrsel,wizdata, len); + + ptr += len; + setSn_TX_WR(sn,ptr); +} + +void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len) +{ + uint16_t ptr = 0; + uint32_t addrsel = 0; + + if(len == 0) return; + ptr = getSn_RX_RD(sn); + //M20140501 : implict type casting -> explict type casting + //addrsel = ((ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3); + addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3); + // + WIZCHIP_READ_BUF(addrsel, wizdata, len); + ptr += len; + + setSn_RX_RD(sn,ptr); +} + + +void wiz_recv_ignore(uint8_t sn, uint16_t len) +{ + uint16_t ptr = 0; + + ptr = getSn_RX_RD(sn); + ptr += len; + setSn_RX_RD(sn,ptr); +} + diff --git a/drivers/wiznet5k/ethernet/w5500/w5500.h b/drivers/wiznet5k/ethernet/w5500/w5500.h new file mode 100644 index 0000000000000..c2afb180ebbad --- /dev/null +++ b/drivers/wiznet5k/ethernet/w5500/w5500.h @@ -0,0 +1,2057 @@ +//***************************************************************************** +// +//! \file w5500.h +//! \brief W5500 HAL Header File. +//! \version 1.0.0 +//! \date 2013/10/21 +//! \par Revision history +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#ifndef _W5500_H_ +#define _W5500_H_ + +#include +#include "../wizchip_conf.h" + +#define _W5500_IO_BASE_ 0x00000000 + +#define _W5500_SPI_READ_ (0x00 << 2) //< SPI interface Read operation in Control Phase +#define _W5500_SPI_WRITE_ (0x01 << 2) //< SPI interface Write operation in Control Phase + +#define WIZCHIP_CREG_BLOCK 0x00 //< Common register block +#define WIZCHIP_SREG_BLOCK(N) (1+4*N) //< Socket N register block +#define WIZCHIP_TXBUF_BLOCK(N) (2+4*N) //< Socket N Tx buffer address block +#define WIZCHIP_RXBUF_BLOCK(N) (3+4*N) //< Socket N Rx buffer address block + +#define WIZCHIP_OFFSET_INC(ADDR, N) (ADDR + (N<<8)) //< Increase offset address + + +/////////////////////////////////////// +// Definition For Legacy Chip Driver // +/////////////////////////////////////// +#define IINCHIP_READ(ADDR) WIZCHIP_READ(ADDR) ///< The defined for legacy chip driver +#define IINCHIP_WRITE(ADDR,VAL) WIZCHIP_WRITE(ADDR,VAL) ///< The defined for legacy chip driver +#define IINCHIP_READ_BUF(ADDR,BUF,LEN) WIZCHIP_READ_BUF(ADDR,BUF,LEN) ///< The defined for legacy chip driver +#define IINCHIP_WRITE_BUF(ADDR,BUF,LEN) WIZCHIP_WRITE(ADDR,BUF,LEN) ///< The defined for legacy chip driver + +////////////////////////////// +//-------------------------- defgroup --------------------------------- +/** + * @defgroup W5500 W5500 + * + * @brief WHIZCHIP register defines and I/O functions of @b W5500. + * + * - @ref WIZCHIP_register : @ref Common_register_group and @ref Socket_register_group + * - @ref WIZCHIP_IO_Functions : @ref Basic_IO_function, @ref Common_register_access_function and @ref Socket_register_access_function + */ + + +/** + * @defgroup WIZCHIP_register WIZCHIP register + * @ingroup W5500 + * + * @brief WHIZCHIP register defines register group of @b W5500. + * + * - @ref Common_register_group : Common register group + * - @ref Socket_register_group : \c SOCKET n register group + */ + + +/** + * @defgroup WIZCHIP_IO_Functions WIZCHIP I/O functions + * @ingroup W5500 + * + * @brief This supports the basic I/O functions for @ref WIZCHIP_register. + * + * - Basic I/O function \n + * WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() \n\n + * + * - @ref Common_register_group access functions \n + * -# @b Mode \n + * getMR(), setMR() + * -# @b Interrupt \n + * getIR(), setIR(), getIMR(), setIMR(), getSIR(), setSIR(), getSIMR(), setSIMR(), getINTLEVEL(), setINTLEVEL() + * -# Network Information \n + * getSHAR(), setSHAR(), getGAR(), setGAR(), getSUBR(), setSUBR(), getSIPR(), setSIPR() + * -# @b Retransmission \n + * getRCR(), setRCR(), getRTR(), setRTR() + * -# @b PPPoE \n + * getPTIMER(), setPTIMER(), getPMAGIC(), getPMAGIC(), getPSID(), setPSID(), getPHAR(), setPHAR(), getPMRU(), setPMRU() + * -# ICMP packet \n + * getUIPR(), getUPORTR() + * -# @b etc. \n + * getPHYCFGR(), setPHYCFGR(), getVERSIONR() \n\n + * + * - \ref Socket_register_group access functions \n + * -# SOCKET control \n + * getSn_MR(), setSn_MR(), getSn_CR(), setSn_CR(), getSn_IMR(), setSn_IMR(), getSn_IR(), setSn_IR() + * -# SOCKET information \n + * getSn_SR(), getSn_DHAR(), setSn_DHAR(), getSn_PORT(), setSn_PORT(), getSn_DIPR(), setSn_DIPR(), getSn_DPORT(), setSn_DPORT() + * getSn_MSSR(), setSn_MSSR() + * -# SOCKET communication \n + * getSn_RXBUF_SIZE(), setSn_RXBUF_SIZE(), getSn_TXBUF_SIZE(), setSn_TXBUF_SIZE() \n + * getSn_TX_RD(), getSn_TX_WR(), setSn_TX_WR() \n + * getSn_RX_RD(), setSn_RX_RD(), getSn_RX_WR() \n + * getSn_TX_FSR(), getSn_RX_RSR(), getSn_KPALVTR(), setSn_KPALVTR() + * -# IP header field \n + * getSn_FRAG(), setSn_FRAG(), getSn_TOS(), setSn_TOS() \n + * getSn_TTL(), setSn_TTL() + */ + + + +/** + * @defgroup Common_register_group Common register + * @ingroup WIZCHIP_register + * + * @brief Common register group\n + * It set the basic for the networking\n + * It set the configuration such as interrupt, network information, ICMP, etc. + * @details + * @sa MR : Mode register. + * @sa GAR, SUBR, SHAR, SIPR + * @sa INTLEVEL, IR, IMR, SIR, SIMR : Interrupt. + * @sa RTR, RCR : Data retransmission. + * @sa PTIMER, PMAGIC, PHAR, PSID, PMRU : PPPoE. + * @sa UIPR, UPORTR : ICMP message. + * @sa PHYCFGR, VERSIONR : etc. + */ + + + +/** + * @defgroup Socket_register_group Socket register + * @ingroup WIZCHIP_register + * + * @brief Socket register group.\n + * Socket register configures and control SOCKETn which is necessary to data communication. + * @details + * @sa Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control + * @sa Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information + * @sa Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol. + * @sa Sn_RXBUF_SIZE, Sn_TXBUF_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication + */ + + + + /** + * @defgroup Basic_IO_function Basic I/O function + * @ingroup WIZCHIP_IO_Functions + * @brief These are basic input/output functions to read values from register or write values to register. + */ + +/** + * @defgroup Common_register_access_function Common register access functions + * @ingroup WIZCHIP_IO_Functions + * @brief These are functions to access common registers. + */ + +/** + * @defgroup Socket_register_access_function Socket register access functions + * @ingroup WIZCHIP_IO_Functions + * @brief These are functions to access socket registers. + */ + +//------------------------------- defgroup end -------------------------------------------- +//----------------------------- W5500 Common Registers IOMAP ----------------------------- +/** + * @ingroup Common_register_group + * @brief Mode Register address(R/W)\n + * @ref MR is used for S/W reset, ping block mode, PPPoE mode and etc. + * @details Each bit of @ref MR defined as follows. + * + * + * + *
7 6 5 4 3 2 1 0
RST Reserved WOL PB PPPoE Reserved FARP Reserved
+ * - \ref MR_RST : Reset + * - \ref MR_WOL : Wake on LAN + * - \ref MR_PB : Ping block + * - \ref MR_PPPOE : PPPoE mode + * - \ref MR_FARP : Force ARP mode + */ +#define MR (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Gateway IP Register address(R/W) + * @details @ref GAR configures the default gateway address. + */ +#define GAR (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Subnet mask Register address(R/W) + * @details @ref SUBR configures the subnet mask address. + */ +#define SUBR (_W5500_IO_BASE_ + (0x0005 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Source MAC Register address(R/W) + * @details @ref SHAR configures the source hardware address. + */ +#define SHAR (_W5500_IO_BASE_ + (0x0009 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Source IP Register address(R/W) + * @details @ref SIPR configures the source IP address. + */ +#define SIPR (_W5500_IO_BASE_ + (0x000F << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Set Interrupt low level timer register address(R/W) + * @details @ref INTLEVEL configures the Interrupt Assert Time. + */ +#define INTLEVEL (_W5500_IO_BASE_ + (0x0013 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Interrupt Register(R/W) + * @details @ref IR indicates the interrupt status. Each bit of @ref IR will be still until the bit will be written to by the host. + * If @ref IR is not equal to x00 INTn PIN is asserted to low until it is x00\n\n + * Each bit of @ref IR defined as follows. + * + * + * + *
7 6 5 4 3 2 1 0
CONFLICT UNREACH PPPoE MP Reserved Reserved Reserved Reserved
+ * - \ref IR_CONFLICT : IP conflict + * - \ref IR_UNREACH : Destination unreachable + * - \ref IR_PPPoE : PPPoE connection close + * - \ref IR_MP : Magic packet + */ +#define IR (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Interrupt mask register(R/W) + * @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR. + * When a bit of @ref IMR is and the corresponding bit of @ref IR is an interrupt will be issued. In other words, + * if a bit of @ref IMR is an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n + * Each bit of @ref IMR defined as the following. + * + * + * + *
7 6 5 4 3 2 1 0
IM_IR7 IM_IR6 IM_IR5 IM_IR4 Reserved Reserved Reserved Reserved
+ * - \ref IM_IR7 : IP Conflict Interrupt Mask + * - \ref IM_IR6 : Destination unreachable Interrupt Mask + * - \ref IM_IR5 : PPPoE Close Interrupt Mask + * - \ref IM_IR4 : Magic Packet Interrupt Mask + */ +#define IMR (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Socket Interrupt Register(R/W) + * @details @ref SIR indicates the interrupt status of Socket.\n + * Each bit of @ref SIR be still until @ref Sn_IR is cleared by the host.\n + * If @ref Sn_IR is not equal to x00 the n-th bit of @ref SIR is and INTn PIN is asserted until @ref SIR is x00 */ +#define SIR (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Socket Interrupt Mask Register(R/W) + * @details Each bit of @ref SIMR corresponds to each bit of @ref SIR. + * When a bit of @ref SIMR is and the corresponding bit of @ref SIR is Interrupt will be issued. + * In other words, if a bit of @ref SIMR is an interrupt will be not issued even if the corresponding bit of @ref SIR is + */ +#define SIMR (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Timeout register address( 1 is 100us )(R/W) + * @details @ref RTR configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref RTR is x07D0or 000 + * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref RTR, W5500 waits for the peer response + * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command). + * If the peer does not respond within the @ref RTR time, W5500 retransmits the packet or issues timeout. + */ +#define RTR (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Retry count register(R/W) + * @details @ref RCR configures the number of time of retransmission. + * When retransmission occurs as many as ref RCR+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = . + */ +#define RCR (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP LCP Request Timer register in PPPoE mode(R/W) + * @details @ref PTIMER configures the time for sending LCP echo request. The unit of time is 25ms. + */ +#define PTIMER (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP LCP Magic number register in PPPoE mode(R/W) + * @details @ref PMAGIC configures the 4bytes magic number to be used in LCP negotiation. + */ +#define PMAGIC (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP Destination MAC Register address(R/W) + * @details @ref PHAR configures the PPPoE server hardware address that is acquired during PPPoE connection process. + */ +#define PHAR (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP Session Identification Register(R/W) + * @details @ref PSID configures the PPPoE sever session ID acquired during PPPoE connection process. + */ +#define PSID (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PPP Maximum Segment Size(MSS) register(R/W) + * @details @ref PMRU configures the maximum receive unit of PPPoE. + */ +#define PMRU (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Unreachable IP register address in UDP mode(R) + * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number + * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates + * the destination IP address & port number respectively. + */ +#define UIPR (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief Unreachable Port register address in UDP mode(R) + * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number + * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR + * indicates the destination IP address & port number respectively. + */ +#define UPORTR (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief PHY Status Register(R/W) + * @details @ref PHYCFGR configures PHY operation mode and resets PHY. In addition, @ref PHYCFGR indicates the status of PHY such as duplex, Speed, Link. + */ +#define PHYCFGR (_W5500_IO_BASE_ + (0x002E << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +// Reserved (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0031 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0032 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0033 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0034 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0035 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0036 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0037 << 8) + (WIZCHIP_CREG_BLOCK << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0038 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + +/** + * @ingroup Common_register_group + * @brief chip version register address(R) + * @details @ref VERSIONR always indicates the W5500 version as @b 0x04. + */ +#define VERSIONR (_W5500_IO_BASE_ + (0x0039 << 8) + (WIZCHIP_CREG_BLOCK << 3)) + + +//----------------------------- W5500 Socket Registers IOMAP ----------------------------- +/** + * @ingroup Socket_register_group + * @brief socket Mode register(R/W) + * @details @ref Sn_MR configures the option or protocol type of Socket n.\n\n + * Each bit of @ref Sn_MR defined as the following. + * + * + * + *
7 6 5 4 3 2 1 0
MULTI/MFEN BCASTB ND/MC/MMB UCASTB/MIP6B Protocol[3] Protocol[2] Protocol[1] Protocol[0]
+ * - @ref Sn_MR_MULTI : Support UDP Multicasting + * - @ref Sn_MR_BCASTB : Broadcast block in UDP Multicasting + * - @ref Sn_MR_ND : No Delayed Ack(TCP) flag + * - @ref Sn_MR_MC : IGMP version used in UDP mulitcasting + * - @ref Sn_MR_MMB : Multicast Blocking in @ref Sn_MR_MACRAW mode + * - @ref Sn_MR_UCASTB : Unicast Block in UDP Multicating + * - @ref Sn_MR_MIP6B : IPv6 packet Blocking in @ref Sn_MR_MACRAW mode + * - Protocol + * + * + * + * + * + * + *
Protocol[3] Protocol[2] Protocol[1] Protocol[0] @b Meaning
0 0 0 0 Closed
0 0 0 1 TCP
0 0 1 0 UDP
0 1 0 0 MACRAW
+ * - @ref Sn_MR_MACRAW : MAC LAYER RAW SOCK \n + * - @ref Sn_MR_UDP : UDP + * - @ref Sn_MR_TCP : TCP + * - @ref Sn_MR_CLOSE : Unused socket + * @note MACRAW mode should be only used in Socket 0. + */ +#define Sn_MR(N) (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Socket command register(R/W) + * @details This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.\n + * After W5500 accepts the command, the @ref Sn_CR register is automatically cleared to 0x00. + * Even though @ref Sn_CR is cleared to 0x00, the command is still being processed.\n + * To check whether the command is completed or not, please check the @ref Sn_IR or @ref Sn_SR. + * - @ref Sn_CR_OPEN : Initialize or open socket. + * - @ref Sn_CR_LISTEN : Wait connection request in TCP mode(Server mode) + * - @ref Sn_CR_CONNECT : Send connection request in TCP mode(Client mode) + * - @ref Sn_CR_DISCON : Send closing request in TCP mode. + * - @ref Sn_CR_CLOSE : Close socket. + * - @ref Sn_CR_SEND : Update TX buffer pointer and send data. + * - @ref Sn_CR_SEND_MAC : Send data with MAC address, so without ARP process. + * - @ref Sn_CR_SEND_KEEP : Send keep alive message. + * - @ref Sn_CR_RECV : Update RX buffer pointer and receive data. + */ +#define Sn_CR(N) (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Socket interrupt register(R) + * @details @ref Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).\n + * When an interrupt occurs and the corresponding bit of @ref Sn_IMR is the corresponding bit of @ref Sn_IR becomes \n + * In order to clear the @ref Sn_IR bit, the host should write the bit to \n + * + * + * + *
7 6 5 4 3 2 1 0
Reserved Reserved Reserved SEND_OK TIMEOUT RECV DISCON CON
+ * - \ref Sn_IR_SENDOK : SEND_OK Interrupt + * - \ref Sn_IR_TIMEOUT : TIMEOUT Interrupt + * - \ref Sn_IR_RECV : RECV Interrupt + * - \ref Sn_IR_DISCON : DISCON Interrupt + * - \ref Sn_IR_CON : CON Interrupt + */ +#define Sn_IR(N) (_W5500_IO_BASE_ + (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Socket status register(R) + * @details @ref Sn_SR indicates the status of Socket n.\n + * The status of Socket n is changed by @ref Sn_CR or some special control packet as SYN, FIN packet in TCP. + * @par Normal status + * - @ref SOCK_CLOSED : Closed + * - @ref SOCK_INIT : Initiate state + * - @ref SOCK_LISTEN : Listen state + * - @ref SOCK_ESTABLISHED : Success to connect + * - @ref SOCK_CLOSE_WAIT : Closing state + * - @ref SOCK_UDP : UDP socket + * - @ref SOCK_MACRAW : MAC raw mode socket + *@par Temporary status during changing the status of Socket n. + * - @ref SOCK_SYNSENT : This indicates Socket n sent the connect-request packet (SYN packet) to a peer. + * - @ref SOCK_SYNRECV : It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer. + * - @ref SOCK_FIN_WAIT : Connection state + * - @ref SOCK_CLOSING : Closing state + * - @ref SOCK_TIME_WAIT : Closing state + * - @ref SOCK_LAST_ACK : Closing state + */ +#define Sn_SR(N) (_W5500_IO_BASE_ + (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief source port register(R/W) + * @details @ref Sn_PORT configures the source port number of Socket n. + * It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered. + */ +#define Sn_PORT(N) (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Peer MAC register address(R/W) + * @details @ref Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or + * it indicates that it is acquired in ARP-process by CONNECT/SEND command. + */ +#define Sn_DHAR(N) (_W5500_IO_BASE_ + (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Peer IP register address(R/W) + * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. + * In TCP client mode, it configures an IP address of �TCP serverbefore CONNECT command. + * In TCP server mode, it indicates an IP address of �TCP clientafter successfully establishing connection. + * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command. + */ +#define Sn_DIPR(N) (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Peer port register address(R/W) + * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. + * In �TCP clientmode, it configures the listen port number of �TCP serverbefore CONNECT command. + * In �TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. + * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command. + */ +#define Sn_DPORT(N) (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Maximum Segment Size(Sn_MSSR0) register address(R/W) + * @details @ref Sn_MSSR configures or indicates the MTU(Maximum Transfer Unit) of Socket n. + */ +#define Sn_MSSR(N) (_W5500_IO_BASE_ + (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +// Reserved (_W5500_IO_BASE_ + (0x0014 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief IP Type of Service(TOS) Register(R/W) + * @details @ref Sn_TOS configures the TOS(Type Of Service field in IP Header) of Socket n. + * It is set before OPEN command. + */ +#define Sn_TOS(N) (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +/** + * @ingroup Socket_register_group + * @brief IP Time to live(TTL) Register(R/W) + * @details @ref Sn_TTL configures the TTL(Time To Live field in IP header) of Socket n. + * It is set before OPEN command. + */ +#define Sn_TTL(N) (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) +// Reserved (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Receive memory size register(R/W) + * @details @ref Sn_RXBUF_SIZE configures the RX buffer block size of Socket n. + * Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. + * If a different size is configured, the data cannot be normally received from a peer. + * Although Socket n RX Buffer Block size is initially configured to 2Kbytes, + * user can re-configure its size using @ref Sn_RXBUF_SIZE. The total sum of @ref Sn_RXBUF_SIZE can not be exceed 16Kbytes. + * When exceeded, the data reception error is occurred. + */ +#define Sn_RXBUF_SIZE(N) (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory size register(R/W) + * @details @ref Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes. + * If a different size is configured, the data can�t be normally transmitted to a peer. + * Although Socket n TX Buffer Block size is initially configured to 2Kbytes, + * user can be re-configure its size using @ref Sn_TXBUF_SIZE. The total sum of @ref Sn_TXBUF_SIZE can not be exceed 16Kbytes. + * When exceeded, the data transmission error is occurred. + */ +#define Sn_TXBUF_SIZE(N) (_W5500_IO_BASE_ + (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Transmit free memory size register(R) + * @details @ref Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by @ref Sn_TXBUF_SIZE. + * Data bigger than @ref Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent. + * Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size, + * transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size, + * transmit the data after dividing into the checked size and saving in the Socket n TX buffer. + */ +#define Sn_TX_FSR(N) (_W5500_IO_BASE_ + (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory read pointer register address(R) + * @details @ref Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP. + * After its initialization, it is auto-increased by SEND command. + * SEND command transmits the saved data from the current @ref Sn_TX_RD to the @ref Sn_TX_WR in the Socket n TX Buffer. + * After transmitting the saved data, the SEND command increases the @ref Sn_TX_RD as same as the @ref Sn_TX_WR. + * If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value. + */ +#define Sn_TX_RD(N) (_W5500_IO_BASE_ + (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Transmit memory write pointer register address(R/W) + * @details @ref Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.\n + * It should be read or be updated like as follows.\n + * 1. Read the starting address for saving the transmitting data.\n + * 2. Save the transmitting data from the starting address of Socket n TX buffer.\n + * 3. After saving the transmitting data, update @ref Sn_TX_WR to the increased value as many as transmitting data size. + * If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value.\n + * 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND command + */ +#define Sn_TX_WR(N) (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Received data size register(R) + * @details @ref Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer. + * @ref Sn_RX_RSR does not exceed the @ref Sn_RXBUF_SIZE and is calculated as the difference between + * �Socket n RX Write Pointer (@ref Sn_RX_WR)and �Socket n RX Read Pointer (@ref Sn_RX_RD) + */ +#define Sn_RX_RSR(N) (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Read point of Receive memory(R/W) + * @details @ref Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.\n + * 1. Read the starting save address of the received data.\n + * 2. Read data from the starting address of Socket n RX Buffer.\n + * 3. After reading the received data, Update @ref Sn_RX_RD to the increased value as many as the reading size. + * If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs, + * update with the lower 16bits value ignored the carry bit.\n + * 4. Order RECV command is for notifying the updated @ref Sn_RX_RD to W5500. + */ +#define Sn_RX_RD(N) (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Write point of Receive memory(R) + * @details @ref Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception. + * If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), + * then the carry bit is ignored and will automatically update with the lower 16bits value. + */ +#define Sn_RX_WR(N) (_W5500_IO_BASE_ + (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief socket interrupt mask register(R) + * @details @ref Sn_IMR masks the interrupt of Socket n. + * Each bit corresponds to each bit of @ref Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of @ref Sn_IMR is + * the corresponding bit of @ref Sn_IR becomes When both the corresponding bit of @ref Sn_IMR and @ref Sn_IR are and the n-th bit of @ref IR is + * Host is interrupted by asserted INTn PIN to low. + */ +#define Sn_IMR(N) (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Fragment field value in IP header register(R/W) + * @details @ref Sn_FRAG configures the FRAG(Fragment field in IP header). + */ +#define Sn_FRAG(N) (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +/** + * @ingroup Socket_register_group + * @brief Keep Alive Timer register(R/W) + * @details @ref Sn_KPALVTR configures the transmitting timer of �KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode, + * and ignored in other modes. The time unit is 5s. + * KA packet is transmittable after @ref Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once. + * In case of '@ref Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process). + * In case of '@ref Sn_KPALVTR = 0', Auto-keep-alive-process will not operate, + * and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process). + * Manual-keep-alive-process is ignored in case of '@ref Sn_KPALVTR > 0'. + */ +#define Sn_KPALVTR(N) (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + +//#define Sn_TSR(N) (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) + + +//----------------------------- W5500 Register values ----------------------------- + +/* MODE register values */ +/** + * @brief Reset + * @details If this bit is All internal registers will be initialized. It will be automatically cleared as after S/W reset. + */ +#define MR_RST 0x80 + +/** + * @brief Wake on LAN + * @details 0 : Disable WOL mode\n + * 1 : Enable WOL mode\n + * If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low. + * When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (@ref Sn_MR) for opening Socket.) + * @note The magic packet over UDP supported by W5500 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and + * 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode. + */ +#define MR_WOL 0x20 + +/** + * @brief Ping block + * @details 0 : Disable Ping block\n + * 1 : Enable Ping block\n + * If the bit is it blocks the response to a ping request. + */ +#define MR_PB 0x10 + +/** + * @brief Enable PPPoE + * @details 0 : DisablePPPoE mode\n + * 1 : EnablePPPoE mode\n + * If you use ADSL, this bit should be + */ +#define MR_PPPOE 0x08 + +/** + * @brief Enable UDP_FORCE_ARP CHECHK + * @details 0 : Disable Force ARP mode\n + * 1 : Enable Force ARP mode\n + * In Force ARP mode, It forces on sending ARP Request whenever data is sent. + */ +#define MR_FARP 0x02 + +/* IR register values */ +/** + * @brief Check IP conflict. + * @details Bit is set as when own source IP address is same with the sender IP address in the received ARP request. + */ +#define IR_CONFLICT 0x80 + +/** + * @brief Get the destination unreachable message in UDP sending. + * @details When receiving the ICMP (Destination port unreachable) packet, this bit is set as + * When this bit is Destination Information such as IP address and Port number may be checked with the corresponding @ref UIPR & @ref UPORTR. + */ +#define IR_UNREACH 0x40 + +/** + * @brief Get the PPPoE close message. + * @details When PPPoE is disconnected during PPPoE mode, this bit is set. + */ +#define IR_PPPoE 0x20 + +/** + * @brief Get the magic packet interrupt. + * @details When WOL mode is enabled and receives the magic packet over UDP, this bit is set. + */ +#define IR_MP 0x10 + + +/* PHYCFGR register value */ +#define PHYCFGR_RST ~(1<<7) //< For PHY reset, must operate AND mask. +#define PHYCFGR_OPMD (1<<6) // Configre PHY with OPMDC value +#define PHYCFGR_OPMDC_ALLA (7<<3) +#define PHYCFGR_OPMDC_PDOWN (6<<3) +#define PHYCFGR_OPMDC_NA (5<<3) +#define PHYCFGR_OPMDC_100FA (4<<3) +#define PHYCFGR_OPMDC_100F (3<<3) +#define PHYCFGR_OPMDC_100H (2<<3) +#define PHYCFGR_OPMDC_10F (1<<3) +#define PHYCFGR_OPMDC_10H (0<<3) +#define PHYCFGR_DPX_FULL (1<<2) +#define PHYCFGR_DPX_HALF (0<<2) +#define PHYCFGR_SPD_100 (1<<1) +#define PHYCFGR_SPD_10 (0<<1) +#define PHYCFGR_LNK_ON (1<<0) +#define PHYCFGR_LNK_OFF (0<<0) + +/* IMR register values */ +/** + * @brief IP Conflict Interrupt Mask. + * @details 0: Disable IP Conflict Interrupt\n + * 1: Enable IP Conflict Interrupt + */ +#define IM_IR7 0x80 + +/** + * @brief Destination unreachable Interrupt Mask. + * @details 0: Disable Destination unreachable Interrupt\n + * 1: Enable Destination unreachable Interrupt + */ +#define IM_IR6 0x40 + +/** + * @brief PPPoE Close Interrupt Mask. + * @details 0: Disable PPPoE Close Interrupt\n + * 1: Enable PPPoE Close Interrupt + */ +#define IM_IR5 0x20 + +/** + * @brief Magic Packet Interrupt Mask. + * @details 0: Disable Magic Packet Interrupt\n + * 1: Enable Magic Packet Interrupt + */ +#define IM_IR4 0x10 + +/* Sn_MR Default values */ +/** + * @brief Support UDP Multicasting + * @details 0 : disable Multicasting\n + * 1 : enable Multicasting\n + * This bit is applied only during UDP mode(P[3:0] = 010.\n + * To use multicasting, @ref Sn_DIPR & @ref Sn_DPORT should be respectively configured with the multicast group IP address & port number + * before Socket n is opened by OPEN command of @ref Sn_CR. + */ +#define Sn_MR_MULTI 0x80 + +/** + * @brief Broadcast block in UDP Multicasting. + * @details 0 : disable Broadcast Blocking\n + * 1 : enable Broadcast Blocking\n + * This bit blocks to receive broadcasting packet during UDP mode(P[3:0] = 010.\m + * In addition, This bit does when MACRAW mode(P[3:0] = 100 + */ +#define Sn_MR_BCASTB 0x40 + +/** + * @brief No Delayed Ack(TCP), Multicast flag + * @details 0 : Disable No Delayed ACK option\n + * 1 : Enable No Delayed ACK option\n + * This bit is applied only during TCP mode (P[3:0] = 001.\n + * When this bit is It sends the ACK packet without delay as soon as a Data packet is received from a peer.\n + * When this bit is It sends the ACK packet after waiting for the timeout time configured by @ref RTR. + */ +#define Sn_MR_ND 0x20 + +/** + * @brief Unicast Block in UDP Multicasting + * @details 0 : disable Unicast Blocking\n + * 1 : enable Unicast Blocking\n + * This bit blocks receiving the unicast packet during UDP mode(P[3:0] = 010 and MULTI = + */ +#define Sn_MR_UCASTB 0x10 + +/** + * @brief MAC LAYER RAW SOCK + * @details This configures the protocol mode of Socket n. + * @note MACRAW mode should be only used in Socket 0. + */ +#define Sn_MR_MACRAW 0x04 + +//#define Sn_MR_IPRAW 0x03 /**< IP LAYER RAW SOCK */ + +/** + * @brief UDP + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_UDP 0x02 + +/** + * @brief TCP + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_TCP 0x01 + +/** + * @brief Unused socket + * @details This configures the protocol mode of Socket n. + */ +#define Sn_MR_CLOSE 0x00 + +/* Sn_MR values used with Sn_MR_MACRAW */ +/** + * @brief MAC filter enable in @ref Sn_MR_MACRAW mode + * @details 0 : disable MAC Filtering\n + * 1 : enable MAC Filtering\n + * This bit is applied only during MACRAW mode(P[3:0] = 100.\n + * When set as W5500 can only receive broadcasting packet or packet sent to itself. + * When this bit is W5500 can receive all packets on Ethernet. + * If user wants to implement Hybrid TCP/IP stack, + * it is recommended that this bit is set as for reducing host overhead to process the all received packets. + */ +#define Sn_MR_MFEN Sn_MR_MULTI + +/** + * @brief Multicast Blocking in @ref Sn_MR_MACRAW mode + * @details 0 : using IGMP version 2\n + * 1 : using IGMP version 1\n + * This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = + * It configures the version for IGMP messages (Join/Leave/Report). + */ +#define Sn_MR_MMB Sn_MR_ND + +/** + * @brief IPv6 packet Blocking in @ref Sn_MR_MACRAW mode + * @details 0 : disable IPv6 Blocking\n + * 1 : enable IPv6 Blocking\n + * This bit is applied only during MACRAW mode (P[3:0] = 100. It blocks to receiving the IPv6 packet. + */ +#define Sn_MR_MIP6B Sn_MR_UCASTB + +/* Sn_MR value used with Sn_MR_UDP & Sn_MR_MULTI */ +/** + * @brief IGMP version used in UDP mulitcasting + * @details 0 : disable Multicast Blocking\n + * 1 : enable Multicast Blocking\n + * This bit is applied only when MACRAW mode(P[3:0] = 100. It blocks to receive the packet with multicast MAC address. + */ +#define Sn_MR_MC Sn_MR_ND + +/* Sn_MR alternate values */ +/** + * @brief For Berkeley Socket API + */ +#define SOCK_STREAM Sn_MR_TCP + +/** + * @brief For Berkeley Socket API + */ +#define SOCK_DGRAM Sn_MR_UDP + + +/* Sn_CR values */ +/** + * @brief Initialize or open socket + * @details Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0). + * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n + * + * + * + * + * + * + *
\b Sn_MR (P[3:0]) \b Sn_SR
Sn_MR_CLOSE (000
Sn_MR_TCP (001 SOCK_INIT (0x13)
Sn_MR_UDP (010 SOCK_UDP (0x22)
S0_MR_MACRAW (100 SOCK_MACRAW (0x02)
+ */ +#define Sn_CR_OPEN 0x01 + +/** + * @brief Wait connection request in TCP mode(Server mode) + * @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP). + * In this mode, Socket n operates as a �TCP serverand waits for connection-request (SYN packet) from any �TCP client + * The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN. + * When a �TCP clientconnection request is successfully established, + * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes + * But when a �TCP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED. + */ +#define Sn_CR_LISTEN 0x02 + +/** + * @brief Send connection request in TCP mode(Client mode) + * @details To connect, a connect-request (SYN packet) is sent to b>TCP serverconfigured by @ref Sn_DIPR & Sn_DPORT(destination address & port). + * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n + * The connect-request fails in the following three cases.\n + * 1. When a @b ARPTO occurs (@ref Sn_IR[3] = ) because destination hardware address is not acquired through the ARP-process.\n + * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) = )\n + * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED. + * @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client + */ +#define Sn_CR_CONNECT 0x04 + +/** + * @brief Send closing request in TCP mode + * @details Regardless of b>TCP serveror b>TCP client the DISCON command processes the disconnect-process (b>Active closeor b>Passive close.\n + * @par Active close + * it transmits disconnect-request(FIN packet) to the connected peer\n + * @par Passive close + * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n + * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n + * Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED. + * @note Valid only in TCP mode. + */ +#define Sn_CR_DISCON 0x08 + +/** + * @brief Close socket + * @details Sn_SR is changed to @ref SOCK_CLOSED. + */ +#define Sn_CR_CLOSE 0x10 + +/** + * @brief Update TX buffer pointer and send data + * @details SEND transmits all the data in the Socket n TX buffer.\n + * For more details, please refer to Socket n TX Free Size Register (@ref Sn_TX_FSR), Socket n, + * TX Write Pointer Register(@ref Sn_TX_WR), and Socket n TX Read Pointer Register(@ref Sn_TX_RD). + */ +#define Sn_CR_SEND 0x20 + +/** + * @brief Send data with MAC address, so without ARP process + * @details The basic operation is same as SEND.\n + * Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).\n + * But SEND_MAC transmits data without the automatic ARP-process.\n + * In this case, the destination hardware address is acquired from @ref Sn_DHAR configured by host, instead of APR-process. + * @note Valid only in UDP mode. + */ +#define Sn_CR_SEND_MAC 0x21 + +/** + * @brief Send keep alive message + * @details It checks the connection status by sending 1byte keep-alive packet.\n + * If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur. + * @note Valid only in TCP mode. + */ +#define Sn_CR_SEND_KEEP 0x22 + +/** + * @brief Update RX buffer pointer and receive data + * @details RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (@ref Sn_RX_RD).\n + * For more details, refer to Socket n RX Received Size Register (@ref Sn_RX_RSR), Socket n RX Write Pointer Register (@ref Sn_RX_WR), + * and Socket n RX Read Pointer Register (@ref Sn_RX_RD). + */ +#define Sn_CR_RECV 0x40 + +/* Sn_IR values */ +/** + * @brief SEND_OK Interrupt + * @details This is issued when SEND command is completed. + */ +#define Sn_IR_SENDOK 0x10 + +/** + * @brief TIMEOUT Interrupt + * @details This is issued when ARPTO or TCPTO occurs. + */ +#define Sn_IR_TIMEOUT 0x08 + +/** + * @brief RECV Interrupt + * @details This is issued whenever data is received from a peer. + */ +#define Sn_IR_RECV 0x04 + +/** + * @brief DISCON Interrupt + * @details This is issued when FIN or FIN/ACK packet is received from a peer. + */ +#define Sn_IR_DISCON 0x02 + +/** + * @brief CON Interrupt + * @details This is issued one time when the connection with peer is successful and then @ref Sn_SR is changed to @ref SOCK_ESTABLISHED. + */ +#define Sn_IR_CON 0x01 + +/* Sn_SR values */ +/** + * @brief Closed + * @details This indicates that Socket n is released.\N + * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status. + */ +#define SOCK_CLOSED 0x00 + +/** + * @brief Initiate state + * @details This indicates Socket n is opened with TCP mode.\N + * It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N + * After @ref SOCK_INIT, user can use LISTEN /CONNECT command. + */ +#define SOCK_INIT 0x13 + +/** + * @brief Listen state + * @details This indicates Socket n is operating as b>TCP servermode and waiting for connection-request (SYN packet) from a peer (b>TCP client.\n + * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n + * Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = . + */ +#define SOCK_LISTEN 0x14 + +/** + * @brief Connection state + * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n + * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n + * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n + * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] = is occurred. + */ +#define SOCK_SYNSENT 0x15 + +/** + * @brief Connection state + * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n + * If socket n sends the response (SYN/ACK packet) to the peer successfully, it changes to @ref SOCK_ESTABLISHED. \n + * If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = . + */ +#define SOCK_SYNRECV 0x16 + +/** + * @brief Success to connect + * @details This indicates the status of the connection of Socket n.\n + * It changes to @ref SOCK_ESTABLISHED when the b>TCP SERVERprocessed the SYN packet from the b>TCP CLIENTduring @ref SOCK_LISTEN, or + * when the CONNECT command is successful.\n + * During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command. + */ +#define SOCK_ESTABLISHED 0x17 + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_FIN_WAIT 0x18 + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_CLOSING 0x1A + +/** + * @brief Closing state + * @details These indicate Socket n is closing.\n + * These are shown in disconnect-process such as active-close and passive-close.\n + * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED. + */ +#define SOCK_TIME_WAIT 0x1B + +/** + * @brief Closing state + * @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n + * This is half-closing status, and data can be transferred.\n + * For full-closing, DISCON command is used. But For just-closing, CLOSE command is used. + */ +#define SOCK_CLOSE_WAIT 0x1C + +/** + * @brief Closing state + * @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n + * It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs (@ref Sn_IR[TIMEOUT] = . + */ +#define SOCK_LAST_ACK 0x1D + +/** + * @brief UDP socket + * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010.\n + * It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n + * Unlike TCP mode, data can be transfered without the connection-process. + */ +#define SOCK_UDP 0x22 + +//#define SOCK_IPRAW 0x32 /**< IP raw mode socket */ + +/** + * @brief MAC raw mode socket + * @details This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.\n + * It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100and OPEN command is ordered.\n + * Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process. + */ +#define SOCK_MACRAW 0x42 + +//#define SOCK_PPPOE 0x5F + +/* IP PROTOCOL */ +#define IPPROTO_IP 0 //< Dummy for IP +#define IPPROTO_ICMP 1 //< Control message protocol +#define IPPROTO_IGMP 2 //< Internet group management protocol +#define IPPROTO_GGP 3 //< Gateway^2 (deprecated) +#define IPPROTO_TCP 6 //< TCP +#define IPPROTO_PUP 12 //< PUP +#define IPPROTO_UDP 17 //< UDP +#define IPPROTO_IDP 22 //< XNS idp +#define IPPROTO_ND 77 //< UNOFFICIAL net disk protocol +#define IPPROTO_RAW 255 //< Raw IP packet + + +/** + * @brief Enter a critical section + * + * @details It is provided to protect your shared code which are executed without distribution. \n \n + * + * In non-OS environment, It can be just implemented by disabling whole interrupt.\n + * In OS environment, You can replace it to critical section api supported by OS. + * + * \sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() + * \sa WIZCHIP_CRITICAL_EXIT() + */ +#define WIZCHIP_CRITICAL_ENTER() WIZCHIP.CRIS._enter() + +/** + * @brief Exit a critical section + * + * @details It is provided to protect your shared code which are executed without distribution. \n\n + * + * In non-OS environment, It can be just implemented by disabling whole interrupt. \n + * In OS environment, You can replace it to critical section api supported by OS. + * + * @sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() + * @sa WIZCHIP_CRITICAL_ENTER() + */ +#ifdef _exit +#undef _exit +#endif +#define WIZCHIP_CRITICAL_EXIT() WIZCHIP.CRIS._exit() + + + +//////////////////////// +// Basic I/O Function // +//////////////////////// + +/** + * @ingroup Basic_IO_function + * @brief It reads 1 byte value from a register. + * @param AddrSel Register address + * @return The value of register + */ +uint8_t WIZCHIP_READ (uint32_t AddrSel); + +/** + * @ingroup Basic_IO_function + * @brief It writes 1 byte value to a register. + * @param AddrSel Register address + * @param wb Write data + * @return void + */ +void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb ); + +/** + * @ingroup Basic_IO_function + * @brief It reads sequence data from registers. + * @param AddrSel Register address + * @param pBuf Pointer buffer to read data + * @param len Data length + */ +void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It writes sequence data to registers. + * @param AddrSel Register address + * @param pBuf Pointer buffer to write data + * @param len Data length + */ +void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len); + +///////////////////////////////// +// Common Register I/O function // +///////////////////////////////// +/** + * @ingroup Common_register_access_function + * @brief Set Mode Register + * @param (uint8_t)mr The value to be set. + * @sa getMR() + */ +#define setMR(mr) \ + WIZCHIP_WRITE(MR,mr) + + +/** + * @ingroup Common_register_access_function + * @brief Get Mode Register + * @return uint8_t. The value of Mode register. + * @sa setMR() + */ +#define getMR() \ + WIZCHIP_READ(MR) + +/** + * @ingroup Common_register_access_function + * @brief Set gateway IP address + * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes. + * @sa getGAR() + */ +#define setGAR(gar) \ + WIZCHIP_WRITE_BUF(GAR,gar,4) + +/** + * @ingroup Common_register_access_function + * @brief Get gateway IP address + * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes. + * @sa setGAR() + */ +#define getGAR(gar) \ + WIZCHIP_READ_BUF(GAR,gar,4) + +/** + * @ingroup Common_register_access_function + * @brief Set subnet mask address + * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes. + * @sa getSUBR() + */ +#define setSUBR(subr) \ + WIZCHIP_WRITE_BUF(SUBR, subr,4) + + +/** + * @ingroup Common_register_access_function + * @brief Get subnet mask address + * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes. + * @sa setSUBR() + */ +#define getSUBR(subr) \ + WIZCHIP_READ_BUF(SUBR, subr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Set local MAC address + * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes. + * @sa getSHAR() + */ +#define setSHAR(shar) \ + WIZCHIP_WRITE_BUF(SHAR, shar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Get local MAC address + * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes. + * @sa setSHAR() + */ +#define getSHAR(shar) \ + WIZCHIP_READ_BUF(SHAR, shar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Set local IP address + * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes. + * @sa getSIPR() + */ +#define setSIPR(sipr) \ + WIZCHIP_WRITE_BUF(SIPR, sipr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Get local IP address + * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes. + * @sa setSIPR() + */ +#define getSIPR(sipr) \ + WIZCHIP_READ_BUF(SIPR, sipr, 4) + +/** + * @ingroup Common_register_access_function + * @brief Set INTLEVEL register + * @param (uint16_t)intlevel Value to set @ref INTLEVEL register. + * @sa getINTLEVEL() + */ +#define setINTLEVEL(intlevel) {\ + WIZCHIP_WRITE(INTLEVEL, (uint8_t)(intlevel >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(INTLEVEL,1), (uint8_t) intlevel); \ + } + + +/** + * @ingroup Common_register_access_function + * @brief Get INTLEVEL register + * @return uint16_t. Value of @ref INTLEVEL register. + * @sa setINTLEVEL() + */ +#define getINTLEVEL() \ + ((WIZCHIP_READ(INTLEVEL) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(INTLEVEL,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref IR register + * @param (uint8_t)ir Value to set @ref IR register. + * @sa getIR() + */ +#define setIR(ir) \ + WIZCHIP_WRITE(IR, (ir & 0xF0)) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref IR register + * @return uint8_t. Value of @ref IR register. + * @sa setIR() + */ +#define getIR() \ + (WIZCHIP_READ(IR) & 0xF0) +/** + * @ingroup Common_register_access_function + * @brief Set @ref IMR register + * @param (uint8_t)imr Value to set @ref IMR register. + * @sa getIMR() + */ +#define setIMR(imr) \ + WIZCHIP_WRITE(IMR, imr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref IMR register + * @return uint8_t. Value of @ref IMR register. + * @sa setIMR() + */ +#define getIMR() \ + WIZCHIP_READ(IMR) + + +/** + * @ingroup Common_register_access_function + * @brief Set @ref SIR register + * @param (uint8_t)sir Value to set @ref SIR register. + * @sa getSIR() + */ +#define setSIR(sir) \ + WIZCHIP_WRITE(SIR, sir) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref SIR register + * @return uint8_t. Value of @ref SIR register. + * @sa setSIR() + */ +#define getSIR() \ + WIZCHIP_READ(SIR) +/** + * @ingroup Common_register_access_function + * @brief Set @ref SIMR register + * @param (uint8_t)simr Value to set @ref SIMR register. + * @sa getSIMR() + */ +#define setSIMR(simr) \ + WIZCHIP_WRITE(SIMR, simr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref SIMR register + * @return uint8_t. Value of @ref SIMR register. + * @sa setSIMR() + */ +#define getSIMR() \ + WIZCHIP_READ(SIMR) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref RTR register + * @param (uint16_t)rtr Value to set @ref RTR register. + * @sa getRTR() + */ +#define setRTR(rtr) {\ + WIZCHIP_WRITE(RTR, (uint8_t)(rtr >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(RTR,1), (uint8_t) rtr); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref RTR register + * @return uint16_t. Value of @ref RTR register. + * @sa setRTR() + */ +#define getRTR() \ + ((WIZCHIP_READ(RTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(RTR,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref RCR register + * @param (uint8_t)rcr Value to set @ref RCR register. + * @sa getRCR() + */ +#define setRCR(rcr) \ + WIZCHIP_WRITE(RCR, rcr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref RCR register + * @return uint8_t. Value of @ref RCR register. + * @sa setRCR() + */ +#define getRCR() \ + WIZCHIP_READ(RCR) + +//================================================== test done =========================================================== + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PTIMER register + * @param (uint8_t)ptimer Value to set @ref PTIMER register. + * @sa getPTIMER() + */ +#define setPTIMER(ptimer) \ + WIZCHIP_WRITE(PTIMER, ptimer) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PTIMER register + * @return uint8_t. Value of @ref PTIMER register. + * @sa setPTIMER() + */ +#define getPTIMER() \ + WIZCHIP_READ(PTIMER) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PMAGIC register + * @param (uint8_t)pmagic Value to set @ref PMAGIC register. + * @sa getPMAGIC() + */ +#define setPMAGIC(pmagic) \ + WIZCHIP_WRITE(PMAGIC, pmagic) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PMAGIC register + * @return uint8_t. Value of @ref PMAGIC register. + * @sa setPMAGIC() + */ +#define getPMAGIC() \ + WIZCHIP_READ(PMAGIC) + +/** + * @ingroup Common_register_access_function + * @brief Set PHAR address + * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes. + * @sa getPHAR() + */ +#define setPHAR(phar) \ + WIZCHIP_WRITE_BUF(PHAR, phar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Get local IP address + * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes. + * @sa setPHAR() + */ +#define getPHAR(phar) \ + WIZCHIP_READ_BUF(PHAR, phar, 6) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PSID register + * @param (uint16_t)psid Value to set @ref PSID register. + * @sa getPSID() + */ +#define setPSID(psid) {\ + WIZCHIP_WRITE(PSID, (uint8_t)(psid >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PSID,1), (uint8_t) psid); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PSID register + * @return uint16_t. Value of @ref PSID register. + * @sa setPSID() + */ +//uint16_t getPSID(void); +#define getPSID() \ + ((WIZCHIP_READ(PSID) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PSID,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PMRU register + * @param (uint16_t)pmru Value to set @ref PMRU register. + * @sa getPMRU() + */ +#define setPMRU(pmru) { \ + WIZCHIP_WRITE(PMRU, (uint8_t)(pmru>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PMRU,1), (uint8_t) pmru); \ + } + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PMRU register + * @return uint16_t. Value of @ref PMRU register. + * @sa setPMRU() + */ +#define getPMRU() \ + ((WIZCHIP_READ(PMRU) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PMRU,1))) + +/** + * @ingroup Common_register_access_function + * @brief Get unreachable IP address + * @param (uint8_t*)uipr Pointer variable to get unreachable IP address. It should be allocated 4 bytes. + */ +#define getUIPR(uipr) \ + WIZCHIP_READ_BUF(UIPR,uipr,6) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref UPORTR register + * @return uint16_t. Value of @ref UPORTR register. + */ +#define getUPORTR() \ + ((WIZCHIP_READ(UPORTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(UPORTR,1))) + +/** + * @ingroup Common_register_access_function + * @brief Set @ref PHYCFGR register + * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register. + * @sa getPHYCFGR() + */ +#define setPHYCFGR(phycfgr) \ + WIZCHIP_WRITE(PHYCFGR, phycfgr) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref PHYCFGR register + * @return uint8_t. Value of @ref PHYCFGR register. + * @sa setPHYCFGR() + */ +#define getPHYCFGR() \ + WIZCHIP_READ(PHYCFGR) + +/** + * @ingroup Common_register_access_function + * @brief Get @ref VERSIONR register + * @return uint8_t. Value of @ref VERSIONR register. + */ +#define getVERSIONR() \ + WIZCHIP_READ(VERSIONR) + +///////////////////////////////////// + +/////////////////////////////////// +// Socket N register I/O function // +/////////////////////////////////// +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)mr Value to set @ref Sn_MR + * @sa getSn_MR() + */ +#define setSn_MR(sn, mr) \ + WIZCHIP_WRITE(Sn_MR(sn),mr) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_MR. + * @sa setSn_MR() + */ +#define getSn_MR(sn) \ + WIZCHIP_READ(Sn_MR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_CR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)cr Value to set @ref Sn_CR + * @sa getSn_CR() + */ +#define setSn_CR(sn, cr) \ + WIZCHIP_WRITE(Sn_CR(sn), cr) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_CR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_CR. + * @sa setSn_CR() + */ +#define getSn_CR(sn) \ + WIZCHIP_READ(Sn_CR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_IR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)ir Value to set @ref Sn_IR + * @sa getSn_IR() + */ +#define setSn_IR(sn, ir) \ + WIZCHIP_WRITE(Sn_IR(sn), (ir & 0x1F)) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_IR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_IR. + * @sa setSn_IR() + */ +#define getSn_IR(sn) \ + (WIZCHIP_READ(Sn_IR(sn)) & 0x1F) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_IMR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)imr Value to set @ref Sn_IMR + * @sa getSn_IMR() + */ +#define setSn_IMR(sn, imr) \ + WIZCHIP_WRITE(Sn_IMR(sn), (imr & 0x1F)) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_IMR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_IMR. + * @sa setSn_IMR() + */ +#define getSn_IMR(sn) \ + (WIZCHIP_READ(Sn_IMR(sn)) & 0x1F) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_SR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_SR. + */ +#define getSn_SR(sn) \ + WIZCHIP_READ(Sn_SR(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_PORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)port Value to set @ref Sn_PORT. + * @sa getSn_PORT() + */ +#define setSn_PORT(sn, port) { \ + WIZCHIP_WRITE(Sn_PORT(sn), (uint8_t)(port >> 8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1), (uint8_t) port); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_PORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_PORT. + * @sa setSn_PORT() + */ +#define getSn_PORT(sn) \ + ((WIZCHIP_READ(Sn_PORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DHAR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes. + * @sa getSn_DHAR() + */ +#define setSn_DHAR(sn, dhar) \ + WIZCHIP_WRITE_BUF(Sn_DHAR(sn), dhar, 6) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes. + * @sa setSn_DHAR() + */ +#define getSn_DHAR(sn, dhar) \ + WIZCHIP_READ_BUF(Sn_DHAR(sn), dhar, 6) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DIPR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes. + * @sa getSn_DIPR() + */ +#define setSn_DIPR(sn, dipr) \ + WIZCHIP_WRITE_BUF(Sn_DIPR(sn), dipr, 4) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_DIPR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes. + * @sa SetSn_DIPR() + */ +#define getSn_DIPR(sn, dipr) \ + WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_DPORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)dport Value to set @ref Sn_DPORT + * @sa getSn_DPORT() + */ +#define setSn_DPORT(sn, dport) { \ + WIZCHIP_WRITE(Sn_DPORT(sn), (uint8_t) (dport>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1), (uint8_t) dport); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_DPORT register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_DPORT. + * @sa setSn_DPORT() + */ +#define getSn_DPORT(sn) \ + ((WIZCHIP_READ(Sn_DPORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_MSSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)mss Value to set @ref Sn_MSSR + * @sa setSn_MSSR() + */ +#define setSn_MSSR(sn, mss) { \ + WIZCHIP_WRITE(Sn_MSSR(sn), (uint8_t)(mss>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1), (uint8_t) mss); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_MSSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_MSSR. + * @sa setSn_MSSR() + */ +#define getSn_MSSR(sn) \ + ((WIZCHIP_READ(Sn_MSSR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TOS register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)tos Value to set @ref Sn_TOS + * @sa getSn_TOS() + */ +#define setSn_TOS(sn, tos) \ + WIZCHIP_WRITE(Sn_TOS(sn), tos) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TOS register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of Sn_TOS. + * @sa setSn_TOS() + */ +#define getSn_TOS(sn) \ + WIZCHIP_READ(Sn_TOS(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TTL register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)ttl Value to set @ref Sn_TTL + * @sa getSn_TTL() + */ +#define setSn_TTL(sn, ttl) \ + WIZCHIP_WRITE(Sn_TTL(sn), ttl) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TTL register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_TTL. + * @sa setSn_TTL() + */ +#define getSn_TTL(sn) \ + WIZCHIP_READ(Sn_TTL(sn)) + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_RXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE + * @sa getSn_RXBUF_SIZE() + */ +#define setSn_RXBUF_SIZE(sn, rxbufsize) \ + WIZCHIP_WRITE(Sn_RXBUF_SIZE(sn),rxbufsize) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_RXBUF_SIZE. + * @sa setSn_RXBUF_SIZE() + */ +#define getSn_RXBUF_SIZE(sn) \ + WIZCHIP_READ(Sn_RXBUF_SIZE(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE + * @sa getSn_TXBUF_SIZE() + */ +#define setSn_TXBUF_SIZE(sn, txbufsize) \ + WIZCHIP_WRITE(Sn_TXBUF_SIZE(sn), txbufsize) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TXBUF_SIZE register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_TXBUF_SIZE. + * @sa setSn_TXBUF_SIZE() + */ +#define getSn_TXBUF_SIZE(sn) \ + WIZCHIP_READ(Sn_TXBUF_SIZE(sn)) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_FSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_FSR. + */ +uint16_t getSn_TX_FSR(uint8_t sn); + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_RD. + */ +#define getSn_TX_RD(sn) \ + ((WIZCHIP_READ(Sn_TX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_RD(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_TX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)txwr Value to set @ref Sn_TX_WR + * @sa GetSn_TX_WR() + */ +#define setSn_TX_WR(sn, txwr) { \ + WIZCHIP_WRITE(Sn_TX_WR(sn), (uint8_t)(txwr>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1), (uint8_t) txwr); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_TX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_TX_WR. + * @sa setSn_TX_WR() + */ +#define getSn_TX_WR(sn) \ + ((WIZCHIP_READ(Sn_TX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1))) + + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_RSR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_RX_RSR. + */ +uint16_t getSn_RX_RSR(uint8_t sn); + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_RX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD + * @sa getSn_RX_RD() + */ +#define setSn_RX_RD(sn, rxrd) { \ + WIZCHIP_WRITE(Sn_RX_RD(sn), (uint8_t)(rxrd>>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1), (uint8_t) rxrd); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_RD register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @regurn uint16_t. Value of @ref Sn_RX_RD. + * @sa setSn_RX_RD() + */ +#define getSn_RX_RD(sn) \ + ((WIZCHIP_READ(Sn_RX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_RX_WR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_RX_WR. + */ +#define getSn_RX_WR(sn) \ + ((WIZCHIP_READ(Sn_RX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_WR(sn),1))) + + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_FRAG register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint16_t)frag Value to set @ref Sn_FRAG + * @sa getSn_FRAD() + */ +#define setSn_FRAG(sn, frag) { \ + WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \ + WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1), (uint8_t) frag); \ + } + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_FRAG register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of @ref Sn_FRAG. + * @sa setSn_FRAG() + */ +#define getSn_FRAG(sn) \ + ((WIZCHIP_READ(Sn_FRAG(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1))) + +/** + * @ingroup Socket_register_access_function + * @brief Set @ref Sn_KPALVTR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param (uint8_t)kpalvt Value to set @ref Sn_KPALVTR + * @sa getSn_KPALVTR() + */ +#define setSn_KPALVTR(sn, kpalvt) \ + WIZCHIP_WRITE(Sn_KPALVTR(sn), kpalvt) + +/** + * @ingroup Socket_register_access_function + * @brief Get @ref Sn_KPALVTR register + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint8_t. Value of @ref Sn_KPALVTR. + * @sa setSn_KPALVTR() + */ +#define getSn_KPALVTR(sn) \ + WIZCHIP_READ(Sn_KPALVTR(sn)) + +////////////////////////////////////// + +///////////////////////////////////// +// Sn_TXBUF & Sn_RXBUF IO function // +///////////////////////////////////// +/** + * @brief Gets the max buffer size of socket sn passed as parameter. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of Socket n RX max buffer size. + */ +#define getSn_RxMAX(sn) \ + (getSn_RXBUF_SIZE(sn) << 10) + +/** + * @brief Gets the max buffer size of socket sn passed as parameters. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @return uint16_t. Value of Socket n TX max buffer size. + */ +//uint16_t getSn_TxMAX(uint8_t sn); +#define getSn_TxMAX(sn) \ + (getSn_TXBUF_SIZE(sn) << 10) + +/** + * @ingroup Basic_IO_function + * @brief It copies data to internal TX memory + * + * @details This function reads the Tx write pointer register and after that, + * it copies the wizdata(pointer buffer) of the length of len(variable) bytes to internal TX memory + * and updates the Tx write pointer register. + * This function is being called by send() and sendto() function also. + * + * @note User should read upper byte first and lower byte later to get proper value. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param wizdata Pointer buffer to write data + * @param len Data length + * @sa wiz_recv_data() + */ +void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It copies data to your buffer from internal RX memory + * + * @details This function read the Rx read pointer register and after that, + * it copies the received data from internal RX memory + * to wizdata(pointer variable) of the length of len(variable) bytes. + * This function is being called by recv() also. + * + * @note User should read upper byte first and lower byte later to get proper value. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param wizdata Pointer buffer to read data + * @param len Data length + * @sa wiz_send_data() + */ +void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len); + +/** + * @ingroup Basic_IO_function + * @brief It discard the received data in RX memory. + * @details It discards the data of the length of len(variable) bytes in internal RX memory. + * @param (uint8_t)sn Socket number. It should be 0 ~ 7. + * @param len Data length + */ +void wiz_recv_ignore(uint8_t sn, uint16_t len); + +#endif // _W5500_H_ diff --git a/drivers/wiznet5k/ethernet/wizchip_conf.c b/drivers/wiznet5k/ethernet/wizchip_conf.c new file mode 100644 index 0000000000000..3e54d2c90bcd2 --- /dev/null +++ b/drivers/wiznet5k/ethernet/wizchip_conf.c @@ -0,0 +1,662 @@ +//****************************************************************************/ +//! +//! \file wizchip_conf.c +//! \brief WIZCHIP Config Header File. +//! \version 1.0.1 +//! \date 2013/10/21 +//! \par Revision history +//! <2014/05/01> V1.0.1 Refer to M20140501 +//! 1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte() +// Issued by Mathias ClauBen. +//! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t* +//! For remove the warning when pointer type size is not 32bit. +//! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type. +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//*****************************************************************************/ +//A20140501 : for use the type - ptrdiff_t +#include +// + +#include "wizchip_conf.h" +#include "socket.h" + +/** + * @brief Default function to enable interrupt. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_cris_enter(void) {}; +/** + * @brief Default function to disable interrupt. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_cris_exit(void) {}; +/** + * @brief Default function to select chip. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_cs_select(void) {}; +/** + * @brief Default function to deselect chip. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_cs_deselect(void) {}; +/** + * @brief Default function to read in direct or indirect interface. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ + //M20140501 : Explict pointer type casting +//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); }; +uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }; +/** + * @brief Default function to write in direct or indirect interface. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ + +//M20140501 : Explict pointer type casting +//void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*) AddrSel) = wb; }; +void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }; + +/** + * @brief Default function to read in SPI interface. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_spi_readbytes(uint8_t *buf, uint32_t len) {} +/** + * @brief Default function to write in SPI interface. + * @note This function help not to access wrong address. If you do not describe this function or register any functions, + * null function is called. + */ +void wizchip_spi_writebytes(const uint8_t *buf, uint32_t len) {} + +/** + * @\ref _WIZCHIP instance + */ +_WIZCHIP WIZCHIP = + { + .id = _WIZCHIP_ID_, + .if_mode = _WIZCHIP_IO_MODE_, + .CRIS._enter = wizchip_cris_enter, + .CRIS._exit = wizchip_cris_exit, + .CS._select = wizchip_cs_select, + .CS._deselect = wizchip_cs_deselect, + .IF.BUS._read_byte = wizchip_bus_readbyte, + .IF.BUS._write_byte = wizchip_bus_writebyte +// .IF.SPI._read_byte = wizchip_spi_readbyte, +// .IF.SPI._write_byte = wizchip_spi_writebyte + }; + +#if _WIZCHIP_ == 5200 // for W5200 ARP errata +static uint8_t _SUBN_[4]; // subnet +#endif +static uint8_t _DNS_[4]; // DNS server ip address +static dhcp_mode _DHCP_; // DHCP mode + +void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void)) +{ + if(!cris_en || !cris_ex) + { + WIZCHIP.CRIS._enter = wizchip_cris_enter; + WIZCHIP.CRIS._exit = wizchip_cris_exit; + } + else + { + WIZCHIP.CRIS._enter = cris_en; + WIZCHIP.CRIS._exit = cris_ex; + } +} + +void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void)) +{ + if(!cs_sel || !cs_desel) + { + WIZCHIP.CS._select = wizchip_cs_select; + WIZCHIP.CS._deselect = wizchip_cs_deselect; + } + else + { + WIZCHIP.CS._select = cs_sel; + WIZCHIP.CS._deselect = cs_desel; + } +} + +void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb)) +{ + while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_)); + + if(!bus_rb || !bus_wb) + { + WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte; + WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte; + } + else + { + WIZCHIP.IF.BUS._read_byte = bus_rb; + WIZCHIP.IF.BUS._write_byte = bus_wb; + } +} + +void reg_wizchip_spi_cbfunc(void (*spi_rb)(uint8_t *, uint32_t), void (*spi_wb)(const uint8_t *, uint32_t)) +{ + while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_)); + + if(!spi_rb || !spi_wb) + { + WIZCHIP.IF.SPI._read_bytes = wizchip_spi_readbytes; + WIZCHIP.IF.SPI._write_bytes = wizchip_spi_writebytes; + } + else + { + WIZCHIP.IF.SPI._read_bytes = spi_rb; + WIZCHIP.IF.SPI._write_bytes = spi_wb; + } +} + +int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg) +{ + uint8_t tmp = 0; + uint8_t* ptmp[2] = {0,0}; + switch(cwtype) + { + case CW_RESET_WIZCHIP: + wizchip_sw_reset(); + break; + case CW_INIT_WIZCHIP: + if(arg != 0) + { + ptmp[0] = (uint8_t*)arg; + ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_; + } + return wizchip_init(ptmp[0], ptmp[1]); + case CW_CLR_INTERRUPT: + wizchip_clrinterrupt(*((intr_kind*)arg)); + break; + case CW_GET_INTERRUPT: + *((intr_kind*)arg) = wizchip_getinterrupt(); + break; + case CW_SET_INTRMASK: + wizchip_setinterruptmask(*((intr_kind*)arg)); + break; + case CW_GET_INTRMASK: + *((intr_kind*)arg) = wizchip_getinterruptmask(); + break; + #if _WIZCHIP_ > 5100 + case CW_SET_INTRTIME: + setINTLEVEL(*(uint16_t*)arg); + break; + case CW_GET_INTRTIME: + *(uint16_t*)arg = getINTLEVEL(); + break; + #endif + case CW_GET_ID: + ((uint8_t*)arg)[0] = WIZCHIP.id[0]; + ((uint8_t*)arg)[1] = WIZCHIP.id[1]; + ((uint8_t*)arg)[2] = WIZCHIP.id[2]; + ((uint8_t*)arg)[3] = WIZCHIP.id[3]; + ((uint8_t*)arg)[4] = WIZCHIP.id[4]; + ((uint8_t*)arg)[5] = 0; + break; + #if _WIZCHIP_ == 5500 + case CW_RESET_PHY: + wizphy_reset(); + break; + case CW_SET_PHYCONF: + wizphy_setphyconf((wiz_PhyConf*)arg); + break; + case CW_GET_PHYCONF: + wizphy_getphyconf((wiz_PhyConf*)arg); + break; + case CW_GET_PHYSTATUS: + break; + case CW_SET_PHYPOWMODE: + return wizphy_setphypmode(*(uint8_t*)arg); + #endif + case CW_GET_PHYPOWMODE: + tmp = wizphy_getphypmode(); + if((int8_t)tmp == -1) return -1; + *(uint8_t*)arg = tmp; + break; + case CW_GET_PHYLINK: + tmp = wizphy_getphylink(); + if((int8_t)tmp == -1) return -1; + *(uint8_t*)arg = tmp; + break; + default: + return -1; + } + return 0; +} + + +int8_t ctlnetwork(ctlnetwork_type cntype, void* arg) +{ + + switch(cntype) + { + case CN_SET_NETINFO: + wizchip_setnetinfo((wiz_NetInfo*)arg); + break; + case CN_GET_NETINFO: + wizchip_getnetinfo((wiz_NetInfo*)arg); + break; + case CN_SET_NETMODE: + return wizchip_setnetmode(*(netmode_type*)arg); + case CN_GET_NETMODE: + *(netmode_type*)arg = wizchip_getnetmode(); + break; + case CN_SET_TIMEOUT: + wizchip_settimeout((wiz_NetTimeout*)arg); + break; + case CN_GET_TIMEOUT: + wizchip_gettimeout((wiz_NetTimeout*)arg); + break; + default: + return -1; + } + return 0; +} + +void wizchip_sw_reset(void) +{ + uint8_t gw[4], sn[4], sip[4]; + uint8_t mac[6]; + getSHAR(mac); + getGAR(gw); getSUBR(sn); getSIPR(sip); + setMR(MR_RST); + getMR(); // for delay + setSHAR(mac); + setGAR(gw); + setSUBR(sn); + setSIPR(sip); +} + +int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize) +{ + int8_t i; + int8_t tmp = 0; + wizchip_sw_reset(); + if(txsize) + { + tmp = 0; + for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) + tmp += txsize[i]; + if(tmp > 16) return -1; + for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) + setSn_TXBUF_SIZE(i, txsize[i]); + } + if(rxsize) + { + tmp = 0; + for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) + tmp += rxsize[i]; + if(tmp > 16) return -1; + for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) + setSn_RXBUF_SIZE(i, rxsize[i]); + } + + WIZCHIP_EXPORT(socket_reset)(); + + return 0; +} + +void wizchip_clrinterrupt(intr_kind intr) +{ + uint8_t ir = (uint8_t)intr; + uint8_t sir = (uint8_t)((uint16_t)intr >> 8); +#if _WIZCHIP_ < 5500 + ir |= (1<<4); // IK_WOL +#endif +#if _WIZCHIP_ == 5200 + ir |= (1 << 6); +#endif + +#if _WIZCHIP_ < 5200 + sir &= 0x0F; +#endif + +#if _WIZCHIP_ == 5100 + ir |= sir; + setIR(ir); +#else + setIR(ir); + setSIR(sir); +#endif +} + +intr_kind wizchip_getinterrupt(void) +{ + uint8_t ir = 0; + uint8_t sir = 0; + uint16_t ret = 0; +#if _WIZCHIP_ == 5100 + ir = getIR(); + sir = ir 0x0F; +#else + ir = getIR(); + sir = getSIR(); +#endif + +#if _WIZCHIP_ < 5500 + ir &= ~(1<<4); // IK_WOL +#endif +#if _WIZCHIP_ == 5200 + ir &= ~(1 << 6); +#endif + ret = sir; + ret = (ret << 8) + ir; + return (intr_kind)ret; +} + +void wizchip_setinterruptmask(intr_kind intr) +{ + uint8_t imr = (uint8_t)intr; + uint8_t simr = (uint8_t)((uint16_t)intr >> 8); +#if _WIZCHIP_ < 5500 + imr &= ~(1<<4); // IK_WOL +#endif +#if _WIZCHIP_ == 5200 + imr &= ~(1 << 6); +#endif + +#if _WIZCHIP_ < 5200 + simr &= 0x0F; +#endif + +#if _WIZCHIP_ == 5100 + imr |= simr; + setIMR(imr); +#else + setIMR(imr); + setSIMR(simr); +#endif +} + +intr_kind wizchip_getinterruptmask(void) +{ + uint8_t imr = 0; + uint8_t simr = 0; + uint16_t ret = 0; +#if _WIZCHIP_ == 5100 + imr = getIMR(); + simr = imr 0x0F; +#else + imr = getIMR(); + simr = getSIMR(); +#endif + +#if _WIZCHIP_ < 5500 + imr &= ~(1<<4); // IK_WOL +#endif +#if _WIZCHIP_ == 5200 + imr &= ~(1 << 6); // IK_DEST_UNREACH +#endif + ret = simr; + ret = (ret << 8) + imr; + return (intr_kind)ret; +} + +int8_t wizphy_getphylink(void) +{ + int8_t tmp; +#if _WIZCHIP_ == 5200 + if(getPHYSTATUS() & PHYSTATUS_LINK) + tmp = PHY_LINK_ON; + else + tmp = PHY_LINK_OFF; +#elif _WIZCHIP_ == 5500 + if(getPHYCFGR() & PHYCFGR_LNK_ON) + tmp = PHY_LINK_ON; + else + tmp = PHY_LINK_OFF; +#else + tmp = -1; +#endif + return tmp; +} + +#if _WIZCHIP_ > 5100 + +int8_t wizphy_getphypmode(void) +{ + int8_t tmp = 0; + #if _WIZCHIP_ == 5200 + if(getPHYSTATUS() & PHYSTATUS_POWERDOWN) + tmp = PHY_POWER_DOWN; + else + tmp = PHY_POWER_NORM; + #elif _WIZCHIP_ == 5500 + if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN) + tmp = PHY_POWER_DOWN; + else + tmp = PHY_POWER_NORM; + #else + tmp = -1; + #endif + return tmp; +} +#endif + +#if _WIZCHIP_ == 5500 +void wizphy_reset(void) +{ + uint8_t tmp = getPHYCFGR(); + tmp &= PHYCFGR_RST; + setPHYCFGR(tmp); + tmp = getPHYCFGR(); + tmp |= ~PHYCFGR_RST; + setPHYCFGR(tmp); +} + +void wizphy_setphyconf(wiz_PhyConf* phyconf) +{ + uint8_t tmp = 0; + if(phyconf->by == PHY_CONFBY_SW) + tmp |= PHYCFGR_OPMD; + else + tmp &= ~PHYCFGR_OPMD; + if(phyconf->mode == PHY_MODE_AUTONEGO) + tmp |= PHYCFGR_OPMDC_ALLA; + else + { + if(phyconf->duplex == PHY_DUPLEX_FULL) + { + if(phyconf->speed == PHY_SPEED_100) + tmp |= PHYCFGR_OPMDC_100F; + else + tmp |= PHYCFGR_OPMDC_10F; + } + else + { + if(phyconf->speed == PHY_SPEED_100) + tmp |= PHYCFGR_OPMDC_100H; + else + tmp |= PHYCFGR_OPMDC_10H; + } + } + setPHYCFGR(tmp); + wizphy_reset(); +} + +void wizphy_getphyconf(wiz_PhyConf* phyconf) +{ + uint8_t tmp = 0; + tmp = getPHYCFGR(); + phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW; + switch(tmp & PHYCFGR_OPMDC_ALLA) + { + case PHYCFGR_OPMDC_ALLA: + case PHYCFGR_OPMDC_100FA: + phyconf->mode = PHY_MODE_AUTONEGO; + break; + default: + phyconf->mode = PHY_MODE_MANUAL; + break; + } + switch(tmp & PHYCFGR_OPMDC_ALLA) + { + case PHYCFGR_OPMDC_100FA: + case PHYCFGR_OPMDC_100F: + case PHYCFGR_OPMDC_100H: + phyconf->speed = PHY_SPEED_100; + break; + default: + phyconf->speed = PHY_SPEED_10; + break; + } + switch(tmp & PHYCFGR_OPMDC_ALLA) + { + case PHYCFGR_OPMDC_100FA: + case PHYCFGR_OPMDC_100F: + case PHYCFGR_OPMDC_10F: + phyconf->duplex = PHY_DUPLEX_FULL; + break; + default: + phyconf->duplex = PHY_DUPLEX_HALF; + break; + } +} + +void wizphy_getphystat(wiz_PhyConf* phyconf) +{ + uint8_t tmp = getPHYCFGR(); + phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF; + phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10; +} + +int8_t wizphy_setphypmode(uint8_t pmode) +{ + uint8_t tmp = 0; + tmp = getPHYCFGR(); + if((tmp & PHYCFGR_OPMD)== 0) return -1; + tmp &= ~PHYCFGR_OPMDC_ALLA; + if( pmode == PHY_POWER_DOWN) + tmp |= PHYCFGR_OPMDC_PDOWN; + else + tmp |= PHYCFGR_OPMDC_ALLA; + setPHYCFGR(tmp); + wizphy_reset(); + tmp = getPHYCFGR(); + if( pmode == PHY_POWER_DOWN) + { + if(tmp & PHYCFGR_OPMDC_PDOWN) return 0; + } + else + { + if(tmp & PHYCFGR_OPMDC_ALLA) return 0; + } + return -1; +} +#endif + + +void wizchip_setnetinfo(wiz_NetInfo* pnetinfo) +{ + setSHAR(pnetinfo->mac); + setGAR(pnetinfo->gw); + setSUBR(pnetinfo->sn); + setSIPR(pnetinfo->ip); +#if _WIZCHIP_ == 5200 // for W5200 ARP errata + _SUBN_[0] = pnetinfo->sn[0]; + _SUBN_[1] = pnetinfo->sn[1]; + _SUBN_[2] = pnetinfo->sn[2]; + _SUBN_[3] = pnetinfo->sn[3]; +#endif + _DNS_[0] = pnetinfo->dns[0]; + _DNS_[1] = pnetinfo->dns[1]; + _DNS_[2] = pnetinfo->dns[2]; + _DNS_[3] = pnetinfo->dns[3]; + _DHCP_ = pnetinfo->dhcp; +} + +void wizchip_getnetinfo(wiz_NetInfo* pnetinfo) +{ + getSHAR(pnetinfo->mac); + getGAR(pnetinfo->gw); + getSUBR(pnetinfo->sn); + getSIPR(pnetinfo->ip); +#if _WIZCHIP_ == 5200 // for W5200 ARP errata + pnetinfo->sn[0] = _SUBN_[0]; + pnetinfo->sn[1] = _SUBN_[1]; + pnetinfo->sn[2] = _SUBN_[2]; + pnetinfo->sn[3] = _SUBN_[3]; +#endif + pnetinfo->dns[0]= _DNS_[0]; + pnetinfo->dns[1]= _DNS_[1]; + pnetinfo->dns[2]= _DNS_[2]; + pnetinfo->dns[3]= _DNS_[3]; + pnetinfo->dhcp = _DHCP_; +} + +#if _WIZCHIP_ == 5200 // for W5200 ARP errata +uint8_t *wizchip_getsubn(void) { + return _SUBN_; +} +#endif + +int8_t wizchip_setnetmode(netmode_type netmode) +{ + uint8_t tmp = 0; +#if _WIZCHIP_ != 5500 + if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1; +#else + if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1; +#endif + tmp = getMR(); + tmp |= (uint8_t)netmode; + setMR(tmp); + return 0; +} + +netmode_type wizchip_getnetmode(void) +{ + return (netmode_type) getMR(); +} + +void wizchip_settimeout(wiz_NetTimeout* nettime) +{ + setRCR(nettime->retry_cnt); + setRTR(nettime->time_100us); +} + +void wizchip_gettimeout(wiz_NetTimeout* nettime) +{ + nettime->retry_cnt = getRCR(); + nettime->time_100us = getRTR(); +} diff --git a/drivers/wiznet5k/ethernet/wizchip_conf.h b/drivers/wiznet5k/ethernet/wizchip_conf.h new file mode 100644 index 0000000000000..10f12a79475ec --- /dev/null +++ b/drivers/wiznet5k/ethernet/wizchip_conf.h @@ -0,0 +1,554 @@ +//***************************************************************************** +// +//! \file wizchip_conf.h +//! \brief WIZCHIP Config Header File. +//! \version 1.0.0 +//! \date 2013/10/21 +//! \par Revision history +//! <2013/10/21> 1st Release +//! \author MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +/** + * @defgroup extra_functions 2. WIZnet Extra Functions + * + * @brief These functions is optional function. It could be replaced at WIZCHIP I/O function because they were made by WIZCHIP I/O functions. + * @details There are functions of configuring WIZCHIP, network, interrupt, phy, network information and timer. \n + * + */ + +#ifndef _WIZCHIP_CONF_H_ +#define _WIZCHIP_CONF_H_ + +#include +/** + * @brief Select WIZCHIP. + * @todo You should select one, \b 5100, \b 5200 ,\b 5500 or etc. \n\n + * ex> #define \_WIZCHIP_ 5500 + */ +#ifndef _WIZCHIP_ +#define _WIZCHIP_ 5200 // 5100, 5200, 5500 +#endif + +#define _WIZCHIP_IO_MODE_NONE_ 0x0000 +#define _WIZCHIP_IO_MODE_BUS_ 0x0100 /**< Bus interface mode */ +#define _WIZCHIP_IO_MODE_SPI_ 0x0200 /**< SPI interface mode */ +//#define _WIZCHIP_IO_MODE_IIC_ 0x0400 +//#define _WIZCHIP_IO_MODE_SDIO_ 0x0800 +// Add to +// + +#define _WIZCHIP_IO_MODE_BUS_DIR_ (_WIZCHIP_IO_MODE_BUS_ + 1) /**< BUS interface mode for direct */ +#define _WIZCHIP_IO_MODE_BUS_INDIR_ (_WIZCHIP_IO_MODE_BUS_ + 2) /**< BUS interface mode for indirect */ + +#define _WIZCHIP_IO_MODE_SPI_VDM_ (_WIZCHIP_IO_MODE_SPI_ + 1) /**< SPI interface mode for variable length data*/ +#define _WIZCHIP_IO_MODE_SPI_FDM_ (_WIZCHIP_IO_MODE_SPI_ + 2) /**< SPI interface mode for fixed length data mode*/ + + +#if (_WIZCHIP_ == 5100) + #define _WIZCHIP_ID_ "W5100\0" +/** + * @brief Define interface mode. + * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ + */ + +// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_DIR_ +// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_ + #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_ + +#elif (_WIZCHIP_ == 5200) + #define _WIZCHIP_ID_ "W5200\0" +/** + * @brief Define interface mode. + * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ + */ +// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_ + #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_ + #include "w5200/w5200.h" +#elif (_WIZCHIP_ == 5500) + #define _WIZCHIP_ID_ "W5500\0" + +/** + * @brief Define interface mode. \n + * @todo Should select interface mode as chip. + * - @ref \_WIZCHIP_IO_MODE_SPI_ \n + * -@ref \_WIZCHIP_IO_MODE_SPI_VDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n + * -@ref \_WIZCHIP_IO_MODE_SPI_FDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n + * - @ref \_WIZCHIP_IO_MODE_BUS_ \n + * - @ref \_WIZCHIP_IO_MODE_BUS_DIR_ \n + * - @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ \n + * - Others will be defined in future. \n\n + * ex> #define \_WIZCHIP_IO_MODE_ \_WIZCHIP_IO_MODE_SPI_VDM_ + * + */ + //#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_FDM_ + #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_VDM_ + #include "w5500/w5500.h" +#else + #error "Unknown defined _WIZCHIP_. You should define one of 5100, 5200, and 5500 !!!" +#endif + +#ifndef _WIZCHIP_IO_MODE_ + #error "Undefined _WIZCHIP_IO_MODE_. You should define it !!!" +#endif + +/** + * @brief Define I/O base address when BUS IF mode. + * @todo Should re-define it to fit your system when BUS IF Mode (@ref \_WIZCHIP_IO_MODE_BUS_, + * @ref \_WIZCHIP_IO_MODE_BUS_DIR_, @ref \_WIZCHIP_IO_MODE_BUS_INDIR_). \n\n + * ex> #define \_WIZCHIP_IO_BASE_ 0x00008000 + */ +#define _WIZCHIP_IO_BASE_ 0x00000000 // + +#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_ + #ifndef _WIZCHIP_IO_BASE_ + #error "You should be define _WIZCHIP_IO_BASE to fit your system memory map." + #endif +#endif + +#if _WIZCHIP_ > 5100 + #define _WIZCHIP_SOCK_NUM_ 8 ///< The count of independant socket of @b WIZCHIP +#else + #define _WIZCHIP_SOCK_NUM_ 4 ///< The count of independant socket of @b WIZCHIP +#endif + + +/******************************************************** +* WIZCHIP BASIC IF functions for SPI, SDIO, I2C , ETC. +*********************************************************/ +/** + * @ingroup DATA_TYPE + * @brief The set of callback functions for W5500:@ref WIZCHIP_IO_Functions W5200:@ref WIZCHIP_IO_Functions_W5200 + */ +typedef struct __WIZCHIP +{ + uint16_t if_mode; ///< host interface mode + uint8_t id[6]; ///< @b WIZCHIP ID such as @b 5100, @b 5200, @b 5500, and so on. + /** + * The set of critical section callback func. + */ + struct _CRIS + { + void (*_enter) (void); ///< crtical section enter + void (*_exit) (void); ///< critial section exit + }CRIS; + /** + * The set of @ref\_WIZCHIP_ select control callback func. + */ + struct _CS + { + void (*_select) (void); ///< @ref \_WIZCHIP_ selected + void (*_deselect)(void); ///< @ref \_WIZCHIP_ deselected + }CS; + /** + * The set of interface IO callback func. + */ + union _IF + { + /** + * For BUS interface IO + */ + struct + { + uint8_t (*_read_byte) (uint32_t AddrSel); + void (*_write_byte) (uint32_t AddrSel, uint8_t wb); + }BUS; + /** + * For SPI interface IO + */ + struct + { + void (*_read_bytes) (uint8_t *buf, uint32_t len); + void (*_write_bytes) (const uint8_t *buf, uint32_t len); + }SPI; + // To be added + // + }IF; +}_WIZCHIP; + +extern _WIZCHIP WIZCHIP; + +/** + * @ingroup DATA_TYPE + * WIZCHIP control type enumration used in @ref ctlwizchip(). + */ +typedef enum +{ + CW_RESET_WIZCHIP, ///< Resets WIZCHIP by softly + CW_INIT_WIZCHIP, ///< Inializes to WIZCHIP with SOCKET buffer size 2 or 1 dimension array typed uint8_t. + CW_GET_INTERRUPT, ///< Get Interrupt status of WIZCHIP + CW_CLR_INTERRUPT, ///< Clears interrupt + CW_SET_INTRMASK, ///< Masks interrupt + CW_GET_INTRMASK, ///< Get interrupt mask + CW_SET_INTRTIME, ///< Set interval time between the current and next interrupt. + CW_GET_INTRTIME, ///< Set interval time between the current and next interrupt. + CW_GET_ID, ///< Gets WIZCHIP name. + +#if _WIZCHIP_ == 5500 + CW_RESET_PHY, ///< Resets internal PHY. Valid Only W5000 + CW_SET_PHYCONF, ///< When PHY configured by interal register, PHY operation mode (Manual/Auto, 10/100, Half/Full). Valid Only W5000 + CW_GET_PHYCONF, ///< Get PHY operation mode in interal register. Valid Only W5000 + CW_GET_PHYSTATUS, ///< Get real PHY status on operating. Valid Only W5000 + CW_SET_PHYPOWMODE, ///< Set PHY power mode as noraml and down when PHYSTATUS.OPMD == 1. Valid Only W5000 +#endif + CW_GET_PHYPOWMODE, ///< Get PHY Power mode as down or normal + CW_GET_PHYLINK ///< Get PHY Link status +}ctlwizchip_type; + +/** + * @ingroup DATA_TYPE + * Network control type enumration used in @ref ctlnetwork(). + */ +typedef enum +{ + CN_SET_NETINFO, ///< Set Network with @ref wiz_NetInfo + CN_GET_NETINFO, ///< Get Network with @ref wiz_NetInfo + CN_SET_NETMODE, ///< Set network mode as WOL, PPPoE, Ping Block, and Force ARP mode + CN_GET_NETMODE, ///< Get network mode as WOL, PPPoE, Ping Block, and Force ARP mode + CN_SET_TIMEOUT, ///< Set network timeout as retry count and time. + CN_GET_TIMEOUT, ///< Get network timeout as retry count and time. +}ctlnetwork_type; + +/** + * @ingroup DATA_TYPE + * Interrupt kind when CW_SET_INTRRUPT, CW_GET_INTERRUPT, CW_SET_INTRMASK + * and CW_GET_INTRMASK is used in @ref ctlnetwork(). + * It can be used with OR operation. + */ +typedef enum +{ +#if _WIZCHIP_ > 5200 + IK_WOL = (1 << 4), ///< Wake On Lan by receiving the magic packet. Valid in W500. +#endif + + IK_PPPOE_TERMINATED = (1 << 5), ///< PPPoE Disconnected + +#if _WIZCHIP_ != 5200 + IK_DEST_UNREACH = (1 << 6), ///< Destination IP & Port Unreable, No use in W5200 +#endif + + IK_IP_CONFLICT = (1 << 7), ///< IP conflict occurred + + IK_SOCK_0 = (1 << 8), ///< Socket 0 interrupt + IK_SOCK_1 = (1 << 9), ///< Socket 1 interrupt + IK_SOCK_2 = (1 << 10), ///< Socket 2 interrupt + IK_SOCK_3 = (1 << 11), ///< Socket 3 interrupt +#if _WIZCHIP_ > 5100 + IK_SOCK_4 = (1 << 12), ///< Socket 4 interrupt, No use in 5100 + IK_SOCK_5 = (1 << 13), ///< Socket 5 interrupt, No use in 5100 + IK_SOCK_6 = (1 << 14), ///< Socket 6 interrupt, No use in 5100 + IK_SOCK_7 = (1 << 15), ///< Socket 7 interrupt, No use in 5100 +#endif + +#if _WIZCHIP_ > 5100 + IK_SOCK_ALL = (0xFF << 8) ///< All Socket interrpt +#else + IK_SOCK_ALL = (0x0F << 8) ///< All Socket interrpt +#endif +}intr_kind; + +#define PHY_CONFBY_HW 0 ///< Configured PHY operation mode by HW pin +#define PHY_CONFBY_SW 1 ///< Configured PHY operation mode by SW register +#define PHY_MODE_MANUAL 0 ///< Configured PHY operation mode with user setting. +#define PHY_MODE_AUTONEGO 1 ///< Configured PHY operation mode with auto-negotiation +#define PHY_SPEED_10 0 ///< Link Speed 10 +#define PHY_SPEED_100 1 ///< Link Speed 100 +#define PHY_DUPLEX_HALF 0 ///< Link Half-Duplex +#define PHY_DUPLEX_FULL 1 ///< Link Full-Duplex +#define PHY_LINK_OFF 0 ///< Link Off +#define PHY_LINK_ON 1 ///< Link On +#define PHY_POWER_NORM 0 ///< PHY power normal mode +#define PHY_POWER_DOWN 1 ///< PHY power down mode + + +#if _WIZCHIP_ == 5500 +/** + * @ingroup DATA_TYPE + * It configures PHY configuration when CW_SET PHYCONF or CW_GET_PHYCONF in W5500, + * and it indicates the real PHY status configured by HW or SW in all WIZCHIP. \n + * Valid only in W5500. + */ +typedef struct wiz_PhyConf_t +{ + uint8_t by; ///< set by @ref PHY_CONFBY_HW or @ref PHY_CONFBY_SW + uint8_t mode; ///< set by @ref PHY_MODE_MANUAL or @ref PHY_MODE_AUTONEGO + uint8_t speed; ///< set by @ref PHY_SPEED_10 or @ref PHY_SPEED_100 + uint8_t duplex; ///< set by @ref PHY_DUPLEX_HALF @ref PHY_DUPLEX_FULL + //uint8_t power; ///< set by @ref PHY_POWER_NORM or @ref PHY_POWER_DOWN + //uint8_t link; ///< Valid only in CW_GET_PHYSTATUS. set by @ref PHY_LINK_ON or PHY_DUPLEX_OFF + }wiz_PhyConf; +#endif + +/** + * @ingroup DATA_TYPE + * It used in setting dhcp_mode of @ref wiz_NetInfo. + */ +typedef enum +{ + NETINFO_STATIC = 1, ///< Static IP configuration by manually. + NETINFO_DHCP ///< Dynamic IP configruation from a DHCP sever +}dhcp_mode; + +/** + * @ingroup DATA_TYPE + * Network Information for WIZCHIP + */ +typedef struct wiz_NetInfo_t +{ + uint8_t mac[6]; ///< Source Mac Address + uint8_t ip[4]; ///< Source IP Address + uint8_t sn[4]; ///< Subnet Mask + uint8_t gw[4]; ///< Gateway IP Address + uint8_t dns[4]; ///< DNS server IP Address + dhcp_mode dhcp; ///< 1 - Static, 2 - DHCP +}wiz_NetInfo; + +/** + * @ingroup DATA_TYPE + * Network mode + */ +typedef enum +{ +#if _WIZCHIP_ == 5500 + NM_FORCEARP = (1<<1), ///< Force to APP send whenever udp data is sent. Valid only in W5500 +#endif + NM_WAKEONLAN = (1<<5), ///< Wake On Lan + NM_PINGBLOCK = (1<<4), ///< Block ping-request + NM_PPPOE = (1<<3), ///< PPPoE mode +}netmode_type; + +/** + * @ingroup DATA_TYPE + * Used in CN_SET_TIMEOUT or CN_GET_TIMEOUT of @ref ctlwizchip() for timeout configruation. + */ +typedef struct wiz_NetTimeout_t +{ + uint8_t retry_cnt; ///< retry count + uint16_t time_100us; ///< time unit 100us +}wiz_NetTimeout; + +/** + *@brief Registers call back function for critical section of I/O functions such as + *\ref WIZCHIP_READ, @ref WIZCHIP_WRITE, @ref WIZCHIP_READ_BUF and @ref WIZCHIP_WRITE_BUF. + *@param cris_en : callback function for critical section enter. + *@param cris_ex : callback function for critical section exit. + *@todo Describe @ref WIZCHIP_CRITICAL_ENTER and @ref WIZCHIP_CRITICAL_EXIT marco or register your functions. + *@note If you do not describe or register, default functions(@ref wizchip_cris_enter & @ref wizchip_cris_exit) is called. + */ +void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void)); + + +/** + *@brief Registers call back function for WIZCHIP select & deselect. + *@param cs_sel : callback function for WIZCHIP select + *@param cs_desel : callback fucntion for WIZCHIP deselect + *@todo Describe @ref wizchip_cs_select and @ref wizchip_cs_deselect function or register your functions. + *@note If you do not describe or register, null function is called. + */ +void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void)); + +/** + *@brief Registers call back function for bus interface. + *@param bus_rb : callback function to read byte data using system bus + *@param bus_wb : callback function to write byte data using system bus + *@todo Describe @ref wizchip_bus_readbyte and @ref wizchip_bus_writebyte function + *or register your functions. + *@note If you do not describe or register, null function is called. + */ +void reg_wizchip_bus_cbfunc(uint8_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb)); + +/** + *@brief Registers call back function for SPI interface. + *@param spi_rb : callback function to read byte usig SPI + *@param spi_wb : callback function to write byte usig SPI + *@todo Describe \ref wizchip_spi_readbyte and \ref wizchip_spi_writebyte function + *or register your functions. + *@note If you do not describe or register, null function is called. + */ +void reg_wizchip_spi_cbfunc(void (*spi_rb)(uint8_t *, uint32_t), void (*spi_wb)(const uint8_t *, uint32_t)); + +/** + * @ingroup extra_functions + * @brief Controls to the WIZCHIP. + * @details Resets WIZCHIP & internal PHY, Configures PHY mode, Monitor PHY(Link,Speed,Half/Full/Auto), + * controls interrupt & mask and so on. + * @param cwtype : Decides to the control type + * @param arg : arg type is dependent on cwtype. + * @return 0 : Success \n + * -1 : Fail because of invalid \ref ctlwizchip_type or unsupported \ref ctlwizchip_type in WIZCHIP + */ +int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg); + +/** + * @ingroup extra_functions + * @brief Controls to network. + * @details Controls to network environment, mode, timeout and so on. + * @param cntype : Input. Decides to the control type + * @param arg : Inout. arg type is dependent on cntype. + * @return -1 : Fail because of invalid \ref ctlnetwork_type or unsupported \ref ctlnetwork_type in WIZCHIP \n + * 0 : Success + */ +int8_t ctlnetwork(ctlnetwork_type cntype, void* arg); + + +/* + * The following functions are implemented for internal use. + * but You can call these functions for code size reduction instead of ctlwizchip() and ctlnetwork(). + */ + +/** + * @ingroup extra_functions + * @brief Reset WIZCHIP by softly. + */ +void wizchip_sw_reset(void); + +/** + * @ingroup extra_functions + * @brief Initializes WIZCHIP with socket buffer size + * @param txsize Socket tx buffer sizes. If null, initialized the default size 2KB. + * @param rxsize Socket rx buffer sizes. If null, initialized the default size 2KB. + * @return 0 : succcess \n + * -1 : fail. Invalid buffer size + */ +int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize); + +/** + * @ingroup extra_functions + * @brief Clear Interrupt of WIZCHIP. + * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t. + */ +void wizchip_clrinterrupt(intr_kind intr); + +/** + * @ingroup extra_functions + * @brief Get Interrupt of WIZCHIP. + * @return @ref intr_kind value operated OR. It can type-cast to uint16_t. + */ +intr_kind wizchip_getinterrupt(void); + +/** + * @ingroup extra_functions + * @brief Mask or Unmask Interrupt of WIZCHIP. + * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t. + */ +void wizchip_setinterruptmask(intr_kind intr); + +/** + * @ingroup extra_functions + * @brief Get Interrupt mask of WIZCHIP. + * @return : The operated OR vaule of @ref intr_kind. It can type-cast to uint16_t. + */ +intr_kind wizchip_getinterruptmask(void); + +#if _WIZCHIP_ > 5100 + int8_t wizphy_getphylink(void); ///< get the link status of phy in WIZCHIP. No use in W5100 + int8_t wizphy_getphypmode(void); ///< get the power mode of PHY in WIZCHIP. No use in W5100 +#endif + +#if _WIZCHIP_ == 5500 + void wizphy_reset(void); ///< Reset phy. Vailid only in W5500 +/** + * @ingroup extra_functions + * @brief Set the phy information for WIZCHIP without power mode + * @param phyconf : @ref wiz_PhyConf + */ + void wizphy_setphyconf(wiz_PhyConf* phyconf); + /** + * @ingroup extra_functions + * @brief Get phy configuration information. + * @param phyconf : @ref wiz_PhyConf + */ + void wizphy_getphyconf(wiz_PhyConf* phyconf); + /** + * @ingroup extra_functions + * @brief Get phy status. + * @param phyconf : @ref wiz_PhyConf + */ + void wizphy_getphystat(wiz_PhyConf* phyconf); + /** + * @ingroup extra_functions + * @brief set the power mode of phy inside WIZCHIP. Refer to @ref PHYCFGR in W5500, @ref PHYSTATUS in W5200 + * @param pmode Settig value of power down mode. + */ + int8_t wizphy_setphypmode(uint8_t pmode); +#endif + +/** +* @ingroup extra_functions + * @brief Set the network information for WIZCHIP + * @param pnetinfo : @ref wizNetInfo + */ +void wizchip_setnetinfo(wiz_NetInfo* pnetinfo); + +/** + * @ingroup extra_functions + * @brief Get the network information for WIZCHIP + * @param pnetinfo : @ref wizNetInfo + */ +void wizchip_getnetinfo(wiz_NetInfo* pnetinfo); + +#if _WIZCHIP_ == 5200 // for W5200 ARP errata +uint8_t *wizchip_getsubn(void); +#endif + +/** + * @ingroup extra_functions + * @brief Set the network mode such WOL, PPPoE, Ping Block, and etc. + * @param pnetinfo Value of network mode. Refer to @ref netmode_type. + */ +int8_t wizchip_setnetmode(netmode_type netmode); + +/** + * @ingroup extra_functions + * @brief Get the network mode such WOL, PPPoE, Ping Block, and etc. + * @return Value of network mode. Refer to @ref netmode_type. + */ +netmode_type wizchip_getnetmode(void); + +/** + * @ingroup extra_functions + * @brief Set retry time value(@ref RTR) and retry count(@ref RCR). + * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission. + * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. + */ +void wizchip_settimeout(wiz_NetTimeout* nettime); + +/** + * @ingroup extra_functions + * @brief Get retry time value(@ref RTR) and retry count(@ref RCR). + * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission. + * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. + */ +void wizchip_gettimeout(wiz_NetTimeout* nettime); + +#endif // _WIZCHIP_CONF_H_ diff --git a/drivers/wiznet5k/internet/dhcp/dhcp.c b/drivers/wiznet5k/internet/dhcp/dhcp.c new file mode 100644 index 0000000000000..00f41c3c7239c --- /dev/null +++ b/drivers/wiznet5k/internet/dhcp/dhcp.c @@ -0,0 +1,975 @@ +//***************************************************************************** +// +//! \file dhcp.c +//! \brief DHCP APIs implement file. +//! \details Processig DHCP protocol as DISCOVER, OFFER, REQUEST, ACK, NACK and DECLINE. +//! \version 1.1.0 +//! \date 2013/11/18 +//! \par Revision history +//! <2018/10/09> Modified by Nick Moore for CircuitPython +//! <2013/11/18> 1st Release +//! <2012/12/20> V1.1.0 +//! 1. Optimize code +//! 2. Add reg_dhcp_cbfunc() +//! 3. Add DHCP_stop() +//! 4. Integrate check_DHCP_state() & DHCP_run() to DHCP_run() +//! 5. Don't care system endian +//! 6. Add comments +//! <2012/12/26> V1.1.1 +//! 1. Modify variable declaration: dhcp_tick_1s is declared volatile for code optimization +//! \author Eric Jung & MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +//#include "Ethernet/socket.h" +//#include "Internet/DHCP/dhcp.h" +#include "../../ethernet/socket.h" +#include "dhcp.h" + +/* If you want to display debug & processing message, Define _DHCP_DEBUG_ in dhcp.h */ + +#ifdef _DHCP_DEBUG_ + #include +#endif + +/* DHCP state machine. */ +#define STATE_DHCP_INIT 0 ///< Initialize +#define STATE_DHCP_DISCOVER 1 ///< send DISCOVER and wait OFFER +#define STATE_DHCP_REQUEST 2 ///< send REQEUST and wait ACK or NACK +#define STATE_DHCP_LEASED 3 ///< ReceiveD ACK and IP leased +#define STATE_DHCP_REREQUEST 4 ///< send REQUEST for maintaining leased IP +#define STATE_DHCP_RELEASE 5 ///< No use +#define STATE_DHCP_STOP 6 ///< Stop processing DHCP + +#define DHCP_FLAGSBROADCAST 0x8000 ///< The broadcast value of flags in @ref RIP_MSG +#define DHCP_FLAGSUNICAST 0x0000 ///< The unicast value of flags in @ref RIP_MSG + +/* DHCP message OP code */ +#define DHCP_BOOTREQUEST 1 ///< Request Message used in op of @ref RIP_MSG +#define DHCP_BOOTREPLY 2 ///< Reply Message used i op of @ref RIP_MSG + +/* DHCP message type */ +#define DHCP_DISCOVER 1 ///< DISCOVER message in OPT of @ref RIP_MSG +#define DHCP_OFFER 2 ///< OFFER message in OPT of @ref RIP_MSG +#define DHCP_REQUEST 3 ///< REQUEST message in OPT of @ref RIP_MSG +#define DHCP_DECLINE 4 ///< DECLINE message in OPT of @ref RIP_MSG +#define DHCP_ACK 5 ///< ACK message in OPT of @ref RIP_MSG +#define DHCP_NAK 6 ///< NACK message in OPT of @ref RIP_MSG +#define DHCP_RELEASE 7 ///< RELEASE message in OPT of @ref RIP_MSG. No use +#define DHCP_INFORM 8 ///< INFORM message in OPT of @ref RIP_MSG. No use + +#define DHCP_HTYPE10MB 1 ///< Used in type of @ref RIP_MSG +#define DHCP_HTYPE100MB 2 ///< Used in type of @ref RIP_MSG + +#define DHCP_HLENETHERNET 6 ///< Used in hlen of @ref RIP_MSG +#define DHCP_HOPS 0 ///< Used in hops of @ref RIP_MSG +#define DHCP_SECS 0 ///< Used in secs of @ref RIP_MSG + +#define INFINITE_LEASETIME 0xffffffff ///< Infinite lease time + +#define OPT_SIZE 312 /// Max OPT size of @ref RIP_MSG +#define RIP_MSG_SIZE (236+OPT_SIZE) /// Max size of @ref RIP_MSG + +/* + * @brief DHCP option and value (cf. RFC1533) + */ +enum +{ + padOption = 0, + subnetMask = 1, + timerOffset = 2, + routersOnSubnet = 3, + timeServer = 4, + nameServer = 5, + dns = 6, + logServer = 7, + cookieServer = 8, + lprServer = 9, + impressServer = 10, + resourceLocationServer = 11, + hostName = 12, + bootFileSize = 13, + meritDumpFile = 14, + domainName = 15, + swapServer = 16, + rootPath = 17, + extentionsPath = 18, + IPforwarding = 19, + nonLocalSourceRouting = 20, + policyFilter = 21, + maxDgramReasmSize = 22, + defaultIPTTL = 23, + pathMTUagingTimeout = 24, + pathMTUplateauTable = 25, + ifMTU = 26, + allSubnetsLocal = 27, + broadcastAddr = 28, + performMaskDiscovery = 29, + maskSupplier = 30, + performRouterDiscovery = 31, + routerSolicitationAddr = 32, + staticRoute = 33, + trailerEncapsulation = 34, + arpCacheTimeout = 35, + ethernetEncapsulation = 36, + tcpDefaultTTL = 37, + tcpKeepaliveInterval = 38, + tcpKeepaliveGarbage = 39, + nisDomainName = 40, + nisServers = 41, + ntpServers = 42, + vendorSpecificInfo = 43, + netBIOSnameServer = 44, + netBIOSdgramDistServer = 45, + netBIOSnodeType = 46, + netBIOSscope = 47, + xFontServer = 48, + xDisplayManager = 49, + dhcpRequestedIPaddr = 50, + dhcpIPaddrLeaseTime = 51, + dhcpOptionOverload = 52, + dhcpMessageType = 53, + dhcpServerIdentifier = 54, + dhcpParamRequest = 55, + dhcpMsg = 56, + dhcpMaxMsgSize = 57, + dhcpT1value = 58, + dhcpT2value = 59, + dhcpClassIdentifier = 60, + dhcpClientIdentifier = 61, + endOption = 255 +}; + +/* + * @brief DHCP message format + */ +typedef struct { + uint8_t op; ///< @ref DHCP_BOOTREQUEST or @ref DHCP_BOOTREPLY + uint8_t htype; ///< @ref DHCP_HTYPE10MB or @ref DHCP_HTYPE100MB + uint8_t hlen; ///< @ref DHCP_HLENETHERNET + uint8_t hops; ///< @ref DHCP_HOPS + uint32_t xid; ///< @ref DHCP_XID This increase one every DHCP transaction. + uint16_t secs; ///< @ref DHCP_SECS + uint16_t flags; ///< @ref DHCP_FLAGSBROADCAST or @ref DHCP_FLAGSUNICAST + uint8_t ciaddr[4]; ///< @ref Request IP to DHCP sever + uint8_t yiaddr[4]; ///< @ref Offered IP from DHCP server + uint8_t siaddr[4]; ///< No use + uint8_t giaddr[4]; ///< No use + uint8_t chaddr[16]; ///< DHCP client 6bytes MAC address. Others is filled to zero + uint8_t sname[64]; ///< No use + uint8_t file[128]; ///< No use + uint8_t OPT[OPT_SIZE]; ///< Option +} RIP_MSG; + + + +uint8_t DHCP_SOCKET; // Socket number for DHCP + +uint8_t DHCP_SIP[4]; // DHCP Server IP address + +// Network information from DHCP Server +uint8_t OLD_allocated_ip[4] = {0, }; // Previous IP address +uint8_t DHCP_allocated_ip[4] = {0, }; // IP address from DHCP +uint8_t DHCP_allocated_gw[4] = {0, }; // Gateway address from DHCP +uint8_t DHCP_allocated_sn[4] = {0, }; // Subnet mask from DHCP +uint8_t DHCP_allocated_dns[4] = {0, }; // DNS address from DHCP + + +int8_t dhcp_state = STATE_DHCP_INIT; // DHCP state +int8_t dhcp_retry_count = 0; + +uint32_t dhcp_lease_time = INFINITE_LEASETIME; +volatile uint32_t dhcp_tick_1s = 0; // unit 1 second +uint32_t dhcp_tick_next = DHCP_WAIT_TIME ; + +uint32_t DHCP_XID; // Any number + +RIP_MSG* pDHCPMSG; // Buffer pointer for DHCP processing + +uint8_t HOST_NAME[] = DCHP_HOST_NAME; + +uint8_t DHCP_CHADDR[6]; // DHCP Client MAC address. + +/* The default callback function */ +void default_ip_assign(void); +void default_ip_update(void); +void default_ip_conflict(void); + +/* Callback handler */ +void (*dhcp_ip_assign)(void) = default_ip_assign; /* handler to be called when the IP address from DHCP server is first assigned */ +void (*dhcp_ip_update)(void) = default_ip_update; /* handler to be called when the IP address from DHCP server is updated */ +void (*dhcp_ip_conflict)(void) = default_ip_conflict; /* handler to be called when the IP address from DHCP server is conflict */ + +void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void)); + + +/* send DISCOVER message to DHCP server */ +void send_DHCP_DISCOVER(void); + +/* send REQEUST message to DHCP server */ +void send_DHCP_REQUEST(void); + +/* send DECLINE message to DHCP server */ +void send_DHCP_DECLINE(void); + +/* IP conflict check by sending ARP-request to leased IP and wait ARP-response. */ +int8_t check_DHCP_leasedIP(void); + +/* check the timeout in DHCP process */ +uint8_t check_DHCP_timeout(void); + +/* Intialize to timeout process. */ +void reset_DHCP_timeout(void); + +/* Parse message as OFFER and ACK and NACK from DHCP server.*/ +int8_t parseDHCPCMSG(void); + +/* The default handler of ip assign first */ +void default_ip_assign(void) +{ + setSIPR(DHCP_allocated_ip); + setSUBR(DHCP_allocated_sn); + setGAR (DHCP_allocated_gw); +} + +/* The default handler of ip changed */ +void default_ip_update(void) +{ + /* WIZchip Software Reset */ + setMR(MR_RST); + getMR(); // for delay + default_ip_assign(); + setSHAR(DHCP_CHADDR); +} + +/* The default handler of ip changed */ +void default_ip_conflict(void) +{ + // WIZchip Software Reset + setMR(MR_RST); + getMR(); // for delay + setSHAR(DHCP_CHADDR); +} + +/* register the call back func. */ +void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void)) +{ + dhcp_ip_assign = default_ip_assign; + dhcp_ip_update = default_ip_update; + dhcp_ip_conflict = default_ip_conflict; + if(ip_assign) dhcp_ip_assign = ip_assign; + if(ip_update) dhcp_ip_update = ip_update; + if(ip_conflict) dhcp_ip_conflict = ip_conflict; +} + +/* make the common DHCP message */ +void makeDHCPMSG(void) +{ + uint8_t bk_mac[6]; + uint8_t* ptmp; + uint8_t i; + getSHAR(bk_mac); + pDHCPMSG->op = DHCP_BOOTREQUEST; + pDHCPMSG->htype = DHCP_HTYPE10MB; + pDHCPMSG->hlen = DHCP_HLENETHERNET; + pDHCPMSG->hops = DHCP_HOPS; + ptmp = (uint8_t*)(&pDHCPMSG->xid); + *(ptmp+0) = (uint8_t)((DHCP_XID & 0xFF000000) >> 24); + *(ptmp+1) = (uint8_t)((DHCP_XID & 0x00FF0000) >> 16); + *(ptmp+2) = (uint8_t)((DHCP_XID & 0x0000FF00) >> 8); + *(ptmp+3) = (uint8_t)((DHCP_XID & 0x000000FF) >> 0); + pDHCPMSG->secs = DHCP_SECS; + ptmp = (uint8_t*)(&pDHCPMSG->flags); + *(ptmp+0) = (uint8_t)((DHCP_FLAGSBROADCAST & 0xFF00) >> 8); + *(ptmp+1) = (uint8_t)((DHCP_FLAGSBROADCAST & 0x00FF) >> 0); + + pDHCPMSG->ciaddr[0] = 0; + pDHCPMSG->ciaddr[1] = 0; + pDHCPMSG->ciaddr[2] = 0; + pDHCPMSG->ciaddr[3] = 0; + + pDHCPMSG->yiaddr[0] = 0; + pDHCPMSG->yiaddr[1] = 0; + pDHCPMSG->yiaddr[2] = 0; + pDHCPMSG->yiaddr[3] = 0; + + pDHCPMSG->siaddr[0] = 0; + pDHCPMSG->siaddr[1] = 0; + pDHCPMSG->siaddr[2] = 0; + pDHCPMSG->siaddr[3] = 0; + + pDHCPMSG->giaddr[0] = 0; + pDHCPMSG->giaddr[1] = 0; + pDHCPMSG->giaddr[2] = 0; + pDHCPMSG->giaddr[3] = 0; + + pDHCPMSG->chaddr[0] = DHCP_CHADDR[0]; + pDHCPMSG->chaddr[1] = DHCP_CHADDR[1]; + pDHCPMSG->chaddr[2] = DHCP_CHADDR[2]; + pDHCPMSG->chaddr[3] = DHCP_CHADDR[3]; + pDHCPMSG->chaddr[4] = DHCP_CHADDR[4]; + pDHCPMSG->chaddr[5] = DHCP_CHADDR[5]; + + for (i = 6; i < 16; i++) pDHCPMSG->chaddr[i] = 0; + for (i = 0; i < 64; i++) pDHCPMSG->sname[i] = 0; + for (i = 0; i < 128; i++) pDHCPMSG->file[i] = 0; + + // MAGIC_COOKIE + pDHCPMSG->OPT[0] = (uint8_t)((MAGIC_COOKIE & 0xFF000000) >> 24); + pDHCPMSG->OPT[1] = (uint8_t)((MAGIC_COOKIE & 0x00FF0000) >> 16); + pDHCPMSG->OPT[2] = (uint8_t)((MAGIC_COOKIE & 0x0000FF00) >> 8); + pDHCPMSG->OPT[3] = (uint8_t) (MAGIC_COOKIE & 0x000000FF) >> 0; +} + +/* SEND DHCP DISCOVER */ +void send_DHCP_DISCOVER(void) +{ + uint16_t i; + uint8_t ip[4]; + uint16_t k = 0; + + makeDHCPMSG(); + + k = 4; // because MAGIC_COOKIE already made by makeDHCPMSG() + + // Option Request Param + pDHCPMSG->OPT[k++] = dhcpMessageType; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_DISCOVER; + + // Client identifier + pDHCPMSG->OPT[k++] = dhcpClientIdentifier; + pDHCPMSG->OPT[k++] = 0x07; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[0]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[1]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[2]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[3]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[4]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[5]; + + // host name + pDHCPMSG->OPT[k++] = hostName; + pDHCPMSG->OPT[k++] = 0; // fill zero length of hostname + for(i = 0 ; HOST_NAME[i] != 0; i++) + pDHCPMSG->OPT[k++] = HOST_NAME[i]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[3]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[4]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[5]; + pDHCPMSG->OPT[k - (i+3+1)] = i+3; // length of hostname + + pDHCPMSG->OPT[k++] = dhcpParamRequest; + pDHCPMSG->OPT[k++] = 0x06; // length of request + pDHCPMSG->OPT[k++] = subnetMask; + pDHCPMSG->OPT[k++] = routersOnSubnet; + pDHCPMSG->OPT[k++] = dns; + pDHCPMSG->OPT[k++] = domainName; + pDHCPMSG->OPT[k++] = dhcpT1value; + pDHCPMSG->OPT[k++] = dhcpT2value; + pDHCPMSG->OPT[k++] = endOption; + + for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0; + + // send broadcasting packet + ip[0] = 255; + ip[1] = 255; + ip[2] = 255; + ip[3] = 255; + +#ifdef _DHCP_DEBUG_ + printf("> Send DHCP_DISCOVER\r\n"); +#endif + + WIZCHIP_EXPORT(sendto)(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT); +} + +/* SEND DHCP REQUEST */ +void send_DHCP_REQUEST(void) +{ + int i; + uint8_t ip[4]; + uint16_t k = 0; + + makeDHCPMSG(); + + if(dhcp_state == STATE_DHCP_LEASED || dhcp_state == STATE_DHCP_REREQUEST) + { + *((uint8_t*)(&pDHCPMSG->flags)) = ((DHCP_FLAGSUNICAST & 0xFF00)>> 8); + *((uint8_t*)(&pDHCPMSG->flags)+1) = (DHCP_FLAGSUNICAST & 0x00FF); + pDHCPMSG->ciaddr[0] = DHCP_allocated_ip[0]; + pDHCPMSG->ciaddr[1] = DHCP_allocated_ip[1]; + pDHCPMSG->ciaddr[2] = DHCP_allocated_ip[2]; + pDHCPMSG->ciaddr[3] = DHCP_allocated_ip[3]; + ip[0] = DHCP_SIP[0]; + ip[1] = DHCP_SIP[1]; + ip[2] = DHCP_SIP[2]; + ip[3] = DHCP_SIP[3]; + } + else + { + ip[0] = 255; + ip[1] = 255; + ip[2] = 255; + ip[3] = 255; + } + + k = 4; // because MAGIC_COOKIE already made by makeDHCPMSG() + + // Option Request Param. + pDHCPMSG->OPT[k++] = dhcpMessageType; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_REQUEST; + + pDHCPMSG->OPT[k++] = dhcpClientIdentifier; + pDHCPMSG->OPT[k++] = 0x07; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[0]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[1]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[2]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[3]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[4]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[5]; + + if(ip[3] == 255) // if(dchp_state == STATE_DHCP_LEASED || dchp_state == DHCP_REREQUEST_STATE) + { + pDHCPMSG->OPT[k++] = dhcpRequestedIPaddr; + pDHCPMSG->OPT[k++] = 0x04; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[0]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[1]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[2]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[3]; + + pDHCPMSG->OPT[k++] = dhcpServerIdentifier; + pDHCPMSG->OPT[k++] = 0x04; + pDHCPMSG->OPT[k++] = DHCP_SIP[0]; + pDHCPMSG->OPT[k++] = DHCP_SIP[1]; + pDHCPMSG->OPT[k++] = DHCP_SIP[2]; + pDHCPMSG->OPT[k++] = DHCP_SIP[3]; + } + + // host name + pDHCPMSG->OPT[k++] = hostName; + pDHCPMSG->OPT[k++] = 0; // length of hostname + for(i = 0 ; HOST_NAME[i] != 0; i++) + pDHCPMSG->OPT[k++] = HOST_NAME[i]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[3]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[4]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[5]; + pDHCPMSG->OPT[k - (i+3+1)] = i+3; // length of hostname + + pDHCPMSG->OPT[k++] = dhcpParamRequest; + pDHCPMSG->OPT[k++] = 0x08; + pDHCPMSG->OPT[k++] = subnetMask; + pDHCPMSG->OPT[k++] = routersOnSubnet; + pDHCPMSG->OPT[k++] = dns; + pDHCPMSG->OPT[k++] = domainName; + pDHCPMSG->OPT[k++] = dhcpT1value; + pDHCPMSG->OPT[k++] = dhcpT2value; + pDHCPMSG->OPT[k++] = performRouterDiscovery; + pDHCPMSG->OPT[k++] = staticRoute; + pDHCPMSG->OPT[k++] = endOption; + + for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0; + +#ifdef _DHCP_DEBUG_ + printf("> Send DHCP_REQUEST\r\n"); +#endif + + WIZCHIP_EXPORT(sendto)(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT); + +} + +/* SEND DHCP DHCPDECLINE */ +void send_DHCP_DECLINE(void) +{ + int i; + uint8_t ip[4]; + uint16_t k = 0; + + makeDHCPMSG(); + + k = 4; // because MAGIC_COOKIE already made by makeDHCPMSG() + + *((uint8_t*)(&pDHCPMSG->flags)) = ((DHCP_FLAGSUNICAST & 0xFF00)>> 8); + *((uint8_t*)(&pDHCPMSG->flags)+1) = (DHCP_FLAGSUNICAST & 0x00FF); + + // Option Request Param. + pDHCPMSG->OPT[k++] = dhcpMessageType; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_DECLINE; + + pDHCPMSG->OPT[k++] = dhcpClientIdentifier; + pDHCPMSG->OPT[k++] = 0x07; + pDHCPMSG->OPT[k++] = 0x01; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[0]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[1]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[2]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[3]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[4]; + pDHCPMSG->OPT[k++] = DHCP_CHADDR[5]; + + pDHCPMSG->OPT[k++] = dhcpRequestedIPaddr; + pDHCPMSG->OPT[k++] = 0x04; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[0]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[1]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[2]; + pDHCPMSG->OPT[k++] = DHCP_allocated_ip[3]; + + pDHCPMSG->OPT[k++] = dhcpServerIdentifier; + pDHCPMSG->OPT[k++] = 0x04; + pDHCPMSG->OPT[k++] = DHCP_SIP[0]; + pDHCPMSG->OPT[k++] = DHCP_SIP[1]; + pDHCPMSG->OPT[k++] = DHCP_SIP[2]; + pDHCPMSG->OPT[k++] = DHCP_SIP[3]; + + pDHCPMSG->OPT[k++] = endOption; + + for (i = k; i < OPT_SIZE; i++) pDHCPMSG->OPT[i] = 0; + + //send broadcasting packet + ip[0] = 0xFF; + ip[1] = 0xFF; + ip[2] = 0xFF; + ip[3] = 0xFF; + +#ifdef _DHCP_DEBUG_ + printf("\r\n> Send DHCP_DECLINE\r\n"); +#endif + + WIZCHIP_EXPORT(sendto)(DHCP_SOCKET, (uint8_t *)pDHCPMSG, RIP_MSG_SIZE, ip, DHCP_SERVER_PORT); +} + +/* PARSE REPLY pDHCPMSG */ +int8_t parseDHCPMSG(void) +{ + uint8_t svr_addr[6]; + uint16_t svr_port; + uint16_t len; + + uint8_t * p; + uint8_t * e; + uint8_t type = 0; + uint8_t opt_len; + + if((len = getSn_RX_RSR(DHCP_SOCKET)) > 0) + { + len = WIZCHIP_EXPORT(recvfrom)(DHCP_SOCKET, (uint8_t *)pDHCPMSG, len, svr_addr, &svr_port); + #ifdef _DHCP_DEBUG_ + printf("DHCP message : %d.%d.%d.%d(%d) %d received. \r\n",svr_addr[0],svr_addr[1],svr_addr[2], svr_addr[3],svr_port, len); + #endif + } + else return 0; + if (svr_port == DHCP_SERVER_PORT) { + // compare mac address + if ( (pDHCPMSG->chaddr[0] != DHCP_CHADDR[0]) || (pDHCPMSG->chaddr[1] != DHCP_CHADDR[1]) || + (pDHCPMSG->chaddr[2] != DHCP_CHADDR[2]) || (pDHCPMSG->chaddr[3] != DHCP_CHADDR[3]) || + (pDHCPMSG->chaddr[4] != DHCP_CHADDR[4]) || (pDHCPMSG->chaddr[5] != DHCP_CHADDR[5]) ) + return 0; + type = 0; + p = (uint8_t *)(&pDHCPMSG->op); + p = p + 240; // 240 = sizeof(RIP_MSG) + MAGIC_COOKIE size in RIP_MSG.opt - sizeof(RIP_MSG.opt) + e = p + (len - 240); + + while ( p < e ) { + + switch ( *p ) { + + case endOption : + p = e; // for break while(p < e) + break; + case padOption : + p++; + break; + case dhcpMessageType : + p++; + p++; + type = *p++; + break; + case subnetMask : + p++; + p++; + DHCP_allocated_sn[0] = *p++; + DHCP_allocated_sn[1] = *p++; + DHCP_allocated_sn[2] = *p++; + DHCP_allocated_sn[3] = *p++; + break; + case routersOnSubnet : + p++; + opt_len = *p++; + DHCP_allocated_gw[0] = *p++; + DHCP_allocated_gw[1] = *p++; + DHCP_allocated_gw[2] = *p++; + DHCP_allocated_gw[3] = *p++; + p = p + (opt_len - 4); + break; + case dns : + p++; + opt_len = *p++; + DHCP_allocated_dns[0] = *p++; + DHCP_allocated_dns[1] = *p++; + DHCP_allocated_dns[2] = *p++; + DHCP_allocated_dns[3] = *p++; + p = p + (opt_len - 4); + break; + case dhcpIPaddrLeaseTime : + p++; + opt_len = *p++; + dhcp_lease_time = *p++; + dhcp_lease_time = (dhcp_lease_time << 8) + *p++; + dhcp_lease_time = (dhcp_lease_time << 8) + *p++; + dhcp_lease_time = (dhcp_lease_time << 8) + *p++; + #ifdef _DHCP_DEBUG_ + dhcp_lease_time = 10; + #endif + break; + case dhcpServerIdentifier : + p++; + opt_len = *p++; + DHCP_SIP[0] = *p++; + DHCP_SIP[1] = *p++; + DHCP_SIP[2] = *p++; + DHCP_SIP[3] = *p++; + break; + default : + p++; + opt_len = *p++; + p += opt_len; + break; + } // switch + } // while + } // if + return type; +} + +uint8_t DHCP_run(void) +{ + uint8_t type; + uint8_t ret; + + if(dhcp_state == STATE_DHCP_STOP) return DHCP_STOPPED; + + if(getSn_SR(DHCP_SOCKET) != SOCK_UDP) + WIZCHIP_EXPORT(socket)(DHCP_SOCKET, Sn_MR_UDP, DHCP_CLIENT_PORT, 0x00); + + ret = DHCP_RUNNING; + type = parseDHCPMSG(); + + switch ( dhcp_state ) { + case STATE_DHCP_INIT : + DHCP_allocated_ip[0] = 0; + DHCP_allocated_ip[1] = 0; + DHCP_allocated_ip[2] = 0; + DHCP_allocated_ip[3] = 0; + send_DHCP_DISCOVER(); + dhcp_state = STATE_DHCP_DISCOVER; + break; + case STATE_DHCP_DISCOVER : + if (type == DHCP_OFFER){ +#ifdef _DHCP_DEBUG_ + printf("> Receive DHCP_OFFER\r\n"); +#endif + DHCP_allocated_ip[0] = pDHCPMSG->yiaddr[0]; + DHCP_allocated_ip[1] = pDHCPMSG->yiaddr[1]; + DHCP_allocated_ip[2] = pDHCPMSG->yiaddr[2]; + DHCP_allocated_ip[3] = pDHCPMSG->yiaddr[3]; + + send_DHCP_REQUEST(); + dhcp_state = STATE_DHCP_REQUEST; + } else ret = check_DHCP_timeout(); + break; + + case STATE_DHCP_REQUEST : + if (type == DHCP_ACK) { + +#ifdef _DHCP_DEBUG_ + printf("> Receive DHCP_ACK\r\n"); +#endif + if (check_DHCP_leasedIP()) { + // Network info assignment from DHCP + dhcp_ip_assign(); + reset_DHCP_timeout(); + + dhcp_state = STATE_DHCP_LEASED; + } else { + // IP address conflict occurred + reset_DHCP_timeout(); + dhcp_ip_conflict(); + dhcp_state = STATE_DHCP_INIT; + } + } else if (type == DHCP_NAK) { + +#ifdef _DHCP_DEBUG_ + printf("> Receive DHCP_NACK\r\n"); +#endif + + reset_DHCP_timeout(); + + dhcp_state = STATE_DHCP_DISCOVER; + } else ret = check_DHCP_timeout(); + break; + + case STATE_DHCP_LEASED : + ret = DHCP_IP_LEASED; + if ((dhcp_lease_time != INFINITE_LEASETIME) && ((dhcp_lease_time/2) < dhcp_tick_1s)) { + +#ifdef _DHCP_DEBUG_ + printf("> Maintains the IP address \r\n"); +#endif + + type = 0; + OLD_allocated_ip[0] = DHCP_allocated_ip[0]; + OLD_allocated_ip[1] = DHCP_allocated_ip[1]; + OLD_allocated_ip[2] = DHCP_allocated_ip[2]; + OLD_allocated_ip[3] = DHCP_allocated_ip[3]; + + DHCP_XID++; + + send_DHCP_REQUEST(); + + reset_DHCP_timeout(); + + dhcp_state = STATE_DHCP_REREQUEST; + } + break; + + case STATE_DHCP_REREQUEST : + ret = DHCP_IP_LEASED; + if (type == DHCP_ACK) { + dhcp_retry_count = 0; + if (OLD_allocated_ip[0] != DHCP_allocated_ip[0] || + OLD_allocated_ip[1] != DHCP_allocated_ip[1] || + OLD_allocated_ip[2] != DHCP_allocated_ip[2] || + OLD_allocated_ip[3] != DHCP_allocated_ip[3]) + { + ret = DHCP_IP_CHANGED; + dhcp_ip_update(); + #ifdef _DHCP_DEBUG_ + printf(">IP changed.\r\n"); + #endif + + } + #ifdef _DHCP_DEBUG_ + else printf(">IP is continued.\r\n"); + #endif + reset_DHCP_timeout(); + dhcp_state = STATE_DHCP_LEASED; + } else if (type == DHCP_NAK) { + +#ifdef _DHCP_DEBUG_ + printf("> Receive DHCP_NACK, Failed to maintain ip\r\n"); +#endif + + reset_DHCP_timeout(); + + dhcp_state = STATE_DHCP_DISCOVER; + } else ret = check_DHCP_timeout(); + break; + default : + break; + } + + return ret; +} + +void DHCP_stop(void) +{ + WIZCHIP_EXPORT(close)(DHCP_SOCKET); + dhcp_state = STATE_DHCP_STOP; +} + +uint8_t check_DHCP_timeout(void) +{ + uint8_t ret = DHCP_RUNNING; + + if (dhcp_retry_count < MAX_DHCP_RETRY) { + if (dhcp_tick_next < dhcp_tick_1s) { + + switch ( dhcp_state ) { + case STATE_DHCP_DISCOVER : +// printf("<> state : STATE_DHCP_DISCOVER\r\n"); + send_DHCP_DISCOVER(); + break; + + case STATE_DHCP_REQUEST : +// printf("<> state : STATE_DHCP_REQUEST\r\n"); + + send_DHCP_REQUEST(); + break; + + case STATE_DHCP_REREQUEST : +// printf("<> state : STATE_DHCP_REREQUEST\r\n"); + + send_DHCP_REQUEST(); + break; + + default : + break; + } + + dhcp_tick_1s = 0; + dhcp_tick_next = dhcp_tick_1s + DHCP_WAIT_TIME; + dhcp_retry_count++; + } + } else { // timeout occurred + + switch(dhcp_state) { + case STATE_DHCP_DISCOVER: + dhcp_state = STATE_DHCP_INIT; + ret = DHCP_FAILED; + break; + case STATE_DHCP_REQUEST: + case STATE_DHCP_REREQUEST: + send_DHCP_DISCOVER(); + dhcp_state = STATE_DHCP_DISCOVER; + break; + default : + break; + } + reset_DHCP_timeout(); + } + return ret; +} + +int8_t check_DHCP_leasedIP(void) +{ + uint8_t tmp; + int32_t ret; + + //WIZchip RCR value changed for ARP Timeout count control + tmp = getRCR(); + setRCR(0x03); + + // IP conflict detection : ARP request - ARP reply + // Broadcasting ARP Request for check the IP conflict using UDP sendto() function + ret = WIZCHIP_EXPORT(sendto)(DHCP_SOCKET, (uint8_t *)"CHECK_IP_CONFLICT", 17, DHCP_allocated_ip, 5000); + + // RCR value restore + setRCR(tmp); + + if(ret == SOCKERR_TIMEOUT) { + // UDP send Timeout occurred : allocated IP address is unique, DHCP Success + +#ifdef _DHCP_DEBUG_ + printf("\r\n> Check leased IP - OK\r\n"); +#endif + + return 1; + } else { + // Received ARP reply or etc : IP address conflict occur, DHCP Failed + send_DHCP_DECLINE(); + + ret = dhcp_tick_1s; + while((dhcp_tick_1s - ret) < 2) ; // wait for 1s over; wait to complete to send DECLINE message; + + return 0; + } +} + +void DHCP_init(uint8_t s, DHCP_INIT_BUFFER_TYPE* buf) +{ + uint8_t zeroip[4] = {0,0,0,0}; + getSHAR(DHCP_CHADDR); + if((DHCP_CHADDR[0] | DHCP_CHADDR[1] | DHCP_CHADDR[2] | DHCP_CHADDR[3] | DHCP_CHADDR[4] | DHCP_CHADDR[5]) == 0x00) + { + // assign temporary mac address, you should be set SHAR before call this function. + DHCP_CHADDR[0] = 0x00; + DHCP_CHADDR[1] = 0x08; + DHCP_CHADDR[2] = 0xdc; + DHCP_CHADDR[3] = 0x00; + DHCP_CHADDR[4] = 0x00; + DHCP_CHADDR[5] = 0x00; + setSHAR(DHCP_CHADDR); + } + + DHCP_SOCKET = s; // SOCK_DHCP + pDHCPMSG = (RIP_MSG*)buf; + DHCP_XID = 0x12345678; + + // WIZchip Netinfo Clear + setSIPR(zeroip); + setSIPR(zeroip); + setGAR(zeroip); + + reset_DHCP_timeout(); + dhcp_state = STATE_DHCP_INIT; +} + + +/* Rset the DHCP timeout count and retry count. */ +void reset_DHCP_timeout(void) +{ + dhcp_tick_1s = 0; + dhcp_tick_next = DHCP_WAIT_TIME; + dhcp_retry_count = 0; +} + +void DHCP_time_handler(void) +{ + dhcp_tick_1s++; +} + +void getIPfromDHCP(uint8_t* ip) +{ + ip[0] = DHCP_allocated_ip[0]; + ip[1] = DHCP_allocated_ip[1]; + ip[2] = DHCP_allocated_ip[2]; + ip[3] = DHCP_allocated_ip[3]; +} + +void getGWfromDHCP(uint8_t* ip) +{ + ip[0] =DHCP_allocated_gw[0]; + ip[1] =DHCP_allocated_gw[1]; + ip[2] =DHCP_allocated_gw[2]; + ip[3] =DHCP_allocated_gw[3]; +} + +void getSNfromDHCP(uint8_t* ip) +{ + ip[0] = DHCP_allocated_sn[0]; + ip[1] = DHCP_allocated_sn[1]; + ip[2] = DHCP_allocated_sn[2]; + ip[3] = DHCP_allocated_sn[3]; +} + +void getDNSfromDHCP(uint8_t* ip) +{ + ip[0] = DHCP_allocated_dns[0]; + ip[1] = DHCP_allocated_dns[1]; + ip[2] = DHCP_allocated_dns[2]; + ip[3] = DHCP_allocated_dns[3]; +} + +uint32_t getDHCPLeasetime(void) +{ + return dhcp_lease_time; +} diff --git a/drivers/wiznet5k/internet/dhcp/dhcp.h b/drivers/wiznet5k/internet/dhcp/dhcp.h new file mode 100644 index 0000000000000..881bf5a6c1c6e --- /dev/null +++ b/drivers/wiznet5k/internet/dhcp/dhcp.h @@ -0,0 +1,152 @@ +//***************************************************************************** +// +//! \file dhcp.h +//! \brief DHCP APIs Header file. +//! \details Processig DHCP protocol as DISCOVER, OFFER, REQUEST, ACK, NACK and DECLINE. +//! \version 1.1.0 +//! \date 2013/11/18 +//! \par Revision history +//! <2013/11/18> 1st Release +//! <2012/12/20> V1.1.0 +//! 1. Move unreferenced DEFINE to dhcp.c +//! <2012/12/26> V1.1.1 +//! \author Eric Jung & MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** +#ifndef _DHCP_H_ +#define _DHCP_H_ + +/* + * @brief + * @details If you want to display debug & processing message, Define _DHCP_DEBUG_ + * @note If defined, it depends on + */ + +//#define _DHCP_DEBUG_ + +/* Retry to processing DHCP */ +#define MAX_DHCP_RETRY 2 ///< Maximum retry count +#define DHCP_WAIT_TIME 3 ///< Wait Time 3s (was 10s) + +/* UDP port numbers for DHCP */ +#define DHCP_SERVER_PORT 67 ///< DHCP server port number +#define DHCP_CLIENT_PORT 68 ///< DHCP client port number + +#define MAGIC_COOKIE 0x63825363 ///< Any number. You can be modified it any number + +#define DCHP_HOST_NAME "WIZnet\0" + +/* + * @brief return value of @ref DHCP_run() + */ +enum +{ + DHCP_FAILED = 0, ///< Processing Fail + DHCP_RUNNING, ///< Processing DHCP protocol + DHCP_IP_ASSIGN, ///< First Occupy IP from DHPC server (if cbfunc == null, act as default default_ip_assign) + DHCP_IP_CHANGED, ///< Change IP address by new IP address from DHCP (if cbfunc == null, act as default default_ip_update) + DHCP_IP_LEASED, ///< Stand by + DHCP_STOPPED ///< Stop processing DHCP protocol +}; + +#define DHCP_INIT_BUFFER_TYPE uint32_t +#define DHCP_INIT_BUFFER_SIZE (137) +/* + * @brief DHCP client initialization (outside of the main loop) + * @param s - socket number + * @param buf - buffer for processing DHCP message + */ +void DHCP_init(uint8_t s, DHCP_INIT_BUFFER_TYPE* buf); + +/* + * @brief DHCP 1s Tick Timer handler + * @note SHOULD BE register to your system 1s Tick timer handler + */ +void DHCP_time_handler(void); + +/* + * @brief Register call back function + * @param ip_assign - callback func when IP is assigned from DHCP server first + * @param ip_update - callback func when IP is changed + * @prarm ip_conflict - callback func when the assigned IP is conflict with others. + */ +void reg_dhcp_cbfunc(void(*ip_assign)(void), void(*ip_update)(void), void(*ip_conflict)(void)); + +/* + * @brief DHCP client in the main loop + * @return The value is as the follow \n + * @ref DHCP_FAILED \n + * @ref DHCP_RUNNING \n + * @ref DHCP_IP_ASSIGN \n + * @ref DHCP_IP_CHANGED \n + * @ref DHCP_IP_LEASED \n + * @ref DHCP_STOPPED \n + * + * @note This function is always called by you main task. + */ +uint8_t DHCP_run(void); + +/* + * @brief Stop DHCP processing + * @note If you want to restart. call DHCP_init() and DHCP_run() + */ +void DHCP_stop(void); + +/* Get Network information assigned from DHCP server */ +/* + * @brief Get IP address + * @param ip - IP address to be returned + */ +void getIPfromDHCP(uint8_t* ip); +/* + * @brief Get Gateway address + * @param ip - Gateway address to be returned + */ +void getGWfromDHCP(uint8_t* ip); +/* + * @brief Get Subnet mask value + * @param ip - Subnet mask to be returned + */ +void getSNfromDHCP(uint8_t* ip); +/* + * @brief Get DNS address + * @param ip - DNS address to be returned + */ +void getDNSfromDHCP(uint8_t* ip); + +/* + * @brief Get the leased time by DHCP sever + * @return unit 1s + */ +uint32_t getDHCPLeasetime(void); + +#endif /* _DHCP_H_ */ diff --git a/drivers/wiznet5k/internet/dns/dns.c b/drivers/wiznet5k/internet/dns/dns.c new file mode 100644 index 0000000000000..8b9e96670827d --- /dev/null +++ b/drivers/wiznet5k/internet/dns/dns.c @@ -0,0 +1,572 @@ +//***************************************************************************** +// +//! \file dns.c +//! \brief DNS APIs Implement file. +//! \details Send DNS query & Receive DNS reponse. \n +//! It depends on stdlib.h & string.h in ansi-c library +//! \version 1.1.0 +//! \date 2013/11/18 +//! \par Revision history +//! <2013/10/21> 1st Release +//! <2013/12/20> V1.1.0 +//! 1. Remove secondary DNS server in DNS_run +//! If 1st DNS_run failed, call DNS_run with 2nd DNS again +//! 2. DNS_timerHandler -> DNS_time_handler +//! 3. Remove the unused define +//! 4. Integrated dns.h dns.c & dns_parse.h dns_parse.c into dns.h & dns.c +//! <2013/12/20> V1.1.0 +//! <2018/10/04> Modified HAL_GetTick for use with CircuitPython by Nick Moore +//! +//! \author Eric Jung & MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#include +#include +#include "supervisor/shared/tick.h" + +//#include "Ethernet/socket.h" +//#include "Internet/DNS/dns.h" +#include "../../ethernet/socket.h" +#include "dns.h" + +#ifdef _DNS_DEBUG_ + #include +#endif + +#define INITRTT 2000L /* Initial smoothed response time */ +#define MAXCNAME (MAX_DOMAIN_NAME + (MAX_DOMAIN_NAME>>1)) /* Maximum amount of cname recursion */ + +#define TYPE_A 1 /* Host address */ +#define TYPE_NS 2 /* Name server */ +#define TYPE_MD 3 /* Mail destination (obsolete) */ +#define TYPE_MF 4 /* Mail forwarder (obsolete) */ +#define TYPE_CNAME 5 /* Canonical name */ +#define TYPE_SOA 6 /* Start of Authority */ +#define TYPE_MB 7 /* Mailbox name (experimental) */ +#define TYPE_MG 8 /* Mail group member (experimental) */ +#define TYPE_MR 9 /* Mail rename name (experimental) */ +#define TYPE_NULL 10 /* Null (experimental) */ +#define TYPE_WKS 11 /* Well-known sockets */ +#define TYPE_PTR 12 /* Pointer record */ +#define TYPE_HINFO 13 /* Host information */ +#define TYPE_MINFO 14 /* Mailbox information (experimental)*/ +#define TYPE_MX 15 /* Mail exchanger */ +#define TYPE_TXT 16 /* Text strings */ +#define TYPE_ANY 255 /* Matches any type */ + +#define CLASS_IN 1 /* The ARPA Internet */ + +/* Round trip timing parameters */ +#define AGAIN 8 /* Average RTT gain = 1/8 */ +#define LAGAIN 3 /* Log2(AGAIN) */ +#define DGAIN 4 /* Mean deviation gain = 1/4 */ +#define LDGAIN 2 /* log2(DGAIN) */ + +/* Header for all domain messages */ +struct dhdr +{ + uint16_t id; /* Identification */ + uint8_t qr; /* Query/Response */ +#define QUERY 0 +#define RESPONSE 1 + uint8_t opcode; +#define IQUERY 1 + uint8_t aa; /* Authoratative answer */ + uint8_t tc; /* Truncation */ + uint8_t rd; /* Recursion desired */ + uint8_t ra; /* Recursion available */ + uint8_t rcode; /* Response code */ +#define NO_ERROR 0 +#define FORMAT_ERROR 1 +#define SERVER_FAIL 2 +#define NAME_ERROR 3 +#define NOT_IMPL 4 +#define REFUSED 5 + uint16_t qdcount; /* Question count */ + uint16_t ancount; /* Answer count */ + uint16_t nscount; /* Authority (name server) count */ + uint16_t arcount; /* Additional record count */ +}; + + +uint8_t* pDNSMSG; // DNS message buffer +uint8_t DNS_SOCKET; // SOCKET number for DNS +uint16_t DNS_MSGID; // DNS message ID + + +uint32_t HAL_GetTick(void) { + return supervisor_ticks_ms32(); +} + +uint32_t hal_sys_tick; + +/* converts uint16_t from network buffer to a host byte order integer. */ +uint16_t get16(uint8_t * s) +{ + uint16_t i; + i = *s++ << 8; + i = i + *s; + return i; +} + +/* copies uint16_t to the network buffer with network byte order. */ +uint8_t * put16(uint8_t * s, uint16_t i) +{ + *s++ = i >> 8; + *s++ = i; + return s; +} + + +/* + * CONVERT A DOMAIN NAME TO THE HUMAN-READABLE FORM + * + * Description : This function converts a compressed domain name to the human-readable form + * Arguments : msg - is a pointer to the reply message + * compressed - is a pointer to the domain name in reply message. + * buf - is a pointer to the buffer for the human-readable form name. + * len - is the MAX. size of buffer. + * Returns : the length of compressed message + */ +int parse_name(uint8_t * msg, uint8_t * compressed, char * buf, int16_t len) +{ + uint16_t slen; /* Length of current segment */ + uint8_t * cp; + int clen = 0; /* Total length of compressed name */ + int indirect = 0; /* Set if indirection encountered */ + int nseg = 0; /* Total number of segments in name */ + + cp = compressed; + + for (;;) + { + slen = *cp++; /* Length of this segment */ + + if (!indirect) clen++; + + if ((slen & 0xc0) == 0xc0) + { + if (!indirect) + clen++; + indirect = 1; + /* Follow indirection */ + cp = &msg[((slen & 0x3f)<<8) + *cp]; + slen = *cp++; + } + + if (slen == 0) /* zero length == all done */ + break; + + len -= slen + 1; + + if (len < 0) return -1; + + if (!indirect) clen += slen; + + while (slen-- != 0) *buf++ = (char)*cp++; + *buf++ = '.'; + nseg++; + } + + if (nseg == 0) + { + /* Root name; represent as single dot */ + *buf++ = '.'; + len--; + } + + *buf++ = '\0'; + len--; + + return clen; /* Length of compressed message */ +} + +/* + * PARSE QUESTION SECTION + * + * Description : This function parses the question record of the reply message. + * Arguments : msg - is a pointer to the reply message + * cp - is a pointer to the question record. + * Returns : a pointer the to next record. + */ +uint8_t * dns_question(uint8_t * msg, uint8_t * cp) +{ + int len; + char name[MAXCNAME]; + + len = parse_name(msg, cp, name, MAXCNAME); + + + if (len == -1) return 0; + + cp += len; + cp += 2; /* type */ + cp += 2; /* class */ + + return cp; +} + + +/* + * PARSE ANSER SECTION + * + * Description : This function parses the answer record of the reply message. + * Arguments : msg - is a pointer to the reply message + * cp - is a pointer to the answer record. + * Returns : a pointer the to next record. + */ +uint8_t * dns_answer(uint8_t * msg, uint8_t * cp, uint8_t * ip_from_dns) +{ + int len, type; + char name[MAXCNAME]; + + len = parse_name(msg, cp, name, MAXCNAME); + + if (len == -1) return 0; + + cp += len; + type = get16(cp); + cp += 2; /* type */ + cp += 2; /* class */ + cp += 4; /* ttl */ + cp += 2; /* len */ + + + switch (type) + { + case TYPE_A: + /* Just read the address directly into the structure */ + ip_from_dns[0] = *cp++; + ip_from_dns[1] = *cp++; + ip_from_dns[2] = *cp++; + ip_from_dns[3] = *cp++; + break; + case TYPE_CNAME: + case TYPE_MB: + case TYPE_MG: + case TYPE_MR: + case TYPE_NS: + case TYPE_PTR: + /* These types all consist of a single domain name */ + /* convert it to ASCII format */ + len = parse_name(msg, cp, name, MAXCNAME); + if (len == -1) return 0; + + cp += len; + break; + case TYPE_HINFO: + len = *cp++; + cp += len; + + len = *cp++; + cp += len; + break; + case TYPE_MX: + cp += 2; + /* Get domain name of exchanger */ + len = parse_name(msg, cp, name, MAXCNAME); + if (len == -1) return 0; + + cp += len; + break; + case TYPE_SOA: + /* Get domain name of name server */ + len = parse_name(msg, cp, name, MAXCNAME); + if (len == -1) return 0; + + cp += len; + + /* Get domain name of responsible person */ + len = parse_name(msg, cp, name, MAXCNAME); + if (len == -1) return 0; + + cp += len; + + cp += 4; + cp += 4; + cp += 4; + cp += 4; + cp += 4; + break; + case TYPE_TXT: + /* Just stash */ + break; + default: + /* Ignore */ + break; + } + + return cp; +} + +/* + * PARSE THE DNS REPLY + * + * Description : This function parses the reply message from DNS server. + * Arguments : dhdr - is a pointer to the header for DNS message + * buf - is a pointer to the reply message. + * len - is the size of reply message. + * Returns : -1 - Domain name length is too big + * 0 - Fail (Timeout or parse error) + * 1 - Success, + */ +int8_t parseDNSMSG(struct dhdr * pdhdr, uint8_t * pbuf, uint8_t * ip_from_dns) +{ + uint16_t tmp; + uint16_t i; + uint8_t * msg; + uint8_t * cp; + + msg = pbuf; + memset(pdhdr, 0, sizeof(*pdhdr)); + + pdhdr->id = get16(&msg[0]); + tmp = get16(&msg[2]); + if (tmp & 0x8000) pdhdr->qr = 1; + + pdhdr->opcode = (tmp >> 11) & 0xf; + + if (tmp & 0x0400) pdhdr->aa = 1; + if (tmp & 0x0200) pdhdr->tc = 1; + if (tmp & 0x0100) pdhdr->rd = 1; + if (tmp & 0x0080) pdhdr->ra = 1; + + pdhdr->rcode = tmp & 0xf; + pdhdr->qdcount = get16(&msg[4]); + pdhdr->ancount = get16(&msg[6]); + pdhdr->nscount = get16(&msg[8]); + pdhdr->arcount = get16(&msg[10]); + + + /* Now parse the variable length sections */ + cp = &msg[12]; + + /* Question section */ + for (i = 0; i < pdhdr->qdcount; i++) + { + cp = dns_question(msg, cp); + if(!cp) + { +#ifdef _DNS_DEBUG_ + printf("MAX_DOMAIN_NAME is too small, it should be redefined in dns.h\r\n"); +#endif + return -1; + } + } + + /* Answer section */ + for (i = 0; i < pdhdr->ancount; i++) + { + cp = dns_answer(msg, cp, ip_from_dns); + if(!cp) + { +#ifdef _DNS_DEBUG_ + printf("MAX_DOMAIN_NAME is too small, it should be redefined in dns.h\r\n"); +#endif + return -1; + } + + } + + /* Name server (authority) section */ + for (i = 0; i < pdhdr->nscount; i++) + { + ; + } + + /* Additional section */ + for (i = 0; i < pdhdr->arcount; i++) + { + ; + } + + if(pdhdr->rcode == 0) return 1; // No error + else return 0; +} + + +/* + * MAKE DNS QUERY MESSAGE + * + * Description : This function makes DNS query message. + * Arguments : op - Recursion desired + * name - is a pointer to the domain name. + * buf - is a pointer to the buffer for DNS message. + * len - is the MAX. size of buffer. + * Returns : the pointer to the DNS message. + */ +int16_t dns_makequery(uint16_t op, char * name, uint8_t * buf, uint16_t len) +{ + uint8_t *cp; + char *cp1; + char sname[MAXCNAME]; + char *dname; + uint16_t p; + uint16_t dlen; + + cp = buf; + + DNS_MSGID++; + cp = put16(cp, DNS_MSGID); + p = (op << 11) | 0x0100; /* Recursion desired */ + cp = put16(cp, p); + cp = put16(cp, 1); + cp = put16(cp, 0); + cp = put16(cp, 0); + cp = put16(cp, 0); + + strcpy(sname, name); + dname = sname; + dlen = strlen(dname); + for (;;) + { + /* Look for next dot */ + cp1 = strchr(dname, '.'); + + if (cp1 != NULL) len = cp1 - dname; /* More to come */ + else len = dlen; /* Last component */ + + *cp++ = len; /* Write length of component */ + if (len == 0) break; + + /* Copy component up to (but not including) dot */ + memcpy(cp, dname, len); + cp += len; + if (cp1 == NULL) + { + *cp++ = 0; /* Last one; write null and finish */ + break; + } + dname += len+1; + dlen -= len+1; + } + + cp = put16(cp, 0x0001); /* type */ + cp = put16(cp, 0x0001); /* class */ + + return ((int16_t)((uint32_t)(cp) - (uint32_t)(buf))); +} + +/* + * CHECK DNS TIMEOUT + * + * Description : This function check the DNS timeout + * Arguments : None. + * Returns : -1 - timeout occurred, 0 - timer over, but no timeout, 1 - no timer over, no timeout occur + * Note : timeout : retry count and timer both over. + */ + +int8_t check_DNS_timeout(void) +{ + static uint8_t retry_count; + + uint32_t tick = HAL_GetTick(); + if(tick - hal_sys_tick >= DNS_WAIT_TIME * 1000) + { + hal_sys_tick = tick; + if(retry_count >= MAX_DNS_RETRY) { + retry_count = 0; + return -1; // timeout occurred + } + retry_count++; + return 0; // timer over, but no timeout + } + + return 1; // no timer over, no timeout occur +} + + + +/* DNS CLIENT INIT */ +void DNS_init(uint8_t s, uint8_t * buf) +{ + DNS_SOCKET = s; // SOCK_DNS + pDNSMSG = buf; // User's shared buffer + DNS_MSGID = DNS_MSG_ID; +} + +/* DNS CLIENT RUN */ +int8_t DNS_run(uint8_t * dns_ip, uint8_t * name, uint8_t * ip_from_dns) +{ + int8_t ret; + struct dhdr dhp; + uint8_t ip[4]; + uint16_t len, port; + int8_t ret_check_timeout; + + hal_sys_tick = HAL_GetTick(); + + // Socket open + WIZCHIP_EXPORT(socket)(DNS_SOCKET, Sn_MR_UDP, 0, 0); + +#ifdef _DNS_DEBUG_ + printf("> DNS Query to DNS Server : %d.%d.%d.%d\r\n", dns_ip[0], dns_ip[1], dns_ip[2], dns_ip[3]); +#endif + + len = dns_makequery(0, (char *)name, pDNSMSG, MAX_DNS_BUF_SIZE); + WIZCHIP_EXPORT(sendto)(DNS_SOCKET, pDNSMSG, len, dns_ip, IPPORT_DOMAIN); + + while (1) + { + if ((len = getSn_RX_RSR(DNS_SOCKET)) > 0) + { + if (len > MAX_DNS_BUF_SIZE) len = MAX_DNS_BUF_SIZE; + len = WIZCHIP_EXPORT(recvfrom)(DNS_SOCKET, pDNSMSG, len, ip, &port); + #ifdef _DNS_DEBUG_ + printf("> Receive DNS message from %d.%d.%d.%d(%d). len = %d\r\n", ip[0], ip[1], ip[2], ip[3],port,len); + #endif + ret = parseDNSMSG(&dhp, pDNSMSG, ip_from_dns); + break; + } + // Check Timeout + ret_check_timeout = check_DNS_timeout(); + if (ret_check_timeout < 0) { + +#ifdef _DNS_DEBUG_ + printf("> DNS Server is not responding : %d.%d.%d.%d\r\n", dns_ip[0], dns_ip[1], dns_ip[2], dns_ip[3]); +#endif + return 0; // timeout occurred + } + else if (ret_check_timeout == 0) { + +#ifdef _DNS_DEBUG_ + printf("> DNS Timeout\r\n"); +#endif + WIZCHIP_EXPORT(sendto)(DNS_SOCKET, pDNSMSG, len, dns_ip, IPPORT_DOMAIN); + } + } + WIZCHIP_EXPORT(close)(DNS_SOCKET); + // Return value + // 0 > : failed / 1 - success + return ret; +} diff --git a/drivers/wiznet5k/internet/dns/dns.h b/drivers/wiznet5k/internet/dns/dns.h new file mode 100644 index 0000000000000..de0039515e28f --- /dev/null +++ b/drivers/wiznet5k/internet/dns/dns.h @@ -0,0 +1,96 @@ +//***************************************************************************** +// +//! \file dns.h +//! \brief DNS APIs Header file. +//! \details Send DNS query & Receive DNS reponse. +//! \version 1.1.0 +//! \date 2013/11/18 +//! \par Revision history +//! <2013/10/21> 1st Release +//! <2013/12/20> V1.1.0 +//! 1. Remove secondary DNS server in DNS_run +//! If 1st DNS_run failed, call DNS_run with 2nd DNS again +//! 2. DNS_timerHandler -> DNS_time_handler +//! 3. Move the no reference define to dns.c +//! 4. Integrated dns.h dns.c & dns_parse.h dns_parse.c into dns.h & dns.c +//! <2013/12/20> V1.1.0 +//! +//! \author Eric Jung & MidnightCow +//! \copyright +//! +//! Copyright (c) 2013, WIZnet Co., LTD. +//! All rights reserved. +//! +//! Redistribution and use in source and binary forms, with or without +//! modification, are permitted provided that the following conditions +//! are met: +//! +//! * Redistributions of source code must retain the above copyright +//! notice, this list of conditions and the following disclaimer. +//! * Redistributions in binary form must reproduce the above copyright +//! notice, this list of conditions and the following disclaimer in the +//! documentation and/or other materials provided with the distribution. +//! * Neither the name of the nor the names of its +//! contributors may be used to endorse or promote products derived +//! from this software without specific prior written permission. +//! +//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +//! THE POSSIBILITY OF SUCH DAMAGE. +// +//***************************************************************************** + +#ifndef _DNS_H_ +#define _DNS_H_ + +#include +/* + * @brief Define it for Debug & Monitor DNS processing. + * @note If defined, it depends on + */ + +//#define _DNS_DEBUG_ + +#define MAX_DNS_BUF_SIZE 256 ///< maximum size of DNS buffer. */ +/* + * @brief Maximum length of your queried Domain name + * @todo SHOULD BE defined it equal as or greater than your Domain name length + null character(1) + * @note SHOULD BE careful to stack overflow because it is allocated 1.5 times as MAX_DOMAIN_NAME in stack. + */ +#define MAX_DOMAIN_NAME 32 // for example "www.google.com" + +#define MAX_DNS_RETRY 2 ///< Requery Count +#define DNS_WAIT_TIME 4 ///< Wait response time. unit 1s. + +#define IPPORT_DOMAIN 53 ///< DNS server port number + +#define DNS_MSG_ID 0x1122 ///< ID for DNS message. You can be modified it any number +/* + * @brief DNS process initialize + * @param s : Socket number for DNS + * @param buf : Buffer for DNS message + */ +void DNS_init(uint8_t s, uint8_t * buf); + +/* + * @brief DNS process + * @details Send DNS query and receive DNS response + * @param dns_ip : DNS server ip address + * @param name : Domain name to be queried + * @param ip_from_dns : IP address from DNS server + * @return -1 : failed. @ref MAX_DOMIN_NAME is too small \n + * 0 : failed (Timeout or Parse error)\n + * 1 : success + * @note This function blocks until success or fail. max time = @ref MAX_DNS_RETRY * @ref DNS_WAIT_TIME + */ +int8_t DNS_run(uint8_t * dns_ip, uint8_t * name, uint8_t * ip_from_dns); + +#endif /* _DNS_H_ */ diff --git a/ports/stm32/font_petme128_8x8.h b/extmod/font_petme128_8x8.h similarity index 97% rename from ports/stm32/font_petme128_8x8.h rename to extmod/font_petme128_8x8.h index 8b0cc9cb017f2..cdc4e73a79a30 100644 --- a/ports/stm32/font_petme128_8x8.h +++ b/extmod/font_petme128_8x8.h @@ -23,8 +23,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STMHAL_FONT_PETME128_8X8_H -#define MICROPY_INCLUDED_STMHAL_FONT_PETME128_8X8_H +#ifndef MICROPY_INCLUDED_STM32_FONT_PETME128_8X8_H +#define MICROPY_INCLUDED_STM32_FONT_PETME128_8X8_H static const uint8_t font_petme128_8x8[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 32= @@ -125,4 +125,4 @@ static const uint8_t font_petme128_8x8[] = { 0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55, // 127 }; -#endif // MICROPY_INCLUDED_STMHAL_FONT_PETME128_8X8_H +#endif // MICROPY_INCLUDED_STM32_FONT_PETME128_8X8_H diff --git a/extmod/lwip-include/lwipopts.h b/extmod/lwip-include/lwipopts.h index 2122f30f044e3..805bec2230de5 100644 --- a/extmod/lwip-include/lwipopts.h +++ b/extmod/lwip-include/lwipopts.h @@ -23,7 +23,7 @@ typedef uint32_t sys_prot_t; #define LWIP_NETCONN 0 #define LWIP_SOCKET 0 -#ifdef MICROPY_PY_LWIP_SLIP +#if MICROPY_PY_LWIP_SLIP #define LWIP_HAVE_SLIPIF 1 #endif diff --git a/extmod/machine_i2c.c b/extmod/machine_i2c.c index 5d441b1ba77af..4129ace0a0560 100644 --- a/extmod/machine_i2c.c +++ b/extmod/machine_i2c.c @@ -33,6 +33,8 @@ #include "py/runtime.h" #include "extmod/machine_i2c.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_MACHINE_I2C typedef mp_machine_soft_i2c_obj_t machine_i2c_obj_t; @@ -285,16 +287,16 @@ STATIC void machine_i2c_obj_init_helper(machine_i2c_obj_t *self, size_t n_args, mp_hal_i2c_init(self, args[ARG_freq].u_int); } -STATIC mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { // check the id argument, if given if (n_args > 0) { if (args[0] != MP_OBJ_NEW_SMALL_INT(-1)) { #if defined(MICROPY_PY_MACHINE_I2C_MAKE_NEW) // dispatch to port-specific constructor - extern mp_obj_t MICROPY_PY_MACHINE_I2C_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args); - return MICROPY_PY_MACHINE_I2C_MAKE_NEW(type, n_args, n_kw, args); + extern mp_obj_t MICROPY_PY_MACHINE_I2C_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *all_args, mp_map_t *kw_args); + return MICROPY_PY_MACHINE_I2C_MAKE_NEW(type, n_args, args, kw_args); #else - mp_raise_ValueError("invalid I2C peripheral"); + mp_raise_ValueError(translate("invalid I2C peripheral")); #endif } --n_args; @@ -304,9 +306,7 @@ STATIC mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, s // create new soft I2C object machine_i2c_obj_t *self = m_new_obj(machine_i2c_obj_t); self->base.type = &machine_i2c_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_i2c_obj_init_helper(self, n_args, args, &kw_args); + machine_i2c_obj_init_helper(self, n_args, args, kw_args); return (mp_obj_t)self; } @@ -318,7 +318,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_init_obj, 1, machine_i2c_obj_init); STATIC mp_obj_t machine_i2c_scan(mp_obj_t self_in) { mp_obj_base_t *self = MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); mp_obj_t list = mp_obj_new_list(0, NULL); // 7-bit addresses 0b0000xxx and 0b1111xxx are reserved for (int addr = 0x08; addr < 0x78; ++addr) { @@ -333,9 +333,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_scan_obj, machine_i2c_scan); STATIC mp_obj_t machine_i2c_start(mp_obj_t self_in) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); if (i2c_p->start == NULL) { - mp_raise_msg(&mp_type_OSError, "I2C operation not supported"); + mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); } int ret = i2c_p->start(self); if (ret != 0) { @@ -347,9 +347,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_start_obj, machine_i2c_start); STATIC mp_obj_t machine_i2c_stop(mp_obj_t self_in) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); if (i2c_p->stop == NULL) { - mp_raise_msg(&mp_type_OSError, "I2C operation not supported"); + mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); } int ret = i2c_p->stop(self); if (ret != 0) { @@ -361,9 +361,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_stop_obj, machine_i2c_stop); STATIC mp_obj_t machine_i2c_readinto(size_t n_args, const mp_obj_t *args) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); if (i2c_p->read == NULL) { - mp_raise_msg(&mp_type_OSError, "I2C operation not supported"); + mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); } // get the buffer to read into @@ -385,9 +385,9 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readinto_obj, 2, 3, machine_i2c_ STATIC mp_obj_t machine_i2c_write(mp_obj_t self_in, mp_obj_t buf_in) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); if (i2c_p->write == NULL) { - mp_raise_msg(&mp_type_OSError, "I2C operation not supported"); + mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); } // get the buffer to write from @@ -407,7 +407,7 @@ MP_DEFINE_CONST_FUN_OBJ_2(machine_i2c_write_obj, machine_i2c_write); STATIC mp_obj_t machine_i2c_readfrom(size_t n_args, const mp_obj_t *args) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); mp_int_t addr = mp_obj_get_int(args[1]); vstr_t vstr; vstr_init_len(&vstr, mp_obj_get_int(args[2])); @@ -422,7 +422,7 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readfrom_obj, 3, 4, machine_i2c_ STATIC mp_obj_t machine_i2c_readfrom_into(size_t n_args, const mp_obj_t *args) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); mp_int_t addr = mp_obj_get_int(args[1]); mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_WRITE); @@ -437,7 +437,7 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readfrom_into_obj, 3, 4, machine STATIC mp_obj_t machine_i2c_writeto(size_t n_args, const mp_obj_t *args) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); mp_int_t addr = mp_obj_get_int(args[1]); mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ); @@ -453,7 +453,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_writeto_obj, 3, 4, machin STATIC int read_mem(mp_obj_t self_in, uint16_t addr, uint32_t memaddr, uint8_t addrsize, uint8_t *buf, size_t len) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); uint8_t memaddr_buf[4]; size_t memaddr_len = 0; for (int16_t i = addrsize - 8; i >= 0; i -= 8) { @@ -473,7 +473,7 @@ STATIC int read_mem(mp_obj_t self_in, uint16_t addr, uint32_t memaddr, uint8_t a STATIC int write_mem(mp_obj_t self_in, uint16_t addr, uint32_t memaddr, uint8_t addrsize, const uint8_t *buf, size_t len) { mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)self->type->protocol; + mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); // need some memory to create the buffer to send; try to use stack if possible uint8_t buf2_stack[MAX_MEMADDR_SIZE + BUF_STACK_SIZE]; @@ -621,6 +621,7 @@ int mp_machine_soft_i2c_write(mp_obj_base_t *self_in, const uint8_t *src, size_t } STATIC const mp_machine_i2c_p_t mp_machine_soft_i2c_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_i2c) .start = (int(*)(mp_obj_base_t*))mp_hal_i2c_start, .stop = (int(*)(mp_obj_base_t*))mp_hal_i2c_stop, .read = mp_machine_soft_i2c_read, diff --git a/extmod/machine_i2c.h b/extmod/machine_i2c.h index f5af6656f574d..7f5ee568e3069 100644 --- a/extmod/machine_i2c.h +++ b/extmod/machine_i2c.h @@ -27,10 +27,12 @@ #define MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H #include "py/obj.h" +#include "py/proto.h" // I2C protocol // the first 4 methods can be NULL, meaning operation is not supported typedef struct _mp_machine_i2c_p_t { + MP_PROTOCOL_HEAD int (*start)(mp_obj_base_t *obj); int (*stop)(mp_obj_base_t *obj); int (*read)(mp_obj_base_t *obj, uint8_t *dest, size_t len, bool nack); diff --git a/extmod/machine_mem.c b/extmod/machine_mem.c index b9f16507c4b76..e0649290ef22f 100644 --- a/extmod/machine_mem.c +++ b/extmod/machine_mem.c @@ -42,7 +42,7 @@ STATIC uintptr_t machine_mem_get_addr(mp_obj_t addr_o, uint align) { uintptr_t addr = mp_obj_int_get_truncated(addr_o); if ((addr & (align - 1)) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "address %08x is not aligned to %d bytes", addr, align)); + nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("address %08x is not aligned to %d bytes"), addr, align)); } return addr; } diff --git a/extmod/machine_pinbase.c b/extmod/machine_pinbase.c index 070c5cde9d3ac..6cd14c187ed4c 100644 --- a/extmod/machine_pinbase.c +++ b/extmod/machine_pinbase.c @@ -45,11 +45,11 @@ STATIC const mp_pinbase_t pinbase_singleton = { .base = { &machine_pinbase_type }, }; -STATIC mp_obj_t pinbase_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t pinbase_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type; (void)n_args; - (void)n_kw; (void)args; + (void)kw_args; return MP_OBJ_FROM_PTR(&pinbase_singleton); } @@ -74,6 +74,7 @@ mp_uint_t pinbase_ioctl(mp_obj_t obj, mp_uint_t request, uintptr_t arg, int *err } STATIC const mp_pin_p_t pinbase_pin_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_pin) .ioctl = pinbase_ioctl, }; diff --git a/extmod/machine_signal.c b/extmod/machine_signal.c index 78d0c3feef256..50501e34fed60 100644 --- a/extmod/machine_signal.c +++ b/extmod/machine_signal.c @@ -42,23 +42,18 @@ typedef struct _machine_signal_t { bool invert; } machine_signal_t; -STATIC mp_obj_t signal_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t signal_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_obj_t pin = args[0]; bool invert = false; #if defined(MICROPY_PY_MACHINE_PIN_MAKE_NEW) - mp_pin_p_t *pin_p = NULL; - - if (MP_OBJ_IS_OBJ(pin)) { - mp_obj_base_t *pin_base = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - pin_p = (mp_pin_p_t*)pin_base->type->protocol; - } + mp_pin_p_t *pin_p = (mp_pin_t*)mp_proto_get(QSTR_pin_protocol, pin); if (pin_p == NULL) { // If first argument isn't a Pin-like object, we filter out "invert" // from keyword arguments and pass them all to the exported Pin // constructor to create one. - mp_obj_t pin_args[n_args + n_kw * 2]; + mp_obj_t *pin_args = mp_local_alloc((n_args + n_kw * 2) * sizeof(mp_obj_t)); memcpy(pin_args, args, n_args * sizeof(mp_obj_t)); const mp_obj_t *src = args + n_args; mp_obj_t *dst = pin_args + n_args; @@ -88,15 +83,17 @@ STATIC mp_obj_t signal_make_new(const mp_obj_type_t *type, size_t n_args, size_t // will just ignore it as set a concrete type. If not, we'd need // to expose port's "default" pin type too. pin = MICROPY_PY_MACHINE_PIN_MAKE_NEW(NULL, n_args, n_kw, pin_args); + + mp_local_free(pin_args); } else #endif // Otherwise there should be 1 or 2 args { if (n_args == 1) { - if (n_kw == 0) { - } else if (n_kw == 1 && args[1] == MP_OBJ_NEW_QSTR(MP_QSTR_invert)) { - invert = mp_obj_is_true(args[2]); + if (kw_args == NULL || kw_args->used == 0) { + } else if (kw_args->used == 1 && kw_args->table[0].key == MP_OBJ_NEW_QSTR(MP_QSTR_invert)) { + invert = mp_obj_is_true(kw_args->table[0].value); } else { goto error; } @@ -131,7 +128,7 @@ STATIC mp_uint_t signal_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg // fast method for getting/setting signal value STATIC mp_obj_t signal_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num_kw_array(n_args, n_kw, 0, 1, false); if (n_args == 0) { // get pin return MP_OBJ_NEW_SMALL_INT(mp_virtual_pin_read(self_in)); @@ -168,6 +165,7 @@ STATIC const mp_rom_map_elem_t signal_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(signal_locals_dict, signal_locals_dict_table); STATIC const mp_pin_p_t signal_pin_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_pin) .ioctl = signal_ioctl, }; diff --git a/extmod/machine_spi.c b/extmod/machine_spi.c index a67d294baf724..4ead321d90dc6 100644 --- a/extmod/machine_spi.c +++ b/extmod/machine_spi.c @@ -30,6 +30,8 @@ #include "py/runtime.h" #include "extmod/machine_spi.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_MACHINE_SPI // if a port didn't define MSB/LSB constants then provide them @@ -38,76 +40,21 @@ #define MICROPY_PY_MACHINE_SPI_LSB (1) #endif -void mp_machine_soft_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - mp_machine_soft_spi_obj_t *self = (mp_machine_soft_spi_obj_t*)self_in; - uint32_t delay_half = self->delay_half; - - // only MSB transfer is implemented - - // If a port defines MICROPY_PY_MACHINE_SPI_MIN_DELAY, and the configured - // delay_half is equal to this value, then the software SPI implementation - // will run as fast as possible, limited only by CPU speed and GPIO time. - #ifdef MICROPY_PY_MACHINE_SPI_MIN_DELAY - if (delay_half == MICROPY_PY_MACHINE_SPI_MIN_DELAY) { - for (size_t i = 0; i < len; ++i) { - uint8_t data_out = src[i]; - uint8_t data_in = 0; - for (int j = 0; j < 8; ++j, data_out <<= 1) { - mp_hal_pin_write(self->mosi, (data_out >> 7) & 1); - mp_hal_pin_write(self->sck, 1 - self->polarity); - data_in = (data_in << 1) | mp_hal_pin_read(self->miso); - mp_hal_pin_write(self->sck, self->polarity); - } - if (dest != NULL) { - dest[i] = data_in; - } - } - return; - } - #endif - - for (size_t i = 0; i < len; ++i) { - uint8_t data_out = src[i]; - uint8_t data_in = 0; - for (int j = 0; j < 8; ++j, data_out <<= 1) { - mp_hal_pin_write(self->mosi, (data_out >> 7) & 1); - if (self->phase == 0) { - mp_hal_delay_us_fast(delay_half); - mp_hal_pin_write(self->sck, 1 - self->polarity); - } else { - mp_hal_pin_write(self->sck, 1 - self->polarity); - mp_hal_delay_us_fast(delay_half); - } - data_in = (data_in << 1) | mp_hal_pin_read(self->miso); - if (self->phase == 0) { - mp_hal_delay_us_fast(delay_half); - mp_hal_pin_write(self->sck, self->polarity); - } else { - mp_hal_pin_write(self->sck, self->polarity); - mp_hal_delay_us_fast(delay_half); - } - } - if (dest != NULL) { - dest[i] = data_in; - } - } -} - /******************************************************************************/ // MicroPython bindings for generic machine.SPI -STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args); +STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); -mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { // check the id argument, if given if (n_args > 0) { if (args[0] != MP_OBJ_NEW_SMALL_INT(-1)) { #if defined(MICROPY_PY_MACHINE_SPI_MAKE_NEW) // dispatch to port-specific constructor - extern mp_obj_t MICROPY_PY_MACHINE_SPI_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args); - return MICROPY_PY_MACHINE_SPI_MAKE_NEW(type, n_args, n_kw, args); + extern mp_obj_t MICROPY_PY_MACHINE_SPI_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); + return MICROPY_PY_MACHINE_SPI_MAKE_NEW(type, n_args, args, kw_args); #else - mp_raise_ValueError("invalid SPI peripheral"); + mp_raise_ValueError(translate("invalid SPI peripheral")); #endif } --n_args; @@ -115,12 +62,12 @@ mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_ } // software SPI - return mp_machine_soft_spi_make_new(type, n_args, n_kw, args); + return mp_machine_soft_spi_make_new(type, n_args, args, kw_args); } STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)s->type->protocol; + mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); spi_p->init(s, n_args - 1, args + 1, kw_args); return mp_const_none; } @@ -128,7 +75,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init); STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) { mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(self); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)s->type->protocol; + mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); if (spi_p->deinit != NULL) { spi_p->deinit(s); } @@ -138,7 +85,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_spi_deinit_obj, machine_spi_deinit); STATIC void mp_machine_spi_transfer(mp_obj_t self, size_t len, const void *src, void *dest) { mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(self); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)s->type->protocol; + mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); spi_p->transfer(s, len, src, dest); } @@ -174,7 +121,7 @@ STATIC mp_obj_t mp_machine_spi_write_readinto(mp_obj_t self, mp_obj_t wr_buf, mp mp_buffer_info_t dest; mp_get_buffer_raise(rd_buf, &dest, MP_BUFFER_WRITE); if (src.len != dest.len) { - mp_raise_ValueError("buffers must be the same length"); + mp_raise_ValueError(translate("buffers must be the same length")); } mp_machine_spi_transfer(self, src.len, src.buf, dest.buf); return mp_const_none; @@ -199,9 +146,9 @@ MP_DEFINE_CONST_DICT(mp_machine_spi_locals_dict, machine_spi_locals_dict_table); // Implementation of soft SPI STATIC uint32_t baudrate_from_delay_half(uint32_t delay_half) { - #ifdef MICROPY_PY_MACHINE_SPI_MIN_DELAY - if (delay_half == MICROPY_PY_MACHINE_SPI_MIN_DELAY) { - return MICROPY_PY_MACHINE_SPI_MAX_BAUDRATE; + #ifdef MICROPY_HW_SOFTSPI_MIN_DELAY + if (delay_half == MICROPY_HW_SOFTSPI_MIN_DELAY) { + return MICROPY_HW_SOFTSPI_MAX_BAUDRATE; } else #endif { @@ -210,9 +157,9 @@ STATIC uint32_t baudrate_from_delay_half(uint32_t delay_half) { } STATIC uint32_t baudrate_to_delay_half(uint32_t baudrate) { - #ifdef MICROPY_PY_MACHINE_SPI_MIN_DELAY - if (baudrate >= MICROPY_PY_MACHINE_SPI_MAX_BAUDRATE) { - return MICROPY_PY_MACHINE_SPI_MIN_DELAY; + #ifdef MICROPY_HW_SOFTSPI_MIN_DELAY + if (baudrate >= MICROPY_HW_SOFTSPI_MAX_BAUDRATE) { + return MICROPY_HW_SOFTSPI_MIN_DELAY; } else #endif { @@ -229,11 +176,11 @@ STATIC void mp_machine_soft_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_machine_soft_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); mp_printf(print, "SoftSPI(baudrate=%u, polarity=%u, phase=%u," " sck=" MP_HAL_PIN_FMT ", mosi=" MP_HAL_PIN_FMT ", miso=" MP_HAL_PIN_FMT ")", - baudrate_from_delay_half(self->delay_half), self->polarity, self->phase, - mp_hal_pin_name(self->sck), mp_hal_pin_name(self->mosi), mp_hal_pin_name(self->miso)); + baudrate_from_delay_half(self->spi.delay_half), self->spi.polarity, self->spi.phase, + mp_hal_pin_name(self->spi.sck), mp_hal_pin_name(self->spi.mosi), mp_hal_pin_name(self->spi.miso)); } -STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { +STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *all_args, mp_map_t *kw_args) { enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; static const mp_arg_t allowed_args[] = { { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, @@ -246,36 +193,33 @@ STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + mp_arg_parse_all(n_args, all_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); // create new object mp_machine_soft_spi_obj_t *self = m_new_obj(mp_machine_soft_spi_obj_t); self->base.type = &mp_machine_soft_spi_type; // set parameters - self->delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); - self->polarity = args[ARG_polarity].u_int; - self->phase = args[ARG_phase].u_int; + self->spi.delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); + self->spi.polarity = args[ARG_polarity].u_int; + self->spi.phase = args[ARG_phase].u_int; if (args[ARG_bits].u_int != 8) { - mp_raise_ValueError("bits must be 8"); + mp_raise_ValueError(translate("bits must be 8")); } if (args[ARG_firstbit].u_int != MICROPY_PY_MACHINE_SPI_MSB) { - mp_raise_ValueError("firstbit must be MSB"); + mp_raise_ValueError(translate("firstbit must be MSB")); } if (args[ARG_sck].u_obj == MP_OBJ_NULL || args[ARG_mosi].u_obj == MP_OBJ_NULL || args[ARG_miso].u_obj == MP_OBJ_NULL) { - mp_raise_ValueError("must specify all of sck/mosi/miso"); + mp_raise_ValueError(translate("must specify all of sck/mosi/miso")); } - self->sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); - self->mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); - self->miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); + self->spi.sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); + self->spi.mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); + self->spi.miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); - // configure pins - mp_hal_pin_write(self->sck, self->polarity); - mp_hal_pin_output(self->sck); - mp_hal_pin_output(self->mosi); - mp_hal_pin_input(self->miso); + // configure bus + mp_soft_spi_ioctl(&self->spi, MP_SPI_IOCTL_INIT); return MP_OBJ_FROM_PTR(self); } @@ -296,32 +240,35 @@ STATIC void mp_machine_soft_spi_init(mp_obj_base_t *self_in, size_t n_args, cons mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); if (args[ARG_baudrate].u_int != -1) { - self->delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); + self->spi.delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); } if (args[ARG_polarity].u_int != -1) { - self->polarity = args[ARG_polarity].u_int; + self->spi.polarity = args[ARG_polarity].u_int; } if (args[ARG_phase].u_int != -1) { - self->phase = args[ARG_phase].u_int; + self->spi.phase = args[ARG_phase].u_int; } if (args[ARG_sck].u_obj != MP_OBJ_NULL) { - self->sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); + self->spi.sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); } if (args[ARG_mosi].u_obj != MP_OBJ_NULL) { - self->mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); + self->spi.mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); } if (args[ARG_miso].u_obj != MP_OBJ_NULL) { - self->miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); + self->spi.miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); } - // configure pins - mp_hal_pin_write(self->sck, self->polarity); - mp_hal_pin_output(self->sck); - mp_hal_pin_output(self->mosi); - mp_hal_pin_input(self->miso); + // configure bus + mp_soft_spi_ioctl(&self->spi, MP_SPI_IOCTL_INIT); +} + +STATIC void mp_machine_soft_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { + mp_machine_soft_spi_obj_t *self = (mp_machine_soft_spi_obj_t*)self_in; + mp_soft_spi_transfer(&self->spi, len, src, dest); } -STATIC const mp_machine_spi_p_t mp_machine_soft_spi_p = { +const mp_machine_spi_p_t mp_machine_soft_spi_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_spi) .init = mp_machine_soft_spi_init, .deinit = NULL, .transfer = mp_machine_soft_spi_transfer, diff --git a/extmod/machine_spi.h b/extmod/machine_spi.h index e24e41eb3ded5..365b44d6e80ba 100644 --- a/extmod/machine_spi.h +++ b/extmod/machine_spi.h @@ -27,10 +27,13 @@ #define MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H #include "py/obj.h" +#include "py/proto.h" #include "py/mphal.h" +#include "drivers/bus/spi.h" // SPI protocol typedef struct _mp_machine_spi_p_t { + MP_PROTOCOL_HEAD void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); void (*deinit)(mp_obj_base_t *obj); // can be NULL void (*transfer)(mp_obj_base_t *obj, size_t len, const uint8_t *src, uint8_t *dest); @@ -38,19 +41,13 @@ typedef struct _mp_machine_spi_p_t { typedef struct _mp_machine_soft_spi_obj_t { mp_obj_base_t base; - uint32_t delay_half; // microsecond delay for half SCK period - uint8_t polarity; - uint8_t phase; - mp_hal_pin_obj_t sck; - mp_hal_pin_obj_t mosi; - mp_hal_pin_obj_t miso; + mp_soft_spi_obj_t spi; } mp_machine_soft_spi_obj_t; +extern const mp_machine_spi_p_t mp_machine_soft_spi_p; extern const mp_obj_type_t mp_machine_soft_spi_type; extern const mp_obj_dict_t mp_machine_spi_locals_dict; -void mp_machine_soft_spi_transfer(mp_obj_base_t *self, size_t len, const uint8_t *src, uint8_t *dest); - mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj); diff --git a/extmod/modbtree.c b/extmod/modbtree.c index 5c13115328fe3..7cfa9c6afb808 100644 --- a/extmod/modbtree.c +++ b/extmod/modbtree.c @@ -247,7 +247,7 @@ STATIC mp_obj_t btree_iternext(mp_obj_t self_in) { } STATIC mp_obj_t btree_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { - mp_obj_btree_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_btree_t *self = mp_instance_cast_to_native_base(self_in, &btree_type); if (value == MP_OBJ_NULL) { // delete DBT key; @@ -282,7 +282,7 @@ STATIC mp_obj_t btree_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { STATIC mp_obj_t btree_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { mp_obj_btree_t *self = MP_OBJ_TO_PTR(lhs_in); switch (op) { - case MP_BINARY_OP_IN: { + case MP_BINARY_OP_CONTAINS: { DBT key, val; key.data = (void*)mp_obj_str_get_data(rhs_in, &key.size); int res = __bt_get(self->db, &key, &val, 0); diff --git a/extmod/modframebuf.c b/extmod/modframebuf.c index 20e40d5791951..c59d1592ba4e9 100644 --- a/extmod/modframebuf.c +++ b/extmod/modframebuf.c @@ -28,10 +28,12 @@ #include #include "py/runtime.h" +#include "py/objtype.h" +#include "py/proto.h" #if MICROPY_PY_FRAMEBUF -#include "ports/stm32/font_petme128_8x8.h" +#include "font_petme128_8x8.h" typedef struct _mp_obj_framebuf_t { mp_obj_base_t base; @@ -46,6 +48,7 @@ typedef uint32_t (*getpixel_t)(const mp_obj_framebuf_t*, int, int); typedef void (*fill_rect_t)(const mp_obj_framebuf_t *, int, int, int, int, uint32_t); typedef struct _mp_framebuf_p_t { + MP_PROTOCOL_HEAD setpixel_t setpixel; getpixel_t getpixel; fill_rect_t fill_rect; @@ -54,7 +57,9 @@ typedef struct _mp_framebuf_p_t { // constants for formats #define FRAMEBUF_MVLSB (0) #define FRAMEBUF_RGB565 (1) +#define FRAMEBUF_GS2_HMSB (5) #define FRAMEBUF_GS4_HMSB (2) +#define FRAMEBUF_GS8 (6) #define FRAMEBUF_MHLSB (3) #define FRAMEBUF_MHMSB (4) @@ -130,6 +135,30 @@ STATIC void rgb565_fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, i } } +// Functions for GS2_HMSB format + +STATIC void gs2_hmsb_setpixel(const mp_obj_framebuf_t *fb, int x, int y, uint32_t col) { + uint8_t *pixel = &((uint8_t*)fb->buf)[(x + y * fb->stride) >> 2]; + uint8_t shift = (x & 0x3) << 1; + uint8_t mask = 0x3 << shift; + uint8_t color = (col & 0x3) << shift; + *pixel = color | (*pixel & (~mask)); +} + +STATIC uint32_t gs2_hmsb_getpixel(const mp_obj_framebuf_t *fb, int x, int y) { + uint8_t pixel = ((uint8_t*)fb->buf)[(x + y * fb->stride) >> 2]; + uint8_t shift = (x & 0x3) << 1; + return (pixel >> shift) & 0x3; +} + +STATIC void gs2_hmsb_fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, int h, uint32_t col) { + for (int xx=x; xx < x+w; xx++) { + for (int yy=y; yy < y+h; yy++) { + gs2_hmsb_setpixel(fb, xx, yy, col); + } + } +} + // Functions for GS4_HMSB format STATIC void gs4_hmsb_setpixel(const mp_obj_framebuf_t *fb, int x, int y, uint32_t col) { @@ -181,12 +210,33 @@ STATIC void gs4_hmsb_fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, } } +// Functions for GS8 format + +STATIC void gs8_setpixel(const mp_obj_framebuf_t *fb, int x, int y, uint32_t col) { + uint8_t *pixel = &((uint8_t*)fb->buf)[(x + y * fb->stride)]; + *pixel = col & 0xff; +} + +STATIC uint32_t gs8_getpixel(const mp_obj_framebuf_t *fb, int x, int y) { + return ((uint8_t*)fb->buf)[(x + y * fb->stride)]; +} + +STATIC void gs8_fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, int h, uint32_t col) { + uint8_t *pixel = &((uint8_t*)fb->buf)[(x + y * fb->stride)]; + while (h--) { + memset(pixel, col, w); + pixel += fb->stride; + } +} + STATIC mp_framebuf_p_t formats[] = { - [FRAMEBUF_MVLSB] = {mvlsb_setpixel, mvlsb_getpixel, mvlsb_fill_rect}, - [FRAMEBUF_RGB565] = {rgb565_setpixel, rgb565_getpixel, rgb565_fill_rect}, - [FRAMEBUF_GS4_HMSB] = {gs4_hmsb_setpixel, gs4_hmsb_getpixel, gs4_hmsb_fill_rect}, - [FRAMEBUF_MHLSB] = {mono_horiz_setpixel, mono_horiz_getpixel, mono_horiz_fill_rect}, - [FRAMEBUF_MHMSB] = {mono_horiz_setpixel, mono_horiz_getpixel, mono_horiz_fill_rect}, + [FRAMEBUF_MVLSB] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) mvlsb_setpixel, mvlsb_getpixel, mvlsb_fill_rect}, + [FRAMEBUF_RGB565] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) rgb565_setpixel, rgb565_getpixel, rgb565_fill_rect}, + [FRAMEBUF_GS2_HMSB] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) gs2_hmsb_setpixel, gs2_hmsb_getpixel, gs2_hmsb_fill_rect}, + [FRAMEBUF_GS4_HMSB] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) gs4_hmsb_setpixel, gs4_hmsb_getpixel, gs4_hmsb_fill_rect}, + [FRAMEBUF_GS8] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) gs8_setpixel, gs8_getpixel, gs8_fill_rect}, + [FRAMEBUF_MHLSB] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) mono_horiz_setpixel, mono_horiz_getpixel, mono_horiz_fill_rect}, + [FRAMEBUF_MHMSB] = {MP_PROTO_IMPLEMENT(MP_QSTR_protocol_framebuf) mono_horiz_setpixel, mono_horiz_getpixel, mono_horiz_fill_rect}, }; static inline void setpixel(const mp_obj_framebuf_t *fb, int x, int y, uint32_t col) { @@ -212,8 +262,8 @@ STATIC void fill_rect(const mp_obj_framebuf_t *fb, int x, int y, int w, int h, u formats[fb->format].fill_rect(fb, x, y, xend - x, yend - y, col); } -STATIC mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 4, 5, false); +STATIC mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 4, 5, false); mp_obj_framebuf_t *o = m_new_obj(mp_obj_framebuf_t); o->base.type = type; @@ -240,19 +290,33 @@ STATIC mp_obj_t framebuf_make_new(const mp_obj_type_t *type, size_t n_args, size case FRAMEBUF_MHMSB: o->stride = (o->stride + 7) & ~7; break; + case FRAMEBUF_GS2_HMSB: + o->stride = (o->stride + 3) & ~3; + break; case FRAMEBUF_GS4_HMSB: o->stride = (o->stride + 1) & ~1; break; + case FRAMEBUF_GS8: + break; default: - mp_raise_ValueError("invalid format"); + mp_raise_ValueError(translate("invalid format")); } return MP_OBJ_FROM_PTR(o); } +STATIC const mp_obj_type_t mp_type_framebuf; + +// Helper to ensure we have the native super class instead of a subclass. +static mp_obj_framebuf_t* native_framebuf(mp_obj_t framebuf_obj) { + mp_obj_t native_framebuf = mp_instance_cast_to_native_base(framebuf_obj, &mp_type_framebuf); + mp_obj_assert_native_inited(native_framebuf); + return MP_OBJ_TO_PTR(native_framebuf); +} + STATIC mp_int_t framebuf_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) { (void)flags; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_framebuf_t *self = native_framebuf(self_in); bufinfo->buf = self->buf; bufinfo->len = self->stride * self->height * (self->format == FRAMEBUF_RGB565 ? 2 : 1); bufinfo->typecode = 'B'; // view framebuf as bytes @@ -260,7 +324,7 @@ STATIC mp_int_t framebuf_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, } STATIC mp_obj_t framebuf_fill(mp_obj_t self_in, mp_obj_t col_in) { - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_framebuf_t *self = native_framebuf(self_in); mp_int_t col = mp_obj_get_int(col_in); formats[self->format].fill_rect(self, 0, 0, self->width, self->height, col); return mp_const_none; @@ -270,7 +334,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(framebuf_fill_obj, framebuf_fill); STATIC mp_obj_t framebuf_fill_rect(size_t n_args, const mp_obj_t *args) { (void)n_args; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x = mp_obj_get_int(args[1]); mp_int_t y = mp_obj_get_int(args[2]); mp_int_t width = mp_obj_get_int(args[3]); @@ -284,7 +348,7 @@ STATIC mp_obj_t framebuf_fill_rect(size_t n_args, const mp_obj_t *args) { STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_fill_rect_obj, 6, 6, framebuf_fill_rect); STATIC mp_obj_t framebuf_pixel(size_t n_args, const mp_obj_t *args) { - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x = mp_obj_get_int(args[1]); mp_int_t y = mp_obj_get_int(args[2]); if (0 <= x && x < self->width && 0 <= y && y < self->height) { @@ -303,7 +367,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_pixel_obj, 3, 4, framebuf_pi STATIC mp_obj_t framebuf_hline(size_t n_args, const mp_obj_t *args) { (void)n_args; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x = mp_obj_get_int(args[1]); mp_int_t y = mp_obj_get_int(args[2]); mp_int_t w = mp_obj_get_int(args[3]); @@ -318,7 +382,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_hline_obj, 5, 5, framebuf_hl STATIC mp_obj_t framebuf_vline(size_t n_args, const mp_obj_t *args) { (void)n_args; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x = mp_obj_get_int(args[1]); mp_int_t y = mp_obj_get_int(args[2]); mp_int_t h = mp_obj_get_int(args[3]); @@ -333,7 +397,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_vline_obj, 5, 5, framebuf_vl STATIC mp_obj_t framebuf_rect(size_t n_args, const mp_obj_t *args) { (void)n_args; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x = mp_obj_get_int(args[1]); mp_int_t y = mp_obj_get_int(args[2]); mp_int_t w = mp_obj_get_int(args[3]); @@ -352,7 +416,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_rect_obj, 6, 6, framebuf_rec STATIC mp_obj_t framebuf_line(size_t n_args, const mp_obj_t *args) { (void)n_args; - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); mp_int_t x1 = mp_obj_get_int(args[1]); mp_int_t y1 = mp_obj_get_int(args[2]); mp_int_t x2 = mp_obj_get_int(args[3]); @@ -416,8 +480,8 @@ STATIC mp_obj_t framebuf_line(size_t n_args, const mp_obj_t *args) { STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_line_obj, 6, 6, framebuf_line); STATIC mp_obj_t framebuf_blit(size_t n_args, const mp_obj_t *args) { - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); - mp_obj_framebuf_t *source = MP_OBJ_TO_PTR(args[1]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); + mp_obj_framebuf_t *source = native_framebuf(args[1]); mp_int_t x = mp_obj_get_int(args[2]); mp_int_t y = mp_obj_get_int(args[3]); mp_int_t key = -1; @@ -459,7 +523,7 @@ STATIC mp_obj_t framebuf_blit(size_t n_args, const mp_obj_t *args) { STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(framebuf_blit_obj, 4, 5, framebuf_blit); STATIC mp_obj_t framebuf_scroll(mp_obj_t self_in, mp_obj_t xstep_in, mp_obj_t ystep_in) { - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_framebuf_t *self = native_framebuf(self_in); mp_int_t xstep = mp_obj_get_int(xstep_in); mp_int_t ystep = mp_obj_get_int(ystep_in); int sx, y, xend, yend, dx, dy; @@ -492,7 +556,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_3(framebuf_scroll_obj, framebuf_scroll); STATIC mp_obj_t framebuf_text(size_t n_args, const mp_obj_t *args) { // extract arguments - mp_obj_framebuf_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_framebuf_t *self = native_framebuf(args[0]); const char *str = mp_obj_str_get_str(args[1]); mp_int_t x0 = mp_obj_get_int(args[2]); mp_int_t y0 = mp_obj_get_int(args[3]); @@ -579,7 +643,9 @@ STATIC const mp_rom_map_elem_t framebuf_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_MVLSB), MP_ROM_INT(FRAMEBUF_MVLSB) }, { MP_ROM_QSTR(MP_QSTR_MONO_VLSB), MP_ROM_INT(FRAMEBUF_MVLSB) }, { MP_ROM_QSTR(MP_QSTR_RGB565), MP_ROM_INT(FRAMEBUF_RGB565) }, + { MP_ROM_QSTR(MP_QSTR_GS2_HMSB), MP_ROM_INT(FRAMEBUF_GS2_HMSB) }, { MP_ROM_QSTR(MP_QSTR_GS4_HMSB), MP_ROM_INT(FRAMEBUF_GS4_HMSB) }, + { MP_ROM_QSTR(MP_QSTR_GS8), MP_ROM_INT(FRAMEBUF_GS8) }, { MP_ROM_QSTR(MP_QSTR_MONO_HLSB), MP_ROM_INT(FRAMEBUF_MHLSB) }, { MP_ROM_QSTR(MP_QSTR_MONO_HMSB), MP_ROM_INT(FRAMEBUF_MHMSB) }, }; diff --git a/extmod/modlwip.c b/extmod/modlwip.c index bbb01b5d764bb..776b81ee51a7e 100644 --- a/extmod/modlwip.c +++ b/extmod/modlwip.c @@ -38,13 +38,18 @@ #include "lib/netutils/netutils.h" #include "lwip/init.h" -#include "lwip/timers.h" #include "lwip/tcp.h" #include "lwip/udp.h" //#include "lwip/raw.h" #include "lwip/dns.h" -#include "lwip/tcp_impl.h" #include "lwip/igmp.h" +#if LWIP_VERSION_MAJOR < 2 +#include "lwip/timers.h" +#include "lwip/tcp_impl.h" +#else +#include "lwip/timeouts.h" +#include "lwip/priv/tcp_priv.h" +#endif #if 0 // print debugging info #define DEBUG_printf DEBUG_printf @@ -64,12 +69,12 @@ #define ip_reset_option(pcb, opt) ((pcb)->so_options &= ~(opt)) #endif -#ifdef MICROPY_PY_LWIP_SLIP +#if MICROPY_PY_LWIP_SLIP #include "netif/slipif.h" #include "lwip/sio.h" #endif -#ifdef MICROPY_PY_LWIP_SLIP +#if MICROPY_PY_LWIP_SLIP /******************************************************************************/ // Slip object for modlwip. Requires a serial driver for the port that supports // the lwip serial callback functions. @@ -171,11 +176,16 @@ STATIC const mp_obj_type_t lwip_slip_type = { // Table to convert lwIP err_t codes to socket errno codes, from the lwIP // socket API. +// lwIP 2 changed LWIP_VERSION and it can no longer be used in macros, +// so we define our own equivalent version that can. +#define LWIP_VERSION_MACRO (LWIP_VERSION_MAJOR << 24 | LWIP_VERSION_MINOR << 16 \ + | LWIP_VERSION_REVISION << 8 | LWIP_VERSION_RC) + // Extension to lwIP error codes #define _ERR_BADF -16 // TODO: We just know that change happened somewhere between 1.4.0 and 1.4.1, // investigate in more detail. -#if LWIP_VERSION < 0x01040100 +#if LWIP_VERSION_MACRO < 0x01040100 static const int error_lookup_table[] = { 0, /* ERR_OK 0 No error, everything OK. */ MP_ENOMEM, /* ERR_MEM -1 Out of memory error. */ @@ -196,7 +206,7 @@ static const int error_lookup_table[] = { MP_EALREADY, /* ERR_ISCONN -15 Already connected. */ MP_EBADF, /* _ERR_BADF -16 Closed socket (null pcb) */ }; -#else +#elif LWIP_VERSION_MACRO < 0x02000000 static const int error_lookup_table[] = { 0, /* ERR_OK 0 No error, everything OK. */ MP_ENOMEM, /* ERR_MEM -1 Out of memory error. */ @@ -217,6 +227,30 @@ static const int error_lookup_table[] = { -1, /* ERR_IF -15 Low-level netif error */ MP_EBADF, /* _ERR_BADF -16 Closed socket (null pcb) */ }; +#else +// Matches lwIP 2.0.3 +#undef _ERR_BADF +#define _ERR_BADF -17 +static const int error_lookup_table[] = { + 0, /* ERR_OK 0 No error, everything OK */ + MP_ENOMEM, /* ERR_MEM -1 Out of memory error */ + MP_ENOBUFS, /* ERR_BUF -2 Buffer error */ + MP_EWOULDBLOCK, /* ERR_TIMEOUT -3 Timeout */ + MP_EHOSTUNREACH, /* ERR_RTE -4 Routing problem */ + MP_EINPROGRESS, /* ERR_INPROGRESS -5 Operation in progress */ + MP_EINVAL, /* ERR_VAL -6 Illegal value */ + MP_EWOULDBLOCK, /* ERR_WOULDBLOCK -7 Operation would block */ + MP_EADDRINUSE, /* ERR_USE -8 Address in use */ + MP_EALREADY, /* ERR_ALREADY -9 Already connecting */ + MP_EALREADY, /* ERR_ISCONN -10 Conn already established */ + MP_ENOTCONN, /* ERR_CONN -11 Not connected */ + -1, /* ERR_IF -12 Low-level netif error */ + MP_ECONNABORTED, /* ERR_ABRT -13 Connection aborted */ + MP_ECONNRESET, /* ERR_RST -14 Connection reset */ + MP_ENOTCONN, /* ERR_CLSD -15 Connection closed */ + MP_EIO, /* ERR_ARG -16 Illegal argument. */ + MP_EBADF, /* _ERR_BADF -17 Closed socket (null pcb) */ +}; #endif /*******************************************************************************/ @@ -276,7 +310,12 @@ static inline void exec_user_callback(lwip_socket_obj_t *socket) { // Callback for incoming UDP packets. We simply stash the packet and the source address, // in case we need it for recvfrom. -STATIC void _lwip_udp_incoming(void *arg, struct udp_pcb *upcb, struct pbuf *p, ip_addr_t *addr, u16_t port) { +#if LWIP_VERSION_MAJOR < 2 +STATIC void _lwip_udp_incoming(void *arg, struct udp_pcb *upcb, struct pbuf *p, ip_addr_t *addr, u16_t port) +#else +STATIC void _lwip_udp_incoming(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port) +#endif +{ lwip_socket_obj_t *socket = (lwip_socket_obj_t*)arg; if (socket->incoming.pbuf != NULL) { @@ -498,6 +537,11 @@ STATIC mp_uint_t lwip_tcp_send(lwip_socket_obj_t *socket, const byte *buf, mp_ui err_t err = tcp_write(socket->pcb.tcp, buf, write_len, TCP_WRITE_FLAG_COPY); + // If the output buffer is getting full then send the data to the lower layers + if (err == ERR_OK && tcp_sndbuf(socket->pcb.tcp) < TCP_SND_BUF / 4) { + err = tcp_output(socket->pcb.tcp); + } + if (err != ERR_OK) { *_errno = error_lookup_table[-err]; return MP_STREAM_ERROR; @@ -632,42 +676,6 @@ STATIC mp_obj_t lwip_socket_make_new(const mp_obj_type_t *type, size_t n_args, s return socket; } -STATIC mp_obj_t lwip_socket_close(mp_obj_t self_in) { - lwip_socket_obj_t *socket = self_in; - bool socket_is_listener = false; - - if (socket->pcb.tcp == NULL) { - return mp_const_none; - } - switch (socket->type) { - case MOD_NETWORK_SOCK_STREAM: { - if (socket->pcb.tcp->state == LISTEN) { - socket_is_listener = true; - } - if (tcp_close(socket->pcb.tcp) != ERR_OK) { - DEBUG_printf("lwip_close: had to call tcp_abort()\n"); - tcp_abort(socket->pcb.tcp); - } - break; - } - case MOD_NETWORK_SOCK_DGRAM: udp_remove(socket->pcb.udp); break; - //case MOD_NETWORK_SOCK_RAW: raw_remove(socket->pcb.raw); break; - } - socket->pcb.tcp = NULL; - socket->state = _ERR_BADF; - if (socket->incoming.pbuf != NULL) { - if (!socket_is_listener) { - pbuf_free(socket->incoming.pbuf); - } else { - tcp_abort(socket->incoming.connection); - } - socket->incoming.pbuf = NULL; - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(lwip_socket_close_obj, lwip_socket_close); - STATIC mp_obj_t lwip_socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { lwip_socket_obj_t *socket = self_in; @@ -715,6 +723,9 @@ STATIC mp_obj_t lwip_socket_listen(mp_obj_t self_in, mp_obj_t backlog_in) { socket->pcb.tcp = new_pcb; tcp_accept(new_pcb, _lwip_tcp_accept); + // Socket is no longer considered "new" for purposes of polling + socket->state = STATE_CONNECTING; + return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_2(lwip_socket_listen_obj, lwip_socket_listen); @@ -1163,17 +1174,60 @@ STATIC mp_uint_t lwip_socket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_ ret |= MP_STREAM_POLL_RD; } - if (flags & MP_STREAM_POLL_WR && tcp_sndbuf(socket->pcb.tcp) > 0) { + // Note: pcb.tcp==NULL if state<0, and in this case we can't call tcp_sndbuf + if (flags & MP_STREAM_POLL_WR && socket->pcb.tcp != NULL && tcp_sndbuf(socket->pcb.tcp) > 0) { ret |= MP_STREAM_POLL_WR; } - if (socket->state == STATE_PEER_CLOSED) { + if (socket->state == STATE_NEW) { + // New sockets are not connected so set HUP + ret |= flags & MP_STREAM_POLL_HUP; + } else if (socket->state == STATE_PEER_CLOSED) { // Peer-closed socket is both readable and writable: read will // return EOF, write - error. Without this poll will hang on a // socket which was closed by peer. ret |= flags & (MP_STREAM_POLL_RD | MP_STREAM_POLL_WR); + } else if (socket->state == ERR_RST) { + // Socket was reset by peer, a write will return an error + ret |= flags & (MP_STREAM_POLL_WR | MP_STREAM_POLL_HUP); + } else if (socket->state < 0) { + // Socket in some other error state, use catch-all ERR flag + // TODO: may need to set other return flags here + ret |= flags & MP_STREAM_POLL_ERR; } + } else if (request == MP_STREAM_CLOSE) { + bool socket_is_listener = false; + + if (socket->pcb.tcp == NULL) { + return 0; + } + switch (socket->type) { + case MOD_NETWORK_SOCK_STREAM: { + if (socket->pcb.tcp->state == LISTEN) { + socket_is_listener = true; + } + if (tcp_close(socket->pcb.tcp) != ERR_OK) { + DEBUG_printf("lwip_close: had to call tcp_abort()\n"); + tcp_abort(socket->pcb.tcp); + } + break; + } + case MOD_NETWORK_SOCK_DGRAM: udp_remove(socket->pcb.udp); break; + //case MOD_NETWORK_SOCK_RAW: raw_remove(socket->pcb.raw); break; + } + socket->pcb.tcp = NULL; + socket->state = _ERR_BADF; + if (socket->incoming.pbuf != NULL) { + if (!socket_is_listener) { + pbuf_free(socket->incoming.pbuf); + } else { + tcp_abort(socket->incoming.connection); + } + socket->incoming.pbuf = NULL; + } + ret = 0; + } else { *errcode = MP_EINVAL; ret = MP_STREAM_ERROR; @@ -1183,8 +1237,8 @@ STATIC mp_uint_t lwip_socket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_ } STATIC const mp_rom_map_elem_t lwip_socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&lwip_socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&lwip_socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&lwip_socket_bind_obj) }, { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&lwip_socket_listen_obj) }, { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&lwip_socket_accept_obj) }, @@ -1207,6 +1261,7 @@ STATIC const mp_rom_map_elem_t lwip_socket_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(lwip_socket_locals_dict, lwip_socket_locals_dict_table); STATIC const mp_stream_p_t lwip_socket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = lwip_socket_read, .write = lwip_socket_write, .ioctl = lwip_socket_ioctl, @@ -1278,7 +1333,12 @@ typedef struct _getaddrinfo_state_t { } getaddrinfo_state_t; // Callback for incoming DNS requests. -STATIC void lwip_getaddrinfo_cb(const char *name, ip_addr_t *ipaddr, void *arg) { +#if LWIP_VERSION_MAJOR < 2 +STATIC void lwip_getaddrinfo_cb(const char *name, ip_addr_t *ipaddr, void *arg) +#else +STATIC void lwip_getaddrinfo_cb(const char *name, const ip_addr_t *ipaddr, void *arg) +#endif +{ getaddrinfo_state_t *state = arg; if (ipaddr != NULL) { state->status = 1; @@ -1291,14 +1351,33 @@ STATIC void lwip_getaddrinfo_cb(const char *name, ip_addr_t *ipaddr, void *arg) // lwip.getaddrinfo STATIC mp_obj_t lwip_getaddrinfo(size_t n_args, const mp_obj_t *args) { - if (n_args > 2) { - mp_warning("getaddrinfo constraints not supported"); - } - mp_obj_t host_in = args[0], port_in = args[1]; const char *host = mp_obj_str_get_str(host_in); mp_int_t port = mp_obj_get_int(port_in); + // If constraints were passed then check they are compatible with the supported params + if (n_args > 2) { + mp_int_t family = mp_obj_get_int(args[2]); + mp_int_t type = 0; + mp_int_t proto = 0; + mp_int_t flags = 0; + if (n_args > 3) { + type = mp_obj_get_int(args[3]); + if (n_args > 4) { + proto = mp_obj_get_int(args[4]); + if (n_args > 5) { + flags = mp_obj_get_int(args[5]); + } + } + } + if (!((family == 0 || family == MOD_NETWORK_AF_INET) + && (type == 0 || type == MOD_NETWORK_SOCK_STREAM) + && proto == 0 + && flags == 0)) { + mp_warning("unsupported getaddrinfo constraints"); + } + } + getaddrinfo_state_t state; state.status = 0; @@ -1331,7 +1410,7 @@ STATIC mp_obj_t lwip_getaddrinfo(size_t n_args, const mp_obj_t *args) { tuple->items[4] = netutils_format_inet_addr((uint8_t*)&state.ipaddr, port, NETUTILS_BIG); return mp_obj_new_list(1, (mp_obj_t*)&tuple); } -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(lwip_getaddrinfo_obj, 2, 6, lwip_getaddrinfo); +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(lwip_getaddrinfo_obj, 2, 6, lwip_getaddrinfo); // Debug functions @@ -1341,7 +1420,7 @@ STATIC mp_obj_t lwip_print_pcbs() { } MP_DEFINE_CONST_FUN_OBJ_0(lwip_print_pcbs_obj, lwip_print_pcbs); -#ifdef MICROPY_PY_LWIP +#if MICROPY_PY_LWIP STATIC const mp_rom_map_elem_t mp_module_lwip_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_lwip) }, @@ -1351,7 +1430,7 @@ STATIC const mp_rom_map_elem_t mp_module_lwip_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_print_pcbs), MP_ROM_PTR(&lwip_print_pcbs_obj) }, // objects { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&lwip_socket_type) }, -#ifdef MICROPY_PY_LWIP_SLIP +#if MICROPY_PY_LWIP_SLIP { MP_ROM_QSTR(MP_QSTR_slip), MP_ROM_PTR(&lwip_slip_type) }, #endif // class constants diff --git a/extmod/modubinascii.c b/extmod/modubinascii.c index 8256a50cf2042..0f64b2715173f 100644 --- a/extmod/modubinascii.c +++ b/extmod/modubinascii.c @@ -32,11 +32,20 @@ #include "py/binary.h" #include "extmod/modubinascii.h" +static void check_not_unicode(const mp_obj_t arg) { +#if MICROPY_CPYTHON_COMPAT + if (MP_OBJ_IS_STR(arg)) { + mp_raise_TypeError(translate("a bytes-like object is required")); + } +#endif +} + mp_obj_t mod_binascii_hexlify(size_t n_args, const mp_obj_t *args) { // Second argument is for an extension to allow a separator to be used // between values. const char *sep = NULL; mp_buffer_info_t bufinfo; + check_not_unicode(args[0]); mp_get_buffer_raise(args[0], &bufinfo, MP_BUFFER_READ); // Code below assumes non-zero buffer length when computing size with @@ -78,7 +87,7 @@ mp_obj_t mod_binascii_unhexlify(mp_obj_t data) { mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); if ((bufinfo.len & 1) != 0) { - mp_raise_ValueError("odd-length string"); + mp_raise_ValueError(translate("odd-length string")); } vstr_t vstr; vstr_init_len(&vstr, bufinfo.len / 2); @@ -89,7 +98,7 @@ mp_obj_t mod_binascii_unhexlify(mp_obj_t data) { if (unichar_isxdigit(hex_ch)) { hex_byte += unichar_xdigit_value(hex_ch); } else { - mp_raise_ValueError("non-hex digit found"); + mp_raise_ValueError(translate("non-hex digit found")); } if (i & 1) { hex_byte <<= 4; @@ -157,7 +166,7 @@ mp_obj_t mod_binascii_a2b_base64(mp_obj_t data) { } if (nbits) { - mp_raise_ValueError("incorrect padding"); + mp_raise_ValueError(translate("incorrect padding")); } return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); @@ -165,6 +174,7 @@ mp_obj_t mod_binascii_a2b_base64(mp_obj_t data) { MP_DEFINE_CONST_FUN_OBJ_1(mod_binascii_a2b_base64_obj, mod_binascii_a2b_base64); mp_obj_t mod_binascii_b2a_base64(mp_obj_t data) { + check_not_unicode(data); mp_buffer_info_t bufinfo; mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); @@ -218,10 +228,11 @@ mp_obj_t mod_binascii_b2a_base64(mp_obj_t data) { MP_DEFINE_CONST_FUN_OBJ_1(mod_binascii_b2a_base64_obj, mod_binascii_b2a_base64); #if MICROPY_PY_UBINASCII_CRC32 -#include "uzlib/tinf.h" +#include "../../lib/uzlib/src/tinf.h" mp_obj_t mod_binascii_crc32(size_t n_args, const mp_obj_t *args) { mp_buffer_info_t bufinfo; + check_not_unicode(args[0]); mp_get_buffer_raise(args[0], &bufinfo, MP_BUFFER_READ); uint32_t crc = (n_args > 1) ? mp_obj_get_int_truncated(args[1]) : 0; crc = uzlib_crc32(bufinfo.buf, bufinfo.len, crc ^ 0xffffffff); @@ -233,7 +244,7 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_binascii_crc32_obj, 1, 2, mod_binascii_c #if MICROPY_PY_UBINASCII STATIC const mp_rom_map_elem_t mp_module_binascii_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ubinascii) }, + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_binascii) }, { MP_ROM_QSTR(MP_QSTR_hexlify), MP_ROM_PTR(&mod_binascii_hexlify_obj) }, { MP_ROM_QSTR(MP_QSTR_unhexlify), MP_ROM_PTR(&mod_binascii_unhexlify_obj) }, { MP_ROM_QSTR(MP_QSTR_a2b_base64), MP_ROM_PTR(&mod_binascii_a2b_base64_obj) }, diff --git a/extmod/moductypes.c b/extmod/moductypes.c index b0f28331e99d2..451dc29ed96ab 100644 --- a/extmod/moductypes.c +++ b/extmod/moductypes.c @@ -32,6 +32,8 @@ #include "py/objtuple.h" #include "py/binary.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UCTYPES /// \module uctypes - Access data structures in memory @@ -117,11 +119,11 @@ typedef struct _mp_obj_uctypes_struct_t { } mp_obj_uctypes_struct_t; STATIC NORETURN void syntax_error(void) { - mp_raise_TypeError("syntax error in uctypes descriptor"); + mp_raise_TypeError(translate("syntax error in uctypes descriptor")); } -STATIC mp_obj_t uctypes_struct_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 2, 3, false); +STATIC mp_obj_t uctypes_struct_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 2, 3, false); mp_obj_uctypes_struct_t *o = m_new_obj(mp_obj_uctypes_struct_t); o->base.type = type; o->addr = (void*)(uintptr_t)mp_obj_int_get_truncated(args[0]); @@ -214,7 +216,7 @@ STATIC mp_uint_t uctypes_struct_size(mp_obj_t desc_in, int layout_type, mp_uint_ // but scalar structure field is lowered into native Python int, so all // type info is lost. So, we cannot say if it's scalar type description, // or such lowered scalar. - mp_raise_TypeError("Cannot unambiguously get sizeof scalar"); + mp_raise_TypeError(translate("Cannot unambiguously get sizeof scalar")); } syntax_error(); } @@ -392,7 +394,7 @@ STATIC mp_obj_t uctypes_struct_attr_op(mp_obj_t self_in, qstr attr, mp_obj_t set // TODO: Support at least OrderedDict in addition if (!MP_OBJ_IS_TYPE(self->desc, &mp_type_dict)) { - mp_raise_TypeError("struct: no fields"); + mp_raise_TypeError(translate("struct: no fields")); } mp_obj_t deref = mp_obj_dict_get(self->desc, MP_OBJ_NEW_QSTR(attr)); @@ -516,8 +518,8 @@ STATIC void uctypes_struct_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { } } -STATIC mp_obj_t uctypes_struct_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value) { - mp_obj_uctypes_struct_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t uctypes_struct_subscr(mp_obj_t base_in, mp_obj_t index_in, mp_obj_t value) { + mp_obj_uctypes_struct_t *self = mp_instance_cast_to_native_base(base_in, &uctypes_struct_type); if (value == MP_OBJ_NULL) { // delete @@ -525,7 +527,7 @@ STATIC mp_obj_t uctypes_struct_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_ob } else { // load / store if (!MP_OBJ_IS_TYPE(self->desc, &mp_type_tuple)) { - mp_raise_TypeError("struct: cannot index"); + mp_raise_TypeError(translate("struct: cannot index")); } mp_obj_tuple_t *t = MP_OBJ_TO_PTR(self->desc); @@ -539,7 +541,7 @@ STATIC mp_obj_t uctypes_struct_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_ob uint val_type = GET_TYPE(arr_sz, VAL_TYPE_BITS); arr_sz &= VALUE_MASK(VAL_TYPE_BITS); if (index >= arr_sz) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, "struct: index out of range")); + nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, translate("struct: index out of range"))); } if (t->len == 2) { diff --git a/extmod/moduhashlib.c b/extmod/moduhashlib.c index 3fad69247e10b..970c63da82ae3 100644 --- a/extmod/moduhashlib.c +++ b/extmod/moduhashlib.c @@ -29,130 +29,228 @@ #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UHASHLIB +#if MICROPY_PY_UHASHLIB_SHA256 + +#if MICROPY_SSL_MBEDTLS +#include "mbedtls/sha256.h" +#else #include "crypto-algorithms/sha256.h" +#endif + +#endif + #if MICROPY_PY_UHASHLIB_SHA1 + +#if MICROPY_SSL_AXTLS #include "lib/axtls/crypto/crypto.h" #endif +#if MICROPY_SSL_MBEDTLS +#include "mbedtls/sha1.h" +#endif + +#endif + + typedef struct _mp_obj_hash_t { mp_obj_base_t base; char state[0]; } mp_obj_hash_t; -STATIC mp_obj_t hash_update(mp_obj_t self_in, mp_obj_t arg); +#if MICROPY_PY_UHASHLIB_SHA256 +STATIC mp_obj_t uhashlib_sha256_update(mp_obj_t self_in, mp_obj_t arg); -STATIC mp_obj_t hash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(CRYAL_SHA256_CTX)); +#if MICROPY_SSL_MBEDTLS + +STATIC mp_obj_t uhashlib_sha256_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 1, false); + mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(mbedtls_sha256_context)); o->base.type = type; - sha256_init((CRYAL_SHA256_CTX*)o->state); + mbedtls_sha256_init((mbedtls_sha256_context*)&o->state); + mbedtls_sha256_starts((mbedtls_sha256_context*)&o->state, 0); if (n_args == 1) { - hash_update(MP_OBJ_FROM_PTR(o), args[0]); + uhashlib_sha256_update(MP_OBJ_FROM_PTR(o), args[0]); } return MP_OBJ_FROM_PTR(o); } -#if MICROPY_PY_UHASHLIB_SHA1 -STATIC mp_obj_t sha1_update(mp_obj_t self_in, mp_obj_t arg); +STATIC mp_obj_t uhashlib_sha256_update(mp_obj_t self_in, mp_obj_t arg) { + mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(arg, &bufinfo, MP_BUFFER_READ); + mbedtls_sha256_update((mbedtls_sha256_context*)&self->state, bufinfo.buf, bufinfo.len); + return mp_const_none; +} -STATIC mp_obj_t sha1_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(SHA1_CTX)); +STATIC mp_obj_t uhashlib_sha256_digest(mp_obj_t self_in) { + mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); + vstr_t vstr; + vstr_init_len(&vstr, 32); + mbedtls_sha256_finish((mbedtls_sha256_context*)&self->state, (unsigned char *)vstr.buf); + return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); +} + +#else + +static void check_not_unicode(const mp_obj_t arg) { +#if MICROPY_CPYTHON_COMPAT + if (MP_OBJ_IS_STR(arg)) { + mp_raise_TypeError(translate("a bytes-like object is required")); + } +#endif +} + +STATIC mp_obj_t uhashlib_sha256_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 1, false); + mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(CRYAL_SHA256_CTX)); o->base.type = type; - SHA1_Init((SHA1_CTX*)o->state); + sha256_init((CRYAL_SHA256_CTX*)o->state); if (n_args == 1) { - sha1_update(MP_OBJ_FROM_PTR(o), args[0]); + uhashlib_sha256_update(MP_OBJ_FROM_PTR(o), args[0]); } return MP_OBJ_FROM_PTR(o); } -#endif -STATIC mp_obj_t hash_update(mp_obj_t self_in, mp_obj_t arg) { +STATIC mp_obj_t uhashlib_sha256_update(mp_obj_t self_in, mp_obj_t arg) { + check_not_unicode(arg); mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); mp_buffer_info_t bufinfo; mp_get_buffer_raise(arg, &bufinfo, MP_BUFFER_READ); sha256_update((CRYAL_SHA256_CTX*)self->state, bufinfo.buf, bufinfo.len); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_2(hash_update_obj, hash_update); + +STATIC mp_obj_t uhashlib_sha256_digest(mp_obj_t self_in) { + mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); + vstr_t vstr; + vstr_init_len(&vstr, SHA256_BLOCK_SIZE); + sha256_final((CRYAL_SHA256_CTX*)self->state, (byte*)vstr.buf); + return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); +} +#endif + +STATIC MP_DEFINE_CONST_FUN_OBJ_2(uhashlib_sha256_update_obj, uhashlib_sha256_update); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(uhashlib_sha256_digest_obj, uhashlib_sha256_digest); + +STATIC const mp_rom_map_elem_t uhashlib_sha256_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&uhashlib_sha256_update_obj) }, + { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&uhashlib_sha256_digest_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(uhashlib_sha256_locals_dict, uhashlib_sha256_locals_dict_table); + +STATIC const mp_obj_type_t uhashlib_sha256_type = { + { &mp_type_type }, + .name = MP_QSTR_sha256, + .make_new = uhashlib_sha256_make_new, + .locals_dict = (void*)&uhashlib_sha256_locals_dict, +}; +#endif #if MICROPY_PY_UHASHLIB_SHA1 -STATIC mp_obj_t sha1_update(mp_obj_t self_in, mp_obj_t arg) { +STATIC mp_obj_t uhashlib_sha1_update(mp_obj_t self_in, mp_obj_t arg); + +#if MICROPY_SSL_AXTLS +STATIC mp_obj_t uhashlib_sha1_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 1, false); + mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(SHA1_CTX)); + o->base.type = type; + SHA1_Init((SHA1_CTX*)o->state); + if (n_args == 1) { + uhashlib_sha1_update(MP_OBJ_FROM_PTR(o), args[0]); + } + return MP_OBJ_FROM_PTR(o); +} + +STATIC mp_obj_t uhashlib_sha1_update(mp_obj_t self_in, mp_obj_t arg) { + check_not_unicode(arg); mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); mp_buffer_info_t bufinfo; mp_get_buffer_raise(arg, &bufinfo, MP_BUFFER_READ); SHA1_Update((SHA1_CTX*)self->state, bufinfo.buf, bufinfo.len); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_2(sha1_update_obj, sha1_update); -#endif -STATIC mp_obj_t hash_digest(mp_obj_t self_in) { +STATIC mp_obj_t uhashlib_sha1_digest(mp_obj_t self_in) { mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); vstr_t vstr; - vstr_init_len(&vstr, SHA256_BLOCK_SIZE); - sha256_final((CRYAL_SHA256_CTX*)self->state, (byte*)vstr.buf); + vstr_init_len(&vstr, SHA1_SIZE); + SHA1_Final((byte*)vstr.buf, (SHA1_CTX*)self->state); return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); } -MP_DEFINE_CONST_FUN_OBJ_1(hash_digest_obj, hash_digest); +#endif -#if MICROPY_PY_UHASHLIB_SHA1 -STATIC mp_obj_t sha1_digest(mp_obj_t self_in) { +#if MICROPY_SSL_MBEDTLS +STATIC mp_obj_t uhashlib_sha1_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { + mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_obj_hash_t *o = m_new_obj_var(mp_obj_hash_t, char, sizeof(mbedtls_sha1_context)); + o->base.type = type; + mbedtls_sha1_init((mbedtls_sha1_context*)o->state); + mbedtls_sha1_starts((mbedtls_sha1_context*)o->state); + if (n_args == 1) { + uhashlib_sha1_update(MP_OBJ_FROM_PTR(o), args[0]); + } + return MP_OBJ_FROM_PTR(o); +} + +STATIC mp_obj_t uhashlib_sha1_update(mp_obj_t self_in, mp_obj_t arg) { + mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(arg, &bufinfo, MP_BUFFER_READ); + mbedtls_sha1_update((mbedtls_sha1_context*)self->state, bufinfo.buf, bufinfo.len); + return mp_const_none; +} + +STATIC mp_obj_t uhashlib_sha1_digest(mp_obj_t self_in) { mp_obj_hash_t *self = MP_OBJ_TO_PTR(self_in); vstr_t vstr; - vstr_init_len(&vstr, SHA1_SIZE); - SHA1_Final((byte*)vstr.buf, (SHA1_CTX*)self->state); + vstr_init_len(&vstr, 20); + mbedtls_sha1_finish((mbedtls_sha1_context*)self->state, (byte*)vstr.buf); + mbedtls_sha1_free((mbedtls_sha1_context*)self->state); return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); } -MP_DEFINE_CONST_FUN_OBJ_1(sha1_digest_obj, sha1_digest); #endif -STATIC const mp_rom_map_elem_t hash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&hash_update_obj) }, - { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&hash_digest_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(hash_locals_dict, hash_locals_dict_table); +STATIC MP_DEFINE_CONST_FUN_OBJ_2(uhashlib_sha1_update_obj, uhashlib_sha1_update); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(uhashlib_sha1_digest_obj, uhashlib_sha1_digest); -STATIC const mp_obj_type_t sha256_type = { - { &mp_type_type }, - .name = MP_QSTR_sha256, - .make_new = hash_make_new, - .locals_dict = (void*)&hash_locals_dict, +STATIC const mp_rom_map_elem_t uhashlib_sha1_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&uhashlib_sha1_update_obj) }, + { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&uhashlib_sha1_digest_obj) }, }; +STATIC MP_DEFINE_CONST_DICT(uhashlib_sha1_locals_dict, uhashlib_sha1_locals_dict_table); -#if MICROPY_PY_UHASHLIB_SHA1 -STATIC const mp_rom_map_elem_t sha1_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&sha1_update_obj) }, - { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&sha1_digest_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(sha1_locals_dict, sha1_locals_dict_table); - -STATIC const mp_obj_type_t sha1_type = { +STATIC const mp_obj_type_t uhashlib_sha1_type = { { &mp_type_type }, .name = MP_QSTR_sha1, - .make_new = sha1_make_new, - .locals_dict = (void*)&sha1_locals_dict, + .make_new = uhashlib_sha1_make_new, + .locals_dict = (void*)&uhashlib_sha1_locals_dict, }; #endif -STATIC const mp_rom_map_elem_t mp_module_hashlib_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uhashlib) }, - { MP_ROM_QSTR(MP_QSTR_sha256), MP_ROM_PTR(&sha256_type) }, +STATIC const mp_rom_map_elem_t mp_module_uhashlib_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_hashlib) }, + #if MICROPY_PY_UHASHLIB_SHA256 + { MP_ROM_QSTR(MP_QSTR_sha256), MP_ROM_PTR(&uhashlib_sha256_type) }, + #endif #if MICROPY_PY_UHASHLIB_SHA1 - { MP_ROM_QSTR(MP_QSTR_sha1), MP_ROM_PTR(&sha1_type) }, + { MP_ROM_QSTR(MP_QSTR_sha1), MP_ROM_PTR(&uhashlib_sha1_type) }, #endif }; -STATIC MP_DEFINE_CONST_DICT(mp_module_hashlib_globals, mp_module_hashlib_globals_table); +STATIC MP_DEFINE_CONST_DICT(mp_module_uhashlib_globals, mp_module_uhashlib_globals_table); const mp_obj_module_t mp_module_uhashlib = { .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_hashlib_globals, + .globals = (mp_obj_dict_t*)&mp_module_uhashlib_globals, }; +#if MICROPY_PY_UHASHLIB_SHA256 #include "crypto-algorithms/sha256.c" +#endif #endif //MICROPY_PY_UHASHLIB diff --git a/extmod/moduheapq.c b/extmod/moduheapq.c index 71c15368bfe90..db17e8ca21e2f 100644 --- a/extmod/moduheapq.c +++ b/extmod/moduheapq.c @@ -27,13 +27,15 @@ #include "py/objlist.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UHEAPQ // the algorithm here is modelled on CPython's heapq.py STATIC mp_obj_list_t *get_heap(mp_obj_t heap_in) { if (!MP_OBJ_IS_TYPE(heap_in, &mp_type_list)) { - mp_raise_TypeError("heap must be a list"); + mp_raise_TypeError(translate("heap must be a list")); } return MP_OBJ_TO_PTR(heap_in); } @@ -81,7 +83,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_uheapq_heappush_obj, mod_uheapq_heappush); STATIC mp_obj_t mod_uheapq_heappop(mp_obj_t heap_in) { mp_obj_list_t *heap = get_heap(heap_in); if (heap->len == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, "empty heap")); + nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, translate("empty heap"))); } mp_obj_t item = heap->items[0]; heap->len -= 1; diff --git a/extmod/modujson.c b/extmod/modujson.c index f14682d26f8ce..6b24bf5781a84 100644 --- a/extmod/modujson.c +++ b/extmod/modujson.c @@ -32,8 +32,18 @@ #include "py/runtime.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UJSON +STATIC mp_obj_t mod_ujson_dump(mp_obj_t obj, mp_obj_t stream) { + mp_get_stream_raise(stream, MP_STREAM_OP_WRITE); + mp_print_t print = {MP_OBJ_TO_PTR(stream), mp_stream_write_adaptor}; + mp_obj_print_helper(&print, obj, PRINT_JSON); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_ujson_dump_obj, mod_ujson_dump); + STATIC mp_obj_t mod_ujson_dumps(mp_obj_t obj) { vstr_t vstr; mp_print_t print; @@ -166,7 +176,7 @@ STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) { goto fail; } S_NEXT(s); - next = mp_obj_new_str(vstr.buf, vstr.len, false); + next = mp_obj_new_str(vstr.buf, vstr.len); break; case '-': case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': { @@ -268,7 +278,7 @@ STATIC mp_obj_t mod_ujson_load(mp_obj_t stream_obj) { return stack_top; fail: - mp_raise_ValueError("syntax error in JSON"); + mp_raise_ValueError(translate("syntax error in JSON")); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ujson_load_obj, mod_ujson_load); @@ -282,7 +292,12 @@ STATIC mp_obj_t mod_ujson_loads(mp_obj_t obj) { STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_ujson_loads_obj, mod_ujson_loads); STATIC const mp_rom_map_elem_t mp_module_ujson_globals_table[] = { +#if CIRCUITPY + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_json) }, +#else { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ujson) }, +#endif + { MP_ROM_QSTR(MP_QSTR_dump), MP_ROM_PTR(&mod_ujson_dump_obj) }, { MP_ROM_QSTR(MP_QSTR_dumps), MP_ROM_PTR(&mod_ujson_dumps_obj) }, { MP_ROM_QSTR(MP_QSTR_load), MP_ROM_PTR(&mod_ujson_load_obj) }, { MP_ROM_QSTR(MP_QSTR_loads), MP_ROM_PTR(&mod_ujson_loads_obj) }, diff --git a/extmod/modure.c b/extmod/modure.c index 78de4706d27d9..125afef4d3b63 100644 --- a/extmod/modure.c +++ b/extmod/modure.c @@ -77,8 +77,83 @@ STATIC mp_obj_t match_group(mp_obj_t self_in, mp_obj_t no_in) { } MP_DEFINE_CONST_FUN_OBJ_2(match_group_obj, match_group); +#if MICROPY_PY_URE_MATCH_GROUPS + +STATIC mp_obj_t match_groups(mp_obj_t self_in) { + mp_obj_match_t *self = MP_OBJ_TO_PTR(self_in); + if (self->num_matches <= 1) { + return mp_const_empty_tuple; + } + mp_obj_tuple_t *groups = MP_OBJ_TO_PTR(mp_obj_new_tuple(self->num_matches - 1, NULL)); + for (int i = 1; i < self->num_matches; ++i) { + groups->items[i - 1] = match_group(self_in, MP_OBJ_NEW_SMALL_INT(i)); + } + return MP_OBJ_FROM_PTR(groups); +} +MP_DEFINE_CONST_FUN_OBJ_1(match_groups_obj, match_groups); + +#endif + +#if MICROPY_PY_URE_MATCH_SPAN_START_END + +STATIC void match_span_helper(size_t n_args, const mp_obj_t *args, mp_obj_t span[2]) { + mp_obj_match_t *self = MP_OBJ_TO_PTR(args[0]); + + mp_int_t no = 0; + if (n_args == 2) { + no = mp_obj_get_int(args[1]); + if (no < 0 || no >= self->num_matches) { + nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, args[1])); + } + } + + mp_int_t s = -1; + mp_int_t e = -1; + const char *start = self->caps[no * 2]; + if (start != NULL) { + // have a match for this group + const char *begin = mp_obj_str_get_str(self->str); + s = start - begin; + e = self->caps[no * 2 + 1] - begin; + } + + span[0] = mp_obj_new_int(s); + span[1] = mp_obj_new_int(e); +} + +STATIC mp_obj_t match_span(size_t n_args, const mp_obj_t *args) { + mp_obj_t span[2]; + match_span_helper(n_args, args, span); + return mp_obj_new_tuple(2, span); +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(match_span_obj, 1, 2, match_span); + +STATIC mp_obj_t match_start(size_t n_args, const mp_obj_t *args) { + mp_obj_t span[2]; + match_span_helper(n_args, args, span); + return span[0]; +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(match_start_obj, 1, 2, match_start); + +STATIC mp_obj_t match_end(size_t n_args, const mp_obj_t *args) { + mp_obj_t span[2]; + match_span_helper(n_args, args, span); + return span[1]; +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(match_end_obj, 1, 2, match_end); + +#endif + STATIC const mp_rom_map_elem_t match_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_group), MP_ROM_PTR(&match_group_obj) }, + #if MICROPY_PY_URE_MATCH_GROUPS + { MP_ROM_QSTR(MP_QSTR_groups), MP_ROM_PTR(&match_groups_obj) }, + #endif + #if MICROPY_PY_URE_MATCH_SPAN_START_END + { MP_ROM_QSTR(MP_QSTR_span), MP_ROM_PTR(&match_span_obj) }, + { MP_ROM_QSTR(MP_QSTR_start), MP_ROM_PTR(&match_start_obj) }, + { MP_ROM_QSTR(MP_QSTR_end), MP_ROM_PTR(&match_end_obj) }, + #endif }; STATIC MP_DEFINE_CONST_DICT(match_locals_dict, match_locals_dict_table); @@ -103,6 +178,35 @@ STATIC mp_obj_t ure_exec(bool is_anchored, uint n_args, const mp_obj_t *args) { size_t len; subj.begin = mp_obj_str_get_data(args[1], &len); subj.end = subj.begin + len; +#if MICROPY_PY_URE_MATCH_SPAN_START_END + if (n_args > 2) { + const mp_obj_type_t *self_type = mp_obj_get_type(args[1]); + mp_int_t str_len = MP_OBJ_SMALL_INT_VALUE(mp_obj_len_maybe(args[1])); + const byte *begin = (const byte *)subj.begin; + + int pos = mp_obj_get_int(args[2]); + if (pos >= str_len) { + return mp_const_none; + } + if (pos < 0) { + pos = 0; + } + const byte *pos_ptr = str_index_to_ptr(self_type, begin, len, MP_OBJ_NEW_SMALL_INT(pos), true); + + const byte *endpos_ptr = (const byte *)subj.end; + if (n_args > 3) { + int endpos = mp_obj_get_int(args[3]); + if (endpos <= pos) { + return mp_const_none; + } + // Will cap to length + endpos_ptr = str_index_to_ptr(self_type, begin, len, args[3], true); + } + + subj.begin = (const char *)pos_ptr; + subj.end = (const char *)endpos_ptr; + } +#endif int caps_num = (self->re.sub + 1) * 2; mp_obj_match_t *match = m_new_obj_var(mp_obj_match_t, char*, caps_num); // cast is a workaround for a bug in msvc: it treats const char** as a const pointer instead of a pointer to pointer to const char @@ -144,7 +248,7 @@ STATIC mp_obj_t re_split(size_t n_args, const mp_obj_t *args) { } mp_obj_t retval = mp_obj_new_list(0, NULL); - const char **caps = alloca(caps_num * sizeof(char*)); + const char **caps = mp_local_alloc(caps_num * sizeof(char*)); while (true) { // cast is a workaround for a bug in msvc: it treats const char** as a const pointer instead of a pointer to pointer to const char memset((char**)caps, 0, caps_num * sizeof(char*)); @@ -158,13 +262,15 @@ STATIC mp_obj_t re_split(size_t n_args, const mp_obj_t *args) { mp_obj_t s = mp_obj_new_str_of_type(str_type, (const byte*)subj.begin, caps[0] - subj.begin); mp_obj_list_append(retval, s); if (self->re.sub > 0) { - mp_raise_NotImplementedError("Splitting with sub-captures"); + mp_raise_NotImplementedError(translate("Splitting with sub-captures")); } subj.begin = caps[1]; if (maxsplit > 0 && --maxsplit == 0) { break; } } + // cast is a workaround for a bug in msvc (see above) + mp_local_free((char**)caps); mp_obj_t s = mp_obj_new_str_of_type(str_type, (const byte*)subj.begin, subj.end - subj.begin); mp_obj_list_append(retval, s); @@ -172,17 +278,138 @@ STATIC mp_obj_t re_split(size_t n_args, const mp_obj_t *args) { } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(re_split_obj, 2, 3, re_split); +#if MICROPY_PY_URE_SUB + +STATIC mp_obj_t re_sub_helper(mp_obj_t self_in, size_t n_args, const mp_obj_t *args) { + mp_obj_re_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_t replace = args[1]; + mp_obj_t where = args[2]; + mp_int_t count = 0; + if (n_args > 3) { + count = mp_obj_get_int(args[3]); + // Note: flags are currently ignored + } + + size_t where_len; + const char *where_str = mp_obj_str_get_data(where, &where_len); + Subject subj; + subj.begin = where_str; + subj.end = subj.begin + where_len; + int caps_num = (self->re.sub + 1) * 2; + + vstr_t vstr_return; + vstr_return.buf = NULL; // We'll init the vstr after the first match + mp_obj_match_t *match = mp_local_alloc(sizeof(mp_obj_match_t) + caps_num * sizeof(char*)); + match->base.type = &match_type; + match->num_matches = caps_num / 2; // caps_num counts start and end pointers + match->str = where; + + for (;;) { + // cast is a workaround for a bug in msvc: it treats const char** as a const pointer instead of a pointer to pointer to const char + memset((char*)match->caps, 0, caps_num * sizeof(char*)); + int res = re1_5_recursiveloopprog(&self->re, &subj, match->caps, caps_num, false); + + // If we didn't have a match, or had an empty match, it's time to stop + if (!res || match->caps[0] == match->caps[1]) { + break; + } + + // Initialise the vstr if it's not already + if (vstr_return.buf == NULL) { + vstr_init(&vstr_return, match->caps[0] - subj.begin); + } + + // Add pre-match string + vstr_add_strn(&vstr_return, subj.begin, match->caps[0] - subj.begin); + + // Get replacement string + const char* repl = mp_obj_str_get_str((mp_obj_is_callable(replace) ? mp_call_function_1(replace, MP_OBJ_FROM_PTR(match)) : replace)); + + // Append replacement string to result, substituting any regex groups + while (*repl != '\0') { + if (*repl == '\\') { + ++repl; + bool is_g_format = false; + if (*repl == 'g' && repl[1] == '<') { + // Group specified with syntax "\g" + repl += 2; + is_g_format = true; + } + + if ('0' <= *repl && *repl <= '9') { + // Group specified with syntax "\g" or "\number" + unsigned int match_no = 0; + do { + match_no = match_no * 10 + (*repl++ - '0'); + } while ('0' <= *repl && *repl <= '9'); + if (is_g_format && *repl == '>') { + ++repl; + } + + if (match_no >= (unsigned int)match->num_matches) { + nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, MP_OBJ_NEW_SMALL_INT(match_no))); + } + + const char *start_match = match->caps[match_no * 2]; + if (start_match != NULL) { + // Add the substring matched by group + const char *end_match = match->caps[match_no * 2 + 1]; + vstr_add_strn(&vstr_return, start_match, end_match - start_match); + } + } + } else { + // Just add the current byte from the replacement string + vstr_add_byte(&vstr_return, *repl++); + } + } + + // Move start pointer to end of last match + subj.begin = match->caps[1]; + + // Stop substitutions if count was given and gets to 0 + if (count > 0 && --count == 0) { + break; + } + } + + mp_local_free(match); + + if (vstr_return.buf == NULL) { + // Optimisation for case of no substitutions + return where; + } + + // Add post-match string + vstr_add_strn(&vstr_return, subj.begin, subj.end - subj.begin); + + return mp_obj_new_str_from_vstr(mp_obj_get_type(where), &vstr_return); +} + +STATIC mp_obj_t re_sub(size_t n_args, const mp_obj_t *args) { + return re_sub_helper(args[0], n_args, args); +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(re_sub_obj, 3, 5, re_sub); + +#endif + STATIC const mp_rom_map_elem_t re_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_match), MP_ROM_PTR(&re_match_obj) }, { MP_ROM_QSTR(MP_QSTR_search), MP_ROM_PTR(&re_search_obj) }, { MP_ROM_QSTR(MP_QSTR_split), MP_ROM_PTR(&re_split_obj) }, + #if MICROPY_PY_URE_SUB + { MP_ROM_QSTR(MP_QSTR_sub), MP_ROM_PTR(&re_sub_obj) }, + #endif }; STATIC MP_DEFINE_CONST_DICT(re_locals_dict, re_locals_dict_table); STATIC const mp_obj_type_t re_type = { { &mp_type_type }, +#if CIRCUITPY + .name = MP_QSTR_re, +#else .name = MP_QSTR_ure, +#endif .print = re_print, .locals_dict = (void*)&re_locals_dict, }; @@ -202,7 +429,7 @@ STATIC mp_obj_t mod_re_compile(size_t n_args, const mp_obj_t *args) { int error = re1_5_compilecode(&o->re, re_str); if (error != 0) { error: - mp_raise_ValueError("Error in regex"); + mp_raise_ValueError(translate("Error in regex")); } if (flags & FLAG_DEBUG) { re1_5_dumpcode(&o->re); @@ -230,11 +457,26 @@ STATIC mp_obj_t mod_re_search(size_t n_args, const mp_obj_t *args) { } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_re_search_obj, 2, 4, mod_re_search); +#if MICROPY_PY_URE_SUB +STATIC mp_obj_t mod_re_sub(size_t n_args, const mp_obj_t *args) { + mp_obj_t self = mod_re_compile(1, args); + return re_sub_helper(self, n_args, args); +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_re_sub_obj, 3, 5, mod_re_sub); +#endif + STATIC const mp_rom_map_elem_t mp_module_re_globals_table[] = { +#if CIRCUITPY + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_re) }, +#else { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ure) }, +#endif { MP_ROM_QSTR(MP_QSTR_compile), MP_ROM_PTR(&mod_re_compile_obj) }, { MP_ROM_QSTR(MP_QSTR_match), MP_ROM_PTR(&mod_re_match_obj) }, { MP_ROM_QSTR(MP_QSTR_search), MP_ROM_PTR(&mod_re_search_obj) }, + #if MICROPY_PY_URE_SUB + { MP_ROM_QSTR(MP_QSTR_sub), MP_ROM_PTR(&mod_re_sub_obj) }, + #endif { MP_ROM_QSTR(MP_QSTR_DEBUG), MP_ROM_INT(FLAG_DEBUG) }, }; diff --git a/extmod/modussl_axtls.c b/extmod/modussl_axtls.c index 3ad65ebf32126..032dea09fd488 100644 --- a/extmod/modussl_axtls.c +++ b/extmod/modussl_axtls.c @@ -30,6 +30,8 @@ #include "py/runtime.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_USSL && MICROPY_SSL_AXTLS #include "ssl.h" @@ -44,6 +46,8 @@ typedef struct _mp_obj_ssl_socket_t { } mp_obj_ssl_socket_t; struct ssl_args { + mp_arg_val_t key; + mp_arg_val_t cert; mp_arg_val_t server_side; mp_arg_val_t server_hostname; }; @@ -62,10 +66,28 @@ STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { o->sock = sock; uint32_t options = SSL_SERVER_VERIFY_LATER; + if (args->key.u_obj != mp_const_none) { + options |= SSL_NO_DEFAULT_KEY; + } if ((o->ssl_ctx = ssl_ctx_new(options, SSL_DEFAULT_CLNT_SESS)) == NULL) { mp_raise_OSError(MP_EINVAL); } + if (args->key.u_obj != mp_const_none) { + size_t len; + const byte *data = (const byte*)mp_obj_str_get_data(args->key.u_obj, &len); + int res = ssl_obj_memory_load(o->ssl_ctx, SSL_OBJ_RSA_KEY, data, len, NULL); + if (res != SSL_OK) { + mp_raise_ValueError(translate("invalid key")); + } + + data = (const byte*)mp_obj_str_get_data(args->cert.u_obj, &len); + res = ssl_obj_memory_load(o->ssl_ctx, SSL_OBJ_X509_CERT, data, len, NULL); + if (res != SSL_OK) { + mp_raise_ValueError(translate("invalid cert")); + } + } + if (args->server_side.u_bool) { o->ssl_sock = ssl_server_new(o->ssl_ctx, (long)sock); } else { @@ -113,7 +135,7 @@ STATIC mp_uint_t socket_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *errc mp_int_t r = ssl_read(o->ssl_sock, &o->buf); if (r == SSL_OK) { // SSL_OK from ssl_read() means "everything is ok, but there's - // not user data yet. So, we just keep reading. + // no user data yet". So, we just keep reading. continue; } if (r < 0) { @@ -121,6 +143,9 @@ STATIC mp_uint_t socket_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *errc // EOF return 0; } + if (r == SSL_EAGAIN) { + r = MP_EAGAIN; + } *errcode = r; return MP_STREAM_ERROR; } @@ -152,6 +177,25 @@ STATIC mp_uint_t socket_write(mp_obj_t o_in, const void *buf, mp_uint_t size, in return r; } +STATIC mp_uint_t socket_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_ssl_socket_t *self = MP_OBJ_TO_PTR(o_in); + (void)arg; + switch (request) { + case MP_STREAM_CLOSE: + if (self->ssl_sock != NULL) { + ssl_free(self->ssl_sock); + ssl_ctx_free(self->ssl_ctx); + self->ssl_sock = NULL; + mp_stream_close(self->sock); + } + return 0; + + default: + *errcode = MP_EINVAL; + return MP_STREAM_ERROR; + } +} + STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t flag_in) { // Currently supports only blocking mode (void)self_in; @@ -162,36 +206,25 @@ STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t flag_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - mp_obj_ssl_socket_t *self = MP_OBJ_TO_PTR(self_in); - if (self->ssl_sock != NULL) { - ssl_free(self->ssl_sock); - ssl_ctx_free(self->ssl_ctx); - self->ssl_sock = NULL; - return mp_stream_close(self->sock); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); - STATIC const mp_rom_map_elem_t ussl_socket_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, #if MICROPY_PY_USSL_FINALISER - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, #endif }; STATIC MP_DEFINE_CONST_DICT(ussl_socket_locals_dict, ussl_socket_locals_dict_table); STATIC const mp_stream_p_t ussl_socket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = socket_read, .write = socket_write, + .ioctl = socket_ioctl, }; STATIC const mp_obj_type_t ussl_socket_type = { @@ -208,6 +241,8 @@ STATIC const mp_obj_type_t ussl_socket_type = { STATIC mp_obj_t mod_ssl_wrap_socket(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { // TODO: Implement more args static const mp_arg_t allowed_args[] = { + { MP_QSTR_key, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_cert, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_server_side, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, { MP_QSTR_server_hostname, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, }; diff --git a/extmod/modussl_mbedtls.c b/extmod/modussl_mbedtls.c index 69a64d2f7aced..9abdeb966eb00 100644 --- a/extmod/modussl_mbedtls.c +++ b/extmod/modussl_mbedtls.c @@ -73,19 +73,10 @@ STATIC void mbedtls_debug(void *ctx, int level, const char *file, int line, cons } #endif -// TODO: FIXME! -STATIC int null_entropy_func(void *data, unsigned char *output, size_t len) { - (void)data; - (void)output; - (void)len; - // enjoy random bytes - return 0; -} - STATIC int _mbedtls_ssl_send(void *ctx, const byte *buf, size_t len) { mp_obj_t sock = *(mp_obj_t*)ctx; - const mp_stream_p_t *sock_stream = mp_get_stream_raise(sock, MP_STREAM_OP_WRITE); + const mp_stream_p_t *sock_stream = mp_get_stream(sock); int err; mp_uint_t out_sz = sock_stream->write(sock, buf, len, &err); @@ -102,7 +93,7 @@ STATIC int _mbedtls_ssl_send(void *ctx, const byte *buf, size_t len) { STATIC int _mbedtls_ssl_recv(void *ctx, byte *buf, size_t len) { mp_obj_t sock = *(mp_obj_t*)ctx; - const mp_stream_p_t *sock_stream = mp_get_stream_raise(sock, MP_STREAM_OP_READ); + const mp_stream_p_t *sock_stream = mp_get_stream(sock); int err; mp_uint_t out_sz = sock_stream->read(sock, buf, len, &err); @@ -118,12 +109,16 @@ STATIC int _mbedtls_ssl_recv(void *ctx, byte *buf, size_t len) { STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { + // Verify the socket object has the full stream protocol + mp_get_stream_raise(sock, MP_STREAM_OP_READ | MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); + #if MICROPY_PY_USSL_FINALISER mp_obj_ssl_socket_t *o = m_new_obj_with_finaliser(mp_obj_ssl_socket_t); #else mp_obj_ssl_socket_t *o = m_new_obj(mp_obj_ssl_socket_t); #endif o->base.type = &ussl_socket_type; + o->sock = sock; int ret; mbedtls_ssl_init(&o->ssl); @@ -139,10 +134,9 @@ STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { mbedtls_entropy_init(&o->entropy); const byte seed[] = "upy"; - ret = mbedtls_ctr_drbg_seed(&o->ctr_drbg, null_entropy_func/*mbedtls_entropy_func*/, &o->entropy, seed, sizeof(seed)); + ret = mbedtls_ctr_drbg_seed(&o->ctr_drbg, mbedtls_entropy_func, &o->entropy, seed, sizeof(seed)); if (ret != 0) { - printf("ret=%d\n", ret); - assert(0); + goto cleanup; } ret = mbedtls_ssl_config_defaults(&o->conf, @@ -150,7 +144,7 @@ STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { MBEDTLS_SSL_TRANSPORT_STREAM, MBEDTLS_SSL_PRESET_DEFAULT); if (ret != 0) { - assert(0); + goto cleanup; } mbedtls_ssl_conf_authmode(&o->conf, MBEDTLS_SSL_VERIFY_NONE); @@ -161,18 +155,17 @@ STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { ret = mbedtls_ssl_setup(&o->ssl, &o->conf); if (ret != 0) { - assert(0); + goto cleanup; } if (args->server_hostname.u_obj != mp_const_none) { const char *sni = mp_obj_str_get_str(args->server_hostname.u_obj); ret = mbedtls_ssl_set_hostname(&o->ssl, sni); if (ret != 0) { - assert(0); + goto cleanup; } } - o->sock = sock; mbedtls_ssl_set_bio(&o->ssl, &o->sock, _mbedtls_ssl_send, _mbedtls_ssl_recv, NULL); if (args->key.u_obj != MP_OBJ_NULL) { @@ -194,13 +187,27 @@ STATIC mp_obj_ssl_socket_t *socket_new(mp_obj_t sock, struct ssl_args *args) { while ((ret = mbedtls_ssl_handshake(&o->ssl)) != 0) { if (ret != MBEDTLS_ERR_SSL_WANT_READ && ret != MBEDTLS_ERR_SSL_WANT_WRITE) { - //assert(0); printf("mbedtls_ssl_handshake error: -%x\n", -ret); - mp_raise_OSError(MP_EIO); + goto cleanup; } } return o; + +cleanup: + mbedtls_pk_free(&o->pkey); + mbedtls_x509_crt_free(&o->cert); + mbedtls_x509_crt_free(&o->cacert); + mbedtls_ssl_free(&o->ssl); + mbedtls_ssl_config_free(&o->conf); + mbedtls_ctr_drbg_free(&o->ctr_drbg); + mbedtls_entropy_free(&o->entropy); + + if (ret == MBEDTLS_ERR_SSL_ALLOC_FAILED) { + mp_raise_OSError(MP_ENOMEM); + } else { + mp_raise_OSError(MP_EIO); + } } STATIC mp_obj_t mod_ssl_getpeercert(mp_obj_t o_in, mp_obj_t binary_form) { @@ -261,20 +268,26 @@ STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t flag_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - mp_obj_ssl_socket_t *self = MP_OBJ_TO_PTR(self_in); - - mbedtls_pk_free(&self->pkey); - mbedtls_x509_crt_free(&self->cert); - mbedtls_x509_crt_free(&self->cacert); - mbedtls_ssl_free(&self->ssl); - mbedtls_ssl_config_free(&self->conf); - mbedtls_ctr_drbg_free(&self->ctr_drbg); - mbedtls_entropy_free(&self->entropy); - - return mp_stream_close(self->sock); +STATIC mp_uint_t socket_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_ssl_socket_t *self = MP_OBJ_TO_PTR(o_in); + (void)arg; + switch (request) { + case MP_STREAM_CLOSE: + mbedtls_pk_free(&self->pkey); + mbedtls_x509_crt_free(&self->cert); + mbedtls_x509_crt_free(&self->cacert); + mbedtls_ssl_free(&self->ssl); + mbedtls_ssl_config_free(&self->conf); + mbedtls_ctr_drbg_free(&self->ctr_drbg); + mbedtls_entropy_free(&self->entropy); + mp_stream_close(self->sock); + return 0; + + default: + *errcode = MP_EINVAL; + return MP_STREAM_ERROR; + } } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); STATIC const mp_rom_map_elem_t ussl_socket_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, @@ -282,9 +295,9 @@ STATIC const mp_rom_map_elem_t ussl_socket_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, #if MICROPY_PY_USSL_FINALISER - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, #endif { MP_ROM_QSTR(MP_QSTR_getpeercert), MP_ROM_PTR(&mod_ssl_getpeercert_obj) }, }; @@ -292,8 +305,10 @@ STATIC const mp_rom_map_elem_t ussl_socket_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(ussl_socket_locals_dict, ussl_socket_locals_dict_table); STATIC const mp_stream_p_t ussl_socket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = socket_read, .write = socket_write, + .ioctl = socket_ioctl, }; STATIC const mp_obj_type_t ussl_socket_type = { diff --git a/extmod/modutimeq.c b/extmod/modutimeq.c index 28bbcc521d01c..99b51016d82d9 100644 --- a/extmod/modutimeq.c +++ b/extmod/modutimeq.c @@ -31,6 +31,8 @@ #include "py/runtime.h" #include "py/smallint.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UTIMEQ #define MODULO MICROPY_PY_UTIME_TICKS_PERIOD @@ -74,8 +76,8 @@ STATIC bool time_less_than(struct qentry *item, struct qentry *parent) { return res && res < (MODULO / 2); } -STATIC mp_obj_t utimeq_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); +STATIC mp_obj_t utimeq_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); mp_uint_t alloc = mp_obj_get_int(args[0]); mp_obj_utimeq_t *o = m_new_obj_var(mp_obj_utimeq_t, struct qentry, alloc); o->base.type = type; @@ -126,7 +128,7 @@ STATIC mp_obj_t mod_utimeq_heappush(size_t n_args, const mp_obj_t *args) { mp_obj_t heap_in = args[0]; mp_obj_utimeq_t *heap = get_heap(heap_in); if (heap->len == heap->alloc) { - mp_raise_IndexError("queue overflow"); + mp_raise_IndexError(translate("queue overflow")); } mp_uint_t l = heap->len; heap->items[l].time = MP_OBJ_SMALL_INT_VALUE(args[1]); @@ -142,7 +144,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_utimeq_heappush_obj, 4, 4, mod_ut STATIC mp_obj_t mod_utimeq_heappop(mp_obj_t heap_in, mp_obj_t list_ref) { mp_obj_utimeq_t *heap = get_heap(heap_in); if (heap->len == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, "empty heap")); + mp_raise_IndexError(translate("empty heap")); } mp_obj_list_t *ret = MP_OBJ_TO_PTR(list_ref); if (!MP_OBJ_IS_TYPE(list_ref, &mp_type_list) || ret->len < 3) { @@ -167,7 +169,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_utimeq_heappop_obj, mod_utimeq_heappop); STATIC mp_obj_t mod_utimeq_peektime(mp_obj_t heap_in) { mp_obj_utimeq_t *heap = get_heap(heap_in); if (heap->len == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_IndexError, "empty heap")); + mp_raise_IndexError(translate("empty heap")); } struct qentry *item = &heap->items[0]; diff --git a/extmod/moduzlib.c b/extmod/moduzlib.c index e9af07370ed88..3a081bc452808 100644 --- a/extmod/moduzlib.c +++ b/extmod/moduzlib.c @@ -31,9 +31,12 @@ #include "py/stream.h" #include "py/mperrno.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_UZLIB -#include "uzlib/tinf.h" +#define UZLIB_CONF_PARANOID_CHECKS (1) +#include "../../lib/uzlib/src/tinf.h" #if 0 // print debugging info #define DEBUG_printf DEBUG_printf @@ -48,12 +51,12 @@ typedef struct _mp_obj_decompio_t { bool eof; } mp_obj_decompio_t; -STATIC unsigned char read_src_stream(TINF_DATA *data) { +STATIC int read_src_stream(TINF_DATA *data) { byte *p = (void*)data; p -= offsetof(mp_obj_decompio_t, decomp); mp_obj_decompio_t *self = (mp_obj_decompio_t*)p; - const mp_stream_p_t *stream = mp_get_stream_raise(self->src_stream, MP_STREAM_OP_READ); + const mp_stream_p_t *stream = mp_get_stream(self->src_stream); int err; byte c; mp_uint_t out_sz = stream->read(self->src_stream, &c, 1, &err); @@ -66,8 +69,9 @@ STATIC unsigned char read_src_stream(TINF_DATA *data) { return c; } -STATIC mp_obj_t decompio_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 2, false); +STATIC mp_obj_t decompio_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 2, false); + mp_get_stream_raise(args[0], MP_STREAM_OP_READ); mp_obj_decompio_t *o = m_new_obj(mp_obj_decompio_t); o->base.type = type; memset(&o->decomp, 0, sizeof(o->decomp)); @@ -91,7 +95,7 @@ STATIC mp_obj_t decompio_make_new(const mp_obj_type_t *type, size_t n_args, size dict_opt = uzlib_zlib_parse_header(&o->decomp); if (dict_opt < 0) { header_error: - mp_raise_ValueError("compression header"); + mp_raise_ValueError(translate("compression header")); } dict_sz = 1 << dict_opt; } else { @@ -109,7 +113,7 @@ STATIC mp_uint_t decompio_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *er } o->decomp.dest = buf; - o->decomp.destSize = size; + o->decomp.dest_limit = (unsigned char*)buf+size; int st = uzlib_uncompress_chksum(&o->decomp); if (st == TINF_DONE) { o->eof = true; @@ -130,6 +134,7 @@ STATIC const mp_rom_map_elem_t decompio_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(decompio_locals_dict, decompio_locals_dict_table); STATIC const mp_stream_p_t decompio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = decompio_read, }; @@ -154,10 +159,10 @@ STATIC mp_obj_t mod_uzlib_decompress(size_t n_args, const mp_obj_t *args) { byte *dest_buf = m_new(byte, dest_buf_size); decomp->dest = dest_buf; - decomp->destSize = dest_buf_size; + decomp->dest_limit = dest_buf+dest_buf_size; DEBUG_printf("uzlib: Initial out buffer: " UINT_FMT " bytes\n", decomp->destSize); decomp->source = bufinfo.buf; - + decomp->source_limit = (unsigned char *)bufinfo.buf + bufinfo.len; int st; bool is_zlib = true; @@ -184,7 +189,7 @@ STATIC mp_obj_t mod_uzlib_decompress(size_t n_args, const mp_obj_t *args) { dest_buf = m_renew(byte, dest_buf, dest_buf_size, dest_buf_size + 256); dest_buf_size += 256; decomp->dest = dest_buf + offset; - decomp->destSize = 256; + decomp->dest_limit = dest_buf + offset + 256; } mp_uint_t final_sz = decomp->dest - dest_buf; @@ -215,10 +220,11 @@ const mp_obj_module_t mp_module_uzlib = { // Source files #include'd here to make sure they're compiled in // only if module is enabled by config setting. -#include "uzlib/tinflate.c" -#include "uzlib/tinfzlib.c" -#include "uzlib/tinfgzip.c" -#include "uzlib/adler32.c" -#include "uzlib/crc32.c" +#pragma GCC diagnostic ignored "-Wsign-compare" +#include "../../lib/uzlib/src/tinflate.c" +#include "../../lib/uzlib/src/tinfzlib.c" +#include "../../lib/uzlib/src/tinfgzip.c" +#include "../../lib/uzlib/src/adler32.c" +#include "../../lib/uzlib/src/crc32.c" #endif // MICROPY_PY_UZLIB diff --git a/extmod/modwebrepl.c b/extmod/modwebrepl.c index 38b88821b2d50..fb4d97358df40 100644 --- a/extmod/modwebrepl.c +++ b/extmod/modwebrepl.c @@ -37,7 +37,7 @@ #include "extmod/modwebsocket.h" #include "genhdr/mpversion.h" -#ifdef MICROPY_PY_WEBREPL +#if MICROPY_PY_WEBREPL #if 0 // print debugging info #define DEBUG_printf DEBUG_printf @@ -76,7 +76,7 @@ STATIC char denied_prompt[] = "\r\nAccess denied\r\n"; STATIC char webrepl_passwd[10]; STATIC void write_webrepl(mp_obj_t websock, const void *buf, size_t len) { - const mp_stream_p_t *sock_stream = mp_get_stream_raise(websock, MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); + const mp_stream_p_t *sock_stream = mp_get_stream(websock); int err; int old_opts = sock_stream->ioctl(websock, MP_STREAM_SET_DATA_OPTS, FRAME_BIN, &err); sock_stream->write(websock, buf, len, &err); @@ -86,7 +86,7 @@ STATIC void write_webrepl(mp_obj_t websock, const void *buf, size_t len) { #define SSTR(s) s, sizeof(s) - 1 STATIC void write_webrepl_str(mp_obj_t websock, const char *str, int sz) { int err; - const mp_stream_p_t *sock_stream = mp_get_stream_raise(websock, MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); + const mp_stream_p_t *sock_stream = mp_get_stream(websock); sock_stream->write(websock, str, sz, &err); } @@ -110,8 +110,7 @@ STATIC mp_obj_t webrepl_make_new(const mp_obj_type_t *type, size_t n_args, size_ } STATIC int write_file_chunk(mp_obj_webrepl_t *self) { - const mp_stream_p_t *file_stream = - mp_get_stream_raise(self->cur_file, MP_STREAM_OP_READ | MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); + const mp_stream_p_t *file_stream = mp_get_stream(self->cur_file); byte readbuf[2 + 256]; int err; mp_uint_t out_sz = file_stream->read(self->cur_file, readbuf + 2, sizeof(readbuf) - 2, &err); @@ -141,7 +140,7 @@ STATIC void handle_op(mp_obj_webrepl_t *self) { // Handle operations requiring opened file mp_obj_t open_args[2] = { - mp_obj_new_str(self->hdr.fname, strlen(self->hdr.fname), false), + mp_obj_new_str(self->hdr.fname, strlen(self->hdr.fname)), MP_OBJ_NEW_QSTR(MP_QSTR_rb) }; @@ -181,7 +180,7 @@ STATIC mp_uint_t _webrepl_read(mp_obj_t self_in, void *buf, mp_uint_t size, int // We know that os.dupterm always calls with size = 1 assert(size == 1); mp_obj_webrepl_t *self = self_in; - const mp_stream_p_t *sock_stream = mp_get_stream_raise(self->sock, MP_STREAM_OP_READ); + const mp_stream_p_t *sock_stream = mp_get_stream(self->sock); mp_uint_t out_sz = sock_stream->read(self->sock, buf, size, errcode); //DEBUG_printf("webrepl: Read %d initial bytes from websocket\n", out_sz); if (out_sz == 0 || out_sz == MP_STREAM_ERROR) { @@ -293,16 +292,24 @@ STATIC mp_uint_t webrepl_write(mp_obj_t self_in, const void *buf, mp_uint_t size // Don't forward output until passwd is entered return size; } - const mp_stream_p_t *stream_p = mp_get_stream_raise(self->sock, MP_STREAM_OP_WRITE); + const mp_stream_p_t *stream_p = mp_get_stream(self->sock); return stream_p->write(self->sock, buf, size, errcode); } -STATIC mp_obj_t webrepl_close(mp_obj_t self_in) { - mp_obj_webrepl_t *self = MP_OBJ_TO_PTR(self_in); - // TODO: This is a place to do cleanup - return mp_stream_close(self->sock); +STATIC mp_uint_t webrepl_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_webrepl_t *self = MP_OBJ_TO_PTR(o_in); + (void)arg; + switch (request) { + case MP_STREAM_CLOSE: + // TODO: This is a place to do cleanup + mp_stream_close(self->sock); + return 0; + + default: + *errcode = MP_EINVAL; + return MP_STREAM_ERROR; + } } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(webrepl_close_obj, webrepl_close); STATIC mp_obj_t webrepl_set_password(mp_obj_t passwd_in) { size_t len; @@ -319,13 +326,15 @@ STATIC const mp_rom_map_elem_t webrepl_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&webrepl_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, }; STATIC MP_DEFINE_CONST_DICT(webrepl_locals_dict, webrepl_locals_dict_table); STATIC const mp_stream_p_t webrepl_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = webrepl_read, .write = webrepl_write, + .ioctl = webrepl_ioctl, }; STATIC const mp_obj_type_t webrepl_type = { diff --git a/extmod/modwebsocket.c b/extmod/modwebsocket.c index a651164b2fe3d..496e4b5bb3c96 100644 --- a/extmod/modwebsocket.c +++ b/extmod/modwebsocket.c @@ -57,8 +57,9 @@ typedef struct _mp_obj_websocket_t { STATIC mp_uint_t websocket_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode); -STATIC mp_obj_t websocket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 2, false); +STATIC mp_obj_t websocket_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 2, false); + mp_get_stream_raise(args[0], MP_STREAM_OP_READ | MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); mp_obj_websocket_t *o = m_new_obj(mp_obj_websocket_t); o->base.type = type; o->sock = args[0]; @@ -75,7 +76,7 @@ STATIC mp_obj_t websocket_make_new(const mp_obj_type_t *type, size_t n_args, siz STATIC mp_uint_t websocket_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { mp_obj_websocket_t *self = MP_OBJ_TO_PTR(self_in); - const mp_stream_p_t *stream_p = mp_get_stream_raise(self->sock, MP_STREAM_OP_READ); + const mp_stream_p_t *stream_p = mp_get_stream(self->sock); while (1) { if (self->to_recv != 0) { mp_uint_t out_sz = stream_p->read(self->sock, self->buf + self->buf_pos, self->to_recv, errcode); @@ -256,6 +257,11 @@ STATIC mp_uint_t websocket_write(mp_obj_t self_in, const void *buf, mp_uint_t si STATIC mp_uint_t websocket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { mp_obj_websocket_t *self = MP_OBJ_TO_PTR(self_in); switch (request) { + case MP_STREAM_CLOSE: + // TODO: Send close signaling to the other side, otherwise it's + // abrupt close (connection abort). + mp_stream_close(self->sock); + return 0; case MP_STREAM_GET_DATA_OPTS: return self->ws_flags & FRAME_OPCODE_MASK; case MP_STREAM_SET_DATA_OPTS: { @@ -269,25 +275,18 @@ STATIC mp_uint_t websocket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t } } -STATIC mp_obj_t websocket_close(mp_obj_t self_in) { - mp_obj_websocket_t *self = MP_OBJ_TO_PTR(self_in); - // TODO: Send close signaling to the other side, otherwise it's - // abrupt close (connection abort). - return mp_stream_close(self->sock); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(websocket_close_obj, websocket_close); - STATIC const mp_rom_map_elem_t websocket_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&mp_stream_ioctl_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&websocket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, }; STATIC MP_DEFINE_CONST_DICT(websocket_locals_dict, websocket_locals_dict_table); STATIC const mp_stream_p_t websocket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = websocket_read, .write = websocket_write, .ioctl = websocket_ioctl, diff --git a/extmod/re1.5/compilecode.c b/extmod/re1.5/compilecode.c index 3267a4190d1db..01d3d149884eb 100644 --- a/extmod/re1.5/compilecode.c +++ b/extmod/re1.5/compilecode.c @@ -5,11 +5,34 @@ #include "re1.5.h" #define INSERT_CODE(at, num, pc) \ - ((code ? memmove(code + at + num, code + at, pc - at) : (void)0), pc += num) + ((code ? memmove(code + at + num, code + at, pc - at) : 0), pc += num) #define REL(at, to) (to - at - 2) -#define EMIT(at, byte) (code ? (code[at] = byte) : (void)(at)) +#define EMIT(at, byte) (code ? (code[at] = byte) : (at)) #define PC (prog->bytelen) + +static char unescape(char c) { + switch (c) { + case 'a': + return '\a'; + case 'b': + return '\b'; + case 'f': + return '\f'; + case 'n': + return '\n'; + case 'r': + return '\r'; + case 'v': + return '\v'; + case 'x': + return '\\'; + default: + return c; + } +} + + static const char *_compilecode(const char *re, ByteProg *prog, int sizecode) { char *code = sizecode ? NULL : prog->insts; @@ -22,13 +45,16 @@ static const char *_compilecode(const char *re, ByteProg *prog, int sizecode) case '\\': re++; if (!*re) return NULL; // Trailing backslash + term = PC; if ((*re | 0x20) == 'd' || (*re | 0x20) == 's' || (*re | 0x20) == 'w') { - term = PC; EMIT(PC++, NamedClass); EMIT(PC++, *re); - prog->len++; - break; + } else { + EMIT(PC++, Char); + EMIT(PC++, unescape(*re)); } + prog->len++; + break; default: term = PC; EMIT(PC++, Char); @@ -54,11 +80,21 @@ static const char *_compilecode(const char *re, ByteProg *prog, int sizecode) prog->len++; for (cnt = 0; *re != ']'; re++, cnt++) { if (!*re) return NULL; - EMIT(PC++, *re); + if (*re == '\\') { + re += 1; + EMIT(PC++, unescape(*re)); + } else { + EMIT(PC++, *re); + } if (re[1] == '-' && re[2] != ']') { re += 2; } - EMIT(PC++, *re); + if (*re == '\\') { + re += 1; + EMIT(PC++, unescape(*re)); + } else { + EMIT(PC++, *re); + } } EMIT(term + 1, cnt); break; diff --git a/extmod/ulab b/extmod/ulab new file mode 160000 index 0000000000000..a91b36986d81f --- /dev/null +++ b/extmod/ulab @@ -0,0 +1 @@ +Subproject commit a91b36986d81fd906a6232010778f2a93d690f8e diff --git a/extmod/uos_dupterm.c b/extmod/uos_dupterm.c index e5e6663b0aa02..781ec0d46bef8 100644 --- a/extmod/uos_dupterm.c +++ b/extmod/uos_dupterm.c @@ -34,7 +34,9 @@ #include "py/stream.h" #include "lib/utils/interrupt_char.h" -#ifdef MICROPY_PY_OS_DUPTERM +#include "supervisor/shared/translate.h" + +#if MICROPY_PY_OS_DUPTERM void mp_uos_deactivate(size_t dupterm_idx, const char *msg, mp_obj_t exc) { mp_obj_t term = MP_STATE_VM(dupterm_objs[dupterm_idx]); @@ -60,25 +62,29 @@ int mp_uos_dupterm_rx_chr(void) { nlr_buf_t nlr; if (nlr_push(&nlr) == 0) { - mp_obj_t readinto_m[3]; - mp_load_method(MP_STATE_VM(dupterm_objs[idx]), MP_QSTR_readinto, readinto_m); - readinto_m[2] = MP_STATE_VM(dupterm_arr_obj); - mp_obj_t res = mp_call_method_n_kw(1, 0, readinto_m); - if (res == mp_const_none) { - nlr_pop(); - } else if (res == MP_OBJ_NEW_SMALL_INT(0)) { + byte buf[1]; + int errcode; + const mp_stream_p_t *stream_p = mp_get_stream(MP_STATE_VM(dupterm_objs[idx])); + mp_uint_t out_sz = stream_p->read(MP_STATE_VM(dupterm_objs[idx]), buf, 1, &errcode); + if (out_sz == 0) { nlr_pop(); mp_uos_deactivate(idx, "dupterm: EOF received, deactivating\n", MP_OBJ_NULL); + } else if (out_sz == MP_STREAM_ERROR) { + // errcode is valid + if (mp_is_nonblocking_error(errcode)) { + nlr_pop(); + } else { + mp_raise_OSError(errcode); + } } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(MP_STATE_VM(dupterm_arr_obj), &bufinfo, MP_BUFFER_READ); + // read 1 byte nlr_pop(); - if (*(byte*)bufinfo.buf == mp_interrupt_char) { + if (buf[0] == mp_interrupt_char) { // Signal keyboard interrupt to be raised as soon as the VM resumes mp_keyboard_interrupt(); return -2; } - return *(byte*)bufinfo.buf; + return buf[0]; } } else { mp_uos_deactivate(idx, "dupterm: Exception in read() method, deactivating: ", nlr.ret_val); @@ -96,18 +102,7 @@ void mp_uos_dupterm_tx_strn(const char *str, size_t len) { } nlr_buf_t nlr; if (nlr_push(&nlr) == 0) { - mp_obj_t write_m[3]; - mp_load_method(MP_STATE_VM(dupterm_objs[idx]), MP_QSTR_write, write_m); - - mp_obj_array_t *arr = MP_OBJ_TO_PTR(MP_STATE_VM(dupterm_arr_obj)); - void *org_items = arr->items; - arr->items = (void*)str; - arr->len = len; - write_m[2] = MP_STATE_VM(dupterm_arr_obj); - mp_call_method_n_kw(1, 0, write_m); - arr = MP_OBJ_TO_PTR(MP_STATE_VM(dupterm_arr_obj)); - arr->items = org_items; - arr->len = 1; + mp_stream_write(MP_STATE_VM(dupterm_objs[idx]), str, len, MP_STREAM_RW_WRITE); nlr_pop(); } else { mp_uos_deactivate(idx, "dupterm: Exception in write() method, deactivating: ", nlr.ret_val); @@ -122,7 +117,7 @@ STATIC mp_obj_t mp_uos_dupterm(size_t n_args, const mp_obj_t *args) { } if (idx < 0 || idx >= MICROPY_PY_OS_DUPTERM) { - mp_raise_ValueError("invalid dupterm index"); + mp_raise_ValueError(translate("invalid dupterm index")); } mp_obj_t previous_obj = MP_STATE_VM(dupterm_objs[idx]); @@ -132,10 +127,8 @@ STATIC mp_obj_t mp_uos_dupterm(size_t n_args, const mp_obj_t *args) { if (args[0] == mp_const_none) { MP_STATE_VM(dupterm_objs[idx]) = MP_OBJ_NULL; } else { + mp_get_stream_raise(args[0], MP_STREAM_OP_READ | MP_STREAM_OP_WRITE | MP_STREAM_OP_IOCTL); MP_STATE_VM(dupterm_objs[idx]) = args[0]; - if (MP_STATE_VM(dupterm_arr_obj) == MP_OBJ_NULL) { - MP_STATE_VM(dupterm_arr_obj) = mp_obj_new_bytearray(1, ""); - } } return previous_obj; diff --git a/extmod/uzlib/adler32.c b/extmod/uzlib/adler32.c deleted file mode 100644 index 1f1759493bba8..0000000000000 --- a/extmod/uzlib/adler32.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Adler-32 checksum - * - * Copyright (c) 2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * - * http://www.ibsensoftware.com/ - * - * This software is provided 'as-is', without any express - * or implied warranty. In no event will the authors be - * held liable for any damages arising from the use of - * this software. - * - * Permission is granted to anyone to use this software - * for any purpose, including commercial applications, - * and to alter it and redistribute it freely, subject to - * the following restrictions: - * - * 1. The origin of this software must not be - * misrepresented; you must not claim that you - * wrote the original software. If you use this - * software in a product, an acknowledgment in - * the product documentation would be appreciated - * but is not required. - * - * 2. Altered source versions must be plainly marked - * as such, and must not be misrepresented as - * being the original software. - * - * 3. This notice may not be removed or altered from - * any source distribution. - */ - -/* - * Adler-32 algorithm taken from the zlib source, which is - * Copyright (C) 1995-1998 Jean-loup Gailly and Mark Adler - */ - -#include "tinf.h" - -#define A32_BASE 65521 -#define A32_NMAX 5552 - -uint32_t uzlib_adler32(const void *data, unsigned int length, uint32_t prev_sum /* 1 */) -{ - const unsigned char *buf = (const unsigned char *)data; - - unsigned int s1 = prev_sum & 0xffff; - unsigned int s2 = prev_sum >> 16; - - while (length > 0) - { - int k = length < A32_NMAX ? length : A32_NMAX; - int i; - - for (i = k / 16; i; --i, buf += 16) - { - s1 += buf[0]; s2 += s1; s1 += buf[1]; s2 += s1; - s1 += buf[2]; s2 += s1; s1 += buf[3]; s2 += s1; - s1 += buf[4]; s2 += s1; s1 += buf[5]; s2 += s1; - s1 += buf[6]; s2 += s1; s1 += buf[7]; s2 += s1; - - s1 += buf[8]; s2 += s1; s1 += buf[9]; s2 += s1; - s1 += buf[10]; s2 += s1; s1 += buf[11]; s2 += s1; - s1 += buf[12]; s2 += s1; s1 += buf[13]; s2 += s1; - s1 += buf[14]; s2 += s1; s1 += buf[15]; s2 += s1; - } - - for (i = k % 16; i; --i) { s1 += *buf++; s2 += s1; } - - s1 %= A32_BASE; - s2 %= A32_BASE; - - length -= k; - } - - return (s2 << 16) | s1; -} diff --git a/extmod/uzlib/crc32.c b/extmod/uzlib/crc32.c deleted file mode 100644 index e24c643b6acfb..0000000000000 --- a/extmod/uzlib/crc32.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * CRC32 checksum - * - * Copyright (c) 1998-2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * - * http://www.ibsensoftware.com/ - * - * This software is provided 'as-is', without any express - * or implied warranty. In no event will the authors be - * held liable for any damages arising from the use of - * this software. - * - * Permission is granted to anyone to use this software - * for any purpose, including commercial applications, - * and to alter it and redistribute it freely, subject to - * the following restrictions: - * - * 1. The origin of this software must not be - * misrepresented; you must not claim that you - * wrote the original software. If you use this - * software in a product, an acknowledgment in - * the product documentation would be appreciated - * but is not required. - * - * 2. Altered source versions must be plainly marked - * as such, and must not be misrepresented as - * being the original software. - * - * 3. This notice may not be removed or altered from - * any source distribution. - */ - -/* - * CRC32 algorithm taken from the zlib source, which is - * Copyright (C) 1995-1998 Jean-loup Gailly and Mark Adler - */ - -#include "tinf.h" - -static const unsigned int tinf_crc32tab[16] = { - 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, - 0x6b6b51f4, 0x4db26158, 0x5005713c, 0xedb88320, 0xf00f9344, - 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, - 0xbdbdf21c -}; - -/* crc is previous value for incremental computation, 0xffffffff initially */ -uint32_t uzlib_crc32(const void *data, unsigned int length, uint32_t crc) -{ - const unsigned char *buf = (const unsigned char *)data; - unsigned int i; - - for (i = 0; i < length; ++i) - { - crc ^= buf[i]; - crc = tinf_crc32tab[crc & 0x0f] ^ (crc >> 4); - crc = tinf_crc32tab[crc & 0x0f] ^ (crc >> 4); - } - - // return value suitable for passing in next time, for final value invert it - return crc/* ^ 0xffffffff*/; -} diff --git a/extmod/uzlib/tinf.h b/extmod/uzlib/tinf.h deleted file mode 100644 index 106203a099e1f..0000000000000 --- a/extmod/uzlib/tinf.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * uzlib - tiny deflate/inflate library (deflate, gzip, zlib) - * - * Copyright (c) 2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * http://www.ibsensoftware.com/ - * - * Copyright (c) 2014-2016 by Paul Sokolovsky - */ - -#ifndef TINF_H_INCLUDED -#define TINF_H_INCLUDED - -#include - -/* calling convention */ -#ifndef TINFCC - #ifdef __WATCOMC__ - #define TINFCC __cdecl - #else - #define TINFCC - #endif -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* ok status, more data produced */ -#define TINF_OK 0 -/* end of compressed stream reached */ -#define TINF_DONE 1 -#define TINF_DATA_ERROR (-3) -#define TINF_CHKSUM_ERROR (-4) -#define TINF_DICT_ERROR (-5) - -/* checksum types */ -#define TINF_CHKSUM_NONE 0 -#define TINF_CHKSUM_ADLER 1 -#define TINF_CHKSUM_CRC 2 - -/* data structures */ - -typedef struct { - unsigned short table[16]; /* table of code length counts */ - unsigned short trans[288]; /* code -> symbol translation table */ -} TINF_TREE; - -struct TINF_DATA; -typedef struct TINF_DATA { - const unsigned char *source; - /* If source above is NULL, this function will be used to read - next byte from source stream */ - unsigned char (*readSource)(struct TINF_DATA *data); - - unsigned int tag; - unsigned int bitcount; - - /* Buffer start */ - unsigned char *destStart; - /* Buffer total size */ - unsigned int destSize; - /* Current pointer in buffer */ - unsigned char *dest; - /* Remaining bytes in buffer */ - unsigned int destRemaining; - - /* Accumulating checksum */ - unsigned int checksum; - char checksum_type; - - int btype; - int bfinal; - unsigned int curlen; - int lzOff; - unsigned char *dict_ring; - unsigned int dict_size; - unsigned int dict_idx; - - TINF_TREE ltree; /* dynamic length/symbol tree */ - TINF_TREE dtree; /* dynamic distance tree */ -} TINF_DATA; - -#define TINF_PUT(d, c) \ - { \ - *d->dest++ = c; \ - if (d->dict_ring) { d->dict_ring[d->dict_idx++] = c; if (d->dict_idx == d->dict_size) d->dict_idx = 0; } \ - } - -unsigned char TINFCC uzlib_get_byte(TINF_DATA *d); - -/* Decompression API */ - -void TINFCC uzlib_init(void); -void TINFCC uzlib_uncompress_init(TINF_DATA *d, void *dict, unsigned int dictLen); -int TINFCC uzlib_uncompress(TINF_DATA *d); -int TINFCC uzlib_uncompress_chksum(TINF_DATA *d); - -int TINFCC uzlib_zlib_parse_header(TINF_DATA *d); -int TINFCC uzlib_gzip_parse_header(TINF_DATA *d); - -/* Compression API */ - -void TINFCC uzlib_compress(void *data, const uint8_t *src, unsigned slen); - -/* Checksum API */ - -/* prev_sum is previous value for incremental computation, 1 initially */ -uint32_t TINFCC uzlib_adler32(const void *data, unsigned int length, uint32_t prev_sum); -/* crc is previous value for incremental computation, 0xffffffff initially */ -uint32_t TINFCC uzlib_crc32(const void *data, unsigned int length, uint32_t crc); - -#ifdef __cplusplus -} /* extern "C" */ -#endif - -#endif /* TINF_H_INCLUDED */ diff --git a/extmod/uzlib/tinfgzip.c b/extmod/uzlib/tinfgzip.c deleted file mode 100644 index f1afdd0b8d87a..0000000000000 --- a/extmod/uzlib/tinfgzip.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * tinfgzip - tiny gzip decompressor - * - * Copyright (c) 2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * - * http://www.ibsensoftware.com/ - * - * Copyright (c) 2014-2016 by Paul Sokolovsky - * - * This software is provided 'as-is', without any express - * or implied warranty. In no event will the authors be - * held liable for any damages arising from the use of - * this software. - * - * Permission is granted to anyone to use this software - * for any purpose, including commercial applications, - * and to alter it and redistribute it freely, subject to - * the following restrictions: - * - * 1. The origin of this software must not be - * misrepresented; you must not claim that you - * wrote the original software. If you use this - * software in a product, an acknowledgment in - * the product documentation would be appreciated - * but is not required. - * - * 2. Altered source versions must be plainly marked - * as such, and must not be misrepresented as - * being the original software. - * - * 3. This notice may not be removed or altered from - * any source distribution. - */ - -#include "tinf.h" - -#define FTEXT 1 -#define FHCRC 2 -#define FEXTRA 4 -#define FNAME 8 -#define FCOMMENT 16 - -void tinf_skip_bytes(TINF_DATA *d, int num); -uint16_t tinf_get_uint16(TINF_DATA *d); - -void tinf_skip_bytes(TINF_DATA *d, int num) -{ - while (num--) uzlib_get_byte(d); -} - -uint16_t tinf_get_uint16(TINF_DATA *d) -{ - unsigned int v = uzlib_get_byte(d); - v = (uzlib_get_byte(d) << 8) | v; - return v; -} - -int uzlib_gzip_parse_header(TINF_DATA *d) -{ - unsigned char flg; - - /* -- check format -- */ - - /* check id bytes */ - if (uzlib_get_byte(d) != 0x1f || uzlib_get_byte(d) != 0x8b) return TINF_DATA_ERROR; - - /* check method is deflate */ - if (uzlib_get_byte(d) != 8) return TINF_DATA_ERROR; - - /* get flag byte */ - flg = uzlib_get_byte(d); - - /* check that reserved bits are zero */ - if (flg & 0xe0) return TINF_DATA_ERROR; - - /* -- find start of compressed data -- */ - - /* skip rest of base header of 10 bytes */ - tinf_skip_bytes(d, 6); - - /* skip extra data if present */ - if (flg & FEXTRA) - { - unsigned int xlen = tinf_get_uint16(d); - tinf_skip_bytes(d, xlen); - } - - /* skip file name if present */ - if (flg & FNAME) { while (uzlib_get_byte(d)); } - - /* skip file comment if present */ - if (flg & FCOMMENT) { while (uzlib_get_byte(d)); } - - /* check header crc if present */ - if (flg & FHCRC) - { - /*unsigned int hcrc =*/ tinf_get_uint16(d); - - // TODO: Check! -// if (hcrc != (tinf_crc32(src, start - src) & 0x0000ffff)) -// return TINF_DATA_ERROR; - } - - /* initialize for crc32 checksum */ - d->checksum_type = TINF_CHKSUM_CRC; - d->checksum = ~0; - - return TINF_OK; -} diff --git a/extmod/uzlib/tinflate.c b/extmod/uzlib/tinflate.c deleted file mode 100644 index 58850eb4a2e8b..0000000000000 --- a/extmod/uzlib/tinflate.c +++ /dev/null @@ -1,551 +0,0 @@ -/* - * tinflate - tiny inflate - * - * Copyright (c) 2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * http://www.ibsensoftware.com/ - * - * Copyright (c) 2014-2016 by Paul Sokolovsky - * - * This software is provided 'as-is', without any express - * or implied warranty. In no event will the authors be - * held liable for any damages arising from the use of - * this software. - * - * Permission is granted to anyone to use this software - * for any purpose, including commercial applications, - * and to alter it and redistribute it freely, subject to - * the following restrictions: - * - * 1. The origin of this software must not be - * misrepresented; you must not claim that you - * wrote the original software. If you use this - * software in a product, an acknowledgment in - * the product documentation would be appreciated - * but is not required. - * - * 2. Altered source versions must be plainly marked - * as such, and must not be misrepresented as - * being the original software. - * - * 3. This notice may not be removed or altered from - * any source distribution. - */ - -#include -#include "tinf.h" - -uint32_t tinf_get_le_uint32(TINF_DATA *d); -uint32_t tinf_get_be_uint32(TINF_DATA *d); - -/* --------------------------------------------------- * - * -- uninitialized global data (static structures) -- * - * --------------------------------------------------- */ - -#ifdef RUNTIME_BITS_TABLES - -/* extra bits and base tables for length codes */ -unsigned char length_bits[30]; -unsigned short length_base[30]; - -/* extra bits and base tables for distance codes */ -unsigned char dist_bits[30]; -unsigned short dist_base[30]; - -#else - -const unsigned char length_bits[30] = { - 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 2, 2, 2, 2, - 3, 3, 3, 3, 4, 4, 4, 4, - 5, 5, 5, 5 -}; -const unsigned short length_base[30] = { - 3, 4, 5, 6, 7, 8, 9, 10, - 11, 13, 15, 17, 19, 23, 27, 31, - 35, 43, 51, 59, 67, 83, 99, 115, - 131, 163, 195, 227, 258 -}; - -const unsigned char dist_bits[30] = { - 0, 0, 0, 0, 1, 1, 2, 2, - 3, 3, 4, 4, 5, 5, 6, 6, - 7, 7, 8, 8, 9, 9, 10, 10, - 11, 11, 12, 12, 13, 13 -}; -const unsigned short dist_base[30] = { - 1, 2, 3, 4, 5, 7, 9, 13, - 17, 25, 33, 49, 65, 97, 129, 193, - 257, 385, 513, 769, 1025, 1537, 2049, 3073, - 4097, 6145, 8193, 12289, 16385, 24577 -}; - -#endif - -/* special ordering of code length codes */ -const unsigned char clcidx[] = { - 16, 17, 18, 0, 8, 7, 9, 6, - 10, 5, 11, 4, 12, 3, 13, 2, - 14, 1, 15 -}; - -/* ----------------------- * - * -- utility functions -- * - * ----------------------- */ - -#ifdef RUNTIME_BITS_TABLES -/* build extra bits and base tables */ -static void tinf_build_bits_base(unsigned char *bits, unsigned short *base, int delta, int first) -{ - int i, sum; - - /* build bits table */ - for (i = 0; i < delta; ++i) bits[i] = 0; - for (i = 0; i < 30 - delta; ++i) bits[i + delta] = i / delta; - - /* build base table */ - for (sum = first, i = 0; i < 30; ++i) - { - base[i] = sum; - sum += 1 << bits[i]; - } -} -#endif - -/* build the fixed huffman trees */ -static void tinf_build_fixed_trees(TINF_TREE *lt, TINF_TREE *dt) -{ - int i; - - /* build fixed length tree */ - for (i = 0; i < 7; ++i) lt->table[i] = 0; - - lt->table[7] = 24; - lt->table[8] = 152; - lt->table[9] = 112; - - for (i = 0; i < 24; ++i) lt->trans[i] = 256 + i; - for (i = 0; i < 144; ++i) lt->trans[24 + i] = i; - for (i = 0; i < 8; ++i) lt->trans[24 + 144 + i] = 280 + i; - for (i = 0; i < 112; ++i) lt->trans[24 + 144 + 8 + i] = 144 + i; - - /* build fixed distance tree */ - for (i = 0; i < 5; ++i) dt->table[i] = 0; - - dt->table[5] = 32; - - for (i = 0; i < 32; ++i) dt->trans[i] = i; -} - -/* given an array of code lengths, build a tree */ -static void tinf_build_tree(TINF_TREE *t, const unsigned char *lengths, unsigned int num) -{ - unsigned short offs[16]; - unsigned int i, sum; - - /* clear code length count table */ - for (i = 0; i < 16; ++i) t->table[i] = 0; - - /* scan symbol lengths, and sum code length counts */ - for (i = 0; i < num; ++i) t->table[lengths[i]]++; - - t->table[0] = 0; - - /* compute offset table for distribution sort */ - for (sum = 0, i = 0; i < 16; ++i) - { - offs[i] = sum; - sum += t->table[i]; - } - - /* create code->symbol translation table (symbols sorted by code) */ - for (i = 0; i < num; ++i) - { - if (lengths[i]) t->trans[offs[lengths[i]]++] = i; - } -} - -/* ---------------------- * - * -- decode functions -- * - * ---------------------- */ - -unsigned char uzlib_get_byte(TINF_DATA *d) -{ - if (d->source) { - return *d->source++; - } - return d->readSource(d); -} - -uint32_t tinf_get_le_uint32(TINF_DATA *d) -{ - uint32_t val = 0; - int i; - for (i = 4; i--;) { - val = val >> 8 | uzlib_get_byte(d) << 24; - } - return val; -} - -uint32_t tinf_get_be_uint32(TINF_DATA *d) -{ - uint32_t val = 0; - int i; - for (i = 4; i--;) { - val = val << 8 | uzlib_get_byte(d); - } - return val; -} - -/* get one bit from source stream */ -static int tinf_getbit(TINF_DATA *d) -{ - unsigned int bit; - - /* check if tag is empty */ - if (!d->bitcount--) - { - /* load next tag */ - d->tag = uzlib_get_byte(d); - d->bitcount = 7; - } - - /* shift bit out of tag */ - bit = d->tag & 0x01; - d->tag >>= 1; - - return bit; -} - -/* read a num bit value from a stream and add base */ -static unsigned int tinf_read_bits(TINF_DATA *d, int num, int base) -{ - unsigned int val = 0; - - /* read num bits */ - if (num) - { - unsigned int limit = 1 << (num); - unsigned int mask; - - for (mask = 1; mask < limit; mask *= 2) - if (tinf_getbit(d)) val += mask; - } - - return val + base; -} - -/* given a data stream and a tree, decode a symbol */ -static int tinf_decode_symbol(TINF_DATA *d, TINF_TREE *t) -{ - int sum = 0, cur = 0, len = 0; - - /* get more bits while code value is above sum */ - do { - - cur = 2*cur + tinf_getbit(d); - - ++len; - - sum += t->table[len]; - cur -= t->table[len]; - - } while (cur >= 0); - - return t->trans[sum + cur]; -} - -/* given a data stream, decode dynamic trees from it */ -static void tinf_decode_trees(TINF_DATA *d, TINF_TREE *lt, TINF_TREE *dt) -{ - unsigned char lengths[288+32]; - unsigned int hlit, hdist, hclen; - unsigned int i, num, length; - - /* get 5 bits HLIT (257-286) */ - hlit = tinf_read_bits(d, 5, 257); - - /* get 5 bits HDIST (1-32) */ - hdist = tinf_read_bits(d, 5, 1); - - /* get 4 bits HCLEN (4-19) */ - hclen = tinf_read_bits(d, 4, 4); - - for (i = 0; i < 19; ++i) lengths[i] = 0; - - /* read code lengths for code length alphabet */ - for (i = 0; i < hclen; ++i) - { - /* get 3 bits code length (0-7) */ - unsigned int clen = tinf_read_bits(d, 3, 0); - - lengths[clcidx[i]] = clen; - } - - /* build code length tree, temporarily use length tree */ - tinf_build_tree(lt, lengths, 19); - - /* decode code lengths for the dynamic trees */ - for (num = 0; num < hlit + hdist; ) - { - int sym = tinf_decode_symbol(d, lt); - - switch (sym) - { - case 16: - /* copy previous code length 3-6 times (read 2 bits) */ - { - unsigned char prev = lengths[num - 1]; - for (length = tinf_read_bits(d, 2, 3); length; --length) - { - lengths[num++] = prev; - } - } - break; - case 17: - /* repeat code length 0 for 3-10 times (read 3 bits) */ - for (length = tinf_read_bits(d, 3, 3); length; --length) - { - lengths[num++] = 0; - } - break; - case 18: - /* repeat code length 0 for 11-138 times (read 7 bits) */ - for (length = tinf_read_bits(d, 7, 11); length; --length) - { - lengths[num++] = 0; - } - break; - default: - /* values 0-15 represent the actual code lengths */ - lengths[num++] = sym; - break; - } - } - - /* build dynamic trees */ - tinf_build_tree(lt, lengths, hlit); - tinf_build_tree(dt, lengths + hlit, hdist); -} - -/* ----------------------------- * - * -- block inflate functions -- * - * ----------------------------- */ - -/* given a stream and two trees, inflate a block of data */ -static int tinf_inflate_block_data(TINF_DATA *d, TINF_TREE *lt, TINF_TREE *dt) -{ - if (d->curlen == 0) { - unsigned int offs; - int dist; - int sym = tinf_decode_symbol(d, lt); - //printf("huff sym: %02x\n", sym); - - /* literal byte */ - if (sym < 256) { - TINF_PUT(d, sym); - return TINF_OK; - } - - /* end of block */ - if (sym == 256) { - return TINF_DONE; - } - - /* substring from sliding dictionary */ - sym -= 257; - /* possibly get more bits from length code */ - d->curlen = tinf_read_bits(d, length_bits[sym], length_base[sym]); - - dist = tinf_decode_symbol(d, dt); - /* possibly get more bits from distance code */ - offs = tinf_read_bits(d, dist_bits[dist], dist_base[dist]); - if (d->dict_ring) { - if (offs > d->dict_size) { - return TINF_DICT_ERROR; - } - d->lzOff = d->dict_idx - offs; - if (d->lzOff < 0) { - d->lzOff += d->dict_size; - } - } else { - d->lzOff = -offs; - } - } - - /* copy next byte from dict substring */ - if (d->dict_ring) { - TINF_PUT(d, d->dict_ring[d->lzOff]); - if ((unsigned)++d->lzOff == d->dict_size) { - d->lzOff = 0; - } - } else { - d->dest[0] = d->dest[d->lzOff]; - d->dest++; - } - d->curlen--; - return TINF_OK; -} - -/* inflate an uncompressed block of data */ -static int tinf_inflate_uncompressed_block(TINF_DATA *d) -{ - if (d->curlen == 0) { - unsigned int length, invlength; - - /* get length */ - length = uzlib_get_byte(d) + 256 * uzlib_get_byte(d); - /* get one's complement of length */ - invlength = uzlib_get_byte(d) + 256 * uzlib_get_byte(d); - /* check length */ - if (length != (~invlength & 0x0000ffff)) return TINF_DATA_ERROR; - - /* increment length to properly return TINF_DONE below, without - producing data at the same time */ - d->curlen = length + 1; - - /* make sure we start next block on a byte boundary */ - d->bitcount = 0; - } - - if (--d->curlen == 0) { - return TINF_DONE; - } - - unsigned char c = uzlib_get_byte(d); - TINF_PUT(d, c); - return TINF_OK; -} - -/* ---------------------- * - * -- public functions -- * - * ---------------------- */ - -/* initialize global (static) data */ -void uzlib_init(void) -{ -#ifdef RUNTIME_BITS_TABLES - /* build extra bits and base tables */ - tinf_build_bits_base(length_bits, length_base, 4, 3); - tinf_build_bits_base(dist_bits, dist_base, 2, 1); - - /* fix a special case */ - length_bits[28] = 0; - length_base[28] = 258; -#endif -} - -/* initialize decompression structure */ -void uzlib_uncompress_init(TINF_DATA *d, void *dict, unsigned int dictLen) -{ - d->bitcount = 0; - d->bfinal = 0; - d->btype = -1; - d->dict_size = dictLen; - d->dict_ring = dict; - d->dict_idx = 0; - d->curlen = 0; -} - -/* inflate next byte of compressed stream */ -int uzlib_uncompress(TINF_DATA *d) -{ - do { - int res; - - /* start a new block */ - if (d->btype == -1) { -next_blk: - /* read final block flag */ - d->bfinal = tinf_getbit(d); - /* read block type (2 bits) */ - d->btype = tinf_read_bits(d, 2, 0); - - //printf("Started new block: type=%d final=%d\n", d->btype, d->bfinal); - - if (d->btype == 1) { - /* build fixed huffman trees */ - tinf_build_fixed_trees(&d->ltree, &d->dtree); - } else if (d->btype == 2) { - /* decode trees from stream */ - tinf_decode_trees(d, &d->ltree, &d->dtree); - } - } - - /* process current block */ - switch (d->btype) - { - case 0: - /* decompress uncompressed block */ - res = tinf_inflate_uncompressed_block(d); - break; - case 1: - case 2: - /* decompress block with fixed/dyanamic huffman trees */ - /* trees were decoded previously, so it's the same routine for both */ - res = tinf_inflate_block_data(d, &d->ltree, &d->dtree); - break; - default: - return TINF_DATA_ERROR; - } - - if (res == TINF_DONE && !d->bfinal) { - /* the block has ended (without producing more data), but we - can't return without data, so start procesing next block */ - goto next_blk; - } - - if (res != TINF_OK) { - return res; - } - - } while (--d->destSize); - - return TINF_OK; -} - -int uzlib_uncompress_chksum(TINF_DATA *d) -{ - int res; - unsigned char *data = d->dest; - - res = uzlib_uncompress(d); - - if (res < 0) return res; - - switch (d->checksum_type) { - - case TINF_CHKSUM_ADLER: - d->checksum = uzlib_adler32(data, d->dest - data, d->checksum); - break; - - case TINF_CHKSUM_CRC: - d->checksum = uzlib_crc32(data, d->dest - data, d->checksum); - break; - } - - if (res == TINF_DONE) { - unsigned int val; - - switch (d->checksum_type) { - - case TINF_CHKSUM_ADLER: - val = tinf_get_be_uint32(d); - if (d->checksum != val) { - return TINF_CHKSUM_ERROR; - } - break; - - case TINF_CHKSUM_CRC: - val = tinf_get_le_uint32(d); - if (~d->checksum != val) { - return TINF_CHKSUM_ERROR; - } - // Uncompressed size. TODO: Check - val = tinf_get_le_uint32(d); - break; - } - } - - return res; -} diff --git a/extmod/uzlib/tinfzlib.c b/extmod/uzlib/tinfzlib.c deleted file mode 100644 index 74fade3b9d435..0000000000000 --- a/extmod/uzlib/tinfzlib.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * tinfzlib - tiny zlib decompressor - * - * Copyright (c) 2003 by Joergen Ibsen / Jibz - * All Rights Reserved - * - * http://www.ibsensoftware.com/ - * - * Copyright (c) 2014-2016 by Paul Sokolovsky - * - * This software is provided 'as-is', without any express - * or implied warranty. In no event will the authors be - * held liable for any damages arising from the use of - * this software. - * - * Permission is granted to anyone to use this software - * for any purpose, including commercial applications, - * and to alter it and redistribute it freely, subject to - * the following restrictions: - * - * 1. The origin of this software must not be - * misrepresented; you must not claim that you - * wrote the original software. If you use this - * software in a product, an acknowledgment in - * the product documentation would be appreciated - * but is not required. - * - * 2. Altered source versions must be plainly marked - * as such, and must not be misrepresented as - * being the original software. - * - * 3. This notice may not be removed or altered from - * any source distribution. - */ - -#include "tinf.h" - -int uzlib_zlib_parse_header(TINF_DATA *d) -{ - unsigned char cmf, flg; - - /* -- get header bytes -- */ - - cmf = uzlib_get_byte(d); - flg = uzlib_get_byte(d); - - /* -- check format -- */ - - /* check checksum */ - if ((256*cmf + flg) % 31) return TINF_DATA_ERROR; - - /* check method is deflate */ - if ((cmf & 0x0f) != 8) return TINF_DATA_ERROR; - - /* check window size is valid */ - if ((cmf >> 4) > 7) return TINF_DATA_ERROR; - - /* check there is no preset dictionary */ - if (flg & 0x20) return TINF_DATA_ERROR; - - /* initialize for adler32 checksum */ - d->checksum_type = TINF_CHKSUM_ADLER; - d->checksum = 1; - - return cmf >> 4; -} diff --git a/extmod/vfs.c b/extmod/vfs.c index e83646d8de5e0..2bb4057e7eebb 100644 --- a/extmod/vfs.c +++ b/extmod/vfs.c @@ -124,21 +124,39 @@ mp_import_stat_t mp_vfs_import_stat(const char *path) { if (vfs == MP_VFS_NONE || vfs == MP_VFS_ROOT) { return MP_IMPORT_STAT_NO_EXIST; } - #if MICROPY_VFS_FAT - // fast paths for known VFS types - if (mp_obj_get_type(vfs->obj) == &mp_fat_vfs_type) { - return fat_vfs_import_stat(MP_OBJ_TO_PTR(vfs->obj), path_out); + + // If the mounted object has the VFS protocol, call its import_stat helper + const mp_vfs_proto_t *proto = (mp_vfs_proto_t*)mp_proto_get(MP_QSTR_protocol_vfs, vfs->obj); + if (proto != NULL) { + return proto->import_stat(MP_OBJ_TO_PTR(vfs->obj), path_out); + } + + // delegate to vfs.stat() method + mp_obj_t path_o = mp_obj_new_str(path_out, strlen(path_out)); + mp_obj_t stat; + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + stat = mp_vfs_proxy_call(vfs, MP_QSTR_stat, 1, &path_o); + nlr_pop(); + } else { + // assume an exception means that the path is not found + return MP_IMPORT_STAT_NO_EXIST; + } + mp_obj_t *items; + mp_obj_get_array_fixed_n(stat, 10, &items); + mp_int_t st_mode = mp_obj_get_int(items[0]); + if (st_mode & MP_S_IFDIR) { + return MP_IMPORT_STAT_DIR; + } else { + return MP_IMPORT_STAT_FILE; } - #endif - // TODO delegate to vfs.stat() method - return MP_IMPORT_STAT_NO_EXIST; } mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_readonly, ARG_mkfs }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_readonly, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_false} }, - { MP_QSTR_mkfs, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_false} }, + { MP_QSTR_readonly, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_false_obj)} }, + { MP_QSTR_mkfs, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_false_obj)} }, }; // parse args @@ -158,7 +176,7 @@ mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args // auto-detect the filesystem and create the corresponding VFS entity. // (At the moment we only support FAT filesystems.) #if MICROPY_VFS_FAT - vfs_obj = mp_fat_vfs_type.make_new(&mp_fat_vfs_type, 1, 0, &vfs_obj); + vfs_obj = mp_fat_vfs_type.make_new(&mp_fat_vfs_type, 1, &vfs_obj, NULL); #endif } @@ -246,7 +264,7 @@ mp_obj_t mp_vfs_open(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - mp_vfs_mount_t *vfs = lookup_path((mp_obj_t)args[ARG_file].u_rom_obj, &args[ARG_file].u_obj); + mp_vfs_mount_t *vfs = lookup_path(args[ARG_file].u_obj, &args[ARG_file].u_obj); return mp_vfs_proxy_call(vfs, MP_QSTR_open, 2, (mp_obj_t*)&args); } MP_DEFINE_CONST_FUN_OBJ_KW(mp_vfs_open_obj, 0, mp_vfs_open); @@ -261,7 +279,7 @@ mp_obj_t mp_vfs_chdir(mp_obj_t path_in) { // subsequent relative paths begin at the root of that VFS. for (vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { if (vfs->len == 1) { - mp_obj_t root = mp_obj_new_str("/", 1, false); + mp_obj_t root = MP_OBJ_NEW_QSTR(MP_QSTR__slash_); mp_vfs_proxy_call(vfs, MP_QSTR_chdir, 1, &root); break; } @@ -307,7 +325,7 @@ mp_obj_t mp_vfs_ilistdir_it_iternext(mp_obj_t self_in) { self->cur.vfs = vfs->next; if (vfs->len == 1) { // vfs is mounted at root dir, delegate to it - mp_obj_t root = mp_obj_new_str("/", 1, false); + mp_obj_t root = MP_OBJ_NEW_QSTR(MP_QSTR__slash_); self->is_iter = true; self->cur.iter = mp_vfs_proxy_call(vfs, MP_QSTR_ilistdir, 1, &root); return mp_iternext(self->cur.iter); @@ -355,9 +373,7 @@ mp_obj_t mp_vfs_listdir(size_t n_args, const mp_obj_t *args) { mp_obj_t dir_list = mp_obj_new_list(0, NULL); mp_obj_t next; while ((next = mp_iternext(iter)) != MP_OBJ_STOP_ITERATION) { - mp_obj_t *items; - mp_obj_get_array_fixed_n(next, 3, &items); - mp_obj_list_append(dir_list, items[0]); + mp_obj_list_append(dir_list, mp_obj_subscr(next, MP_OBJ_NEW_SMALL_INT(0), MP_OBJ_SENTINEL)); } return dir_list; } diff --git a/extmod/vfs.h b/extmod/vfs.h index c20d6dcd47aeb..6c0692365f6f7 100644 --- a/extmod/vfs.h +++ b/extmod/vfs.h @@ -28,6 +28,7 @@ #include "py/lexer.h" #include "py/obj.h" +#include "py/proto.h" // return values of mp_vfs_lookup_path // ROOT is 0 so that the default current directory is the root directory @@ -45,6 +46,12 @@ #define BP_IOCTL_SEC_COUNT (4) #define BP_IOCTL_SEC_SIZE (5) +// At the moment the VFS protocol just has import_stat, but could be extended to other methods +typedef struct _mp_vfs_proto_t { + MP_PROTOCOL_HEAD + mp_import_stat_t (*import_stat)(void *self, const char *path); +} mp_vfs_proto_t; + typedef struct _mp_vfs_mount_t { const char *str; // mount point with leading / size_t len; @@ -63,6 +70,8 @@ typedef struct _mp_vfs_ilistdir_it_t { bool is_iter; } mp_vfs_ilistdir_it_t; +mp_obj_t mp_vfs_ilistdir_it_iternext(mp_obj_t self_in); + mp_vfs_mount_t *mp_vfs_lookup_path(const char *path, const char **path_out); mp_import_stat_t mp_vfs_import_stat(const char *path); mp_obj_t mp_vfs_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); diff --git a/extmod/vfs_fat.c b/extmod/vfs_fat.c index 22346bdf1d00a..9cb4d98426319 100644 --- a/extmod/vfs_fat.c +++ b/extmod/vfs_fat.c @@ -33,11 +33,14 @@ #endif #include +#include "py/objproperty.h" #include "py/runtime.h" #include "py/mperrno.h" #include "lib/oofatfs/ff.h" #include "extmod/vfs_fat.h" #include "lib/timeutils/timeutils.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/translate.h" #if _MAX_SS == _MIN_SS #define SECSIZE(fs) (_MIN_SS) @@ -47,8 +50,23 @@ #define mp_obj_fat_vfs_t fs_user_mount_t -STATIC mp_obj_t fat_vfs_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); +mp_import_stat_t fat_vfs_import_stat(void *vfs_in, const char *path) { + fs_user_mount_t *vfs = vfs_in; + FILINFO fno; + assert(vfs != NULL); + FRESULT res = f_stat(&vfs->fatfs, path, &fno); + if (res == FR_OK) { + if ((fno.fattrib & AM_DIR) != 0) { + return MP_IMPORT_STAT_DIR; + } else { + return MP_IMPORT_STAT_FILE; + } + } + return MP_IMPORT_STAT_NO_EXIST; +} + +STATIC mp_obj_t fat_vfs_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); // create new object fs_user_mount_t *vfs = m_new_obj(fs_user_mount_t); @@ -69,12 +87,37 @@ STATIC mp_obj_t fat_vfs_make_new(const mp_obj_type_t *type, size_t n_args, size_ mp_load_method(args[0], MP_QSTR_count, vfs->u.old.count); } + // mount the block device so the VFS methods can be used + FRESULT res = f_mount(&vfs->fatfs); + if (res == FR_NO_FILESYSTEM) { + // don't error out if no filesystem, to let mkfs()/mount() create one if wanted + vfs->flags |= FSUSER_NO_FILESYSTEM; + } else if (res != FR_OK) { + mp_raise_OSError(fresult_to_errno_table[res]); + } + return MP_OBJ_FROM_PTR(vfs); } +STATIC void verify_fs_writable(fs_user_mount_t *vfs) { + if (!filesystem_is_writable_by_python(vfs)) { + mp_raise_OSError(MP_EROFS); + } +} + +#if _FS_REENTRANT +STATIC mp_obj_t fat_vfs_del(mp_obj_t self_in) { + mp_obj_fat_vfs_t *self = MP_OBJ_TO_PTR(self_in); + // f_umount only needs to be called to release the sync object + f_umount(&self->fatfs); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_del_obj, fat_vfs_del); +#endif + STATIC mp_obj_t fat_vfs_mkfs(mp_obj_t bdev_in) { // create new object - fs_user_mount_t *vfs = MP_OBJ_TO_PTR(fat_vfs_make_new(&mp_fat_vfs_type, 1, 0, &bdev_in)); + fs_user_mount_t *vfs = MP_OBJ_TO_PTR(fat_vfs_make_new(&mp_fat_vfs_type, 1, &bdev_in, NULL)); // make the filesystem uint8_t working_buf[_MAX_SS]; @@ -88,7 +131,52 @@ STATIC mp_obj_t fat_vfs_mkfs(mp_obj_t bdev_in) { STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_mkfs_fun_obj, fat_vfs_mkfs); STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(fat_vfs_mkfs_obj, MP_ROM_PTR(&fat_vfs_mkfs_fun_obj)); -STATIC MP_DEFINE_CONST_FUN_OBJ_3(fat_vfs_open_obj, fatfs_builtin_open_self); +typedef struct _mp_vfs_fat_ilistdir_it_t { + mp_obj_base_t base; + mp_fun_1_t iternext; + bool is_str; + FF_DIR dir; +} mp_vfs_fat_ilistdir_it_t; + +STATIC mp_obj_t mp_vfs_fat_ilistdir_it_iternext(mp_obj_t self_in) { + mp_vfs_fat_ilistdir_it_t *self = MP_OBJ_TO_PTR(self_in); + + for (;;) { + FILINFO fno; + FRESULT res = f_readdir(&self->dir, &fno); + char *fn = fno.fname; + if (res != FR_OK || fn[0] == 0) { + // stop on error or end of dir + break; + } + + // Note that FatFS already filters . and .., so we don't need to + + // make 4-tuple with info about this entry + mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(4, NULL)); + if (self->is_str) { + t->items[0] = mp_obj_new_str(fn, strlen(fn)); + } else { + t->items[0] = mp_obj_new_bytes((const byte*)fn, strlen(fn)); + } + if (fno.fattrib & AM_DIR) { + // dir + t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFDIR); + } else { + // file + t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFREG); + } + t->items[2] = MP_OBJ_NEW_SMALL_INT(0); // no inode number + t->items[3] = mp_obj_new_int_from_uint(fno.fsize); + + return MP_OBJ_FROM_PTR(t); + } + + // ignore error because we may be closing a second time + f_closedir(&self->dir); + + return MP_OBJ_STOP_ITERATION; +} STATIC mp_obj_t fat_vfs_ilistdir_func(size_t n_args, const mp_obj_t *args) { mp_obj_fat_vfs_t *self = MP_OBJ_TO_PTR(args[0]); @@ -103,12 +191,23 @@ STATIC mp_obj_t fat_vfs_ilistdir_func(size_t n_args, const mp_obj_t *args) { path = ""; } - return fat_vfs_ilistdir2(self, path, is_str_type); + // Create a new iterator object to list the dir + mp_vfs_fat_ilistdir_it_t *iter = m_new_obj(mp_vfs_fat_ilistdir_it_t); + iter->base.type = &mp_type_polymorph_iter; + iter->iternext = mp_vfs_fat_ilistdir_it_iternext; + iter->is_str = is_str_type; + FRESULT res = f_opendir(&self->fatfs, &iter->dir, path); + if (res != FR_OK) { + mp_raise_OSError(fresult_to_errno_table[res]); + } + + return MP_OBJ_FROM_PTR(iter); } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(fat_vfs_ilistdir_obj, 1, 2, fat_vfs_ilistdir_func); STATIC mp_obj_t fat_vfs_remove_internal(mp_obj_t vfs_in, mp_obj_t path_in, mp_int_t attr) { mp_obj_fat_vfs_t *self = MP_OBJ_TO_PTR(vfs_in); + verify_fs_writable(self); const char *path = mp_obj_str_get_str(path_in); FILINFO fno; @@ -143,9 +242,26 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(fat_vfs_rmdir_obj, fat_vfs_rmdir); STATIC mp_obj_t fat_vfs_rename(mp_obj_t vfs_in, mp_obj_t path_in, mp_obj_t path_out) { mp_obj_fat_vfs_t *self = MP_OBJ_TO_PTR(vfs_in); + verify_fs_writable(self); const char *old_path = mp_obj_str_get_str(path_in); const char *new_path = mp_obj_str_get_str(path_out); - FRESULT res = f_rename(&self->fatfs, old_path, new_path); + + // Check to see if we're moving a directory into itself. This occurs when we're moving a + // directory where the old path is a prefix of the new and the next character is a "/" and thus + // preserves the original directory name. + FILINFO fno; + FRESULT res = f_stat(&self->fatfs, old_path, &fno); + if (res != FR_OK) { + mp_raise_OSError(fresult_to_errno_table[res]); + } + if ((fno.fattrib & AM_DIR) != 0 && + strlen(new_path) > strlen(old_path) && + new_path[strlen(old_path)] == '/' && + strncmp(old_path, new_path, strlen(old_path)) == 0) { + mp_raise_OSError(MP_EINVAL); + } + + res = f_rename(&self->fatfs, old_path, new_path); if (res == FR_EXIST) { // if new_path exists then try removing it (but only if it's a file) fat_vfs_remove_internal(vfs_in, path_out, 0); // 0 == file attribute @@ -163,6 +279,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_3(fat_vfs_rename_obj, fat_vfs_rename); STATIC mp_obj_t fat_vfs_mkdir(mp_obj_t vfs_in, mp_obj_t path_o) { mp_obj_fat_vfs_t *self = MP_OBJ_TO_PTR(vfs_in); + verify_fs_writable(self); const char *path = mp_obj_str_get_str(path_o); FRESULT res = f_mkdir(&self->fatfs, path); if (res == FR_OK) { @@ -197,7 +314,7 @@ STATIC mp_obj_t fat_vfs_getcwd(mp_obj_t vfs_in) { if (res != FR_OK) { mp_raise_OSError(fresult_to_errno_table[res]); } - return mp_obj_new_str(buf, strlen(buf), false); + return mp_obj_new_str(buf, strlen(buf)); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_getcwd_obj, fat_vfs_getcwd); @@ -228,14 +345,21 @@ STATIC mp_obj_t fat_vfs_stat(mp_obj_t vfs_in, mp_obj_t path_in) { } else { mode |= MP_S_IFREG; } - mp_int_t seconds = timeutils_seconds_since_2000( - 1980 + ((fno.fdate >> 9) & 0x7f), - (fno.fdate >> 5) & 0x0f, - fno.fdate & 0x1f, - (fno.ftime >> 11) & 0x1f, - (fno.ftime >> 5) & 0x3f, - 2 * (fno.ftime & 0x1f) - ); +#if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_NONE + // On non-longint builds, the number of seconds since 1970 (epoch) is too + // large to fit in a smallint, so just return 31-DEC-1999 (0). + mp_obj_t seconds = MP_OBJ_NEW_SMALL_INT(946684800); +#else + mp_obj_t seconds = mp_obj_new_int_from_uint( + timeutils_seconds_since_epoch( + 1980 + ((fno.fdate >> 9) & 0x7f), + (fno.fdate >> 5) & 0x0f, + fno.fdate & 0x1f, + (fno.ftime >> 11) & 0x1f, + (fno.ftime >> 5) & 0x3f, + 2 * (fno.ftime & 0x1f) + )); +#endif t->items[0] = MP_OBJ_NEW_SMALL_INT(mode); // st_mode t->items[1] = MP_OBJ_NEW_SMALL_INT(0); // st_ino t->items[2] = MP_OBJ_NEW_SMALL_INT(0); // st_dev @@ -243,9 +367,9 @@ STATIC mp_obj_t fat_vfs_stat(mp_obj_t vfs_in, mp_obj_t path_in) { t->items[4] = MP_OBJ_NEW_SMALL_INT(0); // st_uid t->items[5] = MP_OBJ_NEW_SMALL_INT(0); // st_gid t->items[6] = mp_obj_new_int_from_uint(fno.fsize); // st_size - t->items[7] = MP_OBJ_NEW_SMALL_INT(seconds); // st_atime - t->items[8] = MP_OBJ_NEW_SMALL_INT(seconds); // st_mtime - t->items[9] = MP_OBJ_NEW_SMALL_INT(seconds); // st_ctime + t->items[7] = seconds; // st_atime + t->items[8] = seconds; // st_mtime + t->items[9] = seconds; // st_ctime return MP_OBJ_FROM_PTR(t); } @@ -291,10 +415,8 @@ STATIC mp_obj_t vfs_fat_mount(mp_obj_t self_in, mp_obj_t readonly, mp_obj_t mkfs self->writeblocks[0] = MP_OBJ_NULL; } - // mount the block device - FRESULT res = f_mount(&self->fatfs); - // check if we need to make the filesystem + FRESULT res = (self->flags & FSUSER_NO_FILESYSTEM) ? FR_NO_FILESYSTEM : FR_OK; if (res == FR_NO_FILESYSTEM && mp_obj_is_true(mkfs)) { uint8_t working_buf[_MAX_SS]; res = f_mkfs(&self->fatfs, FM_FAT | FM_SFD, 0, working_buf, sizeof(working_buf)); @@ -302,22 +424,57 @@ STATIC mp_obj_t vfs_fat_mount(mp_obj_t self_in, mp_obj_t readonly, mp_obj_t mkfs if (res != FR_OK) { mp_raise_OSError(fresult_to_errno_table[res]); } + self->flags &= ~FSUSER_NO_FILESYSTEM; return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_3(vfs_fat_mount_obj, vfs_fat_mount); STATIC mp_obj_t vfs_fat_umount(mp_obj_t self_in) { + (void)self_in; + // keep the FAT filesystem mounted internally so the VFS methods can still be used + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_umount_obj, vfs_fat_umount); + +#if MICROPY_FATFS_USE_LABEL +STATIC mp_obj_t vfs_fat_getlabel(mp_obj_t self_in) { fs_user_mount_t *self = MP_OBJ_TO_PTR(self_in); - FRESULT res = f_umount(&self->fatfs); + char working_buf[12]; + FRESULT res = f_getlabel(&self->fatfs, working_buf, NULL); if (res != FR_OK) { mp_raise_OSError(fresult_to_errno_table[res]); } + return mp_obj_new_str(working_buf, strlen(working_buf)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_getlabel_obj, vfs_fat_getlabel); + +STATIC mp_obj_t vfs_fat_setlabel(mp_obj_t self_in, mp_obj_t label_in) { + fs_user_mount_t *self = MP_OBJ_TO_PTR(self_in); + verify_fs_writable(self); + const char *label_str = mp_obj_str_get_str(label_in); + FRESULT res = f_setlabel(&self->fatfs, label_str); + if (res != FR_OK) { + if(res == FR_WRITE_PROTECTED) { + mp_raise_msg(&mp_type_OSError, translate("Read-only filesystem")); + } + mp_raise_OSError(fresult_to_errno_table[res]); + } return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(fat_vfs_umount_obj, vfs_fat_umount); +STATIC MP_DEFINE_CONST_FUN_OBJ_2(fat_vfs_setlabel_obj, vfs_fat_setlabel); +STATIC const mp_obj_property_t fat_vfs_label_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&fat_vfs_getlabel_obj, + (mp_obj_t)&fat_vfs_setlabel_obj, + (mp_obj_t)&mp_const_none_obj}, +}; +#endif STATIC const mp_rom_map_elem_t fat_vfs_locals_dict_table[] = { + #if _FS_REENTRANT + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&fat_vfs_del_obj) }, + #endif { MP_ROM_QSTR(MP_QSTR_mkfs), MP_ROM_PTR(&fat_vfs_mkfs_obj) }, { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&fat_vfs_open_obj) }, { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&fat_vfs_ilistdir_obj) }, @@ -331,14 +488,24 @@ STATIC const mp_rom_map_elem_t fat_vfs_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&fat_vfs_statvfs_obj) }, { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&vfs_fat_mount_obj) }, { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&fat_vfs_umount_obj) }, +#if MICROPY_FATFS_USE_LABEL + { MP_ROM_QSTR(MP_QSTR_label), MP_ROM_PTR(&fat_vfs_label_obj) }, +#endif }; STATIC MP_DEFINE_CONST_DICT(fat_vfs_locals_dict, fat_vfs_locals_dict_table); +STATIC const mp_vfs_proto_t fat_vfs_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_vfs) + .import_stat = fat_vfs_import_stat, +}; + const mp_obj_type_t mp_fat_vfs_type = { { &mp_type_type }, .name = MP_QSTR_VfsFat, .make_new = fat_vfs_make_new, + .protocol = &fat_vfs_proto, .locals_dict = (mp_obj_dict_t*)&fat_vfs_locals_dict, + }; #endif // MICROPY_VFS_FAT diff --git a/extmod/vfs_fat.h b/extmod/vfs_fat.h index 273ddc84eb6ed..08b03d0d18628 100644 --- a/extmod/vfs_fat.h +++ b/extmod/vfs_fat.h @@ -35,8 +35,11 @@ #define FSUSER_NATIVE (0x0001) // readblocks[2]/writeblocks[2] contain native func #define FSUSER_FREE_OBJ (0x0002) // fs_user_mount_t obj should be freed on umount #define FSUSER_HAVE_IOCTL (0x0004) // new protocol with ioctl +#define FSUSER_NO_FILESYSTEM (0x0008) // the block device has no filesystem on it // Device is writable over USB and read-only to MicroPython. -#define FSUSER_USB_WRITABLE (0x0008) +#define FSUSER_USB_WRITABLE (0x0010) +// Bit set when the above flag is checked before opening a file for write. +#define FSUSER_CONCURRENT_WRITE_PROTECTED (0x0020) typedef struct _fs_user_mount_t { mp_obj_base_t base; @@ -54,12 +57,19 @@ typedef struct _fs_user_mount_t { FATFS fatfs; } fs_user_mount_t; +typedef struct _pyb_file_obj_t { + mp_obj_base_t base; + FIL fp; +} pyb_file_obj_t; + extern const byte fresult_to_errno_table[20]; extern const mp_obj_type_t mp_fat_vfs_type; +extern const mp_obj_type_t mp_type_vfs_fat_fileio; +extern const mp_obj_type_t mp_type_vfs_fat_textio; + +mp_import_stat_t fat_vfs_import_stat(void *vfs, const char *path); -mp_import_stat_t fat_vfs_import_stat(struct _fs_user_mount_t *vfs, const char *path); -mp_obj_t fatfs_builtin_open_self(mp_obj_t self_in, mp_obj_t path, mp_obj_t mode); -MP_DECLARE_CONST_FUN_OBJ_KW(mp_builtin_open_obj); +MP_DECLARE_CONST_FUN_OBJ_3(fat_vfs_open_obj); mp_obj_t fat_vfs_ilistdir2(struct _fs_user_mount_t *vfs, const char *path, bool is_str_type); diff --git a/extmod/vfs_fat_diskio.c b/extmod/vfs_fat_diskio.c index 3b9d86037e5be..0e442d8fa96c9 100644 --- a/extmod/vfs_fat_diskio.c +++ b/extmod/vfs_fat_diskio.c @@ -36,6 +36,8 @@ #include "py/mphal.h" #include "py/runtime.h" +#include "py/binary.h" +#include "py/objarray.h" #include "lib/oofatfs/ff.h" #include "lib/oofatfs/diskio.h" #include "extmod/vfs_fat.h" @@ -51,62 +53,6 @@ STATIC fs_user_mount_t *disk_get_device(void *bdev) { return (fs_user_mount_t*)bdev; } -/*-----------------------------------------------------------------------*/ -/* Initialize a Drive */ -/*-----------------------------------------------------------------------*/ - -STATIC -DSTATUS disk_initialize ( - bdev_t pdrv /* Physical drive nmuber (0..) */ -) -{ - fs_user_mount_t *vfs = disk_get_device(pdrv); - if (vfs == NULL) { - return STA_NOINIT; - } - - if (vfs->flags & FSUSER_HAVE_IOCTL) { - // new protocol with ioctl; call ioctl(INIT, 0) - vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(BP_IOCTL_INIT); - vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused - mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); - if (ret != mp_const_none && MP_OBJ_SMALL_INT_VALUE(ret) != 0) { - // error initialising - return STA_NOINIT; - } - } - - if (vfs->writeblocks[0] == MP_OBJ_NULL) { - return STA_PROTECT; - } else { - return 0; - } -} - -/*-----------------------------------------------------------------------*/ -/* Get Disk Status */ -/*-----------------------------------------------------------------------*/ - -STATIC -DSTATUS disk_status ( - bdev_t pdrv /* Physical drive nmuber (0..) */ -) -{ - fs_user_mount_t *vfs = disk_get_device(pdrv); - if (vfs == NULL) { - return STA_NOINIT; - } - - // This is used to determine the writeability of the disk from MicroPython. - // So, if its USB writable we make it read-only from MicroPython. - if (vfs->writeblocks[0] == MP_OBJ_NULL || - (vfs->flags & FSUSER_USB_WRITABLE) != 0) { - return STA_PROTECT; - } else { - return 0; - } -} - /*-----------------------------------------------------------------------*/ /* Read Sector(s) */ /*-----------------------------------------------------------------------*/ @@ -129,10 +75,20 @@ DRESULT disk_read ( return RES_ERROR; } } else { + mp_obj_array_t ar = {{&mp_type_bytearray}, BYTEARRAY_TYPECODE, 0, count * SECSIZE(&vfs->fatfs), buff}; vfs->readblocks[2] = MP_OBJ_NEW_SMALL_INT(sector); - vfs->readblocks[3] = mp_obj_new_bytearray_by_ref(count * SECSIZE(&vfs->fatfs), buff); - mp_call_method_n_kw(2, 0, vfs->readblocks); - // TODO handle error return + vfs->readblocks[3] = MP_OBJ_FROM_PTR(&ar); + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->readblocks); + nlr_pop(); + if (ret != mp_const_none && MP_OBJ_SMALL_INT_VALUE(ret) != 0) { + return RES_ERROR; + } + } else { + // Exception thrown by readblocks or something it calls. + return RES_ERROR; + } } return RES_OK; @@ -165,10 +121,20 @@ DRESULT disk_write ( return RES_ERROR; } } else { + mp_obj_array_t ar = {{&mp_type_bytearray}, BYTEARRAY_TYPECODE, 0, count * SECSIZE(&vfs->fatfs), (void*)buff}; vfs->writeblocks[2] = MP_OBJ_NEW_SMALL_INT(sector); - vfs->writeblocks[3] = mp_obj_new_bytearray_by_ref(count * SECSIZE(&vfs->fatfs), (void*)buff); - mp_call_method_n_kw(2, 0, vfs->writeblocks); - // TODO handle error return + vfs->writeblocks[3] = MP_OBJ_FROM_PTR(&ar); + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->writeblocks); + nlr_pop(); + if (ret != mp_const_none && MP_OBJ_SMALL_INT_VALUE(ret) != 0) { + return RES_ERROR; + } + } else { + // Exception thrown by writeblocks or something it calls. + return RES_ERROR; + } } return RES_OK; @@ -190,54 +156,21 @@ DRESULT disk_ioctl ( return RES_PARERR; } + // First part: call the relevant method of the underlying block device + mp_obj_t ret = mp_const_none; if (vfs->flags & FSUSER_HAVE_IOCTL) { // new protocol with ioctl - switch (cmd) { - case CTRL_SYNC: - vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(BP_IOCTL_SYNC); - vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused - mp_call_method_n_kw(2, 0, vfs->u.ioctl); - return RES_OK; - - case GET_SECTOR_COUNT: { - vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(BP_IOCTL_SEC_COUNT); - vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused - mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); - *((DWORD*)buff) = mp_obj_get_int(ret); - return RES_OK; - } - - case GET_SECTOR_SIZE: { - vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(BP_IOCTL_SEC_SIZE); - vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused - mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); - if (ret == mp_const_none) { - // Default sector size - *((WORD*)buff) = 512; - } else { - *((WORD*)buff) = mp_obj_get_int(ret); - } - #if _MAX_SS != _MIN_SS - // need to store ssize because we use it in disk_read/disk_write - vfs->fatfs.ssize = *((WORD*)buff); - #endif - return RES_OK; - } - - case GET_BLOCK_SIZE: - *((DWORD*)buff) = 1; // erase block size in units of sector size - return RES_OK; - - case IOCTL_INIT: - *((DSTATUS*)buff) = disk_initialize(pdrv); - return RES_OK; - - case IOCTL_STATUS: - *((DSTATUS*)buff) = disk_status(pdrv); - return RES_OK; - - default: - return RES_PARERR; + static const uint8_t op_map[8] = { + [CTRL_SYNC] = BP_IOCTL_SYNC, + [GET_SECTOR_COUNT] = BP_IOCTL_SEC_COUNT, + [GET_SECTOR_SIZE] = BP_IOCTL_SEC_SIZE, + [IOCTL_INIT] = BP_IOCTL_INIT, + }; + uint8_t bp_op = op_map[cmd & 7]; + if (bp_op != 0) { + vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(bp_op); + vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused + ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); } } else { // old protocol with sync and count @@ -246,37 +179,67 @@ DRESULT disk_ioctl ( if (vfs->u.old.sync[0] != MP_OBJ_NULL) { mp_call_method_n_kw(0, 0, vfs->u.old.sync); } - return RES_OK; + break; - case GET_SECTOR_COUNT: { - mp_obj_t ret = mp_call_method_n_kw(0, 0, vfs->u.old.count); - *((DWORD*)buff) = mp_obj_get_int(ret); - return RES_OK; - } + case GET_SECTOR_COUNT: + ret = mp_call_method_n_kw(0, 0, vfs->u.old.count); + break; case GET_SECTOR_SIZE: - *((WORD*)buff) = 512; // old protocol had fixed sector size - #if _MAX_SS != _MIN_SS - // need to store ssize because we use it in disk_read/disk_write - vfs->fatfs.ssize = 512; - #endif - return RES_OK; - - case GET_BLOCK_SIZE: - *((DWORD*)buff) = 1; // erase block size in units of sector size - return RES_OK; + // old protocol has fixed sector size of 512 bytes + break; case IOCTL_INIT: - *((DSTATUS*)buff) = disk_initialize(pdrv); - return RES_OK; + // old protocol doesn't have init + break; + } + } - case IOCTL_STATUS: - *((DSTATUS*)buff) = disk_status(pdrv); - return RES_OK; + // Second part: convert the result for return + switch (cmd) { + case CTRL_SYNC: + return RES_OK; - default: - return RES_PARERR; + case GET_SECTOR_COUNT: { + *((DWORD*)buff) = mp_obj_get_int(ret); + return RES_OK; } + + case GET_SECTOR_SIZE: { + if (ret == mp_const_none) { + // Default sector size + *((WORD*)buff) = 512; + } else { + *((WORD*)buff) = mp_obj_get_int(ret); + } + #if _MAX_SS != _MIN_SS + // need to store ssize because we use it in disk_read/disk_write + vfs->fatfs.ssize = *((WORD*)buff); + #endif + return RES_OK; + } + + case GET_BLOCK_SIZE: + *((DWORD*)buff) = 1; // erase block size in units of sector size + return RES_OK; + + case IOCTL_INIT: + case IOCTL_STATUS: { + DSTATUS stat; + if (ret != mp_const_none && MP_OBJ_SMALL_INT_VALUE(ret) != 0) { + // error initialising + stat = STA_NOINIT; + } else if (vfs->writeblocks[0] == MP_OBJ_NULL) { + stat = STA_PROTECT; + } else { + stat = 0; + } + *((DSTATUS*)buff) = stat; + return RES_OK; + } + + default: + return RES_PARERR; } } diff --git a/extmod/vfs_fat_file.c b/extmod/vfs_fat_file.c index be9c8c79213e5..422f057a855be 100644 --- a/extmod/vfs_fat_file.c +++ b/extmod/vfs_fat_file.c @@ -27,15 +27,15 @@ #include "py/mpconfig.h" #if MICROPY_VFS && MICROPY_VFS_FAT -#include "extmod/vfs_fat_file.h" - #include +#include #include "py/runtime.h" #include "py/stream.h" #include "py/mperrno.h" #include "lib/oofatfs/ff.h" #include "extmod/vfs_fat.h" +#include "supervisor/filesystem.h" // this table converts from FRESULT to POSIX errno const byte fresult_to_errno_table[20] = { @@ -94,22 +94,9 @@ STATIC mp_uint_t file_obj_write(mp_obj_t self_in, const void *buf, mp_uint_t siz } -STATIC mp_obj_t file_obj_close(mp_obj_t self_in) { - pyb_file_obj_t *self = MP_OBJ_TO_PTR(self_in); - // if fs==NULL then the file is closed and in that case this method is a no-op - if (self->fp.obj.fs != NULL) { - FRESULT res = f_close(&self->fp); - if (res != FR_OK) { - mp_raise_OSError(fresult_to_errno_table[res]); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(file_obj_close_obj, file_obj_close); - STATIC mp_obj_t file_obj___exit__(size_t n_args, const mp_obj_t *args) { (void)n_args; - return file_obj_close(args[0]); + return mp_stream_close(args[0]); } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(file_obj___exit___obj, 4, 4, file_obj___exit__); @@ -144,6 +131,17 @@ STATIC mp_uint_t file_obj_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, } return 0; + } else if (request == MP_STREAM_CLOSE) { + // if fs==NULL then the file is closed and in that case this method is a no-op + if (self->fp.obj.fs != NULL) { + FRESULT res = f_close(&self->fp); + if (res != FR_OK) { + *errcode = fresult_to_errno_table[res]; + return MP_STREAM_ERROR; + } + } + return 0; + } else { *errcode = MP_EINVAL; return MP_STREAM_ERROR; @@ -182,24 +180,44 @@ STATIC mp_obj_t file_open(fs_user_mount_t *vfs, const mp_obj_type_t *type, mp_ar break; #if MICROPY_PY_IO_FILEIO case 'b': - type = &mp_type_fileio; + type = &mp_type_vfs_fat_fileio; break; #endif case 't': - type = &mp_type_textio; + type = &mp_type_vfs_fat_textio; break; } } + assert(vfs != NULL); + if ((mode & FA_WRITE) != 0 && !filesystem_is_writable_by_python(vfs)) { + mp_raise_OSError(MP_EROFS); + } pyb_file_obj_t *o = m_new_obj_with_finaliser(pyb_file_obj_t); o->base.type = type; const char *fname = mp_obj_str_get_str(args[0].u_obj); - assert(vfs != NULL); FRESULT res = f_open(&vfs->fatfs, &o->fp, fname, mode); if (res != FR_OK) { m_del_obj(pyb_file_obj_t, o); - mp_raise_OSError(fresult_to_errno_table[res]); + mp_raise_OSError_errno_str(fresult_to_errno_table[res], args[0].u_obj); + } + // If we're reading, turn on fast seek. + if (mode == FA_READ) { + // one call to determine how much space we need. + DWORD temp_table[2]; + temp_table[0] = 2; + o->fp.cltbl = temp_table; + f_lseek(&o->fp, CREATE_LINKMAP); + DWORD size = (temp_table[0] + 1) * 2; + o->fp.cltbl = m_malloc_maybe(size * sizeof(DWORD), false); + if (o->fp.cltbl != NULL) { + o->fp.cltbl[0] = size; + res = f_lseek(&o->fp, CREATE_LINKMAP); + if (res != FR_OK) { + o->fp.cltbl = NULL; + } + } } // for 'a' mode, we must begin at the end of the file @@ -210,9 +228,9 @@ STATIC mp_obj_t file_open(fs_user_mount_t *vfs, const mp_obj_type_t *type, mp_ar return MP_OBJ_FROM_PTR(o); } -STATIC mp_obj_t file_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t file_obj_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_arg_val_t arg_vals[FILE_OPEN_NUM_ARGS]; - mp_arg_parse_all_kw_array(n_args, n_kw, args, FILE_OPEN_NUM_ARGS, file_open_args, arg_vals); + mp_arg_parse_all(n_args, args, kw_args, FILE_OPEN_NUM_ARGS, file_open_args, arg_vals); return file_open(NULL, type, arg_vals); } @@ -225,10 +243,10 @@ STATIC const mp_rom_map_elem_t rawfile_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_readlines), MP_ROM_PTR(&mp_stream_unbuffered_readlines_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&file_obj_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, { MP_ROM_QSTR(MP_QSTR_seek), MP_ROM_PTR(&mp_stream_seek_obj) }, { MP_ROM_QSTR(MP_QSTR_tell), MP_ROM_PTR(&mp_stream_tell_obj) }, - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&file_obj_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&file_obj___exit___obj) }, }; @@ -237,12 +255,13 @@ STATIC MP_DEFINE_CONST_DICT(rawfile_locals_dict, rawfile_locals_dict_table); #if MICROPY_PY_IO_FILEIO STATIC const mp_stream_p_t fileio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = file_obj_read, .write = file_obj_write, .ioctl = file_obj_ioctl, }; -const mp_obj_type_t mp_type_fileio = { +const mp_obj_type_t mp_type_vfs_fat_fileio = { { &mp_type_type }, .name = MP_QSTR_FileIO, .print = file_obj_print, @@ -255,13 +274,14 @@ const mp_obj_type_t mp_type_fileio = { #endif STATIC const mp_stream_p_t textio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = file_obj_read, .write = file_obj_write, .ioctl = file_obj_ioctl, .is_text = true, }; -const mp_obj_type_t mp_type_textio = { +const mp_obj_type_t mp_type_vfs_fat_textio = { { &mp_type_type }, .name = MP_QSTR_TextIOWrapper, .print = file_obj_print, @@ -273,14 +293,15 @@ const mp_obj_type_t mp_type_textio = { }; // Factory function for I/O stream classes -mp_obj_t fatfs_builtin_open_self(mp_obj_t self_in, mp_obj_t path, mp_obj_t mode) { +STATIC mp_obj_t fatfs_builtin_open_self(mp_obj_t self_in, mp_obj_t path, mp_obj_t mode) { // TODO: analyze buffering args and instantiate appropriate type fs_user_mount_t *self = MP_OBJ_TO_PTR(self_in); mp_arg_val_t arg_vals[FILE_OPEN_NUM_ARGS]; arg_vals[0].u_obj = path; arg_vals[1].u_obj = mode; arg_vals[2].u_obj = mp_const_none; - return file_open(self, &mp_type_textio, arg_vals); + return file_open(self, &mp_type_vfs_fat_textio, arg_vals); } +MP_DEFINE_CONST_FUN_OBJ_3(fat_vfs_open_obj, fatfs_builtin_open_self); #endif // MICROPY_VFS && MICROPY_VFS_FAT diff --git a/extmod/vfs_fat_file.h b/extmod/vfs_fat_file.h deleted file mode 100644 index 11e4b7aa8ad4e..0000000000000 --- a/extmod/vfs_fat_file.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_EXTMOD_VFS_FAT_FILE_H -#define MICROPY_INCLUDED_EXTMOD_VFS_FAT_FILE_H - -#include "py/mpconfig.h" - -#if MICROPY_VFS && MICROPY_VFS_FAT - -#include "lib/oofatfs/ff.h" -#include "py/obj.h" - -#define mp_type_fileio fatfs_type_fileio -#define mp_type_textio fatfs_type_textio - -extern const mp_obj_type_t mp_type_fileio; -extern const mp_obj_type_t mp_type_textio; - -typedef struct _pyb_file_obj_t { - mp_obj_base_t base; - FIL fp; -} pyb_file_obj_t; - -#endif // MICROPY_VFS && MICROPY_VFS_FAT - -#endif // MICROPY_INCLUDED_EXTMOD_VFS_FAT_FILE_H diff --git a/extmod/vfs_fat_misc.c b/extmod/vfs_fat_misc.c deleted file mode 100644 index 9a26b4a2f91e3..0000000000000 --- a/extmod/vfs_fat_misc.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#if MICROPY_VFS_FAT - -#include -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs_fat.h" -#include "py/lexer.h" - -typedef struct _mp_vfs_fat_ilistdir_it_t { - mp_obj_base_t base; - mp_fun_1_t iternext; - bool is_str; - FF_DIR dir; -} mp_vfs_fat_ilistdir_it_t; - -STATIC mp_obj_t mp_vfs_fat_ilistdir_it_iternext(mp_obj_t self_in) { - mp_vfs_fat_ilistdir_it_t *self = MP_OBJ_TO_PTR(self_in); - - for (;;) { - FILINFO fno; - FRESULT res = f_readdir(&self->dir, &fno); - char *fn = fno.fname; - if (res != FR_OK || fn[0] == 0) { - // stop on error or end of dir - break; - } - - // Note that FatFS already filters . and .., so we don't need to - - // make 3-tuple with info about this entry - mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(3, NULL)); - if (self->is_str) { - t->items[0] = mp_obj_new_str(fn, strlen(fn), false); - } else { - t->items[0] = mp_obj_new_bytes((const byte*)fn, strlen(fn)); - } - if (fno.fattrib & AM_DIR) { - // dir - t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFDIR); - } else { - // file - t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFREG); - } - t->items[2] = MP_OBJ_NEW_SMALL_INT(0); // no inode number - - return MP_OBJ_FROM_PTR(t); - } - - // ignore error because we may be closing a second time - f_closedir(&self->dir); - - return MP_OBJ_STOP_ITERATION; -} - -mp_obj_t fat_vfs_ilistdir2(fs_user_mount_t *vfs, const char *path, bool is_str_type) { - mp_vfs_fat_ilistdir_it_t *iter = m_new_obj(mp_vfs_fat_ilistdir_it_t); - iter->base.type = &mp_type_polymorph_iter; - iter->iternext = mp_vfs_fat_ilistdir_it_iternext; - iter->is_str = is_str_type; - FRESULT res = f_opendir(&vfs->fatfs, &iter->dir, path); - if (res != FR_OK) { - mp_raise_OSError(fresult_to_errno_table[res]); - } - return MP_OBJ_FROM_PTR(iter); -} - -mp_import_stat_t fat_vfs_import_stat(fs_user_mount_t *vfs, const char *path) { - FILINFO fno; - assert(vfs != NULL); - FRESULT res = f_stat(&vfs->fatfs, path, &fno); - if (res == FR_OK) { - if ((fno.fattrib & AM_DIR) != 0) { - return MP_IMPORT_STAT_DIR; - } else { - return MP_IMPORT_STAT_FILE; - } - } - return MP_IMPORT_STAT_NO_EXIST; -} - -#endif // MICROPY_VFS_FAT diff --git a/extmod/vfs_posix.c b/extmod/vfs_posix.c new file mode 100644 index 0000000000000..56a5de303d535 --- /dev/null +++ b/extmod/vfs_posix.c @@ -0,0 +1,365 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "py/mperrno.h" +#include "extmod/vfs.h" +#include "extmod/vfs_posix.h" + +#if defined(MICROPY_VFS_POSIX) && MICROPY_VFS_POSIX + +#include +#include +#include +#include + +typedef struct _mp_obj_vfs_posix_t { + mp_obj_base_t base; + vstr_t root; + size_t root_len; + bool readonly; +} mp_obj_vfs_posix_t; + +STATIC const char *vfs_posix_get_path_str(mp_obj_vfs_posix_t *self, mp_obj_t path) { + if (self->root_len == 0) { + return mp_obj_str_get_str(path); + } else { + self->root.len = self->root_len; + vstr_add_str(&self->root, mp_obj_str_get_str(path)); + return vstr_null_terminated_str(&self->root); + } +} + +STATIC mp_obj_t vfs_posix_get_path_obj(mp_obj_vfs_posix_t *self, mp_obj_t path) { + if (self->root_len == 0) { + return path; + } else { + self->root.len = self->root_len; + vstr_add_str(&self->root, mp_obj_str_get_str(path)); + return mp_obj_new_str(self->root.buf, self->root.len); + } +} + +STATIC mp_obj_t vfs_posix_fun1_helper(mp_obj_t self_in, mp_obj_t path_in, int (*f)(const char*)) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + int ret = f(vfs_posix_get_path_str(self, path_in)); + if (ret != 0) { + mp_raise_OSError(errno); + } + return mp_const_none; +} + +STATIC mp_import_stat_t mp_vfs_posix_import_stat(void *self_in, const char *path) { + mp_obj_vfs_posix_t *self = self_in; + if (self->root_len != 0) { + self->root.len = self->root_len; + vstr_add_str(&self->root, path); + path = vstr_null_terminated_str(&self->root); + } + struct stat st; + if (stat(path, &st) == 0) { + if (S_ISDIR(st.st_mode)) { + return MP_IMPORT_STAT_DIR; + } else if (S_ISREG(st.st_mode)) { + return MP_IMPORT_STAT_FILE; + } + } + return MP_IMPORT_STAT_NO_EXIST; +} + +STATIC mp_obj_t vfs_posix_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 1, false); + + mp_obj_vfs_posix_t *vfs = m_new_obj(mp_obj_vfs_posix_t); + vfs->base.type = type; + vstr_init(&vfs->root, 0); + if (n_args == 1) { + vstr_add_str(&vfs->root, mp_obj_str_get_str(args[0])); + vstr_add_char(&vfs->root, '/'); + } + vfs->root_len = vfs->root.len; + vfs->readonly = false; + + return MP_OBJ_FROM_PTR(vfs); +} + +STATIC mp_obj_t vfs_posix_mount(mp_obj_t self_in, mp_obj_t readonly, mp_obj_t mkfs) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + if (mp_obj_is_true(readonly)) { + self->readonly = true; + } + if (mp_obj_is_true(mkfs)) { + mp_raise_OSError(MP_EPERM); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vfs_posix_mount_obj, vfs_posix_mount); + +STATIC mp_obj_t vfs_posix_umount(mp_obj_t self_in) { + (void)self_in; + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(vfs_posix_umount_obj, vfs_posix_umount); + +STATIC mp_obj_t vfs_posix_open(mp_obj_t self_in, mp_obj_t path_in, mp_obj_t mode_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + const char *mode = mp_obj_str_get_str(mode_in); + if (self->readonly + && (strchr(mode, 'w') != NULL || strchr(mode, 'a') != NULL || strchr(mode, '+') != NULL)) { + mp_raise_OSError(MP_EROFS); + } + if (!MP_OBJ_IS_SMALL_INT(path_in)) { + path_in = vfs_posix_get_path_obj(self, path_in); + } + return mp_vfs_posix_file_open(&mp_type_textio, path_in, mode_in); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vfs_posix_open_obj, vfs_posix_open); + +STATIC mp_obj_t vfs_posix_chdir(mp_obj_t self_in, mp_obj_t path_in) { + return vfs_posix_fun1_helper(self_in, path_in, chdir); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_chdir_obj, vfs_posix_chdir); + +STATIC mp_obj_t vfs_posix_getcwd(mp_obj_t self_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + char buf[MICROPY_ALLOC_PATH_MAX + 1]; + const char *ret = getcwd(buf, sizeof(buf)); + if (ret == NULL) { + mp_raise_OSError(errno); + } + ret += self->root_len; + return mp_obj_new_str(ret, strlen(ret)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(vfs_posix_getcwd_obj, vfs_posix_getcwd); + +typedef struct _vfs_posix_ilistdir_it_t { + mp_obj_base_t base; + mp_fun_1_t iternext; + bool is_str; + DIR *dir; +} vfs_posix_ilistdir_it_t; + +STATIC mp_obj_t vfs_posix_ilistdir_it_iternext(mp_obj_t self_in) { + vfs_posix_ilistdir_it_t *self = MP_OBJ_TO_PTR(self_in); + + if (self->dir == NULL) { + return MP_OBJ_STOP_ITERATION; + } + + for (;;) { + struct dirent *dirent = readdir(self->dir); + if (dirent == NULL) { + closedir(self->dir); + self->dir = NULL; + return MP_OBJ_STOP_ITERATION; + } + const char *fn = dirent->d_name; + + if (fn[0] == '.' && (fn[1] == 0 || fn[1] == '.')) { + // skip . and .. + continue; + } + + // make 3-tuple with info about this entry + mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(3, NULL)); + + if (self->is_str) { + t->items[0] = mp_obj_new_str(fn, strlen(fn)); + } else { + t->items[0] = mp_obj_new_bytes((const byte*)fn, strlen(fn)); + } + + #ifdef _DIRENT_HAVE_D_TYPE + if (dirent->d_type == DT_DIR) { + t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFDIR); + } else if (dirent->d_type == DT_REG) { + t->items[1] = MP_OBJ_NEW_SMALL_INT(MP_S_IFREG); + } else { + t->items[1] = MP_OBJ_NEW_SMALL_INT(dirent->d_type); + } + #else + // DT_UNKNOWN should have 0 value on any reasonable system + t->items[1] = MP_OBJ_NEW_SMALL_INT(0); + #endif + #ifdef _DIRENT_HAVE_D_INO + t->items[2] = MP_OBJ_NEW_SMALL_INT(dirent->d_ino); + #else + t->items[2] = MP_OBJ_NEW_SMALL_INT(0); + #endif + + return MP_OBJ_FROM_PTR(t); + } +} + +STATIC mp_obj_t vfs_posix_ilistdir(mp_obj_t self_in, mp_obj_t path_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + vfs_posix_ilistdir_it_t *iter = m_new_obj(vfs_posix_ilistdir_it_t); + iter->base.type = &mp_type_polymorph_iter; + iter->iternext = vfs_posix_ilistdir_it_iternext; + iter->is_str = mp_obj_get_type(path_in) == &mp_type_str; + const char *path = vfs_posix_get_path_str(self, path_in); + iter->dir = opendir(path); + if (iter->dir == NULL) { + mp_raise_OSError(errno); + } + return MP_OBJ_FROM_PTR(iter); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_ilistdir_obj, vfs_posix_ilistdir); + +typedef struct _mp_obj_listdir_t { + mp_obj_base_t base; + mp_fun_1_t iternext; + DIR *dir; +} mp_obj_listdir_t; + +STATIC mp_obj_t vfs_posix_mkdir(mp_obj_t self_in, mp_obj_t path_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + int ret = mkdir(vfs_posix_get_path_str(self, path_in), 0777); + if (ret != 0) { + mp_raise_OSError(errno); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_mkdir_obj, vfs_posix_mkdir); + +STATIC mp_obj_t vfs_posix_remove(mp_obj_t self_in, mp_obj_t path_in) { + return vfs_posix_fun1_helper(self_in, path_in, unlink); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_remove_obj, vfs_posix_remove); + +STATIC mp_obj_t vfs_posix_rename(mp_obj_t self_in, mp_obj_t old_path_in, mp_obj_t new_path_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + const char *old_path = vfs_posix_get_path_str(self, old_path_in); + const char *new_path = vfs_posix_get_path_str(self, new_path_in); + int ret = rename(old_path, new_path); + if (ret != 0) { + mp_raise_OSError(errno); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vfs_posix_rename_obj, vfs_posix_rename); + +STATIC mp_obj_t vfs_posix_rmdir(mp_obj_t self_in, mp_obj_t path_in) { + return vfs_posix_fun1_helper(self_in, path_in, rmdir); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_rmdir_obj, vfs_posix_rmdir); + +STATIC mp_obj_t vfs_posix_stat(mp_obj_t self_in, mp_obj_t path_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + struct stat sb; + int ret = stat(vfs_posix_get_path_str(self, path_in), &sb); + if (ret != 0) { + mp_raise_OSError(errno); + } + mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(10, NULL)); + t->items[0] = MP_OBJ_NEW_SMALL_INT(sb.st_mode); + t->items[1] = MP_OBJ_NEW_SMALL_INT(sb.st_ino); + t->items[2] = MP_OBJ_NEW_SMALL_INT(sb.st_dev); + t->items[3] = MP_OBJ_NEW_SMALL_INT(sb.st_nlink); + t->items[4] = MP_OBJ_NEW_SMALL_INT(sb.st_uid); + t->items[5] = MP_OBJ_NEW_SMALL_INT(sb.st_gid); + t->items[6] = MP_OBJ_NEW_SMALL_INT(sb.st_size); + t->items[7] = MP_OBJ_NEW_SMALL_INT(sb.st_atime); + t->items[8] = MP_OBJ_NEW_SMALL_INT(sb.st_mtime); + t->items[9] = MP_OBJ_NEW_SMALL_INT(sb.st_ctime); + return MP_OBJ_FROM_PTR(t); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_stat_obj, vfs_posix_stat); + +#ifdef __ANDROID__ +#define USE_STATFS 1 +#endif + +#if USE_STATFS +#include +#define STRUCT_STATVFS struct statfs +#define STATVFS statfs +#define F_FAVAIL sb.f_ffree +#define F_NAMEMAX sb.f_namelen +#define F_FLAG sb.f_flags +#else +#include +#define STRUCT_STATVFS struct statvfs +#define STATVFS statvfs +#define F_FAVAIL sb.f_favail +#define F_NAMEMAX sb.f_namemax +#define F_FLAG sb.f_flag +#endif + +STATIC mp_obj_t vfs_posix_statvfs(mp_obj_t self_in, mp_obj_t path_in) { + mp_obj_vfs_posix_t *self = MP_OBJ_TO_PTR(self_in); + STRUCT_STATVFS sb; + const char *path = vfs_posix_get_path_str(self, path_in); + int ret = STATVFS(path, &sb); + if (ret != 0) { + mp_raise_OSError(errno); + } + mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(10, NULL)); + t->items[0] = MP_OBJ_NEW_SMALL_INT(sb.f_bsize); + t->items[1] = MP_OBJ_NEW_SMALL_INT(sb.f_frsize); + t->items[2] = MP_OBJ_NEW_SMALL_INT(sb.f_blocks); + t->items[3] = MP_OBJ_NEW_SMALL_INT(sb.f_bfree); + t->items[4] = MP_OBJ_NEW_SMALL_INT(sb.f_bavail); + t->items[5] = MP_OBJ_NEW_SMALL_INT(sb.f_files); + t->items[6] = MP_OBJ_NEW_SMALL_INT(sb.f_ffree); + t->items[7] = MP_OBJ_NEW_SMALL_INT(F_FAVAIL); + t->items[8] = MP_OBJ_NEW_SMALL_INT(F_FLAG); + t->items[9] = MP_OBJ_NEW_SMALL_INT(F_NAMEMAX); + return MP_OBJ_FROM_PTR(t); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vfs_posix_statvfs_obj, vfs_posix_statvfs); + +STATIC const mp_rom_map_elem_t vfs_posix_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&vfs_posix_mount_obj) }, + { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&vfs_posix_umount_obj) }, + { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&vfs_posix_open_obj) }, + + { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&vfs_posix_chdir_obj) }, + { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&vfs_posix_getcwd_obj) }, + { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&vfs_posix_ilistdir_obj) }, + { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&vfs_posix_mkdir_obj) }, + { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&vfs_posix_remove_obj) }, + { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&vfs_posix_rename_obj) }, + { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&vfs_posix_rmdir_obj) }, + { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&vfs_posix_stat_obj) }, + { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&vfs_posix_statvfs_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(vfs_posix_locals_dict, vfs_posix_locals_dict_table); + +STATIC const mp_vfs_proto_t vfs_posix_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_vfs) + .import_stat = mp_vfs_posix_import_stat, +}; + +const mp_obj_type_t mp_type_vfs_posix = { + { &mp_type_type }, + .name = MP_QSTR_VfsPosix, + .make_new = vfs_posix_make_new, + .protocol = &vfs_posix_proto, + .locals_dict = (mp_obj_dict_t*)&vfs_posix_locals_dict, +}; + +#endif // MICROPY_VFS_POSIX diff --git a/extmod/vfs_posix.h b/extmod/vfs_posix.h new file mode 100644 index 0000000000000..32299b8269f07 --- /dev/null +++ b/extmod/vfs_posix.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_EXTMOD_VFS_POSIX_H +#define MICROPY_INCLUDED_EXTMOD_VFS_POSIX_H + +#include "py/lexer.h" +#include "py/mpconfig.h" +#include "py/obj.h" + +extern const mp_obj_type_t mp_type_vfs_posix; +extern const mp_obj_type_t mp_type_vfs_posix_fileio; +extern const mp_obj_type_t mp_type_vfs_posix_textio; + +mp_obj_t mp_vfs_posix_file_open(const mp_obj_type_t *type, mp_obj_t file_in, mp_obj_t mode_in); + +#endif // MICROPY_INCLUDED_EXTMOD_VFS_POSIX_H diff --git a/extmod/vfs_posix_file.c b/extmod/vfs_posix_file.c new file mode 100644 index 0000000000000..be455fa2818ab --- /dev/null +++ b/extmod/vfs_posix_file.c @@ -0,0 +1,264 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013-2018 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "py/stream.h" +#include "extmod/vfs_posix.h" +#include "supervisor/shared/translate.h" + +#if defined(MICROPY_VFS_POSIX) && MICROPY_VFS_POSIX + +#include + +#ifdef _WIN32 +#define fsync _commit +#endif + +typedef struct _mp_obj_vfs_posix_file_t { + mp_obj_base_t base; + int fd; +} mp_obj_vfs_posix_file_t; + +#ifdef MICROPY_CPYTHON_COMPAT +STATIC void check_fd_is_open(const mp_obj_vfs_posix_file_t *o) { + if (o->fd < 0) { + nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, translate("I/O operation on closed file"))); + } +} +#else +#define check_fd_is_open(o) +#endif + +STATIC void vfs_posix_file_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + (void)kind; + mp_obj_vfs_posix_file_t *self = MP_OBJ_TO_PTR(self_in); + mp_printf(print, "", mp_obj_get_type_str(self_in), self->fd); +} + +mp_obj_t mp_vfs_posix_file_open(const mp_obj_type_t *type, mp_obj_t file_in, mp_obj_t mode_in) { + mp_obj_vfs_posix_file_t *o = m_new_obj(mp_obj_vfs_posix_file_t); + const char *mode_s = mp_obj_str_get_str(mode_in); + + int mode_rw = 0, mode_x = 0; + while (*mode_s) { + switch (*mode_s++) { + case 'r': + mode_rw = O_RDONLY; + break; + case 'w': + mode_rw = O_WRONLY; + mode_x = O_CREAT | O_TRUNC; + break; + case 'a': + mode_rw = O_WRONLY; + mode_x = O_CREAT | O_APPEND; + break; + case '+': + mode_rw = O_RDWR; + break; + #if MICROPY_PY_IO_FILEIO + // If we don't have io.FileIO, then files are in text mode implicitly + case 'b': + type = &mp_type_vfs_posix_fileio; + break; + case 't': + type = &mp_type_vfs_posix_textio; + break; + #endif + } + } + + o->base.type = type; + + mp_obj_t fid = file_in; + + if (MP_OBJ_IS_SMALL_INT(fid)) { + o->fd = MP_OBJ_SMALL_INT_VALUE(fid); + return MP_OBJ_FROM_PTR(o); + } + + const char *fname = mp_obj_str_get_str(fid); + int fd = open(fname, mode_x | mode_rw, 0644); + if (fd == -1) { + mp_raise_OSError(errno); + } + o->fd = fd; + return MP_OBJ_FROM_PTR(o); +} + +STATIC mp_obj_t vfs_posix_file_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + static const mp_arg_t allowed_args[] = { + { MP_QSTR_file, MP_ARG_OBJ | MP_ARG_REQUIRED, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} }, + { MP_QSTR_mode, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_QSTR(MP_QSTR_r)} }, + }; + + mp_arg_val_t arg_vals[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, arg_vals); + return mp_vfs_posix_file_open(type, arg_vals[0].u_obj, arg_vals[1].u_obj); +} + +STATIC mp_obj_t vfs_posix_file_fileno(mp_obj_t self_in) { + mp_obj_vfs_posix_file_t *self = MP_OBJ_TO_PTR(self_in); + check_fd_is_open(self); + return MP_OBJ_NEW_SMALL_INT(self->fd); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(vfs_posix_file_fileno_obj, vfs_posix_file_fileno); + +STATIC mp_obj_t vfs_posix_file___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + return mp_stream_close(args[0]); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(vfs_posix_file___exit___obj, 4, 4, vfs_posix_file___exit__); + +STATIC mp_uint_t vfs_posix_file_read(mp_obj_t o_in, void *buf, mp_uint_t size, int *errcode) { + mp_obj_vfs_posix_file_t *o = MP_OBJ_TO_PTR(o_in); + check_fd_is_open(o); + mp_int_t r = read(o->fd, buf, size); + if (r == -1) { + *errcode = errno; + return MP_STREAM_ERROR; + } + return r; +} + +STATIC mp_uint_t vfs_posix_file_write(mp_obj_t o_in, const void *buf, mp_uint_t size, int *errcode) { + mp_obj_vfs_posix_file_t *o = MP_OBJ_TO_PTR(o_in); + check_fd_is_open(o); + #if MICROPY_PY_OS_DUPTERM + if (o->fd <= STDERR_FILENO) { + mp_hal_stdout_tx_strn(buf, size); + return size; + } + #endif + mp_int_t r = write(o->fd, buf, size); + while (r == -1 && errno == EINTR) { + if (MP_STATE_VM(mp_pending_exception) != MP_OBJ_NULL) { + mp_obj_t obj = MP_STATE_VM(mp_pending_exception); + MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; + nlr_raise(obj); + } + r = write(o->fd, buf, size); + } + if (r == -1) { + *errcode = errno; + return MP_STREAM_ERROR; + } + return r; +} + +STATIC mp_uint_t vfs_posix_file_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_vfs_posix_file_t *o = MP_OBJ_TO_PTR(o_in); + check_fd_is_open(o); + switch (request) { + case MP_STREAM_FLUSH: + if (fsync(o->fd) < 0) { + *errcode = errno; + return MP_STREAM_ERROR; + } + return 0; + case MP_STREAM_SEEK: { + struct mp_stream_seek_t *s = (struct mp_stream_seek_t*)arg; + off_t off = lseek(o->fd, s->offset, s->whence); + if (off == (off_t)-1) { + *errcode = errno; + return MP_STREAM_ERROR; + } + s->offset = off; + return 0; + } + case MP_STREAM_CLOSE: + close(o->fd); + #ifdef MICROPY_CPYTHON_COMPAT + o->fd = -1; + #endif + return 0; + default: + *errcode = EINVAL; + return MP_STREAM_ERROR; + } +} + +STATIC const mp_rom_map_elem_t rawfile_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_fileno), MP_ROM_PTR(&vfs_posix_file_fileno_obj) }, + { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, + { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, + { MP_ROM_QSTR(MP_QSTR_readlines), MP_ROM_PTR(&mp_stream_unbuffered_readlines_obj) }, + { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, + { MP_ROM_QSTR(MP_QSTR_seek), MP_ROM_PTR(&mp_stream_seek_obj) }, + { MP_ROM_QSTR(MP_QSTR_tell), MP_ROM_PTR(&mp_stream_tell_obj) }, + { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&vfs_posix_file___exit___obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(rawfile_locals_dict, rawfile_locals_dict_table); + +#if MICROPY_PY_IO_FILEIO +STATIC const mp_stream_p_t fileio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = vfs_posix_file_read, + .write = vfs_posix_file_write, + .ioctl = vfs_posix_file_ioctl, +}; + +const mp_obj_type_t mp_type_vfs_posix_fileio = { + { &mp_type_type }, + .name = MP_QSTR_FileIO, + .print = vfs_posix_file_print, + .make_new = vfs_posix_file_make_new, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &fileio_stream_p, + .locals_dict = (mp_obj_dict_t*)&rawfile_locals_dict, +}; +#endif + +STATIC const mp_stream_p_t textio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = vfs_posix_file_read, + .write = vfs_posix_file_write, + .ioctl = vfs_posix_file_ioctl, + .is_text = true, +}; + +const mp_obj_type_t mp_type_vfs_posix_textio = { + { &mp_type_type }, + .name = MP_QSTR_TextIOWrapper, + .print = vfs_posix_file_print, + .make_new = vfs_posix_file_make_new, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &textio_stream_p, + .locals_dict = (mp_obj_dict_t*)&rawfile_locals_dict, +}; + +const mp_obj_vfs_posix_file_t mp_sys_stdin_obj = {{&mp_type_textio}, STDIN_FILENO}; +const mp_obj_vfs_posix_file_t mp_sys_stdout_obj = {{&mp_type_textio}, STDOUT_FILENO}; +const mp_obj_vfs_posix_file_t mp_sys_stderr_obj = {{&mp_type_textio}, STDERR_FILENO}; + +#endif // MICROPY_VFS_POSIX diff --git a/extmod/vfs_reader.c b/extmod/vfs_reader.c index 891098aa1e6fd..e1ee45a3c7439 100644 --- a/extmod/vfs_reader.c +++ b/extmod/vfs_reader.c @@ -71,7 +71,7 @@ STATIC void mp_reader_vfs_close(void *data) { void mp_reader_new_file(mp_reader_t *reader, const char *filename) { mp_reader_vfs_t *rf = m_new_obj(mp_reader_vfs_t); - mp_obj_t arg = mp_obj_new_str(filename, strlen(filename), false); + mp_obj_t arg = mp_obj_new_str(filename, strlen(filename)); rf->file = mp_vfs_open(1, &arg, (mp_map_t*)&mp_const_empty_map); int errcode; rf->len = mp_stream_rw(rf->file, rf->buf, sizeof(rf->buf), &errcode, MP_STREAM_RW_READ | MP_STREAM_RW_ONCE); diff --git a/extmod/virtpin.c b/extmod/virtpin.c index dbfa21d669a72..559f992650914 100644 --- a/extmod/virtpin.c +++ b/extmod/virtpin.c @@ -25,15 +25,16 @@ */ #include "extmod/virtpin.h" +#include "py/proto.h" int mp_virtual_pin_read(mp_obj_t pin) { mp_obj_base_t* s = (mp_obj_base_t*)MP_OBJ_TO_PTR(pin); - mp_pin_p_t *pin_p = (mp_pin_p_t*)s->type->protocol; + const mp_pin_p_t *pin_p = mp_proto_get(MP_QSTR_protocol_pin, s); return pin_p->ioctl(pin, MP_PIN_READ, 0, NULL); } void mp_virtual_pin_write(mp_obj_t pin, int value) { mp_obj_base_t* s = (mp_obj_base_t*)MP_OBJ_TO_PTR(pin); - mp_pin_p_t *pin_p = (mp_pin_p_t*)s->type->protocol; + const mp_pin_p_t *pin_p = mp_proto_get(MP_QSTR_protocol_pin, s); pin_p->ioctl(pin, MP_PIN_WRITE, value, NULL); } diff --git a/extmod/virtpin.h b/extmod/virtpin.h index 706affc192701..591249e48d670 100644 --- a/extmod/virtpin.h +++ b/extmod/virtpin.h @@ -27,6 +27,7 @@ #define MICROPY_INCLUDED_EXTMOD_VIRTPIN_H #include "py/obj.h" +#include "py/proto.h" #define MP_PIN_READ (1) #define MP_PIN_WRITE (2) @@ -35,6 +36,7 @@ // Pin protocol typedef struct _mp_pin_p_t { + MP_PROTOCOL_HEAD mp_uint_t (*ioctl)(mp_obj_t obj, mp_uint_t request, uintptr_t arg, int *errcode); } mp_pin_p_t; diff --git a/frozen/Adafruit_CircuitPython_BusDevice b/frozen/Adafruit_CircuitPython_BusDevice index 39f28ed4e0e5a..0b0d1e999a6c7 160000 --- a/frozen/Adafruit_CircuitPython_BusDevice +++ b/frozen/Adafruit_CircuitPython_BusDevice @@ -1 +1 @@ -Subproject commit 39f28ed4e0e5a06fc33fd01c1efc8c52c4140f03 +Subproject commit 0b0d1e999a6c7944e55bed59a30ccc21b3c96666 diff --git a/frozen/Adafruit_CircuitPython_CircuitPlayground b/frozen/Adafruit_CircuitPython_CircuitPlayground new file mode 160000 index 0000000000000..2cf0f40ab818f --- /dev/null +++ b/frozen/Adafruit_CircuitPython_CircuitPlayground @@ -0,0 +1 @@ +Subproject commit 2cf0f40ab818fddbc2cecf3ec495ed16067c5f7e diff --git a/frozen/Adafruit_CircuitPython_Crickit b/frozen/Adafruit_CircuitPython_Crickit new file mode 160000 index 0000000000000..09bd10e94894a --- /dev/null +++ b/frozen/Adafruit_CircuitPython_Crickit @@ -0,0 +1 @@ +Subproject commit 09bd10e94894a4eec7e3a02b51ffb5d8581b3024 diff --git a/frozen/Adafruit_CircuitPython_DotStar b/frozen/Adafruit_CircuitPython_DotStar new file mode 160000 index 0000000000000..84eadeafa9144 --- /dev/null +++ b/frozen/Adafruit_CircuitPython_DotStar @@ -0,0 +1 @@ +Subproject commit 84eadeafa9144829b8c6faf903b4282d58a77353 diff --git a/frozen/Adafruit_CircuitPython_ESP32SPI b/frozen/Adafruit_CircuitPython_ESP32SPI new file mode 160000 index 0000000000000..f523b2316bc3e --- /dev/null +++ b/frozen/Adafruit_CircuitPython_ESP32SPI @@ -0,0 +1 @@ +Subproject commit f523b2316bc3e25220b88c5435868c6a5880dfab diff --git a/frozen/Adafruit_CircuitPython_HID b/frozen/Adafruit_CircuitPython_HID new file mode 160000 index 0000000000000..f044548d6d3aa --- /dev/null +++ b/frozen/Adafruit_CircuitPython_HID @@ -0,0 +1 @@ +Subproject commit f044548d6d3aa21650b50232bb16e0b29f540b8f diff --git a/frozen/Adafruit_CircuitPython_IRRemote b/frozen/Adafruit_CircuitPython_IRRemote new file mode 160000 index 0000000000000..9dac9628e4867 --- /dev/null +++ b/frozen/Adafruit_CircuitPython_IRRemote @@ -0,0 +1 @@ +Subproject commit 9dac9628e48675308d447b70b2005f7d1f0ddf6b diff --git a/frozen/Adafruit_CircuitPython_LIS3DH b/frozen/Adafruit_CircuitPython_LIS3DH index fa00b61d1bde9..42a55eafcb29f 160000 --- a/frozen/Adafruit_CircuitPython_LIS3DH +++ b/frozen/Adafruit_CircuitPython_LIS3DH @@ -1 +1 @@ -Subproject commit fa00b61d1bde90c3cf9cce74388cb9717058b2be +Subproject commit 42a55eafcb29f563b31e23af902c31dac8289900 diff --git a/frozen/Adafruit_CircuitPython_Motor b/frozen/Adafruit_CircuitPython_Motor new file mode 160000 index 0000000000000..ddcd1e7154f1b --- /dev/null +++ b/frozen/Adafruit_CircuitPython_Motor @@ -0,0 +1 @@ +Subproject commit ddcd1e7154f1b27f9a87daffb6e691e1e7051b64 diff --git a/frozen/Adafruit_CircuitPython_NeoPixel b/frozen/Adafruit_CircuitPython_NeoPixel index 1142f1c7fdc23..10db851c81873 160000 --- a/frozen/Adafruit_CircuitPython_NeoPixel +++ b/frozen/Adafruit_CircuitPython_NeoPixel @@ -1 +1 @@ -Subproject commit 1142f1c7fdc232a46d74dd4f1946a5f462ae2555 +Subproject commit 10db851c81873fd8db207ff0c4d9342426ee25a4 diff --git a/frozen/Adafruit_CircuitPython_Register b/frozen/Adafruit_CircuitPython_Register new file mode 160000 index 0000000000000..c525eedeb0d20 --- /dev/null +++ b/frozen/Adafruit_CircuitPython_Register @@ -0,0 +1 @@ +Subproject commit c525eedeb0d20c9829febfbf621eab707da71f8a diff --git a/frozen/Adafruit_CircuitPython_Requests b/frozen/Adafruit_CircuitPython_Requests new file mode 160000 index 0000000000000..e8a759719e94c --- /dev/null +++ b/frozen/Adafruit_CircuitPython_Requests @@ -0,0 +1 @@ +Subproject commit e8a759719e94c69a01f9e07d418ca6db39114db3 diff --git a/frozen/Adafruit_CircuitPython_SD b/frozen/Adafruit_CircuitPython_SD new file mode 160000 index 0000000000000..efd548b1e36c5 --- /dev/null +++ b/frozen/Adafruit_CircuitPython_SD @@ -0,0 +1 @@ +Subproject commit efd548b1e36c534bbce494f4cb0d9a625dd170cd diff --git a/frozen/Adafruit_CircuitPython_Thermistor b/frozen/Adafruit_CircuitPython_Thermistor index 2d57c0ba9a09d..ac83a3dc703ec 160000 --- a/frozen/Adafruit_CircuitPython_Thermistor +++ b/frozen/Adafruit_CircuitPython_Thermistor @@ -1 +1 @@ -Subproject commit 2d57c0ba9a09d6d30f0ae2b98aba9567c25e6fb6 +Subproject commit ac83a3dc703ec50b2236c773d22c47a0c0aaba43 diff --git a/frozen/Adafruit_CircuitPython_seesaw b/frozen/Adafruit_CircuitPython_seesaw new file mode 160000 index 0000000000000..dc01285aa45dd --- /dev/null +++ b/frozen/Adafruit_CircuitPython_seesaw @@ -0,0 +1 @@ +Subproject commit dc01285aa45dd8260bb3ae35a657e4cdcbf325b8 diff --git a/frozen/circuitpython-stage b/frozen/circuitpython-stage new file mode 160000 index 0000000000000..19a66d79f0650 --- /dev/null +++ b/frozen/circuitpython-stage @@ -0,0 +1 @@ +Subproject commit 19a66d79f0650a15e502464b42e16692365eab36 diff --git a/frozen/pew-pewpew-standalone-10.x b/frozen/pew-pewpew-standalone-10.x new file mode 160000 index 0000000000000..87755e088150c --- /dev/null +++ b/frozen/pew-pewpew-standalone-10.x @@ -0,0 +1 @@ +Subproject commit 87755e088150cc9bce42f4104cbd74d91b923c6f diff --git a/lib/axtls b/lib/axtls index dac9176cac58c..43a6e6bd3bbc0 160000 --- a/lib/axtls +++ b/lib/axtls @@ -1 +1 @@ -Subproject commit dac9176cac58cc5e49669a9a4d404a6f6dd7cc10 +Subproject commit 43a6e6bd3bbc03dc501e16b89fba0ef042ed3ea0 diff --git a/lib/embed/abort_.c b/lib/embed/abort_.c index 2fba0de4eafb8..3eeb42d9e48ba 100644 --- a/lib/embed/abort_.c +++ b/lib/embed/abort_.c @@ -1,7 +1,9 @@ #include +#include "supervisor/shared/translate.h" + NORETURN void abort_(void); NORETURN void abort_(void) { - mp_raise_msg(&mp_type_RuntimeError, "abort() called"); + mp_raise_msg(&mp_type_RuntimeError, translate("abort() called")); } diff --git a/lib/libm/erf_lgamma.c b/lib/libm/erf_lgamma.c index 877816a0c213d..fcb1d0a0c6712 100644 --- a/lib/libm/erf_lgamma.c +++ b/lib/libm/erf_lgamma.c @@ -24,6 +24,7 @@ */ #include "fdlibm.h" +#pragma GCC diagnostic ignored "-Wfloat-equal" #define __ieee754_logf logf diff --git a/lib/libm/log1pf.c b/lib/libm/log1pf.c index 0d32b0a2fe143..89ed250b08ecc 100644 --- a/lib/libm/log1pf.c +++ b/lib/libm/log1pf.c @@ -18,6 +18,8 @@ #include "libm.h" +#pragma GCC diagnostic ignored "-Wfloat-equal" + static const float ln2_hi = 6.9313812256e-01, /* 0x3f317180 */ ln2_lo = 9.0580006145e-06, /* 0x3717f7d1 */ diff --git a/lib/libm/math.c b/lib/libm/math.c index 39c6a68a5e942..0e53563bcb857 100644 --- a/lib/libm/math.c +++ b/lib/libm/math.c @@ -50,6 +50,9 @@ float copysignf(float x, float y) { static const float _M_LN10 = 2.30258509299404; // 0x40135d8e float log10f(float x) { return logf(x) / (float)_M_LN10; } +#undef _M_LN2 +static const float _M_LN2 = 0.6931472; +float log2f(float x) { return logf(x) / (float)_M_LN2; } float tanhf(float x) { if (isinf(x)) { diff --git a/lib/libm_dbl/pow.c b/lib/libm_dbl/pow.c index 3ddc1b6ff8ebf..4aef8a5b3e01f 100644 --- a/lib/libm_dbl/pow.c +++ b/lib/libm_dbl/pow.c @@ -125,13 +125,13 @@ double pow(double x, double y) else if (iy >= 0x3ff00000) { k = (iy>>20) - 0x3ff; /* exponent */ if (k > 20) { - uint32_t j = ly>>(52-k); - if ((j<<(52-k)) == ly) - yisint = 2 - (j&1); + uint32_t j2 = ly>>(52-k); + if ((j2<<(52-k)) == ly) + yisint = 2 - (j2&1); } else if (ly == 0) { - uint32_t j = iy>>(20-k); - if ((j<<(20-k)) == iy) - yisint = 2 - (j&1); + uint32_t j2 = iy>>(20-k); + if ((j2<<(20-k)) == (uint32_t)iy) + yisint = 2 - (j2&1); } } } diff --git a/lib/lwip b/lib/lwip deleted file mode 160000 index 5b8b5d459e7dd..0000000000000 --- a/lib/lwip +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 5b8b5d459e7dd890724515bbfad86c705234f9ec diff --git a/lib/mp-readline/readline.c b/lib/mp-readline/readline.c index 9d254d8cfebe7..0edaebbfae154 100644 --- a/lib/mp-readline/readline.c +++ b/lib/mp-readline/readline.c @@ -206,7 +206,7 @@ int readline_process_char(int c) { redraw_step_forward = compl_len; } #endif - } else if (32 <= c && c <= 126) { + } else if (32 <= c ) { // printable character vstr_ins_char(rl.line, rl.cursor_pos, c); // set redraw parameters diff --git a/lib/mp3 b/lib/mp3 new file mode 160000 index 0000000000000..c3c664bf4db6a --- /dev/null +++ b/lib/mp3 @@ -0,0 +1 @@ +Subproject commit c3c664bf4db6a36d11808dfcbb5dbf7cff1715b8 diff --git a/lib/netutils/netutils.c b/lib/netutils/netutils.c index 06c3ff9b08070..03418d7e663fe 100644 --- a/lib/netutils/netutils.c +++ b/lib/netutils/netutils.c @@ -31,6 +31,7 @@ #include "py/runtime.h" #include "lib/netutils/netutils.h" +#include "supervisor/shared/translate.h" // Takes an array with a raw IPv4 address and returns something like '192.168.0.1'. mp_obj_t netutils_format_ipv4_addr(uint8_t *ip, netutils_endian_t endian) { @@ -41,7 +42,7 @@ mp_obj_t netutils_format_ipv4_addr(uint8_t *ip, netutils_endian_t endian) { } else { ip_len = snprintf(ip_str, 16, "%u.%u.%u.%u", ip[0], ip[1], ip[2], ip[3]); } - return mp_obj_new_str(ip_str, ip_len, false); + return mp_obj_new_str(ip_str, ip_len); } // Takes an array with a raw IP address, and a port, and returns a net-address @@ -79,7 +80,7 @@ void netutils_parse_ipv4_addr(mp_obj_t addr_in, uint8_t *out_ip, netutils_endian } else if (i > 0 && s < s_top && *s == '.') { s++; } else { - mp_raise_ValueError("invalid arguments"); + mp_raise_ValueError(translate("invalid arguments")); } } } diff --git a/lib/nrfutil b/lib/nrfutil index d48561b073861..9e7dfb28a5c6f 160000 --- a/lib/nrfutil +++ b/lib/nrfutil @@ -1 +1 @@ -Subproject commit d48561b07386132b849d0125b0ff6a532d833d8b +Subproject commit 9e7dfb28a5c6f3d7a19340971b32e0c2b4128ecf diff --git a/lib/oofatfs/ff.c b/lib/oofatfs/ff.c index b0984756bf7fa..e961c789d81a1 100644 --- a/lib/oofatfs/ff.c +++ b/lib/oofatfs/ff.c @@ -3382,7 +3382,7 @@ FRESULT f_read ( if (!sect) ABORT(fs, FR_INT_ERR); sect += csect; cc = btr / SS(fs); /* When remaining bytes >= sector size, */ - if (cc) { /* Read maximum contiguous sectors directly */ + if (cc) {/* Read maximum contiguous sectors directly */ if (csect + cc > fs->csize) { /* Clip at cluster boundary */ cc = fs->csize - csect; } diff --git a/lib/oofatfs/ffconf.h b/lib/oofatfs/ffconf.h index 315101f0e4a9d..214311b4c2206 100644 --- a/lib/oofatfs/ffconf.h +++ b/lib/oofatfs/ffconf.h @@ -74,7 +74,7 @@ /* This option switches f_mkfs() function. (0:Disable or 1:Enable) */ -#define _USE_FASTSEEK 0 +#define _USE_FASTSEEK 1 /* This option switches fast seek function. (0:Disable or 1:Enable) */ diff --git a/lib/stm32lib b/lib/stm32lib deleted file mode 160000 index d2bcfda543d3b..0000000000000 --- a/lib/stm32lib +++ /dev/null @@ -1 +0,0 @@ -Subproject commit d2bcfda543d3b99361e44112aca929225bdcc07f diff --git a/lib/timeutils/timeutils.c b/lib/timeutils/timeutils.c index eb3dc80d4b525..b93a85dee9f68 100644 --- a/lib/timeutils/timeutils.c +++ b/lib/timeutils/timeutils.c @@ -158,6 +158,17 @@ mp_uint_t timeutils_seconds_since_2000(mp_uint_t year, mp_uint_t month, + (year - 2000) * 31536000; } +void timeutils_seconds_since_epoch_to_struct_time(mp_uint_t t, timeutils_struct_time_t *tm) { + t -= EPOCH1970_EPOCH2000_DIFF_SECS; + timeutils_seconds_since_2000_to_struct_time(t, tm); +} + +mp_uint_t timeutils_seconds_since_epoch(mp_uint_t year, mp_uint_t month, mp_uint_t date, + mp_uint_t hour, mp_uint_t minute, mp_uint_t second) { + mp_uint_t t = timeutils_seconds_since_2000(year, month, date, hour, minute, second); + return t + EPOCH1970_EPOCH2000_DIFF_SECS; +} + mp_uint_t timeutils_mktime(mp_uint_t year, mp_int_t month, mp_int_t mday, mp_int_t hours, mp_int_t minutes, mp_int_t seconds) { @@ -211,5 +222,5 @@ mp_uint_t timeutils_mktime(mp_uint_t year, mp_int_t month, mp_int_t mday, year++; } } - return timeutils_seconds_since_2000(year, month, mday, hours, minutes, seconds); + return timeutils_seconds_since_epoch(year, month, mday, hours, minutes, seconds); } diff --git a/lib/timeutils/timeutils.h b/lib/timeutils/timeutils.h index 9b1abeb8f3d36..0ca6bb1679e0c 100644 --- a/lib/timeutils/timeutils.h +++ b/lib/timeutils/timeutils.h @@ -27,6 +27,8 @@ #ifndef MICROPY_INCLUDED_LIB_TIMEUTILS_TIMEUTILS_H #define MICROPY_INCLUDED_LIB_TIMEUTILS_TIMEUTILS_H +#define EPOCH1970_EPOCH2000_DIFF_SECS 946684800 + typedef struct _timeutils_struct_time_t { uint16_t tm_year; // i.e. 2014 uint8_t tm_mon; // 1..12 @@ -48,6 +50,11 @@ void timeutils_seconds_since_2000_to_struct_time(mp_uint_t t, mp_uint_t timeutils_seconds_since_2000(mp_uint_t year, mp_uint_t month, mp_uint_t date, mp_uint_t hour, mp_uint_t minute, mp_uint_t second); +void timeutils_seconds_since_epoch_to_struct_time(mp_uint_t t, timeutils_struct_time_t *tm); + +mp_uint_t timeutils_seconds_since_epoch(mp_uint_t year, mp_uint_t month, mp_uint_t date, + mp_uint_t hour, mp_uint_t minute, mp_uint_t second); + mp_uint_t timeutils_mktime(mp_uint_t year, mp_int_t month, mp_int_t mday, mp_int_t hours, mp_int_t minutes, mp_int_t seconds); diff --git a/tools/tinytest/README b/lib/tinytest/README similarity index 100% rename from tools/tinytest/README rename to lib/tinytest/README diff --git a/tools/tinytest/tinytest.c b/lib/tinytest/tinytest.c similarity index 98% rename from tools/tinytest/tinytest.c rename to lib/tinytest/tinytest.c index 1ef957d31bdb4..01772f3f8ef6e 100644 --- a/tools/tinytest/tinytest.c +++ b/lib/tinytest/tinytest.c @@ -234,8 +234,9 @@ testcase_run_one(const struct testgroup_t *group, return SKIP; } + printf("# starting %s%s\n", group->prefix, testcase->name); if (opt_verbosity>0 && !opt_forked) { - printf("%s%s: ", group->prefix, testcase->name); + //printf("%s%s: ", group->prefix, testcase->name); } else { if (opt_verbosity==0) printf("."); cur_test_prefix = group->prefix; @@ -252,6 +253,7 @@ testcase_run_one(const struct testgroup_t *group, outcome = testcase_run_bare_(testcase); } + printf("%s%s: ", group->prefix, testcase->name); if (outcome == OK) { ++n_ok; if (opt_verbosity>0 && !opt_forked) @@ -263,7 +265,8 @@ testcase_run_one(const struct testgroup_t *group, } else { ++n_bad; if (!opt_forked) - printf("\n [%s FAILED]\n", testcase->name); + //printf("\n [%s FAILED]\n", testcase->name); + puts("FAILED"); } if (opt_forked) { diff --git a/tools/tinytest/tinytest.h b/lib/tinytest/tinytest.h similarity index 100% rename from tools/tinytest/tinytest.h rename to lib/tinytest/tinytest.h diff --git a/tools/tinytest/tinytest_macros.h b/lib/tinytest/tinytest_macros.h similarity index 100% rename from tools/tinytest/tinytest_macros.h rename to lib/tinytest/tinytest_macros.h diff --git a/lib/tinyusb b/lib/tinyusb new file mode 160000 index 0000000000000..1f95f439e11f5 --- /dev/null +++ b/lib/tinyusb @@ -0,0 +1 @@ +Subproject commit 1f95f439e11f519e69d75a4a8b7b9f28eaf5060e diff --git a/lib/upytesthelper/upytesthelper.c b/lib/upytesthelper/upytesthelper.c new file mode 100644 index 0000000000000..d28c5b9cc0490 --- /dev/null +++ b/lib/upytesthelper/upytesthelper.c @@ -0,0 +1,126 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Linaro Limited + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include + +#include "py/mphal.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "py/compile.h" +#include "upytesthelper.h" + +static const char *test_exp_output; +static int test_exp_output_len, test_rem_output_len; +static int test_failed; +static void *heap_start, *heap_end; + +void upytest_set_heap(void *start, void *end) { + heap_start = start; + heap_end = end; +} + +void upytest_set_expected_output(const char *output, unsigned len) { + test_exp_output = output; + test_exp_output_len = test_rem_output_len = len; + test_failed = false; +} + +bool upytest_is_failed(void) { + if (test_failed) { + return true; + } + #if 0 + if (test_rem_output_len != 0) { + printf("remaining len: %d\n", test_rem_output_len); + } + #endif + return test_rem_output_len != 0; +} + +// MP_PLAT_PRINT_STRN() should be redirected to this function. +// It will pass-thru any content to mp_hal_stdout_tx_strn_cooked() +// (the dfault value of MP_PLAT_PRINT_STRN), but will also match +// it to the expected output as set by upytest_set_expected_output(). +// If mismatch happens, upytest_is_failed() returns true. +void upytest_output(const char *str, mp_uint_t len) { + if (!test_failed) { + if (len > test_rem_output_len) { + test_failed = true; + } else { + test_failed = memcmp(test_exp_output, str, len); + #if 0 + if (test_failed) { + printf("failed after char %u, within %d chars, res: %d\n", + test_exp_output_len - test_rem_output_len, (int)len, test_failed); + for (int i = 0; i < len; i++) { + if (str[i] != test_exp_output[i]) { + printf("%d %02x %02x\n", i, str[i], test_exp_output[i]); + } + } + } + #endif + test_exp_output += len; + test_rem_output_len -= len; + } + } + mp_hal_stdout_tx_strn_cooked(str, len); +} + +void upytest_execute_test(const char *src) { + // To provide clean room for each test, interpreter and heap are + // reinitialized before running each. + gc_init(heap_start, heap_end); + mp_init(); + mp_obj_list_init(mp_sys_path, 0); + mp_obj_list_init(mp_sys_argv, 0); + + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); + qstr source_name = lex->source_name; + mp_parse_tree_t parse_tree = mp_parse(lex, MP_PARSE_FILE_INPUT); + mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, false); + mp_call_function_0(module_fun); + nlr_pop(); + } else { + mp_obj_t exc = (mp_obj_t)nlr.ret_val; + if (mp_obj_is_subclass_fast(mp_obj_get_type(exc), &mp_type_SystemExit)) { + // Assume that sys.exit() is called to skip the test. + // TODO: That can be always true, we should set up convention to + // use specific exit code as skip indicator. + tinytest_set_test_skipped_(); + goto end; + } + mp_obj_print_exception(&mp_plat_print, exc); + tt_abort_msg("Uncaught exception\n"); + } + + if (upytest_is_failed()) { + tinytest_set_test_failed_(); + } + +end: + mp_deinit(); +} diff --git a/lib/upytesthelper/upytesthelper.h b/lib/upytesthelper/upytesthelper.h new file mode 100644 index 0000000000000..3a292befd7757 --- /dev/null +++ b/lib/upytesthelper/upytesthelper.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Linaro Limited + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include "py/mpconfig.h" +#include "lib/tinytest/tinytest.h" +#include "lib/tinytest/tinytest_macros.h" + +void upytest_set_heap(void *start, void *end); +void upytest_set_expected_output(const char *output, unsigned len); +void upytest_execute_test(const char *src); +void upytest_output(const char *str, mp_uint_t len); +bool upytest_is_failed(void); diff --git a/lib/utils/buffer_helper.c b/lib/utils/buffer_helper.c index f6eb8bf1e78dd..694952e3d2cc3 100644 --- a/lib/utils/buffer_helper.c +++ b/lib/utils/buffer_helper.c @@ -26,10 +26,10 @@ #include "lib/utils/buffer_helper.h" -void normalize_buffer_bounds(int32_t* start, int32_t end, uint32_t* length) { +void normalize_buffer_bounds(int32_t* start, int32_t end, size_t* length) { if (end < 0) { end += *length; - } else if (((uint32_t) end) > *length) { + } else if (((size_t) end) > *length) { end = *length; } if (*start < 0) { diff --git a/lib/utils/buffer_helper.h b/lib/utils/buffer_helper.h index 47042e7ef1d66..7487b9df533cd 100644 --- a/lib/utils/buffer_helper.h +++ b/lib/utils/buffer_helper.h @@ -28,7 +28,8 @@ #define MICROPY_INCLUDED_LIB_UTILS_BUFFER_HELPER_H #include +#include -void normalize_buffer_bounds(int32_t* start, int32_t end, uint32_t* length); +void normalize_buffer_bounds(int32_t* start, int32_t end, size_t* length); #endif // MICROPY_INCLUDED_LIB_UTILS_BUFFER_HELPER_H diff --git a/lib/utils/interrupt_char.c b/lib/utils/interrupt_char.c index fca0f95b5bf4a..da7f702544777 100644 --- a/lib/utils/interrupt_char.c +++ b/lib/utils/interrupt_char.c @@ -47,4 +47,9 @@ void mp_keyboard_interrupt(void) { #endif } +// Check to see if we've been CTRL-C'ed by autoreload or the user. +bool mp_hal_is_interrupted(void) { + return MP_STATE_VM(mp_pending_exception) != NULL; +} + #endif diff --git a/lib/utils/interrupt_char.h b/lib/utils/interrupt_char.h index ca50d4d567602..e0b1db529853e 100644 --- a/lib/utils/interrupt_char.h +++ b/lib/utils/interrupt_char.h @@ -26,8 +26,11 @@ #ifndef MICROPY_INCLUDED_LIB_UTILS_INTERRUPT_CHAR_H #define MICROPY_INCLUDED_LIB_UTILS_INTERRUPT_CHAR_H +#include + extern int mp_interrupt_char; void mp_hal_set_interrupt_char(int c); void mp_keyboard_interrupt(void); +bool mp_hal_is_interrupted(void); #endif // MICROPY_INCLUDED_LIB_UTILS_INTERRUPT_CHAR_H diff --git a/lib/utils/printf.c b/lib/utils/printf.c index e19da2dc0eeb7..3a4cc2549464d 100644 --- a/lib/utils/printf.c +++ b/lib/utils/printf.c @@ -103,9 +103,11 @@ STATIC void strn_print_strn(void *data, const char *str, size_t len) { strn_print_env->remain -= len; } -#if defined(__GNUC__) && !defined(__clang__) +#if defined(__GNUC__) && !defined(__clang__) && __GNUC__ < 9 // uClibc requires this alias to be defined, or there may be link errors // when linkings against it statically. +// GCC 9 gives a warning about missing attributes so it's excluded until +// uClibc+GCC9 support is needed. int __GI_vsnprintf(char *str, size_t size, const char *fmt, va_list ap) __attribute__((weak, alias ("vsnprintf"))); #endif diff --git a/lib/utils/pyexec.c b/lib/utils/pyexec.c old mode 100644 new mode 100755 index f96deb9e1ce11..c8e369e791f6e --- a/lib/utils/pyexec.c +++ b/lib/utils/pyexec.c @@ -33,9 +33,10 @@ #include "py/runtime.h" #include "py/repl.h" #include "py/gc.h" +#include "py/gc_long_lived.h" #include "py/frozenmod.h" #include "py/mphal.h" -#if defined(USE_DEVICE_MODE) +#if MICROPY_HW_ENABLE_USB #include "irq.h" #include "usb.h" #endif @@ -88,13 +89,25 @@ STATIC int parse_compile_execute(const void *source, mp_parse_input_kind_t input } // source is a lexer, parse and compile the script qstr source_name = lex->source_name; + if (input_kind == MP_PARSE_FILE_INPUT) { + mp_store_global(MP_QSTR___file__, MP_OBJ_NEW_QSTR(source_name)); + } mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, exec_flags & EXEC_FLAG_IS_REPL); + // Clear the parse tree because it has a heap pointer we don't need anymore. + *((uint32_t volatile*) &parse_tree.chunk) = 0; #else - mp_raise_msg(&mp_type_RuntimeError, "script compilation not supported"); + mp_raise_msg(&mp_type_RuntimeError, translate("script compilation not supported")); #endif } + // If the code was loaded from a file its likely to be running for a while so we'll long + // live it and collect any garbage before running. + if (input_kind == MP_PARSE_FILE_INPUT) { + module_fun = make_obj_long_lived(module_fun, 6); + gc_collect(); + } + // execute code mp_hal_set_interrupt_char(CHAR_CTRL_C); // allow ctrl-C to interrupt us start = mp_hal_ticks_ms(); @@ -118,7 +131,9 @@ STATIC int parse_compile_execute(const void *source, mp_parse_input_kind_t input // at the moment, the value of SystemExit is unused ret = pyexec_system_exit; } else { - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); + if ((mp_obj_t) nlr.ret_val != MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); + } ret = PYEXEC_EXCEPTION; } } @@ -421,7 +436,7 @@ int pyexec_friendly_repl(void) { for (;;) { input_restart: - #if defined(USE_DEVICE_MODE) + #if MICROPY_HW_ENABLE_USB if (usb_vcp_is_enabled()) { // If the user gets to here and interrupts are disabled then // they'll never see the prompt, traceback etc. The USB REPL needs diff --git a/lib/utils/pyexec.h b/lib/utils/pyexec.h index d3411f06af1bf..bde516c593b06 100644 --- a/lib/utils/pyexec.h +++ b/lib/utils/pyexec.h @@ -26,6 +26,8 @@ #ifndef MICROPY_INCLUDED_LIB_UTILS_PYEXEC_H #define MICROPY_INCLUDED_LIB_UTILS_PYEXEC_H +#include "py/obj.h" + typedef enum { PYEXEC_MODE_RAW_REPL, PYEXEC_MODE_FRIENDLY_REPL, diff --git a/lib/utils/stdout_helpers.c b/lib/utils/stdout_helpers.c index 3de11975719a8..4323e8a083bd0 100644 --- a/lib/utils/stdout_helpers.c +++ b/lib/utils/stdout_helpers.c @@ -12,11 +12,21 @@ // Send "cooked" string of given length, where every occurrence of // LF character is replaced with CR LF. void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - while (len--) { - if (*str == '\n') { + bool last_cr = false; + while (len > 0) { + size_t i = 0; + if (str[0] == '\n' && !last_cr) { mp_hal_stdout_tx_strn("\r", 1); + i = 1; } - mp_hal_stdout_tx_strn(str++, 1); + // Lump all characters on the next line together. + while((last_cr || str[i] != '\n') && i < len) { + last_cr = str[i] == '\r'; + i++; + } + mp_hal_stdout_tx_strn(str, i); + str = &str[i]; + len -= i; } } diff --git a/lib/utils/sys_stdio_mphal.c b/lib/utils/sys_stdio_mphal.c index fc8a74e7d6d57..c1607dfe8ce6f 100644 --- a/lib/utils/sys_stdio_mphal.c +++ b/lib/utils/sys_stdio_mphal.c @@ -53,12 +53,12 @@ STATIC const sys_stdio_obj_t stdio_buffer_obj; #endif void stdio_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - sys_stdio_obj_t *self = self_in; + sys_stdio_obj_t *self = MP_OBJ_TO_PTR(self_in); mp_printf(print, "", self->fd); } STATIC mp_uint_t stdio_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - sys_stdio_obj_t *self = self_in; + sys_stdio_obj_t *self = MP_OBJ_TO_PTR(self_in); if (self->fd == STDIO_FD_IN) { for (uint i = 0; i < size; i++) { int c = mp_hal_stdin_rx_chr(); @@ -75,7 +75,7 @@ STATIC mp_uint_t stdio_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *er } STATIC mp_uint_t stdio_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - sys_stdio_obj_t *self = self_in; + sys_stdio_obj_t *self = MP_OBJ_TO_PTR(self_in); if (self->fd == STDIO_FD_OUT || self->fd == STDIO_FD_ERR) { mp_hal_stdout_tx_strn_cooked(buf, size); return size; @@ -85,6 +85,19 @@ STATIC mp_uint_t stdio_write(mp_obj_t self_in, const void *buf, mp_uint_t size, } } +STATIC mp_uint_t stdio_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { + sys_stdio_obj_t *self = MP_OBJ_TO_PTR(self_in); + (void) self; + + // For now, pretend we actually flush the stdio stream. + if (request == MP_STREAM_FLUSH) { + return 0; + } else { + *errcode = MP_EINVAL; + return MP_STREAM_ERROR; + } +} + STATIC mp_obj_t stdio_obj___exit__(size_t n_args, const mp_obj_t *args) { return mp_const_none; } @@ -110,8 +123,10 @@ STATIC const mp_rom_map_elem_t stdio_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(stdio_locals_dict, stdio_locals_dict_table); STATIC const mp_stream_p_t stdio_obj_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stdio_read, .write = stdio_write, + .ioctl = stdio_ioctl, .is_text = true, }; @@ -144,6 +159,7 @@ STATIC mp_uint_t stdio_buffer_write(mp_obj_t self_in, const void *buf, mp_uint_t } STATIC const mp_stream_p_t stdio_buffer_obj_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stdio_buffer_read, .write = stdio_buffer_write, .is_text = false, diff --git a/lib/uzlib b/lib/uzlib new file mode 160000 index 0000000000000..f966da0fab121 --- /dev/null +++ b/lib/uzlib @@ -0,0 +1 @@ +Subproject commit f966da0fab121e910ea74f037f074538a2e6dbbb diff --git a/locale/ID.po b/locale/ID.po new file mode 100644 index 0000000000000..619f7e6b75380 --- /dev/null +++ b/locale/ID.po @@ -0,0 +1,3438 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +#, fuzzy +msgid "" +msgstr "" +"Project-Id-Version: PACKAGE VERSION\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" +"Last-Translator: FULL NAME \n" +"Language-Team: LANGUAGE \n" +"Language: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr "" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr "" + +#: main.c +msgid " output:\n" +msgstr "output:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "" + +#: py/obj.c +msgid "%q index out of range" +msgstr "" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "%q must be >= 1" +msgstr "buffers harus mempunyai panjang yang sama" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() mengambil posisi argumen %d tapi %d yang diberikan" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' argumen dibutuhkan" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' mengharapkan sebuah register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' mengharapkan sebuah register spesial" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' mengharapkan sebuah FPU register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' mengharapkan sebuah alamat dengan bentuk [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' mengharapkan integer" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' mengharapkan setidaknya r%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' mengharapkan {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' integer 0x%x tidak cukup didalam mask 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' membutuhkan 1 argumen" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' diluar fungsi" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' diluar loop" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' diluar loop" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' membutuhkan setidaknya 2 argumen" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' membutuhkan argumen integer" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' membutuhkan 1 argumen" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' diluar fungsi" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' diluar fungsi" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x harus menjadi target assignment" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Sebuah channel hardware interrupt sedang digunakan" + +#: shared-bindings/_bleio/Address.c +#, fuzzy, c-format +msgid "Address must be %d bytes long" +msgstr "buffers harus mempunyai panjang yang sama" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Semua perangkat I2C sedang digunakan" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Semua perangkat SPI sedang digunakan" + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "All UART peripherals are in use" +msgstr "Semua perangkat I2C sedang digunakan" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Semua channel event sedang digunakan" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Semua channel event yang disinkronisasi sedang digunakan" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Semua timer untuk pin ini sedang digunakan" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Semua timer sedang digunakan" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "fungsionalitas AnalogOut tidak didukung" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "pin yang dipakai tidak mendukung AnalogOut" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Send yang lain sudah aktif" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Auto-reload tidak aktif.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Auto-reload aktif. Silahkan simpan data-data (files) melalui USB untuk " +"menjalankannya atau masuk ke REPL untukmenonaktifkan.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Bit clock dan word harus memiliki kesamaan pada clock unit" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Kedua pin harus mendukung hardware interrut" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy, c-format +msgid "Bus pin %d is already in use" +msgstr "DAC sudah digunakan" + +#: shared-bindings/_bleio/UUID.c +#, fuzzy +msgid "Byte buffer must be 16 bytes." +msgstr "buffers harus mempunyai panjang yang sama" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Tidak bisa mendapatkan pull pada saat mode output" + +#: ports/nrf/common-hal/microcontroller/Processor.c +#, fuzzy +msgid "Cannot get temperature" +msgstr "Tidak bisa mendapatkan temperatur. status: 0x%02x" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" +"Tidak dapat menggunakan output di kedua channel dengan menggunakan pin yang " +"sama" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" +"Tidak dapat melakukan reset ke bootloader karena tidak ada bootloader yang " +"terisi" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "" + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "tidak dapat mendapatkan ukuran scalar secara tidak ambigu" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Clock unit sedang digunakan" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Tidak dapat menginisialisasi UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC sudah digunakan" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +#, fuzzy +msgid "Data too large for advertisement packet" +msgstr "Tidak bisa menyesuaikan data ke dalam paket advertisment" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Channel EXTINT sedang digunakan" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Error pada regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Gagal untuk mendapatkan mutex, status: 0x%08lX" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Gagal untuk mengalokasikan buffer RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Gagal untuk megalokasikan buffer RX dari %d byte" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Gagal untuk melepaskan mutex, status: 0x%08lX" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "operasi I/O pada file tertutup" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "operasi I2C tidak didukung" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "%q pada tidak valid" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Frekuensi PWM tidak valid" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Ukuran buffer tidak valid" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Pin tidak valid" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Pin untuk channel kiri tidak valid" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Pin untuk channel kanan tidak valid" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Pin-pin tidak valid" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "LHS dari keyword arg harus menjadi sebuah id" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Tidak ada DAC (Digital Analog Converter) di dalam chip" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "tidak ada channel DMA ditemukan" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Tidak pin RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Tidak ada pin TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Tidak ada standar bus %q" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Tidak ada GCLK yang kosong" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Tidak ada dukungan hardware untuk pin" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "Not connected" +msgstr "Tidak dapat menyambungkan ke AP" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Parity ganjil tidak didukung" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Hanya 8 atau 16 bit mono dengan " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Pin tidak mempunya kemampuan untuk ADC (Analog Digital Converter)" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "Tambahkan module apapun pada filesystem\n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" +"Tekan tombol apa saja untuk masuk ke dalam REPL. Gunakan CTRL+D untuk reset " +"(Reload)" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "sistem file (filesystem) bersifat Read-only" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "sistem file (filesystem) bersifat Read-only" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Channel Kanan tidak didukung" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Berjalan di mode aman(safe mode)! Auto-reload tidak aktif.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "" +"Berjalan di mode aman(safe mode)! tidak menjalankan kode yang tersimpan.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA atau SCL membutuhkan pull up" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Nilai sampel terlalu tinggi. Nilai harus kurang dari %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer sedang digunakan" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Memisahkan dengan menggunakan sub-captures" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Terlalu banyak channel dalam sampel" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Tidak dapat mengalokasikan buffer untuk signed conversion" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Tidak dapat menemukan GCLK yang kosong" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Baudrate tidak didukung" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "Baudrate tidak didukung" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "PERINGATAN: Nama file kode anda mempunyai dua ekstensi\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Selamat datang ke Adafruit CircuitPython %s!\n" +"\n" +"Silahkan kunjungi learn.adafruit.com/category/circuitpython untuk panduan " +"project.\n" +"\n" +"Untuk menampilkan modul built-in silahkan ketik `help(\"modules\")`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Anda mengajukan untuk memulai mode aman pada (safe mode) pada " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "sebuah objek menyerupai byte (bytes-like) dibutuhkan" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() dipanggil" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "alamat %08x tidak selaras dengan %d bytes" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "argumen num/types tidak cocok" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "mode compile buruk" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "typecode buruk" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits harus memilki nilai 8" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +#, fuzzy +msgid "buffer size must match format" +msgstr "buffers harus mempunyai panjang yang sama" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "buffers harus mempunyai panjang yang sama" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "byte > 8 bit tidak didukung" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "kalibrasi keluar dari jangkauan" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "kalibrasi adalah read only" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "nilai kalibrasi keluar dari jangkauan +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "hanya mampu memiliki hingga 4 parameter untuk Thumb assembly" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "tidak dapat menetapkan ke ekspresi" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "tidak dapat mendeklarasikan nonlocal diluar jangkauan kode" + +#: py/compile.c +msgid "can't delete expression" +msgstr "tidak bisa menghapus ekspresi" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "tidak bisa memiliki **x ganda" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "tidak bisa memiliki *x ganda" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "tidak dapat melakukan relative import" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "kompresi header" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "'except' standar harus terakhir" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "" + +#: py/objdeque.c +msgid "empty" +msgstr "" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "heap kosong" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "error = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "sebuah instruksi assembler diharapkan" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "hanya mengharapkan sebuah nilai (value) untuk set" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "key:value diharapkan untuk dict" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "argumen keyword ekstra telah diberikan" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "argumen posisi ekstra telah diberikan" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "bit pertama(firstbit) harus berupa MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "fungsi tidak dapat mengambil argumen keyword" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "fungsi diharapkan setidaknya %d argumen, hanya mendapatkan %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "fungsi mendapatkan nilai ganda untuk argumen '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "fungsi kehilangan %d argumen posisi yang dibutuhkan" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "fungsi kehilangan argumen keyword-only" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "fungsi kehilangan argumen keyword '%q' yang dibutuhkan" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "fungsi kehilangan argumen posisi #%d yang dibutuhkan" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "fungsi mengambil posisi argumen %d tapi %d yang diberikan" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "heap harus berupa sebuah list" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "identifier didefinisi ulang sebagai global" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "identifier didefinisi ulang sebagai nonlocal" + +#: py/objstr.c +msgid "incomplete format" +msgstr "" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "lapisan (padding) tidak benar" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "index keluar dari jangkauan" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "inline assembler harus sebuah fungsi" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "perangkat I2C tidak valid" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "perangkat SPI tidak valid" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "argumen-argumen tidak valid" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "cert tidak valid" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "indeks dupterm tidak valid" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "format tidak valid" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "key tidak valid" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "micropython decorator tidak valid" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "syntax tidak valid" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "argumen keyword belum diimplementasi - gunakan args normal" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "keyword harus berupa string" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "label didefinis ulang" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "modul tidak ditemukan" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "perkalian *x dalam assignment" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "harus menentukan semua pin sck/mosi/miso" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "" + +#: py/compile.c +msgid "name reused for argument" +msgstr "nama digunakan kembali untuk argumen" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "tidak ada ikatan/bind pada temuan nonlocal" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "tidak ada modul yang bernama '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "argumen non-default mengikuti argumen standar(default)" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "digit non-hex ditemukan" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "non-keyword arg setelah */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "non-keyword arg setelah keyword arg" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "" + +#: py/runtime.c +msgid "object not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "panjang data string memiliki keganjilan (odd-length)" + +#: py/objstr.c py/objstrunicode.c +#, fuzzy +msgid "offset out of bounds" +msgstr "modul tidak ditemukan" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "anotasi parameter haruse sebuah identifier" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "parameter harus menjadi register dalam urutan r0 sampai r3" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "Muncul dari PulseIn yang kosong" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "antrian meluap (overflow)" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "relative import" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "anotasi return harus sebuah identifier" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "nilai sampling keluar dari jangkauan" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "kompilasi script tidak didukung" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "memulai ulang software(soft reboot)\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: tidak bisa melakukan index" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: index keluar dari jangkauan" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: tidak ada fields" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() tidak dapat menemukan dirinya sendiri" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "sintaksis error pada JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "sintaksis error pada pendeskripsi uctypes" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "timeout must be >= 0.0" +msgstr "bits harus memilki nilai 8" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx dan rx keduanya tidak boleh kosong" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "argumen keyword tidak diharapkan" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "keyword argumen '%q' tidak diharapkan" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "tipe tidak diketahui" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "" + +#~ msgid "AP required" +#~ msgstr "AP dibutuhkan" + +#~ msgid "C-level assert" +#~ msgstr "Dukungan C-level" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Tidak dapat menyambungkan ke AP" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Tidak dapat memutuskna dari AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "Tidak dapat mengatur konfigurasi STA" + +#~ msgid "Cannot update i/f status" +#~ msgstr "Tidak dapat memperbarui status i/f" + +#, fuzzy +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Tidak bisa menyesuaikan data ke dalam paket advertisment" + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "Tidak tahu cara meloloskan objek ke fungsi native" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "ESP8266 tidak mendukung safe mode" + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "ESP866 tidak mendukung pull down" + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Errod pada ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "Gagal untuk mendapatkan mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Gagal untuk menambahkan karakteristik, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "Gagal untuk menambahkan layanan, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Gagal untuk menambahkan layanan, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Gagal untuk merubah status softdevice, error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to connect:" +#~ msgstr "Gagal untuk menyambungkan, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to continue scanning" +#~ msgstr "Gagal untuk melanjutkan scanning, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Gagal untuk melanjutkan scanning, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "Gagal untuk membuat mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "Gagal untuk menemukan layanan, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to get local address" +#~ msgstr "Gagal untuk mendapatkan alamat lokal, error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to get softdevice state" +#~ msgstr "Gagal untuk mendapatkan status softdevice, error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Gagal untuk melaporkan nilai atribut, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Gagal untuk membaca nilai atribut, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Gagal untuk membaca nilai atribut, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Gagal untuk menulis nilai gatts, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Gagal untuk menambahkan Vendor Spesific UUID, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "Gagal untuk melepaskan mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "Gagal untuk memulai advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Gagal untuk memulai advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "Gagal untuk melakukan scanning, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Gagal untuk melakukan scanning, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "Gagal untuk memberhentikan advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Gagal untuk memberhentikan advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Gagal untuk menulis nilai atribut, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Gagal untuk menulis nilai gatts, status: 0x%08lX" + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "GPIO16 tidak mendukung pull up" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Bit clock pada pin tidak valid" + +#~ msgid "Invalid clock pin" +#~ msgstr "Clock pada pin tidak valid" + +#~ msgid "Invalid data pin" +#~ msgstr "data pin tidak valid" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "Nilai maksimum frekuensi PWM adalah %dhz" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "Nilai minimum frekuensi PWM is 1hz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "Nilai Frekuensi PWM ganda tidak didukung. PWM sudah diatur pada %dhz" + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Tidak ada dukungan PulseIn untuk %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Tidak dukungan hardware untuk analog out." + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Hanya tx yang mendukung pada UART1 (GPIO2)." + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "PWM tidak didukung pada pin %d" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Pin %q tidak memiliki kemampuan ADC" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pin(16) tidak mendukung pull" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Pin-pin tidak valid untuk SPI" + +#~ msgid "STA must be active" +#~ msgstr "STA harus aktif" + +#~ msgid "STA required" +#~ msgstr "STA dibutuhkan" + +#, fuzzy +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Dukungan soft device, id: 0x%08lX, pc: 0x%08l" + +#, fuzzy +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "Tegangan dari mikrokontroler turun atau mati. Pastikan sumber tegangan " +#~ "memberikan daya\n" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Untuk keluar, silahkan reset board tanpa " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) tidak ada" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) tidak dapat dibaca" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Tidak dapat memasang filesystem kembali" + +#~ msgid "Unknown type" +#~ msgstr "Tipe tidak diketahui" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "" +#~ "Gunakan esptool untuk menghapus flash dan upload ulang Python sebagai " +#~ "gantinya" + +#, fuzzy +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Anda sedang menjalankan mode aman (safe mode) yang berarti sesuatu yang " +#~ "sangat buruk telah terjadi.\n" + +#~ msgid "[addrinfo error %d]" +#~ msgstr "[addrinfo error %d]" + +#~ msgid "buffer too long" +#~ msgstr "buffer terlalu panjang" + +#~ msgid "can query only one param" +#~ msgstr "hanya bisa melakukan query satu param" + +#~ msgid "can't get AP config" +#~ msgstr "tidak bisa mendapatkan konfigurasi AP" + +#~ msgid "can't get STA config" +#~ msgstr "tidak bisa mendapatkan konfigurasi STA" + +#~ msgid "can't set AP config" +#~ msgstr "tidak bisa mendapatkan konfigurasi AP" + +#~ msgid "can't set STA config" +#~ msgstr "tidak bisa mendapatkan konfigurasi STA" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "hanya antar pos atau kw args yang diperbolehkan" + +#~ msgid "expecting a pin" +#~ msgstr "mengharapkan sebuah pin" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "alokasi flash harus dibawah 1MByte" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "frekuensi hanya bisa didefinisikan 80Mhz atau 160Mhz" + +#~ msgid "impossible baudrate" +#~ msgstr "baudrate tidak memungkinkan" + +#~ msgid "invalid alarm" +#~ msgstr "alarm tidak valid" + +#~ msgid "invalid buffer length" +#~ msgstr "panjang buffer tidak valid" + +#~ msgid "invalid data bits" +#~ msgstr "bit data tidak valid" + +#~ msgid "invalid pin" +#~ msgstr "pin tidak valid" + +#~ msgid "invalid stop bits" +#~ msgstr "stop bit tidak valid" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len harus kelipatan dari 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "alokasi memori gagal, mengalokasikan %u byte untuk kode native" + +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "keyword harus berupa string" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "tidak valid channel ADC: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "pin tidak memiliki kemampuan IRQ" + +#~ msgid "scan failed" +#~ msgstr "scan gagal" + +#~ msgid "unknown config param" +#~ msgstr "konfigurasi param tidak diketahui" + +#~ msgid "unknown status param" +#~ msgstr "status param tidak diketahui" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() gagal" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot new file mode 100644 index 0000000000000..177eee2bf04ca --- /dev/null +++ b/locale/circuitpython.pot @@ -0,0 +1,3101 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +#, fuzzy +msgid "" +msgstr "" +"Project-Id-Version: PACKAGE VERSION\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" +"Last-Translator: FULL NAME \n" +"Language-Team: LANGUAGE \n" +"Language: \n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=CHARSET\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr "" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr "" + +#: main.c +msgid " output:\n" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "" + +#: py/obj.c +msgid "%q index out of range" +msgstr "" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'return' outside function" +msgstr "" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "" + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "" + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "" + +#: py/compile.c +msgid "can't delete expression" +msgstr "" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "" + +#: py/objdeque.c +msgid "empty" +msgstr "" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "" + +#: py/objstr.c +msgid "incomplete format" +msgstr "" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "" + +#: py/compile.c +msgid "name reused for argument" +msgstr "" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "" + +#: py/runtime.c +msgid "object not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po new file mode 100644 index 0000000000000..351da58936dcd --- /dev/null +++ b/locale/de_DE.po @@ -0,0 +1,3553 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-07-27 11:55-0700\n" +"Last-Translator: Pascal Deneaux\n" +"Language-Team: Sebastian Plamauer, Pascal Deneaux\n" +"Language: de_DE\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.1.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"Der Code wurde ausgeführt. Warte auf reload.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Datei \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Datei \"%q\", Zeile %d" + +#: main.c +msgid " output:\n" +msgstr " Ausgabe:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c erwartet int oder char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q in Benutzung" + +#: py/obj.c +msgid "%q index out of range" +msgstr "Der Index %q befindet sich außerhalb des Bereiches" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q Indizes müssen ganze Zahlen sein, nicht %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "%q muss >= 1 sein" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "%q sollte ein int sein" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() nimmt %d Argumente ohne Keyword an, aber es wurden %d angegeben" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' Argument erforderlich" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' erwartet ein Label" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' erwartet ein Register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' erwartet ein Spezialregister" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' erwartet ein FPU-Register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' erwartet eine Adresse in der Form [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' erwartet ein Integer" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' erwartet höchstens r%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' erwartet {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' integer %d ist nicht im Bereich %d..%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' Integer 0x%x passt nicht in Maske 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "'%s' Objekt unterstützt keine Zuordnung von Elementen" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "'%s' Objekt unterstützt das Löschen von Elementen nicht" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "'%s' Objekt hat kein Attribut '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "'%s' Objekt ist kein Iterator" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "'%s' object ist nicht callable" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "'%s' Objekt nicht iterierbar" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "'%s' Objekt hat keine '__getitem__'-Methode (not subscriptable)" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "'='-Ausrichtung ist im String-Formatbezeichner nicht zulässig" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' und 'O' sind keine unterstützten Formattypen" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' erfordert genau ein Argument" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' außerhalb einer Funktion" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' außerhalb einer Schleife" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' außerhalb einer Schleife" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' erfordert mindestens zwei Argumente" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' erfordert Integer-Argumente" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' erfordert genau ein Argument" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' außerhalb einer Funktion" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' außerhalb einer Funktion" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x muss Zuordnungsziel sein" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "3-arg pow() wird nicht unterstützt" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Ein Hardware Interrupt Kanal wird schon benutzt" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "Die Adresse muss %d Bytes lang sein" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "Adresstyp außerhalb des zulässigen Bereichs" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Alle I2C-Peripheriegeräte sind in Benutzung" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Alle SPI-Peripheriegeräte sind in Benutzung" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "Alle UART-Peripheriegeräte sind in Benutzung" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Alle event Kanäle werden benutzt" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Alle sync event Kanäle werden benutzt" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Alle timer für diesen Pin werden bereits benutzt" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Alle timer werden benutzt" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "AnalogOut-Funktion wird nicht unterstützt" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut kann nur 16 Bit. Der Wert muss unter 65536 liegen." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "AnalogOut ist an diesem Pin nicht unterstützt" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Ein anderer Sendevorgang ist schon aktiv" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Array muss Halbwörter enthalten (type 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Array-Werte sollten aus Einzelbytes bestehen." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Automatisches Neuladen ist deaktiviert.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Automatisches Neuladen ist aktiv. Speichere Dateien über USB um sie " +"auszuführen oder verbinde dich mit der REPL zum Deaktivieren.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "Unterhalb der minimalen Frame Rate" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Bit clock und word select müssen eine clock unit teilen" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "Bit depth muss ein Vielfaches von 8 sein." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Beide pins müssen Hardware Interrupts unterstützen" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "Die Helligkeit muss zwischen 0 und 1.0 liegen" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "Die Helligkeit muss zwischen 0 und 255 liegen" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "Die Helligkeit ist nicht einstellbar" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Der Puffergröße ist inkorrekt. Sie sollte %d bytes haben." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "Der Puffer ist kein Byte-Array" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "Der Puffer ist zu klein" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "Die Pufferlänge %d ist zu groß. Sie muss kleiner als %d sein." + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Der Puffer muss eine Mindestenslänge von 1 haben" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "Bus pin %d wird schon benutzt" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "Der Puffer muss 16 Bytes lang sein" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Ein Bytes kann nur Werte zwischen 0 und 255 annehmen." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "Rufe super().__init__() vor dem Zugriff auf ein natives Objekt auf." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Kann Werte nicht löschen" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Pull up im Ausgabemodus nicht möglich" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "Kann Temperatur nicht holen" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Kann nicht beite Kanäle auf dem gleichen Pin ausgeben" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Kann ohne MISO-Pin nicht lesen." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Aufnahme in eine Datei nicht möglich" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "Kann '/' nicht remounten when USB aktiv ist" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "Reset zum bootloader nicht möglich da bootloader nicht vorhanden" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "Der Wert kann nicht gesetzt werden, wenn die Richtung input ist." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Übertragung ohne MOSI- und MISO-Pins nicht möglich." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "sizeof scalar kann nicht eindeutig bestimmt werden" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Kann nicht ohne MOSI-Pin schreiben." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "Schreiben von CharacteristicBuffer ist nicht vorgesehen" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Clock pin init fehlgeschlagen." + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Clock stretch zu lang" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Clock unit wird benutzt" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "Spalteneintrag muss digitalio.DigitalInOut sein" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "Der Befehl muss ein int zwischen 0 und 255 sein" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "Beschädigte .mpy Datei" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "Beschädigter raw code" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Konnte UART nicht initialisieren" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Konnte first buffer nicht zuteilen" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Konnte second buffer nicht zuteilen" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC wird schon benutzt" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "Data 0 pin muss am Byte ausgerichtet sein" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Dem fmt Block muss ein Datenblock folgen" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "Zu vielen Daten für das advertisement packet" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "Die Zielkapazität ist kleiner als destination_length." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "Gerät in Benutzung" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "Display muss einen 16 Bit Farbraum haben." + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "Die Rotation der Anzeige muss in 90-Grad-Schritten erfolgen" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Drive mode wird nicht verwendet, wenn die Richtung input ist." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "EXTINT Kanal ist schon in Benutzung" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Fehler in regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Erwartet ein(e) %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "Characteristic wird erwartet" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "Ein Service wird erwartet" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "Eine UUID wird erwartet" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "Erwartet eine Adresse" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "Habe ein Tupel der Länge %d erwartet aber %d erhalten" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "Kommando nicht gesendet." + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Mutex konnte nicht akquiriert werden. Status: 0x%04x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Konnte keinen RX Buffer allozieren" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Konnte keine RX Buffer mit %d allozieren" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "Verbindung nicht erfolgreich: timeout" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Mutex konnte nicht freigegeben werden. Status: 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "Datei existiert" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" +"Die aufgezeichnete Frequenz liegt über der Leistungsgrenze. Aufnahme " +"angehalten." + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "Die Funktion erwartet, dass der 'lock'-Befehl zuvor ausgeführt wurde" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "Gruppe schon benutzt" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Gruppe voll" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "Lese/Schreibe-operation an geschlossener Datei" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "I2C-operation nicht unterstützt" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"Inkompatible mpy-Datei. Bitte aktualisieren Sie alle mpy-Dateien. Siehe " +"http://adafru.it/mpy-update für weitere Informationen." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "Inkorrekte Puffergröße" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "Eingabe-/Ausgabefehler" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Ungültiger %q pin" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Ungültige BMP-Datei" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Ungültige PWM Frequenz" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Ungültiges Argument" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "Ungültige Bits pro Wert" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Ungültige Puffergröße" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "Ungültiger Aufnahmezeitraum. Gültiger Bereich: 1 - 500" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "Ungültige Anzahl von Kanälen" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Ungültige Richtung" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Ungültige Datei" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Ungültige format chunk size" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Ungültige Anzahl von Bits" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Ungültige Phase" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Ungültiger Pin" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Ungültiger Pin für linken Kanal" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Ungültiger Pin für rechten Kanal" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Ungültige Pins" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Ungültige Polarität" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "Ungültige Eigenschaften" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Ungültiger Ausführungsmodus" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "Ungültiger security_mode" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "Ungültige Stimme" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "Ungültige Anzahl von Stimmen" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Ungültige wave Datei" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "LHS des Schlüsselwortarguments muss eine id sein" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "Layer ist bereits in einer Gruppe." + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "Layer muss eine Group- oder TileGrid-Unterklasse sein." + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Länge muss ein int sein" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Länge darf nicht negativ sein" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "MISO pin Initialisierung fehlgeschlagen" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "MOSI pin Initialisierung fehlgeschlagen" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "Maximaler x-Wert beim Spiegeln ist %d" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" +"Die Startverzögerung des Mikrofons muss im Bereich von 0,0 bis 1,0 liegen" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "Muss eine %q Unterklasse sein." + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "Kein CCCD für diese Charakteristik" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Kein DAC im Chip vorhanden" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Kein DMA Kanal gefunden" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Kein RX Pin" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Kein TX Pin" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Keine Taktgeber verfügbar" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Kein Standard %q Bus" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Keine freien GCLKs" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Kein hardware random verfügbar" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "Keine Hardwareunterstützung am clk Pin" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Keine Hardwareunterstützung an diesem Pin" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "Kein Pulldown Widerstand am Pin; 1Mohm wird vorgeschlagen" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "Kein Speicherplatz mehr verfügbar auf dem Gerät" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Keine solche Datei/Verzeichnis" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "Nicht verbunden" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "Spielt nicht ab" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"Objekt wurde deinitialisiert und kann nicht mehr verwendet werden. Erstelle " +"ein neues Objekt." + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Eine ungerade Parität wird nicht unterstützt" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Nur 8 oder 16 bit mono mit " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" +"Nur Windows-Format, unkomprimiertes BMP unterstützt: die gegebene Header-" +"Größe ist %d" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" +"Nur monochrome, indizierte 4bpp oder 8bpp, und 16bpp oder größere BMPs " +"unterstützt: %d bpp wurden gegeben" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "Oversample muss ein Vielfaches von 8 sein." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "PWM duty_cycle muss zwischen 0 und 65535 (16 Bit Auflösung) liegen" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "Die PWM-Frequenz ist nicht schreibbar wenn variable_Frequenz = False." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Zugang verweigert" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Pin hat keine ADC Funktionalität" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "und alle Module im Dateisystem \n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" +"Drücke eine Taste um dich mit der REPL zu verbinden. Drücke Strg-D zum neu " +"laden" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Pull wird nicht verwendet, wenn die Richtung output ist." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "Die RTC-Kalibrierung wird auf diesem Board nicht unterstützt" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "Eine RTC wird auf diesem Board nicht unterstützt" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Nur lesen möglich, da Schreibgeschützt" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Schreibgeschützte Dateisystem" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "Schreibgeschützte Objekt" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "Zu früh neu geladen" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Rechter Kanal wird nicht unterstützt" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "Zeileneintrag muss ein digitalio.DigitalInOut sein" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Sicherheitsmodus aktiv! Automatisches Neuladen ist deaktiviert.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Sicherheitsmodus aktiv! Gespeicherter Code wird nicht ausgeführt\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA oder SCL brauchen pull up" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "Abtastrate muss positiv sein" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Abtastrate zu hoch. Wert muss unter %d liegen" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer wird benutzt" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Slice und Wert (value) haben unterschiedliche Längen." + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Slices werden nicht unterstützt" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Splitting mit sub-captures" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "Die Stackgröße sollte mindestens 256 sein" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Stream fehlt readinto() oder write() Methode." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" +"Das `Mikrocontroller` Modul wurde benutzt, um in den Sicherheitsmodus zu " +"starten. Drücke Reset um den Sicherheitsmodus zu verlassen.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Zu viele Kanäle im sample" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Zu viele displays" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Zurückverfolgung (jüngste Aufforderung zuletzt):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Tuple- oder struct_time-Argument erforderlich" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB beschäftigt" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "USB Fehler" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "UUID Integer-Wert muss ein Wert von 0 bis 0xffff sein" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "UUID Zeichenfolge ist nicht 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "Der UUID-Wert ist kein str-, int- oder Byte-Puffer" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Konnte keine Buffer für Vorzeichenumwandlung allozieren" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "Konnte kein I2C Display finden an %x" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Konnte keinen freien GCLK finden" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Parser konnte nicht gestartet werden" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "Konnte Farbpalettendaten nicht lesen" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Schreiben in nvm nicht möglich." + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "Unerwarteter nrfx uuid-Typ" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" +"Nicht übereinstimmende Anzahl von Elementen auf der rechten Seite (erwartet " +"%d, %d erhalten)." + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Baudrate wird nicht unterstützt" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "Nicht unterstützter display bus type" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Nicht unterstütztes Format" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Nicht unterstützte Operation" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Nicht unterstützter Pull-Wert" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "Länge des Wertes > max_length" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "Viper-Funktionen unterstützen derzeit nicht mehr als 4 Argumente" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "" +"WARNUNG: Der Dateiname deines Programms hat zwei Dateityperweiterungen\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Willkommen bei Adafruit CircuitPython %s!\n" +"\n" +"Projektleitfäden findest du auf learn.adafruit.com/category/circuitpython \n" +"\n" +"Um die integrierten Module aufzulisten, führe bitte `help(\"modules\")` " +"aus.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Du hast das Starten im Sicherheitsmodus ausgelöst durch " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() sollte None zurückgeben" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() sollte None zurückgeben, nicht '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "__new__ arg muss user-type sein" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "ein Byte-ähnliches Objekt ist erforderlich" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() wurde aufgerufen" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "Addresse %08x ist nicht an %d bytes ausgerichtet" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "Adresse außerhalb der Grenzen" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "adresses ist leer" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "arg ist eine leere Sequenz" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "Argument hat falschen Typ" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "Anzahl/Type der Argumente passen nicht" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "Argument sollte '%q' sein, nicht '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "Array/Bytes auf der rechten Seite erforderlich" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "Attribute werden noch nicht unterstützt" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "Falscher Formatstring" + +#: py/binary.c +msgid "bad typecode" +msgstr "Falscher Typcode" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "Der binäre Operator %q ist nicht implementiert" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bits muss 7, 8 oder 9 sein" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits müssen 8 sein" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "Es müssen 8 oder 16 bits_per_sample sein" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "Zweig ist außerhalb der Reichweite" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "Puffer muss ein bytes-artiges Objekt sein" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "Die Puffergröße muss zum Format passen" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "Puffersegmente müssen gleich lang sein" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "Der Puffer ist zu klein" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "Buffer müssen gleich lang sein" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "bytes mit mehr als 8 bits werden nicht unterstützt" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "Kalibrierung ist außerhalb der Reichweite" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "Kalibrierung ist Schreibgeschützt" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "Kalibrierwert nicht im Bereich von +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "kann nur bis zu 4 Parameter für die Thumb assembly haben" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "kann nur bis zu 4 Parameter für die Xtensa assembly haben" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "kann nur Bytecode speichern" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "kann keinem Ausdruck zuweisen" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "kann %s nicht nach complex konvertieren" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "kann %s nicht nach float konvertieren" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "kann %s nicht nach int konvertieren" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "Kann '%q' Objekt nicht implizit nach %q konvertieren" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "kann NaN nicht nach int konvertieren" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "kann Adresse nicht in int konvertieren" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "kann inf nicht nach int konvertieren" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "kann nicht nach complex konvertieren" + +#: py/obj.c +msgid "can't convert to float" +msgstr "kann nicht nach float konvertieren" + +#: py/obj.c +msgid "can't convert to int" +msgstr "kann nicht nach int konvertieren" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "Kann nicht implizit nach str konvertieren" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "kann im äußeren Code nicht als nonlocal deklarieren" + +#: py/compile.c +msgid "can't delete expression" +msgstr "Ausdruck kann nicht gelöscht werden" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "Eine binäre Operation zwischen '%q' und '%q' ist nicht möglich" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "kann mit einer komplexen Zahl keine abgeschnittene Division ausführen" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "mehrere **x sind nicht gestattet" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "mehrere *x sind nicht gestattet" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "Kann '%q' nicht implizit nach 'bool' konvertieren" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "Laden von '%q' nicht möglich" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "Laden mit '%q' index nicht möglich" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "kann Attribut nicht setzen" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "Speichern von '%q' nicht möglich" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "Speichern in/nach '%q' nicht möglich" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "Speichern mit '%q' Index nicht möglich" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "Kann '%q' Instanzen nicht erstellen" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "Kann Instanz nicht erstellen" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "Name %q kann nicht importiert werden" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "kann keinen relativen Import durchführen" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "chr() arg ist nicht in range(0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "chr() arg ist nicht in range(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "Farbpuffer muss 3 Bytes (RGB) oder 4 Bytes (RGB + pad byte) sein" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" +"Farbpuffer muss ein Byte-Array oder ein Array vom Typ 'b' oder 'B' sein" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "Farbe muss zwischen 0x000000 und 0xffffff liegen" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "Farbe sollte ein int sein" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "Komplexe Division durch null" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "Komplexe Zahlen nicht unterstützt" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "kompression header" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "constant muss ein integer sein" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "Umwandlung zu Objekt" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "Dezimalzahlen nicht unterstützt" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "Die Standart-Ausnahmebehandlung muss als letztes sein" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length muss ein int >= 0 sein" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "Division durch Null" + +#: py/objdeque.c +msgid "empty" +msgstr "leer" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "leerer heap" + +#: py/objstr.c +msgid "empty separator" +msgstr "leeres Trennzeichen" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "leere Sequenz" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "end_x sollte ein int sein" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "Exceptions müssen von BaseException abgeleitet sein" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "erwarte ':' nach format specifier" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "erwarte tuple/list" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "erwarte ein dict als Keyword-Argumente" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "erwartet eine Assembler-Anweisung" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "Erwarte nur einen Wert für set" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "Erwarte key:value für dict" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "Es wurden zusätzliche Keyword-Argumente angegeben" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "Es wurden zusätzliche Argumente ohne Keyword angegeben" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "Die Datei muss eine im Byte-Modus geöffnete Datei sein" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "Das Dateisystem muss eine Mount-Methode bereitstellen" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "Das erste Argument für super() muss type sein" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "Erstes Bit muss das höchstwertigste Bit (MSB) sein" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "float zu groß" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "Die Schriftart (font) muss 2048 Byte lang sein" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "voll" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "Funktion akzeptiert keine Keyword-Argumente" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "Funktion erwartet maximal %d Argumente, aber hat %d erhalten" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "Funktion hat mehrere Werte für Argument '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "Funktion vermisst %d benötigte Argumente ohne Keyword" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "Funktion vermisst Keyword-only-Argument" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "Funktion vermisst benötigtes Keyword-Argumente '%q'" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "Funktion vermisst benötigtes Argumente ohne Keyword #%d" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" +"Funktion nimmt %d Argumente ohne Keyword an, aber es wurden %d angegeben" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "Funktion benötigt genau 9 Argumente" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "Generator läuft bereits" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "Generator ignoriert GeneratorExit" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic muss 2048 Byte lang sein" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "heap muss eine Liste sein" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "Bezeichner als global neu definiert" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "Bezeichner als nonlocal definiert" + +#: py/objstr.c +msgid "incomplete format" +msgstr "unvollständiges Format" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "unvollständiger Formatschlüssel" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "padding ist inkorrekt" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "index außerhalb der Reichweite" + +#: py/obj.c +msgid "indices must be integers" +msgstr "Indizes müssen ganze Zahlen sein" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "inline assembler muss eine function sein" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "int() arg 2 muss >= 2 und <= 36 sein" + +#: py/objstr.c +msgid "integer required" +msgstr "integer erforderlich" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "Das Intervall muss im Bereich %s-%s sein" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "ungültige I2C Schnittstelle" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "ungültige SPI Schnittstelle" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "ungültige argumente" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "ungültiges cert" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "ungültiger dupterm index" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "ungültiges Format" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "ungültiger Formatbezeichner" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "ungültiger Schlüssel" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "ungültiger micropython decorator" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "ungültiger Schritt (step)" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "ungültige Syntax" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "ungültige Syntax für integer" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "ungültige Syntax für integer mit Basis %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "ungültige Syntax für number" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "issubclass() arg 1 muss eine Klasse sein" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "issubclass() arg 2 muss eine Klasse oder ein Tupel von Klassen sein" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"join erwartet eine Liste von str/bytes-Objekten, die mit dem self-Objekt " +"übereinstimmen" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" +"Keyword-Argument(e) noch nicht implementiert - verwenden Sie stattdessen " +"normale Argumente" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "Schlüsselwörter müssen Zeichenfolgen sein" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "Label '%q' nicht definiert" + +#: py/compile.c +msgid "label redefined" +msgstr "Label neu definiert" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "Für diesen Typ ist length nicht zulässig" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lhs und rhs sollten kompatibel sein" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "Lokales '%q' hat den Typ '%q', aber die Quelle ist '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "Lokales '%q' verwendet bevor Typ bekannt" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" +"Es wurde versucht auf eine Variable zuzugreifen, die es (noch) nicht gibt. " +"Variablen immer zuerst Zuweisen!" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "long int wird in diesem Build nicht unterstützt" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "map buffer zu klein" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "max_length muss 0-%d sein, wenn fixed_length %s ist" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "maximale Rekursionstiefe überschritten" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "Speicherzuordnung fehlgeschlagen, Zuweisung von %u Bytes" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "Speicherzuweisung fehlgeschlagen, der Heap ist gesperrt" + +#: py/builtinimport.c +msgid "module not found" +msgstr "Modul nicht gefunden" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "mehrere *x in Zuordnung" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "Mehrfache Vererbung nicht unterstützt" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "sck/mosi/miso müssen alle spezifiziert sein" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "muss Schlüsselwortargument für key function verwenden" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "Name '%q' ist nirgends definiert worden (Schreibweise kontrollieren)" + +#: py/runtime.c +msgid "name not defined" +msgstr "Dieser Name ist nirgends definiert worden (Schreibweise kontrollieren)" + +#: py/compile.c +msgid "name reused for argument" +msgstr "Name für Argumente wiederverwendet" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "kein verfügbares Netzwerkadapter (NIC)" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "Kein Modul mit dem Namen '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "kein Reset Pin verfügbar" + +#: py/runtime.c +msgid "no such attribute" +msgstr "kein solches Attribut" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "ein non-default argument folgt auf ein default argument" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "eine nicht-hex zahl wurde gefunden" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "keine 128-bit UUID" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "Objekt '%s' ist weder tupel noch list" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "Objekt unterstützt keine item assignment" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "Objekt unterstützt das Löschen von Elementen nicht" + +#: py/obj.c +msgid "object has no len" +msgstr "Objekt hat keine len" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "Objekt hat keine '__getitem__'-Methode (not subscriptable)" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "Objekt ist kein Iterator" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "Objekt ist nicht in sequence" + +#: py/runtime.c +msgid "object not iterable" +msgstr "Objekt nicht iterierbar" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "Objekt vom Typ '%s' hat keine len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "Objekt mit Pufferprotokoll (buffer protocol) erforderlich" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "String mit ungerader Länge" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "offset außerhalb der Grenzen" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "nur eine bit_depth=16 wird unterstützt" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "nur eine sample_rate=16000 wird unterstützt" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord erwartet ein Zeichen" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" +"ord() erwartet ein Zeichen aber es wurde eine Zeichenfolge mit Länge %d " +"gefunden" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "Überlauf beim konvertieren von long int zu machine word" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "palette_index sollte ein int sein" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "parameter annotation muss ein identifier sein" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "Die Parameter müssen Register der Reihenfolge a2 bis a5 sein" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "Pixelkoordinaten außerhalb der Grenzen" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "pixel_shader muss displayio.Palette oder displayio.ColorConverter sein" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "pop von einem leeren PulseIn" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "pop von einer leeren Menge (set)" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "pop von einer leeren Liste" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): dictionary ist leer" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "pow() drittes Argument darf nicht 0 sein" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "Warteschlangenüberlauf" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "relativer Import" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "die ersuchte Länge ist %d, aber das Objekt hat eine Länge von %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "return annotation muss ein identifier sein" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"sample_source buffer muss ein Bytearray oder ein Array vom Typ 'h', 'H', 'b' " +"oder 'B' sein" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "Abtastrate außerhalb der Reichweite" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "Der schedule stack ist voll" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "kompilieren von Skripten nicht unterstützt" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "small int Überlauf" + +#: main.c +msgid "soft reboot\n" +msgstr "weicher reboot\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "start/end Indizes" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "start_x sollte ein int sein" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "Schritt (step) darf nicht Null sein" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "stop muss 1 oder 2 sein" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop ist von start aus nicht erreichbar" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "stream operation ist nicht unterstützt" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "String index außerhalb des Bereiches" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" +"Zeichenfolgen werden nicht unterstützt; Verwenden Sie bytes oder bytearray" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: kann nicht indexieren" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: index außerhalb gültigen Bereichs" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: keine Felder" + +#: py/objstr.c +msgid "substring not found" +msgstr "substring nicht gefunden" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() kann self nicht finden" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "Syntaxfehler in JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "Syntaxfehler in uctypes Deskriptor" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "threshold muss im Intervall 0-65536 liegen" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "timeout muss >= 0.0 sein" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "tupel/list hat falsche Länge" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx und rx können nicht beide None sein" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "Typ '%q' ist kein akzeptierter Basis-Typ" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "Typ ist kein akzeptierter Basis-Typ" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "Der unäre Operator %q ist nicht implementiert" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" +"unerwarteter Einzug (Einrückung) Bitte Leerzeichen am Zeilenanfang " +"kontrollieren!" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "unerwartetes Keyword-Argument" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "unerwartetes Keyword-Argument '%q'" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" +"Einrückung entspricht keiner äußeren Einrückungsebene. Bitte Leerzeichen am " +"Zeilenanfang kontrollieren!" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "unbekannter Typ" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "unbekannter Typ '%q'" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "nicht lesbares Attribut" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "Nicht unterstützter %q-Typ" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "nicht unterstützter Thumb-Befehl '%s' mit %d Argumenten" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "nicht unterstützter Type für %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "nicht unterstützter Typ für Operator" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "nicht unterstützte Typen für %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "Wert muss in %d Byte(s) passen" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "value_count muss größer als 0 sein" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "falsche Anzahl an Argumenten" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "falsche Anzahl zu entpackender Werte" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "x Wert außerhalb der Grenzen" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y sollte ein int sein" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "y Wert außerhalb der Grenzen" + +#: py/objrange.c +msgid "zero step" +msgstr "" + +#~ msgid "AP required" +#~ msgstr "AP erforderlich" + +#~ msgid "Address is not %d bytes long or is in wrong format" +#~ msgstr "Die Adresse ist nicht %d Bytes lang oder das Format ist falsch" + +#~ msgid "C-level assert" +#~ msgstr "C-Level Assert" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "Kann dotstar nicht mit %s verwenden" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "Im Central mode können Dienste nicht hinzugefügt werden" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "Im Central mode kann advertise nicht gemacht werden" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "Im Central mode kann name nicht geändert werden" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "Im Peripheral mode kann keine Verbindung hergestellt werden" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Kann nicht zu AP verbinden" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Kann nicht trennen von AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "Kann STA Konfiguration nicht setzen" + +#~ msgid "Cannot update i/f status" +#~ msgstr "Kann i/f Status nicht updaten" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "Characteristic UUID stimmt nicht mit der Service-UUID überein" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "Characteristic wird bereits von einem anderen Dienst verwendet." + +#~ msgid "Command must be 0-255" +#~ msgstr "Der Befehl muss zwischen 0 und 255 liegen" + +#~ msgid "Could not decode ble_uuid, err 0x%04x" +#~ msgstr "Konnte ble_uuid nicht decodieren. Status: 0x%04x" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Absturz in HardFault_Handler.\n" + +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Daten sind zu groß für das advertisement packet" + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "" +#~ "Ich weiß nicht, wie man das Objekt an die native Funktion übergeben kann" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "ESP8226 hat keinen Sicherheitsmodus" + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "ESP8266 unterstützt pull down nicht" + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Fehler in ffi_prep_cif" + +#~ msgid "Expected a Peripheral" +#~ msgstr "Ein Peripheriegerät wird erwartet" + +#~ msgid "Failed to acquire mutex" +#~ msgstr "Akquirieren des Mutex gescheitert" + +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Hinzufügen des Characteristic ist gescheitert. Status: 0x%04x" + +#~ msgid "Failed to add descriptor, err 0x%04x" +#~ msgstr "Deskriptor konnte nicht hinzugefügt werden. Status: 0x%04x" + +#~ msgid "Failed to add service" +#~ msgstr "Dienst konnte nicht hinzugefügt werden" + +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Dienst konnte nicht hinzugefügt werden. Status: 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Fehler beim Ändern des Softdevice-Status" + +#~ msgid "Failed to connect:" +#~ msgstr "Verbindung fehlgeschlagen:" + +#~ msgid "Failed to continue scanning" +#~ msgstr "Der Scanvorgang kann nicht fortgesetzt werden" + +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Der Scanvorgang kann nicht fortgesetzt werden. Status: 0x%04x" + +#~ msgid "Failed to create mutex" +#~ msgstr "Erstellen des Mutex ist fehlgeschlagen" + +#~ msgid "Failed to discover services" +#~ msgstr "Es konnten keine Dienste gefunden werden" + +#~ msgid "Failed to get local address" +#~ msgstr "Lokale Adresse konnte nicht abgerufen werden" + +#~ msgid "Failed to get softdevice state" +#~ msgstr "Fehler beim Abrufen des Softdevice-Status" + +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Kann den Attributwert nicht mitteilen. Status: 0x%04x" + +#~ msgid "Failed to pair" +#~ msgstr "Koppeln fehlgeschlagen" + +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Kann CCCD value nicht lesen. Status: 0x%04x" + +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Kann den Attributwert nicht lesen. Status: 0x%04x" + +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Kann Attributwert nicht lesen, Status: 0x%04x" + +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "gatts value konnte nicht gelesen werden. Status: 0x%04x" + +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Kann keine herstellerspezifische UUID hinzufügen. Status: 0x%04x" + +#~ msgid "Failed to release mutex" +#~ msgstr "Loslassen des Mutex gescheitert" + +#~ msgid "Failed to set device name, err 0x%04x" +#~ msgstr "Gerätename konnte nicht gesetzt werden, Status: 0x%04x" + +#~ msgid "Failed to start advertising" +#~ msgstr "Kann advertisement nicht starten" + +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Kann advertisement nicht starten. Status: 0x%04x" + +#~ msgid "Failed to start connecting, error 0x%04x" +#~ msgstr "Verbindung konnte nicht hergestellt werden. Status: 0x%04x" + +#~ msgid "Failed to start pairing, error 0x%04x" +#~ msgstr "Starten des Koppelns fehlgeschlagen, Status: 0x%04x" + +#~ msgid "Failed to start scanning" +#~ msgstr "Der Scanvorgang kann nicht gestartet werden" + +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Der Scanvorgang kann nicht gestartet werden. Status: 0x%04x" + +#~ msgid "Failed to stop advertising" +#~ msgstr "Kann advertisement nicht stoppen" + +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Kann advertisement nicht stoppen. Status: 0x%04x" + +#~ msgid "Failed to write CCCD, err 0x%04x" +#~ msgstr "Konnte CCCD nicht schreiben, Status: 0x%04x" + +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Kann den Attributwert nicht schreiben. Status: 0x%04x" + +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "gatts value konnte nicht geschrieben werden. Status: 0x%04x" + +#~ msgid "Function requires lock." +#~ msgstr "" +#~ "Die Funktion erwartet, dass der 'lock'-Befehl zuvor ausgeführt wurde" + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "GPIO16 unterstützt pull up nicht" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Ungültiges bit clock pin" + +#~ msgid "Invalid clock pin" +#~ msgstr "Ungültiger clock pin" + +#~ msgid "Invalid data pin" +#~ msgstr "Ungültiger data pin" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "Sieht aus, als wäre der CircuitPython-Kernel-Code abgestürzt. Uups!\n" +#~ "Bitte melde das Problem unter https://github.com/adafruit/circuitpython/" +#~ "issues\n" +#~ "mit dem Inhalt deines CIRCUITPY-Laufwerks und dieser Nachricht:\n" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "Maximale PWM Frequenz ist %dHz" + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "" +#~ "MicroPython-NLR-Sprung ist fehlgeschlagen. Wahrscheinlich " +#~ "Speicherbeschädigung.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "Schwerwiegender MicroPython-Fehler\n" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "Minimale PWM Frequenz ist %dHz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "Mehrere PWM Frequenzen werden nicht unterstützt. PWM wurde bereits auf " +#~ "%dHz gesetzt." + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Keine PulseIn Unterstützung für %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Keine Hardwareunterstützung für analog out" + +#~ msgid "Not connected." +#~ msgstr "Nicht verbunden." + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Nur unkomprimiertes Windows-Format (BMP) unterstützt %d" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "" +#~ "Es werden nur Bitmaps mit einer Farbtiefe von 8 Bit oder weniger " +#~ "unterstützt" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "UART1 (GPIO2) unterstützt nur tx" + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "PWM nicht unterstützt an Pin %d" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Pin %q hat keine ADC Funktion" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pin(16) unterstützt kein pull" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Pins nicht gültig für SPI" + +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel außerhalb der Puffergrenzen" + +#~ msgid "Range out of bounds" +#~ msgstr "Bereich außerhalb der Grenzen" + +#~ msgid "STA must be active" +#~ msgstr "STA muss aktiv sein" + +#~ msgid "STA required" +#~ msgstr "STA erforderlich" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "Der CircuitPython-Heap war beschädigt, weil der Stack zu klein war.\n" +#~ "Bitte erhöhe die stack size limits und drücke die Reset-Taste (nach " +#~ "Auswurf des CIRCUITPY-Laufwerks)\n" +#~ "Wenn du den Stack nicht geändert hast, melde bitte das Problem unter " +#~ "https://github.com/adafruit/circuitpython/issues\n" +#~ "mit dem Inhalt deines CIRCUITPY-Laufwerks.\n" + +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "Die Stromversorgung des Mikrocontrollers ist eingebrochen. Stelle sicher, " +#~ "dass deine Stromversorgung genug Leistung für die gesamte Schaltung zur " +#~ "Verfügung stellt und drücke die Reset-Taste (nach Auswurf des CIRCUITPY-" +#~ "Laufwerks)\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "Die Reset-Taste wurde beim Booten von CircuitPython gedrückt. Drücke sie " +#~ "erneut um den abgesicherten Modus zu verlassen. \n" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Zum beenden, resette bitte das board ohne " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) existiert nicht" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) kann nicht lesen" + +#~ msgid "UUID integer value not in range 0 to 0xffff" +#~ msgstr "UUID-Integer nicht im Bereich 0 bis 0xffff" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Dateisystem konnte nicht wieder eingebunden werden." + +#~ msgid "Unknown type" +#~ msgstr "Unbekannter Typ" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "" +#~ "Benutze das esptool um den flash zu löschen und Python erneut hochzuladen" + +#~ msgid "Voice index too high" +#~ msgstr "Voice index zu hoch" + +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Sie laufen im abgesicherten Modus, was bedeutet, dass etwas Unerwartetes " +#~ "passiert ist.\n" + +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf ist zu klein. brauche %d Bytes" + +#~ msgid "buffer too long" +#~ msgstr "Buffer zu lang" + +#~ msgid "byteorder is not an instance of ByteOrder (got a %s)" +#~ msgstr "byteorder ist keine Instanz von ByteOrder (%s erhalten)" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "Farbpuffer muss ein Puffer oder ein int sein" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "erwarte DigitalInOut" + +#~ msgid "expecting a pin" +#~ msgstr "Ein Pin wird erwartet" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "flash location muss unter 1MByte sein" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "Die Frequenz kann nur 80Mhz oder 160Mhz sein" + +#~ msgid "impossible baudrate" +#~ msgstr "Unmögliche Baudrate" + +#~ msgid "interval not in range 0.0020 to 10.24" +#~ msgstr "Das Interval ist nicht im Bereich 0.0020 bis 10.24" + +#~ msgid "invalid alarm" +#~ msgstr "ungültiger Alarm" + +#~ msgid "invalid buffer length" +#~ msgstr "ungültige Pufferlänge" + +#~ msgid "invalid data bits" +#~ msgstr "ungültige Datenbits" + +#~ msgid "invalid pin" +#~ msgstr "ungültiger Pin" + +#~ msgid "invalid stop bits" +#~ msgstr "ungültige Stopbits" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len muss ein vielfaches von 4 sein" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "" +#~ "Speicherallozierung fehlgeschlagen, alloziere %u Bytes für nativen Code" + +#~ msgid "name must be a string" +#~ msgstr "name muss ein String sein" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "Kein gültiger ADC Kanal: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "Pin hat keine IRQ Fähigkeiten" + +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf hat nicht die gleiche Größe wie buf" + +#~ msgid "readonly attribute" +#~ msgstr "Readonly-Attribut" + +#~ msgid "scan failed" +#~ msgstr "Scan fehlgeschlagen" + +#~ msgid "too many arguments" +#~ msgstr "zu viele Argumente" + +#~ msgid "unknown status param" +#~ msgstr "Unbekannter Statusparameter" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() fehlgeschlagen" + +#~ msgid "write_args must be a list, tuple, or None" +#~ msgstr "write_args muss eine Liste, ein Tupel oder None sein" diff --git a/locale/en_US.po b/locale/en_US.po new file mode 100644 index 0000000000000..095d175ebdb04 --- /dev/null +++ b/locale/en_US.po @@ -0,0 +1,3101 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-07-27 11:55-0700\n" +"Last-Translator: \n" +"Language-Team: \n" +"Language: en_US\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.1.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr "" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr "" + +#: main.c +msgid " output:\n" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "" + +#: py/obj.c +msgid "%q index out of range" +msgstr "" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'return' outside function" +msgstr "" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "" + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "" + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "" + +#: py/compile.c +msgid "can't delete expression" +msgstr "" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "" + +#: py/objdeque.c +msgid "empty" +msgstr "" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "" + +#: py/objstr.c +msgid "incomplete format" +msgstr "" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "" + +#: py/compile.c +msgid "name reused for argument" +msgstr "" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "" + +#: py/runtime.c +msgid "object not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po new file mode 100644 index 0000000000000..a7f00a7b2e33c --- /dev/null +++ b/locale/en_x_pirate.po @@ -0,0 +1,3120 @@ +# Pirate (English) Translation +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-07-27 11:55-0700\n" +"Last-Translator: \n" +"Language-Team: @sommersoft, @MrCertainly\n" +"Language: en_x_pirate\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.1.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"Captin's orders are complete. Holdin' fast fer reload.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr "" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr "" + +#: main.c +msgid " output:\n" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "" + +#: py/obj.c +msgid "%q index out of range" +msgstr "" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'return' outside function" +msgstr "" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Avast! A hardware interrupt channel be used already" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Belay that! thar be another active send" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Auto-reload be off.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Auto-reload be on. Put yer files on USB to weigh anchor, er' bring'er about " +"t' the REPL t' scuttle.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "Belay that! Bus pin %d already be in use" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "" + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Avast! EXTINT channel already in use" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Avast! %q pin be invalid" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Belay that! Invalid pin for port-side channel" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Belay that! Invalid pin for starboard-side channel" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Shiver me timbers! There be no DAC on this chip" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Belay that! Th' Pin be not ADC capable" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Runnin' in safe mode! Auto-reload be off.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Runnin' in safe mode! Nay runnin' saved code.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Arr! No free GCLK be in sight" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "Blimey! Yer code filename has two extensions\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "" + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "pieces must be of 8" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "yer buffers must be of the same length" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "" + +#: py/compile.c +msgid "can't delete expression" +msgstr "" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "" + +#: py/objdeque.c +msgid "empty" +msgstr "" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "" + +#: py/objstr.c +msgid "incomplete format" +msgstr "" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "Belay that! I2C peripheral be invalid" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "Arr! SPI peripheral be invalid" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "" + +#: py/compile.c +msgid "name reused for argument" +msgstr "" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "" + +#: py/runtime.c +msgid "object not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "" + +#~ msgid "All event channels " +#~ msgstr "Avast! All th' event channels " + +#~ msgid "All timers " +#~ msgstr "Heave-to! All th' timers be used" + +#~ msgid "Clock unit " +#~ msgstr "Blimey! Clock unit " + +#~ msgid "DAC already " +#~ msgstr "Blimey! DAC already under sail" + +#~ msgid "Invalid clock pin" +#~ msgstr "Avast! Clock pin be invalid" diff --git a/locale/es.po b/locale/es.po new file mode 100644 index 0000000000000..3f4313de93850 --- /dev/null +++ b/locale/es.po @@ -0,0 +1,3626 @@ +# Spanish translation. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# Carlos Diaz , 2018. +# Juan Biondi , 2018. +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-08-24 22:56-0500\n" +"Last-Translator: \n" +"Language-Team: \n" +"Language: en_US\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.1.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"El código terminó su ejecución. Esperando para recargar.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Archivo \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Archivo \"%q\", línea %d" + +#: main.c +msgid " output:\n" +msgstr " salida:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c requiere int o char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q está siendo utilizado" + +#: py/obj.c +msgid "%q index out of range" +msgstr "%q indice fuera de rango" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q indices deben ser enteros, no %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "%q debe ser >= 1" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "%q debe ser un int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() toma %d argumentos posicionales pero %d fueron dados" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "argumento '%q' requerido" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' espera una etiqueta" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' espera un registro" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' espera un carácter" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' espera un registro de FPU" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' espera una dirección de forma [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' espera un entero" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' espera a lo sumo r%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' espera {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' entero %d no esta dentro del rango %d..%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' entero 0x%x no cabe en la máscara 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "el objeto '%s' no soporta la asignación de elementos" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "objeto '%s' no soporta la eliminación de elementos" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "objeto '%s' no tiene atributo '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "objeto '%s' no es un iterator" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "objeto '%s' no puede ser llamado" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "objeto '%s' no es iterable" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "el objeto '%s' no es suscriptable" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "'=' alineación no permitida en el especificador string format" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' y 'O' no son compatibles con los tipos de formato" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' requiere 1 argumento" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' fuera de la función" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' fuera de un bucle" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' fuera de un bucle" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' requiere como minomo 2 argumentos" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' requiere argumentos de tipo entero" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' requiere 1 argumento" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' fuera de una función" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' fuera de una función" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x debe ser objetivo de la tarea" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", en %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 a una potencia compleja" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "pow() con 3 argumentos no soportado" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "El canal EXTINT ya está siendo utilizado" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "La dirección debe ser %d bytes de largo" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Todos los periféricos I2C están siendo usados" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Todos los periféricos SPI están siendo usados" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "Todos los periféricos UART están siendo usados" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Todos los canales de eventos estan siendo usados" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" +"Todos los canales de eventos de sincronización (sync event channels) están " +"siendo utilizados" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Todos los timers para este pin están siendo utilizados" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Todos los timers en uso" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "Funcionalidad AnalogOut no soportada" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut es solo de 16 bits. Value debe ser menos a 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "El pin proporcionado no soporta AnalogOut" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Otro envío ya está activo" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Array debe contener media palabra (type 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Valores del array deben ser bytes individuales." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Auto-recarga deshabilitada.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Auto-reload habilitado. Simplemente guarda los archivos via USB para " +"ejecutarlos o entra al REPL para desabilitarlos.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Bit clock y word select deben compartir una unidad de reloj" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "Bits depth debe ser múltiplo de 8." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Ambos pines deben soportar interrupciones por hardware" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "El brillo debe estar entro 0 y 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "El brillo no se puede ajustar" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Tamaño de buffer incorrecto. Debe ser de %d bytes." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Buffer debe ser de longitud 1 como minimo" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "Bus pin %d ya está siendo utilizado" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "Byte buffer debe de ser 16 bytes" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Bytes debe estar entre 0 y 255." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "No se puede eliminar valores" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "No puede ser pull mientras este en modo de salida" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "No se puede obtener la temperatura." + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "No se puede tener ambos canales en el mismo pin" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "No se puede leer sin pin MISO." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "No se puede grabar en un archivo" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "No se puede volver a montar '/' cuando el USB esta activo." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "No se puede reiniciar a bootloader porque no hay bootloader presente." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "No se puede asignar un valor cuando la dirección es input." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "Cannot subclass slice" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "No se puede transmitir sin pines MOSI y MISO." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "No se puede obtener inequívocamente sizeof escalar" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "No se puede escribir sin pin MOSI." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "CharateristicBuffer escritura no proporcionada" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Clock pin init fallido" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Clock stretch demasiado largo " + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Clock unit está siendo utilizado" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "Entrada de columna debe ser digitalio.DigitalInOut" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "Command debe estar entre 0 y 255." + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "No se puede inicializar la UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "No se pudo asignar el primer buffer" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "No se pudo asignar el segundo buffer" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC ya está siendo utilizado" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "El pin Data 0 debe estar alineado a bytes" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Trozo de datos debe seguir fmt chunk" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "Data es muy grande para el paquete de advertisement." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "Capacidad de destino es mas pequeña que destination_length." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "Rotación de display debe ser en incrementos de 90 grados" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Modo Drive no se usa cuando la dirección es input." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "El canal EXTINT ya está siendo utilizado" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Error en regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Se espera un %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "Se esperaba una Característica." + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "Se esperaba un UUID" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "Se esperaba un tuple de %d, se obtuvo %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "Fallo enviando comando" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "No se puede adquirir el mutex, status: 0x%08lX" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Ha fallado la asignación del buffer RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Falló la asignación del buffer RX de %d bytes" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "No se puede liberar el mutex, err 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "El archivo ya existe" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "Frecuencia capturada por encima de la capacidad. Captura en pausa." + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "La función requiere lock" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Group lleno" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "Operación I/O en archivo cerrado" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "operación I2C no soportada" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"Archivo .mpy incompatible. Actualice todos los archivos .mpy. Consulte " +"http://adafru.it/mpy-update para más información" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "Tamaño incorrecto del buffer" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "error Input/output" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Pin %q inválido" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Archivo BMP inválido" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Frecuencia PWM inválida" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Argumento inválido" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "Inválido bits por valor" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Tamaño de buffer inválido" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "Inválido periodo de captura. Rango válido: 1 - 500" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "Cuenta de canales inválida" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Dirección inválida." + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Archivo inválido" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Formato de fragmento de formato no válido" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Numero inválido de bits" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Fase inválida" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Pin inválido" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Pin inválido para canal izquierdo" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Pin inválido para canal derecho" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "pines inválidos" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Polaridad inválida" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Modo de ejecución inválido." + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "Cuenta de voces inválida" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Archivo wave inválido" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "LHS del agumento por palabra clave deberia ser un identificador" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "Layer ya pertenece a un grupo" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "Layer debe ser una subclase de Group o TileGrid." + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Length debe ser un int" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Longitud no deberia ser negativa" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "MISO pin init fallido." + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "MOSI pin init fallido." + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "Valor máximo de x cuando se refleja es %d" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "Micrófono demora de inicio debe estar en el rango 0.0 a 1.0" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "Debe de ser una subclase de %q" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "El chip no tiene DAC" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "No se encontró el canal DMA" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Sin pin RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Sin pin TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Relojes no disponibles" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Sin bus %q por defecto" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Sin GCLKs libres" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "No hay hardware random disponible" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "Sin soporte de hardware en el pin clk" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Sin soporte de hardware en pin" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "No queda espacio en el dispositivo" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "No existe el archivo/directorio" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "No conectado" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "No reproduciendo" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"El objeto se ha desinicializado y ya no se puede utilizar. Crea un nuevo " +"objeto" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Paridad impar no soportada" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Solo mono de 8 ó 16 bit con " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" +"Solo formato de Windows, sin comprimir BMP soportado: tamaño de encabezado " +"dado es %d" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "El sobremuestreo debe ser un múltiplo de 8" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "PWM duty_cycle debe ser entre 0 y 65535 inclusivo (16 bit resolution)" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" +"PWM frecuencia no esta escrito cuando el variable_frequency es falso en " +"construcion" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Permiso denegado" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Pin no tiene capacidad ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +#, fuzzy +msgid "Plus any modules on the filesystem\n" +msgstr "Incapaz de montar de nuevo el sistema de archivos" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "Pop de un buffer Ps2 vacio" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" +"Presiona cualquier tecla para entrar al REPL. Usa CTRL-D para recargar." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Pull no se usa cuando la dirección es output." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "Calibración de RTC no es soportada en esta placa" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "RTC no soportado en esta placa" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Solo-lectura" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Sistema de archivos de solo-Lectura" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "Solo-lectura" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Canal derecho no soportado" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "La entrada de la fila debe ser digitalio.DigitalInOut" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Ejecutando en modo seguro! La auto-recarga esta deshabilitada.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Ejecutando en modo seguro! No se esta ejecutando el código guardado.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA o SCL necesitan una pull up" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "Sample rate debe ser positivo" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Frecuencia de muestreo demasiado alta. Debe ser menor a %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer está siendo utilizado" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Slice y value tienen diferentes longitudes" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Rebanadas no soportadas" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Dividiendo con sub-capturas" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "El tamaño de la pila debe ser de al menos 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "A Stream le falta el método readinto() o write()." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "Los bits_per_sample del sample no igualan a los del mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "La cuenta de canales del sample no iguala a las del mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "El sample rate del sample no iguala al del mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "El signo del sample no iguala al del mixer" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "La altura del Tile debe dividir exacto la altura del bitmap" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "Ancho del Tile debe dividir exactamente el ancho de mapa de bits" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Demasiados canales en sample." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "Demasiados buses de pantalla" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Muchos displays" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Traceback (ultima llamada reciente):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Argumento tuple o struct_time requerido" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB ocupado" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "Error USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "UUID string no es 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "UUID valor no es un str, int o byte buffer" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "No se pudieron asignar buffers para la conversión con signo" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "No se pudo encontrar un GCLK libre" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Incapaz de inicializar el parser" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "No se pudo leer los datos de la paleta de colores" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Imposible escribir en nvm" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "Tipo de uuid nrfx inesperado" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "Número incomparable de elementos en RHS (%d esperado,%d obtenido)" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Baudrate no soportado" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "tipo de bitmap no soportado" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Formato no soportado" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Operación no soportada" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "valor pull no soportado." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "funciones Viper actualmente no soportan más de 4 argumentos." + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "ADVERTENCIA: El nombre de archivo de tu código tiene dos extensiones\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Bienvenido a Adafruit CircuitPython %s!\n" +"\n" +"Visita learn.adafruit.com/category/circuitpython para obtener guías de " +"proyectos.\n" +"\n" +"Para listar los módulos incorporados por favor haga `help(\"modules\")`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Solicitaste iniciar en modo seguro por " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() deberia devolver None" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() deberia devolver None, no '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "__new__ arg debe ser un user-type" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "se requiere un objeto bytes-like" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "se llamó abort()" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "la dirección %08x no esta alineada a %d bytes" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "address fuera de límites" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "addresses esta vacío" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "argumento es una secuencia vacía" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "el argumento tiene un tipo erroneo" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "argumento número/tipos no coinciden" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "argumento deberia ser un '%q' no un '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "array/bytes requeridos en el lado derecho" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "atributos aún no soportados" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "modo de compilación erroneo" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "especificador de conversion erroneo" + +#: py/objstr.c +msgid "bad format string" +msgstr "formato de string erroneo" + +#: py/binary.c +msgid "bad typecode" +msgstr "typecode erroneo" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "operacion binaria %q no implementada" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bits deben ser 7, 8 ó 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits debe ser 8" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "bits_per_sample debe ser 8 ó 16" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "El argumento de chr() no esta en el rango(256)" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "buffer debe de ser un objeto bytes-like" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "el tamaño del buffer debe de coincidir con el formato" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "Las secciones del buffer necesitan tener longitud igual" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "buffer demasiado pequeño" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "los buffers deben de tener la misma longitud" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "los botones necesitan ser digitalio.DigitalInOut" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "codigo byte no implementado" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "bytes > 8 bits no soportados" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "valor de bytes fuera de rango" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "calibration esta fuera de rango" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "calibration es de solo lectura" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "Valor de calibración fuera del rango +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "solo puede tener hasta 4 parámetros para ensamblar Thumb" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "solo puede tener hasta 4 parámetros para ensamblador Xtensa" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "solo puede almacenar bytecode" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "no se puede agregar un método a una clase ya subclasificada" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "no se puede asignar a la expresión" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "no se puede convertir %s a complejo" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "no se puede convertir %s a float" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "no se puede convertir %s a int" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "no se puede convertir el objeto '%q' a %q implícitamente" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "no se puede convertir Nan a int" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "no se puede convertir address a int" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "no se puede convertir inf en int" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "no se puede convertir a complejo" + +#: py/obj.c +msgid "can't convert to float" +msgstr "no se puede convertir a float" + +#: py/obj.c +msgid "can't convert to int" +msgstr "no se puede convertir a int" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "no se puede convertir a str implícitamente" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "no se puede declarar nonlocal" + +#: py/compile.c +msgid "can't delete expression" +msgstr "no se puede borrar la expresión" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "no se puede hacer una operacion binaria entre '%q' y '%q'" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "no se puede hacer la división truncada de un número complejo" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "no puede tener multiples *x" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "no puede tener multiples *x" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "no se puede convertir implícitamente '%q' a 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "no se puede cargar desde '%q'" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "no se puede cargar con el índice '%q'" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "no se puede colgar al generador recién iniciado" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" +"no se puede enviar un valor que no sea None a un generador recién iniciado" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "no se puede asignar el atributo" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "no se puede almacenar '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "no se puede almacenar para '%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "no se puede almacenar con el indice '%q'" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" +"no se puede cambiar de la numeración automática de campos a la " +"especificación de campo manual" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" +"no se puede cambiar de especificación de campo manual a numeración " +"automática de campos" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "no se pueden crear '%q' instancias" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "no se puede crear instancia" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "no se puede importar name '%q'" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "no se puedo realizar importación relativa" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "chars buffer es demasiado pequeño" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "El argumento de chr() esta fuera de rango(0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "El argumento de chr() no esta en el rango(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "color buffer debe ser 3 bytes (RGB) ó 4 bytes (RGB + pad byte)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "color buffer deberia ser un bytearray o array de tipo 'b' o 'B'" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "color debe estar entre 0x000000 y 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "color deberia ser un int" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "división compleja por cero" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "valores complejos no soportados" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "encabezado de compresión" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "constant debe ser un entero" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "conversión a objeto" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "números decimales no soportados" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "'except' por defecto deberia estar de último" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"el buffer de destino debe ser un bytearray o array de tipo 'B' para " +"bit_depth = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "el buffer de destino debe ser un array de tipo 'H' para bit_depth = 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length debe ser un int >= 0" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "la secuencia de actualizacion del dict tiene una longitud incorrecta" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "división por cero" + +#: py/objdeque.c +msgid "empty" +msgstr "vacío" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "heap vacío" + +#: py/objstr.c +msgid "empty separator" +msgstr "separator vacío" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "secuencia vacía" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "el final del formato mientras se busca el especificador de conversión" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "end_x debe ser un int" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "error = 0x%08lx" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "las excepciones deben derivar de BaseException" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "se esperaba ':' después de un especificador de tipo format" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "se esperaba una tupla/lista" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "esperando un diccionario para argumentos por palabra clave" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "esperando una instrucción de ensamblador" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "esperando solo un valor para set" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "esperando la clave:valor para dict" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "argumento(s) por palabra clave adicionales fueron dados" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "argumento posicional adicional dado" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "el archivo deberia ser una archivo abierto en modo byte" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "sistema de archivos debe proporcionar método de montaje" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "primer argumento para super() debe ser de tipo" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "firstbit debe ser MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "font debe ser 2048 bytes de largo" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "format requiere un dict" + +#: py/objdeque.c +msgid "full" +msgstr "lleno" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "la función no tiene argumentos por palabra clave" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "la función esperaba minimo %d argumentos, tiene %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "la función tiene múltiples valores para el argumento '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "a la función le hacen falta %d argumentos posicionales requeridos" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "falta palabra clave para función" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "la función requiere del argumento por palabra clave '%q'" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "la función requiere del argumento posicional #%d" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "la función toma %d argumentos posicionales pero le fueron dados %d" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "la función toma exactamente 9 argumentos." + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "generador ya se esta ejecutando" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "generador ignorado GeneratorExit" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic debe ser 2048 bytes de largo" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "heap debe ser una lista" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "identificador redefinido como global" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "identificador redefinido como nonlocal" + +#: py/objstr.c +msgid "incomplete format" +msgstr "formato incompleto" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "relleno (padding) incorrecto" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "index fuera de rango" + +#: py/obj.c +msgid "indices must be integers" +msgstr "indices deben ser enteros" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "ensamblador en línea debe ser una función" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "int() arg 2 debe ser >= 2 y <= 36" + +#: py/objstr.c +msgid "integer required" +msgstr "Entero requerido" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "periférico I2C inválido" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "periférico SPI inválido" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "argumentos inválidos" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "certificado inválido" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "index dupterm inválido" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "formato inválido" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "especificador de formato inválido" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "llave inválida" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "decorador de micropython inválido" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "sintaxis inválida" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "sintaxis inválida para entero" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "sintaxis inválida para entero con base %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "sintaxis inválida para número" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "issubclass() arg 1 debe ser una clase" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "issubclass() arg 2 debe ser una clase o tuple de clases" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"join espera una lista de objetos str/bytes consistentes con el mismo objeto" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" +"argumento(s) por palabra clave aún no implementados - usa argumentos " +"normales en su lugar" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "palabras clave deben ser strings" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "etiqueta '%q' no definida" + +#: py/compile.c +msgid "label redefined" +msgstr "etiqueta redefinida" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "argumento length no permitido para este tipo" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lhs y rhs deben ser compatibles" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "la variable local '%q' tiene el tipo '%q' pero la fuente es '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "variable local '%q' usada antes del tipo conocido" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "variable local referenciada antes de la asignación" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "long int no soportado en esta compilación" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "map buffer muy pequeño" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "error de dominio matemático" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "profundidad máxima de recursión excedida" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "la asignación de memoria falló, asignando %u bytes" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "la asignación de memoria falló, el heap está bloqueado" + +#: py/builtinimport.c +msgid "module not found" +msgstr "módulo no encontrado" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "múltiples *x en la asignación" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "multiple bases tienen una instancia conel conflicto diseño" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "herencia multiple no soportada" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "debe hacer un raise de un objeto" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "se deben de especificar sck/mosi/miso" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "debe utilizar argumento de palabra clave para la función clave" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "name '%q' no esta definido" + +#: py/runtime.c +msgid "name not defined" +msgstr "name no definido" + +#: py/compile.c +msgid "name reused for argument" +msgstr "name reusado para argumento" + +#: py/emitnative.c +msgid "native yield" +msgstr "yield nativo" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "necesita más de %d valores para descomprimir" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "potencia negativa sin float support" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "cuenta de corrimientos negativo" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "exception no activa para reraise" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "NIC no disponible" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "no se ha encontrado ningún enlace para nonlocal" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "ningún módulo se llama '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "no hay tal atributo" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "argumento no predeterminado sigue argumento predeterminado" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "digito non-hex encontrado" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "no deberia estar/tener agumento por palabra clave despues de */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" +"no deberia estar/tener agumento por palabra clave despues de argumento por " +"palabra clave" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "no es 128-bit UUID" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" +"no todos los argumentos fueron convertidos durante el formato de string" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "no suficientes argumentos para format string" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "el objeto '%s' no es una tupla o lista" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "el objeto no soporta la asignación de elementos" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "object no soporta la eliminación de elementos" + +#: py/obj.c +msgid "object has no len" +msgstr "el objeto no tiene longitud" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "el objeto no es suscriptable" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "objeto no es un iterator" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "objeto no puede ser llamado" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "objeto no en secuencia" + +#: py/runtime.c +msgid "object not iterable" +msgstr "objeto no iterable" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "el objeto de tipo '%s' no tiene len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "objeto con protocolo de buffer requerido" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "string de longitud impar" + +#: py/objstr.c py/objstrunicode.c +#, fuzzy +msgid "offset out of bounds" +msgstr "address fuera de límites" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "solo se admiten segmentos con step=1 (alias None)" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord espera un carácter" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "ord() espera un carácter, pero encontró un string de longitud %d" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "desbordamiento convirtiendo long int a palabra de máquina" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "palette debe ser 32 bytes de largo" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "palette_index deberia ser un int" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "parámetro de anotación debe ser un identificador" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "los parámetros deben ser registros en secuencia de a2 a a5" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "los parametros deben ser registros en secuencia del r0 al r3" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "coordenadas del pixel fuera de límites" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "valor del pixel require demasiado bits" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "pixel_shader debe ser displayio.Palette o displayio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "pop de un PulseIn vacío" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "pop desde un set vacío" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "pop desde una lista vacía" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): diccionario vacío" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "el 3er argumento de pow() no puede ser 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "pow() con 3 argumentos requiere enteros" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "desbordamiento de cola(queue)" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "import relativo" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "longitud solicitada %d pero el objeto tiene longitud %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "la anotación de retorno debe ser un identificador" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "retorno esperado '%q' pero se obtuvo '%q'" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "rsplit(None,n)" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"sample_source buffer debe ser un bytearray o un array de tipo 'h', 'H', 'b' " +"o'B'" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "frecuencia de muestreo fuera de rango" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "script de compilación no soportado" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "signo no permitido en el espeficador de string format" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "signo no permitido con el especificador integer format 'c'" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "un solo '}' encontrado en format string" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "la longitud de sleep no puede ser negativa" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "slice step no puede ser cero" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "pequeño int desbordamiento" + +#: main.c +msgid "soft reboot\n" +msgstr "reinicio suave\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "índices inicio/final" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "start_x should be an int" +msgstr "y deberia ser un int" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "paso debe ser numero no cero" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "stop debe ser 1 ó 2" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop no se puede alcanzar del principio" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "operación stream no soportada" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "string index fuera de rango" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "índices de string deben ser enteros, no %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "string no soportado; usa bytes o bytearray" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: no se puede indexar" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: index fuera de rango" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: sin campos" + +#: py/objstr.c +msgid "substring not found" +msgstr "substring no encontrado" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() no puede encontrar self" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "error de sintaxis en JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "error de sintaxis en el descriptor uctypes" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "limite debe ser en el rango 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "time.struct_time() toma un sequencio 9" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "tiempo muerto debe ser >= 0.0" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "timestamp fuera de rango para plataform time_t" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "demasiados argumentos provistos con el formato dado" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "demasiados valores para descomprimir (%d esperado)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "tuple index fuera de rango" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "tupla/lista tiene una longitud incorrecta" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "tuple/lista se require en RHS" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "Ambos tx y rx no pueden ser None" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "type '%q' no es un tipo de base aceptable" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "type no es un tipo de base aceptable" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "objeto de tipo '%q' no tiene atributo '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "type acepta 1 ó 3 argumentos" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "ulonglong muy largo" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "Operación unica %q no implementada" + +#: py/parse.c +msgid "unexpected indent" +msgstr "sangría inesperada" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "argumento por palabra clave inesperado" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "argumento por palabra clave inesperado '%q'" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "nombre en unicode escapa" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "sangría no coincide con ningún nivel exterior" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "especificador de conversión %c desconocido" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "codigo format desconocido '%c' para el typo de objeto '%s'" + +#: py/compile.c +msgid "unknown type" +msgstr "tipo desconocido" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "tipo desconocido '%q'" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "No coinciden '{' en format" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "atributo no legible" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "tipo de %q no soportado" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "instrucción de tipo Thumb no admitida '%s' con %d argumentos" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "instrucción Xtensa '%s' con %d argumentos no soportada" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "carácter no soportado '%c' (0x%x) en índice %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "tipo no soportado para %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "tipo de operador no soportado" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "tipos no soportados para %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "numero erroneo de argumentos" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "numero erroneo de valores a descomprimir" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "x value out of bounds" +msgstr "address fuera de límites" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y deberia ser un int" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "y value out of bounds" +msgstr "address fuera de límites" + +#: py/objrange.c +msgid "zero step" +msgstr "paso cero" + +#~ msgid "AP required" +#~ msgstr "AP requerido" + +#~ msgid "Address is not %d bytes long or is in wrong format" +#~ msgstr "Direción no es %d bytes largo o esta en el formato incorrecto" + +#~ msgid "Attempted heap allocation when MicroPython VM not running.\n" +#~ msgstr "" +#~ "Intento de allocation de heap cuando la VM de MicroPython no estaba " +#~ "corriendo.\n" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "No se puede usar dotstar con %s" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "No se pueden agregar servicio en modo Central" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "No se puede anunciar en modo Central" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "No se puede cambiar el nombre en modo Central" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "No se puede conectar en modo Peripheral" + +#~ msgid "Cannot connect to AP" +#~ msgstr "No se puede conectar a AP" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "No se puede desconectar de AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "No se puede establecer STA config" + +#~ msgid "Cannot update i/f status" +#~ msgstr "No se puede actualizar i/f status" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "Características UUID no concide con el Service UUID" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "Características ya esta en uso por otro Serivice" + +#~ msgid "Could not decode ble_uuid, err 0x%04x" +#~ msgstr "No se puede descodificar ble_uuid, err 0x%04x" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Choque en el HardFault_Handler.\n" + +#, fuzzy +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Los datos no caben en el paquete de anuncio." + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "No se sabe cómo pasar objeto a función nativa" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "ESP8226 no soporta modo seguro." + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "ESP8266 no soporta pull down." + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Error en ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "No se puede adquirir el mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Fallo al añadir caracteristica, err: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "No se puede detener el anuncio. status: 0x%02x" + +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Fallo al agregar servicio. err: 0x%02x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "No se puede cambiar el estado del softdevice" + +#, fuzzy +#~ msgid "Failed to connect:" +#~ msgstr "No se puede conectar. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to continue scanning" +#~ msgstr "No se puede iniciar el escaneo. status: 0x%02x" + +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "No se puede iniciar el escaneo. err: 0x%02x" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "No se puede leer el valor del atributo. status 0x%02x" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "No se puede descubrir servicios" + +#~ msgid "Failed to get local address" +#~ msgstr "No se puede obtener la dirección local" + +#~ msgid "Failed to get softdevice state" +#~ msgstr "No se puede obtener el estado del softdevice" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "No se puede notificar el valor del anuncio. status: 0x%02x" + +#~ msgid "Failed to notify or indicate attribute value, err 0x%04x" +#~ msgstr "Error al notificar o indicar el valor del atributo, err 0x%04x" + +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "No se puede leer el valor del atributo. err 0x%02x" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "No se puede leer el valor del atributo. status 0x%02x" + +#, fuzzy +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Error al leer valor del atributo, err 0x%04" + +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "No se puede escribir el valor del atributo. status: 0x%02x" + +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Fallo al registrar el Vendor-Specific UUID, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "No se puede liberar el mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "No se puede inicar el anuncio. status: 0x%02x" + +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "No se puede inicar el anuncio. err: 0x%04x" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "No se puede iniciar el escaneo. status: 0x%02x" + +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "No se puede iniciar el escaneo. err 0x%04x" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "No se puede detener el anuncio. status: 0x%02x" + +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "No se puede detener el anuncio. err: 0x%04x" + +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "No se puede escribir el valor del atributo. err: 0x%04x" + +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "No se puede escribir el valor del atributo. err: 0x%04x" + +#~ msgid "Flash erase failed" +#~ msgstr "Falló borrado de flash" + +#~ msgid "Flash erase failed to start, err 0x%04x" +#~ msgstr "Falló el iniciar borrado de flash, err 0x%04x" + +#~ msgid "Flash write failed" +#~ msgstr "Falló la escritura" + +#~ msgid "Flash write failed to start, err 0x%04x" +#~ msgstr "Falló el iniciar la escritura de flash, err 0x%04x" + +#~ msgid "Function requires lock." +#~ msgstr "La función requiere lock" + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "GPIO16 no soporta pull up." + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Pin bit clock inválido" + +#~ msgid "Invalid clock pin" +#~ msgstr "Pin clock inválido" + +#~ msgid "Invalid data pin" +#~ msgstr "Pin de datos inválido" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "Parece que nuestro código de CircuitPython ha fallado con fuerza. " +#~ "Whoops!\n" +#~ "Por favor, crea un issue en https://github.com/adafruit/circuitpython/" +#~ "issues\n" +#~ " con el contenido de su unidad CIRCUITPY y este mensaje:\n" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "La frecuencia máxima del PWM es %dhz." + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "MicroPython NLR salto fallido. Probable corrupción de memoria.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "Error fatal de MicroPython.\n" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "La frecuencia mínima del PWM es 1hz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "PWM de múltiples frecuencias no soportado. El PWM ya se estableció a %dhz" + +#~ msgid "Must be a Group subclass." +#~ msgstr "Debe ser una subclase de Group." + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Sin soporte PulseIn para %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Sin soporte de hardware para analog out" + +#~ msgid "Not connected." +#~ msgstr "No conectado." + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Solo formato Windows, BMP sin comprimir soportado %d" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Solo se admiten bit maps de color de 8 bits o menos" + +#~ msgid "" +#~ "Only monochrome, indexed 8bpp, and 16bpp or greater BMPs supported: %d " +#~ "bpp given" +#~ msgstr "" +#~ "Solo se admiten BMP monocromos, indexados de 8bpp y 16bpp o superiores:% " +#~ "d bppdado" + +#, fuzzy +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "solo se admiten segmentos con step=1 (alias None)" + +#~ msgid "Only true color (24 bpp or higher) BMP supported %x" +#~ msgstr "Solo color verdadero (24 bpp o superior) BMP admitido %x" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Solo tx soportada en UART1 (GPIO2)" + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "El pin %d no soporta PWM" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Pin %q no tiene capacidades de ADC" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pin(16) no soporta para pull" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Pines no válidos para SPI" + +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel beyond bounds of buffer" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "address fuera de límites" + +#~ msgid "STA must be active" +#~ msgstr "STA debe estar activo" + +#~ msgid "STA required" +#~ msgstr "STA requerido" + +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "El heap de CircuitPython estaba corrupto porque el stack era demasiado " +#~ "pequeño.\n" +#~ "Aumente los límites del tamaño del stacj y presione reset (después de " +#~ "expulsarCIRCUITPY).\n" +#~ "Si no cambió el stack, entonces reporte un issue aquí con el contenido " +#~ "desu unidad CIRCUITPY:\n" + +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "La alimentación del microcontrolador cayó. Por favor asegurate de que tu " +#~ "fuente de alimentación provee\n" +#~ "suficiente energia para todo el circuito y presiona el botón de reset " +#~ "(despuesde expulsar CIRCUITPY).\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "El botón reset fue presionado mientras arrancaba CircuitPython. Presiona " +#~ "otra vez para salir del modo seguro.\n" + +#~ msgid "Tile indices must be 0 - 255" +#~ msgstr "Los índices de Tile deben ser 0 - 255" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Para salir, por favor reinicia la tarjeta sin " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) no existe" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) no puede leer" + +#~ msgid "UUID integer value not in range 0 to 0xffff" +#~ msgstr "El valor integer UUID no está en el rango 0 a 0xffff" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Incapaz de montar de nuevo el sistema de archivos" + +#~ msgid "Unknown type" +#~ msgstr "Tipo desconocido" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "" +#~ "Usa esptool para borrar la flash y vuelve a cargar Python en su lugar" + +#~ msgid "Voice index too high" +#~ msgstr "Index de voz demasiado alto" + +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Estás ejecutando en modo seguro, lo cual significa que algo realmente " +#~ "malo ha sucedido.\n" + +#~ msgid "bad GATT role" +#~ msgstr "mal GATT role" + +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf es demasiado pequeño. necesita %d bytes" + +#~ msgid "buffer too long" +#~ msgstr "buffer demasiado largo" + +#~ msgid "byteorder is not an instance of ByteOrder (got a %s)" +#~ msgstr "byteorder no es instancia de ByteOrder (encontarmos un %s)" + +#~ msgid "can query only one param" +#~ msgstr "puede consultar solo un param" + +#~ msgid "can't get AP config" +#~ msgstr "no se puede obtener AP config" + +#~ msgid "can't get STA config" +#~ msgstr "no se puede obtener STA config" + +#~ msgid "can't set AP config" +#~ msgstr "no se puede establecer AP config" + +#~ msgid "can't set STA config" +#~ msgstr "no se puede establecer STA config" + +#~ msgid "characteristics includes an object that is not a Characteristic" +#~ msgstr "characteristics incluye un objeto que no es una Characteristica" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "color buffer deber ser un buffer o un int" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "ya sea pos o kw args son permitidos" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "se espera un DigitalInOut" + +#~ msgid "expecting a pin" +#~ msgstr "esperando un pin" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "la ubicación de la flash debe estar debajo de 1MByte" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "la frecuencia solo puede ser 80MHz ó 160MHz" + +#~ msgid "impossible baudrate" +#~ msgstr "baudrate imposible" + +#~ msgid "interval not in range 0.0020 to 10.24" +#~ msgstr "El intervalo está fuera del rango de 0.0020 a 10.24" + +#~ msgid "invalid alarm" +#~ msgstr "alarma inválida" + +#~ msgid "invalid buffer length" +#~ msgstr "longitud de buffer inválida" + +#~ msgid "invalid data bits" +#~ msgstr "data bits inválidos" + +#~ msgid "invalid pin" +#~ msgstr "pin inválido" + +#~ msgid "invalid stop bits" +#~ msgstr "stop bits inválidos" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len debe de ser múltiple de 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "" +#~ "falló la asignación de memoria, asignando %u bytes para código nativo" + +#~ msgid "name must be a string" +#~ msgstr "name debe de ser un string" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "no es un canal ADC válido: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "pin sin capacidades IRQ" + +#~ msgid "position must be 2-tuple" +#~ msgstr "posición debe ser 2-tuple" + +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf no es el mismo tamaño que buf" + +#, fuzzy +#~ msgid "readonly attribute" +#~ msgstr "atributo no legible" + +#~ msgid "row must be packed and word aligned" +#~ msgstr "la fila debe estar empacada y la palabra alineada" + +#~ msgid "scan failed" +#~ msgstr "scan ha fallado" + +#~ msgid "services includes an object that is not a Service" +#~ msgstr "services incluye un objeto que no es servicio" + +#~ msgid "tile index out of bounds" +#~ msgstr "el indice del tile fuera de limite" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() acepta exactamente 1 argumento" + +#~ msgid "timeout >100 (units are now seconds, not msecs)" +#~ msgstr "timepo muerto >100 (unidades en segundos)" + +#~ msgid "too many arguments" +#~ msgstr "muchos argumentos" + +#~ msgid "unknown config param" +#~ msgstr "parámetro config desconocido" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "codigo format desconocido '%c' para el typo de objeto 'float'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "codigo format desconocido '%c' para objeto de tipo 'str'" + +#~ msgid "unknown status param" +#~ msgstr "status param desconocido" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() ha fallado" diff --git a/locale/fil.po b/locale/fil.po new file mode 100644 index 0000000000000..cd6f52c393517 --- /dev/null +++ b/locale/fil.po @@ -0,0 +1,3572 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-12-20 22:15-0800\n" +"Last-Translator: Timothy \n" +"Language-Team: fil\n" +"Language: fil\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.1.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " File \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " File \"%q\", line %d" + +#: main.c +msgid " output:\n" +msgstr " output:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c nangangailangan ng int o char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q ay ginagamit" + +#: py/obj.c +msgid "%q index out of range" +msgstr "%q indeks wala sa sakop" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q indeks ay dapat integers, hindi %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "%q must be >= 1" +msgstr "aarehas na haba dapat ang buffer slices" + +#: shared-bindings/fontio/BuiltinFont.c +#, fuzzy +msgid "%q should be an int" +msgstr "y ay dapat int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" +"Ang %q() ay kumukuha ng %d positional arguments pero %d lang ang binigay" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' argument kailangan" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' umaasa ng label" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "Inaasahan ng '%s' ang isang rehistro" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "Inaasahan ng '%s' ang isang espesyal na register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "Inaasahan ng '%s' ang isang FPU register" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "Inaasahan ng '%s' ang isang address sa [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "Inaasahan ng '%s' ang isang integer" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "Inaasahan ng '%s' ang hangang r%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "Inaasahan ng '%s' ay {r0, r1, …}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' integer %d ay wala sa sakop ng %d..%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' integer 0x%x ay wala sa mask na sakop ng 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "'%s' object hindi sumusuporta ng item assignment" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "'%s' object ay hindi sumusuporta sa pagtanggal ng item" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "'%s' object ay walang attribute '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "'%s' object ay hindi iterator" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "'%s' object hindi matatawag" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "'%s' object ay hindi ma i-iterable" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "'%s' object ay hindi maaaring i-subscript" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "'=' Gindi pinapayagan ang alignment sa pag specify ng string format" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "Ang 'S' at 'O' ay hindi suportadong uri ng format" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' kailangan ng 1 argument" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' sa labas ng function" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' sa labas ng loop" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' sa labas ng loop" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' kailangan ng hindi bababa sa 2 argument" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' kailangan ng integer arguments" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' kailangan ng 1 argument" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' sa labas ng function" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' sa labas ng function" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x ay dapat na assignment target" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", sa %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 para sa complex power" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "3-arg pow() hindi suportado" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Isang channel ng hardware interrupt ay ginagamit na" + +#: shared-bindings/_bleio/Address.c +#, fuzzy, c-format +msgid "Address must be %d bytes long" +msgstr "ang palette ay dapat 32 bytes ang haba" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Lahat ng I2C peripherals ginagamit" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Lahat ng SPI peripherals ay ginagamit" + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "All UART peripherals are in use" +msgstr "Lahat ng I2C peripherals ginagamit" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Lahat ng event channels ginagamit" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Lahat ng sync event channels ay ginagamit" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Lahat ng timers para sa pin na ito ay ginagamit" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Lahat ng timer ginagamit" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "Hindi supportado ang AnalogOut" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut ay 16 bits. Value ay dapat hindi hihigit pa sa 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "Hindi supportado ang AnalogOut sa ibinigay na pin" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Isa pang send ay aktibo na" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "May halfwords (type 'H') dapat ang array" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Array values ay dapat single bytes." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Awtomatikong pag re-reload ay OFF.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Ang awtomatikong pag re-reload ay ON. i-save lamang ang mga files sa USB " +"para patakbuhin sila o pasukin ang REPL para i-disable ito.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Ang bit clock at word select dapat makibahagi sa isang clock unit" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "Bit depth ay dapat multiple ng 8." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Ang parehong mga pin ay dapat na sumusuporta sa hardware interrupts" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "Ang liwanag ay dapat sa gitna ng 0 o 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Mali ang size ng buffer. Dapat %d bytes." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Buffer dapat ay hindi baba sa 1 na haba" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy, c-format +msgid "Bus pin %d is already in use" +msgstr "Ginagamit na ang DAC" + +#: shared-bindings/_bleio/UUID.c +#, fuzzy +msgid "Byte buffer must be 16 bytes." +msgstr "buffer ay dapat bytes-like object" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Sa gitna ng 0 o 255 dapat ang bytes." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Hindi mabura ang values" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Hindi makakakuha ng pull habang nasa output mode" + +#: ports/nrf/common-hal/microcontroller/Processor.c +#, fuzzy +msgid "Cannot get temperature" +msgstr "Hindi makuha ang temperatura. status 0x%02x" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Hindi maaaring output ang mga parehong channel sa parehong pin" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Hindi maaring mabasa kapag walang MISO pin." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Hindi ma-record sa isang file" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "Hindi ma-remount '/' kapag aktibo ang USB." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "Hindi ma-reset sa bootloader dahil walang bootloader." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "Hindi ma i-set ang value kapag ang direksyon ay input." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "Hindi magawa ang sublcass slice" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Hindi maaaring ilipat kapag walang MOSI at MISO pin." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "Hindi puedeng hindi sigurado ang get sizeof scalar" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Hindi maaring isulat kapag walang MOSI pin." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Nabigo sa pag init ng Clock pin." + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Masyadong mahaba ang Clock stretch" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Clock unit ginagamit" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +#, fuzzy +msgid "Command must be an int between 0 and 255" +msgstr "Sa gitna ng 0 o 255 dapat ang bytes." + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Hindi ma-initialize ang UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Hindi ma-iallocate ang first buffer" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Hindi ma-iallocate ang second buffer" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "Ginagamit na ang DAC" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy +msgid "Data 0 pin must be byte aligned" +msgstr "graphic ay dapat 2048 bytes ang haba" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Dapat sunurin ng Data chunk ang fmt chunk" + +#: ports/nrf/common-hal/_bleio/Adapter.c +#, fuzzy +msgid "Data too large for advertisement packet" +msgstr "Hindi makasya ang data sa loob ng advertisement packet" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" +"Ang kapasidad ng destinasyon ay mas maliit kaysa sa destination_length." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Drive mode ay hindi ginagamit kapag ang direksyon ay input." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Ginagamit na ang EXTINT channel" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "May pagkakamali sa REGEX" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Umasa ng %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +#, fuzzy +msgid "Expected a Characteristic" +msgstr "Hindi mabasa and Characteristic." + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +#, fuzzy +msgid "Expected a UUID" +msgstr "Umasa ng %q" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Nabigo sa pag kuha ng mutex, status: 0x%08lX" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Nabigong ilaan ang RX buffer" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Nabigong ilaan ang RX buffer ng %d bytes" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Nabigo sa pagrelease ng mutex, status: 0x%08lX" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "Mayroong file" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "Function nangangailangan ng lock" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Puno ang group" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "I/O operasyon sa saradong file" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "Hindi supportado ang operasyong I2C" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +".mpy file hindi compatible. Maaring i-update lahat ng .mpy files. See http://" +"adafru.it/mpy-update for more info." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "May mali sa Input/Output" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Mali ang %q pin" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Mali ang BMP file" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Mali ang PWM frequency" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Maling argumento" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Mali ang buffer size" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "Maling bilang ng channel" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Mali ang direksyon." + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Mali ang file" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Mali ang format ng chunk size" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Mali ang bilang ng bits" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Mali ang phase" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Mali ang pin" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Mali ang pin para sa kaliwang channel" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Mali ang pin para sa kanang channel" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Mali ang pins" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Mali ang polarity" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Mali ang run mode." + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "Maling bilang ng voice" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "May hindi tama sa wave file" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "LHS ng keyword arg ay dapat na id" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Haba ay dapat int" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Haba ay dapat hindi negatibo" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "Hindi ma-initialize ang MISO pin." + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "Hindi ma-initialize ang MOSI pin." + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "Ang delay ng startup ng mikropono ay dapat na nasa 0.0 hanggang 1.0" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Walang DAC sa chip" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Walang DMA channel na mahanap" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Walang RX pin" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Walang TX pin" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Walang default na %q bus" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Walang libreng GCLKs" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Walang magagamit na hardware random" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Walang support sa hardware ang pin" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Walang file/directory" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "Not connected" +msgstr "Hindi maka connect sa AP" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "Hindi playing" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"Object ay deinitialized at hindi na magagamit. Lumikha ng isang bagong " +"Object." + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Odd na parity ay hindi supportado" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Tanging 8 o 16 na bit mono na may " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "Oversample ay dapat multiple ng 8." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "PWM duty_cycle ay dapat sa loob ng 0 at 65535 (16 bit resolution)" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" +"PWM frequency hindi writable kapag variable_frequency ay False sa pag buo." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Walang pahintulot" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Ang pin ay walang kakayahan sa ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "Kasama ang kung ano pang modules na sa filesystem\n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" +"Pindutin ang anumang key upang pumasok sa REPL. Gamitin ang CTRL-D upang i-" +"reload." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Pull hindi ginagamit kapag ang direksyon ay output." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "RTC calibration ay hindi supportado ng board na ito" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "Hindi supportado ang RTC sa board na ito" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Basahin-lamang" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Basahin-lamang mode" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "Basahin-lamang" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Hindi supportado ang kanang channel" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Tumatakbo sa safe mode! Awtomatikong pag re-reload ay OFF.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Tumatakbo sa safe mode! Hindi tumatakbo ang nai-save na code.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "Kailangan ng pull up resistors ang SDA o SCL" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "Sample rate ay dapat positibo" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Sample rate ay masyadong mataas. Ito ay dapat hindi hiigit sa %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer ginagamit" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Slice at value iba't ibang haba." + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Hindi suportado ang Slices" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Binibiyak gamit ang sub-captures" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "Ang laki ng stack ay dapat na hindi bababa sa 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Stream kulang ng readinto() o write() method." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "Ang bits_per_sample ng sample ay hindi tugma sa mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "Ang channel count ng sample ay hindi tugma sa mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "Ang sample rate ng sample ay hindi tugma sa mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "Ang signedness ng sample hindi tugma sa mixer" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Sobra ang channels sa sample." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Traceback (pinakahuling huling tawag): \n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Tuple o struct_time argument kailangan" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "Busy ang USB" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "May pagkakamali ang USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Hindi ma-allocate ang buffers para sa naka-sign na conversion" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Hindi mahanap ang libreng GCLK" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Hindi ma-init ang parser" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Hindi ma i-sulat sa NVM." + +#: ports/nrf/common-hal/_bleio/UUID.c +#, fuzzy +msgid "Unexpected nrfx uuid type" +msgstr "hindi inaasahang indent" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Hindi supportadong baudrate" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "Hindi supportadong tipo ng bitmap" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Hindi supportadong format" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Hindi sinusuportahang operasyon" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Hindi suportado ang pull value." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" +"Ang mga function ng Viper ay kasalukuyang hindi sumusuporta sa higit sa 4 na " +"argumento" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "BABALA: Ang pangalan ng file ay may dalawang extension\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Mabuhay sa Adafruit CircuitPython %s!\n" +"\n" +"Mangyaring bisitahin ang learn.adafruit.com/category/circuitpython para sa " +"project guides.\n" +"\n" +"Para makita ang listahan ng modules, `help(“modules”)`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Ikaw ang humiling sa safe mode sa pamamagitan ng " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init __ () dapat magbalik na None" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() dapat magbalink na None, hindi '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "__new__ arg ay dapat na user-type" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "a bytes-like object ay kailangan" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() tinawag" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "address %08x ay hindi pantay sa %d bytes" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "wala sa sakop ang address" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "walang laman ang address" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "arg ay walang laman na sequence" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "may maling type ang argument" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "hindi tugma ang argument num/types" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "argument ay dapat na '%q' hindi '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "array/bytes kinakailangan sa kanang bahagi" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "attributes hindi sinusuportahan" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "masamang mode ng compile" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "masamang pag convert na specifier" + +#: py/objstr.c +msgid "bad format string" +msgstr "maling format ang string" + +#: py/binary.c +msgid "bad typecode" +msgstr "masamang typecode" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "binary op %q hindi implemented" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bits ay dapat 7, 8 o 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits ay dapat walo (8)" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "bits_per_sample ay dapat 8 o 16" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "branch wala sa range" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "buffer ay dapat bytes-like object" + +#: shared-module/struct/__init__.c +#, fuzzy +msgid "buffer size must match format" +msgstr "aarehas na haba dapat ang buffer slices" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "aarehas na haba dapat ang buffer slices" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "masyadong maliit ang buffer" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "ang buffers ay dapat parehas sa haba" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "byte code hindi pa implemented" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "hindi sinusuportahan ang bytes > 8 bits" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "bytes value wala sa sakop" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "kalibrasion ay wala sa sakop" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "pagkakalibrate ay basahin lamang" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "ang halaga ng pagkakalibrate ay wala sa sakop +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "maaari lamang magkaroon ng hanggang 4 na parameter sa Thumb assembly" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "maaari lamang magkaroon ng hanggang 4 na parameter sa Xtensa assembly" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "maaring i-save lamang ang bytecode" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" +"hindi madagdag ang isang espesyal na method sa isang na i-subclass na class" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "hindi ma i-assign sa expression" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "hindi ma-convert %s sa complex" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "hindi ma-convert %s sa int" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "hindi ma-convert %s sa int" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "hindi maaaring i-convert ang '%q' na bagay sa %q nang walang pahiwatig" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "hindi ma i-convert NaN sa int" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "hindi ma i-convert ang address sa INT" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "hindi ma i-convert inf sa int" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "hindi ma-convert sa complex" + +#: py/obj.c +msgid "can't convert to float" +msgstr "hindi ma-convert sa float" + +#: py/obj.c +msgid "can't convert to int" +msgstr "hindi ma-convert sa int" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "hindi ma i-convert sa string ng walang pahiwatig" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "hindi madeclare nonlocal sa outer code" + +#: py/compile.c +msgid "can't delete expression" +msgstr "hindi mabura ang expression" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "hindi magawa ang binary op sa gitna ng '%q' at '%q'" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" +"hindi maaaring gawin ang truncated division ng isang kumplikadong numero" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "hindi puede ang maraming **x" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "hindi puede ang maraming *x" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "hindi maaaring ma-convert ang '% qt' sa 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "hidi ma i-load galing sa '%q'" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "hindi ma i-load gamit ng '%q' na index" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "hindi mapadala ang send throw sa isang kaka umpisang generator" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "hindi mapadala ang non-None value sa isang kaka umpisang generator" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "hindi ma i-set ang attribute" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "hindi ma i-store ang '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "hindi ma i-store sa '%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "hindi ma i-store gamit ng '%q' na index" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" +"hindi mapalitan ang awtomatikong field numbering sa manual field " +"specification" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" +"hindi mapalitan ang manual field specification sa awtomatikong field " +"numbering" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "hindi magawa '%q' instances" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "hindi magawa ang instance" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "hindi ma-import ang name %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "hindi maaring isagawa ang relative import" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "casting" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "masyadong maliit ang buffer" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "chr() arg wala sa sakop ng range(0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "chr() arg wala sa sakop ng range(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "color buffer ay dapat na 3 bytes (RGB) o 4 bytes (RGB + pad byte)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "ang color buffer ay dapat bytearray o array na type ‘b’ or ‘B’" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "color ay dapat mula sa 0x000000 hangang 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "color ay dapat na int" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "kumplikadong dibisyon sa pamamagitan ng zero" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "kumplikadong values hindi sinusuportahan" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "compression header" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "constant ay dapat na integer" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "kombersyon to object" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "decimal numbers hindi sinusuportahan" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "default 'except' ay dapat sa huli" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"ang destination buffer ay dapat na isang bytearray o array ng uri na 'B' " +"para sa bit_depth = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" +"ang destination buffer ay dapat na isang array ng uri 'H' para sa bit_depth " +"= 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "ang destination_length ay dapat na isang int >= 0" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "may mali sa haba ng dict update sequence" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "dibisyon ng zero" + +#: py/objdeque.c +msgid "empty" +msgstr "walang laman" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "walang laman ang heap" + +#: py/objstr.c +msgid "empty separator" +msgstr "walang laman na separator" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "walang laman ang sequence" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "sa huli ng format habang naghahanap sa conversion specifier" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "end_x should be an int" +msgstr "y ay dapat int" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "ang mga exceptions ay dapat makuha mula sa BaseException" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "umaasa ng ':' pagkatapos ng format specifier" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "umaasa ng tuple/list" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "umaasa ng dict para sa keyword args" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "umaasa ng assembler instruction" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "umaasa sa value para sa set" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "umaasang key: halaga para sa dict" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "dagdag na keyword argument na ibinigay" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "dagdag na positional argument na ibinigay" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "file ay dapat buksan sa byte mode" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "ang filesystem dapat mag bigay ng mount method" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "unang argument ng super() ay dapat type" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "firstbit ay dapat MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "masyadong malaki ang float" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "font ay dapat 2048 bytes ang haba" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "kailangan ng format ng dict" + +#: py/objdeque.c +msgid "full" +msgstr "puno" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "ang function ay hindi kumukuha ng mga argumento ng keyword" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "function na inaasahang %d ang argumento, ngunit %d ang nakuha" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "ang function ay nakakuha ng maraming values para sa argument '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "function kulang ng %d required na positional arguments" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "function nangangailangan ng keyword-only argument" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "function nangangailangan ng keyword argument '%q'" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "function nangangailangan ng positional argument #%d" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" +"ang function ay kumuhuha ng %d positional arguments ngunit %d ang ibinigay" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "function kumukuha ng 9 arguments" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "insinasagawa na ng generator" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "hindi pinansin ng generator ang GeneratorExit" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic ay dapat 2048 bytes ang haba" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "list dapat ang heap" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "identifier ginawang global" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "identifier ginawang nonlocal" + +#: py/objstr.c +msgid "incomplete format" +msgstr "hindi kumpleto ang format" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "hindi kumpleto ang format key" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "mali ang padding" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "index wala sa sakop" + +#: py/obj.c +msgid "indices must be integers" +msgstr "ang mga indeks ay dapat na integer" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "inline assembler ay dapat na function" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "int() arg 2 ay dapat >=2 at <= 36" + +#: py/objstr.c +msgid "integer required" +msgstr "kailangan ng int" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "maling I2C peripheral" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "hindi wastong SPI peripheral" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "mali ang mga argumento" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "mali ang cert" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "mali ang dupterm index" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "hindi wastong pag-format" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "mali ang format specifier" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "mali ang key" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "mali ang micropython decorator" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "mali ang step" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "mali ang sintaks" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "maling sintaks sa integer" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "maling sintaks sa integer na may base %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "maling sintaks sa number" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "issubclass() arg 1 ay dapat na class" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "issubclass() arg 2 ay dapat na class o tuple ng classes" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"join umaaasang may listahan ng str/bytes objects na naalinsunod sa self " +"object" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" +"kindi pa ipinapatupad ang (mga) argument(s) ng keyword - gumamit ng normal " +"args" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "ang keywords dapat strings" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "label '%d' kailangan na i-define" + +#: py/compile.c +msgid "label redefined" +msgstr "ang label ay na-define ulit" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "length argument ay walang pahintulot sa ganitong type" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lhs at rhs ay dapat magkasundo" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "local '%q' ay may type '%q' pero ang source ay '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "local '%q' ginamit bago alam ang type" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "local variable na reference bago na i-assign" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "long int hindi sinusuportahan sa build na ito" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "masyadong maliit ang buffer map" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "may pagkakamali sa math domain" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "lumagpas ang maximum recursion depth" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "nabigo ang paglalaan ng memorya, paglalaan ng %u bytes" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "abigo ang paglalaan ng memorya, ang heap ay naka-lock" + +#: py/builtinimport.c +msgid "module not found" +msgstr "module hindi nakita" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "maramihang *x sa assignment" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "maraming bases ay may instance lay-out conflict" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "maraming inhertance hindi sinusuportahan" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "dapat itaas ang isang object" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "dapat tukuyin lahat ng SCK/MOSI/MISO" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "dapat gumamit ng keyword argument para sa key function" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "name '%q' ay hindi defined" + +#: py/runtime.c +msgid "name not defined" +msgstr "name hindi na define" + +#: py/compile.c +msgid "name reused for argument" +msgstr "name muling ginamit para sa argument" + +#: py/emitnative.c +msgid "native yield" +msgstr "native yield" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "kailangan ng higit sa %d na halaga upang i-unpack" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "negatibong power na walang float support" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "negative shift count" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "walang aktibong exception para i-reraise" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "walang magagamit na NIC" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "no binding para sa nonlocal, nahanap" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "walang module na '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "walang ganoon na attribute" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "non-default argument sumusunod sa default argument" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "non-hex digit nahanap" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "non-keyword arg sa huli ng */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "non-keyword arg sa huli ng keyword arg" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "hindi lahat ng arguments na i-convert habang string formatting" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "kulang sa arguments para sa format string" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "object '%s' ay hindi tuple o list" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "ang object na '%s' ay hindi maaaring i-subscript" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "ang object ay hindi sumusuporta sa pagbura ng item" + +#: py/obj.c +msgid "object has no len" +msgstr "object walang len" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "ang bagay ay hindi maaaring ma-subscript" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "object ay hindi iterator" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "hindi matatawag ang object" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "object wala sa sequence" + +#: py/runtime.c +msgid "object not iterable" +msgstr "object hindi ma i-iterable" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "object na type '%s' walang len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "object na may buffer protocol kinakailangan" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "odd-length string" + +#: py/objstr.c py/objstrunicode.c +#, fuzzy +msgid "offset out of bounds" +msgstr "wala sa sakop ang address" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "ang mga slices lamang na may hakbang = 1 (aka None) ang sinusuportahan" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord umaasa ng character" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "ord() umaasa ng character pero string ng %d haba ang nakita" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "overflow nagcoconvert ng long int sa machine word" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "ang palette ay dapat 32 bytes ang haba" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "palette_index ay dapat na int" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "parameter annotation ay dapat na identifier" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "ang mga parameter ay dapat na nagrerehistro sa sequence a2 hanggang a5" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "ang mga parameter ay dapat na nagrerehistro sa sequence r0 hanggang r3" + +#: shared-bindings/displayio/Bitmap.c +#, fuzzy +msgid "pixel coordinates out of bounds" +msgstr "wala sa sakop ang address" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "pixel_shader ay dapat displayio.Palette o displayio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "pop mula sa walang laman na PulseIn" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "pop sa walang laman na set" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "pop galing sa walang laman na list" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): dictionary ay walang laman" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "pow() 3rd argument ay hindi maaring 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "pow() na may 3 argumento kailangan ng integers" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "puno na ang pila (overflow)" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "relative import" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "hiniling ang haba %d ngunit may haba ang object na %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "return annotation ay dapat na identifier" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "return umasa ng '%q' pero ang nakuha ay ‘%q’" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "rsplit(None,n)" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"ang sample_source buffer ay dapat na isang bytearray o array ng uri na 'h', " +"'H', 'b' o'B'" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "pagpili ng rate wala sa sakop" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "puno na ang schedule stack" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "script kompilasyon hindi supportado" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "sign hindi maaring string format specifier" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "sign hindi maari sa integer format specifier 'c'" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "isang '}' nasalubong sa format string" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "sleep length ay dapat hindi negatibo" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "slice step ay hindi puedeng 0" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "small int overflow" + +#: main.c +msgid "soft reboot\n" +msgstr "malambot na reboot\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "start/end indeks" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "start_x should be an int" +msgstr "y ay dapat int" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "step ay dapat hindi zero" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "stop dapat 1 o 2" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop hindi maabot sa simula" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "stream operation hindi sinusuportahan" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "indeks ng string wala sa sakop" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "ang indeks ng string ay dapat na integer, hindi %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "string hindi supportado; gumamit ng bytes o kaya bytearray" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: hindi ma-index" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: index hindi maabot" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: walang fields" + +#: py/objstr.c +msgid "substring not found" +msgstr "substring hindi nahanap" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() hindi mahanap ang sarili" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "sintaks error sa JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "may pagkakamali sa sintaks sa uctypes descriptor" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "ang threshold ay dapat sa range 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "time.struct_time() kumukuha ng 9-sequence" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "timeout must be >= 0.0" +msgstr "bits ay dapat walo (8)" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "wala sa sakop ng timestamp ang platform time_t" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "masyadong maraming mga argumento na ibinigay sa ibinigay na format" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "masyadong maraming values para i-unpact (umaasa ng %d)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "indeks ng tuple wala sa sakop" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "mali ang haba ng tuple/list" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx at rx hindi pwedeng parehas na None" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "hindi maari ang type na '%q' para sa base type" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "hindi puede ang type para sa base type" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "type object '%q' ay walang attribute '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "type kumuhuha ng 1 o 3 arguments" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "ulonglong masyadong malaki" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "unary op %q hindi implemented" + +#: py/parse.c +msgid "unexpected indent" +msgstr "hindi inaasahang indent" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "hindi inaasahang argumento ng keyword" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "hindi inaasahang argumento ng keyword na '%q'" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "unicode name escapes" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "unindent hindi tugma sa indentation level sa labas" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "hindi alam ang conversion specifier na %c" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "hindi alam ang format code '%c' para sa object na ang type ay '%s'" + +#: py/compile.c +msgid "unknown type" +msgstr "hindi malaman ang type (unknown type)" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "hindi malaman ang type '%q'" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "hindi tugma ang '{' sa format" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "hindi mabasa ang attribute" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "Hindi supportadong tipo ng %q" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "hindi sinusuportahan ang thumb instruktion '%s' sa %d argumento" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "hindi sinusuportahan ang instruction ng Xtensa '%s' sa %d argumento" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "hindi sinusuportahan ang format character na '%c' (0x%x) sa index %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "hindi sinusuportahang type para sa %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "hindi sinusuportahang type para sa operator" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "hindi sinusuportahang type para sa %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "mali ang bilang ng argumento" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "maling number ng value na i-unpack" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "x value out of bounds" +msgstr "wala sa sakop ang address" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y ay dapat int" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "y value out of bounds" +msgstr "wala sa sakop ang address" + +#: py/objrange.c +msgid "zero step" +msgstr "zero step" + +#~ msgid "AP required" +#~ msgstr "AP kailangan" + +#~ msgid "C-level assert" +#~ msgstr "C-level assert" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "Hindi maarang maglagay ng service sa Central mode" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "Hindi ma advertise habang nasa Central mode" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "Hindi mapalitan ang pangalan sa Central mode" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "Hindi maconnect sa Peripheral mode" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Hindi maka connect sa AP" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Hindi ma disconnect sa AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "Hindi ma-set ang STA Config" + +#~ msgid "Cannot update i/f status" +#~ msgstr "Hindi ma-update i/f status" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Nagcrash sa HardFault_Handler.\n" + +#, fuzzy +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Hindi makasya ang data sa loob ng advertisement packet" + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "Hindi alam ipasa ang object sa native function" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "Walang safemode support ang ESP8266." + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "Walang pull down support ang ESP8266." + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Pagkakamali sa ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "Nabigo sa pag kuha ng mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Nabigo sa paglagay ng characteristic, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "Hindi matagumpay ang paglagay ng service, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Hindi matagumpay ang paglagay ng service, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Nabigo sa pagbago ng softdevice state, error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to connect:" +#~ msgstr "Hindi makaconnect, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to continue scanning" +#~ msgstr "Hindi maituloy ang pag scan, status: 0x%0xlX" + +#, fuzzy +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Hindi maituloy ang pag scan, status: 0x%0xlX" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "Hindi matagumpay ang pagbuo ng mutex, status: 0x%0xlX" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "Nabigo sa pagdiscover ng services, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to get local address" +#~ msgstr "Nabigo sa pagkuha ng local na address, , error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to get softdevice state" +#~ msgstr "Nabigo sa pagkuha ng softdevice state, error: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Hindi mabalitaan ang attribute value, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Hindi mabasa ang value ng attribute, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Hindi mabasa ang value ng attribute, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Hindi maisulat ang gatts value, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "" +#~ "Hindi matagumpay ang paglagay ng Vender Specific UUID, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "Nabigo sa pagrelease ng mutex, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "Hindi masimulaan ang advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Hindi masimulaan ang advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "Hindi masimulaan mag i-scan, status: 0x%0xlX" + +#, fuzzy +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Hindi masimulaan mag i-scan, status: 0x%0xlX" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "Hindi mahinto ang advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Hindi mahinto ang advertisement, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Hindi maisulat ang attribute value, status: 0x%08lX" + +#, fuzzy +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Hindi maisulat ang gatts value, status: 0x%08lX" + +#~ msgid "Function requires lock." +#~ msgstr "Kailangan ng lock ang function." + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "Walang pull down support ang GPI016." + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Mali ang bit clock pin" + +#~ msgid "Invalid clock pin" +#~ msgstr "Mali ang clock pin" + +#~ msgid "Invalid data pin" +#~ msgstr "Mali ang data pin" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "Mukhang ang core CircuitPython code nag crash. Ay!\n" +#~ "Maaring mag file ng issue sa https://github.com/adafruit/circuitpython/" +#~ "issues\n" +#~ "kasama ng laman ng iyong CIRCUITPY drive at ang message na ito:\n" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "Pinakamataas na PWM frequency ay %dhz." + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "CircuitPython NLR jump nabigo. Maaring memory corruption.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "CircuitPython fatal na pagkakamali.\n" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "Pinakamababang PWM frequency ay 1hz." + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "Hindi sinusuportahan ang maraming mga PWM frequency. PWM na naka-set sa " +#~ "%dhz." + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Walang PulseIn support sa %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Hindi supportado ng hardware ang analog out." + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Tanging Windows format, uncompressed BMP lamang ang supportado %d" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Tanging bit maps na may 8 bit color o mas mababa ang supportado" + +#, fuzzy +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "" +#~ "ang mga slices lamang na may hakbang = 1 (aka None) ang sinusuportahan" + +#~ msgid "Only true color (24 bpp or higher) BMP supported %x" +#~ msgstr "Dapat true color (24 bpp o mas mataas) BMP lamang ang supportado %x" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Tanging suportado ang TX sa UART1 (GPIO2)." + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "Walang PWM support sa pin %d" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Walang kakayahang ADC ang pin %q" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Walang pull support ang Pin(16)" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Mali ang pins para sa SPI" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "wala sa sakop ang address" + +#~ msgid "STA must be active" +#~ msgstr "Dapat aktibo ang STA" + +#~ msgid "STA required" +#~ msgstr "STA kailangan" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "Ang CircuitPython heap ay na corrupt dahil ang stack ay maliit.\n" +#~ "Maaring i-increase ang stack size limit at i-press ang reset (pagkatapos " +#~ "i-eject ang CIRCUITPY.\n" +#~ "Kung hindi mo pinalitan ang stack, mag file ng issue dito kasama ng laman " +#~ "ng CIRCUITPY drive:\n" + +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "Ang kapangyarihan ng mikrokontroller ay bumaba. Mangyaring suriin ang " +#~ "power supply \n" +#~ "pindutin ang reset (pagkatapos i-eject ang CIRCUITPY).\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "Ang reset button ay pinindot habang nag boot ang CircuitPython. Pindutin " +#~ "ulit para lumabas sa safe mode.\n" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Para lumabas, paki-reset ang board na wala ang " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "Walang UART(%d)" + +#~ msgid "UART(1) can't read" +#~ msgstr "Hindi mabasa ang UART(1)" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Hindi ma-remount ang filesystem" + +#~ msgid "Unknown type" +#~ msgstr "Hindi alam ang type" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "" +#~ "Gamitin ang esptool upang burahin ang flash at muling i-upload ang Python" + +#~ msgid "Voice index too high" +#~ msgstr "Index ng Voice ay masyadong mataas" + +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "Ikaw ay tumatakbo sa safe mode dahil may masamang nangyari.\n" + +#~ msgid "[addrinfo error %d]" +#~ msgstr "[addrinfo error %d]" + +#~ msgid "buffer too long" +#~ msgstr "masyadong mahaba ng buffer" + +#~ msgid "can query only one param" +#~ msgstr "maaaring i-query lamang ang isang param" + +#~ msgid "can't get AP config" +#~ msgstr "hindi makuha ang AP config" + +#~ msgid "can't get STA config" +#~ msgstr "hindi makuha ang STA config" + +#~ msgid "can't set AP config" +#~ msgstr "hindi makuha ang AP config" + +#~ msgid "can't set STA config" +#~ msgstr "hindi makuha ang STA config" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "color buffer ay dapat buffer or int" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "pos o kw args ang pinahihintulutan" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "umasa ng DigitalInOut" + +#~ msgid "expecting a pin" +#~ msgstr "umaasa ng isang pin" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "dapat na mas mababa sa 1MB ang lokasyon ng flash" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "ang frequency ay dapat 80Mhz or 160MHz lamang" + +#~ msgid "impossible baudrate" +#~ msgstr "impossibleng baudrate" + +#~ msgid "invalid alarm" +#~ msgstr "mali ang alarm" + +#~ msgid "invalid buffer length" +#~ msgstr "mali ang buffer length" + +#~ msgid "invalid data bits" +#~ msgstr "mali ang data bits" + +#~ msgid "invalid pin" +#~ msgstr "mali ang pin" + +#~ msgid "invalid stop bits" +#~ msgstr "mali ang stop bits" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len ay dapat multiple ng 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "" +#~ "nabigo ang paglalaan ng memorya, naglalaan ng %u bytes para sa native code" + +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "ang keywords dapat strings" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "hindi tamang ADC Channel: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "walang IRQ capabilities ang pin" + +#~ msgid "position must be 2-tuple" +#~ msgstr "position ay dapat 2-tuple" + +#, fuzzy +#~ msgid "readonly attribute" +#~ msgstr "hindi mabasa ang attribute" + +#~ msgid "row must be packed and word aligned" +#~ msgstr "row ay dapat packed at ang word nakahanay" + +#~ msgid "scan failed" +#~ msgstr "nabigo ang pag-scan" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() kumukuha ng 1 argument" + +#~ msgid "timeout >100 (units are now seconds, not msecs)" +#~ msgstr "timeout >100 (units ay seconds, hindi na msecs)" + +#~ msgid "too many arguments" +#~ msgstr "masyadong maraming argumento" + +#~ msgid "unknown config param" +#~ msgstr "hindi alam na config param" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "hindi alam ang format code '%c' sa object na ang type ay 'float'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "" +#~ "hindi alam ang format ng code na '%c' para sa object ng type ay 'str'" + +#~ msgid "unknown status param" +#~ msgstr "hindi alam na status param" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "nabigo ang wifi_set_ip_info()" diff --git a/locale/fr.po b/locale/fr.po new file mode 100644 index 0000000000000..64abb8f9fd9b8 --- /dev/null +++ b/locale/fr.po @@ -0,0 +1,3685 @@ +# French translation. +# Copyright (C) 2018 +# This file is distributed under the same license as the PACKAGE package. +# Pierrick Couturier , 2018. +# Olivier Deveault +# +msgid "" +msgstr "" +"Project-Id-Version: 0.1\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2019-04-14 20:05+0100\n" +"Last-Translator: Pierrick Couturier \n" +"Language-Team: fr\n" +"Language: fr\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=utf-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"Fin d'éxecution du code. En attente de recharge.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Fichier \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Fichier \"%q\", ligne %d" + +#: main.c +msgid " output:\n" +msgstr " sortie:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c nécessite un entier 'int' ou un caractère 'char'" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q utilisé" + +#: py/obj.c +msgid "%q index out of range" +msgstr "index %q hors gamme" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "les indices %q doivent être des entiers, pas %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "%q must be >= 1" +msgstr "%d doit être >=1" + +#: shared-bindings/fontio/BuiltinFont.c +#, fuzzy +msgid "%q should be an int" +msgstr "y doit être un entier (int)" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() prend %d arguments positionnels mais %d ont été donnés" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' argument requis" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' attend un label" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' attend un registre" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects a special register" +msgstr "'%s' attend un registre special" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' attend un registre FPU" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' attend une adresse de la forme [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' attend un entier" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' s'attend au plus à r%d" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' attend {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' l'entier %d n'est pas dans la gamme %d..%d" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' l'entier 0x%x ne correspond pas au masque 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "l'objet '%s' ne supporte pas l'assignation d'éléments" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "l'objet '%s' ne supporte pas la suppression d'éléments" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "l'objet '%s' n'a pas d'attribut '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "l'objet '%s' n'est pas un itérateur" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "objet '%s' n'est pas appelable" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "objet '%s' n'est pas itérable" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "l'objet '%s' n'est pas sous-scriptable" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "'=' alignement non autorisé dans la spéc. de format de chaîne" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' et 'O' ne sont pas des types de format supportés" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' nécessite 1 argument" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' en dehors d'une fonction" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' en dehors d'une boucle" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' en dehors d'une boucle" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' nécessite au moins 2 arguments" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' nécessite des arguments entiers" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' nécessite 1 argument" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' en dehors d'une fonction" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' en dehors d'une fonction" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x doit être la cible de l'assignement" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", dans %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 à une puissance complexe" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "pow() non supporté avec 3 arguments" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Un canal d'interruptions matérielles est déjà utilisé" + +#: shared-bindings/_bleio/Address.c +#, fuzzy, c-format +msgid "Address must be %d bytes long" +msgstr "L'adresse doit être longue de %d octets" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +#, fuzzy +msgid "All I2C peripherals are in use" +msgstr "Tous les périphériques I2C sont utilisés" + +#: ports/nrf/common-hal/busio/SPI.c +#, fuzzy +msgid "All SPI peripherals are in use" +msgstr "Tous les périphériques SPI sont utilisés" + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "All UART peripherals are in use" +msgstr "Tous les périphériques I2C sont utilisés" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Tous les canaux d'événements sont utilisés" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Tous les canaux d'événements de synchro sont utilisés" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Tous les timers pour cette broche sont utilisés" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Tous les timers sont utilisés" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "Fonctionnalité AnalogOut non supportée" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" +"AnalogOut est seulement 16 bits. Les valeurs doivent être inf. à 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "'AnalogOut' n'est pas supporté sur la broche indiquée" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Un autre envoi est déjà actif" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Le tableau doit contenir des demi-mots (type 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Les valeurs du tableau doivent être des octets simples 'bytes'." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "L'auto-chargement est désactivé.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Auto-chargement activé. Copiez simplement les fichiers en USB pour les " +"lancer ou entrez sur REPL pour le désactiver.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "'bit clock' et 'word select' doivent partager une horloge" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "La profondeur de bit doit être un multiple de 8." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Les deux entrées doivent supporter les interruptions matérielles" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "La luminosité doit être entre 0 et 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "Luminosité non-ajustable" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Tampon de taille incorrect. Devrait être de %d octets." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Le tampon doit être de longueur au moins 1" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy, c-format +msgid "Bus pin %d is already in use" +msgstr "La broche %d du bus est déjà utilisée" + +#: shared-bindings/_bleio/UUID.c +#, fuzzy +msgid "Byte buffer must be 16 bytes." +msgstr "Le tampon d'octets doit être de 16 octets." + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Les octets 'bytes' doivent être entre 0 et 255" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Impossible de supprimer les valeurs" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Ne peut être tiré ('pull') en mode 'output'" + +#: ports/nrf/common-hal/microcontroller/Processor.c +#, fuzzy +msgid "Cannot get temperature" +msgstr "Impossible de lire la température" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Les 2 canaux de sortie ne peuvent être sur la même broche" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Impossible de lire sans broche MISO." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Impossible d'enregistrer vers un fichier" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "'/' ne peut être remonté quand l'USB est actif." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" +"Ne peut être redémarré vers le bootloader car il n'y a pas de bootloader." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "Impossible d'affecter une valeur quand la direction est 'input'." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "On ne peut faire de sous-classes de tranches" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Pas de transfert sans broches MOSI et MISO." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "Impossible d'obtenir la taille du scalaire sans ambigüité" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Impossible d'écrire sans broche MOSI." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "Ecriture sur 'CharacteristicBuffer' non fournie" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Echec de l'init. de la broche d'horloge" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Période de l'horloge trop longue" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Horloge en cours d'utilisation" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "L'entrée 'Column' doit être un digitalio.DigitalInOut" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +#, fuzzy +msgid "Command must be an int between 0 and 255" +msgstr "La commande doit être un entier entre 0 et 255" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "L'UART n'a pu être initialisé" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Impossible d'allouer le 1er tampon" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Impossible d'allouer le 2e tampon" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC déjà utilisé" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy +msgid "Data 0 pin must be byte aligned" +msgstr "La broche 'Data 0' doit être aligné sur l'octet" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Un bloc de données doit suivre un bloc de format" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "Données trop volumineuses pour un paquet de diffusion" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "La capacité de destination est plus petite que 'destination_length'." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "La rotation d'affichage doit se faire par incréments de 90 degrés" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Le mode Drive n'est pas utilisé quand la direction est 'input'." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Canal EXTINT déjà utilisé" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Erreur dans l'expression régulière" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Attendu un %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +#, fuzzy +msgid "Expected a Characteristic" +msgstr "Une 'Characteristic' est attendue" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +#, fuzzy +msgid "Expected a UUID" +msgstr "Un UUID est attendu" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "Tuple de longueur %d attendu, obtenu %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Echec de l'obtention de mutex, err 0x%04x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Echec de l'allocation du tampon RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Echec de l'allocation de %d octets du tampon RX" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Impossible de libérer mutex, err 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "Le fichier existe" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "La fréquence capturée est au delà des capacités. Capture en pause." + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "La fonction nécessite un verrou" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Groupe plein" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "opération d'E/S sur un fichier fermé" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "opération sur I2C non supportée" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"Fichier .mpy incompatible. Merci de mettre à jour tous les fichiers .mpy." +"Voir http://adafru.it/mpy-update pour plus d'informations." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "Taille de tampon incorrecte" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "Erreur d'entrée/sortie" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Broche invalide pour '%q'" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, fuzzy +msgid "Invalid BMP file" +msgstr "Fichier BMP invalide" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Fréquence de PWM invalide" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Argument invalide" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "Bits par valeur invalides" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +#, fuzzy +msgid "Invalid buffer size" +msgstr "Longueur de tampon invalide" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "Période de capture invalide. Gamme valide: 1 à 500" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid channel count" +msgstr "Nombre de canaux invalide" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Direction invalide" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Fichier invalide" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Taille de bloc de formatage invalide" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Nombre de bits invalide" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Phase invalide" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Broche invalide" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Broche invalide pour le canal gauche" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Broche invalide pour le canal droit" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Broches invalides" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Polarité invalide" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Mode de lancement invalide." + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid voice count" +msgstr "Nombre de voix invalide" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Fichier WAVE invalide" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "La partie gauche de l'argument nommé doit être un identifiant" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "'Layer' doit être un 'Group' ou une sous-classe 'TileGrid'." + +#: py/objslice.c +msgid "Length must be an int" +msgstr "La longueur doit être un nombre entier" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "La longueur ne doit pas être négative" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "Echec de l'init. de la broche MISO" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "Echec de l'init. de la broche MOSI" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "La valeur max. de x est %d lors d'une opération miroir" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "Le délais au démarrage du micro doit être entre 0.0 et 1.0" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Pas de DAC sur la puce" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Aucun canal DMA trouvé" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Pas de broche RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Pas de broche TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Pas d'horloge disponible" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Pas de bus %q par défaut" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Pas de GCLK libre" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Pas de source matérielle d'aléa disponible" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Pas de support matériel pour cette broche" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "Il n'y a plus d'espace libre sur le périphérique" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Fichier/dossier introuvable" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "Not connected" +msgstr "Non connecté" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "Ne joue pas" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"L'objet a été désinitialisé et ne peut plus être utilisé. Créez un nouvel " +"objet." + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "Odd parity is not supported" +msgstr "Parité impaire non supportée" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Uniquement 8 ou 16 bit mono avec " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" +"Seul le format BMP Windows, non compressé est supporté: la taille de " +"l'entêtefournie est %d" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "Le sur-échantillonage doit être un multiple de 8." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" +"La valeur de cycle PWM doit être entre 0 et 65535 inclus (résolution de 16 " +"bits)" + +#: shared-bindings/pulseio/PWMOut.c +#, fuzzy +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" +"La fréquence de PWM n'est pas modifiable quand variable_frequency est False " +"à la construction." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Permission refusée" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "La broche ne peut être utilisée pour l'ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +#, fuzzy +msgid "Plus any modules on the filesystem\n" +msgstr "Ainsi que tout autre module présent sur le système de fichiers\n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "Appuyez sur une touche pour entrer sur REPL ou CTRL-D pour recharger." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Le tirage 'pull' n'est pas utilisé quand la direction est 'output'." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "étalonnage de la RTC non supportée sur cette carte" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "RTC non supportée sur cette carte" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Lecture seule" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Système de fichier en lecture seule" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "Objet en lecture seule" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Canal droit non supporté" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "L'entrée de ligne 'Row' doit être un digitalio.DigitalInOut" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Mode sans-échec! Auto-chargement désactivé.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Mode sans-échec! Le code sauvegardé n'est pas éxecuté.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA ou SCL a besoin d'une résistance de tirage ('pull up')" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Sample rate must be positive" +msgstr "Le taux d'échantillonage doit être positif" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Taux d'échantillonage trop élevé. Doit être inf. à %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Sérialiseur en cours d'utilisation" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Tranche et valeur de tailles différentes" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Tranches non supportées" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Fractionnement avec des sous-captures" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "La pile doit être au moins de 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Il manque une méthode readinto() ou write() au flux." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" +"Le 'bits_per_sample' de l'échantillon ne correspond pas à celui du mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "Le canal de l'échantillon ne correspond pas à celui du mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "L'échantillonage de l'échantillon ne correspond pas à celui du mixer" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "Le signe de l'échantillon ne correspond pas à celui du mixer" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "La hauteur de la tuile doit diviser exactement la hauteur de l'image" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "La largeur de la tuile doit diviser exactement la largeur de l'image" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Trop de canaux dans l'échantillon." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "Trop de bus d'affichage" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Trop d'affichages" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Trace (appels les plus récents en dernier):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Argument de type tuple ou struct_time nécessaire" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB occupé" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "Erreur USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" +"La chaîne UUID n'est pas au format 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" +"la valeur de l'UUID n'est pas une chaîne de caractères, un entier ou un " +"tampon d'octets" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Impossible d'allouer des tampons pour une conversion signée" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Impossible de trouver un GCLK libre" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Impossible d'initialiser le parser" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "Impossible de lire les données de la palette de couleurs" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Impossible d'écrire sur la mémoire non-volatile." + +#: ports/nrf/common-hal/_bleio/UUID.c +#, fuzzy +msgid "Unexpected nrfx uuid type" +msgstr "Type inattendu pour l'uuid nrfx" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" +"Pas de correspondance du nombres d'éléments à droite (attendu %d, obtenu %d)" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Débit non supporté" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "Type de bus d'affichage non supporté" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Format non supporté" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Opération non supportée" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Valeur de tirage 'pull' non supportée." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" +"les fonctions de Viper ne supportent pas plus de 4 arguments actuellement" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "ATTENTION: le nom de fichier de votre code a deux extensions\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Bienvenue sur Adafruit CircuitPython %s!\n" +"\n" +"Visitez learn.adafruit.com/category/circuitpython pour les guides.\n" +"\n" +"Pour lister les modules inclus, tapez `help(\"modules\")`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Vous avez demandé à démarrer en mode sans-échec par " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() doit retourner None" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() doit retourner None, pas '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "l'argument __new__ doit être d'un type défini par l'utilisateur" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "un objet 'bytes-like' est requis" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() appelé" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "l'adresse %08x n'est pas alignée sur %d octets" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "adresse hors limites" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "adresses vides" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "l'argument est une séquence vide" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "l'argument est d'un mauvais type" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "argument num/types ne correspond pas" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "l'argument devrait être un(e) '%q', pas '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "tableau/octets requis à droite" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "attribut pas encore supporté" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "mauvais mode de compilation" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "mauvaise spécification de conversion" + +#: py/objstr.c +msgid "bad format string" +msgstr "chaîne mal-formée" + +#: py/binary.c +msgid "bad typecode" +msgstr "mauvais code type" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "opération binaire '%q' non implémentée" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bits doivent être 7, 8 ou 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "les bits doivent être 8" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "bits_per_sample must be 8 or 16" +msgstr "'bits_per_sample' doivent être 8 ou 16" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "branch not in range" +msgstr "branche hors-bornes" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "le tampon doit être un objet bytes-like" + +#: shared-module/struct/__init__.c +#, fuzzy +msgid "buffer size must match format" +msgstr "la taille du tampon doit correspondre au format" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "les tranches de tampon doivent être de longueurs égales" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "tampon trop petit" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "les tampons doivent être de la même longueur" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "les boutons doivent être des digitalio.DigitalInOut" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "bytecode non implémenté" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "octets > 8 bits non supporté" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "valeur des octets hors bornes" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "étalonnage hors bornes" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "étalonnage en lecture seule" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "valeur de étalonnage hors bornes +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "il peut y avoir jusqu'à 4 paramètres pour l'assemblage Thumb" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "maximum 4 paramètres pour l'assembleur Xtensa" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "ne peut sauvegarder que du bytecode" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" +"impossible d'ajouter une méthode spéciale à une classe déjà sous-classée" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "ne peut pas assigner à une expression" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "ne peut convertir %s en nombre complexe" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "ne peut convertir %s en nombre à virgule flottante 'float'" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "ne peut convertir %s en entier 'int'" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "impossible de convertir l'objet '%q' en '%q' implicitement" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "on ne peut convertir NaN en entier 'int'" + +#: shared-bindings/i2cslave/I2CSlave.c +#, fuzzy +msgid "can't convert address to int" +msgstr "ne peut convertir l'adresse en entier 'int'" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "on ne peut convertir l'infini 'inf' en entier 'int'" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "ne peut convertir en nombre complexe" + +#: py/obj.c +msgid "can't convert to float" +msgstr "ne peut convertir en nombre à virgule flottante 'float'" + +#: py/obj.c +msgid "can't convert to int" +msgstr "ne peut convertir en entier 'int'" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "impossible de convertir en chaine 'str' implicitement" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "ne peut déclarer de 'nonlocal' dans un code externe" + +#: py/compile.c +msgid "can't delete expression" +msgstr "ne peut pas supprimer l'expression" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "opération binaire impossible entre '%q' et '%q'" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "on ne peut pas faire de division tronquée de nombres complexes" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "il ne peut y avoir de **x multiples" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "il ne peut y avoir de *x multiples" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "impossible de convertir implicitement '%q' en 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "impossible de charger depuis '%q'" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "impossible de charger avec l'indice '%q'" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" +"on ne peut effectuer une action de type 'pend throw' sur un générateur " +"fraîchement démarré" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" +"on ne peut envoyer une valeur autre que 'None' à un générateur fraîchement " +"démarré" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "attribut non modifiable" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "impossible de stocker '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "impossible de stocker vers '%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "impossible de stocker avec un indice '%q'" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" +"impossible de passer d'une énumération auto des champs à une spécification " +"manuelle" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" +"impossible de passer d'une spécification manuelle des champs à une " +"énumération auto" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "ne peut pas créer une instance de '%q'" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "ne peut pas créer une instance" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "ne peut pas importer le nom %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "ne peut pas réaliser un import relatif" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "typage" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "tampon de caractères trop petit" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "argument de chr() hors de la gamme range(0x11000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "argument de chr() hors de la gamme range(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "le tampon de couleur doit faire 3 octets (RVB) ou 4 (RVB + pad byte)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +#, fuzzy +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" +"le tampon de couleur doit être un bytearray ou un tableau de type 'b' ou 'B'" + +#: shared-bindings/displayio/Palette.c +#, fuzzy +msgid "color must be between 0x000000 and 0xffffff" +msgstr "la couleur doit être entre 0x000000 et 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +#, fuzzy +msgid "color should be an int" +msgstr "la couleur doit être un entier 'int'" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "division complexe par zéro" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "valeurs complexes non supportées" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "entête de compression" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "constante doit être un entier" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "conversion en objet" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "nombres décimaux non supportés" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "l''except' par défaut doit être en dernier" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"le tampon de destination doit être un tableau de type 'B' pour bit_depth = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" +"le tampon de destination doit être un tableau de type 'H' pour bit_depth = 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length doit être un entier >= 0" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "la séquence de mise à jour de dict a une mauvaise longueur" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "division par zéro" + +#: py/objdeque.c +msgid "empty" +msgstr "vide" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "tas vide" + +#: py/objstr.c +msgid "empty separator" +msgstr "séparateur vide" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "séquence vide" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "fin de format en cherchant une spécification de conversion" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "end_x should be an int" +msgstr "y doit être un entier 'int'" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "erreur = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "les exceptions doivent dériver de 'BaseException'" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "':' attendu après la spécification de format" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "un tuple ou une liste est attendu" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "un dict est attendu pour les arguments nommés" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "une instruction assembleur est attendue" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "une simple valeur est attendue pour l'ensemble 'set'" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "couple clef:valeur attendu pour un dictionnaire 'dict'" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "argument(s) nommé(s) supplémentaire(s) donné(s)" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "argument(s) positionnel(s) supplémentaire(s) donné(s)" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "le fichier doit être un fichier ouvert en mode 'byte'" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "le system de fichier doit fournir une méthode 'mount'" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "le premier argument de super() doit être un type" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "le 1er bit doit être le MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "nombre à virgule flottante trop grand" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "la police doit être longue de 2048 octets" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "le format nécessite un dict" + +#: py/objdeque.c +msgid "full" +msgstr "plein" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "la fonction ne prend pas d'arguments nommés" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "la fonction attendait au plus %d arguments, reçu %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "la fonction a reçu plusieurs valeurs pour l'argument '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "il manque %d arguments obligatoires à la fonction" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "il manque un argument nommé obligatoire" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "il manque l'argument nommé obligatoire '%q'" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "il manque l'argument positionnel obligatoire #%d" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "la fonction prend %d argument(s) positionnels mais %d ont été donné(s)" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "la fonction prend exactement 9 arguments" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "générateur déjà en cours d'exécution" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "le générateur a ignoré GeneratorExit" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic doit être long de 2048 octets" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "le tas doit être une liste" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "identifiant redéfini comme global" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "identifiant redéfini comme nonlocal" + +#: py/objstr.c +msgid "incomplete format" +msgstr "format incomplet" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "clé de format incomplète" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "espacement incorrect" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "index hors gamme" + +#: py/obj.c +msgid "indices must be integers" +msgstr "les indices doivent être des entiers" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "l'assembleur doit être une fonction" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "l'argument 2 de int() doit être >=2 et <=36" + +#: py/objstr.c +msgid "integer required" +msgstr "entier requis" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "périphérique I2C invalide" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "périphérique SPI invalide" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "arguments invalides" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "certificat invalide" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "index invalide pour dupterm" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "format invalide" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "spécification de format invalide" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "clé invalide" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "décorateur micropython invalide" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "pas invalide" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "syntaxe invalide" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "syntaxe invalide pour un entier" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "syntaxe invalide pour un entier de base %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "syntaxe invalide pour un nombre" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "l'argument 1 de issubclass() doit être une classe" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" +"l'argument 2 de issubclass() doit être une classe ou un tuple de classes" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"'join' s'attend à une liste d'objets str/bytes cohérents avec l'objet self" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" +"argument(s) nommé(s) pas encore implémenté(s) - utilisez les arguments " +"normaux" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "les noms doivent être des chaînes de caractères" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "label '%q' non supporté" + +#: py/compile.c +msgid "label redefined" +msgstr "label redéfini" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "argument 'length' non-permis pour ce type" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "Les parties gauches et droites doivent être compatibles" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "la variable locale '%q' a le type '%q' mais la source est '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "variable locale '%q' utilisée avant d'en connaitre le type" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "variable locale référencée avant d'être assignée" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "entiers longs non supportés dans cette build" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "tampon trop petit" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "erreur de domaine math" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "profondeur maximale de récursivité dépassée" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "l'allocation de mémoire a échoué en allouant %u octets" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "l'allocation de mémoire a échoué, le tas est vérrouillé" + +#: py/builtinimport.c +msgid "module not found" +msgstr "module introuvable" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "*x multiple dans l'assignement" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "de multiples bases ont un conflit de lay-out d'instance" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "héritages multiples non supportés" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "doit lever un objet" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "sck, mosi et miso doivent tous être spécifiés" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "doit utiliser un argument nommé pour une fonction key" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "nom '%q' non défini" + +#: py/runtime.c +msgid "name not defined" +msgstr "nom non défini" + +#: py/compile.c +msgid "name reused for argument" +msgstr "nom réutilisé comme argument" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "nécessite plus de %d valeurs à dégrouper" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "puissance négative sans support des nombres à virgule flottante" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "compte de décalage négatif" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "aucune exception active à relever" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +#, fuzzy +msgid "no available NIC" +msgstr "adapteur réseau non disponible" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "pas de lien trouvé pour nonlocal" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "pas de module '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "pas de tel attribut" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" +"un argument sans valeur par défaut suit un argument avec valeur par défaut" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "chiffre non-héxadécimale trouvé" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "argument non-nommé après */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "argument non-nommé après argument nommé" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "n'est pas un UUID 128 bits" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" +"tous les arguments n'ont pas été convertis pendant le formatage de la chaîne" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "pas assez d'arguments pour la chaîne de format" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "l'objet '%s' n'est pas un tuple ou une liste" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "l'objet ne supporte pas l'assignation d'éléments" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "l'objet ne supporte pas la suppression d'éléments" + +#: py/obj.c +msgid "object has no len" +msgstr "l'objet n'a pas de 'len'" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "l'objet n'est pas sous-scriptable" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "l'objet n'est pas un itérateur" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "objet non appelable" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "l'objet n'est pas dans la séquence" + +#: py/runtime.c +msgid "object not iterable" +msgstr "objet non itérable" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "l'objet de type '%s' n'a pas de len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "un objet avec un protocole de tampon est nécessaire" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "chaîne de longueur impaire" + +#: py/objstr.c py/objstrunicode.c +#, fuzzy +msgid "offset out of bounds" +msgstr "adresse hors limites" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "seules les tranches avec 'step=1' (cad None) sont supportées" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord attend un caractère" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" +"ord() attend un caractère mais une chaîne de caractère de longueur %d a été " +"trouvée" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "dépassement de capacité en convertissant un entier long en mot machine" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "la palette doit être longue de 32 octets" + +#: shared-bindings/displayio/Palette.c +#, fuzzy +msgid "palette_index should be an int" +msgstr "palette_index devrait être un entier 'int'" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "l'annotation du paramètre doit être un identifiant" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "les paramètres doivent être des registres dans la séquence a2 à a5" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "parameters must be registers in sequence r0 to r3" +msgstr "les paramètres doivent être des registres dans la séquence r0 à r3" + +#: shared-bindings/displayio/Bitmap.c +#, fuzzy +msgid "pixel coordinates out of bounds" +msgstr "coordonnées de pixel hors limites" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "la valeur du pixel requiet trop de bits" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" +"pixel_shader doit être un objet displayio.Palette ou displayio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "'pop' d'une entrée PulseIn vide" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "'pop' d'un ensemble set vide" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "'pop' d'une liste vide" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): dictionnaire vide" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "le 3e argument de pow() ne peut être 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "pow() avec 3 arguments nécessite des entiers" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "dépassement de file" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "import relatif" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "la longueur requise est %d mais l'objet est long de %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "l'annotation de return doit être un identifiant" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "return attendait '%q' mais a reçu '%q'" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"le tampon de sample_source doit être un bytearray ou un tableau de type " +"'h','H', 'b' ou 'B'" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "taux d'échantillonage hors gamme" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "pile de planification pleine" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "compilation de script non supportée" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "signe non autorisé dans les spéc. de formats de chaînes de caractères" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "signe non autorisé avec la spéc. de format d'entier 'c'" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "'}' seule rencontrée dans une chaîne de format" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "la longueur de sleep ne doit pas être négative" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "le pas 'step' de la tranche ne peut être zéro" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "dépassement de capacité d'un entier court" + +#: main.c +msgid "soft reboot\n" +msgstr "redémarrage logiciel\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "indices de début/fin" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "start_x should be an int" +msgstr "'start_x' doit être un entier 'int'" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "le pas 'step' doit être non nul" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "stop doit être 1 ou 2" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop n'est pas accessible au démarrage" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "opération de flux non supportée" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "index de chaîne hors gamme" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "les indices de chaîne de caractères doivent être des entiers, pas %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" +"chaîne de carac. non supportée; utilisez des bytes ou un tableau de bytes" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: indexage impossible" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: index hors limites" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: aucun champs" + +#: py/objstr.c +msgid "substring not found" +msgstr "sous-chaîne non trouvée" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() ne peut pas trouver self" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "erreur de syntaxe JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "erreur de syntaxe dans le descripteur d'uctypes" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "le seuil doit être dans la gamme 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "time.struct_time() prend une séquence de longueur 9" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "timeout must be >= 0.0" +msgstr "'timeout' doit être >=0.0" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "'timestamp' hors bornes pour 'time_t' de la plateforme" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "trop d'arguments fournis avec ce format" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "trop de valeur à dégrouper (%d attendues)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "index du tuple hors gamme" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "tuple/liste a une mauvaise longueur" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "tuple ou liste requis en partie droite" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx et rx ne peuvent être 'None' tous les deux" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "le type '%q' n'est pas un type de base accepté" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "le type n'est pas un type de base accepté" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "l'objet de type '%q' n'a pas d'attribut '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "le type prend 1 ou 3 arguments" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "ulonglong trop grand" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "opération unaire '%q' non implémentée" + +#: py/parse.c +msgid "unexpected indent" +msgstr "indentation inattendue" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "argument nommé inattendu" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "argument nommé '%q' inattendu" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "échappements de nom unicode" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "la désindentation ne correspond à aucune indentation précédente" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "spécification %c de conversion inconnue" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "code de format '%c' inconnu pour un objet de type '%s'" + +#: py/compile.c +msgid "unknown type" +msgstr "type inconnu" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "type '%q' inconnu" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "'{' sans correspondance dans le format" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "attribut illisible" + +#: shared-bindings/displayio/TileGrid.c +#, fuzzy +msgid "unsupported %q type" +msgstr "type de %q non supporté" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "instruction Thumb '%s' non supportée avec %d arguments" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "instruction Xtensa '%s' non supportée avec %d arguments" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "caractère de format '%c' (0x%x) non supporté à l'index %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "type non supporté pour %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "type non supporté pour l'opérateur" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "type non supporté pour %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "'value_count' doit être > 0" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "mauvais nombres d'arguments" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "mauvais nombre de valeurs à dégrouper" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "x value out of bounds" +msgstr "valeur x hors limites" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "y should be an int" +msgstr "y doit être un entier 'int'" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "y value out of bounds" +msgstr "valeur y hors limites" + +#: py/objrange.c +msgid "zero step" +msgstr "'step' nul" + +#~ msgid "AP required" +#~ msgstr "'AP' requis" + +#~ msgid "Address is not %d bytes long or is in wrong format" +#~ msgstr "L'adresse n'est pas longue de %d octets ou est d'un format erroné" + +#~ msgid "Attempted heap allocation when MicroPython VM not running.\n" +#~ msgstr "" +#~ "Tentative d'allocation de tas alors que la VM MicroPython ne tourne pas.\n" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "Impossible d'utiliser 'dotstar' avec %s" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "Impossible d'ajouter des services en mode Central" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "Impossible de publier en mode Central" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "Modification du nom impossible en mode Central" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "Impossible de se connecter en mode 'Peripheral'" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Impossible de se connecter à 'AP'" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Impossible de se déconnecter de 'AP'" + +#~ msgid "Cannot set STA config" +#~ msgstr "Impossible de configurer STA" + +#~ msgid "Cannot update i/f status" +#~ msgstr "le status i/f ne peut être mis à jour" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "L'UUID de 'Characteristic' ne correspond pas à l'UUID du Service" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "'Characteristic' déjà en utilisation par un autre service" + +#~ msgid "Could not decode ble_uuid, err 0x%04x" +#~ msgstr "Impossible de décoder le 'ble_uuid', err 0x%04x" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Plantage vers le 'HardFault_Handler'.\n" + +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Données trop volumineuses pour le paquet de diffusion" + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "Ne sais pas comment passer l'objet à une fonction native" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "L'ESP8266 ne supporte pas le mode sans-échec" + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "L'ESP8266 ne supporte pas le rappel (pull-down)" + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Erreur dans ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "Echec de l'obtention de mutex" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Echec de l'ajout de caractéristique, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "Echec de l'ajout de service" + +#, fuzzy +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Echec de l'ajout de service, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Echec de la modification de l'état du périphérique" + +#, fuzzy +#~ msgid "Failed to connect:" +#~ msgstr "Echec de connection:" + +#, fuzzy +#~ msgid "Failed to continue scanning" +#~ msgstr "Impossible de poursuivre le scan" + +#, fuzzy +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Impossible de poursuivre le scan, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "Echec de la création de mutex" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "Echec de la découverte de services" + +#, fuzzy +#~ msgid "Failed to get local address" +#~ msgstr "Echec de l'obtention de l'adresse locale" + +#, fuzzy +#~ msgid "Failed to get softdevice state" +#~ msgstr "Echec de l'obtention de l'état du périphérique" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Impossible de notifier la valeur de l'attribut. status: 0x%08lX" + +#~ msgid "Failed to notify or indicate attribute value, err 0x%04x" +#~ msgstr "" +#~ "Impossible de notifier ou d'indiquer la valeur de l'attribut, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Impossible de lire la valeur 'CCCD', err 0x%04x" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Impossible de lire la valeur de l'attribut. status: 0x%08lX" + +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Impossible de lire la valeur de l'attribut, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Impossible de lire la valeur de 'gatts', err 0x%04x" + +#, fuzzy +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Echec de l'ajout de l'UUID du fournisseur, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "Impossible de libérer mutex" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "Echec du démarrage de la diffusion" + +#, fuzzy +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Impossible de commencer à diffuser, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "Impossible de commencer à scanner" + +#, fuzzy +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Impossible de commencer à scanner, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "Echec de l'arrêt de diffusion" + +#, fuzzy +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Echec de l'arrêt de diffusion, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Impossible d'écrire la valeur de l'attribut, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Impossible d'écrire la valeur de 'gatts', err 0x%04x" + +#~ msgid "Flash erase failed" +#~ msgstr "L'effacement de la flash a échoué" + +#~ msgid "Flash erase failed to start, err 0x%04x" +#~ msgstr "Echec du démarrage de l'effacement de la flash, err 0x%04x" + +#~ msgid "Flash write failed" +#~ msgstr "L'écriture de la flash échoué" + +#~ msgid "Flash write failed to start, err 0x%04x" +#~ msgstr "Echec du démarrage de l'écriture de la flash, err 0x%04x" + +#~ msgid "Function requires lock." +#~ msgstr "La fonction nécessite un verrou." + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "Le GPIO16 ne supporte pas le tirage (pull-up)" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Broche invalide pour 'bit clock'" + +#~ msgid "Invalid clock pin" +#~ msgstr "Broche d'horloge invalide" + +#~ msgid "Invalid data pin" +#~ msgstr "Broche de données invalide" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "On dirait que notre code CircuitPython a durement planté. Oups !\n" +#~ "Merci de remplir un ticket sur https://github.com/adafruit/circuitpython/" +#~ "issues\n" +#~ "avec le contenu de votre lecteur CIRCUITPY et ce message:\n" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "La fréquence de PWM maximale est %dHz" + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "Saut MicroPython NLR a échoué. Corruption de mémoire possible.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "Erreur fatale de MicroPython.\n" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "La fréquence de PWM minimale est 1Hz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "Les fréquences de PWM multiples ne sont pas supportées. PWM réglé à %dHz" + +#~ msgid "Must be a Group subclass." +#~ msgstr "Doit être une sous-classe de 'Group'" + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Pas de support de PulseIn pour %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Pas de support matériel pour une sortie analogique" + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Seul les BMP non-compressé au format Windows sont supportés %d" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Seules les bitmaps de 8bits par couleur ou moins sont supportées" + +#~ msgid "" +#~ "Only monochrome, indexed 8bpp, and 16bpp or greater BMPs supported: %d " +#~ "bpp given" +#~ msgstr "" +#~ "Seul les BMP monochromes, 8bit indexé et 16bit sont supportés: %d bpp " +#~ "fourni" + +#, fuzzy +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "seuls les slices avec 'step=1' (cad 'None') sont supportées" + +#~ msgid "Only true color (24 bpp or higher) BMP supported %x" +#~ msgstr "Seul les BMP 24bits ou plus sont supportés %x" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Seul le tx est supporté sur l'UART1 (GPIO2)." + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "La broche %d ne supporte pas le PWM" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "La broche %q n'a pas de convertisseur analogique-digital" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pin(16) ne supporte pas le tirage (pull)" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Broche invalide pour le SPI" + +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel au-delà des limites du tampon" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "adresse hors limites" + +#~ msgid "STA must be active" +#~ msgstr "'STA' doit être actif" + +#~ msgid "STA required" +#~ msgstr "'STA' requis" + +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Assertion en mode 'soft-device', id: 0x%08lX, pc: 0x%08lX" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "Le tas (heap) de CircuitPython a été corrompu parce que la pile était " +#~ "trop petite.\n" +#~ "Augmentez la limite de taille de la pile et appuyez sur 'reset' (après " +#~ "avoir éjecté CIRCUITPY).\n" +#~ "Si vous n'avez pas modifié la pile, merci de remplir un ticket avec le " +#~ "contenu de votre lecteur CIRCUITPY :\n" + +#, fuzzy +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "L'alimentation du microcontroleur a chuté. Merci de vérifier que votre " +#~ "alimentation fournit\n" +#~ "suffisamment de puissance pour l'ensemble du circuit et appuyez sur " +#~ "'reset' (après avoir éjecté CIRCUITPY).\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "Le bouton 'reset' a été appuyé pendant le démarrage de CircuitPython. " +#~ "Appuyer de nouveau pour quitter de le mode sans-échec.\n" + +#~ msgid "Tile indices must be 0 - 255" +#~ msgstr "Les indices des tuiles doivent être compris entre 0 et 255 " + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Pour quitter, redémarrez la carte SVP sans " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) n'existe pas" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) ne peut pas lire" + +#~ msgid "UUID integer value not in range 0 to 0xffff" +#~ msgstr "valeur de l'entier UUID est hors-bornes 0 à 0xffff" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Impossible de remonter le système de fichiers" + +#~ msgid "Unknown type" +#~ msgstr "Type inconnu" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "" +#~ "Utilisez 'esptool' pour effacer la flash et recharger Python à la place" + +#~ msgid "Voice index too high" +#~ msgstr "Index de la voix trop grand" + +#, fuzzy +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Vous êtes en mode sans-échec ce qui signifie qu'un imprévu est survenu.\n" + +#~ msgid "bad GATT role" +#~ msgstr "mauvais rôle GATT" + +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "'buf' est trop petit. Besoin de %d octets" + +#~ msgid "buffer too long" +#~ msgstr "tampon trop long" + +#~ msgid "byteorder is not an instance of ByteOrder (got a %s)" +#~ msgstr "'byteorder' n'est pas une instance de ByteOrder (reçu un %s)" + +#~ msgid "can query only one param" +#~ msgstr "ne peut demander qu'un seul paramètre" + +#~ msgid "can't get AP config" +#~ msgstr "impossible de récupérer la config de 'AP'" + +#~ msgid "can't get STA config" +#~ msgstr "impossible de récupérer la config de 'STA'" + +#~ msgid "can't set AP config" +#~ msgstr "impossible de régler la config de 'AP'" + +#~ msgid "can't set STA config" +#~ msgstr "impossible de régler la config de 'STA'" + +#~ msgid "characteristics includes an object that is not a Characteristic" +#~ msgstr "" +#~ "'characteristics' inclut un objet qui n'est pas une 'Characteristic'" + +#, fuzzy +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "le tampon de couleur doit être un tampon ou un entier 'int'" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "soit 'pos', soit 'kw' est permis en argument" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "objet DigitalInOut attendu" + +#~ msgid "expecting a pin" +#~ msgstr "une broche (Pin) est attendue" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "l'emplacement en mémoire flash doit être inférieur à 1Mo" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "la fréquence doit être soit 80MHz soit 160MHz" + +#~ msgid "impossible baudrate" +#~ msgstr "débit impossible" + +#~ msgid "interval not in range 0.0020 to 10.24" +#~ msgstr "intervalle hors bornes 0.0020 à 10.24" + +#~ msgid "invalid alarm" +#~ msgstr "alarme invalide" + +#~ msgid "invalid buffer length" +#~ msgstr "longueur de tampon invalide" + +#~ msgid "invalid data bits" +#~ msgstr "bits de données invalides" + +#~ msgid "invalid pin" +#~ msgstr "broche invalide" + +#~ msgid "invalid stop bits" +#~ msgstr "bits d'arrêt invalides" + +#~ msgid "len must be multiple of 4" +#~ msgstr "'len' doit être un multiple de 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "" +#~ "l'allocation de mémoire a échoué en allouant %u octets pour un code natif" + +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "les noms doivent être des chaînes de caractère" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "canal ADC non valide : %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "la broche ne supporte pas les interruptions (IRQ)" + +#, fuzzy +#~ msgid "position must be 2-tuple" +#~ msgstr "position doit être un 2-tuple" + +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "'rawbuf' n'est pas de la même taille que 'buf'" + +#, fuzzy +#~ msgid "readonly attribute" +#~ msgstr "attribut en lecture seule" + +#~ msgid "scan failed" +#~ msgstr "échec du scan" + +#~ msgid "services includes an object that is not a Service" +#~ msgstr "'services' inclut un object qui n'est pas un 'Service'" + +#~ msgid "tile index out of bounds" +#~ msgstr "indice de tuile hors limites" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() prend exactement 1 argument" + +#~ msgid "timeout >100 (units are now seconds, not msecs)" +#~ msgstr "timeout >100 (exprimé en secondes, pas en ms)" + +#~ msgid "too many arguments" +#~ msgstr "trop d'arguments" + +#~ msgid "unknown config param" +#~ msgstr "paramètre de config. inconnu" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "code de format '%c' inconnu pour un objet de type 'float'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "code de format '%c' inconnu pour un objet de type 'str'" + +#~ msgid "unknown status param" +#~ msgstr "paramètre de statut inconnu" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() a échoué" + +#~ msgid "write_args must be a list, tuple, or None" +#~ msgstr "'write_args' doit être une liste, un tuple ou 'None'" diff --git a/locale/it_IT.po b/locale/it_IT.po new file mode 100644 index 0000000000000..89fb9329e26e9 --- /dev/null +++ b/locale/it_IT.po @@ -0,0 +1,3558 @@ +# Italian translation. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# Enrico Paganin , 2018 +# +#, fuzzy +msgid "" +msgstr "" +"Project-Id-Version: PACKAGE VERSION\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-10-02 16:27+0200\n" +"Last-Translator: Enrico Paganin \n" +"Language-Team: \n" +"Language: it_IT\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " File \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " File \"%q\", riga %d" + +#: main.c +msgid " output:\n" +msgstr " output:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c necessita di int o char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q in uso" + +#: py/obj.c +msgid "%q index out of range" +msgstr "indice %q fuori intervallo" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "gli indici %q devono essere interi, non %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "%q must be >= 1" +msgstr "slice del buffer devono essere della stessa lunghezza" + +#: shared-bindings/fontio/BuiltinFont.c +#, fuzzy +msgid "%q should be an int" +msgstr "y dovrebbe essere un int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() prende %d argomenti posizionali ma ne sono stati forniti %d" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' argomento richiesto" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' aspetta una etichetta" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects a special register" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' aspetta un intero" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' aspetta un registro" + +#: py/emitinlinextensa.c +#, fuzzy, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "intero '%s' non è nell'intervallo %d..%d" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "intero '%s' non è nell'intervallo %d..%d" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "oggeto '%s' non supporta assengnamento di item" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "oggeto '%s' non supporta eliminamento di item" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "l'oggetto '%s' non ha l'attributo '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "l'oggetto '%s' non è un iteratore" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "oggeto '%s' non è chiamabile" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "l'oggetto '%s' non è iterabile" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "oggeto '%s' non è " + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "aligniamento '=' non è permesso per il specificatore formato string" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' e 'O' non sono formati supportati" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' richiede 1 argomento" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' al di fuori della funzione" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' al di fuori del ciclo" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' al di fuori del ciclo" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' richiede almeno 2 argomento" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' richiede argomenti interi" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' richiede 1 argomento" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' al di fuori della funzione" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' al di fuori della funzione" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x deve essere il bersaglio del assegnamento" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", in %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 elevato alla potenza di un numero complesso" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "pow() con tre argmomenti non supportata" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Un canale di interrupt hardware è già in uso" + +#: shared-bindings/_bleio/Address.c +#, fuzzy, c-format +msgid "Address must be %d bytes long" +msgstr "la palette deve essere lunga 32 byte" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Tutte le periferiche I2C sono in uso" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Tutte le periferiche SPI sono in uso" + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "All UART peripherals are in use" +msgstr "Tutte le periferiche I2C sono in uso" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Tutti i canali eventi utilizati" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Tutti i canali di eventi sincronizzati in uso" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Tutti i timer per questo pin sono in uso" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Tutti i timer utilizzati" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "funzionalità AnalogOut non supportata" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut ha solo 16 bit. Il valore deve essere meno di 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "AnalogOut non supportato sul pin scelto" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Another send è gia activato" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Array deve avere mezzoparole (typo 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Valori di Array dovrebbero essere bytes singulari" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Auto-reload disattivato.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"L'auto-reload è attivo. Salva i file su USB per eseguirli o entra nel REPL " +"per disabilitarlo.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" +"Clock di bit e selezione parola devono condividere la stessa unità di clock" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "La profondità di bit deve essere multipla di 8." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Entrambi i pin devono supportare gli interrupt hardware" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "La luminosità deve essere compreso tra 0 e 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "Illiminazione non è regolabile" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Buffer di lunghezza non valida. Dovrebbe essere di %d bytes." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Il buffer deve essere lungo almeno 1" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy, c-format +msgid "Bus pin %d is already in use" +msgstr "DAC già in uso" + +#: shared-bindings/_bleio/UUID.c +#, fuzzy +msgid "Byte buffer must be 16 bytes." +msgstr "i buffer devono essere della stessa lunghezza" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "I byte devono essere compresi tra 0 e 255" + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Impossibile cancellare valori" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "non si può tirare quando nella modalita output" + +#: ports/nrf/common-hal/microcontroller/Processor.c +#, fuzzy +msgid "Cannot get temperature" +msgstr "Impossibile leggere la temperatura. status: 0x%02x" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Impossibile dare in output entrambi i canal sullo stesso pin" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Impossibile leggere senza pin MISO." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Impossibile registrare in un file" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "Non è possibile rimontare '/' mentre l'USB è attiva." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" +"Impossibile resettare nel bootloader poiché nessun bootloader è presente." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "non si può impostare un valore quando direzione è input" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "Impossibile subclasare slice" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Impossibile trasferire senza i pin MOSI e MISO." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "Impossibile ricavare la grandezza scalare di sizeof inequivocabilmente" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Impossibile scrivere senza pin MOSI." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "CharacteristicBuffer scritura non dato" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Inizializzazione del pin di clock fallita." + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Orologio e troppo allungato" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Unità di clock in uso" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +#, fuzzy +msgid "Command must be an int between 0 and 255" +msgstr "I byte devono essere compresi tra 0 e 255" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Impossibile inizializzare l'UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Impossibile allocare il primo buffer" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Impossibile allocare il secondo buffer" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC già in uso" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy +msgid "Data 0 pin must be byte aligned" +msgstr "graphic deve essere lunga 2048 byte" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +#, fuzzy +msgid "Data too large for advertisement packet" +msgstr "Impossibile inserire dati nel pacchetto di advertisement." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "La capacità di destinazione è più piccola di destination_length." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Canale EXTINT già in uso" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Errore nella regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Atteso un %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +#, fuzzy +msgid "Expected a Characteristic" +msgstr "Non è possibile aggiungere Characteristic." + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +#, fuzzy +msgid "Expected a UUID" +msgstr "Atteso un %q" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Impossibile allocare buffer RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Fallita allocazione del buffer RX di %d byte" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "File esistente" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Gruppo pieno" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "operazione I/O su file chiuso" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "operazione I2C non supportata" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"File .mpy incompatibile. Aggiorna tutti i file .mpy. Vedi http://adafru.it/" +"mpy-update per più informazioni." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "Errore input/output" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Pin %q non valido" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "File BMP non valido" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Frequenza PWM non valida" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Argomento non valido" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "bits per valore invalido" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +#, fuzzy +msgid "Invalid buffer size" +msgstr "lunghezza del buffer non valida" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "periodo di cattura invalido. Zona valida: 1 - 500" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid channel count" +msgstr "Argomento non valido" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Direzione non valida." + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "File non valido" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Numero di bit non valido" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Fase non valida" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Pin non valido" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Pin non valido per il canale sinistro" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Pin non valido per il canale destro" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Pin non validi" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Polarità non valida" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Modalità di esecuzione non valida." + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid voice count" +msgstr "Tipo di servizio non valido" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "File wave non valido" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "Layer deve essere un Group o TileGrid subclass" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Length deve essere un intero" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Length deve essere non negativo" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "inizializzazione del pin MISO fallita." + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "inizializzazione del pin MOSI fallita." + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "Valore massimo di x quando rispachiato è %d" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" +"Il ritardo di avvio del microfono deve essere nell'intervallo tra 0.0 e 1.0" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Nessun DAC sul chip" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Nessun canale DMA trovato" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Nessun pin RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Nessun pin TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Nessun orologio a disposizione" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Nessun bus %q predefinito" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Nessun GCLK libero" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Nessun generatore hardware di numeri casuali disponibile" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Nessun supporto hardware sul pin" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "Non che spazio sul dispositivo" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Nessun file/directory esistente" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "Not connected" +msgstr "Impossible connettersi all'AP" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "In pausa" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"L'oggetto è stato deinizializzato e non può essere più usato. Crea un nuovo " +"oggetto." + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "Odd parity is not supported" +msgstr "operazione I2C non supportata" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "L'oversampling deve essere multiplo di 8." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" +"duty_cycle del PWM deve essere compresa tra 0 e 65535 inclusiva (risoluzione " +"a 16 bit)" + +#: shared-bindings/pulseio/PWMOut.c +#, fuzzy +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" +"frequenza PWM frequency non è scrivibile quando variable_frequency è " +"impostato nel costruttore a False." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Permesso negato" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Il pin non ha capacità di ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +#, fuzzy +msgid "Plus any modules on the filesystem\n" +msgstr "Imposssibile rimontare il filesystem" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" +"Premi un qualunque tasto per entrare nel REPL. Usa CTRL-D per ricaricare." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "calibrazione RTC non supportata su questa scheda" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "RTC non supportato su questa scheda" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Sola lettura" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Filesystem in sola lettura" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "Sola lettura" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Canale destro non supportato" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Modalità sicura in esecuzione! Auto-reload disattivato.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Modalità sicura in esecuzione! Codice salvato non in esecuzione.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA o SCL necessitano un pull-up" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Sample rate must be positive" +msgstr "STA deve essere attiva" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "" +"Frequenza di campionamento troppo alta. Il valore deve essere inferiore a %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer in uso" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Slice non supportate" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Suddivisione con sotto-catture" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "La dimensione dello stack deve essere almeno 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Metodi mancanti readinto() o write() allo stream." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Troppi schermi" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Traceback (chiamata più recente per ultima):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Tupla o struct_time richiesto come argomento" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB occupata" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "Errore USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Ipossibilitato ad allocare buffer per la conversione con segno" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Impossibile trovare un GCLK libero" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Inizilizzazione del parser non possibile" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Imposibile scrivere su nvm." + +#: ports/nrf/common-hal/_bleio/UUID.c +#, fuzzy +msgid "Unexpected nrfx uuid type" +msgstr "indentazione inaspettata" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "baudrate non supportato" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "tipo di bitmap non supportato" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Formato non supportato" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Operazione non supportata" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Valore di pull non supportato." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "Le funzioni Viper non supportano più di 4 argomenti al momento" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "ATTENZIONE: Il nome del sorgente ha due estensioni\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "È stato richiesto l'avvio in modalità sicura da " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() deve ritornare None" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() deve ritornare None, non '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "un oggetto byte-like è richiesto" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() chiamato" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "l'indirizzo %08x non è allineato a %d bytes" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "indirizzo fuori limite" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "gli indirizzi sono vuoti" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "l'argomento è una sequenza vuota" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "il tipo dell'argomento è errato" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "discrepanza di numero/tipo di argomenti" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "l'argomento dovrebbe essere un '%q' e non un '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "attributi non ancora supportati" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "specificatore di conversione scorretto" + +#: py/objstr.c +msgid "bad format string" +msgstr "stringa di formattazione scorretta" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "operazione binaria %q non implementata" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "i bit devono essere 7, 8 o 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "i bit devono essere 8" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "bits_per_sample must be 8 or 16" +msgstr "i bit devono essere 7, 8 o 9" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "branch not in range" +msgstr "argomento di chr() non è in range(256)" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +#, fuzzy +msgid "buffer size must match format" +msgstr "slice del buffer devono essere della stessa lunghezza" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "slice del buffer devono essere della stessa lunghezza" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "buffer troppo piccolo" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "i buffer devono essere della stessa lunghezza" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "byte code non implementato" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "byte > 8 bit non supportati" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "valore byte fuori intervallo" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "la calibrazione è fuori intervallo" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "la calibrazione è in sola lettura" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "valore di calibrazione fuori intervallo +/-127" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "sono disponibili fino a 4 parametri per il Xtensa assembly" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "sono disponibili fino a 4 parametri per il Xtensa assembly" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "È possibile salvare solo bytecode" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "impossibile assegnare all'espressione" + +#: py/obj.c +#, fuzzy, c-format +msgid "can't convert %s to complex" +msgstr "non è possibile convertire a complex" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "non è possibile convertire %s a float" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "non è possibile convertire %s a int" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "impossibile convertire l'oggetto '%q' implicitamente in %q" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "impossibile convertire NaN in int" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "impossible convertire indirizzo in int" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "impossibile convertire inf in int" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "non è possibile convertire a complex" + +#: py/obj.c +msgid "can't convert to float" +msgstr "non è possibile convertire a float" + +#: py/obj.c +msgid "can't convert to int" +msgstr "non è possibile convertire a int" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "impossibile convertire a stringa implicitamente" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "impossibile dichiarare nonlocal nel codice esterno" + +#: py/compile.c +msgid "can't delete expression" +msgstr "impossibile cancellare l'espessione" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "impossibile eseguire operazione binaria tra '%q' e '%q'" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "impossibile fare il modulo di un numero complesso" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "impossibile usare **x multipli" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "impossibile usare *x multipli" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "non è possibile convertire implicitamente '%q' in 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "impossibile caricare da '%q'" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "impossibile caricare con indice '%q'" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "impossibile impostare attributo" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "impossibile memorizzare '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "impossibile memorizzare in '%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "impossibile memorizzare con indice '%q'" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "creare '%q' istanze" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "impossibile creare un istanza" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "impossibile imporate il nome %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "impossibile effettuare l'importazione relativa" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "casting" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "buffer dei caratteri troppo piccolo" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "argomento di chr() non è in range(0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "argomento di chr() non è in range(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" +"il buffer del colore deve esseer di 3 byte (RGB) o 4 byte (RGB + pad byte)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" +"buffer del colore deve essere un bytearray o un array di tipo 'b' o 'B'" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "il colore deve essere compreso tra 0x000000 e 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "il colore deve essere un int" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "complex divisione per zero" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "valori complessi non supportai" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "compressione dell'header" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "la costante deve essere un intero" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "conversione in oggetto" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "numeri decimali non supportati" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "'except' predefinito deve essere ultimo" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"il buffer di destinazione deve essere un bytearray o un array di tipo 'B' " +"con bit_depth = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" +"il buffer di destinazione deve essere un array di tipo 'H' con bit_depth = 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length deve essere un int >= 0" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "sequanza di aggiornamento del dizionario ha la lunghezza errata" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "divisione per zero" + +#: py/objdeque.c +msgid "empty" +msgstr "vuoto" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "heap vuoto" + +#: py/objstr.c +msgid "empty separator" +msgstr "separatore vuoto" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "sequenza vuota" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "end_x should be an int" +msgstr "y dovrebbe essere un int" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "errore = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "le eccezioni devono derivare da BaseException" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "':' atteso dopo lo specificatore di formato" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "lista/tupla prevista" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "argomenti nominati necessitano un dizionario" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "istruzione assembler attesa" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "un solo valore atteso per set" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "chiave:valore atteso per dict" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "argomento nominato aggiuntivo fornito" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "argomenti posizonali extra dati" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "il filesystem deve fornire un metodo di mount" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "il primo bit deve essere il più significativo (MSB)" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "float troppo grande" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "il font deve essere lungo 2048 byte" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "la formattazione richiede un dict" + +#: py/objdeque.c +msgid "full" +msgstr "pieno" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "la funzione non prende argomenti nominati" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "la funzione prevede al massimo %d argmoneti, ma ne ha ricevuti %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "la funzione ha ricevuto valori multipli per l'argomento '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "mancano %d argomenti posizionali obbligatori alla funzione" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "argomento nominato mancante alla funzione" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "argomento nominato '%q' mancante alla funzione" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "mancante il #%d argomento posizonale obbligatorio della funzione" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" +"la funzione prende %d argomenti posizionali ma ne sono stati forniti %d" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "la funzione prende esattamente 9 argomenti" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic deve essere lunga 2048 byte" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "l'heap deve essere una lista" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "identificatore ridefinito come globale" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "identificatore ridefinito come nonlocal" + +#: py/objstr.c +msgid "incomplete format" +msgstr "formato incompleto" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "padding incorretto" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "indice fuori intervallo" + +#: py/obj.c +msgid "indices must be integers" +msgstr "gli indici devono essere interi" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "inline assembler deve essere una funzione" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "il secondo argomanto di int() deve essere >= 2 e <= 36" + +#: py/objstr.c +msgid "integer required" +msgstr "intero richiesto" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "periferica I2C invalida" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "periferica SPI invalida" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "argomenti non validi" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "certificato non valido" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "indice dupterm non valido" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "formato non valido" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "specificatore di formato non valido" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "chiave non valida" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "decoratore non valido in micropython" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "step non valida" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "sintassi non valida" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "sintassi invalida per l'intero" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "sintassi invalida per l'intero con base %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "sintassi invalida per il numero" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "il primo argomento di issubclass() deve essere una classe" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" +"il secondo argomento di issubclass() deve essere una classe o una tupla di " +"classi" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"join prende una lista di oggetti str/byte consistenti con l'oggetto stesso" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" +"argomento(i) nominati non ancora implementati - usare invece argomenti " +"normali" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "argomenti nominati devono essere stringhe" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "etichetta '%q' non definita" + +#: py/compile.c +msgid "label redefined" +msgstr "etichetta ridefinita" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lhs e rhs devono essere compatibili" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "local '%q' ha tipo '%q' ma sorgente è '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "locla '%q' utilizzato prima che il tipo fosse noto" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "variabile locale richiamata prima di un assegnamento" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "long int non supportata in questa build" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "map buffer troppo piccolo" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "errore di dominio matematico" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "profondità massima di ricorsione superata" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "allocazione di memoria fallita, allocando %u byte" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "allocazione di memoria fallita, l'heap è bloccato" + +#: py/builtinimport.c +msgid "module not found" +msgstr "modulo non trovato" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "*x multipli nell'assegnamento" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "ereditarietà multipla non supportata" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "deve lanciare un oggetto" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "è necessario specificare tutte le sck/mosi/miso" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "nome '%q'non definito" + +#: py/runtime.c +msgid "name not defined" +msgstr "nome non definito" + +#: py/compile.c +msgid "name reused for argument" +msgstr "nome riutilizzato come argomento" + +#: py/emitnative.c +msgid "native yield" +msgstr "yield nativo" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "necessari più di %d valori da scompattare" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "potenza negativa senza supporto per float" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "nessuna eccezione attiva da rilanciare" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +#, fuzzy +msgid "no available NIC" +msgstr "busio.UART non ancora implementato" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "nessun binding per nonlocal trovato" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "nessun modulo chiamato '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "attributo inesistente" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "argomento non predefinito segue argmoento predfinito" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "trovata cifra non esadecimale" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "argomento non nominato dopo */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "argomento non nominato seguito da argomento nominato" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" +"non tutti gli argomenti sono stati convertiti durante la formatazione in " +"stringhe" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "argomenti non sufficienti per la stringa di formattazione" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "oggetto '%s' non è una tupla o una lista" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "l'oggetto non ha lunghezza" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "l'oggetto non è un iteratore" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "oggetto non in sequenza" + +#: py/runtime.c +msgid "object not iterable" +msgstr "oggetto non iterabile" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "l'oggetto di tipo '%s' non implementa len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "stringa di lunghezza dispari" + +#: py/objstr.c py/objstrunicode.c +#, fuzzy +msgid "offset out of bounds" +msgstr "indirizzo fuori limite" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "solo slice con step=1 (aka None) sono supportate" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord() aspetta un carattere" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" +"ord() aspettava un carattere, ma ha ricevuto una stringa di lunghezza %d" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "overflow convertendo long int in parola" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "la palette deve essere lunga 32 byte" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "palette_index deve essere un int" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "parametri devono essere i registri in sequenza da a2 a a5" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "parameters must be registers in sequence r0 to r3" +msgstr "parametri devono essere i registri in sequenza da a2 a a5" + +#: shared-bindings/displayio/Bitmap.c +#, fuzzy +msgid "pixel coordinates out of bounds" +msgstr "indirizzo fuori limite" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "pixel_shader deve essere displayio.Palette o displayio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "pop sun un PulseIn vuoto" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "pop da un set vuoto" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "pop da una lista vuota" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): il dizionario è vuoto" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "il terzo argomento di pow() non può essere 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "pow() con 3 argomenti richiede interi" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "overflow della coda" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "importazione relativa" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "lunghezza %d richiesta ma l'oggetto ha lunghezza %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "return aspettava '%q' ma ha ottenuto '%q'" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"il buffer sample_source deve essere un bytearray o un array di tipo 'h', " +"'H', 'b' o 'B'" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "frequenza di campionamento fuori intervallo" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "compilazione dello scrip non suportata" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "segno non permesso nello spcificatore di formato della stringa" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "segno non permesso nello spcificatore di formato 'c' della stringa" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "'}' singolo presente nella stringa di formattazione" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "la lunghezza di sleed deve essere non negativa" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "la step della slice non può essere zero" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "small int overflow" + +#: main.c +msgid "soft reboot\n" +msgstr "soft reboot\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "start_x should be an int" +msgstr "y dovrebbe essere un int" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "step deve essere non zero" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop non raggiungibile dall'inizio" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "operazione di stream non supportata" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "indice della stringa fuori intervallo" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "indici della stringa devono essere interi, non %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: impossibile indicizzare" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: indice fuori intervallo" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: nessun campo" + +#: py/objstr.c +msgid "substring not found" +msgstr "sottostringa non trovata" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "errore di sintassi nel JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "errore di sintassi nel descrittore uctypes" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "la soglia deve essere nell'intervallo 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "timeout must be >= 0.0" +msgstr "i bit devono essere 8" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "timestamp è fuori intervallo per il time_t della piattaforma" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "troppi argomenti forniti con il formato specificato" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "troppi valori da scompattare (%d attesi)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "indice della tupla fuori intervallo" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "tupla/lista ha la lunghezza sbagliata" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx e rx non possono essere entrambi None" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "il tipo '%q' non è un tipo di base accettabile" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "il tipo non è un tipo di base accettabile" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "l'oggetto di tipo '%q' non ha l'attributo '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "tipo prende 1 o 3 argomenti" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "ulonglong troppo grande" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "operazione unaria %q non implementata" + +#: py/parse.c +msgid "unexpected indent" +msgstr "indentazione inaspettata" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "argomento nominato inaspettato" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "argomento nominato '%q' inaspettato" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, fuzzy, c-format +msgid "unknown conversion specifier %c" +msgstr "specificatore di conversione %s sconosciuto" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "codice di formattaione '%c' sconosciuto per oggetto di tipo '%s'" + +#: py/compile.c +msgid "unknown type" +msgstr "tipo sconosciuto" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "tipo '%q' sconosciuto" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "'{' spaiato nella stringa di formattazione" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "attributo non leggibile" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "tipo di %q non supportato" + +#: py/emitinlinethumb.c +#, fuzzy, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "istruzione '%s' Xtensa non supportata con %d argomenti" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "istruzione '%s' Xtensa non supportata con %d argomenti" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "carattere di formattazione '%c' (0x%x) non supportato all indice %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "tipo non supportato per %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "tipo non supportato per l'operando" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "tipi non supportati per %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "numero di argomenti errato" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "numero di valori da scompattare non corretto" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "x value out of bounds" +msgstr "indirizzo fuori limite" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y dovrebbe essere un int" + +#: shared-module/displayio/Shape.c +#, fuzzy +msgid "y value out of bounds" +msgstr "indirizzo fuori limite" + +#: py/objrange.c +msgid "zero step" +msgstr "zero step" + +#~ msgid "AP required" +#~ msgstr "AP richiesto" + +#~ msgid "C-level assert" +#~ msgstr "assert a livello C" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "dotstar non può essere usato con %s" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "non si può aggiungere servizi in Central mode" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "non si può pubblicizzare in Central mode" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "non si può cambiare il nome in Central mode" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "non si può connettere in Periferal mode" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Impossible connettersi all'AP" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Impossible disconnettersi all'AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "Impossibile impostare la configurazione della STA" + +#~ msgid "Cannot update i/f status" +#~ msgstr "Impossibile aggiornare status di i/f" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "caratteristico UUID non assomiglia servizio UUID" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "caratteristico già usato da un altro servizio" + +#, fuzzy +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Impossibile inserire dati nel pacchetto di advertisement." + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "Non so come passare l'oggetto alla funzione nativa" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "ESP8266 non supporta la modalità sicura." + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "ESP8266 non supporta pull-down" + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Errore in ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "Impossibile allocare buffer RX" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to connect:" +#~ msgstr "Impossibile connettersi. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to continue scanning" +#~ msgstr "Impossible iniziare la scansione. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Impossible iniziare la scansione. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to get softdevice state" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Impossibile notificare valore dell'attributo. status: 0x%02x" + +#~ msgid "Failed to notify or indicate attribute value, err 0x%04x" +#~ msgstr "Notificamento o indicazione di attribute value fallito, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Tentative leggere attribute value fallito, err 0x%04x" + +#, fuzzy +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Impossibile scrivere valore dell'attributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Non è possibile aggiungere l'UUID del vendor specifico da 128-bit" + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "Impossibile avviare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Impossibile avviare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "Impossible iniziare la scansione. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Impossible iniziare la scansione. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Impossibile fermare advertisement. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Impossibile scrivere valore dell'attributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Impossibile scrivere valore dell'attributo. status: 0x%02x" + +#~ msgid "Flash erase failed" +#~ msgstr "Cancellamento di Flash fallito" + +#~ msgid "Flash erase failed to start, err 0x%04x" +#~ msgstr "Iniziamento di Cancellamento di Flash fallito, err 0x%04x" + +#~ msgid "Flash write failed" +#~ msgstr "Impostazione di Flash fallito" + +#~ msgid "Flash write failed to start, err 0x%04x" +#~ msgstr "Iniziamento di Impostazione di Flash dallito, err 0x%04x" + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "GPIO16 non supporta pull-up" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Pin del clock di bit non valido" + +#~ msgid "Invalid clock pin" +#~ msgstr "Pin di clock non valido" + +#~ msgid "Invalid data pin" +#~ msgstr "Pin dati non valido" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "Frequenza massima su PWM è %dhz" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "Errore fatale in MicroPython.\n" + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "Frequenza minima su PWM è 1hz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "Frequenze PWM multiple non supportate. PWM già impostato a %shz." + +#~ msgid "Must be a Group subclass." +#~ msgstr "Deve essere un Group subclass" + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Nessun supporto per PulseIn per %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Nessun supporto hardware per l'uscita analogica." + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Formato solo di Windows, BMP non compresso supportato %d" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Sono supportate solo bitmap con colori a 8 bit o meno" + +#, fuzzy +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "solo slice con step=1 (aka None) sono supportate" + +#~ msgid "Only true color (24 bpp or higher) BMP supported %x" +#~ msgstr "Solo BMP true color (24 bpp o superiore) sono supportati %x" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Solo tx supportato su UART1 (GPIO2)." + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "PWM non è supportato sul pin %d" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Il pin %q non ha capacità ADC" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pin(16) non supporta pull" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Pin non validi per SPI" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "indirizzo fuori limite" + +#~ msgid "STA must be active" +#~ msgstr "STA deve essere attiva" + +#~ msgid "STA required" +#~ msgstr "STA richiesta" + +#, fuzzy +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "La potenza del microcontrollore è calata. Assicurati che l'alimentazione " +#~ "sia attaccata correttamente\n" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Per uscire resettare la scheda senza " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) non esistente" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) non leggibile" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Imposssibile rimontare il filesystem" + +#~ msgid "Unknown type" +#~ msgstr "Tipo sconosciuto" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "Usa esptool per cancellare la flash e ricaricare Python invece" + +#, fuzzy +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Sei nella modalità sicura che significa che qualcosa di molto brutto è " +#~ "successo.\n" + +#~ msgid "[addrinfo error %d]" +#~ msgstr "[errore addrinfo %d]" + +#~ msgid "buffer too long" +#~ msgstr "buffer troppo lungo" + +#~ msgid "can query only one param" +#~ msgstr "è possibile interrogare solo un parametro" + +#~ msgid "can't get AP config" +#~ msgstr "impossibile recuperare le configurazioni dell'AP" + +#~ msgid "can't get STA config" +#~ msgstr "impossibile recuperare la configurazione della STA" + +#~ msgid "can't set AP config" +#~ msgstr "impossibile impostare le configurazioni dell'AP" + +#~ msgid "can't set STA config" +#~ msgstr "impossibile impostare le configurazioni della STA" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "il buffer del colore deve essere un buffer o un int" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "sono permesse solo gli argomenti pos o kw" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "DigitalInOut atteso" + +#~ msgid "expecting a pin" +#~ msgstr "pin atteso" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "Locazione della flash deve essere inferiore a 1mb" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "la frequenza può essere o 80Mhz o 160Mhz" + +#~ msgid "impossible baudrate" +#~ msgstr "baudrate impossibile" + +#~ msgid "invalid alarm" +#~ msgstr "alarm non valido" + +#~ msgid "invalid buffer length" +#~ msgstr "lunghezza del buffer non valida" + +#~ msgid "invalid data bits" +#~ msgstr "bit dati invalidi" + +#~ msgid "invalid pin" +#~ msgstr "pin non valido" + +#~ msgid "invalid stop bits" +#~ msgstr "bit di stop invalidi" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len deve essere multiplo di 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "" +#~ "allocazione di memoria fallita, allocazione di %d byte per codice nativo" + +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "argomenti nominati devono essere stringhe" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "canale ADC non valido: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "il pin non implementa IRQ" + +#~ msgid "position must be 2-tuple" +#~ msgstr "position deve essere una 2-tuple" + +#, fuzzy +#~ msgid "readonly attribute" +#~ msgstr "attributo non leggibile" + +#~ msgid "row must be packed and word aligned" +#~ msgstr "la riga deve essere compattata e allineata alla parola" + +#~ msgid "scan failed" +#~ msgstr "scansione fallita" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() prende esattamente un argomento" + +#~ msgid "too many arguments" +#~ msgstr "troppi argomenti" + +#~ msgid "unknown config param" +#~ msgstr "parametro di configurazione sconosciuto" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "" +#~ "codice di formattazione '%c' sconosciuto per oggetto di tipo 'float'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "codice di formattazione '%c' sconosciuto per oggetto di tipo 'str'" + +#~ msgid "unknown status param" +#~ msgstr "prametro di stato sconosciuto" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() faillito" diff --git a/locale/ko.po b/locale/ko.po new file mode 100644 index 0000000000000..d502e60c079d3 --- /dev/null +++ b/locale/ko.po @@ -0,0 +1,3133 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# 글라파, 2019. +# +#, fuzzy +msgid "" +msgstr "" +"Project-Id-Version: PACKAGE VERSION\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2019-05-06 14:22-0700\n" +"Last-Translator: \n" +"Language-Team: LANGUAGE \n" +"Language: ko\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"실행 완료 코드. 재장전 을 기다리는 중입니다\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " 파일 \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " 파일 \"%q\", 라인 %d" + +#: main.c +msgid " output:\n" +msgstr " 산출:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c 전수(int)또는 캐릭터(char)필요합니다" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q 사용 중입니다" + +#: py/obj.c +msgid "%q index out of range" +msgstr "%q 인덱스 범위를 벗어났습니다" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q 인덱스는 %s 가 아닌 정수 여야합니다" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "%q 는 >=1이어야합니다" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "%q 는 정수(int) 여야합니다" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' 에는 라벨이 필요합니다" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s%' 에는 레지스터가 필요합니다" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' 에는 특별한 레지스터가 필요합니다" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' 에는 FPU레지스터가 필요합니다" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' 는 정수 여야합니다" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' {r0, r1, ...}은 을 기대합니다" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "'%s' 을 지정할 수 없습니다" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "'%s' 은 삭제할 수 없습니다" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "'%s' 은 수정할 수 없습니다" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "'%s' 을 검색 할 수 없습니다" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "'%s' 은 변경할 수 없습니다" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' 에는 1 개의 독립변수가 필요합니다" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' 는 펑크션 외부에 있습니다" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' 는 루프 외부에 있습니다" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' 는 루프 외부에 있습니다" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' 에는 >=2 개의 독립변수가 필요합니다" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' 에는 1 개의 독립변수가 필요합니다" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' 는 함수 외부에 존재합니다" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' 는 함수 외부에 존재합니다" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", 에서 %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "사용중인 모든 I2C주변 기기" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "사용중인 모든 SPI주변 기기" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "사용중인 모든 UART주변 기기" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "핀의 모든 타이머가 사용 중입니다" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "모든 타이머가 사용 중입니다" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "자동 재 장전이 꺼져 있습니다\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"자동 새로 고침이 켜져 있습니다. USB를 통해 파일을 저장하여 실행하십시오. 비활" +"성화하려면 REPL을 입력하십시오.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "밝기는 0에서 255 사이 여야합니다" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "밝기를 조절할 수 없습니다" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "잘못된 크기의 버퍼. %d 바이트 여야합니다." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "잘못된 크기의 버퍼. >1 여야합니다" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "잘못된 크기의 버퍼. 16 바이트 여야합니다." + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "바이트는 0에서 255 사이 여야합니다." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "값을 삭제할 수 없습니다" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "온도 데이터를 수신 할 수 없습니다" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "MISO핀이 없으면 읽을 수 없습니다" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "파일에 녹음 할 수 없습니다" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "" + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "" + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "명령은 0에서 255 사이의 정수(int) 여야합니다" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC가 현재 사용 중입니다" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "광고 (브로드 캐스트) 패킷에 대한 데이터가 너무 큽니다" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Regex에 오류가 있습니다." + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "%q 이 예상되었습니다." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "특성(Characteristic)이 예상되었습니다." + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "UUID이 예상되었습니다." + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "파일이 유효하지 않습니다" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "형식 청크 크기가 잘못되었습니다" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "비트 수가 유효하지 않습니다" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "단계가 잘못되었습니다" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "핀이 잘못되었습니다" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "왼쪽 채널 핀이 유효하지 않습니다" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "오른쪽 채널 핀이 잘못되었습니다" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "핀이 유효하지 않습니다" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "길이는 정수(int) 여야합니다" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "UUID문자열이 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'형식이 아닙니다" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" +"UUID값이 문자열(str), 정수(int) 또는 바이트버퍼가(byte buffer) 아닙니다" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "파서를 초기화(init) 할 수 없습니다" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "" + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "" + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "비트(bits)는 7, 8 또는 9 여야합니다" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "비트(bits)는 8이어야합니다" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "bits_per_sample은 8 또는 16이어야합니다." + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "" + +#: py/compile.c +msgid "can't delete expression" +msgstr "" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "" + +#: py/objdeque.c +msgid "empty" +msgstr "" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "':'이 예상되었습니다" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "튜플(tuple) 또는 리스트(list)이 예상되었습니다" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "사전(dict)이 예상되었습니다" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "float이 너무 큽니다" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "완전한(full)" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "" + +#: py/objstr.c +msgid "incomplete format" +msgstr "" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "정수가 필요합니다" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "ICT주변 기기가 유효하지 않습니다" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "SPI주변 기기가 유효하지 않습니다" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "cert가 유효하지 않습니다" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "Dupterm index가 유효하지 않습니다" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "형식가 유효하지 않습니다" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "형식 지정자(format specifier)가 유효하지 않습니다" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "키가 유효하지 않습니다" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "단계(step)가 유효하지 않습니다" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "구문(syntax)가 유효하지 않습니다" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "구문(syntax)가 정수가 유효하지 않습니다" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "구문(syntax)가 정수가 유효하지 않습니다" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "숫자에 대한 구문(syntax)가 유효하지 않습니다" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "" + +#: py/compile.c +msgid "name reused for argument" +msgstr "" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "" + +#: py/runtime.c +msgid "object not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "센트랄(중앙) 모드에서는 서비스를 추가 할 수 없습니다" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "센트랄(중앙) 모드로 광고 (브로드 캐스트) 할 수 없습니다" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "센트랄(중앙) 모드에서는 이름을 변경할 수 없습니다" + +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "광고 (브로드 캐스트) 패킷에 대한 데이터가 너무 큽니다" + +#~ msgid "Failed to add service" +#~ msgstr "서비스를 추가하지 못했습니다" + +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "서비스를 추가하지 못했습니다., 오류 0x%04x" + +#~ msgid "Failed to connect:" +#~ msgstr "연결할 수 없다" + +#~ msgid "Failed to continue scanning" +#~ msgstr "스캔을 계속할 수 없습니다" + +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "스캔을 계속할 수 없습니다, 오류 0x%04x" diff --git a/locale/pl.po b/locale/pl.po new file mode 100644 index 0000000000000..67eff44f3aab2 --- /dev/null +++ b/locale/pl.po @@ -0,0 +1,3379 @@ +# Adafruit CircuitPython Polish Translation +# Copyright (C) 2019 +# This file is distributed under the same license as the CircuitPython package. +# Radomir Dopieralski , 2019. +# +msgid "" +msgstr "" +"Project-Id-Version: \n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2019-03-19 18:37-0700\n" +"Last-Translator: Radomir Dopieralski \n" +"Language-Team: pl\n" +"Language: pl\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"Kod wykonany. Czekam na przeładowanie.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Plik \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Plik \"%q\", linia %d" + +#: main.c +msgid " output:\n" +msgstr " wyjście:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c wymaga int lub char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q w użyciu" + +#: py/obj.c +msgid "%q index out of range" +msgstr "%q poza zakresem" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q indeks musi być liczbą całkowitą, a nie %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "%q musi być >= 1" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "%q powinno być typu int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() bierze %d argumentów pozycyjnych, lecz podano %d" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' wymaga argumentu" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' oczekuje etykiety" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' oczekuje rejestru" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' oczekuje rejestru specjalnego" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' oczekuje rejestru FPU" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' oczekuje adresu w postaci [a, b]" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' oczekuje liczby całkowitej" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' oczekuje co najwyżej r%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' oczekuje {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' liczba %d poza zakresem %d..%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' liczba 0x%x nie pasuje do maski 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "'%s' obiekt nie wspiera przypisania do elementów" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "'%s' obiekt nie wspiera usuwania elementów" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "'%s' obiekt nie ma atrybutu '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "'%s' obiekt nie jest iteratorem" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "'%s' nie można wywoływać obiektu" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "'%s' nie można iterować po obiekcie" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "'%s' nie można indeksować obiektu" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "wyrównanie '=' niedozwolone w specyfikacji formatu" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "typy formatowania 'S' oraz 'O' są niewspierane" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' wymaga 1 argumentu" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' poza funkcją" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' poza pętlą" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' poza pętlą" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' wymaga 2 lub więcej argumentów" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' wymaga całkowitych argumentów" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' wymaga 1 argumentu" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' poza funkcją" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' poza funkcją" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x musi być obiektem przypisania" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", w %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 do potęgi zespolonej" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "3-argumentowy pow() jest niewspierany" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Kanał przerwań sprzętowych w użyciu" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "Adres musi mieć %d bajtów" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Wszystkie peryferia I2C w użyciu" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Wszystkie peryferia SPI w użyciu" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "Wszystkie peryferia UART w użyciu" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Wszystkie kanały zdarzeń w użyciu" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Wszystkie kanały zdarzeń synchronizacji w użyciu" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Wszystkie timery tej nóżki w użyciu" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Wszystkie timery w użyciu" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "AnalogOut jest niewspierane" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut ma 16 bitów. Wartość musi być mniejsza od 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "AnalogOut niewspierany na tej nóżce" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Wysyłanie jest już w toku" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Tablica musi zawierać pół-słowa (typ 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Wartości powinny być bajtami." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Samo-przeładowywanie wyłączone.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Samo-przeładowywanie włączone. Po prostu zapisz pliki przez USB aby je " +"uruchomić, albo wejdź w konsolę aby wyłączyć.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Zegar bitowy i wybór słowa muszą współdzielić jednostkę zegara" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "Głębia musi być wielokrotnością 8." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Obie nóżki muszą wspierać przerwania sprzętowe" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "Jasność musi być pomiędzy 0 a 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "Jasność nie jest regulowana" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Zła wielkość bufora. Powinno być %d bajtów." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Bufor musi mieć długość 1 lub więcej" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "Nóżka magistrali %d jest w użyciu" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "Bufor musi mieć 16 bajtów." + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Bytes musi być między 0 a 255." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Nie można usunąć" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Nie ma podciągnięcia w trybie wyjścia" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "Nie można odczytać temperatury" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Nie można mieć obu kanałów na tej samej nóżce" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Nie można czytać bez nóżki MISO" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Nie można nagrać do pliku" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "Nie można przemontować '/' gdy USB działa." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "Nie można zrestartować -- nie ma bootloadera." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "Nie można ustawić wartości w trybie wejścia" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "Nie można dziedziczyć ze slice" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Nie można przesyłać bez nóżek MOSI i MISO." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "Wielkość skalara jest niejednoznaczna" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Nie można pisać bez nóżki MOSI." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "Pisanie do CharacteristicBuffer niewspierane" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Nie powiodło się ustawienie nóżki zegara" + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Rozciągnięcie zegara zbyt duże" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Jednostka zegara w użyciu" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "Kolumny muszą być typu digitalio.DigitalInOut" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "Komenda musi być int pomiędzy 0 a 255" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Ustawienie UART nie powiodło się" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Nie udała się alokacja pierwszego bufora" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Nie udała się alokacja drugiego bufora" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC w użyciu" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "Nóżka data 0 musi być wyrównana do bajtu" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Fragment danych musi następować po fragmencie fmt" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "Zbyt dużo danych pakietu rozgłoszeniowego" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "Pojemność celu mniejsza od destination_length." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "Wyświetlacz można obracać co 90 stopni" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Tryb sterowania nieużywany w trybie wejścia." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Kanał EXTINT w użyciu" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Błąd w regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Oczekiwano %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "Oczekiwano charakterystyki" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "Oczekiwano UUID" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "Oczekiwano krotkę długości %d, otrzymano %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Nie udało się uzyskać blokady, błąd 0x$04x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Nie udała się alokacja bufora RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Nie udała się alokacja %d bajtów na bufor RX" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Nie udało się zwolnić blokady, błąd 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "Plik istnieje" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "Uzyskana częstotliwość jest niemożliwa. Spauzowano." + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "Funkcja wymaga blokady" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Grupa pełna" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "Operacja I/O na zamkniętym pliku" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "Operacja I2C nieobsługiwana" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"Niekompatybilny plik .mpy. Proszę odświeżyć wszystkie pliki .mpy. Więcej " +"informacji na http://adafrui.it/mpy-update." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "Niewłaściwa wielkość bufora" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "Błąd I/O" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Zła nóżka %q" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Zły BMP" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Zła częstotliwość PWM" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Zły argument" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "Zła liczba bitów wartości" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Zła wielkość bufora" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "Zły okres. Poprawny zakres to: 1 - 500" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "Zła liczba kanałów" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Zły tryb" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Zły plik" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Zła wielkość fragmentu formatu" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Zła liczba bitów" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Zła faza" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Zła nóżka" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Zła nóżka dla lewego kanału" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Zła nóżka dla prawego kanału" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Złe nóżki" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Zła polaryzacja" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Zły tryb uruchomienia" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "Zła liczba głosów" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Zły plik wave" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "Lewa strona argumentu nazwanego musi być nazwą" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "Layer musi dziedziczyć z Group albo TileGrid" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Długość musi być całkowita" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Długość musi być nieujemna" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "Nie powiodło się ustawienie nóżki MISO." + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "Nie powiodło się ustawienie nóżki MOSI" + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "Największa wartość x przy odwróceniu to %d" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "Opóźnienie włączenia mikrofonu musi być w zakresie od 0.0 do 1.0" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Brak DAC" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Nie znaleziono kanału DMA" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Brak nóżki RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Brak nóżki TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Brak wolnych zegarów" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Nie ma domyślnej magistrali %q" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Brak wolnych GLCK" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Brak generatora liczb losowych" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Brak sprzętowej obsługi na nóżce" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "Brak miejsca" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Brak pliku/katalogu" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "Nie podłączono" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "Nic nie jest odtwarzane" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "Obiekt został zwolniony i nie można go już używać. Utwórz nowy obiekt." + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Nieparzysta parzystość nie jest wspierana" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Tylko 8 lub 16 bitów mono z " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "Wspierane są tylko nieskompresowane pliki BMP: wielkość nagłówka %d" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "Nadpróbkowanie musi być wielokrotnością 8." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "duty_cycle musi być pomiędzy 0 a 65535 włącznie (rozdzielczość 16 bit)" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "Nie można zmienić częstotliwości PWM gdy variable_frequency=False." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Odmowa dostępu" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Nóżka nie obsługuje ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "Oraz moduły w systemie plików\n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "Dowolny klawisz aby uruchomić konsolę. CTRL-D aby przeładować." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Podciągnięcie nieużywane w trybie wyjścia." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "Brak obsługi kalibracji RTC" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "Brak obsługi RTC" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Tylko do odczytu" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "System plików tylko do odczytu" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "Obiekt tylko do odczytu" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Prawy kanał jest niewspierany" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "Rzędy muszą być digitalio.DigitalInOut" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Uruchomiony tryb bezpieczeństwa! Samo-przeładowanie wyłączone.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Uruchomiony tryb bezpieczeństwa! Zapisany kod nie jest uruchamiany.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA lub SCL wymagają podciągnięcia" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "Częstotliwość próbkowania musi być dodatnia" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Zbyt wysoka częstotliwość próbkowania. Musi być mniejsza niż %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializator w użyciu" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Fragment i wartość są różnych długości." + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Fragmenty nieobsługiwane" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Podział z podgrupami" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "Stos musi mieć co najmniej 256 bajtów" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Strumień nie ma metod readinto() lub write()." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "Wartość bits_per_sample nie pasuje do miksera" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "Liczba kanałów nie pasuje do miksera " + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "Sample rate nie pasuje do miksera" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "Znak nie pasuje do miksera" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "Wysokość bitmapy musi być wielokrotnością wysokości kafelka" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "Szerokość bitmapy musi być wielokrotnością szerokości kafelka" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Zbyt wiele kanałów." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "Zbyt wiele magistrali" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Zbyt wiele wyświetlaczy" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Ślad wyjątku (najnowsze wywołanie na końcu):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Wymagana krotka lub struct_time" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB Zajęte" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "Błąd USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "UUID inny, niż `xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "UUID nie jest typu str, int lub bytes" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Nie udała się alokacja buforów do konwersji ze znakiem" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Brak wolnego GCLK" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Błąd ustawienia parsera" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "Nie można odczytać danych palety" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Błąd zapisu do NVM." + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "Nieoczekiwany typ nrfx uuid." + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "Zła liczba obiektów po prawej stronie (oczekiwano %d, jest %d)." + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Zła szybkość transmisji" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "Zły typ magistrali wyświetlaczy" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Zły format" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Zła operacja" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Zła wartość podciągnięcia." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "Funkcje Viper nie obsługują obecnie więcej niż 4 argumentów" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "UWAGA: Nazwa pliku ma dwa rozszerzenia\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Witamy w CircuitPythonie Adafruita %s!\n" +"Podręczniki dostępne na learn.adafruit.com/category/circuitpyhon.\n" +"Aby zobaczyć wbudowane moduły, wpisz `help(\"modules\")`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Zażądano trybu bezpieczeństwa przez " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() powinien zwracać None" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__init__() powinien zwracać None, nie '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "Argument __new__ musi być typu użytkownika" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "wymagany obiekt typu bytes" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "Wywołano abort()" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "adres %08x nie jest wyrównany do %d bajtów" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "adres poza zakresem" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "adres jest pusty" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "arg jest puste" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "argument ma zły typ" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "zła liczba lub typ argumentów" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "argument powinien być '%q' a nie '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "tablica/bytes wymagane po prawej stronie" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "atrybuty nie są jeszcze obsługiwane" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "zły tryb kompilacji" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "zły specyfikator konwersji" + +#: py/objstr.c +msgid "bad format string" +msgstr "zła specyfikacja formatu" + +#: py/binary.c +msgid "bad typecode" +msgstr "zły typecode" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "brak dwu-argumentowego operatora %q" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bits musi być 7, 8 lub 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits musi być 8" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "bits_per_sample musi być 8 lub 16" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "skok poza zakres" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "bufor mysi być typu bytes" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "wielkość bufora musi pasować do formatu" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "fragmenty bufora muszą mieć tę samą długość" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "zbyt mały bufor" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "bufory muszą mieć tę samą długość" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "buttons musi być digitalio.DigitalInOut" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "bajtkod niezaimplemntowany" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "bajty większe od 8 bitów są niewspierane" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "wartość bytes poza zakresem" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "kalibracja poza zakresem" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "kalibracja tylko do odczytu" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "wartość kalibracji poza zakresem +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "asembler Thumb może przyjąć do 4 parameterów" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "asembler Xtensa może przyjąć do 4 parameterów" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "można zapisać tylko bytecode" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "nie można dodać specjalnej metody do podklasy" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "przypisanie do wyrażenia" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "nie można skonwertować %s do complex" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "nie można skonwertować %s do float" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "nie można skonwertować %s do int" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "nie można automatycznie skonwertować '%q' do '%q'" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "nie można skonwertować NaN do int" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "nie można skonwertować adresu do int" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "nie można skonwertować inf do int" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "nie można skonwertować do complex" + +#: py/obj.c +msgid "can't convert to float" +msgstr "nie można skonwertować do float" + +#: py/obj.c +msgid "can't convert to int" +msgstr "nie można skonwertować do int" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "nie można automatycznie skonwertować do str" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "deklaracja nonlocal na poziomie modułu" + +#: py/compile.c +msgid "can't delete expression" +msgstr "nie można usunąć wyrażenia" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "nie można użyć operatora pomiędzy '%q' a '%q'" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "nie można wykonać dzielenia całkowitego na liczbie zespolonej" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "nie można mieć wielu **x" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "nie można mieć wielu *x" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "nie można automatyczne skonwertować '%q' do 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "nie można ładować z '%q'" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "nie można ładować z indeksem '%q'" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "nie można skoczyć do świeżo stworzonego generatora" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "świeżo stworzony generator może tylko przyjąć None" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "nie można ustawić atrybutu" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "nie można zapisać '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "nie można zpisać do '%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "nie można zapisać z indeksem '%q'" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "nie można zmienić z automatycznego numerowania pól do ręcznego" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "nie można zmienić z ręcznego numerowaniu pól do automatycznego" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "nie można tworzyć instancji '%q'" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "nie można stworzyć instancji" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "nie można zaimportować nazwy %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "nie można wykonać relatywnego importu" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "rzutowanie" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "bufor chars zbyt mały" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "argument chr() poza zakresem range(0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "argument chr() poza zakresem range(256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "bufor kolorów musi nieć 3 bajty (RGB) lub 4 bajty (RGB + wypełnienie)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "bufor kolorów musi być bytearray lub tablicą typu 'b' lub 'B'" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "kolor musi być pomiędzy 0x000000 a 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "kolor powinien być liczbą całkowitą" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "zespolone dzielenie przez zero" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "wartości zespolone nieobsługiwane" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "nagłówek kompresji" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "stała musi być liczbą całkowitą" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "konwersja do obiektu" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "liczby dziesiętne nieobsługiwane" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "domyślny 'except' musi być ostatni" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"bufor docelowy musi być bytearray lub tablicą typu 'B' dla bit_depth = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "bufor docelowy musi być tablicą typu 'H' dla bit_depth = 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length musi być nieujemną liczbą całkowitą" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "sekwencja ma złą długość" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "dzielenie przez zero" + +#: py/objdeque.c +msgid "empty" +msgstr "puste" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "pusta sterta" + +#: py/objstr.c +msgid "empty separator" +msgstr "pusty separator" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "pusta sekwencja" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "koniec formatu przy szukaniu specyfikacji konwersji" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "end_x powinien być całkowity" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "błąd = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "wyjątki muszą dziedziczyć po BaseException" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "oczekiwano ':' po specyfikacji formatu" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "oczekiwano krotki/listy" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "oczekiwano dict dla argumentów nazwanych" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "oczekiwano instrukcji asemblera" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "oczekiwano tylko wartości dla zbioru" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "oczekiwano klucz:wartość dla słownika" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "nadmiarowe argumenty nazwane" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "nadmiarowe argumenty pozycyjne" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "file musi być otwarte w trybie bajtowym" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "system plików musi mieć metodę mount" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "pierwszy argument super() musi być typem" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "firstbit musi być MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "float zbyt wielki" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "font musi mieć 2048 bajtów długości" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "format wymaga słownika" + +#: py/objdeque.c +msgid "full" +msgstr "pełny" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "funkcja nie bierze argumentów nazwanych" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "funkcja bierze najwyżej %d argumentów, jest %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "funkcja dostała wiele wartości dla argumentu '%q'" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "brak %d wymaganych argumentów pozycyjnych funkcji" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "brak argumentu nazwanego funkcji" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "brak wymaganego argumentu nazwanego '%q' funkcji" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "brak wymaganego argumentu pozycyjnego #%d funkcji" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "funkcja wymaga %d argumentów pozycyjnych, ale jest %d" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "funkcja wymaga dokładnie 9 argumentów" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "generator już się wykonuje" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "generator zignorował GeneratorExit" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "graphic musi mieć 2048 bajtów długości" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "heap musi być listą" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "nazwa przedefiniowana jako globalna" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "nazwa przedefiniowana jako nielokalna" + +#: py/objstr.c +msgid "incomplete format" +msgstr "niepełny format" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "niepełny klucz formatu" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "złe wypełnienie" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "indeks poza zakresem" + +#: py/obj.c +msgid "indices must be integers" +msgstr "indeksy muszą być całkowite" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "wtrącony asembler musi być funkcją" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "argument 2 do int() busi być pomiędzy 2 a 36" + +#: py/objstr.c +msgid "integer required" +msgstr "wymagana liczba całkowita" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "złe I2C" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "złe SPI" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "złe arguemnty" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "zły ceryfikat" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "zły indeks dupterm" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "zły format" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "zła specyfikacja formatu" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "zły klucz" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "zły dekorator micropythona" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "zły krok" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "zła składnia" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "zła składnia dla liczby całkowitej" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "zła składnia dla liczby całkowitej w bazie %d" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "zła składnia dla liczby" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "argument 1 dla issubclass() musi być klasą" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "argument 2 dla issubclass() musi być klasą lub krotką klas" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "join oczekuje listy str/bytes zgodnych z self" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "argumenty nazwane nieobsługiwane - proszę użyć zwykłych argumentów" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "słowa kluczowe muszą być łańcuchami" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "etykieta '%q' niezdefiniowana" + +#: py/compile.c +msgid "label redefined" +msgstr "etykieta przedefiniowana" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "ten typ nie pozawala na podanie długości" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lewa i prawa strona powinny być kompatybilne" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "local '%q' jest typu '%q' lecz źródło jest '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "local '%q' użyty zanim typ jest znany" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "zmienna lokalna użyta przed przypisaniem" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "long int jest nieobsługiwany" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "bufor mapy zbyt mały" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "błąd domeny" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "przekroczono dozwoloną głębokość rekurencji" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "alokacja pamięci nie powiodła się, alokowano %u bajtów" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "alokacja pamięci nie powiodła się, sterta zablokowana" + +#: py/builtinimport.c +msgid "module not found" +msgstr "brak modułu" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "wiele *x w przypisaniu" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "konflikt w planie instancji z powodu wielu baz" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "wielokrotne dziedzicznie niewspierane" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "wyjątek musi być obiektem" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "sck/mosi/miso muszą być podane" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "funkcja key musi być podana jako argument nazwany" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "nazwa '%q' niezdefiniowana" + +#: py/runtime.c +msgid "name not defined" +msgstr "nazwa niezdefiniowana" + +#: py/compile.c +msgid "name reused for argument" +msgstr "nazwa użyta ponownie jako argument" + +#: py/emitnative.c +msgid "native yield" +msgstr "natywny yield" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "potrzeba więcej niż %d do rozpakowania" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "ujemna potęga, ale brak obsługi liczb zmiennoprzecinkowych" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "ujemne przesunięcie" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "brak wyjątku do ponownego rzucenia" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "brak wolnego NIC" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "brak wiązania dla zmiennej nielokalnej" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "brak modułu o nazwie '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "nie ma takiego atrybutu" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "argument z wartością domyślną przed argumentem bez" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "cyfra nieszesnastkowa" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "argument nienazwany po */**" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "argument nienazwany po nazwanym" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "to nie jest 128-bitowy UUID" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "nie wszystkie argumenty wykorzystane w formatowaniu" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "nie dość argumentów przy formatowaniu" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "obiekt '%s' nie jest krotką ani listą" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "obiekt nie obsługuje przypisania do elementów" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "obiekt nie obsługuje usuwania elementów" + +#: py/obj.c +msgid "object has no len" +msgstr "obiekt nie ma len" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "obiekt nie ma elementów" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "obiekt nie jest iteratorem" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "obiekt nie jest wywoływalny" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "obiektu nie ma sekwencji" + +#: py/runtime.c +msgid "object not iterable" +msgstr "obiekt nie jest iterowalny" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "obiekt typu '%s' nie ma len()" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "wymagany obiekt z protokołem buforu" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "łańcuch o nieparzystej długości" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "offset poza zakresem" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "tylko fragmenty ze step=1 (lub None) są wspierane" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord oczekuje znaku" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "ord() oczekuje znaku, a jest łańcuch od długości %d" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "przepełnienie przy konwersji long in to słowa maszynowego" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "paleta musi mieć 32 bajty długości" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "palette_index powinien być całkowity" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "anotacja parametru musi być identyfikatorem" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "parametry muszą być rejestrami w kolejności a2 do a5" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "parametry muszą być rejestrami w kolejności r0 do r3" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "współrzędne piksela poza zakresem" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "wartość piksela wymaga zbyt wielu bitów" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" +"pixel_shader musi być typu displayio.Palette lub dispalyio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "pop z pustego PulseIn" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "pop z pustego zbioru" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "pop z pustej listy" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "popitem(): słownik jest pusty" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "trzeci argument pow() nie może być 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "trzyargumentowe pow() wymaga liczb całkowitych" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "przepełnienie kolejki" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "relatywny import" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "zażądano długości %d ale obiekt ma długość %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "anotacja wartości musi być identyfikatorem" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "return oczekiwał '%q', a jest '%q'" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "rsplit(None,n)" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"bufor sample_source musi być bytearray lub tablicą typu 'h', 'H', 'b' lub 'B'" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "częstotliwość próbkowania poza zakresem" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "stos planu pełen" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "kompilowanie skryptów nieobsługiwane" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "znak jest niedopuszczalny w specyfikacji formatu łańcucha" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "znak jest niedopuszczalny w specyfikacji 'c'" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "pojedynczy '}' w specyfikacji formatu" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "okres snu musi być nieujemny" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "zerowy krok" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "przepełnienie small int" + +#: main.c +msgid "soft reboot\n" +msgstr "programowy reset\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "początkowe/końcowe indeksy" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "start_x powinien być całkowity" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "step nie może być zerowe" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "stop musi być 1 lub 2" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "stop nie jest osiągalne ze start" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "operacja na strumieniu nieobsługiwana" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "indeks łańcucha poza zakresem" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "indeksy łańcucha muszą być całkowite, nie %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "łańcuchy nieobsługiwane; użyj bytes lub bytearray" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: nie można indeksować" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: indeks poza zakresem" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: brak pól" + +#: py/objstr.c +msgid "substring not found" +msgstr "brak pod-łańcucha" + +#: py/compile.c +msgid "super() can't find self" +msgstr "super() nie może znaleźć self" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "błąd składni w JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "błąd składni w deskryptorze uctypes" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "threshold musi być w zakresie 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "time.struct_time() wymaga 9-elementowej sekwencji" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "timeout musi być >= 0.0" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "timestamp poza zakresem dla time_t na tej platformie" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "zbyt wiele argumentów podanych dla tego formatu" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "zbyt wiele wartości do rozpakowania (oczekiwano %d)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "indeks krotki poza zakresem" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "krotka/lista ma złą długość" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "wymagana krotka/lista po prawej stronie" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx i rx nie mogą być oba None" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "typ '%q' nie może być bazowy" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "typ nie może być bazowy" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "typ '%q' nie ma atrybutu '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "type wymaga 1 lub 3 argumentów" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "ulonglong zbyt wielkie" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "operator unarny %q niezaimplementowany" + +#: py/parse.c +msgid "unexpected indent" +msgstr "złe wcięcie" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "zły argument nazwany" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "zły argument nazwany '%q'" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "nazwy unicode" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "wcięcie nie pasuje do żadnego wcześniejszego wcięcia" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "zła specyfikacja konwersji %c" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "zły kod formatowania '%c' dla obiektu typu '%s'" + +#: py/compile.c +msgid "unknown type" +msgstr "zły typ" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "zły typ '%q'" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "niepasujące '{' for formacie" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "nieczytelny atrybut" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "zły typ %q" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "zła instrukcja Thumb '%s' z %d argumentami" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "zła instrukcja Xtensa '%s' z %d argumentami" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "zły znak formatowania '%c' (0x%x) na pozycji %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "zły typ dla %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "zły typ dla operatora" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "złe typy dla %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "value_count musi być > 0" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "zła liczba argumentów" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "zła liczba wartości do rozpakowania" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "x poza zakresem" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y powinno być całkowite" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "y poza zakresem" + +#: py/objrange.c +msgid "zero step" +msgstr "zerowy krok" + +#~ msgid "Address is not %d bytes long or is in wrong format" +#~ msgstr "Adres nie ma długości %d bajtów lub zły format" + +#~ msgid "Attempted heap allocation when MicroPython VM not running.\n" +#~ msgstr "Próba alokacji pamięci na stercie gdy VM nie działa.\n" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "Nie można używać dotstar z %s" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "Nie można dodać serwisów w trybie Central" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "Nie można rozgłaszać w trybie Central" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "Nie można zmienić nazwy w trybie Central" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "Nie można się łączyć w trybie Peripheral" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "UUID charakterystyki inny niż UUID serwisu" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "Charakterystyka w użyciu w innym serwisie" + +#~ msgid "Could not decode ble_uuid, err 0x%04x" +#~ msgstr "Nie można zdekodować ble_uuid, błąd 0x%04x" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Katastrofa w HardFault_Handler.\n" + +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Zbyt dużo danych pakietu rozgłoszeniowego" + +#~ msgid "Failed to acquire mutex" +#~ msgstr "Nie udało się uzyskać blokady" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Nie udało się dodać charakterystyki, błąd 0x$04x" + +#~ msgid "Failed to add service" +#~ msgstr "Nie udało się dodać serwisu" + +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Nie udało się dodać serwisu, błąd 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Nie udało się zmienić stanu softdevice" + +#~ msgid "Failed to connect:" +#~ msgstr "Nie udało się połączenie:" + +#~ msgid "Failed to continue scanning" +#~ msgstr "Nie udała się kontynuacja skanowania" + +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Nie udała się kontynuacja skanowania, błąd 0x%04x" + +#~ msgid "Failed to create mutex" +#~ msgstr "Nie udało się stworzyć blokady" + +#~ msgid "Failed to discover services" +#~ msgstr "Nie udało się odkryć serwisów" + +#~ msgid "Failed to get local address" +#~ msgstr "Nie udało się uzyskać lokalnego adresu" + +#~ msgid "Failed to get softdevice state" +#~ msgstr "Nie udało się odczytać stanu softdevice" + +#~ msgid "Failed to notify or indicate attribute value, err 0x%04x" +#~ msgstr "Nie udało się powiadomić o wartości atrybutu, błąd 0x%04x" + +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Nie udało się odczytać CCCD, błąd 0x%04x" + +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Nie udało się odczytać wartości atrybutu, błąd 0x%04x" + +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Nie udało się odczytać gatts, błąd 0x%04x" + +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Nie udało się zarejestrować UUID dostawcy, błąd 0x%04x" + +#~ msgid "Failed to release mutex" +#~ msgstr "Nie udało się zwolnić blokady" + +#~ msgid "Failed to start advertising" +#~ msgstr "Nie udało się rozpocząć rozgłaszania" + +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Nie udało się rozpocząć rozgłaszania, błąd 0x%04x" + +#~ msgid "Failed to start scanning" +#~ msgstr "Nie udało się rozpocząć skanowania" + +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Nie udało się rozpocząć skanowania, błąd 0x%04x" + +#~ msgid "Failed to stop advertising" +#~ msgstr "Nie udało się zatrzymać rozgłaszania" + +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Nie udało się zatrzymać rozgłaszania, błąd 0x%04x" + +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Nie udało się zapisać atrybutu, błąd 0x%04x" + +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Nie udało się zapisać gatts, błąd 0x%04x" + +#~ msgid "Flash erase failed" +#~ msgstr "Nie udało się skasować flash" + +#~ msgid "Flash erase failed to start, err 0x%04x" +#~ msgstr "Nie udało się rozpocząć kasowania flash, błąd 0x%04x" + +#~ msgid "Flash write failed" +#~ msgstr "Zapis do flash nie powiódł się" + +#~ msgid "Flash write failed to start, err 0x%04x" +#~ msgstr "Nie udało się rozpocząć zapisu do flash, błąd 0x%04x" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Zła nóżka zegara" + +#~ msgid "Invalid clock pin" +#~ msgstr "Zła nóżka zegara" + +#~ msgid "Invalid data pin" +#~ msgstr "Zła nóżka danych" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "Ojej, wygląda na to, że CircuitPython natrafił na poważny problem!\n" +#~ "Prosimy o zgłoszenie błędu pod adresem https://github.com/adafruit/" +#~ "circuitpython/issues\n" +#~ " z zawartością dysku CIRCUITPY oraz tym komunikatem:\n" + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "" +#~ "Skok NLR MicroPythona nie powiódł się. Prawdopodobne skażenie pamięci.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "Krytyczny błąd MicroPythona.\n" + +#~ msgid "Must be a Group subclass." +#~ msgstr "Musi dziedziczyć z Group." + +#~ msgid "" +#~ "Only monochrome, indexed 8bpp, and 16bpp or greater BMPs supported: %d " +#~ "bpp given" +#~ msgstr "Wspierane są tylko pliki BMP czarno-białe, 8bpp i 16bpp: %d bpp " + +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "Wspierane są tylko fragmenty z step=1 (albo None)" + +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Piksel poza granicami bufora" + +#~ msgid "Range out of bounds" +#~ msgstr "Zakres poza granicami" + +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "Sterta CircuitPythona jest skażona z powodu zbyt małego stosu.\n" +#~ "Proszę zwiększyć limity wielkości stosu i nazisnąć reset (po odmontowaniu " +#~ "CIRCUITPY).\n" +#~ "Jeśli wielkość stosu nie była zmieniana, proszę zgłosić błąd zawierający " +#~ "zawartość CIRCUITPY tutaj:\n" + +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "Zasilanie mikrokontrolera gwałtownie spadło. Proszę upewnić się,\n" +#~ "że zasilanie jest wystarczające dla całego obwodu in nacisnąć reset (po " +#~ "odmontowaniu CIRCUITPY).\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "Przycisk reset został wciśnięty podczas startu CircuitPythona. Wciśnij go " +#~ "ponownie aby wyjść z trybu bezpieczeństwa.\n" + +#~ msgid "Tile indices must be 0 - 255" +#~ msgstr "Indeks kafelka musi być pomiędzy 0 a 255 włącznie" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "By wyjść, proszę zresetować płytkę bez " + +#~ msgid "UUID integer value not in range 0 to 0xffff" +#~ msgstr "Wartość UUID poza zakresem 0 do 0xffff" + +#~ msgid "Voice index too high" +#~ msgstr "Zbyt wysoki indeks głosu" + +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Uruchomiono w trybie bezpieczeństwa, gdyż nastąpiło coś nieoczekiwanego.\n" + +#~ msgid "bad GATT role" +#~ msgstr "zła rola GATT" + +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf zbyt mały. Wymagane %d bajtów" + +#~ msgid "byteorder is not an instance of ByteOrder (got a %s)" +#~ msgstr "byteorder musi być typu ByteOrder (jest %s)" + +#~ msgid "characteristics includes an object that is not a Characteristic" +#~ msgstr "" +#~ "charakterystyki zawierają obiekt, który nie jest typu Characteristic" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "bufor kolorów musi być typu buffer lub int" + +#~ msgid "interval not in range 0.0020 to 10.24" +#~ msgstr "przedział poza zakresem 0.0020 do 10.24" + +#~ msgid "name must be a string" +#~ msgstr "nazwa musi być łańcuchem" + +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf nie jest tej samej wielkości co buf" + +#~ msgid "services includes an object that is not a Service" +#~ msgstr "obiekt typu innego niż Service w services" + +#~ msgid "tile index out of bounds" +#~ msgstr "indeks kafelka poza zakresem" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() wymaga jednego argumentu" + +#~ msgid "timeout >100 (units are now seconds, not msecs)" +#~ msgstr "timeout > 100 (jednostkami są sekundy)" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "zły kod foratowania '%c' dla obiektu typu 'float'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "zły kod formatowania '%c' dla obiektu typu 'str'" + +#~ msgid "write_args must be a list, tuple, or None" +#~ msgstr "write_args musi być listą, krotką lub None" diff --git a/locale/pt_BR.po b/locale/pt_BR.po new file mode 100644 index 0000000000000..c6fe5dcba2c71 --- /dev/null +++ b/locale/pt_BR.po @@ -0,0 +1,3414 @@ +# SOME DESCRIPTIVE TITLE. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. +# FIRST AUTHOR , YEAR. +# +#, fuzzy +msgid "" +msgstr "" +"Project-Id-Version: PACKAGE VERSION\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2018-10-02 21:14-0000\n" +"Last-Translator: \n" +"Language-Team: \n" +"Language: pt_BR\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Arquivo \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Arquivo \"%q\", linha %d" + +#: main.c +msgid " output:\n" +msgstr " saída:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c requer int ou char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q em uso" + +#: py/obj.c +msgid "%q index out of range" +msgstr "" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "%q must be >= 1" +msgstr "buffers devem ser o mesmo tamanho" + +#: shared-bindings/fontio/BuiltinFont.c +#, fuzzy +msgid "%q should be an int" +msgstr "y deve ser um int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "'%q' argumento(s) requerido(s)" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' e 'O' não são tipos de formato suportados" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "" + +#: py/compile.c +msgid "'return' outside function" +msgstr "" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "" + +#: py/obj.c +msgid ", in %q\n" +msgstr "" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Um canal de interrupção de hardware já está em uso" + +#: shared-bindings/_bleio/Address.c +#, fuzzy, c-format +msgid "Address must be %d bytes long" +msgstr "buffers devem ser o mesmo tamanho" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Todos os periféricos I2C estão em uso" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Todos os periféricos SPI estão em uso" + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "All UART peripherals are in use" +msgstr "Todos os periféricos I2C estão em uso" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Todos os canais de eventos em uso" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Todos os temporizadores para este pino estão em uso" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Todos os temporizadores em uso" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "Funcionalidade AnalogOut não suportada" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "Saída analógica não suportada no pino fornecido" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Outro envio já está ativo" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Array deve conter meias palavras (tipo 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "" + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "A atualização automática está desligada.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Ambos os pinos devem suportar interrupções de hardware" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "O brilho deve estar entre 0 e 255" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Buffer de tamanho incorreto. Deve ser %d bytes." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, fuzzy, c-format +msgid "Bus pin %d is already in use" +msgstr "DAC em uso" + +#: shared-bindings/_bleio/UUID.c +#, fuzzy +msgid "Byte buffer must be 16 bytes." +msgstr "buffers devem ser o mesmo tamanho" + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Os bytes devem estar entre 0 e 255." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Não é possível excluir valores" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "" + +#: ports/nrf/common-hal/microcontroller/Processor.c +#, fuzzy +msgid "Cannot get temperature" +msgstr "Não pode obter a temperatura. status: 0x%02x" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Não é possível ler sem o pino MISO." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Não é possível gravar em um arquivo" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "Não é possível remontar '/' enquanto o USB estiver ativo." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Não é possível transferir sem os pinos MOSI e MISO." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Não é possível ler sem um pino MOSI" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Inicialização do pino de Clock falhou." + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Clock se estendeu por tempo demais" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Unidade de Clock em uso" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +#, fuzzy +msgid "Command must be an int between 0 and 255" +msgstr "Os bytes devem estar entre 0 e 255." + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "" + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Não foi possível inicializar o UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Não pôde alocar primeiro buffer" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Não pôde alocar segundo buffer" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "DAC em uso" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Pedaço de dados deve seguir o pedaço de cortes" + +#: ports/nrf/common-hal/_bleio/Adapter.c +#, fuzzy +msgid "Data too large for advertisement packet" +msgstr "Não é possível ajustar dados no pacote de anúncios." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "" + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "Canal EXTINT em uso" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Erro no regex" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Esperado um" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +#, fuzzy +msgid "Expected a Characteristic" +msgstr "Não é possível adicionar Característica." + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +#, fuzzy +msgid "Expected a UUID" +msgstr "Esperado um" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "Falha ao enviar comando." + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Falha ao alocar buffer RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Falha ao alocar buffer RX de %d bytes" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "" + +#: ports/nrf/sd_mutex.c +#, fuzzy, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "" + +#: py/moduerrno.c +msgid "File exists" +msgstr "Arquivo já existe" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Grupo cheio" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "Operação I/O no arquivo fechado" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "I2C operação não suportada" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Pino do %q inválido" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Arquivo BMP inválido" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Frequência PWM inválida" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Argumento inválido" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +#, fuzzy +msgid "Invalid buffer size" +msgstr "Arquivo inválido" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid channel count" +msgstr "certificado inválido" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Direção inválida" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Arquivo inválido" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Tamanho do pedaço de formato inválido" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Número inválido de bits" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Fase Inválida" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Pino inválido" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Pino inválido para canal esquerdo" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Pino inválido para canal direito" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Pinos inválidos" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "" + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "Invalid voice count" +msgstr "certificado inválido" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Aqruivo de ondas inválido" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "" + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "" + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Tamanho deve ser um int" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "Inicialização do pino MISO falhou" + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "Inicialização do pino MOSI falhou." + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Nenhum DAC no chip" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Nenhum canal DMA encontrado" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Nenhum pino RX" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Nenhum pino TX" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "Nenhum barramento %q padrão" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Não há GCLKs livre" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "Sem suporte de hardware no pino de clock" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Nenhum suporte de hardware no pino" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "" + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "Not connected" +msgstr "Não é possível conectar-se ao AP" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"Objeto foi desinicializado e não pode ser mais usaado. Crie um novo objeto." + +#: ports/nrf/common-hal/busio/UART.c +#, fuzzy +msgid "Odd parity is not supported" +msgstr "I2C operação não suportada" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "" + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Permissão negada" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "O pino não tem recursos de ADC" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +#, fuzzy +msgid "Plus any modules on the filesystem\n" +msgstr "Não é possível remontar o sistema de arquivos" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "Buffer Ps2 vazio" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "" + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "A calibração RTC não é suportada nesta placa" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "O RTC não é suportado nesta placa" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Somente leitura" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Sistema de arquivos somente leitura" + +#: shared-module/displayio/Bitmap.c +#, fuzzy +msgid "Read-only object" +msgstr "Somente leitura" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Canal direito não suportado" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Rodando em modo seguro! Atualização automática está desligada.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Rodando em modo seguro! Não está executando o código salvo.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA ou SCL precisa de um pull up" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Taxa de amostragem muito alta. Deve ser menor que %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Serializer em uso" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "O tamanho da pilha deve ser pelo menos 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Muitos canais na amostra." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB ocupada" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "Erro na USB" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Não é possível alocar buffers para conversão assinada" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Não é possível encontrar GCLK livre" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Não é possível gravar no nvm." + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Taxa de transmissão não suportada" + +#: shared-module/displayio/display_core.c +#, fuzzy +msgid "Unsupported display bus type" +msgstr "Taxa de transmissão não suportada" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Formato não suportado" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "AVISO: Seu arquivo de código tem duas extensões\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Você solicitou o início do modo de segurança" + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "abort() chamado" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "endereço %08x não está alinhado com %d bytes" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "argumento tem tipo errado" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "atributos ainda não suportados" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "" + +#: py/objstr.c +msgid "bad format string" +msgstr "" + +#: py/binary.c +msgid "bad typecode" +msgstr "" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bits devem ser 8" + +#: shared-bindings/audiomixer/Mixer.c +#, fuzzy +msgid "bits_per_sample must be 8 or 16" +msgstr "bits devem ser 8" + +#: py/emitinlinethumb.c +#, fuzzy +msgid "branch not in range" +msgstr "Calibração está fora do intervalo" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "" + +#: shared-module/struct/__init__.c +#, fuzzy +msgid "buffer size must match format" +msgstr "buffers devem ser o mesmo tamanho" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "buffers devem ser o mesmo tamanho" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "bytes > 8 bits não suportado" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "Calibração está fora do intervalo" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "Calibração é somente leitura" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "Valor de calibração fora do intervalo +/- 127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "" + +#: py/obj.c +msgid "can't convert to float" +msgstr "" + +#: py/obj.c +msgid "can't convert to int" +msgstr "" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "" + +#: py/compile.c +msgid "can't delete expression" +msgstr "" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "não é possível criar instância" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "não pode importar nome %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "cor deve estar entre 0x000000 e 0xffffff" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "cor deve ser um int" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "constante deve ser um inteiro" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "destination_length deve ser um int >= 0" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "divisão por zero" + +#: py/objdeque.c +msgid "empty" +msgstr "vazio" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "heap vazia" + +#: py/objstr.c +msgid "empty separator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "seqüência vazia" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "end_x should be an int" +msgstr "y deve ser um int" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "erro = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "argumentos extras de palavras-chave passados" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "argumentos extra posicionais passados" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "sistema de arquivos deve fornecer método de montagem" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "firstbit devem ser MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "float muito grande" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "" + +#: py/objdeque.c +msgid "full" +msgstr "cheio" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "função não aceita argumentos de palavras-chave" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "função esperada na maioria dos %d argumentos, obteve %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "função ausente %d requer argumentos posicionais" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "função leva %d argumentos posicionais, mas apenas %d foram passadas" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "função leva exatamente 9 argumentos" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "heap deve ser uma lista" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "" + +#: py/objstr.c +msgid "incomplete format" +msgstr "formato incompleto" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "preenchimento incorreto" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "Índice fora do intervalo" + +#: py/obj.c +msgid "indices must be integers" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "" + +#: py/objstr.c +msgid "integer required" +msgstr "inteiro requerido" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "periférico I2C inválido" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "periférico SPI inválido" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "argumentos inválidos" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "certificado inválido" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "Índice de dupterm inválido" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "formato inválido" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "chave inválida" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "passo inválido" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "" + +#: py/compile.c +msgid "label redefined" +msgstr "" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "" + +#: py/builtinimport.c +msgid "module not found" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "deve especificar todos sck/mosi/miso" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "" + +#: py/runtime.c +msgid "name not defined" +msgstr "nome não definido" + +#: py/compile.c +msgid "name reused for argument" +msgstr "" + +#: py/emitnative.c +msgid "native yield" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "precisa de mais de %d valores para desempacotar" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "" + +#: py/runtime.c +msgid "no such attribute" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "" + +#: py/obj.c +msgid "object has no len" +msgstr "" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "objeto não em seqüência" + +#: py/runtime.c +msgid "object not iterable" +msgstr "objeto não iterável" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "estouro de fila" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "Taxa de amostragem fora do intervalo" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "compilação de script não suportada" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "" + +#: main.c +msgid "soft reboot\n" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "" + +#: shared-bindings/displayio/Shape.c +#, fuzzy +msgid "start_x should be an int" +msgstr "y deve ser um int" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "o passo deve ser diferente de zero" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "struct: não pode indexar" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "struct: índice fora do intervalo" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "struct: sem campos" + +#: py/objstr.c +msgid "substring not found" +msgstr "" + +#: py/compile.c +msgid "super() can't find self" +msgstr "" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "erro de sintaxe no JSON" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "Limite deve estar no alcance de 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#, fuzzy +msgid "timeout must be >= 0.0" +msgstr "bits devem ser 8" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "timestamp fora do intervalo para a plataforma time_t" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "Muitos argumentos fornecidos com o formato dado" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "TX e RX não podem ser ambos" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "" + +#: py/parse.c +msgid "unexpected indent" +msgstr "" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "" + +#: py/compile.c +msgid "unknown type" +msgstr "" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "atributo ilegível" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y deve ser um int" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "" + +#: py/objrange.c +msgid "zero step" +msgstr "passo zero" + +#~ msgid "AP required" +#~ msgstr "AP requerido" + +#~ msgid "Cannot connect to AP" +#~ msgstr "Não é possível conectar-se ao AP" + +#~ msgid "Cannot disconnect from AP" +#~ msgstr "Não é possível desconectar do AP" + +#~ msgid "Cannot set STA config" +#~ msgstr "Não é possível definir a configuração STA" + +#~ msgid "Cannot update i/f status" +#~ msgstr "Não é possível atualizar o status i/f" + +#, fuzzy +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Não é possível ajustar dados no pacote de anúncios." + +#~ msgid "Don't know how to pass object to native function" +#~ msgstr "Não sabe como passar o objeto para a função nativa" + +#~ msgid "ESP8226 does not support safe mode." +#~ msgstr "O ESP8226 não suporta o modo de segurança." + +#~ msgid "ESP8266 does not support pull down." +#~ msgstr "ESP8266 não suporta pull down." + +#~ msgid "Error in ffi_prep_cif" +#~ msgstr "Erro no ffi_prep_cif" + +#, fuzzy +#~ msgid "Failed to acquire mutex" +#~ msgstr "Falha ao alocar buffer RX" + +#, fuzzy +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to add service" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to change softdevice state" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to create mutex" +#~ msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to discover services" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to get softdevice state" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to notify or indicate attribute value, err %0x04x" +#~ msgstr "Não é possível gravar o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to read attribute value, err %0x04x" +#~ msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Não é possível gravar o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "" +#~ "Não é possível adicionar o UUID de 128 bits específico do fornecedor." + +#, fuzzy +#~ msgid "Failed to release mutex" +#~ msgstr "Não é possível ler o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start advertising" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start scanning" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Não é possível iniciar o anúncio. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to stop advertising" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Não pode parar propaganda. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Não é possível gravar o valor do atributo. status: 0x%02x" + +#, fuzzy +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Não é possível gravar o valor do atributo. status: 0x%02x" + +#~ msgid "GPIO16 does not support pull up." +#~ msgstr "GPIO16 não suporta pull up." + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Pino de bit clock inválido" + +#~ msgid "Invalid clock pin" +#~ msgstr "Pino do Clock inválido" + +#~ msgid "Invalid data pin" +#~ msgstr "Pino de dados inválido" + +#~ msgid "Maximum PWM frequency is %dhz." +#~ msgstr "A frequência máxima PWM é de %dhz." + +#~ msgid "Minimum PWM frequency is 1hz." +#~ msgstr "A frequência mínima PWM é de 1hz" + +#~ msgid "Multiple PWM frequencies not supported. PWM already set to %dhz." +#~ msgstr "" +#~ "Múltiplas frequências PWM não suportadas. PWM já definido para %dhz." + +#~ msgid "No PulseIn support for %q" +#~ msgstr "Não há suporte para PulseIn no pino %q" + +#~ msgid "No hardware support for analog out." +#~ msgstr "Nenhum suporte de hardware para saída analógica." + +#~ msgid "Only Windows format, uncompressed BMP supported %d" +#~ msgstr "Apenas formato Windows, BMP descomprimido suportado" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Apenas bit maps de cores de 8 bit ou menos são suportados" + +#~ msgid "Only true color (24 bpp or higher) BMP supported %x" +#~ msgstr "Apenas cores verdadeiras (24 bpp ou maior) BMP suportadas" + +#~ msgid "Only tx supported on UART1 (GPIO2)." +#~ msgstr "Apenas TX suportado no UART1 (GPIO2)." + +#~ msgid "PWM not supported on pin %d" +#~ msgstr "PWM não suportado no pino %d" + +#~ msgid "Pin %q does not have ADC capabilities" +#~ msgstr "Pino %q não tem recursos de ADC" + +#~ msgid "Pin(16) doesn't support pull" +#~ msgstr "Pino (16) não suporta pull" + +#~ msgid "Pins not valid for SPI" +#~ msgstr "Pinos não válidos para SPI" + +#~ msgid "STA must be active" +#~ msgstr "STA deve estar ativo" + +#~ msgid "STA required" +#~ msgstr "STA requerido" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Para sair, por favor, reinicie a placa sem " + +#~ msgid "UART(%d) does not exist" +#~ msgstr "UART(%d) não existe" + +#~ msgid "UART(1) can't read" +#~ msgstr "UART(1) não pode ler" + +#~ msgid "Unable to remount filesystem" +#~ msgstr "Não é possível remontar o sistema de arquivos" + +#~ msgid "Unknown type" +#~ msgstr "Tipo desconhecido" + +#~ msgid "Use esptool to erase flash and re-upload Python instead" +#~ msgstr "Use o esptool para apagar o flash e recarregar o Python" + +#~ msgid "buffer too long" +#~ msgstr "buffer muito longo" + +#~ msgid "can query only one param" +#~ msgstr "pode consultar apenas um parâmetro" + +#~ msgid "can't get AP config" +#~ msgstr "não pode obter configuração de AP" + +#~ msgid "can't get STA config" +#~ msgstr "não pode obter a configuração STA" + +#~ msgid "can't set AP config" +#~ msgstr "não é possível definir a configuração do AP" + +#~ msgid "can't set STA config" +#~ msgstr "não é possível definir a configuração STA" + +#~ msgid "either pos or kw args are allowed" +#~ msgstr "pos ou kw args são permitidos" + +#~ msgid "expecting a pin" +#~ msgstr "esperando um pino" + +#~ msgid "ffi_prep_closure_loc" +#~ msgstr "ffi_prep_closure_loc" + +#~ msgid "flash location must be below 1MByte" +#~ msgstr "o local do flash deve estar abaixo de 1 MByte" + +#~ msgid "frequency can only be either 80Mhz or 160MHz" +#~ msgstr "A frequência só pode ser 80Mhz ou 160MHz" + +#~ msgid "impossible baudrate" +#~ msgstr "taxa de transmissão impossível" + +#~ msgid "invalid alarm" +#~ msgstr "Alarme inválido" + +#~ msgid "invalid buffer length" +#~ msgstr "comprimento de buffer inválido" + +#~ msgid "invalid data bits" +#~ msgstr "Bits de dados inválidos" + +#~ msgid "invalid pin" +#~ msgstr "Pino inválido" + +#~ msgid "invalid stop bits" +#~ msgstr "Bits de parada inválidos" + +#~ msgid "len must be multiple of 4" +#~ msgstr "len deve ser múltiplo de 4" + +#~ msgid "memory allocation failed, allocating %u bytes for native code" +#~ msgstr "alocação de memória falhou, alocando %u bytes para código nativo" + +#, fuzzy +#~ msgid "name must be a string" +#~ msgstr "heap deve ser uma lista" + +#~ msgid "not a valid ADC Channel: %d" +#~ msgstr "não é um canal ADC válido: %d" + +#~ msgid "pin does not have IRQ capabilities" +#~ msgstr "Pino não tem recursos de IRQ" + +#, fuzzy +#~ msgid "readonly attribute" +#~ msgstr "atributo ilegível" + +#~ msgid "row must be packed and word aligned" +#~ msgstr "Linha deve ser comprimida e com as palavras alinhadas" + +#~ msgid "scan failed" +#~ msgstr "varredura falhou" + +#~ msgid "too many arguments" +#~ msgstr "muitos argumentos" + +#~ msgid "unknown config param" +#~ msgstr "parâmetro configuração desconhecido" + +#~ msgid "unknown status param" +#~ msgstr "parâmetro de status desconhecido" + +#~ msgid "wifi_set_ip_info() failed" +#~ msgstr "wifi_set_ip_info() falhou" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po new file mode 100644 index 0000000000000..8be47eb864807 --- /dev/null +++ b/locale/zh_Latn_pinyin.po @@ -0,0 +1,3469 @@ +# Adafruit CircuitPython Chinese Hanyu Pinyin Translation +# Copyright (C) 2019 +# This file is distributed under the same license as the CircuitPython package. +# @hexthat#2155, 2019. +# +msgid "" +msgstr "" +"Project-Id-Version: circuitpython-cn\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2020-03-30 17:03-0700\n" +"PO-Revision-Date: 2019-04-13 10:10-0700\n" +"Last-Translator: hexthat\n" +"Language-Team: Chinese Hanyu Pinyin\n" +"Language: zh\n" +"MIME-Version: 1.0\n" +"Content-Type: text/plain; charset=UTF-8\n" +"Content-Transfer-Encoding: 8bit\n" +"X-Generator: Poedit 2.2.1\n" + +#: main.c +msgid "" +"\n" +"Code done running. Waiting for reload.\n" +msgstr "" +"\n" +"Dàimǎ yǐ wánchéng yùnxíng. Zhèngzài děngdài chóngxīn jiāzài.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"Please file an issue with the contents of your CIRCUITPY drive at \n" +"https://github.com/adafruit/circuitpython/issues\n" +msgstr "" +"\n" +"Qǐng tōngguò https://github.com/adafruit/circuitpython/issues\n" +"tíjiāo yǒuguān nín de CIRCUITPY qūdòngqì nèiróng de wèntí \n" + +#: supervisor/shared/safe_mode.c +msgid "" +"\n" +"To exit, please reset the board without " +msgstr "" +"\n" +"Qǐng zài méiyǒu _ de qíngkuàng xià chóng zhì bǎn zǐ yǐ tuìchū " + +#: py/obj.c +msgid " File \"%q\"" +msgstr " Wénjiàn \"%q\"" + +#: py/obj.c +msgid " File \"%q\", line %d" +msgstr " Wénjiàn \"%q\", dì %d xíng" + +#: main.c +msgid " output:\n" +msgstr " shūchū:\n" + +#: py/objstr.c +#, c-format +msgid "%%c requires int or char" +msgstr "%%c xūyào zhěngshù huò char" + +#: shared-bindings/microcontroller/Pin.c +msgid "%q in use" +msgstr "%q zhèngzài shǐyòng" + +#: py/obj.c +msgid "%q index out of range" +msgstr "%q suǒyǐn chāochū fànwéi" + +#: py/obj.c +msgid "%q indices must be integers, not %s" +msgstr "%q suǒyǐn bìxū shì zhěngshù, ér bùshì %s" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c +msgid "%q must be >= 1" +msgstr "%q bìxū dàyú huò děngyú 1" + +#: shared-bindings/fontio/BuiltinFont.c +msgid "%q should be an int" +msgstr "%q yīnggāi shì yīgè int" + +#: py/bc.c py/objnamedtuple.c +msgid "%q() takes %d positional arguments but %d were given" +msgstr "%q() cǎiyòng %d wèizhì cānshù, dàn gěi chū %d" + +#: py/argcheck.c +msgid "'%q' argument required" +msgstr "xūyào '%q' cānshù" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a label" +msgstr "'%s' qīwàng biāoqiān" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects a register" +msgstr "'%s' qīwàng yīgè zhùcè" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects a special register" +msgstr "'%s' xūyào yīgè tèshū de jìcúnqì" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an FPU register" +msgstr "'%s' xūyào FPU jìcúnqì" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects an address of the form [a, b]" +msgstr "'%s' qīwàng chuāng tǐ [a, b] dì dìzhǐ" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +#, c-format +msgid "'%s' expects an integer" +msgstr "'%s' qídài yīgè zhěngshù" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects at most r%d" +msgstr "'%s' qīwàng zuìduō de shì %d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' expects {r0, r1, ...}" +msgstr "'%s' yùqí {r0, r1, ...}" + +#: py/emitinlinextensa.c +#, c-format +msgid "'%s' integer %d is not within range %d..%d" +msgstr "'%s' zhěngshù %d bùzài fànwéi nèi %d.%d" + +#: py/emitinlinethumb.c +#, c-format +msgid "'%s' integer 0x%x does not fit in mask 0x%x" +msgstr "'%s' zhěngshù 0x%x bù shìyòng yú yǎn mǎ 0x%x" + +#: py/runtime.c +msgid "'%s' object cannot assign attribute '%q'" +msgstr "" + +#: py/proto.c +msgid "'%s' object does not support '%q'" +msgstr "'%s' duì xiàng bù zhīchí '%q'" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item assignment" +msgstr "'%s' duìxiàng bù zhīchí xiàngmù fēnpèi" + +#: py/obj.c +#, c-format +msgid "'%s' object does not support item deletion" +msgstr "'%s' duìxiàng bù zhīchí shānchú xiàngmù" + +#: py/runtime.c +msgid "'%s' object has no attribute '%q'" +msgstr "'%s' duìxiàng méiyǒu shǔxìng '%q'" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not an iterator" +msgstr "'%s' duìxiàng bùshì yīgè diédài qì" + +#: py/objtype.c py/runtime.c +#, c-format +msgid "'%s' object is not callable" +msgstr "'%s' duìxiàng wúfǎ diàoyòng" + +#: py/runtime.c +#, c-format +msgid "'%s' object is not iterable" +msgstr "'%s' duìxiàng bùnéng diédài" + +#: py/obj.c +#, c-format +msgid "'%s' object is not subscriptable" +msgstr "'%s' duìxiàng bùnéng fēnshù" + +#: py/objstr.c +msgid "'=' alignment not allowed in string format specifier" +msgstr "zìfú chuàn géshì shuōmíng fú zhōng bù yǔnxǔ '=' duìqí" + +#: shared-module/struct/__init__.c +msgid "'S' and 'O' are not supported format types" +msgstr "'S' hé 'O' bù zhīchí géshì lèixíng" + +#: py/compile.c +msgid "'align' requires 1 argument" +msgstr "'align' xūyào 1 gè cānshù" + +#: py/compile.c +msgid "'async for' or 'async with' outside async function" +msgstr "" + +#: py/compile.c +msgid "'await' outside function" +msgstr "'await' wàibù gōngnéng" + +#: py/compile.c +msgid "'break' outside loop" +msgstr "'break' wàibù xúnhuán" + +#: py/compile.c +msgid "'continue' outside loop" +msgstr "'continue' wàibù xúnhuán" + +#: py/compile.c +msgid "'data' requires at least 2 arguments" +msgstr "'data' xūyào zhìshǎo 2 gè cānshù" + +#: py/compile.c +msgid "'data' requires integer arguments" +msgstr "'data' xūyào zhěngshù cānshù" + +#: py/compile.c +msgid "'label' requires 1 argument" +msgstr "'label' xūyào 1 cānshù" + +#: py/compile.c +msgid "'return' outside function" +msgstr "'return' wàibù gōngnéng" + +#: py/compile.c +msgid "'yield' outside function" +msgstr "'yield' wàibù gōngnéng" + +#: py/compile.c +msgid "*x must be assignment target" +msgstr "*x bìxū shì rènwù mùbiāo" + +#: py/obj.c +msgid ", in %q\n" +msgstr ", zài %q\n" + +#: py/objcomplex.c +msgid "0.0 to a complex power" +msgstr "0.0 dào fùzá diànyuán" + +#: py/modbuiltins.c +msgid "3-arg pow() not supported" +msgstr "bù zhīchí 3-arg pow ()" + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "A hardware interrupt channel is already in use" +msgstr "Yìngjiàn zhōngduàn tōngdào yǐ zài shǐyòng zhōng" + +#: shared-bindings/_bleio/Address.c +#, c-format +msgid "Address must be %d bytes long" +msgstr "Dìzhǐ bìxū shì %d zì jié zhǎng" + +#: shared-bindings/_bleio/Address.c +msgid "Address type out of range" +msgstr "Dìzhǐ lèixíng chāochū fànwéi" + +#: ports/nrf/common-hal/busio/I2C.c +msgid "All I2C peripherals are in use" +msgstr "Suǒyǒu I2C wàiwéi qì zhèngzài shǐyòng" + +#: ports/nrf/common-hal/busio/SPI.c +msgid "All SPI peripherals are in use" +msgstr "Suǒyǒu SPI wàiwéi qì zhèngzài shǐyòng" + +#: ports/nrf/common-hal/busio/UART.c +msgid "All UART peripherals are in use" +msgstr "Suǒyǒu UART wàiwéi zhèngzài shǐyòng" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "All event channels in use" +msgstr "Suǒyǒu shǐyòng de shìjiàn píndào" + +#: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "All sync event channels in use" +msgstr "Suǒyǒu tóngbù shìjiàn píndào shǐyòng" + +#: shared-bindings/pulseio/PWMOut.c +msgid "All timers for this pin are in use" +msgstr "Cǐ yǐn jiǎo de suǒyǒu jìshí qì zhèngzài shǐyòng" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#: ports/nrf/common-hal/pulseio/PulseOut.c shared-bindings/pulseio/PWMOut.c +#: shared-module/_pew/PewPew.c +msgid "All timers in use" +msgstr "Suǒyǒu jìshí qì shǐyòng" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Already advertising." +msgstr "Mùqián zhèngzài guǎngbò" + +#: ports/cxd56/common-hal/analogio/AnalogIn.c +msgid "AnalogIn not supported on given pin" +msgstr "Gěi dìng de yǐn jiǎo bù zhīchí AnalogIn" + +#: ports/cxd56/common-hal/analogio/AnalogOut.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c +#: ports/nrf/common-hal/analogio/AnalogOut.c +msgid "AnalogOut functionality not supported" +msgstr "Bù zhīchí AnalogOut gōngnéng" + +#: shared-bindings/analogio/AnalogOut.c +msgid "AnalogOut is only 16 bits. Value must be less than 65536." +msgstr "AnalogOut jǐn wèi 16 wèi. Zhí bìxū xiǎoyú 65536." + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +msgid "AnalogOut not supported on given pin" +msgstr "Wèi zhīchí zhǐdìng de yǐn jiǎo AnalogOut" + +#: ports/atmel-samd/common-hal/pulseio/PulseOut.c +#: ports/cxd56/common-hal/pulseio/PulseOut.c +msgid "Another send is already active" +msgstr "Lìng yīgè fāsòng yǐjīng jīhuó" + +#: shared-bindings/pulseio/PulseOut.c +msgid "Array must contain halfwords (type 'H')" +msgstr "Shùzǔ bìxū bāohán bàn zìshù (type 'H')" + +#: shared-bindings/nvm/ByteArray.c +msgid "Array values should be single bytes." +msgstr "Shùzǔ zhí yīnggāi shì dāngè zì jié." + +#: supervisor/shared/safe_mode.c +msgid "Attempted heap allocation when MicroPython VM not running." +msgstr "MicroPython VM zài wèi yùnxíng shí chángshì fēnpèi duī." + +#: main.c +msgid "Auto-reload is off.\n" +msgstr "Zìdòng chóngxīn jiāzài yǐ guānbì.\n" + +#: main.c +msgid "" +"Auto-reload is on. Simply save files over USB to run them or enter REPL to " +"disable.\n" +msgstr "" +"Zìdòng chóngxīn jiāzài. Zhǐ xū tōngguò USB bǎocún wénjiàn lái yùnxíng tāmen " +"huò shūrù REPL jìnyòng.\n" + +#: shared-module/displayio/Display.c +msgid "Below minimum frame rate" +msgstr "Dī yú zuìdī zhèng sùlǜ" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Bit clock and word select must share a clock unit" +msgstr "Bǐtè shízhōng hé dānzì xuǎnzé bìxū gòngxiǎng shízhōng dānwèi" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Bit depth must be multiple of 8." +msgstr "Bǐtè shēndù bìxū shì 8 bèi yǐshàng." + +#: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c +msgid "Both pins must support hardware interrupts" +msgstr "Liǎng gè yǐn jiǎo dōu bìxū zhīchí yìngjiàn zhōngduàn" + +#: shared-bindings/displayio/Display.c +msgid "Brightness must be 0-1.0" +msgstr "Liàngdù bìxū wèi 0-1.0" + +#: shared-bindings/supervisor/__init__.c +msgid "Brightness must be between 0 and 255" +msgstr "Liàngdù bìxū jiè yú 0 dào 255 zhī jiān" + +#: shared-bindings/displayio/Display.c +msgid "Brightness not adjustable" +msgstr "Liàngdù wúfǎ tiáozhěng" + +#: shared-bindings/_bleio/UUID.c +#, c-format +msgid "Buffer + offset too small %d %d %d" +msgstr "Huǎnchōng qū hé piān yí liàng tài xiǎo %d %d %d" + +#: shared-module/usb_hid/Device.c +#, c-format +msgid "Buffer incorrect size. Should be %d bytes." +msgstr "Huǎnchōng qū dàxiǎo bù zhèngquè. Yīnggāi shì %d zì jié." + +#: shared-bindings/displayio/Display.c +msgid "Buffer is not a bytearray." +msgstr "Huǎnchōng qū bùshì bytearray" + +#: shared-bindings/displayio/Display.c +msgid "Buffer is too small" +msgstr "Huǎnchōng qū tài xiǎo" + +#: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c +#, c-format +msgid "Buffer length %d too big. It must be less than %d" +msgstr "Huǎnchōng qū chángdù%d tài dà. Tā bìxū xiǎoyú%d" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c +msgid "Buffer must be at least length 1" +msgstr "Huǎnchōng qū bìxū zhìshǎo chángdù 1" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "huǎn chōng qū tài dà ， wú fǎ fēn pèi" + +#: shared-bindings/_bleio/PacketBuffer.c +#, c-format +msgid "Buffer too short by %d bytes" +msgstr "" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +#, c-format +msgid "Bus pin %d is already in use" +msgstr "Zǒngxiàn yǐn jiǎo %d yǐ zài shǐyòng zhōng" + +#: shared-bindings/_bleio/UUID.c +msgid "Byte buffer must be 16 bytes." +msgstr "Zì jié huǎnchōng qū bìxū shì 16 zì jié." + +#: shared-bindings/nvm/ByteArray.c +msgid "Bytes must be between 0 and 255." +msgstr "Zì jié bìxū jiè yú 0 dào 255 zhī jiān." + +#: py/objtype.c +msgid "Call super().__init__() before accessing native object." +msgstr "Zài fǎngwèn běn jī wùjiàn zhīqián diàoyòng super().__init__()" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "Can't set CCCD on local Characteristic" +msgstr "Wúfǎ jiāng CCCD shèzhì wéi běndì tèzhēng" + +#: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c +msgid "Cannot delete values" +msgstr "Wúfǎ shānchú zhí" + +#: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +#: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c +#: ports/nrf/common-hal/digitalio/DigitalInOut.c +msgid "Cannot get pull while in output mode" +msgstr "Zài shūchū móshì xià wúfǎ huòqǔ lādòng" + +#: ports/nrf/common-hal/microcontroller/Processor.c +msgid "Cannot get temperature" +msgstr "Wúfǎ huòqǔ wēndù" + +#: shared-bindings/_bleio/Adapter.c +msgid "Cannot have scan responses for extended, connectable advertisements." +msgstr "Nín wúfǎ sǎomiáo kuòzhǎn de, kě liánjiē de guǎnggào." + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Cannot output both channels on the same pin" +msgstr "Wúfǎ shūchū tóng yīgè yǐn jiǎo shàng de liǎng gè píndào" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot read without MISO pin." +msgstr "Wúfǎ dòu qǔ méiyǒu MISO de yǐn jiǎo." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Cannot record to a file" +msgstr "Wúfǎ jìlù dào wénjiàn" + +#: shared-module/storage/__init__.c +msgid "Cannot remount '/' when USB is active." +msgstr "USB jīhuó shí wúfǎ chóngxīn bǎng ding '/'." + +#: ports/atmel-samd/common-hal/microcontroller/__init__.c +#: ports/cxd56/common-hal/microcontroller/__init__.c +#: ports/mimxrt10xx/common-hal/microcontroller/__init__.c +msgid "Cannot reset into bootloader because no bootloader is present." +msgstr "Wúfǎ chóng zhì wèi bootloader, yīnwèi méiyǒu bootloader cúnzài." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Cannot set value when direction is input." +msgstr "Dāng fāngxiàng xiàng nèi shí, bùnéng shèzhì gāi zhí." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Cannot specify RTS or CTS in RS485 mode" +msgstr "" + +#: py/objslice.c +msgid "Cannot subclass slice" +msgstr "Wúfǎ zi fēnlèi" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot transfer without MOSI and MISO pins." +msgstr "Méiyǒu MOSI/MISO jiù wúfǎ zhuǎnyí." + +#: extmod/moductypes.c +msgid "Cannot unambiguously get sizeof scalar" +msgstr "Wúfǎ míngquè de huòdé biāoliàng de dàxiǎo" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Cannot vary frequency on a timer that is already in use" +msgstr "Wúfǎ gēnggǎi yǐ zài shǐyòng de jìshí qì shàng de pínlǜ" + +#: shared-module/bitbangio/SPI.c +msgid "Cannot write without MOSI pin." +msgstr "Wúfǎ xiě rù MOSI de yǐn jiǎo." + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "CharacteristicBuffer writing not provided" +msgstr "Wèi tígōng zìfú huǎncún xiě rù" + +#: supervisor/shared/safe_mode.c +msgid "CircuitPython core code crashed hard. Whoops!\n" +msgstr "CircuitPython de héxīn chūxiàn gùzhàng. Āiyā!\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"CircuitPython is in safe mode because you pressed the reset button during " +"boot. Press again to exit safe mode.\n" +msgstr "" +"CircuitPython chǔyú ānquán móshì, yīnwèi zài yǐndǎo guòchéng zhōng àn xiàle " +"chóng zhì ànniǔ. Zài àn yīcì tuìchū ānquán móshì.\n" + +#: shared-module/bitbangio/SPI.c +msgid "Clock pin init failed." +msgstr "Shízhōng de yǐn jiǎo chūshǐhuà shībài." + +#: shared-module/bitbangio/I2C.c +msgid "Clock stretch too long" +msgstr "Shízhōng shēnzhǎn tài zhǎng" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Clock unit in use" +msgstr "Shǐyòng shízhōng dānwèi" + +#: shared-bindings/_pew/PewPew.c +msgid "Column entry must be digitalio.DigitalInOut" +msgstr "Liè tiáomù bìxū shì digitalio.DigitalInOut" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Command must be an int between 0 and 255" +msgstr "Mìnglìng bìxū shì 0 dào 255 zhī jiān de int" + +#: shared-bindings/_bleio/Connection.c +msgid "" +"Connection has been disconnected and can no longer be used. Create a new " +"connection." +msgstr "Liánjiē yǐ duàn kāi, wúfǎ zài shǐyòng. Chuàngjiàn yīgè xīn de liánjiē." + +#: py/persistentcode.c +msgid "Corrupt .mpy file" +msgstr "Fǔbài de .mpy wénjiàn" + +#: py/emitglue.c +msgid "Corrupt raw code" +msgstr "Sǔnhuài de yuánshǐ dàimǎ" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +msgid "Could not initialize UART" +msgstr "Wúfǎ chūshǐhuà UART" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize channel" +msgstr "Wúfǎ chūshǐhuà píndào" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not initialize timer" +msgstr "Wúfǎ chūshǐhuà jìshí qì" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init channel" +msgstr "Wúfǎ chóngxīn chūshǐhuà píndào" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not re-init timer" +msgstr "Wúfǎ chóngxīn qǐdòng jìshí qì" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not restart PWM" +msgstr "Wúfǎ chóngqǐ PWM" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Could not start PWM" +msgstr "Wúfǎ qǐdòng PWM" + +#: ports/stm/common-hal/busio/UART.c +msgid "Could not start interrupt, RX busy" +msgstr "Wúfǎ qǐdòng zhōngduàn,RX máng" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate decoder" +msgstr "Zhǎo bù dào jiěmǎ qì" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate first buffer" +msgstr "Wúfǎ fēnpèi dì yī gè huǎnchōng qū" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate input buffer" +msgstr "Wúfǎ fēnpèi shūrù huǎnchōng qū" + +#: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c +#: shared-module/audiomp3/MP3Decoder.c +msgid "Couldn't allocate second buffer" +msgstr "Wúfǎ fēnpèi dì èr gè huǎnchōng qū" + +#: supervisor/shared/safe_mode.c +msgid "Crash into the HardFault_Handler." +msgstr "Zhuìhuǐ. Shūrù HardFault_Handler." + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Channel Init Error" +msgstr "DAC tōngdào chūshǐhuà cuòwù" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "DAC Device Init Error" +msgstr "DAC shèbèi chūshǐhuà cuòwù" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "DAC already in use" +msgstr "Fā yuán huì yǐjīng shǐyòng" + +#: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/nrf/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned" +msgstr "Shùjù 0 de yǐn jiǎo bìxū shì zì jié duìqí" + +#: shared-module/audiocore/WaveFile.c +msgid "Data chunk must follow fmt chunk" +msgstr "Shùjù kuài bìxū zūnxún fmt qū kuài" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Data too large for advertisement packet" +msgstr "Guǎnggào bāo de shùjù tài dà" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Destination capacity is smaller than destination_length." +msgstr "Mùbiāo róngliàng xiǎoyú mùdì de_chángdù." + +#: ports/nrf/common-hal/audiobusio/I2SOut.c +msgid "Device in use" +msgstr "Zhèngzài shǐyòng de shèbèi" + +#: ports/cxd56/common-hal/digitalio/DigitalInOut.c +msgid "DigitalInOut not supported on given pin" +msgstr "Gěi dìng de yǐn jiǎo bù zhīchí DigitalInOut" + +#: shared-bindings/displayio/Display.c +msgid "Display must have a 16 bit colorspace." +msgstr "Xiǎnshì bìxū jùyǒu 16 wèi yánsè kōngjiān." + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Display rotation must be in 90 degree increments" +msgstr "Xiǎnshì xuánzhuǎn bìxū 90 dù jiā xīn" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Drive mode not used when direction is input." +msgstr "Fāngxiàng shūrù shí qūdòng móshì méiyǒu shǐyòng." + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +msgid "EXTINT channel already in use" +msgstr "EXTINT píndào yǐjīng shǐyòng" + +#: extmod/modure.c +msgid "Error in regex" +msgstr "Zhèngzé biǎodá shì cuòwù" + +#: shared-bindings/microcontroller/Pin.c +#: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c +#: shared-bindings/terminalio/Terminal.c +msgid "Expected a %q" +msgstr "Yùqí %q" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c +msgid "Expected a Characteristic" +msgstr "Yùqí de tèdiǎn" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Expected a Service" +msgstr "Yùqí fúwù" + +#: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Service.c +msgid "Expected a UUID" +msgstr "Yùqí UUID" + +#: shared-bindings/_bleio/Adapter.c +msgid "Expected an Address" +msgstr "Qídài yīgè dìzhǐ" + +#: shared-module/_pixelbuf/PixelBuf.c +#, c-format +msgid "Expected tuple of length %d, got %d" +msgstr "Qīwàng de chángdù wèi %d de yuán zǔ, dédào %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "Bù zhīchí dài yǒu sǎomiáo xiǎngyìng de kuòzhǎn guǎngbò." + +#: extmod/ulab/code/fft.c +msgid "FFT is defined for ndarrays only" +msgstr "" + +#: shared-bindings/ps2io/Ps2.c +msgid "Failed sending command." +msgstr "Fāsòng mìnglìng shībài." + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to acquire mutex, err 0x%04x" +msgstr "Wúfǎ huòdé mutex, err 0x%04x" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +msgid "Failed to allocate RX buffer" +msgstr "Fēnpèi RX huǎnchōng shībài" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +#, c-format +msgid "Failed to allocate RX buffer of %d bytes" +msgstr "Fēnpèi RX huǎnchōng qū%d zì jié shībài" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: internal error" +msgstr "Liánjiē shībài: Nèibù cuòwù" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Failed to connect: timeout" +msgstr "Liánjiē shībài: Chāoshí" + +#: shared-module/audiomp3/MP3Decoder.c +msgid "Failed to parse MP3 file" +msgstr "Wúfǎ jiěxī MP3 wénjiàn" + +#: ports/nrf/sd_mutex.c +#, c-format +msgid "Failed to release mutex, err 0x%04x" +msgstr "Wúfǎ shìfàng mutex, err 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Failed to write internal flash." +msgstr "Wúfǎ xiě rù nèibù shǎncún." + +#: py/moduerrno.c +msgid "File exists" +msgstr "Wénjiàn cúnzài" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Frequency captured is above capability. Capture Paused." +msgstr "Pínlǜ bǔhuò gāo yú nénglì. Bǔhuò zàntíng." + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Frequency must match existing PWMOut using this timer" +msgstr "Pínlǜ bìxū yǔ shǐyòng cǐ jìshí qì de xiàn yǒu PWMOut xiāng pǐpèi" + +#: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c +#: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c +msgid "Function requires lock" +msgstr "Hánshù xūyào suǒdìng" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Group already used" +msgstr "Jítuán yǐjīng shǐyòngguò" + +#: shared-module/displayio/Group.c +msgid "Group full" +msgstr "Fēnzǔ yǐ mǎn" + +#: ports/stm/common-hal/busio/I2C.c ports/stm/common-hal/busio/SPI.c +msgid "Hardware busy, try alternative pins" +msgstr "Yìngjiàn máng, qǐng chángshì qítā zhēnjiǎo" + +#: ports/stm/common-hal/busio/UART.c +msgid "Hardware in use, try alternative pins" +msgstr "Shǐyòng de yìngjiàn, qǐng chángshì qítā yǐn jiǎo" + +#: extmod/vfs_posix_file.c py/objstringio.c +msgid "I/O operation on closed file" +msgstr "Wénjiàn shàng de I/ O cāozuò" + +#: ports/stm/common-hal/busio/I2C.c +msgid "I2C Init Error" +msgstr "I2C chūshǐhuà cuòwù" + +#: extmod/machine_i2c.c +msgid "I2C operation not supported" +msgstr "I2C cāozuò bù zhīchí" + +#: py/persistentcode.c +msgid "" +"Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" +"mpy-update for more info." +msgstr "" +"Bù jiānróng.Mpy wénjiàn. Qǐng gēngxīn suǒyǒu.Mpy wénjiàn. Yǒuguān xiángxì " +"xìnxī, qǐng cānyuè http://Adafru.It/mpy-update." + +#: shared-bindings/_pew/PewPew.c +msgid "Incorrect buffer size" +msgstr "Huǎnchōng qū dàxiǎo bù zhèngquè" + +#: py/moduerrno.c +msgid "Input/output error" +msgstr "Shūrù/shūchū cuòwù" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient authentication" +msgstr "Rènzhèng bùzú" + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "Insufficient encryption" +msgstr "Jiāmì bùzú" + +#: ports/stm/common-hal/busio/UART.c +msgid "Internal define error" +msgstr "Nèibù dìngyì cuòwù" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Invalid %q pin" +msgstr "Wúxiào de %q yǐn jiǎo" + +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Invalid ADC Unit value" +msgstr "Wúxiào de ADC dānwèi zhí" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Invalid BMP file" +msgstr "Wúxiào de BMP wénjiàn" + +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "Invalid DAC pin supplied" +msgstr "Tí gōng liǎo wúxiào de DAC yǐn jiǎo" + +#: ports/mimxrt10xx/common-hal/busio/I2C.c ports/stm/common-hal/busio/I2C.c +msgid "Invalid I2C pin selection" +msgstr "Wúxiào de I2C yǐn jiǎo xuǎnzé" + +#: ports/atmel-samd/common-hal/pulseio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PWMOut.c +#: ports/nrf/common-hal/pulseio/PWMOut.c shared-bindings/pulseio/PWMOut.c +msgid "Invalid PWM frequency" +msgstr "Wúxiào de PWM pínlǜ" + +#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +msgid "Invalid SPI pin selection" +msgstr "Wúxiào de SPI yǐn jiǎo xuǎnzé" + +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid UART pin selection" +msgstr "Wúxiào de UART yǐn jiǎo xuǎnzé" + +#: py/moduerrno.c +msgid "Invalid argument" +msgstr "Wúxiào de cānshù" + +#: shared-module/displayio/Bitmap.c +msgid "Invalid bits per value" +msgstr "Měi gè zhí de wèi wúxiào" + +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "Invalid buffer size" +msgstr "Wúxiào de huǎnchōng qū dàxiǎo" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Invalid byteorder string" +msgstr "Wúxiào de zì jié shùnxù zìfú chuàn" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "Invalid capture period. Valid range: 1 - 500" +msgstr "Wúxiào de bǔhuò zhōuqí. Yǒuxiào fànwéi: 1-500" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid channel count" +msgstr "Wúxiào de tōngdào jìshù" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Invalid direction." +msgstr "Wúxiào de fāngxiàng." + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid file" +msgstr "Wúxiào de wénjiàn" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid format chunk size" +msgstr "Géshì kuài dàxiǎo wúxiào" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid frequency supplied" +msgstr "Tígōng de pínlǜ wúxiào" + +#: supervisor/shared/safe_mode.c +msgid "Invalid memory access." +msgstr "Wúxiào de nèicún fǎngwèn." + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid number of bits" +msgstr "Wèi shù wúxiào" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid phase" +msgstr "Jiēduàn wúxiào" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: shared-bindings/pulseio/PWMOut.c +msgid "Invalid pin" +msgstr "Wúxiào de yǐn jiǎo" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for left channel" +msgstr "Zuǒ tōngdào de yǐn jiǎo wúxiào" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Invalid pin for right channel" +msgstr "Yòuxián tōngdào yǐn jiǎo wúxiào" + +#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/SPI.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c +#: ports/cxd56/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c +msgid "Invalid pins" +msgstr "Wúxiào de yǐn jiǎo" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "Invalid pins for PWMOut" +msgstr "" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "Invalid polarity" +msgstr "Wúxiào liǎng jí zhí" + +#: shared-bindings/_bleio/Characteristic.c +msgid "Invalid properties" +msgstr "Wúxiào de shǔxìng" + +#: shared-bindings/microcontroller/__init__.c +msgid "Invalid run mode." +msgstr "Wúxiào de yùnxíng móshì." + +#: shared-module/_bleio/Attribute.c +msgid "Invalid security_mode" +msgstr "Ānquán móshì wúxiào" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice" +msgstr "Yǔyīn wúxiào" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Invalid voice count" +msgstr "Wúxiào de yǔyīn jìshù" + +#: shared-module/audiocore/WaveFile.c +msgid "Invalid wave file" +msgstr "Wúxiào de làng làngcháo wénjiàn" + +#: ports/stm/common-hal/busio/UART.c +msgid "Invalid word/bit length" +msgstr "Wúxiào de zì/wèi chángdù" + +#: py/compile.c +msgid "LHS of keyword arg must be an id" +msgstr "Guānjiàn zì arg de LHS bìxū shì id" + +#: shared-module/displayio/Group.c +msgid "Layer already in a group." +msgstr "Tú céng yǐjīng zài yīgè zǔ zhōng." + +#: shared-module/displayio/Group.c +msgid "Layer must be a Group or TileGrid subclass." +msgstr "Layer bìxū shì Group huò TileGrid zi lèi." + +#: py/objslice.c +msgid "Length must be an int" +msgstr "Chángdù bìxū shì yīgè zhěngshù" + +#: py/objslice.c +msgid "Length must be non-negative" +msgstr "Chángdù bìxū shìfēi fùshù" + +#: shared-module/bitbangio/SPI.c +msgid "MISO pin init failed." +msgstr "MISO yǐn jiǎo chūshǐhuà shībài." + +#: shared-module/bitbangio/SPI.c +msgid "MOSI pin init failed." +msgstr "MOSI yǐn jiǎo shūrù shībài." + +#: shared-module/displayio/Shape.c +#, c-format +msgid "Maximum x value when mirrored is %d" +msgstr "Jìngxiàng shí de zuìdà X zhí wèi%d" + +#: supervisor/shared/safe_mode.c +msgid "MicroPython NLR jump failed. Likely memory corruption." +msgstr "MicroPython NLR tiào zhuǎn shībài. Kěnéng shì nèicún sǔnhuài." + +#: supervisor/shared/safe_mode.c +msgid "MicroPython fatal error." +msgstr "MicroPython zhìmìng cuòwù." + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Microphone startup delay must be in range 0.0 to 1.0" +msgstr "Màikèfēng qǐdòng yánchí bìxū zài 0.0 Dào 1.0 De fànwéi nèi" + +#: ports/stm/common-hal/busio/SPI.c +msgid "Missing MISO or MOSI Pin" +msgstr "Quēshǎo MISO huò MOSI yǐn jiǎo" + +#: shared-bindings/displayio/Group.c +msgid "Must be a %q subclass." +msgstr "Bìxū shì %q zi lèi." + +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide MISO or MOSI pin" +msgstr "Bìxū tígōng MISO huò MOSI yǐn jiǎo" + +#: py/parse.c +msgid "Name too long" +msgstr "" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "Negative step not supported" +msgstr "Bù zhīchí fù bù" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +msgid "No CCCD for this Characteristic" +msgstr "Zhège tèzhēng méiyǒu CCCD" + +#: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/stm/common-hal/analogio/AnalogOut.c +msgid "No DAC on chip" +msgstr "Méiyǒu DAC zài xīnpiàn shàng de" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "No DMA channel found" +msgstr "Wèi zhǎodào DMA píndào" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MISO Pin" +msgstr "Méiyǒu MISO yǐn jiǎo" + +#: ports/stm/common-hal/busio/SPI.c +msgid "No MOSI Pin" +msgstr "Méiyǒu MOSI yǐn jiǎo" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No RX pin" +msgstr "Wèi zhǎodào RX yǐn jiǎo" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/stm/common-hal/busio/UART.c +msgid "No TX pin" +msgstr "Wèi zhǎodào TX yǐn jiǎo" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +msgid "No available clocks" +msgstr "Méiyǒu kěyòng de shízhōng" + +#: shared-bindings/board/__init__.c +msgid "No default %q bus" +msgstr "wú mòrèn %q zǒngxiàn" + +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +msgid "No free GCLKs" +msgstr "Méiyǒu miǎnfèi de GCLKs" + +#: shared-bindings/os/__init__.c +msgid "No hardware random available" +msgstr "Méiyǒu kěyòng de yìngjiàn suíjī" + +#: ports/atmel-samd/common-hal/ps2io/Ps2.c +msgid "No hardware support on clk pin" +msgstr "Shízhōng yǐn jiǎo wú yìngjiàn zhīchí" + +#: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +msgid "No hardware support on pin" +msgstr "Méiyǒu zài yǐn jiǎo shàng de yìngjiàn zhīchí" + +#: ports/stm/common-hal/pulseio/PWMOut.c +msgid "No more timers available on this pin." +msgstr "Gāi yǐn jiǎo shàng méiyǒu kěyòng de dìngshí qì." + +#: shared-module/touchio/TouchIn.c +msgid "No pulldown on pin; 1Mohm recommended" +msgstr "Yǐn jiǎo shàng méiyǒu xiàlā; 1Mohm tuījiàn" + +#: py/moduerrno.c +msgid "No space left on device" +msgstr "Shèbèi shàng méiyǒu kònggé" + +#: py/moduerrno.c +msgid "No such file/directory" +msgstr "Méiyǒu cǐ lèi wénjiàn/mùlù" + +#: supervisor/shared/safe_mode.c +msgid "Nordic Soft Device failure assertion." +msgstr "Nordic ruǎn shèbèi gùzhàng shēngmíng." + +#: ports/nrf/common-hal/_bleio/__init__.c +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "Not connected" +msgstr "Wèi liánjiē" + +#: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c +#: shared-bindings/audiopwmio/PWMAudioOut.c +msgid "Not playing" +msgstr "Wèi bòfàng" + +#: shared-bindings/util.c +msgid "" +"Object has been deinitialized and can no longer be used. Create a new object." +msgstr "" +"Duìxiàng yǐjīng bèi shānchú, wúfǎ zài shǐyòng. Chuàngjiàn yīgè xīn duìxiàng." + +#: ports/nrf/common-hal/busio/UART.c +msgid "Odd parity is not supported" +msgstr "Bù zhīchí jīshù" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Only 8 or 16 bit mono with " +msgstr "Zhǐyǒu 8 huò 16 wèi dānwèi " + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only Windows format, uncompressed BMP supported: given header size is %d" +msgstr "" +"Jǐn zhīchí Windows géshì, zhīchí wèi yāsuō de BMP: Gěi dìng de biāo tóu " +"dàxiǎo wèi %d" + +#: shared-module/displayio/OnDiskBitmap.c +#, c-format +msgid "" +"Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " +"%d bpp given" +msgstr "" +"Jǐn zhīchí dān sè, suǒyǐn wéi 4bpp huò 8bpp yǐjí 16bpp huò gèng gāo de BMP: " +"Gěi chū %d bpp" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "Oversample must be multiple of 8." +msgstr "Guò cǎiyàng bìxū shì 8 de bèishù." + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" +msgstr "" +"PWM yìwù zhōuqí bìxū jiè yú 0 zhì 65535 de bāoróng xìng (16 wèi fēnbiàn lǜ)" + +#: shared-bindings/pulseio/PWMOut.c +msgid "" +"PWM frequency not writable when variable_frequency is False on construction." +msgstr "Dāng biànliàng_pínlǜ shì False zài jiànzhú shí PWM pínlǜ bùkě xiě." + +#: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c +#: ports/stm/common-hal/displayio/ParallelBus.c +msgid "ParallelBus not yet supported" +msgstr "Shàng bù zhīchí ParallelBus" + +#: py/moduerrno.c +msgid "Permission denied" +msgstr "Quánxiàn bèi jùjué" + +#: ports/atmel-samd/common-hal/analogio/AnalogIn.c +#: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c +#: ports/nrf/common-hal/analogio/AnalogIn.c +#: ports/stm/common-hal/analogio/AnalogIn.c +msgid "Pin does not have ADC capabilities" +msgstr "Pin méiyǒu ADC nénglì" + +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "Pin number already reserved by EXTI" +msgstr "" + +#: py/builtinhelp.c +msgid "Plus any modules on the filesystem\n" +msgstr "Zài wénjiàn xìtǒng shàng tiānjiā rènhé mókuài\n" + +#: shared-bindings/ps2io/Ps2.c +msgid "Pop from an empty Ps2 buffer" +msgstr "Cóng kōng de Ps2 huǎnchōng qū dànchū" + +#: shared-bindings/_bleio/Adapter.c +msgid "Prefix buffer must be on the heap" +msgstr "Qiánzhuì huǎnchōng qū bìxū zài duī shàng" + +#: main.c +msgid "Press any key to enter the REPL. Use CTRL-D to reload." +msgstr "Àn xià rènhé jiàn jìnrù REPL. Shǐyòng CTRL-D chóngxīn jiāzài." + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Pull not used when direction is output." +msgstr "Fāngxiàng shūchū shí Pull méiyǒu shǐyòng." + +#: ports/stm/common-hal/pulseio/PulseOut.c +msgid "PulseOut not supported on this chip" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG DeInit Error" +msgstr "RNG qǔxiāo chūshǐhuà cuòwù" + +#: ports/stm/common-hal/os/__init__.c +msgid "RNG Init Error" +msgstr "RNG chūshǐhuà cuòwù" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "RS485 inversion specified when not in RS485 mode" +msgstr "" + +#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c +#: ports/nrf/common-hal/rtc/RTC.c +msgid "RTC calibration is not supported on this board" +msgstr "Cǐ bǎn bù zhīchí RTC jiàozhǔn" + +#: shared-bindings/time/__init__.c +msgid "RTC is not supported on this board" +msgstr "Cǐ bǎn bù zhīchí RTC" + +#: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c +msgid "RTS/CTS/RS485 Not yet supported on this device" +msgstr "" + +#: ports/stm/common-hal/os/__init__.c +msgid "Random number generation error" +msgstr "Suíjī shù shēngchéng cuòwù" + +#: shared-bindings/pulseio/PulseIn.c +msgid "Read-only" +msgstr "Zhǐ dú" + +#: extmod/vfs_fat.c py/moduerrno.c +msgid "Read-only filesystem" +msgstr "Zhǐ dú wénjiàn xìtǒng" + +#: shared-module/displayio/Bitmap.c +msgid "Read-only object" +msgstr "Zhǐ dú duìxiàng" + +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Refresh too soon" +msgstr "Shuāxīn tài kuàile" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Right channel unsupported" +msgstr "Bù zhīchí yòu tōngdào" + +#: shared-bindings/_pew/PewPew.c +msgid "Row entry must be digitalio.DigitalInOut" +msgstr "Xíng xiàng bìxū shì digitalio.DigitalInOut" + +#: main.c +msgid "Running in safe mode! Auto-reload is off.\n" +msgstr "Zài ānquán móshì xià yùnxíng! Zìdòng chóngxīn jiāzài yǐ guānbì.\n" + +#: main.c +msgid "Running in safe mode! Not running saved code.\n" +msgstr "Zài ānquán móshì xià yùnxíng! Bù yùnxíng yǐ bǎocún de dàimǎ.\n" + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c +msgid "SDA or SCL needs a pull up" +msgstr "SDA huò SCL xūyào lādòng" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Init Error" +msgstr "SPI chūshǐhuà cuòwù" + +#: ports/stm/common-hal/busio/SPI.c +msgid "SPI Re-initialization error" +msgstr "SPI chóngxīn chūshǐhuà cuòwù" + +#: shared-bindings/audiomixer/Mixer.c +msgid "Sample rate must be positive" +msgstr "Cǎiyàng lǜ bìxū wèi zhèng shù" + +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +#, c-format +msgid "Sample rate too high. It must be less than %d" +msgstr "Cǎiyàng lǜ tài gāo. Tā bìxū xiǎoyú %d" + +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Scan already in progess. Stop with stop_scan." +msgstr "Zhèngzài jìn háng sǎomiáo. Shǐyòng stop_scan tíngzhǐ." + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected CTS pin not valid" +msgstr "" + +#: ports/mimxrt10xx/common-hal/busio/UART.c +msgid "Selected RTS pin not valid" +msgstr "" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Serializer in use" +msgstr "Xùliè huà yǐjīng shǐyòngguò" + +#: shared-bindings/nvm/ByteArray.c +msgid "Slice and value different lengths." +msgstr "Qiēpiàn hé zhí bùtóng chángdù." + +#: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c +msgid "Slices not supported" +msgstr "Qiēpiàn bù shòu zhīchí" + +#: extmod/modure.c +msgid "Splitting with sub-captures" +msgstr "Yǔ zi bǔhuò fēnliè" + +#: shared-bindings/supervisor/__init__.c +msgid "Stack size must be at least 256" +msgstr "Duīzhàn dàxiǎo bìxū zhìshǎo 256" + +#: shared-bindings/multiterminal/__init__.c +msgid "Stream missing readinto() or write() method." +msgstr "Liú quēshǎo readinto() huò write() fāngfǎ." + +#: ports/stm/common-hal/busio/UART.c +msgid "Supply at least one UART pin" +msgstr "Dìngyì zhìshǎo yīgè UART yǐn jiǎo" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Temperature read timed out" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "" +"The CircuitPython heap was corrupted because the stack was too small.\n" +"Please increase the stack size if you know how, or if not:" +msgstr "" +"Yóuyú duīzhàn tài xiǎo,CircuitPython duī yǐ sǔnhuài.\n" +"Rúguǒ nín zhīdào rúhé zēngjiā duīzhàn dàxiǎo, fǒuzé:" + +#: supervisor/shared/safe_mode.c +msgid "" +"The `microcontroller` module was used to boot into safe mode. Press reset to " +"exit safe mode.\n" +msgstr "" +"“Wēi kòngzhì qì” mókuài yòng yú qǐdòng ānquán móshì. Àn chóng zhì kě tuìchū " +"ānquán móshì.\n" + +#: supervisor/shared/safe_mode.c +msgid "" +"The microcontroller's power dipped. Make sure your power supply provides\n" +"enough power for the whole circuit and press reset (after ejecting " +"CIRCUITPY).\n" +msgstr "" +"wēi kòng zhì qì de gōng lǜ jiàng dī. Quèbǎo nín de diànyuán wèi zhěnggè\n" +"diànlù tígōng zúgòu de diànyuán, bìng àn xià fùwèi (Dànchū CIRCUITPY " +"zhīhòu).\n" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's bits_per_sample does not match the mixer's" +msgstr "Yàngběn de bits_per_sample yǔ hǔn yīn qì bù pǐpèi" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's channel count does not match the mixer's" +msgstr "Yàngběn de píndào jìshù yǔ hǔn yīn qì bù xiāngfú" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's sample rate does not match the mixer's" +msgstr "Yàngběn de yàngběn sùdù yǔ hǔn yīn qì de xiāngchà bù pǐpèi" + +#: shared-module/audiomixer/MixerVoice.c +msgid "The sample's signedness does not match the mixer's" +msgstr "Yàngběn de qiānmíng yǔ hǔn yīn qì de qiānmíng bù pǐpèi" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile height must exactly divide bitmap height" +msgstr "Píng pū gāodù bìxū huàfēn wèi tú gāodù" + +#: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c +msgid "Tile index out of bounds" +msgstr "Píng pū zhǐshù chāochū fànwéi" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile value out of bounds" +msgstr "Píng pū zhí chāochū fànwéi" + +#: shared-bindings/displayio/TileGrid.c +msgid "Tile width must exactly divide bitmap width" +msgstr "Píng pū kuāndù bìxū huàfēn wèi tú kuāndù" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +msgid "Too many channels in sample." +msgstr "Chōuyàng zhōng de píndào tài duō." + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "Too many display busses" +msgstr "Xiǎnshì zǒngxiàn tài duōle" + +#: shared-bindings/displayio/Display.c +#: shared-bindings/displayio/EPaperDisplay.c +msgid "Too many displays" +msgstr "Xiǎnshì tài duō" + +#: py/obj.c +msgid "Traceback (most recent call last):\n" +msgstr "Traceback (Zuìjìn yīcì dǎ diànhuà):\n" + +#: shared-bindings/time/__init__.c +msgid "Tuple or struct_time argument required" +msgstr "Xūyào Tuple huò struct_time cānshù" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Buffer allocation error" +msgstr "UART huǎnchōng qū fēnpèi cuòwù" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART De-init error" +msgstr "UART qǔxiāo chūshǐhuà cuòwù" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Init Error" +msgstr "UART chūshǐhuà cuòwù" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART Re-init error" +msgstr "UART chóngxīn chūshǐhuà cuòwù" + +#: ports/stm/common-hal/busio/UART.c +msgid "UART write error" +msgstr "UART xiě cuòwù" + +#: shared-module/usb_hid/Device.c +msgid "USB Busy" +msgstr "USB máng" + +#: shared-module/usb_hid/Device.c +msgid "USB Error" +msgstr "USB Cuòwù" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID integer value must be 0-0xffff" +msgstr "UUID zhěngshù zhí bìxū wèi 0-0xffff" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" +msgstr "UUID Zìfú chuàn bùshì 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" + +#: shared-bindings/_bleio/UUID.c +msgid "UUID value is not str, int or byte buffer" +msgstr "UUID zhí bùshì str,int huò zì jié huǎnchōng qū" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audioio/AudioOut.c +msgid "Unable to allocate buffers for signed conversion" +msgstr "Wúfǎ fēnpèi huǎnchōng qū yòng yú qiānmíng zhuǎnhuàn" + +#: shared-module/displayio/I2CDisplay.c +#, c-format +msgid "Unable to find I2C Display at %x" +msgstr "Wúfǎ zài%x zhǎodào I2C xiǎnshìqì" + +#: ports/atmel-samd/common-hal/audiobusio/I2SOut.c +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "Unable to find free GCLK" +msgstr "Wúfǎ zhǎodào miǎnfèi de GCLK" + +#: py/parse.c +msgid "Unable to init parser" +msgstr "Wúfǎ chūshǐ jiěxī qì" + +#: shared-module/displayio/OnDiskBitmap.c +msgid "Unable to read color palette data" +msgstr "Wúfǎ dòu qǔ sè tiáo shùjù" + +#: shared-bindings/nvm/ByteArray.c +msgid "Unable to write to nvm." +msgstr "Wúfǎ xiě rù nvm." + +#: ports/nrf/common-hal/_bleio/UUID.c +msgid "Unexpected nrfx uuid type" +msgstr "Yìwài de nrfx uuid lèixíng" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown gatt error: 0x%04x" +msgstr "Wèizhī de gatt cuòwù: 0x%04x" + +#: supervisor/shared/safe_mode.c +msgid "Unknown reason." +msgstr "Yuányīn bùmíng." + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown security error: 0x%04x" +msgstr "Wèizhī de ānquán cuòwù: 0x%04x" + +#: ports/nrf/common-hal/_bleio/__init__.c +#, c-format +msgid "Unknown soft device error: %04x" +msgstr "Wèizhī de ruǎn shèbèi cuòwù: %04x" + +#: shared-bindings/_pixelbuf/PixelBuf.c +#, c-format +msgid "Unmatched number of items on RHS (expected %d, got %d)." +msgstr "RHS (yùqí %d, huòdé %d) shàng wèi pǐpèi de xiàngmù." + +#: ports/nrf/common-hal/_bleio/__init__.c +msgid "" +"Unspecified issue. Can be that the pairing prompt on the other device was " +"declined or ignored." +msgstr "" +"Wèi zhǐdìng de wèntí. Kěnéng shì qítā shèbèi shàng de pèiduì tíshì bèi jùjué " +"huò hūlüè." + +#: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +msgid "Unsupported baudrate" +msgstr "Bù zhīchí de baudrate" + +#: shared-module/displayio/display_core.c +msgid "Unsupported display bus type" +msgstr "Bù zhīchí de gōnggòng qìchē lèixíng" + +#: shared-module/audiocore/WaveFile.c +msgid "Unsupported format" +msgstr "Bù zhīchí de géshì" + +#: py/moduerrno.c +msgid "Unsupported operation" +msgstr "Bù zhīchí de cāozuò" + +#: shared-bindings/digitalio/DigitalInOut.c +msgid "Unsupported pull value." +msgstr "Bù zhīchí de lādòng zhí." + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length != required fixed length" +msgstr "Zhí chángdù != Suǒ xū de gùdìng chángdù" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +msgid "Value length > max_length" +msgstr "Zhí chángdù > zuìdà chángdù" + +#: py/emitnative.c +msgid "Viper functions don't currently support more than 4 arguments" +msgstr "Viper hánshù mùqián bù zhīchí chāoguò 4 gè cānshù" + +#: ports/stm/common-hal/microcontroller/Processor.c +msgid "Voltage read timed out" +msgstr "" + +#: main.c +msgid "WARNING: Your code filename has two extensions\n" +msgstr "Jǐnggào: Nǐ de dàimǎ wénjiàn míng yǒu liǎng gè kuòzhǎn míng\n" + +#: py/builtinhelp.c +#, c-format +msgid "" +"Welcome to Adafruit CircuitPython %s!\n" +"\n" +"Please visit learn.adafruit.com/category/circuitpython for project guides.\n" +"\n" +"To list built-in modules please do `help(\"modules\")`.\n" +msgstr "" +"Huānyíng lái dào Adafruit CircuitPython%s!\n" +"\n" +"Qǐng fǎngwèn xuéxí. learn.Adafruit.com/category/circuitpython.\n" +"\n" +"Ruò yào liè chū nèizài de mókuài, qǐng qǐng zuò yǐxià `help(\"modules\")`.\n" + +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "Tèzhēng bù zhīchí xiě rù" + +#: supervisor/shared/safe_mode.c +msgid "You are in safe mode: something unanticipated happened.\n" +msgstr "Nín chǔyú ānquán móshì: Chū hū yìliào de shìqíng fāshēngle.\n" + +#: supervisor/shared/safe_mode.c +msgid "You requested starting safe mode by " +msgstr "Nín qǐngqiú qǐdòng ānquán móshì " + +#: py/objtype.c +msgid "__init__() should return None" +msgstr "__init__() fǎnhuí not" + +#: py/objtype.c +#, c-format +msgid "__init__() should return None, not '%s'" +msgstr "__Init__() yīnggāi fǎnhuí not, ér bùshì '%s'" + +#: py/objobject.c +msgid "__new__ arg must be a user-type" +msgstr "__new__ cānshù bìxū shì yònghù lèixíng" + +#: extmod/modubinascii.c extmod/moduhashlib.c +msgid "a bytes-like object is required" +msgstr "xūyào yīgè zì jié lèi duìxiàng" + +#: lib/embed/abort_.c +msgid "abort() called" +msgstr "zhōngzhǐ () diàoyòng" + +#: extmod/machine_mem.c +#, c-format +msgid "address %08x is not aligned to %d bytes" +msgstr "wèi zhǐ %08x wèi yǔ %d wèi yuán zǔ duìqí" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "address out of bounds" +msgstr "dìzhǐ chāochū biānjiè" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "addresses is empty" +msgstr "dìzhǐ wèi kōng" + +#: extmod/ulab/code/vectorise.c +msgid "arctan2 is implemented for scalars and ndarrays only" +msgstr "" + +#: py/modbuiltins.c +msgid "arg is an empty sequence" +msgstr "cānshù shì yīgè kōng de xùliè" + +#: extmod/ulab/code/numerical.c +msgid "argsort argument must be an ndarray" +msgstr "" + +#: py/runtime.c +msgid "argument has wrong type" +msgstr "cānshù lèixíng cuòwù" + +#: py/argcheck.c shared-bindings/_stage/__init__.c +#: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c +msgid "argument num/types mismatch" +msgstr "cānshù biānhào/lèixíng bù pǐpèi" + +#: py/runtime.c +msgid "argument should be a '%q' not a '%q'" +msgstr "cānshù yīnggāi shì '%q', 'bùshì '%q'" + +#: extmod/ulab/code/linalg.c +msgid "arguments must be ndarrays" +msgstr "" + +#: py/objarray.c shared-bindings/nvm/ByteArray.c +msgid "array/bytes required on right side" +msgstr "yòu cè xūyào shùzǔ/zì jié" + +#: py/objstr.c +msgid "attributes not supported yet" +msgstr "shǔxìng shàngwèi zhīchí" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, None, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be -1, 0, or 1" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "axis must be None, 0, or 1" +msgstr "" + +#: py/builtinevex.c +msgid "bad compile mode" +msgstr "biānyì móshì cuòwù" + +#: py/objstr.c +msgid "bad conversion specifier" +msgstr "cuòwù zhuǎnhuàn biāozhù" + +#: py/objstr.c +msgid "bad format string" +msgstr "géshì cuòwù zìfú chuàn" + +#: py/binary.c +msgid "bad typecode" +msgstr "cuòwù de dàimǎ lèixíng" + +#: py/emitnative.c +msgid "binary op %q not implemented" +msgstr "èrjìnzhì bǎn qián bǎn %q wèi zhíxíng" + +#: shared-bindings/busio/UART.c +msgid "bits must be 7, 8 or 9" +msgstr "bǐtè bìxū shì 7,8 huò 9" + +#: extmod/machine_spi.c +msgid "bits must be 8" +msgstr "bǐtè bìxū shì 8" + +#: shared-bindings/audiomixer/Mixer.c +msgid "bits_per_sample must be 8 or 16" +msgstr "měi jiàn yàngběn bìxū wèi 8 huò 16" + +#: py/emitinlinethumb.c +msgid "branch not in range" +msgstr "fēnzhī bùzài fànwéi nèi" + +#: shared-bindings/audiocore/RawSample.c +msgid "buffer must be a bytes-like object" +msgstr "huǎnchōng qū bìxū shì zì jié lèi duìxiàng" + +#: shared-module/struct/__init__.c +msgid "buffer size must match format" +msgstr "huǎnchōng qū dàxiǎo bìxū pǐpèi géshì" + +#: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c +msgid "buffer slices must be of equal length" +msgstr "huǎnchōng qū qiēpiàn bìxū chángdù xiāngděng" + +#: py/modstruct.c shared-bindings/struct/__init__.c +#: shared-module/struct/__init__.c +msgid "buffer too small" +msgstr "huǎnchōng qū tài xiǎo" + +#: extmod/machine_spi.c +msgid "buffers must be the same length" +msgstr "huǎnchōng qū bìxū shì chángdù xiāngtóng" + +#: shared-bindings/_pew/PewPew.c +msgid "buttons must be digitalio.DigitalInOut" +msgstr "ànniǔ bìxū shì digitalio.DigitalInOut" + +#: py/vm.c +msgid "byte code not implemented" +msgstr "zì jié dàimǎ wèi zhíxíng" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "byteorder is not a string" +msgstr "byteorder bùshì zìfú chuàn" + +#: ports/atmel-samd/common-hal/busio/UART.c +msgid "bytes > 8 bits not supported" +msgstr "zì jié > 8 wèi" + +#: py/objstr.c +msgid "bytes value out of range" +msgstr "zì jié zhí chāochū fànwéi" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is out of range" +msgstr "jiàozhǔn fànwéi chāochū fànwéi" + +#: ports/atmel-samd/bindings/samd/Clock.c +msgid "calibration is read only" +msgstr "jiàozhǔn zhǐ dú dào" + +#: ports/atmel-samd/common-hal/rtc/RTC.c +msgid "calibration value out of range +/-127" +msgstr "jiàozhǔn zhí chāochū fànwéi +/-127" + +#: py/emitinlinethumb.c +msgid "can only have up to 4 parameters to Thumb assembly" +msgstr "zhǐyǒu Thumb zǔjiàn zuìduō 4 cānshù" + +#: py/emitinlinextensa.c +msgid "can only have up to 4 parameters to Xtensa assembly" +msgstr "zhǐyǒu Xtensa zǔjiàn zuìduō 4 cānshù" + +#: py/persistentcode.c +msgid "can only save bytecode" +msgstr "zhǐ néng bǎocún zì jié mǎ jìlù" + +#: py/objtype.c +msgid "can't add special method to already-subclassed class" +msgstr "wúfǎ tiānjiā tèshū fāngfǎ dào zi fēnlèi lèi" + +#: py/compile.c +msgid "can't assign to expression" +msgstr "bùnéng fēnpèi dào biǎodá shì" + +#: py/obj.c +#, c-format +msgid "can't convert %s to complex" +msgstr "wúfǎ zhuǎnhuàn%s dào fùzá" + +#: py/obj.c +#, c-format +msgid "can't convert %s to float" +msgstr "wúfǎ zhuǎnhuàn %s dào fú diǎn xíng biànliàng" + +#: py/obj.c +#, c-format +msgid "can't convert %s to int" +msgstr "wúfǎ zhuǎnhuàn%s dào int" + +#: py/objstr.c +msgid "can't convert '%q' object to %q implicitly" +msgstr "wúfǎ jiāng '%q' duìxiàng zhuǎnhuàn wèi %q yǐn hán" + +#: py/objint.c +msgid "can't convert NaN to int" +msgstr "wúfǎ jiāng dǎoháng zhuǎnhuàn wèi int" + +#: shared-bindings/i2cslave/I2CSlave.c +msgid "can't convert address to int" +msgstr "wúfǎ jiāng dìzhǐ zhuǎnhuàn wèi int" + +#: py/objint.c +msgid "can't convert inf to int" +msgstr "bùnéng jiāng inf zhuǎnhuàn wèi int" + +#: py/obj.c +msgid "can't convert to complex" +msgstr "bùnéng zhuǎnhuàn wèi fùzá" + +#: py/obj.c +msgid "can't convert to float" +msgstr "bùnéng zhuǎnhuàn wèi fú diǎn" + +#: py/obj.c +msgid "can't convert to int" +msgstr "bùnéng zhuǎnhuàn wèi int" + +#: py/objstr.c +msgid "can't convert to str implicitly" +msgstr "bùnéng mò shì zhuǎnhuàn wèi str" + +#: py/compile.c +msgid "can't declare nonlocal in outer code" +msgstr "wúfǎ zàiwài dàimǎ zhōng shēngmíng fēi běndì" + +#: py/compile.c +msgid "can't delete expression" +msgstr "bùnéng shānchú biǎodá shì" + +#: py/emitnative.c +msgid "can't do binary op between '%q' and '%q'" +msgstr "bùnéng zài '%q' hé '%q' zhī jiān jìnxíng èr yuán yùnsuàn" + +#: py/objcomplex.c +msgid "can't do truncated division of a complex number" +msgstr "bùnéng fēnjiě fùzá de shùzì" + +#: py/compile.c +msgid "can't have multiple **x" +msgstr "wúfǎ yǒu duō gè **x" + +#: py/compile.c +msgid "can't have multiple *x" +msgstr "wúfǎ yǒu duō gè *x" + +#: py/emitnative.c +msgid "can't implicitly convert '%q' to 'bool'" +msgstr "bùnéng yǐn hán de jiāng '%q' zhuǎnhuàn wèi 'bool'" + +#: py/emitnative.c +msgid "can't load from '%q'" +msgstr "wúfǎ cóng '%q' jiāzài" + +#: py/emitnative.c +msgid "can't load with '%q' index" +msgstr "wúfǎ yòng '%q' ' suǒyǐn jiāzài" + +#: py/objgenerator.c +msgid "can't pend throw to just-started generator" +msgstr "bùnéng bǎ tā rēng dào gāng qǐdòng de fā diànjī shàng" + +#: py/objgenerator.c +msgid "can't send non-None value to a just-started generator" +msgstr "wúfǎ xiàng gānggāng qǐdòng de shēngchéng qì fāsòng fēi zhí" + +#: py/objnamedtuple.c +msgid "can't set attribute" +msgstr "wúfǎ shèzhì shǔxìng" + +#: py/emitnative.c +msgid "can't store '%q'" +msgstr "wúfǎ cúnchú '%q'" + +#: py/emitnative.c +msgid "can't store to '%q'" +msgstr "bùnéng cúnchú dào'%q'" + +#: py/emitnative.c +msgid "can't store with '%q' index" +msgstr "bùnéng cúnchú '%q' suǒyǐn" + +#: py/objstr.c +msgid "" +"can't switch from automatic field numbering to manual field specification" +msgstr "wúfǎ zìdòng zìduàn biānhào gǎi wèi shǒudòng zìduàn guīgé" + +#: py/objstr.c +msgid "" +"can't switch from manual field specification to automatic field numbering" +msgstr "wúfǎ cóng shǒudòng zìduàn guīgé qiēhuàn dào zìdòng zìduàn biānhào" + +#: py/objtype.c +msgid "cannot create '%q' instances" +msgstr "wúfǎ chuàngjiàn '%q' ' shílì" + +#: py/objtype.c +msgid "cannot create instance" +msgstr "wúfǎ chuàngjiàn shílì" + +#: py/runtime.c +msgid "cannot import name %q" +msgstr "wúfǎ dǎorù míngchēng %q" + +#: py/builtinimport.c +msgid "cannot perform relative import" +msgstr "wúfǎ zhíxíng xiāngguān dǎorù" + +#: extmod/ulab/code/ndarray.c +msgid "cannot reshape array (incompatible input/output shape)" +msgstr "" + +#: py/emitnative.c +msgid "casting" +msgstr "tóuyǐng" + +#: shared-bindings/_stage/Text.c +msgid "chars buffer too small" +msgstr "zìfú huǎnchōng qū tài xiǎo" + +#: py/modbuiltins.c +msgid "chr() arg not in range(0x110000)" +msgstr "chr() cān shǔ bùzài fànwéi (0x110000)" + +#: py/modbuiltins.c +msgid "chr() arg not in range(256)" +msgstr "chr() cān shǔ bùzài fànwéi (256)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" +msgstr "" +"yánsè huǎnchōng qū bìxū wèi 3 zì jié (RGB) huò 4 zì jié (RGB + pad zì jié)" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a buffer, tuple, list, or int" +msgstr "" +"Yánsè huǎnchōng qū bìxū shì huǎnchōng qū, yuán zǔ, lièbiǎo huò zhěngshù" + +#: shared-bindings/displayio/Palette.c +msgid "color buffer must be a bytearray or array of type 'b' or 'B'" +msgstr "" +"yánsè huǎnchōng qū bìxū shì zì jié shùzǔ huò lèixíng wèi 'b' huò 'B' de shùzǔ" + +#: shared-bindings/displayio/Palette.c +msgid "color must be between 0x000000 and 0xffffff" +msgstr "yánsè bìxū jiè yú 0x000000 hé 0xffffff zhī jiān" + +#: shared-bindings/displayio/ColorConverter.c +msgid "color should be an int" +msgstr "yánsè yīng wèi zhěngshù" + +#: py/objcomplex.c +msgid "complex division by zero" +msgstr "fùzá de fēngé wèi 0" + +#: py/objfloat.c py/parsenum.c +msgid "complex values not supported" +msgstr "bù zhīchí fùzá de zhí" + +#: extmod/moduzlib.c +msgid "compression header" +msgstr "yāsuō tóu bù" + +#: py/parse.c +msgid "constant must be an integer" +msgstr "chángshù bìxū shì yīgè zhěngshù" + +#: py/emitnative.c +msgid "conversion to object" +msgstr "zhuǎnhuàn wèi duìxiàng" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be linear arrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must be ndarrays" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "convolve arguments must not be empty" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "could not broadast input array from shape" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "could not invert Vandermonde matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "ddof must be smaller than length of data set" +msgstr "" + +#: py/parsenum.c +msgid "decimal numbers not supported" +msgstr "bù zhīchí xiǎoshù shù" + +#: py/compile.c +msgid "default 'except' must be last" +msgstr "mòrèn 'except' bìxū shì zuìhòu yīgè" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "" +"destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" +msgstr "" +"mùbiāo huǎnchōng qū bìxū shì zì yǎnlèi huò lèixíng 'B' wèi wèi shēndù = 8" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination buffer must be an array of type 'H' for bit_depth = 16" +msgstr "mùbiāo huǎnchōng qū bìxū shì wèi shēndù'H' lèixíng de shùzǔ = 16" + +#: shared-bindings/audiobusio/PDMIn.c +msgid "destination_length must be an int >= 0" +msgstr "mùbiāo chángdù bìxū shì > = 0 de zhěngshù" + +#: py/objdict.c +msgid "dict update sequence has wrong length" +msgstr "yǔfǎ gēngxīn xùliè de chángdù cuòwù" + +#: extmod/ulab/code/numerical.c +msgid "diff argument must be an ndarray" +msgstr "" + +#: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c +#: shared-bindings/math/__init__.c +msgid "division by zero" +msgstr "bèi líng chú" + +#: py/objdeque.c +msgid "empty" +msgstr "kòngxián" + +#: extmod/moduheapq.c extmod/modutimeq.c +msgid "empty heap" +msgstr "kōng yīn yīnxiào" + +#: py/objstr.c +msgid "empty separator" +msgstr "kōng fēngé fú" + +#: shared-bindings/random/__init__.c +msgid "empty sequence" +msgstr "kōng xùliè" + +#: py/objstr.c +msgid "end of format while looking for conversion specifier" +msgstr "xúnzhǎo zhuǎnhuàn biāozhù géshì de jiéshù" + +#: shared-bindings/displayio/Shape.c +msgid "end_x should be an int" +msgstr "jiéwěi_x yīnggāi shì yīgè zhěngshù" + +#: ports/nrf/common-hal/busio/UART.c +#, c-format +msgid "error = 0x%08lX" +msgstr "cuòwù = 0x%08lX" + +#: py/runtime.c +msgid "exceptions must derive from BaseException" +msgstr "lìwài bìxū láizì BaseException" + +#: py/objstr.c +msgid "expected ':' after format specifier" +msgstr "zài géshì shuōmíng fú zhīhòu yùqí ':'" + +#: py/obj.c +msgid "expected tuple/list" +msgstr "yùqí de yuán zǔ/lièbiǎo" + +#: py/modthread.c +msgid "expecting a dict for keyword args" +msgstr "qídài guānjiàn zì cān shǔ de zìdiǎn" + +#: py/compile.c +msgid "expecting an assembler instruction" +msgstr "qídài zhuāngpèi zhǐlìng" + +#: py/compile.c +msgid "expecting just a value for set" +msgstr "jǐn qídài shèzhì de zhí" + +#: py/compile.c +msgid "expecting key:value for dict" +msgstr "qídài guānjiàn: Zìdiǎn de jiàzhí" + +#: py/argcheck.c +msgid "extra keyword arguments given" +msgstr "éwài de guānjiàn cí cānshù" + +#: py/argcheck.c +msgid "extra positional arguments given" +msgstr "gěi chūle éwài de wèizhì cānshù" + +#: py/parse.c +msgid "f-string expression part cannot include a '#'" +msgstr "" + +#: py/parse.c +msgid "f-string expression part cannot include a backslash" +msgstr "" + +#: py/parse.c +msgid "f-string: empty expression not allowed" +msgstr "" + +#: py/parse.c +msgid "f-string: expecting '}'" +msgstr "" + +#: py/parse.c +msgid "f-string: single '}' is not allowed" +msgstr "" + +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c +#: shared-bindings/displayio/OnDiskBitmap.c +msgid "file must be a file opened in byte mode" +msgstr "wénjiàn bìxū shì zài zì jié móshì xià dǎkāi de wénjiàn" + +#: shared-bindings/storage/__init__.c +msgid "filesystem must provide mount method" +msgstr "wénjiàn xìtǒng bìxū tígōng guà zài fāngfǎ" + +#: extmod/ulab/code/ndarray.c +msgid "first argument must be an iterable" +msgstr "" + +#: extmod/ulab/code/vectorise.c +msgid "first argument must be an ndarray" +msgstr "" + +#: py/objtype.c +msgid "first argument to super() must be type" +msgstr "chāojí () de dì yī gè cānshù bìxū shì lèixíng" + +#: extmod/machine_spi.c +msgid "firstbit must be MSB" +msgstr "dì yī wèi bìxū shì MSB" + +#: extmod/ulab/code/ndarray.c +msgid "flattening order must be either 'C', or 'F'" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "flip argument must be an ndarray" +msgstr "" + +#: py/objint.c +msgid "float too big" +msgstr "fú diǎn tài dà" + +#: shared-bindings/_stage/Text.c +msgid "font must be 2048 bytes long" +msgstr "zìtǐ bìxū wèi 2048 zì jié" + +#: py/objstr.c +msgid "format requires a dict" +msgstr "géshì yāoqiú yīgè yǔjù" + +#: py/objdeque.c +msgid "full" +msgstr "chōngfèn" + +#: extmod/ulab/code/linalg.c +msgid "function defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +msgid "function does not take keyword arguments" +msgstr "hánshù méiyǒu guānjiàn cí cānshù" + +#: py/argcheck.c +#, c-format +msgid "function expected at most %d arguments, got %d" +msgstr "hánshù yùjì zuìduō %d cānshù, huòdé %d" + +#: py/bc.c py/objnamedtuple.c +msgid "function got multiple values for argument '%q'" +msgstr "hánshù huòdé cānshù '%q' de duōchóng zhí" + +#: extmod/ulab/code/linalg.c +msgid "function is defined for ndarrays only" +msgstr "" + +#: py/argcheck.c +#, c-format +msgid "function missing %d required positional arguments" +msgstr "hánshù diūshī %d suǒ xū wèizhì cānshù" + +#: py/bc.c +msgid "function missing keyword-only argument" +msgstr "hánshù quēshǎo guānjiàn zì cānshù" + +#: py/bc.c +msgid "function missing required keyword argument '%q'" +msgstr "hánshù quēshǎo suǒ xū guānjiàn zì cānshù '%q'" + +#: py/bc.c +#, c-format +msgid "function missing required positional argument #%d" +msgstr "hánshù quēshǎo suǒ xū de wèizhì cānshù #%d" + +#: py/argcheck.c py/bc.c py/objnamedtuple.c +#, c-format +msgid "function takes %d positional arguments but %d were given" +msgstr "hánshù xūyào %d gè wèizhì cānshù, dàn %d bèi gěi chū" + +#: shared-bindings/time/__init__.c +msgid "function takes exactly 9 arguments" +msgstr "hánshù xūyào wánquán 9 zhǒng cānshù" + +#: py/objgenerator.c +msgid "generator already executing" +msgstr "shēngchéng qì yǐjīng zhíxíng" + +#: py/objgenerator.c +msgid "generator ignored GeneratorExit" +msgstr "shēngchéng qì hūlüè shēngchéng qì tuìchū" + +#: shared-bindings/_stage/Layer.c +msgid "graphic must be 2048 bytes long" +msgstr "túxíng bìxū wèi 2048 zì jié" + +#: extmod/moduheapq.c +msgid "heap must be a list" +msgstr "duī bìxū shì yīgè lièbiǎo" + +#: py/compile.c +msgid "identifier redefined as global" +msgstr "biāozhì fú chóngxīn dìngyì wèi quánjú" + +#: py/compile.c +msgid "identifier redefined as nonlocal" +msgstr "biāozhì fú chóngxīn dìngyì wéi fēi běndì" + +#: py/objstr.c +msgid "incomplete format" +msgstr "géshì bù wánzhěng" + +#: py/objstr.c +msgid "incomplete format key" +msgstr "géshì bù wánzhěng de mì yào" + +#: extmod/modubinascii.c +msgid "incorrect padding" +msgstr "bù zhèngquè de tiánchōng" + +#: extmod/ulab/code/ndarray.c +msgid "index is out of bounds" +msgstr "" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c py/obj.c +msgid "index out of range" +msgstr "suǒyǐn chāochū fànwéi" + +#: py/obj.c +msgid "indices must be integers" +msgstr "suǒyǐn bìxū shì zhěngshù" + +#: extmod/ulab/code/ndarray.c +msgid "indices must be integers, slices, or Boolean lists" +msgstr "" + +#: py/compile.c +msgid "inline assembler must be a function" +msgstr "nèi lián jíhé bìxū shì yīgè hánshù" + +#: extmod/ulab/code/create.c +msgid "input argument must be an integer or a 2-tuple" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "input array length must be power of 2" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input data must be an iterable" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is asymmetric" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input matrix is singular" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "input must be square matrix" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "input must be tuple, list, range, or ndarray" +msgstr "" + +#: extmod/ulab/code/poly.c +msgid "input vectors must be of equal length" +msgstr "" + +#: py/parsenum.c +msgid "int() arg 2 must be >= 2 and <= 36" +msgstr "zhěngshù() cānshù 2 bìxū > = 2 qiě <= 36" + +#: py/objstr.c +msgid "integer required" +msgstr "xūyào zhěngshù" + +#: shared-bindings/_bleio/Adapter.c +#, c-format +msgid "interval must be in range %s-%s" +msgstr "Jiàngé bìxū zài %s-%s fànwéi nèi" + +#: extmod/machine_i2c.c +msgid "invalid I2C peripheral" +msgstr "wúxiào de I2C wàiwéi qì" + +#: extmod/machine_spi.c +msgid "invalid SPI peripheral" +msgstr "wúxiào de SPI wàiwéi qì" + +#: lib/netutils/netutils.c +msgid "invalid arguments" +msgstr "wúxiào de cānshù" + +#: extmod/modussl_axtls.c +msgid "invalid cert" +msgstr "zhèngshū wúxiào" + +#: extmod/uos_dupterm.c +msgid "invalid dupterm index" +msgstr "dupterm suǒyǐn wúxiào" + +#: extmod/modframebuf.c +msgid "invalid format" +msgstr "wúxiào géshì" + +#: py/objstr.c +msgid "invalid format specifier" +msgstr "wúxiào de géshì biāozhù" + +#: extmod/modussl_axtls.c +msgid "invalid key" +msgstr "wúxiào de mì yào" + +#: py/compile.c +msgid "invalid micropython decorator" +msgstr "wúxiào de MicroPython zhuāngshì qì" + +#: shared-bindings/random/__init__.c +msgid "invalid step" +msgstr "wúxiào bùzhòu" + +#: py/compile.c py/parse.c +msgid "invalid syntax" +msgstr "wúxiào de yǔfǎ" + +#: py/parsenum.c +msgid "invalid syntax for integer" +msgstr "zhěngshù wúxiào de yǔfǎ" + +#: py/parsenum.c +#, c-format +msgid "invalid syntax for integer with base %d" +msgstr "jīshù wèi %d de zhěng shǔ de yǔfǎ wúxiào" + +#: py/parsenum.c +msgid "invalid syntax for number" +msgstr "wúxiào de hàomǎ yǔfǎ" + +#: py/objtype.c +msgid "issubclass() arg 1 must be a class" +msgstr "issubclass() cānshù 1 bìxū shì yīgè lèi" + +#: py/objtype.c +msgid "issubclass() arg 2 must be a class or a tuple of classes" +msgstr "issubclass() cānshù 2 bìxū shì lèi de lèi huò yuán zǔ" + +#: extmod/ulab/code/ndarray.c +msgid "iterables are not of the same length" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "iterations did not converge" +msgstr "" + +#: py/objstr.c +msgid "join expects a list of str/bytes objects consistent with self object" +msgstr "" +"tiānjiā yīgè fúhé zìshēn duìxiàng de zìfú chuàn/zì jié duìxiàng lièbiǎo" + +#: py/argcheck.c +msgid "keyword argument(s) not yet implemented - use normal args instead" +msgstr "guānjiàn zì cānshù shàngwèi shíxiàn - qǐng shǐyòng chángguī cānshù" + +#: py/bc.c +msgid "keywords must be strings" +msgstr "guānjiàn zì bìxū shì zìfú chuàn" + +#: py/emitinlinethumb.c py/emitinlinextensa.c +msgid "label '%q' not defined" +msgstr "biāoqiān '%q' wèi dìngyì" + +#: py/compile.c +msgid "label redefined" +msgstr "biāoqiān chóngxīn dìngyì" + +#: py/stream.c +msgid "length argument not allowed for this type" +msgstr "bù yǔnxǔ gāi lèixíng de chángdù cānshù" + +#: shared-bindings/audiomixer/MixerVoice.c +msgid "level must be between 0 and 1" +msgstr "Level bìxū jiè yú 0 hé 1 zhī jiān" + +#: py/objarray.c +msgid "lhs and rhs should be compatible" +msgstr "lhs hé rhs yīnggāi jiānróng" + +#: py/emitnative.c +msgid "local '%q' has type '%q' but source is '%q'" +msgstr "bendì '%q' bāohán lèixíng '%q' dàn yuán shì '%q'" + +#: py/emitnative.c +msgid "local '%q' used before type known" +msgstr "běndì '%q' zài zhī lèixíng zhīqián shǐyòng" + +#: py/vm.c +msgid "local variable referenced before assignment" +msgstr "fùzhí qián yǐnyòng de júbù biànliàng" + +#: py/objint.c +msgid "long int not supported in this build" +msgstr "cǐ bǎnběn bù zhīchí zhǎng zhěngshù" + +#: py/parse.c +msgid "malformed f-string" +msgstr "" + +#: shared-bindings/_stage/Layer.c +msgid "map buffer too small" +msgstr "dìtú huǎnchōng qū tài xiǎo" + +#: py/modmath.c shared-bindings/math/__init__.c +msgid "math domain error" +msgstr "shùxué yù cuòwù" + +#: extmod/ulab/code/linalg.c +msgid "matrix dimensions do not match" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "matrix is not positive definite" +msgstr "" + +#: ports/nrf/common-hal/_bleio/Characteristic.c +#: ports/nrf/common-hal/_bleio/Descriptor.c +#, c-format +msgid "max_length must be 0-%d when fixed_length is %s" +msgstr "Dāng gùdìng chángdù wèi %s shí, zuìdà chángdù bìxū wèi 0-%d" + +#: py/runtime.c +msgid "maximum recursion depth exceeded" +msgstr "chāochū zuìdà dìguī shēndù" + +#: py/runtime.c +#, c-format +msgid "memory allocation failed, allocating %u bytes" +msgstr "nèicún fēnpèi shībài, fēnpèi %u zì jié" + +#: py/runtime.c +msgid "memory allocation failed, heap is locked" +msgstr "jìyì tǐ fēnpèi shībài, duī bèi suǒdìng" + +#: py/builtinimport.c +msgid "module not found" +msgstr "zhǎo bù dào mókuài" + +#: extmod/ulab/code/poly.c +msgid "more degrees of freedom than data points" +msgstr "" + +#: py/compile.c +msgid "multiple *x in assignment" +msgstr "duō gè*x zài zuòyè zhōng" + +#: py/objtype.c +msgid "multiple bases have instance lay-out conflict" +msgstr "duō gè jīdì yǒu shílì bùjú chōngtú" + +#: py/objtype.c +msgid "multiple inheritance not supported" +msgstr "bù zhīchí duō gè jìchéng" + +#: py/emitnative.c +msgid "must raise an object" +msgstr "bìxū tíchū duìxiàng" + +#: extmod/machine_spi.c +msgid "must specify all of sck/mosi/miso" +msgstr "bìxū zhǐdìng suǒyǒu sck/mosi/misco" + +#: py/modbuiltins.c +msgid "must use keyword argument for key function" +msgstr "bìxū shǐyòng guānjiàn cí cānshù" + +#: extmod/ulab/code/numerical.c +msgid "n must be between 0, and 9" +msgstr "" + +#: py/runtime.c +msgid "name '%q' is not defined" +msgstr "míngchēng '%q' wèi dìngyì" + +#: py/runtime.c +msgid "name not defined" +msgstr "míngchēng wèi dìngyì" + +#: py/compile.c +msgid "name reused for argument" +msgstr "cān shǔ míngchēng bèi chóngxīn shǐyòng" + +#: py/emitnative.c +#, fuzzy +msgid "native yield" +msgstr "yuánshēng chǎnliàng" + +#: py/runtime.c +#, c-format +msgid "need more than %d values to unpack" +msgstr "xūyào chāoguò%d de zhí cáinéng jiědú" + +#: py/objint_longlong.c py/objint_mpz.c py/runtime.c +msgid "negative power with no float support" +msgstr "méiyǒu fú diǎn zhīchí de xiāojí gōnglǜ" + +#: py/objint_mpz.c py/runtime.c +msgid "negative shift count" +msgstr "fù zhuǎnyí jìshù" + +#: py/vm.c +msgid "no active exception to reraise" +msgstr "méiyǒu jīhuó de yìcháng lái chóngxīn píngjià" + +#: shared-bindings/socket/__init__.c shared-module/network/__init__.c +msgid "no available NIC" +msgstr "méiyǒu kěyòng de NIC" + +#: py/compile.c +msgid "no binding for nonlocal found" +msgstr "zhǎo bù dào fēi běndì de bǎng dìng" + +#: py/builtinimport.c +msgid "no module named '%q'" +msgstr "méiyǒu mókuài '%q'" + +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c +msgid "no reset pin available" +msgstr "Méiyǒu kěyòng de fùwèi yǐn jiǎo" + +#: py/runtime.c +msgid "no such attribute" +msgstr "méiyǒu cǐ shǔxìng" + +#: ports/nrf/common-hal/_bleio/Connection.c +msgid "non-UUID found in service_uuids_whitelist" +msgstr "Zài service_uuids bái míngdān zhōng zhǎodào fēi UUID" + +#: py/compile.c +msgid "non-default argument follows default argument" +msgstr "bùshì mòrèn cānshù zūnxún mòrèn cānshù" + +#: extmod/modubinascii.c +msgid "non-hex digit found" +msgstr "zhǎodào fēi shíliù jìn zhì shùzì" + +#: py/compile.c +msgid "non-keyword arg after */**" +msgstr "zài */** zhīhòu fēi guānjiàn cí cānshù" + +#: py/compile.c +msgid "non-keyword arg after keyword arg" +msgstr "guānjiàn zì cānshù zhīhòu de fēi guānjiàn zì cānshù" + +#: shared-bindings/_bleio/UUID.c +msgid "not a 128-bit UUID" +msgstr "bùshì 128 wèi UUID" + +#: py/objstr.c +msgid "not all arguments converted during string formatting" +msgstr "bùshì zì chuàn géshì huà guòchéng zhōng zhuǎnhuàn de suǒyǒu cānshù" + +#: py/objstr.c +msgid "not enough arguments for format string" +msgstr "géshì zìfú chuàn cān shǔ bùzú" + +#: extmod/ulab/code/poly.c +msgid "number of arguments must be 2, or 3" +msgstr "" + +#: extmod/ulab/code/create.c +msgid "number of points must be at least 2" +msgstr "" + +#: py/obj.c +#, c-format +msgid "object '%s' is not a tuple or list" +msgstr "duìxiàng '%s' bùshì yuán zǔ huò lièbiǎo" + +#: py/obj.c +msgid "object does not support item assignment" +msgstr "duìxiàng bù zhīchí xiàngmù fēnpèi" + +#: py/obj.c +msgid "object does not support item deletion" +msgstr "duìxiàng bù zhīchí shānchú xiàngmù" + +#: py/obj.c +msgid "object has no len" +msgstr "duìxiàng méiyǒu chángdù" + +#: py/obj.c +msgid "object is not subscriptable" +msgstr "duìxiàng bùnéng xià biāo" + +#: py/runtime.c +msgid "object not an iterator" +msgstr "duìxiàng bùshì diédài qì" + +#: py/objtype.c py/runtime.c +msgid "object not callable" +msgstr "duìxiàng wúfǎ diàoyòng" + +#: py/sequence.c shared-bindings/displayio/Group.c +msgid "object not in sequence" +msgstr "duìxiàng bùshì xùliè" + +#: py/runtime.c +msgid "object not iterable" +msgstr "duìxiàng bùnéng diédài" + +#: py/obj.c +#, c-format +msgid "object of type '%s' has no len()" +msgstr "lèixíng '%s' de duìxiàng méiyǒu chángdù" + +#: py/obj.c +msgid "object with buffer protocol required" +msgstr "xūyào huǎnchōng qū xiéyì de duìxiàng" + +#: extmod/modubinascii.c +msgid "odd-length string" +msgstr "jīshù zìfú chuàn" + +#: py/objstr.c py/objstrunicode.c +msgid "offset out of bounds" +msgstr "piānlí biānjiè" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only bit_depth=16 is supported" +msgstr "Jǐn zhīchí wèi shēndù = 16" + +#: extmod/ulab/code/linalg.c +msgid "only ndarray objects can be inverted" +msgstr "" + +#: extmod/ulab/code/linalg.c +msgid "only ndarrays can be inverted" +msgstr "" + +#: ports/nrf/common-hal/audiobusio/PDMIn.c +msgid "only sample_rate=16000 is supported" +msgstr "Jǐn zhīchí cǎiyàng lǜ = 16000" + +#: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c +#: shared-bindings/nvm/ByteArray.c +msgid "only slices with step=1 (aka None) are supported" +msgstr "jǐn zhīchí bù zhǎng = 1(jí wú) de qiēpiàn" + +#: extmod/ulab/code/linalg.c +msgid "only square matrices can be inverted" +msgstr "" + +#: extmod/ulab/code/ndarray.c extmod/ulab/code/vectorise.c +msgid "operands could not be broadcast together" +msgstr "" + +#: extmod/ulab/code/numerical.c +msgid "operation is not implemented on ndarrays" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "operation is not supported for given type" +msgstr "" + +#: py/modbuiltins.c +msgid "ord expects a character" +msgstr "ord yùqí zìfú" + +#: py/modbuiltins.c +#, c-format +msgid "ord() expected a character, but string of length %d found" +msgstr "ord() yùqí zìfú, dàn chángdù zìfú chuàn %d" + +#: py/objint_mpz.c +msgid "overflow converting long int to machine word" +msgstr "chāo gāo zhuǎnhuàn zhǎng zhěng shùzì shí" + +#: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c +msgid "palette must be 32 bytes long" +msgstr "yánsè bìxū shì 32 gè zì jié" + +#: shared-bindings/displayio/Palette.c +msgid "palette_index should be an int" +msgstr "yánsè suǒyǐn yīnggāi shì yīgè zhěngshù" + +#: py/compile.c +msgid "parameter annotation must be an identifier" +msgstr "cānshù zhùshì bìxū shì biāozhì fú" + +#: py/emitinlinextensa.c +msgid "parameters must be registers in sequence a2 to a5" +msgstr "cānshù bìxū shì xùliè a2 zhì a5 de dēngjì shù" + +#: py/emitinlinethumb.c +msgid "parameters must be registers in sequence r0 to r3" +msgstr "cānshù bìxū shì xùliè r0 zhì r3 de dēngjì qì" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel coordinates out of bounds" +msgstr "xiàngsù zuòbiāo chāochū biānjiè" + +#: shared-bindings/displayio/Bitmap.c +msgid "pixel value requires too many bits" +msgstr "xiàngsù zhí xūyào tài duō wèi" + +#: shared-bindings/displayio/TileGrid.c +msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" +msgstr "pixel_shader bìxū shì displayio.Palette huò displayio.ColorConverter" + +#: ports/atmel-samd/common-hal/pulseio/PulseIn.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/nrf/common-hal/pulseio/PulseIn.c +#: ports/stm/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "cóng kōng de PulseIn dànchū dànchū" + +#: py/objset.c +msgid "pop from an empty set" +msgstr "cóng kōng jí dànchū" + +#: py/objlist.c +msgid "pop from empty list" +msgstr "cóng kōng lièbiǎo zhòng dànchū" + +#: py/objdict.c +msgid "popitem(): dictionary is empty" +msgstr "dànchū xiàngmù (): Zìdiǎn wèi kōng" + +#: py/objint_mpz.c +msgid "pow() 3rd argument cannot be 0" +msgstr "pow() 3 cān shǔ bùnéng wéi 0" + +#: py/objint_mpz.c +msgid "pow() with 3 arguments requires integers" +msgstr "pow() yǒu 3 cānshù xūyào zhěngshù" + +#: extmod/modutimeq.c +msgid "queue overflow" +msgstr "duìliè yìchū" + +#: py/parse.c +msgid "raw f-strings are not implemented" +msgstr "" + +#: extmod/ulab/code/fft.c +msgid "real and imaginary parts must be of equal length" +msgstr "" + +#: py/builtinimport.c +msgid "relative import" +msgstr "xiāngduì dǎorù" + +#: py/obj.c +#, c-format +msgid "requested length %d but object has length %d" +msgstr "qǐngqiú chángdù %d dàn duìxiàng chángdù %d" + +#: py/compile.c +msgid "return annotation must be an identifier" +msgstr "fǎnhuí zhùshì bìxū shì biāozhì fú" + +#: py/emitnative.c +msgid "return expected '%q' but got '%q'" +msgstr "fǎnhuí yùqí de '%q' dàn huòdéle '%q'" + +#: extmod/ulab/code/ndarray.c +msgid "right hand side must be an ndarray, or a scalar" +msgstr "" + +#: py/objstr.c +msgid "rsplit(None,n)" +msgstr "" + +#: shared-bindings/audiocore/RawSample.c +msgid "" +"sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " +"'B'" +msgstr "" +"yàngběn yuán_yuán huǎnchōng qū bìxū shì zì yǎnlèi huò lèixíng 'h', 'H', 'b' " +"huò 'B' de shùzǔ" + +#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c +msgid "sampling rate out of range" +msgstr "qǔyàng lǜ chāochū fànwéi" + +#: py/modmicropython.c +msgid "schedule stack full" +msgstr "jìhuà duīzhàn yǐ mǎn" + +#: lib/utils/pyexec.c py/builtinimport.c +msgid "script compilation not supported" +msgstr "bù zhīchí jiǎoběn biānyì" + +#: extmod/ulab/code/ndarray.c +msgid "shape must be a 2-tuple" +msgstr "" + +#: py/objstr.c +msgid "sign not allowed in string format specifier" +msgstr "zìfú chuàn géshì shuōmíng fú zhōng bù yǔnxǔ shǐyòng fúhào" + +#: py/objstr.c +msgid "sign not allowed with integer format specifier 'c'" +msgstr "zhěngshù géshì shuōmíng fú 'c' bù yǔnxǔ shǐyòng fúhào" + +#: py/objstr.c +msgid "single '}' encountered in format string" +msgstr "zài géshì zìfú chuàn zhōng yù dào de dāngè '}'" + +#: extmod/ulab/code/linalg.c +msgid "size is defined for ndarrays only" +msgstr "" + +#: shared-bindings/time/__init__.c +msgid "sleep length must be non-negative" +msgstr "shuìmián chángdù bìxū shìfēi fùshù" + +#: py/objslice.c py/sequence.c +msgid "slice step cannot be zero" +msgstr "qiēpiàn bù bùnéng wéi líng" + +#: py/objint.c py/sequence.c +msgid "small int overflow" +msgstr "xiǎo zhěngshù yìchū" + +#: main.c +msgid "soft reboot\n" +msgstr "ruǎn chóngqǐ\n" + +#: extmod/ulab/code/numerical.c +msgid "sort argument must be an ndarray" +msgstr "" + +#: py/objstr.c +msgid "start/end indices" +msgstr "kāishǐ/jiéshù zhǐshù" + +#: shared-bindings/displayio/Shape.c +msgid "start_x should be an int" +msgstr "kāishǐ_x yīnggāi shì yīgè zhěngshù" + +#: shared-bindings/random/__init__.c +msgid "step must be non-zero" +msgstr "bùzhòu bìxū shìfēi líng" + +#: shared-bindings/busio/UART.c +msgid "stop must be 1 or 2" +msgstr "tíngzhǐ bìxū wèi 1 huò 2" + +#: shared-bindings/random/__init__.c +msgid "stop not reachable from start" +msgstr "tíngzhǐ wúfǎ cóng kāishǐ zhōng zhǎodào" + +#: py/stream.c +msgid "stream operation not supported" +msgstr "bù zhīchí liú cāozuò" + +#: py/objstrunicode.c +msgid "string index out of range" +msgstr "zìfú chuàn suǒyǐn chāochū fànwéi" + +#: py/objstrunicode.c +#, c-format +msgid "string indices must be integers, not %s" +msgstr "zìfú chuàn zhǐshù bìxū shì zhěngshù, ér bùshì %s" + +#: py/stream.c +msgid "string not supported; use bytes or bytearray" +msgstr "zìfú chuàn bù zhīchí; shǐyòng zì jié huò zì jié zǔ" + +#: extmod/moductypes.c +msgid "struct: cannot index" +msgstr "jiégòu: bùnéng suǒyǐn" + +#: extmod/moductypes.c +msgid "struct: index out of range" +msgstr "jiégòu: suǒyǐn chāochū fànwéi" + +#: extmod/moductypes.c +msgid "struct: no fields" +msgstr "jiégòu: méiyǒu zìduàn" + +#: py/objstr.c +msgid "substring not found" +msgstr "wèi zhǎodào zi zìfú chuàn" + +#: py/compile.c +msgid "super() can't find self" +msgstr "chāojí() zhǎo bù dào zìjǐ" + +#: extmod/modujson.c +msgid "syntax error in JSON" +msgstr "JSON yǔfǎ cuòwù" + +#: extmod/moductypes.c +msgid "syntax error in uctypes descriptor" +msgstr "uctypes miáoshù fú zhōng de yǔfǎ cuòwù" + +#: shared-bindings/touchio/TouchIn.c +msgid "threshold must be in the range 0-65536" +msgstr "yùzhí bìxū zài fànwéi 0-65536" + +#: shared-bindings/time/__init__.c +msgid "time.struct_time() takes a 9-sequence" +msgstr "time.struct_time() xūyào 9 xùliè" + +#: shared-bindings/busio/UART.c +msgid "timeout must be 0.0-100.0 seconds" +msgstr "Chāo shí shíjiān bìxū wèi 0.0 Dào 100.0 Miǎo" + +#: shared-bindings/_bleio/CharacteristicBuffer.c +msgid "timeout must be >= 0.0" +msgstr "chāoshí bìxū shì >= 0.0" + +#: shared-bindings/time/__init__.c +msgid "timestamp out of range for platform time_t" +msgstr "time_t shíjiān chuō chāochū píngtái fànwéi" + +#: shared-module/struct/__init__.c +msgid "too many arguments provided with the given format" +msgstr "tígōng jǐ dìng géshì de cānshù tài duō" + +#: extmod/ulab/code/ndarray.c +msgid "too many indices" +msgstr "" + +#: py/runtime.c +#, c-format +msgid "too many values to unpack (expected %d)" +msgstr "dǎkāi tài duō zhí (yùqí %d)" + +#: extmod/ulab/code/linalg.c py/objstr.c +msgid "tuple index out of range" +msgstr "yuán zǔ suǒyǐn chāochū fànwéi" + +#: py/obj.c +msgid "tuple/list has wrong length" +msgstr "yuán zǔ/lièbiǎo chángdù cuòwù" + +#: shared-bindings/_pixelbuf/PixelBuf.c +msgid "tuple/list required on RHS" +msgstr "RHS yāoqiú de yuán zǔ/lièbiǎo" + +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: shared-bindings/busio/UART.c +msgid "tx and rx cannot both be None" +msgstr "tx hé rx bùnéng dōu shì wú" + +#: py/objtype.c +msgid "type '%q' is not an acceptable base type" +msgstr "lèixíng '%q' bùshì kě jiēshòu de jīchǔ lèixíng" + +#: py/objtype.c +msgid "type is not an acceptable base type" +msgstr "lèixíng bùshì kě jiēshòu de jīchǔ lèixíng" + +#: py/runtime.c +msgid "type object '%q' has no attribute '%q'" +msgstr "lèixíng duìxiàng '%q' méiyǒu shǔxìng '%q'" + +#: py/objtype.c +msgid "type takes 1 or 3 arguments" +msgstr "lèixíng wèi 1 huò 3 gè cānshù" + +#: py/objint_longlong.c +msgid "ulonglong too large" +msgstr "tài kuān" + +#: py/emitnative.c +msgid "unary op %q not implemented" +msgstr "wèi zhíxíng %q" + +#: py/parse.c +msgid "unexpected indent" +msgstr "wèi yùliào de suō jìn" + +#: py/bc.c +msgid "unexpected keyword argument" +msgstr "yìwài de guānjiàn cí cānshù" + +#: py/bc.c py/objnamedtuple.c +msgid "unexpected keyword argument '%q'" +msgstr "yìwài de guānjiàn cí cānshù '%q'" + +#: py/lexer.c +msgid "unicode name escapes" +msgstr "unicode míngchēng táoyì" + +#: py/parse.c +msgid "unindent does not match any outer indentation level" +msgstr "bùsuō jìn yǔ rènhé wàibù suō jìn jíbié dōu bù pǐpèi" + +#: py/objstr.c +#, c-format +msgid "unknown conversion specifier %c" +msgstr "wèizhī de zhuǎnhuàn biāozhù %c" + +#: py/objstr.c +#, fuzzy, c-format +msgid "unknown format code '%c' for object of type '%s'" +msgstr "lèixíng '%s' duìxiàng wèizhī de géshì dàimǎ '%c'" + +#: py/compile.c +msgid "unknown type" +msgstr "wèizhī lèixíng" + +#: py/emitnative.c +msgid "unknown type '%q'" +msgstr "wèizhī lèixíng '%q'" + +#: py/objstr.c +msgid "unmatched '{' in format" +msgstr "géshì wèi pǐpèi '{'" + +#: py/objtype.c py/runtime.c +msgid "unreadable attribute" +msgstr "bùkě dú shǔxìng" + +#: shared-bindings/displayio/TileGrid.c +msgid "unsupported %q type" +msgstr "bù zhīchí %q lèixíng" + +#: py/emitinlinethumb.c +#, c-format +msgid "unsupported Thumb instruction '%s' with %d arguments" +msgstr "bù zhīchí de Thumb zhǐshì '%s', shǐyòng %d cānshù" + +#: py/emitinlinextensa.c +#, c-format +msgid "unsupported Xtensa instruction '%s' with %d arguments" +msgstr "bù zhīchí de Xtensa zhǐlìng '%s', shǐyòng %d cānshù" + +#: py/objstr.c +#, c-format +msgid "unsupported format character '%c' (0x%x) at index %d" +msgstr "bù zhīchí de géshì zìfú '%c' (0x%x) suǒyǐn %d" + +#: py/runtime.c +msgid "unsupported type for %q: '%s'" +msgstr "bù zhīchí de lèixíng %q: '%s'" + +#: py/runtime.c +msgid "unsupported type for operator" +msgstr "bù zhīchí de cāozuò zhě lèixíng" + +#: py/runtime.c +msgid "unsupported types for %q: '%s', '%s'" +msgstr "bù zhīchí de lèixíng wèi %q: '%s', '%s'" + +#: py/objint.c +#, c-format +msgid "value must fit in %d byte(s)" +msgstr "Zhí bìxū fúhé %d zì jié" + +#: shared-bindings/displayio/Bitmap.c +msgid "value_count must be > 0" +msgstr "zhí jìshù bìxū wèi > 0" + +#: shared-bindings/_bleio/Adapter.c +msgid "window must be <= interval" +msgstr "Chuāngkǒu bìxū shì <= jiàngé" + +#: extmod/ulab/code/linalg.c +msgid "wrong argument type" +msgstr "" + +#: extmod/ulab/code/ndarray.c +msgid "wrong input type" +msgstr "" + +#: py/objstr.c +msgid "wrong number of arguments" +msgstr "cānshù shù cuòwù" + +#: py/runtime.c +msgid "wrong number of values to unpack" +msgstr "wúfǎ jiě bāo de zhí shù" + +#: extmod/ulab/code/ndarray.c +msgid "wrong operand type on the right hand side" +msgstr "" + +#: shared-module/displayio/Shape.c +msgid "x value out of bounds" +msgstr "x zhí chāochū biānjiè" + +#: shared-bindings/displayio/Shape.c +msgid "y should be an int" +msgstr "y yīnggāi shì yīgè zhěngshù" + +#: shared-module/displayio/Shape.c +msgid "y value out of bounds" +msgstr "y zhí chāochū biānjiè" + +#: py/objrange.c +msgid "zero step" +msgstr "líng bù" + +#~ msgid "Address is not %d bytes long or is in wrong format" +#~ msgstr "Dìzhǐ bùshì %d zì jié zhǎng, huòzhě géshì cuòwù" + +#~ msgid "Attempted heap allocation when MicroPython VM not running.\n" +#~ msgstr "MicroPython VM wèi yùnxíng shí chángshì duī fēnpèi.\n" + +#~ msgid "Can not use dotstar with %s" +#~ msgstr "Wúfǎ yǔ dotstar yīqǐ shǐyòng %s" + +#~ msgid "Can't add services in Central mode" +#~ msgstr "Wúfǎ zài zhōngyāng móshì xià tiānjiā fúwù" + +#~ msgid "Can't advertise in Central mode" +#~ msgstr "Wúfǎ zài zhōngyāng móshì zhōng guǎnggào" + +#~ msgid "Can't change the name in Central mode" +#~ msgstr "Wúfǎ gēnggǎi zhōngyāng móshì de míngchēng" + +#~ msgid "Can't connect in Peripheral mode" +#~ msgstr "Wúfǎ zài biānyuán móshì zhōng liánjiē" + +#~ msgid "Can't set CCCD for local Characteristic" +#~ msgstr "Wúfǎ wéi běndì tèzhēng shèzhì CCCD" + +#~ msgid "Characteristic UUID doesn't match Service UUID" +#~ msgstr "Zìfú UUID bù fúhé fúwù UUID" + +#~ msgid "Characteristic already in use by another Service." +#~ msgstr "Qítā fúwù bùmén yǐ shǐyòng de gōngnéng." + +#~ msgid "Command must be 0-255" +#~ msgstr "Mìnglìng bìxū wèi 0-255" + +#~ msgid "Could not decode ble_uuid, err 0x%04x" +#~ msgstr "Wúfǎ jiěmǎ kě dú_uuid, err 0x%04x" + +#~ msgid "Crash into the HardFault_Handler.\n" +#~ msgstr "Bēngkuì dào HardFault_Handler.\n" + +#~ msgid "Data too large for the advertisement packet" +#~ msgstr "Guǎnggào bāo de shùjù tài dà" + +#~ msgid "Expected a Peripheral" +#~ msgstr "Qídài yīgè wàiwéi shèbèi" + +#~ msgid "Failed to acquire mutex" +#~ msgstr "Wúfǎ huòdé mutex" + +#~ msgid "Failed to add characteristic, err 0x%04x" +#~ msgstr "Tiānjiā tèxìng shībài, err 0x%04x" + +#~ msgid "Failed to add descriptor, err 0x%04x" +#~ msgstr "Wúfǎ tiānjiā miáoshù fú, err 0x%04x" + +#~ msgid "Failed to add service" +#~ msgstr "Tiānjiā fúwù shībài" + +#~ msgid "Failed to add service, err 0x%04x" +#~ msgstr "Tiānjiā fúwù shībài, err 0x%04x" + +#~ msgid "Failed to change softdevice state" +#~ msgstr "Gēnggǎi ruǎn shèbèi zhuàngtài shībài" + +#~ msgid "Failed to configure advertising, err 0x%04x" +#~ msgstr "Wúfǎ pèizhì guǎnggào, cuòwù 0x%04x" + +#~ msgid "Failed to connect:" +#~ msgstr "Liánjiē shībài:" + +#~ msgid "Failed to continue scanning" +#~ msgstr "Jìxù sǎomiáo shībài" + +#~ msgid "Failed to continue scanning, err 0x%04x" +#~ msgstr "Jìxù sǎomiáo shībài, err 0x%04x" + +#~ msgid "Failed to create mutex" +#~ msgstr "Wúfǎ chuàngjiàn hù chì suǒ" + +#~ msgid "Failed to discover services" +#~ msgstr "Fāxiàn fúwù shībài" + +#~ msgid "Failed to get local address" +#~ msgstr "Huòqǔ běndì dìzhǐ shībài" + +#~ msgid "Failed to get softdevice state" +#~ msgstr "Wúfǎ huòdé ruǎnjiàn shèbèi zhuàngtài" + +#~ msgid "Failed to notify or indicate attribute value, err 0x%04x" +#~ msgstr "Wúfǎ tōngzhī huò xiǎnshì shǔxìng zhí, err 0x%04x" + +#~ msgid "Failed to pair" +#~ msgstr "Pèiduì shībài" + +#~ msgid "Failed to read CCCD value, err 0x%04x" +#~ msgstr "Dòu qǔ CCCD zhí, err 0x%04x shībài" + +#~ msgid "Failed to read attribute value, err 0x%04x" +#~ msgstr "Dòu qǔ shǔxìng zhí shībài, err 0x%04x" + +#~ msgid "Failed to read gatts value, err 0x%04x" +#~ msgstr "Wúfǎ dòu qǔ gatts zhí, err 0x%04x" + +#~ msgid "Failed to register Vendor-Specific UUID, err 0x%04x" +#~ msgstr "Wúfǎ zhùcè màizhǔ tèdìng de UUID, err 0x%04x" + +#~ msgid "Failed to release mutex" +#~ msgstr "Wúfǎ shìfàng mutex" + +#~ msgid "Failed to set device name, err 0x%04x" +#~ msgstr "Wúfǎ shèzhì shèbèi míngchēng, cuòwù 0x%04x" + +#~ msgid "Failed to start advertising" +#~ msgstr "Qǐdòng guǎnggào shībài" + +#~ msgid "Failed to start advertising, err 0x%04x" +#~ msgstr "Qǐdòng guǎnggào shībài, err 0x%04x" + +#~ msgid "Failed to start connecting, error 0x%04x" +#~ msgstr "Wúfǎ kāishǐ liánjiē, cuòwù 0x%04x" + +#~ msgid "Failed to start pairing, error 0x%04x" +#~ msgstr "Wúfǎ kāishǐ pèiduì, cuòwù 0x%04x" + +#~ msgid "Failed to start scanning" +#~ msgstr "Qǐdòng sǎomiáo shībài" + +#~ msgid "Failed to start scanning, err 0x%04x" +#~ msgstr "Qǐdòng sǎomiáo shībài, err 0x%04x" + +#~ msgid "Failed to stop advertising" +#~ msgstr "Wúfǎ tíngzhǐ guǎnggào" + +#~ msgid "Failed to stop advertising, err 0x%04x" +#~ msgstr "Wúfǎ tíngzhǐ guǎnggào, err 0x%04x" + +#~ msgid "Failed to write CCCD, err 0x%04x" +#~ msgstr "Wúfǎ xiě rù CCCD, cuòwù 0x%04x" + +#~ msgid "Failed to write attribute value, err 0x%04x" +#~ msgstr "Xiě rù shǔxìng zhí shībài, err 0x%04x" + +#~ msgid "Failed to write gatts value, err 0x%04x" +#~ msgstr "Xiě rù gatts zhí,err 0x%04x shībài" + +#~ msgid "Flash erase failed" +#~ msgstr "Flash cā chú shībài" + +#~ msgid "Flash erase failed to start, err 0x%04x" +#~ msgstr "Flash cā chú shībài, err 0x%04x" + +#~ msgid "Flash write failed" +#~ msgstr "Flash xiě rù shībài" + +#~ msgid "Flash write failed to start, err 0x%04x" +#~ msgstr "Flash xiě rù shībài, err 0x%04x" + +#~ msgid "Invalid bit clock pin" +#~ msgstr "Wúxiào de wèi shízhōng yǐn jiǎo" + +#~ msgid "Invalid clock pin" +#~ msgstr "Wúxiào de shízhōng yǐn jiǎo" + +#~ msgid "Invalid data pin" +#~ msgstr "Wúxiào de shùjù yǐn jiǎo" + +#~ msgid "" +#~ "Looks like our core CircuitPython code crashed hard. Whoops!\n" +#~ "Please file an issue at https://github.com/adafruit/circuitpython/issues\n" +#~ " with the contents of your CIRCUITPY drive and this message:\n" +#~ msgstr "" +#~ "Kàn lái wǒmen de héxīn CircuitPython dàimǎ bēngkuì dé hěn lìhài. Āi yōu!\n" +#~ "Qǐng zài https://Github.Com/adafruit/circuitpython/issues\n" +#~ "shàng tíjiāo yīgè wèntí, qízhōng bāohán nín de CIRCUITPY qūdòngqì de " +#~ "nèiróng hé cǐ xiāoxī:\n" + +#~ msgid "MicroPython NLR jump failed. Likely memory corruption.\n" +#~ msgstr "MicroPython NLR tiàoyuè shībài. Kěnéng nèicún fǔbài.\n" + +#~ msgid "MicroPython fatal error.\n" +#~ msgstr "MicroPython zhìmìng cuòwù.\n" + +#~ msgid "Must be a Group subclass." +#~ msgstr "Bìxū shì fēnzǔ zi lèi." + +#~ msgid "No default I2C bus" +#~ msgstr "Méiyǒu mòrèn I2C gōnggòng qìchē" + +#~ msgid "No default SPI bus" +#~ msgstr "Méiyǒu mòrèn SPI gōnggòng qìchē" + +#~ msgid "No default UART bus" +#~ msgstr "Méiyǒu mòrèn UART gōnggòng qìchē" + +#~ msgid "Only bit maps of 8 bit color or less are supported" +#~ msgstr "Jǐn zhīchí 8 wèi yánsè huò xiǎoyú" + +#~ msgid "" +#~ "Only monochrome, indexed 8bpp, and 16bpp or greater BMPs supported: %d " +#~ "bpp given" +#~ msgstr "" +#~ "Jǐn zhīchí dān sè, suǒyǐn 8bpp hé 16bpp huò gèng dà de BMP: %d bpp tígōng" + +#~ msgid "Only slices with step=1 (aka None) are supported" +#~ msgstr "Jǐn zhīchí 1 bù qiēpiàn" + +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Xiàngsù chāochū huǎnchōng qū biānjiè" + +#~ msgid "PulseIn not yet supported" +#~ msgstr "Shàng bù zhīchí PulseIn" + +#~ msgid "PulseOut not yet supported" +#~ msgstr "Shàng bù zhīchí PulseOut" + +#~ msgid "Range out of bounds" +#~ msgstr "Fànwéi chāochū biānjiè" + +#~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" +#~ msgstr "Ruǎn shèbèi wéihù, id: 0X%08lX, pc: 0X%08lX" + +#~ msgid "" +#~ "The CircuitPython heap was corrupted because the stack was too small.\n" +#~ "Please increase stack size limits and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ "If you didn't change the stack, then file an issue here with the contents " +#~ "of your CIRCUITPY drive:\n" +#~ msgstr "" +#~ "Yóuyú duīzhàn tài xiǎo, huánliú Python rè sǔnhuài.\n" +#~ "Qǐng zēngjiā duīzhàn chǐcùn xiànzhì, ránhòu chóngxīn shèzhì (zài dànchū " +#~ "CIRCUITPY).\n" +#~ "Rúguǒ nín méiyǒu gǎibiàn duīzhàn, qǐng zài cǐ chù tíchū yīgè wèntí, bìng " +#~ "zài rù nín de CIRCUITPY qūdòngqì:\n" + +#~ msgid "" +#~ "The microcontroller's power dipped. Please make sure your power supply " +#~ "provides\n" +#~ "enough power for the whole circuit and press reset (after ejecting " +#~ "CIRCUITPY).\n" +#~ msgstr "" +#~ "Wēi kòngzhì qì de diànliàng bèi chōng chū. Qǐng quèbǎo nín de diànyuán " +#~ "wèi\n" +#~ "zhěnggè diànlù tígōng zúgòu de diànyuán bìng àn xià fùwèi (zài dànchū " +#~ "CIRCUITPY hòu).\n" + +#~ msgid "" +#~ "The reset button was pressed while booting CircuitPython. Press again to " +#~ "exit safe mode.\n" +#~ msgstr "" +#~ "Qǐdòng CircuitPython shí, chóng zhì ànniǔ bèi àn xià. Zàicì àn xià yǐ " +#~ "tuìchū ānquán móshì\n" + +#~ msgid "Tile indices must be 0 - 255" +#~ msgstr "Píng pū zhǐshù bìxū wèi 0 - 255" + +#~ msgid "To exit, please reset the board without " +#~ msgstr "Yào tuìchū, qǐng chóng zhì bǎnkuài ér bùyòng " + +#~ msgid "UUID integer value not in range 0 to 0xffff" +#~ msgstr "UUID zhěngshù zhí bùzài fànwéi 0 zhì 0xffff" + +#~ msgid "Voice index too high" +#~ msgstr "Yǔyīn suǒyǐn tài gāo" + +#~ msgid "" +#~ "You are running in safe mode which means something unanticipated " +#~ "happened.\n" +#~ msgstr "" +#~ "Nǐ zhèngzài ānquán móshì xià yùnxíng, zhè yì wèi zhuó yìwài fāshēng de " +#~ "shìqíng.\n" + +#~ msgid "bad GATT role" +#~ msgstr "zǒng xiédìng de bùliáng juésè" + +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "huǎnchōng tài xiǎo. Xūyào%d zì jié" + +#~ msgid "byteorder is not an instance of ByteOrder (got a %s)" +#~ msgstr "zì jié bùshì zì jié xù shílì (yǒu %s)" + +#~ msgid "characteristics includes an object that is not a Characteristic" +#~ msgstr "tèxìng bāokuò bùshì zìfú de wùtǐ" + +#~ msgid "color buffer must be a buffer or int" +#~ msgstr "yánsè huǎnchōng qū bìxū shì huǎnchōng qū huò zhěngshù" + +#~ msgid "expected a DigitalInOut" +#~ msgstr "qídài de DigitalInOut" + +#~ msgid "interval not in range 0.0020 to 10.24" +#~ msgstr "jùlí 0.0020 Zhì 10.24 Zhī jiān de jiàngé shíjiān" + +#~ msgid "name must be a string" +#~ msgstr "míngchēng bìxū shì yīgè zìfú chuàn" + +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "yuánshǐ huǎnchōng qū hé huǎnchōng qū de dàxiǎo bùtóng" + +#~ msgid "row must be packed and word aligned" +#~ msgstr "xíng bìxū dǎbāo bìngqiě zì duìqí" + +#~ msgid "services includes an object that is not a Service" +#~ msgstr "fúwù bāokuò yīgè bùshì fúwù de wùjiàn" + +#~ msgid "tile index out of bounds" +#~ msgstr "kuài suǒyǐn chāochū fànwéi" + +#~ msgid "time.struct_time() takes exactly 1 argument" +#~ msgstr "time.struct_time() xūyào wánquán 1 cānshù" + +#~ msgid "timeout >100 (units are now seconds, not msecs)" +#~ msgstr "chāoshí >100 (dānwèi shì miǎo, ér bùshì háomiǎo)" + +#~ msgid "too many arguments" +#~ msgstr "tài duō cānshù" + +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "lèixíng 'float' duìxiàng wèizhī de géshì dàimǎ '%c'" + +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "lèixíng 'str' duìxiàng wèizhī de géshì dàimǎ '%c'" + +#~ msgid "unsupported bitmap type" +#~ msgstr "bù zhīchí de bitmap lèixíng" + +#~ msgid "write_args must be a list, tuple, or None" +#~ msgstr "xiě cānshù bìxū shì yuán zǔ, lièbiǎo huò None" diff --git a/logo/1bit-logo.png b/logo/1bit-logo.png deleted file mode 100644 index 42927f3140ec6..0000000000000 Binary files a/logo/1bit-logo.png and /dev/null differ diff --git a/logo/CircuitPython_Repo_header_logo.png b/logo/CircuitPython_Repo_header_logo.png new file mode 100644 index 0000000000000..6ce287922ab51 Binary files /dev/null and b/logo/CircuitPython_Repo_header_logo.png differ diff --git a/logo/FONT-LICENSE.txt b/logo/FONT-LICENSE.txt deleted file mode 100644 index 69c49d84c83c2..0000000000000 --- a/logo/FONT-LICENSE.txt +++ /dev/null @@ -1,97 +0,0 @@ -The font used for the MicroPython logo is "Exo", -http://www.google.com/fonts/specimen/Exo. - -Copyright (c) 2013, Natanael Gama (https://plus.google.com/u/0/+NatanaelGama), -with Reserved Font Name Exo. - -This Font Software is licensed under the SIL Open Font License, Version 1.1. -This license is copied below, and is also available with a FAQ at: -http://scripts.sil.org/OFL - - ------------------------------------------------------------ -SIL OPEN FONT LICENSE Version 1.1 - 26 February 2007 ------------------------------------------------------------ - -PREAMBLE -The goals of the Open Font License (OFL) are to stimulate worldwide -development of collaborative font projects, to support the font creation -efforts of academic and linguistic communities, and to provide a free and -open framework in which fonts may be shared and improved in partnership -with others. - -The OFL allows the licensed fonts to be used, studied, modified and -redistributed freely as long as they are not sold by themselves. The -fonts, including any derivative works, can be bundled, embedded, -redistributed and/or sold with any software provided that any reserved -names are not used by derivative works. The fonts and derivatives, -however, cannot be released under any other type of license. The -requirement for fonts to remain under this license does not apply -to any document created using the fonts or their derivatives. - -DEFINITIONS -"Font Software" refers to the set of files released by the Copyright -Holder(s) under this license and clearly marked as such. This may -include source files, build scripts and documentation. - -"Reserved Font Name" refers to any names specified as such after the -copyright statement(s). - -"Original Version" refers to the collection of Font Software components as -distributed by the Copyright Holder(s). - -"Modified Version" refers to any derivative made by adding to, deleting, -or substituting -- in part or in whole -- any of the components of the -Original Version, by changing formats or by porting the Font Software to a -new environment. - -"Author" refers to any designer, engineer, programmer, technical -writer or other person who contributed to the Font Software. - -PERMISSION & CONDITIONS -Permission is hereby granted, free of charge, to any person obtaining -a copy of the Font Software, to use, study, copy, merge, embed, modify, -redistribute, and sell modified and unmodified copies of the Font -Software, subject to the following conditions: - -1) Neither the Font Software nor any of its individual components, -in Original or Modified Versions, may be sold by itself. - -2) Original or Modified Versions of the Font Software may be bundled, -redistributed and/or sold with any software, provided that each copy -contains the above copyright notice and this license. These can be -included either as stand-alone text files, human-readable headers or -in the appropriate machine-readable metadata fields within text or -binary files as long as those fields can be easily viewed by the user. - -3) No Modified Version of the Font Software may use the Reserved Font -Name(s) unless explicit written permission is granted by the corresponding -Copyright Holder. This restriction only applies to the primary font name as -presented to the users. - -4) The name(s) of the Copyright Holder(s) or the Author(s) of the Font -Software shall not be used to promote, endorse or advertise any -Modified Version, except to acknowledge the contribution(s) of the -Copyright Holder(s) and the Author(s) or with their explicit written -permission. - -5) The Font Software, modified or unmodified, in part or in whole, -must be distributed entirely under this license, and must not be -distributed under any other license. The requirement for fonts to -remain under this license does not apply to any document created -using the Font Software. - -TERMINATION -This license becomes null and void if any of the above conditions are -not met. - -DISCLAIMER -THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT -OF COPYRIGHT, PATENT, TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL THE -COPYRIGHT HOLDER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -INCLUDING ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL -DAMAGES, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -FROM, OUT OF THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM -OTHER DEALINGS IN THE FONT SOFTWARE. diff --git a/logo/adafruit_blinka_angles-back.svg b/logo/adafruit_blinka_angles-back.svg new file mode 100644 index 0000000000000..589ed6f0a6bef --- /dev/null +++ b/logo/adafruit_blinka_angles-back.svg @@ -0,0 +1,371 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_blinka_angles-front.svg b/logo/adafruit_blinka_angles-front.svg new file mode 100644 index 0000000000000..f09ce386072bb --- /dev/null +++ b/logo/adafruit_blinka_angles-front.svg @@ -0,0 +1,416 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_blinka_angles-left.svg b/logo/adafruit_blinka_angles-left.svg new file mode 100644 index 0000000000000..32c83c40740b8 --- /dev/null +++ b/logo/adafruit_blinka_angles-left.svg @@ -0,0 +1,5876 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_blinka_angles-right.svg b/logo/adafruit_blinka_angles-right.svg new file mode 100644 index 0000000000000..51f9279aac519 --- /dev/null +++ b/logo/adafruit_blinka_angles-right.svg @@ -0,0 +1,481 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_blinka_computer.svg b/logo/adafruit_blinka_computer.svg new file mode 100644 index 0000000000000..31753081aee20 --- /dev/null +++ b/logo/adafruit_blinka_computer.svg @@ -0,0 +1,621 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_circuit_python_ourboros_color.svg b/logo/adafruit_circuit_python_ourboros_color.svg new file mode 100644 index 0000000000000..d1177ef22485a --- /dev/null +++ b/logo/adafruit_circuit_python_ourboros_color.svg @@ -0,0 +1,555 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_circuit_python_ouroboros_logo_final.svg b/logo/adafruit_circuit_python_ouroboros_logo_final.svg new file mode 100644 index 0000000000000..051966d4ac61c --- /dev/null +++ b/logo/adafruit_circuit_python_ouroboros_logo_final.svg @@ -0,0 +1,96 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_circuit_python_sitting_color.svg b/logo/adafruit_circuit_python_sitting_color.svg new file mode 100644 index 0000000000000..6da7f5ca86213 --- /dev/null +++ b/logo/adafruit_circuit_python_sitting_color.svg @@ -0,0 +1,606 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/adafruit_circuit_python_stacked_lockup_logo_final.svg b/logo/adafruit_circuit_python_stacked_lockup_logo_final.svg new file mode 100644 index 0000000000000..3fbce7126e99b --- /dev/null +++ b/logo/adafruit_circuit_python_stacked_lockup_logo_final.svg @@ -0,0 +1,77 @@ + +image/svg+xml \ No newline at end of file diff --git a/logo/awesome_circuitpython.svg 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new mode 100755 index 8c981aee18747..52870cc8e20a6 --- a/main.c +++ b/main.c @@ -30,6 +30,7 @@ #include "extmod/vfs.h" #include "extmod/vfs_fat.h" +#include "genhdr/mpversion.h" #include "py/nlr.h" #include "py/compile.h" #include "py/frozenmod.h" @@ -42,15 +43,39 @@ #include "lib/mp-readline/readline.h" #include "lib/utils/pyexec.h" +#include "background.h" #include "mpconfigboard.h" +#include "supervisor/cpu.h" +#include "supervisor/memory.h" #include "supervisor/port.h" #include "supervisor/filesystem.h" -// TODO(tannewt): Figure out how to choose language at compile time. -#include "supervisor/messages/en-US.h" #include "supervisor/shared/autoreload.h" +#include "supervisor/shared/translate.h" #include "supervisor/shared/rgb_led_status.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/status_leds.h" +#include "supervisor/shared/stack.h" #include "supervisor/serial.h" +#include "boards/board.h" + +#if CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +#if CIRCUITPY_NETWORK +#include "shared-module/network/__init__.h" +#endif + +#if CIRCUITPY_BOARD +#include "shared-module/board/__init__.h" +#endif + +#if CIRCUITPY_BLEIO +#include "shared-bindings/_bleio/__init__.h" +#include "supervisor/shared/bluetooth.h" +#endif + void do_str(const char *src, mp_parse_input_kind_t input_kind) { mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); if (lex == NULL) { @@ -71,13 +96,23 @@ void do_str(const char *src, mp_parse_input_kind_t input_kind) { } } -static char heap[PORT_HEAP_SIZE]; - -void reset_mp(void) { +void start_mp(supervisor_allocation* heap) { reset_status_led(); - new_status_color(0x8f008f); autoreload_stop(); + background_tasks_reset(); + + // Stack limit should be less than real stack size, so we have a chance + // to recover from limit hit. (Limit is measured in bytes.) + mp_stack_ctrl_init(); + mp_stack_set_limit(stack_alloc->length - 1024); + +#if MICROPY_MAX_STACK_USAGE + // _ezero (same as _ebss) is an int, so start 4 bytes above it. + mp_stack_set_bottom(stack_alloc->ptr); + mp_stack_fill_with_sentinel(); +#endif + // Sync the file systems in case any used RAM from the GC to cache. As soon // as we re-init the GC all bets are off on the cache. filesystem_flush(); @@ -86,46 +121,100 @@ void reset_mp(void) { readline_init0(); #if MICROPY_ENABLE_GC - gc_init(heap, heap + sizeof(heap)); + gc_init(heap->ptr, heap->ptr + heap->length / 4); #endif mp_init(); mp_obj_list_init(mp_sys_path, 0); mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib)); // Frozen modules are in their own pseudo-dir, e.g., ".frozen". + // Prioritize .frozen over /lib. mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_FROZEN_FAKE_DIR_QSTR)); + mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib)); mp_obj_list_init(mp_sys_argv, 0); + + #if CIRCUITPY_NETWORK + network_module_init(); + #endif } -#define STRING_LIST(...) {__VA_ARGS__, ""} -bool maybe_run_list(const char ** filenames, pyexec_result_t* exec_result) { +void stop_mp(void) { + #if CIRCUITPY_NETWORK + network_module_deinit(); + #endif + + #if MICROPY_VFS + mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); + + // Unmount all heap allocated vfs mounts. + while (gc_nbytes(vfs) > 0) { + vfs = vfs->next; + } + MP_STATE_VM(vfs_mount_table) = vfs; + MP_STATE_VM(vfs_cur) = vfs; + #endif + + gc_deinit(); +} + +#define STRING_LIST(...) {__VA_ARGS__, ""} +// Look for the first file that exists in the list of filenames, using mp_import_stat(). +// Return its index. If no file found, return -1. +const char* first_existing_file_in_list(const char ** filenames) { for (int i = 0; filenames[i] != (char*)""; i++) { mp_import_stat_t stat = mp_import_stat(filenames[i]); - if (stat != MP_IMPORT_STAT_FILE) { - continue; + if (stat == MP_IMPORT_STAT_FILE) { + return filenames[i]; } - serial_write(filenames[i]); - serial_write(MSG_OUTPUT_SUFFIX); - pyexec_file(filenames[i], exec_result); - return true; } - return false; + return NULL; } -bool start_mp(safe_mode_t safe_mode) { +bool maybe_run_list(const char ** filenames, pyexec_result_t* exec_result) { + const char* filename = first_existing_file_in_list(filenames); + if (filename == NULL) { + return false; + } + mp_hal_stdout_tx_str(filename); + const compressed_string_t* compressed = translate(" output:\n"); + char decompressed[compressed->length]; + decompress(compressed, decompressed); + mp_hal_stdout_tx_str(decompressed); + pyexec_file(filename, exec_result); + return true; +} + +void cleanup_after_vm(supervisor_allocation* heap) { + // Turn off the display and flush the fileystem before the heap disappears. + #if CIRCUITPY_DISPLAYIO + reset_displays(); + #endif + filesystem_flush(); + stop_mp(); + free_memory(heap); + supervisor_move_memory(); + + reset_port(); + #if CIRCUITPY_BOARD + reset_board_busses(); + #endif + reset_board(); + reset_status_led(); +} + +bool run_code_py(safe_mode_t safe_mode) { bool serial_connected_at_start = serial_connected(); - #ifdef CIRCUITPY_AUTORELOAD_DELAY_MS + #if CIRCUITPY_AUTORELOAD_DELAY_MS > 0 if (serial_connected_at_start) { - serial_write(MSG_NEWLINE); + serial_write("\n"); if (autoreload_is_enabled()) { - serial_write(MSG_AUTORELOAD_ON); + serial_write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n")); } else if (safe_mode != NO_SAFE_MODE) { - serial_write(MSG_SAFE_MODE_ON); + serial_write_compressed(translate("Running in safe mode! Auto-reload is off.\n")); } else if (!autoreload_is_enabled()) { - serial_write(MSG_AUTORELOAD_OFF); + serial_write_compressed(translate("Auto-reload is off.\n")); } } #endif @@ -139,40 +228,47 @@ bool start_mp(safe_mode_t safe_mode) { bool found_main = false; if (safe_mode != NO_SAFE_MODE) { - serial_write(MSG_SAFE_MODE_NO_MAIN); + serial_write_compressed(translate("Running in safe mode! Not running saved code.\n")); } else { new_status_color(MAIN_RUNNING); - const char *supported_filenames[] = STRING_LIST("code.txt", "code.py", "main.py", "main.txt"); - const char *double_extension_filenames[] = STRING_LIST("code.txt.py", "code.py.txt", "code.txt.txt","code.py.py", + static const char *supported_filenames[] = STRING_LIST("code.txt", "code.py", "main.py", "main.txt"); + static const char *double_extension_filenames[] = STRING_LIST("code.txt.py", "code.py.txt", "code.txt.txt","code.py.py", "main.txt.py", "main.py.txt", "main.txt.txt","main.py.py"); - reset_mp(); + + stack_resize(); + filesystem_flush(); + supervisor_allocation* heap = allocate_remaining_memory(); + start_mp(heap); found_main = maybe_run_list(supported_filenames, &result); if (!found_main){ found_main = maybe_run_list(double_extension_filenames, &result); if (found_main) { - serial_write(MSG_DOUBLE_FILE_EXTENSION); + serial_write_compressed(translate("WARNING: Your code filename has two extensions\n")); } } - - reset_port(); - reset_board(); - reset_status_led(); + cleanup_after_vm(heap); if (result.return_code & PYEXEC_FORCED_EXIT) { - return reload_next_character; + return reload_requested; } } // Wait for connection or character. + if (!serial_connected_at_start) { + serial_write_compressed(translate("\nCode done running. Waiting for reload.\n")); + } + bool serial_connected_before_animation = false; + #if CIRCUITPY_DISPLAYIO + bool refreshed_epaper_display = false; + #endif rgb_status_animation_t animation; prep_rgb_status_animation(&result, found_main, safe_mode, &animation); while (true) { - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif - if (reload_next_character) { + RUN_BACKGROUND_TASKS; + if (reload_requested) { + reload_requested = false; return true; } @@ -183,141 +279,192 @@ bool start_mp(safe_mode_t safe_mode) { if (!serial_connected_before_animation && serial_connected()) { if (serial_connected_at_start) { - serial_write(MSG_NEWLINE MSG_NEWLINE); + serial_write("\n\n"); } if (!serial_connected_at_start) { if (autoreload_is_enabled()) { - serial_write(MSG_AUTORELOAD_ON); + serial_write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n")); } else { - serial_write(MSG_AUTORELOAD_OFF); + serial_write_compressed(translate("Auto-reload is off.\n")); } } - // Output a user safe mode string if its set. - #ifdef BOARD_USER_SAFE_MODE - if (safe_mode == USER_SAFE_MODE) { - serial_write(MSG_NEWLINE MSG_SAFE_MODE_USER_REQUESTED); - serial_write(BOARD_USER_SAFE_MODE_ACTION); - serial_write(MSG_NEWLINE MSG_SAFE_MODE_USER_EXIT); - serial_write(BOARD_USER_SAFE_MODE_ACTION); - serial_write(MSG_NEWLINE); - } else - #endif - if (safe_mode != NO_SAFE_MODE) { - serial_write(MSG_NEWLINE MSG_BAD_SAFE_MODE MSG_NEWLINE); - if (safe_mode == HARD_CRASH) { - serial_write(MSG_SAFE_MODE_CRASH MSG_NEWLINE); - serial_write(MSG_SAFE_MODE_FILE_ISSUE MSG_NEWLINE); - serial_write(MSG_SAFE_MODE_ISSUE_LINK MSG_NEWLINE); - } else if (safe_mode == BROWNOUT) { - serial_write(MSG_SAFE_MODE_BROWN_OUT_LINE_1 MSG_NEWLINE); - serial_write(MSG_SAFE_MODE_BROWN_OUT_LINE_2 MSG_NEWLINE); - } - } - serial_write(MSG_NEWLINE MSG_WAIT_BEFORE_REPL MSG_NEWLINE); + print_safe_mode_message(safe_mode); + serial_write("\n"); + serial_write_compressed(translate("Press any key to enter the REPL. Use CTRL-D to reload.")); } if (serial_connected_before_animation && !serial_connected()) { serial_connected_at_start = false; } serial_connected_before_animation = serial_connected(); + // Refresh the ePaper display if we have one. That way it'll show an error message. + #if CIRCUITPY_DISPLAYIO + if (!refreshed_epaper_display) { + refreshed_epaper_display = maybe_refresh_epaperdisplay(); + } + #endif + tick_rgb_status_animation(&animation); } } +void __attribute__ ((noinline)) run_boot_py(safe_mode_t safe_mode) { + // If not in safe mode, run boot before initing USB and capture output in a + // file. + if (filesystem_present() && safe_mode == NO_SAFE_MODE && MP_STATE_VM(vfs_mount_table) != NULL) { + static const char *boot_py_filenames[] = STRING_LIST("settings.txt", "settings.py", "boot.py", "boot.txt"); + + new_status_color(BOOT_RUNNING); + + #ifdef CIRCUITPY_BOOT_OUTPUT_FILE + FIL file_pointer; + boot_output_file = &file_pointer; + + // Get the base filesystem. + FATFS *fs = &((fs_user_mount_t *) MP_STATE_VM(vfs_mount_table)->obj)->fatfs; + + bool have_boot_py = first_existing_file_in_list(boot_py_filenames) != NULL; + + bool skip_boot_output = false; + + // If there's no boot.py file that might write some changing output, + // read the existing copy of CIRCUITPY_BOOT_OUTPUT_FILE and see if its contents + // match the version info we would print anyway. If so, skip writing CIRCUITPY_BOOT_OUTPUT_FILE. + // This saves wear and tear on the flash and also prevents filesystem damage if power is lost + // during the write, which may happen due to bobbling the power connector or weak power. + + static const size_t NUM_CHARS_TO_COMPARE = 160; + if (!have_boot_py && f_open(fs, boot_output_file, CIRCUITPY_BOOT_OUTPUT_FILE, FA_READ) == FR_OK) { + + char file_contents[NUM_CHARS_TO_COMPARE]; + UINT chars_read = 0; + f_read(boot_output_file, file_contents, NUM_CHARS_TO_COMPARE, &chars_read); + f_close(boot_output_file); + skip_boot_output = + // + 2 accounts for \r\n. + chars_read == strlen(MICROPY_FULL_VERSION_INFO) + 2 && + strncmp(file_contents, MICROPY_FULL_VERSION_INFO, strlen(MICROPY_FULL_VERSION_INFO)) == 0; + } + + if (!skip_boot_output) { + // Wait 1.5 seconds before opening CIRCUITPY_BOOT_OUTPUT_FILE for write, + // in case power is momentary or will fail shortly due to, say a low, battery. + mp_hal_delay_ms(1500); + + // USB isn't up, so we can write the file. + filesystem_set_internal_writable_by_usb(false); + f_open(fs, boot_output_file, CIRCUITPY_BOOT_OUTPUT_FILE, FA_WRITE | FA_CREATE_ALWAYS); + + // Switch the filesystem back to non-writable by Python now instead of later, + // since boot.py might change it back to writable. + filesystem_set_internal_writable_by_usb(true); + + // Write version info to boot_out.txt. + mp_hal_stdout_tx_str(MICROPY_FULL_VERSION_INFO); + mp_hal_stdout_tx_str("\r\n"); + } + #endif + + // TODO(tannewt): Allocate temporary space to hold custom usb descriptors. + filesystem_flush(); + supervisor_allocation* heap = allocate_remaining_memory(); + start_mp(heap); + + // TODO(tannewt): Re-add support for flashing boot error output. + bool found_boot = maybe_run_list(boot_py_filenames, NULL); + (void) found_boot; + + #ifdef CIRCUITPY_BOOT_OUTPUT_FILE + if (!skip_boot_output) { + f_close(boot_output_file); + filesystem_flush(); + } + boot_output_file = NULL; + #endif + + cleanup_after_vm(heap); + } +} + +int run_repl(void) { + int exit_code = PYEXEC_FORCED_EXIT; + stack_resize(); + filesystem_flush(); + supervisor_allocation* heap = allocate_remaining_memory(); + start_mp(heap); + autoreload_suspend(); + new_status_color(REPL_RUNNING); + if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { + exit_code = pyexec_raw_repl(); + } else { + exit_code = pyexec_friendly_repl(); + } + cleanup_after_vm(heap); + autoreload_resume(); + return exit_code; +} + int __attribute__((used)) main(void) { + memory_init(); + // initialise the cpu and peripherals safe_mode_t safe_mode = port_init(); + // Turn on LEDs + init_status_leds(); rgb_led_status_init(); - // Stack limit should be less than real stack size, so we have a chance - // to recover from limit hit. (Limit is measured in bytes.) - mp_stack_ctrl_init(); - mp_stack_set_limit((char*)&_estack - (char*)&_ebss - 1024); + // Wait briefly to give a reset window where we'll enter safe mode after the reset. + if (safe_mode == NO_SAFE_MODE) { + safe_mode = wait_for_safe_mode_reset(); + } -#if MICROPY_MAX_STACK_USAGE - // _ezero (same as _ebss) is an int, so start 4 bytes above it. - mp_stack_set_bottom(&_ezero + 1); - mp_stack_fill_with_sentinel(); -#endif + stack_init(); // Create a new filesystem only if we're not in a safe mode. // A power brownout here could make it appear as if there's // no SPI flash filesystem, and we might erase the existing one. - filesystem_init(safe_mode == NO_SAFE_MODE); + filesystem_init(safe_mode == NO_SAFE_MODE, false); + + // displays init after filesystem, since they could share the flash SPI + board_init(); // Reset everything and prep MicroPython to run boot.py. reset_port(); reset_board(); - reset_mp(); // Turn on autoreload by default but before boot.py in case it wants to change it. autoreload_enable(); // By default our internal flash is readonly to local python code and // writable over USB. Set it here so that boot.py can change it. - filesystem_writable_by_python(false); - - // If not in safe mode, run boot before initing USB and capture output in a - // file. - if (filesystem_present() && safe_mode == NO_SAFE_MODE && MP_STATE_VM(vfs_mount_table) != NULL) { - new_status_color(BOOT_RUNNING); - #ifdef CIRCUITPY_BOOT_OUTPUT_FILE - // Since USB isn't up yet we can cheat and let ourselves write the boot - // output file. - filesystem_writable_by_python(true); - FIL file_pointer; - boot_output_file = &file_pointer; - f_open(&((fs_user_mount_t *) MP_STATE_VM(vfs_mount_table)->obj)->fatfs, - boot_output_file, CIRCUITPY_BOOT_OUTPUT_FILE, FA_WRITE | FA_CREATE_ALWAYS); - filesystem_writable_by_python(false); - #endif + filesystem_set_internal_concurrent_write_protection(true); + filesystem_set_internal_writable_by_usb(true); - // TODO(tannewt): Re-add support for flashing boot error output. - static const char *filenames[] = STRING_LIST("settings.txt", "settings.py", "boot.py", "boot.txt"); - bool found_boot = maybe_run_list(filenames, NULL); - (void) found_boot; + run_boot_py(safe_mode); - #ifdef CIRCUITPY_BOOT_OUTPUT_FILE - f_close(boot_output_file); - filesystem_flush(); - boot_output_file = NULL; - #endif - - // Reset to remove any state that boot.py setup. It should only be used to - // change internal state thats not in the heap. - reset_port(); - reset_mp(); - } - - // Start serial after giving boot.py a chance to tweak behavior. + // Start serial and HID after giving boot.py a chance to tweak behavior. serial_init(); + #if CIRCUITPY_BLEIO + supervisor_start_bluetooth(); + #endif + // Boot script is finished, so now go into REPL/main mode. int exit_code = PYEXEC_FORCED_EXIT; bool skip_repl = true; bool first_run = true; for (;;) { if (!skip_repl) { - reset_mp(); - autoreload_suspend(); - new_status_color(REPL_RUNNING); - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - exit_code = pyexec_raw_repl(); - } else { - exit_code = pyexec_friendly_repl(); - } - autoreload_resume(); - reset_port(); - reset_board(); + exit_code = run_repl(); } if (exit_code == PYEXEC_FORCED_EXIT) { if (!first_run) { - serial_write(MSG_SOFT_REBOOT MSG_NEWLINE); + serial_write_compressed(translate("soft reboot\n")); } first_run = false; - skip_repl = start_mp(safe_mode); + skip_repl = run_code_py(safe_mode); } else if (exit_code != 0) { break; } @@ -327,32 +474,42 @@ int __attribute__((used)) main(void) { } void gc_collect(void) { - // WARNING: This gc_collect implementation doesn't try to get root - // pointers from CPU registers, and thus may function incorrectly. - void *dummy; gc_collect_start(); + + mp_uint_t regs[10]; + mp_uint_t sp = cpu_get_regs_and_sp(regs); + // This collects root pointers from the VFS mount table. Some of them may // have lost their references in the VM even though they are mounted. gc_collect_root((void**)&MP_STATE_VM(vfs_mount_table), sizeof(mp_vfs_mount_t) / sizeof(mp_uint_t)); + + #if CIRCUITPY_DISPLAYIO + displayio_gc_collect(); + #endif + + #if CIRCUITPY_BLEIO + common_hal_bleio_gc_collect(); + #endif + // This naively collects all object references from an approximate stack // range. - gc_collect_root(&dummy, ((mp_uint_t)&_estack - (mp_uint_t)&dummy) / sizeof(mp_uint_t)); + gc_collect_root((void**)sp, ((uint32_t)port_stack_get_top() - sp) / sizeof(uint32_t)); gc_collect_end(); } void NORETURN nlr_jump_fail(void *val) { - HardFault_Handler(); + reset_into_safe_mode(MICROPY_NLR_JUMP_FAIL); while (true) {} } void NORETURN __fatal_error(const char *msg) { - HardFault_Handler(); + reset_into_safe_mode(MICROPY_FATAL_ERROR); while (true) {} } #ifndef NDEBUG void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); + mp_printf(&mp_plat_print, "Assertion '%s' failed, at file %s:%d\n", expr, file, line); __fatal_error("Assertion failed"); } #endif diff --git a/mpy-cross/.gitignore b/mpy-cross/.gitignore index 82a0a7efaab3d..80d7acd423fc9 100644 --- a/mpy-cross/.gitignore +++ b/mpy-cross/.gitignore @@ -1 +1,7 @@ -mpy-cross +/build-* +/mpy-cross +/mpy-cross.static +/mpy-cross.static.exe +/mpy-cross.static-raspbian +/mpy-cross.fuzz +/pitools diff --git a/mpy-cross/Makefile b/mpy-cross/Makefile index 53ce50c7ff63d..072304faa002d 100644 --- a/mpy-cross/Makefile +++ b/mpy-cross/Makefile @@ -11,64 +11,4 @@ override undefine BUILD override undefine PROG endif -include ../py/mkenv.mk - -# define main target -PROG = mpy-cross - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# OS name, for simple autoconfig -UNAME_S := $(shell uname -s) - -# include py core make definitions -include $(TOP)/py/py.mk - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -# compiler settings -CWARN = -Wall -Werror -CWARN += -Wpointer-arith -Wuninitialized -CFLAGS = $(INC) $(CWARN) -std=gnu99 $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA) -CFLAGS += -fdata-sections -ffunction-sections -fno-asynchronous-unwind-tables - -# Debugging/Optimization -ifdef DEBUG -CFLAGS += -g -COPT = -O0 -else -COPT = -Os #-DNDEBUG -endif - -# On OSX, 'gcc' is a symlink to clang unless a real gcc is installed. -# The unix port of MicroPython on OSX must be compiled with clang, -# while cross-compile ports require gcc, so we test here for OSX and -# if necessary override the value of 'CC' set in py/mkenv.mk -ifeq ($(UNAME_S),Darwin) -CC = clang -# Use clang syntax for map file -LDFLAGS_ARCH = -Wl,-map,$@.map -Wl,-dead_strip -else -# Use gcc syntax for map file -LDFLAGS_ARCH = -Wl,-Map=$@.map,--cref -Wl,--gc-sections -endif -LDFLAGS = $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA) - -# source files -SRC_C = \ - main.c \ - gccollect.c \ - -# Add fmode when compiling with mingw gcc -COMPILER_TARGET := $(shell $(CC) -dumpmachine) -ifneq (,$(findstring mingw,$(COMPILER_TARGET))) - SRC_C += ports/windows/fmode.c -endif - -OBJ = $(PY_O) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -include $(TOP)/py/mkrules.mk +include mpy-cross.mk diff --git a/mpy-cross/Makefile.fuzz b/mpy-cross/Makefile.fuzz new file mode 100644 index 0000000000000..ca59788f4c155 --- /dev/null +++ b/mpy-cross/Makefile.fuzz @@ -0,0 +1,6 @@ + +PROG=mpy-cross.fuzz +BUILD=build-static +STATIC_BUILD=1 +CC=afl-clang-fast +include mpy-cross.mk diff --git a/mpy-cross/Makefile.static b/mpy-cross/Makefile.static new file mode 100644 index 0000000000000..ca0925f758c35 --- /dev/null +++ b/mpy-cross/Makefile.static @@ -0,0 +1,5 @@ +PROG=mpy-cross.static +BUILD=build-static +STATIC_BUILD=1 + +include mpy-cross.mk diff --git a/mpy-cross/Makefile.static-mingw b/mpy-cross/Makefile.static-mingw new file mode 100644 index 0000000000000..a176e80e6ed2a --- /dev/null +++ b/mpy-cross/Makefile.static-mingw @@ -0,0 +1,6 @@ +PROG=mpy-cross.static.exe +CROSS_COMPILE = x86_64-w64-mingw32- +BUILD=build-static-mingw +STATIC_BUILD=1 + +include mpy-cross.mk diff --git a/mpy-cross/Makefile.static-raspbian b/mpy-cross/Makefile.static-raspbian new file mode 100644 index 0000000000000..9129f555e7945 --- /dev/null +++ b/mpy-cross/Makefile.static-raspbian @@ -0,0 +1,8 @@ +PROG=mpy-cross.static-raspbian +BUILD=build-static-raspbian +STATIC_BUILD=1 + +CROSS_COMPILE = pitools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian-x64/bin/arm-linux-gnueabihf- +include mpy-cross.mk + +$(shell [ -d pitools ] || git clone --progress --verbose https://github.com/raspberrypi/tools.git --depth=1 pitools) diff --git a/ports/windows/fmode.c b/mpy-cross/fmode.c similarity index 100% rename from ports/windows/fmode.c rename to mpy-cross/fmode.c diff --git a/ports/windows/fmode.h b/mpy-cross/fmode.h similarity index 100% rename from ports/windows/fmode.h rename to mpy-cross/fmode.h diff --git a/mpy-cross/main.c b/mpy-cross/main.c index d819f74f12b55..7c232385b8a4b 100644 --- a/mpy-cross/main.c +++ b/mpy-cross/main.c @@ -35,7 +35,7 @@ #include "py/gc.h" #include "py/stackctrl.h" #ifdef _WIN32 -#include "ports/windows/fmode.h" +#include "fmode.h" #endif // Command line options, with their defaults @@ -284,3 +284,7 @@ void nlr_jump_fail(void *val) { printf("FATAL: uncaught NLR %p\n", val); exit(1); } + +void serial_write(const char* text) { + printf("%s", text); +} diff --git a/mpy-cross/mpconfigport.h b/mpy-cross/mpconfigport.h index e227d1be5484f..04f9a24d5c698 100644 --- a/mpy-cross/mpconfigport.h +++ b/mpy-cross/mpconfigport.h @@ -85,6 +85,50 @@ #define MICROPY_PY_IO (0) #define MICROPY_PY_SYS (0) +// MINGW only handles these errno names. +#ifdef __MINGW32__ +#define MICROPY_PY_UERRNO_LIST \ + X(EPERM) \ + X(ENOENT) \ + X(ESRCH) \ + X(EINTR) \ + X(EIO) \ + X(ENXIO) \ + X(E2BIG) \ + X(ENOEXEC) \ + X(EBADF) \ + X(ECHILD) \ + X(EAGAIN) \ + X(ENOMEM) \ + X(EACCES) \ + X(EFAULT) \ + X(EBUSY) \ + X(EEXIST) \ + X(EXDEV) \ + X(ENODEV) \ + X(ENOTDIR) \ + X(EISDIR) \ + X(EINVAL) \ + X(ENFILE) \ + X(EMFILE) \ + X(ENOTTY) \ + X(EFBIG) \ + X(ENOSPC) \ + X(ESPIPE) \ + X(EROFS) \ + X(EMLINK) \ + X(EPIPE) \ + X(EDOM) \ + X(ERANGE) \ + X(EDEADLOCK) \ + X(EDEADLK) \ + X(ENAMETOOLONG) \ + X(ENOLCK) \ + X(ENOSYS) \ + X(ENOTEMPTY) \ + X(EILSEQ) +#endif + // type definitions for the specific machine #ifdef __LP64__ diff --git a/mpy-cross/mpy-cross.mk b/mpy-cross/mpy-cross.mk new file mode 100644 index 0000000000000..de96305cbfb55 --- /dev/null +++ b/mpy-cross/mpy-cross.mk @@ -0,0 +1,81 @@ +include ../py/mkenv.mk + +# define main target + +ifeq ($(OS),Windows_NT) +# Detect a MINGW32 build, and change the name of the final executable. +PROG ?= mpy-cross.exe +else +PROG ?= mpy-cross +endif + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# OS name, for simple autoconfig +UNAME_S := $(shell uname -s) + +# include py core make definitions +include $(TOP)/py/py.mk + +INC += -I. +INC += -I$(TOP) +INC += -I$(BUILD) + +# compiler settings +CWARN = -Wall -Werror +CWARN += -Wpointer-arith -Wuninitialized +CFLAGS = $(INC) $(CWARN) -std=gnu99 $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA) +CFLAGS += -fdata-sections -ffunction-sections -fno-asynchronous-unwind-tables + +# Build a static executable. +# Useful for Windows builds, etc., that must run on multiple operating system versions. +ifdef STATIC_BUILD +CFLAGS += -static -static-libgcc -static-libstdc++ +endif + + +# Debugging/Optimization +ifdef DEBUG +CFLAGS += -g +COPT = -O0 +else +COPT = -Os #-DNDEBUG +endif + +# On OSX, 'gcc' is a symlink to clang unless a real gcc is installed. +# The unix port of MicroPython on OSX must be compiled with clang, +# while cross-compile ports require gcc, so we test here for OSX and +# if necessary override the value of 'CC' set in py/mkenv.mk +ifeq ($(UNAME_S),Darwin) +CC = clang +# Use clang syntax for map file +LDFLAGS_ARCH = -Wl,-map,$@.map -Wl,-dead_strip +else +# Use gcc syntax for map file +LDFLAGS_ARCH = -Wl,-Map=$@.map,--cref -Wl,--gc-sections +endif +LDFLAGS = $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA) + +ifdef STATIC_BUILD +LDFLAGS += -static -static-libgcc -static-libstdc++ +endif + +# source files +SRC_C = \ + main.c \ + gccollect.c \ + supervisor/stub/safe_mode.c \ + supervisor/stub/stack.c \ + supervisor/shared/translate.c + +# Add fmode when compiling with mingw gcc +COMPILER_TARGET := $(shell $(CC) -dumpmachine) +ifneq (,$(findstring mingw,$(COMPILER_TARGET))) + SRC_C += fmode.c +endif + +OBJ = $(PY_O) +OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) + +include $(TOP)/py/mkrules.mk diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 1bcf9c3501028..f4886f96ef4ef 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -1,17 +1,46 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= metro_m0_express -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif endif - # If the build directory is not given, make it reflect the board name. BUILD ?= build-$(BOARD) include ../../py/mkenv.mk +# Board-specific include boards/$(BOARD)/mpconfigboard.mk --include mpconfigport.mk +# Port-specific +include mpconfigport.mk +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk # qstr definitions (must come before including py.mk) QSTR_DEFS = qstrdefsport.h @@ -21,9 +50,10 @@ include $(TOP)/py/py.mk include $(TOP)/supervisor/supervisor.mk -CROSS_COMPILE = arm-none-eabi- +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk -BOSSAC := tools/bossac_osx +CROSS_COMPILE = arm-none-eabi- HAL_DIR=hal/$(MCU_SERIES) @@ -39,64 +69,41 @@ INC += -I. \ -Iasf4/$(CHIP_FAMILY)/hpl/gclk \ -Iasf4/$(CHIP_FAMILY)/hpl/pm \ -Iasf4/$(CHIP_FAMILY)/hpl/port \ + -Iasf4/$(CHIP_FAMILY)/hpl/rtc \ -Iasf4/$(CHIP_FAMILY)/hpl/tc \ -Iasf4/$(CHIP_FAMILY)/include \ -Iasf4/$(CHIP_FAMILY)/CMSIS/Include \ - -Iasf4/$(CHIP_FAMILY)/usb \ - -Iasf4/$(CHIP_FAMILY)/usb/class/cdc \ - -Iasf4/$(CHIP_FAMILY)/usb/class/hid \ - -Iasf4/$(CHIP_FAMILY)/usb/class/msc \ - -Iasf4/$(CHIP_FAMILY)/usb/device \ -Iasf4_conf/$(CHIP_FAMILY) \ -Iboards/$(BOARD) \ -Iboards/ \ + -Iperipherals/ \ -Ifreetouch \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ -I$(BUILD) -BASE_CFLAGS = \ - -fsingle-precision-constant \ - -fno-strict-aliasing \ - -Wdouble-promotion \ - -Wno-endif-labels \ - -Wstrict-prototypes \ - -Werror-implicit-function-declaration \ - -Wpointer-arith \ - -Wfloat-equal \ - -Wundef \ - -Wshadow \ - -Wwrite-strings \ - -Wsign-compare \ - -Wmissing-format-attribute \ - -Wno-deprecated-declarations \ - -Wpacked \ - -Wnested-externs \ - -Wunreachable-code \ - -Wcast-align \ - -D__$(CHIP_VARIANT)__ \ - -ffunction-sections \ - -fdata-sections \ - -fshort-enums \ - -DCIRCUITPY_SOFTWARE_SAFE_MODE=0x0ADABEEF \ - -DCIRCUITPY_CANARY_WORD=0xADAF00 \ - -DCIRCUITPY_SAFE_RESTART_WORD=0xDEADBEEF \ - --param max-inline-insns-single=500 # NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. ifeq ($(CHIP_FAMILY), samd21) -CFLAGS = -Os -DNDEBUG +CFLAGS += -Os -DNDEBUG +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD21 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=128 -DCFG_TUD_MSC_BUFSIZE=512 endif ifeq ($(CHIP_FAMILY), samd51) -CFLAGS = -Os -DNDEBUG +CFLAGS += -Os -DNDEBUG +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 endif #Debugging/Optimization ifeq ($(DEBUG), 1) - # Turn on Python modules useful for debugging (e.g. uheap, ustack). CFLAGS += -ggdb - CFLAGS += -flto - ## CFLAGS += -fno-inline + # You may want to disable -flto if it interferes with debugging. + CFLAGS += -flto -flto-partition=none + # You may want to enable these flags to make setting breakpoints easier. + # CFLAGS += -fno-inline -fno-ipa-sra ifeq ($(CHIP_FAMILY), samd21) CFLAGS += -DENABLE_MICRO_TRACE_BUFFER endif @@ -104,16 +111,31 @@ else # -finline-limit can shrink the image size. # -finline-limit=80 or so is similar to not having it on. # There is no simple default value, though. - ifdef INTERNAL_FLASH_FILESYSTEM - ## Not currently needed - ## CFLAGS += -finline-limit=50 + + # Do a default shrink for small builds. + ifndef CFLAGS_INLINE_LIMIT + ifeq ($(CIRCUITPY_SMALL_BUILD),1) + CFLAGS_INLINE_LIMIT = 50 + endif + endif + + ifdef CFLAGS_INLINE_LIMIT + CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) + endif + + CFLAGS += -flto -flto-partition=none + + ifeq ($(CIRCUITPY_SMALL_BUILD),1) + CFLAGS += --param inline-unit-growth=15 --param max-inline-insns-auto=20 + endif + + ifdef CFLAGS_BOARD + CFLAGS += $(CFLAGS_BOARD) endif - CFLAGS += -flto endif CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) - ifeq ($(CHIP_FAMILY), samd21) CFLAGS += \ -mthumb \ @@ -133,24 +155,9 @@ CFLAGS += \ -DSAMD51 endif -ifneq ($(FROZEN_DIR),) -# To use frozen source modules, put your .py files in a subdirectory (eg scripts/) -# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch). -CFLAGS += -DMICROPY_MODULE_FROZEN_STR -CFLAGS += -Wno-error=lto-type-mismatch -endif - -# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and -# then invoke make with FROZEN_MPY_DIR=frozen or FROZEN_MPY_DIRS="dir1 dir2" -# (be sure to build from scratch). -ifneq ($(FROZEN_MPY_DIRS),) -CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool -CFLAGS += -DMICROPY_MODULE_FROZEN_MPY -CFLAGS += -Wno-error=lto-type-mismatch -endif -LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc # Use toolchain libm if we're not using our own. @@ -171,6 +178,7 @@ SRC_ASF := \ gcc/system_$(CHIP_FAMILY).c \ hal/src/hal_adc_sync.c \ hal/src/hal_atomic.c \ + hal/src/hal_calendar.c \ hal/src/hal_dac_sync.c \ hal/src/hal_delay.c \ hal/src/hal_flash.c \ @@ -180,7 +188,6 @@ SRC_ASF := \ hal/src/hal_spi_m_sync.c \ hal/src/hal_timer.c \ hal/src/hal_usart_async.c \ - hal/src/hal_usb_device.c \ hpl/adc/hpl_adc.c \ hpl/core/hpl_init.c \ hpl/dac/hpl_dac.c \ @@ -190,11 +197,6 @@ SRC_ASF := \ hpl/rtc/hpl_rtc.c \ hpl/sercom/hpl_sercom.c \ hpl/systick/hpl_systick.c \ - hpl/usb/hpl_usb.c \ - usb/class/cdc/device/cdcdf_acm.c \ - usb/class/msc/device/mscdf.c \ - usb/device/usbdc.c \ - usb/usb_protocol.c \ hal/utils/src/utils_list.c \ hal/utils/src/utils_ringbuffer.c \ @@ -217,190 +219,127 @@ endif SRC_ASF := $(addprefix asf4/$(CHIP_FAMILY)/, $(SRC_ASF)) SRC_C = \ + audio_dma.c \ background.c \ - fatfs_port.c \ - flash_api.c \ - mphalport.c \ - reset.c \ - $(CHIP_FAMILY)_peripherals.c \ - peripherals.c \ - $(CHIP_FAMILY)_pins.c \ - shared_dma.c \ - tick.c \ - timers.c \ - usb.c \ - usb_mass_storage.c \ + bindings/samd/Clock.c \ + bindings/samd/__init__.c \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ + eic_handler.c \ + fatfs_port.c \ + freetouch/adafruit_ptc.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ lib/oofatfs/ff.c \ lib/oofatfs/option/ccsbcs.c \ lib/timeutils/timeutils.c \ + lib/tinyusb/src/portable/microchip/samd/dcd_samd.c \ lib/utils/buffer_helper.c \ lib/utils/context_manager_helpers.c \ lib/utils/interrupt_char.c \ lib/utils/pyexec.c \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ - lib/libc/string0.c \ - lib/mp-readline/readline.c \ - $(BUILD)/autogen_usb_descriptor.c \ - # freetouch/adafruit_ptc.c - -# Choose which flash filesystem impl to use. -# (Right now INTERNAL_FLASH_FILESYSTEM and SPI_FLASH_FILESYSTEM are mutually exclusive. -# But that might not be true in the future.) -ifeq ($(INTERNAL_FLASH_FILESYSTEM),1) -SRC_C += internal_flash.c -endif -ifeq ($(SPI_FLASH_FILESYSTEM),1) -SRC_C += external_flash/external_flash.c external_flash/spi_flash.c -endif -ifeq ($(QSPI_FLASH_FILESYSTEM),1) -SRC_C += external_flash/external_flash.c external_flash/qspi_flash.c -endif + mphalport.c \ + peripherals/samd/$(CHIP_FAMILY)/adc.c \ + peripherals/samd/$(CHIP_FAMILY)/cache.c \ + peripherals/samd/$(CHIP_FAMILY)/clocks.c \ + peripherals/samd/$(CHIP_FAMILY)/dma.c \ + peripherals/samd/$(CHIP_FAMILY)/events.c \ + peripherals/samd/$(CHIP_FAMILY)/external_interrupts.c \ + peripherals/samd/$(CHIP_FAMILY)/pins.c \ + peripherals/samd/$(CHIP_FAMILY)/sercom.c \ + peripherals/samd/$(CHIP_FAMILY)/timers.c \ + peripherals/samd/clocks.c \ + peripherals/samd/dma.c \ + peripherals/samd/events.c \ + peripherals/samd/external_interrupts.c \ + peripherals/samd/sercom.c \ + peripherals/samd/timers.c \ + reset.c \ + supervisor/shared/memory.c \ + tick.c \ + timer_handler.c \ -SRC_COMMON_HAL = \ - board/__init__.c \ - busio/__init__.c \ - busio/I2C.c \ - busio/SPI.c \ - busio/UART.c \ - digitalio/__init__.c \ - digitalio/DigitalInOut.c \ - microcontroller/__init__.c \ - microcontroller/Pin.c \ - microcontroller/Processor.c \ - neopixel_write/__init__.c \ - os/__init__.c \ - storage/__init__.c \ - time/__init__.c \ - analogio/__init__.c \ - analogio/AnalogIn.c \ - analogio/AnalogOut.c \ - pulseio/__init__.c \ - pulseio/PulseIn.c \ - pulseio/PulseOut.c \ - pulseio/PWMOut.c \ -# audiobusio/__init__.c \ - audiobusio/PDMIn.c \ - audioio/__init__.c \ - audioio/AudioOut.c \ - nvm/__init__.c \ - nvm/ByteArray.c \ - touchio/__init__.c \ - touchio/TouchIn.c \ - usb_hid/__init__.c \ - usb_hid/Device.c -ifeq ($(INTERNAL_LIBM),1) -SRC_LIBM = $(addprefix lib/,\ - libm/math.c \ - libm/fmodf.c \ - libm/nearbyintf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - ) -endif +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 +SRC_MOD += lib/netutils/netutils.c -# These don't have corresponding files in each port but are still located in -# shared-bindings to make it clear what the contents of the modules are. -SRC_BINDINGS_ENUMS = \ - digitalio/Direction.c \ - digitalio/DriveMode.c \ - digitalio/Pull.c \ - microcontroller/RunMode.c \ - help.c \ - math/__init__.c \ - supervisor/__init__.c \ - util.c +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif + +# The smallest SAMD51 packages don't have I2S. Everything else does. +ifeq ($(CIRCUITPY_AUDIOBUSIO),1) +SRC_C += peripherals/samd/i2s.c peripherals/samd/$(CHIP_FAMILY)/i2s.c +endif SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ $(addprefix common-hal/, $(SRC_COMMON_HAL)) -SRC_SHARED_MODULE = \ - bitbangio/__init__.c \ - bitbangio/I2C.c \ - bitbangio/OneWire.c \ - bitbangio/SPI.c \ - busio/OneWire.c \ - gamepad/__init__.c \ - gamepad/GamePad.c \ - _stage/__init__.c \ - _stage/Layer.c \ - _stage/Text.c \ - os/__init__.c \ - random/__init__.c \ - storage/__init__.c \ - struct/__init__.c \ - uheap/__init__.c \ - ustack/__init__.c - SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +# There may be duplicates between SRC_COMMON_HAL_EXPANDED and SRC_SHARED_MODULE_EXPANDED, +# because a few modules have files both in common-hal/ and shared-modules/. +# Doing a $(sort ...) removes duplicates as part of sorting. +SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)) + + +SRC_S = supervisor/$(CHIP_FAMILY)_cpu.s OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_ASF:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED:.c=.o)) ifeq ($(INTERNAL_LIBM),1) OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) -SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) $(STM_SRC_C) +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += peripherals/samd/$(CHIP_FAMILY)/clocks.c all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 -$(BUILD)/firmware.elf: $(OBJ) +$(BUILD)/firmware.elf: $(OBJ) $(GENERATED_LD_FILE) $(STEPECHO) "LINK $@" - $(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group - $(Q)$(SIZE) $@ | python3 $(TOP)/tools/build_memory_info.py $(LD_FILE) + $(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(GENERATED_LD_FILE) $(BUILD)/firmware.bin: $(BUILD)/firmware.elf - $(ECHO) "Create $@" + $(STEPECHO) "Create $@" $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin - $(ECHO) "Create $@" - python2 $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -c -o $@ $^ - -$(BUILD)/autogen_usb_descriptor.c: tools/gen_usb_descriptor.py Makefile - install -d $(BUILD) - python3 tools/gen_usb_descriptor.py \ - --manufacturer $(USB_MANUFACTURER)\ - --product $(USB_PRODUCT)\ - --vid $(USB_VID)\ - --pid $(USB_PID)\ - $@ - -deploy: $(BUILD)/firmware.bin - $(ECHO) "Writing $< to the board" - $(BOSSAC) -u $< - -# Run emulation build on a POSIX system with suitable terminal settings -run: - stty raw opost -echo - build/firmware.elf - @echo Resetting terminal... -# This sleep is useful to spot segfaults - sleep 1 - reset - -test: $(BUILD)/firmware.elf - $(Q)/bin/echo -e "print('hello world!', list(x+1 for x in range(10)), end='eol\\\\n')\\r\\n\\x04" | $(BUILD)/firmware.elf | tail -n2 | grep "^hello world! \\[1, 2, 3, 4, 5, 6, 7, 8, 9, 10\\]eol" + $(STEPECHO) "Create $@" + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -c -o $@ $^ include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/atmel-samd/README.rst b/ports/atmel-samd/README.rst index c74407b0a0a89..b4d20857770c6 100644 --- a/ports/atmel-samd/README.rst +++ b/ports/atmel-samd/README.rst @@ -2,9 +2,17 @@ SAMD21x18 ========= This port brings MicroPython to SAMD21x18 based development boards under the name -CircuitPython. Supported boards include the Adafruit CircuitPlayground Express, -Adafruit Feather M0 Express, Adafruit Metro M0 Express, Arduino Zero, Adafruit -Feather M0 Basic and Adafruit M0 Bluefruit LE. +CircuitPython. Supported boards include: + +- Adafruit CircuitPlayground Express +- Adafruit Feather M0 Basic +- Adafruit Feather M0 Express +- Adafruit Metro M0 Express +- Adafruit M0 Bluefruit LE +- Arduino Zero +- Arduino MKR Zero +- Arduino Nano 33 IoT + Pinout ------ @@ -15,51 +23,51 @@ different names. The table below matches the pin order in and omits the pins only available on the largest package because all supported boards use smaller version. -===================== =============== =========================== ====================== ================ ================== ========================= ================ ================ +===================== =================== =================== =============== =========================== ====================== ================ ================== ========================= ================ ================================ ====================== ================ `microcontroller.pin` `board` ---------------------- ------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -Datasheet arduino_zero circuitplayground_express feather_m0_adalogger feather_m0_basic feather_m0_express gemma_m0 metro_m0_express trinket_m0 -===================== =============== =========================== ====================== ================ ================== ========================= ================ ================ -PA00 ``ACCELEROMETER_SDA`` ``APA102_MOSI`` ``APA102_MOSI`` -PA01 ``ACCELEROMETER_SCL`` ``APA102_SCK`` ``APA102_SCK`` -PA02 ``A0`` ``A0`` / ``SPEAKER`` ``A0`` ``A0`` ``A0`` ``A0`` / ``D1`` ``A0`` ``D1`` / ``A0`` +--------------------- ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Datasheet arduino_mkrzero arduino_nano_33_iot arduino_zero circuitplayground_express feather_m0_adalogger feather_m0_basic feather_m0_express gemma_m0 metro_m0_express sparkfun_samd21_mini sparkfun_samd21_dev trinket_m0 +===================== =================== =================== =============== =========================== ====================== ================ ================== ========================= ================ ================================ ====================== ================ +PA00 ``ACCELEROMETER_SDA`` ``APA102_MOSI`` ``APA102_MOSI`` +PA01 ``ACCELEROMETER_SCL`` ``APA102_SCK`` ``APA102_SCK`` +PA02 ``A0`` ``A0`` ``A0`` ``A0`` / ``SPEAKER`` ``A0`` ``A0`` ``A0`` ``A0`` / ``D1`` ``A0`` ``A0`` ``A0`` ``D1`` / ``A0`` PA03 -PB08 ``A1`` ``A7`` / ``TX`` ``A1`` ``A1`` ``A1`` ``A1`` -PB09 ``A2`` ``A6`` / ``RX`` ``A2`` ``A2`` ``A2`` ``A2`` -PA04 ``A3`` ``IR_PROXIMITY`` ``A3`` ``A3`` ``A3`` ``D0`` / ``TX`` / ``SDA`` ``A3`` -PA05 ``A4`` ``A1`` ``A4`` ``A4`` ``A4`` ``D2`` / ``RX`` / ``SCL`` ``A4`` -PA06 ``D8`` ``A2`` ``D8`` / ``GREEN_LED`` ``NEOPIXEL`` ``D8`` ``D4`` / ``TX`` -PA07 ``D9`` ``A3`` ``D9`` ``D9`` ``D9`` ``D9`` ``D3`` / ``RX`` -PA08 ``D4`` ``MICROPHONE_DO`` ``D4`` / ``SD_CS`` ``D4`` ``D0`` / ``SDA`` -PA09 ``D3`` ``TEMPERATURE`` / ``A9`` ``D3`` ``D2`` / ``SCL`` -PA10 ``D1`` / ``TX`` ``MICROPHONE_SCK`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D13`` -PA11 ``D0`` / ``RX`` ``LIGHT`` / ``A8`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` -PB10 ``MOSI`` ``MOSI`` ``MOSI`` ``MOSI`` ``MOSI`` -PB11 ``SCK`` ``SCK`` ``SCK`` ``SCK`` ``SCK`` -PA12 ``MISO`` ``REMOTEIN`` / ``IR_RX`` ``MISO`` ``MISO`` ``MISO`` ``MISO`` -PA13 ``ACCELEROMETER_INTERRUPT`` ``FLASH_CS`` -PA14 ``D2`` ``BUTTON_B`` / ``D5`` ``D2`` -PA15 ``D5`` ``SLIDE_SWITCH`` / ``D7`` ``D5`` ``D5`` ``D5`` ``D5`` -PA16 ``D11`` ``MISO`` ``D11`` ``D11`` ``D11`` ``D11`` -PA17 ``D13`` ``D13`` ``D13`` / ``RED_LED`` ``D13`` ``D13`` ``D13`` -PA18 ``D10`` ``D10`` ``D10`` ``D10`` ``D10`` -PA19 ``D12`` ``D12`` ``D12`` ``D12`` ``D12`` -PA20 ``D6`` ``MOSI`` ``D6`` ``D6`` ``D6`` ``D6`` -PA21 ``D7`` ``SCK`` ``D7`` / ``SD_CD`` ``D7`` -PA22 ``SDA`` ``SDA`` ``SDA`` ``SDA`` ``SDA`` -PA23 ``SCL`` ``REMOTEOUT`` / ``IR_TX`` ``SCL`` ``SCL`` ``SCL`` ``L`` / ``D13`` ``SCL`` +PB08 ``L`` ``A4`` / ``SDA`` ``A1`` ``A7`` / ``TX`` ``A1`` ``A1`` ``A1`` ``A1`` ``A1`` ``A1`` +PB09 ``BATTERY`` ``A5`` / ``SCL`` ``A2`` ``A6`` / ``RX`` ``A2`` ``A2`` ``A2`` ``A2`` ``A2`` ``A2`` +PA04 ``A3`` ``D6`` ``A3`` ``IR_PROXIMITY`` ``A3`` ``A3`` ``A3`` ``D0`` / ``TX`` / ``SDA`` ``A3`` ``A3`` ``A3`` +PA05 ``A4`` ``D5`` ``A4`` ``A1`` ``A4`` ``A4`` ``A4`` ``D2`` / ``RX`` / ``SCL`` ``A4`` ``A4`` +PA06 ``A5`` ``D7`` ``D8`` ``A2`` ``D8`` / ``GREEN_LED`` ``NEOPIXEL`` ``D8`` ``D8`` ``D8`` ``D4`` / ``TX`` +PA07 ``A6`` ``D4`` ``D9`` ``A3`` ``D9`` ``D9`` ``D9`` ``D9`` ``D9`` ``D9`` ``D3`` / ``RX`` +PA08 ``D11`` / ``SDA`` ``ESP_RESET`` ``D4`` ``MICROPHONE_DO`` ``D4`` / ``SD_CS`` ``D4`` ``D4`` ``D4`` ``D0`` / ``SDA`` +PA09 ``D12`` / ``SCL`` ``A6`` ``D3`` ``TEMPERATURE`` / ``A9`` ``D3`` ``D3`` ``D3`` ``D2`` / ``SCL`` +PA10 ``D2`` ``A3`` ``D1`` / ``TX`` ``MICROPHONE_SCK`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D1`` / ``TX`` ``D13`` +PA11 ``D3`` ``A2`` ``D0`` / ``RX`` ``LIGHT`` / ``A8`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` ``D0`` / ``RX`` +PB10 ``D4`` ``D2`` ``MOSI`` ``MOSI`` ``MOSI`` ``MOSI`` ``MOSI`` ``MOSI`` +PB11 ``D5`` ``D3`` ``SCK`` ``SCK`` ``SCK`` ``SCK`` ``SCK`` ``SCK`` +PA12 ``SD_MOSI`` ``ESP_MOSI`` ``MISO`` ``REMOTEIN`` / ``IR_RX`` ``MISO`` ``MISO`` ``MISO`` ``MISO`` ``MISO`` +PA13 ``SD_SCK`` ``ESP_MISO`` ``ACCELEROMETER_INTERRUPT`` ``FLASH_CS`` ``D38`` +PA14 ``SD_CS`` ``ESP_CS`` ``D2`` ``BUTTON_B`` / ``D5`` ``D2`` ``D2`` ``D2`` +PA15 ``SD_MISO`` ``ESP_SCK`` ``D5`` ``SLIDE_SWITCH`` / ``D7`` ``D5`` ``D5`` ``D5`` ``D5`` ``D5`` ``D5`` +PA16 ``D8`` / ``MOSI`` ``D11`` / ``MOSI`` ``D11`` ``MISO`` ``D11`` ``D11`` ``D11`` ``D11`` ``D11`` / ``MOSI`` ``D11`` +PA17 ``D9`` / ``SCK`` ``D13`` / ``SCK`` ``D13`` ``D13`` ``D13`` / ``RED_LED`` ``D13`` ``D13`` ``D13`` ``D13`` / ``SCK`` / ``BLUE_LED`` ``D13`` / ``BLUE_LED`` +PA18 ``D8`` ``D10`` ``D10`` ``D10`` ``D10`` ``D10`` ``D10`` ``D10`` +PA19 ``D10`` / ``MISO`` ``D12`` / ``MISO`` ``D12`` ``D12`` ``D12`` ``D12`` ``D12`` ``D12`` / ``MISO`` ``D12`` +PA20 ``D6`` ``D9`` ``D6`` ``MOSI`` ``D6`` ``D6`` ``D6`` ``D6`` ``D6`` ``D6`` +PA21 ``D7`` ``D10`` ``D7`` ``SCK`` ``D7`` / ``SD_CD`` ``D7`` ``D7`` ``D7`` +PA22 ``D0`` ``ESP_TX`` ``SDA`` ``SDA`` ``SDA`` ``SDA`` ``SDA`` ``SDA`` ``SDA`` +PA23 ``D1`` ``ESP_RX`` ``SCL`` ``REMOTEOUT`` / ``IR_TX`` ``SCL`` ``SCL`` ``SCL`` ``L`` / ``D13`` ``SCL`` ``SCL`` ``SCL`` PA24 PA25 -PB22 ``FLASH_CS`` -PB23 ``NEOPIXEL`` / ``D8`` -PA27 -PA28 ``BUTTON_A`` / ``D4`` +PB22 ``D14`` / ``TX`` ``D1`` / ``TX`` ``FLASH_CS`` ``D30`` / ``TX1`` +PB23 ``D13`` / ``RX`` ``D0`` / ``RX`` ``NEOPIXEL`` / ``D8`` ``D31`` / ``RX1`` +PA27 ``SD_CD`` ``ESP_GPIO0`` ``GREEN_LED`` ``GREEN_LED`` +PA28 ``ESP_BUSY`` ``BUTTON_A`` / ``D4`` PA29 -PA30 ``SPEAKER_ENABLE`` ``NEOPIXEL`` +PA30 ``SPEAKER_ENABLE`` ``NEOPIXEL`` PA31 -PB02 ``A5`` ``A5`` / ``SDA`` ``A5`` ``A5`` ``A5`` ``A5`` -PB03 ``A4`` / ``SCL`` -===================== =============== =========================== ====================== ================ ================== ========================= ================ ================ +PB02 ``A1`` ``A1`` ``A5`` ``A5`` / ``SDA`` ``A5`` ``A5`` ``A5`` ``A5`` ``A5`` +PB03 ``A2`` ``A7`` ``A4`` / ``SCL`` ``YELLOW_LED`` ``YELLOW_LED`` +===================== =================== =================== =============== =========================== ====================== ================ ================== ========================= ================ ================================ ====================== ================ Here is a table about which pins can do what in CircuitPython terms. However, just because something is listed, doesn't mean it will always work. Existing use @@ -117,15 +125,20 @@ Setup ----- An ARM compiler is required for the build, along with the associated binary -utilities. On Ubuntu, these can be installed as follows: +utilities. They can be installed as follows: -.. code-block:: shell +- Ubuntu + + .. code-block:: shell - sudo add-apt-repository ppa:team-gcc-arm-embedded/ppa - sudo apt-get install gcc-arm-embedded + sudo add-apt-repository ppa:team-gcc-arm-embedded/ppa + sudo apt-get install gcc-arm-embedded -On Arch Linux the compiler is available for via the package -``arm-none-eabi-gcc``. +- Arch Linux + + .. code-block:: shell + + sudo pacman -S arm-none-eabi-gcc arm-none-eabi-newlib For other systems, the `GNU Arm Embedded Toolchain `_ may be available in binary form. @@ -141,24 +154,29 @@ The compiler can be changed using the ``CROSS_COMPILE`` variable when invoking Building -------- -Before building the firmware for a given board the MicroPython cross-compiler -must be built; it will be used to pre-compile some of the built-in scripts to -bytecode. The cross-compiler is built and run on the host machine, using: +Before building the firmware for a given board, there are two additional steps. +These commands should be executed from the root directory of the repository +(``circuitpython/``). -.. code-block:: shell +1. There are various submodules that reside in different repositories. In order + to have these submodules locally, you must pull them into your clone, using: - make -C mpy-cross +.. code-block:: shell -This command should be executed from the root directory of this repository. -All other commands below should be executed from the ports/atmel-samd/ directory. + git submodule update --init --recursive -To build for the Arduino Zero: +2. The MicroPython cross-compiler must be built; it will be used to pre-compile + some of the built-in scripts to bytecode. The cross-compiler is built and + run on the host machine, using: .. code-block:: shell - make + make -C mpy-cross + -To build for other boards you must change it by setting ``BOARD``. For example: +Build commands are run from the ``circuitpython/ports/atmel-samd`` directory. + +To build for a given board you must specify it by setting ``BOARD``. For example: .. code-block:: shell @@ -220,3 +238,9 @@ Mass storage All boards will also show up as a mass storage device. Make sure to eject it before resetting or disconnecting the board. + +Port Specific modules +--------------------- + +.. toctree:: + bindings/samd/__init__ diff --git a/ports/atmel-samd/asf4 b/ports/atmel-samd/asf4 index aaa0f428111fb..039b5f3bbc3f4 160000 --- a/ports/atmel-samd/asf4 +++ b/ports/atmel-samd/asf4 @@ -1 +1 @@ -Subproject commit aaa0f428111fbea7d56ab548053b11c9f12068f1 +Subproject commit 039b5f3bbc3f4ba4421e581db290560d59fef625 diff --git a/ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h b/ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h index d4c9bf2abed06..b97131f0bc286 100644 --- a/ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h +++ b/ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h @@ -190,7 +190,7 @@ // Indicates whether generic clock 2 configuration is enabled or not // enable_gclk_gen_2 #ifndef CONF_GCLK_GENERATOR_2_CONFIG -#define CONF_GCLK_GENERATOR_2_CONFIG 0 +#define CONF_GCLK_GENERATOR_2_CONFIG 1 #endif // Generic Clock Generator Control @@ -205,7 +205,7 @@ // Indicates whether Divide Selection is enabled or not // gclk_gen_2_div_sel #ifndef CONF_GCLK_GEN_2_DIVSEL -#define CONF_GCLK_GEN_2_DIVSEL 0 +#define CONF_GCLK_GEN_2_DIVSEL 1 #endif // Output Enable @@ -233,7 +233,7 @@ // Indicates whether Generic Clock Generator Enable is enabled or not // gclk_arch_gen_2_enable #ifndef CONF_GCLK_GEN_2_GENEN -#define CONF_GCLK_GEN_2_GENEN 0 +#define CONF_GCLK_GEN_2_GENEN 1 #endif // Generic clock generator 2 source @@ -268,7 +268,7 @@ // // gclk_gen_2_div #ifndef CONF_GCLK_GEN_2_DIV -#define CONF_GCLK_GEN_2_DIV 1 +#define CONF_GCLK_GEN_2_DIV 4 #endif // diff --git a/ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h b/ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h index 929c70c8c67ea..7b77d90310849 100644 --- a/ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h +++ b/ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h @@ -10,6 +10,14 @@ #define CONF_RTC_ENABLE 1 #endif +// Force reset RTC on initialization +// Force RTC to reset on initialization, else init is not going on if RTC is already enabled. +// Note that the previous power down data in RTC is lost if it's enabled. +// rtc_arch_init_reset +#ifndef CONF_RTC_INIT_RESET +#define CONF_RTC_INIT_RESET 0 +#endif + // Prescaler configuration // <0x0=>Peripheral clock divided by 1 // <0x1=>Peripheral clock divided by 2 @@ -25,7 +33,7 @@ // These bits define the RTC clock relative to the peripheral clock // rtc_arch_prescaler #ifndef CONF_RTC_PRESCALER -#define CONF_RTC_PRESCALER 0x0 +#define CONF_RTC_PRESCALER 0xa #endif diff --git a/ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h b/ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h index 389aefff3c8b3..74ec2bee953d2 100644 --- a/ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h +++ b/ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h @@ -109,7 +109,7 @@ // Indicates whether configuration for OSC32K is enabled or not // enable_osc32k #ifndef CONF_OSC32K_CONFIG -#define CONF_OSC32K_CONFIG 0 +#define CONF_OSC32K_CONFIG 1 #endif // 32kHz Internal Oscillator (OSC32K) Control @@ -117,7 +117,7 @@ // Indicates whether Internal 32K Oscillator is enabled or not // osc32k_arch_enable #ifndef CONF_OSC32K_ENABLE -#define CONF_OSC32K_ENABLE 0 +#define CONF_OSC32K_ENABLE 1 #endif // On Demand Control @@ -142,7 +142,7 @@ // Enable 32 Khz Output // osc32k_arch_en32k #ifndef CONF_OSC32K_EN32K -#define CONF_OSC32K_EN32K 0 +#define CONF_OSC32K_EN32K 1 #endif // Enable 1K @@ -274,7 +274,7 @@ // Default: 122 us // xosc32k_arch_startup #ifndef CONF_XOSC32K_STARTUP -#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_122MCS +#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_2000092MCS #endif // diff --git a/ports/atmel-samd/asf4_conf/samd21/hpl_usb_config.h b/ports/atmel-samd/asf4_conf/samd21/hpl_usb_config.h index 2108077bca0eb..d1bb42fe45136 100644 --- a/ports/atmel-samd/asf4_conf/samd21/hpl_usb_config.h +++ b/ports/atmel-samd/asf4_conf/samd21/hpl_usb_config.h @@ -2,6 +2,62 @@ #ifndef HPL_USB_CONFIG_H #define HPL_USB_CONFIG_H +// CIRCUITPY: + +// Use 64-byte USB buffers for endpoint directions that are in use. They're set to 0 below otherwise. + +#include "genhdr/autogen_usb_descriptor.h" + +#if defined(USB_ENDPOINT_1_OUT_USED) && USB_ENDPOINT_1_OUT_USED +#define CONF_USB_EP1_CACHE 64 +#endif +#if defined(USB_ENDPOINT_1_IN_USED) && USB_ENDPOINT_1_IN_USED +#define CONF_USB_EP1_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_2_OUT_USED) && USB_ENDPOINT_2_OUT_USED +#define CONF_USB_EP2_CACHE 64 +#endif +#if defined(USB_ENDPOINT_2_IN_USED) && USB_ENDPOINT_2_IN_USED +#define CONF_USB_EP2_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_3_OUT_USED) && USB_ENDPOINT_3_OUT_USED +#define CONF_USB_EP3_CACHE 64 +#endif +#if defined(USB_ENDPOINT_3_IN_USED) && USB_ENDPOINT_3_IN_USED +#define CONF_USB_EP3_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_4_OUT_USED) && USB_ENDPOINT_4_OUT_USED +#define CONF_USB_EP4_CACHE 64 +#endif +#if defined(USB_ENDPOINT_4_IN_USED) && USB_ENDPOINT_4_IN_USED +#define CONF_USB_EP4_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_5_OUT_USED) && USB_ENDPOINT_5_OUT_USED +#define CONF_USB_EP5_CACHE 64 +#endif +#if defined(USB_ENDPOINT_5_IN_USED) && USB_ENDPOINT_5_IN_USED +#define CONF_USB_EP5_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_6_OUT_USED) && USB_ENDPOINT_6_OUT_USED +#define CONF_USB_EP6_CACHE 64 +#endif +#if defined(USB_ENDPOINT_6_IN_USED) && USB_ENDPOINT_6_IN_USED +#define CONF_USB_EP6_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_7_OUT_USED) && USB_ENDPOINT_7_OUT_USED +#define CONF_USB_EP7_CACHE 64 +#endif +#if defined(USB_ENDPOINT_7_IN_USED) && USB_ENDPOINT_7_IN_USED +#define CONF_USB_EP7_I_CACHE 64 +#endif + + // <<< Use Configuration Wizard in Context Menu >>> #define CONF_USB_N_0 0 @@ -28,6 +84,8 @@ // Max number of endpoints supported // Limits the number of endpoints (described by EP address) can be used in app. +// NOTE(tannewt): This not only limits the number of endpoints but also the +// addresses. In other words, even if you use endpoint 6 you need to set this to 11. // 1 (EP0 only) // 2 (EP0 + 1 endpoint) // 3 (EP0 + 2 endpoints) @@ -100,7 +158,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep1_cache #ifndef CONF_USB_EP1_CACHE -#define CONF_USB_EP1_CACHE 64 +#define CONF_USB_EP1_CACHE 0 #endif // Cache buffer size for EP1 IN @@ -138,7 +196,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep2_cache #ifndef CONF_USB_EP2_CACHE -#define CONF_USB_EP2_CACHE 64 +#define CONF_USB_EP2_CACHE 0 #endif // Cache buffer size for EP2 IN @@ -156,7 +214,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_ep2_I_CACHE #ifndef CONF_USB_EP2_I_CACHE -#define CONF_USB_EP2_I_CACHE 64 +#define CONF_USB_EP2_I_CACHE 0 #endif // @@ -194,7 +252,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_ep3_I_CACHE #ifndef CONF_USB_EP3_I_CACHE -#define CONF_USB_EP3_I_CACHE 64 +#define CONF_USB_EP3_I_CACHE 0 #endif // @@ -214,7 +272,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep4_cache #ifndef CONF_USB_EP4_CACHE -#define CONF_USB_EP4_CACHE 64 +#define CONF_USB_EP4_CACHE 0 #endif // Cache buffer size for EP4 IN diff --git a/ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h index cb7dad20418ba..2e1e238aab3ea 100644 --- a/ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h +++ b/ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h @@ -321,7 +321,7 @@ // Select the clock source for RTC. #ifndef CONF_GCLK_RTC_SRC -#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val +#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK2_Val #endif /** @@ -385,7 +385,7 @@ // Select the clock source for DAC. #ifndef CONF_GCLK_DAC_SRC -#define CONF_GCLK_DAC_SRC GCLK_CLKCTRL_GEN_GCLK1_Val +#define CONF_GCLK_DAC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val #endif /** @@ -393,7 +393,7 @@ * \brief DAC's Clock frequency */ #ifndef CONF_GCLK_DAC_FREQUENCY -#define CONF_GCLK_DAC_FREQUENCY 320000 +#define CONF_GCLK_DAC_FREQUENCY 48000000 #endif // USB Clock Source diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_dac_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_dac_config.h index d6f1898db8821..c46f99b7db22b 100644 --- a/ports/atmel-samd/asf4_conf/samd51/hpl_dac_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_dac_config.h @@ -51,7 +51,7 @@ // This defines the current in output buffer according to conversion rate // dac0_arch_cctrl #ifndef CONF_DAC0_CCTRL -#define CONF_DAC0_CCTRL 1 +#define CONF_DAC0_CCTRL 0 #endif // Run in standby @@ -90,7 +90,7 @@ // This defines the current in output buffer according to conversion rate // dac1_arch_cctrl #ifndef CONF_DAC1_CCTRL -#define CONF_DAC1_CCTRL 1 +#define CONF_DAC1_CCTRL 0 #endif // Run in standby diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h index 77793b69a5bb1..6f4f01a7e6786 100644 --- a/ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h @@ -1,8 +1,9 @@ // Circuit Python SAMD51 clock tree: -// DFLL48M (with USBCRM on to sync with external USB ref) -> GCLK1, GCLK5 +// DFLL48M (with USBCRM on to sync with external USB ref) -> GCLK1, GCLK5, GCLK6 // GCLK1 (48MHz) -> 48 MHz peripherals -// GCLK5 (48 MHz divided down to 2 MHz) -> DPLL0, DAC peripherals +// GCLK5 (48 MHz divided down to 2 MHz) -> DPLL0 // DPLL0 (multiplied up to 120 MHz) -> GCLK0, GCLK4 (output for monitoring) +// GCLK6 (48 MHz divided down to 12 MHz) -> DAC // We'd like to use XOSC32K as a ref for DFLL48M on boards with a 32kHz crystal, // but haven't figured that out yet. @@ -172,7 +173,7 @@ // Indicates whether generic clock 2 configuration is enabled or not // enable_gclk_gen_2 #ifndef CONF_GCLK_GENERATOR_2_CONFIG -#define CONF_GCLK_GENERATOR_2_CONFIG 0 +#define CONF_GCLK_GENERATOR_2_CONFIG 1 #endif // Generic Clock Generator Control @@ -188,7 +189,7 @@ // This defines the clock source for generic clock generator 2 // gclk_gen_2_oscillator #ifndef CONF_GCLK_GEN_2_SOURCE -#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K #endif // Run in Standby @@ -230,7 +231,7 @@ // Indicates whether Generic Clock Generator Enable is enabled or not // gclk_arch_gen_2_enable #ifndef CONF_GCLK_GEN_2_GENEN -#define CONF_GCLK_GEN_2_GENEN 0 +#define CONF_GCLK_GEN_2_GENEN 1 #endif // @@ -238,7 +239,7 @@ // Generic clock generator 2 division <0x0000-0xFFFF> // gclk_gen_2_div #ifndef CONF_GCLK_GEN_2_DIV -#define CONF_GCLK_GEN_2_DIV 1 +#define CONF_GCLK_GEN_2_DIV 4 #endif // // @@ -472,7 +473,7 @@ // Indicates whether generic clock 6 configuration is enabled or not // enable_gclk_gen_6 #ifndef CONF_GCLK_GENERATOR_6_CONFIG -#define CONF_GCLK_GENERATOR_6_CONFIG 0 +#define CONF_GCLK_GENERATOR_6_CONFIG 1 #endif // Generic Clock Generator Control @@ -488,7 +489,7 @@ // This defines the clock source for generic clock generator 6 // gclk_gen_6_oscillator #ifndef CONF_GCLK_GEN_6_SOURCE -#define CONF_GCLK_GEN_6_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#define CONF_GCLK_GEN_6_SOURCE GCLK_GENCTRL_SRC_DFLL #endif // Run in Standby @@ -523,14 +524,14 @@ // Indicates whether Improve Duty Cycle is enabled or not // gclk_arch_gen_6_idc #ifndef CONF_GCLK_GEN_6_IDC -#define CONF_GCLK_GEN_6_IDC 0 +#define CONF_GCLK_GEN_6_IDC 1 #endif // Generic Clock Generator Enable // Indicates whether Generic Clock Generator Enable is enabled or not // gclk_arch_gen_6_enable #ifndef CONF_GCLK_GEN_6_GENEN -#define CONF_GCLK_GEN_6_GENEN 0 +#define CONF_GCLK_GEN_6_GENEN 1 #endif // @@ -538,7 +539,7 @@ // Generic clock generator 6 division <0x0000-0xFFFF> // gclk_gen_6_div #ifndef CONF_GCLK_GEN_6_DIV -#define CONF_GCLK_GEN_6_DIV 1 +#define CONF_GCLK_GEN_6_DIV 4 #endif // // diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h index ccb2627480292..d93cbf922e6e1 100644 --- a/ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h @@ -17,7 +17,7 @@ // This defines the clock source for RTC // rtc_source_oscillator #ifndef CONF_RTCCTRL_SRC -#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K +#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K #endif // Use 1 kHz output diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h index b99821da5b33c..2b0b6712e6350 100644 --- a/ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h @@ -10,6 +10,14 @@ #define CONF_RTC_ENABLE 1 #endif +// Force reset RTC on initialization +// Force RTC to reset on initialization. +// Note that the previous power down data in RTC is lost if it's enabled. +// rtc_arch_init_reset +#ifndef CONF_RTC_INIT_RESET +#define CONF_RTC_INIT_RESET 0 +#endif + // Prescaler configuration // <0x0=>OFF(Peripheral clock divided by 1) // <0x1=>Peripheral clock divided by 1 @@ -26,7 +34,7 @@ // These bits define the RTC clock relative to the peripheral clock // rtc_arch_prescaler #ifndef CONF_RTC_PRESCALER -#define CONF_RTC_PRESCALER 0x0 +#define CONF_RTC_PRESCALER 0xb #endif diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_usb_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_usb_config.h index 92dfcaa9ba8a7..d1bb42fe45136 100644 --- a/ports/atmel-samd/asf4_conf/samd51/hpl_usb_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_usb_config.h @@ -2,6 +2,62 @@ #ifndef HPL_USB_CONFIG_H #define HPL_USB_CONFIG_H +// CIRCUITPY: + +// Use 64-byte USB buffers for endpoint directions that are in use. They're set to 0 below otherwise. + +#include "genhdr/autogen_usb_descriptor.h" + +#if defined(USB_ENDPOINT_1_OUT_USED) && USB_ENDPOINT_1_OUT_USED +#define CONF_USB_EP1_CACHE 64 +#endif +#if defined(USB_ENDPOINT_1_IN_USED) && USB_ENDPOINT_1_IN_USED +#define CONF_USB_EP1_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_2_OUT_USED) && USB_ENDPOINT_2_OUT_USED +#define CONF_USB_EP2_CACHE 64 +#endif +#if defined(USB_ENDPOINT_2_IN_USED) && USB_ENDPOINT_2_IN_USED +#define CONF_USB_EP2_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_3_OUT_USED) && USB_ENDPOINT_3_OUT_USED +#define CONF_USB_EP3_CACHE 64 +#endif +#if defined(USB_ENDPOINT_3_IN_USED) && USB_ENDPOINT_3_IN_USED +#define CONF_USB_EP3_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_4_OUT_USED) && USB_ENDPOINT_4_OUT_USED +#define CONF_USB_EP4_CACHE 64 +#endif +#if defined(USB_ENDPOINT_4_IN_USED) && USB_ENDPOINT_4_IN_USED +#define CONF_USB_EP4_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_5_OUT_USED) && USB_ENDPOINT_5_OUT_USED +#define CONF_USB_EP5_CACHE 64 +#endif +#if defined(USB_ENDPOINT_5_IN_USED) && USB_ENDPOINT_5_IN_USED +#define CONF_USB_EP5_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_6_OUT_USED) && USB_ENDPOINT_6_OUT_USED +#define CONF_USB_EP6_CACHE 64 +#endif +#if defined(USB_ENDPOINT_6_IN_USED) && USB_ENDPOINT_6_IN_USED +#define CONF_USB_EP6_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_7_OUT_USED) && USB_ENDPOINT_7_OUT_USED +#define CONF_USB_EP7_CACHE 64 +#endif +#if defined(USB_ENDPOINT_7_IN_USED) && USB_ENDPOINT_7_IN_USED +#define CONF_USB_EP7_I_CACHE 64 +#endif + + // <<< Use Configuration Wizard in Context Menu >>> #define CONF_USB_N_0 0 @@ -102,7 +158,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep1_cache #ifndef CONF_USB_EP1_CACHE -#define CONF_USB_EP1_CACHE 64 +#define CONF_USB_EP1_CACHE 0 #endif // Cache buffer size for EP1 IN @@ -140,7 +196,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep2_cache #ifndef CONF_USB_EP2_CACHE -#define CONF_USB_EP2_CACHE 64 +#define CONF_USB_EP2_CACHE 0 #endif // Cache buffer size for EP2 IN @@ -158,7 +214,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_ep2_I_CACHE #ifndef CONF_USB_EP2_I_CACHE -#define CONF_USB_EP2_I_CACHE 64 +#define CONF_USB_EP2_I_CACHE 0 #endif // @@ -178,7 +234,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep3_cache #ifndef CONF_USB_EP3_CACHE -#define CONF_USB_EP3_CACHE 64 +#define CONF_USB_EP3_CACHE 0 #endif // Cache buffer size for EP3 IN @@ -216,7 +272,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep4_cache #ifndef CONF_USB_EP4_CACHE -#define CONF_USB_EP4_CACHE 64 +#define CONF_USB_EP4_CACHE 0 #endif // Cache buffer size for EP4 IN @@ -254,7 +310,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep5_cache #ifndef CONF_USB_EP5_CACHE -#define CONF_USB_EP5_CACHE 64 +#define CONF_USB_EP5_CACHE 0 #endif // Cache buffer size for EP5 IN @@ -292,7 +348,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep6_cache #ifndef CONF_USB_EP6_CACHE -#define CONF_USB_EP6_CACHE 64 +#define CONF_USB_EP6_CACHE 0 #endif // Cache buffer size for EP6 IN @@ -310,7 +366,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_ep6_I_CACHE #ifndef CONF_USB_EP6_I_CACHE -#define CONF_USB_EP6_I_CACHE 64 +#define CONF_USB_EP6_I_CACHE 0 #endif // @@ -330,7 +386,7 @@ // <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) // usb_arch_ep7_cache #ifndef CONF_USB_EP7_CACHE -#define CONF_USB_EP7_CACHE 64 +#define CONF_USB_EP7_CACHE 0 #endif // Cache buffer size for EP7 IN diff --git a/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h index 41efca755e716..030a90a7a9834 100644 --- a/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h @@ -73,7 +73,7 @@ // dac_gclk_selection // Select the clock source for DAC. #ifndef CONF_GCLK_DAC_SRC -#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK5_Val +#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK6_Val #endif /** diff --git a/ports/atmel-samd/audio_dma.c b/ports/atmel-samd/audio_dma.c new file mode 100644 index 0000000000000..352af89802d12 --- /dev/null +++ b/ports/atmel-samd/audio_dma.c @@ -0,0 +1,365 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "audio_dma.h" +#include "samd/clocks.h" +#include "samd/events.h" +#include "samd/dma.h" + +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/audiocore/WaveFile.h" + +#include "py/mpstate.h" +#include "py/runtime.h" + +#if CIRCUITPY_AUDIOIO || CIRCUITPY_AUDIOBUSIO + +static audio_dma_t* audio_dma_state[AUDIO_DMA_CHANNEL_COUNT]; + +// This cannot be in audio_dma_state because it's volatile. +static volatile bool audio_dma_pending[AUDIO_DMA_CHANNEL_COUNT]; + +static bool audio_dma_allocated[AUDIO_DMA_CHANNEL_COUNT]; + +uint8_t audio_dma_allocate_channel(void) { + uint8_t channel; + for (channel = 0; channel < AUDIO_DMA_CHANNEL_COUNT; channel++) { + if (!audio_dma_allocated[channel]) { + audio_dma_allocated[channel] = true; + return channel; + } + } + return channel; // i.e., return failure +} + +void audio_dma_free_channel(uint8_t channel) { + assert(channel < AUDIO_DMA_CHANNEL_COUNT); + assert(audio_dma_allocated[channel]); + audio_dma_disable_channel(channel); + audio_dma_allocated[channel] = false; +} + +void audio_dma_disable_channel(uint8_t channel) { + if (channel >= AUDIO_DMA_CHANNEL_COUNT) + return; + dma_disable_channel(channel); +} + +void audio_dma_enable_channel(uint8_t channel) { + if (channel >= AUDIO_DMA_CHANNEL_COUNT) + return; + dma_enable_channel(channel); +} + +void audio_dma_convert_signed(audio_dma_t* dma, uint8_t* buffer, uint32_t buffer_length, + uint8_t** output_buffer, uint32_t* output_buffer_length, + uint8_t* output_spacing) { + if (dma->first_buffer_free) { + *output_buffer = dma->first_buffer; + } else { + *output_buffer = dma->second_buffer; + } + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" + if (dma->signed_to_unsigned || dma->unsigned_to_signed) { + *output_buffer_length = buffer_length / dma->spacing; + *output_spacing = 1; + uint32_t out_i = 0; + if (dma->bytes_per_sample == 1) { + for (uint32_t i = 0; i < buffer_length; i += dma->spacing) { + if (dma->signed_to_unsigned) { + ((uint8_t*) *output_buffer)[out_i] = ((int8_t*) buffer)[i] + 0x80; + } else { + ((int8_t*) *output_buffer)[out_i] = ((uint8_t*) buffer)[i] - 0x80; + } + out_i += 1; + } + } else if (dma->bytes_per_sample == 2) { + for (uint32_t i = 0; i < buffer_length / 2; i += dma->spacing) { + if (dma->signed_to_unsigned) { + ((uint16_t*) *output_buffer)[out_i] = ((int16_t*) buffer)[i] + 0x8000; + } else { + ((int16_t*) *output_buffer)[out_i] = ((uint16_t*) buffer)[i] - 0x8000; + } + out_i += 1; + } + } + } else { + *output_buffer = buffer; + *output_buffer_length = buffer_length; + *output_spacing = dma->spacing; + } + #pragma GCC diagnostic pop + dma->first_buffer_free = !dma->first_buffer_free; +} + +void audio_dma_load_next_block(audio_dma_t* dma) { + uint8_t* buffer; + uint32_t buffer_length; + audioio_get_buffer_result_t get_buffer_result = + audiosample_get_buffer(dma->sample, dma->single_channel, dma->audio_channel, + &buffer, &buffer_length); + + DmacDescriptor* descriptor = dma->second_descriptor; + if (dma->first_descriptor_free) { + descriptor = dma_descriptor(dma->dma_channel); + } + dma->first_descriptor_free = !dma->first_descriptor_free; + + if (get_buffer_result == GET_BUFFER_ERROR) { + audio_dma_stop(dma); + return; + } + + uint8_t* output_buffer; + uint32_t output_buffer_length; + uint8_t output_spacing; + audio_dma_convert_signed(dma, buffer, buffer_length, &output_buffer, &output_buffer_length, + &output_spacing); + + descriptor->BTCNT.reg = output_buffer_length / dma->beat_size / output_spacing; + descriptor->SRCADDR.reg = ((uint32_t) output_buffer) + output_buffer_length; + if (get_buffer_result == GET_BUFFER_DONE) { + if (dma->loop) { + audiosample_reset_buffer(dma->sample, dma->single_channel, dma->audio_channel); + } else { + descriptor->DESCADDR.reg = 0; + } + } + descriptor->BTCTRL.bit.VALID = true; +} + +static void setup_audio_descriptor(DmacDescriptor* descriptor, uint8_t beat_size, + uint8_t spacing, uint32_t output_register_address) { + uint32_t beat_size_reg = DMAC_BTCTRL_BEATSIZE_BYTE; + if (beat_size == 2) { + beat_size_reg = DMAC_BTCTRL_BEATSIZE_HWORD; + } else if (beat_size == 4) { + beat_size_reg = DMAC_BTCTRL_BEATSIZE_WORD; + } + descriptor->BTCTRL.reg = beat_size_reg | + DMAC_BTCTRL_SRCINC | + DMAC_BTCTRL_EVOSEL_BLOCK | + DMAC_BTCTRL_STEPSIZE(spacing - 1) | + DMAC_BTCTRL_STEPSEL_SRC; + descriptor->DSTADDR.reg = output_register_address; +} + +// Playback should be shutdown before calling this. +audio_dma_result audio_dma_setup_playback(audio_dma_t* dma, + mp_obj_t sample, + bool loop, + bool single_channel, + uint8_t audio_channel, + bool output_signed, + uint32_t output_register_address, + uint8_t dma_trigger_source) { + uint8_t dma_channel = audio_dma_allocate_channel(); + if (dma_channel >= AUDIO_DMA_CHANNEL_COUNT) { + return AUDIO_DMA_DMA_BUSY; + } + + dma->sample = sample; + dma->loop = loop; + dma->single_channel = single_channel; + dma->audio_channel = audio_channel; + dma->dma_channel = dma_channel; + dma->signed_to_unsigned = false; + dma->unsigned_to_signed = false; + dma->second_descriptor = NULL; + dma->spacing = 1; + dma->first_descriptor_free = true; + audiosample_reset_buffer(sample, single_channel, audio_channel); + + bool single_buffer; + bool samples_signed; + uint32_t max_buffer_length; + audiosample_get_buffer_structure(sample, single_channel, &single_buffer, &samples_signed, + &max_buffer_length, &dma->spacing); + uint8_t output_spacing = dma->spacing; + if (output_signed != samples_signed) { + output_spacing = 1; + max_buffer_length /= dma->spacing; + dma->first_buffer = (uint8_t*) m_realloc(dma->first_buffer, max_buffer_length); + if (dma->first_buffer == NULL) { + return AUDIO_DMA_MEMORY_ERROR; + } + dma->first_buffer_free = true; + if (!single_buffer) { + dma->second_buffer = (uint8_t*) m_realloc(dma->second_buffer, max_buffer_length); + if (dma->second_buffer == NULL) { + return AUDIO_DMA_MEMORY_ERROR; + } + } + dma->signed_to_unsigned = !output_signed && samples_signed; + dma->unsigned_to_signed = output_signed && !samples_signed; + } + + dma->event_channel = 0xff; + if (!single_buffer) { + dma->second_descriptor = (DmacDescriptor*) m_malloc(sizeof(DmacDescriptor), false); + if (dma->second_descriptor == NULL) { + return AUDIO_DMA_MEMORY_ERROR; + } + + // We're likely double buffering so set up the block interrupts. + turn_on_event_system(); + dma->event_channel = find_sync_event_channel(); + + if (dma->event_channel >= EVSYS_SYNCH_NUM) { + mp_raise_RuntimeError(translate("All sync event channels in use")); + } + init_event_channel_interrupt(dma->event_channel, CORE_GCLK, EVSYS_ID_GEN_DMAC_CH_0 + dma_channel); + + // We keep the audio_dma_t for internal use and the sample as a root pointer because it + // contains the audiodma structure. + audio_dma_state[dma->dma_channel] = dma; + MP_STATE_PORT(playing_audio)[dma->dma_channel] = dma->sample; + } + + + if (audiosample_bits_per_sample(sample) == 16) { + dma->beat_size = 2; + dma->bytes_per_sample = 2; + } else { + dma->beat_size = 1; + dma->bytes_per_sample = 1; + if (single_channel) { + output_register_address += 1; + } + } + // Transfer both channels at once. + if (!single_channel && audiosample_channel_count(sample) == 2) { + dma->beat_size *= 2; + } + + DmacDescriptor* first_descriptor = dma_descriptor(dma_channel); + setup_audio_descriptor(first_descriptor, dma->beat_size, output_spacing, output_register_address); + if (single_buffer) { + first_descriptor->DESCADDR.reg = 0; + if (dma->loop) { + first_descriptor->DESCADDR.reg = (uint32_t) first_descriptor; + } + } else { + first_descriptor->DESCADDR.reg = (uint32_t) dma->second_descriptor; + setup_audio_descriptor(dma->second_descriptor, dma->beat_size, output_spacing, output_register_address); + dma->second_descriptor->DESCADDR.reg = (uint32_t) first_descriptor; + } + + // Load the first two blocks up front. + audio_dma_load_next_block(dma); + if (!single_buffer) { + audio_dma_load_next_block(dma); + } + + dma_configure(dma_channel, dma_trigger_source, true); + audio_dma_enable_channel(dma_channel); + + return AUDIO_DMA_OK; +} + +void audio_dma_stop(audio_dma_t* dma) { + uint8_t channel = dma->dma_channel; + if (channel < AUDIO_DMA_CHANNEL_COUNT) { + audio_dma_disable_channel(channel); + disable_event_channel(dma->event_channel); + MP_STATE_PORT(playing_audio)[channel] = NULL; + audio_dma_state[channel] = NULL; + audio_dma_free_channel(dma->dma_channel); + } + dma->dma_channel = AUDIO_DMA_CHANNEL_COUNT; +} + +void audio_dma_pause(audio_dma_t* dma) { + dma_suspend_channel(dma->dma_channel); +} + +void audio_dma_resume(audio_dma_t* dma) { + dma_resume_channel(dma->dma_channel); +} + +bool audio_dma_get_paused(audio_dma_t* dma) { + if (dma->dma_channel >= AUDIO_DMA_CHANNEL_COUNT) { + return false; + } + uint32_t status = dma_transfer_status(dma->dma_channel); + + return (status & DMAC_CHINTFLAG_SUSP) != 0; +} + +void audio_dma_init(audio_dma_t* dma) { + dma->dma_channel = AUDIO_DMA_CHANNEL_COUNT; +} + +void audio_dma_reset(void) { + for (uint8_t i = 0; i < AUDIO_DMA_CHANNEL_COUNT; i++) { + audio_dma_state[i] = NULL; + audio_dma_pending[i] = false; + audio_dma_allocated[i] = false; + audio_dma_disable_channel(i); + dma_descriptor(i)->BTCTRL.bit.VALID = false; + MP_STATE_PORT(playing_audio)[i] = NULL; + } +} + +bool audio_dma_get_playing(audio_dma_t* dma) { + if (dma->dma_channel >= AUDIO_DMA_CHANNEL_COUNT) { + return false; + } + uint32_t status = dma_transfer_status(dma->dma_channel); + if ((status & DMAC_CHINTFLAG_TCMPL) != 0 || (status & DMAC_CHINTFLAG_TERR) != 0) { + audio_dma_stop(dma); + } + + return (status & DMAC_CHINTFLAG_TERR) == 0; +} + +// WARN(tannewt): DO NOT print from here. Printing calls background tasks such as this and causes a +// stack overflow. + +void audio_dma_background(void) { + for (uint8_t i = 0; i < AUDIO_DMA_CHANNEL_COUNT; i++) { + if (audio_dma_pending[i]) { + continue; + } + audio_dma_t* dma = audio_dma_state[i]; + if (dma == NULL) { + continue; + } + + bool block_done = event_interrupt_active(dma->event_channel); + if (!block_done) { + continue; + } + + // audio_dma_load_next_block() can call Python code, which can call audio_dma_background() + // recursively at the next background processing time. So disallow recursive calls to here. + audio_dma_pending[i] = true; + audio_dma_load_next_block(dma); + audio_dma_pending[i] = false; + } +} +#endif diff --git a/ports/atmel-samd/audio_dma.h b/ports/atmel-samd/audio_dma.h new file mode 100644 index 0000000000000..1ebec6f7e99f3 --- /dev/null +++ b/ports/atmel-samd/audio_dma.h @@ -0,0 +1,98 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_AUDIO_DMA_H +#define MICROPY_INCLUDED_ATMEL_SAMD_AUDIO_DMA_H + +#include "extmod/vfs_fat.h" +#include "py/obj.h" +#include "shared-module/audiocore/RawSample.h" +#include "shared-module/audiocore/WaveFile.h" + +typedef struct { + mp_obj_t sample; + uint8_t dma_channel; + uint8_t event_channel; + uint8_t audio_channel; + uint8_t bytes_per_sample; + uint8_t beat_size; + uint8_t spacing; + bool loop; + bool single_channel; + bool signed_to_unsigned; + bool unsigned_to_signed; + bool first_buffer_free; + uint8_t* first_buffer; + uint8_t* second_buffer; + bool first_descriptor_free; + DmacDescriptor* second_descriptor; +} audio_dma_t; + +typedef enum { + AUDIO_DMA_OK, + AUDIO_DMA_DMA_BUSY, + AUDIO_DMA_MEMORY_ERROR, +} audio_dma_result; + +uint32_t audiosample_sample_rate(mp_obj_t sample_obj); +uint8_t audiosample_bits_per_sample(mp_obj_t sample_obj); +uint8_t audiosample_channel_count(mp_obj_t sample_obj); + +void audio_dma_init(audio_dma_t* dma); +void audio_dma_reset(void); + +uint8_t audio_dma_allocate_channel(void); +void audio_dma_free_channel(uint8_t channel); + +// This sets everything up but doesn't start the timer. +// Sample is the python object for the sample to play. +// loop is true if we should loop the sample. +// single_channel is true if we only output a single channel. When false, all channels will be +// output. +// audio_channel is the index of the channel to dma. single_channel must be false in this case. +// output_signed is true if the dma'd data should be signed. False and it will be unsigned. +// output_register_address is the address to copy data to. +// dma_trigger_source is the DMA trigger source which cause another copy +audio_dma_result audio_dma_setup_playback(audio_dma_t* dma, + mp_obj_t sample, + bool loop, + bool single_channel, + uint8_t audio_channel, + bool output_signed, + uint32_t output_register_address, + uint8_t dma_trigger_source); + +void audio_dma_disable_channel(uint8_t channel); +void audio_dma_enable_channel(uint8_t channel); +void audio_dma_stop(audio_dma_t* dma); +bool audio_dma_get_playing(audio_dma_t* dma); +void audio_dma_pause(audio_dma_t* dma); +void audio_dma_resume(audio_dma_t* dma); +bool audio_dma_get_paused(audio_dma_t* dma); + +void audio_dma_background(void); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_AUDIO_DMA_H diff --git a/ports/atmel-samd/background.c b/ports/atmel-samd/background.c index 2fdf059823b18..ca91a31de6a1d 100644 --- a/ports/atmel-samd/background.c +++ b/ports/atmel-samd/background.c @@ -25,12 +25,77 @@ */ #include "background.h" -// #include "common-hal/audioio/AudioOut.h" -#include "usb.h" -#include "usb_mass_storage.h" +#include "audio_dma.h" +#include "tick.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include "py/runtime.h" +#include "shared-module/network/__init__.h" +#include "supervisor/shared/stack.h" + +#ifdef CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +volatile uint64_t last_finished_tick = 0; + +bool stack_ok_so_far = true; + +static bool running_background_tasks = false; + +#ifdef MONITOR_BACKGROUND_TASKS +// PB03 is physical pin "SCL" on the Metro M4 express +// so you can't use this code AND an i2c peripheral +// at the same time unless you change this +STATIC void start_background_task(void) { + REG_PORT_DIRSET1 = (1<<3); + REG_PORT_OUTSET1 = (1<<3); +} + +STATIC void finish_background_task(void) { + REG_PORT_OUTCLR1 = (1<<3); +} +#else +STATIC void start_background_task(void) {} +STATIC void finish_background_task(void) {} +#endif + +void background_tasks_reset(void) { + running_background_tasks = false; +} void run_background_tasks(void) { - // audioout_background(); - usb_msc_background(); - usb_cdc_background(); + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + + start_background_task(); + + assert_heap_ok(); + running_background_tasks = true; + + #if CIRCUITPY_AUDIOIO || CIRCUITPY_AUDIOBUSIO + audio_dma_background(); + #endif + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + + #if CIRCUITPY_NETWORK + network_module_background(); + #endif + filesystem_background(); + usb_background(); + running_background_tasks = false; + assert_heap_ok(); + + last_finished_tick = supervisor_ticks_ms64(); + finish_background_task(); +} + +bool background_tasks_ok(void) { + return supervisor_ticks_ms64() - last_finished_tick < 1000; } diff --git a/ports/atmel-samd/background.h b/ports/atmel-samd/background.h index f7fb10a1f714c..d9866a6abc6ca 100644 --- a/ports/atmel-samd/background.h +++ b/ports/atmel-samd/background.h @@ -27,6 +27,11 @@ #ifndef MICROPY_INCLUDED_ATMEL_SAMD_BACKGROUND_H #define MICROPY_INCLUDED_ATMEL_SAMD_BACKGROUND_H +#include + +void background_tasks_reset(void); void run_background_tasks(void); +void run_background_vm_tasks(void); +bool background_tasks_ok(void); #endif // MICROPY_INCLUDED_ATMEL_SAMD_BACKGROUND_H diff --git a/ports/atmel-samd/bindings/samd/Clock.c b/ports/atmel-samd/bindings/samd/Clock.c new file mode 100644 index 0000000000000..b88bb82e22f61 --- /dev/null +++ b/ports/atmel-samd/bindings/samd/Clock.c @@ -0,0 +1,425 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "bindings/samd/Clock.h" +#include "samd/clocks.h" +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" + +//| .. currentmodule:: samd +//| +//| :class:`Clock` --- Clock reference +//| ------------------------------------------ +//| +//| Identifies a clock on the microcontroller. +//| +//| .. class:: Clock +//| +//| Identifies a clock on the microcontroller. They are fixed by the +//| hardware so they cannot be constructed on demand. Instead, use +//| `samd.clock` to reference the desired clock. +//| + +STATIC void samd_clock_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + + mp_printf(print, "%q.%q.%q", MP_QSTR_samd, MP_QSTR_clock, self->name); +} + +//| .. attribute:: enabled +//| +//| Is the clock enabled? (read-only) +//| +STATIC mp_obj_t samd_clock_get_enabled(mp_obj_t self_in) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(clock_get_enabled(self->type, self->index)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_enabled_obj, samd_clock_get_enabled); + +const mp_obj_property_t samd_clock_enabled_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&samd_clock_get_enabled_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj, + }, +}; + +//| .. attribute:: parent +//| +//| Clock parent. (read-only) +//| +STATIC mp_obj_t samd_clock_get_parent(mp_obj_t self_in) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + uint8_t p_type, p_index; + if (!clock_get_parent(self->type, self->index, &p_type, &p_index)) + return mp_const_none; + + const mp_map_t* samd_map = &samd_clock_globals.map; + for (uint8_t i = 0; i < samd_map->alloc; i++) { + samd_clock_obj_t *iter = samd_map->table[i].value; + if (iter->type == p_type && iter->index == p_index) + return iter; + } + return mp_const_none; +} + +MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_parent_obj, samd_clock_get_parent); + +const mp_obj_property_t samd_clock_parent_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&samd_clock_get_parent_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj, + }, +}; + +//| .. attribute:: frequency +//| +//| Clock frequency. (read-only) +//| +STATIC mp_obj_t samd_clock_get_frequency(mp_obj_t self_in) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_int_from_uint(clock_get_frequency(self->type, self->index)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_frequency_obj, samd_clock_get_frequency); + +const mp_obj_property_t samd_clock_frequency_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&samd_clock_get_frequency_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj, + }, +}; + +//| .. attribute:: calibration +//| +//| Clock calibration. Not all clocks can be calibrated. +//| +STATIC mp_obj_t samd_clock_get_calibration(mp_obj_t self_in) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_int_from_uint(clock_get_calibration(self->type, self->index)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(samd_clock_get_calibration_obj, samd_clock_get_calibration); + +STATIC mp_obj_t samd_clock_set_calibration(mp_obj_t self_in, mp_obj_t calibration) { + samd_clock_obj_t *self = MP_OBJ_TO_PTR(self_in); + int ret = clock_set_calibration(self->type, self->index, mp_obj_get_int(calibration)); + if (ret == -2) + mp_raise_AttributeError(translate("calibration is read only")); + if (ret == -1) + mp_raise_ValueError(translate("calibration is out of range")); + return mp_const_none; +} + +MP_DEFINE_CONST_FUN_OBJ_2(samd_clock_set_calibration_obj, samd_clock_set_calibration); + +const mp_obj_property_t samd_clock_calibration_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&samd_clock_get_calibration_obj, + (mp_obj_t)&samd_clock_set_calibration_obj, + (mp_obj_t)&mp_const_none_obj, + }, +}; + +STATIC const mp_rom_map_elem_t samd_clock_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&samd_clock_enabled_obj) }, + { MP_ROM_QSTR(MP_QSTR_parent), MP_ROM_PTR(&samd_clock_parent_obj) }, + { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&samd_clock_frequency_obj) }, + { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&samd_clock_calibration_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(samd_clock_locals_dict, samd_clock_locals_dict_table); + +const mp_obj_type_t samd_clock_type = { + { &mp_type_type }, + .name = MP_QSTR_Clock, + .print = samd_clock_print, + .locals_dict = (mp_obj_t)&samd_clock_locals_dict, +}; + +#ifdef SAMD21 + +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_SOURCE(XOSC); +CLOCK_SOURCE(GCLKIN); +CLOCK_SOURCE(GCLKGEN1); +CLOCK_SOURCE(OSCULP32K); +#endif +CLOCK_SOURCE(OSC32K); +CLOCK_SOURCE(XOSC32K); +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_SOURCE(OSC8M); +CLOCK_SOURCE(DFLL48M); +CLOCK_SOURCE(DPLL96M); + +CLOCK_GCLK_(SYSCTRL, DFLL48); +CLOCK_GCLK_(SYSCTRL, FDPLL); +CLOCK_GCLK_(SYSCTRL, FDPLL32K); +CLOCK_GCLK(WDT); +#endif +CLOCK_GCLK(RTC); +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_GCLK(EIC); +CLOCK_GCLK(USB); +CLOCK_GCLK_(EVSYS, 0); +CLOCK_GCLK_(EVSYS, 1); +CLOCK_GCLK_(EVSYS, 2); +CLOCK_GCLK_(EVSYS, 3); +CLOCK_GCLK_(EVSYS, 4); +CLOCK_GCLK_(EVSYS, 5); +CLOCK_GCLK_(EVSYS, 6); +CLOCK_GCLK_(EVSYS, 7); +CLOCK_GCLK_(EVSYS, 8); +CLOCK_GCLK_(EVSYS, 9); +CLOCK_GCLK_(EVSYS, 10); +CLOCK_GCLK_(EVSYS, 11); +CLOCK(SERCOMx_SLOW, 1, 19); +CLOCK_GCLK_(SERCOM0, CORE); +CLOCK_GCLK_(SERCOM1, CORE); +CLOCK_GCLK_(SERCOM2, CORE); +CLOCK_GCLK_(SERCOM3, CORE); +CLOCK_GCLK_(SERCOM4, CORE); +CLOCK_GCLK_(SERCOM5, CORE); +CLOCK(TCC0_TCC1, 1, 26); +CLOCK(TCC2_TCC3, 1, 27); +CLOCK(TC4_TC5, 1, 28); +CLOCK(TC6_TC7, 1, 29); +CLOCK_GCLK(ADC); +CLOCK_GCLK_(AC, DIG); +CLOCK_GCLK_(AC, ANA); +CLOCK_GCLK(DAC); +CLOCK_GCLK(PTC); +CLOCK_GCLK_(I2S, 0); +CLOCK_GCLK_(I2S, 1); + +CLOCK(SYSTICK, 2, 0); +#endif + +STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = { +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(XOSC), + CLOCK_ENTRY(GCLKIN), + CLOCK_ENTRY(GCLKGEN1), + CLOCK_ENTRY(OSCULP32K), +#endif + CLOCK_ENTRY(OSC32K), + CLOCK_ENTRY(XOSC32K), +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(OSC8M), + CLOCK_ENTRY(DFLL48M), + CLOCK_ENTRY(DPLL96M), + CLOCK_ENTRY_(SYSCTRL, DFLL48), + CLOCK_ENTRY_(SYSCTRL, FDPLL), + CLOCK_ENTRY_(SYSCTRL, FDPLL32K), + CLOCK_ENTRY(WDT), +#endif + CLOCK_ENTRY(RTC), +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(EIC), + CLOCK_ENTRY(USB), + CLOCK_ENTRY_(EVSYS, 0), + CLOCK_ENTRY_(EVSYS, 1), + CLOCK_ENTRY_(EVSYS, 2), + CLOCK_ENTRY_(EVSYS, 3), + CLOCK_ENTRY_(EVSYS, 4), + CLOCK_ENTRY_(EVSYS, 5), + CLOCK_ENTRY_(EVSYS, 6), + CLOCK_ENTRY_(EVSYS, 7), + CLOCK_ENTRY_(EVSYS, 8), + CLOCK_ENTRY_(EVSYS, 9), + CLOCK_ENTRY_(EVSYS, 10), + CLOCK_ENTRY_(EVSYS, 11), + CLOCK_ENTRY(SERCOMx_SLOW), + CLOCK_ENTRY_(SERCOM0, CORE), + CLOCK_ENTRY_(SERCOM1, CORE), + CLOCK_ENTRY_(SERCOM2, CORE), + CLOCK_ENTRY_(SERCOM3, CORE), + CLOCK_ENTRY_(SERCOM4, CORE), + CLOCK_ENTRY_(SERCOM5, CORE), + CLOCK_ENTRY(TCC0_TCC1), + CLOCK_ENTRY(TCC2_TCC3), + CLOCK_ENTRY(TC4_TC5), + CLOCK_ENTRY(TC6_TC7), + CLOCK_ENTRY(ADC), + CLOCK_ENTRY_(AC, DIG), + CLOCK_ENTRY_(AC, ANA), + CLOCK_ENTRY(DAC), + CLOCK_ENTRY(PTC), + CLOCK_ENTRY_(I2S, 0), + CLOCK_ENTRY_(I2S, 1), + + CLOCK_ENTRY(SYSTICK), +#endif +}; +MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table); + +#endif // SAMD21 + +#ifdef SAMD51 + + + +#include +#include +#include +#include +#include +#include +#include + +CLOCK_SOURCE(XOSC0); +CLOCK_SOURCE(XOSC1); +CLOCK_SOURCE(GCLKIN); +CLOCK_SOURCE(GCLKGEN1); +CLOCK_SOURCE(OSCULP32K); +CLOCK_SOURCE(XOSC32K); +CLOCK_SOURCE(DFLL); +CLOCK_SOURCE(DPLL0); +CLOCK_SOURCE(DPLL1); + +CLOCK_GCLK_(OSCCTRL, DFLL48); +CLOCK_GCLK_(OSCCTRL, FDPLL0); +CLOCK_GCLK_(OSCCTRL, FDPLL1); +CLOCK_GCLK_(OSCCTRL, FDPLL032K); // GCLK_OSCCTRL_FDPLL1_32K, GCLK_SDHC0_SLOW, GCLK_SDHC1_SLOW, GCLK_SERCOM[0..7]_SLOW +CLOCK_GCLK(EIC); +CLOCK_GCLK_(FREQM, MSR); +// 6: GCLK_FREQM_REF +CLOCK_GCLK_(SERCOM0, CORE); +CLOCK_GCLK_(SERCOM1, CORE); +CLOCK(TC0_TC1, 1, 9); +CLOCK_GCLK(USB); +CLOCK_GCLK_(EVSYS, 0); +CLOCK_GCLK_(EVSYS, 1); +CLOCK_GCLK_(EVSYS, 2); +CLOCK_GCLK_(EVSYS, 3); +CLOCK_GCLK_(EVSYS, 4); +CLOCK_GCLK_(EVSYS, 5); +CLOCK_GCLK_(EVSYS, 6); +CLOCK_GCLK_(EVSYS, 7); +CLOCK_GCLK_(EVSYS, 8); +CLOCK_GCLK_(EVSYS, 9); +CLOCK_GCLK_(EVSYS, 10); +CLOCK_GCLK_(EVSYS, 11); +CLOCK_GCLK_(SERCOM2, CORE); +CLOCK_GCLK_(SERCOM3, CORE); +CLOCK(TCC0_TCC1, 1, 25); +CLOCK(TC2_TC3, 1, 26); +CLOCK_GCLK(CAN0); +CLOCK_GCLK(CAN1); +CLOCK(TCC2_TCC3, 1, 29); +CLOCK(TC4_TC5, 1, 30); +// CLOCK_GCLK(PDEC); +// CLOCK_GCLK(AC); +// CLOCK_GCLK(CCL); +CLOCK_GCLK_(SERCOM4, CORE); +CLOCK_GCLK_(SERCOM5, CORE); +CLOCK_GCLK_(SERCOM6, CORE); +CLOCK_GCLK_(SERCOM7, CORE); +CLOCK_GCLK(TCC4); +CLOCK(TC6_TC7, 1, 39); +CLOCK_GCLK(ADC0); +CLOCK_GCLK(ADC1); +CLOCK_GCLK(DAC); +CLOCK_GCLK_(I2S, 0); +CLOCK_GCLK_(I2S, 1); +// CLOCK_GCLK(SDHC0); +// CLOCK_GCLK(SDHC1); +// 47: GCLK_CM4_TRACE + +CLOCK(SYSTICK, 2, 0); +CLOCK(CPU, 2, 1); +CLOCK(RTC, 2, 2); + + +STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = { + CLOCK_ENTRY(XOSC0), + CLOCK_ENTRY(XOSC1), + CLOCK_ENTRY(GCLKIN), + CLOCK_ENTRY(GCLKGEN1), + CLOCK_ENTRY(OSCULP32K), + CLOCK_ENTRY(XOSC32K), + CLOCK_ENTRY(DFLL), + CLOCK_ENTRY(DPLL0), + CLOCK_ENTRY(DPLL1), + + CLOCK_ENTRY_(OSCCTRL, DFLL48), + CLOCK_ENTRY_(OSCCTRL, FDPLL0), + CLOCK_ENTRY_(OSCCTRL, FDPLL1), + CLOCK_ENTRY_(OSCCTRL, FDPLL032K), + CLOCK_ENTRY(EIC), + CLOCK_ENTRY_(FREQM, MSR), + CLOCK_ENTRY_(SERCOM0, CORE), + CLOCK_ENTRY_(SERCOM1, CORE), + CLOCK_ENTRY(TC0_TC1), + CLOCK_ENTRY(USB), + CLOCK_ENTRY_(EVSYS, 0), + CLOCK_ENTRY_(EVSYS, 1), + CLOCK_ENTRY_(EVSYS, 2), + CLOCK_ENTRY_(EVSYS, 3), + CLOCK_ENTRY_(EVSYS, 4), + CLOCK_ENTRY_(EVSYS, 5), + CLOCK_ENTRY_(EVSYS, 6), + CLOCK_ENTRY_(EVSYS, 7), + CLOCK_ENTRY_(EVSYS, 8), + CLOCK_ENTRY_(EVSYS, 9), + CLOCK_ENTRY_(EVSYS, 10), + CLOCK_ENTRY_(EVSYS, 11), + CLOCK_ENTRY_(SERCOM2, CORE), + CLOCK_ENTRY_(SERCOM3, CORE), + CLOCK_ENTRY(TCC0_TCC1), + CLOCK_ENTRY(TC2_TC3), + CLOCK_ENTRY(CAN0), + CLOCK_ENTRY(CAN1), + CLOCK_ENTRY(TCC2_TCC3), + CLOCK_ENTRY(TC4_TC5), + // CLOCK_ENTRY(PDEC), + // CLOCK_ENTRY(AC), + // CLOCK_ENTRY(CCL), + CLOCK_ENTRY_(SERCOM4, CORE), + CLOCK_ENTRY_(SERCOM5, CORE), + CLOCK_ENTRY_(SERCOM6, CORE), + CLOCK_ENTRY_(SERCOM7, CORE), + CLOCK_ENTRY(TCC4), + CLOCK_ENTRY(TC6_TC7), + CLOCK_ENTRY(ADC0), + CLOCK_ENTRY(ADC1), + CLOCK_ENTRY(DAC), + CLOCK_ENTRY_(I2S, 0), + CLOCK_ENTRY_(I2S, 1), + // CLOCK_ENTRY(SDHC0), + // CLOCK_ENTRY(SDHC1), + + CLOCK_ENTRY(SYSTICK), + CLOCK_ENTRY(CPU), + CLOCK_ENTRY(RTC), +}; +MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table); + +#endif // SAMD51 diff --git a/ports/atmel-samd/bindings/samd/Clock.h b/ports/atmel-samd/bindings/samd/Clock.h new file mode 100644 index 0000000000000..ccc8f10d1019b --- /dev/null +++ b/ports/atmel-samd/bindings/samd/Clock.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_BINDINGS_SAMD_CLOCK_H +#define MICROPY_INCLUDED_ATMEL_SAMD_BINDINGS_SAMD_CLOCK_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + qstr name; + uint8_t type; + uint8_t index; +} samd_clock_obj_t; + +#define CLOCK(_name, _type, _index) \ +const samd_clock_obj_t clock_ ## _name = { \ + { &samd_clock_type }, \ + .name = MP_QSTR_ ## _name, \ + .type = _type, \ + .index = _index, \ +} + +#define CLOCK_SOURCE(_name) \ +const samd_clock_obj_t clock_ ## _name = { \ + { &samd_clock_type }, \ + .name = MP_QSTR_ ## _name, \ + .type = 0, \ + .index = GCLK_SOURCE_ ## _name, \ +} + +#define CLOCK_GCLK(_name) \ +const samd_clock_obj_t clock_ ## _name = { \ + { &samd_clock_type }, \ + .name = MP_QSTR_ ## _name, \ + .type = 1, \ + .index = _name ## _GCLK_ID, \ +} + +#define CLOCK_GCLK_(_name, _extra) \ +const samd_clock_obj_t clock_ ## _name ## _ ## _extra = { \ + { &samd_clock_type }, \ + .name = MP_QSTR_ ## _name ## _ ## _extra, \ + .type = 1, \ + .index = _name ## _GCLK_ID_ ## _extra, \ +} + +#define CLOCK_ENTRY(_name) { MP_ROM_QSTR(MP_QSTR_ ## _name), MP_ROM_PTR(&clock_ ## _name) } +#define CLOCK_ENTRY_(_name, _extra) { MP_ROM_QSTR(MP_QSTR_ ## _name ## _ ## _extra), MP_ROM_PTR(&clock_ ## _name ## _ ## _extra) } + +extern const mp_obj_type_t samd_clock_type; +extern const mp_obj_dict_t samd_clock_globals; + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_BINDINGS_SAMD_CLOCK_H diff --git a/ports/atmel-samd/bindings/samd/__init__.c b/ports/atmel-samd/bindings/samd/__init__.c new file mode 100644 index 0000000000000..55a10001d26b3 --- /dev/null +++ b/ports/atmel-samd/bindings/samd/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/runtime.h" + +#include "bindings/samd/Clock.h" + +//| :mod:`samd` --- SAMD implementation settings +//| ================================================= +//| +//| .. module:: samd +//| :synopsis: SAMD implementation settings +//| :platform: SAMD21 +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Clock +//| + +//| :mod:`samd.clock` --- samd clock names +//| -------------------------------------------------------- +//| +//| .. module:: samd.clock +//| :synopsis: samd clock names +//| :platform: SAMD21 +//| +//| References to clocks as named by the microcontroller +//| +const mp_obj_module_t samd_clock_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&samd_clock_globals, +}; + +STATIC const mp_rom_map_elem_t samd_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_samd) }, + { MP_ROM_QSTR(MP_QSTR_clock), MP_ROM_PTR(&samd_clock_module) }, +}; + +STATIC MP_DEFINE_CONST_DICT(samd_module_globals, samd_module_globals_table); + +const mp_obj_module_t samd_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&samd_module_globals, +}; diff --git a/ports/atmel-samd/boards/8086_commander/board.c b/ports/atmel-samd/boards/8086_commander/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/8086_commander/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.h b/ports/atmel-samd/boards/8086_commander/mpconfigboard.h new file mode 100644 index 0000000000000..9e3be4e6a0834 --- /dev/null +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "8086 Commander" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define BOARD_HAS_CRYSTAL 0 +#define CALIBRATE_CRYSTALLESS 1 + +#define MICROPY_HW_LED_STATUS (&pin_PA06) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA18 + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk new file mode 100644 index 0000000000000..3e865657ac38e --- /dev/null +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk @@ -0,0 +1,26 @@ +USB_VID = 0x3171 +USB_PID = 0x0101 +USB_PRODUCT = "Commander" +USB_MANUFACTURER = "8086 Consultancy" + +USB_DEVICES= "CDC,MSC,HID" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" + +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + +CFLAGS_INLINE_LIMIT = 60 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD +#FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ADXL34x diff --git a/ports/atmel-samd/boards/8086_commander/pins.c b/ports/atmel-samd/boards/8086_commander/pins.c new file mode 100644 index 0000000000000..3eea4009e776f --- /dev/null +++ b/ports/atmel-samd/boards/8086_commander/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Serial + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, // RX + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, // TX + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + + // Buttons + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA20) }, // 1 + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, // 2 + { MP_ROM_QSTR(MP_QSTR_B2), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB09) }, // 3 + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA02) }, // 4 + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PA02) }, + + // SD Card / SPI + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA13) }, // CS + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB10) }, // MOSI + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB11) }, // SCK + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA12) }, // MISO + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + + // LED + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, // 1A + { MP_ROM_QSTR(MP_QSTR_LED1A), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA14) }, // 1B + { MP_ROM_QSTR(MP_QSTR_LED1B), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA08) }, // 2A + { MP_ROM_QSTR(MP_QSTR_LED2A), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA07) }, // 2B + { MP_ROM_QSTR(MP_QSTR_LED2B), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA06) }, // ALERT + { MP_ROM_QSTR(MP_QSTR_ALERT), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, // 3A + { MP_ROM_QSTR(MP_QSTR_LED3A), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA04) }, // 3B + { MP_ROM_QSTR(MP_QSTR_LED3B), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB02) }, // 4A + { MP_ROM_QSTR(MP_QSTR_LED4A), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PB03) }, // 4B + { MP_ROM_QSTR(MP_QSTR_LED4B), MP_ROM_PTR(&pin_PB03) }, + + // Accelerometer / I2C + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA23) }, // SCL + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PA22) }, // SDA + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/arduino_mkr1300/board.c b/ports/atmel-samd/boards/arduino_mkr1300/board.c new file mode 100644 index 0000000000000..770bc825938cd --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkr1300/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h new file mode 100644 index 0000000000000..226717c83b32c --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h @@ -0,0 +1,22 @@ +#define MICROPY_HW_BOARD_NAME "Arduino MKR1300" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define MICROPY_HW_LED_STATUS (&pin_PB23) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA15) + +#define DEFAULT_UART_BUS_RX (&pin_PB23) +#define DEFAULT_UART_BUS_TX (&pin_PB22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk new file mode 100644 index 0000000000000..bd682ade079cd --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x2341 +USB_PID = 0x8053 +USB_PRODUCT = "Arduino MKR1300" +USB_MANUFACTURER = "Arduino" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_mkr1300/pins.c b/ports/atmel-samd/boards/arduino_mkr1300/pins.c new file mode 100644 index 0000000000000..7a73e89bf9e52 --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkr1300/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_PB09) }, // NOTE: LORA BOOT + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_RST), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/arduino_mkrzero/board.c b/ports/atmel-samd/boards/arduino_mkrzero/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkrzero/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.h b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.h new file mode 100644 index 0000000000000..4871b1798ba7d --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Arduino MKR Zero" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define DEFAULT_UART_BUS_RX (&pin_PB23) +#define DEFAULT_UART_BUS_TX (&pin_PB22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk new file mode 100644 index 0000000000000..894b9b0110285 --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x239A +USB_PID = 0x8050 +USB_PRODUCT = "Arduino MKRZero" +USB_MANUFACTURER = "Arduino" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_mkrzero/pins.c b/ports/atmel-samd/boards/arduino_mkrzero/pins.c new file mode 100644 index 0000000000000..2494076ab1dce --- /dev/null +++ b/ports/atmel-samd/boards/arduino_mkrzero/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_SD_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_SD_CD), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/board.c b/ports/atmel-samd/boards/arduino_nano_33_iot/board.c new file mode 100644 index 0000000000000..770bc825938cd --- /dev/null +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.h b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.h new file mode 100644 index 0000000000000..847e1a679263e --- /dev/null +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.h @@ -0,0 +1,22 @@ +#define MICROPY_HW_BOARD_NAME "Arduino Nano 33 IoT" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA17) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB09) +#define DEFAULT_I2C_BUS_SDA (&pin_PB08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define DEFAULT_UART_BUS_RX (&pin_PB23) +#define DEFAULT_UART_BUS_TX (&pin_PB22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk new file mode 100644 index 0000000000000..8a29b0ace029e --- /dev/null +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x2341 +USB_PID = 0x8057 +USB_PRODUCT = "Arduino Nano 33 IoT" +USB_MANUFACTURER = "Arduino" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/pins.c b/ports/atmel-samd/boards/arduino_nano_33_iot/pins.c new file mode 100644 index 0000000000000..6b23cbf091e96 --- /dev/null +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/pins.c @@ -0,0 +1,49 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // NINA-W102 + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PA08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_MISO), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_SCK), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PA28) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/arduino_zero/board.c b/ports/atmel-samd/boards/arduino_zero/board.c index 2dc1683eafd01..770bc825938cd 100644 --- a/ports/atmel-samd/boards/arduino_zero/board.c +++ b/ports/atmel-samd/boards/arduino_zero/board.c @@ -30,13 +30,6 @@ void board_init(void) { - gpio_set_pin_function(MICROPY_HW_LED_TX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_TX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_TX, true); - - gpio_set_pin_function(MICROPY_HW_LED_RX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_RX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_RX, true); } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h index 6eeddb36c72a2..bf2a68c57ad2e 100644 --- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h +++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h @@ -1,16 +1,25 @@ #define MICROPY_HW_BOARD_NAME "Arduino Zero" #define MICROPY_HW_MCU_NAME "samd21g18" -// #define MICROPY_HW_LED_MSC PIN_PA17 // red -#define MICROPY_HW_LED_TX PIN_PA27 -#define MICROPY_HW_LED_RX PIN_PB03 +#define MICROPY_HW_LED_STATUS (&pin_PA17) -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25 | PORT_PA27) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PB03 + +#define MICROPY_PORT_A (PORT_PA27) #define MICROPY_PORT_B (PORT_PB03) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk index b24cc9c64756d..f94ec13b7ccde 100644 --- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x2341 USB_PID = 0x824D USB_PRODUCT = "Arduino Zero" USB_MANUFACTURER = "Arduino" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_zero/pins.c b/ports/atmel-samd/boards/arduino_zero/pins.c index 8b28c0fc22b3b..7ebcc9a6e3577 100644 --- a/ports/atmel-samd/boards/arduino_zero/pins.c +++ b/ports/atmel-samd/boards/arduino_zero/pins.c @@ -1,7 +1,5 @@ #include "shared-bindings/board/__init__.h" -#include "samd21_pins.h" - STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, @@ -30,5 +28,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/board.c b/ports/atmel-samd/boards/bast_pro_mini_m0/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.h b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.h new file mode 100644 index 0000000000000..cbfb11d200fcb --- /dev/null +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.h @@ -0,0 +1,52 @@ +#define MICROPY_HW_BOARD_NAME "Electronic Cats Bast Pro Mini M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// No microcontroller.nvm +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA08) +#define DEFAULT_I2C_BUS_SDA (&pin_PA09) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define DEFAULT_UART_BUS_RX (&pin_PA01) +#define DEFAULT_UART_BUS_TX (&pin_PA00) + +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk new file mode 100644 index 0000000000000..c3f0750a9e6cc --- /dev/null +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk @@ -0,0 +1,11 @@ +USB_VID = 0x1209 +USB_PID = 0xBAB3 +USB_PRODUCT = "Bast Pro Mini M0" +USB_MANUFACTURER = "Electronic Cats" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/pins.c b/ports/atmel-samd/boards/bast_pro_mini_m0/pins.c new file mode 100644 index 0000000000000..3ed940e362f15 --- /dev/null +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/pins.c @@ -0,0 +1,36 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/board.c b/ports/atmel-samd/boards/bdmicro_vina_m0/board.c new file mode 100644 index 0000000000000..bd63baa6fd558 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_m0/board.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) +{ + // struct port_config pin_conf; + // port_get_config_defaults(&pin_conf); + // + // pin_conf.direction = PORT_PIN_DIR_OUTPUT; + // port_pin_set_config(MICROPY_HW_LED_TX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_TX, true); + // + // port_pin_set_config(MICROPY_HW_LED_RX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_RX, true); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h new file mode 100644 index 0000000000000..458b1e12a6ac7 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "BDMICRO Vina M0" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA28) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA31 + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA13 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define BOARD_HAS_CRYSTAL 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk new file mode 100644 index 0000000000000..1537540424b49 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x31e2 +USB_PID = 0x2002 +USB_PRODUCT = "Vina M0" +USB_MANUFACTURER = "BDMICRO LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25L51245G" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c b/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c new file mode 100644 index 0000000000000..0ebceb28ddc5e --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_RTC_INT), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_RTC_CLK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_RTC_TS), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_PGM_LED), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/board.h b/ports/atmel-samd/boards/board.h index a2a73cfab4c4f..4f0ae9d728e72 100644 --- a/ports/atmel-samd/boards/board.h +++ b/ports/atmel-samd/boards/board.h @@ -31,6 +31,8 @@ #include +#include "py/mpconfig.h" + // Initializes board related state once on start up. void board_init(void); diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/board.c b/ports/atmel-samd/boards/capablerobot_usbhub/board.c new file mode 100644 index 0000000000000..46385f094fa5e --- /dev/null +++ b/ports/atmel-samd/boards/capablerobot_usbhub/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.h b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.h new file mode 100644 index 0000000000000..d359687e139a1 --- /dev/null +++ b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "Capable Robot Programmable USB Hub" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA01) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA00) +#define DEFAULT_SPI_BUS_MISO (&pin_PB23) + +#define DEFAULT_UART_BUS_RX (&pin_PA16) +#define DEFAULT_UART_BUS_TX (&pin_PA17) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk new file mode 100644 index 0000000000000..62399b1cdb387 --- /dev/null +++ b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0x04D8 +USB_PID = 0xEDB3 +USB_PRODUCT = "Programmable USB Hub" +USB_MANUFACTURER = "Capable Robot Components" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JV_IQ" +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c new file mode 100644 index 0000000000000..b1966930c7fd5 --- /dev/null +++ b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c @@ -0,0 +1,37 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_ANMB), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ANVLIM), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_AN5V), MP_ROM_PTR(&pin_PA05) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_MBPWM), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MBINT), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MBCS), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MBRST), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA21) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA17) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USBHOSTEN), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USBRESET), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USBBCEN), MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA2), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL2), MP_ROM_PTR(&pin_PA13) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/catwan_usbstick/board.c b/ports/atmel-samd/boards/catwan_usbstick/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/catwan_usbstick/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.h b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.h new file mode 100644 index 0000000000000..b92c2a65e3f6f --- /dev/null +++ b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.h @@ -0,0 +1,54 @@ +#define MICROPY_HW_BOARD_NAME "Electronic Cats CatWAN USBStick" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_RX &pin_PA14 + +#define MICROPY_PORT_A (PORT_PA14) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA22) + +#define IGNORE_PIN_PA00 1 +#define IGNORE_PIN_PA01 1 +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA08 1 +#define IGNORE_PIN_PA09 1 +#define IGNORE_PIN_PA10 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 diff --git a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk new file mode 100644 index 0000000000000..adae4beb27020 --- /dev/null +++ b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk @@ -0,0 +1,11 @@ +USB_VID = 0x1209 +USB_PID = 0xBAB2 +USB_PRODUCT = "CatWAN USBStick" +USB_MANUFACTURER = "Electronic Cats" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 diff --git a/ports/atmel-samd/boards/catwan_usbstick/pins.c b/ports/atmel-samd/boards/catwan_usbstick/pins.c new file mode 100644 index 0000000000000..346bd9c10ca85 --- /dev/null +++ b/ports/atmel-samd/boards/catwan_usbstick/pins.c @@ -0,0 +1,17 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_D0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_D1), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_D2), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_RST), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_RFM9X_CS), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c b/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c new file mode 100755 index 0000000000000..efafd152dbf6d --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Original work copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Modified work copyright (c) 2019 Kevin Neubauer for Null Byte Labs LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h new file mode 100755 index 0000000000000..592160b84f96a --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "CircuitBrains Basic" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define CIRCUITPY_MCU_FAMILY samd21 + +#define MICROPY_HW_LED_STATUS (&pin_PA14) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA19 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPI_FLASH_BAUDRATE (8000000) + +#define CALIBRATE_CRYSTALLESS 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA05) +#define DEFAULT_I2C_BUS_SDA (&pin_PA04) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 \ No newline at end of file diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk new file mode 100755 index 0000000000000..3587f1a33b465 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x04D8 +USB_PID = 0xEC63 +USB_PRODUCT = "CircuitBrains Basic" +USB_MANUFACTURER = "Kevin Neubauer" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c b/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c new file mode 100755 index 0000000000000..5acad5e988cd6 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c @@ -0,0 +1,35 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA08) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_STATUS_LED),MP_ROM_PTR(&pin_PA14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PA05) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c new file mode 100755 index 0000000000000..efafd152dbf6d --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Original work copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Modified work copyright (c) 2019 Kevin Neubauer for Null Byte Labs LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h new file mode 100755 index 0000000000000..687e97a5a35ee --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "CircuitBrains Deluxe" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PB13) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk new file mode 100755 index 0000000000000..7a9e5a7808c84 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x04D8 +USB_PID = 0xEC64 +USB_PRODUCT = "CircuitBrains Deluxe" +USB_MANUFACTURER = "Kevin Neubauer" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, S25FL064L" +LONGINT_IMPL = MPZ + +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 +CIRCUITPY_PS2IO = 1 diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c new file mode 100755 index 0000000000000..45fcd04640562 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PB01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_STATUS_LED),MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitplayground_express/board.c b/ports/atmel-samd/boards/circuitplayground_express/board.c index eb7ffab4a2fa4..85c37ee622920 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/board.c +++ b/ports/atmel-samd/boards/circuitplayground_express/board.c @@ -28,10 +28,8 @@ #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" #include "hal/include/hal_gpio.h" -#include "shared-bindings/digitalio/DigitalInOut.h" -#include "shared-bindings/neopixel_write/__init__.h" -#include "samd21_pins.h" void board_init(void) { @@ -49,18 +47,11 @@ bool board_requests_safe_mode(void) { gpio_set_pin_pull_mode(PIN_PA28, GPIO_PULL_DOWN); bool safe_mode = gpio_get_pin_level(PIN_PA14) && gpio_get_pin_level(PIN_PA28); - reset_pin(PIN_PA14); - reset_pin(PIN_PA28); + reset_pin_number(PIN_PA14); + reset_pin_number(PIN_PA28); return safe_mode; } void reset_board(void) { - uint8_t empty[30]; - memset(empty, 0, 30); - digitalio_digitalinout_obj_t neopixel_pin; - common_hal_digitalio_digitalinout_construct(&neopixel_pin, &pin_PB23); - common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, - DRIVE_MODE_PUSH_PULL); - common_hal_neopixel_write(&neopixel_pin, empty, 30); - common_hal_digitalio_digitalinout_deinit(&neopixel_pin); + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 02802a6a90690..0c5e5b76222d4 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -1,6 +1,8 @@ #define MICROPY_HW_BOARD_NAME "Adafruit CircuitPlayground Express" #define MICROPY_HW_MCU_NAME "samd21g18" +#define MICROPY_HW_LED_STATUS (&pin_PA17) + // Don't allow touch on A0 (PA02), because it's connected to the speaker. #define PA02_NO_TOUCH (true) @@ -8,54 +10,38 @@ #define SPI_FLASH_BAUDRATE (8000000) // On-board flash -#define SPI_FLASH_MOSI_PIN PIN_PA20 -#define SPI_FLASH_MISO_PIN PIN_PA16 -#define SPI_FLASH_SCK_PIN PIN_PA21 -#define SPI_FLASH_CS_PIN PIN_PB22 - -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PA20D_SERCOM3_PAD2 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PA16D_SERCOM3_PAD0 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PA21D_SERCOM3_PAD3 -#define SPI_FLASH_SERCOM SERCOM3 -#define SPI_FLASH_SERCOM_INDEX 3 -#define SPI_FLASH_MOSI_PAD 2 -#define SPI_FLASH_MISO_PAD 0 -#define SPI_FLASH_SCK_PAD 3 - -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 1 -#define SPI_FLASH_DIPO 0 // same as MISO PAD +#define SPI_FLASH_MOSI_PIN &pin_PA20 +#define SPI_FLASH_MISO_PIN &pin_PA16 +#define SPI_FLASH_SCK_PIN &pin_PA21 +#define SPI_FLASH_CS_PIN &pin_PB22 // These are pins not to reset. -// PA24 and PA25 are USB. -#define MICROPY_PORT_A (PORT_PA16 | PORT_PA20 | PORT_PA21 | PORT_PA24 | PORT_PA25) -#define MICROPY_PORT_B (PORT_PB22) +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) #define SPEAKER_ENABLE_PIN (&pin_PA30) -#include "external_flash/devices.h" +#define CALIBRATE_CRYSTALLESS 1 -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +// Explanation of how a user got into safe mode. +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +// Increase stack size slightly due to CPX library import nesting +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) //divisible by 8 -#include "external_flash/devices.h" +#define USER_NEOPIXELS_PIN (&pin_PB23) -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES S25FL216K, \ - GD25Q16C +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) -#include "external_flash/external_flash.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA07) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) -#define CALIBRATE_CRYSTALLESS 1 +#define DEFAULT_UART_BUS_RX (&pin_PB09) +#define DEFAULT_UART_BUS_TX (&pin_PB08) -// Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk index 43ff3521d28d1..cdbdf44f80976 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk @@ -1,16 +1,28 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld USB_VID = 0x239A USB_PID = 0x8019 USB_PRODUCT = "CircuitPlayground Express" USB_MANUFACTURER = "Adafruit Industries LLC" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +# Make room for frozen libs. +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +SUPEROPT_GC = 0 +CFLAGS_INLINE_LIMIT = 55 + # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Thermistor diff --git a/ports/atmel-samd/boards/circuitplayground_express/pins.c b/ports/atmel-samd/boards/circuitplayground_express/pins.c index aecd7f416a2dd..6fc46bd216b9a 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/pins.c +++ b/ports/atmel-samd/boards/circuitplayground_express/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -56,5 +56,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c b/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c new file mode 100644 index 0000000000000..21217caac9574 --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "hal/include/hal_gpio.h" +#include "supervisor/shared/board.h" + +void board_init(void) +{ +} + +// Check the status of the two buttons on CircuitPlayground Express. If both are +// pressed, then boot into user safe mode. +bool board_requests_safe_mode(void) { + gpio_set_pin_function(PIN_PA14, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA14, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(PIN_PA14, GPIO_PULL_DOWN); + + gpio_set_pin_function(PIN_PA28, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(PIN_PA28, GPIO_PULL_DOWN); + bool safe_mode = gpio_get_pin_level(PIN_PA14) && + gpio_get_pin_level(PIN_PA28); + reset_pin_number(PIN_PA14); + reset_pin_number(PIN_PA28); + return safe_mode; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h new file mode 100644 index 0000000000000..312fd26268dda --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -0,0 +1,47 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit CircuitPlayground Express with Crickit libraries" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA17) + +// Don't allow touch on A0 (PA02), because it's connected to the speaker. +#define PA02_NO_TOUCH (true) + +// Salae reads 12mhz which is the limit even though we set it to the safer 8mhz. +#define SPI_FLASH_BAUDRATE (8000000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA20 +#define SPI_FLASH_MISO_PIN &pin_PA16 +#define SPI_FLASH_SCK_PIN &pin_PA21 +#define SPI_FLASH_CS_PIN &pin_PB22 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPEAKER_ENABLE_PIN (&pin_PA30) + +#define CALIBRATE_CRYSTALLESS 1 + +#define USER_NEOPIXELS_PIN (&pin_PB23) + +// Explanation of how a user got into safe mode. +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" + +// Increase stack size slightly due to CPX library import nesting +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) // divisible by 8 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA07) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) + +#define DEFAULT_UART_BUS_RX (&pin_PB09) +#define DEFAULT_UART_BUS_TX (&pin_PB08) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk new file mode 100644 index 0000000000000..1516c149b98e1 --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk @@ -0,0 +1,33 @@ +USB_VID = 0x239A +USB_PID = 0x8019 +USB_PRODUCT = "CircuitPlayground Express with Crickit libraries" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" + +# Turn off features and optimizations for Crickit build to make room for additional frozen libs. +LONGINT_IMPL = NONE +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_RTC = 0 + +SUPEROPT_GC = 0 +CFLAGS_INLINE_LIMIT = 55 + + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Crickit +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Motor +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_seesaw +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Thermistor diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/pins.c b/ports/atmel-samd/boards/circuitplayground_express_crickit/pins.c new file mode 100644 index 0000000000000..6fc46bd216b9a --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_TEMPERATURE), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_SLIDE_SWITCH), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_REMOTEIN), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_IR_RX), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_REMOTEOUT), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_IR_TX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_IR_PROXIMITY), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA30) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c b/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c new file mode 100644 index 0000000000000..21217caac9574 --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "hal/include/hal_gpio.h" +#include "supervisor/shared/board.h" + +void board_init(void) +{ +} + +// Check the status of the two buttons on CircuitPlayground Express. If both are +// pressed, then boot into user safe mode. +bool board_requests_safe_mode(void) { + gpio_set_pin_function(PIN_PA14, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA14, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(PIN_PA14, GPIO_PULL_DOWN); + + gpio_set_pin_function(PIN_PA28, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(PIN_PA28, GPIO_PULL_DOWN); + bool safe_mode = gpio_get_pin_level(PIN_PA14) && + gpio_get_pin_level(PIN_PA28); + reset_pin_number(PIN_PA14); + reset_pin_number(PIN_PA28); + return safe_mode; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h new file mode 100644 index 0000000000000..4796e90a513fd --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -0,0 +1,49 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit CircuitPlayground Express with displayio" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA17) + +// Don't allow touch on A0 (PA02), because it's connected to the speaker. +#define PA02_NO_TOUCH (true) + +// Salae reads 12mhz which is the limit even though we set it to the safer 8mhz. +#define SPI_FLASH_BAUDRATE (8000000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA20 +#define SPI_FLASH_MISO_PIN &pin_PA16 +#define SPI_FLASH_SCK_PIN &pin_PA21 +#define SPI_FLASH_CS_PIN &pin_PB22 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPEAKER_ENABLE_PIN (&pin_PA30) + +#define CALIBRATE_CRYSTALLESS 1 + +// Explanation of how a user got into safe mode. +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" + +// Increase stack size slightly due to CPX library import nesting. +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) // divisible by 8 + +#define USER_NEOPIXELS_PIN (&pin_PB23) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA07) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) + +#define DEFAULT_UART_BUS_RX (&pin_PB09) +#define DEFAULT_UART_BUS_TX (&pin_PB08) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +#define MICROPY_PY_URE 0 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk new file mode 100644 index 0000000000000..d65dc993f712f --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk @@ -0,0 +1,29 @@ +USB_VID = 0x239A +USB_PID = 0x8019 +USB_PRODUCT = "CircuitPlayground Express with displayio" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" + +# Turn off features and optimizations for Crickit build to make room for additional frozen libs. +LONGINT_IMPL = NONE +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_RTC = 0 + +SUPEROPT_GC = 0 +CFLAGS_INLINE_LIMIT = 55 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Thermistor diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/pins.c b/ports/atmel-samd/boards/circuitplayground_express_displayio/pins.c new file mode 100644 index 0000000000000..6fc46bd216b9a --- /dev/null +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_TEMPERATURE), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_SLIDE_SWITCH), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_REMOTEIN), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_IR_RX), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_REMOTEOUT), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_IR_TX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_IR_PROXIMITY), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA30) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld new file mode 100644 index 0000000000000..1054605c8cc67 --- /dev/null +++ b/ports/atmel-samd/boards/common.template.ld @@ -0,0 +1,87 @@ +/* Template for SAMD21/SAMD51 linking. dollar-sign-curly-bracket items are replaced with strings. */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH_BOOTLOADER (rx): ORIGIN = ${BOOTLOADER_START_ADDR}, LENGTH = ${BOOTLOADER_SIZE} + + FLASH_FIRMWARE (rx) : ORIGIN = ${CIRCUITPY_FIRMWARE_START_ADDR}, LENGTH = ${CIRCUITPY_FIRMWARE_SIZE} + FLASH_FILESYSTEM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} + FLASH_CONFIG (r) : ORIGIN = ${CIRCUITPY_INTERNAL_CONFIG_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_CONFIG_SIZE} + FLASH_NVM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_NVM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_NVM_SIZE} + + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = ${RAM_SIZE} +} + +/* top end of the stack */ +/* stack must be double-word (8 byte) aligned */ +_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; +_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; + +/* define output sections */ +SECTIONS +{ + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors)) /* isr vector table */ + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + + . = ALIGN(4); + } >FLASH_FIRMWARE + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + _sidata = .; /* start of .data section */ + } >FLASH_FIRMWARE + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH_FIRMWARE (inidata). + It is one task of the startup to copy the initial values from FLASH_FIRMWARE to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */ + *(.ramfunc) + *(.ramfunc*) + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialize the .data section in RAM */ + } >RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; + _szero = .; /* define a global symbol at bss start; used by startup code */ + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ezero = .; /* define a global symbol at bss end; used by startup code */ + _ebss = .; + } >RAM + + /* this just checks there is enough RAM for the requested stack. */ + .stack : + { + . = ALIGN(4); + . = . + ${CIRCUITPY_DEFAULT_STACK_SIZE}; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/ports/atmel-samd/boards/cp32-m4/board.c b/ports/atmel-samd/boards/cp32-m4/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/cp32-m4/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/cp32-m4/mpconfigboard.h b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.h new file mode 100644 index 0000000000000..8664a6a0ecdce --- /dev/null +++ b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.h @@ -0,0 +1,23 @@ +#define MICROPY_HW_BOARD_NAME "CP32-M4" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define MICROPY_HW_APA102_MOSI (&pin_PA12) +#define MICROPY_HW_APA102_SCK (&pin_PA13) + + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11| PORT_PA12| PORT_PA13) +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB09) +#define DEFAULT_I2C_BUS_SDA (&pin_PB08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA22) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA23) +#define DEFAULT_SPI_BUS_MISO (&pin_PA21) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) diff --git a/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk new file mode 100644 index 0000000000000..6eb76c182fdcb --- /dev/null +++ b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x8021 +USB_PRODUCT = "CP32-M4" +USB_MANUFACTURER = "Nadda-Reel Company LLC" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" + +# No I2S on SAMD51G. +CIRCUITPY_AUDIOBUSIO = 0 diff --git a/ports/atmel-samd/boards/cp32-m4/pins.c b/ports/atmel-samd/boards/cp32-m4/pins.c new file mode 100644 index 0000000000000..1946c9d3ab9cb --- /dev/null +++ b/ports/atmel-samd/boards/cp32-m4/pins.c @@ -0,0 +1,51 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_P), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_N), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_STATUS_LED), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BACKLIGHT_PWM), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SW1_2), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW3_4), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW5), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW7), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW8), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW9), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SW10), MP_ROM_PTR(&pin_PB04) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_EXT_HDR3), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EXT_HDR4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EXT_HDR5), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EXT_SW6), MP_ROM_PTR(&pin_PA21) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SD0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD1), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD2), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD3), MP_ROM_PTR(&pin_PB14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_VSPI_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_VSPI_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_VSPI_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_VSPI_CS0), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_VSPI_CS1), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DC), MP_ROM_PTR(&pin_PA23) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA12) }, + + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/datalore_ip_m4/board.c b/ports/atmel-samd/boards/datalore_ip_m4/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/datalore_ip_m4/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.h b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.h new file mode 100644 index 0000000000000..f560cfa4933ee --- /dev/null +++ b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.h @@ -0,0 +1,37 @@ +#define MICROPY_HW_BOARD_NAME "TG-Boards' Datalore IP M4" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev F which is green + +#define MICROPY_HW_LED_TX (&pin_PA27) +#define MICROPY_HW_LED_RX (&pin_PB06) + +#define MICROPY_HW_LED_STATUS (&pin_PA16) + +#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11 | PORT_PB22) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk new file mode 100644 index 0000000000000..b1dad30eb09bf --- /dev/null +++ b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x4097 +USB_PID = 0x0001 +USB_PRODUCT = "Datalore IP M4" +USB_MANUFACTURER = "TG-Boards" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 3 +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JV_IQ, W25Q16JV_IM" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/datalore_ip_m4/pins.c b/ports/atmel-samd/boards/datalore_ip_m4/pins.c new file mode 100644 index 0000000000000..4eb26dd21bb5b --- /dev/null +++ b/ports/atmel-samd/boards/datalore_ip_m4/pins.c @@ -0,0 +1,46 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_PA16) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX),MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX),MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/datum_distance/board.c b/ports/atmel-samd/boards/datum_distance/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/datum_distance/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/datum_distance/mpconfigboard.h b/ports/atmel-samd/boards/datum_distance/mpconfigboard.h new file mode 100644 index 0000000000000..74706ba040d7b --- /dev/null +++ b/ports/atmel-samd/boards/datum_distance/mpconfigboard.h @@ -0,0 +1,25 @@ +// LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA17) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA17 + +#define MICROPY_HW_BOARD_NAME "J&J Studios datum-Distance" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk new file mode 100644 index 0000000000000..4f6c7ab82e6b6 --- /dev/null +++ b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x04D8 +USB_PID = 0xEE8C +USB_PRODUCT = "datum-Distance" +USB_MANUFACTURER = "J&J Studios LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_distance/pins.c b/ports/atmel-samd/boards/datum_distance/pins.c new file mode 100644 index 0000000000000..b29a859b64c5c --- /dev/null +++ b/ports/atmel-samd/boards/datum_distance/pins.c @@ -0,0 +1,27 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/datum_imu/board.c b/ports/atmel-samd/boards/datum_imu/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/datum_imu/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/datum_imu/mpconfigboard.h b/ports/atmel-samd/boards/datum_imu/mpconfigboard.h new file mode 100644 index 0000000000000..3cc218f9e0397 --- /dev/null +++ b/ports/atmel-samd/boards/datum_imu/mpconfigboard.h @@ -0,0 +1,25 @@ +// LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA17) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA17 + +#define MICROPY_HW_BOARD_NAME "J&J Studios datum-IMU" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk new file mode 100644 index 0000000000000..336a1b832f48b --- /dev/null +++ b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x04D8 +USB_PID = 0xEE8D +USB_PRODUCT = "datum-IMU" +USB_MANUFACTURER = "J&J Studios LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_imu/pins.c b/ports/atmel-samd/boards/datum_imu/pins.c new file mode 100644 index 0000000000000..237b5774ec04a --- /dev/null +++ b/ports/atmel-samd/boards/datum_imu/pins.c @@ -0,0 +1,29 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/datum_light/board.c b/ports/atmel-samd/boards/datum_light/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/datum_light/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/datum_light/mpconfigboard.h b/ports/atmel-samd/boards/datum_light/mpconfigboard.h new file mode 100644 index 0000000000000..33e80d06d0666 --- /dev/null +++ b/ports/atmel-samd/boards/datum_light/mpconfigboard.h @@ -0,0 +1,25 @@ +// LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA17) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA17 + +#define MICROPY_HW_BOARD_NAME "J&J Studios datum-Light" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk new file mode 100644 index 0000000000000..7ec2efcf96821 --- /dev/null +++ b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x04D8 +USB_PID = 0xEE8E +USB_PRODUCT = "datum-Light" +USB_MANUFACTURER = "J&J Studios LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_light/pins.c b/ports/atmel-samd/boards/datum_light/pins.c new file mode 100644 index 0000000000000..b29a859b64c5c --- /dev/null +++ b/ports/atmel-samd/boards/datum_light/pins.c @@ -0,0 +1,27 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/datum_weather/board.c b/ports/atmel-samd/boards/datum_weather/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/datum_weather/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/datum_weather/mpconfigboard.h b/ports/atmel-samd/boards/datum_weather/mpconfigboard.h new file mode 100644 index 0000000000000..328a6860c496a --- /dev/null +++ b/ports/atmel-samd/boards/datum_weather/mpconfigboard.h @@ -0,0 +1,25 @@ +// LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA17) +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA17 + +#define MICROPY_HW_BOARD_NAME "J&J Studios datum-Weather" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk new file mode 100644 index 0000000000000..d3ec1b0fddcfd --- /dev/null +++ b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x04D8 +USB_PID = 0xEE8F +USB_PRODUCT = "datum-Weather" +USB_MANUFACTURER = "J&J Studios LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_weather/pins.c b/ports/atmel-samd/boards/datum_weather/pins.c new file mode 100644 index 0000000000000..b29a859b64c5c --- /dev/null +++ b/ports/atmel-samd/boards/datum_weather/pins.c @@ -0,0 +1,27 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/escornabot_makech/board.c b/ports/atmel-samd/boards/escornabot_makech/board.c new file mode 100644 index 0000000000000..881e15e0c5ecc --- /dev/null +++ b/ports/atmel-samd/boards/escornabot_makech/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Andrés Sabas for Electronic Cats + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h new file mode 100644 index 0000000000000..3a984188fa8db --- /dev/null +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "Escornabot Makech" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA02) + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CALIBRATE_CRYSTALLESS 1 + +// Explanation of how a user got into safe mode. +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" + +#define DEFAULT_I2C_BUS_SCL (&pin_PA08) +#define DEFAULT_I2C_BUS_SDA (&pin_PA09) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA14) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA19) +#define DEFAULT_SPI_BUS_MISO (&pin_PA20) + +#define DEFAULT_UART_BUS_RX (&pin_PA01) +#define DEFAULT_UART_BUS_TX (&pin_PA00) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk new file mode 100644 index 0000000000000..dedd49ff71395 --- /dev/null +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x1209 +USB_PID = 0xBAB6 +USB_PRODUCT = "Escornabot Makech" +USB_MANUFACTURER = "Electronic Cats" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/escornabot_makech/pins.c b/ports/atmel-samd/boards/escornabot_makech/pins.c new file mode 100644 index 0000000000000..d43d254e7135a --- /dev/null +++ b/ports/atmel-samd/boards/escornabot_makech/pins.c @@ -0,0 +1,58 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + //LEDs + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA10) }, + + // Buttons + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA03) }, + + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, + + // Motors + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, + + // Buzzer + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA16) }, + + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA13) }, + + //UART + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA00) }, + + // I2C + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + // SPI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA13) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h index 8802d39d99d91..a0fde67ef6a51 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h @@ -1,14 +1,23 @@ // LEDs -//#define MICROPY_HW_LED_MSC PIN_PA17 // red +#define MICROPY_HW_LED_STATUS (&pin_PA17) + #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Adalogger" #define MICROPY_HW_MCU_NAME "samd21g18" -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA22) +#define DEFAULT_I2C_BUS_SDA (&pin_PA23) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk index debd3d775c835..134abf7236cce 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8015 USB_PRODUCT = "Feather M0 Adalogger" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/pins.c b/ports/atmel-samd/boards/feather_m0_adalogger/pins.c index a229b6bab1814..63d134952bbee 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/pins.c +++ b/ports/atmel-samd/boards/feather_m0_adalogger/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -25,10 +25,15 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_GREEN_LED), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h index 04cbc4ff8aa46..41a4bde2121c7 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h @@ -1,15 +1,23 @@ // LEDs -//#define MICROPY_HW_LED_MSC PIN_PA17 // red +#define MICROPY_HW_LED_STATUS (&pin_PA17) #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Basic" #define MICROPY_HW_MCU_NAME "samd21g18" -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk index 641611176f415..3643743509136 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8015 USB_PRODUCT = "Feather M0" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_basic/pins.c b/ports/atmel-samd/boards/feather_m0_basic/pins.c index c9119e77bc880..f15ec2e9d6512 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/pins.c +++ b/ports/atmel-samd/boards/feather_m0_basic/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -19,9 +19,14 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h index ef13bcafec748..5421dc88901e8 100644 --- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h @@ -1,49 +1,32 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Express" #define MICROPY_HW_MCU_NAME "samd21g18" +#define MICROPY_HW_LED_STATUS (&pin_PA17) + #define MICROPY_HW_NEOPIXEL (&pin_PA06) -// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. -#define SPI_FLASH_BAUDRATE (8000000) - -#define SPI_FLASH_MOSI_PIN PIN_PA08 -#define SPI_FLASH_MISO_PIN PIN_PA14 -#define SPI_FLASH_SCK_PIN PIN_PA09 -#define SPI_FLASH_CS_PIN PIN_PA13 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PA08D_SERCOM2_PAD0 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PA14C_SERCOM2_PAD2 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PA09D_SERCOM2_PAD1 -#define SPI_FLASH_SERCOM SERCOM2 -#define SPI_FLASH_SERCOM_INDEX 2 -#define SPI_FLASH_MOSI_PAD 0 -#define SPI_FLASH_MISO_PAD 2 -#define SPI_FLASH_SCK_PAD 1 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 0 -#define SPI_FLASH_DIPO 2 // same as MISO pad +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA14 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA13 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA06 | PORT_PA08 | PORT_PA09 | PORT_PA13 | PORT_PA14 | PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (PORT_PA06) #define MICROPY_PORT_B ( 0 ) #define MICROPY_PORT_C ( 0 ) -#include "external_flash/external_flash.h" - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define BOARD_HAS_CRYSTAL 1 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#include "external_flash/devices.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES S25FL216K, \ - GD25Q16C +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk index 909922dbe45cc..cdee7b7946b1b 100644 --- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk @@ -1,10 +1,19 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8023 USB_PRODUCT = "Feather M0 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_express/pins.c b/ports/atmel-samd/boards/feather_m0_express/pins.c index c5c70ee5dcdd5..3c4effbe3b706 100644 --- a/ports/atmel-samd/boards/feather_m0_express/pins.c +++ b/ports/atmel-samd/boards/feather_m0_express/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -19,10 +19,15 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/board.c b/ports/atmel-samd/boards/feather_m0_express_crickit/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h new file mode 100644 index 0000000000000..ee61e1d87d6d7 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h @@ -0,0 +1,36 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Express with Crickit libraries" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA17) + +#define MICROPY_HW_NEOPIXEL (&pin_PA06) + +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA14 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA13 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA06) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Not connected +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk new file mode 100644 index 0000000000000..d5e03b49d4c51 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk @@ -0,0 +1,27 @@ +USB_VID = 0x239A +USB_PID = 0x8023 +USB_PRODUCT = "Feather M0 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +# Make space for frozen libs +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_GAMEPAD = 0 +CFLAGS_INLINE_LIMIT = 50 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Crickit +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Motor +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_seesaw diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/pins.c b/ports/atmel-samd/boards/feather_m0_express_crickit/pins.c new file mode 100644 index 0000000000000..3c4effbe3b706 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/pins.c @@ -0,0 +1,33 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h index 33445940e65aa..2a319a4129404 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h @@ -1,15 +1,23 @@ // LEDs -//#define MICROPY_HW_LED_MSC PIN_PA17 // red +#define MICROPY_HW_LED_STATUS (&pin_PA17) #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 RFM69" #define MICROPY_HW_MCU_NAME "samd21g18" -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index bf4f567af1057..40a461b279894 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8015 USB_PRODUCT = "Feather M0 RFM69" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/pins.c b/ports/atmel-samd/boards/feather_m0_rfm69/pins.c index eb5f531e361b6..178f945ad4579 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/pins.c +++ b/ports/atmel-samd/boards/feather_m0_rfm69/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -19,6 +19,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, @@ -26,5 +28,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_RFM69_D0), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_RFM69_RST), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_RFM69_CS), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h index a2563cc9f1202..850033dbe431b 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h @@ -1,15 +1,23 @@ // LEDs -//#define MICROPY_HW_LED_MSC PIN_PA17 // red +#define MICROPY_HW_LED_STATUS (&pin_PA17) #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 RFM9x" #define MICROPY_HW_MCU_NAME "samd21g18" -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index fbc422eef233e..736161047a4f9 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8015 USB_PRODUCT = "Feather M0 RFM9x" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/pins.c b/ports/atmel-samd/boards/feather_m0_rfm9x/pins.c index 2e5d0a8e68cc1..977cb9fdfede5 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/pins.c +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -19,6 +19,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, @@ -26,5 +28,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_RFM9X_D0), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_RFM9X_RST), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_RFM9X_CS), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h index 883d7a2e535ba..2d9f88e2e1651 100644 --- a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h @@ -3,48 +3,30 @@ #define MICROPY_HW_BOARD_NAME "Hacked Feather M0 Express with 8Mbyte SPI flash" #define MICROPY_HW_MCU_NAME "samd21g18" +#define MICROPY_HW_LED_STATUS (&pin_PA17) + #define MICROPY_HW_NEOPIXEL (&pin_PA06) -// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. -#define SPI_FLASH_BAUDRATE (8000000) - -#define SPI_FLASH_MOSI_PIN PIN_PA08 -#define SPI_FLASH_MISO_PIN PIN_PA14 -#define SPI_FLASH_SCK_PIN PIN_PA09 -#define SPI_FLASH_CS_PIN PIN_PA13 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PA08D_SERCOM2_PAD0 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PA14C_SERCOM2_PAD2 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PA09D_SERCOM2_PAD1 -#define SPI_FLASH_SERCOM SERCOM2 -#define SPI_FLASH_SERCOM_INDEX 2 -#define SPI_FLASH_MOSI_PAD 0 -#define SPI_FLASH_MISO_PAD 2 -#define SPI_FLASH_SCK_PAD 1 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 0 -#define SPI_FLASH_DIPO 2 // same as MISO pad +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA14 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA13 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA06 | PORT_PA08 | PORT_PA09 | PORT_PA13 | PORT_PA14 | PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (PORT_PA06) #define MICROPY_PORT_B ( 0 ) #define MICROPY_PORT_C ( 0 ) -#include "external_flash/external_flash.h" - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 - -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#include "external_flash/devices.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define EXTERNAL_FLASH_DEVICE_COUNT 1 -#define EXTERNAL_FLASH_DEVICES S25FL064L +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk index 340421f5004f4..cb13adb76d60c 100644 --- a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk @@ -1,11 +1,19 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8023 USB_PRODUCT = "Feather M0 Supersized" USB_MANUFACTURER = "Dave Astels" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "S25FL064L" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_supersized/pins.c b/ports/atmel-samd/boards/feather_m0_supersized/pins.c index c5c70ee5dcdd5..3c4effbe3b706 100644 --- a/ports/atmel-samd/boards/feather_m0_supersized/pins.c +++ b/ports/atmel-samd/boards/feather_m0_supersized/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -19,10 +19,15 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h index bd56a7bdfaad7..ba16d17ee443b 100644 --- a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h @@ -1,34 +1,35 @@ -#define MICROPY_HW_BOARD_NAME "Feather M4 Express" +#define MICROPY_HW_BOARD_NAME "Adafruit Feather M4 Express" #define MICROPY_HW_MCU_NAME "samd51j19" #define CIRCUITPY_MCU_FAMILY samd51 -// This is for Rev C which is green +// Rev E -#define MICROPY_HW_NEOPIXEL (&pin_PB23) +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB03) // These are pins not to reset. -// QSPI Data pins and TX LED -#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09) -// RX LED, QSPI CS, QSPI SCK and NeoPixel pin -#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11 | PORT_PB23 ) +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define AUTORESET_DELAY_MS 500 - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define EXTERNAL_FLASH_QSPI_DUAL -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define BOARD_HAS_CRYSTAL 1 -#include "external_flash/devices.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES W25Q16FW, GD25Q16C +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) -#define EXTERNAL_FLASH_QSPI_DUAL +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk index 61620ffa28aa0..38dd47758137c 100644 --- a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk @@ -1,10 +1,12 @@ -LD_FILE = boards/samd51x19-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8026 USB_PRODUCT = "Feather M4 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -QSPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/feather_m4_express/pins.c b/ports/atmel-samd/boards/feather_m4_express/pins.c index c161e736edc15..61bd8abadfdb5 100644 --- a/ports/atmel-samd/boards/feather_m4_express/pins.c +++ b/ports/atmel-samd/boards/feather_m4_express/pins.c @@ -1,30 +1,57 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB22) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/board.c b/ports/atmel-samd/boards/feather_radiofruit_zigbee/board.c new file mode 100755 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h new file mode 100755 index 0000000000000..2afe35817806f --- /dev/null +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Feather RadioFruit Zigbee" +#define MICROPY_HW_MCU_NAME "samr21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA27) +#define MICROPY_HW_NEOPIXEL (&pin_PA22) + +#define SPI_FLASH_MOSI_PIN &pin_PA31 +#define SPI_FLASH_MISO_PIN &pin_PA30 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA28 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA22) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB23) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB22) +#define DEFAULT_SPI_BUS_MISO (&pin_PA23) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk new file mode 100755 index 0000000000000..05c305b1a2c84 --- /dev/null +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x8023 +USB_PRODUCT = "Feather RadioFruit Zigbee" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMR21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +# No I2S on SAMR21G +CIRCUITPY_AUDIOBUSIO = 0 +# No DAC on SAMR21G +CIRCUITPY_AUDIOIO = 0 diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/pins.c b/ports/atmel-samd/boards/feather_radiofruit_zigbee/pins.c new file mode 100755 index 0000000000000..7133978784c51 --- /dev/null +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // Internally connected within the package + { MP_ROM_QSTR(MP_QSTR_DIG3), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_DIG4), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SLP_TR), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_IRQ), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_DIG1), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_DIG2), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_RF_MOSI), MP_ROM_PTR(&pin_PB30) }, + { MP_ROM_QSTR(MP_QSTR_SEL), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_CLKM), MP_ROM_PTR(&pin_PC16) }, + { MP_ROM_QSTR(MP_QSTR_RF_SCK), MP_ROM_PTR(&pin_PC18) }, + { MP_ROM_QSTR(MP_QSTR_RF_MISO), MP_ROM_PTR(&pin_PC19) }, + { MP_ROM_QSTR(MP_QSTR_RESETN), MP_ROM_PTR(&pin_PB15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h index 6457d481f379b..b6d8f946bcf14 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h @@ -1,17 +1,65 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Gemma M0" #define MICROPY_HW_MCU_NAME "samd21e18" +#define MICROPY_HW_LED_STATUS (&pin_PA23) + #define MICROPY_HW_APA102_MOSI (&pin_PA00) #define MICROPY_HW_APA102_SCK (&pin_PA01) -// #define CIRCUITPY_BITBANG_APA102 - #define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA24 | PORT_PA25) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_I2C_BUS_SCL (&pin_PA05) +#define DEFAULT_I2C_BUS_SDA (&pin_PA04) -#include "internal_flash.h" +#define DEFAULT_UART_BUS_RX (&pin_PA05) +#define DEFAULT_UART_BUS_TX (&pin_PA04) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA08 1 +#define IGNORE_PIN_PA09 1 +#define IGNORE_PIN_PA10 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA16 1 +#define IGNORE_PIN_PA17 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk index a406e8f58fc64..d649386328da0 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk @@ -1,10 +1,13 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x801D USB_PRODUCT = "Gemma M0" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/gemma_m0/pins.c b/ports/atmel-samd/boards/gemma_m0/pins.c index 5d3bedca0e40a..9aecd5d84e32e 100644 --- a/ports/atmel-samd/boards/gemma_m0/pins.c +++ b/ports/atmel-samd/boards/gemma_m0/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, // pad 1 @@ -19,5 +19,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/board.c b/ports/atmel-samd/boards/grandcentral_m4_express/board.c new file mode 100644 index 0000000000000..7599f02b8efee --- /dev/null +++ b/ports/atmel-samd/boards/grandcentral_m4_express/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h new file mode 100644 index 0000000000000..bab0550148086 --- /dev/null +++ b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h @@ -0,0 +1,38 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Grand Central M4 Express" +#define MICROPY_HW_MCU_NAME "samd51p20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B which is green and has the SD card slot at the edge of the board. + +#define MICROPY_HW_LED_STATUS (&pin_PB01) + +#define MICROPY_HW_LED_TX &(pin_PC30) +#define MICROPY_HW_LED_RX &(pin_PC31) + +#define MICROPY_HW_NEOPIXEL (&pin_PC24) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 ) +// NeoPixel pin, RX LED, TX LED +#define MICROPY_PORT_C ( PORT_PC24 | PORT_PC30 | PORT_PC31 ) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB21) +#define DEFAULT_I2C_BUS_SDA (&pin_PB20) + +#define DEFAULT_SPI_BUS_SCK (&pin_PD09) +#define DEFAULT_SPI_BUS_MOSI (&pin_PD08) +#define DEFAULT_SPI_BUS_MISO (&pin_PD11) + +#define DEFAULT_UART_BUS_RX (&pin_PB25) +#define DEFAULT_UART_BUS_TX (&pin_PB24) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk new file mode 100644 index 0000000000000..ab81ec5a29c6d --- /dev/null +++ b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8032 +USB_PRODUCT = "Grand Central M4 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51P20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/pins.c b/ports/atmel-samd/boards/grandcentral_m4_express/pins.c new file mode 100644 index 0000000000000..6b09c62bf38c6 --- /dev/null +++ b/ports/atmel-samd/boards/grandcentral_m4_express/pins.c @@ -0,0 +1,133 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_PA03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PC00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PC03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_PA07) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB25) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB25) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB24) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB24) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PC18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PC19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PD20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PD21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_TX3), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX3), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PC22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PC22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PC23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PC23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PB20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_PB21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB21) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_PD12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PC17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_PC17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PC16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PC16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_DEN1), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_DEN2), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_CLK), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_PB19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_XCLK), MP_ROM_PTR(&pin_PB19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D7), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D6), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D5), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D2), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D9), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D8), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_PC13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D11), MP_ROM_PTR(&pin_PC13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_PC12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D10), MP_ROM_PTR(&pin_PC12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_PC15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D13), MP_ROM_PTR(&pin_PC15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_PC14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D12), MP_ROM_PTR(&pin_PC14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_PC11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D45), MP_ROM_PTR(&pin_PC10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D46), MP_ROM_PTR(&pin_PC06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D47), MP_ROM_PTR(&pin_PC07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_PC04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D49), MP_ROM_PTR(&pin_PC05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D50), MP_ROM_PTR(&pin_PD11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PD11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D51), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D52), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D53), MP_ROM_PTR(&pin_PD10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PD10) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_PB26) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SCK), MP_ROM_PTR(&pin_PB27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PB28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_PB29) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CARD_DETECT), MP_ROM_PTR(&pin_PB31) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PC24) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX), MP_ROM_PTR(&pin_PC31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX), MP_ROM_PTR(&pin_PC30) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/hallowing_m0_express/board.c b/ports/atmel-samd/boards/hallowing_m0_express/board.c new file mode 100644 index 0000000000000..0b44bd4bb16d0 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m0_express/board.c @@ -0,0 +1,122 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +#include "shared-bindings/board/__init__.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "shared-bindings/busio/SPI.h" + +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x2a, 0, // _INVOFF + 0x36, 1, 0x18, // _MADCTL bottom to top refresh + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 16, 0x02, 0x1c, 0x07, 0x12, // _GMCTRP1 Gamma + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, + 0xe1, 16, 0x03, 0x1d, 0x07, 0x06, // _GMCTRN1 + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, + 0x2a, 3, 0x02, 0x00, 0x81, // _CASET XSTART = 2, XEND = 129 + 0x2b, 3, 0x02, 0x00, 0x81, // _RASET XSTART = 2, XEND = 129 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + +void board_init(void) { + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + busio_spi_obj_t *spi = common_hal_board_create_spi(); + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PA28, // Command or data + &pin_PA01, // Chip select + &pin_PA27, // Reset + 12000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 128, // Width + 128, // Height + 2, // column start + 1, // row start + 0, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA00, + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h new file mode 100644 index 0000000000000..e5ac346daf4e5 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "HalloWing M0 Express" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PA12) + +#define SPI_FLASH_MOSI_PIN &pin_PB10 +#define SPI_FLASH_MISO_PIN &pin_PA13 +#define SPI_FLASH_SCK_PIN &pin_PB11 +#define SPI_FLASH_CS_PIN &pin_PA07 + +// These are pins not to reset. +// NeoPixel and for the display: Reset, Command or data, and Chip select +#define MICROPY_PORT_A ( PORT_PA01 | PORT_PA12 | PORT_PA27 | PORT_PA28) +// Data and Clock for the display +#define MICROPY_PORT_B ( PORT_PB22 | PORT_PB23 ) +#define MICROPY_PORT_C ( 0 ) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB23) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB22) +#define DEFAULT_SPI_BUS_MISO (&pin_PB03) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// SWD is only available on the test pads so skip the pin objects. +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk new file mode 100644 index 0000000000000..af4a5a2932a47 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk @@ -0,0 +1,29 @@ +USB_VID = 0x239A +USB_PID = 0xD1ED +USB_PRODUCT = "HalloWing M0 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +LONGINT_IMPL = MPZ + +# To keep the build small +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_RTC = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/hallowing_m0_express/pins.c b/ports/atmel-samd/boards/hallowing_m0_express/pins.c new file mode 100644 index 0000000000000..3e670a676f2c9 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m0_express/pins.c @@ -0,0 +1,67 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_EXTERNAL_NEOPIXEL), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA12) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SENSE), MP_ROM_PTR(&pin_PA11) }, + + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/hallowing_m4_express/board.c b/ports/atmel-samd/boards/hallowing_m4_express/board.c new file mode 100644 index 0000000000000..5dbdd499afd59 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m4_express/board.c @@ -0,0 +1,102 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PA01, &pin_PA00, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB31, // TFT_DC Command or data + &pin_PA27, // TFT_CS Chip select + &pin_PB30, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 240, // Width (after rotation) + 240, // Height (after rotation) + 0, // column start + 0, // row start + 180, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PB14, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.h new file mode 100644 index 0000000000000..38f78da4d3e72 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Hallowing M4 Express" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// Rev C + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB16) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// NeoPixel pin, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB16 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA22) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB13) +#define DEFAULT_UART_BUS_TX (&pin_PB12) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.mk new file mode 100644 index 0000000000000..4bf1552884aa3 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m4_express/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x804A +USB_PRODUCT = "Hallowing M4 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q64C +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/hallowing_m4_express/pins.c b/ports/atmel-samd/boards/hallowing_m4_express/pins.c new file mode 100644 index 0000000000000..9365ea3cafbb6 --- /dev/null +++ b/ports/atmel-samd/boards/hallowing_m4_express/pins.c @@ -0,0 +1,71 @@ +#include "shared-bindings/board/__init__.h" + +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PB30) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_EXTERNAL_NEOPIXEL), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SENSE), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_CAP_PIN), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h index 675b9a30db6c3..db5e2a4df2a1e 100644 --- a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h @@ -1,48 +1,35 @@ -#define MICROPY_HW_BOARD_NAME "Adafruit Itsy Bitsy M0 Express" +#define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy M0 Express" #define MICROPY_HW_MCU_NAME "samd21g18" -#define CIRCUITPY_BITBANG_APA102 +#define MICROPY_HW_LED_STATUS (&pin_PA17) + #define MICROPY_HW_APA102_MOSI (&pin_PA01) #define MICROPY_HW_APA102_SCK (&pin_PA00) -// Saleae reads 12mhz which is the limit even though we set it to the safer 8mhz. -#define SPI_FLASH_BAUDRATE (8000000) - -#define SPI_FLASH_MOSI_PIN PIN_PB22 -#define SPI_FLASH_MISO_PIN PIN_PB03 -#define SPI_FLASH_SCK_PIN PIN_PB23 -#define SPI_FLASH_CS_PIN PIN_PA27 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PB22D_SERCOM5_PAD2 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PB03D_SERCOM5_PAD1 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PB23D_SERCOM5_PAD3 -#define SPI_FLASH_SERCOM SERCOM5 -#define SPI_FLASH_SERCOM_INDEX 5 -#define SPI_FLASH_MOSI_PAD 2 -#define SPI_FLASH_MISO_PAD 1 -#define SPI_FLASH_SCK_PAD 3 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 1 -#define SPI_FLASH_DIPO 1 // same as MISO pad +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA27 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA27 | PORT_PA24 | PORT_PA25) -#define MICROPY_PORT_B (PORT_PB22 | PORT_PB23 | PORT_PB03 ) +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#include "external_flash/devices.h" +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES W25Q16FW, \ - GD25Q16C +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 -#include "external_flash/external_flash.h" +// Not connected +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk index 0fb0e38ed46a2..4d516c75b664e 100644 --- a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk @@ -1,11 +1,22 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld USB_VID = 0x239A USB_PID = 0x8012 -USB_PRODUCT = "Itsy Bitsy M0 Express" +USB_PRODUCT = "ItsyBitsy M0 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q16FW, GD25Q16C" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANG_APA102 = 1 + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_RTC = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/itsybitsy_m0_express/pins.c b/ports/atmel-samd/boards/itsybitsy_m0_express/pins.c index b70bb6a76c6e5..1b0e5d09ebe90 100644 --- a/ports/atmel-samd/boards/itsybitsy_m0_express/pins.c +++ b/ports/atmel-samd/boards/itsybitsy_m0_express/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, @@ -38,5 +38,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/board.c b/ports/atmel-samd/boards/itsybitsy_m4_express/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/itsybitsy_m4_express/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h new file mode 100644 index 0000000000000..98920b54f2395 --- /dev/null +++ b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy M4 Express" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B +#define MICROPY_HW_LED_STATUS (&pin_PA22) + +#define MICROPY_HW_APA102_MOSI (&pin_PB03) +#define MICROPY_HW_APA102_SCK (&pin_PB02) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB02 | PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA01) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA00) +#define DEFAULT_SPI_BUS_MISO (&pin_PB23) + +#define DEFAULT_UART_BUS_RX (&pin_PA16) +#define DEFAULT_UART_BUS_TX (&pin_PA17) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk new file mode 100644 index 0000000000000..eb02d3c2705f9 --- /dev/null +++ b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x802C +USB_PRODUCT = "ItsyBitsy M4 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 + +CIRCUITPY_BITBANG_APA102 = 1 diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/pins.c b/ports/atmel-samd/boards/itsybitsy_m4_express/pins.c new file mode 100644 index 0000000000000..8cd2f44f89396 --- /dev/null +++ b/ports/atmel-samd/boards/itsybitsy_m4_express/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/kicksat-sprite/board.c b/ports/atmel-samd/boards/kicksat-sprite/board.c new file mode 100644 index 0000000000000..fc53f396753fa --- /dev/null +++ b/ports/atmel-samd/boards/kicksat-sprite/board.c @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include + +#include "boards/board.h" +#include "py/mpconfig.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} \ No newline at end of file diff --git a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h new file mode 100644 index 0000000000000..4d911ad64c1e7 --- /dev/null +++ b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h @@ -0,0 +1,26 @@ + +#define MICROPY_HW_BOARD_NAME "Sprite_v2b" +#define MICROPY_HW_MCU_NAME "samd51G19" +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PB03) + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA07) +#define DEFAULT_SPI_BUS_MISO (&pin_PA04) + +#define DEFAULT_UART_BUS_TX (&pin_PB09) +#define DEFAULT_UART_BUS_RX (&pin_PB08) + +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk new file mode 100644 index 0000000000000..5429bcf86ef63 --- /dev/null +++ b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk @@ -0,0 +1,19 @@ +USB_VID = 0x04D8 +USB_PID = 0xED94 +USB_PRODUCT = "kicksat-sprite" +USB_MANUFACTURER = "maholli" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# Not needed. +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_PS2IO = 0 +CIRCUITPY_AUDIOMP3 = 0 + +CIRCUITPY_ULAB = 0 diff --git a/ports/atmel-samd/boards/kicksat-sprite/pins.c b/ports/atmel-samd/boards/kicksat-sprite/pins.c new file mode 100644 index 0000000000000..03af22ff26b69 --- /dev/null +++ b/ports/atmel-samd/boards/kicksat-sprite/pins.c @@ -0,0 +1,38 @@ +#include "shared-bindings/board/__init__.h" +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_radioCS), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_WAKE), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_SHDWN), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PWDWN), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_TST), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_FSYNC), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_VCLK), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_FSYNC), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_MD), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MC), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, + + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); \ No newline at end of file diff --git a/ports/atmel-samd/boards/meowmeow/board.c b/ports/atmel-samd/boards/meowmeow/board.c new file mode 100644 index 0000000000000..881e15e0c5ecc --- /dev/null +++ b/ports/atmel-samd/boards/meowmeow/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Andrés Sabas for Electronic Cats + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h new file mode 100644 index 0000000000000..80d3678630a61 --- /dev/null +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "Meow Meow" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PB23) + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CALIBRATE_CRYSTALLESS 1 + +// Explanation of how a user got into safe mode. +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" + +#define DEFAULT_I2C_BUS_SCL (&pin_PA01) +#define DEFAULT_I2C_BUS_SDA (&pin_PA00) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA15) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA14) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk b/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk new file mode 100644 index 0000000000000..4b452ecbfe791 --- /dev/null +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x1209 +USB_PID = 0xBAB1 +USB_PRODUCT = "Meow Meow" +USB_MANUFACTURER = "Electronic Cats" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/meowmeow/pins.c b/ports/atmel-samd/boards/meowmeow/pins.c new file mode 100644 index 0000000000000..41d122d87492e --- /dev/null +++ b/ports/atmel-samd/boards/meowmeow/pins.c @@ -0,0 +1,41 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h index c8ceaa386bd9e..04565feb40891 100644 --- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h @@ -1,50 +1,38 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Metro M0 Express" #define MICROPY_HW_MCU_NAME "samd21g18" -#define MICROPY_HW_LED_TX PIN_PA27 -//#define MICROPY_HW_LED_RX PIN_PA31 +#define MICROPY_HW_LED_STATUS (&pin_PA17) +#define MICROPY_HW_LED_TX &pin_PA27 +// Comment this out if you have trouble connecting over SWD. It's one of the SWD pins. +#define MICROPY_HW_LED_RX &pin_PA31 #define MICROPY_HW_NEOPIXEL (&pin_PA30) // Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. #define SPI_FLASH_BAUDRATE (8000000) -#define SPI_FLASH_MOSI_PIN PIN_PB22 -#define SPI_FLASH_MISO_PIN PIN_PB03 -#define SPI_FLASH_SCK_PIN PIN_PB23 -#define SPI_FLASH_CS_PIN PIN_PA13 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PB22D_SERCOM5_PAD2 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PB03D_SERCOM5_PAD1 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PB23D_SERCOM5_PAD3 -#define SPI_FLASH_SERCOM SERCOM5 -#define SPI_FLASH_SERCOM_INDEX 5 -#define SPI_FLASH_MOSI_PAD 2 -#define SPI_FLASH_MISO_PAD 1 -#define SPI_FLASH_SCK_PAD 3 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 1 -#define SPI_FLASH_DIPO 1 // same as MISO pad +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA13 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA13 |PORT_PA24 | PORT_PA25 | PORT_PA27 | PORT_PA30 | PORT_PA31) -#define MICROPY_PORT_B (PORT_PB03 | PORT_PB22 | PORT_PB23) +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define BOARD_HAS_CRYSTAL 1 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) -#include "external_flash/devices.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES S25FL216K, \ - GD25Q16C +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk index 79d60380de7b7..b52b1343fb9d9 100644 --- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk @@ -1,10 +1,18 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8014 USB_PRODUCT = "Metro M0 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/metro_m0_express/pins.c b/ports/atmel-samd/boards/metro_m0_express/pins.c index 58510faabb62b..c11fac5ce68e1 100644 --- a/ports/atmel-samd/boards/metro_m0_express/pins.c +++ b/ports/atmel-samd/boards/metro_m0_express/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, @@ -29,5 +29,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/board.c b/ports/atmel-samd/boards/metro_m4_airlift_lite/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.h b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.h new file mode 100644 index 0000000000000..9fa4018046fef --- /dev/null +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Metro M4 Airlift Lite" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_TX (&pin_PB07) +#define MICROPY_HW_LED_RX (&pin_PB06) + +#define MICROPY_HW_LED_STATUS (&pin_PA16) + +#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11 | PORT_PB22) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk new file mode 100644 index 0000000000000..4895cda77b043 --- /dev/null +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8038 +USB_PRODUCT = "Metro M4 Airlift Lite" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 3 +EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/pins.c b/ports/atmel-samd/boards/metro_m4_airlift_lite/pins.c new file mode 100644 index 0000000000000..4e90870c49e3a --- /dev/null +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_PA16) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA07) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX),MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX),MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/metro_m4_express/board.c b/ports/atmel-samd/boards/metro_m4_express/board.c index a98385d295b8a..0f60736a24006 100644 --- a/ports/atmel-samd/boards/metro_m4_express/board.c +++ b/ports/atmel-samd/boards/metro_m4_express/board.c @@ -29,13 +29,6 @@ #include "hal/include/hal_gpio.h" void board_init(void) { - gpio_set_pin_function(MICROPY_HW_LED_TX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_TX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_TX, true); - - gpio_set_pin_function(MICROPY_HW_LED_RX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_RX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_RX, true); } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h index e2b7f9982eb81..7f8dbb1d2ba54 100644 --- a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h @@ -1,35 +1,37 @@ -#define MICROPY_HW_BOARD_NAME "Metro M4 Express" +#define MICROPY_HW_BOARD_NAME "Adafruit Metro M4 Express" #define MICROPY_HW_MCU_NAME "samd51j19" #define CIRCUITPY_MCU_FAMILY samd51 // This is for Rev F which is green -#define MICROPY_HW_LED_TX PIN_PA27 -#define MICROPY_HW_LED_RX PIN_PB06 +#define MICROPY_HW_LED_TX (&pin_PA27) +#define MICROPY_HW_LED_RX (&pin_PB06) + +#define MICROPY_HW_LED_STATUS (&pin_PA16) #define MICROPY_HW_NEOPIXEL (&pin_PB22) // These are pins not to reset. -// QSPI Data pins and TX LED -#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 | PORT_PA27) -// RX LED, QSPI CS, QSPI SCK and NeoPixel pin -#define MICROPY_PORT_B ( PORT_PB06 | PORT_PB10 | PORT_PB11 | PORT_PB22) +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11 | PORT_PB22) #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define AUTORESET_DELAY_MS 500 - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define BOARD_HAS_CRYSTAL 1 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) -#include "external_flash/devices.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) -#define EXTERNAL_FLASH_DEVICE_COUNT 3 -#define EXTERNAL_FLASH_DEVICES S25FL116K, S25FL216K, GD25Q16C +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk index 1d59ed9664723..c2603002cd700 100644 --- a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk @@ -1,10 +1,14 @@ -LD_FILE = boards/samd51x19-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8021 USB_PRODUCT = "Metro M4 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -QSPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 3 +EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" +LONGINT_IMPL = MPZ + +CIRCUITPY__EVE = 1 diff --git a/ports/atmel-samd/boards/metro_m4_express/pins.c b/ports/atmel-samd/boards/metro_m4_express/pins.c index 32ecdf4923a09..4eb26dd21bb5b 100644 --- a/ports/atmel-samd/boards/metro_m4_express/pins.c +++ b/ports/atmel-samd/boards/metro_m4_express/pins.c @@ -1,45 +1,46 @@ -#include "samd51_pins.h" +#include "shared-bindings/board/__init__.h" // This mapping only includes functional names because pins broken // out on connectors are labeled with their MCU name available from // microcontroller.pin. -STATIC const mp_map_elem_t board_global_dict_table[] = { - { MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A1), (mp_obj_t)&pin_PA05 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A2), (mp_obj_t)&pin_PA06 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A3), (mp_obj_t)&pin_PA04 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A4), (mp_obj_t)&pin_PB08 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A5), (mp_obj_t)&pin_PB09 }, +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB09) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D0), (mp_obj_t)&pin_PA23 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_RX), (mp_obj_t)&pin_PA23 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D1), (mp_obj_t)&pin_PA22 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_TX), (mp_obj_t)&pin_PA22 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D2), (mp_obj_t)&pin_PB17 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D3), (mp_obj_t)&pin_PB16 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D4), (mp_obj_t)&pin_PB13 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PB14 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PB15 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D7), (mp_obj_t)&pin_PB12 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D8), (mp_obj_t)&pin_PA21 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PA20 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PA18 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D11), (mp_obj_t)&pin_PA19 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D12), (mp_obj_t)&pin_PA17 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D13), (mp_obj_t)&pin_PA16 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_PA16) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), (mp_obj_t)&pin_PB02 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), (mp_obj_t)&pin_PB03 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_AREF), (mp_obj_t)&pin_PA03 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), (mp_obj_t)&pin_PB22 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), (mp_obj_t)&pin_PA13 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), (mp_obj_t)&pin_PA12 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), (mp_obj_t)&pin_PA14 }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX), (mp_obj_t)&pin_PB06 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX), (mp_obj_t)&pin_PA27 }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX),MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX),MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/metro_m4_express_revb/board.c b/ports/atmel-samd/boards/metro_m4_express_revb/board.c deleted file mode 100644 index a98385d295b8a..0000000000000 --- a/ports/atmel-samd/boards/metro_m4_express_revb/board.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" -#include "hal/include/hal_gpio.h" - -void board_init(void) { - gpio_set_pin_function(MICROPY_HW_LED_TX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_TX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_TX, true); - - gpio_set_pin_function(MICROPY_HW_LED_RX, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_RX, GPIO_DIRECTION_OUT); - gpio_set_pin_level(MICROPY_HW_LED_RX, true); -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { -} diff --git a/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.h b/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.h deleted file mode 100644 index 7af9767caa8ac..0000000000000 --- a/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.h +++ /dev/null @@ -1,63 +0,0 @@ -// This is for Rev B which a larger run was done and sent to Adafruit community -// members. - -#define MICROPY_HW_BOARD_NAME "Metro M4 Express Rev B (Black)" -#define MICROPY_HW_MCU_NAME "samd51j19" - -#define CIRCUITPY_MCU_FAMILY samd51 - -#define MICROPY_HW_LED_TX PIN_PA27 -#define MICROPY_HW_LED_RX PIN_PB06 - -#define MICROPY_HW_NEOPIXEL (&pin_PB17) - -#define SPI_FLASH_BAUDRATE (60000000) - -// Rev B: single channel SPI -// Rev C will be QSPI -#define SPI_FLASH_MOSI_PIN PIN_PB08 -#define SPI_FLASH_MISO_PIN PIN_PB11 -#define SPI_FLASH_SCK_PIN PIN_PB09 -#define SPI_FLASH_CS_PIN PIN_PB10 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PB08D_SERCOM4_PAD0 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PB11D_SERCOM4_PAD3 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PB09D_SERCOM4_PAD1 -#define SPI_FLASH_SERCOM SERCOM4 -#define SPI_FLASH_SERCOM_INDEX 4 -#define SPI_FLASH_MOSI_PAD 0 -#define SPI_FLASH_MISO_PAD 3 -#define SPI_FLASH_SCK_PAD 1 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 0 -#define SPI_FLASH_DIPO 3 // same as MISO pad - -// These are pins not to reset. -// Pin for TX LED -#define MICROPY_PORT_A (PORT_PA27) -// Pins for RX LED, SPI flash and neopixel -#define MICROPY_PORT_B (PORT_PB06 | PORT_PB08 | PORT_PB09 | PORT_PB10 | PORT_PB11 | PORT_PB17) -#define MICROPY_PORT_C (0) -#define MICROPY_PORT_D (0) - -#define AUTORESET_DELAY_MS 500 - -#include "external_flash/external_flash.h" - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code -// #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 - -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) - -#include "external_flash/devices.h" - -#define EXTERNAL_FLASH_DEVICE_COUNT 2 -#define EXTERNAL_FLASH_DEVICES S25FL216K, \ - GD25Q16C - -#include "external_flash/external_flash.h" diff --git a/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.mk deleted file mode 100644 index a3d6e252215a2..0000000000000 --- a/ports/atmel-samd/boards/metro_m4_express_revb/mpconfigboard.mk +++ /dev/null @@ -1,10 +0,0 @@ -LD_FILE = boards/samd51x19-bootloader-external-flash.ld -USB_VID = 0x239A -USB_PID = 0x8021 -USB_PRODUCT = "Metro M4 Express Rev B (Black)" -USB_MANUFACTURER = "Adafruit Industries LLC" - -SPI_FLASH_FILESYSTEM = 1 - -CHIP_VARIANT = SAMD51J19A -CHIP_FAMILY = samd51 diff --git a/ports/atmel-samd/boards/metro_m4_express_revb/pins.c b/ports/atmel-samd/boards/metro_m4_express_revb/pins.c deleted file mode 100644 index a18906f73d4c1..0000000000000 --- a/ports/atmel-samd/boards/metro_m4_express_revb/pins.c +++ /dev/null @@ -1,44 +0,0 @@ -#include "samd51_pins.h" - -// This mapping only includes functional names because pins broken -// out on connectors are labeled with their MCU name available from -// microcontroller.pin. -STATIC const mp_map_elem_t board_global_dict_table[] = { - { MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A1), (mp_obj_t)&pin_PA05 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A2), (mp_obj_t)&pin_PA06 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A3), (mp_obj_t)&pin_PA04 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A4), (mp_obj_t)&pin_PA11 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_A5), (mp_obj_t)&pin_PA07 }, - - - { MP_OBJ_NEW_QSTR(MP_QSTR_D0), (mp_obj_t)&pin_PA23 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_RX), (mp_obj_t)&pin_PA23 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D1), (mp_obj_t)&pin_PA22 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_TX), (mp_obj_t)&pin_PA22 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D2), (mp_obj_t)&pin_PA08 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D3), (mp_obj_t)&pin_PA10 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D4), (mp_obj_t)&pin_PB12 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PB14 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PB15 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D7), (mp_obj_t)&pin_PA14 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D8), (mp_obj_t)&pin_PA16 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PA17 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PA18 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D11), (mp_obj_t)&pin_PA19 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D12), (mp_obj_t)&pin_PA20 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D13), (mp_obj_t)&pin_PA21 }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), (mp_obj_t)&pin_PB02 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), (mp_obj_t)&pin_PB03 }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), (mp_obj_t)&pin_PB17 }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), (mp_obj_t)&pin_PA13 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), (mp_obj_t)&pin_PA12 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), (mp_obj_t)&pin_PA15 }, - - { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX), (mp_obj_t)&pin_PB06 }, - { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX), (mp_obj_t)&pin_PA27 }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/mini_sam_m4/board.c b/ports/atmel-samd/boards/mini_sam_m4/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/mini_sam_m4/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h new file mode 100644 index 0000000000000..08ab7e16b990e --- /dev/null +++ b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "Mini SAM M4" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA15) + +// RGB Status LED Pins +#define MICROPY_HW_APA102_MOSI (&pin_PB03) +#define MICROPY_HW_APA102_SCK (&pin_PB02) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// RGB Status LED pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB02 | PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA01) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB22) +#define DEFAULT_SPI_BUS_MISO (&pin_PB23) + +#define DEFAULT_UART_BUS_RX (&pin_PA16) +#define DEFAULT_UART_BUS_TX (&pin_PA17) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk new file mode 100644 index 0000000000000..ae2a1e9733f5b --- /dev/null +++ b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x1209 +USB_PID = 0x2017 +USB_PRODUCT = "Mini SAM M4" +USB_MANUFACTURER = "Benjamin Shockley" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q16JV_IM" +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 + +CIRCUITPY_BITBANG_APA102 = 1 diff --git a/ports/atmel-samd/boards/mini_sam_m4/pins.c b/ports/atmel-samd/boards/mini_sam_m4/pins.c new file mode 100644 index 0000000000000..b1d8d5325cc2f --- /dev/null +++ b/ports/atmel-samd/boards/mini_sam_m4/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_PA03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA15) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/monster_m4sk/board.c b/ports/atmel-samd/boards/monster_m4sk/board.c new file mode 100644 index 0000000000000..684639c3097ae --- /dev/null +++ b/ports/atmel-samd/boards/monster_m4sk/board.c @@ -0,0 +1,103 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x38, 0, // Idle mode off + 0x21, 0, // _INVON + 0x13, 0, // _NORON + 0x29, 0 | DELAY, 255 // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PA07, // TFT_DC Command or data + &pin_PA06, // TFT_CS Chip select + &pin_PA04, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 240, // Width (after rotation) + 240, // Height (after rotation) + 0, // column start + 0, // row start + 180, // rotation + 16, // Color depth + false, // Grayscale + false, // pixels in a byte share a row. Only valid for depths < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA23, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h new file mode 100644 index 0000000000000..4bd01706df505 --- /dev/null +++ b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Monster M4SK" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA27) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA01) +#define DEFAULT_I2C_BUS_SDA (&pin_PA00) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Enable the use of 2 displays + +#define CIRCUITPY_DISPLAY_LIMIT (2) + + + diff --git a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.mk b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.mk new file mode 100644 index 0000000000000..9b242a3ffca3a --- /dev/null +++ b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8048 +USB_PRODUCT = "Monster M4SK" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q64C +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/monster_m4sk/pins.c b/ports/atmel-samd/boards/monster_m4sk/pins.c new file mode 100644 index 0000000000000..7272b9ed86435 --- /dev/null +++ b/ports/atmel-samd/boards/monster_m4sk/pins.c @@ -0,0 +1,52 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_HEADPHONE_LEFT), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_HEADPHONE_RIGHT), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_NOSE), MP_ROM_PTR(&pin_PB08) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA27) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PA22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_PA17) }, + + // Right TFT control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_RIGHT_TFT_LITE), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RIGHT_TFT_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RIGHT_TFT_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RIGHT_TFT_RST), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT_TFT_CS), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT_TFT_DC), MP_ROM_PTR(&pin_PA07) }, + + // Left TFT control pins. Some pins are attached through the SeeSaw chip. + { MP_OBJ_NEW_QSTR(MP_QSTR_LEFT_TFT_MOSI), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LEFT_TFT_SCK), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_LEFT_TFT_CS), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_LEFT_TFT_DC), MP_ROM_PTR(&pin_PB22) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)}, + { MP_ROM_QSTR(MP_QSTR_RIGHT_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/board.c b/ports/atmel-samd/boards/ndgarage_ndbit6/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h new file mode 100644 index 0000000000000..869f207a16ef0 --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "ndGarage[n°]Bit6:FeatherSnow" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA04) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) + +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk new file mode 100644 index 0000000000000..b73f0951eeecc --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk @@ -0,0 +1,15 @@ +LD_FILE = boards/samd21x18-bootloader.ld +USB_VID = 0x239A +USB_PID = 0x8066 +USB_PRODUCT = "Bit6" +USB_MANUFACTURER = "ndGarage" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c new file mode 100644 index 0000000000000..6d1fc53b6d38f --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/nfc_copy_cat/board.c b/ports/atmel-samd/boards/nfc_copy_cat/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/nfc_copy_cat/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.h b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.h new file mode 100644 index 0000000000000..3790d23ff6d05 --- /dev/null +++ b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.h @@ -0,0 +1,51 @@ +#define MICROPY_HW_BOARD_NAME "Electronic Cats NFC Copy Cat" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA14) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA11 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA10 + +// No microcontroller.nvm +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 diff --git a/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk new file mode 100644 index 0000000000000..4f6d1e70d53d2 --- /dev/null +++ b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x1209 +USB_PID = 0xBAB8 +USB_PRODUCT = "NFC Copy Cat" +USB_MANUFACTURER = "Electronic Cats" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" +LONGINT_IMPL = NONE + +CIRCUITPY_SMALL_BUILD = 1 diff --git a/ports/atmel-samd/boards/nfc_copy_cat/pins.c b/ports/atmel-samd/boards/nfc_copy_cat/pins.c new file mode 100644 index 0000000000000..ebe6e89e47855 --- /dev/null +++ b/ports/atmel-samd/boards/nfc_copy_cat/pins.c @@ -0,0 +1,20 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA02) }, // IRQ + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, // IN_A + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, // IN_B + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA05) }, // LED + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA04) }, // LED + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA14) }, // LED + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_PA27) }, // Switch + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_PA28) }, // Switch + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA18) }, // CS + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/openbook_m4/board.c b/ports/atmel-samd/boards/openbook_m4/board.c new file mode 100644 index 0000000000000..02270e7e5741d --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/board.c @@ -0,0 +1,109 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Joey Castillo + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 +#define HEIGHT 400 +#define WIDTH 300 + +uint8_t start_sequence[] = { + 0x01, 0x04, 0x03, 0x00, 0x2b, 0x2b, // power setting + 0x06, 0x03, 0x17, 0x17, 0x17, // booster soft start + 0x04, 0x80, 0xc8, // power on and wait 200 ms + 0x00, 0x01, 0x0f, // panel setting + 0x61, 0x04, (HEIGHT >> 8) & 0xFF, HEIGHT & 0xFF, (WIDTH >> 8) & 0xFF, WIDTH & 0xFF // Resolution +}; + +uint8_t stop_sequence[] = { + 0x50, 0x01, 0xf7, // CDI setting + 0x02, 0x80, 0xf0 // Power off +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB05, // EPD_DC Command or data + &pin_PB07, // EPD_CS Chip select + &pin_PA00, // EPD_RST Reset + 1000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_epaperdisplay_obj_t* display = &displays[0].epaper_display; + display->base.type = &displayio_epaperdisplay_type; + common_hal_displayio_epaperdisplay_construct(display, + bus, + start_sequence, + sizeof(start_sequence), + stop_sequence, + sizeof(stop_sequence), + 400, // width + 300, // height + 400, // RAM width + 300, // RAM height + 0, // colstart + 0, // rowstart + 0, // rotation + NO_COMMAND, // set_column_window_command + NO_COMMAND, // set_row_window_command + NO_COMMAND, // set_current_column_command + NO_COMMAND, // set_current_row_command + 0x13, // write_black_ram_command + false, // black_bits_inverted + NO_COMMAND, // write_color_ram_command (can add this for grayscale eventually) + false, // color_bits_inverted + 0x000000, // highlight_color + 0x12, // refresh_display_command + 40, // refresh_time + &pin_PA01, // busy_pin + false, // busy_state + 5, // seconds_per_frame + false); // chip_select (don't always toggle chip select) +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h new file mode 100644 index 0000000000000..6d75c086e9bb4 --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "The Open Book Feather" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk new file mode 100644 index 0000000000000..e5fa0cd84b70f --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x807E +USB_PRODUCT = "The Open Book Feather" +USB_MANUFACTURER = "Oddly Specific Objects" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPADSHIFT = 1 diff --git a/ports/atmel-samd/boards/openbook_m4/pins.c b/ports/atmel-samd/boards/openbook_m4/pins.c new file mode 100644 index 0000000000000..3fbb67860bfee --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/pins.c @@ -0,0 +1,71 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, // A0 = audio right channel + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, // A1 = audio left channel + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, // A6 = VBAT Monitor + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, // A7 = Raw mic input + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, // A8 = Bottom STEMMA Port + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, // A9 = Top STEMMA Port + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA07) }, // A10 = Amplified mic input + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PB00) }, // A11 = VBUS Monitor + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_PB31) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + + // e-paper SPI and control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK1), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI1), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ECS), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EDC), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ERST), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EBSY), MP_ROM_PTR(&pin_PA01) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LOCK_BUTTON), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDCS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MIC_SHUTDOWN), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BCS), MP_ROM_PTR(&pin_PB06) }, // BCS = Babel Chip Select, the second flash chip + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].epaper_display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pewpew10/board.c b/ports/atmel-samd/boards/pewpew10/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/pewpew10/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.h b/ports/atmel-samd/boards/pewpew10/mpconfigboard.h new file mode 100644 index 0000000000000..6b3b4aa15ce4b --- /dev/null +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.h @@ -0,0 +1,45 @@ +#define MICROPY_HW_BOARD_NAME "PewPew 10.2" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PB00 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Default protocol pins. + +#define DEFAULT_I2C_BUS_SCL (&pin_PA01) +#define DEFAULT_I2C_BUS_SDA (&pin_PA00) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA31) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA30) +#define DEFAULT_SPI_BUS_MISO (&pin_PA04) + +#define DEFAULT_UART_BUS_RX (&pin_PA01) +#define DEFAULT_UART_BUS_TX (&pin_PA00) diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk new file mode 100644 index 0000000000000..b3271d062f435 --- /dev/null +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk @@ -0,0 +1,26 @@ +USB_VID = 0x239A +USB_PID = 0x801D +USB_PRODUCT = "PewPew 10.2" +USB_MANUFACTURER = "Radomir Dopieralski" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +CIRCUITPY_PEW = 1 +CIRCUITPY_ANALOGIO = 1 +CIRCUITPY_MATH = 1 +CIRCUITPY_NEOPIXEL_WRITE = 1 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_SAMD = 0 +CIRCUITPY_USB_MIDI = 0 + +SUPEROPT_GC = 0 + +FROZEN_MPY_DIRS += $(TOP)/frozen/pew-pewpew-standalone-10.x + +CFLAGS_BOARD = --param max-inline-insns-auto=15 diff --git a/ports/atmel-samd/boards/pewpew10/pins.c b/ports/atmel-samd/boards/pewpew10/pins.c new file mode 100644 index 0000000000000..9e5b9d98ecbb3 --- /dev/null +++ b/ports/atmel-samd/boards/pewpew10/pins.c @@ -0,0 +1,51 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Pins for internal use. + { MP_ROM_QSTR(MP_QSTR__R1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR__R2), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR__R3), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR__R4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR__R5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR__R6), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR__R7), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR__R8), MP_ROM_PTR(&pin_PA22) }, + + { MP_ROM_QSTR(MP_QSTR__C8), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR__C7), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR__C6), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR__C5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR__C4), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR__C3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR__C2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR__C1), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR__BUTTONS), MP_ROM_PTR(&pin_PA08) }, + + // User pins. + { MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA04) }, + + // Protocol aliases. + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA31) }, + + { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pewpew_m4/board.c b/ports/atmel-samd/boards/pewpew_m4/board.c new file mode 100644 index 0000000000000..0f8936696f22b --- /dev/null +++ b/ports/atmel-samd/boards/pewpew_m4/board.c @@ -0,0 +1,153 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +typedef struct { + const uint32_t *config_data; + void *handoverHID; + void *handoverMSC; + const char *info_uf2; +} UF2_BInfo; + +#define APP_START_ADDRESS 0x00004000 +#define UF2_BINFO ((UF2_BInfo *)(APP_START_ADDRESS - sizeof(UF2_BInfo))) + +#define CFG_DISPLAY_CFG0 39 +#define CFG_MAGIC0 0x1e9e10f1 + +#define DELAY 0x80 + +uint32_t lookupCfg(uint32_t key, uint32_t defl) { + const uint32_t *ptr = UF2_BINFO->config_data; + if (!ptr || (((uint32_t)ptr) & 3) || *ptr != CFG_MAGIC0) { + // no config data! + } else { + ptr += 4; + while (*ptr) { + if (*ptr == key) + return ptr[1]; + ptr += 2; + } + } + return defl; +} + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x2a, 0, // _INVOFF + 0x36, 1, 0xa8, // _MADCTL + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 cycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 16, 0x02, 0x1c, 0x07, 0x12, // _GMCTRP1 Gamma + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, + 0xe1, 16, 0x03, 0x1d, 0x07, 0x06, // _GMCTRN1 + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PA16, // TFT_DC Command or data + &pin_PA11, // TFT_CS Chip select + &pin_PA17, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + uint32_t cfg0 = lookupCfg(CFG_DISPLAY_CFG0, 0x000000); + uint32_t offX = (cfg0 >> 8) & 0xff; + uint32_t offY = (cfg0 >> 16) & 0xff; + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 160, // Width (after rotation) + 128, // Height (after rotation) + offX, // column start + offY, // row start + 0, // rotation + 16, // Color depth + false, // grayscale + false, // pixels in byte share row. only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + NULL, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + false, // auto_refresh + 20, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h new file mode 100644 index 0000000000000..60cd8d754f19b --- /dev/null +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h @@ -0,0 +1,42 @@ +#define MICROPY_HW_BOARD_NAME "PewPew M4" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA01) +#define DEFAULT_I2C_BUS_SDA (&pin_PA00) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA04) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA05) +#define DEFAULT_SPI_BUS_MISO (&pin_PA00) + +#define DEFAULT_UART_BUS_RX (&pin_PA05) +#define DEFAULT_UART_BUS_TX (&pin_PA00) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Unused pins +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA08 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 + +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk new file mode 100644 index 0000000000000..51b4fc993c13f --- /dev/null +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk @@ -0,0 +1,55 @@ +USB_VID = 0x1d50 +USB_PID = 0x60e8 +USB_PRODUCT = "PewPew M4" +USB_MANUFACTURER = "Radomir Dopieralski" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +CIRCUITPY_SMALL_BUILD = 1 +# TODO: Turn off analogio for now for space reasons, but restore it +# when frozen module gets smaller. +CIRCUITPY_ANALOGIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_PS2IO = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_AUDIOPWMIO = 0 +CIRCUITPY_AUDIOMP3 = 0 +CIRCUITPY_BITBANG_APA102 = 0 +CIRCUITPY_BLEIO = 0 +CIRCUITPY_GAMEPADSHIFT = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_SAMD = 0 +CIRCUITPY_TOUCHIO = 0 + +CIRCUITPY_AUDIOMIXER = 1 +CIRCUITPY_AUDIOIO = 1 +CIRCUITPY_DISPLAYIO = 1 +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_STAGE = 1 +CIRCUITPY_MATH = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pewpew_m4 +CIRCUITPY_DISPLAY_FONT = $(TOP)/ports/atmel-samd/boards/ugame10/brutalist-6.bdf + +USB_DEVICES = "CDC,MSC" + +# Tweak inlining depending on language. +ifeq ($(TRANSLATION), zh_Latn_pinyin) +CFLAGS_INLINE_LIMIT = 45 +else +CFLAGS_INLINE_LIMIT = 70 +endif diff --git a/ports/atmel-samd/boards/pewpew_m4/pins.c b/ports/atmel-samd/boards/pewpew_m4/pins.c new file mode 100644 index 0000000000000..7654432f57790 --- /dev/null +++ b/ports/atmel-samd/boards/pewpew_m4/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LEFT), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_RIGHT), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_UP), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_DOWN), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_O), MP_ROM_PTR(&pin_PA10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_X), MP_ROM_PTR(&pin_PA09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_Z), MP_ROM_PTR(&pin_PA22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PA31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA05) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PA11) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA00) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.h b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.h index a26fd7fdd0de3..866e21991bda3 100644 --- a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.h @@ -1,17 +1,58 @@ #define MICROPY_HW_BOARD_NAME "Adafruit pIRKey M0" #define MICROPY_HW_MCU_NAME "samd21e18" -// #define MICROPY_HW_APA102_MOSI (&pin_PA00) -// #define MICROPY_HW_APA102_SCK (&pin_PA01) - -// #define CIRCUITPY_BITBANG_APA102 +#define MICROPY_HW_APA102_MOSI (&pin_PA00) +#define MICROPY_HW_APA102_SCK (&pin_PA01) #define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA24 | PORT_PA25) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 - -#include "internal_flash.h" - -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA08 1 +#define IGNORE_PIN_PA09 1 +#define IGNORE_PIN_PA10 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA16 1 +#define IGNORE_PIN_PA17 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB00 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 diff --git a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk index 52dfc143094a3..e6c227b135742 100644 --- a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk @@ -1,10 +1,32 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8028 USB_PRODUCT = "pIRKey M0" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +# A number of modules are removed for pIRKey to make room for frozen libraries. +# Many I/O functions are not available. +# math is very large and is also removed. +CIRCUITPY_ANALOGIO = 0 +CIRCUITPY_MATH = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_SAMD = 0 +CIRCUITPY_USB_MIDI = 1 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_SMALL_BUILD = 1 +# Make more room. +SUPEROPT_GC = 0 + +# Include these Python libraries in firmware. +# FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_IRRemote + +CFLAGS_BOARD = --param max-inline-insns-auto=12 diff --git a/ports/atmel-samd/boards/pirkey_m0/pins.c b/ports/atmel-samd/boards/pirkey_m0/pins.c index a1b7db85c89b0..41d02e3291f90 100644 --- a/ports/atmel-samd/boards/pirkey_m0/pins.c +++ b/ports/atmel-samd/boards/pirkey_m0/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_REMOTEIN), MP_ROM_PTR(&pin_PA28) }, diff --git a/ports/atmel-samd/boards/pybadge/board.c b/ports/atmel-samd/boards/pybadge/board.c new file mode 100644 index 0000000000000..257d72e30d36c --- /dev/null +++ b/ports/atmel-samd/boards/pybadge/board.c @@ -0,0 +1,126 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x2a, 0, // _INVOFF + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 16, 0x02, 0x1c, 0x07, 0x12, // _GMCTRP1 Gamma + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, + 0xe1, 16, 0x03, 0x1d, 0x07, 0x06, // _GMCTRN1 + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, + 0x2a, 3, 0x02, 0x00, 0x81, // _CASET XSTART = 2, XEND = 129 + 0x2b, 3, 0x02, 0x00, 0x81, // _RASET XSTART = 2, XEND = 129 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB05, // TFT_DC Command or data + &pin_PB07, // TFT_CS Chip select + &pin_PA00, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 160, // Width (after rotation) + 128, // Height (after rotation) + 0, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // grayscale + false, // pixels in byte share row. only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA01, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/pybadge/mpconfigboard.h b/ports/atmel-samd/boards/pybadge/mpconfigboard.h new file mode 100644 index 0000000000000..74a13eb1c2b48 --- /dev/null +++ b/ports/atmel-samd/boards/pybadge/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Pybadge" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define USER_NEOPIXELS_PIN (&pin_PA15) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pybadge/mpconfigboard.mk b/ports/atmel-samd/boards/pybadge/mpconfigboard.mk new file mode 100644 index 0000000000000..7a213faf4c3f2 --- /dev/null +++ b/ports/atmel-samd/boards/pybadge/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x8034 +USB_PRODUCT = "PyBadge" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_GAMEPADSHIFT = 1 +CIRCUITPY_STAGE = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pybadge diff --git a/ports/atmel-samd/boards/pybadge/pins.c b/ports/atmel-samd/boards/pybadge/pins.c new file mode 100644 index 0000000000000..ca65d9df4641a --- /dev/null +++ b/ports/atmel-samd/boards/pybadge/pins.c @@ -0,0 +1,70 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB31) }, + + // TFT control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pybadge_airlift/board.c b/ports/atmel-samd/boards/pybadge_airlift/board.c new file mode 100644 index 0000000000000..7df245a724763 --- /dev/null +++ b/ports/atmel-samd/boards/pybadge_airlift/board.c @@ -0,0 +1,104 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0x08, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB05, // TFT_DC Command or data + &pin_PB06, // TFT_CS Chip select + &pin_PB07, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 320, // Width (after rotation) + 240, // Height (after rotation) + 0, // column start + 0, // row start + 90, // rotation + 16, // Color depth + false, // grayscale + false, // pixels in byte share row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA01, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h new file mode 100644 index 0000000000000..c6ab4ed8e06bf --- /dev/null +++ b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Pybadge Airlift" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define USER_NEOPIXELS_PIN (&pin_PA15) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.mk b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.mk new file mode 100644 index 0000000000000..5ae09294d698f --- /dev/null +++ b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x8043 +USB_PRODUCT = "PyBadge AirLift" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_GAMEPADSHIFT = 1 +CIRCUITPY_STAGE = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pybadge diff --git a/ports/atmel-samd/boards/pybadge_airlift/pins.c b/ports/atmel-samd/boards/pybadge_airlift/pins.c new file mode 100644 index 0000000000000..d39650246047e --- /dev/null +++ b/ports/atmel-samd/boards/pybadge_airlift/pins.c @@ -0,0 +1,75 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + {MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02)}, + + {MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB14)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA15)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23)}, + + // UART + {MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16)}, + + // I2C + {MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13)}, + + // SPI + {MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23)}, + + // Special named pins + {MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB04)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PB14)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB00)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB31)}, + + // ESP control + {MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PA14)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PA31)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PA00)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PB12)}, + + // TFT control pins + {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PA01)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PB15)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PB13)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PB07)}, + {MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06)}, + {MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05)}, + + {MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj)}, + {MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj)}, + {MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj)}, + + {MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)}}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pycubed/board.c b/ports/atmel-samd/boards/pycubed/board.c new file mode 100644 index 0000000000000..31b08120946cf --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/board.c @@ -0,0 +1,61 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include + +#include "boards/board.h" +#include "py/mpconfig.h" +#include "shared-bindings/nvm/ByteArray.h" +#include "common-hal/microcontroller/Pin.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/pulseio/PWMOut.h" + +nvm_bytearray_obj_t bootcnt = { + .base = { + .type = &nvm_bytearray_type + }, + .len = ( uint32_t) 8192, + .start_address = (uint8_t*) (0x00080000 - 8192) + }; + + +void board_init(void) { + pulseio_pwmout_obj_t pwm; + common_hal_pulseio_pwmout_construct(&pwm, &pin_PA23, 4096, 2, false); + common_hal_pulseio_pwmout_never_reset(&pwm); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + uint8_t value_out = 0; + common_hal_nvm_bytearray_get_bytes(&bootcnt,0,1,&value_out); + ++value_out; + common_hal_nvm_bytearray_set_bytes(&bootcnt,0,&value_out,1); +} \ No newline at end of file diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.h b/ports/atmel-samd/boards/pycubed/mpconfigboard.h new file mode 100644 index 0000000000000..49a98e8d454d1 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.h @@ -0,0 +1,34 @@ + +#define MICROPY_HW_BOARD_NAME "PyCubedv04" +#define MICROPY_HW_MCU_NAME "samd51j19" +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_NEOPIXEL (&pin_PA21) + +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE 8192 + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define EXTERNAL_FLASH_QSPI_DUAL + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB13) +#define DEFAULT_I2C_BUS_SDA (&pin_PB12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_TX (&pin_PB02) +#define DEFAULT_UART_BUS_RX (&pin_PB03) + +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk new file mode 100644 index 0000000000000..adbb4aedb9435 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk @@ -0,0 +1,24 @@ +LD_FILE = boards/samd51x19-bootloader-external-flash.ld +USB_VID = 0x04D8 +USB_PID = 0xEC44 +USB_PRODUCT = "PyCubed" +USB_MANUFACTURER = "maholli" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q80DV +LONGINT_IMPL = MPZ + +# Not needed. +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_PS2IO = 0 + +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD \ No newline at end of file diff --git a/ports/atmel-samd/boards/pycubed/pins.c b/ports/atmel-samd/boards/pycubed/pins.c new file mode 100644 index 0000000000000..4c97f58a80856 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_xSDCS), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_RELAY_A), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_BURN1), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_BURN2), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_L1PROG), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_AIN4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_AIN5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_CHRG), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_RF1_RST), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_RF1_CS), MP_ROM_PTR(&pin_PB30) }, + { MP_ROM_QSTR(MP_QSTR_RF1_IO0), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_RF1_IO4), MP_ROM_PTR(&pin_PB04) }, + + { MP_ROM_QSTR(MP_QSTR_RF2_RST), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_RF2_CS), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_RF2_IO1), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_RF2_BSY), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_EN_GPS), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB13) }, + + { MP_ROM_QSTR(MP_QSTR_WDT_WDI), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA21) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); \ No newline at end of file diff --git a/ports/atmel-samd/boards/pygamer/board.c b/ports/atmel-samd/boards/pygamer/board.c new file mode 100644 index 0000000000000..7c3ca6e335354 --- /dev/null +++ b/ports/atmel-samd/boards/pygamer/board.c @@ -0,0 +1,126 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x2a, 0, // _INVOFF + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 16, 0x02, 0x1c, 0x07, 0x12, // _GMCTRP1 Gamma + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, + 0xe1, 16, 0x03, 0x1d, 0x07, 0x06, // _GMCTRN1 + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, + 0x2a, 3, 0x02, 0x00, 0x81, // _CASET XSTART = 2, XEND = 129 + 0x2b, 3, 0x02, 0x00, 0x81, // _RASET XSTART = 2, XEND = 129 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB05, // TFT_DC Command or data + &pin_PB12, // TFT_CS Chip select + &pin_PA00, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 160, // Width + 128, // Height + 0, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // Grayscale + false, // pixels in a byte share a row. Only valid for depths < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA01, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/pygamer/mpconfigboard.h b/ports/atmel-samd/boards/pygamer/mpconfigboard.h new file mode 100644 index 0000000000000..21f75d272886e --- /dev/null +++ b/ports/atmel-samd/boards/pygamer/mpconfigboard.h @@ -0,0 +1,30 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit PyGamer" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define USER_NEOPIXELS_PIN (&pin_PA15) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pygamer/mpconfigboard.mk b/ports/atmel-samd/boards/pygamer/mpconfigboard.mk new file mode 100644 index 0000000000000..2db6786bfdf17 --- /dev/null +++ b/ports/atmel-samd/boards/pygamer/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x803E +USB_PRODUCT = "PyGamer" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q64C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_GAMEPADSHIFT = 1 +CIRCUITPY_STAGE = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pygamer diff --git a/ports/atmel-samd/boards/pygamer/pins.c b/ports/atmel-samd/boards/pygamer/pins.c new file mode 100644 index 0000000000000..7e6eff43f97db --- /dev/null +++ b/ports/atmel-samd/boards/pygamer/pins.c @@ -0,0 +1,75 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + + // SDCS, dup of D4 + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB31) }, + + // TFT control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_JOYSTICK_X), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_JOYSTICK_Y), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pygamer_advance/board.c b/ports/atmel-samd/boards/pygamer_advance/board.c new file mode 100644 index 0000000000000..7fd3ebc5e150d --- /dev/null +++ b/ports/atmel-samd/boards/pygamer_advance/board.c @@ -0,0 +1,104 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB12, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PA00, // TFT_DC Command or data + &pin_PB15, // TFT_CS Chip select + &pin_PB05, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 320, // Width (after rotation) + 240, // Height (after rotation) + 0, // column start + 0, // row start + 90, // rotation + 16, // Color depth + false, // Grayscale + false, // pixels in a byte share a row. Only valid for depths < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PA01, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + board_reset_user_neopixels(); +} diff --git a/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h new file mode 100644 index 0000000000000..7c631d1c373a5 --- /dev/null +++ b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h @@ -0,0 +1,30 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit PyGamer" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define USER_NEOPIXELS_PIN (&pin_PA15) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.mk b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.mk new file mode 100644 index 0000000000000..d001374a50144 --- /dev/null +++ b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x803E +USB_PRODUCT = "PyGamer Advance" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q64C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_GAMEPADSHIFT = 1 +CIRCUITPY_STAGE = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pybadge diff --git a/ports/atmel-samd/boards/pygamer_advance/pins.c b/ports/atmel-samd/boards/pygamer_advance/pins.c new file mode 100644 index 0000000000000..9c2284db1a298 --- /dev/null +++ b/ports/atmel-samd/boards/pygamer_advance/pins.c @@ -0,0 +1,75 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + + // SDCS, dup of D4 + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB31) }, + + // TFT control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_JOYSTICK_X), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_JOYSTICK_Y), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pyportal/board.c b/ports/atmel-samd/boards/pyportal/board.c new file mode 100644 index 0000000000000..a86f0ee48a020 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal/board.c @@ -0,0 +1,112 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" + +#include "tick.h" + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0xEF, 3, 0x03, 0x80, 0x02, + 0xCF, 3, 0x00, 0xC1, 0x30, + 0xED, 4, 0x64, 0x03, 0x12, 0x81, + 0xE8, 3, 0x85, 0x00, 0x78, + 0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, + 0xF7, 1, 0x20, + 0xEA, 2, 0x00, 0x00, + 0xc0, 1, 0x23, // Power control VRH[5:0] + 0xc1, 1, 0x10, // Power control SAP[2:0];BT[3:0] + 0xc5, 2, 0x3e, 0x28, // VCM control + 0xc7, 1, 0x86, // VCM control2 + 0x36, 1, 0xa8, // Memory Access Control + 0x37, 1, 0x00, // Vertical scroll zero + 0x3a, 1, 0x55, // COLMOD: Pixel Format Set + 0xb1, 2, 0x00, 0x18, // Frame Rate Control (In Normal Mode/Full Colors) + 0xb6, 3, 0x08, 0xa2, 0x27, // Display Function Control + 0xF2, 1, 0x00, // 3Gamma Function Disable + 0x26, 1, 0x01, // Gamma curve selected + 0xe0, 15, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, // Set Gamma + 0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, + 0xe1, 15, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, // Set Gamma + 0x31, 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, + 0x11, DELAY, 120, // Exit Sleep + 0x29, DELAY, 120, // Display on +}; + +void board_init(void) { + displayio_parallelbus_obj_t* bus = &displays[0].parallel_bus; + bus->base.type = &displayio_parallelbus_type; + common_hal_displayio_parallelbus_construct(bus, + &pin_PA16, // Data0 + &pin_PB05, // Command or data + &pin_PB06, // Chip select + &pin_PB09, // Write + &pin_PB04, // Read + &pin_PA00); // Reset + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 320, // Width + 240, // Height + 0, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // grayscale + false, // pixels_in_byte_share_row (unused for depths > 8) + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // Set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PB31, // Backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/pyportal/mpconfigboard.h b/ports/atmel-samd/boards/pyportal/mpconfigboard.h new file mode 100644 index 0000000000000..2c4cf4f580c0f --- /dev/null +++ b/ports/atmel-samd/boards/pyportal/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit PyPortal" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B + +#define MICROPY_HW_LED_STATUS (&pin_PA27) + +#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +#define MICROPY_PORT_C ( 0 ) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PB13) +#define DEFAULT_UART_BUS_TX (&pin_PB12) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk new file mode 100644 index 0000000000000..149141a4e30d1 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8036 +USB_PRODUCT = "PyPortal" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/pyportal/pins.c b/ports/atmel-samd/boards/pyportal/pins.c new file mode 100644 index 0000000000000..14699a209db01 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal/pins.c @@ -0,0 +1,85 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_AUDIO_OUT), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, // analog out/in + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + + // Light sensor + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + + // STEMMA connectors + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + + // Indicator LED + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PB23) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, + + // LCD pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RD), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RS), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_TE), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_WR), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA2), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA3), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA5), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA6), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA7), MP_ROM_PTR(&pin_PA23) }, + + // Touch pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_YD), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_XL), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_YU), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_XR), MP_ROM_PTR(&pin_PB08) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PA15) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS),MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CARD_DETECT),MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pyportal_titano/board.c b/ports/atmel-samd/boards/pyportal_titano/board.c new file mode 100644 index 0000000000000..a9ded1760d003 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal_titano/board.c @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" + +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" + +#include "tick.h" + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, DELAY, 100/5, // Soft reset, then delay 10 ms + 0xB9, 3, 0xFF, 0x83, 0x57, // Extension command set + 0xFF, DELAY, 500/5, + 0xB3, 4, 0x80, 0x00, 0x06, 0x06, // 0x80 enables SDO pin (0x00 disables) + 0xB6, 2, 0x01, 0x25, // -1.52V + 0xB0, 1, 0x68, // Normal mode 70Hz, Idle mode 55 Hz + 0xCC, 1, 0x05, + 0xB1, 6, + 0x00, // Not deep standby + 0x15, // BT + 0x1C, // VSPR + 0x1C, // VSNR + 0x83, // AP + 0xAA, // FS + 0xC0, 6, + 0x50, // OPON normal + 0x50, // OPON idle + 0x01, // STBA + 0x3C, // STBA + 0x1E, // STBA + 0x08, // GEN + 0xB4, 7, + 0x02, // NW 0x02 + 0x40, // RTN + 0x00, // DIV + 0x2A, // DUM + 0x2A, // DUM + 0x0D, // GDON + 0x78, // GDOFF + 0xE0, 34, + 0x02, 0x0A, 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b, + 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A, + 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b, 0x42, 0x3A, + 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01, + 0x3a, 1, 0x55, + 0x36, 1, 0x60, + 0x11, DELAY, 150/5, // Exit Sleep, then delay 150 ms + 0x29, DELAY, 50/5 +}; + +void board_init(void) { + displayio_parallelbus_obj_t* bus = &displays[0].parallel_bus; + bus->base.type = &displayio_parallelbus_type; + common_hal_displayio_parallelbus_construct(bus, + &pin_PA16, // Data0 + &pin_PB05, // Command or data + &pin_PB06, // Chip select + &pin_PB09, // Write + &pin_PB04, // Read + &pin_PA00); // Reset + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 480, // Width + 320, // Height + 0, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // grayscale + false, // pixels_in_byte_share_row (unused for depths > 8) + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // Set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PB31, // Backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h new file mode 100644 index 0000000000000..4d58b8183907d --- /dev/null +++ b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.h @@ -0,0 +1,30 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit PyPortal Titano" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA27) + +#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +#define MICROPY_PORT_C ( 0 ) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PB13) +#define DEFAULT_UART_BUS_TX (&pin_PB12) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk new file mode 100644 index 0000000000000..dbc2d5ae996a2 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8054 +USB_PRODUCT = "PyPortal Titano" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/pyportal_titano/pins.c b/ports/atmel-samd/boards/pyportal_titano/pins.c new file mode 100644 index 0000000000000..14699a209db01 --- /dev/null +++ b/ports/atmel-samd/boards/pyportal_titano/pins.c @@ -0,0 +1,85 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_AUDIO_OUT), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, // analog out/in + { MP_OBJ_NEW_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + + // Light sensor + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + + // STEMMA connectors + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + + // Indicator LED + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PB23) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, + + // LCD pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RD), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RS), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_TE), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_WR), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA2), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA3), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA5), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA6), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LCD_DATA7), MP_ROM_PTR(&pin_PA23) }, + + // Touch pins + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_YD), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_XL), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_YU), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TOUCH_XR), MP_ROM_PTR(&pin_PB08) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PA15) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS),MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CARD_DETECT),MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pyruler/board.c b/ports/atmel-samd/boards/pyruler/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/pyruler/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/pyruler/mpconfigboard.h b/ports/atmel-samd/boards/pyruler/mpconfigboard.h new file mode 100644 index 0000000000000..4d0586d912b94 --- /dev/null +++ b/ports/atmel-samd/boards/pyruler/mpconfigboard.h @@ -0,0 +1,59 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit PyRuler" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA10) + +#define MICROPY_HW_APA102_MOSI (&pin_PA00) +#define MICROPY_HW_APA102_SCK (&pin_PA01) + +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA16 1 +#define IGNORE_PIN_PA17 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA23 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/pyruler/mpconfigboard.mk b/ports/atmel-samd/boards/pyruler/mpconfigboard.mk new file mode 100644 index 0000000000000..ca7ed4bdc3ea3 --- /dev/null +++ b/ports/atmel-samd/boards/pyruler/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x804C +USB_PRODUCT = "PyRuler" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +CFLAGS_INLINE_LIMIT = 35 +endif \ No newline at end of file diff --git a/ports/atmel-samd/boards/pyruler/pins.c b/ports/atmel-samd/boards/pyruler/pins.c new file mode 100644 index 0000000000000..315dbe63039bd --- /dev/null +++ b/ports/atmel-samd/boards/pyruler/pins.c @@ -0,0 +1,50 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_CAP0), MP_ROM_PTR(&pin_PA11) }, + + { MP_ROM_QSTR(MP_QSTR_CAP1), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_CAP2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_CAP3), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_LED5), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_LED6), MP_ROM_PTR(&pin_PA28) }, + + { MP_ROM_QSTR(MP_QSTR_LED7), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/robohatmm1_m4/board.c b/ports/atmel-samd/boards/robohatmm1_m4/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/robohatmm1_m4/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.h b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.h new file mode 100644 index 0000000000000..c66873aeb27fe --- /dev/null +++ b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.h @@ -0,0 +1,36 @@ +#define MICROPY_HW_BOARD_NAME "Robo HAT MM1 M4" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PB22) + +// Salae reads 12mhz which is the limit even though we set it to the safer 8mhz. +#define SPI_FLASH_BAUDRATE (8000000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA12 +#define SPI_FLASH_MISO_PIN &pin_PA14 +#define SPI_FLASH_SCK_PIN &pin_PA13 +#define SPI_FLASH_CS_PIN &pin_PA15 + +// These are pins not to reset. +// SPI Data pins +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB09) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB08) +#define DEFAULT_SPI_BUS_MISO (&pin_PB11) + +//#define DEFAULT_UART_BUS_RX (&pin_PB03) +//#define DEFAULT_UART_BUS_TX (&pin_PB02) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk new file mode 100644 index 0000000000000..fd4f2223067f9 --- /dev/null +++ b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk @@ -0,0 +1,26 @@ +USB_VID = 0x1209 +USB_PID = 0x4D43 +USB_PRODUCT = "Robo HAT MM1 M4" +USB_MANUFACTURER = "Robotics Masters" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +#QSPI_FLASH_FILESYSTEM = 0 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ" +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 +# Make room for more stuff +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 + +# Include these Python libraries in firmware. +#FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +#FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_INA219 +#FROZEN_MPY_DIRS += $(TOP)/frozen/RoboticsMasters_CircuitPython_MPU9250 diff --git a/ports/atmel-samd/boards/robohatmm1_m4/pins.c b/ports/atmel-samd/boards/robohatmm1_m4/pins.c new file mode 100644 index 0000000000000..4fc290fb0aa40 --- /dev/null +++ b/ports/atmel-samd/boards/robohatmm1_m4/pins.c @@ -0,0 +1,91 @@ +#include "shared-bindings/board/__init__.h" +// Version 2.4 +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // SERVO Pins + { MP_ROM_QSTR(MP_QSTR_SERVO1), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_SERVO2), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_SERVO3), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_SERVO4), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_SERVO5), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SERVO6), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SERVO7), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SERVO8), MP_ROM_PTR(&pin_PA08) }, + + // RCC Pins + { MP_ROM_QSTR(MP_QSTR_RCC1), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RCC2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_RCC3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_RCC4), MP_ROM_PTR(&pin_PA04) }, + + // Special Function + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_POWER_OFF), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_POWER_DISABLE), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_POWER_ON), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_POWER_ENABLE), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PB22) }, + + + // GROVE on SERCOM0 + { MP_ROM_QSTR(MP_QSTR_GROVE_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_D1), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_A1), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_GROVE_A0), MP_ROM_PTR(&pin_PA08) }, + + // UART on SERCOM0 + { MP_ROM_QSTR(MP_QSTR_UART_TX), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_UART_RX), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_UART_CTS), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_UART_RTS), MP_ROM_PTR(&pin_PA07) }, + + // UART on SERCOM1 (Raspberry Pi) + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_PI_TX), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_PI_RX), MP_ROM_PTR(&pin_PA17) }, + + // I2C on SERCOM1 (External Connector) + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_PA01) }, + + // SPI Flash on SERCOM2 + { MP_ROM_QSTR(MP_QSTR_FLASH_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_FLASH_MISO), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_FLASH_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_FLASH_CS), MP_ROM_PTR(&pin_PA15) }, + + // I2C on SERCOM3 (RPi & Internal) + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_PI_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_PI_SCL), MP_ROM_PTR(&pin_PA23) }, + + // SPI on SERCOM4 + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB11) }, + + // GPS on SERCOM5 + { MP_ROM_QSTR(MP_QSTR_GPS_TX), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_GPS_RX), MP_ROM_PTR(&pin_PB03) }, + + // Raspberry Pi + { MP_ROM_QSTR(MP_QSTR_PI_GP25), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_PI_GP24), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR(&pin_PA31) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + //{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sam32/board.c b/ports/atmel-samd/boards/sam32/board.c new file mode 100644 index 0000000000000..7a23d3007036e --- /dev/null +++ b/ports/atmel-samd/boards/sam32/board.c @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include + +#include "boards/board.h" +#include "py/mpconfig.h" + +#include "common-hal/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/neopixel_write/__init__.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + uint8_t zeroes[96]; + memset(zeroes, 0, 96); + digitalio_digitalinout_obj_t neopixel; + common_hal_digitalio_digitalinout_construct(&neopixel, &pin_PA15); + common_hal_digitalio_digitalinout_switch_to_output(&neopixel, false, DRIVE_MODE_PUSH_PULL); + common_hal_neopixel_write(&neopixel, zeroes, 96); + common_hal_digitalio_digitalinout_deinit(&neopixel); +} \ No newline at end of file diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.h b/ports/atmel-samd/boards/sam32/mpconfigboard.h new file mode 100644 index 0000000000000..364d380d1d832 --- /dev/null +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.h @@ -0,0 +1,29 @@ +#define MICROPY_HW_BOARD_NAME "SAM32v26" +#define MICROPY_HW_MCU_NAME "samd51j20" +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA27) +#define MICROPY_HW_NEOPIXEL (&pin_PA15) + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (128*1024) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB12) +#define DEFAULT_SPI_BUS_MISO (&pin_PB14) + +#define DEFAULT_UART_BUS_TX (&pin_PB16) +#define DEFAULT_UART_BUS_RX (&pin_PB17) + +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.mk b/ports/atmel-samd/boards/sam32/mpconfigboard.mk new file mode 100644 index 0000000000000..1187449355a7c --- /dev/null +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x04D8 +USB_PID = 0xEDBE +USB_PRODUCT = "SAM32" +USB_MANUFACTURER = "maholli" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# No I2S on SAMD51 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_USTACK = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel \ No newline at end of file diff --git a/ports/atmel-samd/boards/sam32/pins.c b/ports/atmel-samd/boards/sam32/pins.c new file mode 100644 index 0000000000000..f0a5b2b626ec3 --- /dev/null +++ b/ports/atmel-samd/boards/sam32/pins.c @@ -0,0 +1,66 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_xSDCS),MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D49), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D50), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D59), MP_ROM_PTR(&pin_PB30) }, + { MP_ROM_QSTR(MP_QSTR_D60), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_D61), MP_ROM_PTR(&pin_PB00) }, + + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_TCK), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_TDI), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_TMS), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_ESP_CS),MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PB17) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_DTR), MP_ROM_PTR(&pin_PB10) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA06) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); \ No newline at end of file diff --git a/ports/atmel-samd/boards/samd21x18-bootloader-crystalless.ld b/ports/atmel-samd/boards/samd21x18-bootloader-crystalless.ld deleted file mode 100644 index 3b3c58ad2ba5d..0000000000000 --- a/ports/atmel-samd/boards/samd21x18-bootloader-crystalless.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 8KiB for the bootloader, 256b for persistent config (clock), 64k for the flash file system and 256b for the user config. */ - FLASH (rx) : ORIGIN = 0x00000000 + 8K, LENGTH = 256K - 8K - 256 - 64K - 256 - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialize the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld b/ports/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld deleted file mode 100644 index 7d86dea1f8957..0000000000000 --- a/ports/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 8KiB for the bootloader, 256b for internal config and 256b for user config. */ - FLASH (rx) : ORIGIN = 0x00000000 + 8K, LENGTH = 256K - 8K - 256 - 256 - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd21x18-bootloader-external-flash.ld b/ports/atmel-samd/boards/samd21x18-bootloader-external-flash.ld deleted file mode 100644 index 66bceee000bb5..0000000000000 --- a/ports/atmel-samd/boards/samd21x18-bootloader-external-flash.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 8KiB for the bootloader and 256b for user config. */ - FLASH (rx) : ORIGIN = 0x00000000 + 8K, LENGTH = 256K - 8K - 256 - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K /* 32 KiB RAM */ -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _etext ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd21x18-bootloader.ld b/ports/atmel-samd/boards/samd21x18-bootloader.ld deleted file mode 100644 index 7e33ed007ff3a..0000000000000 --- a/ports/atmel-samd/boards/samd21x18-bootloader.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 8KiB for the bootloader, and 64k for the flash file system. */ - FLASH (rx) : ORIGIN = 0x00000000 + 8K, LENGTH = 256K - 8K - 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialize the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd21x18-external-flash.ld b/ports/atmel-samd/boards/samd21x18-external-flash.ld deleted file mode 100644 index a540bfde2afc5..0000000000000 --- a/ports/atmel-samd/boards/samd21x18-external-flash.ld +++ /dev/null @@ -1,83 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* 256 KiB but leave 256b for internal config and 256b for user config (protected eeprom) */ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K - 256 - 256 - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); -_bootloader_dbl_tap = 0; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd21x18.ld b/ports/atmel-samd/boards/samd21x18.ld deleted file mode 100644 index 139be86bb2141..0000000000000 --- a/ports/atmel-samd/boards/samd21x18.ld +++ /dev/null @@ -1,83 +0,0 @@ -/* - GNU linker script for SAMD21x18 (256K flash, 32K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 256b for internal config, 64k for the flash file system and 256b for user config. */ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K - 256 - 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); -_bootloader_dbl_tap = 0; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - -/* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x18-bootloader-external-flash.ld b/ports/atmel-samd/boards/samd51x18-bootloader-external-flash.ld deleted file mode 100644 index 0fc476889a883..0000000000000 --- a/ports/atmel-samd/boards/samd51x18-bootloader-external-flash.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD51x18 (256K flash, 128K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 16KiB for the bootloader. */ - FLASH (rx) : ORIGIN = 0x00000000 + 16K, LENGTH = 256K - 16K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x19-bootloader-external-flash.ld b/ports/atmel-samd/boards/samd51x19-bootloader-external-flash.ld deleted file mode 100644 index cd65e965d3cb1..0000000000000 --- a/ports/atmel-samd/boards/samd51x19-bootloader-external-flash.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD51x19 (512K flash, 192K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 16KiB for the bootloader. */ - FLASH (rx) : ORIGIN = 0x00000000 + 16K, LENGTH = 512K - 16K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x19-bootloader.ld b/ports/atmel-samd/boards/samd51x19-bootloader.ld deleted file mode 100644 index 54e16a8f5c627..0000000000000 --- a/ports/atmel-samd/boards/samd51x19-bootloader.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD51x19 (512K flash, 192K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 16KiB for the bootloader and 256KiB for the internal file system. */ - FLASH (rx) : ORIGIN = 0x00000000 + 16K, LENGTH = 512K - 16K - 256K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x20-bootloader-external-flash.ld b/ports/atmel-samd/boards/samd51x20-bootloader-external-flash.ld deleted file mode 100644 index 148f4dd9f2cec..0000000000000 --- a/ports/atmel-samd/boards/samd51x20-bootloader-external-flash.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD51x20 (1MB flash, 256K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 16KiB for the bootloader. */ - FLASH (rx) : ORIGIN = 0x00000000 + 16K, LENGTH = 1M - 16K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x20-bootloader.ld b/ports/atmel-samd/boards/samd51x20-bootloader.ld deleted file mode 100644 index c8a43e72480a0..0000000000000 --- a/ports/atmel-samd/boards/samd51x20-bootloader.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - GNU linker script for SAMD51x20 (1MB flash, 256K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* Leave 16KiB for the bootloader and 512k for the filesystem. */ - FLASH (rx) : ORIGIN = 0x00000000 + 16K, LENGTH = 1M - 16K - 512K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K -} - -/* top end of the stack */ -/* stack must be double-word (8 byte) aligned */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; -_bootloader_dbl_tap = _estack; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x20-external-flash.ld b/ports/atmel-samd/boards/samd51x20-external-flash.ld deleted file mode 100644 index e31f31a580743..0000000000000 --- a/ports/atmel-samd/boards/samd51x20-external-flash.ld +++ /dev/null @@ -1,82 +0,0 @@ -/* - GNU linker script for SAMD51x20 (1MB flash, 256K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 1M - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); -_bootloader_dbl_tap = 0; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/samd51x20.ld b/ports/atmel-samd/boards/samd51x20.ld deleted file mode 100644 index 4c44c7fa8f650..0000000000000 --- a/ports/atmel-samd/boards/samd51x20.ld +++ /dev/null @@ -1,83 +0,0 @@ -/* - GNU linker script for SAMD51x20 (1MB flash, 256K RAM) -*/ - -/* Specify the memory areas */ -MEMORY -{ - /* 1024 KiB minus 512KiB for the internal file system. */ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 1M - 512K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); -_bootloader_dbl_tap = 0; - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - } >FLASH - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - _sidata = .; /* start of .data section */ - } > FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.ramfunc) - *(.ramfunc*) - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; - _szero = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ezero = .; /* define a global symbol at bss end; used by startup code */ - _ebss = .; - } >RAM - - /* this just checks there is enough RAM for a minimal stack */ - .stack : - { - . = ALIGN(4); - . = . + 2K; /* Reserve a minimum of 2K for the stack. */ - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/atmel-samd/boards/seeeduino_xiao/board.c b/ports/atmel-samd/boards/seeeduino_xiao/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h new file mode 100644 index 0000000000000..4bd10ca412fbd --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Seeeduino XIAO" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) // was PA23 +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) // was PA22 + +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) // was PA17 +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) // was PA16 +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) // was PA19 + +#define DEFAULT_UART_BUS_RX (&pin_PB09) // was PA11 +#define DEFAULT_UART_BUS_TX (&pin_PB08) // was PA10 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk new file mode 100644 index 0000000000000..2741454ce9f70 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x2886 +USB_PID = 0x002f +USB_PRODUCT = "Seeeduino XIAO" +USB_MANUFACTURER = "Seeed" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/seeeduino_xiao/pins.c b/ports/atmel-samd/boards/seeeduino_xiao/pins.c new file mode 100644 index 0000000000000..8b96902531f38 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/pins.c @@ -0,0 +1,54 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Analog pins + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA06) }, + + // Digital pins + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + + // UART pins + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB09) }, + + // SPI pins + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + + // I2C pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + // LED pins + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA17) }, // status + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_PA17) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/serpente/board.c b/ports/atmel-samd/boards/serpente/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/serpente/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/serpente/mpconfigboard.h b/ports/atmel-samd/boards/serpente/mpconfigboard.h new file mode 100644 index 0000000000000..515bc14410704 --- /dev/null +++ b/ports/atmel-samd/boards/serpente/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "Serpente" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA15 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA04) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Not connected +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/serpente/mpconfigboard.mk b/ports/atmel-samd/boards/serpente/mpconfigboard.mk new file mode 100644 index 0000000000000..a5adb17a1e0e5 --- /dev/null +++ b/ports/atmel-samd/boards/serpente/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x8058 +USB_PRODUCT = "Serpente" +USB_MANUFACTURER = "arturo182" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q32C +LONGINT_IMPL = NONE + +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_GAMEPAD = 0 diff --git a/ports/atmel-samd/boards/serpente/pins.c b/ports/atmel-samd/boards/serpente/pins.c new file mode 100644 index 0000000000000..0bf68665615c9 --- /dev/null +++ b/ports/atmel-samd/boards/serpente/pins.c @@ -0,0 +1,40 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); + diff --git a/ports/atmel-samd/boards/shirtty/board.c b/ports/atmel-samd/boards/shirtty/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/shirtty/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.h b/ports/atmel-samd/boards/shirtty/mpconfigboard.h new file mode 100644 index 0000000000000..796d23f869f54 --- /dev/null +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.h @@ -0,0 +1,63 @@ +#define MICROPY_HW_BOARD_NAME "@sarfata shIRtty" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA16) + +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// #define IGNORE_PIN_PA00 1 +// #define IGNORE_PIN_PA01 1 +// #define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA17 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk new file mode 100644 index 0000000000000..bc37b59433ac5 --- /dev/null +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0x239A +USB_PID = 0x806C +USB_PRODUCT = "shIRtty" +USB_MANUFACTURER = "@sarfata" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_I2CSLAVE = 1 +CIRCUITPY_TOUCHIO = 0 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/shirtty/pins.c b/ports/atmel-samd/boards/shirtty/pins.c new file mode 100644 index 0000000000000..40e819234111e --- /dev/null +++ b/ports/atmel-samd/boards/shirtty/pins.c @@ -0,0 +1,36 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_IR_RX), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA16) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_IR_TX), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/snekboard/board.c b/ports/atmel-samd/boards/snekboard/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/snekboard/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/snekboard/mpconfigboard.h b/ports/atmel-samd/boards/snekboard/mpconfigboard.h new file mode 100644 index 0000000000000..1c0804fe72042 --- /dev/null +++ b/ports/atmel-samd/boards/snekboard/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "keithp.com snekboard" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA02) + +#define MICROPY_HW_NEOPIXEL (&pin_PB11) + +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA27 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PB11) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA08) /* ANALOG 5 */ +#define DEFAULT_I2C_BUS_SDA (&pin_PA09) /* ANALOG 6 */ + +#define DEFAULT_UART_BUS_RX (&pin_PB08) /* ANALOG 1 */ +#define DEFAULT_UART_BUS_TX (&pin_PB09) /* ANALOG 2 */ + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/snekboard/mpconfigboard.mk b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk new file mode 100644 index 0000000000000..4faa041b1be96 --- /dev/null +++ b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk @@ -0,0 +1,19 @@ +USB_VID = 0x239A +USB_PID = 0x804E +USB_PRODUCT = "snekboard" +USB_MANUFACTURER = "keithp.com" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q16JV_IQ" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/snekboard/pins.c b/ports/atmel-samd/boards/snekboard/pins.c new file mode 100644 index 0000000000000..48bdc672e082b --- /dev/null +++ b/ports/atmel-samd/boards/snekboard/pins.c @@ -0,0 +1,28 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_POWER1), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_DIR1), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_POWER2), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_DIR2), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_POWER3), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_DIR3), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_POWER4), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_DIR4), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/board.c b/ports/atmel-samd/boards/sparkfun_lumidrive/board.c new file mode 100755 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h new file mode 100755 index 0000000000000..d184945f35e03 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h @@ -0,0 +1,51 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun LUMIDrive" +#define MICROPY_HW_MCU_NAME "samd21g18" + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA14 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA13 + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +//I2C +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +//SPI +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA21) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA10 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA16 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA23 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 + +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk new file mode 100755 index 0000000000000..6a2afc306eb9f --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x1B4F +USB_PID = 0x0017 +USB_PRODUCT = "LUMIDrive Board" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32FV" +LONGINT_IMPL = MPZ + +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 + +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/pins.c b/ports/atmel-samd/boards/sparkfun_lumidrive/pins.c new file mode 100755 index 0000000000000..52c0753d41ecf --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/pins.c @@ -0,0 +1,15 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, // + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, // + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, // + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, // + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, // + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h new file mode 100644 index 0000000000000..dcce97b8da990 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.h @@ -0,0 +1,34 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun Qwiic Micro" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define CALIBRATE_CRYSTALLESS 1 +#define BOARD_HAS_CRYSTAL 0 + +//I2C and Qwiic Connector +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +//SPI +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) + +//UART +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Unused +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk new file mode 100644 index 0000000000000..632cd095c239b --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x1B4F +USB_PID = 0x8D24 +USB_PRODUCT = "SparkFun Qwiic Micro" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +CIRCUITPY_SMALL_BUILD = 1 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c new file mode 100644 index 0000000000000..f9d755d935bb0 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, + + // External SPI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + // UART + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // I2C and Qwiic Connector + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) } + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h new file mode 100644 index 0000000000000..c9b195eef439a --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.h @@ -0,0 +1,42 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun Qwiic Micro" +#define MICROPY_HW_MCU_NAME "samd21e18" + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA19 + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define CALIBRATE_CRYSTALLESS 1 +#define BOARD_HAS_CRYSTAL 0 + +//I2C and Qwiic Connector +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +//SPI +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) + +//UART +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Unused +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk new file mode 100644 index 0000000000000..ccf5a41495d1b --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0x1B4F +USB_PID = 0x8D24 +USB_PRODUCT = "SparkFun Qwiic Micro" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32FV" +LONGINT_IMPL = MPZ + +CIRCUITPY_SMALL_BUILD = 1 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c new file mode 100644 index 0000000000000..f9d755d935bb0 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, + + // External SPI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + // UART + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + // I2C and Qwiic Connector + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) } + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_redboard_turbo/board.c b/ports/atmel-samd/boards/sparkfun_redboard_turbo/board.c new file mode 100755 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_redboard_turbo/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.h new file mode 100755 index 0000000000000..ae272d502bd8e --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.h @@ -0,0 +1,39 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun RedBoard Turbo" +#define MICROPY_HW_MCU_NAME "samd21g18" + + +#define MICROPY_HW_LED_TX &pin_PA27 +#define MICROPY_HW_LED_RX &pin_PA31 + +#define MICROPY_HW_NEOPIXEL (&pin_PA30) + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA13 + +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +// I2C - also QWIIC +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk new file mode 100755 index 0000000000000..f2d4eccad9fb5 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x1B4F +USB_PID = 0x0015 +USB_PRODUCT = "RedBoard Turbo Board" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32FV" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_redboard_turbo/pins.c b/ports/atmel-samd/boards/sparkfun_redboard_turbo/pins.c new file mode 100755 index 0000000000000..485589fcafaaf --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_redboard_turbo/pins.c @@ -0,0 +1,36 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/board.c b/ports/atmel-samd/boards/sparkfun_samd21_dev/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.h new file mode 100644 index 0000000000000..13bb2638039ed --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun SAMD21 Dev Breakout" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk new file mode 100644 index 0000000000000..0c33ef960e65b --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x1B4F +USB_PID = 0x8D23 +USB_PRODUCT = "SparkFun SAMD21 Dev Breakout" +USB_MANUFACTURER = "SparkFun" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/pins.c b/ports/atmel-samd/boards/sparkfun_samd21_dev/pins.c new file mode 100644 index 0000000000000..039100956ef6b --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/pins.c @@ -0,0 +1,58 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Analog pins + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + + // Digital pins + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_PA13) }, + + // UART pins + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PB23) }, + + // SPI pins + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + + // I2C pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + + // LED pins + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_GREEN_LED), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_YELLOW_LED), MP_ROM_PTR(&pin_PB03) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/board.c b/ports/atmel-samd/boards/sparkfun_samd21_mini/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.h new file mode 100644 index 0000000000000..2cfdd9e73bdff --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun SAMD21 Mini Breakout" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk new file mode 100644 index 0000000000000..d09785fb8a721 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x1B4F +USB_PID = 0x8D22 +USB_PRODUCT = "SparkFun SAMD21 Mini Breakout" +USB_MANUFACTURER = "SparkFun" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/pins.c b/ports/atmel-samd/boards/sparkfun_samd21_mini/pins.c new file mode 100644 index 0000000000000..a90b0b5a30f7f --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/pins.c @@ -0,0 +1,51 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Analog pins + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + + // Digital pins + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + + // UART pins + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + + // SPI pins + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + + // I2C pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + + // LED pins + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_GREEN_LED), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_YELLOW_LED), MP_ROM_PTR(&pin_PB03) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/board.c b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/board.c new file mode 100644 index 0000000000000..8096b9b8ea6d8 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h new file mode 100644 index 0000000000000..a5dee295bf473 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h @@ -0,0 +1,33 @@ +#define MICROPY_HW_BOARD_NAME "SparkFun Thing Plus - SAMD51" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA08 +#define SPI_FLASH_MISO_PIN &pin_PA11 +#define SPI_FLASH_SCK_PIN &pin_PA09 +#define SPI_FLASH_CS_PIN &pin_PA10 + +// These are pins not to reset. +// SPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA22) +#define DEFAULT_I2C_BUS_SDA (&pin_PA23) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB12) +#define DEFAULT_SPI_BUS_MISO (&pin_PB11) + +#define DEFAULT_UART_BUS_RX (&pin_PA13) +#define DEFAULT_UART_BUS_TX (&pin_PA12) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.mk new file mode 100644 index 0000000000000..13863e565fece --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.mk @@ -0,0 +1,17 @@ +LD_FILE = boards/samd51x20-bootloader-external-flash.ld +USB_VID = 0x1b4f +USB_PID = 0x0016 # Used by uf2 bootloader +USB_PRODUCT = "SparkFun SAMD51 Thing+" +USB_MANUFACTURER = "SparkFun Electronics" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = AT25SF041A +LONGINT_IMPL = MPZ + +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 +CIRCUITPY_PS2IO = 1 diff --git a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/pins.c b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/pins.c new file mode 100644 index 0000000000000..a9ac6d98a9598 --- /dev/null +++ b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/pins.c @@ -0,0 +1,37 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA13) }, // D0 == RX + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA12) }, // D1 == TX + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/stringcar_m0_express/board.c b/ports/atmel-samd/boards/stringcar_m0_express/board.c new file mode 100644 index 0000000000000..d7e856d611991 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/board.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h new file mode 100644 index 0000000000000..02a6e7f7ce269 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.h @@ -0,0 +1,43 @@ +#define MICROPY_HW_BOARD_NAME "Cedar Grove StringCar M0 Express" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA10) + +#define MICROPY_HW_APA102_MOSI (&pin_PA00) +#define MICROPY_HW_APA102_SCK (&pin_PA01) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA11 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA05) +#define DEFAULT_I2C_BUS_SDA (&pin_PA04) + +// #define DEFAULT_SPI_BUS_SCK (&pin_PB11) +// #define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +// #define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +// #define DEFAULT_UART_BUS_RX (&pin_PA11) +// #define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Not connected +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA23 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 diff --git a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk new file mode 100644 index 0000000000000..20feabd189051 --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk @@ -0,0 +1,23 @@ +USB_VID = 0x239A +USB_PID = 0x8060 +USB_PRODUCT = "StringCar M0 Express" +USB_MANUFACTURER = "Cedar Grove Studios" +USB_INTERFACE_NAME = "StringCarM0Ex" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = AT25SF161 +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANG_APA102 = 1 + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_RTC = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/stringcar_m0_express/pins.c b/ports/atmel-samd/boards/stringcar_m0_express/pins.c new file mode 100644 index 0000000000000..8bdfae9541eaa --- /dev/null +++ b/ports/atmel-samd/boards/stringcar_m0_express/pins.c @@ -0,0 +1,23 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_PIEZO), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_SENSOR_IN), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MOTOR_OUT_1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOTOR_OUT_2), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_DOTSTAR_DI), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_DOTSTAR_CI), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/trellis_m4_express/board.c b/ports/atmel-samd/boards/trellis_m4_express/board.c new file mode 100644 index 0000000000000..a9b5f81631cf8 --- /dev/null +++ b/ports/atmel-samd/boards/trellis_m4_express/board.c @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "boards/board.h" +#include "py/mpconfig.h" + +#include "common-hal/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/neopixel_write/__init__.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + uint8_t zeroes[96]; + memset(zeroes, 0, 96); + digitalio_digitalinout_obj_t neopixel; + common_hal_digitalio_digitalinout_construct(&neopixel, &pin_PA27); + common_hal_digitalio_digitalinout_switch_to_output(&neopixel, false, DRIVE_MODE_PUSH_PULL); + common_hal_neopixel_write(&neopixel, zeroes, 96); + common_hal_digitalio_digitalinout_deinit(&neopixel); +} diff --git a/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.h new file mode 100644 index 0000000000000..96b38810c3e98 --- /dev/null +++ b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.h @@ -0,0 +1,24 @@ + +#define MICROPY_HW_BOARD_NAME "Adafruit Trellis M4 Express" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev D +#define MICROPY_HW_APA102_MOSI (&pin_PB03) +#define MICROPY_HW_APA102_SCK (&pin_PB02) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar Pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB02 | PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB08) +#define DEFAULT_I2C_BUS_SDA (&pin_PB09) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk new file mode 100644 index 0000000000000..ee82b99c90c94 --- /dev/null +++ b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x8030 +USB_PRODUCT = "Trellis M4 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 + +CIRCUITPY_BITBANG_APA102 = 1 diff --git a/ports/atmel-samd/boards/trellis_m4_express/pins.c b/ports/atmel-samd/boards/trellis_m4_express/pins.c new file mode 100644 index 0000000000000..4a0fa3ca211fb --- /dev/null +++ b/ports/atmel-samd/boards/trellis_m4_express/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, // INT pin + { MP_OBJ_NEW_QSTR(MP_QSTR_MICOUT), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MICIN), MP_ROM_PTR(&pin_PA07) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_PA13) }, + + // Key Grid columns + { MP_OBJ_NEW_QSTR(MP_QSTR_COL0), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL1), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL2), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL3), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL4), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL5), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL6), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_COL7), MP_ROM_PTR(&pin_PA23) }, + // Key Grid rows + { MP_OBJ_NEW_QSTR(MP_QSTR_ROW0), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ROW1), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ROW2), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ROW3), MP_ROM_PTR(&pin_PB23) }, + + // IRQ/GPIO pin + { MP_OBJ_NEW_QSTR(MP_QSTR_INT), MP_ROM_PTR(&pin_PA04) }, + + // NeoPixels + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PB02) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h index 05033ad38b9e7..69517534ee376 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h @@ -2,15 +2,66 @@ #define MICROPY_HW_MCU_NAME "samd21e18" // Rev B - Black +#define MICROPY_HW_LED_STATUS (&pin_PA10) + #define MICROPY_HW_APA102_MOSI (&pin_PA00) #define MICROPY_HW_APA102_SCK (&pin_PA01) -#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#include "internal_flash.h" +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA11 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA16 1 +#define IGNORE_PIN_PA17 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA19 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA22 1 +#define IGNORE_PIN_PA23 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000) +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk index 43d07eb5ffee3..5c942901a8001 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk @@ -1,10 +1,18 @@ -LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x801F USB_PRODUCT = "Trinket M0" USB_MANUFACTURER = "Adafruit Industries LLC" -INTERNAL_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +CFLAGS_INLINE_LIMIT = 35 +endif diff --git a/ports/atmel-samd/boards/trinket_m0/pins.c b/ports/atmel-samd/boards/trinket_m0/pins.c index ac5898600943d..372601e6287e5 100644 --- a/ports/atmel-samd/boards/trinket_m0/pins.c +++ b/ports/atmel-samd/boards/trinket_m0/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, @@ -27,5 +27,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h index 340e25e59bccf..af473b1288e3c 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h @@ -2,55 +2,32 @@ #define MICROPY_HW_MCU_NAME "samd21e18" // Rev B - Black +#define MICROPY_HW_LED_STATUS (&pin_PA10) // #define MICROPY_HW_APA102_MOSI (&pin_PA00) // #define MICROPY_HW_APA102_SCK (&pin_PA01) -// Salae reads 12mhz which is the limit even though we set it to the -// safer 8mhz. -#define SPI_FLASH_BAUDRATE (8000000) - -#define SPI_FLASH_MOSI_PIN PIN_PA16 -#define SPI_FLASH_MISO_PIN PIN_PA19 -#define SPI_FLASH_SCK_PIN PIN_PA17 -#define SPI_FLASH_CS_PIN PIN_PA11 -#define SPI_FLASH_MOSI_PIN_FUNCTION PINMUX_PA16D_SERCOM3_PAD0 -#define SPI_FLASH_MISO_PIN_FUNCTION PINMUX_PA19D_SERCOM3_PAD3 -#define SPI_FLASH_SCK_PIN_FUNCTION PINMUX_PA17D_SERCOM3_PAD1 -#define SPI_FLASH_SERCOM SERCOM3 -#define SPI_FLASH_SERCOM_INDEX 3 -#define SPI_FLASH_MOSI_PAD 0 -#define SPI_FLASH_MISO_PAD 3 -#define SPI_FLASH_SCK_PAD 1 -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -#define SPI_FLASH_DOPO 0 -#define SPI_FLASH_DIPO 3 // same as MISO pad - -#define SPI_FLASH_CS PIN_PA11 +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA11 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA11 | PORT_PA16 |\ - PORT_PA17 | PORT_PA18 | PORT_PA19 | PORT_PA24 |\ - PORT_PA25) +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA18) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) #define CALIBRATE_CRYSTALLESS 1 -#include "external_flash/external_flash.h" +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -//#define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) -#include "external_flash/devices.h" +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) -#define EXTERNAL_FLASH_DEVICE_COUNT 1 -#define EXTERNAL_FLASH_DEVICES W25Q32BV - -#include "external_flash/external_flash.h" +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk index a904b2837c5ea..bd6c9c9ff7efb 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk @@ -1,10 +1,18 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld USB_VID = 0x239A USB_PID = 0x801F USB_PRODUCT="Trinket M0 Haxpress" USB_MANUFACTURER="Radomir Dopieralski" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q32BV +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/pins.c b/ports/atmel-samd/boards/trinket_m0_haxpress/pins.c index ac5898600943d..372601e6287e5 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/pins.c +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/pins.c @@ -1,4 +1,4 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA08) }, @@ -27,5 +27,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/uartlogger2/board.c b/ports/atmel-samd/boards/uartlogger2/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/uartlogger2/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/uartlogger2/mpconfigboard.h b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.h new file mode 100644 index 0000000000000..bd341d3039ab7 --- /dev/null +++ b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "UARTLogger II" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_TX (&pin_PB07) +#define MICROPY_HW_LED_RX (&pin_PB06) + +#define MICROPY_HW_LED_STATUS (&pin_PA16) + +#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB11 | PORT_PB10 | PORT_PB22) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk new file mode 100644 index 0000000000000..498429c9e8def --- /dev/null +++ b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8096 +USB_PRODUCT = "UARTLogger II" +USB_MANUFACTURER = "Szymon Klause" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/uartlogger2/pins.c b/ports/atmel-samd/boards/uartlogger2/pins.c new file mode 100644 index 0000000000000..4e90870c49e3a --- /dev/null +++ b/ports/atmel-samd/boards/uartlogger2/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB09) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_PA16) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA07) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX),MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX),MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/uchip/board.c b/ports/atmel-samd/boards/uchip/board.c new file mode 100644 index 0000000000000..0f60736a24006 --- /dev/null +++ b/ports/atmel-samd/boards/uchip/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.h b/ports/atmel-samd/boards/uchip/mpconfigboard.h new file mode 100644 index 0000000000000..1877a41ef963b --- /dev/null +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.h @@ -0,0 +1,53 @@ +#define MICROPY_HW_BOARD_NAME "uChip" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA07) + +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01 | PORT_PA14 | PORT_PA15 | PORT_PA28 | PORT_PA27 | PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// No microcontroller.nvm +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 + +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA19) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.mk b/ports/atmel-samd/boards/uchip/mpconfigboard.mk new file mode 100644 index 0000000000000..950910e48bbbf --- /dev/null +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.mk @@ -0,0 +1,11 @@ +USB_VID = 0x04D8 +USB_PID = 0xED5F +USB_PRODUCT = "uChip CircuitPython" +USB_MANUFACTURER = "Itaca Innovation" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 diff --git a/ports/atmel-samd/boards/uchip/pins.c b/ports/atmel-samd/boards/uchip/pins.c new file mode 100644 index 0000000000000..856a220742e30 --- /dev/null +++ b/ports/atmel-samd/boards/uchip/pins.c @@ -0,0 +1,35 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/ugame10/board.c b/ports/atmel-samd/boards/ugame10/board.c index d7e856d611991..07814d558b649 100644 --- a/ports/atmel-samd/boards/ugame10/board.c +++ b/ports/atmel-samd/boards/ugame10/board.c @@ -26,7 +26,92 @@ #include "boards/board.h" +#include "shared-bindings/board/__init__.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "shared-bindings/busio/SPI.h" + +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x2a, 0, // _INVOFF + 0x36, 1, 0xa0, // _MADCTL bottom to top refresh + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 16, 0x02, 0x1c, 0x07, 0x12, // _GMCTRP1 Gamma + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, + 0xe1, 16, 0x03, 0x1d, 0x07, 0x06, // _GMCTRN1 + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, + 0x2a, 3, 0x02, 0x00, 0x81, // _CASET XSTART = 2, XEND = 129 + 0x2b, 3, 0x02, 0x00, 0x81, // _RASET XSTART = 2, XEND = 129 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + void board_init(void) { + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + busio_spi_obj_t *spi = common_hal_board_create_spi(); + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PA09, // Command or data + &pin_PA08, // Chip select + NULL, // Reset + 24000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 128, // Width + 128, // Height + 3, // column start + 2, // row start + 0, // rotation + 16, // Color depth + false, // grayscale + false, // pixels in byte share row. Only used with depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + NULL, + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness + false, // auto_brightness + false, // single_byte_bounds + false, // data as commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/ugame10/brutalist-6.bdf b/ports/atmel-samd/boards/ugame10/brutalist-6.bdf new file mode 100644 index 0000000000000..f9e21e76a9dc9 --- /dev/null +++ b/ports/atmel-samd/boards/ugame10/brutalist-6.bdf @@ -0,0 +1,1147 @@ +STARTFONT 2.1 +FONT -FontForge-Brutalist-Regular-R-Normal--6-60-75-75-P-40-ISO8859-1 +SIZE 6 100 100 +FONTBOUNDINGBOX 4 6 0 0 +COMMENT "Generated by fontforge, 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SPI_FLASH_DIPO 3 // same as MISO pad +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA18 // These are pins not to reset. -#define MICROPY_PORT_A (PORT_PA16 | PORT_PA17 | PORT_PA18 | PORT_PA19 |\ - PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) #define CALIBRATE_CRYSTALLESS 1 -#include "external_flash/external_flash.h" - -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -//#define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) - -#include "external_flash/devices.h" - -#define EXTERNAL_FLASH_DEVICE_COUNT 1 -#define EXTERNAL_FLASH_DEVICES S25FL216K - -#include "external_flash/external_flash.h" +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) +#define DEFAULT_SPI_BUS_MISO (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) + +#define IGNORE_PIN_PB00 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk index 343115fbb4119..1c43369076887 100644 --- a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk @@ -1,11 +1,41 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld -#LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x801F USB_PRODUCT = "uGame10" USB_MANUFACTURER = "Radomir Dopieralski" -SPI_FLASH_FILESYSTEM = 1 - CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = S25FL216K +LONGINT_IMPL = NONE + +CIRCUITPY_STAGE = 1 +CIRCUITPY_MATH = 1 +CIRCUITPY_AUDIOIO = 1 +CIRCUITPY_ANALOGIO = 1 +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_DISPLAYIO = 1 + +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 + +FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/ugame10 + +CIRCUITPY_DISPLAY_FONT = $(TOP)/ports/atmel-samd/boards/ugame10/brutalist-6.bdf + +# Tweak inlining depending on language. +ifeq ($(TRANSLATION), zh_Latn_pinyin) +CFLAGS_INLINE_LIMIT = 45 +else +CFLAGS_INLINE_LIMIT = 70 +endif diff --git a/ports/atmel-samd/boards/ugame10/pins.c b/ports/atmel-samd/boards/ugame10/pins.c index af516a401d9fc..4a03f8bb5c3b4 100644 --- a/ports/atmel-samd/boards/ugame10/pins.c +++ b/ports/atmel-samd/boards/ugame10/pins.c @@ -1,4 +1,5 @@ -#include "samd21_pins.h" +#include "shared-bindings/board/__init__.h" +#include "shared-module/displayio/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_X), MP_ROM_PTR(&pin_PA00) }, @@ -23,5 +24,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_B), MP_ROM_PTR(&pin_PA14) }, { MP_ROM_QSTR(MP_QSTR_C), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_D), MP_ROM_PTR(&pin_PA28) }, + + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/winterbloom_big_honking_button/board.c b/ports/atmel-samd/boards/winterbloom_big_honking_button/board.c new file mode 100644 index 0000000000000..c8e20206a19fa --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_big_honking_button/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.h b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.h new file mode 100644 index 0000000000000..8d520f675b252 --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Winterbloom Big Honking Button" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_LED_STATUS (&pin_PA17) + +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_SCK_PIN &pin_PB23 +#define SPI_FLASH_CS_PIN &pin_PA27 + +// These are pins not to reset. +#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 0 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk new file mode 100644 index 0000000000000..d91369f75e240 --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk @@ -0,0 +1,32 @@ +# Adafruit +USB_VID = 0x239A +# Allocated for Big Honking Button at https://github.com/adafruit/circuitpython/issues/2715 +USB_PID = 0x6005 +USB_PRODUCT = "Big Honking Button" +USB_MANUFACTURER = "Winterbloom" +USB_DEVICES = "CDC,MSC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" +LONGINT_IMPL = MPZ + +CIRCUITPY_AUDIOIO = 1 + +# Disable modules that are unusable on this special-purpose board. +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BLEIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_PS2IO = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_RTC = 0 diff --git a/ports/atmel-samd/boards/winterbloom_big_honking_button/pins.c b/ports/atmel-samd/boards/winterbloom_big_honking_button/pins.c new file mode 100644 index 0000000000000..f325529f397be --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_big_honking_button/pins.c @@ -0,0 +1,10 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_HONK_OUT), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_GATE_OUT), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_GATE_IN), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PITCH_IN), MP_ROM_PTR(&pin_PB08) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/winterbloom_sol/board.c b/ports/atmel-samd/boards/winterbloom_sol/board.c new file mode 100644 index 0000000000000..8096b9b8ea6d8 --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h new file mode 100644 index 0000000000000..86b1ad8a03b6b --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.h @@ -0,0 +1,27 @@ +#define MICROPY_HW_BOARD_NAME "Winterbloom Sol" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB03) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk new file mode 100644 index 0000000000000..166eaad3f7574 --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk @@ -0,0 +1,32 @@ +# Adafruit +USB_VID = 0x239A +# Allocated for Winterbloom Sol +# https://github.com/adafruit/circuitpython/issues/2217 +USB_PID = 0x8062 +USB_PRODUCT = "Sol" +USB_MANUFACTURER = "Winterbloom" +USB_INTERFACE_NAME = "Sol" +USB_DEVICES = "CDC,MSC,AUDIO" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "GD25Q64C, W25Q32JV_IQ" +LONGINT_IMPL = MPZ + +# Disable modules that are unusable on this special-purpose board. +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_BLEIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NETWORK = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_PS2IO = 0 +CIRCUITPY_USB_HID = 0 + +# Enable micropython.native +CIRCUITPY_ENABLE_MPY_NATIVE = 1 diff --git a/ports/atmel-samd/boards/winterbloom_sol/pins.c b/ports/atmel-samd/boards/winterbloom_sol/pins.c new file mode 100644 index 0000000000000..013542d3ca8df --- /dev/null +++ b/ports/atmel-samd/boards/winterbloom_sol/pins.c @@ -0,0 +1,15 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_DAC_CS), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/xinabox_cc03/board.c b/ports/atmel-samd/boards/xinabox_cc03/board.c new file mode 100644 index 0000000000000..770bc825938cd --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cc03/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.h b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.h new file mode 100644 index 0000000000000..4690ed34166fa --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.h @@ -0,0 +1,24 @@ +#define MICROPY_HW_BOARD_NAME "XinaBox CC03" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk new file mode 100644 index 0000000000000..941d88b459409 --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk @@ -0,0 +1,26 @@ +LD_FILE = boards/samd21x18-bootloader.ld +USB_VID = 0x04D8 +USB_PID = 0xEC72 +USB_PRODUCT = "XinaBox CC03" +USB_MANUFACTURER = "XinaBox" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + +# Make room for frozen libs. +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_ANALOGIO=0 +CIRCUITPY_NEOPIXEL_WRITE=0 +CIRCUITPY_PULSEIO=0 +CIRCUITPY_ROTARYIO=0 +CIRCUITPY_TOUCHIO_USE_NATIVE=0 +CIRCUITPY_TOUCHIO=0 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice diff --git a/ports/atmel-samd/boards/xinabox_cc03/pins.c b/ports/atmel-samd/boards/xinabox_cc03/pins.c new file mode 100644 index 0000000000000..f7c035d0b2ad8 --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cc03/pins.c @@ -0,0 +1,15 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_RED), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_GREEN), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_BLUE), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) } +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/xinabox_cs11/board.c b/ports/atmel-samd/boards/xinabox_cs11/board.c new file mode 100644 index 0000000000000..770bc825938cd --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cs11/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.h b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.h new file mode 100644 index 0000000000000..9699568dad5f1 --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.h @@ -0,0 +1,24 @@ +#define MICROPY_HW_BOARD_NAME "XinaBox CS11" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) + +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_UART_BUS_TX (&pin_PA10) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk new file mode 100644 index 0000000000000..5c418d312cd0e --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk @@ -0,0 +1,29 @@ +LD_FILE = boards/samd21x18-bootloader.ld +USB_VID = 0x04D8 +USB_PID = 0xEC75 +USB_PRODUCT = "XinaBox CS11" +USB_MANUFACTURER = "XinaBox" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + +# Make room for frozen libs. +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_ANALOGIO=0 +CIRCUITPY_NEOPIXEL_WRITE=0 +CIRCUITPY_PULSEIO=0 +CIRCUITPY_ROTARYIO=0 +CIRCUITPY_TOUCHIO_USE_NATIVE=0 +CIRCUITPY_TOUCHIO=0 +CIRCUITPY_USB_MIDI=0 +CIRCUITPY_RTC=0 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD diff --git a/ports/atmel-samd/boards/xinabox_cs11/pins.c b/ports/atmel-samd/boards/xinabox_cs11/pins.c new file mode 100644 index 0000000000000..f0ef0da67464c --- /dev/null +++ b/ports/atmel-samd/boards/xinabox_cs11/pins.c @@ -0,0 +1,20 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_ALERT), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RED), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_GREEN), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_BLUE), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) } +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/common-hal/analogio/AnalogIn.c b/ports/atmel-samd/common-hal/analogio/AnalogIn.c index 84e0ccde3403b..2bd218cddaaa7 100644 --- a/ports/atmel-samd/common-hal/analogio/AnalogIn.c +++ b/ports/atmel-samd/common-hal/analogio/AnalogIn.c @@ -34,7 +34,9 @@ #include "py/binary.h" #include "py/mphal.h" +#include "samd/adc.h" #include "shared-bindings/analogio/AnalogIn.h" +#include "supervisor/shared/translate.h" #include "atmel_start_pins.h" #include "hal/include/hal_adc_sync.h" @@ -58,11 +60,11 @@ void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, } if (adc_channel == 0xff) { // No ADC function on that pin - mp_raise_ValueError("Pin does not have ADC capabilities"); + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); } claim_pin(pin); - gpio_set_pin_function(pin->pin, GPIO_PIN_FUNCTION_B); + gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_B); static Adc* adc_insts[] = ADC_INSTS; self->instance = adc_insts[adc_index]; @@ -71,15 +73,15 @@ void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, } bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { if (common_hal_analogio_analogin_deinited(self)) { return; } - reset_pin(self->pin->pin); - self->pin = mp_const_none; + reset_pin_number(self->pin->number); + self->pin = NULL; } void analogin_reset() { @@ -89,57 +91,20 @@ uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { // Something else might have used the ADC in a different way, // so we completely re-initialize it. - // Turn the clocks on. - #ifdef SAMD51 - if (self->instance == ADC0) { - hri_mclk_set_APBDMASK_ADC0_bit(MCLK); - hri_gclk_write_PCHCTRL_reg(GCLK, ADC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos)); - } else if (self->instance == ADC1) { - hri_mclk_set_APBDMASK_ADC1_bit(MCLK); - hri_gclk_write_PCHCTRL_reg(GCLK, ADC1_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos)); - } - #endif + struct adc_sync_descriptor adc; - #ifdef SAMD21 - _pm_enable_bus_clock(PM_BUS_APBC, ADC); - _gclk_enable_channel(ADC_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); - #endif + samd_peripherals_adc_setup(&adc, self->instance); - struct adc_sync_descriptor adc; - adc_sync_init(&adc, self->instance, (void *)NULL); - adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTVCC1_Val); - adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + // Full scale is 3.3V (VDDANA) = 65535. + // On SAMD21, INTVCC1 is 0.5*VDDANA. On SAMD51, INTVCC1 is 1*VDDANA. + // So on SAMD21 only, divide the input by 2, so full scale will match 0.5*VDDANA. + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTVCC1_Val); #ifdef SAMD21 adc_sync_set_channel_gain(&adc, self->channel, ADC_INPUTCTRL_GAIN_DIV2_Val); - - // Load the factory calibration - hri_adc_write_CALIB_BIAS_CAL_bf(ADC, (*((uint32_t*) ADC_FUSES_BIASCAL_ADDR) & ADC_FUSES_BIASCAL_Msk) >> ADC_FUSES_BIASCAL_Pos); - // Bits 7:5 - uint16_t linearity = ((*((uint32_t*) ADC_FUSES_LINEARITY_1_ADDR) & ADC_FUSES_LINEARITY_1_Msk) >> ADC_FUSES_LINEARITY_1_Pos) << 5; - // Bits 4:0 - linearity |= (*((uint32_t*) ADC_FUSES_LINEARITY_0_ADDR) & ADC_FUSES_LINEARITY_0_Msk) >> ADC_FUSES_LINEARITY_0_Pos; - hri_adc_write_CALIB_LINEARITY_CAL_bf(ADC, linearity); #endif - // SAMD51 has a CALIB register but doesn't have documented fuses for them. - #ifdef SAMD51 - uint8_t biasrefbuf; - uint8_t biasr2r; - uint8_t biascomp; - if (self->instance == ADC0) { - biasrefbuf = ((*(uint32_t*) ADC0_FUSES_BIASREFBUF_ADDR) & ADC0_FUSES_BIASREFBUF_Msk) >> ADC0_FUSES_BIASREFBUF_Pos; - biasr2r = ((*(uint32_t*) ADC0_FUSES_BIASR2R_ADDR) & ADC0_FUSES_BIASR2R_Msk) >> ADC0_FUSES_BIASR2R_Pos; - biascomp = ((*(uint32_t*) ADC0_FUSES_BIASCOMP_ADDR) & ADC0_FUSES_BIASCOMP_Msk) >> ADC0_FUSES_BIASCOMP_Pos; - } else { - biasrefbuf = ((*(uint32_t*) ADC1_FUSES_BIASREFBUF_ADDR) & ADC1_FUSES_BIASREFBUF_Msk) >> ADC1_FUSES_BIASREFBUF_Pos; - biasr2r = ((*(uint32_t*) ADC1_FUSES_BIASR2R_ADDR) & ADC1_FUSES_BIASR2R_Msk) >> ADC1_FUSES_BIASR2R_Pos; - biascomp = ((*(uint32_t*) ADC1_FUSES_BIASCOMP_ADDR) & ADC1_FUSES_BIASCOMP_Msk) >> ADC1_FUSES_BIASCOMP_Pos; - } - hri_adc_write_CALIB_BIASREFBUF_bf(self->instance, biasrefbuf); - hri_adc_write_CALIB_BIASR2R_bf(self->instance, biasr2r); - hri_adc_write_CALIB_BIASCOMP_bf(self->instance, biascomp); - #endif + adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); adc_sync_enable_channel(&adc, self->channel); diff --git a/ports/atmel-samd/common-hal/analogio/AnalogOut.c b/ports/atmel-samd/common-hal/analogio/AnalogOut.c index 97299a8634cde..9ac1f7bd15c98 100644 --- a/ports/atmel-samd/common-hal/analogio/AnalogOut.c +++ b/ports/atmel-samd/common-hal/analogio/AnalogOut.c @@ -31,7 +31,9 @@ #include "py/runtime.h" #include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/audioio/AudioOut.h" #include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" #include "atmel_start_pins.h" #include "hal/include/hal_dac_sync.h" @@ -42,24 +44,23 @@ #include "hpl/pm/hpl_pm_base.h" #endif -#ifdef SAMD51 -#include "samd51_pins.h" -#endif - void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - if (pin->pin != PIN_PA02 + #if defined(SAMD21) && !defined(PIN_PA02) + mp_raise_NotImplementedError(translate("No DAC on chip")); + #else + if (pin->number != PIN_PA02 #ifdef SAMD51 - && pin->pin != PIN_PA05 + && pin->number != PIN_PA05 #endif ) { - mp_raise_ValueError("AnalogOut not supported on given pin"); + mp_raise_ValueError(translate("AnalogOut not supported on given pin")); return; } self->channel = 0; #ifdef SAMD51 - if (pin->pin == PIN_PA05) { + if (pin->number == PIN_PA05) { self->channel = 1; } #endif @@ -73,7 +74,7 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, #endif // SAMD21: This clock should be <= 12 MHz, per datasheet section 47.6.3. - // SAMD51: This clock should be <= 350kHz, per datasheet table 37-6. + // SAMD51: This clock should be <= 350kHz, per datasheet table 37-6. _gclk_enable_channel(DAC_GCLK_ID, CONF_GCLK_DAC_SRC); // Don't double init the DAC on the SAMD51 when both outputs are in use. We use the free state @@ -97,9 +98,10 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, } claim_pin(pin); - gpio_set_pin_function(pin->pin, GPIO_PIN_FUNCTION_B); + gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_B); dac_sync_enable_channel(&self->descriptor, self->channel); + #endif } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { @@ -107,11 +109,12 @@ bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { + #if (defined(SAMD21) && defined(PIN_PA02)) || defined(SAMD51) if (common_hal_analogio_analogout_deinited(self)) { return; } dac_sync_disable_channel(&self->descriptor, self->channel); - reset_pin(PIN_PA02); + reset_pin_number(PIN_PA02); // Only deinit the DAC on the SAMD51 if both outputs are free. #ifdef SAMD51 if (common_hal_mcu_pin_is_free(&pin_PA02) && common_hal_mcu_pin_is_free(&pin_PA05)) { @@ -122,16 +125,25 @@ void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { #endif self->deinited = true; // TODO(tannewt): Turn off the DAC clocks to save power. + #endif } void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { + #if defined(SAMD21) && !defined(PIN_PA02) + return; + #endif // Input is 16 bit so make sure and set LEFTADJ to 1 so it takes the top // bits. This is currently done in asf4_conf/*/hpl_dac_config.h. dac_sync_write(&self->descriptor, self->channel, &value, 1); } void analogout_reset(void) { + // audioout_reset also resets the DAC, and does a smooth ramp down to avoid clicks + // if it was enabled, so do that instead if AudioOut is enabled. +#if CIRCUITPY_AUDIOIO + audioout_reset(); +#else #ifdef SAMD21 while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} #endif @@ -139,6 +151,5 @@ void analogout_reset(void) { while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) {} #endif DAC->CTRLA.reg |= DAC_CTRLA_SWRST; - - // TODO(tannewt): Turn off the DAC clocks to save power. +#endif } diff --git a/ports/atmel-samd/common-hal/audiobusio/I2SOut.c b/ports/atmel-samd/common-hal/audiobusio/I2SOut.c new file mode 100644 index 0000000000000..8f827e7fbadbe --- /dev/null +++ b/ports/atmel-samd/common-hal/audiobusio/I2SOut.c @@ -0,0 +1,384 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "extmod/vfs_fat.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/audiobusio/I2SOut.h" +#include "shared-bindings/audiobusio/I2SOut.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" +#include "hpl/gclk/hpl_gclk_base.h" +#include "peripheral_clk_config.h" + +#ifdef SAMD21 +#include "hpl/pm/hpl_pm_base.h" +#endif + +#include "samd/clocks.h" +#include "samd/dma.h" +#include "samd/events.h" +#include "samd/i2s.h" +#include "samd/pins.h" +#include "samd/timers.h" + +#include "audio_dma.h" + +#ifdef SAMD21 +#define SERCTRL(name) I2S_SERCTRL_ ## name +#endif + +#ifdef SAMD51 +#define SERCTRL(name) I2S_TXCTRL_ ## name +#endif + +void i2sout_reset(void) { + // Make sure the I2S peripheral is running so we can see if the resources we need are free. + #ifdef SAMD51 + // Connect the clock units to the 2mhz clock. It can't disable without it. + connect_gclk_to_peripheral(5, I2S_GCLK_ID_0); + connect_gclk_to_peripheral(5, I2S_GCLK_ID_1); + #endif + if (I2S->CTRLA.bit.ENABLE == 1) { + I2S->CTRLA.bit.ENABLE = 0; + while (I2S->SYNCBUSY.bit.ENABLE == 1) {} + } + + // Make sure the I2S peripheral is running so we can see if the resources we need are free. + #ifdef SAMD51 + // Connect the clock units to the 2mhz clock by default. They can't reset without it. + disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_0); + disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_1); + + hri_mclk_clear_APBDMASK_I2S_bit(MCLK); + #endif + + #ifdef SAMD21 + _pm_disable_bus_clock(PM_BUS_APBC, I2S); + #endif +} + +// Caller validates that pins are free. +void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t* self, + const mcu_pin_obj_t* bit_clock, const mcu_pin_obj_t* word_select, + const mcu_pin_obj_t* data, bool left_justified) { + uint8_t serializer = 0xff; + uint8_t bc_clock_unit = 0xff; + uint8_t ws_clock_unit = 0xff; + #ifdef SAMD21 + if (bit_clock == &pin_PA10 + #ifdef PIN_PA20 + || bit_clock == &pin_PA20 + #endif + ) { // I2S SCK[0] + bc_clock_unit = 0; + } + #ifdef PIN_PB11 + else if (bit_clock == &pin_PB11) { // I2S SCK[1] + bc_clock_unit = 1; + } + #endif + if (word_select == &pin_PA11 + #ifdef PIN_PA21 + || word_select == &pin_PA21 + #endif + ) { // I2S FS[0] + ws_clock_unit = 0; + } + #ifdef PIN_PB12 + else if (word_select == &pin_PB12) { // I2S FS[1] + ws_clock_unit = 1; + } + #endif + + if (data == &pin_PA07 || data == &pin_PA19) { // I2S SD[0] + serializer = 0; + } else if (data == &pin_PA08 + #ifdef PIN_PB16 + || data == &pin_PB16 + #endif + ) { // I2S SD[1] + serializer = 1; + } + #endif + #ifdef SAMD51 + // Only clock unit 0 can be used for transmission. + if (bit_clock == &pin_PA10 || bit_clock == &pin_PB16) { // I2S SCK[0] + bc_clock_unit = 0; + } + if (word_select == &pin_PA09 || word_select == &pin_PA20) { // I2S FS[0] + ws_clock_unit = 0; + } + if (data == &pin_PA11 || data == &pin_PA21) { // I2S SDO + serializer = 0; + } + #endif + if (bc_clock_unit == 0xff) { + mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_bit_clock); + } + if (ws_clock_unit == 0xff) { + mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_word_select); + } + if (bc_clock_unit != ws_clock_unit) { + mp_raise_ValueError(translate("Bit clock and word select must share a clock unit")); + } + if (serializer == 0xff) { + mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_data); + } + self->clock_unit = ws_clock_unit; + self->serializer = serializer; + + turn_on_i2s(); + + if (I2S->CTRLA.bit.ENABLE == 0) { + I2S->CTRLA.bit.SWRST = 1; + while (I2S->CTRLA.bit.SWRST == 1) {} + } else { + #ifdef SAMD21 + if ((I2S->CTRLA.vec.SEREN & (1 << serializer)) != 0) { + mp_raise_RuntimeError(translate("Serializer in use")); + } + #endif + #ifdef SAMD51 + if (I2S->CTRLA.bit.TXEN == 1) { + mp_raise_RuntimeError(translate("Serializer in use")); + } + #endif + } + + #ifdef SAMD51 + #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_J + #endif + #ifdef SAMD21 + #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_G + #endif + + self->bit_clock = bit_clock; + self->word_select = word_select; + self->data = data; + + claim_pin(bit_clock); + claim_pin(word_select); + claim_pin(data); + + gpio_set_pin_function(self->bit_clock->number, GPIO_I2S_FUNCTION); + gpio_set_pin_function(self->word_select->number, GPIO_I2S_FUNCTION); + gpio_set_pin_function(self->data->number, GPIO_I2S_FUNCTION); + + self->left_justified = left_justified; + self->playing = false; + audio_dma_init(&self->dma); +} + +bool common_hal_audiobusio_i2sout_deinited(audiobusio_i2sout_obj_t* self) { + return self->bit_clock == NULL; +} + +void common_hal_audiobusio_i2sout_deinit(audiobusio_i2sout_obj_t* self) { + if (common_hal_audiobusio_i2sout_deinited(self)) { + return; + } + + reset_pin_number(self->bit_clock->number); + self->bit_clock = NULL; + reset_pin_number(self->word_select->number); + self->word_select = NULL; + reset_pin_number(self->data->number); + self->data = NULL; +} + +void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, + mp_obj_t sample, bool loop) { + if (common_hal_audiobusio_i2sout_get_playing(self)) { + common_hal_audiobusio_i2sout_stop(self); + } + #ifdef SAMD21 + if ((I2S->CTRLA.vec.CKEN & (1 << self->clock_unit)) == 1) { + mp_raise_RuntimeError(translate("Clock unit in use")); + } + #endif + uint8_t bits_per_sample = audiosample_bits_per_sample(sample); + // We always output stereo so output twice as many bits. + uint16_t bits_per_sample_output = bits_per_sample * 2; + uint16_t divisor = 48000000 / (bits_per_sample_output * audiosample_sample_rate(sample)); + // Find a free GCLK to generate the MCLK signal. + uint8_t gclk = find_free_gclk(divisor); + if (gclk > GCLK_GEN_NUM) { + mp_raise_RuntimeError(translate("Unable to find free GCLK")); + } + self->gclk = gclk; + + uint32_t clkctrl = I2S_CLKCTRL_MCKSEL_GCLK | + I2S_CLKCTRL_NBSLOTS(1) | + I2S_CLKCTRL_FSWIDTH_HALF; + if (self->left_justified) { + clkctrl |= I2S_CLKCTRL_BITDELAY_LJ; + } else { + clkctrl |= I2S_CLKCTRL_FSOUTINV | I2S_CLKCTRL_BITDELAY_I2S; + } + uint8_t channel_count = audiosample_channel_count(sample); + if (channel_count > 2) { + mp_raise_ValueError(translate("Too many channels in sample.")); + } + #ifdef SAMD21 + uint32_t serctrl = (self->clock_unit << I2S_SERCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_TX) | I2S_SERCTRL_TXSAME_SAME | I2S_SERCTRL_EXTEND_MSBIT | I2S_SERCTRL_TXDEFAULT_ONE | I2S_SERCTRL_SLOTADJ_LEFT; + #endif + #ifdef SAMD51 + uint32_t serctrl = (self->clock_unit << I2S_RXCTRL_CLKSEL_Pos) | I2S_TXCTRL_TXSAME_SAME; + #endif + if (audiosample_channel_count(sample) == 1) { + serctrl |= SERCTRL(MONO_MONO); + } else { + serctrl |= SERCTRL(MONO_STEREO); + } + if (bits_per_sample == 8) { + serctrl |= SERCTRL(DATASIZE_8C); + clkctrl |= I2S_CLKCTRL_SLOTSIZE_8; + } else if (bits_per_sample == 16) { + serctrl |= SERCTRL(DATASIZE_16C); + clkctrl |= I2S_CLKCTRL_SLOTSIZE_16; + } + + // Configure the I2S peripheral + i2s_set_enable(false); + + I2S->CLKCTRL[self->clock_unit].reg = clkctrl; + #ifdef SAMD21 + I2S->SERCTRL[self->serializer].reg = serctrl; + #endif + #ifdef SAMD51 + I2S->TXCTRL.reg = serctrl; + #endif + + // The DFLL is always a 48mhz clock + enable_clock_generator(self->gclk, CLOCK_48MHZ, divisor); + connect_gclk_to_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit); + + i2s_set_enable(true); + + #ifdef SAMD21 + uint32_t tx_register = (uint32_t) &I2S->DATA[self->serializer].reg; + uint8_t dmac_id = I2S_DMAC_ID_TX_0 + self->serializer; + #endif + #ifdef SAMD51 + uint32_t tx_register = (uint32_t) &I2S->TXDATA.reg; + uint8_t dmac_id = I2S_DMAC_ID_TX_0; + #endif + audio_dma_result result = audio_dma_setup_playback(&self->dma, sample, loop, false, 0, + true /* output signed */, tx_register, dmac_id); + + if (result == AUDIO_DMA_DMA_BUSY) { + common_hal_audiobusio_i2sout_stop(self); + mp_raise_RuntimeError(translate("No DMA channel found")); + } else if (result == AUDIO_DMA_MEMORY_ERROR) { + common_hal_audiobusio_i2sout_stop(self); + mp_raise_RuntimeError(translate("Unable to allocate buffers for signed conversion")); + } + + I2S->INTFLAG.reg = I2S_INTFLAG_TXUR0 | I2S_INTFLAG_TXUR1; + + I2S->CTRLA.vec.CKEN = 1 << self->clock_unit; + while ((I2S->SYNCBUSY.vec.CKEN & (1 << self->clock_unit)) != 0) {} + + // Init the serializer after the clock. Otherwise, it will never enable because its unclocked. + #ifdef SAMD21 + I2S->CTRLA.vec.SEREN = 1 << self->serializer; + while ((I2S->SYNCBUSY.vec.SEREN & (1 << self->serializer)) != 0) {} + #endif + #ifdef SAMD51 + I2S->CTRLA.bit.TXEN = 1; + while (I2S->SYNCBUSY.bit.TXEN == 1) {} + #endif + + self->playing = true; +} + +void common_hal_audiobusio_i2sout_pause(audiobusio_i2sout_obj_t* self) { + audio_dma_pause(&self->dma); +} + +void common_hal_audiobusio_i2sout_resume(audiobusio_i2sout_obj_t* self) { + // Clear any overrun/underrun errors + #ifdef SAMD21 + I2S->INTFLAG.reg = I2S_INTFLAG_TXUR0 << self->serializer; + #endif + #ifdef SAMD51 + I2S->INTFLAG.reg = I2S_INTFLAG_TXUR0 | I2S_INTFLAG_TXUR1; + #endif + + audio_dma_resume(&self->dma); +} + +bool common_hal_audiobusio_i2sout_get_paused(audiobusio_i2sout_obj_t* self) { + return audio_dma_get_paused(&self->dma); +} + +void common_hal_audiobusio_i2sout_stop(audiobusio_i2sout_obj_t* self) { + audio_dma_stop(&self->dma); + + #ifdef SAMD21 + I2S->CTRLA.vec.SEREN &= ~(1 << self->serializer); + while ((I2S->SYNCBUSY.vec.SEREN & (1 << self->serializer)) != 0) {} + #endif + #ifdef SAMD51 + I2S->CTRLA.bit.TXEN = 0; + while (I2S->SYNCBUSY.bit.TXEN == 1) {} + #endif + + #ifdef SAMD21 + if (self->clock_unit == 0) { + I2S->CTRLA.bit.CKEN0 = 0; + while (I2S->SYNCBUSY.bit.CKEN0 == 1) {} + } else { + I2S->CTRLA.bit.CKEN1 = 0; + while (I2S->SYNCBUSY.bit.CKEN1 == 1) {} + } + #endif + disconnect_gclk_from_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit); + disable_clock_generator(self->gclk); + + #ifdef SAMD51 + connect_gclk_to_peripheral(5, I2S_GCLK_ID_0 + self->clock_unit); + #endif + + self->playing = false; +} + +bool common_hal_audiobusio_i2sout_get_playing(audiobusio_i2sout_obj_t* self) { + bool still_playing = audio_dma_get_playing(&self->dma); + if (self->playing && !still_playing) { + common_hal_audiobusio_i2sout_stop(self); + } + return still_playing; +} diff --git a/ports/atmel-samd/common-hal/audiobusio/I2SOut.h b/ports/atmel-samd/common-hal/audiobusio/I2SOut.h new file mode 100644 index 0000000000000..ce88f4de697bc --- /dev/null +++ b/ports/atmel-samd/common-hal/audiobusio/I2SOut.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_I2SOUT_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_I2SOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "audio_dma.h" +#include "py/obj.h" + +// We don't bit pack because we'll only have two at most. Its better to save code size instead. +typedef struct { + mp_obj_base_t base; + bool left_justified; + const mcu_pin_obj_t *bit_clock; + const mcu_pin_obj_t *word_select; + const mcu_pin_obj_t *data; + uint8_t clock_unit; + uint8_t serializer; + uint8_t gclk; + bool playing; + audio_dma_t dma; +} audiobusio_i2sout_obj_t; + +void i2sout_reset(void); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_I2SOUT_H diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c index 50d3b180ceec1..76e66ab45f3f3 100644 --- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c +++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -36,11 +36,19 @@ #include "shared-bindings/analogio/AnalogOut.h" #include "shared-bindings/audiobusio/PDMIn.h" #include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" -#include "asf/sam0/drivers/port/port.h" -#include "samd21_pins.h" +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" +#include "hal/utils/include/utils.h" -#include "shared_dma.h" +#include "samd/clocks.h" +#include "samd/events.h" +#include "samd/i2s.h" +#include "samd/pins.h" +#include "samd/dma.h" + +#include "audio_dma.h" #include "tick.h" #define OVERSAMPLING 64 @@ -49,6 +57,14 @@ // MEMS microphones must be clocked at at least 1MHz. #define MIN_MIC_CLOCK 1000000 +#ifdef SAMD21 +#define SERCTRL(name) I2S_SERCTRL_ ## name +#endif + +#ifdef SAMD51 +#define SERCTRL(name) I2S_RXCTRL_ ## name +#endif + void pdmin_reset(void) { while (I2S->SYNCBUSY.reg & I2S_SYNCBUSY_ENABLE) {} I2S->INTENCLR.reg = I2S_INTENCLR_MASK; @@ -58,190 +74,237 @@ void pdmin_reset(void) { I2S->CTRLA.reg = I2S_CTRLA_SWRST; } +// Caller validates that pins are free. void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, const mcu_pin_obj_t* clock_pin, const mcu_pin_obj_t* data_pin, - uint32_t frequency, + uint32_t sample_rate, uint8_t bit_depth, bool mono, uint8_t oversample) { self->clock_pin = clock_pin; // PA10, PA20 -> SCK0, PB11 -> SCK1 - if (clock_pin == &pin_PA10 - #ifdef PIN_PA20 - || clock_pin == &pin_PA20 + #ifdef SAMD21 + if (clock_pin == &pin_PA10 + #ifdef PIN_PA20 + || clock_pin == &pin_PA20 + #endif + ) { + self->clock_unit = 0; + #ifdef PIN_PB11 + } else if (clock_pin == &pin_PB11) { + self->clock_unit = 1; + #endif #endif + #ifdef SAMD51 + if (clock_pin == &pin_PA10 || clock_pin == &pin_PB16) { + self->clock_unit = 0; + } else if (clock_pin == &pin_PB12 + #ifdef PIN_PB28 + || data_pin == &pin_PB28) { + #else ) { - self->clock_unit = 0; - #ifdef PIN_PB11 - } else if (clock_pin == &pin_PB11) { - self->clock_unit = 1; + #endif + self->clock_unit = 1; #endif } else { - mp_raise_ValueError("Invalid clock pin"); + mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_clock); } self->data_pin = data_pin; // PA07, PA19 -> SD0, PA08, PB16 -> SD1 + #ifdef SAMD21 if (data_pin == &pin_PA07 || data_pin == &pin_PA19) { self->serializer = 0; } else if (data_pin == &pin_PA08 - #ifdef PB16 + #ifdef PIN_PB16 || data_pin == &pin_PB16) { #else ) { #endif self->serializer = 1; + #endif + #ifdef SAMD51 + if (data_pin == &pin_PB10 || data_pin == &pin_PA22) { + self->serializer = 1; + #endif } else { - mp_raise_ValueError("Invalid data pin"); + mp_raise_ValueError_varg(translate("Invalid %q pin"), MP_QSTR_data); } - claim_pin(clock_pin); - claim_pin(data_pin); + if (!(bit_depth == 16 || bit_depth == 8) || !mono || oversample != OVERSAMPLING) { + mp_raise_NotImplementedError(translate("Only 8 or 16 bit mono with " MP_STRINGIFY(OVERSAMPLING) "x oversampling is supported.")); + } - if (MP_STATE_VM(audiodma_block_counter) == NULL && - !allocate_block_counter()) { - mp_raise_RuntimeError("Unable to allocate audio DMA block counter."); + turn_on_i2s(); + + if (I2S->CTRLA.bit.ENABLE == 0) { + I2S->CTRLA.bit.SWRST = 1; + while (I2S->CTRLA.bit.SWRST == 1) {} + } else { + #ifdef SAMD21 + if ((I2S->CTRLA.vec.SEREN & (1 << self->serializer)) != 0) { + mp_raise_RuntimeError(translate("Serializer in use")); + } + #endif + #ifdef SAMD51 + if (I2S->CTRLA.bit.RXEN == 1) { + mp_raise_RuntimeError(translate("Serializer in use")); + } + #endif } + #ifdef SAMD51 + #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_J + #endif + #ifdef SAMD21 + #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_G + #endif - if (!(bit_depth == 16 || bit_depth == 8) || !mono || oversample != OVERSAMPLING) { - mp_raise_NotImplementedError("Only 8 or 16 bit mono with " MP_STRINGIFY(OVERSAMPLING) "x oversampling is supported."); + uint32_t clock_divisor = (uint32_t) roundf( 48000000.0f / sample_rate / oversample); + float mic_clock_freq = 48000000.0f / clock_divisor; + self->sample_rate = mic_clock_freq / oversample; + if (mic_clock_freq < MIN_MIC_CLOCK || clock_divisor == 0) { + mp_raise_ValueError(translate("sampling rate out of range")); + } + // Find a free GCLK to generate the MCLK signal. + uint8_t gclk = find_free_gclk(clock_divisor); + if (gclk > GCLK_GEN_NUM) { + mp_raise_RuntimeError(translate("Unable to find free GCLK")); } + self->gclk = gclk; - // TODO(tannewt): Use the DPLL to get a more precise sampling rate. - // DFLL -> GCLK (/600 for 8khz, /300 for 16khz and /150 for 32khz) -> DPLL (*(63 + 1)) -> GCLK ( / 10) -> 512khz + enable_clock_generator(self->gclk, CLOCK_48MHZ, clock_divisor); + connect_gclk_to_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit); - i2s_init(&self->i2s_instance, I2S); - struct i2s_clock_unit_config config_clock_unit; - i2s_clock_unit_get_config_defaults(&config_clock_unit); - config_clock_unit.clock.gclk_src = GCLK_GENERATOR_3; + // Clock unit configuration - config_clock_unit.clock.mck_src = I2S_MASTER_CLOCK_SOURCE_GCLK; - config_clock_unit.clock.mck_out_enable = false; + uint32_t clkctrl = I2S_CLKCTRL_MCKSEL_GCLK | + I2S_CLKCTRL_NBSLOTS(2) | + I2S_CLKCTRL_FSWIDTH_SLOT | + I2S_CLKCTRL_SLOTSIZE_16; - config_clock_unit.clock.sck_src = I2S_SERIAL_CLOCK_SOURCE_MCKDIV; - uint32_t clock_divisor = (uint32_t) roundf( 8000000.0f / frequency / oversample); - config_clock_unit.clock.sck_div = clock_divisor; - float mic_clock_freq = 8000000.0f / clock_divisor; - self->frequency = mic_clock_freq / oversample; - if (mic_clock_freq < MIN_MIC_CLOCK || clock_divisor == 0 || clock_divisor > 255) { - mp_raise_ValueError("sampling frequency out of range"); - } + // Serializer configuration + #ifdef SAMD21 + uint32_t serctrl = (self->clock_unit << I2S_SERCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_PDM2) | SERCTRL(DATASIZE_32); + #endif + #ifdef SAMD51 + uint32_t serctrl = (self->clock_unit << I2S_RXCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_PDM2) | SERCTRL(DATASIZE_32); + #endif + + // Configure the I2S peripheral + i2s_set_enable(false); + + I2S->CLKCTRL[self->clock_unit].reg = clkctrl; + #ifdef SAMD21 + I2S->SERCTRL[self->serializer].reg = serctrl; + #endif + #ifdef SAMD51 + I2S->RXCTRL.reg = serctrl; + #endif + + i2s_set_enable(true); - config_clock_unit.frame.number_slots = 2; - config_clock_unit.frame.slot_size = I2S_SLOT_SIZE_16_BIT; - config_clock_unit.frame.data_delay = I2S_DATA_DELAY_0; - - config_clock_unit.frame.frame_sync.width = I2S_FRAME_SYNC_WIDTH_SLOT; - - config_clock_unit.mck_pin.enable = false; - config_clock_unit.sck_pin.enable = true; - config_clock_unit.sck_pin.gpio = self->clock_pin->pin; - // Mux is always the same. - config_clock_unit.sck_pin.mux = 6L; - config_clock_unit.fs_pin.enable = false; - i2s_clock_unit_set_config(&self->i2s_instance, self->clock_unit, &config_clock_unit); - - struct i2s_serializer_config config_serializer; - i2s_serializer_get_config_defaults(&config_serializer); - config_serializer.clock_unit = self->clock_unit; - config_serializer.mode = I2S_SERIALIZER_PDM2; - config_serializer.data_size = I2S_DATA_SIZE_32BIT; - config_serializer.data_pin.gpio = self->data_pin->pin; - // Mux is always the same. - config_serializer.data_pin.mux = 6L; - config_serializer.data_pin.enable = true; - i2s_serializer_set_config(&self->i2s_instance, self->serializer, &config_serializer); - i2s_enable(&self->i2s_instance); - - // Run the serializer all the time. This eliminates startup delay for the microphone. - i2s_clock_unit_enable(&self->i2s_instance, self->clock_unit); - i2s_serializer_enable(&self->i2s_instance, self->serializer); + // Run the clock all the time. This eliminates startup delay for the microphone, + // which can be 10-100ms. Turn serializer on as needed. + i2s_set_clock_unit_enable(self->clock_unit, true); + + claim_pin(clock_pin); + claim_pin(data_pin); + + gpio_set_pin_function(self->clock_pin->number, GPIO_I2S_FUNCTION); + gpio_set_pin_function(self->data_pin->number, GPIO_I2S_FUNCTION); self->bytes_per_sample = oversample >> 3; self->bit_depth = bit_depth; } bool common_hal_audiobusio_pdmin_deinited(audiobusio_pdmin_obj_t* self) { - return self->clock_pin == mp_const_none; + return self->clock_pin == NULL; } void common_hal_audiobusio_pdmin_deinit(audiobusio_pdmin_obj_t* self) { if (common_hal_audiobusio_pdmin_deinited(self)) { return; } - i2s_disable(&self->i2s_instance); - i2s_serializer_disable(&self->i2s_instance, self->serializer); - i2s_clock_unit_disable(&self->i2s_instance, self->clock_unit); - i2s_reset(&self->i2s_instance); - reset_pin(self->clock_pin->pin); - reset_pin(self->data_pin->pin); - self->clock_pin = mp_const_none; - self->data_pin = mp_const_none; + + i2s_set_serializer_enable(self->serializer, false); + i2s_set_clock_unit_enable(self->clock_unit, false); + + i2s_set_enable(false); + + disconnect_gclk_from_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit); + disable_clock_generator(self->gclk); + + reset_pin_number(self->clock_pin->number); + reset_pin_number(self->data_pin->number); + self->clock_pin = NULL; + self->data_pin = NULL; } uint8_t common_hal_audiobusio_pdmin_get_bit_depth(audiobusio_pdmin_obj_t* self) { return self->bit_depth; } -uint32_t common_hal_audiobusio_pdmin_get_frequency(audiobusio_pdmin_obj_t* self) { - return self->frequency; +uint32_t common_hal_audiobusio_pdmin_get_sample_rate(audiobusio_pdmin_obj_t* self) { + return self->sample_rate; } static void setup_dma(audiobusio_pdmin_obj_t* self, uint32_t length, - DmacDescriptor* second_descriptor, - uint8_t words_per_buffer, uint8_t words_per_sample, - uint32_t* first_buffer, uint32_t* second_buffer) { - // Set up the DMA - struct dma_descriptor_config descriptor_config; - dma_descriptor_get_config_defaults(&descriptor_config); - descriptor_config.beat_size = DMA_BEAT_SIZE_WORD; - descriptor_config.step_selection = DMA_STEPSEL_SRC; - descriptor_config.source_address = (uint32_t)&I2S->DATA[self->serializer]; - descriptor_config.src_increment_enable = false; + DmacDescriptor* descriptor, + DmacDescriptor* second_descriptor, + uint32_t words_per_buffer, uint8_t words_per_sample, + uint32_t* first_buffer, uint32_t* second_buffer) { + descriptor->BTCTRL.reg = DMAC_BTCTRL_VALID | + DMAC_BTCTRL_BLOCKACT_NOACT | + DMAC_BTCTRL_EVOSEL_BLOCK | + DMAC_BTCTRL_DSTINC | + DMAC_BTCTRL_BEATSIZE_WORD; + // Block transfer count is the number of beats per block (aka descriptor). // In this case there are two bytes per beat so divide the length by two. uint16_t block_transfer_count = words_per_buffer; if (length * words_per_sample < words_per_buffer) { block_transfer_count = length * words_per_sample; } - descriptor_config.block_transfer_count = block_transfer_count; - descriptor_config.destination_address = ((uint32_t) first_buffer + sizeof(uint32_t) * block_transfer_count); - descriptor_config.event_output_selection = DMA_EVENT_OUTPUT_BLOCK; - descriptor_config.next_descriptor_address = 0; + + descriptor->BTCNT.reg = block_transfer_count; + descriptor->DSTADDR.reg = ((uint32_t) first_buffer + sizeof(uint32_t) * block_transfer_count); + descriptor->DESCADDR.reg = 0; if (length * words_per_sample > words_per_buffer) { - descriptor_config.next_descriptor_address = ((uint32_t)second_descriptor); + descriptor->DESCADDR.reg = ((uint32_t)second_descriptor); } - dma_descriptor_create(audio_dma.descriptor, &descriptor_config); + #ifdef SAMD21 + descriptor->SRCADDR.reg = (uint32_t)&I2S->DATA[self->serializer]; + #endif + #ifdef SAMD51 + descriptor->SRCADDR.reg = (uint32_t)&I2S->RXDATA; + #endif // Do we need more values than will fit in the first buffer? // If so, set up a second buffer chained to be filled after the first buffer. if (length * words_per_sample > words_per_buffer) { block_transfer_count = words_per_buffer; - descriptor_config.next_descriptor_address = ((uint32_t)audio_dma.descriptor); + second_descriptor->DESCADDR.reg = ((uint32_t)descriptor); if (length * words_per_sample < 2 * words_per_buffer) { // Length needed is more than one buffer but less than two. // Subtract off the size of the first buffer, and what remains is the count we need. block_transfer_count = length * words_per_sample - words_per_buffer; - descriptor_config.next_descriptor_address = 0; + second_descriptor->DESCADDR.reg = 0; } - descriptor_config.block_transfer_count = block_transfer_count; - descriptor_config.destination_address = ((uint32_t) second_buffer + sizeof(uint32_t) * block_transfer_count); - dma_descriptor_create(second_descriptor, &descriptor_config); - } - - switch_audiodma_trigger(I2S_DMAC_ID_RX_0 + self->serializer); -} + second_descriptor->DSTADDR.reg = ((uint32_t) second_buffer + sizeof(uint32_t) * block_transfer_count); -void start_dma(audiobusio_pdmin_obj_t* self) { - dma_start_transfer_job(&audio_dma); - tc_start_counter(MP_STATE_VM(audiodma_block_counter)); - I2S->DATA[1].reg = I2S->DATA[1].reg; -} - -void stop_dma(audiobusio_pdmin_obj_t* self) { - // Shutdown the DMA: serializer keeps running. - tc_stop_counter(MP_STATE_VM(audiodma_block_counter)); - dma_abort_job(&audio_dma); + second_descriptor->BTCNT.reg = block_transfer_count; + #ifdef SAMD21 + second_descriptor->SRCADDR.reg = (uint32_t)&I2S->DATA[self->serializer]; + #endif + #ifdef SAMD51 + second_descriptor->SRCADDR.reg = (uint32_t)&I2S->RXDATA; + #endif + second_descriptor->BTCTRL.reg = DMAC_BTCTRL_VALID | + DMAC_BTCTRL_BLOCKACT_NOACT | + DMAC_BTCTRL_EVOSEL_BLOCK | + DMAC_BTCTRL_DSTINC | + DMAC_BTCTRL_BEATSIZE_WORD; + } } // a windowed sinc filter for 44 khz, 64 samples @@ -291,20 +354,37 @@ static uint16_t filter_sample(uint32_t pdm_samples[4]) { // output_buffer_length is the number of slots, not the number of bytes. uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* self, uint16_t* output_buffer, uint32_t output_buffer_length) { + uint8_t dma_channel = audio_dma_allocate_channel(); + uint8_t event_channel = find_sync_event_channel(); + if (event_channel >= EVSYS_SYNCH_NUM) { + mp_raise_RuntimeError(translate("All sync event channels in use")); + } + // We allocate two buffers on the stack to use for double buffering. const uint8_t samples_per_buffer = SAMPLES_PER_BUFFER; // For every word we record, we throw away 2 bytes of a phantom second channel. - const uint8_t words_per_sample = self->bytes_per_sample / 2; - const uint8_t words_per_buffer = samples_per_buffer * words_per_sample; + uint8_t words_per_sample = self->bytes_per_sample / 2; + uint32_t words_per_buffer = samples_per_buffer * words_per_sample; uint32_t first_buffer[words_per_buffer]; uint32_t second_buffer[words_per_buffer]; + turn_on_event_system(); + COMPILER_ALIGNED(16) DmacDescriptor second_descriptor; - setup_dma(self, output_buffer_length, &second_descriptor, words_per_buffer, - words_per_sample, first_buffer, second_buffer); + setup_dma(self, output_buffer_length, dma_descriptor(dma_channel), &second_descriptor, + words_per_buffer, words_per_sample, first_buffer, second_buffer); - start_dma(self); + uint8_t trigger_source = I2S_DMAC_ID_RX_0; + #ifdef SAMD21 + trigger_source += self->serializer; + #endif + + dma_configure(dma_channel, trigger_source, true); + init_event_channel_interrupt(event_channel, CORE_GCLK, EVSYS_ID_GEN_DMAC_CH_0 + dma_channel); + // Turn on serializer now to get it in sync with DMA. + i2s_set_serializer_enable(self->serializer, true); + audio_dma_enable_channel(dma_channel); // Record uint32_t buffers_processed = 0; @@ -312,24 +392,30 @@ uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* se uint32_t remaining_samples_needed = output_buffer_length; while (values_output < output_buffer_length) { - // Wait for the next buffer to fill - uint32_t block_counter; - while ((block_counter = tc_get_count_value(MP_STATE_VM(audiodma_block_counter))) == buffers_processed) { - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif - } - if (block_counter != (buffers_processed + 1)) { - // Looks like we aren't keeping up. We shouldn't skip a buffer. + if (event_interrupt_overflow(event_channel)) { + // Looks like we aren't keeping up. We shouldn't skip a buffer so stop early. break; } + // Wait for the next buffer to fill + uint32_t wait_counts = 0; + #ifdef SAMD21 + #define MAX_WAIT_COUNTS 1000 + #endif + #ifdef SAMD51 + #define MAX_WAIT_COUNTS 6000 + #endif + // If wait_counts exceeds the max count, buffer has probably stopped filling; + // DMA may have missed an I2S trigger event. + while (!event_interrupt_active(event_channel) && ++wait_counts < MAX_WAIT_COUNTS) { + RUN_BACKGROUND_TASKS; + } // The mic is running all the time, so we don't need to wait the usual 10msec or 100msec // for it to start up. // Flip back and forth between processing the first and second buffers. uint32_t *buffer = first_buffer; - DmacDescriptor* descriptor = audio_dma.descriptor; + DmacDescriptor* descriptor = dma_descriptor(dma_channel); if (buffers_processed % 2 == 1) { buffer = second_buffer; descriptor = &second_descriptor; @@ -376,7 +462,10 @@ uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* se } } - stop_dma(self); + disable_event_channel(event_channel); + audio_dma_free_channel(dma_channel); + // Turn off serializer, but leave clock on, to avoid mic startup delay. + i2s_set_serializer_enable(self->serializer, false); return values_output; } diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.h b/ports/atmel-samd/common-hal/audiobusio/PDMIn.h index 71f36c0d6f338..5c4d4feea0651 100644 --- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.h +++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.h @@ -28,22 +28,20 @@ #define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H #include "common-hal/microcontroller/Pin.h" -#include "asf/sam0/drivers/i2s/i2s.h" -#include "asf/sam0/drivers/tc/tc.h" -#include "extmod/vfs_fat_file.h" +#include "extmod/vfs_fat.h" #include "py/obj.h" typedef struct { mp_obj_base_t base; const mcu_pin_obj_t *clock_pin; const mcu_pin_obj_t *data_pin; - uint32_t frequency; - struct i2s_module i2s_instance; + uint32_t sample_rate; uint8_t serializer; uint8_t clock_unit; uint8_t bytes_per_sample; uint8_t bit_depth; + uint8_t gclk; } audiobusio_pdmin_obj_t; void pdmin_reset(void); diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.c b/ports/atmel-samd/common-hal/audioio/AudioOut.c index 9f69808900855..75621b361f217 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.c +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -27,399 +27,319 @@ #include #include -#include "extmod/vfs_fat_file.h" +#include "extmod/vfs_fat.h" #include "py/gc.h" #include "py/mperrno.h" #include "py/runtime.h" #include "common-hal/audioio/AudioOut.h" #include "shared-bindings/audioio/AudioOut.h" +#include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" -#include "asf/sam0/drivers/dac/dac.h" -#include "asf/sam0/drivers/dma/dma.h" -#include "asf/sam0/drivers/events/events.h" -#include "asf/sam0/drivers/port/port.h" -#include "asf/sam0/drivers/tc/tc.h" -#include "samd21_pins.h" -#include "shared_dma.h" - -#undef ENABLE - -// Shared with PWMOut -// TODO(tannewt): Factor these out so audioio can exist without PWMOut. -extern uint32_t target_timer_frequencies[TC_INST_NUM + TCC_INST_NUM]; -extern uint8_t timer_refcount[TC_INST_NUM + TCC_INST_NUM]; -extern const uint16_t prescaler[8]; - -// This timer is shared amongst all AudioOut objects under the assumption that -// the code is single threaded. The audioout_sample_timer, audioout_dac_instance, -// audioout_sample_event, and audioout_dac_event pointers live in -// MICROPY_PORT_ROOT_POINTERS so they don't get garbage collected. - -// The AudioOut object is being currently played. Only it can pause the timer -// and change its frequency. -static audioio_audioout_obj_t* active_audioout; - -static uint8_t refcount = 0; - -struct wave_format_chunk { - uint16_t audio_format; - uint16_t num_channels; - uint32_t sample_rate; - uint32_t byte_rate; - uint16_t block_align; - uint16_t bits_per_sample; - uint16_t extra_params; // Assumed to be zero below. -}; +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" +#include "hpl/gclk/hpl_gclk_base.h" +#include "peripheral_clk_config.h" -void audioout_reset(void) { - // Only reset DMA. PWMOut will reset the timer. Other code will reset the DAC. - refcount = 0; - MP_STATE_VM(audioout_sample_timer) = NULL; - MP_STATE_VM(audiodma_block_counter) = NULL; - MP_STATE_VM(audioout_dac_instance) = NULL; - - if (MP_STATE_VM(audioout_sample_event) != NULL) { - events_detach_user(MP_STATE_VM(audioout_sample_event), EVSYS_ID_USER_DAC_START); - events_release(MP_STATE_VM(audioout_sample_event)); - } - MP_STATE_VM(audioout_sample_event) = NULL; - - if (MP_STATE_VM(audiodma_block_event) != NULL) { - events_release(MP_STATE_VM(audiodma_block_event)); - } - MP_STATE_VM(audiodma_block_event) = NULL; +#ifdef SAMD21 +#include "hpl/pm/hpl_pm_base.h" +#endif - if (MP_STATE_VM(audioout_dac_event) != NULL) { - events_detach_user(MP_STATE_VM(audioout_dac_event), EVSYS_ID_USER_DMAC_CH_0); - events_release(MP_STATE_VM(audioout_dac_event)); +#include "audio_dma.h" +#include "timer_handler.h" + +#include "samd/dma.h" +#include "samd/events.h" +#include "samd/pins.h" +#include "samd/timers.h" + +#ifdef SAMD21 +static void ramp_value(uint16_t start, uint16_t end) { + start = DAC->DATA.reg; + int32_t diff = (int32_t) end - start; + int32_t step = 49; + int32_t steps = diff / step; + if (diff < 0) { + steps = -steps; + step = -step; + } + for (int32_t i = 0; i < steps; i++) { + uint32_t value = start + step * i; + DAC->DATA.reg = value; + DAC->DATABUF.reg = value; + common_hal_mcu_delay_us(50); + RUN_BACKGROUND_TASKS; } - MP_STATE_VM(audioout_dac_event) = NULL; - - dma_abort_job(&audio_dma); } +#endif -// WARN(tannewt): DO NOT print from here. It calls background tasks and causes a -// stack overflow. -void audioout_background(void) { - if (MP_STATE_VM(audiodma_block_counter) != NULL && - active_audioout != NULL && - active_audioout->second_buffer != NULL && - active_audioout->last_loaded_block < tc_get_count_value(MP_STATE_VM(audiodma_block_counter))) { - uint8_t* buffer; - if (tc_get_count_value(MP_STATE_VM(audiodma_block_counter)) % 2 == 1) { - buffer = active_audioout->buffer; - } else { - buffer = active_audioout->second_buffer; - } - uint16_t num_bytes_to_load = active_audioout->len; - if (num_bytes_to_load > active_audioout->bytes_remaining) { - num_bytes_to_load = active_audioout->bytes_remaining; - } - UINT length_read; - f_read(&active_audioout->file->fp, buffer, num_bytes_to_load, &length_read); - active_audioout->bytes_remaining -= length_read; - active_audioout->last_loaded_block += 1; - - if (active_audioout->bytes_remaining == 0) { - if (active_audioout->loop) { - // Loop back to the start of the file. - f_lseek(&active_audioout->file->fp, active_audioout->data_start); - active_audioout->bytes_remaining = active_audioout->file_length; - f_read(&active_audioout->file->fp, buffer, active_audioout->len - num_bytes_to_load, &length_read); - active_audioout->bytes_remaining -= length_read; - } else { - DmacDescriptor* descriptor = audio_dma.descriptor; - if (buffer == active_audioout->second_buffer) { - descriptor = active_audioout->second_descriptor; - } - descriptor->BTCNT.reg = length_read / active_audioout->bytes_per_sample; - descriptor->SRCADDR.reg = ((uint32_t) buffer) + length_read; - descriptor->DESCADDR.reg = 0; - } - } - - if (active_audioout->bytes_per_sample == 2) { - // Undo twos complement. - for (uint16_t i = 0; i < length_read / 2; i++) { - buffer[2 * i + 1] ^= 0x80; - } - } +#ifdef SAMD51 +static void ramp_value(uint16_t start, uint16_t end) { + int32_t diff = (int32_t) end - start; + int32_t step = 49; + int32_t steps = diff / step; + if (diff < 0) { + steps = -steps; + step = -step; } -} -static void shared_construct(audioio_audioout_obj_t* self, const mcu_pin_obj_t* pin) { - assert_pin_free(pin); + for (int32_t i = 0; i < steps; i++) { + uint16_t value = start + step * i; + DAC->DATA[0].reg = value; + DAC->DATABUF[0].reg = value; + DAC->DATA[1].reg = value; + DAC->DATABUF[1].reg = value; - // Configure the DAC to output on input event and to output an empty event - // that triggers the DMA to load the next sample. - MP_STATE_VM(audioout_dac_instance) = gc_alloc(sizeof(struct dac_module), false); - if (MP_STATE_VM(audioout_dac_instance) == NULL) { - mp_raise_msg(&mp_type_MemoryError, ""); + common_hal_mcu_delay_us(50); + RUN_BACKGROUND_TASKS; } - struct dac_config config_dac; - dac_get_config_defaults(&config_dac); - config_dac.left_adjust = true; - config_dac.reference = DAC_REFERENCE_AVCC; - config_dac.clock_source = GCLK_GENERATOR_0; - enum status_code status = dac_init(MP_STATE_VM(audioout_dac_instance), DAC, &config_dac); - if (status != STATUS_OK) { - common_hal_audioio_audioout_deinit(self); - mp_raise_OSError(MP_EIO); - return; - } - - struct dac_chan_config channel_config; - dac_chan_get_config_defaults(&channel_config); - dac_chan_set_config(MP_STATE_VM(audioout_dac_instance), DAC_CHANNEL_0, &channel_config); - dac_chan_enable(MP_STATE_VM(audioout_dac_instance), DAC_CHANNEL_0); +} +#endif - struct dac_events events_dac = { .generate_event_on_buffer_empty = true, - .on_event_start_conversion = true }; - dac_enable_events(MP_STATE_VM(audioout_dac_instance), &events_dac); +void audioout_reset(void) { + #if defined(SAMD21) && !defined(PIN_PA02) + return; + #endif + #ifdef SAMD21 + while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} + #endif + #ifdef SAMD51 + while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) {} + #endif + if (DAC->CTRLA.bit.ENABLE) { + ramp_value(0x8000, 0); + } + DAC->CTRLA.reg |= DAC_CTRLA_SWRST; + + // TODO(tannewt): Turn off the DAC clocks to save power. +} - // Figure out which timer we are using. +// Caller validates that pins are free. +void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, + const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t quiescent_value) { + #ifdef SAMD51 + bool dac_clock_enabled = hri_mclk_get_APBDMASK_DAC_bit(MCLK); + #endif + + #ifdef SAMD21 + bool dac_clock_enabled = PM->APBCMASK.bit.DAC_; + #endif + // Only support exclusive use of the DAC. + if (dac_clock_enabled && DAC->CTRLA.bit.ENABLE == 1) { + mp_raise_RuntimeError(translate("DAC already in use")); + } + #ifdef SAMD21 + if (right_channel != NULL) { + mp_raise_ValueError(translate("Right channel unsupported")); + } + if (left_channel != &pin_PA02) { + mp_raise_ValueError(translate("Invalid pin")); + } + claim_pin(left_channel); + #endif + #ifdef SAMD51 + self->right_channel = NULL; + if (left_channel != &pin_PA02 && left_channel != &pin_PA05) { + mp_raise_ValueError(translate("Invalid pin for left channel")); + } + if (right_channel != NULL && right_channel != &pin_PA02 && right_channel != &pin_PA05) { + mp_raise_ValueError(translate("Invalid pin for right channel")); + } + if (right_channel == left_channel) { + mp_raise_ValueError(translate("Cannot output both channels on the same pin")); + } + claim_pin(left_channel); + if (right_channel != NULL) { + claim_pin(right_channel); + self->right_channel = right_channel; + audio_dma_init(&self->right_dma); + } + #endif + self->left_channel = left_channel; + audio_dma_init(&self->left_dma); + + #ifdef SAMD51 + hri_mclk_set_APBDMASK_DAC_bit(MCLK); + #endif + + #ifdef SAMD21 + _pm_enable_bus_clock(PM_BUS_APBC, DAC); + #endif + + // SAMD51: This clock should be <= 12 MHz, per datasheet section 47.6.3. + // SAMD21: This clock is 48mhz despite the datasheet saying it must only be <= 350kHz, per + // datasheet table 37-6. It's incorrect because the max output rate is 350ksps and is only + // achieved when the GCLK is more than 8mhz. + _gclk_enable_channel(DAC_GCLK_ID, CONF_GCLK_DAC_SRC); + + DAC->CTRLA.bit.SWRST = 1; + while (DAC->CTRLA.bit.SWRST == 1) {} + // Make sure there are no outstanding access errors. (Reading DATA can cause this.) + #ifdef SAMD51 + PAC->INTFLAGD.reg = PAC_INTFLAGD_DAC; + #endif + + bool channel0_enabled = true; + #ifdef SAMD51 + channel0_enabled = self->left_channel == &pin_PA02 || self->right_channel == &pin_PA02; + bool channel1_enabled = self->left_channel == &pin_PA05 || self->right_channel == &pin_PA05; + #endif + + if (channel0_enabled) { + #ifdef SAMD21 + DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI; + // We disable the voltage pump because we always run at 3.3v. + DAC->CTRLB.reg = DAC_CTRLB_REFSEL_AVCC | + DAC_CTRLB_LEFTADJ | + DAC_CTRLB_EOEN | + DAC_CTRLB_VPD; + #endif + #ifdef SAMD51 + DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI0; + DAC->DACCTRL[0].reg = DAC_DACCTRL_CCTRL_CC100K | + DAC_DACCTRL_ENABLE | + DAC_DACCTRL_LEFTADJ; + DAC->CTRLB.reg = DAC_CTRLB_REFSEL_VREFPU; + #endif + } + #ifdef SAMD51 + if (channel1_enabled) { + DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI1; + DAC->DACCTRL[1].reg = DAC_DACCTRL_CCTRL_CC100K | + DAC_DACCTRL_ENABLE | + DAC_DACCTRL_LEFTADJ; + DAC->CTRLB.reg = DAC_CTRLB_REFSEL_VREFPU; + } + #endif + + // Re-enable the DAC + DAC->CTRLA.bit.ENABLE = 1; + #ifdef SAMD21 + while (DAC->STATUS.bit.SYNCBUSY == 1) {} + #endif + #ifdef SAMD51 + while (DAC->SYNCBUSY.bit.ENABLE == 1) {} + while (channel0_enabled && DAC->STATUS.bit.READY0 == 0) {} + while (channel1_enabled && DAC->STATUS.bit.READY1 == 0) {} + #endif + + // Use a timer to coordinate when DAC conversions occur. Tc *t = NULL; - Tc *tcs[TC_INST_NUM] = TC_INSTS; + uint8_t tc_index = TC_INST_NUM; for (uint8_t i = TC_INST_NUM; i > 0; i--) { - if (tcs[i - 1]->COUNT16.CTRLA.bit.ENABLE == 0) { - t = tcs[i - 1]; + if (tc_insts[i - 1]->COUNT16.CTRLA.bit.ENABLE == 0) { + t = tc_insts[i - 1]; + tc_index = i - 1; break; } } if (t == NULL) { common_hal_audioio_audioout_deinit(self); - mp_raise_RuntimeError("All timers in use"); + mp_raise_RuntimeError(translate("All timers in use")); return; } - MP_STATE_VM(audioout_sample_timer) = gc_alloc(sizeof(struct tc_module), false); - if (MP_STATE_VM(audioout_sample_timer) == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } + self->tc_index = tc_index; - // Don't bother setting the period. We set it before you playback anything. - struct tc_config config_tc; - tc_get_config_defaults(&config_tc); - config_tc.counter_size = TC_COUNTER_SIZE_16BIT; - config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV1; - config_tc.wave_generation = TC_WAVE_GENERATION_MATCH_FREQ; - if (tc_init(MP_STATE_VM(audioout_sample_timer), t, &config_tc) != STATUS_OK) { - common_hal_audioio_audioout_deinit(self); - mp_raise_OSError(MP_EIO); - return; - }; + // Use the 48mhz clocks on both the SAMD21 and 51 because we will be going much slower. + uint8_t tc_gclk = 0; + #ifdef SAMD51 + tc_gclk = 1; + #endif - struct tc_events events_tc; - events_tc.generate_event_on_overflow = true; - events_tc.on_event_perform_action = false; - events_tc.event_action = TC_EVENT_ACTION_OFF; - tc_enable_events(MP_STATE_VM(audioout_sample_timer), &events_tc); + set_timer_handler(true, tc_index, TC_HANDLER_NO_INTERRUPT); + turn_on_clocks(true, tc_index, tc_gclk); - tc_enable(MP_STATE_VM(audioout_sample_timer)); - tc_stop_counter(MP_STATE_VM(audioout_sample_timer)); + // Don't bother setting the period. We set it before you playback anything. + tc_set_enable(t, false); + tc_reset(t); + #ifdef SAMD51 + t->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; + #endif + #ifdef SAMD21 + t->COUNT16.CTRLA.bit.WAVEGEN = TC_CTRLA_WAVEGEN_MFRQ_Val; + #endif + t->COUNT16.EVCTRL.reg = TC_EVCTRL_OVFEO; + tc_set_enable(t, true); + t->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; // Connect the timer overflow event, which happens at the target frequency, - // to the DAC conversion trigger. - MP_STATE_VM(audioout_sample_event) = gc_alloc(sizeof(struct events_resource), false); - if (MP_STATE_VM(audioout_sample_event) == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } - struct events_config config; - events_get_config_defaults(&config); - - uint8_t generator = EVSYS_ID_GEN_TC3_OVF; - if (t == TC4) { - generator = EVSYS_ID_GEN_TC4_OVF; - } else if (t == TC5) { - generator = EVSYS_ID_GEN_TC5_OVF; -#ifdef TC6 - } else if (t == TC6) { - generator = EVSYS_ID_GEN_TC6_OVF; -#endif -#ifdef TC7 - } else if (t == TC7) { - generator = EVSYS_ID_GEN_TC7_OVF; -#endif - } - - config.generator = generator; - config.path = EVENTS_PATH_ASYNCHRONOUS; - if (events_allocate(MP_STATE_VM(audioout_sample_event), &config) != STATUS_OK || - events_attach_user(MP_STATE_VM(audioout_sample_event), EVSYS_ID_USER_DAC_START) != STATUS_OK) { - common_hal_audioio_audioout_deinit(self); - mp_raise_OSError(MP_EIO); - return; - } - - // Connect the DAC to DMA - MP_STATE_VM(audioout_dac_event) = gc_alloc(sizeof(struct events_resource), false); - if (MP_STATE_VM(audioout_dac_event) == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } - events_get_config_defaults(&config); - config.generator = EVSYS_ID_GEN_DAC_EMPTY; - config.path = EVENTS_PATH_ASYNCHRONOUS; - if (events_allocate(MP_STATE_VM(audioout_dac_event), &config) != STATUS_OK || - events_attach_user(MP_STATE_VM(audioout_dac_event), EVSYS_ID_USER_DMAC_CH_0) != STATUS_OK) { - common_hal_audioio_audioout_deinit(self); - mp_raise_OSError(MP_EIO); - return; - } - - // Leave the DMA setup to the specific constructor. + // to the DAC conversion trigger(s). + #ifdef SAMD21 + #define FIRST_TC_GEN_ID EVSYS_ID_GEN_TC3_OVF + #endif + #ifdef SAMD51 + #define FIRST_TC_GEN_ID EVSYS_ID_GEN_TC0_OVF + #endif + uint8_t tc_gen_id = FIRST_TC_GEN_ID + 3 * tc_index; + + turn_on_event_system(); + + // Find a free event channel. We start at the highest channels because we only need and async + // path. + uint8_t channel = find_async_event_channel(); + if (channel >= EVSYS_CHANNELS) { + mp_raise_RuntimeError(translate("All event channels in use")); + } + + #ifdef SAMD51 + connect_event_user_to_channel(EVSYS_ID_USER_DAC_START_1, channel); + if (right_channel != NULL) { + gpio_set_pin_function(self->right_channel->number, GPIO_PIN_FUNCTION_B); + } + #define EVSYS_ID_USER_DAC_START EVSYS_ID_USER_DAC_START_0 + #endif + connect_event_user_to_channel(EVSYS_ID_USER_DAC_START, channel); + gpio_set_pin_function(self->left_channel->number, GPIO_PIN_FUNCTION_B); + init_async_event_channel(channel, tc_gen_id); + + self->tc_to_dac_event_channel = channel; + + // Ramp the DAC up. + self->quiescent_value = quiescent_value; + ramp_value(0, quiescent_value); + + // Leave the DMA setup to playback. } -void common_hal_audioio_audioout_construct_from_buffer(audioio_audioout_obj_t* self, - const mcu_pin_obj_t* pin, - uint16_t* buffer, - uint32_t len, - uint8_t bytes_per_sample) { - self->pin = pin; - if (pin != &pin_PA02) { - mp_raise_ValueError("Invalid pin"); - } - if (refcount == 0) { - refcount++; - shared_construct(self, pin); - } - - self->buffer = (uint8_t*) buffer; - self->second_buffer = NULL; - self->bytes_per_sample = bytes_per_sample; - self->len = len; - self->frequency = 8000; +bool common_hal_audioio_audioout_deinited(audioio_audioout_obj_t* self) { + return self->left_channel == NULL; } -void common_hal_audioio_audioout_construct_from_file(audioio_audioout_obj_t* self, - const mcu_pin_obj_t* pin, - pyb_file_obj_t* file) { - self->pin = pin; - if (pin != &pin_PA02) { - mp_raise_ValueError("Invalid pin"); - } - if (refcount == 0) { - refcount++; - shared_construct(self, pin); - } - if (MP_STATE_VM(audiodma_block_counter) == NULL && !allocate_block_counter()) { - mp_raise_RuntimeError("Unable to allocate audio DMA block counter."); - } - - // Load the wave - self->file = file; - uint8_t chunk_header[16]; - f_rewind(&self->file->fp); - UINT bytes_read; - f_read(&self->file->fp, chunk_header, 16, &bytes_read); - if (bytes_read != 16 || - memcmp(chunk_header, "RIFF", 4) != 0 || - memcmp(chunk_header + 8, "WAVEfmt ", 8) != 0) { - mp_raise_ValueError("Invalid wave file"); - } - uint32_t format_size; - f_read(&self->file->fp, &format_size, 4, &bytes_read); - if (bytes_read != 4 || - format_size > sizeof(struct wave_format_chunk)) { - mp_raise_ValueError("Invalid format chunk size"); - } - struct wave_format_chunk format; - f_read(&self->file->fp, &format, format_size, &bytes_read); - if (bytes_read != format_size) { - } - - if (format.audio_format != 1 || - format.num_channels > 1 || - format.bits_per_sample > 16 || - (format_size == 18 && - format.extra_params != 0)) { - mp_raise_ValueError("Unsupported format"); +void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { + if (common_hal_audioio_audioout_deinited(self)) { + return; } - // Get the frequency - self->frequency = format.sample_rate; - self->len = 512; - self->bytes_per_sample = format.bits_per_sample / 8; - - // TODO(tannewt): Skip any extra chunks that occur before the data section. - - uint8_t data_tag[4]; - f_read(&self->file->fp, &data_tag, 4, &bytes_read); - if (bytes_read != 4 || - memcmp((uint8_t *) data_tag, "data", 4) != 0) { - mp_raise_ValueError("Data chunk must follow fmt chunk"); + if (common_hal_audioio_audioout_get_playing(self)) { + common_hal_audioio_audioout_stop(self); } - uint32_t data_length; - f_read(&self->file->fp, &data_length, 4, &bytes_read); - if (bytes_read != 4) { - mp_raise_ValueError("Invalid file"); - } - self->file_length = data_length; - self->data_start = self->file->fp.fptr; + // Ramp the DAC down. + ramp_value(self->quiescent_value, 0); - // Try to allocate two buffers, one will be loaded from file and the other - // DMAed to DAC. - self->buffer = gc_alloc(self->len, false); - if (self->buffer == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } + DAC->CTRLA.bit.ENABLE = 0; + #ifdef SAMD21 + while (DAC->STATUS.bit.SYNCBUSY == 1) {} + #endif + #ifdef SAMD51 + while (DAC->SYNCBUSY.bit.ENABLE == 1) {} + #endif - self->second_buffer = gc_alloc(self->len, false); - if (self->second_buffer == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } + disable_event_channel(self->tc_to_dac_event_channel); - self->second_descriptor = gc_alloc(sizeof(DmacDescriptor), false); - if (self->second_descriptor == NULL) { - common_hal_audioio_audioout_deinit(self); - mp_raise_msg(&mp_type_MemoryError, ""); - } -} + tc_set_enable(tc_insts[self->tc_index], false); -bool common_hal_audioio_audioout_deinited(audioio_audioout_obj_t* self) { - return self->pin == mp_const_none; + reset_pin_number(self->left_channel->number); + self->left_channel = NULL; + #ifdef SAMD51 + reset_pin_number(self->right_channel->number); + self->right_channel = NULL; + #endif } -void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { - if (common_hal_audioio_audioout_deinited(self)) { - return; - } - refcount--; - if (refcount == 0) { - if (MP_STATE_VM(audioout_sample_timer) != NULL) { - tc_reset(MP_STATE_VM(audioout_sample_timer)); - gc_free(MP_STATE_VM(audioout_sample_timer)); - MP_STATE_VM(audioout_sample_timer) = NULL; - } - if (MP_STATE_VM(audioout_dac_instance) != NULL) { - dac_reset(MP_STATE_VM(audioout_dac_instance)); - gc_free(MP_STATE_VM(audioout_dac_instance)); - MP_STATE_VM(audioout_dac_instance) = NULL; - } - if (MP_STATE_VM(audioout_sample_event) != NULL) { - events_detach_user(MP_STATE_VM(audioout_sample_event), EVSYS_ID_USER_DAC_START); - events_release(MP_STATE_VM(audioout_sample_event)); - gc_free(MP_STATE_VM(audioout_sample_event)); - MP_STATE_VM(audioout_sample_event) = NULL; - } - if (MP_STATE_VM(audioout_dac_event) != NULL) { - events_release(MP_STATE_VM(audioout_dac_event)); - gc_free(MP_STATE_VM(audioout_dac_event)); - MP_STATE_VM(audioout_dac_event) = NULL; - } - reset_pin(self->pin->pin); - } - - self->pin = mp_const_none; -} - -static void set_timer_frequency(uint32_t frequency) { - uint32_t system_clock = system_cpu_clock_get_hz(); +static void set_timer_frequency(Tc* timer, uint32_t frequency) { + uint32_t system_clock = 48000000; uint32_t new_top; uint8_t new_divisor; for (new_divisor = 0; new_divisor < 8; new_divisor++) { @@ -428,133 +348,132 @@ static void set_timer_frequency(uint32_t frequency) { break; } } - uint8_t old_divisor = MP_STATE_VM(audioout_sample_timer)->hw->COUNT16.CTRLA.bit.PRESCALER; + uint8_t old_divisor = timer->COUNT16.CTRLA.bit.PRESCALER; if (new_divisor != old_divisor) { - tc_disable(MP_STATE_VM(audioout_sample_timer)); - MP_STATE_VM(audioout_sample_timer)->hw->COUNT16.CTRLA.bit.PRESCALER = new_divisor; - tc_enable(MP_STATE_VM(audioout_sample_timer)); - } - while (tc_is_syncing(MP_STATE_VM(audioout_sample_timer))) { - /* Wait for sync */ - } - MP_STATE_VM(audioout_sample_timer)->hw->COUNT16.CC[0].reg = new_top; - while (tc_is_syncing(MP_STATE_VM(audioout_sample_timer))) { - /* Wait for sync */ + tc_set_enable(timer, false); + timer->COUNT16.CTRLA.bit.PRESCALER = new_divisor; + tc_set_enable(timer, true); } + tc_wait_for_sync(timer); + timer->COUNT16.CC[0].reg = new_top; + tc_wait_for_sync(timer); } -void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, bool loop) { - common_hal_audioio_audioout_get_playing(self); - // Shut down any active playback. - if (active_audioout != NULL) { - tc_stop_counter(MP_STATE_VM(audioout_sample_timer)); - dma_abort_job(&audio_dma); - } else { - dac_enable(MP_STATE_VM(audioout_dac_instance)); - } - switch_audiodma_trigger(DAC_DMAC_ID_EMPTY); - struct dma_descriptor_config descriptor_config; - dma_descriptor_get_config_defaults(&descriptor_config); - if (self->bytes_per_sample == 2) { - descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD; +void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, + mp_obj_t sample, bool loop) { + if (common_hal_audioio_audioout_get_playing(self)) { + common_hal_audioio_audioout_stop(self); + } + audio_dma_result result = AUDIO_DMA_OK; + uint32_t sample_rate = audiosample_sample_rate(sample); + #ifdef SAMD21 + uint32_t max_sample_rate = 350000; + #endif + #ifdef SAMD51 + uint32_t max_sample_rate = 1000000; + #endif + if (sample_rate > max_sample_rate) { + mp_raise_ValueError_varg(translate("Sample rate too high. It must be less than %d"), max_sample_rate); + } + #ifdef SAMD21 + result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, + false /* output unsigned */, + (uint32_t) &DAC->DATABUF.reg, + DAC_DMAC_ID_EMPTY); + #endif + + #ifdef SAMD51 + uint32_t left_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; + uint8_t tc_trig_id = TC0_DMAC_ID_OVF + 3 * self->tc_index; + uint8_t left_channel_trigger = tc_trig_id; + uint32_t right_channel_reg = 0; + uint8_t right_channel_trigger = tc_trig_id; + if (self->left_channel == &pin_PA05) { + left_channel_reg = (uint32_t) &DAC->DATABUF[1].reg; + } else if (self->right_channel == &pin_PA05) { + right_channel_reg = (uint32_t) &DAC->DATABUF[1].reg; + } + if (self->right_channel == &pin_PA02) { + right_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; + } + if(right_channel_reg == left_channel_reg + 2 && audiosample_bits_per_sample(sample) == 16) { + result = audio_dma_setup_playback(&self->left_dma, sample, loop, false, 0, + false /* output unsigned */, + left_channel_reg, + left_channel_trigger); } else { - descriptor_config.beat_size = DMA_BEAT_SIZE_BYTE; - } - - descriptor_config.dst_increment_enable = false; - // Block transfer count is the number of beats per block (aka descriptor). - // In this case there are two bytes per beat so divide the length by two. - descriptor_config.block_transfer_count = self->len / self->bytes_per_sample; - descriptor_config.source_address = ((uint32_t)self->buffer + self->len); - descriptor_config.destination_address = ((uint32_t)&DAC->DATABUF.reg + 1); - descriptor_config.event_output_selection = DMA_EVENT_OUTPUT_BLOCK; - self->loop = loop; - if (self->second_buffer == NULL) { - if (loop) { - descriptor_config.next_descriptor_address = ((uint32_t)audio_dma.descriptor); - } else { - descriptor_config.next_descriptor_address = 0; + result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, + false /* output unsigned */, + left_channel_reg, + left_channel_trigger); + if (right_channel_reg != 0 && result == AUDIO_DMA_OK) { + result = audio_dma_setup_playback(&self->right_dma, sample, loop, true, 1, + false /* output unsigned */, + right_channel_reg, + right_channel_trigger); } - } else { - descriptor_config.next_descriptor_address = ((uint32_t)self->second_descriptor); } - dma_descriptor_create(audio_dma.descriptor, &descriptor_config); - - if (self->second_buffer != NULL) { - // TODO(tannewt): Correctly set the end of this. - descriptor_config.block_transfer_count = self->len / self->bytes_per_sample; - descriptor_config.source_address = ((uint32_t)self->second_buffer + self->len); - descriptor_config.next_descriptor_address = ((uint32_t)audio_dma.descriptor); - dma_descriptor_create(self->second_descriptor, &descriptor_config); - - self->last_loaded_block = 0; - self->bytes_remaining = self->file_length; - - f_lseek(&self->file->fp, self->data_start); - // Seek to the start of the PCM. - UINT length_read; - f_read(&self->file->fp, self->buffer, self->len, &length_read); - self->bytes_remaining -= length_read; - if (self->bytes_per_sample == 2) { - // Undo twos complement. - for (uint16_t i = 0; i < length_read / 2; i++) { - self->buffer[2 * i + 1] ^= 0x80; - } - } - - f_read(&self->file->fp, self->second_buffer, self->len, &length_read); - self->bytes_remaining -= length_read; - if (self->bytes_per_sample == 2) { - // Undo twos complement. - for (uint16_t i = 0; i < length_read / 2; i++) { - self->second_buffer[2 * i + 1] ^= 0x80; - } + #endif + if (result != AUDIO_DMA_OK) { + audio_dma_stop(&self->left_dma); + #ifdef SAMD51 + audio_dma_stop(&self->right_dma); + #endif + if (result == AUDIO_DMA_DMA_BUSY) { + mp_raise_RuntimeError(translate("No DMA channel found")); + } else if (result == AUDIO_DMA_MEMORY_ERROR) { + mp_raise_RuntimeError(translate("Unable to allocate buffers for signed conversion")); } } - active_audioout = self; - dma_start_transfer_job(&audio_dma); - - if (MP_STATE_VM(audiodma_block_counter) != NULL) { - tc_start_counter(MP_STATE_VM(audiodma_block_counter)); - } - set_timer_frequency(self->frequency); - tc_start_counter(MP_STATE_VM(audioout_sample_timer)); + Tc* timer = tc_insts[self->tc_index]; + set_timer_frequency(timer, audiosample_sample_rate(sample)); + timer->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; + while (timer->COUNT16.STATUS.bit.STOP == 1) {} + self->playing = true; } -void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) { - if (active_audioout == self) { - if (MP_STATE_VM(audiodma_block_counter) != NULL) { - tc_stop_counter(MP_STATE_VM(audiodma_block_counter)); - } - tc_stop_counter(MP_STATE_VM(audioout_sample_timer)); - dma_abort_job(&audio_dma); - active_audioout = NULL; - dac_disable(MP_STATE_VM(audioout_dac_instance)); - } +void common_hal_audioio_audioout_pause(audioio_audioout_obj_t* self) { + audio_dma_pause(&self->left_dma); + #ifdef SAMD51 + audio_dma_pause(&self->right_dma); + #endif } -bool common_hal_audioio_audioout_get_playing(audioio_audioout_obj_t* self) { - if (!dma_is_busy(&audio_dma)) { - if (active_audioout != NULL) { - common_hal_audioio_audioout_stop(active_audioout); - } - active_audioout = NULL; - } - return active_audioout == self; +void common_hal_audioio_audioout_resume(audioio_audioout_obj_t* self) { + // Clear any overrun/underrun errors + #ifdef SAMD21 + DAC->INTFLAG.reg = DAC_INTFLAG_UNDERRUN; + #endif + #ifdef SAMD51 + DAC->INTFLAG.reg = DAC_INTFLAG_UNDERRUN0 | DAC_INTFLAG_UNDERRUN1; + #endif + + audio_dma_resume(&self->left_dma); + #ifdef SAMD51 + audio_dma_resume(&self->right_dma); + #endif } -void common_hal_audioio_audioout_set_frequency(audioio_audioout_obj_t* self, - uint32_t frequency) { - if (frequency == 0 || frequency > 350000) { - mp_raise_ValueError("Unsupported playback frequency"); - } - self->frequency = frequency; +bool common_hal_audioio_audioout_get_paused(audioio_audioout_obj_t* self) { + return audio_dma_get_paused(&self->left_dma); +} - if (common_hal_audioio_audioout_get_playing(self)) { - set_timer_frequency(frequency); - } +void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) { + Tc* timer = tc_insts[self->tc_index]; + timer->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; + audio_dma_stop(&self->left_dma); + #ifdef SAMD51 + audio_dma_stop(&self->right_dma); + #endif + // Ramp the DAC to default. The start is ignored when the current value can be readback. + // Otherwise, we just set it immediately. + ramp_value(self->quiescent_value, self->quiescent_value); } -uint32_t common_hal_audioio_audioout_get_frequency(audioio_audioout_obj_t* self) { - return self->frequency; +bool common_hal_audioio_audioout_get_playing(audioio_audioout_obj_t* self) { + bool now_playing = audio_dma_get_playing(&self->left_dma); + if (self->playing && !now_playing) { + common_hal_audioio_audioout_stop(self); + } + return now_playing; } diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.h b/ports/atmel-samd/common-hal/audioio/AudioOut.h index 78e4ffc77d060..56b6b75c8936a 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.h +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.h @@ -29,28 +29,22 @@ #include "common-hal/microcontroller/Pin.h" -#include "extmod/vfs_fat_file.h" +#include "audio_dma.h" #include "py/obj.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t *pin; - uint32_t frequency; - uint8_t* buffer; - - // File playback specific: - uint8_t* second_buffer; - DmacDescriptor* second_descriptor; - uint32_t file_length; // In bytes - uint16_t data_start; // Where the data values start - uint8_t bytes_per_sample; - bool signed_samples; - uint16_t last_loaded_block; - uint32_t bytes_remaining; - - bool loop; - uint32_t len; - pyb_file_obj_t* file; + const mcu_pin_obj_t *left_channel; + audio_dma_t left_dma; + #ifdef SAMD51 + const mcu_pin_obj_t *right_channel; + audio_dma_t right_dma; + #endif + uint8_t tc_index; + + uint8_t tc_to_dac_event_channel; + bool playing; + uint16_t quiescent_value; } audioio_audioout_obj_t; void audioout_reset(void); diff --git a/ports/atmel-samd/common-hal/busio/I2C.c b/ports/atmel-samd/common-hal/busio/I2C.c index 77676b535582f..ffe74a2743be4 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.c +++ b/ports/atmel-samd/common-hal/busio/I2C.c @@ -32,78 +32,84 @@ #include "hal/include/hal_i2c_m_sync.h" #include "hal/include/hpl_i2c_m_sync.h" -#include "peripherals.h" -#include "pins.h" +#include "samd/sercom.h" #include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/translate.h" +#include "common-hal/busio/SPI.h" // for never_reset_sercom // Number of times to try to send packet if failed. #define ATTEMPTS 2 -void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, - const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency) { - Sercom* sercom = NULL; - uint8_t sercom_index; - uint32_t sda_pinmux = 0; - uint32_t scl_pinmux = 0; +Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, + uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux) { + *sda_pinmux = 0; + *scl_pinmux = 0; for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { - sercom_index = sda->sercom[i].index; - if (sercom_index >= SERCOM_INST_NUM) { + *sercom_index = sda->sercom[i].index; + if (*sercom_index >= SERCOM_INST_NUM) { continue; } - Sercom* potential_sercom = sercom_insts[sercom_index]; + Sercom* potential_sercom = sercom_insts[*sercom_index]; if (potential_sercom->I2CM.CTRLA.bit.ENABLE != 0 || sda->sercom[i].pad != 0) { continue; } - sda_pinmux = PINMUX(sda->pin, (i == 0) ? MUX_C : MUX_D); + *sda_pinmux = PINMUX(sda->number, (i == 0) ? MUX_C : MUX_D); for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) { - if (sercom_index == scl->sercom[j].index && + if (*sercom_index == scl->sercom[j].index && scl->sercom[j].pad == 1) { - scl_pinmux = PINMUX(scl->pin, (j == 0) ? MUX_C : MUX_D); - sercom = potential_sercom; - break; + *scl_pinmux = PINMUX(scl->number, (j == 0) ? MUX_C : MUX_D); + return potential_sercom; } } - if (sercom != NULL) { - break; - } } + return NULL; +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency, uint32_t timeout) { + uint8_t sercom_index; + uint32_t sda_pinmux, scl_pinmux; + Sercom* sercom = samd_i2c_get_sercom(scl, sda, &sercom_index, &sda_pinmux, &scl_pinmux); if (sercom == NULL) { - mp_raise_ValueError("Invalid pins"); + mp_raise_ValueError(translate("Invalid pins")); } +#if CIRCUITPY_REQUIRE_I2C_PULLUPS // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) - gpio_set_pin_function(sda->pin, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_function(scl->pin, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(sda->pin, GPIO_DIRECTION_IN); - gpio_set_pin_direction(scl->pin, GPIO_DIRECTION_IN); + gpio_set_pin_function(sda->number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_function(scl->number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(sda->number, GPIO_DIRECTION_IN); + gpio_set_pin_direction(scl->number, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(sda->pin, GPIO_PULL_DOWN); - gpio_set_pin_pull_mode(scl->pin, GPIO_PULL_DOWN); + gpio_set_pin_pull_mode(sda->number, GPIO_PULL_DOWN); + gpio_set_pin_pull_mode(scl->number, GPIO_PULL_DOWN); common_hal_mcu_delay_us(10); - gpio_set_pin_pull_mode(sda->pin, GPIO_PULL_OFF); - gpio_set_pin_pull_mode(scl->pin, GPIO_PULL_OFF); + gpio_set_pin_pull_mode(sda->number, GPIO_PULL_OFF); + gpio_set_pin_pull_mode(scl->number, GPIO_PULL_OFF); // We must pull up within 3us to achieve 400khz. common_hal_mcu_delay_us(3); - if (!gpio_get_pin_level(sda->pin) || !gpio_get_pin_level(scl->pin)) { - reset_pin(sda->pin); - reset_pin(scl->pin); - mp_raise_RuntimeError("SDA or SCL needs a pull up"); + if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) { + reset_pin_number(sda->number); + reset_pin_number(scl->number); + mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); } - gpio_set_pin_function(sda->pin, sda_pinmux); - gpio_set_pin_function(scl->pin, scl_pinmux); +#endif + + gpio_set_pin_function(sda->number, sda_pinmux); + gpio_set_pin_function(scl->number, scl_pinmux); // Set up I2C clocks on sercom. samd_peripherals_sercom_clock_init(sercom, sercom_index); if (i2c_m_sync_init(&self->i2c_desc, sercom) != ERR_NONE) { - reset_pin(sda->pin); - reset_pin(scl->pin); + reset_pin_number(sda->number); + reset_pin_number(scl->number); mp_raise_OSError(MP_EIO); } @@ -111,13 +117,14 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, // Frequency must be set before the I2C device is enabled. if (i2c_m_sync_set_baudrate(&self->i2c_desc, 0, frequency / 1000) != ERR_NONE) { - reset_pin(sda->pin); - reset_pin(scl->pin); - mp_raise_ValueError("Unsupported baudrate"); + reset_pin_number(sda->number); + reset_pin_number(scl->number); + common_hal_busio_i2c_deinit(self); + mp_raise_ValueError(translate("Unsupported baudrate")); } - self->sda_pin = sda->pin; - self->scl_pin = scl->pin; + self->sda_pin = sda->number; + self->scl_pin = scl->number; claim_pin(sda); claim_pin(scl); @@ -139,8 +146,8 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { i2c_m_sync_disable(&self->i2c_desc); i2c_m_sync_deinit(&self->i2c_desc); - reset_pin(self->sda_pin); - reset_pin(self->scl_pin); + reset_pin_number(self->sda_pin); + reset_pin_number(self->scl_pin); self->sda_pin = NO_PIN; self->scl_pin = NO_PIN; } @@ -224,3 +231,10 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, } return MP_EIO; } + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + never_reset_sercom(self->i2c_desc.device.hw); + + never_reset_pin_number(self->scl_pin); + never_reset_pin_number(self->sda_pin); +} diff --git a/ports/atmel-samd/common-hal/busio/I2C.h b/ports/atmel-samd/common-hal/busio/I2C.h index 2401d92471c7e..6bec6e8047ad4 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.h +++ b/ports/atmel-samd/common-hal/busio/I2C.h @@ -36,9 +36,12 @@ typedef struct { mp_obj_base_t base; struct i2c_m_sync_desc i2c_desc; - volatile bool has_lock; + bool has_lock; uint8_t scl_pin; uint8_t sda_pin; } busio_i2c_obj_t; +extern Sercom *samd_i2c_get_sercom(const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, + uint8_t *sercom_index, uint32_t *sda_pinmux, uint32_t *scl_pinmux); + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/atmel-samd/common-hal/busio/SPI.c b/ports/atmel-samd/common-hal/busio/SPI.c index a2bf30f054f5a..1dc389027d866 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.c +++ b/ports/atmel-samd/common-hal/busio/SPI.c @@ -31,14 +31,57 @@ #include "hpl_sercom_config.h" #include "peripheral_clk_config.h" +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" #include "hal/include/hal_gpio.h" #include "hal/include/hal_spi_m_sync.h" #include "hal/include/hpl_spi_m_sync.h" #include "supervisor/shared/rgb_led_status.h" -#include "peripherals.h" -#include "pins.h" -#include "shared_dma.h" +#include "samd/dma.h" +#include "samd/sercom.h" + +bool never_reset_sercoms[SERCOM_INST_NUM]; + +void never_reset_sercom(Sercom* sercom) { + // Reset all SERCOMs except the ones being used by on-board devices. + Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; + for (int i = 0; i < SERCOM_INST_NUM; i++) { + if (sercom_instances[i] == sercom) { + never_reset_sercoms[i] = true; + break; + } + } +} + +void allow_reset_sercom(Sercom* sercom) { + // Reset all SERCOMs except the ones being used by on-board devices. + Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; + for (int i = 0; i < SERCOM_INST_NUM; i++) { + if (sercom_instances[i] == sercom) { + never_reset_sercoms[i] = false; + break; + } + } +} + +void reset_sercoms(void) { + // Reset all SERCOMs except the ones being used by on-board devices. + Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; + for (int i = 0; i < SERCOM_INST_NUM; i++) { + if (never_reset_sercoms[i]) { + continue; + } + #ifdef MICROPY_HW_APA102_SERCOM + if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { + continue; + } + #endif + // SWRST is same for all modes of SERCOMs. + sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; + } +} + void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, @@ -46,14 +89,32 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, Sercom* sercom = NULL; uint8_t sercom_index; uint32_t clock_pinmux = 0; - bool mosi_none = mosi == mp_const_none; - bool miso_none = miso == mp_const_none; + bool mosi_none = mosi == NULL; + bool miso_none = miso == NULL; uint32_t mosi_pinmux = 0; uint32_t miso_pinmux = 0; uint8_t clock_pad = 0; uint8_t mosi_pad = 0; uint8_t miso_pad = 0; uint8_t dopo = 255; + + // Special case for SAMR boards. + #ifdef PIN_PC19 + if (miso == &pin_PC19) { + if (mosi == &pin_PB30 && clock == &pin_PC18) { + sercom = SERCOM4; + sercom_index = 4; + clock_pinmux = MUX_F; + mosi_pinmux = MUX_F; + miso_pinmux = MUX_F; + clock_pad = 3; + mosi_pad = 2; + miso_pad = 0; + dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad); + } + // Error, leave SERCOM unset to throw an exception later. + } else { + #endif for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { sercom_index = clock->sercom[i].index; // 2 for SERCOM2, etc. if (sercom_index >= SERCOM_INST_NUM) { @@ -61,7 +122,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, } Sercom* potential_sercom = sercom_insts[sercom_index]; if ( - #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !defined(CIRCUITPY_BITBANG_APA102) + #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 (potential_sercom->SPI.CTRLA.bit.ENABLE != 0 && potential_sercom != status_apa102.spi_desc.dev.prvt && !apa102_sck_in_use)) { @@ -70,7 +131,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, #endif continue; } - clock_pinmux = PINMUX(clock->pin, (i == 0) ? MUX_C : MUX_D); + clock_pinmux = PINMUX(clock->number, (i == 0) ? MUX_C : MUX_D); clock_pad = clock->sercom[i].pad; if (!samd_peripherals_valid_spi_clock_pad(clock_pad)) { continue; @@ -78,7 +139,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) { if (!mosi_none) { if (sercom_index == mosi->sercom[j].index) { - mosi_pinmux = PINMUX(mosi->pin, (j == 0) ? MUX_C : MUX_D); + mosi_pinmux = PINMUX(mosi->number, (j == 0) ? MUX_C : MUX_D); mosi_pad = mosi->sercom[j].pad; dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad); if (dopo > 0x3) { @@ -95,7 +156,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (!miso_none) { for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) { if (sercom_index == miso->sercom[k].index) { - miso_pinmux = PINMUX(miso->pin, (k == 0) ? MUX_C : MUX_D); + miso_pinmux = PINMUX(miso->number, (k == 0) ? MUX_C : MUX_D); miso_pad = miso->sercom[k].pad; sercom = potential_sercom; break; @@ -110,14 +171,17 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, break; } } + #ifdef PIN_PC19 + } + #endif if (sercom == NULL) { - mp_raise_ValueError("Invalid pins"); + mp_raise_ValueError(translate("Invalid pins")); } // Set up SPI clocks on SERCOM. samd_peripherals_sercom_clock_init(sercom, sercom_index); - #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !defined(CIRCUITPY_BITBANG_APA102) + #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 // if we're re-using the dotstar sercom, make sure it is disabled or the init will fail out hri_sercomspi_clear_CTRLA_ENABLE_bit(sercom); #endif @@ -139,35 +203,43 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, mp_raise_OSError(MP_EIO); } - gpio_set_pin_direction(clock->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_pull_mode(clock->pin, GPIO_PULL_OFF); - gpio_set_pin_function(clock->pin, clock_pinmux); + gpio_set_pin_direction(clock->number, GPIO_DIRECTION_OUT); + gpio_set_pin_pull_mode(clock->number, GPIO_PULL_OFF); + gpio_set_pin_function(clock->number, clock_pinmux); claim_pin(clock); - self->clock_pin = clock->pin; + self->clock_pin = clock->number; if (mosi_none) { self->MOSI_pin = NO_PIN; } else { - gpio_set_pin_direction(mosi->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_pull_mode(mosi->pin, GPIO_PULL_OFF); - gpio_set_pin_function(mosi->pin, mosi_pinmux); - self->MOSI_pin = mosi->pin; + gpio_set_pin_direction(mosi->number, GPIO_DIRECTION_OUT); + gpio_set_pin_pull_mode(mosi->number, GPIO_PULL_OFF); + gpio_set_pin_function(mosi->number, mosi_pinmux); + self->MOSI_pin = mosi->number; claim_pin(mosi); } if (miso_none) { self->MISO_pin = NO_PIN; } else { - gpio_set_pin_direction(miso->pin, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(miso->pin, GPIO_PULL_OFF); - gpio_set_pin_function(miso->pin, miso_pinmux); - self->MISO_pin = miso->pin; + gpio_set_pin_direction(miso->number, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(miso->number, GPIO_PULL_OFF); + gpio_set_pin_function(miso->number, miso_pinmux); + self->MISO_pin = miso->number; claim_pin(miso); } spi_m_sync_enable(&self->spi_desc); } +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + never_reset_sercom(self->spi_desc.dev.prvt); + + never_reset_pin_number(self->clock_pin); + never_reset_pin_number(self->MOSI_pin); + never_reset_pin_number(self->MISO_pin); +} + bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { return self->clock_pin == NO_PIN; } @@ -176,11 +248,13 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { if (common_hal_busio_spi_deinited(self)) { return; } + allow_reset_sercom(self->spi_desc.dev.prvt); + spi_m_sync_disable(&self->spi_desc); spi_m_sync_deinit(&self->spi_desc); - reset_pin(self->clock_pin); - reset_pin(self->MOSI_pin); - reset_pin(self->MISO_pin); + reset_pin_number(self->clock_pin); + reset_pin_number(self->MOSI_pin); + reset_pin_number(self->MISO_pin); self->clock_pin = NO_PIN; } @@ -287,3 +361,13 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uin uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { return samd_peripherals_spi_baud_reg_value_to_baudrate(hri_sercomspi_read_BAUD_reg(self->spi_desc.dev.prvt)); } + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + void * hw = self->spi_desc.dev.prvt; + return hri_sercomspi_get_CTRLA_CPHA_bit(hw); +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + void * hw = self->spi_desc.dev.prvt; + return hri_sercomspi_get_CTRLA_CPOL_bit(hw); +} diff --git a/ports/atmel-samd/common-hal/busio/SPI.h b/ports/atmel-samd/common-hal/busio/SPI.h index 2fced6d642eea..a1c0e15179785 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.h +++ b/ports/atmel-samd/common-hal/busio/SPI.h @@ -42,4 +42,8 @@ typedef struct { uint8_t MISO_pin; } busio_spi_obj_t; +void reset_sercoms(void); +void never_reset_sercom(Sercom* sercom); + + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index 5376775206c36..1f6b75f972c4b 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -28,12 +28,13 @@ #include "shared-bindings/busio/UART.h" #include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" #include "py/gc.h" #include "py/mperrno.h" #include "py/runtime.h" #include "py/stream.h" - -#include "tick.h" +#include "supervisor/shared/translate.h" +#include "supervisor/shared/tick.h" #include "hpl_sercom_config.h" #include "peripheral_clk_config.h" @@ -42,8 +43,7 @@ #include "hal/include/hal_usart_async.h" #include "hal/include/hpl_usart_async.h" -#include "peripherals.h" -#include "pins.h" +#include "samd/sercom.h" // Do-nothing callback needed so that usart_async code will enable rx interrupts. // See comment below re usart_async_register_callback() @@ -52,9 +52,12 @@ static void usart_async_rxc_callback(const struct usart_async_descriptor *const } void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, uint32_t timeout, - uint8_t receiver_buffer_size) { + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + Sercom* sercom = NULL; uint8_t sercom_index = 255; // Unset index uint32_t rx_pinmux = 0; @@ -62,19 +65,23 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t tx_pinmux = 0; uint8_t tx_pad = 255; // Unset pad + if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + if (bits > 8) { - mp_raise_NotImplementedError("bytes > 8 bits not supported"); + mp_raise_NotImplementedError(translate("bytes > 8 bits not supported")); } - bool have_tx = tx != mp_const_none; - bool have_rx = rx != mp_const_none; + bool have_tx = tx != NULL; + bool have_rx = rx != NULL; if (!have_tx && !have_rx) { - mp_raise_ValueError("tx and rx cannot both be None"); + mp_raise_ValueError(translate("tx and rx cannot both be None")); } self->baudrate = baudrate; self->character_bits = bits; - self->timeout_ms = timeout; + self->timeout_ms = timeout * 1000; // This assignment is only here because the usart_async routines take a *const argument. struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; @@ -87,14 +94,22 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, continue; } potential_sercom = sercom_insts[sercom_index]; - if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || +#ifdef SAMD21 + if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || !(tx->sercom[i].pad == 0 || tx->sercom[i].pad == 2)) { continue; } - tx_pinmux = PINMUX(tx->pin, (i == 0) ? MUX_C : MUX_D); +#endif +#ifdef SAMD51 + if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || + !(tx->sercom[i].pad == 0)) { + continue; + } +#endif + tx_pinmux = PINMUX(tx->number, (i == 0) ? MUX_C : MUX_D); tx_pad = tx->sercom[i].pad; - if (rx == mp_const_none) { + if (rx == NULL) { sercom = potential_sercom; break; } @@ -104,7 +119,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, sercom_insts[rx->sercom[j].index]->USART.CTRLA.bit.ENABLE == 0) || sercom_index == rx->sercom[j].index) && rx->sercom[j].pad != tx_pad) { - rx_pinmux = PINMUX(rx->pin, (j == 0) ? MUX_C : MUX_D); + rx_pinmux = PINMUX(rx->number, (j == 0) ? MUX_C : MUX_D); rx_pad = rx->sercom[j].pad; sercom = sercom_insts[rx->sercom[j].index]; sercom_index = rx->sercom[j].index; @@ -116,7 +131,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } } if (sercom == NULL) { - mp_raise_ValueError("Invalid pins"); + mp_raise_ValueError(translate("Invalid pins")); } if (!have_tx) { tx_pad = 0; @@ -133,10 +148,16 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (rx && receiver_buffer_size > 0) { self->buffer_length = receiver_buffer_size; - self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, false); + // Initially allocate the UART's buffer in the long-lived part of the + // heap. UARTs are generally long-lived objects, but the "make long- + // lived" machinery is incapable of moving internal pointers like + // self->buffer, so do it manually. (However, as long as internal + // pointers like this are NOT moved, allocating the buffer + // in the long-lived pool is not strictly necessary) + self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, true); if (self->buffer == NULL) { common_hal_busio_uart_deinit(self); - mp_raise_msg(&mp_type_MemoryError, "Failed to allocate RX buffer"); + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), self->buffer_length * sizeof(uint8_t)); } } else { self->buffer_length = 0; @@ -144,7 +165,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } if (usart_async_init(usart_desc_p, sercom, self->buffer, self->buffer_length, NULL) != ERR_NONE) { - mp_raise_ValueError("Could not initialize UART"); + mp_raise_ValueError(translate("Could not initialize UART")); } // usart_async_init() sets a number of defaults based on a prototypical SERCOM @@ -157,24 +178,35 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, // 0x1: TX pad 2; no RTS/CTS // 0x2: TX pad 0; RTS: pad 2, CTS: pad 3 (not used by us right now) // So divide by 2 to map pad to value. - hri_sercomusart_write_CTRLA_TXPO_bf(sercom, tx_pad / 2); // RXPO: // 0x0: RX pad 0 // 0x1: RX pad 1 // 0x2: RX pad 2 // 0x3: RX pad 3 - hri_sercomusart_write_CTRLA_RXPO_bf(sercom, rx_pad); + + // Doing a group mask and set of the registers saves 60 bytes over setting the bitfields individually. + + sercom->USART.CTRLA.reg &= ~(SERCOM_USART_CTRLA_TXPO_Msk | + SERCOM_USART_CTRLA_RXPO_Msk | + SERCOM_USART_CTRLA_FORM_Msk); + sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(tx_pad / 2) | + SERCOM_USART_CTRLA_RXPO(rx_pad) | + (parity == PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1)); // Enable tx and/or rx based on whether the pins were specified. - hri_sercomusart_write_CTRLB_TXEN_bit(sercom, have_tx); - hri_sercomusart_write_CTRLB_RXEN_bit(sercom, have_rx); - - // Set parity, baud rate, stop bits, etc. 9-bit bytes not supported. - usart_async_set_parity(usart_desc_p, parity == PARITY_NONE ? USART_PARITY_NONE : - (parity == PARITY_ODD ? USART_PARITY_ODD : USART_PARITY_EVEN)); - usart_async_set_stopbits(usart_desc_p, stop == 1 ? USART_STOP_BITS_ONE : USART_STOP_BITS_TWO); - // This field is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that. - usart_async_set_character_size(usart_desc_p, bits % 8); + // CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that. + sercom->USART.CTRLB.reg &= ~(SERCOM_USART_CTRLB_TXEN | + SERCOM_USART_CTRLB_RXEN | + SERCOM_USART_CTRLB_PMODE | + SERCOM_USART_CTRLB_SBMODE | + SERCOM_USART_CTRLB_CHSIZE_Msk); + sercom->USART.CTRLB.reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0) | + (have_rx ? SERCOM_USART_CTRLB_RXEN : 0) | + (parity == PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) | + (stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) | + SERCOM_USART_CTRLB_CHSIZE(bits % 8); + + // Set baud rate common_hal_busio_uart_set_baudrate(self, baudrate); // Turn on rx interrupt handling. The UART async driver has its own set of internal callbacks, @@ -188,20 +220,20 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (have_tx) { - gpio_set_pin_direction(tx->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_pull_mode(tx->pin, GPIO_PULL_OFF); - gpio_set_pin_function(tx->pin, tx_pinmux); - self->tx_pin = tx->pin; + gpio_set_pin_direction(tx->number, GPIO_DIRECTION_OUT); + gpio_set_pin_pull_mode(tx->number, GPIO_PULL_OFF); + gpio_set_pin_function(tx->number, tx_pinmux); + self->tx_pin = tx->number; claim_pin(tx); } else { self->tx_pin = NO_PIN; } if (have_rx) { - gpio_set_pin_direction(rx->pin, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(rx->pin, GPIO_PULL_OFF); - gpio_set_pin_function(rx->pin, rx_pinmux); - self->rx_pin = rx->pin; + gpio_set_pin_direction(rx->number, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(rx->number, GPIO_PULL_OFF); + gpio_set_pin_function(rx->number, rx_pinmux); + self->rx_pin = rx->number; claim_pin(rx); } else { self->rx_pin = NO_PIN; @@ -222,8 +254,8 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; usart_async_disable(usart_desc_p); usart_async_deinit(usart_desc_p); - reset_pin(self->rx_pin); - reset_pin(self->tx_pin); + reset_pin_number(self->rx_pin); + reset_pin_number(self->tx_pin); self->rx_pin = NO_PIN; self->tx_pin = NO_PIN; } @@ -231,7 +263,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { if (self->rx_pin == NO_PIN) { - mp_raise_ValueError("No RX pin"); + mp_raise_ValueError(translate("No RX pin")); } // This assignment is only here because the usart_async routines take a *const argument. @@ -246,10 +278,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t usart_async_get_io_descriptor(usart_desc_p, &io); size_t total_read = 0; - uint64_t start_ticks = ticks_ms; + uint64_t start_ticks = supervisor_ticks_ms64(); // Busy-wait until timeout or until we've read enough chars. - while (ticks_ms - start_ticks < self->timeout_ms) { + while (supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) { // Read as many chars as we can right now, up to len. size_t num_read = io_read(io, data, len); @@ -263,11 +295,23 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t } if (num_read > 0) { // Reset the timeout on every character read. - start_ticks = ticks_ms; + start_ticks = supervisor_ticks_ms64(); } -#ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP -#endif + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + break; + } + // If we are zero timeout, make sure we don't loop again (in the event + // we read in under 1ms) + if (self->timeout_ms == 0) { + break; + } + } + + if (total_read == 0) { + *errcode = EAGAIN; + return MP_STREAM_ERROR; } return total_read; @@ -276,7 +320,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t // Write characters. size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { if (self->tx_pin == NO_PIN) { - mp_raise_ValueError("No TX pin"); + mp_raise_ValueError(translate("No TX pin")); } // This assignment is only here because the usart_async routines take a *const argument. @@ -285,34 +329,24 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, struct io_descriptor *io; usart_async_get_io_descriptor(usart_desc_p, &io); + // Start writing characters. This is non-blocking and will + // return immediately after setting up the write. if (io_write(io, data, len) < 0) { *errcode = MP_EAGAIN; return MP_STREAM_ERROR; } - // Wait until write is complete or timeout. - bool done = false; - uint64_t start_ticks = ticks_ms; - // Busy-wait for timeout. - while (ticks_ms - start_ticks < self->timeout_ms) { - if (usart_async_is_tx_empty(usart_desc_p)) { - done = true; + // Busy-wait until all characters transmitted. + struct usart_async_status async_status; + while (true) { + usart_async_get_status(usart_desc_p, &async_status); + if (async_status.txcnt >= len) { break; } - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif + RUN_BACKGROUND_TASKS; } - if (!done) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - struct usart_async_status async_status; - // Could return ERR_BUSY, but if that's true there's already a problem. - usart_async_get_status(usart_desc_p, &async_status); - return async_status.txcnt; + return len; } uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { @@ -334,16 +368,37 @@ void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrat self->baudrate = baudrate; } +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - return self->buffer_size; + // This assignment is only here because the usart_async routines take a *const argument. + struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_status async_status; + usart_async_get_status(usart_desc_p, &async_status); + return async_status.rxcnt; +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + // This assignment is only here because the usart_async routines take a *const argument. + struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + usart_async_flush_rx_buffer(usart_desc_p); + } +// True if there are no characters still to be written. bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { if (self->tx_pin == NO_PIN) { return false; } // This assignment is only here because the usart_async routines take a *const argument. - const struct _usart_async_device * const usart_device_p = - (struct _usart_async_device * const) &self->usart_desc.device; - return _usart_async_is_byte_sent(usart_device_p); + struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc; + struct usart_async_status async_status; + usart_async_get_status(usart_desc_p, &async_status); + return !(async_status.flags & USART_ASYNC_STATUS_BUSY); } diff --git a/ports/atmel-samd/common-hal/busio/UART.h b/ports/atmel-samd/common-hal/busio/UART.h index 685755a5d1dd1..f94df040f8ce2 100644 --- a/ports/atmel-samd/common-hal/busio/UART.h +++ b/ports/atmel-samd/common-hal/busio/UART.h @@ -42,10 +42,6 @@ typedef struct { bool rx_error; uint32_t baudrate; uint32_t timeout_ms; - // Index of the oldest received character. - uint32_t buffer_start; - // Index of the next available spot to store a character. - uint32_t buffer_size; uint32_t buffer_length; uint8_t* buffer; } busio_uart_obj_t; diff --git a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c index 109f14b04dcf4..68d3da806cfd4 100644 --- a/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c +++ b/ports/atmel-samd/common-hal/digitalio/DigitalInOut.c @@ -34,81 +34,96 @@ #include "common-hal/microcontroller/Pin.h" #include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/translate.h" digitalinout_result_t common_hal_digitalio_digitalinout_construct( digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { claim_pin(pin); self->pin = pin; + self->output = false; + self->open_drain = false; - gpio_set_pin_pull_mode(pin->pin, GPIO_PULL_OFF); - gpio_set_pin_direction(pin->pin, GPIO_DIRECTION_IN); + // Must set pull after setting direction. + gpio_set_pin_direction(pin->number, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(pin->number, GPIO_PULL_OFF); return DIGITALINOUT_OK; } +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} + bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { if (common_hal_digitalio_digitalinout_deinited(self)) { return; } - reset_pin(self->pin->pin); - self->pin = mp_const_none; + reset_pin_number(self->pin->number); + self->pin = NULL; } void common_hal_digitalio_digitalinout_switch_to_input( digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { self->output = false; - + // This also sets direction to input. common_hal_digitalio_digitalinout_set_pull(self, pull); } void common_hal_digitalio_digitalinout_switch_to_output( digitalio_digitalinout_obj_t* self, bool value, digitalio_drive_mode_t drive_mode) { - const uint8_t pin = self->pin->pin; + const uint8_t pin = self->pin->number; gpio_set_pin_pull_mode(pin, GPIO_PULL_OFF); - gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT); - // Turn on "strong" pin driving (more current available). See DRVSTR doc in datasheet. - hri_port_set_PINCFG_DRVSTR_bit(PORT, (enum gpio_port)GPIO_PORT(pin), pin); + hri_port_set_PINCFG_DRVSTR_bit(PORT, (enum gpio_port)GPIO_PORT(pin), GPIO_PIN(pin)); self->output = true; self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + + // Direction is set in set_value. We don't need to do it here. common_hal_digitalio_digitalinout_set_value(self, value); } digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( digitalio_digitalinout_obj_t* self) { - return self->output? DIRECTION_OUTPUT : DIRECTION_INPUT; + return self->output ? DIRECTION_OUTPUT : DIRECTION_INPUT; } void common_hal_digitalio_digitalinout_set_value( digitalio_digitalinout_obj_t* self, bool value) { + const uint8_t pin = self->pin->number; + const uint8_t port = GPIO_PORT(pin); + const uint32_t pin_mask = 1U << GPIO_PIN(pin); if (value) { if (self->open_drain) { - gpio_set_pin_direction(self->pin->pin, GPIO_DIRECTION_IN); + // Assertion: pull is off, so the pin is floating in this case. + // We do open-drain high output (no sinking of current) + // by changing the direction to input with no pulls. + hri_port_clear_DIR_DIR_bf(PORT, port, pin_mask); } else { - gpio_set_pin_level(self->pin->pin, true); - gpio_set_pin_direction(self->pin->pin, GPIO_DIRECTION_OUT); + hri_port_set_DIR_DIR_bf(PORT, port, pin_mask); + hri_port_set_OUT_OUT_bf(PORT, port, pin_mask); } } else { - gpio_set_pin_level(self->pin->pin, false); - gpio_set_pin_direction(self->pin->pin, GPIO_DIRECTION_OUT); + hri_port_set_DIR_DIR_bf(PORT, port, pin_mask); + hri_port_clear_OUT_OUT_bf(PORT,port, pin_mask); } } bool common_hal_digitalio_digitalinout_get_value( digitalio_digitalinout_obj_t* self) { - const uint8_t pin = self->pin->pin; + const uint8_t pin = self->pin->number; if (!self->output) { return gpio_get_pin_level(pin); } else { - if (self->open_drain && hri_port_get_DIR_reg(PORT, (enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin)) == 0) { + if (self->open_drain && hri_port_get_DIR_reg(PORT, GPIO_PORT(pin), 1U << GPIO_PIN(pin)) == 0) { return true; } else { - return hri_port_get_OUT_reg(PORT, (enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin)); + return hri_port_get_OUT_reg(PORT, GPIO_PORT(pin), 1U << GPIO_PIN(pin)); } } } @@ -119,7 +134,7 @@ void common_hal_digitalio_digitalinout_set_drive_mode( bool value = common_hal_digitalio_digitalinout_get_value(self); self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; // True is implemented differently between modes so reset the value to make - // sure its correct for the new mode. + // sure it's correct for the new mode. if (value) { common_hal_digitalio_digitalinout_set_value(self, value); } @@ -148,19 +163,21 @@ void common_hal_digitalio_digitalinout_set_pull( default: break; } - gpio_set_pin_pull_mode(self->pin->pin, asf_pull); + // Must set pull after setting direction. + gpio_set_pin_direction(self->pin->number, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(self->pin->number, asf_pull); } digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( digitalio_digitalinout_obj_t* self) { - uint32_t pin = self->pin->pin; + uint32_t pin = self->pin->number; if (self->output) { - mp_raise_AttributeError("Cannot get pull while in output mode"); + mp_raise_AttributeError(translate("Cannot get pull while in output mode")); return PULL_NONE; } else { - if (hri_port_get_PINCFG_PULLEN_bit(PORT, (enum gpio_port)GPIO_PORT(pin), pin) == 0) { + if (hri_port_get_PINCFG_PULLEN_bit(PORT, GPIO_PORT(pin), GPIO_PIN(pin)) == 0) { return PULL_NONE; - } if (hri_port_get_OUT_reg(PORT, (enum gpio_port)GPIO_PORT(pin), 1U << GPIO_PIN(pin)) > 0) { + } if (hri_port_get_OUT_reg(PORT, GPIO_PORT(pin), 1U << GPIO_PIN(pin)) > 0) { return PULL_UP; } else { return PULL_DOWN; diff --git a/ports/atmel-samd/common-hal/displayio/ParallelBus.c b/ports/atmel-samd/common-hal/displayio/ParallelBus.c new file mode 100644 index 0000000000000..2479e3b40e960 --- /dev/null +++ b/ports/atmel-samd/common-hal/displayio/ParallelBus.c @@ -0,0 +1,150 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "tick.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + uint8_t data_pin = data0->number; + if (data_pin % 8 != 0) { + mp_raise_ValueError(translate("Data 0 pin must be byte aligned")); + } + for (uint8_t i = 0; i < 8; i++) { + if (!pin_number_is_free(data_pin + i)) { + mp_raise_ValueError_varg(translate("Bus pin %d is already in use"), i); + } + } + PortGroup *const g = &PORT->Group[data0->number / 32]; + g->DIRSET.reg = 0xff << (data_pin % 32); + uint32_t wrconfig = PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_DRVSTR; + if (data_pin % 32 > 15) { + wrconfig |= PORT_WRCONFIG_HWSEL | (0xff << ((data_pin % 32) - 16)); + } else { + wrconfig |= 0xff << (data_pin % 32); + } + g->WRCONFIG.reg = wrconfig; + self->bus = ((uint8_t*) &g->OUT.reg) + (data0->number % 32 / 8); + + self->command.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->command, command); + common_hal_digitalio_digitalinout_switch_to_output(&self->command, true, DRIVE_MODE_PUSH_PULL); + + self->chip_select.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->chip_select, chip_select); + common_hal_digitalio_digitalinout_switch_to_output(&self->chip_select, true, DRIVE_MODE_PUSH_PULL); + + self->write.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->write, write); + common_hal_digitalio_digitalinout_switch_to_output(&self->write, true, DRIVE_MODE_PUSH_PULL); + + self->read.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->read, read); + common_hal_digitalio_digitalinout_switch_to_output(&self->read, true, DRIVE_MODE_PUSH_PULL); + + self->data0_pin = data_pin; + self->write_group = &PORT->Group[write->number / 32]; + self->write_mask = 1 << (write->number % 32); + + self->reset.base.type = &mp_type_NoneType; + if (reset != NULL) { + self->reset.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->reset, reset); + common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL); + never_reset_pin_number(reset->number); + common_hal_displayio_parallelbus_reset(self); + } + + never_reset_pin_number(command->number); + never_reset_pin_number(chip_select->number); + never_reset_pin_number(write->number); + never_reset_pin_number(read->number); + for (uint8_t i = 0; i < 8; i++) { + never_reset_pin_number(data_pin + i); + } +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + for (uint8_t i = 0; i < 8; i++) { + reset_pin_number(self->data0_pin + i); + } + + reset_pin_number(self->command.pin->number); + reset_pin_number(self->chip_select.pin->number); + reset_pin_number(self->write.pin->number); + reset_pin_number(self->read.pin->number); + reset_pin_number(self->reset.pin->number); +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + if (self->reset.base.type == &mp_type_NoneType) { + return false; + } + + common_hal_digitalio_digitalinout_set_value(&self->reset, false); + common_hal_mcu_delay_us(4); + common_hal_digitalio_digitalinout_set_value(&self->reset, true); + return true; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return true; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, false); + return true; +} + +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA); + uint32_t* clear_write = (uint32_t*) &self->write_group->OUTCLR.reg; + uint32_t* set_write = (uint32_t*) &self->write_group->OUTSET.reg; + uint32_t mask = self->write_mask; + for (uint32_t i = 0; i < data_length; i++) { + *clear_write = mask; + *self->bus = data[i]; + *set_write = mask; + } +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, true); +} diff --git a/ports/atmel-samd/common-hal/displayio/ParallelBus.h b/ports/atmel-samd/common-hal/displayio/ParallelBus.h new file mode 100644 index 0000000000000..630bec351b686 --- /dev/null +++ b/ports/atmel-samd/common-hal/displayio/ParallelBus.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* bus; + digitalio_digitalinout_obj_t command; + digitalio_digitalinout_obj_t chip_select; + digitalio_digitalinout_obj_t reset; + digitalio_digitalinout_obj_t write; + digitalio_digitalinout_obj_t read; + uint8_t data0_pin; + PortGroup* write_group; + uint32_t write_mask; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c new file mode 100644 index 0000000000000..cbb0671045df8 --- /dev/null +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c @@ -0,0 +1,550 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "hal/include/hal_gpio.h" +#include "atmel_start_pins.h" +#include "supervisor/shared/translate.h" + +#include "mpconfigport.h" +#include "py/runtime.h" +#include "timer_handler.h" +#include "background.h" + +#include "samd/clocks.h" +#include "samd/timers.h" +#include "samd/events.h" +#include "samd/pins.h" +#include "samd/external_interrupts.h" + +#include "shared-bindings/frequencyio/FrequencyIn.h" +#include "peripheral_clk_config.h" +#include "hpl_gclk_config.h" + +#include "tick.h" + +#ifdef SAMD21 +#include "hpl/gclk/hpl_gclk_base.h" +#endif + +static frequencyio_frequencyin_obj_t *active_frequencyins[TC_INST_NUM]; +volatile uint8_t reference_tc = 0xff; +#ifdef SAMD51 +static uint8_t dpll_gclk; +#endif + +void frequencyin_emergency_cancel_capture(uint8_t index) { + frequencyio_frequencyin_obj_t* self = active_frequencyins[index]; + + NVIC_DisableIRQ(self->TC_IRQ); + NVIC_ClearPendingIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_DisableIRQ(EIC_IRQn); + NVIC_ClearPendingIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_DisableIRQ(EIC_0_IRQn + self->channel); + NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); + #endif + + common_hal_frequencyio_frequencyin_pause(self); // pause any further captures + + NVIC_EnableIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_EnableIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_EnableIRQ(EIC_0_IRQn + self->channel); + #endif + mp_raise_RuntimeError(translate("Frequency captured is above capability. Capture Paused.")); +} + +void frequencyin_interrupt_handler(uint8_t index) { + Tc* ref_tc = tc_insts[reference_tc]; + + if (!ref_tc->COUNT16.INTFLAG.bit.OVF) return; // false trigger + + uint32_t current_us; + uint64_t current_ms; + current_tick(¤t_ms, ¤t_us); + + for (uint8_t i = 0; i <= (TC_INST_NUM - 1); i++) { + if (active_frequencyins[i] != NULL) { + frequencyio_frequencyin_obj_t* self = active_frequencyins[i]; + Tc* tc = tc_insts[self->tc_index]; + + uint32_t mask = 1 << self->channel; + if ((EIC->INTFLAG.reg & mask) == mask) { + // Make sure capture_period has elapsed before we + // record a new event count. + if (current_ms - self->last_ms >= self->capture_period) { + float new_factor = self->last_us + (1000 - current_us); + // ms difference will not need 64 bits. If we use 64 bits, + // double-precision float routines are required, and we don't + // want to include them because they're very large. + self->factor = (uint32_t) (current_ms - self->last_ms) + (new_factor / 1000); + self->last_ms = current_ms; + self->last_us = current_us; + + #ifdef SAMD51 + tc->COUNT16.CTRLBSET.bit.CMD = TC_CTRLBSET_CMD_READSYNC_Val; + while ((tc->COUNT16.SYNCBUSY.bit.COUNT == 1) || + (tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_READSYNC_Val)) { + } + #endif + + uint16_t new_freq = tc->COUNT16.COUNT.reg; + if ((tc->COUNT16.INTFLAG.reg & TC_INTFLAG_OVF) == 1) { + new_freq += 65535; + tc->COUNT16.INTFLAG.reg |= TC_INTFLAG_OVF; + } + self->frequency = new_freq; + + #ifdef SAMD51 + tc->COUNT16.CTRLBSET.bit.CMD = TC_CTRLBSET_CMD_RETRIGGER_Val; + while ((tc->COUNT16.SYNCBUSY.bit.COUNT == 1) || + (tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_RETRIGGER_Val)) { + } + #endif + } + EIC->INTFLAG.reg |= mask; + } + + // Check if we've reached the upper limit of detection + if (!background_tasks_ok() || self->errored_too_fast) { + self->errored_too_fast = true; + frequencyin_emergency_cancel_capture(i); + } + } + } + ref_tc->COUNT16.INTFLAG.reg |= TC_INTFLAG_OVF; +} + +void frequencyin_reference_tc_init() { + if (reference_tc == 0xff) { + return; + } + #ifdef SAMD21 + set_timer_handler(true, reference_tc, TC_HANDLER_FREQUENCYIN); + turn_on_clocks(true, reference_tc, 0); + #endif + // use the DPLL we setup so that the reference_tc and freqin_tc(s) + // are using the same clock frequency. + #ifdef SAMD51 + if (dpll_gclk == 0xff) { + frequencyin_samd51_start_dpll(); + } + set_timer_handler(true, reference_tc, TC_HANDLER_FREQUENCYIN); + turn_on_clocks(true, reference_tc, dpll_gclk); + #endif + + Tc *tc = tc_insts[reference_tc]; + tc_set_enable(tc, false); + tc_reset(tc); + + #ifdef SAMD21 + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1; + tc->COUNT16.INTENSET.bit.OVF = 1; + NVIC_EnableIRQ(TC3_IRQn + reference_tc); + #endif + #ifdef SAMD51 + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | + TC_CTRLA_PRESCALER_DIV1; + tc->COUNT16.INTENSET.bit.OVF = 1; + NVIC_EnableIRQ(TC0_IRQn + reference_tc); + #endif +} + +bool frequencyin_reference_tc_enabled() { + if (reference_tc == 0xff) { + return false; + } + Tc *tc = tc_insts[reference_tc]; + return tc->COUNT16.CTRLA.bit.ENABLE; +} + +void frequencyin_reference_tc_enable(bool enable) { + if (reference_tc == 0xff) { + return; + } + Tc *tc = tc_insts[reference_tc]; + tc_set_enable(tc, enable); +} + +#ifdef SAMD51 +void frequencyin_samd51_start_dpll() { + if (clock_get_enabled(0, GCLK_SOURCE_DPLL1)) { + return; + } + + uint8_t free_gclk = find_free_gclk(1); + if (free_gclk == 0xff) { + dpll_gclk = 0xff; + return; + } + + GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(free_gclk); + // TC4-7 can only have a max of 100MHz source + // DPLL1 frequency equation with [X]OSC32K as source: 98.304MHz = 32768(2999 + 1 + 0/32) + // Will also enable the Lock Bypass due to low-frequency sources causing DPLL unlocks + // as outlined in the Errata (1.12.1) + OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0) | OSCCTRL_DPLLRATIO_LDR(2999); +#if BOARD_HAS_CRYSTAL + // we can use XOSC32K directly as the source + OSC32KCTRL->XOSC32K.bit.EN32K = 1; + OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_REFCLK(1) | OSCCTRL_DPLLCTRLB_LBYPASS; +#else + // can't use OSCULP32K directly; need to setup a GCLK as a reference, + // which must be done in samd/clocks.c to avoid waiting for sync + return; + //OSC32KCTRL->OSCULP32K.bit.EN32K = 1; + //OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_REFCLK(0); +#endif + OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_ENABLE; + + while (!(OSCCTRL->Dpll[1].DPLLSTATUS.bit.LOCK || OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY)) {} + enable_clock_generator(free_gclk, GCLK_GENCTRL_SRC_DPLL1_Val, 1); + dpll_gclk = free_gclk; +} + +void frequencyin_samd51_stop_dpll() { + if (!clock_get_enabled(0, GCLK_SOURCE_DPLL1)) { + return; + } + + disable_clock_generator(dpll_gclk); + + GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].reg = 0; + OSCCTRL->Dpll[1].DPLLCTRLA.reg = 0; + OSCCTRL->Dpll[1].DPLLRATIO.reg = 0; + OSCCTRL->Dpll[1].DPLLCTRLB.reg = 0; + + while (OSCCTRL->Dpll[1].DPLLSYNCBUSY.bit.ENABLE) { + } + dpll_gclk = 0xff; +} +#endif + +void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* self, const mcu_pin_obj_t* pin, const uint16_t capture_period) { + + if (!pin->has_extint) { + mp_raise_RuntimeError(translate("No hardware support on pin")); + } + if ((capture_period == 0) || (capture_period > 500)) { + mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500")); + } + uint32_t mask = 1 << pin->extint_channel; + if (eic_get_enable() == 1 && + #ifdef SAMD21 + ((EIC->INTENSET.vec.EXTINT & mask) != 0 || (EIC->EVCTRL.vec.EXTINTEO & mask) != 0)) { + #endif + #ifdef SAMD51 + ((EIC->INTENSET.bit.EXTINT & mask) != 0 || (EIC->EVCTRL.bit.EXTINTEO & mask) != 0)) { + #endif + mp_raise_RuntimeError(translate("EXTINT channel already in use")); + } + + uint8_t timer_index = find_free_timer(); + if (timer_index == 0xff) { + mp_raise_RuntimeError(translate("All timers in use")); + } + Tc *tc = tc_insts[timer_index]; + + self->tc_index = timer_index; + self->pin = pin->number; + self->channel = pin->extint_channel; + self->errored_too_fast = false; + self->last_ms = 0; + self->last_us = 1000; + self->capture_period = capture_period; + #ifdef SAMD21 + self->TC_IRQ = TC3_IRQn + timer_index; + #endif + #ifdef SAMD51 + self->TC_IRQ = TC0_IRQn + timer_index; + #endif + + active_frequencyins[timer_index] = self; + + // SAMD21: We use GCLK0 generated from DFLL running at 48mhz + // SAMD51: We use a GCLK generated from DPLL1 running at <100mhz + #ifdef SAMD21 + set_timer_handler(timer_index, 0, TC_HANDLER_NO_INTERRUPT); + turn_on_clocks(true, timer_index, 0); + #endif + #ifdef SAMD51 + frequencyin_samd51_start_dpll(); + if (dpll_gclk == 0xff && !clock_get_enabled(0, GCLK_SOURCE_DPLL1)) { + common_hal_frequencyio_frequencyin_deinit(self); + mp_raise_RuntimeError(translate("No available clocks")); + } + set_timer_handler(timer_index, dpll_gclk, TC_HANDLER_NO_INTERRUPT); + turn_on_clocks(true, timer_index, dpll_gclk); + #endif + + // Ensure EIC is on + if (eic_get_enable() == 0) { + turn_on_external_interrupt_controller(); // enables EIC, so disable it after + } + eic_set_enable(false); + + uint8_t sense_setting = EIC_CONFIG_SENSE0_HIGH_Val; + uint8_t config_index = self->channel / 8; + uint8_t position = (self->channel % 8) * 4; + uint32_t masked_value = EIC->CONFIG[config_index].reg & ~(0xf << position); + EIC->CONFIG[config_index].reg = masked_value | (sense_setting << position); + + #ifdef SAMD21 + masked_value = EIC->EVCTRL.vec.EXTINTEO; + EIC->EVCTRL.vec.EXTINTEO = masked_value | (1 << self->channel); + #endif + #ifdef SAMD51 + masked_value = EIC->EVCTRL.bit.EXTINTEO; + EIC->EVCTRL.bit.EXTINTEO = masked_value | (1 << self->channel); + EIC->ASYNCH.bit.ASYNCH = 1; + #endif + + turn_on_cpu_interrupt(self->channel); + + eic_set_enable(true); + + // Turn on EVSYS + turn_on_event_system(); + uint8_t evsys_channel = find_async_event_channel(); + #ifdef SAMD21 + connect_event_user_to_channel((EVSYS_ID_USER_TC3_EVU + timer_index), evsys_channel); + #endif + #ifdef SAMD51 + connect_event_user_to_channel((EVSYS_ID_USER_TC0_EVU + timer_index), evsys_channel); + #endif + init_async_event_channel(evsys_channel, (EVSYS_ID_GEN_EIC_EXTINT_0 + self->channel)); + self->event_channel = evsys_channel; + + tc_set_enable(tc, false); + tc_reset(tc); + #ifdef SAMD21 + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | + TC_CTRLA_PRESCALER_DIV1; + tc->COUNT16.EVCTRL.bit.TCEI = 1; + tc->COUNT16.EVCTRL.bit.EVACT = TC_EVCTRL_EVACT_COUNT_Val; + #endif + + #ifdef SAMD51 + tc->COUNT16.EVCTRL.reg = TC_EVCTRL_EVACT(TC_EVCTRL_EVACT_COUNT_Val) | TC_EVCTRL_TCEI; + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | + TC_CTRLA_PRESCALER_DIV1; + #endif + + NVIC_EnableIRQ(self->TC_IRQ); + + gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_A); + + tc_set_enable(tc, true); + + // setup reference TC if not already + if (reference_tc == 0xff) { + reference_tc = find_free_timer(); + if (reference_tc == 0xff) { + common_hal_frequencyio_frequencyin_deinit(self); + mp_raise_RuntimeError(translate("All timers in use")); + } + frequencyin_reference_tc_init(); + } + if (!frequencyin_reference_tc_enabled()) { + frequencyin_reference_tc_enable(true); + } +} + +bool common_hal_frequencyio_frequencyin_deinited(frequencyio_frequencyin_obj_t* self) { + return self->pin == NO_PIN; +} + +void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* self) { + if (common_hal_frequencyio_frequencyin_deinited(self)) { + return; + } + reset_pin_number(self->pin); + + // turn off EIC & EVSYS utilized by this TC + disable_event_channel(self->event_channel); + eic_set_enable(false); + #ifdef SAMD21 + disable_event_user(EVSYS_ID_USER_TC3_EVU + self->tc_index); + uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; + EIC->EVCTRL.vec.EXTINTEO = masked_value ^ (1 << self->channel); + #endif + #ifdef SAMD51 + disable_event_user(EVSYS_ID_USER_TC0_EVU + self->tc_index); + uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; + EIC->EVCTRL.bit.EXTINTEO = masked_value ^ (1 << self->channel); + NVIC_DisableIRQ(EIC_0_IRQn + self->channel); + NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); + #endif + eic_set_enable(true); + // check if any other objects are using the EIC; if not, turn it off + if (EIC->EVCTRL.reg == 0 && EIC->INTENSET.reg == 0) { + eic_reset(); + turn_off_external_interrupt_controller(); + } + + // turn off the TC we were using + Tc *tc = tc_insts[self->tc_index]; + tc_set_enable(tc, false); + tc_reset(tc); + NVIC_DisableIRQ(self->TC_IRQ); + NVIC_ClearPendingIRQ(self->TC_IRQ); + + active_frequencyins[self->tc_index] = NULL; + self->tc_index = 0xff; + self->pin = NO_PIN; + + bool check_active = false; + for (uint8_t i = 0; i <= (TC_INST_NUM - 1); i++) { + if (active_frequencyins[i] != NULL) { + check_active = true; + } + } + if (!check_active) { + frequencyin_reference_tc_enable(false); + reference_tc = 0xff; + #ifdef SAMD51 + frequencyin_samd51_stop_dpll(); + #endif + } +} + +uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) { + NVIC_DisableIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_DisableIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_DisableIRQ(EIC_0_IRQn + self->channel); + #endif + + // adjust for actual capture period vs base `capture_period` + float frequency_adjustment = 0.0; + if (self->factor > self->capture_period) { + float time_each_event = self->factor / self->frequency; // get the time for each event during actual period + float capture_diff = self->factor - self->capture_period; // get the difference of actual and base periods + // we only need to adjust if the capture_diff can contain 1 or more events + // if so, we add how many events could have occured during the diff time + if (time_each_event > capture_diff) { + frequency_adjustment = capture_diff / time_each_event; + } + } + + float value = 1000 / (self->capture_period / (self->frequency + frequency_adjustment)); + + NVIC_ClearPendingIRQ(self->TC_IRQ); + NVIC_EnableIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_ClearPendingIRQ(EIC_IRQn); + NVIC_EnableIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); + NVIC_EnableIRQ(EIC_0_IRQn + self->channel); + #endif + + return value; +} + +void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) { + Tc *tc = tc_insts[self->tc_index]; + if (!tc->COUNT16.EVCTRL.bit.TCEI) { + return; + } + tc->COUNT16.EVCTRL.bit.TCEI = 0; + + #ifdef SAMD21 + uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; + EIC->EVCTRL.vec.EXTINTEO = masked_value ^ (1 << self->channel); + #endif + #ifdef SAMD51 + uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; + EIC->EVCTRL.bit.EXTINTEO = masked_value ^ (1 << self->channel); + #endif + return; +} + +void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t* self) { + Tc *tc = tc_insts[self->tc_index]; + if (tc->COUNT16.EVCTRL.bit.TCEI) { + return; + } + tc->COUNT16.EVCTRL.bit.TCEI = 1; + + #ifdef SAMD21 + uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; + EIC->EVCTRL.vec.EXTINTEO = masked_value | (1 << self->channel); + #endif + #ifdef SAMD51 + uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; + EIC->EVCTRL.bit.EXTINTEO = masked_value | (1 << self->channel); + #endif + self->errored_too_fast = false; + return; +} + +void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* self) { + NVIC_DisableIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_DisableIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_DisableIRQ(EIC_0_IRQn + self->channel); + #endif + + self->frequency = 0; + + NVIC_ClearPendingIRQ(self->TC_IRQ); + NVIC_EnableIRQ(self->TC_IRQ); + #ifdef SAMD21 + NVIC_ClearPendingIRQ(EIC_IRQn); + NVIC_EnableIRQ(EIC_IRQn); + #endif + #ifdef SAMD51 + NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); + NVIC_EnableIRQ(EIC_0_IRQn + self->channel); + #endif + return; +} + +uint16_t common_hal_frequencyio_frequencyin_get_capture_period(frequencyio_frequencyin_obj_t *self) { + return self->capture_period; +} + +void common_hal_frequencyio_frequencyin_set_capture_period(frequencyio_frequencyin_obj_t *self, uint16_t capture_period) { + if ((capture_period == 0) || (capture_period > 500)) { + mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500")); + } + + self->capture_period = capture_period; + + common_hal_frequencyio_frequencyin_clear(self); +} diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h new file mode 100644 index 0000000000000..abd63cc86d448 --- /dev/null +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t tc_index; + uint8_t pin; + uint8_t channel; + uint8_t event_channel; + uint32_t frequency; + volatile uint64_t last_ms; + volatile uint32_t last_us; + float factor; + uint32_t capture_period; + uint8_t TC_IRQ; + volatile bool errored_too_fast; +} frequencyio_frequencyin_obj_t; + +void frequencyin_interrupt_handler(uint8_t index); +void frequencyin_emergency_cancel_capture(uint8_t index); +void frequencyin_reference_tc_init(void); +void frequencyin_reference_tc_enable(bool enable); +bool frequencyin_reference_tc_enabled(void); +#ifdef SAMD51 +void frequencyin_samd51_start_dpll(void); +void frequencyin_samd51_stop_dpll(void); +#endif + + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H diff --git a/ports/atmel-samd/common-hal/frequencyio/__init__.c b/ports/atmel-samd/common-hal/frequencyio/__init__.c new file mode 100644 index 0000000000000..487814bd076b2 --- /dev/null +++ b/ports/atmel-samd/common-hal/frequencyio/__init__.c @@ -0,0 +1 @@ +// No ferquencyio module functions. diff --git a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.c b/ports/atmel-samd/common-hal/i2cslave/I2CSlave.c new file mode 100644 index 0000000000000..79c1449e2f6d8 --- /dev/null +++ b/ports/atmel-samd/common-hal/i2cslave/I2CSlave.c @@ -0,0 +1,252 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/i2cslave/I2CSlave.h" +#include "common-hal/busio/I2C.h" + +#include "lib/utils/interrupt_char.h" +#include "py/mperrno.h" +#include "py/mphal.h" +#include "py/runtime.h" + +#include "hal/include/hal_gpio.h" +#include "peripherals/samd/sercom.h" + +void common_hal_i2cslave_i2c_slave_construct(i2cslave_i2c_slave_obj_t *self, + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, + uint8_t *addresses, unsigned int num_addresses, bool smbus) { + uint8_t sercom_index; + uint32_t sda_pinmux, scl_pinmux; + Sercom *sercom = samd_i2c_get_sercom(scl, sda, &sercom_index, &sda_pinmux, &scl_pinmux); + if (sercom == NULL) { + mp_raise_ValueError(translate("Invalid pins")); + } + self->sercom = sercom; + + gpio_set_pin_function(sda->number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_function(scl->number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_function(sda->number, sda_pinmux); + gpio_set_pin_function(scl->number, scl_pinmux); + + self->sda_pin = sda->number; + self->scl_pin = scl->number; + claim_pin(sda); + claim_pin(scl); + + samd_peripherals_sercom_clock_init(sercom, sercom_index); + + sercom->I2CS.CTRLA.bit.SWRST = 1; + while (sercom->I2CS.CTRLA.bit.SWRST || sercom->I2CS.SYNCBUSY.bit.SWRST) {} + + sercom->I2CS.CTRLB.bit.AACKEN = 0; // Automatic acknowledge is disabled. + + if (num_addresses == 1) { + sercom->I2CS.CTRLB.bit.AMODE = 0x0; // MASK + sercom->I2CS.ADDR.bit.ADDR = addresses[0]; + sercom->I2CS.ADDR.bit.ADDRMASK = 0x00; // Match exact address + } else if (num_addresses == 2) { + sercom->I2CS.CTRLB.bit.AMODE = 0x1; // 2_ADDRS + sercom->I2CS.ADDR.bit.ADDR = addresses[0]; + sercom->I2CS.ADDR.bit.ADDRMASK = addresses[1]; + } else { + uint32_t combined = 0; // all addresses OR'ed + uint32_t differ = 0; // bits that differ between addresses + for (unsigned int i = 0; i < num_addresses; i++) { + combined |= addresses[i]; + differ |= addresses[0] ^ addresses[i]; + } + sercom->I2CS.CTRLB.bit.AMODE = 0x0; // MASK + sercom->I2CS.ADDR.bit.ADDR = combined; + sercom->I2CS.ADDR.bit.ADDRMASK = differ; + } + self->addresses = addresses; + self->num_addresses = num_addresses; + + if (smbus) { + sercom->I2CS.CTRLA.bit.LOWTOUTEN = 1; // Errata 12003 + sercom->I2CS.CTRLA.bit.SEXTTOEN = 1; // Slave SCL Low Extend/Cumulative Time-Out 25ms + } + sercom->I2CS.CTRLA.bit.SCLSM = 0; // Clock stretch before ack + sercom->I2CS.CTRLA.bit.MODE = 0x04; // Slave mode + sercom->I2CS.CTRLA.bit.ENABLE = 1; +} + +bool common_hal_i2cslave_i2c_slave_deinited(i2cslave_i2c_slave_obj_t *self) { + return self->sda_pin == NO_PIN; +} + +void common_hal_i2cslave_i2c_slave_deinit(i2cslave_i2c_slave_obj_t *self) { + if (common_hal_i2cslave_i2c_slave_deinited(self)) { + return; + } + + self->sercom->I2CS.CTRLA.bit.ENABLE = 0; + + reset_pin_number(self->sda_pin); + reset_pin_number(self->scl_pin); + self->sda_pin = NO_PIN; + self->scl_pin = NO_PIN; +} + +static int i2c_slave_check_error(i2cslave_i2c_slave_obj_t *self, bool raise) { + if (!self->sercom->I2CS.INTFLAG.bit.ERROR) { + return 0; + } + + int err = MP_EIO; + + if (self->sercom->I2CS.STATUS.bit.LOWTOUT || self->sercom->I2CS.STATUS.bit.SEXTTOUT) { + err = MP_ETIMEDOUT; + } + + self->sercom->I2CS.INTFLAG.reg = SERCOM_I2CS_INTFLAG_ERROR; // Clear flag + + if (raise) { + mp_raise_OSError(err); + } + return -err; +} + +int common_hal_i2cslave_i2c_slave_is_addressed(i2cslave_i2c_slave_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart) +{ + int err = i2c_slave_check_error(self, false); + if (err) { + return err; + } + + if (!self->sercom->I2CS.INTFLAG.bit.AMATCH) { + return 0; + } + + self->writing = false; + + *address = self->sercom->I2CS.DATA.reg >> 1; + *is_read = self->sercom->I2CS.STATUS.bit.DIR; + *is_restart = self->sercom->I2CS.STATUS.bit.SR; + + for (unsigned int i = 0; i < self->num_addresses; i++) { + if (*address == self->addresses[i]) { + common_hal_i2cslave_i2c_slave_ack(self, true); + return 1; + } + } + + // This should clear AMATCH, but it doesn't... + common_hal_i2cslave_i2c_slave_ack(self, false); + return 0; +} + +int common_hal_i2cslave_i2c_slave_read_byte(i2cslave_i2c_slave_obj_t *self, uint8_t *data) { + for (int t = 0; t < 100 && !self->sercom->I2CS.INTFLAG.reg; t++) { + mp_hal_delay_us(10); + } + + i2c_slave_check_error(self, true); + + if (!self->sercom->I2CS.INTFLAG.bit.DRDY || + self->sercom->I2CS.INTFLAG.bit.PREC || + self->sercom->I2CS.INTFLAG.bit.AMATCH) { + return 0; + } + + *data = self->sercom->I2CS.DATA.reg; + return 1; +} + +int common_hal_i2cslave_i2c_slave_write_byte(i2cslave_i2c_slave_obj_t *self, uint8_t data) { + for (int t = 0; !self->sercom->I2CS.INTFLAG.reg && t < 100; t++) { + mp_hal_delay_us(10); + } + + i2c_slave_check_error(self, true); + + if (self->sercom->I2CS.INTFLAG.bit.PREC) { + return 0; + } + + // RXNACK can carry over from the previous transfer + if (self->writing && self->sercom->I2CS.STATUS.bit.RXNACK) { + return 0; + } + + self->writing = true; + + if (!self->sercom->I2CS.INTFLAG.bit.DRDY) { + return 0; + } + + self->sercom->I2CS.DATA.bit.DATA = data; // Send data + + return 1; +} + +void common_hal_i2cslave_i2c_slave_ack(i2cslave_i2c_slave_obj_t *self, bool ack) { + self->sercom->I2CS.CTRLB.bit.ACKACT = !ack; + self->sercom->I2CS.CTRLB.bit.CMD = 0x03; +} + +void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self) { + for (int t = 0; !self->sercom->I2CS.INTFLAG.reg && t < 100; t++) { + mp_hal_delay_us(10); + } + + if (self->sercom->I2CS.INTFLAG.bit.AMATCH || !self->sercom->I2CS.STATUS.bit.CLKHOLD) { + return; + } + + if (!self->sercom->I2CS.STATUS.bit.DIR) { + common_hal_i2cslave_i2c_slave_ack(self, false); + } else { + int i = 0; + while (self->sercom->I2CS.INTFLAG.reg == SERCOM_I2CS_INTFLAG_DRDY) { + if (mp_hal_is_interrupted()) { + return; + } + + self->sercom->I2CS.DATA.bit.DATA = 0xff; // Send dummy byte + + // Wait for a result (if any). + // test_byte_word.py::TestWord::test_write_seq leaves us with no INTFLAGs set in some of the tests + for (int t = 0; !self->sercom->I2CS.INTFLAG.reg && t < 100; t++) { + mp_hal_delay_us(10); + } + + if (++i > 1000) { // Avoid getting stuck "forever" + mp_raise_OSError(MP_EIO); + } + } + } + + if (self->sercom->I2CS.INTFLAG.bit.AMATCH) { + return; + } + + if (self->sercom->I2CS.STATUS.bit.CLKHOLD) { + // Unable to release the clock. + // The slave might have to be re-initialized to get unstuck. + mp_raise_OSError(MP_EIO); + } +} diff --git a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.h b/ports/atmel-samd/common-hal/i2cslave/I2CSlave.h new file mode 100644 index 0000000000000..bf4f877bd46f5 --- /dev/null +++ b/ports/atmel-samd/common-hal/i2cslave/I2CSlave.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H + +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + + uint8_t *addresses; + unsigned int num_addresses; + + Sercom *sercom; + uint8_t scl_pin; + uint8_t sda_pin; + bool writing; +} i2cslave_i2c_slave_obj_t; + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H diff --git a/ports/atmel-samd/common-hal/i2cslave/__init__.c b/ports/atmel-samd/common-hal/i2cslave/__init__.c new file mode 100644 index 0000000000000..f289bbc0e438d --- /dev/null +++ b/ports/atmel-samd/common-hal/i2cslave/__init__.c @@ -0,0 +1 @@ +// No i2cslave module functions. diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.c b/ports/atmel-samd/common-hal/microcontroller/Pin.c index e1ca5d6223817..9719ea5b1163b 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.c +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.c @@ -29,13 +29,8 @@ #include "atmel_start_pins.h" #include "hal/include/hal_gpio.h" +#include "samd/pins.h" #include "supervisor/shared/rgb_led_status.h" -#ifdef SAMD21 -#include "samd21_pins.h" -#endif -#ifdef SAMD51 -#include "samd51_pins.h" -#endif #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; @@ -48,15 +43,31 @@ bool apa102_mosi_in_use; bool speaker_enable_in_use; #endif +#define PORT_COUNT (PORT_BITS / 32 + 1) + +#ifdef SAMD51 +#define SWD_MUX GPIO_PIN_FUNCTION_H +#endif +#ifdef SAMD21 +#define SWD_MUX GPIO_PIN_FUNCTION_G +#endif + +STATIC uint32_t never_reset_pins[PORT_COUNT]; + void reset_all_pins(void) { - uint32_t pin_mask[PORT_BITS / 32 + 1] = PORT_OUT_IMPLEMENTED; + uint32_t pin_mask[PORT_COUNT] = PORT_OUT_IMPLEMENTED; - // Do not full reset USB or SWD lines. - pin_mask[0] &= ~(PORT_PA24 | PORT_PA25 | PORT_PA30 | PORT_PA31); + // Do not full reset USB lines. + pin_mask[0] &= ~(PORT_PA24 | PORT_PA25); - #ifdef SAMD21 - pin_mask[0] &= ~(PORT_PA31); - #endif + // Do not reset SWD when a debugger is present. + if (DSU->STATUSB.bit.DBGPRES == 1) { + pin_mask[0] &= ~(PORT_PA30 | PORT_PA31); + } + + for (uint32_t i = 0; i < PORT_COUNT; i++) { + pin_mask[i] &= ~never_reset_pins[i]; + } gpio_set_port_direction(GPIO_PORTA, pin_mask[0] & ~MICROPY_PORT_A, GPIO_DIRECTION_OFF); gpio_set_port_direction(GPIO_PORTB, pin_mask[1] & ~MICROPY_PORT_B, GPIO_DIRECTION_OFF); @@ -67,16 +78,14 @@ void reset_all_pins(void) { gpio_set_port_direction(GPIO_PORTD, pin_mask[3] & ~MICROPY_PORT_D, GPIO_DIRECTION_OFF); #endif - // Configure SWD + // Configure SWD. SWDIO will be automatically switched on PA31 when a signal is input on + // SWCLK. #ifdef SAMD51 gpio_set_pin_function(PIN_PA30, MUX_PA30H_CM4_SWCLK); - // SWDIO will be automatically switched on PA31 when a signal is input on - // SWCLK. #endif #ifdef SAMD21 - //gpio_set_pin_function(PIN_PA30, GPIO_PIN_FUNCTION_G); - //gpio_set_pin_direction(PIN_PA31, GPIO_DIRECTION_OUT); - //gpio_set_pin_function(PIN_PA31, GPIO_PIN_FUNCTION_G); + gpio_set_pin_function(PIN_PA30, GPIO_PIN_FUNCTION_G); + gpio_set_pin_function(PIN_PA31, GPIO_PIN_FUNCTION_G); #endif #ifdef MICROPY_HW_NEOPIXEL @@ -90,29 +99,35 @@ void reset_all_pins(void) { // After configuring SWD because it may be shared. #ifdef SPEAKER_ENABLE_PIN speaker_enable_in_use = false; - gpio_set_pin_function(SPEAKER_ENABLE_PIN->pin, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(SPEAKER_ENABLE_PIN->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_level(SPEAKER_ENABLE_PIN->pin, false); + gpio_set_pin_function(SPEAKER_ENABLE_PIN->number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); + gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); #endif } -void reset_pin(uint8_t pin) { - if (pin >= PORT_BITS) { +void never_reset_pin_number(uint8_t pin_number) { + never_reset_pins[GPIO_PORT(pin_number)] |= 1 << GPIO_PIN(pin_number); +} + +void reset_pin_number(uint8_t pin_number) { + never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); + + if (pin_number >= PORT_BITS) { return; } #ifdef MICROPY_HW_NEOPIXEL - if (pin == MICROPY_HW_NEOPIXEL->pin) { + if (pin_number == MICROPY_HW_NEOPIXEL->number) { neopixel_in_use = false; rgb_led_status_init(); return; } #endif #ifdef MICROPY_HW_APA102_MOSI - if (pin == MICROPY_HW_APA102_MOSI->pin || - pin == MICROPY_HW_APA102_SCK->pin) { - apa102_mosi_in_use = apa102_mosi_in_use && pin != MICROPY_HW_APA102_MOSI->pin; - apa102_sck_in_use = apa102_sck_in_use && pin != MICROPY_HW_APA102_SCK->pin; + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { + apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; + apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; if (!apa102_sck_in_use && !apa102_mosi_in_use) { rgb_led_status_init(); } @@ -120,30 +135,37 @@ void reset_pin(uint8_t pin) { } #endif - if (pin == PIN_PA30 + if (pin_number == PIN_PA30 #ifdef SAMD51 ) { - gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_H); #endif #ifdef SAMD21 - || pin == PIN_PA31) { - gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_G); + || pin_number == PIN_PA31) { #endif + gpio_set_pin_function(pin_number, SWD_MUX); } else { - gpio_set_pin_direction(pin, GPIO_DIRECTION_OFF); - gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(pin_number, GPIO_DIRECTION_OFF); + gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); } #ifdef SPEAKER_ENABLE_PIN - if (pin == SPEAKER_ENABLE_PIN->pin) { + if (pin_number == SPEAKER_ENABLE_PIN->number) { speaker_enable_in_use = false; - gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(SPEAKER_ENABLE_PIN->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_level(SPEAKER_ENABLE_PIN->pin, false); + gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); + gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); } #endif } +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) { + never_reset_pin_number(pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { + reset_pin_number(pin->number); +} + void claim_pin(const mcu_pin_obj_t* pin) { #ifdef MICROPY_HW_NEOPIXEL if (pin == MICROPY_HW_NEOPIXEL) { @@ -166,9 +188,38 @@ void claim_pin(const mcu_pin_obj_t* pin) { #endif } +bool pin_number_is_free(uint8_t pin_number) { + PortGroup *const port = &PORT->Group[(enum gpio_port)GPIO_PORT(pin_number)]; + uint8_t pin_index = GPIO_PIN(pin_number); + volatile PORT_PINCFG_Type *state = &port->PINCFG[pin_index]; + volatile PORT_PMUX_Type *pmux = &port->PMUX[pin_index / 2]; + + if (pin_number == PIN_PA30 || pin_number == PIN_PA31) { + if (DSU->STATUSB.bit.DBGPRES == 1) { + return false; + } + if (pin_number == PIN_PA30 + #ifdef SAMD51 + ) { + #endif + #ifdef SAMD21 + || pin_number == PIN_PA31) { + #endif) { + return state->bit.PMUXEN == 1 && ((pmux->reg >> (4 * pin_index % 2)) & 0xf) == SWD_MUX; + } + } + + return state->bit.PMUXEN == 0 && state->bit.INEN == 0 && + state->bit.PULLEN == 0 && (port->DIR.reg & (1 << pin_index)) == 0; +} + bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { #ifdef MICROPY_HW_NEOPIXEL if (pin == MICROPY_HW_NEOPIXEL) { + // Special case for Metro M0 where the NeoPixel is also SWCLK + if (MICROPY_HW_NEOPIXEL == &pin_PA30 && DSU->STATUSB.bit.DBGPRES == 1) { + return false; + } return !neopixel_in_use; } #endif @@ -187,15 +238,5 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { } #endif - PortGroup *const port = &PORT->Group[(enum gpio_port)GPIO_PORT(pin->pin)]; - uint8_t pin_index = GPIO_PIN(pin->pin); - volatile PORT_PINCFG_Type *state = &port->PINCFG[pin_index]; - volatile PORT_PMUX_Type *pmux = &port->PMUX[pin_index / 2]; - - if (pin->pin == PIN_PA30 || pin->pin == PIN_PA31) { - return state->bit.PMUXEN == 1 && ((pmux->reg >> (4 * pin_index % 2)) & 0xf) == 0x6; - } - - return state->bit.PMUXEN == 0 && state->bit.INEN == 0 && - state->bit.PULLEN == 0 && (port->DIR.reg & (1 << pin_index)) == 0; + return pin_number_is_free(pin->number); } diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.h b/ports/atmel-samd/common-hal/microcontroller/Pin.h index 4e21a14cd860d..14887207aa1b5 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.h +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.h @@ -27,45 +27,9 @@ #ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_MICROCONTROLLER_PIN_H #define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_MICROCONTROLLER_PIN_H -#include "py/obj.h" +#include -#include "mpconfigport.h" - -#include "include/component/sercom.h" - -typedef struct { - uint8_t index:6; // 0, 1, etc. corresponding to SERCOM. - uint8_t pad:2; // which of the four SERCOM pads to use -} pin_sercom_t; - -typedef struct { - uint8_t index; - bool is_tc:1; - uint8_t wave_output:7; -} pin_timer_t; - -#ifdef SAMD21 - #define NUM_TIMERS_PER_PIN 2 - #define NUM_ADC_PER_PIN 1 -#endif -#ifdef SAMD51 - #define NUM_TIMERS_PER_PIN 3 - #define NUM_ADC_PER_PIN 2 -#endif -#define NUM_SERCOMS_PER_PIN 2 - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t pin; - bool has_extint:1; - uint8_t extint_channel:7; - bool has_touch:1; - uint8_t touch_y_line:7; // 0 - 15. Assumed to be Y channel. - uint8_t adc_input[NUM_ADC_PER_PIN]; - pin_timer_t timer[NUM_TIMERS_PER_PIN]; - pin_sercom_t sercom[NUM_SERCOMS_PER_PIN]; -} mcu_pin_obj_t; +#include "peripherals/samd/pins.h" #ifdef MICROPY_HW_NEOPIXEL extern bool neopixel_in_use; @@ -76,9 +40,11 @@ extern bool apa102_mosi_in_use; #endif void reset_all_pins(void); -// reset_pin takes the pin number instead of the pointer so that objects don't +// reset_pin_number takes the pin number instead of the pointer so that objects don't // need to store a full pointer. -void reset_pin(uint8_t pin); +void reset_pin_number(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_number); #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/atmel-samd/common-hal/microcontroller/Processor.c b/ports/atmel-samd/common-hal/microcontroller/Processor.c index 5c0d72c96aa86..1e0b8fa791e2c 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Processor.c +++ b/ports/atmel-samd/common-hal/microcontroller/Processor.c @@ -63,168 +63,259 @@ #include "common-hal/microcontroller/Processor.h" +#include "samd/adc.h" + #include "peripheral_clk_config.h" -// #define ADC_TEMP_SAMPLE_LENGTH 4 -// #define INT1V_VALUE_FLOAT 1.0 -// #define INT1V_DIVIDER_1000 1000.0 -// #define ADC_12BIT_FULL_SCALE_VALUE_FLOAT 4095.0 -// -// typedef struct nvm_calibration_data_t { -// float tempR; // Production Room temperature -// float tempH; // Production Hot temperature -// float INT1VR; // Room temp 2's complement of the internal 1V reference value -// float INT1VH; // Hot temp 2's complement of the internal 1V reference value -// uint16_t ADCR; // Production Room temperature ADC value -// uint16_t ADCH; // Production Hot temperature ADC value -// float VADCR; // Room temperature ADC voltage -// float VADCH; // Hot temperature ADC voltage -// } nvm_calibration_data_t; +#define ADC_TEMP_SAMPLE_LENGTH 4 +#define INT1V_VALUE_FLOAT 1.0 +#define INT1V_DIVIDER_1000 1000.0 +#define ADC_12BIT_FULL_SCALE_VALUE_FLOAT 4095.0 +// channel argument (ignored in calls below) +#define IGNORED_CHANNEL 0 // Decimal to fraction conversion. (adapted from ASF sample). -// STATIC float convert_dec_to_frac(uint8_t val) { -// float float_val = (float)val; -// if (val < 10) { -// return (float_val/10.0); -// } else if (val < 100) { -// return (float_val/100.0); -// } else { -// return (float_val/1000.0); -// } -// } - -// STATIC void configure_adc_temp(struct adc_module *adc_instance) { -// struct adc_config config_adc; -// adc_get_config_defaults(&config_adc); -// -// // The parameters chosen here are from the temperature example in: -// // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf -// // That note also recommends in general: -// // "Discard the first conversion result whenever there is a change -// // in ADC configuration like voltage reference / ADC channel change." -// -// config_adc.clock_prescaler = ADC_CLOCK_PRESCALER_DIV16; -// config_adc.reference = ADC_REFERENCE_INT1V; -// config_adc.positive_input = ADC_POSITIVE_INPUT_TEMP; -// config_adc.negative_input = ADC_NEGATIVE_INPUT_GND; -// config_adc.sample_length = ADC_TEMP_SAMPLE_LENGTH; -// -// adc_init(adc_instance, ADC, &config_adc); -// -// // Oversample and decimate. A higher samplenum produces a more stable result. -// ADC->AVGCTRL.reg = ADC_AVGCTRL_ADJRES(2) | ADC_AVGCTRL_SAMPLENUM_4; -// //ADC->AVGCTRL.reg = ADC_AVGCTRL_ADJRES(4) | ADC_AVGCTRL_SAMPLENUM_16; -// } - -// Extract the production calibration data information from NVM (adapted from ASF sample). -// -// STATIC void load_calibration_data(nvm_calibration_data_t *cal) { -// volatile uint32_t val1; /* Temperature Log Row Content first 32 bits */ -// volatile uint32_t val2; /* Temperature Log Row Content another 32 bits */ -// uint8_t room_temp_val_int; /* Integer part of room temperature in °C */ -// uint8_t room_temp_val_dec; /* Decimal part of room temperature in °C */ -// uint8_t hot_temp_val_int; /* Integer part of hot temperature in °C */ -// uint8_t hot_temp_val_dec; /* Decimal part of hot temperature in °C */ -// int8_t room_int1v_val; /* internal 1V reference drift at room temperature */ -// int8_t hot_int1v_val; /* internal 1V reference drift at hot temperature*/ -// -// uint32_t *temp_log_row_ptr = (uint32_t *)NVMCTRL_TEMP_LOG; -// -// val1 = *temp_log_row_ptr; -// temp_log_row_ptr++; -// val2 = *temp_log_row_ptr; -// -// room_temp_val_int = (uint8_t)((val1 & NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Msk) >> NVMCTRL_FUSES_ROOM_TEMP_VAL_INT_Pos); -// room_temp_val_dec = (uint8_t)((val1 & NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Msk) >> NVMCTRL_FUSES_ROOM_TEMP_VAL_DEC_Pos); -// -// hot_temp_val_int = (uint8_t)((val1 & NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Msk) >> NVMCTRL_FUSES_HOT_TEMP_VAL_INT_Pos); -// hot_temp_val_dec = (uint8_t)((val1 & NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Msk) >> NVMCTRL_FUSES_HOT_TEMP_VAL_DEC_Pos); -// -// room_int1v_val = (int8_t)((val1 & NVMCTRL_FUSES_ROOM_INT1V_VAL_Msk) >> NVMCTRL_FUSES_ROOM_INT1V_VAL_Pos); -// hot_int1v_val = (int8_t)((val2 & NVMCTRL_FUSES_HOT_INT1V_VAL_Msk) >> NVMCTRL_FUSES_HOT_INT1V_VAL_Pos); -// -// cal->ADCR = (uint16_t)((val2 & NVMCTRL_FUSES_ROOM_ADC_VAL_Msk) >> NVMCTRL_FUSES_ROOM_ADC_VAL_Pos); -// -// cal->ADCH = (uint16_t)((val2 & NVMCTRL_FUSES_HOT_ADC_VAL_Msk) >> NVMCTRL_FUSES_HOT_ADC_VAL_Pos); -// -// cal->tempR = room_temp_val_int + convert_dec_to_frac(room_temp_val_dec); -// cal->tempH = hot_temp_val_int + convert_dec_to_frac(hot_temp_val_dec); -// -// cal->INT1VR = 1 - ((float)room_int1v_val/INT1V_DIVIDER_1000); -// cal->INT1VH = 1 - ((float)hot_int1v_val/INT1V_DIVIDER_1000); -// -// cal->VADCR = ((float)cal->ADCR * cal->INT1VR)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; -// cal->VADCH = ((float)cal->ADCH * cal->INT1VH)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; -// } +STATIC float convert_dec_to_frac(uint8_t val) { + float float_val = (float)val; + if (val < 10) { + return (float_val/10.0); + } else if (val < 100) { + return (float_val/100.0); + } else { + return (float_val/1000.0); + } +} + +// Extract the production calibration data information from NVM (adapted from ASF sample), +// then calculate the temperature +#ifdef SAMD21 +STATIC float calculate_temperature(uint16_t raw_value) { + volatile uint32_t val1; /* Temperature Log Row Content first 32 bits */ + volatile uint32_t val2; /* Temperature Log Row Content another 32 bits */ + uint8_t room_temp_val_int; /* Integer part of room temperature in °C */ + uint8_t room_temp_val_dec; /* Decimal part of room temperature in °C */ + uint8_t hot_temp_val_int; /* Integer part of hot temperature in °C */ + uint8_t hot_temp_val_dec; /* Decimal part of hot temperature in °C */ + int8_t room_int1v_val; /* internal 1V reference drift at room temperature */ + int8_t hot_int1v_val; /* internal 1V reference drift at hot temperature*/ + + float tempR; // Production Room temperature + float tempH; // Production Hot temperature + float INT1VR; // Room temp 2's complement of the internal 1V reference value + float INT1VH; // Hot temp 2's complement of the internal 1V reference value + uint16_t ADCR; // Production Room temperature ADC value + uint16_t ADCH; // Production Hot temperature ADC value + float VADCR; // Room temperature ADC voltage + float VADCH; // Hot temperature ADC voltage + + uint32_t *temp_log_row_ptr = (uint32_t *)NVMCTRL_TEMP_LOG; + + val1 = *temp_log_row_ptr; + temp_log_row_ptr++; + val2 = *temp_log_row_ptr; + + room_temp_val_int = (uint8_t)((val1 & FUSES_ROOM_TEMP_VAL_INT_Msk) >> FUSES_ROOM_TEMP_VAL_INT_Pos); + room_temp_val_dec = (uint8_t)((val1 & FUSES_ROOM_TEMP_VAL_DEC_Msk) >> FUSES_ROOM_TEMP_VAL_DEC_Pos); + + hot_temp_val_int = (uint8_t)((val1 & FUSES_HOT_TEMP_VAL_INT_Msk) >> FUSES_HOT_TEMP_VAL_INT_Pos); + hot_temp_val_dec = (uint8_t)((val1 & FUSES_HOT_TEMP_VAL_DEC_Msk) >> FUSES_HOT_TEMP_VAL_DEC_Pos); + + room_int1v_val = (int8_t)((val1 & FUSES_ROOM_INT1V_VAL_Msk) >> FUSES_ROOM_INT1V_VAL_Pos); + hot_int1v_val = (int8_t)((val2 & FUSES_HOT_INT1V_VAL_Msk) >> FUSES_HOT_INT1V_VAL_Pos); + + ADCR = (uint16_t)((val2 & FUSES_ROOM_ADC_VAL_Msk) >> FUSES_ROOM_ADC_VAL_Pos); + ADCH = (uint16_t)((val2 & FUSES_HOT_ADC_VAL_Msk) >> FUSES_HOT_ADC_VAL_Pos); + + tempR = room_temp_val_int + convert_dec_to_frac(room_temp_val_dec); + tempH = hot_temp_val_int + convert_dec_to_frac(hot_temp_val_dec); + + INT1VR = 1 - ((float)room_int1v_val/INT1V_DIVIDER_1000); + INT1VH = 1 - ((float)hot_int1v_val/INT1V_DIVIDER_1000); + + VADCR = ((float)ADCR * INT1VR)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + VADCH = ((float)ADCH * INT1VH)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + + float VADC; /* Voltage calculation using ADC result for Coarse Temp calculation */ + float VADCM; /* Voltage calculation using ADC result for Fine Temp calculation. */ + float INT1VM; /* Voltage calculation for reality INT1V value during the ADC conversion */ + + VADC = ((float)raw_value * INT1V_VALUE_FLOAT)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + + // Hopefully compiler will remove common subepxressions here. + + // calculate fine temperature using Equation1 and Equation + // 1b as mentioned in data sheet section "Temperature Sensor Characteristics" + // of Electrical Characteristics. (adapted from ASF sample code). + // Coarse Temp Calculation by assume INT1V=1V for this ADC conversion + float coarse_temp = tempR + (((tempH - tempR)/(VADCH - VADCR)) * (VADC - VADCR)); + + // Calculation to find the real INT1V value during the ADC conversion + INT1VM = INT1VR + (((INT1VH - INT1VR) * (coarse_temp - tempR))/(tempH - tempR)); + + VADCM = ((float)raw_value * INT1VM)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; + + // Fine Temp Calculation by replace INT1V=1V by INT1V = INT1Vm for ADC conversion + float fine_temp = tempR + (((tempH - tempR)/(VADCH - VADCR)) * (VADCM - VADCR)); + + return fine_temp; +} +#endif // SAMD21 + +#ifdef SAMD51 +STATIC float calculate_temperature(uint16_t TP, uint16_t TC) { + uint32_t TLI = (*(uint32_t *)FUSES_ROOM_TEMP_VAL_INT_ADDR & FUSES_ROOM_TEMP_VAL_INT_Msk) >> FUSES_ROOM_TEMP_VAL_INT_Pos; + uint32_t TLD = (*(uint32_t *)FUSES_ROOM_TEMP_VAL_DEC_ADDR & FUSES_ROOM_TEMP_VAL_DEC_Msk) >> FUSES_ROOM_TEMP_VAL_DEC_Pos; + float TL = TLI + convert_dec_to_frac(TLD); + + uint32_t THI = (*(uint32_t *)FUSES_HOT_TEMP_VAL_INT_ADDR & FUSES_HOT_TEMP_VAL_INT_Msk) >> FUSES_HOT_TEMP_VAL_INT_Pos; + uint32_t THD = (*(uint32_t *)FUSES_HOT_TEMP_VAL_DEC_ADDR & FUSES_HOT_TEMP_VAL_DEC_Msk) >> FUSES_HOT_TEMP_VAL_DEC_Pos; + float TH = THI + convert_dec_to_frac(THD); + + uint16_t VPL = (*(uint32_t *)FUSES_ROOM_ADC_VAL_PTAT_ADDR & FUSES_ROOM_ADC_VAL_PTAT_Msk) >> FUSES_ROOM_ADC_VAL_PTAT_Pos; + uint16_t VPH = (*(uint32_t *)FUSES_HOT_ADC_VAL_PTAT_ADDR & FUSES_HOT_ADC_VAL_PTAT_Msk) >> FUSES_HOT_ADC_VAL_PTAT_Pos; + + uint16_t VCL = (*(uint32_t *)FUSES_ROOM_ADC_VAL_CTAT_ADDR & FUSES_ROOM_ADC_VAL_CTAT_Msk) >> FUSES_ROOM_ADC_VAL_CTAT_Pos; + uint16_t VCH = (*(uint32_t *)FUSES_HOT_ADC_VAL_CTAT_ADDR & FUSES_HOT_ADC_VAL_CTAT_Msk) >> FUSES_HOT_ADC_VAL_CTAT_Pos; + + // From SAMD51 datasheet: section 45.6.3.1 (page 1327). + return (TL*VPH*TC - VPL*TH*TC - TL*VCH*TP + TH*VCL*TP) / (VCL*TP - VCH*TP - VPL*TC + VPH*TC); +} +#endif // SAMD51 -/* - * Calculate fine temperature using Equation1 and Equation - * 1b as mentioned in data sheet section "Temperature Sensor Characteristics" - * of Electrical Characteristics. (adapted from ASF sample code). - */ -// STATIC float calculate_temperature(uint16_t raw_code, nvm_calibration_data_t *cal) -// { -// float VADC; /* Voltage calculation using ADC result for Coarse Temp calculation */ -// float VADCM; /* Voltage calculation using ADC result for Fine Temp calculation. */ -// float INT1VM; /* Voltage calculation for reality INT1V value during the ADC conversion */ -// -// VADC = ((float)raw_code * INT1V_VALUE_FLOAT)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; -// -// // Hopefully compiler will remove common subepxressions here. -// -// /* Coarse Temp Calculation by assume INT1V=1V for this ADC conversion */ -// float coarse_temp = cal->tempR + (((cal->tempH - cal->tempR)/(cal->VADCH - cal->VADCR)) * (VADC - cal->VADCR)); -// -// /* Calculation to find the real INT1V value during the ADC conversion */ -// INT1VM = cal->INT1VR + (((cal->INT1VH - cal->INT1VR) * (coarse_temp - cal->tempR))/(cal->tempH - cal->tempR)); -// -// VADCM = ((float)raw_code * INT1VM)/ADC_12BIT_FULL_SCALE_VALUE_FLOAT; -// -// /* Fine Temp Calculation by replace INT1V=1V by INT1V = INT1Vm for ADC conversion */ -// float fine_temp = cal->tempR + (((cal->tempH - cal->tempR)/(cal->VADCH - cal->VADCR)) * (VADCM - cal->VADCR)); -// -// return fine_temp; -// } - - -// External interface. -// float common_hal_mcu_processor_get_temperature(void) { - // struct adc_module adc_instance_struct; - // - // system_voltage_reference_enable(SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE); - // configure_adc_temp(&adc_instance_struct); - // nvm_calibration_data_t nvm_calibration_data; - // load_calibration_data(&nvm_calibration_data); - // - // adc_enable(&adc_instance_struct); - // - // uint16_t data; - // enum status_code status; - // - // // Read twice and discard first result, as recommended in section 14 of - // // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf - // // "Discard the first conversion result whenever there is a change in ADC configuration - // // like voltage reference / ADC channel change" - // // Empirical observation shows the first reading is quite different than subsequent ones. - // - // adc_start_conversion(&adc_instance_struct); - // do { - // status = adc_read(&adc_instance_struct, &data); - // } while (status == STATUS_BUSY); - // - // adc_start_conversion(&adc_instance_struct); - // do { - // status = adc_read(&adc_instance_struct, &data); - // } while (status == STATUS_BUSY); - // - // // Disable so that someone else can use the adc with different settings. - // adc_disable(&adc_instance_struct); - // return calculate_temperature(data, &nvm_calibration_data); - return 0; + struct adc_sync_descriptor adc; + + static Adc* adc_insts[] = ADC_INSTS; + samd_peripherals_adc_setup(&adc, adc_insts[0]); + +#ifdef SAMD21 + // The parameters chosen here are from the temperature example in: + // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf + // That note also recommends in general: + // "Discard the first conversion result whenever there is a change + // in ADC configuration like voltage reference / ADC channel change." + + adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); + // Channel arg is ignored. + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); + adc_sync_set_inputs(&adc, + ADC_INPUTCTRL_MUXPOS_TEMP_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) + + hri_adc_write_CTRLB_PRESCALER_bf(adc.device.hw, ADC_CTRLB_PRESCALER_DIV32_Val); + hri_adc_write_SAMPCTRL_SAMPLEN_bf(adc.device.hw, ADC_TEMP_SAMPLE_LENGTH); + + hri_sysctrl_set_VREF_TSEN_bit(SYSCTRL); + + // Oversample and decimate. A higher samplenum produces a more stable result. + hri_adc_write_AVGCTRL_SAMPLENUM_bf(adc.device.hw, ADC_AVGCTRL_SAMPLENUM_4_Val); + hri_adc_write_AVGCTRL_ADJRES_bf(adc.device.hw, 2); + + volatile uint16_t value; + + // Read twice and discard first result, as recommended in section 14 of + // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf + // "Discard the first conversion result whenever there is a change in ADC configuration + // like voltage reference / ADC channel change" + // Empirical observation shows the first reading is quite different than subsequent ones. + + // Channel arg is ignored. + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &value), 2); + + adc_sync_deinit(&adc); + return calculate_temperature(value); +#endif // SAMD21 + +#ifdef SAMD51 + adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + // Using INTVCC0 as the reference voltage. + // INTVCC1 seems to read a little high. + // INTREF doesn't work: ADC hangs BUSY. It's supposed to work, but does not. + // The SAME54 example from Atmel START implicitly uses INTREF. + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTVCC0_Val); + + hri_supc_set_VREF_ONDEMAND_bit(SUPC); + // Enable temperature sensor. + hri_supc_set_VREF_TSEN_bit(SUPC); + hri_supc_set_VREF_VREFOE_bit(SUPC); + + // Channel arg is ignored. + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); + adc_sync_set_inputs(&adc, + ADC_INPUTCTRL_MUXPOS_PTAT_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) + + // Read both temperature sensors. + volatile uint16_t ptat; + volatile uint16_t ctat; + + // Read twice for stability (necessary?). + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ptat), 2); + + adc_sync_set_inputs(&adc, + ADC_INPUTCTRL_MUXPOS_CTAT_Val, // pos_input + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored) + + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &ctat), 2); + + // Turn off temp sensor. + hri_supc_clear_VREF_TSEN_bit(SUPC); + + adc_sync_deinit(&adc); + return calculate_temperature(ptat, ctat); +#endif // SAMD51 } +float common_hal_mcu_processor_get_voltage(void) { + struct adc_sync_descriptor adc; + + static Adc* adc_insts[] = ADC_INSTS; + samd_peripherals_adc_setup(&adc, adc_insts[0]); + +#ifdef SAMD21 + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); +#endif + +#ifdef SAMD51 + hri_supc_set_VREF_SEL_bf(SUPC, SUPC_VREF_SEL_1V0_Val); + // ONDEMAND must be clear, and VREFOE must be set, or else the ADC conversion will not complete. + // See https://community.atmel.com/forum/samd51-using-intref-adc-voltage-reference + hri_supc_clear_VREF_ONDEMAND_bit(SUPC); + hri_supc_set_VREF_VREFOE_bit(SUPC); + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTREF_Val); +#endif + + adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); + // Channel arg is ignored. + adc_sync_set_inputs(&adc, + ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val, // IOVCC/4 (nominal 3.3V/4) + ADC_INPUTCTRL_MUXNEG_GND_Val, // neg_input + IGNORED_CHANNEL); // channel (ignored). + adc_sync_enable_channel(&adc, IGNORED_CHANNEL); + + volatile uint16_t reading; + + // Channel arg is ignored. + // Read twice and discard first result, as recommended in section 14 of + // http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf + // "Discard the first conversion result whenever there is a change in ADC configuration + // like voltage reference / ADC channel change" + // Empirical observation shows the first reading is quite different than subsequent ones. + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); + adc_sync_read_channel(&adc, IGNORED_CHANNEL, ((uint8_t*) &reading), 2); + + adc_sync_deinit(&adc); + // Multiply by 4 to compensate for SCALEDIOVCC division by 4. + return (reading / 4095.0f) * 4.0f; +} uint32_t common_hal_mcu_processor_get_frequency(void) { // TODO(tannewt): Determine this dynamically. diff --git a/ports/atmel-samd/common-hal/microcontroller/__init__.c b/ports/atmel-samd/common-hal/microcontroller/__init__.c index 614fac870b690..09212a0d125a7 100644 --- a/ports/atmel-samd/common-hal/microcontroller/__init__.c +++ b/ports/atmel-samd/common-hal/microcontroller/__init__.c @@ -30,43 +30,53 @@ #include "py/runtime.h" #include "reset.h" -#include "samd21_pins.h" #include "shared-bindings/nvm/ByteArray.h" #include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Processor.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/translate.h" void common_hal_mcu_delay_us(uint32_t delay) { mp_hal_delay_us(delay); } -// Interrupt flags that will be saved and restored during disable/Enable -// interrupt functions below. -volatile hal_atomic_t flags; +volatile uint32_t nesting_count = 0; void common_hal_mcu_disable_interrupts(void) { - atomic_enter_critical(&flags); + __disable_irq(); + __DMB(); + nesting_count++; } void common_hal_mcu_enable_interrupts(void) { - atomic_leave_critical(&flags); + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + HardFault_Handler(); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); } -extern uint32_t _ezero; - void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { - // Set up the defaults. - _bootloader_dbl_tap = DBL_TAP_MAGIC; - _ezero = CIRCUITPY_CANARY_WORD; - if (runmode == RUNMODE_BOOTLOADER) { if (!bootloader_available()) { - mp_raise_ValueError("Cannot reset into bootloader because no bootloader is present."); + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); } // Pretend to be the first of the two reset presses needed to enter the // bootloader. That way one reset will end in the bootloader. _bootloader_dbl_tap = DBL_TAP_MAGIC; - } else if (runmode == RUNMODE_SAFE_MODE) { - _ezero = CIRCUITPY_SOFTWARE_SAFE_MODE; + } else { + // Set up the default. + _bootloader_dbl_tap = DBL_TAP_MAGIC_QUICK_BOOT; + } + if (runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); } } @@ -82,178 +92,304 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { }, }; -// NVM is only available on Express boards for now. #if CIRCUITPY_INTERNAL_NVM_SIZE > 0 // The singleton nvm.ByteArray object. -// const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { -// .base = { -// .type = &nvm_bytearray_type, -// }, -// .len = NVMCTRL_ROW_SIZE, -// .start_address = (uint8_t*) (FLASH_SIZE - NVMCTRL_ROW_SIZE) -// }; +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, + .start_address = (uint8_t*) (CIRCUITPY_INTERNAL_NVM_START_ADDR) +}; #endif // This maps MCU pin names to pin objects. STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { -// Pins in datasheet order. -#ifdef PIN_PA00 +#if defined(PIN_PA00) && !defined(IGNORE_PIN_PA00) { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, #endif -#ifdef PIN_PA01 +#if defined(PIN_PA01) && !defined(IGNORE_PIN_PA01) { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, #endif -#ifdef PIN_PA02 +#if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, #endif -#ifdef PIN_PA03 +#if defined(PIN_PA03) && !defined(IGNORE_PIN_PA03) { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, #endif -#ifdef PIN_PB04 - { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, -#endif -#ifdef PIN_PB05 - { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, -#endif -#ifdef PIN_PB06 - { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, -#endif -#ifdef PIN_PB07 - { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, -#endif -#ifdef PIN_PB08 - { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, -#endif -#ifdef PIN_PB09 - { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, -#endif -#ifdef PIN_PA04 +#if defined(PIN_PA04) && !defined(IGNORE_PIN_PA04) { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, #endif -#ifdef PIN_PA05 +#if defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, #endif -#ifdef PIN_PA06 +#if defined(PIN_PA06) && !defined(IGNORE_PIN_PA06) { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, #endif -#ifdef PIN_PA07 +#if defined(PIN_PA07) && !defined(IGNORE_PIN_PA07) { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, #endif -#ifdef PIN_PA08 +#if defined(PIN_PA08) && !defined(IGNORE_PIN_PA08) { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, #endif -#ifdef PIN_PA09 +#if defined(PIN_PA09) && !defined(IGNORE_PIN_PA09) { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, #endif -#ifdef PIN_PA10 +#if defined(PIN_PA10) && !defined(IGNORE_PIN_PA10) { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, #endif -#ifdef PIN_PA11 +#if defined(PIN_PA11) && !defined(IGNORE_PIN_PA11) { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, #endif -#ifdef PIN_PB10 - { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#endif -#ifdef PIN_PB11 - { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, -#endif -#ifdef PIN_PB12 - { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, -#endif -#ifdef PIN_PB13 - { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, -#endif -#ifdef PIN_PB14 - { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, -#endif - -// Second page. -#ifdef PIN_PB15 - { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, -#endif -#ifdef PIN_PA12 +#if defined(PIN_PA12) && !defined(IGNORE_PIN_PA12) { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, #endif -#ifdef PIN_PA13 +#if defined(PIN_PA13) && !defined(IGNORE_PIN_PA13) { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, #endif -#ifdef PIN_PA14 +#if defined(PIN_PA14) && !defined(IGNORE_PIN_PA14) { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, #endif -#ifdef PIN_PA15 +#if defined(PIN_PA15) && !defined(IGNORE_PIN_PA15) { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, #endif -#ifdef PIN_PA16 +#if defined(PIN_PA16) && !defined(IGNORE_PIN_PA16) { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_PA16) }, #endif -#ifdef PIN_PA17 +#if defined(PIN_PA17) && !defined(IGNORE_PIN_PA17) { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, #endif -#ifdef PIN_PA18 +#if defined(PIN_PA18) && !defined(IGNORE_PIN_PA18) { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, #endif -#ifdef PIN_PA19 +#if defined(PIN_PA19) && !defined(IGNORE_PIN_PA19) { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, #endif -#ifdef PIN_PB16 - { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, -#endif -#ifdef PIN_PB17 - { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, -#endif -#ifdef PIN_PA20 +#if defined(PIN_PA20) && !defined(IGNORE_PIN_PA20) { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, #endif -#ifdef PIN_PA21 +#if defined(PIN_PA21) && !defined(IGNORE_PIN_PA21) { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_PA21) }, #endif -#ifdef PIN_PA22 +#if defined(PIN_PA22) && !defined(IGNORE_PIN_PA22) { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, #endif -#ifdef PIN_PA23 +#if defined(PIN_PA23) && !defined(IGNORE_PIN_PA23) { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_PA23) }, #endif -#ifdef PIN_PA24 +#if defined(PIN_PA24) && !defined(IGNORE_PIN_PA24) { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_PA24) }, #endif -#ifdef PIN_PA25 +#if defined(PIN_PA25) && !defined(IGNORE_PIN_PA25) { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_PA25) }, #endif -#ifdef PIN_PB22 - { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, -#endif -#ifdef PIN_PB23 - { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, -#endif -#ifdef PIN_PA27 +#if defined(PIN_PA27) && !defined(IGNORE_PIN_PA27) { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_PA27) }, #endif -#ifdef PIN_PA28 +#if defined(PIN_PA28) && !defined(IGNORE_PIN_PA28) { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_PA28) }, #endif -#ifdef PIN_PA30 +#if defined(PIN_PA30) && !defined(IGNORE_PIN_PA30) { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_PA30) }, #endif -#ifdef PIN_PA31 +#if defined(PIN_PA31) && !defined(IGNORE_PIN_PA31) { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_PA31) }, #endif -#ifdef PIN_PB30 + +#if defined(PIN_PB00) && !defined(IGNORE_PIN_PB00) + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, +#endif +#if defined(PIN_PB01) && !defined(IGNORE_PIN_PB01) + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, +#endif +#if defined(PIN_PB02) && !defined(IGNORE_PIN_PB02) + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, +#endif +#if defined(PIN_PB03) && !defined(IGNORE_PIN_PB03) + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, +#endif +#if defined(PIN_PB04) && !defined(IGNORE_PIN_PB04) + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, +#endif +#if defined(PIN_PB05) && !defined(IGNORE_PIN_PB05) + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, +#endif +#if defined(PIN_PB06) && !defined(IGNORE_PIN_PB06) + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, +#endif +#if defined(PIN_PB07) && !defined(IGNORE_PIN_PB07) + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, +#endif +#if defined(PIN_PB08) && !defined(IGNORE_PIN_PB08) + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, +#endif +#if defined(PIN_PB09) && !defined(IGNORE_PIN_PB09) + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, +#endif +#if defined(PIN_PB10) && !defined(IGNORE_PIN_PB10) + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, +#endif +#if defined(PIN_PB11) && !defined(IGNORE_PIN_PB11) + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, +#endif +#if defined(PIN_PB12) && !defined(IGNORE_PIN_PB12) + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, +#endif +#if defined(PIN_PB13) && !defined(IGNORE_PIN_PB13) + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, +#endif +#if defined(PIN_PB14) && !defined(IGNORE_PIN_PB14) + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, +#endif +#if defined(PIN_PB15) && !defined(IGNORE_PIN_PB15) + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, +#endif +#if defined(PIN_PB16) && !defined(IGNORE_PIN_PB16) + { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, +#endif +#if defined(PIN_PB17) && !defined(IGNORE_PIN_PB17) + { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, +#endif +#if defined(PIN_PB18) && !defined(IGNORE_PIN_PB18) + { MP_ROM_QSTR(MP_QSTR_PB18), MP_ROM_PTR(&pin_PB18) }, +#endif +#if defined(PIN_PB19) && !defined(IGNORE_PIN_PB19) + { MP_ROM_QSTR(MP_QSTR_PB19), MP_ROM_PTR(&pin_PB19) }, +#endif +#if defined(PIN_PB20) && !defined(IGNORE_PIN_PB20) + { MP_ROM_QSTR(MP_QSTR_PB20), MP_ROM_PTR(&pin_PB20) }, +#endif +#if defined(PIN_PB21) && !defined(IGNORE_PIN_PB21) + { MP_ROM_QSTR(MP_QSTR_PB21), MP_ROM_PTR(&pin_PB21) }, +#endif +#if defined(PIN_PB22) && !defined(IGNORE_PIN_PB22) + { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, +#endif +#if defined(PIN_PB23) && !defined(IGNORE_PIN_PB23) + { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, +#endif +#if defined(PIN_PB30) && !defined(IGNORE_PIN_PB30) { MP_ROM_QSTR(MP_QSTR_PB30), MP_ROM_PTR(&pin_PB30) }, #endif -#ifdef PIN_PB31 +#if defined(PIN_PB31) && !defined(IGNORE_PIN_PB31) { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) }, #endif -#ifdef PIN_PB00 - { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + +// These are SAMD51 specific so we assume we want them in RAM +#if defined(PIN_PC00) + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, #endif -#ifdef PIN_PB01 - { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, +#if defined(PIN_PC01) + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, #endif -#ifdef PIN_PB02 - { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, +#if defined(PIN_PC02) + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, +#endif +#if defined(PIN_PC03) + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, +#endif +#if defined(PIN_PC04) + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, +#endif +#if defined(PIN_PC05) + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, +#endif +#if defined(PIN_PC06) + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, +#endif +#if defined(PIN_PC07) + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, +#endif +#if defined(PIN_PC10) + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, +#endif +#if defined(PIN_PC11) + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, +#endif +#if defined(PIN_PC12) + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, +#endif +#if defined(PIN_PC13) + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, +#endif +#if defined(PIN_PC14) + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, +#endif +#if defined(PIN_PC15) + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, +#endif +#if defined(PIN_PC16) + { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) }, +#endif +#if defined(PIN_PC17) + { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) }, +#endif +#if defined(PIN_PC18) + { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) }, +#endif +#if defined(PIN_PC19) + { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) }, +#endif +#if defined(PIN_PC20) + { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) }, +#endif +#if defined(PIN_PC21) + { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) }, +#endif +#if defined(PIN_PC22) + { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, +#endif +#if defined(PIN_PC23) + { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, +#endif +#if defined(PIN_PC24) + { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) }, +#endif +#if defined(PIN_PC25) + { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) }, +#endif +#if defined(PIN_PC26) + { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) }, +#endif +#if defined(PIN_PC27) + { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) }, +#endif +#if defined(PIN_PC28) + { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) }, +#endif +#if defined(PIN_PC30) + { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, +#endif +#if defined(PIN_PC31) + { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, +#endif + +#if defined(PIN_PD00) + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, +#endif +#if defined(PIN_PD01) + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, +#endif +#if defined(PIN_PD08) + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, +#endif +#if defined(PIN_PD09) + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, +#endif +#if defined(PIN_PD10) + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, +#endif +#if defined(PIN_PD11) + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, +#endif +#if defined(PIN_PD12) + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, +#endif +#if defined(PIN_PD20) + { MP_ROM_QSTR(MP_QSTR_PD20), MP_ROM_PTR(&pin_PD20) }, #endif -#ifdef PIN_PB03 - { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) } +#if defined(PIN_PD21) + { MP_ROM_QSTR(MP_QSTR_PD21), MP_ROM_PTR(&pin_PD21) }, #endif }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c index 5530d040853a9..ba69174af48f1 100644 --- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c +++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c @@ -34,27 +34,70 @@ #ifdef SAMD51 #include "hri/hri_cmcc_d51.h" #include "hri/hri_nvmctrl_d51.h" - -// This magical macro makes sure the delay isn't optimized out and is the -// minimal three instructions. -#define delay_cycles(cycles) \ -{ \ - uint32_t t; \ - asm volatile ( \ - "movs %[t], %[c]\n\t" \ - "loop%=:\n\t" \ - "subs %[t], #1\n\t" \ - "bne.n loop%=" : [t] "=r"(t) : [c] "I" (cycles)); \ - } #endif +__attribute__((naked,noinline,aligned(16))) +static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMask, + const uint8_t *ptr, int numBytes); + +static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMask, + const uint8_t *ptr, int numBytes) { + asm volatile(" push {r4, r5, r6, lr};" + " add r3, r2, r3;" + "loopLoad:" + " ldrb r5, [r2, #0];" // r5 := *ptr + " add r2, #1;" // ptr++ + " movs r4, #128;" // r4-mask, 0x80 + "loopBit:" + " str r1, [r0, #4];" // set + #ifdef SAMD21 + " movs r6, #3; d2: sub r6, #1; bne d2;" // delay 3 + #endif + #ifdef SAMD51 + " movs r6, #3; d2: subs r6, #1; bne d2;" // delay 3 + #endif + " tst r4, r5;" // mask&r5 + " bne skipclr;" + " str r1, [r0, #0];" // clr + "skipclr:" + #ifdef SAMD21 + " movs r6, #6; d0: sub r6, #1; bne d0;" // delay 6 + #endif + #ifdef SAMD51 + " movs r6, #6; d0: subs r6, #1; bne d0;" // delay 6 + #endif + " str r1, [r0, #0];" // clr (possibly again, doesn't matter) + #ifdef SAMD21 + " asr r4, r4, #1;" // mask >>= 1 + #endif + #ifdef SAMD51 + " asrs r4, r4, #1;" // mask >>= 1 + #endif + " beq nextbyte;" + " uxtb r4, r4;" + #ifdef SAMD21 + " movs r6, #2; d1: sub r6, #1; bne d1;" // delay 2 + #endif + #ifdef SAMD51 + " movs r6, #2; d1: subs r6, #1; bne d1;" // delay 2 + #endif + " b loopBit;" + "nextbyte:" + " cmp r2, r3;" + " bcs neopixel_stop;" + " b loopLoad;" + "neopixel_stop:" + " pop {r4, r5, r6, pc};" + ""); +} + uint64_t next_start_tick_ms = 0; uint32_t next_start_tick_us = 1000; void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { // This is adapted directly from the Adafruit NeoPixel library SAMD21G18A code: // https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp - uint8_t *ptr, *end, p, bitMask; + // and the asm version from https://github.com/microsoft/uf2-samdx1/blob/master/inc/neopixel.h uint32_t pinMask; PortGroup* port; @@ -66,21 +109,18 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, mp_hal_disable_all_interrupts(); - #ifdef SAMD21 - // Make sure the NVM cache is consistently timed. - NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val; - #endif - #ifdef SAMD51 // When this routine is positioned at certain addresses, the timing logic // below can be too fast by about 2.5x. This is some kind of (un)fortunate code - // positiong with respect to a cache line. + // positioning with respect to a cache line. // Theoretically we should turn on off the CMCC caches and the // NVM caches to ensure consistent timing. Testing shows the the NVMCTRL // cache disabling seems to make the difference. But turn both off to make sure. // It's difficult to test because additions to the code before the timing loop - // below change instruction placement. Testing was done by adding cache changes - // below the loop (so only the first time through is wrong). + // below change instruction placement. (though this should be less true now that + // the main code is in the cache-aligned function neopixel_send_buffer_core) + // Testing was done by adding cache changes below the loop (so only the + // first time through is wrong). // // Turn off instruction, data, and NVM caches to force consistent timing. // Invalidate existing cache entries. @@ -88,78 +128,13 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, hri_cmcc_write_MAINT0_reg(CMCC, CMCC_MAINT0_INVALL); hri_nvmctrl_set_CTRLA_CACHEDIS0_bit(NVMCTRL); hri_nvmctrl_set_CTRLA_CACHEDIS1_bit(NVMCTRL); - #endif + #endif - uint32_t pin = digitalinout->pin->pin; + uint32_t pin = digitalinout->pin->number; port = &PORT->Group[GPIO_PORT(pin)]; // Convert GPIO # to port register pinMask = (1UL << (pin % 32)); // From port_pin_set_output_level ASF code. - ptr = pixels; - end = ptr + numBytes; - p = *ptr++; - bitMask = 0x80; - - volatile uint32_t *set = &(port->OUTSET.reg), - *clr = &(port->OUTCLR.reg); - - for(;;) { - *set = pinMask; - // This is the time where the line is always high regardless of the bit. - // For the SK6812 its 0.3us +- 0.15us - #ifdef SAMD21 - asm("nop; nop;"); - #endif - #ifdef SAMD51 - delay_cycles(3); - #endif - if(p & bitMask) { - // This is the high delay unique to a one bit. - // For the SK6812 its 0.3us - #ifdef SAMD21 - asm("nop; nop; nop; nop; nop; nop; nop;"); - #endif - #ifdef SAMD51 - delay_cycles(11); - #endif - *clr = pinMask; - } else { - *clr = pinMask; - // This is the low delay unique to a zero bit. - // For the SK6812 its 0.3us - #ifdef SAMD21 - asm("nop; nop;"); - #endif - #ifdef SAMD51 - delay_cycles(3); - #endif - } - if((bitMask >>= 1) != 0) { - // This is the delay between bits in a byte and is the 1 code low - // level time from the datasheet. - // For the SK6812 its 0.6us +- 0.15us - #ifdef SAMD21 - asm("nop; nop; nop; nop; nop;"); - #endif - #ifdef SAMD51 - delay_cycles(20); - #endif - } else { - if(ptr >= end) break; - p = *ptr++; - bitMask = 0x80; - // This is the delay between bytes. It's similar to the other branch - // in the if statement except its tuned to account for the time the - // above operations take. - // For the SK6812 its 0.6us +- 0.15us - #ifdef SAMD51 - delay_cycles(15); - #endif - } - } - - #ifdef SAMD21 - // Speed up! (But inconsistent timing.) - NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val; - #endif + volatile uint32_t *clr = &(port->OUTCLR.reg); + neopixel_send_buffer_core(clr, pinMask, pixels, numBytes); #ifdef SAMD51 // Turn instruction, data, and NVM caches back on. @@ -183,3 +158,4 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, mp_hal_enable_all_interrupts(); } + diff --git a/ports/atmel-samd/common-hal/nvm/ByteArray.c b/ports/atmel-samd/common-hal/nvm/ByteArray.c index df8b5790e2d24..ac896a9d52f27 100644 --- a/ports/atmel-samd/common-hal/nvm/ByteArray.c +++ b/ports/atmel-samd/common-hal/nvm/ByteArray.c @@ -26,7 +26,9 @@ #include "common-hal/nvm/ByteArray.h" -#include "asf/sam0/drivers/nvm/nvm.h" +#include "hal_flash.h" + +#include "supervisor/shared/stack.h" #include #include @@ -36,49 +38,14 @@ uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { } bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, - uint32_t start_index, uint8_t* values, uint32_t len) { - uint32_t total_written = 0; - for (uint32_t i = 0; i < self->len / NVMCTRL_ROW_SIZE; i++) { - uint32_t row_start = NVMCTRL_ROW_SIZE * i; - if (row_start + NVMCTRL_ROW_SIZE < start_index || start_index + len < row_start) { - continue; - } - uint8_t temp_row[NVMCTRL_ROW_SIZE]; - memcpy(temp_row, - self->start_address + row_start, - NVMCTRL_ROW_SIZE); - enum status_code error_code; - do { - error_code = nvm_erase_row((uint32_t) self->start_address + row_start); - } while (error_code == STATUS_BUSY); - if (error_code != STATUS_OK) { - return false; - } - uint32_t data_start = 0; - if (start_index > row_start) { - data_start = start_index - row_start; - } - uint32_t data_len = len; - uint32_t data_remaining = data_len - total_written; - uint32_t row_remaining = NVMCTRL_ROW_SIZE - data_start; - if (data_remaining > row_remaining) { - data_len = row_remaining; - } - memcpy(temp_row + data_start, - values + total_written, - data_len); - for (int page = 0; page < NVMCTRL_ROW_SIZE / NVMCTRL_PAGE_SIZE; page++) { - do { - error_code = nvm_write_buffer((uint32_t) self->start_address + row_start + page * NVMCTRL_PAGE_SIZE, - temp_row + page * NVMCTRL_PAGE_SIZE, - NVMCTRL_PAGE_SIZE); - } while (error_code == STATUS_BUSY); - if (error_code != STATUS_OK) { - return false; - } - } - } - return true; + uint32_t start_index, uint8_t* values, uint32_t len) { + // We don't use features that use any advanced NVMCTRL features so we can fake the descriptor + // whenever we need it instead of storing it long term. + struct flash_descriptor desc; + desc.dev.hw = NVMCTRL; + bool status = flash_write(&desc, (uint32_t) self->start_address + start_index, values, len) == ERR_NONE; + assert_heap_ok(); + return status; } // NVM memory is memory mapped so reading it is easy. diff --git a/ports/atmel-samd/common-hal/ps2io/Ps2.c b/ports/atmel-samd/common-hal/ps2io/Ps2.c new file mode 100644 index 0000000000000..6a06864f2177a --- /dev/null +++ b/ports/atmel-samd/common-hal/ps2io/Ps2.c @@ -0,0 +1,441 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/ps2io/Ps2.h" + +#include + +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" + +#include "background.h" +#include "eic_handler.h" +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "samd/external_interrupts.h" +#include "samd/pins.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/ps2io/Ps2.h" +#include "supervisor/shared/translate.h" + +#include "tick.h" + +#define STATE_IDLE 0 +#define STATE_RECV 1 +#define STATE_RECV_PARITY 2 +#define STATE_RECV_STOP 3 +#define STATE_RECV_ERR 10 + +#define ERROR_STARTBIT 0x01 +#define ERROR_TIMEOUT 0x02 +#define ERROR_PARITY 0x04 +#define ERROR_STOPBIT 0x08 +#define ERROR_BUFFER 0x10 + +#define ERROR_TX_CLKLO 0x100 +#define ERROR_TX_CLKHI 0x200 +#define ERROR_TX_ACKDATA 0x400 +#define ERROR_TX_ACKCLK 0x800 +#define ERROR_TX_RTS 0x1000 +#define ERROR_TX_NORESP 0x2000 + +static void ps2_set_config(ps2io_ps2_obj_t* self) { + uint32_t sense_setting = EIC_CONFIG_SENSE0_FALL_Val; + set_eic_handler(self->channel, EIC_HANDLER_PS2); + turn_on_eic_channel(self->channel, sense_setting); +} + +static void disable_interrupt(ps2io_ps2_obj_t* self) { + uint32_t mask = 1 << self->channel; + EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; +} + +static void resume_interrupt(ps2io_ps2_obj_t* self) { + disable_interrupt(self); + + self->state = STATE_IDLE; + gpio_set_pin_function(self->clk_pin, GPIO_PIN_FUNCTION_A); + uint32_t mask = 1 << self->channel; + EIC->INTFLAG.reg = mask << EIC_INTFLAG_EXTINT_Pos; + EIC->INTENSET.reg = mask << EIC_INTENSET_EXTINT_Pos; + + ps2_set_config(self); +} + +static void clk_hi(ps2io_ps2_obj_t* self) { + // External pull-up + // Must set pull after setting direction. + gpio_set_pin_direction(self->clk_pin, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(self->clk_pin, GPIO_PULL_OFF); +} + +static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + common_hal_mcu_delay_us(1); + while (gpio_get_pin_level(self->clk_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + common_hal_mcu_delay_us(1); + while (!gpio_get_pin_level(self->clk_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static void clk_lo(ps2io_ps2_obj_t* self) { + gpio_set_pin_pull_mode(self->clk_pin, GPIO_PULL_OFF); + gpio_set_pin_direction(self->clk_pin, GPIO_DIRECTION_OUT); + gpio_set_pin_level(self->clk_pin, 0); +} + +static void data_hi(ps2io_ps2_obj_t* self) { + // External pull-up + gpio_set_pin_direction(self->data_pin, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(self->data_pin, GPIO_PULL_OFF); +} + +static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + common_hal_mcu_delay_us(1); + while (gpio_get_pin_level(self->data_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + common_hal_mcu_delay_us(1); + while (!gpio_get_pin_level(self->data_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static void data_lo(ps2io_ps2_obj_t* self) { + gpio_set_pin_pull_mode(self->data_pin, GPIO_PULL_OFF); + gpio_set_pin_direction(self->data_pin, GPIO_DIRECTION_OUT); + gpio_set_pin_level(self->data_pin, 0); +} + +static void idle(ps2io_ps2_obj_t* self) { + clk_hi(self); + data_hi(self); +} + +static void inhibit(ps2io_ps2_obj_t* self) { + clk_lo(self); + data_hi(self); +} + +static void delay_us(uint32_t t) { + common_hal_mcu_delay_us(t); +} + +void ps2_interrupt_handler(uint8_t channel) { + // Grab the current time first. + uint32_t current_us; + uint64_t current_ms; + current_tick(¤t_ms, ¤t_us); + + ps2io_ps2_obj_t* self = get_eic_channel_data(channel); + int data_bit = gpio_get_pin_level(self->data_pin) ? 1 : 0; + + // test for timeout + if (self->state != STATE_IDLE) { + int64_t diff_ms = current_ms - self->last_int_ms; + if (diff_ms >= 2) { // a.k.a. > 1.001ms + self->last_errors |= ERROR_TIMEOUT; + self->state = STATE_IDLE; + } + } + + self->last_int_us = current_us; + self->last_int_ms = current_ms; + + if (self->state == STATE_IDLE) { + self->bits = 0; + self->parity = false; + self->bitcount = 0; + self->state = STATE_RECV; + if (data_bit) { + // start bit should be 0 + self->last_errors |= ERROR_STARTBIT; + self->state = STATE_RECV_ERR; + } else { + self->state = STATE_RECV; + } + + } else if (self->state == STATE_RECV) { + if (data_bit) { + self->bits |= data_bit << self->bitcount; + self->parity = !self->parity; + } + ++self->bitcount; + if (self->bitcount >= 8) { + self->state = STATE_RECV_PARITY; + } + + } else if (self->state == STATE_RECV_PARITY) { + ++self->bitcount; + if (data_bit) { + self->parity = !self->parity; + } + if (!self->parity) { + self->last_errors |= ERROR_PARITY; + self->state = STATE_RECV_ERR; + } else { + self->state = STATE_RECV_STOP; + } + + } else if (self->state == STATE_RECV_STOP) { + ++self->bitcount; + if (! data_bit) { + self->last_errors |= ERROR_STOPBIT; + } else if (self->waiting_cmd_response) { + self->cmd_response = self->bits; + self->waiting_cmd_response = false; + } else if (self->bufcount >= sizeof(self->buffer)) { + self->last_errors |= ERROR_BUFFER; + } else { + self->buffer[self->bufposw] = self->bits; + self->bufposw = (self->bufposw + 1) % sizeof(self->buffer); + self->bufcount++; + } + self->state = STATE_IDLE; + + } else if (self->state == STATE_RECV_ERR) { + // just count the bits until idle + if (++self->bitcount >= 10) { + self->state = STATE_IDLE; + } + } +} + +void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, + const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) { + if (!clk_pin->has_extint) { + mp_raise_RuntimeError(translate("No hardware support on clk pin")); + } + if (eic_get_enable() && !eic_channel_free(clk_pin->extint_channel)) { + mp_raise_RuntimeError(translate("EXTINT channel already in use")); + } + + clk_hi(self); + data_hi(self); + + self->channel = clk_pin->extint_channel; + self->clk_pin = clk_pin->number; + self->data_pin = data_pin->number; + self->state = STATE_IDLE; + self->bufcount = 0; + self->bufposr = 0; + self->bufposw = 0; + self->waiting_cmd_response = false; + + set_eic_channel_data(clk_pin->extint_channel, (void*) self); + + // Check to see if the EIC is enabled and start it up if its not.' + if (eic_get_enable() == 0) { + turn_on_external_interrupt_controller(); + } + + gpio_set_pin_function(clk_pin->number, GPIO_PIN_FUNCTION_A); + gpio_set_pin_function(data_pin->number, GPIO_PIN_FUNCTION_A); + + turn_on_cpu_interrupt(self->channel); + + claim_pin(clk_pin); + claim_pin(data_pin); + + // Set config will enable the EIC. + ps2_set_config(self); +} + +bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) { + return self->clk_pin == NO_PIN; +} + +void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { + if (common_hal_ps2io_ps2_deinited(self)) { + return; + } + set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); + turn_off_eic_channel(self->channel); + reset_pin_number(self->clk_pin); + reset_pin_number(self->data_pin); + self->clk_pin = NO_PIN; + self->data_pin = NO_PIN; +} + +uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) { + return self->bufcount; +} + +bool common_hal_ps2io_ps2_get_paused(ps2io_ps2_obj_t* self) { + uint32_t mask = 1 << self->channel; + return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; +} + +int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) +{ + common_hal_mcu_disable_interrupts(); + if (self->bufcount <= 0) { + common_hal_mcu_enable_interrupts(); + return -1; + } + uint8_t b = self->buffer[self->bufposr]; + self->bufposr = (self->bufposr + 1) % sizeof(self->buffer); + self->bufcount -= 1; + common_hal_mcu_enable_interrupts(); + return b; +} + +uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) +{ + common_hal_mcu_disable_interrupts(); + uint16_t errors = self->last_errors; + self->last_errors = 0; + common_hal_mcu_enable_interrupts(); + return errors; +} + +// Based upon TMK implementation of PS/2 protocol +// https://github.com/tmk/tmk_keyboard/blob/master/tmk_core/protocol/ps2_interrupt.c + +int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) +{ + disable_interrupt(self); + inhibit(self); + delay_us(100); + + /* RTS and start bit */ + data_lo(self); + clk_hi(self); + if (!wait_clk_lo(self, 10000)) { + self->last_errors |= ERROR_TX_RTS; + goto ERROR; + } + + bool parity = true; + for (uint8_t i = 0; i < 8; i++) { + delay_us(15); + if (b & (1 << i)) { + parity = !parity; + data_hi(self); + } else { + data_lo(self); + } + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_CLKHI; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_CLKLO; + goto ERROR; + } + } + + delay_us(15); + if (parity) { + data_hi(self); + } else { + data_lo(self); + } + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_CLKHI; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_CLKLO; + goto ERROR; + } + + /* Stop bit */ + delay_us(15); + data_hi(self); + + /* Ack */ + if (!wait_data_lo(self, 50)) { + self->last_errors |= ERROR_TX_ACKDATA; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_ACKCLK; + goto ERROR; + } + + /* wait for idle state */ + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_ACKCLK; + goto ERROR; + } + if (!wait_data_hi(self, 50)) { + self->last_errors |= ERROR_TX_ACKDATA; + goto ERROR; + } + + /* Wait for response byte */ + self->waiting_cmd_response = true; + idle(self); + resume_interrupt(self); + + for (int i = 0; i < 25; ++i) { + delay_us(1000); + common_hal_mcu_disable_interrupts(); + bool has_response = !self->waiting_cmd_response; + uint8_t response = self->cmd_response; + common_hal_mcu_enable_interrupts(); + + if (has_response) { + return response; + } + } + + /* No response */ + common_hal_mcu_disable_interrupts(); + self->waiting_cmd_response = false; + self->last_errors |= ERROR_TX_NORESP; + common_hal_mcu_enable_interrupts(); + return -1; + + /* Other errors */ +ERROR: + idle(self); + resume_interrupt(self); + return -1; +} diff --git a/ports/atmel-samd/common-hal/ps2io/Ps2.h b/ports/atmel-samd/common-hal/ps2io/Ps2.h new file mode 100644 index 0000000000000..cce6ae4746a44 --- /dev/null +++ b/ports/atmel-samd/common-hal/ps2io/Ps2.h @@ -0,0 +1,62 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_PS2IO_PS2_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_PS2IO_PS2_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t channel; + uint8_t clk_pin; + uint8_t data_pin; + + uint8_t state; + uint64_t last_int_ms; + uint32_t last_int_us; + + uint16_t bits; + bool parity; + uint8_t bitcount; + + uint8_t buffer[16]; + uint8_t bufcount; + uint8_t bufposr; + uint8_t bufposw; + + uint16_t last_errors; + + bool waiting_cmd_response; + uint8_t cmd_response; +} ps2io_ps2_obj_t; + +void ps2_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_PS2IO_PS2_H diff --git a/ports/atmel-samd/common-hal/ps2io/__init__.c b/ports/atmel-samd/common-hal/ps2io/__init__.c new file mode 100644 index 0000000000000..ba4b4249f7330 --- /dev/null +++ b/ports/atmel-samd/common-hal/ps2io/__init__.c @@ -0,0 +1 @@ +// No ps2io module functions. diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.c b/ports/atmel-samd/common-hal/pulseio/PWMOut.c index c68ea698569c7..fef581584f663 100644 --- a/ports/atmel-samd/common-hal/pulseio/PWMOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.c @@ -31,12 +31,14 @@ #include "common-hal/pulseio/PWMOut.h" #include "shared-bindings/pulseio/PWMOut.h" #include "shared-bindings/microcontroller/Processor.h" +#include "timer_handler.h" #include "atmel_start_pins.h" #include "hal/utils/include/utils_repeat_macro.h" -#include "timers.h" +#include "samd/timers.h" +#include "supervisor/shared/translate.h" -#include "samd21_pins.h" +#include "samd/pins.h" #undef ENABLE @@ -48,16 +50,35 @@ static uint32_t tc_periods[TC_INST_NUM]; uint32_t target_tcc_frequencies[TCC_INST_NUM]; uint8_t tcc_refcount[TCC_INST_NUM]; -const uint16_t prescaler[8] = {1, 2, 4, 8, 16, 64, 256, 1024}; // This bitmask keeps track of which channels of a TCC are currently claimed. #ifdef SAMD21 -uint8_t tcc_channels[3] = {0xf0, 0xfc, 0xfc}; +uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially. #endif #ifdef SAMD51 -uint8_t tcc_channels[5] = {0xc0, 0xf0, 0xf8, 0xfc, 0xfc}; +uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially. #endif +static uint8_t never_reset_tc_or_tcc[TC_INST_NUM + TCC_INST_NUM]; + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + if (self->timer->is_tc) { + never_reset_tc_or_tcc[self->timer->index] += 1; + } else { + never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] += 1; + } + + never_reset_pin_number(self->pin->number); +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + if (self->timer->is_tc) { + never_reset_tc_or_tcc[self->timer->index] -= 1; + } else { + never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] -= 1; + } +} + void pwmout_reset(void) { // Reset all timers for (int i = 0; i < TCC_INST_NUM; i++) { @@ -66,6 +87,9 @@ void pwmout_reset(void) { } Tcc *tccs[TCC_INST_NUM] = TCC_INSTS; for (int i = 0; i < TCC_INST_NUM; i++) { + if (never_reset_tc_or_tcc[TC_INST_NUM + i] > 0) { + continue; + } // Disable the module before resetting it. if (tccs[i]->CTRLA.bit.ENABLE == 1) { tccs[i]->CTRLA.bit.ENABLE = 0; @@ -76,11 +100,16 @@ void pwmout_reset(void) { for (uint8_t j = 0; j < tcc_cc_num[i]; j++) { mask <<= 1; } - tcc_channels[i] = 0xf0; + tcc_channels[i] = mask; tccs[i]->CTRLA.bit.SWRST = 1; + while (tccs[i]->CTRLA.bit.SWRST == 1) { + } } Tc *tcs[TC_INST_NUM] = TC_INSTS; for (int i = 0; i < TC_INST_NUM; i++) { + if (never_reset_tc_or_tcc[i] > 0) { + continue; + } tcs[i]->COUNT16.CTRLA.bit.SWRST = 1; while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) { } @@ -99,13 +128,14 @@ bool channel_ok(const pin_timer_t* t) { t->is_tc; } -void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, - const mcu_pin_obj_t* pin, - uint16_t duty, - uint32_t frequency, - bool variable_frequency) { +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, + const mcu_pin_obj_t* pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { self->pin = pin; self->variable_frequency = variable_frequency; + self->duty_cycle = duty; if (pin->timer[0].index >= TC_INST_NUM && pin->timer[1].index >= TCC_INST_NUM @@ -113,17 +143,17 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, && pin->timer[2].index >= TCC_INST_NUM #endif ) { - mp_raise_ValueError("Invalid pin"); + return PWMOUT_INVALID_PIN; } if (frequency == 0 || frequency > 6000000) { - mp_raise_ValueError("Invalid PWM frequency"); + return PWMOUT_INVALID_FREQUENCY; } // Figure out which timer we are using. // First see if a tcc is already going with the frequency we want and our - // channel is unused. tc's don't have neough channels to share. + // channel is unused. tc's don't have enough channels to share. const pin_timer_t* timer = NULL; uint8_t mux_position = 0; if (!variable_frequency) { @@ -140,6 +170,9 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { timer = t; mux_position = j; + // Claim channel. + tcc_channels[timer->index] |= (1 << tcc_channel(timer)); + } } } @@ -152,6 +185,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, // one output so we start with the TCs to see if they work. int8_t direction = -1; uint8_t start = NUM_TIMERS_PER_PIN - 1; + bool found = false; if (variable_frequency) { direction = 1; start = 0; @@ -163,6 +197,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, continue; } if (t->is_tc) { + found = true; Tc* tc = tc_insts[t->index]; if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { timer = t; @@ -178,8 +213,10 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, } if (timer == NULL) { - mp_raise_RuntimeError("All timers in use"); - return; + if (found) { + return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE; + } + return PWMOUT_ALL_TIMERS_IN_USE; } uint8_t resolution = 0; @@ -201,6 +238,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, } } + set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT); // We use the zeroeth clock on either port to go full speed. turn_on_clocks(timer->is_tc, timer->index, 0); @@ -247,13 +285,14 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, self->timer = timer; - gpio_set_pin_function(pin->pin, GPIO_PIN_FUNCTION_E + mux_position); + gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position); common_hal_pulseio_pwmout_set_duty_cycle(self, duty); + return PWMOUT_OK; } bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { @@ -279,11 +318,18 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } } } - reset_pin(self->pin->pin); - self->pin = mp_const_none; + reset_pin_number(self->pin->number); + self->pin = NULL; } extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { + // Store the unadjusted duty cycle. It turns out the the process of adjusting and calculating + // the duty cycle here and reading it back is lossy - the value will decay over time. + // Track it here so that if frequency is changed we can use this value to recalculate the + // proper duty cycle. + // See https://github.com/adafruit/circuitpython/issues/2086 for more details + self->duty_cycle = duty; + const pin_timer_t* t = self->timer; if (t->is_tc) { uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; @@ -292,32 +338,29 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, #endif #ifdef SAMD51 Tc* tc = tc_insts[t->index]; - while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) { - // Wait for a previous value to be written. This can wait up to one period so we do - // other stuff in the meantime. - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif - } + while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} tc->COUNT16.CCBUF[1].reg = adjusted_duty; #endif } else { uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; uint8_t channel = tcc_channel(t); Tcc* tcc = tcc_insts[t->index]; - while ((tcc->SYNCBUSY.vec.CC & (1 << channel)) != 0) { - // Wait for a previous value to be written. This can wait up to one period so we do - // other stuff in the meantime. - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif - } + + // Write into the CC buffer register, which will be transferred to the + // CC register on an UPDATE (when period is finished). + // Do clock domain syncing as necessary. + + while (tcc->SYNCBUSY.reg != 0) {} + + // Lock out double-buffering while updating the CCB value. + tcc->CTRLBSET.bit.LUPD = 1; #ifdef SAMD21 tcc->CCB[channel].reg = adjusted_duty; #endif #ifdef SAMD51 tcc->CCBUF[channel].reg = adjusted_duty; #endif + tcc->CTRLBCLR.bit.LUPD = 1; } } @@ -332,7 +375,12 @@ uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { Tcc* tcc = tcc_insts[t->index]; uint8_t channel = tcc_channel(t); uint32_t cv = 0; + + while (tcc->SYNCBUSY.bit.CTRLB) {} + #ifdef SAMD21 + // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied + // to the CC value. if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) { cv = tcc->CCB[channel].reg; } else { @@ -357,7 +405,7 @@ uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { if (frequency == 0 || frequency > 6000000) { - mp_raise_ValueError("Invalid PWM frequency"); + mp_raise_ValueError(translate("Invalid PWM frequency")); } const pin_timer_t* t = self->timer; uint8_t resolution; @@ -375,7 +423,6 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, break; } } - uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self); if (t->is_tc) { Tc* tc = tc_insts[t->index]; uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; @@ -389,9 +436,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, tc->COUNT16.CC[0].reg = new_top; #endif #ifdef SAMD51 - while (tc->COUNT16.SYNCBUSY.reg != 0) { - /* Wait for sync */ - } + while (tc->COUNT16.SYNCBUSY.reg != 0) {} tc->COUNT16.CCBUF[0].reg = new_top; #endif } else { @@ -402,19 +447,17 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, tcc->CTRLA.bit.PRESCALER = new_divisor; tcc_set_enable(tcc, true); } + while (tcc->SYNCBUSY.reg != 0) {} tcc_periods[t->index] = new_top; #ifdef SAMD21 tcc->PERB.bit.PERB = new_top; #endif #ifdef SAMD51 - while (tcc->SYNCBUSY.reg != 0) { - /* Wait for sync */ - } tcc->PERBUF.bit.PERBUF = new_top; #endif } - common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty); + common_hal_pulseio_pwmout_set_duty_cycle(self, self->duty_cycle); } uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.h b/ports/atmel-samd/common-hal/pulseio/PWMOut.h index eef653bcb2da1..09abda8196b9f 100644 --- a/ports/atmel-samd/common-hal/pulseio/PWMOut.h +++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.h @@ -36,6 +36,7 @@ typedef struct { const mcu_pin_obj_t *pin; const pin_timer_t* timer; bool variable_frequency; + uint16_t duty_cycle; } pulseio_pwmout_obj_t; void pwmout_reset(void); diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 2dca52913a11c..a2494f102f47b 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2017-2018 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -31,110 +31,58 @@ #include "atmel_start_pins.h" #include "hal/include/hal_gpio.h" +#include "background.h" +#include "eic_handler.h" #include "mpconfigport.h" #include "py/gc.h" #include "py/runtime.h" -#include "samd21_pins.h" +#include "samd/external_interrupts.h" +#include "samd/pins.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/pulseio/PulseIn.h" - -#ifdef SAMD21 -#include "hpl/gclk/hpl_gclk_base.h" -#endif +#include "supervisor/shared/translate.h" #include "tick.h" -static pulseio_pulsein_obj_t *active_pulseins[EIC_EXTINT_NUM]; -static uint64_t last_ms[EIC_EXTINT_NUM]; -static uint16_t last_us[EIC_EXTINT_NUM]; - -bool eic_get_enable(void) { - #ifdef SAMD51 - return EIC->CTRLA.bit.ENABLE; - #endif - #ifdef SAMD21 - return EIC->CTRL.bit.ENABLE; - #endif -} - -void eic_set_enable(bool value) { - #ifdef SAMD51 - EIC->CTRLA.bit.ENABLE = value; - while (EIC->SYNCBUSY.bit.ENABLE != 0) {} - // This won't actually block long enough in Rev A of SAMD51 and will miss edges in the first - // three cycles of the peripheral clock. See the errata for details. It shouldn't impact us. - #endif - #ifdef SAMD21 - EIC->CTRL.bit.ENABLE = value; - while (EIC->STATUS.bit.SYNCBUSY != 0) {} - #endif -} - -void eic_reset(void) { - #ifdef SAMD51 - EIC->CTRLA.bit.SWRST = true; - while (EIC->SYNCBUSY.bit.SWRST != 0) {} - // This won't actually block long enough in Rev A of SAMD51 and will miss edges in the first - // three cycles of the peripheral clock. See the errata for details. It shouldn't impact us. - #endif - #ifdef SAMD21 - EIC->CTRL.bit.SWRST = true; - while (EIC->STATUS.bit.SYNCBUSY != 0) {} - #endif -} - -void pulsein_reset(void) { - for (int i = 0; i < EIC_EXTINT_NUM; i++) { - active_pulseins[i] = NULL; - last_ms[i] = 0; - last_us[i] = 0; - #ifdef SAMD51 - NVIC_DisableIRQ(EIC_0_IRQn + i); - NVIC_ClearPendingIRQ(EIC_0_IRQn + i); - #endif - } - eic_reset(); - #ifdef SAMD21 - NVIC_DisableIRQ(EIC_IRQn); - NVIC_ClearPendingIRQ(EIC_IRQn); - #endif -} - static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { - uint8_t sense_setting = EIC_CONFIG_FILTEN0; + uint32_t sense_setting; if (!first_edge) { - sense_setting |= EIC_CONFIG_SENSE0_BOTH_Val; + sense_setting = EIC_CONFIG_SENSE0_BOTH_Val; + configure_eic_channel(self->channel, sense_setting); + return; } else if (self->idle_state) { - sense_setting |= EIC_CONFIG_SENSE0_FALL_Val; + sense_setting = EIC_CONFIG_SENSE0_FALL_Val; } else { - sense_setting |= EIC_CONFIG_SENSE0_RISE_Val; + sense_setting = EIC_CONFIG_SENSE0_RISE_Val; } - eic_set_enable(false); - uint8_t config_index = self->channel / 8; - uint8_t position = (self->channel % 8) * 4; - uint32_t masked_value = EIC->CONFIG[config_index].reg & ~(0xf << position); - EIC->CONFIG[config_index].reg = masked_value | (sense_setting << position); - eic_set_enable(true); + set_eic_handler(self->channel, EIC_HANDLER_PULSEIN); + turn_on_eic_channel(self->channel, sense_setting); } -static void pulsein_interrupt_handler(uint8_t channel) { +void pulsein_interrupt_handler(uint8_t channel) { // Grab the current time first. uint32_t current_us; uint64_t current_ms; current_tick(¤t_ms, ¤t_us); + // current_tick gives us the remaining us until the next tick but we want the number since the // last ms. current_us = 1000 - current_us; - pulseio_pulsein_obj_t* self = active_pulseins[channel]; + pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); + if (!background_tasks_ok() || self->errored_too_fast) { + self->errored_too_fast = true; + common_hal_pulseio_pulsein_pause(self); + return; + } if (self->first_edge) { self->first_edge = false; pulsein_set_config(self, false); } else { - uint32_t ms_diff = current_ms - last_ms[self->channel]; - uint16_t us_diff = current_us - last_us[self->channel]; + uint32_t ms_diff = current_ms - self->last_ms; + uint16_t us_diff = current_us - self->last_us; uint32_t total_diff = us_diff; - if (last_us[self->channel] > current_us) { - total_diff = 1000 + current_us - last_us[self->channel]; + if (self->last_us > current_us) { + total_diff = 1000 + current_us - self->last_us; if (ms_diff > 1) { total_diff += (ms_diff - 1) * 1000; } @@ -154,76 +102,49 @@ static void pulsein_interrupt_handler(uint8_t channel) { self->start++; } } - last_ms[self->channel] = current_ms; - last_us[self->channel] = current_us; + self->last_ms = current_ms; + self->last_us = current_us; } void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { if (!pin->has_extint) { - mp_raise_RuntimeError("No hardware support on pin"); + mp_raise_RuntimeError(translate("No hardware support on pin")); } - uint32_t mask = 1 << pin->extint_channel; - if (active_pulseins[pin->extint_channel] != NULL || - (eic_get_enable() == 1 && -#ifdef SAMD51 - ((EIC->INTENSET.bit.EXTINT & mask) != 0 || - (EIC->EVCTRL.bit.EXTINTEO & mask) != 0))) { -#endif -#ifdef SAMD21 - ((EIC->INTENSET.vec.EXTINT & mask) != 0 || - (EIC->EVCTRL.vec.EXTINTEO & mask) != 0))) { -#endif - mp_raise_RuntimeError("EXTINT channel already in use"); + if (eic_get_enable() && !eic_channel_free(pin->extint_channel)) { + mp_raise_RuntimeError(translate("EXTINT channel already in use")); } self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); if (self->buffer == NULL) { - mp_raise_msg_varg(&mp_type_MemoryError, "Failed to allocate RX buffer of %d bytes", maxlen * sizeof(uint16_t)); + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); } self->channel = pin->extint_channel; - self->pin = pin->pin; + self->pin = pin->number; self->maxlen = maxlen; self->idle_state = idle_state; self->start = 0; self->len = 0; self->first_edge = true; + self->last_us = 0; + self->last_ms = 0; + self->errored_too_fast = false; - active_pulseins[pin->extint_channel] = self; + set_eic_channel_data(pin->extint_channel, (void*) self); // Check to see if the EIC is enabled and start it up if its not.' - // SAMD51 EIC can only be clocked up to 100mhz so we use the 48mhz clock. if (eic_get_enable() == 0) { - #ifdef SAMD51 - MCLK->APBAMASK.bit.EIC_ = true; - hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, - GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos)); - #endif - - #ifdef SAMD21 - PM->APBAMASK.bit.EIC_ = true; - _gclk_enable_channel(EIC_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); - #endif - - - #ifdef SAMD21 - NVIC_DisableIRQ(EIC_IRQn); - NVIC_ClearPendingIRQ(EIC_IRQn); - NVIC_EnableIRQ(EIC_IRQn); - #endif + turn_on_external_interrupt_controller(); } - gpio_set_pin_function(pin->pin, GPIO_PIN_FUNCTION_A); + gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_A); + + turn_on_cpu_interrupt(self->channel); - #ifdef SAMD51 - NVIC_DisableIRQ(EIC_0_IRQn + self->channel); - NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); - NVIC_EnableIRQ(EIC_0_IRQn + self->channel); - #endif + claim_pin(pin); // Set config will enable the EIC. pulsein_set_config(self, true); - EIC->INTENSET.reg = mask << EIC_INTENSET_EXTINT_Pos; } bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { @@ -234,39 +155,10 @@ void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { if (common_hal_pulseio_pulsein_deinited(self)) { return; } - uint32_t mask = 1 << self->channel; - EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; - #ifdef SAMD51 - NVIC_DisableIRQ(EIC_0_IRQn + self->channel); - NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); - #endif - active_pulseins[self->channel] = NULL; - reset_pin(self->pin); + set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); + turn_off_eic_channel(self->channel); + reset_pin_number(self->pin); self->pin = NO_PIN; - - bool all_null = true; - for (uint8_t i = 0; all_null && i < 16; i++) { - all_null = all_null && active_pulseins[i] == NULL; - } - #ifdef SAMD21 - if (all_null && EIC->INTENSET.reg == 0) { - NVIC_DisableIRQ(EIC_IRQn); - NVIC_ClearPendingIRQ(EIC_IRQn); - } - #endif - // Test if all channels are null and deinit everything if they are. - if (all_null && EIC->EVCTRL.reg == 0 && EIC->INTENSET.reg == 0) { - eic_set_enable(false); - #ifdef SAMD51 - MCLK->APBAMASK.bit.EIC_ = false; - hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, 0); - #endif - - #ifdef SAMD21 - PM->APBAMASK.bit.EIC_ = false; - hri_gclk_write_CLKCTRL_reg(GCLK, GCLK_CLKCTRL_ID(EIC_GCLK_ID)); - #endif - } } void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { @@ -279,22 +171,22 @@ void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, // Make sure we're paused. common_hal_pulseio_pulsein_pause(self); + // Reset erroring + self->errored_too_fast = false; + // Send the trigger pulse. if (trigger_duration > 0) { gpio_set_pin_pull_mode(self->pin, GPIO_PULL_OFF); gpio_set_pin_direction(self->pin, GPIO_DIRECTION_OUT); - - common_hal_mcu_disable_interrupts(); gpio_set_pin_level(self->pin, !self->idle_state); - common_hal_mcu_delay_us(trigger_duration); + common_hal_mcu_delay_us((uint32_t)trigger_duration); gpio_set_pin_level(self->pin, self->idle_state); - common_hal_mcu_enable_interrupts(); } // Reconfigure the pin and make sure its set to detect the first edge. - last_ms[self->channel] = 0; - last_us[self->channel] = 0; self->first_edge = true; + self->last_ms = 0; + self->last_us = 0; gpio_set_pin_function(self->pin, GPIO_PIN_FUNCTION_A); uint32_t mask = 1 << self->channel; // Clear previous interrupt state and re-enable it. @@ -313,7 +205,7 @@ void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { if (self->len == 0) { - mp_raise_IndexError("pop from an empty PulseIn"); + mp_raise_IndexError(translate("pop from an empty PulseIn")); } common_hal_mcu_disable_interrupts(); uint16_t value = self->buffer[self->start]; @@ -332,6 +224,11 @@ uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { return self->len; } +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { + uint32_t mask = 1 << self->channel; + return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; +} + uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index) { common_hal_mcu_disable_interrupts(); @@ -340,75 +237,9 @@ uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, } if (index < 0 || index >= self->len) { common_hal_mcu_enable_interrupts(); - mp_raise_IndexError("index out of range"); + mp_raise_IndexError(translate("index out of range")); } uint16_t value = self->buffer[(self->start + index) % self->maxlen]; common_hal_mcu_enable_interrupts(); return value; } - -void external_interrupt_handler(uint8_t channel) { - pulsein_interrupt_handler(channel); - EIC->INTFLAG.reg = (1 << channel) << EIC_INTFLAG_EXTINT_Pos; -} - -#ifdef SAMD21 -void EIC_Handler(void) { - for (uint8_t i = 0; i < 16; i++) { - if ((EIC->INTFLAG.vec.EXTINT & (1 << i)) != 0) { - external_interrupt_handler(i); - } - } -} -#endif - -#ifdef SAMD51 -void EIC_0_Handler(void) { - external_interrupt_handler(0); -} -void EIC_1_Handler(void) { - external_interrupt_handler(1); -} -void EIC_2_Handler(void) { - external_interrupt_handler(2); -} -void EIC_3_Handler(void) { - external_interrupt_handler(3); -} -void EIC_4_Handler(void) { - external_interrupt_handler(4); -} -void EIC_5_Handler(void) { - external_interrupt_handler(5); -} -void EIC_6_Handler(void) { - external_interrupt_handler(6); -} -void EIC_7_Handler(void) { - external_interrupt_handler(7); -} -void EIC_8_Handler(void) { - external_interrupt_handler(8); -} -void EIC_9_Handler(void) { - external_interrupt_handler(9); -} -void EIC_10_Handler(void) { - external_interrupt_handler(10); -} -void EIC_11_Handler(void) { - external_interrupt_handler(11); -} -void EIC_12_Handler(void) { - external_interrupt_handler(12); -} -void EIC_13_Handler(void) { - external_interrupt_handler(13); -} -void EIC_14_Handler(void) { - external_interrupt_handler(14); -} -void EIC_15_Handler(void) { - external_interrupt_handler(15); -} -#endif diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index e3af42e0a3456..f5326d9e5170d 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -41,8 +41,13 @@ typedef struct { volatile uint16_t start; volatile uint16_t len; volatile bool first_edge; + volatile uint64_t last_ms; + volatile uint16_t last_us; + volatile bool errored_too_fast; } pulseio_pulsein_obj_t; void pulsein_reset(void); +void pulsein_interrupt_handler(uint8_t channel); + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/atmel-samd/common-hal/pulseio/PulseOut.c b/ports/atmel-samd/common-hal/pulseio/PulseOut.c index 95b0bbee07267..8b8bc6dc684b8 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseOut.c @@ -31,11 +31,13 @@ #include "hal/include/hal_gpio.h" #include "mpconfigport.h" +#include "samd/pins.h" +#include "samd/timers.h" #include "py/gc.h" #include "py/runtime.h" -#include "samd21_pins.h" #include "shared-bindings/pulseio/PulseOut.h" -#include "timers.h" +#include "supervisor/shared/translate.h" +#include "timer_handler.h" // This timer is shared amongst all PulseOut objects under the assumption that // the code is single threaded. @@ -106,11 +108,12 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, } } if (tc == NULL) { - mp_raise_RuntimeError("All timers in use"); + mp_raise_RuntimeError(translate("All timers in use")); } pulseout_tc_index = index; + set_timer_handler(true, index, TC_HANDLER_PULSEOUT); // We use GCLK0 for SAMD21 and GCLK1 for SAMD51 because they both run at 48mhz making our // math the same across the boards. #ifdef SAMD21 @@ -138,7 +141,7 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, } refcount++; - self->pin = carrier->pin->pin; + self->pin = carrier->pin->number; PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; self->pincfg = &port_base->PINCFG[self->pin % 32]; @@ -174,7 +177,7 @@ void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { if (active_pincfg != NULL) { - mp_raise_RuntimeError("Another send is already active"); + mp_raise_RuntimeError(translate("Another send is already active")); } active_pincfg = self->pincfg; pulse_buffer = pulses; @@ -195,9 +198,7 @@ void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pu while(pulse_index < length) { // Do other things while we wait. The interrupts will handle sending the // signal. - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif + RUN_BACKGROUND_TASKS; } tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; diff --git a/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c new file mode 100644 index 0000000000000..0922718f9624c --- /dev/null +++ b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c @@ -0,0 +1,171 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/rotaryio/IncrementalEncoder.h" + +#include "atmel_start_pins.h" + +#include "eic_handler.h" +#include "samd/external_interrupts.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t* self, + const mcu_pin_obj_t* pin_a, const mcu_pin_obj_t* pin_b) { + if (!pin_a->has_extint || !pin_b->has_extint) { + mp_raise_RuntimeError(translate("Both pins must support hardware interrupts")); + } + + // TODO: The SAMD51 has a peripheral dedicated to quadrature encoder debugging. Use it instead + // of the external interrupt. + + if (eic_get_enable()) { + if (!eic_channel_free(pin_a->extint_channel) || !eic_channel_free(pin_b->extint_channel)) { + mp_raise_RuntimeError(translate("A hardware interrupt channel is already in use")); + } + } else { + turn_on_external_interrupt_controller(); + } + + // These default settings apply when the EIC isn't yet enabled. + self->eic_channel_a = pin_a->extint_channel; + self->eic_channel_b = pin_b->extint_channel; + self->pin_a = pin_a->number; + self->pin_b = pin_b->number; + + gpio_set_pin_function(self->pin_a, GPIO_PIN_FUNCTION_A); + gpio_set_pin_pull_mode(self->pin_a, GPIO_PULL_UP); + + gpio_set_pin_function(self->pin_b, GPIO_PIN_FUNCTION_A); + gpio_set_pin_pull_mode(self->pin_b, GPIO_PULL_UP); + + set_eic_channel_data(self->eic_channel_a, (void*) self); + set_eic_channel_data(self->eic_channel_b, (void*) self); + + self->position = 0; + self->quarter_count = 0; + + // Top two bits of self->last_state don't matter, because they'll be gone as soon as + // interrupt handler is called. + self->last_state = + ((uint8_t) gpio_get_pin_level(self->pin_a) << 1) | + (uint8_t) gpio_get_pin_level(self->pin_b); + + claim_pin(pin_a); + claim_pin(pin_b); + + set_eic_handler(self->eic_channel_a, EIC_HANDLER_INCREMENTAL_ENCODER); + turn_on_eic_channel(self->eic_channel_a, EIC_CONFIG_SENSE0_BOTH_Val); + + set_eic_handler(self->eic_channel_b, EIC_HANDLER_INCREMENTAL_ENCODER); + turn_on_eic_channel(self->eic_channel_b, EIC_CONFIG_SENSE0_BOTH_Val); +} + +bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t* self) { + return self->pin_a == NO_PIN; +} + +void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t* self) { + if (common_hal_rotaryio_incrementalencoder_deinited(self)) { + return; + } + + set_eic_handler(self->eic_channel_a, EIC_HANDLER_NO_INTERRUPT); + turn_off_eic_channel(self->eic_channel_a); + + set_eic_handler(self->eic_channel_b, EIC_HANDLER_NO_INTERRUPT); + turn_off_eic_channel(self->eic_channel_b); + + reset_pin_number(self->pin_a); + self->pin_a = NO_PIN; + + reset_pin_number(self->pin_b); + self->pin_b = NO_PIN; +} + +mp_int_t common_hal_rotaryio_incrementalencoder_get_position(rotaryio_incrementalencoder_obj_t* self) { + return self->position; +} + +void common_hal_rotaryio_incrementalencoder_set_position(rotaryio_incrementalencoder_obj_t* self, + mp_int_t new_position) { + self->position = new_position; +} + +void incrementalencoder_interrupt_handler(uint8_t channel) { + rotaryio_incrementalencoder_obj_t* self = get_eic_channel_data(channel); + + // This table also works for detent both at 11 and 00 + // For 11 at detent: + // Turning cw: 11->01->00->10->11 + // Turning ccw: 11->10->00->01->11 + // For 00 at detent: + // Turning cw: 00->10->11->10->00 + // Turning ccw: 00->01->11->10->00 + + // index table by state + #define BAD 7 + static const int8_t transitions[16] = { + 0, // 00 -> 00 no movement + -1, // 00 -> 01 3/4 ccw (11 detent) or 1/4 ccw (00 at detent) + +1, // 00 -> 10 3/4 cw or 1/4 cw + BAD, // 00 -> 11 non-Gray-code transition + +1, // 01 -> 00 2/4 or 4/4 cw + 0, // 01 -> 01 no movement + BAD, // 01 -> 10 non-Gray-code transition + -1, // 01 -> 11 4/4 or 2/4 ccw + -1, // 10 -> 00 2/4 or 4/4 ccw + BAD, // 10 -> 01 non-Gray-code transition + 0, // 10 -> 10 no movement + +1, // 10 -> 11 4/4 or 2/4 cw + BAD, // 11 -> 00 non-Gray-code transition + +1, // 11 -> 01 1/4 or 3/4 cw + -1, // 11 -> 10 1/4 or 3/4 ccw + 0, // 11 -> 11 no movement + }; + + // Shift the old AB bits to the "old" position, and set the new AB bits. + // TODO(tannewt): If we need more speed then read the pin directly. gpio_get_pin_level has + // smarts to compensate for pin direction we don't need. + self->last_state = (self->last_state & 0x3) << 2 | + ((uint8_t) gpio_get_pin_level(self->pin_a) << 1) | + (uint8_t) gpio_get_pin_level(self->pin_b); + + int8_t quarter_incr = transitions[self->last_state]; + if (quarter_incr == BAD) { + // Missed a transition. We don't know which way we're going, so do nothing. + return; + } + + self->quarter_count += quarter_incr; + if (self->quarter_count >= 4) { + self->position += 1; + self->quarter_count = 0; + } else if (self->quarter_count <= -4) { + self->position -= 1; + self->quarter_count = 0; + } +} diff --git a/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.h b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.h new file mode 100644 index 0000000000000..e07cc84d5daef --- /dev/null +++ b/ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t pin_a; + uint8_t pin_b; + uint8_t eic_channel_a:4; + uint8_t eic_channel_b:4; + uint8_t last_state:4; // + int8_t quarter_count:4; // count intermediate transitions between detents + mp_int_t position; +} rotaryio_incrementalencoder_obj_t; + + +void incrementalencoder_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H diff --git a/ports/atmel-samd/common-hal/rotaryio/__init__.c b/ports/atmel-samd/common-hal/rotaryio/__init__.c new file mode 100644 index 0000000000000..0aae79c26a1c7 --- /dev/null +++ b/ports/atmel-samd/common-hal/rotaryio/__init__.c @@ -0,0 +1 @@ +// No rotaryio module functions. diff --git a/ports/atmel-samd/common-hal/rtc/RTC.c b/ports/atmel-samd/common-hal/rtc/RTC.c new file mode 100644 index 0000000000000..4c888418b6a66 --- /dev/null +++ b/ports/atmel-samd/common-hal/rtc/RTC.c @@ -0,0 +1,105 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include +#include +#include +#include +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "supervisor/shared/translate.h" + +static struct calendar_descriptor calendar; + +void rtc_init(void) { +#ifdef SAMD21 + _gclk_enable_channel(RTC_GCLK_ID, CONF_GCLK_RTC_SRC); +#endif +#ifdef SAMD51 + hri_mclk_set_APBAMASK_RTC_bit(MCLK); +#endif + calendar_init(&calendar, RTC); + calendar_set_baseyear(&calendar, 2000); + calendar_enable(&calendar); +} + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + struct calendar_date_time datetime; + calendar_get_date_time(&calendar, &datetime); + + tm->tm_year = datetime.date.year; + tm->tm_mon = datetime.date.month; + tm->tm_mday = datetime.date.day; + tm->tm_hour = datetime.time.hour; + tm->tm_min = datetime.time.min; + tm->tm_sec = datetime.time.sec; +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + // Reset prescaler to increase initial precision. Otherwise we can be up to 1 second off already. + uint32_t freqcorr = hri_rtcmode0_read_FREQCORR_reg(calendar.device.hw); + calendar_deinit(&calendar); + rtc_init(); + hri_rtcmode0_write_FREQCORR_reg(calendar.device.hw, freqcorr); + + struct calendar_date date = { + .year = tm->tm_year, + .month = tm->tm_mon, + .day = tm->tm_mday, + }; + calendar_set_date(&calendar, &date); + + struct calendar_time time = { + .hour = tm->tm_hour, + .min = tm->tm_min, + .sec = tm->tm_sec, + }; + calendar_set_time(&calendar, &time); +} + +// A positive value speeds up the clock by removing clock cycles. +int common_hal_rtc_get_calibration(void) { + int calibration = hri_rtcmode0_read_FREQCORR_VALUE_bf(calendar.device.hw); + + if (!hri_rtcmode0_get_FREQCORR_SIGN_bit(calendar.device.hw)) + calibration = -calibration; + + return calibration; +} + +void common_hal_rtc_set_calibration(int calibration) { + if (calibration > 127 || calibration < -127) + mp_raise_ValueError(translate("calibration value out of range +/-127")); + + hri_rtcmode0_write_FREQCORR_SIGN_bit(calendar.device.hw, calibration < 0 ? 0 : 1); + hri_rtcmode0_write_FREQCORR_VALUE_bf(calendar.device.hw, abs(calibration)); +} diff --git a/ports/atmel-samd/common-hal/rtc/RTC.h b/ports/atmel-samd/common-hal/rtc/RTC.h new file mode 100644 index 0000000000000..1d63b2deac2bc --- /dev/null +++ b/ports/atmel-samd/common-hal/rtc/RTC.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H diff --git a/ports/atmel-samd/common-hal/rtc/__init__.c b/ports/atmel-samd/common-hal/rtc/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/ports/atmel-samd/common-hal/storage/__init__.c b/ports/atmel-samd/common-hal/storage/__init__.c deleted file mode 100644 index c4cb83142731f..0000000000000 --- a/ports/atmel-samd/common-hal/storage/__init__.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "flash_api.h" -#include "py/mperrno.h" -#include "py/runtime.h" -#include "shared-bindings/storage/__init__.h" -#include "usb.h" - -extern volatile bool mp_msc_enabled; - -void common_hal_storage_remount(const char* mount_path, bool readonly) { - if (strcmp(mount_path, "/") != 0) { - mp_raise_OSError(MP_EINVAL); - } - - // TODO(dhalbert): is this is a good enough check? It checks for - // CDC enabled. There is no "MSC enabled" check. - if (usb_connected()) { - mp_raise_RuntimeError("Cannot remount '/' when USB is active."); - } - - flash_set_usb_writable(readonly); -} diff --git a/ports/atmel-samd/common-hal/supervisor/Runtime.c b/ports/atmel-samd/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000000..6be38f216ac16 --- /dev/null +++ b/ports/atmel-samd/common-hal/supervisor/Runtime.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} diff --git a/ports/atmel-samd/common-hal/supervisor/Runtime.h b/ports/atmel-samd/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000000..f3d76d1b68002 --- /dev/null +++ b/ports/atmel-samd/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/atmel-samd/common-hal/supervisor/__init__.c b/ports/atmel-samd/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000000..ac88556b45da4 --- /dev/null +++ b/ports/atmel-samd/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/atmel-samd/common-hal/time/__init__.c b/ports/atmel-samd/common-hal/time/__init__.c index 0d60adef20c42..652e455fc4b84 100644 --- a/ports/atmel-samd/common-hal/time/__init__.c +++ b/ports/atmel-samd/common-hal/time/__init__.c @@ -28,10 +28,19 @@ #include "shared-bindings/time/__init__.h" +#include "supervisor/shared/tick.h" #include "tick.h" -inline uint64_t common_hal_time_monotonic() { - return ticks_ms; +inline uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); } void common_hal_time_delay_ms(uint32_t delay) { diff --git a/ports/atmel-samd/common-hal/touchio/TouchIn.c b/ports/atmel-samd/common-hal/touchio/TouchIn.c index 6bb96ff00e9e9..908d8d72285b5 100644 --- a/ports/atmel-samd/common-hal/touchio/TouchIn.c +++ b/ports/atmel-samd/common-hal/touchio/TouchIn.c @@ -32,20 +32,27 @@ #include "py/binary.h" #include "py/mphal.h" #include "shared-bindings/touchio/TouchIn.h" +#include "supervisor/shared/translate.h" -#include "samd21_pins.h" -#include "tick.h" +// Native touchio only exists for SAMD21 +#ifdef SAMD21 + +#include "hpl/pm/hpl_pm_base.h" +#include "samd/clocks.h" +#include "samd/pins.h" + +#include "tick.h" #include "adafruit_ptc.h" +bool touch_enabled = false; + static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { adafruit_ptc_start_conversion(PTC, &self->config); while (!adafruit_ptc_is_conversion_finished(PTC)) { // wait - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif + RUN_BACKGROUND_TASKS; } return adafruit_ptc_get_conversion_result(PTC); @@ -54,20 +61,27 @@ static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, const mcu_pin_obj_t *pin) { if (!pin->has_touch) { - mp_raise_ValueError("Invalid pin"); + mp_raise_ValueError(translate("Invalid pin")); } claim_pin(pin); - /* Setup and enable generic clock source for PTC module. */ - struct system_gclk_chan_config gclk_chan_conf; - system_gclk_chan_get_config_defaults(&gclk_chan_conf); - gclk_chan_conf.source_generator = GCLK_GENERATOR_3; - system_gclk_chan_set_config(PTC_GCLK_ID, &gclk_chan_conf); - system_gclk_chan_enable(PTC_GCLK_ID); - system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_PTC); + // Turn on the PTC if its not in use. We won't turn it off until reset. + if ((( Ptc *) PTC)->CTRLA.bit.ENABLE == 0) { + // We run the PTC at 8mhz so divide the 48mhz clock by 6. + uint8_t gclk = find_free_gclk(6); + if (gclk > GCLK_GEN_NUM) { + mp_raise_RuntimeError(translate("No free GCLKs")); + } + enable_clock_generator(gclk, CLOCK_48MHZ, 6); + + /* Setup and enable generic clock source for PTC module. */ + connect_gclk_to_peripheral(gclk, PTC_GCLK_ID); + + _pm_enable_bus_clock(PM_BUS_APBC, PTC); + } adafruit_ptc_get_config_default(&self->config); - self->config.pin = pin->pin; + self->config.pin = pin->number; self->config.yline = pin->touch_y_line; adafruit_ptc_init(PTC, &self->config); @@ -91,12 +105,21 @@ void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { if (common_hal_touchio_touchin_deinited(self)) { return; } - reset_pin(self->config.pin); + // We leave the clocks running because they may be in use by others. + + reset_pin_number(self->config.pin); self->config.pin = NO_PIN; } void touchin_reset() { - // TODO(tannewt): Reset the PTC. + Ptc* ptc = ((Ptc *) PTC); + if (ptc->CTRLA.bit.ENABLE == 1) { + ptc->CTRLA.bit.ENABLE = 0; + while (ptc->CTRLA.bit.ENABLE == 1) {} + + ptc->CTRLA.bit.SWRESET = 1; + while (ptc->CTRLA.bit.SWRESET == 1) {} + } } bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) { @@ -115,3 +138,5 @@ uint16_t common_hal_touchio_touchin_get_threshold(touchio_touchin_obj_t *self) { void common_hal_touchio_touchin_set_threshold(touchio_touchin_obj_t *self, uint16_t new_threshold) { self->threshold = new_threshold; } + +#endif // SAMD21 diff --git a/ports/atmel-samd/common-hal/touchio/TouchIn.h b/ports/atmel-samd/common-hal/touchio/TouchIn.h index ffe8a6c017a44..85550b8a3a2e6 100644 --- a/ports/atmel-samd/common-hal/touchio/TouchIn.h +++ b/ports/atmel-samd/common-hal/touchio/TouchIn.h @@ -27,6 +27,9 @@ #ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_TOUCHIO_TOUCHIN_H #define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_TOUCHIO_TOUCHIN_H +// Native touchio only exists for SAMD21 +#ifdef SAMD21 + #include "common-hal/microcontroller/Pin.h" #include "samd21_ptc_component.h" @@ -42,4 +45,6 @@ typedef struct { void touchin_reset(void); +#endif // SAMD21 + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_TOUCHIO_TOUCHIN_H diff --git a/ports/atmel-samd/common-hal/usb_hid/Device.c b/ports/atmel-samd/common-hal/usb_hid/Device.c deleted file mode 100644 index 443a67f8ed31a..0000000000000 --- a/ports/atmel-samd/common-hal/usb_hid/Device.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/nlr.h" -#include "common-hal/usb_hid/__init__.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/usb_hid/Device.h" - -static void report_sent(udd_ep_status_t status, iram_size_t nb_sent, - udd_ep_id_t ep) { - UNUSED(status); - UNUSED(nb_sent); - for (uint8_t i = 0; i < 2; i++) { - if (ep == usb_hid_devices[i].endpoint) { - usb_hid_devices[i].transaction_ongoing = false; - return; - } - } -} - -bool usb_hid_send_report(usb_hid_device_obj_t *self, uint8_t* report, uint8_t len) { - if (!self->enabled) { - return true; - } - // Wait for the previous transaction to finish. Shouldn't happen. - uint32_t timeout = 0xffff; - - while (self->transaction_ongoing && timeout > 0) { - timeout--; - } - - if (self->transaction_ongoing) { - return false; - } - - memcpy(self->report_buffer, report, len); - - // Disable interrupts to make sure we save the ongoing state before the - // report_sent interrupt. - common_hal_mcu_disable_interrupts(); - bool ok = udd_ep_run(self->endpoint, false, - self->report_buffer, self->report_length, report_sent); - self->transaction_ongoing = ok; - common_hal_mcu_enable_interrupts(); - return ok; -} - -void common_hal_usb_hid_device_send_report(usb_hid_device_obj_t *self, uint8_t* report, uint8_t len) { - if (len != self->report_length) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Buffer incorrect size. Should be %d bytes.", self->report_length)); - } - if (!self->enabled) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "USB Inactive")); - } - if (!usb_hid_send_report(self, report, len)) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "USB Busy")); - } -} - -uint8_t common_hal_usb_hid_device_get_usage_page(usb_hid_device_obj_t *self) { - return self->usage_page; -} - -uint8_t common_hal_usb_hid_device_get_usage(usb_hid_device_obj_t *self) { - return self->usage; -} diff --git a/ports/atmel-samd/common-hal/usb_hid/Device.h b/ports/atmel-samd/common-hal/usb_hid/Device.h deleted file mode 100644 index 1b313f9ceba62..0000000000000 --- a/ports/atmel-samd/common-hal/usb_hid/Device.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef COMMON_HAL_USB_HID_DEVICE_H -#define COMMON_HAL_USB_HID_DEVICE_H - -#include -#include - -#include "common-hal/usb_hid/types.h" - -bool usb_hid_send_report(usb_hid_device_obj_t *self, uint8_t* report, uint8_t len); - -#endif // COMMON_HAL_USB_HID_DEVICE_H diff --git a/ports/atmel-samd/common-hal/usb_hid/__init__.c b/ports/atmel-samd/common-hal/usb_hid/__init__.c deleted file mode 100644 index 5fa704cf839b8..0000000000000 --- a/ports/atmel-samd/common-hal/usb_hid/__init__.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/mphal.h" -#include "py/runtime.h" - -#include "common-hal/usb_hid/__init__.h" -#include "common-hal/usb_hid/Device.h" -#include "common-hal/usb_hid/types.h" - -#include "shared-bindings/usb_hid/__init__.h" -#include "shared-bindings/usb_hid/Device.h" - -#define UDI_HID_MOUSE_REPORT_SIZE 4 -#define UDI_HID_KBD_REPORT_SIZE 8 - -uint8_t mouse_report_buffer[UDI_HID_MOUSE_REPORT_SIZE]; -uint8_t kbd_report_buffer[UDI_HID_KBD_REPORT_SIZE]; - -usb_hid_device_obj_t usb_hid_devices[2] = { - { - .endpoint = UDI_HID_MOUSE_EP_IN, - .report_length = UDI_HID_MOUSE_REPORT_SIZE, - .report_buffer = mouse_report_buffer, - .usage_page = 0x01, - .usage = 0x02, - .enabled = false, - .transaction_ongoing = false - }, - { - .endpoint = UDI_HID_KBD_EP_IN, - .report_length = UDI_HID_KBD_REPORT_SIZE, - .report_buffer = kbd_report_buffer, - .usage_page = 0x01, - .usage = 0x06, - .enabled = false, - .transaction_ongoing = false - } -}; - -// TODO(tannewt): Make this a mp_obj_tuple_t when it is dynamically allocated. -// until then we hard code it to two entries so LTO is happy. -mp_obj_tuple2_t common_hal_usb_hid_devices = { - .base = { - .type = &mp_type_tuple, - }, - .len = 2, - .items = { - (mp_obj_t) &usb_hid_devices[0], - (mp_obj_t) &usb_hid_devices[1] - } -}; - -void usb_hid_init() { - usb_hid_devices[0].base.type = &usb_hid_device_type; - usb_hid_devices[1].base.type = &usb_hid_device_type; -} - -void usb_hid_reset() { - // We don't actually reset. We just set a report that is empty to prevent - // long keypresses and such. - uint8_t report[8] = {0, 0, 0, 0, 0, 0, 0, 0}; - - usb_hid_send_report(&usb_hid_devices[0], report, 4); - usb_hid_send_report(&usb_hid_devices[1], report, 8); -} - -bool mp_mouse_enable(void) -{ - usb_hid_devices[0].enabled = true; - return true; -} - -void mp_mouse_disable(void) -{ - usb_hid_devices[0].enabled = false; -} - -bool mp_keyboard_enable(void) -{ - usb_hid_devices[1].enabled = true; - return true; -} - -void mp_keyboard_disable(void) -{ - usb_hid_devices[1].enabled = false; -} - -void mp_keyboard_led(uint8_t leds) -{ - UNUSED(leds); -} diff --git a/ports/atmel-samd/common-hal/usb_hid/__init__.h b/ports/atmel-samd/common-hal/usb_hid/__init__.h deleted file mode 100644 index 21f629f137287..0000000000000 --- a/ports/atmel-samd/common-hal/usb_hid/__init__.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef COMMON_HAL_USB_HID_H -#define COMMON_HAL_USB_HID_H - -#include -#include - -#include "common-hal/usb_hid/types.h" - -usb_hid_device_obj_t usb_hid_devices[2]; - -void usb_hid_init(void); -void usb_hid_reset(void); - -#endif // COMMON_HAL_USB_HID_H diff --git a/ports/atmel-samd/common-hal/usb_hid/types.h b/ports/atmel-samd/common-hal/usb_hid/types.h deleted file mode 100644 index c276ebd0de8c1..0000000000000 --- a/ports/atmel-samd/common-hal/usb_hid/types.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_COMMON_HAL_USB_HID_TYPES_H -#define MICROPY_INCLUDED_COMMON_HAL_USB_HID_TYPES_H - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - udd_ep_id_t endpoint; - volatile bool transaction_ongoing; - volatile bool enabled; - uint8_t report_length; - uint8_t* report_buffer; - uint8_t usage_page; - uint8_t usage; -} usb_hid_device_obj_t; - -#endif // MICROPY_INCLUDED_COMMON_HAL_USB_HID_TYPES_H diff --git a/ports/atmel-samd/eic_handler.c b/ports/atmel-samd/eic_handler.c new file mode 100644 index 0000000000000..30ecaa7cae27b --- /dev/null +++ b/ports/atmel-samd/eic_handler.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/ps2io/Ps2.h" +#include "common-hal/rotaryio/IncrementalEncoder.h" +#include "shared-bindings/microcontroller/__init__.h" +//#include "samd/external_interrupts.h" +#include "eic_handler.h" + +// Which handler should be called for a particular channel? +static uint8_t eic_channel_handler[EIC_EXTINT_NUM]; + +void set_eic_handler(uint8_t channel, uint8_t eic_handler) { + eic_channel_handler[channel] = eic_handler; +} + +void shared_eic_handler(uint8_t channel) { + uint8_t handler = eic_channel_handler[channel]; + switch (handler) { +#if CIRCUITPY_PULSEIO + case EIC_HANDLER_PULSEIN: + pulsein_interrupt_handler(channel); + break; +#endif + +#if CIRCUITPY_PS2IO + case EIC_HANDLER_PS2: + ps2_interrupt_handler(channel); + break; +#endif + +#if CIRCUITPY_ROTARYIO + case EIC_HANDLER_INCREMENTAL_ENCODER: + incrementalencoder_interrupt_handler(channel); + break; +#endif + + default: + break; + } +} diff --git a/ports/atmel-samd/eic_handler.h b/ports/atmel-samd/eic_handler.h new file mode 100644 index 0000000000000..71b0fce678bb2 --- /dev/null +++ b/ports/atmel-samd/eic_handler.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EIC_HANDLER_H +#define MICROPY_INCLUDED_ATMEL_SAMD_EIC_HANDLER_H + +#define EIC_HANDLER_NO_INTERRUPT 0x0 +#define EIC_HANDLER_PULSEIN 0x1 +#define EIC_HANDLER_INCREMENTAL_ENCODER 0x2 +#define EIC_HANDLER_PS2 0x3 + +void set_eic_handler(uint8_t channel, uint8_t eic_handler); +void shared_eic_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_EIC_HANDLER_H diff --git a/ports/atmel-samd/external_flash/devices.h b/ports/atmel-samd/external_flash/devices.h deleted file mode 100644 index d8baf5aca02ad..0000000000000 --- a/ports/atmel-samd/external_flash/devices.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H -#define MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H - -#include -#include - -typedef struct { - uint32_t total_size; - uint16_t start_up_time_us; - - // Three response bytes to 0x9f JEDEC ID command. - uint8_t manufacturer_id; - uint8_t memory_type; - uint8_t capacity; - - // Max clock speed for all operations and the fastest read mode. - uint8_t max_clock_speed_mhz; - bool has_sector_protection : 1; - - // Supports the 0x0b fast read command with 8 dummy cycles. - bool supports_fast_read : 1; - - // Supports the fast read, quad output command 0x6b with 8 dummy cycles. - bool supports_qspi : 1; - - // Requires quad enable set in status bit 9. - bool has_quad_enable : 1; - - // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only - // uses all four lines for data. - bool supports_qspi_writes: 1; -} external_flash_device; - -// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. Its on the SAMD21 -// Xplained board. -// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf -#define AT25DF081A {\ - .total_size = (1 << 20), /* 1 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x1f, \ - .memory_type = 0x45, \ - .capacity = 0x01, \ - .max_clock_speed_mhz = 85, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .has_quad_enable = false, \ - .supports_qspi_writes = false, \ -} - -// Settings for the Gigadevice GD25Q16C 2MiB SPI flash. -// Datasheet: http://www.gigadevice.com/wp-content/uploads/2017/12/DS-00086-GD25Q16C-Rev2.6.pdf -#define GD25Q16C {\ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc8, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = true, \ -} - -// Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash. -// Datasheet: http://www.cypress.com/file/316661/download -#define S25FL064L {\ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 300, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x60, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 108, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = true, \ -} - -// Settings for the Cypress (was Spansion) S25FL116K 2MiB SPI flash. -// Datasheet: http://www.cypress.com/file/196886/download -#define S25FL116K {\ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 108, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = false, \ -} - -// Settings for the Cypress (was Spansion) S25FL216K 2MiB SPI flash. -// Datasheet: http://www.cypress.com/file/197346/download -#define S25FL216K {\ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 65, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .has_quad_enable = false, \ - .supports_qspi_writes = false, \ -} - -// Settings for the Winbond W25Q16FW 2MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q16fw%20revj%2005182017%20sfdp.pdf -#define W25Q16FW {\ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 133, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = true, \ -} - -// Settings for the Winbond W25Q16JV 2MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf -#define W25Q16JV {\ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 133, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = true, \ -} - -// Settings for the Winbond W25Q32BV 4MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf -#define W25Q32BV {\ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 104, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = false, \ -} - -// Settings for the Winbond W25Q80DL 1MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf -#define W25Q80DL {\ - .total_size = (1 << 20), /* 1 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x14, \ - .max_clock_speed_mhz = 104, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .has_quad_enable = true, \ - .supports_qspi_writes = false, \ -} - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H diff --git a/ports/atmel-samd/external_flash/external_flash.c b/ports/atmel-samd/external_flash/external_flash.c deleted file mode 100644 index ccc47e5b144cd..0000000000000 --- a/ports/atmel-samd/external_flash/external_flash.c +++ /dev/null @@ -1,677 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "external_flash.h" - -#include -#include - -#include "external_flash/spi_flash_api.h" -#include "external_flash/common_commands.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "py/misc.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "peripherals.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "supervisor/shared/rgb_led_status.h" - -//#include "shared_dma.h" - -#include "hal_gpio.h" -#include "hal_spi_m_sync.h" - -#define SPI_FLASH_PART1_START_BLOCK (0x1) - -#define NO_SECTOR_LOADED 0xFFFFFFFF - -struct spi_m_sync_descriptor spi_flash_desc; - -// The currently cached sector in the cache, ram or flash based. -static uint32_t current_sector; - -const external_flash_device possible_devices[EXTERNAL_FLASH_DEVICE_COUNT] = {EXTERNAL_FLASH_DEVICES}; - -static const external_flash_device* flash_device = NULL; - -// Track which blocks (up to 32) in the current sector currently live in the -// cache. -static uint32_t dirty_mask; - -// Wait until both the write enable and write in progress bits have cleared. -static bool wait_for_flash_ready(void) { - uint8_t read_status_response[1] = {0x00}; - bool ok = true; - // Both the write enable and write in progress bits should be low. - do { - ok = spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); - } while (ok && (read_status_response[0] & 0x3) != 0); - return ok; -} - -// Turn on the write enable bit so we can program and erase the flash. -static bool write_enable(void) { - return spi_flash_command(CMD_ENABLE_WRITE); -} - -// Read data_length's worth of bytes starting at address into data. -static bool read_flash(uint32_t address, uint8_t* data, uint32_t data_length) { - if (flash_device == NULL) { - return false; - } - if (!wait_for_flash_ready()) { - return false; - } - return spi_flash_read_data(address, data, data_length); -} - -// Writes data_length's worth of bytes starting at address from data. Assumes -// that the sector that address resides in has already been erased. So make sure -// to run erase_sector. -static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_length) { - if (flash_device == NULL) { - return false; - } - // Don't bother writing if the data is all 1s. Thats equivalent to the flash - // state after an erase. - bool all_ones = true; - for (uint16_t i = 0; i < data_length; i++) { - if (data[i] != 0xff) { - all_ones = false; - break; - } - } - if (all_ones) { - return true; - } - - for (uint32_t bytes_written = 0; - bytes_written < data_length; - bytes_written += SPI_FLASH_PAGE_SIZE) { - if (!wait_for_flash_ready() || !write_enable()) { - return false; - } - - if (!spi_flash_write_data(address + bytes_written, (uint8_t*) data + bytes_written, - SPI_FLASH_PAGE_SIZE)) { - return false; - } - } - return true; -} - -static bool page_erased(uint32_t sector_address) { - // Check the first few bytes to catch the common case where there is data - // without using a bunch of memory. - uint8_t short_buffer[4]; - if (read_flash(sector_address, short_buffer, 4)) { - for (uint16_t i = 0; i < 4; i++) { - if (short_buffer[i] != 0xff) { - return false; - } - } - } else { - return false; - } - - // Now check the full length. - uint8_t full_buffer[FILESYSTEM_BLOCK_SIZE]; - if (read_flash(sector_address, full_buffer, FILESYSTEM_BLOCK_SIZE)) { - for (uint16_t i = 0; i < FILESYSTEM_BLOCK_SIZE; i++) { - if (short_buffer[i] != 0xff) { - return false; - } - } - } else { - return false; - } - return true; -} - -// Erases the given sector. Make sure you copied all of the data out of it you -// need! Also note, sector_address is really 24 bits. -static bool erase_sector(uint32_t sector_address) { - // Before we erase the sector we need to wait for any writes to finish and - // and then enable the write again. - if (!wait_for_flash_ready() || !write_enable()) { - return false; - } - - spi_flash_sector_command(CMD_SECTOR_ERASE, sector_address); - return true; -} - -// Sector is really 24 bits. -static bool copy_block(uint32_t src_address, uint32_t dest_address) { - // Copy page by page to minimize RAM buffer. - uint16_t page_size = SPI_FLASH_PAGE_SIZE; - uint8_t buffer[page_size]; - for (uint32_t i = 0; i < FILESYSTEM_BLOCK_SIZE / page_size; i++) { - if (!read_flash(src_address + i * page_size, buffer, page_size)) { - return false; - } - if (!write_flash(dest_address + i * page_size, buffer, page_size)) { - return false; - } - } - return true; -} - -void external_flash_init(void) { - if (flash_device != NULL) { - return; - } - - // Delay to give the SPI Flash time to get going. - // TODO(tannewt): Only do this when we know power was applied vs a reset. - uint16_t max_start_up_delay_us = 0; - for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { - if (possible_devices[i].start_up_time_us > max_start_up_delay_us) { - max_start_up_delay_us = possible_devices[i].start_up_time_us; - } - } - common_hal_mcu_delay_us(max_start_up_delay_us); - - spi_flash_init(); - - // The response will be 0xff if the flash needs more time to start up. - uint8_t jedec_id_response[3] = {0xff, 0xff, 0xff}; - while (jedec_id_response[0] == 0xff) { - spi_flash_read_command(CMD_READ_JEDEC_ID, jedec_id_response, 3); - } - - for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { - const external_flash_device* possible_device = &possible_devices[i]; - if (jedec_id_response[0] == possible_device->manufacturer_id && - jedec_id_response[1] == possible_device->memory_type && - jedec_id_response[2] == possible_device->capacity) { - flash_device = possible_device; - break; - } - } - - if (flash_device == NULL) { - return; - } - - // We don't know what state the flash is in so wait for any remaining writes and then reset. - uint8_t read_status_response[1] = {0x00}; - // The write in progress bit should be low. - do { - spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); - } while ((read_status_response[0] & 0x1) != 0); - // The suspended write/erase bit should be low. - do { - spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1); - } while ((read_status_response[0] & 0x80) != 0); - - - spi_flash_command(CMD_ENABLE_RESET); - spi_flash_command(CMD_RESET); - - // Wait 30us for the reset - common_hal_mcu_delay_us(30); - - spi_flash_init_device(flash_device); - - // Activity LED for flash writes. -#ifdef MICROPY_HW_LED_MSC - gpio_set_pin_function(SPI_FLASH_CS_PIN, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(MICROPY_HW_LED_MSC, GPIO_DIRECTION_OUT); - // There's already a pull-up on the board. - gpio_set_pin_level(MICROPY_HW_LED_MSC, false); -#endif - - if (flash_device->has_sector_protection) { - write_enable(); - - // Turn off sector protection - uint8_t data[1] = {0x00}; - spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, data, 1); - } - - // Turn off writes in case this is a microcontroller only reset. - spi_flash_command(CMD_DISABLE_WRITE); - - wait_for_flash_ready(); - - current_sector = NO_SECTOR_LOADED; - dirty_mask = 0; - MP_STATE_VM(flash_ram_cache) = NULL; -} - -// The size of each individual block. -uint32_t external_flash_get_block_size(void) { - return FILESYSTEM_BLOCK_SIZE; -} - -// The total number of available blocks. -uint32_t external_flash_get_block_count(void) { - // We subtract one erase sector size because we may use it as a staging area - // for writes. - return SPI_FLASH_PART1_START_BLOCK + (flash_device->total_size - SPI_FLASH_ERASE_SIZE) / FILESYSTEM_BLOCK_SIZE; -} - -// Flush the cache that was written to the scratch portion of flash. Only used -// when ram is tight. -static bool flush_scratch_flash(void) { - // First, copy out any blocks that we haven't touched from the sector we've - // cached. - bool copy_to_scratch_ok = true; - uint32_t scratch_sector = flash_device->total_size - SPI_FLASH_ERASE_SIZE; - for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { - if ((dirty_mask & (1 << i)) == 0) { - copy_to_scratch_ok = copy_to_scratch_ok && - copy_block(current_sector + i * FILESYSTEM_BLOCK_SIZE, - scratch_sector + i * FILESYSTEM_BLOCK_SIZE); - } - } - if (!copy_to_scratch_ok) { - // TODO(tannewt): Do more here. We opted to not erase and copy bad data - // in. We still risk losing the data written to the scratch sector. - return false; - } - // Second, erase the current sector. - erase_sector(current_sector); - // Finally, copy the new version into it. - for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { - copy_block(scratch_sector + i * FILESYSTEM_BLOCK_SIZE, - current_sector + i * FILESYSTEM_BLOCK_SIZE); - } - return true; -} - -// Attempts to allocate a new set of page buffers for caching a full sector in -// ram. Each page is allocated separately so that the GC doesn't need to provide -// one huge block. We can free it as we write if we want to also. -static bool allocate_ram_cache(void) { - uint8_t blocks_per_sector = SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; - uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; - MP_STATE_VM(flash_ram_cache) = m_malloc_maybe(blocks_per_sector * pages_per_block * sizeof(uint32_t), false); - if (MP_STATE_VM(flash_ram_cache) == NULL) { - return false; - } - // Declare i and j outside the loops in case we fail to allocate everything - // we need. In that case we'll give it back. - uint8_t i = 0; - uint8_t j = 0; - bool success = true; - for (i = 0; i < blocks_per_sector; i++) { - for (j = 0; j < pages_per_block; j++) { - uint8_t *page_cache = m_malloc_maybe(SPI_FLASH_PAGE_SIZE, false); - if (page_cache == NULL) { - success = false; - break; - } - MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j] = page_cache; - } - if (!success) { - break; - } - } - // We couldn't allocate enough so give back what we got. - if (!success) { - // We add 1 so that we delete 0 when i is 1. Going to zero (i >= 0) - // would never stop because i is unsigned. - i++; - for (; i > 0; i--) { - for (; j > 0; j--) { - m_free(MP_STATE_VM(flash_ram_cache)[(i - 1) * pages_per_block + (j - 1)]); - } - j = pages_per_block; - } - m_free(MP_STATE_VM(flash_ram_cache)); - MP_STATE_VM(flash_ram_cache) = NULL; - } - return success; -} - -// Flush the cached sector from ram onto the flash. We'll free the cache unless -// keep_cache is true. -static bool flush_ram_cache(bool keep_cache) { - // First, copy out any blocks that we haven't touched from the sector - // we've cached. If we don't do this we'll erase the data during the sector - // erase below. - bool copy_to_ram_ok = true; - uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; - for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { - if ((dirty_mask & (1 << i)) == 0) { - for (uint8_t j = 0; j < pages_per_block; j++) { - copy_to_ram_ok = read_flash( - current_sector + (i * pages_per_block + j) * SPI_FLASH_PAGE_SIZE, - MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j], - SPI_FLASH_PAGE_SIZE); - if (!copy_to_ram_ok) { - break; - } - } - } - if (!copy_to_ram_ok) { - break; - } - } - - if (!copy_to_ram_ok) { - return false; - } - // Second, erase the current sector. - erase_sector(current_sector); - // Lastly, write all the data in ram that we've cached. - for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { - for (uint8_t j = 0; j < pages_per_block; j++) { - write_flash(current_sector + (i * pages_per_block + j) * SPI_FLASH_PAGE_SIZE, - MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j], - SPI_FLASH_PAGE_SIZE); - if (!keep_cache) { - m_free(MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j]); - } - } - } - // We're done with the cache for now so give it back. - if (!keep_cache) { - m_free(MP_STATE_VM(flash_ram_cache)); - MP_STATE_VM(flash_ram_cache) = NULL; - } - return true; -} - -// Delegates to the correct flash flush method depending on the existing cache. -static void spi_flash_flush_keep_cache(bool keep_cache) { - if (current_sector == NO_SECTOR_LOADED) { - return; - } - #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, true); - #endif - temp_status_color(ACTIVE_WRITE); - // If we've cached to the flash itself flush from there. - if (MP_STATE_VM(flash_ram_cache) == NULL) { - flush_scratch_flash(); - } else { - flush_ram_cache(keep_cache); - } - current_sector = NO_SECTOR_LOADED; - clear_temp_status(); - #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); - #endif -} - -// External flash function used. If called externally we assume we won't need -// the cache after. -void external_flash_flush(void) { - spi_flash_flush_keep_cache(false); -} - -void flash_flush(void) { - external_flash_flush(); -} - -// Builds a partition entry for the MBR. -static void build_partition(uint8_t *buf, int boot, int type, - uint32_t start_block, uint32_t num_blocks) { - buf[0] = boot; - - if (num_blocks == 0) { - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - } else { - buf[1] = 0xff; - buf[2] = 0xff; - buf[3] = 0xff; - } - - buf[4] = type; - - if (num_blocks == 0) { - buf[5] = 0; - buf[6] = 0; - buf[7] = 0; - } else { - buf[5] = 0xff; - buf[6] = 0xff; - buf[7] = 0xff; - } - - buf[8] = start_block; - buf[9] = start_block >> 8; - buf[10] = start_block >> 16; - buf[11] = start_block >> 24; - - buf[12] = num_blocks; - buf[13] = num_blocks >> 8; - buf[14] = num_blocks >> 16; - buf[15] = num_blocks >> 24; -} - -static int32_t convert_block_to_flash_addr(uint32_t block) { - if (SPI_FLASH_PART1_START_BLOCK <= block && block < external_flash_get_block_count()) { - // a block in partition 1 - block -= SPI_FLASH_PART1_START_BLOCK; - return block * FILESYSTEM_BLOCK_SIZE; - } - // bad block - return -1; -} - -bool external_flash_read_block(uint8_t *dest, uint32_t block) { - if (block == 0) { - // Fake the MBR so we can decide on our own partition table - for (int i = 0; i < 446; i++) { - dest[i] = 0; - } - - build_partition(dest + 446, 0, 0x01 /* FAT12 */, - SPI_FLASH_PART1_START_BLOCK, - external_flash_get_block_count() - SPI_FLASH_PART1_START_BLOCK); - build_partition(dest + 462, 0, 0, 0, 0); - build_partition(dest + 478, 0, 0, 0, 0); - build_partition(dest + 494, 0, 0, 0, 0); - - dest[510] = 0x55; - dest[511] = 0xaa; - - return true; - } else if (block < SPI_FLASH_PART1_START_BLOCK) { - memset(dest, 0, FILESYSTEM_BLOCK_SIZE); - return true; - } else { - // Non-MBR block, get data from flash memory. - int32_t address = convert_block_to_flash_addr(block); - if (address == -1) { - // bad block number - return false; - } - - // Mask out the lower bits that designate the address within the sector. - uint32_t this_sector = address & (~(SPI_FLASH_ERASE_SIZE - 1)); - uint8_t block_index = (address / FILESYSTEM_BLOCK_SIZE) % (SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE); - uint8_t mask = 1 << (block_index); - // We're reading from the currently cached sector. - if (current_sector == this_sector && (mask & dirty_mask) > 0) { - if (MP_STATE_VM(flash_ram_cache) != NULL) { - uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; - for (int i = 0; i < pages_per_block; i++) { - memcpy(dest + i * SPI_FLASH_PAGE_SIZE, - MP_STATE_VM(flash_ram_cache)[block_index * pages_per_block + i], - SPI_FLASH_PAGE_SIZE); - } - return true; - } else { - uint32_t scratch_address = flash_device->total_size - SPI_FLASH_ERASE_SIZE + block_index * FILESYSTEM_BLOCK_SIZE; - return read_flash(scratch_address, dest, FILESYSTEM_BLOCK_SIZE); - } - } - return read_flash(address, dest, FILESYSTEM_BLOCK_SIZE); - } -} - -bool external_flash_write_block(const uint8_t *data, uint32_t block) { - if (block < SPI_FLASH_PART1_START_BLOCK) { - // Fake writing below the flash partition. - return true; - } else { - // Non-MBR block, copy to cache - int32_t address = convert_block_to_flash_addr(block); - if (address == -1) { - // bad block number - return false; - } - // Wait for any previous writes to finish. - wait_for_flash_ready(); - // Mask out the lower bits that designate the address within the sector. - uint32_t this_sector = address & (~(SPI_FLASH_ERASE_SIZE - 1)); - uint8_t block_index = (address / FILESYSTEM_BLOCK_SIZE) % (SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE); - uint8_t mask = 1 << (block_index); - // Flush the cache if we're moving onto a sector or we're writing the - // same block again. - if (current_sector != this_sector || (mask & dirty_mask) > 0) { - // Check to see if we'd write to an erased page. In that case we - // can write directly. - if (page_erased(address)) { - return write_flash(address, data, FILESYSTEM_BLOCK_SIZE); - } - if (current_sector != NO_SECTOR_LOADED) { - spi_flash_flush_keep_cache(true); - } - if (MP_STATE_VM(flash_ram_cache) == NULL && !allocate_ram_cache()) { - erase_sector(flash_device->total_size - SPI_FLASH_ERASE_SIZE); - wait_for_flash_ready(); - } - current_sector = this_sector; - dirty_mask = 0; - } - dirty_mask |= mask; - // Copy the block to the appropriate cache. - if (MP_STATE_VM(flash_ram_cache) != NULL) { - uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; - for (int i = 0; i < pages_per_block; i++) { - memcpy(MP_STATE_VM(flash_ram_cache)[block_index * pages_per_block + i], - data + i * SPI_FLASH_PAGE_SIZE, - SPI_FLASH_PAGE_SIZE); - } - return true; - } else { - uint32_t scratch_address = flash_device->total_size - SPI_FLASH_ERASE_SIZE + block_index * FILESYSTEM_BLOCK_SIZE; - return write_flash(scratch_address, data, FILESYSTEM_BLOCK_SIZE); - } - } -} - -mp_uint_t external_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!external_flash_read_block(dest + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -mp_uint_t external_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!external_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the flash as an object with the block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t external_flash_obj = {&external_flash_type}; - -STATIC mp_obj_t external_flash_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&external_flash_obj; -} - -STATIC mp_obj_t external_flash_obj_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = external_flash_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(external_flash_obj_readblocks_obj, external_flash_obj_readblocks); - -STATIC mp_obj_t external_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = external_flash_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(external_flash_obj_writeblocks_obj, external_flash_obj_writeblocks); - -STATIC mp_obj_t external_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: external_flash_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: external_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: external_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(external_flash_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(external_flash_get_block_size()); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(external_flash_obj_ioctl_obj, external_flash_obj_ioctl); - -STATIC const mp_rom_map_elem_t external_flash_obj_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&external_flash_obj_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&external_flash_obj_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&external_flash_obj_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(external_flash_obj_locals_dict, external_flash_obj_locals_dict_table); - -const mp_obj_type_t external_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_SPIFlash, - .make_new = external_flash_obj_make_new, - .locals_dict = (mp_obj_t)&external_flash_obj_locals_dict, -}; - -void flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = 1; // flash filesystem lives on first partition - vfs->readblocks[0] = (mp_obj_t)&external_flash_obj_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&external_flash_obj; - vfs->readblocks[2] = (mp_obj_t)external_flash_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&external_flash_obj_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&external_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)external_flash_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&external_flash_obj_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&external_flash_obj; -} diff --git a/ports/atmel-samd/external_flash/external_flash.h b/ports/atmel-samd/external_flash/external_flash.h deleted file mode 100644 index f8ec5673ce2ad..0000000000000 --- a/ports/atmel-samd/external_flash/external_flash.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_H -#define MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_H - -#include - -#include "mpconfigport.h" - -// We use this when we can allocate the whole cache in RAM. -#define FLASH_ROOT_POINTERS \ - uint8_t** flash_ram_cache; \ - -// Erase sector size. -#define SPI_FLASH_SECTOR_SIZE (0x1000 - 100) - -// These are common across all NOR Flash. -#define SPI_FLASH_ERASE_SIZE (1 << 12) -#define SPI_FLASH_PAGE_SIZE (256) - -#define SPI_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define SPI_FLASH_IDLE_TICK(tick) (((tick) & SPI_FLASH_SYSTICK_MASK) == 2) - -void external_flash_init(void); -uint32_t external_flash_get_block_size(void); -uint32_t external_flash_get_block_count(void); -void external_flash_irq_handler(void); -void external_flash_flush(void); -bool external_flash_read_block(uint8_t *dest, uint32_t block); -bool external_flash_write_block(const uint8_t *src, uint32_t block); - -// these return 0 on success, non-zero on error -mp_uint_t external_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t external_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t external_flash_type; - -struct _fs_user_mount_t; -void flash_init_vfs(struct _fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_H diff --git a/ports/atmel-samd/external_flash/qspi_flash.c b/ports/atmel-samd/external_flash/qspi_flash.c deleted file mode 100644 index f4d5ec9041dbf..0000000000000 --- a/ports/atmel-samd/external_flash/qspi_flash.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "spi_flash_api.h" - -#include -#include - -#include "mpconfigboard.h" // for EXTERNAL_FLASH_QSPI_DUAL - -#include "external_flash/common_commands.h" -#include "shared_dma.h" - -#include "atmel_start_pins.h" -#include "hal_gpio.h" - -bool spi_flash_command(uint8_t command) { - QSPI->INSTRCTRL.bit.INSTR = command; - - QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READ | - QSPI_INSTRFRAME_INSTREN; - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - -bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) { - QSPI->INSTRCTRL.bit.INSTR = command; - - QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READ | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_DATAEN; - - memcpy(response, (uint8_t *) QSPI_AHB, length); - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - -bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t length) { - QSPI->INSTRCTRL.bit.INSTR = command; - - QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITE | - QSPI_INSTRFRAME_INSTREN; - - if (data != NULL) { - QSPI->INSTRFRAME.bit.DATAEN = true; - - memcpy((uint8_t *) QSPI_AHB, data, length); - } - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - -bool spi_flash_sector_command(uint8_t command, uint32_t address) { - QSPI->INSTRCTRL.bit.INSTR = command; - QSPI->INSTRADDR.bit.ADDR = address; - - QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITE | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN; - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - -bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { - QSPI->INSTRCTRL.bit.INSTR = CMD_PAGE_PROGRAM; - uint32_t mode = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI; - - QSPI->INSTRFRAME.reg = mode | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_WRITEMEMORY | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN | - QSPI_INSTRFRAME_DATAEN; - - memcpy(((uint8_t *) QSPI_AHB) + address, data, length); - // TODO(tannewt): Fix DMA and enable it. - // qspi_dma_write(address, data, length); - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - -bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { - #ifdef EXTERNAL_FLASH_QSPI_DUAL - QSPI->INSTRCTRL.bit.INSTR = CMD_DUAL_READ; - uint32_t mode = QSPI_INSTRFRAME_WIDTH_DUAL_OUTPUT; - #else - QSPI->INSTRCTRL.bit.INSTR = CMD_QUAD_READ; - uint32_t mode = QSPI_INSTRFRAME_WIDTH_QUAD_OUTPUT; - #endif - - QSPI->INSTRFRAME.reg = mode | - QSPI_INSTRFRAME_ADDRLEN_24BITS | - QSPI_INSTRFRAME_TFRTYPE_READMEMORY | - QSPI_INSTRFRAME_INSTREN | - QSPI_INSTRFRAME_ADDREN | - QSPI_INSTRFRAME_DATAEN | - QSPI_INSTRFRAME_DUMMYLEN(8); - - memcpy(data, ((uint8_t *) QSPI_AHB) + address, length); - // TODO(tannewt): Fix DMA and enable it. - // qspi_dma_read(address, data, length); - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; - - while( !QSPI->INTFLAG.bit.INSTREND ); - - QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; - - return true; -} - - -void spi_flash_init(void) { - MCLK->APBCMASK.bit.QSPI_ = true; - MCLK->AHBMASK.bit.QSPI_ = true; - MCLK->AHBMASK.bit.QSPI_2X_ = false; // Only true if we are doing DDR. - - QSPI->CTRLA.reg = QSPI_CTRLA_SWRST; - // We don't need to wait because we're running as fast as the CPU. - - // Slow, good for debugging with Saleae - // QSPI->BAUD.bit.BAUD = 32; - // Super fast, may be unreliable when Saleae is connected to high speed lines. - QSPI->BAUD.bit.BAUD = 2; - QSPI->CTRLB.reg = QSPI_CTRLB_MODE_MEMORY | - QSPI_CTRLB_DATALEN_8BITS | - QSPI_CTRLB_CSMODE_LASTXFER; - - QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE; - - // The QSPI is only connected to one set of pins in the SAMD51 so we can hard code it. - uint32_t pins[6] = {PIN_PA08, PIN_PA09, PIN_PA10, PIN_PA11, PIN_PB10, PIN_PB11}; - for (uint8_t i = 0; i < 6; i++) { - gpio_set_pin_direction(pins[i], GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(pins[i], GPIO_PULL_OFF); - gpio_set_pin_function(pins[i], GPIO_PIN_FUNCTION_H); - } -} - -void spi_flash_init_device(const external_flash_device* device) { - // Verify that QSPI mode is enabled. - uint8_t status; - spi_flash_read_command(CMD_READ_STATUS2, &status, 1); - - // Bit 1 is Quad Enable - if ((status & 0x2) == 0) { - uint8_t full_status[2] = { 0x0, 0x2}; - spi_flash_command(CMD_ENABLE_WRITE); - spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, full_status, 2); - } -} diff --git a/ports/atmel-samd/external_flash/spi_flash.c b/ports/atmel-samd/external_flash/spi_flash.c deleted file mode 100644 index 8a8cbaef816af..0000000000000 --- a/ports/atmel-samd/external_flash/spi_flash.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "spi_flash_api.h" - -#include -#include - -#include "external_flash/common_commands.h" -#include "peripherals.h" -#include "shared_dma.h" - -#include "hal_gpio.h" -#include "hal_spi_m_sync.h" - -struct spi_m_sync_descriptor spi_flash_desc; - -// Enable the flash over SPI. -static void flash_enable(void) { - gpio_set_pin_level(SPI_FLASH_CS_PIN, false); -} - -// Disable the flash over SPI. -static void flash_disable(void) { - gpio_set_pin_level(SPI_FLASH_CS_PIN, true); -} - -static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { - struct spi_xfer xfer = { command, NULL, command_length }; - flash_enable(); - int32_t status = spi_m_sync_transfer(&spi_flash_desc, &xfer); - if (status >= 0 && !(data_in == NULL && data_out == NULL)) { - struct spi_xfer data_xfer = {data_in, data_out, data_length}; - status = spi_m_sync_transfer(&spi_flash_desc, &data_xfer); - } - flash_disable(); - return status >= 0; -} - -static bool transfer_command(uint8_t command, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { - return transfer(&command, 1, data_in, data_out, data_length); -} - -bool spi_flash_command(uint8_t command) { - return transfer_command(command, NULL, NULL, 0); -} - -bool spi_flash_read_command(uint8_t command, uint8_t* data, uint32_t data_length) { - return transfer_command(command, NULL, data, data_length); -} - -bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t data_length) { - return transfer_command(command, data, NULL, data_length); -} - -// Pack the low 24 bits of the address into a uint8_t array. -static void address_to_bytes(uint32_t address, uint8_t* bytes) { - bytes[0] = (address >> 16) & 0xff; - bytes[1] = (address >> 8) & 0xff; - bytes[2] = address & 0xff; -} - -bool spi_flash_sector_command(uint8_t command, uint32_t address) { - uint8_t request[4] = {command, 0x00, 0x00, 0x00}; - address_to_bytes(address, request + 1); - return transfer(request, 4, NULL, NULL, 0); -} - -bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t data_length) { - uint8_t request[4] = {CMD_PAGE_PROGRAM, 0x00, 0x00, 0x00}; - // Write the SPI flash write address into the bytes following the command byte. - address_to_bytes(address, request + 1); - struct spi_xfer xfer = { request, NULL, 4 }; - flash_enable(); - int32_t status = spi_m_sync_transfer(&spi_flash_desc, &xfer); - if (status >= 0) { - status = sercom_dma_write(spi_flash_desc.dev.prvt, data, data_length); - } - flash_disable(); - return status >= 0; -} - -bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t data_length) { - uint8_t request[4] = {CMD_READ_DATA, 0x00, 0x00, 0x00}; - // Write the SPI flash write address into the bytes following the command byte. - address_to_bytes(address, request + 1); - struct spi_xfer xfer = { request, NULL, 4 }; - flash_enable(); - int32_t status = spi_m_sync_transfer(&spi_flash_desc, &xfer); - if (status >= 0) { - status = sercom_dma_read(spi_flash_desc.dev.prvt, data, data_length, 0xff); - } - flash_disable(); - return status >= 0; -} - -void spi_flash_init(void) { - samd_peripherals_sercom_clock_init(SPI_FLASH_SERCOM, SPI_FLASH_SERCOM_INDEX); - - // Set up with defaults, then change. - spi_m_sync_init(&spi_flash_desc, SPI_FLASH_SERCOM); - - hri_sercomspi_write_CTRLA_DOPO_bf(SPI_FLASH_SERCOM, SPI_FLASH_DOPO); - hri_sercomspi_write_CTRLA_DIPO_bf(SPI_FLASH_SERCOM, SPI_FLASH_DIPO); - - gpio_set_pin_direction(SPI_FLASH_SCK_PIN, GPIO_DIRECTION_OUT); - gpio_set_pin_pull_mode(SPI_FLASH_SCK_PIN, GPIO_PULL_OFF); - gpio_set_pin_function(SPI_FLASH_SCK_PIN, SPI_FLASH_SCK_PIN_FUNCTION); - - gpio_set_pin_direction(SPI_FLASH_MOSI_PIN, GPIO_DIRECTION_OUT); - gpio_set_pin_pull_mode(SPI_FLASH_MOSI_PIN, GPIO_PULL_OFF); - gpio_set_pin_function(SPI_FLASH_MOSI_PIN, SPI_FLASH_MOSI_PIN_FUNCTION); - - gpio_set_pin_direction(SPI_FLASH_MISO_PIN, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(SPI_FLASH_MISO_PIN, GPIO_PULL_OFF); - gpio_set_pin_function(SPI_FLASH_MISO_PIN, SPI_FLASH_MISO_PIN_FUNCTION); - - hri_sercomspi_write_CTRLA_DOPO_bf(SPI_FLASH_SERCOM, SPI_FLASH_DOPO); - hri_sercomspi_write_CTRLA_DIPO_bf(SPI_FLASH_SERCOM, SPI_FLASH_DIPO); - - spi_m_sync_set_baudrate(&spi_flash_desc, samd_peripherals_spi_baudrate_to_baud_reg_value(SPI_FLASH_BAUDRATE)); - - gpio_set_pin_direction(SPI_FLASH_CS_PIN, GPIO_DIRECTION_OUT); - // There's already a pull-up on the board. - gpio_set_pin_pull_mode(SPI_FLASH_CS_PIN, GPIO_PULL_OFF); - gpio_set_pin_function(SPI_FLASH_CS_PIN, GPIO_PIN_FUNCTION_OFF); - - // Set CS high (disabled). - flash_disable(); - - spi_m_sync_enable(&spi_flash_desc); -} - -void spi_flash_init_device(const external_flash_device* device) { - -} diff --git a/ports/atmel-samd/fatfs_port.c b/ports/atmel-samd/fatfs_port.c index e1eba350a288d..c4ce18c2a7ff7 100644 --- a/ports/atmel-samd/fatfs_port.c +++ b/ports/atmel-samd/fatfs_port.c @@ -28,8 +28,21 @@ #include "py/runtime.h" #include "lib/oofatfs/ff.h" /* FatFs lower layer API */ #include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ +#include "lib/timeutils/timeutils.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif DWORD get_fattime(void) { - // TODO(tannewt): Support the RTC. +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif + + } diff --git a/ports/atmel-samd/flash_api.c b/ports/atmel-samd/flash_api.c deleted file mode 100644 index b8a2127188e19..0000000000000 --- a/ports/atmel-samd/flash_api.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "flash_api.h" - -#include "py/mpstate.h" - -#define VFS_INDEX 0 - -void flash_set_usb_writable(bool usb_writable) { - mp_vfs_mount_t* current_mount = MP_STATE_VM(vfs_mount_table); - for (uint8_t i = 0; current_mount != NULL; i++) { - if (i == VFS_INDEX) { - break; - } - current_mount = current_mount->next; - } - if (current_mount == NULL) { - return; - } - fs_user_mount_t *vfs = (fs_user_mount_t *) current_mount->obj; - - if (usb_writable) { - vfs->flags |= FSUSER_USB_WRITABLE; - } else { - vfs->flags &= ~FSUSER_USB_WRITABLE; - } -} diff --git a/ports/atmel-samd/flash_api.h b/ports/atmel-samd/flash_api.h deleted file mode 100644 index 3e41f59a24a8f..0000000000000 --- a/ports/atmel-samd/flash_api.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_FLASH_API_H -#define MICROPY_INCLUDED_ATMEL_SAMD_FLASH_API_H - -#include "extmod/vfs_fat.h" - -extern void flash_init_vfs(fs_user_mount_t *vfs); -extern void flash_flush(void); - -void flash_set_usb_writable(bool usb_writable); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_FLASH_API_H diff --git a/ports/atmel-samd/freetouch b/ports/atmel-samd/freetouch new file mode 160000 index 0000000000000..b6859a349efb7 --- /dev/null +++ b/ports/atmel-samd/freetouch @@ -0,0 +1 @@ +Subproject commit b6859a349efb79e2008d6f6a34e406e93a8e19c0 diff --git a/ports/atmel-samd/freetouch/Adafruit_FreeTouch.cpp b/ports/atmel-samd/freetouch/Adafruit_FreeTouch.cpp deleted file mode 100644 index 45cac38674ffe..0000000000000 --- a/ports/atmel-samd/freetouch/Adafruit_FreeTouch.cpp +++ /dev/null @@ -1,280 +0,0 @@ -/* - * FreeTouch, a QTouch-compatible library - tested on ATSAMD21 only! - * The MIT License (MIT) - * - * Copyright (c) 2017 Limor 'ladyada' Fried for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "Adafruit_FreeTouch.h" - -#include "adafruit_ptc.h" - -Adafruit_FreeTouch::Adafruit_FreeTouch(int p, oversample_t f, series_resistor_t r, freq_mode_t fh) { - adafruit_ptc_get_config_default(&config); - pin = p; - uint8_t port_offset = 0; - if (g_APinDescription[pin].ulPort == PORTB) { - port_offset += 32; - } - config.pin = port_offset + g_APinDescription[pin].ulPin; - config.yline = getYLine(); // determine the Y0-15 # - config.oversample = f; - config.seriesres = r; - config.freqhop = fh; -} - -bool Adafruit_FreeTouch::begin(void) { - if (config.yline == -1) { // not all pins have Y line - return false; - } - - /* Setup and enable generic clock source for PTC module. - struct system_gclk_chan_config gclk_chan_conf; - system_gclk_chan_get_config_defaults(&gclk_chan_conf); - */ - - uint8_t channel = PTC_GCLK_ID; - uint8_t source_generator = 1; - - // original line: system_gclk_chan_set_config(PTC_GCLK_ID, &gclk_chan_conf); - uint32_t new_clkctrl_config = (channel << GCLK_CLKCTRL_ID_Pos); // from gclk.c - - // original line: gclk_chan_conf.source_generator = GCLK_GENERATOR_1; - /* Select the desired generic clock generator */ - new_clkctrl_config |= source_generator << GCLK_CLKCTRL_GEN_Pos; // from gclk.c - - /* Disable generic clock channel */ - // original line: system_gclk_chan_disable(channel); - noInterrupts(); - - /* Select the requested generator channel */ - *((uint8_t*)&GCLK->CLKCTRL.reg) = channel; - - /* Sanity check WRTLOCK */ - //Assert(!GCLK->CLKCTRL.bit.WRTLOCK); - - /* Switch to known-working source so that the channel can be disabled */ - uint32_t prev_gen_id = GCLK->CLKCTRL.bit.GEN; - GCLK->CLKCTRL.bit.GEN = 0; - - /* Disable the generic clock */ - GCLK->CLKCTRL.reg &= ~GCLK_CLKCTRL_CLKEN; - while (GCLK->CLKCTRL.reg & GCLK_CLKCTRL_CLKEN) { - /* Wait for clock to become disabled */ - } - - /* Restore previous configured clock generator */ - GCLK->CLKCTRL.bit.GEN = prev_gen_id; - - //system_interrupt_leave_critical_section(); - interrupts(); - - /* Write the new configuration */ - GCLK->CLKCTRL.reg = new_clkctrl_config; - - // original line: system_gclk_chan_enable(PTC_GCLK_ID); - *((uint8_t*)&GCLK->CLKCTRL.reg) = channel; - GCLK->CLKCTRL.reg |= GCLK_CLKCTRL_CLKEN; /* Enable the generic clock */ - - - // original line: system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_PTC); - PM->APBCMASK.reg |= PM_APBCMASK_PTC; - - adafruit_ptc_init(PTC, &config); - - return true; -} - -uint16_t Adafruit_FreeTouch::measure(void) { - uint16_t m; - - m = measureRaw(); - if (m == -1) return -1; - - // normalize the signal - switch (config.oversample) { - case OVERSAMPLE_1: return m; - case OVERSAMPLE_2: return m/2; - case OVERSAMPLE_4: return m/4; - case OVERSAMPLE_8: return m/8; - case OVERSAMPLE_16: return m/16; - case OVERSAMPLE_32: return m/32; - case OVERSAMPLE_64: return m/64; - } - - return -1; // shouldn't reach here but fail if we do! -} - -uint16_t Adafruit_FreeTouch::measureRaw(void) { - adafruit_ptc_start_conversion(PTC, &config); - - while (!adafruit_ptc_is_conversion_finished(PTC)) { - yield(); - } - - return adafruit_ptc_get_conversion_result(PTC); -} - -/*********************************** low level config **/ - -int Adafruit_FreeTouch::getYLine(void) { - int p = g_APinDescription[pin].ulPin; - if (g_APinDescription[pin].ulPort == PORTA) { - if ((p >= 2) && (p <= 7)) { - return (p - 2); - } - } - if (g_APinDescription[pin].ulPort == PORTB) { - if ((p >= 0) && (p <= 9)) { - return (p + 6); - } - } - - // not valid - return -1; -} - -void Adafruit_FreeTouch::setCompCap(uint16_t cc) { - config.compcap = cc & 0x3FFF; -} - -void Adafruit_FreeTouch::setIntCap(uint8_t ic) { - config.intcap = ic & 0x3F; -} - -void Adafruit_FreeTouch::setOversampling(oversample_t lvl) { - config.oversample = lvl; // back it up for later -} - -void Adafruit_FreeTouch::setSeriesResistor(series_resistor_t res) { - config.seriesres = res; -} - -void Adafruit_FreeTouch::setFreqHopping(freq_mode_t fh, freq_hop_t hs) { - config.freqhop = fh; - config.hops = hs; -} - -/**************************** DEBUGGING ASSIST *************************/ -void Adafruit_FreeTouch::snapshotRegsAndPrint(uint32_t base, uint8_t numregs) { - volatile uint32_t addr = base; - uint8_t datas[255]; - - digitalWrite(LED_BUILTIN, HIGH); - for (uint8_t i=0; i -#include "adafruit_ptc.h" - -class Adafruit_FreeTouch { - public: - Adafruit_FreeTouch(int p = 0, oversample_t f = OVERSAMPLE_4, series_resistor_t r = RESISTOR_0, freq_mode_t fh = FREQ_MODE_NONE); - bool begin(void); - - uint16_t measure(void); - uint16_t measureRaw(void); - - private: - void ptcInitSettings(void); - void ptcConfigIOpin(void); - uint16_t startPtcAcquire(void); - - int getYLine(void); - void selectYLine(void); - void setOversampling(oversample_t lvl); - void setSeriesResistor(series_resistor_t res); - void setFreqHopping(freq_mode_t fh, freq_hop_t hops = FREQ_HOP_1); - void setCompCap(uint16_t cc); - void setIntCap(uint8_t ic); - - void snapshotRegsAndPrint(uint32_t base, uint8_t numregs); - void printHex(uint8_t h, boolean newline); - void printPTCregs(uint32_t base, uint8_t *regs, uint8_t num); - - private: - int pin; // arduino pin # - struct adafruit_ptc_config config; -}; - -#endif diff --git a/ports/atmel-samd/freetouch/README.md b/ports/atmel-samd/freetouch/README.md deleted file mode 100644 index 3b179a45c1e0b..0000000000000 --- a/ports/atmel-samd/freetouch/README.md +++ /dev/null @@ -1,2 +0,0 @@ -# Adafruit_FreeTouch -A QTouch-compatible library diff --git a/ports/atmel-samd/freetouch/adafruit_ptc.c b/ports/atmel-samd/freetouch/adafruit_ptc.c deleted file mode 100644 index f4369cf4a5fd4..0000000000000 --- a/ports/atmel-samd/freetouch/adafruit_ptc.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * FreeTouch, a QTouch-compatible library - tested on ATSAMD21 only! - * The MIT License (MIT) - * - * Copyright (c) 2017 Limor 'ladyada' Fried for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "adafruit_ptc.h" -#include "pinmux.h" - -static void sync_config(Ptc const* module_inst) { - while (module_inst->CONTROLB.bit.SYNCFLAG) ; -} - -void adafruit_ptc_get_config_default(struct adafruit_ptc_config *config) { - config->pin = 0xff; - config->yline = -1; - config->oversample = OVERSAMPLE_4; - config->seriesres = RESISTOR_0; - config->freqhop = FREQ_MODE_NONE; - config->compcap = 0x2000; - config->intcap = 0x3F; -} - -void adafruit_ptc_init(Ptc* module_inst, struct adafruit_ptc_config const* config) { - struct system_pinmux_config pinmux_config; - system_pinmux_get_config_defaults(&pinmux_config); - pinmux_config.mux_position = 0x1; - pinmux_config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE; - system_pinmux_pin_set_config(config->pin, &pinmux_config); - - sync_config(module_inst); - module_inst->CONTROLA.bit.ENABLE = 0; - sync_config(module_inst); - - module_inst->UNK4C04.reg &= 0xF7; //MEMORY[0x42004C04] &= 0xF7u; - module_inst->UNK4C04.reg &= 0xFB; //MEMORY[0x42004C04] &= 0xFBu; - module_inst->UNK4C04.reg &= 0xFC; //MEMORY[0x42004C04] &= 0xFCu; - sync_config(module_inst); - module_inst->FREQCONTROL.reg &= 0x9F; //MEMORY[0x42004C0C] &= 0x9Fu; - sync_config(module_inst); - module_inst->FREQCONTROL.reg &= 0xEF; //MEMORY[0x42004C0C] &= 0xEFu; - sync_config(module_inst); - module_inst->FREQCONTROL.bit.SAMPLEDELAY = 0; //MEMORY[0x42004C0C] &= 0xF0u; - module_inst->CONTROLC.bit.INIT = 1; //MEMORY[0x42004C05] |= 1u; - module_inst->CONTROLA.bit.RUNINSTANDBY = 1; //MEMORY[0x42004C00] |= 4u; - sync_config(module_inst); - module_inst->INTDISABLE.bit.WCO = 1; - sync_config(module_inst); - module_inst->INTDISABLE.bit.EOC = 1; - sync_config(module_inst); - - // enable the sensor, only done once per line - if (config->yline < 8) { - sync_config(module_inst); - module_inst->YENABLEL.reg |= 1 << config->yline; - sync_config(module_inst); - } else if (config->yline < 16) { - module_inst->YENABLEH.reg |= 1 << (config->yline - 8); - } - - sync_config(module_inst); - module_inst->CONTROLA.bit.ENABLE = 1; - sync_config(module_inst); -} - -void adafruit_ptc_start_conversion(Ptc* module_inst, struct adafruit_ptc_config const* config) { - module_inst->CONTROLA.bit.RUNINSTANDBY = 1; - sync_config(module_inst); - module_inst->CONTROLA.bit.ENABLE = 1; - sync_config(module_inst); - module_inst->INTDISABLE.bit.WCO = 1; - sync_config(module_inst); - module_inst->INTFLAGS.bit.WCO = 1; - sync_config(module_inst); - module_inst->INTFLAGS.bit.EOC = 1; - sync_config(module_inst); - - // set up pin! - sync_config(module_inst); - if (config->yline < 8) { - module_inst->YSELECTL.reg = 1 << config->yline; - } else { - module_inst->YSELECTL.reg = 0; - } - - if (config->yline > 7) { - module_inst->YSELECTH.reg = 1 << (config->yline - 8); - } else { - module_inst->YSELECTH.reg = 0; - } - - sync_config(module_inst); - // set up sense resistor - module_inst->SERRES.bit.RESISTOR = config->seriesres; - sync_config(module_inst); - // set up prescalar - module_inst->CONVCONTROL.bit.ADCACCUM = config->oversample; - sync_config(module_inst); - // set up freq hopping - if (config->freqhop == FREQ_MODE_NONE) { - module_inst->FREQCONTROL.bit.FREQSPREADEN = 0; - module_inst->FREQCONTROL.bit.SAMPLEDELAY = 0; - } else { - module_inst->FREQCONTROL.bit.FREQSPREADEN = 1; - module_inst->FREQCONTROL.bit.SAMPLEDELAY = config->hops; - } - // set up compensation cap + int (?) cap - sync_config(module_inst); - module_inst->COMPCAPL.bit.VALUE = config->compcap & 0xFF; - module_inst->COMPCAPH.bit.VALUE = (config->compcap>>8) & 0x3F; - sync_config(module_inst); - module_inst->INTCAP.bit.VALUE = config->intcap & 0x3F; - sync_config(module_inst); - - module_inst->BURSTMODE.reg = 0xA4; - sync_config(module_inst); - - module_inst->CONVCONTROL.bit.CONVERT = 1; - sync_config(module_inst); -} - -bool adafruit_ptc_is_conversion_finished(Ptc* module_inst) { - return module_inst->CONVCONTROL.bit.CONVERT == 0; -} - -uint16_t adafruit_ptc_get_conversion_result(Ptc* module_inst) { - sync_config(module_inst); - return module_inst->RESULT.reg; -} diff --git a/ports/atmel-samd/freetouch/adafruit_ptc.h b/ports/atmel-samd/freetouch/adafruit_ptc.h deleted file mode 100644 index 93bb16ef40f31..0000000000000 --- a/ports/atmel-samd/freetouch/adafruit_ptc.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * FreeTouch, a QTouch-compatible library - tested on ATSAMD21 only! - * The MIT License (MIT) - * - * Copyright (c) 2017 Limor 'ladyada' Fried for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This is similar to the drivers found in sam0/drivers but for the PTC. -#ifndef ADAFRUIT_FREETOUCH_ADAFRUIT_PTC_H -#define ADAFRUIT_FREETOUCH_ADAFRUIT_PTC_H - -#include - -#include "samd21_ptc_component.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Touch library oversampling (filter) setting */ -typedef enum tag_oversample_level_t { - OVERSAMPLE_1, - OVERSAMPLE_2, - OVERSAMPLE_4, - OVERSAMPLE_8, - OVERSAMPLE_16, - OVERSAMPLE_32, - OVERSAMPLE_64 -} -oversample_t; - -/* Touch library series resistor setting */ -typedef enum tag_series_resistor_t { - RESISTOR_0, - RESISTOR_20K, - RESISTOR_50K, - RESISTOR_100K, -} -series_resistor_t; - -typedef enum tag_freq_mode_t { - FREQ_MODE_NONE, - FREQ_MODE_HOP, - FREQ_MODE_SPREAD, - FREQ_MODE_SPREAD_MEDIAN -} -freq_mode_t; - -typedef enum tag_freq_hop_t { - FREQ_HOP_1, - FREQ_HOP_2, - FREQ_HOP_3, - FREQ_HOP_4, - FREQ_HOP_5, - FREQ_HOP_6, - FREQ_HOP_7, - FREQ_HOP_8, - FREQ_HOP_9, - FREQ_HOP_10, - FREQ_HOP_11, - FREQ_HOP_12, - FREQ_HOP_13, - FREQ_HOP_14, - FREQ_HOP_15, - FREQ_HOP_16 -} -freq_hop_t; - -struct adafruit_ptc_config { - uint8_t pin; // ASF pin # - int8_t yline; // the Y select line (see datasheet) - oversample_t oversample; - series_resistor_t seriesres; - freq_mode_t freqhop; - freq_hop_t hops; - uint16_t compcap; - uint8_t intcap; -}; - -void adafruit_ptc_get_config_default(struct adafruit_ptc_config *config); -void adafruit_ptc_init(Ptc* module_inst, struct adafruit_ptc_config const* config); -void adafruit_ptc_start_conversion(Ptc* module_inst, struct adafruit_ptc_config const* config); - -bool adafruit_ptc_is_conversion_finished(Ptc* module_inst); -uint16_t adafruit_ptc_get_conversion_result(Ptc* module_inst); - -#ifdef __cplusplus -} -#endif - -#endif // ADAFRUIT_FREETOUCH_ADAFRUIT_PTC_H diff --git a/ports/atmel-samd/freetouch/examples/freetouch/freetouch.ino b/ports/atmel-samd/freetouch/examples/freetouch/freetouch.ino deleted file mode 100644 index d89642c2e5a5c..0000000000000 --- a/ports/atmel-samd/freetouch/examples/freetouch/freetouch.ino +++ /dev/null @@ -1,56 +0,0 @@ -#include "Adafruit_FreeTouch.h" - -Adafruit_FreeTouch qt_1 = Adafruit_FreeTouch(A0, OVERSAMPLE_4, RESISTOR_50K, FREQ_MODE_NONE); -Adafruit_FreeTouch qt_2 = Adafruit_FreeTouch(A1, OVERSAMPLE_4, RESISTOR_50K, FREQ_MODE_NONE); -Adafruit_FreeTouch qt_3 = Adafruit_FreeTouch(A2, OVERSAMPLE_4, RESISTOR_50K, FREQ_MODE_NONE); -Adafruit_FreeTouch qt_4 = Adafruit_FreeTouch(A3, OVERSAMPLE_4, RESISTOR_50K, FREQ_MODE_NONE); - -void setup() { - Serial.begin(115200); - - while (!Serial); - Serial.println("FreeTouch test"); - // initialize digital pin LED_BUILTIN as an output. - pinMode(LED_BUILTIN, OUTPUT); - - if (! qt_1.begin()) - Serial.println("Failed to begin qt on pin A0"); - if (! qt_2.begin()) - Serial.println("Failed to begin qt on pin A1"); - if (! qt_3.begin()) - Serial.println("Failed to begin qt on pin A2"); - if (! qt_4.begin()) - Serial.println("Failed to begin qt on pin A3"); - -} - - - -void loop() { - int counter, result = 0; - - // DIY - Serial.println("\n*************************************"); - - counter = millis(); - result = qt_1.measure(); - Serial.print("QT 1: "); Serial.print(result); - Serial.print(" ("); Serial.print(millis() - counter); Serial.println(" ms)"); - - counter = millis(); - result = qt_2.measure(); - Serial.print("QT 2: "); Serial.print(result); - Serial.print(" ("); Serial.print(millis() - counter); Serial.println(" ms)"); - - counter = millis(); - result = qt_3.measure(); - Serial.print("QT 3: "); Serial.print(result); - Serial.print(" ("); Serial.print(millis() - counter); Serial.println(" ms)"); - - counter = millis(); - result = qt_4.measure(); - Serial.print("QT 4: "); Serial.print(result); - Serial.print(" ("); Serial.print(millis() - counter); Serial.println(" ms)"); - - delay(200); -} \ No newline at end of file diff --git a/ports/atmel-samd/freetouch/samd21_ptc_component.h b/ports/atmel-samd/freetouch/samd21_ptc_component.h deleted file mode 100644 index 0af3236d38ae0..0000000000000 --- a/ports/atmel-samd/freetouch/samd21_ptc_component.h +++ /dev/null @@ -1,350 +0,0 @@ -/* - * FreeTouch, a QTouch-compatible library - tested on ATSAMD21 only! - * The MIT License (MIT) - * - * Copyright (c) 2017 Limor 'ladyada' Fried for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This is similar to the component definitions found in -// sam0/utils/cmsis/samd21/include/component but for the PTC. -#ifndef ADAFRUIT_FREETOUCH_PTC_COMPONENT_H -#define ADAFRUIT_FREETOUCH_PTC_COMPONENT_H - -#include "compiler.h" - -#undef ENABLE - -/*************** CONTROL A register ***************/ -#define PTC_REG_CONTROLA 0x42004C00 -#define PTC_BIT_ENABLE 0x02 -#define PTC_BIT_RUNINSTBY 0x04 - - -typedef union { - struct { - uint8_t SWRESET:1; - uint8_t ENABLE:1; - uint8_t RUNINSTANDBY:1; - uint8_t __pad0__:5; - } bit; - uint8_t reg; -} PTC_REG_CONTROLA_Type; - -/*************** CONTROL B register ***************/ - -#define PTC_REG_CONTROLB 0x42004C01 -#define PTC_BIT_SYNCFLAG 0x80 - -typedef union { - struct { - uint8_t __pad0__:7; - uint8_t SYNCFLAG:1; - } bit; - uint8_t reg; -} PTC_REG_CONTROLB_Type; - -/*************** UNK4C04 register ***************/ - -#define PTC_REG_UNK4C04 0x42004C04 - -typedef union { - uint8_t reg; -} PTC_REG_UNK4C04_Type; - - -/*************** CONTROL C register ***************/ - -#define PTC_REG_CONTROLC 0x42004C05 -#define PTC_BIT_INIT 0x01 - -typedef union { - struct { - uint8_t INIT:1; - uint8_t __pad0__:7; - } bit; - uint8_t reg; -} PTC_REG_CONTROLC_Type; - - - -/*************** INT registers ***************/ - -typedef union { - struct { - uint8_t EOC:1; - uint8_t WCO:1; - uint8_t __pad0__:6; - } bit; - uint8_t reg; -} PTC_REG_INT_Type; - - -#define PTC_REG_INTDISABLE 0x42004C08 -#define PTC_REG_INTENABLE 0x42004C09 -#define PTC_BIT_EOCINTEN 0x01 -#define PTC_BIT_WCOINTEN 0x02 - -#define PTC_REG_INTFLAGS 0x42004C0A -#define PTC_BIT_EOCINTFLAG 0x01 -#define PTC_BIT_WCOINTFLAG 0x02 - - -/*************** FREQ CONTROL reg ***************/ - -typedef union { - struct { - uint8_t SAMPLEDELAY:4; - uint8_t FREQSPREADEN:1; - uint8_t __pad0__:3; - } bit; - uint8_t reg; -} PTC_REG_FREQCONTROL_Type; - -#define PTC_REG_FREQCONTROL 0x42004C0C -#define PTC_BIT_FREQSPREADEN 0x10 -#define PTC_REG_SAMPLEDELAY_MASK 0x0F - -/*************** CONVERT CONTROL reg ***************/ - -typedef union { - struct { - uint8_t ADCACCUM:3; - uint8_t __pad0__:4; - uint8_t CONVERT:1; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_CONVCONTROL_Type; - - -#define PTC_REG_CONVCONTROL 0x42004C0D -#define PTC_BIT_CONVSTARTED 0x80 -#define PTC_REG_ADCACC_MASK 0x07 - - -/*************** Y SELECT L+H reg ***************/ - -typedef union { - struct { - uint8_t Y0:1; - uint8_t Y1:1; - uint8_t Y2:1; - uint8_t Y3:1; - uint8_t Y4:1; - uint8_t Y5:1; - uint8_t Y6:1; - uint8_t Y7:1; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_YSELECTL_Type; - -typedef union { - struct { - uint8_t Y8:1; - uint8_t Y9:1; - uint8_t Y10:1; - uint8_t Y11:1; - uint8_t Y12:1; - uint8_t Y13:1; - uint8_t Y14:1; - uint8_t Y15:1; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_YSELECTH_Type; - -#define PTC_REG_YSELECT_L 0x42004C10 -#define PTC_REG_YSELECT_H 0x42004C11 - -#define PTC_REG_YENABLE_L 0x42004C14 -#define PTC_REG_YENABLE_H 0x42004C15 - - -/*************** X SELECT L+H reg ***************/ - -typedef union { - struct { - uint8_t X0:1; - uint8_t X1:1; - uint8_t X2:1; - uint8_t X3:1; - uint8_t X4:1; - uint8_t X5:1; - uint8_t X6:1; - uint8_t X7:1; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_XSELECTL_Type; - -typedef union { - struct { - uint8_t X8:1; - uint8_t X9:1; - uint8_t X10:1; - uint8_t X11:1; - uint8_t X12:1; - uint8_t X13:1; - uint8_t X14:1; - uint8_t X15:1; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_XSELECTH_Type; - - -#define PTC_REG_XSELECT_L 0x42004C12 -#define PTC_REG_XSELECT_H 0x42004C13 - -#define PTC_REG_XENABLE_L 0x42004C16 -#define PTC_REG_XENABLE_H 0x42004C17 - -/*************** Compensation Cap reg ***************/ - -typedef union { - struct { - uint8_t VALUE:8; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_COMPCAPL_Type; - -typedef union { - struct { - uint8_t VALUE:6; - uint8_t __pad0__:2; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_COMPCAPH_Type; - -#define PTC_REG_COMPCAPL 0x42004C18 -#define PTC_REG_COMPCAPH 0x42004C19 - -/*************** Int Cap reg ***************/ - -typedef union { - struct { - uint8_t VALUE:6; - uint8_t __pad0__:2; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_INTCAP_Type; - - -#define PTC_REG_INTCAP 0x42004C1A - -/*************** Series resistor reg ***************/ - -typedef union { - struct { - uint8_t RESISTOR:2; - uint8_t __pad0__:6; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_SERRES_Type; - -#define PTC_REG_SERIESRES 0x42004C1B - -/*************** conversion result reg ***************/ - -typedef union { - struct { - uint8_t LOWBYTE; - uint8_t HIGHBYTE; - } byte; - uint16_t reg; -} __attribute__ ((packed)) PTC_REG_CONVRESULT_Type; - -#define PTC_REG_CONVRESULT_L 0x42004C1C -#define PTC_REG_CONVRESULT_H 0x42004C1D - -/*************** burst mode reg ***************/ - -typedef union { - struct { - uint8_t __pad0__:2; - uint8_t CTSLOWPOWER:1; - uint8_t __pad1__:1; - uint8_t BURSTMODE:4; - } bit; - uint8_t reg; -} __attribute__ ((packed)) PTC_REG_BURSTMODE_Type; - - -#define PTC_REG_BURSTMODE 0x42004C20 -#define PTC_REG_BURSTMODE_MASK 0xF0 -#define PTC_BIT_CTSLOWPOWER 0x04 - -/*************** etc unused reg ***************/ - -#define PTC_REG_XYENABLE 0x42004C16 -#define PTC_BIT_XYENABLE 0x02 - -#define PTC_REG_WCO_MODE 0x42004C21 -#define PTC_REG_WCO_MODE_MASK 0x07 - -#define PTC_SET_WCO_THRESHHOLD_A_L 0x42004C24 -#define PTC_SET_WCO_THRESHHOLD_A_H 0x42004C25 -#define PTC_SET_WCO_THRESHHOLD_B_L 0x42004C26 -#define PTC_SET_WCO_THRESHHOLD_B_H 0x42004C27 - -typedef struct { - __IO PTC_REG_CONTROLA_Type CONTROLA; // 0x42004C00 - __IO PTC_REG_CONTROLB_Type CONTROLB; // 0x42004C01 - uint8_t __pad4c02__; // 0x42004C02 unknown - uint8_t __pad4c03__; // 0x42004C03 unknown - __IO PTC_REG_UNK4C04_Type UNK4C04; // 0x42004C04 unknown - __IO PTC_REG_CONTROLC_Type CONTROLC; // 0x42004C05 - uint8_t __pad4c06__; // 0x42004C06 unknown - uint8_t __pad4c07__; // 0x42004C07 unknown - __IO PTC_REG_INT_Type INTDISABLE; // 0x42004C08 - __IO PTC_REG_INT_Type INTENABLE; // 0x42004C09 - __IO PTC_REG_INT_Type INTFLAGS; // 0x42004C0A - uint8_t __pad4c0b__; // 0x42004C0B unknown - __IO PTC_REG_FREQCONTROL_Type FREQCONTROL; //0x42004C0C - __IO PTC_REG_CONVCONTROL_Type CONVCONTROL; // 0x42004C0D - uint8_t __pad4c0e__; // 0x42004C0E unknown - uint8_t __pad4c0f__; // 0x42004C0F unknown - __IO PTC_REG_YSELECTL_Type YSELECTL; // 0x42004C10 - __IO PTC_REG_YSELECTL_Type YSELECTH; // 0x42004C11 - __IO PTC_REG_XSELECTL_Type XSELECTL; // 0x42004C12 - __IO PTC_REG_XSELECTL_Type XSELECTH; // 0x42004C13 - __IO PTC_REG_YSELECTL_Type YENABLEL; // 0x42004C14 - __IO PTC_REG_YSELECTL_Type YENABLEH; // 0x42004C15 - __IO PTC_REG_XSELECTL_Type XENABLEL; // 0x42004C16 - __IO PTC_REG_XSELECTL_Type XENABLEH; // 0x42004C17 - - __IO PTC_REG_COMPCAPL_Type COMPCAPL; // 0x42004C18 - __IO PTC_REG_COMPCAPH_Type COMPCAPH; // 0x42004C19 - __IO PTC_REG_INTCAP_Type INTCAP; // 0x42004C1A - __IO PTC_REG_SERRES_Type SERRES; // 0x42004C1B - - __IO PTC_REG_CONVRESULT_Type RESULT; // 0x42004C1C + 0x42004C1D - uint8_t __pad4c1e__; // 0x42004C1E unknown - uint8_t __pad4c1f__; // 0x42004C1F unknown - __IO PTC_REG_BURSTMODE_Type BURSTMODE; // 0x42004C20 -} Ptc; - -#define PTC (( Ptc *)0x42004C00U) - -#define PTC_REG_INTDISABLE 0x42004C08 -#define PTC_REG_INTENABLE 0x42004C09 -#define PTC_BIT_EOCINTEN 0x01 -#define PTC_BIT_WCOINTEN 0x02 - -#define PTC_REG_INTFLAGS 0x42004C0A - -#endif // ADAFRUIT_FREETOUCH_PTC_COMPONENT_H diff --git a/ports/atmel-samd/internal_flash.c b/ports/atmel-samd/internal_flash.c deleted file mode 100644 index 35eb52da23a5d..0000000000000 --- a/ports/atmel-samd/internal_flash.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "internal_flash.h" - -#include -#include - -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "py/mphal.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" - -#ifdef SAMD21 -#include "hpl/pm/hpl_pm_base.h" -#endif -#include "hal/include/hal_flash.h" - -#include "supervisor/shared/rgb_led_status.h" - -static struct flash_descriptor internal_flash_desc; - -void internal_flash_init(void) { - // Activity LED for flash writes. - #ifdef MICROPY_HW_LED_MSC - struct port_config pin_conf; - port_get_config_defaults(&pin_conf); - - pin_conf.direction = PORT_PIN_DIR_OUTPUT; - port_pin_set_config(MICROPY_HW_LED_MSC, &pin_conf); - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); - #endif - - #ifdef SAMD51 - hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK); - #endif - #ifdef SAMD21 - _pm_enable_bus_clock(PM_BUS_APBB, NVMCTRL); - #endif - flash_init(&internal_flash_desc, NVMCTRL); -} - -uint32_t internal_flash_get_block_size(void) { - return FILESYSTEM_BLOCK_SIZE; -} - -uint32_t internal_flash_get_block_count(void) { - return INTERNAL_FLASH_PART1_START_BLOCK + INTERNAL_FLASH_PART1_NUM_BLOCKS; -} - -void internal_flash_flush(void) { -} - -void flash_flush(void) { - internal_flash_flush(); -} - -static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { - buf[0] = boot; - - if (num_blocks == 0) { - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - } else { - buf[1] = 0xff; - buf[2] = 0xff; - buf[3] = 0xff; - } - - buf[4] = type; - - if (num_blocks == 0) { - buf[5] = 0; - buf[6] = 0; - buf[7] = 0; - } else { - buf[5] = 0xff; - buf[6] = 0xff; - buf[7] = 0xff; - } - - buf[8] = start_block; - buf[9] = start_block >> 8; - buf[10] = start_block >> 16; - buf[11] = start_block >> 24; - - buf[12] = num_blocks; - buf[13] = num_blocks >> 8; - buf[14] = num_blocks >> 16; - buf[15] = num_blocks >> 24; -} - -static int32_t convert_block_to_flash_addr(uint32_t block) { - if (INTERNAL_FLASH_PART1_START_BLOCK <= block && block < INTERNAL_FLASH_PART1_START_BLOCK + INTERNAL_FLASH_PART1_NUM_BLOCKS) { - // a block in partition 1 - block -= INTERNAL_FLASH_PART1_START_BLOCK; - return INTERNAL_FLASH_MEM_SEG1_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; - } - // bad block - return -1; -} - -bool internal_flash_read_block(uint8_t *dest, uint32_t block) { - if (block == 0) { - // fake the MBR so we can decide on our own partition table - - for (int i = 0; i < 446; i++) { - dest[i] = 0; - } - - build_partition(dest + 446, 0, 0x01 /* FAT12 */, INTERNAL_FLASH_PART1_START_BLOCK, INTERNAL_FLASH_PART1_NUM_BLOCKS); - build_partition(dest + 462, 0, 0, 0, 0); - build_partition(dest + 478, 0, 0, 0, 0); - build_partition(dest + 494, 0, 0, 0, 0); - - dest[510] = 0x55; - dest[511] = 0xaa; - - return true; - - } else { - // non-MBR block, get data from flash memory - int32_t src = convert_block_to_flash_addr(block); - if (src == -1) { - // bad block number - return false; - } - int32_t error_code = flash_read(&internal_flash_desc, src, dest, FILESYSTEM_BLOCK_SIZE); - return error_code == ERR_NONE; - } -} - -bool internal_flash_write_block(const uint8_t *src, uint32_t block) { - if (block == 0) { - // can't write MBR, but pretend we did - return true; - - } else { - #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, true); - #endif - temp_status_color(ACTIVE_WRITE); - // non-MBR block, copy to cache - int32_t dest = convert_block_to_flash_addr(block); - if (dest == -1) { - // bad block number - return false; - } - int32_t error_code; - error_code = flash_erase(&internal_flash_desc, - dest, - FILESYSTEM_BLOCK_SIZE / flash_get_page_size(&internal_flash_desc)); - if (error_code != ERR_NONE) { - return false; - } - - error_code = flash_append(&internal_flash_desc, dest, src, FILESYSTEM_BLOCK_SIZE); - if (error_code != ERR_NONE) { - return false; - } - clear_temp_status(); - #ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); - #endif - return true; - } -} - -mp_uint_t internal_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!internal_flash_read_block(dest + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -mp_uint_t internal_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!internal_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the flash as an object with the block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t internal_flash_obj = {&internal_flash_type}; - -STATIC mp_obj_t internal_flash_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&internal_flash_obj; -} - -STATIC mp_obj_t internal_flash_obj_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = internal_flash_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_readblocks_obj, internal_flash_obj_readblocks); - -STATIC mp_obj_t internal_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = internal_flash_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_writeblocks_obj, internal_flash_obj_writeblocks); - -STATIC mp_obj_t internal_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: internal_flash_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: internal_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: internal_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(internal_flash_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(internal_flash_get_block_size()); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_ioctl_obj, internal_flash_obj_ioctl); - -STATIC const mp_rom_map_elem_t internal_flash_obj_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&internal_flash_obj_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&internal_flash_obj_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&internal_flash_obj_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(internal_flash_obj_locals_dict, internal_flash_obj_locals_dict_table); - -const mp_obj_type_t internal_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_InternalFlash, - .make_new = internal_flash_obj_make_new, - .locals_dict = (mp_obj_t)&internal_flash_obj_locals_dict, -}; - -void flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = 1; // flash filesystem lives on first partition - vfs->readblocks[0] = (mp_obj_t)&internal_flash_obj_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&internal_flash_obj; - vfs->readblocks[2] = (mp_obj_t)internal_flash_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&internal_flash_obj_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&internal_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)internal_flash_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&internal_flash_obj_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&internal_flash_obj; -} diff --git a/ports/atmel-samd/internal_flash.h b/ports/atmel-samd/internal_flash.h deleted file mode 100644 index 88c105386f3e9..0000000000000 --- a/ports/atmel-samd/internal_flash.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H -#define MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H - -#include - -#include "mpconfigport.h" - -#include "sam.h" - -#define FLASH_ROOT_POINTERS - -#ifdef SAMD51 -#define TOTAL_INTERNAL_FLASH_SIZE (FLASH_SIZE / 2) -#endif - -#ifdef SAMD21 -#define TOTAL_INTERNAL_FLASH_SIZE 0x010000 -#endif - -#define INTERNAL_FLASH_MEM_SEG1_START_ADDR (FLASH_SIZE - TOTAL_INTERNAL_FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) -#define INTERNAL_FLASH_PART1_START_BLOCK (0x1) -#define INTERNAL_FLASH_PART1_NUM_BLOCKS (TOTAL_INTERNAL_FLASH_SIZE / FILESYSTEM_BLOCK_SIZE) - -#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) - -void internal_flash_init(void); -uint32_t internal_flash_get_block_size(void); -uint32_t internal_flash_get_block_count(void); -void internal_flash_irq_handler(void); -void internal_flash_flush(void); -bool internal_flash_read_block(uint8_t *dest, uint32_t block); -bool internal_flash_write_block(const uint8_t *src, uint32_t block); - -// these return 0 on success, non-zero on error -mp_uint_t internal_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t internal_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t internal_flash_type; - -struct _fs_user_mount_t; -void flash_init_vfs(struct _fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H diff --git a/ports/atmel-samd/ld_defines.c b/ports/atmel-samd/ld_defines.c new file mode 100644 index 0000000000000..18f49d42c6916 --- /dev/null +++ b/ports/atmel-samd/ld_defines.c @@ -0,0 +1,30 @@ +// Fake source file used only to capture #define values for use in ld template files. +#include "mpconfigport.h" + +// For each value needed in the LD file, create a C-like line: +// /*NAME_OF_VALUE=*/ NAME_OF_VALUE; +// The C preprocessor will replace NAME_OF_VALUE with the actual value. +// This will be post-processed by tools/gen_ld_files.py to extract the name and value. + +// The next line is a marker to start looking for definitions. Lines above the next line are ignored. +// START_LD_DEFINES + +/*RAM_SIZE=*/ RAM_SIZE; +/*FLASH_SIZE=*/ FLASH_SIZE; + +/*BOOTLOADER_SIZE=*/ BOOTLOADER_SIZE; +/*BOOTLOADER_START_ADDR=*/ BOOTLOADER_START_ADDR; + +/*CIRCUITPY_DEFAULT_STACK_SIZE=*/ CIRCUITPY_DEFAULT_STACK_SIZE; + +/*CIRCUITPY_FIRMWARE_START_ADDR=*/ CIRCUITPY_FIRMWARE_START_ADDR; +/*CIRCUITPY_FIRMWARE_SIZE=*/ CIRCUITPY_FIRMWARE_SIZE; + +/*CIRCUITPY_INTERNAL_CONFIG_START_ADDR=*/ CIRCUITPY_INTERNAL_CONFIG_START_ADDR; +/*CIRCUITPY_INTERNAL_CONFIG_SIZE=*/ CIRCUITPY_INTERNAL_CONFIG_SIZE; + +/*CIRCUITPY_INTERNAL_NVM_START_ADDR=*/ CIRCUITPY_INTERNAL_NVM_START_ADDR; +/*CIRCUITPY_INTERNAL_NVM_SIZE=*/ CIRCUITPY_INTERNAL_NVM_SIZE; + +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR; +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE; diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index a5884b6ad98e9..04ad98c22ae0a 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -1,273 +1,230 @@ -#include +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_C) - -// options to control how MicroPython is built -#define MICROPY_QSTR_BYTES_IN_HASH (1) -#define MICROPY_ALLOC_PATH_MAX (256) -#define MICROPY_ALLOC_PARSE_CHUNK_INIT (16) -// TODO(tannewt): Reduce this number if we want the REPL to function under 512 -// free bytes. -// #define MICROPY_ALLOC_PARSE_RULE_INIT (64) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_CONST (1) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) -// Turn off for consistency -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_GC_ALLOC_THRESHOLD (0) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_ENABLE_DOC_STRING (0) -//#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_ENUMERATE (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT circuitpython_help_text -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_FILTER (1) -#define MICROPY_PY_BUILTINS_SET (1) -#define MICROPY_PY_BUILTINS_SLICE (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_NONSTANDARD_TYPECODES (0) -#define MICROPY_PY_BUILTINS_PROPERTY (1) -#define MICROPY_PY_BUILTINS_MIN_MAX (1) -#define MICROPY_PY___FILE__ (1) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_ARRAY (1) -#define MICROPY_PY_ATTRTUPLE (1) -#define MICROPY_PY_COLLECTIONS (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_URANDOM (0) -#define MICROPY_PY_URANDOM_EXTRA_FUNCS (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_STREAMS_NON_BLOCK (1) - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_FATFS_USE_LABEL (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_VOLUMES (4) -#define MICROPY_FATFS_MULTI_PARTITION (1) -#define MICROPY_FATFS_NUM_PERSISTENT (1) -// Only enable this if you really need it. It allocates a byte cache of this -// size. -// #define MICROPY_FATFS_MAX_SS (4096) - -#define FILESYSTEM_BLOCK_SIZE (512) - -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_MODULE_WEAK_LINKS (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_USE_INTERNAL_PRINTF (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_READER_VFS (1) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) - -#define MICROPY_KBD_EXCEPTION (1) - -// type definitions for the specific machine - -#define BYTES_PER_WORD (4) - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define MICROPY_STACK_CHECK (1) - -// Track stack usage on a debug build. Expose results via ustack module. -#ifdef MICROPY_DEBUG_MODULES -#define MICROPY_MAX_STACK_USAGE (1) -#endif +// Definitions for which SAMD chip we're using. +#include "include/sam.h" -// This port is intended to be 32-bit, but unfortunately, int32_t for -// different targets may be defined in different ways - either as int -// or as long. This requires different printf formatting specifiers -// to print such value. So, we avoid int32_t and use int directly. -#define UINT_FMT "%u" -#define INT_FMT "%d" -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size +// Definitions that control circuitpy_mpconfig.h: -typedef long mp_off_t; +//////////////////////////////////////////////////////////////////////////////////////////////////// -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) +#ifdef SAMD21 -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open_obj mp_vfs_open_obj +// HMCRAMC0_SIZE is defined in the ASF4 include files for each SAMD21 chip. +#define RAM_SIZE HMCRAMC0_SIZE +#define BOOTLOADER_SIZE (8*1024) +#define CIRCUITPY_MCU_FAMILY samd21 +#define MICROPY_PY_SYS_PLATFORM "Atmel SAMD21" +#define SPI_FLASH_MAX_BAUDRATE 8000000 +#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) +#define MICROPY_PY_FUNCTION_ATTRS (0) +// MICROPY_PY_UJSON depends on MICROPY_PY_IO +#define MICROPY_PY_IO (0) +#define MICROPY_PY_UJSON (0) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) +#define MICROPY_PY_UERRNO_LIST \ + X(EPERM) \ + X(ENOENT) \ + X(EIO) \ + X(EAGAIN) \ + X(ENOMEM) \ + X(EACCES) \ + X(EEXIST) \ + X(ENODEV) \ + X(EISDIR) \ + X(EINVAL) \ + +#endif // SAMD21 + +//////////////////////////////////////////////////////////////////////////////////////////////////// -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_OBJ_NEW_QSTR(MP_QSTR_help), (mp_obj_t)&mp_builtin_help_obj }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_input), (mp_obj_t)&mp_builtin_input_obj }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_open), (mp_obj_t)&mp_builtin_open_obj }, +#ifdef SAMD51 -// board specific definitions -#include "mpconfigboard.h" -#include "include/sam.h" +// HSRAM_SIZE is defined in the ASF4 include files for each SAMD51 chip. +#define RAM_SIZE HSRAM_SIZE +#define BOOTLOADER_SIZE (16*1024) +#define CIRCUITPY_MCU_FAMILY samd51 +#define MICROPY_PY_SYS_PLATFORM "MicroChip SAMD51" +#define SPI_FLASH_MAX_BAUDRATE 24000000 +#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) +#define MICROPY_PY_FUNCTION_ATTRS (1) +// MICROPY_PY_UJSON depends on MICROPY_PY_IO +#define MICROPY_PY_IO (1) +#define MICROPY_PY_UJSON (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) +// MICROPY_PY_UERRNO_LIST - Use the default + +#endif // SAMD51 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +// This also includes mpconfigboard.h. +#include "py/circuitpy_mpconfig.h" + +// Definitions that can be overridden by mpconfigboard.h: + +//////////////////////////////////////////////////////////////////////////////////////////////////// #ifdef SAMD21 -#define CIRCUITPY_MCU_FAMILY samd21 -#define MICROPY_PY_SYS_PLATFORM "Atmel SAMD21" -#define PORT_HEAP_SIZE (16384 + 4096) -// If you change MICROPY_LONGINT_IMPL, also change MPY_TOOL_LONGINT_IMPL in mpconfigport.mk. -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) + +#if INTERNAL_FLASH_FILESYSTEM +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64*1024) +#else +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif + +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (256) #endif +#ifndef CIRCUITPY_DEFAULT_STACK_SIZE +#define CIRCUITPY_DEFAULT_STACK_SIZE 4096 +#endif + +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE NVMCTRL_ROW_SIZE + +#endif // SAMD21 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + #ifdef SAMD51 -#define CIRCUITPY_MCU_FAMILY samd51 -#define MICROPY_PY_SYS_PLATFORM "MicroChip SAMD51" -#define PORT_HEAP_SIZE (0x20000) // 128KiB -// If you change MICROPY_LONGINT_IMPL, also change MPY_TOOL_LONGINT_IMPL in mpconfigport.mk. -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MP_SSIZE_MAX (0x7fffffff) + +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (8192) +#endif + +#ifndef CIRCUITPY_DEFAULT_STACK_SIZE +#define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) #endif -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t microcontroller_module; -extern const struct _mp_obj_module_t bitbangio_module; -extern const struct _mp_obj_module_t audioio_module; -extern const struct _mp_obj_module_t audiobusio_module; -extern const struct _mp_obj_module_t analogio_module; -extern const struct _mp_obj_module_t digitalio_module; -extern const struct _mp_obj_module_t pulseio_module; -extern const struct _mp_obj_module_t busio_module; -extern const struct _mp_obj_module_t board_module; -extern const struct _mp_obj_module_t math_module; -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t random_module; -extern const struct _mp_obj_module_t storage_module; -extern const struct _mp_obj_module_t struct_module; -extern const struct _mp_obj_module_t time_module; -extern const struct _mp_obj_module_t cpy_nvm_module; -extern const struct _mp_obj_module_t neopixel_write_module; -extern const struct _mp_obj_module_t uheap_module; -extern const struct _mp_obj_module_t ustack_module; -extern const struct _mp_obj_module_t supervisor_module; -extern const struct _mp_obj_module_t gamepad_module; -extern const struct _mp_obj_module_t stage_module; -extern const struct _mp_obj_module_t touchio_module; -extern const struct _mp_obj_module_t usb_hid_module; - -// Internal flash size dependent settings. -#if BOARD_FLASH_SIZE > 192000 - #define MICROPY_PY_BUILTINS_STR_CENTER (1) - #define MICROPY_PY_BUILTINS_STR_PARTITION (1) - #define MICROPY_PY_BUILTINS_FROZENSET (1) - #define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) - #define MICROPY_PY_BUILTINS_REVERSED (1) - #define MICROPY_PY_URE (1) - #define MICROPY_PY_MICROPYTHON_MEM_INFO (1) - #define MICROPY_PY_FRAMEBUF (1) - - #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (1) - #define MICROPY_PY_ALL_SPECIAL_METHODS (1) - // Scan gamepad every 32ms - #define CIRCUITPY_GAMEPAD_TICKS 0x1f - - #define EXTRA_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_gamepad),(mp_obj_t)&gamepad_module } -// { MP_OBJ_NEW_QSTR(MP_QSTR_audioio), (mp_obj_t)&audioio_module }, -// { MP_OBJ_NEW_QSTR(MP_QSTR_audiobusio), (mp_obj_t)&audiobusio_module }, - #define EXPRESS_BOARD +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE NVMCTRL_BLOCK_SIZE + +// If CIRCUITPY is internal, use half of flash for it. +#if INTERNAL_FLASH_FILESYSTEM + #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (FLASH_SIZE/2) + #endif #else - #define MICROPY_PY_BUILTINS_REVERSED (0) - #define MICROPY_PY_MICROPYTHON_MEM_INFO (0) - #define MICROPY_PY_FRAMEBUF (0) - #define EXTRA_BUILTIN_MODULES + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif + +#endif // SAMD51 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifndef CALIBRATE_CRYSTALLESS +#define CALIBRATE_CRYSTALLESS (0) +#endif + +#ifndef BOARD_HAS_CRYSTAL +#define BOARD_HAS_CRYSTAL (0) +#endif + +// if CALIBRATE_CRYSTALLESS is requested, make room for storing +// calibration data generated from external USB. +#ifndef CIRCUITPY_INTERNAL_CONFIG_SIZE + #if CALIBRATE_CRYSTALLESS + #define CIRCUITPY_INTERNAL_CONFIG_SIZE (NVMCTRL_ROW_SIZE) // 256 + #else + #define CIRCUITPY_INTERNAL_CONFIG_SIZE (0) + #endif +#endif + +// Flash layout, starting at 0x00000000 +// +// - bootloader (8 or 16kB) +// - firmware +// - internal CIRCUITPY flash filesystem (optional) +// - internal config, used to store crystalless clock calibration info (optional) +// - microntroller.nvm (optional) + +// Define these regions starting up from the bottom of flash: + +#define BOOTLOADER_START_ADDR (0x00000000) - #define MICROPY_PY_BUILTINS_COMPLEX (0) +#define CIRCUITPY_FIRMWARE_START_ADDR (BOOTLOADER_START_ADDR + BOOTLOADER_SIZE) - #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (0) +// Define these regions start down from the top of flash: + +#define CIRCUITPY_INTERNAL_NVM_START_ADDR \ + (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define CIRCUITPY_INTERNAL_CONFIG_START_ADDR \ + (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_INTERNAL_CONFIG_SIZE) + +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR \ + (CIRCUITPY_INTERNAL_CONFIG_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE) + +// The firmware space is the space left over between the fixed lower and upper regions. +#define CIRCUITPY_FIRMWARE_SIZE \ + (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) + +#if BOOTLOADER_START_ADDR % FLASH_PAGE_SIZE != 0 +#error BOOTLOADER_START_ADDR must be on a flash page boundary. #endif -// Disabled for now. -// { MP_OBJ_NEW_QSTR(MP_QSTR_touchio), (mp_obj_t)&touchio_module }, -// { MP_OBJ_NEW_QSTR(MP_QSTR__stage), (mp_obj_t)&stage_module }, -// { MP_OBJ_NEW_QSTR(MP_QSTR_usb_hid),(mp_obj_t)&usb_hid_module }, - - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&os_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&random_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&struct_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_supervisor), (mp_obj_t)&supervisor_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_math), (mp_obj_t)&math_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_time), (mp_obj_t)&time_module }, \ - EXTRA_BUILTIN_MODULES - -#define MICROPY_PORT_BUILTIN_DEBUG_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_uheap),(mp_obj_t)&uheap_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_ustack),(mp_obj_t)&ustack_module } - -// We need to provide a declaration/definition of alloca() -#include - -#ifdef __linux__ -#define MICROPY_MIN_USE_STDOUT (1) +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash erase (row or block) boundary. +#endif +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#ifdef __thumb__ -#define MICROPY_MIN_USE_CORTEX_CPU (1) -#define MICROPY_MIN_USE_SAMD21_MCU (1) +#if CIRCUITPY_INTERNAL_CONFIG_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be on a flash erase (row or block) boundary. +#endif +#if CIRCUITPY_INTERNAL_CONFIG_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#define MP_STATE_PORT MP_STATE_VM +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash erase (row or block) boundary. +#endif +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_ERASE_SIZE. +#endif + +#if CIRCUITPY_FIRMWARE_SIZE < 0 +#error No space left in flash for firmware after specifying other regions! +#endif + +// Turning off audioio, audiobusio, and touchio as necessary +// due to limitations of chips is handled in mpconfigboard.mk + +#include "peripherals/samd/dma.h" #define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - vstr_t *repl_line; \ - struct tc_module* audiodma_block_counter; \ - struct events_resource* audiodma_block_event; \ - struct tc_module* audioout_sample_timer; \ - struct dac_module* audioout_dac_instance; \ - struct events_resource* audioout_sample_event; \ - struct events_resource* audioout_dac_event; \ - FLASH_ROOT_POINTERS \ - -void run_background_tasks(void); -#define MICROPY_VM_HOOK_LOOP run_background_tasks(); -#define MICROPY_VM_HOOK_RETURN run_background_tasks(); - -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 -#define CIRCUITPY_BOOT_OUTPUT_FILE "/boot_out.txt" + CIRCUITPY_COMMON_ROOT_POINTERS \ + mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; #endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 0f3f399e22b7a..c2408feae3142 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -1,12 +1,77 @@ +# All linking can be done with this common templated linker script, which has +# parameters that vary based on chip and/or board. +LD_TEMPLATE_FILE = boards/common.template.ld + # Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk # $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. # This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. -ifeq ($(CHIP_FAMILY), samd21) + +ifeq ($(LONGINT_IMPL),NONE) MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none endif -ifeq ($(CHIP_FAMILY), samd51) +ifeq ($(LONGINT_IMPL),MPZ) MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz endif +ifeq ($(LONGINT_IMPL),LONGLONG) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=longlong +endif + +# Put samd21-only choices here. +ifeq ($(CHIP_FAMILY),samd21) +# frequencyio not yet verified as working on SAMD21, though make it possible to override. +ifndef CIRCUITPY_AUDIOMIXER +CIRCUITPY_AUDIOMIXER = 0 +endif + +ifndef CIRCUITPY_AUDIOMP3 +CIRCUITPY_AUDIOMP3 = 0 +endif + +ifndef CIRCUITPY_FREQUENCYIO +CIRCUITPY_FREQUENCYIO = 0 +endif + +ifndef CIRCUITPY_TOUCHIO_USE_NATIVE +CIRCUITPY_TOUCHIO_USE_NATIVE = 1 +endif + +# SAMD21 needs separate endpoint pairs for MSC BULK IN and BULK OUT, otherwise it's erratic. +USB_MSC_EP_NUM_OUT = 1 + +CIRCUITPY_ULAB = 0 + +endif # samd21 + +# Put samd51-only choices here. +ifeq ($(CHIP_FAMILY),samd51) +# No native touchio on SAMD51. +CIRCUITPY_TOUCHIO_USE_NATIVE = 0 + +# The ifndef's allow overriding in mpconfigboard.mk. + +ifndef CIRCUITPY_NETWORK +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 +endif + +ifndef CIRCUITPY_PS2IO +CIRCUITPY_PS2IO = 1 +endif + +ifndef CIRCUITPY_SAMD +CIRCUITPY_SAMD = 1 +endif + +ifndef CIRCUITPY_ULAB +ifneq ($(CIRCUITPY_SMALL_BUILD),1) +CIRCUITPY_ULAB = 1 +endif +endif + +endif # samd51 + INTERNAL_LIBM = 1 + +USB_SERIAL_NUMBER_LENGTH = 32 diff --git a/ports/atmel-samd/mphalport.c b/ports/atmel-samd/mphalport.c index 6ac66c9d143c9..96433d729f45c 100644 --- a/ports/atmel-samd/mphalport.c +++ b/ports/atmel-samd/mphalport.c @@ -1,3 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + #include #include "lib/mp-readline/readline.h" @@ -14,58 +40,47 @@ #include "hal/include/hal_delay.h" #include "hal/include/hal_gpio.h" #include "hal/include/hal_sleep.h" +#include "sam.h" #include "mpconfigboard.h" #include "mphalport.h" #include "reset.h" -#include "tick.h" -#include "usb.h" - -extern struct usart_module usart_instance; - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif - // if (reload_next_character) { - // return CHAR_CTRL_D; - // } - if (usb_bytes_available()) { - #ifdef MICROPY_HW_LED_RX - gpio_toggle_pin_level(MICROPY_HW_LED_RX); - #endif - return usb_read(); - } - } -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - #ifdef MICROPY_HW_LED_TX - gpio_toggle_pin_level(MICROPY_HW_LED_TX); - #endif +#include "supervisor/shared/tick.h" - usb_write(str, len); -} +extern uint32_t common_hal_mcu_processor_get_frequency(void); void mp_hal_delay_ms(mp_uint_t delay) { - uint64_t start_tick = ticks_ms; + uint64_t start_tick = supervisor_ticks_ms64(); uint64_t duration = 0; while (duration < delay) { - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif + RUN_BACKGROUND_TASKS; // Check to see if we've been CTRL-Ced by autoreload or the user. - if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))) { + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { break; } - duration = (ticks_ms - start_tick); + duration = (supervisor_ticks_ms64() - start_tick); // TODO(tannewt): Go to sleep for a little while while we wait. } } +// Use mp_hal_delay_us() for timing of less than 1ms. +// Do a simple timing loop to wait for a certain number of microseconds. +// Can be used when interrupts are disabled, which makes tick_delay() unreliable. +// +// Testing done at 48 MHz on SAMD21 and 120 MHz on SAMD51, multiplication and division cancel out. +// But get the frequency just in case. +#ifdef SAMD21 +#define DELAY_LOOP_ITERATIONS_PER_US ( (10U*48000000U) / common_hal_mcu_processor_get_frequency()) +#endif +#ifdef SAMD51 +#define DELAY_LOOP_ITERATIONS_PER_US ( (30U*120000000U) / common_hal_mcu_processor_get_frequency()) +#endif + void mp_hal_delay_us(mp_uint_t delay) { - tick_delay(delay); + for (uint32_t i = delay*DELAY_LOOP_ITERATIONS_PER_US; i > 0; i--) { + asm volatile("nop"); + } } void mp_hal_disable_all_interrupts(void) { diff --git a/ports/atmel-samd/mphalport.h b/ports/atmel-samd/mphalport.h index 3b5955a4ffc65..8a762e2584e8d 100644 --- a/ports/atmel-samd/mphalport.h +++ b/ports/atmel-samd/mphalport.h @@ -31,24 +31,21 @@ #include "lib/oofatfs/ff.h" -// Global millisecond tick count (driven by SysTick interrupt). -extern volatile uint64_t ticks_ms; +#include "supervisor/shared/tick.h" +// Global millisecond tick count (driven by SysTick interrupt). static inline mp_uint_t mp_hal_ticks_ms(void) { - return ticks_ms; + return supervisor_ticks_ms32(); } // Number of bytes in receive buffer volatile uint8_t usb_rx_count; volatile bool mp_cdc_enabled; -FIL* boot_output_file; - int receive_usb(void); void mp_hal_set_interrupt_char(int c); void mp_hal_disable_all_interrupts(void); - void mp_hal_enable_all_interrupts(void); #endif // MICROPY_INCLUDED_ATMEL_SAMD_MPHALPORT_H diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals new file mode 160000 index 0000000000000..b89811f22a24a --- /dev/null +++ b/ports/atmel-samd/peripherals @@ -0,0 +1 @@ +Subproject commit b89811f22a24ac350079ceaf0cdf0e62aa03f4f4 diff --git a/ports/atmel-samd/peripherals.c b/ports/atmel-samd/peripherals.c deleted file mode 100644 index 0c7f1dc63a7f1..0000000000000 --- a/ports/atmel-samd/peripherals.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "peripherals.h" - -#include "hpl_sercom_config.h" - -// Routines that are the same across all samd variants. - - -// Convert frequency to clock-speed-dependent value. Return 255 if > 255. -uint8_t samd_peripherals_spi_baudrate_to_baud_reg_value(const uint32_t baudrate) { - uint32_t baud_reg_value = (uint32_t) (((float) PROTOTYPE_SERCOM_SPI_M_SYNC_CLOCK_FREQUENCY / - (2 * baudrate)) - 0.5f); - return (uint8_t) (baud_reg_value > 255 ? 255 : baud_reg_value); -} - -// Convert BAUD reg value back to a frequency. -uint32_t samd_peripherals_spi_baud_reg_value_to_baudrate(const uint8_t baud_reg_value) { - return PROTOTYPE_SERCOM_SPI_M_SYNC_CLOCK_FREQUENCY / (2 * (baud_reg_value + 1)); -} - diff --git a/ports/atmel-samd/peripherals.h b/ports/atmel-samd/peripherals.h deleted file mode 100644 index 18c7f44d5c278..0000000000000 --- a/ports/atmel-samd/peripherals.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_PERIPHERALS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_PERIPHERALS_H - -#include - -#include "mpconfigport.h" - -// Routines common across chip families. -uint8_t samd_peripherals_spi_baudrate_to_baud_reg_value(const uint32_t baudrate); -uint32_t samd_peripherals_spi_baud_reg_value_to_baudrate(const uint8_t baud_reg_value); - -Sercom* sercom_insts[SERCOM_INST_NUM]; - -#ifdef SAMD21 -#include "samd21_peripherals.h" -#endif -#ifdef SAMD51 -#include "samd51_peripherals.h" -#endif - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_PINS_H diff --git a/ports/atmel-samd/pins.h b/ports/atmel-samd/pins.h deleted file mode 100644 index 1842efbc06798..0000000000000 --- a/ports/atmel-samd/pins.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_PINS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_PINS_H - -#include "mpconfigport.h" - -#ifdef SAMD21 -#include "samd21_pins.h" -#endif -#ifdef SAMD51 -#include "samd51_pins.h" -#endif - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_PINS_H diff --git a/ports/atmel-samd/reset.c b/ports/atmel-samd/reset.c index ba5bf9ba1fa40..735639cc4d7e0 100644 --- a/ports/atmel-samd/reset.c +++ b/ports/atmel-samd/reset.c @@ -34,10 +34,6 @@ void reset(void) { NVIC_SystemReset(); } -void reset_to_bootloader(void) { - _bootloader_dbl_tap = DBL_TAP_MAGIC; - reset(); -} extern uint32_t _srelocate; bool bootloader_available(void) { diff --git a/ports/atmel-samd/reset.h b/ports/atmel-samd/reset.h index ea955c655d764..b589d261115eb 100644 --- a/ports/atmel-samd/reset.h +++ b/ports/atmel-samd/reset.h @@ -31,6 +31,7 @@ // Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set +#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef extern uint32_t _bootloader_dbl_tap; diff --git a/ports/atmel-samd/samd21_peripherals.c b/ports/atmel-samd/samd21_peripherals.c deleted file mode 100644 index a27e49e0e5e99..0000000000000 --- a/ports/atmel-samd/samd21_peripherals.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "hpl/gclk/hpl_gclk_base.h" -#include "hpl/pm/hpl_pm_base.h" - -// The clock initializer values are rather random, so we need to put them in -// tables for lookup. We can't compute them. - -static const uint8_t SERCOMx_GCLK_ID_CORE[] = { - SERCOM0_GCLK_ID_CORE, - SERCOM1_GCLK_ID_CORE, - SERCOM2_GCLK_ID_CORE, - SERCOM3_GCLK_ID_CORE, -#ifdef SERCOM4 - SERCOM4_GCLK_ID_CORE, -#endif -#ifdef SERCOM5 - SERCOM5_GCLK_ID_CORE, -#endif -}; - -static const uint8_t SERCOMx_GCLK_ID_SLOW[] = { - SERCOM0_GCLK_ID_SLOW, - SERCOM1_GCLK_ID_SLOW, - SERCOM2_GCLK_ID_SLOW, - SERCOM3_GCLK_ID_SLOW, -#ifdef SERCOM4 - SERCOM4_GCLK_ID_SLOW, -#endif -#ifdef SERCOM5 - SERCOM5_GCLK_ID_SLOW, -#endif -}; - -Sercom* sercom_insts[SERCOM_INST_NUM] = SERCOM_INSTS; - -// Clock initialization as done in Atmel START. -void samd_peripherals_sercom_clock_init(Sercom* sercom, uint8_t sercom_index) { - _pm_enable_bus_clock(PM_BUS_APBC, sercom); - _gclk_enable_channel(SERCOMx_GCLK_ID_CORE[sercom_index], GCLK_CLKCTRL_GEN_GCLK0_Val); - _gclk_enable_channel(SERCOMx_GCLK_ID_SLOW[sercom_index], GCLK_CLKCTRL_GEN_GCLK3_Val); -} - -// Figure out the DOPO value given the chosen clock pad and mosi pad. -// Return an out-of-range value (255) if the combination is not permitted. -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK -uint8_t samd_peripherals_get_spi_dopo(uint8_t clock_pad, uint8_t mosi_pad) { - if (clock_pad == 1) { - if (mosi_pad == 0) { - return 0; - } else if (mosi_pad == 3) { - return 2; - } - } else if (clock_pad == 3) { - if (mosi_pad == 0) { - return 3; - } else if (mosi_pad == 2) { - return 1; - } - } - return 255; -} - -bool samd_peripherals_valid_spi_clock_pad(uint8_t clock_pad) { - return clock_pad == 1 || clock_pad == 3; -} diff --git a/ports/atmel-samd/samd21_peripherals.h b/ports/atmel-samd/samd21_peripherals.h deleted file mode 100644 index 7a4477891690f..0000000000000 --- a/ports/atmel-samd/samd21_peripherals.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 by Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H - -#include "include/sam.h" - -void samd_peripherals_sercom_clock_init(Sercom* sercom, uint8_t sercom_index); -uint8_t samd_peripherals_get_spi_dopo(uint8_t clock_pad, uint8_t mosi_pad); -bool samd_peripherals_valid_spi_clock_pad(uint8_t clock_pad); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H diff --git a/ports/atmel-samd/samd21_pins.c b/ports/atmel-samd/samd21_pins.c deleted file mode 100644 index eafc4b5fb692b..0000000000000 --- a/ports/atmel-samd/samd21_pins.c +++ /dev/null @@ -1,531 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/microcontroller/Pin.h" - -#include "samd21_pins.h" - -#define SERCOM(sercom_index, p_pad) \ -{ \ - .index = sercom_index, \ - .pad = p_pad \ -} - -#define NO_SERCOM \ -{ \ - .index = 0x3f, \ - .pad = 0 \ -} - - -#define TCC(p_index, p_wave_output) \ -{ \ - .index = p_index, \ - .is_tc = false, \ - .wave_output = p_wave_output \ -} - -#define TC(p_index, p_wave_output) \ -{ \ - .index = p_index - 3, \ - .is_tc = true, \ - .wave_output = p_wave_output \ -} - -#define NO_TIMER TCC(0xff, 0) - -#define TOUCH(y_line) \ - .has_touch = true, \ - .touch_y_line = y_line, - -#define NO_TOUCH \ - .has_touch = false, - -#define EXTINT_CHANNEL(channel) \ - .has_extint = true, \ - .extint_channel = channel, - -#define NO_EXTINT \ - .has_extint = false, - -#define ADC_INPUT(input) input - -#define NO_ADC 0xff - -// This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_extint, p_adc, p_touch, \ - p_primary_sercom, p_secondary_sercom, \ - p_primary_timer, p_secondary_timer) \ -const mcu_pin_obj_t pin_## p_name = { \ - { &mcu_pin_type }, \ - .name = MP_QSTR_## p_name, \ - .pin = (PIN_## p_name), \ - p_extint \ - p_touch \ - .adc_input = {p_adc}, \ - .timer = { p_primary_timer, p_secondary_timer}, \ - .sercom = {p_primary_sercom, p_secondary_sercom}, \ -} - -// Pins in datasheet order. -// NOTE(tannewt): TC wave out 0 is commented out because the first channel is -// used to vary the 16 bit timer's frequency. -#ifdef PIN_PA00 -PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(1, 0), - TCC(2, 0), - NO_TIMER); -#endif -#ifdef PIN_PA01 -PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(1, 1), - TCC(2, 1), - NO_TIMER); -#endif -#ifdef PIN_PA02 -// Touch is not allowed on A0 (PA02) on Circuit Playground Express. -PIN(PA02, EXTINT_CHANNEL(2), ADC_INPUT(0), - #ifdef PA02_NO_TOUCH - NO_TOUCH, - #else - TOUCH(0), - #endif - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA03 -PIN(PA03, EXTINT_CHANNEL(3), ADC_INPUT(1), TOUCH(1), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB04 -PIN(PB04, EXTINT_CHANNEL(4), ADC_INPUT(12), TOUCH(10), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB05 -PIN(PB05, EXTINT_CHANNEL(5), ADC_INPUT(13), TOUCH(11), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB06 -PIN(PB06, EXTINT_CHANNEL(6), ADC_INPUT(14), TOUCH(12), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB07 -PIN(PB07, EXTINT_CHANNEL(7), ADC_INPUT(15), TOUCH(13), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB08 -PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), TOUCH(14), - NO_SERCOM, - SERCOM(4, 0), - TC(4, 0), - NO_TIMER); -#endif -#ifdef PIN_PB09 -PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), TOUCH(15), - NO_SERCOM, - SERCOM(4, 1), - TC(4, 1), - NO_TIMER); -#endif -#ifdef PIN_PA04 -PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), TOUCH(2), - NO_SERCOM, - SERCOM(0, 0), - TCC(0, 0), - NO_TIMER); -#endif -#ifdef PIN_PA05 -PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), TOUCH(3), - NO_SERCOM, - SERCOM(0, 1), - TCC(0, 1), - NO_TIMER); -#endif -#ifdef PIN_PA06 -PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), TOUCH(4), - NO_SERCOM, - SERCOM(0, 2), - TCC(1, 0), - NO_TIMER); -#endif -#ifdef PIN_PA07 -PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), TOUCH(5), - NO_SERCOM, - SERCOM(0, 3), - TCC(1, 1), - NO_TIMER); -#endif -#ifdef PIN_PA08 -PIN(PA08, NO_EXTINT, ADC_INPUT(16), NO_TOUCH, - SERCOM(0, 0), - SERCOM(2, 0), - TCC(0, 0), - TCC(1, 2)); -#endif -#ifdef PIN_PA09 -PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(17), NO_TOUCH, - SERCOM(0, 1), - SERCOM(2, 1), - TCC(0, 1), - TCC(1, 3)); -#endif -#ifdef PIN_PA10 -PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(18), NO_TOUCH, - SERCOM(0, 2), - SERCOM(2, 2), - TCC(1, 0), - TCC(0, 2)); -#endif -#ifdef PIN_PA11 -PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(19), NO_TOUCH, - SERCOM(0, 3), - SERCOM(2, 3), - TCC(1, 1), - TCC(0, 3)); -#endif -#ifdef PIN_PB10 -PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(4, 2), - TC(5, 0), - TCC(0, 4)); -#endif -#ifdef PIN_PB11 -PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(4, 3), - TC(5, 1), - TCC(0, 5)); -#endif -#ifdef PIN_PB12 -PIN(PB12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH, - SERCOM(4, 0), - NO_SERCOM, - TC(4, 0), - TCC(0, 6)); -#endif -#ifdef PIN_PB13 -PIN(PB13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH, - SERCOM(4, 1), - NO_SERCOM, - TC(4, 1), - TCC(0, 7)); -#endif -#ifdef PIN_PB14 -PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH, - SERCOM(4, 2), - NO_SERCOM, - TC(5, 0), - NO_TIMER); -#endif - -// Second page. -#ifdef PIN_PB15 -PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH, - SERCOM(4, 3), - NO_SERCOM, - TC(5, 1), - NO_TIMER); -#endif -#ifdef PIN_PA12 -PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH, - SERCOM(2, 0), - SERCOM(4, 0), - TCC(2, 0), - TCC(0, 6)); -#endif -#ifdef PIN_PA13 -PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH, - SERCOM(2, 1), - SERCOM(4, 1), - TCC(2, 1), - TCC(0, 7)); -#endif -#ifdef PIN_PA14 -PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH, - SERCOM(2, 2), - #ifdef SERCOM4 - SERCOM(4, 2), - #else - NO_SERCOM, - #endif - TC(3, 0), - TCC(0, 4)); -#endif -#ifdef PIN_PA15 -PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH, - SERCOM(2, 3), - #ifdef SERCOM4 - SERCOM(4, 3), - #else - NO_SERCOM, - #endif - TC(3, 1), - TCC(0, 5)); -#endif -#ifdef PIN_PA16 -PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH, - SERCOM(1, 0), - SERCOM(3, 0), - TCC(2, 0), - TCC(0, 6)); -#endif -#ifdef PIN_PA17 -PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH, - SERCOM(1, 1), - SERCOM(3, 1), - TCC(2, 1), - TCC(0, 7)); -#endif -#ifdef PIN_PA18 -PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_TOUCH, - SERCOM(1, 2), - SERCOM(3, 2), - TC(3, 0), - TCC(0, 2)); -#endif -#ifdef PIN_PA19 -PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_TOUCH, - SERCOM(1, 3), - SERCOM(3, 3), - TC(3, 1), - TCC(0, 3)); -#endif -#ifdef PIN_PB16 -PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH, - SERCOM(5, 0), - NO_SERCOM, - #ifdef TC6 - TC(6, 0), - #else - NO_TIMER, - #endif - TCC(0, 4)); -#endif -#ifdef PIN_PB17 -PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH, - SERCOM(5, 1), - NO_SERCOM, - #ifdef TC6 - TC(6, 1), - #else - NO_TIMER, - #endif - TCC(0, 5)); -#endif -#ifdef PIN_PA20 -PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_TOUCH, - SERCOM(5, 2), - SERCOM(3, 2), - #ifdef TC7 - TC(7, 0), - #else - NO_TIMER, - #endif - TCC(0, 6)); -#endif -#ifdef PIN_PA21 -PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_TOUCH, - SERCOM(5, 3), - SERCOM(3, 3), - #ifdef TC7 - TC(7, 1), - #else - NO_TIMER, - #endif - TCC(0, 7)); -#endif -#ifdef PIN_PA22 -PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH, - SERCOM(3, 0), - #ifdef SERCOM5 - SERCOM(5, 0), - #else - NO_SERCOM, - #endif - TC(4, 0), - TCC(0, 4)); -#endif -#ifdef PIN_PA23 -PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH, - SERCOM(3, 1), - #ifdef SERCOM5 - SERCOM(5, 1), - #else - NO_SERCOM, - #endif - TC(4, 1), - TCC(0, 5)); -#endif -#ifdef PIN_PA24 -PIN(PA24, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH, - SERCOM(3, 2), - #ifdef SERCOM5 - SERCOM(5, 2), - #else - NO_SERCOM, - #endif - TC(5, 0), - TCC(0, 2)); -#endif -#ifdef PIN_PA25 -PIN(PA25, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH, - SERCOM(3, 3), - #ifdef SERCOM5 - SERCOM(5, 3), - #else - NO_SERCOM, - #endif - TC(5, 1), - TCC(1, 3)); -#endif -#ifdef PIN_PB22 -PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(5, 2), - #ifdef TC7 - TC(7, 0, 0), - #else - NO_TIMER, - #endif - NO_TIMER); -#endif -#ifdef PIN_PB23 -PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(5, 3), - #ifdef TC7 - TC(7, 1, 1), - #else - NO_TIMER, - #endif - NO_TIMER); -#endif -#ifdef PIN_PA27 -PIN(PA27, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA28 -PIN(PA28, EXTINT_CHANNEL(8), NO_ADC, NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA30 -PIN(PA30, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(1, 2), - TCC(1, 0), - NO_TIMER); -#endif -#ifdef PIN_PA31 -PIN(PA31, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(1, 3), - TCC(1, 1), - NO_TIMER); -#endif -#ifdef PIN_PB30 -PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(5, 0), - TCC(0, 0), - TCC(1, 2)); -#endif -#ifdef PIN_PB31 -PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(5, 1), - TCC(0, 1), - TCC(1, 3)); -#endif -#ifdef PIN_PB00 -PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(8), TOUCH(6), - NO_SERCOM, - SERCOM(5, 2), - #ifdef TC7 - TC(7, 0, 0), - #else - NO_TIMER, - #endif - NO_TIMER); -#endif -#ifdef PIN_PB01 -PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(9), TOUCH(7), - NO_SERCOM, - SERCOM(5, 3)), - #ifdef TC7 - TC(7, 1), - #else - NO_TIMER, - #endif - NO_TIMER; -#endif -#ifdef PIN_PB02 -PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(10), TOUCH(8), - NO_SERCOM, - SERCOM(5, 0), - #ifdef TC6 - TC(6, 0), - #else - NO_TIMER, - #endif - NO_TIMER); -#endif -#ifdef PIN_PB03 -PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(11), TOUCH(9), - NO_SERCOM, - SERCOM(5, 1), - #ifdef TC6 - TC(6, 1), - #else - NO_TIMER, - #endif - NO_TIMER); -#endif diff --git a/ports/atmel-samd/samd21_pins.h b/ports/atmel-samd/samd21_pins.h deleted file mode 100644 index 522563ef11454..0000000000000 --- a/ports/atmel-samd/samd21_pins.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 by Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H - -#include "include/sam.h" - -#include "common-hal/microcontroller/Pin.h" - -void reset_pin(uint8_t pin); - -#define MUX_C 2 -#define MUX_D 3 -#define MUX_E 4 -#define MUX_F 5 -#define PINMUX(pin, mux) ((((uint32_t) pin) << 16) | (mux)) - -#define NO_PIN PORT_BITS - -// Pins in datasheet order. -#ifdef PIN_PA00 -extern const mcu_pin_obj_t pin_PA00; -#endif -#ifdef PIN_PA01 -extern const mcu_pin_obj_t pin_PA01; -#endif -#ifdef PIN_PA02 -extern const mcu_pin_obj_t pin_PA02; -#endif -#ifdef PIN_PA03 -extern const mcu_pin_obj_t pin_PA03; -#endif -#ifdef PIN_PB04 -extern const mcu_pin_obj_t pin_PB04; -#endif -#ifdef PIN_PB05 -extern const mcu_pin_obj_t pin_PB05; -#endif -#ifdef PIN_PB06 -extern const mcu_pin_obj_t pin_PB06; -#endif -#ifdef PIN_PB07 -extern const mcu_pin_obj_t pin_PB07; -#endif -#ifdef PIN_PB08 -extern const mcu_pin_obj_t pin_PB08; -#endif -#ifdef PIN_PB09 -extern const mcu_pin_obj_t pin_PB09; -#endif -#ifdef PIN_PA04 -extern const mcu_pin_obj_t pin_PA04; -#endif -#ifdef PIN_PA05 -extern const mcu_pin_obj_t pin_PA05; -#endif -#ifdef PIN_PA06 -extern const mcu_pin_obj_t pin_PA06; -#endif -#ifdef PIN_PA07 -extern const mcu_pin_obj_t pin_PA07; -#endif -#ifdef PIN_PA08 -extern const mcu_pin_obj_t pin_PA08; -#endif -#ifdef PIN_PA09 -extern const mcu_pin_obj_t pin_PA09; -#endif -#ifdef PIN_PA10 -extern const mcu_pin_obj_t pin_PA10; -#endif -#ifdef PIN_PA11 -extern const mcu_pin_obj_t pin_PA11; -#endif -#ifdef PIN_PB10 -extern const mcu_pin_obj_t pin_PB10; -#endif -#ifdef PIN_PB11 -extern const mcu_pin_obj_t pin_PB11; -#endif -#ifdef PIN_PB12 -extern const mcu_pin_obj_t pin_PB12; -#endif -#ifdef PIN_PB13 -extern const mcu_pin_obj_t pin_PB13; -#endif -#ifdef PIN_PB14 -extern const mcu_pin_obj_t pin_PB14; -#endif - -// Second page. -#ifdef PIN_PB15 -extern const mcu_pin_obj_t pin_PB15; -#endif -#ifdef PIN_PA12 -extern const mcu_pin_obj_t pin_PA12; -#endif -#ifdef PIN_PA13 -extern const mcu_pin_obj_t pin_PA13; -#endif -#ifdef PIN_PA14 -extern const mcu_pin_obj_t pin_PA14; -#endif -#ifdef PIN_PA15 -extern const mcu_pin_obj_t pin_PA15; -#endif -#ifdef PIN_PA16 -extern const mcu_pin_obj_t pin_PA16; -#endif -#ifdef PIN_PA17 -extern const mcu_pin_obj_t pin_PA17; -#endif -#ifdef PIN_PA18 -extern const mcu_pin_obj_t pin_PA18; -#endif -#ifdef PIN_PA19 -extern const mcu_pin_obj_t pin_PA19; -#endif -#ifdef PIN_PB16 -extern const mcu_pin_obj_t pin_PB16; -#endif -#ifdef PIN_PB17 -extern const mcu_pin_obj_t pin_PB17; -#endif -#ifdef PIN_PA20 -extern const mcu_pin_obj_t pin_PA20; -#endif -#ifdef PIN_PA21 -extern const mcu_pin_obj_t pin_PA21; -#endif -#ifdef PIN_PA22 -extern const mcu_pin_obj_t pin_PA22; -#endif -#ifdef PIN_PA23 -extern const mcu_pin_obj_t pin_PA23; -#endif -#ifdef PIN_PA24 -extern const mcu_pin_obj_t pin_PA24; -#endif -#ifdef PIN_PA25 -extern const mcu_pin_obj_t pin_PA25; -#endif -#ifdef PIN_PB22 -extern const mcu_pin_obj_t pin_PB22; -#endif -#ifdef PIN_PB23 -extern const mcu_pin_obj_t pin_PB23; -#endif -#ifdef PIN_PA27 -extern const mcu_pin_obj_t pin_PA27; -#endif -#ifdef PIN_PA28 -extern const mcu_pin_obj_t pin_PA28; -#endif -#ifdef PIN_PA30 -extern const mcu_pin_obj_t pin_PA30; -#endif -#ifdef PIN_PA31 -extern const mcu_pin_obj_t pin_PA31; -#endif -#ifdef PIN_PB30 -extern const mcu_pin_obj_t pin_PB30; -#endif -#ifdef PIN_PB31 -extern const mcu_pin_obj_t pin_PB31; -#endif -#ifdef PIN_PB00 -extern const mcu_pin_obj_t pin_PB00; -#endif -#ifdef PIN_PB01 -extern const mcu_pin_obj_t pin_PB01; -#endif -#ifdef PIN_PB02 -extern const mcu_pin_obj_t pin_PB02; -#endif -#ifdef PIN_PB03 -extern const mcu_pin_obj_t pin_PB03; -#endif - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H diff --git a/ports/atmel-samd/samd51_peripherals.c b/ports/atmel-samd/samd51_peripherals.c deleted file mode 100644 index 8f37bdfd115d8..0000000000000 --- a/ports/atmel-samd/samd51_peripherals.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "hpl/gclk/hpl_gclk_base.h" -#include "hri/hri_mclk_d51.h" - -// The clock initializer values are rather random, so we need to put them in -// tables for lookup. We can't compute them. - -static const uint8_t SERCOMx_GCLK_ID_CORE[] = { - SERCOM0_GCLK_ID_CORE, - SERCOM1_GCLK_ID_CORE, - SERCOM2_GCLK_ID_CORE, - SERCOM3_GCLK_ID_CORE, - SERCOM4_GCLK_ID_CORE, - SERCOM5_GCLK_ID_CORE, -#ifdef SERCOM6 - SERCOM6_GCLK_ID_CORE, -#endif -#ifdef SERCOM7 - SERCOM7_GCLK_ID_CORE, -#endif -}; - -static const uint8_t SERCOMx_GCLK_ID_SLOW[] = { - SERCOM0_GCLK_ID_SLOW, - SERCOM1_GCLK_ID_SLOW, - SERCOM2_GCLK_ID_SLOW, - SERCOM3_GCLK_ID_SLOW, - SERCOM4_GCLK_ID_SLOW, - SERCOM5_GCLK_ID_SLOW, -#ifdef SERCOM6 - SERCOM6_GCLK_ID_SLOW, -#endif -#ifdef SERCOM7 - SERCOM7_GCLK_ID_SLOW, -#endif -}; - -Sercom* sercom_insts[SERCOM_INST_NUM] = SERCOM_INSTS; - -// Clock initialization as done in Atmel START. -void samd_peripherals_sercom_clock_init(Sercom* sercom, uint8_t sercom_index) { - hri_gclk_write_PCHCTRL_reg(GCLK, - SERCOMx_GCLK_ID_CORE[sercom_index], - GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos)); - hri_gclk_write_PCHCTRL_reg(GCLK, - SERCOMx_GCLK_ID_SLOW[sercom_index], - GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos)); - - // hri_mclk_set_APBAMASK_SERCOMx_bit is an inline, so let's use a switch, not a table. - switch (sercom_index) { - case 0: - hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK); - break; - case 1: - hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK); - break; - case 2: - hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK); - break; - case 3: - hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK); - break; - case 4: - hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK); - break; - case 5: - hri_mclk_set_APBDMASK_SERCOM5_bit(MCLK); - break; -#ifdef SERCOM6 - case 6: - hri_mclk_set_APBDMASK_SERCOM6_bit(MCLK); - break; -#endif -#ifdef SERCOM7 - case 7: - hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK); - break; -#endif - } -} - - -// Figure out the DOPO value given the chosen clock pad and mosi pad. -// Return an out-of-range value (255) if the combination is not permitted -// The ASF4 config files list this, but the SAMD51 datasheet -// says 0x1 and 0x3 are reserved, so don't allow pad 3 SCK. -// Transmit Data Pinout -// <0x0=>PAD[0,1]_DO_SCK -// <0x1=>PAD[2,3]_DO_SCK [RESERVED] -// <0x2=>PAD[3,1]_DO_SCK -// <0x3=>PAD[0,3]_DO_SCK [RESERVED] -uint8_t samd_peripherals_get_spi_dopo(uint8_t clock_pad, uint8_t mosi_pad) { - if (clock_pad != 1) { - return 255; - } - if (mosi_pad == 0) { - return 0x1; - } - if (mosi_pad == 3) { - return 0x2; - } - return 255; -} - -bool samd_peripherals_valid_spi_clock_pad(uint8_t clock_pad) { - return clock_pad == 1; -} diff --git a/ports/atmel-samd/samd51_peripherals.h b/ports/atmel-samd/samd51_peripherals.h deleted file mode 100644 index c47e3bee769b1..0000000000000 --- a/ports/atmel-samd/samd51_peripherals.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 by Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H - -#include "sam.h" - -void samd_peripherals_sercom_clock_init(Sercom* sercom, uint8_t sercom_index); -uint8_t samd_peripherals_get_spi_dopo(uint8_t clock_pad, uint8_t mosi_pad); -bool samd_peripherals_valid_spi_clock_pad(uint8_t clock_pad); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H - diff --git a/ports/atmel-samd/samd51_pins.c b/ports/atmel-samd/samd51_pins.c deleted file mode 100644 index 6d597b6e1a0d6..0000000000000 --- a/ports/atmel-samd/samd51_pins.c +++ /dev/null @@ -1,1234 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/microcontroller/Pin.h" - -#include "samd51_pins.h" - -#define SERCOM(sercom_index, p_pad) \ -{ \ - .index = sercom_index, \ - .pad = p_pad \ -} - -#define NO_SERCOM \ -{ \ - .index = 0x3f, \ - .pad = 0 \ -} - -#define TCC(p_index, p_wave_output) \ -{ \ - .index = p_index, \ - .is_tc = false, \ - .wave_output = p_wave_output \ -} - -#define TC(p_index, p_wave_output) \ -{ \ - .index = p_index, \ - .is_tc = true, \ - .wave_output = p_wave_output \ -} - -#define NO_TIMER TCC(0xff, 0) - -#define TOUCH(y_line) \ - .has_touch = true, \ - .touch_y_line = y_line, - -#define NO_TOUCH \ - .has_touch = false, - -#define EXTINT_CHANNEL(channel) \ - .has_extint = true, \ - .extint_channel = channel, - -#define NO_EXTINT \ - .has_extint = false, - -#define ADC_INPUT(input) (input) - -#define NO_ADC 0xff - -// This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_extint, p_adc0, p_adc1, p_touch, \ - p_primary_sercom, p_secondary_sercom, \ - p_primary_timer, p_secondary_timer, p_tertiary_timer) \ -const mcu_pin_obj_t pin_## p_name = { \ - { &mcu_pin_type }, \ - .name = MP_QSTR_## p_name, \ - .pin = (PIN_## p_name), \ - p_extint \ - p_touch \ - .adc_input = {p_adc0, p_adc1}, \ - .timer = {p_primary_timer, p_secondary_timer, p_tertiary_timer}, \ - .sercom = {p_primary_sercom, p_secondary_sercom}, \ -} - -// Pins in datasheet order. -// NOTE(tannewt): TC wave out 0 is commented out because the first channel is -// used to vary the 16 bit timer's frequency. -#ifdef PIN_PB03 -PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(15), NO_ADC, - TOUCH(21), - NO_SERCOM, - SERCOM(5, 1), - #ifdef TC6 - TC(6, 1), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA00 -PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, - NO_TOUCH, - NO_SERCOM, - SERCOM(1, 0), - TC(2, 0), - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA01 -PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, - NO_TOUCH, - NO_SERCOM, - SERCOM(1, 1), - TC(2, 0), - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC00 -PIN(PC00, EXTINT_CHANNEL(0), NO_ADC, ADC_INPUT(10), - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC01 -PIN(PC01, EXTINT_CHANNEL(1), NO_ADC, ADC_INPUT(11), - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC02 -PIN(PC02, EXTINT_CHANNEL(2), NO_ADC, ADC_INPUT(4), - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC03 -PIN(PC03, EXTINT_CHANNEL(3), NO_ADC, ADC_INPUT(5), - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA02 -PIN(PA02, EXTINT_CHANNEL(2), ADC_INPUT(0), NO_ADC, - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA03 -PIN(PA03, EXTINT_CHANNEL(3), ADC_INPUT(1), NO_ADC, - TOUCH(0), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB04 -PIN(PB04, EXTINT_CHANNEL(4), NO_ADC, ADC_INPUT(6), - #ifdef PINMUX_PB04B_ADC0_PTCXY22 - TOUCH(22), - #else - NO_TOUCH, - #endif - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB05 -PIN(PB05, EXTINT_CHANNEL(5), NO_ADC, ADC_INPUT(7), - #ifdef PINMUX_PB05B_ADC0_PTCXY23 - TOUCH(23), - #else - NO_TOUCH, - #endif - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PD00 -PIN(PD00, EXTINT_CHANNEL(0), NO_ADC, ADC_INPUT(14), NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PD01 -PIN(PD01, EXTINT_CHANNEL(1), NO_ADC, ADC_INPUT(15), NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB06 -PIN(PB06, EXTINT_CHANNEL(6), NO_ADC, ADC_INPUT(8), - #ifdef PINMUX_PB06B_ADC0_PTCXY24 - TOUCH(24), - #else - NO_TOUCH, - #endif - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB07 -PIN(PB07, EXTINT_CHANNEL(7), NO_ADC, ADC_INPUT(9), - #ifdef PINMUX_PB07B_ADC0_PTCXY25 - TOUCH(25), - #else - NO_TOUCH, - #endif - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB08 -PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), ADC_INPUT(0), TOUCH(1), - NO_SERCOM, - SERCOM(4, 0), - #ifdef TC4 - TC(4, 0), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB09 -PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), ADC_INPUT(1), TOUCH(2), - NO_SERCOM, - SERCOM(4, 1), - #ifdef TC4 - TC(4, 1), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA04 -PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), NO_ADC, TOUCH(3), - NO_SERCOM, - SERCOM(0, 0), - TC(0, 0), - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA05 -PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(0, 1), - TC(0, 1), - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA06 -PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), NO_ADC, TOUCH(4), - NO_SERCOM, - SERCOM(0, 2), - TC(1, 0), - NO_TIMER, - NO_TIMER); -#endif - -// Second page -#ifdef PIN_PA07 -PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), NO_ADC, TOUCH(5), - NO_SERCOM, - SERCOM(0, 3), - TC(1, 1), - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC04 -PIN(PC04, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 0), - #else - NO_SERCOM, - #endif - NO_SERCOM, - NO_TIMER, - TCC(0, 0), - NO_TIMER); -#endif -#ifdef PIN_PC05 -PIN(PC05, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 1), - #else - NO_SERCOM, - #endif - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC06 -PIN(PC06, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 2), - #else - NO_SERCOM, - #endif - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC07 -PIN(PC07, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 3), - #else - NO_SERCOM, - #endif - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA08 -PIN(PA08, NO_EXTINT, ADC_INPUT(8), ADC_INPUT(2), TOUCH(6), - SERCOM(0, 0), - SERCOM(2, 1), - TC(0, 0), - TCC(0, 0), - TCC(1, 4)); -#endif -#ifdef PIN_PA09 -PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(9), ADC_INPUT(3), TOUCH(7), - SERCOM(0, 1), - SERCOM(2, 0), - TC(0, 1), - TCC(0, 1), - TCC(1, 5)); -#endif -#ifdef PIN_PA10 -PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(10), NO_ADC, TOUCH(8), - SERCOM(0, 2), - SERCOM(2, 2), - TC(1, 0), - TCC(0, 2), - TCC(1, 6)); -#endif -#ifdef PIN_PA11 -PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(11), NO_ADC, TOUCH(9), - SERCOM(0, 3), - SERCOM(2, 3), - TC(1, 0), - TCC(0, 3), - TCC(1, 7)); -#endif -#ifdef PIN_PB10 -PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(4, 2), - #ifdef TC5 - TC(5, 0), - #else - NO_TIMER, - #endif - TCC(0, 4), - TCC(1, 0)); -#endif -#ifdef PIN_PB11 -PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH, - NO_SERCOM, - SERCOM(4, 3), - #ifdef TC5 - TC(5, 1), - #else - NO_TIMER, - #endif - TCC(0, 5), - TCC(1, 1)); -#endif -#ifdef PIN_PB12 -PIN(PB12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, - #ifdef PINMUX_PB12B_ADC0_PTCXY26 - TOUCH(26), - #else - NO_TOUCH, - #endif - SERCOM(4, 0), - NO_SERCOM, - #ifdef TC4 - TC(4, 0), - #else - NO_TIMER, - #endif - #ifdef TCC3 - TCC(3, 0), - #else - NO_TIMER, - #endif - TCC(0, 0)); -#endif -#ifdef PIN_PB13 -PIN(PB13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, - #ifdef PINMUX_PB13B_ADC0_PTCXY27 - TOUCH(27), - #else - NO_TOUCH, - #endif - SERCOM(4, 1), - NO_SERCOM, - #ifdef TC4 - TC(4, 1), - #else - NO_TIMER, - #endif - #ifdef TCC3 - TCC(3, 1), - #else - NO_TIMER, - #endif - TCC(0, 1)); -#endif -#ifdef PIN_PB14 -PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, - #ifdef PINMUX_PB14B_ADC0_PTCXY28 - TOUCH(28), - #else - NO_TOUCH, - #endif - SERCOM(4, 2), - NO_SERCOM, - #ifdef TC5 - TC(5, 0), - #else - NO_TIMER, - #endif - #ifdef TCC4 - TCC(4, 0), - #else - NO_TIMER, - #endif - TCC(0, 2)); -#endif -#ifdef PIN_PB15 -PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, - #ifdef PINMUX_PB15B_ADC0_PTCXY29 - TOUCH(28), - #else - NO_TOUCH, - #endif - SERCOM(4, 3), - NO_SERCOM, - #ifdef TC5 - TC(5, 1), - #else - NO_TIMER, - #endif - #ifdef TCC4 - TCC(4, 1), - #else - NO_TIMER, - #endif - TCC(0, 3)); -#endif -#ifdef PIN_PD08 -PIN(PD08, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 0), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 1), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 1), - NO_TIMER); -#endif -#ifdef PIN_PD09 -PIN(PD09, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 1), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 0), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 2), - NO_TIMER); -#endif -#ifdef PIN_PD10 -PIN(PD10, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 2), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 2), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 3), - NO_TIMER); -#endif -#ifdef PIN_PD11 -PIN(PD11, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 3), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 3), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 4), - NO_TIMER); -#endif -#ifdef PIN_PD12 -PIN(PD12, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - TCC(0, 5), - NO_TIMER); -#endif -#ifdef PIN_PC10 -PIN(PC10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 2), - #else - NO_SERCOM, - #endif - #ifdef SERCOM7 - SERCOM(7, 2), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 0), - TCC(1, 4)); -#endif -#ifdef PIN_PC11 -PIN(PC11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 3), - #else - NO_SERCOM, - #endif - #ifdef SERCOM7 - SERCOM(7, 3), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 1), - TCC(1, 5)); -#endif -#ifdef PIN_PC12 -PIN(PC12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 0), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 1), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 2), - TCC(1, 6)); -#endif -#ifdef PIN_PC13 -PIN(PC13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 1), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 0), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 3), - TCC(1, 7)); -#endif -#ifdef PIN_PC14 -PIN(PC14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 2), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 2), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 4), - TCC(1, 0)); -#endif -#ifdef PIN_PC15 -PIN(PC15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 3), - #else - NO_SERCOM, - #endif - #ifdef SERCOM6 - SERCOM(6, 3), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(0, 5), - TCC(1, 1)); -#endif -#ifdef PIN_PA12 -PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 0), - SERCOM(4, 1), - TC(2, 0), - TCC(0, 6), - TCC(1, 2)); -#endif -#ifdef PIN_PA13 -PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 1), - SERCOM(4, 0), - TC(2, 1), - TCC(0, 7), - TCC(1, 3)); -#endif - -// Third page -#ifdef PIN_PA14 -PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 2), - SERCOM(4, 2), - TC(3, 0), - TCC(2, 0), - TCC(1, 2)); -#endif -#ifdef PIN_PA15 -PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 3), - SERCOM(4, 3), - TC(3, 1), - TCC(2, 1), - TCC(1, 3)); -#endif -#ifdef PIN_PA16 -PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, TOUCH(10), - SERCOM(1, 0), - SERCOM(3, 1), - TC(2, 0), - TCC(1, 0), - TCC(0, 4)); -#endif -#ifdef PIN_PA17 -PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, TOUCH(11), - SERCOM(1, 1), - SERCOM(3, 0), - TC(2, 1), - TCC(1, 1), - TCC(0, 5)); -#endif -#ifdef PIN_PA18 -PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, TOUCH(12), - SERCOM(1, 2), - SERCOM(3, 2), - TC(3, 0), - TCC(1, 2), - TCC(0, 6)); -#endif -#ifdef PIN_PA19 -PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, TOUCH(13), - SERCOM(1, 3), - SERCOM(3, 3), - TC(3, 1), - TCC(1, 3), - TCC(0, 7)); -#endif -#ifdef PIN_PC16 -PIN(PC16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 0), - #else - NO_SERCOM, - #endif - SERCOM(0, 1), - NO_TIMER, - TCC(TCC0, 0), - NO_TIMER); -#endif -#ifdef PIN_PC17 -PIN(PC17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 1), - #else - NO_SERCOM, - #endif - SERCOM(0, 0), - NO_TIMER, - TCC(0, 1), - NO_TIMER); -#endif -#ifdef PIN_PC18 -PIN(PC18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 2), - #else - NO_SERCOM, - #endif - SERCOM(0, 2), - NO_TIMER, - TCC(0, 2), - NO_TIMER); -#endif -#ifdef PIN_PC19 -PIN(PC19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, - NO_TOUCH, - #ifdef SERCOM6 - SERCOM(6, 3), - #else - NO_SERCOM, - #endif - SERCOM(0, 3), - NO_TIMER, - TCC(0, 3), - NO_TIMER); -#endif -#ifdef PIN_PC20 -PIN(PC20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - TCC(0, 4), - NO_TIMER); -#endif -#ifdef PIN_PC21 -PIN(PC21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, - NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - TCC(0, 5), - NO_TIMER); -#endif -#ifdef PIN_PC22 -PIN(PC22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, - NO_TOUCH, - SERCOM(1, 0), - SERCOM(3, 1), - NO_TIMER, - TCC(0, 6), - NO_TIMER); -#endif -#ifdef PIN_PC23 -PIN(PC23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, - NO_TOUCH, - SERCOM(1, 1), - SERCOM(3, 0), - NO_TIMER, - TCC(0, 7), - NO_TIMER); -#endif -#ifdef PIN_PD20 -PIN(PD20, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, - NO_TOUCH, - SERCOM(1, 2), - SERCOM(3, 2), - NO_TIMER, - TCC(1, 0), - NO_TIMER); -#endif -#ifdef PIN_PD21 -PIN(PD21, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, - NO_TOUCH, - SERCOM(1, 3), - SERCOM(3, 3), - NO_TIMER, - TCC(1, 1), - NO_TIMER); -#endif - - - - -#ifdef PIN_PB16 -PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 0), - NO_SERCOM, - #ifdef TC6 - TC(6, 0), - #else - NO_TIMER, - #endif - TCC(3, 0), - TCC(0, 4)); -#endif -#ifdef PIN_PB17 -PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 1), - NO_SERCOM, - #ifdef TC6 - TC(6, 1), - #else - NO_TIMER, - #endif - TCC(3, 1), - TCC(0, 5)); -#endif -#ifdef PIN_PB18 -PIN(PB18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 2), - #ifdef SERCOM7 - SERCOM(7, 2), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(1, 0), - NO_TIMER); -#endif -#ifdef PIN_PB19 -PIN(PB19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 3), - #ifdef SERCOM7 - SERCOM(7, 3), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(1, 1), - NO_TIMER); -#endif -#ifdef PIN_PB20 -PIN(PB20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 0), - #ifdef SERCOM7 - SERCOM(7, 1), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(1, 2), - NO_TIMER); -#endif -#ifdef PIN_PB21 -PIN(PB21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(5, 1), - #ifdef SERCOM7 - SERCOM(7, 0), - #else - NO_SERCOM, - #endif - NO_TIMER, - TCC(1, 3), - NO_TIMER); -#endif -#ifdef PIN_PA20 -PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, TOUCH(14), - SERCOM(5, 2), - SERCOM(3, 2), - #ifdef TC7 - TC(7, 0), - #else - NO_TIMER, - #endif - TCC(1, 4), - TCC(0, 0)); -#endif -#ifdef PIN_PA21 -PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, TOUCH(15), - SERCOM(5, 3), - SERCOM(3, 3), - #ifdef TC7 - TC(7, 1), - #else - NO_TIMER, - #endif - TCC(1, 5), - TCC(0, 1)); -#endif -#ifdef PIN_PA22 -PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, TOUCH(16), - SERCOM(3, 0), - SERCOM(5, 1), - #ifdef TC4 - TC(4, 0), - #else - NO_TIMER, - #endif - TCC(1, 6), - TCC(0, 2)); -#endif -#ifdef PIN_PA23 -PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, TOUCH(17), - SERCOM(3, 1), - SERCOM(5, 0), - #ifdef TC4 - TC(4, 1), - #else - NO_TIMER, - #endif - TCC(1, 7), - TCC(0, 3)); -#endif -#ifdef PIN_PA24 -PIN(PA24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(3, 2), - SERCOM(5, 2), - #ifdef TC5 - TC(5, 0), - #else - NO_TIMER, - #endif - TCC(2, 2), - NO_TIMER); -#endif -#ifdef PIN_PA25 -PIN(PA25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(3, 3), - SERCOM(5, 3), - #ifdef TC5 - TC(5, 1), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif - -// Fourth page -#ifdef PIN_PB22 -PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(1, 2), - SERCOM(5, 2), - #ifdef TC7 - TC(7, 0), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB23 -PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(1, 3), - SERCOM(5, 3), - #ifdef TC7 - TC(7, 1), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB24 -PIN(PB24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(0, 0), - SERCOM(2, 1), - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB25 -PIN(PB25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(0, 1), - SERCOM(2, 0), - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB26 -PIN(PB26, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 0), - SERCOM(4, 1), - NO_TIMER, - TCC(TCC1, 2), - NO_TIMER); -#endif -#ifdef PIN_PB27 -PIN(PB27, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 1), - SERCOM(4, 0), - NO_TIMER, - TCC(1, 3), - NO_TIMER); -#endif -#ifdef PIN_PB28 -PIN(PB28, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 2), - SERCOM(4, 2), - NO_TIMER, - TCC(1, 4), - NO_TIMER); -#endif -#ifdef PIN_PB29 -PIN(PB29, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(2, 3), - SERCOM(4, 3), - NO_TIMER, - TCC(1, 5), - NO_TIMER); -#endif -#ifdef PIN_PC24 -PIN(PC24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(0, 2), - SERCOM(2, 2), - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC25 -PIN(PC25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(0, 3), - SERCOM(2, 3), - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC26 -PIN(PC26, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC27 -PIN(PC27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(1, 0), - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC28 -PIN(PC28, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH, - SERCOM(1, 1), - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA27 -PIN(PA27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, TOUCH(18), - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PA30 -PIN(PA30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, TOUCH(19), - #ifdef SERCOM7 - SERCOM(7, 2), - #else - NO_SERCOM, - #endif - SERCOM(1, 2), - #ifdef TC6 - TC(6, 0), - #else - NO_TIMER, - #endif - TCC(2, 0), - NO_TIMER); -#endif -#ifdef PIN_PA31 -PIN(PA31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 3), - #else - NO_SERCOM, - #endif - SERCOM(1, 3), - #ifdef TC6 - TC(6, 1), - #else - NO_TIMER, - #endif - TCC(2, 1), - NO_TIMER); -#endif -#ifdef PIN_PB30 -PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 0), - #else - NO_SERCOM, - #endif - SERCOM(5, 1), - TC(0, 0), - TCC(4, 0), - TCC(0, 6)); -#endif -#ifdef PIN_PB31 -PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH, - #ifdef SERCOM7 - SERCOM(7, 1), - #else - NO_SERCOM, - #endif - SERCOM(5, 0), - TC(0, 1), - TCC(4, 1), - TCC(0, 7)); -#endif -#ifdef PIN_PC30 -PIN(PC30, EXTINT_CHANNEL(14), NO_ADC, ADC_INPUT(12), NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PC31 -PIN(PC31, EXTINT_CHANNEL(15), NO_ADC, ADC_INPUT(13), NO_TOUCH, - NO_SERCOM, - NO_SERCOM, - NO_TIMER, - NO_TIMER, - NO_TIMER); -#endif - - -#ifdef PIN_PB00 -PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(12), NO_ADC, - #ifdef PINMUX_PB00B_ADC0_PTCXY30 - TOUCH(30), - #else - NO_TOUCH, - #endif - NO_SERCOM, - SERCOM(5, 2), - #ifdef TC7 - TC(7, 0), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB01 -PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(13), NO_ADC, - #ifdef PINMUX_PB01B_ADC0_PTCXY31 - TOUCH(31), - #else - NO_TOUCH, - #endif - NO_SERCOM, - SERCOM(5, 3), - #ifdef TC7 - TC(7, 1), - #else - NO_TIMER, - #endif - NO_TIMER, - NO_TIMER); -#endif -#ifdef PIN_PB02 -PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(14), NO_ADC, TOUCH(20), - NO_SERCOM, - SERCOM(5, 0), - #ifdef TC6 - TC(6, 0), - #else - NO_TIMER, - #endif - TCC(2, 2), - NO_TIMER); -#endif diff --git a/ports/atmel-samd/samd51_pins.h b/ports/atmel-samd/samd51_pins.h deleted file mode 100644 index c9ffacc24b427..0000000000000 --- a/ports/atmel-samd/samd51_pins.h +++ /dev/null @@ -1,348 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H - -#include "include/sam.h" - -#include "common-hal/microcontroller/Pin.h" - -void reset_pin(uint8_t pin); - -#define MUX_C 2 -#define MUX_D 3 -#define MUX_E 4 -#define MUX_F 5 -#define PINMUX(pin, mux) ((((uint32_t) pin) << 16) | (mux)) - -#define NO_PIN PORT_BITS - -// Pins in datasheet order. -#ifdef PIN_PB03 -extern const mcu_pin_obj_t pin_PB03; -#endif -#ifdef PIN_PA00 -extern const mcu_pin_obj_t pin_PA00; -#endif -#ifdef PIN_PA01 -extern const mcu_pin_obj_t pin_PA01; -#endif -#ifdef PIN_PC00 -extern const mcu_pin_obj_t pin_PC00; -#endif -#ifdef PIN_PC01 -extern const mcu_pin_obj_t pin_PC01; -#endif -#ifdef PIN_PC02 -extern const mcu_pin_obj_t pin_PC02; -#endif -#ifdef PIN_PC03 -extern const mcu_pin_obj_t pin_PC03; -#endif -#ifdef PIN_PA02 -extern const mcu_pin_obj_t pin_PA02; -#endif -#ifdef PIN_PA03 -extern const mcu_pin_obj_t pin_PA03; -#endif -#ifdef PIN_PB04 -extern const mcu_pin_obj_t pin_PB04; -#endif -#ifdef PIN_PB05 -extern const mcu_pin_obj_t pin_PB05; -#endif -#ifdef PIN_PD00 -extern const mcu_pin_obj_t pin_PD00; -#endif -#ifdef PIN_PD01 -extern const mcu_pin_obj_t pin_PD01; -#endif -#ifdef PIN_PB06 -extern const mcu_pin_obj_t pin_PB06; -#endif -#ifdef PIN_PB07 -extern const mcu_pin_obj_t pin_PB07; -#endif -#ifdef PIN_PB08 -extern const mcu_pin_obj_t pin_PB08; -#endif -#ifdef PIN_PB09 -extern const mcu_pin_obj_t pin_PB09; -#endif -#ifdef PIN_PA04 -extern const mcu_pin_obj_t pin_PA04; -#endif -#ifdef PIN_PA05 -extern const mcu_pin_obj_t pin_PA05; -#endif -#ifdef PIN_PA06 -extern const mcu_pin_obj_t pin_PA06; -#endif - -// Second page -#ifdef PIN_PA07 -extern const mcu_pin_obj_t pin_PA07; -#endif -#ifdef PIN_PC04 -extern const mcu_pin_obj_t pin_PC04; -#endif -#ifdef PIN_PC05 -extern const mcu_pin_obj_t pin_PC05; -#endif -#ifdef PIN_PC06 -extern const mcu_pin_obj_t pin_PC06; -#endif -#ifdef PIN_PC07 -extern const mcu_pin_obj_t pin_PC07; -#endif -#ifdef PIN_PA08 -extern const mcu_pin_obj_t pin_PA08; -#endif -#ifdef PIN_PA09 -extern const mcu_pin_obj_t pin_PA09; -#endif -#ifdef PIN_PA10 -extern const mcu_pin_obj_t pin_PA10; -#endif -#ifdef PIN_PA11 -extern const mcu_pin_obj_t pin_PA11; -#endif -#ifdef PIN_PB10 -extern const mcu_pin_obj_t pin_PB10; -#endif -#ifdef PIN_PB11 -extern const mcu_pin_obj_t pin_PB11; -#endif -#ifdef PIN_PB12 -extern const mcu_pin_obj_t pin_PB12; -#endif -#ifdef PIN_PB13 -extern const mcu_pin_obj_t pin_PB13; -#endif -#ifdef PIN_PB14 -extern const mcu_pin_obj_t pin_PB14; -#endif -#ifdef PIN_PB15 -extern const mcu_pin_obj_t pin_PB15; -#endif -#ifdef PIN_PD08 -extern const mcu_pin_obj_t pin_PD08; -#endif -#ifdef PIN_PD09 -extern const mcu_pin_obj_t pin_PD09; -#endif -#ifdef PIN_PD10 -extern const mcu_pin_obj_t pin_PD10; -#endif -#ifdef PIN_PD11 -extern const mcu_pin_obj_t pin_PD11; -#endif -#ifdef PIN_PD12 -extern const mcu_pin_obj_t pin_PD12; -#endif -#ifdef PIN_PC10 -extern const mcu_pin_obj_t pin_PC10; -#endif -#ifdef PIN_PC11 -extern const mcu_pin_obj_t pin_PC11; -#endif -#ifdef PIN_PC12 -extern const mcu_pin_obj_t pin_PC12; -#endif -#ifdef PIN_PC13 -extern const mcu_pin_obj_t pin_PC13; -#endif -#ifdef PIN_PC14 -extern const mcu_pin_obj_t pin_PC14; -#endif -#ifdef PIN_PC15 -extern const mcu_pin_obj_t pin_PC15; -#endif -#ifdef PIN_PA12 -extern const mcu_pin_obj_t pin_PA12; -#endif -#ifdef PIN_PA13 -extern const mcu_pin_obj_t pin_PA13; -#endif - -// Third page -#ifdef PIN_PA14 -extern const mcu_pin_obj_t pin_PA14; -#endif -#ifdef PIN_PA15 -extern const mcu_pin_obj_t pin_PA15; -#endif -#ifdef PIN_PA16 -extern const mcu_pin_obj_t pin_PA16; -#endif -#ifdef PIN_PA17 -extern const mcu_pin_obj_t pin_PA17; -#endif -#ifdef PIN_PA18 -extern const mcu_pin_obj_t pin_PA18; -#endif -#ifdef PIN_PA19 -extern const mcu_pin_obj_t pin_PA19; -#endif -#ifdef PIN_PC16 -extern const mcu_pin_obj_t pin_PC16; -#endif -#ifdef PIN_PC17 -extern const mcu_pin_obj_t pin_PC17; -#endif -#ifdef PIN_PC18 -extern const mcu_pin_obj_t pin_PC18; -#endif -#ifdef PIN_PC19 -extern const mcu_pin_obj_t pin_PC19; -#endif -#ifdef PIN_PC20 -extern const mcu_pin_obj_t pin_PC20; -#endif -#ifdef PIN_PC21 -extern const mcu_pin_obj_t pin_PC21; -#endif -#ifdef PIN_PC22 -extern const mcu_pin_obj_t pin_PC22; -#endif -#ifdef PIN_PC23 -extern const mcu_pin_obj_t pin_PC23; -#endif -#ifdef PIN_PD20 -extern const mcu_pin_obj_t pin_PD20; -#endif -#ifdef PIN_PD21 -extern const mcu_pin_obj_t pin_PD21; -#endif -#ifdef PIN_PB16 -extern const mcu_pin_obj_t pin_PB16; -#endif -#ifdef PIN_PB17 -extern const mcu_pin_obj_t pin_PB17; -#endif -#ifdef PIN_PB18 -extern const mcu_pin_obj_t pin_PB18; -#endif -#ifdef PIN_PB19 -extern const mcu_pin_obj_t pin_PB19; -#endif -#ifdef PIN_PB20 -extern const mcu_pin_obj_t pin_PB20; -#endif -#ifdef PIN_PB21 -extern const mcu_pin_obj_t pin_PB21; -#endif -#ifdef PIN_PA20 -extern const mcu_pin_obj_t pin_PA20; -#endif -#ifdef PIN_PA21 -extern const mcu_pin_obj_t pin_PA21; -#endif -#ifdef PIN_PA22 -extern const mcu_pin_obj_t pin_PA22; -#endif -#ifdef PIN_PA23 -extern const mcu_pin_obj_t pin_PA23; -#endif -#ifdef PIN_PA24 -extern const mcu_pin_obj_t pin_PA24; -#endif -#ifdef PIN_PA25 -extern const mcu_pin_obj_t pin_PA25; -#endif - -// Fourth page -#ifdef PIN_PB22 -extern const mcu_pin_obj_t pin_PB22; -#endif -#ifdef PIN_PB23 -extern const mcu_pin_obj_t pin_PB23; -#endif -#ifdef PIN_PB24 -extern const mcu_pin_obj_t pin_PB24; -#endif -#ifdef PIN_PB25 -extern const mcu_pin_obj_t pin_PB25; -#endif -#ifdef PIN_PB26 -extern const mcu_pin_obj_t pin_PB26; -#endif -#ifdef PIN_PB27 -extern const mcu_pin_obj_t pin_PB27; -#endif -#ifdef PIN_PB28 -extern const mcu_pin_obj_t pin_PB28; -#endif -#ifdef PIN_PB29 -extern const mcu_pin_obj_t pin_PB29; -#endif -#ifdef PIN_PC24 -extern const mcu_pin_obj_t pin_PC24; -#endif -#ifdef PIN_PC25 -extern const mcu_pin_obj_t pin_PC25; -#endif -#ifdef PIN_PC26 -extern const mcu_pin_obj_t pin_PC26; -#endif -#ifdef PIN_PC27 -extern const mcu_pin_obj_t pin_PC27; -#endif -#ifdef PIN_PC28 -extern const mcu_pin_obj_t pin_PC28; -#endif -#ifdef PIN_PA27 -extern const mcu_pin_obj_t pin_PA27; -#endif -#ifdef PIN_PA30 -extern const mcu_pin_obj_t pin_PA30; -#endif -#ifdef PIN_PA31 -extern const mcu_pin_obj_t pin_PA31; -#endif -#ifdef PIN_PB30 -extern const mcu_pin_obj_t pin_PB30; -#endif -#ifdef PIN_PB31 -extern const mcu_pin_obj_t pin_PB31; -#endif -#ifdef PIN_PC30 -extern const mcu_pin_obj_t pin_PC30; -#endif -#ifdef PIN_PC31 -extern const mcu_pin_obj_t pin_PC31; -#endif -#ifdef PIN_PB00 -extern const mcu_pin_obj_t pin_PB00; -#endif -#ifdef PIN_PB01 -extern const mcu_pin_obj_t pin_PB01; -#endif -#ifdef PIN_PB02 -extern const mcu_pin_obj_t pin_PB02; -#endif -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H diff --git a/ports/atmel-samd/samd_peripherals.h b/ports/atmel-samd/samd_peripherals.h deleted file mode 100644 index 7a4477891690f..0000000000000 --- a/ports/atmel-samd/samd_peripherals.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 by Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H - -#include "include/sam.h" - -void samd_peripherals_sercom_clock_init(Sercom* sercom, uint8_t sercom_index); -uint8_t samd_peripherals_get_spi_dopo(uint8_t clock_pad, uint8_t mosi_pad); -bool samd_peripherals_valid_spi_clock_pad(uint8_t clock_pad); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H diff --git a/ports/atmel-samd/samd_peripherals_config.h b/ports/atmel-samd/samd_peripherals_config.h new file mode 100644 index 0000000000000..37df7b19a84a2 --- /dev/null +++ b/ports/atmel-samd/samd_peripherals_config.h @@ -0,0 +1,38 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD_PERIPHERALS_CONFIG_H +#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD_PERIPHERALS_CONFIG_H + +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +#define PIN_PREFIX_VALUES { &mcu_pin_type }, +#define PIN_PREFIX_FIELDS mp_obj_base_t base; + + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD_PERIPHERALS_CONFIG_H diff --git a/ports/atmel-samd/shared_dma.c b/ports/atmel-samd/shared_dma.c deleted file mode 100644 index 8a6a606bbd7dd..0000000000000 --- a/ports/atmel-samd/shared_dma.c +++ /dev/null @@ -1,436 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "shared_dma.h" - -#include - -#include "py/gc.h" -#include "py/mpstate.h" - -#include "hal/utils/include/utils.h" - -#include "shared-bindings/microcontroller/__init__.h" - -// We allocate three DMA resources for the entire lifecycle of the board (not the -// vm) because the general_dma resource will be shared between the REPL and SPI -// flash. Both uses must block each other in order to prevent conflict. -COMPILER_ALIGNED(16) static DmacDescriptor dma_descriptors[3]; - -// Don't use these directly. They are used by the DMA engine itself. -COMPILER_ALIGNED(16) static DmacDescriptor write_back_descriptors[3]; - -#define AUDIO_DMA_CHANNEL 0 -#define SHARED_TX_CHANNEL 1 -#define SHARED_RX_CHANNEL 2 - - -#ifdef SAMD21 -#define FIRST_SERCOM_RX_TRIGSRC 0x01 -#define FIRST_SERCOM_TX_TRIGSRC 0x02 -#endif -#ifdef SAMD51 -#define FIRST_SERCOM_RX_TRIGSRC 0x04 -#define FIRST_SERCOM_TX_TRIGSRC 0x05 -#endif - -// static void dma_configure_audio(uint8_t channel) { -// system_interrupt_enter_critical_section(); -// /** Select the DMA channel and clear software trigger */ -// DMAC->CHID.reg = DMAC_CHID_ID(channel); -// DMAC->CHCTRLA.reg &= ~DMAC_CHCTRLA_ENABLE; -// DMAC->CHCTRLA.reg = DMAC_CHCTRLA_SWRST; -// DMAC->SWTRIGCTRL.reg &= (uint32_t)(~(1 << channel)); -// uint32_t event_output_enable = 0; -// if (output_event) { -// event_output_enable = DMAC_CHCTRLB_EVOE; -// } -// DMAC->CHCTRLB.reg = DMAC_CHCTRLB_LVL(DMA_PRIORITY_LEVEL_0) | -// DMAC_CHCTRLB_TRIGSRC(trigsrc) | -// DMAC_CHCTRLB_TRIGACT(DMA_TRIGGER_ACTION_BEAT) | -// event_output_enable; -// // config.peripheral_trigger = DAC_DMAC_ID_EMPTY; -// // config.trigger_action = DMA_TRIGGER_ACTION_BEAT; -// // config.event_config.input_action = DMA_EVENT_INPUT_TRIG; -// // config.event_config.event_output_enable = true; -// system_interrupt_leave_critical_section(); -// } - -void init_shared_dma(void) { - // Turn on the clocks - #ifdef SAMD51 - MCLK->AHBMASK.reg |= MCLK_AHBMASK_DMAC; - #endif - - #ifdef SAMD21 - PM->AHBMASK.reg |= PM_AHBMASK_DMAC; - PM->APBBMASK.reg |= PM_APBBMASK_DMAC; - #endif - - DMAC->CTRL.reg = DMAC_CTRL_SWRST; - - DMAC->BASEADDR.reg = (uint32_t) dma_descriptors; - DMAC->WRBADDR.reg = (uint32_t) write_back_descriptors; - - DMAC->CTRL.reg = DMAC_CTRL_DMAENABLE | DMAC_CTRL_LVLEN0; - - // This allocates the lowest channel first so make sure the audio is first - // so it gets the highest priority. - // dma_configure_audio(0); -} - -static uint8_t sercom_index(Sercom* sercom) { - #ifdef SAMD21 - return ((uint32_t) sercom - (uint32_t) SERCOM0) / 0x400; - #else - const Sercom* sercoms[SERCOM_INST_NUM] = SERCOM_INSTS; - for (uint8_t i = 0; i < SERCOM_INST_NUM; i++) { - if (sercoms[i] == sercom) { - return i; - } - } - return 0; - #endif -} - -static void dma_configure(uint8_t channel_number, uint8_t trigsrc, bool output_event) { - #ifdef SAMD21 - common_hal_mcu_disable_interrupts(); - /** Select the DMA channel and clear software trigger */ - DMAC->CHID.reg = DMAC_CHID_ID(channel_number); - DMAC->CHCTRLA.reg &= ~DMAC_CHCTRLA_ENABLE; - DMAC->CHCTRLA.reg = DMAC_CHCTRLA_SWRST; - DMAC->SWTRIGCTRL.reg &= (uint32_t)(~(1 << channel_number)); - uint32_t event_output_enable = 0; - if (output_event) { - event_output_enable = DMAC_CHCTRLB_EVOE; - } - DMAC->CHCTRLB.reg = DMAC_CHCTRLB_LVL_LVL0 | - DMAC_CHCTRLB_TRIGSRC(trigsrc) | - DMAC_CHCTRLB_TRIGACT_BEAT | - event_output_enable; - common_hal_mcu_enable_interrupts(); - #endif - - #ifdef SAMD51 - DmacChannel* channel = &DMAC->Channel[channel_number]; - channel->CHCTRLA.reg &= ~DMAC_CHCTRLA_ENABLE; - channel->CHCTRLA.reg = DMAC_CHCTRLA_SWRST; - if (output_event) { - channel->CHEVCTRL.reg = DMAC_CHEVCTRL_EVOE; - } - channel->CHCTRLA.reg = DMAC_CHCTRLA_TRIGSRC(trigsrc) | - DMAC_CHCTRLA_TRIGACT_BURST | - DMAC_CHCTRLA_BURSTLEN_SINGLE; - #endif -} - -static void enable_channel(uint8_t channel_number) { - #ifdef SAMD21 - common_hal_mcu_disable_interrupts(); - /** Select the DMA channel and clear software trigger */ - DMAC->CHID.reg = DMAC_CHID_ID(channel_number); - DMAC->CHCTRLA.bit.ENABLE = true; - common_hal_mcu_enable_interrupts(); - #endif - - #ifdef SAMD51 - DmacChannel* channel = &DMAC->Channel[channel_number]; - channel->CHCTRLA.bit.ENABLE = true; - #endif -} - -static uint8_t transfer_status(uint8_t channel_number) { - #ifdef SAMD21 - common_hal_mcu_disable_interrupts(); - /** Select the DMA channel and clear software trigger */ - DMAC->CHID.reg = DMAC_CHID_ID(channel_number); - uint8_t status = DMAC->CHINTFLAG.reg; - common_hal_mcu_enable_interrupts(); - return status; - #endif - - #ifdef SAMD51 - DmacChannel* channel = &DMAC->Channel[channel_number]; - return channel->CHINTFLAG.reg; - #endif -} - -static bool channel_free(uint8_t channel_number) { - #ifdef SAMD21 - common_hal_mcu_disable_interrupts(); - /** Select the DMA channel and clear software trigger */ - DMAC->CHID.reg = DMAC_CHID_ID(channel_number); - bool channel_free = DMAC->CHSTATUS.reg == 0; - common_hal_mcu_enable_interrupts(); - return channel_free; - #endif - - #ifdef SAMD51 - DmacChannel* channel = &DMAC->Channel[channel_number]; - return channel->CHSTATUS.reg == 0; - #endif -} - -// Do write and read simultaneously. If buffer_out is NULL, write the tx byte over and over. -// If buffer_out is a real buffer, ignore tx. -// DMAs buffer_out -> dest -// DMAs src -> buffer_in -static int32_t shared_dma_transfer(void* peripheral, - const uint8_t* buffer_out, volatile uint32_t* dest, - volatile uint32_t* src, uint8_t* buffer_in, - uint32_t length, uint8_t tx) { - if (!channel_free(SHARED_TX_CHANNEL) || - (buffer_in != NULL && !channel_free(SHARED_RX_CHANNEL))) { - return -1; - } - - uint32_t beat_size = DMAC_BTCTRL_BEATSIZE_BYTE; - bool sercom = true; - bool tx_active = false; - bool rx_active = false; - uint16_t beat_length = length; - #ifdef SAMD51 - if (peripheral == QSPI) { - // Check input alignment on word boundaries. - if ((((uint32_t) buffer_in) & 0x3) != 0 || - (((uint32_t) buffer_out) & 0x3) != 0) { - return -3; - } - beat_size = DMAC_BTCTRL_BEATSIZE_WORD | DMAC_BTCTRL_SRCINC | DMAC_BTCTRL_DSTINC; - beat_length /= 4; - sercom = false; - if (buffer_out != NULL) { - dma_configure(SHARED_TX_CHANNEL, QSPI_DMAC_ID_TX, false); - tx_active = true; - } else { - dma_configure(SHARED_RX_CHANNEL, QSPI_DMAC_ID_RX, false); - rx_active = true; - } - - } else { - #endif - - // sercom index is incorrect for SAMD51 - dma_configure(SHARED_TX_CHANNEL, sercom_index(peripheral) * 2 + FIRST_SERCOM_TX_TRIGSRC, false); - tx_active = true; - if (buffer_in != NULL) { - dma_configure(SHARED_RX_CHANNEL, sercom_index(peripheral) * 2 + FIRST_SERCOM_RX_TRIGSRC, false); - rx_active = true; - } - - #ifdef SAMD51 - } - #endif - - // Set up RX first. - if (rx_active) { - DmacDescriptor* rx_descriptor = &dma_descriptors[SHARED_RX_CHANNEL]; - rx_descriptor->BTCTRL.reg = beat_size | DMAC_BTCTRL_DSTINC; - rx_descriptor->BTCNT.reg = beat_length; - rx_descriptor->SRCADDR.reg = ((uint32_t) src); - #ifdef SAMD51 - if (peripheral == QSPI) { - rx_descriptor->SRCADDR.reg = ((uint32_t) src + length); - } - #endif - rx_descriptor->DSTADDR.reg = ((uint32_t)buffer_in + length); - rx_descriptor->BTCTRL.bit.VALID = true; - } - - // Set up TX second. - if (tx_active) { - DmacDescriptor* tx_descriptor = &dma_descriptors[SHARED_TX_CHANNEL]; - tx_descriptor->BTCTRL.reg = beat_size; - tx_descriptor->BTCNT.reg = beat_length; - - if (buffer_out != NULL) { - tx_descriptor->SRCADDR.reg = ((uint32_t)buffer_out + length); - tx_descriptor->BTCTRL.reg |= DMAC_BTCTRL_SRCINC; - } else { - tx_descriptor->SRCADDR.reg = ((uint32_t) &tx); - } - tx_descriptor->DSTADDR.reg = ((uint32_t) dest); - tx_descriptor->BTCTRL.bit.VALID = true; - } - if (sercom) { - SercomSpi *s = &((Sercom*) peripheral)->SPI; - s->INTFLAG.reg = SERCOM_SPI_INTFLAG_RXC | SERCOM_SPI_INTFLAG_DRE; - } else { - //QSPI->INTFLAG.reg = QSPI_INTFLAG_RXC | QSPI_INTFLAG_DRE; - } - // Start the RX job first so we don't miss the first byte. The TX job clocks - // the output. - if (rx_active) { - enable_channel(SHARED_RX_CHANNEL); - } - if (tx_active) { - enable_channel(SHARED_TX_CHANNEL); - } - - - if (sercom) { - //DMAC->SWTRIGCTRL.reg |= (1 << SHARED_TX_CHANNEL); - } else { - // Do a manual copy to trigger then DMA. We do 32-bit accesses to match the DMA. - #pragma GCC diagnostic push - #pragma GCC diagnostic ignored "-Wcast-align" - if (rx_active) { - //buffer_in[0] = *src; - DMAC->SWTRIGCTRL.reg |= (1 << SHARED_RX_CHANNEL); - } else { - //*(uint32_t*)dest = ((uint32_t*) buffer_out)[0]; - } - #pragma GCC diagnostic pop - } - - // Channels cycle between Suspend -> Pending -> Busy and back while transfering. So, we check - // the channels transfer status for an error or completion. - if (rx_active) { - while ((transfer_status(SHARED_RX_CHANNEL) & 0x3) == 0) {} - } - if (tx_active) { - while ((transfer_status(SHARED_TX_CHANNEL) & 0x3) == 0) {} - } - - if (sercom) { - Sercom* s = (Sercom*) peripheral; - // Wait for the SPI transfer to complete. - while (s->SPI.INTFLAG.bit.TXC == 0) {} - - // This transmit will cause the RX buffer overflow but we're OK with that. - // So, read the garbage and clear the overflow flag. - if (!rx_active) { - while (s->SPI.INTFLAG.bit.RXC == 1) { - s->SPI.DATA.reg; - } - s->SPI.STATUS.bit.BUFOVF = 1; - s->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_ERROR; - } - } - - if ((!rx_active || transfer_status(SHARED_RX_CHANNEL) == DMAC_CHINTFLAG_TCMPL) && - (!tx_active || transfer_status(SHARED_TX_CHANNEL) == DMAC_CHINTFLAG_TCMPL)) { - return length; - } - return -2; -} - - -int32_t sercom_dma_transfer(Sercom* sercom, const uint8_t* buffer_out, uint8_t* buffer_in, - uint32_t length) { - return shared_dma_transfer(sercom, buffer_out, &sercom->SPI.DATA.reg, &sercom->SPI.DATA.reg, buffer_in, length, 0); -} - -int32_t sercom_dma_write(Sercom* sercom, const uint8_t* buffer, uint32_t length) { - return shared_dma_transfer(sercom, buffer, &sercom->SPI.DATA.reg, NULL, NULL, length, 0); -} - -int32_t sercom_dma_read(Sercom* sercom, uint8_t* buffer, uint32_t length, uint8_t tx) { - return shared_dma_transfer(sercom, NULL, &sercom->SPI.DATA.reg, &sercom->SPI.DATA.reg, buffer, length, tx); -} - -#ifdef SAMD51 -int32_t qspi_dma_write(uint32_t address, const uint8_t* buffer, uint32_t length) { - return shared_dma_transfer(QSPI, buffer, (uint32_t*) (QSPI_AHB + address), NULL, NULL, length, 0); -} - -int32_t qspi_dma_read(uint32_t address, uint8_t* buffer, uint32_t length) { - return shared_dma_transfer(QSPI, NULL, NULL, (uint32_t*) (QSPI_AHB + address), buffer, length, 0); -} -#endif - -bool allocate_block_counter() { -// // Find a timer to count DMA block completions. -// Tc *t = NULL; -// Tc *tcs[TC_INST_NUM] = TC_INSTS; -// for (uint8_t i = TC_INST_NUM; i > 0; i--) { -// if (tcs[i - 1]->COUNT16.CTRLA.bit.ENABLE == 0) { -// t = tcs[i - 1]; -// break; -// } -// } -// if (t == NULL) { -// return false; -// } -// MP_STATE_VM(audiodma_block_counter) = gc_alloc(sizeof(struct tc_module), false); -// if (MP_STATE_VM(audiodma_block_counter) == NULL) { -// return false; -// } -// -// // Don't bother setting the period. We set it before you playback anything. -// struct tc_config config_tc; -// tc_get_config_defaults(&config_tc); -// config_tc.counter_size = TC_COUNTER_SIZE_16BIT; -// config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV1; -// if (tc_init(MP_STATE_VM(audiodma_block_counter), t, &config_tc) != STATUS_OK) { -// return false; -// }; -// -// struct tc_events events_tc; -// events_tc.generate_event_on_overflow = false; -// events_tc.on_event_perform_action = true; -// events_tc.event_action = TC_EVENT_ACTION_INCREMENT_COUNTER; -// tc_enable_events(MP_STATE_VM(audiodma_block_counter), &events_tc); -// -// // Connect the timer overflow event, which happens at the target frequency, -// // to the DAC conversion trigger. -// MP_STATE_VM(audiodma_block_event) = gc_alloc(sizeof(struct events_resource), false); -// if (MP_STATE_VM(audiodma_block_event) == NULL) { -// return false; -// } -// struct events_config config; -// events_get_config_defaults(&config); -// -// uint8_t user = EVSYS_ID_USER_TC3_EVU; -// if (t == TC4) { -// user = EVSYS_ID_USER_TC4_EVU; -// } else if (t == TC5) { -// user = EVSYS_ID_USER_TC5_EVU; -// #ifdef TC6 -// } else if (t == TC6) { -// user = EVSYS_ID_USER_TC6_EVU; -// #endif -// #ifdef TC7 -// } else if (t == TC7) { -// user = EVSYS_ID_USER_TC7_EVU; -// #endif -// } -// -// config.generator = EVSYS_ID_GEN_DMAC_CH_0; -// config.path = EVENTS_PATH_ASYNCHRONOUS; -// if (events_allocate(MP_STATE_VM(audiodma_block_event), &config) != STATUS_OK || -// events_attach_user(MP_STATE_VM(audiodma_block_event), user) != STATUS_OK) { -// return false; -// } -// -// tc_enable(MP_STATE_VM(audiodma_block_counter)); -// tc_stop_counter(MP_STATE_VM(audiodma_block_counter)); - return true; -} - -void switch_audiodma_trigger(uint8_t trigger_dmac_id) { - //dma_configure(audio_dma.channel_id, trigger_dmac_id, true); -} diff --git a/ports/atmel-samd/shared_dma.h b/ports/atmel-samd/shared_dma.h deleted file mode 100644 index 536a95af33f49..0000000000000 --- a/ports/atmel-samd/shared_dma.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SHARED_DMA_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SHARED_DMA_H - -#include -#include - -#include "include/sam.h" - -volatile bool audio_dma_in_use; - -void init_shared_dma(void); - -#ifdef SAMD51 -int32_t qspi_dma_write(uint32_t address, const uint8_t* buffer, uint32_t length); -int32_t qspi_dma_read(uint32_t address, uint8_t* buffer, uint32_t length); -#endif - -int32_t sercom_dma_write(Sercom* sercom, const uint8_t* buffer, uint32_t length); -int32_t sercom_dma_read(Sercom* sercom, uint8_t* buffer, uint32_t length, uint8_t tx); -int32_t sercom_dma_transfer(Sercom* sercom, const uint8_t* buffer_out, uint8_t* buffer_in, uint32_t length); - -// Allocate a counter to track how far along we are in a DMA double buffer. -bool allocate_block_counter(void); -void switch_audiodma_trigger(uint8_t trigger_dmac_id); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SHARED_DMA_H diff --git a/ports/atmel-samd/supervisor/filesystem.c b/ports/atmel-samd/supervisor/filesystem.c deleted file mode 100644 index bff78a41c29f1..0000000000000 --- a/ports/atmel-samd/supervisor/filesystem.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/vfs_fat.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" - -#include "py/mpstate.h" - -#include "flash_api.h" - -#ifdef EXPRESS_BOARD -// #include "common-hal/touchio/TouchIn.h" -#define INTERNAL_CIRCUITPY_CONFIG_START_ADDR (0x00040000 - 0x100 - CIRCUITPY_INTERNAL_NVM_SIZE) -#else -#define INTERNAL_CIRCUITPY_CONFIG_START_ADDR (0x00040000 - 0x010000 - 0x100 - CIRCUITPY_INTERNAL_NVM_SIZE) -#endif - -fs_user_mount_t fs_user_mount_flash; -mp_vfs_mount_t mp_vfs_mount_flash; - -static void make_empty_file(FATFS *fatfs, const char *path) { - FIL fp; - f_open(fatfs, &fp, path, FA_WRITE | FA_CREATE_ALWAYS); - f_close(&fp); -} - -// we don't make this function static because it needs a lot of stack and we -// want it to be executed without using stack within main() function -void filesystem_init(bool create_allowed) { - // init the vfs object - fs_user_mount_t *vfs_fat = &fs_user_mount_flash; - vfs_fat->flags = 0; - flash_init_vfs(vfs_fat); - - // try to mount the flash - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (res == FR_NO_FILESYSTEM && create_allowed) { - // no filesystem so create a fresh one - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT, 0, working_buf, sizeof(working_buf)); - // Flush the new file system to make sure its repaired immediately. - flash_flush(); - if (res != FR_OK) { - return; - } - - // set label - f_setlabel(&vfs_fat->fatfs, "CIRCUITPY"); - - // inhibit file indexing on MacOS - f_mkdir(&vfs_fat->fatfs, "/.fseventsd"); - make_empty_file(&vfs_fat->fatfs, "/.metadata_never_index"); - make_empty_file(&vfs_fat->fatfs, "/.Trashes"); - make_empty_file(&vfs_fat->fatfs, "/.fseventsd/no_log"); - - // and ensure everything is flushed - flash_flush(); - } else if (res != FR_OK) { - return; - } - mp_vfs_mount_t *vfs = &mp_vfs_mount_flash; - vfs->str = "/"; - vfs->len = 1; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; -} - -void filesystem_flush(void) { - flash_flush(); -} - -void filesystem_writable_by_python(bool writable) { - flash_set_usb_writable(!writable); -} - -bool filesystem_present(void) { - return true; -} diff --git a/ports/atmel-samd/supervisor/internal_flash.c b/ports/atmel-samd/supervisor/internal_flash.c new file mode 100644 index 0000000000000..a8ff5adfa996a --- /dev/null +++ b/ports/atmel-samd/supervisor/internal_flash.c @@ -0,0 +1,152 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/internal_flash.h" + +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#ifdef SAMD21 +#include "hpl/pm/hpl_pm_base.h" +#endif +#include "hal/include/hal_flash.h" + +#include "supervisor/shared/rgb_led_status.h" + +static struct flash_descriptor supervisor_flash_desc; + +void supervisor_flash_init(void) { + // Activity LED for flash writes. + #ifdef MICROPY_HW_LED_MSC + struct port_config pin_conf; + port_get_config_defaults(&pin_conf); + + pin_conf.direction = PORT_PIN_DIR_OUTPUT; + port_pin_set_config(MICROPY_HW_LED_MSC, &pin_conf); + port_pin_set_output_level(MICROPY_HW_LED_MSC, false); + #endif + + #ifdef SAMD51 + hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK); + #endif + #ifdef SAMD21 + _pm_enable_bus_clock(PM_BUS_APBB, NVMCTRL); + #endif + flash_init(&supervisor_flash_desc, NVMCTRL); +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return INTERNAL_FLASH_PART1_NUM_BLOCKS; +} + +void supervisor_flash_flush(void) { +} + +void supervisor_flash_release_cache(void) { +} + +void flash_flush(void) { + supervisor_flash_flush(); +} + +static int32_t convert_block_to_flash_addr(uint32_t block) { + if (0 <= block && block < INTERNAL_FLASH_PART1_NUM_BLOCKS) { + // a block in partition 1 + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; + } + // bad block + return -1; +} + +bool supervisor_flash_read_block(uint8_t *dest, uint32_t block) { + // non-MBR block, get data from flash memory + int32_t src = convert_block_to_flash_addr(block); + if (src == -1) { + // bad block number + return false; + } + int32_t error_code = flash_read(&supervisor_flash_desc, src, dest, FILESYSTEM_BLOCK_SIZE); + return error_code == ERR_NONE; +} + +bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { + #ifdef MICROPY_HW_LED_MSC + port_pin_set_output_level(MICROPY_HW_LED_MSC, true); + #endif + temp_status_color(ACTIVE_WRITE); + // non-MBR block, copy to cache + int32_t dest = convert_block_to_flash_addr(block); + if (dest == -1) { + // bad block number + return false; + } + int32_t error_code; + error_code = flash_erase(&supervisor_flash_desc, + dest, + FILESYSTEM_BLOCK_SIZE / flash_get_page_size(&supervisor_flash_desc)); + if (error_code != ERR_NONE) { + return false; + } + + error_code = flash_append(&supervisor_flash_desc, dest, src, FILESYSTEM_BLOCK_SIZE); + if (error_code != ERR_NONE) { + return false; + } + clear_temp_status(); + #ifdef MICROPY_HW_LED_MSC + port_pin_set_output_level(MICROPY_HW_LED_MSC, false); + #endif + return true; +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { + for (size_t i = 0; i < num_blocks; i++) { + if (!supervisor_flash_read_block(dest + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { + return 1; // error + } + } + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + for (size_t i = 0; i < num_blocks; i++) { + if (!supervisor_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { + return 1; // error + } + } + return 0; // success +} diff --git a/ports/atmel-samd/supervisor/internal_flash.h b/ports/atmel-samd/supervisor/internal_flash.h new file mode 100644 index 0000000000000..df8b495ccb117 --- /dev/null +++ b/ports/atmel-samd/supervisor/internal_flash.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H + +#include + +#include "mpconfigport.h" + +#include "sam.h" + +#define INTERNAL_FLASH_PART1_NUM_BLOCKS (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_H diff --git a/ports/atmel-samd/supervisor/internal_flash_root_pointers.h b/ports/atmel-samd/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..3e9148ce0aa91 --- /dev/null +++ b/ports/atmel-samd/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index cb8ffac47e771..01ca797cad796 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -24,15 +24,18 @@ * THE SOFTWARE. */ +#include +#include + #include "boards/board.h" #include "supervisor/port.h" // ASF 4 #include "atmel_start_pins.h" #include "hal/include/hal_delay.h" +#include "hal/include/hal_flash.h" #include "hal/include/hal_gpio.h" #include "hal/include/hal_init.h" -#include "hal/include/hal_usb_device.h" #include "hpl/gclk/hpl_gclk_base.h" #include "hpl/pm/hpl_pm_base.h" @@ -45,16 +48,42 @@ #include "common-hal/analogio/AnalogIn.h" #include "common-hal/analogio/AnalogOut.h" +#include "common-hal/audiobusio/PDMIn.h" +#include "common-hal/audiobusio/I2SOut.h" +#include "common-hal/audioio/AudioOut.h" +#include "common-hal/busio/SPI.h" #include "common-hal/microcontroller/Pin.h" #include "common-hal/pulseio/PulseIn.h" #include "common-hal/pulseio/PulseOut.h" #include "common-hal/pulseio/PWMOut.h" -#include "shared_dma.h" +#include "common-hal/ps2io/Ps2.h" +#include "common-hal/rtc/RTC.h" + +#if CIRCUITPY_TOUCHIO_USE_NATIVE +#include "common-hal/touchio/TouchIn.h" +#endif + +#include "samd/cache.h" +#include "samd/clocks.h" +#include "samd/events.h" +#include "samd/external_interrupts.h" +#include "samd/dma.h" +#include "shared-bindings/rtc/__init__.h" +#include "reset.h" #include "tick.h" -#ifdef CIRCUITPY_GAMEPAD_TICKS +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/stack.h" + +#include "tusb.h" + +#if CIRCUITPY_GAMEPAD #include "shared-module/gamepad/__init__.h" #endif +#if CIRCUITPY_GAMEPADSHIFT +#include "shared-module/gamepadshift/__init__.h" +#endif +#include "shared-module/_pew/PewPew.h" extern volatile bool mp_msc_enabled; @@ -66,11 +95,53 @@ extern volatile bool mp_msc_enabled; #define TRACE_BUFFER_SIZE (1 << (TRACE_BUFFER_MAGNITUDE_PACKETS + 1)) // Size in bytes. 4 bytes per uint32_t. #define TRACE_BUFFER_SIZE_BYTES (TRACE_BUFFER_SIZE << 2) -__attribute__((__aligned__(TRACE_BUFFER_SIZE_BYTES))) uint32_t mtb[TRACE_BUFFER_SIZE]; +__attribute__((__aligned__(TRACE_BUFFER_SIZE_BYTES))) uint32_t mtb[TRACE_BUFFER_SIZE] = {0}; +#endif + +#if CALIBRATE_CRYSTALLESS +static void save_usb_clock_calibration(void) { + // If we are on USB lets double check our fine calibration for the clock and + // save the new value if its different enough. + SYSCTRL->DFLLSYNC.bit.READREQ = 1; + uint16_t saved_calibration = 0x1ff; + if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + saved_calibration = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + } + while (SYSCTRL->PCLKSR.bit.DFLLRDY == 0) { + // TODO(tannewt): Run the mass storage stuff if this takes a while. + } + int16_t current_calibration = SYSCTRL->DFLLVAL.bit.FINE; + if (abs(current_calibration - saved_calibration) > 10) { + // Copy the full internal config page to memory. + uint8_t page_buffer[NVMCTRL_ROW_SIZE]; + memcpy(page_buffer, (uint8_t*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, NVMCTRL_ROW_SIZE); + + // Modify it. + memcpy(page_buffer, "CIRCUITPYTHON1", 15); + // First 16 bytes (0-15) are ID. Little endian! + page_buffer[16] = current_calibration & 0xff; + page_buffer[17] = current_calibration >> 8; + + // Write it back. + // We don't use features that use any advanced NVMCTRL features so we can fake the descriptor + // whenever we need it instead of storing it long term. + struct flash_descriptor desc; + desc.dev.hw = NVMCTRL; + flash_write(&desc, (uint32_t) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, page_buffer, NVMCTRL_ROW_SIZE); + } +} #endif safe_mode_t port_init(void) { #if defined(SAMD21) + + // Set brownout detection to ~2.7V. Default from factory is 1.7V, + // which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V). + // Disable while changing level. + SYSCTRL->BOD33.bit.ENABLE = 0; + SYSCTRL->BOD33.bit.LEVEL = 39; // 2.77V with hysteresis off. Table 37.20 in datasheet. + SYSCTRL->BOD33.bit.ENABLE = 1; + #ifdef ENABLE_MICRO_TRACE_BUFFER REG_MTB_POSITION = ((uint32_t) (mtb - REG_MTB_BASE)) & 0xFFFFFFF8; REG_MTB_FLOW = (((uint32_t) mtb - REG_MTB_BASE) + TRACE_BUFFER_SIZE_BYTES) & 0xFFFFFFF8; @@ -82,144 +153,148 @@ safe_mode_t port_init(void) { #endif #endif +#if defined(SAMD51) + // Set brownout detection to ~2.7V. Default from factory is 1.7V, + // which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V). + // Disable while changing level. + SUPC->BOD33.bit.ENABLE = 0; + SUPC->BOD33.bit.LEVEL = 200; // 2.7V: 1.5V + LEVEL * 6mV. + SUPC->BOD33.bit.ENABLE = 1; -// On power on start or external reset, set _ezero to the canary word. If it -// gets killed, we boot in safe mode. _ezero is the boundary between statically -// allocated memory including the fixed MicroPython heap and the stack. If either -// misbehaves, the canary will not be intact after soft reset. -#ifdef CIRCUITPY_CANARY_WORD -#ifdef SAMD21 - bool power_on_or_external_reset = hri_pm_get_RCAUSE_POR_bit(PM) || hri_pm_get_RCAUSE_EXT_bit(PM); - bool system_reset = hri_pm_get_RCAUSE_SYST_bit(PM); -#endif -#ifdef SAMD51 - bool power_on_or_external_reset = hri_rstc_get_RCAUSE_POR_bit(RSTC) || hri_rstc_get_RCAUSE_EXT_bit(RSTC); - bool system_reset = hri_rstc_get_RCAUSE_SYST_bit(RSTC); -#endif - if (power_on_or_external_reset) { - _ezero = CIRCUITPY_CANARY_WORD; - } else if (system_reset) { - // If we're starting from a system reset we're likely coming from the - // bootloader or hard fault handler. If we're coming from the handler - // the canary will be CIRCUITPY_SAFE_RESTART_WORD and we don't want to - // revive the canary so that a second hard fault won't restart. Resets - // from anywhere else are ok. - if (_ezero == CIRCUITPY_SAFE_RESTART_WORD) { - _ezero = ~CIRCUITPY_CANARY_WORD; - } else { - _ezero = CIRCUITPY_CANARY_WORD; - } + // MPU (Memory Protection Unit) setup. + // We hoped we could make the QSPI region be non-cachable with the MPU, + // but the CMCC doesn't seem to pay attention to the MPU settings. + // Leaving this code here disabled, + // because it was hard enough to figure out, and maybe there's + // a mistake that could make it work in the future. +#if 0 + // Designate QSPI memory mapped region as not cachable. + + // Turn off MPU in case it is on. + MPU->CTRL = 0; + // Configure region 0. + MPU->RNR = 0; + // Region base: start of QSPI mapping area. + // QSPI region runs from 0x04000000 up to and not including 0x05000000: 16 megabytes + MPU->RBAR = QSPI_AHB; + MPU->RASR = + 0b011 << MPU_RASR_AP_Pos | // full read/write access for privileged and user mode + 0b000 << MPU_RASR_TEX_Pos | // caching not allowed, strongly ordered + 1 << MPU_RASR_S_Pos | // sharable + 0 << MPU_RASR_C_Pos | // not cachable + 0 << MPU_RASR_B_Pos | // not bufferable + 0b10111 << MPU_RASR_SIZE_Pos | // 16MB region size + 1 << MPU_RASR_ENABLE_Pos // enable this region + ; + // Turn off regions 1-7. + for (uint32_t i = 1; i < 8; i ++) { + MPU->RNR = i; + MPU->RBAR = 0; + MPU->RASR = 0; } + + // Turn on MPU. Turn on PRIVDEFENA, which defines a default memory + // map for all privileged access, so we don't have to set up other regions + // besides QSPI. + MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk; +#endif + + samd_peripherals_enable_cache(); #endif - init_mcu(); +#ifdef SAMD21 + hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2); + _pm_init(); +#endif - board_init(); +#if CALIBRATE_CRYSTALLESS + uint32_t fine = DEFAULT_DFLL48M_FINE_CALIBRATION; + // The fine calibration data is stored in an NVM page after the text and data storage but before + // the optional file system. The first 16 bytes are the identifier for the section. + if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + fine = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + } + clock_init(BOARD_HAS_CRYSTAL, fine); +#else + // Use a default fine value + clock_init(BOARD_HAS_CRYSTAL, DEFAULT_DFLL48M_FINE_CALIBRATION); +#endif // Configure millisecond timer initialization. tick_init(); - // Init the nvm controller. - // struct nvm_config config_nvm; - // nvm_get_config_defaults(&config_nvm); - // config_nvm.manual_page_write = false; - // nvm_set_config(&config_nvm); +#if CIRCUITPY_RTC + rtc_init(); +#endif init_shared_dma(); - #ifdef CIRCUITPY_CANARY_WORD - // Run in safe mode if the canary is corrupt. - if (_ezero != CIRCUITPY_CANARY_WORD) { - return HARD_CRASH; + + // Reset everything into a known state before board_init. + reset_port(); + + #ifdef SAMD21 + if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) { + return BROWNOUT; + } + #endif + #ifdef SAMD51 + if (RSTC->RCAUSE.bit.BODVDD == 1 || RSTC->RCAUSE.bit.BODCORE == 1) { + return BROWNOUT; } #endif - - // if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) { - // return BROWNOUT; - // } if (board_requests_safe_mode()) { return USER_SAFE_MODE; } - // #if CIRCUITPY_INTERNAL_NVM_SIZE > 0 - // // Upgrade the nvm flash to include one sector for eeprom emulation. - // struct nvm_fusebits fuses; - // if (nvm_get_fuses(&fuses) == STATUS_OK && - // fuses.eeprom_size == NVM_EEPROM_EMULATOR_SIZE_0) { - // #ifdef INTERNAL_FLASH_FS - // // Shift the internal file system up one row. - // for (uint8_t row = 0; row < TOTAL_INTERNAL_FLASH_SIZE / NVMCTRL_ROW_SIZE; row++) { - // uint32_t new_row_address = INTERNAL_FLASH_MEM_SEG1_START_ADDR + row * NVMCTRL_ROW_SIZE; - // nvm_erase_row(new_row_address); - // nvm_write_buffer(new_row_address, - // (uint8_t*) (new_row_address + CIRCUITPY_INTERNAL_EEPROM_SIZE), - // NVMCTRL_ROW_SIZE); - // } - // #endif - // uint32_t nvm_size = CIRCUITPY_INTERNAL_NVM_SIZE; - // uint8_t enum_value = 6; - // while (nvm_size > 256 && enum_value != 255) { - // nvm_size /= 2; - // enum_value -= 1; - // } - // if (enum_value != 255 && nvm_size == 256) { - // // Mark the last section as eeprom now. - // fuses.eeprom_size = (enum nvm_eeprom_emulator_size) enum_value; - // nvm_set_fuses(&fuses); - // } - // } - // #endif - return NO_SAFE_MODE; } void reset_port(void) { - // Reset all SERCOMs except the ones being used by on-board devices. - Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; - for (int i = 0; i < SERCOM_INST_NUM; i++) { -#ifdef SPI_FLASH_SERCOM - if (sercom_instances[i] == SPI_FLASH_SERCOM) { - continue; - } + reset_sercoms(); + +#if CIRCUITPY_AUDIOIO + audio_dma_reset(); + audioout_reset(); #endif -#ifdef MICROPY_HW_APA102_SERCOM - if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { - continue; - } +#if CIRCUITPY_AUDIOBUSIO + i2sout_reset(); + //pdmin_reset(); #endif - // SWRST is same for all modes of SERCOMs. - sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; - } -// #ifdef EXPRESS_BOARD -// audioout_reset(); -// touchin_reset(); -// pdmin_reset(); -// #endif - pulsein_reset(); +#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE + touchin_reset(); +#endif + eic_reset(); +#if CIRCUITPY_PULSEIO pulseout_reset(); pwmout_reset(); +#endif +#if CIRCUITPY_ANALOGIO analogin_reset(); + analogout_reset(); +#endif +#if CIRCUITPY_RTC + rtc_reset(); +#endif + + reset_gclks(); -#ifdef CIRCUITPY_GAMEPAD_TICKS +#if CIRCUITPY_GAMEPAD gamepad_reset(); #endif +#if CIRCUITPY_GAMEPADSHIFT + gamepadshift_reset(); +#endif +#if CIRCUITPY_PEW + pew_reset(); +#endif - analogout_reset(); + reset_event_system(); reset_all_pins(); - // Set up debugging pins after reset_all_pins(). - - // Uncomment to init PIN_PA17 for debugging. - // struct port_config pin_conf; - // port_get_config_defaults(&pin_conf); - // - // pin_conf.direction = PORT_PIN_DIR_OUTPUT; - // port_pin_set_config(MICROPY_HW_LED1, &pin_conf); - // port_pin_set_output_level(MICROPY_HW_LED1, false); - // Output clocks for debugging. // not supported by SAMD51G; uncomment for SAMD51J or update for 51G // #ifdef SAMD51 @@ -229,55 +304,52 @@ void reset_port(void) { // gpio_set_pin_function(PIN_PB15, GPIO_PIN_FUNCTION_M); // GCLK1, D6 // #endif -// -// usb_hid_reset(); -// -// #ifdef CALIBRATE_CRYSTALLESS -// // If we are on USB lets double check our fine calibration for the clock and -// // save the new value if its different enough. -// if (mp_msc_enabled) { -// SYSCTRL->DFLLSYNC.bit.READREQ = 1; -// uint16_t saved_calibration = 0x1ff; -// if (strcmp((char*) INTERNAL_CIRCUITPY_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { -// saved_calibration = ((uint16_t *) INTERNAL_CIRCUITPY_CONFIG_START_ADDR)[8]; -// } -// while (SYSCTRL->PCLKSR.bit.DFLLRDY == 0) { -// // TODO(tannewt): Run the mass storage stuff if this takes a while. -// } -// int16_t current_calibration = SYSCTRL->DFLLVAL.bit.FINE; -// if (abs(current_calibration - saved_calibration) > 10) { -// enum status_code error_code; -// uint8_t page_buffer[NVMCTRL_ROW_SIZE]; -// for (int i = 0; i < NVMCTRL_ROW_PAGES; i++) { -// do -// { -// error_code = nvm_read_buffer(INTERNAL_CIRCUITPY_CONFIG_START_ADDR + i * NVMCTRL_PAGE_SIZE, -// page_buffer + i * NVMCTRL_PAGE_SIZE, -// NVMCTRL_PAGE_SIZE); -// } while (error_code == STATUS_BUSY); -// } -// // If this is the first write, include the header. -// if (strcmp((char*) page_buffer, "CIRCUITPYTHON1") != 0) { -// memcpy(page_buffer, "CIRCUITPYTHON1", 15); -// } -// // First 16 bytes (0-15) are ID. Little endian! -// page_buffer[16] = current_calibration & 0xff; -// page_buffer[17] = current_calibration >> 8; -// do -// { -// error_code = nvm_erase_row(INTERNAL_CIRCUITPY_CONFIG_START_ADDR); -// } while (error_code == STATUS_BUSY); -// for (int i = 0; i < NVMCTRL_ROW_PAGES; i++) { -// do -// { -// error_code = nvm_write_buffer(INTERNAL_CIRCUITPY_CONFIG_START_ADDR + i * NVMCTRL_PAGE_SIZE, -// page_buffer + i * NVMCTRL_PAGE_SIZE, -// NVMCTRL_PAGE_SIZE); -// } while (error_code == STATUS_BUSY); -// } -// } -// } -// #endif +#if CALIBRATE_CRYSTALLESS + if (tud_cdc_connected()) { + save_usb_clock_calibration(); + } +#endif +} + +void reset_to_bootloader(void) { + _bootloader_dbl_tap = DBL_TAP_MAGIC; + reset(); +} + +void reset_cpu(void) { + reset(); +} + +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + +// Place the word to save 8k from the end of RAM so we and the bootloader don't clobber it. +#ifdef SAMD21 +uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); +#endif +#ifdef SAMD51 +uint32_t* safe_word = (uint32_t*) (HSRAM_ADDR + HSRAM_SIZE - 0x2000); +#endif + +void port_set_saved_word(uint32_t value) { + *safe_word = value; +} + +uint32_t port_get_saved_word(void) { + return *safe_word; } /** @@ -285,10 +357,14 @@ void reset_port(void) { */ __attribute__((used)) void HardFault_Handler(void) { +#ifdef ENABLE_MICRO_TRACE_BUFFER + // Turn off the micro trace buffer so we don't fill it up in the infinite + // loop below. + REG_MTB_MASTER = 0x00000000 + 6; +#endif + + reset_into_safe_mode(HARD_CRASH); while (true) { - asm(""); - } - for (uint32_t i = 0; i < 100000; i++) { - asm("noop;"); + asm("nop;"); } } diff --git a/ports/atmel-samd/supervisor/qspi_flash.c b/ports/atmel-samd/supervisor/qspi_flash.c new file mode 100644 index 0000000000000..eca47b16484dd --- /dev/null +++ b/ports/atmel-samd/supervisor/qspi_flash.c @@ -0,0 +1,232 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/spi_flash_api.h" + +#include +#include + +#include "mpconfigboard.h" // for EXTERNAL_FLASH_QSPI_DUAL + +#include "supervisor/shared/external_flash/common_commands.h" +#include "supervisor/shared/external_flash/qspi_flash.h" +#include "samd/cache.h" +#include "samd/dma.h" + +#include "atmel_start_pins.h" +#include "hal_gpio.h" + +bool spi_flash_command(uint8_t command) { + QSPI->INSTRCTRL.bit.INSTR = command; + + QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READ | + QSPI_INSTRFRAME_INSTREN; + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + return true; +} + +bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) { + samd_peripherals_disable_and_clear_cache(); + + QSPI->INSTRCTRL.bit.INSTR = command; + + QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READ | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_DATAEN; + + // Dummy read of INSTRFRAME needed to synchronize. + // See Instruction Transmission Flow Diagram, figure 37.9, page 995 + // and Example 4, page 998, section 37.6.8.5. + (volatile uint32_t) QSPI->INSTRFRAME.reg; + + memcpy(response, (uint8_t *) QSPI_AHB, length); + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + samd_peripherals_enable_cache(); + + return true; +} + +bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t length) { + samd_peripherals_disable_and_clear_cache(); + + QSPI->INSTRCTRL.bit.INSTR = command; + + QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITE | + QSPI_INSTRFRAME_INSTREN | + (data != NULL ? QSPI_INSTRFRAME_DATAEN : 0); + + // Dummy read of INSTRFRAME needed to synchronize. + // See Instruction Transmission Flow Diagram, figure 37.9, page 995 + // and Example 4, page 998, section 37.6.8.5. + (volatile uint32_t) QSPI->INSTRFRAME.reg; + + if (data != NULL) { + memcpy((uint8_t *) QSPI_AHB, data, length); + } + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + samd_peripherals_enable_cache(); + + return true; +} + +bool spi_flash_sector_command(uint8_t command, uint32_t address) { + QSPI->INSTRCTRL.bit.INSTR = command; + QSPI->INSTRADDR.bit.ADDR = address; + + QSPI->INSTRFRAME.reg = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITE | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN; + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + return true; +} + +bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { + samd_peripherals_disable_and_clear_cache(); + + QSPI->INSTRCTRL.bit.INSTR = CMD_PAGE_PROGRAM; + uint32_t mode = QSPI_INSTRFRAME_WIDTH_SINGLE_BIT_SPI; + + QSPI->INSTRFRAME.reg = mode | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_WRITEMEMORY | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN | + QSPI_INSTRFRAME_DATAEN; + + memcpy(((uint8_t *) QSPI_AHB) + address, data, length); + // TODO(tannewt): Fix DMA and enable it. + // qspi_dma_write(address, data, length); + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + samd_peripherals_enable_cache(); + + return true; +} + +bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { + samd_peripherals_disable_and_clear_cache(); + + #ifdef EXTERNAL_FLASH_QSPI_DUAL + QSPI->INSTRCTRL.bit.INSTR = CMD_DUAL_READ; + uint32_t mode = QSPI_INSTRFRAME_WIDTH_DUAL_OUTPUT; + #else + QSPI->INSTRCTRL.bit.INSTR = CMD_QUAD_READ; + uint32_t mode = QSPI_INSTRFRAME_WIDTH_QUAD_OUTPUT; + #endif + + QSPI->INSTRFRAME.reg = mode | + QSPI_INSTRFRAME_ADDRLEN_24BITS | + QSPI_INSTRFRAME_TFRTYPE_READMEMORY | + QSPI_INSTRFRAME_INSTREN | + QSPI_INSTRFRAME_ADDREN | + QSPI_INSTRFRAME_DATAEN | + QSPI_INSTRFRAME_DUMMYLEN(8); + + memcpy(data, ((uint8_t *) QSPI_AHB) + address, length); + // TODO(tannewt): Fix DMA and enable it. + // qspi_dma_read(address, data, length); + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE | QSPI_CTRLA_LASTXFER; + + while( !QSPI->INTFLAG.bit.INSTREND ); + + QSPI->INTFLAG.reg = QSPI_INTFLAG_INSTREND; + + samd_peripherals_enable_cache(); + + return true; +} + + +void spi_flash_init(void) { + MCLK->APBCMASK.bit.QSPI_ = true; + MCLK->AHBMASK.bit.QSPI_ = true; + MCLK->AHBMASK.bit.QSPI_2X_ = false; // Only true if we are doing DDR. + + QSPI->CTRLA.reg = QSPI_CTRLA_SWRST; + // We don't need to wait because we're running as fast as the CPU. + + // Slow, good for debugging with Saleae + // QSPI->BAUD.bit.BAUD = 32; + // Super fast, may be unreliable when Saleae is connected to high speed lines. + QSPI->BAUD.bit.BAUD = 2; + QSPI->CTRLB.reg = QSPI_CTRLB_MODE_MEMORY | // Serial memory mode (map to QSPI_AHB) + QSPI_CTRLB_DATALEN_8BITS | + QSPI_CTRLB_CSMODE_LASTXFER; + + QSPI->CTRLA.reg = QSPI_CTRLA_ENABLE; + + // The QSPI is only connected to one set of pins in the SAMD51 so we can hard code it. + uint32_t pins[6] = {PIN_PA08, PIN_PA09, PIN_PA10, PIN_PA11, PIN_PB10, PIN_PB11}; + for (uint8_t i = 0; i < 6; i++) { + gpio_set_pin_direction(pins[i], GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(pins[i], GPIO_PULL_OFF); + gpio_set_pin_function(pins[i], GPIO_PIN_FUNCTION_H); + } +} + +void spi_flash_init_device(const external_flash_device* device) { + check_quad_enable(device); + + // TODO(tannewt): Adjust the speed for the found device. +} diff --git a/ports/atmel-samd/supervisor/samd21_cpu.s b/ports/atmel-samd/supervisor/samd21_cpu.s new file mode 100755 index 0000000000000..741bb21358ad2 --- /dev/null +++ b/ports/atmel-samd/supervisor/samd21_cpu.s @@ -0,0 +1,35 @@ +.syntax unified +.cpu cortex-m0 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0, #0] +str r5, [r0, #4] +str r6, [r0, #8] +str r7, [r0, #12] +push {r1} +mov r1, r8 +str r1, [r0, #16] +mov r1, r9 +str r1, [r0, #20] +mov r1, r10 +str r1, [r0, #24] +mov r1, r11 +str r1, [r0, #28] +mov r1, r12 +str r1, [r0, #32] +mov r1, r13 +str r1, [r0, #36] +pop {r1} + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/atmel-samd/supervisor/samd51_cpu.s b/ports/atmel-samd/supervisor/samd51_cpu.s new file mode 100755 index 0000000000000..9e6807a5e2e99 --- /dev/null +++ b/ports/atmel-samd/supervisor/samd51_cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/atmel-samd/supervisor/serial.c b/ports/atmel-samd/supervisor/serial.c deleted file mode 100644 index 0410c74176142..0000000000000 --- a/ports/atmel-samd/supervisor/serial.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "supervisor/serial.h" - -#include "usb.h" -#include "tools/autogen_usb_descriptor.h" - -// Serial number as hex characters. This writes directly to the USB -// descriptor. -void load_serial_number(void) { - char nibble_to_hex[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', - 'A', 'B', 'C', 'D', 'E', 'F'}; - #ifdef SAMD21 - uint32_t* addresses[4] = {(uint32_t *) 0x0080A00C, (uint32_t *) 0x0080A040, - (uint32_t *) 0x0080A044, (uint32_t *) 0x0080A048}; - #endif - #ifdef SAMD51 - uint32_t* addresses[4] = {(uint32_t *) 0x008061FC, (uint32_t *) 0x00806010, - (uint32_t *) 0x00806014, (uint32_t *) 0x00806018}; - #endif - for (int i = 0; i < 4; i++) { - for (int j = 0; j < 8; j++) { - uint8_t nibble = (*(addresses[i]) >> j * 4) & 0xf; - // Strings are UTF-16-LE encoded. - serial_number[i * 16 + j * 2] = nibble_to_hex[nibble]; - serial_number[i * 16 + j * 2 + 1] = 0; - } - } -} - -void serial_init(void) { - load_serial_number(); - init_usb(); -} - -bool serial_connected(void) { - return usb_connected(); -} - -char serial_read(void) { - return usb_read(); -} - -bool serial_bytes_available(void) { - return usb_bytes_available(); -} - -void serial_write(const char* text) { - usb_write(text, strlen(text)); -} diff --git a/ports/atmel-samd/supervisor/usb.c b/ports/atmel-samd/supervisor/usb.c new file mode 100644 index 0000000000000..d13ca0ef13b8d --- /dev/null +++ b/ports/atmel-samd/supervisor/usb.c @@ -0,0 +1,59 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "atmel_start_pins.h" +#include "hpl/pm/hpl_pm_base.h" +#include "hpl/gclk/hpl_gclk_base.h" +#include "hal_gpio.h" + +void init_usb_hardware(void) { + #ifdef SAMD21 + _pm_enable_bus_clock(PM_BUS_APBB, USB); + _pm_enable_bus_clock(PM_BUS_AHB, USB); + _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); + #endif + + #ifdef SAMD51 + hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); + hri_mclk_set_AHBMASK_USB_bit(MCLK); + hri_mclk_set_APBBMASK_USB_bit(MCLK); + #endif + + gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA24, false); + gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); + gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA25, false); + gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); + #ifdef SAMD21 + gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM); + gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); + #endif + #ifdef SAMD51 + gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM); + gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP); + #endif +} diff --git a/ports/atmel-samd/tick.c b/ports/atmel-samd/tick.c index f5fd57f5d35ec..f996440ae3253 100644 --- a/ports/atmel-samd/tick.c +++ b/ports/atmel-samd/tick.c @@ -28,55 +28,80 @@ #include "peripheral_clk_config.h" -#include "supervisor/shared/autoreload.h" -#include "shared-module/gamepad/__init__.h" +#include "supervisor/shared/tick.h" +#include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Processor.h" -// Global millisecond tick count -volatile uint64_t ticks_ms = 0; - void SysTick_Handler(void) { // SysTick interrupt handler called when the SysTick timer reaches zero // (every millisecond). - ticks_ms += 1; + common_hal_mcu_disable_interrupts(); - #ifdef CIRCUITPY_AUTORELOAD_DELAY_MS - autoreload_tick(); - #endif - #ifdef CIRCUITPY_GAMEPAD_TICKS - if (!(ticks_ms & CIRCUITPY_GAMEPAD_TICKS)) { - gamepad_tick(); - } - #endif + // Read the control register to reset the COUNTFLAG. + (void) SysTick->CTRL; + common_hal_mcu_enable_interrupts(); + + // Do things common to all ports when the tick occurs + supervisor_tick(); } void tick_init() { uint32_t ticks_per_ms = common_hal_mcu_processor_get_frequency() / 1000; - SysTick_Config(ticks_per_ms); + SysTick_Config(ticks_per_ms-1); NVIC_EnableIRQ(SysTick_IRQn); + // Set all peripheral interrupt priorities to the lowest priority by default. + for (uint16_t i = 0; i < PERIPH_COUNT_IRQn; i++) { + NVIC_SetPriority(i, (1UL << __NVIC_PRIO_BITS) - 1UL); + } + // Bump up the systick interrupt so nothing else interferes with timekeeping. + NVIC_SetPriority(SysTick_IRQn, 0); + #ifdef SAMD21 + NVIC_SetPriority(USB_IRQn, 1); + #endif + + #ifdef SAMD51 + NVIC_SetPriority(USB_0_IRQn, 1); + NVIC_SetPriority(USB_1_IRQn, 1); + NVIC_SetPriority(USB_2_IRQn, 1); + NVIC_SetPriority(USB_3_IRQn, 1); + #endif } void tick_delay(uint32_t us) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; - uint32_t us_between_ticks = SysTick->VAL / ticks_per_us; - uint64_t start_ms = ticks_ms; - while (us > 1000) { - while (ticks_ms == start_ms) {} - us -= us_between_ticks; - start_ms = ticks_ms; - us_between_ticks = 1000; + uint32_t us_until_next_tick = SysTick->VAL / ticks_per_us; + uint32_t start_tick; + while (us >= us_until_next_tick) { + start_tick = SysTick->VAL; // wait for SysTick->VAL to RESET + while (SysTick->VAL < start_tick) {} + us -= us_until_next_tick; + us_until_next_tick = 1000; } - while (SysTick->VAL > ((us_between_ticks - us) * ticks_per_us)) {} + while (SysTick->VAL > ((us_until_next_tick - us) * ticks_per_us)) {} } // us counts down! void current_tick(uint64_t* ms, uint32_t* us_until_ms) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; - *ms = ticks_ms; - *us_until_ms = SysTick->VAL / ticks_per_us; + + // We disable interrupts to prevent ticks_ms from changing while we grab it. + common_hal_mcu_disable_interrupts(); + uint32_t tick_status = SysTick->CTRL; + uint32_t current_us = SysTick->VAL; + uint32_t tick_status2 = SysTick->CTRL; + uint64_t current_ms = supervisor_ticks_ms64(); + // The second clause ensures our value actually rolled over. Its possible it hit zero between + // the VAL read and CTRL read. + if ((tick_status & SysTick_CTRL_COUNTFLAG_Msk) != 0 || + ((tick_status2 & SysTick_CTRL_COUNTFLAG_Msk) != 0 && current_us > ticks_per_us)) { + current_ms++; + } + common_hal_mcu_enable_interrupts(); + *ms = current_ms; + *us_until_ms = current_us / ticks_per_us; } void wait_until(uint64_t ms, uint32_t us_until_ms) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; - while(ticks_ms <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} + while (supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} } diff --git a/ports/atmel-samd/tick.h b/ports/atmel-samd/tick.h index 80e7bc9afb2da..334352df268b9 100644 --- a/ports/atmel-samd/tick.h +++ b/ports/atmel-samd/tick.h @@ -26,9 +26,7 @@ #ifndef MICROPY_INCLUDED_ATMEL_SAMD_TICK_H #define MICROPY_INCLUDED_ATMEL_SAMD_TICK_H -#include "mpconfigport.h" - -extern volatile uint64_t ticks_ms; +#include "py/mpconfig.h" extern struct timer_descriptor ms_timer; diff --git a/ports/atmel-samd/timer_handler.c b/ports/atmel-samd/timer_handler.c new file mode 100644 index 0000000000000..5d6de3093fc7b --- /dev/null +++ b/ports/atmel-samd/timer_handler.c @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "timer_handler.h" + +#include "common-hal/pulseio/PulseOut.h" +#include "shared-module/_pew/PewPew.h" +#include "common-hal/frequencyio/FrequencyIn.h" + +static uint8_t tc_handler[TC_INST_NUM]; + +void set_timer_handler(bool is_tc, uint8_t index, uint8_t timer_handler) { + if (is_tc) { + tc_handler[index] = timer_handler; + } +} + +void shared_timer_handler(bool is_tc, uint8_t index) { + // Add calls to interrupt handlers for specific functionality here. + // Make sure to add the handler #define to timer_handler.h + if (is_tc) { + uint8_t handler = tc_handler[index]; + switch(handler) { + case TC_HANDLER_PULSEOUT: + #if CIRCUITPY_PULSEIO + pulseout_interrupt_handler(index); + #endif + break; + case TC_HANDLER_PEW: + #if CIRCUITPY_PEW + pewpew_interrupt_handler(index); + #endif + break; + case TC_HANDLER_FREQUENCYIN: + #if CIRCUITPY_FREQUENCYIO + frequencyin_interrupt_handler(index); + #endif + break; + default: + break; + } + } +} diff --git a/ports/atmel-samd/timer_handler.h b/ports/atmel-samd/timer_handler.h new file mode 100644 index 0000000000000..4a7adb58c3e17 --- /dev/null +++ b/ports/atmel-samd/timer_handler.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_TIMER_HANDLER_H +#define MICROPY_INCLUDED_ATMEL_SAMD_TIMER_HANDLER_H + +#define TC_HANDLER_NO_INTERRUPT 0x0 +#define TC_HANDLER_PULSEOUT 0x1 +#define TC_HANDLER_PEW 0x2 +#define TC_HANDLER_FREQUENCYIN 0x3 + +void set_timer_handler(bool is_tc, uint8_t index, uint8_t timer_handler); +void shared_timer_handler(bool is_tc, uint8_t index); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_TIMER_HANDLER_H diff --git a/ports/atmel-samd/timers.c b/ports/atmel-samd/timers.c deleted file mode 100644 index 2e8541f24262f..0000000000000 --- a/ports/atmel-samd/timers.c +++ /dev/null @@ -1,299 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "timers.h" - -#include "common-hal/pulseio/PulseOut.h" - -#ifdef SAMD21 -#include "hpl/gclk/hpl_gclk_base.h" -#endif - -#ifdef SAMD51 -#include "hri/hri_gclk_d51.h" -#endif - -// This bitmask keeps track of which channels of a TCC are currently claimed. -#ifdef SAMD21 -const uint8_t tcc_cc_num[3] = {4, 2, 2}; -const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC3_GCLK_ID, - TC4_GCLK_ID, - TC5_GCLK_ID, -#ifdef TC6_GCLK_ID - TC6_GCLK_ID, -#endif -#ifdef TC7_GCLK_ID - TC7_GCLK_ID, -#endif - }; -const uint8_t tcc_gclk_ids[3] = {TCC0_GCLK_ID, TCC1_GCLK_ID, TCC2_GCLK_ID}; -#endif -#ifdef SAMD51 -const uint8_t tcc_cc_num[5] = {6, 4, 3, 2, 2}; -const uint8_t tc_gclk_ids[TC_INST_NUM] = {TC0_GCLK_ID, - TC1_GCLK_ID, - TC2_GCLK_ID, - TC3_GCLK_ID, -#ifdef TC4_GCLK_ID - TC4_GCLK_ID, -#endif -#ifdef TC5_GCLK_ID - TC5_GCLK_ID, -#endif -#ifdef TC6_GCLK_ID - TC6_GCLK_ID, -#endif -#ifdef TC7_GCLK_ID - TC7_GCLK_ID, -#endif - }; -const uint8_t tcc_gclk_ids[TCC_INST_NUM] = {TCC0_GCLK_ID, - TCC1_GCLK_ID, - TCC2_GCLK_ID, -#ifdef TCC3_GCLK_ID - TCC3_GCLK_ID, -#endif -#ifdef TCC4_GCLK_ID - TCC4_GCLK_ID -#endif - }; -#endif -Tc* const tc_insts[TC_INST_NUM] = TC_INSTS; -Tcc* const tcc_insts[TCC_INST_NUM] = TCC_INSTS; - -IRQn_Type const tc_irq[TC_INST_NUM] = { -#ifdef TC0 - TC0_IRQn, -#endif -#ifdef TC1 - TC1_IRQn, -#endif -#ifdef TC2 - TC2_IRQn, -#endif -#ifdef TC3 - TC3_IRQn, -#endif -#ifdef TC4 - TC4_IRQn, -#endif -#ifdef TC5 - TC5_IRQn, -#endif -#ifdef TC6 - TC6_IRQn, -#endif -#ifdef TC7 - TC7_IRQn, -#endif -}; - -void turn_on_clocks(bool is_tc, uint8_t index, uint32_t gclk_index) { - uint8_t gclk_id; - if (is_tc) { - gclk_id = tc_gclk_ids[index]; - } else { - gclk_id = tcc_gclk_ids[index]; - } - // Turn on the clocks for the peripherals. - #ifdef SAMD51 - if (is_tc) { - switch (index) { - case 0: - MCLK->APBAMASK.reg |= MCLK_APBAMASK_TC0; - break; - case 1: - MCLK->APBAMASK.reg |= MCLK_APBAMASK_TC1; - break; - case 2: - MCLK->APBBMASK.reg |= MCLK_APBBMASK_TC2; - break; - case 3: - MCLK->APBBMASK.reg |= MCLK_APBBMASK_TC3; - break; - case 4: - MCLK->APBCMASK.reg |= MCLK_APBCMASK_TC4; - break; - case 5: - MCLK->APBCMASK.reg |= MCLK_APBCMASK_TC5; - break; - case 6: - MCLK->APBDMASK.reg |= MCLK_APBDMASK_TC6; - break; - case 7: - MCLK->APBDMASK.reg |= MCLK_APBDMASK_TC7; - break; - default: - break; - } - } else { - switch (index) { - case 0: - MCLK->APBBMASK.reg |= MCLK_APBBMASK_TCC0; - break; - case 1: - MCLK->APBBMASK.reg |= MCLK_APBBMASK_TCC1; - break; - case 2: - MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2; - break; - case 3: - MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC3; - break; - case 4: - MCLK->APBDMASK.reg |= MCLK_APBDMASK_TCC4; - break; - default: - break; - } - } - - // FIXME(tannewt): TC4-TC7 can only have 100mhz inputs. - - hri_gclk_write_PCHCTRL_reg(GCLK, gclk_id, - gclk_index | (1 << GCLK_PCHCTRL_CHEN_Pos)); - #endif - - #ifdef SAMD21 - // Determine the clock slot on the APBC bus. TCC0 is the first and 8 slots in. - uint8_t clock_slot = 8 + index; - // We index TCs starting at zero but in memory they begin at three so we have to add three. - if (is_tc) { - clock_slot += 3; - } - PM->APBCMASK.reg |= 1 << clock_slot; - _gclk_enable_channel(gclk_id, gclk_index); - #endif -} - -void tc_set_enable(Tc* tc, bool enable) { - tc->COUNT16.CTRLA.bit.ENABLE = enable; - #ifdef SAMD21 - while (tc->COUNT16.STATUS.bit.SYNCBUSY != 0) { - /* Wait for sync */ - } - #endif - #ifdef SAMD51 - while (tc->COUNT16.SYNCBUSY.bit.ENABLE != 0) { - /* Wait for sync */ - } - #endif -} - -void tc_enable_interrupts(uint8_t tc_index) { - NVIC_DisableIRQ(tc_irq[tc_index]); - NVIC_ClearPendingIRQ(tc_irq[tc_index]); - NVIC_EnableIRQ(tc_irq[tc_index]); -} - -void tc_disable_interrupts(uint8_t tc_index) { - NVIC_DisableIRQ(tc_irq[tc_index]); - NVIC_ClearPendingIRQ(tc_irq[tc_index]); -} - -void tcc_set_enable(Tcc* tcc, bool enable) { - tcc->CTRLA.bit.ENABLE = enable; - while (tcc->SYNCBUSY.bit.ENABLE != 0) { - /* Wait for sync */ - } -} - -void tc_wait_for_sync(Tc* tc) { - #ifdef SAMD21 - while (tc->COUNT16.STATUS.bit.SYNCBUSY != 0) {} - #endif - #ifdef SAMD51 - while (tc->COUNT16.SYNCBUSY.reg != 0) {} - #endif -} - -void tc_reset(Tc* tc) { - tc->COUNT16.CTRLA.bit.SWRST = 1; - while (tc->COUNT16.CTRLA.bit.SWRST == 1) { - } -} - -void shared_timer_handler(bool is_tc, uint8_t index) { - // Add calls to interrupt handlers for specific functionality here. - if (is_tc) { - pulseout_interrupt_handler(index); - } -} - -#ifdef SAMD51 -#define TC_OFFSET 0 -#endif -#ifdef SAMD21 -#define TC_OFFSET 3 -#endif - -void TCC0_Handler(void) { - shared_timer_handler(false, 0); -} -void TCC1_Handler(void) { - shared_timer_handler(false, 1); -} -void TCC2_Handler(void) { - shared_timer_handler(false, 2); -} -// TC0 - TC2 only exist on the SAMD51 -#ifdef TC0 -void TC0_Handler(void) { - shared_timer_handler(true, 0); -} -#endif -#ifdef TC1 -void TC1_Handler(void) { - shared_timer_handler(true, 1); -} -#endif -#ifdef TC2 -void TC2_Handler(void) { - shared_timer_handler(true, 2); -} -#endif -void TC3_Handler(void) { - shared_timer_handler(true, 3 - TC_OFFSET); -} -void TC4_Handler(void) { - shared_timer_handler(true, 4 - TC_OFFSET); -} -void TC5_Handler(void) { - shared_timer_handler(true, 5 - TC_OFFSET); -} -#ifdef TC6 -void TC6_Handler(void) { - shared_timer_handler(true, 6 - TC_OFFSET); -} -#endif -#ifdef TC7 -void TC7_Handler(void) { - shared_timer_handler(true, 7 - TC_OFFSET); -} -#endif diff --git a/ports/atmel-samd/timers.h b/ports/atmel-samd/timers.h deleted file mode 100644 index bb3ab5ee7c38e..0000000000000 --- a/ports/atmel-samd/timers.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_TIMERS_H -#define MICROPY_INCLUDED_ATMEL_SAMD_TIMERS_H - -#include "include/sam.h" - -#ifdef SAMD21 -const uint8_t tcc_cc_num[3]; -const uint8_t tc_gclk_ids[TC_INST_NUM]; -const uint8_t tcc_gclk_ids[3]; -#endif -#ifdef SAMD51 -const uint8_t tcc_cc_num[5]; -const uint8_t tc_gclk_ids[TC_INST_NUM]; -const uint8_t tcc_gclk_ids[TCC_INST_NUM]; -#endif -Tc* const tc_insts[TC_INST_NUM]; -Tcc* const tcc_insts[TCC_INST_NUM]; - -void turn_on_clocks(bool is_tc, uint8_t index, uint32_t gclk_index); -void tc_set_enable(Tc* tc, bool enable); -void tcc_set_enable(Tcc* tcc, bool enable); -void tc_wait_for_sync(Tc* tc); -void tc_reset(Tc* tc); - -void tc_enable_interrupts(uint8_t tc_index); -void tc_disable_interrupts(uint8_t tc_index); - -// Handlers -void TCC0_Handler(void); -void TCC1_Handler(void); -void TCC2_Handler(void); -void TC3_Handler(void); -void TC4_Handler(void); -void TC5_Handler(void); -#ifdef TC6 -void TC6_Handler(void); -#endif -#ifdef TC7 -void TC7_Handler(void); -#endif - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_TIMERS_H diff --git a/ports/atmel-samd/tools/autogen_usb_descriptor.h b/ports/atmel-samd/tools/autogen_usb_descriptor.h deleted file mode 100644 index d9260681c39f8..0000000000000 --- a/ports/atmel-samd/tools/autogen_usb_descriptor.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H -#define MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H - -#include "usb/device/usbdc.h" - -struct usbd_descriptors descriptor_bounds; -uint8_t* serial_number; -uint8_t serial_number_length; - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H diff --git a/ports/atmel-samd/tools/gen_pin_name_table.py b/ports/atmel-samd/tools/gen_pin_name_table.py index 76c9cf255b6a1..ded64e5f69c2b 100644 --- a/ports/atmel-samd/tools/gen_pin_name_table.py +++ b/ports/atmel-samd/tools/gen_pin_name_table.py @@ -156,6 +156,9 @@ "PA14", "PA15", "PA16", "PA17", "PA18", "PA19", "PA20", "PA21", "PA22", "PA23", "PA30", "PA31"] }, + "ps2io": { + "Ps2": ALL_BUT_USB, + }, "touchio": { "TouchIn": ["PA02", "PA03", "PB08", "PB09", "PA04", "PA05", "PA06", "PA07", "PB02", "PB03"] diff --git a/ports/atmel-samd/tools/gen_usb_descriptor.py b/ports/atmel-samd/tools/gen_usb_descriptor.py deleted file mode 100644 index 5456005236a75..0000000000000 --- a/ports/atmel-samd/tools/gen_usb_descriptor.py +++ /dev/null @@ -1,149 +0,0 @@ -import argparse - -import os -import sys - -# path hacking -sys.path.append("../../tools/usb_descriptor") - -from adafruit_usb_descriptor import cdc, standard, util - -parser = argparse.ArgumentParser(description='Generate USB descriptors.') -parser.add_argument('--manufacturer', type=str, - help='manufacturer of the device') -parser.add_argument('--product', type=str, - help='product name of the device') -parser.add_argument('--vid', type=lambda x: int(x, 16), - help='vendor id') -parser.add_argument('--pid', type=lambda x: int(x, 16), - help='product id') -parser.add_argument('--serial_number_length', type=int, default=32, - help='length needed for the serial number in digits') -parser.add_argument('output_file', type=argparse.FileType('w')) - -args = parser.parse_args() - -langid = standard.StringDescriptor("\u0409") -manufacturer = standard.StringDescriptor(args.manufacturer) -product = standard.StringDescriptor(args.product) -serial_number = standard.StringDescriptor("serial number. you should fill in a unique serial number here."[:args.serial_number_length]) -strings = [langid, manufacturer, product, serial_number] - -# vid = 0x239A -# pid = 0x8021 - -device = standard.DeviceDescriptor( - idVendor=args.vid, - idProduct=args.pid, - iManufacturer=strings.index(manufacturer), - iProduct=strings.index(product), - iSerialNumber=strings.index(serial_number)) - -# Interface numbers are interface set local and endpoints are interface local -# until core.join_interfaces renumbers them. -cdc_interfaces = [ - standard.InterfaceDescriptor( - bInterfaceClass=0x2, # Communications Device Class - bInterfaceSubClass=0x02, # Abstract control model - bInterfaceProtocol=0x01, # Common AT Commands - subdescriptors=[ - # Working 2.x - # radix: hexadecimal - # 05 24 00 10 01 header - # 05 24 01 03 01 call manage - # 04 24 02 06 acm - # 05 24 06 00 01 union - cdc.Header(bcdCDC=0x0110), - cdc.CallManagement(bmCapabilities=0x03, bDataInterface=0x01), - cdc.AbstractControlManagement(bmCapabilities=0x02), - cdc.Union(bMasterInterface=0x00, - bSlaveInterface=[0x01]), - standard.EndpointDescriptor( - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, - bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, - wMaxPacketSize=0x8, - bInterval=10) - ] - ), - standard.InterfaceDescriptor( - bInterfaceClass=0x0a, - subdescriptors=[ - standard.EndpointDescriptor( - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, - bmAttributes=standard.EndpointDescriptor.TYPE_BULK), - standard.EndpointDescriptor( - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_OUT, - bmAttributes=standard.EndpointDescriptor.TYPE_BULK) - ] - ) -] - -msc_interfaces = [ - standard.InterfaceDescriptor( - bInterfaceClass=0x08, - bInterfaceSubClass=0x06, - bInterfaceProtocol=0x50, - subdescriptors=[ - standard.EndpointDescriptor( - bEndpointAddress=0x0 | standard.EndpointDescriptor.DIRECTION_IN, - bmAttributes=standard.EndpointDescriptor.TYPE_BULK), - standard.EndpointDescriptor( - bEndpointAddress=0x1 | standard.EndpointDescriptor.DIRECTION_OUT, - bmAttributes=standard.EndpointDescriptor.TYPE_BULK) - ] - ) -] - -interfaces = util.join_interfaces(cdc_interfaces, msc_interfaces) - -cdc_function = standard.InterfaceAssociationDescriptor( - bFirstInterface=interfaces.index(cdc_interfaces[0]), - bInterfaceCount=len(cdc_interfaces), - bFunctionClass=0x2, # Communications Device Class - bFunctionSubClass=0x2, # Abstract control model - bFunctionProtocol=0x1) # Common AT Commands - -configuration = standard.ConfigurationDescriptor( - wTotalLength=(standard.ConfigurationDescriptor.bLength + - cdc_function.bLength + - sum([len(bytes(x)) for x in interfaces])), - bNumInterfaces=len(interfaces)) - -descriptor_list = [device, configuration, cdc_function] -descriptor_list.extend(interfaces) -descriptor_list.extend(strings) - -output_file = args.output_file - -output_file.write("#include \n\n") -output_file.write("#include \"tools/autogen_usb_descriptor.h\"\n\n") -output_file.write("uint8_t usb_descriptors[] = {\n") -descriptor_length = 0 -serial_number_offset = None -for descriptor in descriptor_list: - output_file.write("// " + str(descriptor) + "\n") - b = bytes(descriptor) - i = 0 - if descriptor == serial_number: - # Add two for the length and descriptor type bytes. - serial_number_offset = descriptor_length + 2 - # This prints each subdescriptor on a separate line. - while i < len(b): - length = b[i] - for j in range(length): - output_file.write("0x{:02x}, ".format(b[i + j])) - output_file.write("\n") - i += length - descriptor_length += length - - output_file.write("\n") -output_file.write("};\n\n") -output_file.write("struct usbd_descriptors descriptor_bounds = " + - "{usb_descriptors," + - " usb_descriptors + sizeof(usb_descriptors)};\n") -output_file.write("uint8_t* serial_number = usb_descriptors + " + - str(serial_number_offset) + ";\n") -output_file.write("uint8_t serial_number_length = " + - str(args.serial_number_length) + ";\n") - -output_file.close() diff --git a/ports/atmel-samd/usb.c b/ports/atmel-samd/usb.c deleted file mode 100644 index fd939e22df882..0000000000000 --- a/ports/atmel-samd/usb.c +++ /dev/null @@ -1,325 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "usb.h" - -#include - -// We must include this early because it sets values used in the ASF4 includes -// below. -#include "py/mpconfig.h" - -#include "hal/include/hal_gpio.h" -#include "usb/class/cdc/device/cdcdf_acm.h" -// #include "hiddf_mouse.h" -// #include "hiddf_keyboard.h" -#include "usb/class/hid/device/hiddf_generic.h" -#include "usb/class/composite/device/composite_desc.h" -#include "usb/class/msc/device/mscdf.h" -#include "peripheral_clk_config.h" -#include "hpl/pm/hpl_pm_base.h" -#include "hpl/gclk/hpl_gclk_base.h" - -#include "lib/utils/interrupt_char.h" -#include "tools/autogen_usb_descriptor.h" -#include "reset.h" -#include "usb_mass_storage.h" - -#include "supervisor/shared/autoreload.h" - -// Store received characters on our own so that we can filter control characters -// and act immediately on CTRL-C for example. - -// Receive buffer -static uint8_t usb_rx_buf[USB_RX_BUF_SIZE]; - -// Receive buffer head -static volatile uint8_t usb_rx_buf_head = 0; - -// Receive buffer tail -static volatile uint8_t usb_rx_buf_tail = 0; - -// Number of bytes in receive buffer -volatile uint8_t usb_rx_count = 0; - -volatile bool mp_cdc_enabled = false; -volatile bool usb_transmitting = false; - -/** Ctrl endpoint buffer */ -COMPILER_ALIGNED(4) static uint8_t ctrl_buffer[64]; - -static void init_hardware(void) { - #ifdef SAMD21 - _pm_enable_bus_clock(PM_BUS_APBB, USB); - _pm_enable_bus_clock(PM_BUS_AHB, USB); - _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); - #endif - - #ifdef SAMD51 - hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN); - hri_mclk_set_AHBMASK_USB_bit(MCLK); - hri_mclk_set_APBBMASK_USB_bit(MCLK); - #endif - - usb_d_init(); - - gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA24, false); - gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); - gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA25, false); - gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); - #ifdef SAMD21 - gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM); - gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); - #endif - #ifdef SAMD51 - gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM); - gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP); - #endif -} - -#define CDC_BULKOUT_SIZE CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ -COMPILER_ALIGNED(4) uint8_t cdc_packet_buffer[CDC_BULKOUT_SIZE]; -static volatile bool pending_read; - -static int32_t start_read(void) { - pending_read = true; - int32_t result = cdcdf_acm_read(cdc_packet_buffer, CDC_BULKOUT_SIZE); - if (result != ERR_NONE) { - pending_read = false; - } - return result; -} - -static bool read_complete(const uint8_t ep, const enum usb_xfer_code rc, const uint32_t count) { - if (rc != USB_XFER_DONE) { - return false; // No errors. - } - pending_read = false; - volatile hal_atomic_t flags; - atomic_enter_critical(&flags); - // If our buffer can't fit the data received, then error out. - if (count > (uint8_t) (USB_RX_BUF_SIZE - usb_rx_count)) { - atomic_leave_critical(&flags); - return true; - } - - for (uint16_t i = 0; i < count; i++) { - uint8_t c = cdc_packet_buffer[i]; - if (c == mp_interrupt_char) { - mp_keyboard_interrupt(); - // If interrupted, flush all the input. - usb_rx_count = 0; - usb_rx_buf_head = 0; - usb_rx_buf_tail = 0; - break; - } else { - // The count of characters present in receive buffer is - // incremented. - usb_rx_count++; - usb_rx_buf[usb_rx_buf_tail] = c; - usb_rx_buf_tail++; - if (usb_rx_buf_tail == USB_RX_BUF_SIZE) { - // Reached the end of buffer, revert back to beginning of - // buffer. - usb_rx_buf_tail = 0; - } - } - } - atomic_leave_critical(&flags); - - /* No error. */ - return false; -} - -static bool write_complete(const uint8_t ep, - const enum usb_xfer_code rc, - const uint32_t count) { - if (rc != USB_XFER_DONE) { - return false; // No errors. - } - // This is called after writes are finished. - - usb_transmitting = false; - - /* No error. */ - return false; -} - -volatile bool reset_on_disconnect = false; -volatile bool cdc_connected = false; - -static bool usb_device_cb_state_c(usb_cdc_control_signal_t state) -{ - cdc_connected = state.rs232.DTR; - if (state.rs232.DTR) { - } else if (!state.rs232.DTR && reset_on_disconnect) { - reset_to_bootloader(); - } - - /* No error. */ - return false; -} - -static bool usb_device_cb_line_coding_c(const usb_cdc_line_coding_t* coding) -{ - reset_on_disconnect = coding->dwDTERate == 1200; - /* Ok to change. */ - return true; -} - -void init_usb(void) { - init_hardware(); - - mp_cdc_enabled = false; - - usbdc_init(ctrl_buffer); - - /* usbdc_register_funcion inside */ - cdcdf_acm_init(); - pending_read = false; - - mscdf_init(1); - // hiddf_mouse_init(); - // hiddf_keyboard_init(); - - mscdf_register_callback(MSCDF_CB_INQUIRY_DISK, (FUNC_PTR)usb_msc_inquiry_info); - mscdf_register_callback(MSCDF_CB_GET_DISK_CAPACITY, (FUNC_PTR)usb_msc_get_capacity); - mscdf_register_callback(MSCDF_CB_START_READ_DISK, (FUNC_PTR)usb_msc_new_read); - mscdf_register_callback(MSCDF_CB_START_WRITE_DISK, (FUNC_PTR)usb_msc_new_write); - mscdf_register_callback(MSCDF_CB_EJECT_DISK, (FUNC_PTR)usb_msc_disk_eject); - mscdf_register_callback(MSCDF_CB_TEST_DISK_READY, (FUNC_PTR)usb_msc_disk_is_ready); - mscdf_register_callback(MSCDF_CB_XFER_BLOCKS_DONE, (FUNC_PTR)usb_msc_xfer_done); - mscdf_register_callback(MSCDF_CB_IS_WRITABLE, (FUNC_PTR)usb_msc_disk_is_writable); - - usbdc_start(&descriptor_bounds); - - usbdc_attach(); -} - -static bool cdc_enabled(void) { - if (!cdcdf_acm_is_enabled()) { - mp_cdc_enabled = false; - return false; - } - if (!mp_cdc_enabled) { - cdcdf_acm_register_callback(CDCDF_ACM_CB_READ, (FUNC_PTR)read_complete); - cdcdf_acm_register_callback(CDCDF_ACM_CB_WRITE, (FUNC_PTR)write_complete); - cdcdf_acm_register_callback(CDCDF_ACM_CB_STATE_C, (FUNC_PTR)usb_device_cb_state_c); - cdcdf_acm_register_callback(CDCDF_ACM_CB_LINE_CODING_C, (FUNC_PTR)usb_device_cb_line_coding_c); - mp_cdc_enabled = true; - } - - return true; -} - -bool usb_bytes_available(void) { - // Check if the buffer has data, but not enough - // space to hold another read. - if (usb_rx_count > USB_RX_BUF_SIZE - CDC_BULKOUT_SIZE) { - return true; - } - // Buffer has enough room - if (cdc_enabled() && !pending_read) { - start_read(); - } - // Buffer is empty and/or no new data is available - if (usb_rx_count == 0) { - return false; - } - return usb_rx_count > 0; -} - -int usb_read(void) { - if (!cdc_enabled() || usb_rx_count == 0) { - return 0; - } - - // Copy from head. - int data; - CRITICAL_SECTION_ENTER(); - data = usb_rx_buf[usb_rx_buf_head]; - usb_rx_buf_head++; - usb_rx_count--; - if (usb_rx_buf_head == USB_RX_BUF_SIZE) { - usb_rx_buf_head = 0; - } - CRITICAL_SECTION_LEAVE(); - - return data; -} - -// TODO(tannewt): See if we can disable the internal CDC IN cache since we -// we manage this one ourselves. -#define CDC_BULKIN_SIZE CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ -COMPILER_ALIGNED(4) uint8_t cdc_output_buffer[CDC_BULKIN_SIZE]; - -void usb_write(const char* buffer, uint32_t len) { - if (!cdc_enabled()) { - return; - } - if (!cdc_connected) { - // TODO(tannewt): Should we write to a file instead? - return; - } - uint8_t * output_buffer; - uint8_t output_len; - while (len > 0) { - while (usb_transmitting) {} - output_buffer = (uint8_t *) buffer; - output_len = len; - // Use our own cache in two different cases: - // * When we're at the end of a transmission and we'll return before - // the given buffer is actually transferred to the USB device. - // * When our given buffer isn't aligned on word boundaries. - if (output_len <= CDC_BULKIN_SIZE || ((uint32_t) buffer) % 4 != 0) { - output_buffer = cdc_output_buffer; - output_len = output_len > CDC_BULKIN_SIZE ? CDC_BULKIN_SIZE : output_len; - memcpy(cdc_output_buffer, buffer, output_len); - } else { - output_len = CDC_BULKIN_SIZE; - } - usb_transmitting = true; - cdcdf_acm_write(output_buffer, output_len); - buffer += output_len * sizeof(char); - len -= output_len; - } -} - -bool usb_connected(void) { - return cdc_enabled(); -} - -// Poll for input if keyboard interrupts are enabled, -// so that we can check for the interrupt char. read_complete() does the checking. -// also make sure we have enough room in the local buffer -void usb_cdc_background() { - // - if (mp_interrupt_char != -1 && cdc_enabled() && !pending_read && (usb_rx_count < USB_RX_BUF_SIZE - CDC_BULKOUT_SIZE)) { - start_read(); - } -} diff --git a/ports/atmel-samd/usb.h b/ports/atmel-samd/usb.h deleted file mode 100644 index f01c5ebfb7d80..0000000000000 --- a/ports/atmel-samd/usb.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_USB_H -#define MICROPY_INCLUDED_ATMEL_SAMD_USB_H - -#include -#include - -#define USB_RX_BUF_SIZE 128 - -void init_usb(void); -int usb_read(void); -void usb_write(const char* buffer, uint32_t len); -bool usb_bytes_available(void); -bool usb_connected(void); -void usb_cdc_background(void); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_USB_H diff --git a/ports/atmel-samd/usb_mass_storage.c b/ports/atmel-samd/usb_mass_storage.c deleted file mode 100644 index 9b6715158c9ef..0000000000000 --- a/ports/atmel-samd/usb_mass_storage.c +++ /dev/null @@ -1,338 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "usb_mass_storage.h" -#include "supervisor/shared/autoreload.h" - -#include "hal/utils/include/err_codes.h" -#include "hal/utils/include/utils.h" -#include "usb/class/msc/device/mscdf.h" - -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "lib/oofatfs/ffconf.h" -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "py/mpstate.h" -#include "py/misc.h" - -// The root FS is always at the end of the list. -static fs_user_mount_t* get_vfs(int lun) { - // TODO(tannewt): Return the mount which matches the lun where 0 is the end - // and is counted in reverse. - if (lun > 0) { - return NULL; - } - mp_vfs_mount_t* current_mount = MP_STATE_VM(vfs_mount_table); - if (current_mount == NULL) { - return NULL; - } - while (current_mount->next != NULL) { - current_mount = current_mount->next; - } - return current_mount->obj; -} - -/* Inquiry Information */ -// This is designed to handle the common case where we have an internal file -// system and an optional SD card. -COMPILER_ALIGNED(4) static uint8_t inquiry_info[2][36]; - -/* Capacities of Disk */ -COMPILER_ALIGNED(4) static uint8_t format_capa[2][8]; - -/** - * \brief Eject Disk - * \param[in] lun logic unit number - * \return Operation status. - */ -int32_t usb_msc_disk_eject(uint8_t lun) { - if (lun > 1) { - return ERR_NOT_FOUND; - } - fs_user_mount_t* current_mount = get_vfs(lun); - // Return ERR_NOT_READY if not ready, otherwise ERR_NONE. - if (current_mount == NULL) { - return ERR_NOT_FOUND; - } - // TODO(tannewt): Should we flush here? - return ERR_NONE; -} - -/** - * \brief Inquiry whether Disk is writable. ERR_DENIED if it is not writable. - * ERR_NONE if it is. ERR_NOT_FOUND if its missing. - * \param[in] lun logic unit number - * \return Operation status. - */ -int32_t usb_msc_disk_is_writable(uint8_t lun) { - if (lun > 1) { - return ERR_NOT_FOUND; - } - - fs_user_mount_t* vfs = get_vfs(lun); - if (vfs == NULL) { - return ERR_NOT_FOUND; - } - if (vfs->writeblocks[0] == MP_OBJ_NULL || - (vfs->flags & FSUSER_USB_WRITABLE) == 0) { - return ERR_DENIED; - } - return ERR_NONE; -} - -/** - * \brief Inquiry whether Disk is ready - * \param[in] lun logic unit number - * \return Operation status. - */ -int32_t usb_msc_disk_is_ready(uint8_t lun) { - if (lun > 1) { - return ERR_NOT_FOUND; - } - - fs_user_mount_t* current_mount = get_vfs(lun); - if (current_mount == NULL) { - return ERR_NOT_FOUND; - } - return ERR_NONE; -} - -/** - * \brief Callback invoked when inquiry data command received - * \param[in] lun logic unit number - * \return Operation status. - */ -uint8_t *usb_msc_inquiry_info(uint8_t lun) { - if (lun > 1) { - return NULL; - } else { - for (uint8_t i = 0; i < 36; i++) { - inquiry_info[lun][i] = 0; - } - inquiry_info[lun][0] = SCSI_INQ_PQ_CONNECTED | SCSI_INQ_DT_DIR_ACCESS; - // connected, direct access - inquiry_info[lun][1] = SCSI_INQ_RMB; // removable medium - inquiry_info[lun][2] = SCSI_INQ_VER_SPC; // SBC version of SCSI primary commands - inquiry_info[lun][3] = SCSI_INQ_RSP_SPC2;// SPC-2 response format - inquiry_info[lun][4] = 31; // 31 bytes following - return &inquiry_info[lun][0]; - } -} - -/** - * \brief Callback invoked when read format capacities command received - * \param[in] lun logic unit number - */ -uint8_t *usb_msc_get_capacity(uint8_t lun) { - if (lun > 1) { - return NULL; - } else { - fs_user_mount_t * vfs = get_vfs(lun); - uint32_t last_valid_sector = 0; - uint32_t sector_size = 0; - if (vfs == NULL || - disk_ioctl(vfs, GET_SECTOR_COUNT, &last_valid_sector) != RES_OK || - disk_ioctl(vfs, GET_SECTOR_SIZE, §or_size) != RES_OK) { - return NULL; - } - // Subtract one from the sector count to get the last valid sector. - last_valid_sector--; - - format_capa[lun][0] = (uint8_t)(last_valid_sector >> 24); - format_capa[lun][1] = (uint8_t)(last_valid_sector >> 16); - format_capa[lun][2] = (uint8_t)(last_valid_sector >> 8); - format_capa[lun][3] = (uint8_t)(last_valid_sector >> 0); - format_capa[lun][4] = (uint8_t)(sector_size >> 24); - format_capa[lun][5] = (uint8_t)(sector_size >> 16); - format_capa[lun][6] = (uint8_t)(sector_size >> 8); - format_capa[lun][7] = (uint8_t)(sector_size >> 0); - - // 8 byte response. First 4 bytes are last block address. Second 4 - // bytes are sector size. - return &format_capa[lun][0]; - } -} - -// USB transfer state. -volatile bool usb_busy; -volatile bool active_read; -volatile bool active_write; -volatile uint8_t active_lun; -volatile uint32_t active_addr; -volatile uint32_t active_nblocks; -volatile bool sector_loaded; -COMPILER_ALIGNED(4) uint8_t sector_buffer[512]; - -/** - * \brief Callback invoked when a new read blocks command received - * \param[in] lun logic unit number - * \param[in] addr start address of disk to be read - * \param[in] nblocks block amount to be read - * \return Operation status. - */ -int32_t usb_msc_new_read(uint8_t lun, uint32_t addr, uint32_t nblocks) { - if (lun > 1) { - return ERR_NOT_FOUND; - } - - // Store transfer info so we can service it in the "background". - active_lun = lun; - active_addr = addr; - active_nblocks = nblocks; - active_read = true; - - return ERR_NONE; -} - -/** - * \brief Callback invoked when a new write blocks command received - * \param[in] lun logic unit number - * \param[in] addr start address of disk to be written - * \param[in] nblocks block amount to be written - * \return Operation status. - */ -int32_t usb_msc_new_write(uint8_t lun, uint32_t addr, uint32_t nblocks) { - if (lun > 1) { - return ERR_NOT_FOUND; - } - - fs_user_mount_t * vfs = get_vfs(lun); - // This is used to determine the writeability of the disk from USB. - if (vfs == NULL) { - return ERR_NOT_FOUND; - } - if (vfs->writeblocks[0] == MP_OBJ_NULL || - (vfs->flags & FSUSER_USB_WRITABLE) == 0) { - return ERR_DENIED; - } - - // Store transfer info so we can service it in the "background". - active_lun = lun; - active_addr = addr; - active_nblocks = nblocks; - active_write = true; - sector_loaded = false; - - // Return ERR_DENIED when the file system is read-only to the USB host. - - return ERR_NONE; -} - -/** - * \brief Callback invoked when a blocks transfer is done - * \param[in] lun logic unit number - * \return Operation status. - */ -int32_t usb_msc_xfer_done(uint8_t lun) { - if (lun > 1) { - return ERR_DENIED; - } - - CRITICAL_SECTION_ENTER(); - if (active_read) { - active_addr += 1; - active_nblocks--; - if (active_nblocks == 0) { - active_read = false; - } - } - - if (active_write) { - sector_loaded = true; - } - usb_busy = false; - CRITICAL_SECTION_LEAVE(); - - return ERR_NONE; -} - -// The start_read callback begins a read transaction which we accept -// but delay our response until the "main thread" calls -// usb_msc_background. Once it does, we read immediately from the -// drive into our cache and trigger the USB DMA to output the -// sector. Once the sector is transmitted, xfer_done will be called. -void usb_msc_background(void) { - // Check USB busy first because we never want to queue another transfer if it is. Checking - // active_read or active_write first leaves the possibility that they are true, an xfer done - // interrupt occurs (setting them false), turning off usb_busy and causing us to queue a - // spurious transfer. - if (usb_busy) { - return; - } - if (active_read) { - fs_user_mount_t * vfs = get_vfs(active_lun); - disk_read(vfs, sector_buffer, active_addr, 1); - CRITICAL_SECTION_ENTER(); - int32_t result = mscdf_xfer_blocks(true, sector_buffer, 1); - usb_busy = result == ERR_NONE; - CRITICAL_SECTION_LEAVE(); - } - if (active_write) { - if (sector_loaded) { - fs_user_mount_t * vfs = get_vfs(active_lun); - disk_write(vfs, sector_buffer, active_addr, 1); - // Since by getting here we assume the mount is read-only to - // MicroPython let's update the cached FatFs sector if it's the one - // we just wrote. - #if _MAX_SS != _MIN_SS - if (vfs->ssize == FILESYSTEM_BLOCK_SIZE) { - #else - // The compiler can optimize this away. - if (_MAX_SS == FILESYSTEM_BLOCK_SIZE) { - #endif - if (active_addr == vfs->fatfs.winsect && active_addr > 0) { - memcpy(vfs->fatfs.win, - sector_buffer, - FILESYSTEM_BLOCK_SIZE); - } - } - sector_loaded = false; - active_addr += 1; - active_nblocks--; - } - // Load more blocks from USB if they are needed. - if (active_nblocks > 0) { - // Turn off interrupts because with them on, - // usb_msc_xfer_done could be called before we update - // usb_busy. If that happened, we'd overwrite the fact that - // the transfer actually already finished. - CRITICAL_SECTION_ENTER(); - int32_t result = mscdf_xfer_blocks(false, sector_buffer, 1); - usb_busy = result == ERR_NONE; - CRITICAL_SECTION_LEAVE(); - } else { - mscdf_xfer_blocks(false, NULL, 0); - active_write = false; - // This write is complete, start the autoreload clock. - autoreload_start(); - } - } -} diff --git a/ports/atmel-samd/usb_mass_storage.h b/ports/atmel-samd/usb_mass_storage.h deleted file mode 100644 index 767a6779cac5f..0000000000000 --- a/ports/atmel-samd/usb_mass_storage.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This adapts the ASF4 USB mass storage API to MicroPython's VFS API so we can -// expose all VFS block devices as Lun's over USB mass storage control. - -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_USB_MASS_STORAGE_H -#define MICROPY_INCLUDED_ATMEL_SAMD_USB_MASS_STORAGE_H - -#include - -// "background" task that actually manages loading to and from the file systems. -void usb_msc_background(void); - -// Callbacks that hook into ASF4's USB stack. -int32_t usb_msc_disk_eject(uint8_t lun); -int32_t usb_msc_disk_is_writable(uint8_t lun); -int32_t usb_msc_disk_is_ready(uint8_t lun); -int32_t usb_msc_new_read(uint8_t lun, uint32_t addr, uint32_t nblocks); -int32_t usb_msc_new_write(uint8_t lun, uint32_t addr, uint32_t nblocks); -int32_t usb_msc_xfer_done(uint8_t lun); -uint8_t *usb_msc_inquiry_info(uint8_t lun); -uint8_t *usb_msc_get_capacity(uint8_t lun); - -#endif // MICROPY_INCLUDED_ATMEL_SAMD_USB_MASS_STORAGE_H diff --git a/ports/bare-arm/Makefile b/ports/bare-arm/Makefile deleted file mode 100644 index 0fcd5d0272c66..0000000000000 --- a/ports/bare-arm/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs-linux -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion -CFLAGS = $(INC) -Wall -Werror -std=c99 -nostdlib $(CFLAGS_CORTEX_M4) $(COPT) - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -Os -DNDEBUG -endif - -LDFLAGS = -nostdlib -T stm32f405.ld -Map=$@.map --cref -LIBS = - -SRC_C = \ - main.c \ -# printf.c \ - string0.c \ - malloc0.c \ - gccollect.c \ - -SRC_S = \ -# startup_stm32f40xx.s \ - gchelper.s \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(SRC_S:.s=.o)) - -all: $(BUILD)/firmware.elf - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/bare-arm/main.c b/ports/bare-arm/main.c deleted file mode 100644 index b96fb47ace61a..0000000000000 --- a/ports/bare-arm/main.c +++ /dev/null @@ -1,96 +0,0 @@ -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/mperrno.h" - -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} - -int main(int argc, char **argv) { - mp_init(); - do_str("print('hello world!', list(x+1 for x in range(10)), end='eol\\n')", MP_PARSE_SINGLE_INPUT); - do_str("for i in range(10):\n print(i)", MP_PARSE_FILE_INPUT); - mp_deinit(); - return 0; -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif - -/* -int _lseek() {return 0;} -int _read() {return 0;} -int _write() {return 0;} -int _close() {return 0;} -void _exit(int x) {for(;;){}} -int _sbrk() {return 0;} -int _kill() {return 0;} -int _getpid() {return 0;} -int _fstat() {return 0;} -int _isatty() {return 0;} -*/ - -void *malloc(size_t n) {return NULL;} -void *calloc(size_t nmemb, size_t size) {return NULL;} -void *realloc(void *ptr, size_t size) {return NULL;} -void free(void *p) {} -int printf(const char *m, ...) {return 0;} -void *memcpy(void *dest, const void *src, size_t n) {return NULL;} -int memcmp(const void *s1, const void *s2, size_t n) {return 0;} -void *memmove(void *dest, const void *src, size_t n) {return NULL;} -void *memset(void *s, int c, size_t n) {return NULL;} -int strcmp(const char *s1, const char* s2) {return 0;} -int strncmp(const char *s1, const char* s2, size_t n) {return 0;} -size_t strlen(const char *s) {return 0;} -char *strcat(char *dest, const char *src) {return NULL;} -char *strchr(const char *dest, int c) {return NULL;} -#include -int vprintf(const char *format, va_list ap) {return 0;} -int vsnprintf(char *str, size_t size, const char *format, va_list ap) {return 0;} - -#undef putchar -int putchar(int c) {return 0;} -int puts(const char *s) {return 0;} - -void _start(void) {main(0, NULL);} diff --git a/ports/bare-arm/mpconfigport.h b/ports/bare-arm/mpconfigport.h deleted file mode 100644 index 3fbd3769f1e90..0000000000000 --- a/ports/bare-arm/mpconfigport.h +++ /dev/null @@ -1,66 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_QSTR_BYTES_IN_HASH (1) -#define MICROPY_ALLOC_PATH_MAX (512) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (0) -#define MICROPY_HELPER_REPL (0) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_USE_INTERNAL_PRINTF (0) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define UINT_FMT "%lu" -#define INT_FMT "%ld" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; - -// dummy print -#define MP_PLAT_PRINT_STRN(str, len) (void)0 - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// We need to provide a declaration/definition of alloca() -#include diff --git a/ports/bare-arm/mphalport.h b/ports/bare-arm/mphalport.h deleted file mode 100644 index 4bd8276f34927..0000000000000 --- a/ports/bare-arm/mphalport.h +++ /dev/null @@ -1 +0,0 @@ -// empty file diff --git a/ports/bare-arm/stm32f405.ld b/ports/bare-arm/stm32f405.ld deleted file mode 100644 index dd688a02468da..0000000000000 --- a/ports/bare-arm/stm32f405.ld +++ /dev/null @@ -1,117 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 0x004000 /* sector 0, 16 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x080000 /* sectors 5,6,7,8, 4*128KiB = 512 KiB (could increase it more) */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 0x010000 /* 64 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x020000 /* 128 KiB */ -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x2001c000; /* tunable */ - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ - } >FLASH_TEXT - - /* - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } >FLASH - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - */ - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - _ram_start = .; /* create a global symbol at ram start for garbage collector */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - _heap_start = .; /* define a global symbol at heap start */ - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - } >RAM - - /* Remove information from the standard libraries */ - /* - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - */ - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/cc3200/FreeRTOS/FreeRTOSConfig.h b/ports/cc3200/FreeRTOS/FreeRTOSConfig.h deleted file mode 100644 index 2f25bbd7e81fc..0000000000000 --- a/ports/cc3200/FreeRTOS/FreeRTOSConfig.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that has become a de facto standard. * - * * - * Help yourself get started quickly and support the FreeRTOS * - * project by purchasing a FreeRTOS tutorial book, reference * - * manual, or both from: http://www.FreeRTOS.org/Documentation * - * * - * Thank you! * - * * - *************************************************************************** - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available from the following - link: http://www.freertos.org/a00114.html - - 1 tab == 4 spaces! - - *************************************************************************** - * * - * Having a problem? Start by reading the FAQ "My application does * - * not run, what could be wrong?" * - * * - * http://www.FreeRTOS.org/FAQHelp.html * - * * - *************************************************************************** - - http://www.FreeRTOS.org - Documentation, books, training, latest versions, - license and Real Time Engineers Ltd. contact details. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 1 -#define configUSE_TICK_HOOK 1 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 80000000 ) -#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 72 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( \ - 16384 /* 16kbytes for FreeRTOS data structures and heap */ \ - - sizeof(StaticTask_t) - configMINIMAL_STACK_SIZE * sizeof(StackType_t) /* TCB+stack for idle task */ \ - - sizeof(StaticTask_t) - 1024 /* TCB+stack for servers task */ \ - - sizeof(StaticTask_t) - 6656 /* TCB+stack for main MicroPython task */ \ - - sizeof(StaticTask_t) - 896 /* TCB+stack for simplelink spawn task */ \ - ) ) -#define configMAX_TASK_NAME_LEN ( 8 ) -#define configUSE_TRACE_FACILITY 0 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_CO_ROUTINES 0 -#define configUSE_MUTEXES 0 -#define configUSE_RECURSIVE_MUTEXES 0 -#ifdef DEBUG -#define configCHECK_FOR_STACK_OVERFLOW 1 -#else -#define configCHECK_FOR_STACK_OVERFLOW 0 -#endif -#define configUSE_QUEUE_SETS 0 -#define configUSE_COUNTING_SEMAPHORES 0 -#define configUSE_ALTERNATIVE_API 0 - -#define configMAX_PRIORITIES ( 4UL ) -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) -#define configQUEUE_REGISTRY_SIZE 0 - -/* Timer related defines. */ -#define configUSE_TIMERS 0 -#define configTIMER_TASK_PRIORITY 2 -#define configTIMER_QUEUE_LENGTH 20 -#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) -#ifdef DEBUG -#define configUSE_MALLOC_FAILED_HOOK 1 -#else -#define configUSE_MALLOC_FAILED_HOOK 0 -#endif -#define configENABLE_BACKWARD_COMPATIBILITY 0 -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 0 -#define INCLUDE_vTaskDelayUntil 0 -#define INCLUDE_vTaskDelay 1 -#ifdef DEBUG -#define INCLUDE_uxTaskGetStackHighWaterMark 1 -#else -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#endif -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#ifdef DEBUG -#define INCLUDE_xTaskGetIdleTaskHandle 1 -#else -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#endif -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xSemaphoreGetMutexHolder 0 - -#define configKERNEL_INTERRUPT_PRIORITY ( 7 << 5 ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */ -/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! -See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 1 << 5 ) /* Priority 5, or 160 as only the top three bits are implemented. */ - -/* Use the Cortex-M3 optimised task selection rather than the generic C code -version. */ -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 - -/* We provide a definition of ucHeap so it can go in a special segment. */ -#define configAPPLICATION_ALLOCATED_HEAP 1 - -/* We use static versions of functions (like xTaskCreateStatic) */ -#define configSUPPORT_STATIC_ALLOCATION 1 - -/* For threading */ -#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 1 -#undef configUSE_MUTEXES -#define configUSE_MUTEXES 1 -#undef INCLUDE_vTaskDelete -#define INCLUDE_vTaskDelete 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/ports/cc3200/FreeRTOS/License/license.txt b/ports/cc3200/FreeRTOS/License/license.txt deleted file mode 100644 index 5d243b896600d..0000000000000 --- a/ports/cc3200/FreeRTOS/License/license.txt +++ /dev/null @@ -1,399 +0,0 @@ -The FreeRTOS open source license covers the FreeRTOS source files, -which are located in the /FreeRTOS/Source directory of the official FreeRTOS -download. It also covers most of the source files in the demo application -projects, which are located in the /FreeRTOS/Demo directory of the official -FreeRTOS download. The demo projects may also include third party software that -is not part of FreeRTOS and is licensed separately to FreeRTOS. Examples of -third party software includes header files provided by chip or tools vendors, -linker scripts, peripheral drivers, etc. All the software in subdirectories of -the /FreeRTOS directory is either open source or distributed with permission, -and is free for use. For the avoidance of doubt, refer to the comments at the -top of each source file. - ----------------------------------------------------------------------------- - -NOTE: The modification to the GPL is included to allow you to distribute a -combined work that includes FreeRTOS without being obliged to provide the source -code for proprietary components. - ----------------------------------------------------------------------------- - -Applying to FreeRTOS V8.2.3 up to the latest version, the FreeRTOS GPL Exception -Text follows: - -Any FreeRTOS *source code*, whether modified or in it's original release form, -or whether in whole or in part, can only be distributed by you under the terms -of the GNU General Public License plus this exception. An independent module is -a module which is not derived from or based on FreeRTOS. - -Clause 1: - -Linking FreeRTOS with other modules is making a combined work based on FreeRTOS. -Thus, the terms and conditions of the GNU General Public License V2 cover the -whole combination. - -As a special exception, the copyright holders of FreeRTOS give you permission to -link FreeRTOS with independent modules to produce a statically linked -executable, regardless of the license terms of these independent modules, and to -copy and distribute the resulting executable under terms of your choice, -provided that you also meet, for each linked independent module, the terms and -conditions of the license of that module. An independent module is a module -which is not derived from or based on FreeRTOS. - -Clause 2: - -FreeRTOS may not be used for any competitive or comparative purpose, including -the publication of any form of run time or compile time metric, without the -express permission of Real Time Engineers Ltd. (this is the norm within the -industry and is intended to ensure information accuracy). - - - --------------------------------------------------------------------- - - - -The standard GPL V2 text: - - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Library General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -this service if you wish), that you receive source code or can get it -if you want it, that you can change the software or use pieces of it -in new free programs; and that you know you can do these things. - - To protect your rights, we need to make restrictions that forbid -anyone to deny you these rights or to ask you to surrender the rights. -These restrictions translate to certain responsibilities for you if you -distribute copies of the software, or if you modify it. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must give the recipients all the rights that -you have. You must make sure that they, too, receive or can get the -source code. And you must show them these terms so they know their -rights. - - We protect your rights with two steps: (1) copyright the software, and -(2) offer you this license which gives you legal permission to copy, -distribute and/or modify the software. - - Also, for each author's protection and ours, we want to make certain -that everyone understands that there is no warranty for this free -software. If the software is modified by someone else and passed on, we -want its recipients to know that what they have is not the original, so -that any problems introduced by others will not reflect on the original -authors' reputations. - - Finally, any free program is threatened constantly by software -patents. We wish to avoid the danger that redistributors of a free -program will individually obtain patent licenses, in effect making the -program proprietary. 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Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Library General -Public License instead of this License. - diff --git a/ports/cc3200/FreeRTOS/Source/croutine.c b/ports/cc3200/FreeRTOS/Source/croutine.c deleted file mode 100644 index 993e09b29ef4a..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/croutine.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#include "FreeRTOS.h" -#include "task.h" -#include "croutine.h" - -/* Remove the whole file is co-routines are not being used. */ -#if( configUSE_CO_ROUTINES != 0 ) - -/* - * Some kernel aware debuggers require data to be viewed to be global, rather - * than file scope. - */ -#ifdef portREMOVE_STATIC_QUALIFIER - #define static -#endif - - -/* Lists for ready and blocked co-routines. --------------------*/ -static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ -static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ -static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ -static List_t * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ -static List_t * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ -static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ - -/* Other file private variables. --------------------------------*/ -CRCB_t * pxCurrentCoRoutine = NULL; -static UBaseType_t uxTopCoRoutineReadyPriority = 0; -static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; - -/* The initial state of the co-routine when it is created. */ -#define corINITIAL_STATE ( 0 ) - -/* - * Place the co-routine represented by pxCRCB into the appropriate ready queue - * for the priority. It is inserted at the end of the list. - * - * This macro accesses the co-routine ready lists and therefore must not be - * used from within an ISR. - */ -#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ -{ \ - if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ - { \ - uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ - } \ - vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ -} - -/* - * Utility to ready all the lists used by the scheduler. This is called - * automatically upon the creation of the first co-routine. - */ -static void prvInitialiseCoRoutineLists( void ); - -/* - * Co-routines that are readied by an interrupt cannot be placed directly into - * the ready lists (there is no mutual exclusion). Instead they are placed in - * in the pending ready list in order that they can later be moved to the ready - * list by the co-routine scheduler. - */ -static void prvCheckPendingReadyList( void ); - -/* - * Macro that looks at the list of co-routines that are currently delayed to - * see if any require waking. - * - * Co-routines are stored in the queue in the order of their wake time - - * meaning once one co-routine has been found whose timer has not expired - * we need not look any further down the list. - */ -static void prvCheckDelayedList( void ); - -/*-----------------------------------------------------------*/ - -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ) -{ -BaseType_t xReturn; -CRCB_t *pxCoRoutine; - - /* Allocate the memory that will store the co-routine control block. */ - pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); - if( pxCoRoutine ) - { - /* If pxCurrentCoRoutine is NULL then this is the first co-routine to - be created and the co-routine data structures need initialising. */ - if( pxCurrentCoRoutine == NULL ) - { - pxCurrentCoRoutine = pxCoRoutine; - prvInitialiseCoRoutineLists(); - } - - /* Check the priority is within limits. */ - if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) - { - uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; - } - - /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; - pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; - - /* Initialise all the other co-routine control block parameters. */ - vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); - vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); - - /* Set the co-routine control block as a link back from the ListItem_t. - This is so we can get back to the containing CRCB from a generic item - in a list. */ - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); - listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); - - /* Event lists are always in priority order. */ - listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); - - /* Now the co-routine has been initialised it can be added to the ready - list at the correct priority. */ - prvAddCoRoutineToReadyQueue( pxCoRoutine ); - - xReturn = pdPASS; - } - else - { - xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) -{ -TickType_t xTimeToWake; - - /* Calculate the time to wake - this may overflow but this is - not a problem. */ - xTimeToWake = xCoRoutineTickCount + xTicksToDelay; - - /* We must remove ourselves from the ready list before adding - ourselves to the blocked list as the same list item is used for - both lists. */ - ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - - /* The list item will be inserted in wake time order. */ - listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); - - if( xTimeToWake < xCoRoutineTickCount ) - { - /* Wake time has overflowed. Place this item in the - overflow list. */ - vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - else - { - /* The wake time has not overflowed, so we can use the - current block list. */ - vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); - } - - if( pxEventList ) - { - /* Also add the co-routine to an event list. If this is done then the - function must be called with interrupts disabled. */ - vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckPendingReadyList( void ) -{ - /* Are there any co-routines waiting to get moved to the ready list? These - are co-routines that have been readied by an ISR. The ISR cannot access - the ready lists itself. */ - while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) - { - CRCB_t *pxUnblockedCRCB; - - /* The pending ready list can be accessed by an ISR. */ - portDISABLE_INTERRUPTS(); - { - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - } - portENABLE_INTERRUPTS(); - - ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); - prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); - } -} -/*-----------------------------------------------------------*/ - -static void prvCheckDelayedList( void ) -{ -CRCB_t *pxCRCB; - - xPassedTicks = xTaskGetTickCount() - xLastTickCount; - while( xPassedTicks ) - { - xCoRoutineTickCount++; - xPassedTicks--; - - /* If the tick count has overflowed we need to swap the ready lists. */ - if( xCoRoutineTickCount == 0 ) - { - List_t * pxTemp; - - /* Tick count has overflowed so we need to swap the delay lists. If there are - any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; - pxOverflowDelayedCoRoutineList = pxTemp; - } - - /* See if this tick has made a timeout expire. */ - while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) - { - pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); - - if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) - { - /* Timeout not yet expired. */ - break; - } - - portDISABLE_INTERRUPTS(); - { - /* The event could have occurred just before this critical - section. If this is the case then the generic list item will - have been moved to the pending ready list and the following - line is still valid. Also the pvContainer parameter will have - been set to NULL so the following lines are also valid. */ - ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) ); - - /* Is the co-routine waiting on an event also? */ - if( pxCRCB->xEventListItem.pvContainer ) - { - ( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); - } - } - portENABLE_INTERRUPTS(); - - prvAddCoRoutineToReadyQueue( pxCRCB ); - } - } - - xLastTickCount = xCoRoutineTickCount; -} -/*-----------------------------------------------------------*/ - -void vCoRoutineSchedule( void ) -{ - /* See if any co-routines readied by events need moving to the ready lists. */ - prvCheckPendingReadyList(); - - /* See if any delayed co-routines have timed out. */ - prvCheckDelayedList(); - - /* Find the highest priority queue that contains ready co-routines. */ - while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) - { - if( uxTopCoRoutineReadyPriority == 0 ) - { - /* No more co-routines to check. */ - return; - } - --uxTopCoRoutineReadyPriority; - } - - /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines - of the same priority get an equal share of the processor time. */ - listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); - - /* Call the co-routine. */ - ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); - - return; -} -/*-----------------------------------------------------------*/ - -static void prvInitialiseCoRoutineLists( void ) -{ -UBaseType_t uxPriority; - - for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) - { - vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); - } - - vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); - vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); - vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); - - /* Start with pxDelayedCoRoutineList using list1 and the - pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; - pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; -} -/*-----------------------------------------------------------*/ - -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ) -{ -CRCB_t *pxUnblockedCRCB; -BaseType_t xReturn; - - /* This function is called from within an interrupt. It can only access - event lists and the pending ready list. This function assumes that a - check has already been made to ensure pxEventList is not empty. */ - pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); - ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); - vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); - - if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) - { - xReturn = pdTRUE; - } - else - { - xReturn = pdFALSE; - } - - return xReturn; -} - -#endif /* configUSE_CO_ROUTINES == 0 */ - diff --git a/ports/cc3200/FreeRTOS/Source/event_groups.c b/ports/cc3200/FreeRTOS/Source/event_groups.c deleted file mode 100644 index b8df5fd956dc5..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/event_groups.c +++ /dev/null @@ -1,752 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* Standard includes. */ -#include - -/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining -all the API functions to use the MPU wrappers. That should only be done when -task.h is included from an application file. */ -#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE - -/* FreeRTOS includes. */ -#include "FreeRTOS.h" -#include "task.h" -#include "timers.h" -#include "event_groups.h" - -/* Lint e961 and e750 are suppressed as a MISRA exception justified because the -MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the -header files above, but not in this file, in order to generate the correct -privileged Vs unprivileged linkage and placement. */ -#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */ - -/* The following bit fields convey control information in a task's event list -item value. It is important they don't clash with the -taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ -#if configUSE_16_BIT_TICKS == 1 - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U - #define eventWAIT_FOR_ALL_BITS 0x0400U - #define eventEVENT_BITS_CONTROL_BYTES 0xff00U -#else - #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL - #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL - #define eventWAIT_FOR_ALL_BITS 0x04000000UL - #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL -#endif - -typedef struct xEventGroupDefinition -{ - EventBits_t uxEventBits; - List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */ - - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxEventGroupNumber; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */ - #endif -} EventGroup_t; - -/*-----------------------------------------------------------*/ - -/* - * Test the bits set in uxCurrentEventBits to see if the wait condition is met. - * The wait condition is defined by xWaitForAllBits. If xWaitForAllBits is - * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor - * are also set in uxCurrentEventBits. If xWaitForAllBits is pdFALSE then the - * wait condition is met if any of the bits set in uxBitsToWait for are also set - * in uxCurrentEventBits. - */ -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION; - -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) - { - EventGroup_t *pxEventBits; - - /* A StaticEventGroup_t object must be provided. */ - configASSERT( pxEventGroupBuffer ); - - /* The user has provided a statically allocated event group - use it. */ - pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 EventGroup_t and StaticEventGroup_t are guaranteed to have the same size and alignment requirement - checked by configASSERT(). */ - - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note that - this event group was created statically in case the event group - is later deleted. */ - pxEventBits->ucStaticallyAllocated = pdTRUE; - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - traceEVENT_GROUP_CREATE_FAILED(); - } - - return ( EventGroupHandle_t ) pxEventBits; - } - -#endif /* configSUPPORT_STATIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - - EventGroupHandle_t xEventGroupCreate( void ) - { - EventGroup_t *pxEventBits; - - /* Allocate the event group. */ - pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); - - if( pxEventBits != NULL ) - { - pxEventBits->uxEventBits = 0; - vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* Both static and dynamic allocation can be used, so note this - event group was allocated statically in case the event group is - later deleted. */ - pxEventBits->ucStaticallyAllocated = pdFALSE; - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ - - traceEVENT_GROUP_CREATE( pxEventBits ); - } - else - { - traceEVENT_GROUP_CREATE_FAILED(); - } - - return ( EventGroupHandle_t ) pxEventBits; - } - -#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) -{ -EventBits_t uxOriginalBitValue, uxReturn; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -BaseType_t xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; - - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif - - vTaskSuspendAll(); - { - uxOriginalBitValue = pxEventBits->uxEventBits; - - ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet ); - - if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - /* All the rendezvous bits are now set - no need to block. */ - uxReturn = ( uxOriginalBitValue | uxBitsToSet ); - - /* Rendezvous always clear the bits. They will have been cleared - already unless this is the only task in the rendezvous. */ - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - - xTicksToWait = 0; - } - else - { - if( xTicksToWait != ( TickType_t ) 0 ) - { - traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ); - - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait ); - - /* This assignment is obsolete as uxReturn will get set after - the task unblocks, but some compilers mistakenly generate a - warning about uxReturn being returned without being set if the - assignment is omitted. */ - uxReturn = 0; - } - else - { - /* The rendezvous bits were not set, but no block time was - specified - just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; - } - } - } - xAlreadyYielded = xTaskResumeAll(); - - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); - - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - /* The task timed out, just return the current event bit value. */ - taskENTER_CRITICAL(); - { - uxReturn = pxEventBits->uxEventBits; - - /* Although the task got here because it timed out before the - bits it was waiting for were set, it is possible that since it - unblocked another task has set the bits. If this is the case - then it needs to clear the bits before exiting. */ - if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - taskEXIT_CRITICAL(); - - xTimeoutOccurred = pdTRUE; - } - else - { - /* The task unblocked because the bits were set. */ - } - - /* Control bits might be set as the task had blocked should not be - returned. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } - - traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn, uxControlBits = 0; -BaseType_t xWaitConditionMet, xAlreadyYielded; -BaseType_t xTimeoutOccurred = pdFALSE; - - /* Check the user is not attempting to wait on the bits used by the kernel - itself, and that at least one bit is being requested. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - configASSERT( uxBitsToWaitFor != 0 ); - #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) - { - configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); - } - #endif - - vTaskSuspendAll(); - { - const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits; - - /* Check to see if the wait condition is already met or not. */ - xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits ); - - if( xWaitConditionMet != pdFALSE ) - { - /* The wait condition has already been met so there is no need to - block. */ - uxReturn = uxCurrentEventBits; - xTicksToWait = ( TickType_t ) 0; - - /* Clear the wait bits if requested to do so. */ - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( xTicksToWait == ( TickType_t ) 0 ) - { - /* The wait condition has not been met, but no block time was - specified, so just return the current value. */ - uxReturn = uxCurrentEventBits; - } - else - { - /* The task is going to block to wait for its required bits to be - set. uxControlBits are used to remember the specified behaviour of - this call to xEventGroupWaitBits() - for use when the event bits - unblock the task. */ - if( xClearOnExit != pdFALSE ) - { - uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - if( xWaitForAllBits != pdFALSE ) - { - uxControlBits |= eventWAIT_FOR_ALL_BITS; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* Store the bits that the calling task is waiting for in the - task's event list item so the kernel knows when a match is - found. Then enter the blocked state. */ - vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait ); - - /* This is obsolete as it will get set after the task unblocks, but - some compilers mistakenly generate a warning about the variable - being returned without being set if it is not done. */ - uxReturn = 0; - - traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ); - } - } - xAlreadyYielded = xTaskResumeAll(); - - if( xTicksToWait != ( TickType_t ) 0 ) - { - if( xAlreadyYielded == pdFALSE ) - { - portYIELD_WITHIN_API(); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* The task blocked to wait for its required bits to be set - at this - point either the required bits were set or the block time expired. If - the required bits were set they will have been stored in the task's - event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); - - if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) - { - taskENTER_CRITICAL(); - { - /* The task timed out, just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; - - /* It is possible that the event bits were updated between this - task leaving the Blocked state and running again. */ - if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE ) - { - if( xClearOnExit != pdFALSE ) - { - pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - taskEXIT_CRITICAL(); - - /* Prevent compiler warnings when trace macros are not used. */ - xTimeoutOccurred = pdFALSE; - } - else - { - /* The task unblocked because the bits were set. */ - } - - /* The task blocked so control bits may have been set. */ - uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; - } - traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn; - - /* Check the user is not attempting to clear the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - - taskENTER_CRITICAL(); - { - traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ); - - /* The value returned is the event group value prior to the bits being - cleared. */ - uxReturn = pxEventBits->uxEventBits; - - /* Clear the bits. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - taskEXIT_CRITICAL(); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) - { - BaseType_t xReturn; - - traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) -{ -UBaseType_t uxSavedInterruptStatus; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -EventBits_t uxReturn; - - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); - { - uxReturn = pxEventBits->uxEventBits; - } - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); - - return uxReturn; -} -/*-----------------------------------------------------------*/ - -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) -{ -ListItem_t *pxListItem, *pxNext; -ListItem_t const *pxListEnd; -List_t *pxList; -EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -BaseType_t xMatchFound = pdFALSE; - - /* Check the user is not attempting to set the bits used by the kernel - itself. */ - configASSERT( xEventGroup ); - configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - - pxList = &( pxEventBits->xTasksWaitingForBits ); - pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - vTaskSuspendAll(); - { - traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); - - pxListItem = listGET_HEAD_ENTRY( pxList ); - - /* Set the bits. */ - pxEventBits->uxEventBits |= uxBitsToSet; - - /* See if the new bit value should unblock any tasks. */ - while( pxListItem != pxListEnd ) - { - pxNext = listGET_NEXT( pxListItem ); - uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); - xMatchFound = pdFALSE; - - /* Split the bits waited for from the control bits. */ - uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; - uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; - - if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) - { - /* Just looking for single bit being set. */ - if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 ) - { - xMatchFound = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor ) - { - /* All bits are set. */ - xMatchFound = pdTRUE; - } - else - { - /* Need all bits to be set, but not all the bits were set. */ - } - - if( xMatchFound != pdFALSE ) - { - /* The bits match. Should the bits be cleared on exit? */ - if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 ) - { - uxBitsToClear |= uxBitsWaitedFor; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - - /* Store the actual event flag value in the task's event list - item before removing the task from the event list. The - eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows - that is was unblocked due to its required bits matching, rather - than because it timed out. */ - ( void ) xTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET ); - } - - /* Move onto the next list item. Note pxListItem->pxNext is not - used here as the list item may have been removed from the event list - and inserted into the ready/pending reading list. */ - pxListItem = pxNext; - } - - /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT - bit was set in the control word. */ - pxEventBits->uxEventBits &= ~uxBitsToClear; - } - ( void ) xTaskResumeAll(); - - return pxEventBits->uxEventBits; -} -/*-----------------------------------------------------------*/ - -void vEventGroupDelete( EventGroupHandle_t xEventGroup ) -{ -EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; -const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); - - vTaskSuspendAll(); - { - traceEVENT_GROUP_DELETE( xEventGroup ); - - while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 ) - { - /* Unblock the task, returning 0 as the event list is being deleted - and cannot therefore have any bits set. */ - configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) ); - ( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET ); - } - - #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) - { - /* The event group can only have been allocated dynamically - free - it again. */ - vPortFree( pxEventBits ); - } - #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) - { - /* The event group could have been allocated statically or - dynamically, so check before attempting to free the memory. */ - if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) - { - vPortFree( pxEventBits ); - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ - } - ( void ) xTaskResumeAll(); -} -/*-----------------------------------------------------------*/ - -/* For internal use only - execute a 'set bits' command that was pended from -an interrupt. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) -{ - ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); -} -/*-----------------------------------------------------------*/ - -/* For internal use only - execute a 'clear bits' command that was pended from -an interrupt. */ -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) -{ - ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); -} -/*-----------------------------------------------------------*/ - -static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) -{ -BaseType_t xWaitConditionMet = pdFALSE; - - if( xWaitForAllBits == pdFALSE ) - { - /* Task only has to wait for one bit within uxBitsToWaitFor to be - set. Is one already set? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - else - { - /* Task has to wait for all the bits in uxBitsToWaitFor to be set. - Are they set already? */ - if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor ) - { - xWaitConditionMet = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - - return xWaitConditionMet; -} -/*-----------------------------------------------------------*/ - -#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) - - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) - { - BaseType_t xReturn; - - traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ); - xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); - - return xReturn; - } - -#endif -/*-----------------------------------------------------------*/ - -#if (configUSE_TRACE_FACILITY == 1) - - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) - { - UBaseType_t xReturn; - EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup; - - if( xEventGroup == NULL ) - { - xReturn = 0; - } - else - { - xReturn = pxEventBits->uxEventGroupNumber; - } - - return xReturn; - } - -#endif - diff --git a/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h b/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h deleted file mode 100644 index f81172dbe4e9f..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/FreeRTOS.h +++ /dev/null @@ -1,1063 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef INC_FREERTOS_H -#define INC_FREERTOS_H - -/* - * Include the generic headers required for the FreeRTOS port being used. - */ -#include - -/* - * If stdint.h cannot be located then: - * + If using GCC ensure the -nostdint options is *not* being used. - * + Ensure the project's include path includes the directory in which your - * compiler stores stdint.h. - * + Set any compiler options necessary for it to support C99, as technically - * stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any - * other way). - * + The FreeRTOS download includes a simple stdint.h definition that can be - * used in cases where none is provided by the compiler. The files only - * contains the typedefs required to build FreeRTOS. Read the instructions - * in FreeRTOS/source/stdint.readme for more information. - */ -#include /* READ COMMENT ABOVE. */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Application specific configuration options. */ -#include "FreeRTOSConfig.h" - -/* Basic FreeRTOS definitions. */ -#include "projdefs.h" - -/* Definitions specific to the port being used. */ -#include "portable.h" - -/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */ -#ifndef configUSE_NEWLIB_REENTRANT - #define configUSE_NEWLIB_REENTRANT 0 -#endif - -/* Required if struct _reent is used. */ -#if ( configUSE_NEWLIB_REENTRANT == 1 ) - #include -#endif -/* - * Check all the required application specific macros have been defined. - * These macros are application specific and (as downloaded) are defined - * within FreeRTOSConfig.h. - */ - -#ifndef configMINIMAL_STACK_SIZE - #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. -#endif - -#ifndef configMAX_PRIORITIES - #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_PREEMPTION - #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_IDLE_HOOK - #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_TICK_HOOK - #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configUSE_16_BIT_TICKS - #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. -#endif - -#ifndef configMAX_PRIORITIES - #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. -#endif - -#ifndef configUSE_CO_ROUTINES - #define configUSE_CO_ROUTINES 0 -#endif - -#ifndef INCLUDE_vTaskPrioritySet - #define INCLUDE_vTaskPrioritySet 0 -#endif - -#ifndef INCLUDE_uxTaskPriorityGet - #define INCLUDE_uxTaskPriorityGet 0 -#endif - -#ifndef INCLUDE_vTaskDelete - #define INCLUDE_vTaskDelete 0 -#endif - -#ifndef INCLUDE_vTaskSuspend - #define INCLUDE_vTaskSuspend 0 -#endif - -#ifndef INCLUDE_vTaskDelayUntil - #define INCLUDE_vTaskDelayUntil 0 -#endif - -#ifndef INCLUDE_vTaskDelay - #define INCLUDE_vTaskDelay 0 -#endif - -#ifndef INCLUDE_xTaskGetIdleTaskHandle - #define INCLUDE_xTaskGetIdleTaskHandle 0 -#endif - -#ifndef INCLUDE_xTaskAbortDelay - #define INCLUDE_xTaskAbortDelay 0 -#endif - -#ifndef INCLUDE_xQueueGetMutexHolder - #define INCLUDE_xQueueGetMutexHolder 0 -#endif - -#ifndef INCLUDE_xSemaphoreGetMutexHolder - #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder -#endif - -#ifndef INCLUDE_xTaskGetHandle - #define INCLUDE_xTaskGetHandle 0 -#endif - -#ifndef INCLUDE_uxTaskGetStackHighWaterMark - #define INCLUDE_uxTaskGetStackHighWaterMark 0 -#endif - -#ifndef INCLUDE_eTaskGetState - #define INCLUDE_eTaskGetState 0 -#endif - -#ifndef INCLUDE_xTaskResumeFromISR - #define INCLUDE_xTaskResumeFromISR 1 -#endif - -#ifndef INCLUDE_xTimerPendFunctionCall - #define INCLUDE_xTimerPendFunctionCall 0 -#endif - -#ifndef INCLUDE_xTaskGetSchedulerState - #define INCLUDE_xTaskGetSchedulerState 0 -#endif - -#ifndef INCLUDE_xTaskGetCurrentTaskHandle - #define INCLUDE_xTaskGetCurrentTaskHandle 0 -#endif - -#if configUSE_CO_ROUTINES != 0 - #ifndef configMAX_CO_ROUTINE_PRIORITIES - #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. - #endif -#endif - -#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK - #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 -#endif - -#ifndef configUSE_APPLICATION_TASK_TAG - #define configUSE_APPLICATION_TASK_TAG 0 -#endif - -#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS - #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 -#endif - -#ifndef configUSE_RECURSIVE_MUTEXES - #define configUSE_RECURSIVE_MUTEXES 0 -#endif - -#ifndef configUSE_MUTEXES - #define configUSE_MUTEXES 0 -#endif - -#ifndef configUSE_TIMERS - #define configUSE_TIMERS 0 -#endif - -#ifndef configUSE_COUNTING_SEMAPHORES - #define configUSE_COUNTING_SEMAPHORES 0 -#endif - -#ifndef configUSE_ALTERNATIVE_API - #define configUSE_ALTERNATIVE_API 0 -#endif - -#ifndef portCRITICAL_NESTING_IN_TCB - #define portCRITICAL_NESTING_IN_TCB 0 -#endif - -#ifndef configMAX_TASK_NAME_LEN - #define configMAX_TASK_NAME_LEN 16 -#endif - -#ifndef configIDLE_SHOULD_YIELD - #define configIDLE_SHOULD_YIELD 1 -#endif - -#if configMAX_TASK_NAME_LEN < 1 - #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h -#endif - -#ifndef configASSERT - #define configASSERT( x ) - #define configASSERT_DEFINED 0 -#else - #define configASSERT_DEFINED 1 -#endif - -/* The timers module relies on xTaskGetSchedulerState(). */ -#if configUSE_TIMERS == 1 - - #ifndef configTIMER_TASK_PRIORITY - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. - #endif /* configTIMER_TASK_PRIORITY */ - - #ifndef configTIMER_QUEUE_LENGTH - #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. - #endif /* configTIMER_QUEUE_LENGTH */ - - #ifndef configTIMER_TASK_STACK_DEPTH - #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. - #endif /* configTIMER_TASK_STACK_DEPTH */ - -#endif /* configUSE_TIMERS */ - -#ifndef portSET_INTERRUPT_MASK_FROM_ISR - #define portSET_INTERRUPT_MASK_FROM_ISR() 0 -#endif - -#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR - #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue -#endif - -#ifndef portCLEAN_UP_TCB - #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB -#endif - -#ifndef portPRE_TASK_DELETE_HOOK - #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) -#endif - -#ifndef portSETUP_TCB - #define portSETUP_TCB( pxTCB ) ( void ) pxTCB -#endif - -#ifndef configQUEUE_REGISTRY_SIZE - #define configQUEUE_REGISTRY_SIZE 0U -#endif - -#if ( configQUEUE_REGISTRY_SIZE < 1 ) - #define vQueueAddToRegistry( xQueue, pcName ) - #define vQueueUnregisterQueue( xQueue ) - #define pcQueueGetName( xQueue ) -#endif - -#ifndef portPOINTER_SIZE_TYPE - #define portPOINTER_SIZE_TYPE uint32_t -#endif - -/* Remove any unused trace macros. */ -#ifndef traceSTART - /* Used to perform any necessary initialisation - for example, open a file - into which trace is to be written. */ - #define traceSTART() -#endif - -#ifndef traceEND - /* Use to close a trace, for example close a file into which trace has been - written. */ - #define traceEND() -#endif - -#ifndef traceTASK_SWITCHED_IN - /* Called after a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the selected task. */ - #define traceTASK_SWITCHED_IN() -#endif - -#ifndef traceINCREASE_TICK_COUNT - /* Called before stepping the tick count after waking from tickless idle - sleep. */ - #define traceINCREASE_TICK_COUNT( x ) -#endif - -#ifndef traceLOW_POWER_IDLE_BEGIN - /* Called immediately before entering tickless idle. */ - #define traceLOW_POWER_IDLE_BEGIN() -#endif - -#ifndef traceLOW_POWER_IDLE_END - /* Called when returning to the Idle task after a tickless idle. */ - #define traceLOW_POWER_IDLE_END() -#endif - -#ifndef traceTASK_SWITCHED_OUT - /* Called before a task has been selected to run. pxCurrentTCB holds a pointer - to the task control block of the task being switched out. */ - #define traceTASK_SWITCHED_OUT() -#endif - -#ifndef traceTASK_PRIORITY_INHERIT - /* Called when a task attempts to take a mutex that is already held by a - lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task - that holds the mutex. uxInheritedPriority is the priority the mutex holder - will inherit (the priority of the task that is attempting to obtain the - muted. */ - #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) -#endif - -#ifndef traceTASK_PRIORITY_DISINHERIT - /* Called when a task releases a mutex, the holding of which had resulted in - the task inheriting the priority of a higher priority task. - pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the - mutex. uxOriginalPriority is the task's configured (base) priority. */ - #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) -#endif - -#ifndef traceBLOCKING_ON_QUEUE_RECEIVE - /* Task is about to block because it cannot read from a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the read was attempted. pxCurrentTCB points to the TCB of the - task that attempted the read. */ - #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceBLOCKING_ON_QUEUE_SEND - /* Task is about to block because it cannot write to a - queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore - upon which the write was attempted. pxCurrentTCB points to the TCB of the - task that attempted the write. */ - #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) -#endif - -#ifndef configCHECK_FOR_STACK_OVERFLOW - #define configCHECK_FOR_STACK_OVERFLOW 0 -#endif - -/* The following event macros are embedded in the kernel API calls. */ - -#ifndef traceMOVED_TASK_TO_READY_STATE - #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) -#endif - -#ifndef tracePOST_MOVED_TASK_TO_READY_STATE - #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) -#endif - -#ifndef traceQUEUE_CREATE - #define traceQUEUE_CREATE( pxNewQueue ) -#endif - -#ifndef traceQUEUE_CREATE_FAILED - #define traceQUEUE_CREATE_FAILED( ucQueueType ) -#endif - -#ifndef traceCREATE_MUTEX - #define traceCREATE_MUTEX( pxNewQueue ) -#endif - -#ifndef traceCREATE_MUTEX_FAILED - #define traceCREATE_MUTEX_FAILED() -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE - #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED - #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) -#endif - -#ifndef traceTAKE_MUTEX_RECURSIVE - #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) -#endif - -#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED - #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE - #define traceCREATE_COUNTING_SEMAPHORE() -#endif - -#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED - #define traceCREATE_COUNTING_SEMAPHORE_FAILED() -#endif - -#ifndef traceQUEUE_SEND - #define traceQUEUE_SEND( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FAILED - #define traceQUEUE_SEND_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE - #define traceQUEUE_RECEIVE( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK - #define traceQUEUE_PEEK( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK_FROM_ISR - #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FAILED - #define traceQUEUE_RECEIVE_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR - #define traceQUEUE_SEND_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_SEND_FROM_ISR_FAILED - #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR - #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) -#endif - -#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED - #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED - #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) -#endif - -#ifndef traceQUEUE_DELETE - #define traceQUEUE_DELETE( pxQueue ) -#endif - -#ifndef traceTASK_CREATE - #define traceTASK_CREATE( pxNewTCB ) -#endif - -#ifndef traceTASK_CREATE_FAILED - #define traceTASK_CREATE_FAILED() -#endif - -#ifndef traceTASK_DELETE - #define traceTASK_DELETE( pxTaskToDelete ) -#endif - -#ifndef traceTASK_DELAY_UNTIL - #define traceTASK_DELAY_UNTIL( x ) -#endif - -#ifndef traceTASK_DELAY - #define traceTASK_DELAY() -#endif - -#ifndef traceTASK_PRIORITY_SET - #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) -#endif - -#ifndef traceTASK_SUSPEND - #define traceTASK_SUSPEND( pxTaskToSuspend ) -#endif - -#ifndef traceTASK_RESUME - #define traceTASK_RESUME( pxTaskToResume ) -#endif - -#ifndef traceTASK_RESUME_FROM_ISR - #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) -#endif - -#ifndef traceTASK_INCREMENT_TICK - #define traceTASK_INCREMENT_TICK( xTickCount ) -#endif - -#ifndef traceTIMER_CREATE - #define traceTIMER_CREATE( pxNewTimer ) -#endif - -#ifndef traceTIMER_CREATE_FAILED - #define traceTIMER_CREATE_FAILED() -#endif - -#ifndef traceTIMER_COMMAND_SEND - #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) -#endif - -#ifndef traceTIMER_EXPIRED - #define traceTIMER_EXPIRED( pxTimer ) -#endif - -#ifndef traceTIMER_COMMAND_RECEIVED - #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) -#endif - -#ifndef traceMALLOC - #define traceMALLOC( pvAddress, uiSize ) -#endif - -#ifndef traceFREE - #define traceFREE( pvAddress, uiSize ) -#endif - -#ifndef traceEVENT_GROUP_CREATE - #define traceEVENT_GROUP_CREATE( xEventGroup ) -#endif - -#ifndef traceEVENT_GROUP_CREATE_FAILED - #define traceEVENT_GROUP_CREATE_FAILED() -#endif - -#ifndef traceEVENT_GROUP_SYNC_BLOCK - #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) -#endif - -#ifndef traceEVENT_GROUP_SYNC_END - #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred -#endif - -#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK - #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) -#endif - -#ifndef traceEVENT_GROUP_WAIT_BITS_END - #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred -#endif - -#ifndef traceEVENT_GROUP_CLEAR_BITS - #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) -#endif - -#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR - #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) -#endif - -#ifndef traceEVENT_GROUP_SET_BITS - #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) -#endif - -#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR - #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) -#endif - -#ifndef traceEVENT_GROUP_DELETE - #define traceEVENT_GROUP_DELETE( xEventGroup ) -#endif - -#ifndef tracePEND_FUNC_CALL - #define tracePEND_FUNC_CALL(xFunctionToPend, pvParameter1, ulParameter2, ret) -#endif - -#ifndef tracePEND_FUNC_CALL_FROM_ISR - #define tracePEND_FUNC_CALL_FROM_ISR(xFunctionToPend, pvParameter1, ulParameter2, ret) -#endif - -#ifndef traceQUEUE_REGISTRY_ADD - #define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName) -#endif - -#ifndef traceTASK_NOTIFY_TAKE_BLOCK - #define traceTASK_NOTIFY_TAKE_BLOCK() -#endif - -#ifndef traceTASK_NOTIFY_TAKE - #define traceTASK_NOTIFY_TAKE() -#endif - -#ifndef traceTASK_NOTIFY_WAIT_BLOCK - #define traceTASK_NOTIFY_WAIT_BLOCK() -#endif - -#ifndef traceTASK_NOTIFY_WAIT - #define traceTASK_NOTIFY_WAIT() -#endif - -#ifndef traceTASK_NOTIFY - #define traceTASK_NOTIFY() -#endif - -#ifndef traceTASK_NOTIFY_FROM_ISR - #define traceTASK_NOTIFY_FROM_ISR() -#endif - -#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR - #define traceTASK_NOTIFY_GIVE_FROM_ISR() -#endif - -#ifndef configGENERATE_RUN_TIME_STATS - #define configGENERATE_RUN_TIME_STATS 0 -#endif - -#if ( configGENERATE_RUN_TIME_STATS == 1 ) - - #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. - #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ - - #ifndef portGET_RUN_TIME_COUNTER_VALUE - #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE - #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. - #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ - #endif /* portGET_RUN_TIME_COUNTER_VALUE */ - -#endif /* configGENERATE_RUN_TIME_STATS */ - -#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS - #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() -#endif - -#ifndef configUSE_MALLOC_FAILED_HOOK - #define configUSE_MALLOC_FAILED_HOOK 0 -#endif - -#ifndef portPRIVILEGE_BIT - #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) -#endif - -#ifndef portYIELD_WITHIN_API - #define portYIELD_WITHIN_API portYIELD -#endif - -#ifndef portSUPPRESS_TICKS_AND_SLEEP - #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) -#endif - -#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP - #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 -#endif - -#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2 - #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 -#endif - -#ifndef configUSE_TICKLESS_IDLE - #define configUSE_TICKLESS_IDLE 0 -#endif - -#ifndef configPRE_SLEEP_PROCESSING - #define configPRE_SLEEP_PROCESSING( x ) -#endif - -#ifndef configPOST_SLEEP_PROCESSING - #define configPOST_SLEEP_PROCESSING( x ) -#endif - -#ifndef configUSE_QUEUE_SETS - #define configUSE_QUEUE_SETS 0 -#endif - -#ifndef portTASK_USES_FLOATING_POINT - #define portTASK_USES_FLOATING_POINT() -#endif - -#ifndef configUSE_TIME_SLICING - #define configUSE_TIME_SLICING 1 -#endif - -#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS - #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 -#endif - -#ifndef configUSE_STATS_FORMATTING_FUNCTIONS - #define configUSE_STATS_FORMATTING_FUNCTIONS 0 -#endif - -#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID - #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() -#endif - -#ifndef configUSE_TRACE_FACILITY - #define configUSE_TRACE_FACILITY 0 -#endif - -#ifndef mtCOVERAGE_TEST_MARKER - #define mtCOVERAGE_TEST_MARKER() -#endif - -#ifndef mtCOVERAGE_TEST_DELAY - #define mtCOVERAGE_TEST_DELAY() -#endif - -#ifndef portASSERT_IF_IN_ISR - #define portASSERT_IF_IN_ISR() -#endif - -#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION - #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#endif - -#ifndef configAPPLICATION_ALLOCATED_HEAP - #define configAPPLICATION_ALLOCATED_HEAP 0 -#endif - -#ifndef configUSE_TASK_NOTIFICATIONS - #define configUSE_TASK_NOTIFICATIONS 1 -#endif - -#ifndef portTICK_TYPE_IS_ATOMIC - #define portTICK_TYPE_IS_ATOMIC 0 -#endif - -#ifndef configSUPPORT_STATIC_ALLOCATION - /* Defaults to 0 for backward compatibility. */ - #define configSUPPORT_STATIC_ALLOCATION 0 -#endif - -#ifndef configSUPPORT_DYNAMIC_ALLOCATION - /* Defaults to 1 for backward compatibility. */ - #define configSUPPORT_DYNAMIC_ALLOCATION 1 -#endif - -/* Sanity check the configuration. */ -#if( configUSE_TICKLESS_IDLE != 0 ) - #if( INCLUDE_vTaskSuspend != 1 ) - #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 - #endif /* INCLUDE_vTaskSuspend */ -#endif /* configUSE_TICKLESS_IDLE */ - -#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) - #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. -#endif - -#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) - #error configUSE_MUTEXES must be set to 1 to use recursive mutexes -#endif - -#if( portTICK_TYPE_IS_ATOMIC == 0 ) - /* Either variables of tick type cannot be read atomically, or - portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when - the tick count is returned to the standard critical section macros. */ - #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) -#else - /* The tick type can be read atomically, so critical sections used when the - tick count is returned can be defined away. */ - #define portTICK_TYPE_ENTER_CRITICAL() - #define portTICK_TYPE_EXIT_CRITICAL() - #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 - #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x -#endif - -/* Definitions to allow backward compatibility with FreeRTOS versions prior to -V8 if desired. */ -#ifndef configENABLE_BACKWARD_COMPATIBILITY - #define configENABLE_BACKWARD_COMPATIBILITY 1 -#endif - -#if configENABLE_BACKWARD_COMPATIBILITY == 1 - #define eTaskStateGet eTaskGetState - #define portTickType TickType_t - #define xTaskHandle TaskHandle_t - #define xQueueHandle QueueHandle_t - #define xSemaphoreHandle SemaphoreHandle_t - #define xQueueSetHandle QueueSetHandle_t - #define xQueueSetMemberHandle QueueSetMemberHandle_t - #define xTimeOutType TimeOut_t - #define xMemoryRegion MemoryRegion_t - #define xTaskParameters TaskParameters_t - #define xTaskStatusType TaskStatus_t - #define xTimerHandle TimerHandle_t - #define xCoRoutineHandle CoRoutineHandle_t - #define pdTASK_HOOK_CODE TaskHookFunction_t - #define portTICK_RATE_MS portTICK_PERIOD_MS - #define pcTaskGetTaskName pcTaskGetName - #define pcTimerGetTimerName pcTimerGetName - #define pcQueueGetQueueName pcQueueGetName - #define vTaskGetTaskInfo vTaskGetInfo - - /* Backward compatibility within the scheduler code only - these definitions - are not really required but are included for completeness. */ - #define tmrTIMER_CALLBACK TimerCallbackFunction_t - #define pdTASK_CODE TaskFunction_t - #define xListItem ListItem_t - #define xList List_t -#endif /* configENABLE_BACKWARD_COMPATIBILITY */ - -#if( configUSE_ALTERNATIVE_API != 0 ) - #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 -#endif - -/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even -if floating point hardware is otherwise supported by the FreeRTOS port in use. -This constant is not supported by all FreeRTOS ports that include floating -point support. */ -#ifndef configUSE_TASK_FPU_SUPPORT - #define configUSE_TASK_FPU_SUPPORT 1 -#endif - -/* - * In line with software engineering best practice, FreeRTOS implements a strict - * data hiding policy, so the real structures used by FreeRTOS to maintain the - * state of tasks, queues, semaphores, etc. are not accessible to the application - * code. However, if the application writer wants to statically allocate such - * an object then the size of the object needs to be know. Dummy structures - * that are guaranteed to have the same size and alignment requirements of the - * real objects are used for this purpose. The dummy list and list item - * structures below are used for inclusion in such a dummy structure. - */ -struct xSTATIC_LIST_ITEM -{ - TickType_t xDummy1; - void *pvDummy2[ 4 ]; -}; -typedef struct xSTATIC_LIST_ITEM StaticListItem_t; - -/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ -struct xSTATIC_MINI_LIST_ITEM -{ - TickType_t xDummy1; - void *pvDummy2[ 2 ]; -}; -typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t; - -/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ -typedef struct xSTATIC_LIST -{ - UBaseType_t uxDummy1; - void *pvDummy2; - StaticMiniListItem_t xDummy3; -} StaticList_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the Task structure used internally by - * FreeRTOS is not accessible to application code. However, if the application - * writer wants to statically allocate the memory required to create a task then - * the size of the task object needs to be know. The StaticTask_t structure - * below is provided for this purpose. Its sizes and alignment requirements are - * guaranteed to match those of the genuine structure, no matter which - * architecture is being used, and no matter how the values in FreeRTOSConfig.h - * are set. Its contents are somewhat obfuscated in the hope users will - * recognise that it would be unwise to make direct use of the structure members. - */ -typedef struct xSTATIC_TCB -{ - void *pxDummy1; - #if ( portUSING_MPU_WRAPPERS == 1 ) - xMPU_SETTINGS xDummy2; - #endif - StaticListItem_t xDummy3[ 2 ]; - UBaseType_t uxDummy5; - void *pxDummy6; - uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; - #if ( portSTACK_GROWTH > 0 ) - void *pxDummy8; - #endif - #if ( portCRITICAL_NESTING_IN_TCB == 1 ) - UBaseType_t uxDummy9; - #endif - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy10[ 2 ]; - #endif - #if ( configUSE_MUTEXES == 1 ) - UBaseType_t uxDummy12[ 2 ]; - #endif - #if ( configUSE_APPLICATION_TASK_TAG == 1 ) - void *pxDummy14; - #endif - #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) - void *pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; - #endif - #if ( configGENERATE_RUN_TIME_STATS == 1 ) - uint32_t ulDummy16; - #endif - #if ( configUSE_NEWLIB_REENTRANT == 1 ) - struct _reent xDummy17; - #endif - #if ( configUSE_TASK_NOTIFICATIONS == 1 ) - uint32_t ulDummy18; - uint8_t ucDummy19; - #endif - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t uxDummy20; - #endif - -} StaticTask_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the Queue structure used internally by - * FreeRTOS is not accessible to application code. However, if the application - * writer wants to statically allocate the memory required to create a queue - * then the size of the queue object needs to be know. The StaticQueue_t - * structure below is provided for this purpose. Its sizes and alignment - * requirements are guaranteed to match those of the genuine structure, no - * matter which architecture is being used, and no matter how the values in - * FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in the hope - * users will recognise that it would be unwise to make direct use of the - * structure members. - */ -typedef struct xSTATIC_QUEUE -{ - void *pvDummy1[ 3 ]; - - union - { - void *pvDummy2; - UBaseType_t uxDummy2; - } u; - - StaticList_t xDummy3[ 2 ]; - UBaseType_t uxDummy4[ 3 ]; - uint8_t ucDummy5[ 2 ]; - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy6; - #endif - - #if ( configUSE_QUEUE_SETS == 1 ) - void *pvDummy7; - #endif - - #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy8; - uint8_t ucDummy9; - #endif - -} StaticQueue_t; -typedef StaticQueue_t StaticSemaphore_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the event group structure used - * internally by FreeRTOS is not accessible to application code. However, if - * the application writer wants to statically allocate the memory required to - * create an event group then the size of the event group object needs to be - * know. The StaticEventGroup_t structure below is provided for this purpose. - * Its sizes and alignment requirements are guaranteed to match those of the - * genuine structure, no matter which architecture is being used, and no matter - * how the values in FreeRTOSConfig.h are set. Its contents are somewhat - * obfuscated in the hope users will recognise that it would be unwise to make - * direct use of the structure members. - */ -typedef struct xSTATIC_EVENT_GROUP -{ - TickType_t xDummy1; - StaticList_t xDummy2; - - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy3; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy4; - #endif - -} StaticEventGroup_t; - -/* - * In line with software engineering best practice, especially when supplying a - * library that is likely to change in future versions, FreeRTOS implements a - * strict data hiding policy. This means the software timer structure used - * internally by FreeRTOS is not accessible to application code. However, if - * the application writer wants to statically allocate the memory required to - * create a software timer then the size of the queue object needs to be know. - * The StaticTimer_t structure below is provided for this purpose. Its sizes - * and alignment requirements are guaranteed to match those of the genuine - * structure, no matter which architecture is being used, and no matter how the - * values in FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in - * the hope users will recognise that it would be unwise to make direct use of - * the structure members. - */ -typedef struct xSTATIC_TIMER -{ - void *pvDummy1; - StaticListItem_t xDummy2; - TickType_t xDummy3; - UBaseType_t uxDummy4; - void *pvDummy5[ 2 ]; - #if( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxDummy6; - #endif - - #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) - uint8_t ucDummy7; - #endif - -} StaticTimer_t; - -#ifdef __cplusplus -} -#endif - -#endif /* INC_FREERTOS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/StackMacros.h b/ports/cc3200/FreeRTOS/Source/include/StackMacros.h deleted file mode 100644 index 13c6b829beeaf..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/StackMacros.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef STACK_MACROS_H -#define STACK_MACROS_H - -/* - * Call the stack overflow hook function if the stack of the task being swapped - * out is currently overflowed, or looks like it might have overflowed in the - * past. - * - * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check - * the current stack state only - comparing the current top of stack value to - * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 - * will also cause the last few stack bytes to be checked to ensure the value - * to which the bytes were set when the task was created have not been - * overwritten. Note this second test does not guarantee that an overflowed - * stack will always be recognised. - */ - -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) - - /* Only the current stack state is to be checked. */ - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - \ - /* Is the currently saved stack pointer within the stack limit? */ \ - if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ - const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ - \ - if( ( pulStack[ 0 ] != ulCheckValue ) || \ - ( pulStack[ 1 ] != ulCheckValue ) || \ - ( pulStack[ 2 ] != ulCheckValue ) || \ - ( pulStack[ 3 ] != ulCheckValue ) ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) - - #define taskCHECK_FOR_STACK_OVERFLOW() \ - { \ - int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ - static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ - tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ - \ - \ - pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ - \ - /* Has the extremity of the task stack ever been written over? */ \ - if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ - { \ - vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ - } \ - } - -#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ -/*-----------------------------------------------------------*/ - -/* Remove stack overflow macro if not being used. */ -#ifndef taskCHECK_FOR_STACK_OVERFLOW - #define taskCHECK_FOR_STACK_OVERFLOW() -#endif - - - -#endif /* STACK_MACROS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/croutine.h b/ports/cc3200/FreeRTOS/Source/include/croutine.h deleted file mode 100644 index 4f003a0bae404..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/croutine.h +++ /dev/null @@ -1,762 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef CO_ROUTINE_H -#define CO_ROUTINE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include croutine.h" -#endif - -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Used to hide the implementation of the co-routine control block. The -control block structure however has to be included in the header due to -the macro implementation of the co-routine functionality. */ -typedef void * CoRoutineHandle_t; - -/* Defines the prototype to which co-routine functions must conform. */ -typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t ); - -typedef struct corCoRoutineControlBlock -{ - crCOROUTINE_CODE pxCoRoutineFunction; - ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ - ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ - UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ - UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ - uint16_t uxState; /*< Used internally by the co-routine implementation. */ -} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ - -/** - * croutine. h - *
- BaseType_t xCoRoutineCreate(
-                                 crCOROUTINE_CODE pxCoRoutineCode,
-                                 UBaseType_t uxPriority,
-                                 UBaseType_t uxIndex
-                               );
- * - * Create a new co-routine and add it to the list of co-routines that are - * ready to run. - * - * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine - * functions require special syntax - see the co-routine section of the WEB - * documentation for more information. - * - * @param uxPriority The priority with respect to other co-routines at which - * the co-routine will run. - * - * @param uxIndex Used to distinguish between different co-routines that - * execute the same function. See the example below and the co-routine section - * of the WEB documentation for further information. - * - * @return pdPASS if the co-routine was successfully created and added to a ready - * list, otherwise an error code defined with ProjDefs.h. - * - * Example usage: - 
- // Co-routine to be created.
- void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // This co-routine just delays for a fixed period, then toggles
-         // an LED.  Two co-routines are created using this function, so
-         // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how int32_t to delay.  This assumes xQueue has
-         // already been created.
-         vParTestToggleLED( cLedToFlash[ uxIndex ] );
-         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- uint8_t ucParameterToPass;
- TaskHandle_t xHandle;
-
-     // Create two co-routines at priority 0.  The first is given index 0
-     // so (from the code above) toggles LED 5 every 200 ticks.  The second
-     // is given index 1 so toggles LED 6 every 400 ticks.
-     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
-     {
-         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
-     }
- }
-
- * \defgroup xCoRoutineCreate xCoRoutineCreate - * \ingroup Tasks - */ -BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ); - - -/** - * croutine. h - *
- void vCoRoutineSchedule( void );
- * - * Run a co-routine. - * - * vCoRoutineSchedule() executes the highest priority co-routine that is able - * to run. The co-routine will execute until it either blocks, yields or is - * preempted by a task. Co-routines execute cooperatively so one - * co-routine cannot be preempted by another, but can be preempted by a task. - * - * If an application comprises of both tasks and co-routines then - * vCoRoutineSchedule should be called from the idle task (in an idle task - * hook). - * - * Example usage: - 
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
-	vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
-    for( ;; )
-    {
-        vCoRoutineSchedule();
-    }
- }
-
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule - * \ingroup Tasks - */ -void vCoRoutineSchedule( void ); - -/** - * croutine. h - * 
- crSTART( CoRoutineHandle_t xHandle );
- * - * This macro MUST always be called at the start of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0: - -/** - * croutine. h - * 
- crEND();
- * - * This macro MUST always be called at the end of a co-routine function. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static int32_t ulAVariable;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-          // Co-routine functionality goes here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crSTART crSTART - * \ingroup Tasks - */ -#define crEND() } - -/* - * These macros are intended for internal use by the co-routine implementation - * only. The macros should not be used directly by application writers. - */ -#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): -#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): - -/** - * croutine. h - *
- crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
- * - * Delay a co-routine for a fixed period of time. - * - * crDELAY can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * @param xHandle The handle of the co-routine to delay. This is the xHandle - * parameter of the co-routine function. - * - * @param xTickToDelay The number of ticks that the co-routine should delay - * for. The actual amount of time this equates to is defined by - * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS - * can be used to convert ticks to milliseconds. - * - * Example usage: - 
- // Co-routine to be created.
- void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
-
-     // Must start every co-routine with a call to crSTART();
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-        // Delay for 200ms.
-        crDELAY( xHandle, xDelayTime );
-
-        // Do something here.
-     }
-
-     // Must end every co-routine with a call to crEND();
-     crEND();
- }
- * \defgroup crDELAY crDELAY - * \ingroup Tasks - */ -#define crDELAY( xHandle, xTicksToDelay ) \ - if( ( xTicksToDelay ) > 0 ) \ - { \ - vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ - } \ - crSET_STATE0( ( xHandle ) ); - -/** - * 
- crQUEUE_SEND(
-                  CoRoutineHandle_t xHandle,
-                  QueueHandle_t pxQueue,
-                  void *pvItemToQueue,
-                  TickType_t xTicksToWait,
-                  BaseType_t *pxResult
-             )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_SEND can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue on which the data will be posted. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvItemToQueue A pointer to the data being posted onto the queue. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied from pvItemToQueue into the queue - * itself. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for space to become available on the queue, should space not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example - * below). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully posted onto the queue, otherwise it will be set to an - * error defined within ProjDefs.h. - * - * Example usage: - 
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xNumberToPost = 0;
- static BaseType_t xResult;
-
-    // Co-routines must begin with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // This assumes the queue has already been created.
-        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
-        if( xResult != pdPASS )
-        {
-            // The message was not posted!
-        }
-
-        // Increment the number to be posted onto the queue.
-        xNumberToPost++;
-
-        // Delay for 100 ticks.
-        crDELAY( xHandle, 100 );
-    }
-
-    // Co-routines must end with a call to crEND().
-    crEND();
- }
- * \defgroup crQUEUE_SEND crQUEUE_SEND - * \ingroup Tasks - */ -#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ - } \ - if( *pxResult == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *pxResult = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_RECEIVE(
-                     CoRoutineHandle_t xHandle,
-                     QueueHandle_t pxQueue,
-                     void *pvBuffer,
-                     TickType_t xTicksToWait,
-                     BaseType_t *pxResult
-                 )
- * - * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine - * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. - * - * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas - * xQueueSend() and xQueueReceive() can only be used from tasks. - * - * crQUEUE_RECEIVE can only be called from the co-routine function itself - not - * from within a function called by the co-routine function. This is because - * co-routines do not maintain their own stack. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xHandle The handle of the calling co-routine. This is the xHandle - * parameter of the co-routine function. - * - * @param pxQueue The handle of the queue from which the data will be received. - * The handle is obtained as the return value when the queue is created using - * the xQueueCreate() API function. - * - * @param pvBuffer The buffer into which the received item is to be copied. - * The number of bytes of each queued item is specified when the queue is - * created. This number of bytes is copied into pvBuffer. - * - * @param xTickToDelay The number of ticks that the co-routine should block - * to wait for data to become available from the queue, should data not be - * available immediately. The actual amount of time this equates to is defined - * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant - * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the - * crQUEUE_SEND example). - * - * @param pxResult The variable pointed to by pxResult will be set to pdPASS if - * data was successfully retrieved from the queue, otherwise it will be set to - * an error code as defined within ProjDefs.h. - * - * Example usage: - 
- // A co-routine receives the number of an LED to flash from a queue.  It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static BaseType_t xResult;
- static UBaseType_t uxLEDToFlash;
-
-    // All co-routines must start with a call to crSTART().
-    crSTART( xHandle );
-
-    for( ;; )
-    {
-        // Wait for data to become available on the queue.
-        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-        if( xResult == pdPASS )
-        {
-            // We received the LED to flash - flash it!
-            vParTestToggleLED( uxLEDToFlash );
-        }
-    }
-
-    crEND();
- }
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ -{ \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \ - if( *( pxResult ) == errQUEUE_BLOCKED ) \ - { \ - crSET_STATE0( ( xHandle ) ); \ - *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \ - } \ - if( *( pxResult ) == errQUEUE_YIELD ) \ - { \ - crSET_STATE1( ( xHandle ) ); \ - *( pxResult ) = pdPASS; \ - } \ -} - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvItemToQueue,
-                            BaseType_t xCoRoutinePreviouslyWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue - * that is being used from within a co-routine. - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto - * the same queue multiple times from a single interrupt. The first call - * should always pass in pdFALSE. Subsequent calls should pass in - * the value returned from the previous call. - * - * @return pdTRUE if a co-routine was woken by posting onto the queue. This is - * used by the ISR to determine if a context switch may be required following - * the ISR. - * - * Example usage: - 
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- char cRxedChar;
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Wait for data to become available on the queue.  This assumes the
-         // queue xCommsRxQueue has already been created!
-         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
-         // Was a character received?
-         if( xResult == pdPASS )
-         {
-             // Process the character here.
-         }
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- char cRxedChar;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     // We loop around reading characters until there are none left in the UART.
-     while( UART_RX_REG_NOT_EMPTY() )
-     {
-         // Obtain the character from the UART.
-         cRxedChar = UART_RX_REG;
-
-         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
-         // the first time around the loop.  If the post causes a co-routine
-         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
-         // In this manner we can ensure that if more than one co-routine is
-         // blocked on the queue only one is woken by this ISR no matter how
-         // many characters are posted to the queue.
-         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
-     }
- }
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) - - -/** - * croutine. h - * 
-  crQUEUE_SEND_FROM_ISR(
-                            QueueHandle_t pxQueue,
-                            void *pvBuffer,
-                            BaseType_t * pxCoRoutineWoken
-                       )
- * - * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the - * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() - * functions used by tasks. - * - * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and - * xQueueReceiveFromISR() can only be used to pass data between a task and and - * ISR. - * - * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data - * from a queue that is being used from within a co-routine (a co-routine - * posted to the queue). - * - * See the co-routine section of the WEB documentation for information on - * passing data between tasks and co-routines and between ISR's and - * co-routines. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvBuffer A pointer to a buffer into which the received item will be - * placed. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from the queue into - * pvBuffer. - * - * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become - * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a - * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise - * *pxCoRoutineWoken will remain unchanged. - * - * @return pdTRUE an item was successfully received from the queue, otherwise - * pdFALSE. - * - * Example usage: - 
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period.  The character is incremented each time.
- static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static char cCharToTx = 'a';
- BaseType_t xResult;
-
-     // All co-routines must start with a call to crSTART().
-     crSTART( xHandle );
-
-     for( ;; )
-     {
-         // Send the next character to the queue.
-         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
-         if( xResult == pdPASS )
-         {
-             // The character was successfully posted to the queue.
-         }
-		 else
-		 {
-			// Could not post the character to the queue.
-		 }
-
-         // Enable the UART Tx interrupt to cause an interrupt in this
-		 // hypothetical UART.  The interrupt will obtain the character
-		 // from the queue and send it.
-		 ENABLE_RX_INTERRUPT();
-
-		 // Increment to the next character then block for a fixed period.
-		 // cCharToTx will maintain its value across the delay as it is
-		 // declared static.
-		 cCharToTx++;
-		 if( cCharToTx > 'x' )
-		 {
-			cCharToTx = 'a';
-		 }
-		 crDELAY( 100 );
-     }
-
-     // All co-routines must end with a call to crEND().
-     crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- char cCharToTx;
- BaseType_t xCRWokenByPost = pdFALSE;
-
-     while( UART_TX_REG_EMPTY() )
-     {
-         // Are there any characters in the queue waiting to be sent?
-		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
-		 // is woken by the post - ensuring that only a single co-routine is
-		 // woken no matter how many times we go around this loop.
-         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
-		 {
-			 SEND_CHARACTER( cCharToTx );
-		 }
-     }
- }
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR - * \ingroup Tasks - */ -#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) - -/* - * This function is intended for internal use by the co-routine macros only. - * The macro nature of the co-routine implementation requires that the - * prototype appears here. The function should not be used by application - * writers. - * - * Removes the current co-routine from its ready list and places it in the - * appropriate delayed list. - */ -void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ); - -/* - * This function is intended for internal use by the queue implementation only. - * The function should not be used by application writers. - * - * Removes the highest priority co-routine from the event list and places it in - * the pending ready list. - */ -BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ); - -#ifdef __cplusplus -} -#endif - -#endif /* CO_ROUTINE_H */ diff --git a/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h b/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h deleted file mode 100644 index 4ea816ccfd42e..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/deprecated_definitions.h +++ /dev/null @@ -1,321 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef DEPRECATED_DEFINITIONS_H -#define DEPRECATED_DEFINITIONS_H - - -/* Each FreeRTOS port has a unique portmacro.h header file. Originally a -pre-processor definition was used to ensure the pre-processor found the correct -portmacro.h file for the port being used. That scheme was deprecated in favour -of setting the compiler's include path such that it found the correct -portmacro.h file - removing the need for the constant and allowing the -portmacro.h file to be located anywhere in relation to the port being used. The -definitions below remain in the code for backward compatibility only. New -projects should not use them. */ - -#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT - #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT - #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef GCC_MEGA_AVR - #include "../portable/GCC/ATMega323/portmacro.h" -#endif - -#ifdef IAR_MEGA_AVR - #include "../portable/IAR/ATMega323/portmacro.h" -#endif - -#ifdef MPLAB_PIC24_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" -#endif - -#ifdef MPLAB_DSPIC_PORT - #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" -#endif - -#ifdef MPLAB_PIC18F_PORT - #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" -#endif - -#ifdef MPLAB_PIC32MX_PORT - #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" -#endif - -#ifdef _FEDPICC - #include "libFreeRTOS/Include/portmacro.h" -#endif - -#ifdef SDCC_CYGNAL - #include "../../Source/portable/SDCC/Cygnal/portmacro.h" -#endif - -#ifdef GCC_ARM7 - #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" -#endif - -#ifdef GCC_ARM7_ECLIPSE - #include "portmacro.h" -#endif - -#ifdef ROWLEY_LPC23xx - #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" -#endif - -#ifdef IAR_MSP430 - #include "..\..\Source\portable\IAR\MSP430\portmacro.h" -#endif - -#ifdef GCC_MSP430 - #include "../../Source/portable/GCC/MSP430F449/portmacro.h" -#endif - -#ifdef ROWLEY_MSP430 - #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" -#endif - -#ifdef ARM7_LPC21xx_KEIL_RVDS - #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" -#endif - -#ifdef SAM7_GCC - #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" -#endif - -#ifdef SAM7_IAR - #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" -#endif - -#ifdef SAM9XE_IAR - #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" -#endif - -#ifdef LPC2000_IAR - #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" -#endif - -#ifdef STR71X_IAR - #include "..\..\Source\portable\IAR\STR71x\portmacro.h" -#endif - -#ifdef STR75X_IAR - #include "..\..\Source\portable\IAR\STR75x\portmacro.h" -#endif - -#ifdef STR75X_GCC - #include "..\..\Source\portable\GCC\STR75x\portmacro.h" -#endif - -#ifdef STR91X_IAR - #include "..\..\Source\portable\IAR\STR91x\portmacro.h" -#endif - -#ifdef GCC_H8S - #include "../../Source/portable/GCC/H8S2329/portmacro.h" -#endif - -#ifdef GCC_AT91FR40008 - #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" -#endif - -#ifdef RVDS_ARMCM3_LM3S102 - #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3_LM3S102 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef GCC_ARMCM3 - #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARM_CM3 - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef IAR_ARMCM3_LM - #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" -#endif - -#ifdef HCS12_CODE_WARRIOR - #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" -#endif - -#ifdef MICROBLAZE_GCC - #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" -#endif - -#ifdef TERN_EE - #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" -#endif - -#ifdef GCC_HCS12 - #include "../../Source/portable/GCC/HCS12/portmacro.h" -#endif - -#ifdef GCC_MCF5235 - #include "../../Source/portable/GCC/MCF5235/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_GCC - #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" -#endif - -#ifdef COLDFIRE_V2_CODEWARRIOR - #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" -#endif - -#ifdef GCC_PPC405 - #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" -#endif - -#ifdef GCC_PPC440 - #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" -#endif - -#ifdef _16FX_SOFTUNE - #include "..\..\Source\portable\Softune\MB96340\portmacro.h" -#endif - -#ifdef BCC_INDUSTRIAL_PC_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef BCC_FLASH_LITE_186_PORT - /* A short file name has to be used in place of the normal - FreeRTOSConfig.h when using the Borland compiler. */ - #include "frconfig.h" - #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" - typedef void ( __interrupt __far *pxISR )(); -#endif - -#ifdef __GNUC__ - #ifdef __AVR32_AVR32A__ - #include "portmacro.h" - #endif -#endif - -#ifdef __ICCAVR32__ - #ifdef __CORE__ - #if __CORE__ == __AVR32A__ - #include "portmacro.h" - #endif - #endif -#endif - -#ifdef __91467D - #include "portmacro.h" -#endif - -#ifdef __96340 - #include "portmacro.h" -#endif - - -#ifdef __IAR_V850ES_Fx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx3_L__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Jx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_V850ES_Hx2__ - #include "../../Source/portable/IAR/V850ES/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -#ifdef __IAR_78K0R_Kx3L__ - #include "../../Source/portable/IAR/78K0R/portmacro.h" -#endif - -#endif /* DEPRECATED_DEFINITIONS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/event_groups.h b/ports/cc3200/FreeRTOS/Source/include/event_groups.h deleted file mode 100644 index 7331c91c2502d..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/event_groups.h +++ /dev/null @@ -1,797 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef EVENT_GROUPS_H -#define EVENT_GROUPS_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" -#endif - -/* FreeRTOS includes. */ -#include "timers.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * An event group is a collection of bits to which an application can assign a - * meaning. For example, an application may create an event group to convey - * the status of various CAN bus related events in which bit 0 might mean "A CAN - * message has been received and is ready for processing", bit 1 might mean "The - * application has queued a message that is ready for sending onto the CAN - * network", and bit 2 might mean "It is time to send a SYNC message onto the - * CAN network" etc. A task can then test the bit values to see which events - * are active, and optionally enter the Blocked state to wait for a specified - * bit or a group of specified bits to be active. To continue the CAN bus - * example, a CAN controlling task can enter the Blocked state (and therefore - * not consume any processing time) until either bit 0, bit 1 or bit 2 are - * active, at which time the bit that was actually active would inform the task - * which action it had to take (process a received message, send a message, or - * send a SYNC). - * - * The event groups implementation contains intelligence to avoid race - * conditions that would otherwise occur were an application to use a simple - * variable for the same purpose. This is particularly important with respect - * to when a bit within an event group is to be cleared, and when bits have to - * be set and then tested atomically - as is the case where event groups are - * used to create a synchronisation point between multiple tasks (a - * 'rendezvous'). - * - * \defgroup EventGroup - */ - - - -/** - * event_groups.h - * - * Type by which event groups are referenced. For example, a call to - * xEventGroupCreate() returns an EventGroupHandle_t variable that can then - * be used as a parameter to other event group functions. - * - * \defgroup EventGroupHandle_t EventGroupHandle_t - * \ingroup EventGroup - */ -typedef void * EventGroupHandle_t; - -/* - * The type that holds event bits always matches TickType_t - therefore the - * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, - * 32 bits if set to 0. - * - * \defgroup EventBits_t EventBits_t - * \ingroup EventGroup - */ -typedef TickType_t EventBits_t; - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreate( void );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @return If the event group was created then a handle to the event group is - * returned. If there was insufficient FreeRTOS heap available to create the - * event group then NULL is returned. See http://www.freertos.org/a00111.html - * - * Example usage: - 
-	// Declare a variable to hold the created event group.
-	EventGroupHandle_t xCreatedEventGroup;
-
-	// Attempt to create the event group.
-	xCreatedEventGroup = xEventGroupCreate();
-
-	// Was the event group created successfully?
-	if( xCreatedEventGroup == NULL )
-	{
-		// The event group was not created because there was insufficient
-		// FreeRTOS heap available.
-	}
-	else
-	{
-		// The event group was created.
-	}
-
- * \defgroup xEventGroupCreate xEventGroupCreate - * \ingroup EventGroup - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
- EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
-
- * - * Create a new event group. - * - * Internally, within the FreeRTOS implementation, event groups use a [small] - * block of memory, in which the event group's structure is stored. If an event - * groups is created using xEventGropuCreate() then the required memory is - * automatically dynamically allocated inside the xEventGroupCreate() function. - * (see http://www.freertos.org/a00111.html). If an event group is created - * using xEventGropuCreateStatic() then the application writer must instead - * provide the memory that will get used by the event group. - * xEventGroupCreateStatic() therefore allows an event group to be created - * without using any dynamic memory allocation. - * - * Although event groups are not related to ticks, for internal implementation - * reasons the number of bits available for use in an event group is dependent - * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If - * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit - * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has - * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store - * event bits within an event group. - * - * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type - * StaticEventGroup_t, which will be then be used to hold the event group's data - * structures, removing the need for the memory to be allocated dynamically. - * - * @return If the event group was created then a handle to the event group is - * returned. If pxEventGroupBuffer was NULL then NULL is returned. - * - * Example usage: - 
-	// StaticEventGroup_t is a publicly accessible structure that has the same
-	// size and alignment requirements as the real event group structure.  It is
-	// provided as a mechanism for applications to know the size of the event
-	// group (which is dependent on the architecture and configuration file
-	// settings) without breaking the strict data hiding policy by exposing the
-	// real event group internals.  This StaticEventGroup_t variable is passed
-	// into the xSemaphoreCreateEventGroupStatic() function and is used to store
-	// the event group's data structures
-	StaticEventGroup_t xEventGroupBuffer;
-
-	// Create the event group without dynamically allocating any memory.
-	xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
-
- */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION; -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupWaitBits( 	EventGroupHandle_t xEventGroup,
-										const EventBits_t uxBitsToWaitFor,
-										const BaseType_t xClearOnExit,
-										const BaseType_t xWaitForAllBits,
-										const TickType_t xTicksToWait );
-
- * - * [Potentially] block to wait for one or more bits to be set within a - * previously created event group. - * - * This function cannot be called from an interrupt. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and/or bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within - * uxBitsToWaitFor that are set within the event group will be cleared before - * xEventGroupWaitBits() returns if the wait condition was met (if the function - * returns for a reason other than a timeout). If xClearOnExit is set to - * pdFALSE then the bits set in the event group are not altered when the call to - * xEventGroupWaitBits() returns. - * - * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then - * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor - * are set or the specified block time expires. If xWaitForAllBits is set to - * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set - * in uxBitsToWaitFor is set or the specified block time expires. The block - * time is specified by the xTicksToWait parameter. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for one/all (depending on the xWaitForAllBits value) of the bits specified by - * uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupWaitBits() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupWaitBits() returned because the bits it was waiting for were set - * then the returned value is the event group value before any bits were - * automatically cleared in the case that xClearOnExit parameter was set to - * pdTRUE. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-		// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
-		// the event group.  Clear the bits before exiting.
-		uxBits = xEventGroupWaitBits(
-					xEventGroup,	// The event group being tested.
-					BIT_0 | BIT_4,	// The bits within the event group to wait for.
-					pdTRUE,			// BIT_0 and BIT_4 should be cleared before returning.
-					pdFALSE,		// Don't wait for both bits, either bit will do.
-					xTicksToWait );	// Wait a maximum of 100ms for either bit to be set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// xEventGroupWaitBits() returned because both bits were set.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_0 was set.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// xEventGroupWaitBits() returned because just BIT_4 was set.
-		}
-		else
-		{
-			// xEventGroupWaitBits() returned because xTicksToWait ticks passed
-			// without either BIT_0 or BIT_4 becoming set.
-		}
-   }
-
- * \defgroup xEventGroupWaitBits xEventGroupWaitBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
-
- * - * Clear bits within an event group. This function cannot be called from an - * interrupt. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear - * in the event group. For example, to clear bit 3 only, set uxBitsToClear to - * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. - * - * @return The value of the event group before the specified bits were cleared. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Clear bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupClearBits(
-								xEventGroup,	// The event group being updated.
-								BIT_0 | BIT_4 );// The bits being cleared.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 were set before xEventGroupClearBits() was
-			// called.  Both will now be clear (not set).
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 was set before xEventGroupClearBits() was called.  It will
-			// now be clear.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 were set in the first place.
-		}
-   }
-
- * \defgroup xEventGroupClearBits xEventGroupClearBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * A version of xEventGroupClearBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed - * while interrupts are disabled, so protects event groups that are accessed - * from tasks by suspending the scheduler rather than disabling interrupts. As - * a result event groups cannot be accessed directly from an interrupt service - * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the - * timer task to have the clear operation performed in the context of the timer - * task. - * - * @param xEventGroup The event group in which the bits are to be cleared. - * - * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. - * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 - * and bit 0 set uxBitsToClear to 0x09. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-		// Clear bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupClearBitsFromISR(
-							xEventGroup,	 // The event group being updated.
-							BIT_0 | BIT_4 ); // The bits being set.
-
-		if( xResult == pdPASS )
-		{
-			// The message was posted successfully.
-		}
-  }
-
- * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
-
- * - * Set bits within an event group. - * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() - * is a version that can be called from an interrupt. - * - * Setting bits in an event group will automatically unblock tasks that are - * blocked waiting for the bits. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @return The value of the event group at the time the call to - * xEventGroupSetBits() returns. There are two reasons why the returned value - * might have the bits specified by the uxBitsToSet parameter cleared. First, - * if setting a bit results in a task that was waiting for the bit leaving the - * blocked state then it is possible the bit will be cleared automatically - * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any - * unblocked (or otherwise Ready state) task that has a priority above that of - * the task that called xEventGroupSetBits() will execute and may change the - * event group value before the call to xEventGroupSetBits() returns. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   void aFunction( EventGroupHandle_t xEventGroup )
-   {
-   EventBits_t uxBits;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		uxBits = xEventGroupSetBits(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4 );// The bits being set.
-
-		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
-		{
-			// Both bit 0 and bit 4 remained set when the function returned.
-		}
-		else if( ( uxBits & BIT_0 ) != 0 )
-		{
-			// Bit 0 remained set when the function returned, but bit 4 was
-			// cleared.  It might be that bit 4 was cleared automatically as a
-			// task that was waiting for bit 4 was removed from the Blocked
-			// state.
-		}
-		else if( ( uxBits & BIT_4 ) != 0 )
-		{
-			// Bit 4 remained set when the function returned, but bit 0 was
-			// cleared.  It might be that bit 0 was cleared automatically as a
-			// task that was waiting for bit 0 was removed from the Blocked
-			// state.
-		}
-		else
-		{
-			// Neither bit 0 nor bit 4 remained set.  It might be that a task
-			// was waiting for both of the bits to be set, and the bits were
-			// cleared as the task left the Blocked state.
-		}
-   }
-
- * \defgroup xEventGroupSetBits xEventGroupSetBits - * \ingroup EventGroup - */ -EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
-
- * - * A version of xEventGroupSetBits() that can be called from an interrupt. - * - * Setting bits in an event group is not a deterministic operation because there - * are an unknown number of tasks that may be waiting for the bit or bits being - * set. FreeRTOS does not allow nondeterministic operations to be performed in - * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() - * sends a message to the timer task to have the set operation performed in the - * context of the timer task - where a scheduler lock is used in place of a - * critical section. - * - * @param xEventGroup The event group in which the bits are to be set. - * - * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. - * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 - * and bit 0 set uxBitsToSet to 0x09. - * - * @param pxHigherPriorityTaskWoken As mentioned above, calling this function - * will result in a message being sent to the timer daemon task. If the - * priority of the timer daemon task is higher than the priority of the - * currently running task (the task the interrupt interrupted) then - * *pxHigherPriorityTaskWoken will be set to pdTRUE by - * xEventGroupSetBitsFromISR(), indicating that a context switch should be - * requested before the interrupt exits. For that reason - * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the - * example code below. - * - * @return If the request to execute the function was posted successfully then - * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned - * if the timer service queue was full. - * - * Example usage: - 
-   #define BIT_0	( 1 << 0 )
-   #define BIT_4	( 1 << 4 )
-
-   // An event group which it is assumed has already been created by a call to
-   // xEventGroupCreate().
-   EventGroupHandle_t xEventGroup;
-
-   void anInterruptHandler( void )
-   {
-   BaseType_t xHigherPriorityTaskWoken, xResult;
-
-		// xHigherPriorityTaskWoken must be initialised to pdFALSE.
-		xHigherPriorityTaskWoken = pdFALSE;
-
-		// Set bit 0 and bit 4 in xEventGroup.
-		xResult = xEventGroupSetBitsFromISR(
-							xEventGroup,	// The event group being updated.
-							BIT_0 | BIT_4   // The bits being set.
-							&xHigherPriorityTaskWoken );
-
-		// Was the message posted successfully?
-		if( xResult == pdPASS )
-		{
-			// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
-			// switch should be requested.  The macro used is port specific and
-			// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
-			// refer to the documentation page for the port being used.
-			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
-		}
-  }
-
- * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR - * \ingroup EventGroup - */ -#if( configUSE_TRACE_FACILITY == 1 ) - BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; -#else - #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) -#endif - -/** - * event_groups.h - *
-	EventBits_t xEventGroupSync(	EventGroupHandle_t xEventGroup,
-									const EventBits_t uxBitsToSet,
-									const EventBits_t uxBitsToWaitFor,
-									TickType_t xTicksToWait );
-
- * - * Atomically set bits within an event group, then wait for a combination of - * bits to be set within the same event group. This functionality is typically - * used to synchronise multiple tasks, where each task has to wait for the other - * tasks to reach a synchronisation point before proceeding. - * - * This function cannot be used from an interrupt. - * - * The function will return before its block time expires if the bits specified - * by the uxBitsToWait parameter are set, or become set within that time. In - * this case all the bits specified by uxBitsToWait will be automatically - * cleared before the function returns. - * - * @param xEventGroup The event group in which the bits are being tested. The - * event group must have previously been created using a call to - * xEventGroupCreate(). - * - * @param uxBitsToSet The bits to set in the event group before determining - * if, and possibly waiting for, all the bits specified by the uxBitsToWait - * parameter are set. - * - * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test - * inside the event group. For example, to wait for bit 0 and bit 2 set - * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set - * uxBitsToWaitFor to 0x07. Etc. - * - * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait - * for all of the bits specified by uxBitsToWaitFor to become set. - * - * @return The value of the event group at the time either the bits being waited - * for became set, or the block time expired. Test the return value to know - * which bits were set. If xEventGroupSync() returned because its timeout - * expired then not all the bits being waited for will be set. If - * xEventGroupSync() returned because all the bits it was waiting for were - * set then the returned value is the event group value before any bits were - * automatically cleared. - * - * Example usage: - 
- // Bits used by the three tasks.
- #define TASK_0_BIT		( 1 << 0 )
- #define TASK_1_BIT		( 1 << 1 )
- #define TASK_2_BIT		( 1 << 2 )
-
- #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
-
- // Use an event group to synchronise three tasks.  It is assumed this event
- // group has already been created elsewhere.
- EventGroupHandle_t xEventBits;
-
- void vTask0( void *pvParameters )
- {
- EventBits_t uxReturn;
- TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
-
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 0 in the event flag to note this task has reached the
-		// sync point.  The other two tasks will set the other two bits defined
-		// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
-		// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
-		// for this to happen.
-		uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
-
-		if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
-		{
-			// All three tasks reached the synchronisation point before the call
-			// to xEventGroupSync() timed out.
-		}
-	}
- }
-
- void vTask1( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 1 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	 }
- }
-
- void vTask2( void *pvParameters )
- {
-	 for( ;; )
-	 {
-		// Perform task functionality here.
-
-		// Set bit 2 in the event flag to note this task has reached the
-		// synchronisation point.  The other two tasks will set the other two
-		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
-		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
-		// indefinitely for this to happen.
-		xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
-
-		// xEventGroupSync() was called with an indefinite block time, so
-		// this task will only reach here if the syncrhonisation was made by all
-		// three tasks, so there is no need to test the return value.
-	}
- }
-
-
- * \defgroup xEventGroupSync xEventGroupSync - * \ingroup EventGroup - */ -EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
-
- * - * Returns the current value of the bits in an event group. This function - * cannot be used from an interrupt. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBits() was called. - * - * \defgroup xEventGroupGetBits xEventGroupGetBits - * \ingroup EventGroup - */ -#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) - -/** - * event_groups.h - *
-	EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
-
- * - * A version of xEventGroupGetBits() that can be called from an ISR. - * - * @param xEventGroup The event group being queried. - * - * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. - * - * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR - * \ingroup EventGroup - */ -EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/** - * event_groups.h - *
-	void xEventGroupDelete( EventGroupHandle_t xEventGroup );
-
- * - * Delete an event group that was previously created by a call to - * xEventGroupCreate(). Tasks that are blocked on the event group will be - * unblocked and obtain 0 as the event group's value. - * - * @param xEventGroup The event group being deleted. - */ -void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; - -/* For internal use only. */ -void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; -void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; - - -#if (configUSE_TRACE_FACILITY == 1) - UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* EVENT_GROUPS_H */ - - diff --git a/ports/cc3200/FreeRTOS/Source/include/list.h b/ports/cc3200/FreeRTOS/Source/include/list.h deleted file mode 100644 index a080d27def72c..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/list.h +++ /dev/null @@ -1,453 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* - * This is the list implementation used by the scheduler. While it is tailored - * heavily for the schedulers needs, it is also available for use by - * application code. - * - * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a - * numeric value (xItemValue). Most of the time the lists are sorted in - * descending item value order. - * - * Lists are created already containing one list item. The value of this - * item is the maximum possible that can be stored, it is therefore always at - * the end of the list and acts as a marker. The list member pxHead always - * points to this marker - even though it is at the tail of the list. This - * is because the tail contains a wrap back pointer to the true head of - * the list. - * - * In addition to it's value, each list item contains a pointer to the next - * item in the list (pxNext), a pointer to the list it is in (pxContainer) - * and a pointer to back to the object that contains it. These later two - * pointers are included for efficiency of list manipulation. There is - * effectively a two way link between the object containing the list item and - * the list item itself. - * - * - * \page ListIntroduction List Implementation - * \ingroup FreeRTOSIntro - */ - -#ifndef INC_FREERTOS_H - #error FreeRTOS.h must be included before list.h -#endif - -#ifndef LIST_H -#define LIST_H - -/* - * The list structure members are modified from within interrupts, and therefore - * by rights should be declared volatile. However, they are only modified in a - * functionally atomic way (within critical sections of with the scheduler - * suspended) and are either passed by reference into a function or indexed via - * a volatile variable. Therefore, in all use cases tested so far, the volatile - * qualifier can be omitted in order to provide a moderate performance - * improvement without adversely affecting functional behaviour. The assembly - * instructions generated by the IAR, ARM and GCC compilers when the respective - * compiler's options were set for maximum optimisation has been inspected and - * deemed to be as intended. That said, as compiler technology advances, and - * especially if aggressive cross module optimisation is used (a use case that - * has not been exercised to any great extend) then it is feasible that the - * volatile qualifier will be needed for correct optimisation. It is expected - * that a compiler removing essential code because, without the volatile - * qualifier on the list structure members and with aggressive cross module - * optimisation, the compiler deemed the code unnecessary will result in - * complete and obvious failure of the scheduler. If this is ever experienced - * then the volatile qualifier can be inserted in the relevant places within the - * list structures by simply defining configLIST_VOLATILE to volatile in - * FreeRTOSConfig.h (as per the example at the bottom of this comment block). - * If configLIST_VOLATILE is not defined then the preprocessor directives below - * will simply #define configLIST_VOLATILE away completely. - * - * To use volatile list structure members then add the following line to - * FreeRTOSConfig.h (without the quotes): - * "#define configLIST_VOLATILE volatile" - */ -#ifndef configLIST_VOLATILE - #define configLIST_VOLATILE -#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Macros that can be used to place known values within the list structures, -then check that the known values do not get corrupted during the execution of -the application. These may catch the list data structures being overwritten in -memory. They will not catch data errors caused by incorrect configuration or -use of FreeRTOS.*/ -#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) - /* Define the macros to do nothing. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) - #define listTEST_LIST_INTEGRITY( pxList ) -#else - /* Define macros that add new members into the list structures. */ - #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; - #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; - #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; - #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; - - /* Define macros that set the new structure members to known values. */ - #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - - /* Define macros that will assert if one of the structure members does not - contain its expected value. */ - #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) - #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) -#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ - - -/* - * Definition of the only type of object that a list can contain. - */ -struct xLIST_ITEM -{ - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ - struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ - void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ - void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ - listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ -}; -typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ - -struct xMINI_LIST_ITEM -{ - listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE TickType_t xItemValue; - struct xLIST_ITEM * configLIST_VOLATILE pxNext; - struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; -}; -typedef struct xMINI_LIST_ITEM MiniListItem_t; - -/* - * Definition of the type of queue used by the scheduler. - */ -typedef struct xLIST -{ - listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ - configLIST_VOLATILE UBaseType_t uxNumberOfItems; - ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ - MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ - listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ -} List_t; - -/* - * Access macro to set the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) - -/* - * Access macro to get the owner of a list item. The owner of a list item - * is the object (usually a TCB) that contains the list item. - * - * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) - -/* - * Access macro to set the value of the list item. In most cases the value is - * used to sort the list in descending order. - * - * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) - -/* - * Access macro to retrieve the value of the list item. The value can - * represent anything - for example the priority of a task, or the time at - * which a task should be unblocked. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) - -/* - * Access macro to retrieve the value of the list item at the head of a given - * list. - * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE - * \ingroup LinkedList - */ -#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) - -/* - * Return the list item at the head of the list. - * - * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) - -/* - * Return the list item at the head of the list. - * - * \page listGET_NEXT listGET_NEXT - * \ingroup LinkedList - */ -#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) - -/* - * Return the list item that marks the end of the list - * - * \page listGET_END_MARKER listGET_END_MARKER - * \ingroup LinkedList - */ -#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) - -/* - * Access macro to determine if a list contains any items. The macro will - * only have the value true if the list is empty. - * - * \page listLIST_IS_EMPTY listLIST_IS_EMPTY - * \ingroup LinkedList - */ -#define listLIST_IS_EMPTY( pxList ) ( ( BaseType_t ) ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ) - -/* - * Access macro to return the number of items in the list. - */ -#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) - -/* - * Access function to obtain the owner of the next entry in a list. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list - * and returns that entry's pxOwner parameter. Using multiple calls to this - * function it is therefore possible to move through every item contained in - * a list. - * - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxTCB pxTCB is set to the address of the owner of the next list item. - * @param pxList The list from which the next item owner is to be returned. - * - * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ -{ \ -List_t * const pxConstList = ( pxList ); \ - /* Increment the index to the next item and return the item, ensuring */ \ - /* we don't return the marker used at the end of the list. */ \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ - { \ - ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ - } \ - ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ -} - - -/* - * Access function to obtain the owner of the first entry in a list. Lists - * are normally sorted in ascending item value order. - * - * This function returns the pxOwner member of the first item in the list. - * The pxOwner parameter of a list item is a pointer to the object that owns - * the list item. In the scheduler this is normally a task control block. - * The pxOwner parameter effectively creates a two way link between the list - * item and its owner. - * - * @param pxList The list from which the owner of the head item is to be - * returned. - * - * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY - * \ingroup LinkedList - */ -#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) - -/* - * Check to see if a list item is within a list. The list item maintains a - * "container" pointer that points to the list it is in. All this macro does - * is check to see if the container and the list match. - * - * @param pxList The list we want to know if the list item is within. - * @param pxListItem The list item we want to know if is in the list. - * @return pdTRUE if the list item is in the list, otherwise pdFALSE. - */ -#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( BaseType_t ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) ) - -/* - * Return the list a list item is contained within (referenced from). - * - * @param pxListItem The list item being queried. - * @return A pointer to the List_t object that references the pxListItem - */ -#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pvContainer ) - -/* - * This provides a crude means of knowing if a list has been initialised, as - * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() - * function. - */ -#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) - -/* - * Must be called before a list is used! This initialises all the members - * of the list structure and inserts the xListEnd item into the list as a - * marker to the back of the list. - * - * @param pxList Pointer to the list being initialised. - * - * \page vListInitialise vListInitialise - * \ingroup LinkedList - */ -void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION; - -/* - * Must be called before a list item is used. This sets the list container to - * null so the item does not think that it is already contained in a list. - * - * @param pxItem Pointer to the list item being initialised. - * - * \page vListInitialiseItem vListInitialiseItem - * \ingroup LinkedList - */ -void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; - -/* - * Insert a list item into a list. The item will be inserted into the list in - * a position determined by its item value (descending item value order). - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The item that is to be placed in the list. - * - * \page vListInsert vListInsert - * \ingroup LinkedList - */ -void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; - -/* - * Insert a list item into a list. The item will be inserted in a position - * such that it will be the last item within the list returned by multiple - * calls to listGET_OWNER_OF_NEXT_ENTRY. - * - * The list member pxIndex is used to walk through a list. Calling - * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. - * Placing an item in a list using vListInsertEnd effectively places the item - * in the list position pointed to by pxIndex. This means that every other - * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before - * the pxIndex parameter again points to the item being inserted. - * - * @param pxList The list into which the item is to be inserted. - * - * @param pxNewListItem The list item to be inserted into the list. - * - * \page vListInsertEnd vListInsertEnd - * \ingroup LinkedList - */ -void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; - -/* - * Remove an item from a list. The list item has a pointer to the list that - * it is in, so only the list item need be passed into the function. - * - * @param uxListRemove The item to be removed. The item will remove itself from - * the list pointed to by it's pxContainer parameter. - * - * @return The number of items that remain in the list after the list item has - * been removed. - * - * \page uxListRemove uxListRemove - * \ingroup LinkedList - */ -UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; - -#ifdef __cplusplus -} -#endif - -#endif - diff --git a/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h b/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h deleted file mode 100644 index 8f7500b022aba..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/mpu_prototypes.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/* - * When the MPU is used the standard (non MPU) API functions are mapped to - * equivalents that start "MPU_", the prototypes for which are defined in this - * header files. This will cause the application code to call the MPU_ version - * which wraps the non-MPU version with privilege promoting then demoting code, - * so the kernel code always runs will full privileges. - */ - - -#ifndef MPU_PROTOTYPES_H -#define MPU_PROTOTYPES_H - -/* MPU versions of tasks.h API function. */ -BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ); -TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ); -BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ); -void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ); -void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ); -void MPU_vTaskDelay( const TickType_t xTicksToDelay ); -void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ); -BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ); -UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t xTask ); -eTaskState MPU_eTaskGetState( TaskHandle_t xTask ); -void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ); -void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ); -void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ); -void MPU_vTaskResume( TaskHandle_t xTaskToResume ); -void MPU_vTaskStartScheduler( void ); -void MPU_vTaskSuspendAll( void ); -BaseType_t MPU_xTaskResumeAll( void ); -TickType_t MPU_xTaskGetTickCount( void ); -UBaseType_t MPU_uxTaskGetNumberOfTasks( void ); -char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ); -TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ); -UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ); -void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ); -TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ); -void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ); -void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ); -BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ); -TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ); -UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ); -void MPU_vTaskList( char * pcWriteBuffer ); -void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ); -BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ); -BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ); -uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ); -BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ); -BaseType_t MPU_xTaskIncrementTick( void ); -TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ); -void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ); -BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ); -void MPU_vTaskMissedYield( void ); -BaseType_t MPU_xTaskGetSchedulerState( void ); - -/* MPU versions of queue.h API function. */ -BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ); -BaseType_t MPU_xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeek ); -UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ); -UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ); -void MPU_vQueueDelete( QueueHandle_t xQueue ); -QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ); -QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ); -QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ); -QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ); -void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ); -BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ); -BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ); -void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ); -void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ); -const char * MPU_pcQueueGetName( QueueHandle_t xQueue ); -QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ); -QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ); -QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ); -BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); -BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); -QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ); -BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ); -void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ); -UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ); -uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ); - -/* MPU versions of timers.h API function. */ -TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ); -TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ); -void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ); -void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ); -BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ); -TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ); -BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ); -const char * MPU_pcTimerGetName( TimerHandle_t xTimer ); -TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ); -TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ); -BaseType_t MPU_xTimerCreateTimerTask( void ); -BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ); - -/* MPU versions of event_group.h API function. */ -EventGroupHandle_t MPU_xEventGroupCreate( void ); -EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ); -EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ); -EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ); -EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); -EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ); -void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ); -UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ); - -#endif /* MPU_PROTOTYPES_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h b/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h deleted file mode 100644 index 78f5a9aea104f..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/mpu_wrappers.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef MPU_WRAPPERS_H -#define MPU_WRAPPERS_H - -/* This file redefines API functions to be called through a wrapper macro, but -only for ports that are using the MPU. */ -#ifdef portUSING_MPU_WRAPPERS - - /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is - included from queue.c or task.c to prevent it from having an effect within - those files. */ - #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE - - /* - * Map standard (non MPU) API functions to equivalents that start - * "MPU_". This will cause the application code to call the MPU_ - * version, which wraps the non-MPU version with privilege promoting - * then demoting code, so the kernel code always runs will full - * privileges. - */ - - /* Map standard tasks.h API functions to the MPU equivalents. */ - #define xTaskCreate MPU_xTaskCreate - #define xTaskCreateStatic MPU_xTaskCreateStatic - #define xTaskCreateRestricted MPU_xTaskCreateRestricted - #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions - #define vTaskDelete MPU_vTaskDelete - #define vTaskDelay MPU_vTaskDelay - #define vTaskDelayUntil MPU_vTaskDelayUntil - #define xTaskAbortDelay MPU_xTaskAbortDelay - #define uxTaskPriorityGet MPU_uxTaskPriorityGet - #define eTaskGetState MPU_eTaskGetState - #define vTaskGetInfo MPU_vTaskGetInfo - #define vTaskPrioritySet MPU_vTaskPrioritySet - #define vTaskSuspend MPU_vTaskSuspend - #define vTaskResume MPU_vTaskResume - #define vTaskSuspendAll MPU_vTaskSuspendAll - #define xTaskResumeAll MPU_xTaskResumeAll - #define xTaskGetTickCount MPU_xTaskGetTickCount - #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks - #define pcTaskGetName MPU_pcTaskGetName - #define xTaskGetHandle MPU_xTaskGetHandle - #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark - #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag - #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag - #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer - #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer - #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook - #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle - #define uxTaskGetSystemState MPU_uxTaskGetSystemState - #define vTaskList MPU_vTaskList - #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats - #define xTaskGenericNotify MPU_xTaskGenericNotify - #define xTaskNotifyWait MPU_xTaskNotifyWait - #define ulTaskNotifyTake MPU_ulTaskNotifyTake - #define xTaskNotifyStateClear MPU_xTaskNotifyStateClear - - #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle - #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState - #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut - #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState - - /* Map standard queue.h API functions to the MPU equivalents. */ - #define xQueueGenericSend MPU_xQueueGenericSend - #define xQueueGenericReceive MPU_xQueueGenericReceive - #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting - #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable - #define vQueueDelete MPU_vQueueDelete - #define xQueueCreateMutex MPU_xQueueCreateMutex - #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic - #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore - #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic - #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder - #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive - #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive - #define xQueueGenericCreate MPU_xQueueGenericCreate - #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic - #define xQueueCreateSet MPU_xQueueCreateSet - #define xQueueAddToSet MPU_xQueueAddToSet - #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet - #define xQueueSelectFromSet MPU_xQueueSelectFromSet - #define xQueueGenericReset MPU_xQueueGenericReset - - #if( configQUEUE_REGISTRY_SIZE > 0 ) - #define vQueueAddToRegistry MPU_vQueueAddToRegistry - #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue - #define pcQueueGetName MPU_pcQueueGetName - #endif - - /* Map standard timer.h API functions to the MPU equivalents. */ - #define xTimerCreate MPU_xTimerCreate - #define xTimerCreateStatic MPU_xTimerCreateStatic - #define pvTimerGetTimerID MPU_pvTimerGetTimerID - #define vTimerSetTimerID MPU_vTimerSetTimerID - #define xTimerIsTimerActive MPU_xTimerIsTimerActive - #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle - #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall - #define pcTimerGetName MPU_pcTimerGetName - #define xTimerGetPeriod MPU_xTimerGetPeriod - #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime - #define xTimerGenericCommand MPU_xTimerGenericCommand - - /* Map standard event_group.h API functions to the MPU equivalents. */ - #define xEventGroupCreate MPU_xEventGroupCreate - #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic - #define xEventGroupWaitBits MPU_xEventGroupWaitBits - #define xEventGroupClearBits MPU_xEventGroupClearBits - #define xEventGroupSetBits MPU_xEventGroupSetBits - #define xEventGroupSync MPU_xEventGroupSync - #define vEventGroupDelete MPU_vEventGroupDelete - - /* Remove the privileged function macro. */ - #define PRIVILEGED_FUNCTION - - #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - - /* Ensure API functions go in the privileged execution section. */ - #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions"))) - #define PRIVILEGED_DATA __attribute__((section("privileged_data"))) - - #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ - -#else /* portUSING_MPU_WRAPPERS */ - - #define PRIVILEGED_FUNCTION - #define PRIVILEGED_DATA - #define portUSING_MPU_WRAPPERS 0 - -#endif /* portUSING_MPU_WRAPPERS */ - - -#endif /* MPU_WRAPPERS_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/portable.h b/ports/cc3200/FreeRTOS/Source/include/portable.h deleted file mode 100644 index b9f8be39ddb27..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/portable.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -/*----------------------------------------------------------- - * Portable layer API. Each function must be defined for each port. - *----------------------------------------------------------*/ - -#ifndef PORTABLE_H -#define PORTABLE_H - -/* Each FreeRTOS port has a unique portmacro.h header file. Originally a -pre-processor definition was used to ensure the pre-processor found the correct -portmacro.h file for the port being used. That scheme was deprecated in favour -of setting the compiler's include path such that it found the correct -portmacro.h file - removing the need for the constant and allowing the -portmacro.h file to be located anywhere in relation to the port being used. -Purely for reasons of backward compatibility the old method is still valid, but -to make it clear that new projects should not use it, support for the port -specific constants has been moved into the deprecated_definitions.h header -file. */ -#include "deprecated_definitions.h" - -/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h -did not result in a portmacro.h header file being included - and it should be -included here. In this case the path to the correct portmacro.h header file -must be set in the compiler's include path. */ -#ifndef portENTER_CRITICAL - #include "portmacro.h" -#endif - -#if portBYTE_ALIGNMENT == 32 - #define portBYTE_ALIGNMENT_MASK ( 0x001f ) -#endif - -#if portBYTE_ALIGNMENT == 16 - #define portBYTE_ALIGNMENT_MASK ( 0x000f ) -#endif - -#if portBYTE_ALIGNMENT == 8 - #define portBYTE_ALIGNMENT_MASK ( 0x0007 ) -#endif - -#if portBYTE_ALIGNMENT == 4 - #define portBYTE_ALIGNMENT_MASK ( 0x0003 ) -#endif - -#if portBYTE_ALIGNMENT == 2 - #define portBYTE_ALIGNMENT_MASK ( 0x0001 ) -#endif - -#if portBYTE_ALIGNMENT == 1 - #define portBYTE_ALIGNMENT_MASK ( 0x0000 ) -#endif - -#ifndef portBYTE_ALIGNMENT_MASK - #error "Invalid portBYTE_ALIGNMENT definition" -#endif - -#ifndef portNUM_CONFIGURABLE_REGIONS - #define portNUM_CONFIGURABLE_REGIONS 1 -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#include "mpu_wrappers.h" - -/* - * Setup the stack of a new task so it is ready to be placed under the - * scheduler control. The registers have to be placed on the stack in - * the order that the port expects to find them. - * - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; -#else - StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION; -#endif - -/* Used by heap_5.c. */ -typedef struct HeapRegion -{ - uint8_t *pucStartAddress; - size_t xSizeInBytes; -} HeapRegion_t; - -/* - * Used to define multiple heap regions for use by heap_5.c. This function - * must be called before any calls to pvPortMalloc() - not creating a task, - * queue, semaphore, mutex, software timer, event group, etc. will result in - * pvPortMalloc being called. - * - * pxHeapRegions passes in an array of HeapRegion_t structures - each of which - * defines a region of memory that can be used as the heap. The array is - * terminated by a HeapRegions_t structure that has a size of 0. The region - * with the lowest start address must appear first in the array. - */ -void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION; - - -/* - * Map to the memory management routines required for the port. - */ -void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; -void vPortFree( void *pv ) PRIVILEGED_FUNCTION; -void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; -size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; -size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; - -/* - * Setup the hardware ready for the scheduler to take control. This generally - * sets up a tick interrupt and sets timers for the correct tick frequency. - */ -BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so - * the hardware is left in its original condition after the scheduler stops - * executing. - */ -void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; - -/* - * The structures and methods of manipulating the MPU are contained within the - * port layer. - * - * Fills the xMPUSettings structure with the memory region information - * contained in xRegions. - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - struct xMEMORY_REGION; - void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION; -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* PORTABLE_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/projdefs.h b/ports/cc3200/FreeRTOS/Source/include/projdefs.h deleted file mode 100644 index 0b63fd8a9f9bd..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/projdefs.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef PROJDEFS_H -#define PROJDEFS_H - -/* - * Defines the prototype to which task functions must conform. Defined in this - * file to ensure the type is known before portable.h is included. - */ -typedef void (*TaskFunction_t)( void * ); - -/* Converts a time in milliseconds to a time in ticks. This macro can be -overridden by a macro of the same name defined in FreeRTOSConfig.h in case the -definition here is not suitable for your application. */ -#ifndef pdMS_TO_TICKS - #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) ) -#endif - -#define pdFALSE ( ( BaseType_t ) 0 ) -#define pdTRUE ( ( BaseType_t ) 1 ) - -#define pdPASS ( pdTRUE ) -#define pdFAIL ( pdFALSE ) -#define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) -#define errQUEUE_FULL ( ( BaseType_t ) 0 ) - -/* FreeRTOS error definitions. */ -#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) -#define errQUEUE_BLOCKED ( -4 ) -#define errQUEUE_YIELD ( -5 ) - -/* Macros used for basic data corruption checks. */ -#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 -#endif - -#if( configUSE_16_BIT_TICKS == 1 ) - #define pdINTEGRITY_CHECK_VALUE 0x5a5a -#else - #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL -#endif - -/* The following errno values are used by FreeRTOS+ components, not FreeRTOS -itself. */ -#define pdFREERTOS_ERRNO_NONE 0 /* No errors */ -#define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ -#define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ -#define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ -#define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ -#define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ -#define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ -#define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ -#define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ -#define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ -#define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ -#define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ -#define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ -#define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ -#define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ -#define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ -#define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ -#define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ -#define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ -#define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ -#define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ -#define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ -#define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ -#define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ -#define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ -#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ -#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ -#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ -#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ -#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ -#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ -#define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ -#define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ -#define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ -#define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ -#define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ -#define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ -#define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ -#define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ -#define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ - -/* The following endian values are used by FreeRTOS+ components, not FreeRTOS -itself. */ -#define pdFREERTOS_LITTLE_ENDIAN 0 -#define pdFREERTOS_BIG_ENDIAN 1 - -#endif /* PROJDEFS_H */ - - - diff --git a/ports/cc3200/FreeRTOS/Source/include/queue.h b/ports/cc3200/FreeRTOS/Source/include/queue.h deleted file mode 100644 index 30be360136b7b..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/queue.h +++ /dev/null @@ -1,1798 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - -#ifndef QUEUE_H -#define QUEUE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include queue.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * Type by which queues are referenced. For example, a call to xQueueCreate() - * returns an QueueHandle_t variable that can then be used as a parameter to - * xQueueSend(), xQueueReceive(), etc. - */ -typedef void * QueueHandle_t; - -/** - * Type by which queue sets are referenced. For example, a call to - * xQueueCreateSet() returns an xQueueSet variable that can then be used as a - * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc. - */ -typedef void * QueueSetHandle_t; - -/** - * Queue sets can contain both queues and semaphores, so the - * QueueSetMemberHandle_t is defined as a type to be used where a parameter or - * return value can be either an QueueHandle_t or an SemaphoreHandle_t. - */ -typedef void * QueueSetMemberHandle_t; - -/* For internal use only. */ -#define queueSEND_TO_BACK ( ( BaseType_t ) 0 ) -#define queueSEND_TO_FRONT ( ( BaseType_t ) 1 ) -#define queueOVERWRITE ( ( BaseType_t ) 2 ) - -/* For internal use only. These definitions *must* match those in queue.c. */ -#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U ) -#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U ) -#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U ) -#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U ) -#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U ) -#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U ) - -/** - * queue. h - * 
- QueueHandle_t xQueueCreate(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize
-						  );
- *
- * - * Creates a new queue instance, and returns a handle by which the new queue - * can be referenced. - * - * Internally, within the FreeRTOS implementation, queues use two blocks of - * memory. The first block is used to hold the queue's data structures. The - * second block is used to hold items placed into the queue. If a queue is - * created using xQueueCreate() then both blocks of memory are automatically - * dynamically allocated inside the xQueueCreate() function. (see - * http://www.freertos.org/a00111.html). If a queue is created using - * xQueueCreateStatic() then the application writer must provide the memory that - * will get used by the queue. xQueueCreateStatic() therefore allows a queue to - * be created without using any dynamic memory allocation. - * - * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @return If the queue is successfully create then a handle to the newly - * created queue is returned. If the queue cannot be created then 0 is - * returned. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-	if( xQueue1 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue2 == 0 )
-	{
-		// Queue was not created and must not be used.
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueCreate xQueueCreate - * \ingroup QueueManagement - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) ) -#endif - -/** - * queue. h - * 
- QueueHandle_t xQueueCreateStatic(
-							  UBaseType_t uxQueueLength,
-							  UBaseType_t uxItemSize,
-							  uint8_t *pucQueueStorageBuffer,
-							  StaticQueue_t *pxQueueBuffer
-						  );
- *
- * - * Creates a new queue instance, and returns a handle by which the new queue - * can be referenced. - * - * Internally, within the FreeRTOS implementation, queues use two blocks of - * memory. The first block is used to hold the queue's data structures. The - * second block is used to hold items placed into the queue. If a queue is - * created using xQueueCreate() then both blocks of memory are automatically - * dynamically allocated inside the xQueueCreate() function. (see - * http://www.freertos.org/a00111.html). If a queue is created using - * xQueueCreateStatic() then the application writer must provide the memory that - * will get used by the queue. xQueueCreateStatic() therefore allows a queue to - * be created without using any dynamic memory allocation. - * - * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html - * - * @param uxQueueLength The maximum number of items that the queue can contain. - * - * @param uxItemSize The number of bytes each item in the queue will require. - * Items are queued by copy, not by reference, so this is the number of bytes - * that will be copied for each posted item. Each item on the queue must be - * the same size. - * - * @param pucQueueStorageBuffer If uxItemSize is not zero then - * pucQueueStorageBuffer must point to a uint8_t array that is at least large - * enough to hold the maximum number of items that can be in the queue at any - * one time - which is ( uxQueueLength * uxItemsSize ) bytes. If uxItemSize is - * zero then pucQueueStorageBuffer can be NULL. - * - * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which - * will be used to hold the queue's data structure. - * - * @return If the queue is created then a handle to the created queue is - * returned. If pxQueueBuffer is NULL then NULL is returned. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- };
-
- #define QUEUE_LENGTH 10
- #define ITEM_SIZE sizeof( uint32_t )
-
- // xQueueBuffer will hold the queue structure.
- StaticQueue_t xQueueBuffer;
-
- // ucQueueStorage will hold the items posted to the queue.  Must be at least
- // [(queue length) * ( queue item size)] bytes long.
- uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
-							ITEM_SIZE	  // The size of each item in the queue
-							&( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
-							&xQueueBuffer ); // The buffer that will hold the queue structure.
-
-	// The queue is guaranteed to be created successfully as no dynamic memory
-	// allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueCreateStatic xQueueCreateStatic - * \ingroup QueueManagement - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * queue. h - * 
- BaseType_t xQueueSendToToFront(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the front of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT ) - -/** - * queue. h - * 
- BaseType_t xQueueSendToBack(
-								   QueueHandle_t	xQueue,
-								   const void		*pvItemToQueue,
-								   TickType_t		xTicksToWait
-							   );
- *
- * - * This is a macro that calls xQueueGenericSend(). - * - * Post an item to the back of a queue. The item is queued by copy, not by - * reference. This function must not be called from an interrupt service - * routine. See xQueueSendFromISR () for an alternative which may be used - * in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the queue - * is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueSend(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  TickType_t xTicksToWait
-						 );
- *
- * - * This is a macro that calls xQueueGenericSend(). It is included for - * backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToFront() and xQueueSendToBack() macros. It is - * equivalent to xQueueSendToBack(). - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueOverwrite(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue
-						 );
- *
- * - * Only for use with queues that have a length of one - so the queue is either - * empty or full. - * - * Post an item on a queue. If the queue is already full then overwrite the - * value held in the queue. The item is queued by copy, not by reference. - * - * This function must not be called from an interrupt service routine. - * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle of the queue to which the data is being sent. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and - * therefore has the same return values as xQueueSendToFront(). However, pdPASS - * is the only value that can be returned because xQueueOverwrite() will write - * to the queue even when the queue is already full. - * - * Example usage: - 
-
- void vFunction( void *pvParameters )
- {
- QueueHandle_t xQueue;
- uint32_t ulVarToSend, ulValReceived;
-
-	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwrite() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-
-	// Write the value 10 to the queue using xQueueOverwrite().
-	ulVarToSend = 10;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// Peeking the queue should now return 10, but leave the value 10 in
-	// the queue.  A block time of zero is used as it is known that the
-	// queue holds a value.
-	ulValReceived = 0;
-	xQueuePeek( xQueue, &ulValReceived, 0 );
-
-	if( ulValReceived != 10 )
-	{
-		// Error unless the item was removed by a different task.
-	}
-
-	// The queue is still full.  Use xQueueOverwrite() to overwrite the
-	// value held in the queue with 100.
-	ulVarToSend = 100;
-	xQueueOverwrite( xQueue, &ulVarToSend );
-
-	// This time read from the queue, leaving the queue empty once more.
-	// A block time of 0 is used again.
-	xQueueReceive( xQueue, &ulValReceived, 0 );
-
-	// The value read should be the last value written, even though the
-	// queue was already full when the value was written.
-	if( ulValReceived != 100 )
-	{
-		// Error!
-	}
-
-	// ...
-}
-
- * \defgroup xQueueOverwrite xQueueOverwrite - * \ingroup QueueManagement - */ -#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE ) - - -/** - * queue. h - * 
- BaseType_t xQueueGenericSend(
-									QueueHandle_t xQueue,
-									const void * pvItemToQueue,
-									TickType_t xTicksToWait
-									BaseType_t xCopyPosition
-								);
- *
- * - * It is preferred that the macros xQueueSend(), xQueueSendToFront() and - * xQueueSendToBack() are used in place of calling this function directly. - * - * Post an item on a queue. The item is queued by copy, not by reference. - * This function must not be called from an interrupt service routine. - * See xQueueSendFromISR () for an alternative which may be used in an ISR. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for space to become available on the queue, should it already - * be full. The call will return immediately if this is set to 0 and the - * queue is full. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- uint32_t ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- QueueHandle_t xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 uint32_t values.
-	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
-	// ...
-
-	if( xQueue1 != 0 )
-	{
-		// Send an uint32_t.  Wait for 10 ticks for space to become
-		// available if necessary.
-		if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
-		{
-			// Failed to post the message, even after 10 ticks.
-		}
-	}
-
-	if( xQueue2 != 0 )
-	{
-		// Send a pointer to a struct AMessage object.  Don't block if the
-		// queue is already full.
-		pxMessage = & xMessage;
-		xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueSend xQueueSend - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueuePeek(
-							 QueueHandle_t xQueue,
-							 void *pvBuffer,
-							 TickType_t xTicksToWait
-						 );
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue without removing the item from the queue. - * The item is received by copy so a buffer of adequate size must be - * provided. The number of bytes copied into the buffer was defined when - * the queue was created. - * - * Successfully received items remain on the queue so will be returned again - * by the next call, or a call to xQueueReceive(). - * - * This macro must not be used in an interrupt service routine. See - * xQueuePeekFromISR() for an alternative that can be called from an interrupt - * service routine. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue - * is empty. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to peek the data from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Peek a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask, but the item still remains on the queue.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueuePeek( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdTRUE ) - -/** - * queue. h - * 
- BaseType_t xQueuePeekFromISR(
-									QueueHandle_t xQueue,
-									void *pvBuffer,
-								);
- * - * A version of xQueuePeek() that can be called from an interrupt service - * routine (ISR). - * - * Receive an item from a queue without removing the item from the queue. - * The item is received by copy so a buffer of adequate size must be - * provided. The number of bytes copied into the buffer was defined when - * the queue was created. - * - * Successfully received items remain on the queue so will be returned again - * by the next call, or a call to xQueueReceive(). - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * \defgroup xQueuePeekFromISR xQueuePeekFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueReceive(
-								 QueueHandle_t xQueue,
-								 void *pvBuffer,
-								 TickType_t xTicksToWait
-							);
- * - * This is a macro that calls the xQueueGenericReceive() function. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * Successfully received items are removed from the queue. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. xQueueReceive() will return immediately if xTicksToWait - * is zero and the queue is empty. The time is defined in tick periods so the - * constant portTICK_PERIOD_MS should be used to convert to real time if this is - * required. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -#define xQueueReceive( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE ) - - -/** - * queue. h - * 
- BaseType_t xQueueGenericReceive(
-									   QueueHandle_t	xQueue,
-									   void	*pvBuffer,
-									   TickType_t	xTicksToWait
-									   BaseType_t	xJustPeek
-									);
- * - * It is preferred that the macro xQueueReceive() be used rather than calling - * this function directly. - * - * Receive an item from a queue. The item is received by copy so a buffer of - * adequate size must be provided. The number of bytes copied into the buffer - * was defined when the queue was created. - * - * This function must not be used in an interrupt service routine. See - * xQueueReceiveFromISR for an alternative that can. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param xTicksToWait The maximum amount of time the task should block - * waiting for an item to receive should the queue be empty at the time - * of the call. The time is defined in tick periods so the constant - * portTICK_PERIOD_MS should be used to convert to real time if this is required. - * xQueueGenericReceive() will return immediately if the queue is empty and - * xTicksToWait is 0. - * - * @param xJustPeek When set to true, the item received from the queue is not - * actually removed from the queue - meaning a subsequent call to - * xQueueReceive() will return the same item. When set to false, the item - * being received from the queue is also removed from the queue. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
- struct AMessage
- {
-	char ucMessageID;
-	char ucData[ 20 ];
- } xMessage;
-
- QueueHandle_t xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
-	// Create a queue capable of containing 10 pointers to AMessage structures.
-	// These should be passed by pointer as they contain a lot of data.
-	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Send a pointer to a struct AMessage object.  Don't block if the
-	// queue is already full.
-	pxMessage = & xMessage;
-	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
-
-	// ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
-	if( xQueue != 0 )
-	{
-		// Receive a message on the created queue.  Block for 10 ticks if a
-		// message is not immediately available.
-		if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
-		{
-			// pcRxedMessage now points to the struct AMessage variable posted
-			// by vATask.
-		}
-	}
-
-	// ... Rest of task code.
- }
-
- * \defgroup xQueueReceive xQueueReceive - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeek ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
- * - * Return the number of messages stored in a queue. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of messages available in the queue. - * - * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
- * - * Return the number of free spaces available in a queue. This is equal to the - * number of items that can be sent to the queue before the queue becomes full - * if no items are removed. - * - * @param xQueue A handle to the queue being queried. - * - * @return The number of spaces available in the queue. - * - * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting - * \ingroup QueueManagement - */ -UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
void vQueueDelete( QueueHandle_t xQueue );
- * - * Delete a queue - freeing all the memory allocated for storing of items - * placed on the queue. - * - * @param xQueue A handle to the queue to be deleted. - * - * \defgroup vQueueDelete vQueueDelete - * \ingroup QueueManagement - */ -void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueSendToFrontFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the front of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPrioritTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT ) - - -/** - * queue. h - * 
- BaseType_t xQueueSendToBackFromISR(
-										 QueueHandle_t xQueue,
-										 const void *pvItemToQueue,
-										 BaseType_t *pxHigherPriorityTaskWoken
-									  );
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). - * - * Post an item to the back of a queue. It is safe to use this macro from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		taskYIELD ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueOverwriteFromISR(
-							  QueueHandle_t xQueue,
-							  const void * pvItemToQueue,
-							  BaseType_t *pxHigherPriorityTaskWoken
-						 );
- *
- * - * A version of xQueueOverwrite() that can be used in an interrupt service - * routine (ISR). - * - * Only for use with queues that can hold a single item - so the queue is either - * empty or full. - * - * Post an item on a queue. If the queue is already full then overwrite the - * value held in the queue. The item is queued by copy, not by reference. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueOverwriteFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return xQueueOverwriteFromISR() is a macro that calls - * xQueueGenericSendFromISR(), and therefore has the same return values as - * xQueueSendToFrontFromISR(). However, pdPASS is the only value that can be - * returned because xQueueOverwriteFromISR() will write to the queue even when - * the queue is already full. - * - * Example usage: - 
-
- QueueHandle_t xQueue;
-
- void vFunction( void *pvParameters )
- {
- 	// Create a queue to hold one uint32_t value.  It is strongly
-	// recommended *not* to use xQueueOverwriteFromISR() on queues that can
-	// contain more than one value, and doing so will trigger an assertion
-	// if configASSERT() is defined.
-	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
-}
-
-void vAnInterruptHandler( void )
-{
-// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
-BaseType_t xHigherPriorityTaskWoken = pdFALSE;
-uint32_t ulVarToSend, ulValReceived;
-
-	// Write the value 10 to the queue using xQueueOverwriteFromISR().
-	ulVarToSend = 10;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// The queue is full, but calling xQueueOverwriteFromISR() again will still
-	// pass because the value held in the queue will be overwritten with the
-	// new value.
-	ulVarToSend = 100;
-	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
-
-	// Reading from the queue will now return 100.
-
-	// ...
-
-	if( xHigherPrioritytaskWoken == pdTRUE )
-	{
-		// Writing to the queue caused a task to unblock and the unblocked task
-		// has a priority higher than or equal to the priority of the currently
-		// executing task (the task this interrupt interrupted).  Perform a context
-		// switch so this interrupt returns directly to the unblocked task.
-		portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
-	}
-}
-
- * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR - * \ingroup QueueManagement - */ -#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE ) - -/** - * queue. h - * 
- BaseType_t xQueueSendFromISR(
-									 QueueHandle_t xQueue,
-									 const void *pvItemToQueue,
-									 BaseType_t *pxHigherPriorityTaskWoken
-								);
-
- * - * This is a macro that calls xQueueGenericSendFromISR(). It is included - * for backward compatibility with versions of FreeRTOS.org that did not - * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR() - * macros. - * - * Post an item to the back of a queue. It is safe to use this function from - * within an interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWoken;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWoken = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post the byte.
-		xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.
-	if( xHigherPriorityTaskWoken )
-	{
-		// Actual macro used here is port specific.
-		portYIELD_FROM_ISR ();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) - -/** - * queue. h - * 
- BaseType_t xQueueGenericSendFromISR(
-										   QueueHandle_t		xQueue,
-										   const	void	*pvItemToQueue,
-										   BaseType_t	*pxHigherPriorityTaskWoken,
-										   BaseType_t	xCopyPosition
-									   );
-
- * - * It is preferred that the macros xQueueSendFromISR(), - * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place - * of calling this function directly. xQueueGiveFromISR() is an - * equivalent for use by semaphores that don't actually copy any data. - * - * Post an item on a queue. It is safe to use this function from within an - * interrupt service routine. - * - * Items are queued by copy not reference so it is preferable to only - * queue small items, especially when called from an ISR. In most cases - * it would be preferable to store a pointer to the item being queued. - * - * @param xQueue The handle to the queue on which the item is to be posted. - * - * @param pvItemToQueue A pointer to the item that is to be placed on the - * queue. The size of the items the queue will hold was defined when the - * queue was created, so this many bytes will be copied from pvItemToQueue - * into the queue storage area. - * - * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the - * item at the back of the queue, or queueSEND_TO_FRONT to place the item - * at the front of the queue (for high priority messages). - * - * @return pdTRUE if the data was successfully sent to the queue, otherwise - * errQUEUE_FULL. - * - * Example usage for buffered IO (where the ISR can obtain more than one value - * per call): - 
- void vBufferISR( void )
- {
- char cIn;
- BaseType_t xHigherPriorityTaskWokenByPost;
-
-	// We have not woken a task at the start of the ISR.
-	xHigherPriorityTaskWokenByPost = pdFALSE;
-
-	// Loop until the buffer is empty.
-	do
-	{
-		// Obtain a byte from the buffer.
-		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
-		// Post each byte.
-		xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
-
-	} while( portINPUT_BYTE( BUFFER_COUNT ) );
-
-	// Now the buffer is empty we can switch context if necessary.  Note that the
-	// name of the yield function required is port specific.
-	if( xHigherPriorityTaskWokenByPost )
-	{
-		taskYIELD_YIELD_FROM_ISR();
-	}
- }
-
- * - * \defgroup xQueueSendFromISR xQueueSendFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; - -/** - * queue. h - * 
- BaseType_t xQueueReceiveFromISR(
-									   QueueHandle_t	xQueue,
-									   void	*pvBuffer,
-									   BaseType_t *pxTaskWoken
-								   );
- *
- * - * Receive an item from a queue. It is safe to use this function from within an - * interrupt service routine. - * - * @param xQueue The handle to the queue from which the item is to be - * received. - * - * @param pvBuffer Pointer to the buffer into which the received item will - * be copied. - * - * @param pxTaskWoken A task may be blocked waiting for space to become - * available on the queue. If xQueueReceiveFromISR causes such a task to - * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will - * remain unchanged. - * - * @return pdTRUE if an item was successfully received from the queue, - * otherwise pdFALSE. - * - * Example usage: - 
-
- QueueHandle_t xQueue;
-
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- char cValueToPost;
- const TickType_t xTicksToWait = ( TickType_t )0xff;
-
-	// Create a queue capable of containing 10 characters.
-	xQueue = xQueueCreate( 10, sizeof( char ) );
-	if( xQueue == 0 )
-	{
-		// Failed to create the queue.
-	}
-
-	// ...
-
-	// Post some characters that will be used within an ISR.  If the queue
-	// is full then this task will block for xTicksToWait ticks.
-	cValueToPost = 'a';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-	cValueToPost = 'b';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
-
-	// ... keep posting characters ... this task may block when the queue
-	// becomes full.
-
-	cValueToPost = 'c';
-	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
- }
-
- // ISR that outputs all the characters received on the queue.
- void vISR_Routine( void )
- {
- BaseType_t xTaskWokenByReceive = pdFALSE;
- char cRxedChar;
-
-	while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
-	{
-		// A character was received.  Output the character now.
-		vOutputCharacter( cRxedChar );
-
-		// If removing the character from the queue woke the task that was
-		// posting onto the queue cTaskWokenByReceive will have been set to
-		// pdTRUE.  No matter how many times this loop iterates only one
-		// task will be woken.
-	}
-
-	if( cTaskWokenByPost != ( char ) pdFALSE;
-	{
-		taskYIELD ();
-	}
- }
-
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR - * \ingroup QueueManagement - */ -BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; - -/* - * Utilities to query queues that are safe to use from an ISR. These utilities - * should be used only from witin an ISR, or within a critical section. - */ -BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - -/* - * The functions defined above are for passing data to and from tasks. The - * functions below are the equivalents for passing data to and from - * co-routines. - * - * These functions are called from the co-routine macro implementation and - * should not be called directly from application code. Instead use the macro - * wrappers defined within croutine.h. - */ -BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken ); -BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken ); -BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait ); -BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait ); - -/* - * For internal use only. Use xSemaphoreCreateMutex(), - * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling - * these functions directly. - */ -QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION; -QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; -void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; - -/* - * For internal use only. Use xSemaphoreTakeMutexRecursive() or - * xSemaphoreGiveMutexRecursive() instead of calling these functions directly. - */ -BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) PRIVILEGED_FUNCTION; - -/* - * Reset a queue back to its original empty state. The return value is now - * obsolete and is always set to pdPASS. - */ -#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE ) - -/* - * The registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add - * a queue, semaphore or mutex handle to the registry if you want the handle - * to be available to a kernel aware debugger. If you are not using a kernel - * aware debugger then this function can be ignored. - * - * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the - * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0 - * within FreeRTOSConfig.h for the registry to be available. Its value - * does not effect the number of queues, semaphores and mutexes that can be - * created - just the number that the registry can hold. - * - * @param xQueue The handle of the queue being added to the registry. This - * is the handle returned by a call to xQueueCreate(). Semaphore and mutex - * handles can also be passed in here. - * - * @param pcName The name to be associated with the handle. This is the - * name that the kernel aware debugger will display. The queue registry only - * stores a pointer to the string - so the string must be persistent (global or - * preferably in ROM/Flash), not on the stack. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/* - * The registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add - * a queue, semaphore or mutex handle to the registry if you want the handle - * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to - * remove the queue, semaphore or mutex from the register. If you are not using - * a kernel aware debugger then this function can be ignored. - * - * @param xQueue The handle of the queue being removed from the registry. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -#endif - -/* - * The queue registry is provided as a means for kernel aware debuggers to - * locate queues, semaphores and mutexes. Call pcQueueGetName() to look - * up and return the name of a queue in the queue registry from the queue's - * handle. - * - * @param xQueue The handle of the queue the name of which will be returned. - * @return If the queue is in the registry then a pointer to the name of the - * queue is returned. If the queue is not in the registry then NULL is - * returned. - */ -#if( configQUEUE_REGISTRY_SIZE > 0 ) - const char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/* - * Generic version of the function used to creaet a queue using dynamic memory - * allocation. This is called by other functions and macros that create other - * RTOS objects that use the queue structure as their base. - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -#endif - -/* - * Generic version of the function used to creaet a queue using dynamic memory - * allocation. This is called by other functions and macros that create other - * RTOS objects that use the queue structure as their base. - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; -#endif - -/* - * Queue sets provide a mechanism to allow a task to block (pend) on a read - * operation from multiple queues or semaphores simultaneously. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * A queue set must be explicitly created using a call to xQueueCreateSet() - * before it can be used. Once created, standard FreeRTOS queues and semaphores - * can be added to the set using calls to xQueueAddToSet(). - * xQueueSelectFromSet() is then used to determine which, if any, of the queues - * or semaphores contained in the set is in a state where a queue read or - * semaphore take operation would be successful. - * - * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html - * for reasons why queue sets are very rarely needed in practice as there are - * simpler methods of blocking on multiple objects. - * - * Note 2: Blocking on a queue set that contains a mutex will not cause the - * mutex holder to inherit the priority of the blocked task. - * - * Note 3: An additional 4 bytes of RAM is required for each space in a every - * queue added to a queue set. Therefore counting semaphores that have a high - * maximum count value should not be added to a queue set. - * - * Note 4: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param uxEventQueueLength Queue sets store events that occur on - * the queues and semaphores contained in the set. uxEventQueueLength specifies - * the maximum number of events that can be queued at once. To be absolutely - * certain that events are not lost uxEventQueueLength should be set to the - * total sum of the length of the queues added to the set, where binary - * semaphores and mutexes have a length of 1, and counting semaphores have a - * length set by their maximum count value. Examples: - * + If a queue set is to hold a queue of length 5, another queue of length 12, - * and a binary semaphore, then uxEventQueueLength should be set to - * (5 + 12 + 1), or 18. - * + If a queue set is to hold three binary semaphores then uxEventQueueLength - * should be set to (1 + 1 + 1 ), or 3. - * + If a queue set is to hold a counting semaphore that has a maximum count of - * 5, and a counting semaphore that has a maximum count of 3, then - * uxEventQueueLength should be set to (5 + 3), or 8. - * - * @return If the queue set is created successfully then a handle to the created - * queue set is returned. Otherwise NULL is returned. - */ -QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; - -/* - * Adds a queue or semaphore to a queue set that was previously created by a - * call to xQueueCreateSet(). - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * Note 1: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param xQueueOrSemaphore The handle of the queue or semaphore being added to - * the queue set (cast to an QueueSetMemberHandle_t type). - * - * @param xQueueSet The handle of the queue set to which the queue or semaphore - * is being added. - * - * @return If the queue or semaphore was successfully added to the queue set - * then pdPASS is returned. If the queue could not be successfully added to the - * queue set because it is already a member of a different queue set then pdFAIL - * is returned. - */ -BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* - * Removes a queue or semaphore from a queue set. A queue or semaphore can only - * be removed from a set if the queue or semaphore is empty. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * @param xQueueOrSemaphore The handle of the queue or semaphore being removed - * from the queue set (cast to an QueueSetMemberHandle_t type). - * - * @param xQueueSet The handle of the queue set in which the queue or semaphore - * is included. - * - * @return If the queue or semaphore was successfully removed from the queue set - * then pdPASS is returned. If the queue was not in the queue set, or the - * queue (or semaphore) was not empty, then pdFAIL is returned. - */ -BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* - * xQueueSelectFromSet() selects from the members of a queue set a queue or - * semaphore that either contains data (in the case of a queue) or is available - * to take (in the case of a semaphore). xQueueSelectFromSet() effectively - * allows a task to block (pend) on a read operation on all the queues and - * semaphores in a queue set simultaneously. - * - * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this - * function. - * - * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html - * for reasons why queue sets are very rarely needed in practice as there are - * simpler methods of blocking on multiple objects. - * - * Note 2: Blocking on a queue set that contains a mutex will not cause the - * mutex holder to inherit the priority of the blocked task. - * - * Note 3: A receive (in the case of a queue) or take (in the case of a - * semaphore) operation must not be performed on a member of a queue set unless - * a call to xQueueSelectFromSet() has first returned a handle to that set member. - * - * @param xQueueSet The queue set on which the task will (potentially) block. - * - * @param xTicksToWait The maximum time, in ticks, that the calling task will - * remain in the Blocked state (with other tasks executing) to wait for a member - * of the queue set to be ready for a successful queue read or semaphore take - * operation. - * - * @return xQueueSelectFromSet() will return the handle of a queue (cast to - * a QueueSetMemberHandle_t type) contained in the queue set that contains data, - * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained - * in the queue set that is available, or NULL if no such queue or semaphore - * exists before before the specified block time expires. - */ -QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/* - * A version of xQueueSelectFromSet() that can be used from an ISR. - */ -QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; - -/* Not public API functions. */ -void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; -BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION; -void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION; -UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; -uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; - - -#ifdef __cplusplus -} -#endif - -#endif /* QUEUE_H */ - diff --git a/ports/cc3200/FreeRTOS/Source/include/semphr.h b/ports/cc3200/FreeRTOS/Source/include/semphr.h deleted file mode 100644 index a674b02a41e11..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/semphr.h +++ /dev/null @@ -1,1171 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - -#ifndef SEMAPHORE_H -#define SEMAPHORE_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h" must appear in source files before "include semphr.h" -#endif - -#include "queue.h" - -typedef QueueHandle_t SemaphoreHandle_t; - -#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( uint8_t ) 1U ) -#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( uint8_t ) 0U ) -#define semGIVE_BLOCK_TIME ( ( TickType_t ) 0U ) - - -/** - * semphr. h - * 
vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )
- * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the - * xSemaphoreCreateBinary() function. Note that binary semaphores created using - * the vSemaphoreCreateBinary() macro are created in a state such that the - * first call to 'take' the semaphore would pass, whereas binary semaphores - * created using xSemaphoreCreateBinary() are created in a state such that the - * the semaphore must first be 'given' before it can be 'taken'. - * - * Macro that implements a semaphore by using the existing queue mechanism. - * The queue length is 1 as this is a binary semaphore. The data size is 0 - * as we don't want to actually store any data - we just want to know if the - * queue is empty or full. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
-    // This is a macro so pass the variable in directly.
-    vSemaphoreCreateBinary( xSemaphore );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define vSemaphoreCreateBinary( xSemaphore ) \ - { \ - ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \ - if( ( xSemaphore ) != NULL ) \ - { \ - ( void ) xSemaphoreGive( ( xSemaphore ) ); \ - } \ - } -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateBinary( void )
- * - * Creates a new binary semaphore instance, and returns a handle by which the - * new semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, binary semaphores use a block - * of memory, in which the semaphore structure is stored. If a binary semaphore - * is created using xSemaphoreCreateBinary() then the required memory is - * automatically dynamically allocated inside the xSemaphoreCreateBinary() - * function. (see http://www.freertos.org/a00111.html). If a binary semaphore - * is created using xSemaphoreCreateBinaryStatic() then the application writer - * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a - * binary semaphore to be created without using any dynamic memory allocation. - * - * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this - * xSemaphoreCreateBinary() function. Note that binary semaphores created using - * the vSemaphoreCreateBinary() macro are created in a state such that the - * first call to 'take' the semaphore would pass, whereas binary semaphores - * created using xSemaphoreCreateBinary() are created in a state such that the - * the semaphore must first be 'given' before it can be 'taken'. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @return Handle to the created semaphore, or NULL if the memory required to - * hold the semaphore's data structures could not be allocated. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )
- * - * Creates a new binary semaphore instance, and returns a handle by which the - * new semaphore can be referenced. - * - * NOTE: In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a binary semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, binary semaphores use a block - * of memory, in which the semaphore structure is stored. If a binary semaphore - * is created using xSemaphoreCreateBinary() then the required memory is - * automatically dynamically allocated inside the xSemaphoreCreateBinary() - * function. (see http://www.freertos.org/a00111.html). If a binary semaphore - * is created using xSemaphoreCreateBinaryStatic() then the application writer - * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a - * binary semaphore to be created without using any dynamic memory allocation. - * - * This type of semaphore can be used for pure synchronisation between tasks or - * between an interrupt and a task. The semaphore need not be given back once - * obtained, so one task/interrupt can continuously 'give' the semaphore while - * another continuously 'takes' the semaphore. For this reason this type of - * semaphore does not use a priority inheritance mechanism. For an alternative - * that does use priority inheritance see xSemaphoreCreateMutex(). - * - * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the semaphore's data structure, removing the - * need for the memory to be allocated dynamically. - * - * @return If the semaphore is created then a handle to the created semaphore is - * returned. If pxSemaphoreBuffer is NULL then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
-    // The semaphore's data structures will be placed in the xSemaphoreBuffer
-    // variable, the address of which is passed into the function.  The
-    // function's parameter is not NULL, so the function will not attempt any
-    // dynamic memory allocation, and therefore the function will not return
-    // return NULL.
-    xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
-
-    // Rest of task code goes here.
- }
-
- * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic - * \ingroup Semaphores - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
xSemaphoreTake(
- *                   SemaphoreHandle_t xSemaphore,
- *                   TickType_t xBlockTime
- *               )
- * - * Macro to obtain a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). - * - * @param xSemaphore A handle to the semaphore being taken - obtained when - * the semaphore was created. - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_PERIOD_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. A block - * time of portMAX_DELAY can be used to block indefinitely (provided - * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h). - * - * @return pdTRUE if the semaphore was obtained. pdFALSE - * if xBlockTime expired without the semaphore becoming available. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = xSemaphoreCreateBinary();
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xSemaphore != NULL )
-    {
-        // See if we can obtain the semaphore.  If the semaphore is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the semaphore and can now access the
-            // shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource.  Release the
-            // semaphore.
-            xSemaphoreGive( xSemaphore );
-        }
-        else
-        {
-            // We could not obtain the semaphore and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTake xSemaphoreTake - * \ingroup Semaphores - */ -#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( QueueHandle_t ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE ) - -/** - * semphr. h - * xSemaphoreTakeRecursive( - * SemaphoreHandle_t xMutex, - * TickType_t xBlockTime - * ) - * - * Macro to recursively obtain, or 'take', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being obtained. This is the - * handle returned by xSemaphoreCreateRecursiveMutex(); - * - * @param xBlockTime The time in ticks to wait for the semaphore to become - * available. The macro portTICK_PERIOD_MS can be used to convert this to a - * real time. A block time of zero can be used to poll the semaphore. If - * the task already owns the semaphore then xSemaphoreTakeRecursive() will - * return immediately no matter what the value of xBlockTime. - * - * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime - * expired without the semaphore becoming available. - * - * Example usage: - 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, but instead buried in a more complex
-			// call structure.  This is just for illustrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive - * \ingroup Semaphores - */ -#if( configUSE_RECURSIVE_MUTEXES == 1 ) - #define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) ) -#endif - -/** - * semphr. h - * 
xSemaphoreGive( SemaphoreHandle_t xSemaphore )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or - * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake(). - * - * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for - * an alternative which can be used from an ISR. - * - * This macro must also not be used on semaphores created using - * xSemaphoreCreateRecursiveMutex(). - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. - * Semaphores are implemented using queues. An error can occur if there is - * no space on the queue to post a message - indicating that the - * semaphore was not first obtained correctly. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
-    // Create the semaphore to guard a shared resource.
-    xSemaphore = vSemaphoreCreateBinary();
-
-    if( xSemaphore != NULL )
-    {
-        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-        {
-            // We would expect this call to fail because we cannot give
-            // a semaphore without first "taking" it!
-        }
-
-        // Obtain the semaphore - don't block if the semaphore is not
-        // immediately available.
-        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
-        {
-            // We now have the semaphore and can access the shared resource.
-
-            // ...
-
-            // We have finished accessing the shared resource so can free the
-            // semaphore.
-            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
-            {
-                // We would not expect this call to fail because we must have
-                // obtained the semaphore to get here.
-            }
-        }
-    }
- }
-
- * \defgroup xSemaphoreGive xSemaphoreGive - * \ingroup Semaphores - */ -#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) - -/** - * semphr. h - * 
xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )
- * - * Macro to recursively release, or 'give', a mutex type semaphore. - * The mutex must have previously been created using a call to - * xSemaphoreCreateRecursiveMutex(); - * - * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this - * macro to be available. - * - * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * @param xMutex A handle to the mutex being released, or 'given'. This is the - * handle returned by xSemaphoreCreateMutex(); - * - * @return pdTRUE if the semaphore was given. - * - * Example usage: - 
- SemaphoreHandle_t xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
-    // Create the mutex to guard a shared resource.
-    xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
-    // ... Do other things.
-
-    if( xMutex != NULL )
-    {
-        // See if we can obtain the mutex.  If the mutex is not available
-        // wait 10 ticks to see if it becomes free.
-        if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
-        {
-            // We were able to obtain the mutex and can now access the
-            // shared resource.
-
-            // ...
-            // For some reason due to the nature of the code further calls to
-			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
-			// code these would not be just sequential calls as this would make
-			// no sense.  Instead the calls are likely to be buried inside
-			// a more complex call structure.
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
-
-            // The mutex has now been 'taken' three times, so will not be
-			// available to another task until it has also been given back
-			// three times.  Again it is unlikely that real code would have
-			// these calls sequentially, it would be more likely that the calls
-			// to xSemaphoreGiveRecursive() would be called as a call stack
-			// unwound.  This is just for demonstrative purposes.
-            xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-			xSemaphoreGiveRecursive( xMutex );
-
-			// Now the mutex can be taken by other tasks.
-        }
-        else
-        {
-            // We could not obtain the mutex and can therefore not access
-            // the shared resource safely.
-        }
-    }
- }
-
- * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive - * \ingroup Semaphores - */ -#if( configUSE_RECURSIVE_MUTEXES == 1 ) - #define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( ( xMutex ) ) -#endif - -/** - * semphr. h - * 
- xSemaphoreGiveFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )
- * - * Macro to release a semaphore. The semaphore must have previously been - * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting(). - * - * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) - * must not be used with this macro. - * - * This macro can be used from an ISR. - * - * @param xSemaphore A handle to the semaphore being released. This is the - * handle returned when the semaphore was created. - * - * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL. - * - * Example usage: - 
- \#define LONG_TIME 0xffff
- \#define TICKS_TO_WAIT	10
- SemaphoreHandle_t xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
-    for( ;; )
-    {
-        // We want this task to run every 10 ticks of a timer.  The semaphore
-        // was created before this task was started.
-
-        // Block waiting for the semaphore to become available.
-        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
-        {
-            // It is time to execute.
-
-            // ...
-
-            // We have finished our task.  Return to the top of the loop where
-            // we will block on the semaphore until it is time to execute
-            // again.  Note when using the semaphore for synchronisation with an
-			// ISR in this manner there is no need to 'give' the semaphore back.
-        }
-    }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static uint8_t ucLocalTickCount = 0;
- static BaseType_t xHigherPriorityTaskWoken;
-
-    // A timer tick has occurred.
-
-    // ... Do other time functions.
-
-    // Is it time for vATask () to run?
-	xHigherPriorityTaskWoken = pdFALSE;
-    ucLocalTickCount++;
-    if( ucLocalTickCount >= TICKS_TO_WAIT )
-    {
-        // Unblock the task by releasing the semaphore.
-        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
-
-        // Reset the count so we release the semaphore again in 10 ticks time.
-        ucLocalTickCount = 0;
-    }
-
-    if( xHigherPriorityTaskWoken != pdFALSE )
-    {
-        // We can force a context switch here.  Context switching from an
-        // ISR uses port specific syntax.  Check the demo task for your port
-        // to find the syntax required.
-    }
- }
-
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR - * \ingroup Semaphores - */ -#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) ) - -/** - * semphr. h - * 
- xSemaphoreTakeFromISR(
-                          SemaphoreHandle_t xSemaphore,
-                          BaseType_t *pxHigherPriorityTaskWoken
-                      )
- * - * Macro to take a semaphore from an ISR. The semaphore must have - * previously been created with a call to xSemaphoreCreateBinary() or - * xSemaphoreCreateCounting(). - * - * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) - * must not be used with this macro. - * - * This macro can be used from an ISR, however taking a semaphore from an ISR - * is not a common operation. It is likely to only be useful when taking a - * counting semaphore when an interrupt is obtaining an object from a resource - * pool (when the semaphore count indicates the number of resources available). - * - * @param xSemaphore A handle to the semaphore being taken. This is the - * handle returned when the semaphore was created. - * - * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task - * to unblock, and the unblocked task has a priority higher than the currently - * running task. If xSemaphoreTakeFromISR() sets this value to pdTRUE then - * a context switch should be requested before the interrupt is exited. - * - * @return pdTRUE if the semaphore was successfully taken, otherwise - * pdFALSE - */ -#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) ) - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateMutex( void )
- * - * Creates a new mutex type semaphore instance, and returns a handle by which - * the new mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, mutex semaphores use a block - * of memory, in which the mutex structure is stored. If a mutex is created - * using xSemaphoreCreateMutex() then the required memory is automatically - * dynamically allocated inside the xSemaphoreCreateMutex() function. (see - * http://www.freertos.org/a00111.html). If a mutex is created using - * xSemaphoreCreateMutexStatic() then the application writer must provided the - * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created - * without using any dynamic memory allocation. - * - * Mutexes created using this function can be accessed using the xSemaphoreTake() - * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and - * xSemaphoreGiveRecursive() macros must not be used. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return If the mutex was successfully created then a handle to the created - * semaphore is returned. If there was not enough heap to allocate the mutex - * data structures then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )
- * - * Creates a new mutex type semaphore instance, and returns a handle by which - * the new mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, mutex semaphores use a block - * of memory, in which the mutex structure is stored. If a mutex is created - * using xSemaphoreCreateMutex() then the required memory is automatically - * dynamically allocated inside the xSemaphoreCreateMutex() function. (see - * http://www.freertos.org/a00111.html). If a mutex is created using - * xSemaphoreCreateMutexStatic() then the application writer must provided the - * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created - * without using any dynamic memory allocation. - * - * Mutexes created using this function can be accessed using the xSemaphoreTake() - * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and - * xSemaphoreGiveRecursive() macros must not be used. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, - * which will be used to hold the mutex's data structure, removing the need for - * the memory to be allocated dynamically. - * - * @return If the mutex was successfully created then a handle to the created - * mutex is returned. If pxMutexBuffer was NULL then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A mutex cannot be used before it has been created.  xMutexBuffer is
-    // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
-    // attempted.
-    xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
-
- * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic - * \ingroup Semaphores - */ - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )
- * - * Creates a new recursive mutex type semaphore instance, and returns a handle - * by which the new recursive mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, recursive mutexs use a block - * of memory, in which the mutex structure is stored. If a recursive mutex is - * created using xSemaphoreCreateRecursiveMutex() then the required memory is - * automatically dynamically allocated inside the - * xSemaphoreCreateRecursiveMutex() function. (see - * http://www.freertos.org/a00111.html). If a recursive mutex is created using - * xSemaphoreCreateRecursiveMutexStatic() then the application writer must - * provide the memory that will get used by the mutex. - * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to - * be created without using any dynamic memory allocation. - * - * Mutexes created using this macro can be accessed using the - * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The - * xSemaphoreTake() and xSemaphoreGive() macros must not be used. - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @return xSemaphore Handle to the created mutex semaphore. Should be of type - * SemaphoreHandle_t. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
-    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
-    // This is a macro so pass the variable in directly.
-    xSemaphore = xSemaphoreCreateRecursiveMutex();
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex - * \ingroup Semaphores - */ -#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) - #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )
- * - * Creates a new recursive mutex type semaphore instance, and returns a handle - * by which the new recursive mutex can be referenced. - * - * Internally, within the FreeRTOS implementation, recursive mutexs use a block - * of memory, in which the mutex structure is stored. If a recursive mutex is - * created using xSemaphoreCreateRecursiveMutex() then the required memory is - * automatically dynamically allocated inside the - * xSemaphoreCreateRecursiveMutex() function. (see - * http://www.freertos.org/a00111.html). If a recursive mutex is created using - * xSemaphoreCreateRecursiveMutexStatic() then the application writer must - * provide the memory that will get used by the mutex. - * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to - * be created without using any dynamic memory allocation. - * - * Mutexes created using this macro can be accessed using the - * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The - * xSemaphoreTake() and xSemaphoreGive() macros must not be used. - * - * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex - * doesn't become available again until the owner has called - * xSemaphoreGiveRecursive() for each successful 'take' request. For example, - * if a task successfully 'takes' the same mutex 5 times then the mutex will - * not be available to any other task until it has also 'given' the mutex back - * exactly five times. - * - * This type of semaphore uses a priority inheritance mechanism so a task - * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the - * semaphore it is no longer required. - * - * Mutex type semaphores cannot be used from within interrupt service routines. - * - * See xSemaphoreCreateBinary() for an alternative implementation that can be - * used for pure synchronisation (where one task or interrupt always 'gives' the - * semaphore and another always 'takes' the semaphore) and from within interrupt - * service routines. - * - * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the recursive mutex's data structure, - * removing the need for the memory to be allocated dynamically. - * - * @return If the recursive mutex was successfully created then a handle to the - * created recursive mutex is returned. If pxMutexBuffer was NULL then NULL is - * returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xMutexBuffer;
-
- void vATask( void * pvParameters )
- {
-    // A recursive semaphore cannot be used before it is created.  Here a
-    // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
-    // The address of xMutexBuffer is passed into the function, and will hold
-    // the mutexes data structures - so no dynamic memory allocation will be
-    // attempted.
-    xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
-
-    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
-    // so there is no need to check it.
- }
-
- * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic - * \ingroup Semaphores - */ -#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) - #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )
- * - * Creates a new counting semaphore instance, and returns a handle by which the - * new counting semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a counting semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, counting semaphores use a - * block of memory, in which the counting semaphore structure is stored. If a - * counting semaphore is created using xSemaphoreCreateCounting() then the - * required memory is automatically dynamically allocated inside the - * xSemaphoreCreateCounting() function. (see - * http://www.freertos.org/a00111.html). If a counting semaphore is created - * using xSemaphoreCreateCountingStatic() then the application writer can - * instead optionally provide the memory that will get used by the counting - * semaphore. xSemaphoreCreateCountingStatic() therefore allows a counting - * semaphore to be created without using any dynamic memory allocation. - * - * Counting semaphores are typically used for two things: - * - * 1) Counting events. - * - * In this usage scenario an event handler will 'give' a semaphore each time - * an event occurs (incrementing the semaphore count value), and a handler - * task will 'take' a semaphore each time it processes an event - * (decrementing the semaphore count value). The count value is therefore - * the difference between the number of events that have occurred and the - * number that have been processed. In this case it is desirable for the - * initial count value to be zero. - * - * 2) Resource management. - * - * In this usage scenario the count value indicates the number of resources - * available. To obtain control of a resource a task must first obtain a - * semaphore - decrementing the semaphore count value. When the count value - * reaches zero there are no free resources. When a task finishes with the - * resource it 'gives' the semaphore back - incrementing the semaphore count - * value. In this case it is desirable for the initial count value to be - * equal to the maximum count value, indicating that all resources are free. - * - * @param uxMaxCount The maximum count value that can be reached. When the - * semaphore reaches this value it can no longer be 'given'. - * - * @param uxInitialCount The count value assigned to the semaphore when it is - * created. - * - * @return Handle to the created semaphore. Null if the semaphore could not be - * created. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
-    // The max value to which the semaphore can count should be 10, and the
-    // initial value assigned to the count should be 0.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0 );
-
-    if( xSemaphore != NULL )
-    {
-        // The semaphore was created successfully.
-        // The semaphore can now be used.
-    }
- }
-
- * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting - * \ingroup Semaphores - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) ) -#endif - -/** - * semphr. h - * 
SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )
- * - * Creates a new counting semaphore instance, and returns a handle by which the - * new counting semaphore can be referenced. - * - * In many usage scenarios it is faster and more memory efficient to use a - * direct to task notification in place of a counting semaphore! - * http://www.freertos.org/RTOS-task-notifications.html - * - * Internally, within the FreeRTOS implementation, counting semaphores use a - * block of memory, in which the counting semaphore structure is stored. If a - * counting semaphore is created using xSemaphoreCreateCounting() then the - * required memory is automatically dynamically allocated inside the - * xSemaphoreCreateCounting() function. (see - * http://www.freertos.org/a00111.html). If a counting semaphore is created - * using xSemaphoreCreateCountingStatic() then the application writer must - * provide the memory. xSemaphoreCreateCountingStatic() therefore allows a - * counting semaphore to be created without using any dynamic memory allocation. - * - * Counting semaphores are typically used for two things: - * - * 1) Counting events. - * - * In this usage scenario an event handler will 'give' a semaphore each time - * an event occurs (incrementing the semaphore count value), and a handler - * task will 'take' a semaphore each time it processes an event - * (decrementing the semaphore count value). The count value is therefore - * the difference between the number of events that have occurred and the - * number that have been processed. In this case it is desirable for the - * initial count value to be zero. - * - * 2) Resource management. - * - * In this usage scenario the count value indicates the number of resources - * available. To obtain control of a resource a task must first obtain a - * semaphore - decrementing the semaphore count value. When the count value - * reaches zero there are no free resources. When a task finishes with the - * resource it 'gives' the semaphore back - incrementing the semaphore count - * value. In this case it is desirable for the initial count value to be - * equal to the maximum count value, indicating that all resources are free. - * - * @param uxMaxCount The maximum count value that can be reached. When the - * semaphore reaches this value it can no longer be 'given'. - * - * @param uxInitialCount The count value assigned to the semaphore when it is - * created. - * - * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, - * which will then be used to hold the semaphore's data structure, removing the - * need for the memory to be allocated dynamically. - * - * @return If the counting semaphore was successfully created then a handle to - * the created counting semaphore is returned. If pxSemaphoreBuffer was NULL - * then NULL is returned. - * - * Example usage: - 
- SemaphoreHandle_t xSemaphore;
- StaticSemaphore_t xSemaphoreBuffer;
-
- void vATask( void * pvParameters )
- {
- SemaphoreHandle_t xSemaphore = NULL;
-
-    // Counting semaphore cannot be used before they have been created.  Create
-    // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
-    // value to which the semaphore can count is 10, and the initial value
-    // assigned to the count will be 0.  The address of xSemaphoreBuffer is
-    // passed in and will be used to hold the semaphore structure, so no dynamic
-    // memory allocation will be used.
-    xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
-
-    // No memory allocation was attempted so xSemaphore cannot be NULL, so there
-    // is no need to check its value.
- }
-
- * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic - * \ingroup Semaphores - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) ) -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * semphr. h - * 
void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
- * - * Delete a semaphore. This function must be used with care. For example, - * do not delete a mutex type semaphore if the mutex is held by a task. - * - * @param xSemaphore A handle to the semaphore to be deleted. - * - * \defgroup vSemaphoreDelete vSemaphoreDelete - * \ingroup Semaphores - */ -#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) ) - -/** - * semphr.h - * 
TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
- * - * If xMutex is indeed a mutex type semaphore, return the current mutex holder. - * If xMutex is not a mutex type semaphore, or the mutex is available (not held - * by a task), return NULL. - * - * Note: This is a good way of determining if the calling task is the mutex - * holder, but not a good way of determining the identity of the mutex holder as - * the holder may change between the function exiting and the returned value - * being tested. - */ -#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) ) - -/** - * semphr.h - * 
UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
- * - * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns - * its current count value. If the semaphore is a binary semaphore then - * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the - * semaphore is not available. - * - */ -#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) ) - -#endif /* SEMAPHORE_H */ - - diff --git a/ports/cc3200/FreeRTOS/Source/include/task.h b/ports/cc3200/FreeRTOS/Source/include/task.h deleted file mode 100644 index d0643c09e808c..0000000000000 --- a/ports/cc3200/FreeRTOS/Source/include/task.h +++ /dev/null @@ -1,2267 +0,0 @@ -/* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ - - -#ifndef INC_TASK_H -#define INC_TASK_H - -#ifndef INC_FREERTOS_H - #error "include FreeRTOS.h must appear in source files before include task.h" -#endif - -#include "list.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * MACROS AND DEFINITIONS - *----------------------------------------------------------*/ - -#define tskKERNEL_VERSION_NUMBER "V9.0.0" -#define tskKERNEL_VERSION_MAJOR 9 -#define tskKERNEL_VERSION_MINOR 0 -#define tskKERNEL_VERSION_BUILD 0 - -/** - * task. h - * - * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an TaskHandle_t variable that can then - * be used as a parameter to vTaskDelete to delete the task. - * - * \defgroup TaskHandle_t TaskHandle_t - * \ingroup Tasks - */ -typedef void * TaskHandle_t; - -/* - * Defines the prototype to which the application task hook function must - * conform. - */ -typedef BaseType_t (*TaskHookFunction_t)( void * ); - -/* Task states returned by eTaskGetState. */ -typedef enum -{ - eRunning = 0, /* A task is querying the state of itself, so must be running. */ - eReady, /* The task being queried is in a read or pending ready list. */ - eBlocked, /* The task being queried is in the Blocked state. */ - eSuspended, /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */ - eDeleted, /* The task being queried has been deleted, but its TCB has not yet been freed. */ - eInvalid /* Used as an 'invalid state' value. */ -} eTaskState; - -/* Actions that can be performed when vTaskNotify() is called. */ -typedef enum -{ - eNoAction = 0, /* Notify the task without updating its notify value. */ - eSetBits, /* Set bits in the task's notification value. */ - eIncrement, /* Increment the task's notification value. */ - eSetValueWithOverwrite, /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */ - eSetValueWithoutOverwrite /* Set the task's notification value if the previous value has been read by the task. */ -} eNotifyAction; - -/* - * Used internally only. - */ -typedef struct xTIME_OUT -{ - BaseType_t xOverflowCount; - TickType_t xTimeOnEntering; -} TimeOut_t; - -/* - * Defines the memory ranges allocated to the task when an MPU is used. - */ -typedef struct xMEMORY_REGION -{ - void *pvBaseAddress; - uint32_t ulLengthInBytes; - uint32_t ulParameters; -} MemoryRegion_t; - -/* - * Parameters required to create an MPU protected task. - */ -typedef struct xTASK_PARAMETERS -{ - TaskFunction_t pvTaskCode; - const char * const pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - uint16_t usStackDepth; - void *pvParameters; - UBaseType_t uxPriority; - StackType_t *puxStackBuffer; - MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ]; -} TaskParameters_t; - -/* Used with the uxTaskGetSystemState() function to return the state of each task -in the system. */ -typedef struct xTASK_STATUS -{ - TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */ - const char *pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - UBaseType_t xTaskNumber; /* A number unique to the task. */ - eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */ - UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */ - UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */ - uint32_t ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */ - StackType_t *pxStackBase; /* Points to the lowest address of the task's stack area. */ - uint16_t usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */ -} TaskStatus_t; - -/* Possible return values for eTaskConfirmSleepModeStatus(). */ -typedef enum -{ - eAbortSleep = 0, /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */ - eStandardSleep, /* Enter a sleep mode that will not last any longer than the expected idle time. */ - eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */ -} eSleepModeStatus; - -/** - * Defines the priority used by the idle task. This must not be modified. - * - * \ingroup TaskUtils - */ -#define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U ) - -/** - * task. h - * - * Macro for forcing a context switch. - * - * \defgroup taskYIELD taskYIELD - * \ingroup SchedulerControl - */ -#define taskYIELD() portYIELD() - -/** - * task. h - * - * Macro to mark the start of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL - * \ingroup SchedulerControl - */ -#define taskENTER_CRITICAL() portENTER_CRITICAL() -#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() - -/** - * task. h - * - * Macro to mark the end of a critical code region. Preemptive context - * switches cannot occur when in a critical region. - * - * NOTE: This may alter the stack (depending on the portable implementation) - * so must be used with care! - * - * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL - * \ingroup SchedulerControl - */ -#define taskEXIT_CRITICAL() portEXIT_CRITICAL() -#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) -/** - * task. h - * - * Macro to disable all maskable interrupts. - * - * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() - -/** - * task. h - * - * Macro to enable microcontroller interrupts. - * - * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS - * \ingroup SchedulerControl - */ -#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() - -/* Definitions returned by xTaskGetSchedulerState(). taskSCHEDULER_SUSPENDED is -0 to generate more optimal code when configASSERT() is defined as the constant -is used in assert() statements. */ -#define taskSCHEDULER_SUSPENDED ( ( BaseType_t ) 0 ) -#define taskSCHEDULER_NOT_STARTED ( ( BaseType_t ) 1 ) -#define taskSCHEDULER_RUNNING ( ( BaseType_t ) 2 ) - - -/*----------------------------------------------------------- - * TASK CREATION API - *----------------------------------------------------------*/ - -/** - * task. h - *
- BaseType_t xTaskCreate(
-							  TaskFunction_t pvTaskCode,
-							  const char * const pcName,
-							  uint16_t usStackDepth,
-							  void *pvParameters,
-							  UBaseType_t uxPriority,
-							  TaskHandle_t *pvCreatedTask
-						  );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * Internally, within the FreeRTOS implementation, tasks use two blocks of - * memory. The first block is used to hold the task's data structures. The - * second block is used by the task as its stack. If a task is created using - * xTaskCreate() then both blocks of memory are automatically dynamically - * allocated inside the xTaskCreate() function. (see - * http://www.freertos.org/a00111.html). If a task is created using - * xTaskCreateStatic() then the application writer must provide the required - * memory. xTaskCreateStatic() therefore allows a task to be created without - * using any dynamic memory allocation. - * - * See xTaskCreateStatic() for a version that does not use any dynamic memory - * allocation. - * - * xTaskCreate() can only be used to create a task that has unrestricted - * access to the entire microcontroller memory map. Systems that include MPU - * support can alternatively create an MPU constrained task using - * xTaskCreateRestricted(). - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. Max length defined by configMAX_TASK_NAME_LEN - default - * is 16. - * - * @param usStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task should run. Systems that - * include MPU support can optionally create tasks in a privileged (system) - * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For - * example, to create a privileged task at priority 2 the uxPriority parameter - * should be set to ( 2 | portPRIVILEGE_BIT ). - * - * @param pvCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file projdefs.h - * - * Example usage: - 
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-	 }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- static uint8_t ucParameterToPass;
- TaskHandle_t xHandle = NULL;
-
-	 // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
-	 // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
-	 // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
-	 // the new task attempts to access it.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-     configASSERT( xHandle );
-
-	 // Use the handle to delete the task.
-     if( xHandle != NULL )
-     {
-	     vTaskDelete( xHandle );
-     }
- }
-
- * \defgroup xTaskCreate xTaskCreate - * \ingroup Tasks - */ -#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, - const char * const pcName, - const uint16_t usStackDepth, - void * const pvParameters, - UBaseType_t uxPriority, - TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif - -/** - * task. h - *
- TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
-								 const char * const pcName,
-								 uint32_t ulStackDepth,
-								 void *pvParameters,
-								 UBaseType_t uxPriority,
-								 StackType_t *pxStackBuffer,
-								 StaticTask_t *pxTaskBuffer );
- * - * Create a new task and add it to the list of tasks that are ready to run. - * - * Internally, within the FreeRTOS implementation, tasks use two blocks of - * memory. The first block is used to hold the task's data structures. The - * second block is used by the task as its stack. If a task is created using - * xTaskCreate() then both blocks of memory are automatically dynamically - * allocated inside the xTaskCreate() function. (see - * http://www.freertos.org/a00111.html). If a task is created using - * xTaskCreateStatic() then the application writer must provide the required - * memory. xTaskCreateStatic() therefore allows a task to be created without - * using any dynamic memory allocation. - * - * @param pvTaskCode Pointer to the task entry function. Tasks - * must be implemented to never return (i.e. continuous loop). - * - * @param pcName A descriptive name for the task. This is mainly used to - * facilitate debugging. The maximum length of the string is defined by - * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h. - * - * @param ulStackDepth The size of the task stack specified as the number of - * variables the stack can hold - not the number of bytes. For example, if - * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes - * will be allocated for stack storage. - * - * @param pvParameters Pointer that will be used as the parameter for the task - * being created. - * - * @param uxPriority The priority at which the task will run. - * - * @param pxStackBuffer Must point to a StackType_t array that has at least - * ulStackDepth indexes - the array will then be used as the task's stack, - * removing the need for the stack to be allocated dynamically. - * - * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will - * then be used to hold the task's data structures, removing the need for the - * memory to be allocated dynamically. - * - * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will - * be created and pdPASS is returned. If either pxStackBuffer or pxTaskBuffer - * are NULL then the task will not be created and - * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned. - * - * Example usage: - 
-
-    // Dimensions the buffer that the task being created will use as its stack.
-    // NOTE:  This is the number of words the stack will hold, not the number of
-    // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
-    // then 400 bytes (100 * 32-bits) will be allocated.
-    #define STACK_SIZE 200
-
-    // Structure that will hold the TCB of the task being created.
-    StaticTask_t xTaskBuffer;
-
-    // Buffer that the task being created will use as its stack.  Note this is
-    // an array of StackType_t variables.  The size of StackType_t is dependent on
-    // the RTOS port.
-    StackType_t xStack[ STACK_SIZE ];
-
-    // Function that implements the task being created.
-    void vTaskCode( void * pvParameters )
-    {
-        // The parameter value is expected to be 1 as 1 is passed in the
-        // pvParameters value in the call to xTaskCreateStatic().
-        configASSERT( ( uint32_t ) pvParameters == 1UL );
-
-        for( ;; )
-        {
-            // Task code goes here.
-        }
-    }
-
-    // Function that creates a task.
-    void vOtherFunction( void )
-    {
-        TaskHandle_t xHandle = NULL;
-
-        // Create the task without using any dynamic memory allocation.
-        xHandle = xTaskCreateStatic(
-                      vTaskCode,       // Function that implements the task.
-                      "NAME",          // Text name for the task.
-                      STACK_SIZE,      // Stack size in words, not bytes.
-                      ( void * ) 1,    // Parameter passed into the task.
-                      tskIDLE_PRIORITY,// Priority at which the task is created.
-                      xStack,          // Array to use as the task's stack.
-                      &xTaskBuffer );  // Variable to hold the task's data structure.
-
-        // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
-        // been created, and xHandle will be the task's handle.  Use the handle
-        // to suspend the task.
-        vTaskSuspend( xHandle );
-    }
-
- * \defgroup xTaskCreateStatic xTaskCreateStatic - * \ingroup Tasks - */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode, - const char * const pcName, - const uint32_t ulStackDepth, - void * const pvParameters, - UBaseType_t uxPriority, - StackType_t * const puxStackBuffer, - StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ -#endif /* configSUPPORT_STATIC_ALLOCATION */ - -/** - * task. h - *
- BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
- * - * xTaskCreateRestricted() should only be used in systems that include an MPU - * implementation. - * - * Create a new task and add it to the list of tasks that are ready to run. - * The function parameters define the memory regions and associated access - * permissions allocated to the task. - * - * @param pxTaskDefinition Pointer to a structure that contains a member - * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API - * documentation) plus an optional stack buffer and the memory region - * definitions. - * - * @param pxCreatedTask Used to pass back a handle by which the created task - * can be referenced. - * - * @return pdPASS if the task was successfully created and added to a ready - * list, otherwise an error code defined in the file projdefs.h - * - * Example usage: - 
-// Create an TaskParameters_t structure that defines the task to be created.
-static const TaskParameters_t xCheckTaskParameters =
-{
-	vATask,		// pvTaskCode - the function that implements the task.
-	"ATask",	// pcName - just a text name for the task to assist debugging.
-	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
-	NULL,		// pvParameters - passed into the task function as the function parameters.
-	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
-	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
-	// xRegions - Allocate up to three separate memory regions for access by
-	// the task, with appropriate access permissions.  Different processors have
-	// different memory alignment requirements - refer to the FreeRTOS documentation
-	// for full information.
-	{
-		// Base address					Length	Parameters
-        { cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
-        { cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
-        { cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
-	}
-};
-
-int main( void )
-{
-TaskHandle_t xHandle;
-
-	// Create a task from the const structure defined above.  The task handle
-	// is requested (the second parameter is not NULL) but in this case just for
-	// demonstration purposes as its not actually used.
-	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
-	// Start the scheduler.
-	vTaskStartScheduler();
-
-	// Will only get here if there was insufficient memory to create the idle
-	// and/or timer task.
-	for( ;; );
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -#if( portUSING_MPU_WRAPPERS == 1 ) - BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION; -#endif - -/** - * task. h - *
- void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
- * - * Memory regions are assigned to a restricted task when the task is created by - * a call to xTaskCreateRestricted(). These regions can be redefined using - * vTaskAllocateMPURegions(). - * - * @param xTask The handle of the task being updated. - * - * @param xRegions A pointer to an MemoryRegion_t structure that contains the - * new memory region definitions. - * - * Example usage: - 
-// Define an array of MemoryRegion_t structures that configures an MPU region
-// allowing read/write access for 1024 bytes starting at the beginning of the
-// ucOneKByte array.  The other two of the maximum 3 definable regions are
-// unused so set to zero.
-static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
-{
-	// Base address		Length		Parameters
-	{ ucOneKByte,		1024,		portMPU_REGION_READ_WRITE },
-	{ 0,				0,			0 },
-	{ 0,				0,			0 }
-};
-
-void vATask( void *pvParameters )
-{
-	// This task was created such that it has access to certain regions of
-	// memory as defined by the MPU configuration.  At some point it is
-	// desired that these MPU regions are replaced with that defined in the
-	// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
-	// for this purpose.  NULL is used as the task handle to indicate that this
-	// function should modify the MPU regions of the calling task.
-	vTaskAllocateMPURegions( NULL, xAltRegions );
-
-	// Now the task can continue its function, but from this point on can only
-	// access its stack and the ucOneKByte array (unless any other statically
-	// defined or shared regions have been declared elsewhere).
-}
-
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted - * \ingroup Tasks - */ -void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelete( TaskHandle_t xTask );
- * - * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Remove a task from the RTOS real time kernel's management. The task being - * deleted will be removed from all ready, blocked, suspended and event lists. - * - * NOTE: The idle task is responsible for freeing the kernel allocated - * memory from tasks that have been deleted. It is therefore important that - * the idle task is not starved of microcontroller processing time if your - * application makes any calls to vTaskDelete (). Memory allocated by the - * task code is not automatically freed, and should be freed before the task - * is deleted. - * - * See the demo application file death.c for sample code that utilises - * vTaskDelete (). - * - * @param xTask The handle of the task to be deleted. Passing NULL will - * cause the calling task to be deleted. - * - * Example usage: - 
- void vOtherFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create the task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // Use the handle to delete the task.
-	 vTaskDelete( xHandle );
- }
-
- * \defgroup vTaskDelete vTaskDelete - * \ingroup Tasks - */ -void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * TASK CONTROL API - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskDelay( const TickType_t xTicksToDelay );
- * - * Delay a task for a given number of ticks. The actual time that the - * task remains blocked depends on the tick rate. The constant - * portTICK_PERIOD_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * - * vTaskDelay() specifies a time at which the task wishes to unblock relative to - * the time at which vTaskDelay() is called. For example, specifying a block - * period of 100 ticks will cause the task to unblock 100 ticks after - * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method - * of controlling the frequency of a periodic task as the path taken through the - * code, as well as other task and interrupt activity, will effect the frequency - * at which vTaskDelay() gets called and therefore the time at which the task - * next executes. See vTaskDelayUntil() for an alternative API function designed - * to facilitate fixed frequency execution. It does this by specifying an - * absolute time (rather than a relative time) at which the calling task should - * unblock. - * - * @param xTicksToDelay The amount of time, in tick periods, that - * the calling task should block. - * - * Example usage: - - void vTaskFunction( void * pvParameters ) - { - // Block for 500ms. - const TickType_t xDelay = 500 / portTICK_PERIOD_MS; - - for( ;; ) - { - // Simply toggle the LED every 500ms, blocking between each toggle. - vToggleLED(); - vTaskDelay( xDelay ); - } - } - - * \defgroup vTaskDelay vTaskDelay - * \ingroup TaskCtrl - */ -void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
- * - * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Delay a task until a specified time. This function can be used by periodic - * tasks to ensure a constant execution frequency. - * - * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will - * cause a task to block for the specified number of ticks from the time vTaskDelay () is - * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed - * execution frequency as the time between a task starting to execute and that task - * calling vTaskDelay () may not be fixed [the task may take a different path though the - * code between calls, or may get interrupted or preempted a different number of times - * each time it executes]. - * - * Whereas vTaskDelay () specifies a wake time relative to the time at which the function - * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to - * unblock. - * - * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick - * rate - with the resolution of one tick period. - * - * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the - * task was last unblocked. The variable must be initialised with the current time - * prior to its first use (see the example below). Following this the variable is - * automatically updated within vTaskDelayUntil (). - * - * @param xTimeIncrement The cycle time period. The task will be unblocked at - * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the - * same xTimeIncrement parameter value will cause the task to execute with - * a fixed interface period. - * - * Example usage: - 
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- TickType_t xLastWakeTime;
- const TickType_t xFrequency = 10;
-
-	 // Initialise the xLastWakeTime variable with the current time.
-	 xLastWakeTime = xTaskGetTickCount ();
-	 for( ;; )
-	 {
-		 // Wait for the next cycle.
-		 vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
-		 // Perform action here.
-	 }
- }
-
- * \defgroup vTaskDelayUntil vTaskDelayUntil - * \ingroup TaskCtrl - */ -void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
- * - * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this - * function to be available. - * - * A task will enter the Blocked state when it is waiting for an event. The - * event it is waiting for can be a temporal event (waiting for a time), such - * as when vTaskDelay() is called, or an event on an object, such as when - * xQueueReceive() or ulTaskNotifyTake() is called. If the handle of a task - * that is in the Blocked state is used in a call to xTaskAbortDelay() then the - * task will leave the Blocked state, and return from whichever function call - * placed the task into the Blocked state. - * - * @param xTask The handle of the task to remove from the Blocked state. - * - * @return If the task referenced by xTask was not in the Blocked state then - * pdFAIL is returned. Otherwise pdPASS is returned. - * - * \defgroup xTaskAbortDelay xTaskAbortDelay - * \ingroup TaskCtrl - */ -BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask );
- * - * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the priority of any task. - * - * @param xTask Handle of the task to be queried. Passing a NULL - * handle results in the priority of the calling task being returned. - * - * @return The priority of xTask. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to obtain the priority of the created task.
-	 // It was created with tskIDLE_PRIORITY, but may have changed
-	 // it itself.
-	 if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
-	 {
-		 // The task has changed it's priority.
-	 }
-
-	 // ...
-
-	 // Is our priority higher than the created task?
-	 if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
-	 {
-		 // Our priority (obtained using NULL handle) is higher.
-	 }
- }
-
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet - * \ingroup TaskCtrl - */ -UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask );
- * - * A version of uxTaskPriorityGet() that can be used from an ISR. - */ -UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
eTaskState eTaskGetState( TaskHandle_t xTask );
- * - * INCLUDE_eTaskGetState must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Obtain the state of any task. States are encoded by the eTaskState - * enumerated type. - * - * @param xTask Handle of the task to be queried. - * - * @return The state of xTask at the time the function was called. Note the - * state of the task might change between the function being called, and the - * functions return value being tested by the calling task. - */ -eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
- * - * configUSE_TRACE_FACILITY must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * Populates a TaskStatus_t structure with information about a task. - * - * @param xTask Handle of the task being queried. If xTask is NULL then - * information will be returned about the calling task. - * - * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be - * filled with information about the task referenced by the handle passed using - * the xTask parameter. - * - * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report - * the stack high water mark of the task being queried. Calculating the stack - * high water mark takes a relatively long time, and can make the system - * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to - * allow the high water mark checking to be skipped. The high watermark value - * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is - * not set to pdFALSE; - * - * @param eState The TaskStatus_t structure contains a member to report the - * state of the task being queried. Obtaining the task state is not as fast as - * a simple assignment - so the eState parameter is provided to allow the state - * information to be omitted from the TaskStatus_t structure. To obtain state - * information then set eState to eInvalid - otherwise the value passed in - * eState will be reported as the task state in the TaskStatus_t structure. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
- TaskStatus_t xTaskDetails;
-
-    // Obtain the handle of a task from its name.
-    xHandle = xTaskGetHandle( "Task_Name" );
-
-    // Check the handle is not NULL.
-    configASSERT( xHandle );
-
-    // Use the handle to obtain further information about the task.
-    vTaskGetInfo( xHandle,
-                  &xTaskDetails,
-                  pdTRUE, // Include the high water mark in xTaskDetails.
-                  eInvalid ); // Include the task state in xTaskDetails.
- }
-
- * \defgroup vTaskGetInfo vTaskGetInfo - * \ingroup TaskCtrl - */ -void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
- * - * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Set the priority of any task. - * - * A context switch will occur before the function returns if the priority - * being set is higher than the currently executing task. - * - * @param xTask Handle to the task for which the priority is being set. - * Passing a NULL handle results in the priority of the calling task being set. - * - * @param uxNewPriority The priority to which the task will be set. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to raise the priority of the created task.
-	 vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
-	 // ...
-
-	 // Use a NULL handle to raise our priority to the same value.
-	 vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
-
- * \defgroup vTaskPrioritySet vTaskPrioritySet - * \ingroup TaskCtrl - */ -void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspend( TaskHandle_t xTaskToSuspend );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Suspend any task. When suspended a task will never get any microcontroller - * processing time, no matter what its priority. - * - * Calls to vTaskSuspend are not accumulative - - * i.e. calling vTaskSuspend () twice on the same task still only requires one - * call to vTaskResume () to ready the suspended task. - * - * @param xTaskToSuspend Handle to the task being suspended. Passing a NULL - * handle will cause the calling task to be suspended. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Suspend ourselves.
-	 vTaskSuspend( NULL );
-
-	 // We cannot get here unless another task calls vTaskResume
-	 // with our handle as the parameter.
- }
-
- * \defgroup vTaskSuspend vTaskSuspend - * \ingroup TaskCtrl - */ -void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskResume( TaskHandle_t xTaskToResume );
- * - * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. - * See the configuration section for more information. - * - * Resumes a suspended task. - * - * A task that has been suspended by one or more calls to vTaskSuspend () - * will be made available for running again by a single call to - * vTaskResume (). - * - * @param xTaskToResume Handle to the task being readied. - * - * Example usage: - 
- void vAFunction( void )
- {
- TaskHandle_t xHandle;
-
-	 // Create a task, storing the handle.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
-	 // ...
-
-	 // Use the handle to suspend the created task.
-	 vTaskSuspend( xHandle );
-
-	 // ...
-
-	 // The created task will not run during this period, unless
-	 // another task calls vTaskResume( xHandle ).
-
-	 //...
-
-
-	 // Resume the suspended task ourselves.
-	 vTaskResume( xHandle );
-
-	 // The created task will once again get microcontroller processing
-	 // time in accordance with its priority within the system.
- }
-
- * \defgroup vTaskResume vTaskResume - * \ingroup TaskCtrl - */ -void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
- * - * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be - * available. See the configuration section for more information. - * - * An implementation of vTaskResume() that can be called from within an ISR. - * - * A task that has been suspended by one or more calls to vTaskSuspend () - * will be made available for running again by a single call to - * xTaskResumeFromISR (). - * - * xTaskResumeFromISR() should not be used to synchronise a task with an - * interrupt if there is a chance that the interrupt could arrive prior to the - * task being suspended - as this can lead to interrupts being missed. Use of a - * semaphore as a synchronisation mechanism would avoid this eventuality. - * - * @param xTaskToResume Handle to the task being readied. - * - * @return pdTRUE if resuming the task should result in a context switch, - * otherwise pdFALSE. This is used by the ISR to determine if a context switch - * may be required following the ISR. - * - * \defgroup vTaskResumeFromISR vTaskResumeFromISR - * \ingroup TaskCtrl - */ -BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * SCHEDULER CONTROL - *----------------------------------------------------------*/ - -/** - * task. h - * 
void vTaskStartScheduler( void );
- * - * Starts the real time kernel tick processing. After calling the kernel - * has control over which tasks are executed and when. - * - * See the demo application file main.c for an example of creating - * tasks and starting the kernel. - * - * Example usage: - 
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will not get here unless a task calls vTaskEndScheduler ()
- }
-
- * - * \defgroup vTaskStartScheduler vTaskStartScheduler - * \ingroup SchedulerControl - */ -void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskEndScheduler( void );
- * - * NOTE: At the time of writing only the x86 real mode port, which runs on a PC - * in place of DOS, implements this function. - * - * Stops the real time kernel tick. All created tasks will be automatically - * deleted and multitasking (either preemptive or cooperative) will - * stop. Execution then resumes from the point where vTaskStartScheduler () - * was called, as if vTaskStartScheduler () had just returned. - * - * See the demo application file main. c in the demo/PC directory for an - * example that uses vTaskEndScheduler (). - * - * vTaskEndScheduler () requires an exit function to be defined within the - * portable layer (see vPortEndScheduler () in port. c for the PC port). This - * performs hardware specific operations such as stopping the kernel tick. - * - * vTaskEndScheduler () will cause all of the resources allocated by the - * kernel to be freed - but will not free resources allocated by application - * tasks. - * - * Example usage: - 
- void vTaskCode( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // At some point we want to end the real time kernel processing
-		 // so call ...
-		 vTaskEndScheduler ();
-	 }
- }
-
- void vAFunction( void )
- {
-	 // Create at least one task before starting the kernel.
-	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
-	 // Start the real time kernel with preemption.
-	 vTaskStartScheduler ();
-
-	 // Will only get here when the vTaskCode () task has called
-	 // vTaskEndScheduler ().  When we get here we are back to single task
-	 // execution.
- }
-
- * - * \defgroup vTaskEndScheduler vTaskEndScheduler - * \ingroup SchedulerControl - */ -void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskSuspendAll( void );
- * - * Suspends the scheduler without disabling interrupts. Context switches will - * not occur while the scheduler is suspended. - * - * After calling vTaskSuspendAll () the calling task will continue to execute - * without risk of being swapped out until a call to xTaskResumeAll () has been - * made. - * - * API functions that have the potential to cause a context switch (for example, - * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler - * is suspended. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the kernel
-		 // tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.
-		 xTaskResumeAll ();
-	 }
- }
-
- * \defgroup vTaskSuspendAll vTaskSuspendAll - * \ingroup SchedulerControl - */ -void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskResumeAll( void );
- * - * Resumes scheduler activity after it was suspended by a call to - * vTaskSuspendAll(). - * - * xTaskResumeAll() only resumes the scheduler. It does not unsuspend tasks - * that were previously suspended by a call to vTaskSuspend(). - * - * @return If resuming the scheduler caused a context switch then pdTRUE is - * returned, otherwise pdFALSE is returned. - * - * Example usage: - 
- void vTask1( void * pvParameters )
- {
-	 for( ;; )
-	 {
-		 // Task code goes here.
-
-		 // ...
-
-		 // At some point the task wants to perform a long operation during
-		 // which it does not want to get swapped out.  It cannot use
-		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
-		 // operation may cause interrupts to be missed - including the
-		 // ticks.
-
-		 // Prevent the real time kernel swapping out the task.
-		 vTaskSuspendAll ();
-
-		 // Perform the operation here.  There is no need to use critical
-		 // sections as we have all the microcontroller processing time.
-		 // During this time interrupts will still operate and the real
-		 // time kernel tick count will be maintained.
-
-		 // ...
-
-		 // The operation is complete.  Restart the kernel.  We want to force
-		 // a context switch - but there is no point if resuming the scheduler
-		 // caused a context switch already.
-		 if( !xTaskResumeAll () )
-		 {
-			  taskYIELD ();
-		 }
-	 }
- }
-
- * \defgroup xTaskResumeAll xTaskResumeAll - * \ingroup SchedulerControl - */ -BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION; - -/*----------------------------------------------------------- - * TASK UTILITIES - *----------------------------------------------------------*/ - -/** - * task. h - * 
TickType_t xTaskGetTickCount( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * \defgroup xTaskGetTickCount xTaskGetTickCount - * \ingroup TaskUtils - */ -TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
TickType_t xTaskGetTickCountFromISR( void );
- * - * @return The count of ticks since vTaskStartScheduler was called. - * - * This is a version of xTaskGetTickCount() that is safe to be called from an - * ISR - provided that TickType_t is the natural word size of the - * microcontroller being used or interrupt nesting is either not supported or - * not being used. - * - * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR - * \ingroup TaskUtils - */ -TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
uint16_t uxTaskGetNumberOfTasks( void );
- * - * @return The number of tasks that the real time kernel is currently managing. - * This includes all ready, blocked and suspended tasks. A task that - * has been deleted but not yet freed by the idle task will also be - * included in the count. - * - * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks - * \ingroup TaskUtils - */ -UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );
- * - * @return The text (human readable) name of the task referenced by the handle - * xTaskToQuery. A task can query its own name by either passing in its own - * handle, or by setting xTaskToQuery to NULL. - * - * \defgroup pcTaskGetName pcTaskGetName - * \ingroup TaskUtils - */ -char *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );
- * - * NOTE: This function takes a relatively long time to complete and should be - * used sparingly. - * - * @return The handle of the task that has the human readable name pcNameToQuery. - * NULL is returned if no matching name is found. INCLUDE_xTaskGetHandle - * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available. - * - * \defgroup pcTaskGetHandle pcTaskGetHandle - * \ingroup TaskUtils - */ -TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task.h - * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
- * - * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for - * this function to be available. - * - * Returns the high water mark of the stack associated with xTask. That is, - * the minimum free stack space there has been (in words, so on a 32 bit machine - * a value of 1 means 4 bytes) since the task started. The smaller the returned - * number the closer the task has come to overflowing its stack. - * - * @param xTask Handle of the task associated with the stack to be checked. - * Set xTask to NULL to check the stack of the calling task. - * - * @return The smallest amount of free stack space there has been (in words, so - * actual spaces on the stack rather than bytes) since the task referenced by - * xTask was created. - */ -UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - -/* When using trace macros it is sometimes necessary to include task.h before -FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined, -so the following two prototypes will cause a compilation error. This can be -fixed by simply guarding against the inclusion of these two prototypes unless -they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration -constant. */ -#ifdef configUSE_APPLICATION_TASK_TAG - #if configUSE_APPLICATION_TASK_TAG == 1 - /** - * task.h - * 
void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
- * - * Sets pxHookFunction to be the task hook function used by the task xTask. - * Passing xTask as NULL has the effect of setting the calling tasks hook - * function. - */ - void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION; - - /** - * task.h - * 
void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
- * - * Returns the pxHookFunction value assigned to the task xTask. - */ - TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; - #endif /* configUSE_APPLICATION_TASK_TAG ==1 */ -#endif /* ifdef configUSE_APPLICATION_TASK_TAG */ - -#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) - - /* Each task contains an array of pointers that is dimensioned by the - configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h. The - kernel does not use the pointers itself, so the application writer can use - the pointers for any purpose they wish. The following two functions are - used to set and query a pointer respectively. */ - void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION; - void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION; - -#endif - -/** - * task.h - * 
BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
- * - * Calls the hook function associated with xTask. Passing xTask as NULL has - * the effect of calling the Running tasks (the calling task) hook function. - * - * pvParameter is passed to the hook function for the task to interpret as it - * wants. The return value is the value returned by the task hook function - * registered by the user. - */ -BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION; - -/** - * xTaskGetIdleTaskHandle() is only available if - * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h. - * - * Simply returns the handle of the idle task. It is not valid to call - * xTaskGetIdleTaskHandle() before the scheduler has been started. - */ -TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION; - -/** - * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for - * uxTaskGetSystemState() to be available. - * - * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in - * the system. TaskStatus_t structures contain, among other things, members - * for the task handle, task name, task priority, task state, and total amount - * of run time consumed by the task. See the TaskStatus_t structure - * definition in this file for the full member list. - * - * NOTE: This function is intended for debugging use only as its use results in - * the scheduler remaining suspended for an extended period. - * - * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures. - * The array must contain at least one TaskStatus_t structure for each task - * that is under the control of the RTOS. The number of tasks under the control - * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function. - * - * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray - * parameter. The size is specified as the number of indexes in the array, or - * the number of TaskStatus_t structures contained in the array, not by the - * number of bytes in the array. - * - * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in - * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the - * total run time (as defined by the run time stats clock, see - * http://www.freertos.org/rtos-run-time-stats.html) since the target booted. - * pulTotalRunTime can be set to NULL to omit the total run time information. - * - * @return The number of TaskStatus_t structures that were populated by - * uxTaskGetSystemState(). This should equal the number returned by the - * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed - * in the uxArraySize parameter was too small. - * - * Example usage: - 
-    // This example demonstrates how a human readable table of run time stats
-	// information is generated from raw data provided by uxTaskGetSystemState().
-	// The human readable table is written to pcWriteBuffer
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	uint32_t ulTotalRunTime, ulStatsAsPercentage;
-
-		// Make sure the write buffer does not contain a string.
-		*pcWriteBuffer = 0x00;
-
-		// Take a snapshot of the number of tasks in case it changes while this
-		// function is executing.
-		uxArraySize = uxTaskGetNumberOfTasks();
-
-		// Allocate a TaskStatus_t structure for each task.  An array could be
-		// allocated statically at compile time.
-		pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			// Generate raw status information about each task.
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
-
-			// For percentage calculations.
-			ulTotalRunTime /= 100UL;
-
-			// Avoid divide by zero errors.
-			if( ulTotalRunTime > 0 )
-			{
-				// For each populated position in the pxTaskStatusArray array,
-				// format the raw data as human readable ASCII data
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					// What percentage of the total run time has the task used?
-					// This will always be rounded down to the nearest integer.
-					// ulTotalRunTimeDiv100 has already been divided by 100.
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
-
-					if( ulStatsAsPercentage > 0UL )
-					{
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-					}
-					else
-					{
-						// If the percentage is zero here then the task has
-						// consumed less than 1% of the total run time.
-						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
-					}
-
-					pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
-				}
-			}
-
-			// The array is no longer needed, free the memory it consumes.
-			vPortFree( pxTaskStatusArray );
-		}
-	}
-
- */ -UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
void vTaskList( char *pcWriteBuffer );
- * - * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must - * both be defined as 1 for this function to be available. See the - * configuration section of the FreeRTOS.org website for more information. - * - * NOTE 1: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Lists all the current tasks, along with their current state and stack - * usage high water mark. - * - * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or - * suspended ('S'). - * - * PLEASE NOTE: - * - * This function is provided for convenience only, and is used by many of the - * demo applications. Do not consider it to be part of the scheduler. - * - * vTaskList() calls uxTaskGetSystemState(), then formats part of the - * uxTaskGetSystemState() output into a human readable table that displays task - * names, states and stack usage. - * - * vTaskList() has a dependency on the sprintf() C library function that might - * bloat the code size, use a lot of stack, and provide different results on - * different platforms. An alternative, tiny, third party, and limited - * functionality implementation of sprintf() is provided in many of the - * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note - * printf-stdarg.c does not provide a full snprintf() implementation!). - * - * It is recommended that production systems call uxTaskGetSystemState() - * directly to get access to raw stats data, rather than indirectly through a - * call to vTaskList(). - * - * @param pcWriteBuffer A buffer into which the above mentioned details - * will be written, in ASCII form. This buffer is assumed to be large - * enough to contain the generated report. Approximately 40 bytes per - * task should be sufficient. - * - * \defgroup vTaskList vTaskList - * \ingroup TaskUtils - */ -void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );
- * - * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS - * must both be defined as 1 for this function to be available. The application - * must also then provide definitions for - * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE() - * to configure a peripheral timer/counter and return the timers current count - * value respectively. The counter should be at least 10 times the frequency of - * the tick count. - * - * NOTE 1: This function will disable interrupts for its duration. It is - * not intended for normal application runtime use but as a debug aid. - * - * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total - * accumulated execution time being stored for each task. The resolution - * of the accumulated time value depends on the frequency of the timer - * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. - * Calling vTaskGetRunTimeStats() writes the total execution time of each - * task into a buffer, both as an absolute count value and as a percentage - * of the total system execution time. - * - * NOTE 2: - * - * This function is provided for convenience only, and is used by many of the - * demo applications. Do not consider it to be part of the scheduler. - * - * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the - * uxTaskGetSystemState() output into a human readable table that displays the - * amount of time each task has spent in the Running state in both absolute and - * percentage terms. - * - * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function - * that might bloat the code size, use a lot of stack, and provide different - * results on different platforms. An alternative, tiny, third party, and - * limited functionality implementation of sprintf() is provided in many of the - * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note - * printf-stdarg.c does not provide a full snprintf() implementation!). - * - * It is recommended that production systems call uxTaskGetSystemState() directly - * to get access to raw stats data, rather than indirectly through a call to - * vTaskGetRunTimeStats(). - * - * @param pcWriteBuffer A buffer into which the execution times will be - * written, in ASCII form. This buffer is assumed to be large enough to - * contain the generated report. Approximately 40 bytes per task should - * be sufficient. - * - * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats - * \ingroup TaskUtils - */ -void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ - -/** - * task. h - * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @param ulValue Data that can be sent with the notification. How the data is - * used depends on the value of the eAction parameter. - * - * @param eAction Specifies how the notification updates the task's notification - * value, if at all. Valid values for eAction are as follows: - * - * eSetBits - - * The task's notification value is bitwise ORed with ulValue. xTaskNofify() - * always returns pdPASS in this case. - * - * eIncrement - - * The task's notification value is incremented. ulValue is not used and - * xTaskNotify() always returns pdPASS in this case. - * - * eSetValueWithOverwrite - - * The task's notification value is set to the value of ulValue, even if the - * task being notified had not yet processed the previous notification (the - * task already had a notification pending). xTaskNotify() always returns - * pdPASS in this case. - * - * eSetValueWithoutOverwrite - - * If the task being notified did not already have a notification pending then - * the task's notification value is set to ulValue and xTaskNotify() will - * return pdPASS. If the task being notified already had a notification - * pending then no action is performed and pdFAIL is returned. - * - * eNoAction - - * The task receives a notification without its notification value being - * updated. ulValue is not used and xTaskNotify() always returns pdPASS in - * this case. - * - * pulPreviousNotificationValue - - * Can be used to pass out the subject task's notification value before any - * bits are modified by the notify function. - * - * @return Dependent on the value of eAction. See the description of the - * eAction parameter. - * - * \defgroup xTaskNotify xTaskNotify - * \ingroup TaskNotifications - */ -BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION; -#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL ) -#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) ) - -/** - * task. h - * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * A version of xTaskNotify() that can be used from an interrupt service routine - * (ISR). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @param ulValue Data that can be sent with the notification. How the data is - * used depends on the value of the eAction parameter. - * - * @param eAction Specifies how the notification updates the task's notification - * value, if at all. Valid values for eAction are as follows: - * - * eSetBits - - * The task's notification value is bitwise ORed with ulValue. xTaskNofify() - * always returns pdPASS in this case. - * - * eIncrement - - * The task's notification value is incremented. ulValue is not used and - * xTaskNotify() always returns pdPASS in this case. - * - * eSetValueWithOverwrite - - * The task's notification value is set to the value of ulValue, even if the - * task being notified had not yet processed the previous notification (the - * task already had a notification pending). xTaskNotify() always returns - * pdPASS in this case. - * - * eSetValueWithoutOverwrite - - * If the task being notified did not already have a notification pending then - * the task's notification value is set to ulValue and xTaskNotify() will - * return pdPASS. If the task being notified already had a notification - * pending then no action is performed and pdFAIL is returned. - * - * eNoAction - - * The task receives a notification without its notification value being - * updated. ulValue is not used and xTaskNotify() always returns pdPASS in - * this case. - * - * @param pxHigherPriorityTaskWoken xTaskNotifyFromISR() will set - * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the - * task to which the notification was sent to leave the Blocked state, and the - * unblocked task has a priority higher than the currently running task. If - * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should - * be requested before the interrupt is exited. How a context switch is - * requested from an ISR is dependent on the port - see the documentation page - * for the port in use. - * - * @return Dependent on the value of eAction. See the description of the - * eAction parameter. - * - * \defgroup xTaskNotify xTaskNotify - * \ingroup TaskNotifications - */ -BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; -#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) ) -#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) ) - -/** - * task. h - * 
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this - * function to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * A notification sent to a task will remain pending until it is cleared by the - * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was - * already in the Blocked state to wait for a notification when the notification - * arrives then the task will automatically be removed from the Blocked state - * (unblocked) and the notification cleared. - * - * A task can use xTaskNotifyWait() to [optionally] block to wait for a - * notification to be pending, or ulTaskNotifyTake() to [optionally] block - * to wait for its notification value to have a non-zero value. The task does - * not consume any CPU time while it is in the Blocked state. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. - * - * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value - * will be cleared in the calling task's notification value before the task - * checks to see if any notifications are pending, and optionally blocks if no - * notifications are pending. Setting ulBitsToClearOnEntry to ULONG_MAX (if - * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have - * the effect of resetting the task's notification value to 0. Setting - * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged. - * - * @param ulBitsToClearOnExit If a notification is pending or received before - * the calling task exits the xTaskNotifyWait() function then the task's - * notification value (see the xTaskNotify() API function) is passed out using - * the pulNotificationValue parameter. Then any bits that are set in - * ulBitsToClearOnExit will be cleared in the task's notification value (note - * *pulNotificationValue is set before any bits are cleared). Setting - * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL - * (if limits.h is not included) will have the effect of resetting the task's - * notification value to 0 before the function exits. Setting - * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged - * when the function exits (in which case the value passed out in - * pulNotificationValue will match the task's notification value). - * - * @param pulNotificationValue Used to pass the task's notification value out - * of the function. Note the value passed out will not be effected by the - * clearing of any bits caused by ulBitsToClearOnExit being non-zero. - * - * @param xTicksToWait The maximum amount of time that the task should wait in - * the Blocked state for a notification to be received, should a notification - * not already be pending when xTaskNotifyWait() was called. The task - * will not consume any processing time while it is in the Blocked state. This - * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be - * used to convert a time specified in milliseconds to a time specified in - * ticks. - * - * @return If a notification was received (including notifications that were - * already pending when xTaskNotifyWait was called) then pdPASS is - * returned. Otherwise pdFAIL is returned. - * - * \defgroup xTaskNotifyWait xTaskNotifyWait - * \ingroup TaskNotifications - */ -BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; - -/** - * task. h - * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );
- * - * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro - * to be available. - * - * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private - * "notification value", which is a 32-bit unsigned integer (uint32_t). - * - * Events can be sent to a task using an intermediary object. Examples of such - * objects are queues, semaphores, mutexes and event groups. Task notifications - * are a method of sending an event directly to a task without the need for such - * an intermediary object. - * - * A notification sent to a task can optionally perform an action, such as - * update, overwrite or increment the task's notification value. In that way - * task notifications can be used to send data to a task, or be used as light - * weight and fast binary or counting semaphores. - * - * xTaskNotifyGive() is a helper macro intended for use when task notifications - * are used as light weight and faster binary or counting semaphore equivalents. - * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function, - * the equivalent action that instead uses a task notification is - * xTaskNotifyGive(). - * - * When task notifications are being used as a binary or counting semaphore - * equivalent then the task being notified should wait for the notification - * using the ulTaskNotificationTake() API function rather than the - * xTaskNotifyWait() API function. - * - * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details. - * - * @param xTaskToNotify The handle of the task being notified. The handle to a - * task can be returned from the xTaskCreate() API function used to create the - * task, and the handle of the currently running task can be obtained by calling - * xTaskGetCurrentTaskHandle(). - * - * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the - * eAction parameter set to eIncrement - so pdPASS is always returned. - * - * \defgroup xTaskNotifyGive xTaskNotifyGive - * \ingroup TaskNotifications - */ -#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL ) - -/** - * task. h - * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
- * to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * A version of xTaskNotifyGive() that can be called from an interrupt service
- * routine (ISR).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * vTaskNotifyGiveFromISR() is intended for use when task notifications are
- * used as light weight and faster binary or counting semaphore equivalents.
- * Actual FreeRTOS semaphores are given from an ISR using the
- * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
- * a task notification is vTaskNotifyGiveFromISR().
- *
- * When task notifications are being used as a binary or counting semaphore
- * equivalent then the task being notified should wait for the notification
- * using the ulTaskNotificationTake() API function rather than the
- * xTaskNotifyWait() API function.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
- *
- * @param xTaskToNotify The handle of the task being notified.  The handle to a
- * task can be returned from the xTaskCreate() API function used to create the
- * task, and the handle of the currently running task can be obtained by calling
- * xTaskGetCurrentTaskHandle().
- *
- * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
- * task to which the notification was sent to leave the Blocked state, and the
- * unblocked task has a priority higher than the currently running task.  If
- * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
- * should be requested before the interrupt is exited.  How a context switch is
- * requested from an ISR is dependent on the port - see the documentation page
- * for the port in use.
- *
- * \defgroup xTaskNotifyWait xTaskNotifyWait
- * \ingroup TaskNotifications
- */
-void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );

- *
- * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
- * function to be available.
- *
- * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
- * "notification value", which is a 32-bit unsigned integer (uint32_t).
- *
- * Events can be sent to a task using an intermediary object.  Examples of such
- * objects are queues, semaphores, mutexes and event groups.  Task notifications
- * are a method of sending an event directly to a task without the need for such
- * an intermediary object.
- *
- * A notification sent to a task can optionally perform an action, such as
- * update, overwrite or increment the task's notification value.  In that way
- * task notifications can be used to send data to a task, or be used as light
- * weight and fast binary or counting semaphores.
- *
- * ulTaskNotifyTake() is intended for use when a task notification is used as a
- * faster and lighter weight binary or counting semaphore alternative.  Actual
- * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the
- * equivalent action that instead uses a task notification is
- * ulTaskNotifyTake().
- *
- * When a task is using its notification value as a binary or counting semaphore
- * other tasks should send notifications to it using the xTaskNotifyGive()
- * macro, or xTaskNotify() function with the eAction parameter set to
- * eIncrement.
- *
- * ulTaskNotifyTake() can either clear the task's notification value to
- * zero on exit, in which case the notification value acts like a binary
- * semaphore, or decrement the task's notification value on exit, in which case
- * the notification value acts like a counting semaphore.
- *
- * A task can use ulTaskNotifyTake() to [optionally] block to wait for a
- * the task's notification value to be non-zero.  The task does not consume any
- * CPU time while it is in the Blocked state.
- *
- * Where as xTaskNotifyWait() will return when a notification is pending,
- * ulTaskNotifyTake() will return when the task's notification value is
- * not zero.
- *
- * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
- *
- * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
- * notification value is decremented when the function exits.  In this way the
- * notification value acts like a counting semaphore.  If xClearCountOnExit is
- * not pdFALSE then the task's notification value is cleared to zero when the
- * function exits.  In this way the notification value acts like a binary
- * semaphore.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait in
- * the Blocked state for the task's notification value to be greater than zero,
- * should the count not already be greater than zero when
- * ulTaskNotifyTake() was called.  The task will not consume any processing
- * time while it is in the Blocked state.  This is specified in kernel ticks,
- * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
- * specified in milliseconds to a time specified in ticks.
- *
- * @return The task's notification count before it is either cleared to zero or
- * decremented (see the xClearCountOnExit parameter).
- *
- * \defgroup ulTaskNotifyTake ulTaskNotifyTake
- * \ingroup TaskNotifications
- */
-uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * 
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );

- *
- * If the notification state of the task referenced by the handle xTask is
- * eNotified, then set the task's notification state to eNotWaitingNotification.
- * The task's notification value is not altered.  Set xTask to NULL to clear the
- * notification state of the calling task.
- *
- * @return pdTRUE if the task's notification state was set to
- * eNotWaitingNotification, otherwise pdFALSE.
- * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear
- * \ingroup TaskNotifications
- */
-BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
-
-/*-----------------------------------------------------------
- * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
- *----------------------------------------------------------*/
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Called from the real time kernel tick (either preemptive or cooperative),
- * this increments the tick count and checks if any tasks that are blocked
- * for a finite period required removing from a blocked list and placing on
- * a ready list.  If a non-zero value is returned then a context switch is
- * required because either:
- *   + A task was removed from a blocked list because its timeout had expired,
- *     or
- *   + Time slicing is in use and there is a task of equal priority to the
- *     currently running task.
- */
-BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes the calling task from the ready list and places it both
- * on the list of tasks waiting for a particular event, and the
- * list of delayed tasks.  The task will be removed from both lists
- * and replaced on the ready list should either the event occur (and
- * there be no higher priority tasks waiting on the same event) or
- * the delay period expires.
- *
- * The 'unordered' version replaces the event list item value with the
- * xItemValue value, and inserts the list item at the end of the list.
- *
- * The 'ordered' version uses the existing event list item value (which is the
- * owning tasks priority) to insert the list item into the event list is task
- * priority order.
- *
- * @param pxEventList The list containing tasks that are blocked waiting
- * for the event to occur.
- *
- * @param xItemValue The item value to use for the event list item when the
- * event list is not ordered by task priority.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait
- * for the event to occur.  This is specified in kernel ticks,the constant
- * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
- * period.
- */
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * This function performs nearly the same function as vTaskPlaceOnEventList().
- * The difference being that this function does not permit tasks to block
- * indefinitely, whereas vTaskPlaceOnEventList() does.
- *
- */
-void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes a task from both the specified event list and the list of blocked
- * tasks, and places it on a ready queue.
- *
- * xTaskRemoveFromEventList()/xTaskRemoveFromUnorderedEventList() will be called
- * if either an event occurs to unblock a task, or the block timeout period
- * expires.
- *
- * xTaskRemoveFromEventList() is used when the event list is in task priority
- * order.  It removes the list item from the head of the event list as that will
- * have the highest priority owning task of all the tasks on the event list.
- * xTaskRemoveFromUnorderedEventList() is used when the event list is not
- * ordered and the event list items hold something other than the owning tasks
- * priority.  In this case the event list item value is updated to the value
- * passed in the xItemValue parameter.
- *
- * @return pdTRUE if the task being removed has a higher priority than the task
- * making the call, otherwise pdFALSE.
- */
-BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Sets the pointer to the current TCB to the TCB of the highest priority task
- * that is ready to run.
- */
-void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
- * THE EVENT BITS MODULE.
- */
-TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Return the handle of the calling task.
- */
-TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Capture the current time status for future reference.
- */
-void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
-
-/*
- * Compare the time status now with that previously captured to see if the
- * timeout has expired.
- */
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * Shortcut used by the queue implementation to prevent unnecessary call to
- * taskYIELD();
- */
-void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Returns the scheduler state as taskSCHEDULER_RUNNING,
- * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
- */
-BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Raises the priority of the mutex holder to that of the calling task should
- * the mutex holder have a priority less than the calling task.
- */
-void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the priority of a task back to its proper priority in the case that it
- * inherited a higher priority while it was holding a semaphore.
- */
-BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
- */
-UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the uxTaskNumber of the task referenced by the xTask parameter to
- * uxHandle.
- */
-void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
-
-/*
- * Only available when configUSE_TICKLESS_IDLE is set to 1.
- * If tickless mode is being used, or a low power mode is implemented, then
- * the tick interrupt will not execute during idle periods.  When this is the
- * case, the tick count value maintained by the scheduler needs to be kept up
- * to date with the actual execution time by being skipped forward by a time
- * equal to the idle period.
- */
-void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
-
-/*
- * Only avilable when configUSE_TICKLESS_IDLE is set to 1.
- * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
- * specific sleep function to determine if it is ok to proceed with the sleep,
- * and if it is ok to proceed, if it is ok to sleep indefinitely.
- *
- * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
- * called with the scheduler suspended, not from within a critical section.  It
- * is therefore possible for an interrupt to request a context switch between
- * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
- * entered.  eTaskConfirmSleepModeStatus() should be called from a short
- * critical section between the timer being stopped and the sleep mode being
- * entered to ensure it is ok to proceed into the sleep mode.
- */
-eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
-
-/*
- * For internal use only.  Increment the mutex held count when a mutex is
- * taken and return the handle of the task that has taken the mutex.
- */
-void *pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* INC_TASK_H */
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/include/timers.h b/ports/cc3200/FreeRTOS/Source/include/timers.h
deleted file mode 100644
index 798c955bb3354..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/include/timers.h
+++ /dev/null
@@ -1,1314 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#ifndef TIMERS_H
-#define TIMERS_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include timers.h"
-#endif
-
-/*lint -e537 This headers are only multiply included if the application code
-happens to also be including task.h. */
-#include "task.h"
-/*lint +e537 */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
-/* IDs for commands that can be sent/received on the timer queue.  These are to
-be used solely through the macros that make up the public software timer API,
-as defined below.  The commands that are sent from interrupts must use the
-highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
-or interrupt version of the queue send function should be used. */
-#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR 	( ( BaseType_t ) -2 )
-#define tmrCOMMAND_EXECUTE_CALLBACK				( ( BaseType_t ) -1 )
-#define tmrCOMMAND_START_DONT_TRACE				( ( BaseType_t ) 0 )
-#define tmrCOMMAND_START					    ( ( BaseType_t ) 1 )
-#define tmrCOMMAND_RESET						( ( BaseType_t ) 2 )
-#define tmrCOMMAND_STOP							( ( BaseType_t ) 3 )
-#define tmrCOMMAND_CHANGE_PERIOD				( ( BaseType_t ) 4 )
-#define tmrCOMMAND_DELETE						( ( BaseType_t ) 5 )
-
-#define tmrFIRST_FROM_ISR_COMMAND				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_START_FROM_ISR				( ( BaseType_t ) 6 )
-#define tmrCOMMAND_RESET_FROM_ISR				( ( BaseType_t ) 7 )
-#define tmrCOMMAND_STOP_FROM_ISR				( ( BaseType_t ) 8 )
-#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR		( ( BaseType_t ) 9 )
-
-
-/**
- * Type by which software timers are referenced.  For example, a call to
- * xTimerCreate() returns an TimerHandle_t variable that can then be used to
- * reference the subject timer in calls to other software timer API functions
- * (for example, xTimerStart(), xTimerReset(), etc.).
- */
-typedef void * TimerHandle_t;
-
-/*
- * Defines the prototype to which timer callback functions must conform.
- */
-typedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer );
-
-/*
- * Defines the prototype to which functions used with the
- * xTimerPendFunctionCallFromISR() function must conform.
- */
-typedef void (*PendedFunction_t)( void *, uint32_t );
-
-/**
- * TimerHandle_t xTimerCreate( 	const char * const pcTimerName,
- * 								TickType_t xTimerPeriodInTicks,
- * 								UBaseType_t uxAutoReload,
- * 								void * pvTimerID,
- * 								TimerCallbackFunction_t pxCallbackFunction );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is	"void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @return If the timer is successfully created then a handle to the newly
- * created timer is returned.  If the timer cannot be created (because either
- * there is insufficient FreeRTOS heap remaining to allocate the timer
- * structures, or the timer period was set to 0) then NULL is returned.
- *
- * Example usage:
- * @verbatim
- * #define NUM_TIMERS 5
- *
- * // An array to hold handles to the created timers.
- * TimerHandle_t xTimers[ NUM_TIMERS ];
- *
- * // An array to hold a count of the number of times each timer expires.
- * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
- *
- * // Define a callback function that will be used by multiple timer instances.
- * // The callback function does nothing but count the number of times the
- * // associated timer expires, and stop the timer once the timer has expired
- * // 10 times.
- * void vTimerCallback( TimerHandle_t pxTimer )
- * {
- * int32_t lArrayIndex;
- * const int32_t xMaxExpiryCountBeforeStopping = 10;
- *
- * 	   // Optionally do something if the pxTimer parameter is NULL.
- * 	   configASSERT( pxTimer );
- *
- *     // Which timer expired?
- *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
- *
- *     // Increment the number of times that pxTimer has expired.
- *     lExpireCounters[ lArrayIndex ] += 1;
- *
- *     // If the timer has expired 10 times then stop it from running.
- *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
- *     {
- *         // Do not use a block time if calling a timer API function from a
- *         // timer callback function, as doing so could cause a deadlock!
- *         xTimerStop( pxTimer, 0 );
- *     }
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start some timers.  Starting the timers before the scheduler
- *     // has been started means the timers will start running immediately that
- *     // the scheduler starts.
- *     for( x = 0; x < NUM_TIMERS; x++ )
- *     {
- *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
- *                                         ( 100 * x ),   // The timer period in ticks.
- *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
- *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
- *                                         vTimerCallback // Each timer calls the same callback when it expires.
- *                                     );
- *
- *         if( xTimers[ x ] == NULL )
- *         {
- *             // The timer was not created.
- *         }
- *         else
- *         {
- *             // Start the timer.  No block time is specified, and even if one was
- *             // it would be ignored because the scheduler has not yet been
- *             // started.
- *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
- *             {
- *                 // The timer could not be set into the Active state.
- *             }
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif
-
-/**
- * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
- * 									TickType_t xTimerPeriodInTicks,
- * 									UBaseType_t uxAutoReload,
- * 									void * pvTimerID,
- * 									TimerCallbackFunction_t pxCallbackFunction,
- *									StaticTimer_t *pxTimerBuffer );
- *
- * Creates a new software timer instance, and returns a handle by which the
- * created software timer can be referenced.
- *
- * Internally, within the FreeRTOS implementation, software timers use a block
- * of memory, in which the timer data structure is stored.  If a software timer
- * is created using xTimerCreate() then the required memory is automatically
- * dynamically allocated inside the xTimerCreate() function.  (see
- * http://www.freertos.org/a00111.html).  If a software timer is created using
- * xTimerCreateStatic() then the application writer must provide the memory that
- * will get used by the software timer.  xTimerCreateStatic() therefore allows a
- * software timer to be created without using any dynamic memory allocation.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a
- * timer into the active state.
- *
- * @param pcTimerName A text name that is assigned to the timer.  This is done
- * purely to assist debugging.  The kernel itself only ever references a timer
- * by its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
- * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
- * has been specified in milliseconds.  For example, if the timer must expire
- * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
- * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
- * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
- * equal to 1000.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
- * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by TimerCallbackFunction_t,
- * which is "void vCallbackFunction( TimerHandle_t xTimer );".
- *
- * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
- * will be then be used to hold the software timer's data structures, removing
- * the need for the memory to be allocated dynamically.
- *
- * @return If the timer is created then a handle to the created timer is
- * returned.  If pxTimerBuffer was NULL then NULL is returned.
- *
- * Example usage:
- * @verbatim
- *
- * // The buffer used to hold the software timer's data structure.
- * static StaticTimer_t xTimerBuffer;
- *
- * // A variable that will be incremented by the software timer's callback
- * // function.
- * UBaseType_t uxVariableToIncrement = 0;
- *
- * // A software timer callback function that increments a variable passed to
- * // it when the software timer was created.  After the 5th increment the
- * // callback function stops the software timer.
- * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
- * {
- * UBaseType_t *puxVariableToIncrement;
- * BaseType_t xReturned;
- *
- *     // Obtain the address of the variable to increment from the timer ID.
- *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
- *
- *     // Increment the variable to show the timer callback has executed.
- *     ( *puxVariableToIncrement )++;
- *
- *     // If this callback has executed the required number of times, stop the
- *     // timer.
- *     if( *puxVariableToIncrement == 5 )
- *     {
- *         // This is called from a timer callback so must not block.
- *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
- *     }
- * }
- *
- *
- * void main( void )
- * {
- *     // Create the software time.  xTimerCreateStatic() has an extra parameter
- *     // than the normal xTimerCreate() API function.  The parameter is a pointer
- *     // to the StaticTimer_t structure that will hold the software timer
- *     // structure.  If the parameter is passed as NULL then the structure will be
- *     // allocated dynamically, just as if xTimerCreate() had been called.
- *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
- *                                  xTimerPeriod,     // The period of the timer in ticks.
- *                                  pdTRUE,           // This is an auto-reload timer.
- *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
- *                                  prvTimerCallback, // The function to execute when the timer expires.
- *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
- *
- *     // The scheduler has not started yet so a block time is not used.
- *     xReturned = xTimerStart( xTimer, 0 );
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timers running as they have already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-/**
- * void *pvTimerGetTimerID( TimerHandle_t xTimer );
- *
- * Returns the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer, and by calling the
- * vTimerSetTimerID() API function.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being queried.
- *
- * @return The ID assigned to the timer being queried.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
- *
- * Sets the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used as time specific (timer local) storage.
- *
- * @param xTimer The timer being updated.
- *
- * @param pvNewID The ID to assign to the timer.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
- *
- * Queries a timer to see if it is active or dormant.
- *
- * A timer will be dormant if:
- *     1) It has been created but not started, or
- *     2) It is an expired one-shot timer that has not been restarted.
- *
- * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
- * active state.
- *
- * @param xTimer The timer being queried.
- *
- * @return pdFALSE will be returned if the timer is dormant.  A value other than
- * pdFALSE will be returned if the timer is active.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is active, do something.
- *     }
- *     else
- *     {
- *         // xTimer is not active, do something else.
- *     }
- * }
- * @endverbatim
- */
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
- *
- * Simply returns the handle of the timer service/daemon task.  It it not valid
- * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
- */
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/**
- * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStart() starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerStart() has equivalent functionality
- * to the xTimerReset() API function.
- *
- * Starting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerStart() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerStart() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerStart() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
- * to be available.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the start command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStop() stops a timer that was previously started using either of the
- * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
- * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
- *
- * Stopping a timer ensures the timer is not in the active state.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
- * to be available.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the stop command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerChangePeriod( 	TimerHandle_t xTimer,
- *										TickType_t xNewPeriod,
- *										TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerChangePeriod() changes the period of a timer that was previously
- * created using the xTimerCreate() API function.
- *
- * xTimerChangePeriod() can be called to change the period of an active or
- * dormant state timer.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerChangePeriod() to be available.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the change period command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
- * xTimerChangePeriod() is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the change period command could not be
- * sent to the timer command queue even after xTicksToWait ticks had passed.
- * pdPASS will be returned if the command was successfully sent to the timer
- * command queue.  When the command is actually processed will depend on the
- * priority of the timer service/daemon task relative to other tasks in the
- * system.  The timer service/daemon task priority is set by the
- * configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This function assumes xTimer has already been created.  If the timer
- * // referenced by xTimer is already active when it is called, then the timer
- * // is deleted.  If the timer referenced by xTimer is not active when it is
- * // called, then the period of the timer is set to 500ms and the timer is
- * // started.
- * void vAFunction( TimerHandle_t xTimer )
- * {
- *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- *     {
- *         // xTimer is already active - delete it.
- *         xTimerDelete( xTimer );
- *     }
- *     else
- *     {
- *         // xTimer is not active, change its period to 500ms.  This will also
- *         // cause the timer to start.  Block for a maximum of 100 ticks if the
- *         // change period command cannot immediately be sent to the timer
- *         // command queue.
- *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
- *         {
- *             // The command was successfully sent.
- *         }
- *         else
- *         {
- *             // The command could not be sent, even after waiting for 100 ticks
- *             // to pass.  Take appropriate action here.
- *         }
- *     }
- * }
- * @endverbatim
- */
- #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerDelete() deletes a timer that was previously created using the
- * xTimerCreate() API function.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerDelete() to be available.
- *
- * @param xTimer The handle of the timer being deleted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the delete command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
- * is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the delete command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerChangePeriod() API function example usage scenario.
- */
-#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
- *
- * Timer functionality is provided by a timer service/daemon task.  Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * through a queue called the timer command queue.  The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code.  The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerReset() re-starts a timer that was previously created using the
- * xTimerCreate() API function.  If the timer had already been started and was
- * already in the active state, then xTimerReset() will cause the timer to
- * re-evaluate its expiry time so that it is relative to when xTimerReset() was
- * called.  If the timer was in the dormant state then xTimerReset() has
- * equivalent functionality to the xTimerStart() API function.
- *
- * Resetting a timer ensures the timer is in the active state.  If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerReset() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerReset() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerReset() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
- * to be available.
- *
- * @param xTimer The handle of the timer being reset/started/restarted.
- *
- * @param xTicksToWait Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the reset command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called.  The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer.
- *
- * TimerHandle_t xBacklightTimer = NULL;
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press event handler.
- * void vKeyPressEventHandler( char cKey )
- * {
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
- *     // if it cannot be sent immediately.
- *     vSetBacklightState( BACKLIGHT_ON );
- *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- * }
- *
- * void main( void )
- * {
- * int32_t x;
- *
- *     // Create then start the one-shot timer that is responsible for turning
- *     // the back-light off if no keys are pressed within a 5 second period.
- *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
- *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
- *                                     pdFALSE,                    // The timer is a one-shot timer.
- *                                     0,                          // The id is not used by the callback so can take any value.
- *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
- *                                   );
- *
- *     if( xBacklightTimer == NULL )
- *     {
- *         // The timer was not created.
- *     }
- *     else
- *     {
- *         // Start the timer.  No block time is specified, and even if one was
- *         // it would be ignored because the scheduler has not yet been
- *         // started.
- *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
- *         {
- *             // The timer could not be set into the Active state.
- *         }
- *     }
- *
- *     // ...
- *     // Create tasks here.
- *     // ...
- *
- *     // Starting the scheduler will start the timer running as it has already
- *     // been set into the active state.
- *     vTaskStartScheduler();
- *
- *     // Should not reach here.
- *     for( ;; );
- * }
- * @endverbatim
- */
-#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
-
-/**
- * BaseType_t xTimerStartFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStart() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStartFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
- * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerStartFromISR() is actually called.  The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then restart the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The start command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerStopFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStop() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerStopFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
- * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the timer should be simply stopped.
- *
- * // The interrupt service routine that stops the timer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - simply stop the timer.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The stop command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
- *										 TickType_t xNewPeriod,
- *										 BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerChangePeriod() that can be called from an interrupt
- * service routine.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
- * that has been specified in milliseconds.  For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
- * timer command queue, so has the potential to transition the timer service/
- * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
- * causes the timer service/daemon task to leave the Blocked state, and the
- * timer service/daemon task has a priority equal to or greater than the
- * currently executing task (the task that was interrupted), then
- * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
- * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
- * this value to pdTRUE then a context switch should be performed before the
- * interrupt exits.
- *
- * @return pdFAIL will be returned if the command to change the timers period
- * could not be sent to the timer command queue.  pdPASS will be returned if the
- * command was successfully sent to the timer command queue.  When the command
- * is actually processed will depend on the priority of the timer service/daemon
- * task relative to other tasks in the system.  The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xTimer has already been created and started.  When
- * // an interrupt occurs, the period of xTimer should be changed to 500ms.
- *
- * // The interrupt service routine that changes the period of xTimer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // The interrupt has occurred - change the period of xTimer to 500ms.
- *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- *     // (within this function).  As this is an interrupt service routine, only
- *     // FreeRTOS API functions that end in "FromISR" can be used.
- *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The command to change the timers period was not executed
- *         // successfully.  Take appropriate action here.
- *     }
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * BaseType_t xTimerResetFromISR( 	TimerHandle_t xTimer,
- *									BaseType_t *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerReset() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer that is to be started, reset, or
- * restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue.  Calling xTimerResetFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
- * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue.  pdPASS will be returned if the command was
- * successfully sent to the timer command queue.  When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- * @verbatim
- * // This scenario assumes xBacklightTimer has already been created.  When a
- * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off.  In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer.  In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( TimerHandle_t pxTimer )
- * {
- *     // The timer expired, therefore 5 seconds must have passed since a key
- *     // was pressed.  Switch off the LCD back-light.
- *     vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
- *
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  This is an interrupt service routine so can only
- *     // call FreeRTOS API functions that end in "FromISR".
- *     vSetBacklightState( BACKLIGHT_ON );
- *
- *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- *     // as both cause the timer to re-calculate its expiry time.
- *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- *     // declared (in this function).
- *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- *     {
- *         // The reset command was not executed successfully.  Take appropriate
- *         // action here.
- *     }
- *
- *     // Perform the rest of the key processing here.
- *
- *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- *     // should be performed.  The syntax required to perform a context switch
- *     // from inside an ISR varies from port to port, and from compiler to
- *     // compiler.  Inspect the demos for the port you are using to find the
- *     // actual syntax required.
- *     if( xHigherPriorityTaskWoken != pdFALSE )
- *     {
- *         // Call the interrupt safe yield function here (actual function
- *         // depends on the FreeRTOS port being used).
- *     }
- * }
- * @endverbatim
- */
-#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-
-/**
- * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
- *                                          void *pvParameter1,
- *                                          uint32_t ulParameter2,
- *                                          BaseType_t *pxHigherPriorityTaskWoken );
- *
- *
- * Used from application interrupt service routines to defer the execution of a
- * function to the RTOS daemon task (the timer service task, hence this function
- * is implemented in timers.c and is prefixed with 'Timer').
- *
- * Ideally an interrupt service routine (ISR) is kept as short as possible, but
- * sometimes an ISR either has a lot of processing to do, or needs to perform
- * processing that is not deterministic.  In these cases
- * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
- * to the RTOS daemon task.
- *
- * A mechanism is provided that allows the interrupt to return directly to the
- * task that will subsequently execute the pended callback function.  This
- * allows the callback function to execute contiguously in time with the
- * interrupt - just as if the callback had executed in the interrupt itself.
- *
- * @param xFunctionToPend The function to execute from the timer service/
- * daemon task.  The function must conform to the PendedFunction_t
- * prototype.
- *
- * @param pvParameter1 The value of the callback function's first parameter.
- * The parameter has a void * type to allow it to be used to pass any type.
- * For example, unsigned longs can be cast to a void *, or the void * can be
- * used to point to a structure.
- *
- * @param ulParameter2 The value of the callback function's second parameter.
- *
- * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
- * will result in a message being sent to the timer daemon task.  If the
- * priority of the timer daemon task (which is set using
- * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
- * the currently running task (the task the interrupt interrupted) then
- * *pxHigherPriorityTaskWoken will be set to pdTRUE within
- * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
- * requested before the interrupt exits.  For that reason
- * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
- * example code below.
- *
- * @return pdPASS is returned if the message was successfully sent to the
- * timer daemon task, otherwise pdFALSE is returned.
- *
- * Example usage:
- * @verbatim
- *
- *	// The callback function that will execute in the context of the daemon task.
- *  // Note callback functions must all use this same prototype.
- *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
- *	{
- *		BaseType_t xInterfaceToService;
- *
- *		// The interface that requires servicing is passed in the second
- *      // parameter.  The first parameter is not used in this case.
- *		xInterfaceToService = ( BaseType_t ) ulParameter2;
- *
- *		// ...Perform the processing here...
- *	}
- *
- *	// An ISR that receives data packets from multiple interfaces
- *  void vAnISR( void )
- *	{
- *		BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
- *
- *		// Query the hardware to determine which interface needs processing.
- *		xInterfaceToService = prvCheckInterfaces();
- *
- *      // The actual processing is to be deferred to a task.  Request the
- *      // vProcessInterface() callback function is executed, passing in the
- *		// number of the interface that needs processing.  The interface to
- *		// service is passed in the second parameter.  The first parameter is
- *		// not used in this case.
- *		xHigherPriorityTaskWoken = pdFALSE;
- *		xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
- *
- *		// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
- *		// switch should be requested.  The macro used is port specific and will
- *		// be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
- *		// the documentation page for the port being used.
- *		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
- *
- *	}
- * @endverbatim
- */
-BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
-
- /**
-  * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
-  *                                    void *pvParameter1,
-  *                                    uint32_t ulParameter2,
-  *                                    TickType_t xTicksToWait );
-  *
-  *
-  * Used to defer the execution of a function to the RTOS daemon task (the timer
-  * service task, hence this function is implemented in timers.c and is prefixed
-  * with 'Timer').
-  *
-  * @param xFunctionToPend The function to execute from the timer service/
-  * daemon task.  The function must conform to the PendedFunction_t
-  * prototype.
-  *
-  * @param pvParameter1 The value of the callback function's first parameter.
-  * The parameter has a void * type to allow it to be used to pass any type.
-  * For example, unsigned longs can be cast to a void *, or the void * can be
-  * used to point to a structure.
-  *
-  * @param ulParameter2 The value of the callback function's second parameter.
-  *
-  * @param xTicksToWait Calling this function will result in a message being
-  * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
-  * time the calling task should remain in the Blocked state (so not using any
-  * processing time) for space to become available on the timer queue if the
-  * queue is found to be full.
-  *
-  * @return pdPASS is returned if the message was successfully sent to the
-  * timer daemon task, otherwise pdFALSE is returned.
-  *
-  */
-BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/**
- * const char * const pcTimerGetName( TimerHandle_t xTimer );
- *
- * Returns the name that was assigned to a timer when the timer was created.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The name assigned to the timer specified by the xTimer parameter.
- */
-const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/**
- * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
- *
- * Returns the period of a timer.
- *
- * @param xTimer The handle of the timer being queried.
- *
- * @return The period of the timer in ticks.
- */
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/**
-* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
-*
-* Returns the time in ticks at which the timer will expire.  If this is less
-* than the current tick count then the expiry time has overflowed from the
-* current time.
-*
-* @param xTimer The handle of the timer being queried.
-*
-* @return If the timer is running then the time in ticks at which the timer
-* will next expire is returned.  If the timer is not running then the return
-* value is undefined.
-*/
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
-
-/*
- * Functions beyond this part are not part of the public API and are intended
- * for use by the kernel only.
- */
-BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* TIMERS_H */
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/list.c b/ports/cc3200/FreeRTOS/Source/list.c
deleted file mode 100644
index 5e207c1608ef3..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/list.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#include 
-#include "FreeRTOS.h"
-#include "list.h"
-
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-void vListInitialise( List_t * const pxList )
-{
-	/* The list structure contains a list item which is used to mark the
-	end of the list.  To initialise the list the list end is inserted
-	as the only list entry. */
-	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	/* The list end value is the highest possible value in the list to
-	ensure it remains at the end of the list. */
-	pxList->xListEnd.xItemValue = portMAX_DELAY;
-
-	/* The list end next and previous pointers point to itself so we know
-	when the list is empty. */
-	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
-
-	/* Write known values into the list if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
-	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
-}
-/*-----------------------------------------------------------*/
-
-void vListInitialiseItem( ListItem_t * const pxItem )
-{
-	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pvContainer = NULL;
-
-	/* Write known values into the list item if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-}
-/*-----------------------------------------------------------*/
-
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t * const pxIndex = pxList->pxIndex;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert a new list item into pxList, but rather than sort the list,
-	makes the new list item the last item to be removed by a call to
-	listGET_OWNER_OF_NEXT_ENTRY(). */
-	pxNewListItem->pxNext = pxIndex;
-	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	pxIndex->pxPrevious->pxNext = pxNewListItem;
-	pxIndex->pxPrevious = pxNewListItem;
-
-	/* Remember which list the item is in. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t *pxIterator;
-const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert the new list item into the list, sorted in xItemValue order.
-
-	If the list already contains a list item with the same item value then the
-	new list item should be placed after it.  This ensures that TCB's which are
-	stored in ready lists (all of which have the same xItemValue value) get a
-	share of the CPU.  However, if the xItemValue is the same as the back marker
-	the iteration loop below will not end.  Therefore the value is checked
-	first, and the algorithm slightly modified if necessary. */
-	if( xValueOfInsertion == portMAX_DELAY )
-	{
-		pxIterator = pxList->xListEnd.pxPrevious;
-	}
-	else
-	{
-		/* *** NOTE ***********************************************************
-		If you find your application is crashing here then likely causes are
-		listed below.  In addition see http://www.freertos.org/FAQHelp.html for
-		more tips, and ensure configASSERT() is defined!
-		http://www.freertos.org/a00110.html#configASSERT
-
-			1) Stack overflow -
-			   see http://www.freertos.org/Stacks-and-stack-overflow-checking.html
-			2) Incorrect interrupt priority assignment, especially on Cortex-M
-			   parts where numerically high priority values denote low actual
-			   interrupt priorities, which can seem counter intuitive.  See
-			   http://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
-			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
-			   http://www.freertos.org/a00110.html
-			3) Calling an API function from within a critical section or when
-			   the scheduler is suspended, or calling an API function that does
-			   not end in "FromISR" from an interrupt.
-			4) Using a queue or semaphore before it has been initialised or
-			   before the scheduler has been started (are interrupts firing
-			   before vTaskStartScheduler() has been called?).
-		**********************************************************************/
-
-		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-		{
-			/* There is nothing to do here, just iterating to the wanted
-			insertion position. */
-		}
-	}
-
-	pxNewListItem->pxNext = pxIterator->pxNext;
-	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
-	pxNewListItem->pxPrevious = pxIterator;
-	pxIterator->pxNext = pxNewListItem;
-
-	/* Remember which list the item is in.  This allows fast removal of the
-	item later. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
-{
-/* The list item knows which list it is in.  Obtain the list from the list
-item. */
-List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer;
-
-	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
-	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	/* Make sure the index is left pointing to a valid item. */
-	if( pxList->pxIndex == pxItemToRemove )
-	{
-		pxList->pxIndex = pxItemToRemove->pxPrevious;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxItemToRemove->pvContainer = NULL;
-	( pxList->uxNumberOfItems )--;
-
-	return pxList->uxNumberOfItems;
-}
-/*-----------------------------------------------------------*/
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
deleted file mode 100644
index f6fe755fbd726..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
+++ /dev/null
@@ -1,710 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/*-----------------------------------------------------------
- * Implementation of functions defined in portable.h for the ARM CM3 port.
- *----------------------------------------------------------*/
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
-defined.  The value should also ensure backward compatibility.
-FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
-#ifndef configKERNEL_INTERRUPT_PRIORITY
-	#define configKERNEL_INTERRUPT_PRIORITY 255
-#endif
-
-#ifndef configSYSTICK_CLOCK_HZ
-	#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
-	/* Ensure the SysTick is clocked at the same frequency as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 1UL << 2UL )
-#else
-	/* The way the SysTick is clocked is not modified in case it is not the same
-	as the core. */
-	#define portNVIC_SYSTICK_CLK_BIT	( 0 )
-#endif
-
-/* Constants required to manipulate the core.  Registers first... */
-#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
-#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
-#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
-/* ...then bits in the registers. */
-#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
-#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
-#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
-#define portNVIC_PENDSVCLEAR_BIT 			( 1UL << 27UL )
-#define portNVIC_PEND_SYSTICK_CLEAR_BIT		( 1UL << 25UL )
-
-#define portNVIC_PENDSV_PRI					( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
-#define portNVIC_SYSTICK_PRI				( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
-
-/* Constants required to check the validity of an interrupt priority. */
-#define portFIRST_USER_INTERRUPT_NUMBER		( 16 )
-#define portNVIC_IP_REGISTERS_OFFSET_16 	( 0xE000E3F0 )
-#define portAIRCR_REG						( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
-#define portMAX_8_BIT_VALUE					( ( uint8_t ) 0xff )
-#define portTOP_BIT_OF_BYTE					( ( uint8_t ) 0x80 )
-#define portMAX_PRIGROUP_BITS				( ( uint8_t ) 7 )
-#define portPRIORITY_GROUP_MASK				( 0x07UL << 8UL )
-#define portPRIGROUP_SHIFT					( 8UL )
-
-/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
-#define portVECTACTIVE_MASK					( 0xFFUL )
-
-/* Constants required to set up the initial stack. */
-#define portINITIAL_XPSR					( 0x01000000UL )
-
-/* The systick is a 24-bit counter. */
-#define portMAX_24_BIT_NUMBER				( 0xffffffUL )
-
-/* A fiddle factor to estimate the number of SysTick counts that would have
-occurred while the SysTick counter is stopped during tickless idle
-calculations. */
-#define portMISSED_COUNTS_FACTOR			( 45UL )
-
-/* For strict compliance with the Cortex-M spec the task start address should
-have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
-#define portSTART_ADDRESS_MASK				( ( StackType_t ) 0xfffffffeUL )
-
-/* Let the user override the pre-loading of the initial LR with the address of
-prvTaskExitError() in case it messes up unwinding of the stack in the
-debugger. */
-#ifdef configTASK_RETURN_ADDRESS
-	#define portTASK_RETURN_ADDRESS	configTASK_RETURN_ADDRESS
-#else
-	#define portTASK_RETURN_ADDRESS	prvTaskExitError
-#endif
-
-/* Each task maintains its own interrupt status in the critical nesting
-variable. */
-static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-
-/*
- * Setup the timer to generate the tick interrupts.  The implementation in this
- * file is weak to allow application writers to change the timer used to
- * generate the tick interrupt.
- */
-void vPortSetupTimerInterrupt( void );
-
-/*
- * Exception handlers.
- */
-void xPortPendSVHandler( void ) __attribute__ (( naked ));
-void xPortSysTickHandler( void );
-void vPortSVCHandler( void ) __attribute__ (( naked ));
-
-/*
- * Start first task is a separate function so it can be tested in isolation.
- */
-static void prvPortStartFirstTask( void ) __attribute__ (( naked ));
-
-/*
- * Used to catch tasks that attempt to return from their implementing function.
- */
-static void prvTaskExitError( void );
-
-/*-----------------------------------------------------------*/
-
-/*
- * The number of SysTick increments that make up one tick period.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t ulTimerCountsForOneTick = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * The maximum number of tick periods that can be suppressed is limited by the
- * 24 bit resolution of the SysTick timer.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t xMaximumPossibleSuppressedTicks = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * Compensate for the CPU cycles that pass while the SysTick is stopped (low
- * power functionality only.
- */
-#if configUSE_TICKLESS_IDLE == 1
-	static uint32_t ulStoppedTimerCompensation = 0;
-#endif /* configUSE_TICKLESS_IDLE */
-
-/*
- * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
- * FreeRTOS API functions are not called from interrupts that have been assigned
- * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
- */
-#if ( configASSERT_DEFINED == 1 )
-	 static uint8_t ucMaxSysCallPriority = 0;
-	 static uint32_t ulMaxPRIGROUPValue = 0;
-	 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
-#endif /* configASSERT_DEFINED */
-
-/*-----------------------------------------------------------*/
-
-/*
- * See header file for description.
- */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-{
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-	pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
-	pxTopOfStack--;
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
-	pxTopOfStack--;
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
-
-	return pxTopOfStack;
-}
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
-	/* A function that implements a task must not exit or attempt to return to
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
-
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
-	portDISABLE_INTERRUPTS();
-	for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler( void )
-{
-	__asm volatile (
-					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
-					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
-					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r4-r11}				\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	msr psp, r0						\n" /* Restore the task stack pointer. */
-					"	isb								\n"
-					"	mov r0, #0 						\n"
-					"	msr	basepri, r0					\n"
-					"	orr r14, #0xd					\n"
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
-}
-/*-----------------------------------------------------------*/
-
-static void prvPortStartFirstTask( void )
-{
-	__asm volatile(
-					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
-					" ldr r0, [r0] 			\n"
-					" ldr r0, [r0] 			\n"
-					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
-					" cpsie i				\n" /* Globally enable interrupts. */
-					" cpsie f				\n"
-					" dsb					\n"
-					" isb					\n"
-					" svc 0					\n" /* System call to start first task. */
-					" nop					\n"
-				);
-}
-/*-----------------------------------------------------------*/
-
-/*
- * See header file for description.
- */
-BaseType_t xPortStartScheduler( void )
-{
-	/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
-	See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
-	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
-
-	#if( configASSERT_DEFINED == 1 )
-	{
-		volatile uint32_t ulOriginalPriority;
-		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
-		volatile uint8_t ucMaxPriorityValue;
-
-		/* Determine the maximum priority from which ISR safe FreeRTOS API
-		functions can be called.  ISR safe functions are those that end in
-		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
-		ensure interrupt entry is as fast and simple as possible.
-
-		Save the interrupt priority value that is about to be clobbered. */
-		ulOriginalPriority = *pucFirstUserPriorityRegister;
-
-		/* Determine the number of priority bits available.  First write to all
-		possible bits. */
-		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
-
-		/* Read the value back to see how many bits stuck. */
-		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
-
-		/* Use the same mask on the maximum system call priority. */
-		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
-
-		/* Calculate the maximum acceptable priority group value for the number
-		of bits read back. */
-		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
-		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
-		{
-			ulMaxPRIGROUPValue--;
-			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
-		}
-
-		/* Shift the priority group value back to its position within the AIRCR
-		register. */
-		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
-		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
-
-		/* Restore the clobbered interrupt priority register to its original
-		value. */
-		*pucFirstUserPriorityRegister = ulOriginalPriority;
-	}
-	#endif /* conifgASSERT_DEFINED */
-
-	/* Make PendSV and SysTick the lowest priority interrupts. */
-	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
-	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
-
-	/* Start the timer that generates the tick ISR.  Interrupts are disabled
-	here already. */
-	vPortSetupTimerInterrupt();
-
-	/* Initialise the critical nesting count ready for the first task. */
-	uxCriticalNesting = 0;
-
-	/* Start the first task. */
-	prvPortStartFirstTask();
-
-	/* Should never get here as the tasks will now be executing!  Call the task
-	exit error function to prevent compiler warnings about a static function
-	not being called in the case that the application writer overrides this
-	functionality by defining configTASK_RETURN_ADDRESS. */
-	prvTaskExitError();
-
-	/* Should not get here! */
-	return 0;
-}
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void )
-{
-	/* Not implemented in ports where there is nothing to return to.
-	Artificially force an assert. */
-	configASSERT( uxCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void )
-{
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
-
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
-	}
-}
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void )
-{
-	configASSERT( uxCriticalNesting );
-	uxCriticalNesting--;
-	if( uxCriticalNesting == 0 )
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
-/*-----------------------------------------------------------*/
-
-void xPortPendSVHandler( void )
-{
-	/* This is a naked function. */
-
-	__asm volatile
-	(
-	"	mrs r0, psp							\n"
-	"	isb									\n"
-	"										\n"
-	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
-	"	ldr	r2, [r3]						\n"
-	"										\n"
-	"	stmdb r0!, {r4-r11}					\n" /* Save the remaining registers. */
-	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
-	"										\n"
-	"	stmdb sp!, {r3, r14}				\n"
-	"	mov r0, %0							\n"
-	"	msr basepri, r0						\n"
-	"	bl vTaskSwitchContext				\n"
-	"	mov r0, #0							\n"
-	"	msr basepri, r0						\n"
-	"	ldmia sp!, {r3, r14}				\n"
-	"										\n"	/* Restore the context, including the critical nesting count. */
-	"	ldr r1, [r3]						\n"
-	"	ldr r0, [r1]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldmia r0!, {r4-r11}					\n" /* Pop the registers. */
-	"	msr psp, r0							\n"
-	"	isb									\n"
-	"	bx r14								\n"
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
-}
-/*-----------------------------------------------------------*/
-
-void xPortSysTickHandler( void )
-{
-	/* The SysTick runs at the lowest interrupt priority, so when this interrupt
-	executes all interrupts must be unmasked.  There is therefore no need to
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
-		}
-	}
-	portENABLE_INTERRUPTS();
-}
-/*-----------------------------------------------------------*/
-
-#if configUSE_TICKLESS_IDLE == 1
-
-	__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
-	{
-	uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
-	TickType_t xModifiableIdleTime;
-
-		/* Make sure the SysTick reload value does not overflow the counter. */
-		if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
-		{
-			xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
-		}
-
-		/* Stop the SysTick momentarily.  The time the SysTick is stopped for
-		is accounted for as best it can be, but using the tickless mode will
-		inevitably result in some tiny drift of the time maintained by the
-		kernel with respect to calendar time. */
-		portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
-
-		/* Calculate the reload value required to wait xExpectedIdleTime
-		tick periods.  -1 is used because this code will execute part way
-		through one of the tick periods. */
-		ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
-		if( ulReloadValue > ulStoppedTimerCompensation )
-		{
-			ulReloadValue -= ulStoppedTimerCompensation;
-		}
-
-		/* Enter a critical section but don't use the taskENTER_CRITICAL()
-		method as that will mask interrupts that should exit sleep mode. */
-		__asm volatile( "cpsid i" );
-		__asm volatile( "dsb" );
-		__asm volatile( "isb" );
-
-		/* If a context switch is pending or a task is waiting for the scheduler
-		to be unsuspended then abandon the low power entry. */
-		if( eTaskConfirmSleepModeStatus() == eAbortSleep )
-		{
-			/* Restart from whatever is left in the count register to complete
-			this tick period. */
-			portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Reset the reload register to the value required for normal tick
-			periods. */
-			portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" );
-		}
-		else
-		{
-			/* Set the new reload value. */
-			portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
-
-			/* Clear the SysTick count flag and set the count value back to
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-
-			/* Restart SysTick. */
-			portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-
-			/* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
-			set its parameter to 0 to indicate that its implementation contains
-			its own wait for interrupt or wait for event instruction, and so wfi
-			should not be executed again.  However, the original expected idle
-			time variable must remain unmodified, so a copy is taken. */
-			xModifiableIdleTime = xExpectedIdleTime;
-			configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
-			if( xModifiableIdleTime > 0 )
-			{
-				__asm volatile( "dsb" );
-				__asm volatile( "wfi" );
-				__asm volatile( "isb" );
-			}
-			configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
-
-			/* Stop SysTick.  Again, the time the SysTick is stopped for is
-			accounted for as best it can be, but using the tickless mode will
-			inevitably result in some tiny drift of the time maintained by the
-			kernel with respect to calendar time. */
-			ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
-			portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
-
-			/* Re-enable interrupts - see comments above the cpsid instruction()
-			above. */
-			__asm volatile( "cpsie i" );
-
-			if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
-			{
-				uint32_t ulCalculatedLoadValue;
-
-				/* The tick interrupt has already executed, and the SysTick
-				count reloaded with ulReloadValue.  Reset the
-				portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
-				period. */
-				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
-
-				/* Don't allow a tiny value, or values that have somehow
-				underflowed because the post sleep hook did something
-				that took too long. */
-				if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
-				{
-					ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
-				}
-
-				portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
-
-				/* The tick interrupt handler will already have pended the tick
-				processing in the kernel.  As the pending tick will be
-				processed as soon as this function exits, the tick value
-				maintained by the tick is stepped forward by one less than the
-				time spent waiting. */
-				ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
-			}
-			else
-			{
-				/* Something other than the tick interrupt ended the sleep.
-				Work out how long the sleep lasted rounded to complete tick
-				periods (not the ulReload value which accounted for part
-				ticks). */
-				ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
-
-				/* How many complete tick periods passed while the processor
-				was waiting? */
-				ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
-
-				/* The reload value is set to whatever fraction of a single tick
-				period remains. */
-				portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
-			}
-
-			/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
-			again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
-			value.  The critical section is used to ensure the tick interrupt
-			can only execute once in the case that the reload register is near
-			zero. */
-			portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
-			portENTER_CRITICAL();
-			{
-				portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
-				vTaskStepTick( ulCompleteTickPeriods );
-				portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
-			}
-			portEXIT_CRITICAL();
-		}
-	}
-
-#endif /* #if configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-/*
- * Setup the systick timer to generate the tick interrupts at the required
- * frequency.
- */
-__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
-{
-	/* Calculate the constants required to configure the tick interrupt. */
-	#if configUSE_TICKLESS_IDLE == 1
-	{
-		ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
-		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
-		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
-	}
-	#endif /* configUSE_TICKLESS_IDLE */
-
-	/* Configure SysTick to interrupt at the requested rate. */
-	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
-}
-/*-----------------------------------------------------------*/
-
-#if( configASSERT_DEFINED == 1 )
-
-	void vPortValidateInterruptPriority( void )
-	{
-	uint32_t ulCurrentInterrupt;
-	uint8_t ucCurrentPriority;
-
-		/* Obtain the number of the currently executing interrupt. */
-		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
-
-		/* Is the interrupt number a user defined interrupt? */
-		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
-		{
-			/* Look up the interrupt's priority. */
-			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
-
-			/* The following assertion will fail if a service routine (ISR) for
-			an interrupt that has been assigned a priority above
-			configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
-			function.  ISR safe FreeRTOS API functions must *only* be called
-			from interrupts that have been assigned a priority at or below
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Numerically low interrupt priority numbers represent logically high
-			interrupt priorities, therefore the priority of the interrupt must
-			be set to a value equal to or numerically *higher* than
-			configMAX_SYSCALL_INTERRUPT_PRIORITY.
-
-			Interrupts that	use the FreeRTOS API must not be left at their
-			default priority of	zero as that is the highest possible priority,
-			which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
-			and	therefore also guaranteed to be invalid.
-
-			FreeRTOS maintains separate thread and ISR API functions to ensure
-			interrupt entry is as fast and simple as possible.
-
-			The following links provide detailed information:
-			http://www.freertos.org/RTOS-Cortex-M3-M4.html
-			http://www.freertos.org/FAQHelp.html */
-			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
-		}
-
-		/* Priority grouping:  The interrupt controller (NVIC) allows the bits
-		that define each interrupt's priority to be split between bits that
-		define the interrupt's pre-emption priority bits and bits that define
-		the interrupt's sub-priority.  For simplicity all bits must be defined
-		to be pre-emption priority bits.  The following assertion will fail if
-		this is not the case (if some bits represent a sub-priority).
-
-		If the application only uses CMSIS libraries for interrupt
-		configuration then the correct setting can be achieved on all Cortex-M
-		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
-		scheduler.  Note however that some vendor specific peripheral libraries
-		assume a non-zero priority group setting, in which cases using a value
-		of zero will result in unpredicable behaviour. */
-		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
-	}
-
-#endif /* configASSERT_DEFINED */
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
deleted file mode 100644
index d44fc922286ad..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the
- * given hardware and compiler.
- *
- * These settings should not be altered.
- *-----------------------------------------------------------
- */
-
-/* Type definitions. */
-#define portCHAR		char
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		long
-#define portSHORT		short
-#define portSTACK_TYPE	uint32_t
-#define portBASE_TYPE	long
-
-typedef portSTACK_TYPE StackType_t;
-typedef long BaseType_t;
-typedef unsigned long UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC 1
-#endif
-/*-----------------------------------------------------------*/
-
-/* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT			8
-/*-----------------------------------------------------------*/
-
-/* Scheduler utilities. */
-#define portYIELD() 															\
-{																				\
-	/* Set a PendSV to request a context switch. */								\
-	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;								\
-																				\
-	/* Barriers are normally not required but do ensure the code is completely	\
-	within the specified behaviour for the architecture. */						\
-	__asm volatile( "dsb" );													\
-	__asm volatile( "isb" );													\
-}
-
-#define portNVIC_INT_CTRL_REG		( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT		( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/* Critical section management. */
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-#define portSET_INTERRUPT_MASK_FROM_ISR()		ulPortRaiseBASEPRI()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortSetBASEPRI(x)
-#define portDISABLE_INTERRUPTS()				vPortRaiseBASEPRI()
-#define portENABLE_INTERRUPTS()					vPortSetBASEPRI(0)
-#define portENTER_CRITICAL()					vPortEnterCritical()
-#define portEXIT_CRITICAL()						vPortExitCritical()
-
-/*-----------------------------------------------------------*/
-
-/* Task function macros as described on the FreeRTOS.org WEB site.  These are
-not necessary for to use this port.  They are defined so the common demo files
-(which build with all the ports) will build. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-/* Tickless idle/low power functionality. */
-#ifndef portSUPPRESS_TICKS_AND_SLEEP
-	extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
-	#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
-#endif
-/*-----------------------------------------------------------*/
-
-/* Architecture specific optimisations. */
-#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
-	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
-#endif
-
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
-
-	/* Generic helper function. */
-	__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
-	{
-	uint8_t ucReturn;
-
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
-		return ucReturn;
-	}
-
-	/* Check the configuration. */
-	#if( configMAX_PRIORITIES > 32 )
-		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
-	#endif
-
-	/* Store/clear the ready priorities in a bit map. */
-	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
-	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
-
-	/*-----------------------------------------------------------*/
-
-	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-/*-----------------------------------------------------------*/
-
-#ifdef configASSERT
-	void vPortValidateInterruptPriority( void );
-	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
-#endif
-
-/* portNOP() is not required by this port. */
-#define portNOP()
-
-#define portINLINE	__inline
-
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE inline __attribute__(( always_inline))
-#endif
-
-portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
-{
-uint32_t ulCurrentInterrupt;
-BaseType_t xReturn;
-
-	/* Obtain the number of the currently executing interrupt. */
-	__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
-
-	if( ulCurrentInterrupt == 0 )
-	{
-		xReturn = pdFALSE;
-	}
-	else
-	{
-		xReturn = pdTRUE;
-	}
-
-	return xReturn;
-}
-
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
-
-	__asm volatile
-	(
-		"	mov %0, %1												\n"	\
-		"	msr basepri, %0											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
-}
-
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
-{
-uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
-
-	__asm volatile
-	(
-		"	mrs %0, basepri											\n" \
-		"	mov %1, %2												\n"	\
-		"	msr basepri, %1											\n" \
-		"	isb														\n" \
-		"	dsb														\n" \
-		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
-
-	/* This return will not be reached but is necessary to prevent compiler
-	warnings. */
-	return ulOriginalBASEPRI;
-}
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
-	(
-		"	msr basepri, %0	" :: "r" ( ulNewMaskValue )
-	);
-}
-/*-----------------------------------------------------------*/
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
-
diff --git a/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c b/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c
deleted file mode 100644
index e7c7ade682c0d..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/portable/MemMang/heap_4.c
+++ /dev/null
@@ -1,478 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/*
- * A sample implementation of pvPortMalloc() and vPortFree() that combines
- * (coalescences) adjacent memory blocks as they are freed, and in so doing
- * limits memory fragmentation.
- *
- * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
- * memory management pages of http://www.FreeRTOS.org for more information.
- */
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
-	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
-#endif
-
-/* Block sizes must not get too small. */
-#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
-
-/* Assumes 8bit bytes! */
-#define heapBITS_PER_BYTE		( ( size_t ) 8 )
-
-/* Allocate the memory for the heap. */
-#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
-	/* The application writer has already defined the array used for the RTOS
-	heap - probably so it can be placed in a special segment or address. */
-	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
-#else
-	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
-#endif /* configAPPLICATION_ALLOCATED_HEAP */
-
-/* Define the linked list structure.  This is used to link free blocks in order
-of their memory address. */
-typedef struct A_BLOCK_LINK
-{
-	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
-	size_t xBlockSize;						/*<< The size of the free block. */
-} BlockLink_t;
-
-/*-----------------------------------------------------------*/
-
-/*
- * Inserts a block of memory that is being freed into the correct position in
- * the list of free memory blocks.  The block being freed will be merged with
- * the block in front it and/or the block behind it if the memory blocks are
- * adjacent to each other.
- */
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
-
-/*
- * Called automatically to setup the required heap structures the first time
- * pvPortMalloc() is called.
- */
-static void prvHeapInit( void );
-
-/*-----------------------------------------------------------*/
-
-/* The size of the structure placed at the beginning of each allocated memory
-block must by correctly byte aligned. */
-static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-
-/* Create a couple of list links to mark the start and end of the list. */
-static BlockLink_t xStart, *pxEnd = NULL;
-
-/* Keeps track of the number of free bytes remaining, but says nothing about
-fragmentation. */
-static size_t xFreeBytesRemaining = 0U;
-static size_t xMinimumEverFreeBytesRemaining = 0U;
-
-/* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
-member of an BlockLink_t structure is set then the block belongs to the
-application.  When the bit is free the block is still part of the free heap
-space. */
-static size_t xBlockAllocatedBit = 0;
-
-/*-----------------------------------------------------------*/
-
-void *pvPortMalloc( size_t xWantedSize )
-{
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
-
-	vTaskSuspendAll();
-	{
-		/* If this is the first call to malloc then the heap will require
-		initialisation to setup the list of free blocks. */
-		if( pxEnd == NULL )
-		{
-			prvHeapInit();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Check the requested block size is not so large that the top bit is
-		set.  The top bit of the block size member of the BlockLink_t structure
-		is used to determine who owns the block - the application or the
-		kernel, so it must be free. */
-		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
-		{
-			/* The wanted size is increased so it can contain a BlockLink_t
-			structure in addition to the requested amount of bytes. */
-			if( xWantedSize > 0 )
-			{
-				xWantedSize += xHeapStructSize;
-
-				/* Ensure that blocks are always aligned to the required number
-				of bytes. */
-				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
-				{
-					/* Byte alignment required. */
-					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
-					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
-			{
-				/* Traverse the list from the start	(lowest address) block until
-				one	of adequate size is found. */
-				pxPreviousBlock = &xStart;
-				pxBlock = xStart.pxNextFreeBlock;
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
-				{
-					pxPreviousBlock = pxBlock;
-					pxBlock = pxBlock->pxNextFreeBlock;
-				}
-
-				/* If the end marker was reached then a block of adequate size
-				was	not found. */
-				if( pxBlock != pxEnd )
-				{
-					/* Return the memory space pointed to - jumping over the
-					BlockLink_t structure at its start. */
-					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
-
-					/* This block is being returned for use so must be taken out
-					of the list of free blocks. */
-					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
-
-					/* If the block is larger than required it can be split into
-					two. */
-					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
-					{
-						/* This block is to be split into two.  Create a new
-						block following the number of bytes requested. The void
-						cast is used to prevent byte alignment warnings from the
-						compiler. */
-						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
-						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
-
-						/* Calculate the sizes of two blocks split from the
-						single block. */
-						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
-						pxBlock->xBlockSize = xWantedSize;
-
-						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( pxNewBlockLink );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					xFreeBytesRemaining -= pxBlock->xBlockSize;
-
-					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
-					{
-						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* The block is being returned - it is allocated and owned
-					by the application and has no "next" block. */
-					pxBlock->xBlockSize |= xBlockAllocatedBit;
-					pxBlock->pxNextFreeBlock = NULL;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
-
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
-
-	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
-	return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vPortFree( void *pv )
-{
-uint8_t *puc = ( uint8_t * ) pv;
-BlockLink_t *pxLink;
-
-	if( pv != NULL )
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= xHeapStructSize;
-
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
-
-		/* Check the block is actually allocated. */
-		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
-		configASSERT( pxLink->pxNextFreeBlock == NULL );
-
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
-			{
-				/* The block is being returned to the heap - it is no longer
-				allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
-
-				vTaskSuspendAll();
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-size_t xPortGetFreeHeapSize( void )
-{
-	return xFreeBytesRemaining;
-}
-/*-----------------------------------------------------------*/
-
-size_t xPortGetMinimumEverFreeHeapSize( void )
-{
-	return xMinimumEverFreeBytesRemaining;
-}
-/*-----------------------------------------------------------*/
-
-void vPortInitialiseBlocks( void )
-{
-	/* This just exists to keep the linker quiet. */
-}
-/*-----------------------------------------------------------*/
-
-static void prvHeapInit( void )
-{
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
-
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
-
-	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
-	{
-		uxAddress += ( portBYTE_ALIGNMENT - 1 );
-		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
-	}
-
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
-
-	/* xStart is used to hold a pointer to the first item in the list of free
-	blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
-	xStart.xBlockSize = ( size_t ) 0;
-
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
-	uxAddress -= xHeapStructSize;
-	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
-	pxEnd = ( void * ) uxAddress;
-	pxEnd->xBlockSize = 0;
-	pxEnd->pxNextFreeBlock = NULL;
-
-	/* To start with there is a single free block that is sized to take up the
-	entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
-
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
-
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
-}
-/*-----------------------------------------------------------*/
-
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
-{
-BlockLink_t *pxIterator;
-uint8_t *puc;
-
-	/* Iterate through the list until a block is found that has a higher address
-	than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
-	{
-		/* Nothing to do here, just iterate to the right position. */
-	}
-
-	/* Do the block being inserted, and the block it is being inserted after
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
-		pxBlockToInsert = pxIterator;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	/* Do the block being inserted, and the block it is being inserted before
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
-	}
-
-	/* If the block being inserted plugged a gab, so was merged with the block
-	before and the block after, then it's pxNextFreeBlock pointer will have
-	already been set, and should not be set here as that would make it point
-	to itself. */
-	if( pxIterator != pxBlockToInsert )
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-
diff --git a/ports/cc3200/FreeRTOS/Source/queue.c b/ports/cc3200/FreeRTOS/Source/queue.c
deleted file mode 100644
index ce623bec262ab..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/queue.c
+++ /dev/null
@@ -1,2566 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-#include 
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-
-#if ( configUSE_CO_ROUTINES == 1 )
-	#include "croutine.h"
-#endif
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-
-/* Constants used with the cRxLock and cTxLock structure members. */
-#define queueUNLOCKED					( ( int8_t ) -1 )
-#define queueLOCKED_UNMODIFIED			( ( int8_t ) 0 )
-
-/* When the Queue_t structure is used to represent a base queue its pcHead and
-pcTail members are used as pointers into the queue storage area.  When the
-Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
-not necessary, and the pcHead pointer is set to NULL to indicate that the
-pcTail pointer actually points to the mutex holder (if any).  Map alternative
-names to the pcHead and pcTail structure members to ensure the readability of
-the code is maintained despite this dual use of two structure members.  An
-alternative implementation would be to use a union, but use of a union is
-against the coding standard (although an exception to the standard has been
-permitted where the dual use also significantly changes the type of the
-structure member). */
-#define pxMutexHolder					pcTail
-#define uxQueueType						pcHead
-#define queueQUEUE_IS_MUTEX				NULL
-
-/* Semaphores do not actually store or copy data, so have an item size of
-zero. */
-#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )
-#define queueMUTEX_GIVE_BLOCK_TIME		 ( ( TickType_t ) 0U )
-
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define queueYIELD_IF_USING_PREEMPTION()
-#else
-	#define queueYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
-#endif
-
-/*
- * Definition of the queue used by the scheduler.
- * Items are queued by copy, not reference.  See the following link for the
- * rationale: http://www.freertos.org/Embedded-RTOS-Queues.html
- */
-typedef struct QueueDefinition
-{
-	int8_t *pcHead;					/*< Points to the beginning of the queue storage area. */
-	int8_t *pcTail;					/*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
-	int8_t *pcWriteTo;				/*< Points to the free next place in the storage area. */
-
-	union							/* Use of a union is an exception to the coding standard to ensure two mutually exclusive structure members don't appear simultaneously (wasting RAM). */
-	{
-		int8_t *pcReadFrom;			/*< Points to the last place that a queued item was read from when the structure is used as a queue. */
-		UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
-	} u;
-
-	List_t xTasksWaitingToSend;		/*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
-	List_t xTasksWaitingToReceive;	/*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
-
-	volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */
-	UBaseType_t uxLength;			/*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
-	UBaseType_t uxItemSize;			/*< The size of each items that the queue will hold. */
-
-	volatile int8_t cRxLock;		/*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
-	volatile int8_t cTxLock;		/*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
-
-	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-		uint8_t ucStaticallyAllocated;	/*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
-	#endif
-
-	#if ( configUSE_QUEUE_SETS == 1 )
-		struct QueueDefinition *pxQueueSetContainer;
-	#endif
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t uxQueueNumber;
-		uint8_t ucQueueType;
-	#endif
-
-} xQUEUE;
-
-/* The old xQUEUE name is maintained above then typedefed to the new Queue_t
-name below to enable the use of older kernel aware debuggers. */
-typedef xQUEUE Queue_t;
-
-/*-----------------------------------------------------------*/
-
-/*
- * The queue registry is just a means for kernel aware debuggers to locate
- * queue structures.  It has no other purpose so is an optional component.
- */
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	/* The type stored within the queue registry array.  This allows a name
-	to be assigned to each queue making kernel aware debugging a little
-	more user friendly. */
-	typedef struct QUEUE_REGISTRY_ITEM
-	{
-		const char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-		QueueHandle_t xHandle;
-	} xQueueRegistryItem;
-
-	/* The old xQueueRegistryItem name is maintained above then typedefed to the
-	new xQueueRegistryItem name below to enable the use of older kernel aware
-	debuggers. */
-	typedef xQueueRegistryItem QueueRegistryItem_t;
-
-	/* The queue registry is simply an array of QueueRegistryItem_t structures.
-	The pcQueueName member of a structure being NULL is indicative of the
-	array position being vacant. */
-	PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-
-/*
- * Unlocks a queue locked by a call to prvLockQueue.  Locking a queue does not
- * prevent an ISR from adding or removing items to the queue, but does prevent
- * an ISR from removing tasks from the queue event lists.  If an ISR finds a
- * queue is locked it will instead increment the appropriate queue lock count
- * to indicate that a task may require unblocking.  When the queue in unlocked
- * these lock counts are inspected, and the appropriate action taken.
- */
-static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any data in a queue.
- *
- * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
- */
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any space in a queue.
- *
- * @return pdTRUE if there is no space, otherwise pdFALSE;
- */
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item into the queue, either at the front of the queue or the
- * back of the queue.
- */
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item out of a queue.
- */
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
-
-#if ( configUSE_QUEUE_SETS == 1 )
-	/*
-	 * Checks to see if a queue is a member of a queue set, and if so, notifies
-	 * the queue set that the queue contains data.
-	 */
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * Called after a Queue_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Mutexes are a special type of queue.  When a mutex is created, first the
- * queue is created, then prvInitialiseMutex() is called to configure the queue
- * as a mutex.
- */
-#if( configUSE_MUTEXES == 1 )
-	static void prvInitialiseMutex( Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
-#endif
-
-/*-----------------------------------------------------------*/
-
-/*
- * Macro to mark a queue as locked.  Locking a queue prevents an ISR from
- * accessing the queue event lists.
- */
-#define prvLockQueue( pxQueue )								\
-	taskENTER_CRITICAL();									\
-	{														\
-		if( ( pxQueue )->cRxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-		if( ( pxQueue )->cTxLock == queueUNLOCKED )			\
-		{													\
-			( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED;	\
-		}													\
-	}														\
-	taskEXIT_CRITICAL()
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
-{
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-
-	taskENTER_CRITICAL();
-	{
-		pxQueue->pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize );
-		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
-		pxQueue->pcWriteTo = pxQueue->pcHead;
-		pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize );
-		pxQueue->cRxLock = queueUNLOCKED;
-		pxQueue->cTxLock = queueUNLOCKED;
-
-		if( xNewQueue == pdFALSE )
-		{
-			/* If there are tasks blocked waiting to read from the queue, then
-			the tasks will remain blocked as after this function exits the queue
-			will still be empty.  If there are tasks blocked waiting to write to
-			the queue, then one should be unblocked as after this function exits
-			it will be possible to write to it. */
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					queueYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* Ensure the event queues start in the correct state. */
-			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
-			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	/* A value is returned for calling semantic consistency with previous
-	versions. */
-	return pdPASS;
-}
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
-
-		/* The StaticQueue_t structure and the queue storage area must be
-		supplied. */
-		configASSERT( pxStaticQueue != NULL );
-
-		/* A queue storage area should be provided if the item size is not 0, and
-		should not be provided if the item size is 0. */
-		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
-		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
-
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
-			the real queue and semaphore structures. */
-			volatile size_t xSize = sizeof( StaticQueue_t );
-			configASSERT( xSize == sizeof( Queue_t ) );
-		}
-		#endif /* configASSERT_DEFINED */
-
-		/* The address of a statically allocated queue was passed in, use it.
-		The address of a statically allocated storage area was also passed in
-		but is already set. */
-		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-
-		if( pxNewQueue != NULL )
-		{
-			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-			{
-				/* Queues can be allocated wither statically or dynamically, so
-				note this queue was allocated statically in case the queue is
-				later deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdTRUE;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-
-		return pxNewQueue;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-	size_t xQueueSizeInBytes;
-	uint8_t *pucQueueStorage;
-
-		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
-
-		if( uxItemSize == ( UBaseType_t ) 0 )
-		{
-			/* There is not going to be a queue storage area. */
-			xQueueSizeInBytes = ( size_t ) 0;
-		}
-		else
-		{
-			/* Allocate enough space to hold the maximum number of items that
-			can be in the queue at any time. */
-			xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		}
-
-		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );
-
-		if( pxNewQueue != NULL )
-		{
-			/* Jump past the queue structure to find the location of the queue
-			storage area. */
-			pucQueueStorage = ( ( uint8_t * ) pxNewQueue ) + sizeof( Queue_t );
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* Queues can be created either statically or dynamically, so
-				note this task was created dynamically in case it is later
-				deleted. */
-				pxNewQueue->ucStaticallyAllocated = pdFALSE;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
-		}
-
-		return pxNewQueue;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
-{
-	/* Remove compiler warnings about unused parameters should
-	configUSE_TRACE_FACILITY not be set to 1. */
-	( void ) ucQueueType;
-
-	if( uxItemSize == ( UBaseType_t ) 0 )
-	{
-		/* No RAM was allocated for the queue storage area, but PC head cannot
-		be set to NULL because NULL is used as a key to say the queue is used as
-		a mutex.  Therefore just set pcHead to point to the queue as a benign
-		value that is known to be within the memory map. */
-		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
-	}
-	else
-	{
-		/* Set the head to the start of the queue storage area. */
-		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
-	}
-
-	/* Initialise the queue members as described where the queue type is
-	defined. */
-	pxNewQueue->uxLength = uxQueueLength;
-	pxNewQueue->uxItemSize = uxItemSize;
-	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-	{
-		pxNewQueue->ucQueueType = ucQueueType;
-	}
-	#endif /* configUSE_TRACE_FACILITY */
-
-	#if( configUSE_QUEUE_SETS == 1 )
-	{
-		pxNewQueue->pxQueueSetContainer = NULL;
-	}
-	#endif /* configUSE_QUEUE_SETS */
-
-	traceQUEUE_CREATE( pxNewQueue );
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_MUTEXES == 1 )
-
-	static void prvInitialiseMutex( Queue_t *pxNewQueue )
-	{
-		if( pxNewQueue != NULL )
-		{
-			/* The queue create function will set all the queue structure members
-			correctly for a generic queue, but this function is creating a
-			mutex.  Overwrite those members that need to be set differently -
-			in particular the information required for priority inheritance. */
-			pxNewQueue->pxMutexHolder = NULL;
-			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
-
-			/* In case this is a recursive mutex. */
-			pxNewQueue->u.uxRecursiveCallCount = 0;
-
-			traceCREATE_MUTEX( pxNewQueue );
-
-			/* Start with the semaphore in the expected state. */
-			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
-		}
-		else
-		{
-			traceCREATE_MUTEX_FAILED();
-		}
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
-	{
-	Queue_t *pxNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
-
-		pxNewQueue = ( Queue_t * ) xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
-		prvInitialiseMutex( pxNewQueue );
-
-		return pxNewQueue;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
-	{
-	Queue_t *pxNewQueue;
-	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
-
-		/* Prevent compiler warnings about unused parameters if
-		configUSE_TRACE_FACILITY does not equal 1. */
-		( void ) ucQueueType;
-
-		pxNewQueue = ( Queue_t * ) xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
-		prvInitialiseMutex( pxNewQueue );
-
-		return pxNewQueue;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
-
-	void* xQueueGetMutexHolder( QueueHandle_t xSemaphore )
-	{
-	void *pxReturn;
-
-		/* This function is called by xSemaphoreGetMutexHolder(), and should not
-		be called directly.  Note:  This is a good way of determining if the
-		calling task is the mutex holder, but not a good way of determining the
-		identity of the mutex holder, as the holder may change between the
-		following critical section exiting and the function returning. */
-		taskENTER_CRITICAL();
-		{
-			if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				pxReturn = ( void * ) ( ( Queue_t * ) xSemaphore )->pxMutexHolder;
-			}
-			else
-			{
-				pxReturn = NULL;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return pxReturn;
-	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_RECURSIVE_MUTEXES == 1 )
-
-	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
-
-		configASSERT( pxMutex );
-
-		/* If this is the task that holds the mutex then pxMutexHolder will not
-		change outside of this task.  If this task does not hold the mutex then
-		pxMutexHolder can never coincidentally equal the tasks handle, and as
-		this is the only condition we are interested in it does not matter if
-		pxMutexHolder is accessed simultaneously by another task.  Therefore no
-		mutual exclusion is required to test the pxMutexHolder variable. */
-		if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Not a redundant cast as TaskHandle_t is a typedef. */
-		{
-			traceGIVE_MUTEX_RECURSIVE( pxMutex );
-
-			/* uxRecursiveCallCount cannot be zero if pxMutexHolder is equal to
-			the task handle, therefore no underflow check is required.  Also,
-			uxRecursiveCallCount is only modified by the mutex holder, and as
-			there can only be one, no mutual exclusion is required to modify the
-			uxRecursiveCallCount member. */
-			( pxMutex->u.uxRecursiveCallCount )--;
-
-			/* Has the recursive call count unwound to 0? */
-			if( pxMutex->u.uxRecursiveCallCount == ( UBaseType_t ) 0 )
-			{
-				/* Return the mutex.  This will automatically unblock any other
-				task that might be waiting to access the mutex. */
-				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			/* The mutex cannot be given because the calling task is not the
-			holder. */
-			xReturn = pdFAIL;
-
-			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_RECURSIVE_MUTEXES == 1 )
-
-	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
-
-		configASSERT( pxMutex );
-
-		/* Comments regarding mutual exclusion as per those within
-		xQueueGiveMutexRecursive(). */
-
-		traceTAKE_MUTEX_RECURSIVE( pxMutex );
-
-		if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */
-		{
-			( pxMutex->u.uxRecursiveCallCount )++;
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = xQueueGenericReceive( pxMutex, NULL, xTicksToWait, pdFALSE );
-
-			/* pdPASS will only be returned if the mutex was successfully
-			obtained.  The calling task may have entered the Blocked state
-			before reaching here. */
-			if( xReturn != pdFAIL )
-			{
-				( pxMutex->u.uxRecursiveCallCount )++;
-			}
-			else
-			{
-				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
-	{
-	QueueHandle_t xHandle;
-
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
-
-		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
-
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
-
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
-
-		return xHandle;
-	}
-
-#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
-	{
-	QueueHandle_t xHandle;
-
-		configASSERT( uxMaxCount != 0 );
-		configASSERT( uxInitialCount <= uxMaxCount );
-
-		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
-
-		if( xHandle != NULL )
-		{
-			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
-
-			traceCREATE_COUNTING_SEMAPHORE();
-		}
-		else
-		{
-			traceCREATE_COUNTING_SEMAPHORE_FAILED();
-		}
-
-		return xHandle;
-	}
-
-#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
-{
-BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
-TimeOut_t xTimeOut;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
-
-
-	/* This function relaxes the coding standard somewhat to allow return
-	statements within the function itself.  This is done in the interest
-	of execution time efficiency. */
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			/* Is there room on the queue now?  The running task must be the
-			highest priority task wanting to access the queue.  If the head item
-			in the queue is to be overwritten then it does not matter if the
-			queue is full. */
-			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-			{
-				traceQUEUE_SEND( pxQueue );
-				xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock. A context switch is required. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* If there was a task waiting for data to arrive on the
-						queue then unblock it now. */
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The unblocked task has a priority higher than
-								our own so yield immediately.  Yes it is ok to
-								do this from within the critical section - the
-								kernel takes care of that. */
-								queueYIELD_IF_USING_PREEMPTION();
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else if( xYieldRequired != pdFALSE )
-						{
-							/* This path is a special case that will only get
-							executed if the task was holding multiple mutexes
-							and the mutexes were given back in an order that is
-							different to that in which they were taken. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					/* If there was a task waiting for data to arrive on the
-					queue then unblock it now. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The unblocked task has a priority higher than
-							our own so yield immediately.  Yes it is ok to do
-							this from within the critical section - the kernel
-							takes care of that. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else if( xYieldRequired != pdFALSE )
-					{
-						/* This path is a special case that will only get
-						executed if the task was holding multiple mutexes and
-						the mutexes were given back in an order that is
-						different to that in which they were taken. */
-						queueYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was full and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-
-					/* Return to the original privilege level before exiting
-					the function. */
-					traceQUEUE_SEND_FAILED( pxQueue );
-					return errQUEUE_FULL;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was full and a block time was specified so
-					configure the timeout structure. */
-					vTaskSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
-
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
-
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
-
-				/* Unlocking the queue means queue events can effect the
-				event list.  It is possible	that interrupts occurring now
-				remove this task from the event	list again - but as the
-				scheduler is suspended the task will go onto the pending
-				ready last instead of the actual ready list. */
-				prvUnlockQueue( pxQueue );
-
-				/* Resuming the scheduler will move tasks from the pending
-				ready list into the ready list - so it is feasible that this
-				task is already in a ready list before it yields - in which
-				case the yield will not cause a context switch unless there
-				is also a higher priority task in the pending ready list. */
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-			}
-			else
-			{
-				/* Try again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			/* The timeout has expired. */
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
-
-			traceQUEUE_SEND_FAILED( pxQueue );
-			return errQUEUE_FULL;
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	/* Similar to xQueueGenericSend, except without blocking if there is no room
-	in the queue.  Also don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
-
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
-
-			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
-			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
-			in a task disinheriting a priority and prvCopyDataToQueue() can be
-			called here even though the disinherit function does not check if
-			the scheduler is suspended before accessing the ready lists. */
-			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
-						{
-							/* The queue is a member of a queue set, and posting
-							to the queue set caused a higher priority task to
-							unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	/* Similar to xQueueGenericSendFromISR() but used with semaphores where the
-	item size is 0.  Don't directly wake a task that was blocked on a queue
-	read, instead return a flag to say whether a context switch is required or
-	not (i.e. has a task with a higher priority than us been woken by this
-	post). */
-
-	configASSERT( pxQueue );
-
-	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
-	if the item size is not 0. */
-	configASSERT( pxQueue->uxItemSize == 0 );
-
-	/* Normally a mutex would not be given from an interrupt, especially if
-	there is a mutex holder, as priority inheritance makes no sense for an
-	interrupts, only tasks. */
-	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-		/* When the queue is used to implement a semaphore no data is ever
-		moved through the queue but it is still valid to see if the queue 'has
-		space'. */
-		if( uxMessagesWaiting < pxQueue->uxLength )
-		{
-			const int8_t cTxLock = pxQueue->cTxLock;
-
-			traceQUEUE_SEND_FROM_ISR( pxQueue );
-
-			/* A task can only have an inherited priority if it is a mutex
-			holder - and if there is a mutex holder then the mutex cannot be
-			given from an ISR.  As this is the ISR version of the function it
-			can be assumed there is no mutex holder and no need to determine if
-			priority disinheritance is needed.  Simply increase the count of
-			messages (semaphores) available. */
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting + 1;
-
-			/* The event list is not altered if the queue is locked.  This will
-			be done when the queue is unlocked later. */
-			if( cTxLock == queueUNLOCKED )
-			{
-				#if ( configUSE_QUEUE_SETS == 1 )
-				{
-					if( pxQueue->pxQueueSetContainer != NULL )
-					{
-						if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
-						{
-							/* The semaphore is a member of a queue set, and
-							posting	to the queue set caused a higher priority
-							task to	unblock.  A context switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-						{
-							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-							{
-								/* The task waiting has a higher priority so
-								record that a context switch is required. */
-								if( pxHigherPriorityTaskWoken != NULL )
-								{
-									*pxHigherPriorityTaskWoken = pdTRUE;
-								}
-								else
-								{
-									mtCOVERAGE_TEST_MARKER();
-								}
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-				}
-				#else /* configUSE_QUEUE_SETS */
-				{
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							if( pxHigherPriorityTaskWoken != NULL )
-							{
-								*pxHigherPriorityTaskWoken = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_QUEUE_SETS */
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was posted while it was locked. */
-				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
-			xReturn = errQUEUE_FULL;
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeeking )
-{
-BaseType_t xEntryTimeSet = pdFALSE;
-TimeOut_t xTimeOut;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-	{
-		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
-	}
-	#endif
-
-	/* This function relaxes the coding standard somewhat to allow return
-	statements within the function itself.  This is done in the interest
-	of execution time efficiency. */
-
-	for( ;; )
-	{
-		taskENTER_CRITICAL();
-		{
-			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-			/* Is there data in the queue now?  To be running the calling task
-			must be the highest priority task wanting to access the queue. */
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Remember the read position in case the queue is only being
-				peeked. */
-				pcOriginalReadPosition = pxQueue->u.pcReadFrom;
-
-				prvCopyDataFromQueue( pxQueue, pvBuffer );
-
-				if( xJustPeeking == pdFALSE )
-				{
-					traceQUEUE_RECEIVE( pxQueue );
-
-					/* Actually removing data, not just peeking. */
-					pxQueue->uxMessagesWaiting = uxMessagesWaiting - 1;
-
-					#if ( configUSE_MUTEXES == 1 )
-					{
-						if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-						{
-							/* Record the information required to implement
-							priority inheritance should it become necessary. */
-							pxQueue->pxMutexHolder = ( int8_t * ) pvTaskIncrementMutexHeldCount(); /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configUSE_MUTEXES */
-
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-						{
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					traceQUEUE_PEEK( pxQueue );
-
-					/* The data is not being removed, so reset the read
-					pointer. */
-					pxQueue->u.pcReadFrom = pcOriginalReadPosition;
-
-					/* The data is being left in the queue, so see if there are
-					any other tasks waiting for the data. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority than this task. */
-							queueYIELD_IF_USING_PREEMPTION();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				taskEXIT_CRITICAL();
-				return pdPASS;
-			}
-			else
-			{
-				if( xTicksToWait == ( TickType_t ) 0 )
-				{
-					/* The queue was empty and no block time is specified (or
-					the block time has expired) so leave now. */
-					taskEXIT_CRITICAL();
-					traceQUEUE_RECEIVE_FAILED( pxQueue );
-					return errQUEUE_EMPTY;
-				}
-				else if( xEntryTimeSet == pdFALSE )
-				{
-					/* The queue was empty and a block time was specified so
-					configure the timeout structure. */
-					vTaskSetTimeOutState( &xTimeOut );
-					xEntryTimeSet = pdTRUE;
-				}
-				else
-				{
-					/* Entry time was already set. */
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		/* Interrupts and other tasks can send to and receive from the queue
-		now the critical section has been exited. */
-
-		vTaskSuspendAll();
-		prvLockQueue( pxQueue );
-
-		/* Update the timeout state to see if it has expired yet. */
-		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
-		{
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
-
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-					{
-						taskENTER_CRITICAL();
-						{
-							vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder );
-						}
-						taskEXIT_CRITICAL();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif
-
-				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
-				prvUnlockQueue( pxQueue );
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* Try again. */
-				prvUnlockQueue( pxQueue );
-				( void ) xTaskResumeAll();
-			}
-		}
-		else
-		{
-			prvUnlockQueue( pxQueue );
-			( void ) xTaskResumeAll();
-
-			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
-			{
-				traceQUEUE_RECEIVE_FAILED( pxQueue );
-				return errQUEUE_EMPTY;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-		/* Cannot block in an ISR, so check there is data available. */
-		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			const int8_t cRxLock = pxQueue->cRxLock;
-
-			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
-
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->uxMessagesWaiting = uxMessagesWaiting - 1;
-
-			/* If the queue is locked the event list will not be modified.
-			Instead update the lock count so the task that unlocks the queue
-			will know that an ISR has removed data while the queue was
-			locked. */
-			if( cRxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority than us so
-						force a context switch. */
-						if( pxHigherPriorityTaskWoken != NULL )
-						{
-							*pxHigherPriorityTaskWoken = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* Increment the lock count so the task that unlocks the queue
-				knows that data was removed while it was locked. */
-				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,  void * const pvBuffer )
-{
-BaseType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-int8_t *pcOriginalReadPosition;
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
-	configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-	{
-		/* Cannot block in an ISR, so check there is data available. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			traceQUEUE_PEEK_FROM_ISR( pxQueue );
-
-			/* Remember the read position so it can be reset as nothing is
-			actually being removed from the queue. */
-			pcOriginalReadPosition = pxQueue->u.pcReadFrom;
-			prvCopyDataFromQueue( pxQueue, pvBuffer );
-			pxQueue->u.pcReadFrom = pcOriginalReadPosition;
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-			traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
-		}
-	}
-	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-
-	configASSERT( xQueue );
-
-	taskENTER_CRITICAL();
-	{
-		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-Queue_t *pxQueue;
-
-	pxQueue = ( Queue_t * ) xQueue;
-	configASSERT( pxQueue );
-
-	taskENTER_CRITICAL();
-	{
-		uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
-	}
-	taskEXIT_CRITICAL();
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
-{
-UBaseType_t uxReturn;
-
-	configASSERT( xQueue );
-
-	uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
-
-	return uxReturn;
-} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
-/*-----------------------------------------------------------*/
-
-void vQueueDelete( QueueHandle_t xQueue )
-{
-Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-	configASSERT( pxQueue );
-	traceQUEUE_DELETE( pxQueue );
-
-	#if ( configQUEUE_REGISTRY_SIZE > 0 )
-	{
-		vQueueUnregisterQueue( pxQueue );
-	}
-	#endif
-
-	#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
-	{
-		/* The queue can only have been allocated dynamically - free it
-		again. */
-		vPortFree( pxQueue );
-	}
-	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-	{
-		/* The queue could have been allocated statically or dynamically, so
-		check before attempting to free the memory. */
-		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
-		{
-			vPortFree( pxQueue );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#else
-	{
-		/* The queue must have been statically allocated, so is not going to be
-		deleted.  Avoid compiler warnings about the unused parameter. */
-		( void ) pxQueue;
-	}
-	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->uxQueueNumber;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber )
-	{
-		( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
-	{
-		return ( ( Queue_t * ) xQueue )->ucQueueType;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
-{
-BaseType_t xReturn = pdFALSE;
-UBaseType_t uxMessagesWaiting;
-
-	/* This function is called from a critical section. */
-
-	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
-
-	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
-	{
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
-			{
-				/* The mutex is no longer being held. */
-				xReturn = xTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder );
-				pxQueue->pxMutexHolder = NULL;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_MUTEXES */
-	}
-	else if( xPosition == queueSEND_TO_BACK )
-	{
-		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. */
-		pxQueue->pcWriteTo += pxQueue->uxItemSize;
-		if( pxQueue->pcWriteTo >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->pcWriteTo = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		( void ) memcpy( ( void * ) pxQueue->u.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		pxQueue->u.pcReadFrom -= pxQueue->uxItemSize;
-		if( pxQueue->u.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
-		{
-			pxQueue->u.pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		if( xPosition == queueOVERWRITE )
-		{
-			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* An item is not being added but overwritten, so subtract
-				one from the recorded number of items in the queue so when
-				one is added again below the number of recorded items remains
-				correct. */
-				--uxMessagesWaiting;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	pxQueue->uxMessagesWaiting = uxMessagesWaiting + 1;
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
-{
-	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
-	{
-		pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-		if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
-		{
-			pxQueue->u.pcReadFrom = pxQueue->pcHead;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. */
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvUnlockQueue( Queue_t * const pxQueue )
-{
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
-
-	/* The lock counts contains the number of extra data items placed or
-	removed from the queue while the queue was locked.  When a queue is
-	locked items can be added or removed, but the event lists cannot be
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cTxLock = pxQueue->cTxLock;
-
-		/* See if data was added to the queue while it was locked. */
-		while( cTxLock > queueLOCKED_UNMODIFIED )
-		{
-			/* Data was posted while the queue was locked.  Are any tasks
-			blocked waiting for data to become available? */
-			#if ( configUSE_QUEUE_SETS == 1 )
-			{
-				if( pxQueue->pxQueueSetContainer != NULL )
-				{
-					if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
-					{
-						/* The queue is a member of a queue set, and posting to
-						the queue set caused a higher priority task to unblock.
-						A context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					/* Tasks that are removed from the event list will get
-					added to the pending ready list as the scheduler is still
-					suspended. */
-					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-					{
-						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-						{
-							/* The task waiting has a higher priority so record that a
-							context	switch is required. */
-							vTaskMissedYield();
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						break;
-					}
-				}
-			}
-			#else /* configUSE_QUEUE_SETS */
-			{
-				/* Tasks that are removed from the event list will get added to
-				the pending ready list as the scheduler is still suspended. */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority so record that
-						a context switch is required. */
-						vTaskMissedYield();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					break;
-				}
-			}
-			#endif /* configUSE_QUEUE_SETS */
-
-			--cTxLock;
-		}
-
-		pxQueue->cTxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
-
-	/* Do the same for the Rx lock. */
-	taskENTER_CRITICAL();
-	{
-		int8_t cRxLock = pxQueue->cRxLock;
-
-		while( cRxLock > queueLOCKED_UNMODIFIED )
-		{
-			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-			{
-				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-				{
-					vTaskMissedYield();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				--cRxLock;
-			}
-			else
-			{
-				break;
-			}
-		}
-
-		pxQueue->cRxLock = queueUNLOCKED;
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
-{
-BaseType_t xReturn;
-
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )
-{
-BaseType_t xReturn;
-
-	configASSERT( xQueue );
-	if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( UBaseType_t ) 0 )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
-{
-BaseType_t xReturn;
-
-	taskENTER_CRITICAL();
-	{
-		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
-		{
-			xReturn = pdTRUE;
-		}
-		else
-		{
-			xReturn = pdFALSE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )
-{
-BaseType_t xReturn;
-
-	configASSERT( xQueue );
-	if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( ( Queue_t * ) xQueue )->uxLength )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* If the queue is already full we may have to block.  A critical section
-		is required to prevent an interrupt removing something from the queue
-		between the check to see if the queue is full and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( prvIsQueueFull( pxQueue ) != pdFALSE )
-			{
-				/* The queue is full - do we want to block or just leave without
-				posting? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is called from a coroutine we cannot block directly, but
-					return indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-			{
-				/* There is room in the queue, copy the data into the queue. */
-				prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-				xReturn = pdPASS;
-
-				/* Were any co-routines waiting for data to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The co-routine waiting has a higher priority so record
-						that a yield might be appropriate. */
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = errQUEUE_FULL;
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* If the queue is already empty we may have to block.  A critical section
-		is required to prevent an interrupt adding something to the queue
-		between the check to see if the queue is empty and blocking on the queue. */
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
-			{
-				/* There are no messages in the queue, do we want to block or just
-				leave with nothing? */
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					/* As this is a co-routine we cannot block directly, but return
-					indicating that we need to block. */
-					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
-					portENABLE_INTERRUPTS();
-					return errQUEUE_BLOCKED;
-				}
-				else
-				{
-					portENABLE_INTERRUPTS();
-					return errQUEUE_FULL;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		portDISABLE_INTERRUPTS();
-		{
-			if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-			{
-				/* Data is available from the queue. */
-				pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-				if( pxQueue->u.pcReadFrom >= pxQueue->pcTail )
-				{
-					pxQueue->u.pcReadFrom = pxQueue->pcHead;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-				--( pxQueue->uxMessagesWaiting );
-				( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
-				xReturn = pdPASS;
-
-				/* Were any co-routines waiting for space to become available? */
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					/* In this instance the co-routine could be placed directly
-					into the ready list as we are within a critical section.
-					Instead the same pending ready list mechanism is used as if
-					the event were caused from within an interrupt. */
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						xReturn = errQUEUE_YIELD;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		portENABLE_INTERRUPTS();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken )
-	{
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* Cannot block within an ISR so if there is no space on the queue then
-		exit without doing anything. */
-		if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
-		{
-			prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-
-			/* We only want to wake one co-routine per ISR, so check that a
-			co-routine has not already been woken. */
-			if( xCoRoutinePreviouslyWoken == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						return pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xCoRoutinePreviouslyWoken;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_CO_ROUTINES == 1 )
-
-	BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* We cannot block from an ISR, so check there is data available. If
-		not then just leave without doing anything. */
-		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
-		{
-			/* Copy the data from the queue. */
-			pxQueue->u.pcReadFrom += pxQueue->uxItemSize;
-			if( pxQueue->u.pcReadFrom >= pxQueue->pcTail )
-			{
-				pxQueue->u.pcReadFrom = pxQueue->pcHead;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-			--( pxQueue->uxMessagesWaiting );
-			( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
-			if( ( *pxCoRoutineWoken ) == pdFALSE )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
-				{
-					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
-					{
-						*pxCoRoutineWoken = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_CO_ROUTINES */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
-
-		/* See if there is an empty space in the registry.  A NULL name denotes
-		a free slot. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].pcQueueName == NULL )
-			{
-				/* Store the information on this queue. */
-				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
-				xQueueRegistry[ ux ].xHandle = xQueue;
-
-				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	const char *pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t ux;
-	const char *pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-		/* Note there is nothing here to protect against another task adding or
-		removing entries from the registry while it is being searched. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				pcReturn = xQueueRegistry[ ux ].pcQueueName;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		return pcReturn;
-	}
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configQUEUE_REGISTRY_SIZE > 0 )
-
-	void vQueueUnregisterQueue( QueueHandle_t xQueue )
-	{
-	UBaseType_t ux;
-
-		/* See if the handle of the queue being unregistered in actually in the
-		registry. */
-		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
-		{
-			if( xQueueRegistry[ ux ].xHandle == xQueue )
-			{
-				/* Set the name to NULL to show that this slot if free again. */
-				xQueueRegistry[ ux ].pcQueueName = NULL;
-
-				/* Set the handle to NULL to ensure the same queue handle cannot
-				appear in the registry twice if it is added, removed, then
-				added again. */
-				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
-				break;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
-
-#endif /* configQUEUE_REGISTRY_SIZE */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TIMERS == 1 )
-
-	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
-
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements.
-		It can result in vListInsert() being called on a list that can only
-		possibly ever have one item in it, so the list will be fast, but even
-		so it should be called with the scheduler locked and not from a critical
-		section. */
-
-		/* Only do anything if there are no messages in the queue.  This function
-		will not actually cause the task to block, just place it on a blocked
-		list.  It will not block until the scheduler is unlocked - at which
-		time a yield will be performed.  If an item is added to the queue while
-		the queue is locked, and the calling task blocks on the queue, then the
-		calling task will be immediately unblocked when the queue is unlocked. */
-		prvLockQueue( pxQueue );
-		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
-		{
-			/* There is nothing in the queue, block for the specified period. */
-			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-		prvUnlockQueue( pxQueue );
-	}
-
-#endif /* configUSE_TIMERS */
-/*-----------------------------------------------------------*/
-
-#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-
-	QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
-	{
-	QueueSetHandle_t pxQueue;
-
-		pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
-
-		return pxQueue;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
-
-		taskENTER_CRITICAL();
-		{
-			if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
-			{
-				/* Cannot add a queue/semaphore to more than one queue set. */
-				xReturn = pdFAIL;
-			}
-			else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
-			{
-				/* Cannot add a queue/semaphore to a queue set if there are already
-				items in the queue/semaphore. */
-				xReturn = pdFAIL;
-			}
-			else
-			{
-				( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
-				xReturn = pdPASS;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
-	{
-	BaseType_t xReturn;
-	Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
-
-		if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
-		{
-			/* The queue was not a member of the set. */
-			xReturn = pdFAIL;
-		}
-		else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
-		{
-			/* It is dangerous to remove a queue from a set when the queue is
-			not empty because the queue set will still hold pending events for
-			the queue. */
-			xReturn = pdFAIL;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				/* The queue is no longer contained in the set. */
-				pxQueueOrSemaphore->pxQueueSetContainer = NULL;
-			}
-			taskEXIT_CRITICAL();
-			xReturn = pdPASS;
-		}
-
-		return xReturn;
-	} /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xTicksToWait )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
-
-		( void ) xQueueGenericReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait, pdFALSE ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
-	{
-	QueueSetMemberHandle_t xReturn = NULL;
-
-		( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_QUEUE_SETS == 1 )
-
-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition )
-	{
-	Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;
-	BaseType_t xReturn = pdFALSE;
-
-		/* This function must be called form a critical section. */
-
-		configASSERT( pxQueueSetContainer );
-		configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
-
-		if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
-		{
-			const int8_t cTxLock = pxQueueSetContainer->cTxLock;
-
-			traceQUEUE_SEND( pxQueueSetContainer );
-
-			/* The data copied is the handle of the queue that contains data. */
-			xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, xCopyPosition );
-
-			if( cTxLock == queueUNLOCKED )
-			{
-				if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
-				{
-					if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
-					{
-						/* The task waiting has a higher priority. */
-						xReturn = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_QUEUE_SETS */
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/ports/cc3200/FreeRTOS/Source/tasks.c b/ports/cc3200/FreeRTOS/Source/tasks.c
deleted file mode 100644
index 6c261a65101dc..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/tasks.c
+++ /dev/null
@@ -1,4807 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/* Standard includes. */
-#include 
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* FreeRTOS includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-#include "timers.h"
-#include "StackMacros.h"
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting
-functions but without including stdio.h here. */
-#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )
-	/* At the bottom of this file are two optional functions that can be used
-	to generate human readable text from the raw data generated by the
-	uxTaskGetSystemState() function.  Note the formatting functions are provided
-	for convenience only, and are NOT considered part of the kernel. */
-	#include 
-#endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
-
-#if( configUSE_PREEMPTION == 0 )
-	/* If the cooperative scheduler is being used then a yield should not be
-	performed just because a higher priority task has been woken. */
-	#define taskYIELD_IF_USING_PREEMPTION()
-#else
-	#define taskYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
-#endif
-
-/* Values that can be assigned to the ucNotifyState member of the TCB. */
-#define taskNOT_WAITING_NOTIFICATION	( ( uint8_t ) 0 )
-#define taskWAITING_NOTIFICATION		( ( uint8_t ) 1 )
-#define taskNOTIFICATION_RECEIVED		( ( uint8_t ) 2 )
-
-/*
- * The value used to fill the stack of a task when the task is created.  This
- * is used purely for checking the high water mark for tasks.
- */
-#define tskSTACK_FILL_BYTE	( 0xa5U )
-
-/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
-dynamically allocated RAM, in which case when any task is deleted it is known
-that both the task's stack and TCB need to be freed.  Sometimes the
-FreeRTOSConfig.h settings only allow a task to be created using statically
-allocated RAM, in which case when any task is deleted it is known that neither
-the task's stack or TCB should be freed.  Sometimes the FreeRTOSConfig.h
-settings allow a task to be created using either statically or dynamically
-allocated RAM, in which case a member of the TCB is used to record whether the
-stack and/or TCB were allocated statically or dynamically, so when a task is
-deleted the RAM that was allocated dynamically is freed again and no attempt is
-made to free the RAM that was allocated statically.
-tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a
-task to be created using either statically or dynamically allocated RAM.  Note
-that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with
-a statically allocated stack and a dynamically allocated TCB. */
-#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) || ( portUSING_MPU_WRAPPERS == 1 ) )
-#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB 		( ( uint8_t ) 0 )
-#define tskSTATICALLY_ALLOCATED_STACK_ONLY 			( ( uint8_t ) 1 )
-#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB		( ( uint8_t ) 2 )
-
-/*
- * Macros used by vListTask to indicate which state a task is in.
- */
-#define tskBLOCKED_CHAR		( 'B' )
-#define tskREADY_CHAR		( 'R' )
-#define tskDELETED_CHAR		( 'D' )
-#define tskSUSPENDED_CHAR	( 'S' )
-
-/*
- * Some kernel aware debuggers require the data the debugger needs access to be
- * global, rather than file scope.
- */
-#ifdef portREMOVE_STATIC_QUALIFIER
-	#define static
-#endif
-
-#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
-
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
-	performed in a generic way that is not optimised to any particular
-	microcontroller architecture. */
-
-	/* uxTopReadyPriority holds the priority of the highest priority ready
-	state task. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( ( uxPriority ) > uxTopReadyPriority )														\
-		{																								\
-			uxTopReadyPriority = ( uxPriority );														\
-		}																								\
-	} /* taskRECORD_READY_PRIORITY */
-
-	/*-----------------------------------------------------------*/
-
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()															\
-	{																									\
-	UBaseType_t uxTopPriority = uxTopReadyPriority;														\
-																										\
-		/* Find the highest priority queue that contains ready tasks. */								\
-		while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) )							\
-		{																								\
-			configASSERT( uxTopPriority );																\
-			--uxTopPriority;																			\
-		}																								\
-																										\
-		/* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of						\
-		the	same priority get an equal share of the processor time. */									\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );			\
-		uxTopReadyPriority = uxTopPriority;																\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK */
-
-	/*-----------------------------------------------------------*/
-
-	/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
-	they are only required when a port optimised method of task selection is
-	being used. */
-	#define taskRESET_READY_PRIORITY( uxPriority )
-	#define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
-
-#else /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
-	performed in a way that is tailored to the particular microcontroller
-	architecture being used. */
-
-	/* A port optimised version is provided.  Call the port defined macros. */
-	#define taskRECORD_READY_PRIORITY( uxPriority )	portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
-
-	/*-----------------------------------------------------------*/
-
-	#define taskSELECT_HIGHEST_PRIORITY_TASK()														\
-	{																								\
-	UBaseType_t uxTopPriority;																		\
-																									\
-		/* Find the highest priority list that contains ready tasks. */								\
-		portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );								\
-		configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 );		\
-		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );		\
-	} /* taskSELECT_HIGHEST_PRIORITY_TASK() */
-
-	/*-----------------------------------------------------------*/
-
-	/* A port optimised version is provided, call it only if the TCB being reset
-	is being referenced from a ready list.  If it is referenced from a delayed
-	or suspended list then it won't be in a ready list. */
-	#define taskRESET_READY_PRIORITY( uxPriority )														\
-	{																									\
-		if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 )	\
-		{																								\
-			portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );							\
-		}																								\
-	}
-
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
-
-/*-----------------------------------------------------------*/
-
-/* pxDelayedTaskList and pxOverflowDelayedTaskList are switched when the tick
-count overflows. */
-#define taskSWITCH_DELAYED_LISTS()																	\
-{																									\
-	List_t *pxTemp;																					\
-																									\
-	/* The delayed tasks list should be empty when the lists are switched. */						\
-	configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );										\
-																									\
-	pxTemp = pxDelayedTaskList;																		\
-	pxDelayedTaskList = pxOverflowDelayedTaskList;													\
-	pxOverflowDelayedTaskList = pxTemp;																\
-	xNumOfOverflows++;																				\
-	prvResetNextTaskUnblockTime();																	\
-}
-
-/*-----------------------------------------------------------*/
-
-/*
- * Place the task represented by pxTCB into the appropriate ready list for
- * the task.  It is inserted at the end of the list.
- */
-#define prvAddTaskToReadyList( pxTCB )																\
-	traceMOVED_TASK_TO_READY_STATE( pxTCB );														\
-	taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );												\
-	vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
-	tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
-/*-----------------------------------------------------------*/
-
-/*
- * Several functions take an TaskHandle_t parameter that can optionally be NULL,
- * where NULL is used to indicate that the handle of the currently executing
- * task should be used in place of the parameter.  This macro simply checks to
- * see if the parameter is NULL and returns a pointer to the appropriate TCB.
- */
-#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? ( TCB_t * ) pxCurrentTCB : ( TCB_t * ) ( pxHandle ) )
-
-/* The item value of the event list item is normally used to hold the priority
-of the task to which it belongs (coded to allow it to be held in reverse
-priority order).  However, it is occasionally borrowed for other purposes.  It
-is important its value is not updated due to a task priority change while it is
-being used for another purpose.  The following bit definition is used to inform
-the scheduler that the value should not be changed - in which case it is the
-responsibility of whichever module is using the value to ensure it gets set back
-to its original value when it is released. */
-#if( configUSE_16_BIT_TICKS == 1 )
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x8000U
-#else
-	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x80000000UL
-#endif
-
-/*
- * Task control block.  A task control block (TCB) is allocated for each task,
- * and stores task state information, including a pointer to the task's context
- * (the task's run time environment, including register values)
- */
-typedef struct tskTaskControlBlock
-{
-	volatile StackType_t	*pxTopOfStack;	/*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
-
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-		xMPU_SETTINGS	xMPUSettings;		/*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
-	#endif
-
-	ListItem_t			xStateListItem;	/*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
-	ListItem_t			xEventListItem;		/*< Used to reference a task from an event list. */
-	UBaseType_t			uxPriority;			/*< The priority of the task.  0 is the lowest priority. */
-	StackType_t			*pxStack;			/*< Points to the start of the stack. */
-	char				pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-	#if ( portSTACK_GROWTH > 0 )
-		StackType_t		*pxEndOfStack;		/*< Points to the end of the stack on architectures where the stack grows up from low memory. */
-	#endif
-
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-		UBaseType_t		uxCriticalNesting;	/*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
-	#endif
-
-	#if ( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t		uxTCBNumber;		/*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
-		UBaseType_t		uxTaskNumber;		/*< Stores a number specifically for use by third party trace code. */
-	#endif
-
-	#if ( configUSE_MUTEXES == 1 )
-		UBaseType_t		uxBasePriority;		/*< The priority last assigned to the task - used by the priority inheritance mechanism. */
-		UBaseType_t		uxMutexesHeld;
-	#endif
-
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-		TaskHookFunction_t pxTaskTag;
-	#endif
-
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
-		void *pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
-	#endif
-
-	#if( configGENERATE_RUN_TIME_STATS == 1 )
-		uint32_t		ulRunTimeCounter;	/*< Stores the amount of time the task has spent in the Running state. */
-	#endif
-
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		/* Allocate a Newlib reent structure that is specific to this task.
-		Note Newlib support has been included by popular demand, but is not
-		used by the FreeRTOS maintainers themselves.  FreeRTOS is not
-		responsible for resulting newlib operation.  User must be familiar with
-		newlib and must provide system-wide implementations of the necessary
-		stubs. Be warned that (at the time of writing) the current newlib design
-		implements a system-wide malloc() that must be provided with locks. */
-		struct	_reent xNewLib_reent;
-	#endif
-
-	#if( configUSE_TASK_NOTIFICATIONS == 1 )
-		volatile uint32_t ulNotifiedValue;
-		volatile uint8_t ucNotifyState;
-	#endif
-
-	/* See the comments above the definition of
-	tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
-	#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-		uint8_t	ucStaticallyAllocated; 		/*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
-	#endif
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-		uint8_t ucDelayAborted;
-	#endif
-
-} tskTCB;
-
-/* The old tskTCB name is maintained above then typedefed to the new TCB_t name
-below to enable the use of older kernel aware debuggers. */
-typedef tskTCB TCB_t;
-
-/*lint -e956 A manual analysis and inspection has been used to determine which
-static variables must be declared volatile. */
-
-PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
-
-/* Lists for ready and blocked tasks. --------------------*/
-PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList1;						/*< Delayed tasks. */
-PRIVILEGED_DATA static List_t xDelayedTaskList2;						/*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
-PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t xPendingReadyList;						/*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
-
-#if( INCLUDE_vTaskDelete == 1 )
-
-	PRIVILEGED_DATA static List_t xTasksWaitingTermination;				/*< Tasks that have been deleted - but their memory not yet freed. */
-	PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
-
-#endif
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	PRIVILEGED_DATA static List_t xSuspendedTaskList;					/*< Tasks that are currently suspended. */
-
-#endif
-
-/* Other file private variables. --------------------------------*/
-PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xTickCount 				= ( TickType_t ) 0U;
-PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority 		= tskIDLE_PRIORITY;
-PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning 		= pdFALSE;
-PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks 			= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
-PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
-PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
-PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle					= NULL;			/*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
-
-/* Context switches are held pending while the scheduler is suspended.  Also,
-interrupts must not manipulate the xStateListItem of a TCB, or any of the
-lists the xStateListItem can be referenced from, if the scheduler is suspended.
-If an interrupt needs to unblock a task while the scheduler is suspended then it
-moves the task's event list item into the xPendingReadyList, ready for the
-kernel to move the task from the pending ready list into the real ready list
-when the scheduler is unsuspended.  The pending ready list itself can only be
-accessed from a critical section. */
-PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t ) pdFALSE;
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
-	PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;	/*< Holds the value of a timer/counter the last time a task was switched in. */
-	PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL;		/*< Holds the total amount of execution time as defined by the run time counter clock. */
-
-#endif
-
-/*lint +e956 */
-
-/*-----------------------------------------------------------*/
-
-/* Callback function prototypes. --------------------------*/
-#if(  configCHECK_FOR_STACK_OVERFLOW > 0 )
-	extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );
-#endif
-
-#if( configUSE_TICK_HOOK > 0 )
-	extern void vApplicationTickHook( void );
-#endif
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	extern void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
-#endif
-
-/* File private functions. --------------------------------*/
-
-/**
- * Utility task that simply returns pdTRUE if the task referenced by xTask is
- * currently in the Suspended state, or pdFALSE if the task referenced by xTask
- * is in any other state.
- */
-#if ( INCLUDE_vTaskSuspend == 1 )
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-#endif /* INCLUDE_vTaskSuspend */
-
-/*
- * Utility to ready all the lists used by the scheduler.  This is called
- * automatically upon the creation of the first task.
- */
-static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The idle task, which as all tasks is implemented as a never ending loop.
- * The idle task is automatically created and added to the ready lists upon
- * creation of the first user task.
- *
- * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific
- * language extensions.  The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
-
-/*
- * Utility to free all memory allocated by the scheduler to hold a TCB,
- * including the stack pointed to by the TCB.
- *
- * This does not free memory allocated by the task itself (i.e. memory
- * allocated by calls to pvPortMalloc from within the tasks application code).
- */
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	static void prvDeleteTCB( TCB_t *pxTCB ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Used only by the idle task.  This checks to see if anything has been placed
- * in the list of tasks waiting to be deleted.  If so the task is cleaned up
- * and its TCB deleted.
- */
-static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The currently executing task is entering the Blocked state.  Add the task to
- * either the current or the overflow delayed task list.
- */
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
-
-/*
- * Fills an TaskStatus_t structure with information on each task that is
- * referenced from the pxList list (which may be a ready list, a delayed list,
- * a suspended list, etc.).
- *
- * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM
- * NORMAL APPLICATION CODE.
- */
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Searches pxList for a task with name pcNameToQuery - returning a handle to
- * the task if it is found, or NULL if the task is not found.
- */
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * When a task is created, the stack of the task is filled with a known value.
- * This function determines the 'high water mark' of the task stack by
- * determining how much of the stack remains at the original preset value.
- */
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
-	static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Return the amount of time, in ticks, that will pass before the kernel will
- * next move a task from the Blocked state to the Running state.
- *
- * This conditional compilation should use inequality to 0, not equality to 1.
- * This is to ensure portSUPPRESS_TICKS_AND_SLEEP() can be called when user
- * defined low power mode implementations require configUSE_TICKLESS_IDLE to be
- * set to a value other than 1.
- */
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Set xNextTaskUnblockTime to the time at which the next Blocked state task
- * will exit the Blocked state.
- */
-static void prvResetNextTaskUnblockTime( void );
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	/*
-	 * Helper function used to pad task names with spaces when printing out
-	 * human readable tables of task information.
-	 */
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Called after a Task_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-
-/*
- * Called after a new task has been created and initialised to place the task
- * under the control of the scheduler.
- */
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									StackType_t * const puxStackBuffer,
-									StaticTask_t * const pxTaskBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	TCB_t *pxNewTCB;
-	TaskHandle_t xReturn;
-
-		configASSERT( puxStackBuffer != NULL );
-		configASSERT( pxTaskBuffer != NULL );
-
-		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
-		{
-			/* The memory used for the task's TCB and stack are passed into this
-			function - use them. */
-			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
-
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created statically in case the task is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-		}
-		else
-		{
-			xReturn = NULL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* SUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( portUSING_MPU_WRAPPERS == 1 )
-
-	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-
-		configASSERT( pxTaskDefinition->puxStackBuffer );
-
-		if( pxTaskDefinition->puxStackBuffer != NULL )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends
-			on the implementation of the port malloc function and whether or
-			not static allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
-
-			if( pxNewTCB != NULL )
-			{
-				/* Store the stack location in the TCB. */
-				pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
-
-				/* Tasks can be created statically or dynamically, so note
-				this task had a statically allocated stack in case it is
-				later deleted.  The TCB was allocated dynamically. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
-
-				prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
-										pxTaskDefinition->pcName,
-										( uint32_t ) pxTaskDefinition->usStackDepth,
-										pxTaskDefinition->pvParameters,
-										pxTaskDefinition->uxPriority,
-										pxCreatedTask, pxNewTCB,
-										pxTaskDefinition->xRegions );
-
-				prvAddNewTaskToReadyList( pxNewTCB );
-				xReturn = pdPASS;
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* portUSING_MPU_WRAPPERS */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
-							const char * const pcName,
-							const uint16_t usStackDepth,
-							void * const pvParameters,
-							UBaseType_t uxPriority,
-							TaskHandle_t * const pxCreatedTask ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	TCB_t *pxNewTCB;
-	BaseType_t xReturn;
-
-		/* If the stack grows down then allocate the stack then the TCB so the stack
-		does not grow into the TCB.  Likewise if the stack grows up then allocate
-		the TCB then the stack. */
-		#if( portSTACK_GROWTH > 0 )
-		{
-			/* Allocate space for the TCB.  Where the memory comes from depends on
-			the implementation of the port malloc function and whether or not static
-			allocation is being used. */
-			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
-
-			if( pxNewTCB != NULL )
-			{
-				/* Allocate space for the stack used by the task being created.
-				The base of the stack memory stored in the TCB so the task can
-				be deleted later if required. */
-				pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-				if( pxNewTCB->pxStack == NULL )
-				{
-					/* Could not allocate the stack.  Delete the allocated TCB. */
-					vPortFree( pxNewTCB );
-					pxNewTCB = NULL;
-				}
-			}
-		}
-		#else /* portSTACK_GROWTH */
-		{
-		StackType_t *pxStack;
-
-			/* Allocate space for the stack used by the task being created. */
-			pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-			if( pxStack != NULL )
-			{
-				/* Allocate space for the TCB. */
-				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e961 MISRA exception as the casts are only redundant for some paths. */
-
-				if( pxNewTCB != NULL )
-				{
-					/* Store the stack location in the TCB. */
-					pxNewTCB->pxStack = pxStack;
-				}
-				else
-				{
-					/* The stack cannot be used as the TCB was not created.  Free
-					it again. */
-					vPortFree( pxStack );
-				}
-			}
-			else
-			{
-				pxNewTCB = NULL;
-			}
-		}
-		#endif /* portSTACK_GROWTH */
-
-		if( pxNewTCB != NULL )
-		{
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created dynamically in case it is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
-			prvAddNewTaskToReadyList( pxNewTCB );
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
-									const char * const pcName,
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-StackType_t *pxTopOfStack;
-UBaseType_t x;
-
-	#if( portUSING_MPU_WRAPPERS == 1 )
-		/* Should the task be created in privileged mode? */
-		BaseType_t xRunPrivileged;
-		if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
-		{
-			xRunPrivileged = pdTRUE;
-		}
-		else
-		{
-			xRunPrivileged = pdFALSE;
-		}
-		uxPriority &= ~portPRIVILEGE_BIT;
-	#endif /* portUSING_MPU_WRAPPERS == 1 */
-
-	/* Avoid dependency on memset() if it is not required. */
-	#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-	{
-		/* Fill the stack with a known value to assist debugging. */
-		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
-	}
-	#endif /* ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) ) */
-
-	/* Calculate the top of stack address.  This depends on whether the stack
-	grows from high memory to low (as per the 80x86) or vice versa.
-	portSTACK_GROWTH is used to make the result positive or negative as required
-	by the port. */
-	#if( portSTACK_GROWTH < 0 )
-	{
-		pxTopOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type. */
-
-		/* Check the alignment of the calculated top of stack is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-	}
-	#else /* portSTACK_GROWTH */
-	{
-		pxTopOfStack = pxNewTCB->pxStack;
-
-		/* Check the alignment of the stack buffer is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-
-		/* The other extreme of the stack space is required if stack checking is
-		performed. */
-		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-	}
-	#endif /* portSTACK_GROWTH */
-
-	/* Store the task name in the TCB. */
-	for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-	{
-		pxNewTCB->pcTaskName[ x ] = pcName[ x ];
-
-		/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
-		configMAX_TASK_NAME_LEN characters just in case the memory after the
-		string is not accessible (extremely unlikely). */
-		if( pcName[ x ] == 0x00 )
-		{
-			break;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	/* Ensure the name string is terminated in the case that the string length
-	was greater or equal to configMAX_TASK_NAME_LEN. */
-	pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
-
-	/* This is used as an array index so must ensure it's not too large.  First
-	remove the privilege bit if one is present. */
-	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-	{
-		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxNewTCB->uxPriority = uxPriority;
-	#if ( configUSE_MUTEXES == 1 )
-	{
-		pxNewTCB->uxBasePriority = uxPriority;
-		pxNewTCB->uxMutexesHeld = 0;
-	}
-	#endif /* configUSE_MUTEXES */
-
-	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
-	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
-
-	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
-	back to	the containing TCB from a generic item in a list. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
-
-	/* Event lists are always in priority order. */
-	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
-
-	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-	{
-		pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
-	}
-	#endif /* portCRITICAL_NESTING_IN_TCB */
-
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	{
-		pxNewTCB->pxTaskTag = NULL;
-	}
-	#endif /* configUSE_APPLICATION_TASK_TAG */
-
-	#if ( configGENERATE_RUN_TIME_STATS == 1 )
-	{
-		pxNewTCB->ulRunTimeCounter = 0UL;
-	}
-	#endif /* configGENERATE_RUN_TIME_STATS */
-
-	#if ( portUSING_MPU_WRAPPERS == 1 )
-	{
-		vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
-	}
-	#else
-	{
-		/* Avoid compiler warning about unreferenced parameter. */
-		( void ) xRegions;
-	}
-	#endif
-
-	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-	{
-		for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )
-		{
-			pxNewTCB->pvThreadLocalStoragePointers[ x ] = NULL;
-		}
-	}
-	#endif
-
-	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
-	{
-		pxNewTCB->ulNotifiedValue = 0;
-		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-	}
-	#endif
-
-	#if ( configUSE_NEWLIB_REENTRANT == 1 )
-	{
-		/* Initialise this task's Newlib reent structure. */
-		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
-	}
-	#endif
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		pxNewTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
-
-	/* Initialize the TCB stack to look as if the task was already running,
-	but had been interrupted by the scheduler.  The return address is set
-	to the start of the task function. Once the stack has been initialised
-	the	top of stack variable is updated. */
-	#if( portUSING_MPU_WRAPPERS == 1 )
-	{
-		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
-	}
-	#else /* portUSING_MPU_WRAPPERS */
-	{
-		pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
-	}
-	#endif /* portUSING_MPU_WRAPPERS */
-
-	if( ( void * ) pxCreatedTask != NULL )
-	{
-		/* Pass the handle out in an anonymous way.  The handle can be used to
-		change the created task's priority, delete the created task, etc.*/
-		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
-{
-	/* Ensure interrupts don't access the task lists while the lists are being
-	updated. */
-	taskENTER_CRITICAL();
-	{
-		uxCurrentNumberOfTasks++;
-		if( pxCurrentTCB == NULL )
-		{
-			/* There are no other tasks, or all the other tasks are in
-			the suspended state - make this the current task. */
-			pxCurrentTCB = pxNewTCB;
-
-			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
-			{
-				/* This is the first task to be created so do the preliminary
-				initialisation required.  We will not recover if this call
-				fails, but we will report the failure. */
-				prvInitialiseTaskLists();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			/* If the scheduler is not already running, make this task the
-			current task if it is the highest priority task to be created
-			so far. */
-			if( xSchedulerRunning == pdFALSE )
-			{
-				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
-				{
-					pxCurrentTCB = pxNewTCB;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		uxTaskNumber++;
-
-		#if ( configUSE_TRACE_FACILITY == 1 )
-		{
-			/* Add a counter into the TCB for tracing only. */
-			pxNewTCB->uxTCBNumber = uxTaskNumber;
-		}
-		#endif /* configUSE_TRACE_FACILITY */
-		traceTASK_CREATE( pxNewTCB );
-
-		prvAddTaskToReadyList( pxNewTCB );
-
-		portSETUP_TCB( pxNewTCB );
-	}
-	taskEXIT_CRITICAL();
-
-	if( xSchedulerRunning != pdFALSE )
-	{
-		/* If the created task is of a higher priority than the current task
-		then it should run now. */
-		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
-		{
-			taskYIELD_IF_USING_PREEMPTION();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	void vTaskDelete( TaskHandle_t xTaskToDelete )
-	{
-	TCB_t *pxTCB;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the calling task that is
-			being deleted. */
-			pxTCB = prvGetTCBFromHandle( xTaskToDelete );
-
-			/* Remove task from the ready list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Increment the uxTaskNumber also so kernel aware debuggers can
-			detect that the task lists need re-generating.  This is done before
-			portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
-			not return. */
-			uxTaskNumber++;
-
-			if( pxTCB == pxCurrentTCB )
-			{
-				/* A task is deleting itself.  This cannot complete within the
-				task itself, as a context switch to another task is required.
-				Place the task in the termination list.  The idle task will
-				check the termination list and free up any memory allocated by
-				the scheduler for the TCB and stack of the deleted task. */
-				vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
-
-				/* Increment the ucTasksDeleted variable so the idle task knows
-				there is a task that has been deleted and that it should therefore
-				check the xTasksWaitingTermination list. */
-				++uxDeletedTasksWaitingCleanUp;
-
-				/* The pre-delete hook is primarily for the Windows simulator,
-				in which Windows specific clean up operations are performed,
-				after which it is not possible to yield away from this task -
-				hence xYieldPending is used to latch that a context switch is
-				required. */
-				portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
-			}
-			else
-			{
-				--uxCurrentNumberOfTasks;
-				prvDeleteTCB( pxTCB );
-
-				/* Reset the next expected unblock time in case it referred to
-				the task that has just been deleted. */
-				prvResetNextTaskUnblockTime();
-			}
-
-			traceTASK_DELETE( pxTCB );
-		}
-		taskEXIT_CRITICAL();
-
-		/* Force a reschedule if it is the currently running task that has just
-		been deleted. */
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxTCB == pxCurrentTCB )
-			{
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelete */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelayUntil == 1 )
-
-	void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )
-	{
-	TickType_t xTimeToWake;
-	BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
-
-		configASSERT( pxPreviousWakeTime );
-		configASSERT( ( xTimeIncrement > 0U ) );
-		configASSERT( uxSchedulerSuspended == 0 );
-
-		vTaskSuspendAll();
-		{
-			/* Minor optimisation.  The tick count cannot change in this
-			block. */
-			const TickType_t xConstTickCount = xTickCount;
-
-			/* Generate the tick time at which the task wants to wake. */
-			xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
-
-			if( xConstTickCount < *pxPreviousWakeTime )
-			{
-				/* The tick count has overflowed since this function was
-				lasted called.  In this case the only time we should ever
-				actually delay is if the wake time has also	overflowed,
-				and the wake time is greater than the tick time.  When this
-				is the case it is as if neither time had overflowed. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				/* The tick time has not overflowed.  In this case we will
-				delay if either the wake time has overflowed, and/or the
-				tick time is less than the wake time. */
-				if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
-				{
-					xShouldDelay = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-
-			/* Update the wake time ready for the next call. */
-			*pxPreviousWakeTime = xTimeToWake;
-
-			if( xShouldDelay != pdFALSE )
-			{
-				traceTASK_DELAY_UNTIL( xTimeToWake );
-
-				/* prvAddCurrentTaskToDelayedList() needs the block time, not
-				the time to wake, so subtract the current tick count. */
-				prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		xAlreadyYielded = xTaskResumeAll();
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelayUntil */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelay == 1 )
-
-	void vTaskDelay( const TickType_t xTicksToDelay )
-	{
-	BaseType_t xAlreadyYielded = pdFALSE;
-
-		/* A delay time of zero just forces a reschedule. */
-		if( xTicksToDelay > ( TickType_t ) 0U )
-		{
-			configASSERT( uxSchedulerSuspended == 0 );
-			vTaskSuspendAll();
-			{
-				traceTASK_DELAY();
-
-				/* A task that is removed from the event list while the
-				scheduler is suspended will not get placed in the ready
-				list or removed from the blocked list until the scheduler
-				is resumed.
-
-				This task cannot be in an event list as it is the currently
-				executing task. */
-				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
-			}
-			xAlreadyYielded = xTaskResumeAll();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
-		{
-			portYIELD_WITHIN_API();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskDelay */
-/*-----------------------------------------------------------*/
-
-#if( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) )
-
-	eTaskState eTaskGetState( TaskHandle_t xTask )
-	{
-	eTaskState eReturn;
-	List_t *pxStateList;
-	const TCB_t * const pxTCB = ( TCB_t * ) xTask;
-
-		configASSERT( pxTCB );
-
-		if( pxTCB == pxCurrentTCB )
-		{
-			/* The task calling this function is querying its own state. */
-			eReturn = eRunning;
-		}
-		else
-		{
-			taskENTER_CRITICAL();
-			{
-				pxStateList = ( List_t * ) listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
-			}
-			taskEXIT_CRITICAL();
-
-			if( ( pxStateList == pxDelayedTaskList ) || ( pxStateList == pxOverflowDelayedTaskList ) )
-			{
-				/* The task being queried is referenced from one of the Blocked
-				lists. */
-				eReturn = eBlocked;
-			}
-
-			#if ( INCLUDE_vTaskSuspend == 1 )
-				else if( pxStateList == &xSuspendedTaskList )
-				{
-					/* The task being queried is referenced from the suspended
-					list.  Is it genuinely suspended or is it block
-					indefinitely? */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
-					{
-						eReturn = eSuspended;
-					}
-					else
-					{
-						eReturn = eBlocked;
-					}
-				}
-			#endif
-
-			#if ( INCLUDE_vTaskDelete == 1 )
-				else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
-				{
-					/* The task being queried is referenced from the deleted
-					tasks list, or it is not referenced from any lists at
-					all. */
-					eReturn = eDeleted;
-				}
-			#endif
-
-			else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
-			{
-				/* If the task is not in any other state, it must be in the
-				Ready (including pending ready) state. */
-				eReturn = eReady;
-			}
-		}
-
-		return eReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
-
-#endif /* INCLUDE_eTaskGetState */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskPriorityGet == 1 )
-
-	UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the that
-			called uxTaskPriorityGet() that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		taskEXIT_CRITICAL();
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskPriorityGet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskPriorityGet == 1 )
-
-	UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxReturn, uxSavedInterruptState;
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being queried. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-			uxReturn = pxTCB->uxPriority;
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskPriorityGet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskPrioritySet == 1 )
-
-	void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority )
-	{
-	TCB_t *pxTCB;
-	UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
-	BaseType_t xYieldRequired = pdFALSE;
-
-		configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
-
-		/* Ensure the new priority is valid. */
-		if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
-		{
-			uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the priority of the calling
-			task that is being changed. */
-			pxTCB = prvGetTCBFromHandle( xTask );
-
-			traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
-
-			#if ( configUSE_MUTEXES == 1 )
-			{
-				uxCurrentBasePriority = pxTCB->uxBasePriority;
-			}
-			#else
-			{
-				uxCurrentBasePriority = pxTCB->uxPriority;
-			}
-			#endif
-
-			if( uxCurrentBasePriority != uxNewPriority )
-			{
-				/* The priority change may have readied a task of higher
-				priority than the calling task. */
-				if( uxNewPriority > uxCurrentBasePriority )
-				{
-					if( pxTCB != pxCurrentTCB )
-					{
-						/* The priority of a task other than the currently
-						running task is being raised.  Is the priority being
-						raised above that of the running task? */
-						if( uxNewPriority >= pxCurrentTCB->uxPriority )
-						{
-							xYieldRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						/* The priority of the running task is being raised,
-						but the running task must already be the highest
-						priority task able to run so no yield is required. */
-					}
-				}
-				else if( pxTCB == pxCurrentTCB )
-				{
-					/* Setting the priority of the running task down means
-					there may now be another task of higher priority that
-					is ready to execute. */
-					xYieldRequired = pdTRUE;
-				}
-				else
-				{
-					/* Setting the priority of any other task down does not
-					require a yield as the running task must be above the
-					new priority of the task being modified. */
-				}
-
-				/* Remember the ready list the task might be referenced from
-				before its uxPriority member is changed so the
-				taskRESET_READY_PRIORITY() macro can function correctly. */
-				uxPriorityUsedOnEntry = pxTCB->uxPriority;
-
-				#if ( configUSE_MUTEXES == 1 )
-				{
-					/* Only change the priority being used if the task is not
-					currently using an inherited priority. */
-					if( pxTCB->uxBasePriority == pxTCB->uxPriority )
-					{
-						pxTCB->uxPriority = uxNewPriority;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* The base priority gets set whatever. */
-					pxTCB->uxBasePriority = uxNewPriority;
-				}
-				#else
-				{
-					pxTCB->uxPriority = uxNewPriority;
-				}
-				#endif
-
-				/* Only reset the event list item value if the value is not
-				being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* If the task is in the blocked or suspended list we need do
-				nothing more than change it's priority variable. However, if
-				the task is in a ready list it needs to be removed and placed
-				in the list appropriate to its new priority. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-				{
-					/* The task is currently in its ready list - remove before adding
-					it to it's new ready list.  As we are in a critical section we
-					can do this even if the scheduler is suspended. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						/* It is known that the task is in its ready list so
-						there is no need to check again and the port level
-						reset macro can be called directly. */
-						portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				if( xYieldRequired != pdFALSE )
-				{
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* Remove compiler warning about unused variables when the port
-				optimised task selection is not being used. */
-				( void ) uxPriorityUsedOnEntry;
-			}
-		}
-		taskEXIT_CRITICAL();
-	}
-
-#endif /* INCLUDE_vTaskPrioritySet */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	void vTaskSuspend( TaskHandle_t xTaskToSuspend )
-	{
-	TCB_t *pxTCB;
-
-		taskENTER_CRITICAL();
-		{
-			/* If null is passed in here then it is the running task that is
-			being suspended. */
-			pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
-
-			traceTASK_SUSPEND( pxTCB );
-
-			/* Remove task from the ready/delayed list and place in the
-			suspended list. */
-			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-			{
-				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Is the task waiting on an event also? */
-			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-			{
-				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
-		}
-		taskEXIT_CRITICAL();
-
-		if( xSchedulerRunning != pdFALSE )
-		{
-			/* Reset the next expected unblock time in case it referred to the
-			task that is now in the Suspended state. */
-			taskENTER_CRITICAL();
-			{
-				prvResetNextTaskUnblockTime();
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		if( pxTCB == pxCurrentTCB )
-		{
-			if( xSchedulerRunning != pdFALSE )
-			{
-				/* The current task has just been suspended. */
-				configASSERT( uxSchedulerSuspended == 0 );
-				portYIELD_WITHIN_API();
-			}
-			else
-			{
-				/* The scheduler is not running, but the task that was pointed
-				to by pxCurrentTCB has just been suspended and pxCurrentTCB
-				must be adjusted to point to a different task. */
-				if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks )
-				{
-					/* No other tasks are ready, so set pxCurrentTCB back to
-					NULL so when the next task is created pxCurrentTCB will
-					be set to point to it no matter what its relative priority
-					is. */
-					pxCurrentTCB = NULL;
-				}
-				else
-				{
-					vTaskSwitchContext();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskSuspend */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
-	{
-	BaseType_t xReturn = pdFALSE;
-	const TCB_t * const pxTCB = ( TCB_t * ) xTask;
-
-		/* Accesses xPendingReadyList so must be called from a critical
-		section. */
-
-		/* It does not make sense to check if the calling task is suspended. */
-		configASSERT( xTask );
-
-		/* Is the task being resumed actually in the suspended list? */
-		if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
-		{
-			/* Has the task already been resumed from within an ISR? */
-			if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
-			{
-				/* Is it in the suspended list because it is in the	Suspended
-				state, or because is is blocked with no timeout? */
-				if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE )
-				{
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
-
-#endif /* INCLUDE_vTaskSuspend */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
-	void vTaskResume( TaskHandle_t xTaskToResume )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;
-
-		/* It does not make sense to resume the calling task. */
-		configASSERT( xTaskToResume );
-
-		/* The parameter cannot be NULL as it is impossible to resume the
-		currently executing task. */
-		if( ( pxTCB != NULL ) && ( pxTCB != pxCurrentTCB ) )
-		{
-			taskENTER_CRITICAL();
-			{
-				if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-				{
-					traceTASK_RESUME( pxTCB );
-
-					/* As we are in a critical section we can access the ready
-					lists even if the scheduler is suspended. */
-					( void ) uxListRemove(  &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-
-					/* We may have just resumed a higher priority task. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						/* This yield may not cause the task just resumed to run,
-						but will leave the lists in the correct state for the
-						next yield. */
-						taskYIELD_IF_USING_PREEMPTION();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			taskEXIT_CRITICAL();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* INCLUDE_vTaskSuspend */
-
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
-
-	BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
-	{
-	BaseType_t xYieldRequired = pdFALSE;
-	TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToResume );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
-			{
-				traceTASK_RESUME_FROM_ISR( pxTCB );
-
-				/* Check the ready lists can be accessed. */
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					/* Ready lists can be accessed so move the task from the
-					suspended list to the ready list directly. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldRequired = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed or ready lists cannot be accessed so the task
-					is held in the pending ready list until the scheduler is
-					unsuspended. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-		return xYieldRequired;
-	}
-
-#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-void vTaskStartScheduler( void )
-{
-BaseType_t xReturn;
-
-	/* Add the idle task at the lowest priority. */
-	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-	{
-		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
-		StackType_t *pxIdleTaskStackBuffer = NULL;
-		uint32_t ulIdleTaskStackSize;
-
-		/* The Idle task is created using user provided RAM - obtain the
-		address of the RAM then create the idle task. */
-		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
-		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
-												"IDLE",
-												ulIdleTaskStackSize,
-												( void * ) NULL,
-												( tskIDLE_PRIORITY | portPRIVILEGE_BIT ),
-												pxIdleTaskStackBuffer,
-												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
-
-		if( xIdleTaskHandle != NULL )
-		{
-			xReturn = pdPASS;
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-	}
-	#else
-	{
-		/* The Idle task is being created using dynamically allocated RAM. */
-		xReturn = xTaskCreate(	prvIdleTask,
-								"IDLE", configMINIMAL_STACK_SIZE,
-								( void * ) NULL,
-								( tskIDLE_PRIORITY | portPRIVILEGE_BIT ),
-								&xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
-	}
-	#endif /* configSUPPORT_STATIC_ALLOCATION */
-
-	#if ( configUSE_TIMERS == 1 )
-	{
-		if( xReturn == pdPASS )
-		{
-			xReturn = xTimerCreateTimerTask();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_TIMERS */
-
-	if( xReturn == pdPASS )
-	{
-		/* Interrupts are turned off here, to ensure a tick does not occur
-		before or during the call to xPortStartScheduler().  The stacks of
-		the created tasks contain a status word with interrupts switched on
-		so interrupts will automatically get re-enabled when the first task
-		starts to run. */
-		portDISABLE_INTERRUPTS();
-
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to the task that will run first. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-
-		xNextTaskUnblockTime = portMAX_DELAY;
-		xSchedulerRunning = pdTRUE;
-		xTickCount = ( TickType_t ) 0U;
-
-		/* If configGENERATE_RUN_TIME_STATS is defined then the following
-		macro must be defined to configure the timer/counter used to generate
-		the run time counter time base. */
-		portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
-
-		/* Setting up the timer tick is hardware specific and thus in the
-		portable interface. */
-		if( xPortStartScheduler() != pdFALSE )
-		{
-			/* Should not reach here as if the scheduler is running the
-			function will not return. */
-		}
-		else
-		{
-			/* Should only reach here if a task calls xTaskEndScheduler(). */
-		}
-	}
-	else
-	{
-		/* This line will only be reached if the kernel could not be started,
-		because there was not enough FreeRTOS heap to create the idle task
-		or the timer task. */
-		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
-	}
-
-	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
-	meaning xIdleTaskHandle is not used anywhere else. */
-	( void ) xIdleTaskHandle;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskEndScheduler( void )
-{
-	/* Stop the scheduler interrupts and call the portable scheduler end
-	routine so the original ISRs can be restored if necessary.  The port
-	layer must ensure interrupts enable	bit is left in the correct state. */
-	portDISABLE_INTERRUPTS();
-	xSchedulerRunning = pdFALSE;
-	vPortEndScheduler();
-}
-/*----------------------------------------------------------*/
-
-void vTaskSuspendAll( void )
-{
-	/* A critical section is not required as the variable is of type
-	BaseType_t.  Please read Richard Barry's reply in the following link to a
-	post in the FreeRTOS support forum before reporting this as a bug! -
-	http://goo.gl/wu4acr */
-	++uxSchedulerSuspended;
-}
-/*----------------------------------------------------------*/
-
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	static TickType_t prvGetExpectedIdleTime( void )
-	{
-	TickType_t xReturn;
-	UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
-
-		/* uxHigherPriorityReadyTasks takes care of the case where
-		configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
-		task that are in the Ready state, even though the idle task is
-		running. */
-		#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
-		{
-			if( uxTopReadyPriority > tskIDLE_PRIORITY )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#else
-		{
-			const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
-
-			/* When port optimised task selection is used the uxTopReadyPriority
-			variable is used as a bit map.  If bits other than the least
-			significant bit are set then there are tasks that have a priority
-			above the idle priority that are in the Ready state.  This takes
-			care of the case where the co-operative scheduler is in use. */
-			if( uxTopReadyPriority > uxLeastSignificantBit )
-			{
-				uxHigherPriorityReadyTasks = pdTRUE;
-			}
-		}
-		#endif
-
-		if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
-		{
-			xReturn = 0;
-		}
-		else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
-		{
-			/* There are other idle priority tasks in the ready state.  If
-			time slicing is used then the very next tick interrupt must be
-			processed. */
-			xReturn = 0;
-		}
-		else if( uxHigherPriorityReadyTasks != pdFALSE )
-		{
-			/* There are tasks in the Ready state that have a priority above the
-			idle priority.  This path can only be reached if
-			configUSE_PREEMPTION is 0. */
-			xReturn = 0;
-		}
-		else
-		{
-			xReturn = xNextTaskUnblockTime - xTickCount;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskResumeAll( void )
-{
-TCB_t *pxTCB = NULL;
-BaseType_t xAlreadyYielded = pdFALSE;
-
-	/* If uxSchedulerSuspended is zero then this function does not match a
-	previous call to vTaskSuspendAll(). */
-	configASSERT( uxSchedulerSuspended );
-
-	/* It is possible that an ISR caused a task to be removed from an event
-	list while the scheduler was suspended.  If this was the case then the
-	removed task will have been added to the xPendingReadyList.  Once the
-	scheduler has been resumed it is safe to move all the pending ready
-	tasks from this list into their appropriate ready list. */
-	taskENTER_CRITICAL();
-	{
-		--uxSchedulerSuspended;
-
-		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-		{
-			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
-			{
-				/* Move any readied tasks from the pending list into the
-				appropriate ready list. */
-				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
-				{
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
-					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-
-					/* If the moved task has a priority higher than the current
-					task then a yield must be performed. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-					{
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( pxTCB != NULL )
-				{
-					/* A task was unblocked while the scheduler was suspended,
-					which may have prevented the next unblock time from being
-					re-calculated, in which case re-calculate it now.  Mainly
-					important for low power tickless implementations, where
-					this can prevent an unnecessary exit from low power
-					state. */
-					prvResetNextTaskUnblockTime();
-				}
-
-				/* If any ticks occurred while the scheduler was suspended then
-				they should be processed now.  This ensures the tick count does
-				not	slip, and that any delayed tasks are resumed at the correct
-				time. */
-				{
-					UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
-
-					if( uxPendedCounts > ( UBaseType_t ) 0U )
-					{
-						do
-						{
-							if( xTaskIncrementTick() != pdFALSE )
-							{
-								xYieldPending = pdTRUE;
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-							--uxPendedCounts;
-						} while( uxPendedCounts > ( UBaseType_t ) 0U );
-
-						uxPendedTicks = 0;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( xYieldPending != pdFALSE )
-				{
-					#if( configUSE_PREEMPTION != 0 )
-					{
-						xAlreadyYielded = pdTRUE;
-					}
-					#endif
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xAlreadyYielded;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTaskGetTickCount( void )
-{
-TickType_t xTicks;
-
-	/* Critical section required if running on a 16 bit processor. */
-	portTICK_TYPE_ENTER_CRITICAL();
-	{
-		xTicks = xTickCount;
-	}
-	portTICK_TYPE_EXIT_CRITICAL();
-
-	return xTicks;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTaskGetTickCountFromISR( void )
-{
-TickType_t xReturn;
-UBaseType_t uxSavedInterruptStatus;
-
-	/* RTOS ports that support interrupt nesting have the concept of a maximum
-	system call (or maximum API call) interrupt priority.  Interrupts that are
-	above the maximum system call priority are kept permanently enabled, even
-	when the RTOS kernel is in a critical section, but cannot make any calls to
-	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
-	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-	failure if a FreeRTOS API function is called from an interrupt that has been
-	assigned a priority above the configured maximum system call priority.
-	Only FreeRTOS functions that end in FromISR can be called from interrupts
-	that have been assigned a priority at or (logically) below the maximum
-	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
-	safe API to ensure interrupt entry is as fast and as simple as possible.
-	More information (albeit Cortex-M specific) is provided on the following
-	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
-	{
-		xReturn = xTickCount;
-	}
-	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxTaskGetNumberOfTasks( void )
-{
-	/* A critical section is not required because the variables are of type
-	BaseType_t. */
-	return uxCurrentNumberOfTasks;
-}
-/*-----------------------------------------------------------*/
-
-char *pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-TCB_t *pxTCB;
-
-	/* If null is passed in here then the name of the calling task is being
-	queried. */
-	pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-	configASSERT( pxTCB );
-	return &( pxTCB->pcTaskName[ 0 ] );
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] )
-	{
-	TCB_t *pxNextTCB, *pxFirstTCB, *pxReturn = NULL;
-	UBaseType_t x;
-	char cNextChar;
-
-		/* This function is called with the scheduler suspended. */
-
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
-
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
-
-				/* Check each character in the name looking for a match or
-				mismatch. */
-				for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
-				{
-					cNextChar = pxNextTCB->pcTaskName[ x ];
-
-					if( cNextChar != pcNameToQuery[ x ] )
-					{
-						/* Characters didn't match. */
-						break;
-					}
-					else if( cNextChar == 0x00 )
-					{
-						/* Both strings terminated, a match must have been
-						found. */
-						pxReturn = pxNextTCB;
-						break;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( pxReturn != NULL )
-				{
-					/* The handle has been found. */
-					break;
-				}
-
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return pxReturn;
-	}
-
-#endif /* INCLUDE_xTaskGetHandle */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetHandle == 1 )
-
-	TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	UBaseType_t uxQueue = configMAX_PRIORITIES;
-	TCB_t* pxTCB;
-
-		/* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
-		configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
-
-		vTaskSuspendAll();
-		{
-			/* Search the ready lists. */
-			do
-			{
-				uxQueue--;
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
-
-				if( pxTCB != NULL )
-				{
-					/* Found the handle. */
-					break;
-				}
-
-			} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-			/* Search the delayed lists. */
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
-			}
-
-			if( pxTCB == NULL )
-			{
-				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
-			}
-
-			#if ( INCLUDE_vTaskSuspend == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the suspended list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
-				}
-			}
-			#endif
-
-			#if( INCLUDE_vTaskDelete == 1 )
-			{
-				if( pxTCB == NULL )
-				{
-					/* Search the deleted list. */
-					pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
-				}
-			}
-			#endif
-		}
-		( void ) xTaskResumeAll();
-
-		return ( TaskHandle_t ) pxTCB;
-	}
-
-#endif /* INCLUDE_xTaskGetHandle */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime )
-	{
-	UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
-
-		vTaskSuspendAll();
-		{
-			/* Is there a space in the array for each task in the system? */
-			if( uxArraySize >= uxCurrentNumberOfTasks )
-			{
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Ready state. */
-				do
-				{
-					uxQueue--;
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
-
-				} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-				/* Fill in an TaskStatus_t structure with information on each
-				task in the Blocked state. */
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
-				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
-
-				#if( INCLUDE_vTaskDelete == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task that has been deleted but not yet cleaned up. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
-				}
-				#endif
-
-				#if ( INCLUDE_vTaskSuspend == 1 )
-				{
-					/* Fill in an TaskStatus_t structure with information on
-					each task in the Suspended state. */
-					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
-				}
-				#endif
-
-				#if ( configGENERATE_RUN_TIME_STATS == 1)
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-							portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
-						#else
-							*pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-						#endif
-					}
-				}
-				#else
-				{
-					if( pulTotalRunTime != NULL )
-					{
-						*pulTotalRunTime = 0;
-					}
-				}
-				#endif
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		( void ) xTaskResumeAll();
-
-		return uxTask;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
-
-	TaskHandle_t xTaskGetIdleTaskHandle( void )
-	{
-		/* If xTaskGetIdleTaskHandle() is called before the scheduler has been
-		started, then xIdleTaskHandle will be NULL. */
-		configASSERT( ( xIdleTaskHandle != NULL ) );
-		return xIdleTaskHandle;
-	}
-
-#endif /* INCLUDE_xTaskGetIdleTaskHandle */
-/*----------------------------------------------------------*/
-
-/* This conditional compilation should use inequality to 0, not equality to 1.
-This is to ensure vTaskStepTick() is available when user defined low power mode
-implementations require configUSE_TICKLESS_IDLE to be set to a value other than
-1. */
-#if ( configUSE_TICKLESS_IDLE != 0 )
-
-	void vTaskStepTick( const TickType_t xTicksToJump )
-	{
-		/* Correct the tick count value after a period during which the tick
-		was suppressed.  Note this does *not* call the tick hook function for
-		each stepped tick. */
-		configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
-		xTickCount += xTicksToJump;
-		traceINCREASE_TICK_COUNT( xTicksToJump );
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskAbortDelay == 1 )
-
-	BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB = ( TCB_t * ) xTask;
-	BaseType_t xReturn = pdFALSE;
-
-		configASSERT( pxTCB );
-
-		vTaskSuspendAll();
-		{
-			/* A task can only be prematurely removed from the Blocked state if
-			it is actually in the Blocked state. */
-			if( eTaskGetState( xTask ) == eBlocked )
-			{
-				/* Remove the reference to the task from the blocked list.  An
-				interrupt won't touch the xStateListItem because the
-				scheduler is suspended. */
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-
-				/* Is the task waiting on an event also?  If so remove it from
-				the event list too.  Interrupts can touch the event list item,
-				even though the scheduler is suspended, so a critical section
-				is used. */
-				taskENTER_CRITICAL();
-				{
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-						pxTCB->ucDelayAborted = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				taskEXIT_CRITICAL();
-
-				/* Place the unblocked task into the appropriate ready list. */
-				prvAddTaskToReadyList( pxTCB );
-
-				/* A task being unblocked cannot cause an immediate context
-				switch if preemption is turned off. */
-				#if (  configUSE_PREEMPTION == 1 )
-				{
-					/* Preemption is on, but a context switch should only be
-					performed if the unblocked task has a priority that is
-					equal to or higher than the currently executing task. */
-					if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-					{
-						/* Pend the yield to be performed when the scheduler
-						is unsuspended. */
-						xYieldPending = pdTRUE;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				#endif /* configUSE_PREEMPTION */
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		xTaskResumeAll();
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTaskAbortDelay */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskIncrementTick( void )
-{
-TCB_t * pxTCB;
-TickType_t xItemValue;
-BaseType_t xSwitchRequired = pdFALSE;
-
-	/* Called by the portable layer each time a tick interrupt occurs.
-	Increments the tick then checks to see if the new tick value will cause any
-	tasks to be unblocked. */
-	traceTASK_INCREMENT_TICK( xTickCount );
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		/* Minor optimisation.  The tick count cannot change in this
-		block. */
-		const TickType_t xConstTickCount = xTickCount + 1;
-
-		/* Increment the RTOS tick, switching the delayed and overflowed
-		delayed lists if it wraps to 0. */
-		xTickCount = xConstTickCount;
-
-		if( xConstTickCount == ( TickType_t ) 0U )
-		{
-			taskSWITCH_DELAYED_LISTS();
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* See if this tick has made a timeout expire.  Tasks are stored in
-		the	queue in the order of their wake time - meaning once one task
-		has been found whose block time has not expired there is no need to
-		look any further down the list. */
-		if( xConstTickCount >= xNextTaskUnblockTime )
-		{
-			for( ;; )
-			{
-				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-				{
-					/* The delayed list is empty.  Set xNextTaskUnblockTime
-					to the maximum possible value so it is extremely
-					unlikely that the
-					if( xTickCount >= xNextTaskUnblockTime ) test will pass
-					next time through. */
-					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					break;
-				}
-				else
-				{
-					/* The delayed list is not empty, get the value of the
-					item at the head of the delayed list.  This is the time
-					at which the task at the head of the delayed list must
-					be removed from the Blocked state. */
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
-					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
-
-					if( xConstTickCount < xItemValue )
-					{
-						/* It is not time to unblock this item yet, but the
-						item value is the time at which the task at the head
-						of the blocked list must be removed from the Blocked
-						state -	so record the item value in
-						xNextTaskUnblockTime. */
-						xNextTaskUnblockTime = xItemValue;
-						break;
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* It is time to remove the item from the Blocked state. */
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-
-					/* Is the task waiting on an event also?  If so remove
-					it from the event list. */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Place the unblocked task into the appropriate ready
-					list. */
-					prvAddTaskToReadyList( pxTCB );
-
-					/* A task being unblocked cannot cause an immediate
-					context switch if preemption is turned off. */
-					#if (  configUSE_PREEMPTION == 1 )
-					{
-						/* Preemption is on, but a context switch should
-						only be performed if the unblocked task has a
-						priority that is equal to or higher than the
-						currently executing task. */
-						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
-						{
-							xSwitchRequired = pdTRUE;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configUSE_PREEMPTION */
-				}
-			}
-		}
-
-		/* Tasks of equal priority to the currently running task will share
-		processing time (time slice) if preemption is on, and the application
-		writer has not explicitly turned time slicing off. */
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
-		{
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
-			{
-				xSwitchRequired = pdTRUE;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
-
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			/* Guard against the tick hook being called when the pended tick
-			count is being unwound (when the scheduler is being unlocked). */
-			if( uxPendedTicks == ( UBaseType_t ) 0U )
-			{
-				vApplicationTickHook();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICK_HOOK */
-	}
-	else
-	{
-		++uxPendedTicks;
-
-		/* The tick hook gets called at regular intervals, even if the
-		scheduler is locked. */
-		#if ( configUSE_TICK_HOOK == 1 )
-		{
-			vApplicationTickHook();
-		}
-		#endif
-	}
-
-	#if ( configUSE_PREEMPTION == 1 )
-	{
-		if( xYieldPending != pdFALSE )
-		{
-			xSwitchRequired = pdTRUE;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_PREEMPTION */
-
-	return xSwitchRequired;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction )
-	{
-	TCB_t *xTCB;
-
-		/* If xTask is NULL then it is the task hook of the calling task that is
-		getting set. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-			xTCB->pxTaskTag = pxHookFunction;
-		taskEXIT_CRITICAL();
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
-	{
-	TCB_t *xTCB;
-	TaskHookFunction_t xReturn;
-
-		/* If xTask is NULL then we are setting our own task hook. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		/* Save the hook function in the TCB.  A critical section is required as
-		the value can be accessed from an interrupt. */
-		taskENTER_CRITICAL();
-		{
-			xReturn = xTCB->pxTaskTag;
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
-	BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
-	{
-	TCB_t *xTCB;
-	BaseType_t xReturn;
-
-		/* If xTask is NULL then we are calling our own task hook. */
-		if( xTask == NULL )
-		{
-			xTCB = ( TCB_t * ) pxCurrentTCB;
-		}
-		else
-		{
-			xTCB = ( TCB_t * ) xTask;
-		}
-
-		if( xTCB->pxTaskTag != NULL )
-		{
-			xReturn = xTCB->pxTaskTag( pvParameter );
-		}
-		else
-		{
-			xReturn = pdFAIL;
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-void vTaskSwitchContext( void )
-{
-	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
-	{
-		/* The scheduler is currently suspended - do not allow a context
-		switch. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xYieldPending = pdFALSE;
-		traceTASK_SWITCHED_OUT();
-
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-				#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
-					portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
-				#else
-					ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
-				#endif
-
-				/* Add the amount of time the task has been running to the
-				accumulated time so far.  The time the task started running was
-				stored in ulTaskSwitchedInTime.  Note that there is no overflow
-				protection here so count values are only valid until the timer
-				overflows.  The guard against negative values is to protect
-				against suspect run time stat counter implementations - which
-				are provided by the application, not the kernel. */
-				if( ulTotalRunTime > ulTaskSwitchedInTime )
-				{
-					pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-				ulTaskSwitchedInTime = ulTotalRunTime;
-		}
-		#endif /* configGENERATE_RUN_TIME_STATS */
-
-		/* Check for stack overflow, if configured. */
-		taskCHECK_FOR_STACK_OVERFLOW();
-
-		/* Select a new task to run using either the generic C or port
-		optimised asm code. */
-		taskSELECT_HIGHEST_PRIORITY_TASK();
-		traceTASK_SWITCHED_IN();
-
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			/* Switch Newlib's _impure_ptr variable to point to the _reent
-			structure specific to this task. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-	}
-}
-/*-----------------------------------------------------------*/
-
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
-{
-	configASSERT( pxEventList );
-
-	/* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
-	SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
-
-	/* Place the event list item of the TCB in the appropriate event list.
-	This is placed in the list in priority order so the highest priority task
-	is the first to be woken by the event.  The queue that contains the event
-	list is locked, preventing simultaneous access from interrupts. */
-	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-}
-/*-----------------------------------------------------------*/
-
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )
-{
-	configASSERT( pxEventList );
-
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event groups implementation. */
-	configASSERT( uxSchedulerSuspended != 0 );
-
-	/* Store the item value in the event list item.  It is safe to access the
-	event list item here as interrupts won't access the event list item of a
-	task that is not in the Blocked state. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
-
-	/* Place the event list item of the TCB at the end of the appropriate event
-	list.  It is safe to access the event list here because it is part of an
-	event group implementation - and interrupts don't access event groups
-	directly (instead they access them indirectly by pending function calls to
-	the task level). */
-	vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TIMERS == 1 )
-
-	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
-	{
-		configASSERT( pxEventList );
-
-		/* This function should not be called by application code hence the
-		'Restricted' in its name.  It is not part of the public API.  It is
-		designed for use by kernel code, and has special calling requirements -
-		it should be called with the scheduler suspended. */
-
-
-		/* Place the event list item of the TCB in the appropriate event list.
-		In this case it is assume that this is the only task that is going to
-		be waiting on this event list, so the faster vListInsertEnd() function
-		can be used in place of vListInsert. */
-		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
-
-		/* If the task should block indefinitely then set the block time to a
-		value that will be recognised as an indefinite delay inside the
-		prvAddCurrentTaskToDelayedList() function. */
-		if( xWaitIndefinitely != pdFALSE )
-		{
-			xTicksToWait = portMAX_DELAY;
-		}
-
-		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
-		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
-	}
-
-#endif /* configUSE_TIMERS */
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
-{
-TCB_t *pxUnblockedTCB;
-BaseType_t xReturn;
-
-	/* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
-	called from a critical section within an ISR. */
-
-	/* The event list is sorted in priority order, so the first in the list can
-	be removed as it is known to be the highest priority.  Remove the TCB from
-	the delayed list, and add it to the ready list.
-
-	If an event is for a queue that is locked then this function will never
-	get called - the lock count on the queue will get modified instead.  This
-	means exclusive access to the event list is guaranteed here.
-
-	This function assumes that a check has already been made to ensure that
-	pxEventList is not empty. */
-	pxUnblockedTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
-
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-	{
-		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-		prvAddTaskToReadyList( pxUnblockedTCB );
-	}
-	else
-	{
-		/* The delayed and ready lists cannot be accessed, so hold this task
-		pending until the scheduler is resumed. */
-		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
-	}
-
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* Return true if the task removed from the event list has a higher
-		priority than the calling task.  This allows the calling task to know if
-		it should force a context switch now. */
-		xReturn = pdTRUE;
-
-		/* Mark that a yield is pending in case the user is not using the
-		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	#if( configUSE_TICKLESS_IDLE != 0 )
-	{
-		/* If a task is blocked on a kernel object then xNextTaskUnblockTime
-		might be set to the blocked task's time out time.  If the task is
-		unblocked for a reason other than a timeout xNextTaskUnblockTime is
-		normally left unchanged, because it is automatically reset to a new
-		value when the tick count equals xNextTaskUnblockTime.  However if
-		tickless idling is used it might be more important to enter sleep mode
-		at the earliest possible time - so reset xNextTaskUnblockTime here to
-		ensure it is updated at the earliest possible time. */
-		prvResetNextTaskUnblockTime();
-	}
-	#endif
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )
-{
-TCB_t *pxUnblockedTCB;
-BaseType_t xReturn;
-
-	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
-	the event flags implementation. */
-	configASSERT( uxSchedulerSuspended != pdFALSE );
-
-	/* Store the new item value in the event list. */
-	listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
-
-	/* Remove the event list form the event flag.  Interrupts do not access
-	event flags. */
-	pxUnblockedTCB = ( TCB_t * ) listGET_LIST_ITEM_OWNER( pxEventListItem );
-	configASSERT( pxUnblockedTCB );
-	( void ) uxListRemove( pxEventListItem );
-
-	/* Remove the task from the delayed list and add it to the ready list.  The
-	scheduler is suspended so interrupts will not be accessing the ready
-	lists. */
-	( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
-	prvAddTaskToReadyList( pxUnblockedTCB );
-
-	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
-	{
-		/* Return true if the task removed from the event list has
-		a higher priority than the calling task.  This allows
-		the calling task to know if it should force a context
-		switch now. */
-		xReturn = pdTRUE;
-
-		/* Mark that a yield is pending in case the user is not using the
-		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
-		xYieldPending = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
-{
-	configASSERT( pxTimeOut );
-	pxTimeOut->xOverflowCount = xNumOfOverflows;
-	pxTimeOut->xTimeOnEntering = xTickCount;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
-{
-BaseType_t xReturn;
-
-	configASSERT( pxTimeOut );
-	configASSERT( pxTicksToWait );
-
-	taskENTER_CRITICAL();
-	{
-		/* Minor optimisation.  The tick count cannot change in this block. */
-		const TickType_t xConstTickCount = xTickCount;
-
-		#if( INCLUDE_xTaskAbortDelay == 1 )
-			if( pxCurrentTCB->ucDelayAborted != pdFALSE )
-			{
-				/* The delay was aborted, which is not the same as a time out,
-				but has the same result. */
-				pxCurrentTCB->ucDelayAborted = pdFALSE;
-				xReturn = pdTRUE;
-			}
-			else
-		#endif
-
-		#if ( INCLUDE_vTaskSuspend == 1 )
-			if( *pxTicksToWait == portMAX_DELAY )
-			{
-				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
-				specified is the maximum block time then the task should block
-				indefinitely, and therefore never time out. */
-				xReturn = pdFALSE;
-			}
-			else
-		#endif
-
-		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
-		{
-			/* The tick count is greater than the time at which
-			vTaskSetTimeout() was called, but has also overflowed since
-			vTaskSetTimeOut() was called.  It must have wrapped all the way
-			around and gone past again. This passed since vTaskSetTimeout()
-			was called. */
-			xReturn = pdTRUE;
-		}
-		else if( ( ( TickType_t ) ( xConstTickCount - pxTimeOut->xTimeOnEntering ) ) < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
-		{
-			/* Not a genuine timeout. Adjust parameters for time remaining. */
-			*pxTicksToWait -= ( xConstTickCount - pxTimeOut->xTimeOnEntering );
-			vTaskSetTimeOutState( pxTimeOut );
-			xReturn = pdFALSE;
-		}
-		else
-		{
-			xReturn = pdTRUE;
-		}
-	}
-	taskEXIT_CRITICAL();
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskMissedYield( void )
-{
-	xYieldPending = pdTRUE;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
-	{
-	UBaseType_t uxReturn;
-	TCB_t *pxTCB;
-
-		if( xTask != NULL )
-		{
-			pxTCB = ( TCB_t * ) xTask;
-			uxReturn = pxTCB->uxTaskNumber;
-		}
-		else
-		{
-			uxReturn = 0U;
-		}
-
-		return uxReturn;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )
-	{
-	TCB_t *pxTCB;
-
-		if( xTask != NULL )
-		{
-			pxTCB = ( TCB_t * ) xTask;
-			pxTCB->uxTaskNumber = uxHandle;
-		}
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-
-/*
- * -----------------------------------------------------------
- * The Idle task.
- * ----------------------------------------------------------
- *
- * The portTASK_FUNCTION() macro is used to allow port/compiler specific
- * language extensions.  The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION( prvIdleTask, pvParameters )
-{
-	/* Stop warnings. */
-	( void ) pvParameters;
-
-	/** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
-	SCHEDULER IS STARTED. **/
-
-	for( ;; )
-	{
-		/* See if any tasks have deleted themselves - if so then the idle task
-		is responsible for freeing the deleted task's TCB and stack. */
-		prvCheckTasksWaitingTermination();
-
-		#if ( configUSE_PREEMPTION == 0 )
-		{
-			/* If we are not using preemption we keep forcing a task switch to
-			see if any other task has become available.  If we are using
-			preemption we don't need to do this as any task becoming available
-			will automatically get the processor anyway. */
-			taskYIELD();
-		}
-		#endif /* configUSE_PREEMPTION */
-
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
-		{
-			/* When using preemption tasks of equal priority will be
-			timesliced.  If a task that is sharing the idle priority is ready
-			to run then the idle task should yield before the end of the
-			timeslice.
-
-			A critical region is not required here as we are just reading from
-			the list, and an occasional incorrect value will not matter.  If
-			the ready list at the idle priority contains more than one task
-			then a task other than the idle task is ready to execute. */
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
-			{
-				taskYIELD();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
-
-		#if ( configUSE_IDLE_HOOK == 1 )
-		{
-			extern void vApplicationIdleHook( void );
-
-			/* Call the user defined function from within the idle task.  This
-			allows the application designer to add background functionality
-			without the overhead of a separate task.
-			NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
-			CALL A FUNCTION THAT MIGHT BLOCK. */
-			vApplicationIdleHook();
-		}
-		#endif /* configUSE_IDLE_HOOK */
-
-		/* This conditional compilation should use inequality to 0, not equality
-		to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
-		user defined low power mode	implementations require
-		configUSE_TICKLESS_IDLE to be set to a value other than 1. */
-		#if ( configUSE_TICKLESS_IDLE != 0 )
-		{
-		TickType_t xExpectedIdleTime;
-
-			/* It is not desirable to suspend then resume the scheduler on
-			each iteration of the idle task.  Therefore, a preliminary
-			test of the expected idle time is performed without the
-			scheduler suspended.  The result here is not necessarily
-			valid. */
-			xExpectedIdleTime = prvGetExpectedIdleTime();
-
-			if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-			{
-				vTaskSuspendAll();
-				{
-					/* Now the scheduler is suspended, the expected idle
-					time can be sampled again, and this time its value can
-					be used. */
-					configASSERT( xNextTaskUnblockTime >= xTickCount );
-					xExpectedIdleTime = prvGetExpectedIdleTime();
-
-					if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
-					{
-						traceLOW_POWER_IDLE_BEGIN();
-						portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
-						traceLOW_POWER_IDLE_END();
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-				( void ) xTaskResumeAll();
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configUSE_TICKLESS_IDLE */
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TICKLESS_IDLE != 0 )
-
-	eSleepModeStatus eTaskConfirmSleepModeStatus( void )
-	{
-	/* The idle task exists in addition to the application tasks. */
-	const UBaseType_t uxNonApplicationTasks = 1;
-	eSleepModeStatus eReturn = eStandardSleep;
-
-		if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
-		{
-			/* A task was made ready while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else if( xYieldPending != pdFALSE )
-		{
-			/* A yield was pended while the scheduler was suspended. */
-			eReturn = eAbortSleep;
-		}
-		else
-		{
-			/* If all the tasks are in the suspended list (which might mean they
-			have an infinite block time rather than actually being suspended)
-			then it is safe to turn all clocks off and just wait for external
-			interrupts. */
-			if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
-			{
-				eReturn = eNoTasksWaitingTimeout;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		return eReturn;
-	}
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*-----------------------------------------------------------*/
-
-#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-
-	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )
-	{
-	TCB_t *pxTCB;
-
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToSet );
-			pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
-		}
-	}
-
-#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
-/*-----------------------------------------------------------*/
-
-#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
-
-	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex )
-	{
-	void *pvReturn = NULL;
-	TCB_t *pxTCB;
-
-		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
-		{
-			pxTCB = prvGetTCBFromHandle( xTaskToQuery );
-			pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
-		}
-		else
-		{
-			pvReturn = NULL;
-		}
-
-		return pvReturn;
-	}
-
-#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
-/*-----------------------------------------------------------*/
-
-#if ( portUSING_MPU_WRAPPERS == 1 )
-
-	void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify, const MemoryRegion_t * const xRegions )
-	{
-	TCB_t *pxTCB;
-
-		/* If null is passed in here then we are modifying the MPU settings of
-		the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTaskToModify );
-
-		vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
-	}
-
-#endif /* portUSING_MPU_WRAPPERS */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseTaskLists( void )
-{
-UBaseType_t uxPriority;
-
-	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
-	{
-		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
-	}
-
-	vListInitialise( &xDelayedTaskList1 );
-	vListInitialise( &xDelayedTaskList2 );
-	vListInitialise( &xPendingReadyList );
-
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		vListInitialise( &xTasksWaitingTermination );
-	}
-	#endif /* INCLUDE_vTaskDelete */
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		vListInitialise( &xSuspendedTaskList );
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-
-	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
-	using list2. */
-	pxDelayedTaskList = &xDelayedTaskList1;
-	pxOverflowDelayedTaskList = &xDelayedTaskList2;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckTasksWaitingTermination( void )
-{
-
-	/** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
-
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		BaseType_t xListIsEmpty;
-
-		/* ucTasksDeleted is used to prevent vTaskSuspendAll() being called
-		too often in the idle task. */
-		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
-		{
-			vTaskSuspendAll();
-			{
-				xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination );
-			}
-			( void ) xTaskResumeAll();
-
-			if( xListIsEmpty == pdFALSE )
-			{
-				TCB_t *pxTCB;
-
-				taskENTER_CRITICAL();
-				{
-					pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					--uxCurrentNumberOfTasks;
-					--uxDeletedTasksWaitingCleanUp;
-				}
-				taskEXIT_CRITICAL();
-
-				prvDeleteTCB( pxTCB );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-	}
-	#endif /* INCLUDE_vTaskDelete */
-}
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TRACE_FACILITY == 1 )
-
-	void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )
-	{
-	TCB_t *pxTCB;
-
-		/* xTask is NULL then get the state of the calling task. */
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
-		pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName [ 0 ] );
-		pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
-		pxTaskStatus->pxStackBase = pxTCB->pxStack;
-		pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
-
-		#if ( INCLUDE_vTaskSuspend == 1 )
-		{
-			/* If the task is in the suspended list then there is a chance it is
-			actually just blocked indefinitely - so really it should be reported as
-			being in the Blocked state. */
-			if( pxTaskStatus->eCurrentState == eSuspended )
-			{
-				vTaskSuspendAll();
-				{
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
-					{
-						pxTaskStatus->eCurrentState = eBlocked;
-					}
-				}
-				xTaskResumeAll();
-			}
-		}
-		#endif /* INCLUDE_vTaskSuspend */
-
-		#if ( configUSE_MUTEXES == 1 )
-		{
-			pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
-		}
-		#else
-		{
-			pxTaskStatus->uxBasePriority = 0;
-		}
-		#endif
-
-		#if ( configGENERATE_RUN_TIME_STATS == 1 )
-		{
-			pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
-		}
-		#else
-		{
-			pxTaskStatus->ulRunTimeCounter = 0;
-		}
-		#endif
-
-		/* Obtaining the task state is a little fiddly, so is only done if the value
-		of eState passed into this function is eInvalid - otherwise the state is
-		just set to whatever is passed in. */
-		if( eState != eInvalid )
-		{
-			pxTaskStatus->eCurrentState = eState;
-		}
-		else
-		{
-			pxTaskStatus->eCurrentState = eTaskGetState( xTask );
-		}
-
-		/* Obtaining the stack space takes some time, so the xGetFreeStackSpace
-		parameter is provided to allow it to be skipped. */
-		if( xGetFreeStackSpace != pdFALSE )
-		{
-			#if ( portSTACK_GROWTH > 0 )
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
-			}
-			#else
-			{
-				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
-			}
-			#endif
-		}
-		else
-		{
-			pxTaskStatus->usStackHighWaterMark = 0;
-		}
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
-	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState )
-	{
-	volatile TCB_t *pxNextTCB, *pxFirstTCB;
-	UBaseType_t uxTask = 0;
-
-		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
-		{
-			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
-
-			/* Populate an TaskStatus_t structure within the
-			pxTaskStatusArray array for each task that is referenced from
-			pxList.  See the definition of TaskStatus_t in task.h for the
-			meaning of each TaskStatus_t structure member. */
-			do
-			{
-				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
-				vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
-				uxTask++;
-			} while( pxNextTCB != pxFirstTCB );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return uxTask;
-	}
-
-#endif /* configUSE_TRACE_FACILITY */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
-	static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
-	{
-	uint32_t ulCount = 0U;
-
-		while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
-		{
-			pucStackByte -= portSTACK_GROWTH;
-			ulCount++;
-		}
-
-		ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
-
-		return ( uint16_t ) ulCount;
-	}
-
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
-
-	UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	uint8_t *pucEndOfStack;
-	UBaseType_t uxReturn;
-
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		#if portSTACK_GROWTH < 0
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
-		}
-		#else
-		{
-			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
-		}
-		#endif
-
-		uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
-
-		return uxReturn;
-	}
-
-#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
-	static void prvDeleteTCB( TCB_t *pxTCB )
-	{
-		/* This call is required specifically for the TriCore port.  It must be
-		above the vPortFree() calls.  The call is also used by ports/demos that
-		want to allocate and clean RAM statically. */
-		portCLEAN_UP_TCB( pxTCB );
-
-		/* Free up the memory allocated by the scheduler for the task.  It is up
-		to the task to free any memory allocated at the application level. */
-		#if ( configUSE_NEWLIB_REENTRANT == 1 )
-		{
-			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-
-		#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
-		{
-			/* The task can only have been allocated dynamically - free both
-			the stack and TCB. */
-			vPortFree( pxTCB->pxStack );
-			vPortFree( pxTCB );
-		}
-		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE == 1 )
-		{
-			/* The task could have been allocated statically or dynamically, so
-			check what was statically allocated before trying to free the
-			memory. */
-			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
-			{
-				/* Both the stack and TCB were allocated dynamically, so both
-				must be freed. */
-				vPortFree( pxTCB->pxStack );
-				vPortFree( pxTCB );
-			}
-			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
-			{
-				/* Only the stack was statically allocated, so the TCB is the
-				only memory that must be freed. */
-				vPortFree( pxTCB );
-			}
-			else
-			{
-				/* Neither the stack nor the TCB were allocated dynamically, so
-				nothing needs to be freed. */
-				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	)
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-	}
-
-#endif /* INCLUDE_vTaskDelete */
-/*-----------------------------------------------------------*/
-
-static void prvResetNextTaskUnblockTime( void )
-{
-TCB_t *pxTCB;
-
-	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
-	{
-		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
-		the maximum possible value so it is	extremely unlikely that the
-		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
-		there is an item in the delayed list. */
-		xNextTaskUnblockTime = portMAX_DELAY;
-	}
-	else
-	{
-		/* The new current delayed list is not empty, get the value of
-		the item at the head of the delayed list.  This is the time at
-		which the task at the head of the delayed list should be removed
-		from the Blocked state. */
-		( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
-		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
-	}
-}
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
-
-	TaskHandle_t xTaskGetCurrentTaskHandle( void )
-	{
-	TaskHandle_t xReturn;
-
-		/* A critical section is not required as this is not called from
-		an interrupt and the current TCB will always be the same for any
-		individual execution thread. */
-		xReturn = pxCurrentTCB;
-
-		return xReturn;
-	}
-
-#endif /* ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-
-	BaseType_t xTaskGetSchedulerState( void )
-	{
-	BaseType_t xReturn;
-
-		if( xSchedulerRunning == pdFALSE )
-		{
-			xReturn = taskSCHEDULER_NOT_STARTED;
-		}
-		else
-		{
-			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-			{
-				xReturn = taskSCHEDULER_RUNNING;
-			}
-			else
-			{
-				xReturn = taskSCHEDULER_SUSPENDED;
-			}
-		}
-
-		return xReturn;
-	}
-
-#endif /* ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;
-
-		/* If the mutex was given back by an interrupt while the queue was
-		locked then the mutex holder might now be NULL. */
-		if( pxMutexHolder != NULL )
-		{
-			/* If the holder of the mutex has a priority below the priority of
-			the task attempting to obtain the mutex then it will temporarily
-			inherit the priority of the task attempting to obtain the mutex. */
-			if( pxTCB->uxPriority < pxCurrentTCB->uxPriority )
-			{
-				/* Adjust the mutex holder state to account for its new
-				priority.  Only reset the event list item value if the value is
-				not	being used for anything else. */
-				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
-				{
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-
-				/* If the task being modified is in the ready state it will need
-				to be moved into a new list. */
-				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
-				{
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Inherit the priority before being moved into the new list. */
-					pxTCB->uxPriority = pxCurrentTCB->uxPriority;
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* Just inherit the priority. */
-					pxTCB->uxPriority = pxCurrentTCB->uxPriority;
-				}
-
-				traceTASK_PRIORITY_INHERIT( pxTCB, pxCurrentTCB->uxPriority );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
-	{
-	TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;
-	BaseType_t xReturn = pdFALSE;
-
-		if( pxMutexHolder != NULL )
-		{
-			/* A task can only have an inherited priority if it holds the mutex.
-			If the mutex is held by a task then it cannot be given from an
-			interrupt, and if a mutex is given by the holding task then it must
-			be the running state task. */
-			configASSERT( pxTCB == pxCurrentTCB );
-
-			configASSERT( pxTCB->uxMutexesHeld );
-			( pxTCB->uxMutexesHeld )--;
-
-			/* Has the holder of the mutex inherited the priority of another
-			task? */
-			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
-			{
-				/* Only disinherit if no other mutexes are held. */
-				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
-				{
-					/* A task can only have an inherited priority if it holds
-					the mutex.  If the mutex is held by a task then it cannot be
-					given from an interrupt, and if a mutex is given by the
-					holding	task then it must be the running state task.  Remove
-					the	holding task from the ready	list. */
-					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-					{
-						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Disinherit the priority before adding the task into the
-					new	ready list. */
-					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
-					pxTCB->uxPriority = pxTCB->uxBasePriority;
-
-					/* Reset the event list item value.  It cannot be in use for
-					any other purpose if this task is running, and it must be
-					running to give back the mutex. */
-					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-					prvAddTaskToReadyList( pxTCB );
-
-					/* Return true to indicate that a context switch is required.
-					This is only actually required in the corner case whereby
-					multiple mutexes were held and the mutexes were given back
-					in an order different to that in which they were taken.
-					If a context switch did not occur when the first mutex was
-					returned, even if a task was waiting on it, then a context
-					switch should occur when the last mutex is returned whether
-					a task is waiting on it or not. */
-					xReturn = pdTRUE;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		return xReturn;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
-	void vTaskEnterCritical( void )
-	{
-		portDISABLE_INTERRUPTS();
-
-		if( xSchedulerRunning != pdFALSE )
-		{
-			( pxCurrentTCB->uxCriticalNesting )++;
-
-			/* This is not the interrupt safe version of the enter critical
-			function so	assert() if it is being called from an interrupt
-			context.  Only API functions that end in "FromISR" can be used in an
-			interrupt.  Only assert if the critical nesting count is 1 to
-			protect against recursive calls if the assert function also uses a
-			critical section. */
-			if( pxCurrentTCB->uxCriticalNesting == 1 )
-			{
-				portASSERT_IF_IN_ISR();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* portCRITICAL_NESTING_IN_TCB */
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
-	void vTaskExitCritical( void )
-	{
-		if( xSchedulerRunning != pdFALSE )
-		{
-			if( pxCurrentTCB->uxCriticalNesting > 0U )
-			{
-				( pxCurrentTCB->uxCriticalNesting )--;
-
-				if( pxCurrentTCB->uxCriticalNesting == 0U )
-				{
-					portENABLE_INTERRUPTS();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* portCRITICAL_NESTING_IN_TCB */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName )
-	{
-	size_t x;
-
-		/* Start by copying the entire string. */
-		strcpy( pcBuffer, pcTaskName );
-
-		/* Pad the end of the string with spaces to ensure columns line up when
-		printed out. */
-		for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
-		{
-			pcBuffer[ x ] = ' ';
-		}
-
-		/* Terminate. */
-		pcBuffer[ x ] = 0x00;
-
-		/* Return the new end of string. */
-		return &( pcBuffer[ x ] );
-	}
-
-#endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	void vTaskList( char * pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	char cStatus;
-
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskList() calls uxTaskGetSystemState(), then formats part of the
-		 * uxTaskGetSystemState() output into a human readable table that
-		 * displays task names, states and stack usage.
-		 *
-		 * vTaskList() has a dependency on the sprintf() C library function that
-		 * might bloat the code size, use a lot of stack, and provide different
-		 * results on different platforms.  An alternative, tiny, third party,
-		 * and limited functionality implementation of sprintf() is provided in
-		 * many of the FreeRTOS/Demo sub-directories in a file called
-		 * printf-stdarg.c (note printf-stdarg.c does not provide a full
-		 * snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskList().
-		 */
-
-
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = 0x00;
-
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
-
-		/* Allocate an array index for each task.  NOTE!  if
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
-
-			/* Create a human readable table from the binary data. */
-			for( x = 0; x < uxArraySize; x++ )
-			{
-				switch( pxTaskStatusArray[ x ].eCurrentState )
-				{
-					case eReady:		cStatus = tskREADY_CHAR;
-										break;
-
-					case eBlocked:		cStatus = tskBLOCKED_CHAR;
-										break;
-
-					case eSuspended:	cStatus = tskSUSPENDED_CHAR;
-										break;
-
-					case eDeleted:		cStatus = tskDELETED_CHAR;
-										break;
-
-					default:			/* Should not get here, but it is included
-										to prevent static checking errors. */
-										cStatus = 0x00;
-										break;
-				}
-
-				/* Write the task name to the string, padding with spaces so it
-				can be printed in tabular form more easily. */
-				pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
-
-				/* Write the rest of the string. */
-				sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber );
-				pcWriteBuffer += strlen( pcWriteBuffer );
-			}
-
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */
-/*----------------------------------------------------------*/
-
-#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
-
-	void vTaskGetRunTimeStats( char *pcWriteBuffer )
-	{
-	TaskStatus_t *pxTaskStatusArray;
-	volatile UBaseType_t uxArraySize, x;
-	uint32_t ulTotalTime, ulStatsAsPercentage;
-
-		#if( configUSE_TRACE_FACILITY != 1 )
-		{
-			#error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
-		}
-		#endif
-
-		/*
-		 * PLEASE NOTE:
-		 *
-		 * This function is provided for convenience only, and is used by many
-		 * of the demo applications.  Do not consider it to be part of the
-		 * scheduler.
-		 *
-		 * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
-		 * of the uxTaskGetSystemState() output into a human readable table that
-		 * displays the amount of time each task has spent in the Running state
-		 * in both absolute and percentage terms.
-		 *
-		 * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
-		 * function that might bloat the code size, use a lot of stack, and
-		 * provide different results on different platforms.  An alternative,
-		 * tiny, third party, and limited functionality implementation of
-		 * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
-		 * a file called printf-stdarg.c (note printf-stdarg.c does not provide
-		 * a full snprintf() implementation!).
-		 *
-		 * It is recommended that production systems call uxTaskGetSystemState()
-		 * directly to get access to raw stats data, rather than indirectly
-		 * through a call to vTaskGetRunTimeStats().
-		 */
-
-		/* Make sure the write buffer does not contain a string. */
-		*pcWriteBuffer = 0x00;
-
-		/* Take a snapshot of the number of tasks in case it changes while this
-		function is executing. */
-		uxArraySize = uxCurrentNumberOfTasks;
-
-		/* Allocate an array index for each task.  NOTE!  If
-		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
-		equate to NULL. */
-		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
-
-		if( pxTaskStatusArray != NULL )
-		{
-			/* Generate the (binary) data. */
-			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
-
-			/* For percentage calculations. */
-			ulTotalTime /= 100UL;
-
-			/* Avoid divide by zero errors. */
-			if( ulTotalTime > 0 )
-			{
-				/* Create a human readable table from the binary data. */
-				for( x = 0; x < uxArraySize; x++ )
-				{
-					/* What percentage of the total run time has the task used?
-					This will always be rounded down to the nearest integer.
-					ulTotalRunTimeDiv100 has already been divided by 100. */
-					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
-
-					/* Write the task name to the string, padding with
-					spaces so it can be printed in tabular form more
-					easily. */
-					pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
-
-					if( ulStatsAsPercentage > 0UL )
-					{
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage );
-						}
-						#endif
-					}
-					else
-					{
-						/* If the percentage is zero here then the task has
-						consumed less than 1% of the total run time. */
-						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
-						{
-							sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
-						}
-						#else
-						{
-							/* sizeof( int ) == sizeof( long ) so a smaller
-							printf() library can be used. */
-							sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter );
-						}
-						#endif
-					}
-
-					pcWriteBuffer += strlen( pcWriteBuffer );
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
-			is 0 then vPortFree() will be #defined to nothing. */
-			vPortFree( pxTaskStatusArray );
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) ) */
-/*-----------------------------------------------------------*/
-
-TickType_t uxTaskResetEventItemValue( void )
-{
-TickType_t uxReturn;
-
-	uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
-
-	/* Reset the event list item to its normal value - so it can be used with
-	queues and semaphores. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-
-	return uxReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
-	void *pvTaskIncrementMutexHeldCount( void )
-	{
-		/* If xSemaphoreCreateMutex() is called before any tasks have been created
-		then pxCurrentTCB will be NULL. */
-		if( pxCurrentTCB != NULL )
-		{
-			( pxCurrentTCB->uxMutexesHeld )++;
-		}
-
-		return pxCurrentTCB;
-	}
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait )
-	{
-	uint32_t ulReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* Only block if the notification count is not already non-zero. */
-			if( pxCurrentTCB->ulNotifiedValue == 0UL )
-			{
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
-
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_TAKE_BLOCK();
-
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_TAKE();
-			ulReturn = pxCurrentTCB->ulNotifiedValue;
-
-			if( ulReturn != 0UL )
-			{
-				if( xClearCountOnExit != pdFALSE )
-				{
-					pxCurrentTCB->ulNotifiedValue = 0UL;
-				}
-				else
-				{
-					pxCurrentTCB->ulNotifiedValue = ulReturn - 1;
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
-
-		return ulReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
-	{
-	BaseType_t xReturn;
-
-		taskENTER_CRITICAL();
-		{
-			/* Only block if a notification is not already pending. */
-			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
-			{
-				/* Clear bits in the task's notification value as bits may get
-				set	by the notifying task or interrupt.  This can be used to
-				clear the value to zero. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
-
-				/* Mark this task as waiting for a notification. */
-				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
-
-				if( xTicksToWait > ( TickType_t ) 0 )
-				{
-					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
-					traceTASK_NOTIFY_WAIT_BLOCK();
-
-					/* All ports are written to allow a yield in a critical
-					section (some will yield immediately, others wait until the
-					critical section exits) - but it is not something that
-					application code should ever do. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		taskENTER_CRITICAL();
-		{
-			traceTASK_NOTIFY_WAIT();
-
-			if( pulNotificationValue != NULL )
-			{
-				/* Output the current notification value, which may or may not
-				have changed. */
-				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
-			}
-
-			/* If ucNotifyValue is set then either the task never entered the
-			blocked state (because a notification was already pending) or the
-			task unblocked because of a notification.  Otherwise the task
-			unblocked because of a timeout. */
-			if( pxCurrentTCB->ucNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* A notification was not received. */
-				xReturn = pdFALSE;
-			}
-			else
-			{
-				/* A notification was already pending or a notification was
-				received while the task was waiting. */
-				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
-				xReturn = pdTRUE;
-			}
-
-			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
-	{
-	TCB_t * pxTCB;
-	BaseType_t xReturn = pdPASS;
-	uint8_t ucOriginalNotifyState;
-
-		configASSERT( xTaskToNotify );
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		taskENTER_CRITICAL();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
-
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
-
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
-
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
-
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
-
-				case eNoAction:
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
-			}
-
-			traceTASK_NOTIFY();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-				prvAddTaskToReadyList( pxTCB );
-
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				#if( configUSE_TICKLESS_IDLE != 0 )
-				{
-					/* If a task is blocked waiting for a notification then
-					xNextTaskUnblockTime might be set to the blocked task's time
-					out time.  If the task is unblocked for a reason other than
-					a timeout xNextTaskUnblockTime is normally left unchanged,
-					because it will automatically get reset to a new value when
-					the tick count equals xNextTaskUnblockTime.  However if
-					tickless idling is used it might be more important to enter
-					sleep mode at the earliest possible time - so reset
-					xNextTaskUnblockTime here to ensure it is updated at the
-					earliest possible time. */
-					prvResetNextTaskUnblockTime();
-				}
-				#endif
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					taskYIELD_IF_USING_PREEMPTION();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	BaseType_t xReturn = pdPASS;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToNotify );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			if( pulPreviousNotificationValue != NULL )
-			{
-				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
-			}
-
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			switch( eAction )
-			{
-				case eSetBits	:
-					pxTCB->ulNotifiedValue |= ulValue;
-					break;
-
-				case eIncrement	:
-					( pxTCB->ulNotifiedValue )++;
-					break;
-
-				case eSetValueWithOverwrite	:
-					pxTCB->ulNotifiedValue = ulValue;
-					break;
-
-				case eSetValueWithoutOverwrite :
-					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
-					{
-						pxTCB->ulNotifiedValue = ulValue;
-					}
-					else
-					{
-						/* The value could not be written to the task. */
-						xReturn = pdFAIL;
-					}
-					break;
-
-				case eNoAction :
-					/* The task is being notified without its notify value being
-					updated. */
-					break;
-			}
-
-			traceTASK_NOTIFY_FROM_ISR();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
-					else
-					{
-						/* Mark that a yield is pending in case the user is not
-						using the "xHigherPriorityTaskWoken" parameter to an ISR
-						safe FreeRTOS function. */
-						xYieldPending = pdTRUE;
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	TCB_t * pxTCB;
-	uint8_t ucOriginalNotifyState;
-	UBaseType_t uxSavedInterruptStatus;
-
-		configASSERT( xTaskToNotify );
-
-		/* RTOS ports that support interrupt nesting have the concept of a
-		maximum	system call (or maximum API call) interrupt priority.
-		Interrupts that are	above the maximum system call priority are keep
-		permanently enabled, even when the RTOS kernel is in a critical section,
-		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
-		is defined in FreeRTOSConfig.h then
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
-		failure if a FreeRTOS API function is called from an interrupt that has
-		been assigned a priority above the configured maximum system call
-		priority.  Only FreeRTOS functions that end in FromISR can be called
-		from interrupts	that have been assigned a priority at or (logically)
-		below the maximum system call interrupt priority.  FreeRTOS maintains a
-		separate interrupt safe API to ensure interrupt entry is as fast and as
-		simple as possible.  More information (albeit Cortex-M specific) is
-		provided on the following link:
-		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
-		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
-
-		pxTCB = ( TCB_t * ) xTaskToNotify;
-
-		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
-		{
-			ucOriginalNotifyState = pxTCB->ucNotifyState;
-			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
-
-			/* 'Giving' is equivalent to incrementing a count in a counting
-			semaphore. */
-			( pxTCB->ulNotifiedValue )++;
-
-			traceTASK_NOTIFY_GIVE_FROM_ISR();
-
-			/* If the task is in the blocked state specifically to wait for a
-			notification then unblock it now. */
-			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
-			{
-				/* The task should not have been on an event list. */
-				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
-
-				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
-				{
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
-					prvAddTaskToReadyList( pxTCB );
-				}
-				else
-				{
-					/* The delayed and ready lists cannot be accessed, so hold
-					this task pending until the scheduler is resumed. */
-					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
-				}
-
-				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
-				{
-					/* The notified task has a priority above the currently
-					executing task so a yield is required. */
-					if( pxHigherPriorityTaskWoken != NULL )
-					{
-						*pxHigherPriorityTaskWoken = pdTRUE;
-					}
-					else
-					{
-						/* Mark that a yield is pending in case the user is not
-						using the "xHigherPriorityTaskWoken" parameter in an ISR
-						safe FreeRTOS function. */
-						xYieldPending = pdTRUE;
-					}
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-
-/*-----------------------------------------------------------*/
-
-#if( configUSE_TASK_NOTIFICATIONS == 1 )
-
-	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
-	{
-	TCB_t *pxTCB;
-	BaseType_t xReturn;
-
-		/* If null is passed in here then it is the calling task that is having
-		its notification state cleared. */
-		pxTCB = prvGetTCBFromHandle( xTask );
-
-		taskENTER_CRITICAL();
-		{
-			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
-			{
-				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
-				xReturn = pdPASS;
-			}
-			else
-			{
-				xReturn = pdFAIL;
-			}
-		}
-		taskEXIT_CRITICAL();
-
-		return xReturn;
-	}
-
-#endif /* configUSE_TASK_NOTIFICATIONS */
-/*-----------------------------------------------------------*/
-
-
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
-{
-TickType_t xTimeToWake;
-const TickType_t xConstTickCount = xTickCount;
-
-	#if( INCLUDE_xTaskAbortDelay == 1 )
-	{
-		/* About to enter a delayed list, so ensure the ucDelayAborted flag is
-		reset to pdFALSE so it can be detected as having been set to pdTRUE
-		when the task leaves the Blocked state. */
-		pxCurrentTCB->ucDelayAborted = pdFALSE;
-	}
-	#endif
-
-	/* Remove the task from the ready list before adding it to the blocked list
-	as the same list item is used for both lists. */
-	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
-	{
-		/* The current task must be in a ready list, so there is no need to
-		check, and the port reset macro can be called directly. */
-		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
-		{
-			/* Add the task to the suspended task list instead of a delayed task
-			list to ensure it is not woken by a timing event.  It will block
-			indefinitely. */
-			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* Calculate the time at which the task should be woken if the event
-			does not occur.  This may overflow but this doesn't matter, the
-			kernel will manage it correctly. */
-			xTimeToWake = xConstTickCount + xTicksToWait;
-
-			/* The list item will be inserted in wake time order. */
-			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
-
-			if( xTimeToWake < xConstTickCount )
-			{
-				/* Wake time has overflowed.  Place this item in the overflow
-				list. */
-				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-			}
-			else
-			{
-				/* The wake time has not overflowed, so the current block list
-				is used. */
-				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-
-				/* If the task entering the blocked state was placed at the
-				head of the list of blocked tasks then xNextTaskUnblockTime
-				needs to be updated too. */
-				if( xTimeToWake < xNextTaskUnblockTime )
-				{
-					xNextTaskUnblockTime = xTimeToWake;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-	}
-	#else /* INCLUDE_vTaskSuspend */
-	{
-		/* Calculate the time at which the task should be woken if the event
-		does not occur.  This may overflow but this doesn't matter, the kernel
-		will manage it correctly. */
-		xTimeToWake = xConstTickCount + xTicksToWait;
-
-		/* The list item will be inserted in wake time order. */
-		listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
-
-		if( xTimeToWake < xConstTickCount )
-		{
-			/* Wake time has overflowed.  Place this item in the overflow list. */
-			vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-		}
-		else
-		{
-			/* The wake time has not overflowed, so the current block list is used. */
-			vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
-
-			/* If the task entering the blocked state was placed at the head of the
-			list of blocked tasks then xNextTaskUnblockTime needs to be updated
-			too. */
-			if( xTimeToWake < xNextTaskUnblockTime )
-			{
-				xNextTaskUnblockTime = xTimeToWake;
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
-		( void ) xCanBlockIndefinitely;
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-}
-
-
-#ifdef FREERTOS_MODULE_TEST
-	#include "tasks_test_access_functions.h"
-#endif
-
diff --git a/ports/cc3200/FreeRTOS/Source/timers.c b/ports/cc3200/FreeRTOS/Source/timers.c
deleted file mode 100644
index d4a821a263b7a..0000000000000
--- a/ports/cc3200/FreeRTOS/Source/timers.c
+++ /dev/null
@@ -1,1092 +0,0 @@
-/*
-    FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
-    ***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-    ***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-    the FAQ page "My application does not run, what could be wrong?".  Have you
-    defined configASSERT()?
-
-    http://www.FreeRTOS.org/support - In return for receiving this top quality
-    embedded software for free we request you assist our global community by
-    participating in the support forum.
-
-    http://www.FreeRTOS.org/training - Investing in training allows your team to
-    be as productive as possible as early as possible.  Now you can receive
-    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-    Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/* Standard includes. */
-#include 
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers.  That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "queue.h"
-#include "timers.h"
-
-#if ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 0 )
-	#error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
-#endif
-
-/* Lint e961 and e750 are suppressed as a MISRA exception justified because the
-MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
-header files above, but not in this file, in order to generate the correct
-privileged Vs unprivileged linkage and placement. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
-
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  This #if is closed at the very bottom
-of this file.  If you want to include software timer functionality then ensure
-configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#if ( configUSE_TIMERS == 1 )
-
-/* Misc definitions. */
-#define tmrNO_DELAY		( TickType_t ) 0U
-
-/* The definition of the timers themselves. */
-typedef struct tmrTimerControl
-{
-	const char				*pcTimerName;		/*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	ListItem_t				xTimerListItem;		/*<< Standard linked list item as used by all kernel features for event management. */
-	TickType_t				xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */
-	UBaseType_t				uxAutoReload;		/*<< Set to pdTRUE if the timer should be automatically restarted once expired.  Set to pdFALSE if the timer is, in effect, a one-shot timer. */
-	void 					*pvTimerID;			/*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
-	TimerCallbackFunction_t	pxCallbackFunction;	/*<< The function that will be called when the timer expires. */
-	#if( configUSE_TRACE_FACILITY == 1 )
-		UBaseType_t			uxTimerNumber;		/*<< An ID assigned by trace tools such as FreeRTOS+Trace */
-	#endif
-
-	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
-		uint8_t 			ucStaticallyAllocated; /*<< Set to pdTRUE if the timer was created statically so no attempt is made to free the memory again if the timer is later deleted. */
-	#endif
-} xTIMER;
-
-/* The old xTIMER name is maintained above then typedefed to the new Timer_t
-name below to enable the use of older kernel aware debuggers. */
-typedef xTIMER Timer_t;
-
-/* The definition of messages that can be sent and received on the timer queue.
-Two types of message can be queued - messages that manipulate a software timer,
-and messages that request the execution of a non-timer related callback.  The
-two message types are defined in two separate structures, xTimerParametersType
-and xCallbackParametersType respectively. */
-typedef struct tmrTimerParameters
-{
-	TickType_t			xMessageValue;		/*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
-	Timer_t *			pxTimer;			/*<< The timer to which the command will be applied. */
-} TimerParameter_t;
-
-
-typedef struct tmrCallbackParameters
-{
-	PendedFunction_t	pxCallbackFunction;	/* << The callback function to execute. */
-	void *pvParameter1;						/* << The value that will be used as the callback functions first parameter. */
-	uint32_t ulParameter2;					/* << The value that will be used as the callback functions second parameter. */
-} CallbackParameters_t;
-
-/* The structure that contains the two message types, along with an identifier
-that is used to determine which message type is valid. */
-typedef struct tmrTimerQueueMessage
-{
-	BaseType_t			xMessageID;			/*<< The command being sent to the timer service task. */
-	union
-	{
-		TimerParameter_t xTimerParameters;
-
-		/* Don't include xCallbackParameters if it is not going to be used as
-		it makes the structure (and therefore the timer queue) larger. */
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-			CallbackParameters_t xCallbackParameters;
-		#endif /* INCLUDE_xTimerPendFunctionCall */
-	} u;
-} DaemonTaskMessage_t;
-
-/*lint -e956 A manual analysis and inspection has been used to determine which
-static variables must be declared volatile. */
-
-/* The list in which active timers are stored.  Timers are referenced in expire
-time order, with the nearest expiry time at the front of the list.  Only the
-timer service task is allowed to access these lists. */
-PRIVILEGED_DATA static List_t xActiveTimerList1;
-PRIVILEGED_DATA static List_t xActiveTimerList2;
-PRIVILEGED_DATA static List_t *pxCurrentTimerList;
-PRIVILEGED_DATA static List_t *pxOverflowTimerList;
-
-/* A queue that is used to send commands to the timer service task. */
-PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
-PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
-
-/*lint +e956 */
-
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	/* If static allocation is supported then the application must provide the
-	following callback function - which enables the application to optionally
-	provide the memory that will be used by the timer task as the task's stack
-	and TCB. */
-	extern void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize );
-
-#endif
-
-/*
- * Initialise the infrastructure used by the timer service task if it has not
- * been initialised already.
- */
-static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The timer service task (daemon).  Timer functionality is controlled by this
- * task.  Other tasks communicate with the timer service task using the
- * xTimerQueue queue.
- */
-static void prvTimerTask( void *pvParameters ) PRIVILEGED_FUNCTION;
-
-/*
- * Called by the timer service task to interpret and process a command it
- * received on the timer queue.
- */
-static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
- * depending on if the expire time causes a timer counter overflow.
- */
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
-
-/*
- * An active timer has reached its expire time.  Reload the timer if it is an
- * auto reload timer, then call its callback.
- */
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
-
-/*
- * The tick count has overflowed.  Switch the timer lists after ensuring the
- * current timer list does not still reference some timers.
- */
-static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
- * if a tick count overflow occurred since prvSampleTimeNow() was last called.
- */
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
-
-/*
- * If the timer list contains any active timers then return the expire time of
- * the timer that will expire first and set *pxListWasEmpty to false.  If the
- * timer list does not contain any timers then return 0 and set *pxListWasEmpty
- * to pdTRUE.
- */
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*
- * If a timer has expired, process it.  Otherwise, block the timer service task
- * until either a timer does expire or a command is received.
- */
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*
- * Called after a Timer_t structure has been allocated either statically or
- * dynamically to fill in the structure's members.
- */
-static void prvInitialiseNewTimer(	const char * const pcTimerName,
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerCreateTimerTask( void )
-{
-BaseType_t xReturn = pdFAIL;
-
-	/* This function is called when the scheduler is started if
-	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
-	timer service task has been created/initialised.  If timers have already
-	been created then the initialisation will already have been performed. */
-	prvCheckForValidListAndQueue();
-
-	if( xTimerQueue != NULL )
-	{
-		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-		{
-			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
-			StackType_t *pxTimerTaskStackBuffer = NULL;
-			uint32_t ulTimerTaskStackSize;
-
-			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
-			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
-													"Tmr Svc",
-													ulTimerTaskStackSize,
-													NULL,
-													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-													pxTimerTaskStackBuffer,
-													pxTimerTaskTCBBuffer );
-
-			if( xTimerTaskHandle != NULL )
-			{
-				xReturn = pdPASS;
-			}
-		}
-		#else
-		{
-			xReturn = xTaskCreate(	prvTimerTask,
-									"Tmr Svc",
-									configTIMER_TASK_STACK_DEPTH,
-									NULL,
-									( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
-									&xTimerTaskHandle );
-		}
-		#endif /* configSUPPORT_STATIC_ALLOCATION */
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	configASSERT( xReturn );
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-
-	TimerHandle_t xTimerCreate(	const char * const pcTimerName,
-								const TickType_t xTimerPeriodInTicks,
-								const UBaseType_t uxAutoReload,
-								void * const pvTimerID,
-								TimerCallbackFunction_t pxCallbackFunction ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	Timer_t *pxNewTimer;
-
-		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );
-
-		if( pxNewTimer != NULL )
-		{
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* Timers can be created statically or dynamically, so note this
-				timer was created dynamically in case the timer is later
-				deleted. */
-				pxNewTimer->ucStaticallyAllocated = pdFALSE;
-			}
-			#endif /* configSUPPORT_STATIC_ALLOCATION */
-		}
-
-		return pxNewTimer;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-
-	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,
-										const TickType_t xTimerPeriodInTicks,
-										const UBaseType_t uxAutoReload,
-										void * const pvTimerID,
-										TimerCallbackFunction_t pxCallbackFunction,
-										StaticTimer_t *pxTimerBuffer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-	{
-	Timer_t *pxNewTimer;
-
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticTimer_t equals the size of the real timer
-			structures. */
-			volatile size_t xSize = sizeof( StaticTimer_t );
-			configASSERT( xSize == sizeof( Timer_t ) );
-		}
-		#endif /* configASSERT_DEFINED */
-
-		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
-		configASSERT( pxTimerBuffer );
-		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
-
-		if( pxNewTimer != NULL )
-		{
-			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
-
-			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-			{
-				/* Timers can be created statically or dynamically so note this
-				timer was created statically in case it is later deleted. */
-				pxNewTimer->ucStaticallyAllocated = pdTRUE;
-			}
-			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-		}
-
-		return pxNewTimer;
-	}
-
-#endif /* configSUPPORT_STATIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseNewTimer(	const char * const pcTimerName,
-									const TickType_t xTimerPeriodInTicks,
-									const UBaseType_t uxAutoReload,
-									void * const pvTimerID,
-									TimerCallbackFunction_t pxCallbackFunction,
-									Timer_t *pxNewTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-	/* 0 is not a valid value for xTimerPeriodInTicks. */
-	configASSERT( ( xTimerPeriodInTicks > 0 ) );
-
-	if( pxNewTimer != NULL )
-	{
-		/* Ensure the infrastructure used by the timer service task has been
-		created/initialised. */
-		prvCheckForValidListAndQueue();
-
-		/* Initialise the timer structure members using the function
-		parameters. */
-		pxNewTimer->pcTimerName = pcTimerName;
-		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
-		pxNewTimer->uxAutoReload = uxAutoReload;
-		pxNewTimer->pvTimerID = pvTimerID;
-		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
-		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
-		traceTIMER_CREATE( pxNewTimer );
-	}
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
-{
-BaseType_t xReturn = pdFAIL;
-DaemonTaskMessage_t xMessage;
-
-	configASSERT( xTimer );
-
-	/* Send a message to the timer service task to perform a particular action
-	on a particular timer definition. */
-	if( xTimerQueue != NULL )
-	{
-		/* Send a command to the timer service task to start the xTimer timer. */
-		xMessage.xMessageID = xCommandID;
-		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
-		xMessage.u.xTimerParameters.pxTimer = ( Timer_t * ) xTimer;
-
-		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
-		{
-			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
-			}
-			else
-			{
-				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
-			}
-		}
-		else
-		{
-			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
-		}
-
-		traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
-{
-	/* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
-	started, then xTimerTaskHandle will be NULL. */
-	configASSERT( ( xTimerTaskHandle != NULL ) );
-	return xTimerTaskHandle;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
-{
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-	return pxTimer->xTimerPeriodInTicks;
-}
-/*-----------------------------------------------------------*/
-
-TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
-{
-Timer_t * pxTimer = ( Timer_t * ) xTimer;
-TickType_t xReturn;
-
-	configASSERT( xTimer );
-	xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-{
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-	return pxTimer->pcTimerName;
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
-{
-BaseType_t xResult;
-Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
-
-	/* Remove the timer from the list of active timers.  A check has already
-	been performed to ensure the list is not empty. */
-	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-	traceTIMER_EXPIRED( pxTimer );
-
-	/* If the timer is an auto reload timer then calculate the next
-	expiry time and re-insert the timer in the list of active timers. */
-	if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-	{
-		/* The timer is inserted into a list using a time relative to anything
-		other than the current time.  It will therefore be inserted into the
-		correct list relative to the time this task thinks it is now. */
-		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
-		{
-			/* The timer expired before it was added to the active timer
-			list.  Reload it now.  */
-			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-			configASSERT( xResult );
-			( void ) xResult;
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	/* Call the timer callback. */
-	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-}
-/*-----------------------------------------------------------*/
-
-static void prvTimerTask( void *pvParameters )
-{
-TickType_t xNextExpireTime;
-BaseType_t xListWasEmpty;
-
-	/* Just to avoid compiler warnings. */
-	( void ) pvParameters;
-
-	#if( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
-	{
-		extern void vApplicationDaemonTaskStartupHook( void );
-
-		/* Allow the application writer to execute some code in the context of
-		this task at the point the task starts executing.  This is useful if the
-		application includes initialisation code that would benefit from
-		executing after the scheduler has been started. */
-		vApplicationDaemonTaskStartupHook();
-	}
-	#endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
-
-	for( ;; )
-	{
-		/* Query the timers list to see if it contains any timers, and if so,
-		obtain the time at which the next timer will expire. */
-		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
-
-		/* If a timer has expired, process it.  Otherwise, block this task
-		until either a timer does expire, or a command is received. */
-		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
-
-		/* Empty the command queue. */
-		prvProcessReceivedCommands();
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
-{
-TickType_t xTimeNow;
-BaseType_t xTimerListsWereSwitched;
-
-	vTaskSuspendAll();
-	{
-		/* Obtain the time now to make an assessment as to whether the timer
-		has expired or not.  If obtaining the time causes the lists to switch
-		then don't process this timer as any timers that remained in the list
-		when the lists were switched will have been processed within the
-		prvSampleTimeNow() function. */
-		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-		if( xTimerListsWereSwitched == pdFALSE )
-		{
-			/* The tick count has not overflowed, has the timer expired? */
-			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
-			{
-				( void ) xTaskResumeAll();
-				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
-			}
-			else
-			{
-				/* The tick count has not overflowed, and the next expire
-				time has not been reached yet.  This task should therefore
-				block to wait for the next expire time or a command to be
-				received - whichever comes first.  The following line cannot
-				be reached unless xNextExpireTime > xTimeNow, except in the
-				case when the current timer list is empty. */
-				if( xListWasEmpty != pdFALSE )
-				{
-					/* The current timer list is empty - is the overflow list
-					also empty? */
-					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
-				}
-
-				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
-
-				if( xTaskResumeAll() == pdFALSE )
-				{
-					/* Yield to wait for either a command to arrive, or the
-					block time to expire.  If a command arrived between the
-					critical section being exited and this yield then the yield
-					will not cause the task to block. */
-					portYIELD_WITHIN_API();
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-		}
-		else
-		{
-			( void ) xTaskResumeAll();
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
-{
-TickType_t xNextExpireTime;
-
-	/* Timers are listed in expiry time order, with the head of the list
-	referencing the task that will expire first.  Obtain the time at which
-	the timer with the nearest expiry time will expire.  If there are no
-	active timers then just set the next expire time to 0.  That will cause
-	this task to unblock when the tick count overflows, at which point the
-	timer lists will be switched and the next expiry time can be
-	re-assessed.  */
-	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
-	if( *pxListWasEmpty == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-	}
-	else
-	{
-		/* Ensure the task unblocks when the tick count rolls over. */
-		xNextExpireTime = ( TickType_t ) 0U;
-	}
-
-	return xNextExpireTime;
-}
-/*-----------------------------------------------------------*/
-
-static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
-{
-TickType_t xTimeNow;
-PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
-
-	xTimeNow = xTaskGetTickCount();
-
-	if( xTimeNow < xLastTime )
-	{
-		prvSwitchTimerLists();
-		*pxTimerListsWereSwitched = pdTRUE;
-	}
-	else
-	{
-		*pxTimerListsWereSwitched = pdFALSE;
-	}
-
-	xLastTime = xTimeNow;
-
-	return xTimeNow;
-}
-/*-----------------------------------------------------------*/
-
-static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
-{
-BaseType_t xProcessTimerNow = pdFALSE;
-
-	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
-	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-
-	if( xNextExpiryTime <= xTimeNow )
-	{
-		/* Has the expiry time elapsed between the command to start/reset a
-		timer was issued, and the time the command was processed? */
-		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
-		{
-			/* The time between a command being issued and the command being
-			processed actually exceeds the timers period.  */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
-	else
-	{
-		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
-		{
-			/* If, since the command was issued, the tick count has overflowed
-			but the expiry time has not, then the timer must have already passed
-			its expiry time and should be processed immediately. */
-			xProcessTimerNow = pdTRUE;
-		}
-		else
-		{
-			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-		}
-	}
-
-	return xProcessTimerNow;
-}
-/*-----------------------------------------------------------*/
-
-static void	prvProcessReceivedCommands( void )
-{
-DaemonTaskMessage_t xMessage;
-Timer_t *pxTimer;
-BaseType_t xTimerListsWereSwitched, xResult;
-TickType_t xTimeNow;
-
-	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
-	{
-		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
-		{
-			/* Negative commands are pended function calls rather than timer
-			commands. */
-			if( xMessage.xMessageID < ( BaseType_t ) 0 )
-			{
-				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
-
-				/* The timer uses the xCallbackParameters member to request a
-				callback be executed.  Check the callback is not NULL. */
-				configASSERT( pxCallback );
-
-				/* Call the function. */
-				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-		#endif /* INCLUDE_xTimerPendFunctionCall */
-
-		/* Commands that are positive are timer commands rather than pended
-		function calls. */
-		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
-		{
-			/* The messages uses the xTimerParameters member to work on a
-			software timer. */
-			pxTimer = xMessage.u.xTimerParameters.pxTimer;
-
-			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE )
-			{
-				/* The timer is in a list, remove it. */
-				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
-
-			/* In this case the xTimerListsWereSwitched parameter is not used, but
-			it must be present in the function call.  prvSampleTimeNow() must be
-			called after the message is received from xTimerQueue so there is no
-			possibility of a higher priority task adding a message to the message
-			queue with a time that is ahead of the timer daemon task (because it
-			pre-empted the timer daemon task after the xTimeNow value was set). */
-			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-
-			switch( xMessage.xMessageID )
-			{
-				case tmrCOMMAND_START :
-			    case tmrCOMMAND_START_FROM_ISR :
-			    case tmrCOMMAND_RESET :
-			    case tmrCOMMAND_RESET_FROM_ISR :
-				case tmrCOMMAND_START_DONT_TRACE :
-					/* Start or restart a timer. */
-					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
-					{
-						/* The timer expired before it was added to the active
-						timer list.  Process it now. */
-						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-						traceTIMER_EXPIRED( pxTimer );
-
-						if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-						{
-							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
-							configASSERT( xResult );
-							( void ) xResult;
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-					break;
-
-				case tmrCOMMAND_STOP :
-				case tmrCOMMAND_STOP_FROM_ISR :
-					/* The timer has already been removed from the active list.
-					There is nothing to do here. */
-					break;
-
-				case tmrCOMMAND_CHANGE_PERIOD :
-				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
-					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
-					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
-
-					/* The new period does not really have a reference, and can
-					be longer or shorter than the old one.  The command time is
-					therefore set to the current time, and as the period cannot
-					be zero the next expiry time can only be in the future,
-					meaning (unlike for the xTimerStart() case above) there is
-					no fail case that needs to be handled here. */
-					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
-					break;
-
-				case tmrCOMMAND_DELETE :
-					/* The timer has already been removed from the active list,
-					just free up the memory if the memory was dynamically
-					allocated. */
-					#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
-					{
-						/* The timer can only have been allocated dynamically -
-						free it again. */
-						vPortFree( pxTimer );
-					}
-					#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
-					{
-						/* The timer could have been allocated statically or
-						dynamically, so check before attempting to free the
-						memory. */
-						if( pxTimer->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
-						{
-							vPortFree( pxTimer );
-						}
-						else
-						{
-							mtCOVERAGE_TEST_MARKER();
-						}
-					}
-					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-					break;
-
-				default	:
-					/* Don't expect to get here. */
-					break;
-			}
-		}
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvSwitchTimerLists( void )
-{
-TickType_t xNextExpireTime, xReloadTime;
-List_t *pxTemp;
-Timer_t *pxTimer;
-BaseType_t xResult;
-
-	/* The tick count has overflowed.  The timer lists must be switched.
-	If there are any timers still referenced from the current timer list
-	then they must have expired and should be processed before the lists
-	are switched. */
-	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
-	{
-		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-
-		/* Remove the timer from the list. */
-		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
-		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
-		traceTIMER_EXPIRED( pxTimer );
-
-		/* Execute its callback, then send a command to restart the timer if
-		it is an auto-reload timer.  It cannot be restarted here as the lists
-		have not yet been switched. */
-		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
-
-		if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )
-		{
-			/* Calculate the reload value, and if the reload value results in
-			the timer going into the same timer list then it has already expired
-			and the timer should be re-inserted into the current list so it is
-			processed again within this loop.  Otherwise a command should be sent
-			to restart the timer to ensure it is only inserted into a list after
-			the lists have been swapped. */
-			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
-			if( xReloadTime > xNextExpireTime )
-			{
-				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
-				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
-			}
-			else
-			{
-				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
-				configASSERT( xResult );
-				( void ) xResult;
-			}
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-
-	pxTemp = pxCurrentTimerList;
-	pxCurrentTimerList = pxOverflowTimerList;
-	pxOverflowTimerList = pxTemp;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckForValidListAndQueue( void )
-{
-	/* Check that the list from which active timers are referenced, and the
-	queue used to communicate with the timer service, have been
-	initialised. */
-	taskENTER_CRITICAL();
-	{
-		if( xTimerQueue == NULL )
-		{
-			vListInitialise( &xActiveTimerList1 );
-			vListInitialise( &xActiveTimerList2 );
-			pxCurrentTimerList = &xActiveTimerList1;
-			pxOverflowTimerList = &xActiveTimerList2;
-
-			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
-			{
-				/* The timer queue is allocated statically in case
-				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
-				static StaticQueue_t xStaticTimerQueue;
-				static uint8_t ucStaticTimerQueueStorage[ configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ];
-
-				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
-			}
-			#else
-			{
-				xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
-			}
-			#endif
-
-			#if ( configQUEUE_REGISTRY_SIZE > 0 )
-			{
-				if( xTimerQueue != NULL )
-				{
-					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
-			}
-			#endif /* configQUEUE_REGISTRY_SIZE */
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
-{
-BaseType_t xTimerIsInActiveList;
-Timer_t *pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-
-	/* Is the timer in the list of active timers? */
-	taskENTER_CRITICAL();
-	{
-		/* Checking to see if it is in the NULL list in effect checks to see if
-		it is referenced from either the current or the overflow timer lists in
-		one go, but the logic has to be reversed, hence the '!'. */
-		xTimerIsInActiveList = ( BaseType_t ) !( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) );
-	}
-	taskEXIT_CRITICAL();
-
-	return xTimerIsInActiveList;
-} /*lint !e818 Can't be pointer to const due to the typedef. */
-/*-----------------------------------------------------------*/
-
-void *pvTimerGetTimerID( const TimerHandle_t xTimer )
-{
-Timer_t * const pxTimer = ( Timer_t * ) xTimer;
-void *pvReturn;
-
-	configASSERT( xTimer );
-
-	taskENTER_CRITICAL();
-	{
-		pvReturn = pxTimer->pvTimerID;
-	}
-	taskEXIT_CRITICAL();
-
-	return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID )
-{
-Timer_t * const pxTimer = ( Timer_t * ) xTimer;
-
-	configASSERT( xTimer );
-
-	taskENTER_CRITICAL();
-	{
-		pxTimer->pvTimerID = pvNewID;
-	}
-	taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
-
-	BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
-
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
-
-		xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
-
-		tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTimerPendFunctionCall */
-/*-----------------------------------------------------------*/
-
-#if( INCLUDE_xTimerPendFunctionCall == 1 )
-
-	BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait )
-	{
-	DaemonTaskMessage_t xMessage;
-	BaseType_t xReturn;
-
-		/* This function can only be called after a timer has been created or
-		after the scheduler has been started because, until then, the timer
-		queue does not exist. */
-		configASSERT( xTimerQueue );
-
-		/* Complete the message with the function parameters and post it to the
-		daemon task. */
-		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
-		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
-		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
-		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
-
-		xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
-
-		tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
-
-		return xReturn;
-	}
-
-#endif /* INCLUDE_xTimerPendFunctionCall */
-/*-----------------------------------------------------------*/
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality.  If you want to include software timer
-functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#endif /* configUSE_TIMERS == 1 */
-
-
-
diff --git a/ports/cc3200/Makefile b/ports/cc3200/Makefile
deleted file mode 100644
index 81531b1084a2c..0000000000000
--- a/ports/cc3200/Makefile
+++ /dev/null
@@ -1,63 +0,0 @@
-# Select the board to build for: if not given on the command line,
-# then default to WIPY
-BOARD ?= WIPY
-ifeq ($(wildcard boards/$(BOARD)/.),)
-$(error Invalid BOARD specified)
-endif
-
-# Make 'release' the default build type
-BTYPE ?= release
-
-# Port for flashing firmware
-PORT ?= /dev/ttyUSB1
-
-# If the build directory is not given, make it reflect the board name.
-BUILD ?= build/$(BOARD)/$(BTYPE)
-
-include ../../py/mkenv.mk
--include ../../localconfig.mk
-
-CROSS_COMPILE ?= arm-none-eabi-
-
-CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -march=armv7e-m -mabi=aapcs -mcpu=cortex-m4 -msoft-float -mfloat-abi=soft -fsingle-precision-constant -Wdouble-promotion
-CFLAGS = -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_CORTEX_M4) -Os
-CFLAGS += -g -ffunction-sections -fdata-sections -fno-common -fsigned-char -mno-unaligned-access
-CFLAGS += -Iboards/$(BOARD)
-CFLAGS += $(CFLAGS_MOD)
-
-LDFLAGS = -Wl,-nostdlib -Wl,--gc-sections -Wl,-Map=$@.map
-
-FLASH_SIZE_WIPY = 2M
-FLASH_SIZE_LAUNCHXL = 1M
-
-ifeq ($(BTARGET), application)
-# qstr definitions (must come before including py.mk)
-QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h
-# include MicroPython make definitions
-include $(TOP)/py/py.mk
-include application.mk
-else
-ifeq ($(BTARGET), bootloader)
-include bootmgr/bootloader.mk
-else
-$(error Invalid BTARGET specified)
-endif
-endif
-
-# always include MicroPython make rules
-include $(TOP)/py/mkrules.mk
-
-erase:
-	cc3200tool -p $(PORT) format_flash --size $(FLASH_SIZE_$(BOARD))
-
-deploy:
-	cc3200tool -p $(PORT) \
-	    write_file bootmgr/build/$(BOARD)/$(BTYPE)/bootloader.bin /sys/mcuimg.bin \
-	    write_file build/$(BOARD)/$(BTYPE)/mcuimg.bin /sys/factimg.bin
-
-# Files *.ucf and *ucf.signed.bin come from CC3200SDK-SERVICEPACK
-# package from http://www.ti.com/tool/cc3200sdk
-servicepack:
-	cc3200tool -p $(PORT) \
-	write_file --file-size=0x20000 --signature ota_1.0.1.6-2.7.0.0.ucf.signed.bin \
-	    ota_1.0.1.6-2.7.0.0.ucf /sys/servicepack.ucf
diff --git a/ports/cc3200/README.md b/ports/cc3200/README.md
deleted file mode 100644
index 53cad3ba0ff15..0000000000000
--- a/ports/cc3200/README.md
+++ /dev/null
@@ -1,148 +0,0 @@
-MicroPython port to CC3200 WiFi SoC
-===================================
-
-This is a MicroPython port to Texas Instruments CC3200 WiFi SoC (ARM Cortex-M4
-architecture). This port supports 2 boards: WiPy and TI CC3200-LAUNCHXL.
-
-## Build Instructions for the CC3200
-
-Currently the CC3200 port of MicroPython builds under Linux and OSX,
-but not under Windows.
-
-The toolchain required for the build can be found at
-.
-
-In order to flash the image to the CC3200 you will need the
-[cc3200tool](https://github.com/ALLTERCO/cc3200tool). An alternative is
-to use CCS_Uniflash tool from TI, which works only under Windows, and all
-support is provided by TI itself.
-
-Building the bootloader:
-
-```
-make BTARGET=bootloader BTYPE=release BOARD=LAUNCHXL
-```
-
-Building the "release" image:
-
-```
-make BTARGET=application BTYPE=release BOARD=LAUNCHXL
-```
-
-To build an image suitable for debugging:
-
-In order to debug the port specific code, optimizations need to be disabled on the
-port file (check the Makefile for specific details). You can use CCS from TI.
-Use the CC3200.ccxml file supplied with this distribution for the debuuger configuration.
-
-```
-make BTARGET=application BTYPE=debug BOARD=LAUNCHXL
-```
-
-## Flashing the CC3200-LAUNCHXL
-
-Note that WiPy comes factory programmed with a default version of MicroPython,
-it cannot be programmed via serial, and can be upgraded only with OTA (see
-below).
-
-- Make sure that you have built both the *bootloader* and the *application* in **release** mode.
-- Make sure the SOP2 jumper is in position.
-- Make sure you Linux system recognized the board and created `ttyUSB*`
-  devices (see below for configuration of `ftdi_sio` driver).
-- Run "make erase" and immediately press Reset button on the device.
-- Wait few seconds.
-- Run "make deploy" and immediately press Reset button on the device.
-- You are recommended to install the latest vendor WiFi firmware
-  servicepack from http://www.ti.com/tool/cc3200sdk. Download
-  CC3200SDK-SERVICEPACK package, install it, and locate `ota_*.ucf`
-  and `ota_*.ucf.signed.bin` files. Copy them to the port's directory
-  and run "make servicepack", with immediate press of Reset button.
-- Remove the SOP2 jumper and reset the board.
-
-Flashing process using TI Uniflash:
-
-- Open CCS_Uniflash and connect to the board (by default on port 22). 
-- Format the serial flash (select 1MB size in case of the CC3200-LAUNCHXL, 2MB in case of the WiPy, leave the rest unchecked).
-- Mark the following files for erasing: `/cert/ca.pem`, `/cert/client.pem`, `/cert/private.key` and `/tmp/pac.bin`.
-- Add a new file with the name of /sys/mcuimg.bin, and select the URL to point to cc3200\bootmgr\build\\bootloader.bin.
-- Add another file with the name of /sys/factimg.bin, and select the URL to point to cc3200\build\\mcuimg.bin.
-- Click "Program" to apply all changes.
-- Flash the latest service pack (servicepack_1.0.0.10.0.bin) using the "Service Pack Update" button.
-- Close CCS_Uniflash, remove the SOP2 jumper and reset the board.
-
-## Playing with MicroPython and the CC3200:
-
-Once the software is running, you have two options to access the MicroPython REPL:
-
-- Through telnet.
-  * Connect to the network created by the board (as boots up in AP mode), **ssid = "wipy-wlan", key = "www.wipy.io"**.
-    * You can also reinitialize the WLAN in station mode and connect to another AP, or in AP mode but with a
-      different ssid and/or key.
-  * Use your favourite telnet client with the following settings: **host = 192.168.1.1, port = 23.**
-  * Log in with **user = "micro" and password = "python"**
-
-- Through UART (serial).
-  * This is enabled by default in the standard configuration, for UART0 (speed 115200).
-  * For CC3200-LAUNCHXL, you will need to configure Linux `ftdi_sio` driver as described
-    in the [blog post](http://www.achanceofbrainshowers.com/blog/tech/2014/8/19/cc3200-development-under-linux/).
-    After that, connecting a board will create two `/dev/ttyUSB*` devices, a serial
-    console is available on the 2nd one (usually `/dev/ttyUSB1`).
-  * WiPy doesn't have onboard USB-UART converter, so you will need an external one,
-    connected to GPIO01 (Tx) and GPIO02 (Rx).
-  * Usage of UART port for REPL is controlled by MICROPY_STDIO_UART setting (and
-    is done at the high level, using a suitable call to `os.dupterm()` function
-    in boot.py, so you can override it at runtime regardless of MICROPY_STDIO_UART
-    setting).
-
-The board has a small file system of 192K (WiPy) or 64K (Launchpad) located in the serial flash connected to the CC3200. 
-SD cards are also supported, you can connect any SD card and configure the pinout using the SD class API.
-
-## Uploading scripts:
-
-To upload your MicroPython scripts to the FTP server, open your FTP client of choice and connect to:
-**ftp://192.168.1.1, user = "micro", password = "python"**
-
-Tested FTP clients are: FileZilla, FireFTP, FireFox, IE and Chrome. Other
-clients should work as well, but you may need to configure them to use a
-single connection (this should be the default for any compliant FTP client).
-
-## Upgrading the firmware Over The Air (OTA)
-
-OTA software updates can be performed through the builtin FTP server. After
-building a new `mcuimg.bin` in release mode, upload it to:
-`/flash/sys/mcuimg.bin`. It will take around 6s (The TI SimpleLink file
-system is quite slow because every file is mirrored for safety). You won't
-see the file being stored inside `/flash/sys/` because it's actually saved
-bypassing FatFS, but rest assured that the file was successfully transferred,
-and it has been signed with a MD5 checksum to verify its integrity.
-Now, reset the MCU by pressing the switch on the board, or by typing:
-
-```python
-import machine
-machine.reset()
-```
-
-There's a script which automates this process from the host side:
-
-- Make sure the board is running and connected to the same network as the computer.
-
-```bash
-make BTARGET=application BTYPE=release BOARD=LAUNCHXL WIPY_IP=192.168.1.1 WIPY_USER=micro WIPY_PWD=python deploy-ota
-```
-
-If `WIPY_IP`, `WIPY_USER` or `WIPY_PWD` are omitted the default values (the ones shown above) will be used.
-
-
-## Notes and known issues
-
-## Regarding old revisions of the CC3200-LAUNCHXL
-
-First silicon (pre-release) revisions of the CC3200 had issues with the ram blocks, and MicroPython cannot run
-there. Make sure to use a **v4.1 (or higher) LAUNCHXL board** when trying this port, otherwise it won't work.
-
-### Note regarding FileZilla
-
-Do not use the quick connect button, instead, open the site manager and create a new configuration. In the "General" tab make 
-sure that encryption is set to: "Only use plain FTP (insecure)". In the Transfer Settings tab limit the max number of connections 
-to one, otherwise FileZilla will try to open a second command connection when retrieving and saving files, and for simplicity and 
-to reduce code size, only one command and one data connections are possible.
diff --git a/ports/cc3200/application.lds b/ports/cc3200/application.lds
deleted file mode 100644
index 3f5e72f8bd650..0000000000000
--- a/ports/cc3200/application.lds
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-__stack_size__    = 2K;       /* interrupts are handled within this stack */
-__min_heap_size__ = 8K;
-
-MEMORY
-{
-    SRAMB (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
-    SRAM  (rwx) : ORIGIN = 0x20004000, LENGTH = 0x0003C000
-}
-
-ENTRY(ResetISR)
-
-SECTIONS
-{  
-    /* place the FreeRTOS heap (the MicroPython stack will live here) */
-    .rtos_heap (NOLOAD) :
-    {
-        . = ALIGN(8);
-        *(.rtos_heap*)
-        . = ALIGN(8);
-    } > SRAMB
-
-    .text :
-    {
-        _text = .;
-        KEEP(*(.intvecs))
-        *(.text*)
-        *(.rodata*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(8);
-    } > SRAM
-
-    .ARM :
-    {
-        __exidx_start = .;
-        *(.ARM.exidx*)
-        __exidx_end = .;
-        _etext = .;
-    } > SRAM
-
-    .data :
-    {
-        . = ALIGN(8);
-        _data = .;
-        *(.data*)
-        . = ALIGN(8);
-        _edata = .;
-    } > SRAM
-
-    .bss :
-    {
-        . = ALIGN(8);
-        _bss = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(8);
-        _ebss = .;
-    } > SRAM
-
-    /* place here functions that are only called during boot up, */
-    /* that way, we can re-use this area for the MicroPython heap */
-    .boot :
-    {
-        . = ALIGN(8);
-        _boot = .;
-        *(.boot*)
-        . = ALIGN(8);
-        _eboot = .;
-    } > SRAM
-     
-    /* allocate the MicroPython heap */
-    .heap :
-    {
-        . = ALIGN(8);
-        _heap = .;
-        . = . + __min_heap_size__;
-        . = . + (ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ - ABSOLUTE(.));
-        . = ALIGN(8);
-        _eheap = .;
-    } > SRAM
-
-    /* allocate the main stack */
-    .stack ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ :
-    {
-        . = ALIGN(8);
-        _stack = .;
-        . = . + __stack_size__;
-        . = ALIGN(8);
-        _estack = .;
-    } > SRAM
-}
diff --git a/ports/cc3200/application.mk b/ports/cc3200/application.mk
deleted file mode 100644
index 19abe661631ae..0000000000000
--- a/ports/cc3200/application.mk
+++ /dev/null
@@ -1,240 +0,0 @@
-APP_INC =  -I.
-APP_INC += -I$(TOP)
-APP_INC += -Ifatfs/src
-APP_INC += -Ifatfs/src/drivers
-APP_INC += -IFreeRTOS
-APP_INC += -IFreeRTOS/Source/include
-APP_INC += -IFreeRTOS/Source/portable/GCC/ARM_CM3
-APP_INC += -Iftp
-APP_INC += -Ihal
-APP_INC += -Ihal/inc
-APP_INC += -Imisc
-APP_INC += -Imods
-APP_INC += -I$(TOP)/drivers/cc3100/inc
-APP_INC += -Isimplelink
-APP_INC += -Isimplelink/oslib
-APP_INC += -Itelnet
-APP_INC += -Iutil
-APP_INC += -Ibootmgr
-APP_INC += -I$(BUILD)
-APP_INC += -I$(BUILD)/genhdr
-APP_INC += -I$(TOP)/ports/stm32
-
-APP_CPPDEFINES = -Dgcc -DTARGET_IS_CC3200 -DSL_FULL -DUSE_FREERTOS
-
-APP_FATFS_SRC_C = $(addprefix fatfs/src/,\
-	drivers/sflash_diskio.c \
-	drivers/sd_diskio.c \
-	)
-
-APP_RTOS_SRC_C = $(addprefix FreeRTOS/Source/,\
-	croutine.c \
-	event_groups.c \
-	list.c \
-	queue.c \
-	tasks.c \
-	timers.c \
-	portable/GCC/ARM_CM3/port.c \
-	portable/MemMang/heap_4.c \
-	)
-
-APP_FTP_SRC_C = $(addprefix ftp/,\
-	ftp.c \
-	updater.c \
-	)
-
-APP_HAL_SRC_C = $(addprefix hal/,\
-	adc.c \
-	aes.c \
-	cc3200_hal.c \
-	cpu.c \
-	crc.c \
-	des.c \
-	gpio.c \
-	i2c.c \
-	i2s.c \
-	interrupt.c \
-	pin.c \
-	prcm.c \
-	sdhost.c \
-	shamd5.c \
-	spi.c \
-	startup_gcc.c \
-	systick.c \
-	timer.c \
-	uart.c \
-	utils.c \
-	wdt.c \
-	)
-
-APP_MISC_SRC_C = $(addprefix misc/,\
-	antenna.c \
-	FreeRTOSHooks.c \
-	help.c \
-	mpirq.c \
-	mperror.c \
-	mpexception.c \
-	)
-
-APP_MODS_SRC_C = $(addprefix mods/,\
-	modmachine.c \
-	modnetwork.c \
-	modubinascii.c \
-	moduos.c \
-	modusocket.c \
-	modussl.c \
-	modutime.c \
-	modwipy.c \
-	modwlan.c \
-	pybadc.c \
-	pybpin.c \
-	pybi2c.c \
-	pybrtc.c \
-	pybflash.c \
-	pybsd.c \
-	pybsleep.c \
-	pybspi.c \
-	pybtimer.c \
-	pybuart.c \
-	pybwdt.c \
-	)
-
-APP_CC3100_SRC_C = $(addprefix drivers/cc3100/src/,\
-	device.c \
-	driver.c \
-	flowcont.c \
-	fs.c \
-	netapp.c \
-	netcfg.c \
-	socket.c \
-	wlan.c \
-	)
-
-APP_SL_SRC_C = $(addprefix simplelink/,\
-	oslib/osi_freertos.c \
-	cc_pal.c \
-	) 
-
-APP_TELNET_SRC_C = $(addprefix telnet/,\
-	telnet.c \
-	)
-	
-APP_UTIL_SRC_C = $(addprefix util/,\
-	cryptohash.c \
-	fifo.c \
-	gccollect.c \
-	random.c \
-	socketfifo.c \
-	)
-	
-APP_UTIL_SRC_S = $(addprefix util/,\
-	gchelper.s \
-	sleeprestore.s \
-	)
-	
-APP_MAIN_SRC_C = \
-	main.c \
-	mptask.c \
-	mpthreadport.c \
-	serverstask.c \
-	fatfs_port.c \
-	
-APP_LIB_SRC_C = $(addprefix lib/,\
-	oofatfs/ff.c \
-	oofatfs/option/unicode.c \
-	libc/string0.c \
-	mp-readline/readline.c \
-	netutils/netutils.c \
-	timeutils/timeutils.c \
-	utils/pyexec.c \
-	utils/interrupt_char.c \
-	utils/sys_stdio_mphal.c \
-	)
-	
-APP_STM_SRC_C = $(addprefix ports/stm32/,\
-	bufhelper.c \
-	irq.c \
-	)
-
-OBJ = $(PY_O) $(addprefix $(BUILD)/, $(APP_FATFS_SRC_C:.c=.o) $(APP_RTOS_SRC_C:.c=.o) $(APP_FTP_SRC_C:.c=.o) $(APP_HAL_SRC_C:.c=.o) $(APP_MISC_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(APP_MODS_SRC_C:.c=.o) $(APP_CC3100_SRC_C:.c=.o) $(APP_SL_SRC_C:.c=.o) $(APP_TELNET_SRC_C:.c=.o) $(APP_UTIL_SRC_C:.c=.o) $(APP_UTIL_SRC_S:.s=.o))
-OBJ += $(addprefix $(BUILD)/, $(APP_MAIN_SRC_C:.c=.o) $(APP_LIB_SRC_C:.c=.o) $(APP_STM_SRC_C:.c=.o))
-OBJ += $(BUILD)/pins.o
-
-# List of sources for qstr extraction
-SRC_QSTR += $(APP_MODS_SRC_C) $(APP_MISC_SRC_C) $(APP_STM_SRC_C)
-# Append any auto-generated sources that are needed by sources listed in
-# SRC_QSTR
-SRC_QSTR_AUTO_DEPS +=
-
-# Add the linker script
-LINKER_SCRIPT = application.lds
-LDFLAGS += -T $(LINKER_SCRIPT)
-
-# Add the application specific CFLAGS
-CFLAGS += $(APP_CPPDEFINES) $(APP_INC)
-
-# Disable strict aliasing for the simplelink driver
-$(BUILD)/drivers/cc3100/src/driver.o: CFLAGS += -fno-strict-aliasing
-
-# Check if we would like to debug the port code
-ifeq ($(BTYPE), release)
-CFLAGS += -DNDEBUG
-else
-ifeq ($(BTYPE), debug)
-CFLAGS += -DNDEBUG
-else
-$(error Invalid BTYPE specified)
-endif
-endif
-
-SHELL = bash
-APP_SIGN = appsign.sh
-UPDATE_WIPY ?= tools/update-wipy.py
-WIPY_IP ?= '192.168.1.1'
-WIPY_USER ?= 'micro'
-WIPY_PWD ?= 'python'
-
-all: $(BUILD)/mcuimg.bin
-
-.PHONY: deploy-ota
-
-deploy-ota: $(BUILD)/mcuimg.bin
-	$(ECHO) "Writing $< to the board"
-	$(Q)$(PYTHON) $(UPDATE_WIPY) --verify --ip $(WIPY_IP) --user $(WIPY_USER) --password $(WIPY_PWD) --file $<
-
-$(BUILD)/application.axf: $(OBJ) $(LINKER_SCRIPT)
-	$(ECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) $(LIBS)
-	$(Q)$(SIZE) $@
-
-$(BUILD)/application.bin: $(BUILD)/application.axf
-	$(ECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary $< $@
-
-$(BUILD)/mcuimg.bin: $(BUILD)/application.bin
-	$(ECHO) "Create $@"
-	$(Q)$(SHELL) $(APP_SIGN) $(BUILD)
-
-MAKE_PINS = boards/make-pins.py
-BOARD_PINS = boards/$(BOARD)/pins.csv
-AF_FILE = boards/cc3200_af.csv
-PREFIX_FILE = boards/cc3200_prefix.c
-GEN_PINS_SRC = $(BUILD)/pins.c
-GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
-GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
-
-# Making OBJ use an order-only dependency on the generated pins.h file
-# has the side effect of making the pins.h file before we actually compile
-# any of the objects. The normal dependency generation will deal with the
-# case when pins.h is modified. But when it doesn't exist, we don't know
-# which source files might need it.
-$(OBJ): | $(GEN_PINS_HDR)
-
-# Call make-pins.py to generate both pins_gen.c and pins.h
-$(GEN_PINS_SRC) $(GEN_PINS_HDR) $(GEN_PINS_QSTR): $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
-	$(ECHO) "Create $@"
-	$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC)
-
-$(BUILD)/pins.o: $(BUILD)/pins.c
-	$(call compile_c)
diff --git a/ports/cc3200/appsign.sh b/ports/cc3200/appsign.sh
deleted file mode 100644
index 5752b40cd5ebb..0000000000000
--- a/ports/cc3200/appsign.sh
+++ /dev/null
@@ -1,29 +0,0 @@
-#!/bin/bash
-
-if [ "$#" -ne 1 ]; then
-    echo "Usage: appsign.sh *build dir*"
-    exit 1
-fi
-
-# Build location
-BUILD=$1
-
-# Generate the MD5 hash
-# md5 on Darwin, md5sum on Unix
-if [ `uname -s` = "Darwin" ]; then
-echo -n `md5 -q $BUILD/application.bin` > __md5hash.bin
-else
-echo -n `md5sum --binary $BUILD/application.bin | awk '{ print $1 }'` > __md5hash.bin
-fi
-
-# Concatenate it with the application binary
-cat $BUILD/application.bin __md5hash.bin > $BUILD/mcuimg.bin
-RET=$?
-
-# Remove the tmp files
-rm -f __md5hash.bin
-
-# Remove the unsigned binary
-rm -f $BUILD/application.bin
-
-exit $RET
diff --git a/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h b/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h
deleted file mode 100644
index b3d766d1e242d..0000000000000
--- a/ports/cc3200/boards/LAUNCHXL/mpconfigboard.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#define LAUNCHXL
-
-#define MICROPY_HW_BOARD_NAME                       "LaunchPad"
-#define MICROPY_HW_MCU_NAME                         "CC3200"
-
-#define MICROPY_HW_ANTENNA_DIVERSITY                (0)
-
-#define MICROPY_STDIO_UART                          1
-#define MICROPY_STDIO_UART_BAUD                     115200
-
-#define MICROPY_SYS_LED_PRCM                        PRCM_GPIOA1
-#define MICROPY_SAFE_BOOT_PRCM                      PRCM_GPIOA2
-#define MICROPY_SYS_LED_PORT                        GPIOA1_BASE
-#define MICROPY_SAFE_BOOT_PORT                      GPIOA2_BASE
-#define MICROPY_SYS_LED_GPIO                        pin_GP9
-#define MICROPY_SYS_LED_PIN_NUM                     PIN_64      // GP9
-#define MICROPY_SAFE_BOOT_PIN_NUM                   PIN_15      // GP22
-#define MICROPY_SYS_LED_PORT_PIN                    GPIO_PIN_1
-#define MICROPY_SAFE_BOOT_PORT_PIN                  GPIO_PIN_6
-
-#define MICROPY_PORT_SFLASH_BLOCK_COUNT             32
-
diff --git a/ports/cc3200/boards/LAUNCHXL/pins.csv b/ports/cc3200/boards/LAUNCHXL/pins.csv
deleted file mode 100644
index 38071e1307a8d..0000000000000
--- a/ports/cc3200/boards/LAUNCHXL/pins.csv
+++ /dev/null
@@ -1,25 +0,0 @@
-P12,58
-P13,4
-P14,3
-P15,61
-P16,59
-P17,5
-P18,62
-P19,1
-P110,2
-P33,57
-P34,60
-P37,63
-P38,53
-P39,64
-P310,50
-P49,16
-P410,17
-P22,18
-P23,8
-P24,45
-P26,7
-P27,6
-P28,21
-P29,55
-P210,15
\ No newline at end of file
diff --git a/ports/cc3200/boards/WIPY/mpconfigboard.h b/ports/cc3200/boards/WIPY/mpconfigboard.h
deleted file mode 100644
index af15cca3508fa..0000000000000
--- a/ports/cc3200/boards/WIPY/mpconfigboard.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#define WIPY
-
-#define MICROPY_HW_BOARD_NAME                       "WiPy"
-#define MICROPY_HW_MCU_NAME                         "CC3200"
-
-#define MICROPY_HW_ANTENNA_DIVERSITY                (1)
-
-#define MICROPY_STDIO_UART                          1
-#define MICROPY_STDIO_UART_BAUD                     115200
-
-#define MICROPY_SYS_LED_PRCM                        PRCM_GPIOA3
-#define MICROPY_SAFE_BOOT_PRCM                      PRCM_GPIOA3
-#define MICROPY_SYS_LED_PORT                        GPIOA3_BASE
-#define MICROPY_SAFE_BOOT_PORT                      GPIOA3_BASE
-#define MICROPY_SYS_LED_GPIO                        pin_GP25
-#define MICROPY_SYS_LED_PIN_NUM                     PIN_21      // GP25   (SOP2)
-#define MICROPY_SAFE_BOOT_PIN_NUM                   PIN_18      // GP28
-#define MICROPY_SYS_LED_PORT_PIN                    GPIO_PIN_1
-#define MICROPY_SAFE_BOOT_PORT_PIN                  GPIO_PIN_4
-
-#define MICROPY_PORT_SFLASH_BLOCK_COUNT             96
diff --git a/ports/cc3200/boards/WIPY/pins.csv b/ports/cc3200/boards/WIPY/pins.csv
deleted file mode 100644
index c4e43762466f2..0000000000000
--- a/ports/cc3200/boards/WIPY/pins.csv
+++ /dev/null
@@ -1,25 +0,0 @@
-L2,GP2
-L3,GP1
-L4,GP23
-L5,GP24
-L6,GP11
-L7,GP12
-L8,GP13
-L9,GP14
-L10,GP15
-L11,GP16
-L12,GP17
-L13,GP22
-L14,GP28
-R4,GP10
-R5,GP9
-R6,GP8
-R7,GP7
-R8,GP6
-R9,GP30
-R10,GP31
-R11,GP3
-R12,GP0
-R13,GP4
-R14,GP5
-HBL,GP25
diff --git a/ports/cc3200/boards/cc3200_af.csv b/ports/cc3200/boards/cc3200_af.csv
deleted file mode 100644
index a93cb54a5b510..0000000000000
--- a/ports/cc3200/boards/cc3200_af.csv
+++ /dev/null
@@ -1,66 +0,0 @@
-Pin,Name,Default,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC
-1,GP10,GP10,GP10,I2C0_SCL,,TIM3_PWM,,,SD0_CLK,UART1_TX,,,,,TIM0_CC,,,,
-2,GP11,GP11,GP11,I2C0_SDA,,TIM3_PWM,pXCLK(XVCLK),,SD0_CMD,UART1_RX,,,,,TIM1_CC,I2S0_FS,,,
-3,GP12,GP12,GP12,,,I2S0_CLK,pVS(VSYNC),I2C0_SCL,,UART0_TX,,,,,TIM1_CC,,,,
-4,GP13,GP13,GP13,,,,pHS(HSYNC),I2C0_SDA,,UART0_RX,,,,,TIM2_CC,,,,
-5,GP14,GP14,GP14,,,,pDATA8(CAM_D4),I2C0_SCL,,SPI0_CLK,,,,,TIM2_CC,,,,
-6,GP15,GP15,GP15,,,,pDATA9(CAM_D5),I2C0_SDA,,SPI0_MISO,SD0_DAT0,,,,,TIM3_CC,,,
-7,GP16,GP16,GP16,,,,pDATA10(CAM_D6),UART1_TX,,SPI0_MOSI,SD0_CLK,,,,,TIM3_CC,,,
-8,GP17,GP17,GP17,,,,pDATA11(CAM_D7),UART1_RX,,SPI0_CS0,SD0_CMD,,,,,,,,
-9,VDD_DIG1,VDD_DIG1,VDD_DIG1,,,,,,,,,,,,,,,,
-10,VIN_IO1,VIN_IO1,VIN_IO1,,,,,,,,,,,,,,,,
-11,FLASH_SPI_CLK,FLASH_SPI_CLK,FLASH_SPI_CLK,,,,,,,,,,,,,,,,
-12,FLASH_SPI_DOUT,FLASH_SPI_DOUT,FLASH_SPI_DOUT,,,,,,,,,,,,,,,,
-13,FLASH_SPI_DIN,FLASH_SPI_DIN,FLASH_SPI_DIN,,,,,,,,,,,,,,,,
-14,FLASH_SPI_CS,FLASH_SPI_CS,FLASH_SPI_CS,,,,,,,,,,,,,,,,
-15,GP22,GP22,GP22,,,,,TIM2_CC,,I2S0_FS,,,,,,,,,
-16,GP23,TDI,GP23,TDI,UART1_TX,,,,,,,I2C0_SCL,,,,,,,
-17,GP24,TDO,GP24,TDO,UART1_RX,,TIM3_CC,TIM0_PWM,I2S0_FS,,,I2C0_SDA,,,,,,,
-18,GP28,GP28,GP28,,,,,,,,,,,,,,,,
-19,TCK,TCK,,TCK,,,,,,,TIM1_PWM,,,,,,,,
-20,GP29,TMS,GP29,TMS,,,,,,,,,,,,,,,
-21,GP25,SOP2,GP25,,I2S0_FS,,,,,,,TIM1_PWM,,,,,,,
-22,WLAN_XTAL_N,WLAN_XTAL_N,WLAN_XTAL_N,,,,,,,,,,,,,,,,
-23,WLAN_XTAL_P,WLAN_XTAL_P,WLAN_XTAL_P,,,,,,,,,,,,,,,,
-24,VDD_PLL,VDD_PLL,VDD_PLL,,,,,,,,,,,,,,,,
-25,LDO_IN2,LDO_IN2,LDO_IN2,,,,,,,,,,,,,,,,
-26,NC,NC,NC,,,,,,,,,,,,,,,,
-27,NC,NC,NC,,,,,,,,,,,,,,,,
-28,NC,NC,NC,,,,,,,,,,,,,,,,
-29,ANTSEL1,ANTSEL1,ANTSEL1,,,,,,,,,,,,,,,,
-30,ANTSEL2,ANTSEL2,ANTSEL2,,,,,,,,,,,,,,,,
-31,RF_BG,RF_BG,RF_BG,,,,,,,,,,,,,,,,
-32,nRESET,nRESET,nRESET,,,,,,,,,,,,,,,,
-33,VDD_PA_IN,VDD_PA_IN,VDD_PA_IN,,,,,,,,,,,,,,,,
-34,SOP1,SOP1,SOP1,,,,,,,,,,,,,,,,
-35,SOP0,SOP0,SOP0,,,,,,,,,,,,,,,,
-36,LDO_IN1,LDO_IN1,LDO_IN1,,,,,,,,,,,,,,,,
-37,VIN_DCDC_ANA,VIN_DCDC_ANA,VIN_DCDC_ANA,,,,,,,,,,,,,,,,
-38,DCDC_ANA_SW,DCDC_ANA_SW,DCDC_ANA_SW,,,,,,,,,,,,,,,,
-39,VIN_DCDC_PA,VIN_DCDC_ PA,VIN_DCDC_PA,,,,,,,,,,,,,,,,
-40,DCDC_PA_SW_P,DCDC_PA_SW_P,DCDC_PA_SW_P,,,,,,,,,,,,,,,,
-41,DCDC_PA_SW_N,DCDC_PA_SW_N,DCDC_PA_SW_N,,,,,,,,,,,,,,,,
-42,DCDC_PA_OUT,DCDC_PA_O UT,DCDC_PA_O UT,,,,,,,,,,,,,,,,
-43,DCDC_DIG_SW,DCDC_DIG_ SW,DCDC_DIG_ SW,,,,,,,,,,,,,,,,
-44,VIN_DCDC_DIG,VIN_DCDC_ DIG,VIN_DCDC_ DIG,,,,,,,,,,,,,,,,
-45,GP31,DCDC_ANA2_SW_P,GP31,,UART1_RX,,,,I2S0_DAT0,SPI0_CLK,,UART0_RX,,,I2S0_FS,,,,
-46,DCDC_ANA2_SW_N,DCDC_ANA2_SW_N,DCDC_ANA2_SW_N,,,,,,,,,,,,,,,,
-47,VDD_ANA2,VDD_ANA2,VDD_ANA2,,,,,,,,,,,,,,,,
-48,VDD_ANA1,VDD_ANA1,VDD_ANA1,,,,,,,,,,,,,,,,
-49,VDD_RAM,VDD_RAM,VDD_RAM,,,,,,,,,,,,,,,,
-50,GP0,GP0,GP0,,,UART0_RTS,I2S0_DAT0,,I2S0_DAT1,TIM0_CC,,SPI0_CS0,UART1_RTS,,UART0_CTS,,,,
-51,RTC_XTAL_P,RTC_XTAL_P,RTC_XTAL_P,,,,,,,,,,,,,,,,
-52,RTC_XTAL_N,RTC_XTAL_N,GP32,,I2S0_CLK,,I2S0_DAT0,,UART0_RTS,,SPI0_MOSI,,,,,,,,
-53,GP30,GP30,GP30,,I2S0_CLK,I2S0_FS,TIM2_CC,,,SPI0_MISO,,UART0_TX,,,,,,,
-54,VIN_IO2,VIN_IO2,VIN_IO2,,,,,,,,,,,,,,,,
-55,GP1,GP1,GP1,,,UART0_TX,pCLK (PIXCLK),,UART1_TX,TIM0_CC,,,,,,,,,
-56,VDD_DIG2,VDD_DIG2,VDD_DIG2,,,,,,,,,,,,,,,,
-57,GP2,GP2,GP2,,,UART0_RX,,,UART1_RX,TIM1_CC,,,,,,,,,ADC0_CH0
-58,GP3,GP3,GP3,,,,pDATA7(CAM_D3),,UART1_TX,,,,,,,,,,ADC0_CH1
-59,GP4,GP4,GP4,,,,pDATA6(CAM_D2),,UART1_RX,,,,,,,,,,ADC0_CH2
-60,GP5,GP5,GP5,,,,pDATA5(CAM_D1),,I2S0_DAT1,TIM2_CC,,,,,,,,,ADC0_CH3
-61,GP6,GP6,GP6,,,UART1_CTS,pDATA4(CAM_D0),UART0_RTS,UART0_CTS,TIM3_CC,,,,,,,,,
-62,GP7,GP7,GP7,,,UART1_RTS,,,,,,,UART0_RTS,UART0_TX,,I2S0_CLK,,,
-63,GP8,GP8,GP8,,,,,,SD0_IRQ,I2S0_FS,,,,,TIM3_CC,,,,
-64,GP9,GP9,GP9,,,TIM2_PWM,,,SD0_DAT0,I2S0_DAT0,,,,,TIM0_CC,,,,
-65,GND_TAB,GND_TAB,GND_TAB,,,,,,,,,,,,,,,,
diff --git a/ports/cc3200/boards/cc3200_prefix.c b/ports/cc3200/boards/cc3200_prefix.c
deleted file mode 100644
index d03efe0240b79..0000000000000
--- a/ports/cc3200/boards/cc3200_prefix.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013, 2014 Damien P. George
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-// cc3200_prefix.c becomes the initial portion of the generated pins file.
-
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "pin.h"
-#include "gpio.h"
-#include "pybpin.h"
-
-
-#define AF(af_name, af_idx, af_fn, af_unit, af_type) \
-{ \
-    .name = MP_QSTR_ ## af_name, \
-    .idx = (af_idx), \
-    .fn = PIN_FN_ ## af_fn, \
-    .unit = (af_unit), \
-    .type = PIN_TYPE_ ## af_fn ## _ ## af_type, \
-}
-
-
-#define PIN(p_pin_name, p_port, p_bit, p_pin_num, p_af_list, p_num_afs) \
-{ \
-    { &pin_type }, \
-    .name           = MP_QSTR_ ## p_pin_name, \
-    .port           = PORT_A ## p_port, \
-    .af_list        = (p_af_list), \
-    .pull           = PIN_TYPE_STD, \
-    .bit            = (p_bit), \
-    .pin_num        = (p_pin_num), \
-    .af             = PIN_MODE_0, \
-    .strength       = PIN_STRENGTH_4MA, \
-    .mode           = GPIO_DIR_MODE_IN, \
-    .num_afs        = (p_num_afs), \
-    .value          = 0, \
-    .used           = false, \
-    .irq_trigger    = 0, \
-    .irq_flags      = 0, \
-}
diff --git a/ports/cc3200/boards/make-pins.py b/ports/cc3200/boards/make-pins.py
deleted file mode 100644
index 30db4ac9ec75c..0000000000000
--- a/ports/cc3200/boards/make-pins.py
+++ /dev/null
@@ -1,233 +0,0 @@
-#!/usr/bin/env python
-"""Generates the pins file for the CC3200."""
-
-from __future__ import print_function
-
-import argparse
-import sys
-import csv
-
-
-SUPPORTED_AFS = { 'UART': ('TX', 'RX', 'RTS', 'CTS'),
-                  'SPI': ('CLK', 'MOSI', 'MISO', 'CS0'),
-                  #'I2S': ('CLK', 'FS', 'DAT0', 'DAT1'),
-                  'I2C': ('SDA', 'SCL'),
-                  'TIM': ('PWM'),
-                  'SD': ('CLK', 'CMD', 'DAT0'),
-                  'ADC': ('CH0', 'CH1', 'CH2', 'CH3')
-                }
-
-def parse_port_pin(name_str):
-    """Parses a string and returns a (port, gpio_bit) tuple."""
-    if len(name_str) < 3:
-        raise ValueError("Expecting pin name to be at least 3 characters")
-    if name_str[:2] != 'GP':
-        raise ValueError("Expecting pin name to start with GP")
-    if not name_str[2:].isdigit():
-        raise ValueError("Expecting numeric GPIO number")
-    port = int(int(name_str[2:]) / 8)
-    gpio_bit = 1 << int(int(name_str[2:]) % 8)
-    return (port, gpio_bit)
-
-
-class AF:
-    """Holds the description of an alternate function"""
-    def __init__(self, name, idx, fn, unit, type):
-        self.name = name
-        self.idx = idx
-        if self.idx > 15:
-            self.idx = -1
-        self.fn = fn
-        self.unit = unit
-        self.type = type
-
-    def print(self):
-        print ('    AF({:16s}, {:4d}, {:8s}, {:4d}, {:8s}),    // {}'.format(self.name, self.idx, self.fn, self.unit, self.type, self.name))
-
-
-class Pin:
-    """Holds the information associated with a pin."""
-    def __init__(self, name, port, gpio_bit, pin_num):
-        self.name = name
-        self.port = port
-        self.gpio_bit = gpio_bit
-        self.pin_num = pin_num
-        self.board_pin = False
-        self.afs = []
-
-    def add_af(self, af):
-        self.afs.append(af)
-
-    def print(self):
-        print('// {}'.format(self.name))
-        if len(self.afs):
-            print('const pin_af_t pin_{}_af[] = {{'.format(self.name))
-            for af in self.afs:
-                af.print()
-            print('};')
-            print('pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, pin_{}_af, {});\n'.format(
-                   self.name, self.name, self.port, self.gpio_bit, self.pin_num, self.name, len(self.afs)))
-        else:
-            print('pin_obj_t pin_{:4s} = PIN({:6s}, {:1d}, {:3d}, {:2d}, NULL, 0);\n'.format(
-                   self.name, self.name, self.port, self.gpio_bit, self.pin_num))
-
-    def print_header(self, hdr_file):
-        hdr_file.write('extern pin_obj_t pin_{:s};\n'.format(self.name))
-
-
-class Pins:
-    def __init__(self):
-        self.board_pins = []   # list of pin objects
-
-    def find_pin(self, port, gpio_bit):
-        for pin in self.board_pins:
-            if pin.port == port and pin.gpio_bit == gpio_bit:
-                return pin
-
-    def find_pin_by_num(self, pin_num):
-        for pin in self.board_pins:
-            if pin.pin_num == pin_num:
-                return pin
-
-    def find_pin_by_name(self, name):
-        for pin in self.board_pins:
-            if pin.name == name:
-                return pin
-
-    def parse_af_file(self, filename, pin_col, pinname_col, af_start_col):
-        with open(filename, 'r') as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                try:
-                    (port_num, gpio_bit) = parse_port_pin(row[pinname_col])
-                except:
-                    continue
-                if not row[pin_col].isdigit():
-                    raise ValueError("Invalid pin number {:s} in row {:s}".format(row[pin_col]), row)
-                # Pin numbers must start from 0 when used with the TI API
-                pin_num = int(row[pin_col]) - 1;        
-                pin = Pin(row[pinname_col], port_num, gpio_bit, pin_num)
-                self.board_pins.append(pin)
-                af_idx = 0
-                for af in row[af_start_col:]:
-                    af_splitted = af.split('_')
-                    fn_name = af_splitted[0].rstrip('0123456789')
-                    if  fn_name in SUPPORTED_AFS:
-                        type_name = af_splitted[1]
-                        if type_name in SUPPORTED_AFS[fn_name]:
-                            unit_idx = af_splitted[0][-1]
-                            pin.add_af(AF(af, af_idx, fn_name, int(unit_idx), type_name))
-                    af_idx += 1
-
-    def parse_board_file(self, filename, cpu_pin_col):
-        with open(filename, 'r') as csvfile:
-            rows = csv.reader(csvfile)
-            for row in rows:
-                # Pin numbers must start from 0 when used with the TI API
-                if row[cpu_pin_col].isdigit():
-                    pin = self.find_pin_by_num(int(row[cpu_pin_col]) - 1)
-                else:
-                    pin = self.find_pin_by_name(row[cpu_pin_col])
-                if pin:
-                    pin.board_pin = True
-
-    def print_named(self, label, pins):
-        print('')
-        print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label))
-        for pin in pins:
-            if pin.board_pin:
-                print('    {{ MP_ROM_QSTR(MP_QSTR_{:6s}), MP_ROM_PTR(&pin_{:6s}) }},'.format(pin.name, pin.name))
-        print('};')
-        print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label));
-
-    def print(self):
-        for pin in self.board_pins:
-            if pin.board_pin:
-                pin.print()
-        self.print_named('board', self.board_pins)
-        print('')
-
-    def print_header(self, hdr_filename):
-        with open(hdr_filename, 'wt') as hdr_file:
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin.print_header(hdr_file)
-
-    def print_qstr(self, qstr_filename):
-        with open(qstr_filename, 'wt') as qstr_file:
-            pin_qstr_set = set([])
-            af_qstr_set = set([])
-            for pin in self.board_pins:
-                if pin.board_pin:
-                    pin_qstr_set |= set([pin.name])
-                    for af in pin.afs:
-                        af_qstr_set |= set([af.name])
-            print('// Board pins', file=qstr_file)
-            for qstr in sorted(pin_qstr_set):
-                print('Q({})'.format(qstr), file=qstr_file)
-            print('\n// Pin AFs', file=qstr_file)
-            for qstr in sorted(af_qstr_set):
-                print('Q({})'.format(qstr), file=qstr_file)
-
-
-def main():
-    parser = argparse.ArgumentParser(
-        prog="make-pins.py",
-        usage="%(prog)s [options] [command]",
-        description="Generate board specific pin file"
-    )
-    parser.add_argument(
-        "-a", "--af",
-        dest="af_filename",
-        help="Specifies the alternate function file for the chip",
-        default="cc3200_af.csv"
-    )
-    parser.add_argument(
-        "-b", "--board",
-        dest="board_filename",
-        help="Specifies the board file",
-    )
-    parser.add_argument(
-        "-p", "--prefix",
-        dest="prefix_filename",
-        help="Specifies beginning portion of generated pins file",
-        default="cc3200_prefix.c"
-    )
-    parser.add_argument(
-        "-q", "--qstr",
-        dest="qstr_filename",
-        help="Specifies name of generated qstr header file",
-        default="build/pins_qstr.h"
-    )
-    parser.add_argument(
-        "-r", "--hdr",
-        dest="hdr_filename",
-        help="Specifies name of generated pin header file",
-        default="build/pins.h"
-    )
-    args = parser.parse_args(sys.argv[1:])
-
-    pins = Pins()
-
-    print('// This file was automatically generated by make-pins.py')
-    print('//')
-    if args.af_filename:
-        print('// --af {:s}'.format(args.af_filename))
-        pins.parse_af_file(args.af_filename, 0, 1, 3)
-
-    if args.board_filename:
-        print('// --board {:s}'.format(args.board_filename))
-        pins.parse_board_file(args.board_filename, 1)
-
-    if args.prefix_filename:
-        print('// --prefix {:s}'.format(args.prefix_filename))
-        print('')
-        with open(args.prefix_filename, 'r') as prefix_file:
-            print(prefix_file.read())
-    pins.print()
-    pins.print_qstr(args.qstr_filename)
-    pins.print_header(args.hdr_filename)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/ports/cc3200/bootmgr/bootgen.sh b/ports/cc3200/bootmgr/bootgen.sh
deleted file mode 100644
index f4bf32540c066..0000000000000
--- a/ports/cc3200/bootmgr/bootgen.sh
+++ /dev/null
@@ -1,50 +0,0 @@
-#!/bin/bash
-
-if [ "$#" -ne 1 ]; then
-    echo "Usage: bootgen.sh *build dir*"
-    exit 1
-fi
-
-BUILD=$1
-
-# Re-locator Path
-RELOCATOR=bootmgr/relocator
-
-# Build location
-BOOTMGR=${BUILD}
-
-# Check for re-locator binary
-if [ ! -f $RELOCATOR/relocator.bin ]; then
-
-	echo "Error : Relocator Not found!"
-	exit 1
-else
-	echo "Relocator found..."
-fi
-
-# Check for boot manager binary
-if [ ! -f $BOOTMGR/bootmgr.bin ]; then
-
-	echo "Error : Boot Manager Not found!"
-	exit 1
-else
-	echo "Boot Manager found..."
-fi
-
-# echo
-echo "Generating bootloader..."
-
-# Generate an all 0 bin file
-dd if=/dev/zero of=__tmp.bin ibs=1 count=256 conv=notrunc >/dev/null 2>&1
-
-# Generate a 0 padded version of the relocator 
-dd if=$RELOCATOR/relocator.bin of=__tmp.bin ibs=1 conv=notrunc >/dev/null 2>&1
-
-# Concatenate the re-locator and the boot-manager
-cat __tmp.bin $BOOTMGR/bootmgr.bin > $BOOTMGR/bootloader.bin
-
-# Remove the tmp files
-rm -f __tmp.bin
-
-# Remove bootmgr.bin
-rm -f $BOOTMGR/bootmgr.bin
diff --git a/ports/cc3200/bootmgr/bootloader.mk b/ports/cc3200/bootmgr/bootloader.mk
deleted file mode 100644
index 44f1b7f42dfdd..0000000000000
--- a/ports/cc3200/bootmgr/bootloader.mk
+++ /dev/null
@@ -1,132 +0,0 @@
-BUILD = bootmgr/build/$(BOARD)/$(BTYPE)
-
-BOOT_INC  = -Ibootmgr
-BOOT_INC += -Ibootmgr/sl
-BOOT_INC += -Ihal
-BOOT_INC += -Ihal/inc
-BOOT_INC += -I$(TOP)/drivers/cc3100/inc
-BOOT_INC += -Imisc
-BOOT_INC += -Imods
-BOOT_INC += -Isimplelink
-BOOT_INC += -Isimplelink/oslib
-BOOT_INC += -Iutil
-BOOT_INC += -I$(TOP)
-BOOT_INC += -I.
-BOOT_INC += -I$(BUILD)
-
-BOOT_CPPDEFINES = -Dgcc -DBOOTLOADER -DTARGET_IS_CC3200 -DSL_TINY
-
-BOOT_HAL_SRC_C = $(addprefix hal/,\
-	cpu.c \
-	interrupt.c \
-	gpio.c \
-	pin.c \
-	prcm.c \
-	shamd5.c \
-	spi.c \
-	startup_gcc.c \
-	systick.c \
-	utils.c \
-	)
-
-BOOT_CC3100_SRC_C = $(addprefix drivers/cc3100/,\
-	src/device.c \
-	src/driver.c \
-	src/flowcont.c \
-	src/fs.c \
-	src/netapp.c \
-	src/netcfg.c \
-	src/nonos.c \
-	src/socket.c \
-	src/spawn.c \
-	src/wlan.c \
-	)
-
-BOOT_MISC_SRC_C = $(addprefix misc/,\
-	antenna.c \
-	mperror.c \
-	)
-
-BOOT_SL_SRC_C = $(addprefix simplelink/,\
-	cc_pal.c \
-	)
-
-BOOT_UTIL_SRC_C = $(addprefix util/,\
-	cryptohash.c \
-	) 
-
-BOOT_MAIN_SRC_C = \
-	bootmgr/main.c
-
-BOOT_MAIN_SRC_S = \
-	bootmgr/runapp.s
-
-BOOT_PY_SRC_C = $(addprefix py/,\
-	mpprint.c \
-	)
-
-BOOT_LIB_SRC_C = $(addprefix lib/,\
-	libc/string0.c \
-	utils/printf.c \
-	)
-
-OBJ  = $(addprefix $(BUILD)/, $(BOOT_HAL_SRC_C:.c=.o) $(BOOT_SL_SRC_C:.c=.o) $(BOOT_CC3100_SRC_C:.c=.o) $(BOOT_UTIL_SRC_C:.c=.o) $(BOOT_MISC_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(BOOT_MAIN_SRC_C:.c=.o) $(BOOT_MAIN_SRC_S:.s=.o) $(BOOT_PY_SRC_C:.c=.o))
-OBJ += $(addprefix $(BUILD)/, $(BOOT_LIB_SRC_C:.c=.o))
-
-# Add the linker script
-LINKER_SCRIPT = bootmgr/bootmgr.lds
-LDFLAGS += -T $(LINKER_SCRIPT)
-
-# Add the bootloader specific CFLAGS
-CFLAGS += $(BOOT_CPPDEFINES) $(BOOT_INC)
-
-# Disable strict aliasing for the simplelink driver
-$(BUILD)/drivers/cc3100/src/driver.o: CFLAGS += -fno-strict-aliasing
-
-# Check if we would like to debug the port code
-ifeq ($(BTYPE), release)
-# Optimize everything and define the NDEBUG flag
-CFLAGS += -Os -DNDEBUG
-else
-ifeq ($(BTYPE), debug)
-# Define the DEBUG flag
-CFLAGS += -DDEBUG=DEBUG
-# Optimize the stable sources only
-$(BUILD)/hal/%.o: CFLAGS += -Os
-$(BUILD)/misc/%.o: CFLAGS += -Os
-$(BUILD)/simplelink/%.o: CFLAGS += -Os
-$(BUILD)/drivers/cc3100/%.o: CFLAGS += -Os
-$(BUILD)/py/%.o: CFLAGS += -Os
-$(BUILD)/ports/stm32/%.o: CFLAGS += -Os
-else
-$(error Invalid BTYPE specified)
-endif
-endif
-
-SHELL = bash
-BOOT_GEN = bootmgr/bootgen.sh
-HEADER_BUILD = $(BUILD)/genhdr
-
-all: $(BUILD)/bootloader.bin
-
-$(BUILD)/bootmgr.axf: $(OBJ) $(LINKER_SCRIPT)
-	$(ECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) $(LIBS)
-	$(Q)$(SIZE) $@
-	
-$(BUILD)/bootmgr.bin: $(BUILD)/bootmgr.axf
-	$(ECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary $< $@
-
-$(BUILD)/bootloader.bin: $(BUILD)/bootmgr.bin
-	$(ECHO) "Create $@"
-	$(Q)$(SHELL) $(BOOT_GEN) $(BUILD)
-
-# Create an empty "qstrdefs.generated.h" needed by py/mkrules.mk
-$(HEADER_BUILD)/qstrdefs.generated.h: | $(HEADER_BUILD)
-	touch $@
-
-# Create an empty "mpversion.h" needed by py/mkrules.mk
-$(HEADER_BUILD)/mpversion.h: | $(HEADER_BUILD)
-	touch $@
diff --git a/ports/cc3200/bootmgr/bootmgr.h b/ports/cc3200/bootmgr/bootmgr.h
deleted file mode 100644
index 5a370f8c99a76..0000000000000
--- a/ports/cc3200/bootmgr/bootmgr.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
-#define MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
-
-//****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// User image tokens
-//*****************************************************************************
-#define FACTORY_IMG_TOKEN       0x5555AAAA
-#define UPDATE_IMG_TOKEN        0xAA5555AA
-#define USER_BOOT_INFO_TOKEN    0xA5A55A5A
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define APP_IMG_SRAM_OFFSET     0x20004000
-#define DEVICE_IS_CC3101RS      0x18
-#define DEVICE_IS_CC3101S       0x1B
-
-//*****************************************************************************
-// Function prototype
-//*****************************************************************************
-extern void Run(unsigned long);
-
-//****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // MICROPY_INCLUDED_CC3200_BOOTMGR_BOOTMGR_H
diff --git a/ports/cc3200/bootmgr/bootmgr.lds b/ports/cc3200/bootmgr/bootmgr.lds
deleted file mode 100644
index 9c911a0d08ab7..0000000000000
--- a/ports/cc3200/bootmgr/bootmgr.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-__stack_size__  = 1024;
-
-MEMORY
-{
-    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
-}
-
-ENTRY(ResetISR)
-
-SECTIONS
-{
-    .text :
-    {
-        _text = .;
-        KEEP(*(.intvecs))
-        *(.boot*)
-        *(.text*)
-        *(.rodata*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(8);
-    } > SRAM
-
-    .ARM :
-    {
-        __exidx_start = .;
-        *(.ARM.exidx*)
-        __exidx_end = .;
-        _etext = .;
-    } > SRAM
-
-    .data :
-    {
-        _data = .;
-        *(.data*)
-        . = ALIGN (8);
-        _edata = .;
-    } > SRAM
-
-    .bss :
-    {
-        _bss = .;
-        *(.bss*)
-        *(COMMON)
-        _ebss = .;
-    } > SRAM
-
-    .stack ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ :
-    {
-        . = ALIGN(8);
-        _stack = .;
-        . = . + __stack_size__;
-        . = ALIGN(8);
-        _estack = .;
-    } > SRAM
-}
-
diff --git a/ports/cc3200/bootmgr/flc.h b/ports/cc3200/bootmgr/flc.h
deleted file mode 100644
index 8f05bb320e726..0000000000000
--- a/ports/cc3200/bootmgr/flc.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
-#define MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
-
-/******************************************************************************
-
-   If building with a C++ compiler, make all of the definitions in this header
-   have a C binding.
-  
-*******************************************************************************/
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/******************************************************************************
-   Image file names
-*******************************************************************************/
-#define IMG_BOOT_INFO           "/sys/bootinfo.bin"
-#define IMG_FACTORY             "/sys/factimg.bin"
-#define IMG_UPDATE1             "/sys/updtimg1.bin"
-#define IMG_UPDATE2             "/sys/updtimg2.bin"
-#define IMG_PREFIX              "/sys/updtimg"
-
-#define IMG_SRVPACK             "/sys/servicepack.ucf"
-#define SRVPACK_SIGN            "/sys/servicepack.sig"
-
-#define CA_FILE                 "/cert/ca.pem"
-#define CERT_FILE               "/cert/cert.pem"
-#define KEY_FILE                "/cert/private.key"
-
-/******************************************************************************
-   Special file sizes
-*******************************************************************************/
-#define IMG_SIZE                (192 * 1024)    /* 16KB are reserved for the bootloader and at least 48KB for the heap*/
-#define SRVPACK_SIZE            (16  * 1024)
-#define SIGN_SIZE               (2   * 1024)
-#define CA_KEY_SIZE             (4   * 1024)
-
-/******************************************************************************
-   Active Image
-*******************************************************************************/
-#define IMG_ACT_FACTORY         0
-#define IMG_ACT_UPDATE1         1
-#define IMG_ACT_UPDATE2         2
-
-#define IMG_STATUS_CHECK        0
-#define IMG_STATUS_READY        1
-
-/******************************************************************************
-   Boot Info structure
-*******************************************************************************/
-typedef struct _sBootInfo_t
-{
-  _u8  ActiveImg;
-  _u8  Status;
-  _u8  PrevImg;
-  _u8  : 8;
-} sBootInfo_t;
-
-
-/******************************************************************************
-  
-   Mark the end of the C bindings section for C++ compilers.
-  
-*******************************************************************************/
-#ifdef __cplusplus
-}
-#endif
-
-#endif // MICROPY_INCLUDED_CC3200_BOOTMGR_FLC_H
diff --git a/ports/cc3200/bootmgr/main.c b/ports/cc3200/bootmgr/main.c
deleted file mode 100644
index cfb8dec21d38e..0000000000000
--- a/ports/cc3200/bootmgr/main.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "hw_ints.h"
-#include "hw_types.h"
-#include "hw_gpio.h"
-#include "hw_memmap.h"
-#include "hw_gprcm.h"
-#include "hw_common_reg.h"
-#include "pin.h"
-#include "gpio.h"
-#include "rom_map.h"
-#include "prcm.h"
-#include "simplelink.h"
-#include "interrupt.h"
-#include "gpio.h"
-#include "flc.h"
-#include "bootmgr.h"
-#include "shamd5.h"
-#include "cryptohash.h"
-#include "utils.h"
-#include "cc3200_hal.h"
-#include "debug.h"
-#include "mperror.h"
-#include "antenna.h"
-
-
-//*****************************************************************************
-// Local Constants
-//*****************************************************************************
-#define SL_STOP_TIMEOUT                     35
-#define BOOTMGR_HASH_ALGO                   SHAMD5_ALGO_MD5
-#define BOOTMGR_HASH_SIZE                   32
-#define BOOTMGR_BUFF_SIZE                   512
-
-#define BOOTMGR_WAIT_SAFE_MODE_0_MS         500
-
-#define BOOTMGR_WAIT_SAFE_MODE_1_MS         3000
-#define BOOTMGR_WAIT_SAFE_MODE_1_BLINK_MS   500
-
-#define BOOTMGR_WAIT_SAFE_MODE_2_MS         3000
-#define BOOTMGR_WAIT_SAFE_MODE_2_BLINK_MS   250
-
-#define BOOTMGR_WAIT_SAFE_MODE_3_MS         1500
-#define BOOTMGR_WAIT_SAFE_MODE_3_BLINK_MS   100
-
-//*****************************************************************************
-// Exported functions declarations
-//*****************************************************************************
-extern void bootmgr_run_app (_u32 base);
-
-//*****************************************************************************
-// Local functions declarations
-//*****************************************************************************
-static void bootmgr_board_init (void);
-static bool bootmgr_verify (_u8 *image);
-static void bootmgr_load_and_execute (_u8 *image);
-static bool wait_while_blinking (uint32_t wait_time, uint32_t period, bool force_wait);
-static bool safe_boot_request_start (uint32_t wait_time);
-static void wait_for_safe_boot (sBootInfo_t *psBootInfo);
-static void bootmgr_image_loader (sBootInfo_t *psBootInfo);
-
-//*****************************************************************************
-// Private data
-//*****************************************************************************
-static _u8 bootmgr_file_buf[BOOTMGR_BUFF_SIZE];
-static _u8 bootmgr_hash_buf[BOOTMGR_HASH_SIZE + 1];
-
-//*****************************************************************************
-// Vector Table
-//*****************************************************************************
-extern void (* const g_pfnVectors[])(void);
-
-//*****************************************************************************
-// WLAN Event handler callback hookup function
-//*****************************************************************************
-void SimpleLinkWlanEventHandler(SlWlanEvent_t *pWlanEvent)
-{
-
-}
-
-//*****************************************************************************
-// HTTP Server callback hookup function
-//*****************************************************************************
-void SimpleLinkHttpServerCallback(SlHttpServerEvent_t *pHttpEvent,
-                                  SlHttpServerResponse_t *pHttpResponse)
-{
-
-}
-
-//*****************************************************************************
-// Net APP Event callback hookup function
-//*****************************************************************************
-void SimpleLinkNetAppEventHandler(SlNetAppEvent_t *pNetAppEvent)
-{
-
-}
-
-//*****************************************************************************
-// General Event callback hookup function
-//*****************************************************************************
-void SimpleLinkGeneralEventHandler(SlDeviceEvent_t *pDevEvent)
-{
-
-}
-
-//*****************************************************************************
-// Socket Event callback hookup function
-//*****************************************************************************
-void SimpleLinkSockEventHandler(SlSockEvent_t *pSock)
-{
-
-}
-
-//*****************************************************************************
-//! Board Initialization & Configuration
-//*****************************************************************************
-static void bootmgr_board_init(void) {
-    // set the vector table base
-    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
-
-    // enable processor interrupts
-    MAP_IntMasterEnable();
-    MAP_IntEnable(FAULT_SYSTICK);
-
-    // mandatory MCU initialization
-    PRCMCC3200MCUInit();
-
-    // clear all the special bits, since we can't trust their content after reset
-    // except for the WDT reset one!!
-    PRCMClearSpecialBit(PRCM_SAFE_BOOT_BIT);
-    PRCMClearSpecialBit(PRCM_FIRST_BOOT_BIT);
-
-    // check the reset after clearing the special bits
-    mperror_bootloader_check_reset_cause();
-
-#if MICROPY_HW_ANTENNA_DIVERSITY
-    // configure the antenna selection pins
-    antenna_init0();
-#endif
-
-    // enable the data hashing engine
-    CRYPTOHASH_Init();
-
-    // init the system led and the system switch
-    mperror_init0();
-}
-
-//*****************************************************************************
-//! Verifies the integrity of the new application binary
-//*****************************************************************************
-static bool bootmgr_verify (_u8 *image) {
-    SlFsFileInfo_t FsFileInfo;
-    _u32 reqlen, offset = 0;
-    _i32 fHandle;
-
-    // open the file for reading
-    if (0 == sl_FsOpen(image, FS_MODE_OPEN_READ, NULL, &fHandle)) {
-        // get the file size
-        sl_FsGetInfo(image, 0, &FsFileInfo);
-
-        if (FsFileInfo.FileLen > BOOTMGR_HASH_SIZE) {
-            FsFileInfo.FileLen -= BOOTMGR_HASH_SIZE;
-            CRYPTOHASH_SHAMD5Start(BOOTMGR_HASH_ALGO, FsFileInfo.FileLen);
-            do {
-                if ((FsFileInfo.FileLen - offset) > BOOTMGR_BUFF_SIZE) {
-                    reqlen = BOOTMGR_BUFF_SIZE;
-                }
-                else {
-                    reqlen = FsFileInfo.FileLen - offset;
-                }
-
-                offset += sl_FsRead(fHandle, offset, bootmgr_file_buf, reqlen);
-                CRYPTOHASH_SHAMD5Update(bootmgr_file_buf, reqlen);
-            } while (offset < FsFileInfo.FileLen);
-
-            CRYPTOHASH_SHAMD5Read (bootmgr_file_buf);
-
-            // convert the resulting hash to hex
-            for (_u32 i = 0; i < (BOOTMGR_HASH_SIZE / 2); i++) {
-                snprintf ((char *)&bootmgr_hash_buf[(i * 2)], 3, "%02x", bootmgr_file_buf[i]);
-            }
-
-            // read the hash from the file and close it
-            sl_FsRead(fHandle, offset, bootmgr_file_buf, BOOTMGR_HASH_SIZE);
-            sl_FsClose (fHandle, NULL, NULL, 0);
-            bootmgr_file_buf[BOOTMGR_HASH_SIZE] = '\0';
-            // compare both hashes
-            if (!strcmp((const char *)bootmgr_hash_buf, (const char *)bootmgr_file_buf)) {
-                // it's a match
-                return true;
-            }
-        }
-        // close the file
-        sl_FsClose(fHandle, NULL, NULL, 0);
-    }
-    return false;
-}
-
-//*****************************************************************************
-//! Loads the application from sFlash and executes
-//*****************************************************************************
-static void bootmgr_load_and_execute (_u8 *image) {
-    SlFsFileInfo_t pFsFileInfo;
-    _i32 fhandle;
-    // open the application binary
-    if (!sl_FsOpen(image, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-        // get the file size
-        if (!sl_FsGetInfo(image, 0, &pFsFileInfo)) {
-            // read the application into SRAM
-            if (pFsFileInfo.FileLen == sl_FsRead(fhandle, 0, (unsigned char *)APP_IMG_SRAM_OFFSET, pFsFileInfo.FileLen)) {
-                // close the file
-                sl_FsClose(fhandle, 0, 0, 0);
-                // stop the network services
-                sl_Stop(SL_STOP_TIMEOUT);
-                // execute the application
-                bootmgr_run_app(APP_IMG_SRAM_OFFSET);
-            }
-        }
-    }
-}
-
-//*****************************************************************************
-//! Wait while the safe mode pin is being held high and blink the system led
-//! with the specified period
-//*****************************************************************************
-static bool wait_while_blinking (uint32_t wait_time, uint32_t period, bool force_wait) {
-    _u32 count;
-    for (count = 0; (force_wait || MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN)) &&
-         ((period * count) < wait_time); count++) {
-        // toogle the led
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, ~MAP_GPIOPinRead(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN));
-        UtilsDelay(UTILS_DELAY_US_TO_COUNT(period * 1000));
-    }
-    return MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN) ? true : false;
-}
-
-static bool safe_boot_request_start (uint32_t wait_time) {
-    if (MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN)) {
-        UtilsDelay(UTILS_DELAY_US_TO_COUNT(wait_time * 1000));
-    }
-    return MAP_GPIOPinRead(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN) ? true : false;
-}
-
-//*****************************************************************************
-//! Check for the safe mode pin
-//*****************************************************************************
-static void wait_for_safe_boot (sBootInfo_t *psBootInfo) {
-    if (safe_boot_request_start(BOOTMGR_WAIT_SAFE_MODE_0_MS)) {
-        if (wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_1_MS, BOOTMGR_WAIT_SAFE_MODE_1_BLINK_MS, false)) {
-            // go back one step in time
-            psBootInfo->ActiveImg = psBootInfo->PrevImg;
-            if (wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_2_MS, BOOTMGR_WAIT_SAFE_MODE_2_BLINK_MS, false)) {
-                // go back directly to the factory image
-                psBootInfo->ActiveImg = IMG_ACT_FACTORY;
-                wait_while_blinking(BOOTMGR_WAIT_SAFE_MODE_3_MS, BOOTMGR_WAIT_SAFE_MODE_3_BLINK_MS, true);
-            }
-        }
-        // turn off the system led
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0);
-        // request a safe boot to the application
-        PRCMSetSpecialBit(PRCM_SAFE_BOOT_BIT);
-    }
-    // deinit the safe boot pin
-    mperror_deinit_sfe_pin();
-}
-
-//*****************************************************************************
-//! Load the proper image based on the information from the boot info
-//! and launch it.
-//*****************************************************************************
-static void bootmgr_image_loader(sBootInfo_t *psBootInfo) {
-    _i32 fhandle;
-    _u8 *image;
-
-    // search for the active image
-    switch (psBootInfo->ActiveImg) {
-    case IMG_ACT_UPDATE1:
-        image = (unsigned char *)IMG_UPDATE1;
-        break;
-    case IMG_ACT_UPDATE2:
-        image = (unsigned char *)IMG_UPDATE2;
-        break;
-    default:
-        image = (unsigned char *)IMG_FACTORY;
-        break;
-    }
-
-    // do we have a new image that needs to be verified?
-    if ((psBootInfo->ActiveImg != IMG_ACT_FACTORY) && (psBootInfo->Status == IMG_STATUS_CHECK)) {
-        if (!bootmgr_verify(image)) {
-            // verification failed, delete the broken file
-            sl_FsDel(image, 0);
-            // switch to the previous image
-            psBootInfo->ActiveImg = psBootInfo->PrevImg;
-            psBootInfo->PrevImg = IMG_ACT_FACTORY;
-        }
-        // in any case, change the status to "READY"
-        psBootInfo->Status = IMG_STATUS_READY;
-        // write the new boot info
-        if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_WRITE, NULL, &fhandle)) {
-            sl_FsWrite(fhandle, 0, (unsigned char *)psBootInfo, sizeof(sBootInfo_t));
-            // close the file
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-    }
-
-    // this one might modify the boot info hence it MUST be called after
-    // bootmgr_verify! (so that the changes are not saved to flash)
-    wait_for_safe_boot(psBootInfo);
-
-    // select the active image again, since it might have changed
-    switch (psBootInfo->ActiveImg) {
-    case IMG_ACT_UPDATE1:
-        image = (unsigned char *)IMG_UPDATE1;
-        break;
-    case IMG_ACT_UPDATE2:
-        image = (unsigned char *)IMG_UPDATE2;
-        break;
-    default:
-        image = (unsigned char *)IMG_FACTORY;
-        break;
-    }
-    bootmgr_load_and_execute(image);
-}
-
-//*****************************************************************************
-//! Main function
-//*****************************************************************************
-int main (void) {
-    sBootInfo_t sBootInfo = { .ActiveImg = IMG_ACT_FACTORY, .Status = IMG_STATUS_READY, .PrevImg = IMG_ACT_FACTORY };
-    bool bootapp = false;
-    _i32 fhandle;
-
-    // board setup
-    bootmgr_board_init();
-
-    // start simplelink since we need it to access the sflash
-    sl_Start(0, 0, 0);
-
-    // if a boot info file is found, load it, else, create a new one with the default boot info
-    if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-        if (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t))) {
-            bootapp = true;
-        }
-        sl_FsClose(fhandle, 0, 0, 0);
-    }
-    // boot info file not present, it means that this is the first boot after being programmed
-    if (!bootapp) {
-        // create a new boot info file
-        _u32 BootInfoCreateFlag  = _FS_FILE_OPEN_FLAG_COMMIT | _FS_FILE_PUBLIC_WRITE | _FS_FILE_PUBLIC_READ;
-        if (!sl_FsOpen ((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_CREATE((2 * sizeof(sBootInfo_t)),
-                        BootInfoCreateFlag), NULL, &fhandle)) {
-            // write the default boot info.
-            if (sizeof(sBootInfo_t) == sl_FsWrite(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t))) {
-                bootapp = true;
-            }
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-        // signal the first boot to the application
-        PRCMSetSpecialBit(PRCM_FIRST_BOOT_BIT);
-    }
-
-    if (bootapp) {
-        // load and execute the image based on the boot info
-        bootmgr_image_loader(&sBootInfo);
-    }
-
-    // stop simplelink
-    sl_Stop(SL_STOP_TIMEOUT);
-
-    // if we've reached this point, then it means that a fatal error has occurred and the
-    // application could not be loaded, so, loop forever and signal the crash to the user
-    while (true) {
-        // keep the bld on
-        MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN);
-        __asm volatile(" dsb \n"
-                       " isb \n"
-                       " wfi \n");
-    }
-}
-
-//*****************************************************************************
-//! The following stub function is needed to link mp_vprintf
-//*****************************************************************************
-#include "py/qstr.h"
-
-const byte *qstr_data(qstr q, size_t *len) {
-    *len = 0;
-    return NULL;
-}
diff --git a/ports/cc3200/bootmgr/relocator/relocator.bin b/ports/cc3200/bootmgr/relocator/relocator.bin
deleted file mode 100644
index b1ac51005a08d..0000000000000
Binary files a/ports/cc3200/bootmgr/relocator/relocator.bin and /dev/null differ
diff --git a/ports/cc3200/bootmgr/runapp.s b/ports/cc3200/bootmgr/runapp.s
deleted file mode 100644
index 45c6dcb195c35..0000000000000
--- a/ports/cc3200/bootmgr/runapp.s
+++ /dev/null
@@ -1,19 +0,0 @@
-    .syntax unified
-    .cpu cortex-m4
-    .thumb
-    .text
-    .align  2
-
-@ void bootmgr_run_app(_u32 base)
-    .global bootmgr_run_app
-    .thumb
-    .thumb_func
-    .type   bootmgr_run_app, %function
-bootmgr_run_app:
-    @ set the SP
-    ldr    sp, [r0]
-    add    r0, r0, #4
-
-    @ jump to the entry code
-    ldr    r1, [r0]
-    bx     r1
diff --git a/ports/cc3200/bootmgr/sl/user.h b/ports/cc3200/bootmgr/sl/user.h
deleted file mode 100644
index be93029d1c0a5..0000000000000
--- a/ports/cc3200/bootmgr/sl/user.h
+++ /dev/null
@@ -1,1063 +0,0 @@
-/*
- * user.h - CC31xx/CC32xx Host Driver Implementation
- *
- * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
- * 
- * 
- *  Redistribution and use in source and binary forms, with or without 
- *  modification, are permitted provided that the following conditions 
- *  are met:
- *
- *    Redistributions of source code must retain the above copyright 
- *    notice, this list of conditions and the following disclaimer.
- *
- *    Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the 
- *    documentation and/or other materials provided with the   
- *    distribution.
- *
- *    Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
-*/
-
-    
-
-#ifndef __USER_H__
-#define __USER_H__
-
-#ifdef  __cplusplus
-extern "C" {
-#endif
-
-
-
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_user_include        Porting - User Include Files
-
-    This section IS NOT REQUIRED in case user provided primitives are handled
-    in makefiles or project configurations (IDE)
-
-    PORTING ACTION:
-        - Include all required header files for the definition of:
-            -# Transport layer library API (e.g. SPI, UART)
-            -# OS primitives definitions (e.g. Task spawn, Semaphores)
-            -# Memory management primitives (e.g. alloc, free)
-
- ******************************************************************************
- */
-  
-#include   
-#include "cc_pal.h"
-
-/*!
-	\def		MAX_CONCURRENT_ACTIONS
-
-    \brief      Defines the maximum number of concurrent action in the system
-				Min:1 , Max: 32
-
-                Actions which has async events as return, can be
-
-    \sa
-
-    \note       In case there are not enough resources for the actions needed in the system,
-	        	error is received: POOL_IS_EMPTY
-			    one option is to increase MAX_CONCURRENT_ACTIONS
-				(improves performance but results in memory consumption)
-		     	Other option is to call the API later (decrease performance)
-
-    \warning    In case of setting to one, recommend to use non-blocking recv\recvfrom to allow
-				multiple socket recv
-*/
-#define MAX_CONCURRENT_ACTIONS 10
-/*!
-	\def		CPU_FREQ_IN_MHZ
-    \brief      Defines CPU frequency for Host side, for better accuracy of busy loops, if any
-    \sa             
-    \note       
-
-    \warning    If not set the default CPU frequency is set to 200MHz
-                This option will be deprecated in future release
-*/
-
-#define CPU_FREQ_IN_MHZ        80
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_capabilities        Porting - Capabilities Set
-
-    This section IS NOT REQUIRED in case one of the following pre defined
-    capabilities set is in use:
-    - SL_TINY
-    - SL_SMALL
-    - SL_FULL
-
-    PORTING ACTION:
-        - Define one of the pre-defined capabilities set or uncomment the
-          relevant definitions below to select the required capabilities
-
-    @{
-
- *******************************************************************************
-*/
-
-/*!
-	\def		SL_INC_ARG_CHECK
-
-    \brief      Defines whether the SimpleLink driver perform argument check
-                or not
-
-                When defined, the SimpleLink driver perform argument check on
-                function call. Removing this define could reduce some code
-                size and improve slightly the performances but may impact in
-                unpredictable behavior in case of invalid arguments
-
-    \sa
-
-    \note       belongs to \ref proting_sec
-
-    \warning    Removing argument check may cause unpredictable behavior in
-                case of invalid arguments.
-                In this case the user is responsible to argument validity
-                (for example all handlers must not be NULL)
-*/
-#define SL_INC_ARG_CHECK
-
-
-/*!
-    \def		SL_INC_STD_BSD_API_NAMING
-
-    \brief      Defines whether SimpleLink driver should expose standard BSD
-                APIs or not
-
-                When defined, the SimpleLink driver in addtion to its alternative
-                BSD APIs expose also standard BSD APIs.
-    Stadrad BSD API includs the following functions:
-                socket , close , accept , bind , listen	, connect , select ,
-                setsockopt	, getsockopt , recv , recvfrom , write , send , sendto ,
-                gethostbyname
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_STD_BSD_API_NAMING
-
-
-/*!
-    \brief      Defines whether to include extended API in SimpleLink driver
-                or not
-
-                When defined, the SimpleLink driver will include also all
-                exteded API of the included packages
-
-    \sa             ext_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_EXT_API
-
-/*!
-    \brief      Defines whether to include WLAN package in SimpleLink driver
-                or not
-
-                When defined, the SimpleLink driver will include also
-                the WLAN package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_WLAN_PKG
-
-/*!
-    \brief      Defines whether to include SOCKET package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also
-                the SOCKET package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCKET_PKG
-
-/*!
-    \brief      Defines whether to include NET_APP package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also the
-                NET_APP package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NET_APP_PKG
-
-/*!
-    \brief      Defines whether to include NET_CFG package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also
-                the NET_CFG package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NET_CFG_PKG
-
-/*!
-    \brief      Defines whether to include NVMEM package in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also the
-                NVMEM package
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_NVMEM_PKG
-
-/*!
-    \brief      Defines whether to include socket server side APIs
-                in SimpleLink driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                server side APIs
-
-    \sa             server_side
-
-    \note
-
-    \warning
-*/
-#define SL_INC_SOCK_SERVER_SIDE_API
-
-/*!
-    \brief      Defines whether to include socket client side APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                client side APIs
-
-    \sa             client_side
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_CLIENT_SIDE_API
-
-/*!
-    \brief      Defines whether to include socket receive APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                receive side APIs
-
-    \sa             recv_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_RECV_API
-
-/*!
-    \brief      Defines whether to include socket send APIs in SimpleLink
-                driver or not
-
-                When defined, the SimpleLink driver will include also socket
-                send side APIs
-
-    \sa             send_api
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-#define SL_INC_SOCK_SEND_API
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_enable_device       Ported on CC32XX - Device Enable/Disable
-
-    The enable/disable API provide mechanism to enable/disable the network processor
-
-   
-    PORTING ACTION:
-        - None
-    @{
-
- ******************************************************************************
- */
-
-/*!
-    \brief		Preamble to the enabling the Network Processor.
-                        Placeholder to implement any pre-process operations
-                        before enabling networking operations.
-
-    \sa			sl_DeviceEnable
-
-    \note       belongs to \ref ported_sec
-
-*/
-#ifdef DEBUG
-#define sl_DeviceEnablePreamble()       NwpPowerOnPreamble()
-#else
-#define sl_DeviceEnablePreamble()
-#endif
-
-/*!
-    \brief		Enable the Network Processor
-
-    \sa			sl_DeviceDisable
-
-    \note       belongs to \ref ported_sec
-
-*/
-#define sl_DeviceEnable()			NwpPowerOn()
-
-/*!
-    \brief		Disable the Network Processor
-
-    \sa			sl_DeviceEnable
-
-    \note       belongs to \ref ported_sec
-*/
-#define sl_DeviceDisable() 			NwpPowerOff()
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_interface         Ported on CC32XX - Communication Interface
-
-    The simple link device can work with different communication
-    channels (e.g. spi/uart). Texas Instruments provides single driver
-    that can work with all these types. This section bind between the
-    physical communication interface channel and the SimpleLink driver
-
-
-    \note       Correct and efficient implementation of this driver is critical
-                for the performances of the SimpleLink device on this platform.
-
-
-    PORTING ACTION:
-        - None
-
-    @{
-
- ******************************************************************************
-*/
-
-#define _SlFd_t					Fd_t
-
-/*!
-    \brief      Opens an interface communication port to be used for communicating
-                with a SimpleLink device
-
-	            Given an interface name and option flags, this function opens
-                the communication port and creates a file descriptor.
-                This file descriptor is used afterwards to read and write
-                data from and to this specific communication channel.
-	            The speed, clock polarity, clock phase, chip select and all other
-                specific attributes of the channel are all should be set to hardcoded
-                in this function.
-
-	\param	 	ifName  -   points to the interface name/path. The interface name is an
-                            optional attributes that the simple link driver receives
-                            on opening the driver (sl_Start).
-                            In systems that the spi channel is not implemented as
-                            part of the os device drivers, this parameter could be NULL.
-
-	\param      flags   -   optional flags parameters for future use
-
-	\return     upon successful completion, the function shall open the channel
-                and return a non-negative integer representing the file descriptor.
-                Otherwise, -1 shall be returned
-
-    \sa         sl_IfClose , sl_IfRead , sl_IfWrite
-
-	\note       The prototype of the function is as follow:
-                    Fd_t xxx_IfOpen(char* pIfName , unsigned long flags);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfOpen                           spi_Open
-
-/*!
-    \brief      Closes an opened interface communication port
-
-	\param	 	fd  -   file descriptor of opened communication channel
-
-	\return		upon successful completion, the function shall return 0.
-			    Otherwise, -1 shall be returned
-
-    \sa         sl_IfOpen , sl_IfRead , sl_IfWrite
-
-	\note       The prototype of the function is as follow:
-                    int xxx_IfClose(Fd_t Fd);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfClose                          spi_Close
-
-/*!
-    \brief      Attempts to read up to len bytes from an opened communication channel
-                into a buffer starting at pBuff.
-
-	\param	 	fd      -   file descriptor of an opened communication channel
-
-	\param		pBuff   -   pointer to the first location of a buffer that contains enough
-                            space for all expected data
-
-	\param      len     -   number of bytes to read from the communication channel
-
-	\return     upon successful completion, the function shall return the number of read bytes.
-                Otherwise, 0 shall be returned
-
-    \sa         sl_IfClose , sl_IfOpen , sl_IfWrite
-
-
-	\note       The prototype of the function is as follow:
-                    int xxx_IfRead(Fd_t Fd , char* pBuff , int Len);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfRead                           spi_Read
-
-/*!
-    \brief attempts to write up to len bytes to the SPI channel
-
-	\param	 	fd      -   file descriptor of an opened communication channel
-
-	\param		pBuff   -   pointer to the first location of a buffer that contains
-                            the data to send over the communication channel
-
-	\param      len     -   number of bytes to write to the communication channel
-
-	\return     upon successful completion, the function shall return the number of sent bytes.
-				therwise, 0 shall be returned
-
-    \sa         sl_IfClose , sl_IfOpen , sl_IfRead
-
-	\note       This function could be implemented as zero copy and return only upon successful completion
-                of writing the whole buffer, but in cases that memory allocation is not too tight, the
-                function could copy the data to internal buffer, return back and complete the write in
-                parallel to other activities as long as the other SPI activities would be blocked until
-                the entire buffer write would be completed
-
-               The prototype of the function is as follow:
-                    int xxx_IfWrite(Fd_t Fd , char* pBuff , int Len);
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfWrite                          spi_Write
-
-/*!
-    \brief 		register an interrupt handler routine for the host IRQ
-
-	\param	 	InterruptHdl	-	pointer to interrupt handler routine
-
-	\param 		pValue			-	pointer to a memory structure that is passed
-									to the interrupt handler.
-
-	\return		upon successful registration, the function shall return 0.
-				Otherwise, -1 shall be returned
-
-    \sa
-
-	\note		If there is already registered interrupt handler, the function
-				should overwrite the old handler with the new one
-
-	\note       If the handler is a null pointer, the function should un-register the
-	            interrupt handler, and the interrupts can be disabled.
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-#define sl_IfRegIntHdlr(InterruptHdl , pValue)          NwpRegisterInterruptHandler(InterruptHdl , pValue)
-
-/*!
-    \brief 		Masks the Host IRQ
-
-    \sa		sl_IfUnMaskIntHdlr
-
-
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-
-
-#define sl_IfMaskIntHdlr()								NwpMaskInterrupt()
-
-/*!
-    \brief 		Unmasks the Host IRQ
-
-    \sa		sl_IfMaskIntHdlr
-
-
-
-    \note       belongs to \ref ported_sec
-
-    \warning
-*/
-
-#define sl_IfUnMaskIntHdlr()								NwpUnMaskInterrupt()
-    
-/*!
-    \brief 		Write Handers for statistics debug on write 
-
-	\param	 	interface handler	-	pointer to interrupt handler routine
-
-
-	\return		no return value
-
-    \sa
-
-	\note		An optional hooks for monitoring before and after write info
-
-    \note       belongs to \ref ported_sec
-
-    \warning        
-*/
-/* #define SL_START_WRITE_STAT */
-
-
-/*!
-
- Close the Doxygen group.
- @}
-
-*/
-
-/*!
- ******************************************************************************
-
-    \defgroup   ported_os          Ported on CC32XX - Operating System
-
-    The simple link driver can run on multi-threaded environment as well
-    as non-os environment (mail loop)
-
-    This section IS NOT REQUIRED in case you are working on non-os environment.
-
-    If you choose to work in multi-threaded environment under any operating system
-    you will have to provide some basic adaptation routines to allow the driver
-    to protect access to resources from different threads (locking object) and
-    to allow synchronization between threads (sync objects).
-
-    PORTING ACTION:
-        -# Uncomment SL_PLATFORM_MULTI_THREADED define
-        -# Bind locking object routines
-        -# Bind synchronization object routines
-        -# Optional - Bind spawn thread routine
-
-    @{
-
- ******************************************************************************
-*/
-
-/*
-#define SL_PLATFORM_MULTI_THREADED
-*/
-
-#ifdef SL_PLATFORM_MULTI_THREADED
-#include "osi.h"
-
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_RET_CODE_OK                       ((int)OSI_OK)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_WAIT_FOREVER                      ((OsiTime_t)OSI_WAIT_FOREVER)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define SL_OS_NO_WAIT	                        ((OsiTime_t)OSI_NO_WAIT)
-
-/*!
-	\brief type definition for a time value
-
-	\note	On each porting or platform the type could be whatever is needed - integer, pointer to structure etc.
-
-    \note       belongs to \ref ported_sec
-*/
-#define _SlTime_t				OsiTime_t
-
-/*!
-	\brief 	type definition for a sync object container
-
-	Sync object is object used to synchronize between two threads or thread and interrupt handler.
-	One thread is waiting on the object and the other thread send a signal, which then
-	release the waiting thread.
-	The signal must be able to be sent from interrupt context.
-	This object is generally implemented by binary semaphore or events.
-
-	\note	On each porting or platform the type could be whatever is needed - integer, structure etc.
-
-    \note       belongs to \ref ported_sec
-*/
-typedef OsiSyncObj_t                            _SlSyncObj_t;
-
-
-/*!
-	\brief 	This function creates a sync object
-
-	The sync object is used for synchronization between diffrent thread or ISR and
-	a thread.
-
-	\param	pSyncObj	-	pointer to the sync object control block
-
-	\return upon successful creation the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjCreate(pSyncObj,pName)            osi_SyncObjCreate(pSyncObj)
-
-
-/*!
-	\brief 	This function deletes a sync object
-
-	\param	pSyncObj	-	pointer to the sync object control block
-
-	\return upon successful deletion the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjDelete(pSyncObj)                  osi_SyncObjDelete(pSyncObj)
-
-
-/*!
-	\brief 		This function generates a sync signal for the object.
-
-	All suspended threads waiting on this sync object are resumed
-
-	\param		pSyncObj	-	pointer to the sync object control block
-
-	\return 	upon successful signaling the function should return 0
-				Otherwise, a negative value indicating the error code shall be returned
-	\note		the function could be called from ISR context
-    \warning
-*/
-#define sl_SyncObjSignal(pSyncObj)                osi_SyncObjSignal(pSyncObj)
-
-/*!
-	\brief 		This function generates a sync signal for the object from Interrupt
-
-	This is for RTOS that should signal from IRQ using a dedicated API
-
-	\param		pSyncObj	-	pointer to the sync object control block
-
-	\return 	upon successful signaling the function should return 0
-				Otherwise, a negative value indicating the error code shall be returned
-	\note		the function could be called from ISR context
-	\warning
-*/
-#define sl_SyncObjSignalFromIRQ(pSyncObj)           osi_SyncObjSignalFromISR(pSyncObj)
-
-/*!
-	\brief 	This function waits for a sync signal of the specific sync object
-
-	\param	pSyncObj	-	pointer to the sync object control block
-	\param	Timeout		-	numeric value specifies the maximum number of mSec to
-							stay suspended while waiting for the sync signal
-							Currently, the simple link driver uses only two values:
-								- OSI_WAIT_FOREVER
-								- OSI_NO_WAIT
-
-	\return upon successful reception of the signal within the timeout window return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_SyncObjWait(pSyncObj,Timeout)            osi_SyncObjWait(pSyncObj,Timeout)
-
-/*!
-	\brief 	type definition for a locking object container
-
-	Locking object are used to protect a resource from mutual accesses of two or more threads.
-	The locking object should suppurt reentrant locks by a signal thread.
-	This object is generally implemented by mutex semaphore
-
-	\note	On each porting or platform the type could be whatever is needed - integer, structure etc.
-    \note       belongs to \ref ported_sec
-*/
-typedef OsiLockObj_t                            _SlLockObj_t;
-
-/*!
-	\brief 	This function creates a locking object.
-
-	The locking object is used for protecting a shared resources between different
-	threads.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful creation the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjCreate(pLockObj,pName)            osi_LockObjCreate(pLockObj)
-
-/*!
-	\brief 	This function deletes a locking object.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful deletion the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjDelete(pLockObj)                  osi_LockObjDelete(pLockObj)
-
-/*!
-	\brief 	This function locks a locking object.
-
-	All other threads that call this function before this thread calls
-	the osi_LockObjUnlock would be suspended
-
-	\param	pLockObj	-	pointer to the locking object control block
-	\param	Timeout		-	numeric value specifies the maximum number of mSec to
-							stay suspended while waiting for the locking object
-							Currently, the simple link driver uses only two values:
-								- OSI_WAIT_FOREVER
-								- OSI_NO_WAIT
-
-
-	\return upon successful reception of the locking object the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjLock(pLockObj,Timeout)           osi_LockObjLock(pLockObj,Timeout)
-
-/*!
-	\brief 	This function unlock a locking object.
-
-	\param	pLockObj	-	pointer to the locking object control block
-
-	\return upon successful unlocking the function should return 0
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-#define sl_LockObjUnlock(pLockObj)                   osi_LockObjUnlock(pLockObj)
-
-#endif
-/*!
-	\brief 	This function call the pEntry callback from a different context
-
-	\param	pEntry		-	pointer to the entry callback function
-
-	\param	pValue		- 	pointer to any type of memory structure that would be
-							passed to pEntry callback from the execution thread.
-
-	\param	flags		- 	execution flags - reserved for future usage
-
-	\return upon successful registration of the spawn the function should return 0
-			(the function is not blocked till the end of the execution of the function
-			and could be returned before the execution is actually completed)
-			Otherwise, a negative value indicating the error code shall be returned
-    \note       belongs to \ref ported_sec
-    \warning
-*/
-//#define SL_PLATFORM_EXTERNAL_SPAWN
-
-#ifdef SL_PLATFORM_EXTERNAL_SPAWN
-#define sl_Spawn(pEntry,pValue,flags)       osi_Spawn(pEntry,pValue,flags)
-#endif
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-/*!
- ******************************************************************************
-
-    \defgroup   porting_mem_mgm             Porting - Memory Management
-
-    This section declare in which memory management model the SimpleLink driver
-    will run:
-        -# Static
-        -# Dynamic
-
-    This section IS NOT REQUIRED in case Static model is selected.
-
-    The default memory model is Static
-
-    PORTING ACTION:
-        - If dynamic model is selected, define the alloc and free functions.
-
-    @{
-
- *****************************************************************************
-*/
-
-/*!
-    \brief      Defines whether the SimpleLink driver is working in dynamic
-                memory model or not
-
-                When defined, the SimpleLink driver use dynamic allocations
-                if dynamic allocation is selected malloc and free functions
-                must be retrieved
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define SL_MEMORY_MGMT_DYNAMIC 	        1
-#define SL_MEMORY_MGMT_STATIC           0
-
-#define SL_MEMORY_MGMT                  SL_MEMORY_MGMT_STATIC
-
-#ifdef SL_MEMORY_MGMT_DYNAMIC
-#ifdef SL_PLATFORM_MULTI_THREADED
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define sl_Malloc(Size)                                 mem_Malloc(Size)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning
-*/
-#define sl_Free(pMem)                                   mem_Free(pMem)
-#else
-#include 
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning        
-*/
-#define sl_Malloc(Size)                                 malloc(Size)
-
-/*!
-    \brief
-    \sa
-    \note           belongs to \ref ported_sec
-    \warning        
-*/
-#define sl_Free(pMem)                                   free(pMem)
-#endif
-#endif
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-/*!
- ******************************************************************************
-
-    \defgroup       porting_events      Porting - Event Handlers
-
-    This section includes the asynchronous event handlers routines
-
-    PORTING ACTION:
-        -Uncomment the required handler and define your routine as the value
-        of this handler
-
-    @{
-
- ******************************************************************************
- */
-
-/*!
-    \brief
-
-    \sa
-
-    \note       belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_GeneralEvtHdlr                   SimpleLinkGeneralEventHandler
-
-
-/*!
-    \brief          An event handler for WLAN connection or disconnection indication
-                    This event handles async WLAN events. 
-                    Possible events are:
-                    SL_WLAN_CONNECT_EVENT - indicates WLAN is connected 
-                    SL_WLAN_DISCONNECT_EVENT - indicates WLAN is disconnected
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_WlanEvtHdlr                     SimpleLinkWlanEventHandler
-
-
-/*!
-    \brief          An event handler for IP address asynchronous event. Usually accepted after new WLAN connection.
-                    This event handles networking events.
-                    Possible events are:
-                    SL_NETAPP_IPV4_ACQUIRED - IP address was acquired (DHCP or Static)
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_NetAppEvtHdlr              		SimpleLinkNetAppEventHandler
-
-/*!
-    \brief          A callback for HTTP server events.
-                    Possible events are:
-                    SL_NETAPP_HTTPGETTOKENVALUE - NWP requests to get the value of a specific token
-					SL_NETAPP_HTTPPOSTTOKENVALUE - NWP post to the host a new value for a specific token
-
-	\param			pServerEvent - Contains the relevant event information (SL_NETAPP_HTTPGETTOKENVALUE or SL_NETAPP_HTTPPOSTTOKENVALUE)
-
-	\param			pServerResponse - Should be filled by the user with the relevant response information (i.e SL_NETAPP_HTTPSETTOKENVALUE as a response to SL_NETAPP_HTTPGETTOKENVALUE event)
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_HttpServerCallback   SimpleLinkHttpServerCallback
-/*!
-    \brief
-
-    \sa
-
-    \note           belongs to \ref porting_sec
-
-    \warning
-*/
-
-#define sl_SockEvtHdlr         SimpleLinkSockEventHandler
-
-
-
-#define _SL_USER_TYPES
-#define _u8         unsigned char
-#define _i8         signed char
-
-#define _u16        unsigned short
-#define _i16        signed short
-
-#define _u32        unsigned int
-#define _i32        signed int
-#define _volatile   volatile
-#define _const      const
-
-
-
-/*!
-
- Close the Doxygen group.
- @}
-
- */
-
-
-#ifdef  __cplusplus
-}
-#endif // __cplusplus
-
-#endif // __USER_H__
diff --git a/ports/cc3200/fatfs/src/drivers/sd_diskio.c b/ports/cc3200/fatfs/src/drivers/sd_diskio.c
deleted file mode 100644
index 0a1379181b45b..0000000000000
--- a/ports/cc3200/fatfs/src/drivers/sd_diskio.c
+++ /dev/null
@@ -1,433 +0,0 @@
-//*****************************************************************************
-// sd_diskio.c
-//
-// Low level SD Card access hookup for FatFS
-//
-// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#include 
-
-#include "py/mpconfig.h"
-#include "py/mphal.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "hw_types.h"
-#include "hw_memmap.h"
-#include "hw_ints.h"
-#include "rom_map.h"
-#include "sd_diskio.h"
-#include "sdhost.h"
-#include "pin.h"
-#include "prcm.h"
-#include "stdcmd.h"
-#include "utils.h"
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define DISKIO_RETRY_TIMEOUT        0xFFFFFFFF
-
-#define CARD_TYPE_UNKNOWN           0
-#define CARD_TYPE_MMC               1
-#define CARD_TYPE_SDCARD            2
-
-#define CARD_CAP_CLASS_SDSC         0
-#define CARD_CAP_CLASS_SDHC         1
-
-#define CARD_VERSION_1              0
-#define CARD_VERSION_2              1
-
-//*****************************************************************************
-// Disk Info for attached disk
-//*****************************************************************************
-DiskInfo_t sd_disk_info =  {CARD_TYPE_UNKNOWN, CARD_VERSION_1, CARD_CAP_CLASS_SDSC, 0, 0, STA_NOINIT, 0};
-
-//*****************************************************************************
-//
-//! Send Command to card
-//!
-//! \param ulCmd is the command to be send
-//! \paran ulArg is the command argument
-//!
-//! This function sends command to attached card and check the response status
-//! if any.
-//!
-//! \return Returns 0 on success, 1 otherwise
-//
-//*****************************************************************************
-static unsigned int CardSendCmd (unsigned int ulCmd, unsigned int ulArg) {
-    unsigned long ulStatus;
-
-    // Clear the interrupt status
-    MAP_SDHostIntClear(SDHOST_BASE,0xFFFFFFFF);
-
-    // Send command
-    MAP_SDHostCmdSend(SDHOST_BASE,ulCmd,ulArg);
-
-    // Wait for command complete or error
-    do {
-        ulStatus = MAP_SDHostIntStatus(SDHOST_BASE);
-        ulStatus = (ulStatus & (SDHOST_INT_CC | SDHOST_INT_ERRI));
-    } while (!ulStatus);
-
-    // Check error status
-    if (ulStatus & SDHOST_INT_ERRI) {
-        // Reset the command line
-        MAP_SDHostCmdReset(SDHOST_BASE);
-        return 1;
-    }
-    else {
-        return 0;
-    }
-}
-
-//*****************************************************************************
-//
-//! Get the capacity of specified card
-//!
-//! \param ulRCA is the Relative Card Address (RCA)
-//!
-//! This function gets the capacity of card addressed by \e ulRCA paramaeter.
-//!
-//! \return Returns 0 on success, 1 otherwise.
-//
-//*****************************************************************************
-static unsigned int CardCapacityGet(DiskInfo_t *psDiskInfo) {
-    unsigned long ulRet;
-    unsigned long ulResp[4];
-    unsigned long ulBlockSize;
-    unsigned long ulBlockCount;
-    unsigned long ulCSizeMult;
-    unsigned long ulCSize;
-
-    // Read the CSD register
-    ulRet = CardSendCmd(CMD_SEND_CSD, (psDiskInfo->usRCA << 16));
-
-    if(ulRet == 0) {
-        // Read the response
-        MAP_SDHostRespGet(SDHOST_BASE,ulResp);
-
-        // 136 bit CSD register is read into an array of 4 words.
-        // ulResp[0] = CSD[31:0]
-        // ulResp[1] = CSD[63:32]
-        // ulResp[2] = CSD[95:64]
-        // ulResp[3] = CSD[127:96]
-        if(ulResp[3] >> 30) {
-            ulBlockSize = SD_SECTOR_SIZE * 1024;
-            ulBlockCount = (ulResp[1] >> 16 | ((ulResp[2] & 0x3F) << 16)) + 1;
-        }
-        else {
-            ulBlockSize  = 1 << ((ulResp[2] >> 16) & 0xF);
-            ulCSizeMult  = ((ulResp[1] >> 15) & 0x7);
-            ulCSize      = ((ulResp[1] >> 30) | (ulResp[2] & 0x3FF) << 2);
-            ulBlockCount = (ulCSize + 1) * (1 << (ulCSizeMult + 2));
-        }
-
-        // Calculate the card capacity in bytes
-        psDiskInfo->ulBlockSize = ulBlockSize;
-        psDiskInfo->ulNofBlock  = ulBlockCount;
-    }
-
-    return ulRet;
-}
-
-//*****************************************************************************
-//
-//! Select a card for reading or writing
-//!
-//! \param Card is the pointer to card attribute structure.
-//!
-//! This function selects a card for reading or writing using its RCA from
-//! \e Card parameter.
-//!
-//! \return Returns 0 success, 1 otherwise.
-//
-//*****************************************************************************
-static unsigned int CardSelect (DiskInfo_t *sDiskInfo) {
-    unsigned long ulRCA;
-    unsigned long ulRet;
-
-    ulRCA = sDiskInfo->usRCA;
-
-    // Send select command with card's RCA.
-    ulRet = CardSendCmd(CMD_SELECT_CARD, (ulRCA << 16));
-
-    if (ulRet == 0) {
-        while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-    }
-
-    // Delay 250ms for the card to become ready
-    mp_hal_delay_ms(250);
-
-    return ulRet;
-}
-
-//*****************************************************************************
-//
-//! Initializes physical drive
-//!
-//! This function initializes the physical drive
-//!
-//! \return Returns 0 on succeeded.
-//*****************************************************************************
-DSTATUS sd_disk_init (void) {
-    unsigned long ulRet;
-    unsigned long ulResp[4];
-
-    if (sd_disk_info.bStatus != 0) {
-        sd_disk_info.bStatus = STA_NODISK;
-        // Send std GO IDLE command
-        if (CardSendCmd(CMD_GO_IDLE_STATE, 0) == 0) {
-            // Get interface operating condition for the card
-            ulRet = CardSendCmd(CMD_SEND_IF_COND,0x000001A5);
-            MAP_SDHostRespGet(SDHOST_BASE,ulResp);
-
-            // It's a SD ver 2.0 or higher card
-            if (ulRet == 0 && ((ulResp[0] & 0xFF) == 0xA5)) {
-                // Version 1 card do not respond to this command
-                sd_disk_info.ulVersion = CARD_VERSION_2;
-                sd_disk_info.ucCardType = CARD_TYPE_SDCARD;
-
-                // Wait for card to become ready.
-                do {
-                    // Send ACMD41
-                    CardSendCmd(CMD_APP_CMD, 0);
-                    ulRet = CardSendCmd(CMD_SD_SEND_OP_COND, 0x40E00000);
-
-                    // Response contains 32-bit OCR register
-                    MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-
-                } while (((ulResp[0] >> 31) == 0));
-
-                if (ulResp[0] & (1UL<<30)) {
-                    sd_disk_info.ulCapClass = CARD_CAP_CLASS_SDHC;
-                }
-                sd_disk_info.bStatus = 0;
-            }
-            //It's a MMC or SD 1.x card
-            else {
-                // Wait for card to become ready.
-                do {
-                    CardSendCmd(CMD_APP_CMD, 0);
-                    ulRet = CardSendCmd(CMD_SD_SEND_OP_COND,0x00E00000);
-                    if (ulRet == 0) {
-                        // Response contains 32-bit OCR register
-                        MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-                    }
-                } while (((ulRet == 0) && (ulResp[0] >> 31) == 0));
-
-                if (ulRet == 0) {
-                    sd_disk_info.ucCardType = CARD_TYPE_SDCARD;
-                    sd_disk_info.bStatus = 0;
-                }
-                else {
-                    if (CardSendCmd(CMD_SEND_OP_COND, 0) == 0) {
-                        // MMC not supported by the controller
-                        sd_disk_info.ucCardType = CARD_TYPE_MMC;
-                    }
-                }
-            }
-        }
-
-        // Get the RCA of the attached card
-        if (sd_disk_info.bStatus == 0) {
-            ulRet = CardSendCmd(CMD_ALL_SEND_CID, 0);
-            if (ulRet == 0) {
-                CardSendCmd(CMD_SEND_REL_ADDR,0);
-                MAP_SDHostRespGet(SDHOST_BASE, ulResp);
-
-                //  Fill in the RCA
-                sd_disk_info.usRCA = (ulResp[0] >> 16);
-
-                // Get tha card capacity
-                CardCapacityGet(&sd_disk_info);
-            }
-
-            // Select the card.
-            ulRet = CardSelect(&sd_disk_info);
-            if (ulRet == 0) {
-                sd_disk_info.bStatus = 0;
-            }
-        }
-    }
-
-    return sd_disk_info.bStatus;
-}
-
-//*****************************************************************************
-//
-//! De-initializes the physical drive
-//!
-//! This function de-initializes the physical drive
-//*****************************************************************************
-void sd_disk_deinit (void) {
-    sd_disk_info.ucCardType = CARD_TYPE_UNKNOWN;
-    sd_disk_info.ulVersion = CARD_VERSION_1;
-    sd_disk_info.ulCapClass = CARD_CAP_CLASS_SDSC;
-    sd_disk_info.ulNofBlock = 0;
-    sd_disk_info.ulBlockSize = 0;
-    sd_disk_info.bStatus = STA_NOINIT;
-    sd_disk_info.usRCA = 0;
-}
-
-//*****************************************************************************
-//
-//! Reads sector(s) from the disk drive.
-//!
-//!
-//! This function reads specified number of sectors from the drive
-//!
-//! \return Returns RES_OK on success.
-//
-//*****************************************************************************
-DRESULT sd_disk_read (BYTE* pBuffer, DWORD ulSectorNumber, UINT SectorCount) {
-    DRESULT Res = RES_ERROR;
-    unsigned long ulSize;
-
-    if (SectorCount > 0) {
-        // Return if disk not initialized
-        if (sd_disk_info.bStatus & STA_NOINIT) {
-            return RES_NOTRDY;
-        }
-
-        // SDSC uses linear address, SDHC uses block address
-        if (sd_disk_info.ulCapClass == CARD_CAP_CLASS_SDSC) {
-            ulSectorNumber = ulSectorNumber * SD_SECTOR_SIZE;
-        }
-
-        // Set the block count
-        MAP_SDHostBlockCountSet(SDHOST_BASE, SectorCount);
-
-        // Compute the number of words
-        ulSize = (SD_SECTOR_SIZE * SectorCount) / 4;
-
-        // Check if 1 block or multi block transfer
-        if (SectorCount == 1) {
-            // Send single block read command
-            if (CardSendCmd(CMD_READ_SINGLE_BLK, ulSectorNumber) == 0) {
-                // Read the block of data
-                while (ulSize--) {
-                    MAP_SDHostDataRead(SDHOST_BASE, (unsigned long *)pBuffer);
-                    pBuffer += 4;
-                }
-                Res = RES_OK;
-            }
-        }
-        else {
-            // Send multi block read command
-            if (CardSendCmd(CMD_READ_MULTI_BLK, ulSectorNumber) == 0) {
-                // Read the data
-                while (ulSize--) {
-                    MAP_SDHostDataRead(SDHOST_BASE, (unsigned long *)pBuffer);
-                    pBuffer += 4;
-                }
-                CardSendCmd(CMD_STOP_TRANS, 0);
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-    }
-
-    return Res;
-}
-
-//*****************************************************************************
-//
-//! Wrties sector(s) to the disk drive.
-//!
-//!
-//! This function writes specified number of sectors to the drive
-//!
-//! \return Returns RES_OK on success.
-//
-//*****************************************************************************
-DRESULT sd_disk_write (const BYTE* pBuffer, DWORD ulSectorNumber, UINT SectorCount) {
-    DRESULT Res = RES_ERROR;
-    unsigned long ulSize;
-
-    if (SectorCount > 0) {
-        // Return if disk not initialized
-        if (sd_disk_info.bStatus & STA_NOINIT) {
-            return RES_NOTRDY;
-        }
-
-        // SDSC uses linear address, SDHC uses block address
-        if (sd_disk_info.ulCapClass == CARD_CAP_CLASS_SDSC) {
-            ulSectorNumber = ulSectorNumber * SD_SECTOR_SIZE;
-        }
-
-        // Set the block count
-        MAP_SDHostBlockCountSet(SDHOST_BASE, SectorCount);
-
-        // Compute the number of words
-        ulSize = (SD_SECTOR_SIZE * SectorCount) / 4;
-
-        // Check if 1 block or multi block transfer
-        if (SectorCount == 1) {
-            // Send single block write command
-            if (CardSendCmd(CMD_WRITE_SINGLE_BLK, ulSectorNumber) == 0) {
-                // Write the data
-                while (ulSize--) {
-                    MAP_SDHostDataWrite (SDHOST_BASE, (*(unsigned long *)pBuffer));
-                    pBuffer += 4;
-                }
-                // Wait for data transfer complete
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-        else {
-            // Set the card write block count
-            if (sd_disk_info.ucCardType == CARD_TYPE_SDCARD) {
-                CardSendCmd(CMD_APP_CMD,sd_disk_info.usRCA << 16);
-                CardSendCmd(CMD_SET_BLK_CNT, SectorCount);
-            }
-
-            // Send multi block write command
-            if (CardSendCmd(CMD_WRITE_MULTI_BLK, ulSectorNumber) == 0) {
-                // Write the data buffer
-                while (ulSize--) {
-                    MAP_SDHostDataWrite(SDHOST_BASE, (*(unsigned long *)pBuffer));
-                    pBuffer += 4;
-                }
-                // Wait for transfer complete
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                CardSendCmd(CMD_STOP_TRANS, 0);
-                while (!(MAP_SDHostIntStatus(SDHOST_BASE) & SDHOST_INT_TC));
-                Res = RES_OK;
-            }
-        }
-    }
-
-    return Res;
-}
diff --git a/ports/cc3200/fatfs/src/drivers/sd_diskio.h b/ports/cc3200/fatfs/src/drivers/sd_diskio.h
deleted file mode 100644
index b5a1944ec4027..0000000000000
--- a/ports/cc3200/fatfs/src/drivers/sd_diskio.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef SD_DISKIO_H_
-#define SD_DISKIO_H_
-
-#define SD_SECTOR_SIZE          512
-
-//*****************************************************************************
-// Disk Info Structure definition
-//*****************************************************************************
-typedef struct
-{
-    unsigned char ucCardType;
-    unsigned int  ulVersion;
-    unsigned int  ulCapClass;
-    unsigned int ulNofBlock;
-    unsigned int ulBlockSize;
-    DSTATUS bStatus;
-    unsigned short usRCA;
-}DiskInfo_t;
-
-extern DiskInfo_t sd_disk_info;
-
-DSTATUS sd_disk_init (void);
-void sd_disk_deinit (void);
-DRESULT sd_disk_read (BYTE* pBuffer, DWORD ulSectorNumber, UINT bSectorCount);
-DRESULT sd_disk_write (const BYTE* pBuffer, DWORD ulSectorNumber, UINT bSectorCount);
-
-#endif /* SD_DISKIO_H_ */
diff --git a/ports/cc3200/fatfs/src/drivers/sflash_diskio.c b/ports/cc3200/fatfs/src/drivers/sflash_diskio.c
deleted file mode 100644
index 6a1fc406855d3..0000000000000
--- a/ports/cc3200/fatfs/src/drivers/sflash_diskio.c
+++ /dev/null
@@ -1,182 +0,0 @@
-#include 
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/oofatfs/diskio.h"
-#include "simplelink.h"
-#include "sflash_diskio.h"
-#include "debug.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-
-#define SFLASH_TIMEOUT_MAX_MS               5500
-#define SFLASH_WAIT_TIME_MS                 5
-
-static _u8 sflash_block_name[] =  "__NNN__.fsb";
-static _u8 *sflash_block_cache;
-static bool sflash_init_done = false;
-static bool sflash_cache_is_dirty;
-static uint32_t sflash_ublock;
-static uint32_t sflash_prblock;
-
-
-static void print_block_name (_u32 ublock) {
-    char _sblock[4];
-    snprintf (_sblock, sizeof(_sblock), "%03u", ublock);
-    memcpy (&sflash_block_name[2], _sblock, 3);
-}
-
-static bool sflash_access (_u32 mode, _i32 (* sl_FsFunction)(_i32 FileHdl, _u32 Offset, _u8* pData, _u32 Len)) {
-    _i32 fileHandle;
-    bool retval = false;
-
-    // wlan must be enabled in order to access the serial flash
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-
-    if (0 == sl_FsOpen(sflash_block_name, mode, NULL, &fileHandle)) {
-        if (SFLASH_BLOCK_SIZE == sl_FsFunction (fileHandle, 0, sflash_block_cache, SFLASH_BLOCK_SIZE)) {
-            retval = true;
-        }
-        sl_FsClose (fileHandle, NULL, NULL, 0);
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-    return retval;
-}
-
-DRESULT sflash_disk_init (void) {
-    _i32 fileHandle;
-    SlFsFileInfo_t FsFileInfo;
-
-    if (!sflash_init_done) {
-        // Allocate space for the block cache
-        ASSERT ((sflash_block_cache = mem_Malloc(SFLASH_BLOCK_SIZE)) != NULL);
-        sflash_init_done = true;
-        sflash_prblock = UINT32_MAX;
-        sflash_cache_is_dirty = false;
-
-        // In order too speed up booting, check the last block, if exists, then
-        // it means that the file system has been already created
-        print_block_name (SFLASH_BLOCK_COUNT - 1);
-        sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-        if (!sl_FsGetInfo(sflash_block_name, 0, &FsFileInfo)) {
-            sl_LockObjUnlock (&wlan_LockObj);
-            return RES_OK;
-        }
-        sl_LockObjUnlock (&wlan_LockObj);
-
-        // Proceed to format the memory
-        for (int i = 0; i < SFLASH_BLOCK_COUNT; i++) {
-            print_block_name (i);
-            sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-            // Create the block file if it doesn't exist
-            if (sl_FsGetInfo(sflash_block_name, 0, &FsFileInfo) != 0) {
-                if (!sl_FsOpen(sflash_block_name, FS_MODE_OPEN_CREATE(SFLASH_BLOCK_SIZE, 0), NULL, &fileHandle)) {
-                    sl_FsClose(fileHandle, NULL, NULL, 0);
-                    sl_LockObjUnlock (&wlan_LockObj);
-                    memset(sflash_block_cache, 0xFF, SFLASH_BLOCK_SIZE);
-                    if (!sflash_access(FS_MODE_OPEN_WRITE, sl_FsWrite)) {
-                        return RES_ERROR;
-                    }
-                }
-                else {
-                    // Unexpected failure while creating the file
-                    sl_LockObjUnlock (&wlan_LockObj);
-                    return RES_ERROR;
-                }
-            }
-            sl_LockObjUnlock (&wlan_LockObj);
-        }
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_status(void) {
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_read(BYTE *buff, DWORD sector, UINT count) {
-    uint32_t secindex;
-
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-
-    if ((sector + count > SFLASH_SECTOR_COUNT) || (count == 0)) {
-        return RES_PARERR;
-    }
-
-    for (int i = 0; i < count; i++) {
-        secindex = (sector + i) % SFLASH_SECTORS_PER_BLOCK;
-        sflash_ublock = (sector + i) / SFLASH_SECTORS_PER_BLOCK;
-        // See if it's time to read a new block
-        if (sflash_prblock != sflash_ublock) {
-            if (sflash_disk_flush() != RES_OK) {
-                return RES_ERROR;
-            }
-            sflash_prblock = sflash_ublock;
-            print_block_name (sflash_ublock);
-            if (!sflash_access(FS_MODE_OPEN_READ, sl_FsRead)) {
-                return RES_ERROR;
-            }
-        }
-        // Copy the requested sector from the block cache
-        memcpy (buff, &sflash_block_cache[(secindex * SFLASH_SECTOR_SIZE)], SFLASH_SECTOR_SIZE);
-        buff += SFLASH_SECTOR_SIZE;
-    }
-    return RES_OK;
-}
-
-DRESULT sflash_disk_write(const BYTE *buff, DWORD sector, UINT count) {
-    uint32_t secindex;
-    int32_t index = 0;
-
-    if (!sflash_init_done) {
-        return STA_NOINIT;
-    }
-
-    if ((sector + count > SFLASH_SECTOR_COUNT) || (count == 0)) {
-        sflash_disk_flush();
-        return RES_PARERR;
-    }
-
-    do {
-        secindex = (sector + index) % SFLASH_SECTORS_PER_BLOCK;
-        sflash_ublock = (sector + index) / SFLASH_SECTORS_PER_BLOCK;
-        // Check if it's a different block than last time
-        if (sflash_prblock != sflash_ublock) {
-            if (sflash_disk_flush() != RES_OK) {
-                return RES_ERROR;
-            }
-            sflash_prblock = sflash_ublock;
-            print_block_name (sflash_ublock);
-            // Read the block into the cache
-            if (!sflash_access(FS_MODE_OPEN_READ, sl_FsRead)) {
-                return RES_ERROR;
-            }
-        }
-        // Copy the input sector to the block cache
-        memcpy (&sflash_block_cache[(secindex * SFLASH_SECTOR_SIZE)], buff, SFLASH_SECTOR_SIZE);
-        buff += SFLASH_SECTOR_SIZE;
-        sflash_cache_is_dirty = true;
-    } while (++index < count);
-
-    return RES_OK;
-}
-
-DRESULT sflash_disk_flush (void) {
-    // Write back the cache if it's dirty
-    if (sflash_cache_is_dirty) {
-        if (!sflash_access(FS_MODE_OPEN_WRITE, sl_FsWrite)) {
-            return RES_ERROR;
-        }
-        sflash_cache_is_dirty = false;
-    }
-    return RES_OK;
-}
-
diff --git a/ports/cc3200/fatfs/src/drivers/sflash_diskio.h b/ports/cc3200/fatfs/src/drivers/sflash_diskio.h
deleted file mode 100644
index de3093439ca71..0000000000000
--- a/ports/cc3200/fatfs/src/drivers/sflash_diskio.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef SFLASH_DISKIO_H_
-#define SFLASH_DISKIO_H_
-
-#define SFLASH_BLOCK_SIZE           2048
-#define SFLASH_BLOCK_COUNT          MICROPY_PORT_SFLASH_BLOCK_COUNT
-#define SFLASH_SECTOR_SIZE          512
-#define SFLASH_SECTOR_COUNT         ((SFLASH_BLOCK_SIZE * SFLASH_BLOCK_COUNT) / SFLASH_SECTOR_SIZE)
-#define SFLASH_SECTORS_PER_BLOCK    (SFLASH_BLOCK_SIZE / SFLASH_SECTOR_SIZE)
-
-DRESULT sflash_disk_init(void);
-DRESULT sflash_disk_status(void);
-DRESULT sflash_disk_read(BYTE *buff, DWORD sector, UINT count);
-DRESULT sflash_disk_write(const BYTE *buff, DWORD sector, UINT count);
-DRESULT sflash_disk_flush(void);
-
-#endif /* SFLASH_DISKIO_H_ */
diff --git a/ports/cc3200/fatfs/src/drivers/stdcmd.h b/ports/cc3200/fatfs/src/drivers/stdcmd.h
deleted file mode 100644
index 464e2ddfaaec8..0000000000000
--- a/ports/cc3200/fatfs/src/drivers/stdcmd.h
+++ /dev/null
@@ -1,62 +0,0 @@
-//*****************************************************************************
-// stdcmd.h
-//
-// Defines standard SD Card commands for CC3200 SDHOST module. 
-//
-// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
-// 
-// 
-//  Redistribution and use in source and binary forms, with or without 
-//  modification, are permitted provided that the following conditions 
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright 
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the 
-//    documentation and/or other materials provided with the   
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __STDCMD_H__
-#define __STDCMD_H__
-
-//*****************************************************************************
-// Standard MMC/SD Card Commands                           
-//*****************************************************************************
-#define CMD_GO_IDLE_STATE    SDHOST_CMD_0
-#define CMD_SEND_IF_COND     SDHOST_CMD_8|SDHOST_RESP_LEN_48
-#define CMD_SEND_CSD         SDHOST_CMD_9|SDHOST_RESP_LEN_136
-#define CMD_APP_CMD          SDHOST_CMD_55|SDHOST_RESP_LEN_48
-#define CMD_SD_SEND_OP_COND  SDHOST_CMD_41|SDHOST_RESP_LEN_48
-#define CMD_SEND_OP_COND     SDHOST_CMD_1|SDHOST_RESP_LEN_48
-#define CMD_READ_SINGLE_BLK  SDHOST_CMD_17|SDHOST_RD_CMD|SDHOST_RESP_LEN_48
-#define CMD_READ_MULTI_BLK   SDHOST_CMD_18|SDHOST_RD_CMD|SDHOST_RESP_LEN_48|SDHOST_MULTI_BLK
-#define CMD_WRITE_SINGLE_BLK SDHOST_CMD_24|SDHOST_WR_CMD|SDHOST_RESP_LEN_48
-#define CMD_WRITE_MULTI_BLK  SDHOST_CMD_25|SDHOST_WR_CMD|SDHOST_RESP_LEN_48|SDHOST_MULTI_BLK
-#define CMD_SELECT_CARD      SDHOST_CMD_7|SDHOST_RESP_LEN_48B
-#define CMD_DESELECT_CARD    SDHOST_CMD_7
-#define CMD_STOP_TRANS       SDHOST_CMD_12|SDHOST_RESP_LEN_48B
-#define CMD_SET_BLK_CNT      SDHOST_CMD_23|SDHOST_RESP_LEN_48
-#define CMD_ALL_SEND_CID     SDHOST_CMD_2|SDHOST_RESP_LEN_136
-#define CMD_SEND_REL_ADDR    SDHOST_CMD_3|SDHOST_RESP_LEN_48
-
-#endif //__STDCMD_H__
diff --git a/ports/cc3200/fatfs_port.c b/ports/cc3200/fatfs_port.c
deleted file mode 100644
index 658c94e886f51..0000000000000
--- a/ports/cc3200/fatfs_port.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2013-2017 Damien P. George
- * Parts of this file are (C)ChaN, 2014, from FatFs option/syscall.c
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "py/runtime.h"
-#include "lib/oofatfs/ff.h"
-#include "lib/timeutils/timeutils.h"
-#include "mods/pybrtc.h"
-
-#if _FS_REENTRANT
-// Create a Synchronization Object
-// This function is called in f_mount() function to create a new
-// synchronization object, such as semaphore and mutex.
-// A return of 0 indicates failure, and then f_mount() fails with FR_INT_ERR.
-int ff_cre_syncobj(FATFS *fatfs, _SYNC_t *sobj) {
-    vSemaphoreCreateBinary((*sobj));
-    return (int)(*sobj != NULL);
-}
-
-// Delete a Synchronization Object
-// This function is called in f_mount() function to delete a synchronization
-// object that created with ff_cre_syncobj function.
-// A return of 0 indicates failure, and then f_mount() fails with FR_INT_ERR.
-int ff_del_syncobj(_SYNC_t sobj) {
-    vSemaphoreDelete(sobj);
-    return 1;
-}
-
-// Request Grant to Access the Volume
-// This function is called on entering file functions to lock the volume.
-// When a 0 is returned, the file function fails with FR_TIMEOUT.
-int ff_req_grant(_SYNC_t sobj) {
-    return (int)(xSemaphoreTake(sobj, _FS_TIMEOUT) == pdTRUE);
-}
-
-// Release Grant to Access the Volume
-// This function is called on leaving file functions to unlock the volume.
-void ff_rel_grant(_SYNC_t sobj) {
-    xSemaphoreGive(sobj);
-}
-
-#endif
-
-DWORD get_fattime(void) {
-    timeutils_struct_time_t tm;
-    timeutils_seconds_since_2000_to_struct_time(pyb_rtc_get_seconds(), &tm);
-
-    return ((tm.tm_year - 1980) << 25) | ((tm.tm_mon) << 21)  |
-            ((tm.tm_mday) << 16)       | ((tm.tm_hour) << 11) |
-            ((tm.tm_min) << 5)         | (tm.tm_sec >> 1);
-}
diff --git a/ports/cc3200/ftp/ftp.c b/ports/cc3200/ftp/ftp.c
deleted file mode 100644
index ee80e51f5269e..0000000000000
--- a/ports/cc3200/ftp/ftp.c
+++ /dev/null
@@ -1,1152 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "py/runtime.h"
-#include "lib/timeutils/timeutils.h"
-#include "lib/oofatfs/ff.h"
-#include "extmod/vfs.h"
-#include "extmod/vfs_fat.h"
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "rom_map.h"
-#include "prcm.h"
-#include "pybrtc.h"
-#include "ftp.h"
-#include "simplelink.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-#include "modusocket.h"
-#include "debug.h"
-#include "serverstask.h"
-#include "fifo.h"
-#include "socketfifo.h"
-#include "updater.h"
-#include "moduos.h"
-
-/******************************************************************************
- DEFINE PRIVATE CONSTANTS
- ******************************************************************************/
-#define FTP_CMD_PORT                        21
-#define FTP_ACTIVE_DATA_PORT                20
-#define FTP_PASIVE_DATA_PORT                2024
-#define FTP_BUFFER_SIZE                     512
-#define FTP_TX_RETRIES_MAX                  25
-#define FTP_CMD_SIZE_MAX                    6
-#define FTP_CMD_CLIENTS_MAX                 1
-#define FTP_DATA_CLIENTS_MAX                1
-#define FTP_MAX_PARAM_SIZE                  (MICROPY_ALLOC_PATH_MAX + 1)
-#define FTP_UNIX_TIME_20000101              946684800
-#define FTP_UNIX_TIME_20150101              1420070400
-#define FTP_UNIX_SECONDS_180_DAYS           15552000
-#define FTP_DATA_TIMEOUT_MS                 5000            // 5 seconds
-#define FTP_SOCKETFIFO_ELEMENTS_MAX         4
-#define FTP_CYCLE_TIME_MS                   (SERVERS_CYCLE_TIME_MS * 2)
-
-/******************************************************************************
- DEFINE PRIVATE TYPES
- ******************************************************************************/
-typedef enum {
-    E_FTP_RESULT_OK = 0,
-    E_FTP_RESULT_CONTINUE,
-    E_FTP_RESULT_FAILED
-} ftp_result_t;
-
-typedef enum {
-    E_FTP_STE_DISABLED = 0,
-    E_FTP_STE_START,
-    E_FTP_STE_READY,
-    E_FTP_STE_END_TRANSFER,
-    E_FTP_STE_CONTINUE_LISTING,
-    E_FTP_STE_CONTINUE_FILE_TX,
-    E_FTP_STE_CONTINUE_FILE_RX
-} ftp_state_t;
-
-typedef enum {
-    E_FTP_STE_SUB_DISCONNECTED = 0,
-    E_FTP_STE_SUB_LISTEN_FOR_DATA,
-    E_FTP_STE_SUB_DATA_CONNECTED
-} ftp_substate_t;
-
-typedef struct {
-    bool            uservalid : 1;
-    bool            passvalid : 1;
-} ftp_loggin_t;
-
-typedef enum {
-    E_FTP_NOTHING_OPEN = 0,
-    E_FTP_FILE_OPEN,
-    E_FTP_DIR_OPEN
-} ftp_e_open_t;
-
-typedef enum {
-    E_FTP_CLOSE_NONE = 0,
-    E_FTP_CLOSE_DATA,
-    E_FTP_CLOSE_CMD_AND_DATA,
-} ftp_e_closesocket_t;
-
-typedef struct {
-    uint8_t             *dBuffer;
-    uint32_t            ctimeout;
-    union {
-        FF_DIR          dp;
-        FIL             fp;
-    };
-    int16_t             lc_sd;
-    int16_t             ld_sd;
-    int16_t             c_sd;
-    int16_t             d_sd;
-    int16_t             dtimeout;
-    uint16_t            volcount;
-    uint8_t             state;
-    uint8_t             substate;
-    uint8_t             txRetries;
-    uint8_t             logginRetries;
-    ftp_loggin_t        loggin;
-    uint8_t             e_open;
-    bool                closechild;
-    bool                enabled;
-    bool                special_file;
-    bool                listroot;
-} ftp_data_t;
-
-typedef struct {
-    char * cmd;
-} ftp_cmd_t;
-
-typedef struct {
-    char * month;
-} ftp_month_t;
-
-typedef enum {
-    E_FTP_CMD_NOT_SUPPORTED = -1,
-    E_FTP_CMD_FEAT = 0,
-    E_FTP_CMD_SYST,
-    E_FTP_CMD_CDUP,
-    E_FTP_CMD_CWD,
-    E_FTP_CMD_PWD,
-    E_FTP_CMD_XPWD,
-    E_FTP_CMD_SIZE,
-    E_FTP_CMD_MDTM,
-    E_FTP_CMD_TYPE,
-    E_FTP_CMD_USER,
-    E_FTP_CMD_PASS,
-    E_FTP_CMD_PASV,
-    E_FTP_CMD_LIST,
-    E_FTP_CMD_RETR,
-    E_FTP_CMD_STOR,
-    E_FTP_CMD_DELE,
-    E_FTP_CMD_RMD,
-    E_FTP_CMD_MKD,
-    E_FTP_CMD_RNFR,
-    E_FTP_CMD_RNTO,
-    E_FTP_CMD_NOOP,
-    E_FTP_CMD_QUIT,
-    E_FTP_NUM_FTP_CMDS
-} ftp_cmd_index_t;
-
-/******************************************************************************
- DECLARE PRIVATE DATA
- ******************************************************************************/
-static ftp_data_t ftp_data;
-static char *ftp_path;
-static char *ftp_scratch_buffer;
-static char *ftp_cmd_buffer;
-static const ftp_cmd_t ftp_cmd_table[] = { { "FEAT" }, { "SYST" }, { "CDUP" }, { "CWD"  },
-                                           { "PWD"  }, { "XPWD" }, { "SIZE" }, { "MDTM" },
-                                           { "TYPE" }, { "USER" }, { "PASS" }, { "PASV" },
-                                           { "LIST" }, { "RETR" }, { "STOR" }, { "DELE" },
-                                           { "RMD"  }, { "MKD"  }, { "RNFR" }, { "RNTO" },
-                                           { "NOOP" }, { "QUIT" } };
-
-static const ftp_month_t ftp_month[] = { { "Jan" }, { "Feb" }, { "Mar" }, { "Apr" },
-                                         { "May" }, { "Jun" }, { "Jul" }, { "Ago" },
-                                         { "Sep" }, { "Oct" }, { "Nov" }, { "Dec" } };
-
-static SocketFifoElement_t ftp_fifoelements[FTP_SOCKETFIFO_ELEMENTS_MAX];
-static FIFO_t ftp_socketfifo;
-
-/******************************************************************************
- DEFINE VFS WRAPPER FUNCTIONS
- ******************************************************************************/
-
-// These wrapper functions are used so that the FTP server can access the
-// mounted FATFS devices directly without going through the costly mp_vfs_XXX
-// functions.  The latter may raise exceptions and we would then need to wrap
-// all calls in an nlr handler.  The wrapper functions below assume that there
-// are only FATFS filesystems mounted.
-
-STATIC FATFS *lookup_path(const TCHAR **path) {
-    mp_vfs_mount_t *fs = mp_vfs_lookup_path(*path, path);
-    if (fs == MP_VFS_NONE || fs == MP_VFS_ROOT) {
-        return NULL;
-    }
-    // here we assume that the mounted device is FATFS
-    return &((fs_user_mount_t*)MP_OBJ_TO_PTR(fs->obj))->fatfs;
-}
-
-STATIC FRESULT f_open_helper(FIL *fp, const TCHAR *path, BYTE mode) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_open(fs, fp, path, mode);
-}
-
-STATIC FRESULT f_opendir_helper(FF_DIR *dp, const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_opendir(fs, dp, path);
-}
-
-STATIC FRESULT f_stat_helper(const TCHAR *path, FILINFO *fno) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_stat(fs, path, fno);
-}
-
-STATIC FRESULT f_mkdir_helper(const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_mkdir(fs, path);
-}
-
-STATIC FRESULT f_unlink_helper(const TCHAR *path) {
-    FATFS *fs = lookup_path(&path);
-    if (fs == NULL) {
-        return FR_NO_PATH;
-    }
-    return f_unlink(fs, path);
-}
-
-STATIC FRESULT f_rename_helper(const TCHAR *path_old, const TCHAR *path_new) {
-    FATFS *fs_old = lookup_path(&path_old);
-    if (fs_old == NULL) {
-        return FR_NO_PATH;
-    }
-    FATFS *fs_new = lookup_path(&path_new);
-    if (fs_new == NULL) {
-        return FR_NO_PATH;
-    }
-    if (fs_old != fs_new) {
-        return FR_NO_PATH;
-    }
-    return f_rename(fs_new, path_old, path_new);
-}
-
-/******************************************************************************
- DECLARE PRIVATE FUNCTIONS
- ******************************************************************************/
-static void ftp_wait_for_enabled (void);
-static bool ftp_create_listening_socket (_i16 *sd, _u16 port, _u8 backlog);
-static ftp_result_t ftp_wait_for_connection (_i16 l_sd, _i16 *n_sd);
-static ftp_result_t ftp_send_non_blocking (_i16 sd, void *data, _i16 Len);
-static void ftp_send_reply (_u16 status, char *message);
-static void ftp_send_data (_u32 datasize);
-static void ftp_send_from_fifo (void);
-static ftp_result_t ftp_recv_non_blocking (_i16 sd, void *buff, _i16 Maxlen, _i32 *rxLen);
-static void ftp_process_cmd (void);
-static void ftp_close_files (void);
-static void ftp_close_filesystem_on_error (void);
-static void ftp_close_cmd_data (void);
-static ftp_cmd_index_t ftp_pop_command (char **str);
-static void ftp_pop_param (char **str, char *param);
-static int ftp_print_eplf_item (char *dest, uint32_t destsize, FILINFO *fno);
-static int ftp_print_eplf_drive (char *dest, uint32_t destsize, const char *name);
-static bool ftp_open_file (const char *path, int mode);
-static ftp_result_t ftp_read_file (char *filebuf, uint32_t desiredsize, uint32_t *actualsize);
-static ftp_result_t ftp_write_file (char *filebuf, uint32_t size);
-static ftp_result_t ftp_open_dir_for_listing (const char *path);
-static ftp_result_t ftp_list_dir (char *list, uint32_t maxlistsize, uint32_t *listsize);
-static void ftp_open_child (char *pwd, char *dir);
-static void ftp_close_child (char *pwd);
-static void ftp_return_to_previous_path (char *pwd, char *dir);
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-void ftp_init (void) {
-    // Allocate memory for the data buffer, and the file system structs (from the RTOS heap)
-    ASSERT ((ftp_data.dBuffer = mem_Malloc(FTP_BUFFER_SIZE)) != NULL);
-    ASSERT ((ftp_path = mem_Malloc(FTP_MAX_PARAM_SIZE)) != NULL);
-    ASSERT ((ftp_scratch_buffer = mem_Malloc(FTP_MAX_PARAM_SIZE)) != NULL);
-    ASSERT ((ftp_cmd_buffer = mem_Malloc(FTP_MAX_PARAM_SIZE + FTP_CMD_SIZE_MAX)) != NULL);
-    SOCKETFIFO_Init (&ftp_socketfifo, (void *)ftp_fifoelements, FTP_SOCKETFIFO_ELEMENTS_MAX);
-    ftp_data.c_sd  = -1;
-    ftp_data.d_sd  = -1;
-    ftp_data.lc_sd = -1;
-    ftp_data.ld_sd = -1;
-    ftp_data.e_open = E_FTP_NOTHING_OPEN;
-    ftp_data.state = E_FTP_STE_DISABLED;
-    ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-    ftp_data.special_file = false;
-    ftp_data.volcount = 0;
-}
-
-void ftp_run (void) {
-    switch (ftp_data.state) {
-        case E_FTP_STE_DISABLED:
-            ftp_wait_for_enabled();
-            break;
-        case E_FTP_STE_START:
-            if (wlan_is_connected() && ftp_create_listening_socket(&ftp_data.lc_sd, FTP_CMD_PORT, FTP_CMD_CLIENTS_MAX - 1)) {
-                ftp_data.state = E_FTP_STE_READY;
-            }
-            break;
-        case E_FTP_STE_READY:
-            if (ftp_data.c_sd < 0 && ftp_data.substate == E_FTP_STE_SUB_DISCONNECTED) {
-                if (E_FTP_RESULT_OK == ftp_wait_for_connection(ftp_data.lc_sd, &ftp_data.c_sd)) {
-                    ftp_data.txRetries = 0;
-                    ftp_data.logginRetries = 0;
-                    ftp_data.ctimeout = 0;
-                    ftp_data.loggin.uservalid = false;
-                    ftp_data.loggin.passvalid = false;
-                    strcpy (ftp_path, "/");
-                    ftp_send_reply (220, "MicroPython FTP Server");
-                    break;
-                }
-            }
-            if (SOCKETFIFO_IsEmpty()) {
-                if (ftp_data.c_sd > 0 && ftp_data.substate != E_FTP_STE_SUB_LISTEN_FOR_DATA) {
-                    ftp_process_cmd();
-                    if (ftp_data.state != E_FTP_STE_READY) {
-                        break;
-                    }
-                }
-            }
-            break;
-        case E_FTP_STE_END_TRANSFER:
-            break;
-        case E_FTP_STE_CONTINUE_LISTING:
-            // go on with listing only if the transmit buffer is empty
-            if (SOCKETFIFO_IsEmpty()) {
-                uint32_t listsize;
-                ftp_list_dir((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, &listsize);
-                if (listsize > 0) {
-                    ftp_send_data(listsize);
-                } else {
-                    ftp_send_reply(226, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                ftp_data.ctimeout = 0;
-            }
-            break;
-        case E_FTP_STE_CONTINUE_FILE_TX:
-            // read the next block from the file only if the previous one has been sent
-            if (SOCKETFIFO_IsEmpty()) {
-                uint32_t readsize;
-                ftp_result_t result;
-                ftp_data.ctimeout = 0;
-                result = ftp_read_file ((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, &readsize);
-                if (result == E_FTP_RESULT_FAILED) {
-                    ftp_send_reply(451, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                else {
-                    if (readsize > 0) {
-                        ftp_send_data(readsize);
-                    }
-                    if (result == E_FTP_RESULT_OK) {
-                        ftp_send_reply(226, NULL);
-                        ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    }
-                }
-            }
-            break;
-        case E_FTP_STE_CONTINUE_FILE_RX:
-            if (SOCKETFIFO_IsEmpty()) {
-                _i32 len;
-                ftp_result_t result;
-                if (E_FTP_RESULT_OK == (result = ftp_recv_non_blocking(ftp_data.d_sd, ftp_data.dBuffer, FTP_BUFFER_SIZE, &len))) {
-                    ftp_data.dtimeout = 0;
-                    ftp_data.ctimeout = 0;
-                    // its a software update
-                    if (ftp_data.special_file) {
-                        if (updater_write(ftp_data.dBuffer, len)) {
-                            break;
-                        }
-                    }
-                    // user file being received
-                    else if (E_FTP_RESULT_OK == ftp_write_file ((char *)ftp_data.dBuffer, len)) {
-                        break;
-                    }
-                    ftp_send_reply(451, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-                else if (result == E_FTP_RESULT_CONTINUE) {
-                    if (ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-                        ftp_close_files();
-                        ftp_send_reply(426, NULL);
-                        ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    }
-                }
-                else {
-                    if (ftp_data.special_file) {
-                        ftp_data.special_file = false;
-                        updater_finnish();
-                    }
-                    ftp_close_files();
-                    ftp_send_reply(226, NULL);
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                }
-            }
-            break;
-        default:
-            break;
-    }
-
-    switch (ftp_data.substate) {
-    case E_FTP_STE_SUB_DISCONNECTED:
-        break;
-    case E_FTP_STE_SUB_LISTEN_FOR_DATA:
-        if (E_FTP_RESULT_OK == ftp_wait_for_connection(ftp_data.ld_sd, &ftp_data.d_sd)) {
-            ftp_data.dtimeout = 0;
-            ftp_data.substate = E_FTP_STE_SUB_DATA_CONNECTED;
-        }
-        else if (ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-            ftp_data.dtimeout = 0;
-            // close the listening socket
-            servers_close_socket(&ftp_data.ld_sd);
-            ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        }
-        break;
-    case E_FTP_STE_SUB_DATA_CONNECTED:
-        if (ftp_data.state == E_FTP_STE_READY && ftp_data.dtimeout++ > FTP_DATA_TIMEOUT_MS / FTP_CYCLE_TIME_MS) {
-            // close the listening and the data socket
-            servers_close_socket(&ftp_data.ld_sd);
-            servers_close_socket(&ftp_data.d_sd);
-            ftp_close_filesystem_on_error ();
-            ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        }
-        break;
-    default:
-        break;
-    }
-
-    // send data pending in the queue
-    ftp_send_from_fifo();
-
-    // check the state of the data sockets
-    if (ftp_data.d_sd < 0 && (ftp_data.state > E_FTP_STE_READY)) {
-        ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-        ftp_data.state = E_FTP_STE_READY;
-    }
-}
-
-void ftp_enable (void) {
-    ftp_data.enabled = true;
-}
-
-void ftp_disable (void) {
-    ftp_reset();
-    ftp_data.enabled = false;
-    ftp_data.state = E_FTP_STE_DISABLED;
-}
-
-void ftp_reset (void) {
-    // close all connections and start all over again
-    servers_close_socket(&ftp_data.lc_sd);
-    servers_close_socket(&ftp_data.ld_sd);
-    ftp_close_cmd_data();
-    ftp_data.state = E_FTP_STE_START;
-    ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-    ftp_data.volcount = 0;
-    SOCKETFIFO_Flush();
-}
-
-/******************************************************************************
- DEFINE PRIVATE FUNCTIONS
- ******************************************************************************/
-static void ftp_wait_for_enabled (void) {
-    // Check if the telnet service has been enabled
-    if (ftp_data.enabled) {
-        ftp_data.state = E_FTP_STE_START;
-    }
-}
-
-static bool ftp_create_listening_socket (_i16 *sd, _u16 port, _u8 backlog) {
-    SlSockNonblocking_t nonBlockingOption;
-    SlSockAddrIn_t sServerAddress;
-    _i16 _sd;
-    _i16 result;
-
-    // Open a socket for ftp data listen
-    ASSERT ((*sd = sl_Socket(SL_AF_INET, SL_SOCK_STREAM, SL_IPPROTO_IP)) > 0);
-    _sd = *sd;
-
-    if (_sd > 0) {
-        // add the new socket to the network administration
-        modusocket_socket_add(_sd, false);
-
-        // Enable non-blocking mode
-        nonBlockingOption.NonblockingEnabled = 1;
-        ASSERT ((result = sl_SetSockOpt(_sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &nonBlockingOption, sizeof(nonBlockingOption))) == SL_SOC_OK);
-
-        // Bind the socket to a port number
-        sServerAddress.sin_family = SL_AF_INET;
-        sServerAddress.sin_addr.s_addr = SL_INADDR_ANY;
-        sServerAddress.sin_port = sl_Htons(port);
-
-        ASSERT ((result |= sl_Bind(_sd, (const SlSockAddr_t *)&sServerAddress, sizeof(sServerAddress))) == SL_SOC_OK);
-
-        // Start listening
-        ASSERT ((result |= sl_Listen (_sd, backlog)) == SL_SOC_OK);
-
-        if (result == SL_SOC_OK) {
-            return true;
-        }
-        servers_close_socket(sd);
-    }
-    return false;
-}
-
-static ftp_result_t ftp_wait_for_connection (_i16 l_sd, _i16 *n_sd) {
-    SlSockAddrIn_t sClientAddress;
-    SlSocklen_t  in_addrSize;
-
-    // accepts a connection from a TCP client, if there is any, otherwise returns SL_EAGAIN
-    *n_sd = sl_Accept(l_sd, (SlSockAddr_t *)&sClientAddress, (SlSocklen_t *)&in_addrSize);
-    _i16 _sd = *n_sd;
-    if (_sd == SL_EAGAIN) {
-        return E_FTP_RESULT_CONTINUE;
-    }
-    else if (_sd < 0) {
-        // error
-        ftp_reset();
-        return E_FTP_RESULT_FAILED;
-    }
-
-    // add the new socket to the network administration
-    modusocket_socket_add(_sd, false);
-
-    // client connected, so go on
-    return E_FTP_RESULT_OK;
-}
-
-static ftp_result_t ftp_send_non_blocking (_i16 sd, void *data, _i16 Len) {
-    int16_t result = sl_Send(sd, data, Len, 0);
-
-    if (result > 0) {
-        ftp_data.txRetries = 0;
-        return E_FTP_RESULT_OK;
-    }
-    else if ((FTP_TX_RETRIES_MAX >= ++ftp_data.txRetries) && (result == SL_EAGAIN)) {
-        return E_FTP_RESULT_CONTINUE;
-    }
-    else {
-        // error
-        ftp_reset();
-        return E_FTP_RESULT_FAILED;
-    }
-}
-
-static void ftp_send_reply (_u16 status, char *message) {
-    SocketFifoElement_t fifoelement;
-    if (!message) {
-        message = "";
-    }
-    snprintf((char *)ftp_cmd_buffer, 4, "%u", status);
-    strcat ((char *)ftp_cmd_buffer, " ");
-    strcat ((char *)ftp_cmd_buffer, message);
-    strcat ((char *)ftp_cmd_buffer, "\r\n");
-    fifoelement.sd = &ftp_data.c_sd;
-    fifoelement.datasize = strlen((char *)ftp_cmd_buffer);
-    fifoelement.data = mem_Malloc(fifoelement.datasize);
-    if (status == 221) {
-        fifoelement.closesockets = E_FTP_CLOSE_CMD_AND_DATA;
-    }
-    else if (status == 426 || status == 451 || status == 550) {
-        fifoelement.closesockets = E_FTP_CLOSE_DATA;
-    }
-    else {
-        fifoelement.closesockets = E_FTP_CLOSE_NONE;
-    }
-    fifoelement.freedata = true;
-    if (fifoelement.data) {
-        memcpy (fifoelement.data, ftp_cmd_buffer, fifoelement.datasize);
-        if (!SOCKETFIFO_Push (&fifoelement)) {
-            mem_Free(fifoelement.data);
-        }
-    }
-}
-
-static void ftp_send_data (_u32 datasize) {
-    SocketFifoElement_t fifoelement;
-
-    fifoelement.data = ftp_data.dBuffer;
-    fifoelement.datasize = datasize;
-    fifoelement.sd = &ftp_data.d_sd;
-    fifoelement.closesockets = E_FTP_CLOSE_NONE;
-    fifoelement.freedata = false;
-    SOCKETFIFO_Push (&fifoelement);
-}
-
-static void ftp_send_from_fifo (void) {
-    SocketFifoElement_t fifoelement;
-    if (SOCKETFIFO_Peek (&fifoelement)) {
-        _i16 _sd = *fifoelement.sd;
-        if (_sd > 0) {
-            if (E_FTP_RESULT_OK == ftp_send_non_blocking (_sd, fifoelement.data, fifoelement.datasize)) {
-                SOCKETFIFO_Pop (&fifoelement);
-                if (fifoelement.closesockets != E_FTP_CLOSE_NONE) {
-                    servers_close_socket(&ftp_data.d_sd);
-                    if (fifoelement.closesockets == E_FTP_CLOSE_CMD_AND_DATA) {
-                        servers_close_socket(&ftp_data.ld_sd);
-                        // this one is the command socket
-                        servers_close_socket(fifoelement.sd);
-                        ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-                    }
-                    ftp_close_filesystem_on_error();
-                }
-                if (fifoelement.freedata) {
-                    mem_Free(fifoelement.data);
-                }
-            }
-        }
-        // socket closed, remove from the queue
-        else {
-            SOCKETFIFO_Pop (&fifoelement);
-            if (fifoelement.freedata) {
-                mem_Free(fifoelement.data);
-            }
-        }
-    }
-    else if (ftp_data.state == E_FTP_STE_END_TRANSFER && (ftp_data.d_sd > 0)) {
-        // close the listening and the data sockets
-        servers_close_socket(&ftp_data.ld_sd);
-        servers_close_socket(&ftp_data.d_sd);
-        if (ftp_data.special_file) {
-            ftp_data.special_file = false;
-        }
-    }
-}
-
-static ftp_result_t ftp_recv_non_blocking (_i16 sd, void *buff, _i16 Maxlen, _i32 *rxLen) {
-    *rxLen = sl_Recv(sd, buff, Maxlen, 0);
-
-    if (*rxLen > 0) {
-        return E_FTP_RESULT_OK;
-    }
-    else if (*rxLen != SL_EAGAIN) {
-        // error
-        return E_FTP_RESULT_FAILED;
-    }
-    return E_FTP_RESULT_CONTINUE;
-}
-
-static void ftp_get_param_and_open_child (char **bufptr) {
-    ftp_pop_param (bufptr, ftp_scratch_buffer);
-    ftp_open_child (ftp_path, ftp_scratch_buffer);
-    ftp_data.closechild = true;
-}
-
-static void ftp_process_cmd (void) {
-    _i32 len;
-    char *bufptr = (char *)ftp_cmd_buffer;
-    ftp_result_t result;
-    FRESULT fres;
-    FILINFO fno;
-
-    ftp_data.closechild = false;
-    // also use the reply buffer to receive new commands
-    if (E_FTP_RESULT_OK == (result = ftp_recv_non_blocking(ftp_data.c_sd, ftp_cmd_buffer, FTP_MAX_PARAM_SIZE + FTP_CMD_SIZE_MAX, &len))) {
-        // bufptr is moved as commands are being popped
-        ftp_cmd_index_t cmd = ftp_pop_command(&bufptr);
-        if (!ftp_data.loggin.passvalid && (cmd != E_FTP_CMD_USER && cmd != E_FTP_CMD_PASS && cmd != E_FTP_CMD_QUIT)) {
-            ftp_send_reply(332, NULL);
-            return;
-        }
-        switch (cmd) {
-        case E_FTP_CMD_FEAT:
-            ftp_send_reply(211, "no-features");
-            break;
-        case E_FTP_CMD_SYST:
-            ftp_send_reply(215, "UNIX Type: L8");
-            break;
-        case E_FTP_CMD_CDUP:
-            ftp_close_child(ftp_path);
-            ftp_send_reply(250, NULL);
-            break;
-        case E_FTP_CMD_CWD:
-            {
-                fres = FR_NO_PATH;
-                ftp_pop_param (&bufptr, ftp_scratch_buffer);
-                ftp_open_child (ftp_path, ftp_scratch_buffer);
-                if ((ftp_path[0] == '/' && ftp_path[1] == '\0') || ((fres = f_opendir_helper (&ftp_data.dp, ftp_path)) == FR_OK)) {
-                    if (fres == FR_OK) {
-                        f_closedir(&ftp_data.dp);
-                    }
-                    ftp_send_reply(250, NULL);
-                }
-                else {
-                    ftp_close_child (ftp_path);
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_PWD:
-        case E_FTP_CMD_XPWD:
-            ftp_send_reply(257, ftp_path);
-            break;
-        case E_FTP_CMD_SIZE:
-            {
-                ftp_get_param_and_open_child (&bufptr);
-                if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                    // send the size
-                    snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "%u", (_u32)fno.fsize);
-                    ftp_send_reply(213, (char *)ftp_data.dBuffer);
-                }
-                else {
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_MDTM:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                // send the last modified time
-                snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "%u%02u%02u%02u%02u%02u",
-                         1980 + ((fno.fdate >> 9) & 0x7f), (fno.fdate >> 5) & 0x0f,
-                         fno.fdate & 0x1f, (fno.ftime >> 11) & 0x1f,
-                         (fno.ftime >> 5) & 0x3f, 2 * (fno.ftime & 0x1f));
-                ftp_send_reply(213, (char *)ftp_data.dBuffer);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_TYPE:
-            ftp_send_reply(200, NULL);
-            break;
-        case E_FTP_CMD_USER:
-            ftp_pop_param (&bufptr, ftp_scratch_buffer);
-            if (!memcmp(ftp_scratch_buffer, servers_user, MAX(strlen(ftp_scratch_buffer), strlen(servers_user)))) {
-                ftp_data.loggin.uservalid = true && (strlen(servers_user) == strlen(ftp_scratch_buffer));
-            }
-            ftp_send_reply(331, NULL);
-            break;
-        case E_FTP_CMD_PASS:
-            ftp_pop_param (&bufptr, ftp_scratch_buffer);
-            if (!memcmp(ftp_scratch_buffer, servers_pass, MAX(strlen(ftp_scratch_buffer), strlen(servers_pass))) &&
-                    ftp_data.loggin.uservalid) {
-                ftp_data.loggin.passvalid = true && (strlen(servers_pass) == strlen(ftp_scratch_buffer));
-                if (ftp_data.loggin.passvalid) {
-                    ftp_send_reply(230, NULL);
-                    break;
-                }
-            }
-            ftp_send_reply(530, NULL);
-            break;
-        case E_FTP_CMD_PASV:
-            {
-                // some servers (e.g. google chrome) send PASV several times very quickly
-                servers_close_socket(&ftp_data.d_sd);
-                ftp_data.substate = E_FTP_STE_SUB_DISCONNECTED;
-                bool socketcreated = true;
-                if (ftp_data.ld_sd < 0) {
-                    socketcreated = ftp_create_listening_socket(&ftp_data.ld_sd, FTP_PASIVE_DATA_PORT, FTP_DATA_CLIENTS_MAX - 1);
-                }
-                if (socketcreated) {
-                    uint32_t ip;
-                    uint8_t *pip = (uint8_t *)&ip;
-                    ftp_data.dtimeout = 0;
-                    wlan_get_ip(&ip);
-                    snprintf((char *)ftp_data.dBuffer, FTP_BUFFER_SIZE, "(%u,%u,%u,%u,%u,%u)",
-                             pip[3], pip[2], pip[1], pip[0], (FTP_PASIVE_DATA_PORT >> 8), (FTP_PASIVE_DATA_PORT & 0xFF));
-                    ftp_data.substate = E_FTP_STE_SUB_LISTEN_FOR_DATA;
-                    ftp_send_reply(227, (char *)ftp_data.dBuffer);
-                }
-                else {
-                    ftp_send_reply(425, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_LIST:
-            if (ftp_open_dir_for_listing(ftp_path) == E_FTP_RESULT_CONTINUE) {
-                ftp_data.state = E_FTP_STE_CONTINUE_LISTING;
-                ftp_send_reply(150, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RETR:
-            ftp_get_param_and_open_child (&bufptr);
-            if (ftp_open_file (ftp_path, FA_READ)) {
-                ftp_data.state = E_FTP_STE_CONTINUE_FILE_TX;
-                ftp_send_reply(150, NULL);
-            }
-            else {
-                ftp_data.state = E_FTP_STE_END_TRANSFER;
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_STOR:
-            ftp_get_param_and_open_child (&bufptr);
-            // first check if a software update is being requested
-            if (updater_check_path (ftp_path)) {
-                if (updater_start()) {
-                    ftp_data.special_file = true;
-                    ftp_data.state = E_FTP_STE_CONTINUE_FILE_RX;
-                    ftp_send_reply(150, NULL);
-                }
-                else {
-                    // to unlock the updater
-                    updater_finnish();
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            else {
-                if (ftp_open_file (ftp_path, FA_WRITE | FA_CREATE_ALWAYS)) {
-                    ftp_data.state = E_FTP_STE_CONTINUE_FILE_RX;
-                    ftp_send_reply(150, NULL);
-                }
-                else {
-                    ftp_data.state = E_FTP_STE_END_TRANSFER;
-                    ftp_send_reply(550, NULL);
-                }
-            }
-            break;
-        case E_FTP_CMD_DELE:
-        case E_FTP_CMD_RMD:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_unlink_helper(ftp_path)) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_MKD:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_mkdir_helper(ftp_path)) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RNFR:
-            ftp_get_param_and_open_child (&bufptr);
-            if (FR_OK == f_stat_helper(ftp_path, &fno)) {
-                ftp_send_reply(350, NULL);
-                // save the current path
-                strcpy ((char *)ftp_data.dBuffer, ftp_path);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_RNTO:
-            ftp_get_param_and_open_child (&bufptr);
-            // old path was saved in the data buffer
-            if (FR_OK == (fres = f_rename_helper((char *)ftp_data.dBuffer, ftp_path))) {
-                ftp_send_reply(250, NULL);
-            }
-            else {
-                ftp_send_reply(550, NULL);
-            }
-            break;
-        case E_FTP_CMD_NOOP:
-            ftp_send_reply(200, NULL);
-            break;
-        case E_FTP_CMD_QUIT:
-            ftp_send_reply(221, NULL);
-            break;
-        default:
-            // command not implemented
-            ftp_send_reply(502, NULL);
-            break;
-        }
-
-        if (ftp_data.closechild) {
-            ftp_return_to_previous_path(ftp_path, ftp_scratch_buffer);
-        }
-    }
-    else if (result == E_FTP_RESULT_CONTINUE) {
-        if (ftp_data.ctimeout++ > (servers_get_timeout() / FTP_CYCLE_TIME_MS)) {
-            ftp_send_reply(221, NULL);
-        }
-    }
-    else {
-        ftp_close_cmd_data ();
-    }
-}
-
-static void ftp_close_files (void) {
-    if (ftp_data.e_open == E_FTP_FILE_OPEN) {
-        f_close(&ftp_data.fp);
-    }
-    else if (ftp_data.e_open == E_FTP_DIR_OPEN) {
-        f_closedir(&ftp_data.dp);
-    }
-    ftp_data.e_open = E_FTP_NOTHING_OPEN;
-}
-
-static void ftp_close_filesystem_on_error (void) {
-    ftp_close_files();
-    if (ftp_data.special_file) {
-        updater_finnish ();
-        ftp_data.special_file = false;
-    }
-}
-
-static void ftp_close_cmd_data (void) {
-    servers_close_socket(&ftp_data.c_sd);
-    servers_close_socket(&ftp_data.d_sd);
-    ftp_close_filesystem_on_error ();
-}
-
-static void stoupper (char *str) {
-    while (str && *str != '\0') {
-        *str = (char)unichar_toupper((int)(*str));
-        str++;
-    }
-}
-
-static ftp_cmd_index_t ftp_pop_command (char **str) {
-    char _cmd[FTP_CMD_SIZE_MAX];
-    ftp_pop_param (str, _cmd);
-    stoupper (_cmd);
-    for (ftp_cmd_index_t i = 0; i < E_FTP_NUM_FTP_CMDS; i++) {
-        if (!strcmp (_cmd, ftp_cmd_table[i].cmd)) {
-            // move one step further to skip the space
-            (*str)++;
-            return i;
-        }
-    }
-    return E_FTP_CMD_NOT_SUPPORTED;
-}
-
-static void ftp_pop_param (char **str, char *param) {
-    while (**str != ' ' && **str != '\r' && **str != '\n' && **str != '\0') {
-        *param++ = **str;
-        (*str)++;
-    }
-    *param = '\0';
-}
-
-static int ftp_print_eplf_item (char *dest, uint32_t destsize, FILINFO *fno) {
-
-    char *type = (fno->fattrib & AM_DIR) ? "d" : "-";
-    uint32_t tseconds;
-    uint mindex = (((fno->fdate >> 5) & 0x0f) > 0) ? (((fno->fdate >> 5) & 0x0f) - 1) : 0;
-    uint day = ((fno->fdate & 0x1f) > 0) ? (fno->fdate & 0x1f) : 1;
-    uint fseconds = timeutils_seconds_since_2000(1980 + ((fno->fdate >> 9) & 0x7f),
-                                                        (fno->fdate >> 5) & 0x0f,
-                                                        fno->fdate & 0x1f,
-                                                        (fno->ftime >> 11) & 0x1f,
-                                                        (fno->ftime >> 5) & 0x3f,
-                                                        2 * (fno->ftime & 0x1f));
-    tseconds = pyb_rtc_get_seconds();
-    if (FTP_UNIX_SECONDS_180_DAYS < tseconds - fseconds) {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %5u %s\r\n",
-                        type, (_u32)fno->fsize, ftp_month[mindex].month, day,
-                        1980 + ((fno->fdate >> 9) & 0x7f), fno->fname);
-    }
-    else {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %02u:%02u %s\r\n",
-                        type, (_u32)fno->fsize, ftp_month[mindex].month, day,
-                        (fno->ftime >> 11) & 0x1f, (fno->ftime >> 5) & 0x3f, fno->fname);
-    }
-}
-
-static int ftp_print_eplf_drive (char *dest, uint32_t destsize, const char *name) {
-    timeutils_struct_time_t tm;
-    uint32_t tseconds;
-    char *type = "d";
-
-    timeutils_seconds_since_2000_to_struct_time((FTP_UNIX_TIME_20150101 - FTP_UNIX_TIME_20000101), &tm);
-
-    tseconds = pyb_rtc_get_seconds();
-    if (FTP_UNIX_SECONDS_180_DAYS < tseconds - (FTP_UNIX_TIME_20150101 - FTP_UNIX_TIME_20000101)) {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %5u %s\r\n",
-                        type, 0, ftp_month[(tm.tm_mon - 1)].month, tm.tm_mday, tm.tm_year, name);
-    }
-    else {
-        return snprintf(dest, destsize, "%srw-rw-r--   1 root  root %9u %s %2u %02u:%02u %s\r\n",
-                        type, 0, ftp_month[(tm.tm_mon - 1)].month, tm.tm_mday, tm.tm_hour, tm.tm_min, name);
-    }
-}
-
-static bool ftp_open_file (const char *path, int mode) {
-    FRESULT res = f_open_helper(&ftp_data.fp, path, mode);
-    if (res != FR_OK) {
-        return false;
-    }
-    ftp_data.e_open = E_FTP_FILE_OPEN;
-    return true;
-}
-
-static ftp_result_t ftp_read_file (char *filebuf, uint32_t desiredsize, uint32_t *actualsize) {
-    ftp_result_t result = E_FTP_RESULT_CONTINUE;
-    FRESULT res = f_read(&ftp_data.fp, filebuf, desiredsize, (UINT *)actualsize);
-    if (res != FR_OK) {
-        ftp_close_files();
-        result = E_FTP_RESULT_FAILED;
-        *actualsize = 0;
-    }
-    else if (*actualsize < desiredsize) {
-        ftp_close_files();
-        result = E_FTP_RESULT_OK;
-    }
-    return result;
-}
-
-static ftp_result_t ftp_write_file (char *filebuf, uint32_t size) {
-    ftp_result_t result = E_FTP_RESULT_FAILED;
-    uint32_t actualsize;
-    FRESULT res = f_write(&ftp_data.fp, filebuf, size, (UINT *)&actualsize);
-    if ((actualsize == size) && (FR_OK == res)) {
-        result = E_FTP_RESULT_OK;
-    }
-    else {
-        ftp_close_files();
-    }
-    return result;
-}
-
-static ftp_result_t ftp_open_dir_for_listing (const char *path) {
-    // "hack" to detect the root directory
-    if (path[0] == '/' && path[1] == '\0') {
-        ftp_data.listroot = true;
-    } else {
-        FRESULT res;
-        res = f_opendir_helper(&ftp_data.dp, path); /* Open the directory */
-        if (res != FR_OK) {
-            return E_FTP_RESULT_FAILED;
-        }
-        ftp_data.e_open = E_FTP_DIR_OPEN;
-        ftp_data.listroot = false;
-    }
-    return E_FTP_RESULT_CONTINUE;
-}
-
-static ftp_result_t ftp_list_dir (char *list, uint32_t maxlistsize, uint32_t *listsize) {
-    uint next = 0;
-    uint listcount = 0;
-    FRESULT res;
-    ftp_result_t result = E_FTP_RESULT_CONTINUE;
-    FILINFO fno;
-#if _USE_LFN
-    // read up to 2 directory items
-    while (listcount < 2) {
-#else
-    // read up to 4 directory items
-    while (listcount < 4) {
-#endif
-        if (ftp_data.listroot) {
-            // root directory "hack"
-            mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table);
-            int i = ftp_data.volcount;
-            while (vfs != NULL && i != 0) {
-                vfs = vfs->next;
-                i -= 1;
-            }
-            if (vfs == NULL) {
-                if (!next) {
-                    // no volume found this time, we are done
-                    ftp_data.volcount = 0;
-                }
-                break;
-            } else {
-                next += ftp_print_eplf_drive((list + next), (maxlistsize - next), vfs->str + 1);
-            }
-            ftp_data.volcount++;
-        } else {
-            // a "normal" directory
-            res = f_readdir(&ftp_data.dp, &fno);                                                       /* Read a directory item */
-            if (res != FR_OK || fno.fname[0] == 0) {
-                result = E_FTP_RESULT_OK;
-                break;                                                                                 /* Break on error or end of dp */
-            }
-            if (fno.fname[0] == '.' && fno.fname[1] == 0) continue;                                    /* Ignore . entry */
-            if (fno.fname[0] == '.' && fno.fname[1] == '.' && fno.fname[2] == 0) continue;             /* Ignore .. entry */
-
-            // add the entry to the list
-            next += ftp_print_eplf_item((list + next), (maxlistsize - next), &fno);
-        }
-        listcount++;
-    }
-    if (result == E_FTP_RESULT_OK) {
-        ftp_close_files();
-    }
-    *listsize = next;
-    return result;
-}
-
-static void ftp_open_child (char *pwd, char *dir) {
-    if (dir[0] == '/') {
-        strcpy (pwd, dir);
-    } else {
-        if (strlen(pwd) > 1) {
-            strcat (pwd, "/");
-        }
-        strcat (pwd, dir);
-    }
-
-    uint len = strlen(pwd);
-    if ((len > 1) && (pwd[len - 1] == '/')) {
-        pwd[len - 1] = '\0';
-    }
-}
-
-static void ftp_close_child (char *pwd) {
-    uint len = strlen(pwd);
-    while (len && (pwd[len] != '/')) {
-        len--;
-    }
-    if (len == 0) {
-        strcpy (pwd, "/");
-    } else {
-        pwd[len] = '\0';
-    }
-}
-
-static void ftp_return_to_previous_path (char *pwd, char *dir) {
-    uint newlen = strlen(pwd) - strlen(dir);
-    if ((newlen > 2) && (pwd[newlen - 1] == '/')) {
-        pwd[newlen - 1] = '\0';
-    }
-    else {
-        if (newlen == 0) {
-            strcpy (pwd, "/");
-        } else {
-            pwd[newlen] = '\0';
-        }
-    }
-}
-
diff --git a/ports/cc3200/ftp/ftp.h b/ports/cc3200/ftp/ftp.h
deleted file mode 100644
index af4c14fa3bad7..0000000000000
--- a/ports/cc3200/ftp/ftp.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_FTP_FTP_H
-#define MICROPY_INCLUDED_CC3200_FTP_FTP_H
-
-/******************************************************************************
- DECLARE EXPORTED FUNCTIONS
- ******************************************************************************/
-extern void ftp_init (void);
-extern void ftp_run (void);
-extern void ftp_enable (void);
-extern void ftp_disable (void);
-extern void ftp_reset (void);
-
-#endif // MICROPY_INCLUDED_CC3200_FTP_FTP_H
diff --git a/ports/cc3200/ftp/updater.c b/ports/cc3200/ftp/updater.c
deleted file mode 100644
index 5be2c6063c9ba..0000000000000
--- a/ports/cc3200/ftp/updater.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "py/mpconfig.h"
-#include "py/obj.h"
-#include "simplelink.h"
-#include "flc.h"
-#include "updater.h"
-#include "shamd5.h"
-#include "modnetwork.h"
-#include "modwlan.h"
-#include "debug.h"
-#include "osi.h"
-
-/******************************************************************************
- DEFINE PRIVATE CONSTANTS
- ******************************************************************************/
-#define UPDATER_IMG_PATH            "/flash/sys/mcuimg.bin"
-#define UPDATER_SRVPACK_PATH        "/flash/sys/servicepack.ucf"
-#define UPDATER_SIGN_PATH           "/flash/sys/servicepack.sig"
-#define UPDATER_CA_PATH             "/flash/cert/ca.pem"
-#define UPDATER_CERT_PATH           "/flash/cert/cert.pem"
-#define UPDATER_KEY_PATH            "/flash/cert/private.key"
-
-/******************************************************************************
- DEFINE TYPES
- ******************************************************************************/
-typedef struct {
-    char *path;
-    _i32 fhandle;
-    _u32 fsize;
-    _u32 foffset;
-} updater_data_t;
-
-/******************************************************************************
- DECLARE PRIVATE DATA
- ******************************************************************************/
-static updater_data_t updater_data = { .path = NULL, .fhandle = -1, .fsize = 0, .foffset = 0 };
-static OsiLockObj_t updater_LockObj;
-static sBootInfo_t sBootInfo;
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-__attribute__ ((section (".boot")))
-void updater_pre_init (void) {
-    // create the updater lock
-    ASSERT(OSI_OK == sl_LockObjCreate(&updater_LockObj, "UpdaterLock"));
-}
-
-bool updater_check_path (void *path) {
-    sl_LockObjLock (&updater_LockObj, SL_OS_WAIT_FOREVER);
-    if (!strcmp(UPDATER_IMG_PATH, path)) {
-        updater_data.fsize = IMG_SIZE;
-        updater_data.path = IMG_UPDATE1;
-// the launchxl doesn't have enough flash space for 2 user update images
-#ifdef WIPY
-        // check which one should be the next active image
-         _i32 fhandle;
-        if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-            ASSERT (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-            sl_FsClose(fhandle, 0, 0, 0);
-            // if we still have an image pending for verification, keep overwriting it
-            if ((sBootInfo.Status == IMG_STATUS_CHECK && sBootInfo.ActiveImg == IMG_ACT_UPDATE2) ||
-                 (sBootInfo.ActiveImg == IMG_ACT_UPDATE1 && sBootInfo.Status != IMG_STATUS_CHECK)) {
-                updater_data.path = IMG_UPDATE2;
-            }
-        }
-#endif
-    } else if (!strcmp(UPDATER_SRVPACK_PATH, path)) {
-        updater_data.path = IMG_SRVPACK;
-        updater_data.fsize = SRVPACK_SIZE;
-    } else if (!strcmp(UPDATER_SIGN_PATH, path)) {
-        updater_data.path = SRVPACK_SIGN;
-        updater_data.fsize = SIGN_SIZE;
-    } else if (!strcmp(UPDATER_CA_PATH, path)) {
-        updater_data.path = CA_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else if (!strcmp(UPDATER_CERT_PATH, path)) {
-        updater_data.path = CERT_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else if (!strcmp(UPDATER_KEY_PATH, path)) {
-        updater_data.path = KEY_FILE;
-        updater_data.fsize = CA_KEY_SIZE;
-    } else {
-        sl_LockObjUnlock (&updater_LockObj);
-        return false;
-    }
-    return true;
-}
-
-bool updater_start (void) {
-    _u32 AccessModeAndMaxSize = FS_MODE_OPEN_WRITE;
-    SlFsFileInfo_t FsFileInfo;
-    bool result = false;
-
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-    if (0 != sl_FsGetInfo((_u8 *)updater_data.path, 0, &FsFileInfo)) {
-        // file doesn't exist, create it
-        AccessModeAndMaxSize = FS_MODE_OPEN_CREATE(updater_data.fsize, 0);
-    }
-    if (!sl_FsOpen((_u8 *)updater_data.path, AccessModeAndMaxSize, NULL, &updater_data.fhandle)) {
-        updater_data.foffset = 0;
-        result = true;
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-    return result;
-}
-
-bool updater_write (uint8_t *buf, uint32_t len) {
-    bool result = false;
-
-    sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-    if (len == sl_FsWrite(updater_data.fhandle, updater_data.foffset, buf, len)) {
-        updater_data.foffset += len;
-        result = true;
-    }
-    sl_LockObjUnlock (&wlan_LockObj);
-
-    return result;
-}
-
-void updater_finnish (void) {
-    _i32 fhandle;
-
-    if (updater_data.fhandle > 0) {
-        sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER);
-        // close the file being updated
-        sl_FsClose(updater_data.fhandle, NULL, NULL, 0);
-#ifdef WIPY
-        // if we still have an image pending for verification, leave the boot info as it is
-        if (!strncmp(IMG_PREFIX, updater_data.path, strlen(IMG_PREFIX)) && sBootInfo.Status != IMG_STATUS_CHECK) {
-#else
-        if (!strncmp(IMG_PREFIX, updater_data.path, strlen(IMG_PREFIX))) {
-#endif
-#ifdef DEBUG
-            if (!sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_READ, NULL, &fhandle)) {
-
-                ASSERT (sizeof(sBootInfo_t) == sl_FsRead(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-                sl_FsClose(fhandle, 0, 0, 0);
-#endif
-                // open the boot info file for writing
-                ASSERT (sl_FsOpen((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_WRITE, NULL, &fhandle) == 0);
-#ifdef DEBUG
-            }
-            else {
-                // the boot info file doesn't exist yet
-                _u32 BootInfoCreateFlag  = _FS_FILE_OPEN_FLAG_COMMIT | _FS_FILE_PUBLIC_WRITE | _FS_FILE_PUBLIC_READ;
-                ASSERT (sl_FsOpen ((unsigned char *)IMG_BOOT_INFO, FS_MODE_OPEN_CREATE((2 * sizeof(sBootInfo_t)),
-                                   BootInfoCreateFlag), NULL, &fhandle) == 0);
-            }
-#endif
-
-            // save the new boot info
-#ifdef WIPY
-            sBootInfo.PrevImg = sBootInfo.ActiveImg;
-            if (sBootInfo.ActiveImg == IMG_ACT_UPDATE1) {
-                sBootInfo.ActiveImg = IMG_ACT_UPDATE2;
-            } else {
-                sBootInfo.ActiveImg = IMG_ACT_UPDATE1;
-            }
-// the launchxl doesn't have enough flash space for 2 user updates
-#else
-            sBootInfo.PrevImg = IMG_ACT_FACTORY;
-            sBootInfo.ActiveImg = IMG_ACT_UPDATE1;
-#endif
-            sBootInfo.Status = IMG_STATUS_CHECK;
-            ASSERT (sizeof(sBootInfo_t) == sl_FsWrite(fhandle, 0, (unsigned char *)&sBootInfo, sizeof(sBootInfo_t)));
-            sl_FsClose(fhandle, 0, 0, 0);
-        }
-        sl_LockObjUnlock (&wlan_LockObj);
-        updater_data.fhandle = -1;
-    }
-    sl_LockObjUnlock (&updater_LockObj);
-}
-
diff --git a/ports/cc3200/ftp/updater.h b/ports/cc3200/ftp/updater.h
deleted file mode 100644
index 51248e4bf3bce..0000000000000
--- a/ports/cc3200/ftp/updater.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#ifndef MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
-#define MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
-
-extern void updater_pre_init (void);
-extern bool updater_check_path (void *path);
-extern bool updater_start (void);
-extern bool updater_write (uint8_t *buf, uint32_t len);
-extern void updater_finnish (void);
-extern bool updater_verify (uint8_t *rbuff, uint8_t *hasbuff);
-
-#endif // MICROPY_INCLUDED_CC3200_FTP_UPDATER_H
diff --git a/ports/cc3200/hal/adc.c b/ports/cc3200/hal/adc.c
deleted file mode 100644
index 23d219e1d93ac..0000000000000
--- a/ports/cc3200/hal/adc.c
+++ /dev/null
@@ -1,692 +0,0 @@
-//*****************************************************************************
-//
-//  adc.c
-//
-//  Driver for the ADC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup ADC_Analog_to_Digital_Converter_api
-//! @{
-//
-//*****************************************************************************
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_adc.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "adc.h"
-
-
-//*****************************************************************************
-//
-//! Enables the ADC
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function sets the ADC global enable
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCEnable(unsigned long ulBase)
-{
-  //
-  // Set the global enable bit in the control register.
-  //
-  HWREG(ulBase + ADC_O_ADC_CTRL) |= 0x1;
-}
-
-//*****************************************************************************
-//
-//! Disable the ADC
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function clears the ADC global enable
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDisable(unsigned long ulBase)
-{
-  //
-  // Clear the global enable bit in the control register.
-  //
-  HWREG(ulBase + ADC_O_ADC_CTRL) &= ~0x1 ;
-}
-
-//*****************************************************************************
-//
-//! Enables specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function enables specified ADC channel and configures the
-//! pin as analog pin.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCChannelEnable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulCh;
-
-  ulCh =  (ulChannel == ADC_CH_0)? 0x02 :
-          (ulChannel == ADC_CH_1)? 0x04 :
-          (ulChannel == ADC_CH_2)? 0x08 : 0x10;
-
-  HWREG(ulBase + ADC_O_ADC_CH_ENABLE) |= ulCh;
-}
-
-//*****************************************************************************
-//
-//! Disables specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channelsber
-//!
-//! This function disables specified ADC channel.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCChannelDisable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulCh;
-
-  ulCh =  (ulChannel == ADC_CH_0)? 0x02 :
-          (ulChannel == ADC_CH_1)? 0x04 :
-          (ulChannel == ADC_CH_2)? 0x08 : 0x10;
-
-  HWREG(ulBase + ADC_O_ADC_CH_ENABLE) &= ~ulCh;
-}
-
-//*****************************************************************************
-//
-//! Enables and registers ADC interrupt handler for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param pfnHandler is a pointer to the function to be called when the
-//! ADC channel interrupt occurs.
-//!
-//! This function enables and registers ADC interrupt handler for specified
-//! channel. Individual interrupt for each channel should be enabled using
-//! \sa ADCIntEnable(). It is the interrupt handler's responsibility to clear
-//! the interrupt source.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
-                    void (*pfnHandler)(void))
-{
-  unsigned long ulIntNo;
-
-  //
-  // Get the interrupt number associted with the specified channel
-  //
-  ulIntNo = (ulChannel == ADC_CH_0)? INT_ADCCH0 :
-            (ulChannel == ADC_CH_1)? INT_ADCCH1 :
-            (ulChannel == ADC_CH_2)? INT_ADCCH2 : INT_ADCCH3;
-
-  //
-  // Register the interrupt handler
-  //
-  IntRegister(ulIntNo,pfnHandler);
-
-  //
-  // Enable ADC interrupt
-  //
-  IntEnable(ulIntNo);
-}
-
-
-//*****************************************************************************
-//
-//! Disables and unregisters ADC interrupt handler for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function disables and unregisters ADC interrupt handler for specified
-//! channel. This function also masks off the interrupt in the interrupt
-//! controller so that the interrupt handler no longer is called.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulIntNo;
-
-  //
-  // Get the interrupt number associted with the specified channel
-  //
-  ulIntNo = (ulChannel == ADC_CH_0)? INT_ADCCH0 :
-            (ulChannel == ADC_CH_1)? INT_ADCCH1 :
-            (ulChannel == ADC_CH_2)? INT_ADCCH2 : INT_ADCCH3;
-
-  //
-  // Disable ADC interrupt
-  //
-  IntDisable(ulIntNo);
-
-  //
-  // Unregister the interrupt handler
-  //
-  IntUnregister(ulIntNo);
-}
-
-//*****************************************************************************
-//
-//! Enables individual interrupt sources for specified channel
-//!
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated ADC interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! - \b ADC_DMA_DONE for DMA done
-//! - \b ADC_FIFO_OVERFLOW for FIFO over flow
-//! - \b ADC_FIFO_UNDERFLOW for FIFO under flow
-//! - \b ADC_FIFO_EMPTY for FIFO empty
-//! - \b ADC_FIFO_FULL for FIFO full
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Enable DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk;
-  }
-
-  ulIntFlags = ulIntFlags &  0x0F;
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_en + ulChannel;
-
-  //
-  // Unmask the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) |= (ulIntFlags & 0xf);
-}
-
-
-//*****************************************************************************
-//
-//! Disables individual interrupt sources for specified channel
-//!
-//!
-//! \param ulBase is the base address of the ADC.
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function disables the indicated ADC interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The parameters\e ulIntFlags and \e ulChannel should be as explained in
-//! ADCIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntDisable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Disable DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk;
-  }
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_en + ulChannel;
-
-  //
-  // Unmask the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) &= ~ulIntFlags;
-}
-
-
-//*****************************************************************************
-//
-//! Gets the current channel interrupt status
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function returns the interrupt status of the specified ADC channel.
-//!
-//! The parameter \e ulChannel should be as explained in \sa ADCIntEnable().
-//!
-//! \return Return the ADC channel interrupt status,  enumerated as a bit
-//! field of values described in ADCIntEnable()
-//
-//*****************************************************************************
-unsigned long ADCIntStatus(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-  unsigned long ulIntStatus;
-
-  //
-  // Get DMA Done interrupt status
-  //
-  ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-            (ulChannel == ADC_CH_1)?0x00002000:
-            (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-  ulIntStatus = HWREG(APPS_CONFIG_BASE +
-                     APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED)& ulDmaMsk;
-
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_status + ulChannel;
-
-  //
-  // Read ADC interrupt status
-  //
-  ulIntStatus |= HWREG(ulBase + ulOffset) & 0xf;
-
-  //
-  // Return the current interrupt status
-  //
-  return(ulIntStatus);
-}
-
-
-//*****************************************************************************
-//
-//! Clears the current channel interrupt sources
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//! \param ulIntFlags is the bit mask of the interrupt sources to be cleared.
-//!
-//! This function clears individual interrupt source for the specified
-//! ADC channel.
-//!
-//! The parameter \e ulChannel should be as explained in \sa ADCIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCIntClear(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags)
-{
-  unsigned long ulOffset;
-  unsigned long ulDmaMsk;
-
-  //
-  // Clear DMA Done interrupt
-  //
-  if(ulIntFlags & ADC_DMA_DONE)
-  {
-     ulDmaMsk = (ulChannel == ADC_CH_0)?0x00001000:
-                (ulChannel == ADC_CH_1)?0x00002000:
-                (ulChannel == ADC_CH_2)?0x00004000:0x00008000;
-
-     HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk;
-  }
-
-  //
-  // Get the interrupt enable register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_irq_status + ulChannel;
-
-  //
-  // Clear the specified interrupts
-  //
-  HWREG(ulBase + ulOffset) = (ulIntFlags & ~(ADC_DMA_DONE));
-}
-
-//*****************************************************************************
-//
-//! Enables the ADC DMA operation for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function enables the DMA operation for specified ADC channel
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDMAEnable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulBitMask;
-
-  //
-  // Get the bit mask for enabling DMA for specified channel
-  //
-  ulBitMask = (ulChannel == ADC_CH_0)?0x01:
-              (ulChannel == ADC_CH_1)?0x04:
-              (ulChannel == ADC_CH_2)?0x10:0x40;
-
-  //
-  // Enable DMA request for the specified channel
-  //
-  HWREG(ulBase + ADC_O_adc_dma_mode_en) |= ulBitMask;
-}
-
-//*****************************************************************************
-//
-//! Disables the ADC DMA operation for specified channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels
-//!
-//! This function disables the DMA operation for specified ADC channel
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \return None.
-//
-//*****************************************************************************
-void ADCDMADisable(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulBitMask;
-
-  //
-  // Get the bit mask for disabling DMA for specified channel
-  //
-  ulBitMask = (ulChannel == ADC_CH_0)?0x01:
-              (ulChannel == ADC_CH_1)?0x04:
-              (ulChannel == ADC_CH_2)?0x10:0x40;
-
-  //
-  // Disable DMA request for the specified channel
-  //
-  HWREG(ulBase + ADC_O_adc_dma_mode_en) &= ~ulBitMask;
-}
-
-//*****************************************************************************
-//
-//! Configures the ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulValue is wrap arround value of the timer
-//!
-//! This function Configures the ADC internal timer. The ADC timer is a 17 bit
-//! used to timestamp the ADC data samples internally.
-//! User can read the timestamp along with the sample from the FIFO register(s).
-//! Each sample in the FIFO contains 14 bit actual data and 18 bit timestamp
-//!
-//! The parameter \e ulValue can take any value between 0 - 2^17
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerConfig(unsigned long ulBase, unsigned long ulValue)
-{
-  unsigned long ulReg;
-
-  //
-  // Read the currrent config
-  //
-  ulReg =  HWREG(ulBase + ADC_O_adc_timer_configuration);
-
-  //
-  // Mask and set timer count field
-  //
-  ulReg = ((ulReg & ~0x1FFFF) | (ulValue & 0x1FFFF));
-
-  //
-  // Set the timer count value
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) = ulReg;
-}
-
-//*****************************************************************************
-//
-//! Resets ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function resets 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerReset(unsigned long ulBase)
-{
-  //
-  // Reset the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) |= (1 << 24);
-}
-
-//*****************************************************************************
-//
-//! Enables ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function enables 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerEnable(unsigned long ulBase)
-{
-  //
-  // Enable the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) |= (1 << 25);
-}
-
-//*****************************************************************************
-//
-//! Disables ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function disables 17-bit ADC internal timer
-//!
-//! \returns None.
-//
-//*****************************************************************************
-void ADCTimerDisable(unsigned long ulBase)
-{
-  //
-  // Disable the timer
-  //
-  HWREG(ulBase + ADC_O_adc_timer_configuration) &= ~(1 << 25);
-}
-
-//*****************************************************************************
-//
-//! Gets the current value of ADC internal timer
-//!
-//! \param ulBase is the base address of the ADC
-//!
-//! This function the current value of 17-bit ADC internal timer
-//!
-//! \returns Return the current value of ADC internal timer.
-//
-//*****************************************************************************
-unsigned long ADCTimerValueGet(unsigned long ulBase)
-{
-  return(HWREG(ulBase + ADC_O_adc_timer_current_count));
-}
-
-//*****************************************************************************
-//
-//! Gets the current FIFO level for specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels.
-//!
-//! This function returns the current FIFO level for specified ADC channel.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \returns Return the current FIFO level for specified channel
-//
-//*****************************************************************************
-unsigned char ADCFIFOLvlGet(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-
-  //
-  // Get the fifo level register offset for specified channel
-  //
-  ulOffset = ADC_O_adc_ch0_fifo_lvl + ulChannel;
-
-  //
-  // Return FIFO level
-  //
-  return(HWREG(ulBase + ulOffset) & 0x7);
-}
-
-//*****************************************************************************
-//
-//! Reads FIFO for specified ADC channel
-//!
-//! \param ulBase is the base address of the ADC
-//! \param ulChannel is one of the valid ADC channels.
-//!
-//! This function returns one data sample from the channel fifo as specified by
-//! \e ulChannel parameter.
-//!
-//! The parameter \e ulChannel should be one of the following
-//!
-//! - \b ADC_CH_0 for channel 0
-//! - \b ADC_CH_1 for channel 1
-//! - \b ADC_CH_2 for channel 2
-//! - \b ADC_CH_3 for channel 3
-//!
-//! \returns Return one data sample from the channel fifo.
-//
-//*****************************************************************************
-unsigned long ADCFIFORead(unsigned long ulBase, unsigned long ulChannel)
-{
-  unsigned long ulOffset;
-
-  //
-  // Get the fifo register offset for specified channel
-  //
-  ulOffset = ADC_O_channel0FIFODATA + ulChannel;
-
-  //
-  // Return FIFO level
-  //
-  return(HWREG(ulBase + ulOffset));
-}
-
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/adc.h b/ports/cc3200/hal/adc.h
deleted file mode 100644
index 03e0ea52cf782..0000000000000
--- a/ports/cc3200/hal/adc.h
+++ /dev/null
@@ -1,117 +0,0 @@
-//*****************************************************************************
-//
-//  adc.h
-//
-//  Defines and Macros for the ADC.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __ADC_H__
-#define __ADC_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// Values that can be passed to APIs as ulChannel parameter
-//*****************************************************************************
-#define ADC_CH_0   0x00000000
-#define ADC_CH_1   0x00000008
-#define ADC_CH_2   0x00000010
-#define ADC_CH_3   0x00000018
-
-
-//*****************************************************************************
-//
-// Values that can be passed to ADCIntEnable(), ADCIntDisable()
-// and ADCIntClear() as ulIntFlags, and returned from ADCIntStatus()
-//
-//*****************************************************************************
-#define ADC_DMA_DONE        0x00000010
-#define ADC_FIFO_OVERFLOW   0x00000008
-#define ADC_FIFO_UNDERFLOW  0x00000004
-#define ADC_FIFO_EMPTY      0x00000002
-#define ADC_FIFO_FULL       0x00000001
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void ADCEnable(unsigned long ulBase);
-extern void ADCDisable(unsigned long ulBase);
-extern void ADCChannelEnable(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCChannelDisable(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCIntRegister(unsigned long ulBase, unsigned long ulChannel,
-                    void (*pfnHandler)(void));
-extern void ADCIntUnregister(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCIntEnable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern void ADCIntDisable(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern unsigned long ADCIntStatus(unsigned long ulBase,unsigned long ulChannel);
-extern void ADCIntClear(unsigned long ulBase, unsigned long ulChannel,
-                  unsigned long ulIntFlags);
-extern void ADCDMAEnable(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCDMADisable(unsigned long ulBase, unsigned long ulChannel);
-extern void ADCTimerConfig(unsigned long ulBase, unsigned long ulValue);
-extern void ADCTimerEnable(unsigned long ulBase);
-extern void ADCTimerDisable(unsigned long ulBase);
-extern void ADCTimerReset(unsigned long ulBase);
-extern unsigned long ADCTimerValueGet(unsigned long ulBase);
-extern unsigned char ADCFIFOLvlGet(unsigned long ulBase,
-                                   unsigned long ulChannel);
-extern unsigned long ADCFIFORead(unsigned long ulBase,
-                                   unsigned long ulChannel);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __ADC_H__
-
diff --git a/ports/cc3200/hal/aes.c b/ports/cc3200/hal/aes.c
deleted file mode 100644
index e0e129ef5f754..0000000000000
--- a/ports/cc3200/hal/aes.c
+++ /dev/null
@@ -1,1360 +0,0 @@
-//*****************************************************************************
-//
-//  aes.c
-//
-//  Driver for the AES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup AES_Advanced_Encryption_Standard_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_aes.h"
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_types.h"
-#include "aes.h"
-#include "debug.h"
-#include "interrupt.h"
-
-#define AES_BLOCK_SIZE_IN_BYTES 16
-
-//*****************************************************************************
-//
-//! Configures the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Config is the configuration of the AES module.
-//!
-//! This function configures the AES module based on the specified parameters.
-//! It does not change any DMA- or interrupt-related parameters.
-//!
-//! The ui32Config parameter is a bit-wise OR of a number of configuration
-//! flags. The valid flags are grouped based on their function.
-//!
-//! The direction of the operation is specified with only of following flags:
-//!
-//! - \b AES_CFG_DIR_ENCRYPT - Encryption mode
-//! - \b AES_CFG_DIR_DECRYPT - Decryption mode
-//!
-//! The key size is specified with only one of the following flags:
-//!
-//! - \b AES_CFG_KEY_SIZE_128BIT - Key size of 128 bits
-//! - \b AES_CFG_KEY_SIZE_192BIT - Key size of 192 bits
-//! - \b AES_CFG_KEY_SIZE_256BIT - Key size of 256 bits
-//!
-//! The mode of operation is specified with only one of the following flags.
-//!
-//! - \b AES_CFG_MODE_ECB - Electronic codebook mode
-//! - \b AES_CFG_MODE_CBC - Cipher-block chaining mode
-//! - \b AES_CFG_MODE_CFB - Cipher feedback mode
-//! - \b AES_CFG_MODE_CTR - Counter mode
-//! - \b AES_CFG_MODE_ICM - Integer counter mode
-//! - \b AES_CFG_MODE_XTS - Ciphertext stealing mode
-//! - \b AES_CFG_MODE_XTS_TWEAKJL - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with previous/intermediate tweak value and j loaded
-//! - \b AES_CFG_MODE_XTS_K2IJL - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with key2, i and j loaded
-//! - \b AES_CFG_MODE_XTS_K2ILJ0 - XEX-based tweaked-codebook mode with
-//! ciphertext stealing with key2 and i loaded, j = 0
-//! - \b AES_CFG_MODE_F8 - F8 mode
-//! - \b AES_CFG_MODE_F9 - F9 mode
-//! - \b AES_CFG_MODE_CBCMAC - Cipher block chaining message authentication
-//! code mode
-//! - \b AES_CFG_MODE_GCM - Galois/counter mode
-//! - \b AES_CFG_MODE_GCM_HLY0ZERO - Galois/counter mode with GHASH with H
-//! loaded and Y0-encrypted forced to zero
-//! - \b AES_CFG_MODE_GCM_HLY0CALC - Galois/counter mode with GHASH with H
-//! loaded and Y0-encrypted calculated internally
-//! - \b AES_CFG_MODE_GCM_HY0CALC - Galois/Counter mode with autonomous GHASH
-//! (both H and Y0-encrypted calculated internally)
-//! - \b AES_CFG_MODE_CCM - Counter with CBC-MAC mode
-//!
-//! The following defines are used to specify the counter width.  It is only
-//! required to be defined when using CTR, CCM, or GCM modes, only one of the
-//! following defines must be used to specify the counter width length:
-//!
-//! - \b AES_CFG_CTR_WIDTH_32 - Counter is 32 bits
-//! - \b AES_CFG_CTR_WIDTH_64 - Counter is 64 bits
-//! - \b AES_CFG_CTR_WIDTH_96 - Counter is 96 bits
-//! - \b AES_CFG_CTR_WIDTH_128 - Counter is 128 bits
-//!
-//! Only one of the following defines must be used to specify the length field
-//! for CCM operations (L):
-//!
-//! - \b AES_CFG_CCM_L_2 - 2 bytes
-//! - \b AES_CFG_CCM_L_4 - 4 bytes
-//! - \b AES_CFG_CCM_L_8 - 8 bytes
-//!
-//! Only one of the following defines must be used to specify the length of the
-//! authentication field for CCM operations (M) through the \e ui32Config
-//! argument in the AESConfigSet() function:
-//!
-//! - \b AES_CFG_CCM_M_4 - 4 bytes
-//! - \b AES_CFG_CCM_M_6 - 6 bytes
-//! - \b AES_CFG_CCM_M_8 - 8 bytes
-//! - \b AES_CFG_CCM_M_10 - 10 bytes
-//! - \b AES_CFG_CCM_M_12 - 12 bytes
-//! - \b AES_CFG_CCM_M_14 - 14 bytes
-//! - \b AES_CFG_CCM_M_16 - 16 bytes
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Config & AES_CFG_DIR_ENCRYPT) ||
-           (ui32Config & AES_CFG_DIR_DECRYPT));
-    ASSERT((ui32Config & AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Config & AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Config & AES_CFG_KEY_SIZE_256BIT));
-    ASSERT((ui32Config & AES_CFG_MODE_ECB) ||
-           (ui32Config & AES_CFG_MODE_CBC) ||
-           (ui32Config & AES_CFG_MODE_CTR) ||
-           (ui32Config & AES_CFG_MODE_ICM) ||
-           (ui32Config & AES_CFG_MODE_CFB) ||
-           (ui32Config & AES_CFG_MODE_XTS_TWEAKJL) ||
-           (ui32Config & AES_CFG_MODE_XTS_K2IJL) ||
-           (ui32Config & AES_CFG_MODE_XTS_K2ILJ0) ||
-           (ui32Config & AES_CFG_MODE_F8) ||
-           (ui32Config & AES_CFG_MODE_F9) ||
-           (ui32Config & AES_CFG_MODE_CTR) ||
-           (ui32Config & AES_CFG_MODE_CBCMAC) ||
-           (ui32Config & AES_CFG_MODE_GCM_HLY0ZERO) ||
-           (ui32Config & AES_CFG_MODE_GCM_HLY0CALC) ||
-           (ui32Config & AES_CFG_MODE_GCM_HY0CALC) ||
-           (ui32Config & AES_CFG_MODE_CCM));
-    ASSERT(((ui32Config & AES_CFG_MODE_CTR) ||
-            (ui32Config & AES_CFG_MODE_GCM_HLY0ZERO) ||
-            (ui32Config & AES_CFG_MODE_GCM_HLY0CALC) ||
-            (ui32Config & AES_CFG_MODE_GCM_HY0CALC) ||
-            (ui32Config & AES_CFG_MODE_CCM)) &&
-           ((ui32Config & AES_CFG_CTR_WIDTH_32) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_64) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_96) ||
-            (ui32Config & AES_CFG_CTR_WIDTH_128)));
-    ASSERT((ui32Config & AES_CFG_MODE_CCM) &&
-           ((ui32Config & AES_CFG_CCM_L_2) ||
-            (ui32Config & AES_CFG_CCM_L_4) ||
-            (ui32Config & AES_CFG_CCM_L_8)) &&
-           ((ui32Config & AES_CFG_CCM_M_4) ||
-            (ui32Config & AES_CFG_CCM_M_6) ||
-            (ui32Config & AES_CFG_CCM_M_8) ||
-            (ui32Config & AES_CFG_CCM_M_10) ||
-            (ui32Config & AES_CFG_CCM_M_12) ||
-            (ui32Config & AES_CFG_CCM_M_14) ||
-            (ui32Config & AES_CFG_CCM_M_16)));
-
-    //
-    // Backup the save context field before updating the register.
-    //
-    if(HWREG(ui32Base + AES_O_CTRL) & AES_CTRL_SAVE_CONTEXT)
-    {
-        ui32Config |= AES_CTRL_SAVE_CONTEXT;
-    }
-
-    //
-    // Write the CTRL register with the new value
-    //
-    HWREG(ui32Base + AES_O_CTRL) = ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Writes the key 1 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is an array of bytes, containing the key to be
-//! configured.  The least significant word in the 0th index.
-//! \param ui32Keysize is the size of the key, which must be one of the
-//! following values:  \b AES_CFG_KEY_SIZE_128, \b AES_CFG_KEY_SIZE_192, or
-//! \b AES_CFG_KEY_SIZE_256.
-//!
-//! This function writes key 1 configuration registers based on the key
-//! size.  This function is used in all modes.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key, uint32_t ui32Keysize)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Keysize == AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_256BIT));
-
-    //
-    // With all key sizes, the first 4 words are written.
-    //
-    HWREG(ui32Base + AES_O_KEY1_0) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY1_1) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY1_2) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY1_3) = * ((uint32_t *)(pui8Key + 12));
-
-    //
-    // The key is 192 or 256 bits.  Write the next 2 words.
-    //
-    if(ui32Keysize != AES_CFG_KEY_SIZE_128BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY1_4) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + AES_O_KEY1_5) = * ((uint32_t *)(pui8Key + 20));
-    }
-
-    //
-    // The key is 256 bits.  Write the last 2 words.
-    //
-    if(ui32Keysize == AES_CFG_KEY_SIZE_256BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY1_6) = * ((uint32_t *)(pui8Key + 24));
-        HWREG(ui32Base + AES_O_KEY1_7) = * ((uint32_t *)(pui8Key + 28));
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes the key 2 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is an array of bytes, containing the key to be
-//! configured.  The least significant word in the 0th index.
-//! \param ui32Keysize is the size of the key, which must be one of the
-//! following values:  \b AES_CFG_KEY_SIZE_128, \b AES_CFG_KEY_SIZE_192, or
-//! \b AES_CFG_KEY_SIZE_256.
-//!
-//! This function writes the key 2 configuration registers based on the key
-//! size.  This function is used in the F8, F9, XTS, CCM, and CBC-MAC modes.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key, uint32_t ui32Keysize)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Keysize == AES_CFG_KEY_SIZE_128BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_192BIT) ||
-           (ui32Keysize == AES_CFG_KEY_SIZE_256BIT));
-
-    //
-    // With all key sizes, the first 4 words are written.
-    //
-    HWREG(ui32Base + AES_O_KEY2_0) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY2_1) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY2_2) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY2_3) = * ((uint32_t *)(pui8Key + 12));
-
-    //
-    // The key is 192 or 256 bits.  Write the next 2 words.
-    //
-    if(ui32Keysize != AES_CFG_KEY_SIZE_128BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY2_4) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + AES_O_KEY2_5) = * ((uint32_t *)(pui8Key + 20));
-    }
-
-    //
-    // The key is 256 bits.  Write the last 2 words.
-    //
-    if(ui32Keysize == AES_CFG_KEY_SIZE_256BIT)
-    {
-        HWREG(ui32Base + AES_O_KEY2_6) = * ((uint32_t *)(pui8Key + 24));
-        HWREG(ui32Base + AES_O_KEY2_7) = * ((uint32_t *)(pui8Key + 28));
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes key 3 configuration registers, which are used for encryption or
-//! decryption.
-//!
-//! \param ui32Base is the base address for the AES module.
-//! \param pui8Key is a pointer to an array bytes, containing
-//! the key to be configured. The least significant word is in the 0th index.
-//!
-//! This function writes the key 2 configuration registers with key 3 data
-//! used in CBC-MAC and F8 modes.  This key is always 128 bits.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the key into the upper 4 key registers
-    //
-    HWREG(ui32Base + AES_O_KEY2_4) = * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + AES_O_KEY2_5) = * ((uint32_t *)(pui8Key + 4));
-    HWREG(ui32Base + AES_O_KEY2_6) = * ((uint32_t *)(pui8Key + 8));
-    HWREG(ui32Base + AES_O_KEY2_7) = * ((uint32_t *)(pui8Key + 12));
-}
-
-//*****************************************************************************
-//
-//! Writes the Initial Vector (IV) register, needed in some of the AES Modes.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8IVdata is an array of 16 bytes (128 bits), containing the IV
-//! value to be configured. The least significant word is in the 0th index.
-//!
-//! This functions writes the initial vector registers in the AES module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the initial vector registers.
-    //
-    HWREG(ui32Base + AES_O_IV_IN_0) = *((uint32_t *)(pui8IVdata+0));
-    HWREG(ui32Base + AES_O_IV_IN_1) = *((uint32_t *)(pui8IVdata+4));
-    HWREG(ui32Base + AES_O_IV_IN_2) = *((uint32_t *)(pui8IVdata+8));
-    HWREG(ui32Base + AES_O_IV_IN_3) = *((uint32_t *)(pui8IVdata+12));
-}
-
-
-//*****************************************************************************
-//
-//! Reads the Initial Vector (IV) register, needed in some of the AES Modes.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8IVdata is pointer to an array of 16 bytes.
-//!
-//! This functions reads the initial vector registers in the AES module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the initial vector registers.
-    //
-    *((uint32_t *)(pui8IVdata+ 0)) = HWREG(ui32Base + AES_O_IV_IN_0);
-    *((uint32_t *)(pui8IVdata+ 4)) = HWREG(ui32Base + AES_O_IV_IN_1);
-    *((uint32_t *)(pui8IVdata+ 8)) = HWREG(ui32Base + AES_O_IV_IN_2);
-    *((uint32_t *)(pui8IVdata+12)) = HWREG(ui32Base + AES_O_IV_IN_3);
-}
-
-//*****************************************************************************
-//
-//! Saves the tag registers to a user-defined location.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8TagData is pointer to the location that stores the tag data.
-//!
-//! This function stores the tag data for use authenticated encryption and
-//! decryption operations.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Read the tag data.
-    //
-    *((uint32_t *)(pui8TagData+0)) = HWREG((ui32Base + AES_O_TAG_OUT_0));
-    *((uint32_t *)(pui8TagData+4)) = HWREG((ui32Base + AES_O_TAG_OUT_1));
-    *((uint32_t *)(pui8TagData+8)) = HWREG((ui32Base + AES_O_TAG_OUT_2));
-    *((uint32_t *)(pui8TagData+12)) = HWREG((ui32Base + AES_O_TAG_OUT_3));
-}
-
-//*****************************************************************************
-//
-//! Used to set the write crypto data length in the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui64Length is the crypto data length in bytes.
-//!
-//! This function stores the cryptographic data length in blocks for all modes.
-//! Data lengths up to (2^61 - 1) bytes are allowed.  For GCM, any value up
-//! to (2^36 - 2) bytes are allowed because a 32-bit block counter is used.  For
-//! basic modes (ECB/CBC/CTR/ICM/CFB128), zero can be programmed into the
-//! length field, indicating that the length is infinite.
-//!
-//! When this function is called, the engine is triggered to start using
-//! this context.
-//!
-//! \note This length does not include the authentication-only data used in
-//! some modes.  Use the AESAuthLengthSet() function to specify the
-//! authentication data length.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register by shifting the 64-bit ui64Length.
-    //
-    HWREG(ui32Base + AES_O_C_LENGTH_0) = (uint32_t)(ui64Length);
-    HWREG(ui32Base + AES_O_C_LENGTH_1) = (uint32_t)(ui64Length >> 32);
-}
-
-//*****************************************************************************
-//
-//! Sets the optional additional authentication data (AAD) length.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Length is the length in bytes.
-//!
-//! This function is only used to write the authentication data length in the
-//! combined modes (GCM or CCM) and XTS mode.  Supported AAD lengths for CCM
-//! are from 0 to (2^16 - 28) bytes.  For GCM, any value up to (2^32 - 1) can
-//! be used.  For XTS mode, this register is used to load j.  Loading of j is
-//! only required if j != 0.  j represents the sequential number of the 128-bit
-//! blocks inside the data unit.  Consequently, j must be multiplied by 16
-//! when passed to this function, thereby placing the block number in
-//! bits [31:4] of the register.
-//!
-//! When this function is called, the engine is triggered to start using
-//! this context for GCM and CCM.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length into the register.
-    //
-    HWREG(ui32Base + AES_O_AUTH_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers without blocking.
-//! This api writes data in blocks
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Dest is a pointer to an array of words of data.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function reads a block of either plaintext or ciphertext out of the
-//! AES module.  If the output data is not ready, the function returns
-//! false.  If the read completed successfully, the function returns true.
-//! A block is 16 bytes or 4 words.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[4];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-    {
-       	return(false);
-    }
-
-    //
-    // Check if the output is ready before reading the data.  If it not ready,
-    // return false.
-    //
-    if((AES_CTRL_OUTPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Read a block of data from the data registers
-    //
-    pui32Dest[0] = HWREG(ui32Base + AES_O_DATA_IN_3);
-    pui32Dest[1] = HWREG(ui32Base + AES_O_DATA_IN_2);
-    pui32Dest[2] = HWREG(ui32Base + AES_O_DATA_IN_1);
-    pui32Dest[3] = HWREG(ui32Base + AES_O_DATA_IN_0);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-     	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-    //
-    // Read successful, return true.
-    //
-    return(true);
-}
-
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers with blocking.
-//! This api writes data in blocks
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Dest is a pointer to an array of words.
-//! \param ui8Length is the length of data in bytes to be read.
-//!        ui8Length can be from 1 to 16
-//!
-//! This function reads a block of either plaintext or ciphertext out of the
-//! AES module.  If the output is not ready, the function waits until it
-//! is ready. A block is 16 bytes or 4 words.
-//!
-//! \return None.
-//
-//*****************************************************************************
-
-void
-AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[4];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-   	{
-       	return;
-    }
-
-
-    //
-    // Wait for the output to be ready before reading the data.
-    //
-    while((AES_CTRL_OUTPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read a block of data from the data registers
-    //
-    pui32Dest[0] = HWREG(ui32Base + AES_O_DATA_IN_3);
-    pui32Dest[1] = HWREG(ui32Base + AES_O_DATA_IN_2);
-    pui32Dest[2] = HWREG(ui32Base + AES_O_DATA_IN_1);
-    pui32Dest[3] = HWREG(ui32Base + AES_O_DATA_IN_0);
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-   	{
-    	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-   	}
-
-    return;
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to an array of words of data.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function writes a block of either plaintext or ciphertext into the
-//! AES module.  If the input is not ready, the function returns false
-//! If the write completed successfully, the function returns true.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Src[4]={0,0,0,0};
-	uint8_t ui8BytCnt;
-	uint8_t *pui8SrcTemp;
-
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-   	{
-      	return(false);
-    }
-
-    //
-    // Check if the input is ready.  If not, then return false.
-    //
-    if(!(AES_CTRL_INPUT_READY & (HWREG(ui32Base + AES_O_CTRL))))
-    {
-        return(false);
-    }
-
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-	{
-		*(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-	}
-    //
-    // Write a block of data into the data registers.
-    //
-    HWREG(ui32Base + AES_O_DATA_IN_3) = pui32Src[0];
-    HWREG(ui32Base + AES_O_DATA_IN_2) = pui32Src[1];
-    HWREG(ui32Base + AES_O_DATA_IN_1) = pui32Src[2];
-    HWREG(ui32Base + AES_O_DATA_IN_0) = pui32Src[3];
-
-    //
-    // Write successful, return true.
-    //
-    return(true);
-}
-
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers with blocking.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 16
-//!
-//! This function writes a block of either plaintext or ciphertext into the
-//! AES module.  If the input is not ready, the function waits until it is
-//! ready before performing the write.
-//!
-//! \return None.
-//
-//*****************************************************************************
-
-void
-AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Src[4]={0,0,0,0};
-	uint8_t ui8BytCnt;
-	uint8_t *pui8SrcTemp;
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    if((ui8Length == 0)||(ui8Length>16))
-	{
-    	return;
-	}
-    //
-    // Wait for input ready.
-    //
-    while((AES_CTRL_INPUT_READY & (HWREG(ui32Base + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-   	{
-   		*(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-   	}
-
-    //
-    // Write a block of data into the data registers.
-    //
-    HWREG(ui32Base + AES_O_DATA_IN_3) = pui32Src[0];
-    HWREG(ui32Base + AES_O_DATA_IN_2) = pui32Src[1];
-    HWREG(ui32Base + AES_O_DATA_IN_1) = pui32Src[2];
-    HWREG(ui32Base + AES_O_DATA_IN_0) = pui32Src[3];
-}
-
-
-//*****************************************************************************
-//
-//! Used to process(transform) blocks of data, either encrypt or decrypt it.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored.
-//! \param pui8Dest is a pointer to the memory location output is written.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//!
-//! This function iterates the encryption or decryption mechanism number over
-//! the data length.  Before calling this function, ensure that the AES
-//! module is properly configured the key, data size, mode, etc.  Only ECB,
-//! CBC, CTR, ICM, CFB, XTS and F8 operating modes should be used.  The data
-//! is processed in 4-word (16-byte) blocks.
-//!
-//! \note This function only supports values of \e ui32Length less than 2^32,
-//! because the memory size is restricted to between 0 to 2^32 bytes.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-               uint32_t ui32Length)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register first, which triggers the engine to start
-    // using this context.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/16;
-    for(ui32Count = 0; ui32Count < ui32BlkCount; ui32Count += 1)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8Src + (ui32Count*16) ,16);
-
-        //
-        // Read the data registers.
-        //
-        AESDataRead(ui32Base, pui8Dest + (ui32Count*16) ,16);
-
-    }
-
-    //
-    //Now handle the residue bytes
-    //
-    ui32ByteCount = ui32Length%16;
-    if(ui32ByteCount)
-    {
-    	//
-    	// Write the data registers.
-    	//
-    	AESDataWrite(ui32Base, pui8Src + (16*ui32BlkCount) ,ui32ByteCount);
-
-    	//
-    	// Read the data registers.
-    	//
-        AESDataRead(ui32Base, pui8Dest + (16*ui32BlkCount) ,ui32ByteCount);
-    }
-
-
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-//*****************************************************************************
-//
-//! Used to generate message authentication code (MAC) using CBC-MAC and F9 mode.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored.
-//! \param ui32Length  is the length of the cryptographic data in bytes.
-//! \param pui8Tag is a pointer to a 4-word array where the hash tag is
-//! written.
-//!
-//! This function processes data to produce a hash tag that can be used tor
-//! authentication.   Before calling this function, ensure that the AES
-//! module is properly configured the key, data size, mode, etc.  Only
-//! CBC-MAC and F9 modes should be used.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src, uint32_t ui32Length,
-            uint8_t *pui8Tag)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Write the length register first, which triggers the engine to start
-    // using this context.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Write the data registers.
-    //
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/16;
-    for(ui32Count = 0; ui32Count < ui32BlkCount; ui32Count += 1)
-    {
-	   //
-	   // Write the data registers.
-	   //
-	   AESDataWrite(ui32Base, pui8Src + ui32Count*16 ,16);
-    }
-
-    //
-    //Now handle the residue bytes
-    //
-    ui32ByteCount = ui32Length%16;
-    if(ui32ByteCount)
-    {
-	   //
-	   // Write the data registers.
-	   //
-	   AESDataWrite(ui32Base, pui8Src + (ui32Count*ui32BlkCount) ,ui32ByteCount);
-    }
-
-    //
-    // Wait for the context data regsiters to be ready.
-    //
-    while((AES_CTRL_SVCTXTRDY & (HWREG(AES_BASE + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read the hash tag value.
-    //
-    AESTagRead(AES_BASE, pui8Tag);
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Used for Authenticated encryption (AE) of the data. Processes and authenticates blocks of data,
-//! either encrypt the data or decrypt the data.
-//!
-//! \param ui32Base  is the base address of the AES module.
-//! \param pui8Src is a pointer to the memory location where the input data
-//! is stored. The data must be padded to the 16-byte boundary.
-//! \param pui8Dest is a pointer to the memory location output is written.
-//! The space for written data must be rounded up to the 16-byte boundary.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//! \param pui8AuthSrc is a pointer to the memory location where the
-//! additional authentication data is stored.  The data must be padded to the
-//! 16-byte boundary.
-//! \param ui32AuthLength is the length of the additional authentication
-//! data in bytes.
-//! \param pui8Tag is a pointer to a 4-word array where the hash tag is
-//! written.
-//!
-//! This function encrypts or decrypts blocks of data in addition to
-//! authentication data.  A hash tag is also produced.  Before calling this
-//! function, ensure that the AES module is properly configured the key,
-//! data size, mode, etc.  Only CCM and GCM modes should be used.
-//!
-//! \return Returns true if data was processed successfully.  Returns false
-//! if data processing failed.
-//
-//*****************************************************************************
-bool
-AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-                   uint32_t ui32Length, uint8_t *pui8AuthSrc,
-                   uint32_t ui32AuthLength, uint8_t *pui8Tag)
-{
-    uint32_t ui32Count;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Set the data length.
-    //
-    AESDataLengthSet(AES_BASE, (uint64_t) ui32Length);
-
-    //
-    // Set the additional authentication data length.
-    //
-    AESAuthDataLengthSet(AES_BASE, ui32AuthLength);
-
-    //
-    // Now loop until the authentication data blocks are written.
-    //
-    for(ui32Count = 0; ui32Count < ui32AuthLength; ui32Count += 16)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8AuthSrc + (ui32Count),16);
-    }
-
-    //
-    // Now loop until the data blocks are written.
-    //
-    for(ui32Count = 0; ui32Count < ui32Length; ui32Count += 16)
-    {
-        //
-        // Write the data registers.
-        //
-        AESDataWrite(ui32Base, pui8Src + (ui32Count),16);
-
-        //
-        //
-        // Read the data registers.
-        //
-        AESDataRead(ui32Base, pui8Dest + (ui32Count),16);
-    }
-
-    //
-    // Wait for the context data regsiters to be ready.
-    //
-    while((AES_CTRL_SVCTXTRDY & (HWREG(AES_BASE + AES_O_CTRL))) == 0)
-    {
-    }
-
-    //
-    // Read the hash tag value.
-    //
-    AESTagRead(AES_BASE, pui8Tag);
-
-    //
-    // Return true to indicate successful completion of the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Returns the current AES module interrupt status.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! \return Returns a bit mask of the interrupt sources, which is a logical OR
-//! of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt.
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//
-//*****************************************************************************
-uint32_t
-AESIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    uint32_t ui32Temp;
-    uint32_t ui32IrqEnable;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Read the IRQ status register and return the value.
-    //
-    if(bMasked)
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_AES_MIS);
-        ui32IrqEnable = HWREG(ui32Base + AES_O_IRQENABLE);
-        return((HWREG(ui32Base + AES_O_IRQSTATUS) &
-                ui32IrqEnable) | ((ui32Temp & 0x0000000F) << 16));
-    }
-    else
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_AES_RIS);
-        return(HWREG(ui32Base + AES_O_IRQSTATUS) |
-               ((ui32Temp & 0x0000000F) << 16));
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to enable.
-//!
-//! This function enables the interrupts in the AES module. The \e ui32IntFlags
-//! parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note Interrupts that have been previously been enabled are not disabled
-//! when this function is called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DATA_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    //
-    // Set the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM) &= ~((ui32IntFlags & 0x000F0000) >> 16);
-    HWREG(ui32Base + AES_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-}
-
-//*****************************************************************************
-//
-//! Disables AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to disable.
-//!
-//! This function disables the interrupt sources in the AES module. The
-//! \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_CONTEXT_IN - Context interrupt
-//! - \b AES_INT_CONTEXT_OUT - Authentication tag (and IV) interrupt
-//! - \b AES_INT_DATA_IN - Data input interrupt
-//! - \b AES_INT_DATA_OUT - Data output interrupt
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note The DMA done interrupts are the only interrupts that can be cleared.
-//! The remaining interrupts can be disabled instead using AESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DATA_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    //
-    // Clear the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM) |= ((ui32IntFlags & 0x000F0000) >> 16);
-    HWREG(ui32Base + AES_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-}
-
-//*****************************************************************************
-//
-//! Clears AES module interrupts.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to disable.
-//!
-//! This function clears the interrupt sources in the AES module.  The
-//! \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b AES_INT_DMA_CONTEXT_OUT - Authentication tag (and IV) DMA done
-//! interrupt
-//! - \b AES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b AES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \note Only the DMA done interrupts can be cleared.  The remaining
-//! interrupts should be disabled with AESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32IntFlags == AES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags == AES_INT_DMA_CONTEXT_OUT) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags == AES_INT_DMA_DATA_OUT));
-
-    HWREG(DTHE_BASE + DTHE_O_AES_IC) = ((ui32IntFlags >> 16) & 0x0000000F);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled AES interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables AES interrupts on the interrupt controller; specific AES
-//! interrupt sources must be enabled using AESIntEnable().  The interrupt
-//! handler being registered must clear the source of the interrupt using
-//! AESIntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() is used to enable AES interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_AES, pfnHandler);
-
-    //
-    // Enable the interrupt
-    //
-    IntEnable(INT_AES);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESIntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_AES);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_AES);
-}
-
-//*****************************************************************************
-//
-//! Enables uDMA requests for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Flags is a bit mask of the uDMA requests to be enabled.
-//!
-//! This function enables the uDMA request sources in the AES module.
-//! The \e ui32Flags parameter is the logical OR of any of the following:
-//!
-//! - \b AES_DMA_DATA_IN
-//! - \b AES_DMA_DATA_OUT
-//! - \b AES_DMA_CONTEXT_IN
-//! - \b AES_DMA_CONTEXT_OUT
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Flags == AES_DMA_DATA_IN) ||
-           (ui32Flags == AES_DMA_DATA_OUT) ||
-           (ui32Flags == AES_DMA_CONTEXT_IN) ||
-           (ui32Flags == AES_DMA_CONTEXT_OUT));
-
-    //
-    // Set the flags in the current register value.
-    //
-    HWREG(ui32Base + AES_O_SYSCONFIG) |= ui32Flags;
-}
-
-//*****************************************************************************
-//
-//! Disables uDMA requests for the AES module.
-//!
-//! \param ui32Base is the base address of the AES module.
-//! \param ui32Flags is a bit mask of the uDMA requests to be disabled.
-//!
-//! This function disables the uDMA request sources in the AES module.
-//! The \e ui32Flags parameter is the logical OR of any of the
-//! following:
-//!
-//! - \b AES_DMA_DATA_IN
-//! - \b AES_DMA_DATA_OUT
-//! - \b AES_DMA_CONTEXT_IN
-//! - \b AES_DMA_CONTEXT_OUT
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == AES_BASE);
-    ASSERT((ui32Flags == AES_DMA_DATA_IN) ||
-           (ui32Flags == AES_DMA_DATA_OUT) ||
-           (ui32Flags == AES_DMA_CONTEXT_IN) ||
-           (ui32Flags == AES_DMA_CONTEXT_OUT));
-
-    //
-    // Clear the flags in the current register value.
-    //
-    HWREG(ui32Base + AES_O_SYSCONFIG) &= ~ui32Flags;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/aes.h b/ports/cc3200/hal/aes.h
deleted file mode 100644
index 766d3587e4fc3..0000000000000
--- a/ports/cc3200/hal/aes.h
+++ /dev/null
@@ -1,218 +0,0 @@
-//*****************************************************************************
-//
-//  aes.h
-//
-//  Defines and Macros for the AES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_AES_H__
-#define __DRIVERLIB_AES_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used to specify the operation direction in the
-// ui32Config argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_DIR_ENCRYPT     0x00000004
-#define AES_CFG_DIR_DECRYPT     0x00000000
-
-//*****************************************************************************
-//
-// The following defines are used to specify the key size in the ui32Config
-// argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_KEY_SIZE_128BIT 0x00000008
-#define AES_CFG_KEY_SIZE_192BIT 0x00000010
-#define AES_CFG_KEY_SIZE_256BIT 0x00000018
-
-//*****************************************************************************
-//
-// The following defines are used to specify the mode of operation in the
-// ui32Config argument in the AESConfig function.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_MODE_M          0x2007fe60
-#define AES_CFG_MODE_ECB        0x00000000
-#define AES_CFG_MODE_CBC        0x00000020
-#define AES_CFG_MODE_CTR        0x00000040
-#define AES_CFG_MODE_ICM        0x00000200
-#define AES_CFG_MODE_CFB        0x00000400
-#define AES_CFG_MODE_XTS_TWEAKJL \
-                                0x00000800
-#define AES_CFG_MODE_XTS_K2IJL \
-                                0x00001000
-#define AES_CFG_MODE_XTS_K2ILJ0 \
-                                0x00001800
-#define AES_CFG_MODE_F8         0x00002000
-#define AES_CFG_MODE_F9         0x20004000
-#define AES_CFG_MODE_CBCMAC     0x20008000
-#define AES_CFG_MODE_GCM_HLY0ZERO \
-                                0x20010040
-#define AES_CFG_MODE_GCM_HLY0CALC \
-                                0x20020040
-#define AES_CFG_MODE_GCM_HY0CALC \
-                                0x20030040
-#define AES_CFG_MODE_CCM        0x20040040
-
-//*****************************************************************************
-//
-// The following defines are used to specify the counter width in the
-// ui32Config argument in the AESConfig function.  It is only required to
-// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CTR_WIDTH_32    0x00000000
-#define AES_CFG_CTR_WIDTH_64    0x00000080
-#define AES_CFG_CTR_WIDTH_96    0x00000100
-#define AES_CFG_CTR_WIDTH_128   0x00000180
-
-//*****************************************************************************
-//
-// The following defines are used to define the width of the length field for
-// CCM operation through the ui32Config argument in the AESConfig function.
-// This value is also known as L.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CCM_L_2         0x00080000
-#define AES_CFG_CCM_L_4         0x00180000
-#define AES_CFG_CCM_L_8         0x00380000
-
-//*****************************************************************************
-//
-// The following defines are used to define the length of the authentication
-// field for CCM operations through the ui32Config argument in the AESConfig
-// function.  This value is also known as M.  Only one is permitted.
-//
-//*****************************************************************************
-#define AES_CFG_CCM_M_4         0x00400000
-#define AES_CFG_CCM_M_6         0x00800000
-#define AES_CFG_CCM_M_8         0x00c00000
-#define AES_CFG_CCM_M_10        0x01000000
-#define AES_CFG_CCM_M_12        0x01400000
-#define AES_CFG_CCM_M_14        0x01800000
-#define AES_CFG_CCM_M_16        0x01c00000
-
-//*****************************************************************************
-//
-// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
-// AESIntStatus functions.
-//
-//*****************************************************************************
-#define AES_INT_CONTEXT_IN      0x00000001
-#define AES_INT_CONTEXT_OUT     0x00000008
-#define AES_INT_DATA_IN         0x00000002
-#define AES_INT_DATA_OUT        0x00000004
-#define AES_INT_DMA_CONTEXT_IN  0x00010000
-#define AES_INT_DMA_CONTEXT_OUT 0x00020000
-#define AES_INT_DMA_DATA_IN     0x00040000
-#define AES_INT_DMA_DATA_OUT    0x00080000
-
-//*****************************************************************************
-//
-// Defines used when enabling and disabling DMA requests in the
-// AESEnableDMA and AESDisableDMA functions.
-//
-//*****************************************************************************
-#define AES_DMA_DATA_IN         0x00000040
-#define AES_DMA_DATA_OUT        0x00000020
-#define AES_DMA_CONTEXT_IN      0x00000080
-#define AES_DMA_CONTEXT_OUT     0x00000100
-
-//*****************************************************************************
-//
-// Function prototypes.
-//
-//*****************************************************************************
-extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
-                       uint32_t ui32Keysize);
-extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
-                       uint32_t ui32Keysize);
-extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
-extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
-extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
-extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
-extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
-                                   uint8_t ui8Length);
-extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
-                        uint8_t ui8Length);
-extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
-                                    uint8_t ui8Length);
-extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
-                         uint8_t ui8Length);
-extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
-                           uint8_t *pui8Dest,
-               uint32_t ui32Length);
-extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
-                       uint32_t ui32Length,
-            uint8_t *pui8Tag);
-extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
-                             uint8_t *pui8Dest, uint32_t ui32Length,
-                             uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
-                             uint8_t *pui8Tag);
-extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
-extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
-extern void AESIntUnregister(uint32_t ui32Base);
-extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __DRIVERLIB_AES_H__
diff --git a/ports/cc3200/hal/cc3200_asm.h b/ports/cc3200/hal/cc3200_asm.h
deleted file mode 100644
index 742c9a6f7f6b5..0000000000000
--- a/ports/cc3200/hal/cc3200_asm.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef CC3200_ASM_H_
-#define CC3200_ASM_H_
-
-// We have inlined IRQ functions for efficiency (they are generally
-// 1 machine instruction).
-//
-// Note on IRQ state: you should not need to know the specific
-// value of the state variable, but rather just pass the return
-// value from disable_irq back to enable_irq.  If you really need
-// to know the machine-specific values, see irq.h.
-
-#ifndef __disable_irq
-#define __disable_irq() __asm__ volatile ("cpsid i");
-#endif
-
-#ifndef DEBUG
-__attribute__(( always_inline ))
-static inline void __WFI(void) {
-    __asm volatile ("    dsb      \n"
-                    "    isb      \n"
-                    "    wfi      \n");
-}
-#else
-// For some reason the debugger gets disconnected when entering any of the sleep modes
-__attribute__(( always_inline ))
-static inline void __WFI(void) {
-    __asm volatile ("    dsb      \n"
-                    "    isb      \n");
-}
-#endif
-
-__attribute__(( always_inline ))
-static inline uint32_t __get_PRIMASK(void) {
-    uint32_t result;
-    __asm volatile ("mrs %0, primask" : "=r" (result));
-    return(result);
-}
-
-__attribute__(( always_inline ))
-static inline void __set_PRIMASK(uint32_t priMask) {
-    __asm volatile ("msr primask, %0" : : "r" (priMask) : "memory");
-}
-
-__attribute__(( always_inline ))
-static inline uint32_t __get_BASEPRI(void) {
-    uint32_t result;
-    __asm volatile ("mrs %0, basepri" : "=r" (result));
-    return(result);
-}
-
-__attribute__(( always_inline ))
-static inline void __set_BASEPRI(uint32_t value) {
-    __asm volatile ("msr basepri, %0" : : "r" (value) : "memory");
-}
-
-__attribute__(( always_inline ))
-static inline void enable_irq(mp_uint_t state) {
-    __set_PRIMASK(state);
-}
-
-__attribute__(( always_inline ))
-static inline mp_uint_t disable_irq(void) {
-    mp_uint_t state = __get_PRIMASK();
-    __disable_irq();
-    return state;
-}
-
-#endif /* CC3200_ASM_H_ */
diff --git a/ports/cc3200/hal/cc3200_hal.c b/ports/cc3200/hal/cc3200_hal.c
deleted file mode 100644
index 0285d0585698e..0000000000000
--- a/ports/cc3200/hal/cc3200_hal.c
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-
- /******************************************************************************
- IMPORTS
- ******************************************************************************/
-#include 
-#include 
-#include 
-
-
-#include "py/mphal.h"
-#include "py/runtime.h"
-#include "py/objstr.h"
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "hw_memmap.h"
-#include "rom_map.h"
-#include "interrupt.h"
-#include "systick.h"
-#include "prcm.h"
-#include "pin.h"
-#include "mpexception.h"
-#include "telnet.h"
-#include "pybuart.h"
-#include "utils.h"
-#include "irq.h"
-#include "moduos.h"
-
-#ifdef USE_FREERTOS
-#include "FreeRTOS.h"
-#include "task.h"
-#include "semphr.h"
-#endif
-
-
-/******************************************************************************
- DECLARE PRIVATE FUNCTIONS
- ******************************************************************************/
-#ifndef USE_FREERTOS
-static void hal_TickInit (void);
-#endif
-
-/******************************************************************************
- DECLARE LOCAL DATA
- ******************************************************************************/
-static volatile uint32_t HAL_tickCount;
-
-/******************************************************************************
- DECLARE IMPORTED DATA
- ******************************************************************************/
-extern void (* const g_pfnVectors[256])(void);
-
-/******************************************************************************
- DEFINE PUBLIC FUNCTIONS
- ******************************************************************************/
-
-__attribute__ ((section (".boot")))
-void HAL_SystemInit (void) {
-    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
-
-    // in the case of a release image, these steps are already performed by
-    // the bootloader so we can skip it and gain some code space
-#ifdef DEBUG
-    MAP_IntMasterEnable();
-    PRCMCC3200MCUInit();
-#endif
-
-#ifndef USE_FREERTOS
-    hal_TickInit();
-#endif
-}
-
-void HAL_SystemDeInit (void) {
-}
- 
-void HAL_IncrementTick(void) {
-    HAL_tickCount++;
-}
-
-mp_uint_t mp_hal_ticks_ms(void) {
-    return HAL_tickCount;
-}
-
-// The SysTick timer counts down at HAL_FCPU_HZ, so we can use that knowledge
-// to grab a microsecond counter.
-mp_uint_t mp_hal_ticks_us(void) {
-    mp_uint_t irq_state = disable_irq();
-    uint32_t counter = SysTickValueGet();
-    uint32_t milliseconds = mp_hal_ticks_ms();
-    enable_irq(irq_state);
-
-    uint32_t load = SysTickPeriodGet();
-    counter = load - counter; // Convert from decrementing to incrementing
-    return (milliseconds * 1000) + ((counter * 1000) / load);
-}
-
-void mp_hal_delay_ms(mp_uint_t delay) {
-    // only if we are not within interrupt context and interrupts are enabled
-    if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) {
-        MP_THREAD_GIL_EXIT();
-        #ifdef USE_FREERTOS
-            vTaskDelay (delay / portTICK_PERIOD_MS);
-        #else
-            uint32_t start = HAL_tickCount;
-            // wraparound of tick is taken care of by 2's complement arithmetic.
-            while (HAL_tickCount - start < delay) {
-                // enter sleep mode, waiting for (at least) the SysTick interrupt.
-                __WFI();
-            }
-        #endif
-        MP_THREAD_GIL_ENTER();
-    } else {
-        for (int ms = 0; ms < delay; ms++) {
-            UtilsDelay(UTILS_DELAY_US_TO_COUNT(1000));
-        }
-    }
-}
-
-void mp_hal_stdout_tx_str(const char *str) {
-    mp_hal_stdout_tx_strn(str, strlen(str));
-}
-
-void mp_hal_stdout_tx_strn(const char *str, size_t len) {
-    if (MP_STATE_PORT(os_term_dup_obj)) {
-        if (MP_OBJ_IS_TYPE(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-            uart_tx_strn(MP_STATE_PORT(os_term_dup_obj)->stream_o, str, len);
-        } else {
-            MP_STATE_PORT(os_term_dup_obj)->write[2] = mp_obj_new_str_of_type(&mp_type_str, (const byte *)str, len);
-            mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->write);
-        }
-    }
-    // and also to telnet
-    telnet_tx_strn(str, len);
-}
-
-void mp_hal_stdout_tx_strn_cooked (const char *str, size_t len) {
-    int32_t nslen = 0;
-    const char *_str = str;
-
-    for (int i = 0; i < len; i++) {
-        if (str[i] == '\n') {
-            mp_hal_stdout_tx_strn(_str, nslen);
-            mp_hal_stdout_tx_strn("\r\n", 2);
-            _str += nslen + 1;
-            nslen = 0;
-        } else {
-            nslen++;
-        }
-    }
-    if (_str < str + len) {
-        mp_hal_stdout_tx_strn(_str, nslen);
-    }
-}
-
-int mp_hal_stdin_rx_chr(void) {
-    for ( ;; ) {
-        // read telnet first
-        if (telnet_rx_any()) {
-            return telnet_rx_char();
-        } else if (MP_STATE_PORT(os_term_dup_obj)) { // then the stdio_dup
-            if (MP_OBJ_IS_TYPE(MP_STATE_PORT(os_term_dup_obj)->stream_o, &pyb_uart_type)) {
-                if (uart_rx_any(MP_STATE_PORT(os_term_dup_obj)->stream_o)) {
-                    return uart_rx_char(MP_STATE_PORT(os_term_dup_obj)->stream_o);
-                }
-            } else {
-                MP_STATE_PORT(os_term_dup_obj)->read[2] = mp_obj_new_int(1);
-                mp_obj_t data = mp_call_method_n_kw(1, 0, MP_STATE_PORT(os_term_dup_obj)->read);
-                // data len is > 0
-                if (mp_obj_is_true(data)) {
-                    mp_buffer_info_t bufinfo;
-                    mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ);
-                    return ((int *)(bufinfo.buf))[0];
-                }
-            }
-        }
-        mp_hal_delay_ms(1);
-    }
-}
-
-/******************************************************************************
- DEFINE PRIVATE FUNCTIONS
- ******************************************************************************/
-
-#ifndef USE_FREERTOS
-static void hal_TickInit (void) {
-    HAL_tickCount = 0;
-    MAP_SysTickIntRegister(HAL_IncrementTick);
-    MAP_IntEnable(FAULT_SYSTICK);
-    MAP_SysTickIntEnable();
-    MAP_SysTickPeriodSet(HAL_FCPU_HZ / HAL_SYSTICK_PERIOD_US);
-    // Force a reload of the SysTick counter register
-    HWREG(NVIC_ST_CURRENT) = 0;
-    MAP_SysTickEnable();
-}
-#endif
diff --git a/ports/cc3200/hal/cc3200_hal.h b/ports/cc3200/hal/cc3200_hal.h
deleted file mode 100644
index 71e245eeb1c5d..0000000000000
--- a/ports/cc3200/hal/cc3200_hal.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include 
-#include 
-
-#include "hal/utils.h"
-#include "hal/systick.h"
-
-/******************************************************************************
- DEFINE CONSTANTS
- ******************************************************************************/
-
-#define HAL_FCPU_MHZ                        80U
-#define HAL_FCPU_HZ                         (1000000U * HAL_FCPU_MHZ)
-#define HAL_SYSTICK_PERIOD_US               1000U
-#define UTILS_DELAY_US_TO_COUNT(us)         (((us) * HAL_FCPU_MHZ) / 6)
-
-#define HAL_NVIC_INT_CTRL_REG               (*((volatile uint32_t *) 0xE000ED04 ) )
-#define HAL_VECTACTIVE_MASK                 (0x1FUL)
-
-/******************************************************************************
- DEFINE TYPES
- ******************************************************************************/
-
-/******************************************************************************
- DEFINE FUNCTION-LIKE MACROS
- ******************************************************************************/
-
-#define HAL_INTRODUCE_SYNC_BARRIER() {                      \
-                                        __asm(" dsb \n"     \
-                                              " isb \n");   \
-                                     }
-
-/******************************************************************************
- DECLARE PUBLIC FUNCTIONS
- ******************************************************************************/
-
-extern void HAL_SystemInit (void);
-extern void HAL_SystemDeInit (void);
-extern void HAL_IncrementTick(void);
-extern void mp_hal_set_interrupt_char (int c);
-
-#define mp_hal_delay_us(usec) UtilsDelay(UTILS_DELAY_US_TO_COUNT(usec))
-#define mp_hal_ticks_cpu() (SysTickPeriodGet() - SysTickValueGet())
diff --git a/ports/cc3200/hal/cpu.c b/ports/cc3200/hal/cpu.c
deleted file mode 100644
index 29d10afb25fe9..0000000000000
--- a/ports/cc3200/hal/cpu.c
+++ /dev/null
@@ -1,412 +0,0 @@
-//*****************************************************************************
-//
-//  cpu.c
-//
-//  Instruction wrappers for special CPU instructions needed by the
-//  drivers.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#include "cpu.h"
-
-//*****************************************************************************
-//
-// Wrapper function for the CPSID instruction.  Returns the state of PRIMASK
-// on entry.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUcpsid(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUcpsid(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUcpsid(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsid   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function returning the state of PRIMASK (indicating whether
-// interrupts are enabled or disabled).
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUprimask(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUprimask(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUprimask(void)
-{
-    //
-    // Read PRIMASK and disable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for the CPSIE instruction.  Returns the state of PRIMASK
-// on entry.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUcpsie(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUcpsie(void)
-{
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUcpsie(void)
-{
-    //
-    // Read PRIMASK and enable interrupts.
-    //
-    __asm("    mrs     r0, PRIMASK\n"
-          "    cpsie   i\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for the WFI instruction.
-//
-//*****************************************************************************
-#if defined(gcc)
-void __attribute__((naked))
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n"
-          "    bx      lr\n");
-}
-#endif
-#if defined(ewarm)
-void
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n");
-}
-#endif
-#if defined(ccs)
-void
-CPUwfi(void)
-{
-    //
-    // Wait for the next interrupt.
-    //
-    __asm("    dsb      \n"
-          "    isb      \n"
-          "    wfi      \n");
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for writing the BASEPRI register.
-//
-//*****************************************************************************
-#if defined(gcc)
-void __attribute__((naked))
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n"
-          "    bx      lr\n");
-}
-#endif
-#if defined(ewarm)
-void
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n");
-}
-#endif
-#if defined(ccs)
-void
-CPUbasepriSet(unsigned long ulNewBasepri)
-{
-    //
-    // Set the BASEPRI register
-    //
-    __asm("    msr     BASEPRI, r0\n"
-          "    dsb      \n"
-          "    isb      \n");
-}
-#endif
-
-//*****************************************************************************
-//
-// Wrapper function for reading the BASEPRI register.
-//
-//*****************************************************************************
-#if defined(gcc)
-unsigned long __attribute__((naked))
-CPUbasepriGet(void)
-{
-    unsigned long ulRet;
-
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n"
-          "    bx      lr\n"
-          : "=r" (ulRet));
-
-    //
-    // The return is handled in the inline assembly, but the compiler will
-    // still complain if there is not an explicit return here (despite the fact
-    // that this does not result in any code being produced because of the
-    // naked attribute).
-    //
-    return(ulRet);
-}
-#endif
-#if defined(ewarm)
-unsigned long
-CPUbasepriGet(void)
-{
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n");
-
-    //
-    // "Warning[Pe940]: missing return statement at end of non-void function"
-    // is suppressed here to avoid putting a "bx lr" in the inline assembly
-    // above and a superfluous return statement here.
-    //
-#pragma diag_suppress=Pe940
-}
-#pragma diag_default=Pe940
-#endif
-#if defined(ccs)
-unsigned long
-CPUbasepriGet(void)
-{
-    //
-    // Read BASEPRI
-    //
-    __asm("    mrs     r0, BASEPRI\n"
-          "    bx      lr\n");
-
-    //
-    // The following keeps the compiler happy, because it wants to see a
-    // return value from this function.  It will generate code to return
-    // a zero.  However, the real return is the "bx lr" above, so the
-    // return(0) is never executed and the function returns with the value
-    // you expect in R0.
-    //
-    return(0);
-}
-#endif
diff --git a/ports/cc3200/hal/cpu.h b/ports/cc3200/hal/cpu.h
deleted file mode 100644
index 4a0fc0dcc069c..0000000000000
--- a/ports/cc3200/hal/cpu.h
+++ /dev/null
@@ -1,75 +0,0 @@
-//*****************************************************************************
-//
-//  cpu.h
-//
-//  Prototypes for the CPU instruction wrapper functions.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __CPU_H__
-#define __CPU_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Prototypes.
-//
-//*****************************************************************************
-extern unsigned long CPUcpsid(void);
-extern unsigned long CPUcpsie(void);
-extern unsigned long CPUprimask(void);
-extern void CPUwfi(void);
-extern unsigned long CPUbasepriGet(void);
-extern void CPUbasepriSet(unsigned long ulNewBasepri);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __CPU_H__
diff --git a/ports/cc3200/hal/crc.c b/ports/cc3200/hal/crc.c
deleted file mode 100644
index 9ccb92c3852d8..0000000000000
--- a/ports/cc3200/hal/crc.c
+++ /dev/null
@@ -1,305 +0,0 @@
-//*****************************************************************************
-//
-//  crc.c
-//
-//  Driver for the CRC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup CRC_Cyclic_Redundancy_Check_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_dthe.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "crc.h"
-#include "debug.h"
-
-//*****************************************************************************
-//
-//! Set the configuration of CRC functionality with the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32CRCConfig is the configuration of the CRC engine.
-//!
-//! This function configures the operation of the CRC engine within the EC
-//! module.  The configuration is specified with the \e ui32CRCConfig argument.
-//! It is the logical OR of any of the following options:
-//!
-//! CRC Initialization Value
-//! - \b EC_CRC_CFG_INIT_SEED - Initialize with seed value
-//! - \b EC_CRC_CFG_INIT_0 - Initialize to all '0s'
-//! - \b EC_CRC_CFG_INIT_1 - Initialize to all '1s'
-//!
-//! Input Data Size
-//! - \b EC_CRC_CFG_SIZE_8BIT - Input data size of 8 bits
-//! - \b EC_CRC_CFG_SIZE_32BIT - Input data size of 32 bits
-//!
-//! Post Process Reverse/Inverse
-//! - \b EC_CRC_CFG_RESINV - Result inverse enable
-//! - \b EC_CRC_CFG_OBR - Output reverse enable
-//!
-//! Input Bit Reverse
-//! - \b EC_CRC_CFG_IBR - Bit reverse enable
-//!
-//! Endian Control
-//! - \b EC_CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
-//! - \b EC_CRC_CFG_ENDIAN_SHW - Swap half-word
-//!
-//! Operation Type
-//! - \b EC_CRC_CFG_TYPE_P8005 - Polynomial 0x8005
-//! - \b EC_CRC_CFG_TYPE_P1021 - Polynomial 0x1021
-//! - \b EC_CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
-//! - \b EC_CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
-//! - \b EC_CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-    ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
-           (ui32CRCConfig & CRC_CFG_INIT_0) ||
-           (ui32CRCConfig & CRC_CFG_INIT_1) ||
-           (ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
-           (ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
-           (ui32CRCConfig & CRC_CFG_RESINV) ||
-           (ui32CRCConfig & CRC_CFG_OBR) ||
-           (ui32CRCConfig & CRC_CFG_IBR) ||
-           (ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
-           (ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
-           (ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
-
-    //
-    // Write the control register with the configuration.
-    //
-    HWREG(ui32Base + DTHE_O_CRC_CTRL) = ui32CRCConfig;
-}
-
-//*****************************************************************************
-//
-//! Write the seed value for CRC operations in the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32Seed is the seed value.
-//!
-//! This function writes the seed value for use with CRC operations in the
-//! EC module.  This value is the start value for CRC operations.  If this
-//! value is not written, then the residual seed from the previous operation
-//! is used as the starting value.
-//!
-//! \note The seed must be written only if \b EC_CRC_CFG_INIT_SEED is
-//! set with the CRCConfigSet() function.
-//
-//*****************************************************************************
-void
-CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // Write the seed value to the seed register.
-    //
-    HWREG(ui32Base + DTHE_O_CRC_SEED) = ui32Seed;
-}
-
-//*****************************************************************************
-//
-//! Write data into the EC module for CRC operations.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param ui32Data is the data to be written.
-//!
-//! This function writes either 8 or 32 bits of data into the EC module for
-//! CRC operations.  The distinction between 8 and 32 bits of data is made
-//! when the \b EC_CRC_CFG_SIZE_8BIT or \b EC_CRC_CFG_SIZE_32BIT flag
-//! is set using the CRCConfigSet() function.
-//!
-//! When writing 8 bits of data, ensure the data is in the least signficant
-//! byte position.  The remaining bytes should be written with zero.  For
-//! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // Write the data
-    //
-    HWREG(DTHE_BASE + DTHE_O_CRC_DIN) = ui32Data;
-}
-
-//*****************************************************************************
-//
-//! Reads the result of a CRC operation in the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//!
-//! This function reads either the unmodified CRC result or the post
-//! processed CRC result from the EC module.  The post-processing options
-//! are selectable through \b EC_CRC_CFG_RESINV and \b EC_CRC_CFG_OBR
-//! parameters in the CRCConfigSet() function.
-//!
-//! \return The CRC result.
-//
-//*****************************************************************************
-uint32_t
-CRCResultRead(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // return value.
-    //
-    return(HWREG(DTHE_BASE + DTHE_O_CRC_RSLT_PP));
-
-}
-
-//*****************************************************************************
-//
-//! Process data to generate a CRC with the EC module.
-//!
-//! \param ui32Base is the base address of the EC module.
-//! \param puiDataIn is a pointer to an array of data that is processed.
-//! \param ui32DataLength is the number of data items that are processed
-//! to produce the CRC.
-//! \param ui32Config the config parameter to determine the CRC mode
-//!
-//! This function processes an array of data to produce a CRC result.
-//! This function takes the CRC mode as the parameter.
-//!
-//! The data in the array pointed to be \e pui32DataIn is either an array
-//! of bytes or an array or words depending on the selection of the input
-//! data size options \b EC_CRC_CFG_SIZE_8BIT and
-//! \b EC_CRC_CFG_SIZE_32BIT.
-//!
-//! This function returns either the unmodified CRC result or the
-//! post- processed CRC result from the EC module.  The post-processing
-//! options are selectable through \b EC_CRC_CFG_RESINV and
-//! \b EC_CRC_CFG_OBR parameters.
-//!
-//! \return The CRC result.
-//
-//*****************************************************************************
-uint32_t
-CRCDataProcess(uint32_t ui32Base, void *puiDataIn,
-               uint32_t ui32DataLength, uint32_t ui32Config)
-{
-    uint8_t *pui8DataIn;
-    uint32_t *pui32DataIn;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DTHE_BASE);
-
-    //
-    // See if the CRC is operating in 8-bit or 32-bit mode.
-    //
-    if(ui32Config & DTHE_CRC_CTRL_SIZE)
-    {
-        //
-        // The CRC is operating in 8-bit mode, so create an 8-bit pointer to
-        // the data.
-        //
-        pui8DataIn = (uint8_t *)puiDataIn;
-
-        //
-        // Loop through the input data.
-        //
-        while(ui32DataLength--)
-        {
-            //
-            // Write the next data byte.
-            //
-            HWREG(ui32Base + DTHE_O_CRC_DIN) = *pui8DataIn++;
-        }
-    }
-    else
-    {
-        //
-        // The CRC is operating in 32-bit mode, so loop through the input data.
-        //
-    	pui32DataIn = (uint32_t *)puiDataIn;
-        while(ui32DataLength--)
-        {
-            //
-            // Write the next data word.
-            //
-            HWREG(ui32Base + DTHE_O_CRC_DIN) = *pui32DataIn++;
-        }
-    }
-
-    //
-    // Return the result.
-    //
-    return(CRCResultRead(ui32Base));
-}
-
-
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/crc.h b/ports/cc3200/hal/crc.h
deleted file mode 100644
index c0858bb1baf87..0000000000000
--- a/ports/cc3200/hal/crc.h
+++ /dev/null
@@ -1,98 +0,0 @@
-//*****************************************************************************
-//
-//  crc.h
-//
-//  Defines and Macros for CRC module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_CRC_H__
-#define __DRIVERLIB_CRC_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used in the ui32Config argument of the
-// ECConfig function.
-//
-//*****************************************************************************
-#define CRC_CFG_INIT_SEED       0x00000000  // Initialize with seed
-#define CRC_CFG_INIT_0          0x00004000  // Initialize to all '0s'
-#define CRC_CFG_INIT_1          0x00006000  // Initialize to all '1s'
-#define CRC_CFG_SIZE_8BIT       0x00001000  // Input Data Size
-#define CRC_CFG_SIZE_32BIT      0x00000000  // Input Data Size
-#define CRC_CFG_RESINV          0x00000200  // Result Inverse Enable
-#define CRC_CFG_OBR             0x00000100  // Output Reverse Enable
-#define CRC_CFG_IBR             0x00000080  // Bit reverse enable
-#define CRC_CFG_ENDIAN_SBHW     0x00000000  // Swap byte in half-word
-#define CRC_CFG_ENDIAN_SHW      0x00000010  // Swap half-word
-#define CRC_CFG_TYPE_P8005      0x00000000  // Polynomial 0x8005
-#define CRC_CFG_TYPE_P1021      0x00000001  // Polynomial 0x1021
-#define CRC_CFG_TYPE_P4C11DB7   0x00000002  // Polynomial 0x4C11DB7
-#define CRC_CFG_TYPE_P1EDC6F41  0x00000003  // Polynomial 0x1EDC6F41
-#define CRC_CFG_TYPE_TCPCHKSUM  0x00000008  // TCP checksum
-
-//*****************************************************************************
-//
-// Function prototypes.
-//
-//*****************************************************************************
-extern void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig);
-extern uint32_t CRCDataProcess(uint32_t ui32Base, void *puiDataIn,
-               uint32_t ui32DataLength, uint32_t ui32Config);
-extern void CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data);
-extern uint32_t CRCResultRead(uint32_t ui32Base);
-extern void CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed);
-
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __DRIVERLIB_CRC_H__
diff --git a/ports/cc3200/hal/debug.h b/ports/cc3200/hal/debug.h
deleted file mode 100644
index 1f6556704e9b7..0000000000000
--- a/ports/cc3200/hal/debug.h
+++ /dev/null
@@ -1,63 +0,0 @@
-//*****************************************************************************
-//
-//  debug.h
-//
-//  Macros for assisting debug of the driver library.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-#ifndef __DEBUG_H__
-#define __DEBUG_H__
-
-#include "assert.h"
-
-//*****************************************************************************
-//
-// Prototype for the function that is called when an invalid argument is passed
-// to an API.  This is only used when doing a DEBUG build.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// The ASSERT macro, which does the actual assertion checking.  Typically, this
-// will be for procedure arguments.
-//
-//*****************************************************************************
-#if defined(DEBUG) && !defined(BOOTLOADER)
-#define ASSERT(expr)        assert(expr)
-#else
-#define ASSERT(expr)        (void)(expr)
-#endif
-
-#endif // __DEBUG_H__
diff --git a/ports/cc3200/hal/des.c b/ports/cc3200/hal/des.c
deleted file mode 100644
index 1620e6bafc831..0000000000000
--- a/ports/cc3200/hal/des.c
+++ /dev/null
@@ -1,887 +0,0 @@
-//*****************************************************************************
-//
-//  des.c
-//
-//  Driver for the DES data transformation.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup DES_Data_Encryption_Standard_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_des.h"
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "des.h"
-#include "interrupt.h"
-
-
-//*****************************************************************************
-//
-//! Configures the DES module for operation.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Config is the configuration of the DES module.
-//!
-//! This function configures the DES module for operation.
-//!
-//! The \e ui32Config parameter is a bit-wise OR of a number of configuration
-//! flags. The valid flags are grouped below based on their function.
-//!
-//! The direction of the operation is specified with one of the following two
-//! flags.  Only one is permitted.
-//!
-//! - \b DES_CFG_DIR_ENCRYPT - Encryption
-//! - \b DES_CFG_DIR_DECRYPT - Decryption
-//!
-//! The operational mode of the DES engine is specified with one of the
-//! following flags. Only one is permitted.
-//!
-//! - \b DES_CFG_MODE_ECB - Electronic Codebook Mode
-//! - \b DES_CFG_MODE_CBC - Cipher-Block Chaining Mode
-//! - \b DES_CFG_MODE_CFB - Cipher Feedback Mode
-//!
-//! The selection of single DES or triple DES is specified with one of the
-//! following two flags. Only one is permitted.
-//!
-//! - \b DES_CFG_SINGLE - Single DES
-//! - \b DES_CFG_TRIPLE - Triple DES
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Backup the save context field.
-    //
-    ui32Config |= (HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_CONTEXT);
-
-    //
-    // Write the control register.
-    //
-    HWREG(ui32Base + DES_O_CTRL) = ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Sets the key used for DES operations.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Key is a pointer to an array that holds the key
-//!
-//! This function sets the key used for DES operations.
-//!
-//! \e pui8Key should be 64 bits long (2 words) if single DES is being used or
-//! 192 bits (6 words) if triple DES is being used.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESKeySet(uint32_t ui32Base, uint8_t *pui8Key)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Write the first part of the key.
-    //
-    HWREG(ui32Base + DES_O_KEY1_L) =  * ((uint32_t *)(pui8Key + 0));
-    HWREG(ui32Base + DES_O_KEY1_H) = * ((uint32_t *)(pui8Key + 4));
-
-    //
-    // If we are performing triple DES, then write the key registers for
-    // the second and third rounds.
-    //
-    if(HWREG(ui32Base + DES_O_CTRL) & DES_CFG_TRIPLE)
-    {
-        HWREG(ui32Base + DES_O_KEY2_L) = * ((uint32_t *)(pui8Key + 8));
-        HWREG(ui32Base + DES_O_KEY2_H) = * ((uint32_t *)(pui8Key + 12));
-        HWREG(ui32Base + DES_O_KEY3_L) = * ((uint32_t *)(pui8Key + 16));
-        HWREG(ui32Base + DES_O_KEY3_H) = * ((uint32_t *)(pui8Key + 20));
-    }
-}
-
-//*****************************************************************************
-//
-//! Sets the initialization vector in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8IVdata is a pointer to an array of 64 bits (2 words) of data to
-//! be written into the initialization vectors registers.
-//!
-//! This function sets the initialization vector in the DES module.  It returns
-//! true if the registers were successfully written.  If the context registers
-//! cannot be written at the time the function was called, then false is
-//! returned.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-DESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Check to see if context registers can be overwritten.  If not, return
-    // false.
-    //
-    if((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_CONTEXT) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Write the initialization vector registers.
-    //
-    HWREG(ui32Base + DES_O_IV_L) =  *((uint32_t *) (pui8IVdata + 0));
-    HWREG(ui32Base + DES_O_IV_H) = *((uint32_t *) (pui8IVdata + 4));
-
-    //
-    // Return true to indicate the write was successful.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Sets the crytographic data length in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Length is the length of the data in bytes.
-//!
-//! This function writes the cryptographic data length into the DES module.
-//! When this register is written, the engine is triggersed to start using
-//! this context.
-//!
-//! \note Data lengths up to (2^32 - 1) bytes are allowed.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Write the length register.
-    //
-    HWREG(ui32Base + DES_O_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Dest is a pointer to an array of 2 words.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function returns true if the data was ready when the function was
-//! called. If the data was not ready, false is returned.
-//!
-//! \return True or false.
-//
-//*****************************************************************************
-bool
-DESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[2];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-	//
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-       	return(false);
-    }
-
-    //
-    // Check to see if the data is ready to be read.
-    //
-    if((DES_CTRL_OUTPUT_READY & (HWREG(ui32Base + DES_O_CTRL))) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Read two words of data from the data registers.
-    //
-    pui32Dest[0] = HWREG(DES_BASE + DES_O_DATA_L);
-    pui32Dest[1] = HWREG(DES_BASE + DES_O_DATA_H);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
- 		*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-
-    //
-    // Return true to indicate a successful write.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Reads plaintext/ciphertext from data registers with blocking.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Dest is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function waits until the DES module is finished and encrypted or
-//! decrypted data is ready.  The output data is then stored in the pui8Dest
-//! array.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-DESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, uint8_t ui8Length)
-{
-	volatile uint32_t pui32Dest[2];
-	uint8_t ui8BytCnt;
-	uint8_t *pui8DestTemp;
-
-	//
-	// Check the arguments.
-	//
-	ASSERT(ui32Base == DES_BASE);
-	if((ui8Length == 0)||(ui8Length>8))
-	{
-		return;
-	}
-    //
-    // Wait for data output to be ready.
-    //
-    while((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_OUTPUT_READY) == 0)
-    {
-    }
-
-    //
-    // Read two words of data from the data registers.
-    //
-    pui32Dest[0] = HWREG(DES_BASE + DES_O_DATA_L);
-    pui32Dest[1] = HWREG(DES_BASE + DES_O_DATA_H);
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8DestTemp = (uint8_t *)pui32Dest;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-    	*(pui8Dest+ui8BytCnt) = *(pui8DestTemp+ui8BytCnt);
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of 2 words.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function returns false if the DES module is not ready to accept
-//! data.  It returns true if the data was written successfully.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-DESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-
-    volatile uint32_t pui32Src[2]={0,0};
-    uint8_t ui8BytCnt;
-    uint8_t *pui8SrcTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-            return(false);
-    }
-
-    //
-    // Check if the DES module is ready to encrypt or decrypt data.  If it
-    // is not, return false.
-    //
-    if(!(DES_CTRL_INPUT_READY & (HWREG(ui32Base + DES_O_CTRL))))
-    {
-        return(false);
-    }
-
-    //
-    // Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-            *(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-    }
-
-    //
-    // Write the data.
-    //
-    HWREG(DES_BASE + DES_O_DATA_L) = pui32Src[0];
-    HWREG(DES_BASE + DES_O_DATA_H) = pui32Src[1];
-
-    //
-    // Return true to indicate a successful write.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Writes plaintext/ciphertext to data registers without blocking
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of bytes.
-//! \param ui8Length the length can be from 1 to 8
-//!
-//! This function waits until the DES module is ready before writing the
-//! data contained in the pui8Src array.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, uint8_t ui8Length)
-{
-    volatile uint32_t pui32Src[2]={0,0};
-    uint8_t ui8BytCnt;
-    uint8_t *pui8SrcTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    if((ui8Length == 0)||(ui8Length>8))
-    {
-            return;
-    }
-
-    //
-    // Wait for the input ready bit to go high.
-    //
-    while(((HWREG(ui32Base + DES_O_CTRL) & DES_CTRL_INPUT_READY)) == 0)
-    {
-    }
-
-    //
-    //Copy the data to a block memory
-    //
-    pui8SrcTemp = (uint8_t *)pui32Src;
-    for(ui8BytCnt = 0; ui8BytCnt < ui8Length ; ui8BytCnt++)
-    {
-            *(pui8SrcTemp+ui8BytCnt) = *(pui8Src+ui8BytCnt);
-    }
-
-    //
-    // Write the data.
-    //
-    HWREG(DES_BASE + DES_O_DATA_L) = pui32Src[0];
-    HWREG(DES_BASE + DES_O_DATA_H) = pui32Src[1];
-}
-
-//*****************************************************************************
-//
-//! Processes blocks of data through the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pui8Src is a pointer to an array of words that contains the
-//! source data for processing.
-//! \param pui8Dest is a pointer to an array of words consisting of the
-//! processed data.
-//! \param ui32Length is the length of the cryptographic data in bytes.
-//! It must be a multiple of eight.
-//!
-//! This function takes the data contained in the pui8Src array and processes
-//! it using the DES engine.  The resulting data is stored in the
-//! pui8Dest array.  The function blocks until all of the data has been
-//! processed. If processing is successful, the function returns true.
-//!
-//! \note This functions assumes that the DES module has been configured,
-//! and initialization values and keys have been written.
-//!
-//! \return true or false.
-//
-//*****************************************************************************
-bool
-DESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, uint8_t *pui8Dest,
-               uint32_t ui32Length)
-{
-    uint32_t ui32Count, ui32BlkCount, ui32ByteCount;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Length % 8) == 0);
-
-    //
-    // Write the length register first. This triggers the engine to start
-    // using this context.
-    //
-    HWREG(ui32Base + DES_O_LENGTH) = ui32Length;
-
-
-    //
-    // Now loop until the blocks are written.
-    //
-    ui32BlkCount = ui32Length/8;
-    for(ui32Count = 0; ui32Count > 16);
-    HWREG(ui32Base + DES_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-}
-
-//*****************************************************************************
-//
-//! Disables interrupts in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32IntFlags is a bit mask of the interrupts to be disabled.
-//!
-//! This function disables interrupt sources in the DES module.
-//! \e ui32IntFlags should be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b DES_INT_CONTEXT_IN - Context interrupt
-//! - \b DES_INT_DATA_IN - Data input interrupt
-//! - \b DES_INT_DATA_OUT - Data output interrupt
-//! - \b DES_INT_DMA_CONTEXT_IN - Context DMA done interrupt
-//! - \b DES_INT_DMA_DATA_IN - Data input DMA done interrupt
-//! - \b DES_INT_DMA_DATA_OUT - Data output DMA done interrupt
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32IntFlags & DES_INT_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DATA_OUT) ||
-           (ui32IntFlags & DES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_OUT));
-
-    //
-    // Clear the interrupts from the flags.
-    //
-    HWREG(DTHE_BASE + DTHE_O_AES_IM)  |= ((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + DES_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-}
-
-//*****************************************************************************
-//
-//! Clears interrupts in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32IntFlags is a bit mask of the interrupts to be disabled.
-//!
-//! This function disables interrupt sources in the DES module.
-//! \e ui32IntFlags should be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b DES_INT_DMA_CONTEXT_IN - Context interrupt
-//! - \b DES_INT_DMA_DATA_IN - Data input interrupt
-//! - \b DES_INT_DMA_DATA_OUT - Data output interrupt
-//!
-//! \note The DMA done interrupts are the only interrupts that can be cleared.
-//! The remaining interrupts can be disabled instead using DESIntDisable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32IntFlags & DES_INT_DMA_CONTEXT_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_IN) ||
-           (ui32IntFlags & DES_INT_DMA_DATA_OUT));
-
-    HWREG(DTHE_BASE + DTHE_O_DES_IC) = ((ui32IntFlags & 0x00070000) >> 16);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled DES interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables DES interrupts on the interrupt controller; specific DES
-//! interrupt sources must be enabled using DESIntEnable().  The interrupt
-//! handler being registered must clear the source of the interrupt using
-//! DESIntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() should be used to enable DES interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_DES, pfnHandler);
-
-    //
-    // Enable the interrupt.
-    //
-    IntEnable(INT_DES);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESIntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_DES);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_DES);
-}
-
-//*****************************************************************************
-//
-//! Enables DMA request sources in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Flags is a bit mask of the DMA requests to be enabled.
-//!
-//! This function enables DMA request sources in the DES module.  The
-//! \e ui32Flags parameter should be the logical OR of any of the following:
-//!
-//! - \b DES_DMA_CONTEXT_IN - Context In
-//! - \b DES_DMA_DATA_OUT - Data Out
-//! - \b DES_DMA_DATA_IN - Data In
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Flags & DES_DMA_CONTEXT_IN) ||
-           (ui32Flags & DES_DMA_DATA_OUT) ||
-           (ui32Flags & DES_DMA_DATA_IN));
-
-    //
-    // Set the data in and data out DMA request enable bits.
-    //
-    HWREG(ui32Base + DES_O_SYSCONFIG) |= ui32Flags;
-}
-
-//*****************************************************************************
-//
-//! Disables DMA request sources in the DES module.
-//!
-//! \param ui32Base is the base address of the DES module.
-//! \param ui32Flags is a bit mask of the DMA requests to be disabled.
-//!
-//! This function disables DMA request sources in the DES module.  The
-//! \e ui32Flags parameter should be the logical OR of any of the following:
-//!
-//! - \b DES_DMA_CONTEXT_IN - Context In
-//! - \b DES_DMA_DATA_OUT - Data Out
-//! - \b DES_DMA_DATA_IN - Data In
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-DESDMADisable(uint32_t ui32Base, uint32_t ui32Flags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == DES_BASE);
-    ASSERT((ui32Flags & DES_DMA_CONTEXT_IN) ||
-           (ui32Flags & DES_DMA_DATA_OUT) ||
-           (ui32Flags & DES_DMA_DATA_IN));
-
-    //
-    // Disable the DMA sources.
-    //
-    HWREG(ui32Base + DES_O_SYSCONFIG) &= ~ui32Flags;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/des.h b/ports/cc3200/hal/des.h
deleted file mode 100644
index 3bee5e6c9b00c..0000000000000
--- a/ports/cc3200/hal/des.h
+++ /dev/null
@@ -1,143 +0,0 @@
-//*****************************************************************************
-//
-//  des.h
-//
-//  Defines and Macros for the DES module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_DES_H__
-#define __DRIVERLIB_DES_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following defines are used to specify the direction with the
-// ui32Config argument in the DESConfig() function.  Only one is permitted.
-//
-//*****************************************************************************
-#define DES_CFG_DIR_DECRYPT     0x00000000
-#define DES_CFG_DIR_ENCRYPT     0x00000004
-
-//*****************************************************************************
-//
-// The following defines are used to specify the operational with the
-// ui32Config argument in the DESConfig() function.  Only one is permitted.
-//
-//*****************************************************************************
-#define DES_CFG_MODE_ECB        0x00000000
-#define DES_CFG_MODE_CBC        0x00000010
-#define DES_CFG_MODE_CFB        0x00000020
-
-//*****************************************************************************
-//
-// The following defines are used to select between single DES and triple DES
-// with the ui32Config argument in the DESConfig() function.  Only one is
-// permitted.
-//
-//*****************************************************************************
-#define DES_CFG_SINGLE          0x00000000
-#define DES_CFG_TRIPLE          0x00000008
-
-//*****************************************************************************
-//
-// The following defines are used with the DESIntEnable(), DESIntDisable() and
-// DESIntStatus() functions.
-//
-//*****************************************************************************
-#define DES_INT_CONTEXT_IN      0x00000001
-#define DES_INT_DATA_IN         0x00000002
-#define DES_INT_DATA_OUT        0x00000004
-#define DES_INT_DMA_CONTEXT_IN  0x00010000
-#define DES_INT_DMA_DATA_IN     0x00020000
-#define DES_INT_DMA_DATA_OUT    0x00040000
-
-//*****************************************************************************
-//
-// The following defines are used with the DESEnableDMA() and DESDisableDMA()
-// functions.
-//
-//*****************************************************************************
-#define DES_DMA_CONTEXT_IN      0x00000080
-#define DES_DMA_DATA_OUT        0x00000040
-#define DES_DMA_DATA_IN         0x00000020
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void DESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void DESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
-                        uint8_t ui8Length);
-extern bool DESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
-                                   uint8_t ui8Length);
-extern bool DESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
-                           uint8_t *pui8Dest, uint32_t ui32Length);
-extern void DESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
-                         uint8_t ui8Length);
-extern bool DESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
-                                    uint8_t ui8Length);
-extern void DESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void DESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
-extern void DESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void DESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
-extern uint32_t DESIntStatus(uint32_t ui32Base, bool bMasked);
-extern void DESIntUnregister(uint32_t ui32Base);
-extern bool DESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
-extern void DESKeySet(uint32_t ui32Base, uint8_t *pui8Key);
-extern void DESDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __DRIVERLIB_DES_H__
diff --git a/ports/cc3200/hal/fault_registers.h b/ports/cc3200/hal/fault_registers.h
deleted file mode 100644
index ade516b9e430e..0000000000000
--- a/ports/cc3200/hal/fault_registers.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the MicroPython project, http://micropython.org/
- *
- * The MIT License (MIT)
- *
- * Copyright (c) 2015 Daniel Campora
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef FAULT_REGISTERS_H_
-#define FAULT_REGISTERS_H_
-
-
-typedef struct
-{
-    uint32_t    IERR        :1;
-    uint32_t    DERR        :1;
-    uint32_t                :1;
-    uint32_t    MUSTKE      :1;
-    uint32_t    MSTKE       :1;
-    uint32_t    MLSPERR     :1;
-    uint32_t                :1;
-    uint32_t    MMARV       :1;
-    uint32_t    IBUS        :1;
-    uint32_t    PRECISE     :1;
-    uint32_t    IMPRE       :1;
-    uint32_t    BUSTKE      :1;
-    uint32_t    BSTKE       :1;
-    uint32_t    BLSPERR     :1;
-    uint32_t                :1;
-    uint32_t    BFARV       :1;
-    uint32_t    UNDEF       :1;
-    uint32_t    INVSTAT     :1;
-    uint32_t    INVCP       :1;
-    uint32_t    NOCP        :1;
-    uint32_t                :4;
-    uint32_t    UNALIGN     :1;
-    uint32_t    DIVO0       :1;
-    uint32_t                :6;
-
-}_CFSR_t;
-
-
-typedef struct
-{
-
-    uint32_t    DBG         :1;
-    uint32_t    FORCED      :1;
-    uint32_t                :28;
-    uint32_t    VECT        :1;
-    uint32_t                :1;
-
-}_HFSR_t;
-
-
-#endif /* FAULT_REGISTERS_H_ */
diff --git a/ports/cc3200/hal/gpio.c b/ports/cc3200/hal/gpio.c
deleted file mode 100644
index 59aa71aa57008..0000000000000
--- a/ports/cc3200/hal/gpio.c
+++ /dev/null
@@ -1,706 +0,0 @@
-//*****************************************************************************
-//
-//  gpio.c
-//
-//  Driver for the GPIO module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup GPIO_General_Purpose_InputOutput_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_gpio.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_common_reg.h"
-#include "debug.h"
-#include "gpio.h"
-#include "interrupt.h"
-
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks a GPIO base address.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function determines if a GPIO port base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#if defined(DEBUG) && !defined(BOOTLOADER)
-static tBoolean
-GPIOBaseValid(unsigned long ulPort)
-{
-    return((ulPort == GPIOA0_BASE) ||
-           (ulPort == GPIOA1_BASE) ||
-           (ulPort == GPIOA2_BASE) ||
-           (ulPort == GPIOA3_BASE) ||             
-           (ulPort == GPIOA4_BASE));
-}
-#else
-#define GPIOBaseValid(ulPort)         (ulPort)
-#endif
-
-//*****************************************************************************
-//
-//! \internal
-//! Gets the GPIO interrupt number.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! Given a GPIO base address, returns the corresponding interrupt number.
-//!
-//! \return Returns a GPIO interrupt number, or -1 if \e ulPort is invalid.
-//
-//*****************************************************************************
-static long
-GPIOGetIntNumber(unsigned long ulPort)
-{
-    unsigned int ulInt;
-
-    //
-    // Determine the GPIO interrupt number for the given module.
-    //
-    switch(ulPort)
-    {
-        case GPIOA0_BASE:
-        {
-            ulInt = INT_GPIOA0;
-            break;
-        }
-
-        case GPIOA1_BASE:
-        {
-            ulInt = INT_GPIOA1;
-            break;
-        }
-
-        case GPIOA2_BASE:
-        {
-            ulInt = INT_GPIOA2;
-            break;
-        }
-
-        case GPIOA3_BASE:
-        {
-            ulInt = INT_GPIOA3;
-            break;
-        }
-
-        default:
-        {
-            return(-1);
-        }
-    }
-
-    //
-    // Return GPIO interrupt number.
-    //
-    return(ulInt);
-}
-
-//*****************************************************************************
-//
-//! Sets the direction and mode of the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ulPinIO is the pin direction and/or mode.
-//!
-//! This function will set the specified pin(s) on the selected GPIO port
-//! as either an input or output under software control, or it will set the
-//! pin to be under hardware control.
-//!
-//! The parameter \e ulPinIO is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b GPIO_DIR_MODE_IN
-//! - \b GPIO_DIR_MODE_OUT
-//!
-//! where \b GPIO_DIR_MODE_IN specifies that the pin will be programmed as
-//! a software controlled input, \b GPIO_DIR_MODE_OUT specifies that the pin
-//! will be programmed as a software controlled output.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \note GPIOPadConfigSet() must also be used to configure the corresponding
-//! pad(s) in order for them to propagate the signal to/from the GPIO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
-               unsigned long ulPinIO)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-    ASSERT((ulPinIO == GPIO_DIR_MODE_IN) || (ulPinIO == GPIO_DIR_MODE_OUT));
-
-    //
-    // Set the pin direction and mode.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_DIR) = ((ulPinIO & 1) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_DIR) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_DIR) & ~(ucPins)));
-}
-
-//*****************************************************************************
-//
-//! Gets the direction and mode of a pin.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPin is the pin number.
-//!
-//! This function gets the direction and control mode for a specified pin on
-//! the selected GPIO port.  The pin can be configured as either an input or
-//! output under software control, or it can be under hardware control.  The
-//! type of control and direction are returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIODirModeSet().
-//
-//*****************************************************************************
-unsigned long
-GPIODirModeGet(unsigned long ulPort, unsigned char ucPin)
-{
-    unsigned long ulDir;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin direction
-    //
-    ulDir = HWREG(ulPort + GPIO_O_GPIO_DIR);
-    return(((ulDir & ucPin) ? 1 : 0));
-}
-
-//*****************************************************************************
-//
-//! Sets the interrupt type for the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ulIntType specifies the type of interrupt trigger mechanism.
-//!
-//! This function sets up the various interrupt trigger mechanisms for the
-//! specified pin(s) on the selected GPIO port.
-//!
-//! The parameter \e ulIntType is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b GPIO_FALLING_EDGE
-//! - \b GPIO_RISING_EDGE
-//! - \b GPIO_BOTH_EDGES
-//! - \b GPIO_LOW_LEVEL
-//! - \b GPIO_HIGH_LEVEL
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \note In order to avoid any spurious interrupts, the user must
-//! ensure that the GPIO inputs remain stable for the duration of
-//! this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
-               unsigned long ulIntType)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-    ASSERT((ulIntType == GPIO_FALLING_EDGE) ||
-           (ulIntType == GPIO_RISING_EDGE) || (ulIntType == GPIO_BOTH_EDGES) ||
-           (ulIntType == GPIO_LOW_LEVEL) || (ulIntType == GPIO_HIGH_LEVEL));
-
-    //
-    // Set the pin interrupt type.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IBE) = ((ulIntType & 1) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_IBE) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_IBE) & ~(ucPins)));
-    HWREG(ulPort + GPIO_O_GPIO_IS) = ((ulIntType & 2) ?
-                                 (HWREG(ulPort + GPIO_O_GPIO_IS) | ucPins) :
-                                 (HWREG(ulPort + GPIO_O_GPIO_IS) & ~(ucPins)));
-    HWREG(ulPort + GPIO_O_GPIO_IEV) = ((ulIntType & 4) ?
-                                  (HWREG(ulPort + GPIO_O_GPIO_IEV) | ucPins) :
-                                  (HWREG(ulPort + GPIO_O_GPIO_IEV) & ~(ucPins)));
-}
-
-//*****************************************************************************
-//
-//! Gets the interrupt type for a pin.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPin is the pin number.
-//!
-//! This function gets the interrupt type for a specified pin on the selected
-//! GPIO port.  The pin can be configured as a falling edge, rising edge, or
-//! both edge detected interrupt, or it can be configured as a low level or
-//! high level detected interrupt.  The type of interrupt detection mechanism
-//! is returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIOIntTypeSet().
-//
-//*****************************************************************************
-unsigned long
-GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin)
-{
-    unsigned long ulIBE, ulIS, ulIEV;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin interrupt type.
-    //
-    ulIBE = HWREG(ulPort + GPIO_O_GPIO_IBE);
-    ulIS = HWREG(ulPort + GPIO_O_GPIO_IS);
-    ulIEV = HWREG(ulPort + GPIO_O_GPIO_IEV);
-    return(((ulIBE & ucPin) ? 1 : 0) | ((ulIS & ucPin) ? 2 : 0) |
-           ((ulIEV & ucPin) ? 4 : 0));
-}
-
-//*****************************************************************************
-//
-//! Enables the specified GPIO interrupts.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to enable.
-//!
-//! This function enables the indicated GPIO interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b GPIO_INT_DMA   - interrupt due to GPIO triggered DMA Done
-//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
-//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
-//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
-//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
-//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
-//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
-//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
-//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Enable the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IM) |= ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the specified GPIO interrupts.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is the bit mask of the interrupt sources to disable.
-//!
-//! This function disables the indicated GPIO interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b GPIO_INT_DMA   - interrupt due to GPIO triggered DMA Done
-//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
-//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
-//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
-//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
-//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
-//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
-//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
-//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntDisable(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Disable the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_IM) &= ~(ulIntFlags);
-}
-
-//*****************************************************************************
-//
-//! Gets interrupt status for the specified GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param bMasked specifies whether masked or raw interrupt status is
-//! returned.
-//!
-//! If \e bMasked is set as \b true, then the masked interrupt status is
-//! returned; otherwise, the raw interrupt status will be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in GPIOIntEnable().
-//
-//*****************************************************************************
-long
-GPIOIntStatus(unsigned long ulPort, tBoolean bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the interrupt status.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ulPort + GPIO_O_GPIO_MIS));
-    }
-    else
-    {
-        return(HWREG(ulPort + GPIO_O_GPIO_RIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears the interrupt for the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! Clears the interrupt for the specified pin(s).
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to GPIOIntEnable().
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntClear(unsigned long ulPort, unsigned long ulIntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Clear the interrupts.
-    //
-    HWREG(ulPort + GPIO_O_GPIO_ICR) = ulIntFlags;
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for a GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param pfnIntHandler is a pointer to the GPIO port interrupt handling
-//! function.
-//!
-//! This function will ensure that the interrupt handler specified by
-//! \e pfnIntHandler is called when an interrupt is detected from the selected
-//! GPIO port.  This function will also enable the corresponding GPIO interrupt
-//! in the interrupt controller; individual pin interrupts and interrupt
-//! sources must be enabled with GPIOIntEnable().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntRegister(unsigned long ulPort, void (*pfnIntHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Get the interrupt number associated with the specified GPIO.
-    //
-    ulPort = GPIOGetIntNumber(ulPort);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(ulPort, pfnIntHandler);
-
-    //
-    // Enable the GPIO interrupt.
-    //
-    IntEnable(ulPort);
-}
-
-//*****************************************************************************
-//
-//! Removes an interrupt handler for a GPIO port.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function will unregister the interrupt handler for the specified
-//! GPIO port.  This function will also disable the corresponding
-//! GPIO port interrupt in the interrupt controller; individual GPIO interrupts
-//! and interrupt sources must be disabled with GPIOIntDisable().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOIntUnregister(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Get the interrupt number associated with the specified GPIO.
-    //
-    ulPort = GPIOGetIntNumber(ulPort);
-
-    //
-    // Disable the GPIO interrupt.
-    //
-    IntDisable(ulPort);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(ulPort);
-}
-
-//*****************************************************************************
-//
-//! Reads the values present of the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//!
-//! The values at the specified pin(s) are read, as specified by \e ucPins.
-//! Values are returned for both input and output pin(s), and the value
-//! for pin(s) that are not specified by \e ucPins are set to 0.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \return Returns a bit-packed byte providing the state of the specified
-//! pin, where bit 0 of the byte represents GPIO port pin 0, bit 1 represents
-//! GPIO port pin 1, and so on.  Any bit that is not specified by \e ucPins
-//! is returned as a 0.  Bits 31:8 should be ignored.
-//
-//*****************************************************************************
-long
-GPIOPinRead(unsigned long ulPort, unsigned char ucPins)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Return the pin value(s).
-    //
-    return(HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))));
-}
-
-//*****************************************************************************
-//
-//! Writes a value to the specified pin(s).
-//!
-//! \param ulPort is the base address of the GPIO port.
-//! \param ucPins is the bit-packed representation of the pin(s).
-//! \param ucVal is the value to write to the pin(s).
-//!
-//! Writes the corresponding bit values to the output pin(s) specified by
-//! \e ucPins.  Writing to a pin configured as an input pin has no effect.
-//!
-//! The pin(s) are specified using a bit-packed byte, where each bit that is
-//! set identifies the pin to be accessed, and where bit 0 of the byte
-//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIOPinWrite(unsigned long ulPort, unsigned char ucPins, unsigned char ucVal)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Write the pins.
-    //
-    HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))) = ucVal;
-}
-
-//*****************************************************************************
-//
-//! Enables a GPIO port as a trigger to start a DMA transaction.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function enables a GPIO port to be used as a trigger to start a uDMA
-//! transaction. The GPIO pin will still generate interrupts if the interrupt is
-//! enabled for the selected pin.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODMATriggerEnable(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Set the pin as a DMA trigger.
-    //
-    if(ulPort == GPIOA0_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x1;
-    }
-    else if(ulPort == GPIOA1_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x2;
-    }
-    else if(ulPort == GPIOA2_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x4;
-    }
-    else if(ulPort == GPIOA3_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x8;
-    }
-}
-
-//*****************************************************************************
-//
-//! Disables a GPIO port as a trigger to start a DMA transaction.
-//!
-//! \param ulPort is the base address of the GPIO port.
-//!
-//! This function disables a GPIO port to be used as a trigger to start a uDMA
-//! transaction.  This function can be used to disable this feature if it was
-//! enabled via a call to GPIODMATriggerEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-GPIODMATriggerDisable(unsigned long ulPort)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(GPIOBaseValid(ulPort));
-
-    //
-    // Set the pin as a DMA trigger.
-    //
-    if(ulPort == GPIOA0_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x1;
-    }
-    else if(ulPort == GPIOA1_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x2;
-    }
-    else if(ulPort == GPIOA2_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x4;
-    }
-    else if(ulPort == GPIOA3_BASE)
-    {
-      HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x8;
-    }
-}
-
-
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/gpio.h b/ports/cc3200/hal/gpio.h
deleted file mode 100644
index 35acf79a60b71..0000000000000
--- a/ports/cc3200/hal/gpio.h
+++ /dev/null
@@ -1,139 +0,0 @@
-//*****************************************************************************
-//
-//  gpio.h
-//
-//  Defines and Macros for GPIO API.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __GPIO_H__
-#define __GPIO_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The following values define the bit field for the ucPins argument to several
-// of the APIs.
-//
-//*****************************************************************************
-#define GPIO_PIN_0              0x00000001  // GPIO pin 0
-#define GPIO_PIN_1              0x00000002  // GPIO pin 1
-#define GPIO_PIN_2              0x00000004  // GPIO pin 2
-#define GPIO_PIN_3              0x00000008  // GPIO pin 3
-#define GPIO_PIN_4              0x00000010  // GPIO pin 4
-#define GPIO_PIN_5              0x00000020  // GPIO pin 5
-#define GPIO_PIN_6              0x00000040  // GPIO pin 6
-#define GPIO_PIN_7              0x00000080  // GPIO pin 7
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIODirModeSet as the ulPinIO parameter, and
-// returned from GPIODirModeGet.
-//
-//*****************************************************************************
-#define GPIO_DIR_MODE_IN        0x00000000  // Pin is a GPIO input
-#define GPIO_DIR_MODE_OUT       0x00000001  // Pin is a GPIO output
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIOIntTypeSet as the ulIntType parameter, and
-// returned from GPIOIntTypeGet.
-//
-//*****************************************************************************
-#define GPIO_FALLING_EDGE       0x00000000  // Interrupt on falling edge
-#define GPIO_RISING_EDGE        0x00000004  // Interrupt on rising edge
-#define GPIO_BOTH_EDGES         0x00000001  // Interrupt on both edges
-#define GPIO_LOW_LEVEL          0x00000002  // Interrupt on low level
-#define GPIO_HIGH_LEVEL         0x00000006  // Interrupt on high level
-
-//*****************************************************************************
-//
-// Values that can be passed to GPIOIntEnable() and GPIOIntDisable() functions
-// in the ulIntFlags parameter.
-//
-//*****************************************************************************
-#define GPIO_INT_DMA            0x00000100
-#define GPIO_INT_PIN_0          0x00000001
-#define GPIO_INT_PIN_1          0x00000002
-#define GPIO_INT_PIN_2          0x00000004
-#define GPIO_INT_PIN_3          0x00000008
-#define GPIO_INT_PIN_4          0x00000010
-#define GPIO_INT_PIN_5          0x00000020
-#define GPIO_INT_PIN_6          0x00000040
-#define GPIO_INT_PIN_7          0x00000080
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
-                           unsigned long ulPinIO);
-extern unsigned long GPIODirModeGet(unsigned long ulPort, unsigned char ucPin);
-extern void GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
-                           unsigned long ulIntType);
-extern void GPIODMATriggerEnable(unsigned long ulPort);
-extern void GPIODMATriggerDisable(unsigned long ulPort);
-extern unsigned long GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin);
-extern void GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags);
-extern void GPIOIntDisable(unsigned long ulPort, unsigned long ulIntFlags);
-extern long GPIOIntStatus(unsigned long ulPort, tBoolean bMasked);
-extern void GPIOIntClear(unsigned long ulPort, unsigned long ulIntFlags);
-extern void GPIOIntRegister(unsigned long ulPort,
-                                void (*pfnIntHandler)(void));
-extern void GPIOIntUnregister(unsigned long ulPort);
-extern long GPIOPinRead(unsigned long ulPort, unsigned char ucPins);
-extern void GPIOPinWrite(unsigned long ulPort, unsigned char ucPins,
-                         unsigned char ucVal);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __GPIO_H__
diff --git a/ports/cc3200/hal/i2c.c b/ports/cc3200/hal/i2c.c
deleted file mode 100644
index 487f93cc2615f..0000000000000
--- a/ports/cc3200/hal/i2c.c
+++ /dev/null
@@ -1,2043 +0,0 @@
-//*****************************************************************************
-//
-//  i2c.c
-//
-//  Driver for Inter-IC (I2C) bus block.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup I2C_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_i2c.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "i2c.h"
-#include "interrupt.h"
-
-//*****************************************************************************
-//
-// A mapping of I2C base address to interrupt number.
-//
-//*****************************************************************************
-static const uint32_t g_ppui32I2CIntMap[][2] =
-{
-    { I2CA0_BASE, INT_I2CA0},
-};
-
-static const int_fast8_t g_i8I2CIntMapRows =
-    sizeof(g_ppui32I2CIntMap) / sizeof(g_ppui32I2CIntMap[0]);
-
-//*****************************************************************************
-//
-//! \internal
-//! Checks an I2C base address.
-//!
-//! \param ui32Base is the base address of the I2C module.
-//!
-//! This function determines if a I2C module base address is valid.
-//!
-//! \return Returns \b true if the base address is valid and \b false
-//! otherwise.
-//
-//*****************************************************************************
-#ifdef DEBUG
-static bool
-_I2CBaseValid(uint32_t ui32Base)
-{
-    return((ui32Base == I2CA0_BASE));
-}
-#else
-#define _I2CBaseValid(ui32Base)         (ui32Base)
-#endif
-
-//*****************************************************************************
-//
-//! \internal
-//! Gets the I2C interrupt number.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! Given a I2C base address, this function returns the corresponding
-//! interrupt number.
-//!
-//! \return Returns an I2C interrupt number, or 0 if \e ui32Base is invalid.
-//
-//*****************************************************************************
-static uint32_t
-_I2CIntNumberGet(uint32_t ui32Base)
-{
-    int_fast8_t i8Idx, i8Rows;
-    const uint32_t (*ppui32I2CIntMap)[2];
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    ppui32I2CIntMap = g_ppui32I2CIntMap;
-    i8Rows = g_i8I2CIntMapRows;
-
-    //
-    // Loop through the table that maps I2C base addresses to interrupt
-    // numbers.
-    //
-    for(i8Idx = 0; i8Idx < i8Rows; i8Idx++)
-    {
-        //
-        // See if this base address matches.
-        //
-        if(ppui32I2CIntMap[i8Idx][0] == ui32Base)
-        {
-            //
-            // Return the corresponding interrupt number.
-            //
-            return(ppui32I2CIntMap[i8Idx][1]);
-        }
-    }
-
-    //
-    // The base address could not be found, so return an error.
-    //
-    return(0);
-}
-
-//*****************************************************************************
-//
-//! Initializes the I2C Master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32I2CClk is the rate of the clock supplied to the I2C module.
-//! \param bFast set up for fast data transfers.
-//!
-//! This function initializes operation of the I2C Master block by configuring
-//! the bus speed for the master and enabling the I2C Master block.
-//!
-//! If the parameter \e bFast is \b true, then the master block is set up to
-//! transfer data at 400 Kbps; otherwise, it is set up to transfer data at
-//! 100 Kbps.  If Fast Mode Plus (1 Mbps) is desired, software should manually
-//! write the I2CMTPR after calling this function.  For High Speed (3.4 Mbps)
-//! mode, a specific command is used to switch to the faster clocks after the
-//! initial communication with the slave is done at either 100 Kbps or
-//! 400 Kbps.
-//!
-//! The peripheral clock is the same as the processor clock.  This value is
-//! returned by SysCtlClockGet(), or it can be explicitly hard coded if it is
-//! constant and known (to save the code/execution overhead of a call to
-//! SysCtlClockGet()).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq)
-{
-    uint32_t ui32TPR;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Must enable the device before doing anything else.
-    //
-    I2CMasterEnable(ui32Base);
-
-    //
-    // Compute the clock divider that achieves the fastest speed less than or
-    // equal to the desired speed.  The numerator is biased to favor a larger
-    // clock divider so that the resulting clock is always less than or equal
-    // to the desired clock, never greater.
-    //
-    ui32TPR = ((80000000 + (2 * 10 * ui32SCLFreq) - 1) /
-               (2 * 10 * ui32SCLFreq)) - 1;
-    HWREG(ui32Base + I2C_O_MTPR) = ui32TPR;
-
-    //
-    // Check to see if this I2C peripheral is High-Speed enabled.  If yes, also
-    // choose the fastest speed that is less than or equal to 3.4 Mbps.
-    //
-    if(HWREG(ui32Base + I2C_O_PP) & I2C_PP_HS)
-    {
-        ui32TPR = ((80000000 + (2 * 3 * 3400000) - 1) /
-                   (2 * 3 * 3400000)) - 1;
-        HWREG(ui32Base + I2C_O_MTPR) = I2C_MTPR_HS | ui32TPR;
-    }
-}
-
-//*****************************************************************************
-//
-//! Initializes the I2C Slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8SlaveAddr 7-bit slave address
-//!
-//! This function initializes operation of the I2C Slave block by configuring
-//! the slave address and enabling the I2C Slave block.
-//!
-//! The parameter \e ui8SlaveAddr is the value that is compared against the
-//! slave address sent by an I2C master.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Must enable the device before doing anything else.
-    //
-    I2CSlaveEnable(ui32Base);
-
-    //
-    // Set up the slave address.
-    //
-    HWREG(ui32Base + I2C_O_SOAR) = ui8SlaveAddr;
-}
-
-//*****************************************************************************
-//
-//! Sets the I2C slave address.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8AddrNum determines which slave address is set.
-//! \param ui8SlaveAddr is the 7-bit slave address
-//!
-//! This function writes the specified slave address.  The \e ui32AddrNum field
-//! dictates which slave address is configured.  For example, a value of 0
-//! configures the primary address and a value of 1 configures the secondary.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum, uint8_t ui8SlaveAddr)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8AddrNum > 1));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Determine which slave address is being set.
-    //
-    switch(ui8AddrNum)
-    {
-        //
-        // Set up the primary slave address.
-        //
-        case 0:
-        {
-            HWREG(ui32Base + I2C_O_SOAR) = ui8SlaveAddr;
-            break;
-        }
-
-        //
-        // Set up and enable the secondary slave address.
-        //
-        case 1:
-        {
-            HWREG(ui32Base + I2C_O_SOAR2) = I2C_SOAR2_OAR2EN | ui8SlaveAddr;
-            break;
-        }
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function enables operation of the I2C Master block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_MFE;
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This fucntion enables operation of the I2C Slave block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the clock to the slave block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) |= I2C_MCR_SFE;
-
-    //
-    // Enable the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C master block.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function disables operation of the I2C master block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) &= ~(I2C_MCR_MFE);
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C slave block.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables operation of the I2C slave block.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = 0;
-
-    //
-    // Disable the clock to the slave block.
-    //
-    HWREG(ui32Base + I2C_O_MCR) &= ~(I2C_MCR_SFE);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the I2C module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! I2C interrupt occurs.
-//!
-//! This function sets the handler to be called when an I2C interrupt occurs.
-//! This function enables the global interrupt in the interrupt controller;
-//! specific I2C interrupts must be enabled via I2CMasterIntEnable() and
-//! I2CSlaveIntEnable().  If necessary, it is the interrupt handler's
-//! responsibility to clear the interrupt source via I2CMasterIntClear() and
-//! I2CSlaveIntClear().
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void))
-{
-    uint32_t ui32Int;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Determine the interrupt number based on the I2C port.
-    //
-    ui32Int = _I2CIntNumberGet(ui32Base);
-
-    ASSERT(ui32Int != 0);
-
-    //
-    // Register the interrupt handler, returning an error if an error occurs.
-    //
-    IntRegister(ui32Int, pfnHandler);
-
-    //
-    // Enable the I2C interrupt.
-    //
-    IntEnable(ui32Int);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the I2C module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function clears the handler to be called when an I2C interrupt
-//! occurs.  This function also masks off the interrupt in the interrupt r
-//! controller so that the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CIntUnregister(uint32_t ui32Base)
-{
-    uint32_t ui32Int;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Determine the interrupt number based on the I2C port.
-    //
-    ui32Int = _I2CIntNumberGet(ui32Base);
-
-    ASSERT(ui32Int != 0);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(ui32Int);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(ui32Int);
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Master interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function enables the I2C Master interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) = 1;
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2C Master interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b I2C_MASTER_INT_RX_FIFO_FULL - RX FIFO Full interrupt
-//! - \b I2C_MASTER_INT_TX_FIFO_EMPTY - TX FIFO Empty interrupt
-//! - \b I2C_MASTER_INT_RX_FIFO_REQ - RX FIFO Request interrupt
-//! - \b I2C_MASTER_INT_TX_FIFO_REQ - TX FIFO Request interrupt
-//! - \b I2C_MASTER_INT_ARB_LOST - Arbitration Lost interrupt
-//! - \b I2C_MASTER_INT_STOP - Stop Condition interrupt
-//! - \b I2C_MASTER_INT_START - Start Condition interrupt
-//! - \b I2C_MASTER_INT_NACK - Address/Data NACK interrupt
-//! - \b I2C_MASTER_INT_TX_DMA_DONE - TX DMA Complete interrupt
-//! - \b I2C_MASTER_INT_RX_DMA_DONE - RX DMA Complete interrupt
-//! - \b I2C_MASTER_INT_TIMEOUT - Clock Timeout interrupt
-//! - \b I2C_MASTER_INT_DATA - Data interrupt
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) |= ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Enables the I2C Slave interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function enables the I2C Slave interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) |= I2C_SLAVE_INT_DATA;
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2C Slave interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter is the logical OR of any of the following:
-//!
-//! - \b I2C_SLAVE_INT_RX_FIFO_FULL - RX FIFO Full interrupt
-//! - \b I2C_SLAVE_INT_TX_FIFO_EMPTY - TX FIFO Empty interrupt
-//! - \b I2C_SLAVE_INT_RX_FIFO_REQ - RX FIFO Request interrupt
-//! - \b I2C_SLAVE_INT_TX_FIFO_REQ - TX FIFO Request interrupt
-//! - \b I2C_SLAVE_INT_TX_DMA_DONE - TX DMA Complete interrupt
-//! - \b I2C_SLAVE_INT_RX_DMA_DONE - RX DMA Complete interrupt
-//! - \b I2C_SLAVE_INT_STOP - Stop condition detected interrupt
-//! - \b I2C_SLAVE_INT_START - Start condition detected interrupt
-//! - \b I2C_SLAVE_INT_DATA - Data interrupt
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) |= ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C Master interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function disables the I2C Master interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) = 0;
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be
-//!        disabled.
-//!
-//! This function disables the indicated I2C Master interrupt sources.  Only
-//! the sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CMasterIntEnableEx().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the master interrupt.
-    //
-    HWREG(ui32Base + I2C_O_MIMR) &= ~ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Disables the I2C Slave interrupt.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables the I2C Slave interrupt source.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntDisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) &= ~I2C_SLAVE_INT_DATA;
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is the bit mask of the interrupt sources to be
-//!        disabled.
-//!
-//! This function disables the indicated I2C Slave interrupt sources.  Only
-//! the sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CSlaveIntEnableEx().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable the slave interrupt.
-    //
-    HWREG(ui32Base + I2C_O_SIMR) &= ~ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Master interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Master module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return The current interrupt status, returned as \b true if active
-//! or \b false if not active.
-//
-//*****************************************************************************
-bool
-I2CMasterIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return((HWREG(ui32Base + I2C_O_MMIS)) ? true : false);
-    }
-    else
-    {
-        return((HWREG(ui32Base + I2C_O_MRIS)) ? true : false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Master interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Master module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in I2CMasterIntEnableEx().
-//
-//*****************************************************************************
-uint32_t
-I2CMasterIntStatusEx(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ui32Base + I2C_O_MMIS));
-    }
-    else
-    {
-        return(HWREG(ui32Base + I2C_O_MRIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Slave interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Slave module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return The current interrupt status, returned as \b true if active
-//! or \b false if not active.
-//
-//*****************************************************************************
-bool
-I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return((HWREG(ui32Base + I2C_O_SMIS)) ? true : false);
-    }
-    else
-    {
-        return((HWREG(ui32Base + I2C_O_SRIS)) ? true : false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the current I2C Slave interrupt status.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bMasked is false if the raw interrupt status is requested and
-//! true if the masked interrupt status is requested.
-//!
-//! This function returns the interrupt status for the I2C Slave module.
-//! Either the raw interrupt status or the status of interrupts that are
-//! allowed to reflect to the processor can be returned.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in I2CSlaveIntEnableEx().
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveIntStatusEx(uint32_t ui32Base, bool bMasked)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return either the interrupt status or the raw interrupt status as
-    // requested.
-    //
-    if(bMasked)
-    {
-        return(HWREG(ui32Base + I2C_O_SMIS));
-    }
-    else
-    {
-        return(HWREG(ui32Base + I2C_O_SRIS));
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! The I2C Master interrupt source is cleared, so that it no longer
-//! asserts.  This function must be called in the interrupt handler to keep the
-//! interrupt from being triggered again immediately upon exit.
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntClear(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C master interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_MICR) = I2C_MICR_IC;
-
-    //
-    // Workaround for I2C master interrupt clear errata for some
-    // devices.  For later devices, this write is ignored and therefore
-    // harmless (other than the slight performance hit).
-    //
-    HWREG(ui32Base + I2C_O_MMIS) = I2C_MICR_IC;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Master interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2C Master interrupt sources are cleared, so that they no
-//! longer assert.  This function must be called in the interrupt handler to
-//! keep the interrupt from being triggered again immediately upon exit.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CMasterIntEnableEx().
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C master interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_MICR) = ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! The I2C Slave interrupt source is cleared, so that it no longer asserts.
-//! This function must be called in the interrupt handler to keep the interrupt
-//! from being triggered again immediately upon exit.
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntClear(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C slave interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_SICR) = I2C_SICR_DATAIC;
-}
-
-//*****************************************************************************
-//
-//! Clears I2C Slave interrupt sources.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2C Slave interrupt sources are cleared, so that they no
-//! longer assert.  This function must be called in the interrupt handler to
-//! keep the interrupt from being triggered again immediately upon exit.
-//!
-//! The \e ui32IntFlags parameter has the same definition as the
-//! \e ui32IntFlags parameter to I2CSlaveIntEnableEx().
-//!
-//! \note Because there is a write buffer in the Cortex-M processor, it may
-//! take several clock cycles before the interrupt source is actually cleared.
-//! Therefore, it is recommended that the interrupt source be cleared early in
-//! the interrupt handler (as opposed to the very last action) to avoid
-//! returning from the interrupt handler before the interrupt source is
-//! actually cleared.  Failure to do so may result in the interrupt handler
-//! being immediately reentered (because the interrupt controller still sees
-//! the interrupt source asserted).
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear the I2C slave interrupt source.
-    //
-    HWREG(ui32Base + I2C_O_SICR) = ui32IntFlags;
-}
-
-//*****************************************************************************
-//
-//! Sets the address that the I2C Master places on the bus.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8SlaveAddr 7-bit slave address
-//! \param bReceive flag indicating the type of communication with the slave
-//!
-//! This function configures the address that the I2C Master places on the
-//! bus when initiating a transaction.  When the \e bReceive parameter is set
-//! to \b true, the address indicates that the I2C Master is initiating a
-//! read from the slave; otherwise the address indicates that the I2C
-//! Master is initiating a write to the slave.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterSlaveAddrSet(uint32_t ui32Base, uint8_t ui8SlaveAddr,
-                      bool bReceive)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT(!(ui8SlaveAddr & 0x80));
-
-    //
-    // Set the address of the slave with which the master will communicate.
-    //
-    HWREG(ui32Base + I2C_O_MSA) = (ui8SlaveAddr << 1) | bReceive;
-}
-
-//*****************************************************************************
-//
-//! Reads the state of the SDA and SCL pins.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns the state of the I2C bus by providing the real time
-//! values of the SDA and SCL pins.
-//!
-//!
-//! \return Returns the state of the bus with SDA in bit position 1 and SCL in
-//! bit position 0.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterLineStateGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the line state.
-    //
-    return(HWREG(ui32Base + I2C_O_MBMON));
-}
-
-//*****************************************************************************
-//
-//! Indicates whether or not the I2C Master is busy.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns an indication of whether or not the I2C Master is
-//! busy transmitting or receiving data.
-//!
-//! \return Returns \b true if the I2C Master is busy; otherwise, returns
-//! \b false.
-//
-//*****************************************************************************
-bool
-I2CMasterBusy(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the busy status.
-    //
-    if(HWREG(ui32Base + I2C_O_MCS) & I2C_MCS_BUSY)
-    {
-        return(true);
-    }
-    else
-    {
-        return(false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Indicates whether or not the I2C bus is busy.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns an indication of whether or not the I2C bus is busy.
-//! This function can be used in a multi-master environment to determine if
-//! another master is currently using the bus.
-//!
-//! \return Returns \b true if the I2C bus is busy; otherwise, returns
-//! \b false.
-//
-//*****************************************************************************
-bool
-I2CMasterBusBusy(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the bus busy status.
-    //
-    if(HWREG(ui32Base + I2C_O_MCS) & I2C_MCS_BUSBSY)
-    {
-        return(true);
-    }
-    else
-    {
-        return(false);
-    }
-}
-
-//*****************************************************************************
-//
-//! Controls the state of the I2C Master module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Cmd command to be issued to the I2C Master module.
-//!
-//! This function is used to control the state of the Master module send and
-//! receive operations.  The \e ui8Cmd parameter can be one of the following
-//! values:
-//!
-//! - \b I2C_MASTER_CMD_SINGLE_SEND
-//! - \b I2C_MASTER_CMD_SINGLE_RECEIVE
-//! - \b I2C_MASTER_CMD_BURST_SEND_START
-//! - \b I2C_MASTER_CMD_BURST_SEND_CONT
-//! - \b I2C_MASTER_CMD_BURST_SEND_FINISH
-//! - \b I2C_MASTER_CMD_BURST_SEND_ERROR_STOP
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_START
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_CONT
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_FINISH
-//! - \b I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP
-//! - \b I2C_MASTER_CMD_QUICK_COMMAND
-//! - \b I2C_MASTER_CMD_HS_MASTER_CODE_SEND
-//! - \b I2C_MASTER_CMD_FIFO_SINGLE_SEND
-//! - \b I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_START
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_CONT
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH
-//! - \b I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH
-//! - \b I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-    ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||
-           (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_QUICK_COMMAND) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_SEND) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH) ||
-           (ui32Cmd == I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP) ||
-           (ui32Cmd == I2C_MASTER_CMD_HS_MASTER_CODE_SEND));
-
-    //
-    // Send the command.
-    //
-    HWREG(ui32Base + I2C_O_MCS) = ui32Cmd;
-}
-
-//*****************************************************************************
-//
-//! Gets the error status of the I2C Master module.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function is used to obtain the error status of the Master module send
-//! and receive operations.
-//!
-//! \return Returns the error status, as one of \b I2C_MASTER_ERR_NONE,
-//! \b I2C_MASTER_ERR_ADDR_ACK, \b I2C_MASTER_ERR_DATA_ACK, or
-//! \b I2C_MASTER_ERR_ARB_LOST.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterErr(uint32_t ui32Base)
-{
-    uint32_t ui32Err;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Get the raw error state
-    //
-    ui32Err = HWREG(ui32Base + I2C_O_MCS);
-
-    //
-    // If the I2C master is busy, then all the other bit are invalid, and
-    // don't have an error to report.
-    //
-    if(ui32Err & I2C_MCS_BUSY)
-    {
-        return(I2C_MASTER_ERR_NONE);
-    }
-
-    //
-    // Check for errors.
-    //
-    if(ui32Err & (I2C_MCS_ERROR | I2C_MCS_ARBLST))
-    {
-        return(ui32Err & (I2C_MCS_ARBLST | I2C_MCS_ACK | I2C_MCS_ADRACK));
-    }
-    else
-    {
-        return(I2C_MASTER_ERR_NONE);
-    }
-}
-
-//*****************************************************************************
-//
-//! Transmits a byte from the I2C Master.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8Data data to be transmitted from the I2C Master.
-//!
-//! This function places the supplied data into I2C Master Data Register.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the byte.
-    //
-    HWREG(ui32Base + I2C_O_MDR) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Receives a byte that has been sent to the I2C Master.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function reads a byte of data from the I2C Master Data Register.
-//!
-//! \return Returns the byte received from by the I2C Master, cast as an
-//! uint32_t.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterDataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_MDR));
-}
-
-//*****************************************************************************
-//
-//! Sets the Master clock timeout value.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Value is the number of I2C clocks before the timeout is
-//!        asserted.
-//!
-//! This function enables and configures the clock low timeout feature in the
-//! I2C peripheral.  This feature is implemented as a 12-bit counter, with the
-//! upper 8-bits being programmable.  For example, to program a timeout of 20ms
-//! with a 100kHz SCL frequency, \e ui32Value would be 0x7d.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the timeout value.
-    //
-    HWREG(ui32Base + I2C_O_MCLKOCNT) = ui32Value;
-}
-
-//*****************************************************************************
-//
-//! Configures ACK override behavior of the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bEnable enables or disables ACK override.
-//!
-//! This function enables or disables ACK override, allowing the user
-//! application to drive the value on SDA during the ACK cycle.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable or disable based on bEnable.
-    //
-    if(bEnable)
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOEN;
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOEN;
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes the ACK value.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param bACK chooses whether to ACK (true) or NACK (false) the transfer.
-//!
-//! This function puts the desired ACK value on SDA during the ACK cycle.  The
-//! value written is only valid when ACK override is enabled using
-//! I2CSlaveACKOverride().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // ACK or NACK based on the value of bACK.
-    //
-    if(bACK)
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOVAL;
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOVAL;
-    }
-}
-
-//*****************************************************************************
-//
-//! Gets the I2C Slave module status
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function returns the action requested from a master, if any.
-//! Possible values are:
-//!
-//! - \b I2C_SLAVE_ACT_NONE
-//! - \b I2C_SLAVE_ACT_RREQ
-//! - \b I2C_SLAVE_ACT_TREQ
-//! - \b I2C_SLAVE_ACT_RREQ_FBR
-//! - \b I2C_SLAVE_ACT_OWN2SEL
-//! - \b I2C_SLAVE_ACT_QCMD
-//! - \b I2C_SLAVE_ACT_QCMD_DATA
-//!
-//! \note Not all devices support the second I2C slave's own address
-//! or the quick command function.  Please consult the device data sheet to
-//! determine if these features are supported.
-//!
-//! \return Returns \b I2C_SLAVE_ACT_NONE to indicate that no action has been
-//! requested of the I2C Slave module, \b I2C_SLAVE_ACT_RREQ to indicate that
-//! an I2C master has sent data to the I2C Slave module, \b I2C_SLAVE_ACT_TREQ
-//! to indicate that an I2C master has requested that the I2C Slave module send
-//! data, \b I2C_SLAVE_ACT_RREQ_FBR to indicate that an I2C master has sent
-//! data to the I2C slave and the first byte following the slave's own address
-//! has been received, \b I2C_SLAVE_ACT_OWN2SEL to indicate that the second I2C
-//! slave address was matched, \b I2C_SLAVE_ACT_QCMD to indicate that a quick
-//! command was received, and \b I2C_SLAVE_ACT_QCMD_DATA to indicate that the
-//! data bit was set when the quick command was received.
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveStatus(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the slave status.
-    //
-    return(HWREG(ui32Base + I2C_O_SCSR));
-}
-
-//*****************************************************************************
-//
-//! Transmits a byte from the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui8Data is the data to be transmitted from the I2C Slave
-//!
-//! This function places the supplied data into I2C Slave Data Register.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Write the byte.
-    //
-    HWREG(ui32Base + I2C_O_SDR) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Receives a byte that has been sent to the I2C Slave.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function reads a byte of data from the I2C Slave Data Register.
-//!
-//! \return Returns the byte received from by the I2C Slave, cast as an
-//! uint32_t.
-//
-//*****************************************************************************
-uint32_t
-I2CSlaveDataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_SDR));
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C transmit (TX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui32Config is the configuration of the FIFO using specified macros.
-//!
-//! This configures the I2C peripheral's transmit FIFO.  The transmit FIFO can
-//! be used by the master or slave, but not both.  The following macros are
-//! used to configure the TX FIFO behavior for master or slave, with or without
-//! DMA:
-//!
-//! \b I2C_FIFO_CFG_TX_MASTER, \b I2C_FIFO_CFG_TX_SLAVE,
-//! \b I2C_FIFO_CFG_TX_MASTER_DMA, \b I2C_FIFO_CFG_TX_SLAVE_DMA
-//!
-//! To select the trigger level, one of the following macros should be used:
-//!
-//! \b I2C_FIFO_CFG_TX_TRIG_1, \b I2C_FIFO_CFG_TX_TRIG_2,
-//! \b I2C_FIFO_CFG_TX_TRIG_3, \b I2C_FIFO_CFG_TX_TRIG_4,
-//! \b I2C_FIFO_CFG_TX_TRIG_5, \b I2C_FIFO_CFG_TX_TRIG_6,
-//! \b I2C_FIFO_CFG_TX_TRIG_7, \b I2C_FIFO_CFG_TX_TRIG_8
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear transmit configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) &= 0xffff0000;
-
-    //
-    // Store new transmit configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Flushes the transmit (TX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function flushes the I2C transmit FIFO.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CTxFIFOFlush(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Flush the TX FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= I2C_FIFOCTL_TXFLUSH;
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C receive (RX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui32Config is the configuration of the FIFO using specified macros.
-//!
-//! This configures the I2C peripheral's receive FIFO.  The receive FIFO can be
-//! used by the master or slave, but not both.  The following macros are used
-//! to configure the RX FIFO behavior for master or slave, with or without DMA:
-//!
-//! \b I2C_FIFO_CFG_RX_MASTER, \b I2C_FIFO_CFG_RX_SLAVE,
-//! \b I2C_FIFO_CFG_RX_MASTER_DMA, \b I2C_FIFO_CFG_RX_SLAVE_DMA
-//!
-//! To select the trigger level, one of the following macros should be used:
-//!
-//! \b I2C_FIFO_CFG_RX_TRIG_1, \b I2C_FIFO_CFG_RX_TRIG_2,
-//! \b I2C_FIFO_CFG_RX_TRIG_3, \b I2C_FIFO_CFG_RX_TRIG_4,
-//! \b I2C_FIFO_CFG_RX_TRIG_5, \b I2C_FIFO_CFG_RX_TRIG_6,
-//! \b I2C_FIFO_CFG_RX_TRIG_7, \b I2C_FIFO_CFG_RX_TRIG_8
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Clear receive configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) &= 0x0000ffff;
-
-    //
-    // Store new receive configuration data.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Flushes the receive (RX) FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function flushes the I2C receive FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CRxFIFOFlush(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Flush the TX FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFOCTL) |= I2C_FIFOCTL_RXFLUSH;
-}
-
-//*****************************************************************************
-//
-//! Gets the current FIFO status.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function retrieves the status for both the transmit (TX) and receive
-//! (RX) FIFOs.  The trigger level for the transmit FIFO is set using
-//! I2CTxFIFOConfigSet() and for the receive FIFO using I2CTxFIFOConfigSet().
-//!
-//! \return Returns the FIFO status, enumerated as a bit field containing
-//! \b I2C_FIFO_RX_BELOW_TRIG_LEVEL, \b I2C_FIFO_RX_FULL, \b I2C_FIFO_RX_EMPTY,
-//! \b I2C_FIFO_TX_BELOW_TRIG_LEVEL, \b I2C_FIFO_TX_FULL, and
-//! \b I2C_FIFO_TX_EMPTY.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFOStatus(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Return the contents of the FIFO status register.
-    //
-    return(HWREG(ui32Base + I2C_O_FIFOSTATUS));
-}
-
-//*****************************************************************************
-//
-//! Writes a data byte to the I2C transmit FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui8Data is the data to be placed into the transmit FIFO.
-//!
-//! This function adds a byte of data to the I2C transmit FIFO.  If there is
-//! no space available in the FIFO,  this function waits for space to become
-//! available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Wait until there is space.
-    //
-    while(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_TXFF)
-    {
-    }
-
-    //
-    // Place data into the FIFO.
-    //
-    HWREG(ui32Base + I2C_O_FIFODATA) = ui8Data;
-}
-
-//*****************************************************************************
-//
-//! Writes a data byte to the I2C transmit FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param ui8Data is the data to be placed into the transmit FIFO.
-//!
-//! This function adds a byte of data to the I2C transmit FIFO.  If there is
-//! no space available in the FIFO, this function returns a zero.
-//!
-//! \return The number of elements added to the I2C transmit FIFO.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataPutNonBlocking(uint32_t ui32Base, uint8_t ui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // If FIFO is full, return zero.
-    //
-    if(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_TXFF)
-    {
-        return(0);
-    }
-    else
-    {
-        HWREG(ui32Base + I2C_O_FIFODATA) = ui8Data;
-        return(1);
-    }
-}
-
-//*****************************************************************************
-//
-//! Reads a byte from the I2C receive FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//!
-//! This function reads a byte of data from I2C receive FIFO and places it in
-//! the location specified by the \e pui8Data parameter.  If there is no data
-//! available, this function waits until data is received before returning.
-//!
-//! \return The data byte.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Wait until there is data to read.
-    //
-    while(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_RXFE)
-    {
-    }
-
-    //
-    // Read a byte.
-    //
-    return(HWREG(ui32Base + I2C_O_FIFODATA));
-}
-
-//*****************************************************************************
-//
-//! Reads a byte from the I2C receive FIFO.
-//!
-//! \param ui32Base is the base address of the I2C Master or Slave module.
-//! \param pui8Data is a pointer where the read data is stored.
-//!
-//! This function reads a byte of data from I2C receive FIFO and places it in
-//! the location specified by the \e pui8Data parameter.  If there is no data
-//! available, this functions returns 0.
-//!
-//! \return The number of elements read from the I2C receive FIFO.
-//
-//*****************************************************************************
-uint32_t
-I2CFIFODataGetNonBlocking(uint32_t ui32Base, uint8_t *pui8Data)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // If nothing in the FIFO, return zero.
-    //
-    if(HWREG(ui32Base + I2C_O_FIFOSTATUS) & I2C_FIFOSTATUS_RXFE)
-    {
-        return(0);
-    }
-    else
-    {
-        *pui8Data = HWREG(ui32Base + I2C_O_FIFODATA);
-        return(1);
-    }
-}
-
-//*****************************************************************************
-//
-//! Set the burst length for a I2C master FIFO operation.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui8Length is the length of the burst transfer.
-//!
-//! This function configures the burst length for a I2C Master FIFO operation.
-//! The burst field is limited to 8 bits or 256 bytes.  The burst length
-//! applies to a single I2CMCS BURST operation meaning that it specifies the
-//! burst length for only the current operation (can be TX or RX).  Each burst
-//! operation must configure the burst length prior to writing the BURST bit
-//! in the I2CMCS using I2CMasterControl().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterBurstLengthSet(uint32_t ui32Base, uint8_t ui8Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base) && (ui8Length < 255));
-
-    //
-    // Set the burst length.
-    //
-    HWREG(ui32Base + I2C_O_MBLEN) = ui8Length;
-}
-
-//*****************************************************************************
-//
-//! Returns the current value of the burst transfer counter.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//!
-//! This function returns the current value of the burst transfer counter that
-//! is used by the FIFO mechanism.  Software can use this value to determine
-//! how many bytes remain in a transfer, or where in the transfer the burst
-//! operation was if an error has occurred.
-//!
-//! \return None.
-//
-//*****************************************************************************
-uint32_t
-I2CMasterBurstCountGet(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Get burst count.
-    //
-    return(HWREG(ui32Base + I2C_O_MBCNT));
-}
-
-//*****************************************************************************
-//
-//! Configures the I2C Master glitch filter.
-//!
-//! \param ui32Base is the base address of the I2C Master module.
-//! \param ui32Config is the glitch filter configuration.
-//!
-//! This function configures the I2C Master glitch filter.  The value passed in
-//! to \e ui32Config determines the sampling range of the glitch filter, which
-//! is configurable between 1 and 32 system clock cycles.  The default
-//! configuration of the glitch filter is 0 system clock cycles, which means
-//! that it's disabled.
-//!
-//! The \e ui32Config field should be any of the following values:
-//!
-//! - \b I2C_MASTER_GLITCH_FILTER_DISABLED
-//! - \b I2C_MASTER_GLITCH_FILTER_1
-//! - \b I2C_MASTER_GLITCH_FILTER_2
-//! - \b I2C_MASTER_GLITCH_FILTER_3
-//! - \b I2C_MASTER_GLITCH_FILTER_4
-//! - \b I2C_MASTER_GLITCH_FILTER_8
-//! - \b I2C_MASTER_GLITCH_FILTER_16
-//! - \b I2C_MASTER_GLITCH_FILTER_32
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CMasterGlitchFilterConfigSet(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Configure the glitch filter field of MTPR.
-    //
-    HWREG(ui32Base + I2C_O_MTPR) |= ui32Config;
-}
-
-//*****************************************************************************
-//
-//! Enables FIFO usage for the I2C Slave module.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//! \param ui32Config is the desired FIFO configuration of the I2C Slave.
-//!
-//! This function configures the I2C Slave module to use the FIFO(s).  This
-//! function should be used in combination with I2CTxFIFOConfigSet() and/or
-//! I2CRxFIFOConfigSet(), which configure the FIFO trigger level and tell
-//! the FIFO hardware whether to interact with the I2C Master or Slave.  The
-//! application appropriate combination of \b I2C_SLAVE_TX_FIFO_ENABLE and
-//! \b I2C_SLAVE_RX_FIFO_ENABLE should be passed in to the \e ui32Config
-//! field.
-//!
-//! The Slave I2CSCSR register is write-only, so any call to I2CSlaveEnable(),
-//! I2CSlaveDisable or I2CSlaveFIFOEnable() overwrites the slave configuration.
-//! Therefore, application software should call I2CSlaveEnable() followed by
-//! I2CSlaveFIFOEnable() with the desired FIFO configuration.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Enable the FIFOs for the slave.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = ui32Config | I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-//! Disable FIFO usage for the I2C Slave module.
-//!
-//! \param ui32Base is the base address of the I2C Slave module.
-//!
-//! This function disables the FIFOs for the I2C Slave.  After calling this
-//! this function, the FIFOs are disabled, but the Slave remains active.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-I2CSlaveFIFODisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(_I2CBaseValid(ui32Base));
-
-    //
-    // Disable slave FIFOs.
-    //
-    HWREG(ui32Base + I2C_O_SCSR) = I2C_SCSR_DA;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/i2c.h b/ports/cc3200/hal/i2c.h
deleted file mode 100644
index d966dbf56aeed..0000000000000
--- a/ports/cc3200/hal/i2c.h
+++ /dev/null
@@ -1,360 +0,0 @@
-//*****************************************************************************
-//
-//  i2c.h
-//
-//  Prototypes for the I2C Driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __DRIVERLIB_I2C_H__
-#define __DRIVERLIB_I2C_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Defines for the API.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// Interrupt defines.
-//
-//*****************************************************************************
-#define I2C_INT_MASTER          0x00000001
-#define I2C_INT_SLAVE           0x00000002
-
-//*****************************************************************************
-//
-// I2C Master commands.
-//
-//*****************************************************************************
-#define I2C_MASTER_CMD_SINGLE_SEND                                            \
-                                0x00000007
-#define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
-                                0x00000007
-#define I2C_MASTER_CMD_BURST_SEND_START                                       \
-                                0x00000003
-#define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
-                                0x00000001
-#define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
-                                0x00000005
-#define I2C_MASTER_CMD_BURST_SEND_STOP                                        \
-                                0x00000004
-#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
-                                0x00000004
-#define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
-                                0x0000000b
-#define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
-                                0x00000009
-#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
-                                0x00000005
-#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
-                                0x00000004
-#define I2C_MASTER_CMD_QUICK_COMMAND                                          \
-                                0x00000027
-#define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \
-                                0x00000013
-#define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \
-                                0x00000046
-#define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \
-                                0x00000046
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \
-                                0x00000042
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \
-                                0x00000040
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \
-                                0x00000044
-#define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \
-                                0x00000004
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \
-                                0x0000004a
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \
-                                0x00000048
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \
-                                0x00000044
-#define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \
-                                0x00000004
-
-//*****************************************************************************
-//
-// I2C Master glitch filter configuration.
-//
-//*****************************************************************************
-#define I2C_MASTER_GLITCH_FILTER_DISABLED                                     \
-                                0
-#define I2C_MASTER_GLITCH_FILTER_1                                            \
-                                0x00010000
-#define I2C_MASTER_GLITCH_FILTER_2                                            \
-                                0x00020000
-#define I2C_MASTER_GLITCH_FILTER_3                                            \
-                                0x00030000
-#define I2C_MASTER_GLITCH_FILTER_4                                            \
-                                0x00040000
-#define I2C_MASTER_GLITCH_FILTER_8                                            \
-                                0x00050000
-#define I2C_MASTER_GLITCH_FILTER_16                                           \
-                                0x00060000
-#define I2C_MASTER_GLITCH_FILTER_32                                           \
-                                0x00070000
-
-//*****************************************************************************
-//
-// I2C Master error status.
-//
-//*****************************************************************************
-#define I2C_MASTER_ERR_NONE     0
-#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
-#define I2C_MASTER_ERR_DATA_ACK 0x00000008
-#define I2C_MASTER_ERR_ARB_LOST 0x00000010
-#define I2C_MASTER_ERR_CLK_TOUT 0x00000080
-
-//*****************************************************************************
-//
-// I2C Slave action requests
-//
-//*****************************************************************************
-#define I2C_SLAVE_ACT_NONE      0
-#define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
-#define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
-#define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte
-#define I2C_SLAVE_ACT_OWN2SEL   0x00000008  // Master requested secondary slave
-#define I2C_SLAVE_ACT_QCMD      0x00000010  // Master has sent a Quick Command
-#define I2C_SLAVE_ACT_QCMD_DATA 0x00000020  // Master Quick Command value
-
-//*****************************************************************************
-//
-// Miscellaneous I2C driver definitions.
-//
-//*****************************************************************************
-#define I2C_MASTER_MAX_RETRIES  1000        // Number of retries
-
-//*****************************************************************************
-//
-// I2C Master interrupts.
-//
-//*****************************************************************************
-#define I2C_MASTER_INT_RX_FIFO_FULL                                           \
-                                0x00000800  // RX FIFO Full Interrupt
-#define I2C_MASTER_INT_TX_FIFO_EMPTY                                          \
-                                0x00000400  // TX FIFO Empty Interrupt
-#define I2C_MASTER_INT_RX_FIFO_REQ                                            \
-                                0x00000200  // RX FIFO Request Interrupt
-#define I2C_MASTER_INT_TX_FIFO_REQ                                            \
-                                0x00000100  // TX FIFO Request Interrupt
-#define I2C_MASTER_INT_ARB_LOST                                               \
-                                0x00000080  // Arb Lost Interrupt
-#define I2C_MASTER_INT_STOP     0x00000040  // Stop Condition Interrupt
-#define I2C_MASTER_INT_START    0x00000020  // Start Condition Interrupt
-#define I2C_MASTER_INT_NACK     0x00000010  // Addr/Data NACK Interrupt
-#define I2C_MASTER_INT_TX_DMA_DONE                                            \
-                                0x00000008  // TX DMA Complete Interrupt
-#define I2C_MASTER_INT_RX_DMA_DONE                                            \
-                                0x00000004  // RX DMA Complete Interrupt
-#define I2C_MASTER_INT_TIMEOUT  0x00000002  // Clock Timeout Interrupt
-#define I2C_MASTER_INT_DATA     0x00000001  // Data Interrupt
-
-//*****************************************************************************
-//
-// I2C Slave interrupts.
-//
-//*****************************************************************************
-#define I2C_SLAVE_INT_RX_FIFO_FULL                                            \
-                                0x00000100  // RX FIFO Full Interrupt
-#define I2C_SLAVE_INT_TX_FIFO_EMPTY                                           \
-                                0x00000080  // TX FIFO Empty Interrupt
-#define I2C_SLAVE_INT_RX_FIFO_REQ                                             \
-                                0x00000040  // RX FIFO Request Interrupt
-#define I2C_SLAVE_INT_TX_FIFO_REQ                                             \
-                                0x00000020  // TX FIFO Request Interrupt
-#define I2C_SLAVE_INT_TX_DMA_DONE                                             \
-                                0x00000010  // TX DMA Complete Interrupt
-#define I2C_SLAVE_INT_RX_DMA_DONE                                             \
-                                0x00000008  // RX DMA Complete Interrupt
-#define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt
-#define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt
-#define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt
-
-//*****************************************************************************
-//
-// I2C Slave FIFO configuration macros.
-//
-//*****************************************************************************
-#define I2C_SLAVE_TX_FIFO_ENABLE                                              \
-                                0x00000002
-#define I2C_SLAVE_RX_FIFO_ENABLE                                              \
-                                0x00000004
-
-//*****************************************************************************
-//
-// I2C FIFO configuration macros.
-//
-//*****************************************************************************
-#define I2C_FIFO_CFG_TX_MASTER  0x00000000
-#define I2C_FIFO_CFG_TX_SLAVE   0x00008000
-#define I2C_FIFO_CFG_RX_MASTER  0x00000000
-#define I2C_FIFO_CFG_RX_SLAVE   0x80000000
-#define I2C_FIFO_CFG_TX_MASTER_DMA                                            \
-                                0x00002000
-#define I2C_FIFO_CFG_TX_SLAVE_DMA                                             \
-                                0x0000a000
-#define I2C_FIFO_CFG_RX_MASTER_DMA                                            \
-                                0x20000000
-#define I2C_FIFO_CFG_RX_SLAVE_DMA                                             \
-                                0xa0000000
-#define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
-#define I2C_FIFO_CFG_TX_TRIG_1  0x00000001
-#define I2C_FIFO_CFG_TX_TRIG_2  0x00000002
-#define I2C_FIFO_CFG_TX_TRIG_3  0x00000003
-#define I2C_FIFO_CFG_TX_TRIG_4  0x00000004
-#define I2C_FIFO_CFG_TX_TRIG_5  0x00000005
-#define I2C_FIFO_CFG_TX_TRIG_6  0x00000006
-#define I2C_FIFO_CFG_TX_TRIG_7  0x00000007
-#define I2C_FIFO_CFG_TX_TRIG_8  0x00000008
-#define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
-#define I2C_FIFO_CFG_RX_TRIG_1  0x00010000
-#define I2C_FIFO_CFG_RX_TRIG_2  0x00020000
-#define I2C_FIFO_CFG_RX_TRIG_3  0x00030000
-#define I2C_FIFO_CFG_RX_TRIG_4  0x00040000
-#define I2C_FIFO_CFG_RX_TRIG_5  0x00050000
-#define I2C_FIFO_CFG_RX_TRIG_6  0x00060000
-#define I2C_FIFO_CFG_RX_TRIG_7  0x00070000
-#define I2C_FIFO_CFG_RX_TRIG_8  0x00080000
-
-//*****************************************************************************
-//
-// I2C FIFO status.
-//
-//*****************************************************************************
-#define I2C_FIFO_RX_BELOW_TRIG_LEVEL                                          \
-                                0x00040000
-#define I2C_FIFO_RX_FULL        0x00020000
-#define I2C_FIFO_RX_EMPTY       0x00010000
-#define I2C_FIFO_TX_BELOW_TRIG_LEVEL                                          \
-                                0x00000004
-#define I2C_FIFO_TX_FULL        0x00000002
-#define I2C_FIFO_TX_EMPTY       0x00000001
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
-extern void I2CIntUnregister(uint32_t ui32Base);
-extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CTxFIFOFlush(uint32_t ui32Base);
-extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CRxFIFOFlush(uint32_t ui32Base);
-extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
-extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
-                                          uint8_t ui8Data);
-extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
-extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
-                                          uint8_t *pui8Data);
-extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
-                                    uint8_t ui8Length);
-extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
-extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
-                                           uint32_t ui32Config);
-extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
-extern void I2CSlaveFIFODisable(uint32_t ui32Base);
-extern bool I2CMasterBusBusy(uint32_t ui32Base);
-extern bool I2CMasterBusy(uint32_t ui32Base);
-extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
-extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
-extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern void I2CMasterDisable(uint32_t ui32Base);
-extern void I2CMasterEnable(uint32_t ui32Base);
-extern uint32_t I2CMasterErr(uint32_t ui32Base);
-extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq);
-extern void I2CMasterIntClear(uint32_t ui32Base);
-extern void I2CMasterIntDisable(uint32_t ui32Base);
-extern void I2CMasterIntEnable(uint32_t ui32Base);
-extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
-extern void I2CMasterIntEnableEx(uint32_t ui32Base,
-                                 uint32_t ui32IntFlags);
-extern void I2CMasterIntDisableEx(uint32_t ui32Base,
-                                  uint32_t ui32IntFlags);
-extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
-                                       bool bMasked);
-extern void I2CMasterIntClearEx(uint32_t ui32Base,
-                                uint32_t ui32IntFlags);
-extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
-extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
-extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
-extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
-extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
-                                  uint8_t ui8SlaveAddr,
-                                  bool bReceive);
-extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
-extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
-extern void I2CSlaveDisable(uint32_t ui32Base);
-extern void I2CSlaveEnable(uint32_t ui32Base);
-extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
-extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
-                                 uint8_t ui8SlaveAddr);
-extern void I2CSlaveIntClear(uint32_t ui32Base);
-extern void I2CSlaveIntDisable(uint32_t ui32Base);
-extern void I2CSlaveIntEnable(uint32_t ui32Base);
-extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
-                                 uint32_t ui32IntFlags);
-extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
-extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
-extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
-                                      bool bMasked);
-extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __DRIVERLIB_I2C_H__
diff --git a/ports/cc3200/hal/i2s.c b/ports/cc3200/hal/i2s.c
deleted file mode 100644
index dbbb936d776c5..0000000000000
--- a/ports/cc3200/hal/i2s.c
+++ /dev/null
@@ -1,1012 +0,0 @@
-//*****************************************************************************
-//
-//  i2s.c
-//
-//  Driver for the I2S interface.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup I2S_api
-//! @{
-//
-//*****************************************************************************
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_mcasp.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "i2s.h"
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define MCASP_GBL_RCLK		0x00000001
-#define MCASP_GBL_RHCLK		0x00000002
-#define MCASP_GBL_RSER		0x00000004
-#define MCASP_GBL_RSM		0x00000008
-#define MCASP_GBL_RFSYNC	0x00000010
-#define MCASP_GBL_XCLK		0x00000100
-#define MCASP_GBL_XHCLK		0x00000200
-#define MCASP_GBL_XSER		0x00000400
-#define MCASP_GBL_XSM		0x00000800
-#define MCASP_GBL_XFSYNC	0x00001000
-
-
-//*****************************************************************************
-//
-//! \internal
-//! Releases the specifed submodule out of reset.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulFlag is one of the valid sub module.
-//!
-//! This function Releases the specifed submodule out of reset.
-//!
-//! \return None.
-//
-//*****************************************************************************
-static void I2SGBLEnable(unsigned long ulBase, unsigned long ulFlag)
-{
-  unsigned long ulReg;
-
-  //
-  // Read global control register
-  //
-  ulReg = HWREG(ulBase + MCASP_O_GBLCTL);
-
-  //
-  // Remove the sub modules reset as specified by ulFlag parameter
-  //
-  ulReg |= ulFlag;
-
-  //
-  // Write the configuration
-  //
-  HWREG(ulBase + MCASP_O_GBLCTL) = ulReg;
-
-  //
-  // Wait for write completeion
-  //
-  while(HWREG(ulBase + MCASP_O_GBLCTL) != ulReg)
-  {
-
-  }
-
-}
-
-//*****************************************************************************
-//
-//! Enables transmit and/or receive.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulMode is one of the valid modes.
-//!
-//! This function enables the I2S module in specified mode. The parameter
-//! \e ulMode should be one of the following
-//!
-//! -\b I2S_MODE_TX_ONLY
-//! -\b I2S_MODE_TX_RX_SYNC
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SEnable(unsigned long ulBase, unsigned long ulMode)
-{
-  //
-  // FSYNC and Bit clock are output only in master mode
-  //
-  if( HWREG(ulBase + MCASP_O_ACLKXCTL) & 0x20)
-  {
-    //
-    // Set FSYNC anc BitClk as output
-    //
-    HWREG(ulBase + MCASP_O_PDIR) |= 0x14000000;
-  }
-
-
-  if(ulMode & 0x2)
-  {
-    //
-    // Remove Rx HCLK reset
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RHCLK);
-
-    //
-    // Remove Rx XCLK reset
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RCLK);
-
-    //
-    // Enable Rx SERDES(s)
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RSER);
-
-    //
-    // Enable Rx state machine
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RSM);
-
-    //
-    // Enable FSync generator
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_RFSYNC);
-  }
-
-
-  //
-  // Remove Tx  HCLK reset
-  //
-  I2SGBLEnable(ulBase, MCASP_GBL_XHCLK);
-
-  //
-  // Remove Tx XCLK reset
-  //
-  I2SGBLEnable(ulBase, MCASP_GBL_XCLK);
-
-
-  if(ulMode & 0x1)
-  {
-    //
-    // Enable Tx SERDES(s)
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_XSER);
-
-    //
-    // Enable Tx state machine
-    //
-    I2SGBLEnable(ulBase, MCASP_GBL_XSM);
-  }
-
-   //
-   // Enable FSync generator
-   //
-   I2SGBLEnable(ulBase, MCASP_GBL_XFSYNC);
-}
-
-//*****************************************************************************
-//
-//! Disables transmit and/or receive.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables transmit and/or receive from I2S module.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDisable(unsigned long ulBase)
-{
-  //
-  // Reset all sub modules
-  //
-  HWREG(ulBase + MCASP_O_GBLCTL) = 0;
-
-  //
-  // Wait for write to complete
-  //
-  while( HWREG(ulBase + MCASP_O_GBLCTL) != 0)
-  {
-
-  }
-}
-
-//*****************************************************************************
-//
-//! Waits to send data over the specified data line
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param ulData is the data to be transmitted.
-//!
-//! This function sends the \e ucData to the transmit register for the
-//! specified data line. If there is no space available, this
-//! function waits until there is space available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long ulData)
-{
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Wait for free space in fifo
-  //
-  while(!( HWREG(ulBase + MCASP_O_TXSTAT) & MCASP_TXSTAT_XDATA))
-  {
-
-  }
-
-  //
-  // Write Data into the FIFO
-  //
-  HWREG(ulBase + MCASP_O_TXBUF0 + ulDataLine) = ulData;
-}
-
-//*****************************************************************************
-//
-//! Sends data over the specified data line
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param ulData is the data to be transmitted.
-//!
-//! This function writes the \e ucData to the transmit register for
-//! the specified data line. This function does not block, so if there is no
-//! space available, then \b -1 is returned, and the application must retry the
-//! function later.
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long I2SDataPutNonBlocking(unsigned long ulBase,  unsigned long ulDataLine,
-                           unsigned long ulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Send Data if fifo has free space
-  //
-  if( HWREG(ulBase + MCASP_O_TXSTAT) & MCASP_TXSTAT_XDATA)
-  {
-    //
-    // Write data into the FIFO
-    //
-    HWREG(ulBase + MCASP_O_TXBUF0 + ulDataLine) = ulData;
-    return 0;
-  }
-
-  //
-  // FIFO is full
-  //
-  return(-1);
-}
-
-//*****************************************************************************
-//
-//! Waits for data from the specified data line.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param pulData is pointer to receive data variable.
-//!
-//! This function gets data from the receive register for the specified
-//! data line. If there are no data available, this function waits until a
-//! receive before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Wait for atleat on word in FIFO
-  //
-  while(!(HWREG(ulBase + MCASP_O_RXSTAT) & MCASP_RXSTAT_RDATA))
-  {
-
-  }
-
-  //
-  // Read the Data
-  //
-  *pulData = HWREG(ulBase + MCASP_O_RXBUF0 + ulDataLine);
-}
-
-
-//*****************************************************************************
-//
-//! Receives data from the specified data line.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is one of the valid data lines.
-//! \param pulData is pointer to receive data variable.
-//!
-//! This function gets data from the receive register for the specified
-//! data line.
-//!
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long I2SDataGetNonBlocking(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData)
-{
-
-  //
-  // Compute register the offeset
-  //
-  ulDataLine = (ulDataLine-1) << 2;
-
-  //
-  // Check if data is available in FIFO
-  //
-  if(HWREG(ulBase + MCASP_O_RXSTAT) & MCASP_RXSTAT_RDATA)
-  {
-    //
-    // Read the Data
-    //
-    *pulData = HWREG(ulBase + MCASP_O_RXBUF0 + ulDataLine);
-    return 0;
-  }
-
-  //
-  // FIFO is empty
-  //
-  return -1;
-}
-
-
-//*****************************************************************************
-//
-//! Sets the configuration of the I2S module.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulI2SClk is the rate of the clock supplied to the I2S module.
-//! \param ulBitClk is the desired bit rate.
-//! \param ulConfig is the data format.
-//!
-//! This function configures the I2S for operation in the specified data
-//! format.  The bit rate is provided in the \e ulBitClk parameter and the data
-//! format in the \e ulConfig parameter.
-//!
-//! The \e ulConfig parameter is the logical OR of three values: the slot size
-//! the data read/write port select, Master or Slave mode
-//!
-//! Follwoing selects the Master-Slave mode
-//! -\b I2S_MODE_MASTER
-//! -\b I2S_MODE_SLAVE
-//!
-//! Following selects the slot size:
-//! -\b I2S_SLOT_SIZE_24
-//! -\b I2S_SLOT_SIZE_16
-//!
-//! Following selects the data read/write port:
-//! -\b I2S_PORT_DMA
-//! -\b I2S_PORT_CPU
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
-                               unsigned long ulBitClk, unsigned long ulConfig)
-{
-  unsigned long ulHClkDiv;
-  unsigned long ulClkDiv;
-  unsigned long ulSlotSize;
-  unsigned long ulBitMask;
-
-  //
-  // Calculate clock dividers
-  //
-  ulHClkDiv = ((ulI2SClk/ulBitClk)-1);
-  ulClkDiv  = 0;
-
-  //
-  // Check if HCLK divider is overflowing
-  //
-  if(ulHClkDiv > 0xFFF)
-  {
-    ulHClkDiv = 0xFFF;
-
-    //
-    // Calculate clock divider
-    //
-    ulClkDiv = ((ulI2SClk/(ulBitClk * (ulHClkDiv + 1))) & 0x1F);
-  }
-
-  //
-  //
-  //
-  ulClkDiv = ((ulConfig & I2S_MODE_SLAVE )?0x80:0xA0|ulClkDiv);
-
-  HWREG(ulBase + MCASP_O_ACLKXCTL) = ulClkDiv;
-
-  HWREG(ulBase + MCASP_O_AHCLKXCTL) = (0x8000|ulHClkDiv);
-
-  //
-  // Write the Tx format register
-  //
-  HWREG(ulBase + MCASP_O_TXFMT) = (0x18000 | (ulConfig & 0x7FFF));
-
-  //
-  // Write the Rx format register
-  //
-  HWREG(ulBase + MCASP_O_RXFMT) = (0x18000 | ((ulConfig >> 16) &0x7FFF));
-
-  //
-  // Check if in master mode
-  //
-  if( ulConfig & I2S_MODE_SLAVE)
-  {
-    //
-    // Configure Tx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_TXFMCTL) = 0x111;
-
-    //
-    // Configure Rx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_RXFMCTL) = 0x111;
-  }
-  else
-  {
-    //
-    // Configure Tx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_TXFMCTL) = 0x113;
-
-    //
-    // Configure Rx FSync generator in I2S mode
-    //
-    HWREG(ulBase + MCASP_O_RXFMCTL) = 0x113;
-  }
-
-  //
-  // Compute Slot Size
-  //
-  ulSlotSize = ((((ulConfig & 0xFF) >> 4) + 1) * 2);
-
-  //
-  // Creat the bit mask
-  //
-  ulBitMask = (0xFFFFFFFF >> (32 - ulSlotSize));
-
-  //
-  // Set Tx bit valid mask
-  //
-  HWREG(ulBase + MCASP_O_TXMASK) = ulBitMask;
-
-  //
-  // Set Rx bit valid mask
-  //
-  HWREG(ulBase + MCASP_O_RXMASK) = ulBitMask;
-
-  //
-  // Set Tx slot valid mask
-  //
-  HWREG(ulBase + MCASP_O_TXTDM) = 0x3;
-
-  //
-  // Set Rx slot valid mask
-  //
-  HWREG(ulBase + MCASP_O_RXTDM) = 0x3;
-}
-
-//*****************************************************************************
-//
-//! Configure and enable transmit FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulTxLevel is the transmit FIFO DMA request level.
-//! \param ulWordsPerTransfer is the nuber of words transferred from the FIFO.
-//!
-//! This function configures and enable I2S transmit FIFO.
-//!
-//! The parameter \e ulTxLevel sets the level at which transmit DMA requests
-//! are generated. This should be non-zero integer multiple of number of
-//! serializers enabled as transmitters
-//!
-//! The parameter \e ulWordsPerTransfer sets the number of words that are
-//! transferred from the transmit FIFO to the data line(s). This value must
-//! equal the number of serializers used as transmitters.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
-                     unsigned long ulWordsPerTransfer)
-{
-  //
-  // Set transmit FIFO configuration and
-  // enable it
-  //
-  HWREG(ulBase + MCASP_0_WFIFOCTL) = ((1 <<16) | ((ulTxLevel & 0xFF) << 8)
-					| (ulWordsPerTransfer & 0x1F));
-
-}
-
-//*****************************************************************************
-//
-//! Disables transmit FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables the I2S transmit FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxFIFODisable(unsigned long ulBase)
-{
-  //
-  // Disable transmit FIFO.
-  //
-  HWREG(ulBase + MCASP_0_WFIFOCTL) = 0;
-}
-
-//*****************************************************************************
-//
-//! Configure and enable receive FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulRxLevel is the receive FIFO DMA request level.
-//! \param ulWordsPerTransfer is the nuber of words transferred from the FIFO.
-//!
-//! This function configures and enable I2S receive FIFO.
-//!
-//! The parameter \e ulRxLevel sets the level at which receive DMA requests
-//! are generated. This should be non-zero integer multiple of number of
-//! serializers enabled as receivers.
-//!
-//! The parameter \e ulWordsPerTransfer sets the number of words that are
-//! transferred to the receive FIFO from the data line(s). This value must
-//! equal the number of serializers used as receivers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
-                     unsigned long ulWordsPerTransfer)
-{
-  //
-  // Set FIFO configuration
-  //
-  HWREG(ulBase + MCASP_0_RFIFOCTL) = ( (1 <<16) | ((ulRxLevel & 0xFF) << 8)
-					| (ulWordsPerTransfer & 0x1F));
-
-}
-
-//*****************************************************************************
-//
-//! Disables receive FIFO.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function disables the I2S receive FIFO.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxFIFODisable(unsigned long ulBase)
-{
-  //
-  // Disable receive FIFO.
-  //
-  HWREG(ulBase + MCASP_0_RFIFOCTL) = 0;
-}
-
-//*****************************************************************************
-//
-//! Get the transmit FIFO status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function gets the number of 32-bit words currently in the transmit
-//! FIFO.
-//!
-//! \return Returns transmit FIFO status.
-//
-//*****************************************************************************
-unsigned long I2STxFIFOStatusGet(unsigned long ulBase)
-{
-  //
-  // Return transmit FIFO level
-  //
-  return HWREG(ulBase + MCASP_0_WFIFOSTS);
-}
-
-//*****************************************************************************
-//
-//! Get the receive FIFO status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function gets the number of 32-bit words currently in the receive
-//! FIFO.
-//!
-//! \return Returns receive FIFO status.
-//
-//*****************************************************************************
-unsigned long I2SRxFIFOStatusGet(unsigned long ulBase)
-{
-  //
-  // Return receive FIFO level
-  //
-  return HWREG(ulBase + MCASP_0_RFIFOSTS);
-}
-
-//*****************************************************************************
-//
-//! Configure the serializer in specified mode.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulDataLine is the data line (serilizer) to be configured.
-//! \param ulSerMode is the required serializer mode.
-//! \param ulInActState sets the inactive state of the data line.
-//!
-//! This function configure and enable the serializer associated with the given
-//! data line in specified mode.
-//!
-//! The paramenter \e ulDataLine selects to data line to be configured and
-//! can be one of the following:
-//! -\b I2S_DATA_LINE_0
-//! -\b I2S_DATA_LINE_1
-//!
-//! The parameter \e ulSerMode can be one of the following:
-//! -\b I2S_SER_MODE_TX
-//! -\b I2S_SER_MODE_RX
-//! -\b I2S_SER_MODE_DISABLE
-//!
-//! The parameter \e ulInActState can be one of the following
-//! -\b I2S_INACT_TRI_STATE
-//! -\b I2S_INACT_LOW_LEVEL
-//! -\b I2S_INACT_LOW_HIGH
-//!
-//! \return Returns receive FIFO status.
-//
-//*****************************************************************************
-void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
-                         unsigned long ulSerMode, unsigned long ulInActState)
-{
-  if( ulSerMode == I2S_SER_MODE_TX)
-  {
-    //
-    // Set the data line in output mode
-    //
-    HWREG(ulBase + MCASP_O_PDIR) |= ulDataLine;
-  }
-  else
-  {
-    //
-    // Set the data line in input mode
-    //
-    HWREG(ulBase + MCASP_O_PDIR) &= ~ulDataLine;
-  }
-
-  //
-  // Set the serializer configuration.
-  //
-  HWREG(ulBase + MCASP_O_XRSRCTL0 + ((ulDataLine-1) << 2))
-                                            = (ulSerMode | ulInActState);
-}
-
-//*****************************************************************************
-//
-//! Enables individual I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated I2S interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//!
-//! -\b I2S_INT_XUNDRN
-//! -\b I2S_INT_XSYNCERR
-//! -\b I2S_INT_XLAST
-//! -\b I2S_INT_XDATA
-//! -\b I2S_INT_XSTAFRM
-//! -\b I2S_INT_XDMA
-//! -\b I2S_INT_ROVRN
-//! -\b I2S_INT_RSYNCERR
-//! -\b I2S_INT_RLAST
-//! -\b I2S_INT_RDATA
-//! -\b I2S_INT_RSTAFRM
-//! -\b I2S_INT_RDMA
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
-{
-
-  //
-  // Enable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR )
-     |= ((ulIntFlags &0xC0000000) >> 20);
-
-  //
-  // Enable specific Tx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLX) |= (ulIntFlags & 0xFF);
-
-  //
-  // Enable specific Rx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLR) |= ((ulIntFlags >> 16) & 0xFF);
-}
-
-//*****************************************************************************
-//
-//! Disables individual I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! This function disables the indicated I2S interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to I2SIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
-{
-  //
-  // Disable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET)
-     |= ((ulIntFlags &0xC0000000) >> 20);
-
-  //
-  // Disable specific Tx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLX) &= ~(ulIntFlags & 0xFF);
-
-  //
-  // Disable specific Rx Interrupts
-  //
-  HWREG(ulBase + MCASP_O_EVTCTLR) &= ~((ulIntFlags >> 16) & 0xFF);
-}
-
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function returns the raw interrupt status for I2S enumerated
-//! as a bit field of values:
-//! -\b I2S_STS_XERR
-//! -\b I2S_STS_XDMAERR
-//! -\b I2S_STS_XSTAFRM
-//! -\b I2S_STS_XDATA
-//! -\b I2S_STS_XLAST
-//! -\b I2S_STS_XSYNCERR
-//! -\b I2S_STS_XUNDRN
-//! -\b I2S_STS_XDMA
-//! -\b I2S_STS_RERR
-//! -\b I2S_STS_RDMAERR
-//! -\b I2S_STS_RSTAFRM
-//! -\b I2S_STS_RDATA
-//! -\b I2S_STS_RLAST
-//! -\b I2S_STS_RSYNCERR
-//! -\b I2S_STS_ROVERN
-//! -\b I2S_STS_RDMA
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described above.
-//
-//*****************************************************************************
-unsigned long I2SIntStatus(unsigned long ulBase)
-{
-  unsigned long ulStatus;
-
-  //
-  // Get DMA interrupt status
-  //
-  ulStatus =
-    HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW) << 20;
-
-  ulStatus &= 0xC0000000;
-
-  //
-  // Read Tx Interrupt status
-  //
-  ulStatus |= HWREG(ulBase + MCASP_O_TXSTAT);
-
-  //
-  // Read Rx Interrupt status
-  //
-  ulStatus |= HWREG(ulBase + MCASP_O_RXSTAT) << 16;
-
-  //
-  // Return the status
-  //
-  return ulStatus;
-}
-
-//*****************************************************************************
-//
-//! Clears I2S interrupt sources.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulStatFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified I2S interrupt sources are cleared, so that they no longer
-//! assert.  This function must be called in the interrupt handler to keep the
-//! interrupt from being recognized again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the value
-//! describe in I2SIntStatus().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntClear(unsigned long ulBase, unsigned long ulStatFlags)
-{
-  //
-  // Clear DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK)
-     |= ((ulStatFlags &0xC0000000) >> 20);
-
-  //
-  // Clear Tx Interrupt
-  //
-  HWREG(ulBase + MCASP_O_TXSTAT) = ulStatFlags & 0x1FF ;
-
-  //
-  // Clear Rx Interrupt
-  //
-  HWREG(ulBase + MCASP_O_RXSTAT) = (ulStatFlags >> 16) & 0x1FF;
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for a I2S interrupt.
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! I2S interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller; specific
-//! I2S interrupts must be enabled via I2SIntEnable().  It is the interrupt
-//! handler's responsibility to clear the interrupt source.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler
-  //
-  IntRegister(INT_I2S,pfnHandler);
-
-  //
-  // Enable the interrupt
-  //
-  IntEnable(INT_I2S);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for a I2S interrupt.
-//!
-//! \param ulBase is the base address of the I2S module.
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a I2S interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SIntUnregister(unsigned long ulBase)
-{
-  //
-  // Disable interrupt
-  //
-  IntDisable(INT_I2S);
-
-  //
-  // Unregister the handler
-  //
-  IntUnregister(INT_I2S);
-
-}
-
-//*****************************************************************************
-//
-//! Set the active slots for Trasmitter
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulActSlot is the bit-mask of activ slots
-//!
-//! This function sets the active slots for the transmitter. By default both
-//! the slots are active. The parameter \e ulActSlot is logical OR follwoing
-//! values:
-//! -\b I2S_ACT_SLOT_EVEN
-//! -\b I2S_ACT_SLOT_ODD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2STxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot)
-{
-   HWREG(ulBase + MCASP_O_TXTDM) = ulActSlot;
-}
-
-//*****************************************************************************
-//
-//! Set the active slots for Receiver
-//!
-//! \param ulBase is the base address of the I2S module.
-//! \param ulActSlot is the bit-mask of activ slots
-//!
-//! This function sets the active slots for the receiver. By default both
-//! the slots are active. The parameter \e ulActSlot is logical OR follwoing
-//! values:
-//! -\b I2S_ACT_SLOT_EVEN
-//! -\b I2S_ACT_SLOT_ODD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void I2SRxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot)
-{
-   HWREG(ulBase + MCASP_O_RXTDM) = ulActSlot;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/i2s.h b/ports/cc3200/hal/i2s.h
deleted file mode 100644
index 38620aef5a773..0000000000000
--- a/ports/cc3200/hal/i2s.h
+++ /dev/null
@@ -1,218 +0,0 @@
-//*****************************************************************************
-//
-//  i2s.h
-//
-//  Defines and Macros for the I2S.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __I2S_H__
-#define __I2S_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// I2S DMA ports.
-//
-//*****************************************************************************
-#define I2S_TX_DMA_PORT      0x4401E200
-#define I2S_RX_DMA_PORT      0x4401E280
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SConfigSetExpClk() as the ulConfig parameter.
-//
-//*****************************************************************************
-#define I2S_SLOT_SIZE_8       0x00300032
-#define I2S_SLOT_SIZE_16      0x00700074
-#define I2S_SLOT_SIZE_24      0x00B000B6
-
-
-#define I2S_PORT_CPU          0x00080008
-#define I2S_PORT_DMA          0x00000000
-
-#define I2S_MODE_MASTER       0x00000000
-#define I2S_MODE_SLAVE        0x00008000
-
-//*****************************************************************************
-//
-// Values that can be passed as ulDataLine parameter.
-//
-//*****************************************************************************
-#define I2S_DATA_LINE_0       0x00000001
-#define I2S_DATA_LINE_1       0x00000002
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SSerializerConfig() as the ulSerMode
-// parameter.
-//
-//*****************************************************************************
-#define I2S_SER_MODE_TX       0x00000001
-#define I2S_SER_MODE_RX       0x00000002
-#define I2S_SER_MODE_DISABLE  0x00000000
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SSerializerConfig() as the ulInActState
-// parameter.
-//
-//*****************************************************************************
-#define I2S_INACT_TRI_STATE   0x00000000
-#define I2S_INACT_LOW_LEVEL   0x00000008
-#define I2S_INACT_HIGH_LEVEL  0x0000000C
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SIntEnable() and I2SIntDisable() as the
-// ulIntFlags parameter.
-//
-//*****************************************************************************
-#define I2S_INT_XUNDRN	      0x00000001
-#define I2S_INT_XSYNCERR      0x00000002
-#define I2S_INT_XLAST         0x00000010
-#define I2S_INT_XDATA         0x00000020
-#define I2S_INT_XSTAFRM       0x00000080
-#define I2S_INT_XDMA	      0x80000000
-#define I2S_INT_ROVRN         0x00010000
-#define I2S_INT_RSYNCERR      0x00020000
-#define I2S_INT_RLAST         0x00100000
-#define I2S_INT_RDATA         0x00200000
-#define I2S_INT_RSTAFRM       0x00800000
-#define I2S_INT_RDMA          0x40000000
-
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SRxActiveSlotSet() and I2STxActiveSlotSet
-//
-//*****************************************************************************
-#define I2S_ACT_SLOT_EVEN     0x00000001
-#define I2S_ACT_SLOT_ODD      0x00000002
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SIntClear() as the
-// ulIntFlags parameter and returned from I2SIntStatus().
-//
-//*****************************************************************************
-#define I2S_STS_XERR          0x00000100
-#define I2S_STS_XDMAERR	      0x00000080
-#define I2S_STS_XSTAFRM	      0x00000040
-#define I2S_STS_XDATA	      0x00000020
-#define I2S_STS_XLAST	      0x00000010
-#define I2S_STS_XSYNCERR      0x00000002
-#define I2S_STS_XUNDRN	      0x00000001
-#define I2S_STS_XDMA	      0x80000000
-#define I2S_STS_RERR          0x01000000
-#define I2S_STS_RDMAERR       0x00800000
-#define I2S_STS_RSTAFRM       0x00400000
-#define I2S_STS_RDATA         0x00200000
-#define I2S_STS_RLAST         0x00100000
-#define I2S_STS_RSYNCERR      0x00020000
-#define I2S_STS_ROVERN	      0x00010000
-#define I2S_STS_RDMA          0x40000000
-
-//*****************************************************************************
-//
-// Values that can be passed to I2SEnable() as the ulMode parameter.
-//
-//*****************************************************************************
-#define I2S_MODE_TX_ONLY      0x00000001
-#define I2S_MODE_TX_RX_SYNC   0x00000003
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void I2SEnable(unsigned long ulBase, unsigned long ulMode);
-extern void I2SDisable(unsigned long ulBase);
-
-extern void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long ulData);
-extern long I2SDataPutNonBlocking(unsigned long ulBase,
-                               unsigned long ulDataLine, unsigned long ulData);
-
-extern void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
-                unsigned long *pulData);
-extern long I2SDataGetNonBlocking(unsigned long ulBase,
-                unsigned long ulDataLine, unsigned long *pulData);
-
-extern void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
-                               unsigned long ulBitClk, unsigned long ulConfig);
-
-extern void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
-                     unsigned long ulWordsPerTransfer);
-extern void I2STxFIFODisable(unsigned long ulBase);
-extern void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
-                     unsigned long ulWordsPerTransfer);
-extern void I2SRxFIFODisable(unsigned long ulBase);
-extern unsigned long I2STxFIFOStatusGet(unsigned long ulBase);
-extern unsigned long I2SRxFIFOStatusGet(unsigned long ulBase);
-
-extern void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
-                         unsigned long ulSerMode, unsigned long ulInActState);
-
-extern void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
-extern void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
-extern unsigned long I2SIntStatus(unsigned long ulBase);
-extern void I2SIntClear(unsigned long ulBase, unsigned long ulIntFlags);
-extern void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
-extern void I2SIntUnregister(unsigned long ulBase);
-extern void I2STxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
-extern void I2SRxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__I2S_H__
-
diff --git a/ports/cc3200/hal/inc/asmdefs.h b/ports/cc3200/hal/inc/asmdefs.h
deleted file mode 100644
index c2a6f9734259c..0000000000000
--- a/ports/cc3200/hal/inc/asmdefs.h
+++ /dev/null
@@ -1,229 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// asmdefs.h - Macros to allow assembly code be portable among toolchains.
-//
-//*****************************************************************************
-
-#ifndef __ASMDEFS_H__
-#define __ASMDEFS_H__
-
-//*****************************************************************************
-//
-// The defines required for code_red.
-//
-//*****************************************************************************
-#ifdef codered
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // codered
-
-//*****************************************************************************
-//
-// The defines required for EW-ARM.
-//
-//*****************************************************************************
-#ifdef ewarm
-
-//
-// Section headers.
-//
-#define __LIBRARY__             module
-#define __TEXT__                rseg CODE:CODE(2)
-#define __DATA__                rseg DATA:DATA(2)
-#define __BSS__                 rseg DATA:DATA(2)
-#define __TEXT_NOROOT__         rseg CODE:CODE:NOROOT(2)
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               alignrom 2
-#define __END__                 end
-#define __EXPORT__              export
-#define __IMPORT__              import
-#define __LABEL__
-#define __STR__                 dcb
-#define __THUMB_LABEL__         thumb
-#define __WORD__                dcd
-#define __INLINE_DATA__         data
-
-#endif // ewarm
-
-//*****************************************************************************
-//
-// The defines required for GCC.
-//
-//*****************************************************************************
-#if defined(gcc)
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // gcc
-
-//*****************************************************************************
-//
-// The defines required for RV-MDK.
-//
-//*****************************************************************************
-#ifdef rvmdk
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    thumb
-    require8
-    preserve8
-
-//
-// Section headers.
-//
-#define __LIBRARY__             ;
-#define __TEXT__                area ||.text||, code, readonly, align=2
-#define __DATA__                area ||.data||, data, align=2
-#define __BSS__                 area ||.bss||, noinit, align=2
-#define __TEXT_NOROOT__         area ||.text||, code, readonly, align=2
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               align 4
-#define __END__                 end
-#define __EXPORT__              export
-#define __IMPORT__              import
-#define __LABEL__
-#define __STR__                 dcb
-#define __THUMB_LABEL__
-#define __WORD__                dcd
-#define __INLINE_DATA__
-
-#endif // rvmdk
-
-//*****************************************************************************
-//
-// The defines required for Sourcery G++.
-//
-//*****************************************************************************
-#if defined(sourcerygxx)
-
-//
-// The assembly code preamble required to put the assembler into the correct
-// configuration.
-//
-    .syntax unified
-    .thumb
-
-//
-// Section headers.
-//
-#define __LIBRARY__             @
-#define __TEXT__                .text
-#define __DATA__                .data
-#define __BSS__                 .bss
-#define __TEXT_NOROOT__         .text
-
-//
-// Assembler nmenonics.
-//
-#define __ALIGN__               .balign 4
-#define __END__                 .end
-#define __EXPORT__              .globl
-#define __IMPORT__              .extern
-#define __LABEL__               :
-#define __STR__                 .ascii
-#define __THUMB_LABEL__         .thumb_func
-#define __WORD__                .word
-#define __INLINE_DATA__
-
-#endif // sourcerygxx
-
-#endif // __ASMDEF_H__
diff --git a/ports/cc3200/hal/inc/hw_adc.h b/ports/cc3200/hal/inc/hw_adc.h
deleted file mode 100644
index 525ce905c643a..0000000000000
--- a/ports/cc3200/hal/inc/hw_adc.h
+++ /dev/null
@@ -1,888 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_ADC_H__
-#define __HW_ADC_H__
-
-//*****************************************************************************
-//
-// The following are defines for the ADC register offsets.
-//
-//*****************************************************************************
-#define ADC_O_ADC_CTRL          0x00000000  // ADC control register.
-#define ADC_O_adc_ch0_gain      0x00000004  // Channel 0 gain setting
-#define ADC_O_adc_ch1_gain      0x00000008  // Channel 1 gain setting
-#define ADC_O_adc_ch2_gain      0x0000000C  // Channel 2 gain setting
-#define ADC_O_adc_ch3_gain      0x00000010  // Channel 3 gain setting
-#define ADC_O_adc_ch4_gain      0x00000014  // Channel 4 gain setting
-#define ADC_O_adc_ch5_gain      0x00000018  // Channel 5 gain setting
-#define ADC_O_adc_ch6_gain      0x0000001C  // Channel 6 gain setting
-#define ADC_O_adc_ch7_gain      0x00000020  // Channel 7 gain setting
-#define ADC_O_adc_ch0_irq_en    0x00000024  // Channel 0 interrupt enable
-                                            // register
-#define ADC_O_adc_ch1_irq_en    0x00000028  // Channel 1 interrupt enable
-                                            // register
-#define ADC_O_adc_ch2_irq_en    0x0000002C  // Channel 2 interrupt enable
-                                            // register
-#define ADC_O_adc_ch3_irq_en    0x00000030  // Channel 3 interrupt enable
-                                            // register
-#define ADC_O_adc_ch4_irq_en    0x00000034  // Channel 4 interrupt enable
-                                            // register
-#define ADC_O_adc_ch5_irq_en    0x00000038  // Channel 5 interrupt enable
-                                            // register
-#define ADC_O_adc_ch6_irq_en    0x0000003C  // Channel 6 interrupt enable
-                                            // register
-#define ADC_O_adc_ch7_irq_en    0x00000040  // Channel 7 interrupt enable
-                                            // register
-#define ADC_O_adc_ch0_irq_status \
-                                0x00000044  // Channel 0 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch1_irq_status \
-                                0x00000048  // Channel 1 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch2_irq_status \
-                                0x0000004C
-
-#define ADC_O_adc_ch3_irq_status \
-                                0x00000050  // Channel 3 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch4_irq_status \
-                                0x00000054  // Channel 4 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch5_irq_status \
-                                0x00000058
-
-#define ADC_O_adc_ch6_irq_status \
-                                0x0000005C  // Channel 6 interrupt status
-                                            // register
-
-#define ADC_O_adc_ch7_irq_status \
-                                0x00000060  // Channel 7 interrupt status
-                                            // register
-
-#define ADC_O_adc_dma_mode_en   0x00000064  // DMA mode enable register
-#define ADC_O_adc_timer_configuration \
-                                0x00000068  // ADC timer configuration register
-
-#define ADC_O_adc_timer_current_count \
-                                0x00000070  // ADC timer current count register
-
-#define ADC_O_channel0FIFODATA  0x00000074  // CH0 FIFO DATA register
-#define ADC_O_channel1FIFODATA  0x00000078  // CH1 FIFO DATA register
-#define ADC_O_channel2FIFODATA  0x0000007C  // CH2 FIFO DATA register
-#define ADC_O_channel3FIFODATA  0x00000080  // CH3 FIFO DATA register
-#define ADC_O_channel4FIFODATA  0x00000084  // CH4 FIFO DATA register
-#define ADC_O_channel5FIFODATA  0x00000088  // CH5 FIFO DATA register
-#define ADC_O_channel6FIFODATA  0x0000008C  // CH6 FIFO DATA register
-#define ADC_O_channel7FIFODATA  0x00000090  // CH7 FIFO DATA register
-#define ADC_O_adc_ch0_fifo_lvl  0x00000094  // channel 0 FIFO Level register
-#define ADC_O_adc_ch1_fifo_lvl  0x00000098  // Channel 1 interrupt status
-                                            // register
-#define ADC_O_adc_ch2_fifo_lvl  0x0000009C
-#define ADC_O_adc_ch3_fifo_lvl  0x000000A0  // Channel 3 interrupt status
-                                            // register
-#define ADC_O_adc_ch4_fifo_lvl  0x000000A4  // Channel 4 interrupt status
-                                            // register
-#define ADC_O_adc_ch5_fifo_lvl  0x000000A8
-#define ADC_O_adc_ch6_fifo_lvl  0x000000AC  // Channel 6 interrupt status
-                                            // register
-#define ADC_O_adc_ch7_fifo_lvl  0x000000B0  // Channel 7 interrupt status
-                                            // register
-
-#define ADC_O_ADC_CH_ENABLE     0x000000B8
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the ADC_O_ADC_CTRL register.
-//
-//******************************************************************************
-#define ADC_ADC_CTRL_adc_cap_scale \
-                                0x00000020  // ADC CAP SCALE.
-
-#define ADC_ADC_CTRL_adc_buf_bypass \
-                                0x00000010  // ADC ANA CIO buffer bypass.
-                                            // Signal is modelled in ANA TOP.
-                                            // When '1': ADC buffer is bypassed.
-
-#define ADC_ADC_CTRL_adc_buf_en 0x00000008  // ADC ANA buffer enable. When 1:
-                                            // ADC buffer is enabled.
-#define ADC_ADC_CTRL_adc_core_en \
-                                0x00000004  // ANA ADC core en. This signal act
-                                            // as glbal enable to ADC CIO. When
-                                            // 1: ADC core is enabled.
-
-#define ADC_ADC_CTRL_adc_soft_reset \
-                                0x00000002  // ADC soft reset. When '1' : reset
-                                            // ADC internal logic.
-
-#define ADC_ADC_CTRL_adc_en     0x00000001  // ADC global enable. When set ADC
-                                            // module is enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_gain_adc_channel0_gain_M \
-                                0x00000003  // gain setting for ADC channel 0.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch0_gain_adc_channel0_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_gain_adc_channel1_gain_M \
-                                0x00000003  // gain setting for ADC channel 1.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch1_gain_adc_channel1_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_gain_adc_channel2_gain_M \
-                                0x00000003  // gain setting for ADC channel 2.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch2_gain_adc_channel2_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_gain_adc_channel3_gain_M \
-                                0x00000003  // gain setting for ADC channel 3.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch3_gain_adc_channel3_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_gain_adc_channel4_gain_M \
-                                0x00000003  // gain setting for ADC channel 4
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch4_gain_adc_channel4_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_gain_adc_channel5_gain_M \
-                                0x00000003  // gain setting for ADC channel 5.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch5_gain_adc_channel5_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_gain_adc_channel6_gain_M \
-                                0x00000003  // gain setting for ADC channel 6
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch6_gain_adc_channel6_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_gain register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_gain_adc_channel7_gain_M \
-                                0x00000003  // gain setting for ADC channel 7.
-                                            // when "00": 1x when "01: 2x when
-                                            // "10":3x when "11" 4x
-
-#define ADC_adc_ch7_gain_adc_channel7_gain_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_irq_en_adc_channel0_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch0_irq_en_adc_channel0_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_irq_en_adc_channel1_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch1_irq_en_adc_channel1_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_irq_en_adc_channel2_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch2_irq_en_adc_channel2_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_irq_en_adc_channel3_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch3_irq_en_adc_channel3_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_irq_en_adc_channel4_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch4_irq_en_adc_channel4_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_irq_en_adc_channel5_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch5_irq_en_adc_channel5_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_irq_en_adc_channel6_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch6_irq_en_adc_channel6_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_irq_en register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_irq_en_adc_channel7_irq_en_M \
-                                0x0000000F  // interrupt enable register for
-                                            // per ADC channel bit 3: when '1'
-                                            // -> enable FIFO overflow interrupt
-                                            // bit 2: when '1' -> enable FIFO
-                                            // underflow interrupt bit 1: when
-                                            // "1' -> enable FIFO empty
-                                            // interrupt bit 0: when "1" ->
-                                            // enable FIFO full interrupt
-
-#define ADC_adc_ch7_irq_en_adc_channel7_irq_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_irq_status_adc_channel0_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch0_irq_status_adc_channel0_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_irq_status_adc_channel1_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch1_irq_status_adc_channel1_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_irq_status_adc_channel2_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch2_irq_status_adc_channel2_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_irq_status_adc_channel3_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch3_irq_status_adc_channel3_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_irq_status_adc_channel4_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch4_irq_status_adc_channel4_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_irq_status_adc_channel5_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch5_irq_status_adc_channel5_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_irq_status_adc_channel6_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch6_irq_status_adc_channel6_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_irq_status register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_irq_status_adc_channel7_irq_status_M \
-                                0x0000000F  // interrupt status register for
-                                            // per ADC channel. Interrupt status
-                                            // can be cleared on write. bit 3:
-                                            // when value '1' is written ->
-                                            // would clear FIFO overflow
-                                            // interrupt status in the next
-                                            // cycle. if same interrupt is set
-                                            // in the same cycle then interurpt
-                                            // would be set and clear command
-                                            // will be ignored. bit 2: when
-                                            // value '1' is written -> would
-                                            // clear FIFO underflow interrupt
-                                            // status in the next cycle. bit 1:
-                                            // when value '1' is written ->
-                                            // would clear FIFO empty interrupt
-                                            // status in the next cycle. bit 0:
-                                            // when value '1' is written ->
-                                            // would clear FIFO full interrupt
-                                            // status in the next cycle.
-
-#define ADC_adc_ch7_irq_status_adc_channel7_irq_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_dma_mode_en register.
-//
-//******************************************************************************
-#define ADC_adc_dma_mode_en_DMA_MODEenable_M \
-                                0x000000FF  // this register enable DMA mode.
-                                            // when '1' respective ADC channel
-                                            // is enabled for DMA. When '0' only
-                                            // interrupt mode is enabled. Bit 0:
-                                            // channel 0 DMA mode enable. Bit 1:
-                                            // channel 1 DMA mode enable. Bit 2:
-                                            // channel 2 DMA mode enable. Bit 3:
-                                            // channel 3 DMA mode enable. bit 4:
-                                            // channel 4 DMA mode enable. bit 5:
-                                            // channel 5 DMA mode enable. bit 6:
-                                            // channel 6 DMA mode enable. bit 7:
-                                            // channel 7 DMA mode enable.
-
-#define ADC_adc_dma_mode_en_DMA_MODEenable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_timer_configuration register.
-//
-//******************************************************************************
-#define ADC_adc_timer_configuration_timeren \
-                                0x02000000  // when '1' timer is enabled.
-
-#define ADC_adc_timer_configuration_timerreset \
-                                0x01000000  // when '1' reset timer.
-
-#define ADC_adc_timer_configuration_timercount_M \
-                                0x00FFFFFF  // Timer count configuration. 17
-                                            // bit counter is supported. Other
-                                            // MSB's are redundent.
-
-#define ADC_adc_timer_configuration_timercount_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_timer_current_count register.
-//
-//******************************************************************************
-#define ADC_adc_timer_current_count_timercurrentcount_M \
-                                0x0001FFFF  // Timer count configuration
-
-#define ADC_adc_timer_current_count_timercurrentcount_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel0FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel0FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel0FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel1FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel1FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel1FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel2FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel2FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel2FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel3FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel3FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel3FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel4FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel4FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel4FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel5FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel5FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel5FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel6FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel6FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel6FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_channel7FIFODATA register.
-//
-//******************************************************************************
-#define ADC_channel7FIFODATA_FIFO_RD_DATA_M \
-                                0xFFFFFFFF  // read to this register would
-                                            // return ADC data along with time
-                                            // stamp information in following
-                                            // format: bits [13:0] : ADC sample
-                                            // bits [31:14]: : time stamp per
-                                            // ADC sample
-
-#define ADC_channel7FIFODATA_FIFO_RD_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch0_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch0_fifo_lvl_adc_channel0_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch0_fifo_lvl_adc_channel0_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch1_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch1_fifo_lvl_adc_channel1_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch1_fifo_lvl_adc_channel1_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch2_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch2_fifo_lvl_adc_channel2_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch2_fifo_lvl_adc_channel2_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch3_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch3_fifo_lvl_adc_channel3_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch3_fifo_lvl_adc_channel3_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch4_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch4_fifo_lvl_adc_channel4_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch4_fifo_lvl_adc_channel4_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch5_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch5_fifo_lvl_adc_channel5_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch5_fifo_lvl_adc_channel5_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch6_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch6_fifo_lvl_adc_channel6_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch6_fifo_lvl_adc_channel6_fifo_lvl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// ADC_O_adc_ch7_fifo_lvl register.
-//
-//******************************************************************************
-#define ADC_adc_ch7_fifo_lvl_adc_channel7_fifo_lvl_M \
-                                0x00000007  // This register shows current FIFO
-                                            // level. FIFO is 4 word wide.
-                                            // Possible supported levels are :
-                                            // 0x0 to 0x3
-
-#define ADC_adc_ch7_fifo_lvl_adc_channel7_fifo_lvl_S 0
-
-
-
-#endif // __HW_ADC_H__
diff --git a/ports/cc3200/hal/inc/hw_aes.h b/ports/cc3200/hal/inc/hw_aes.h
deleted file mode 100644
index 3ab0398b352c0..0000000000000
--- a/ports/cc3200/hal/inc/hw_aes.h
+++ /dev/null
@@ -1,802 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_AES_H__
-#define __HW_AES_H__
-
-//*****************************************************************************
-//
-// The following are defines for the AES_P register offsets.
-//
-//*****************************************************************************
-#define AES_O_KEY2_6          0x00000000  // XTS second key / CBC-MAC third
-                                            // key
-#define AES_O_KEY2_7          0x00000004  // XTS second key (MSW for 256-bit
-                                            // key) / CBC-MAC third key (MSW)
-#define AES_O_KEY2_4          0x00000008  // XTS / CCM second key / CBC-MAC
-                                            // third key (LSW)
-#define AES_O_KEY2_5          0x0000000C  // XTS second key (MSW for 192-bit
-                                            // key) / CBC-MAC third key
-#define AES_O_KEY2_2          0x00000010  // XTS / CCM / CBC-MAC second key /
-                                            // Hash Key input
-#define AES_O_KEY2_3          0x00000014  // XTS second key (MSW for 128-bit
-                                            // key) + CCM/CBC-MAC second key
-                                            // (MSW) / Hash Key input (MSW)
-#define AES_O_KEY2_0          0x00000018  // XTS / CCM / CBC-MAC second key
-                                            // (LSW) / Hash Key input (LSW)
-#define AES_O_KEY2_1          0x0000001C  // XTS / CCM / CBC-MAC second key /
-                                            // Hash Key input
-#define AES_O_KEY1_6          0x00000020  // Key (LSW for 256-bit key)
-#define AES_O_KEY1_7          0x00000024  // Key (MSW for 256-bit key)
-#define AES_O_KEY1_4          0x00000028  // Key (LSW for 192-bit key)
-#define AES_O_KEY1_5          0x0000002C  // Key (MSW for 192-bit key)
-#define AES_O_KEY1_2          0x00000030  // Key
-#define AES_O_KEY1_3          0x00000034  // Key (MSW for 128-bit key)
-#define AES_O_KEY1_0          0x00000038  // Key (LSW for 128-bit key)
-#define AES_O_KEY1_1          0x0000003C  // Key
-#define AES_O_IV_IN_0         0x00000040  // Initialization Vector input
-                                            // (LSW)
-#define AES_O_IV_IN_1         0x00000044  // Initialization vector input
-#define AES_O_IV_IN_2         0x00000048  // Initialization vector input
-#define AES_O_IV_IN_3         0x0000004C  // Initialization Vector input
-                                            // (MSW)
-#define AES_O_CTRL            0x00000050  // register determines the mode of
-                                            // operation of the AES Engine
-#define AES_O_C_LENGTH_0      0x00000054  // Crypto data length registers
-                                            // (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-#define AES_O_C_LENGTH_1      0x00000058  // Crypto data length registers
-                                            // (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-#define AES_O_AUTH_LENGTH     0x0000005C  // AAD data length. The
-                                            // authentication length register
-                                            // store the authentication data
-                                            // length in bytes for combined
-                                            // modes only (GCM or CCM) Supported
-                                            // AAD-lengths for CCM are from 0 to
-                                            // (2^16 - 2^8) bytes. For GCM any
-                                            // value up to (2^32 - 1) bytes can
-                                            // be used. Once processing with
-                                            // this context is started@@ this
-                                            // length decrements to zero. A
-                                            // write to this register triggers
-                                            // the engine to start using this
-                                            // context for GCM and CCM. For XTS
-                                            // this register is optionally used
-                                            // to load ‘j’. Loading of ‘j’ is
-                                            // only required if ‘j’ != 0. ‘j’ is
-                                            // a 28-bit value and must be
-                                            // written to bits [31-4] of this
-                                            // register. ‘j’ represents the
-                                            // sequential number of the 128-bit
-                                            // block inside the data unit. For
-                                            // the first block in a unit@@ this
-                                            // value is zero. It is not required
-                                            // to provide a ‘j’ for each new
-                                            // data block within a unit. Note
-                                            // that it is possible to start with
-                                            // a ‘j’ unequal to zero; refer to
-                                            // Table 4 for more details. For a
-                                            // Host read operation@@ these
-                                            // registers return all-zeroes.
-#define AES_O_DATA_IN_0       0x00000060  // Data register to read and write
-                                            // plaintext/ciphertext (MSW)
-#define AES_O_DATA_IN_1       0x00000064  // Data register to read and write
-                                            // plaintext/ciphertext
-#define AES_O_DATA_IN_2       0x00000068  // Data register to read and write
-                                            // plaintext/ciphertext
-#define AES_O_DATA_IN_3       0x0000006C  // Data register to read and write
-                                            // plaintext/ciphertext (LSW)
-#define AES_O_TAG_OUT_0       0x00000070
-#define AES_O_TAG_OUT_1       0x00000074
-#define AES_O_TAG_OUT_2       0x00000078
-#define AES_O_TAG_OUT_3       0x0000007C
-#define AES_O_REVISION        0x00000080  // Register AES_REVISION
-#define AES_O_SYSCONFIG       0x00000084  // Register AES_SYSCONFIG.This
-                                            // register configures the DMA
-                                            // signals and controls the IDLE and
-                                            // reset logic
-#define AES_O_SYSSTATUS       0x00000088
-#define AES_O_IRQSTATUS       0x0000008C  // This register indicates the
-                                            // interrupt status. If one of the
-                                            // interrupt bits is set the
-                                            // interrupt output will be asserted
-#define AES_O_IRQENABLE       0x00000090  // This register contains an enable
-                                            // bit for each unique interrupt
-                                            // generated by the module. It
-                                            // matches the layout of
-                                            // AES_IRQSTATUS register. An
-                                            // interrupt is enabled when the bit
-                                            // in this register is set to ‘1’.
-                                            // An interrupt that is enabled is
-                                            // propagated to the SINTREQUEST_x
-                                            // output. All interrupts need to be
-                                            // enabled explicitly by writing
-                                            // this register.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_6 register.
-//
-//******************************************************************************
-#define AES_KEY2_6_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_6_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_7 register.
-//
-//******************************************************************************
-#define AES_KEY2_7_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_7_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_4 register.
-//
-//******************************************************************************
-#define AES_KEY2_4_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_4_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_5 register.
-//
-//******************************************************************************
-#define AES_KEY2_5_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_5_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_2 register.
-//
-//******************************************************************************
-#define AES_KEY2_2_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_2_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_3 register.
-//
-//******************************************************************************
-#define AES_KEY2_3_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_3_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_0 register.
-//
-//******************************************************************************
-#define AES_KEY2_0_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_0_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY2_1 register.
-//
-//******************************************************************************
-#define AES_KEY2_1_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY2_1_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_6 register.
-//
-//******************************************************************************
-#define AES_KEY1_6_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_6_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_7 register.
-//
-//******************************************************************************
-#define AES_KEY1_7_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_7_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_4 register.
-//
-//******************************************************************************
-#define AES_KEY1_4_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_4_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_5 register.
-//
-//******************************************************************************
-#define AES_KEY1_5_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_5_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_2 register.
-//
-//******************************************************************************
-#define AES_KEY1_2_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_2_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_3 register.
-//
-//******************************************************************************
-#define AES_KEY1_3_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_3_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_0 register.
-//
-//******************************************************************************
-#define AES_KEY1_0_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_0_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_KEY1_1 register.
-//
-//******************************************************************************
-#define AES_KEY1_1_KEY_M      0xFFFFFFFF  // key data
-#define AES_KEY1_1_KEY_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_0 register.
-//
-//******************************************************************************
-#define AES_IV_IN_0_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_0_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_1 register.
-//
-//******************************************************************************
-#define AES_IV_IN_1_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_1_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_2 register.
-//
-//******************************************************************************
-#define AES_IV_IN_2_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_2_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IV_IN_3 register.
-//
-//******************************************************************************
-#define AES_IV_IN_3_DATA_M    0xFFFFFFFF  // IV data
-#define AES_IV_IN_3_DATA_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_CTRL register.
-//
-//******************************************************************************
-#define AES_CTRL_CONTEXT_READY \
-                                0x80000000  // If ‘1’@@ this read-only status
-                                            // bit indicates that the context
-                                            // data registers can be overwritten
-                                            // and the host is permitted to
-                                            // write the next context.
-
-#define AES_CTRL_SVCTXTRDY \
-                                0x40000000  // If ‘1’@@ this read-only status
-                                            // bit indicates that an AES
-                                            // authentication TAG and/or IV
-                                            // block(s) is/are available for the
-                                            // host to retrieve. This bit is
-                                            // only asserted if the
-                                            // ‘save_context’ bit is set to ‘1’.
-                                            // The bit is mutual exclusive with
-                                            // the ‘context_ready’ bit.
-
-#define AES_CTRL_SAVE_CONTEXT 0x20000000  // This bit is used to indicate
-                                            // that an authentication TAG or
-                                            // result IV needs to be stored as a
-                                            // result context. If this bit is
-                                            // set@@ context output DMA and/or
-                                            // interrupt will be asserted if the
-                                            // operation is finished and related
-                                            // signals are enabled.
-#define AES_CTRL_CCM_M      0x01C00000  // Defines “M” that indicated the
-                                            // length of the authentication
-                                            // field for CCM operations; the
-                                            // authentication field length
-                                            // equals two times (the value of
-                                            // CCM-M plus one). Note that the
-                                            // AES Engine always returns a
-                                            // 128-bit authentication field@@ of
-                                            // which the M least significant
-                                            // bytes are valid. All values are
-                                            // supported.
-#define AES_CTRL_CCM_S      22
-#define AES_CTRL_CCM_L_M      0x00380000  // Defines “L” that indicated the
-                                            // width of the length field for CCM
-                                            // operations; the length field in
-                                            // bytes equals the value of CMM-L
-                                            // plus one. Supported values for L
-                                            // are (programmed value): 2 (1)@@ 4
-                                            // (3) and 8 (7).
-#define AES_CTRL_CCM_L_S      19
-#define AES_CTRL_CCM          0x00040000  // AES-CCM is selected@@ this is a
-                                            // combined mode@@ using AES for
-                                            // both authentication and
-                                            // encryption. No additional mode
-                                            // selection is required. 0 Other
-                                            // mode selected 1 ccm mode selected
-#define AES_CTRL_GCM_M        0x00030000  // AES-GCM mode is selected.this is
-                                            // a combined mode@@ using the
-                                            // Galois field multiplier GF(2^128)
-                                            // for authentication and AES-CTR
-                                            // mode for encryption@@ the bits
-                                            // specify the GCM mode. 0x0 No
-                                            // operation 0x1 GHASH with H loaded
-                                            // and Y0-encrypted forced to zero
-                                            // 0x2 GHASH with H loaded and
-                                            // Y0-encrypted calculated
-                                            // internally 0x3 Autonomous GHASH
-                                            // (both H and Y0-encrypted
-                                            // calculated internally)
-#define AES_CTRL_GCM_S        16
-#define AES_CTRL_CBCMAC       0x00008000  // AES-CBC MAC is selected@@ the
-                                            // Direction bit must be set to ‘1’
-                                            // for this mode. 0 Other mode
-                                            // selected 1 cbcmac mode selected
-#define AES_CTRL_F9           0x00004000  // AES f9 mode is selected@@ the
-                                            // AES key size must be set to
-                                            // 128-bit for this mode. 0 Other
-                                            // mode selected 1 f9 selected
-#define AES_CTRL_F8           0x00002000  // AES f8 mode is selected@@ the
-                                            // AES key size must be set to
-                                            // 128-bit for this mode. 0 Other
-                                            // mode selected 1 f8 selected
-#define AES_CTRL_XTS_M        0x00001800  // AES-XTS operation is selected;
-                                            // the bits specify the XTS mode.01
-                                            // = Previous/intermediate tweak
-                                            // value and ‘j’ loaded (value is
-                                            // loaded via IV@@ j is loaded via
-                                            // the AAD length register) 0x0 No
-                                            // operation 0x1
-                                            // Previous/intermediate tweak value
-                                            // and ‘j’ loaded (value is loaded
-                                            // via IV@@ j is loaded via the AAD
-                                            // length register) 0x2 Key2@@ i and
-                                            // j loaded (i is loaded via IV@@ j
-                                            // is loaded via the AAD length
-                                            // register) 0x3 Key2 and i loaded@@
-                                            // j=0 (i is loaded via IV)
-#define AES_CTRL_XTS_S        11
-#define AES_CTRL_CFB          0x00000400  // full block AES cipher feedback
-                                            // mode (CFB128) is selected. 0
-                                            // other mode selected 1 cfb
-                                            // selected
-#define AES_CTRL_ICM          0x00000200  // AES integer counter mode (ICM)
-                                            // is selected@@ this is a counter
-                                            // mode with a 16-bit wide counter.
-                                            // 0 Other mode selected. 1 ICM mode
-                                            // selected
-#define AES_CTRL_CTR_WIDTH_M  0x00000180  // Specifies the counter width for
-                                            // AES-CTR mode 0x0 Counter is 32
-                                            // bits 0x1 Counter is 64 bits 0x2
-                                            // Counter is 128 bits 0x3 Counter
-                                            // is 192 bits
-#define AES_CTRL_CTR_WIDTH_S  7
-#define AES_CTRL_CTR          0x00000040  // Tthis bit must also be set for
-                                            // GCM and CCM@@ when
-                                            // encryption/decryption is
-                                            // required. 0 Other mode selected 1
-                                            // Counter mode
-#define AES_CTRL_MODE         0x00000020  // ecb/cbc mode 0 ecb mode 1 cbc
-                                            // mode
-#define AES_CTRL_KEY_SIZE_M   0x00000018  // key size 0x0 reserved 0x1 Key is
-                                            // 128 bits. 0x2 Key is 192 bits 0x3
-                                            // Key is 256
-#define AES_CTRL_KEY_SIZE_S   3
-#define AES_CTRL_DIRECTION    0x00000004  // If set to ‘1’ an encrypt
-                                            // operation is performed. If set to
-                                            // ‘0’ a decrypt operation is
-                                            // performed. Read 0 decryption is
-                                            // selected Read 1 Encryption is
-                                            // selected
-#define AES_CTRL_INPUT_READY  0x00000002  // If ‘1’@@ this read-only status
-                                            // bit indicates that the 16-byte
-                                            // input buffer is empty@@ and the
-                                            // host is permitted to write the
-                                            // next block of data.
-#define AES_CTRL_OUTPUT_READY 0x00000001  // If ‘1’@@ this read-only status
-                                            // bit indicates that an AES output
-                                            // block is available for the host
-                                            // to retrieve.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_C_LENGTH_0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_C_LENGTH_1 register.
-//
-//******************************************************************************
-#define AES_C_LENGTH_1_LENGTH_M \
-                                0x1FFFFFFF  // Data length (MSW) length
-                                            // registers (LSW and MSW) store the
-                                            // cryptographic data length in
-                                            // bytes for all modes. Once
-                                            // processing with this context is
-                                            // started@@ this length decrements
-                                            // to zero. Data lengths up to (2^61
-                                            // – 1) bytes are allowed. For GCM@@
-                                            // any value up to 2^36 - 32 bytes
-                                            // can be used. This is because a
-                                            // 32-bit counter mode is used; the
-                                            // maximum number of 128-bit blocks
-                                            // is 2^32 – 2@@ resulting in a
-                                            // maximum number of bytes of 2^36 -
-                                            // 32. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. This is valid
-                                            // for all modes except GCM and CCM.
-                                            // Note that for the combined
-                                            // modes@@ this length does not
-                                            // include the authentication only
-                                            // data; the authentication length
-                                            // is specified in the
-                                            // AES_AUTH_LENGTH register below.
-                                            // All modes must have a length > 0.
-                                            // For the combined modes@@ it is
-                                            // allowed to have one of the
-                                            // lengths equal to zero. For the
-                                            // basic encryption modes
-                                            // (ECB/CBC/CTR/ICM/CFB128) it is
-                                            // allowed to program zero to the
-                                            // length field; in that case the
-                                            // length is assumed infinite. All
-                                            // data must be byte (8-bit)
-                                            // aligned; bit aligned data streams
-                                            // are not supported by the AES
-                                            // Engine. For a Host read
-                                            // operation@@ these registers
-                                            // return all-zeroes.
-
-#define AES_C_LENGTH_1_LENGTH_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// AES_O_AUTH_LENGTH register.
-//
-//******************************************************************************
-#define AES_AUTH_LENGTH_AUTH_M \
-                                0xFFFFFFFF  // data
-
-#define AES_AUTH_LENGTH_AUTH_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_0 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_0_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_0_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_1 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_1_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_1_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_2 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_2_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_2_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_DATA_IN_3 register.
-//
-//******************************************************************************
-#define AES_DATA_IN_3_DATA_M  0xFFFFFFFF  // Data to encrypt/decrypt
-#define AES_DATA_IN_3_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_0 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_0_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_0_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_1 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_1_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_1_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_2 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_2_HASH_M  0xFFFFFFFF  // Hash result (MSW)
-#define AES_TAG_OUT_2_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_TAG_OUT_3 register.
-//
-//******************************************************************************
-#define AES_TAG_OUT_3_HASH_M  0xFFFFFFFF  // Hash result (LSW)
-#define AES_TAG_OUT_3_HASH_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_REVISION register.
-//
-//******************************************************************************
-#define AES_REVISION_SCHEME_M 0xC0000000
-#define AES_REVISION_SCHEME_S 30
-#define AES_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define AES_REVISION_FUNC_S   16
-#define AES_REVISION_R_RTL_M  0x0000F800  // RTL Version (R)@@ maintained by
-                                            // IP design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define AES_REVISION_R_RTL_S  11
-#define AES_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X)@@ maintained
-                                            // by IP specification owner. X
-                                            // changes ONLY when: (1) There is a
-                                            // major feature addition. An
-                                            // example would be adding Master
-                                            // Mode to Utopia Level2. The Func
-                                            // field (or Class/Type in old PID
-                                            // format) will remain the same. X
-                                            // does NOT change due to: (1) Bug
-                                            // fixes (2) Change in feature
-                                            // parameters.
-
-#define AES_REVISION_X_MAJOR_S 8
-#define AES_REVISION_CUSTOM_M 0x000000C0
-#define AES_REVISION_CUSTOM_S 6
-#define AES_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y)@@ maintained
-                                            // by IP specification owner. Y
-                                            // changes ONLY when: (1) Features
-                                            // are scaled (up or down).
-                                            // Flexibility exists in that this
-                                            // feature scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R@@ S@@ X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless@@ the spec tracks
-                                            // the IP bugs. An RTL release (say
-                                            // for silicon PG1.1) that occurs
-                                            // due to bug fix should document
-                                            // the corresponding spec number
-                                            // (X.Y.S) in its release notes.
-
-#define AES_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define AES_SYSCONFIG_MACONTEXT_OUT_ON_DATA_OUT \
-                                0x00000200  // If set to '1' the two context
-                                            // out requests
-                                            // (dma_req_context_out_en@@ Bit [8]
-                                            // above@@ and context_out interrupt
-                                            // enable@@ Bit [3] of AES_IRQENABLE
-                                            // register) are mapped on the
-                                            // corresponding data output request
-                                            // bit. In this case@@ the original
-                                            // ‘context out’ bit values are
-                                            // ignored.
-
-#define AES_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN \
-                                0x00000100  // If set to ‘1’@@ the DMA context
-                                            // output request is enabled (for
-                                            // context data out@@ e.g. TAG for
-                                            // authentication modes). 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN \
-                                0x00000080  // If set to ‘1’@@ the DMA context
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_DATA_OUT_EN \
-                                0x00000040  // If set to ‘1’@@ the DMA output
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define AES_SYSCONFIG_DMA_REQ_DATA_IN_EN \
-                                0x00000020  // If set to ‘1’@@ the DMA input
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define AES_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define AES_IRQSTATUS_CONTEXT_OUT \
-                                0x00000008  // This bit indicates
-                                            // authentication tag (and IV)
-                                            // interrupt(s) is/are active and
-                                            // triggers the interrupt output.
-
-#define AES_IRQSTATUS_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define AES_IRQSTATUS_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define AES_IRQSTATUS_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the AES_O_IRQENABLE register.
-//
-//******************************************************************************
-#define AES_IRQENABLE_CONTEXT_OUT \
-                                0x00000008  // This bit indicates
-                                            // authentication tag (and IV)
-                                            // interrupt(s) is/are active and
-                                            // triggers the interrupt output.
-
-#define AES_IRQENABLE_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define AES_IRQENABLE_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define AES_IRQENABLE_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-
-
-
-#endif // __HW_AES_H__
diff --git a/ports/cc3200/hal/inc/hw_apps_config.h b/ports/cc3200/hal/inc/hw_apps_config.h
deleted file mode 100644
index b8789b98026be..0000000000000
--- a/ports/cc3200/hal/inc/hw_apps_config.h
+++ /dev/null
@@ -1,747 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-
-#ifndef __HW_APPS_CONFIG_H__
-#define __HW_APPS_CONFIG_H__
-
-//*****************************************************************************
-//
-// The following are defines for the APPS_CONFIG register offsets.
-//
-//*****************************************************************************
-#define APPS_CONFIG_O_PATCH_TRAP_ADDR_REG \
-                                0x00000000  // Patch trap address Register
-                                            // array
-
-#define APPS_CONFIG_O_PATCH_TRAP_EN_REG \
-                                0x00000078
-
-#define APPS_CONFIG_O_FAULT_STATUS_REG \
-                                0x0000007C
-
-#define APPS_CONFIG_O_MEMSS_WR_ERR_CLR_REG \
-                                0x00000080
-
-#define APPS_CONFIG_O_MEMSS_WR_ERR_ADDR_REG \
-                                0x00000084
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK \
-                                0x0000008C
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK_SET \
-                                0x00000090
-
-#define APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR \
-                                0x00000094
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_CLR \
-                                0x00000098
-
-#define APPS_CONFIG_O_DMA_DONE_INT_ACK \
-                                0x0000009C
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED \
-                                0x000000A0
-
-#define APPS_CONFIG_O_DMA_DONE_INT_STS_RAW \
-                                0x000000A4
-
-#define APPS_CONFIG_O_FAULT_STATUS_CLR_REG \
-                                0x000000A8
-
-#define APPS_CONFIG_O_RESERVD_REG_0 \
-                                0x000000AC
-
-#define APPS_CONFIG_O_GPT_TRIG_SEL \
-                                0x000000B0
-
-#define APPS_CONFIG_O_TOP_DIE_SPARE_DIN_REG \
-                                0x000000B4
-
-#define APPS_CONFIG_O_TOP_DIE_SPARE_DOUT_REG \
-                                0x000000B8
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_PATCH_TRAP_ADDR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_PATCH_TRAP_ADDR_REG_PATCH_TRAP_ADDR_M \
-                                0xFFFFFFFF  // When PATCH_TRAP_EN[n] is set bus
-                                            // fault is generated for the
-                                            // address
-                                            // PATCH_TRAP_ADDR_REG[n][31:0] from
-                                            // Idcode bus. The exception routine
-                                            // should take care to jump to the
-                                            // location where the patch
-                                            // correspond to this address is
-                                            // kept.
-
-#define APPS_CONFIG_PATCH_TRAP_ADDR_REG_PATCH_TRAP_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_PATCH_TRAP_EN_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_PATCH_TRAP_EN_REG_PATCH_TRAP_EN_M \
-                                0x3FFFFFFF  // When PATCH_TRAP_EN[n] is set bus
-                                            // fault is generated for the
-                                            // address PATCH_TRAP_ADD[n][31:0]
-                                            // from Idcode bus. The exception
-                                            // routine should take care to jump
-                                            // to the location where the patch
-                                            // correspond to this address is
-                                            // kept.
-
-#define APPS_CONFIG_PATCH_TRAP_EN_REG_PATCH_TRAP_EN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_FAULT_STATUS_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR_INDEX_M \
-                                0x0000003E  // This field shows because of
-                                            // which patch trap address the
-                                            // bus_fault is generated. If the
-                                            // PATCH_ERR bit is set, then it
-                                            // means the bus fault is generated
-                                            // because of
-                                            // PATCH_TRAP_ADDR_REG[2^PATCH_ERR_INDEX]
-
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR_INDEX_S 1
-#define APPS_CONFIG_FAULT_STATUS_REG_PATCH_ERR \
-                                0x00000001  // This bit is set when there is a
-                                            // bus fault because of patched
-                                            // address access to the Apps boot
-                                            // rom. Write 0 to clear this
-                                            // register.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_MEMSS_WR_ERR_CLR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_MEMSS_WR_ERR_CLR_REG_MEMSS_WR_ERR_CLR \
-                                0x00000001  // This bit is set when there is a
-                                            // an error in memss write access.
-                                            // And the address causing this
-                                            // error is captured in
-                                            // MEMSS_ERR_ADDR_REG. To capture
-                                            // the next error address one have
-                                            // to clear this bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_MEMSS_WR_ERR_ADDR_REG register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_ADC_WR_DMA_DONE_INT_MASK_M \
-                                0x0000F000  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-                                            // bit 14: ADC channel 7 interrupt
-                                            // enable/disable bit 13: ADC
-                                            // channel 5 interrupt
-                                            // enable/disable bit 12: ADC
-                                            // channel 3 interrupt
-                                            // enable/disable bit 11: ADC
-                                            // channel 1 interrupt
-                                            // enable/disable
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_ADC_WR_DMA_DONE_INT_MASK_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_MCASP_WR_DMA_DONE_INT_MASK \
-                                0x00000800  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_MCASP_RD_DMA_DONE_INT_MASK \
-                                0x00000400  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK \
-                                0x00000200  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CAM_THRESHHOLD_DMA_DONE_INT_MASK \
-                                0x00000100  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SHSPI_WR_DMA_DONE_INT_MASK \
-                                0x00000080  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SHSPI_RD_DMA_DONE_INT_MASK \
-                                0x00000040  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_HOSTSPI_WR_DMA_DONE_INT_MASK \
-                                0x00000020  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_HOSTSPI_RD_DMA_DONE_INT_MASK \
-                                0x00000010  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_APPS_SPI_WR_DMA_DONE_INT_MASK \
-                                0x00000008  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_APPS_SPI_RD_DMA_DONE_INT_MASK \
-                                0x00000004  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SDIOM_WR_DMA_DONE_INT_MASK \
-                                0x00000002  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SDIOM_RD_DMA_DONE_INT_MASK \
-                                0x00000001  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK_SET register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_ADC_WR_DMA_DONE_INT_MASK_SET_M \
-                                0x0000F000  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect bit 14: ADC channel 7 DMA
-                                            // Done IRQ bit 13: ADC channel 5
-                                            // DMA Done IRQ bit 12: ADC channel
-                                            // 3 DMA Done IRQ bit 11: ADC
-                                            // channel 1 DMA Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_ADC_WR_DMA_DONE_INT_MASK_SET_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_MCASP_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000800  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_MCASP_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000400  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK_SET \
-                                0x00000200  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_CAM_THRESHHOLD_DMA_DONE_INT_MASK_SET \
-                                0x00000100  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SHSPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000080  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SHSPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000040  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_HOSTSPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000020  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_HOSTSPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000010  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_APPS_SPI_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000008  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_APPS_SPI_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000004  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SDIOM_WR_DMA_DONE_INT_MASK_SET \
-                                0x00000002  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_SET_SDIOM_RD_DMA_DONE_INT_MASK_SET \
-                                0x00000001  // write 1 to set mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_ADC_WR_DMA_DONE_INT_MASK_CLR_M \
-                                0x0000F000  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect bit 14: ADC channel 7 DMA
-                                            // Done IRQ mask bit 13: ADC channel
-                                            // 5 DMA Done IRQ mask bit 12: ADC
-                                            // channel 3 DMA Done IRQ mask bit
-                                            // 11: ADC channel 1 DMA Done IRQ
-                                            // mask
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_ADC_WR_DMA_DONE_INT_MASK_CLR_S 12
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_MACASP_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000800  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_MCASP_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000400  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_CAM_FIFO_EMPTY_DMA_DONE_INT_MASK_CLR \
-                                0x00000200  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_CAM_THRESHHOLD_DMA_DONE_INT_MASK_CLR \
-                                0x00000100  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SHSPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000080  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SHSPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000040  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_HOSTSPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000020  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_HOSTSPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000010  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_APPS_SPI_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000008  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_APPS_SPI_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000004  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SDIOM_WR_DMA_DONE_INT_MASK_CLR \
-                                0x00000002  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-#define APPS_CONFIG_DMA_DONE_INT_MASK_CLR_SDIOM_RD_DMA_DONE_INT_MASK_CLR \
-                                0x00000001  // write 1 to clear mask of the
-                                            // corresponding DMA DONE IRQ;0 = no
-                                            // effect
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_CLR register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_CLR_DMA_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 or 0 to clear all
-                                            // DMA_DONE interrupt;
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_CLR_DMA_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_ACK register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_ACK_ADC_WR_DMA_DONE_INT_ACK_M \
-                                0x0000F000  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect; bit 14:
-                                            // ADC channel 7 DMA Done IRQ bit
-                                            // 13: ADC channel 5 DMA Done IRQ
-                                            // bit 12: ADC channel 3 DMA Done
-                                            // IRQ bit 11: ADC channel 1 DMA
-                                            // Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_ADC_WR_DMA_DONE_INT_ACK_S 12
-#define APPS_CONFIG_DMA_DONE_INT_ACK_MCASP_WR_DMA_DONE_INT_ACK \
-                                0x00000800  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_MCASP_RD_DMA_DONE_INT_ACK \
-                                0x00000400  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_CAM_FIFO_EMPTY_DMA_DONE_INT_ACK \
-                                0x00000200  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_CAM_THRESHHOLD_DMA_DONE_INT_ACK \
-                                0x00000100  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SHSPI_WR_DMA_DONE_INT_ACK \
-                                0x00000080  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SHSPI_RD_DMA_DONE_INT_ACK \
-                                0x00000040  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_HOSTSPI_WR_DMA_DONE_INT_ACK \
-                                0x00000020  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_HOSTSPI_RD_DMA_DONE_INT_ACK \
-                                0x00000010  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_APPS_SPI_WR_DMA_DONE_INT_ACK \
-                                0x00000008  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_APPS_SPI_RD_DMA_DONE_INT_ACK \
-                                0x00000004  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SDIOM_WR_DMA_DONE_INT_ACK \
-                                0x00000002  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-#define APPS_CONFIG_DMA_DONE_INT_ACK_SDIOM_RD_DMA_DONE_INT_ACK \
-                                0x00000001  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_ADC_WR_DMA_DONE_INT_STS_MASKED_M \
-                                0x0000F000  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask bit 14: ADC
-                                            // channel 7 DMA Done IRQ bit 13:
-                                            // ADC channel 5 DMA Done IRQ bit
-                                            // 12: ADC channel 3 DMA Done IRQ
-                                            // bit 11: ADC channel 1 DMA Done
-                                            // IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_ADC_WR_DMA_DONE_INT_STS_MASKED_S 12
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_MCASP_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000800  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_MCASP_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000400  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_CAM_FIFO_EMPTY_DMA_DONE_INT_STS_MASKED \
-                                0x00000200  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_CAM_THRESHHOLD_DMA_DONE_INT_STS_MASKED \
-                                0x00000100  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SHSPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000080  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SHSPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000040  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_HOSTSPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000020  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_HOSTSPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000010  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_APPS_SPI_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000008  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_APPS_SPI_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000004  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SDIOM_WR_DMA_DONE_INT_STS_MASKED \
-                                0x00000002  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_MASKED_SDIOM_RD_DMA_DONE_INT_STS_MASKED \
-                                0x00000001  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by DMA_DONE_INT mask
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_DMA_DONE_INT_STS_RAW register.
-//
-//******************************************************************************
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_ADC_WR_DMA_DONE_INT_STS_RAW_M \
-                                0x0000F000  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive bit 14: ADC channel 7
-                                            // DMA Done IRQ bit 13: ADC channel
-                                            // 5 DMA Done IRQ bit 12: ADC
-                                            // channel 3 DMA Done IRQ bit 11:
-                                            // ADC channel 1 DMA Done IRQ
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_ADC_WR_DMA_DONE_INT_STS_RAW_S 12
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_MCASP_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000800  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_MCASP_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000400  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_CAM_EPMTY_FIFO_DMA_DONE_INT_STS_RAW \
-                                0x00000200  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_CAM_THRESHHOLD_DMA_DONE_INT_STS_RAW \
-                                0x00000100  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SHSPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000080  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SHSPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000040  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_HOSTSPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000020  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_HOSTSPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000010  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_APPS_SPI_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000008  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_APPS_SPI_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000004  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SDIOM_WR_DMA_DONE_INT_STS_RAW \
-                                0x00000002  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define APPS_CONFIG_DMA_DONE_INT_STS_RAW_SDIOM_RD_DMA_DONE_INT_STS_RAW \
-                                0x00000001  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_FAULT_STATUS_CLR_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_FAULT_STATUS_CLR_REG_PATCH_ERR_CLR \
-                                0x00000001  // Write 1 to clear the LSB of
-                                            // FAULT_STATUS_REG
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_RESERVD_REG_0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_GPT_TRIG_SEL register.
-//
-//******************************************************************************
-#define APPS_CONFIG_GPT_TRIG_SEL_GPT_TRIG_SEL_M \
-                                0x000000FF  // This bit is implemented for GPT
-                                            // trigger mode select. GPT IP
-                                            // support 2 modes: RTC mode and
-                                            // external trigger. When this bit
-                                            // is set to logic '1': enable
-                                            // external trigger mode for APPS
-                                            // GPT CP0 and CP1 pin. bit 0: when
-                                            // set '1' enable external GPT
-                                            // trigger 0 on GPIO0 CP0 pin else
-                                            // RTC mode is selected. bit 1: when
-                                            // set '1' enable external GPT
-                                            // trigger 1 on GPIO0 CP1 pin else
-                                            // RTC mode is selected. bit 2: when
-                                            // set '1' enable external GPT
-                                            // trigger 2 on GPIO1 CP0 pin else
-                                            // RTC mode is selected. bit 3: when
-                                            // set '1' enable external GPT
-                                            // trigger 3 on GPIO1 CP1 pin else
-                                            // RTC mode is selected. bit 4: when
-                                            // set '1' enable external GPT
-                                            // trigger 4 on GPIO2 CP0 pin else
-                                            // RTC mode is selected. bit 5: when
-                                            // set '1' enable external GPT
-                                            // trigger 5 on GPIO2 CP1 pin else
-                                            // RTC mode is selected. bit 6: when
-                                            // set '1' enable external GPT
-                                            // trigger 6 on GPIO3 CP0 pin else
-                                            // RTC mode is selected. bit 7: when
-                                            // set '1' enable external GPT
-                                            // trigger 7 on GPIO3 CP1 pin else
-                                            // RTC mode is selected.
-
-#define APPS_CONFIG_GPT_TRIG_SEL_GPT_TRIG_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_TOP_DIE_SPARE_DIN_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_TOP_DIE_SPARE_DIN_REG_D2D_SPARE_DIN_M \
-                                0x00000007  // Capture data from d2d_spare pads
-
-#define APPS_CONFIG_TOP_DIE_SPARE_DIN_REG_D2D_SPARE_DIN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_CONFIG_O_TOP_DIE_SPARE_DOUT_REG register.
-//
-//******************************************************************************
-#define APPS_CONFIG_TOP_DIE_SPARE_DOUT_REG_D2D_SPARE_DOUT_M \
-                                0x00000007  // Send data to d2d_spare pads -
-                                            // eventually this will get
-                                            // registered in top die
-
-#define APPS_CONFIG_TOP_DIE_SPARE_DOUT_REG_D2D_SPARE_DOUT_S 0
-
-
-
-#endif // __HW_APPS_CONFIG_H__
diff --git a/ports/cc3200/hal/inc/hw_apps_rcm.h b/ports/cc3200/hal/inc/hw_apps_rcm.h
deleted file mode 100644
index edb52d26beeb8..0000000000000
--- a/ports/cc3200/hal/inc/hw_apps_rcm.h
+++ /dev/null
@@ -1,1506 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_APPS_RCM_H__
-#define __HW_APPS_RCM_H__
-
-//*****************************************************************************
-//
-// The following are defines for the APPS_RCM register offsets.
-//
-//*****************************************************************************
-#define APPS_RCM_O_CAMERA_CLK_GEN \
-                                0x00000000
-
-#define APPS_RCM_O_CAMERA_CLK_GATING \
-                                0x00000004
-
-#define APPS_RCM_O_CAMERA_SOFT_RESET \
-                                0x00000008
-
-#define APPS_RCM_O_MCASP_CLK_GATING \
-                                0x00000014
-
-#define APPS_RCM_O_MCASP_SOFT_RESET \
-                                0x00000018
-
-#define APPS_RCM_O_MMCHS_CLK_GEN \
-                                0x00000020
-
-#define APPS_RCM_O_MMCHS_CLK_GATING \
-                                0x00000024
-
-#define APPS_RCM_O_MMCHS_SOFT_RESET \
-                                0x00000028
-
-#define APPS_RCM_O_MCSPI_A1_CLK_GEN \
-                                0x0000002C
-
-#define APPS_RCM_O_MCSPI_A1_CLK_GATING \
-                                0x00000030
-
-#define APPS_RCM_O_MCSPI_A1_SOFT_RESET \
-                                0x00000034
-
-#define APPS_RCM_O_MCSPI_A2_CLK_GEN \
-                                0x00000038
-
-#define APPS_RCM_O_MCSPI_A2_CLK_GATING \
-                                0x00000040
-
-#define APPS_RCM_O_MCSPI_A2_SOFT_RESET \
-                                0x00000044
-
-#define APPS_RCM_O_UDMA_A_CLK_GATING \
-                                0x00000048
-
-#define APPS_RCM_O_UDMA_A_SOFT_RESET \
-                                0x0000004C
-
-#define APPS_RCM_O_GPIO_A_CLK_GATING \
-                                0x00000050
-
-#define APPS_RCM_O_GPIO_A_SOFT_RESET \
-                                0x00000054
-
-#define APPS_RCM_O_GPIO_B_CLK_GATING \
-                                0x00000058
-
-#define APPS_RCM_O_GPIO_B_SOFT_RESET \
-                                0x0000005C
-
-#define APPS_RCM_O_GPIO_C_CLK_GATING \
-                                0x00000060
-
-#define APPS_RCM_O_GPIO_C_SOFT_RESET \
-                                0x00000064
-
-#define APPS_RCM_O_GPIO_D_CLK_GATING \
-                                0x00000068
-
-#define APPS_RCM_O_GPIO_D_SOFT_RESET \
-                                0x0000006C
-
-#define APPS_RCM_O_GPIO_E_CLK_GATING \
-                                0x00000070
-
-#define APPS_RCM_O_GPIO_E_SOFT_RESET \
-                                0x00000074
-
-#define APPS_RCM_O_WDOG_A_CLK_GATING \
-                                0x00000078
-
-#define APPS_RCM_O_WDOG_A_SOFT_RESET \
-                                0x0000007C
-
-#define APPS_RCM_O_UART_A0_CLK_GATING \
-                                0x00000080
-
-#define APPS_RCM_O_UART_A0_SOFT_RESET \
-                                0x00000084
-
-#define APPS_RCM_O_UART_A1_CLK_GATING \
-                                0x00000088
-
-#define APPS_RCM_O_UART_A1_SOFT_RESET \
-                                0x0000008C
-
-#define APPS_RCM_O_GPT_A0_CLK_GATING \
-                                0x00000090
-
-#define APPS_RCM_O_GPT_A0_SOFT_RESET \
-                                0x00000094
-
-#define APPS_RCM_O_GPT_A1_CLK_GATING \
-                                0x00000098
-
-#define APPS_RCM_O_GPT_A1_SOFT_RESET \
-                                0x0000009C
-
-#define APPS_RCM_O_GPT_A2_CLK_GATING \
-                                0x000000A0
-
-#define APPS_RCM_O_GPT_A2_SOFT_RESET \
-                                0x000000A4
-
-#define APPS_RCM_O_GPT_A3_CLK_GATING \
-                                0x000000A8
-
-#define APPS_RCM_O_GPT_A3_SOFT_RESET \
-                                0x000000AC
-
-#define APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0 \
-                                0x000000B0
-
-#define APPS_RCM_O_MCASP_FRAC_CLK_CONFIG1 \
-                                0x000000B4
-
-#define APPS_RCM_O_CRYPTO_CLK_GATING \
-                                0x000000B8
-
-#define APPS_RCM_O_CRYPTO_SOFT_RESET \
-                                0x000000BC
-
-#define APPS_RCM_O_MCSPI_S0_CLK_GATING \
-                                0x000000C8
-
-#define APPS_RCM_O_MCSPI_S0_SOFT_RESET \
-                                0x000000CC
-
-#define APPS_RCM_O_MCSPI_S0_CLKDIV_CFG \
-                                0x000000D0
-
-#define APPS_RCM_O_I2C_CLK_GATING \
-                                0x000000D8
-
-#define APPS_RCM_O_I2C_SOFT_RESET \
-                                0x000000DC
-
-#define APPS_RCM_O_APPS_LPDS_REQ \
-                                0x000000E4
-
-#define APPS_RCM_O_APPS_TURBO_REQ \
-                                0x000000EC
-
-#define APPS_RCM_O_APPS_DSLP_WAKE_CONFIG \
-                                0x00000108
-
-#define APPS_RCM_O_APPS_DSLP_WAKE_TIMER_CFG \
-                                0x0000010C
-
-#define APPS_RCM_O_APPS_RCM_SLP_WAKE_ENABLE \
-                                0x00000110
-
-#define APPS_RCM_O_APPS_SLP_WAKETIMER_CFG \
-                                0x00000114
-
-#define APPS_RCM_O_APPS_TO_NWP_WAKE_REQUEST \
-                                0x00000118
-
-#define APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS \
-                                0x00000120
-
-#define APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE \
-                                0x00000124
-
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of Camera func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_CAMERA_CLK_GEN_NU1_M \
-                                0x000000F8
-
-#define APPS_RCM_CAMERA_CLK_GEN_NU1_S 3
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of Camera func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_CAMERA_CLK_GEN_CAMERA_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU1_S 17
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable camera clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU2_S 9
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable camera clk during
-                                            // sleep mode ; 0- Disable camera
-                                            // clk during sleep mode
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_CAMERA_CLK_GATING_NU3_S 1
-#define APPS_RCM_CAMERA_CLK_GATING_CAMERA_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable camera clk during run
-                                            // mode ; 0- Disable camera clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CAMERA_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_CAMERA_SOFT_RESET_CAMERA_ENABLED_STATUS \
-                                0x00000002  // 1 - Camera clocks/resets are
-                                            // enabled ; 0 - Camera
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_CAMERA_SOFT_RESET_CAMERA_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for Camera-core
-                                            // ; 0 - De-assert reset for
-                                            // Camera-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCASP_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCASP clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCASP_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCASP_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCASP clk during sleep
-                                            // mode ; 0- Disable MCASP clk
-                                            // during sleep mode
-
-#define APPS_RCM_MCASP_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCASP_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCASP_CLK_GATING_MCASP_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCASP clk during run
-                                            // mode ; 0- Disable MCASP clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_SOFT_RESET_MCASP_ENABLED_STATUS \
-                                0x00000002  // 1 - MCASP Clocks/resets are
-                                            // enabled ; 0 - MCASP Clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_MCASP_SOFT_RESET_MCASP_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for MCASP-core
-                                            // ; 0 - De-assert reset for
-                                            // MCASP-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MMCHS func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_MMCHS_CLK_GEN_NU1_M \
-                                0x000000F8
-
-#define APPS_RCM_MMCHS_CLK_GEN_NU1_S 3
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MMCHS func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MMCHS_CLK_GEN_MMCHS_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU1_S 17
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MMCHS clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU2_S 9
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MMCHS clk during sleep
-                                            // mode ; 0- Disable MMCHS clk
-                                            // during sleep mode
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MMCHS_CLK_GATING_NU3_S 1
-#define APPS_RCM_MMCHS_CLK_GATING_MMCHS_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MMCHS clk during run
-                                            // mode ; 0- Disable MMCHS clk
-                                            // during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MMCHS_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MMCHS_SOFT_RESET_MMCHS_ENABLED_STATUS \
-                                0x00000002  // 1 - MMCHS Clocks/resets are
-                                            // enabled ; 0 - MMCHS Clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_MMCHS_SOFT_RESET_MMCHS_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for MMCHS-core
-                                            // ; 0 - De-assert reset for
-                                            // MMCHS-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud clk
-                                            // for MCSPI_A1 ; 1 - PLL divclk is
-                                            // used as baud clk for MCSPI_A1.
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU1_S 11
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A1 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_NU2_S 3
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A1 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A1_CLK_GEN_MCSPI_A1_PLLCLKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCSPI_A1 clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCSPI_A1 clk during
-                                            // sleep mode ; 0- Disable MCSPI_A1
-                                            // clk during sleep mode
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_A1_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCSPI_A1_CLK_GATING_MCSPI_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCSPI_A1 clk during
-                                            // run mode ; 0- Disable MCSPI_A1
-                                            // clk during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A1_SOFT_RESET_MCSPI_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_A1 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_A1
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_MCSPI_A1_SOFT_RESET_MCSPI_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for
-                                            // MCSPI_A1-core ; 0 - De-assert
-                                            // reset for MCSPI_A1-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_CLK_GEN register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud-clk
-                                            // for MCSPI_A2 ; 1 - PLL divclk is
-                                            // used as baud-clk for MCSPI_A2
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU1_S 11
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A2 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_NU2_S 3
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_A2 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_A2_CLK_GEN_MCSPI_A2_PLLCKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU1_M \
-                                0x00FE0000
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU1_S 17
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable MCSPI_A2 clk during
-                                            // deep-sleep mode
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU2_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU2_S 9
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_SLP_CLK_ENABLE \
-                                0x00000100  // 1- Enable MCSPI_A2 clk during
-                                            // sleep mode ; 0- Disable MCSPI_A2
-                                            // clk during sleep mode
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU3_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_A2_CLK_GATING_NU3_S 1
-#define APPS_RCM_MCSPI_A2_CLK_GATING_MCSPI_A2_RUN_CLK_ENABLE \
-                                0x00000001  // 1- Enable MCSPI_A2 clk during
-                                            // run mode ; 0- Disable MCSPI_A2
-                                            // clk during run mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_A2_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_A2_SOFT_RESET_MCSPI_A2_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_A2 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_A2
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_MCSPI_A2_SOFT_RESET_MCSPI_A2_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for
-                                            // MCSPI_A2-core ; 0 - De-assert
-                                            // reset for MCSPI_A2-core
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UDMA_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UDMA_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UDMA_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UDMA_A clk during
-                                            // sleep mode 0 - Disable UDMA_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UDMA_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_UDMA_A_CLK_GATING_UDMA_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UDMA_A clk during run
-                                            // mode 0 - Disable UDMA_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UDMA_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UDMA_A_SOFT_RESET_UDMA_A_ENABLED_STATUS \
-                                0x00000002  // 1 - UDMA_A Clocks/Resets are
-                                            // enabled ; 0 - UDMA_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UDMA_A_SOFT_RESET_UDMA_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for DMA_A ; 0 -
-                                            // De-assert reset for DMA_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_A clk during
-                                            // sleep mode 0 - Disable GPIO_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_A clk during run
-                                            // mode 0 - Disable GPIO_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_A_SOFT_RESET_GPIO_A_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_A Clocks/Resets are
-                                            // enabled ; 0 - GPIO_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_A_SOFT_RESET_GPIO_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_A ; 0
-                                            // - De-assert reset for GPIO_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_B_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_B clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_B clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_B clk during
-                                            // sleep mode 0 - Disable GPIO_B clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_B_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_B clk during run
-                                            // mode 0 - Disable GPIO_B clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_B_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_B_SOFT_RESET_GPIO_B_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_B Clocks/Resets are
-                                            // enabled ; 0 - GPIO_B
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_B_SOFT_RESET_GPIO_B_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_B ; 0
-                                            // - De-assert reset for GPIO_B
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_C_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_C clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_C clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_C clk during
-                                            // sleep mode 0 - Disable GPIO_C clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_C_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_C clk during run
-                                            // mode 0 - Disable GPIO_C clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_C_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_C_SOFT_RESET_GPIO_C_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_C Clocks/Resets are
-                                            // enabled ; 0 - GPIO_C
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_C_SOFT_RESET_GPIO_C_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_C ; 0
-                                            // - De-assert reset for GPIO_C
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_D_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_D clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_D clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_D clk during
-                                            // sleep mode 0 - Disable GPIO_D clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_D_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_D clk during run
-                                            // mode 0 - Disable GPIO_D clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_D_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_D_SOFT_RESET_GPIO_D_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_D Clocks/Resets are
-                                            // enabled ; 0 - GPIO_D
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_D_SOFT_RESET_GPIO_D_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_D ; 0
-                                            // - De-assert reset for GPIO_D
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_E_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable GPIO_E clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // GPIO_E clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable GPIO_E clk during
-                                            // sleep mode 0 - Disable GPIO_E clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPIO_E_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable GPIO_E clk during run
-                                            // mode 0 - Disable GPIO_E clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPIO_E_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPIO_E_SOFT_RESET_GPIO_E_ENABLED_STATUS \
-                                0x00000002  // 1 - GPIO_E Clocks/Resets are
-                                            // enabled ; 0 - GPIO_E
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_GPIO_E_SOFT_RESET_GPIO_E_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for GPIO_E ; 0
-                                            // - De-assert reset for GPIO_E
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_WDOG_A_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_BAUD_CLK_SEL_M \
-                                0x03000000  // "00" - Sysclk ; "01" - REF_CLK
-                                            // (38.4 MHz) ; "10/11" - Slow_clk
-
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_BAUD_CLK_SEL_S 24
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable WDOG_A clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // WDOG_A clk during deep-sleep mode
-                                            // ;
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU1_S 9
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable WDOG_A clk during
-                                            // sleep mode 0 - Disable WDOG_A clk
-                                            // during sleep mode ;
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_WDOG_A_CLK_GATING_NU2_S 1
-#define APPS_RCM_WDOG_A_CLK_GATING_WDOG_A_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable WDOG_A clk during run
-                                            // mode 0 - Disable WDOG_A clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_WDOG_A_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_WDOG_A_SOFT_RESET_WDOG_A_ENABLED_STATUS \
-                                0x00000002  // 1 - WDOG_A Clocks/Resets are
-                                            // enabled ; 0 - WDOG_A
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_WDOG_A_SOFT_RESET_WDOG_A_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for WDOG_A ; 0
-                                            // - De-assert reset for WDOG_A
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UART_A0 clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UART_A0 clk during deep-sleep
-                                            // mode ;
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU1_S 9
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UART_A0 clk during
-                                            // sleep mode 0 - Disable UART_A0
-                                            // clk during sleep mode ;
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UART_A0_CLK_GATING_NU2_S 1
-#define APPS_RCM_UART_A0_CLK_GATING_UART_A0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UART_A0 clk during
-                                            // run mode 0 - Disable UART_A0 clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A0_SOFT_RESET_UART_A0_ENABLED_STATUS \
-                                0x00000002  // 1 - UART_A0 Clocks/Resets are
-                                            // enabled ; 0 - UART_A0
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UART_A0_SOFT_RESET_UART_A0_SOFT_RESET \
-                                0x00000001  // 1 - Assert reset for UART_A0 ; 0
-                                            // - De-assert reset for UART_A0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable UART_A1 clk during
-                                            // deep-sleep mode 0 - Disable
-                                            // UART_A1 clk during deep-sleep
-                                            // mode ;
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU1_S 9
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable UART_A1 clk during
-                                            // sleep mode 0 - Disable UART_A1
-                                            // clk during sleep mode ;
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_UART_A1_CLK_GATING_NU2_S 1
-#define APPS_RCM_UART_A1_CLK_GATING_UART_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable UART_A1 clk during
-                                            // run mode 0 - Disable UART_A1 clk
-                                            // during run mode ;
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_UART_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_UART_A1_SOFT_RESET_UART_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - UART_A1 Clocks/Resets are
-                                            // enabled ; 0 - UART_A1
-                                            // Clocks/Resets are disabled
-
-#define APPS_RCM_UART_A1_SOFT_RESET_UART_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // UART_A1 ; 0 - De-assert the soft
-                                            // reset for UART_A1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A0 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A0 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A0 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A0 clock during sleep
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A0_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A0_CLK_GATING_GPT_A0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A0 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A0 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A0_SOFT_RESET_GPT_A0_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A0 clocks/resets are
-                                            // enabled ; 0 - GPT_A0
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A0_SOFT_RESET_GPT_A0_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A0 ; 0 - De-assert the soft
-                                            // reset for GPT_A0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A1_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A1 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A1 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A1 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A1 clock during sleep
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A1_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A1_CLK_GATING_GPT_A1_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A1 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A1 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A1_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A1_SOFT_RESET_GPT_A1_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A1 clocks/resets are
-                                            // enabled ; 0 - GPT_A1
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A1_SOFT_RESET_GPT_A1_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A1 ; 0 - De-assert the soft
-                                            // reset for GPT_A1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A2_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A2 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A2 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A2 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A2 clock during sleep
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A2_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A2_CLK_GATING_GPT_A2_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A2 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A2 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A2_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A2_SOFT_RESET_GPT_A2_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A2 clocks/resets are
-                                            // enabled ; 0 - GPT_A2
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_GPT_A2_SOFT_RESET_GPT_A2_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A2 ; 0 - De-assert the soft
-                                            // reset for GPT_A2
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A3_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the GPT_A3 clock
-                                            // during deep-sleep ; 0 - Disable
-                                            // the GPT_A3 clock during
-                                            // deep-sleep
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU1_S 9
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the GPT_A3 clock
-                                            // during sleep ; 0 - Disable the
-                                            // GPT_A3 clock during sleep
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_GPT_A3_CLK_GATING_NU2_S 1
-#define APPS_RCM_GPT_A3_CLK_GATING_GPT_A3_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the GPT_A3 clock
-                                            // during run ; 0 - Disable the
-                                            // GPT_A3 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_GPT_A3_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_GPT_A3_SOFT_RESET_GPT_A3_ENABLED_STATUS \
-                                0x00000002  // 1 - GPT_A3 Clocks/resets are
-                                            // enabled ; 0 - GPT_A3
-                                            // Clocks/resets are disabled
-
-#define APPS_RCM_GPT_A3_SOFT_RESET_GPT_A3_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // GPT_A3 ; 0 - De-assert the soft
-                                            // reset for GPT_A3
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0 register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_DIVISOR_M \
-                                0x03FF0000
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_DIVISOR_S 16
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_FRACTION_M \
-                                0x0000FFFF
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG0_MCASP_FRAC_DIV_FRACTION_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCASP_FRAC_CLK_CONFIG1 register.
-//
-//******************************************************************************
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_SOFT_RESET \
-                                0x00010000  // 1 - Assert the reset for MCASP
-                                            // Frac-clk div; 0 - Donot assert
-                                            // the reset for MCASP frac clk-div
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_PERIOD_M \
-                                0x000003FF
-
-#define APPS_RCM_MCASP_FRAC_CLK_CONFIG1_MCASP_FRAC_DIV_PERIOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CRYPTO_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable the Crypto clock
-                                            // during deep-sleep
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU1_S 9
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the Crypto clock
-                                            // during sleep ; 0 - Disable the
-                                            // Crypto clock during sleep
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_CRYPTO_CLK_GATING_NU2_S 1
-#define APPS_RCM_CRYPTO_CLK_GATING_CRYPTO_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the Crypto clock
-                                            // during run ; 0 - Disable the
-                                            // Crypto clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_CRYPTO_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_CRYPTO_SOFT_RESET_CRYPTO_ENABLED_STATUS \
-                                0x00000002  // 1 - Crypto clocks/resets are
-                                            // enabled ; 0 - Crypto
-                                            // clocks/resets are disabled
-
-#define APPS_RCM_CRYPTO_SOFT_RESET_CRYPTO_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // Crypto ; 0 - De-assert the soft
-                                            // reset for Crypto
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_DSLP_CLK_ENABLE \
-                                0x00010000  // 0 - Disable the MCSPI_S0 clock
-                                            // during deep-sleep
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU1_S 9
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the MCSPI_S0 clock
-                                            // during sleep ; 0 - Disable the
-                                            // MCSPI_S0 clock during sleep
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_MCSPI_S0_CLK_GATING_NU2_S 1
-#define APPS_RCM_MCSPI_S0_CLK_GATING_MCSPI_S0_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the MCSPI_S0 clock
-                                            // during run ; 0 - Disable the
-                                            // MCSPI_S0 clock during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_SOFT_RESET_MCSPI_S0_ENABLED_STATUS \
-                                0x00000002  // 1 - MCSPI_S0 Clocks/Resets are
-                                            // enabled ; 0 - MCSPI_S0
-                                            // Clocks/resets are disabled
-
-#define APPS_RCM_MCSPI_S0_SOFT_RESET_MCSPI_S0_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // MCSPI_S0 ; 0 - De-assert the soft
-                                            // reset for MCSPI_S0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_MCSPI_S0_CLKDIV_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_BAUD_CLK_SEL \
-                                0x00010000  // 0 - XTAL clk is used as baud-clk
-                                            // for MCSPI_S0 ; 1 - PLL divclk is
-                                            // used as buad-clk for MCSPI_S0
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU1_M \
-                                0x0000F800
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU1_S 11
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_OFF_TIME_M \
-                                0x00000700  // Configuration of OFF-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_S0 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_OFF_TIME_S 8
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU2_M \
-                                0x000000F8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_NU2_S 3
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_ON_TIME_M \
-                                0x00000007  // Configuration of ON-TIME for
-                                            // dividing PLL clk (240 MHz) in
-                                            // generation of MCSPI_S0 func-clk :
-                                            // "000" - 1 "001" - 2 "010" - 3
-                                            // "011" - 4 "100" - 5 "101" - 6
-                                            // "110" - 7 "111" - 8
-
-#define APPS_RCM_MCSPI_S0_CLKDIV_CFG_MCSPI_S0_PLLCLKDIV_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_I2C_CLK_GATING register.
-//
-//******************************************************************************
-#define APPS_RCM_I2C_CLK_GATING_I2C_DSLP_CLK_ENABLE \
-                                0x00010000  // 1 - Enable the I2C Clock during
-                                            // deep-sleep 0 - Disable the I2C
-                                            // clock during deep-sleep
-
-#define APPS_RCM_I2C_CLK_GATING_NU1_M \
-                                0x0000FE00
-
-#define APPS_RCM_I2C_CLK_GATING_NU1_S 9
-#define APPS_RCM_I2C_CLK_GATING_I2C_SLP_CLK_ENABLE \
-                                0x00000100  // 1 - Enable the I2C clock during
-                                            // sleep ; 0 - Disable the I2C clock
-                                            // during sleep
-
-#define APPS_RCM_I2C_CLK_GATING_NU2_M \
-                                0x000000FE
-
-#define APPS_RCM_I2C_CLK_GATING_NU2_S 1
-#define APPS_RCM_I2C_CLK_GATING_I2C_RUN_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the I2C clock during
-                                            // run ; 0 - Disable the I2C clock
-                                            // during run
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_I2C_SOFT_RESET register.
-//
-//******************************************************************************
-#define APPS_RCM_I2C_SOFT_RESET_I2C_ENABLED_STATUS \
-                                0x00000002  // 1 - I2C Clocks/Resets are
-                                            // enabled ; 0 - I2C clocks/resets
-                                            // are disabled
-
-#define APPS_RCM_I2C_SOFT_RESET_I2C_SOFT_RESET \
-                                0x00000001  // 1 - Assert the soft reset for
-                                            // Shared-I2C ; 0 - De-assert the
-                                            // soft reset for Shared-I2C
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_LPDS_REQ register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ \
-                                0x00000001  // 1 - Request for LPDS
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_TURBO_REQ register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_TURBO_REQ_APPS_TURBO_REQ \
-                                0x00000001  // 1 - Request for TURBO
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_DSLP_WAKE_CONFIG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_DSLP_WAKE_CONFIG_DSLP_WAKE_FROM_NWP_ENABLE \
-                                0x00000002  // 1 - Enable the NWP to wake APPS
-                                            // from deep-sleep ; 0 - Disable NWP
-                                            // to wake APPS from deep-sleep
-
-#define APPS_RCM_APPS_DSLP_WAKE_CONFIG_DSLP_WAKE_TIMER_ENABLE \
-                                0x00000001  // 1 - Enable deep-sleep wake timer
-                                            // in APPS RCM for deep-sleep; 0 -
-                                            // Disable deep-sleep wake timer in
-                                            // APPS RCM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_DSLP_WAKE_TIMER_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_OPP_CFG_M \
-                                0xFFFF0000  // Configuration (in slow_clks)
-                                            // which says when to request for
-                                            // OPP during deep-sleep exit
-
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_OPP_CFG_S 16
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_WAKE_CFG_M \
-                                0x0000FFFF  // Configuration (in slow_clks)
-                                            // which says when to request for
-                                            // WAKE during deep-sleep exit
-
-#define APPS_RCM_APPS_DSLP_WAKE_TIMER_CFG_DSLP_WAKE_TIMER_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_RCM_SLP_WAKE_ENABLE register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_RCM_SLP_WAKE_ENABLE_SLP_WAKE_FROM_NWP_ENABLE \
-                                0x00000002  // 1- Enable the sleep wakeup due
-                                            // to NWP request. 0- Disable the
-                                            // sleep wakeup due to NWP request
-
-#define APPS_RCM_APPS_RCM_SLP_WAKE_ENABLE_SLP_WAKE_TIMER_ENABLE \
-                                0x00000001  // 1- Enable the sleep wakeup due
-                                            // to sleep-timer; 0-Disable the
-                                            // sleep wakeup due to sleep-timer
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_SLP_WAKETIMER_CFG register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_SLP_WAKETIMER_CFG_SLP_WAKE_TIMER_CFG_M \
-                                0xFFFFFFFF  // Configuration (number of
-                                            // sysclks-80MHz) for the Sleep
-                                            // wakeup timer
-
-#define APPS_RCM_APPS_SLP_WAKETIMER_CFG_SLP_WAKE_TIMER_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_TO_NWP_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_TO_NWP_WAKE_REQUEST_APPS_TO_NWP_WAKEUP_REQUEST \
-                                0x00000001  // When 1 => APPS generated a wake
-                                            // request to NWP (When NWP is in
-                                            // any of its low-power modes :
-                                            // SLP/DSLP/LPDS)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS register.
-//
-//******************************************************************************
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_deep_sleep_timer_wake \
-                                0x00000008  // 1 - Indicates that deep-sleep
-                                            // timer expiry had caused the
-                                            // wakeup from deep-sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_sleep_timer_wake \
-                                0x00000004  // 1 - Indicates that sleep timer
-                                            // expiry had caused the wakeup from
-                                            // sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_deep_sleep_wake_from_nwp \
-                                0x00000002  // 1 - Indicates that NWP had
-                                            // caused the wakeup from deep-sleep
-
-#define APPS_RCM_APPS_RCM_INTERRUPT_STATUS_apps_sleep_wake_from_nwp \
-                                0x00000001  // 1 - Indicates that NWP had
-                                            // caused the wakeup from Sleep
-
-
-
-
-#endif // __HW_APPS_RCM_H__
diff --git a/ports/cc3200/hal/inc/hw_camera.h b/ports/cc3200/hal/inc/hw_camera.h
deleted file mode 100644
index 4461a28467432..0000000000000
--- a/ports/cc3200/hal/inc/hw_camera.h
+++ /dev/null
@@ -1,519 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_CAMERA_H__
-#define __HW_CAMERA_H__
-
-//*****************************************************************************
-//
-// The following are defines for the CAMERA register offsets.
-//
-//*****************************************************************************
-#define CAMERA_O_CC_REVISION    0x00000000  // This register contains the IP
-                                            // revision code ( Parallel Mode)
-#define CAMERA_O_CC_SYSCONFIG   0x00000010  // This register controls the
-                                            // various parameters of the OCP
-                                            // interface (CCP and Parallel Mode)
-#define CAMERA_O_CC_SYSSTATUS   0x00000014  // This register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information (CCP and Parallel
-                                            // Mode)
-#define CAMERA_O_CC_IRQSTATUS   0x00000018  // The interrupt status regroups
-                                            // all the status of the module
-                                            // internal events that can generate
-                                            // an interrupt (CCP & Parallel
-                                            // Mode)
-#define CAMERA_O_CC_IRQENABLE   0x0000001C  // The interrupt enable register
-                                            // allows to enable/disable the
-                                            // module internal sources of
-                                            // interrupt on an event-by-event
-                                            // basis (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL        0x00000040  // This register controls the
-                                            // various parameters of the Camera
-                                            // Core block (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL_DMA    0x00000044  // This register controls the DMA
-                                            // interface of the Camera Core
-                                            // block (CCP & Parallel Mode)
-#define CAMERA_O_CC_CTRL_XCLK   0x00000048  // This register control the value
-                                            // of the clock divisor used to
-                                            // generate the external clock
-                                            // (Parallel Mode)
-#define CAMERA_O_CC_FIFO_DATA   0x0000004C  // This register allows to write to
-                                            // the FIFO and read from the FIFO
-                                            // (CCP & Parallel Mode)
-#define CAMERA_O_CC_TEST        0x00000050  // This register shows the status
-                                            // of some important variables of
-                                            // the camera core module (CCP &
-                                            // Parallel Mode)
-#define CAMERA_O_CC_GEN_PAR     0x00000054  // This register shows the values
-                                            // of the generic parameters of the
-                                            // module
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_REVISION register.
-//
-//******************************************************************************
-#define CAMERA_CC_REVISION_REV_M \
-                                0x000000FF  // IP revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-
-#define CAMERA_CC_REVISION_REV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_SYSCONFIG register.
-//
-//******************************************************************************
-#define CAMERA_CC_SYSCONFIG_S_IDLE_MODE_M \
-                                0x00000018  // Slave interface power management
-                                            // req/ack control """00""
-                                            // Force-idle. An idle request is
-                                            // acknoledged unconditionally"
-                                            // """01"" No-idle. An idle request
-                                            // is never acknowledged" """10""
-                                            // reserved (Smart-idle not
-                                            // implemented)"
-
-#define CAMERA_CC_SYSCONFIG_S_IDLE_MODE_S 3
-#define CAMERA_CC_SYSCONFIG_SOFT_RESET \
-                                0x00000002  // Software reset. Set this bit to
-                                            // 1 to trigger a module reset. The
-                                            // bit is automatically reset by the
-                                            // hardware. During reset it always
-                                            // returns 0. 0 Normal mode 1 The
-                                            // module is reset
-
-#define CAMERA_CC_SYSCONFIG_AUTO_IDLE \
-                                0x00000001  // Internal OCP clock gating
-                                            // strategy 0 OCP clock is
-                                            // free-running 1 Automatic OCP
-                                            // clock gating strategy is applied
-                                            // based on the OCP interface
-                                            // activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_SYSSTATUS register.
-//
-//******************************************************************************
-#define CAMERA_CC_SYSSTATUS_RESET_DONE2 \
-                                0x00000001  // Internal Reset Monitoring 0
-                                            // Internal module reset is on-going
-                                            // 1 Reset completed
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_IRQSTATUS register.
-//
-//******************************************************************************
-#define CAMERA_CC_IRQSTATUS_FS_IRQ \
-                                0x00080000  // Frame Start has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_LE_IRQ \
-                                0x00040000  // Line End has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_LS_IRQ \
-                                0x00020000  // Line Start has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FE_IRQ \
-                                0x00010000  // Frame End has occurred 0 Event
-                                            // false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FSP_ERR_IRQ \
-                                0x00000800  // FSP code error 0 Event false "1
-                                            // Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FW_ERR_IRQ \
-                                0x00000400  // Frame Height Error 0 Event false
-                                            // "1 Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FSC_ERR_IRQ \
-                                0x00000200  // False Synchronization Code 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_SSC_ERR_IRQ \
-                                0x00000100  // Shifted Synchronization Code 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_NONEMPTY_IRQ \
-                                0x00000010  // FIFO is not empty 0 Event false
-                                            // "1 Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_FULL_IRQ \
-                                0x00000008  // FIFO is full 0 Event false "1
-                                            // Event is true (""pending"")" 0
-                                            // Event status bit unchanged 1
-                                            // Event status bit is reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_THR_IRQ \
-                                0x00000004  // FIFO threshold has been reached
-                                            // 0 Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_OF_IRQ \
-                                0x00000002  // FIFO overflow has occurred 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-#define CAMERA_CC_IRQSTATUS_FIFO_UF_IRQ \
-                                0x00000001  // FIFO underflow has occurred 0
-                                            // Event false "1 Event is true
-                                            // (""pending"")" 0 Event status bit
-                                            // unchanged 1 Event status bit is
-                                            // reset
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_IRQENABLE register.
-//
-//******************************************************************************
-#define CAMERA_CC_IRQENABLE_FS_IRQ_EN \
-                                0x00080000  // Frame Start Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_LE_IRQ_EN \
-                                0x00040000  // Line End Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_LS_IRQ_EN \
-                                0x00020000  // Line Start Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FE_IRQ_EN \
-                                0x00010000  // Frame End Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FSP_IRQ_EN \
-                                0x00000800  // FSP code Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FW_ERR_IRQ_EN \
-                                0x00000400  // Frame Height Error Interrupt
-                                            // Enable 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FSC_ERR_IRQ_EN \
-                                0x00000200  // False Synchronization Code
-                                            // Interrupt Enable 0 Event is
-                                            // masked 1 Event generates an
-                                            // interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_SSC_ERR_IRQ_EN \
-                                0x00000100  // False Synchronization Code
-                                            // Interrupt Enable 0 Event is
-                                            // masked 1 Event generates an
-                                            // interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_NONEMPTY_IRQ_EN \
-                                0x00000010  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_FULL_IRQ_EN \
-                                0x00000008  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_THR_IRQ_EN \
-                                0x00000004  // FIFO Threshold Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_OF_IRQ_EN \
-                                0x00000002  // FIFO Overflow Interrupt Enable 0
-                                            // Event is masked 1 Event generates
-                                            // an interrupt when it occurs
-
-#define CAMERA_CC_IRQENABLE_FIFO_UF_IRQ_EN \
-                                0x00000001  // FIFO Underflow Interrupt Enable
-                                            // 0 Event is masked 1 Event
-                                            // generates an interrupt when it
-                                            // occurs
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the CAMERA_O_CC_CTRL register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_CC_IF_SYNCHRO \
-                                0x00080000  // Synchronize all camera sensor
-                                            // inputs This must be set during
-                                            // the configuration phase before
-                                            // CC_EN set to '1'. This can be
-                                            // used in very high frequency to
-                                            // avoid dependancy to the IO
-                                            // timings. 0 No synchro (most of
-                                            // applications) 1 Synchro enabled
-                                            // (should never be required)
-
-#define CAMERA_CC_CTRL_CC_RST   0x00040000  // Resets all the internal finite
-                                            // states machines of the camera
-                                            // core module - by writing a 1 to
-                                            // this bit. must be applied when
-                                            // CC_EN = 0 Reads returns 0
-#define CAMERA_CC_CTRL_CC_FRAME_TRIG \
-                                0x00020000  // Set the modality in which CC_EN
-                                            // works when a disabling of the
-                                            // sensor camera core is wanted "If
-                                            // CC_FRAME_TRIG = 1 by writing
-                                            // ""0"" to CC_EN" the module is
-                                            // disabled at the end of the frame
-                                            // "If CC_FRAME_TRIG = 0 by writing
-                                            // ""0"" to CC_EN" the module is
-                                            // disabled immediately
-
-#define CAMERA_CC_CTRL_CC_EN    0x00010000  // Enables the sensor interface of
-                                            // the camera core module "By
-                                            // writing ""1"" to this field the
-                                            // module is enabled." "By writing
-                                            // ""0"" to this field the module is
-                                            // disabled at" the end of the frame
-                                            // if CC_FRAM_TRIG =1 and is
-                                            // disabled immediately if
-                                            // CC_FRAM_TRIG = 0
-#define CAMERA_CC_CTRL_NOBT_SYNCHRO \
-                                0x00002000  // Enables to start at the
-                                            // beginning of the frame or not in
-                                            // NoBT 0 Acquisition starts when
-                                            // Vertical synchro is high 1
-                                            // Acquisition starts when Vertical
-                                            // synchro goes from low to high
-                                            // (beginning of the frame) -
-                                            // Recommended.
-
-#define CAMERA_CC_CTRL_BT_CORRECT \
-                                0x00001000  // Enables the correction within
-                                            // the sync codes in BT mode 0
-                                            // correction is not enabled 1
-                                            // correction is enabled
-
-#define CAMERA_CC_CTRL_PAR_ORDERCAM \
-                                0x00000800  // Enables swap between image-data
-                                            // in parallel mode 0 swap is not
-                                            // enabled 1 swap is enabled
-
-#define CAMERA_CC_CTRL_PAR_CLK_POL \
-                                0x00000400  // Inverts the clock coming from
-                                            // the sensor in parallel mode 0
-                                            // clock not inverted - data sampled
-                                            // on rising edge 1 clock inverted -
-                                            // data sampled on falling edge
-
-#define CAMERA_CC_CTRL_NOBT_HS_POL \
-                                0x00000200  // Sets the polarity of the
-                                            // synchronization signals in NOBT
-                                            // parallel mode 0 CAM_P_HS is
-                                            // active high 1 CAM_P_HS is active
-                                            // low
-
-#define CAMERA_CC_CTRL_NOBT_VS_POL \
-                                0x00000100  // Sets the polarity of the
-                                            // synchronization signals in NOBT
-                                            // parallel mode 0 CAM_P_VS is
-                                            // active high 1 CAM_P_VS is active
-                                            // low
-
-#define CAMERA_CC_CTRL_PAR_MODE_M \
-                                0x0000000E  // Sets the Protocol Mode of the
-                                            // Camera Core module in parallel
-                                            // mode (when CCP_MODE = 0) """000""
-                                            // Parallel NOBT 8-bit" """001""
-                                            // Parallel NOBT 10-bit" """010""
-                                            // Parallel NOBT 12-bit" """011""
-                                            // reserved" """100"" Parallet BT
-                                            // 8-bit" """101"" Parallel BT
-                                            // 10-bit" """110"" reserved"
-                                            // """111"" FIFO test mode. Refer to
-                                            // Table 12 - FIFO Write and Read
-                                            // access"
-
-#define CAMERA_CC_CTRL_PAR_MODE_S 1
-#define CAMERA_CC_CTRL_CCP_MODE 0x00000001  // Set the Camera Core in CCP mode
-                                            // 0 CCP mode disabled 1 CCP mode
-                                            // enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_CTRL_DMA register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_DMA_DMA_EN \
-                                0x00000100  // Sets the number of dma request
-                                            // lines 0 DMA interface disabled
-                                            // The DMA request line stays
-                                            // inactive 1 DMA interface enabled
-                                            // The DMA request line is
-                                            // operational
-
-#define CAMERA_CC_CTRL_DMA_FIFO_THRESHOLD_M \
-                                0x0000007F  // Sets the threshold of the FIFO
-                                            // the assertion of the dmarequest
-                                            // line takes place when the
-                                            // threshold is reached.
-                                            // """0000000"" threshold set to 1"
-                                            // """0000001"" threshold set to 2"
-                                            // … """1111111"" threshold set to
-                                            // 128"
-
-#define CAMERA_CC_CTRL_DMA_FIFO_THRESHOLD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_CTRL_XCLK register.
-//
-//******************************************************************************
-#define CAMERA_CC_CTRL_XCLK_XCLK_DIV_M \
-                                0x0000001F  // Sets the clock divisor value for
-                                            // CAM_XCLK generation. based on
-                                            // CAM_MCK (value of CAM_MCLK is
-                                            // 96MHz) """00000"" CAM_XCLK Stable
-                                            // Low Level" Divider not enabled
-                                            // """00001"" CAM_XCLK Stable High
-                                            // Level" Divider not enabled from 2
-                                            // to 30 CAM_XCLK = CAM_MCLK /
-                                            // XCLK_DIV """11111"" Bypass -
-                                            // CAM_XCLK = CAM_MCLK"
-
-#define CAMERA_CC_CTRL_XCLK_XCLK_DIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_FIFO_DATA register.
-//
-//******************************************************************************
-#define CAMERA_CC_FIFO_DATA_FIFO_DATA_M \
-                                0xFFFFFFFF  // Writes the 32-bit word into the
-                                            // FIFO Reads the 32-bit word from
-                                            // the FIFO
-
-#define CAMERA_CC_FIFO_DATA_FIFO_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the CAMERA_O_CC_TEST register.
-//
-//******************************************************************************
-#define CAMERA_CC_TEST_FIFO_RD_POINTER_M \
-                                0xFF000000  // FIFO READ Pointer This field
-                                            // shows the value of the FIFO read
-                                            // pointer Expected value ranges
-                                            // from 0 to 127
-
-#define CAMERA_CC_TEST_FIFO_RD_POINTER_S 24
-#define CAMERA_CC_TEST_FIFO_WR_POINTER_M \
-                                0x00FF0000  // FIFO WRITE pointer This field
-                                            // shows the value of the FIFO write
-                                            // pointer Expected value ranges
-                                            // from 0 to 127
-
-#define CAMERA_CC_TEST_FIFO_WR_POINTER_S 16
-#define CAMERA_CC_TEST_FIFO_LEVEL_M \
-                                0x0000FF00  // FIFO level (how many 32-bit
-                                            // words the FIFO contains) This
-                                            // field shows the value of the FIFO
-                                            // level and can assume values from
-                                            // 0 to 128
-
-#define CAMERA_CC_TEST_FIFO_LEVEL_S 8
-#define CAMERA_CC_TEST_FIFO_LEVEL_PEAK_M \
-                                0x000000FF  // FIFO level peak This field shows
-                                            // the max value of the FIFO level
-                                            // and can assume values from 0 to
-                                            // 128
-
-#define CAMERA_CC_TEST_FIFO_LEVEL_PEAK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// CAMERA_O_CC_GEN_PAR register.
-//
-//******************************************************************************
-#define CAMERA_CC_GEN_PAR_CC_FIFO_DEPTH_M \
-                                0x00000007  // Camera Core FIFO DEPTH generic
-                                            // parameter
-
-#define CAMERA_CC_GEN_PAR_CC_FIFO_DEPTH_S 0
-
-
-
-#endif // __HW_CAMERA_H__
diff --git a/ports/cc3200/hal/inc/hw_common_reg.h b/ports/cc3200/hal/inc/hw_common_reg.h
deleted file mode 100644
index 417544ad48e9d..0000000000000
--- a/ports/cc3200/hal/inc/hw_common_reg.h
+++ /dev/null
@@ -1,1117 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_COMMON_REG_H__
-#define __HW_COMMON_REG_H__
-
-//*****************************************************************************
-//
-// The following are defines for the COMMON_REG register offsets.
-//
-//*****************************************************************************
-#define COMMON_REG_O_I2C_Properties_Register \
-                                0x00000000
-
-#define COMMON_REG_O_SPI_Properties_Register \
-                                0x00000004
-
-#define COMMON_REG_O_APPS_sh_resource_Interrupt_enable \
-                                0x0000000C
-
-#define COMMON_REG_O_APPS_sh_resource_Interrupt_status \
-                                0x00000010
-
-#define COMMON_REG_O_NWP_sh_resource_Interrupt_enable \
-                                0x00000014
-
-#define COMMON_REG_O_NWP_sh_resource_Interrupt_status \
-                                0x00000018
-
-#define COMMON_REG_O_Flash_ctrl_reg \
-                                0x0000001C
-
-#define COMMON_REG_O_Bus_matrix_M0_segment_access_config \
-                                0x00000024
-
-#define COMMON_REG_O_Bus_matrix_M1_segment_access_config \
-                                0x00000028
-
-#define COMMON_REG_O_Bus_matrix_M2_segment_access_config \
-                                0x0000002C
-
-#define COMMON_REG_O_Bus_matrix_M3_segment_access_config \
-                                0x00000030
-
-#define COMMON_REG_O_Bus_matrix_M4_segment_access_config \
-                                0x00000034
-
-#define COMMON_REG_O_Bus_matrix_M5_segment_access_config \
-                                0x00000038
-
-#define COMMON_REG_O_GPIO_properties_register \
-                                0x0000003C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE1 \
-                                0x00000040
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE2 \
-                                0x00000044
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE3 \
-                                0x00000048
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE4 \
-                                0x0000004C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE5 \
-                                0x00000050
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE6 \
-                                0x00000054
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE7 \
-                                0x00000058
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE8 \
-                                0x0000005C
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE9 \
-                                0x00000060
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE10 \
-                                0x00000064
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE11 \
-                                0x00000068
-
-#define COMMON_REG_O_APPS_NW_SEMAPHORE12 \
-                                0x0000006C
-
-#define COMMON_REG_O_APPS_SEMAPPHORE_PEND \
-                                0x00000070
-
-#define COMMON_REG_O_NW_SEMAPPHORE_PEND \
-                                0x00000074
-
-#define COMMON_REG_O_SEMAPHORE_STATUS \
-                                0x00000078
-
-#define COMMON_REG_O_IDMEM_TIM_Update \
-                                0x0000007C
-
-#define COMMON_REG_O_FPGA_ROM_WR_EN \
-                                0x00000080
-
-#define COMMON_REG_O_NW_INT_MASK \
-                                0x00000084
-
-#define COMMON_REG_O_NW_INT_MASK_SET \
-                                0x00000088
-
-#define COMMON_REG_O_NW_INT_MASK_CLR \
-                                0x0000008C
-
-#define COMMON_REG_O_NW_INT_STS_CLR \
-                                0x00000090
-
-#define COMMON_REG_O_NW_INT_ACK 0x00000094
-#define COMMON_REG_O_NW_INT_TRIG \
-                                0x00000098
-
-#define COMMON_REG_O_NW_INT_STS_MASKED \
-                                0x0000009C
-
-#define COMMON_REG_O_NW_INT_STS_RAW \
-                                0x000000A0
-
-#define COMMON_REG_O_APPS_INT_MASK \
-                                0x000000A4
-
-#define COMMON_REG_O_APPS_INT_MASK_SET \
-                                0x000000A8
-
-#define COMMON_REG_O_APPS_INT_MASK_CLR \
-                                0x000000AC
-
-#define COMMON_REG_O_APPS_INT_STS_CLR \
-                                0x000000B0
-
-#define COMMON_REG_O_APPS_INT_ACK \
-                                0x000000B4
-
-#define COMMON_REG_O_APPS_INT_TRIG \
-                                0x000000B8
-
-#define COMMON_REG_O_APPS_INT_STS_MASKED \
-                                0x000000BC
-
-#define COMMON_REG_O_APPS_INT_STS_RAW \
-                                0x000000C0
-
-#define COMMON_REG_O_IDMEM_TIM_Updated \
-                                0x000000C4
-
-#define COMMON_REG_O_APPS_GPIO_TRIG_EN \
-                                0x000000C8
-
-#define COMMON_REG_O_EMU_DEBUG_REG \
-                                0x000000CC
-
-#define COMMON_REG_O_SEMAPHORE_STATUS2 \
-                                0x000000D0
-
-#define COMMON_REG_O_SEMAPHORE_PREV_OWNER1 \
-                                0x000000D4
-
-#define COMMON_REG_O_SEMAPHORE_PREV_OWNER2 \
-                                0x000000D8
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_I2C_Properties_Register register.
-//
-//******************************************************************************
-#define COMMON_REG_I2C_Properties_Register_I2C_Properties_Register_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_I2C_Properties_Register_I2C_Properties_Register_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SPI_Properties_Register register.
-//
-//******************************************************************************
-#define COMMON_REG_SPI_Properties_Register_SPI_Properties_Register_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_SPI_Properties_Register_SPI_Properties_Register_S 0
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_sh_resource_Interrupt_enable register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_sh_resource_Interrupt_enable_APPS_sh_resource_Interrupt_enable_M \
-                                0x0000000F  // Interrupt enable APPS bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_APPS_sh_resource_Interrupt_enable_APPS_sh_resource_Interrupt_enable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_sh_resource_Interrupt_status register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_sh_resource_Interrupt_status_APPS_sh_resource_Interrupt_status_M \
-                                0x0000000F  // Interrupt enable APPS bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_APPS_sh_resource_Interrupt_status_APPS_sh_resource_Interrupt_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NWP_sh_resource_Interrupt_enable register.
-//
-//******************************************************************************
-#define COMMON_REG_NWP_sh_resource_Interrupt_enable_NWP_sh_resource_Interrupt_enable_M \
-                                0x0000000F  // Interrupt enable NWP bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_NWP_sh_resource_Interrupt_enable_NWP_sh_resource_Interrupt_enable_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NWP_sh_resource_Interrupt_status register.
-//
-//******************************************************************************
-#define COMMON_REG_NWP_sh_resource_Interrupt_status_NWP_sh_resource_Interrupt_status_M \
-                                0x0000000F  // Interrupt enable NWP bit 0 ->
-                                            // when '1' enable I2C interrupt bit
-                                            // 1 -> when '1' enable SPI
-                                            // interrupt bit 3 ->
-                                            // when '1' enable GPIO interrupt
-
-#define COMMON_REG_NWP_sh_resource_Interrupt_status_NWP_sh_resource_Interrupt_status_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Flash_ctrl_reg register.
-//
-//******************************************************************************
-#define COMMON_REG_Flash_ctrl_reg_Flash_ctrl_reg_M \
-                                0x00000003  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_Flash_ctrl_reg_Flash_ctrl_reg_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M0_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M0_segment_access_config_Bus_matrix_M0_segment_access_config_M \
-                                0x0003FFFF  // Master 0 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M0_segment_access_config_Bus_matrix_M0_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M1_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M1_segment_access_config_Bus_matrix_M1_segment_access_config_M \
-                                0x0003FFFF  // Master 1 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M1_segment_access_config_Bus_matrix_M1_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M2_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M2_segment_access_config_Bus_matrix_M2_segment_access_config_M \
-                                0x0003FFFF  // Master 2 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M2_segment_access_config_Bus_matrix_M2_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M3_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M3_segment_access_config_Bus_matrix_M3_segment_access_config_M \
-                                0x0003FFFF  // Master 3 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M3_segment_access_config_Bus_matrix_M3_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M4_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M4_segment_access_config_Bus_matrix_M4_segment_access_config_M \
-                                0x0003FFFF  // Master 4 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M4_segment_access_config_Bus_matrix_M4_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_Bus_matrix_M5_segment_access_config register.
-//
-//******************************************************************************
-#define COMMON_REG_Bus_matrix_M5_segment_access_config_Bus_matrix_M5_segment_access_config_M \
-                                0x0003FFFF  // Master 5 control word matrix to
-                                            // each segment. Tieoff. Bit value 1
-                                            // indicates segment is accesable.
-
-#define COMMON_REG_Bus_matrix_M5_segment_access_config_Bus_matrix_M5_segment_access_config_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_GPIO_properties_register register.
-//
-//******************************************************************************
-#define COMMON_REG_GPIO_properties_register_GPIO_properties_register_M \
-                                0x000003FF  // Shared GPIO configuration
-                                            // register. Bit [1:0] to configure
-                                            // GPIO0 Bit [3:2] to configure
-                                            // GPIO1 Bit [5:4] to configure
-                                            // GPIO2 Bit [7:6] to configure
-                                            // GPIO3 Bit [9:8] to configure
-                                            // GPIO4 each GPIO can be
-                                            // individully selected. When “00”
-                                            // GPIO is free resource. When “01”
-                                            // GPIO is APPS resource. When “10”
-                                            // GPIO is NWP resource. Writing 11
-                                            // doesnt have any affect, i.e. If
-                                            // one write only relevant gpio
-                                            // semaphore and other bits are 1s,
-                                            // it'll not disturb the other
-                                            // semaphore bits. For example : Say
-                                            // If NW wants to take control of
-                                            // gpio-1, one should write
-                                            // 10'b11_1111_1011 and if one wants
-                                            // to release it write
-                                            // 10'b11_1111_0011.
-
-#define COMMON_REG_GPIO_properties_register_GPIO_properties_register_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE1 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE1_APPS_NW_SEMAPHORE1_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE1_APPS_NW_SEMAPHORE1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE2 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE2_APPS_NW_SEMAPHORE2_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE2_APPS_NW_SEMAPHORE2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE3 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE3_APPS_NW_SEMAPHORE3_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE3_APPS_NW_SEMAPHORE3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE4 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE4_APPS_NW_SEMAPHORE4_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE4_APPS_NW_SEMAPHORE4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE5 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE5_APPS_NW_SEMAPHORE5_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE5_APPS_NW_SEMAPHORE5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE6 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE6_APPS_NW_SEMAPHORE6_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE6_APPS_NW_SEMAPHORE6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE7 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE7_APPS_NW_SEMAPHORE7_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE7_APPS_NW_SEMAPHORE7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE8 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE8_APPS_NW_SEMAPHORE8_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE8_APPS_NW_SEMAPHORE8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE9 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE9_APPS_NW_SEMAPHORE9_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE9_APPS_NW_SEMAPHORE9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE10 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE10_APPS_NW_SEMAPHORE10_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE10_APPS_NW_SEMAPHORE10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE11 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE11_APPS_NW_SEMAPHORE11_M \
-                                0xFFFFFFFF  // • Each semaphore register is of
-                                            // 2 bit. • When this register is
-                                            // set to 2’b01 – Apps have access
-                                            // and when set to 2’b10 – NW have
-                                            // access. • Ideally both the master
-                                            // can modify any of this 2 bit, but
-                                            // assumption apps will write only
-                                            // 2’b01 or 2’b00 to this register
-                                            // and nw will write only 2’b10 or
-                                            // 2’b00. • Implementation is when
-                                            // any of the bit of this register
-                                            // is set, only next write
-                                            // allowedvis 2’b00 – Again
-                                            // assumption is one master will not
-                                            // write 2’b00 if other is already
-                                            // holding the semaphore.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE11_APPS_NW_SEMAPHORE11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_NW_SEMAPHORE12 register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_NW_SEMAPHORE12_APPS_NW_SEMAPHORE12_M \
-                                0xFFFFFFFF  // APPS NW semaphore register - not
-                                            // reflected in status.
-
-#define COMMON_REG_APPS_NW_SEMAPHORE12_APPS_NW_SEMAPHORE12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_SEMAPPHORE_PEND register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_SEMAPPHORE_PEND_APPS_SEMAPPHORE_PEND_M \
-                                0xFFFFFFFF  // APPS SEMAPOHORE STATUS
-
-#define COMMON_REG_APPS_SEMAPPHORE_PEND_APPS_SEMAPPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_SEMAPPHORE_PEND register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_SEMAPPHORE_PEND_NW_SEMAPPHORE_PEND_M \
-                                0xFFFFFFFF  // NW SEMAPHORE STATUS
-
-#define COMMON_REG_NW_SEMAPPHORE_PEND_NW_SEMAPPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_STATUS register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_STATUS_SEMAPHORE_STATUS_M \
-                                0xFFFFFFFF  // SEMAPHORE STATUS 9:8 :semaphore
-                                            // status of flash_control 7:6
-                                            // :semaphore status of
-                                            // gpio_properties 5:4
-                                            // :semaphore status of
-                                            // spi_propertie 1:0 :semaphore
-                                            // status of i2c_propertie
-
-#define COMMON_REG_SEMAPHORE_STATUS_SEMAPHORE_STATUS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_IDMEM_TIM_Update register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_FPGA_ROM_WR_EN register.
-//
-//******************************************************************************
-#define COMMON_REG_FPGA_ROM_WR_EN_FPGA_ROM_WR_EN \
-                                0x00000001  // when '1' enables Write into
-                                            // IDMEM CORE ROM, APPS ROM, NWP ROM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_NW_INT_MASK_M \
-                                0xFFFFFFFF  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define COMMON_REG_NW_INT_MASK_NW_INT_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK_SET register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_SET_NW_INT_MASK_SET_M \
-                                0xFFFFFFFF  // write 1 to set corresponding bit
-                                            // in NW_INT_MASK;0 = no effect
-
-#define COMMON_REG_NW_INT_MASK_SET_NW_INT_MASK_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_MASK_CLR_NW_INT_MASK_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // bit in NW_INT_MASK;0 = no effect
-
-#define COMMON_REG_NW_INT_MASK_CLR_NW_INT_MASK_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_CLR_NW_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-                                            // interrupt is not lost if coincide
-                                            // with write operation
-
-#define COMMON_REG_NW_INT_STS_CLR_NW_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_ACK register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_ACK_NW_INT_ACK_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt;0 = no effect
-
-#define COMMON_REG_NW_INT_ACK_NW_INT_ACK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_TRIG register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_TRIG_NW_INT_TRIG_M \
-                                0xFFFFFFFF  // Writing a 1 to a bit in this
-                                            // register causes the the Host CPU
-                                            // if enabled (not masked). This
-                                            // register is self-clearing.
-                                            // Writing 0 has no effect
-
-#define COMMON_REG_NW_INT_TRIG_NW_INT_TRIG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_MASKED_NW_INT_STS_MASKED_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by NW_INT mask
-
-#define COMMON_REG_NW_INT_STS_MASKED_NW_INT_STS_MASKED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_NW_INT_STS_RAW register.
-//
-//******************************************************************************
-#define COMMON_REG_NW_INT_STS_RAW_NW_INT_STS_RAW_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define COMMON_REG_NW_INT_STS_RAW_NW_INT_STS_RAW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_APPS_INT_MASK_M \
-                                0xFFFFFFFF  // 1= disable corresponding
-                                            // interrupt;0 = interrupt enabled
-
-#define COMMON_REG_APPS_INT_MASK_APPS_INT_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK_SET register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_SET_APPS_INT_MASK_SET_M \
-                                0xFFFFFFFF  // write 1 to set corresponding bit
-                                            // in APPS_INT_MASK;0 = no effect
-
-#define COMMON_REG_APPS_INT_MASK_SET_APPS_INT_MASK_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_MASK_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_MASK_CLR_APPS_INT_MASK_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // bit in APPS_INT_MASK;0 = no
-                                            // effect
-
-#define COMMON_REG_APPS_INT_MASK_CLR_APPS_INT_MASK_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_CLR register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_CLR_APPS_INT_STS_CLR_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt; 0 = no effect;
-                                            // interrupt is not lost if coincide
-                                            // with write operation
-
-#define COMMON_REG_APPS_INT_STS_CLR_APPS_INT_STS_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_ACK register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_ACK_APPS_INT_ACK_M \
-                                0xFFFFFFFF  // write 1 to clear corresponding
-                                            // interrupt;0 = no effect
-
-#define COMMON_REG_APPS_INT_ACK_APPS_INT_ACK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_TRIG register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_TRIG_APPS_INT_TRIG_M \
-                                0xFFFFFFFF  // Writing a 1 to a bit in this
-                                            // register causes the the Host CPU
-                                            // if enabled (not masked). This
-                                            // register is self-clearing.
-                                            // Writing 0 has no effect
-
-#define COMMON_REG_APPS_INT_TRIG_APPS_INT_TRIG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_MASKED register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_MASKED_APPS_INT_STS_MASKED_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active and not masked. read is
-                                            // non-destructive;0 = corresponding
-                                            // interrupt is inactive or masked
-                                            // by APPS_INT mask
-
-#define COMMON_REG_APPS_INT_STS_MASKED_APPS_INT_STS_MASKED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_INT_STS_RAW register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_INT_STS_RAW_APPS_INT_STS_RAW_M \
-                                0xFFFFFFFF  // 1= corresponding interrupt is
-                                            // active. read is non-destructive;0
-                                            // = corresponding interrupt is
-                                            // inactive
-
-#define COMMON_REG_APPS_INT_STS_RAW_APPS_INT_STS_RAW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_IDMEM_TIM_Updated register.
-//
-//******************************************************************************
-#define COMMON_REG_IDMEM_TIM_Updated_TIM_UPDATED \
-                                0x00000001  // toggle in this signal
-                                            // indicatesIDMEM_TIM_UPDATE
-                                            // register mentioned above is
-                                            // updated.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_APPS_GPIO_TRIG_EN register.
-//
-//******************************************************************************
-#define COMMON_REG_APPS_GPIO_TRIG_EN_APPS_GPIO_TRIG_EN_M \
-                                0x0000001F  // APPS GPIO Trigger EN control.
-                                            // Bit 0: when '1' enable GPIO 0
-                                            // trigger. This bit enables trigger
-                                            // for all GPIO 0 pins (GPIO 0 to
-                                            // GPIO7). Bit 1: when '1' enable
-                                            // GPIO 1 trigger. This bit enables
-                                            // trigger for all GPIO 1 pins (
-                                            // GPIO8 to GPIO15). Bit 2: when '1'
-                                            // enable GPIO 2 trigger. This bit
-                                            // enables trigger for all GPIO 2
-                                            // pins (GPIO16 to GPIO23). Bit 3:
-                                            // when '1' enable GPIO 3 trigger.
-                                            // This bit enables trigger for all
-                                            // GPIO 3 pins (GPIO24 to GPIO31).
-                                            // Bit 4: when '1' enable GPIO 4
-                                            // trigger. This bit enables trigger
-                                            // for all GPIO 4 pins.(GPIO32 to
-                                            // GPIO39)
-
-#define COMMON_REG_APPS_GPIO_TRIG_EN_APPS_GPIO_TRIG_EN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_EMU_DEBUG_REG register.
-//
-//******************************************************************************
-#define COMMON_REG_EMU_DEBUG_REG_EMU_DEBUG_REG_M \
-                                0xFFFFFFFF  // 0 th bit used for stalling APPS
-                                            // DMA and 1st bit is used for
-                                            // stalling NWP DMA for debug
-                                            // purpose. Other bits are unused.
-
-#define COMMON_REG_EMU_DEBUG_REG_EMU_DEBUG_REG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_STATUS2 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_STATUS2_SEMPAPHORE_STATUS2_M \
-                                0x00FFFFFF  // SEMAPHORE STATUS 23:22
-                                            // :semaphore status of
-                                            // apps_nw_semaphore11 21:20
-                                            // :semaphore status of
-                                            // apps_nw_semaphore11 19:18
-                                            // :semaphore status of
-                                            // apps_nw_semaphore10 17:16
-                                            // :semaphore status of
-                                            // apps_nw_semaphore9 15:14
-                                            // :semaphore status of
-                                            // apps_nw_semaphore8 13:12
-                                            // :semaphore status of
-                                            // apps_nw_semaphore7 11:10
-                                            // :semaphore status of
-                                            // apps_nw_semaphore6 9:8 :semaphore
-                                            // status of apps_nw_semaphore5 7:6
-                                            // :semaphore status of
-                                            // apps_nw_semaphore4 5:4 :semaphore
-                                            // status of apps_nw_semaphore3 3:2
-                                            // :semaphore status of
-                                            // apps_nw_semaphore2 1:0 :semaphore
-                                            // status of apps_nw_semaphore1
-
-#define COMMON_REG_SEMAPHORE_STATUS2_SEMPAPHORE_STATUS2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_PREV_OWNER1 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_PREV_OWNER1_SEMAPHORE_PREV_OWNER1_M \
-                                0x0003FFFF  // 1:0 : prvious owner of
-                                            // i2c_properties_reg[1:0] 3:2 :
-                                            // prvious owner of
-                                            // spi_properties_reg[1:0] 5:4 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[1:0] 9:8 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[3:2] 11:10 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[5:4] 13:12 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[7:6] 15:14 :
-                                            // prvious owner of
-                                            // gpio_properties_reg[9:8] 17:16 :
-                                            // prvious owner of
-                                            // flash_control_reg[1:0]
-
-#define COMMON_REG_SEMAPHORE_PREV_OWNER1_SEMAPHORE_PREV_OWNER1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// COMMON_REG_O_SEMAPHORE_PREV_OWNER2 register.
-//
-//******************************************************************************
-#define COMMON_REG_SEMAPHORE_PREV_OWNER2_SEMAPHORE_PREV_OWNER2_M \
-                                0x00FFFFFF  // 1:0 : previous owner of
-                                            // apps_nw_semaphore1_reg[1:0] 3:2 :
-                                            // previous owner of
-                                            // apps_nw_semaphore2_reg[1:0] 5:4 :
-                                            // previous owner of
-                                            // apps_nw_semaphore3_reg[1:0] 7:6 :
-                                            // previous owner of
-                                            // apps_nw_semaphore4_reg[1:0] 9:8 :
-                                            // previous owner of
-                                            // apps_nw_semaphore5_reg[1:0] 11:10
-                                            // : previous owner of
-                                            // apps_nw_semaphore6_reg[1:0] 13:12
-                                            // : previous owner of
-                                            // apps_nw_semaphore7_reg[1:0] 15:14
-                                            // : previous owner of
-                                            // apps_nw_semaphore8_reg[1:0] 17:16
-                                            // : previous owner of
-                                            // apps_nw_semaphore9_reg[1:0] 19:18
-                                            // : previous owner of
-                                            // apps_nw_semaphore10_reg[1:0]
-                                            // 21:20 : previous owner of
-                                            // apps_nw_semaphore11_reg[1:0]
-                                            // 23:22 : previous owner of
-                                            // apps_nw_semaphore12_reg[1:0]
-
-#define COMMON_REG_SEMAPHORE_PREV_OWNER2_SEMAPHORE_PREV_OWNER2_S 0
-
-
-
-#endif // __HW_COMMON_REG_H__
diff --git a/ports/cc3200/hal/inc/hw_des.h b/ports/cc3200/hal/inc/hw_des.h
deleted file mode 100644
index c3aed656271ed..0000000000000
--- a/ports/cc3200/hal/inc/hw_des.h
+++ /dev/null
@@ -1,339 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_DES_H__
-#define __HW_DES_H__
-
-//*****************************************************************************
-//
-// The following are defines for the DES_P register offsets.
-//
-//*****************************************************************************
-#define DES_O_KEY3_L          0x00000000  // KEY3 (LSW) for 192-bit key
-#define DES_O_KEY3_H          0x00000004  // KEY3 (MSW) for 192-bit key
-#define DES_O_KEY2_L          0x00000008  // KEY2 (LSW) for 192-bit key
-#define DES_O_KEY2_H          0x0000000C  // KEY2 (MSW) for 192-bit key
-#define DES_O_KEY1_L          0x00000010  // KEY1 (LSW) for 128-bit
-                                            // key/192-bit key
-#define DES_O_KEY1_H          0x00000014  // KEY1 (LSW) for 128-bit
-                                            // key/192-bit key
-#define DES_O_IV_L            0x00000018  // Initialization vector LSW
-#define DES_O_IV_H            0x0000001C  // Initialization vector MSW
-#define DES_O_CTRL            0x00000020
-#define DES_O_LENGTH          0x00000024  // Indicates the cryptographic data
-                                            // length in bytes for all modes.
-                                            // Once processing is started with
-                                            // this context this length
-                                            // decrements to zero. Data lengths
-                                            // up to (2^32 – 1) bytes are
-                                            // allowed. A write to this register
-                                            // triggers the engine to start
-                                            // using this context. For a Host
-                                            // read operation these registers
-                                            // return all-zeroes.
-#define DES_O_DATA_L          0x00000028  // Data register(LSW) to read/write
-                                            // encrypted/decrypted data.
-#define DES_O_DATA_H          0x0000002C  // Data register(MSW) to read/write
-                                            // encrypted/decrypted data.
-#define DES_O_REVISION        0x00000030
-#define DES_O_SYSCONFIG       0x00000034
-#define DES_O_SYSSTATUS       0x00000038
-#define DES_O_IRQSTATUS       0x0000003C  // This register indicates the
-                                            // interrupt status. If one of the
-                                            // interrupt bits is set the
-                                            // interrupt output will be asserted
-#define DES_O_IRQENABLE       0x00000040  // This register contains an enable
-                                            // bit for each unique interrupt
-                                            // generated by the module. It
-                                            // matches the layout of
-                                            // DES_IRQSTATUS register. An
-                                            // interrupt is enabled when the bit
-                                            // in this register is set to 1
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY3_L register.
-//
-//******************************************************************************
-#define DES_KEY3_L_KEY3_L_M   0xFFFFFFFF  // data for key3
-#define DES_KEY3_L_KEY3_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY3_H register.
-//
-//******************************************************************************
-#define DES_KEY3_H_KEY3_H_M   0xFFFFFFFF  // data for key3
-#define DES_KEY3_H_KEY3_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY2_L register.
-//
-//******************************************************************************
-#define DES_KEY2_L_KEY2_L_M   0xFFFFFFFF  // data for key2
-#define DES_KEY2_L_KEY2_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY2_H register.
-//
-//******************************************************************************
-#define DES_KEY2_H_KEY2_H_M   0xFFFFFFFF  // data for key2
-#define DES_KEY2_H_KEY2_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY1_L register.
-//
-//******************************************************************************
-#define DES_KEY1_L_KEY1_L_M   0xFFFFFFFF  // data for key1
-#define DES_KEY1_L_KEY1_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_KEY1_H register.
-//
-//******************************************************************************
-#define DES_KEY1_H_KEY1_H_M   0xFFFFFFFF  // data for key1
-#define DES_KEY1_H_KEY1_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IV_L register.
-//
-//******************************************************************************
-#define DES_IV_L_IV_L_M       0xFFFFFFFF  // initialization vector for CBC
-                                            // CFB modes
-#define DES_IV_L_IV_L_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IV_H register.
-//
-//******************************************************************************
-#define DES_IV_H_IV_H_M       0xFFFFFFFF  // initialization vector for CBC
-                                            // CFB modes
-#define DES_IV_H_IV_H_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_CTRL register.
-//
-//******************************************************************************
-#define DES_CTRL_CONTEXT      0x80000000  // If ‘1’ this read-only status bit
-                                            // indicates that the context data
-                                            // registers can be overwritten and
-                                            // the host is permitted to write
-                                            // the next context.
-#define DES_CTRL_MODE_M       0x00000030  // Select CBC ECB or CFB mode 0x0
-                                            // ecb mode 0x1 cbc mode 0x2 cfb
-                                            // mode 0x3 reserved
-#define DES_CTRL_MODE_S       4
-#define DES_CTRL_TDES         0x00000008  // Select DES or triple DES
-                                            // encryption/decryption. 0 des mode
-                                            // 1 tdes mode
-#define DES_CTRL_DIRECTION    0x00000004  // select encryption/decryption 0
-                                            // decryption is selected 1
-                                            // Encryption is selected
-#define DES_CTRL_INPUT_READY  0x00000002  // When '1' ready to
-                                            // encrypt/decrypt data
-#define DES_CTRL_OUTPUT_READY 0x00000001  // When '1' Data
-                                            // decrypted/encrypted ready
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_LENGTH register.
-//
-//******************************************************************************
-#define DES_LENGTH_LENGTH_M   0xFFFFFFFF
-#define DES_LENGTH_LENGTH_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_DATA_L register.
-//
-//******************************************************************************
-#define DES_DATA_L_DATA_L_M   0xFFFFFFFF  // data for encryption/decryption
-#define DES_DATA_L_DATA_L_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_DATA_H register.
-//
-//******************************************************************************
-#define DES_DATA_H_DATA_H_M   0xFFFFFFFF  // data for encryption/decryption
-#define DES_DATA_H_DATA_H_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_REVISION register.
-//
-//******************************************************************************
-#define DES_REVISION_SCHEME_M 0xC0000000
-#define DES_REVISION_SCHEME_S 30
-#define DES_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define DES_REVISION_FUNC_S   16
-#define DES_REVISION_R_RTL_M  0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define DES_REVISION_R_RTL_S  11
-#define DES_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-
-#define DES_REVISION_X_MAJOR_S 8
-#define DES_REVISION_CUSTOM_M 0x000000C0
-#define DES_REVISION_CUSTOM_S 6
-#define DES_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-
-#define DES_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define DES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN \
-                                0x00000080  // If set to ‘1’ the DMA context
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define DES_SYSCONFIG_DMA_REQ_DATA_OUT_EN \
-                                0x00000040  // If set to ‘1’ the DMA output
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-#define DES_SYSCONFIG_DMA_REQ_DATA_IN_EN \
-                                0x00000020  // If set to ‘1’ the DMA input
-                                            // request is enabled. 0 Dma
-                                            // disabled 1 Dma enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define DES_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define DES_IRQSTATUS_DATA_OUT \
-                                0x00000004  // This bit indicates data output
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-#define DES_IRQSTATUS_DATA_IN 0x00000002  // This bit indicates data input
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-#define DES_IRQSTATUS_CONTEX_IN \
-                                0x00000001  // This bit indicates context
-                                            // interrupt is active and triggers
-                                            // the interrupt output.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DES_O_IRQENABLE register.
-//
-//******************************************************************************
-#define DES_IRQENABLE_M_DATA_OUT \
-                                0x00000004  // If this bit is set to ‘1’ the
-                                            // secure data output interrupt is
-                                            // enabled.
-
-#define DES_IRQENABLE_M_DATA_IN \
-                                0x00000002  // If this bit is set to ‘1’ the
-                                            // secure data input interrupt is
-                                            // enabled.
-
-#define DES_IRQENABLE_M_CONTEX_IN \
-                                0x00000001  // If this bit is set to ‘1’ the
-                                            // secure context interrupt is
-                                            // enabled.
-
-
-
-
-#endif // __HW_DES_H__
diff --git a/ports/cc3200/hal/inc/hw_dthe.h b/ports/cc3200/hal/inc/hw_dthe.h
deleted file mode 100644
index 1d302f426b15e..0000000000000
--- a/ports/cc3200/hal/inc/hw_dthe.h
+++ /dev/null
@@ -1,392 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-//*****************************************************************************
-
-#ifndef __HW_DTHE_H__
-#define __HW_DTHE_H__
-
-//*****************************************************************************
-//
-// The following are defines for the DTHE register offsets.
-//
-//*****************************************************************************
-#define DTHE_O_SHA_IM    0x00000810
-#define DTHE_O_SHA_RIS    0x00000814
-#define DTHE_O_SHA_MIS    0x00000818
-#define DTHE_O_SHA_IC    0x0000081C
-#define DTHE_O_AES_IM    0x00000820
-#define DTHE_O_AES_RIS    0x00000824
-#define DTHE_O_AES_MIS    0x00000828
-#define DTHE_O_AES_IC    0x0000082C
-#define DTHE_O_DES_IM    0x00000830
-#define DTHE_O_DES_RIS    0x00000834
-#define DTHE_O_DES_MIS    0x00000838
-#define DTHE_O_DES_IC    0x0000083C
-#define DTHE_O_EIP_CGCFG      0x00000A00
-#define DTHE_O_EIP_CGREQ      0x00000A04
-#define DTHE_O_CRC_CTRL       0x00000C00
-#define DTHE_O_CRC_SEED       0x00000C10
-#define DTHE_O_CRC_DIN        0x00000C14
-#define DTHE_O_CRC_RSLT_PP    0x00000C18
-#define DTHE_O_RAND_KEY0      0x00000F00
-#define DTHE_O_RAND_KEY1      0x00000F04
-#define DTHE_O_RAND_KEY2      0x00000F08
-#define DTHE_O_RAND_KEY3      0x00000F0C
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IMST register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_SHAMD5_IMST_COUT 0x00000002  // Context out: this interrupt is
-                                            // raised when DMA complets the
-                                            // output context movement from
-                                            // internal register
-#define DTHE_SHAMD5_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IRIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_SHAMD5_IRIS_COUT 0x00000002  // Context output is done
-#define DTHE_SHAMD5_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_IMIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_SHAMD5_IMIS_COUT 0x00000002  // Context output is done
-#define DTHE_SHAMD5_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_SHAMD5_ICIS register.
-//
-//******************************************************************************
-#define DTHE_SHAMD5_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_SHAMD5_ICIS_COUT 0x00000002  // Clear “Context output done” flag
-#define DTHE_SHAMD5_ICIS_CIN  0x00000001  // Clear “context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IMST register.
-//
-//******************************************************************************
-#define DTHE_AES_IMST_DOUT 0x00000008  // Data out: this interrupt is
-                                            // raised when DMA finishes writing
-                                            // last word of the process result
-#define DTHE_AES_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_AES_IMST_COUT 0x00000002  // Context out: this interrupt is
-                                            // raised when DMA complets the
-                                            // output context movement from
-                                            // internal register
-#define DTHE_AES_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IRIS register.
-//
-//******************************************************************************
-#define DTHE_AES_IRIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_AES_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_AES_IRIS_COUT 0x00000002  // Context output is done
-#define DTHE_AES_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_IMIS register.
-//
-//******************************************************************************
-#define DTHE_AES_IMIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_AES_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_AES_IMIS_COUT 0x00000002  // Context output is done
-#define DTHE_AES_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_AES_ICIS register.
-//
-//******************************************************************************
-#define DTHE_AES_ICIS_DOUT 0x00000008  // Clear “output Data movement
-                                            // done” flag
-#define DTHE_AES_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_AES_ICIS_COUT 0x00000002  // Clear “Context output done” flag
-#define DTHE_AES_ICIS_CIN  0x00000001  // Clear “context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IMST register.
-//
-//******************************************************************************
-#define DTHE_DES_IMST_DOUT 0x00000008  // Data out: this interrupt is
-                                            // raised when DMA finishes writing
-                                            // last word of the process result
-#define DTHE_DES_IMST_DIN  0x00000004  // Data in: this interrupt is
-                                            // raised when DMA writes last word
-                                            // of input data to internal FIFO of
-                                            // the engine
-#define DTHE_DES_IMST_CIN  0x00000001  // context in: this interrupt is
-                                            // raised when DMA complets Context
-                                            // write to internal register
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IRIS register.
-//
-//******************************************************************************
-#define DTHE_DES_IRIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_DES_IRIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_DES_IRIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_IMIS register.
-//
-//******************************************************************************
-#define DTHE_DES_IMIS_DOUT 0x00000008  // Output Data movement is done
-#define DTHE_DES_IMIS_DIN  0x00000004  // input Data movement is done
-#define DTHE_DES_IMIS_CIN  0x00000001  // context input is done
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_DES_ICIS register.
-//
-//******************************************************************************
-#define DTHE_DES_ICIS_DOUT 0x00000008  // Clear “output Data movement
-                                            // done” flag
-#define DTHE_DES_ICIS_DIN  0x00000004  // Clear “input Data movement done”
-                                            // flag
-#define DTHE_DES_ICIS_CIN  0x00000001  // Clear "context input done” flag
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_EIP_CGCFG register.
-//
-//******************************************************************************
-#define DTHE_EIP_CGCFG_EIP29_CFG \
-                                0x00000010  // Clock gating protocol setting
-                                            // for EIP29T. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP75_CFG \
-                                0x00000008  // Clock gating protocol setting
-                                            // for EIP75T. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP16_CFG \
-                                0x00000004  // Clock gating protocol setting
-                                            // for DES. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP36_CFG \
-                                0x00000002  // Clock gating protocol setting
-                                            // for AES. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-#define DTHE_EIP_CGCFG_EIP57_CFG \
-                                0x00000001  // Clock gating protocol setting
-                                            // for SHAMD5. 0 – Follow direct
-                                            // protocol 1 – Follow idle_req/ack
-                                            // protocol.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_EIP_CGREQ register.
-//
-//******************************************************************************
-#define DTHE_EIP_CGREQ_Key_M  0xF0000000  // When “0x5” write “1” to lower
-                                            // bits [4:0] will set the bit.
-                                            // Write “0” will be ignored When
-                                            // “0x2” write “1” to lower bit
-                                            // [4:0] will clear the bit. Write
-                                            // “0” will be ignored for other key
-                                            // value, regular read write
-                                            // operation
-#define DTHE_EIP_CGREQ_Key_S  28
-#define DTHE_EIP_CGREQ_EIP29_REQ \
-                                0x00000010  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP75_REQ \
-                                0x00000008  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP16_REQ \
-                                0x00000004  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP36_REQ \
-                                0x00000002  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-#define DTHE_EIP_CGREQ_EIP57_REQ \
-                                0x00000001  // 0 – request clock gating 1 –
-                                            // request to un-gate the clock.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_CTRL register.
-//
-//******************************************************************************
-#define DTHE_CRC_CTRL_INIT_M  0x00006000  // Initialize the CRC 00 – use SEED
-                                            // register context as starting
-                                            // value 10 – all “zero” 11 – all
-                                            // “one” This is self clearing. With
-                                            // first write to data register this
-                                            // value clears to zero and remain
-                                            // zero for rest of the operation
-                                            // unless written again
-#define DTHE_CRC_CTRL_INIT_S  13
-#define DTHE_CRC_CTRL_SIZE    0x00001000  // Input data size 0 – 32 bit 1 – 8
-                                            // bit
-#define DTHE_CRC_CTRL_OINV    0x00000200  // Inverse the bits of result
-                                            // before storing to CRC_RSLT_PP0
-#define DTHE_CRC_CTRL_OBR     0x00000100  // Bit reverse the output result
-                                            // byte before storing to
-                                            // CRC_RSLT_PP0. applicable for all
-                                            // bytes in word
-#define DTHE_CRC_CTRL_IBR     0x00000080  // Bit reverse the input byte. For
-                                            // all bytes in word
-#define DTHE_CRC_CTRL_ENDIAN_M \
-                                0x00000030  // Endian control [0] – swap byte
-                                            // in half-word [1] – swap half word
-
-#define DTHE_CRC_CTRL_ENDIAN_S 4
-#define DTHE_CRC_CTRL_TYPE_M  0x0000000F  // Type of operation 0000 –
-                                            // polynomial 0x8005 0001 –
-                                            // polynomial 0x1021 0010 –
-                                            // polynomial 0x4C11DB7 0011 –
-                                            // polynomial 0x1EDC6F41 1000 – TCP
-                                            // checksum TYPE in DTHE_S_CRC_CTRL
-                                            // & DTHE_S_CRC_CTRL should be
-                                            // exclusive
-#define DTHE_CRC_CTRL_TYPE_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_SEED register.
-//
-//******************************************************************************
-#define DTHE_CRC_SEED_SEED_M  0xFFFFFFFF  // Starting seed of CRC and
-                                            // checksum operation. Please see
-                                            // CTRL register for more detail.
-                                            // This resister also holds the
-                                            // latest result of CRC or checksum
-                                            // operation
-#define DTHE_CRC_SEED_SEED_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the DTHE_O_CRC_DIN register.
-//
-//******************************************************************************
-#define DTHE_CRC_DIN_DATA_IN_M \
-                                0xFFFFFFFF  // Input data for CRC or checksum
-                                            // operation
-
-#define DTHE_CRC_DIN_DATA_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_CRC_RSLT_PP register.
-//
-//******************************************************************************
-#define DTHE_CRC_RSLT_PP_RSLT_PP_M \
-                                0xFFFFFFFF  // Input data for CRC or checksum
-                                            // operation
-
-#define DTHE_CRC_RSLT_PP_RSLT_PP_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY0 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY0_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [31:0]
-#define DTHE_RAND_KEY0_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY1 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY1_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [63:32]
-#define DTHE_RAND_KEY1_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY2 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY2_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [95:34]
-#define DTHE_RAND_KEY2_KEY_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// DTHE_O_RAND_KEY3 register.
-//
-//******************************************************************************
-#define DTHE_RAND_KEY3_KEY_M  0xFFFFFFFF  // Device Specific Randon key
-                                            // [127:96]
-#define DTHE_RAND_KEY3_KEY_S  0
-
-
-
-#endif // __HW_DTHE_H__
diff --git a/ports/cc3200/hal/inc/hw_flash_ctrl.h b/ports/cc3200/hal/inc/hw_flash_ctrl.h
deleted file mode 100644
index b57044aa13ad1..0000000000000
--- a/ports/cc3200/hal/inc/hw_flash_ctrl.h
+++ /dev/null
@@ -1,1862 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_FLASH_CTRL_H__
-#define __HW_FLASH_CTRL_H__
-
-//*****************************************************************************
-//
-// The following are defines for the FLASH_CTRL register offsets.
-//
-//*****************************************************************************
-#define FLASH_CTRL_O_FMA        0x00000000  // Flash Memory Address (FMA)
-                                            // offset 0x000 During a write
-                                            // operation this register contains
-                                            // a 4-byte-aligned address and
-                                            // specifies where the data is
-                                            // written. During erase operations
-                                            // this register contains a 1
-                                            // KB-aligned CPU byte address and
-                                            // specifies which block is erased.
-                                            // Note that the alignment
-                                            // requirements must be met by
-                                            // software or the results of the
-                                            // operation are unpredictable.
-#define FLASH_CTRL_O_FMD        0x00000004  // Flash Memory Data (FMD) offset
-                                            // 0x004 This register contains the
-                                            // data to be written during the
-                                            // programming cycle or read during
-                                            // the read cycle. Note that the
-                                            // contents of this register are
-                                            // undefined for a read access of an
-                                            // execute-only block. This register
-                                            // is not used during erase cycles.
-#define FLASH_CTRL_O_FMC        0x00000008  // Flash Memory Control (FMC)
-                                            // offset 0x008 When this register
-                                            // is written the Flash memory
-                                            // controller initiates the
-                                            // appropriate access cycle for the
-                                            // location specified by the Flash
-                                            // Memory Address (FMA) register .
-                                            // If the access is a write access
-                                            // the data contained in the Flash
-                                            // Memory Data (FMD) register is
-                                            // written to the specified address.
-                                            // This register must be the final
-                                            // register written and initiates
-                                            // the memory operation. The four
-                                            // control bits in the lower byte of
-                                            // this register are used to
-                                            // initiate memory operations.
-#define FLASH_CTRL_O_FCRIS      0x0000000C  // Flash Controller Raw Interrupt
-                                            // Status (FCRIS) offset 0x00C This
-                                            // register indicates that the Flash
-                                            // memory controller has an
-                                            // interrupt condition. An interrupt
-                                            // is sent to the interrupt
-                                            // controller only if the
-                                            // corresponding FCIM register bit
-                                            // is set.
-#define FLASH_CTRL_O_FCIM       0x00000010  // Flash Controller Interrupt Mask
-                                            // (FCIM) offset 0x010 This register
-                                            // controls whether the Flash memory
-                                            // controller generates interrupts
-                                            // to the controller.
-#define FLASH_CTRL_O_FCMISC     0x00000014  // Flash Controller Masked
-                                            // Interrupt Status and Clear
-                                            // (FCMISC) offset 0x014 This
-                                            // register provides two functions.
-                                            // First it reports the cause of an
-                                            // interrupt by indicating which
-                                            // interrupt source or sources are
-                                            // signalling the interrupt. Second
-                                            // it serves as the method to clear
-                                            // the interrupt reporting.
-#define FLASH_CTRL_O_FMC2       0x00000020  // Flash Memory Control 2 (FMC2)
-                                            // offset 0x020 When this register
-                                            // is written the Flash memory
-                                            // controller initiates the
-                                            // appropriate access cycle for the
-                                            // location specified by the Flash
-                                            // Memory Address (FMA) register .
-                                            // If the access is a write access
-                                            // the data contained in the Flash
-                                            // Write Buffer (FWB) registers is
-                                            // written. This register must be
-                                            // the final register written as it
-                                            // initiates the memory operation.
-#define FLASH_CTRL_O_FWBVAL     0x00000030  // Flash Write Buffer Valid
-                                            // (FWBVAL) offset 0x030 This
-                                            // register provides a bitwise
-                                            // status of which FWBn registers
-                                            // have been written by the
-                                            // processor since the last write of
-                                            // the Flash memory write buffer.
-                                            // The entries with a 1 are written
-                                            // on the next write of the Flash
-                                            // memory write buffer. This
-                                            // register is cleared after the
-                                            // write operation by hardware. A
-                                            // protection violation on the write
-                                            // operation also clears this
-                                            // status. Software can program the
-                                            // same 32 words to various Flash
-                                            // memory locations by setting the
-                                            // FWB[n] bits after they are
-                                            // cleared by the write operation.
-                                            // The next write operation then
-                                            // uses the same data as the
-                                            // previous one. In addition if a
-                                            // FWBn register change should not
-                                            // be written to Flash memory
-                                            // software can clear the
-                                            // corresponding FWB[n] bit to
-                                            // preserve the existing data when
-                                            // the next write operation occurs.
-#define FLASH_CTRL_O_FWB1       0x00000100  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB2       0x00000104  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB3       0x00000108  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB4       0x0000010C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB5       0x00000110  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB6       0x00000114  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB7       0x00000118  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB8       0x0000011C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB9       0x00000120  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB10      0x00000124  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB11      0x00000128  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB12      0x0000012C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB13      0x00000130  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB14      0x00000134  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB15      0x00000138  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB16      0x0000013C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB17      0x00000140  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB18      0x00000144  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB19      0x00000148  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB20      0x0000014C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB21      0x00000150  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB22      0x00000154  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB23      0x00000158  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB24      0x0000015C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB25      0x00000160  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB26      0x00000164  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB27      0x00000168  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB28      0x0000016C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB29      0x00000170  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB30      0x00000174  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB31      0x00000178  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FWB32      0x0000017C  // Flash Write Buffer n (FWBn)
-                                            // offset 0x100 - 0x17C These 32
-                                            // registers hold the contents of
-                                            // the data to be written into the
-                                            // Flash memory on a buffered Flash
-                                            // memory write operation. The
-                                            // offset selects one of the 32-bit
-                                            // registers. Only FWBn registers
-                                            // that have been updated since the
-                                            // preceding buffered Flash memory
-                                            // write operation are written into
-                                            // the Flash memory so it is not
-                                            // necessary to write the entire
-                                            // bank of registers in order to
-                                            // write 1 or 2 words. The FWBn
-                                            // registers are written into the
-                                            // Flash memory with the FWB0
-                                            // register corresponding to the
-                                            // address contained in FMA. FWB1 is
-                                            // written to the address FMA+0x4
-                                            // etc. Note that only data bits
-                                            // that are 0 result in the Flash
-                                            // memory being modified. A data bit
-                                            // that is 1 leaves the content of
-                                            // the Flash memory bit at its
-                                            // previous value.
-#define FLASH_CTRL_O_FSIZE      0x00000FC0  // Flash Size (FSIZE) offset 0xFC0
-                                            // This register indicates the size
-                                            // of the on-chip Flash memory.
-                                            // Important: This register should
-                                            // be used to determine the size of
-                                            // the Flash memory that is
-                                            // implemented on this
-                                            // microcontroller. However to
-                                            // support legacy software the DC0
-                                            // register is available. A read of
-                                            // the DC0 register correctly
-                                            // identifies legacy memory sizes.
-                                            // Software must use the FSIZE
-                                            // register for memory sizes that
-                                            // are not listed in the DC0
-                                            // register description.
-#define FLASH_CTRL_O_SSIZE      0x00000FC4  // SRAM Size (SSIZE) offset 0xFC4
-                                            // This register indicates the size
-                                            // of the on-chip SRAM. Important:
-                                            // This register should be used to
-                                            // determine the size of the SRAM
-                                            // that is implemented on this
-                                            // microcontroller. However to
-                                            // support legacy software the DC0
-                                            // register is available. A read of
-                                            // the DC0 register correctly
-                                            // identifies legacy memory sizes.
-                                            // Software must use the SSIZE
-                                            // register for memory sizes that
-                                            // are not listed in the DC0
-                                            // register description.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMA register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMA_OFFSET_M 0x0003FFFF  // Address Offset Address offset in
-                                            // Flash memory where operation is
-                                            // performed except for nonvolatile
-                                            // registers
-#define FLASH_CTRL_FMA_OFFSET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMD register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMD_DATA_M   0xFFFFFFFF  // Data Value Data value for write
-                                            // operation.
-#define FLASH_CTRL_FMD_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMC register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMC_WRKEY_M  0xFFFF0000  // Flash Memory Write Key This
-                                            // field contains a write key which
-                                            // is used to minimize the incidence
-                                            // of accidental Flash memory
-                                            // writes. The value 0xA442 must be
-                                            // written into this field for a
-                                            // Flash memory write to occur.
-                                            // Writes to the FMC register
-                                            // without this WRKEY value are
-                                            // ignored. A read of this field
-                                            // returns the value 0.
-#define FLASH_CTRL_FMC_WRKEY_S  16
-#define FLASH_CTRL_FMC_COMT     0x00000008  // Commit Register Value This bit
-                                            // is used to commit writes to
-                                            // Flash-memory-resident registers
-                                            // and to monitor the progress of
-                                            // that process. Value Description 1
-                                            // Set this bit to commit (write)
-                                            // the register value to a
-                                            // Flash-memory-resident register.
-                                            // When read a 1 indicates that the
-                                            // previous commit access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous commit access is
-                                            // complete.
-#define FLASH_CTRL_FMC_MERASE1  0x00000004  // Mass Erase Flash Memory This bit
-                                            // is used to mass erase the Flash
-                                            // main memory and to monitor the
-                                            // progress of that process. Value
-                                            // Description 1 Set this bit to
-                                            // erase the Flash main memory. When
-                                            // read a 1 indicates that the
-                                            // previous mass erase access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous mass erase access is
-                                            // complete.
-#define FLASH_CTRL_FMC_ERASE    0x00000002  // Erase a Page of Flash Memory
-                                            // This bit is used to erase a page
-                                            // of Flash memory and to monitor
-                                            // the progress of that process.
-                                            // Value Description 1 Set this bit
-                                            // to erase the Flash memory page
-                                            // specified by the contents of the
-                                            // FMA register. When read a 1
-                                            // indicates that the previous page
-                                            // erase access is not complete. 0 A
-                                            // write of 0 has no effect on the
-                                            // state of this bit. When read a 0
-                                            // indicates that the previous page
-                                            // erase access is complete.
-#define FLASH_CTRL_FMC_WRITE    0x00000001  // Write a Word into Flash Memory
-                                            // This bit is used to write a word
-                                            // into Flash memory and to monitor
-                                            // the progress of that process.
-                                            // Value Description 1 Set this bit
-                                            // to write the data stored in the
-                                            // FMD register into the Flash
-                                            // memory location specified by the
-                                            // contents of the FMA register.
-                                            // When read a 1 indicates that the
-                                            // write update access is not
-                                            // complete. 0 A write of 0 has no
-                                            // effect on the state of this bit.
-                                            // When read a 0 indicates that the
-                                            // previous write update access is
-                                            // complete.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FCRIS register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCRIS_PROGRIS \
-                                0x00002000  // Program Verify Error Raw
-                                            // Interrupt Status Value
-                                            // Description 1 An interrupt is
-                                            // pending because the verify of a
-                                            // PROGRAM operation failed. 0 An
-                                            // interrupt has not occurred. This
-                                            // bit is cleared by writing a 1 to
-                                            // the PROGMISC bit in the FCMISC
-                                            // register.
-
-#define FLASH_CTRL_FCRIS_ERRIS  0x00000800  // Erase Verify Error Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because the
-                                            // verify of an ERASE operation
-                                            // failed. 0 An interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the ERMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_INVDRIS \
-                                0x00000400  // Invalid Data Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because a
-                                            // bit that was previously
-                                            // programmed as a 0 is now being
-                                            // requested to be programmed as a
-                                            // 1. 0 An interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the INVMISC bit in
-                                            // the FCMISC register.
-
-#define FLASH_CTRL_FCRIS_VOLTRIS \
-                                0x00000200  // Pump Voltage Raw Interrupt
-                                            // Status Value Description 1 An
-                                            // interrupt is pending because the
-                                            // regulated voltage of the pump
-                                            // went out of spec during the Flash
-                                            // operation and the operation was
-                                            // terminated. 0 An interrupt has
-                                            // not occurred. This bit is cleared
-                                            // by writing a 1 to the VOLTMISC
-                                            // bit in the FCMISC register.
-
-#define FLASH_CTRL_FCRIS_ERIS   0x00000004  // EEPROM Raw Interrupt Status This
-                                            // bit provides status EEPROM
-                                            // operation. Value Description 1 An
-                                            // EEPROM interrupt has occurred. 0
-                                            // An EEPROM interrupt has not
-                                            // occurred. This bit is cleared by
-                                            // writing a 1 to the EMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_PRIS   0x00000002  // Programming Raw Interrupt Status
-                                            // This bit provides status on
-                                            // programming cycles which are
-                                            // write or erase actions generated
-                                            // through the FMC or FMC2 register
-                                            // bits (see page 537 and page 549).
-                                            // Value Description 1 The
-                                            // programming or erase cycle has
-                                            // completed. 0 The programming or
-                                            // erase cycle has not completed.
-                                            // This status is sent to the
-                                            // interrupt controller when the
-                                            // PMASK bit in the FCIM register is
-                                            // set. This bit is cleared by
-                                            // writing a 1 to the PMISC bit in
-                                            // the FCMISC register.
-#define FLASH_CTRL_FCRIS_ARIS   0x00000001  // Access Raw Interrupt Status
-                                            // Value Description 1 A program or
-                                            // erase action was attempted on a
-                                            // block of Flash memory that
-                                            // contradicts the protection policy
-                                            // for that block as set in the
-                                            // FMPPEn registers. 0 No access has
-                                            // tried to improperly program or
-                                            // erase the Flash memory. This
-                                            // status is sent to the interrupt
-                                            // controller when the AMASK bit in
-                                            // the FCIM register is set. This
-                                            // bit is cleared by writing a 1 to
-                                            // the AMISC bit in the FCMISC
-                                            // register.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FCIM register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCIM_ILLMASK 0x00004000  // Illegal Address Interrupt Mask
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the ILLARIS bit
-                                            // is set. 0 The ILLARIS interrupt
-                                            // is suppressed and not sent to the
-                                            // interrupt controller.
-#define FLASH_CTRL_FCIM_PROGMASK \
-                                0x00002000  // PROGVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the PROGRIS bit is set. 0
-                                            // The PROGRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_PREMASK 0x00001000  // PREVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the PRERIS bit is set. 0 The
-                                            // PRERIS interrupt is suppressed
-                                            // and not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_ERMASK  0x00000800  // ERVER Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ERRIS bit is set. 0 The
-                                            // ERRIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_INVDMASK \
-                                0x00000400  // Invalid Data Interrupt Mask
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the INVDRIS bit
-                                            // is set. 0 The INVDRIS interrupt
-                                            // is suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_VOLTMASK \
-                                0x00000200  // VOLT Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the VOLTRIS bit is set. 0
-                                            // The VOLTRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_LOCKMASK \
-                                0x00000100  // LOCK Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the LOCKRIS bit is set. 0
-                                            // The LOCKRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-
-#define FLASH_CTRL_FCIM_EMASK   0x00000004  // EEPROM Interrupt Mask Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ERIS bit is set. 0 The
-                                            // ERIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-#define FLASH_CTRL_FCIM_PMASK   0x00000002  // Programming Interrupt Mask This
-                                            // bit controls the reporting of the
-                                            // programming raw interrupt status
-                                            // to the interrupt controller.
-                                            // Value Description 1 An interrupt
-                                            // is sent to the interrupt
-                                            // controller when the PRIS bit is
-                                            // set. 0 The PRIS interrupt is
-                                            // suppressed and not sent to the
-                                            // interrupt controller.
-#define FLASH_CTRL_FCIM_AMASK   0x00000001  // Access Interrupt Mask This bit
-                                            // controls the reporting of the
-                                            // access raw interrupt status to
-                                            // the interrupt controller. Value
-                                            // Description 1 An interrupt is
-                                            // sent to the interrupt controller
-                                            // when the ARIS bit is set. 0 The
-                                            // ARIS interrupt is suppressed and
-                                            // not sent to the interrupt
-                                            // controller.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FCMISC register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FCMISC_ILLMISC \
-                                0x00004000  // Illegal Address Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled. Writing a
-                                            // 1 to this bit clears ILLAMISC and
-                                            // also the ILLARIS bit in the FCRIS
-                                            // register (see page 540). 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_PROGMISC \
-                                0x00002000  // PROGVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // PROGMISC and also the PROGRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_PREMISC \
-                                0x00001000  // PREVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // PREMISC and also the PRERIS bit
-                                            // in the FCRIS register . 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_ERMISC \
-                                0x00000800  // ERVER Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // ERMISC and also the ERRIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that an interrupt has
-                                            // not occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_INVDMISC \
-                                0x00000400  // Invalid Data Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled. Writing a
-                                            // 1 to this bit clears INVDMISC and
-                                            // also the INVDRIS bit in the FCRIS
-                                            // register (see page 540). 0 When
-                                            // read a 0 indicates that an
-                                            // interrupt has not occurred. A
-                                            // write of 0 has no effect on the
-                                            // state of this bit.
-
-#define FLASH_CTRL_FCMISC_VOLTMISC \
-                                0x00000200  // VOLT Masked Interrupt Status and
-                                            // Clear Value Description 1 When
-                                            // read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // VOLTMISC and also the VOLTRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_LOCKMISC \
-                                0x00000100  // LOCK Masked Interrupt Status and
-                                            // Clear Value Description 1 When
-                                            // read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // LOCKMISC and also the LOCKRIS bit
-                                            // in the FCRIS register (see page
-                                            // 540). 0 When read a 0 indicates
-                                            // that an interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-
-#define FLASH_CTRL_FCMISC_EMISC 0x00000004  // EEPROM Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled.
-                                            // Writing a 1 to this bit clears
-                                            // EMISC and also the ERIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that an interrupt has
-                                            // not occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-#define FLASH_CTRL_FCMISC_PMISC 0x00000002  // Programming Masked Interrupt
-                                            // Status and Clear Value
-                                            // Description 1 When read a 1
-                                            // indicates that an unmasked
-                                            // interrupt was signaled because a
-                                            // programming cycle completed.
-                                            // Writing a 1 to this bit clears
-                                            // PMISC and also the PRIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that a programming
-                                            // cycle complete interrupt has not
-                                            // occurred. A write of 0 has no
-                                            // effect on the state of this bit.
-#define FLASH_CTRL_FCMISC_AMISC 0x00000001  // Access Masked Interrupt Status
-                                            // and Clear Value Description 1
-                                            // When read a 1 indicates that an
-                                            // unmasked interrupt was signaled
-                                            // because a program or erase action
-                                            // was attempted on a block of Flash
-                                            // memory that contradicts the
-                                            // protection policy for that block
-                                            // as set in the FMPPEn registers.
-                                            // Writing a 1 to this bit clears
-                                            // AMISC and also the ARIS bit in
-                                            // the FCRIS register 0 When read a
-                                            // 0 indicates that no improper
-                                            // accesses have occurred. A write
-                                            // of 0 has no effect on the state
-                                            // of this bit.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FMC2 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FMC2_WRKEY_M 0xFFFF0000  // Flash Memory Write Key This
-                                            // field contains a write key which
-                                            // is used to minimize the incidence
-                                            // of accidental Flash memory
-                                            // writes. The value 0xA442 must be
-                                            // written into this field for a
-                                            // write to occur. Writes to the
-                                            // FMC2 register without this WRKEY
-                                            // value are ignored. A read of this
-                                            // field returns the value 0.
-#define FLASH_CTRL_FMC2_WRKEY_S 16
-#define FLASH_CTRL_FMC2_WRBUF   0x00000001  // Buffered Flash Memory Write This
-                                            // bit is used to start a buffered
-                                            // write to Flash memory. Value
-                                            // Description 1 Set this bit to
-                                            // write the data stored in the FWBn
-                                            // registers to the location
-                                            // specified by the contents of the
-                                            // FMA register. When read a 1
-                                            // indicates that the previous
-                                            // buffered Flash memory write
-                                            // access is not complete. 0 A write
-                                            // of 0 has no effect on the state
-                                            // of this bit. When read a 0
-                                            // indicates that the previous
-                                            // buffered Flash memory write
-                                            // access is complete.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWBVAL register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWBVAL_FWBN_M \
-                                0xFFFFFFFF  // Flash Memory Write Buffer Value
-                                            // Description 1 The corresponding
-                                            // FWBn register has been updated
-                                            // since the last buffer write
-                                            // operation and is ready to be
-                                            // written to Flash memory. 0 The
-                                            // corresponding FWBn register has
-                                            // no new data to be written. Bit 0
-                                            // corresponds to FWB0 offset 0x100
-                                            // and bit 31 corresponds to FWB31
-                                            // offset 0x13C.
-
-#define FLASH_CTRL_FWBVAL_FWBN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB1 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB1_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB1_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB2 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB2_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB2_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB3 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB3_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB3_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB4 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB4_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB4_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB5 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB5_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB5_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB6 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB6_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB6_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB7 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB7_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB7_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB8 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB8_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB8_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the FLASH_CTRL_O_FWB9 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB9_DATA_M  0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB9_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB10 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB10_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB10_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB11 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB11_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB11_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB12 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB12_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB12_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB13 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB13_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB13_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB14 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB14_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB14_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB15 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB15_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB15_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB16 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB16_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB16_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB17 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB17_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB17_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB18 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB18_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB18_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB19 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB19_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB19_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB20 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB20_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB20_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB21 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB21_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB21_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB22 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB22_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB22_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB23 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB23_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB23_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB24 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB24_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB24_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB25 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB25_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB25_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB26 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB26_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB26_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB27 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB27_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB27_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB28 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB28_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB28_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB29 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB29_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB29_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB30 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB30_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB30_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB31 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB31_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB31_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FWB32 register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FWB32_DATA_M 0xFFFFFFFF  // Data Data to be written into the
-                                            // Flash memory.
-#define FLASH_CTRL_FWB32_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_FSIZE register.
-//
-//******************************************************************************
-#define FLASH_CTRL_FSIZE_SIZE_M 0x0000FFFF  // Flash Size Indicates the size of
-                                            // the on-chip Flash memory. Value
-                                            // Description 0x0003 8 KB of Flash
-                                            // 0x0007 16 KB of Flash 0x000F 32
-                                            // KB of Flash 0x001F 64 KB of Flash
-                                            // 0x002F 96 KB of Flash 0x003F 128
-                                            // KB of Flash 0x005F 192 KB of
-                                            // Flash 0x007F 256 KB of Flash
-#define FLASH_CTRL_FSIZE_SIZE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// FLASH_CTRL_O_SSIZE register.
-//
-//******************************************************************************
-#define FLASH_CTRL_SSIZE_SRAM_SIZE_M \
-                                0x0000FFFF  // SRAM Size Indicates the size of
-                                            // the on-chip SRAM. Value
-                                            // Description 0x0007 2 KB of SRAM
-                                            // 0x000F 4 KB of SRAM 0x0017 6 KB
-                                            // of SRAM 0x001F 8 KB of SRAM
-                                            // 0x002F 12 KB of SRAM 0x003F 16 KB
-                                            // of SRAM 0x004F 20 KB of SRAM
-                                            // 0x005F 24 KB of SRAM 0x007F 32 KB
-                                            // of SRAM
-
-#define FLASH_CTRL_SSIZE_SRAM_SIZE_S 0
-#define FLASH_CTRL_FMC_WRKEY    0xA4420000  // FLASH write key
-#define FLASH_CTRL_FMC2_WRKEY   0xA4420000  // FLASH write key
-#define FLASH_CTRL_O_FWBN       FLASH_CTRL_O_FWB1
-#define FLASH_ERASE_SIZE        0x00000400
-#define FLASH_PROTECT_SIZE      0x00000800
-#define FLASH_FMP_BLOCK_0       0x00000001  // Enable for block 0
-
-#define FLASH_FMPRE0            0x400FE200  // Flash Memory Protection Read
-                                            // Enable 0
-#define FLASH_FMPRE1            0x400FE204  // Flash Memory Protection Read
-                                            // Enable 1
-#define FLASH_FMPRE2            0x400FE208  // Flash Memory Protection Read
-                                            // Enable 2
-#define FLASH_FMPRE3            0x400FE20C  // Flash Memory Protection Read
-                                            // Enable 3
-#define FLASH_FMPRE4            0x400FE210  // Flash Memory Protection Read
-                                            // Enable 4
-#define FLASH_FMPRE5            0x400FE214  // Flash Memory Protection Read
-                                            // Enable 5
-#define FLASH_FMPRE6            0x400FE218  // Flash Memory Protection Read
-                                            // Enable 6
-#define FLASH_FMPRE7            0x400FE21C  // Flash Memory Protection Read
-                                            // Enable 7
-#define FLASH_FMPRE8            0x400FE220  // Flash Memory Protection Read
-                                            // Enable 8
-#define FLASH_FMPRE9            0x400FE224  // Flash Memory Protection Read
-                                            // Enable 9
-#define FLASH_FMPRE10           0x400FE228  // Flash Memory Protection Read
-                                            // Enable 10
-#define FLASH_FMPRE11           0x400FE22C  // Flash Memory Protection Read
-                                            // Enable 11
-#define FLASH_FMPRE12           0x400FE230  // Flash Memory Protection Read
-                                            // Enable 12
-#define FLASH_FMPRE13           0x400FE234  // Flash Memory Protection Read
-                                            // Enable 13
-#define FLASH_FMPRE14           0x400FE238  // Flash Memory Protection Read
-                                            // Enable 14
-#define FLASH_FMPRE15           0x400FE23C  // Flash Memory Protection Read
-                                            // Enable 15
-
-#define FLASH_FMPPE0            0x400FE400  // Flash Memory Protection Program
-                                            // Enable 0
-#define FLASH_FMPPE1            0x400FE404  // Flash Memory Protection Program
-                                            // Enable 1
-#define FLASH_FMPPE2            0x400FE408  // Flash Memory Protection Program
-                                            // Enable 2
-#define FLASH_FMPPE3            0x400FE40C  // Flash Memory Protection Program
-                                            // Enable 3
-#define FLASH_FMPPE4            0x400FE410  // Flash Memory Protection Program
-                                            // Enable 4
-#define FLASH_FMPPE5            0x400FE414  // Flash Memory Protection Program
-                                            // Enable 5
-#define FLASH_FMPPE6            0x400FE418  // Flash Memory Protection Program
-                                            // Enable 6
-#define FLASH_FMPPE7            0x400FE41C  // Flash Memory Protection Program
-                                            // Enable 7
-#define FLASH_FMPPE8            0x400FE420  // Flash Memory Protection Program
-                                            // Enable 8
-#define FLASH_FMPPE9            0x400FE424  // Flash Memory Protection Program
-                                            // Enable 9
-#define FLASH_FMPPE10           0x400FE428  // Flash Memory Protection Program
-                                            // Enable 10
-#define FLASH_FMPPE11           0x400FE42C  // Flash Memory Protection Program
-                                            // Enable 11
-#define FLASH_FMPPE12           0x400FE430  // Flash Memory Protection Program
-                                            // Enable 12
-#define FLASH_FMPPE13           0x400FE434  // Flash Memory Protection Program
-                                            // Enable 13
-#define FLASH_FMPPE14           0x400FE438  // Flash Memory Protection Program
-                                            // Enable 14
-#define FLASH_FMPPE15           0x400FE43C  // Flash Memory Protection Program
-                                            // Enable 15
-
-#define FLASH_USECRL            0x400FE140  // USec Reload
-#define FLASH_CTRL_ERASE_SIZE   0x00000400
-
-
-#endif // __HW_FLASH_CTRL_H__
diff --git a/ports/cc3200/hal/inc/hw_gpio.h b/ports/cc3200/hal/inc/hw_gpio.h
deleted file mode 100644
index 2bd6e0f3aed93..0000000000000
--- a/ports/cc3200/hal/inc/hw_gpio.h
+++ /dev/null
@@ -1,1349 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_GPIO_H__
-#define __HW_GPIO_H__
-
-//*****************************************************************************
-//
-// The following are defines for the GPIO register offsets.
-//
-//*****************************************************************************
-#define GPIO_O_GPIO_DATA        0x00000000  // 0x4000 5000 0x4000 6000 0x4000
-                                            // 7000 0x4002 4000 GPIO Data
-                                            // (GPIODATA)@@ offset 0x000 The
-                                            // GPIODATA register is the data
-                                            // register. In software control
-                                            // mode@@ values written in the
-                                            // GPIODATA register are transferred
-                                            // onto the GPIO port pins if the
-                                            // respective pins have been
-                                            // configured as outputs through the
-                                            // GPIO Direction (GPIODIR) register
-                                            // (see page 653). In order to write
-                                            // to GPIODATA@@ the corresponding
-                                            // bits in the mask@@ resulting from
-                                            // the address bus bits [9:2]@@ must
-                                            // be set. Otherwise@@ the bit
-                                            // values remain unchanged by the
-                                            // write. Similarly@@ the values
-                                            // read from this register are
-                                            // determined for each bit by the
-                                            // mask bit derived from the address
-                                            // used to access the data
-                                            // register@@ bits [9:2]. Bits that
-                                            // are set in the address mask cause
-                                            // the corresponding bits in
-                                            // GPIODATA to be read@@ and bits
-                                            // that are clear in the address
-                                            // mask cause the corresponding bits
-                                            // in GPIODATA to be read as 0@@
-                                            // regardless of their value. A read
-                                            // from GPIODATA returns the last
-                                            // bit value written if the
-                                            // respective pins are configured as
-                                            // outputs@@ or it returns the value
-                                            // on the corresponding input pin
-                                            // when these are configured as
-                                            // inputs. All bits are cleared by a
-                                            // reset.
-#define GPIO_O_GPIO_DIR         0x00000400  // 0x4000 5400 0x4000 6400 0x4000
-                                            // 7400 0x4002 4400 GPIO Direction
-                                            // (GPIODIR)@@ offset 0x400 The
-                                            // GPIODIR register is the data
-                                            // direction register. Setting a bit
-                                            // in the GPIODIR register
-                                            // configures the corresponding pin
-                                            // to be an output@@ while clearing
-                                            // a bit configures the
-                                            // corresponding pin to be an input.
-                                            // All bits are cleared by a reset@@
-                                            // meaning all GPIO pins are inputs
-                                            // by default.
-#define GPIO_O_GPIO_IS          0x00000404  // 0x4000 5404 0x4000 6404 0x4000
-                                            // 7404 0x4002 4404 GPIO Interrupt
-                                            // Sense (GPIOIS)@@ offset 0x404 The
-                                            // GPIOIS register is the interrupt
-                                            // sense register. Setting a bit in
-                                            // the GPIOIS register configures
-                                            // the corresponding pin to detect
-                                            // levels@@ while clearing a bit
-                                            // configures the corresponding pin
-                                            // to detect edges. All bits are
-                                            // cleared by a reset.
-#define GPIO_O_GPIO_IBE         0x00000408  // 0x4000 5408 0x4000 6408 0x4000
-                                            // 7408 0x4002 4408 GPIO Interrupt
-                                            // Both Edges (GPIOIBE)@@ offset
-                                            // 0x408 The GPIOIBE register allows
-                                            // both edges to cause interrupts.
-                                            // When the corresponding bit in the
-                                            // GPIO Interrupt Sense (GPIOIS)
-                                            // register is set to detect edges@@
-                                            // setting a bit in the GPIOIBE
-                                            // register configures the
-                                            // corresponding pin to detect both
-                                            // rising and falling edges@@
-                                            // regardless of the corresponding
-                                            // bit in the GPIO Interrupt Event
-                                            // (GPIOIEV) register . Clearing a
-                                            // bit configures the pin to be
-                                            // controlled by the GPIOIEV
-                                            // register. All bits are cleared by
-                                            // a reset.
-#define GPIO_O_GPIO_IEV         0x0000040C  // 0x4000 540C 0x4000 640C 0x4000
-                                            // 740C 0x4002 440C GPIO Interrupt
-                                            // Event (GPIOIEV)@@ offset 0x40C
-                                            // The GPIOIEV register is the
-                                            // interrupt event register. Setting
-                                            // a bit in the GPIOIEV register
-                                            // configures the corresponding pin
-                                            // to detect rising edges or high
-                                            // levels@@ depending on the
-                                            // corresponding bit value in the
-                                            // GPIO Interrupt Sense (GPIOIS)
-                                            // register . Clearing a bit
-                                            // configures the pin to detect
-                                            // falling edges or low levels@@
-                                            // depending on the corresponding
-                                            // bit value in the GPIOIS register.
-                                            // All bits are cleared by a reset.
-#define GPIO_O_GPIO_IM          0x00000410  // 0x4000 5410 0x4000 6410 0x4000
-                                            // 7410 0x4002 4410 GPIO Interrupt
-                                            // Mask (GPIOIM)@@ offset 0x410 The
-                                            // GPIOIM register is the interrupt
-                                            // mask register. Setting a bit in
-                                            // the GPIOIM register allows
-                                            // interrupts that are generated by
-                                            // the corresponding pin to be sent
-                                            // to the interrupt controller on
-                                            // the combined interrupt signal.
-                                            // Clearing a bit prevents an
-                                            // interrupt on the corresponding
-                                            // pin from being sent to the
-                                            // interrupt controller. All bits
-                                            // are cleared by a reset.
-#define GPIO_O_GPIO_RIS         0x00000414  // 0x4000 5414 0x4000 6414 0x4000
-                                            // 7414 0x4002 4414 GPIO Raw
-                                            // Interrupt Status (GPIORIS)@@
-                                            // offset 0x414 The GPIORIS register
-                                            // is the raw interrupt status
-                                            // register. A bit in this register
-                                            // is set when an interrupt
-                                            // condition occurs on the
-                                            // corresponding GPIO pin. If the
-                                            // corresponding bit in the GPIO
-                                            // Interrupt Mask (GPIOIM) register
-                                            // is set@@ the interrupt is sent to
-                                            // the interrupt controller. Bits
-                                            // read as zero indicate that
-                                            // corresponding input pins have not
-                                            // initiated an interrupt. A bit in
-                                            // this register can be cleared by
-                                            // writing a 1 to the corresponding
-                                            // bit in the GPIO Interrupt Clear
-                                            // (GPIOICR) register.
-#define GPIO_O_GPIO_MIS         0x00000418  // 0x4000 5418 0x4000 6418 0x4000
-                                            // 7418 0x4002 4418 GPIO Masked
-                                            // Interrupt Status (GPIOMIS)@@
-                                            // offset 0x418 The GPIOMIS register
-                                            // is the masked interrupt status
-                                            // register. If a bit is set in this
-                                            // register@@ the corresponding
-                                            // interrupt has triggered an
-                                            // interrupt to the interrupt
-                                            // controller. If a bit is clear@@
-                                            // either no interrupt has been
-                                            // generated@@ or the interrupt is
-                                            // masked. If no port pin@@ other
-                                            // than the one that is being used
-                                            // as an ADC trigger@@ is being used
-                                            // to generate interrupts@@ the
-                                            // appropriate Interrupt Set Enable
-                                            // (ENn) register can disable the
-                                            // interrupts for the port@@ and the
-                                            // ADC interrupt can be used to read
-                                            // back the converted data.
-                                            // Otherwise@@ the port interrupt
-                                            // handler must ignore and clear
-                                            // interrupts on the port pin and
-                                            // wait for the ADC interrupt@@ or
-                                            // the ADC interrupt must be
-                                            // disabled in the EN0 register and
-                                            // the port interrupt handler must
-                                            // poll the ADC registers until the
-                                            // conversion is completed. If no
-                                            // port pin@@ other than the one
-                                            // that is being used as an ADC
-                                            // trigger@@ is being used to
-                                            // generate interrupts@@ the
-                                            // appropriate Interrupt Set Enable
-                                            // (ENn) register can disable the
-                                            // interrupts for the port@@ and the
-                                            // ADC interrupt can be used to read
-                                            // back the converted data.
-                                            // Otherwise@@ the port interrupt
-                                            // handler must ignore and clear
-                                            // interrupts on the port pin and
-                                            // wait for the ADC interrupt@@ or
-                                            // the ADC interrupt must be
-                                            // disabled in the EN0 register and
-                                            // the port interrupt handler must
-                                            // poll the ADC registers until the
-                                            // conversion is completed. Note
-                                            // that if the Port B GPIOADCCTL
-                                            // register is cleared@@ PB4 can
-                                            // still be used as an external
-                                            // trigger for the ADC. This is a
-                                            // legacy mode which allows code
-                                            // written for previous Stellaris
-                                            // devices to operate on this
-                                            // microcontroller. GPIOMIS is the
-                                            // state of the interrupt after
-                                            // masking.
-#define GPIO_O_GPIO_ICR         0x0000041C  // 0x4000 541C 0x4000 641C 0x4000
-                                            // 741C 0x4002 441C GPIO Interrupt
-                                            // Clear (GPIOICR)@@ offset 0x41C
-                                            // The GPIOICR register is the
-                                            // interrupt clear register. Writing
-                                            // a 1 to a bit in this register
-                                            // clears the corresponding
-                                            // interrupt bit in the GPIORIS and
-                                            // GPIOMIS registers. Writing a 0
-                                            // has no effect.
-#define GPIO_O_GPIO_AFSEL       0x00000420  // 0x4000 5420 0x4000 6420 0x4000
-                                            // 7420 0x4002 4420 GPIO Alternate
-                                            // Function Select (GPIOAFSEL)@@
-                                            // offset 0x420 The GPIOAFSEL
-                                            // register is the mode control
-                                            // select register. If a bit is
-                                            // clear@@ the pin is used as a GPIO
-                                            // and is controlled by the GPIO
-                                            // registers. Setting a bit in this
-                                            // register configures the
-                                            // corresponding GPIO line to be
-                                            // controlled by an associated
-                                            // peripheral. Several possible
-                                            // peripheral functions are
-                                            // multiplexed on each GPIO. The
-                                            // GPIO Port Control (GPIOPCTL)
-                                            // register is used to select one of
-                                            // the possible functions.
-#define GPIO_O_GPIO_DR2R        0x00000500  // 0x4000 5500 0x4000 6500 0x4000
-                                            // 7500 0x4002 4500 GPIO 2-mA Drive
-                                            // Select (GPIODR2R)@@ offset 0x500
-                                            // The GPIODR2R register is the 2-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV2 bit for a GPIO
-                                            // signal@@ the corresponding DRV4
-                                            // bit in the GPIODR4R register and
-                                            // DRV8 bit in the GPIODR8R register
-                                            // are automatically cleared by
-                                            // hardware. By default@@ all GPIO
-                                            // pins have 2-mA drive.
-#define GPIO_O_GPIO_DR4R        0x00000504  // 0x4000 5504 0x4000 6504 0x4000
-                                            // 7504 0x4002 4504 GPIO 4-mA Drive
-                                            // Select (GPIODR4R)@@ offset 0x504
-                                            // The GPIODR4R register is the 4-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV4 bit for a GPIO
-                                            // signal@@ the corresponding DRV2
-                                            // bit in the GPIODR2R register and
-                                            // DRV8 bit in the GPIODR8R register
-                                            // are automatically cleared by
-                                            // hardware.
-#define GPIO_O_GPIO_DR8R        0x00000508  // 0x4000 5508 0x4000 6508 0x4000
-                                            // 7508 0x4002 4508 GPIO 8-mA Drive
-                                            // Select (GPIODR8R)@@ offset 0x508
-                                            // The GPIODR8R register is the 8-mA
-                                            // drive control register. Each GPIO
-                                            // signal in the port can be
-                                            // individually configured without
-                                            // affecting the other pads. When
-                                            // setting the DRV8 bit for a GPIO
-                                            // signal@@ the corresponding DRV2
-                                            // bit in the GPIODR2R register and
-                                            // DRV4 bit in the GPIODR4R register
-                                            // are automatically cleared by
-                                            // hardware. The 8-mA setting is
-                                            // also used for high-current
-                                            // operation. Note: There is no
-                                            // configuration difference between
-                                            // 8-mA and high-current operation.
-                                            // The additional current capacity
-                                            // results from a shift in the
-                                            // VOH/VOL levels.
-#define GPIO_O_GPIO_ODR         0x0000050C  // 0x4000 550C 0x4000 650C 0x4000
-                                            // 750C 0x4002 450C GPIO Open Drain
-                                            // Select (GPIOODR)@@ offset 0x50C
-                                            // The GPIOODR register is the open
-                                            // drain control register. Setting a
-                                            // bit in this register enables the
-                                            // open-drain configuration of the
-                                            // corresponding GPIO pad. When
-                                            // open-drain mode is enabled@@ the
-                                            // corresponding bit should also be
-                                            // set in the GPIO Digital Input
-                                            // Enable (GPIODEN) register .
-                                            // Corresponding bits in the drive
-                                            // strength and slew rate control
-                                            // registers (GPIODR2R@@ GPIODR4R@@
-                                            // GPIODR8R@@ and GPIOSLR) can be
-                                            // set to achieve the desired rise
-                                            // and fall times. The GPIO acts as
-                                            // an open-drain input if the
-                                            // corresponding bit in the GPIODIR
-                                            // register is cleared. If open
-                                            // drain is selected while the GPIO
-                                            // is configured as an input@@ the
-                                            // GPIO will remain an input and the
-                                            // open-drain selection has no
-                                            // effect until the GPIO is changed
-                                            // to an output. When using the I2C
-                                            // module@@ in addition to
-                                            // configuring the pin to open
-                                            // drain@@ the GPIO Alternate
-                                            // Function Select (GPIOAFSEL)
-                                            // register bits for the I2C clock
-                                            // and data pins should be set
-#define GPIO_O_GPIO_PUR         0x00000510  // 0x4000 5510 0x4000 6510 0x4000
-                                            // 7510 0x4002 4510 GPIO Pull-Up
-                                            // Select (GPIOPUR)@@ offset 0x510
-                                            // The GPIOPUR register is the
-                                            // pull-up control register. When a
-                                            // bit is set@@ a weak pull-up
-                                            // resistor on the corresponding
-                                            // GPIO signal is enabled. Setting a
-                                            // bit in GPIOPUR automatically
-                                            // clears the corresponding bit in
-                                            // the GPIO Pull-Down Select
-                                            // (GPIOPDR) register . Write access
-                                            // to this register is protected
-                                            // with the GPIOCR register. Bits in
-                                            // GPIOCR that are cleared prevent
-                                            // writes to the equivalent bit in
-                                            // this register.
-#define GPIO_O_GPIO_PDR         0x00000514  // 0x4000 5514 0x4000 6514 0x4000
-                                            // 7514 0x4002 4514 GPIO Pull-Down
-                                            // Select (GPIOPDR)@@ offset 0x514
-                                            // The GPIOPDR register is the
-                                            // pull-down control register. When
-                                            // a bit is set@@ a weak pull-down
-                                            // resistor on the corresponding
-                                            // GPIO signal is enabled. Setting a
-                                            // bit in GPIOPDR automatically
-                                            // clears the corresponding bit in
-                                            // the GPIO Pull-Up Select (GPIOPUR)
-                                            // register
-#define GPIO_O_GPIO_SLR         0x00000518  // 0x4000 5518 0x4000 6518 0x4000
-                                            // 7518 0x4002 4518 The GPIOSLR
-                                            // register is the slew rate control
-                                            // register. Slew rate control is
-                                            // only available when using the
-                                            // 8-mA drive strength option via
-                                            // the GPIO 8-mA Drive Select
-                                            // (GPIODR8R) register
-#define GPIO_O_GPIO_DEN         0x0000051C  // 0x4000 551C 0x4000 651C 0x4000
-                                            // 751C 0x4002 451C GPIO Digital
-                                            // Enable (GPIODEN)@@ offset 0x51C
-                                            // Note: Pins configured as digital
-                                            // inputs are Schmitt-triggered. The
-                                            // GPIODEN register is the digital
-                                            // enable register. By default@@ all
-                                            // GPIO signals except those listed
-                                            // below are configured out of reset
-                                            // to be undriven (tristate). Their
-                                            // digital function is disabled;
-                                            // they do not drive a logic value
-                                            // on the pin and they do not allow
-                                            // the pin voltage into the GPIO
-                                            // receiver. To use the pin as a
-                                            // digital input or output (either
-                                            // GPIO or alternate function)@@ the
-                                            // corresponding GPIODEN bit must be
-                                            // set.
-#define GPIO_O_GPIO_LOCK        0x00000520  // 0x4000 5520 0x4000 6520 0x4000
-                                            // 7520 0x4002 4520 GPIO Lock
-                                            // (GPIOLOCK)@@ offset 0x520 The
-                                            // GPIOLOCK register enables write
-                                            // access to the GPIOCR register .
-                                            // Writing 0x4C4F.434B to the
-                                            // GPIOLOCK register unlocks the
-                                            // GPIOCR register. Writing any
-                                            // other value to the GPIOLOCK
-                                            // register re-enables the locked
-                                            // state. Reading the GPIOLOCK
-                                            // register returns the lock status
-                                            // rather than the 32-bit value that
-                                            // was previously written.
-                                            // Therefore@@ when write accesses
-                                            // are disabled@@ or locked@@
-                                            // reading the GPIOLOCK register
-                                            // returns 0x0000.0001. When write
-                                            // accesses are enabled@@ or
-                                            // unlocked@@ reading the GPIOLOCK
-                                            // register returns 0x0000.0000.
-#define GPIO_O_GPIO_CR          0x00000524  // 0x4000 5524 0x4000 6524 0x4000
-                                            // 7524 0x4002 4524 GPIO Commit
-                                            // (GPIOCR)@@ offset 0x524 The
-                                            // GPIOCR register is the commit
-                                            // register. The value of the GPIOCR
-                                            // register determines which bits of
-                                            // the GPIOAFSEL@@ GPIOPUR@@
-                                            // GPIOPDR@@ and GPIODEN registers
-                                            // are committed when a write to
-                                            // these registers is performed. If
-                                            // a bit in the GPIOCR register is
-                                            // cleared@@ the data being written
-                                            // to the corresponding bit in the
-                                            // GPIOAFSEL@@ GPIOPUR@@ GPIOPDR@@
-                                            // or GPIODEN registers cannot be
-                                            // committed and retains its
-                                            // previous value. If a bit in the
-                                            // GPIOCR register is set@@ the data
-                                            // being written to the
-                                            // corresponding bit of the
-                                            // GPIOAFSEL@@ GPIOPUR@@ GPIOPDR@@
-                                            // or GPIODEN registers is committed
-                                            // to the register and reflects the
-                                            // new value. The contents of the
-                                            // GPIOCR register can only be
-                                            // modified if the status in the
-                                            // GPIOLOCK register is unlocked.
-                                            // Writes to the GPIOCR register are
-                                            // ignored if the status in the
-                                            // GPIOLOCK register is locked.
-#define GPIO_O_GPIO_AMSEL       0x00000528  // 0x4000 5528 0x4000 6528 0x4000
-                                            // 7528 0x4002 4528 The GPIOAMSEL
-                                            // register controls isolation
-                                            // circuits to the analog side of a
-                                            // unified I/O pad. Because the
-                                            // GPIOs may be driven by a 5-V
-                                            // source and affect analog
-                                            // operation@@ analog circuitry
-                                            // requires isolation from the pins
-                                            // when they are not used in their
-                                            // analog function. Each bit of this
-                                            // register controls the isolation
-                                            // circuitry for the corresponding
-                                            // GPIO signal.
-#define GPIO_O_GPIO_PCTL        0x0000052C  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) 0x4000 552C
-                                            // 0x4000 652C 0x4000 752C 0x4002
-                                            // 452C GPIO Port Control
-                                            // (GPIOPCTL)@@ offset 0x52C The
-                                            // GPIOPCTL register is used in
-                                            // conjunction with the GPIOAFSEL
-                                            // register and selects the specific
-                                            // peripheral signal for each GPIO
-                                            // pin when using the alternate
-                                            // function mode. Most bits in the
-                                            // GPIOAFSEL register are cleared on
-                                            // reset@@ therefore most GPIO pins
-                                            // are configured as GPIOs by
-                                            // default. When a bit is set in the
-                                            // GPIOAFSEL register@@ the
-                                            // corresponding GPIO signal is
-                                            // controlled by an associated
-                                            // peripheral. The GPIOPCTL register
-                                            // selects one out of a set of
-                                            // peripheral functions for each
-                                            // GPIO@@ providing additional
-                                            // flexibility in signal definition.
-#define GPIO_O_GPIO_ADCCTL      0x00000530  // This register is not used in
-                                            // cc3xx. ADC trigger via GPIO is
-                                            // not supported. 0x4000 5530 0x4000
-                                            // 6530 0x4000 7530 0x4002 4530 GPIO
-                                            // ADC Control (GPIOADCCTL)@@ offset
-                                            // 0x530 This register is used to
-                                            // configure a GPIO pin as a source
-                                            // for the ADC trigger. Note that if
-                                            // the Port B GPIOADCCTL register is
-                                            // cleared@@ PB4 can still be used
-                                            // as an external trigger for the
-                                            // ADC. This is a legacy mode which
-                                            // allows code written for previous
-                                            // Stellaris devices to operate on
-                                            // this microcontroller.
-#define GPIO_O_GPIO_DMACTL      0x00000534  // 0x4000 5534 0x4000 6534 0x4000
-                                            // 7534 0x4002 4534 GPIO DMA Control
-                                            // (GPIODMACTL)@@ offset 0x534 This
-                                            // register is used to configure a
-                                            // GPIO pin as a source for the ?DMA
-                                            // trigger.
-#define GPIO_O_GPIO_SI          0x00000538  // 0x4000 5538 0x4000 6538 0x4000
-                                            // 7538 0x4002 4538 GPIO Select
-                                            // Interrupt (GPIOSI)@@ offset 0x538
-                                            // This register is used to enable
-                                            // individual interrupts for each
-                                            // pin. Note: This register is only
-                                            // available on Port P and Port Q.
-#define GPIO_O_GPIO_PERIPHID4   0x00000FD0  // 0x4000 5FD0 0x4000 6FD0 0x4000
-                                            // 7FD0 0x4002 4FD0 GPIO Peripheral
-                                            // Identification 4
-                                            // (GPIOPeriphID4)@@ offset 0xFD0
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID5   0x00000FD4  // 0x4000 5FD4 0x4000 6FD4 0x4000
-                                            // 7FD4 0x4002 4FD4 GPIO Peripheral
-                                            // Identification 5
-                                            // (GPIOPeriphID5)@@ offset 0xFD4
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID6   0x00000FD8  // 0x4000 5FD8 0x4000 6FD8 0x4000
-                                            // 7FD8 0x4002 4FD8 GPIO Peripheral
-                                            // Identification 6
-                                            // (GPIOPeriphID6)@@ offset 0xFD8
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID7   0x00000FDC  // 0x4000 5FDC 0x4000 6FDC 0x4000
-                                            // 7FDC 0x4002 4FDC GPIO Peripheral
-                                            // Identification 7
-                                            // (GPIOPeriphID7)@@ offset 0xFDC
-                                            // The GPIOPeriphID4@@
-                                            // GPIOPeriphID5@@ GPIOPeriphID6@@
-                                            // and GPIOPeriphID7 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID0   0x00000FE0  // 0x4000 5FE0 0x4000 6FE0 0x4000
-                                            // 7FE0 0x4002 4FE0 GPIO Peripheral
-                                            // Identification 0
-                                            // (GPIOPeriphID0)@@ offset 0xFE0
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID1   0x00000FE4  // 0x4000 5FE4 0x4000 6FE4 0x4000
-                                            // 7FE4 0x4002 4FE4 GPIO Peripheral
-                                            // Identification 1
-                                            // (GPIOPeriphID1)@@ offset 0xFE4
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID2   0x00000FE8  // 0x4000 5FE8 0x4000 6FE8 0x4000
-                                            // 7FE8 0x4002 4FE8 GPIO Peripheral
-                                            // Identification 2
-                                            // (GPIOPeriphID2)@@ offset 0xFE8
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PERIPHID3   0x00000FEC  // 0x4000 5FEC 0x4000 6FEC 0x4000
-                                            // 7FEC 0x4002 4FEC GPIO Peripheral
-                                            // Identification 3
-                                            // (GPIOPeriphID3)@@ offset 0xFEC
-                                            // The GPIOPeriphID0@@
-                                            // GPIOPeriphID1@@ GPIOPeriphID2@@
-                                            // and GPIOPeriphID3 registers can
-                                            // conceptually be treated as one
-                                            // 32-bit register; each register
-                                            // contains eight bits of the 32-bit
-                                            // register@@ used by software to
-                                            // identify the peripheral.
-#define GPIO_O_GPIO_PCELLID0    0x00000FF0  // 0x4000 5FF0 0x4000 6FF0 0x4000
-                                            // 7FF0 0x4002 4FF0 GPIO PrimeCell
-                                            // Identification 0 (GPIOPCellID0)@@
-                                            // offset 0xFF0 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID1    0x00000FF4  // 0x4000 5FF4 0x4000 6FF4 0x4000
-                                            // 7FF4 0x4002 4FF4 GPIO PrimeCell
-                                            // Identification 1 (GPIOPCellID1)@@
-                                            // offset 0xFF4 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID2    0x00000FF8  // 0x4000 5FF8 0x4000 6FF8 0x4000
-                                            // 7FF8 0x4002 4FF8 GPIO PrimeCell
-                                            // Identification 2 (GPIOPCellID2)@@
-                                            // offset 0xFF8 The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.
-#define GPIO_O_GPIO_PCELLID3    0x00000FFC  // 0x4000 5FFC 0x4000 6FFC 0x4000
-                                            // 7FFC 0x4002 4FFC GPIO PrimeCell
-                                            // Identification 3 (GPIOPCellID3)@@
-                                            // offset 0xFFC The GPIOPCellID0@@
-                                            // GPIOPCellID1@@ GPIOPCellID2@@ and
-                                            // GPIOPCellID3 registers are four
-                                            // 8-bit wide registers@@ that can
-                                            // conceptually be treated as one
-                                            // 32-bit register. The register is
-                                            // used as a standard
-                                            // cross-peripheral identification
-                                            // system.0xb1
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DATA register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DATA_DATA_M   0x000000FF  // GPIO Data This register is
-                                            // virtually mapped to 256 locations
-                                            // in the address space. To
-                                            // facilitate the reading and
-                                            // writing of data to these
-                                            // registers by independent
-                                            // drivers@@ the data read from and
-                                            // written to the registers are
-                                            // masked by the eight address lines
-                                            // [9:2]. Reads from this register
-                                            // return its current state. Writes
-                                            // to this register only affect bits
-                                            // that are not masked by ADDR[9:2]
-                                            // and are configured as outputs.
-#define GPIO_GPIO_DATA_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DIR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DIR_DIR_M     0x000000FF  // GPIO Data Direction Value
-                                            // Description 0 Corresponding pin
-                                            // is an input. 1 Corresponding pins
-                                            // is an output.
-#define GPIO_GPIO_DIR_DIR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IS_IS_M       0x000000FF  // GPIO Interrupt Sense Value
-                                            // Description 0 The edge on the
-                                            // corresponding pin is detected
-                                            // (edge-sensitive). 1 The level on
-                                            // the corresponding pin is detected
-                                            // (level-sensitive).
-#define GPIO_GPIO_IS_IS_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IBE register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IBE_IBE_M     0x000000FF  // GPIO Interrupt Both Edges Value
-                                            // Description 0 Interrupt
-                                            // generation is controlled by the
-                                            // GPIO Interrupt Event (GPIOIEV)
-                                            // register. 1 Both edges on the
-                                            // corresponding pin trigger an
-                                            // interrupt.
-#define GPIO_GPIO_IBE_IBE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IEV register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IEV_IEV_M     0x000000FF  // GPIO Interrupt Event Value
-                                            // Description 1 A falling edge or a
-                                            // Low level on the corresponding
-                                            // pin triggers an interrupt. 0 A
-                                            // rising edge or a High level on
-                                            // the corresponding pin triggers an
-                                            // interrupt.
-#define GPIO_GPIO_IEV_IEV_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_IM register.
-//
-//******************************************************************************
-#define GPIO_GPIO_IM_IME_M      0x000000FF  // GPIO Interrupt Mask Enable Value
-                                            // Description 0 The interrupt from
-                                            // the corresponding pin is masked.
-                                            // 1 The interrupt from the
-                                            // corresponding pin is sent to the
-                                            // interrupt controller.
-#define GPIO_GPIO_IM_IME_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_RIS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_RIS_RIS_M     0x000000FF  // GPIO Interrupt Raw Status Value
-                                            // Description 1 An interrupt
-                                            // condition has occurred on the
-                                            // corresponding pin. 0 interrupt
-                                            // condition has not occurred on the
-                                            // corresponding pin. A bit is
-                                            // cleared by writing a 1 to the
-                                            // corresponding bit in the GPIOICR
-                                            // register.
-#define GPIO_GPIO_RIS_RIS_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_MIS register.
-//
-//******************************************************************************
-#define GPIO_GPIO_MIS_MIS_M     0x000000FF  // GPIO Masked Interrupt Status
-                                            // Value Description 1 An interrupt
-                                            // condition on the corresponding
-                                            // pin has triggered an interrupt to
-                                            // the interrupt controller. 0 An
-                                            // interrupt condition on the
-                                            // corresponding pin is masked or
-                                            // has not occurred. A bit is
-                                            // cleared by writing a 1 to the
-                                            // corresponding bit in the GPIOICR
-                                            // register.
-#define GPIO_GPIO_MIS_MIS_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_ICR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ICR_IC_M      0x000000FF  // GPIO Interrupt Clear Value
-                                            // Description 1 The corresponding
-                                            // interrupt is cleared. 0 The
-                                            // corresponding interrupt is
-                                            // unaffected.
-#define GPIO_GPIO_ICR_IC_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_AFSEL register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR2R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR2R_DRV2_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 2-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 2-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR4R
-                                            // or GPIODR8R register. 0 Setting a
-                                            // bit in either the GPIODR4
-                                            // register or the GPIODR8 register
-                                            // clears the corresponding 2-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR2R_DRV2_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR4R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR4R_DRV4_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 4-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 4-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR2R
-                                            // or GPIODR8R register. 0 Setting a
-                                            // bit in either the GPIODR2
-                                            // register or the GPIODR8 register
-                                            // clears the corresponding 4-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR4R_DRV4_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DR8R register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DR8R_DRV8_M   0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // 8-mA Drive Enable Value
-                                            // Description 1 The corresponding
-                                            // GPIO pin has 8-mA drive. The
-                                            // drive for the corresponding GPIO
-                                            // pin is controlled by the GPIODR2R
-                                            // or GPIODR4R register. 0 Setting a
-                                            // bit in either the GPIODR2
-                                            // register or the GPIODR4 register
-                                            // clears the corresponding 8-mA
-                                            // enable bit. The change is
-                                            // effective on the second clock
-                                            // cycle after the write if
-                                            // accessing GPIO via the APB memory
-                                            // aperture. If using AHB access@@
-                                            // the change is effective on the
-                                            // next clock cycle.
-#define GPIO_GPIO_DR8R_DRV8_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_ODR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ODR_ODE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Output Pad
-                                            // Open Drain Enable Value
-                                            // Description 1 The corresponding
-                                            // pin is configured as open drain.
-                                            // 0 The corresponding pin is not
-                                            // configured as open drain.
-#define GPIO_GPIO_ODR_ODE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PUR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PUR_PUE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Pad Weak
-                                            // Pull-Up Enable Value Description
-                                            // 1 The corresponding pin has a
-                                            // weak pull-up resistor. 0 The
-                                            // corresponding pin is not
-                                            // affected. Setting a bit in the
-                                            // GPIOPDR register clears the
-                                            // corresponding bit in the GPIOPUR
-                                            // register. The change is effective
-                                            // on the second clock cycle after
-                                            // the write if accessing GPIO via
-                                            // the APB memory aperture. If using
-                                            // AHB access@@ the change is
-                                            // effective on the next clock
-                                            // cycle.
-#define GPIO_GPIO_PUR_PUE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PDR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PDR_PDE_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Pad Weak
-                                            // Pull-Down Enable Value
-                                            // Description 1 The corresponding
-                                            // pin has a weak pull-down
-                                            // resistor. 0 The corresponding pin
-                                            // is not affected. Setting a bit in
-                                            // the GPIOPUR register clears the
-                                            // corresponding bit in the GPIOPDR
-                                            // register. The change is effective
-                                            // on the second clock cycle after
-                                            // the write if accessing GPIO via
-                                            // the APB memory aperture. If using
-                                            // AHB access@@ the change is
-                                            // effective on the next clock
-                                            // cycle.
-#define GPIO_GPIO_PDR_PDE_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_SLR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_SLR_SRL_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Slew Rate
-                                            // Limit Enable (8-mA drive only)
-                                            // Value Description 1 Slew rate
-                                            // control is enabled for the
-                                            // corresponding pin. 0 Slew rate
-                                            // control is disabled for the
-                                            // corresponding pin.
-#define GPIO_GPIO_SLR_SRL_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_DEN register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DEN_DEN_M     0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Digital Enable
-                                            // Value Description 0 The digital
-                                            // functions for the corresponding
-                                            // pin are disabled. 1 The digital
-                                            // functions for the corresponding
-                                            // pin are enabled.
-#define GPIO_GPIO_DEN_DEN_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_LOCK register.
-//
-//******************************************************************************
-#define GPIO_GPIO_LOCK_LOCK_M   0xFFFFFFFF  // This register is not used in
-                                            // cc3xx. GPIO Lock A write of the
-                                            // value 0x4C4F.434B unlocks the
-                                            // GPIO Commit (GPIOCR) register for
-                                            // write access.A write of any other
-                                            // value or a write to the GPIOCR
-                                            // register reapplies the lock@@
-                                            // preventing any register updates.
-                                            // A read of this register returns
-                                            // the following values: Value
-                                            // Description 0x1 The GPIOCR
-                                            // register is locked and may not be
-                                            // modified. 0x0 The GPIOCR register
-                                            // is unlocked and may be modified.
-#define GPIO_GPIO_LOCK_LOCK_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_CR register.
-//
-//******************************************************************************
-#define GPIO_GPIO_CR_CR_M       0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) GPIO Commit
-                                            // Value Description The
-                                            // corresponding GPIOAFSEL@@
-                                            // GPIOPUR@@ GPIOPDR@@ or GPIODEN
-                                            // bits can be written. 1 The
-                                            // corresponding GPIOAFSEL@@
-                                            // GPIOPUR@@ GPIOPDR@@ or GPIODEN
-                                            // bits cannot be written. 0 Note:
-                                            // The default register type for the
-                                            // GPIOCR register is RO for all
-                                            // GPIO pins with the exception of
-                                            // the NMI pin and the four JTAG/SWD
-                                            // pins (PD7@@ PF0@@ and PC[3:0]).
-                                            // These six pins are the only GPIOs
-                                            // that are protected by the GPIOCR
-                                            // register. Because of this@@ the
-                                            // register type for GPIO Port D7@@
-                                            // GPIO Port F0@@ and GPIO Port
-                                            // C[3:0] is R/W. The default reset
-                                            // value for the GPIOCR register is
-                                            // 0x0000.00FF for all GPIO pins@@
-                                            // with the exception of the NMI pin
-                                            // and the four JTAG/SWD pins (PD7@@
-                                            // PF0@@ and PC[3:0]). To ensure
-                                            // that the JTAG port is not
-                                            // accidentally programmed as GPIO
-                                            // pins@@ the PC[3:0] pins default
-                                            // to non-committable. Similarly@@
-                                            // to ensure that the NMI pin is not
-                                            // accidentally programmed as a GPIO
-                                            // pin@@ the PD7 and PF0 pins
-                                            // default to non-committable.
-                                            // Because of this@@ the default
-                                            // reset value of GPIOCR for GPIO
-                                            // Port C is 0x0000.00F0@@ for GPIO
-                                            // Port D is 0x0000.007F@@ and for
-                                            // GPIO Port F is 0x0000.00FE.
-#define GPIO_GPIO_CR_CR_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_AMSEL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_AMSEL_GPIO_AMSEL_M \
-                                0x000000FF  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) GPIO Analog
-                                            // Mode Select Value Description 1
-                                            // The analog function of the pin is
-                                            // enabled@@ the isolation is
-                                            // disabled@@ and the pin is capable
-                                            // of analog functions. 0 The analog
-                                            // function of the pin is disabled@@
-                                            // the isolation is enabled@@ and
-                                            // the pin is capable of digital
-                                            // functions as specified by the
-                                            // other GPIO configuration
-                                            // registers. Note: This register
-                                            // and bits are only valid for GPIO
-                                            // signals that share analog
-                                            // function through a unified I/O
-                                            // pad. The reset state of this
-                                            // register is 0 for all signals.
-
-#define GPIO_GPIO_AMSEL_GPIO_AMSEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_PCTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCTL_PMC7_M   0xF0000000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 7 This field controls the
-                                            // configuration for GPIO pin 7.
-#define GPIO_GPIO_PCTL_PMC7_S   28
-#define GPIO_GPIO_PCTL_PMC6_M   0x0F000000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 6 This field controls the
-                                            // configuration for GPIO pin 6.
-#define GPIO_GPIO_PCTL_PMC6_S   24
-#define GPIO_GPIO_PCTL_PMC5_M   0x00F00000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 5 This field controls the
-                                            // configuration for GPIO pin 5.
-#define GPIO_GPIO_PCTL_PMC5_S   20
-#define GPIO_GPIO_PCTL_PMC4_M   0x000F0000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 4 This field controls the
-                                            // configuration for GPIO pin 4.
-#define GPIO_GPIO_PCTL_PMC4_S   16
-#define GPIO_GPIO_PCTL_PMC3_M   0x0000F000  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 43 This field controls
-                                            // the configuration for GPIO pin 3.
-#define GPIO_GPIO_PCTL_PMC3_S   12
-#define GPIO_GPIO_PCTL_PMC1_M   0x00000F00  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 1 This field controls the
-                                            // configuration for GPIO pin 1.
-#define GPIO_GPIO_PCTL_PMC1_S   8
-#define GPIO_GPIO_PCTL_PMC2_M   0x000000F0  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 2 This field controls the
-                                            // configuration for GPIO pin 2.
-#define GPIO_GPIO_PCTL_PMC2_S   4
-#define GPIO_GPIO_PCTL_PMC0_M   0x0000000F  // This register is not used in
-                                            // cc3xx. equivalant register exsist
-                                            // outside GPIO IP (refer
-                                            // PAD*_config register in the
-                                            // shared comn space) Port Mux
-                                            // Control 0 This field controls the
-                                            // configuration for GPIO pin 0.
-#define GPIO_GPIO_PCTL_PMC0_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_ADCCTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_ADCCTL_ADCEN_M \
-                                0x000000FF  // This register is not used in
-                                            // cc3xx. ADC trigger via GPIO is
-                                            // not supported. ADC Trigger Enable
-                                            // Value Description 1 The
-                                            // corresponding pin is used to
-                                            // trigger the ADC. 0 The
-                                            // corresponding pin is not used to
-                                            // trigger the ADC.
-
-#define GPIO_GPIO_ADCCTL_ADCEN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_DMACTL register.
-//
-//******************************************************************************
-#define GPIO_GPIO_DMACTL_DMAEN_M \
-                                0x000000FF  // This register is not used in the
-                                            // cc3xx. Alternate register to
-                                            // support this feature is coded in
-                                            // the APPS_NWP_CMN space. refer
-                                            // register as offset 0x400F70D8
-                                            // ?DMA Trigger Enable Value
-                                            // Description 1 The corresponding
-                                            // pin is used to trigger the ?DMA.
-                                            // 0 The corresponding pin is not
-                                            // used to trigger the ?DMA.
-
-#define GPIO_GPIO_DMACTL_DMAEN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPIO_O_GPIO_SI register.
-//
-//******************************************************************************
-#define GPIO_GPIO_SI_SUM        0x00000001  // Summary Interrupt Value
-                                            // Description 1 Each pin has its
-                                            // own interrupt vector. 0 All port
-                                            // pin interrupts are OR'ed together
-                                            // to produce a summary interrupt.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID4 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID4_PID4_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [7:0]
-
-#define GPIO_GPIO_PERIPHID4_PID4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID5 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID5_PID5_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [15:8]
-
-#define GPIO_GPIO_PERIPHID5_PID5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID6 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID6_PID6_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [23:16]
-
-#define GPIO_GPIO_PERIPHID6_PID6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID7 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID7_PID7_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [31:24]
-
-#define GPIO_GPIO_PERIPHID7_PID7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID0 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID0_PID0_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [7:0] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID0_PID0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID1 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID1_PID1_M \
-                                0x000000FF  // GPIO Peripheral ID Register
-                                            // [15:8] Can be used by software to
-                                            // identify the presence of this
-                                            // peripheral.
-
-#define GPIO_GPIO_PERIPHID1_PID1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID2 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID2_PID2_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX.v GPIO Peripheral ID
-                                            // Register [23:16] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID2_PID2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PERIPHID3 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PERIPHID3_PID3_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO Peripheral ID
-                                            // Register [31:24] Can be used by
-                                            // software to identify the presence
-                                            // of this peripheral.
-
-#define GPIO_GPIO_PERIPHID3_PID3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID0 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID0_CID0_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [7:0] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID0_CID0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID1 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID1_CID1_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [15:8] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID1_CID1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID2 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID2_CID2_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [23:16] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID2_CID2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPIO_O_GPIO_PCELLID3 register.
-//
-//******************************************************************************
-#define GPIO_GPIO_PCELLID3_CID3_M \
-                                0x000000FF  // This register is not used in
-                                            // CC3XX. GPIO PrimeCell ID Register
-                                            // [31:24] Provides software a
-                                            // standard cross-peripheral
-                                            // identification system.
-
-#define GPIO_GPIO_PCELLID3_CID3_S 0
-
-
-
-#endif // __HW_GPIO_H__
diff --git a/ports/cc3200/hal/inc/hw_gprcm.h b/ports/cc3200/hal/inc/hw_gprcm.h
deleted file mode 100644
index 43628f4abadcf..0000000000000
--- a/ports/cc3200/hal/inc/hw_gprcm.h
+++ /dev/null
@@ -1,3322 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_GPRCM_H__
-#define __HW_GPRCM_H__
-
-//*****************************************************************************
-//
-// The following are defines for the GPRCM register offsets.
-//
-//*****************************************************************************
-#define GPRCM_O_APPS_SOFT_RESET 0x00000000
-#define GPRCM_O_APPS_LPDS_WAKEUP_CFG \
-                                0x00000004
-
-#define GPRCM_O_APPS_LPDS_WAKEUP_SRC \
-                                0x00000008
-
-#define GPRCM_O_APPS_RESET_CAUSE \
-                                0x0000000C
-
-#define GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG \
-                                0x00000010
-
-#define GPRCM_O_APPS_SRAM_DSLP_CFG \
-                                0x00000018
-
-#define GPRCM_O_APPS_SRAM_LPDS_CFG \
-                                0x0000001C
-
-#define GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG \
-                                0x00000020
-
-#define GPRCM_O_TOP_DIE_ENABLE  0x00000100
-#define GPRCM_O_TOP_DIE_ENABLE_PARAMETERS \
-                                0x00000104
-
-#define GPRCM_O_MCU_GLOBAL_SOFT_RESET \
-                                0x00000108
-
-#define GPRCM_O_ADC_CLK_CONFIG  0x0000010C
-#define GPRCM_O_APPS_GPIO_WAKE_CONF \
-                                0x00000110
-
-#define GPRCM_O_EN_NWP_BOOT_WO_DEVINIT \
-                                0x00000114
-
-#define GPRCM_O_MEM_HCLK_DIV_CFG \
-                                0x00000118
-
-#define GPRCM_O_MEM_SYSCLK_DIV_CFG \
-                                0x0000011C
-
-#define GPRCM_O_APLLMCS_LOCK_TIME_CONF \
-                                0x00000120
-
-#define GPRCM_O_NWP_SOFT_RESET  0x00000400
-#define GPRCM_O_NWP_LPDS_WAKEUP_CFG \
-                                0x00000404
-
-#define GPRCM_O_NWP_LPDS_WAKEUP_SRC \
-                                0x00000408
-
-#define GPRCM_O_NWP_RESET_CAUSE 0x0000040C
-#define GPRCM_O_NWP_LPDS_WAKETIME_OPP_CFG \
-                                0x00000410
-
-#define GPRCM_O_NWP_SRAM_DSLP_CFG \
-                                0x00000418
-
-#define GPRCM_O_NWP_SRAM_LPDS_CFG \
-                                0x0000041C
-
-#define GPRCM_O_NWP_LPDS_WAKETIME_WAKE_CFG \
-                                0x00000420
-
-#define GPRCM_O_NWP_AUTONMS_SPI_MASTER_SEL \
-                                0x00000424
-
-#define GPRCM_O_NWP_AUTONMS_SPI_IDLE_REQ \
-                                0x00000428
-
-#define GPRCM_O_WLAN_TO_NWP_WAKE_REQUEST \
-                                0x0000042C
-
-#define GPRCM_O_NWP_TO_WLAN_WAKE_REQUEST \
-                                0x00000430
-
-#define GPRCM_O_NWP_GPIO_WAKE_CONF \
-                                0x00000434
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG12 \
-                                0x00000438
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG5 \
-                                0x00000448
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG6 \
-                                0x0000044C
-
-#define GPRCM_O_REF_FSM_CFG0    0x00000800
-#define GPRCM_O_REF_FSM_CFG1    0x00000804
-#define GPRCM_O_APLLMCS_WLAN_CONFIG0_40 \
-                                0x00000808
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG1_40 \
-                                0x0000080C
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG0_26 \
-                                0x00000810
-
-#define GPRCM_O_APLLMCS_WLAN_CONFIG1_26 \
-                                0x00000814
-
-#define GPRCM_O_APLLMCS_WLAN_OVERRIDES \
-                                0x00000818
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_38P4 \
-                                0x0000081C
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_38P4 \
-                                0x00000820
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_26 \
-                                0x00000824
-
-#define GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_26 \
-                                0x00000828
-
-#define GPRCM_O_SPARE_RW0       0x0000082C
-#define GPRCM_O_SPARE_RW1       0x00000830
-#define GPRCM_O_APLLMCS_MCU_OVERRIDES \
-                                0x00000834
-
-#define GPRCM_O_SYSCLK_SWITCH_STATUS \
-                                0x00000838
-
-#define GPRCM_O_REF_LDO_CONTROLS \
-                                0x0000083C
-
-#define GPRCM_O_REF_RTRIM_CONTROL \
-                                0x00000840
-
-#define GPRCM_O_REF_SLICER_CONTROLS0 \
-                                0x00000844
-
-#define GPRCM_O_REF_SLICER_CONTROLS1 \
-                                0x00000848
-
-#define GPRCM_O_REF_ANA_BGAP_CONTROLS0 \
-                                0x0000084C
-
-#define GPRCM_O_REF_ANA_BGAP_CONTROLS1 \
-                                0x00000850
-
-#define GPRCM_O_REF_ANA_SPARE_CONTROLS0 \
-                                0x00000854
-
-#define GPRCM_O_REF_ANA_SPARE_CONTROLS1 \
-                                0x00000858
-
-#define GPRCM_O_MEMSS_PSCON_OVERRIDES0 \
-                                0x0000085C
-
-#define GPRCM_O_MEMSS_PSCON_OVERRIDES1 \
-                                0x00000860
-
-#define GPRCM_O_PLL_REF_LOCK_OVERRIDES \
-                                0x00000864
-
-#define GPRCM_O_MCU_PSCON_DEBUG 0x00000868
-#define GPRCM_O_MEMSS_PWR_PS    0x0000086C
-#define GPRCM_O_REF_FSM_DEBUG   0x00000870
-#define GPRCM_O_MEM_SYS_OPP_REQ_OVERRIDE \
-                                0x00000874
-
-#define GPRCM_O_MEM_TESTCTRL_PD_OPP_CONFIG \
-                                0x00000878
-
-#define GPRCM_O_MEM_WL_FAST_CLK_REQ_OVERRIDES \
-                                0x0000087C
-
-#define GPRCM_O_MEM_MCU_PD_MODE_REQ_OVERRIDES \
-                                0x00000880
-
-#define GPRCM_O_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES \
-                                0x00000884
-
-#define GPRCM_O_MEM_WLAN_APLLMCS_OVERRIDES \
-                                0x00000888
-
-#define GPRCM_O_MEM_REF_FSM_CFG2 \
-                                0x0000088C
-
-#define GPRCM_O_TESTCTRL_POWER_CTRL \
-                                0x00000C10
-
-#define GPRCM_O_SSDIO_POWER_CTRL \
-                                0x00000C14
-
-#define GPRCM_O_MCSPI_N1_POWER_CTRL \
-                                0x00000C18
-
-#define GPRCM_O_WELP_POWER_CTRL 0x00000C1C
-#define GPRCM_O_WL_SDIO_POWER_CTRL \
-                                0x00000C20
-
-#define GPRCM_O_WLAN_SRAM_ACTIVE_PWR_CFG \
-                                0x00000C24
-
-#define GPRCM_O_WLAN_SRAM_SLEEP_PWR_CFG \
-                                0x00000C28
-
-#define GPRCM_O_APPS_SECURE_INIT_DONE \
-                                0x00000C30
-
-#define GPRCM_O_APPS_DEV_MODE_INIT_DONE \
-                                0x00000C34
-
-#define GPRCM_O_EN_APPS_REBOOT  0x00000C38
-#define GPRCM_O_MEM_APPS_PERIPH_PRESENT \
-                                0x00000C3C
-
-#define GPRCM_O_MEM_NWP_PERIPH_PRESENT \
-                                0x00000C40
-
-#define GPRCM_O_MEM_SHARED_PERIPH_PRESENT \
-                                0x00000C44
-
-#define GPRCM_O_NWP_PWR_STATE   0x00000C48
-#define GPRCM_O_APPS_PWR_STATE  0x00000C4C
-#define GPRCM_O_MCU_PWR_STATE   0x00000C50
-#define GPRCM_O_WTOP_PM_PS      0x00000C54
-#define GPRCM_O_WTOP_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C58
-
-#define GPRCM_O_WELP_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C5C
-
-#define GPRCM_O_WL_SDIO_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C60
-
-#define GPRCM_O_SSDIO_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C64
-
-#define GPRCM_O_MCSPI_N1_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C68
-
-#define GPRCM_O_TESTCTRL_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C6C
-
-#define GPRCM_O_MCU_PD_RESETZ_OVERRIDE_REG \
-                                0x00000C70
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG0 \
-                                0x00000C78
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG1 \
-                                0x00000C7C
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG2 \
-                                0x00000C80
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG3 \
-                                0x00000C84
-
-#define GPRCM_O_WTOP_MEM_RET_CFG \
-                                0x00000C88
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG0 \
-                                0x00000C8C
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG1 \
-                                0x00000C90
-
-#define GPRCM_O_COEX_CLK_SWALLOW_CFG2 \
-                                0x00000C94
-
-#define GPRCM_O_COEX_CLK_SWALLOW_ENABLE \
-                                0x00000C98
-
-#define GPRCM_O_DCDC_CLK_GEN_CONFIG \
-                                0x00000C9C
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG4 \
-                                0x00000CA0
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG5 \
-                                0x00000CA4
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG6 \
-                                0x00000CA8
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG7 \
-                                0x00000CAC
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG8 \
-                                0x00000CB0
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG9 \
-                                0x00000CB4
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG10 \
-                                0x00000CB8
-
-#define GPRCM_O_GPRCM_EFUSE_READ_REG11 \
-                                0x00000CBC
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG0 \
-                                0x00000CC0
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG1 \
-                                0x00000CC4
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG2 \
-                                0x00000CC8
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG3 \
-                                0x00000CCC
-
-#define GPRCM_O_GPRCM_DIEID_READ_REG4 \
-                                0x00000CD0
-
-#define GPRCM_O_APPS_SS_OVERRIDES \
-                                0x00000CD4
-
-#define GPRCM_O_NWP_SS_OVERRIDES \
-                                0x00000CD8
-
-#define GPRCM_O_SHARED_SS_OVERRIDES \
-                                0x00000CDC
-
-#define GPRCM_O_IDMEM_CORE_RST_OVERRIDES \
-                                0x00000CE0
-
-#define GPRCM_O_TOP_DIE_FSM_OVERRIDES \
-                                0x00000CE4
-
-#define GPRCM_O_MCU_PSCON_OVERRIDES \
-                                0x00000CE8
-
-#define GPRCM_O_WTOP_PSCON_OVERRIDES \
-                                0x00000CEC
-
-#define GPRCM_O_WELP_PSCON_OVERRIDES \
-                                0x00000CF0
-
-#define GPRCM_O_WL_SDIO_PSCON_OVERRIDES \
-                                0x00000CF4
-
-#define GPRCM_O_MCSPI_PSCON_OVERRIDES \
-                                0x00000CF8
-
-#define GPRCM_O_SSDIO_PSCON_OVERRIDES \
-                                0x00000CFC
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SOFT_RESET_APPS_SOFT_RESET1 \
-                                0x00000002  // Soft-reset1 for APPS : Cortex
-                                            // sysrstn is asserted and in
-                                            // addition to that the associated
-                                            // APPS Peripherals are also reset.
-                                            // This is an auto-clear bit.
-
-#define GPRCM_APPS_SOFT_RESET_APPS_SOFT_RESET0 \
-                                0x00000001  // Soft-reset0 for APPS : Only
-                                            // sys-resetn for Cortex will be
-                                            // asserted. This is an auto-clear
-                                            // bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKEUP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKEUP_CFG_APPS_LPDS_WAKEUP_CFG_M \
-                                0x000000FF  // Mask for LPDS Wakeup interrupt :
-                                            // [7] - Host IRQ from NWP [6] -
-                                            // NWP_LPDS_Wake_irq (TRUE_LPDS) [5]
-                                            // - NWP Wake-request to APPS [4] -
-                                            // GPIO [3:1] - Reserved [0] - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_APPS_LPDS_WAKEUP_CFG_APPS_LPDS_WAKEUP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKEUP_SRC register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKEUP_SRC_APPS_LPDS_WAKEUP_SRC_M \
-                                0x000000FF  // Indicates the cause for wakeup
-                                            // from LPDS : [7] - Host IRQ from
-                                            // NWP [6] - NWP_LPDS_Wake_irq
-                                            // (TRUE_LPDS) [5] - NWP
-                                            // Wake-request to APPS [4] - GPIO
-                                            // [3:1] - Reserved [0] - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_APPS_LPDS_WAKEUP_SRC_APPS_LPDS_WAKEUP_SRC_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_RESET_CAUSE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_RESET_CAUSE_APPS_RESET_CAUSE_M \
-                                0x000000FF  // Indicates the reset cause for
-                                            // APPS : "0000" - Wake from HIB/OFF
-                                            // mode; "0001" - Wake from LPDS ;
-                                            // "0010" - Reserved ; "0011" -
-                                            // Soft-reset0 (Only APPS
-                                            // Cortex-sysrstn is asserted);
-                                            // "0100" - Soft-reset1 (APPS
-                                            // Cortex-sysrstn and APPS
-                                            // peripherals are reset); "0101" -
-                                            // WDOG0 (APPS Cortex-sysrstn and
-                                            // APPS peripherals are reset);
-                                            // "0110" - MCU Soft-reset (APPS +
-                                            // NWP Cortex-sysrstn + Peripherals
-                                            // are reset); "0111" - Secure Init
-                                            // done (Indication that reset has
-                                            // happened after DevInit); "1000" -
-                                            // Dev Mode Patch Init done (During
-                                            // development mode, patch
-                                            // downloading and Cortex
-                                            // re-vectoring is completed)
-
-#define GPRCM_APPS_RESET_CAUSE_APPS_RESET_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKETIME_OPP_CFG_APPS_LPDS_WAKETIME_OPP_CFG_M \
-                                0xFFFFFFFF  // OPP Request Configuration
-                                            // (Number of slow-clk cycles) for
-                                            // LPDS Wake-timer : This
-                                            // configuration implies the RTC
-                                            // time-stamp, which must be few
-                                            // slow-clks prior to
-                                            // APPS_LPDS_WAKETIME_WAKE_CFG, such
-                                            // that by the time actual wakeup is
-                                            // given, OPP is already switched to
-                                            // ACTIVE (RUN).
-
-#define GPRCM_APPS_LPDS_WAKETIME_OPP_CFG_APPS_LPDS_WAKETIME_OPP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SRAM_DSLP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SRAM_DSLP_CFG_APPS_SRAM_DSLP_CFG_M \
-                                0x000FFFFF  // Configuration of APPS Memories
-                                            // during Deep-sleep : 0 - SRAMs are
-                                            // OFF ; 1 - SRAMs are Retained.
-                                            // APPS SRAM Cluster information :
-                                            // [0] - 1st column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS); [1] - 2nd column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS); [2] - 3rd column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS) ; [3] - 4th column in MEMSS
-                                            // (Applicable only when owned by
-                                            // APPS) ; [16] - MCU-PD - Apps
-                                            // cluster 0 (TBD); [19:18] -
-                                            // Reserved.
-
-#define GPRCM_APPS_SRAM_DSLP_CFG_APPS_SRAM_DSLP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SRAM_LPDS_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SRAM_LPDS_CFG_APPS_SRAM_LPDS_CFG_M \
-                                0x000FFFFF  // Configuration of APPS Memories
-                                            // during LPDS : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. APPS SRAM
-                                            // Cluster information : [0] - 1st
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS); [1] - 2nd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS); [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by APPS) ; [16] -
-                                            // MCU-PD - Apps cluster 0 (TBD);
-                                            // [19:18] - Reserved.
-
-#define GPRCM_APPS_SRAM_LPDS_CFG_APPS_SRAM_LPDS_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG register.
-//
-//******************************************************************************
-#define GPRCM_APPS_LPDS_WAKETIME_WAKE_CFG_APPS_LPDS_WAKETIME_WAKE_CFG_M \
-                                0xFFFFFFFF  // Configuration (in no of
-                                            // slow_clks) which says when the
-                                            // actual wakeup request for
-                                            // removing the PD-reset be given.
-
-#define GPRCM_APPS_LPDS_WAKETIME_WAKE_CFG_APPS_LPDS_WAKETIME_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_ENABLE register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_ENABLE_FLASH_BUSY \
-                                0x00001000
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_PWR_PS_M \
-                                0x00000F00
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_PWR_PS_S 8
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_ENABLE_STATUS \
-                                0x00000002  // 1 - Top-die is enabled ;
-
-#define GPRCM_TOP_DIE_ENABLE_TOP_DIE_ENABLE \
-                                0x00000001  // 1 - Enable the top-die ; 0 -
-                                            // Disable the top-die
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_ENABLE_PARAMETERS register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_FLASH_3P3_RSTN2D2D_POR_RSTN_M \
-                                0xF0000000  // Configuration (in slow_clks) for
-                                            // number of clks between
-                                            // Flash-3p3-rstn to D2D POR Resetn.
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_FLASH_3P3_RSTN2D2D_POR_RSTN_S 28
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_SW_EN2TOP_DIE_FLASH_3P3_RSTN_M \
-                                0x00FF0000  // Configuration (in slow_clks) for
-                                            // number of clks between Top-die
-                                            // Switch-Enable and Top-die Flash
-                                            // 3p3 Reset removal
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_SW_EN2TOP_DIE_FLASH_3P3_RSTN_S 16
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_POR_RSTN2BOTT_DIE_FMC_RSTN_M \
-                                0x000000FF  // Configuration (in slow_clks) for
-                                            // number of clks between D2D POR
-                                            // Reset removal and bottom die FMC
-                                            // reset removal
-
-#define GPRCM_TOP_DIE_ENABLE_PARAMETERS_TOP_DIE_POR_RSTN2BOTT_DIE_FMC_RSTN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_GLOBAL_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_MCU_GLOBAL_SOFT_RESET_MCU_GLOBAL_SOFT_RESET \
-                                0x00000001  // 1 - Assert the global reset for
-                                            // MCU (APPS + NWP) ; Asserts both
-                                            // Cortex sysrstn and its
-                                            // peripherals 0 - Deassert the
-                                            // global reset for MCU (APPS + NWP)
-                                            // ; Asserts both Cortex sysrstn and
-                                            // its peripherals Note : Reset for
-                                            // shared peripherals is not
-                                            // affected here.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_ADC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_OFF_TIME_M \
-                                0x000007C0  // Configuration (in number of 38.4
-                                            // MHz clks) for the OFF-Time in
-                                            // generation of ADC_CLK
-
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_OFF_TIME_S 6
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_ON_TIME_M \
-                                0x0000003E  // Configuration (in number of 38.4
-                                            // MHz clks) for the ON-Time in
-                                            // generation of ADC_CLK
-
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLKGEN_ON_TIME_S 1
-#define GPRCM_ADC_CLK_CONFIG_ADC_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the ADC_CLK ; 0 -
-                                            // Disable the ADC_CLK
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define GPRCM_APPS_GPIO_WAKE_CONF_APPS_GPIO_WAKE_CONF_M \
-                                0x00000003  // "00" - Wake on Level0 on
-                                            // selected GPIO pin (GPIO is
-                                            // selected inside the HIB3p3
-                                            // module); "01" - Wakeup on
-                                            // fall-edge of GPIO pin.
-
-#define GPRCM_APPS_GPIO_WAKE_CONF_APPS_GPIO_WAKE_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_EN_NWP_BOOT_WO_DEVINIT register.
-//
-//******************************************************************************
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_reserved_M \
-                                0xFFFFFFFE
-
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_reserved_S 1
-#define GPRCM_EN_NWP_BOOT_WO_DEVINIT_mem_en_nwp_boot_wo_devinit \
-                                0x00000001  // 1 - Override the secure-mode
-                                            // done for booting up NWP (Wakeup
-                                            // NWP on its event independent of
-                                            // CM4 state) ; 0 - Donot override
-                                            // the secure-mode done for NWP boot
-                                            // (NWP must be enabled by CM4 only)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_HCLK_DIV_CFG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_HCLK_DIV_CFG_mem_hclk_div_cfg_M \
-                                0x00000007  // Division configuration for
-                                            // HCLKDIVOUT : "000" - Divide by 1
-                                            // ; "001" - Divide by 2 ; "010" -
-                                            // Divide by 3 ; "011" - Divide by 4
-                                            // ; "100" - Divide by 5 ; "101" -
-                                            // Divide by 6 ; "110" - Divide by 7
-                                            // ; "111" - Divide by 8
-
-#define GPRCM_MEM_HCLK_DIV_CFG_mem_hclk_div_cfg_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SYSCLK_DIV_CFG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_off_time_M \
-                                0x00000038
-
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_off_time_S 3
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_on_time_M \
-                                0x00000007
-
-#define GPRCM_MEM_SYSCLK_DIV_CFG_mem_sysclk_div_on_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_LOCK_TIME_CONF register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_wlan_lock_time_M \
-                                0x0000FF00
-
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_wlan_lock_time_S 8
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_mcu_lock_time_M \
-                                0x000000FF
-
-#define GPRCM_APLLMCS_LOCK_TIME_CONF_mem_apllmcs_mcu_lock_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SOFT_RESET register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SOFT_RESET_NWP_SOFT_RESET1 \
-                                0x00000002  // Soft-reset1 for NWP - Cortex
-                                            // sysrstn and NWP associated
-                                            // peripherals are - This is an
-                                            // auto-clr bit.
-
-#define GPRCM_NWP_SOFT_RESET_NWP_SOFT_RESET0 \
-                                0x00000001  // Soft-reset0 for NWP - Only
-                                            // Cortex-sysrstn is asserted - This
-                                            // is an auto-clear bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKEUP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKEUP_CFG_NWP_LPDS_WAKEUP_CFG_M \
-                                0x000000FF  // Mask for LPDS Wakeup interrupt :
-                                            // 7 - WLAN Host Interrupt ; 6 -
-                                            // WLAN to NWP Wake request ; 5 -
-                                            // APPS to NWP Wake request; 4 -
-                                            // GPIO Wakeup ; 3 - Autonomous UART
-                                            // Wakeup ; 2 - SSDIO Wakeup ; 1 -
-                                            // Autonomous SPI Wakeup ; 0 - LPDS
-                                            // Wakeup-timer
-
-#define GPRCM_NWP_LPDS_WAKEUP_CFG_NWP_LPDS_WAKEUP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKEUP_SRC register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKEUP_SRC_NWP_LPDS_WAKEUP_SRC_M \
-                                0x000000FF  // Indicates the cause for NWP
-                                            // LPDS-Wakeup : 7 - WLAN Host
-                                            // Interrupt ; 6 - WLAN to NWP Wake
-                                            // request ; 5 - APPS to NWP Wake
-                                            // request; 4 - GPIO Wakeup ; 3 -
-                                            // Autonomous UART Wakeup ; 2 -
-                                            // SSDIO Wakeup ; 1 - Autonomous SPI
-                                            // Wakeup ; 0 - LPDS Wakeup-timer
-
-#define GPRCM_NWP_LPDS_WAKEUP_SRC_NWP_LPDS_WAKEUP_SRC_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_RESET_CAUSE register.
-//
-//******************************************************************************
-#define GPRCM_NWP_RESET_CAUSE_NWP_RESET_CAUSE_M \
-                                0x000000FF  // Indicates the reset cause for
-                                            // NWP : "0000" - Wake from HIB/OFF
-                                            // mode; "0001" - Wake from LPDS ;
-                                            // "0010" - Reserved ; "0011" -
-                                            // Soft-reset0 (Only NWP
-                                            // Cortex-sysrstn is asserted);
-                                            // "0100" - Soft-reset1 (NWP
-                                            // Cortex-sysrstn and NWP
-                                            // peripherals are reset); "0101" -
-                                            // WDOG0 (NWP Cortex-sysrstn and NWP
-                                            // peripherals are reset); "0110" -
-                                            // MCU Soft-reset (APPS + NWP
-                                            // Cortex-sysrstn + Peripherals are
-                                            // reset); "0111" - SSDIO Function2
-                                            // reset (Only Cortex-sysrstn is
-                                            // asserted) ; "1000" - Reset due to
-                                            // WDOG of APPS (NWP Cortex-sysrstn
-                                            // and NWP peripherals are reset);
-
-#define GPRCM_NWP_RESET_CAUSE_NWP_RESET_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKETIME_OPP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKETIME_OPP_CFG_NWP_LPDS_WAKETIME_OPP_CFG_M \
-                                0xFFFFFFFF  // OPP Request Configuration
-                                            // (Number of slow-clk cycles) for
-                                            // LPDS Wake-timer
-
-#define GPRCM_NWP_LPDS_WAKETIME_OPP_CFG_NWP_LPDS_WAKETIME_OPP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SRAM_DSLP_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SRAM_DSLP_CFG_NWP_SRAM_DSLP_CFG_M \
-                                0x000FFFFF  // Configuration of NWP Memories
-                                            // during DSLP : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. NWP SRAM
-                                            // Cluster information : [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [4] - 5th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [5] - 6th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [6] - 7th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [7] - 8th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [8] - 9th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [9] - 10th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [10] - 11th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [11] - 12th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [12] - 13th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [13] - 14th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [14] - 15th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [19:18] -
-                                            // Reserved.
-
-#define GPRCM_NWP_SRAM_DSLP_CFG_NWP_SRAM_DSLP_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SRAM_LPDS_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SRAM_LPDS_CFG_NWP_SRAM_LPDS_CFG_M \
-                                0x000FFFFF  // Configuration of NWP Memories
-                                            // during LPDS : 0 - SRAMs are OFF ;
-                                            // 1 - SRAMs are Retained. NWP SRAM
-                                            // Cluster information : [2] - 3rd
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [3] - 4th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [4] - 5th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [5] - 6th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [6] - 7th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [7] - 8th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [8] - 9th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [9] - 10th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [10] - 11th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [11] - 12th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [12] - 13th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [13] - 14th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [14] - 15th
-                                            // column in MEMSS (Applicable only
-                                            // when owned by NWP) ; [19:18] -
-                                            // Reserved.
-
-#define GPRCM_NWP_SRAM_LPDS_CFG_NWP_SRAM_LPDS_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_LPDS_WAKETIME_WAKE_CFG register.
-//
-//******************************************************************************
-#define GPRCM_NWP_LPDS_WAKETIME_WAKE_CFG_NWP_LPDS_WAKETIME_WAKE_CFG_M \
-                                0xFFFFFFFF  // Wake time configuration (no of
-                                            // slow clks) for NWP wake from
-                                            // LPDS.
-
-#define GPRCM_NWP_LPDS_WAKETIME_WAKE_CFG_NWP_LPDS_WAKETIME_WAKE_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_AUTONMS_SPI_MASTER_SEL register.
-//
-//******************************************************************************
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_F_M \
-                                0xFFFE0000
-
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_F_S 17
-#define GPRCM_NWP_AUTONMS_SPI_MASTER_SEL_MEM_AUTONMS_SPI_MASTER_SEL \
-                                0x00010000  // 0 - APPS is selected as host for
-                                            // Autonms SPI ; 1 - External host
-                                            // is selected as host for Autonms
-                                            // SPI
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_AUTONMS_SPI_IDLE_REQ register.
-//
-//******************************************************************************
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_WAKEUP \
-                                0x00010000
-
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_ACK \
-                                0x00000002  // When 1 => IDLE-mode is
-                                            // acknowledged by the SPI-IP. (This
-                                            // is for MCSPI_N1)
-
-#define GPRCM_NWP_AUTONMS_SPI_IDLE_REQ_NWP_AUTONMS_SPI_IDLE_REQ \
-                                0x00000001  // When 1 => Request for IDLE-mode
-                                            // for autonomous SPI. (This is for
-                                            // MCSPI_N1)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_TO_NWP_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_TO_NWP_WAKE_REQUEST_WLAN_TO_NWP_WAKE_REQUEST \
-                                0x00000001  // 1 - Request for waking up NWP
-                                            // from any of its low-power modes
-                                            // (SLP/DSLP/LPDS)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_TO_WLAN_WAKE_REQUEST register.
-//
-//******************************************************************************
-#define GPRCM_NWP_TO_WLAN_WAKE_REQUEST_NWP_TO_WLAN_WAKE_REQUEST \
-                                0x00000001  // 1 - Request for wakinp up WLAN
-                                            // from its ELP Mode (This gets
-                                            // triggered to ELP-logic of WLAN)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define GPRCM_NWP_GPIO_WAKE_CONF_NWP_GPIO_WAKE_CONF_M \
-                                0x00000003  // "00" - Wakeup on level0 of the
-                                            // selected GPIO (GPIO gets selected
-                                            // inside HIB3P3-module); "01" -
-                                            // Wakeup on fall-edge of selected
-                                            // GPIO.
-
-#define GPRCM_NWP_GPIO_WAKE_CONF_NWP_GPIO_WAKE_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG12 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG12_FUSEFARM_ROW_32_MSW_M \
-                                0x0000FFFF  // This corrsponds to ROW_32
-                                            // [31:16] of the FUSEFARM. SPARE
-
-#define GPRCM_GPRCM_EFUSE_READ_REG12_FUSEFARM_ROW_32_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG5 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG5_FUSEFARM_ROW_10_M \
-                                0xFFFFFFFF  // Corresponds to ROW10 of FUSEFARM
-                                            // : [5:0] - ADC OFFSET ; [13:6] -
-                                            // TEMP_SENSE ; [14:14] - DFT_GSG ;
-                                            // [15:15] - FMC_DISABLE ; [31:16] -
-                                            // WLAN_MAC ID
-
-#define GPRCM_GPRCM_DIEID_READ_REG5_FUSEFARM_ROW_10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG6 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG6_FUSEFARM_ROW_11_M \
-                                0xFFFFFFFF  // Corresponds to ROW11 of FUSEFARM
-                                            // : [31:0] : WLAN MAC ID
-
-#define GPRCM_GPRCM_DIEID_READ_REG6_FUSEFARM_ROW_11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_CFG0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_CFG0_BGAP_SETTLING_TIME_M \
-                                0x00FF0000  // ANA-BGAP Settling time (In
-                                            // number of slow_clks)
-
-#define GPRCM_REF_FSM_CFG0_BGAP_SETTLING_TIME_S 16
-#define GPRCM_REF_FSM_CFG0_FREF_LDO_SETTLING_TIME_M \
-                                0x0000FF00  // Slicer LDO settling time (In
-                                            // number of slow clks)
-
-#define GPRCM_REF_FSM_CFG0_FREF_LDO_SETTLING_TIME_S 8
-#define GPRCM_REF_FSM_CFG0_DIG_BUF_SETTLING_TIME_M \
-                                0x000000FF  // Dig-buffer settling time (In
-                                            // number of slow clks)
-
-#define GPRCM_REF_FSM_CFG0_DIG_BUF_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_CFG1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_CFG1_XTAL_SETTLING_TIME_M \
-                                0xFF000000  // XTAL settling time (In number of
-                                            // slow clks)
-
-#define GPRCM_REF_FSM_CFG1_XTAL_SETTLING_TIME_S 24
-#define GPRCM_REF_FSM_CFG1_SLICER_LV_SETTLING_TIME_M \
-                                0x00FF0000  // LV Slicer settling time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_LV_SETTLING_TIME_S 16
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_PD_SETTLING_TIME_M \
-                                0x0000FF00  // HV Slicer Pull-down settling
-                                            // time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_PD_SETTLING_TIME_S 8
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_SETTLING_TIME_M \
-                                0x000000FF  // HV Slicer settling time
-
-#define GPRCM_REF_FSM_CFG1_SLICER_HV_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG0_40 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_N_40_M \
-                                0x00007F00  // Configuration for WLAN APLLMCS -
-                                            // N[6:0], if the XTAL frequency is
-                                            // 40 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_N_40_S 8
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_M_40_M \
-                                0x000000FF  // Configuration for WLAN APLLMCS -
-                                            // M[7:0], if the XTAL frequency is
-                                            // 40 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_40_APLLMCS_WLAN_M_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG1_40 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_HISPEED_40 \
-                                0x00000010  // Configuration for WLAN APLLMCS -
-                                            // if the XTAL frequency if 40 MHz
-                                            // (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SEL96_40 \
-                                0x00000008  // Configuration for WLAN APLLMCS -
-                                            // Sel96, if the XTAL frequency is
-                                            // 40 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SELINPFREQ_40_M \
-                                0x00000007  // Configuration for WLAN APLLMCS -
-                                            // Selinpfreq, if the XTAL frequency
-                                            // is 40 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_40_APLLMCS_SELINPFREQ_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG0_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_N_26_M \
-                                0x00007F00  // Configuration for WLAN APLLMCS -
-                                            // N[6:0], if the XTAL frequency is
-                                            // 26 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_N_26_S 8
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_M_26_M \
-                                0x000000FF  // Configuration for WLAN APLLMCS -
-                                            // M[7:0], if the XTAL frequency is
-                                            // 26 MHz (Selected by efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG0_26_APLLMCS_WLAN_M_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_CONFIG1_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_HISPEED_26 \
-                                0x00000010  // Configuration for WLAN APLLMCS -
-                                            // if the XTAL frequency if 26 MHz
-                                            // (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SEL96_26 \
-                                0x00000008  // Configuration for WLAN APLLMCS -
-                                            // Sel96, if the XTAL frequency is
-                                            // 26 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SELINPFREQ_26_M \
-                                0x00000007  // Configuration for WLAN APLLMCS -
-                                            // Selinpfreq, if the XTAL frequency
-                                            // is 26 MHz (Selected by Efuse)
-
-#define GPRCM_APLLMCS_WLAN_CONFIG1_26_APLLMCS_SELINPFREQ_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_WLAN_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_CTRL \
-                                0x00080000
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_M \
-                                0x00070000
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_POSTDIV_OVERRIDE_S 16
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_SPARE_M \
-                                0x00000700
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_SPARE_S 8
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_M_8_OVERRIDE_CTRL \
-                                0x00000020  // Override control for
-                                            // WLAN_APLLMCS_M[8]. When set to1,
-                                            // M[8] will be selected by bit [3].
-                                            // (Else controlled from WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_M_8_OVERRIDE \
-                                0x00000010  // Override for WLAN_APLLMCS_M[8].
-                                            // Applicable only when bit [4] is
-                                            // set to 1. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_CTRL \
-                                0x00000004  // Override control for
-                                            // WLAN_APLLMCS_N[8:7]. When set
-                                            // to1, N[8:7] will be selected by
-                                            // bits [2:1]. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_M \
-                                0x00000003  // Override value for
-                                            // WLAN_APLLMCS_N[8:7] bits.
-                                            // Applicable only when bit [1] is
-                                            // set to 1. (Else controlled from
-                                            // WTOP)
-
-#define GPRCM_APLLMCS_WLAN_OVERRIDES_APLLMCS_WLAN_N_7_8_OVERRIDE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_38P4 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_POSTDIV_M \
-                                0x38000000
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_POSTDIV_S 27
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_SPARE_M \
-                                0x07000000
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_SPARE_S 24
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_38P4_M \
-                                0x007F0000  // Configuration for MCU-APLLMCS :
-                                            // N during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_38P4_S 16
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_38P4_M \
-                                0x0000FF00  // Configuration for MCU-APLLMCS :
-                                            // M during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_38P4_S 8
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_M_8_38P4 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // M[8] during RUN mode. Selected if
-                                            // the XTAL frequency is 38.4 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_7_8_38P4_M \
-                                0x00000003  // Configuration for MCU-APLLMCS :
-                                            // N[8:7] during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_38P4_APLLMCS_MCU_RUN_N_7_8_38P4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_38P4 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_HISPEED_38P4 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // HISPEED during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SEL96_38P4 \
-                                0x00000008  // Configuration for MCU-APLLMCS :
-                                            // SEL96 during RUN mode. Selected
-                                            // if the XTAL frequency is 38.4 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SELINPFREQ_38P4_M \
-                                0x00000007  // Configuration for MCU-APLLMCS :
-                                            // SELINPFREQ during RUN mode.
-                                            // Selected if the XTAL frequency is
-                                            // 38.4 MHz (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_38P4_APLLMCS_MCU_RUN_SELINPFREQ_38P4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG0_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_26_M \
-                                0x007F0000  // Configuration for MCU-APLLMCS :
-                                            // N during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_26_S 16
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_26_M \
-                                0x0000FF00  // Configuration for MCU-APLLMCS :
-                                            // M during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_26_S 8
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_M_8_26 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // M[8] during RUN mode. Selected if
-                                            // the XTAL frequency is 26 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_7_8_26_M \
-                                0x00000003  // Configuration for MCU-APLLMCS :
-                                            // N[8:7] during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (From Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG0_26_APLLMCS_MCU_RUN_N_7_8_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_RUN_CONFIG1_26 register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_HISPEED_26 \
-                                0x00000010  // Configuration for MCU-APLLMCS :
-                                            // HISPEED during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SEL96_26 \
-                                0x00000008  // Configuration for MCU-APLLMCS :
-                                            // SEL96 during RUN mode. Selected
-                                            // if the XTAL frequency is 26 MHz
-                                            // (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SELINPFREQ_26_M \
-                                0x00000007  // Configuration for MCU-APLLMCS :
-                                            // SELINPFREQ during RUN mode.
-                                            // Selected if the XTAL frequency is
-                                            // 26 MHz (from Efuse)
-
-#define GPRCM_APLLMCS_MCU_RUN_CONFIG1_26_APLLMCS_MCU_RUN_SELINPFREQ_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPRCM_O_SPARE_RW0 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the GPRCM_O_SPARE_RW1 register.
-//
-//******************************************************************************
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APLLMCS_MCU_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_LOCK \
-                                0x00000400  // 1 - APLLMCS_MCU is locked ; 0 -
-                                            // APLLMCS_MCU is not locked
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_ENABLE_OVERRIDE \
-                                0x00000200  // Override for APLLMCS_MCU Enable.
-                                            // Applicable if bit [8] is set
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_APLLMCS_MCU_ENABLE_OVERRIDE_CTRL \
-                                0x00000100  // 1 - Enable for APLLMCS_MCU comes
-                                            // from bit [9]. 0 - Enable for
-                                            // APLLMCS_MCU comes from FSM.
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_M \
-                                0x00000006  // Override for sysclk src
-                                            // (applicable only if bit [0] is
-                                            // set to 1. "00"- SLOW_CLK "01"-
-                                            // XTAL_CLK "10"- PLL_CLK
-
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_S 1
-#define GPRCM_APLLMCS_MCU_OVERRIDES_SYSCLK_SRC_OVERRIDE_CTRL \
-                                0x00000001  // 1 - Sysclk src is selected from
-                                            // bits [2:1] of this register. 0 -
-                                            // Sysclk src is selected from FSM
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SYSCLK_SWITCH_STATUS register.
-//
-//******************************************************************************
-#define GPRCM_SYSCLK_SWITCH_STATUS_SYSCLK_SWITCH_STATUS \
-                                0x00000001  // 1 - Sysclk switching is
-                                            // complete. 0 - Sysclk switching is
-                                            // in progress.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_LDO_CONTROLS register.
-//
-//******************************************************************************
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_ENABLE_OVERRIDE_CTRL \
-                                0x00010000  // 1 - Enable for REF_LDO comes
-                                            // from bit [0] of this register ; 0
-                                            // - Enable for REF_LDO comes from
-                                            // the FSM. Note : Final REF_LDO_EN
-                                            // reaches on the port
-                                            // TOP_PM_REG2[0] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_SPARE_CONTROL_M \
-                                0x0000C000  // Spare bits for REF_CTRL_FSM.
-                                            // Reaches directly on port
-                                            // TOP_PM_REG2[15:14] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_SPARE_CONTROL_S 14
-#define GPRCM_REF_LDO_CONTROLS_REF_TLOAD_ENABLE_M \
-                                0x00003800  // REF TLOAD Enable. Reaches
-                                            // directly on port
-                                            // TOP_PM_REG2[13:11] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_TLOAD_ENABLE_S 11
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_TMUX_CONTROL_M \
-                                0x00000700  // REF_LDO Test-mux control.
-                                            // Reaches directly on port
-                                            // TOP_PM_REG2[10:8] of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_TMUX_CONTROL_S 8
-#define GPRCM_REF_LDO_CONTROLS_REF_BW_CONTROL_M \
-                                0x000000C0  // REF BW Control. Reaches directly
-                                            // on port TOP_PM_REG2[7:6] of
-                                            // gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_BW_CONTROL_S 6
-#define GPRCM_REF_LDO_CONTROLS_REF_VTRIM_CONTROL_M \
-                                0x0000003C  // REF VTRIM Control. Reaches
-                                            // directly on port TOP_PM_REG2[5:2]
-                                            // of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_VTRIM_CONTROL_S 2
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_BYPASS_ENABLE \
-                                0x00000002  // REF LDO Bypass Enable. Reaches
-                                            // directly on port TOP_PM_REG2[1]
-                                            // of gprcm.
-
-#define GPRCM_REF_LDO_CONTROLS_REF_LDO_ENABLE \
-                                0x00000001  // Override for REF_LDO Enable.
-                                            // Applicable only if bit [16] of
-                                            // this register is set. Note :
-                                            // Final REF_LDO_EN reaches on the
-                                            // port TOP_PM_REG2[0] of gprcm.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_RTRIM_CONTROL register.
-//
-//******************************************************************************
-#define GPRCM_REF_RTRIM_CONTROL_TOP_PM_REG0_5_4_M \
-                                0x18000000  // This is [5:4] bits of
-                                            // TOP_PM_REG0
-
-#define GPRCM_REF_RTRIM_CONTROL_TOP_PM_REG0_5_4_S 27
-#define GPRCM_REF_RTRIM_CONTROL_TOP_CLKM_REG0_15_5_M \
-                                0x07FF0000  // This is [15:5] bits of
-                                            // TOP_CLKM_REG0
-
-#define GPRCM_REF_RTRIM_CONTROL_TOP_CLKM_REG0_15_5_S 16
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_OVERRIDE_CTRL \
-                                0x00000100  // 1 - CLKM_RTRIM comes for
-                                            // bits[4:0] of this register. 0 -
-                                            // CLKM_RTRIM comes from Efuse
-                                            // (after efuse_done = 1).
-
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_M \
-                                0x0000001F  // CLKM_TRIM Override. Applicable
-                                            // when efuse_done = 0 or bit[8] is
-                                            // set to 1.
-
-#define GPRCM_REF_RTRIM_CONTROL_REF_CLKM_RTRIM_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_SLICER_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_WLAN_LOWV_OVERRIDE_CTRL \
-                                0x00200000  // 1 - EN_DIG_BUF_TOP comes from
-                                            // bit [14] of this register. 0 -
-                                            // EN_DIG_BUF_TOP comes from the
-                                            // FSM. Note : Final EN_DIG_BUF_WLAN
-                                            // reaches on TOP_CLKM_REG1_IN[14]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_TOP_LOWV_OVERRIDE_CTRL \
-                                0x00100000  // 1 - EN_DIG_BUF_TOP comes from
-                                            // bit [15] of this register. 0 -
-                                            // EN_DIG_BUF_TOP comes from the
-                                            // FSM. Note : Final EN_DIG_BUF_TOP
-                                            // reaches on TOP_CLKM_REG1_IN[15]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_XTAL_OVERRIDE_CTRL \
-                                0x00080000  // 1 - EN_XTAL comes from bit [3]
-                                            // of this register. 0 - EN_XTAL
-                                            // comes from FSM. Note : Final
-                                            // XTAL_EN reaches on
-                                            // TOP_CLKM_REG1_IN[3] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_HV_OVERRIDE_CTRL \
-                                0x00040000  // 1 - Enable HV Slicer comes from
-                                            // bit [2] of this register. 0 -
-                                            // Enable HV Slicer comes from FSM.
-                                            // Note : Final HV_SLICER_EN reaches
-                                            // on port TOP_CLKM_REG1_IN[1] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_LV_OVERRIDE_CTRL \
-                                0x00020000  // 1 - Enable LV Slicer comes from
-                                            // bit[1] of this register. 0 -
-                                            // Enable LV Slicer comes from FSM.
-                                            // Note : final LV_SLICER_EN reaches
-                                            // on port TOP_CLKM_REG1_IN[2] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLI_HV_PDN_OVERRIDE_CTRL \
-                                0x00010000  // 1 - Enable HV Pull-down comes
-                                            // from bit[0] of this register. 0 -
-                                            // Enable HV Pull-down comes from
-                                            // FSM. Note : Final HV_PULL_DOWN
-                                            // reaches on port
-                                            // TOP_CLKM_REG1_IN[0] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_TOP_LOWV \
-                                0x00008000  // Override for EN_DIG_BUF_TOP.
-                                            // Applicable if bit[20] is set to
-                                            // 1. Note : Final EN_DIG_BUF_TOP
-                                            // reaches on TOP_CLKM_REG1_IN[15]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLK_EN_WLAN_LOWV \
-                                0x00004000  // Override for EN_DIG_BUF_WLAN.
-                                            // Applicable if bit[19] is set to
-                                            // 1. Note : Final EN_DIG_BUF_WLAN
-                                            // reaches on TOP_CLKM_REG1_IN[14]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CLKOUT_FLIP_EN \
-                                0x00002000  // CLKOUT Flip Enable. Reaches on
-                                            // bit[13] of TOP_CLKM_REG1_IN[13]
-                                            // port of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV2_WLAN_CLK \
-                                0x00001000  // Enable divide2 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[12]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV3_WLAN_CLK \
-                                0x00000800  // Enable divide3 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[11]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_DIV4_WLAN_CLK \
-                                0x00000400  // Enable divide4 in WLAN Clk-path.
-                                            // Reaches on TOP_CLKM_REG1_IN[10]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CM_TMUX_SEL_LOWV_M \
-                                0x000003C0  // CM Test-mux select. Reaches on
-                                            // TOP_CLMM_REG1_IN[9:6] port of
-                                            // gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_CM_TMUX_SEL_LOWV_S 6
-#define GPRCM_REF_SLICER_CONTROLS0_SLICER_SPARE0_M \
-                                0x00000030  // Slicer spare0 control. Reaches
-                                            // on TOP_CLKM_REG1_IN[5:4] port of
-                                            // gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_SLICER_SPARE0_S 4
-#define GPRCM_REF_SLICER_CONTROLS0_EN_XTAL \
-                                0x00000008  // Enable XTAL override. Reaches on
-                                            // TOP_CLKM_REG1_IN[3] port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_HV \
-                                0x00000004  // Enable HV Slicer override.
-                                            // Reaches on TOP_CLKM_REG1_IN[1]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_LV \
-                                0x00000002  // Enable LV Slicer override.
-                                            // Reaches on TOP_CLKM_REG1_IN[2]
-                                            // port of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS0_EN_SLICER_HV_PDN \
-                                0x00000001  // Enable HV Pull-down override.
-                                            // Reaches on TOP_CLKM_REG1_IN[0]
-                                            // port of gprcm
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_SLICER_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_SPARE1_M \
-                                0x0000FC00  // Slicer spare1. Reaches on port
-                                            // TOP_CLKM_REG2_IN[15:10] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_SPARE1_S 10
-#define GPRCM_REF_SLICER_CONTROLS1_XOSC_TRIM_M \
-                                0x000003F0  // XOSC Trim. Reaches on port
-                                            // TOP_CLKM_REG2_IN[9:4] of gprcm
-
-#define GPRCM_REF_SLICER_CONTROLS1_XOSC_TRIM_S 4
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_ITRIM_CHANGE_TOGGLE \
-                                0x00000008  // Slicer ITRIM Toggle. Reaches on
-                                            // port TOP_CLKM_REG2_IN[3] of
-                                            // gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_LV_TRIM_M \
-                                0x00000007  // LV Slicer trim. Reaches on port
-                                            // TOP_CLKM_REG2_IN[2:0] of gprcm.
-
-#define GPRCM_REF_SLICER_CONTROLS1_SLICER_LV_TRIM_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_BGAP_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_reserved_M \
-                                0xFF800000
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_reserved_S 23
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_mag_trim_override_ctrl \
-                                0x00400000  // 1 - REF_MAG_TRIM comes from
-                                            // bit[4:0] of register
-                                            // REF_ANA_BGAP_CONTROLS1 [Addr :
-                                            // 0x0850]; 0 - REF_MAG_TRIM comes
-                                            // from efuse (After efc_done = 1).
-                                            // Note : Final REF_MAG_TRIM reaches
-                                            // on port TOP_PM_REG1[4:0] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_override_ctrl \
-                                0x00200000  // 1 - REF_V2I_TRIM comes from
-                                            // bit[9:6] of this register ; 0 -
-                                            // REF_V2I_TRIM comes from efuse
-                                            // (After efc_done = 1). Note :
-                                            // Final REF_V2I_TRIM reaches on
-                                            // port TOP_PM_REG0[9:6] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_override_ctrl \
-                                0x00100000  // 1 - REF_TEMP_TRIM comes from
-                                            // bit[15:10] of this register ; 0 -
-                                            // REF_TEMP_TRIM comes from efuse
-                                            // (After efc_done = 1). Note :
-                                            // Final REF_TEMP_TRIM reaches on
-                                            // port TOP_PM_REG0[15:10] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_startup_en_override_ctrl \
-                                0x00080000  // 1 - REF_STARTUP_EN comes from
-                                            // bit [3] of this register ; 0 -
-                                            // REF_STARTUP_EN comes from FSM.
-                                            // Note : Final REF_STARTUP_EN
-                                            // reaches on port TOP_PM_REG0[3] of
-                                            // gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_en_override_ctrl \
-                                0x00040000  // 1 - REF_V2I_EN comes from bit
-                                            // [2] of this register ; 0 -
-                                            // REF_V2I_EN comes from FSM. Note :
-                                            // Final REF_V2I_EN reaches on port
-                                            // TOP_PM_REG0[2] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_fc_en_override_ctrl \
-                                0x00020000  // 1 - REF_FC_EN comes from bit [1]
-                                            // of this register ; 0 - REF_FC_EN
-                                            // comes from FSM. Note : Final
-                                            // REF_FC_EN reaches on port
-                                            // TOP_PM_REG0[1] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_bgap_en_override_ctrl \
-                                0x00010000  // 1 - REF_BGAP_EN comes from bit
-                                            // [0] of this register ; 0 -
-                                            // REF_BGAP_EN comes from FSM. Note
-                                            // : Final REF_BGAP_EN reaches on
-                                            // port TOP_PM_REG0[0] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_M \
-                                0x0000FC00  // REF_TEMP_TRIM override.
-                                            // Applicable when bit [20] of this
-                                            // register set to 1. (or efc_done =
-                                            // 0) Note : Final REF_TEMP_TRIM
-                                            // reaches on port
-                                            // TOP_PM_REG0[15:10] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_temp_trim_S 10
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_M \
-                                0x000003C0  // REF_V2I_TRIM Override.
-                                            // Applicable when bit [21] of this
-                                            // register set to 1 . (of efc_done
-                                            // = 0) Note : Final REF_V2I_TRIM
-                                            // reaches on port TOP_PM_REG0[9:6]
-                                            // of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_trim_S 6
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_NU1_M \
-                                0x00000030
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_NU1_S 4
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_startup_en \
-                                0x00000008  // REF_STARTUP_EN override.
-                                            // Applicable when bit [19] of this
-                                            // register is set to 1. Note :
-                                            // Final REF_STARTUP_EN reaches on
-                                            // port TOP_PM_REG0[3] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_v2i_en \
-                                0x00000004  // REF_V2I_EN override. Applicable
-                                            // when bit [21] of this register is
-                                            // set to 1. Note : Final REF_V2I_EN
-                                            // reaches on port TOP_PM_REG0[2] of
-                                            // gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_fc_en \
-                                0x00000002  // REF_FC_EN override. Applicable
-                                            // when bit [17] of this register is
-                                            // set to 1. Note : Final REF_FC_EN
-                                            // reaches on port TOP_PM_REG0[1] of
-                                            // gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS0_mem_ref_bgap_en \
-                                0x00000001  // REF_BGAP_EN override. Applicable
-                                            // when bit [16] of this register
-                                            // set to 1. Note : Final
-                                            // REF_BGAP_EN reaches on port
-                                            // TOP_PM_REG0[0] of gprcm.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_BGAP_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_reserved_M \
-                                0xFFFF0000
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_reserved_S 16
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bg_spare_M \
-                                0x0000C000  // REF_BGAP_SPARE. Reaches on port
-                                            // TOP_PM_REG1[15:14] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bg_spare_S 14
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bgap_tmux_ctrl_M \
-                                0x00003E00  // REF_BGAP_TMUX_CTRL. Reaches on
-                                            // port TOP_PM_REG1[13:9] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_bgap_tmux_ctrl_S 9
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_filt_trim_M \
-                                0x000001E0  // REF_FILT_TRIM. Reaches on port
-                                            // TOP_PM_REG1[8:5] of gprcm.
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_filt_trim_S 5
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_mag_trim_M \
-                                0x0000001F  // REF_MAG_TRIM Override.
-                                            // Applicable when bit[22] of
-                                            // REF_ANA_BGAP_CONTROLS0 [0x084C]
-                                            // set to 1 (of efc_done = 0). Note
-                                            // : Final REF_MAG_TRIM reaches on
-                                            // port TOP_PM_REG1[4:0] of gprcm
-
-#define GPRCM_REF_ANA_BGAP_CONTROLS1_mem_ref_mag_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_SPARE_CONTROLS0 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_reserved_M \
-                                0xFFFF0000
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_reserved_S 16
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_mem_top_pm_reg3_M \
-                                0x0000FFFF  // Spare control. Reaches on
-                                            // TOP_PM_REG3 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS0_mem_top_pm_reg3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_ANA_SPARE_CONTROLS1 register.
-//
-//******************************************************************************
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg3_M \
-                                0xFFFF0000  // Spare control. Reaches on
-                                            // TOP_CLKM_REG3 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg3_S 16
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg4_M \
-                                0x0000FFFF  // Spare control. Reaches on
-                                            // TOP_CLKM_REG4 [15:0] of gprcm.
-
-#define GPRCM_REF_ANA_SPARE_CONTROLS1_mem_top_clkm_reg4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PSCON_OVERRIDES0 register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_off_override_M \
-                                0xFFFF0000
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_off_override_S 16
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_retain_override_M \
-                                0x0000FFFF
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES0_mem_memss_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PSCON_OVERRIDES1 register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_reserved_S 6
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_update_override_ctrl \
-                                0x00000020
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_update_override \
-                                0x00000010
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_sleep_override_ctrl \
-                                0x00000008
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_sleep_override \
-                                0x00000004
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memss_pscon_mem_off_override_ctrl \
-                                0x00000002
-
-#define GPRCM_MEMSS_PSCON_OVERRIDES1_mem_memms_pscon_mem_retain_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_PLL_REF_LOCK_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_reserved_S 3
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_mcu_apllmcs_lock_override \
-                                0x00000004
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_wlan_apllmcs_lock_override \
-                                0x00000002
-
-#define GPRCM_PLL_REF_LOCK_OVERRIDES_mem_ref_clk_valid_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PSCON_DEBUG register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PSCON_DEBUG_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_MCU_PSCON_DEBUG_reserved_S 6
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_rtc_ps_M \
-                                0x00000038  // MCU_PSCON_RTC_ON = "0000";
-                                            // MCU_PSCON_RTC_OFF = "0001";
-                                            // MCU_PSCON_RTC_RET = "0010";
-                                            // MCU_PSCON_RTC_OFF_TO_ON = "0011";
-                                            // MCU_PSCON_RTC_RET_TO_ON = "0100";
-                                            // MCU_PSCON_RTC_ON_TO_RET = "0101";
-                                            // MCU_PSCON_RTC_ON_TO_OFF = "0110";
-                                            // MCU_PSCON_RTC_RET_TO_ON_WAIT_OPP
-                                            // = "0111";
-                                            // MCU_PSCON_RTC_OFF_TO_ON_WAIT_OPP
-                                            // = "1000";
-
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_rtc_ps_S 3
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_sys_ps_M \
-                                0x00000007
-
-#define GPRCM_MCU_PSCON_DEBUG_mcu_pscon_sys_ps_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEMSS_PWR_PS register.
-//
-//******************************************************************************
-#define GPRCM_MEMSS_PWR_PS_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_MEMSS_PWR_PS_reserved_S 3
-#define GPRCM_MEMSS_PWR_PS_pwr_ps_memss_M \
-                                0x00000007  // MEMSS_PM_SLEEP = "000";
-                                            // MEMSS_PM_WAIT_OPP = "010";
-                                            // MEMSS_PM_ACTIVE = "011";
-                                            // MEMSS_PM_SLEEP_TO_ACTIVE = "100";
-                                            // MEMSS_PM_ACTIVE_TO_SLEEP = "101";
-
-#define GPRCM_MEMSS_PWR_PS_pwr_ps_memss_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_REF_FSM_DEBUG register.
-//
-//******************************************************************************
-#define GPRCM_REF_FSM_DEBUG_reserved_M \
-                                0xFFFFFFC0
-
-#define GPRCM_REF_FSM_DEBUG_reserved_S 6
-#define GPRCM_REF_FSM_DEBUG_fref_mode_M \
-                                0x00000030  // 01 - HV Mode ; 10 - LV Mode ; 11
-                                            // - XTAL Mode
-
-#define GPRCM_REF_FSM_DEBUG_fref_mode_S 4
-#define GPRCM_REF_FSM_DEBUG_ref_fsm_ps_M \
-                                0x0000000F  // constant FREF_CLK_OFF = "00000";
-                                            // constant FREF_EN_BGAP = "00001";
-                                            // constant FREF_EN_LDO = "00010";
-                                            // constant FREF_EN_SLI_HV =
-                                            // "00011"; constant
-                                            // FREF_EN_SLI_HV_PD = "00100";
-                                            // constant FREF_EN_DIG_BUF =
-                                            // "00101"; constant FREF_EN_OSC =
-                                            // "00110"; constant FREF_EN_SLI_LV
-                                            // = "00111"; constant
-                                            // FREF_EN_CLK_REQ = "01000";
-                                            // constant FREF_CLK_VALID =
-                                            // "01001"; constant FREF_MODE_DET0
-                                            // = "01010"; constant
-                                            // FREF_MODE_DET1 = "01011";
-                                            // constant FREF_MODE_DET2 =
-                                            // "10010"; constant FREF_MODE_DET3
-                                            // = "10011"; constant FREF_VALID =
-                                            // "01100"; constant FREF_VALID0 =
-                                            // "01101"; constant FREF_VALID1 =
-                                            // "01110"; constant FREF_VALID2 =
-                                            // "01111"; constant
-                                            // FREF_WAIT_EXT_TCXO0 = "10000";
-                                            // constant FREF_WAIT_EXT_TCXO1 =
-                                            // "10001";
-
-#define GPRCM_REF_FSM_DEBUG_ref_fsm_ps_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SYS_OPP_REQ_OVERRIDE register.
-//
-//******************************************************************************
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_reserved_M \
-                                0xFFFFFFE0
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_reserved_S 5
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_ctrl \
-                                0x00000010  // 1 - Override the sytem-opp
-                                            // request to ANATOP using bit0 of
-                                            // this register
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_M \
-                                0x0000000F  // "0001" - RUN ; "0010" - DSLP ;
-                                            // "0100" - LPDS ; Others - NA
-
-#define GPRCM_MEM_SYS_OPP_REQ_OVERRIDE_mem_sys_opp_req_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_TESTCTRL_PD_OPP_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_reserved_M \
-                                0xFFFFFFFE
-
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_reserved_S 1
-#define GPRCM_MEM_TESTCTRL_PD_OPP_CONFIG_mem_sleep_opp_enter_with_testpd_on \
-                                0x00000001  // 1 - Enable sleep-opp (DSLP/LPDS)
-                                            // entry even if Test-Pd is kept ON
-                                            // ; 0 - Donot enable sleep-opp
-                                            // (DSLP/LPDS) entry with Test-Pd
-                                            // ON.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_WL_FAST_CLK_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_reserved_M \
-                                0xFFFFFFF8
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_reserved_S 3
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_fast_clk_req_override_ctrl \
-                                0x00000004  // NA
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_fast_clk_req_override \
-                                0x00000002  // NA
-
-#define GPRCM_MEM_WL_FAST_CLK_REQ_OVERRIDES_mem_wl_sleep_with_clk_req_override \
-                                0x00000001  // NA
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_MCU_PD_MODE_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_mode_req_override_ctrl \
-                                0x00000004  // 1 - Override the MCU-PD power
-                                            // modes using bits [1] & [0] ;
-
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_pwrdn_req_override \
-                                0x00000002  // 1 - Request for power-down of
-                                            // MCU-PD ;
-
-#define GPRCM_MEM_MCU_PD_MODE_REQ_OVERRIDES_mem_mcu_pd_ret_req_override \
-                                0x00000001  // 1 - Request for retention mode
-                                            // of MCU-PD.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES_mem_mcspi_sram_off_req_override_ctrl \
-                                0x00000002  // 1- Override the MCSPI
-                                            // (Autonomous SPI) memory state
-                                            // using bit [0]
-
-#define GPRCM_MEM_MCSPI_SRAM_OFF_REQ_OVERRIDES_mem_mcspi_sram_off_req_override \
-                                0x00000001  // 1 - Request for power-down of
-                                            // Autonomous SPI 8k memory ; 0 -
-                                            // Donot request power-down of
-                                            // Autonomous SPI 8k Memory
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_WLAN_APLLMCS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_wlan_apllmcs_lock \
-                                0x00000100
-
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_mem_wlan_apllmcs_enable_override \
-                                0x00000002
-
-#define GPRCM_MEM_WLAN_APLLMCS_OVERRIDES_mem_wlan_apllmcs_enable_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_REF_FSM_CFG2 register.
-//
-//******************************************************************************
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_FC_DEASSERT_DELAY_M \
-                                0x00380000  // Number of RTC clocks for keeping
-                                            // the FC_EN asserted high
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_FC_DEASSERT_DELAY_S 19
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_STARTUP_DEASSERT_DELAY_M \
-                                0x00070000  // Number of RTC clocks for keeping
-                                            // the STARTUP_EN asserted high
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_STARTUP_DEASSERT_DELAY_S 16
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_EXT_TCXO_SETTLING_TIME_M \
-                                0x0000FFFF  // Number of RTC clocks for waiting
-                                            // for clock to settle.
-
-#define GPRCM_MEM_REF_FSM_CFG2_MEM_EXT_TCXO_SETTLING_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TESTCTRL_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_STATUS_S 1
-#define GPRCM_TESTCTRL_POWER_CTRL_TESTCTRL_PD_ENABLE \
-                                0x00000001  // 0 - Disable the TestCtrl-pd ; 1
-                                            // - Enable the TestCtrl-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_STATUS_M \
-                                0x00000006  // 1 - SSDIO-PD is ON ; 0 -
-                                            // SSDIO-PD is OFF
-
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_STATUS_S 1
-#define GPRCM_SSDIO_POWER_CTRL_SSDIO_PD_ENABLE \
-                                0x00000001  // 0 - Disable the SSDIO-pd ; 1 -
-                                            // Enable the SSDIO-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_N1_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_STATUS_M \
-                                0x00000006  // 1 - MCSPI_N1-PD is ON ; 0 -
-                                            // MCSPI_N1-PD if OFF
-
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_STATUS_S 1
-#define GPRCM_MCSPI_N1_POWER_CTRL_MCSPI_N1_PD_ENABLE \
-                                0x00000001  // 0 - Disable the MCSPI_N1-pd ; 1
-                                            // - Enable the MCSPI_N1-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_STATUS_M \
-                                0x00001C00
-
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_STATUS_S 10
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_REQ_OVERRIDE \
-                                0x00000200
-
-#define GPRCM_WELP_POWER_CTRL_WTOP_PD_REQ_OVERRIDE_CTRL \
-                                0x00000100
-
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_STATUS_S 1
-#define GPRCM_WELP_POWER_CTRL_WELP_PD_ENABLE \
-                                0x00000001  // 0 - Disable the WELP-pd ; 1 -
-                                            // Enable the WELP-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_POWER_CTRL register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_STATUS_M \
-                                0x00000006
-
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_STATUS_S 1
-#define GPRCM_WL_SDIO_POWER_CTRL_WL_SDIO_PD_ENABLE \
-                                0x00000001  // 0 - Disable the WL_SDIO-pd ; 1 -
-                                            // Enable the WL_SDIO-pd.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_SRAM_ACTIVE_PWR_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_SRAM_ACTIVE_PWR_CFG_WLAN_SRAM_ACTIVE_PWR_CFG_M \
-                                0x00FFFFFF  // SRAM (WTOP+DRP) state during
-                                            // Active-mode : 1 - SRAMs are ON ;
-                                            // 0 - SRAMs are OFF. Cluster
-                                            // information : [0] - 1st column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) [1] - 2nd column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [2] - 3rd column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [3] - 4th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [4] -
-                                            // 5th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [5] - 6th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [6] - 7th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [7] - 8th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [8] - 9th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [9] -
-                                            // 10th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [10] - 11th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [11] - 12th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [12] - 13th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [13] - 14th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [14] -
-                                            // 15th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [15] - 16th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [23:16] - Internal to
-                                            // WTOP Cluster
-
-#define GPRCM_WLAN_SRAM_ACTIVE_PWR_CFG_WLAN_SRAM_ACTIVE_PWR_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WLAN_SRAM_SLEEP_PWR_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WLAN_SRAM_SLEEP_PWR_CFG_WLAN_SRAM_SLEEP_PWR_CFG_M \
-                                0x00FFFFFF  // SRAM (WTOP+DRP) state during
-                                            // Sleep-mode : 1 - SRAMs are RET ;
-                                            // 0 - SRAMs are OFF. Cluster
-                                            // information : [0] - 1st column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) [1] - 2nd column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [2] - 3rd column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [3] - 4th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [4] -
-                                            // 5th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [5] - 6th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [6] - 7th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [7] - 8th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [8] - 9th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [9] -
-                                            // 10th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [10] - 11th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [11] - 12th column of
-                                            // MEMSS (Applicable only when owned
-                                            // by WTOP/PHY) ; [12] - 13th column
-                                            // of MEMSS (Applicable only when
-                                            // owned by WTOP/PHY) ; [13] - 14th
-                                            // column of MEMSS (Applicable only
-                                            // when owned by WTOP/PHY) ; [14] -
-                                            // 15th column of MEMSS (Applicable
-                                            // only when owned by WTOP/PHY) ;
-                                            // [15] - 16th column of MEMSS
-                                            // (Applicable only when owned by
-                                            // WTOP/PHY) ; [23:16] - Internal to
-                                            // WTOP Cluster
-
-#define GPRCM_WLAN_SRAM_SLEEP_PWR_CFG_WLAN_SRAM_SLEEP_PWR_CFG_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SECURE_INIT_DONE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SECURE_INIT_DONE_SECURE_INIT_DONE_STATUS \
-                                0x00000002  // 1-Secure mode init is done ;
-                                            // 0-Secure mode init is not done
-
-#define GPRCM_APPS_SECURE_INIT_DONE_APPS_SECURE_INIT_DONE \
-                                0x00000001  // Must be programmed 1 in order to
-                                            // say that secure-mode device init
-                                            // is done
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_DEV_MODE_INIT_DONE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_DEV_MODE_INIT_DONE_APPS_DEV_MODE_INIT_DONE \
-                                0x00000001  // 1 - Patch download and other
-                                            // initializations are done (before
-                                            // removing APPS resetn) for
-                                            // development mode (#3) . 0 -
-                                            // Development mode (#3) init is not
-                                            // done yet
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_EN_APPS_REBOOT register.
-//
-//******************************************************************************
-#define GPRCM_EN_APPS_REBOOT_EN_APPS_REBOOT \
-                                0x00000001  // 1 - When 1, disable the reboot
-                                            // of APPS after DevInit is
-                                            // completed. In this case, APPS
-                                            // will permanantly help in reset. 0
-                                            // - When 0, enable the reboot of
-                                            // APPS after DevInit is completed.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_APPS_PERIPH_PRESENT register.
-//
-//******************************************************************************
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_WLAN_GEM_PP \
-                                0x00010000  // 1 - Enable ; 0 - Disable
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_AES_PP \
-                                0x00008000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_DES_PP \
-                                0x00004000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_SHA_PP \
-                                0x00002000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_CAMERA_PP \
-                                0x00001000
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MMCHS_PP \
-                                0x00000800
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCASP_PP \
-                                0x00000400
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCSPI_A1_PP \
-                                0x00000200
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_MCSPI_A2_PP \
-                                0x00000100
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UDMA_PP \
-                                0x00000080
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_WDOG_PP \
-                                0x00000040
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UART_A0_PP \
-                                0x00000020
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_UART_A1_PP \
-                                0x00000010
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A0_PP \
-                                0x00000008
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A1_PP \
-                                0x00000004
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A2_PP \
-                                0x00000002
-
-#define GPRCM_MEM_APPS_PERIPH_PRESENT_APPS_GPT_A3_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_NWP_PERIPH_PRESENT register.
-//
-//******************************************************************************
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_ASYNC_BRIDGE_PP \
-                                0x00000200
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_MCSPI_N2_PP \
-                                0x00000100
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_GPT_N0_PP \
-                                0x00000080
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_GPT_N1_PP \
-                                0x00000040
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_WDOG_PP \
-                                0x00000020
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UDMA_PP \
-                                0x00000010
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UART_N0_PP \
-                                0x00000008
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_UART_N1_PP \
-                                0x00000004
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_SSDIO_PP \
-                                0x00000002
-
-#define GPRCM_MEM_NWP_PERIPH_PRESENT_NWP_MCSPI_N1_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MEM_SHARED_PERIPH_PRESENT register.
-//
-//******************************************************************************
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_MCSPI_PP \
-                                0x00000040
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_I2C_PP \
-                                0x00000020
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_A_PP \
-                                0x00000010
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_B_PP \
-                                0x00000008
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_C_PP \
-                                0x00000004
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_D_PP \
-                                0x00000002
-
-#define GPRCM_MEM_SHARED_PERIPH_PRESENT_SHARED_GPIO_E_PP \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_NWP_PWR_STATE_NWP_PWR_STATE_PS_M \
-                                0x00000F00  // "0000"- PORZ :- NWP is yet to be
-                                            // enabled by APPS during powerup
-                                            // (from HIB/OFF) ; "0011"- ACTIVE
-                                            // :- NWP is enabled, clocks and
-                                            // resets to NWP-SubSystem are
-                                            // enabled ; "0010"- LPDS :- NWP is
-                                            // in LPDS-mode ; Clocks and reset
-                                            // to NWP-SubSystem are gated ;
-                                            // "0101"- WAIT_FOR_OPP :- NWP is in
-                                            // transition from LPDS to ACTIVE,
-                                            // where it is waiting for OPP to be
-                                            // stable ; "1000"-
-                                            // WAKE_TIMER_OPP_REQ :- NWP is in
-                                            // transition from LPDS, where the
-                                            // wakeup cause is LPDS_Wake timer
-                                            // OTHERS : NA
-
-#define GPRCM_NWP_PWR_STATE_NWP_PWR_STATE_PS_S 8
-#define GPRCM_NWP_PWR_STATE_NWP_RCM_PS_M \
-                                0x00000007  // "000" - NWP_RUN : NWP is in RUN
-                                            // state (default) - Applicable only
-                                            // when NWP_PWR_STATE_PS = ACTIVE ;
-                                            // "001" - NWP_SLP : NWP is in SLEEP
-                                            // state (default) - Applicable only
-                                            // when NWP_PWR_STATE_PS = ACTIVE ;
-                                            // "010" - NWP_DSLP : NWP is in
-                                            // Deep-Sleep state (default) -
-                                            // Applicable only when
-                                            // NWP_PWR_STATE_PS = ACTIVE ; "011"
-                                            // - WAIT_FOR_ACTIVE : NWP is in
-                                            // transition from Deep-sleep to
-                                            // Run, where it is waiting for OPP
-                                            // to be stable ; "100" -
-                                            // WAIT_FOR_DSLP_TIMER_WAKE_REQ :
-                                            // NWP is in transition from
-                                            // Deep-sleep to Run, where the
-                                            // wakeup cause is deep-sleep
-                                            // wake-timer
-
-#define GPRCM_NWP_PWR_STATE_NWP_RCM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_APPS_PWR_STATE_APPS_PWR_STATE_PS_M \
-                                0x00000F00  // "0000"- PORZ :- APPS is waiting
-                                            // for PLL_clock during powerup
-                                            // (from HIB/OFF) ; "0011"- ACTIVE
-                                            // :- APPS is enabled, clocks and
-                                            // resets to APPS-SubSystem are
-                                            // enabled ; APPS might be either in
-                                            // Secure or Un-secure mode during
-                                            // this state. "1001" -
-                                            // SECURE_MODE_LPDS :- While in
-                                            // ACTIVE (Secure-mode), APPS had to
-                                            // program the DevInit_done bit at
-                                            // the end, after which it enters
-                                            // into this state, where the reset
-                                            // to APPS will be asserted. From
-                                            // this state APPS might either
-                                            // re-boot itself or enter into LPDS
-                                            // depending upon whether the device
-                                            // is 3200 or 3100. "0010"- LPDS :-
-                                            // APPS is in LPDS-mode ; Clocks and
-                                            // reset to APPS-SubSystem are gated
-                                            // ; "0101"- WAIT_FOR_OPP :- APPS is
-                                            // in transition from LPDS to
-                                            // ACTIVE, where it is waiting for
-                                            // OPP to be stable ; "1000" -
-                                            // WAKE_TIMER_OPP_REQ : APPS is in
-                                            // transition from LPDS, where the
-                                            // wakeup cause is LPDS_Wake timer ;
-                                            // "1010" - WAIT_FOR_PATCH_INIT :
-                                            // APPS enters into this state
-                                            // during development-mode #3 (SOP =
-                                            // 3), where it is waiting for patch
-                                            // download to complete and 0x4 hack
-                                            // is programmed. OTHERS : NA
-
-#define GPRCM_APPS_PWR_STATE_APPS_PWR_STATE_PS_S 8
-#define GPRCM_APPS_PWR_STATE_APPS_RCM_PS_M \
-                                0x00000007  // "000" - APPS_RUN : APPS is in
-                                            // RUN state (default) - Applicable
-                                            // only when APPS_PWR_STATE_PS =
-                                            // ACTIVE ; "001" - APPS_SLP : APPS
-                                            // is in SLEEP state (default) -
-                                            // Applicable only when
-                                            // APPS_PWR_STATE_PS = ACTIVE ;
-                                            // "010" - APPS_DSLP : APPS is in
-                                            // Deep-Sleep state (default) -
-                                            // Applicable only when
-                                            // APPS_PWR_STATE_PS = ACTIVE ;
-                                            // "011" - WAIT_FOR_ACTIVE : APPS is
-                                            // in transition from Deep-sleep to
-                                            // Run, where it is waiting for OPP
-                                            // to be stable ; "100" -
-                                            // WAIT_FOR_DSLP_TIMER_WAKE_REQ :
-                                            // APPS is in transition from
-                                            // Deep-sleep to Run, where the
-                                            // wakeup cause is deep-sleep
-                                            // wake-timer
-
-#define GPRCM_APPS_PWR_STATE_APPS_RCM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PWR_STATE register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PWR_STATE_MCU_OPP_PS_M \
-                                0x0000001F  // TBD
-
-#define GPRCM_MCU_PWR_STATE_MCU_OPP_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PM_PS register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PM_PS_WTOP_PM_PS_M \
-                                0x00000007  // "011" - WTOP_PM_ACTIVE (Default)
-                                            // :- WTOP_Pd is in ACTIVE mode;
-                                            // "100" - WTOP_PM_ACTIVE_TO_SLEEP
-                                            // :- WTOP_Pd is in transition from
-                                            // ACTIVE to SLEEP ; "000" -
-                                            // WTOP_PM_SLEEP : WTOP-Pd is in
-                                            // Sleep-state ; "100" -
-                                            // WTOP_PM_SLEEP_TO_ACTIVE : WTOP_Pd
-                                            // is in transition from SLEEP to
-                                            // ACTIVE ; "000" -
-                                            // WTOP_PM_WAIT_FOR_OPP : Wait for
-                                            // OPP to be stable ;
-
-#define GPRCM_WTOP_PM_PS_WTOP_PM_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PD_RESETZ_OVERRIDE_REG_WTOP_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WTOP PD
-                                            // Resetz. When set to 1,
-                                            // WTOP_Resetz will be controlled by
-                                            // bit [0]
-
-#define GPRCM_WTOP_PD_RESETZ_OVERRIDE_REG_WTOP_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WTOP PD Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WELP_PD_RESETZ_OVERRIDE_REG_WELP_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WELP PD
-                                            // Resetz. When set to 1,
-                                            // WELP_Resetz will be controlled by
-                                            // bit [0]
-
-#define GPRCM_WELP_PD_RESETZ_OVERRIDE_REG_WELP_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WELP PD Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_PD_RESETZ_OVERRIDE_REG_WL_SDIO_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for WL_SDIO
-                                            // Resetz. When set to 1,
-                                            // WL_SDIO_Resetz will be controlled
-                                            // by bit [0]
-
-#define GPRCM_WL_SDIO_PD_RESETZ_OVERRIDE_REG_WL_SDIO_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for WL_SDIO Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_PD_RESETZ_OVERRIDE_REG_SSDIO_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for SSDIO
-                                            // Resetz. When set to 1,
-                                            // SSDIO_Resetz will be controlled
-                                            // by bit [0]
-
-#define GPRCM_SSDIO_PD_RESETZ_OVERRIDE_REG_SSDIO_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for SSDIO Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_N1_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_N1_PD_RESETZ_OVERRIDE_REG_MCSPI_N1_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for MCSPI_N1
-                                            // Resetz. When set to 1,
-                                            // MCSPI_N1_Resetz will be
-                                            // controlled by bit [0]
-
-#define GPRCM_MCSPI_N1_PD_RESETZ_OVERRIDE_REG_MCSPI_N1_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for MCSPI_N1 Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TESTCTRL_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_TESTCTRL_PD_RESETZ_OVERRIDE_REG_TESTCTRL_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for TESTCTRL-PD
-                                            // Resetz. When set to 1,
-                                            // TESTCTRL_Resetz will be
-                                            // controlled by bit [0]
-
-#define GPRCM_TESTCTRL_PD_RESETZ_OVERRIDE_REG_TESTCTRL_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for TESTCTRL Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PD_RESETZ_OVERRIDE_REG register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PD_RESETZ_OVERRIDE_REG_MCU_PD_RESETZ_OVERRIDE_CTRL \
-                                0x00000100  // Override control for MCU-PD
-                                            // Resetz. When set to 1, MCU_Resetz
-                                            // will be controlled by bit [0]
-
-#define GPRCM_MCU_PD_RESETZ_OVERRIDE_REG_MCU_PD_RESETZ_OVERRIDE \
-                                0x00000001  // Override for MCU Resetz.
-                                            // Applicable only when bit[8] is
-                                            // set to 1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG0 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG0_FUSEFARM_ROW_14_M \
-                                0xFFFFFFFF  // This is ROW_14 [31:0] of
-                                            // FUSEFARM. [0:0] : XTAL_IS_26MHZ
-                                            // [5:1] : TOP_CLKM_RTRIM[4:0]
-                                            // [10:6] : ANA_BGAP_MAG_TRIM[4:0]
-                                            // [16:11] : ANA_BGAP_TEMP_TRIM[5:0]
-                                            // [20:17] : ANA_BGAP_V2I_TRIM[3:0]
-                                            // [25:22] : PROCESS INDICATOR
-                                            // [26:26] : Reserved [31:27] :
-                                            // FUSEROM Version
-
-#define GPRCM_GPRCM_EFUSE_READ_REG0_FUSEFARM_ROW_14_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG1 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG1_FUSEFARM_ROW_15_LSW_M \
-                                0x0000FFFF  // This is ROW_15[15:0] of FUSEFARM
-                                            // 1. NWP Peripheral Present bits
-                                            // [15:8] NWP_GPT_N0_PP [15:15]
-                                            // NWP_GPT_N1_PP [14:14] NWP_WDOG_PP
-                                            // [13:13] NWP_UDMA_PP [12:12]
-                                            // NWP_UART_N0_PP [11:11]
-                                            // NWP_UART_N1_PP [10:10]
-                                            // NWP_SSDIO_PP [9:9]
-                                            // NWP_MCSPI_N1_PP [8:8] 2. Shared
-                                            // Peripheral Present bits [7:0]
-                                            // SHARED SPI PP [6:6]
-                                            // SHARED I2C PP [5:5] SHARED
-                                            // GPIO-A PP [4:4] SHARED GPIO-B PP
-                                            // [3:3] SHARED GPIO-C PP [2:2]
-                                            // SHARED GPIO-D PP [1:1] SHARED
-                                            // GPIO-E PP [0:0]
-
-#define GPRCM_GPRCM_EFUSE_READ_REG1_FUSEFARM_ROW_15_LSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG2 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG2_FUSEFARM_ROW_16_LSW_ROW_15_MSW_M \
-                                0xFFFFFFFF  // This is ROW_16[15:0] &
-                                            // ROW_15[31:16] of FUSEFARM.
-                                            // [31:21] - Reserved [20:16] -
-                                            // CHIP_ID [15:15] - SSBD SOP
-                                            // Control [14:14] - SSBD TAP
-                                            // Control [13:2] - APPS Peripheral
-                                            // Present bits : APPS_CAMERA_PP
-                                            // [13:13] APPS_MMCHS_PP [12:12]
-                                            // APPS_MCASP_PP [11:11]
-                                            // APPS_MCSPI_A1_PP [10:10]
-                                            // APPS_MCSPI_A2_PP [9:9]
-                                            // APPS_UDMA_PP [8:8] APPS_WDOG_PP
-                                            // [7:7] APPS_UART_A0_PP [6:6]
-                                            // APPS_UART_A1_PP [5:5]
-                                            // APPS_GPT_A0_PP [4:4]
-                                            // APPS_GPT_A1_PP [3:3]
-                                            // APPS_GPT_A2_PP [2:2]
-                                            // APPS_GPT_A3_PP [1:1] [0:0] - NWP
-                                            // Peripheral present bits
-                                            // NWP_ACSPI_PP [0:0]
-
-#define GPRCM_GPRCM_EFUSE_READ_REG2_FUSEFARM_ROW_16_LSW_ROW_15_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG3 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG3_FUSEFARM_ROW_17_LSW_ROW_16_MSW_M \
-                                0xFFFFFFFF  // This is ROW_17[15:0] &
-                                            // ROW_16[31:16] of FUSEFARM :
-                                            // [31:16] - TEST_TAP_KEY(15:0)
-                                            // [15:0] - Reserved
-
-#define GPRCM_GPRCM_EFUSE_READ_REG3_FUSEFARM_ROW_17_LSW_ROW_16_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_MEM_RET_CFG register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_MEM_RET_CFG_WTOP_MEM_RET_CFG \
-                                0x00000001  // 1 - Soft-compile memories in
-                                            // WTOP can be turned-off during
-                                            // WTOP-sleep mode ; 0 -
-                                            // Soft-compile memories in WTOP
-                                            // must be kept on during WTOP-sleep
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG0 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG0_Q_FACTOR_M \
-                                0x007FFFFF  // TBD
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG0_Q_FACTOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG1 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG1_P_FACTOR_M \
-                                0x000FFFFF  // TBD
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG1_P_FACTOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_CFG2 register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_CONSECUTIVE_SWALLOW_M \
-                                0x00000018
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_CONSECUTIVE_SWALLOW_S 3
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_PRBS_GAIN \
-                                0x00000004
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_PRBS_ENABLE \
-                                0x00000002
-
-#define GPRCM_COEX_CLK_SWALLOW_CFG2_SWALLOW_ENABLE \
-                                0x00000001  // TBD
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_COEX_CLK_SWALLOW_ENABLE register.
-//
-//******************************************************************************
-#define GPRCM_COEX_CLK_SWALLOW_ENABLE_COEX_CLK_SWALLOW_ENABLE \
-                                0x00000001  // 1 - Enable switching of sysclk
-                                            // to Coex-clk path ; 0 - Disable
-                                            // switching of sysclk to Coex-clk
-                                            // path.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_DCDC_CLK_GEN_CONFIG register.
-//
-//******************************************************************************
-#define GPRCM_DCDC_CLK_GEN_CONFIG_DCDC_CLK_ENABLE \
-                                0x00000001  // 1 - Enable the clock for DCDC
-                                            // (PWM-mode) ; 0 - Disable the
-                                            // clock for DCDC (PWM-mode)
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG4 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG4_FUSEFARM_ROW_17_MSW_M \
-                                0x0000FFFF  // This corresponds to
-                                            // ROW_17[31:16] of the FUSEFARM :
-                                            // [15:0] : TEST_TAP_KEY(31:16)
-
-#define GPRCM_GPRCM_EFUSE_READ_REG4_FUSEFARM_ROW_17_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG5 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG5_FUSEFARM_ROW_18_M \
-                                0xFFFFFFFF  // Corresponds to ROW_18 of
-                                            // FUSEFARM. [29:0] -
-                                            // MEMSS_COLUMN_SEL_LSW ; [30:30] -
-                                            // WLAN GEM DISABLE ; [31:31] -
-                                            // SERIAL WIRE JTAG SELECT
-
-#define GPRCM_GPRCM_EFUSE_READ_REG5_FUSEFARM_ROW_18_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG6 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG6_FUSEFARM_ROW_19_LSW_M \
-                                0x0000FFFF  // Corresponds to ROW_19[15:0] of
-                                            // FUSEFARM. [15:0] :
-                                            // MEMSS_COLUMN_SEL_MSW
-
-#define GPRCM_GPRCM_EFUSE_READ_REG6_FUSEFARM_ROW_19_LSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG7 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG7_FUSEFARM_ROW_20_LSW_ROW_19_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_20[15:0] &
-                                            // ROW_19[31:16] of FUSEFARM.
-                                            // FLASH_REGION0
-
-#define GPRCM_GPRCM_EFUSE_READ_REG7_FUSEFARM_ROW_20_LSW_ROW_19_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG8 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG8_FUSEFARM_ROW_21_LSW_ROW_20_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_21[15:0] &
-                                            // ROW_20[31:16] of FUSEFARM.
-                                            // FLASH_REGION1
-
-#define GPRCM_GPRCM_EFUSE_READ_REG8_FUSEFARM_ROW_21_LSW_ROW_20_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG9 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG9_FUSEFARM_ROW_22_LSW_ROW_21_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_22[15:0] &
-                                            // ROW_21[31:16] of FUSEFARM.
-                                            // FLASH_REGION2
-
-#define GPRCM_GPRCM_EFUSE_READ_REG9_FUSEFARM_ROW_22_LSW_ROW_21_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG10 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG10_FUSEFARM_ROW_23_LSW_ROW_22_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_23[15:0] &
-                                            // ROW_22[31:16] of FUSEFARM.
-                                            // FLASH_REGION3
-
-#define GPRCM_GPRCM_EFUSE_READ_REG10_FUSEFARM_ROW_23_LSW_ROW_22_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_EFUSE_READ_REG11 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_EFUSE_READ_REG11_FUSEFARM_ROW_24_LSW_ROW_23_MSW_M \
-                                0xFFFFFFFF  // Corresponds to ROW_24[15:0] &
-                                            // ROW_23[31:16] of FUSEFARM.
-                                            // FLASH_DESCRIPTOR
-
-#define GPRCM_GPRCM_EFUSE_READ_REG11_FUSEFARM_ROW_24_LSW_ROW_23_MSW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG0 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG0_FUSEFARM_191_160_M \
-                                0xFFFFFFFF  // Corresponds to bits [191:160] of
-                                            // the FUSEFARM. This is ROW_5 of
-                                            // FUSEFARM [191:160] : [31:0] :
-                                            // DIE_ID0 [31:0] : DEVX [11:0] DEVY
-                                            // [23:12] DEVWAF [29:24] DEV_SPARE
-                                            // [31:30]
-
-#define GPRCM_GPRCM_DIEID_READ_REG0_FUSEFARM_191_160_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG1 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG1_FUSEFARM_223_192_M \
-                                0xFFFFFFFF  // Corresponds to bits [223:192] of
-                                            // the FUSEFARM. This is ROW_6 of
-                                            // FUSEFARM :- DEVLOT [23:0] DEVFAB
-                                            // [28:24] DEVFABBE [31:29]
-
-#define GPRCM_GPRCM_DIEID_READ_REG1_FUSEFARM_223_192_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG2 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG2_FUSEFARM_255_224_M \
-                                0xFFFFFFFF  // Corresponds to bits [255:224] of
-                                            // the FUSEFARM. This is ROW_7 of
-                                            // FUSEFARM:- DEVDESREV[4:0]
-                                            // Memrepair[5:5] MakeDefined[16:6]
-                                            // CHECKSUM[30:17] Reserved :
-                                            // [31:31]
-
-#define GPRCM_GPRCM_DIEID_READ_REG2_FUSEFARM_255_224_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG3 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG3_FUSEFARM_287_256_M \
-                                0xFFFFFFFF  // Corresponds to bits [287:256] of
-                                            // the FUSEFARM. This is ROW_8 of
-                                            // FUSEFARM :- DIEID0 - DEVREG
-                                            // [31:0]
-
-#define GPRCM_GPRCM_DIEID_READ_REG3_FUSEFARM_287_256_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_GPRCM_DIEID_READ_REG4 register.
-//
-//******************************************************************************
-#define GPRCM_GPRCM_DIEID_READ_REG4_FUSEFARM_319_288_M \
-                                0xFFFFFFFF  // Corresponds to bits [319:288] of
-                                            // the FUSEFARM. This is ROW_9 of
-                                            // FUSEFARM :- [7:0] - VBATMON ;
-                                            // [13:8] - BUFF_OFFSET ; [15:15] -
-                                            // DFT_GXG ; [14:14] - DFT_GLX ;
-                                            // [19:16] - PHY ROM Version ;
-                                            // [23:20] - MAC ROM Version ;
-                                            // [27:24] - NWP ROM Version ;
-                                            // [31:28] - APPS ROM Version
-
-#define GPRCM_GPRCM_DIEID_READ_REG4_FUSEFARM_319_288_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_APPS_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_APPS_SS_OVERRIDES_reserved_M \
-                                0xFFFFFC00
-
-#define GPRCM_APPS_SS_OVERRIDES_reserved_S 10
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_refclk_gating_override \
-                                0x00000200
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_refclk_gating_override_ctrl \
-                                0x00000100
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_pllclk_gating_override \
-                                0x00000080
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_pllclk_gating_override_ctrl \
-                                0x00000040
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_por_rstn_override \
-                                0x00000020
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysrstn_override \
-                                0x00000010
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysclk_gating_override \
-                                0x00000008
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_por_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysrstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_APPS_SS_OVERRIDES_mem_apps_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_NWP_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_NWP_SS_OVERRIDES_reserved_M \
-                                0xFFFFFC00
-
-#define GPRCM_NWP_SS_OVERRIDES_reserved_S 10
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_refclk_gating_override \
-                                0x00000200
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_refclk_gating_override_ctrl \
-                                0x00000100
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_pllclk_gating_override \
-                                0x00000080
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_pllclk_gating_override_ctrl \
-                                0x00000040
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_por_rstn_override \
-                                0x00000020
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysrstn_override \
-                                0x00000010
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysclk_gating_override \
-                                0x00000008
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_por_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysrstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_NWP_SS_OVERRIDES_mem_nwp_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SHARED_SS_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_SHARED_SS_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_SHARED_SS_OVERRIDES_reserved_S 8
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_pllclk_gating_override_ctrl \
-                                0x00000080
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_pllclk_gating_override \
-                                0x00000040
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_refclk_gating_override_ctrl \
-                                0x00000020
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_refclk_gating_override \
-                                0x00000010
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_rstn_override \
-                                0x00000008
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_sysclk_gating_override \
-                                0x00000004
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_rstn_override_ctrl \
-                                0x00000002
-
-#define GPRCM_SHARED_SS_OVERRIDES_mem_shared_sysclk_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_IDMEM_CORE_RST_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_reserved_S 8
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_sysrstn_override \
-                                0x00000080
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_fmc_rstn_override \
-                                0x00000040
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_SPARE_RW1 \
-                                0x00000020
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_piosc_gating_override \
-                                0x00000010
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_sysrstn_override_ctrl \
-                                0x00000008
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_fmc_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_SPARE_RW0 \
-                                0x00000002
-
-#define GPRCM_IDMEM_CORE_RST_OVERRIDES_mem_idmem_core_piosc_gating_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_TOP_DIE_FSM_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_reserved_M \
-                                0xFFFFF000
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_reserved_S 12
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_pgoodin_override_ctrl \
-                                0x00000800
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_pgoodin_override \
-                                0x00000400
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_hclk_gating_override \
-                                0x00000200
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_piosc_gating_override \
-                                0x00000100
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_rstn_override \
-                                0x00000080
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_ponin_override \
-                                0x00000040
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_flash_ready_override \
-                                0x00000020
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_hclk_gating_override_ctrl \
-                                0x00000010
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_piosc_gating_override_ctrl \
-                                0x00000008
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_rstn_override_ctrl \
-                                0x00000004
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_d2d_pwr_switch_ponin_override_ctrl \
-                                0x00000002
-
-#define GPRCM_TOP_DIE_FSM_OVERRIDES_mem_flash_ready_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCU_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MCU_PSCON_OVERRIDES_reserved_M \
-                                0xFFF00000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_reserved_S 20
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_sleep_override_ctrl \
-                                0x00080000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_update_override_ctrl \
-                                0x00040000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_ctrl \
-                                0x00020000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_ctrl \
-                                0x00010000
-
-#define GPRCM_MCU_PSCON_OVERRIDES_NU1_M \
-                                0x0000FC00
-
-#define GPRCM_MCU_PSCON_OVERRIDES_NU1_S 10
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_sleep_override \
-                                0x00000200
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_update_override \
-                                0x00000100
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_M \
-                                0x000000F0
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_off_override_S 4
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_M \
-                                0x0000000F
-
-#define GPRCM_MCU_PSCON_OVERRIDES_mem_mcu_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WTOP_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WTOP_PSCON_OVERRIDES_reserved_M \
-                                0xFFC00000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_reserved_S 22
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_sleep_override_ctrl \
-                                0x00200000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_update_override_ctrl \
-                                0x00100000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_ctrl \
-                                0x00080000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_ctrl \
-                                0x00040000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_sleep_override \
-                                0x00020000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_update_override \
-                                0x00010000
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_M \
-                                0x0000FF00
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_off_override_S 8
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_M \
-                                0x000000FF
-
-#define GPRCM_WTOP_PSCON_OVERRIDES_mem_wtop_pscon_mem_retain_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WELP_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WELP_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_WELP_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_WELP_PSCON_OVERRIDES_mem_welp_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_WELP_PSCON_OVERRIDES_mem_welp_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_WL_SDIO_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_mem_wl_sdio_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_WL_SDIO_PSCON_OVERRIDES_mem_wl_sdio_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_MCSPI_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_MCSPI_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFF00
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_reserved_S 8
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_retain_override_ctrl \
-                                0x00000080
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_off_override_ctrl \
-                                0x00000040
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_retain_override \
-                                0x00000020
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_off_override \
-                                0x00000010
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_update_override_ctrl \
-                                0x00000008
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_mem_update_override \
-                                0x00000004
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_MCSPI_PSCON_OVERRIDES_mem_mcspi_pscon_sleep_override \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// GPRCM_O_SSDIO_PSCON_OVERRIDES register.
-//
-//******************************************************************************
-#define GPRCM_SSDIO_PSCON_OVERRIDES_reserved_M \
-                                0xFFFFFFFC
-
-#define GPRCM_SSDIO_PSCON_OVERRIDES_reserved_S 2
-#define GPRCM_SSDIO_PSCON_OVERRIDES_mem_ssdio_pscon_sleep_override_ctrl \
-                                0x00000002
-
-#define GPRCM_SSDIO_PSCON_OVERRIDES_mem_ssdio_pscon_sleep_override \
-                                0x00000001
-
-
-
-
-#endif // __HW_GPRCM_H__
diff --git a/ports/cc3200/hal/inc/hw_hib1p2.h b/ports/cc3200/hal/inc/hw_hib1p2.h
deleted file mode 100644
index 95e25ff7cf3f8..0000000000000
--- a/ports/cc3200/hal/inc/hw_hib1p2.h
+++ /dev/null
@@ -1,1750 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_HIB1P2_H__
-#define __HW_HIB1P2_H__
-
-//*****************************************************************************
-//
-// The following are defines for the HIB1P2 register offsets.
-//
-//*****************************************************************************
-#define HIB1P2_O_SRAM_SKA_LDO_PARAMETERS0 \
-                                0x00000000
-
-#define HIB1P2_O_SRAM_SKA_LDO_PARAMETERS1 \
-                                0x00000004
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS0 \
-                                0x00000008
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS1 \
-                                0x0000000C
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS2 \
-                                0x00000010
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS3 \
-                                0x00000014
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS4 \
-                                0x00000018
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS5 \
-                                0x0000001C
-
-#define HIB1P2_O_DIG_DCDC_PARAMETERS6 \
-                                0x00000020
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS0 \
-                                0x00000024
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS1 \
-                                0x00000028
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS16 \
-                                0x00000064
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS17 \
-                                0x00000068
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS18 \
-                                0x0000006C
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS19 \
-                                0x00000070
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS0 \
-                                0x00000074
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS1 \
-                                0x00000078
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS2 \
-                                0x0000007C
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS3 \
-                                0x00000080
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS4 \
-                                0x00000084
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS5 \
-                                0x00000088
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS6 \
-                                0x0000008C
-
-#define HIB1P2_O_PMBIST_PARAMETERS0 \
-                                0x00000094
-
-#define HIB1P2_O_PMBIST_PARAMETERS1 \
-                                0x00000098
-
-#define HIB1P2_O_PMBIST_PARAMETERS2 \
-                                0x0000009C
-
-#define HIB1P2_O_PMBIST_PARAMETERS3 \
-                                0x000000A0
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS8 \
-                                0x000000A4
-
-#define HIB1P2_O_ANA_DCDC_PARAMETERS_OVERRIDE \
-                                0x000000A8
-
-#define HIB1P2_O_FLASH_DCDC_PARAMETERS_OVERRIDE \
-                                0x000000AC
-
-#define HIB1P2_O_DIG_DCDC_VTRIM_CFG \
-                                0x000000B0
-
-#define HIB1P2_O_DIG_DCDC_FSM_PARAMETERS \
-                                0x000000B4
-
-#define HIB1P2_O_ANA_DCDC_FSM_PARAMETERS \
-                                0x000000B8
-
-#define HIB1P2_O_SRAM_SKA_LDO_FSM_PARAMETERS \
-                                0x000000BC
-
-#define HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG \
-                                0x000000C0
-
-#define HIB1P2_O_CM_OSC_16M_CONFIG \
-                                0x000000C4
-
-#define HIB1P2_O_SOP_SENSE_VALUE \
-                                0x000000C8
-
-#define HIB1P2_O_HIB_RTC_TIMER_LSW_1P2 \
-                                0x000000CC
-
-#define HIB1P2_O_HIB_RTC_TIMER_MSW_1P2 \
-                                0x000000D0
-
-#define HIB1P2_O_HIB1P2_BGAP_TRIM_OVERRIDES \
-                                0x000000D4
-
-#define HIB1P2_O_HIB1P2_EFUSE_READ_REG0 \
-                                0x000000D8
-
-#define HIB1P2_O_HIB1P2_EFUSE_READ_REG1 \
-                                0x000000DC
-
-#define HIB1P2_O_HIB1P2_POR_TEST_CTRL \
-                                0x000000E0
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG0 \
-                                0x000000E4
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG1 \
-                                0x000000E8
-
-#define HIB1P2_O_HIB_TIMER_SYNC_CFG2 \
-                                0x000000EC
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_ADJ_VAL \
-                                0x000000F0
-
-#define HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW \
-                                0x000000F4
-
-#define HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW \
-                                0x000000F8
-
-#define HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW \
-                                0x000000FC
-
-#define HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW \
-                                0x00000100
-
-#define HIB1P2_O_HIB_TIMER_SYNC_WAKE_OFFSET_ERR \
-                                0x00000104
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW \
-                                0x00000108
-
-#define HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW \
-                                0x0000010C
-
-#define HIB1P2_O_CM_SPARE       0x00000110
-#define HIB1P2_O_PORPOL_SPARE   0x00000114
-#define HIB1P2_O_MEM_DIG_DCDC_CLK_CONFIG \
-                                0x00000118
-
-#define HIB1P2_O_MEM_ANA_DCDC_CLK_CONFIG \
-                                0x0000011C
-
-#define HIB1P2_O_MEM_FLASH_DCDC_CLK_CONFIG \
-                                0x00000120
-
-#define HIB1P2_O_MEM_PA_DCDC_CLK_CONFIG \
-                                0x00000124
-
-#define HIB1P2_O_MEM_SLDO_VNWA_OVERRIDE \
-                                0x00000128
-
-#define HIB1P2_O_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE \
-                                0x0000012C
-
-#define HIB1P2_O_MEM_HIB_FSM_DEBUG \
-                                0x00000130
-
-#define HIB1P2_O_MEM_SLDO_VNWA_SW_CTRL \
-                                0x00000134
-
-#define HIB1P2_O_MEM_SLDO_WEAK_PROCESS \
-                                0x00000138
-
-#define HIB1P2_O_MEM_PA_DCDC_OV_UV_STATUS \
-                                0x0000013C
-
-#define HIB1P2_O_MEM_CM_TEST_MODE \
-                                0x00000140
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_itrim_lowv_M \
-                                0xC0000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_itrim_lowv_S 30
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_iq_trim_lowv_M \
-                                0x30000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_iq_trim_lowv_S 28
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_sc_prot_lowv \
-                                0x08000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_lowv_override \
-                                0x04000000  // FSM Override value for SLDO_EN :
-                                            // Applicable only when bit [4] of
-                                            // this register is set to 1.
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_low_pwr_lowv \
-                                0x02000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_int_cap_sel_lowv \
-                                0x01000000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_vtrim_lowv_M \
-                                0x00FC0000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_vtrim_lowv_S 18
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_spare_lowv_M \
-                                0x0003FF00
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_spare_lowv_S 8
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_lowv_override \
-                                0x00000080  // FSM Override value for
-                                            // SKA_LDO_EN : Applicable only when
-                                            // bit [3] of this register is set
-                                            // to 1.
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_cap_ref_lowv \
-                                0x00000040
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_resdiv_ref_lowv \
-                                0x00000020
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_sldo_en_lowv_fsm_override_ctrl \
-                                0x00000010  // When 1, bit[26] of this register
-                                            // will be used as SLDO_EN
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_mem_skaldo_en_lowv_fsm_override_ctrl \
-                                0x00000008  // When 1, bit[26] of this register
-                                            // will be used as SKA_LDO_EN
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_NA1_M \
-                                0x00000007
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS0_NA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_ctrl_lowv_M \
-                                0xFFC00000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_ctrl_lowv_S 22
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_vtrim_lowv_M \
-                                0x003F0000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_vtrim_lowv_S 16
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_sldo_en_tload_lowv \
-                                0x00008000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_tload_lowv \
-                                0x00004000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_cap_sw_en_lowv \
-                                0x00002000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_hib_lowv \
-                                0x00001000
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_mem_skaldo_en_vref_buf_lowv \
-                                0x00000800
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_NA2_M \
-                                0x000007FF
-
-#define HIB1P2_SRAM_SKA_LDO_PARAMETERS1_NA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_lowv_override \
-                                0x80000000  // Override value for DCDC_DIG_EN :
-                                            // Applicable only when bit [31] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_subreg_1p8v_lowv_override \
-                                0x20000000  // Override value for
-                                            // DCDC_DIG_EN_SUBREG_1P8V :
-                                            // Applicable only when bit [30] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_subreg_1p2v_lowv_override \
-                                0x10000000  // Override value for
-                                            // DCDC_DIG_EN_SUBREG_1P2V :
-                                            // Applicable only when bit [29] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_slp_mode_lowv_override \
-                                0x08000000  // Override value for
-                                            // DCDC_DIG_SLP_EN : Applicable only
-                                            // when bit [28] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1. Else from FSM
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_ldo_mode_lowv \
-                                0x04000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_nfet_rds_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_pfet_rds_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_ext_smps_override_mode_lowv \
-                                0x00800000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_clk_in_lowv_enable \
-                                0x00400000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_vtrim_lowv_override_M \
-                                0x003F0000  // Override value for
-                                            // DCDC_DIG_VTRIM : Applicable only
-                                            // when bit [27] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1.
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_vtrim_lowv_override_S 16
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_pfm_ripple_trim_lowv_M \
-                                0x0000C000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_pfm_ripple_trim_lowv_S 14
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_iq_ctrl_lowv_M \
-                                0x00003000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_iq_ctrl_lowv_S 12
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_en_cl_non_ov_lowv \
-                                0x00000800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_non_ov_ctrl_lowv_M \
-                                0x00000780
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_non_ov_ctrl_lowv_S 7
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_slp_drv_dly_sel_lowv_M \
-                                0x00000078
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_mem_dcdc_dig_slp_drv_dly_sel_lowv_S 3
-#define HIB1P2_DIG_DCDC_PARAMETERS0_NA3_M \
-                                0x00000007
-
-#define HIB1P2_DIG_DCDC_PARAMETERS0_NA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_lowv_fsm_override_ctrl \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_subreg_1p8v_fsm_override_ctrl \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_subreg_1p2v_fsm_override_ctrl \
-                                0x20000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_en_slp_mode_lowv_fsm_override_ctrl \
-                                0x10000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_vtrim_fsm_override_ctrl \
-                                0x08000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_cot_mode_en_lowv_fsm_override_ctrl \
-                                0x04000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_mem_dcdc_dig_ilim_trim_lowv_efc_override_ctrl \
-                                0x02000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_NA4_M \
-                                0x01FFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS1_NA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pfet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pfet_sel_lowv_S 28
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_nfet_sel_lowv_M \
-                                0x0F000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_nfet_sel_lowv_S 24
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_stagger_ctrl_lowv_M \
-                                0x00C00000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_stagger_ctrl_lowv_S 22
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_stagger_ctrl_lowv_M \
-                                0x00300000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_stagger_ctrl_lowv_S 20
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_pdrv_str_sel_lowv_S 16
-#define HIB1P2_DIG_DCDC_PARAMETERS2_NA5 \
-                                0x00008000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_str_sel_lowv_M \
-                                0x00007800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ndrv_str_sel_lowv_S 11
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_en_shootthru_ctrl_lowv \
-                                0x00000400
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ton_trim_lowv_M \
-                                0x000003FC
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_ton_trim_lowv_S 2
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_swcap_res_hf_clk_lowv \
-                                0x00000002
-
-#define HIB1P2_DIG_DCDC_PARAMETERS2_mem_dcdc_dig_cot_mode_en_lowv_override \
-                                0x00000001  // Override value for
-                                            // DCDC_DIG_COT_EN : Applicable only
-                                            // when bit[26] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS3_NA6 \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_cot_ctrl_lowv_M \
-                                0x7F800000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_cot_ctrl_lowv_S 23
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ilim_lowv \
-                                0x00400000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ilim_hib_lowv \
-                                0x00200000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_trim_lowv_override_M \
-                                0x001FE000  // Override value for
-                                            // DCDC_DIG_ILIM_TRIM : Applicable
-                                            // only when bit [25] of
-                                            // DIG_DCDC_PARAMETERS1 [0x000C] is
-                                            // set to 1
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_trim_lowv_override_S 13
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_mask_dly_sel_lowv_M \
-                                0x00001800
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ilim_mask_dly_sel_lowv_S 11
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ncomp_lowv \
-                                0x00000400
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ncomp_hib_lowv \
-                                0x00000200
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_trim_lowv_M \
-                                0x000001F0
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_trim_lowv_S 4
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_mask_dly_sel_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_ncomp_mask_dly_sel_lowv_S 2
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_uv_prot_lowv \
-                                0x00000002
-
-#define HIB1P2_DIG_DCDC_PARAMETERS3_mem_dcdc_dig_en_ov_prot_lowv \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS4 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS4_dcdc_dig_uv_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_dcdc_dig_ov_prot_out_lowv \
-                                0x40000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_mem_dcdc_dig_en_tmux_lowv \
-                                0x20000000
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_NA7_M \
-                                0x1FFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS4_NA7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS5 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS5_mem_dcdc_dig_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS5_mem_dcdc_dig_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_PARAMETERS6 register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_PARAMETERS6_mem_dcdc_dig_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_DIG_DCDC_PARAMETERS6_mem_dcdc_dig_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_lowv_override \
-                                0x80000000  // Override for ANA DCDC EN
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_subreg_1p8v_lowv \
-                                0x20000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_subreg_1p2v_lowv \
-                                0x10000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_pwm_mode_lowv_override \
-                                0x08000000  // Override for ANA DCDC PWM
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_slp_mode_lowv_override \
-                                0x04000000  // Override for ANA DCDC SLP
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_ldo_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_pfet_rds_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_nfet_rds_mode_lowv \
-                                0x00800000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_ext_smps_override_mode_lowv \
-                                0x00400000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_clk_in_lowv_enable \
-                                0x00200000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_vtrim_lowv_M \
-                                0x001E0000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_vtrim_lowv_S 17
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfm_ripple_trim_lowv_M \
-                                0x00018000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfm_ripple_trim_lowv_S 15
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_iq_ctrl_lowv_M \
-                                0x00006000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_iq_ctrl_lowv_S 13
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_en_cl_non_ov_lowv \
-                                0x00001000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_non_ov_ctrl_lowv_M \
-                                0x00000F00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_non_ov_ctrl_lowv_S 8
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_slp_drv_dly_sel_lowv_M \
-                                0x000000F0
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_slp_drv_dly_sel_lowv_S 4
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfet_sel_lowv_M \
-                                0x0000000F
-
-#define HIB1P2_ANA_DCDC_PARAMETERS0_mem_dcdc_ana_pfet_sel_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_nfet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_nfet_sel_lowv_S 28
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_stagger_ctrl_lowv_M \
-                                0x0C000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_stagger_ctrl_lowv_S 26
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_stagger_ctrl_lowv_M \
-                                0x03000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_stagger_ctrl_lowv_S 24
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_str_sel_lowv_M \
-                                0x00F00000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_pdrv_str_sel_lowv_S 20
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ndrv_str_sel_lowv_S 16
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_rtrim_lowv \
-                                0x00008000  // (Earlier SHOOTTHRU CTRL)
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_apwm_en_lowv \
-                                0x00004000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ramp_hgt_lowv_M \
-                                0x00003E00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_ramp_hgt_lowv_S 9
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_anti_glitch_lowv \
-                                0x00000100
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_hi_clamp_lowv \
-                                0x00000080
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_hi_clamp_trim_lowv_M \
-                                0x00000060
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_hi_clamp_trim_lowv_S 5
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_en_lo_clamp_lowv \
-                                0x00000010
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_lo_clamp_trim_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_mem_dcdc_ana_lo_clamp_trim_lowv_S 2
-#define HIB1P2_ANA_DCDC_PARAMETERS1_NA8_M \
-                                0x00000003
-
-#define HIB1P2_ANA_DCDC_PARAMETERS1_NA8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS16 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ilim_lowv \
-                                0x00200000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ilim_hib_lowv \
-                                0x00100000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_trim_lowv_override_M \
-                                0x000FF000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_trim_lowv_override_S 12
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_mask_dly_sel_lowv_M \
-                                0x00000C00
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ilim_mask_dly_sel_lowv_S 10
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ncomp_lowv \
-                                0x00000200
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ncomp_hib_lowv \
-                                0x00000100
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_trim_lowv_M \
-                                0x000000F8
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_trim_lowv_S 3
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_mask_dly_sel_lowv_M \
-                                0x00000006
-
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_ncomp_mask_dly_sel_lowv_S 1
-#define HIB1P2_ANA_DCDC_PARAMETERS16_mem_dcdc_ana_en_ov_prot_lowv \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS17 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS17_dcdc_ana_ov_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_mem_dcdc_ana_en_tmux_lowv \
-                                0x40000000
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_NA17_M \
-                                0x3FFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS17_NA17_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS18 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS18_mem_dcdc_ana_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS18_mem_dcdc_ana_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS19 register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS19_mem_dcdc_ana_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_ANA_DCDC_PARAMETERS19_mem_dcdc_ana_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_delayed_en_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_clk_in_lowv_enable \
-                                0x20000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_iq_ctrl_lowv_M \
-                                0x18000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_iq_ctrl_lowv_S 27
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_buck_mode_lowv \
-                                0x04000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_boost_mode_lowv \
-                                0x02000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_buck_boost_mode_lowv \
-                                0x01000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_bb_alt_cycles_lowv \
-                                0x00800000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_cl_non_ov_lowv \
-                                0x00400000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_non_ov_ctrl_lowv_M \
-                                0x003C0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_non_ov_ctrl_lowv_S 18
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_drv_lowv \
-                                0x00020000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_pwm_mode_lowv \
-                                0x00010000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_pfm_comp_lowv \
-                                0x00008000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_slp_mode_lowv \
-                                0x00004000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_n1fet_rds_mode_lowv \
-                                0x00002000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_n2fet_rds_mode_lowv \
-                                0x00001000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_p1fet_rds_mode_lowv \
-                                0x00000800
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_en_p2fet_rds_mode_lowv \
-                                0x00000400
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_ext_smps_mode_override_lowv \
-                                0x00000200
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_p1fet_sel_lowv_M \
-                                0x000001E0
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_p1fet_sel_lowv_S 5
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_n1fet_sel_lowv_M \
-                                0x0000001E
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_mem_dcdc_flash_n1fet_sel_lowv_S 1
-#define HIB1P2_FLASH_DCDC_PARAMETERS0_NA18 \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_sel_lowv_M \
-                                0xF0000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_sel_lowv_S 28
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_sel_lowv_M \
-                                0x0F000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_sel_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1drv_str_sel_lowv_M \
-                                0x00F00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1drv_str_sel_lowv_S 20
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1drv_str_sel_lowv_M \
-                                0x000F0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1drv_str_sel_lowv_S 16
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2drv_str_sel_lowv_M \
-                                0x0000F000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2drv_str_sel_lowv_S 12
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2drv_str_sel_lowv_M \
-                                0x00000F00
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2drv_str_sel_lowv_S 8
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1fet_non_ov_lowv_M \
-                                0x000000C0
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p1fet_non_ov_lowv_S 6
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1fet_non_ov_lowv_M \
-                                0x00000030
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n1fet_non_ov_lowv_S 4
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_non_ov_lowv_M \
-                                0x0000000C
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_p2fet_non_ov_lowv_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_non_ov_lowv_M \
-                                0x00000003
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS1_mem_dcdc_flash_n2fet_non_ov_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p1fet_stagger_lowv_M \
-                                0xC0000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p1fet_stagger_lowv_S 30
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n1fet_stagger_lowv_M \
-                                0x30000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n1fet_stagger_lowv_S 28
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p2fet_stagger_lowv_M \
-                                0x0C000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_p2fet_stagger_lowv_S 26
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n2fet_stagger_lowv_M \
-                                0x03000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_n2fet_stagger_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_shoot_thru_ctrl_lowv \
-                                0x00800000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ncomp_lowv \
-                                0x00400000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ncomp_hib_lowv \
-                                0x00200000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_trim_lowv_M \
-                                0x001F0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_trim_lowv_S 16
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_mask_dly_trim_lowv_M \
-                                0x0000F000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ncomp_mask_dly_trim_lowv_S 12
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ilim_lowv \
-                                0x00000800
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_en_ilim_hib_lowv \
-                                0x00000400
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_trim_lowv_override_M \
-                                0x000003FC
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_trim_lowv_override_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_mask_dly_sel_lowv_M \
-                                0x00000003
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS2_mem_dcdc_flash_ilim_mask_dly_sel_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_anti_glitch_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_hi_clamp_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_lo_clamp_lowv \
-                                0x20000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_ramp_hgt_lowv_M \
-                                0x1F000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_ramp_hgt_lowv_S 24
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclamph_trim_lowv_M \
-                                0x00E00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclamph_trim_lowv_S 21
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclampl_trim_lowv_M \
-                                0x001C0000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vclampl_trim_lowv_S 18
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vtrim_lowv_M \
-                                0x0003C000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_vtrim_lowv_S 14
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_pfm_ripple_trim_lowv_M \
-                                0x00003C00
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_pfm_ripple_trim_lowv_S 10
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_slp_drv_dly_sel_lowv_M \
-                                0x00000300
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_slp_drv_dly_sel_lowv_S 8
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_ov_prot_lowv \
-                                0x00000080
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_uv_prot_lowv \
-                                0x00000040
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_mem_dcdc_flash_en_tmux_lowv \
-                                0x00000020
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_NA19_M \
-                                0x0000001F
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS3_NA19_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS4 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS4_mem_dcdc_flash_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS4_mem_dcdc_flash_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS5 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS5_mem_dcdc_flash_spare_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS5_mem_dcdc_flash_spare_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS6 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_dcdc_flash_ov_prot_out_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_dcdc_flash_uv_prot_out_lowv \
-                                0x40000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_NA20_M \
-                                0x3FFFFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS6_NA20_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_en_lowv \
-                                0x80000000
-
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_ctrl_lowv_M \
-                                0x7FFFF800
-
-#define HIB1P2_PMBIST_PARAMETERS0_mem_pm_bist_ctrl_lowv_S 11
-#define HIB1P2_PMBIST_PARAMETERS0_NA21_M \
-                                0x000007FF
-
-#define HIB1P2_PMBIST_PARAMETERS0_NA21_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pm_bist_spare_lowv_M \
-                                0xFFFF0000
-
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pm_bist_spare_lowv_S 16
-#define HIB1P2_PMBIST_PARAMETERS1_mem_pmtest_en_lowv \
-                                0x00008000
-
-#define HIB1P2_PMBIST_PARAMETERS1_NA22_M \
-                                0x00007FFF
-
-#define HIB1P2_PMBIST_PARAMETERS1_NA22_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS2 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS2_mem_pmtest_tmux_ctrl_lowv_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_PMBIST_PARAMETERS2_mem_pmtest_tmux_ctrl_lowv_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PMBIST_PARAMETERS3 register.
-//
-//******************************************************************************
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_spare_lowv_M \
-                                0xFFFF0000
-
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_spare_lowv_S 16
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_load_trim_lowv_M \
-                                0x0000E000
-
-#define HIB1P2_PMBIST_PARAMETERS3_mem_pmtest_load_trim_lowv_S 13
-#define HIB1P2_PMBIST_PARAMETERS3_mem_rnwell_calib_en_lowv \
-                                0x00001000
-
-#define HIB1P2_PMBIST_PARAMETERS3_NA23_M \
-                                0x00000FFF
-
-#define HIB1P2_PMBIST_PARAMETERS3_NA23_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS8 register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_en_flash_sup_comp_lowv \
-                                0x80000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_high_sup_trim_lowv_M \
-                                0x7C000000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_high_sup_trim_lowv_S 26
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_low_sup_trim_lowv_M \
-                                0x03E00000
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_mem_flash_low_sup_trim_lowv_S 21
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_NA24_M \
-                                0x001FFFFF
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS8_NA24_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_PARAMETERS_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_reserved_M \
-                                0xFFFFFFC0
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_reserved_S 6
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_subreg_1p2v_lowv_override_ctrl \
-                                0x00000020
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_subreg_1p8v_lowv_override_ctrl \
-                                0x00000010
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_ilim_trim_lowv_efc_override_ctrl \
-                                0x00000008
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_slp_mode_lowv_fsm_override_ctrl \
-                                0x00000004
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_pwm_mode_lowv_fsm_override_ctrl \
-                                0x00000002
-
-#define HIB1P2_ANA_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_ana_en_lowv_fsm_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_FLASH_DCDC_PARAMETERS_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_reserved_M \
-                                0xFFFFFFFC
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_reserved_S 2
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_flash_en_lowv_override_ctrl \
-                                0x00000002
-
-#define HIB1P2_FLASH_DCDC_PARAMETERS_OVERRIDE_mem_dcdc_flash_ilim_trim_lowv_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_VTRIM_CFG register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_reserved_M \
-                                0xFF000000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_reserved_S 24
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_run_vtrim_M \
-                                0x00FC0000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_run_vtrim_S 18
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_dslp_vtrim_M \
-                                0x0003F000
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_dslp_vtrim_S 12
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_lpds_vtrim_M \
-                                0x00000FC0
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_mem_dcdc_dig_lpds_vtrim_S 6
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_Spare_RW_M \
-                                0x0000003F
-
-#define HIB1P2_DIG_DCDC_VTRIM_CFG_Spare_RW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_DIG_DCDC_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_reserved_M \
-                                0xFFFF8000
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_reserved_S 15
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_cot_to_vtrim_M \
-                                0x00007000
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_cot_to_vtrim_S 12
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_vtrim_to_sleep_M \
-                                0x00000E00
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_enter_vtrim_to_sleep_S 9
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_sleep_to_vtrim_M \
-                                0x000001C0
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_sleep_to_vtrim_S 6
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_vtrim_to_cot_M \
-                                0x00000038
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_vtrim_to_cot_S 3
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_cot_to_run_M \
-                                0x00000007
-
-#define HIB1P2_DIG_DCDC_FSM_PARAMETERS_mem_dcdc_dig_dslp_exit_cot_to_run_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_ANA_DCDC_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_reserved_S 3
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_mem_dcdc_ana_dslp_exit_sleep_to_run_M \
-                                0x00000007
-
-#define HIB1P2_ANA_DCDC_FSM_PARAMETERS_mem_dcdc_ana_dslp_exit_sleep_to_run_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SRAM_SKA_LDO_FSM_PARAMETERS register.
-//
-//******************************************************************************
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_reserved_M \
-                                0xFFFFFFC0
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_reserved_S 6
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_ska_ldo_en_to_sram_ldo_dis_M \
-                                0x00000038
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_ska_ldo_en_to_sram_ldo_dis_S 3
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_sram_ldo_en_to_ska_ldo_dis_M \
-                                0x00000007
-
-#define HIB1P2_SRAM_SKA_LDO_FSM_PARAMETERS_mem_sram_ldo_en_to_ska_ldo_dis_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG register.
-//
-//******************************************************************************
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_reserved_S 3
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_mem_bgap_duty_cycling_exit_time_M \
-                                0x00000007
-
-#define HIB1P2_BGAP_DUTY_CYCLING_EXIT_CFG_mem_bgap_duty_cycling_exit_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_CM_OSC_16M_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_CM_OSC_16M_CONFIG_reserved_M \
-                                0xFFFC0000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_reserved_S 18
-#define HIB1P2_CM_OSC_16M_CONFIG_cm_clk_good_16m \
-                                0x00020000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_en_osc_16m \
-                                0x00010000
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_trim_M \
-                                0x0000FC00
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_trim_S 10
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_spare_M \
-                                0x000003F0
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_16m_spare_S 4
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_osc_en_sli_16m \
-                                0x00000008
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_sli_16m_trim_M \
-                                0x00000007
-
-#define HIB1P2_CM_OSC_16M_CONFIG_mem_cm_sli_16m_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_SOP_SENSE_VALUE register.
-//
-//******************************************************************************
-#define HIB1P2_SOP_SENSE_VALUE_reserved_M \
-                                0xFFFFFF00
-
-#define HIB1P2_SOP_SENSE_VALUE_reserved_S 8
-#define HIB1P2_SOP_SENSE_VALUE_sop_sense_value_M \
-                                0x000000FF
-
-#define HIB1P2_SOP_SENSE_VALUE_sop_sense_value_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_RTC_TIMER_LSW_1P2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_RTC_TIMER_LSW_1P2_hib_rtc_timer_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_RTC_TIMER_LSW_1P2_hib_rtc_timer_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_RTC_TIMER_MSW_1P2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_RTC_TIMER_MSW_1P2_hib_rtc_timer_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_RTC_TIMER_MSW_1P2_hib_rtc_timer_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_BGAP_TRIM_OVERRIDES register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_reserved_M \
-                                0xFF800000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_reserved_S 23
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_ctrl \
-                                0x00400000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_M \
-                                0x003FC000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_mag_trim_override_S 14
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_ctrl \
-                                0x00002000
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_M \
-                                0x00001FC0
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_temp_trim_override_S 6
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_ctrl \
-                                0x00000020
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_M \
-                                0x0000001F
-
-#define HIB1P2_HIB1P2_BGAP_TRIM_OVERRIDES_mem_bgap_rtrim_override_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_EFUSE_READ_REG0 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_EFUSE_READ_REG0_FUSEFARM_ROW_12_M \
-                                0xFFFFFFFF  // Corresponds to ROW_12 of
-                                            // FUSEFARM. [7:0] :
-                                            // DCDC_DIG_ILIM_TRIM_LOWV(7:0)
-                                            // [15:8] :
-                                            // DCDC_ANA_ILIM_TRIM_LOWV(7:0)
-                                            // [23:16] :
-                                            // DCDC_FLASH_ILIM_TRIM_LOWV(7:0)
-                                            // [24:24] : DTHE SHA DISABLE
-                                            // [25:25] : DTHE DES DISABLE
-                                            // [26:26] : DTHE AES DISABLE
-                                            // [31:27] : HD_BG_RTRIM (4:0)
-
-#define HIB1P2_HIB1P2_EFUSE_READ_REG0_FUSEFARM_ROW_12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_EFUSE_READ_REG1 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_EFUSE_READ_REG1_FUSEFARM_ROW_13_M \
-                                0xFFFFFFFF  // Corresponds to ROW_13 of the
-                                            // FUSEFARM. [7:0] : HD_BG_MAG_TRIM
-                                            // (7:0) [14:8] : HD_BG_TEMP_TRIM
-                                            // (6:0) [15:15] : GREYOUT ENABLE
-                                            // DUTY CYCLING [31:16] :
-                                            // Reserved/Checksum
-
-#define HIB1P2_HIB1P2_EFUSE_READ_REG1_FUSEFARM_ROW_13_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB1P2_POR_TEST_CTRL register.
-//
-//******************************************************************************
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_reserved_M \
-                                0xFFFFFF00
-
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_reserved_S 8
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_mem_prcm_por_test_ctrl_M \
-                                0x000000FF
-
-#define HIB1P2_HIB1P2_POR_TEST_CTRL_mem_prcm_por_test_ctrl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG0 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_reserved_S 16
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_time_M \
-                                0x0000FF00
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_time_S 8
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_NU1_M \
-                                0x000000FE
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_NU1_S 1
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG0_mem_cfg_calib_start \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CALIB_CFG1 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_reserved_M \
-                                0xFFF00000
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_reserved_S 20
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_fast_calib_count_M \
-                                0x000FFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_CALIB_CFG1_fast_calib_count_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_CFG2 register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_reserved_M \
-                                0xFFFFFE00
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_reserved_S 9
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_hib_unload \
-                                0x00000100
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_NU1_M \
-                                0x000000FC
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_NU1_S 2
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_tsf_adj \
-                                0x00000002
-
-#define HIB1P2_HIB_TIMER_SYNC_CFG2_mem_cfg_update_tsf \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_ADJ_VAL register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_ADJ_VAL_mem_tsf_adj_val_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_ADJ_VAL_mem_tsf_adj_val_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW_rtc_gts_timestamp_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_LSW_rtc_gts_timestamp_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_reserved_S 16
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_rtc_gts_timestamp_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_TIMER_RTC_GTS_TIMESTAMP_MSW_rtc_gts_timestamp_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW_rtc_wup_timestamp_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_LSW_rtc_wup_timestamp_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_reserved_S 16
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_rtc_wup_timestamp_msw_M \
-                                0x0000FFFF
-
-#define HIB1P2_HIB_TIMER_RTC_WUP_TIMESTAMP_MSW_rtc_wup_timestamp_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_WAKE_OFFSET_ERR register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_reserved_M \
-                                0xFFFFF000
-
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_reserved_S 12
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_wup_offset_error_M \
-                                0x00000FFF
-
-#define HIB1P2_HIB_TIMER_SYNC_WAKE_OFFSET_ERR_wup_offset_error_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW_tsf_curr_val_lsw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_LSW_tsf_curr_val_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW register.
-//
-//******************************************************************************
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW_tsf_curr_val_msw_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_HIB_TIMER_SYNC_TSF_CURR_VAL_MSW_tsf_curr_val_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the HIB1P2_O_CM_SPARE register.
-//
-//******************************************************************************
-#define HIB1P2_CM_SPARE_CM_SPARE_OUT_M \
-                                0xFF000000
-
-#define HIB1P2_CM_SPARE_CM_SPARE_OUT_S 24
-#define HIB1P2_CM_SPARE_MEM_CM_TEST_CTRL_M \
-                                0x00FF0000
-
-#define HIB1P2_CM_SPARE_MEM_CM_TEST_CTRL_S 16
-#define HIB1P2_CM_SPARE_MEM_CM_SPARE_M \
-                                0x0000FFFF
-
-#define HIB1P2_CM_SPARE_MEM_CM_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_PORPOL_SPARE register.
-//
-//******************************************************************************
-#define HIB1P2_PORPOL_SPARE_MEM_PORPOL_SPARE_M \
-                                0xFFFFFFFF
-
-#define HIB1P2_PORPOL_SPARE_MEM_PORPOL_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_DIG_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_DIG_DCDC_CLK_CONFIG_MEM_DIG_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_ANA_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_ANA_DCDC_CLK_CONFIG_MEM_ANA_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_FLASH_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_FLASH_DCDC_CLK_CONFIG_MEM_FLASH_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_PA_DCDC_CLK_CONFIG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_ENABLE \
-                                0x00000100
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_OFF_TIME_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_OFF_TIME_S 4
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_ON_TIME_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_PA_DCDC_CLK_CONFIG_MEM_PA_DCDC_CLK_PLLGEN_ON_TIME_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_VNWA_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_VNWA_OVERRIDE_MEM_SLDO_EN_TOP_VNWA_OVERRIDE_CTRL \
-                                0x00000002
-
-#define HIB1P2_MEM_SLDO_VNWA_OVERRIDE_MEM_SLDO_EN_TOP_VNWA_OVERRIDE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE_MEM_BGAP_DUTY_CYCLING_OVERRIDE_CTRL \
-                                0x00000002
-
-#define HIB1P2_MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE_MEM_BGAP_DUTY_CYCLING_OVERRIDE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_HIB_FSM_DEBUG register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_HIB_FSM_DEBUG_SRAM_PS_M \
-                                0x00000700
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_SRAM_PS_S 8
-#define HIB1P2_MEM_HIB_FSM_DEBUG_ANA_DCDC_PS_M \
-                                0x000000F0
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_ANA_DCDC_PS_S 4
-#define HIB1P2_MEM_HIB_FSM_DEBUG_DIG_DCDC_PS_M \
-                                0x0000000F
-
-#define HIB1P2_MEM_HIB_FSM_DEBUG_DIG_DCDC_PS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_VNWA_SW_CTRL register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_VNWA_SW_CTRL_MEM_SLDO_VNWA_SW_CTRL_M \
-                                0x000FFFFF
-
-#define HIB1P2_MEM_SLDO_VNWA_SW_CTRL_MEM_SLDO_VNWA_SW_CTRL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_SLDO_WEAK_PROCESS register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_SLDO_WEAK_PROCESS_MEM_SLDO_WEAK_PROCESS \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_PA_DCDC_OV_UV_STATUS register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_PA_DCDC_OV_UV_STATUS_dcdc_pa_ov_prot_out_lowv \
-                                0x00000002
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB1P2_O_MEM_CM_TEST_MODE register.
-//
-//******************************************************************************
-#define HIB1P2_MEM_CM_TEST_MODE_mem_cm_test_mode \
-                                0x00000001
-
-
-
-
-#endif // __HW_HIB1P2_H__
diff --git a/ports/cc3200/hal/inc/hw_hib3p3.h b/ports/cc3200/hal/inc/hw_hib3p3.h
deleted file mode 100644
index 9701689165c11..0000000000000
--- a/ports/cc3200/hal/inc/hw_hib3p3.h
+++ /dev/null
@@ -1,1138 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_HIB3P3_H__
-#define __HW_HIB3P3_H__
-
-//*****************************************************************************
-//
-// The following are defines for the HIB3P3 register offsets.
-//
-//*****************************************************************************
-#define HIB3P3_O_MEM_HIB_REQ    0x00000000
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_ENABLE \
-                                0x00000004
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_RESET \
-                                0x00000008
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_READ \
-                                0x0000000C
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_LSW \
-                                0x00000010
-
-#define HIB3P3_O_MEM_HIB_RTC_TIMER_MSW \
-                                0x00000014
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_EN \
-                                0x00000018
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF \
-                                0x0000001C
-
-#define HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF \
-                                0x00000020
-
-#define HIB3P3_O_MEM_INT_OSC_CONF \
-                                0x0000002C
-
-#define HIB3P3_O_MEM_XTAL_OSC_CONF \
-                                0x00000034
-
-#define HIB3P3_O_MEM_BGAP_PARAMETERS0 \
-                                0x00000038
-
-#define HIB3P3_O_MEM_BGAP_PARAMETERS1 \
-                                0x0000003C
-
-#define HIB3P3_O_MEM_HIB_DETECTION_STATUS \
-                                0x00000040
-
-#define HIB3P3_O_MEM_HIB_MISC_CONTROLS \
-                                0x00000044
-
-#define HIB3P3_O_MEM_HIB_CONFIG 0x00000050
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE \
-                                0x00000054
-
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF \
-                                0x00000058
-
-#define HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF \
-                                0x0000005C
-
-#define HIB3P3_O_MEM_HIB_UART_CONF \
-                                0x00000400
-
-#define HIB3P3_O_MEM_GPIO_WAKE_EN \
-                                0x00000404
-
-#define HIB3P3_O_MEM_GPIO_WAKE_CONF \
-                                0x00000408
-
-#define HIB3P3_O_MEM_PAD_OEN_RET33_CONF \
-                                0x0000040C
-
-#define HIB3P3_O_MEM_UART_RTS_OEN_RET33_CONF \
-                                0x00000410
-
-#define HIB3P3_O_MEM_JTAG_CONF  0x00000414
-#define HIB3P3_O_MEM_HIB_REG0   0x00000418
-#define HIB3P3_O_MEM_HIB_REG1   0x0000041C
-#define HIB3P3_O_MEM_HIB_REG2   0x00000420
-#define HIB3P3_O_MEM_HIB_REG3   0x00000424
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG0 \
-                                0x0000045C
-
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG1 \
-                                0x00000460
-
-#define HIB3P3_O_MEM_HIB_MISC_CONFIG \
-                                0x00000464
-
-#define HIB3P3_O_MEM_HIB_WAKE_STATUS \
-                                0x00000468
-
-#define HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL \
-                                0x0000046C
-
-#define HIB3P3_O_MEM_HIB_SEQUENCER_CFG2 \
-                                0x00000470
-
-#define HIB3P3_O_HIBANA_SPARE_LOWV \
-                                0x00000474
-
-#define HIB3P3_O_HIB_TMUX_CTRL  0x00000478
-#define HIB3P3_O_HIB_1P2_1P8_LDO_TRIM \
-                                0x0000047C
-
-#define HIB3P3_O_HIB_COMP_TRIM  0x00000480
-#define HIB3P3_O_HIB_EN_TS      0x00000484
-#define HIB3P3_O_HIB_1P8V_DET_EN \
-                                0x00000488
-
-#define HIB3P3_O_HIB_VBAT_MON_EN \
-                                0x0000048C
-
-#define HIB3P3_O_HIB_NHIB_ENABLE \
-                                0x00000490
-
-#define HIB3P3_O_HIB_UART_RTS_SW_ENABLE \
-                                0x00000494
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REQ register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REQ_reserved_M \
-                                0xFFFFFE00
-
-#define HIB3P3_MEM_HIB_REQ_reserved_S 9
-#define HIB3P3_MEM_HIB_REQ_NU1_M \
-                                0x000001FC
-
-#define HIB3P3_MEM_HIB_REQ_NU1_S 2
-#define HIB3P3_MEM_HIB_REQ_mem_hib_clk_disable \
-                                0x00000002  // 1 - Specifies that the Hiberante
-                                            // mode is without clocks ; 0 -
-                                            // Specified that the Hibernate mode
-                                            // is with clocks This register will
-                                            // be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-#define HIB3P3_MEM_HIB_REQ_mem_hib_req \
-                                0x00000001  // 1 - Request for hibernate mode
-                                            // (This is an auto-clear bit) ; 0 -
-                                            // Donot request for hibernate mode
-                                            // This register will be reset
-                                            // during Hibernate -WO-Clks mode
-                                            // (but not during Hibernate-W-Clks
-                                            // mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_ENABLE_mem_hib_rtc_timer_enable \
-                                0x00000001  // 1 - Enable the RTC timer to
-                                            // start running ; 0 - Keep the RTC
-                                            // timer disabled This register will
-                                            // be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_RESET register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_RESET_mem_hib_rtc_timer_reset \
-                                0x00000001  // 1 - Reset the RTC timer ; 0 -
-                                            // Donot reset the RTC timer. This
-                                            // is an auto-clear bit. This
-                                            // register will be reset during
-                                            // Hibernate -WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_READ register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_TIMER_READ_mem_hib_rtc_timer_read \
-                                0x00000001  // 1 - Latch the running RTC timer
-                                            // into local registers. After
-                                            // programming this bit to 1, the
-                                            // F/w can read the latched RTC
-                                            // timer values from
-                                            // MEM_HIB_RTC_TIMER_LSW and
-                                            // MEM_HIB_RTC_TIMER_MSW. Before the
-                                            // F/w (APPS or NWP) wants to read
-                                            // the RTC-Timer, it has to program
-                                            // this bit to 1, then only read the
-                                            // MSW and LSW values. This is an
-                                            // auto-clear bit. This register
-                                            // will be reset during Hibernate
-                                            // -WO-Clks mode (but not during
-                                            // Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_LSW register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_LSW_hib_rtc_timer_lsw_M \
-                                0xFFFFFFFF  // Lower 32b value of the latched
-                                            // RTC-Timer.
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_LSW_hib_rtc_timer_lsw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_TIMER_MSW register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_reserved_S 16
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_hib_rtc_timer_msw_M \
-                                0x0000FFFF  // Upper 32b value of the latched
-                                            // RTC-Timer.
-
-#define HIB3P3_MEM_HIB_RTC_TIMER_MSW_hib_rtc_timer_msw_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_EN register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_reserved_S 1
-#define HIB3P3_MEM_HIB_RTC_WAKE_EN_mem_hib_rtc_wake_en \
-                                0x00000001  // 1 - Enable the RTC timer based
-                                            // wakeup during Hibernate mode ; 0
-                                            // - Disable the RTC timer based
-                                            // wakeup during Hibernate mode This
-                                            // register will be reset during
-                                            // Hibernate-WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_LSW_CONF_mem_hib_rtc_wake_lsw_conf_M \
-                                0xFFFFFFFF  // Configuration for RTC-Timer
-                                            // Wakeup (Lower 32b word)
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_LSW_CONF_mem_hib_rtc_wake_lsw_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_reserved_S 16
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_mem_hib_rtc_wake_msw_conf_M \
-                                0x0000FFFF  // Configuration for RTC-Timer
-                                            // Wakeup (Upper 16b word)
-
-#define HIB3P3_MEM_HIB_RTC_WAKE_MSW_CONF_mem_hib_rtc_wake_msw_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_INT_OSC_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_INT_OSC_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_INT_OSC_CONF_reserved_S 16
-#define HIB3P3_MEM_INT_OSC_CONF_cm_clk_good_32k_int \
-                                0x00008000  // 1 - Internal 32kHz Oscillator is
-                                            // valid ; 0 - Internal 32k
-                                            // oscillator clk is not valid
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_spare_M \
-                                0x00007E00
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_spare_S 9
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_en_intosc_32k_override_ctrl \
-                                0x00000100  // When 1, the INT_32K_OSC_EN comes
-                                            // from bit [0] of this register,
-                                            // else comes from the FSM. This
-                                            // register will be reset during
-                                            // Hibernate-WO-Clks mode (but not
-                                            // during Hibernate-W-Clks mode)
-
-#define HIB3P3_MEM_INT_OSC_CONF_NU1 \
-                                0x00000080
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_trim_M \
-                                0x0000007E
-
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_intosc_32k_trim_S 1
-#define HIB3P3_MEM_INT_OSC_CONF_mem_cm_en_intosc_32k \
-                                0x00000001  // Override value for INT_OSC_EN.
-                                            // Applicable only when bit [3] of
-                                            // this register is set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_XTAL_OSC_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_XTAL_OSC_CONF_reserved_M \
-                                0xFFF00000
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_reserved_S 20
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_sli_32k_override_ctrl \
-                                0x00080000  // When 1, the SLICER_EN comes from
-                                            // bit [10] of this register, else
-                                            // comes from the FSM.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_xtal_32k_override_ctrl \
-                                0x00040000  // When 1, the XTAL_EN comes from
-                                            // bit [0] of this register, else
-                                            // comes from the FSM.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_cm_clk_good_xtal \
-                                0x00020000  // 1 - XTAL Clk is good ; 0 - XTAL
-                                            // Clk is yet to be valid.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_xtal_trim_M \
-                                0x0001F800
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_xtal_trim_S 11
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_sli_32k \
-                                0x00000400  // SLICER_EN Override value :
-                                            // Applicable only when bit [19] of
-                                            // this register is set to 1.
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_sli_32k_trim_M \
-                                0x00000380
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_sli_32k_trim_S 7
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_fref_32k_slicer_itrim_M \
-                                0x00000070
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_fref_32k_slicer_itrim_S 4
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_fref_32k_slicer \
-                                0x00000008
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_input_sense_M \
-                                0x00000006
-
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_input_sense_S 1
-#define HIB3P3_MEM_XTAL_OSC_CONF_mem_cm_en_xtal_32k \
-                                0x00000001  // XTAL_EN Override value :
-                                            // Applicable only when bit [18] of
-                                            // this register is set to 1.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_BGAP_PARAMETERS0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_BGAP_PARAMETERS0_reserved_M \
-                                0xFFF80000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_reserved_S 19
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_en_seq \
-                                0x00040000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_vbok4bg_comp_trim_M \
-                                0x0001C000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_vbok4bg_comp_trim_S 14
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbat_ok_4bg \
-                                0x00001000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbok4bg_comp \
-                                0x00000800
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_en_vbok4bg_comp_ref \
-                                0x00000400
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_spare_M \
-                                0x000003FF
-
-#define HIB3P3_MEM_BGAP_PARAMETERS0_mem_bgap_spare_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_BGAP_PARAMETERS1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_BGAP_PARAMETERS1_reserved_M \
-                                0xE0000000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_reserved_S 29
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_act_iref_itrim_M \
-                                0x1F000000
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_act_iref_itrim_S 24
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_act_iref \
-                                0x00000008
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_v2i \
-                                0x00000004
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en_cap_sw \
-                                0x00000002
-
-#define HIB3P3_MEM_BGAP_PARAMETERS1_mem_bgap_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_DETECTION_STATUS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_reserved_M \
-                                0xFFFFFF80
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_reserved_S 7
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_forced_ana_status \
-                                0x00000040  // 1 - 1.8 V supply forced mode.
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_forced_flash_status \
-                                0x00000004  // 1 - 3.3 V supply forced mode for
-                                            // Flash supply
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_ext_clk_det_out_status \
-                                0x00000002  // 1 - Forced clock mode
-
-#define HIB3P3_MEM_HIB_DETECTION_STATUS_hib_xtal_det_out_status \
-                                0x00000001  // 1 - XTAL clock mode
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_MISC_CONTROLS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_reserved_M \
-                                0xFFFFF800
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_reserved_S 11
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_pok_por_comp \
-                                0x00000400
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_pok_por_comp_ref \
-                                0x00000200
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_pok_por_comp_trim_M \
-                                0x000001C0
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_pok_por_comp_trim_S 6
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_NU1 \
-                                0x00000020
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_flash_det_en \
-                                0x00000010
-
-#define HIB3P3_MEM_HIB_MISC_CONTROLS_mem_hib_en_tmux \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_CONFIG register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_CONFIG_TOP_MUX_CTRL_SOP_SPIO_M \
-                                0xFF000000
-
-#define HIB3P3_MEM_HIB_CONFIG_TOP_MUX_CTRL_SOP_SPIO_S 24
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED3 \
-                                0x00080000  // 1 - Enable VDD_FLASH_INDP_PAD
-                                            // for digital path (SHARED4) ; 0 -
-                                            // Disable VDD_FLASH_INDP_PAD for
-                                            // digital path (SHARED4) ; Before
-                                            // programming this bit to 1, ensure
-                                            // that the device is in FORCED 3.3
-                                            // supply Mode, which can be
-                                            // inferred from the register :
-                                            // MEM_HIB_DETECTION_STATUS : 0x0040
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED2 \
-                                0x00040000  // 1 - Enable the
-                                            // VDD_FB_GPIO_MUX_PAD for digital
-                                            // path (SHARED3) ; 0 - Disable the
-                                            // VDD_FB_GPIO_MUX_PAD for digital
-                                            // path (SHARED3) ; This pin can be
-                                            // used only in modes other than
-                                            // SOP("111")
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED1 \
-                                0x00020000  // 1 - Enable the PM_TEST_PAD for
-                                            // digital GPIO path (SHARED2) ; 0 -
-                                            // Disable the PM_TEST_PAD for
-                                            // digital GPIO path (SHARED2) This
-                                            // pin can be used for digital only
-                                            // in modes other then SOP-111
-
-#define HIB3P3_MEM_HIB_CONFIG_EN_ANA_DIG_SHARED0 \
-                                0x00010000  // 1 - Enable the XTAL_N pin
-                                            // digital GPIO path (SHARED1); 0 -
-                                            // Disable the XTAL_N pin digital
-                                            // GPIO path (SHARED1). Before
-                                            // programming this bit to 1, ensure
-                                            // that the device is in FORCED CLK
-                                            // Mode, which can inferred from the
-                                            // register :
-                                            // MEM_HIB_DETECTION_STATUS :
-                                            // 0x0040.
-
-#define HIB3P3_MEM_HIB_CONFIG_mem_hib_xtal_enable \
-                                0x00000100  // 1 - Enable the XTAL Clock ; 0 -
-                                            // Donot enable the XTAL Clock. This
-                                            // bit has to be programmed to 1 (by
-                                            // APPS Devinit F/w), during exit
-                                            // from OFF or Hib_wo_clks modes,
-                                            // after checking if the slow_clk
-                                            // mode is XTAL_CLK mode. Once
-                                            // enabled the XTAL will be disabled
-                                            // only after entering HIB_WO_CLKS
-                                            // mode. This register will be reset
-                                            // during Hibernate -WO-Clks mode
-                                            // (but not during Hibernate-W-Clks
-                                            // mode).
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_ENABLE_HIB_RTC_IRQ_ENABLE \
-                                0x00000001  // 1 - Enable the HIB RTC - IRQ ; 0
-                                            // - Disable the HIB RTC - IRQ
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_LSW_CONF_HIB_RTC_IRQ_LSW_CONF_M \
-                                0xFFFFFFFF  // Configuration for LSW of the
-                                            // RTC-Timestamp at which interrupt
-                                            // need to be generated
-
-#define HIB3P3_MEM_HIB_RTC_IRQ_LSW_CONF_HIB_RTC_IRQ_LSW_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_RTC_IRQ_MSW_CONF_HIB_RTC_IRQ_MSW_CONF_M \
-                                0x0000FFFF  // Configuration for MSW of thr
-                                            // RTC-Timestamp at which the
-                                            // interrupt need to be generated
-
-#define HIB3P3_MEM_HIB_RTC_IRQ_MSW_CONF_HIB_RTC_IRQ_MSW_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_UART_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_UART_CONF_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_MEM_HIB_UART_CONF_reserved_S 1
-#define HIB3P3_MEM_HIB_UART_CONF_mem_hib_uart_wake_en \
-                                0x00000001  // 1 - Enable the UART-Autonomous
-                                            // mode wakeup during Hibernate mode
-                                            // ; This is an auto-clear bit, once
-                                            // programmed to 1, it will latched
-                                            // into an internal register which
-                                            // remain asserted until the
-                                            // Hib-wakeup is initiated.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_GPIO_WAKE_EN register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_GPIO_WAKE_EN_reserved_M \
-                                0xFFFFFF00
-
-#define HIB3P3_MEM_GPIO_WAKE_EN_reserved_S 8
-#define HIB3P3_MEM_GPIO_WAKE_EN_mem_gpio_wake_en_M \
-                                0x000000FF  // 1 - Enable the GPIO-Autonomous
-                                            // mode wakeup during Hibernate mode
-                                            // ; This is an auto-clear bit, once
-                                            // programmed to 1, it will latched
-                                            // into an internal register which
-                                            // remain asserted until the
-                                            // Hib-wakeup is initiated.
-
-#define HIB3P3_MEM_GPIO_WAKE_EN_mem_gpio_wake_en_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_GPIO_WAKE_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_GPIO_WAKE_CONF_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_GPIO_WAKE_CONF_reserved_S 16
-#define HIB3P3_MEM_GPIO_WAKE_CONF_mem_gpio_wake_conf_M \
-                                0x0000FFFF  // Configuration to say whether the
-                                            // GPIO wakeup has to happen on
-                                            // Level0 or falling-edge for the
-                                            // given group. “00” – Level0 “01” –
-                                            // Level1 “10”- Fall-edge “11”-
-                                            // Rise-edge [1:0] – Conf for GPIO0
-                                            // [3:2] – Conf for GPIO1 [5:4] –
-                                            // Conf for GPIO2 [7:6] – Conf for
-                                            // GPIO3 [9:8] – Conf for GPIO4
-                                            // [11:10] – Conf for GPIO5 [13:12]
-                                            // – Conf for GPIO6
-
-#define HIB3P3_MEM_GPIO_WAKE_CONF_mem_gpio_wake_conf_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_PAD_OEN_RET33_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_mem_pad_oen_ret33_override_ctrl \
-                                0x00000004  // 1 - Override the OEN33 and RET33
-                                            // controls of GPIOs during
-                                            // SOP-Bootdebug mode ; 0 - Donot
-                                            // override the OEN33 and RET33
-                                            // controls of GPIOs during
-                                            // SOP-Bootdebug mode
-
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_PAD_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_PAD_OEN_RET33_CONF_PAD_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_UART_RTS_OEN_RET33_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_mem_uart_nrts_oen_ret33_override_ctrl \
-                                0x00000004  // 1 - Override the OEN33 and RET33
-                                            // controls of UART NRTS GPIO during
-                                            // SOP-Bootdebug mode ; 0 - Donot
-                                            // override the OEN33 and RET33
-                                            // controls of UART NRTS GPIO during
-                                            // SOP-Bootdebug mode
-
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_PAD_UART_RTS_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_UART_RTS_OEN_RET33_CONF_PAD_UART_RTS_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_JTAG_CONF register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_JTAG_CONF_mem_jtag1_oen_ret33_override_ctrl \
-                                0x00000200
-
-#define HIB3P3_MEM_JTAG_CONF_mem_jtag0_oen_ret33_override_ctrl \
-                                0x00000100
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG1_RTS_OEN33_CONF \
-                                0x00000008
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG1_RTS_RET33_CONF \
-                                0x00000004
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG0_RTS_OEN33_CONF \
-                                0x00000002
-
-#define HIB3P3_MEM_JTAG_CONF_PAD_JTAG0_RTS_RET33_CONF \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG0_mem_hib_reg0_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG0_mem_hib_reg0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG1_mem_hib_reg1_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG1_mem_hib_reg1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG2 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG2_mem_hib_reg2_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG2_mem_hib_reg2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_REG3 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_REG3_mem_hib_reg3_M \
-                                0xFFFFFFFF
-
-#define HIB3P3_MEM_HIB_REG3_mem_hib_reg3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG0 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev0_to_ev1_time_M \
-                                0xFFFF0000  // Configuration for the number of
-                                            // slow-clks between de-assertion of
-                                            // EN_BG_3P3V to assertion of
-                                            // EN_BG_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev0_to_ev1_time_S 16
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_NU1 \
-                                0x00008000
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev3_to_ev4_time_M \
-                                0x00006000  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // EN_COMP_3P3V and assertion of
-                                            // EN_COMP_LATCH_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev3_to_ev4_time_S 13
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev2_to_ev3_time_M \
-                                0x00001800  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // (EN_CAP_SW_3P3V,EN_COMP_REF) and
-                                            // assertion of (EN_COMP_3P3V)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev2_to_ev3_time_S 11
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev1_to_ev2_time_M \
-                                0x00000600  // Configuration for the number of
-                                            // slow-clks between assertion of
-                                            // (EN_BG_3P3V) and assertion of
-                                            // (EN_CAP_SW_3P3V,
-                                            // EN_COMP_REF_3P3V)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bdc_ev1_to_ev2_time_S 9
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_crude_ref_comp \
-                                0x00000100
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_vbok4bg_ref_override_ctrl \
-                                0x00000080  // 1 - EN_VBOK4BG_REF comes from
-                                            // bit[10] of the register
-                                            // MEM_BGAP_PARAMETERS0 [0x0038]. 0
-                                            // - EN_VBOK4BG_REF comes directly
-                                            // from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_vbok4bg_comp_override_ctrl \
-                                0x00000040  // 1 - EN_VBOK4BG comes from
-                                            // bit[11] of the register
-                                            // MEM_BGAP_PARAMETERS0 [0x0038]. 0
-                                            // - EN_VBOK4BG comes directly from
-                                            // the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_v2i_override_ctrl \
-                                0x00000020  // 1 - EN_V2I comes from bit[2] of
-                                            // the register MEM_BGAP_PARAMETERS1
-                                            // [0x003C]. 0 - EN_V2I comes
-                                            // directly from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_por_comp_ref_override_ctrl \
-                                0x00000010  // 1 - EN_POR_COMP_REF comes from
-                                            // bit[9] of the register
-                                            // MEM_HIB_MISC_CONTROLS [0x0044]. 0
-                                            // - EN_POR_COMP_REF comes directly
-                                            // from the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_en_por_comp_override_ctrl \
-                                0x00000008  // 1 - EN_POR_COMP comes from
-                                            // bit[10] of the register
-                                            // MEM_HIB_MISC_CONTROLS [0x044]. 0
-                                            // - EN_POR_COMP comes directly from
-                                            // the Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_cap_sw_override_ctrl \
-                                0x00000004  // 1 - EN_CAP_SW comes from bit[1]
-                                            // of the register
-                                            // MEM_BGAP_PARAMETERS1 [0x003C]. 0
-                                            // - EN_CAP_SW comes directly from
-                                            // Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_bg_override_ctrl \
-                                0x00000002  // 1 - EN_BGAP comes from bit[0] of
-                                            // the register MEM_BGAP_PARAMETERS1
-                                            // [0x003C]. 0 - EN_BGAP comes
-                                            // directly from Hib-Sequencer.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG0_mem_act_iref_override_ctrl \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG1 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_reserved_M \
-                                0xFFFF0000
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_reserved_S 16
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_ev5_to_ev6_time_M \
-                                0x0000C000  // Configuration for number of
-                                            // slow-clks between de-assertion of
-                                            // EN_COMP_LATCH and assertion of
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_ev5_to_ev6_time_S 14
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev1_to_ev2_time_M \
-                                0x00003000  // Configuration for number of
-                                            // slow-clks between assertion of
-                                            // EN_COMP_REF to assertion of
-                                            // EN_COMP during HIB-Exit
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev1_to_ev2_time_S 12
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_ev1_time_M \
-                                0x00000C00  // TBD
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_ev1_time_S 10
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_active_M \
-                                0x00000300  // Configuration in number of
-                                            // slow-clks between assertion of
-                                            // (EN_BGAP_3P3V, EN_CAP_SW_3P3V,
-                                            // EN_ACT_IREF_3P3V, EN_COMP_REF) to
-                                            // assertion of EN_COMP_3P3V
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_bdc_to_active_ev0_to_active_S 8
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_active_to_bdc_ev1_to_bdc_ev0_time_M \
-                                0x000000C0  // Configuration in number of
-                                            // slow-clks between de-assertion of
-                                            // (EN_COMP_3P3V, EN_COMP_REF_3P3V,
-                                            // EN_ACT_IREF_3P3V, EN_CAP_SW_3P3V)
-                                            // to deassertion of EN_BGAP_3P3V.
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_mem_active_to_bdc_ev1_to_bdc_ev0_time_S 6
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_NU1_M \
-                                0x0000003F
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG1_NU1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_MISC_CONFIG register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_MISC_CONFIG_mem_en_pll_untrim_current \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_WAKE_STATUS register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_src_M \
-                                0x0000001E  // "0100" - GPIO ; "0010" - RTC ;
-                                            // "0001" - UART Others - Reserved
-
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_src_S 1
-#define HIB3P3_MEM_HIB_WAKE_STATUS_hib_wake_status \
-                                0x00000001  // 1 - Wake from Hibernate ; 0 -
-                                            // Wake from OFF
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_LPDS_GPIO_SEL_HIB_LPDS_GPIO_SEL_M \
-                                0x00000007
-
-#define HIB3P3_MEM_HIB_LPDS_GPIO_SEL_HIB_LPDS_GPIO_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_MEM_HIB_SEQUENCER_CFG2 register.
-//
-//******************************************************************************
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_reserved_M \
-                                0xFFFFF800
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_reserved_S 11
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_active_to_bdc_ev0_to_active_to_bdc_ev1_time_M \
-                                0x00000600  // Deassertion of EN_COMP_LATCH_3P3
-                                            // to deassertion of (EN_COMP_3P3,
-                                            // EN_COMP_REF_3P3, EN_ACT_IREF_3P3,
-                                            // EN_CAP_SW_3P3)
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_active_to_bdc_ev0_to_active_to_bdc_ev1_time_S 9
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev4_to_ev5_time_M \
-                                0x000001C0  // Assertion of EN_COMP_LATCH_3P3
-                                            // to deassertion of
-                                            // EN_COMP_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev4_to_ev5_time_S 6
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev6_to_ev7_time_M \
-                                0x00000030  // Deassertion of (EN_CAP_SW_3P3,
-                                            // EN_COMP_REF_3P3, EN_COMP_3P3,
-                                            // EN_COMP_OUT_LATCH_3P3) to
-                                            // deassertion of EN_BGAP_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_ev6_to_ev7_time_S 4
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_to_active_ev1_to_ev2_time_M \
-                                0x0000000C  // Assertion of EN_COMP_3P3 to
-                                            // assertion of EN_COMPOUT_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_bdc_to_active_ev1_to_ev2_time_S 2
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_hib_to_active_ev2_to_ev3_time_M \
-                                0x00000003  // Assertion of EN_COMP_3P3 to
-                                            // assertion of EN_COMPOUT_LATCH_3P3
-
-#define HIB3P3_MEM_HIB_SEQUENCER_CFG2_mem_hib_to_active_ev2_to_ev3_time_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIBANA_SPARE_LOWV register.
-//
-//******************************************************************************
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare1_M \
-                                0xFFC00000
-
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare1_S 22
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare0_M \
-                                0x0001FFFF
-
-#define HIB3P3_HIBANA_SPARE_LOWV_mem_hibana_spare0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_TMUX_CTRL register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_TMUX_CTRL_reserved_M \
-                                0xFFFFFC00
-
-#define HIB3P3_HIB_TMUX_CTRL_reserved_S 10
-#define HIB3P3_HIB_TMUX_CTRL_mem_hd_tmux_cntrl_M \
-                                0x000003FF
-
-#define HIB3P3_HIB_TMUX_CTRL_mem_hd_tmux_cntrl_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_1P2_1P8_LDO_TRIM register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_reserved_M \
-                                0xFFFFF000
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_reserved_S 12
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_en_override_ctrl \
-                                0x00000800
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_en_override_ctrl \
-                                0x00000400
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_en_override \
-                                0x00000200
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_en_override \
-                                0x00000100
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_vtrim_M \
-                                0x000000F0
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p2_ldo_vtrim_S 4
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_vtrim_M \
-                                0x0000000F
-
-#define HIB3P3_HIB_1P2_1P8_LDO_TRIM_mem_hd_1p8_ldo_vtrim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_COMP_TRIM register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_COMP_TRIM_reserved_M \
-                                0xFFFFFFF8
-
-#define HIB3P3_HIB_COMP_TRIM_reserved_S 3
-#define HIB3P3_HIB_COMP_TRIM_mem_hd_comp_trim_M \
-                                0x00000007
-
-#define HIB3P3_HIB_COMP_TRIM_mem_hd_comp_trim_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_EN_TS register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_EN_TS_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_HIB_EN_TS_reserved_S 1
-#define HIB3P3_HIB_EN_TS_mem_hd_en_ts \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_1P8V_DET_EN register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_1P8V_DET_EN_reserved_M \
-                                0xFFFFFFFE
-
-#define HIB3P3_HIB_1P8V_DET_EN_reserved_S 1
-#define HIB3P3_HIB_1P8V_DET_EN_mem_hib_1p8v_det_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_VBAT_MON_EN register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_VBAT_MON_EN_reserved_M \
-                                0xFFFFFFFC
-
-#define HIB3P3_HIB_VBAT_MON_EN_reserved_S 2
-#define HIB3P3_HIB_VBAT_MON_EN_mem_hib_vbat_mon_del_en \
-                                0x00000002
-
-#define HIB3P3_HIB_VBAT_MON_EN_mem_hib_vbat_mon_en \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_NHIB_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_NHIB_ENABLE_mem_hib_nhib_enable \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// HIB3P3_O_HIB_UART_RTS_SW_ENABLE register.
-//
-//******************************************************************************
-#define HIB3P3_HIB_UART_RTS_SW_ENABLE_mem_hib_uart_rts_sw_enable \
-                                0x00000001
-
-
-
-
-#endif // __HW_HIB3P3_H__
diff --git a/ports/cc3200/hal/inc/hw_i2c.h b/ports/cc3200/hal/inc/hw_i2c.h
deleted file mode 100644
index 17536d3e9c10f..0000000000000
--- a/ports/cc3200/hal/inc/hw_i2c.h
+++ /dev/null
@@ -1,503 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_I2C_H__
-#define __HW_I2C_H__
-
-//*****************************************************************************
-//
-// The following are defines for the I2C register offsets.
-//
-//*****************************************************************************
-#define I2C_O_MSA               0x00000000
-#define I2C_O_MCS               0x00000004
-#define I2C_O_MDR               0x00000008
-#define I2C_O_MTPR              0x0000000C
-#define I2C_O_MIMR              0x00000010
-#define I2C_O_MRIS              0x00000014
-#define I2C_O_MMIS              0x00000018
-#define I2C_O_MICR              0x0000001C
-#define I2C_O_MCR               0x00000020
-#define I2C_O_MCLKOCNT          0x00000024
-#define I2C_O_MBMON             0x0000002C
-#define I2C_O_MBLEN             0x00000030
-#define I2C_O_MBCNT             0x00000034
-#define I2C_O_SOAR              0x00000800
-#define I2C_O_SCSR              0x00000804
-#define I2C_O_SDR               0x00000808
-#define I2C_O_SIMR              0x0000080C
-#define I2C_O_SRIS              0x00000810
-#define I2C_O_SMIS              0x00000814
-#define I2C_O_SICR              0x00000818
-#define I2C_O_SOAR2             0x0000081C
-#define I2C_O_SACKCTL           0x00000820
-#define I2C_O_FIFODATA          0x00000F00
-#define I2C_O_FIFOCTL           0x00000F04
-#define I2C_O_FIFOSTATUS        0x00000F08
-#define I2C_O_OBSMUXSEL0        0x00000F80
-#define I2C_O_OBSMUXSEL1        0x00000F84
-#define I2C_O_MUXROUTE          0x00000F88
-#define I2C_O_PV                0x00000FB0
-#define I2C_O_PP                0x00000FC0
-#define I2C_O_PC                0x00000FC4
-#define I2C_O_CC                0x00000FC8
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MSA register.
-//
-//******************************************************************************
-#define I2C_MSA_SA_M          0x000000FE  // I2C Slave Address
-#define I2C_MSA_SA_S          1
-#define I2C_MSA_RS              0x00000001  // Receive not send
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCS register.
-//
-//******************************************************************************
-#define I2C_MCS_ACTDMARX        0x80000000  // DMA RX Active Status
-#define I2C_MCS_ACTDMATX        0x40000000  // DMA TX Active Status
-#define I2C_MCS_CLKTO           0x00000080  // Clock Timeout Error
-#define I2C_MCS_BUSBSY          0x00000040  // Bus Busy
-#define I2C_MCS_IDLE            0x00000020  // I2C Idle
-#define I2C_MCS_ARBLST          0x00000010  // Arbitration Lost
-#define I2C_MCS_ACK             0x00000008  // Data Acknowledge Enable
-#define I2C_MCS_ADRACK          0x00000004  // Acknowledge Address
-#define I2C_MCS_ERROR           0x00000002  // Error
-#define I2C_MCS_BUSY            0x00000001  // I2C Busy
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MDR register.
-//
-//******************************************************************************
-#define I2C_MDR_DATA_M        0x000000FF  // Data Transferred
-#define I2C_MDR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MTPR register.
-//
-//******************************************************************************
-#define I2C_MTPR_HS             0x00000080  // High-Speed Enable
-#define I2C_MTPR_TPR_M        0x0000007F  // SCL Clock Period
-#define I2C_MTPR_TPR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MIMR register.
-//
-//******************************************************************************
-#define I2C_MIMR_RXFFIM         0x00000800  // Receive FIFO Full Interrupt Mask
-#define I2C_MIMR_TXFEIM         0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_MIMR_RXIM           0x00000200  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_MIMR_TXIM           0x00000100  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_MIMR_ARBLOSTIM      0x00000080  // Arbitration Lost Interrupt Mask
-#define I2C_MIMR_STOPIM         0x00000040  // STOP Detection Interrupt Mask
-#define I2C_MIMR_STARTIM        0x00000020  // START Detection Interrupt Mask
-#define I2C_MIMR_NACKIM         0x00000010  // Address/Data NACK Interrupt Mask
-#define I2C_MIMR_DMATXIM        0x00000008  // Transmit DMA Interrupt Mask
-#define I2C_MIMR_DMARXIM        0x00000004  // Receive DMA Interrupt Mask
-#define I2C_MIMR_CLKIM          0x00000002  // Clock Timeout Interrupt Mask
-#define I2C_MIMR_IM             0x00000001  // Master Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MRIS register.
-//
-//******************************************************************************
-#define I2C_MRIS_RXFFRIS        0x00000800  // Receive FIFO Full Raw Interrupt
-                                            // Status
-#define I2C_MRIS_TXFERIS        0x00000400  // Transmit FIFO Empty Raw
-                                            // Interrupt Status
-#define I2C_MRIS_RXRIS          0x00000200  // Receive FIFO Request Raw
-                                            // Interrupt Status
-#define I2C_MRIS_TXRIS          0x00000100  // Transmit Request Raw Interrupt
-                                            // Status
-#define I2C_MRIS_ARBLOSTRIS     0x00000080  // Arbitration Lost Raw Interrupt
-                                            // Status
-#define I2C_MRIS_STOPRIS        0x00000040  // STOP Detection Raw Interrupt
-                                            // Status
-#define I2C_MRIS_STARTRIS       0x00000020  // START Detection Raw Interrupt
-                                            // Status
-#define I2C_MRIS_NACKRIS        0x00000010  // Address/Data NACK Raw Interrupt
-                                            // Status
-#define I2C_MRIS_DMATXRIS       0x00000008  // Transmit DMA Raw Interrupt
-                                            // Status
-#define I2C_MRIS_DMARXRIS       0x00000004  // Receive DMA Raw Interrupt Status
-#define I2C_MRIS_CLKRIS         0x00000002  // Clock Timeout Raw Interrupt
-                                            // Status
-#define I2C_MRIS_RIS            0x00000001  // Master Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MMIS register.
-//
-//******************************************************************************
-#define I2C_MMIS_RXFFMIS        0x00000800  // Receive FIFO Full Interrupt Mask
-#define I2C_MMIS_TXFEMIS        0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_MMIS_RXMIS          0x00000200  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_MMIS_TXMIS          0x00000100  // Transmit Request Interrupt Mask
-#define I2C_MMIS_ARBLOSTMIS     0x00000080  // Arbitration Lost Interrupt Mask
-#define I2C_MMIS_STOPMIS        0x00000040  // STOP Detection Interrupt Mask
-#define I2C_MMIS_STARTMIS       0x00000020  // START Detection Interrupt Mask
-#define I2C_MMIS_NACKMIS        0x00000010  // Address/Data NACK Interrupt Mask
-#define I2C_MMIS_DMATXMIS       0x00000008  // Transmit DMA Interrupt Status
-#define I2C_MMIS_DMARXMIS       0x00000004  // Receive DMA Interrupt Status
-#define I2C_MMIS_CLKMIS         0x00000002  // Clock Timeout Masked Interrupt
-                                            // Status
-#define I2C_MMIS_MIS            0x00000001  // Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MICR register.
-//
-//******************************************************************************
-#define I2C_MICR_RXFFIC         0x00000800  // Receive FIFO Full Interrupt
-                                            // Clear
-#define I2C_MICR_TXFEIC         0x00000400  // Transmit FIFO Empty Interrupt
-                                            // Clear
-#define I2C_MICR_RXIC           0x00000200  // Receive FIFO Request Interrupt
-                                            // Clear
-#define I2C_MICR_TXIC           0x00000100  // Transmit FIFO Request Interrupt
-                                            // Clear
-#define I2C_MICR_ARBLOSTIC      0x00000080  // Arbitration Lost Interrupt Clear
-#define I2C_MICR_STOPIC         0x00000040  // STOP Detection Interrupt Clear
-#define I2C_MICR_STARTIC        0x00000020  // START Detection Interrupt Clear
-#define I2C_MICR_NACKIC         0x00000010  // Address/Data NACK Interrupt
-                                            // Clear
-#define I2C_MICR_DMATXIC        0x00000008  // Transmit DMA Interrupt Clear
-#define I2C_MICR_DMARXIC        0x00000004  // Receive DMA Interrupt Clear
-#define I2C_MICR_CLKIC          0x00000002  // Clock Timeout Interrupt Clear
-#define I2C_MICR_IC             0x00000001  // Master Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCR register.
-//
-//******************************************************************************
-#define I2C_MCR_MMD             0x00000040  // Multi-master Disable
-#define I2C_MCR_SFE             0x00000020  // I2C Slave Function Enable
-#define I2C_MCR_MFE             0x00000010  // I2C Master Function Enable
-#define I2C_MCR_LPBK            0x00000001  // I2C Loopback
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MCLKOCNT register.
-//
-//******************************************************************************
-#define I2C_MCLKOCNT_CNTL_M   0x000000FF  // I2C Master Count
-#define I2C_MCLKOCNT_CNTL_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBMON register.
-//
-//******************************************************************************
-#define I2C_MBMON_SDA           0x00000002  // I2C SDA Status
-#define I2C_MBMON_SCL           0x00000001  // I2C SCL Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBLEN register.
-//
-//******************************************************************************
-#define I2C_MBLEN_CNTL_M      0x000000FF  // I2C Burst Length
-#define I2C_MBLEN_CNTL_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MBCNT register.
-//
-//******************************************************************************
-#define I2C_MBCNT_CNTL_M      0x000000FF  // I2C Master Burst Count
-#define I2C_MBCNT_CNTL_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SOAR register.
-//
-//******************************************************************************
-#define I2C_SOAR_OAR_M        0x0000007F  // I2C Slave Own Address
-#define I2C_SOAR_OAR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SCSR register.
-//
-//******************************************************************************
-#define I2C_SCSR_ACTDMARX       0x80000000  // DMA RX Active Status
-#define I2C_SCSR_ACTDMATX       0x40000000  // DMA TX Active Status
-#define I2C_SCSR_QCMDRW         0x00000020  // Quick Command Read / Write
-#define I2C_SCSR_QCMDST         0x00000010  // Quick Command Status
-#define I2C_SCSR_OAR2SEL        0x00000008  // OAR2 Address Matched
-#define I2C_SCSR_FBR            0x00000004  // First Byte Received
-#define I2C_SCSR_TREQ           0x00000002  // Transmit Request
-#define I2C_SCSR_DA             0x00000001  // Device Active
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SDR register.
-//
-//******************************************************************************
-#define I2C_SDR_DATA_M        0x000000FF  // Data for Transfer
-#define I2C_SDR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SIMR register.
-//
-//******************************************************************************
-#define I2C_SIMR_IM             0x00000100  // Interrupt Mask
-#define I2C_SIMR_TXFEIM         0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SIMR_RXIM           0x00000040  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_SIMR_TXIM           0x00000020  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_SIMR_DMATXIM        0x00000010  // Transmit DMA Interrupt Mask
-#define I2C_SIMR_DMARXIM        0x00000008  // Receive DMA Interrupt Mask
-#define I2C_SIMR_STOPIM         0x00000004  // Stop Condition Interrupt Mask
-#define I2C_SIMR_STARTIM        0x00000002  // Start Condition Interrupt Mask
-#define I2C_SIMR_DATAIM         0x00000001  // Data Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SRIS register.
-//
-//******************************************************************************
-#define I2C_SRIS_RIS            0x00000100  // Raw Interrupt Status
-#define I2C_SRIS_TXFERIS        0x00000080  // Transmit FIFO Empty Raw
-                                            // Interrupt Status
-#define I2C_SRIS_RXRIS          0x00000040  // Receive FIFO Request Raw
-                                            // Interrupt Status
-#define I2C_SRIS_TXRIS          0x00000020  // Transmit Request Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DMATXRIS       0x00000010  // Transmit DMA Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DMARXRIS       0x00000008  // Receive DMA Raw Interrupt Status
-#define I2C_SRIS_STOPRIS        0x00000004  // Stop Condition Raw Interrupt
-                                            // Status
-#define I2C_SRIS_STARTRIS       0x00000002  // Start Condition Raw Interrupt
-                                            // Status
-#define I2C_SRIS_DATARIS        0x00000001  // Data Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SMIS register.
-//
-//******************************************************************************
-#define I2C_SMIS_RXFFMIS        0x00000100  // Receive FIFO Full Interrupt Mask
-#define I2C_SMIS_TXFEMIS        0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SMIS_RXMIS          0x00000040  // Receive FIFO Request Interrupt
-                                            // Mask
-#define I2C_SMIS_TXMIS          0x00000020  // Transmit FIFO Request Interrupt
-                                            // Mask
-#define I2C_SMIS_DMATXMIS       0x00000010  // Transmit DMA Masked Interrupt
-                                            // Status
-#define I2C_SMIS_DMARXMIS       0x00000008  // Receive DMA Masked Interrupt
-                                            // Status
-#define I2C_SMIS_STOPMIS        0x00000004  // Stop Condition Masked Interrupt
-                                            // Status
-#define I2C_SMIS_STARTMIS       0x00000002  // Start Condition Masked Interrupt
-                                            // Status
-#define I2C_SMIS_DATAMIS        0x00000001  // Data Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SICR register.
-//
-//******************************************************************************
-#define I2C_SICR_RXFFIC         0x00000100  // Receive FIFO Full Interrupt Mask
-#define I2C_SICR_TXFEIC         0x00000080  // Transmit FIFO Empty Interrupt
-                                            // Mask
-#define I2C_SICR_RXIC           0x00000040  // Receive Request Interrupt Mask
-#define I2C_SICR_TXIC           0x00000020  // Transmit Request Interrupt Mask
-#define I2C_SICR_DMATXIC        0x00000010  // Transmit DMA Interrupt Clear
-#define I2C_SICR_DMARXIC        0x00000008  // Receive DMA Interrupt Clear
-#define I2C_SICR_STOPIC         0x00000004  // Stop Condition Interrupt Clear
-#define I2C_SICR_STARTIC        0x00000002  // Start Condition Interrupt Clear
-#define I2C_SICR_DATAIC         0x00000001  // Data Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SOAR2 register.
-//
-//******************************************************************************
-#define I2C_SOAR2_OAR2EN        0x00000080  // I2C Slave Own Address 2 Enable
-#define I2C_SOAR2_OAR2_M      0x0000007F  // I2C Slave Own Address 2
-#define I2C_SOAR2_OAR2_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_SACKCTL register.
-//
-//******************************************************************************
-#define I2C_SACKCTL_ACKOVAL     0x00000002  // I2C Slave ACK Override Value
-#define I2C_SACKCTL_ACKOEN      0x00000001  // I2C Slave ACK Override Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFODATA register.
-//
-//******************************************************************************
-#define I2C_FIFODATA_DATA_M   0x000000FF  // I2C FIFO Data Byte
-#define I2C_FIFODATA_DATA_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFOCTL register.
-//
-//******************************************************************************
-#define I2C_FIFOCTL_RXASGNMT    0x80000000  // RX Control Assignment
-#define I2C_FIFOCTL_RXFLUSH     0x40000000  // RX FIFO Flush
-#define I2C_FIFOCTL_DMARXENA    0x20000000  // DMA RX Channel Enable
-#define I2C_FIFOCTL_RXTRIG_M  0x00070000  // RX FIFO Trigger
-#define I2C_FIFOCTL_RXTRIG_S  16
-#define I2C_FIFOCTL_TXASGNMT    0x00008000  // TX Control Assignment
-#define I2C_FIFOCTL_TXFLUSH     0x00004000  // TX FIFO Flush
-#define I2C_FIFOCTL_DMATXENA    0x00002000  // DMA TX Channel Enable
-#define I2C_FIFOCTL_TXTRIG_M  0x00000007  // TX FIFO Trigger
-#define I2C_FIFOCTL_TXTRIG_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_FIFOSTATUS register.
-//
-//******************************************************************************
-#define I2C_FIFOSTATUS_RXABVTRIG \
-                                0x00040000  // RX FIFO Above Trigger Level
-
-#define I2C_FIFOSTATUS_RXFF     0x00020000  // RX FIFO Full
-#define I2C_FIFOSTATUS_RXFE     0x00010000  // RX FIFO Empty
-#define I2C_FIFOSTATUS_TXBLWTRIG \
-                                0x00000004  // TX FIFO Below Trigger Level
-
-#define I2C_FIFOSTATUS_TXFF     0x00000002  // TX FIFO Full
-#define I2C_FIFOSTATUS_TXFE     0x00000001  // TX FIFO Empty
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_OBSMUXSEL0 register.
-//
-//******************************************************************************
-#define I2C_OBSMUXSEL0_LN3_M  0x07000000  // Observation Mux Lane 3
-#define I2C_OBSMUXSEL0_LN3_S  24
-#define I2C_OBSMUXSEL0_LN2_M  0x00070000  // Observation Mux Lane 2
-#define I2C_OBSMUXSEL0_LN2_S  16
-#define I2C_OBSMUXSEL0_LN1_M  0x00000700  // Observation Mux Lane 1
-#define I2C_OBSMUXSEL0_LN1_S  8
-#define I2C_OBSMUXSEL0_LN0_M  0x00000007  // Observation Mux Lane 0
-#define I2C_OBSMUXSEL0_LN0_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_OBSMUXSEL1 register.
-//
-//******************************************************************************
-#define I2C_OBSMUXSEL1_LN7_M  0x07000000  // Observation Mux Lane 7
-#define I2C_OBSMUXSEL1_LN7_S  24
-#define I2C_OBSMUXSEL1_LN6_M  0x00070000  // Observation Mux Lane 6
-#define I2C_OBSMUXSEL1_LN6_S  16
-#define I2C_OBSMUXSEL1_LN5_M  0x00000700  // Observation Mux Lane 5
-#define I2C_OBSMUXSEL1_LN5_S  8
-#define I2C_OBSMUXSEL1_LN4_M  0x00000007  // Observation Mux Lane 4
-#define I2C_OBSMUXSEL1_LN4_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_MUXROUTE register.
-//
-//******************************************************************************
-#define I2C_MUXROUTE_LN7ROUTE_M \
-                                0x70000000  // Lane 7 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN7ROUTE_S 28
-#define I2C_MUXROUTE_LN6ROUTE_M \
-                                0x07000000  // Lane 6 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN6ROUTE_S 24
-#define I2C_MUXROUTE_LN5ROUTE_M \
-                                0x00700000  // Lane 5 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN5ROUTE_S 20
-#define I2C_MUXROUTE_LN4ROUTE_M \
-                                0x00070000  // Lane 4 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN4ROUTE_S 16
-#define I2C_MUXROUTE_LN3ROUTE_M \
-                                0x00007000  // Lane 3 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN3ROUTE_S 12
-#define I2C_MUXROUTE_LN2ROUTE_M \
-                                0x00000700  // Lane 2 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN2ROUTE_S 8
-#define I2C_MUXROUTE_LN1ROUTE_M \
-                                0x00000070  // Lane 1 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN1ROUTE_S 4
-#define I2C_MUXROUTE_LN0ROUTE_M \
-                                0x00000007  // Lane 0 output is routed to the
-                                            // lane pointed to by the offset in
-                                            // this bit field
-
-#define I2C_MUXROUTE_LN0ROUTE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PV register.
-//
-//******************************************************************************
-#define I2C_PV_MAJOR_M        0x0000FF00  // Major Revision
-#define I2C_PV_MAJOR_S        8
-#define I2C_PV_MINOR_M        0x000000FF  // Minor Revision
-#define I2C_PV_MINOR_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PP register.
-//
-//******************************************************************************
-#define I2C_PP_HS               0x00000001  // High-Speed Capable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_PC register.
-//
-//******************************************************************************
-#define I2C_PC_HS               0x00000001  // High-Speed Capable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the I2C_O_CC register.
-//
-//******************************************************************************
-
-
-
-#endif // __HW_I2C_H__
diff --git a/ports/cc3200/hal/inc/hw_ints.h b/ports/cc3200/hal/inc/hw_ints.h
deleted file mode 100644
index 6b40193559537..0000000000000
--- a/ports/cc3200/hal/inc/hw_ints.h
+++ /dev/null
@@ -1,117 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_ints.h - Macros that define the interrupt assignment on CC3200.
-//
-//*****************************************************************************
-
-#ifndef __HW_INTS_H__
-#define __HW_INTS_H__
-
-//*****************************************************************************
-//
-// The following are defines for the fault assignments.
-//
-//*****************************************************************************
-#define FAULT_NMI               2           // NMI fault
-#define FAULT_HARD              3           // Hard fault
-#define FAULT_MPU               4           // MPU fault
-#define FAULT_BUS               5           // Bus fault
-#define FAULT_USAGE             6           // Usage fault
-#define FAULT_SVCALL            11          // SVCall
-#define FAULT_DEBUG             12          // Debug monitor
-#define FAULT_PENDSV            14          // PendSV
-#define FAULT_SYSTICK           15          // System Tick
-
-//*****************************************************************************
-//
-// The following are defines for the interrupt assignments.
-//
-//*****************************************************************************
-#define INT_GPIOA0              16          // GPIO Port S0
-#define INT_GPIOA1              17          // GPIO Port S1
-#define INT_GPIOA2              18          // GPIO Port S2
-#define INT_GPIOA3              19          // GPIO Port S3
-#define INT_UARTA0              21          // UART0 Rx and Tx
-#define INT_UARTA1              22          // UART1 Rx and Tx
-#define INT_I2CA0               24          // I2C controller
-#define INT_ADCCH0              30          // ADC Sequence 0
-#define INT_ADCCH1              31          // ADC Sequence 1
-#define INT_ADCCH2              32          // ADC Sequence 2
-#define INT_ADCCH3              33          // ADC Sequence 3
-#define INT_WDT                 34          // Watchdog Timer0
-#define INT_TIMERA0A            35          // Timer 0 subtimer A
-#define INT_TIMERA0B            36          // Timer 0 subtimer B
-#define INT_TIMERA1A            37          // Timer 1 subtimer A
-#define INT_TIMERA1B            38          // Timer 1 subtimer B
-#define INT_TIMERA2A            39          // Timer 2 subtimer A
-#define INT_TIMERA2B            40          // Timer 2 subtimer B
-#define INT_FLASH               45          // FLASH Control
-#define INT_TIMERA3A            51          // Timer 3 subtimer A
-#define INT_TIMERA3B            52          // Timer 3 subtimer B
-#define INT_UDMA                62          // uDMA controller
-#define INT_UDMAERR             63          // uDMA Error
-#define INT_SHA                 164         // SHA
-#define INT_AES                 167         // AES
-#define INT_DES                 169         // DES
-#define INT_MMCHS               175         // SDIO
-#define INT_I2S                 177         // McAPS
-#define INT_CAMERA              179         // Camera
-#define INT_NWPIC               187         // Interprocessor communication
-#define INT_PRCM                188         // Power, Reset and Clock Module
-#define INT_SSPI                191         // Shared SPI
-#define INT_GSPI                192         // Generic SPI
-#define INT_LSPI                193         // Link SPI
-
-//*****************************************************************************
-//
-// The following are defines for the total number of interrupts.
-//
-//*****************************************************************************
-#define NUM_INTERRUPTS          195 //The above number plus 2?
-
-
-//*****************************************************************************
-//
-// The following are defines for the total number of priority levels.
-//
-//*****************************************************************************
-#define NUM_PRIORITY            8
-#define NUM_PRIORITY_BITS       3
-
-
-#endif // __HW_INTS_H__
diff --git a/ports/cc3200/hal/inc/hw_mcasp.h b/ports/cc3200/hal/inc/hw_mcasp.h
deleted file mode 100644
index c27a007797d07..0000000000000
--- a/ports/cc3200/hal/inc/hw_mcasp.h
+++ /dev/null
@@ -1,1706 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MCASP_H__
-#define __HW_MCASP_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MCASP register offsets.
-//
-//*****************************************************************************
-#define MCASP_O_PID             0x00000000
-#define MCASP_O_ESYSCONFIG      0x00000004  // Power Idle SYSCONFIG register.
-#define MCASP_O_PFUNC           0x00000010
-#define MCASP_O_PDIR            0x00000014
-#define MCASP_O_PDOUT           0x00000018
-#define MCASP_O_PDSET           0x0000001C  // The pin data set register
-                                            // (PDSET) is an alias of the pin
-                                            // data output register (PDOUT) for
-                                            // writes only. Writing a 1 to the
-                                            // PDSET bit sets the corresponding
-                                            // bit in PDOUT and if PFUNC = 1
-                                            // (GPIO function) and PDIR = 1
-                                            // (output) drives a logic high on
-                                            // the pin.
-#define MCASP_O_PDIN            0x0000001C  // The pin data input register
-                                            // (PDIN) holds the I/O pin state of
-                                            // each of the McASP pins. PDIN
-                                            // allows the actual value of the
-                                            // pin to be read regardless of the
-                                            // state of PFUNC and PDIR.
-#define MCASP_O_PDCLR           0x00000020  // The pin data clear register
-                                            // (PDCLR) is an alias of the pin
-                                            // data output register (PDOUT) for
-                                            // writes only. Writing a 1 to the
-                                            // PDCLR bit clears the
-                                            // corresponding bit in PDOUT and if
-                                            // PFUNC = 1 (GPIO function) and
-                                            // PDIR = 1 (output) drives a logic
-                                            // low on the pin.
-#define MCASP_O_TLGC            0x00000030  // for IODFT
-#define MCASP_O_TLMR            0x00000034  // for IODFT
-#define MCASP_O_TLEC            0x00000038  // for IODFT
-#define MCASP_O_GBLCTL          0x00000044
-#define MCASP_O_AMUTE           0x00000048
-#define MCASP_O_LBCTL           0x0000004C
-#define MCASP_O_TXDITCTL        0x00000050
-#define MCASP_O_GBLCTLR         0x00000060
-#define MCASP_O_RXMASK          0x00000064
-#define MCASP_O_RXFMT           0x00000068
-#define MCASP_O_RXFMCTL         0x0000006C
-#define MCASP_O_ACLKRCTL        0x00000070
-#define MCASP_O_AHCLKRCTL       0x00000074
-#define MCASP_O_RXTDM           0x00000078
-#define MCASP_O_EVTCTLR         0x0000007C
-#define MCASP_O_RXSTAT          0x00000080
-#define MCASP_O_RXTDMSLOT       0x00000084
-#define MCASP_O_RXCLKCHK        0x00000088
-#define MCASP_O_REVTCTL         0x0000008C
-#define MCASP_O_GBLCTLX         0x000000A0
-#define MCASP_O_TXMASK          0x000000A4
-#define MCASP_O_TXFMT           0x000000A8
-#define MCASP_O_TXFMCTL         0x000000AC
-#define MCASP_O_ACLKXCTL        0x000000B0
-#define MCASP_O_AHCLKXCTL       0x000000B4
-#define MCASP_O_TXTDM           0x000000B8
-#define MCASP_O_EVTCTLX         0x000000BC
-#define MCASP_O_TXSTAT          0x000000C0
-#define MCASP_O_TXTDMSLOT       0x000000C4
-#define MCASP_O_TXCLKCHK        0x000000C8
-#define MCASP_O_XEVTCTL         0x000000CC
-#define MCASP_O_CLKADJEN        0x000000D0
-#define MCASP_O_DITCSRA0        0x00000100
-#define MCASP_O_DITCSRA1        0x00000104
-#define MCASP_O_DITCSRA2        0x00000108
-#define MCASP_O_DITCSRA3        0x0000010C
-#define MCASP_O_DITCSRA4        0x00000110
-#define MCASP_O_DITCSRA5        0x00000114
-#define MCASP_O_DITCSRB0        0x00000118
-#define MCASP_O_DITCSRB1        0x0000011C
-#define MCASP_O_DITCSRB2        0x00000120
-#define MCASP_O_DITCSRB3        0x00000124
-#define MCASP_O_DITCSRB4        0x00000128
-#define MCASP_O_DITCSRB5        0x0000012C
-#define MCASP_O_DITUDRA0        0x00000130
-#define MCASP_O_DITUDRA1        0x00000134
-#define MCASP_O_DITUDRA2        0x00000138
-#define MCASP_O_DITUDRA3        0x0000013C
-#define MCASP_O_DITUDRA4        0x00000140
-#define MCASP_O_DITUDRA5        0x00000144
-#define MCASP_O_DITUDRB0        0x00000148
-#define MCASP_O_DITUDRB1        0x0000014C
-#define MCASP_O_DITUDRB2        0x00000150
-#define MCASP_O_DITUDRB3        0x00000154
-#define MCASP_O_DITUDRB4        0x00000158
-#define MCASP_O_DITUDRB5        0x0000015C
-#define MCASP_O_XRSRCTL0        0x00000180
-#define MCASP_O_XRSRCTL1        0x00000184
-#define MCASP_O_XRSRCTL2        0x00000188
-#define MCASP_O_XRSRCTL3        0x0000018C
-#define MCASP_O_XRSRCTL4        0x00000190
-#define MCASP_O_XRSRCTL5        0x00000194
-#define MCASP_O_XRSRCTL6        0x00000198
-#define MCASP_O_XRSRCTL7        0x0000019C
-#define MCASP_O_XRSRCTL8        0x000001A0
-#define MCASP_O_XRSRCTL9        0x000001A4
-#define MCASP_O_XRSRCTL10       0x000001A8
-#define MCASP_O_XRSRCTL11       0x000001AC
-#define MCASP_O_XRSRCTL12       0x000001B0
-#define MCASP_O_XRSRCTL13       0x000001B4
-#define MCASP_O_XRSRCTL14       0x000001B8
-#define MCASP_O_XRSRCTL15       0x000001BC
-#define MCASP_O_TXBUF0          0x00000200
-#define MCASP_O_TXBUF1          0x00000204
-#define MCASP_O_TXBUF2          0x00000208
-#define MCASP_O_TXBUF3          0x0000020C
-#define MCASP_O_TXBUF4          0x00000210
-#define MCASP_O_TXBUF5          0x00000214
-#define MCASP_O_TXBUF6          0x00000218
-#define MCASP_O_TXBUF7          0x0000021C
-#define MCASP_O_TXBUF8          0x00000220
-#define MCASP_O_TXBUF9          0x00000224
-#define MCASP_O_TXBUF10         0x00000228
-#define MCASP_O_TXBUF11         0x0000022C
-#define MCASP_O_TXBUF12         0x00000230
-#define MCASP_O_TXBUF13         0x00000234
-#define MCASP_O_TXBUF14         0x00000238
-#define MCASP_O_TXBUF15         0x0000023C
-#define MCASP_O_RXBUF0          0x00000280
-#define MCASP_O_RXBUF1          0x00000284
-#define MCASP_O_RXBUF2          0x00000288
-#define MCASP_O_RXBUF3          0x0000028C
-#define MCASP_O_RXBUF4          0x00000290
-#define MCASP_O_RXBUF5          0x00000294
-#define MCASP_O_RXBUF6          0x00000298
-#define MCASP_O_RXBUF7          0x0000029C
-#define MCASP_O_RXBUF8          0x000002A0
-#define MCASP_O_RXBUF9          0x000002A4
-#define MCASP_O_RXBUF10         0x000002A8
-#define MCASP_O_RXBUF11         0x000002AC
-#define MCASP_O_RXBUF12         0x000002B0
-#define MCASP_O_RXBUF13         0x000002B4
-#define MCASP_O_RXBUF14         0x000002B8
-#define MCASP_O_RXBUF15         0x000002BC
-#define	MCASP_0_WFIFOCTL	0x00001000
-#define	MCASP_0_WFIFOSTS	0x00001004
-#define	MCASP_0_RFIFOCTL	0x00001008
-#define	MCASP_0_RFIFOSTS	0x0000100C
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PID register.
-//
-//******************************************************************************
-#define MCASP_PID_SCHEME_M      0xC0000000
-#define MCASP_PID_SCHEME_S      30
-#define MCASP_PID_RESV_M        0x30000000
-#define MCASP_PID_RESV_S        28
-#define MCASP_PID_FUNCTION_M    0x0FFF0000  // McASP
-#define MCASP_PID_FUNCTION_S    16
-#define MCASP_PID_RTL_M         0x0000F800
-#define MCASP_PID_RTL_S         11
-#define MCASP_PID_REVMAJOR_M    0x00000700
-#define MCASP_PID_REVMAJOR_S    8
-#define MCASP_PID_CUSTOM_M      0x000000C0  // non-custom
-#define MCASP_PID_CUSTOM_S      6
-#define MCASP_PID_REVMINOR_M    0x0000003F
-#define MCASP_PID_REVMINOR_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCASP_O_ESYSCONFIG register.
-//
-//******************************************************************************
-#define MCASP_ESYSCONFIG_RSV_M  0xFFFFFFC0  // Reserved as per PDR 3.5
-#define MCASP_ESYSCONFIG_RSV_S  6
-#define MCASP_ESYSCONFIG_OTHER_M \
-                                0x0000003C  // Reserved for future expansion
-
-#define MCASP_ESYSCONFIG_OTHER_S 2
-#define MCASP_ESYSCONFIG_IDLE_MODE_M \
-                                0x00000003  // Idle Mode
-
-#define MCASP_ESYSCONFIG_IDLE_MODE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PFUNC register.
-//
-//******************************************************************************
-#define MCASP_PFUNC_AFSR        0x80000000  // AFSR PFUNC 31 0 1
-#define MCASP_PFUNC_AHCLKR      0x40000000  // AHCLKR PFUNC 30 0 1
-#define MCASP_PFUNC_ACLKR       0x20000000  // ACLKR PFUNC 29 0 1
-#define MCASP_PFUNC_AFSX        0x10000000  // AFSX PFUNC 28 0 1
-#define MCASP_PFUNC_AHCLKX      0x08000000  // AHCLKX PFUNC 27 0 1
-#define MCASP_PFUNC_ACLKX       0x04000000  // ACLKX PFUNC 26 0 1
-#define MCASP_PFUNC_AMUTE       0x02000000  // AMUTE PFUNC 25 0 1
-#define MCASP_PFUNC_RESV1_M     0x01FF0000  // Reserved
-#define MCASP_PFUNC_RESV1_S     16
-#define MCASP_PFUNC_AXR15       0x00008000  // AXR PFUNC BIT 15 0 1
-#define MCASP_PFUNC_AXR14       0x00004000  // AXR PFUNC BIT 14 0 1
-#define MCASP_PFUNC_AXR13       0x00002000  // AXR PFUNC BIT 13 0 1
-#define MCASP_PFUNC_AXR12       0x00001000  // AXR PFUNC BIT 12 0 1
-#define MCASP_PFUNC_AXR11       0x00000800  // AXR PFUNC BIT 11 0 1
-#define MCASP_PFUNC_AXR10       0x00000400  // AXR PFUNC BIT 10 0 1
-#define MCASP_PFUNC_AXR9        0x00000200  // AXR PFUNC BIT 9 0 1
-#define MCASP_PFUNC_AXR8        0x00000100  // AXR PFUNC BIT 8 0 1
-#define MCASP_PFUNC_AXR7        0x00000080  // AXR PFUNC BIT 7 0 1
-#define MCASP_PFUNC_AXR6        0x00000040  // AXR PFUNC BIT 6 0 1
-#define MCASP_PFUNC_AXR5        0x00000020  // AXR PFUNC BIT 5 0 1
-#define MCASP_PFUNC_AXR4        0x00000010  // AXR PFUNC BIT 4 0 1
-#define MCASP_PFUNC_AXR3        0x00000008  // AXR PFUNC BIT 3 0 1
-#define MCASP_PFUNC_AXR2        0x00000004  // AXR PFUNC BIT 2 0 1
-#define MCASP_PFUNC_AXR1        0x00000002  // AXR PFUNC BIT 1 0 1
-#define MCASP_PFUNC_AXR0        0x00000001  // AXR PFUNC BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDIR register.
-//
-//******************************************************************************
-#define MCASP_PDIR_AFSR         0x80000000  // AFSR PDIR 31 0 1
-#define MCASP_PDIR_AHCLKR       0x40000000  // AHCLKR PDIR 30 0 1
-#define MCASP_PDIR_ACLKR        0x20000000  // ACLKR PDIR 29 0 1
-#define MCASP_PDIR_AFSX         0x10000000  // AFSX PDIR 28 0 1
-#define MCASP_PDIR_AHCLKX       0x08000000  // AHCLKX PDIR 27 0 1
-#define MCASP_PDIR_ACLKX        0x04000000  // ACLKX PDIR 26 0 1
-#define MCASP_PDIR_AMUTE        0x02000000  // AMUTE PDIR 25 0 1
-#define MCASP_PDIR_RESV_M       0x01FF0000  // Reserved
-#define MCASP_PDIR_RESV_S       16
-#define MCASP_PDIR_AXR15        0x00008000  // AXR PDIR BIT 15 0 1
-#define MCASP_PDIR_AXR14        0x00004000  // AXR PDIR BIT 14 0 1
-#define MCASP_PDIR_AXR13        0x00002000  // AXR PDIR BIT 13 0 1
-#define MCASP_PDIR_AXR12        0x00001000  // AXR PDIR BIT 12 0 1
-#define MCASP_PDIR_AXR11        0x00000800  // AXR PDIR BIT 11 0 1
-#define MCASP_PDIR_AXR10        0x00000400  // AXR PDIR BIT 10 0 1
-#define MCASP_PDIR_AXR9         0x00000200  // AXR PDIR BIT 9 0 1
-#define MCASP_PDIR_AXR8         0x00000100  // AXR PDIR BIT 8 0 1
-#define MCASP_PDIR_AXR7         0x00000080  // AXR PDIR BIT 7 0 1
-#define MCASP_PDIR_AXR6         0x00000040  // AXR PDIR BIT 6 0 1
-#define MCASP_PDIR_AXR5         0x00000020  // AXR PDIR BIT 5 0 1
-#define MCASP_PDIR_AXR4         0x00000010  // AXR PDIR BIT 4 0 1
-#define MCASP_PDIR_AXR3         0x00000008  // AXR PDIR BIT 3 0 1
-#define MCASP_PDIR_AXR2         0x00000004  // AXR PDIR BIT 2 0 1
-#define MCASP_PDIR_AXR1         0x00000002  // AXR PDIR BIT 1 0 1
-#define MCASP_PDIR_AXR0         0x00000001  // AXR PDIR BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDOUT register.
-//
-//******************************************************************************
-#define MCASP_PDOUT_AFSR        0x80000000  // AFSR PDOUT 31 0 1
-#define MCASP_PDOUT_AHCLKR      0x40000000  // AHCLKR PDOUT 30 0 1
-#define MCASP_PDOUT_ACLKR       0x20000000  // ACLKR PDOUT 29 0 1
-#define MCASP_PDOUT_AFSX        0x10000000  // AFSX PDOUT 28 0 1
-#define MCASP_PDOUT_AHCLKX      0x08000000  // AHCLKX PDOUT 27 0 1
-#define MCASP_PDOUT_ACLKX       0x04000000  // ACLKX PDOUT 26 0 1
-#define MCASP_PDOUT_AMUTE       0x02000000  // AMUTE PDOUT 25 0 1
-#define MCASP_PDOUT_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDOUT_RESV_S      16
-#define MCASP_PDOUT_AXR15       0x00008000  // AXR PDOUT BIT 15 0 1
-#define MCASP_PDOUT_AXR14       0x00004000  // AXR PDOUT BIT 14 0 1
-#define MCASP_PDOUT_AXR13       0x00002000  // AXR PDOUT BIT 13 0 1
-#define MCASP_PDOUT_AXR12       0x00001000  // AXR PDOUT BIT 12 0 1
-#define MCASP_PDOUT_AXR11       0x00000800  // AXR PDOUT BIT 11 0 1
-#define MCASP_PDOUT_AXR10       0x00000400  // AXR PDOUT BIT 10 0 1
-#define MCASP_PDOUT_AXR9        0x00000200  // AXR PDOUT BIT 9 0 1
-#define MCASP_PDOUT_AXR8        0x00000100  // AXR PDOUT BIT 8 0 1
-#define MCASP_PDOUT_AXR7        0x00000080  // AXR PDOUT BIT 7 0 1
-#define MCASP_PDOUT_AXR6        0x00000040  // AXR PDOUT BIT 6 0 1
-#define MCASP_PDOUT_AXR5        0x00000020  // AXR PDOUT BIT 5 0 1
-#define MCASP_PDOUT_AXR4        0x00000010  // AXR PDOUT BIT 4 0 1
-#define MCASP_PDOUT_AXR3        0x00000008  // AXR PDOUT BIT 3 0 1
-#define MCASP_PDOUT_AXR2        0x00000004  // AXR PDOUT BIT 2 0 1
-#define MCASP_PDOUT_AXR1        0x00000002  // AXR PDOUT BIT 1 0 1
-#define MCASP_PDOUT_AXR0        0x00000001  // AXR PDOUT BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDSET register.
-//
-//******************************************************************************
-#define MCASP_PDSET_AFSR        0x80000000
-#define MCASP_PDSET_AHCLKR      0x40000000
-#define MCASP_PDSET_ACLKR       0x20000000
-#define MCASP_PDSET_AFSX        0x10000000
-#define MCASP_PDSET_AHCLKX      0x08000000
-#define MCASP_PDSET_ACLKX       0x04000000
-#define MCASP_PDSET_AMUTE       0x02000000
-#define MCASP_PDSET_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDSET_RESV_S      16
-#define MCASP_PDSET_AXR15       0x00008000
-#define MCASP_PDSET_AXR14       0x00004000
-#define MCASP_PDSET_AXR13       0x00002000
-#define MCASP_PDSET_AXR12       0x00001000
-#define MCASP_PDSET_AXR11       0x00000800
-#define MCASP_PDSET_AXR10       0x00000400
-#define MCASP_PDSET_AXR9        0x00000200
-#define MCASP_PDSET_AXR8        0x00000100
-#define MCASP_PDSET_AXR7        0x00000080
-#define MCASP_PDSET_AXR6        0x00000040
-#define MCASP_PDSET_AXR5        0x00000020
-#define MCASP_PDSET_AXR4        0x00000010
-#define MCASP_PDSET_AXR3        0x00000008
-#define MCASP_PDSET_AXR2        0x00000004
-#define MCASP_PDSET_AXR1        0x00000002
-#define MCASP_PDSET_AXR0        0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDIN register.
-//
-//******************************************************************************
-#define MCASP_PDIN_AFSR         0x80000000
-#define MCASP_PDIN_AHCLKR       0x40000000
-#define MCASP_PDIN_ACLKR        0x20000000
-#define MCASP_PDIN_AFSX         0x10000000
-#define MCASP_PDIN_AHCLKX       0x08000000
-#define MCASP_PDIN_ACLKX        0x04000000
-#define MCASP_PDIN_AMUTE        0x02000000
-#define MCASP_PDIN_RESV_M       0x01FF0000  // Reserved
-#define MCASP_PDIN_RESV_S       16
-#define MCASP_PDIN_AXR15        0x00008000
-#define MCASP_PDIN_AXR14        0x00004000
-#define MCASP_PDIN_AXR13        0x00002000
-#define MCASP_PDIN_AXR12        0x00001000
-#define MCASP_PDIN_AXR11        0x00000800
-#define MCASP_PDIN_AXR10        0x00000400
-#define MCASP_PDIN_AXR9         0x00000200
-#define MCASP_PDIN_AXR8         0x00000100
-#define MCASP_PDIN_AXR7         0x00000080
-#define MCASP_PDIN_AXR6         0x00000040
-#define MCASP_PDIN_AXR5         0x00000020
-#define MCASP_PDIN_AXR4         0x00000010
-#define MCASP_PDIN_AXR3         0x00000008
-#define MCASP_PDIN_AXR2         0x00000004
-#define MCASP_PDIN_AXR1         0x00000002
-#define MCASP_PDIN_AXR0         0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_PDCLR register.
-//
-//******************************************************************************
-#define MCASP_PDCLR_AFSR        0x80000000  // AFSR PDCLR 31 0 1
-#define MCASP_PDCLR_AHCLKR      0x40000000  // AHCLKR PDCLR 30 0 1
-#define MCASP_PDCLR_ACLKR       0x20000000  // ACLKR PDCLR 29 0 1
-#define MCASP_PDCLR_AFSX        0x10000000  // AFSX PDCLR 28 0 1
-#define MCASP_PDCLR_AHCLKX      0x08000000  // AHCLKX PDCLR 27 0 1
-#define MCASP_PDCLR_ACLKX       0x04000000  // ACLKX PDCLR 26 0 1
-#define MCASP_PDCLR_AMUTE       0x02000000  // AMUTE PDCLR 25 0 1
-#define MCASP_PDCLR_RESV_M      0x01FF0000  // Reserved
-#define MCASP_PDCLR_RESV_S      16
-#define MCASP_PDCLR_AXR15       0x00008000  // AXR PDCLR BIT 15 0 1
-#define MCASP_PDCLR_AXR14       0x00004000  // AXR PDCLR BIT 14 0 1
-#define MCASP_PDCLR_AXR13       0x00002000  // AXR PDCLR BIT 13 0 1
-#define MCASP_PDCLR_AXR12       0x00001000  // AXR PDCLR BIT 12 0 1
-#define MCASP_PDCLR_AXR11       0x00000800  // AXR PDCLR BIT 11 0 1
-#define MCASP_PDCLR_AXR10       0x00000400  // AXR PDCLR BIT 10 0 1
-#define MCASP_PDCLR_AXR9        0x00000200  // AXR PDCLR BIT 9 0 1
-#define MCASP_PDCLR_AXR8        0x00000100  // AXR PDCLR BIT 8 0 1
-#define MCASP_PDCLR_AXR7        0x00000080  // AXR PDCLR BIT 7 0 1
-#define MCASP_PDCLR_AXR6        0x00000040  // AXR PDCLR BIT 6 0 1
-#define MCASP_PDCLR_AXR5        0x00000020  // AXR PDCLR BIT 5 0 1
-#define MCASP_PDCLR_AXR4        0x00000010  // AXR PDCLR BIT 4 0 1
-#define MCASP_PDCLR_AXR3        0x00000008  // AXR PDCLR BIT 3 0 1
-#define MCASP_PDCLR_AXR2        0x00000004  // AXR PDCLR BIT 2 0 1
-#define MCASP_PDCLR_AXR1        0x00000002  // AXR PDCLR BIT 1 0 1
-#define MCASP_PDCLR_AXR0        0x00000001  // AXR PDCLR BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLGC register.
-//
-//******************************************************************************
-#define MCASP_TLGC_RESV_M       0xFFFF0000  // Reserved
-#define MCASP_TLGC_RESV_S       16
-#define MCASP_TLGC_MT_M         0x0000C000  // MISR on/off trigger command 0x0
-                                            // 0x1 0x2 0x3
-#define MCASP_TLGC_MT_S         14
-#define MCASP_TLGC_RESV1_M      0x00003E00  // Reserved
-#define MCASP_TLGC_RESV1_S      9
-#define MCASP_TLGC_MMS          0x00000100  // Source of MISR input 0 1
-#define MCASP_TLGC_ESEL         0x00000080  // Output enable select 0 1
-#define MCASP_TLGC_TOEN         0x00000040  // Test output enable control. 0 1
-#define MCASP_TLGC_MC_M         0x00000030  // States of MISR 0x0 0x1 0x2 0x3
-#define MCASP_TLGC_MC_S         4
-#define MCASP_TLGC_PC_M         0x0000000E  // Pattern code 0x0 0x1 0x2 0x3 0x4
-                                            // 0x5 0x6 0x7
-#define MCASP_TLGC_PC_S         1
-#define MCASP_TLGC_TM           0x00000001  // Tie high; do not write to this
-                                            // bit 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLMR register.
-//
-//******************************************************************************
-#define MCASP_TLMR_TLMR_M       0xFFFFFFFF  // Contains test result signature.
-#define MCASP_TLMR_TLMR_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TLEC register.
-//
-//******************************************************************************
-#define MCASP_TLEC_TLEC_M       0xFFFFFFFF  // Contains number of cycles during
-                                            // which MISR sig will be
-                                            // accumulated.
-#define MCASP_TLEC_TLEC_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTL register.
-//
-//******************************************************************************
-#define MCASP_GBLCTL_XFRST      0x00001000  // Frame sync generator reset 0 1
-#define MCASP_GBLCTL_XSMRST     0x00000800  // XMT state machine reset 0 1
-#define MCASP_GBLCTL_XSRCLR     0x00000400  // XMT serializer clear 0 1
-#define MCASP_GBLCTL_XHCLKRST   0x00000200  // XMT High Freq. clk Divider 0 1
-#define MCASP_GBLCTL_XCLKRST    0x00000100  // XMT clock divder reset 0 1
-#define MCASP_GBLCTL_RFRST      0x00000010  // Frame sync generator reset 0 1
-#define MCASP_GBLCTL_RSMRST     0x00000008  // RCV state machine reset 0 1
-#define MCASP_GBLCTL_RSRCLR     0x00000004  // RCV serializer clear 0 1
-#define MCASP_GBLCTL_RHCLKRST   0x00000002  // RCV High Freq. clk Divider 0 1
-#define MCASP_GBLCTL_RCLKRST    0x00000001  // RCV clock divder reset 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AMUTE register.
-//
-//******************************************************************************
-#define MCASP_AMUTE_XDMAERR     0x00001000  // MUTETXDMAERR occur 0 1
-#define MCASP_AMUTE_RDMAERR     0x00000800  // MUTERXDMAERR occur 0 1
-#define MCASP_AMUTE_XCKFAIL     0x00000400  // XMT bad clock 0 1
-#define MCASP_AMUTE_RCKFAIL     0x00000200  // RCV bad clock 0 1
-#define MCASP_AMUTE_XSYNCERR    0x00000100  // XMT unexpected FS 0 1
-#define MCASP_AMUTE_RSYNCERR    0x00000080  // RCV unexpected FS 0 1
-#define MCASP_AMUTE_XUNDRN      0x00000040  // XMT underrun occurs 0 1
-#define MCASP_AMUTE_ROVRN       0x00000020  // RCV overun occurs 0 1
-#define MCASP_AMUTE_INSTAT      0x00000010
-#define MCASP_AMUTE_INEN        0x00000008  // drive AMUTE active on mute in
-                                            // active 0 1
-#define MCASP_AMUTE_INPOL       0x00000004  // Mute input polarity 0 1
-#define MCASP_AMUTE_MUTEN_M     0x00000003  // AMUTE pin enable 0x0 0x1 0x2
-#define MCASP_AMUTE_MUTEN_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_LBCTL register.
-//
-//******************************************************************************
-#define MCASP_LBCTL_IOLBEN      0x00000010  // IO loopback enable 0 1
-#define MCASP_LBCTL_MODE_M      0x0000000C  // Loop back clock source generator
-                                            // 0x0 0x1 0x2 0x3
-#define MCASP_LBCTL_MODE_S      2
-#define MCASP_LBCTL_ORD         0x00000002  // Loopback order 0 1
-#define MCASP_LBCTL_DLBEN       0x00000001  // Loop back mode 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXDITCTL register.
-//
-//******************************************************************************
-#define MCASP_TXDITCTL_VB       0x00000008  // Valib bit for odd TDM 0 1
-#define MCASP_TXDITCTL_VA       0x00000004  // Valib bit for even TDM 0 1
-#define MCASP_TXDITCTL_DITEN    0x00000001  // XMT DIT Mode Enable 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTLR register.
-//
-//******************************************************************************
-#define MCASP_GBLCTLR_XFRST     0x00001000
-#define MCASP_GBLCTLR_XSMRST    0x00000800
-#define MCASP_GBLCTLR_XSRCLR    0x00000400
-#define MCASP_GBLCTLR_XHCLKRST  0x00000200
-#define MCASP_GBLCTLR_XCLKRST   0x00000100
-#define MCASP_GBLCTLR_RFRST     0x00000010  // Frame sync generator reset 0 1
-#define MCASP_GBLCTLR_RSMRST    0x00000008  // RCV state machine reset 0 1
-#define MCASP_GBLCTLR_RSRCLR    0x00000004  // RCV serializer clear 0 1
-#define MCASP_GBLCTLR_RHCLKRST  0x00000002  // RCV High Freq. clk Divider 0 1
-#define MCASP_GBLCTLR_RCLKRST   0x00000001  // RCV clock divder reset 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXMASK register.
-//
-//******************************************************************************
-#define MCASP_RXMASK_RMASK31    0x80000000  // RMASK BIT 31 0 1
-#define MCASP_RXMASK_RMASK30    0x40000000  // RMASK BIT 30 0 1
-#define MCASP_RXMASK_RMASK29    0x20000000  // RMASK BIT 29 0 1
-#define MCASP_RXMASK_RMASK28    0x10000000  // RMASK BIT 28 0 1
-#define MCASP_RXMASK_RMASK27    0x08000000  // RMASK BIT 27 0 1
-#define MCASP_RXMASK_RMASK26    0x04000000  // RMASK BIT 26 0 1
-#define MCASP_RXMASK_RMASK25    0x02000000  // RMASK BIT 25 0 1
-#define MCASP_RXMASK_RMASK24    0x01000000  // RMASK BIT 24 0 1
-#define MCASP_RXMASK_RMASK23    0x00800000  // RMASK BIT 23 0 1
-#define MCASP_RXMASK_RMASK22    0x00400000  // RMASK BIT 22 0 1
-#define MCASP_RXMASK_RMASK21    0x00200000  // RMASK BIT 21 0 1
-#define MCASP_RXMASK_RMASK20    0x00100000  // RMASK BIT 20 0 1
-#define MCASP_RXMASK_RMASK19    0x00080000  // RMASK BIT 19 0 1
-#define MCASP_RXMASK_RMASK18    0x00040000  // RMASK BIT 18 0 1
-#define MCASP_RXMASK_RMASK17    0x00020000  // RMASK BIT 17 0 1
-#define MCASP_RXMASK_RMASK16    0x00010000  // RMASK BIT 16 0 1
-#define MCASP_RXMASK_RMASK15    0x00008000  // RMASK BIT 15 0 1
-#define MCASP_RXMASK_RMASK14    0x00004000  // RMASK BIT 14 0 1
-#define MCASP_RXMASK_RMASK13    0x00002000  // RMASK BIT 13 0 1
-#define MCASP_RXMASK_RMASK12    0x00001000  // RMASK BIT 12 0 1
-#define MCASP_RXMASK_RMASK11    0x00000800  // RMASK BIT 11 0 1
-#define MCASP_RXMASK_RMASK10    0x00000400  // RMASK BIT 10 0 1
-#define MCASP_RXMASK_RMASK9     0x00000200  // RMASK BIT 9 0 1
-#define MCASP_RXMASK_RMASK8     0x00000100  // RMASK BIT 8 0 1
-#define MCASP_RXMASK_RMASK7     0x00000080  // RMASK BIT 7 0 1
-#define MCASP_RXMASK_RMASK6     0x00000040  // RMASK BIT 6 0 1
-#define MCASP_RXMASK_RMASK5     0x00000020  // RMASK BIT 5 0 1
-#define MCASP_RXMASK_RMASK4     0x00000010  // RMASK BIT 4 0 1
-#define MCASP_RXMASK_RMASK3     0x00000008  // RMASK BIT 3 0 1
-#define MCASP_RXMASK_RMASK2     0x00000004  // RMASK BIT 2 0 1
-#define MCASP_RXMASK_RMASK1     0x00000002  // RMASK BIT 1 0 1
-#define MCASP_RXMASK_RMASK0     0x00000001  // RMASK BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXFMT register.
-//
-//******************************************************************************
-#define MCASP_RXFMT_RDATDLY_M   0x00030000  // RCV Frame sync delay 0x0 0 Bit
-                                            // delay 0x1 1 Bit delay 0x2 2 Bit
-                                            // delay
-#define MCASP_RXFMT_RDATDLY_S   16
-#define MCASP_RXFMT_RRVRS       0x00008000  // RCV serial stream bit order 0 1
-#define MCASP_RXFMT_RPAD_M      0x00006000  // Pad value 0x0 0x1 0x2
-#define MCASP_RXFMT_RPAD_S      13
-#define MCASP_RXFMT_RPBIT_M     0x00001F00  // Pad bit position
-#define MCASP_RXFMT_RPBIT_S     8
-#define MCASP_RXFMT_RSSZ_M      0x000000F0  // RCV slot Size 0x0 0x1 0x2 0x3
-                                            // 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB
-                                            // 0xC 0xD 0xE 0xF
-#define MCASP_RXFMT_RSSZ_S      4
-#define MCASP_RXFMT_RBUSEL      0x00000008  // Write to RBUF using CPU/DMA 0
-                                            // DMA port access 1 CPU port Access
-#define MCASP_RXFMT_RROT_M      0x00000007  // Right Rotate Value 0x0 0x1 0x2
-                                            // 0x3 0x4 0x5 0x6 0x7
-#define MCASP_RXFMT_RROT_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXFMCTL register.
-//
-//******************************************************************************
-#define MCASP_RXFMCTL_RMOD_M    0x0000FF80  // RCV Frame sync mode
-#define MCASP_RXFMCTL_RMOD_S    7
-#define MCASP_RXFMCTL_FRWID     0x00000010  // RCV Frame sync Duration 0 1
-#define MCASP_RXFMCTL_FSRM      0x00000002  // RCV frame sync External 0 1
-#define MCASP_RXFMCTL_FSRP      0x00000001  // RCV Frame sync Polarity 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_ACLKRCTL register.
-//
-//******************************************************************************
-#define MCASP_ACLKRCTL_BUSY     0x00100000
-#define MCASP_ACLKRCTL_DIVBUSY  0x00080000
-#define MCASP_ACLKRCTL_ADJBUSY  0x00040000
-#define MCASP_ACLKRCTL_CLKRADJ_M \
-                                0x00030000
-
-#define MCASP_ACLKRCTL_CLKRADJ_S 16
-#define MCASP_ACLKRCTL_CLKRP    0x00000080  // RCV Clock Polarity 0 1
-#define MCASP_ACLKRCTL_CLKRM    0x00000020  // RCV clock source 0 1
-#define MCASP_ACLKRCTL_CLKRDIV_M \
-                                0x0000001F  // RCV clock devide ratio
-
-#define MCASP_ACLKRCTL_CLKRDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AHCLKRCTL register.
-//
-//******************************************************************************
-#define MCASP_AHCLKRCTL_BUSY    0x00100000
-#define MCASP_AHCLKRCTL_DIVBUSY 0x00080000
-#define MCASP_AHCLKRCTL_ADJBUSY 0x00040000
-#define MCASP_AHCLKRCTL_HCLKRADJ_M \
-                                0x00030000
-
-#define MCASP_AHCLKRCTL_HCLKRADJ_S 16
-#define MCASP_AHCLKRCTL_HCLKRM  0x00008000  // High Freq. RCV clock Source 0 1
-#define MCASP_AHCLKRCTL_HCLKRP  0x00004000  // High Freq. clock Polarity Before
-                                            // diviser 0 1
-#define MCASP_AHCLKRCTL_HCLKRDIV_M \
-                                0x00000FFF  // RCV clock Divide Ratio
-
-#define MCASP_AHCLKRCTL_HCLKRDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXTDM register.
-//
-//******************************************************************************
-#define MCASP_RXTDM_RTDMS31     0x80000000  // RCV mode during TDM time slot 31
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS30     0x40000000  // RCV mode during TDM time slot 30
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS29     0x20000000  // RCV mode during TDM time slot 29
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS28     0x10000000  // RCV mode during TDM time slot 28
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS27     0x08000000  // RCV mode during TDM time slot 27
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS26     0x04000000  // RCV mode during TDM time slot 26
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS25     0x02000000  // RCV mode during TDM time slot 25
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS24     0x01000000  // RCV mode during TDM time slot 24
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS23     0x00800000  // RCV mode during TDM time slot 23
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS22     0x00400000  // RCV mode during TDM time slot 22
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS21     0x00200000  // RCV mode during TDM time slot 21
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS20     0x00100000  // RCV mode during TDM time slot 20
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS19     0x00080000  // RCV mode during TDM time slot 19
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS18     0x00040000  // RCV mode during TDM time slot 18
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS17     0x00020000  // RCV mode during TDM time slot 17
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS16     0x00010000  // RCV mode during TDM time slot 16
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS15     0x00008000  // RCV mode during TDM time slot 15
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS14     0x00004000  // RCV mode during TDM time slot 14
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS13     0x00002000  // RCV mode during TDM time slot 13
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS12     0x00001000  // RCV mode during TDM time slot 12
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS11     0x00000800  // RCV mode during TDM time slot 11
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS10     0x00000400  // RCV mode during TDM time slot 10
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS9      0x00000200  // RCV mode during TDM time slot 9
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS8      0x00000100  // RCV mode during TDM time slot 8
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS7      0x00000080  // RCV mode during TDM time slot 7
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS6      0x00000040  // RCV mode during TDM time slot 6
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS5      0x00000020  // RCV mode during TDM time slot 5
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS4      0x00000010  // RCV mode during TDM time slot 4
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS3      0x00000008  // RCV mode during TDM time slot 3
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS2      0x00000004  // RCV mode during TDM time slot 2
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS1      0x00000002  // RCV mode during TDM time slot 1
-                                            // 0 1
-#define MCASP_RXTDM_RTDMS0      0x00000001  // RCV mode during TDM time slot 0
-                                            // 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_EVTCTLR register.
-//
-//******************************************************************************
-#define MCASP_EVTCTLR_RSTAFRM   0x00000080  // RCV Start of Frame Interrupt 0 1
-#define MCASP_EVTCTLR_RDATA     0x00000020  // RCV Data Interrupt 0 1
-#define MCASP_EVTCTLR_RLAST     0x00000010  // RCV Last Slot Interrupt 0 1
-#define MCASP_EVTCTLR_RDMAERR   0x00000008  // RCV DMA Bus Error 0 1
-#define MCASP_EVTCTLR_RCKFAIL   0x00000004  // Bad Clock Interrupt 0 1
-#define MCASP_EVTCTLR_RSYNCERR  0x00000002  // RCV Unexpected FSR Interrupt 0 1
-#define MCASP_EVTCTLR_ROVRN     0x00000001  // RCV Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXSTAT register.
-//
-//******************************************************************************
-#define MCASP_RXSTAT_RERR       0x00000100  // RCV Error 0 1
-#define MCASP_RXSTAT_RDMAERR    0x00000080  // RCV DMA bus error 0 1
-#define MCASP_RXSTAT_RSTAFRM    0x00000040  // Start of Frame-RCV 0 1
-#define MCASP_RXSTAT_RDATA      0x00000020  // Data Ready Flag 0 1
-#define MCASP_RXSTAT_RLAST      0x00000010  // Last Slot Interrupt Flag 0 1
-#define MCASP_RXSTAT_RTDMSLOT   0x00000008  // EvenOdd Slot 0 1
-#define MCASP_RXSTAT_RCKFAIL    0x00000004  // Bad Transmit Flag 0 1
-#define MCASP_RXSTAT_RSYNCERR   0x00000002  // Unexpected RCV Frame sync flag 0
-                                            // 1
-#define MCASP_RXSTAT_ROVRN      0x00000001  // RCV Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXTDMSLOT register.
-//
-//******************************************************************************
-#define MCASP_RXTDMSLOT_RSLOTCNT_M \
-                                0x000003FF  // Current RCV time slot count
-
-#define MCASP_RXTDMSLOT_RSLOTCNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXCLKCHK register.
-//
-//******************************************************************************
-#define MCASP_RXCLKCHK_RCNT_M   0xFF000000  // RCV clock count value
-#define MCASP_RXCLKCHK_RCNT_S   24
-#define MCASP_RXCLKCHK_RMAX_M   0x00FF0000  // RCV clock maximum boundary
-#define MCASP_RXCLKCHK_RMAX_S   16
-#define MCASP_RXCLKCHK_RMIN_M   0x0000FF00  // RCV clock minimum boundary
-#define MCASP_RXCLKCHK_RMIN_S   8
-#define MCASP_RXCLKCHK_RPS_M    0x0000000F  // RCV clock check prescaler 0x0
-                                            // 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8
-#define MCASP_RXCLKCHK_RPS_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_REVTCTL register.
-//
-//******************************************************************************
-#define MCASP_REVTCTL_RDATDMA   0x00000001  // RCV data DMA request 0 Enable
-                                            // DMA Transfer 1 Disable DMA
-                                            // Transfer
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_GBLCTLX register.
-//
-//******************************************************************************
-#define MCASP_GBLCTLX_XFRST     0x00001000  // Frame sync generator reset 0 1
-#define MCASP_GBLCTLX_XSMRST    0x00000800  // XMT state machine reset 0 1
-#define MCASP_GBLCTLX_XSRCLR    0x00000400  // XMT serializer clear 0 1
-#define MCASP_GBLCTLX_XHCLKRST  0x00000200  // XMT High Freq. clk Divider 0 1
-#define MCASP_GBLCTLX_XCLKRST   0x00000100  // XMT clock divder reset 0 1
-#define MCASP_GBLCTLX_RFRST     0x00000010
-#define MCASP_GBLCTLX_RSMRST    0x00000008
-#define MCASP_GBLCTLX_RSRCLKR   0x00000004
-#define MCASP_GBLCTLX_RHCLKRST  0x00000002
-#define MCASP_GBLCTLX_RCLKRST   0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXMASK register.
-//
-//******************************************************************************
-#define MCASP_TXMASK_XMASK31    0x80000000  // XMASK BIT 31 0 1
-#define MCASP_TXMASK_XMASK30    0x40000000  // XMASK BIT 30 0 1
-#define MCASP_TXMASK_XMASK29    0x20000000  // XMASK BIT 29 0 1
-#define MCASP_TXMASK_XMASK28    0x10000000  // XMASK BIT 28 0 1
-#define MCASP_TXMASK_XMASK27    0x08000000  // XMASK BIT 27 0 1
-#define MCASP_TXMASK_XMASK26    0x04000000  // XMASK BIT 26 0 1
-#define MCASP_TXMASK_XMASK25    0x02000000  // XMASK BIT 25 0 1
-#define MCASP_TXMASK_XMASK24    0x01000000  // XMASK BIT 24 0 1
-#define MCASP_TXMASK_XMASK23    0x00800000  // XMASK BIT 23 0 1
-#define MCASP_TXMASK_XMASK22    0x00400000  // XMASK BIT 22 0 1
-#define MCASP_TXMASK_XMASK21    0x00200000  // XMASK BIT 21 0 1
-#define MCASP_TXMASK_XMASK20    0x00100000  // XMASK BIT 20 0 1
-#define MCASP_TXMASK_XMASK19    0x00080000  // XMASK BIT 19 0 1
-#define MCASP_TXMASK_XMASK18    0x00040000  // XMASK BIT 18 0 1
-#define MCASP_TXMASK_XMASK17    0x00020000  // XMASK BIT 17 0 1
-#define MCASP_TXMASK_XMASK16    0x00010000  // XMASK BIT 16 0 1
-#define MCASP_TXMASK_XMASK15    0x00008000  // XMASK BIT 15 0 1
-#define MCASP_TXMASK_XMASK14    0x00004000  // XMASK BIT 14 0 1
-#define MCASP_TXMASK_XMASK13    0x00002000  // XMASK BIT 13 0 1
-#define MCASP_TXMASK_XMASK12    0x00001000  // XMASK BIT 12 0 1
-#define MCASP_TXMASK_XMASK11    0x00000800  // XMASK BIT 11 0 1
-#define MCASP_TXMASK_XMASK10    0x00000400  // XMASK BIT 10 0 1
-#define MCASP_TXMASK_XMASK9     0x00000200  // XMASK BIT 9 0 1
-#define MCASP_TXMASK_XMASK8     0x00000100  // XMASK BIT 8 0 1
-#define MCASP_TXMASK_XMASK7     0x00000080  // XMASK BIT 7 0 1
-#define MCASP_TXMASK_XMASK6     0x00000040  // XMASK BIT 6 0 1
-#define MCASP_TXMASK_XMASK5     0x00000020  // XMASK BIT 5 0 1
-#define MCASP_TXMASK_XMASK4     0x00000010  // XMASK BIT 4 0 1
-#define MCASP_TXMASK_XMASK3     0x00000008  // XMASK BIT 3 0 1
-#define MCASP_TXMASK_XMASK2     0x00000004  // XMASK BIT 2 0 1
-#define MCASP_TXMASK_XMASK1     0x00000002  // XMASK BIT 1 0 1
-#define MCASP_TXMASK_XMASK0     0x00000001  // XMASK BIT 0 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXFMT register.
-//
-//******************************************************************************
-#define MCASP_TXFMT_XDATDLY_M   0x00030000  // XMT Frame sync delay 0x0 0 Bit
-                                            // delay 0x1 1 Bit delay 0x2 2 Bit
-                                            // delay
-#define MCASP_TXFMT_XDATDLY_S   16
-#define MCASP_TXFMT_XRVRS       0x00008000  // XMT serial stream bit order 0 1
-#define MCASP_TXFMT_XPAD_M      0x00006000  // Pad value 0x0 0x1 0x2
-#define MCASP_TXFMT_XPAD_S      13
-#define MCASP_TXFMT_XPBIT_M     0x00001F00  // Pad bit position
-#define MCASP_TXFMT_XPBIT_S     8
-#define MCASP_TXFMT_XSSZ_M      0x000000F0  // XMT slot Size 0x0 0x1 0x2 0x3
-                                            // 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB
-                                            // 0xC 0xD 0xE 0xF
-#define MCASP_TXFMT_XSSZ_S      4
-#define MCASP_TXFMT_XBUSEL      0x00000008  // Write to XBUF using CPU/DMA 0
-                                            // DMA port access 1 CPU port Access
-#define MCASP_TXFMT_XROT_M      0x00000007  // Right Rotate Value 0x0 0x1 0x2
-                                            // 0x3 0x4 0x5 0x6 0x7
-#define MCASP_TXFMT_XROT_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXFMCTL register.
-//
-//******************************************************************************
-#define MCASP_TXFMCTL_XMOD_M    0x0000FF80  // XMT Frame sync mode
-#define MCASP_TXFMCTL_XMOD_S    7
-#define MCASP_TXFMCTL_FXWID     0x00000010  // XMT Frame sync Duration 0 1
-#define MCASP_TXFMCTL_FSXM      0x00000002  // XMT frame sync External 0 1
-#define MCASP_TXFMCTL_FSXP      0x00000001  // XMT Frame sync Polarity 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_ACLKXCTL register.
-//
-//******************************************************************************
-#define MCASP_ACLKXCTL_BUSY     0x00100000
-#define MCASP_ACLKXCTL_DIVBUSY  0x00080000
-#define MCASP_ACLKXCTL_ADJBUSY  0x00040000
-#define MCASP_ACLKXCTL_CLKXADJ_M \
-                                0x00030000
-
-#define MCASP_ACLKXCTL_CLKXADJ_S 16
-#define MCASP_ACLKXCTL_CLKXP    0x00000080  // XMT Clock Polarity 0 1
-#define MCASP_ACLKXCTL_ASYNC    0x00000040  // XMT/RCV operation sync /Async 0
-                                            // 1
-#define MCASP_ACLKXCTL_CLKXM    0x00000020  // XMT clock source 0 1
-#define MCASP_ACLKXCTL_CLKXDIV_M \
-                                0x0000001F  // XMT clock devide ratio
-
-#define MCASP_ACLKXCTL_CLKXDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_AHCLKXCTL register.
-//
-//******************************************************************************
-#define MCASP_AHCLKXCTL_BUSY    0x00100000
-#define MCASP_AHCLKXCTL_DIVBUSY 0x00080000
-#define MCASP_AHCLKXCTL_ADJBUSY 0x00040000
-#define MCASP_AHCLKXCTL_HCLKXADJ_M \
-                                0x00030000
-
-#define MCASP_AHCLKXCTL_HCLKXADJ_S 16
-#define MCASP_AHCLKXCTL_HCLKXM  0x00008000  // High Freq. XMT clock Source 0 1
-#define MCASP_AHCLKXCTL_HCLKXP  0x00004000  // High Freq. clock Polarity Before
-                                            // diviser 0 1
-#define MCASP_AHCLKXCTL_HCLKXDIV_M \
-                                0x00000FFF  // XMT clock Divide Ratio
-
-#define MCASP_AHCLKXCTL_HCLKXDIV_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXTDM register.
-//
-//******************************************************************************
-#define MCASP_TXTDM_XTDMS31     0x80000000  // XMT mode during TDM time slot 31
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS30     0x40000000  // XMT mode during TDM time slot 30
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS29     0x20000000  // XMT mode during TDM time slot 29
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS28     0x10000000  // XMT mode during TDM time slot 28
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS27     0x08000000  // XMT mode during TDM time slot 27
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS26     0x04000000  // XMT mode during TDM time slot 26
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS25     0x02000000  // XMT mode during TDM time slot 25
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS24     0x01000000  // XMT mode during TDM time slot 24
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS23     0x00800000  // XMT mode during TDM time slot 23
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS22     0x00400000  // XMT mode during TDM time slot 22
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS21     0x00200000  // XMT mode during TDM time slot 21
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS20     0x00100000  // XMT mode during TDM time slot 20
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS19     0x00080000  // XMT mode during TDM time slot 19
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS18     0x00040000  // XMT mode during TDM time slot 18
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS17     0x00020000  // XMT mode during TDM time slot 17
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS16     0x00010000  // XMT mode during TDM time slot 16
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS15     0x00008000  // XMT mode during TDM time slot 15
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS14     0x00004000  // XMT mode during TDM time slot 14
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS13     0x00002000  // XMT mode during TDM time slot 13
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS12     0x00001000  // XMT mode during TDM time slot 12
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS11     0x00000800  // XMT mode during TDM time slot 11
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS10     0x00000400  // XMT mode during TDM time slot 10
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS9      0x00000200  // XMT mode during TDM time slot 9
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS8      0x00000100  // XMT mode during TDM time slot 8
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS7      0x00000080  // XMT mode during TDM time slot 7
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS6      0x00000040  // XMT mode during TDM time slot 6
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS5      0x00000020  // XMT mode during TDM time slot 5
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS4      0x00000010  // XMT mode during TDM time slot 4
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS3      0x00000008  // XMT mode during TDM time slot 3
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS2      0x00000004  // XMT mode during TDM time slot 2
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS1      0x00000002  // XMT mode during TDM time slot 1
-                                            // 0 1
-#define MCASP_TXTDM_XTDMS0      0x00000001  // XMT mode during TDM time slot 0
-                                            // 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_EVTCTLX register.
-//
-//******************************************************************************
-#define MCASP_EVTCTLX_XSTAFRM   0x00000080  // XMT Start of Frame Interrupt 0 1
-#define MCASP_EVTCTLX_XDATA     0x00000020  // XMT Data Interrupt 0 1
-#define MCASP_EVTCTLX_XLAST     0x00000010  // XMT Last Slot Interrupt 0 1
-#define MCASP_EVTCTLX_XDMAERR   0x00000008  // XMT DMA Bus Error 0 1
-#define MCASP_EVTCTLX_XCKFAIL   0x00000004  // Bad Clock Interrupt 0 1
-#define MCASP_EVTCTLX_XSYNCERR  0x00000002  // XMT Unexpected FSR Interrupt 0 1
-#define MCASP_EVTCTLX_XUNDRN    0x00000001  // XMT Underrun Interrupt 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXSTAT register.
-//
-//******************************************************************************
-#define MCASP_TXSTAT_XERR       0x00000100  // XMT Error 0 1
-#define MCASP_TXSTAT_XDMAERR    0x00000080  // XMT DMA bus error 0 1
-#define MCASP_TXSTAT_XSTAFRM    0x00000040  // Start of Frame-XMT 0 1
-#define MCASP_TXSTAT_XDATA      0x00000020  // Data Ready Flag 0 1
-#define MCASP_TXSTAT_XLAST      0x00000010  // Last Slot Interrupt Flag 0 1
-#define MCASP_TXSTAT_XTDMSLOT   0x00000008  // EvenOdd Slot 0 1
-#define MCASP_TXSTAT_XCKFAIL    0x00000004  // Bad Transmit Flag 0 1
-#define MCASP_TXSTAT_XSYNCERR   0x00000002  // Unexpected XMT Frame sync flag 0
-                                            // 1
-#define MCASP_TXSTAT_XUNDRN     0x00000001  // XMT Underrun Flag 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXTDMSLOT register.
-//
-//******************************************************************************
-#define MCASP_TXTDMSLOT_XSLOTCNT_M \
-                                0x000003FF  // Current XMT time slot count
-                                            // during reset the value of this
-                                            // register is 0b0101111111 (0x17f)
-                                            // and after reset 0
-
-#define MCASP_TXTDMSLOT_XSLOTCNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXCLKCHK register.
-//
-//******************************************************************************
-#define MCASP_TXCLKCHK_XCNT_M   0xFF000000  // XMT clock count value
-#define MCASP_TXCLKCHK_XCNT_S   24
-#define MCASP_TXCLKCHK_XMAX_M   0x00FF0000  // XMT clock maximum boundary
-#define MCASP_TXCLKCHK_XMAX_S   16
-#define MCASP_TXCLKCHK_XMIN_M   0x0000FF00  // XMT clock minimum boundary
-#define MCASP_TXCLKCHK_XMIN_S   8
-#define MCASP_TXCLKCHK_RESV     0x00000080  // Reserved
-#define MCASP_TXCLKCHK_XPS_M    0x0000000F  // XMT clock check prescaler 0x0
-                                            // 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8
-#define MCASP_TXCLKCHK_XPS_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XEVTCTL register.
-//
-//******************************************************************************
-#define MCASP_XEVTCTL_XDATDMA   0x00000001  // XMT data DMA request 0 Enable
-                                            // DMA Transfer 1 Disable DMA
-                                            // Transfer
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_CLKADJEN register.
-//
-//******************************************************************************
-#define MCASP_CLKADJEN_ENABLE   0x00000001  // One-shot clock adjust enable 0 1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA0 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA0_DITCSRA0_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA0_DITCSRA0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA1 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA1_DITCSRA1_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA1_DITCSRA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA2 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA2_DITCSRA2_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status Register
-
-#define MCASP_DITCSRA2_DITCSRA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA3 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA3_DITCSRA3_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status Register
-
-#define MCASP_DITCSRA3_DITCSRA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA4 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA4_DITCSRA4_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA4_DITCSRA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRA5 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRA5_DITCSRA5_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRA5_DITCSRA5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB0 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB0_DITCSRB0_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB0_DITCSRB0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB1 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB1_DITCSRB1_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB1_DITCSRB1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB2 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB2_DITCSRB2_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB2_DITCSRB2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB3 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB3_DITCSRB3_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB3_DITCSRB3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB4 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB4_DITCSRB4_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB4_DITCSRB4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITCSRB5 register.
-//
-//******************************************************************************
-#define MCASP_DITCSRB5_DITCSRB5_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) Channel
-                                            // status
-
-#define MCASP_DITCSRB5_DITCSRB5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA0 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA0_DITUDRA0_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA0_DITUDRA0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA1 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA1_DITUDRA1_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA1_DITUDRA1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA2 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA2_DITUDRA2_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA2_DITUDRA2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA3 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA3_DITUDRA3_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA3_DITUDRA3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA4 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA4_DITUDRA4_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA4_DITUDRA4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRA5 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRA5_DITUDRA5_M \
-                                0xFFFFFFFF  // Left (Even TDM slot ) User Data
-
-#define MCASP_DITUDRA5_DITUDRA5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB0 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB0_DITUDRB0_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB0_DITUDRB0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB1 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB1_DITUDRB1_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB1_DITUDRB1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB2 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB2_DITUDRB2_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB2_DITUDRB2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB3 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB3_DITUDRB3_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB3_DITUDRB3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB4 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB4_DITUDRB4_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB4_DITUDRB4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_DITUDRB5 register.
-//
-//******************************************************************************
-#define MCASP_DITUDRB5_DITUDRB5_M \
-                                0xFFFFFFFF  // Right (odd TDM slot ) User Data
-
-#define MCASP_DITUDRB5_DITUDRB5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL0 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL0_RRDY     0x00000020
-#define MCASP_XRSRCTL0_XRDY     0x00000010
-#define MCASP_XRSRCTL0_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL0_DISMOD_S 2
-#define MCASP_XRSRCTL0_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL0_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL1 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL1_RRDY     0x00000020
-#define MCASP_XRSRCTL1_XRDY     0x00000010
-#define MCASP_XRSRCTL1_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL1_DISMOD_S 2
-#define MCASP_XRSRCTL1_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL1_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL2 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL2_RRDY     0x00000020
-#define MCASP_XRSRCTL2_XRDY     0x00000010
-#define MCASP_XRSRCTL2_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL2_DISMOD_S 2
-#define MCASP_XRSRCTL2_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL2_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL3 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL3_RRDY     0x00000020
-#define MCASP_XRSRCTL3_XRDY     0x00000010
-#define MCASP_XRSRCTL3_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL3_DISMOD_S 2
-#define MCASP_XRSRCTL3_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL3_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL4 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL4_RRDY     0x00000020
-#define MCASP_XRSRCTL4_XRDY     0x00000010
-#define MCASP_XRSRCTL4_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL4_DISMOD_S 2
-#define MCASP_XRSRCTL4_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL4_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL5 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL5_RRDY     0x00000020
-#define MCASP_XRSRCTL5_XRDY     0x00000010
-#define MCASP_XRSRCTL5_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL5_DISMOD_S 2
-#define MCASP_XRSRCTL5_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL5_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL6 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL6_RRDY     0x00000020
-#define MCASP_XRSRCTL6_XRDY     0x00000010
-#define MCASP_XRSRCTL6_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL6_DISMOD_S 2
-#define MCASP_XRSRCTL6_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL6_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL7 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL7_RRDY     0x00000020
-#define MCASP_XRSRCTL7_XRDY     0x00000010
-#define MCASP_XRSRCTL7_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL7_DISMOD_S 2
-#define MCASP_XRSRCTL7_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL7_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL8 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL8_RRDY     0x00000020
-#define MCASP_XRSRCTL8_XRDY     0x00000010
-#define MCASP_XRSRCTL8_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL8_DISMOD_S 2
-#define MCASP_XRSRCTL8_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL8_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL9 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL9_RRDY     0x00000020
-#define MCASP_XRSRCTL9_XRDY     0x00000010
-#define MCASP_XRSRCTL9_DISMOD_M 0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-#define MCASP_XRSRCTL9_DISMOD_S 2
-#define MCASP_XRSRCTL9_SRMOD_M  0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL9_SRMOD_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL10 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL10_RRDY    0x00000020
-#define MCASP_XRSRCTL10_XRDY    0x00000010
-#define MCASP_XRSRCTL10_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL10_DISMOD_S 2
-#define MCASP_XRSRCTL10_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL10_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL11 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL11_RRDY    0x00000020
-#define MCASP_XRSRCTL11_XRDY    0x00000010
-#define MCASP_XRSRCTL11_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL11_DISMOD_S 2
-#define MCASP_XRSRCTL11_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL11_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL12 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL12_RRDY    0x00000020
-#define MCASP_XRSRCTL12_XRDY    0x00000010
-#define MCASP_XRSRCTL12_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL12_DISMOD_S 2
-#define MCASP_XRSRCTL12_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL12_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL13 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL13_RRDY    0x00000020
-#define MCASP_XRSRCTL13_XRDY    0x00000010
-#define MCASP_XRSRCTL13_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL13_DISMOD_S 2
-#define MCASP_XRSRCTL13_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL13_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL14 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL14_RRDY    0x00000020
-#define MCASP_XRSRCTL14_XRDY    0x00000010
-#define MCASP_XRSRCTL14_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL14_DISMOD_S 2
-#define MCASP_XRSRCTL14_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL14_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_XRSRCTL15 register.
-//
-//******************************************************************************
-#define MCASP_XRSRCTL15_RRDY    0x00000020
-#define MCASP_XRSRCTL15_XRDY    0x00000010
-#define MCASP_XRSRCTL15_DISMOD_M \
-                                0x0000000C  // Serializer drive state 0x0 Tri
-                                            // state 0x1 Reserved 0x2 Drive pin
-                                            // low 0x3 Drive pin high
-
-#define MCASP_XRSRCTL15_DISMOD_S 2
-#define MCASP_XRSRCTL15_SRMOD_M 0x00000003  // Serializer Mode 0x0 InActive
-                                            // mode 0x1 Transmit mode 0x2
-                                            // Receive mode
-#define MCASP_XRSRCTL15_SRMOD_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF0 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF0_XBUF0_M    0xFFFFFFFF  // Transmit Buffer 0
-#define MCASP_TXBUF0_XBUF0_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF1 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF1_XBUF1_M    0xFFFFFFFF  // Transmit Buffer 1
-#define MCASP_TXBUF1_XBUF1_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF2 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF2_XBUF2_M    0xFFFFFFFF  // Transmit Buffer 2
-#define MCASP_TXBUF2_XBUF2_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF3 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF3_XBUF3_M    0xFFFFFFFF  // Transmit Buffer 3
-#define MCASP_TXBUF3_XBUF3_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF4 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF4_XBUF4_M    0xFFFFFFFF  // Transmit Buffer 4
-#define MCASP_TXBUF4_XBUF4_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF5 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF5_XBUF5_M    0xFFFFFFFF  // Transmit Buffer 5
-#define MCASP_TXBUF5_XBUF5_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF6 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF6_XBUF6_M    0xFFFFFFFF  // Transmit Buffer 6
-#define MCASP_TXBUF6_XBUF6_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF7 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF7_XBUF7_M    0xFFFFFFFF  // Transmit Buffer 7
-#define MCASP_TXBUF7_XBUF7_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF8 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF8_XBUF8_M    0xFFFFFFFF  // Transmit Buffer 8
-#define MCASP_TXBUF8_XBUF8_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF9 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF9_XBUF9_M    0xFFFFFFFF  // Transmit Buffer 9
-#define MCASP_TXBUF9_XBUF9_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF10 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF10_XBUF10_M  0xFFFFFFFF  // Transmit Buffer 10
-#define MCASP_TXBUF10_XBUF10_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF11 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF11_XBUF11_M  0xFFFFFFFF  // Transmit Buffer 11
-#define MCASP_TXBUF11_XBUF11_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF12 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF12_XBUF12_M  0xFFFFFFFF  // Transmit Buffer 12
-#define MCASP_TXBUF12_XBUF12_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF13 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF13_XBUF13_M  0xFFFFFFFF  // Transmit Buffer 13
-#define MCASP_TXBUF13_XBUF13_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF14 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF14_XBUF14_M  0xFFFFFFFF  // Transmit Buffer 14
-#define MCASP_TXBUF14_XBUF14_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_TXBUF15 register.
-//
-//******************************************************************************
-#define MCASP_TXBUF15_XBUF15_M  0xFFFFFFFF  // Transmit Buffer 15
-#define MCASP_TXBUF15_XBUF15_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF0 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF0_RBUF0_M    0xFFFFFFFF  // Receive Buffer 0
-#define MCASP_RXBUF0_RBUF0_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF1 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF1_RBUF1_M    0xFFFFFFFF  // Receive Buffer 1
-#define MCASP_RXBUF1_RBUF1_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF2 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF2_RBUF2_M    0xFFFFFFFF  // Receive Buffer 2
-#define MCASP_RXBUF2_RBUF2_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF3 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF3_RBUF3_M    0xFFFFFFFF  // Receive Buffer 3
-#define MCASP_RXBUF3_RBUF3_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF4 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF4_RBUF4_M    0xFFFFFFFF  // Receive Buffer 4
-#define MCASP_RXBUF4_RBUF4_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF5 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF5_RBUF5_M    0xFFFFFFFF  // Receive Buffer 5
-#define MCASP_RXBUF5_RBUF5_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF6 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF6_RBUF6_M    0xFFFFFFFF  // Receive Buffer 6
-#define MCASP_RXBUF6_RBUF6_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF7 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF7_RBUF7_M    0xFFFFFFFF  // Receive Buffer 7
-#define MCASP_RXBUF7_RBUF7_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF8 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF8_RBUF8_M    0xFFFFFFFF  // Receive Buffer 8
-#define MCASP_RXBUF8_RBUF8_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF9 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF9_RBUF9_M    0xFFFFFFFF  // Receive Buffer 9
-#define MCASP_RXBUF9_RBUF9_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF10 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF10_RBUF10_M  0xFFFFFFFF  // Receive Buffer 10
-#define MCASP_RXBUF10_RBUF10_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF11 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF11_RBUF11_M  0xFFFFFFFF  // Receive Buffer 11
-#define MCASP_RXBUF11_RBUF11_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF12 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF12_RBUF12_M  0xFFFFFFFF  // Receive Buffer 12
-#define MCASP_RXBUF12_RBUF12_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF13 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF13_RBUF13_M  0xFFFFFFFF  // Receive Buffer 13
-#define MCASP_RXBUF13_RBUF13_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF14 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF14_RBUF14_M  0xFFFFFFFF  // Receive Buffer 14
-#define MCASP_RXBUF14_RBUF14_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCASP_O_RXBUF15 register.
-//
-//******************************************************************************
-#define MCASP_RXBUF15_RBUF15_M  0xFFFFFFFF  // Receive Buffer 15
-#define MCASP_RXBUF15_RBUF15_S  0
-
-
-
-#endif // __HW_MCASP_H__
diff --git a/ports/cc3200/hal/inc/hw_mcspi.h b/ports/cc3200/hal/inc/hw_mcspi.h
deleted file mode 100644
index 079e4b6b67568..0000000000000
--- a/ports/cc3200/hal/inc/hw_mcspi.h
+++ /dev/null
@@ -1,1745 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MCSPI_H__
-#define __HW_MCSPI_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MCSPI register offsets.
-//
-//*****************************************************************************
-#define MCSPI_O_HL_REV          0x00000000  // IP Revision Identifier (X.Y.R)
-                                            // Used by software to track
-                                            // features bugs and compatibility
-#define MCSPI_O_HL_HWINFO       0x00000004  // Information about the IP
-                                            // module's hardware configuration
-                                            // i.e. typically the module's HDL
-                                            // generics (if any). Actual field
-                                            // format and encoding is up to the
-                                            // module's designer to decide.
-#define MCSPI_O_HL_SYSCONFIG    0x00000010  // 0x4402 1010 0x4402 2010 Clock
-                                            // management configuration
-#define MCSPI_O_REVISION        0x00000100  // 0x4402 1100 0x4402 2100 This
-                                            // register contains the hard coded
-                                            // RTL revision number.
-#define MCSPI_O_SYSCONFIG       0x00000110  // 0x4402 1110 0x4402 2110 This
-                                            // register allows controlling
-                                            // various parameters of the OCP
-                                            // interface.
-#define MCSPI_O_SYSSTATUS       0x00000114  // 0x4402 1114 0x4402 2114 This
-                                            // register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information
-#define MCSPI_O_IRQSTATUS       0x00000118  // 0x4402 1118 0x4402 2118 The
-                                            // interrupt status regroups all the
-                                            // status of the module internal
-                                            // events that can generate an
-                                            // interrupt
-#define MCSPI_O_IRQENABLE       0x0000011C  // 0x4402 111C 0x4402 211C This
-                                            // register allows to enable/disable
-                                            // the module internal sources of
-                                            // interrupt on an event-by-event
-                                            // basis.
-#define MCSPI_O_WAKEUPENABLE    0x00000120  // 0x4402 1120 0x4402 2120 The
-                                            // wakeup enable register allows to
-                                            // enable/disable the module
-                                            // internal sources of wakeup on
-                                            // event-by-event basis.
-#define MCSPI_O_SYST            0x00000124  // 0x4402 1124 0x4402 2124 This
-                                            // register is used to check the
-                                            // correctness of the system
-                                            // interconnect either internally to
-                                            // peripheral bus or externally to
-                                            // device IO pads when the module is
-                                            // configured in system test
-                                            // (SYSTEST) mode.
-#define MCSPI_O_MODULCTRL       0x00000128  // 0x4402 1128 0x4402 2128 This
-                                            // register is dedicated to the
-                                            // configuration of the serial port
-                                            // interface.
-#define MCSPI_O_CH0CONF         0x0000012C  // 0x4402 112C 0x4402 212C This
-                                            // register is dedicated to the
-                                            // configuration of the channel 0
-#define MCSPI_O_CH0STAT         0x00000130  // 0x4402 1130 0x4402 2130 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 0
-#define MCSPI_O_CH0CTRL         0x00000134  // 0x4402 1134 0x4402 2134 This
-                                            // register is dedicated to enable
-                                            // the channel 0
-#define MCSPI_O_TX0             0x00000138  // 0x4402 1138 0x4402 2138 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX0             0x0000013C  // 0x4402 113C 0x4402 213C This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH1CONF         0x00000140  // 0x4402 1140 0x4402 2140 This
-                                            // register is dedicated to the
-                                            // configuration of the channel.
-#define MCSPI_O_CH1STAT         0x00000144  // 0x4402 1144 0x4402 2144 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 1
-#define MCSPI_O_CH1CTRL         0x00000148  // 0x4402 1148 0x4402 2148 This
-                                            // register is dedicated to enable
-                                            // the channel 1
-#define MCSPI_O_TX1             0x0000014C  // 0x4402 114C 0x4402 214C This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX1             0x00000150  // 0x4402 1150 0x4402 2150 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH2CONF         0x00000154  // 0x4402 1154 0x4402 2154 This
-                                            // register is dedicated to the
-                                            // configuration of the channel 2
-#define MCSPI_O_CH2STAT         0x00000158  // 0x4402 1158 0x4402 2158 This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 2
-#define MCSPI_O_CH2CTRL         0x0000015C  // 0x4402 115C 0x4402 215C This
-                                            // register is dedicated to enable
-                                            // the channel 2
-#define MCSPI_O_TX2             0x00000160  // 0x4402 1160 0x4402 2160 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX2             0x00000164  // 0x4402 1164 0x4402 2164 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_CH3CONF         0x00000168  // 0x4402 1168 0x4402 2168 This
-                                            // register is dedicated to the
-                                            // configuration of the channel 3
-#define MCSPI_O_CH3STAT         0x0000016C  // 0x4402 116C 0x4402 216C This
-                                            // register provides status
-                                            // information about transmitter and
-                                            // receiver registers of channel 3
-#define MCSPI_O_CH3CTRL         0x00000170  // 0x4402 1170 0x4402 2170 This
-                                            // register is dedicated to enable
-                                            // the channel 3
-#define MCSPI_O_TX3             0x00000174  // 0x4402 1174 0x4402 2174 This
-                                            // register contains a single SPI
-                                            // word to transmit on the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_RX3             0x00000178  // 0x4402 1178 0x4402 2178 This
-                                            // register contains a single SPI
-                                            // word received through the serial
-                                            // link what ever SPI word length
-                                            // is.
-#define MCSPI_O_XFERLEVEL       0x0000017C  // 0x4402 117C 0x4402 217C This
-                                            // register provides transfer levels
-                                            // needed while using FIFO buffer
-                                            // during transfer.
-#define MCSPI_O_DAFTX           0x00000180  // 0x4402 1180 0x4402 2180 This
-                                            // register contains the SPI words
-                                            // to transmit on the serial link
-                                            // when FIFO used and DMA address is
-                                            // aligned on 256 bit.This register
-                                            // is an image of one of MCSPI_TX(i)
-                                            // register corresponding to the
-                                            // channel which have its FIFO
-                                            // enabled.
-#define MCSPI_O_DAFRX           0x000001A0  // 0x4402 11A0 0x4402 21A0 This
-                                            // register contains the SPI words
-                                            // to received on the serial link
-                                            // when FIFO used and DMA address is
-                                            // aligned on 256 bit.This register
-                                            // is an image of one of MCSPI_RX(i)
-                                            // register corresponding to the
-                                            // channel which have its FIFO
-                                            // enabled.
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_HL_REV register.
-//
-//******************************************************************************
-#define MCSPI_HL_REV_SCHEME_M   0xC0000000
-#define MCSPI_HL_REV_SCHEME_S   30
-#define MCSPI_HL_REV_RSVD_M     0x30000000  // Reserved These bits are
-                                            // initialized to zero and writes to
-                                            // them are ignored.
-#define MCSPI_HL_REV_RSVD_S     28
-#define MCSPI_HL_REV_FUNC_M     0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define MCSPI_HL_REV_FUNC_S     16
-#define MCSPI_HL_REV_R_RTL_M    0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define MCSPI_HL_REV_R_RTL_S    11
-#define MCSPI_HL_REV_X_MAJOR_M  0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-#define MCSPI_HL_REV_X_MAJOR_S  8
-#define MCSPI_HL_REV_CUSTOM_M   0x000000C0
-#define MCSPI_HL_REV_CUSTOM_S   6
-#define MCSPI_HL_REV_Y_MINOR_M  0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-#define MCSPI_HL_REV_Y_MINOR_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_HL_HWINFO register.
-//
-//******************************************************************************
-#define MCSPI_HL_HWINFO_RETMODE 0x00000040
-#define MCSPI_HL_HWINFO_FFNBYTE_M \
-                                0x0000003E
-
-#define MCSPI_HL_HWINFO_FFNBYTE_S 1
-#define MCSPI_HL_HWINFO_USEFIFO 0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCSPI_O_HL_SYSCONFIG register.
-//
-//******************************************************************************
-#define MCSPI_HL_SYSCONFIG_IDLEMODE_M \
-                                0x0000000C  // Configuration of the local
-                                            // target state management mode. By
-                                            // definition target can handle
-                                            // read/write transaction as long as
-                                            // it is out of IDLE state. 0x0
-                                            // Force-idle mode: local target's
-                                            // idle state follows (acknowledges)
-                                            // the system's idle requests
-                                            // unconditionally i.e. regardless
-                                            // of the IP module's internal
-                                            // requirements.Backup mode for
-                                            // debug only. 0x1 No-idle mode:
-                                            // local target never enters idle
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-idle mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module shall not
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 "Smart-idle
-                                            // wakeup-capable mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MCSPI_HL_SYSCONFIG_IDLEMODE_S 2
-#define MCSPI_HL_SYSCONFIG_FREEEMU \
-                                0x00000002  // Sensitivity to emulation (debug)
-                                            // suspend input signal. 0 IP module
-                                            // is sensitive to emulation suspend
-                                            // 1 IP module is not sensitive to
-                                            // emulation suspend
-
-#define MCSPI_HL_SYSCONFIG_SOFTRESET \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_REVISION register.
-//
-//******************************************************************************
-#define MCSPI_REVISION_REV_M    0x000000FF  // IP revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-#define MCSPI_REVISION_REV_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define MCSPI_SYSCONFIG_CLOCKACTIVITY_M \
-                                0x00000300  // Clocks activity during wake up
-                                            // mode period 0x0 OCP and
-                                            // Functional clocks may be switched
-                                            // off. 0x1 OCP clock is maintained.
-                                            // Functional clock may be
-                                            // switched-off. 0x2 Functional
-                                            // clock is maintained. OCP clock
-                                            // may be switched-off. 0x3 OCP and
-                                            // Functional clocks are maintained.
-
-#define MCSPI_SYSCONFIG_CLOCKACTIVITY_S 8
-#define MCSPI_SYSCONFIG_SIDLEMODE_M \
-                                0x00000018  // Power management 0x0 If an idle
-                                            // request is detected the McSPI
-                                            // acknowledges it unconditionally
-                                            // and goes in Inactive mode.
-                                            // Interrupt DMA requests and wake
-                                            // up lines are unconditionally
-                                            // de-asserted and the module wakeup
-                                            // capability is deactivated even if
-                                            // the bit
-                                            // MCSPI_SYSCONFIG[EnaWakeUp] is
-                                            // set. 0x1 If an idle request is
-                                            // detected the request is ignored
-                                            // and the module does not switch to
-                                            // wake up mode and keeps on
-                                            // behaving normally. 0x2 If an idle
-                                            // request is detected the module
-                                            // will switch to idle mode based on
-                                            // its internal activity. The wake
-                                            // up capability cannot be used. 0x3
-                                            // If an idle request is detected
-                                            // the module will switch to idle
-                                            // mode based on its internal
-                                            // activity and the wake up
-                                            // capability can be used if the bit
-                                            // MCSPI_SYSCONFIG[EnaWakeUp] is
-                                            // set.
-
-#define MCSPI_SYSCONFIG_SIDLEMODE_S 3
-#define MCSPI_SYSCONFIG_ENAWAKEUP \
-                                0x00000004  // WakeUp feature control 0 WakeUp
-                                            // capability is disabled 1 WakeUp
-                                            // capability is enabled
-
-#define MCSPI_SYSCONFIG_SOFTRESET \
-                                0x00000002  // Software reset. During reads it
-                                            // always returns 0. 0 (write)
-                                            // Normal mode 1 (write) Set this
-                                            // bit to 1 to trigger a module
-                                            // reset.The bit is automatically
-                                            // reset by the hardware.
-
-#define MCSPI_SYSCONFIG_AUTOIDLE \
-                                0x00000001  // Internal OCP Clock gating
-                                            // strategy 0 OCP clock is
-                                            // free-running 1 Automatic OCP
-                                            // clock gating strategy is applied
-                                            // based on the OCP interface
-                                            // activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define MCSPI_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define MCSPI_IRQSTATUS_EOW     0x00020000
-#define MCSPI_IRQSTATUS_WKS     0x00010000
-#define MCSPI_IRQSTATUS_RX3_FULL \
-                                0x00004000
-
-#define MCSPI_IRQSTATUS_TX3_UNDERFLOW \
-                                0x00002000
-
-#define MCSPI_IRQSTATUS_TX3_EMPTY \
-                                0x00001000
-
-#define MCSPI_IRQSTATUS_RX2_FULL \
-                                0x00000400
-
-#define MCSPI_IRQSTATUS_TX2_UNDERFLOW \
-                                0x00000200
-
-#define MCSPI_IRQSTATUS_TX2_EMPTY \
-                                0x00000100
-
-#define MCSPI_IRQSTATUS_RX1_FULL \
-                                0x00000040
-
-#define MCSPI_IRQSTATUS_TX1_UNDERFLOW \
-                                0x00000020
-
-#define MCSPI_IRQSTATUS_TX1_EMPTY \
-                                0x00000010
-
-#define MCSPI_IRQSTATUS_RX0_OVERFLOW \
-                                0x00000008
-
-#define MCSPI_IRQSTATUS_RX0_FULL \
-                                0x00000004
-
-#define MCSPI_IRQSTATUS_TX0_UNDERFLOW \
-                                0x00000002
-
-#define MCSPI_IRQSTATUS_TX0_EMPTY \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_IRQENABLE register.
-//
-//******************************************************************************
-#define MCSPI_IRQENABLE_EOW_ENABLE \
-                                0x00020000  // End of Word count Interrupt
-                                            // Enable. 0 Interrupt disabled 1
-                                            // Interrupt enabled
-
-#define MCSPI_IRQENABLE_WKE     0x00010000  // Wake Up event interrupt Enable
-                                            // in slave mode when an active
-                                            // control signal is detected on the
-                                            // SPIEN line programmed in the
-                                            // field MCSPI_CH0CONF[SPIENSLV] 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-#define MCSPI_IRQENABLE_RX3_FULL_ENABLE \
-                                0x00004000  // Receiver register Full Interrupt
-                                            // Enable. Ch 3 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX3_UNDERFLOW_ENABLE \
-                                0x00002000  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 3 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX3_EMPTY_ENABLE \
-                                0x00001000  // Transmitter register Empty
-                                            // Interrupt Enable. Ch3 0 Interrupt
-                                            // disabled 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_RX2_FULL_ENABLE \
-                                0x00000400  // Receiver register Full Interrupt
-                                            // Enable. Ch 2 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX2_UNDERFLOW_ENABLE \
-                                0x00000200  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 2 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX2_EMPTY_ENABLE \
-                                0x00000100  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 2 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX1_FULL_ENABLE \
-                                0x00000040  // Receiver register Full Interrupt
-                                            // Enable. Ch 1 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX1_UNDERFLOW_ENABLE \
-                                0x00000020  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 1 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX1_EMPTY_ENABLE \
-                                0x00000010  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 1 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX0_OVERFLOW_ENABLE \
-                                0x00000008  // Receiver register Overflow
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_RX0_FULL_ENABLE \
-                                0x00000004  // Receiver register Full Interrupt
-                                            // Enable. Ch 0 0 Interrupt disabled
-                                            // 1 Interrupt enabled
-
-#define MCSPI_IRQENABLE_TX0_UNDERFLOW_ENABLE \
-                                0x00000002  // Transmitter register Underflow
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-#define MCSPI_IRQENABLE_TX0_EMPTY_ENABLE \
-                                0x00000001  // Transmitter register Empty
-                                            // Interrupt Enable. Ch 0 0
-                                            // Interrupt disabled 1 Interrupt
-                                            // enabled
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MCSPI_O_WAKEUPENABLE register.
-//
-//******************************************************************************
-#define MCSPI_WAKEUPENABLE_WKEN 0x00000001  // WakeUp functionality in slave
-                                            // mode when an active control
-                                            // signal is detected on the SPIEN
-                                            // line programmed in the field
-                                            // MCSPI_CH0CONF[SPIENSLV] 0 The
-                                            // event is not allowed to wakeup
-                                            // the system even if the global
-                                            // control bit
-                                            // MCSPI_SYSCONF[EnaWakeUp] is set.
-                                            // 1 The event is allowed to wakeup
-                                            // the system if the global control
-                                            // bit MCSPI_SYSCONF[EnaWakeUp] is
-                                            // set.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_SYST register.
-//
-//******************************************************************************
-#define MCSPI_SYST_SSB          0x00000800  // Set status bit 0 No action.
-                                            // Writing 0 does not clear already
-                                            // set status bits; This bit must be
-                                            // cleared prior attempting to clear
-                                            // a status bit of the
-                                            //  register. 1
-                                            // Force to 1 all status bits of
-                                            // MCSPI_IRQSTATUS register. Writing
-                                            // 1 into this bit sets to 1 all
-                                            // status bits contained in the
-                                            //  register.
-#define MCSPI_SYST_SPIENDIR     0x00000400  // Set the direction of the
-                                            // SPIEN[3:0] lines and SPICLK line
-                                            // 0 output (as in master mode) 1
-                                            // input (as in slave mode)
-#define MCSPI_SYST_SPIDATDIR1   0x00000200  // Set the direction of the
-                                            // SPIDAT[1] 0 output 1 input
-#define MCSPI_SYST_SPIDATDIR0   0x00000100  // Set the direction of the
-                                            // SPIDAT[0] 0 output 1 input
-#define MCSPI_SYST_WAKD         0x00000080  // SWAKEUP output (signal data
-                                            // value of internal signal to
-                                            // system). The signal is driven
-                                            // high or low according to the
-                                            // value written into this register
-                                            // bit. 0 The pin is driven low. 1
-                                            // The pin is driven high.
-#define MCSPI_SYST_SPICLK       0x00000040  // SPICLK line (signal data value)
-                                            // If MCSPI_SYST[SPIENDIR] = 1
-                                            // (input mode direction) this bit
-                                            // returns the value on the CLKSPI
-                                            // line (high or low) and a write
-                                            // into this bit has no effect. If
-                                            // MCSPI_SYST[SPIENDIR] = 0 (output
-                                            // mode direction) the CLKSPI line
-                                            // is driven high or low according
-                                            // to the value written into this
-                                            // register.
-#define MCSPI_SYST_SPIDAT_1     0x00000020  // SPIDAT[1] line (signal data
-                                            // value) If MCSPI_SYST[SPIDATDIR1]
-                                            // = 0 (output mode direction) the
-                                            // SPIDAT[1] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIDATDIR1] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIDAT[1] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIDAT_0     0x00000010  // SPIDAT[0] line (signal data
-                                            // value) If MCSPI_SYST[SPIDATDIR0]
-                                            // = 0 (output mode direction) the
-                                            // SPIDAT[0] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIDATDIR0] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIDAT[0] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_3      0x00000008  // SPIEN[3] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[3] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[3] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_2      0x00000004  // SPIEN[2] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[2] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[2] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_1      0x00000002  // SPIEN[1] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[1] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[1] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-#define MCSPI_SYST_SPIEN_0      0x00000001  // SPIEN[0] line (signal data
-                                            // value) If MCSPI_SYST[SPIENDIR] =
-                                            // 0 (output mode direction) the
-                                            // SPIENT[0] line is driven high or
-                                            // low according to the value
-                                            // written into this register. If
-                                            // MCSPI_SYST[SPIENDIR] = 1 (input
-                                            // mode direction) this bit returns
-                                            // the value on the SPIEN[0] line
-                                            // (high or low) and a write into
-                                            // this bit has no effect.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_MODULCTRL register.
-//
-//******************************************************************************
-#define MCSPI_MODULCTRL_FDAA    0x00000100  // FIFO DMA Address 256-bit aligned
-                                            // This register is used when a FIFO
-                                            // is managed by the module and DMA
-                                            // connected to the controller
-                                            // provides only 256 bit aligned
-                                            // address. If this bit is set the
-                                            // enabled channel which uses the
-                                            // FIFO has its datas managed
-                                            // through MCSPI_DAFTX and
-                                            // MCSPI_DAFRX registers instead of
-                                            // MCSPI_TX(i) and MCSPI_RX(i)
-                                            // registers. 0 FIFO data managed by
-                                            // MCSPI_TX(i) and MCSPI_RX(i)
-                                            // registers. 1 FIFO data managed by
-                                            // MCSPI_DAFTX and MCSPI_DAFRX
-                                            // registers.
-#define MCSPI_MODULCTRL_MOA     0x00000080  // Multiple word ocp access: This
-                                            // register can only be used when a
-                                            // channel is enabled using a FIFO.
-                                            // It allows the system to perform
-                                            // multiple SPI word access for a
-                                            // single 32-bit OCP word access.
-                                            // This is possible for WL < 16. 0
-                                            // Multiple word access disabled 1
-                                            // Multiple word access enabled with
-                                            // FIFO
-#define MCSPI_MODULCTRL_INITDLY_M \
-                                0x00000070  // Initial spi delay for first
-                                            // transfer: This register is an
-                                            // option only available in SINGLE
-                                            // master mode The controller waits
-                                            // for a delay to transmit the first
-                                            // spi word after channel enabled
-                                            // and corresponding TX register
-                                            // filled. This Delay is based on
-                                            // SPI output frequency clock No
-                                            // clock output provided to the
-                                            // boundary and chip select is not
-                                            // active in 4 pin mode within this
-                                            // period. 0x0 No delay for first
-                                            // spi transfer. 0x1 The controller
-                                            // wait 4 spi bus clock 0x2 The
-                                            // controller wait 8 spi bus clock
-                                            // 0x3 The controller wait 16 spi
-                                            // bus clock 0x4 The controller wait
-                                            // 32 spi bus clock
-
-#define MCSPI_MODULCTRL_INITDLY_S 4
-#define MCSPI_MODULCTRL_SYSTEM_TEST \
-                                0x00000008  // Enables the system test mode 0
-                                            // Functional mode 1 System test
-                                            // mode (SYSTEST)
-
-#define MCSPI_MODULCTRL_MS      0x00000004  // Master/ Slave 0 Master - The
-                                            // module generates the SPICLK and
-                                            // SPIEN[3:0] 1 Slave - The module
-                                            // receives the SPICLK and
-                                            // SPIEN[3:0]
-#define MCSPI_MODULCTRL_PIN34   0x00000002  // Pin mode selection: This
-                                            // register is used to configure the
-                                            // SPI pin mode in master or slave
-                                            // mode. If asserted the controller
-                                            // only use SIMOSOMI and SPICLK
-                                            // clock pin for spi transfers. 0
-                                            // SPIEN is used as a chip select. 1
-                                            // SPIEN is not used.In this mode
-                                            // all related option to chip select
-                                            // have no meaning.
-#define MCSPI_MODULCTRL_SINGLE  0x00000001  // Single channel / Multi Channel
-                                            // (master mode only) 0 More than
-                                            // one channel will be used in
-                                            // master mode. 1 Only one channel
-                                            // will be used in master mode. This
-                                            // bit must be set in Force SPIEN
-                                            // mode.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH0CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH0CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH0CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH0CONF_TCS0_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH0CONF_TCS0_S    25
-#define MCSPI_CH0CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH0CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH0CONF[SBPOL]
-#define MCSPI_CH0CONF_SPIENSLV_M \
-                                0x00600000  // Channel 0 only and slave mode
-                                            // only: SPI slave select signal
-                                            // detection. Reserved bits for
-                                            // other cases. 0x0 Detection
-                                            // enabled only on SPIEN[0] 0x1
-                                            // Detection enabled only on
-                                            // SPIEN[1] 0x2 Detection enabled
-                                            // only on SPIEN[2] 0x3 Detection
-                                            // enabled only on SPIEN[3]
-
-#define MCSPI_CH0CONF_SPIENSLV_S 21
-#define MCSPI_CH0CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH0CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH0CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH0CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH0CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH0CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH0CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH0CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH0CONF_TRM_S     12
-#define MCSPI_CH0CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH0CONF_WL_S      7
-#define MCSPI_CH0CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH0CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH0CONF_CLKD_S    2
-#define MCSPI_CH0CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH0CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH0STAT_RXFFF     0x00000040
-#define MCSPI_CH0STAT_RXFFE     0x00000020
-#define MCSPI_CH0STAT_TXFFF     0x00000010
-#define MCSPI_CH0STAT_TXFFE     0x00000008
-#define MCSPI_CH0STAT_EOT       0x00000004
-#define MCSPI_CH0STAT_TXS       0x00000002
-#define MCSPI_CH0STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH0CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH0CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH0CTRL_EXTCLK_S  8
-#define MCSPI_CH0CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX0 register.
-//
-//******************************************************************************
-#define MCSPI_TX0_TDATA_M       0xFFFFFFFF  // Channel 0 Data to transmit
-#define MCSPI_TX0_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX0 register.
-//
-//******************************************************************************
-#define MCSPI_RX0_RDATA_M       0xFFFFFFFF  // Channel 0 Received Data
-#define MCSPI_RX0_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH1CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH1CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH1CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH1CONF_TCS1_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH1CONF_TCS1_S    25
-#define MCSPI_CH1CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH1CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH1CONF[SBPOL]
-#define MCSPI_CH1CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH1CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH1CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH1CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH1CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH1CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH1CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH1CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH1CONF_TRM_S     12
-#define MCSPI_CH1CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH1CONF_WL_S      7
-#define MCSPI_CH1CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH1CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH1CONF_CLKD_S    2
-#define MCSPI_CH1CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH1CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH1STAT_RXFFF     0x00000040
-#define MCSPI_CH1STAT_RXFFE     0x00000020
-#define MCSPI_CH1STAT_TXFFF     0x00000010
-#define MCSPI_CH1STAT_TXFFE     0x00000008
-#define MCSPI_CH1STAT_EOT       0x00000004
-#define MCSPI_CH1STAT_TXS       0x00000002
-#define MCSPI_CH1STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH1CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH1CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH1CTRL_EXTCLK_S  8
-#define MCSPI_CH1CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX1 register.
-//
-//******************************************************************************
-#define MCSPI_TX1_TDATA_M       0xFFFFFFFF  // Channel 1 Data to transmit
-#define MCSPI_TX1_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX1 register.
-//
-//******************************************************************************
-#define MCSPI_RX1_RDATA_M       0xFFFFFFFF  // Channel 1 Received Data
-#define MCSPI_RX1_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH2CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH2CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH2CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH2CONF_TCS2_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH2CONF_TCS2_S    25
-#define MCSPI_CH2CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH2CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH2CONF[SBPOL]
-#define MCSPI_CH2CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH2CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH2CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH2CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH2CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH2CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH2CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH2CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH2CONF_TRM_S     12
-#define MCSPI_CH2CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH2CONF_WL_S      7
-#define MCSPI_CH2CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH2CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH2CONF_CLKD_S    2
-#define MCSPI_CH2CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH2CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH2STAT_RXFFF     0x00000040
-#define MCSPI_CH2STAT_RXFFE     0x00000020
-#define MCSPI_CH2STAT_TXFFF     0x00000010
-#define MCSPI_CH2STAT_TXFFE     0x00000008
-#define MCSPI_CH2STAT_EOT       0x00000004
-#define MCSPI_CH2STAT_TXS       0x00000002
-#define MCSPI_CH2STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH2CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH2CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH2CTRL_EXTCLK_S  8
-#define MCSPI_CH2CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX2 register.
-//
-//******************************************************************************
-#define MCSPI_TX2_TDATA_M       0xFFFFFFFF  // Channel 2 Data to transmit
-#define MCSPI_TX2_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX2 register.
-//
-//******************************************************************************
-#define MCSPI_RX2_RDATA_M       0xFFFFFFFF  // Channel 2 Received Data
-#define MCSPI_RX2_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3CONF register.
-//
-//******************************************************************************
-#define MCSPI_CH3CONF_CLKG      0x20000000  // Clock divider granularity This
-                                            // register defines the granularity
-                                            // of channel clock divider: power
-                                            // of two or one clock cycle
-                                            // granularity. When this bit is set
-                                            // the register MCSPI_CHCTRL[EXTCLK]
-                                            // must be configured to reach a
-                                            // maximum of 4096 clock divider
-                                            // ratio. Then The clock divider
-                                            // ratio is a concatenation of
-                                            // MCSPI_CHCONF[CLKD] and
-                                            // MCSPI_CHCTRL[EXTCLK] values 0
-                                            // Clock granularity of power of two
-                                            // 1 One clock cycle ganularity
-#define MCSPI_CH3CONF_FFER      0x10000000  // FIFO enabled for receive:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to receive data. 1 The
-                                            // buffer is used to receive data.
-#define MCSPI_CH3CONF_FFEW      0x08000000  // FIFO enabled for Transmit:Only
-                                            // one channel can have this bit
-                                            // field set. 0 The buffer is not
-                                            // used to transmit data. 1 The
-                                            // buffer is used to transmit data.
-#define MCSPI_CH3CONF_TCS3_M    0x06000000  // Chip Select Time Control This
-                                            // 2-bits field defines the number
-                                            // of interface clock cycles between
-                                            // CS toggling and first or last
-                                            // edge of SPI clock. 0x0 0.5 clock
-                                            // cycle 0x1 1.5 clock cycle 0x2 2.5
-                                            // clock cycle 0x3 3.5 clock cycle
-#define MCSPI_CH3CONF_TCS3_S    25
-#define MCSPI_CH3CONF_SBPOL     0x01000000  // Start bit polarity 0 Start bit
-                                            // polarity is held to 0 during SPI
-                                            // transfer. 1 Start bit polarity is
-                                            // held to 1 during SPI transfer.
-#define MCSPI_CH3CONF_SBE       0x00800000  // Start bit enable for SPI
-                                            // transfer 0 Default SPI transfer
-                                            // length as specified by WL bit
-                                            // field 1 Start bit D/CX added
-                                            // before SPI transfer polarity is
-                                            // defined by MCSPI_CH3CONF[SBPOL]
-#define MCSPI_CH3CONF_FORCE     0x00100000  // Manual SPIEN assertion to keep
-                                            // SPIEN active between SPI words.
-                                            // (single channel master mode only)
-                                            // 0 Writing 0 into this bit drives
-                                            // low the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it high when
-                                            // MCSPI_CHCONF(i)[EPOL]=1. 1
-                                            // Writing 1 into this bit drives
-                                            // high the SPIEN line when
-                                            // MCSPI_CHCONF(i)[EPOL]=0 and
-                                            // drives it low when
-                                            // MCSPI_CHCONF(i)[EPOL]=1
-#define MCSPI_CH3CONF_TURBO     0x00080000  // Turbo mode 0 Turbo is
-                                            // deactivated (recommended for
-                                            // single SPI word transfer) 1 Turbo
-                                            // is activated to maximize the
-                                            // throughput for multi SPI words
-                                            // transfer.
-#define MCSPI_CH3CONF_IS        0x00040000  // Input Select 0 Data Line0
-                                            // (SPIDAT[0]) selected for
-                                            // reception. 1 Data Line1
-                                            // (SPIDAT[1]) selected for
-                                            // reception
-#define MCSPI_CH3CONF_DPE1      0x00020000  // Transmission Enable for data
-                                            // line 1 (SPIDATAGZEN[1]) 0 Data
-                                            // Line1 (SPIDAT[1]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line1 (SPIDAT[1])
-#define MCSPI_CH3CONF_DPE0      0x00010000  // Transmission Enable for data
-                                            // line 0 (SPIDATAGZEN[0]) 0 Data
-                                            // Line0 (SPIDAT[0]) selected for
-                                            // transmission 1 No transmission on
-                                            // Data Line0 (SPIDAT[0])
-#define MCSPI_CH3CONF_DMAR      0x00008000  // DMA Read request The DMA Read
-                                            // request line is asserted when the
-                                            // channel is enabled and a new data
-                                            // is available in the receive
-                                            // register of the channel. The DMA
-                                            // Read request line is deasserted
-                                            // on read completion of the receive
-                                            // register of the channel. 0 DMA
-                                            // Read Request disabled 1 DMA Read
-                                            // Request enabled
-#define MCSPI_CH3CONF_DMAW      0x00004000  // DMA Write request. The DMA Write
-                                            // request line is asserted when The
-                                            // channel is enabled and the
-                                            // transmitter register of the
-                                            // channel is empty. The DMA Write
-                                            // request line is deasserted on
-                                            // load completion of the
-                                            // transmitter register of the
-                                            // channel. 0 DMA Write Request
-                                            // disabled 1 DMA Write Request
-                                            // enabled
-#define MCSPI_CH3CONF_TRM_M     0x00003000  // Transmit/Receive modes 0x0
-                                            // Transmit and Receive mode 0x1
-                                            // Receive only mode 0x2 Transmit
-                                            // only mode 0x3 Reserved
-#define MCSPI_CH3CONF_TRM_S     12
-#define MCSPI_CH3CONF_WL_M      0x00000F80  // SPI word length 0x00 Reserved
-                                            // 0x01 Reserved 0x02 Reserved 0x03
-                                            // The SPI word is 4-bits long 0x04
-                                            // The SPI word is 5-bits long 0x05
-                                            // The SPI word is 6-bits long 0x06
-                                            // The SPI word is 7-bits long 0x07
-                                            // The SPI word is 8-bits long 0x08
-                                            // The SPI word is 9-bits long 0x09
-                                            // The SPI word is 10-bits long 0x0A
-                                            // The SPI word is 11-bits long 0x0B
-                                            // The SPI word is 12-bits long 0x0C
-                                            // The SPI word is 13-bits long 0x0D
-                                            // The SPI word is 14-bits long 0x0E
-                                            // The SPI word is 15-bits long 0x0F
-                                            // The SPI word is 16-bits long 0x10
-                                            // The SPI word is 17-bits long 0x11
-                                            // The SPI word is 18-bits long 0x12
-                                            // The SPI word is 19-bits long 0x13
-                                            // The SPI word is 20-bits long 0x14
-                                            // The SPI word is 21-bits long 0x15
-                                            // The SPI word is 22-bits long 0x16
-                                            // The SPI word is 23-bits long 0x17
-                                            // The SPI word is 24-bits long 0x18
-                                            // The SPI word is 25-bits long 0x19
-                                            // The SPI word is 26-bits long 0x1A
-                                            // The SPI word is 27-bits long 0x1B
-                                            // The SPI word is 28-bits long 0x1C
-                                            // The SPI word is 29-bits long 0x1D
-                                            // The SPI word is 30-bits long 0x1E
-                                            // The SPI word is 31-bits long 0x1F
-                                            // The SPI word is 32-bits long
-#define MCSPI_CH3CONF_WL_S      7
-#define MCSPI_CH3CONF_EPOL      0x00000040  // SPIEN polarity 0 SPIEN is held
-                                            // high during the active state. 1
-                                            // SPIEN is held low during the
-                                            // active state.
-#define MCSPI_CH3CONF_CLKD_M    0x0000003C  // Frequency divider for SPICLK.
-                                            // (only when the module is a Master
-                                            // SPI device). A programmable clock
-                                            // divider divides the SPI reference
-                                            // clock (CLKSPIREF) with a 4-bit
-                                            // value and results in a new clock
-                                            // SPICLK available to shift-in and
-                                            // shift-out data. By default the
-                                            // clock divider ratio has a power
-                                            // of two granularity when
-                                            // MCSPI_CHCONF[CLKG] is cleared
-                                            // Otherwise this register is the 4
-                                            // LSB bit of a 12-bit register
-                                            // concatenated with clock divider
-                                            // extension MCSPI_CHCTRL[EXTCLK]
-                                            // register.The value description
-                                            // below defines the clock ratio
-                                            // when MCSPI_CHCONF[CLKG] is set to
-                                            // 0. 0x0 1 0x1 2 0x2 4 0x3 8 0x4 16
-                                            // 0x5 32 0x6 64 0x7 128 0x8 256 0x9
-                                            // 512 0xA 1024 0xB 2048 0xC 4096
-                                            // 0xD 8192 0xE 16384 0xF 32768
-#define MCSPI_CH3CONF_CLKD_S    2
-#define MCSPI_CH3CONF_POL       0x00000002  // SPICLK polarity 0 SPICLK is held
-                                            // high during the active state 1
-                                            // SPICLK is held low during the
-                                            // active state
-#define MCSPI_CH3CONF_PHA       0x00000001  // SPICLK phase 0 Data are latched
-                                            // on odd numbered edges of SPICLK.
-                                            // 1 Data are latched on even
-                                            // numbered edges of SPICLK.
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3STAT register.
-//
-//******************************************************************************
-#define MCSPI_CH3STAT_RXFFF     0x00000040
-#define MCSPI_CH3STAT_RXFFE     0x00000020
-#define MCSPI_CH3STAT_TXFFF     0x00000010
-#define MCSPI_CH3STAT_TXFFE     0x00000008
-#define MCSPI_CH3STAT_EOT       0x00000004
-#define MCSPI_CH3STAT_TXS       0x00000002
-#define MCSPI_CH3STAT_RXS       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_CH3CTRL register.
-//
-//******************************************************************************
-#define MCSPI_CH3CTRL_EXTCLK_M  0x0000FF00  // Clock ratio extension: This
-                                            // register is used to concatenate
-                                            // with MCSPI_CHCONF[CLKD] register
-                                            // for clock ratio only when
-                                            // granularity is one clock cycle
-                                            // (MCSPI_CHCONF[CLKG] set to 1).
-                                            // Then the max value reached is
-                                            // 4096 clock divider ratio. 0x00
-                                            // Clock ratio is CLKD + 1 0x01
-                                            // Clock ratio is CLKD + 1 + 16 0xFF
-                                            // Clock ratio is CLKD + 1 + 4080
-#define MCSPI_CH3CTRL_EXTCLK_S  8
-#define MCSPI_CH3CTRL_EN        0x00000001  // Channel Enable 0 "Channel ""i""
-                                            // is not active" 1 "Channel ""i""
-                                            // is active"
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_TX3 register.
-//
-//******************************************************************************
-#define MCSPI_TX3_TDATA_M       0xFFFFFFFF  // Channel 3 Data to transmit
-#define MCSPI_TX3_TDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_RX3 register.
-//
-//******************************************************************************
-#define MCSPI_RX3_RDATA_M       0xFFFFFFFF  // Channel 3 Received Data
-#define MCSPI_RX3_RDATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_XFERLEVEL register.
-//
-//******************************************************************************
-#define MCSPI_XFERLEVEL_WCNT_M  0xFFFF0000  // Spi word counterThis register
-                                            // holds the programmable value of
-                                            // number of SPI word to be
-                                            // transferred on channel which is
-                                            // using the FIFO buffer.When
-                                            // transfer had started a read back
-                                            // in this register returns the
-                                            // current SPI word transfer index.
-                                            // 0x0000 Counter not used 0x0001
-                                            // one word 0xFFFE 65534 spi word
-                                            // 0xFFFF 65535 spi word
-#define MCSPI_XFERLEVEL_WCNT_S  16
-#define MCSPI_XFERLEVEL_AFL_M   0x0000FF00  // Buffer Almost Full This register
-                                            // holds the programmable almost
-                                            // full level value used to
-                                            // determine almost full buffer
-                                            // condition. If the user wants an
-                                            // interrupt or a DMA read request
-                                            // to be issued during a receive
-                                            // operation when the data buffer
-                                            // holds at least n bytes then the
-                                            // buffer MCSPI_MODULCTRL[AFL] must
-                                            // be set with n-1.The size of this
-                                            // register is defined by the
-                                            // generic parameter FFNBYTE. 0x00
-                                            // one byte 0x01 2 bytes 0xFE
-                                            // 255bytes 0xFF 256bytes
-#define MCSPI_XFERLEVEL_AFL_S   8
-#define MCSPI_XFERLEVEL_AEL_M   0x000000FF  // Buffer Almost EmptyThis register
-                                            // holds the programmable almost
-                                            // empty level value used to
-                                            // determine almost empty buffer
-                                            // condition. If the user wants an
-                                            // interrupt or a DMA write request
-                                            // to be issued during a transmit
-                                            // operation when the data buffer is
-                                            // able to receive n bytes then the
-                                            // buffer MCSPI_MODULCTRL[AEL] must
-                                            // be set with n-1. 0x00 one byte
-                                            // 0x01 2 bytes 0xFE 255 bytes 0xFF
-                                            // 256bytes
-#define MCSPI_XFERLEVEL_AEL_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_DAFTX register.
-//
-//******************************************************************************
-#define MCSPI_DAFTX_DAFTDATA_M  0xFFFFFFFF  // FIFO Data to transmit with DMA
-                                            // 256 bit aligned address. "This
-                                            // Register is only is used when
-                                            // MCSPI_MODULCTRL[FDAA] is set to
-                                            // ""1"" and only one of the
-                                            // MCSPI_CH(i)CONF[FFEW] of enabled
-                                            // channels is set. If these
-                                            // conditions are not respected any
-                                            // access to this register return a
-                                            // null value."
-#define MCSPI_DAFTX_DAFTDATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MCSPI_O_DAFRX register.
-//
-//******************************************************************************
-#define MCSPI_DAFRX_DAFRDATA_M  0xFFFFFFFF  // FIFO Data to transmit with DMA
-                                            // 256 bit aligned address. "This
-                                            // Register is only is used when
-                                            // MCSPI_MODULCTRL[FDAA] is set to
-                                            // ""1"" and only one of the
-                                            // MCSPI_CH(i)CONF[FFEW] of enabled
-                                            // channels is set. If these
-                                            // conditions are not respected any
-                                            // access to this register return a
-                                            // null value."
-#define MCSPI_DAFRX_DAFRDATA_S  0
-
-
-
-#endif // __HW_MCSPI_H__
diff --git a/ports/cc3200/hal/inc/hw_memmap.h b/ports/cc3200/hal/inc/hw_memmap.h
deleted file mode 100644
index 244905dd20ac3..0000000000000
--- a/ports/cc3200/hal/inc/hw_memmap.h
+++ /dev/null
@@ -1,84 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MEMMAP_H__
-#define __HW_MEMMAP_H__
-
-//*****************************************************************************
-//
-// The following are defines for the base address of the memories and
-// peripherals on the slave_1 interface.
-//
-//*****************************************************************************
-#define FLASH_BASE              0x01000000
-#define SRAM_BASE               0x20000000
-#define WDT_BASE                0x40000000
-#define GPIOA0_BASE             0x40004000
-#define GPIOA1_BASE             0x40005000
-#define GPIOA2_BASE             0x40006000
-#define GPIOA3_BASE             0x40007000
-#define GPIOA4_BASE             0x40024000 
-#define UARTA0_BASE             0x4000C000
-#define UARTA1_BASE             0x4000D000
-#define I2CA0_BASE              0x40020000
-#define TIMERA0_BASE            0x40030000
-#define TIMERA1_BASE            0x40031000
-#define TIMERA2_BASE            0x40032000
-#define TIMERA3_BASE            0x40033000
-#define STACKDIE_CTRL_BASE      0x400F5000
-#define COMMON_REG_BASE         0x400F7000
-#define FLASH_CONTROL_BASE      0x400FD000
-#define SYSTEM_CONTROL_BASE     0x400FE000
-#define UDMA_BASE               0x400FF000
-#define SDHOST_BASE             0x44010000
-#define CAMERA_BASE             0x44018000
-#define I2S_BASE                0x4401C000
-#define SSPI_BASE               0x44020000
-#define GSPI_BASE               0x44021000
-#define LSPI_BASE               0x44022000
-#define ARCM_BASE               0x44025000
-#define APPS_CONFIG_BASE        0x44026000
-#define GPRCM_BASE              0x4402D000
-#define OCP_SHARED_BASE         0x4402E000
-#define ADC_BASE                0x4402E800
-#define HIB1P2_BASE             0x4402F000
-#define HIB3P3_BASE             0x4402F800
-#define DTHE_BASE               0x44030000
-#define SHAMD5_BASE             0x44035000
-#define AES_BASE                0x44037000
-#define DES_BASE                0x44039000
-
-
-#endif // __HW_MEMMAP_H__
diff --git a/ports/cc3200/hal/inc/hw_mmchs.h b/ports/cc3200/hal/inc/hw_mmchs.h
deleted file mode 100644
index 3096d13a9904d..0000000000000
--- a/ports/cc3200/hal/inc/hw_mmchs.h
+++ /dev/null
@@ -1,1919 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_MMCHS_H__
-#define __HW_MMCHS_H__
-
-//*****************************************************************************
-//
-// The following are defines for the MMCHS register offsets.
-//
-//*****************************************************************************
-#define MMCHS_O_HL_REV          0x00000000  // IP Revision Identifier (X.Y.R)
-                                            // Used by software to track
-                                            // features bugs and compatibility
-#define MMCHS_O_HL_HWINFO       0x00000004  // Information about the IP
-                                            // module's hardware configuration
-                                            // i.e. typically the module's HDL
-                                            // generics (if any). Actual field
-                                            // format and encoding is up to the
-                                            // module's designer to decide.
-#define MMCHS_O_HL_SYSCONFIG    0x00000010  // Clock management configuration
-#define MMCHS_O_SYSCONFIG       0x00000110  // System Configuration Register
-                                            // This register allows controlling
-                                            // various parameters of the OCP
-                                            // interface.
-#define MMCHS_O_SYSSTATUS       0x00000114  // System Status Register This
-                                            // register provides status
-                                            // information about the module
-                                            // excluding the interrupt status
-                                            // information
-#define MMCHS_O_CSRE            0x00000124  // Card status response error This
-                                            // register enables the host
-                                            // controller to detect card status
-                                            // errors of response type R1 R1b
-                                            // for all cards and of R5 R5b and
-                                            // R6 response for cards types SD or
-                                            // SDIO. When a bit MMCHS_CSRE[i] is
-                                            // set to 1 if the corresponding bit
-                                            // at the same position in the
-                                            // response MMCHS_RSP0[i] is set to
-                                            // 1 the host controller indicates a
-                                            // card error (MMCHS_STAT[CERR])
-                                            // interrupt status to avoid the
-                                            // host driver reading the response
-                                            // register (MMCHS_RSP0). Note: No
-                                            // automatic card error detection
-                                            // for autoCMD12 is implemented; the
-                                            // host system has to check
-                                            // autoCMD12 response register
-                                            // (MMCHS_RESP76) for possible card
-                                            // errors.
-#define MMCHS_O_SYSTEST         0x00000128  // System Test register This
-                                            // register is used to control the
-                                            // signals that connect to I/O pins
-                                            // when the module is configured in
-                                            // system test (SYSTEST) mode for
-                                            // boundary connectivity
-                                            // verification. Note: In SYSTEST
-                                            // mode a write into MMCHS_CMD
-                                            // register will not start a
-                                            // transfer. The buffer behaves as a
-                                            // stack accessible only by the
-                                            // local host (push and pop
-                                            // operations). In this mode the
-                                            // Transfer Block Size
-                                            // (MMCHS_BLK[BLEN]) and the Blocks
-                                            // count for current transfer
-                                            // (MMCHS_BLK[NBLK]) are needed to
-                                            // generate a Buffer write ready
-                                            // interrupt (MMCHS_STAT[BWR]) or a
-                                            // Buffer read ready interrupt
-                                            // (MMCHS_STAT[BRR]) and DMA
-                                            // requests if enabled.
-#define MMCHS_O_CON             0x0000012C  // Configuration register This
-                                            // register is used: - to select the
-                                            // functional mode or the SYSTEST
-                                            // mode for any card. - to send an
-                                            // initialization sequence to any
-                                            // card. - to enable the detection
-                                            // on DAT[1] of a card interrupt for
-                                            // SDIO cards only. and also to
-                                            // configure : - specific data and
-                                            // command transfers for MMC cards
-                                            // only. - the parameters related to
-                                            // the card detect and write protect
-                                            // input signals.
-#define MMCHS_O_PWCNT           0x00000130  // Power counter register This
-                                            // register is used to program a mmc
-                                            // counter to delay command
-                                            // transfers after activating the
-                                            // PAD power this value depends on
-                                            // PAD characteristics and voltage.
-#define MMCHS_O_BLK             0x00000204  // Transfer Length Configuration
-                                            // register MMCHS_BLK[BLEN] is the
-                                            // block size register.
-                                            // MMCHS_BLK[NBLK] is the block
-                                            // count register. This register
-                                            // shall be used for any card.
-#define MMCHS_O_ARG             0x00000208  // Command argument Register This
-                                            // register contains command
-                                            // argument specified as bit 39-8 of
-                                            // Command-Format These registers
-                                            // must be initialized prior to
-                                            // sending the command itself to the
-                                            // card (write action into the
-                                            // register MMCHS_CMD register).
-                                            // Only exception is for a command
-                                            // index specifying stuff bits in
-                                            // arguments making a write
-                                            // unnecessary.
-#define MMCHS_O_CMD             0x0000020C  // Command and transfer mode
-                                            // register MMCHS_CMD[31:16] = the
-                                            // command register MMCHS_CMD[15:0]
-                                            // = the transfer mode. This
-                                            // register configures the data and
-                                            // command transfers. A write into
-                                            // the most significant byte send
-                                            // the command. A write into
-                                            // MMCHS_CMD[15:0] registers during
-                                            // data transfer has no effect. This
-                                            // register shall be used for any
-                                            // card. Note: In SYSTEST mode a
-                                            // write into MMCHS_CMD register
-                                            // will not start a transfer.
-#define MMCHS_O_RSP10           0x00000210  // Command response[31:0] Register
-                                            // This 32-bit register holds bits
-                                            // positions [31:0] of command
-                                            // response type
-                                            // R1/R1b/R2/R3/R4/R5/R5b/R6
-#define MMCHS_O_RSP32           0x00000214  // Command response[63:32] Register
-                                            // This 32-bit register holds bits
-                                            // positions [63:32] of command
-                                            // response type R2
-#define MMCHS_O_RSP54           0x00000218  // Command response[95:64] Register
-                                            // This 32-bit register holds bits
-                                            // positions [95:64] of command
-                                            // response type R2
-#define MMCHS_O_RSP76           0x0000021C  // Command response[127:96]
-                                            // Register This 32-bit register
-                                            // holds bits positions [127:96] of
-                                            // command response type R2
-#define MMCHS_O_DATA            0x00000220  // Data Register This register is
-                                            // the 32-bit entry point of the
-                                            // buffer for read or write data
-                                            // transfers. The buffer size is
-                                            // 32bits x256(1024 bytes). Bytes
-                                            // within a word are stored and read
-                                            // in little endian format. This
-                                            // buffer can be used as two 512
-                                            // byte buffers to transfer data
-                                            // efficiently without reducing the
-                                            // throughput. Sequential and
-                                            // contiguous access is necessary to
-                                            // increment the pointer correctly.
-                                            // Random or skipped access is not
-                                            // allowed. In little endian if the
-                                            // local host accesses this register
-                                            // byte-wise or 16bit-wise the least
-                                            // significant byte (bits [7:0])
-                                            // must always be written/read
-                                            // first. The update of the buffer
-                                            // address is done on the most
-                                            // significant byte write for full
-                                            // 32-bit DATA register or on the
-                                            // most significant byte of the last
-                                            // word of block transfer. Example
-                                            // 1: Byte or 16-bit access
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=1100 (2-bytes) OK
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=0100 (1-byte) OK
-                                            // Mbyteen[3:0]=0001 (1-byte) =>
-                                            // Mbyteen[3:0]=0010 (1-byte) =>
-                                            // Mbyteen[3:0]=1000 (1-byte) Bad
-#define MMCHS_O_PSTATE          0x00000224  // Present state register The Host
-                                            // can get status of the Host
-                                            // Controller from this 32-bit read
-                                            // only register.
-#define MMCHS_O_HCTL            0x00000228  // Control register This register
-                                            // defines the host controls to set
-                                            // power wakeup and transfer
-                                            // parameters. MMCHS_HCTL[31:24] =
-                                            // Wakeup control MMCHS_HCTL[23:16]
-                                            // = Block gap control
-                                            // MMCHS_HCTL[15:8] = Power control
-                                            // MMCHS_HCTL[7:0] = Host control
-#define MMCHS_O_SYSCTL          0x0000022C  // SD system control register This
-                                            // register defines the system
-                                            // controls to set software resets
-                                            // clock frequency management and
-                                            // data timeout. MMCHS_SYSCTL[31:24]
-                                            // = Software resets
-                                            // MMCHS_SYSCTL[23:16] = Timeout
-                                            // control MMCHS_SYSCTL[15:0] =
-                                            // Clock control
-#define MMCHS_O_STAT            0x00000230  // Interrupt status register The
-                                            // interrupt status regroups all the
-                                            // status of the module internal
-                                            // events that can generate an
-                                            // interrupt. MMCHS_STAT[31:16] =
-                                            // Error Interrupt Status
-                                            // MMCHS_STAT[15:0] = Normal
-                                            // Interrupt Status
-#define MMCHS_O_IE              0x00000234  // Interrupt SD enable register
-                                            // This register allows to
-                                            // enable/disable the module to set
-                                            // status bits on an event-by-event
-                                            // basis. MMCHS_IE[31:16] = Error
-                                            // Interrupt Status Enable
-                                            // MMCHS_IE[15:0] = Normal Interrupt
-                                            // Status Enable
-#define MMCHS_O_ISE             0x00000238  // Interrupt signal enable register
-                                            // This register allows to
-                                            // enable/disable the module
-                                            // internal sources of status on an
-                                            // event-by-event basis.
-                                            // MMCHS_ISE[31:16] = Error
-                                            // Interrupt Signal Enable
-                                            // MMCHS_ISE[15:0] = Normal
-                                            // Interrupt Signal Enable
-#define MMCHS_O_AC12            0x0000023C  // Auto CMD12 Error Status Register
-                                            // The host driver may determine
-                                            // which of the errors cases related
-                                            // to Auto CMD12 has occurred by
-                                            // checking this MMCHS_AC12 register
-                                            // when an Auto CMD12 Error
-                                            // interrupt occurs. This register
-                                            // is valid only when Auto CMD12 is
-                                            // enabled (MMCHS_CMD[ACEN]) and
-                                            // Auto CMD12Error (MMCHS_STAT[ACE])
-                                            // is set to 1. Note: These bits are
-                                            // automatically reset when starting
-                                            // a new adtc command with data.
-#define MMCHS_O_CAPA            0x00000240  // Capabilities register This
-                                            // register lists the capabilities
-                                            // of the MMC/SD/SDIO host
-                                            // controller.
-#define MMCHS_O_CUR_CAPA        0x00000248  // Maximum current capabilities
-                                            // Register This register indicates
-                                            // the maximum current capability
-                                            // for each voltage. The value is
-                                            // meaningful if the voltage support
-                                            // is set in the capabilities
-                                            // register (MMCHS_CAPA).
-                                            // Initialization of this register
-                                            // (via a write access to this
-                                            // register) depends on the system
-                                            // capabilities. The host driver
-                                            // shall not modify this register
-                                            // after the initilaization. This
-                                            // register is only reinitialized by
-                                            // a hard reset (via RESETN signal)
-#define MMCHS_O_FE              0x00000250  // Force Event Register for Error
-                                            // Interrupt status The force Event
-                                            // Register is not a physically
-                                            // implemented register. Rather it
-                                            // is an address at which the Error
-                                            // Interrupt Status register can be
-                                            // written. The effect of a write to
-                                            // this address will be reflected in
-                                            // the Error Interrupt Status
-                                            // Register if corresponding bit of
-                                            // the Error Interrupt Status Enable
-                                            // Register is set.
-#define MMCHS_O_ADMAES          0x00000254  // ADMA Error Status Register When
-                                            // ADMA Error Interrupt is occurred
-                                            // the ADMA Error States field in
-                                            // this register holds the ADMA
-                                            // state and the ADMA System Address
-                                            // Register holds the address around
-                                            // the error descriptor. For
-                                            // recovering the error the Host
-                                            // Driver requires the ADMA state to
-                                            // identify the error descriptor
-                                            // address as follows: ST_STOP:
-                                            // Previous location set in the ADMA
-                                            // System Address register is the
-                                            // error descriptor address ST_FDS:
-                                            // Current location set in the ADMA
-                                            // System Address register is the
-                                            // error descriptor address ST_CADR:
-                                            // This sate is never set because do
-                                            // not generate ADMA error in this
-                                            // state. ST_TFR: Previous location
-                                            // set in the ADMA System Address
-                                            // register is the error descriptor
-                                            // address In case of write
-                                            // operation the Host Driver should
-                                            // use ACMD22 to get the number of
-                                            // written block rather than using
-                                            // this information since unwritten
-                                            // data may exist in the Host
-                                            // Controller. The Host Controller
-                                            // generates the ADMA Error
-                                            // Interrupt when it detects invalid
-                                            // descriptor data (Valid=0) at the
-                                            // ST_FDS state. In this case ADMA
-                                            // Error State indicates that an
-                                            // error occurs at ST_FDS state. The
-                                            // Host Driver may find that the
-                                            // Valid bit is not set in the error
-                                            // descriptor.
-#define MMCHS_O_ADMASAL         0x00000258  // ADMA System address Low bits
-#define MMCHS_O_REV             0x000002FC  // Versions Register This register
-                                            // contains the hard coded RTL
-                                            // vendor revision number the
-                                            // version number of SD
-                                            // specification compliancy and a
-                                            // slot status bit. MMCHS_REV[31:16]
-                                            // = Host controller version
-                                            // MMCHS_REV[15:0] = Slot Interrupt
-                                            // Status
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HL_REV register.
-//
-//******************************************************************************
-#define MMCHS_HL_REV_SCHEME_M   0xC0000000
-#define MMCHS_HL_REV_SCHEME_S   30
-#define MMCHS_HL_REV_FUNC_M     0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define MMCHS_HL_REV_FUNC_S     16
-#define MMCHS_HL_REV_R_RTL_M    0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define MMCHS_HL_REV_R_RTL_S    11
-#define MMCHS_HL_REV_X_MAJOR_M  0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-#define MMCHS_HL_REV_X_MAJOR_S  8
-#define MMCHS_HL_REV_CUSTOM_M   0x000000C0
-#define MMCHS_HL_REV_CUSTOM_S   6
-#define MMCHS_HL_REV_Y_MINOR_M  0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-#define MMCHS_HL_REV_Y_MINOR_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HL_HWINFO register.
-//
-//******************************************************************************
-#define MMCHS_HL_HWINFO_RETMODE 0x00000040
-#define MMCHS_HL_HWINFO_MEM_SIZE_M \
-                                0x0000003C
-
-#define MMCHS_HL_HWINFO_MEM_SIZE_S 2
-#define MMCHS_HL_HWINFO_MERGE_MEM \
-                                0x00000002
-
-#define MMCHS_HL_HWINFO_MADMA_EN \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// MMCHS_O_HL_SYSCONFIG register.
-//
-//******************************************************************************
-#define MMCHS_HL_SYSCONFIG_STANDBYMODE_M \
-                                0x00000030  // Configuration of the local
-                                            // initiator state management mode.
-                                            // By definition initiator may
-                                            // generate read/write transaction
-                                            // as long as it is out of STANDBY
-                                            // state. 0x0 Force-standby mode:
-                                            // local initiator is
-                                            // unconditionally placed in standby
-                                            // state.Backup mode for debug only.
-                                            // 0x1 No-standby mode: local
-                                            // initiator is unconditionally
-                                            // placed out of standby
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-standby mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator.IP module
-                                            // shall not generate
-                                            // (initiator-related) wakeup
-                                            // events. 0x3 "Smart-Standby
-                                            // wakeup-capable mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator. IP module may
-                                            // generate (master-related) wakeup
-                                            // events when in standby state.Mode
-                                            // is only relevant if the
-                                            // appropriate IP module ""mwakeup""
-                                            // output is implemented."
-
-#define MMCHS_HL_SYSCONFIG_STANDBYMODE_S 4
-#define MMCHS_HL_SYSCONFIG_IDLEMODE_M \
-                                0x0000000C  // Configuration of the local
-                                            // target state management mode. By
-                                            // definition target can handle
-                                            // read/write transaction as long as
-                                            // it is out of IDLE state. 0x0
-                                            // Force-idle mode: local target's
-                                            // idle state follows (acknowledges)
-                                            // the system's idle requests
-                                            // unconditionally i.e. regardless
-                                            // of the IP module's internal
-                                            // requirements.Backup mode for
-                                            // debug only. 0x1 No-idle mode:
-                                            // local target never enters idle
-                                            // state.Backup mode for debug only.
-                                            // 0x2 Smart-idle mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module shall not
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 "Smart-idle
-                                            // wakeup-capable mode: local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MMCHS_HL_SYSCONFIG_IDLEMODE_S 2
-#define MMCHS_HL_SYSCONFIG_FREEEMU \
-                                0x00000002  // Sensitivity to emulation (debug)
-                                            // suspend input signal.
-                                            // Functionality NOT implemented in
-                                            // MMCHS. 0 IP module is sensitive
-                                            // to emulation suspend 1 IP module
-                                            // is not sensitive to emulation
-                                            // suspend
-
-#define MMCHS_HL_SYSCONFIG_SOFTRESET \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define MMCHS_SYSCONFIG_STANDBYMODE_M \
-                                0x00003000  // Master interface power
-                                            // Management standby/wait control.
-                                            // The bit field is only useful when
-                                            // generic parameter MADMA_EN
-                                            // (Master ADMA enable) is set as
-                                            // active otherwise it is a read
-                                            // only register read a '0'. 0x0
-                                            // Force-standby. Mstandby is forced
-                                            // unconditionnaly. 0x1 No-standby.
-                                            // Mstandby is never asserted. 0x2
-                                            // Smart-standby mode: local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator.IP module
-                                            // shall not generate
-                                            // (initiator-related) wakeup
-                                            // events. 0x3 Smart-Standby
-                                            // wakeup-capable mode: "local
-                                            // initiator standby status depends
-                                            // on local conditions i.e. the
-                                            // module's functional requirement
-                                            // from the initiator. IP module may
-                                            // generate (master-related) wakeup
-                                            // events when in standby state.Mode
-                                            // is only relevant if the
-                                            // appropriate IP module ""mwakeup""
-                                            // output is implemented."
-
-#define MMCHS_SYSCONFIG_STANDBYMODE_S 12
-#define MMCHS_SYSCONFIG_CLOCKACTIVITY_M \
-                                0x00000300  // Clocks activity during wake up
-                                            // mode period. Bit8: OCP interface
-                                            // clock Bit9: Functional clock 0x0
-                                            // OCP and Functional clock may be
-                                            // switched off. 0x1 OCP clock is
-                                            // maintained. Functional clock may
-                                            // be switched-off. 0x2 Functional
-                                            // clock is maintained. OCP clock
-                                            // may be switched-off. 0x3 OCP and
-                                            // Functional clocks are maintained.
-
-#define MMCHS_SYSCONFIG_CLOCKACTIVITY_S 8
-#define MMCHS_SYSCONFIG_SIDLEMODE_M \
-                                0x00000018  // Power management 0x0 If an idle
-                                            // request is detected the MMCHS
-                                            // acknowledges it unconditionally
-                                            // and goes in Inactive mode.
-                                            // Interrupt and DMA requests are
-                                            // unconditionally de-asserted. 0x1
-                                            // If an idle request is detected
-                                            // the request is ignored and the
-                                            // module keeps on behaving
-                                            // normally. 0x2 Smart-idle mode:
-                                            // local target's idle state
-                                            // eventually follows (acknowledges)
-                                            // the system's idle requests
-                                            // depending on the IP module's
-                                            // internal requirements.IP module
-                                            // shall not generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events. 0x3 Smart-idle
-                                            // wakeup-capable mode: "local
-                                            // target's idle state eventually
-                                            // follows (acknowledges) the
-                                            // system's idle requests depending
-                                            // on the IP module's internal
-                                            // requirements.IP module may
-                                            // generate (IRQ- or
-                                            // DMA-request-related) wakeup
-                                            // events when in idle state.Mode is
-                                            // only relevant if the appropriate
-                                            // IP module ""swakeup"" output(s)
-                                            // is (are) implemented."
-
-#define MMCHS_SYSCONFIG_SIDLEMODE_S 3
-#define MMCHS_SYSCONFIG_ENAWAKEUP \
-                                0x00000004  // Wakeup feature control 0 Wakeup
-                                            // capability is disabled 1 Wakeup
-                                            // capability is enabled
-
-#define MMCHS_SYSCONFIG_SOFTRESET \
-                                0x00000002
-
-#define MMCHS_SYSCONFIG_AUTOIDLE \
-                                0x00000001  // Internal Clock gating strategy 0
-                                            // Clocks are free-running 1
-                                            // Automatic clock gating strategy
-                                            // is applied based on the OCP and
-                                            // MMC interface activity
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define MMCHS_SYSSTATUS_RESETDONE \
-                                0x00000001
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CSRE register.
-//
-//******************************************************************************
-#define MMCHS_CSRE_CSRE_M       0xFFFFFFFF  // Card status response error
-#define MMCHS_CSRE_CSRE_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSTEST register.
-//
-//******************************************************************************
-#define MMCHS_SYSTEST_OBI       0x00010000
-#define MMCHS_SYSTEST_SDCD      0x00008000
-#define MMCHS_SYSTEST_SDWP      0x00004000
-#define MMCHS_SYSTEST_WAKD      0x00002000
-#define MMCHS_SYSTEST_SSB       0x00001000
-#define MMCHS_SYSTEST_D7D       0x00000800
-#define MMCHS_SYSTEST_D6D       0x00000400
-#define MMCHS_SYSTEST_D5D       0x00000200
-#define MMCHS_SYSTEST_D4D       0x00000100
-#define MMCHS_SYSTEST_D3D       0x00000080
-#define MMCHS_SYSTEST_D2D       0x00000040
-#define MMCHS_SYSTEST_D1D       0x00000020
-#define MMCHS_SYSTEST_D0D       0x00000010
-#define MMCHS_SYSTEST_DDIR      0x00000008
-#define MMCHS_SYSTEST_CDAT      0x00000004
-#define MMCHS_SYSTEST_CDIR      0x00000002
-#define MMCHS_SYSTEST_MCKD      0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CON register.
-//
-//******************************************************************************
-#define MMCHS_CON_SDMA_LNE      0x00200000  // Slave DMA Level/Edge Request:
-                                            // The waveform of the DMA request
-                                            // can be configured either edge
-                                            // sensitive with early de-assertion
-                                            // on first access to MMCHS_DATA
-                                            // register or late de-assertion
-                                            // request remains active until last
-                                            // allowed data written into
-                                            // MMCHS_DATA. 0 Slave DMA edge
-                                            // sensitive Early DMA de-assertion
-                                            // 1 Slave DMA level sensitive Late
-                                            // DMA de-assertion
-#define MMCHS_CON_DMA_MNS       0x00100000  // DMA Master or Slave selection:
-                                            // When this bit is set and the
-                                            // controller is configured to use
-                                            // the DMA Ocp master interface is
-                                            // used to get datas from system
-                                            // using ADMA2 procedure (direct
-                                            // access to the memory).This option
-                                            // is only available if generic
-                                            // parameter MADMA_EN is asserted to
-                                            // '1'. 0 The controller is slave on
-                                            // data transfers with system. 1 The
-                                            // controller is master on data
-                                            // exchange with system controller
-                                            // must be configured as using DMA.
-#define MMCHS_CON_DDR           0x00080000  // Dual Data Rate mode: When this
-                                            // register is set the controller
-                                            // uses both clock edge to emit or
-                                            // receive data. Odd bytes are
-                                            // transmitted on falling edges and
-                                            // even bytes are transmitted on
-                                            // rise edges. It only applies on
-                                            // Data bytes and CRC Start end bits
-                                            // and CRC status are kept full
-                                            // cycle. This bit field is only
-                                            // meaningful and active for even
-                                            // clock divider ratio of
-                                            // MMCHS_SYSCTL[CLKD] it is
-                                            // insensitive to MMCHS_HCTL[HSPE]
-                                            // setting. 0 Standard mode : data
-                                            // are transmitted on a single edge
-                                            // depending on MMCHS_HCTRL[HSPE]. 1
-                                            // Data Bytes and CRC are
-                                            // transmitted on both edge.
-#define MMCHS_CON_BOOT_CF0      0x00040000
-#define MMCHS_CON_BOOT_ACK      0x00020000  // Book acknowledge received: When
-                                            // this bit is set the controller
-                                            // should receive a boot status on
-                                            // DAT0 line after next command
-                                            // issued. If no status is received
-                                            // a data timeout will be generated.
-                                            // 0 No acknowledge to be received 1
-                                            // A boot status will be received on
-                                            // DAT0 line after issuing a
-                                            // command.
-#define MMCHS_CON_CLKEXTFREE    0x00010000  // External clock free running:
-                                            // This register is used to maintain
-                                            // card clock out of transfer
-                                            // transaction to enable slave
-                                            // module for example to generate a
-                                            // synchronous interrupt on DAT[1].
-                                            // The Clock will be maintain only
-                                            // if MMCHS_SYSCTL[CEN] is set. 0
-                                            // External card clock is cut off
-                                            // outside active transaction
-                                            // period. 1 External card clock is
-                                            // maintain even out of active
-                                            // transaction period only if
-                                            // MMCHS_SYSCTL[CEN] is set.
-#define MMCHS_CON_PADEN         0x00008000  // Control Power for MMC Lines:
-                                            // This register is only useful when
-                                            // MMC PADs contain power saving
-                                            // mechanism to minimize its leakage
-                                            // power. It works as a GPIO that
-                                            // directly control the ACTIVE pin
-                                            // of PADs. Excepted for DAT[1] the
-                                            // signal is also combine outside
-                                            // the module with the dedicated
-                                            // power control MMCHS_CON[CTPL]
-                                            // bit. 0 ADPIDLE module pin is not
-                                            // forced it is automatically
-                                            // generated by the MMC fsms. 1
-                                            // ADPIDLE module pin is forced to
-                                            // active state.
-#define MMCHS_CON_OBIE          0x00004000  // Out-of-Band Interrupt Enable MMC
-                                            // cards only: This bit enables the
-                                            // detection of Out-of-Band
-                                            // Interrupt on MMCOBI input pin.
-                                            // The usage of the Out-of-Band
-                                            // signal (OBI) is optional and
-                                            // depends on the system
-                                            // integration. 0 Out-of-Band
-                                            // interrupt detection disabled 1
-                                            // Out-of-Band interrupt detection
-                                            // enabled
-#define MMCHS_CON_OBIP          0x00002000  // Out-of-Band Interrupt Polarity
-                                            // MMC cards only: This bit selects
-                                            // the active level of the
-                                            // out-of-band interrupt coming from
-                                            // MMC cards. The usage of the
-                                            // Out-of-Band signal (OBI) is
-                                            // optional and depends on the
-                                            // system integration. 0 active high
-                                            // level 1 active low level
-#define MMCHS_CON_CEATA         0x00001000  // CE-ATA control mode MMC cards
-                                            // compliant with CE-ATA:By default
-                                            // this bit is set to 0. It is use
-                                            // to indicate that next commands
-                                            // are considered as specific CE-ATA
-                                            // commands that potentially use
-                                            // 'command completion' features. 0
-                                            // Standard MMC/SD/SDIO mode. 1
-                                            // CE-ATA mode next commands are
-                                            // considered as CE-ATA commands.
-#define MMCHS_CON_CTPL          0x00000800  // Control Power for DAT[1] line
-                                            // MMC and SD cards: By default this
-                                            // bit is set to 0 and the host
-                                            // controller automatically disables
-                                            // all the input buffers outside of
-                                            // a transaction to minimize the
-                                            // leakage current. SDIO cards: When
-                                            // this bit is set to 1 the host
-                                            // controller automatically disables
-                                            // all the input buffers except the
-                                            // buffer of DAT[1] outside of a
-                                            // transaction in order to detect
-                                            // asynchronous card interrupt on
-                                            // DAT[1] line and minimize the
-                                            // leakage current of the buffers. 0
-                                            // Disable all the input buffers
-                                            // outside of a transaction. 1
-                                            // Disable all the input buffers
-                                            // except the buffer of DAT[1]
-                                            // outside of a transaction.
-#define MMCHS_CON_DVAL_M        0x00000600  // Debounce filter value All cards
-                                            // This register is used to define a
-                                            // debounce period to filter the
-                                            // card detect input signal (SDCD).
-                                            // The usage of the card detect
-                                            // input signal (SDCD) is optional
-                                            // and depends on the system
-                                            // integration and the type of the
-                                            // connector housing that
-                                            // accommodates the card. 0x0 33 us
-                                            // debounce period 0x1 231 us
-                                            // debounce period 0x2 1 ms debounce
-                                            // period 0x3 84 ms debounce period
-#define MMCHS_CON_DVAL_S        9
-#define MMCHS_CON_WPP           0x00000100  // Write protect polarity For SD
-                                            // and SDIO cards only This bit
-                                            // selects the active level of the
-                                            // write protect input signal
-                                            // (SDWP). The usage of the write
-                                            // protect input signal (SDWP) is
-                                            // optional and depends on the
-                                            // system integration and the type
-                                            // of the connector housing that
-                                            // accommodates the card. 0 active
-                                            // high level 1 active low level
-#define MMCHS_CON_CDP           0x00000080  // Card detect polarity All cards
-                                            // This bit selects the active level
-                                            // of the card detect input signal
-                                            // (SDCD). The usage of the card
-                                            // detect input signal (SDCD) is
-                                            // optional and depends on the
-                                            // system integration and the type
-                                            // of the connector housing that
-                                            // accommodates the card. 0 active
-                                            // high level 1 active low level
-#define MMCHS_CON_MIT           0x00000040  // MMC interrupt command Only for
-                                            // MMC cards. This bit must be set
-                                            // to 1 when the next write access
-                                            // to the command register
-                                            // (MMCHS_CMD) is for writing a MMC
-                                            // interrupt command (CMD40)
-                                            // requiring the command timeout
-                                            // detection to be disabled for the
-                                            // command response. 0 Command
-                                            // timeout enabled 1 Command timeout
-                                            // disabled
-#define MMCHS_CON_DW8           0x00000020  // 8-bit mode MMC select For
-                                            // SD/SDIO cards this bit must be
-                                            // set to 0. For MMC card this bit
-                                            // must be set following a valid
-                                            // SWITCH command (CMD6) with the
-                                            // correct value and extend CSD
-                                            // index written in the argument.
-                                            // Prior to this command the MMC
-                                            // card configuration register (CSD
-                                            // and EXT_CSD) must be verified for
-                                            // compliancy with MMC standard
-                                            // specification 4.x (see section
-                                            // 3.6). 0 1-bit or 4-bit Data width
-                                            // (DAT[0] used MMC SD cards) 1
-                                            // 8-bit Data width (DAT[7:0] used
-                                            // MMC cards)
-#define MMCHS_CON_MODE          0x00000010  // Mode select All cards These bits
-                                            // select between Functional mode
-                                            // and SYSTEST mode. 0 Functional
-                                            // mode. Transfers to the
-                                            // MMC/SD/SDIO cards follow the card
-                                            // protocol. MMC clock is enabled.
-                                            // MMC/SD transfers are operated
-                                            // under the control of the CMD
-                                            // register. 1 SYSTEST mode The
-                                            // signal pins are configured as
-                                            // general-purpose input/output and
-                                            // the 1024-byte buffer is
-                                            // configured as a stack memory
-                                            // accessible only by the local host
-                                            // or system DMA. The pins retain
-                                            // their default type (input output
-                                            // or in-out). SYSTEST mode is
-                                            // operated under the control of the
-                                            // SYSTEST register.
-#define MMCHS_CON_STR           0x00000008  // Stream command Only for MMC
-                                            // cards. This bit must be set to 1
-                                            // only for the stream data
-                                            // transfers (read or write) of the
-                                            // adtc commands. Stream read is a
-                                            // class 1 command (CMD11:
-                                            // READ_DAT_UNTIL_STOP). Stream
-                                            // write is a class 3 command
-                                            // (CMD20: WRITE_DAT_UNTIL_STOP). 0
-                                            // Block oriented data transfer 1
-                                            // Stream oriented data transfer
-#define MMCHS_CON_HR            0x00000004  // Broadcast host response Only for
-                                            // MMC cards. This register is used
-                                            // to force the host to generate a
-                                            // 48-bit response for bc command
-                                            // type. "It can be used to
-                                            // terminate the interrupt mode by
-                                            // generating a CMD40 response by
-                                            // the core (see section 4.3
-                                            // ""Interrupt Mode"" in the MMC [1]
-                                            // specification). In order to have
-                                            // the host response to be generated
-                                            // in open drain mode the register
-                                            // MMCHS_CON[OD] must be set to 1."
-                                            // When MMCHS_CON[CEATA] is set to 1
-                                            // and MMCHS_ARG set to 0x00000000
-                                            // when writing 0x00000000 into
-                                            // MMCHS_CMD register the host
-                                            // controller performs a 'command
-                                            // completion signal disable' token
-                                            // i.e. CMD line held to '0' during
-                                            // 47 cycles followed by a 1. 0 The
-                                            // host does not generate a 48-bit
-                                            // response instead of a command. 1
-                                            // The host generates a 48-bit
-                                            // response instead of a command or
-                                            // a command completion signal
-                                            // disable token.
-#define MMCHS_CON_INIT          0x00000002  // Send initialization stream All
-                                            // cards. When this bit is set to 1
-                                            // and the card is idle an
-                                            // initialization sequence is sent
-                                            // to the card. "An initialization
-                                            // sequence consists of setting the
-                                            // CMD line to 1 during 80 clock
-                                            // cycles. The initialisation
-                                            // sequence is mandatory - but it is
-                                            // not required to do it through
-                                            // this bit - this bit makes it
-                                            // easier. Clock divider
-                                            // (MMCHS_SYSCTL[CLKD]) should be
-                                            // set to ensure that 80 clock
-                                            // periods are greater than 1ms.
-                                            // (see section 9.3 ""Power-Up"" in
-                                            // the MMC card specification [1] or
-                                            // section 6.4 in the SD card
-                                            // specification [2])." Note: in
-                                            // this mode there is no command
-                                            // sent to the card and no response
-                                            // is expected 0 The host does not
-                                            // send an initialization sequence.
-                                            // 1 The host sends an
-                                            // initialization sequence.
-#define MMCHS_CON_OD            0x00000001  // Card open drain mode. Only for
-                                            // MMC cards. This bit must be set
-                                            // to 1 for MMC card commands 1 2 3
-                                            // and 40 and if the MMC card bus is
-                                            // operating in open-drain mode
-                                            // during the response phase to the
-                                            // command sent. Typically during
-                                            // card identification mode when the
-                                            // card is either in idle ready or
-                                            // ident state. It is also necessary
-                                            // to set this bit to 1 for a
-                                            // broadcast host response (see
-                                            // Broadcast host response register
-                                            // MMCHS_CON[HR]) 0 No Open Drain 1
-                                            // Open Drain or Broadcast host
-                                            // response
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_PWCNT register.
-//
-//******************************************************************************
-#define MMCHS_PWCNT_PWRCNT_M    0x0000FFFF  // Power counter register. This
-                                            // register is used to introduce a
-                                            // delay between the PAD ACTIVE pin
-                                            // assertion and the command issued.
-                                            // 0x0000 No additional delay added
-                                            // 0x0001 TCF delay (card clock
-                                            // period) 0x0002 TCF x 2 delay
-                                            // (card clock period) 0xFFFE TCF x
-                                            // 65534 delay (card clock period)
-                                            // 0xFFFF TCF x 65535 delay (card
-                                            // clock period)
-#define MMCHS_PWCNT_PWRCNT_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_BLK register.
-//
-//******************************************************************************
-#define MMCHS_BLK_NBLK_M        0xFFFF0000  // Blocks count for current
-                                            // transfer This register is enabled
-                                            // when Block count Enable
-                                            // (MMCHS_CMD[BCE]) is set to 1 and
-                                            // is valid only for multiple block
-                                            // transfers. Setting the block
-                                            // count to 0 results no data blocks
-                                            // being transferred. Note: The host
-                                            // controller decrements the block
-                                            // count after each block transfer
-                                            // and stops when the count reaches
-                                            // zero. This register can be
-                                            // accessed only if no transaction
-                                            // is executing (i.e after a
-                                            // transaction has stopped). Read
-                                            // operations during transfers may
-                                            // return an invalid value and write
-                                            // operation will be ignored. In
-                                            // suspend context the number of
-                                            // blocks yet to be transferred can
-                                            // be determined by reading this
-                                            // register. When restoring transfer
-                                            // context prior to issuing a Resume
-                                            // command The local host shall
-                                            // restore the previously saved
-                                            // block count. 0x0000 Stop count
-                                            // 0x0001 1 block 0x0002 2 blocks
-                                            // 0xFFFF 65535 blocks
-#define MMCHS_BLK_NBLK_S        16
-#define MMCHS_BLK_BLEN_M        0x00000FFF  // Transfer Block Size. This
-                                            // register specifies the block size
-                                            // for block data transfers. Read
-                                            // operations during transfers may
-                                            // return an invalid value and write
-                                            // operations are ignored. When a
-                                            // CMD12 command is issued to stop
-                                            // the transfer a read of the BLEN
-                                            // field after transfer completion
-                                            // (MMCHS_STAT[TC] set to 1) will
-                                            // not return the true byte number
-                                            // of data length while the stop
-                                            // occurs but the value written in
-                                            // this register before transfer is
-                                            // launched. 0x000 No data transfer
-                                            // 0x001 1 byte block length 0x002 2
-                                            // bytes block length 0x003 3 bytes
-                                            // block length 0x1FF 511 bytes
-                                            // block length 0x200 512 bytes
-                                            // block length 0x7FF 2047 bytes
-                                            // block length 0x800 2048 bytes
-                                            // block length
-#define MMCHS_BLK_BLEN_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ARG register.
-//
-//******************************************************************************
-#define MMCHS_ARG_ARG_M         0xFFFFFFFF  // Command argument bits [31:0]
-#define MMCHS_ARG_ARG_S         0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CMD register.
-//
-//******************************************************************************
-#define MMCHS_CMD_INDX_M        0x3F000000  // Command index Binary encoded
-                                            // value from 0 to 63 specifying the
-                                            // command number send to card 0x00
-                                            // CMD0 or ACMD0 0x01 CMD1 or ACMD1
-                                            // 0x02 CMD2 or ACMD2 0x03 CMD3 or
-                                            // ACMD3 0x04 CMD4 or ACMD4 0x05
-                                            // CMD5 or ACMD5 0x06 CMD6 or ACMD6
-                                            // 0x07 CMD7 or ACMD7 0x08 CMD8 or
-                                            // ACMD8 0x09 CMD9 or ACMD9 0x0A
-                                            // CMD10 or ACMD10 0x0B CMD11 or
-                                            // ACMD11 0x0C CMD12 or ACMD12 0x0D
-                                            // CMD13 or ACMD13 0x0E CMD14 or
-                                            // ACMD14 0x0F CMD15 or ACMD15 0x10
-                                            // CMD16 or ACMD16 0x11 CMD17 or
-                                            // ACMD17 0x12 CMD18 or ACMD18 0x13
-                                            // CMD19 or ACMD19 0x14 CMD20 or
-                                            // ACMD20 0x15 CMD21 or ACMD21 0x16
-                                            // CMD22 or ACMD22 0x17 CMD23 or
-                                            // ACMD23 0x18 CMD24 or ACMD24 0x19
-                                            // CMD25 or ACMD25 0x1A CMD26 or
-                                            // ACMD26 0x1B CMD27 or ACMD27 0x1C
-                                            // CMD28 or ACMD28 0x1D CMD29 or
-                                            // ACMD29 0x1E CMD30 or ACMD30 0x1F
-                                            // CMD31 or ACMD31 0x20 CMD32 or
-                                            // ACMD32 0x21 CMD33 or ACMD33 0x22
-                                            // CMD34 or ACMD34 0x23 CMD35 or
-                                            // ACMD35 0x24 CMD36 or ACMD36 0x25
-                                            // CMD37 or ACMD37 0x26 CMD38 or
-                                            // ACMD38 0x27 CMD39 or ACMD39 0x28
-                                            // CMD40 or ACMD40 0x29 CMD41 or
-                                            // ACMD41 0x2A CMD42 or ACMD42 0x2B
-                                            // CMD43 or ACMD43 0x2C CMD44 or
-                                            // ACMD44 0x2D CMD45 or ACMD45 0x2E
-                                            // CMD46 or ACMD46 0x2F CMD47 or
-                                            // ACMD47 0x30 CMD48 or ACMD48 0x31
-                                            // CMD49 or ACMD49 0x32 CMD50 or
-                                            // ACMD50 0x33 CMD51 or ACMD51 0x34
-                                            // CMD52 or ACMD52 0x35 CMD53 or
-                                            // ACMD53 0x36 CMD54 or ACMD54 0x37
-                                            // CMD55 or ACMD55 0x38 CMD56 or
-                                            // ACMD56 0x39 CMD57 or ACMD57 0x3A
-                                            // CMD58 or ACMD58 0x3B CMD59 or
-                                            // ACMD59 0x3C CMD60 or ACMD60 0x3D
-                                            // CMD61 or ACMD61 0x3E CMD62 or
-                                            // ACMD62 0x3F CMD63 or ACMD63
-#define MMCHS_CMD_INDX_S        24
-#define MMCHS_CMD_CMD_TYPE_M    0x00C00000  // Command type This register
-                                            // specifies three types of special
-                                            // command: Suspend Resume and
-                                            // Abort. These bits shall be set to
-                                            // 00b for all other commands. 0x0
-                                            // Others Commands 0x1 "CMD52 for
-                                            // writing ""Bus Suspend"" in CCCR"
-                                            // 0x2 "CMD52 for writing ""Function
-                                            // Select"" in CCCR" 0x3 "Abort
-                                            // command CMD12 CMD52 for writing
-                                            // "" I/O Abort"" in CCCR"
-#define MMCHS_CMD_CMD_TYPE_S    22
-#define MMCHS_CMD_DP            0x00200000  // Data present select This
-                                            // register indicates that data is
-                                            // present and DAT line shall be
-                                            // used. It must be set to 0 in the
-                                            // following conditions: - command
-                                            // using only CMD line - command
-                                            // with no data transfer but using
-                                            // busy signal on DAT[0] - Resume
-                                            // command 0 Command with no data
-                                            // transfer 1 Command with data
-                                            // transfer
-#define MMCHS_CMD_CICE          0x00100000  // Command Index check enable This
-                                            // bit must be set to 1 to enable
-                                            // index check on command response
-                                            // to compare the index field in the
-                                            // response against the index of the
-                                            // command. If the index is not the
-                                            // same in the response as in the
-                                            // command it is reported as a
-                                            // command index error
-                                            // (MMCHS_STAT[CIE] set to1) Note:
-                                            // The register CICE cannot be
-                                            // configured for an Auto CMD12 then
-                                            // index check is automatically
-                                            // checked when this command is
-                                            // issued. 0 Index check disable 1
-                                            // Index check enable
-#define MMCHS_CMD_CCCE          0x00080000  // Command CRC check enable This
-                                            // bit must be set to 1 to enable
-                                            // CRC7 check on command response to
-                                            // protect the response against
-                                            // transmission errors on the bus.
-                                            // If an error is detected it is
-                                            // reported as a command CRC error
-                                            // (MMCHS_STAT[CCRC] set to 1).
-                                            // Note: The register CCCE cannot be
-                                            // configured for an Auto CMD12 and
-                                            // then CRC check is automatically
-                                            // checked when this command is
-                                            // issued. 0 CRC7 check disable 1
-                                            // CRC7 check enable
-#define MMCHS_CMD_RSP_TYPE_M    0x00030000  // Response type This bits defines
-                                            // the response type of the command
-                                            // 0x0 No response 0x1 Response
-                                            // Length 136 bits 0x2 Response
-                                            // Length 48 bits 0x3 Response
-                                            // Length 48 bits with busy after
-                                            // response
-#define MMCHS_CMD_RSP_TYPE_S    16
-#define MMCHS_CMD_MSBS          0x00000020  // Multi/Single block select This
-                                            // bit must be set to 1 for data
-                                            // transfer in case of multi block
-                                            // command. For any others command
-                                            // this bit shall be set to 0. 0
-                                            // Single block. If this bit is 0 it
-                                            // is not necessary to set the
-                                            // register MMCHS_BLK[NBLK]. 1 Multi
-                                            // block. When Block Count is
-                                            // disabled (MMCHS_CMD[BCE] is set
-                                            // to 0) in Multiple block transfers
-                                            // (MMCHS_CMD[MSBS] is set to 1) the
-                                            // module can perform infinite
-                                            // transfer.
-#define MMCHS_CMD_DDIR          0x00000010  // Data transfer Direction Select
-                                            // This bit defines either data
-                                            // transfer will be a read or a
-                                            // write. 0 Data Write (host to
-                                            // card) 1 Data Read (card to host)
-#define MMCHS_CMD_ACEN          0x00000004  // Auto CMD12 Enable SD card only.
-                                            // When this bit is set to 1 the
-                                            // host controller issues a CMD12
-                                            // automatically after the transfer
-                                            // completion of the last block. The
-                                            // Host Driver shall not set this
-                                            // bit to issue commands that do not
-                                            // require CMD12 to stop data
-                                            // transfer. In particular secure
-                                            // commands do not require CMD12. 0
-                                            // Auto CMD12 disable 1 Auto CMD12
-                                            // enable or CCS detection enabled.
-#define MMCHS_CMD_BCE           0x00000002  // Block Count Enable Multiple
-                                            // block transfers only. This bit is
-                                            // used to enable the block count
-                                            // register (MMCHS_BLK[NBLK]). When
-                                            // Block Count is disabled
-                                            // (MMCHS_CMD[BCE] is set to 0) in
-                                            // Multiple block transfers
-                                            // (MMCHS_CMD[MSBS] is set to 1) the
-                                            // module can perform infinite
-                                            // transfer. 0 Block count disabled
-                                            // for infinite transfer. 1 Block
-                                            // count enabled for multiple block
-                                            // transfer with known number of
-                                            // blocks
-#define MMCHS_CMD_DE            0x00000001  // DMA Enable This bit is used to
-                                            // enable DMA mode for host data
-                                            // access. 0 DMA mode disable 1 DMA
-                                            // mode enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP10 register.
-//
-//******************************************************************************
-#define MMCHS_RSP10_RSP1_M      0xFFFF0000  // Command Response [31:16]
-#define MMCHS_RSP10_RSP1_S      16
-#define MMCHS_RSP10_RSP0_M      0x0000FFFF  // Command Response [15:0]
-#define MMCHS_RSP10_RSP0_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP32 register.
-//
-//******************************************************************************
-#define MMCHS_RSP32_RSP3_M      0xFFFF0000  // Command Response [63:48]
-#define MMCHS_RSP32_RSP3_S      16
-#define MMCHS_RSP32_RSP2_M      0x0000FFFF  // Command Response [47:32]
-#define MMCHS_RSP32_RSP2_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP54 register.
-//
-//******************************************************************************
-#define MMCHS_RSP54_RSP5_M      0xFFFF0000  // Command Response [95:80]
-#define MMCHS_RSP54_RSP5_S      16
-#define MMCHS_RSP54_RSP4_M      0x0000FFFF  // Command Response [79:64]
-#define MMCHS_RSP54_RSP4_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_RSP76 register.
-//
-//******************************************************************************
-#define MMCHS_RSP76_RSP7_M      0xFFFF0000  // Command Response [127:112]
-#define MMCHS_RSP76_RSP7_S      16
-#define MMCHS_RSP76_RSP6_M      0x0000FFFF  // Command Response [111:96]
-#define MMCHS_RSP76_RSP6_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_DATA register.
-//
-//******************************************************************************
-#define MMCHS_DATA_DATA_M       0xFFFFFFFF  // Data Register [31:0] In
-                                            // functional mode (MMCHS_CON[MODE]
-                                            // set to the default value 0) A
-                                            // read access to this register is
-                                            // allowed only when the buffer read
-                                            // enable status is set to 1
-                                            // (MMCHS_PSTATE[BRE]) otherwise a
-                                            // bad access (MMCHS_STAT[BADA]) is
-                                            // signaled. A write access to this
-                                            // register is allowed only when the
-                                            // buffer write enable status is set
-                                            // to 1(MMCHS_STATE[BWE]) otherwise
-                                            // a bad access (MMCHS_STAT[BADA])
-                                            // is signaled and the data is not
-                                            // written.
-#define MMCHS_DATA_DATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_PSTATE register.
-//
-//******************************************************************************
-#define MMCHS_PSTATE_CLEV       0x01000000
-#define MMCHS_PSTATE_DLEV_M     0x00F00000  // DAT[3:0] line signal level
-                                            // DAT[3] => bit 23 DAT[2] => bit 22
-                                            // DAT[1] => bit 21 DAT[0] => bit 20
-                                            // This status is used to check DAT
-                                            // line level to recover from errors
-                                            // and for debugging. This is
-                                            // especially useful in detecting
-                                            // the busy signal level from
-                                            // DAT[0]. The value of these
-                                            // registers after reset depends on
-                                            // the DAT lines level at that time.
-#define MMCHS_PSTATE_DLEV_S     20
-#define MMCHS_PSTATE_WP         0x00080000
-#define MMCHS_PSTATE_CDPL       0x00040000
-#define MMCHS_PSTATE_CSS        0x00020000
-#define MMCHS_PSTATE_CINS       0x00010000
-#define MMCHS_PSTATE_BRE        0x00000800
-#define MMCHS_PSTATE_BWE        0x00000400
-#define MMCHS_PSTATE_RTA        0x00000200
-#define MMCHS_PSTATE_WTA        0x00000100
-#define MMCHS_PSTATE_DLA        0x00000004
-#define MMCHS_PSTATE_DATI       0x00000002
-#define MMCHS_PSTATE_CMDI       0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_HCTL register.
-//
-//******************************************************************************
-#define MMCHS_HCTL_OBWE         0x08000000  // Wakeup event enable for
-                                            // 'Out-of-Band' Interrupt. This bit
-                                            // enables wakeup events for
-                                            // 'Out-of-Band' assertion. Wakeup
-                                            // is generated if the wakeup
-                                            // feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). The
-                                            // write to this register is ignored
-                                            // when MMCHS_CON[OBIE] is not set.
-                                            // 0 Disable wakeup on 'Out-of-Band'
-                                            // Interrupt 1 Enable wakeup on
-                                            // 'Out-of-Band' Interrupt
-#define MMCHS_HCTL_REM          0x04000000  // Wakeup event enable on SD card
-                                            // removal This bit enables wakeup
-                                            // events for card removal
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card removal 1
-                                            // Enable wakeup on card removal
-#define MMCHS_HCTL_INS          0x02000000  // Wakeup event enable on SD card
-                                            // insertion This bit enables wakeup
-                                            // events for card insertion
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card insertion
-                                            // 1 Enable wakeup on card insertion
-#define MMCHS_HCTL_IWE          0x01000000  // Wakeup event enable on SD card
-                                            // interrupt This bit enables wakeup
-                                            // events for card interrupt
-                                            // assertion. Wakeup is generated if
-                                            // the wakeup feature is enabled
-                                            // (MMCHS_SYSCONFIG[ENAWAKEUP]). 0
-                                            // Disable wakeup on card interrupt
-                                            // 1 Enable wakeup on card interrupt
-#define MMCHS_HCTL_IBG          0x00080000  // Interrupt block at gap This bit
-                                            // is valid only in 4-bit mode of
-                                            // SDIO card to enable interrupt
-                                            // detection in the interrupt cycle
-                                            // at block gap for a multiple block
-                                            // transfer. For MMC cards and for
-                                            // SD card this bit should be set to
-                                            // 0. 0 Disable interrupt detection
-                                            // at the block gap in 4-bit mode 1
-                                            // Enable interrupt detection at the
-                                            // block gap in 4-bit mode
-#define MMCHS_HCTL_RWC          0x00040000  // Read wait control The read wait
-                                            // function is optional only for
-                                            // SDIO cards. If the card supports
-                                            // read wait this bit must be
-                                            // enabled then requesting a stop at
-                                            // block gap (MMCHS_HCTL[SBGR])
-                                            // generates a read wait period
-                                            // after the current end of block.
-                                            // Be careful if read wait is not
-                                            // supported it may cause a conflict
-                                            // on DAT line. 0 Disable Read Wait
-                                            // Control. Suspend/Resume cannot be
-                                            // supported. 1 Enable Read Wait
-                                            // Control
-#define MMCHS_HCTL_CR           0x00020000  // Continue request This bit is
-                                            // used to restart a transaction
-                                            // that was stopped by requesting a
-                                            // stop at block gap
-                                            // (MMCHS_HCTL[SBGR]). Set this bit
-                                            // to 1 restarts the transfer. The
-                                            // bit is automatically set to 0 by
-                                            // the host controller when transfer
-                                            // has restarted i.e DAT line is
-                                            // active (MMCHS_PSTATE[DLA]) or
-                                            // transferring data
-                                            // (MMCHS_PSTATE[WTA]). The Stop at
-                                            // block gap request must be
-                                            // disabled (MMCHS_HCTL[SBGR]=0)
-                                            // before setting this bit. 0 No
-                                            // affect 1 transfer restart
-#define MMCHS_HCTL_SBGR         0x00010000  // Stop at block gap request This
-                                            // bit is used to stop executing a
-                                            // transaction at the next block
-                                            // gap. The transfer can restart
-                                            // with a continue request
-                                            // (MMHS_HCTL[CR]) or during a
-                                            // suspend/resume sequence. In case
-                                            // of read transfer the card must
-                                            // support read wait control. In
-                                            // case of write transfer the host
-                                            // driver shall set this bit after
-                                            // all block data written. Until the
-                                            // transfer completion
-                                            // (MMCHS_STAT[TC] set to 1) the
-                                            // host driver shall leave this bit
-                                            // set to 1. If this bit is set the
-                                            // local host shall not write to the
-                                            // data register (MMCHS_DATA). 0
-                                            // Transfer mode 1 Stop at block gap
-#define MMCHS_HCTL_SDVS_M       0x00000E00  // SD bus voltage select All cards.
-                                            // The host driver should set to
-                                            // these bits to select the voltage
-                                            // level for the card according to
-                                            // the voltage supported by the
-                                            // system (MMCHS_CAPA[VS18VS30VS33])
-                                            // before starting a transfer. 0x5
-                                            // 1.8V (Typical) 0x6 3.0V (Typical)
-                                            // 0x7 3.3V (Typical)
-#define MMCHS_HCTL_SDVS_S       9
-#define MMCHS_HCTL_SDBP         0x00000100  // SD bus power Before setting this
-                                            // bit the host driver shall select
-                                            // the SD bus voltage
-                                            // (MMCHS_HCTL[SDVS]). If the host
-                                            // controller detects the No card
-                                            // state this bit is automatically
-                                            // set to 0. If the module is power
-                                            // off a write in the command
-                                            // register (MMCHS_CMD) will not
-                                            // start the transfer. A write to
-                                            // this bit has no effect if the
-                                            // selected SD bus voltage
-                                            // MMCHS_HCTL[SDVS] is not supported
-                                            // according to capability register
-                                            // (MMCHS_CAPA[VS*]). 0 Power off 1
-                                            // Power on
-#define MMCHS_HCTL_CDSS         0x00000080  // Card Detect Signal Selection
-                                            // This bit selects source for the
-                                            // card detection.When the source
-                                            // for the card detection is
-                                            // switched the interrupt should be
-                                            // disabled during the switching
-                                            // period by clearing the Interrupt
-                                            // Status/Signal Enable register in
-                                            // order to mask unexpected
-                                            // interrupt being caused by the
-                                            // glitch. The Interrupt
-                                            // Status/Signal Enable should be
-                                            // disabled during over the period
-                                            // of debouncing. 0 SDCD# is
-                                            // selected (for normal use) 1 The
-                                            // Card Detect Test Level is
-                                            // selected (for test purpose)
-#define MMCHS_HCTL_CDTL         0x00000040  // Card Detect Test Level: This bit
-                                            // is enabled while the Card Detect
-                                            // Signal Selection is set to 1 and
-                                            // it indicates card inserted or
-                                            // not. 0 No Card 1 Card Inserted
-#define MMCHS_HCTL_DMAS_M       0x00000018  // DMA Select Mode: One of
-                                            // supported DMA modes can be
-                                            // selected. The host driver shall
-                                            // check support of DMA modes by
-                                            // referring the Capabilities
-                                            // register. Use of selected DMA is
-                                            // determined by DMA Enable of the
-                                            // Transfer Mode register. This
-                                            // register is only meaningful when
-                                            // MADMA_EN is set to 1. When
-                                            // MADMA_EN is set to 0 the bit
-                                            // field is read only and returned
-                                            // value is 0. 0x0 Reserved 0x1
-                                            // Reserved 0x2 32-bit Address ADMA2
-                                            // is selected 0x3 Reserved
-#define MMCHS_HCTL_DMAS_S       3
-#define MMCHS_HCTL_HSPE         0x00000004  // High Speed Enable: Before
-                                            // setting this bit the Host Driver
-                                            // shall check the High Speed
-                                            // Support in the Capabilities
-                                            // register. If this bit is set to 0
-                                            // (default) the Host Controller
-                                            // outputs CMD line and DAT lines at
-                                            // the falling edge of the SD Clock.
-                                            // If this bit is set to 1 the Host
-                                            // Controller outputs CMD line and
-                                            // DAT lines at the rising edge of
-                                            // the SD Clock.This bit shall not
-                                            // be set when dual data rate mode
-                                            // is activated in MMCHS_CON[DDR]. 0
-                                            // Normal speed mode 1 High speed
-                                            // mode
-#define MMCHS_HCTL_DTW          0x00000002  // Data transfer width For MMC card
-                                            // this bit must be set following a
-                                            // valid SWITCH command (CMD6) with
-                                            // the correct value and extend CSD
-                                            // index written in the argument.
-                                            // Prior to this command the MMC
-                                            // card configuration register (CSD
-                                            // and EXT_CSD) must be verified for
-                                            // compliance with MMC standard
-                                            // specification 4.x (see section
-                                            // 3.6). This register has no effect
-                                            // when the MMC 8-bit mode is
-                                            // selected (register MMCHS_CON[DW8]
-                                            // set to1 ) For SD/SDIO cards this
-                                            // bit must be set following a valid
-                                            // SET_BUS_WIDTH command (ACMD6)
-                                            // with the value written in bit 1
-                                            // of the argument. Prior to this
-                                            // command the SD card configuration
-                                            // register (SCR) must be verified
-                                            // for the supported bus width by
-                                            // the SD card. 0 1-bit Data width
-                                            // (DAT[0] used) 1 4-bit Data width
-                                            // (DAT[3:0] used)
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_SYSCTL register.
-//
-//******************************************************************************
-#define MMCHS_SYSCTL_SRD        0x04000000  // Software reset for DAT line This
-                                            // bit is set to 1 for reset and
-                                            // released to 0 when completed. DAT
-                                            // finite state machine in both
-                                            // clock domain are also reset. Here
-                                            // below are the registers cleared
-                                            // by MMCHS_SYSCTL[SRD]: #VALUE! -
-                                            // MMCHS_PSTATE: BRE BWE RTA WTA DLA
-                                            // and DATI - MMCHS_HCTL: SBGR and
-                                            // CR - MMCHS_STAT: BRR BWR BGE and
-                                            // TC OCP and MMC buffer data
-                                            // management is reinitialized. 0
-                                            // Reset completed 1 Software reset
-                                            // for DAT line
-#define MMCHS_SYSCTL_SRC        0x02000000  // Software reset for CMD line This
-                                            // bit is set to 1 for reset and
-                                            // released to 0 when completed. CMD
-                                            // finite state machine in both
-                                            // clock domain are also reset. Here
-                                            // below the registers cleared by
-                                            // MMCHS_SYSCTL[SRC]: -
-                                            // MMCHS_PSTATE: CMDI - MMCHS_STAT:
-                                            // CC OCP and MMC command status
-                                            // management is reinitialized. 0
-                                            // Reset completed 1 Software reset
-                                            // for CMD line
-#define MMCHS_SYSCTL_SRA        0x01000000  // Software reset for all This bit
-                                            // is set to 1 for reset and
-                                            // released to 0 when completed.
-                                            // This reset affects the entire
-                                            // host controller except for the
-                                            // card detection circuit and
-                                            // capabilities registers. 0 Reset
-                                            // completed 1 Software reset for
-                                            // all the design
-#define MMCHS_SYSCTL_DTO_M      0x000F0000  // Data timeout counter value and
-                                            // busy timeout. This value
-                                            // determines the interval by which
-                                            // DAT lines timeouts are detected.
-                                            // The host driver needs to set this
-                                            // bitfield based on - the maximum
-                                            // read access time (NAC) (Refer to
-                                            // the SD Specification Part1
-                                            // Physical Layer) - the data read
-                                            // access time values (TAAC and
-                                            // NSAC) in the card specific data
-                                            // register (CSD) of the card - the
-                                            // timeout clock base frequency
-                                            // (MMCHS_CAPA[TCF]). If the card
-                                            // does not respond within the
-                                            // specified number of cycles a data
-                                            // timeout error occurs
-                                            // (MMCHS_STA[DTO]). The
-                                            // MMCHS_SYSCTL[DTO] register is
-                                            // also used to check busy duration
-                                            // to generate busy timeout for
-                                            // commands with busy response or
-                                            // for busy programming during a
-                                            // write command. Timeout on CRC
-                                            // status is generated if no CRC
-                                            // token is present after a block
-                                            // write. 0x0 TCF x 2^13 0x1 TCF x
-                                            // 2^14 0xE TCF x 2^27 0xF Reserved
-#define MMCHS_SYSCTL_DTO_S      16
-#define MMCHS_SYSCTL_CLKD_M     0x0000FFC0  // Clock frequency select These
-                                            // bits define the ratio between a
-                                            // reference clock frequency (system
-                                            // dependant) and the output clock
-                                            // frequency on the CLK pin of
-                                            // either the memory card (MMC SD or
-                                            // SDIO). 0x000 Clock Ref bypass
-                                            // 0x001 Clock Ref bypass 0x002
-                                            // Clock Ref / 2 0x003 Clock Ref / 3
-                                            // 0x3FF Clock Ref / 1023
-#define MMCHS_SYSCTL_CLKD_S     6
-#define MMCHS_SYSCTL_CEN        0x00000004  // Clock enable This bit controls
-                                            // if the clock is provided to the
-                                            // card or not. 0 The clock is not
-                                            // provided to the card . Clock
-                                            // frequency can be changed . 1 The
-                                            // clock is provided to the card and
-                                            // can be automatically gated when
-                                            // MMCHS_SYSCONFIG[AUTOIDLE] is set
-                                            // to 1 (default value) . The host
-                                            // driver shall wait to set this bit
-                                            // to 1 until the Internal clock is
-                                            // stable (MMCHS_SYSCTL[ICS]).
-#define MMCHS_SYSCTL_ICS        0x00000002
-#define MMCHS_SYSCTL_ICE        0x00000001  // Internal clock enable This
-                                            // register controls the internal
-                                            // clock activity. In very low power
-                                            // state the internal clock is
-                                            // stopped. Note: The activity of
-                                            // the debounce clock (used for
-                                            // wakeup events) and the OCP clock
-                                            // (used for reads and writes to the
-                                            // module register map) are not
-                                            // affected by this register. 0 The
-                                            // internal clock is stopped (very
-                                            // low power state). 1 The internal
-                                            // clock oscillates and can be
-                                            // automatically gated when
-                                            // MMCHS_SYSCONFIG[AUTOIDLE] is set
-                                            // to 1 (default value) .
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_STAT register.
-//
-//******************************************************************************
-#define MMCHS_STAT_BADA         0x20000000
-#define MMCHS_STAT_CERR         0x10000000
-#define MMCHS_STAT_ADMAE        0x02000000
-#define MMCHS_STAT_ACE          0x01000000
-#define MMCHS_STAT_DEB          0x00400000
-#define MMCHS_STAT_DCRC         0x00200000
-#define MMCHS_STAT_DTO          0x00100000
-#define MMCHS_STAT_CIE          0x00080000
-#define MMCHS_STAT_CEB          0x00040000
-#define MMCHS_STAT_CCRC         0x00020000
-#define MMCHS_STAT_CTO          0x00010000
-#define MMCHS_STAT_ERRI         0x00008000
-#define MMCHS_STAT_BSR          0x00000400
-#define MMCHS_STAT_OBI          0x00000200
-#define MMCHS_STAT_CIRQ         0x00000100
-#define MMCHS_STAT_CREM         0x00000080
-#define MMCHS_STAT_CINS         0x00000040
-#define MMCHS_STAT_BRR          0x00000020
-#define MMCHS_STAT_BWR          0x00000010
-#define MMCHS_STAT_DMA          0x00000008
-#define MMCHS_STAT_BGE          0x00000004
-#define MMCHS_STAT_TC           0x00000002
-#define MMCHS_STAT_CC           0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_IE register.
-//
-//******************************************************************************
-#define MMCHS_IE_BADA_ENABLE    0x20000000  // Bad access to data space
-                                            // Interrupt Enable 0 Masked 1
-                                            // Enabled
-#define MMCHS_IE_CERR_ENABLE    0x10000000  // Card error interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_ADMAE_ENABLE   0x02000000  // ADMA error Interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_ACE_ENABLE     0x01000000  // Auto CMD12 error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DEB_ENABLE     0x00400000  // Data end bit error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DCRC_ENABLE    0x00200000  // Data CRC error Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_DTO_ENABLE     0x00100000  // Data timeout error Interrupt
-                                            // Enable 0 The data timeout
-                                            // detection is deactivated. The
-                                            // host controller provides the
-                                            // clock to the card until the card
-                                            // sends the data or the transfer is
-                                            // aborted. 1 The data timeout
-                                            // detection is enabled.
-#define MMCHS_IE_CIE_ENABLE     0x00080000  // Command index error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CEB_ENABLE     0x00040000  // Command end bit error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CCRC_ENABLE    0x00020000  // Command CRC error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CTO_ENABLE     0x00010000  // Command timeout error Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_NULL           0x00008000  // Fixed to 0 The host driver shall
-                                            // control error interrupts using
-                                            // the Error Interrupt Signal Enable
-                                            // register. Writes to this bit are
-                                            // ignored
-#define MMCHS_IE_BSR_ENABLE     0x00000400  // Boot status interrupt Enable A
-                                            // write to this register when
-                                            // MMCHS_CON[BOOT_ACK] is set to 0x0
-                                            // is ignored. 0 Masked 1 Enabled
-#define MMCHS_IE_OBI_ENABLE     0x00000200  // Out-of-Band interrupt Enable A
-                                            // write to this register when
-                                            // MMCHS_CON[OBIE] is set to '0' is
-                                            // ignored. 0 Masked 1 Enabled
-#define MMCHS_IE_CIRQ_ENABLE    0x00000100  // Card interrupt Enable A clear of
-                                            // this bit also clears the
-                                            // corresponding status bit. During
-                                            // 1-bit mode if the interrupt
-                                            // routine doesn't remove the source
-                                            // of a card interrupt in the SDIO
-                                            // card the status bit is reasserted
-                                            // when this bit is set to 1. 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_CREM_ENABLE    0x00000080  // Card removal Interrupt Enable 0
-                                            // Masked 1 Enabled
-#define MMCHS_IE_CINS_ENABLE    0x00000040  // Card insertion Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_BRR_ENABLE     0x00000020  // Buffer Read Ready Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_BWR_ENABLE     0x00000010  // Buffer Write Ready Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_DMA_ENABLE     0x00000008  // DMA interrupt Enable 0 Masked 1
-                                            // Enabled
-#define MMCHS_IE_BGE_ENABLE     0x00000004  // Block Gap Event Interrupt Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_IE_TC_ENABLE      0x00000002  // Transfer completed Interrupt
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_IE_CC_ENABLE      0x00000001  // Command completed Interrupt
-                                            // Enable 0 Masked 1 Enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ISE register.
-//
-//******************************************************************************
-#define MMCHS_ISE_BADA_SIGEN    0x20000000  // Bad access to data space signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CERR_SIGEN    0x10000000  // Card error interrupt signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_ADMAE_SIGEN   0x02000000  // ADMA error signal status Enable
-                                            // 0 Masked 1 Enabled
-#define MMCHS_ISE_ACE_SIGEN     0x01000000  // Auto CMD12 error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DEB_SIGEN     0x00400000  // Data end bit error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DCRC_SIGEN    0x00200000  // Data CRC error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DTO_SIGEN     0x00100000  // Data timeout error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CIE_SIGEN     0x00080000  // Command index error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CEB_SIGEN     0x00040000  // Command end bit error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CCRC_SIGEN    0x00020000  // Command CRC error signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CTO_SIGEN     0x00010000  // Command timeout error signal
-                                            // status Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_NULL          0x00008000  // Fixed to 0 The host driver shall
-                                            // control error interrupts using
-                                            // the Error Interrupt Signal Enable
-                                            // register. Writes to this bit are
-                                            // ignored
-#define MMCHS_ISE_BSR_SIGEN     0x00000400  // Boot status signal status
-                                            // EnableA write to this register
-                                            // when MMCHS_CON[BOOT_ACK] is set
-                                            // to 0x0 is ignored. 0 Masked 1
-                                            // Enabled
-#define MMCHS_ISE_OBI_SIGEN     0x00000200  // Out-Of-Band Interrupt signal
-                                            // status Enable A write to this
-                                            // register when MMCHS_CON[OBIE] is
-                                            // set to '0' is ignored. 0 Masked 1
-                                            // Enabled
-#define MMCHS_ISE_CIRQ_SIGEN    0x00000100  // Card interrupt signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CREM_SIGEN    0x00000080  // Card removal signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CINS_SIGEN    0x00000040  // Card insertion signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BRR_SIGEN     0x00000020  // Buffer Read Ready signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BWR_SIGEN     0x00000010  // Buffer Write Ready signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_DMA_SIGEN     0x00000008  // DMA interrupt Signal status
-                                            // enable 0 Masked 1 Enabled
-#define MMCHS_ISE_BGE_SIGEN     0x00000004  // Black Gap Event signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_TC_SIGEN      0x00000002  // Transfer completed signal status
-                                            // Enable 0 Masked 1 Enabled
-#define MMCHS_ISE_CC_SIGEN      0x00000001  // Command completed signal status
-                                            // Enable 0 Masked 1 Enabled
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_AC12 register.
-//
-//******************************************************************************
-#define MMCHS_AC12_CNI          0x00000080
-#define MMCHS_AC12_ACIE         0x00000010
-#define MMCHS_AC12_ACEB         0x00000008
-#define MMCHS_AC12_ACCE         0x00000004
-#define MMCHS_AC12_ACTO         0x00000002
-#define MMCHS_AC12_ACNE         0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CAPA register.
-//
-//******************************************************************************
-#define MMCHS_CAPA_BIT64        0x10000000
-#define MMCHS_CAPA_VS18         0x04000000
-#define MMCHS_CAPA_VS30         0x02000000
-#define MMCHS_CAPA_VS33         0x01000000
-#define MMCHS_CAPA_SRS          0x00800000
-#define MMCHS_CAPA_DS           0x00400000
-#define MMCHS_CAPA_HSS          0x00200000
-#define MMCHS_CAPA_AD2S         0x00080000
-#define MMCHS_CAPA_MBL_M        0x00030000
-#define MMCHS_CAPA_MBL_S        16
-#define MMCHS_CAPA_BCF_M        0x00003F00
-#define MMCHS_CAPA_BCF_S        8
-#define MMCHS_CAPA_TCU          0x00000080
-#define MMCHS_CAPA_TCF_M        0x0000003F
-#define MMCHS_CAPA_TCF_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_CUR_CAPA register.
-//
-//******************************************************************************
-#define MMCHS_CUR_CAPA_CUR_1V8_M \
-                                0x00FF0000
-
-#define MMCHS_CUR_CAPA_CUR_1V8_S 16
-#define MMCHS_CUR_CAPA_CUR_3V0_M \
-                                0x0000FF00
-
-#define MMCHS_CUR_CAPA_CUR_3V0_S 8
-#define MMCHS_CUR_CAPA_CUR_3V3_M \
-                                0x000000FF
-
-#define MMCHS_CUR_CAPA_CUR_3V3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_FE register.
-//
-//******************************************************************************
-#define MMCHS_FE_FE_BADA        0x20000000
-#define MMCHS_FE_FE_CERR        0x10000000
-#define MMCHS_FE_FE_ADMAE       0x02000000
-#define MMCHS_FE_FE_ACE         0x01000000
-#define MMCHS_FE_FE_DEB         0x00400000
-#define MMCHS_FE_FE_DCRC        0x00200000
-#define MMCHS_FE_FE_DTO         0x00100000
-#define MMCHS_FE_FE_CIE         0x00080000
-#define MMCHS_FE_FE_CEB         0x00040000
-#define MMCHS_FE_FE_CCRC        0x00020000
-#define MMCHS_FE_FE_CTO         0x00010000
-#define MMCHS_FE_FE_CNI         0x00000080
-#define MMCHS_FE_FE_ACIE        0x00000010
-#define MMCHS_FE_FE_ACEB        0x00000008
-#define MMCHS_FE_FE_ACCE        0x00000004
-#define MMCHS_FE_FE_ACTO        0x00000002
-#define MMCHS_FE_FE_ACNE        0x00000001
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ADMAES register.
-//
-//******************************************************************************
-#define MMCHS_ADMAES_LME        0x00000004  // ADMA Length Mismatch Error: (1)
-                                            // While Block Count Enable being
-                                            // set the total data length
-                                            // specified by the Descriptor table
-                                            // is different from that specified
-                                            // by the Block Count and Block
-                                            // Length. (2) Total data length can
-                                            // not be divided by the block
-                                            // length. 0 No Error 1 Error
-#define MMCHS_ADMAES_AES_M      0x00000003  // ADMA Error State his field
-                                            // indicates the state of ADMA when
-                                            // error is occurred during ADMA
-                                            // data transfer. "This field never
-                                            // indicates ""10"" because ADMA
-                                            // never stops in this state." 0x0
-                                            // ST_STOP (Stop DMA)Contents of
-                                            // SYS_SDR register 0x1 ST_STOP
-                                            // (Stop DMA)Points the error
-                                            // descriptor 0x2 Never set this
-                                            // state(Not used) 0x3 ST_TFR
-                                            // (Transfer Data)Points the next of
-                                            // the error descriptor
-#define MMCHS_ADMAES_AES_S      0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_ADMASAL register.
-//
-//******************************************************************************
-#define MMCHS_ADMASAL_ADMA_A32B_M \
-                                0xFFFFFFFF  // ADMA System address 32 bits.This
-                                            // register holds byte address of
-                                            // executing command of the
-                                            // Descriptor table. 32-bit Address
-                                            // Descriptor uses lower 32-bit of
-                                            // this register. At the start of
-                                            // ADMA the Host Driver shall set
-                                            // start address of the Descriptor
-                                            // table. The ADMA increments this
-                                            // register address which points to
-                                            // next line when every fetching a
-                                            // Descriptor line. When the ADMA
-                                            // Error Interrupt is generated this
-                                            // register shall hold valid
-                                            // Descriptor address depending on
-                                            // the ADMA state. The Host Driver
-                                            // shall program Descriptor Table on
-                                            // 32-bit boundary and set 32-bit
-                                            // boundary address to this
-                                            // register. ADMA2 ignores lower
-                                            // 2-bit of this register and
-                                            // assumes it to be 00b.
-
-#define MMCHS_ADMASAL_ADMA_A32B_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the MMCHS_O_REV register.
-//
-//******************************************************************************
-#define MMCHS_REV_VREV_M        0xFF000000  // Vendor Version Number: IP
-                                            // revision [7:4] Major revision
-                                            // [3:0] Minor revision Examples:
-                                            // 0x10 for 1.0 0x21 for 2.1
-#define MMCHS_REV_VREV_S        24
-#define MMCHS_REV_SREV_M        0x00FF0000
-#define MMCHS_REV_SREV_S        16
-#define MMCHS_REV_SIS           0x00000001  // Slot Interrupt Status This
-                                            // status bit indicates the inverted
-                                            // state of interrupt signal for the
-                                            // module. By a power on reset or by
-                                            // setting a software reset for all
-                                            // (MMCHS_HCTL[SRA]) the interrupt
-                                            // signal shall be de-asserted and
-                                            // this status shall read 0.
-
-
-
-#endif // __HW_MMCHS_H__
diff --git a/ports/cc3200/hal/inc/hw_nvic.h b/ports/cc3200/hal/inc/hw_nvic.h
deleted file mode 100644
index 1545f226512e1..0000000000000
--- a/ports/cc3200/hal/inc/hw_nvic.h
+++ /dev/null
@@ -1,1710 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_nvic.h - Macros used when accessing the NVIC hardware.
-//
-//*****************************************************************************
-
-#ifndef __HW_NVIC_H__
-#define __HW_NVIC_H__
-
-//*****************************************************************************
-//
-// The following are defines for the NVIC register addresses.
-//
-//*****************************************************************************
-#define NVIC_INT_TYPE           0xE000E004  // Interrupt Controller Type Reg
-#define NVIC_ACTLR              0xE000E008  // Auxiliary Control
-#define NVIC_ST_CTRL            0xE000E010  // SysTick Control and Status
-                                            // Register
-#define NVIC_ST_RELOAD          0xE000E014  // SysTick Reload Value Register
-#define NVIC_ST_CURRENT         0xE000E018  // SysTick Current Value Register
-#define NVIC_ST_CAL             0xE000E01C  // SysTick Calibration Value Reg
-
-#define NVIC_EN0                0xE000E100  // Interrupt 0-31 Set Enable
-#define NVIC_EN1                0xE000E104  // Interrupt 32-54 Set Enable
-#define NVIC_EN2                0xE000E108  // Interrupt 64-95 Set Enable
-#define NVIC_EN3                0xE000E10C  // Interrupt 96-127 Set Enable
-#define NVIC_EN4                0xE000E110  // Interrupt 128-131 Set Enable
-#define NVIC_EN5                0xE000E114  // Interrupt 160-191 Set Enable
-
-#define NVIC_DIS0               0xE000E180  // Interrupt 0-31 Clear Enable
-#define NVIC_DIS1               0xE000E184  // Interrupt 32-54 Clear Enable
-
-#define NVIC_DIS2               0xE000E188  // Interrupt 64-95 Clear Enable
-#define NVIC_DIS3               0xE000E18C  // Interrupt 96-127 Clear Enable
-#define NVIC_DIS4               0xE000E190  // Interrupt 128-131 Clear Enable
-#define NVIC_DIS5               0xE000E194  // Interrupt 160-191 Clear Enable
-
-#define NVIC_PEND0              0xE000E200  // Interrupt 0-31 Set Pending
-#define NVIC_PEND1              0xE000E204  // Interrupt 32-54 Set Pending
-
-#define NVIC_PEND2              0xE000E208  // Interrupt 64-95 Set Pending
-#define NVIC_PEND3              0xE000E20C  // Interrupt 96-127 Set Pending
-#define NVIC_PEND4              0xE000E210  // Interrupt 128-131 Set Pending
-#define NVIC_PEND5              0xE000E214  // Interrupt 160-191 Set Pending
-
-#define NVIC_UNPEND0            0xE000E280  // Interrupt 0-31 Clear Pending
-#define NVIC_UNPEND1            0xE000E284  // Interrupt 32-54 Clear Pending
-
-#define NVIC_UNPEND2            0xE000E288  // Interrupt 64-95 Clear Pending
-#define NVIC_UNPEND3            0xE000E28C  // Interrupt 96-127 Clear Pending
-#define NVIC_UNPEND4            0xE000E290  // Interrupt 128-131 Clear Pending
-#define NVIC_UNPEND5            0xE000E294  // Interrupt 160-191 Clear Pending
-
-#define NVIC_ACTIVE0            0xE000E300  // Interrupt 0-31 Active Bit
-#define NVIC_ACTIVE1            0xE000E304  // Interrupt 32-54 Active Bit
-
-#define NVIC_ACTIVE2            0xE000E308  // Interrupt 64-95 Active Bit
-#define NVIC_ACTIVE3            0xE000E30C  // Interrupt 96-127 Active Bit
-#define NVIC_ACTIVE4            0xE000E310  // Interrupt 128-131 Active Bit
-#define NVIC_ACTIVE5            0xE000E314  // Interrupt 160-191 Active Bit
-
-#define NVIC_PRI0               0xE000E400  // Interrupt 0-3 Priority
-#define NVIC_PRI1               0xE000E404  // Interrupt 4-7 Priority
-#define NVIC_PRI2               0xE000E408  // Interrupt 8-11 Priority
-#define NVIC_PRI3               0xE000E40C  // Interrupt 12-15 Priority
-#define NVIC_PRI4               0xE000E410  // Interrupt 16-19 Priority
-#define NVIC_PRI5               0xE000E414  // Interrupt 20-23 Priority
-#define NVIC_PRI6               0xE000E418  // Interrupt 24-27 Priority
-#define NVIC_PRI7               0xE000E41C  // Interrupt 28-31 Priority
-#define NVIC_PRI8               0xE000E420  // Interrupt 32-35 Priority
-#define NVIC_PRI9               0xE000E424  // Interrupt 36-39 Priority
-#define NVIC_PRI10              0xE000E428  // Interrupt 40-43 Priority
-#define NVIC_PRI11              0xE000E42C  // Interrupt 44-47 Priority
-#define NVIC_PRI12              0xE000E430  // Interrupt 48-51 Priority
-#define NVIC_PRI13              0xE000E434  // Interrupt 52-53 Priority
-
-#define NVIC_PRI14              0xE000E438  // Interrupt 56-59 Priority
-#define NVIC_PRI15              0xE000E43C  // Interrupt 60-63 Priority
-#define NVIC_PRI16              0xE000E440  // Interrupt 64-67 Priority
-#define NVIC_PRI17              0xE000E444  // Interrupt 68-71 Priority
-#define NVIC_PRI18              0xE000E448  // Interrupt 72-75 Priority
-#define NVIC_PRI19              0xE000E44C  // Interrupt 76-79 Priority
-#define NVIC_PRI20              0xE000E450  // Interrupt 80-83 Priority
-#define NVIC_PRI21              0xE000E454  // Interrupt 84-87 Priority
-#define NVIC_PRI22              0xE000E458  // Interrupt 88-91 Priority
-#define NVIC_PRI23              0xE000E45C  // Interrupt 92-95 Priority
-#define NVIC_PRI24              0xE000E460  // Interrupt 96-99 Priority
-#define NVIC_PRI25              0xE000E464  // Interrupt 100-103 Priority
-#define NVIC_PRI26              0xE000E468  // Interrupt 104-107 Priority
-#define NVIC_PRI27              0xE000E46C  // Interrupt 108-111 Priority
-#define NVIC_PRI28              0xE000E470  // Interrupt 112-115 Priority
-#define NVIC_PRI29              0xE000E474  // Interrupt 116-119 Priority
-#define NVIC_PRI30              0xE000E478  // Interrupt 120-123 Priority
-#define NVIC_PRI31              0xE000E47C  // Interrupt 124-127 Priority
-#define NVIC_PRI32              0xE000E480  // Interrupt 128-131 Priority
-#define NVIC_PRI33              0xE000E484  // Interrupt 132-135 Priority
-#define NVIC_PRI34              0xE000E488  // Interrupt 136-139 Priority
-#define NVIC_PRI35              0xE000E48C  // Interrupt 140-143 Priority
-#define NVIC_PRI36              0xE000E490  // Interrupt 144-147 Priority
-#define NVIC_PRI37              0xE000E494  // Interrupt 148-151 Priority
-#define NVIC_PRI38              0xE000E498  // Interrupt 152-155 Priority
-#define NVIC_PRI39              0xE000E49C  // Interrupt 156-159 Priority
-#define NVIC_PRI40              0xE000E4A0  // Interrupt 160-163 Priority
-#define NVIC_PRI41              0xE000E4A4  // Interrupt 164-167 Priority
-#define NVIC_PRI42              0xE000E4A8  // Interrupt 168-171 Priority
-#define NVIC_PRI43              0xE000E4AC  // Interrupt 172-175 Priority
-#define NVIC_PRI44              0xE000E4B0  // Interrupt 176-179 Priority
-#define NVIC_PRI45              0xE000E4B4  // Interrupt 180-183 Priority
-#define NVIC_PRI46              0xE000E4B8  // Interrupt 184-187 Priority
-#define NVIC_PRI47              0xE000E4BC  // Interrupt 188-191 Priority
-#define NVIC_PRI48              0xE000E4C0  // Interrupt 192-195 Priority
-
-
-
-#define NVIC_CPUID              0xE000ED00  // CPU ID Base
-#define NVIC_INT_CTRL           0xE000ED04  // Interrupt Control and State
-#define NVIC_VTABLE             0xE000ED08  // Vector Table Offset
-#define NVIC_APINT              0xE000ED0C  // Application Interrupt and Reset
-                                            // Control
-#define NVIC_SYS_CTRL           0xE000ED10  // System Control
-#define NVIC_CFG_CTRL           0xE000ED14  // Configuration and Control
-#define NVIC_SYS_PRI1           0xE000ED18  // System Handler Priority 1
-#define NVIC_SYS_PRI2           0xE000ED1C  // System Handler Priority 2
-#define NVIC_SYS_PRI3           0xE000ED20  // System Handler Priority 3
-#define NVIC_SYS_HND_CTRL       0xE000ED24  // System Handler Control and State
-#define NVIC_FAULT_STAT         0xE000ED28  // Configurable Fault Status
-#define NVIC_HFAULT_STAT        0xE000ED2C  // Hard Fault Status
-#define NVIC_DEBUG_STAT         0xE000ED30  // Debug Status Register
-#define NVIC_MM_ADDR            0xE000ED34  // Memory Management Fault Address
-#define NVIC_FAULT_ADDR         0xE000ED38  // Bus Fault Address
-#define NVIC_MPU_TYPE           0xE000ED90  // MPU Type
-#define NVIC_MPU_CTRL           0xE000ED94  // MPU Control
-#define NVIC_MPU_NUMBER         0xE000ED98  // MPU Region Number
-#define NVIC_MPU_BASE           0xE000ED9C  // MPU Region Base Address
-#define NVIC_MPU_ATTR           0xE000EDA0  // MPU Region Attribute and Size
-#define NVIC_MPU_BASE1          0xE000EDA4  // MPU Region Base Address Alias 1
-#define NVIC_MPU_ATTR1          0xE000EDA8  // MPU Region Attribute and Size
-                                            // Alias 1
-#define NVIC_MPU_BASE2          0xE000EDAC  // MPU Region Base Address Alias 2
-#define NVIC_MPU_ATTR2          0xE000EDB0  // MPU Region Attribute and Size
-                                            // Alias 2
-#define NVIC_MPU_BASE3          0xE000EDB4  // MPU Region Base Address Alias 3
-#define NVIC_MPU_ATTR3          0xE000EDB8  // MPU Region Attribute and Size
-                                            // Alias 3
-#define NVIC_DBG_CTRL           0xE000EDF0  // Debug Control and Status Reg
-#define NVIC_DBG_XFER           0xE000EDF4  // Debug Core Reg. Transfer Select
-#define NVIC_DBG_DATA           0xE000EDF8  // Debug Core Register Data
-#define NVIC_DBG_INT            0xE000EDFC  // Debug Reset Interrupt Control
-#define NVIC_SW_TRIG            0xE000EF00  // Software Trigger Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_INT_TYPE register.
-//
-//*****************************************************************************
-#define NVIC_INT_TYPE_LINES_M   0x0000001F  // Number of interrupt lines (x32)
-#define NVIC_INT_TYPE_LINES_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTLR register.
-//
-//*****************************************************************************
-#define NVIC_ACTLR_DISFOLD      0x00000004  // Disable IT Folding
-#define NVIC_ACTLR_DISWBUF      0x00000002  // Disable Write Buffer
-#define NVIC_ACTLR_DISMCYC      0x00000001  // Disable Interrupts of Multiple
-                                            // Cycle Instructions
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_ST_CTRL_COUNT      0x00010000  // Count Flag
-#define NVIC_ST_CTRL_CLK_SRC    0x00000004  // Clock Source
-#define NVIC_ST_CTRL_INTEN      0x00000002  // Interrupt Enable
-#define NVIC_ST_CTRL_ENABLE     0x00000001  // Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_RELOAD register.
-//
-//*****************************************************************************
-#define NVIC_ST_RELOAD_M        0x00FFFFFF  // Reload Value
-#define NVIC_ST_RELOAD_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CURRENT
-// register.
-//
-//*****************************************************************************
-#define NVIC_ST_CURRENT_M       0x00FFFFFF  // Current Value
-#define NVIC_ST_CURRENT_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ST_CAL register.
-//
-//*****************************************************************************
-#define NVIC_ST_CAL_NOREF       0x80000000  // No reference clock
-#define NVIC_ST_CAL_SKEW        0x40000000  // Clock skew
-#define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  // 1ms reference value
-#define NVIC_ST_CAL_ONEMS_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN0 register.
-//
-//*****************************************************************************
-#define NVIC_EN0_INT_M          0xFFFFFFFF  // Interrupt Enable
-#define NVIC_EN0_INT0           0x00000001  // Interrupt 0 enable
-#define NVIC_EN0_INT1           0x00000002  // Interrupt 1 enable
-#define NVIC_EN0_INT2           0x00000004  // Interrupt 2 enable
-#define NVIC_EN0_INT3           0x00000008  // Interrupt 3 enable
-#define NVIC_EN0_INT4           0x00000010  // Interrupt 4 enable
-#define NVIC_EN0_INT5           0x00000020  // Interrupt 5 enable
-#define NVIC_EN0_INT6           0x00000040  // Interrupt 6 enable
-#define NVIC_EN0_INT7           0x00000080  // Interrupt 7 enable
-#define NVIC_EN0_INT8           0x00000100  // Interrupt 8 enable
-#define NVIC_EN0_INT9           0x00000200  // Interrupt 9 enable
-#define NVIC_EN0_INT10          0x00000400  // Interrupt 10 enable
-#define NVIC_EN0_INT11          0x00000800  // Interrupt 11 enable
-#define NVIC_EN0_INT12          0x00001000  // Interrupt 12 enable
-#define NVIC_EN0_INT13          0x00002000  // Interrupt 13 enable
-#define NVIC_EN0_INT14          0x00004000  // Interrupt 14 enable
-#define NVIC_EN0_INT15          0x00008000  // Interrupt 15 enable
-#define NVIC_EN0_INT16          0x00010000  // Interrupt 16 enable
-#define NVIC_EN0_INT17          0x00020000  // Interrupt 17 enable
-#define NVIC_EN0_INT18          0x00040000  // Interrupt 18 enable
-#define NVIC_EN0_INT19          0x00080000  // Interrupt 19 enable
-#define NVIC_EN0_INT20          0x00100000  // Interrupt 20 enable
-#define NVIC_EN0_INT21          0x00200000  // Interrupt 21 enable
-#define NVIC_EN0_INT22          0x00400000  // Interrupt 22 enable
-#define NVIC_EN0_INT23          0x00800000  // Interrupt 23 enable
-#define NVIC_EN0_INT24          0x01000000  // Interrupt 24 enable
-#define NVIC_EN0_INT25          0x02000000  // Interrupt 25 enable
-#define NVIC_EN0_INT26          0x04000000  // Interrupt 26 enable
-#define NVIC_EN0_INT27          0x08000000  // Interrupt 27 enable
-#define NVIC_EN0_INT28          0x10000000  // Interrupt 28 enable
-#define NVIC_EN0_INT29          0x20000000  // Interrupt 29 enable
-#define NVIC_EN0_INT30          0x40000000  // Interrupt 30 enable
-#define NVIC_EN0_INT31          0x80000000  // Interrupt 31 enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN1 register.
-//
-//*****************************************************************************
-#define NVIC_EN1_INT_M          0x007FFFFF  // Interrupt Enable
-
-#undef NVIC_EN1_INT_M
-#define NVIC_EN1_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-#define NVIC_EN1_INT32          0x00000001  // Interrupt 32 enable
-#define NVIC_EN1_INT33          0x00000002  // Interrupt 33 enable
-#define NVIC_EN1_INT34          0x00000004  // Interrupt 34 enable
-#define NVIC_EN1_INT35          0x00000008  // Interrupt 35 enable
-#define NVIC_EN1_INT36          0x00000010  // Interrupt 36 enable
-#define NVIC_EN1_INT37          0x00000020  // Interrupt 37 enable
-#define NVIC_EN1_INT38          0x00000040  // Interrupt 38 enable
-#define NVIC_EN1_INT39          0x00000080  // Interrupt 39 enable
-#define NVIC_EN1_INT40          0x00000100  // Interrupt 40 enable
-#define NVIC_EN1_INT41          0x00000200  // Interrupt 41 enable
-#define NVIC_EN1_INT42          0x00000400  // Interrupt 42 enable
-#define NVIC_EN1_INT43          0x00000800  // Interrupt 43 enable
-#define NVIC_EN1_INT44          0x00001000  // Interrupt 44 enable
-#define NVIC_EN1_INT45          0x00002000  // Interrupt 45 enable
-#define NVIC_EN1_INT46          0x00004000  // Interrupt 46 enable
-#define NVIC_EN1_INT47          0x00008000  // Interrupt 47 enable
-#define NVIC_EN1_INT48          0x00010000  // Interrupt 48 enable
-#define NVIC_EN1_INT49          0x00020000  // Interrupt 49 enable
-#define NVIC_EN1_INT50          0x00040000  // Interrupt 50 enable
-#define NVIC_EN1_INT51          0x00080000  // Interrupt 51 enable
-#define NVIC_EN1_INT52          0x00100000  // Interrupt 52 enable
-#define NVIC_EN1_INT53          0x00200000  // Interrupt 53 enable
-#define NVIC_EN1_INT54          0x00400000  // Interrupt 54 enable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN2 register.
-//
-//*****************************************************************************
-#define NVIC_EN2_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN3 register.
-//
-//*****************************************************************************
-#define NVIC_EN3_INT_M          0xFFFFFFFF  // Interrupt Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_EN4 register.
-//
-//*****************************************************************************
-#define NVIC_EN4_INT_M          0x0000000F  // Interrupt Enable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS0 register.
-//
-//*****************************************************************************
-#define NVIC_DIS0_INT_M         0xFFFFFFFF  // Interrupt Disable
-#define NVIC_DIS0_INT0          0x00000001  // Interrupt 0 disable
-#define NVIC_DIS0_INT1          0x00000002  // Interrupt 1 disable
-#define NVIC_DIS0_INT2          0x00000004  // Interrupt 2 disable
-#define NVIC_DIS0_INT3          0x00000008  // Interrupt 3 disable
-#define NVIC_DIS0_INT4          0x00000010  // Interrupt 4 disable
-#define NVIC_DIS0_INT5          0x00000020  // Interrupt 5 disable
-#define NVIC_DIS0_INT6          0x00000040  // Interrupt 6 disable
-#define NVIC_DIS0_INT7          0x00000080  // Interrupt 7 disable
-#define NVIC_DIS0_INT8          0x00000100  // Interrupt 8 disable
-#define NVIC_DIS0_INT9          0x00000200  // Interrupt 9 disable
-#define NVIC_DIS0_INT10         0x00000400  // Interrupt 10 disable
-#define NVIC_DIS0_INT11         0x00000800  // Interrupt 11 disable
-#define NVIC_DIS0_INT12         0x00001000  // Interrupt 12 disable
-#define NVIC_DIS0_INT13         0x00002000  // Interrupt 13 disable
-#define NVIC_DIS0_INT14         0x00004000  // Interrupt 14 disable
-#define NVIC_DIS0_INT15         0x00008000  // Interrupt 15 disable
-#define NVIC_DIS0_INT16         0x00010000  // Interrupt 16 disable
-#define NVIC_DIS0_INT17         0x00020000  // Interrupt 17 disable
-#define NVIC_DIS0_INT18         0x00040000  // Interrupt 18 disable
-#define NVIC_DIS0_INT19         0x00080000  // Interrupt 19 disable
-#define NVIC_DIS0_INT20         0x00100000  // Interrupt 20 disable
-#define NVIC_DIS0_INT21         0x00200000  // Interrupt 21 disable
-#define NVIC_DIS0_INT22         0x00400000  // Interrupt 22 disable
-#define NVIC_DIS0_INT23         0x00800000  // Interrupt 23 disable
-#define NVIC_DIS0_INT24         0x01000000  // Interrupt 24 disable
-#define NVIC_DIS0_INT25         0x02000000  // Interrupt 25 disable
-#define NVIC_DIS0_INT26         0x04000000  // Interrupt 26 disable
-#define NVIC_DIS0_INT27         0x08000000  // Interrupt 27 disable
-#define NVIC_DIS0_INT28         0x10000000  // Interrupt 28 disable
-#define NVIC_DIS0_INT29         0x20000000  // Interrupt 29 disable
-#define NVIC_DIS0_INT30         0x40000000  // Interrupt 30 disable
-#define NVIC_DIS0_INT31         0x80000000  // Interrupt 31 disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS1 register.
-//
-//*****************************************************************************
-#define NVIC_DIS1_INT_M         0x00FFFFFF  // Interrupt Disable
-
-#undef NVIC_DIS1_INT_M
-#define NVIC_DIS1_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-#define NVIC_DIS1_INT32         0x00000001  // Interrupt 32 disable
-#define NVIC_DIS1_INT33         0x00000002  // Interrupt 33 disable
-#define NVIC_DIS1_INT34         0x00000004  // Interrupt 34 disable
-#define NVIC_DIS1_INT35         0x00000008  // Interrupt 35 disable
-#define NVIC_DIS1_INT36         0x00000010  // Interrupt 36 disable
-#define NVIC_DIS1_INT37         0x00000020  // Interrupt 37 disable
-#define NVIC_DIS1_INT38         0x00000040  // Interrupt 38 disable
-#define NVIC_DIS1_INT39         0x00000080  // Interrupt 39 disable
-#define NVIC_DIS1_INT40         0x00000100  // Interrupt 40 disable
-#define NVIC_DIS1_INT41         0x00000200  // Interrupt 41 disable
-#define NVIC_DIS1_INT42         0x00000400  // Interrupt 42 disable
-#define NVIC_DIS1_INT43         0x00000800  // Interrupt 43 disable
-#define NVIC_DIS1_INT44         0x00001000  // Interrupt 44 disable
-#define NVIC_DIS1_INT45         0x00002000  // Interrupt 45 disable
-#define NVIC_DIS1_INT46         0x00004000  // Interrupt 46 disable
-#define NVIC_DIS1_INT47         0x00008000  // Interrupt 47 disable
-#define NVIC_DIS1_INT48         0x00010000  // Interrupt 48 disable
-#define NVIC_DIS1_INT49         0x00020000  // Interrupt 49 disable
-#define NVIC_DIS1_INT50         0x00040000  // Interrupt 50 disable
-#define NVIC_DIS1_INT51         0x00080000  // Interrupt 51 disable
-#define NVIC_DIS1_INT52         0x00100000  // Interrupt 52 disable
-#define NVIC_DIS1_INT53         0x00200000  // Interrupt 53 disable
-#define NVIC_DIS1_INT54         0x00400000  // Interrupt 54 disable
-#define NVIC_DIS1_INT55         0x00800000  // Interrupt 55 disable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS2 register.
-//
-//*****************************************************************************
-#define NVIC_DIS2_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS3 register.
-//
-//*****************************************************************************
-#define NVIC_DIS3_INT_M         0xFFFFFFFF  // Interrupt Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DIS4 register.
-//
-//*****************************************************************************
-#define NVIC_DIS4_INT_M         0x0000000F  // Interrupt Disable
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND0 register.
-//
-//*****************************************************************************
-#define NVIC_PEND0_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-#define NVIC_PEND0_INT0         0x00000001  // Interrupt 0 pend
-#define NVIC_PEND0_INT1         0x00000002  // Interrupt 1 pend
-#define NVIC_PEND0_INT2         0x00000004  // Interrupt 2 pend
-#define NVIC_PEND0_INT3         0x00000008  // Interrupt 3 pend
-#define NVIC_PEND0_INT4         0x00000010  // Interrupt 4 pend
-#define NVIC_PEND0_INT5         0x00000020  // Interrupt 5 pend
-#define NVIC_PEND0_INT6         0x00000040  // Interrupt 6 pend
-#define NVIC_PEND0_INT7         0x00000080  // Interrupt 7 pend
-#define NVIC_PEND0_INT8         0x00000100  // Interrupt 8 pend
-#define NVIC_PEND0_INT9         0x00000200  // Interrupt 9 pend
-#define NVIC_PEND0_INT10        0x00000400  // Interrupt 10 pend
-#define NVIC_PEND0_INT11        0x00000800  // Interrupt 11 pend
-#define NVIC_PEND0_INT12        0x00001000  // Interrupt 12 pend
-#define NVIC_PEND0_INT13        0x00002000  // Interrupt 13 pend
-#define NVIC_PEND0_INT14        0x00004000  // Interrupt 14 pend
-#define NVIC_PEND0_INT15        0x00008000  // Interrupt 15 pend
-#define NVIC_PEND0_INT16        0x00010000  // Interrupt 16 pend
-#define NVIC_PEND0_INT17        0x00020000  // Interrupt 17 pend
-#define NVIC_PEND0_INT18        0x00040000  // Interrupt 18 pend
-#define NVIC_PEND0_INT19        0x00080000  // Interrupt 19 pend
-#define NVIC_PEND0_INT20        0x00100000  // Interrupt 20 pend
-#define NVIC_PEND0_INT21        0x00200000  // Interrupt 21 pend
-#define NVIC_PEND0_INT22        0x00400000  // Interrupt 22 pend
-#define NVIC_PEND0_INT23        0x00800000  // Interrupt 23 pend
-#define NVIC_PEND0_INT24        0x01000000  // Interrupt 24 pend
-#define NVIC_PEND0_INT25        0x02000000  // Interrupt 25 pend
-#define NVIC_PEND0_INT26        0x04000000  // Interrupt 26 pend
-#define NVIC_PEND0_INT27        0x08000000  // Interrupt 27 pend
-#define NVIC_PEND0_INT28        0x10000000  // Interrupt 28 pend
-#define NVIC_PEND0_INT29        0x20000000  // Interrupt 29 pend
-#define NVIC_PEND0_INT30        0x40000000  // Interrupt 30 pend
-#define NVIC_PEND0_INT31        0x80000000  // Interrupt 31 pend
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND1 register.
-//
-//*****************************************************************************
-#define NVIC_PEND1_INT_M        0x00FFFFFF  // Interrupt Set Pending
-
-#undef NVIC_PEND1_INT_M
-#define NVIC_PEND1_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-#define NVIC_PEND1_INT32        0x00000001  // Interrupt 32 pend
-#define NVIC_PEND1_INT33        0x00000002  // Interrupt 33 pend
-#define NVIC_PEND1_INT34        0x00000004  // Interrupt 34 pend
-#define NVIC_PEND1_INT35        0x00000008  // Interrupt 35 pend
-#define NVIC_PEND1_INT36        0x00000010  // Interrupt 36 pend
-#define NVIC_PEND1_INT37        0x00000020  // Interrupt 37 pend
-#define NVIC_PEND1_INT38        0x00000040  // Interrupt 38 pend
-#define NVIC_PEND1_INT39        0x00000080  // Interrupt 39 pend
-#define NVIC_PEND1_INT40        0x00000100  // Interrupt 40 pend
-#define NVIC_PEND1_INT41        0x00000200  // Interrupt 41 pend
-#define NVIC_PEND1_INT42        0x00000400  // Interrupt 42 pend
-#define NVIC_PEND1_INT43        0x00000800  // Interrupt 43 pend
-#define NVIC_PEND1_INT44        0x00001000  // Interrupt 44 pend
-#define NVIC_PEND1_INT45        0x00002000  // Interrupt 45 pend
-#define NVIC_PEND1_INT46        0x00004000  // Interrupt 46 pend
-#define NVIC_PEND1_INT47        0x00008000  // Interrupt 47 pend
-#define NVIC_PEND1_INT48        0x00010000  // Interrupt 48 pend
-#define NVIC_PEND1_INT49        0x00020000  // Interrupt 49 pend
-#define NVIC_PEND1_INT50        0x00040000  // Interrupt 50 pend
-#define NVIC_PEND1_INT51        0x00080000  // Interrupt 51 pend
-#define NVIC_PEND1_INT52        0x00100000  // Interrupt 52 pend
-#define NVIC_PEND1_INT53        0x00200000  // Interrupt 53 pend
-#define NVIC_PEND1_INT54        0x00400000  // Interrupt 54 pend
-#define NVIC_PEND1_INT55        0x00800000  // Interrupt 55 pend
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND2 register.
-//
-//*****************************************************************************
-#define NVIC_PEND2_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND3 register.
-//
-//*****************************************************************************
-#define NVIC_PEND3_INT_M        0xFFFFFFFF  // Interrupt Set Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PEND4 register.
-//
-//*****************************************************************************
-#define NVIC_PEND4_INT_M        0x0000000F  // Interrupt Set Pending
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND0 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND0_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-#define NVIC_UNPEND0_INT0       0x00000001  // Interrupt 0 unpend
-#define NVIC_UNPEND0_INT1       0x00000002  // Interrupt 1 unpend
-#define NVIC_UNPEND0_INT2       0x00000004  // Interrupt 2 unpend
-#define NVIC_UNPEND0_INT3       0x00000008  // Interrupt 3 unpend
-#define NVIC_UNPEND0_INT4       0x00000010  // Interrupt 4 unpend
-#define NVIC_UNPEND0_INT5       0x00000020  // Interrupt 5 unpend
-#define NVIC_UNPEND0_INT6       0x00000040  // Interrupt 6 unpend
-#define NVIC_UNPEND0_INT7       0x00000080  // Interrupt 7 unpend
-#define NVIC_UNPEND0_INT8       0x00000100  // Interrupt 8 unpend
-#define NVIC_UNPEND0_INT9       0x00000200  // Interrupt 9 unpend
-#define NVIC_UNPEND0_INT10      0x00000400  // Interrupt 10 unpend
-#define NVIC_UNPEND0_INT11      0x00000800  // Interrupt 11 unpend
-#define NVIC_UNPEND0_INT12      0x00001000  // Interrupt 12 unpend
-#define NVIC_UNPEND0_INT13      0x00002000  // Interrupt 13 unpend
-#define NVIC_UNPEND0_INT14      0x00004000  // Interrupt 14 unpend
-#define NVIC_UNPEND0_INT15      0x00008000  // Interrupt 15 unpend
-#define NVIC_UNPEND0_INT16      0x00010000  // Interrupt 16 unpend
-#define NVIC_UNPEND0_INT17      0x00020000  // Interrupt 17 unpend
-#define NVIC_UNPEND0_INT18      0x00040000  // Interrupt 18 unpend
-#define NVIC_UNPEND0_INT19      0x00080000  // Interrupt 19 unpend
-#define NVIC_UNPEND0_INT20      0x00100000  // Interrupt 20 unpend
-#define NVIC_UNPEND0_INT21      0x00200000  // Interrupt 21 unpend
-#define NVIC_UNPEND0_INT22      0x00400000  // Interrupt 22 unpend
-#define NVIC_UNPEND0_INT23      0x00800000  // Interrupt 23 unpend
-#define NVIC_UNPEND0_INT24      0x01000000  // Interrupt 24 unpend
-#define NVIC_UNPEND0_INT25      0x02000000  // Interrupt 25 unpend
-#define NVIC_UNPEND0_INT26      0x04000000  // Interrupt 26 unpend
-#define NVIC_UNPEND0_INT27      0x08000000  // Interrupt 27 unpend
-#define NVIC_UNPEND0_INT28      0x10000000  // Interrupt 28 unpend
-#define NVIC_UNPEND0_INT29      0x20000000  // Interrupt 29 unpend
-#define NVIC_UNPEND0_INT30      0x40000000  // Interrupt 30 unpend
-#define NVIC_UNPEND0_INT31      0x80000000  // Interrupt 31 unpend
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND1 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND1_INT_M      0x00FFFFFF  // Interrupt Clear Pending
-
-#undef NVIC_UNPEND1_INT_M
-#define NVIC_UNPEND1_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-#define NVIC_UNPEND1_INT32      0x00000001  // Interrupt 32 unpend
-#define NVIC_UNPEND1_INT33      0x00000002  // Interrupt 33 unpend
-#define NVIC_UNPEND1_INT34      0x00000004  // Interrupt 34 unpend
-#define NVIC_UNPEND1_INT35      0x00000008  // Interrupt 35 unpend
-#define NVIC_UNPEND1_INT36      0x00000010  // Interrupt 36 unpend
-#define NVIC_UNPEND1_INT37      0x00000020  // Interrupt 37 unpend
-#define NVIC_UNPEND1_INT38      0x00000040  // Interrupt 38 unpend
-#define NVIC_UNPEND1_INT39      0x00000080  // Interrupt 39 unpend
-#define NVIC_UNPEND1_INT40      0x00000100  // Interrupt 40 unpend
-#define NVIC_UNPEND1_INT41      0x00000200  // Interrupt 41 unpend
-#define NVIC_UNPEND1_INT42      0x00000400  // Interrupt 42 unpend
-#define NVIC_UNPEND1_INT43      0x00000800  // Interrupt 43 unpend
-#define NVIC_UNPEND1_INT44      0x00001000  // Interrupt 44 unpend
-#define NVIC_UNPEND1_INT45      0x00002000  // Interrupt 45 unpend
-#define NVIC_UNPEND1_INT46      0x00004000  // Interrupt 46 unpend
-#define NVIC_UNPEND1_INT47      0x00008000  // Interrupt 47 unpend
-#define NVIC_UNPEND1_INT48      0x00010000  // Interrupt 48 unpend
-#define NVIC_UNPEND1_INT49      0x00020000  // Interrupt 49 unpend
-#define NVIC_UNPEND1_INT50      0x00040000  // Interrupt 50 unpend
-#define NVIC_UNPEND1_INT51      0x00080000  // Interrupt 51 unpend
-#define NVIC_UNPEND1_INT52      0x00100000  // Interrupt 52 unpend
-#define NVIC_UNPEND1_INT53      0x00200000  // Interrupt 53 unpend
-#define NVIC_UNPEND1_INT54      0x00400000  // Interrupt 54 unpend
-#define NVIC_UNPEND1_INT55      0x00800000  // Interrupt 55 unpend
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND2 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND2_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND3 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND3_INT_M      0xFFFFFFFF  // Interrupt Clear Pending
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_UNPEND4 register.
-//
-//*****************************************************************************
-#define NVIC_UNPEND4_INT_M      0x0000000F  // Interrupt Clear Pending
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE0 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE0_INT_M      0xFFFFFFFF  // Interrupt Active
-#define NVIC_ACTIVE0_INT0       0x00000001  // Interrupt 0 active
-#define NVIC_ACTIVE0_INT1       0x00000002  // Interrupt 1 active
-#define NVIC_ACTIVE0_INT2       0x00000004  // Interrupt 2 active
-#define NVIC_ACTIVE0_INT3       0x00000008  // Interrupt 3 active
-#define NVIC_ACTIVE0_INT4       0x00000010  // Interrupt 4 active
-#define NVIC_ACTIVE0_INT5       0x00000020  // Interrupt 5 active
-#define NVIC_ACTIVE0_INT6       0x00000040  // Interrupt 6 active
-#define NVIC_ACTIVE0_INT7       0x00000080  // Interrupt 7 active
-#define NVIC_ACTIVE0_INT8       0x00000100  // Interrupt 8 active
-#define NVIC_ACTIVE0_INT9       0x00000200  // Interrupt 9 active
-#define NVIC_ACTIVE0_INT10      0x00000400  // Interrupt 10 active
-#define NVIC_ACTIVE0_INT11      0x00000800  // Interrupt 11 active
-#define NVIC_ACTIVE0_INT12      0x00001000  // Interrupt 12 active
-#define NVIC_ACTIVE0_INT13      0x00002000  // Interrupt 13 active
-#define NVIC_ACTIVE0_INT14      0x00004000  // Interrupt 14 active
-#define NVIC_ACTIVE0_INT15      0x00008000  // Interrupt 15 active
-#define NVIC_ACTIVE0_INT16      0x00010000  // Interrupt 16 active
-#define NVIC_ACTIVE0_INT17      0x00020000  // Interrupt 17 active
-#define NVIC_ACTIVE0_INT18      0x00040000  // Interrupt 18 active
-#define NVIC_ACTIVE0_INT19      0x00080000  // Interrupt 19 active
-#define NVIC_ACTIVE0_INT20      0x00100000  // Interrupt 20 active
-#define NVIC_ACTIVE0_INT21      0x00200000  // Interrupt 21 active
-#define NVIC_ACTIVE0_INT22      0x00400000  // Interrupt 22 active
-#define NVIC_ACTIVE0_INT23      0x00800000  // Interrupt 23 active
-#define NVIC_ACTIVE0_INT24      0x01000000  // Interrupt 24 active
-#define NVIC_ACTIVE0_INT25      0x02000000  // Interrupt 25 active
-#define NVIC_ACTIVE0_INT26      0x04000000  // Interrupt 26 active
-#define NVIC_ACTIVE0_INT27      0x08000000  // Interrupt 27 active
-#define NVIC_ACTIVE0_INT28      0x10000000  // Interrupt 28 active
-#define NVIC_ACTIVE0_INT29      0x20000000  // Interrupt 29 active
-#define NVIC_ACTIVE0_INT30      0x40000000  // Interrupt 30 active
-#define NVIC_ACTIVE0_INT31      0x80000000  // Interrupt 31 active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE1 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE1_INT_M      0x00FFFFFF  // Interrupt Active
-
-#undef NVIC_ACTIVE1_INT_M
-#define NVIC_ACTIVE1_INT_M      0xFFFFFFFF  // Interrupt Active
-
-#define NVIC_ACTIVE1_INT32      0x00000001  // Interrupt 32 active
-#define NVIC_ACTIVE1_INT33      0x00000002  // Interrupt 33 active
-#define NVIC_ACTIVE1_INT34      0x00000004  // Interrupt 34 active
-#define NVIC_ACTIVE1_INT35      0x00000008  // Interrupt 35 active
-#define NVIC_ACTIVE1_INT36      0x00000010  // Interrupt 36 active
-#define NVIC_ACTIVE1_INT37      0x00000020  // Interrupt 37 active
-#define NVIC_ACTIVE1_INT38      0x00000040  // Interrupt 38 active
-#define NVIC_ACTIVE1_INT39      0x00000080  // Interrupt 39 active
-#define NVIC_ACTIVE1_INT40      0x00000100  // Interrupt 40 active
-#define NVIC_ACTIVE1_INT41      0x00000200  // Interrupt 41 active
-#define NVIC_ACTIVE1_INT42      0x00000400  // Interrupt 42 active
-#define NVIC_ACTIVE1_INT43      0x00000800  // Interrupt 43 active
-#define NVIC_ACTIVE1_INT44      0x00001000  // Interrupt 44 active
-#define NVIC_ACTIVE1_INT45      0x00002000  // Interrupt 45 active
-#define NVIC_ACTIVE1_INT46      0x00004000  // Interrupt 46 active
-#define NVIC_ACTIVE1_INT47      0x00008000  // Interrupt 47 active
-#define NVIC_ACTIVE1_INT48      0x00010000  // Interrupt 48 active
-#define NVIC_ACTIVE1_INT49      0x00020000  // Interrupt 49 active
-#define NVIC_ACTIVE1_INT50      0x00040000  // Interrupt 50 active
-#define NVIC_ACTIVE1_INT51      0x00080000  // Interrupt 51 active
-#define NVIC_ACTIVE1_INT52      0x00100000  // Interrupt 52 active
-#define NVIC_ACTIVE1_INT53      0x00200000  // Interrupt 53 active
-#define NVIC_ACTIVE1_INT54      0x00400000  // Interrupt 54 active
-#define NVIC_ACTIVE1_INT55      0x00800000  // Interrupt 55 active
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE2 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE2_INT_M      0xFFFFFFFF  // Interrupt Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE3 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE3_INT_M      0xFFFFFFFF  // Interrupt Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_ACTIVE4 register.
-//
-//*****************************************************************************
-#define NVIC_ACTIVE4_INT_M      0x0000000F  // Interrupt Active
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI0 register.
-//
-//*****************************************************************************
-#define NVIC_PRI0_INT3_M        0xE0000000  // Interrupt 3 Priority Mask
-#define NVIC_PRI0_INT2_M        0x00E00000  // Interrupt 2 Priority Mask
-#define NVIC_PRI0_INT1_M        0x0000E000  // Interrupt 1 Priority Mask
-#define NVIC_PRI0_INT0_M        0x000000E0  // Interrupt 0 Priority Mask
-#define NVIC_PRI0_INT3_S        29
-#define NVIC_PRI0_INT2_S        21
-#define NVIC_PRI0_INT1_S        13
-#define NVIC_PRI0_INT0_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI1 register.
-//
-//*****************************************************************************
-#define NVIC_PRI1_INT7_M        0xE0000000  // Interrupt 7 Priority Mask
-#define NVIC_PRI1_INT6_M        0x00E00000  // Interrupt 6 Priority Mask
-#define NVIC_PRI1_INT5_M        0x0000E000  // Interrupt 5 Priority Mask
-#define NVIC_PRI1_INT4_M        0x000000E0  // Interrupt 4 Priority Mask
-#define NVIC_PRI1_INT7_S        29
-#define NVIC_PRI1_INT6_S        21
-#define NVIC_PRI1_INT5_S        13
-#define NVIC_PRI1_INT4_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI2 register.
-//
-//*****************************************************************************
-#define NVIC_PRI2_INT11_M       0xE0000000  // Interrupt 11 Priority Mask
-#define NVIC_PRI2_INT10_M       0x00E00000  // Interrupt 10 Priority Mask
-#define NVIC_PRI2_INT9_M        0x0000E000  // Interrupt 9 Priority Mask
-#define NVIC_PRI2_INT8_M        0x000000E0  // Interrupt 8 Priority Mask
-#define NVIC_PRI2_INT11_S       29
-#define NVIC_PRI2_INT10_S       21
-#define NVIC_PRI2_INT9_S        13
-#define NVIC_PRI2_INT8_S        5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI3 register.
-//
-//*****************************************************************************
-#define NVIC_PRI3_INT15_M       0xE0000000  // Interrupt 15 Priority Mask
-#define NVIC_PRI3_INT14_M       0x00E00000  // Interrupt 14 Priority Mask
-#define NVIC_PRI3_INT13_M       0x0000E000  // Interrupt 13 Priority Mask
-#define NVIC_PRI3_INT12_M       0x000000E0  // Interrupt 12 Priority Mask
-#define NVIC_PRI3_INT15_S       29
-#define NVIC_PRI3_INT14_S       21
-#define NVIC_PRI3_INT13_S       13
-#define NVIC_PRI3_INT12_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI4 register.
-//
-//*****************************************************************************
-#define NVIC_PRI4_INT19_M       0xE0000000  // Interrupt 19 Priority Mask
-#define NVIC_PRI4_INT18_M       0x00E00000  // Interrupt 18 Priority Mask
-#define NVIC_PRI4_INT17_M       0x0000E000  // Interrupt 17 Priority Mask
-#define NVIC_PRI4_INT16_M       0x000000E0  // Interrupt 16 Priority Mask
-#define NVIC_PRI4_INT19_S       29
-#define NVIC_PRI4_INT18_S       21
-#define NVIC_PRI4_INT17_S       13
-#define NVIC_PRI4_INT16_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI5 register.
-//
-//*****************************************************************************
-#define NVIC_PRI5_INT23_M       0xE0000000  // Interrupt 23 Priority Mask
-#define NVIC_PRI5_INT22_M       0x00E00000  // Interrupt 22 Priority Mask
-#define NVIC_PRI5_INT21_M       0x0000E000  // Interrupt 21 Priority Mask
-#define NVIC_PRI5_INT20_M       0x000000E0  // Interrupt 20 Priority Mask
-#define NVIC_PRI5_INT23_S       29
-#define NVIC_PRI5_INT22_S       21
-#define NVIC_PRI5_INT21_S       13
-#define NVIC_PRI5_INT20_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI6 register.
-//
-//*****************************************************************************
-#define NVIC_PRI6_INT27_M       0xE0000000  // Interrupt 27 Priority Mask
-#define NVIC_PRI6_INT26_M       0x00E00000  // Interrupt 26 Priority Mask
-#define NVIC_PRI6_INT25_M       0x0000E000  // Interrupt 25 Priority Mask
-#define NVIC_PRI6_INT24_M       0x000000E0  // Interrupt 24 Priority Mask
-#define NVIC_PRI6_INT27_S       29
-#define NVIC_PRI6_INT26_S       21
-#define NVIC_PRI6_INT25_S       13
-#define NVIC_PRI6_INT24_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI7 register.
-//
-//*****************************************************************************
-#define NVIC_PRI7_INT31_M       0xE0000000  // Interrupt 31 Priority Mask
-#define NVIC_PRI7_INT30_M       0x00E00000  // Interrupt 30 Priority Mask
-#define NVIC_PRI7_INT29_M       0x0000E000  // Interrupt 29 Priority Mask
-#define NVIC_PRI7_INT28_M       0x000000E0  // Interrupt 28 Priority Mask
-#define NVIC_PRI7_INT31_S       29
-#define NVIC_PRI7_INT30_S       21
-#define NVIC_PRI7_INT29_S       13
-#define NVIC_PRI7_INT28_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI8 register.
-//
-//*****************************************************************************
-#define NVIC_PRI8_INT35_M       0xE0000000  // Interrupt 35 Priority Mask
-#define NVIC_PRI8_INT34_M       0x00E00000  // Interrupt 34 Priority Mask
-#define NVIC_PRI8_INT33_M       0x0000E000  // Interrupt 33 Priority Mask
-#define NVIC_PRI8_INT32_M       0x000000E0  // Interrupt 32 Priority Mask
-#define NVIC_PRI8_INT35_S       29
-#define NVIC_PRI8_INT34_S       21
-#define NVIC_PRI8_INT33_S       13
-#define NVIC_PRI8_INT32_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI9 register.
-//
-//*****************************************************************************
-#define NVIC_PRI9_INT39_M       0xE0000000  // Interrupt 39 Priority Mask
-#define NVIC_PRI9_INT38_M       0x00E00000  // Interrupt 38 Priority Mask
-#define NVIC_PRI9_INT37_M       0x0000E000  // Interrupt 37 Priority Mask
-#define NVIC_PRI9_INT36_M       0x000000E0  // Interrupt 36 Priority Mask
-#define NVIC_PRI9_INT39_S       29
-#define NVIC_PRI9_INT38_S       21
-#define NVIC_PRI9_INT37_S       13
-#define NVIC_PRI9_INT36_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI10 register.
-//
-//*****************************************************************************
-#define NVIC_PRI10_INT43_M      0xE0000000  // Interrupt 43 Priority Mask
-#define NVIC_PRI10_INT42_M      0x00E00000  // Interrupt 42 Priority Mask
-#define NVIC_PRI10_INT41_M      0x0000E000  // Interrupt 41 Priority Mask
-#define NVIC_PRI10_INT40_M      0x000000E0  // Interrupt 40 Priority Mask
-#define NVIC_PRI10_INT43_S      29
-#define NVIC_PRI10_INT42_S      21
-#define NVIC_PRI10_INT41_S      13
-#define NVIC_PRI10_INT40_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI11 register.
-//
-//*****************************************************************************
-#define NVIC_PRI11_INT47_M      0xE0000000  // Interrupt 47 Priority Mask
-#define NVIC_PRI11_INT46_M      0x00E00000  // Interrupt 46 Priority Mask
-#define NVIC_PRI11_INT45_M      0x0000E000  // Interrupt 45 Priority Mask
-#define NVIC_PRI11_INT44_M      0x000000E0  // Interrupt 44 Priority Mask
-#define NVIC_PRI11_INT47_S      29
-#define NVIC_PRI11_INT46_S      21
-#define NVIC_PRI11_INT45_S      13
-#define NVIC_PRI11_INT44_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI12 register.
-//
-//*****************************************************************************
-#define NVIC_PRI12_INT51_M      0xE0000000  // Interrupt 51 Priority Mask
-#define NVIC_PRI12_INT50_M      0x00E00000  // Interrupt 50 Priority Mask
-#define NVIC_PRI12_INT49_M      0x0000E000  // Interrupt 49 Priority Mask
-#define NVIC_PRI12_INT48_M      0x000000E0  // Interrupt 48 Priority Mask
-#define NVIC_PRI12_INT51_S      29
-#define NVIC_PRI12_INT50_S      21
-#define NVIC_PRI12_INT49_S      13
-#define NVIC_PRI12_INT48_S      5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI13 register.
-//
-//*****************************************************************************
-#define NVIC_PRI13_INT55_M      0xE0000000  // Interrupt 55 Priority Mask
-#define NVIC_PRI13_INT54_M      0x00E00000  // Interrupt 54 Priority Mask
-#define NVIC_PRI13_INT53_M      0x0000E000  // Interrupt 53 Priority Mask
-#define NVIC_PRI13_INT52_M      0x000000E0  // Interrupt 52 Priority Mask
-#define NVIC_PRI13_INT55_S      29
-#define NVIC_PRI13_INT54_S      21
-#define NVIC_PRI13_INT53_S      13
-#define NVIC_PRI13_INT52_S      5
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI14 register.
-//
-//*****************************************************************************
-#define NVIC_PRI14_INTD_M       0xE0000000  // Interrupt 59 Priority Mask
-#define NVIC_PRI14_INTC_M       0x00E00000  // Interrupt 58 Priority Mask
-#define NVIC_PRI14_INTB_M       0x0000E000  // Interrupt 57 Priority Mask
-#define NVIC_PRI14_INTA_M       0x000000E0  // Interrupt 56 Priority Mask
-#define NVIC_PRI14_INTD_S       29
-#define NVIC_PRI14_INTC_S       21
-#define NVIC_PRI14_INTB_S       13
-#define NVIC_PRI14_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI15 register.
-//
-//*****************************************************************************
-#define NVIC_PRI15_INTD_M       0xE0000000  // Interrupt 63 Priority Mask
-#define NVIC_PRI15_INTC_M       0x00E00000  // Interrupt 62 Priority Mask
-#define NVIC_PRI15_INTB_M       0x0000E000  // Interrupt 61 Priority Mask
-#define NVIC_PRI15_INTA_M       0x000000E0  // Interrupt 60 Priority Mask
-#define NVIC_PRI15_INTD_S       29
-#define NVIC_PRI15_INTC_S       21
-#define NVIC_PRI15_INTB_S       13
-#define NVIC_PRI15_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI16 register.
-//
-//*****************************************************************************
-#define NVIC_PRI16_INTD_M       0xE0000000  // Interrupt 67 Priority Mask
-#define NVIC_PRI16_INTC_M       0x00E00000  // Interrupt 66 Priority Mask
-#define NVIC_PRI16_INTB_M       0x0000E000  // Interrupt 65 Priority Mask
-#define NVIC_PRI16_INTA_M       0x000000E0  // Interrupt 64 Priority Mask
-#define NVIC_PRI16_INTD_S       29
-#define NVIC_PRI16_INTC_S       21
-#define NVIC_PRI16_INTB_S       13
-#define NVIC_PRI16_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI17 register.
-//
-//*****************************************************************************
-#define NVIC_PRI17_INTD_M       0xE0000000  // Interrupt 71 Priority Mask
-#define NVIC_PRI17_INTC_M       0x00E00000  // Interrupt 70 Priority Mask
-#define NVIC_PRI17_INTB_M       0x0000E000  // Interrupt 69 Priority Mask
-#define NVIC_PRI17_INTA_M       0x000000E0  // Interrupt 68 Priority Mask
-#define NVIC_PRI17_INTD_S       29
-#define NVIC_PRI17_INTC_S       21
-#define NVIC_PRI17_INTB_S       13
-#define NVIC_PRI17_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI18 register.
-//
-//*****************************************************************************
-#define NVIC_PRI18_INTD_M       0xE0000000  // Interrupt 75 Priority Mask
-#define NVIC_PRI18_INTC_M       0x00E00000  // Interrupt 74 Priority Mask
-#define NVIC_PRI18_INTB_M       0x0000E000  // Interrupt 73 Priority Mask
-#define NVIC_PRI18_INTA_M       0x000000E0  // Interrupt 72 Priority Mask
-#define NVIC_PRI18_INTD_S       29
-#define NVIC_PRI18_INTC_S       21
-#define NVIC_PRI18_INTB_S       13
-#define NVIC_PRI18_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI19 register.
-//
-//*****************************************************************************
-#define NVIC_PRI19_INTD_M       0xE0000000  // Interrupt 79 Priority Mask
-#define NVIC_PRI19_INTC_M       0x00E00000  // Interrupt 78 Priority Mask
-#define NVIC_PRI19_INTB_M       0x0000E000  // Interrupt 77 Priority Mask
-#define NVIC_PRI19_INTA_M       0x000000E0  // Interrupt 76 Priority Mask
-#define NVIC_PRI19_INTD_S       29
-#define NVIC_PRI19_INTC_S       21
-#define NVIC_PRI19_INTB_S       13
-#define NVIC_PRI19_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI20 register.
-//
-//*****************************************************************************
-#define NVIC_PRI20_INTD_M       0xE0000000  // Interrupt 83 Priority Mask
-#define NVIC_PRI20_INTC_M       0x00E00000  // Interrupt 82 Priority Mask
-#define NVIC_PRI20_INTB_M       0x0000E000  // Interrupt 81 Priority Mask
-#define NVIC_PRI20_INTA_M       0x000000E0  // Interrupt 80 Priority Mask
-#define NVIC_PRI20_INTD_S       29
-#define NVIC_PRI20_INTC_S       21
-#define NVIC_PRI20_INTB_S       13
-#define NVIC_PRI20_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI21 register.
-//
-//*****************************************************************************
-#define NVIC_PRI21_INTD_M       0xE0000000  // Interrupt 87 Priority Mask
-#define NVIC_PRI21_INTC_M       0x00E00000  // Interrupt 86 Priority Mask
-#define NVIC_PRI21_INTB_M       0x0000E000  // Interrupt 85 Priority Mask
-#define NVIC_PRI21_INTA_M       0x000000E0  // Interrupt 84 Priority Mask
-#define NVIC_PRI21_INTD_S       29
-#define NVIC_PRI21_INTC_S       21
-#define NVIC_PRI21_INTB_S       13
-#define NVIC_PRI21_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI22 register.
-//
-//*****************************************************************************
-#define NVIC_PRI22_INTD_M       0xE0000000  // Interrupt 91 Priority Mask
-#define NVIC_PRI22_INTC_M       0x00E00000  // Interrupt 90 Priority Mask
-#define NVIC_PRI22_INTB_M       0x0000E000  // Interrupt 89 Priority Mask
-#define NVIC_PRI22_INTA_M       0x000000E0  // Interrupt 88 Priority Mask
-#define NVIC_PRI22_INTD_S       29
-#define NVIC_PRI22_INTC_S       21
-#define NVIC_PRI22_INTB_S       13
-#define NVIC_PRI22_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI23 register.
-//
-//*****************************************************************************
-#define NVIC_PRI23_INTD_M       0xE0000000  // Interrupt 95 Priority Mask
-#define NVIC_PRI23_INTC_M       0x00E00000  // Interrupt 94 Priority Mask
-#define NVIC_PRI23_INTB_M       0x0000E000  // Interrupt 93 Priority Mask
-#define NVIC_PRI23_INTA_M       0x000000E0  // Interrupt 92 Priority Mask
-#define NVIC_PRI23_INTD_S       29
-#define NVIC_PRI23_INTC_S       21
-#define NVIC_PRI23_INTB_S       13
-#define NVIC_PRI23_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI24 register.
-//
-//*****************************************************************************
-#define NVIC_PRI24_INTD_M       0xE0000000  // Interrupt 99 Priority Mask
-#define NVIC_PRI24_INTC_M       0x00E00000  // Interrupt 98 Priority Mask
-#define NVIC_PRI24_INTB_M       0x0000E000  // Interrupt 97 Priority Mask
-#define NVIC_PRI24_INTA_M       0x000000E0  // Interrupt 96 Priority Mask
-#define NVIC_PRI24_INTD_S       29
-#define NVIC_PRI24_INTC_S       21
-#define NVIC_PRI24_INTB_S       13
-#define NVIC_PRI24_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI25 register.
-//
-//*****************************************************************************
-#define NVIC_PRI25_INTD_M       0xE0000000  // Interrupt 103 Priority Mask
-#define NVIC_PRI25_INTC_M       0x00E00000  // Interrupt 102 Priority Mask
-#define NVIC_PRI25_INTB_M       0x0000E000  // Interrupt 101 Priority Mask
-#define NVIC_PRI25_INTA_M       0x000000E0  // Interrupt 100 Priority Mask
-#define NVIC_PRI25_INTD_S       29
-#define NVIC_PRI25_INTC_S       21
-#define NVIC_PRI25_INTB_S       13
-#define NVIC_PRI25_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI26 register.
-//
-//*****************************************************************************
-#define NVIC_PRI26_INTD_M       0xE0000000  // Interrupt 107 Priority Mask
-#define NVIC_PRI26_INTC_M       0x00E00000  // Interrupt 106 Priority Mask
-#define NVIC_PRI26_INTB_M       0x0000E000  // Interrupt 105 Priority Mask
-#define NVIC_PRI26_INTA_M       0x000000E0  // Interrupt 104 Priority Mask
-#define NVIC_PRI26_INTD_S       29
-#define NVIC_PRI26_INTC_S       21
-#define NVIC_PRI26_INTB_S       13
-#define NVIC_PRI26_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI27 register.
-//
-//*****************************************************************************
-#define NVIC_PRI27_INTD_M       0xE0000000  // Interrupt 111 Priority Mask
-#define NVIC_PRI27_INTC_M       0x00E00000  // Interrupt 110 Priority Mask
-#define NVIC_PRI27_INTB_M       0x0000E000  // Interrupt 109 Priority Mask
-#define NVIC_PRI27_INTA_M       0x000000E0  // Interrupt 108 Priority Mask
-#define NVIC_PRI27_INTD_S       29
-#define NVIC_PRI27_INTC_S       21
-#define NVIC_PRI27_INTB_S       13
-#define NVIC_PRI27_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI28 register.
-//
-//*****************************************************************************
-#define NVIC_PRI28_INTD_M       0xE0000000  // Interrupt 115 Priority Mask
-#define NVIC_PRI28_INTC_M       0x00E00000  // Interrupt 114 Priority Mask
-#define NVIC_PRI28_INTB_M       0x0000E000  // Interrupt 113 Priority Mask
-#define NVIC_PRI28_INTA_M       0x000000E0  // Interrupt 112 Priority Mask
-#define NVIC_PRI28_INTD_S       29
-#define NVIC_PRI28_INTC_S       21
-#define NVIC_PRI28_INTB_S       13
-#define NVIC_PRI28_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI29 register.
-//
-//*****************************************************************************
-#define NVIC_PRI29_INTD_M       0xE0000000  // Interrupt 119 Priority Mask
-#define NVIC_PRI29_INTC_M       0x00E00000  // Interrupt 118 Priority Mask
-#define NVIC_PRI29_INTB_M       0x0000E000  // Interrupt 117 Priority Mask
-#define NVIC_PRI29_INTA_M       0x000000E0  // Interrupt 116 Priority Mask
-#define NVIC_PRI29_INTD_S       29
-#define NVIC_PRI29_INTC_S       21
-#define NVIC_PRI29_INTB_S       13
-#define NVIC_PRI29_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI30 register.
-//
-//*****************************************************************************
-#define NVIC_PRI30_INTD_M       0xE0000000  // Interrupt 123 Priority Mask
-#define NVIC_PRI30_INTC_M       0x00E00000  // Interrupt 122 Priority Mask
-#define NVIC_PRI30_INTB_M       0x0000E000  // Interrupt 121 Priority Mask
-#define NVIC_PRI30_INTA_M       0x000000E0  // Interrupt 120 Priority Mask
-#define NVIC_PRI30_INTD_S       29
-#define NVIC_PRI30_INTC_S       21
-#define NVIC_PRI30_INTB_S       13
-#define NVIC_PRI30_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI31 register.
-//
-//*****************************************************************************
-#define NVIC_PRI31_INTD_M       0xE0000000  // Interrupt 127 Priority Mask
-#define NVIC_PRI31_INTC_M       0x00E00000  // Interrupt 126 Priority Mask
-#define NVIC_PRI31_INTB_M       0x0000E000  // Interrupt 125 Priority Mask
-#define NVIC_PRI31_INTA_M       0x000000E0  // Interrupt 124 Priority Mask
-#define NVIC_PRI31_INTD_S       29
-#define NVIC_PRI31_INTC_S       21
-#define NVIC_PRI31_INTB_S       13
-#define NVIC_PRI31_INTA_S       5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_PRI32 register.
-//
-//*****************************************************************************
-#define NVIC_PRI32_INTD_M       0xE0000000  // Interrupt 131 Priority Mask
-#define NVIC_PRI32_INTC_M       0x00E00000  // Interrupt 130 Priority Mask
-#define NVIC_PRI32_INTB_M       0x0000E000  // Interrupt 129 Priority Mask
-#define NVIC_PRI32_INTA_M       0x000000E0  // Interrupt 128 Priority Mask
-#define NVIC_PRI32_INTD_S       29
-#define NVIC_PRI32_INTC_S       21
-#define NVIC_PRI32_INTB_S       13
-#define NVIC_PRI32_INTA_S       5
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_CPUID register.
-//
-//*****************************************************************************
-#define NVIC_CPUID_IMP_M        0xFF000000  // Implementer Code
-#define NVIC_CPUID_IMP_ARM      0x41000000  // ARM
-#define NVIC_CPUID_VAR_M        0x00F00000  // Variant Number
-#define NVIC_CPUID_CON_M        0x000F0000  // Constant
-#define NVIC_CPUID_PARTNO_M     0x0000FFF0  // Part Number
-#define NVIC_CPUID_PARTNO_CM3   0x0000C230  // Cortex-M3 processor
-
-#define NVIC_CPUID_PARTNO_CM4   0x0000C240  // Cortex-M4 processor
-
-#define NVIC_CPUID_REV_M        0x0000000F  // Revision Number
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_INT_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_INT_CTRL_NMI_SET   0x80000000  // NMI Set Pending
-#define NVIC_INT_CTRL_PEND_SV   0x10000000  // PendSV Set Pending
-#define NVIC_INT_CTRL_UNPEND_SV 0x08000000  // PendSV Clear Pending
-#define NVIC_INT_CTRL_PENDSTSET 0x04000000  // SysTick Set Pending
-#define NVIC_INT_CTRL_PENDSTCLR 0x02000000  // SysTick Clear Pending
-#define NVIC_INT_CTRL_ISR_PRE   0x00800000  // Debug Interrupt Handling
-#define NVIC_INT_CTRL_ISR_PEND  0x00400000  // Interrupt Pending
-#define NVIC_INT_CTRL_VEC_PEN_M 0x0007F000  // Interrupt Pending Vector Number
-
-#undef NVIC_INT_CTRL_VEC_PEN_M
-#define NVIC_INT_CTRL_VEC_PEN_M 0x000FF000  // Interrupt Pending Vector Number
-
-#define NVIC_INT_CTRL_VEC_PEN_NMI \
-                                0x00002000  // NMI
-#define NVIC_INT_CTRL_VEC_PEN_HARD \
-                                0x00003000  // Hard fault
-#define NVIC_INT_CTRL_VEC_PEN_MEM \
-                                0x00004000  // Memory management fault
-#define NVIC_INT_CTRL_VEC_PEN_BUS \
-                                0x00005000  // Bus fault
-#define NVIC_INT_CTRL_VEC_PEN_USG \
-                                0x00006000  // Usage fault
-#define NVIC_INT_CTRL_VEC_PEN_SVC \
-                                0x0000B000  // SVCall
-#define NVIC_INT_CTRL_VEC_PEN_PNDSV \
-                                0x0000E000  // PendSV
-#define NVIC_INT_CTRL_VEC_PEN_TICK \
-                                0x0000F000  // SysTick
-#define NVIC_INT_CTRL_RET_BASE  0x00000800  // Return to Base
-#define NVIC_INT_CTRL_VEC_ACT_M 0x0000007F  // Interrupt Pending Vector Number
-
-#undef NVIC_INT_CTRL_VEC_ACT_M
-#define NVIC_INT_CTRL_VEC_ACT_M 0x000000FF  // Interrupt Pending Vector Number
-
-#define NVIC_INT_CTRL_VEC_PEN_S 12
-#define NVIC_INT_CTRL_VEC_ACT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_VTABLE register.
-//
-//*****************************************************************************
-#define NVIC_VTABLE_BASE        0x20000000  // Vector Table Base
-#define NVIC_VTABLE_OFFSET_M    0x1FFFFE00  // Vector Table Offset
-
-#undef NVIC_VTABLE_OFFSET_M
-#define NVIC_VTABLE_OFFSET_M    0x1FFFFC00  // Vector Table Offset
-
-#define NVIC_VTABLE_OFFSET_S    9
-
-#undef NVIC_VTABLE_OFFSET_S
-#define NVIC_VTABLE_OFFSET_S    10
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_APINT register.
-//
-//*****************************************************************************
-#define NVIC_APINT_VECTKEY_M    0xFFFF0000  // Register Key
-#define NVIC_APINT_VECTKEY      0x05FA0000  // Vector key
-#define NVIC_APINT_ENDIANESS    0x00008000  // Data Endianess
-#define NVIC_APINT_PRIGROUP_M   0x00000700  // Interrupt Priority Grouping
-#define NVIC_APINT_PRIGROUP_7_1 0x00000000  // Priority group 7.1 split
-#define NVIC_APINT_PRIGROUP_6_2 0x00000100  // Priority group 6.2 split
-#define NVIC_APINT_PRIGROUP_5_3 0x00000200  // Priority group 5.3 split
-#define NVIC_APINT_PRIGROUP_4_4 0x00000300  // Priority group 4.4 split
-#define NVIC_APINT_PRIGROUP_3_5 0x00000400  // Priority group 3.5 split
-#define NVIC_APINT_PRIGROUP_2_6 0x00000500  // Priority group 2.6 split
-#define NVIC_APINT_PRIGROUP_1_7 0x00000600  // Priority group 1.7 split
-#define NVIC_APINT_PRIGROUP_0_8 0x00000700  // Priority group 0.8 split
-#define NVIC_APINT_SYSRESETREQ  0x00000004  // System Reset Request
-#define NVIC_APINT_VECT_CLR_ACT 0x00000002  // Clear Active NMI / Fault
-#define NVIC_APINT_VECT_RESET   0x00000001  // System Reset
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_SYS_CTRL_SEVONPEND 0x00000010  // Wake Up on Pending
-#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  // Deep Sleep Enable
-#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  // Sleep on ISR Exit
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_CFG_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_CFG_CTRL_STKALIGN  0x00000200  // Stack Alignment on Exception
-                                            // Entry
-#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  // Ignore Bus Fault in NMI and
-                                            // Fault
-#define NVIC_CFG_CTRL_DIV0      0x00000010  // Trap on Divide by 0
-#define NVIC_CFG_CTRL_UNALIGNED 0x00000008  // Trap on Unaligned Access
-#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  // Allow Main Interrupt Trigger
-#define NVIC_CFG_CTRL_BASE_THR  0x00000001  // Thread State Control
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI1_USAGE_M   0x00E00000  // Usage Fault Priority
-#define NVIC_SYS_PRI1_BUS_M     0x0000E000  // Bus Fault Priority
-#define NVIC_SYS_PRI1_MEM_M     0x000000E0  // Memory Management Fault Priority
-#define NVIC_SYS_PRI1_USAGE_S   21
-#define NVIC_SYS_PRI1_BUS_S     13
-#define NVIC_SYS_PRI1_MEM_S     5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI2_SVC_M     0xE0000000  // SVCall Priority
-#define NVIC_SYS_PRI2_SVC_S     29
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
-//
-//*****************************************************************************
-#define NVIC_SYS_PRI3_TICK_M    0xE0000000  // SysTick Exception Priority
-#define NVIC_SYS_PRI3_PENDSV_M  0x00E00000  // PendSV Priority
-#define NVIC_SYS_PRI3_DEBUG_M   0x000000E0  // Debug Priority
-#define NVIC_SYS_PRI3_TICK_S    29
-#define NVIC_SYS_PRI3_PENDSV_S  21
-#define NVIC_SYS_PRI3_DEBUG_S   5
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SYS_HND_CTRL
-// register.
-//
-//*****************************************************************************
-#define NVIC_SYS_HND_CTRL_USAGE 0x00040000  // Usage Fault Enable
-#define NVIC_SYS_HND_CTRL_BUS   0x00020000  // Bus Fault Enable
-#define NVIC_SYS_HND_CTRL_MEM   0x00010000  // Memory Management Fault Enable
-#define NVIC_SYS_HND_CTRL_SVC   0x00008000  // SVC Call Pending
-#define NVIC_SYS_HND_CTRL_BUSP  0x00004000  // Bus Fault Pending
-#define NVIC_SYS_HND_CTRL_MEMP  0x00002000  // Memory Management Fault Pending
-#define NVIC_SYS_HND_CTRL_USAGEP \
-                                0x00001000  // Usage Fault Pending
-#define NVIC_SYS_HND_CTRL_TICK  0x00000800  // SysTick Exception Active
-#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  // PendSV Exception Active
-#define NVIC_SYS_HND_CTRL_MON   0x00000100  // Debug Monitor Active
-#define NVIC_SYS_HND_CTRL_SVCA  0x00000080  // SVC Call Active
-#define NVIC_SYS_HND_CTRL_USGA  0x00000008  // Usage Fault Active
-#define NVIC_SYS_HND_CTRL_BUSA  0x00000002  // Bus Fault Active
-#define NVIC_SYS_HND_CTRL_MEMA  0x00000001  // Memory Management Fault Active
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_FAULT_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_FAULT_STAT_DIV0    0x02000000  // Divide-by-Zero Usage Fault
-#define NVIC_FAULT_STAT_UNALIGN 0x01000000  // Unaligned Access Usage Fault
-#define NVIC_FAULT_STAT_NOCP    0x00080000  // No Coprocessor Usage Fault
-#define NVIC_FAULT_STAT_INVPC   0x00040000  // Invalid PC Load Usage Fault
-#define NVIC_FAULT_STAT_INVSTAT 0x00020000  // Invalid State Usage Fault
-#define NVIC_FAULT_STAT_UNDEF   0x00010000  // Undefined Instruction Usage
-                                            // Fault
-#define NVIC_FAULT_STAT_BFARV   0x00008000  // Bus Fault Address Register Valid
-
-#define NVIC_FAULT_STAT_BLSPERR 0x00002000  // Bus Fault on Floating-Point Lazy
-                                            // State Preservation
-
-#define NVIC_FAULT_STAT_BSTKE   0x00001000  // Stack Bus Fault
-#define NVIC_FAULT_STAT_BUSTKE  0x00000800  // Unstack Bus Fault
-#define NVIC_FAULT_STAT_IMPRE   0x00000400  // Imprecise Data Bus Error
-#define NVIC_FAULT_STAT_PRECISE 0x00000200  // Precise Data Bus Error
-#define NVIC_FAULT_STAT_IBUS    0x00000100  // Instruction Bus Error
-#define NVIC_FAULT_STAT_MMARV   0x00000080  // Memory Management Fault Address
-                                            // Register Valid
-
-#define NVIC_FAULT_STAT_MLSPERR 0x00000020  // Memory Management Fault on
-                                            // Floating-Point Lazy State
-                                            // Preservation
-
-#define NVIC_FAULT_STAT_MSTKE   0x00000010  // Stack Access Violation
-#define NVIC_FAULT_STAT_MUSTKE  0x00000008  // Unstack Access Violation
-#define NVIC_FAULT_STAT_DERR    0x00000002  // Data Access Violation
-#define NVIC_FAULT_STAT_IERR    0x00000001  // Instruction Access Violation
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_HFAULT_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_HFAULT_STAT_DBG    0x80000000  // Debug Event
-#define NVIC_HFAULT_STAT_FORCED 0x40000000  // Forced Hard Fault
-#define NVIC_HFAULT_STAT_VECT   0x00000002  // Vector Table Read Fault
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DEBUG_STAT
-// register.
-//
-//*****************************************************************************
-#define NVIC_DEBUG_STAT_EXTRNL  0x00000010  // EDBGRQ asserted
-#define NVIC_DEBUG_STAT_VCATCH  0x00000008  // Vector catch
-#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  // DWT match
-#define NVIC_DEBUG_STAT_BKPT    0x00000002  // Breakpoint instruction
-#define NVIC_DEBUG_STAT_HALTED  0x00000001  // Halt request
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MM_ADDR register.
-//
-//*****************************************************************************
-#define NVIC_MM_ADDR_M          0xFFFFFFFF  // Fault Address
-#define NVIC_MM_ADDR_S          0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_FAULT_ADDR
-// register.
-//
-//*****************************************************************************
-#define NVIC_FAULT_ADDR_M       0xFFFFFFFF  // Fault Address
-#define NVIC_FAULT_ADDR_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_TYPE register.
-//
-//*****************************************************************************
-#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  // Number of I Regions
-#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  // Number of D Regions
-#define NVIC_MPU_TYPE_SEPARATE  0x00000001  // Separate or Unified MPU
-#define NVIC_MPU_TYPE_IREGION_S 16
-#define NVIC_MPU_TYPE_DREGION_S 8
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  // MPU Default Region
-#define NVIC_MPU_CTRL_HFNMIENA  0x00000002  // MPU Enabled During Faults
-#define NVIC_MPU_CTRL_ENABLE    0x00000001  // MPU Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_NUMBER
-// register.
-//
-//*****************************************************************************
-#define NVIC_MPU_NUMBER_M       0x00000007  // MPU Region to Access
-#define NVIC_MPU_NUMBER_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE_VALID     0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE_REGION_M  0x00000007  // Region Number
-#define NVIC_MPU_BASE_ADDR_S    5
-#define NVIC_MPU_BASE_REGION_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR_M         0xFFFF0000  // Attributes
-#define NVIC_MPU_ATTR_XN        0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR_AP_M      0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  // prv: no access, usr: no access
-#define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  // prv: rw, usr: none
-#define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  // prv: rw, usr: read-only
-#define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  // prv: rw, usr: rw
-#define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  // prv: ro, usr: none
-#define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  // prv: ro, usr: ro
-#define NVIC_MPU_ATTR_TEX_M     0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR_SHAREABLE 0x00040000  // Shareable
-#define NVIC_MPU_ATTR_CACHEABLE 0x00020000  // Cacheable
-#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  // Bufferable
-#define NVIC_MPU_ATTR_SRD_M     0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR_SRD_0     0x00000100  // Sub-region 0 disable
-#define NVIC_MPU_ATTR_SRD_1     0x00000200  // Sub-region 1 disable
-#define NVIC_MPU_ATTR_SRD_2     0x00000400  // Sub-region 2 disable
-#define NVIC_MPU_ATTR_SRD_3     0x00000800  // Sub-region 3 disable
-#define NVIC_MPU_ATTR_SRD_4     0x00001000  // Sub-region 4 disable
-#define NVIC_MPU_ATTR_SRD_5     0x00002000  // Sub-region 5 disable
-#define NVIC_MPU_ATTR_SRD_6     0x00004000  // Sub-region 6 disable
-#define NVIC_MPU_ATTR_SRD_7     0x00008000  // Sub-region 7 disable
-#define NVIC_MPU_ATTR_SIZE_M    0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR_SIZE_32B  0x00000008  // Region size 32 bytes
-#define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  // Region size 64 bytes
-#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  // Region size 128 bytes
-#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  // Region size 256 bytes
-#define NVIC_MPU_ATTR_SIZE_512B 0x00000010  // Region size 512 bytes
-#define NVIC_MPU_ATTR_SIZE_1K   0x00000012  // Region size 1 Kbytes
-#define NVIC_MPU_ATTR_SIZE_2K   0x00000014  // Region size 2 Kbytes
-#define NVIC_MPU_ATTR_SIZE_4K   0x00000016  // Region size 4 Kbytes
-#define NVIC_MPU_ATTR_SIZE_8K   0x00000018  // Region size 8 Kbytes
-#define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  // Region size 16 Kbytes
-#define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  // Region size 32 Kbytes
-#define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  // Region size 64 Kbytes
-#define NVIC_MPU_ATTR_SIZE_128K 0x00000020  // Region size 128 Kbytes
-#define NVIC_MPU_ATTR_SIZE_256K 0x00000022  // Region size 256 Kbytes
-#define NVIC_MPU_ATTR_SIZE_512K 0x00000024  // Region size 512 Kbytes
-#define NVIC_MPU_ATTR_SIZE_1M   0x00000026  // Region size 1 Mbytes
-#define NVIC_MPU_ATTR_SIZE_2M   0x00000028  // Region size 2 Mbytes
-#define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  // Region size 4 Mbytes
-#define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  // Region size 8 Mbytes
-#define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  // Region size 16 Mbytes
-#define NVIC_MPU_ATTR_SIZE_32M  0x00000030  // Region size 32 Mbytes
-#define NVIC_MPU_ATTR_SIZE_64M  0x00000032  // Region size 64 Mbytes
-#define NVIC_MPU_ATTR_SIZE_128M 0x00000034  // Region size 128 Mbytes
-#define NVIC_MPU_ATTR_SIZE_256M 0x00000036  // Region size 256 Mbytes
-#define NVIC_MPU_ATTR_SIZE_512M 0x00000038  // Region size 512 Mbytes
-#define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  // Region size 1 Gbytes
-#define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  // Region size 2 Gbytes
-#define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  // Region size 4 Gbytes
-#define NVIC_MPU_ATTR_ENABLE    0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE1 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE1_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE1_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE1_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE1_ADDR_S   5
-#define NVIC_MPU_BASE1_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR1 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR1_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR1_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR1_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR1_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR1_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR1_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR1_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR1_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR1_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE2 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE2_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE2_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE2_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE2_ADDR_S   5
-#define NVIC_MPU_BASE2_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR2 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR2_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR2_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR2_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR2_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR2_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR2_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR2_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR2_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR2_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_BASE3 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_BASE3_ADDR_M   0xFFFFFFE0  // Base Address Mask
-#define NVIC_MPU_BASE3_VALID    0x00000010  // Region Number Valid
-#define NVIC_MPU_BASE3_REGION_M 0x00000007  // Region Number
-#define NVIC_MPU_BASE3_ADDR_S   5
-#define NVIC_MPU_BASE3_REGION_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_MPU_ATTR3 register.
-//
-//*****************************************************************************
-#define NVIC_MPU_ATTR3_XN       0x10000000  // Instruction Access Disable
-#define NVIC_MPU_ATTR3_AP_M     0x07000000  // Access Privilege
-#define NVIC_MPU_ATTR3_TEX_M    0x00380000  // Type Extension Mask
-#define NVIC_MPU_ATTR3_SHAREABLE \
-                                0x00040000  // Shareable
-#define NVIC_MPU_ATTR3_CACHEABLE \
-                                0x00020000  // Cacheable
-#define NVIC_MPU_ATTR3_BUFFRABLE \
-                                0x00010000  // Bufferable
-#define NVIC_MPU_ATTR3_SRD_M    0x0000FF00  // Subregion Disable Bits
-#define NVIC_MPU_ATTR3_SIZE_M   0x0000003E  // Region Size Mask
-#define NVIC_MPU_ATTR3_ENABLE   0x00000001  // Region Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_CTRL register.
-//
-//*****************************************************************************
-#define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  // Debug key mask
-#define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  // Debug key
-#define NVIC_DBG_CTRL_S_RESET_ST \
-                                0x02000000  // Core has reset since last read
-#define NVIC_DBG_CTRL_S_RETIRE_ST \
-                                0x01000000  // Core has executed insruction
-                                            // since last read
-#define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  // Core is locked up
-#define NVIC_DBG_CTRL_S_SLEEP   0x00040000  // Core is sleeping
-#define NVIC_DBG_CTRL_S_HALT    0x00020000  // Core status on halt
-#define NVIC_DBG_CTRL_S_REGRDY  0x00010000  // Register read/write available
-#define NVIC_DBG_CTRL_C_SNAPSTALL \
-                                0x00000020  // Breaks a stalled load/store
-#define NVIC_DBG_CTRL_C_MASKINT 0x00000008  // Mask interrupts when stepping
-#define NVIC_DBG_CTRL_C_STEP    0x00000004  // Step the core
-#define NVIC_DBG_CTRL_C_HALT    0x00000002  // Halt the core
-#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  // Enable debug
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_XFER register.
-//
-//*****************************************************************************
-#define NVIC_DBG_XFER_REG_WNR   0x00010000  // Write or not read
-#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  // Register
-#define NVIC_DBG_XFER_REG_R0    0x00000000  // Register R0
-#define NVIC_DBG_XFER_REG_R1    0x00000001  // Register R1
-#define NVIC_DBG_XFER_REG_R2    0x00000002  // Register R2
-#define NVIC_DBG_XFER_REG_R3    0x00000003  // Register R3
-#define NVIC_DBG_XFER_REG_R4    0x00000004  // Register R4
-#define NVIC_DBG_XFER_REG_R5    0x00000005  // Register R5
-#define NVIC_DBG_XFER_REG_R6    0x00000006  // Register R6
-#define NVIC_DBG_XFER_REG_R7    0x00000007  // Register R7
-#define NVIC_DBG_XFER_REG_R8    0x00000008  // Register R8
-#define NVIC_DBG_XFER_REG_R9    0x00000009  // Register R9
-#define NVIC_DBG_XFER_REG_R10   0x0000000A  // Register R10
-#define NVIC_DBG_XFER_REG_R11   0x0000000B  // Register R11
-#define NVIC_DBG_XFER_REG_R12   0x0000000C  // Register R12
-#define NVIC_DBG_XFER_REG_R13   0x0000000D  // Register R13
-#define NVIC_DBG_XFER_REG_R14   0x0000000E  // Register R14
-#define NVIC_DBG_XFER_REG_R15   0x0000000F  // Register R15
-#define NVIC_DBG_XFER_REG_FLAGS 0x00000010  // xPSR/Flags register
-#define NVIC_DBG_XFER_REG_MSP   0x00000011  // Main SP
-#define NVIC_DBG_XFER_REG_PSP   0x00000012  // Process SP
-#define NVIC_DBG_XFER_REG_DSP   0x00000013  // Deep SP
-#define NVIC_DBG_XFER_REG_CFBP  0x00000014  // Control/Fault/BasePri/PriMask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_DATA register.
-//
-//*****************************************************************************
-#define NVIC_DBG_DATA_M         0xFFFFFFFF  // Data temporary cache
-#define NVIC_DBG_DATA_S         0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_DBG_INT register.
-//
-//*****************************************************************************
-#define NVIC_DBG_INT_HARDERR    0x00000400  // Debug trap on hard fault
-#define NVIC_DBG_INT_INTERR     0x00000200  // Debug trap on interrupt errors
-#define NVIC_DBG_INT_BUSERR     0x00000100  // Debug trap on bus error
-#define NVIC_DBG_INT_STATERR    0x00000080  // Debug trap on usage fault state
-#define NVIC_DBG_INT_CHKERR     0x00000040  // Debug trap on usage fault check
-#define NVIC_DBG_INT_NOCPERR    0x00000020  // Debug trap on coprocessor error
-#define NVIC_DBG_INT_MMERR      0x00000010  // Debug trap on mem manage fault
-#define NVIC_DBG_INT_RESET      0x00000008  // Core reset status
-#define NVIC_DBG_INT_RSTPENDCLR 0x00000004  // Clear pending core reset
-#define NVIC_DBG_INT_RSTPENDING 0x00000002  // Core reset is pending
-#define NVIC_DBG_INT_RSTVCATCH  0x00000001  // Reset vector catch
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the NVIC_SW_TRIG register.
-//
-//*****************************************************************************
-#define NVIC_SW_TRIG_INTID_M    0x0000003F  // Interrupt ID
-
-#undef NVIC_SW_TRIG_INTID_M
-#define NVIC_SW_TRIG_INTID_M    0x000000FF  // Interrupt ID
-
-#define NVIC_SW_TRIG_INTID_S    0
-
-#endif // __HW_NVIC_H__
diff --git a/ports/cc3200/hal/inc/hw_ocp_shared.h b/ports/cc3200/hal/inc/hw_ocp_shared.h
deleted file mode 100644
index a52f6901b731c..0000000000000
--- a/ports/cc3200/hal/inc/hw_ocp_shared.h
+++ /dev/null
@@ -1,3445 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_OCP_SHARED_H__
-#define __HW_OCP_SHARED_H__
-
-//*****************************************************************************
-//
-// The following are defines for the OCP_SHARED register offsets.
-//
-//*****************************************************************************
-#define OCP_SHARED_O_SEMAPHORE1 0x00000000
-#define OCP_SHARED_O_SEMAPHORE2 0x00000004
-#define OCP_SHARED_O_SEMAPHORE3 0x00000008
-#define OCP_SHARED_O_SEMAPHORE4 0x0000000C
-#define OCP_SHARED_O_SEMAPHORE5 0x00000010
-#define OCP_SHARED_O_SEMAPHORE6 0x00000014
-#define OCP_SHARED_O_SEMAPHORE7 0x00000018
-#define OCP_SHARED_O_SEMAPHORE8 0x0000001C
-#define OCP_SHARED_O_SEMAPHORE9 0x00000020
-#define OCP_SHARED_O_SEMAPHORE10 \
-                                0x00000024
-
-#define OCP_SHARED_O_SEMAPHORE11 \
-                                0x00000028
-
-#define OCP_SHARED_O_SEMAPHORE12 \
-                                0x0000002C
-
-#define OCP_SHARED_O_IC_LOCKER_ID \
-                                0x00000030
-
-#define OCP_SHARED_O_MCU_SEMAPHORE_PEND \
-                                0x00000034
-
-#define OCP_SHARED_O_WL_SEMAPHORE_PEND \
-                                0x00000038
-
-#define OCP_SHARED_O_PLATFORM_DETECTION_RD_ONLY \
-                                0x0000003C
-
-#define OCP_SHARED_O_SEMAPHORES_STATUS_RD_ONLY \
-                                0x00000040
-
-#define OCP_SHARED_O_CC3XX_CONFIG_CTRL \
-                                0x00000044
-
-#define OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_LSB \
-                                0x00000048
-
-#define OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_MSB \
-                                0x0000004C
-
-#define OCP_SHARED_O_WLAN_ELP_WAKE_EN \
-                                0x00000050
-
-#define OCP_SHARED_O_DEVINIT_ROM_START_ADDR \
-                                0x00000054
-
-#define OCP_SHARED_O_DEVINIT_ROM_END_ADDR \
-                                0x00000058
-
-#define OCP_SHARED_O_SSBD_SEED  0x0000005C
-#define OCP_SHARED_O_SSBD_CHK   0x00000060
-#define OCP_SHARED_O_SSBD_POLY_SEL \
-                                0x00000064
-
-#define OCP_SHARED_O_SPARE_REG_0 \
-                                0x00000068
-
-#define OCP_SHARED_O_SPARE_REG_1 \
-                                0x0000006C
-
-#define OCP_SHARED_O_SPARE_REG_2 \
-                                0x00000070
-
-#define OCP_SHARED_O_SPARE_REG_3 \
-                                0x00000074
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_0 \
-                                0x000000A0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_1 \
-                                0x000000A4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_2 \
-                                0x000000A8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_3 \
-                                0x000000AC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_4 \
-                                0x000000B0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_5 \
-                                0x000000B4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_6 \
-                                0x000000B8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_7 \
-                                0x000000BC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_8 \
-                                0x000000C0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_9 \
-                                0x000000C4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_10 \
-                                0x000000C8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_11 \
-                                0x000000CC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_12 \
-                                0x000000D0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_13 \
-                                0x000000D4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_14 \
-                                0x000000D8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_15 \
-                                0x000000DC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_16 \
-                                0x000000E0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_17 \
-                                0x000000E4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_18 \
-                                0x000000E8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_19 \
-                                0x000000EC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_20 \
-                                0x000000F0
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_21 \
-                                0x000000F4
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_22 \
-                                0x000000F8
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_23 \
-                                0x000000FC
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_24 \
-                                0x00000100
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_25 \
-                                0x00000104
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_26 \
-                                0x00000108
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_27 \
-                                0x0000010C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_28 \
-                                0x00000110
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_29 \
-                                0x00000114
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_30 \
-                                0x00000118
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_31 \
-                                0x0000011C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_32 \
-                                0x00000120
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_33 \
-                                0x00000124
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_34 \
-                                0x00000128
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_35 \
-                                0x0000012C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_36 \
-                                0x00000130
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_37 \
-                                0x00000134
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_38 \
-                                0x00000138
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_39 \
-                                0x0000013C
-
-#define OCP_SHARED_O_GPIO_PAD_CONFIG_40 \
-                                0x00000140
-
-#define OCP_SHARED_O_GPIO_PAD_CMN_CONFIG \
-                                0x00000144  // This register provide control to
-                                            // GPIO_CC3XXV1 IO PAD. Common
-                                            // control signals to all bottom Die
-                                            // IO's are controlled via this.
-
-#define OCP_SHARED_O_D2D_DEV_PAD_CMN_CONFIG \
-                                0x00000148
-
-#define OCP_SHARED_O_D2D_TOSTACK_PAD_CONF \
-                                0x0000014C
-
-#define OCP_SHARED_O_D2D_MISC_PAD_CONF \
-                                0x00000150
-
-#define OCP_SHARED_O_SOP_CONF_OVERRIDE \
-                                0x00000154
-
-#define OCP_SHARED_O_CC3XX_DEBUGSS_STATUS \
-                                0x00000158
-
-#define OCP_SHARED_O_CC3XX_DEBUGMUX_SEL \
-                                0x0000015C
-
-#define OCP_SHARED_O_ALT_PC_VAL_NW \
-                                0x00000160
-
-#define OCP_SHARED_O_ALT_PC_VAL_APPS \
-                                0x00000164
-
-#define OCP_SHARED_O_SPARE_REG_4 \
-                                0x00000168
-
-#define OCP_SHARED_O_SPARE_REG_5 \
-                                0x0000016C
-
-#define OCP_SHARED_O_SH_SPI_CS_MASK \
-                                0x00000170
-
-#define OCP_SHARED_O_CC3XX_DEVICE_TYPE \
-                                0x00000174
-
-#define OCP_SHARED_O_MEM_TOPMUXCTRL_IFORCE \
-                                0x00000178
-
-#define OCP_SHARED_O_CC3XX_DEV_PACKAGE_DETECT \
-                                0x0000017C
-
-#define OCP_SHARED_O_AUTONMS_SPICLK_SEL \
-                                0x00000180
-
-#define OCP_SHARED_O_CC3XX_DEV_PADCONF \
-                                0x00000184
-
-#define OCP_SHARED_O_SPARE_REG_8 \
-                                0x00000188
-
-#define OCP_SHARED_O_SPARE_REG_6 \
-                                0x0000018C
-
-#define OCP_SHARED_O_SPARE_REG_7 \
-                                0x00000190
-
-#define OCP_SHARED_O_APPS_WLAN_ORBIT \
-                                0x00000194
-
-#define OCP_SHARED_O_APPS_WLAN_SCRATCH_PAD \
-                                0x00000198
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE1_MEM_SEMAPHORE1_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE1_MEM_SEMAPHORE1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE2_MEM_SEMAPHORE2_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE2_MEM_SEMAPHORE2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE3_MEM_SEMAPHORE3_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE3_MEM_SEMAPHORE3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE4_MEM_SEMAPHORE4_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE4_MEM_SEMAPHORE4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE5_MEM_SEMAPHORE5_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE5_MEM_SEMAPHORE5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE6_MEM_SEMAPHORE6_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE6_MEM_SEMAPHORE6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE7_MEM_SEMAPHORE7_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE7_MEM_SEMAPHORE7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE8 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE8_MEM_SEMAPHORE8_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE8_MEM_SEMAPHORE8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE9 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE9_MEM_SEMAPHORE9_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE9_MEM_SEMAPHORE9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE10 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE10_MEM_SEMAPHORE10_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE10_MEM_SEMAPHORE10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE11 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE11_MEM_SEMAPHORE11_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE11_MEM_SEMAPHORE11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORE12 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORE12_MEM_SEMAPHORE12_M \
-                                0x00000003  // General Purpose Semaphore for SW
-                                            // Usage. If any of the 2 bits of a
-                                            // given register is set to 1, it
-                                            // means that the semaphore is
-                                            // locked by one of the masters.
-                                            // Each bit represents a master IP
-                                            // as follows: {WLAN,NWP}. The JTAG
-                                            // cannot capture the semaphore but
-                                            // it can release it. As a master IP
-                                            // reads the semaphore, it will be
-                                            // caputed and the masters
-                                            // correlating bit will be set to 1
-                                            // (set upon read). As any IP writes
-                                            // to this address (independent of
-                                            // the written data) the semaphore
-                                            // will be set to 2'b00.
-
-#define OCP_SHARED_SEMAPHORE12_MEM_SEMAPHORE12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_IC_LOCKER_ID register.
-//
-//******************************************************************************
-#define OCP_SHARED_IC_LOCKER_ID_MEM_IC_LOCKER_ID_M \
-                                0x00000007  // This register is used for
-                                            // allowing only one master OCP to
-                                            // perform write transactions to the
-                                            // OCP slaves. Each bit represents
-                                            // an IP in the following format: {
-                                            // JTAG,WLAN, NWP mcu}. As any of
-                                            // the bits is set to one, the
-                                            // correlating IP is preventing the
-                                            // other IP's from performing write
-                                            // transactions to the slaves. As
-                                            // the Inter Connect is locked, the
-                                            // only the locking IP can write to
-                                            // the register and by that
-                                            // releasing the lock. 3'b000 => IC
-                                            // is not locked. 3'b001 => IC is
-                                            // locked by NWP mcu. 3'b010 => IC
-                                            // is locked by WLAN. 3'b100 => IC
-                                            // is locked by JTAG.
-
-#define OCP_SHARED_IC_LOCKER_ID_MEM_IC_LOCKER_ID_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_MCU_SEMAPHORE_PEND register.
-//
-//******************************************************************************
-#define OCP_SHARED_MCU_SEMAPHORE_PEND_MEM_MCU_SEMAPHORE_PEND_M \
-                                0x0000FFFF  // This register specifies the
-                                            // semaphore for which the NWP mcu
-                                            // is waiting to be released. It is
-                                            // set to the serial number of a
-                                            // given locked semaphore after it
-                                            // was read by the NWP mcu. Only
-                                            // [11:0] is used.
-
-#define OCP_SHARED_MCU_SEMAPHORE_PEND_MEM_MCU_SEMAPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_WL_SEMAPHORE_PEND register.
-//
-//******************************************************************************
-#define OCP_SHARED_WL_SEMAPHORE_PEND_MEM_WL_SEMAPHORE_PEND_M \
-                                0x0000FFFF  // This register specifies the
-                                            // semaphore for which the WLAN is
-                                            // waiting to be released. It is set
-                                            // to the serial number of a given
-                                            // locked semaphore after it was
-                                            // read by the WLAN. Only [11:0] is
-                                            // used.
-
-#define OCP_SHARED_WL_SEMAPHORE_PEND_MEM_WL_SEMAPHORE_PEND_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_PLATFORM_DETECTION_RD_ONLY register.
-//
-//******************************************************************************
-#define OCP_SHARED_PLATFORM_DETECTION_RD_ONLY_PLATFORM_DETECTION_M \
-                                0x0000FFFF  // This information serves the IPs
-                                            // for knowing in which platform are
-                                            // they integrated at: 0 = CC31XX.
-
-#define OCP_SHARED_PLATFORM_DETECTION_RD_ONLY_PLATFORM_DETECTION_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SEMAPHORES_STATUS_RD_ONLY register.
-//
-//******************************************************************************
-#define OCP_SHARED_SEMAPHORES_STATUS_RD_ONLY_SEMAPHORES_STATUS_M \
-                                0x00000FFF  // Captured/released semaphores
-                                            // status for the 12 semaphores.
-                                            // Each bit of the 12 bits
-                                            // represents a semaphore. 0 =>
-                                            // Semaphore Free. 1 => Semaphore
-                                            // Captured.
-
-#define OCP_SHARED_SEMAPHORES_STATUS_RD_ONLY_SEMAPHORES_STATUS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_CONFIG_CTRL register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_IC_TO_EN \
-                                0x00000010  // This bit is used to enable
-                                            // timeout mechanism for top_ocp_ic
-                                            // (for debug puropse). When 1 value
-                                            // , in case any ocp slave doesn't
-                                            // give sresponse within 16 cylcles
-                                            // top_ic will give error response
-                                            // itself to avoid bus hange.
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_ALT_PC_EN_APPS \
-                                0x00000008  // 1 bit should be accessible only
-                                            // in devinit. This will enable 0x4
-                                            // hack for apps processor
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_ALT_PC_EN_NW \
-                                0x00000004  // 1 bit, should be accessible only
-                                            // in devinit. This will enable 0x4
-                                            // hack for nw processor
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_EXTEND_NW_ROM \
-                                0x00000002  // When set NW can take over apps
-                                            // rom and flash via IDCODE bus.
-                                            // Apps will able to access this
-                                            // register only during devinit and
-                                            // reset value should be 0.
-
-#define OCP_SHARED_CC3XX_CONFIG_CTRL_MEM_WLAN_HOST_INTF_SEL \
-                                0x00000001  // When this bit is set to 0 WPSI
-                                            // host interface wil be selected,
-                                            // when this bit is set to 1 , WLAN
-                                            // host async bridge will be
-                                            // selected.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_LSB register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_LSB_MEM_SHARED_MEM_SEL_LSB_M \
-                                0x3FFFFFFF  // This register provides memss RAM
-                                            // column configuration for column 0
-                                            // to 9. 3 bits are allocated per
-                                            // column. This register is required
-                                            // to be configured before starting
-                                            // RAM access. Changing register
-                                            // setting while code is running
-                                            // will result into unpredictable
-                                            // memory behaviour. Register is
-                                            // supported to configured ones
-                                            // after core is booted up. 3 bit
-                                            // encoding per column is as
-                                            // follows: when 000 : WLAN, 001:
-                                            // NWP, 010: APPS, 011: PHY, 100:
-                                            // OCLA column 0 select: bit [2:0]
-                                            // :when 000 -> WLAN,001 -> NWP,010
-                                            // -> APPS, 011 -> PHY, 100 -> OCLA
-                                            // column 1 select: bit [5:3]
-                                            // :column 2 select: bit [8 : 6]:
-                                            // column 3 select : bit [11: 9]
-                                            // column 4 select : bit [14:12]
-                                            // column 5 select : bit [17:15]
-                                            // column 6 select : bit [20:18]
-                                            // column 7 select : bit [23:21]
-                                            // column 8 select : bit [26:24]
-                                            // column 9 select : bit [29:27]
-                                            // column 10 select
-
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_LSB_MEM_SHARED_MEM_SEL_LSB_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_SHARED_MEM_SEL_MSB register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_MSB_MEM_SHARED_MEM_SEL_MSB_M \
-                                0x00000FFF  // This register provides memss RAM
-                                            // column configuration for column
-                                            // 10 to 15. 3 bits are allocated
-                                            // per column. This register is
-                                            // required to be configured before
-                                            // starting RAM access. Changing
-                                            // register setting while code is
-                                            // running will result into
-                                            // unpredictable memory behaviour.
-                                            // Register is supported to
-                                            // configured ones after core is
-                                            // booted up. 3 bit encoding per
-                                            // column is as follows: when 000 :
-                                            // WLAN, 001: NWP, 010: APPS, 011:
-                                            // PHY, 100: OCLA column 11 select :
-                                            // bit [2:0] column 12 select : bit
-                                            // [5:3] column 13 select : bit [8 :
-                                            // 6] column 14 select :
-
-#define OCP_SHARED_CC3XX_SHARED_MEM_SEL_MSB_MEM_SHARED_MEM_SEL_MSB_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_WLAN_ELP_WAKE_EN register.
-//
-//******************************************************************************
-#define OCP_SHARED_WLAN_ELP_WAKE_EN_MEM_WLAN_ELP_WAKE_EN \
-                                0x00000001  // when '1' : signal will enabled
-                                            // ELP power doamin when '0': ELP is
-                                            // not powered up.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_DEVINIT_ROM_START_ADDR register.
-//
-//******************************************************************************
-#define OCP_SHARED_DEVINIT_ROM_START_ADDR_MEM_DEVINIT_ROM_START_ADDR_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module. This register is not used
-                                            // , similar register availble in
-                                            // GPRCM space.
-
-#define OCP_SHARED_DEVINIT_ROM_START_ADDR_MEM_DEVINIT_ROM_START_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_DEVINIT_ROM_END_ADDR register.
-//
-//******************************************************************************
-#define OCP_SHARED_DEVINIT_ROM_END_ADDR_MEM_DEVINIT_ROM_END_ADDR_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_DEVINIT_ROM_END_ADDR_MEM_DEVINIT_ROM_END_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_SEED register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_SEED_MEM_SSBD_SEED_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_SEED_MEM_SSBD_SEED_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_CHK register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_CHK_MEM_SSBD_CHK_M \
-                                0xFFFFFFFF  // 32 bit, Writable only during
-                                            // devinit, and whole 32 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_CHK_MEM_SSBD_CHK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SSBD_POLY_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_SSBD_POLY_SEL_MEM_SSBD_POLY_SEL_M \
-                                0x00000003  // 2 bit, Writable only during
-                                            // devinit, and whole 2 bit should
-                                            // be output of the config register
-                                            // module.
-
-#define OCP_SHARED_SSBD_POLY_SEL_MEM_SSBD_POLY_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_0 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_0_MEM_SPARE_REG_0_M \
-                                0xFFFFFFFF  // Devinit code should look for
-                                            // whether corresponding fuse is
-                                            // blown and if blown write to the
-                                            // 11th bit of this register to
-                                            // disable flshtst interface
-
-#define OCP_SHARED_SPARE_REG_0_MEM_SPARE_REG_0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_1_MEM_SPARE_REG_1_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_1_MEM_SPARE_REG_1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_2_MEM_SPARE_REG_2_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_2_MEM_SPARE_REG_2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_3_MEM_SPARE_REG_3_M \
-                                0xFFFFFFFF  // APPS Software register
-
-#define OCP_SHARED_SPARE_REG_3_MEM_SPARE_REG_3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_0 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_0_MEM_GPIO_PAD_CONFIG_0_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." "For example in
-                                            // case of I2C Value gets latched at
-                                            // rising edge of RET33.""" """ 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_0_MEM_GPIO_PAD_CONFIG_0_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_1 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_1_MEM_GPIO_PAD_CONFIG_1_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_1_MEM_GPIO_PAD_CONFIG_1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_2 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_2_MEM_GPIO_PAD_CONFIG_2_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_2_MEM_GPIO_PAD_CONFIG_2_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_3 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_3_MEM_GPIO_PAD_CONFIG_3_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_3_MEM_GPIO_PAD_CONFIG_3_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_4_MEM_GPIO_PAD_CONFIG_4_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_4_MEM_GPIO_PAD_CONFIG_4_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_5_MEM_GPIO_PAD_CONFIG_5_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_5_MEM_GPIO_PAD_CONFIG_5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_6_MEM_GPIO_PAD_CONFIG_6_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_6_MEM_GPIO_PAD_CONFIG_6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_7_MEM_GPIO_PAD_CONFIG_7_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_7_MEM_GPIO_PAD_CONFIG_7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_8 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_8_MEM_GPIO_PAD_CONFIG_8_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_8_MEM_GPIO_PAD_CONFIG_8_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_9 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_9_MEM_GPIO_PAD_CONFIG_9_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_9_MEM_GPIO_PAD_CONFIG_9_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_10 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_10_MEM_GPIO_PAD_CONFIG_10_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_10_MEM_GPIO_PAD_CONFIG_10_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_11 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_11_MEM_GPIO_PAD_CONFIG_11_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_11_MEM_GPIO_PAD_CONFIG_11_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_12 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_12_MEM_GPIO_PAD_CONFIG_12_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_12_MEM_GPIO_PAD_CONFIG_12_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_13 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_13_MEM_GPIO_PAD_CONFIG_13_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_13_MEM_GPIO_PAD_CONFIG_13_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_14 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_14_MEM_GPIO_PAD_CONFIG_14_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_14_MEM_GPIO_PAD_CONFIG_14_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_15 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_15_MEM_GPIO_PAD_CONFIG_15_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_15_MEM_GPIO_PAD_CONFIG_15_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_16 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_16_MEM_GPIO_PAD_CONFIG_16_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_16_MEM_GPIO_PAD_CONFIG_16_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_17 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_17_MEM_GPIO_PAD_CONFIG_17_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_17_MEM_GPIO_PAD_CONFIG_17_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_18 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_18_MEM_GPIO_PAD_CONFIG_18_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_18_MEM_GPIO_PAD_CONFIG_18_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_19 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_19_MEM_GPIO_PAD_CONFIG_19_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_19_MEM_GPIO_PAD_CONFIG_19_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_20 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_20_MEM_GPIO_PAD_CONFIG_20_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_20_MEM_GPIO_PAD_CONFIG_20_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_21 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_21_MEM_GPIO_PAD_CONFIG_21_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_21_MEM_GPIO_PAD_CONFIG_21_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_22 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_22_MEM_GPIO_PAD_CONFIG_22_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_22_MEM_GPIO_PAD_CONFIG_22_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_23 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_23_MEM_GPIO_PAD_CONFIG_23_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_23_MEM_GPIO_PAD_CONFIG_23_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_24 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_24_MEM_GPIO_PAD_CONFIG_24_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_24_MEM_GPIO_PAD_CONFIG_24_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_25 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_25_MEM_GPIO_PAD_CONFIG_25_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_25_MEM_GPIO_PAD_CONFIG_25_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_26 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_26_MEM_GPIO_PAD_CONFIG_26_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_26_MEM_GPIO_PAD_CONFIG_26_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_27 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_27_MEM_GPIO_PAD_CONFIG_27_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_27_MEM_GPIO_PAD_CONFIG_27_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_28 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_28_MEM_GPIO_PAD_CONFIG_28_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_28_MEM_GPIO_PAD_CONFIG_28_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_29 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_29_MEM_GPIO_PAD_CONFIG_29_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_29_MEM_GPIO_PAD_CONFIG_29_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_30 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_30_MEM_GPIO_PAD_CONFIG_30_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_30_MEM_GPIO_PAD_CONFIG_30_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_31 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_31_MEM_GPIO_PAD_CONFIG_31_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_31_MEM_GPIO_PAD_CONFIG_31_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_32 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_32_MEM_GPIO_PAD_CONFIG_32_M \
-                                0x00000FFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." it can be used
-                                            // for I2C type of peripherals. 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_32_MEM_GPIO_PAD_CONFIG_32_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_33 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_33_MEM_GPIO_PAD_CONFIG_33_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_33_MEM_GPIO_PAD_CONFIG_33_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_34 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_34_MEM_GPIO_PAD_CONFIG_34_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_34_MEM_GPIO_PAD_CONFIG_34_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_35 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_35_MEM_GPIO_PAD_CONFIG_35_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_35_MEM_GPIO_PAD_CONFIG_35_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_36 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_36_MEM_GPIO_PAD_CONFIG_36_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_36_MEM_GPIO_PAD_CONFIG_36_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_37 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_37_MEM_GPIO_PAD_CONFIG_37_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_37_MEM_GPIO_PAD_CONFIG_37_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_38 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_38_MEM_GPIO_PAD_CONFIG_38_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_38_MEM_GPIO_PAD_CONFIG_38_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_39 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_39_MEM_GPIO_PAD_CONFIG_39_M \
-                                0x0000003F  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 5 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'. IODEN and I8MAEN
-                                            // is diesabled for all development
-                                            // IO's. These signals are tied to
-                                            // logic level '0'. common control
-                                            // is implemented for I2MAEN,
-                                            // I4MAEN, WKPU, WKPD control .
-                                            // refer dev_pad_cmn_config register
-                                            // bits.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_39_MEM_GPIO_PAD_CONFIG_39_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CONFIG_40 register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CONFIG_40_MEM_GPIO_PAD_CONFIG_40_M \
-                                0x0007FFFF  // GPIO 0 register: "Bit 0 - 3 is
-                                            // used for PAD IO mode selection.
-                                            // io_register={ "" 0 =>
-                                            // """"CONFMODE[0]"""""" "" 1 =>
-                                            // """"CONFMODE[1]"""""" "" 2 =>
-                                            // """"CONFMODE[2]"""""" "" 3 =>
-                                            // """"CONFMODE[3]"""" 4 =>
-                                            // """"IODEN"""" --> When level ‘1’
-                                            // this disables the PMOS xtors of
-                                            // the output stages making them
-                                            // open-drain type." "For example in
-                                            // case of I2C Value gets latched at
-                                            // rising edge of RET33.""" """ 5 =>
-                                            // """"I2MAEN"""" --> Level ‘1’
-                                            // enables the approx 2mA output
-                                            // stage""" """ 6 => """"I4MAEN""""
-                                            // --> Level ‘1’ enables the approx
-                                            // 4mA output stage""" """ 7 =>
-                                            // """"I8MAEN"""" --> Level ‘1’
-                                            // enables the approx 8mA output
-                                            // stage. Note: any drive strength
-                                            // between 2mA and 14mA can be
-                                            // obtained with combination of 2mA
-                                            // 4mA and 8mA.""" """ 8 =>
-                                            // """"IWKPUEN"""" --> 10uA pull up
-                                            // (weak strength)""" """ 9 =>
-                                            // """"IWKPDEN"""" --> 10uA pull
-                                            // down (weak strength)""" """ 10 =>
-                                            // """"IOE_N"""" --> output enable
-                                            // value. level ‘0’ enables the IDO
-                                            // to PAD path. Else PAD is
-                                            // tristated (except for the PU/PD
-                                            // which are independent)." "Value
-                                            // gets latched at rising edge of
-                                            // RET33""" """ 11 =>""""
-                                            // IOE_N_OV"""" --> output enable
-                                            // overirde. when bit is set to
-                                            // logic '1' IOE_N (bit 4) value
-                                            // will control IO IOE_N signal else
-                                            // IOE_N is control via selected HW
-                                            // logic. strong PULL UP and PULL
-                                            // Down control is disabled for all
-                                            // IO's. both controls are tied to
-                                            // logic level '0'.
-
-#define OCP_SHARED_GPIO_PAD_CONFIG_40_MEM_GPIO_PAD_CONFIG_40_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_GPIO_PAD_CMN_CONFIG register.
-//
-//******************************************************************************
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_D2D_ISO_A_EN \
-                                0x00000080  // when '1' enable ISO A control to
-                                            // D2D Pads else ISO is disabled.
-                                            // For these PADS to be functional
-                                            // this signals should be set 0.
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_D2D_ISO_Y_EN \
-                                0x00000040  // when '1' enable ISO Y control to
-                                            // D2D Pads else ISO is disabled.
-                                            // For these PADS to be functional
-                                            // this signals should be set 0.
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_JTAG_IDIEN \
-                                0x00000020  // If level ‘1’ enables the PAD to
-                                            // ODI path for JTAG PADS [PAD 23,
-                                            // 24, 28, 29]. Else ODI is pulled
-                                            // ‘Low’ regardless of PAD level."
-                                            // "Value gets latched at rising
-                                            // edge of RET33.""" """
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTVAL_M \
-                                0x00000018  // 00’: hysteriris = 10% of VDDS
-                                            // (difference between upper and
-                                            // lower threshold of the schmit
-                                            // trigger) ‘01’: hysteriris = 20%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger) ‘10’: hysteriris = 30%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger) ‘11’: hysteriris = 40%
-                                            // of VDDS (difference between upper
-                                            // and lower threshold of the schmit
-                                            // trigger)" """
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTVAL_S 3
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_HYSTEN \
-                                0x00000004  // If logic ‘0’ there is no
-                                            // hysteresis. Set to ‘1’ to enable
-                                            // hysteresis. Leave the choice to
-                                            // customers"""
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_IBIASEN \
-                                0x00000002  // Normal functional operation set
-                                            // this to logic ‘1’ to increase the
-                                            // speed of the o/p buffer at the
-                                            // cost of 0.2uA static current
-                                            // consumption per IO. During IDDQ
-                                            // test and during Hibernate this
-                                            // would be forced to logic ‘0’.
-                                            // Value is not latched at rising
-                                            // edge of RET33.""
-
-#define OCP_SHARED_GPIO_PAD_CMN_CONFIG_MEM_PAD_IDIEN \
-                                0x00000001  // If level ‘1’ enables the PAD to
-                                            // ODI path. Else ODI is pulled
-                                            // ‘Low’ regardless of PAD level."
-                                            // "Value gets latched at rising
-                                            // edge of RET33.""" """
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_DEV_PAD_CMN_CONFIG register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_DEV_PAD_CMN_CONFIG_MEM_DEV_PAD_CMN_CONF_M \
-                                0x0000003F  // this register implements common
-                                            // IO control to all devement mode
-                                            // PADs; these PADs are DEV_PAD33 to
-                                            // DEV_PAD39. Bit [1:0] : Drive
-                                            // strength control. These 2 bits
-                                            // are connected to DEV PAD drive
-                                            // strength control. possible drive
-                                            // stregnths are 2MA, 4MA and 6 MA
-                                            // for the these IO's. bit 0: when
-                                            // set to logic value '1' enable 2MA
-                                            // drive strength for DEVPAD01 to 07
-                                            // bit 1: when set to logic value
-                                            // '1' enable 4MA drive strength for
-                                            // DEVPAD01 to 07. bit[3:2] : WK
-                                            // PULL UP and PULL down control.
-                                            // These 2 bits provide IWKPUEN and
-                                            // IWKPDEN control for all DEV IO's.
-                                            // bit 2: when set to logic value
-                                            // '1' enable WKPU to DEVPAD01 to 07
-                                            // bit 3: when set to logic value
-                                            // '1' enable WKPD to DEVPAD01 to
-                                            // 07. bit 4: WK PULL control for
-                                            // DEV_PKG_DETECT pin. when '1'
-                                            // pullup enabled else it is
-                                            // disable. bit 5: when set to logic
-                                            // value '1' enable 8MA drive
-                                            // strength for DEVPAD01 to 07.
-
-#define OCP_SHARED_D2D_DEV_PAD_CMN_CONFIG_MEM_DEV_PAD_CMN_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_TOSTACK_PAD_CONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_TOSTACK_PAD_CONF_MEM_D2D_TOSTACK_PAD_CONF_M \
-                                0x1FFFFFFF  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-                                            // this register control OEN2X pin
-                                            // of D2D TOSTACK PAD: OEN1X and
-                                            // OEN2X decoding is as follows:
-                                            // "when ""00"" :" "when ""01"" :
-                                            // dirve strength is '1' and output
-                                            // buffer enabled." "when ""10"" :
-                                            // drive strength is 2 and output
-                                            // buffer is disabled." "when ""11""
-                                            // : dirve strength is '3' and
-                                            // output buffer enabled."
-
-#define OCP_SHARED_D2D_TOSTACK_PAD_CONF_MEM_D2D_TOSTACK_PAD_CONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_D2D_MISC_PAD_CONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_POR_RESET_N \
-                                0x00000200  // This register provide OEN2X
-                                            // control to D2D PADS OEN/OEN2X
-                                            // control. When 0 : Act as input
-                                            // buffer else output buffer with
-                                            // drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_RESET_N \
-                                0x00000100  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_HCLK \
-                                0x00000080  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TCK \
-                                0x00000040  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TMS \
-                                0x00000020  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_JTAG_TDI \
-                                0x00000010  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_PIOSC \
-                                0x00000008  // OEN/OEN2X control. When 0 : Act
-                                            // as input buffer else output
-                                            // buffer with drive strength 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_SPARE_M \
-                                0x00000007  // D2D SPARE PAD OEN/OEN2X control.
-                                            // When 0: Act as input buffer else
-                                            // output buffer with drive strength
-                                            // 2.
-
-#define OCP_SHARED_D2D_MISC_PAD_CONF_MEM_D2D_SPARE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SOP_CONF_OVERRIDE register.
-//
-//******************************************************************************
-#define OCP_SHARED_SOP_CONF_OVERRIDE_MEM_SOP_CONF_OVERRIDE \
-                                0x00000001  // when '1' : signal will ovberride
-                                            // SoP setting of JTAG PADS. when
-                                            // '0': SoP setting will control
-                                            // JTAG PADs [ TDI, TDO, TMS, TCK]
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEBUGSS_STATUS register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_APPS_MCU_JTAGNSW \
-                                0x00000020  // This register contains debug
-                                            // subsystem status bits From APPS
-                                            // MCU status bit to indicates
-                                            // whether serial wire or 4 pins
-                                            // jtag select.
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_CJTAG_BYPASS_STATUS \
-                                0x00000010  // cjtag bypass bit select
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_SW_INTERFACE_SEL_STATUS \
-                                0x00000008  // serial wire interface bit select
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_APPS_TAP_ENABLE_STATUS \
-                                0x00000004  // apps tap enable status
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_TAPS_ENABLE_STATUS \
-                                0x00000002  // tap enable status
-
-#define OCP_SHARED_CC3XX_DEBUGSS_STATUS_SSBD_UNLOCK \
-                                0x00000001  // ssbd unlock status
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEBUGMUX_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEBUGMUX_SEL_MEM_CC3XX_DEBUGMUX_SEL_M \
-                                0x0000FFFF  // debug mux select register. Upper
-                                            // 8 bits are used for debug module
-                                            // selection. Lower 8 bit [7:0] used
-                                            // inside debug module for selecting
-                                            // module specific signals.
-                                            // Bits[15:8: when set x"00" : GPRCM
-                                            // debug bus. When "o1" : SDIO debug
-                                            // debug bus when x"02" :
-                                            // autonoumous SPI when x"03" :
-                                            // TOPIC when x"04": memss when
-                                            // x"25": mcu debug bus : APPS debug
-                                            // when x"45": mcu debug bus : NWP
-                                            // debug when x"65": mcu debug bus :
-                                            // AHB2VBUS debug when x"85": mcu
-                                            // debug bus : VBUS2HAB debug when
-                                            // x"95": mcu debug bus : RCM debug
-                                            // when x"A5": mcu debug bus :
-                                            // crypto debug when x"06": WLAN
-                                            // debug bus when x"07": debugss bus
-                                            // when x"08": ADC debug when x"09":
-                                            // SDIO PHY debug bus then "others"
-                                            // : no debug is selected
-
-#define OCP_SHARED_CC3XX_DEBUGMUX_SEL_MEM_CC3XX_DEBUGMUX_SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_ALT_PC_VAL_NW register.
-//
-//******************************************************************************
-#define OCP_SHARED_ALT_PC_VAL_NW_MEM_ALT_PC_VAL_NW_M \
-                                0xFFFFFFFF  // 32 bit. Program counter value
-                                            // for 0x4 address when Alt_pc_en_nw
-                                            // is set.
-
-#define OCP_SHARED_ALT_PC_VAL_NW_MEM_ALT_PC_VAL_NW_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_ALT_PC_VAL_APPS register.
-//
-//******************************************************************************
-#define OCP_SHARED_ALT_PC_VAL_APPS_MEM_ALT_PC_VAL_APPS_M \
-                                0xFFFFFFFF  // 32 bit. Program counter value
-                                            // for 0x4 address when
-                                            // Alt_pc_en_apps is set
-
-#define OCP_SHARED_ALT_PC_VAL_APPS_MEM_ALT_PC_VAL_APPS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_4 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_4_MEM_SPARE_REG_4_M \
-                                0xFFFFFFFE  // HW register
-
-#define OCP_SHARED_SPARE_REG_4_MEM_SPARE_REG_4_S 1
-#define OCP_SHARED_SPARE_REG_4_INVERT_D2D_INTERFACE \
-                                0x00000001  // Data to the top die launched at
-                                            // negative edge instead of positive
-                                            // edge.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_5 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_5_MEM_SPARE_REG_5_M \
-                                0xFFFFFFFF  // HW register
-
-#define OCP_SHARED_SPARE_REG_5_MEM_SPARE_REG_5_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SH_SPI_CS_MASK register.
-//
-//******************************************************************************
-#define OCP_SHARED_SH_SPI_CS_MASK_MEM_SH_SPI_CS_MASK_M \
-                                0x0000000F  // ( chip select 0 is unmasked
-                                            // after reset. When ‘1’ : CS is
-                                            // unmasked or else masked. Valid
-                                            // configurations are 1000, 0100,
-                                            // 0010 or 0001. Any other setting
-                                            // can lead to unpredictable
-                                            // behavior.
-
-#define OCP_SHARED_SH_SPI_CS_MASK_MEM_SH_SPI_CS_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEVICE_TYPE register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_reserved_M \
-                                0x00000060  // reserved bits tied off "00".
-
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_reserved_S 5
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_M \
-                                0x0000001F  // CC3XX Device type information.
-
-#define OCP_SHARED_CC3XX_DEVICE_TYPE_DEVICE_TYPE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_MEM_TOPMUXCTRL_IFORCE register.
-//
-//******************************************************************************
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE1_M \
-                                0x000000F0  // [4] 1: switch between
-                                            // WLAN_I2C_SCL and
-                                            // TOP_GPIO_PORT4_I2C closes 0:
-                                            // switch opens [5] 1: switch
-                                            // between WLAN_I2C_SCL and
-                                            // TOP_VSENSE_PORT closes 0: switch
-                                            // opens [6] 1: switch between
-                                            // WLAN_I2C_SCL and WLAN_ANA_TP4
-                                            // closes 0: switch opens [7]
-                                            // Reserved
-
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE1_S 4
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE_M \
-                                0x0000000F  // [0] 1: switch between
-                                            // WLAN_I2C_SDA and
-                                            // TOP_GPIO_PORT3_I2C closes 0:
-                                            // switch opens [1] 1: switch
-                                            // between WLAN_I2C_SDA and
-                                            // TOP_IFORCE_PORT closes 0: switch
-                                            // opens [2] 1: switch between
-                                            // WLAN_I2C_SDA and WLAN_ANA_TP3
-                                            // closes 0: switch opens [3]
-                                            // Reserved
-
-#define OCP_SHARED_MEM_TOPMUXCTRL_IFORCE_MEM_TOPMUXCTRL_IFORCE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEV_PACKAGE_DETECT register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEV_PACKAGE_DETECT_DEV_PKG_DETECT \
-                                0x00000001  // when '0' indicates package type
-                                            // is development.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_AUTONMS_SPICLK_SEL register.
-//
-//******************************************************************************
-#define OCP_SHARED_AUTONMS_SPICLK_SEL_MEM_AUTONOMOUS_BYPASS \
-                                0x00000002  // This bit is used to bypass MCPSI
-                                            // autonomous mode .if this bit is 1
-                                            // autonomous MCSPI logic will be
-                                            // bypassed and it will act as link
-                                            // SPI
-
-#define OCP_SHARED_AUTONMS_SPICLK_SEL_MEM_AUTONMS_SPICLK_SEL \
-                                0x00000001  // This bit is used in SPI
-                                            // Autonomous mode to switch clock
-                                            // from system clock to SPI clk that
-                                            // is coming from PAD. When value 1
-                                            // PAD SPI clk is used as system
-                                            // clock in LPDS mode by SPI as well
-                                            // as autonomous wrapper logic.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_CC3XX_DEV_PADCONF register.
-//
-//******************************************************************************
-#define OCP_SHARED_CC3XX_DEV_PADCONF_MEM_CC3XX_DEV_PADCONF_M \
-                                0x0000FFFF
-
-#define OCP_SHARED_CC3XX_DEV_PADCONF_MEM_CC3XX_DEV_PADCONF_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_IDMEM_TIM_UPDATE register.
-//
-//******************************************************************************
-#define OCP_SHARED_IDMEM_TIM_UPDATE_MEM_IDMEM_TIM_UPDATE_M \
-                                0xFFFFFFFF
-
-#define OCP_SHARED_IDMEM_TIM_UPDATE_MEM_IDMEM_TIM_UPDATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_6 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_6_MEM_SPARE_REG_6_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_6_MEM_SPARE_REG_6_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_SPARE_REG_7 register.
-//
-//******************************************************************************
-#define OCP_SHARED_SPARE_REG_7_MEM_SPARE_REG_7_M \
-                                0xFFFFFFFF  // NWP Software register
-
-#define OCP_SHARED_SPARE_REG_7_MEM_SPARE_REG_7_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_APPS_WLAN_ORBIT register.
-//
-//******************************************************************************
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_spare_M \
-                                0xFFFFFC00  // Spare bit
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_spare_S 10
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_status \
-                                0x00000200  // A rising edge on this bit
-                                            // indicates that the test case
-                                            // passes. This bit would be brought
-                                            // out on the pin interface during
-                                            // ORBIT.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_exec \
-                                0x00000100  // This register bit is writable by
-                                            // the FW and when set to 1 it
-                                            // indicates the start of a test
-                                            // execution. A failing edge on this
-                                            // bit indicates that the test
-                                            // execution is complete. This bit
-                                            // would be brought out on the pin
-                                            // interface during ORBIT.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_id_M \
-                                0x000000FC  // Implies the test case ID that
-                                            // needs to run.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_id_S 2
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_halt_proc \
-                                0x00000002  // This bit is used to trigger the
-                                            // execution of test cases within
-                                            // the (ROM based) IP.
-
-#define OCP_SHARED_APPS_WLAN_ORBIT_mem_orbit_test_mode \
-                                0x00000001  // When this bit is 1 it implies
-                                            // ORBIT mode of operation and the
-                                            // (ROM based) IP start the
-                                            // execution from a test case
-                                            // perspective
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// OCP_SHARED_O_APPS_WLAN_SCRATCH_PAD register.
-//
-//******************************************************************************
-#define OCP_SHARED_APPS_WLAN_SCRATCH_PAD_MEM_APPS_WLAN_SCRATCH_PAD_M \
-                                0xFFFFFFFF  // scratch pad register.
-
-#define OCP_SHARED_APPS_WLAN_SCRATCH_PAD_MEM_APPS_WLAN_SCRATCH_PAD_S 0
-
-
-
-#endif // __HW_OCP_SHARED_H__
diff --git a/ports/cc3200/hal/inc/hw_shamd5.h b/ports/cc3200/hal/inc/hw_shamd5.h
deleted file mode 100644
index cf6254f5d26cf..0000000000000
--- a/ports/cc3200/hal/inc/hw_shamd5.h
+++ /dev/null
@@ -1,1242 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_SHAMD5_H__
-#define __HW_SHAMD5_H__
-
-//*****************************************************************************
-//
-// The following are defines for the SHAMD5_P register offsets.
-//
-//*****************************************************************************
-#define SHAMD5_O_ODIGEST_A       0x00000000  // WRITE: Outer Digest [127:96] for
-                                            // MD5 [159:128] for SHA-1 [255:224]
-                                            // for SHA-2 / HMAC Key [31:0] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2
-#define SHAMD5_O_ODIGEST_B       0x00000004  // WRITE: Outer Digest [95:64] for
-                                            // MD5 [127:96] for SHA-1 [223:192]
-                                            // for SHA-2 / HMAC Key [63:32] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2
-#define SHAMD5_O_ODIGEST_C       0x00000008  // WRITE: Outer Digest [63:32] for
-                                            // MD5 [95:64] for SHA-1 [191:160]
-                                            // for SHA-2 / HMAC Key [95:64] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA-2
-#define SHAMD5_O_ODIGEST_D       0x0000000C  // WRITE: Outer Digest [31:0] for
-                                            // MD5 [63:31] for SHA-1 [159:128]
-                                            // for SHA-2 / HMAC Key [127:96] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2
-#define SHAMD5_O_ODIGEST_E       0x00000010  // WRITE: Outer Digest [31:0] for
-                                            // SHA-1 [127:96] for SHA-2 / HMAC
-                                            // Key [159:128] for HMAC key proc
-                                            // READ: Outer Digest [31:0] for
-                                            // SHA-1 [127:96] for SHA-2
-#define SHAMD5_O_ODIGEST_F       0x00000014  // WRITE: Outer Digest [95:64] for
-                                            // SHA-2 / HMAC Key [191:160] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [95:64] for SHA-2
-#define SHAMD5_O_ODIGEST_G       0x00000018  // WRITE: Outer Digest [63:32] for
-                                            // SHA-2 / HMAC Key [223:192] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [63:32] for SHA-2
-#define SHAMD5_O_ODIGEST_H       0x0000001C  // WRITE: Outer Digest [31:0] for
-                                            // SHA-2 / HMAC Key [255:224] for
-                                            // HMAC key proc READ: Outer Digest
-                                            // [31:0] for SHA-2
-#define SHAMD5_O_IDIGEST_A       0x00000020  // WRITE: Inner / Initial Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2 / HMAC
-                                            // Key [287:256] for HMAC key proc
-                                            // READ: Intermediate / Inner Digest
-                                            // [127:96] for MD5 [159:128] for
-                                            // SHA-1 [255:224] for SHA-2 /
-                                            // Result Digest/MAC [127:96] for
-                                            // MD5 [159:128] for SHA-1 [223:192]
-                                            // for SHA-2 224 [255:224] for SHA-2
-                                            // 256
-#define SHAMD5_O_IDIGEST_B       0x00000024  // WRITE: Inner / Initial Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2 / HMAC
-                                            // Key [319:288] for HMAC key proc
-                                            // READ: Intermediate / Inner Digest
-                                            // [95:64] for MD5 [127:96] for
-                                            // SHA-1 [223:192] for SHA-2 /
-                                            // Result Digest/MAC [95:64] for MD5
-                                            // [127:96] for SHA-1 [191:160] for
-                                            // SHA-2 224 [223:192] for SHA-2 256
-#define SHAMD5_O_IDIGEST_C       0x00000028  // WRITE: Inner / Initial Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA- 2 / HMAC Key
-                                            // [351:320] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [63:32] for MD5 [95:64] for SHA-1
-                                            // [191:160] for SHA-2 / Result
-                                            // Digest/MAC [63:32] for MD5
-                                            // [95:64] for SHA-1 [159:128] for
-                                            // SHA-2 224 [191:160] for SHA-2 256
-#define SHAMD5_O_IDIGEST_D       0x0000002C  // WRITE: Inner / Initial Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2 / HMAC Key
-                                            // [383:352] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [31:0] for MD5 [63:32] for SHA-1
-                                            // [159:128] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for MD5 [63:32]
-                                            // for SHA-1 [127:96] for SHA-2 224
-                                            // [159:128] for SHA-2 256
-#define SHAMD5_O_IDIGEST_E       0x00000030  // WRITE: Inner / Initial Digest
-                                            // [31:0] for SHA-1 [127:96] for
-                                            // SHA-2 / HMAC Key [415:384] for
-                                            // HMAC key proc READ: Intermediate
-                                            // / Inner Digest [31:0] for SHA-1
-                                            // [127:96] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-1
-                                            // [95:64] for SHA-2 224 [127:96]
-                                            // for SHA-2 256
-#define SHAMD5_O_IDIGEST_F       0x00000034  // WRITE: Inner / Initial Digest
-                                            // [95:64] for SHA-2 / HMAC Key
-                                            // [447:416] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [95:64] for SHA-2 / Result
-                                            // Digest/MAC [63:32] for SHA-2 224
-                                            // [95:64] for SHA-2 256
-#define SHAMD5_O_IDIGEST_G       0x00000038  // WRITE: Inner / Initial Digest
-                                            // [63:32] for SHA-2 / HMAC Key
-                                            // [479:448] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [63:32] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-2 224
-                                            // [63:32] for SHA-2 256
-#define SHAMD5_O_IDIGEST_H       0x0000003C  // WRITE: Inner / Initial Digest
-                                            // [31:0] for SHA-2 / HMAC Key
-                                            // [511:480] for HMAC key proc READ:
-                                            // Intermediate / Inner Digest
-                                            // [31:0] for SHA-2 / Result
-                                            // Digest/MAC [31:0] for SHA-2 256
-#define SHAMD5_O_DIGEST_COUNT    0x00000040  // WRITE: Initial Digest Count
-                                            // ([31:6] only [5:0] assumed 0)
-                                            // READ: Result / IntermediateDigest
-                                            // Count The initial digest byte
-                                            // count for hash/HMAC continue
-                                            // operations (HMAC Key Processing =
-                                            // 0 and Use Algorithm Constants =
-                                            // 0) on the Secure World must be
-                                            // written to this register prior to
-                                            // starting the operation by writing
-                                            // to S_HASH_MODE. When either HMAC
-                                            // Key Processing is 1 or Use
-                                            // Algorithm Constants is 1 this
-                                            // register does not need to be
-                                            // written it will be overwritten
-                                            // with 64 (1 hash block of key XOR
-                                            // ipad) or 0 respectively
-                                            // automatically. When starting a
-                                            // HMAC operation from pre-computes
-                                            // (HMAC Key Processing is 0) then
-                                            // the value 64 must be written here
-                                            // to compensate for the appended
-                                            // key XOR ipad block. Note that the
-                                            // value written should always be a
-                                            // 64 byte multiple the lower 6 bits
-                                            // written are ignored. The updated
-                                            // digest byte count (initial digest
-                                            // byte count + bytes processed) can
-                                            // be read from this register when
-                                            // the status register indicates
-                                            // that the operation is done or
-                                            // suspended due to a context switch
-                                            // request or when a Secure World
-                                            // context out DMA is requested. In
-                                            // Advanced DMA mode when not
-                                            // suspended with a partial result
-                                            // reading the SHAMD5_DIGEST_COUNT
-                                            // register triggers the Hash/HMAC
-                                            // Engine to start the next context
-                                            // input DMA. Therefore reading the
-                                            // SHAMD5_DIGEST_COUNT register
-                                            // should always be the last
-                                            // context-read action if not
-                                            // suspended with a partial result
-                                            // (i.e. PartHashReady interrupt not
-                                            // pending).
-#define SHAMD5_O_MODE            0x00000044  // Register SHAMD5_MODE
-#define SHAMD5_O_LENGTH          0x00000048  // WRITE: Block Length / Remaining
-                                            // Byte Count (bytes) READ:
-                                            // Remaining Byte Count. The value
-                                            // programmed MUST be a 64-byte
-                                            // multiple if Close Hash is set to
-                                            // 0. This register is also the
-                                            // trigger to start processing: once
-                                            // this register is written the core
-                                            // will commence requesting input
-                                            // data via DMA or IRQ (if
-                                            // programmed length > 0) and start
-                                            // processing. The remaining byte
-                                            // count for the active operation
-                                            // can be read from this register
-                                            // when the interrupt status
-                                            // register indicates that the
-                                            // operation is suspended due to a
-                                            // context switch request.
-#define SHAMD5_O_DATA0_IN        0x00000080  // Data input message 0
-#define SHAMD5_O_DATA1_IN        0x00000084  // Data input message 1
-#define SHAMD5_O_DATA2_IN        0x00000088  // Data input message 2
-#define SHAMD5_O_DATA3_IN        0x0000008C  // Data input message 3
-#define SHAMD5_O_DATA4_IN        0x00000090  // Data input message 4
-#define SHAMD5_O_DATA5_IN        0x00000094  // Data input message 5
-#define SHAMD5_O_DATA6_IN        0x00000098  // Data input message 6
-#define SHAMD5_O_DATA7_IN        0x0000009C  // Data input message 7
-#define SHAMD5_O_DATA8_IN        0x000000A0  // Data input message 8
-#define SHAMD5_O_DATA9_IN        0x000000A4  // Data input message 9
-#define SHAMD5_O_DATA10_IN       0x000000A8  // Data input message 10
-#define SHAMD5_O_DATA11_IN       0x000000AC  // Data input message 11
-#define SHAMD5_O_DATA12_IN       0x000000B0  // Data input message 12
-#define SHAMD5_O_DATA13_IN       0x000000B4  // Data input message 13
-#define SHAMD5_O_DATA14_IN       0x000000B8  // Data input message 14
-#define SHAMD5_O_DATA15_IN       0x000000BC  // Data input message 15
-#define SHAMD5_O_REVISION        0x00000100  // Register SHAMD5_REV
-#define SHAMD5_O_SYSCONFIG       0x00000110  // Register SHAMD5_SYSCONFIG
-#define SHAMD5_O_SYSSTATUS       0x00000114  // Register SHAMD5_SYSSTATUS
-#define SHAMD5_O_IRQSTATUS       0x00000118  // Register SHAMD5_IRQSTATUS
-#define SHAMD5_O_IRQENABLE       0x0000011C  // Register SHAMD5_IRQENABLE. The
-                                            // SHAMD5_IRQENABLE register contains
-                                            // an enable bit for each unique
-                                            // interrupt for the public side. An
-                                            // interrupt is enabled when both
-                                            // the global enable in
-                                            // SHAMD5_SYSCONFIG (PIT_en) and the
-                                            // bit in this register are both set
-                                            // to 1. An interrupt that is
-                                            // enabled is propagated to the
-                                            // SINTREQUEST_P output. Please note
-                                            // that the dedicated partial hash
-                                            // output (SINTREQUEST_PART_P) is
-                                            // not affected by this register it
-                                            // is only affected by the global
-                                            // enable SHAMD5_SYSCONFIG (PIT_en).
-#define SHAMD5_O_HASH512_ODIGEST_A \
-                                0x00000200
-
-#define SHAMD5_O_HASH512_ODIGEST_B \
-                                0x00000204
-
-#define SHAMD5_O_HASH512_ODIGEST_C \
-                                0x00000208
-
-#define SHAMD5_O_HASH512_ODIGEST_D \
-                                0x0000020C
-
-#define SHAMD5_O_HASH512_ODIGEST_E \
-                                0x00000210
-
-#define SHAMD5_O_HASH512_ODIGEST_F \
-                                0x00000214
-
-#define SHAMD5_O_HASH512_ODIGEST_G \
-                                0x00000218
-
-#define SHAMD5_O_HASH512_ODIGEST_H \
-                                0x0000021C
-
-#define SHAMD5_O_HASH512_ODIGEST_I \
-                                0x00000220
-
-#define SHAMD5_O_HASH512_ODIGEST_J \
-                                0x00000224
-
-#define SHAMD5_O_HASH512_ODIGEST_K \
-                                0x00000228
-
-#define SHAMD5_O_HASH512_ODIGEST_L \
-                                0x0000022C
-
-#define SHAMD5_O_HASH512_ODIGEST_M \
-                                0x00000230
-
-#define SHAMD5_O_HASH512_ODIGEST_N \
-                                0x00000234
-
-#define SHAMD5_O_HASH512_ODIGEST_O \
-                                0x00000238
-
-#define SHAMD5_O_HASH512_ODIGEST_P \
-                                0x0000023C
-
-#define SHAMD5_O_HASH512_IDIGEST_A \
-                                0x00000240
-
-#define SHAMD5_O_HASH512_IDIGEST_B \
-                                0x00000244
-
-#define SHAMD5_O_HASH512_IDIGEST_C \
-                                0x00000248
-
-#define SHAMD5_O_HASH512_IDIGEST_D \
-                                0x0000024C
-
-#define SHAMD5_O_HASH512_IDIGEST_E \
-                                0x00000250
-
-#define SHAMD5_O_HASH512_IDIGEST_F \
-                                0x00000254
-
-#define SHAMD5_O_HASH512_IDIGEST_G \
-                                0x00000258
-
-#define SHAMD5_O_HASH512_IDIGEST_H \
-                                0x0000025C
-
-#define SHAMD5_O_HASH512_IDIGEST_I \
-                                0x00000260
-
-#define SHAMD5_O_HASH512_IDIGEST_J \
-                                0x00000264
-
-#define SHAMD5_O_HASH512_IDIGEST_K \
-                                0x00000268
-
-#define SHAMD5_O_HASH512_IDIGEST_L \
-                                0x0000026C
-
-#define SHAMD5_O_HASH512_IDIGEST_M \
-                                0x00000270
-
-#define SHAMD5_O_HASH512_IDIGEST_N \
-                                0x00000274
-
-#define SHAMD5_O_HASH512_IDIGEST_O \
-                                0x00000278
-
-#define SHAMD5_O_HASH512_IDIGEST_P \
-                                0x0000027C
-
-#define SHAMD5_O_HASH512_DIGEST_COUNT \
-                                0x00000280
-
-#define SHAMD5_O_HASH512_MODE    0x00000284
-#define SHAMD5_O_HASH512_LENGTH  0x00000288
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_A_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_A_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_B_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_B_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_C_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_C_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_D_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_D_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_E_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_E_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_F_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_F_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_G_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_G_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_ODIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_ODIGEST_H_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_ODIGEST_H_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_A_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_A_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_B_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_B_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_C_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_C_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_D_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_D_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_E_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_E_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_F_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_F_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_G_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_G_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IDIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_IDIGEST_H_DATA_M  0xFFFFFFFF  // data
-#define SHAMD5_IDIGEST_H_DATA_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_DIGEST_COUNT register.
-//
-//******************************************************************************
-#define SHAMD5_DIGEST_COUNT_DATA_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DIGEST_COUNT_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_MODE register.
-//
-//******************************************************************************
-#define SHAMD5_MODE_HMAC_OUTER_HASH \
-                                0x00000080  // The HMAC Outer Hash is performed
-                                            // on the hash digest when the inner
-                                            // hash hash finished (block length
-                                            // exhausted and final hash
-                                            // performed if close_hash is 1).
-                                            // This bit should normally be set
-                                            // together with close_hash to
-                                            // finish the inner hash first or
-                                            // Block Length should be zero (HMAC
-                                            // continue with the just outer hash
-                                            // to be done). Auto cleared
-                                            // internally when outer hash
-                                            // performed. 0 No operation 1 hmac
-                                            // processing
-
-#define SHAMD5_MODE_HMAC_KEY_PROC \
-                                0x00000020  // Performs HMAC key processing on
-                                            // the 512 bit HMAC key loaded into
-                                            // the SHAMD5_IDIGEST_{A to H} and
-                                            // SHAMD5_ODIGEST_{A to H} register
-                                            // block. Once HMAC key processing
-                                            // is finished this bit is
-                                            // automatically cleared and the
-                                            // resulting Inner and Outer digest
-                                            // is available from
-                                            // SHAMD5_IDIGEST_{A to H} and
-                                            // SHAMD5_ODIGEST_{A to H}
-                                            // respectively after which regular
-                                            // hash processing (using
-                                            // SHAMD5_IDIGEST_{A to H} as initial
-                                            // digest) will commence until the
-                                            // Block Length is exhausted. 0 No
-                                            // operation. 1 Hmac processing.
-
-#define SHAMD5_MODE_CLOSE_HASH   0x00000010  // Performs the padding the
-                                            // hash/HMAC will be 'closed' at the
-                                            // end of the block as per
-                                            // MD5/SHA-1/SHA-2 specification
-                                            // (i.e. appropriate padding is
-                                            // added) or no padding is done
-                                            // allowing the hash to be continued
-                                            // later. However if the hash/HMAC
-                                            // is not closed then the Block
-                                            // Length MUST be a multiple of 64
-                                            // bytes to ensure correct
-                                            // operation. Auto cleared
-                                            // internally when hash closed. 0 No
-                                            // padding hash computation can be
-                                            // contimued. 1 Last packet will be
-                                            // padded.
-#define SHAMD5_MODE_ALGO_CONSTANT \
-                                0x00000008  // The initial digest register will
-                                            // be overwritten with the algorithm
-                                            // constants for the selected
-                                            // algorithm when hashing and the
-                                            // initial digest count register
-                                            // will be reset to 0. This will
-                                            // start a normal hash operation.
-                                            // When continuing an existing hash
-                                            // or when performing an HMAC
-                                            // operation this register must be
-                                            // set to 0 and the
-                                            // intermediate/inner digest or HMAC
-                                            // key and digest count need to be
-                                            // written to the context input
-                                            // registers prior to writing
-                                            // SHAMD5_MODE. Auto cleared
-                                            // internally after first block
-                                            // processed. 0 Use pre-calculated
-                                            // digest (from an other operation)
-                                            // 1 Use constants of the selected
-                                            // algo.
-
-#define SHAMD5_MODE_ALGO_M       0x00000006  // These bits select the hash
-                                            // algorithm to be used for
-                                            // processing: 0x0 md5_128 algorithm
-                                            // 0x1 sha1_160 algorithm 0x2
-                                            // sha2_224 algorithm 0x3 sha2_256
-                                            // algorithm
-#define SHAMD5_MODE_ALGO_S       1
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_LENGTH register.
-//
-//******************************************************************************
-#define SHAMD5_LENGTH_DATA_M     0xFFFFFFFF  // data
-#define SHAMD5_LENGTH_DATA_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA0_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA0_IN_DATA0_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA0_IN_DATA0_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA1_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA1_IN_DATA1_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA1_IN_DATA1_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA2_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA2_IN_DATA2_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA2_IN_DATA2_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA3_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA3_IN_DATA3_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA3_IN_DATA3_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA4_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA4_IN_DATA4_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA4_IN_DATA4_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA5_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA5_IN_DATA5_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA5_IN_DATA5_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA6_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA6_IN_DATA6_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA6_IN_DATA6_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA7_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA7_IN_DATA7_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA7_IN_DATA7_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA8_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA8_IN_DATA8_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA8_IN_DATA8_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA9_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA9_IN_DATA9_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA9_IN_DATA9_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA10_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA10_IN_DATA10_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA10_IN_DATA10_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA11_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA11_IN_DATA11_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA11_IN_DATA11_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA12_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA12_IN_DATA12_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA12_IN_DATA12_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA13_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA13_IN_DATA13_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA13_IN_DATA13_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA14_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA14_IN_DATA14_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA14_IN_DATA14_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_DATA15_IN register.
-//
-//******************************************************************************
-#define SHAMD5_DATA15_IN_DATA15_IN_M \
-                                0xFFFFFFFF  // data
-
-#define SHAMD5_DATA15_IN_DATA15_IN_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_REVISION register.
-//
-//******************************************************************************
-#define SHAMD5_REVISION_SCHEME_M 0xC0000000
-#define SHAMD5_REVISION_SCHEME_S 30
-#define SHAMD5_REVISION_FUNC_M   0x0FFF0000  // Function indicates a software
-                                            // compatible module family. If
-                                            // there is no level of software
-                                            // compatibility a new Func number
-                                            // (and hence REVISION) should be
-                                            // assigned.
-#define SHAMD5_REVISION_FUNC_S   16
-#define SHAMD5_REVISION_R_RTL_M  0x0000F800  // RTL Version (R) maintained by IP
-                                            // design owner. RTL follows a
-                                            // numbering such as X.Y.R.Z which
-                                            // are explained in this table. R
-                                            // changes ONLY when: (1) PDS
-                                            // uploads occur which may have been
-                                            // due to spec changes (2) Bug fixes
-                                            // occur (3) Resets to '0' when X or
-                                            // Y changes. Design team has an
-                                            // internal 'Z' (customer invisible)
-                                            // number which increments on every
-                                            // drop that happens due to DV and
-                                            // RTL updates. Z resets to 0 when R
-                                            // increments.
-#define SHAMD5_REVISION_R_RTL_S  11
-#define SHAMD5_REVISION_X_MAJOR_M \
-                                0x00000700  // Major Revision (X) maintained by
-                                            // IP specification owner. X changes
-                                            // ONLY when: (1) There is a major
-                                            // feature addition. An example
-                                            // would be adding Master Mode to
-                                            // Utopia Level2. The Func field (or
-                                            // Class/Type in old PID format)
-                                            // will remain the same. X does NOT
-                                            // change due to: (1) Bug fixes (2)
-                                            // Change in feature parameters.
-
-#define SHAMD5_REVISION_X_MAJOR_S 8
-#define SHAMD5_REVISION_CUSTOM_M 0x000000C0
-#define SHAMD5_REVISION_CUSTOM_S 6
-#define SHAMD5_REVISION_Y_MINOR_M \
-                                0x0000003F  // Minor Revision (Y) maintained by
-                                            // IP specification owner. Y changes
-                                            // ONLY when: (1) Features are
-                                            // scaled (up or down). Flexibility
-                                            // exists in that this feature
-                                            // scalability may either be
-                                            // represented in the Y change or a
-                                            // specific register in the IP that
-                                            // indicates which features are
-                                            // exactly available. (2) When
-                                            // feature creeps from Is-Not list
-                                            // to Is list. But this may not be
-                                            // the case once it sees silicon; in
-                                            // which case X will change. Y does
-                                            // NOT change due to: (1) Bug fixes
-                                            // (2) Typos or clarifications (3)
-                                            // major functional/feature
-                                            // change/addition/deletion. Instead
-                                            // these changes may be reflected
-                                            // via R S X as applicable. Spec
-                                            // owner maintains a
-                                            // customer-invisible number 'S'
-                                            // which changes due to: (1)
-                                            // Typos/clarifications (2) Bug
-                                            // documentation. Note that this bug
-                                            // is not due to a spec change but
-                                            // due to implementation.
-                                            // Nevertheless the spec tracks the
-                                            // IP bugs. An RTL release (say for
-                                            // silicon PG1.1) that occurs due to
-                                            // bug fix should document the
-                                            // corresponding spec number (X.Y.S)
-                                            // in its release notes.
-
-#define SHAMD5_REVISION_Y_MINOR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_SYSCONFIG register.
-//
-//******************************************************************************
-#define SHAMD5_SYSCONFIG_PADVANCED \
-                                0x00000080  // If set to 1 Advanced mode is
-                                            // enabled for the Secure World. If
-                                            // set to 0 Legacy mode is enabled
-                                            // for the Secure World.
-
-#define SHAMD5_SYSCONFIG_PCONT_SWT \
-                                0x00000040  // Finish all pending data and
-                                            // context DMA input requests (but
-                                            // will not assert any new requests)
-                                            // finish processing all data in the
-                                            // module and provide a saved
-                                            // context (partial hash result
-                                            // updated digest count remaining
-                                            // length updated mode information
-                                            // where applicable) for the last
-                                            // operation that was interrupted so
-                                            // that it can be resumed later.
-
-#define SHAMD5_SYSCONFIG_PDMA_EN 0x00000008
-#define SHAMD5_SYSCONFIG_PIT_EN  0x00000004
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_SYSSTATUS register.
-//
-//******************************************************************************
-#define SHAMD5_SYSSTATUS_RESETDONE \
-                                0x00000001  // data
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IRQSTATUS register.
-//
-//******************************************************************************
-#define SHAMD5_IRQSTATUS_CONTEXT_READY \
-                                0x00000008  // indicates that the secure side
-                                            // context input registers are
-                                            // available for a new context for
-                                            // the next packet to be processed.
-
-#define SHAMD5_IRQSTATUS_PARTHASH_READY \
-                                0x00000004  // After a secure side context
-                                            // switch request this bit will read
-                                            // as 1 indicating that the saved
-                                            // context is available from the
-                                            // secure side context output
-                                            // registers. Note that if the
-                                            // context switch request coincides
-                                            // with a final hash (when hashing)
-                                            // or an outer hash (when doing
-                                            // HMAC) that PartHashReady will not
-                                            // become active but a regular
-                                            // Output Ready will occur instead
-                                            // (indicating that the result is
-                                            // final and therefore no
-                                            // continuation is required).
-
-#define SHAMD5_IRQSTATUS_INPUT_READY \
-                                0x00000002  // indicates that the secure side
-                                            // data FIFO is ready to receive the
-                                            // next 64 byte data block.
-
-#define SHAMD5_IRQSTATUS_OUTPUT_READY \
-                                0x00000001  // Indicates that a (partial)
-                                            // result or saved context is
-                                            // available from the secure side
-                                            // context output registers.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the SHAMD5_O_IRQENABLE register.
-//
-//******************************************************************************
-#define SHAMD5_IRQENABLE_M_CONTEXT_READY \
-                                0x00000008  // mask for context ready
-
-#define SHAMD5_IRQENABLE_M_PARTHASH_READY \
-                                0x00000004  // mask for partial hash
-
-#define SHAMD5_IRQENABLE_M_INPUT_READY \
-                                0x00000002  // mask for input_ready
-
-#define SHAMD5_IRQENABLE_M_OUTPUT_READY \
-                                0x00000001  // mask for output_ready
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_A_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_A_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_B_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_B_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_C_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_C_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_D_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_D_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_E_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_E_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_F_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_F_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_G_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_G_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_H_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_H_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_I register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_I_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_I_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_J register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_J_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_J_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_K register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_K_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_K_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_L register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_L_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_L_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_M register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_M_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_M_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_N register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_N_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_N_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_O register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_O_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_O_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_ODIGEST_P register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_ODIGEST_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_ODIGEST_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_A register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_A_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_A_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_B register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_B_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_B_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_C register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_C_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_C_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_D register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_D_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_D_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_E register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_E_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_E_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_F register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_F_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_F_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_G register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_G_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_G_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_H register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_H_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_H_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_I register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_I_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_I_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_J register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_J_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_J_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_K register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_K_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_K_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_L register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_L_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_L_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_M register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_M_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_M_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_N register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_N_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_N_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_O register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_O_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_O_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_IDIGEST_P register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_IDIGEST_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_IDIGEST_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_DIGEST_COUNT register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_DIGEST_COUNT_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_DIGEST_COUNT_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_MODE register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_MODE_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_MODE_DATA_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// SHAMD5_O_HASH512_LENGTH register.
-//
-//******************************************************************************
-#define SHAMD5_HASH512_LENGTH_DATA_M \
-                                0xFFFFFFFF
-
-#define SHAMD5_HASH512_LENGTH_DATA_S 0
-
-
-
-#endif // __HW_SHAMD5_H__
diff --git a/ports/cc3200/hal/inc/hw_stack_die_ctrl.h b/ports/cc3200/hal/inc/hw_stack_die_ctrl.h
deleted file mode 100644
index eba31e4f07513..0000000000000
--- a/ports/cc3200/hal/inc/hw_stack_die_ctrl.h
+++ /dev/null
@@ -1,764 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-
-#ifndef __HW_STACK_DIE_CTRL_H__
-#define __HW_STACK_DIE_CTRL_H__
-
-//*****************************************************************************
-//
-// The following are defines for the STACK_DIE_CTRL register offsets.
-//
-//*****************************************************************************
-#define STACK_DIE_CTRL_O_STK_UP_RESET \
-                                0x00000000  // Can be written only by Base
-                                            // Processor. Writing to this
-                                            // register will reset the stack
-                                            // processor reset will be
-                                            // de-asserted upon clearing this
-                                            // register.
-
-#define STACK_DIE_CTRL_O_SR_MASTER_PRIORITY \
-                                0x00000004  // This register defines who among
-                                            // base processor and stack
-                                            // processor have highest priority
-                                            // for Sram Access. Can be written
-                                            // only by Base Processor.
-
-#define STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK2 \
-                                0x00000008  // In Spinlock mode this Register
-                                            // defines who among base processor
-                                            // and stack processor have access
-                                            // to Sram Bank2 right now. In
-                                            // Handshake mode this Register
-                                            // defines who among base processor
-                                            // and stack processor have access
-                                            // to Sram Bank2 and Bank3 right
-                                            // now. Its Clear only register and
-                                            // is set by hardware. Lower bit can
-                                            // be cleared only by Base Processor
-                                            // and Upper bit Cleared only by the
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK2 \
-                                0x0000000C  // In Spinlock mode whenever Base
-                                            // processor wants the access to
-                                            // Sram Bank2 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by Stack
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK2 \
-                                0x00000010  // In Spinlock mode Whenever Stack
-                                            // processor wants the access to
-                                            // Sram Bank2 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by the Base
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK3 \
-                                0x00000014  // Register defines who among base
-                                            // processor and stack processor
-                                            // have access to Sram Bank3 right
-                                            // now. Its Clear only register and
-                                            // is set by hardware. Lower bit can
-                                            // be cleared only by Base Processor
-                                            // and Upper bit Cleared only by the
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK3 \
-                                0x00000018  // In Spinlock mode whenever Base
-                                            // processor wants the access to
-                                            // Sram Bank3 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by Stack
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK3 \
-                                0x0000001C  // In Spinlock mode Whenever Stack
-                                            // processor wants the access to
-                                            // Sram Bank3 it should request for
-                                            // it by writing into this register.
-                                            // It'll get interrupt whenever it
-                                            // is granted. In Handshake mode
-                                            // this bit will be set by the Base
-                                            // processor. Its a set only bit and
-                                            // is cleared by HW when the request
-                                            // is granted.
-
-#define STACK_DIE_CTRL_O_RDSM_CFG_CPU \
-                                0x00000020  // Read State Machine timing
-                                            // configuration register. Generally
-                                            // Bit 4 and 3 will be identical.
-                                            // For stacked die always 43 are 0
-                                            // and 6:5 == 1 for 120Mhz.
-
-#define STACK_DIE_CTRL_O_RDSM_CFG_EE \
-                                0x00000024  // Read State Machine timing
-                                            // configuration register. Generally
-                                            // Bit 4 and 3 will be identical.
-                                            // For stacked die always 43 are 0
-                                            // and 6:5 == 1 for 120Mhz.
-
-#define STACK_DIE_CTRL_O_BASE_UP_IRQ_LOG \
-                                0x00000028  // Reading this register Base
-                                            // procesor will able to know the
-                                            // reason for the interrupt. This is
-                                            // clear only register - set by HW
-                                            // upon an interrupt to Base
-                                            // processor and can be cleared only
-                                            // by BASE processor.
-
-#define STACK_DIE_CTRL_O_STK_UP_IRQ_LOG \
-                                0x0000002C  // Reading this register Stack
-                                            // procesor will able to know the
-                                            // reason for the interrupt. This is
-                                            // clear only register - set by HW
-                                            // upon an interrupt to Stack
-                                            // processor and can be cleared only
-                                            // by Stack processor.
-
-#define STACK_DIE_CTRL_O_STK_CLK_EN \
-                                0x00000030  // Can be written only by base
-                                            // processor. Controls the enable
-                                            // pin of the cgcs for the clocks
-                                            // going to CM3 dft ctrl block and
-                                            // Sram.
-
-#define STACK_DIE_CTRL_O_SPIN_LOCK_MODE \
-                                0x00000034  // Can be written only by the base
-                                            // processor. Decides the ram
-                                            // sharing mode :: handshake or
-                                            // Spinlock mode.
-
-#define STACK_DIE_CTRL_O_BUS_FAULT_ADDR \
-                                0x00000038  // Stores the last bus fault
-                                            // address.
-
-#define STACK_DIE_CTRL_O_BUS_FAULT_CLR \
-                                0x0000003C  // write only registers on read
-                                            // returns 0.W Write 1 to clear the
-                                            // bust fault to store the new bus
-                                            // fault address
-
-#define STACK_DIE_CTRL_O_RESET_CAUSE \
-                                0x00000040  // Reset cause value captured from
-                                            // the ICR_CLKRST block.
-
-#define STACK_DIE_CTRL_O_WDOG_TIMER_EVENT \
-                                0x00000044  // Watchdog timer event value
-                                            // captured from the ICR_CLKRST
-                                            // block
-
-#define STACK_DIE_CTRL_O_DMA_REQ \
-                                0x00000048  // To send Dma Request to bottom
-                                            // die.
-
-#define STACK_DIE_CTRL_O_SRAM_JUMP_OFFSET_ADDR \
-                                0x0000004C  // Address offset within SRAM to
-                                            // which CM3 should jump after
-                                            // reset.
-
-#define STACK_DIE_CTRL_O_SW_REG1 \
-                                0x00000050  // These are sw registers for
-                                            // topdie processor and bottom die
-                                            // processor to communicate. Both
-                                            // can set and read these registers.
-                                            // In case of write clash bottom
-                                            // die's processor wins and top die
-                                            // processor access is ignored.
-
-#define STACK_DIE_CTRL_O_SW_REG2 \
-                                0x00000054  // These are sw registers for
-                                            // topdie processor and bottom die
-                                            // processor to communicate. Both
-                                            // can set and read these registers.
-                                            // In case of write clash bottom
-                                            // die's processor wins and top die
-                                            // processor access is ignored.
-
-#define STACK_DIE_CTRL_O_FMC_SLEEP_CTL \
-                                0x00000058  // By posting the request Flash can
-                                            // be put into low-power mode
-                                            // (Sleep) without powering down the
-                                            // Flash. Earlier (in Garnet) this
-                                            // was fully h/w controlled and the
-                                            // control for this was coming from
-                                            // SysCtl while entering into Cortex
-                                            // Deep-sleep mode. But for our
-                                            // device the D2D i/f doesnt support
-                                            // this. The Firmware has to program
-                                            // the register in the top-die for
-                                            // entering into this mode and wait
-                                            // for an interrupt.
-
-#define STACK_DIE_CTRL_O_MISC_CTL \
-                                0x0000005C  // Miscellanious control register.
-
-#define STACK_DIE_CTRL_O_SW_DFT_CTL \
-                                0x000000FC  // DFT control and status bits
-
-#define STACK_DIE_CTRL_O_PADN_CTL_0 \
-                                0x00000100  // Mainly for For controlling the
-                                            // pads OEN pins. There are total 60
-                                            // pads and hence 60 control registe
-                                            // i.e n value varies from 0 to 59.
-                                            // Here is the mapping for the
-                                            // pad_ctl register number and the
-                                            // functionality : 0 D2DPAD_DMAREQ1
-                                            // 1 D2DPAD_DMAREQ0 2
-                                            // D2DPAD_INT2BASE 3 D2DPAD_PIOSC 4
-                                            // D2DPAD_RST_N 5 D2DPAD_POR_RST_N 6
-                                            // D2DPAD_HCLK 7 D2DPAD_JTAG_TDO 8
-                                            // D2DPAD_JTAG_TCK 9 D2DPAD_JTAG_TMS
-                                            // 10 D2DPAD_JTAG_TDI 11-27
-                                            // D2DPAD_FROMSTACK[D2D_FROMSTACK_SIZE
-                                            // -1:0] 28-56 D2DPAD_TOSTACK
-                                            // [D2D_TOSTACK_SIZE -1:0] 57-59
-                                            // D2DPAD_SPARE [D2D_SPARE_PAD_SIZE
-                                            // -1:0] 0:00
-
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_RESET register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_RESET_UP_RESET \
-                                0x00000001  // 1 :Assert Reset 0 : Deassert the
-                                            // Reset
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SR_MASTER_PRIORITY register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SR_MASTER_PRIORITY_PRIORITY_M \
-                                0x00000003  // 00 : Equal Priority 01 : Stack
-                                            // Processor have priority 10 : Base
-                                            // Processor have priority 11 :
-                                            // Unused
-
-#define STACK_DIE_CTRL_SR_MASTER_PRIORITY_PRIORITY_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK2_STK_UP_ACCSS \
-                                0x00000002  // Stack Processor should clear it
-                                            // when it is done with the sram
-                                            // bank usage. Set by HW It is set
-                                            // when Stack Processor is granted
-                                            // the access to this bank
-
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK2_BASE_UP_ACCSS \
-                                0x00000001  // Base Processor should clear it
-                                            // when it is done wth the sram
-                                            // usage. Set by HW It is set when
-                                            // Base Processor is granted the
-                                            // access to this bank
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_ACC_REQ_BK2_ACCSS_REQ \
-                                0x00000001  // Base Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. In Handshake mode
-                                            // Stack Processor will set to
-                                            // inform Base Processor that it is
-                                            // done with the processing of data
-                                            // in SRAM and is now ready to use
-                                            // by the base processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_ACC_REQ_BK2_ACCSS_REQ \
-                                0x00000001  // Stack Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. In Handshake mode Base
-                                            // Processor will set to inform
-                                            // Stack Processor to start
-                                            // processing the data in the Ram.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_SR_ACC_CTL_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK3_STK_UP_ACCSS \
-                                0x00000002  // Stack Processor should clear it
-                                            // when it is done with the sram
-                                            // bank usage. Set by HW It is set
-                                            // when Stack Processor is granted
-                                            // the access to this bank.
-
-#define STACK_DIE_CTRL_STK_SR_ACC_CTL_BK3_BASE_UP_ACCSS \
-                                0x00000001  // Base Processor should clear it
-                                            // when it is done wth the sram
-                                            // usage. Set by HW it is set when
-                                            // Base Processor is granted the
-                                            // access to this bank.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_ACC_REQ_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_ACC_REQ_BK3_ACCSS_REQ \
-                                0x00000001  // Base Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode. Not used in handshake
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_ACC_REQ_BK3 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_ACC_REQ_BK3_ACCSS_REQ \
-                                0x00000001  // Stack Processor will set when
-                                            // Sram access is needed in Spin
-                                            // Lock mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RDSM_CFG_CPU register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_PULSE_WIDTH_M \
-                                0x000000C0  // Bank Clock Hi Time 00 : HCLK
-                                            // pulse 01 : 1 cycle of HCLK 10 :
-                                            // 1.5 cycles of HCLK 11 : 2 cycles
-                                            // of HCLK
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_PULSE_WIDTH_S 6
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_FLCLK_SENSE \
-                                0x00000020  // FLCLK 0 : indicates flash clock
-                                            // rise aligns on HCLK rise 1 :
-                                            // indicates flash clock rise aligns
-                                            // on HCLK fall
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_PIPELINE_FLDATA \
-                                0x00000010  // 0 : Always register flash rdata
-                                            // before sending to CPU 1 : Drive
-                                            // Flash rdata directly out on MISS
-                                            // (Both ICODE / DCODE)
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_READ_WAIT_STATE_M \
-                                0x0000000F  // Number of wait states inserted
-
-#define STACK_DIE_CTRL_RDSM_CFG_CPU_READ_WAIT_STATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RDSM_CFG_EE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_PULSE_WIDTH_M \
-                                0x000000C0  // Bank Clock Hi Time 00 : HCLK
-                                            // pulse 01 : 1 cycle of HCLK 10 :
-                                            // 1.5 cycles of HCLK 11 : 2 cycles
-                                            // of HCLK
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_PULSE_WIDTH_S 6
-#define STACK_DIE_CTRL_RDSM_CFG_EE_FLCLK_SENSE \
-                                0x00000020  // FLCLK 0 : indicates flash clock
-                                            // rise aligns on HCLK rise 1 :
-                                            // indicates flash clock rise aligns
-                                            // on HCLK fall
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_PIPELINE_FLDATA \
-                                0x00000010  // 0 : Always register flash rdata
-                                            // before sending to CPU 1 : Drive
-                                            // Flash rdata directly out on MISS
-                                            // (Both ICODE / DCODE)
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_READ_WAIT_STATE_M \
-                                0x0000000F  // Number of wait states inserted
-
-#define STACK_DIE_CTRL_RDSM_CFG_EE_READ_WAIT_STATE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BASE_UP_IRQ_LOG register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK3_REL \
-                                0x00000010  // Set when Relinquish Interrupt
-                                            // sent to Base processor for Bank3.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK2_RELEASE \
-                                0x00000008  // Set when Relinquish Interrupt
-                                            // sent to Base processor for Bank2.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK3_GRANT \
-                                0x00000004  // Set when Bank3 is granted to
-                                            // Base processor.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_BK2_GRANT \
-                                0x00000002  // Set when Bank2 is granted to
-                                            // BAse processor.
-
-#define STACK_DIE_CTRL_BASE_UP_IRQ_LOG_SR_INVAL_ACCSS \
-                                0x00000001  // Set when there Base processor do
-                                            // an Invalid access to Sram. Ex :
-                                            // Accessing the bank which is not
-                                            // granted for BAse processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_UP_IRQ_LOG register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK3_REL \
-                                0x00000008  // Set when Relinquish Interrupt
-                                            // sent to Stack processor for
-                                            // Bank3.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK2_REL \
-                                0x00000004  // Set when Relinquish Interrupt
-                                            // sent to Stack processor for
-                                            // Bank2.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK3_GRANT \
-                                0x00000002  // Set when Bank3 is granted to
-                                            // Stack processor.
-
-#define STACK_DIE_CTRL_STK_UP_IRQ_LOG_SR_BK2_GRANT \
-                                0x00000001  // Set when Bank2 is granted to
-                                            // Stack processor.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_STK_CLK_EN register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_STK_CLK_EN_SR_CLK \
-                                0x00000004  // Enable the clock going to sram.
-
-#define STACK_DIE_CTRL_STK_CLK_EN_DFT_CTRL_CLK \
-                                0x00000002  // Enable the clock going to dft
-                                            // control block
-
-#define STACK_DIE_CTRL_STK_CLK_EN_STK_UP_CLK \
-                                0x00000001  // Enable the clock going to Cm3
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SPIN_LOCK_MODE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SPIN_LOCK_MODE_MODE \
-                                0x00000001  // 0 : Handshake Mode 1 : Spinlock
-                                            // mode.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BUS_FAULT_ADDR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BUS_FAULT_ADDR_ADDRESS_M \
-                                0xFFFFFFFF  // Fault Address
-
-#define STACK_DIE_CTRL_BUS_FAULT_ADDR_ADDRESS_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_BUS_FAULT_CLR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_BUS_FAULT_CLR_CLEAR \
-                                0x00000001  // When set it'll clear the bust
-                                            // fault address register to store
-                                            // the new bus fault address
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_RESET_CAUSE register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_RESET_CAUSE_RST_CAUSE_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_RESET_CAUSE_RST_CAUSE_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_WDOG_TIMER_EVENT register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_WDOG_TIMER_EVENT_WDOG_TMR_EVNT_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_WDOG_TIMER_EVENT_WDOG_TMR_EVNT_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_DMA_REQ register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_DMA_REQ_DMAREQ1 \
-                                0x00000002  // Generate DMAREQ1 on setting this
-                                            // bit.
-
-#define STACK_DIE_CTRL_DMA_REQ_DMAREQ0 \
-                                0x00000001  // Generate DMAREQ0 on setting this
-                                            // bit.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SRAM_JUMP_OFFSET_ADDR register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SRAM_JUMP_OFFSET_ADDR_ADDR_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SRAM_JUMP_OFFSET_ADDR_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_REG1 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_REG1_NEWBITFIELD1_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SW_REG1_NEWBITFIELD1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_REG2 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_REG2_NEWBITFIELD1_M \
-                                0xFFFFFFFF
-
-#define STACK_DIE_CTRL_SW_REG2_NEWBITFIELD1_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_FMC_SLEEP_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_FMC_SLEEP_CTL_FMC_LPM_ACK \
-                                0x00000002  // captures the status of of
-                                            // fmc_lpm_ack
-
-#define STACK_DIE_CTRL_FMC_SLEEP_CTL_FMC_LPM_REQ \
-                                0x00000001  // When set assert
-                                            // iflpe2fmc_lpm_req to FMC.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_MISC_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_MISC_CTL_WDOG_RESET \
-                                0x00000080  // 1 : will reset the async wdog
-                                            // timer runing on piosc clock
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ2 \
-                                0x00000020  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ1 \
-                                0x00000010  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FW_IRQ0 \
-                                0x00000008  // Setting this Will send to
-                                            // interttupt to CM3
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK3 \
-                                0x00000004  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 3 goes to Bank3 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank2
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK2 \
-                                0x00000002  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 2 goes to Bank2 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank2
-
-#define STACK_DIE_CTRL_MISC_CTL_FLB_TEST_MUX_CTL_BK1 \
-                                0x00000001  // While testing Flash Setting this
-                                            // bit will Control the
-                                            // CE/STR/AIN/CLKIN going to flash
-                                            // banks 12 and 3. 0 : Control
-                                            // signals coming from FMC for Bank
-                                            // 1 goes to Bank1 1 : Control
-                                            // signals coming from FMC for Bank
-                                            // 0 goes to Bank1
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_SW_DFT_CTL register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_SW_DFT_CTL_FL_CTRL_OWNS \
-                                0x20000000  // when set to '1' all flash
-                                            // control signals switch over to
-                                            // CM3 control when '0' it is under
-                                            // the D2D interface control
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_SWIF_CPU_READ \
-                                0x10000000  // 1 indicates in SWIF mode the
-                                            // control signals to flash are from
-                                            // FMC CPU read controls the clock
-                                            // and address. that is one can give
-                                            // address via FMC and read through
-                                            // IDMEM.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_CPU_DONE \
-                                0x00800000  // 'CPU Done' bit for PBIST. Write
-                                            // '1' to indicate test done.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_CPU_FAIL \
-                                0x00400000  // 'CPU Fail' bit for PBIST. Write
-                                            // '1' to indicate test failed.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK4_OWNS \
-                                0x00001000  // when set to '1' flash bank 4
-                                            // (EEPROM) is owned by the CM3for
-                                            // reads over DCODE bus. When '0'
-                                            // access control given to D2D
-                                            // interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK3_OWNS \
-                                0x00000800  // when set to '1' flash bank 3 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK2_OWNS \
-                                0x00000400  // when set to '1' flash bank 2 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK1_OWNS \
-                                0x00000200  // when set to '1' flash bank 1 is
-                                            // owned by the CM3for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-#define STACK_DIE_CTRL_SW_DFT_CTL_FLBK0_OWNS \
-                                0x00000100  // when set to '1' flash bank 0 is
-                                            // owned by the CM3 for reads over
-                                            // DCODE bus. When '0' access
-                                            // control given to D2D interface.
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// STACK_DIE_CTRL_O_PADN_CTL_0 register.
-//
-//******************************************************************************
-#define STACK_DIE_CTRL_PADN_CTL_0_SPARE_PAD_DOUT \
-                                0x00000008  // This bit is valid for only the
-                                            // spare pads ie for n=57 to 59.
-                                            // value to drive at the output of
-                                            // the pad
-
-#define STACK_DIE_CTRL_PADN_CTL_0_SPARE_PAD_DIN \
-                                0x00000004  // This bit is valid for only the
-                                            // spare pads ie for n=57 to 59.
-                                            // captures the 'Y' pin of the pad
-                                            // which is the data being driven
-                                            // into the die
-
-#define STACK_DIE_CTRL_PADN_CTL_0_OEN2X \
-                                0x00000002  // OEN2X control when '1' enables
-                                            // the output with 1x. Total drive
-                                            // strength is decided bu oen1x
-                                            // setting + oen2x setting.
-
-#define STACK_DIE_CTRL_PADN_CTL_0_OEN1X \
-                                0x00000001  // OEN1X control when '1' enables
-                                            // the output with 1x . Total drive
-                                            // strength is decided bu oen1x
-                                            // setting + oen2x setting.
-
-
-
-
-#endif // __HW_STACK_DIE_CTRL_H__
diff --git a/ports/cc3200/hal/inc/hw_timer.h b/ports/cc3200/hal/inc/hw_timer.h
deleted file mode 100644
index b6844ec675692..0000000000000
--- a/ports/cc3200/hal/inc/hw_timer.h
+++ /dev/null
@@ -1,778 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// hw_timer.h - Defines and macros used when accessing the timer.
-//
-//*****************************************************************************
-
-//##### INTERNAL BEGIN #####
-//
-// This is an auto-generated file.  Do not edit by hand.
-// Created by version 6779 of DriverLib.
-//
-//##### INTERNAL END #####
-
-#ifndef __HW_TIMER_H__
-#define __HW_TIMER_H__
-
-//*****************************************************************************
-//
-// The following are defines for the Timer register offsets.
-//
-//*****************************************************************************
-#define TIMER_O_CFG             0x00000000  // GPTM Configuration
-#define TIMER_O_TAMR            0x00000004  // GPTM Timer A Mode
-#define TIMER_O_TBMR            0x00000008  // GPTM Timer B Mode
-#define TIMER_O_CTL             0x0000000C  // GPTM Control
-//##### GARNET BEGIN #####
-#define TIMER_O_SYNC            0x00000010  // GPTM Synchronize
-//##### GARNET END #####
-#define TIMER_O_IMR             0x00000018  // GPTM Interrupt Mask
-#define TIMER_O_RIS             0x0000001C  // GPTM Raw Interrupt Status
-#define TIMER_O_MIS             0x00000020  // GPTM Masked Interrupt Status
-#define TIMER_O_ICR             0x00000024  // GPTM Interrupt Clear
-#define TIMER_O_TAILR           0x00000028  // GPTM Timer A Interval Load
-#define TIMER_O_TBILR           0x0000002C  // GPTM Timer B Interval Load
-#define TIMER_O_TAMATCHR        0x00000030  // GPTM Timer A Match
-#define TIMER_O_TBMATCHR        0x00000034  // GPTM Timer B Match
-#define TIMER_O_TAPR            0x00000038  // GPTM Timer A Prescale
-#define TIMER_O_TBPR            0x0000003C  // GPTM Timer B Prescale
-#define TIMER_O_TAPMR           0x00000040  // GPTM TimerA Prescale Match
-#define TIMER_O_TBPMR           0x00000044  // GPTM TimerB Prescale Match
-#define TIMER_O_TAR             0x00000048  // GPTM Timer A
-#define TIMER_O_TBR             0x0000004C  // GPTM Timer B
-#define TIMER_O_TAV             0x00000050  // GPTM Timer A Value
-#define TIMER_O_TBV             0x00000054  // GPTM Timer B Value
-#define TIMER_O_RTCPD           0x00000058  // GPTM RTC Predivide
-#define TIMER_O_TAPS            0x0000005C  // GPTM Timer A Prescale Snapshot
-#define TIMER_O_TBPS            0x00000060  // GPTM Timer B Prescale Snapshot
-#define TIMER_O_TAPV            0x00000064  // GPTM Timer A Prescale Value
-#define TIMER_O_TBPV            0x00000068  // GPTM Timer B Prescale Value
-#define TIMER_O_DMAEV           0x0000006C  // GPTM DMA Event
-#define TIMER_O_PP              0x00000FC0  // GPTM Peripheral Properties
-
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_CFG register.
-//
-//*****************************************************************************
-#define TIMER_CFG_M             0x00000007  // GPTM Configuration
-#define TIMER_CFG_32_BIT_TIMER  0x00000000  // 32-bit timer configuration
-#define TIMER_CFG_32_BIT_RTC    0x00000001  // 32-bit real-time clock (RTC)
-                                            // counter configuration
-#define TIMER_CFG_16_BIT        0x00000004  // 16-bit timer configuration. The
-                                            // function is controlled by bits
-                                            // 1:0 of GPTMTAMR and GPTMTBMR
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAMR_TAPLO        0x00000800  // GPTM Timer A PWM Legacy
-                                            // Operation
-#define TIMER_TAMR_TAMRSU       0x00000400  // GPTM Timer A Match Register
-                                            // Update
-#define TIMER_TAMR_TAPWMIE      0x00000200  // GPTM Timer A PWM Interrupt
-                                            // Enable
-#define TIMER_TAMR_TAILD        0x00000100  // GPTM Timer A Interval Load Write
-//##### GARNET END #####
-#define TIMER_TAMR_TASNAPS      0x00000080  // GPTM Timer A Snap-Shot Mode
-#define TIMER_TAMR_TAWOT        0x00000040  // GPTM Timer A Wait-on-Trigger
-#define TIMER_TAMR_TAMIE        0x00000020  // GPTM Timer A Match Interrupt
-                                            // Enable
-#define TIMER_TAMR_TACDIR       0x00000010  // GPTM Timer A Count Direction
-#define TIMER_TAMR_TAAMS        0x00000008  // GPTM Timer A Alternate Mode
-                                            // Select
-#define TIMER_TAMR_TACMR        0x00000004  // GPTM Timer A Capture Mode
-#define TIMER_TAMR_TAMR_M       0x00000003  // GPTM Timer A Mode
-#define TIMER_TAMR_TAMR_1_SHOT  0x00000001  // One-Shot Timer mode
-#define TIMER_TAMR_TAMR_PERIOD  0x00000002  // Periodic Timer mode
-#define TIMER_TAMR_TAMR_CAP     0x00000003  // Capture mode
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBMR_TBPLO        0x00000800  // GPTM Timer B PWM Legacy
-                                            // Operation
-#define TIMER_TBMR_TBMRSU       0x00000400  // GPTM Timer B Match Register
-                                            // Update
-#define TIMER_TBMR_TBPWMIE      0x00000200  // GPTM Timer B PWM Interrupt
-                                            // Enable
-#define TIMER_TBMR_TBILD        0x00000100  // GPTM Timer B Interval Load Write
-//##### GARNET END #####
-#define TIMER_TBMR_TBSNAPS      0x00000080  // GPTM Timer B Snap-Shot Mode
-#define TIMER_TBMR_TBWOT        0x00000040  // GPTM Timer B Wait-on-Trigger
-#define TIMER_TBMR_TBMIE        0x00000020  // GPTM Timer B Match Interrupt
-                                            // Enable
-#define TIMER_TBMR_TBCDIR       0x00000010  // GPTM Timer B Count Direction
-#define TIMER_TBMR_TBAMS        0x00000008  // GPTM Timer B Alternate Mode
-                                            // Select
-#define TIMER_TBMR_TBCMR        0x00000004  // GPTM Timer B Capture Mode
-#define TIMER_TBMR_TBMR_M       0x00000003  // GPTM Timer B Mode
-#define TIMER_TBMR_TBMR_1_SHOT  0x00000001  // One-Shot Timer mode
-#define TIMER_TBMR_TBMR_PERIOD  0x00000002  // Periodic Timer mode
-#define TIMER_TBMR_TBMR_CAP     0x00000003  // Capture mode
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_CTL register.
-//
-//*****************************************************************************
-#define TIMER_CTL_TBPWML        0x00004000  // GPTM Timer B PWM Output Level
-#define TIMER_CTL_TBOTE         0x00002000  // GPTM Timer B Output Trigger
-                                            // Enable
-#define TIMER_CTL_TBEVENT_M     0x00000C00  // GPTM Timer B Event Mode
-#define TIMER_CTL_TBEVENT_POS   0x00000000  // Positive edge
-#define TIMER_CTL_TBEVENT_NEG   0x00000400  // Negative edge
-#define TIMER_CTL_TBEVENT_BOTH  0x00000C00  // Both edges
-#define TIMER_CTL_TBSTALL       0x00000200  // GPTM Timer B Stall Enable
-#define TIMER_CTL_TBEN          0x00000100  // GPTM Timer B Enable
-#define TIMER_CTL_TAPWML        0x00000040  // GPTM Timer A PWM Output Level
-#define TIMER_CTL_TAOTE         0x00000020  // GPTM Timer A Output Trigger
-                                            // Enable
-#define TIMER_CTL_RTCEN         0x00000010  // GPTM RTC Enable
-#define TIMER_CTL_TAEVENT_M     0x0000000C  // GPTM Timer A Event Mode
-#define TIMER_CTL_TAEVENT_POS   0x00000000  // Positive edge
-#define TIMER_CTL_TAEVENT_NEG   0x00000004  // Negative edge
-#define TIMER_CTL_TAEVENT_BOTH  0x0000000C  // Both edges
-#define TIMER_CTL_TASTALL       0x00000002  // GPTM Timer A Stall Enable
-#define TIMER_CTL_TAEN          0x00000001  // GPTM Timer A Enable
-//##### GARNET BEGIN #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_SYNC register.
-//
-//*****************************************************************************
-#define TIMER_SYNC_SYNC11_M     0x00C00000  // Synchronize GPTM Timer 11
-#define TIMER_SYNC_SYNC11_TA    0x00400000  // A timeout event for Timer A of
-                                            // GPTM11 is triggered
-#define TIMER_SYNC_SYNC11_TB    0x00800000  // A timeout event for Timer B of
-                                            // GPTM11 is triggered
-#define TIMER_SYNC_SYNC11_TATB  0x00C00000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM11 is
-                                            // triggered
-#define TIMER_SYNC_SYNC10_M     0x00300000  // Synchronize GPTM Timer 10
-#define TIMER_SYNC_SYNC10_TA    0x00100000  // A timeout event for Timer A of
-                                            // GPTM10 is triggered
-#define TIMER_SYNC_SYNC10_TB    0x00200000  // A timeout event for Timer B of
-                                            // GPTM10 is triggered
-#define TIMER_SYNC_SYNC10_TATB  0x00300000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM10 is
-                                            // triggered
-#define TIMER_SYNC_SYNC9_M      0x000C0000  // Synchronize GPTM Timer 9
-#define TIMER_SYNC_SYNC9_TA     0x00040000  // A timeout event for Timer A of
-                                            // GPTM9 is triggered
-#define TIMER_SYNC_SYNC9_TB     0x00080000  // A timeout event for Timer B of
-                                            // GPTM9 is triggered
-#define TIMER_SYNC_SYNC9_TATB   0x000C0000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM9 is
-                                            // triggered
-#define TIMER_SYNC_SYNC8_M      0x00030000  // Synchronize GPTM Timer 8
-#define TIMER_SYNC_SYNC8_TA     0x00010000  // A timeout event for Timer A of
-                                            // GPTM8 is triggered
-#define TIMER_SYNC_SYNC8_TB     0x00020000  // A timeout event for Timer B of
-                                            // GPTM8 is triggered
-#define TIMER_SYNC_SYNC8_TATB   0x00030000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM8 is
-                                            // triggered
-#define TIMER_SYNC_SYNC7_M      0x0000C000  // Synchronize GPTM Timer 7
-#define TIMER_SYNC_SYNC7_TA     0x00004000  // A timeout event for Timer A of
-                                            // GPTM7 is triggered
-#define TIMER_SYNC_SYNC7_TB     0x00008000  // A timeout event for Timer B of
-                                            // GPTM7 is triggered
-#define TIMER_SYNC_SYNC7_TATB   0x0000C000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM7 is
-                                            // triggered
-#define TIMER_SYNC_SYNC6_M      0x00003000  // Synchronize GPTM Timer 6
-#define TIMER_SYNC_SYNC6_TA     0x00001000  // A timeout event for Timer A of
-                                            // GPTM6 is triggered
-#define TIMER_SYNC_SYNC6_TB     0x00002000  // A timeout event for Timer B of
-                                            // GPTM6 is triggered
-#define TIMER_SYNC_SYNC6_TATB   0x00003000  // A timeout event for both Timer A
-                                            // and Timer B of GPTM6 is
-                                            // triggered
-#define TIMER_SYNC_SYNC5_M      0x00000C00  // Synchronize GPTM Timer 5
-#define TIMER_SYNC_SYNC5_TA     0x00000400  // A timeout event for Timer A of
-                                            // GPTM5 is triggered
-#define TIMER_SYNC_SYNC5_TB     0x00000800  // A timeout event for Timer B of
-                                            // GPTM5 is triggered
-#define TIMER_SYNC_SYNC5_TATB   0x00000C00  // A timeout event for both Timer A
-                                            // and Timer B of GPTM5 is
-                                            // triggered
-#define TIMER_SYNC_SYNC4_M      0x00000300  // Synchronize GPTM Timer 4
-#define TIMER_SYNC_SYNC4_TA     0x00000100  // A timeout event for Timer A of
-                                            // GPTM4 is triggered
-#define TIMER_SYNC_SYNC4_TB     0x00000200  // A timeout event for Timer B of
-                                            // GPTM4 is triggered
-#define TIMER_SYNC_SYNC4_TATB   0x00000300  // A timeout event for both Timer A
-                                            // and Timer B of GPTM4 is
-                                            // triggered
-#define TIMER_SYNC_SYNC3_M      0x000000C0  // Synchronize GPTM Timer 3
-#define TIMER_SYNC_SYNC3_TA     0x00000040  // A timeout event for Timer A of
-                                            // GPTM3 is triggered
-#define TIMER_SYNC_SYNC3_TB     0x00000080  // A timeout event for Timer B of
-                                            // GPTM3 is triggered
-#define TIMER_SYNC_SYNC3_TATB   0x000000C0  // A timeout event for both Timer A
-                                            // and Timer B of GPTM3 is
-                                            // triggered
-#define TIMER_SYNC_SYNC2_M      0x00000030  // Synchronize GPTM Timer 2
-#define TIMER_SYNC_SYNC2_TA     0x00000010  // A timeout event for Timer A of
-                                            // GPTM2 is triggered
-#define TIMER_SYNC_SYNC2_TB     0x00000020  // A timeout event for Timer B of
-                                            // GPTM2 is triggered
-#define TIMER_SYNC_SYNC2_TATB   0x00000030  // A timeout event for both Timer A
-                                            // and Timer B of GPTM2 is
-                                            // triggered
-#define TIMER_SYNC_SYNC1_M      0x0000000C  // Synchronize GPTM Timer 1
-#define TIMER_SYNC_SYNC1_TA     0x00000004  // A timeout event for Timer A of
-                                            // GPTM1 is triggered
-#define TIMER_SYNC_SYNC1_TB     0x00000008  // A timeout event for Timer B of
-                                            // GPTM1 is triggered
-#define TIMER_SYNC_SYNC1_TATB   0x0000000C  // A timeout event for both Timer A
-                                            // and Timer B of GPTM1 is
-                                            // triggered
-#define TIMER_SYNC_SYNC0_M      0x00000003  // Synchronize GPTM Timer 0
-#define TIMER_SYNC_SYNC0_TA     0x00000001  // A timeout event for Timer A of
-                                            // GPTM0 is triggered
-#define TIMER_SYNC_SYNC0_TB     0x00000002  // A timeout event for Timer B of
-                                            // GPTM0 is triggered
-#define TIMER_SYNC_SYNC0_TATB   0x00000003  // A timeout event for both Timer A
-                                            // and Timer B of GPTM0 is
-                                            // triggered
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_IMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_IMR_WUEIM         0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Interrupt Mask
-//##### GARNET END #####
-#define TIMER_IMR_TBMIM         0x00000800  // GPTM Timer B Mode Match
-                                            // Interrupt Mask
-#define TIMER_IMR_CBEIM         0x00000400  // GPTM Capture B Event Interrupt
-                                            // Mask
-#define TIMER_IMR_CBMIM         0x00000200  // GPTM Capture B Match Interrupt
-                                            // Mask
-#define TIMER_IMR_TBTOIM        0x00000100  // GPTM Timer B Time-Out Interrupt
-                                            // Mask
-#define TIMER_IMR_TAMIM         0x00000010  // GPTM Timer A Mode Match
-                                            // Interrupt Mask
-#define TIMER_IMR_RTCIM         0x00000008  // GPTM RTC Interrupt Mask
-#define TIMER_IMR_CAEIM         0x00000004  // GPTM Capture A Event Interrupt
-                                            // Mask
-#define TIMER_IMR_CAMIM         0x00000002  // GPTM Capture A Match Interrupt
-                                            // Mask
-#define TIMER_IMR_TATOIM        0x00000001  // GPTM Timer A Time-Out Interrupt
-                                            // Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_RIS register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_RIS_WUERIS        0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Raw Interrupt Status
-//##### GARNET END #####
-#define TIMER_RIS_TBMRIS        0x00000800  // GPTM Timer B Mode Match Raw
-                                            // Interrupt
-#define TIMER_RIS_CBERIS        0x00000400  // GPTM Capture B Event Raw
-                                            // Interrupt
-#define TIMER_RIS_CBMRIS        0x00000200  // GPTM Capture B Match Raw
-                                            // Interrupt
-#define TIMER_RIS_TBTORIS       0x00000100  // GPTM Timer B Time-Out Raw
-                                            // Interrupt
-#define TIMER_RIS_TAMRIS        0x00000010  // GPTM Timer A Mode Match Raw
-                                            // Interrupt
-#define TIMER_RIS_RTCRIS        0x00000008  // GPTM RTC Raw Interrupt
-#define TIMER_RIS_CAERIS        0x00000004  // GPTM Capture A Event Raw
-                                            // Interrupt
-#define TIMER_RIS_CAMRIS        0x00000002  // GPTM Capture A Match Raw
-                                            // Interrupt
-#define TIMER_RIS_TATORIS       0x00000001  // GPTM Timer A Time-Out Raw
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_MIS register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_MIS_WUEMIS        0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Masked Interrupt Status
-//##### GARNET END #####
-#define TIMER_MIS_TBMMIS        0x00000800  // GPTM Timer B Mode Match Masked
-                                            // Interrupt
-#define TIMER_MIS_CBEMIS        0x00000400  // GPTM Capture B Event Masked
-                                            // Interrupt
-#define TIMER_MIS_CBMMIS        0x00000200  // GPTM Capture B Match Masked
-                                            // Interrupt
-#define TIMER_MIS_TBTOMIS       0x00000100  // GPTM Timer B Time-Out Masked
-                                            // Interrupt
-#define TIMER_MIS_TAMMIS        0x00000010  // GPTM Timer A Mode Match Masked
-                                            // Interrupt
-#define TIMER_MIS_RTCMIS        0x00000008  // GPTM RTC Masked Interrupt
-#define TIMER_MIS_CAEMIS        0x00000004  // GPTM Capture A Event Masked
-                                            // Interrupt
-#define TIMER_MIS_CAMMIS        0x00000002  // GPTM Capture A Match Masked
-                                            // Interrupt
-#define TIMER_MIS_TATOMIS       0x00000001  // GPTM Timer A Time-Out Masked
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_ICR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_ICR_WUECINT       0x00010000  // 32/64-Bit GPTM Write Update
-                                            // Error Interrupt Clear
-//##### GARNET END #####
-#define TIMER_ICR_TBMCINT       0x00000800  // GPTM Timer B Mode Match
-                                            // Interrupt Clear
-#define TIMER_ICR_CBECINT       0x00000400  // GPTM Capture B Event Interrupt
-                                            // Clear
-#define TIMER_ICR_CBMCINT       0x00000200  // GPTM Capture B Match Interrupt
-                                            // Clear
-#define TIMER_ICR_TBTOCINT      0x00000100  // GPTM Timer B Time-Out Interrupt
-                                            // Clear
-#define TIMER_ICR_TAMCINT       0x00000010  // GPTM Timer A Mode Match
-                                            // Interrupt Clear
-#define TIMER_ICR_RTCCINT       0x00000008  // GPTM RTC Interrupt Clear
-#define TIMER_ICR_CAECINT       0x00000004  // GPTM Capture A Event Interrupt
-                                            // Clear
-#define TIMER_ICR_CAMCINT       0x00000002  // GPTM Capture A Match Interrupt
-                                            // Clear
-#define TIMER_ICR_TATOCINT      0x00000001  // GPTM Timer A Time-Out Raw
-                                            // Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAILR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAILR_M           0xFFFFFFFF  // GPTM Timer A Interval Load
-                                            // Register
-//##### GARNET END #####
-#define TIMER_TAILR_TAILRH_M    0xFFFF0000  // GPTM Timer A Interval Load
-                                            // Register High
-#define TIMER_TAILR_TAILRL_M    0x0000FFFF  // GPTM Timer A Interval Load
-                                            // Register Low
-#define TIMER_TAILR_TAILRH_S    16
-#define TIMER_TAILR_TAILRL_S    0
-//##### GARNET BEGIN #####
-#define TIMER_TAILR_S           0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBILR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBILR_M           0xFFFFFFFF  // GPTM Timer B Interval Load
-                                            // Register
-//##### GARNET END #####
-#define TIMER_TBILR_TBILRL_M    0x0000FFFF  // GPTM Timer B Interval Load
-                                            // Register
-#define TIMER_TBILR_TBILRL_S    0
-//##### GARNET BEGIN #####
-#define TIMER_TBILR_S           0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAMATCHR
-// register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAMATCHR_TAMR_M   0xFFFFFFFF  // GPTM Timer A Match Register
-//##### GARNET END #####
-#define TIMER_TAMATCHR_TAMRH_M  0xFFFF0000  // GPTM Timer A Match Register High
-#define TIMER_TAMATCHR_TAMRL_M  0x0000FFFF  // GPTM Timer A Match Register Low
-#define TIMER_TAMATCHR_TAMRH_S  16
-#define TIMER_TAMATCHR_TAMRL_S  0
-//##### GARNET BEGIN #####
-#define TIMER_TAMATCHR_TAMR_S   0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBMATCHR
-// register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBMATCHR_TBMR_M   0xFFFFFFFF  // GPTM Timer B Match Register
-//##### GARNET END #####
-#define TIMER_TBMATCHR_TBMRL_M  0x0000FFFF  // GPTM Timer B Match Register Low
-//##### GARNET BEGIN #####
-#define TIMER_TBMATCHR_TBMR_S   0
-//##### GARNET END #####
-#define TIMER_TBMATCHR_TBMRL_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAPR_TAPSRH_M     0x0000FF00  // GPTM Timer A Prescale High Byte
-//##### GARNET END #####
-#define TIMER_TAPR_TAPSR_M      0x000000FF  // GPTM Timer A Prescale
-//##### GARNET BEGIN #####
-#define TIMER_TAPR_TAPSRH_S     8
-//##### GARNET END #####
-#define TIMER_TAPR_TAPSR_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBPR_TBPSRH_M     0x0000FF00  // GPTM Timer B Prescale High Byte
-//##### GARNET END #####
-#define TIMER_TBPR_TBPSR_M      0x000000FF  // GPTM Timer B Prescale
-//##### GARNET BEGIN #####
-#define TIMER_TBPR_TBPSRH_S     8
-//##### GARNET END #####
-#define TIMER_TBPR_TBPSR_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAPMR_TAPSMRH_M   0x0000FF00  // GPTM Timer A Prescale Match High
-                                            // Byte
-//##### GARNET END #####
-#define TIMER_TAPMR_TAPSMR_M    0x000000FF  // GPTM TimerA Prescale Match
-//##### GARNET BEGIN #####
-#define TIMER_TAPMR_TAPSMRH_S   8
-//##### GARNET END #####
-#define TIMER_TAPMR_TAPSMR_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPMR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBPMR_TBPSMRH_M   0x0000FF00  // GPTM Timer B Prescale Match High
-                                            // Byte
-//##### GARNET END #####
-#define TIMER_TBPMR_TBPSMR_M    0x000000FF  // GPTM TimerB Prescale Match
-//##### GARNET BEGIN #####
-#define TIMER_TBPMR_TBPSMRH_S   8
-//##### GARNET END #####
-#define TIMER_TBPMR_TBPSMR_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAR_M             0xFFFFFFFF  // GPTM Timer A Register
-//##### GARNET END #####
-#define TIMER_TAR_TARH_M        0xFFFF0000  // GPTM Timer A Register High
-#define TIMER_TAR_TARL_M        0x0000FFFF  // GPTM Timer A Register Low
-#define TIMER_TAR_TARH_S        16
-#define TIMER_TAR_TARL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TAR_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBR register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBR_M             0xFFFFFFFF  // GPTM Timer B Register
-//##### GARNET END #####
-#define TIMER_TBR_TBRL_M        0x00FFFFFF  // GPTM Timer B
-#define TIMER_TBR_TBRL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TBR_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAV register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TAV_M             0xFFFFFFFF  // GPTM Timer A Value
-//##### GARNET END #####
-#define TIMER_TAV_TAVH_M        0xFFFF0000  // GPTM Timer A Value High
-#define TIMER_TAV_TAVL_M        0x0000FFFF  // GPTM Timer A Register Low
-#define TIMER_TAV_TAVH_S        16
-#define TIMER_TAV_TAVL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TAV_S             0
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBV register.
-//
-//*****************************************************************************
-//##### GARNET BEGIN #####
-#define TIMER_TBV_M             0xFFFFFFFF  // GPTM Timer B Value
-//##### GARNET END #####
-#define TIMER_TBV_TBVL_M        0x0000FFFF  // GPTM Timer B Register
-#define TIMER_TBV_TBVL_S        0
-//##### GARNET BEGIN #####
-#define TIMER_TBV_S             0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_RTCPD register.
-//
-//*****************************************************************************
-#define TIMER_RTCPD_RTCPD_M     0x0000FFFF  // RTC Predivide Counter Value
-#define TIMER_RTCPD_RTCPD_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPS register.
-//
-//*****************************************************************************
-#define TIMER_TAPS_PSS_M        0x0000FFFF  // GPTM Timer A Prescaler Snapshot
-#define TIMER_TAPS_PSS_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPS register.
-//
-//*****************************************************************************
-#define TIMER_TBPS_PSS_M        0x0000FFFF  // GPTM Timer A Prescaler Value
-#define TIMER_TBPS_PSS_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TAPV register.
-//
-//*****************************************************************************
-#define TIMER_TAPV_PSV_M        0x0000FFFF  // GPTM Timer A Prescaler Value
-#define TIMER_TAPV_PSV_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_TBPV register.
-//
-//*****************************************************************************
-#define TIMER_TBPV_PSV_M        0x0000FFFF  // GPTM Timer B Prescaler Value
-#define TIMER_TBPV_PSV_S        0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the TIMER_O_PP register.
-//
-//*****************************************************************************
-#define TIMER_PP_SYNCCNT        0x00000020  // Synchronize Start
-#define TIMER_PP_CHAIN          0x00000010  // Chain with Other Timers
-#define TIMER_PP_SIZE_M         0x0000000F  // Count Size
-#define TIMER_PP_SIZE__0        0x00000000  // Timer A and Timer B counters are
-                                            // 16 bits each with an 8-bit
-                                            // prescale counter
-#define TIMER_PP_SIZE__1        0x00000001  // Timer A and Timer B counters are
-                                            // 32 bits each with an 16-bit
-                                            // prescale counter
-//##### GARNET END #####
-
-//*****************************************************************************
-//
-// The following definitions are deprecated.
-//
-//*****************************************************************************
-#ifndef DEPRECATED
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_CFG
-// register.
-//
-//*****************************************************************************
-#define TIMER_CFG_CFG_MSK       0x00000007  // Configuration options mask
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_CTL
-// register.
-//
-//*****************************************************************************
-#define TIMER_CTL_TBEVENT_MSK   0x00000C00  // TimerB event mode mask
-#define TIMER_CTL_TAEVENT_MSK   0x0000000C  // TimerA event mode mask
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_RIS
-// register.
-//
-//*****************************************************************************
-#define TIMER_RIS_CBEMIS        0x00000400  // CaptureB event masked int status
-#define TIMER_RIS_CBMMIS        0x00000200  // CaptureB match masked int status
-#define TIMER_RIS_TBTOMIS       0x00000100  // TimerB time out masked int stat
-#define TIMER_RIS_RTCMIS        0x00000008  // RTC masked int status
-#define TIMER_RIS_CAEMIS        0x00000004  // CaptureA event masked int status
-#define TIMER_RIS_CAMMIS        0x00000002  // CaptureA match masked int status
-#define TIMER_RIS_TATOMIS       0x00000001  // TimerA time out masked int stat
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TAILR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TAILR_TAILRH      0xFFFF0000  // TimerB load val in 32 bit mode
-#define TIMER_TAILR_TAILRL      0x0000FFFF  // TimerA interval load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TBILR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TBILR_TBILRL      0x0000FFFF  // TimerB interval load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the
-// TIMER_O_TAMATCHR register.
-//
-//*****************************************************************************
-#define TIMER_TAMATCHR_TAMRH    0xFFFF0000  // TimerB match val in 32 bit mode
-#define TIMER_TAMATCHR_TAMRL    0x0000FFFF  // TimerA match value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the
-// TIMER_O_TBMATCHR register.
-//
-//*****************************************************************************
-#define TIMER_TBMATCHR_TBMRL    0x0000FFFF  // TimerB match load value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TAR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TAR_TARH          0xFFFF0000  // TimerB val in 32 bit mode
-#define TIMER_TAR_TARL          0x0000FFFF  // TimerA value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_O_TBR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TBR_TBRL          0x0000FFFF  // TimerB value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the reset values of the timer
-// registers.
-//
-//*****************************************************************************
-#define TIMER_RV_TAILR          0xFFFFFFFF  // TimerA interval load reg RV
-#define TIMER_RV_TAR            0xFFFFFFFF  // TimerA register RV
-#define TIMER_RV_TAMATCHR       0xFFFFFFFF  // TimerA match register RV
-#define TIMER_RV_TBILR          0x0000FFFF  // TimerB interval load reg RV
-#define TIMER_RV_TBMATCHR       0x0000FFFF  // TimerB match register RV
-#define TIMER_RV_TBR            0x0000FFFF  // TimerB register RV
-#define TIMER_RV_TAPR           0x00000000  // TimerA prescale register RV
-#define TIMER_RV_CFG            0x00000000  // Configuration register RV
-#define TIMER_RV_TBPMR          0x00000000  // TimerB prescale match regi RV
-#define TIMER_RV_TAPMR          0x00000000  // TimerA prescale match reg RV
-#define TIMER_RV_CTL            0x00000000  // Control register RV
-#define TIMER_RV_ICR            0x00000000  // Interrupt clear register RV
-#define TIMER_RV_TBMR           0x00000000  // TimerB mode register RV
-#define TIMER_RV_MIS            0x00000000  // Masked interrupt status reg RV
-#define TIMER_RV_RIS            0x00000000  // Interrupt status register RV
-#define TIMER_RV_TBPR           0x00000000  // TimerB prescale register RV
-#define TIMER_RV_IMR            0x00000000  // Interrupt mask register RV
-#define TIMER_RV_TAMR           0x00000000  // TimerA mode register RV
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnMR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNMR_TNAMS        0x00000008  // Alternate mode select
-#define TIMER_TNMR_TNCMR        0x00000004  // Capture mode - count or time
-#define TIMER_TNMR_TNTMR_MSK    0x00000003  // Timer mode mask
-#define TIMER_TNMR_TNTMR_1_SHOT 0x00000001  // Mode - one shot
-#define TIMER_TNMR_TNTMR_PERIOD 0x00000002  // Mode - periodic
-#define TIMER_TNMR_TNTMR_CAP    0x00000003  // Mode - capture
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnPR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNPR_TNPSR        0x000000FF  // TimerN prescale value
-
-//*****************************************************************************
-//
-// The following are deprecated defines for the bit fields in the TIMER_TnPMR
-// register.
-//
-//*****************************************************************************
-#define TIMER_TNPMR_TNPSMR      0x000000FF  // TimerN prescale match value
-
-#endif
-
-#endif // __HW_TIMER_H__
diff --git a/ports/cc3200/hal/inc/hw_types.h b/ports/cc3200/hal/inc/hw_types.h
deleted file mode 100644
index d7a6ab4fedf37..0000000000000
--- a/ports/cc3200/hal/inc/hw_types.h
+++ /dev/null
@@ -1,76 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_TYPES_H__
-#define __HW_TYPES_H__
-
-//*****************************************************************************
-//
-// Define a boolean type, and values for true and false.
-//
-//*****************************************************************************
-typedef unsigned char tBoolean;
-
-#ifndef true
-#define true 1
-#endif
-
-#ifndef false
-#define false 0
-#endif
-
-//*****************************************************************************
-//
-// Macros for hardware access, both direct and via the bit-band region.
-//
-//*****************************************************************************
-#define HWREG(x)                                                              \
-        (*((volatile unsigned long *)(x)))
-#define HWREGH(x)                                                             \
-        (*((volatile unsigned short *)(x)))
-#define HWREGB(x)                                                             \
-        (*((volatile unsigned char *)(x)))
-#define HWREGBITW(x, b)                                                       \
-        HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 |                \
-              (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITH(x, b)                                                       \
-        HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \
-               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITB(x, b)                                                       \
-        HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 |               \
-               (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-
-
-#endif // __HW_TYPES_H__
diff --git a/ports/cc3200/hal/inc/hw_uart.h b/ports/cc3200/hal/inc/hw_uart.h
deleted file mode 100644
index ae50ac381fe47..0000000000000
--- a/ports/cc3200/hal/inc/hw_uart.h
+++ /dev/null
@@ -1,417 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_UART_H__
-#define __HW_UART_H__
-
-//*****************************************************************************
-//
-// The following are defines for the UART register offsets.
-//
-//*****************************************************************************
-#define UART_O_DR               0x00000000
-#define UART_O_RSR              0x00000004
-#define UART_O_ECR              0x00000004
-#define UART_O_FR               0x00000018
-#define UART_O_ILPR             0x00000020
-#define UART_O_IBRD             0x00000024
-#define UART_O_FBRD             0x00000028
-#define UART_O_LCRH             0x0000002C
-#define UART_O_CTL              0x00000030
-#define UART_O_IFLS             0x00000034
-#define UART_O_IM               0x00000038
-#define UART_O_RIS              0x0000003C
-#define UART_O_MIS              0x00000040
-#define UART_O_ICR              0x00000044
-#define UART_O_DMACTL           0x00000048
-#define UART_O_LCTL             0x00000090
-#define UART_O_LSS              0x00000094
-#define UART_O_LTIM             0x00000098
-#define UART_O_9BITADDR      0x000000A4
-#define UART_O_9BITAMASK     0x000000A8
-#define UART_O_PP               0x00000FC0
-#define UART_O_CC               0x00000FC8
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_DR register.
-//
-//******************************************************************************
-#define UART_DR_OE              0x00000800  // UART Overrun Error
-#define UART_DR_BE              0x00000400  // UART Break Error
-#define UART_DR_PE              0x00000200  // UART Parity Error
-#define UART_DR_FE              0x00000100  // UART Framing Error
-#define UART_DR_DATA_M        0x000000FF  // Data Transmitted or Received
-#define UART_DR_DATA_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_RSR register.
-//
-//******************************************************************************
-#define UART_RSR_OE             0x00000008  // UART Overrun Error
-#define UART_RSR_BE             0x00000004  // UART Break Error
-#define UART_RSR_PE             0x00000002  // UART Parity Error
-#define UART_RSR_FE             0x00000001  // UART Framing Error
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ECR register.
-//
-//******************************************************************************
-#define UART_ECR_DATA_M       0x000000FF  // Error Clear
-#define UART_ECR_DATA_S       0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_FR register.
-//
-//******************************************************************************
-#define UART_FR_RI              0x00000100  // Ring Indicator
-#define UART_FR_TXFE            0x00000080  // UART Transmit FIFO Empty
-#define UART_FR_RXFF            0x00000040  // UART Receive FIFO Full
-#define UART_FR_TXFF            0x00000020  // UART Transmit FIFO Full
-#define UART_FR_RXFE            0x00000010  // UART Receive FIFO Empty
-#define UART_FR_BUSY            0x00000008  // UART Busy
-#define UART_FR_DCD             0x00000004  // Data Carrier Detect
-#define UART_FR_DSR             0x00000002  // Data Set Ready
-#define UART_FR_CTS             0x00000001  // Clear To Send
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ILPR register.
-//
-//******************************************************************************
-#define UART_ILPR_ILPDVSR_M   0x000000FF  // IrDA Low-Power Divisor
-#define UART_ILPR_ILPDVSR_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IBRD register.
-//
-//******************************************************************************
-#define UART_IBRD_DIVINT_M    0x0000FFFF  // Integer Baud-Rate Divisor
-#define UART_IBRD_DIVINT_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_FBRD register.
-//
-//******************************************************************************
-#define UART_FBRD_DIVFRAC_M   0x0000003F  // Fractional Baud-Rate Divisor
-#define UART_FBRD_DIVFRAC_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LCRH register.
-//
-//******************************************************************************
-#define UART_LCRH_SPS           0x00000080  // UART Stick Parity Select
-#define UART_LCRH_WLEN_M      0x00000060  // UART Word Length 0x00000000 :
-                                            // UART_LCRH_WLEN_5 : 5 bits
-                                            // (default) 0x00000020 :
-                                            // UART_LCRH_WLEN_6 : 6 bits
-                                            // 0x00000040 : UART_LCRH_WLEN_7 : 7
-                                            // bits 0x00000060 :
-                                            // UART_LCRH_WLEN_8 : 8 bits
-#define UART_LCRH_WLEN_S      5
-#define UART_LCRH_FEN           0x00000010  // UART Enable FIFOs
-#define UART_LCRH_STP2          0x00000008  // UART Two Stop Bits Select
-#define UART_LCRH_EPS           0x00000004  // UART Even Parity Select
-#define UART_LCRH_PEN           0x00000002  // UART Parity Enable
-#define UART_LCRH_BRK           0x00000001  // UART Send Break
-#define UART_LCRH_WLEN_M        0x00000060  // UART Word Length
-#define UART_LCRH_WLEN_5        0x00000000  // 5 bits (default)
-#define UART_LCRH_WLEN_6        0x00000020  // 6 bits
-#define UART_LCRH_WLEN_7        0x00000040  // 7 bits
-#define UART_LCRH_WLEN_8        0x00000060  // 8 bits
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_CTL register.
-//
-//******************************************************************************
-#define UART_CTL_CTSEN          0x00008000  // Enable Clear To Send
-#define UART_CTL_RTSEN          0x00004000  // Enable Request to Send
-#define UART_CTL_RI             0x00002000  // Ring Indicator
-#define UART_CTL_DCD            0x00001000  // Data Carrier Detect
-#define UART_CTL_RTS            0x00000800  // Request to Send
-#define UART_CTL_DTR            0x00000400  // Data Terminal Ready
-#define UART_CTL_RXE            0x00000200  // UART Receive Enable
-#define UART_CTL_TXE            0x00000100  // UART Transmit Enable
-#define UART_CTL_LBE            0x00000080  // UART Loop Back Enable
-#define UART_CTL_LIN            0x00000040  // LIN Mode Enable
-#define UART_CTL_HSE            0x00000020  // High-Speed Enable
-#define UART_CTL_EOT            0x00000010  // End of Transmission
-#define UART_CTL_SMART          0x00000008  // ISO 7816 Smart Card Support
-#define UART_CTL_SIRLP          0x00000004  // UART SIR Low-Power Mode
-#define UART_CTL_SIREN          0x00000002  // UART SIR Enable
-#define UART_CTL_UARTEN         0x00000001  // UART Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IFLS register.
-//
-//******************************************************************************
-#define UART_IFLS_RX_M        0x00000038  // UART Receive Interrupt FIFO
-                                            // Level Select
-#define UART_IFLS_RX_S        3
-#define UART_IFLS_TX_M        0x00000007  // UART Transmit Interrupt FIFO
-                                            // Level Select
-#define UART_IFLS_TX_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_IM register.
-//
-//******************************************************************************
-#define UART_IM_DMATXIM         0x00020000  // Transmit DMA Interrupt Mask
-#define UART_IM_DMARXIM         0x00010000  // Receive DMA Interrupt Mask
-#define UART_IM_LME5IM          0x00008000  // LIN Mode Edge 5 Interrupt Mask
-#define UART_IM_LME1IM          0x00004000  // LIN Mode Edge 1 Interrupt Mask
-#define UART_IM_LMSBIM          0x00002000  // LIN Mode Sync Break Interrupt
-                                            // Mask
-#define UART_IM_9BITIM       0x00001000  // 9-Bit Mode Interrupt Mask
-#define UART_IM_EOTIM           0x00000800  // End of Transmission Interrupt
-                                            // Mask
-#define UART_IM_OEIM            0x00000400  // UART Overrun Error Interrupt
-                                            // Mask
-#define UART_IM_BEIM            0x00000200  // UART Break Error Interrupt Mask
-#define UART_IM_PEIM            0x00000100  // UART Parity Error Interrupt Mask
-#define UART_IM_FEIM            0x00000080  // UART Framing Error Interrupt
-                                            // Mask
-#define UART_IM_RTIM            0x00000040  // UART Receive Time-Out Interrupt
-                                            // Mask
-#define UART_IM_TXIM            0x00000020  // UART Transmit Interrupt Mask
-#define UART_IM_RXIM            0x00000010  // UART Receive Interrupt Mask
-#define UART_IM_DSRMIM          0x00000008  // UART Data Set Ready Modem
-                                            // Interrupt Mask
-#define UART_IM_DCDMIM          0x00000004  // UART Data Carrier Detect Modem
-                                            // Interrupt Mask
-#define UART_IM_CTSMIM          0x00000002  // UART Clear to Send Modem
-                                            // Interrupt Mask
-#define UART_IM_RIMIM           0x00000001  // UART Ring Indicator Modem
-                                            // Interrupt Mask
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_RIS register.
-//
-//******************************************************************************
-#define UART_RIS_DMATXRIS       0x00020000  // Transmit DMA Raw Interrupt
-                                            // Status
-#define UART_RIS_DMARXRIS       0x00010000  // Receive DMA Raw Interrupt Status
-#define UART_RIS_LME5RIS        0x00008000  // LIN Mode Edge 5 Raw Interrupt
-                                            // Status
-#define UART_RIS_LME1RIS        0x00004000  // LIN Mode Edge 1 Raw Interrupt
-                                            // Status
-#define UART_RIS_LMSBRIS        0x00002000  // LIN Mode Sync Break Raw
-                                            // Interrupt Status
-#define UART_RIS_9BITRIS     0x00001000  // 9-Bit Mode Raw Interrupt Status
-#define UART_RIS_EOTRIS         0x00000800  // End of Transmission Raw
-                                            // Interrupt Status
-#define UART_RIS_OERIS          0x00000400  // UART Overrun Error Raw Interrupt
-                                            // Status
-#define UART_RIS_BERIS          0x00000200  // UART Break Error Raw Interrupt
-                                            // Status
-#define UART_RIS_PERIS          0x00000100  // UART Parity Error Raw Interrupt
-                                            // Status
-#define UART_RIS_FERIS          0x00000080  // UART Framing Error Raw Interrupt
-                                            // Status
-#define UART_RIS_RTRIS          0x00000040  // UART Receive Time-Out Raw
-                                            // Interrupt Status
-#define UART_RIS_TXRIS          0x00000020  // UART Transmit Raw Interrupt
-                                            // Status
-#define UART_RIS_RXRIS          0x00000010  // UART Receive Raw Interrupt
-                                            // Status
-#define UART_RIS_DSRRIS         0x00000008  // UART Data Set Ready Modem Raw
-                                            // Interrupt Status
-#define UART_RIS_DCDRIS         0x00000004  // UART Data Carrier Detect Modem
-                                            // Raw Interrupt Status
-#define UART_RIS_CTSRIS         0x00000002  // UART Clear to Send Modem Raw
-                                            // Interrupt Status
-#define UART_RIS_RIRIS          0x00000001  // UART Ring Indicator Modem Raw
-                                            // Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_MIS register.
-//
-//******************************************************************************
-#define UART_MIS_DMATXMIS       0x00020000  // Transmit DMA Masked Interrupt
-                                            // Status
-#define UART_MIS_DMARXMIS       0x00010000  // Receive DMA Masked Interrupt
-                                            // Status
-#define UART_MIS_LME5MIS        0x00008000  // LIN Mode Edge 5 Masked Interrupt
-                                            // Status
-#define UART_MIS_LME1MIS        0x00004000  // LIN Mode Edge 1 Masked Interrupt
-                                            // Status
-#define UART_MIS_LMSBMIS        0x00002000  // LIN Mode Sync Break Masked
-                                            // Interrupt Status
-#define UART_MIS_9BITMIS     0x00001000  // 9-Bit Mode Masked Interrupt
-                                            // Status
-#define UART_MIS_EOTMIS         0x00000800  // End of Transmission Masked
-                                            // Interrupt Status
-#define UART_MIS_OEMIS          0x00000400  // UART Overrun Error Masked
-                                            // Interrupt Status
-#define UART_MIS_BEMIS          0x00000200  // UART Break Error Masked
-                                            // Interrupt Status
-#define UART_MIS_PEMIS          0x00000100  // UART Parity Error Masked
-                                            // Interrupt Status
-#define UART_MIS_FEMIS          0x00000080  // UART Framing Error Masked
-                                            // Interrupt Status
-#define UART_MIS_RTMIS          0x00000040  // UART Receive Time-Out Masked
-                                            // Interrupt Status
-#define UART_MIS_TXMIS          0x00000020  // UART Transmit Masked Interrupt
-                                            // Status
-#define UART_MIS_RXMIS          0x00000010  // UART Receive Masked Interrupt
-                                            // Status
-#define UART_MIS_DSRMIS         0x00000008  // UART Data Set Ready Modem Masked
-                                            // Interrupt Status
-#define UART_MIS_DCDMIS         0x00000004  // UART Data Carrier Detect Modem
-                                            // Masked Interrupt Status
-#define UART_MIS_CTSMIS         0x00000002  // UART Clear to Send Modem Masked
-                                            // Interrupt Status
-#define UART_MIS_RIMIS          0x00000001  // UART Ring Indicator Modem Masked
-                                            // Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_ICR register.
-//
-//******************************************************************************
-#define UART_ICR_DMATXIC        0x00020000  // Transmit DMA Interrupt Clear
-#define UART_ICR_DMARXIC        0x00010000  // Receive DMA Interrupt Clear
-#define UART_ICR_LME5MIC        0x00008000  // LIN Mode Edge 5 Interrupt Clear
-#define UART_ICR_LME1MIC        0x00004000  // LIN Mode Edge 1 Interrupt Clear
-#define UART_ICR_LMSBMIC        0x00002000  // LIN Mode Sync Break Interrupt
-                                            // Clear
-#define UART_ICR_9BITIC      0x00001000  // 9-Bit Mode Interrupt Clear
-#define UART_ICR_EOTIC          0x00000800  // End of Transmission Interrupt
-                                            // Clear
-#define UART_ICR_OEIC           0x00000400  // Overrun Error Interrupt Clear
-#define UART_ICR_BEIC           0x00000200  // Break Error Interrupt Clear
-#define UART_ICR_PEIC           0x00000100  // Parity Error Interrupt Clear
-#define UART_ICR_FEIC           0x00000080  // Framing Error Interrupt Clear
-#define UART_ICR_RTIC           0x00000040  // Receive Time-Out Interrupt Clear
-#define UART_ICR_TXIC           0x00000020  // Transmit Interrupt Clear
-#define UART_ICR_RXIC           0x00000010  // Receive Interrupt Clear
-#define UART_ICR_DSRMIC         0x00000008  // UART Data Set Ready Modem
-                                            // Interrupt Clear
-#define UART_ICR_DCDMIC         0x00000004  // UART Data Carrier Detect Modem
-                                            // Interrupt Clear
-#define UART_ICR_CTSMIC         0x00000002  // UART Clear to Send Modem
-                                            // Interrupt Clear
-#define UART_ICR_RIMIC          0x00000001  // UART Ring Indicator Modem
-                                            // Interrupt Clear
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_DMACTL register.
-//
-//******************************************************************************
-#define UART_DMACTL_DMAERR      0x00000004  // DMA on Error
-#define UART_DMACTL_TXDMAE      0x00000002  // Transmit DMA Enable
-#define UART_DMACTL_RXDMAE      0x00000001  // Receive DMA Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LCTL register.
-//
-//******************************************************************************
-#define UART_LCTL_BLEN_M      0x00000030  // Sync Break Length 0x00000000 :
-                                            // UART_LCTL_BLEN_13T : Sync break
-                                            // length is 13T bits (default)
-                                            // 0x00000010 : UART_LCTL_BLEN_14T :
-                                            // Sync break length is 14T bits
-                                            // 0x00000020 : UART_LCTL_BLEN_15T :
-                                            // Sync break length is 15T bits
-                                            // 0x00000030 : UART_LCTL_BLEN_16T :
-                                            // Sync break length is 16T bits
-#define UART_LCTL_BLEN_S      4
-#define UART_LCTL_MASTER        0x00000001  // LIN Master Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LSS register.
-//
-//******************************************************************************
-#define UART_LSS_TSS_M        0x0000FFFF  // Timer Snap Shot
-#define UART_LSS_TSS_S        0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_LTIM register.
-//
-//******************************************************************************
-#define UART_LTIM_TIMER_M     0x0000FFFF  // Timer Value
-#define UART_LTIM_TIMER_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UART_O_9BITADDR register.
-//
-//******************************************************************************
-#define UART_9BITADDR_9BITEN \
-                                0x00008000  // Enable 9-Bit Mode
-
-#define UART_9BITADDR_ADDR_M \
-                                0x000000FF  // Self Address for 9-Bit Mode
-
-#define UART_9BITADDR_ADDR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UART_O_9BITAMASK register.
-//
-//******************************************************************************
-#define UART_9BITAMASK_RANGE_M \
-                                0x0000FF00  // Self Address Range for 9-Bit
-                                            // Mode
-
-#define UART_9BITAMASK_RANGE_S 8
-#define UART_9BITAMASK_MASK_M \
-                                0x000000FF  // Self Address Mask for 9-Bit Mode
-
-#define UART_9BITAMASK_MASK_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_PP register.
-//
-//******************************************************************************
-#define UART_PP_MSE             0x00000008  // Modem Support Extended
-#define UART_PP_MS              0x00000004  // Modem Support
-#define UART_PP_NB              0x00000002  // 9-Bit Support
-#define UART_PP_SC              0x00000001  // Smart Card Support
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UART_O_CC register.
-//
-//******************************************************************************
-#define UART_CC_CS_M          0x0000000F  // UART Baud Clock Source
-                                            // 0x00000005 : UART_CC_CS_PIOSC :
-                                            // PIOSC 0x00000000 :
-                                            // UART_CC_CS_SYSCLK : The system
-                                            // clock (default)
-#define UART_CC_CS_S          0
-
-
-
-#endif // __HW_UART_H__
diff --git a/ports/cc3200/hal/inc/hw_udma.h b/ports/cc3200/hal/inc/hw_udma.h
deleted file mode 100644
index 9a495baea87d0..0000000000000
--- a/ports/cc3200/hal/inc/hw_udma.h
+++ /dev/null
@@ -1,336 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_UDMA_H__
-#define __HW_UDMA_H__
-
-//*****************************************************************************
-//
-// The following are defines for the UDMA register offsets.
-//
-//*****************************************************************************
-#define UDMA_O_STAT             0x00000000
-#define UDMA_O_CFG              0x00000004
-#define UDMA_O_CTLBASE          0x00000008
-#define UDMA_O_ALTBASE          0x0000000C
-#define UDMA_O_WAITSTAT         0x00000010
-#define UDMA_O_SWREQ            0x00000014
-#define UDMA_O_USEBURSTSET      0x00000018
-#define UDMA_O_USEBURSTCLR      0x0000001C
-#define UDMA_O_REQMASKSET       0x00000020
-#define UDMA_O_REQMASKCLR       0x00000024
-#define UDMA_O_ENASET           0x00000028
-#define UDMA_O_ENACLR           0x0000002C
-#define UDMA_O_ALTSET           0x00000030
-#define UDMA_O_ALTCLR           0x00000034
-#define UDMA_O_PRIOSET          0x00000038
-#define UDMA_O_PRIOCLR          0x0000003C
-#define UDMA_O_ERRCLR           0x0000004C
-#define UDMA_O_CHASGN           0x00000500
-#define UDMA_O_CHIS             0x00000504
-#define UDMA_O_CHMAP0           0x00000510
-#define UDMA_O_CHMAP1           0x00000514
-#define UDMA_O_CHMAP2           0x00000518
-#define UDMA_O_CHMAP3           0x0000051C
-#define UDMA_O_PV               0x00000FB0
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_STAT register.
-//
-//******************************************************************************
-#define UDMA_STAT_DMACHANS_M  0x001F0000  // Available uDMA Channels Minus 1
-#define UDMA_STAT_DMACHANS_S  16
-#define UDMA_STAT_STATE_M     0x000000F0  // Control State Machine Status
-                                            // 0x00000090 : UDMA_STAT_STATE_DONE
-                                            // : Done 0x00000000 :
-                                            // UDMA_STAT_STATE_IDLE : Idle
-                                            // 0x00000010 :
-                                            // UDMA_STAT_STATE_RD_CTRL : Reading
-                                            // channel controller data
-                                            // 0x00000030 :
-                                            // UDMA_STAT_STATE_RD_DSTENDP :
-                                            // Reading destination end pointer
-                                            // 0x00000040 :
-                                            // UDMA_STAT_STATE_RD_SRCDAT :
-                                            // Reading source data 0x00000020 :
-                                            // UDMA_STAT_STATE_RD_SRCENDP :
-                                            // Reading source end pointer
-                                            // 0x00000080 :
-                                            // UDMA_STAT_STATE_STALL : Stalled
-                                            // 0x000000A0 :
-                                            // UDMA_STAT_STATE_UNDEF : Undefined
-                                            // 0x00000060 : UDMA_STAT_STATE_WAIT
-                                            // : Waiting for uDMA request to
-                                            // clear 0x00000070 :
-                                            // UDMA_STAT_STATE_WR_CTRL : Writing
-                                            // channel controller data
-                                            // 0x00000050 :
-                                            // UDMA_STAT_STATE_WR_DSTDAT :
-                                            // Writing destination data
-#define UDMA_STAT_STATE_S     4
-#define UDMA_STAT_MASTEN        0x00000001  // Master Enable Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CFG register.
-//
-//******************************************************************************
-#define UDMA_CFG_MASTEN         0x00000001  // Controller Master Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CTLBASE register.
-//
-//******************************************************************************
-#define UDMA_CTLBASE_ADDR_M   0xFFFFFC00  // Channel Control Base Address
-#define UDMA_CTLBASE_ADDR_S   10
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTBASE register.
-//
-//******************************************************************************
-#define UDMA_ALTBASE_ADDR_M   0xFFFFFFFF  // Alternate Channel Address
-                                            // Pointer
-#define UDMA_ALTBASE_ADDR_S   0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_WAITSTAT register.
-//
-//******************************************************************************
-#define UDMA_WAITSTAT_WAITREQ_M \
-                                0xFFFFFFFF  // Channel [n] Wait Status
-
-#define UDMA_WAITSTAT_WAITREQ_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_SWREQ register.
-//
-//******************************************************************************
-#define UDMA_SWREQ_M          0xFFFFFFFF  // Channel [n] Software Request
-#define UDMA_SWREQ_S          0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UDMA_O_USEBURSTSET register.
-//
-//******************************************************************************
-#define UDMA_USEBURSTSET_SET_M \
-                                0xFFFFFFFF  // Channel [n] Useburst Set
-
-#define UDMA_USEBURSTSET_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the
-// UDMA_O_USEBURSTCLR register.
-//
-//******************************************************************************
-#define UDMA_USEBURSTCLR_CLR_M \
-                                0xFFFFFFFF  // Channel [n] Useburst Clear
-
-#define UDMA_USEBURSTCLR_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_REQMASKSET register.
-//
-//******************************************************************************
-#define UDMA_REQMASKSET_SET_M 0xFFFFFFFF  // Channel [n] Request Mask Set
-#define UDMA_REQMASKSET_SET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_REQMASKCLR register.
-//
-//******************************************************************************
-#define UDMA_REQMASKCLR_CLR_M 0xFFFFFFFF  // Channel [n] Request Mask Clear
-#define UDMA_REQMASKCLR_CLR_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ENASET register.
-//
-//******************************************************************************
-#define UDMA_ENASET_CHENSET_M 0xFFFFFFFF  // Channel [n] Enable Set
-#define UDMA_ENASET_CHENSET_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ENACLR register.
-//
-//******************************************************************************
-#define UDMA_ENACLR_CLR_M     0xFFFFFFFF  // Clear Channel [n] Enable Clear
-#define UDMA_ENACLR_CLR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTSET register.
-//
-//******************************************************************************
-#define UDMA_ALTSET_SET_M     0xFFFFFFFF  // Channel [n] Alternate Set
-#define UDMA_ALTSET_SET_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ALTCLR register.
-//
-//******************************************************************************
-#define UDMA_ALTCLR_CLR_M     0xFFFFFFFF  // Channel [n] Alternate Clear
-#define UDMA_ALTCLR_CLR_S     0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PRIOSET register.
-//
-//******************************************************************************
-#define UDMA_PRIOSET_SET_M    0xFFFFFFFF  // Channel [n] Priority Set
-#define UDMA_PRIOSET_SET_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PRIOCLR register.
-//
-//******************************************************************************
-#define UDMA_PRIOCLR_CLR_M    0xFFFFFFFF  // Channel [n] Priority Clear
-#define UDMA_PRIOCLR_CLR_S    0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_ERRCLR register.
-//
-//******************************************************************************
-#define UDMA_ERRCLR_ERRCLR      0x00000001  // uDMA Bus Error Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHASGN register.
-//
-//******************************************************************************
-#define UDMA_CHASGN_M         0xFFFFFFFF  // Channel [n] Assignment Select
-#define UDMA_CHASGN_S         0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHIS register.
-//
-//******************************************************************************
-#define UDMA_CHIS_M           0xFFFFFFFF  // Channel [n] Interrupt Status
-#define UDMA_CHIS_S           0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP0 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP0_CH7SEL_M  0xF0000000  // uDMA Channel 7 Source Select
-#define UDMA_CHMAP0_CH7SEL_S  28
-#define UDMA_CHMAP0_CH6SEL_M  0x0F000000  // uDMA Channel 6 Source Select
-#define UDMA_CHMAP0_CH6SEL_S  24
-#define UDMA_CHMAP0_CH5SEL_M  0x00F00000  // uDMA Channel 5 Source Select
-#define UDMA_CHMAP0_CH5SEL_S  20
-#define UDMA_CHMAP0_CH4SEL_M  0x000F0000  // uDMA Channel 4 Source Select
-#define UDMA_CHMAP0_CH4SEL_S  16
-#define UDMA_CHMAP0_CH3SEL_M  0x0000F000  // uDMA Channel 3 Source Select
-#define UDMA_CHMAP0_CH3SEL_S  12
-#define UDMA_CHMAP0_CH2SEL_M  0x00000F00  // uDMA Channel 2 Source Select
-#define UDMA_CHMAP0_CH2SEL_S  8
-#define UDMA_CHMAP0_CH1SEL_M  0x000000F0  // uDMA Channel 1 Source Select
-#define UDMA_CHMAP0_CH1SEL_S  4
-#define UDMA_CHMAP0_CH0SEL_M  0x0000000F  // uDMA Channel 0 Source Select
-#define UDMA_CHMAP0_CH0SEL_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP1 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP1_CH15SEL_M 0xF0000000  // uDMA Channel 15 Source Select
-#define UDMA_CHMAP1_CH15SEL_S 28
-#define UDMA_CHMAP1_CH14SEL_M 0x0F000000  // uDMA Channel 14 Source Select
-#define UDMA_CHMAP1_CH14SEL_S 24
-#define UDMA_CHMAP1_CH13SEL_M 0x00F00000  // uDMA Channel 13 Source Select
-#define UDMA_CHMAP1_CH13SEL_S 20
-#define UDMA_CHMAP1_CH12SEL_M 0x000F0000  // uDMA Channel 12 Source Select
-#define UDMA_CHMAP1_CH12SEL_S 16
-#define UDMA_CHMAP1_CH11SEL_M 0x0000F000  // uDMA Channel 11 Source Select
-#define UDMA_CHMAP1_CH11SEL_S 12
-#define UDMA_CHMAP1_CH10SEL_M 0x00000F00  // uDMA Channel 10 Source Select
-#define UDMA_CHMAP1_CH10SEL_S 8
-#define UDMA_CHMAP1_CH9SEL_M  0x000000F0  // uDMA Channel 9 Source Select
-#define UDMA_CHMAP1_CH9SEL_S  4
-#define UDMA_CHMAP1_CH8SEL_M  0x0000000F  // uDMA Channel 8 Source Select
-#define UDMA_CHMAP1_CH8SEL_S  0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP2 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP2_CH23SEL_M 0xF0000000  // uDMA Channel 23 Source Select
-#define UDMA_CHMAP2_CH23SEL_S 28
-#define UDMA_CHMAP2_CH22SEL_M 0x0F000000  // uDMA Channel 22 Source Select
-#define UDMA_CHMAP2_CH22SEL_S 24
-#define UDMA_CHMAP2_CH21SEL_M 0x00F00000  // uDMA Channel 21 Source Select
-#define UDMA_CHMAP2_CH21SEL_S 20
-#define UDMA_CHMAP2_CH20SEL_M 0x000F0000  // uDMA Channel 20 Source Select
-#define UDMA_CHMAP2_CH20SEL_S 16
-#define UDMA_CHMAP2_CH19SEL_M 0x0000F000  // uDMA Channel 19 Source Select
-#define UDMA_CHMAP2_CH19SEL_S 12
-#define UDMA_CHMAP2_CH18SEL_M 0x00000F00  // uDMA Channel 18 Source Select
-#define UDMA_CHMAP2_CH18SEL_S 8
-#define UDMA_CHMAP2_CH17SEL_M 0x000000F0  // uDMA Channel 17 Source Select
-#define UDMA_CHMAP2_CH17SEL_S 4
-#define UDMA_CHMAP2_CH16SEL_M 0x0000000F  // uDMA Channel 16 Source Select
-#define UDMA_CHMAP2_CH16SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_CHMAP3 register.
-//
-//******************************************************************************
-#define UDMA_CHMAP3_CH31SEL_M 0xF0000000  // uDMA Channel 31 Source Select
-#define UDMA_CHMAP3_CH31SEL_S 28
-#define UDMA_CHMAP3_CH30SEL_M 0x0F000000  // uDMA Channel 30 Source Select
-#define UDMA_CHMAP3_CH30SEL_S 24
-#define UDMA_CHMAP3_CH29SEL_M 0x00F00000  // uDMA Channel 29 Source Select
-#define UDMA_CHMAP3_CH29SEL_S 20
-#define UDMA_CHMAP3_CH28SEL_M 0x000F0000  // uDMA Channel 28 Source Select
-#define UDMA_CHMAP3_CH28SEL_S 16
-#define UDMA_CHMAP3_CH27SEL_M 0x0000F000  // uDMA Channel 27 Source Select
-#define UDMA_CHMAP3_CH27SEL_S 12
-#define UDMA_CHMAP3_CH26SEL_M 0x00000F00  // uDMA Channel 26 Source Select
-#define UDMA_CHMAP3_CH26SEL_S 8
-#define UDMA_CHMAP3_CH25SEL_M 0x000000F0  // uDMA Channel 25 Source Select
-#define UDMA_CHMAP3_CH25SEL_S 4
-#define UDMA_CHMAP3_CH24SEL_M 0x0000000F  // uDMA Channel 24 Source Select
-#define UDMA_CHMAP3_CH24SEL_S 0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the UDMA_O_PV register.
-//
-//******************************************************************************
-#define UDMA_PV_MAJOR_M       0x0000FF00  // Major Revision
-#define UDMA_PV_MAJOR_S       8
-#define UDMA_PV_MINOR_M       0x000000FF  // Minor Revision
-#define UDMA_PV_MINOR_S       0
-
-
-
-#endif // __HW_UDMA_H__
diff --git a/ports/cc3200/hal/inc/hw_wdt.h b/ports/cc3200/hal/inc/hw_wdt.h
deleted file mode 100644
index 00b14acbe3ba2..0000000000000
--- a/ports/cc3200/hal/inc/hw_wdt.h
+++ /dev/null
@@ -1,131 +0,0 @@
-//*****************************************************************************
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __HW_WDT_H__
-#define __HW_WDT_H__
-
-//*****************************************************************************
-//
-// The following are defines for the WDT register offsets.
-//
-//*****************************************************************************
-#define WDT_O_LOAD              0x00000000
-#define WDT_O_VALUE             0x00000004
-#define WDT_O_CTL               0x00000008
-#define WDT_O_ICR               0x0000000C
-#define WDT_O_RIS               0x00000010
-#define WDT_O_MIS               0x00000014
-#define WDT_O_TEST              0x00000418
-#define WDT_O_LOCK              0x00000C00
-
-
-
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_LOAD register.
-//
-//******************************************************************************
-#define WDT_LOAD_M            0xFFFFFFFF  // Watchdog Load Value
-#define WDT_LOAD_S            0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_VALUE register.
-//
-//******************************************************************************
-#define WDT_VALUE_M           0xFFFFFFFF  // Watchdog Value
-#define WDT_VALUE_S           0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_CTL register.
-//
-//******************************************************************************
-#define WDT_CTL_WRC             0x80000000  // Write Complete
-#define WDT_CTL_INTTYPE         0x00000004  // Watchdog Interrupt Type
-#define WDT_CTL_RESEN           0x00000002  // Watchdog Reset Enable. This bit
-                                            // is not used in cc3xx, WDOG shall
-                                            // always generate RESET to system
-                                            // irrespective of this bit setting.
-#define WDT_CTL_INTEN           0x00000001  // Watchdog Interrupt Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_ICR register.
-//
-//******************************************************************************
-#define WDT_ICR_M             0xFFFFFFFF  // Watchdog Interrupt Clear
-#define WDT_ICR_S             0
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_RIS register.
-//
-//******************************************************************************
-#define WDT_RIS_WDTRIS          0x00000001  // Watchdog Raw Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_MIS register.
-//
-//******************************************************************************
-#define WDT_MIS_WDTMIS          0x00000001  // Watchdog Masked Interrupt Status
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_TEST register.
-//
-//******************************************************************************
-#define WDT_TEST_STALL_EN_M     0x00000C00  // Watchdog stall enable
-#define WDT_TEST_STALL_EN_S     10
-#define WDT_TEST_STALL          0x00000100  // Watchdog Stall Enable
-//******************************************************************************
-//
-// The following are defines for the bit fields in the WDT_O_LOCK register.
-//
-//******************************************************************************
-#define WDT_LOCK_M            0xFFFFFFFF  // Watchdog Lock
-#define WDT_LOCK_S            0
-#define WDT_LOCK_UNLOCKED     0x00000000  // Unlocked
-#define WDT_LOCK_LOCKED       0x00000001  // Locked
-#define WDT_LOCK_UNLOCK       0x1ACCE551  // Unlocks the watchdog timer
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the WDT_ISR, WDT_RIS, and
-// WDT_MIS registers.
-//
-//*****************************************************************************
-#define WDT_INT_TIMEOUT         0x00000001  // Watchdog timer expired
-
-
-
-
-
-#endif // __HW_WDT_H__
diff --git a/ports/cc3200/hal/interrupt.c b/ports/cc3200/hal/interrupt.c
deleted file mode 100644
index 897ad966aec11..0000000000000
--- a/ports/cc3200/hal/interrupt.c
+++ /dev/null
@@ -1,769 +0,0 @@
-//*****************************************************************************
-//
-//  interrupt.c
-//
-//  Driver for the NVIC Interrupt Controller.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup interrupt_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_ints.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_types.h"
-#include "cpu.h"
-#include "debug.h"
-#include "interrupt.h"
-
-//*****************************************************************************
-//
-// This is a mapping between priority grouping encodings and the number of
-// preemption priority bits.
-//
-//*****************************************************************************
-static const unsigned long g_pulPriority[] =
-{
-    NVIC_APINT_PRIGROUP_0_8, NVIC_APINT_PRIGROUP_1_7, NVIC_APINT_PRIGROUP_2_6,
-    NVIC_APINT_PRIGROUP_3_5, NVIC_APINT_PRIGROUP_4_4, NVIC_APINT_PRIGROUP_5_3,
-    NVIC_APINT_PRIGROUP_6_2, NVIC_APINT_PRIGROUP_7_1
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number and the register that contains
-// the priority encoding for that interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulRegs[] =
-{
-    0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, NVIC_PRI0, NVIC_PRI1,
-    NVIC_PRI2, NVIC_PRI3, NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7,
-    NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, NVIC_PRI12, NVIC_PRI13,
-    NVIC_PRI14, NVIC_PRI15, NVIC_PRI16, NVIC_PRI17, NVIC_PRI18, NVIC_PRI19,
-    NVIC_PRI20, NVIC_PRI21, NVIC_PRI22, NVIC_PRI23, NVIC_PRI24, NVIC_PRI25,
-    NVIC_PRI26, NVIC_PRI27, NVIC_PRI28, NVIC_PRI29, NVIC_PRI30, NVIC_PRI31,
-    NVIC_PRI32, NVIC_PRI33, NVIC_PRI34, NVIC_PRI35, NVIC_PRI36, NVIC_PRI37,
-    NVIC_PRI38, NVIC_PRI39, NVIC_PRI40, NVIC_PRI41, NVIC_PRI42, NVIC_PRI43,
-    NVIC_PRI44, NVIC_PRI45, NVIC_PRI46, NVIC_PRI47, NVIC_PRI48
-
-};
-
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt enable for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulEnRegs[] =
-{
-    NVIC_EN0, NVIC_EN1, NVIC_EN2, NVIC_EN3, NVIC_EN4, NVIC_EN5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt disable for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulDisRegs[] =
-{
-    NVIC_DIS0, NVIC_DIS1, NVIC_DIS2, NVIC_DIS3, NVIC_DIS4, NVIC_DIS5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt pend for that interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulPendRegs[] =
-{
-    NVIC_PEND0, NVIC_PEND1, NVIC_PEND2, NVIC_PEND3, NVIC_PEND4, NVIC_PEND5
-};
-
-//*****************************************************************************
-//
-// This is a mapping between interrupt number (for the peripheral interrupts
-// only) and the register that contains the interrupt unpend for that
-// interrupt.
-//
-//*****************************************************************************
-static const unsigned long g_pulUnpendRegs[] =
-{
-    NVIC_UNPEND0, NVIC_UNPEND1, NVIC_UNPEND2, NVIC_UNPEND3, NVIC_UNPEND4,
-    NVIC_UNPEND5
-};
-
-
-//*****************************************************************************
-//
-//! \internal
-//! The default interrupt handler.
-//!
-//! This is the default interrupt handler for all interrupts.  It simply loops
-//! forever so that the system state is preserved for observation by a
-//! debugger.  Since interrupts should be disabled before unregistering the
-//! corresponding handler, this should never be called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-static void
-IntDefaultHandler(void)
-{
-    //
-    // Go into an infinite loop.
-    //
-    while(1)
-    {
-    }
-}
-
-//*****************************************************************************
-//
-//! Enables the processor interrupt.
-//!
-//! Allows the processor to respond to interrupts.  This does not affect the
-//! set of interrupts enabled in the interrupt controller; it just gates the
-//! single interrupt from the controller to the processor.
-//!
-//! \note Previously, this function had no return value.  As such, it was
-//! possible to include interrupt.h and call this function without
-//! having included hw_types.h.  Now that the return is a
-//! tBoolean, a compiler error will occur in this case.  The solution
-//! is to include hw_types.h before including interrupt.h.
-//!
-//! \return Returns \b true if interrupts were disabled when the function was
-//! called or \b false if they were initially enabled.
-//
-//*****************************************************************************
-tBoolean
-IntMasterEnable(void)
-{
-    //
-    // Enable processor interrupts.
-    //
-    return(CPUcpsie());
-}
-
-//*****************************************************************************
-//
-//! Disables the processor interrupt.
-//!
-//! Prevents the processor from receiving interrupts.  This does not affect the
-//! set of interrupts enabled in the interrupt controller; it just gates the
-//! single interrupt from the controller to the processor.
-//!
-//! \note Previously, this function had no return value.  As such, it was
-//! possible to include interrupt.h and call this function without
-//! having included hw_types.h.  Now that the return is a
-//! tBoolean, a compiler error will occur in this case.  The solution
-//! is to include hw_types.h before including interrupt.h.
-//!
-//! \return Returns \b true if interrupts were already disabled when the
-//! function was called or \b false if they were initially enabled.
-//
-//*****************************************************************************
-tBoolean
-IntMasterDisable(void)
-{
-    //
-    // Disable processor interrupts.
-    //
-    return(CPUcpsid());
-}
-//*****************************************************************************
-//
-//! Sets the NVIC VTable base.
-//!
-//! \param ulVtableBase specifies the new base address of VTable
-//!
-//! This function is used to specify a new base address for the VTable.
-//! This function must be called before using IntRegister() for registering
-//! any interrupt handler.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntVTableBaseSet(unsigned long ulVtableBase)
-{
-    HWREG(NVIC_VTABLE) = ulVtableBase;
-}
-
-//*****************************************************************************
-//
-//! Registers a function to be called when an interrupt occurs.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//! \param pfnHandler is a pointer to the function to be called.
-//!
-//! This function is used to specify the handler function to be called when the
-//! given interrupt is asserted to the processor.  When the interrupt occurs,
-//! if it is enabled (via IntEnable()), the handler function will be called in
-//! interrupt context.  Since the handler function can preempt other code, care
-//! must be taken to protect memory or peripherals that are accessed by the
-//! handler and other non-handler code.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void))
-{
-    unsigned long *ulNvicTbl;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    ulNvicTbl = (unsigned long *)HWREG(NVIC_VTABLE);
-    ulNvicTbl[ulInterrupt]= (unsigned long)pfnHandler;
-}
-
-//*****************************************************************************
-//
-//! Unregisters the function to be called when an interrupt occurs.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//!
-//! This function is used to indicate that no handler should be called when the
-//! given interrupt is asserted to the processor.  The interrupt source will be
-//! automatically disabled (via IntDisable()) if necessary.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntUnregister(unsigned long ulInterrupt)
-{
-  unsigned long *ulNvicTbl;
-
-  //
-  // Check the arguments.
-  //
-  ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-  ulNvicTbl = (unsigned long *)HWREG(NVIC_VTABLE);
-  ulNvicTbl[ulInterrupt]= (unsigned long)IntDefaultHandler;
-}
-
-//*****************************************************************************
-//
-//! Sets the priority grouping of the interrupt controller.
-//!
-//! \param ulBits specifies the number of bits of preemptable priority.
-//!
-//! This function specifies the split between preemptable priority levels and
-//! subpriority levels in the interrupt priority specification.  The range of
-//! the grouping values are dependent upon the hardware implementation; on
-//! the CC3200 , three bits are available for hardware interrupt
-//! prioritization and therefore priority grouping values of three through
-//! seven have the same effect.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPriorityGroupingSet(unsigned long ulBits)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulBits < NUM_PRIORITY);
-
-    //
-    // Set the priority grouping.
-    //
-    HWREG(NVIC_APINT) = NVIC_APINT_VECTKEY | g_pulPriority[ulBits];
-}
-
-//*****************************************************************************
-//
-//! Gets the priority grouping of the interrupt controller.
-//!
-//! This function returns the split between preemptable priority levels and
-//! subpriority levels in the interrupt priority specification.
-//!
-//! \return The number of bits of preemptable priority.
-//
-//*****************************************************************************
-unsigned long
-IntPriorityGroupingGet(void)
-{
-    unsigned long ulLoop, ulValue;
-
-    //
-    // Read the priority grouping.
-    //
-    ulValue = HWREG(NVIC_APINT) & NVIC_APINT_PRIGROUP_M;
-
-    //
-    // Loop through the priority grouping values.
-    //
-    for(ulLoop = 0; ulLoop < NUM_PRIORITY; ulLoop++)
-    {
-        //
-        // Stop looping if this value matches.
-        //
-        if(ulValue == g_pulPriority[ulLoop])
-        {
-            break;
-        }
-    }
-
-    //
-    // Return the number of priority bits.
-    //
-    return(ulLoop);
-}
-
-//*****************************************************************************
-//
-//! Sets the priority of an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//! \param ucPriority specifies the priority of the interrupt.
-//!
-//! This function is used to set the priority of an interrupt.  When multiple
-//! interrupts are asserted simultaneously, the ones with the highest priority
-//! are processed before the lower priority interrupts.  Smaller numbers
-//! correspond to higher interrupt priorities; priority 0 is the highest
-//! interrupt priority.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any prioritization must be performed in
-//! those bits.  The remaining bits can be used to sub-prioritize the interrupt
-//! sources, and may be used by the hardware priority mechanism on a future
-//! part.  This arrangement allows priorities to migrate to different NVIC
-//! implementations without changing the gross prioritization of the
-//! interrupts.
-//!
-//! The parameter \e ucPriority can be any one of the following
-//! -\b INT_PRIORITY_LVL_0
-//! -\b INT_PRIORITY_LVL_1
-//! -\b INT_PRIORITY_LVL_2
-//! -\b INT_PRIORITY_LVL_3
-//! -\b INT_PRIORITY_LVL_4
-//! -\b INT_PRIORITY_LVL_5
-//! -\b INT_PRIORITY_LVL_6
-//! -\b INT_PRIORITY_LVL_7
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPrioritySet(unsigned long ulInterrupt, unsigned char ucPriority)
-{
-    unsigned long ulTemp;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
-
-    //
-    // Set the interrupt priority.
-    //
-    ulTemp = HWREG(g_pulRegs[ulInterrupt >> 2]);
-    ulTemp &= ~(0xFF << (8 * (ulInterrupt & 3)));
-    ulTemp |= ucPriority << (8 * (ulInterrupt & 3));
-    HWREG(g_pulRegs[ulInterrupt >> 2]) = ulTemp;
-}
-
-//*****************************************************************************
-//
-//! Gets the priority of an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt in question.
-//!
-//! This function gets the priority of an interrupt.  See IntPrioritySet() for
-//! a definition of the priority value.
-//!
-//! \return Returns the interrupt priority, or -1 if an invalid interrupt was
-//! specified.
-//
-//*****************************************************************************
-long
-IntPriorityGet(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT((ulInterrupt >= 4) && (ulInterrupt < NUM_INTERRUPTS));
-
-    //
-    // Return the interrupt priority.
-    //
-    return((HWREG(g_pulRegs[ulInterrupt >> 2]) >> (8 * (ulInterrupt & 3))) &
-           0xFF);
-}
-
-//*****************************************************************************
-//
-//! Enables an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be enabled.
-//!
-//! The specified interrupt is enabled in the interrupt controller.  Other
-//! enables for the interrupt (such as at the peripheral level) are unaffected
-//! by this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntEnable(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to enable.
-    //
-    if(ulInterrupt == FAULT_MPU)
-    {
-        //
-        // Enable the MemManage interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_MEM;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_BUS)
-    {
-        //
-        // Enable the bus fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_BUS;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_USAGE)
-    {
-        //
-        // Enable the usage fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) |= NVIC_SYS_HND_CTRL_USAGE;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Enable the System Tick interrupt.
-        //
-        HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Enable the general interrupt.
-        //
-        HWREG(g_pulEnRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-}
-
-//*****************************************************************************
-//
-//! Disables an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be disabled.
-//!
-//! The specified interrupt is disabled in the interrupt controller.  Other
-//! enables for the interrupt (such as at the peripheral level) are unaffected
-//! by this function.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntDisable(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to disable.
-    //
-    if(ulInterrupt == FAULT_MPU)
-    {
-        //
-        // Disable the MemManage interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_MEM);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_BUS)
-    {
-        //
-        // Disable the bus fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_BUS);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_USAGE)
-    {
-        //
-        // Disable the usage fault interrupt.
-        //
-        HWREG(NVIC_SYS_HND_CTRL) &= ~(NVIC_SYS_HND_CTRL_USAGE);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Disable the System Tick interrupt.
-        //
-        HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Disable the general interrupt.
-        //
-        HWREG(g_pulDisRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-
-}
-
-//*****************************************************************************
-//
-//! Pends an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be pended.
-//!
-//! The specified interrupt is pended in the interrupt controller.  This will
-//! cause the interrupt controller to execute the corresponding interrupt
-//! handler at the next available time, based on the current interrupt state
-//! priorities.  For example, if called by a higher priority interrupt handler,
-//! the specified interrupt handler will not be called until after the current
-//! interrupt handler has completed execution.  The interrupt must have been
-//! enabled for it to be called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPendSet(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to pend.
-    //
-    if(ulInterrupt == FAULT_NMI)
-    {
-        //
-        // Pend the NMI interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_NMI_SET;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_PENDSV)
-    {
-        //
-        // Pend the PendSV interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PEND_SV;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Pend the SysTick interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTSET;
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Pend the general interrupt.
-        //
-        HWREG(g_pulPendRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-        __asm(" dsb     ");
-        __asm(" isb     ");
-    }
-
-}
-
-//*****************************************************************************
-//
-//! Unpends an interrupt.
-//!
-//! \param ulInterrupt specifies the interrupt to be unpended.
-//!
-//! The specified interrupt is unpended in the interrupt controller.  This will
-//! cause any previously generated interrupts that have not been handled yet
-//! (due to higher priority interrupts or the interrupt no having been enabled
-//! yet) to be discarded.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPendClear(unsigned long ulInterrupt)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ulInterrupt < NUM_INTERRUPTS);
-
-    //
-    // Determine the interrupt to unpend.
-    //
-    if(ulInterrupt == FAULT_PENDSV)
-    {
-        //
-        // Unpend the PendSV interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_UNPEND_SV;
-    }
-    else if(ulInterrupt == FAULT_SYSTICK)
-    {
-        //
-        // Unpend the SysTick interrupt.
-        //
-        HWREG(NVIC_INT_CTRL) |= NVIC_INT_CTRL_PENDSTCLR;
-    }
-    else if(ulInterrupt >= 16)
-    {
-        //
-        // Unpend the general interrupt.
-        //
-        HWREG(g_pulUnpendRegs[(ulInterrupt - 16) / 32]) =
-            1 << ((ulInterrupt - 16) & 31);
-    }
-}
-
-//*****************************************************************************
-//
-//! Sets the priority masking level
-//!
-//! \param ulPriorityMask is the priority level that will be masked.
-//!
-//! This function sets the interrupt priority masking level so that all
-//! interrupts at the specified or lesser priority level is masked.  This
-//! can be used to globally disable a set of interrupts with priority below
-//! a predetermined threshold.  A value of 0 disables priority
-//! masking.
-//!
-//! Smaller numbers correspond to higher interrupt priorities.  So for example
-//! a priority level mask of 4 will allow interrupts of priority level 0-3,
-//! and interrupts with a numerical priority of 4 and greater will be blocked.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any
-//! prioritization must be performed in those bits.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-IntPriorityMaskSet(unsigned long ulPriorityMask)
-{
-    CPUbasepriSet(ulPriorityMask);
-}
-
-//*****************************************************************************
-//
-//! Gets the priority masking level
-//!
-//! This function gets the current setting of the interrupt priority masking
-//! level.  The value returned is the priority level such that all interrupts
-//! of that and lesser priority are masked.  A value of 0 means that priority
-//! masking is disabled.
-//!
-//! Smaller numbers correspond to higher interrupt priorities.  So for example
-//! a priority level mask of 4 will allow interrupts of priority level 0-3,
-//! and interrupts with a numerical priority of 4 and greater will be blocked.
-//!
-//! The hardware priority mechanism will only look at the upper N bits of the
-//! priority level (where N is 3), so any
-//! prioritization must be performed in those bits.
-//!
-//! \return Returns the value of the interrupt priority level mask.
-//
-//*****************************************************************************
-unsigned long
-IntPriorityMaskGet(void)
-{
-    return(CPUbasepriGet());
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/interrupt.h b/ports/cc3200/hal/interrupt.h
deleted file mode 100644
index 941a60f5fec0d..0000000000000
--- a/ports/cc3200/hal/interrupt.h
+++ /dev/null
@@ -1,120 +0,0 @@
-//*****************************************************************************
-//
-//  interrupt.h
-//
-//  Prototypes for the NVIC Interrupt Controller Driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __INTERRUPT_H__
-#define __INTERRUPT_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// A union that describes the entries of the vector table.  The union is needed
-// since the first entry is the stack pointer and the remainder are function
-// pointers.
-//
-//*****************************************************************************
-typedef union
-{
-    void (*pfnHandler)(void);
-    unsigned long ulPtr;
-}
-uVectorEntry;
-
-
-//*****************************************************************************
-//
-// Macro to generate an interrupt priority mask based on the number of bits
-// of priority supported by the hardware.
-//
-//*****************************************************************************
-#define INT_PRIORITY_MASK       ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
-
-//*****************************************************************************
-// Interrupt priority levels
-//*****************************************************************************
-#define INT_PRIORITY_LVL_0      0x00
-#define INT_PRIORITY_LVL_1      0x20
-#define INT_PRIORITY_LVL_2      0x40
-#define INT_PRIORITY_LVL_3      0x60
-#define INT_PRIORITY_LVL_4      0x80
-#define INT_PRIORITY_LVL_5      0xA0
-#define INT_PRIORITY_LVL_6      0xC0
-#define INT_PRIORITY_LVL_7      0xE0
-
-//*****************************************************************************
-//
-// Prototypes for the APIs.
-//
-//*****************************************************************************
-extern tBoolean IntMasterEnable(void);
-extern tBoolean IntMasterDisable(void);
-extern void IntVTableBaseSet(unsigned long ulVtableBase);
-extern void IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void));
-extern void IntUnregister(unsigned long ulInterrupt);
-extern void IntPriorityGroupingSet(unsigned long ulBits);
-extern unsigned long IntPriorityGroupingGet(void);
-extern void IntPrioritySet(unsigned long ulInterrupt,
-                           unsigned char ucPriority);
-extern long IntPriorityGet(unsigned long ulInterrupt);
-extern void IntEnable(unsigned long ulInterrupt);
-extern void IntDisable(unsigned long ulInterrupt);
-extern void IntPendSet(unsigned long ulInterrupt);
-extern void IntPendClear(unsigned long ulInterrupt);
-extern void IntPriorityMaskSet(unsigned long ulPriorityMask);
-extern unsigned long IntPriorityMaskGet(void);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __INTERRUPT_H__
diff --git a/ports/cc3200/hal/pin.c b/ports/cc3200/hal/pin.c
deleted file mode 100644
index 4130a43f059db..0000000000000
--- a/ports/cc3200/hal/pin.c
+++ /dev/null
@@ -1,658 +0,0 @@
-//*****************************************************************************
-//
-//  pin.c
-//
-//  Mapping of peripherals to pins.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup pin_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_ocp_shared.h"
-#include "pin.h"
-
-//*****************************************************************************
-// PIN to PAD matrix
-//*****************************************************************************
-static const unsigned long g_ulPinToPadMap[64] =
-{
-	10,11,12,13,14,15,16,17,255,255,18,
-	19,20,21,22,23,24,40,28,29,25,255,
-	255,255,255,255,255,255,255,255,255,255,255,
-	255,255,255,255,255,255,255,255,255,255,255,
-	31,255,255,255,255,0,255,32,30,255,1,
-	255,2,3,4,5,6,7,8,9
-};
-
-
-//*****************************************************************************
-//
-//! Configures pin mux for the specified pin.
-//!
-//! \param ulPin is a valid pin.
-//! \param ulPinMode is one of the valid mode
-//!
-//! This function configures the pin mux that selects the peripheral function
-//! associated with a particular SOC pin. Only one peripheral function at a
-//! time can be associated with a pin, and each peripheral function should
-//! only be associated with a single pin at a time.
-//!
-//! \return none
-//
-//*****************************************************************************
-void PinModeSet(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Set the mode.
-  //
-  HWREG(ulPad) = (((HWREG(ulPad) & ~PAD_MODE_MASK) |  ulPinMode) & ~(3<<10));
-
-}
-
-//*****************************************************************************
-//
-//! Gets current pin mux configuration of specified pin.
-//!
-//! \param ulPin is a valid pin.
-//!
-//! This function get the current configuration of the pin mux.
-//!
-//! \return Returns current pin mode if \e ulPin is valid, 0xFF otherwise.
-//
-//*****************************************************************************
-unsigned long PinModeGet(unsigned long ulPin)
-{
-
-  unsigned long ulPad;
-
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE) ;
-
-  //
-  // return the mode.
-  //
-  return (HWREG(ulPad) & PAD_MODE_MASK);
-
-}
-
-//*****************************************************************************
-//
-//! Sets the direction of the specified pin(s).
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinIO is the pin direction and/or mode.
-//!
-//! This function configures the specified pin(s) as either input only or
-//! output only or it configures the pin to be under hardware control.
-//!
-//! The parameter \e ulPinIO is an enumerated data type that can be one of
-//! the following values:
-//!
-//! - \b PIN_DIR_MODE_IN
-//! - \b PIN_DIR_MODE_OUT
-//! - \b PIN_DIR_MODE_HW
-//!
-//! where \b PIN_DIR_MODE_IN specifies that the pin is programmed as a
-//! input only, \b PIN_DIR_MODE_OUT specifies that the pin is
-//! programmed output only, and \b PIN_DIR_MODE_HW specifies that the pin is
-//! placed under hardware control.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinDirModeSet(unsigned long ulPin, unsigned long ulPinIO)
-{
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Set the direction
-  //
-  HWREG(ulPad) = ((HWREG(ulPad) & ~0xC00) | ulPinIO);
-}
-
-//*****************************************************************************
-//
-//! Gets the direction of a pin.
-//!
-//! \param ulPin is one of the valid pin.
-//!
-//! This function gets the direction and control mode for a specified pin on
-//! the selected GPIO port.  The pin can be configured as either an input only
-//! or output only, or it can be under hardware control.  The type of control
-//! and direction are returned as an enumerated data type.
-//!
-//! \return Returns one of the enumerated data types described for
-//! GPIODirModeSet().
-//
-//*****************************************************************************
-unsigned long PinDirModeGet(unsigned long ulPin)
-{
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-  //
-  // Return the direction
-  //
-  return ((HWREG(ulPad) & 0xC00));
-}
-
-//*****************************************************************************
-//
-//! Gets Pin output drive strength and Type
-//!
-//! \param ulPin is one of the valid pin
-//! \param pulPinStrength is pointer to storage for output drive strength
-//! \param pulPinType is pinter to storage for pin type
-//!
-//! This function gets the pin type and output drive strength for the pin
-//! specified by \e ulPin parameter. Parameters \e pulPinStrength and
-//! \e pulPinType corresponds to the values used in PinConfigSet().
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinConfigGet(unsigned long ulPin,unsigned long  *pulPinStrength,
-	       					unsigned long *pulPinType)
-{
-
-  unsigned long ulPad;
-
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-
-  //
-  // Calculate the register address
-  //
-  ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-
-  //
-  // Get the type
-  //
-  *pulPinType = (HWREG(ulPad) & PAD_TYPE_MASK);
-
-  //
-  // Get the output drive strength
-  //
-  *pulPinStrength = (HWREG(ulPad) & PAD_STRENGTH_MASK);
-
-}
-
-//*****************************************************************************
-//
-//! Configure Pin output drive strength and Type
-//!
-//! \param ulPin is one of the valid pin
-//! \param ulPinStrength is logical OR of valid output drive strengths.
-//! \param ulPinType is one of the valid pin type.
-//!
-//!  This function sets the pin type and strength for the pin specified by
-//! \e ulPin parameter.
-//!
-//! The parameter \e ulPinStrength should be one of the following
-//! - \b PIN_STRENGTH_2MA
-//! - \b PIN_STRENGTH_4MA
-//! - \b PIN_STRENGTH_6MA
-//!
-//!
-//! The parameter \e ulPinType should be one of the following
-//! For standard type
-//!
-//! - \b PIN_TYPE_STD
-//! - \b PIN_TYPE_STD_PU
-//! - \b PIN_TYPE_STD_PD
-//!
-//! And for Open drain type
-//!
-//! - \b PIN_TYPE_OD
-//! - \b PIN_TYPE_OD_PU
-//! - \b PIN_TYPE_OD_PD
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinConfigSet(unsigned long ulPin,unsigned long  ulPinStrength,
-						unsigned long ulPinType)
-{
-
-  unsigned long ulPad;
-
-  //
-  // Get the corresponding Pad
-  //
-  ulPad = g_ulPinToPadMap[ulPin & 0x3F];
-
-  //
-  // Write the register
-  //
-  if(ulPinType == PIN_TYPE_ANALOG)
-  {
-    //
-    // Isolate the input
-    //
-    HWREG(0x4402E144) |= ((0x80 << ulPad) & (0x1E << 8));
-
-    //
-    // Calculate the register address
-    //
-    ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-    //
-    // Isolate the output
-    //
-    HWREG(ulPad) = 0xC00;
-
-  }
-  else
-  {
-    //
-    // Enable the input
-    //
-    HWREG(0x4402E144) &= ~((0x80 << ulPad) & (0x1E << 8));
-
-    //
-    // Calculate the register address
-    //
-    ulPad = ((ulPad << 2) + PAD_CONFIG_BASE);
-
-    //
-    // Write the configuration
-    //
-    HWREG(ulPad) = ((HWREG(ulPad) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) |
-		  		(ulPinStrength | ulPinType ));
-  }
-
-
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by UART peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The UART pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin(s); other configurations may work as well depending upon the
-//! board setup (for example, using the on-chip pull-ups).
-//!
-//!
-//! \note This function cannot be used to turn any pin into a UART pin; it
-//! only sets the pin mode and configures it for proper UART operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeUART(unsigned long ulPin,unsigned long ulPinMode)
-{
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_STD);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by I2C peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The I2C pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! the pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a I2C pin; it
-//! only sets the pin mode and configures it for proper I2C operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeI2C(unsigned long ulPin,unsigned long ulPinMode)
-{
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for open-drain operation with a weak pull-up.
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_OD_PU);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by SPI peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The SPI pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a SPI pin; it
-//! only sets the pin mode and configures it for proper SPI operation.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeSPI(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by I2S peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The I2S pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a I2S pin; it
-//! only sets the pin mode and configures it for proper I2S operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeI2S(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by Timer peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The timer PWM pins must be properly configured for the Timer peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin; other configurations may work as well depending upon the
-//! board setup (for example, using the on-chip pull-ups).
-//!
-//!
-//! \note This function cannot be used to turn any pin into a timer PWM pin; it
-//! only sets the pin mode and configures it for proper timer PWM operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeTimer(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by Camera peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The Camera pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a Camera pin; it
-//! only sets the pin mode and configures it for proper Camera operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeCamera(unsigned long ulPin,unsigned long ulPinMode)
-{
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin,ulPinMode);
-
-    //
-    // Set the pin for standard operation
-    //
-    PinConfigSet(ulPin,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD);
-
-}
-
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by GPIO peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//! \param bOpenDrain is one to decide either OpenDrain or STD
-//!
-//! The GPIO pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeGPIO(unsigned long ulPin,unsigned long ulPinMode,tBoolean bOpenDrain)
-{
-
-    //
-    // Set the pin for standard push-pull operation.
-    //
-    if(bOpenDrain)
-    {
-            PinConfigSet(ulPin, PIN_STRENGTH_2MA, PIN_TYPE_OD);
-    }
-    else
-    {
-            PinConfigSet(ulPin, PIN_STRENGTH_2MA, PIN_TYPE_STD);
-    }
-
-    //
-    // Set the pin to specified mode
-    //
-    PinModeSet(ulPin, ulPinMode);
-
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by ADC
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The ADC pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a ADC pin; it
-//! only sets the pin mode and configures it for proper ADC operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeADC(unsigned long ulPin,unsigned long ulPinMode)
-{
-  //
-  // Configure the Pin
-  //
-  PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_ANALOG);
-}
-
-//*****************************************************************************
-//
-//! Sets the pin mode and configures the pin for use by SD Host peripheral
-//!
-//! \param ulPin is one of the valid pin.
-//! \param ulPinMode is one of the valid pin mode.
-//!
-//! The MMC pins must be properly configured for the peripheral to
-//! function correctly.  This function provides a typical configuration for
-//! those pin.
-//!
-//!
-//! \note This function cannot be used to turn any pin into a SD Host pin; it
-//! only sets the pin mode and configures it for proper SD Host operation.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PinTypeSDHost(unsigned long ulPin,unsigned long ulPinMode)
-{
-  //
-  // Set pin mode
-  //
-  PinModeSet(ulPin,ulPinMode);
-
-  //
-  // Configure the Pin
-  //
-  PinConfigSet(ulPin,PIN_STRENGTH_2MA,PIN_TYPE_STD);
-
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/pin.h b/ports/cc3200/hal/pin.h
deleted file mode 100644
index 784e9f46354b0..0000000000000
--- a/ports/cc3200/hal/pin.h
+++ /dev/null
@@ -1,183 +0,0 @@
-//*****************************************************************************
-//
-//  pin.h
-//
-//  Defines and Macros for the pin mux module
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __PIN_H__
-#define __PIN_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-// Macros Defining Pins
-//*****************************************************************************
-
-#define PIN_01 	 0x00000000
-#define PIN_02 	 0x00000001
-#define PIN_03   0x00000002
-#define PIN_04 	 0x00000003
-#define PIN_05   0x00000004
-#define PIN_06   0x00000005
-#define PIN_07   0x00000006
-#define PIN_08   0x00000007
-#define PIN_11   0x0000000A
-#define PIN_12   0x0000000B
-#define PIN_13   0x0000000C
-#define PIN_14   0x0000000D
-#define PIN_15   0x0000000E
-#define PIN_16   0x0000000F
-#define PIN_17   0x00000010
-#define PIN_18   0x00000011
-#define PIN_19 	 0x00000012
-#define PIN_20   0x00000013
-#define PIN_21   0x00000014
-#define PIN_45   0x0000002C
-#define PIN_46   0x0000002D
-#define PIN_47   0x0000002E
-#define PIN_48   0x0000002F
-#define PIN_49   0x00000030
-#define PIN_50   0x00000031
-#define PIN_52   0x00000033
-#define PIN_53   0x00000034
-#define PIN_55   0x00000036
-#define PIN_56   0x00000037
-#define PIN_57   0x00000038
-#define PIN_58   0x00000039
-#define PIN_59   0x0000003A
-#define PIN_60   0x0000003B
-#define PIN_61	 0x0000003C
-#define PIN_62	 0x0000003D
-#define PIN_63	 0x0000003E
-#define PIN_64	 0x0000003F
-
-
-
-//*****************************************************************************
-// Macros that can be used with PinConfigSet(), PinTypeGet(), PinStrengthGet()
-//*****************************************************************************
-
-#define PIN_MODE_0	 0x00000000
-#define PIN_MODE_1	 0x00000001
-#define PIN_MODE_2	 0x00000002
-#define PIN_MODE_3	 0x00000003
-#define PIN_MODE_4	 0x00000004
-#define PIN_MODE_5	 0x00000005
-#define PIN_MODE_6	 0x00000006
-#define PIN_MODE_7	 0x00000007
-#define PIN_MODE_8	 0x00000008
-#define PIN_MODE_9	 0x00000009
-#define PIN_MODE_10	 0x0000000A
-#define PIN_MODE_11	 0x0000000B
-#define PIN_MODE_12	 0x0000000C
-#define PIN_MODE_13	 0x0000000D
-#define PIN_MODE_14	 0x0000000E
-#define PIN_MODE_15	 0x0000000F
-// Note : PIN_MODE_255 is a dummy define for pinmux utility code generation
-// PIN_MODE_255 should never be used in any user code.  
-#define PIN_MODE_255 0x000000FF  
-
-//*****************************************************************************
-// Macros that can be used with PinDirModeSet() and returned from
-// PinDirModeGet().
-//*****************************************************************************
-#define PIN_DIR_MODE_IN  0x00000C00 // Pin is input
-#define PIN_DIR_MODE_OUT 0x00000800 // Pin is output
-#define PIN_DIR_MODE_HW  0x00000000 // Pin is peripheral function
-
-//*****************************************************************************
-// Macros that can be used with PinConfigSet()
-//*****************************************************************************
-#define PIN_STRENGTH_2MA  0x00000020
-#define PIN_STRENGTH_4MA  0x00000040
-#define PIN_STRENGTH_6MA  0x00000060
-
-#define PIN_TYPE_STD      0x00000000
-#define PIN_TYPE_STD_PU   0x00000100
-#define PIN_TYPE_STD_PD   0x00000200
-
-#define PIN_TYPE_OD       0x00000010
-#define PIN_TYPE_OD_PU    0x00000110
-#define PIN_TYPE_OD_PD    0x00000210
-#define PIN_TYPE_ANALOG   0x10000000
-
-//*****************************************************************************
-// Macros for mode and type
-//*****************************************************************************
-#define PAD_MODE_MASK       0x0000000F
-#define PAD_STRENGTH_MASK   0x000000E0
-#define PAD_TYPE_MASK       0x00000310
-#define PAD_CONFIG_BASE     ((OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_0))
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void PinModeSet(unsigned long ulPin, unsigned long ulPinMode);
-extern void PinDirModeSet(unsigned long ulPin, unsigned long ulPinIO);
-extern unsigned long PinDirModeGet(unsigned long ulPin);
-extern unsigned long PinModeGet(unsigned long ulPin);
-extern void PinConfigGet(unsigned long ulPin,unsigned long  *pulPinStrength,
-	       					unsigned long *pulPinType);
-extern void PinConfigSet(unsigned long ulPin,unsigned long  ulPinStrength,
-						unsigned long ulPinType);
-extern void PinTypeUART(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeI2C(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeSPI(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeI2S(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeTimer(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeCamera(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeGPIO(unsigned long ulPin,unsigned long ulPinMode,
-                        tBoolean bOpenDrain);
-extern void PinTypeADC(unsigned long ulPin,unsigned long ulPinMode);
-extern void PinTypeSDHost(unsigned long ulPin,unsigned long ulPinMode);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__PIN_H__
diff --git a/ports/cc3200/hal/prcm.c b/ports/cc3200/hal/prcm.c
deleted file mode 100644
index 4b66c0ff1e025..0000000000000
--- a/ports/cc3200/hal/prcm.c
+++ /dev/null
@@ -1,1953 +0,0 @@
-//*****************************************************************************
-//
-//  prcm.c
-//
-//  Driver for the Power, Reset and Clock Module (PRCM)
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup PRCM_Power_Reset_Clock_Module_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_apps_rcm.h"
-#include "inc/hw_gprcm.h"
-#include "inc/hw_hib1p2.h"
-#include "inc/hw_hib3p3.h"
-#include "prcm.h"
-#include "interrupt.h"
-#include "cpu.h"
-#include "utils.h"
-#include "rom_map.h"
-
-
-//*****************************************************************************
-// Macro definition
-//*****************************************************************************
-#define PRCM_SOFT_RESET           0x00000001
-#define PRCM_ENABLE_STATUS        0x00000002
-#define SYS_CLK                   80000000
-#define XTAL_CLK                  40000000
-
-
-//*****************************************************************************
-//    CC3200 does not have a true RTC capability. However, API(s) in this file
-//    provide an effective mechanism to support RTC feature in the device.
-//
-//    The implementation to support RTC has been kept very simple. A set of
-//    HIB Memory Registers in conjunction with Slow Clock Counter are used
-//    to render RTC information to users. Core principle of design involves
-//    two steps (a) establish an association between user provided wall-clock
-//    and slow clock counter. (b) store reference value of this associattion
-//    in HIB Registers. This reference value and SCC value are then combined
-//    to create real-world calendar time.
-//
-//    Across HIB cycles, value stored in HIB Registers is retained and slow
-//    clock counter continues to tick, thereby, this arragement is relevant
-//    and valid as long as device has a (tickle) battery power.
-//
-//    Further, provision also has been made to set an alarm. When it RTC value
-//    matches that of set for alarm, an interrupt is generated.
-//
-//    HIB MEM REG0 and REG1 are reserved for TI.
-//
-//    If RTC feature is not used, then HIB REG2 & REG3 are available to user.
-//
-//    Lower half of REG0 is used for TI HW ECO.
-//*****************************************************************************
-#define RTC_U64MSEC_MK(u32Secs, u16Msec) (((unsigned long long)u32Secs << 10)|\
-                                          (u16Msec & 0x3FF))
-
-#define RTC_SECS_IN_U64MSEC(u64Msec)     ((unsigned long)(u64Msec  >>   10))
-#define RTC_MSEC_IN_U64MSEC(u64Msec)     ((unsigned short)(u64Msec & 0x3FF))
-
-#define RTC_MSEC_U32_REG_ADDR            (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG2)
-#define RTC_SECS_U32_REG_ADDR            (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG3)
-
-//*****************************************************************************
-// Register Access and Updates
-//
-// Tick of SCC has a resolution of 32768Hz, meaning 1 sec is equal to 32768
-// clock ticks. Ideal way of getting time in millisecond will involve floating
-// point arithmetic (division by 32.768). To avoid this, we simply divide it by
-// 32, which will give a range from 0 -1023(instead of 0-999). To use this
-// output correctly we have to take care of this inaccuracy externally.
-// following wrapper can be used to convert the value from cycles to
-// millisecond:
-//
-// CYCLES_U16MS(cycles) ((cycles * 1000) / 1024),
-//
-// Similarly, before setting the value, it must be first converted (from ms to
-// cycles).
-//
-// U16MS_CYCLES(msec)   ((msec * 1024) / 1000)
-//
-// Note: There is a precision loss of 1 ms with the above scheme.
-//
-//
-#define SCC_U64MSEC_GET()                (RTCFastDomainCounterGet() >> 5)
-#define SCC_U64MSEC_MATCH_SET(u64Msec)   (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5))
-#define SCC_U64MSEC_MATCH_GET()          (MAP_PRCMSlowClkCtrMatchGet() >> 5)
-
-//*****************************************************************************
-//
-// Bit:  31 is used to indicate use of RTC. If set as '1', RTC feature is used.
-// Bit:  30 is used to indicate that a safe boot should be performed.
-// bit:  29 is used to indicate that the last reset was caused by the WDT.
-// bit:  28 is used to indicate that the board is booting for the first time after being programmed in factory.
-// Bits: 27 and 26 are unused.
-// Bits: 25 to 16 are used to save millisecond part of RTC reference.
-// Bits: 15 to 0 are being used for HW Changes / ECO.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-// Set RTC USE Bit
-//*****************************************************************************
-static void RTCUseSet(void)
-{
-  unsigned int uiRegValue;
-
-  uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << 31);
-
-  PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-// Clear RTC USE Bit
-//*****************************************************************************
-static void RTCUseClear(void)
-{
-  unsigned int uiRegValue;
-
-  uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << 31));
-
-  PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-// Checks if RTC-USE bit is set
-//*****************************************************************************
-static tBoolean IsRTCUsed(void)
-{
-  return (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << 31)) ? true : false;
-}
-
-//*****************************************************************************
-// Read 16-bit mSecs
-//*****************************************************************************
-static unsigned short RTCU32MSecRegRead(void)
-{
-  return ((MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) >> 16) & 0x03FF);
-}
-
-//*****************************************************************************
-// Write 16-bit mSecs
-//*****************************************************************************
-static void RTCU32MSecRegWrite(unsigned int u32Msec)
-{
-   unsigned int uiRegValue;
-
-   // read the whole register and clear the msec bits
-   uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(0x03FF << 16));
-
-   // write the msec bits only
-   MAP_PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue | ((u32Msec & 0x03FF) << 16));
-}
-
-//*****************************************************************************
-// Read 32-bit Secs
-//*****************************************************************************
-static unsigned long RTCU32SecRegRead(void)
-{
-  return (MAP_PRCMHIBRegRead(RTC_SECS_U32_REG_ADDR));
-}
-
-//*****************************************************************************
-// Write 32-bit Secs
-//*****************************************************************************
-static void RTCU32SecRegWrite(unsigned long u32Msec)
-{
-  MAP_PRCMHIBRegWrite(RTC_SECS_U32_REG_ADDR, u32Msec);
-}
-
-//*****************************************************************************
-// Fast function to get the most accurate RTC counter value
-//*****************************************************************************
-static unsigned long long RTCFastDomainCounterGet (void) {
-
-    #define BRK_IF_RTC_CTRS_ALIGN(c2, c1)       if (c2 - c1 <= 1) {     \
-                                                    itr++;              \
-                                                    break;              \
-                                                }
-
-    unsigned long long rtc_count1, rtc_count2, rtc_count3;
-    unsigned int itr;
-
-    do {
-        rtc_count1 = PRCMSlowClkCtrFastGet();
-        rtc_count2 = PRCMSlowClkCtrFastGet();
-        rtc_count3 = PRCMSlowClkCtrFastGet();
-        itr = 0;
-
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count2, rtc_count1);
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count3, rtc_count2);
-        BRK_IF_RTC_CTRS_ALIGN(rtc_count3, rtc_count1);
-
-        // Consistent values in two consecutive reads implies a correct
-        // value of the counter. Do note, the counter does not give the
-        // calendar time but a hardware that ticks upwards continuously.
-        // The 48-bit counter operates at 32,768 HZ.
-
-    } while (true);
-
-    return (1 == itr) ? rtc_count2 : rtc_count3;
-}
-
-//*****************************************************************************
-// Macros
-//*****************************************************************************
-#define IS_RTC_USED()                   IsRTCUsed()
-#define RTC_USE_SET()                   RTCUseSet()
-#define RTC_USE_CLR()                   RTCUseClear()
-
-#define RTC_U32MSEC_REG_RD()            RTCU32MSecRegRead()
-#define RTC_U32MSEC_REG_WR(u32Msec)     RTCU32MSecRegWrite(u32Msec)
-
-#define RTC_U32SECS_REG_RD()            RTCU32SecRegRead()
-#define RTC_U32SECS_REG_WR(u32Secs)     RTCU32SecRegWrite(u32Secs)
-
-#define SELECT_SCC_U42BITS(u64Msec)     (u64Msec & 0x3ffffffffff)
-
-//*****************************************************************************
-// Global Peripheral clock and rest Registers
-//*****************************************************************************
-static const PRCM_PeriphRegs_t PRCM_PeriphRegsList[] =
-{
-
-	{APPS_RCM_O_CAMERA_CLK_GATING,   APPS_RCM_O_CAMERA_SOFT_RESET   },
-	{APPS_RCM_O_MCASP_CLK_GATING,    APPS_RCM_O_MCASP_SOFT_RESET    },
-	{APPS_RCM_O_MMCHS_CLK_GATING,    APPS_RCM_O_MMCHS_SOFT_RESET    },
-	{APPS_RCM_O_MCSPI_A1_CLK_GATING, APPS_RCM_O_MCSPI_A1_SOFT_RESET },
-	{APPS_RCM_O_MCSPI_A2_CLK_GATING, APPS_RCM_O_MCSPI_A2_SOFT_RESET },
-	{APPS_RCM_O_UDMA_A_CLK_GATING,   APPS_RCM_O_UDMA_A_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_A_CLK_GATING,   APPS_RCM_O_GPIO_A_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_B_CLK_GATING,   APPS_RCM_O_GPIO_B_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_C_CLK_GATING,   APPS_RCM_O_GPIO_C_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_D_CLK_GATING,   APPS_RCM_O_GPIO_D_SOFT_RESET   },
-	{APPS_RCM_O_GPIO_E_CLK_GATING,   APPS_RCM_O_GPIO_E_SOFT_RESET   },
-	{APPS_RCM_O_WDOG_A_CLK_GATING,   APPS_RCM_O_WDOG_A_SOFT_RESET   },
-	{APPS_RCM_O_UART_A0_CLK_GATING,  APPS_RCM_O_UART_A0_SOFT_RESET  },
-	{APPS_RCM_O_UART_A1_CLK_GATING,  APPS_RCM_O_UART_A1_SOFT_RESET  },
-	{APPS_RCM_O_GPT_A0_CLK_GATING ,  APPS_RCM_O_GPT_A0_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A1_CLK_GATING,   APPS_RCM_O_GPT_A1_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A2_CLK_GATING,   APPS_RCM_O_GPT_A2_SOFT_RESET   },
-	{APPS_RCM_O_GPT_A3_CLK_GATING,   APPS_RCM_O_GPT_A3_SOFT_RESET   },
-	{APPS_RCM_O_CRYPTO_CLK_GATING,   APPS_RCM_O_CRYPTO_SOFT_RESET   },
-	{APPS_RCM_O_MCSPI_S0_CLK_GATING, APPS_RCM_O_MCSPI_S0_SOFT_RESET },
-	{APPS_RCM_O_I2C_CLK_GATING,      APPS_RCM_O_I2C_SOFT_RESET      }
-
-};
-
-//*****************************************************************************
-//
-//! Set a special bit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSetSpecialBit(unsigned char bit)
-{
-    unsigned int uiRegValue;
-
-    uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << bit);
-
-    PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-//
-//! Clear a special bit
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMClearSpecialBit(unsigned char bit)
-{
-    unsigned int uiRegValue;
-
-    uiRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << bit));
-
-    PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, uiRegValue);
-}
-
-//*****************************************************************************
-//
-//! Read a special bit
-//!
-//! \return Value of the bit
-//
-//*****************************************************************************
-tBoolean PRCMGetSpecialBit(unsigned char bit)
-{
-    tBoolean value = (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << bit)) ? true : false;
-    // special bits must be cleared immediatelly after reading
-    PRCMClearSpecialBit(bit);
-    return value;
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a SOC
-//!
-//! This function performs a software reset of a SOC
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSOCReset(void)
-{
-  //
-  // Reset MCU
-  //
-  HWREG(GPRCM_BASE+ GPRCM_O_MCU_GLOBAL_SOFT_RESET) |= 0x1;
-
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a MCU and associated peripherals
-//!
-//! \param bIncludeSubsystem is \b true to reset associated peripherals.
-//!
-//! This function performs a software reset of a MCU and associated peripherals.
-//! To reset the associated peripheral, the parameter \e bIncludeSubsystem
-//! should be set to \b true.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMMCUReset(tBoolean bIncludeSubsystem)
-{
-  if(bIncludeSubsystem)
-  {
-    //
-    // Reset Apps processor and associated peripheral
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SOFT_RESET) = 0x2;
-  }
-  else
-  {
-    //
-    // Reset Apps processor only
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SOFT_RESET) = 0x1;
-  }
-}
-
-//*****************************************************************************
-//
-//! Gets the reason for a reset.
-//!
-//! This function returns the reason(s) for a reset. The reset reason are:-
-//! -\b PRCM_POWER_ON  - Device is powering up.
-//! -\b PRCM_LPDS_EXIT - Device is exiting from LPDS.
-//! -\b PRCM_CORE_RESET - Device is exiting soft core only reset
-//! -\b PRCM_MCU_RESET - Device is exiting soft subsystem reset.
-//! -\b PRCM_WDT_RESET - Device was reset by watchdog.
-//! -\b PRCM_SOC_RESET - Device is exting SOC reset.
-//! -\b PRCM_HIB_EXIT - Device is exiting hibernate.
-//!
-//! \return Returns one of the cause defined above.
-//
-//*****************************************************************************
-unsigned long PRCMSysResetCauseGet(void)
-{
-  unsigned long ulWakeupStatus;
-
-  //
-  // Read the Reset status
-  //
-  ulWakeupStatus = (HWREG(GPRCM_BASE+ GPRCM_O_APPS_RESET_CAUSE) & 0xFF);
-
-  //
-  // For hibernate do additional chaeck.
-  //
-  if(ulWakeupStatus == PRCM_POWER_ON)
-  {
-    if(MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS) & 0x1)
-    {
-      ulWakeupStatus = PRCM_HIB_EXIT;
-    }
-  }
-
-  //
-  // Return status.
-  //
-  return ulWakeupStatus;
-}
-
-//*****************************************************************************
-//
-//! Enable clock(s) to peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals
-//! \param ulClkFlags are bitmask of clock(s) to be enabled.
-//!
-//! This function enables the clock for the specified peripheral. Peripherals
-//! are by default clock gated (disabled) and generates a bus fault if
-//! accessed.
-//!
-//! The parameter \e ulClkFlags can be logical OR of the following:
-//! -\b PRCM_RUN_MODE_CLK - Ungates clock to the peripheral
-//! -\b PRCM_SLP_MODE_CLK - Keeps the clocks ungated in sleep.
-//! -\b PRCM_DSLP_MODE_CLK - Keeps the clock ungated in deepsleep.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralClkEnable(unsigned long ulPeripheral, unsigned long ulClkFlags)
-{
-  //
-  // Enable the specified peripheral clocks, Nothing to be done for PRCM_ADC
-  // as it is a dummy define for pinmux utility code generation
-  //
-  if(ulPeripheral != PRCM_ADC)
-  {
-    HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) |= ulClkFlags;
-  }
-  //
-  // Set the default clock for camera
-  //
-  if(ulPeripheral == PRCM_CAMERA)
-  {
-    HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) = 0x0404;
-  }
-}
-
-//*****************************************************************************
-//
-//! Disables clock(s) to peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals
-//! \param ulClkFlags are bitmask of clock(s) to be enabled.
-//!
-//! This function disable the clock for the specified peripheral. Peripherals
-//! are by default clock gated (disabled) and generated a bus fault if
-//! accessed.
-//!
-//! The parameter \e ulClkFlags can be logical OR bit fields as defined in
-//! PRCMEnablePeripheral().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralClkDisable(unsigned long ulPeripheral, unsigned long ulClkFlags)
-{
-  //
-  // Disable the specified peripheral clocks
-  //
-  HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulClkReg) &= ~ulClkFlags;
-}
-
-//*****************************************************************************
-//
-//! Gets the input clock for the specified peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripherals.
-//!
-//! This function gets the input clock for the specified peripheral.
-//!
-//! The parameter \e ulPeripheral has the same definition as that in
-//! PRCMPeripheralClkEnable();
-//!
-//! \return Returns input clock frequency for specified peripheral.
-//
-//*****************************************************************************
-unsigned long PRCMPeripheralClockGet(unsigned long ulPeripheral)
-{
-  unsigned long ulClockFreq;
-  unsigned long ulHiPulseDiv;
-  unsigned long ulLoPulseDiv;
-
-  //
-  // Get the clock based on specified peripheral.
-  //
-  if(((ulPeripheral == PRCM_SSPI) | (ulPeripheral == PRCM_LSPI)
-            | (ulPeripheral == PRCM_GSPI)))
-  {
-    return XTAL_CLK;
-  }
-  else if(ulPeripheral == PRCM_CAMERA)
-  {
-    ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN) >> 8) & 0x07);
-    ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_CAMERA_CLK_GEN)& 0xFF);
-  }
-  else if(ulPeripheral == PRCM_SDHOST)
-  {
-    ulHiPulseDiv = ((HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN) >> 8) & 0x07);
-    ulLoPulseDiv = (HWREG(ARCM_BASE + APPS_RCM_O_MMCHS_CLK_GEN)& 0xFF);
-  }
-  else
-  {
-    return SYS_CLK;
-  }
-
-  //
-  // Compute the clock freq. from the divider value
-  //
-  ulClockFreq = (240000000/((ulHiPulseDiv + 1) + (ulLoPulseDiv + 1)));
-
-  //
-  // Return the clock rate.
-  //
-  return ulClockFreq;
-}
-
-//*****************************************************************************
-//
-//! Performs a software reset of a peripheral.
-//!
-//! \param ulPeripheral is one of the valid peripheral.
-//!
-//! This assert or deassert reset to the specified peripheral based of the
-//! \e bAssert parameter.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMPeripheralReset(unsigned long ulPeripheral)
-{
-  volatile unsigned long ulDelay;
-
-  if( ulPeripheral != PRCM_DTHE)
-  {
-    //
-    // Assert the reset
-    //
-    HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg)
-                                                         |= PRCM_SOFT_RESET;
-    //
-    // Delay for a little bit.
-    //
-    for(ulDelay = 0; ulDelay < 16; ulDelay++)
-    {
-    }
-
-    //
-    // Deassert the reset
-    //
-    HWREG(ARCM_BASE+PRCM_PeriphRegsList[ulPeripheral].ulRstReg)
-                                                          &= ~PRCM_SOFT_RESET;
-  }
-}
-
-//*****************************************************************************
-//
-//! Determines if a peripheral is ready.
-//!
-//! \param ulPeripheral is one of the valid modules
-//!
-//! This function determines if a particular peripheral is ready to be
-//! accessed. The peripheral may be in a non-ready state if it is not enabled,
-//! is being held in reset, or is in the process of becoming ready after being
-//! enabled or taken out of reset.
-//!
-//! \return Returns \b true if the  peripheral is ready, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean PRCMPeripheralStatusGet(unsigned long ulPeripheral)
-{
-  unsigned long ReadyBit;
-
-  //
-  // Read the ready bit status
-  //
-  ReadyBit = HWREG(ARCM_BASE + PRCM_PeriphRegsList[ulPeripheral].ulRstReg);
-  ReadyBit = ReadyBit & PRCM_ENABLE_STATUS;
-
-  if (ReadyBit)
-  {
-    //
-    // Module is ready
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // Module is not ready
-    //
-    return(false);
-  }
-}
-
-//*****************************************************************************
-//
-//! Configure I2S fracactional divider
-//!
-//! \param ulI2CClkFreq is the required input clock for McAPS module
-//!
-//! This function configures I2S fractional divider. By default this
-//! divider is set to output 24 Mhz clock to I2S module.
-//!
-//! The minimum frequency that can be obtained by configuring this divider is
-//!
-//! (240000KHz/1023.99) =  234.377 KHz
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq)
-{
- unsigned long long ullDiv;
-  unsigned short usInteger;
-  unsigned short usFrac;
-
-  ullDiv = (((unsigned long long)240000000 * 65536)/ulI2CClkFreq);
-
-  usInteger = (ullDiv/65536);
-  usFrac    = (ullDiv%65536);
-
-  HWREG(ARCM_BASE + APPS_RCM_O_MCASP_FRAC_CLK_CONFIG0) =
-    ((usInteger & 0x3FF) << 16 | usFrac);
-}
-
-//*****************************************************************************
-//
-//! Sets the LPDS exit PC and SP restore vlaues.
-//!
-//! \param ulStackPtr is the SP restore value.
-//! \param ulProgCntr is the PC restore value
-//!
-//! This function sets the LPDS exit PC and SP restore vlaues. Setting
-//! \e ulProgCntr to a non-zero value, forces bootloader to jump to that
-//! address with Stack Pointer initialized to \e ulStackPtr on LPDS exit,
-//! otherwise the application's vector table entries are used.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr)
-{
-  //
-  // Set The SP Value
-  //
-  HWREG(0x4402E18C) = ulStackPtr;
-
-  //
-  // Set The PC Value
-  //
-  HWREG(0x4402E190) = ulProgCntr;
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Low Power Deel Sleep (LPDS) power mode.
-//!
-//! This function puts the system into Low Power Deel Sleep (LPDS) power mode.
-//! A call to this function never returns and the execution starts from Reset.
-//! \sa PRCMLPDSRestoreInfoSet().
-//!
-//! \return None.
-//!
-//! \note The Test Power Domain is shutdown whenever the system
-//!  enters LPDS (by default). In order to avoid this and allow for
-//!  connecting back the debugger after waking up from LPDS,
-//!  the macro KEEP_TESTPD_ALIVE has to be defined while building the library.
-//!  This is recommended for development purposes only as it adds to
-//!  the current consumption of the system.
-//!
-//
-//*****************************************************************************
-void PRCMLPDSEnter(void)
-{
-#ifndef DEBUG
-  //
-  // Disable TestPD
-  //
-  HWREG(0x4402E168) |= (1<<9);
-#endif
-
-  //
-  // Set bandgap duty cycle to 1
-  //
-  HWREG(HIB1P2_BASE + HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG) = 0x1;
-
-  //
-  // Request LPDS
-  //
-  HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ) = APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ;
-
-  __asm("    nop\n"
-        "    nop\n"
-        "    nop\n"
-        "    nop\n");
-}
-
-//*****************************************************************************
-//
-//! Enable the individual LPDS wakeup source(s).
-//!
-//! \param ulLpdsWakeupSrc is logical OR of wakeup sources.
-//!
-//! This function enable the individual LPDS wakeup source(s) and following
-//! three wakeup sources (\e ulLpdsWakeupSrc ) are supported by the device.
-//! -\b PRCM_LPDS_HOST_IRQ
-//! -\b PRCM_LPDS_GPIO
-//! -\b PRCM_LPDS_TIMER
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc)
-{
-  unsigned long ulRegVal;
-
-  //
-  // Read the current wakup sources
-  //
-  ulRegVal = HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG);
-
-  //
-  // Enable individual wakeup source
-  //
-  ulRegVal = ((ulRegVal | ulLpdsWakeupSrc) & 0x91);
-
-  //
-  // Set the configuration in the register
-  //
-  HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG) = ulRegVal;
-}
-
-//*****************************************************************************
-//
-//! Disable the individual LPDS wakeup source(s).
-//!
-//! \param ulLpdsWakeupSrc is logical OR of wakeup sources.
-//!
-//! This function enable the individual LPDS wakeup source(s) and following
-//! three wake up sources (\e ulLpdsWakeupSrc ) are supported by the device.
-//! -\b PRCM_LPDS_HOST_IRQ
-//! -\b PRCM_LPDS_GPIO
-//! -\b PRCM_LPDS_TIMER
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc)
-{
-  HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG) &= ~ulLpdsWakeupSrc;
-}
-
-
-//*****************************************************************************
-//
-//! Get LPDS wakeup cause
-//!
-//! This function gets LPDS wakeup caouse
-//!
-//! \return Returns values enumerated as described in
-//! PRCMLPDSWakeupSourceEnable().
-//
-//*****************************************************************************
-unsigned long PRCMLPDSWakeupCauseGet(void)
-{
-  return (HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_SRC));
-}
-
-//*****************************************************************************
-//
-//! Sets LPDS wakeup Timer
-//!
-//! \param ulTicks is number of 32.768 KHz clocks
-//!
-//! This function sets internal LPDS wakeup timer running at 32.768 KHz. The
-//! timer is only configured if the parameter \e ulTicks is in valid range i.e.
-//! from 21 to 2^32.
-//!
-//! \return Returns \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-void PRCMLPDSIntervalSet(unsigned long ulTicks)
-{
-  //
-  // Check sleep is atleast for 21 cycles
-  // If not set the sleep time to 21 cycles
-  //
-  if( ulTicks < 21)
-  {
-      ulTicks = 21;
-  }
-
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_LPDS_WAKETIME_WAKE_CFG) = ulTicks;
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_LPDS_WAKETIME_OPP_CFG) = ulTicks-20;
-}
-
-//*****************************************************************************
-//
-//! Selects the GPIO for LPDS wakeup
-//!
-//! \param ulGPIOPin is one of the valid GPIO fro LPDS wakeup.
-//! \param ulType is the wakeup trigger type.
-//!
-//! This function setects the wakeup GPIO for LPDS wakeup and can be
-//! used to select one out of 7 pre-defined GPIO(s).
-//!
-//! The parameter \e ulLpdsGPIOSel should be one of the following:-
-//! -\b PRCM_LPDS_GPIO2
-//! -\b PRCM_LPDS_GPIO4
-//! -\b PRCM_LPDS_GPIO13
-//! -\b PRCM_LPDS_GPIO17
-//! -\b PRCM_LPDS_GPIO11
-//! -\b PRCM_LPDS_GPIO24
-//! -\b PRCM_LPDS_GPIO26
-//!
-//! The parameter \e ulType sets the trigger type and can be one of the
-//! following:
-//! - \b PRCM_LPDS_LOW_LEVEL
-//! - \b PRCM_LPDS_HIGH_LEVEL
-//! - \b PRCM_LPDS_FALL_EDGE
-//! - \b PRCM_LPDS_RISE_EDGE
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin, unsigned long ulType)
-{
-  //
-  // Set the wakeup GPIO
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL, ulGPIOPin);
-
-  //
-  // Set the trigger type.
-  //
-  HWREG(GPRCM_BASE + GPRCM_O_APPS_GPIO_WAKE_CONF) = (ulType & 0x3);
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Sleep.
-//!
-//! This function puts the system into sleep power mode. System exits the power
-//! state on any one of the available interrupt. On exit from sleep mode the
-//! function returns to the calling function with all the processor core
-//! registers retained.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMSleepEnter(void)
-{
-  //
-  // Request Sleep
-  //
-  CPUwfi();
-}
-
-//*****************************************************************************
-//
-//! Puts the system into Deep Sleep power mode.
-//!
-//! This function puts the system into Deep Sleep power mode. System exits the
-//! power state on any one of the available interrupt. On exit from deep
-//! sleep the function returns to the calling function with all the processor
-//! core registers retained.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMDeepSleepEnter(void)
-{
-  //
-  // Set bandgap duty cycle to 1
-  //
-  HWREG(HIB1P2_BASE + HIB1P2_O_BGAP_DUTY_CYCLING_EXIT_CFG) = 0x1;
-
-  //
-  // Enable DSLP in cortex
-  //
-  HWREG(0xE000ED10)|=1<<2;
-
-  //
-  // Request Deep Sleep
-  //
-  CPUwfi();
-
-  //
-  // Disable DSLP in cortex before
-  // returning to the caller
-  //
-  HWREG(0xE000ED10) &= ~(1<<2);
-
-}
-
-//*****************************************************************************
-//
-//! Enable SRAM column retention during Deep Sleep and/or LPDS Power mode(s)
-//!
-//! \param ulSramColSel is bit mask of valid SRAM columns.
-//! \param ulModeFlags is the bit mask of power modes.
-//!
-//! This functions enables the SRAM retention. The device supports configurable
-//! SRAM column retention in Low Power Deep Sleep (LPDS) and Deep Sleep power
-//! modes. Each column is of 64 KB size.
-//!
-//! The parameter \e ulSramColSel should be logical OR of the following:-
-//! -\b PRCM_SRAM_COL_1
-//! -\b PRCM_SRAM_COL_2
-//! -\b PRCM_SRAM_COL_3
-//! -\b PRCM_SRAM_COL_4
-//!
-//! The parameter \e ulModeFlags selects the power modes and sholud be logical
-//! OR of one or more of the following
-//! -\b PRCM_SRAM_DSLP_RET
-//! -\b PRCM_SRAM_LPDS_RET
-//!
-//! \return None.
-//
-//****************************************************************************
-void PRCMSRAMRetentionEnable(unsigned long ulSramColSel, unsigned long ulModeFlags)
-{
-  if(ulModeFlags & PRCM_SRAM_DSLP_RET)
-  {
-    //
-    // Configure deep sleep SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_DSLP_CFG) = (ulSramColSel & 0xF);
-  }
-
-  if(ulModeFlags & PRCM_SRAM_LPDS_RET)
-  {
-    //
-    // Configure LPDS SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_LPDS_CFG) = (ulSramColSel & 0xF);
-  }
-}
-
-//*****************************************************************************
-//
-//! Disable SRAM column retention during Deep Sleep and/or LPDS Power mode(s).
-//!
-//! \param ulSramColSel is bit mask of valid SRAM columns.
-//! \param ulFlags is the bit mask of power modes.
-//!
-//! This functions disable the SRAM retention. The device supports configurable
-//! SRAM column retention in Low Power Deep Sleep (LPDS) and Deep Sleep power
-//! modes. Each column is of 64 KB size.
-//!
-//! The parameter \e ulSramColSel should be logical OR of the following:-
-//! -\b PRCM_SRAM_COL_1
-//! -\b PRCM_SRAM_COL_2
-//! -\b PRCM_SRAM_COL_3
-//! -\b PRCM_SRAM_COL_4
-//!
-//! The parameter \e ulFlags selects the power modes and sholud be logical OR
-//! of one or more of the following
-//! -\b PRCM_SRAM_DSLP_RET
-//! -\b PRCM_SRAM_LPDS_RET
-//!
-//! \return None.
-//
-//****************************************************************************
-void PRCMSRAMRetentionDisable(unsigned long ulSramColSel, unsigned long ulFlags)
-{
-  if(ulFlags & PRCM_SRAM_DSLP_RET)
-  {
-    //
-    // Configure deep sleep SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_DSLP_CFG) &= ~(ulSramColSel & 0xF);
-  }
-
-  if(ulFlags & PRCM_SRAM_LPDS_RET)
-  {
-    //
-    // Configure LPDS SRAM retention register
-    //
-    HWREG(GPRCM_BASE+ GPRCM_O_APPS_SRAM_LPDS_CFG) &= ~(ulSramColSel & 0xF);
-  }
-}
-
-
-//*****************************************************************************
-//
-//! Enables individual HIB wakeup source(s).
-//!
-//! \param ulHIBWakupSrc is logical OR of valid HIB wakeup sources.
-//!
-//! This function enables individual HIB wakeup source(s). The paramter
-//! \e ulHIBWakupSrc is the bit mask of HIB wakeup sources and should be
-//! logical OR of one or more of the follwoing :-
-//! -\b PRCM_HIB_SLOW_CLK_CTR
-//! -\b PRCM_HIB_GPIO2
-//! -\b PRCM_HIB_GPIO4
-//! -\b PRCM_HIB_GPIO13
-//! -\b PRCM_HIB_GPIO17
-//! -\b PRCM_HIB_GPIO11
-//! -\b PRCM_HIB_GPIO24
-//! -\b PRCM_HIB_GPIO26
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc)
-{
-  unsigned long ulRegValue;
-
-  //
-  // Read the RTC register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN);
-
-  //
-  // Enable the RTC as wakeup source if specified
-  //
-  ulRegValue |= (ulHIBWakupSrc & 0x1);
-
-  //
-  // Enable HIB wakeup sources
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue);
-
-  //
-  // REad the GPIO wakeup configuration register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN);
-
-  //
-  // Enable the specified GPIOs a wakeup sources
-  //
-  ulRegValue |= ((ulHIBWakupSrc>>16)&0xFF);
-
-  //
-  // Write the new register configuration
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue);
-}
-
-//*****************************************************************************
-//
-//! Disable individual HIB wakeup source(s).
-//!
-//! \param ulHIBWakupSrc is logical OR of valid HIB wakeup sources.
-//!
-//! This function disable individual HIB wakeup source(s). The paramter
-//! \e ulHIBWakupSrc is same as bit fileds defined in
-//! PRCMEnableHibernateWakeupSource()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc)
-{
-  unsigned long ulRegValue;
-
-  //
-  // Read the RTC register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN);
-
-  //
-  // Disable the RTC as wakeup source if specified
-  //
-  ulRegValue &= ~(ulHIBWakupSrc & 0x1);
-
-  //
-  // Disable HIB wakeup sources
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue);
-
-  //
-  // Read the GPIO wakeup configuration register
-  //
-  ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN);
-
-  //
-  // Enable the specified GPIOs a wakeup sources
-  //
-  ulRegValue &= ~((ulHIBWakupSrc>>16)&0xFF);
-
-  //
-  // Write the new register configuration
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue);
-}
-
-
-//*****************************************************************************
-//
-//! Get hibernate wakeup cause
-//!
-//! This function gets the hibernate wakeup cause.
-//!
-//! \return Returns \b PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK or
-//! \b PRCM_HIB_WAKEUP_CAUSE_GPIO
-//
-//*****************************************************************************
-unsigned long PRCMHibernateWakeupCauseGet(void)
-{
-  return ((MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS)>>1)&0xF);
-}
-
-//*****************************************************************************
-//
-//! Sets Hibernate wakeup Timer
-//!
-//! \param ullTicks is number of 32.768 KHz clocks
-//!
-//! This function sets internal hibernate wakeup timer running at 32.768 KHz.
-//!
-//! \return Returns \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-void PRCMHibernateIntervalSet(unsigned long long ullTicks)
-{
-  unsigned long long ullRTCVal;
-
-  //
-  // Latch the RTC vlaue
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ ,0x1);
-
-  //
-  // Read latched values as 2 32-bit vlaues
-  //
-  ullRTCVal  = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW);
-  ullRTCVal  = ullRTCVal << 32;
-  ullRTCVal |= MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW);
-
-  //
-  // Add the interval
-  //
-  ullRTCVal = ullRTCVal + ullTicks;
-
-  //
-  // Set RTC match value
-  //
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF,
-                                            (unsigned long)(ullRTCVal));
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF,
-                                           (unsigned long)(ullRTCVal>>32));
-}
-
-
-//*****************************************************************************
-//
-//! Selects the GPIO(s) for hibernate wakeup
-//!
-//! \param ulGPIOBitMap is the bit-map of valid hibernate wakeup GPIO.
-//! \param ulType is the wakeup trigger type.
-//!
-//! This function setects the wakeup GPIO for hibernate and can be
-//! used to select any combination of 7 pre-defined GPIO(s).
-//!
-//! This function enables individual HIB wakeup source(s). The paramter
-//! \e ulGPIOBitMap should be one of the follwoing :-
-//! -\b PRCM_HIB_GPIO2
-//! -\b PRCM_HIB_GPIO4
-//! -\b PRCM_HIB_GPIO13
-//! -\b PRCM_HIB_GPIO17
-//! -\b PRCM_HIB_GPIO11
-//! -\b PRCM_HIB_GPIO24
-//! -\b PRCM_HIB_GPIO26
-//!
-//! The parameter \e ulType sets the trigger type and can be one of the
-//! following:
-//! - \b PRCM_HIB_LOW_LEVEL
-//! - \b PRCM_HIB_HIGH_LEVEL
-//! - \b PRCM_HIB_FALL_EDGE
-//! - \b PRCM_HIB_RISE_EDGE
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType)
-{
-  unsigned char ucLoop;
-  unsigned long ulRegValue;
-
-  //
-  // Shift the bits to extract the GPIO selection
-  //
-  ulGPIOBitMap >>= 16;
-
-  //
-  // Set the configuration for each GPIO
-  //
-  for(ucLoop=0; ucLoop < 7; ucLoop++)
-  {
-    if(ulGPIOBitMap & (1<>32));
-}
-
-//*****************************************************************************
-//
-//! Gets slow clock counter match value.
-//!
-//! This function gets the match value for  slow clock counter. This is use
-//! to interrupt the processor when RTC counts to the specified value.
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long long PRCMSlowClkCtrMatchGet(void)
-{
-  unsigned long long ullValue;
-
-  //
-  // Get RTC match value
-  //
-  ullValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF);
-  ullValue = ullValue<<32;
-  ullValue |= MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF);
-
-  //
-  // Return the value
-  //
-  return ullValue;
-}
-
-
-//*****************************************************************************
-//
-//! Write to On-Chip Retention (OCR) register.
-//!
-//! This function writes to On-Chip retention register. The device supports two
-//! 4-byte OCR register which are retained across all power mode.
-//!
-//! The parameter \e ucIndex is an index of the OCR and can be \b 0 or \b 1.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMOCRRegisterWrite(unsigned char ucIndex, unsigned long ulRegValue)
-{
-  MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2+(ucIndex << 2),ulRegValue);
-}
-
-//*****************************************************************************
-//
-//! Read from On-Chip Retention (OCR) register.
-//!
-//! This function reads from On-Chip retention register. The device supports two
-//! 4-byte OCR register which are retained across all power mode.
-//!
-//! The parameter \e ucIndex is an index of the OCR and can be \b 0 or \b 1.
-//!
-//! \return None.
-//
-//*****************************************************************************
-unsigned long PRCMOCRRegisterRead(unsigned char ucIndex)
-{
-  //
-  // Return the read value.
-  //
-  return MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2 + (ucIndex << 2));
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the PRCM.
-//!
-//! \param pfnHandler is a pointer to the function to be called when the
-//! interrupt is activated.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller;
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntRegister(void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler.
-  //
-  IntRegister(INT_PRCM, pfnHandler);
-
-  //
-  // Enable the PRCM interrupt.
-  //
-  IntEnable(INT_PRCM);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the PRCM.
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a PRCM interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntUnregister(void)
-{
-  //
-  // Enable the UART interrupt.
-  //
-  IntDisable(INT_PRCM);
-
-  //
-  // Register the interrupt handler.
-  //
-  IntUnregister(INT_PRCM);
-}
-
-//*****************************************************************************
-//
-//! Enables individual PRCM interrupt sources.
-//!
-//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated ARCM interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! -\b PRCM_INT_SLOW_CLK_CTR
-//!
-//
-//*****************************************************************************
-void PRCMIntEnable(unsigned long ulIntFlags)
-{
-  unsigned long ulRegValue;
-
-  if(ulIntFlags & PRCM_INT_SLOW_CLK_CTR )
-  {
-    //
-    // Enable PRCM interrupt
-    //
-    HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE) |= 0x4;
-
-    //
-    // Enable RTC interrupt
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE);
-    ulRegValue |= 0x1;
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue);
-  }
-}
-
-//*****************************************************************************
-//
-//! Disables individual PRCM interrupt sources.
-//!
-//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled.
-//!
-//! This function disables the indicated ARCM interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to PRCMEnableInterrupt().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMIntDisable(unsigned long ulIntFlags)
-{
-  unsigned long ulRegValue;
-
-  if(ulIntFlags & PRCM_INT_SLOW_CLK_CTR )
-  {
-    //
-    // Disable PRCM interrupt
-    //
-    HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_ENABLE) &= ~0x4;
-
-    //
-    // Disable RTC interrupt
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE);
-    ulRegValue &= ~0x1;
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue);
-  }
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! This function returns the PRCM interrupt status of interrupts that are
-//! allowed to reflect to the processor. The interrupts are cleared on read.
-//!
-//! \return Returns the current interrupt status.
-//
-//*****************************************************************************
-unsigned long PRCMIntStatus(void)
-{
-    return HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS);
-}
-
-//*****************************************************************************
-//
-//! Mark the function of RTC as being used
-//!
-//! This function marks in HW that feature to maintain calendar time in device
-//! is being used.
-//!
-//! Specifically, this feature reserves user's HIB Register-1 accessed through
-//! PRCMOCRRegisterWrite(1) for internal work / purpose, therefore, the stated
-//! register is not available to user. Also, users must not excercise the Slow
-//! Clock Counter API(s), if RTC has been set for use.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCInUseSet(void)
-{
-        RTC_USE_SET();
-        return;
-}
-
-//*****************************************************************************
-//
-//! Clear the function of RTC as being used
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCInUseClear(void)
-{
-        RTC_USE_CLR();
-        return;
-}
-
-//*****************************************************************************
-//
-//! Ascertain whether function of RTC is being used
-//!
-//! This function indicates whether function of RTC is being used on the device
-//! or not.
-//!
-//! This routine should be utilized by the application software, when returning
-//! from low-power, to confirm that RTC has been put to use and may not need to
-//! set the value of the RTC.
-//!
-//! The RTC feature, if set or marked, can be only reset either through reboot
-//! or power cycle.
-//!
-//! \return None.
-//
-//*****************************************************************************
-tBoolean PRCMRTCInUseGet(void)
-{
-        return IS_RTC_USED()? true : false;
-}
-
-//*****************************************************************************
-//
-//! Set the calendar time in the device.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function sets the specified calendar time in the device. The calendar
-//! time is outlined in terms of seconds and milliseconds. However, the device
-//! makes no assumption about the origin or reference of the calendar time.
-//!
-//! The device uses the indicated calendar value to update and maintain the
-//! wall-clock time across active and low power states.
-//!
-//! The function PRCMRTCInUseSet() must be invoked prior to use of this feature.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCSet(unsigned long ulSecs, unsigned short usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec = RTC_U64MSEC_MK(ulSecs, usMsec) - SCC_U64MSEC_GET();
-
-                 RTC_U32SECS_REG_WR(RTC_SECS_IN_U64MSEC(ullMsec));
-                 RTC_U32MSEC_REG_WR(RTC_MSEC_IN_U64MSEC(ullMsec));
-        }
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Get the instantaneous calendar time from the device.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function fetches the instantaneous value of the ticking calendar time
-//! from the device. The calendar time is outlined in terms of seconds and
-//! milliseconds.
-//!
-//! The device provides the calendar value that has been maintained across
-//! active and low power states.
-//!
-//! The function PRCMRTCSet() must have been invoked once to set a reference.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCGet(unsigned long *ulSecs, unsigned short *usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-                ullMsec += SCC_U64MSEC_GET();
-        }
-
-        *ulSecs = RTC_SECS_IN_U64MSEC(ullMsec);
-        *usMsec = RTC_MSEC_IN_U64MSEC(ullMsec);
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Set a calendar time alarm.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function sets an wall-clock alarm in the device to be reported for  a
-//! futuristic calendar time. The calendar time is outlined in terms of seconds
-//! and milliseconds.
-//!
-//! The device provides uses the calendar value that has been maintained across
-//! active and low power states to report attainment of alarm time.
-//!
-//! The function PRCMRTCSet() must have been invoked once to set a reference.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCMatchSet(unsigned long ulSecs, unsigned short usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = RTC_U64MSEC_MK(ulSecs, usMsec);
-                ullMsec -= RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-                SCC_U64MSEC_MATCH_SET(SELECT_SCC_U42BITS(ullMsec));
-        }
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! Get a previously set calendar time alarm.
-//!
-//! \param ulSecs refers to the seconds part of the  calendar time
-//! \param usMsec refers to the fractional (ms) part of the second
-//!
-//! This function fetches from the device a wall-clock alarm that would  have
-//! been previously set in the device. The calendar time is outlined in terms
-//! of seconds and milliseconds.
-//!
-//! If no alarm was set in the past, then this function would fetch a random
-//! information.
-//!
-//! The function PRCMRTCMatchSet() must have been invoked once to set an alarm.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec)
-{
-        unsigned long long ullMsec = 0;
-
-        if(IS_RTC_USED()) {
-                ullMsec  = SCC_U64MSEC_MATCH_GET();
-                ullMsec += RTC_U64MSEC_MK(RTC_U32SECS_REG_RD(),
-                                          RTC_U32MSEC_REG_RD());
-        }
-
-        *ulSecs = RTC_SECS_IN_U64MSEC(ullMsec);
-        *usMsec = RTC_MSEC_IN_U64MSEC(ullMsec);
-
-        return;
-}
-
-//*****************************************************************************
-//
-//! MCU Initialization Routine
-//!
-//! This function sets mandatory configurations for the MCU
-//!
-//! \return None
-//
-//*****************************************************************************
-void PRCMCC3200MCUInit(void)
-{
-    unsigned long ulRegValue;
-
-    //
-    // DIG DCDC LPDS ECO Enable
-    //
-    HWREG(0x4402F064) |= 0x800000;
-
-    //
-    // Enable hibernate ECO for PG 1.32 devices only. With this ECO enabled,
-    // any hibernate wakeup source will be kept masked until the device enters
-    // hibernate completely (analog + digital)
-    //
-    ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE  + HIB3P3_O_MEM_HIB_REG0);
-    MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0, ulRegValue | (1<<4));
-
-    //
-    // Handling the clock switching (for 1.32 only)
-    //
-    HWREG(0x4402E16C) |= 0x3C;
-
-    //
-    // Enable uDMA
-    //
-    MAP_PRCMPeripheralClkEnable(PRCM_UDMA,PRCM_RUN_MODE_CLK);
-
-    //
-    // Reset uDMA
-    //
-    MAP_PRCMPeripheralReset(PRCM_UDMA);
-
-    //
-    // Disable uDMA
-    //
-    MAP_PRCMPeripheralClkDisable(PRCM_UDMA,PRCM_RUN_MODE_CLK);
-
-    //
-    // Enable RTC
-    //
-    if(MAP_PRCMSysResetCauseGet()== PRCM_POWER_ON)
-    {
-        MAP_PRCMHIBRegWrite(0x4402F804,0x1);
-    }
-
-    //
-    // SWD mode
-    //
-    if (((HWREG(0x4402F0C8) & 0xFF) == 0x2))
-    {
-        HWREG(0x4402E110) = ((HWREG(0x4402E110) & ~0xC0F) | 0x2);
-        HWREG(0x4402E114) = ((HWREG(0x4402E110) & ~0xC0F) | 0x2);
-    }
-
-    //
-    // Override JTAG mux
-    //
-    HWREG(0x4402E184) |= 0x2;
-
-    //
-    // Change UART pins(55,57) mode to PIN_MODE_0 if they are in PIN_MODE_1
-    //
-    if ((HWREG(0x4402E0A4) & 0xF) == 0x1)
-    {
-        HWREG(0x4402E0A4) = ((HWREG(0x4402E0A4) & ~0xF));
-    }
-
-    if ((HWREG(0x4402E0A8) & 0xF) == 0x1)
-    {
-        HWREG(0x4402E0A8) = ((HWREG(0x4402E0A8) & ~0xF));
-    }
-
-    //
-    // DIG DCDC VOUT trim settings based on PROCESS INDICATOR
-    //
-    if (((HWREG(0x4402DC78) >> 22) & 0xF) == 0xE)
-    {
-        HWREG(0x4402F0B0) = ((HWREG(0x4402F0B0) & ~(0x00FC0000))|(0x32 << 18));
-    }
-    else
-    {
-        HWREG(0x4402F0B0) = ((HWREG(0x4402F0B0) & ~(0x00FC0000))|(0x29 << 18));
-    }
-
-    //
-    // Enable SOFT RESTART in case of DIG DCDC collapse
-    //
-    HWREG(0x4402FC74) &= ~(0x10000000);
-
-
-    //
-    // Disable the sleep for ANA DCDC
-    //
-    HWREG(0x4402F0A8) |= 0x00000004 ;
-}
-
-//*****************************************************************************
-//
-//! Reads 32-bit value from register at specified address
-//!
-//! \param ulRegAddr is the address of register to be read.
-//!
-//! This function reads 32-bit value from the register as specified by
-//! \e ulRegAddr.
-//!
-//! \return Return the value of the register.
-//
-//*****************************************************************************
-unsigned long PRCMHIBRegRead(unsigned long ulRegAddr)
-{
-  unsigned long ulValue;
-
-  //
-  // Read the Reg value
-  //
-  ulValue = HWREG(ulRegAddr);
-
-  //
-  // Wait for 200 uSec
-  //
-  UtilsDelay((80*200)/3);
-
-  //
-  // Return the value
-  //
-  return ulValue;
-}
-
-//*****************************************************************************
-//
-//! Writes 32-bit value to register at specified address
-//!
-//! \param ulRegAddr is the address of register to be read.
-//! \param ulValue is the 32-bit value to be written.
-//!
-//! This function writes 32-bit value passed as \e ulValue to the register as
-//! specified by \e ulRegAddr
-//!
-//! \return None
-//
-//*****************************************************************************
-void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue)
-{
-  //
-  // Read the Reg value
-  //
-  HWREG(ulRegAddr) = ulValue;
-
-  //
-  // Wait for 200 uSec
-  //
-  UtilsDelay((80*200)/3);
-}
-
-//*****************************************************************************
-//
-//! \param ulDivider is clock frequency divider value
-//! \param ulWidth is the width of the high pulse
-//!
-//! This function sets the input frequency for camera module.
-//!
-//! The frequency is calculated as follows:
-//!
-//!        f_out = 240MHz/ulDivider;
-//!
-//! The parameter \e ulWidth sets the width of the high pulse.
-//!
-//! For e.g.:
-//!
-//!     ulDivider = 4;
-//!     ulWidth   = 2;
-//!
-//!     f_out = 30 MHz and 50% duty cycle
-//!
-//! And,
-//!
-//!     ulDivider = 4;
-//!     ulWidth   = 1;
-//!
-//!     f_out = 30 MHz and 25% duty cycle
-//!
-//! \return 0 on success, 1 on error
-//
-//*****************************************************************************
-unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth)
-{
-    if(ulDivider > ulWidth && ulWidth != 0 )
-    {
-      //
-      // Set  the hifh pulse width
-      //
-      HWREG(ARCM_BASE +
-            APPS_RCM_O_CAMERA_CLK_GEN) = (((ulWidth & 0x07) -1) << 8);
-
-      //
-      // Set the low pulse width
-      //
-      HWREG(ARCM_BASE +
-            APPS_RCM_O_CAMERA_CLK_GEN) = ((ulDivider - ulWidth - 1) & 0x07);
-      //
-      // Return success
-      //
-      return 0;
-    }
-
-    //
-    // Success;
-    //
-    return 1;
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/prcm.h b/ports/cc3200/hal/prcm.h
deleted file mode 100644
index 2f700ae2c647f..0000000000000
--- a/ports/cc3200/hal/prcm.h
+++ /dev/null
@@ -1,285 +0,0 @@
-//*****************************************************************************
-//
-//  prcm.h
-//
-//  Prototypes for the PRCM control driver.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __PRCM_H__
-#define __PRCM_H__
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// Peripheral clock and reset control registers
-//
-//*****************************************************************************
-typedef struct _PRCM_PeripheralRegs_
-{
-
-unsigned char ulClkReg;
-unsigned char ulRstReg;
-
-}PRCM_PeriphRegs_t;
-
-//*****************************************************************************
-// Values that can be passed to PRCMPeripheralEnable() and
-// PRCMPeripheralDisable()
-//*****************************************************************************
-#define PRCM_RUN_MODE_CLK         0x00000001
-#define PRCM_SLP_MODE_CLK         0x00000100
-#define PRCM_DSLP_MODE_CLK        0x00010000
-
-//*****************************************************************************
-// Values that can be passed to PRCMSRAMRetentionEnable() and
-// PRCMSRAMRetentionDisable() as ulSramColSel.
-//*****************************************************************************
-#define PRCM_SRAM_COL_1           0x00000001
-#define PRCM_SRAM_COL_2           0x00000002
-#define PRCM_SRAM_COL_3           0x00000004
-#define PRCM_SRAM_COL_4           0x00000008
-
-//*****************************************************************************
-// Values that can be passed to PRCMSRAMRetentionEnable() and
-// PRCMSRAMRetentionDisable() as ulModeFlags.
-//*****************************************************************************
-#define PRCM_SRAM_DSLP_RET        0x00000001
-#define PRCM_SRAM_LPDS_RET        0x00000002
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeupSourceEnable(),
-// PRCMLPDSWakeupCauseGet() and PRCMLPDSWakeupSourceDisable().
-//*****************************************************************************
-#define PRCM_LPDS_HOST_IRQ        0x00000080
-#define PRCM_LPDS_GPIO            0x00000010
-#define PRCM_LPDS_TIMER           0x00000001
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeUpGPIOSelect() as Type
-//*****************************************************************************
-#define PRCM_LPDS_LOW_LEVEL       0x00000002
-#define PRCM_LPDS_HIGH_LEVEL      0x00000000
-#define PRCM_LPDS_FALL_EDGE       0x00000001
-#define PRCM_LPDS_RISE_EDGE       0x00000003
-
-//*****************************************************************************
-// Values that can be passed to PRCMLPDSWakeUpGPIOSelect()
-//*****************************************************************************
-#define PRCM_LPDS_GPIO2           0x00000000
-#define PRCM_LPDS_GPIO4           0x00000001
-#define PRCM_LPDS_GPIO13          0x00000002
-#define PRCM_LPDS_GPIO17          0x00000003
-#define PRCM_LPDS_GPIO11          0x00000004
-#define PRCM_LPDS_GPIO24          0x00000005
-#define PRCM_LPDS_GPIO26          0x00000006
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupSourceEnable(),
-// PRCMHibernateWakeupSourceDisable().
-//*****************************************************************************
-#define PRCM_HIB_SLOW_CLK_CTR     0x00000001
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeUpGPIOSelect() as ulType
-//*****************************************************************************
-#define PRCM_HIB_LOW_LEVEL        0x00000000
-#define PRCM_HIB_HIGH_LEVEL       0x00000001
-#define PRCM_HIB_FALL_EDGE        0x00000002
-#define PRCM_HIB_RISE_EDGE        0x00000003
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupSourceEnable(),
-// PRCMHibernateWakeupSourceDisable(), PRCMHibernateWakeUpGPIOSelect()
-//*****************************************************************************
-#define PRCM_HIB_GPIO2            0x00010000
-#define PRCM_HIB_GPIO4            0x00020000
-#define PRCM_HIB_GPIO13           0x00040000
-#define PRCM_HIB_GPIO17           0x00080000
-#define PRCM_HIB_GPIO11           0x00100000
-#define PRCM_HIB_GPIO24           0x00200000
-#define PRCM_HIB_GPIO26           0x00400000
-
-//*****************************************************************************
-// Values that will be returned from PRCMSysResetCauseGet().
-//*****************************************************************************
-#define PRCM_POWER_ON             0x00000000
-#define PRCM_LPDS_EXIT            0x00000001
-#define PRCM_CORE_RESET           0x00000003
-#define PRCM_MCU_RESET            0x00000004
-#define PRCM_WDT_RESET            0x00000005
-#define PRCM_SOC_RESET            0x00000006
-#define PRCM_HIB_EXIT             0x00000007
-
-//*****************************************************************************
-// Values that can be passed to PRCMHibernateWakeupCauseGet().
-//*****************************************************************************
-#define PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK  0x00000002
-#define PRCM_HIB_WAKEUP_CAUSE_GPIO        0x00000004
-
-//*****************************************************************************
-// Values that can be passed to PRCMIntEnable
-//*****************************************************************************
-#define PRCM_INT_SLOW_CLK_CTR     0x00004000
-
-//*****************************************************************************
-// Values that can be passed to PRCMPeripheralClkEnable(),
-// PRCMPeripheralClkDisable(), PRCMPeripheralReset()
-//*****************************************************************************
-#define PRCM_CAMERA               0x00000000
-#define PRCM_I2S                  0x00000001
-#define PRCM_SDHOST               0x00000002
-#define PRCM_GSPI                 0x00000003
-#define PRCM_LSPI                 0x00000004
-#define PRCM_UDMA                 0x00000005
-#define PRCM_GPIOA0               0x00000006
-#define PRCM_GPIOA1               0x00000007
-#define PRCM_GPIOA2               0x00000008
-#define PRCM_GPIOA3               0x00000009
-#define PRCM_GPIOA4               0x0000000A
-#define PRCM_WDT                  0x0000000B
-#define PRCM_UARTA0               0x0000000C
-#define PRCM_UARTA1               0x0000000D
-#define PRCM_TIMERA0              0x0000000E
-#define PRCM_TIMERA1              0x0000000F
-#define PRCM_TIMERA2              0x00000010
-#define PRCM_TIMERA3              0x00000011
-#define PRCM_DTHE                 0x00000012
-#define PRCM_SSPI                 0x00000013
-#define PRCM_I2CA0                0x00000014
-// Note : PRCM_ADC is a dummy define for pinmux utility code generation
-// PRCM_ADC should never be used in any user code. 
-#define PRCM_ADC                  0x000000FF 
-
-//*****************************************************************************
-// User bits in the PRCM persistent registers
-//*****************************************************************************
-#define PRCM_SAFE_BOOT_BIT              30
-#define PRCM_WDT_RESET_BIT              29
-#define PRCM_FIRST_BOOT_BIT             28
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void PRCMSetSpecialBit(unsigned char bit);
-extern void PRCMClearSpecialBit(unsigned char bit);
-extern tBoolean PRCMGetSpecialBit(unsigned char bit);
-extern void PRCMSOCReset(void);
-extern void PRCMMCUReset(tBoolean bIncludeSubsystem);
-extern unsigned long PRCMSysResetCauseGet(void);
-
-extern void PRCMPeripheralClkEnable(unsigned long ulPeripheral,
-                                    unsigned long ulClkFlags);
-extern void PRCMPeripheralClkDisable(unsigned long ulPeripheral,
-                                     unsigned long ulClkFlags);
-extern void PRCMPeripheralReset(unsigned long ulPeripheral);
-extern tBoolean PRCMPeripheralStatusGet(unsigned long ulPeripheral);
-
-extern void PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq);
-extern unsigned long PRCMPeripheralClockGet(unsigned long ulPeripheral);
-
-extern void PRCMSleepEnter(void);
-extern void PRCMDeepSleepEnter(void);
-
-extern void PRCMSRAMRetentionEnable(unsigned long ulSramColSel,
-                                    unsigned long ulFlags);
-extern void PRCMSRAMRetentionDisable(unsigned long ulSramColSel,
-                                     unsigned long ulFlags);
-extern void PRCMLPDSRestoreInfoSet(unsigned long ulRestoreSP,
-                                   unsigned long ulRestorePC);
-extern void PRCMLPDSEnter(void);
-extern void PRCMLPDSIntervalSet(unsigned long ulTicks);
-extern void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc);
-extern unsigned long PRCMLPDSWakeupCauseGet(void);
-extern void PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin,
-                                     unsigned long ulType);
-extern void PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc);
-
-extern void PRCMHibernateEnter(void);
-extern void PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc);
-extern unsigned long PRCMHibernateWakeupCauseGet(void);
-extern void PRCMHibernateWakeUpGPIOSelect(unsigned long ulMultiGPIOBitMap,
-                                          unsigned long ulType);
-extern void PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc);
-extern void PRCMHibernateIntervalSet(unsigned long long ullTicks);
-
-extern unsigned long long PRCMSlowClkCtrGet(void);
-extern unsigned long long PRCMSlowClkCtrFastGet(void);
-extern void PRCMSlowClkCtrMatchSet(unsigned long long ullTicks);
-extern unsigned long long PRCMSlowClkCtrMatchGet(void);
-
-extern void PRCMOCRRegisterWrite(unsigned char ucIndex,
-                                 unsigned long ulRegValue);
-extern unsigned long PRCMOCRRegisterRead(unsigned char ucIndex);
-
-extern void PRCMIntRegister(void (*pfnHandler)(void));
-extern void PRCMIntUnregister(void);
-extern void PRCMIntEnable(unsigned long ulIntFlags);
-extern void PRCMIntDisable(unsigned long ulIntFlags);
-extern unsigned long PRCMIntStatus(void);
-extern void PRCMRTCInUseSet(void);
-extern void PRCMRTCInUseClear(void);
-extern tBoolean PRCMRTCInUseGet(void);
-extern void PRCMRTCSet(unsigned long ulSecs, unsigned short usMsec);
-extern void PRCMRTCGet(unsigned long *ulSecs, unsigned short *usMsec);
-extern void PRCMRTCMatchSet(unsigned long ulSecs, unsigned short usMsec);
-extern void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec);
-extern void PRCMCC3200MCUInit(void);
-extern unsigned long PRCMHIBRegRead(unsigned long ulRegAddr);
-extern void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue);
-extern unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth);
-
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-}
-#endif
-
-#endif //  __PRCM_H__
diff --git a/ports/cc3200/hal/rom.h b/ports/cc3200/hal/rom.h
deleted file mode 100644
index 33a18b68fc6fb..0000000000000
--- a/ports/cc3200/hal/rom.h
+++ /dev/null
@@ -1,2237 +0,0 @@
-//*****************************************************************************
-//
-//  rom.h
-//
-//  Macros to facilitate calling functions in the ROM.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// THIS IS AN AUTO-GENERATED FILE.  DO NOT EDIT BY HAND.
-//
-//*****************************************************************************
-
-#ifndef __ROM_H__
-#define __ROM_H__
-
-//*****************************************************************************
-//
-// Pointers to the main API tables.
-//
-//*****************************************************************************
-#define ROM_APITABLE            ((unsigned long *)0x0000040C)
-#define ROM_VERSION             (ROM_APITABLE[0])
-#define ROM_UARTTABLE           ((unsigned long *)(ROM_APITABLE[1]))
-#define ROM_TIMERTABLE          ((unsigned long *)(ROM_APITABLE[2]))
-#define ROM_WATCHDOGTABLE       ((unsigned long *)(ROM_APITABLE[3]))
-#define ROM_INTERRUPTTABLE      ((unsigned long *)(ROM_APITABLE[4]))
-#define ROM_UDMATABLE           ((unsigned long *)(ROM_APITABLE[5]))
-#define ROM_PRCMTABLE           ((unsigned long *)(ROM_APITABLE[6]))
-#define ROM_I2CTABLE            ((unsigned long *)(ROM_APITABLE[7]))
-#define ROM_SPITABLE            ((unsigned long *)(ROM_APITABLE[8]))
-#define ROM_CAMERATABLE         ((unsigned long *)(ROM_APITABLE[9]))
-#define ROM_FLASHTABLE          ((unsigned long *)(ROM_APITABLE[10]))
-#define ROM_PINTABLE            ((unsigned long *)(ROM_APITABLE[11]))
-#define ROM_SYSTICKTABLE        ((unsigned long *)(ROM_APITABLE[12]))
-#define ROM_UTILSTABLE          ((unsigned long *)(ROM_APITABLE[13]))
-#define ROM_I2STABLE            ((unsigned long *)(ROM_APITABLE[14]))
-#define ROM_HWSPINLOCKTABLE     ((unsigned long *)(ROM_APITABLE[15]))
-#define ROM_GPIOTABLE           ((unsigned long *)(ROM_APITABLE[16]))
-#define ROM_AESTABLE            ((unsigned long *)(ROM_APITABLE[17]))
-#define ROM_DESTABLE            ((unsigned long *)(ROM_APITABLE[18]))
-#define ROM_SHAMD5TABLE         ((unsigned long *)(ROM_APITABLE[19]))
-#define ROM_CRCTABLE            ((unsigned long *)(ROM_APITABLE[20]))
-#define ROM_SDHOSTTABLE         ((unsigned long *)(ROM_APITABLE[21]))
-#define ROM_ADCTABLE            ((unsigned long *)(ROM_APITABLE[22]))
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Interrupt API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntEnable                                                         \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntMasterEnable                                                   \
-        ((tBoolean (*)(void))ROM_INTERRUPTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntMasterDisable                                                  \
-        ((tBoolean (*)(void))ROM_INTERRUPTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntDisable                                                        \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGroupingSet                                            \
-        ((void (*)(unsigned long ulBits))ROM_INTERRUPTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGroupingGet                                            \
-        ((unsigned long (*)(void))ROM_INTERRUPTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPrioritySet                                                    \
-        ((void (*)(unsigned long ulInterrupt,                                 \
-                   unsigned char ucPriority))ROM_INTERRUPTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityGet                                                    \
-        ((long (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPendSet                                                        \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPendClear                                                      \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityMaskSet                                                \
-        ((void (*)(unsigned long ulPriorityMask))ROM_INTERRUPTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntPriorityMaskGet                                                \
-        ((unsigned long (*)(void))ROM_INTERRUPTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntRegister                                                       \
-        ((void (*)(unsigned long ulInterrupt,                                 \
-                   void (*pfnHandler)(void)))ROM_INTERRUPTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntUnregister                                                     \
-        ((void (*)(unsigned long ulInterrupt))ROM_INTERRUPTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_IntVTableBaseSet                                                  \
-        ((void (*)(unsigned long ulVtableBase))ROM_INTERRUPTTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Timer API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerEnable                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerDisable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerConfigure                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulConfig))ROM_TIMERTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlLevel                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   tBoolean bInvert))ROM_TIMERTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlEvent                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulEvent))ROM_TIMERTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerControlStall                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   tBoolean bStall))ROM_TIMERTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleMatchSet                                             \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerPrescaleMatchGet                                             \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerLoadSet                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerLoadGet                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerValueGet                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerMatchSet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   unsigned long ulValue))ROM_TIMERTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerMatchGet                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulTimer))ROM_TIMERTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntRegister                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer,                                     \
-                   void (*pfnHandler)(void)))ROM_TIMERTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntUnregister                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTimer))ROM_TIMERTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntEnable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntDisable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntStatus                                                    \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_TIMERTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_TimerIntClear                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_TIMERTABLE[20])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the UART API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTParityModeSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulParity))ROM_UARTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTParityModeGet                                                 \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOLevelSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulRxLevel))ROM_UARTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOLevelGet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulTxLevel,                                 \
-                   unsigned long *pulRxLevel))ROM_UARTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTConfigSetExpClk                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulUARTClk,                                   \
-                   unsigned long ulBaud,                                      \
-                   unsigned long ulConfig))ROM_UARTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTConfigGetExpClk                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulUARTClk,                                   \
-                   unsigned long *pulBaud,                                    \
-                   unsigned long *pulConfig))ROM_UARTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTEnable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDisable                                                       \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFOEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFIFODisable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharsAvail                                                    \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTSpaceAvail                                                    \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharGetNonBlocking                                            \
-        ((long (*)(unsigned long ulBase))ROM_UARTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharGet                                                       \
-        ((long (*)(unsigned long ulBase))ROM_UARTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharPutNonBlocking                                            \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned char ucData))ROM_UARTTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTCharPut                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned char ucData))ROM_UARTTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTBreakCtl                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   tBoolean bBreakState))ROM_UARTTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTBusy                                                          \
-        ((tBoolean (*)(unsigned long ulBase))ROM_UARTTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntRegister                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_UARTTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntUnregister                                                 \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntDisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntStatus                                                     \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_UARTTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTIntClear                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_UARTTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDMAEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDMAFlags))ROM_UARTTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTDMADisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDMAFlags))ROM_UARTTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTRxErrorGet                                                    \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTRxErrorClear                                                  \
-        ((void (*)(unsigned long ulBase))ROM_UARTTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlSet                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulControl))ROM_UARTTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlClear                                             \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulControl))ROM_UARTTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemControlGet                                               \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTModemStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFlowControlSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_UARTTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTFlowControlGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTTxIntModeSet                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_UARTTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_UARTTxIntModeGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_UARTTABLE[35])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the uDMA API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelTransferSet                                            \
-        ((void (*)(unsigned long ulChannelStructIndex,                        \
-                   unsigned long ulMode,                                      \
-                   void *pvSrcAddr,                                           \
-                   void *pvDstAddr,                                           \
-                   unsigned long ulTransferSize))ROM_UDMATABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAEnable                                                        \
-        ((void (*)(void))ROM_UDMATABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMADisable                                                       \
-        ((void (*)(void))ROM_UDMATABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAErrorStatusGet                                                \
-        ((unsigned long (*)(void))ROM_UDMATABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAErrorStatusClear                                              \
-        ((void (*)(void))ROM_UDMATABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelEnable                                                 \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelDisable                                                \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelIsEnabled                                              \
-        ((tBoolean (*)(unsigned long ulChannelNum))ROM_UDMATABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlBaseSet                                                \
-        ((void (*)(void *pControlTable))ROM_UDMATABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlBaseGet                                                \
-        ((void * (*)(void))ROM_UDMATABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelRequest                                                \
-        ((void (*)(unsigned long ulChannelNum))ROM_UDMATABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeEnable                                        \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned long ulAttr))ROM_UDMATABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeDisable                                       \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned long ulAttr))ROM_UDMATABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAttributeGet                                           \
-        ((unsigned long (*)(unsigned long ulChannelNum))ROM_UDMATABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelControlSet                                             \
-        ((void (*)(unsigned long ulChannelStructIndex,                        \
-                   unsigned long ulControl))ROM_UDMATABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelSizeGet                                                \
-        ((unsigned long (*)(unsigned long ulChannelStructIndex))ROM_UDMATABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelModeGet                                                \
-        ((unsigned long (*)(unsigned long ulChannelStructIndex))ROM_UDMATABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntStatus                                                     \
-        ((unsigned long (*)(void))ROM_UDMATABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntClear                                                      \
-        ((void (*)(unsigned long ulChanMask))ROM_UDMATABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAControlAlternateBaseGet                                       \
-        ((void * (*)(void))ROM_UDMATABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelScatterGatherSet                                       \
-        ((void (*)(unsigned long ulChannelNum,                                \
-                   unsigned ulTaskCount,                                      \
-                   void *pvTaskList,                                          \
-                   unsigned long ulIsPeriphSG))ROM_UDMATABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAChannelAssign                                                 \
-        ((void (*)(unsigned long ulMapping))ROM_UDMATABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntRegister                                                   \
-        ((void (*)(unsigned long ulIntChannel,                                \
-                   void (*pfnHandler)(void)))ROM_UDMATABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_uDMAIntUnregister                                                 \
-        ((void (*)(unsigned long ulIntChannel))ROM_UDMATABLE[23])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Watchdog API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntClear                                                  \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogRunning                                                   \
-        ((tBoolean (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogLock                                                      \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogUnlock                                                    \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogLockState                                                 \
-        ((tBoolean (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogReloadSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulLoadVal))ROM_WATCHDOGTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogReloadGet                                                 \
-        ((unsigned long (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogValueGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntStatus                                                 \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_WATCHDOGTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogStallEnable                                               \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogStallDisable                                              \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntRegister                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_WATCHDOGTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_WatchdogIntUnregister                                             \
-        ((void (*)(unsigned long ulBase))ROM_WATCHDOGTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the I2C API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(pfnHandler)(void)))ROM_I2CTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CTxFIFOConfigSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CTxFIFOFlush                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CRxFIFOConfigSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CRxFIFOFlush                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFOStatus                                                     \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataPut                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataPutNonBlocking                                         \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       uint8_t ui8Data))ROM_I2CTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataGet                                                    \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CFIFODataGetNonBlocking                                         \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       uint8_t *pui8Data))ROM_I2CTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBurstLengthSet                                           \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Length))ROM_I2CTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBurstCountGet                                            \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterGlitchFilterConfigSet                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveFIFOEnable                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_I2CTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveFIFODisable                                               \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBusBusy                                                  \
-        ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterBusy                                                     \
-        ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterControl                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Cmd))ROM_I2CTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDataGet                                                  \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDataPut                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterDisable                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterEnable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterErr                                                      \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntClear                                                 \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntDisable                                               \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntEnable                                                \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntStatus                                                \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   bool bMasked))ROM_I2CTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntEnableEx                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntDisableEx                                             \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntStatusEx                                              \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_I2CTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterIntClearEx                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterTimeoutSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Value))ROM_I2CTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveACKOverride                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   bool bEnable))ROM_I2CTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveACKValueSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   bool bACK))ROM_I2CTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterLineStateGet                                             \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[35])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterSlaveAddrSet                                             \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8SlaveAddr,                                      \
-                   bool bReceive))ROM_I2CTABLE[36])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDataGet                                                   \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[37])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDataPut                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8Data))ROM_I2CTABLE[38])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveDisable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[39])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveEnable                                                    \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[40])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveInit                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8SlaveAddr))ROM_I2CTABLE[41])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveAddressSet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t ui8AddrNum,                                        \
-                   uint8_t ui8SlaveAddr))ROM_I2CTABLE[42])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntClear                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[43])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntDisable                                                \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[44])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntEnable                                                 \
-        ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[45])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntClearEx                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[46])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntDisableEx                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[47])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntEnableEx                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_I2CTABLE[48])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntStatus                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   bool bMasked))ROM_I2CTABLE[49])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveIntStatusEx                                               \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_I2CTABLE[50])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CSlaveStatus                                                    \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[51])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2CMasterInitExpClk                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32I2CClk,                                       \
-                   bool bFast))ROM_I2CTABLE[52])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SPI API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIEnable                                                         \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIReset                                                          \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIConfigSetExpClk                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulSPIClk,                                     \
-                   unsigned long ulBitRate,                                   \
-                   unsigned long ulMode,                                      \
-                   unsigned long ulSubMode,                                   \
-                   unsigned long ulConfig))ROM_SPITABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataGetNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long * pulData))ROM_SPITABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataGet                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulData))ROM_SPITABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataPutNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SPITABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDataPut                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SPITABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOEnable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFODisable                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOLevelSet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulRxLevel))ROM_SPITABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIFIFOLevelGet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *pulTxLevel,                                 \
-                   unsigned long *pulRxLevel))ROM_SPITABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIWordCountSet                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulWordCount))ROM_SPITABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void(*pfnHandler)(void)))ROM_SPITABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            tBoolean bMasked))ROM_SPITABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_SPITABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDmaEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPIDmaDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPICSEnable                                                       \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPICSDisable                                                      \
-        ((void (*)(unsigned long ulBase))ROM_SPITABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SPITransfer                                                       \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned char *ucDout,                                     \
-                   unsigned char *ucDin,                                      \
-                   unsigned long ulSize,                                      \
-                   unsigned long ulFlags))ROM_SPITABLE[23])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the CAM API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraReset                                                       \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraParamsConfig                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulHSPol,                                     \
-                   unsigned long ulVSPol,                                     \
-                   unsigned long ulFlags))ROM_CAMERATABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraXClkConfig                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulCamClkIn,                                  \
-                   unsigned long ulXClk))ROM_CAMERATABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraXClkSet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned char bXClkFlags))ROM_CAMERATABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraDMAEnable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraDMADisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraThresholdSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulThreshold))ROM_CAMERATABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntRegister                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_CAMERATABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntUnregister                                               \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntDisable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntStatus                                                   \
-        ((unsigned long (*)(unsigned long ulBase))ROM_CAMERATABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraIntClear                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_CAMERATABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraCaptureStop                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   tBoolean bImmediate))ROM_CAMERATABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraCaptureStart                                                \
-        ((void (*)(unsigned long ulBase))ROM_CAMERATABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CameraBufferRead                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long *pBuffer,                                     \
-                   unsigned char ucSize))ROM_CAMERATABLE[15])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the FLASH API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashDisable                                                      \
-        ((void (*)(void))ROM_FLASHTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashErase                                                        \
-        ((long (*)(unsigned long ulAddress))ROM_FLASHTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashMassErase                                                    \
-        ((long (*)(void))ROM_FLASHTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashMassEraseNonBlocking                                         \
-        ((void (*)(void))ROM_FLASHTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashEraseNonBlocking                                             \
-        ((void (*)(unsigned long ulAddress))ROM_FLASHTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProgram                                                      \
-        ((long (*)(unsigned long *pulData,                                    \
-                   unsigned long ulAddress,                                   \
-                   unsigned long ulCount))ROM_FLASHTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProgramNonBlocking                                           \
-        ((long (*)(unsigned long *pulData,                                    \
-                   unsigned long ulAddress,                                   \
-                   unsigned long ulCount))ROM_FLASHTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntRegister                                                  \
-        ((void (*)(void (*pfnHandler)(void)))ROM_FLASHTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntUnregister                                                \
-        ((void (*)(void))ROM_FLASHTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntEnable                                                    \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntDisable                                                   \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntStatus                                                    \
-        ((unsigned long (*)(tBoolean bMasked))ROM_FLASHTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashIntClear                                                     \
-        ((void (*)(unsigned long ulIntFlags))ROM_FLASHTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_FlashProtectGet                                                   \
-        ((tFlashProtection (*)(unsigned long ulAddress))ROM_FLASHTABLE[13])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the Pin API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinModeSet                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                   unsigned long ulPinMode))ROM_PINTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinDirModeSet                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                   unsigned long ulPinIO))ROM_PINTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinDirModeGet                                                     \
-        ((unsigned long (*)(unsigned long ulPin))ROM_PINTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinModeGet                                                        \
-        ((unsigned long (*)(unsigned long ulPin))ROM_PINTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinConfigGet                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long  *pulPinStrength,                             \
-                   unsigned long *pulPinType))ROM_PINTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinConfigSet                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long  ulPinStrength,                               \
-                   unsigned long ulPinType))ROM_PINTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeUART                                                       \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeI2C                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeSPI                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeI2S                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeTimer                                                      \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeCamera                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeGPIO                                                       \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode,                                    \
-                   tBoolean bOpenDrain))ROM_PINTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeADC                                                        \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PinTypeSDHost                                                     \
-        ((void (*)(unsigned long ulPin,                                       \
-                  unsigned long ulPinMode))ROM_PINTABLE[14])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SYSTICK API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickEnable                                                     \
-        ((void (*)(void))ROM_SYSTICKTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickDisable                                                    \
-        ((void (*)(void))ROM_SYSTICKTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntRegister                                                \
-        ((void (*)(void (*pfnHandler)(void)))ROM_SYSTICKTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntUnregister                                              \
-        ((void (*)(void))ROM_SYSTICKTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntEnable                                                  \
-        ((void (*)(void))ROM_SYSTICKTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickIntDisable                                                 \
-        ((void (*)(void))ROM_SYSTICKTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickPeriodSet                                                  \
-        ((void (*)(unsigned long ulPeriod))ROM_SYSTICKTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickPeriodGet                                                  \
-        ((unsigned long (*)(void))ROM_SYSTICKTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SysTickValueGet                                                   \
-        ((unsigned long (*)(void))ROM_SYSTICKTABLE[8])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the UTILS API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_UtilsDelay                                                        \
-        ((void (*)(unsigned long ulCount))ROM_UTILSTABLE[0])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the I2S API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SEnable                                                         \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulMode))ROM_I2STABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataPut                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulData))ROM_I2STABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataPutNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulData))ROM_I2STABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataGet                                                        \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long *pulData))ROM_I2STABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SDataGetNonBlocking                                             \
-        ((long (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long *pulData))ROM_I2STABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SConfigSetExpClk                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulI2SClk,                                    \
-                   unsigned long ulBitClk,                                    \
-                   unsigned long ulConfig))ROM_I2STABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFOEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulTxLevel,                                   \
-                   unsigned long ulWordsPerTransfer))ROM_I2STABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFODisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFOEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulRxLevel,                                   \
-                   unsigned long ulWordsPerTransfer))ROM_I2STABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFODisable                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2STxFIFOStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SRxFIFOStatusGet                                                \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SSerializerConfig                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulDataLine,                                  \
-                   unsigned long ulSerMode,                                   \
-                   unsigned long ulInActState))ROM_I2STABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase))ROM_I2STABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulIntFlags))ROM_I2STABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_I2STABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_I2SIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase))ROM_I2STABLE[19])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the GPIO API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODirModeSet                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned long ulPinIO))ROM_GPIOTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODirModeGet                                                    \
-        ((unsigned long (*)(unsigned long ulPort,                             \
-                            unsigned char ucPin))ROM_GPIOTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntTypeSet                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned long ulIntType))ROM_GPIOTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODMATriggerEnable                                              \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIODMATriggerDisable                                             \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntTypeGet                                                    \
-        ((unsigned long (*)(unsigned long ulPort,                             \
-                            unsigned char ucPin))ROM_GPIOTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntEnable                                                     \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntDisable                                                    \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntStatus                                                     \
-        ((long (*)(unsigned long ulPort,                                      \
-                   tBoolean bMasked))ROM_GPIOTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntClear                                                      \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned long ulIntFlags))ROM_GPIOTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntRegister                                                   \
-        ((void (*)(unsigned long ulPort,                                      \
-                   void (*pfnIntHandler)(void)))ROM_GPIOTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOIntUnregister                                                 \
-        ((void (*)(unsigned long ulPort))ROM_GPIOTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOPinRead                                                       \
-        ((long (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins))ROM_GPIOTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_GPIOPinWrite                                                      \
-        ((void (*)(unsigned long ulPort,                                      \
-                   unsigned char ucPins,                                      \
-                   unsigned char ucVal))ROM_GPIOTABLE[13])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the AES API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_AESTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey1Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint32_t ui32Keysize))ROM_AESTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey2Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint32_t ui32Keysize))ROM_AESTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESKey3Set                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key))ROM_AESTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIVSet                                                          \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8IVdata))ROM_AESTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESTagRead                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8TagData))ROM_AESTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataLengthSet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint64_t ui64Length))ROM_AESTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESAuthDataLengthSet                                              \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_AESTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataReadNonBlocking                                            \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_AESTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataRead                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_AESTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataWriteNonBlocking                                           \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_AESTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_AESTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataProcess                                                    \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length))ROM_AESTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataMAC                                                        \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint32_t ui32Length,                                       \
-                   uint8_t *pui8Tag))ROM_AESTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDataProcessAE                                                  \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length,                                       \
-                   uint8_t *pui8AuthSrc,                                      \
-                   uint32_t ui32AuthLength,                                   \
-                   uint8_t *pui8Tag))ROM_AESTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntStatus                                                      \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_AESTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntDisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntClear                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_AESTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_AESTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_AESTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDMAEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_AESTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_AESDMADisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_AESTABLE[22])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the DES API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Config))ROM_DESTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataRead                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_DESTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataReadNonBlocking                                            \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest,                                         \
-                   uint8_t ui8Length))ROM_DESTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataProcess                                                    \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t *pui8Dest,                                         \
-                   uint32_t ui32Length))ROM_DESTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_DESTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataWriteNonBlocking                                           \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src,                                          \
-                   uint8_t ui8Length))ROM_DESTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDMADisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_DESTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDMAEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Flags))ROM_DESTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntClear                                                       \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntDisable                                                     \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntEnable                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_DESTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntRegister                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_DESTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntStatus                                                      \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_DESTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIntUnregister                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_DESTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESIVSet                                                          \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8IVdata))ROM_DESTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESKeySet                                                         \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key))ROM_DESTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_DESDataLengthSet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_DESTABLE[16])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SHAMD5 API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5ConfigSet                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Mode))ROM_SHAMD5TABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataProcess                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8DataSrc,                                      \
-                   uint32_t ui32DataLength,                                   \
-                   uint8_t *pui8HashResult))ROM_SHAMD5TABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataWrite                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataWriteNonBlocking                                        \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DMADisable                                                  \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DMAEnable                                                   \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5DataLengthSet                                               \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Length))ROM_SHAMD5TABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACKeySet                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACPPKeyGenerate                                           \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Key,                                          \
-                   uint8_t *pui8PPKey))ROM_SHAMD5TABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACPPKeySet                                                \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Src))ROM_SHAMD5TABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5HMACProcess                                                 \
-        ((bool (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8DataSrc,                                      \
-                   uint32_t ui32DataLength,                                   \
-                   uint8_t *pui8HashResult))ROM_SHAMD5TABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntClear                                                    \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntDisable                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntEnable                                                   \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32IntFlags))ROM_SHAMD5TABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntRegister                                                 \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   void(*pfnHandler)(void)))ROM_SHAMD5TABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntStatus                                                   \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       bool bMasked))ROM_SHAMD5TABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5IntUnregister                                               \
-        ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SHAMD5ResultRead                                                  \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint8_t *pui8Dest))ROM_SHAMD5TABLE[17])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the CRC API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCConfigSet                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32CRCConfig))ROM_CRCTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCDataProcess                                                    \
-        ((uint32_t (*)(uint32_t ui32Base,                                     \
-                       void *puiDataIn,                                       \
-                       uint32_t ui32DataLength,                               \
-                       uint32_t ui32Config))ROM_CRCTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCDataWrite                                                      \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Data))ROM_CRCTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCResultRead                                                     \
-        ((uint32_t (*)(uint32_t ui32Base))ROM_CRCTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_CRCSeedSet                                                        \
-        ((void (*)(uint32_t ui32Base,                                         \
-                   uint32_t ui32Seed))ROM_CRCTABLE[4])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the SDHOST API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostCmdReset                                                    \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostInit                                                        \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostCmdSend                                                     \
-        ((long (*)(unsigned long ulBase,                                      \
-                  unsigned long ulCmd,                                        \
-                   unsigned ulArg))ROM_SDHOSTTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntRegister                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   void (*pfnHandler)(void)))ROM_SDHOSTTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntUnregister                                               \
-        ((void (*)(unsigned long ulBase))ROM_SDHOSTTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntEnable                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntDisable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntStatus                                                   \
-        ((unsigned long (*)(unsigned long ulBase))ROM_SDHOSTTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostIntClear                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulIntFlags))ROM_SDHOSTTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostRespStatus                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_SDHOSTTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostRespGet                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulRespnse[4]))ROM_SDHOSTTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostBlockSizeSet                                                \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned short ulBlkSize))ROM_SDHOSTTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostBlockCountSet                                               \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned short ulBlkCount))ROM_SDHOSTTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataNonBlockingWrite                                        \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned long ulData))ROM_SDHOSTTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataNonBlockingRead                                         \
-        ((tBoolean (*)(unsigned long ulBase,                                  \
-                       unsigned long *pulData))ROM_SDHOSTTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataWrite                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulData))ROM_SDHOSTTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostDataRead                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long *ulData))ROM_SDHOSTTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_SDHostSetExpClk                                                   \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulSDHostClk,                                 \
-                   unsigned long ulCardClk))ROM_SDHOSTTABLE[17])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the PRCM API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMMCUReset                                                      \
-        ((void (*)(tBoolean bIncludeSubsystem))ROM_PRCMTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSysResetCauseGet                                              \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClkEnable                                           \
-        ((void (*)(unsigned long ulPeripheral,                                \
-                   unsigned long ulClkFlags))ROM_PRCMTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClkDisable                                          \
-        ((void (*)(unsigned long ulPeripheral,                                \
-                   unsigned long ulClkFlags))ROM_PRCMTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralReset                                               \
-        ((void (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralStatusGet                                           \
-        ((tBoolean (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMI2SClockFreqSet                                               \
-        ((void (*)(unsigned long ulI2CClkFreq))ROM_PRCMTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMPeripheralClockGet                                            \
-        ((unsigned long (*)(unsigned long ulPeripheral))ROM_PRCMTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSleepEnter                                                    \
-        ((void (*)(void))ROM_PRCMTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMDeepSleepEnter                                                \
-        ((void (*)(void))ROM_PRCMTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSRAMRetentionEnable                                           \
-        ((void (*)(unsigned long ulSramColSel,                                \
-                   unsigned long ulFlags))ROM_PRCMTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSRAMRetentionDisable                                          \
-        ((void (*)(unsigned long ulSramColSel,                                \
-                   unsigned long ulFlags))ROM_PRCMTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSEnter                                                     \
-        ((void (*)(void))ROM_PRCMTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSIntervalSet                                               \
-        ((void (*)(unsigned long ulTicks))ROM_PRCMTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupSourceEnable                                        \
-        ((void (*)(unsigned long ulLpdsWakeupSrc))ROM_PRCMTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupCauseGet                                            \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeUpGPIOSelect                                          \
-        ((void (*)(unsigned long ulGPIOPin,                                   \
-                   unsigned long ulType))ROM_PRCMTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSWakeupSourceDisable                                       \
-        ((void (*)(unsigned long ulLpdsWakeupSrc))ROM_PRCMTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateEnter                                                \
-        ((void (*)(void))ROM_PRCMTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupSourceEnable                                   \
-        ((void (*)(unsigned long ulHIBWakupSrc))ROM_PRCMTABLE[20])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupCauseGet                                       \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[21])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeUpGPIOSelect                                     \
-        ((void (*)(unsigned long ulMultiGPIOBitMap,                           \
-                   unsigned long ulType))ROM_PRCMTABLE[22])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateWakeupSourceDisable                                  \
-        ((void (*)(unsigned long ulHIBWakupSrc))ROM_PRCMTABLE[23])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMHibernateIntervalSet                                          \
-        ((void (*)(unsigned long long ullTicks))ROM_PRCMTABLE[24])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrGet                                                 \
-        ((unsigned long long (*)(void))ROM_PRCMTABLE[25])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrMatchSet                                            \
-        ((void (*)(unsigned long long ullTicks))ROM_PRCMTABLE[26])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMSlowClkCtrMatchGet                                            \
-        ((unsigned long long (*)(void))ROM_PRCMTABLE[27])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMOCRRegisterWrite                                              \
-        ((void (*)(unsigned char ucIndex,                                     \
-                   unsigned long ulRegValue))ROM_PRCMTABLE[28])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMOCRRegisterRead                                               \
-        ((unsigned long (*)(unsigned char ucIndex))ROM_PRCMTABLE[29])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntRegister                                                   \
-        ((void (*)(void (*pfnHandler)(void)))ROM_PRCMTABLE[30])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntUnregister                                                 \
-        ((void (*)(void))ROM_PRCMTABLE[31])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntEnable                                                     \
-        ((void (*)(unsigned long ulIntFlags))ROM_PRCMTABLE[32])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntDisable                                                    \
-        ((void (*)(unsigned long ulIntFlags))ROM_PRCMTABLE[33])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMIntStatus                                                     \
-        ((unsigned long (*)(void))ROM_PRCMTABLE[34])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCInUseSet                                                   \
-        ((void (*)(void))ROM_PRCMTABLE[35])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCInUseGet                                                   \
-        ((tBoolean (*)(void))ROM_PRCMTABLE[36])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCSet                                                        \
-        ((void (*)(unsigned long ulSecs,                                      \
-                   unsigned short usMsec))ROM_PRCMTABLE[37])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCGet                                                        \
-        ((void (*)(unsigned long *ulSecs,                                     \
-                   unsigned short *usMsec))ROM_PRCMTABLE[38])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCMatchSet                                                   \
-        ((void (*)(unsigned long ulSecs,                                      \
-                   unsigned short usMsec))ROM_PRCMTABLE[39])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMRTCMatchGet                                                   \
-        ((void (*)(unsigned long *ulSecs,                                     \
-                   unsigned short *usMsec))ROM_PRCMTABLE[40])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_PRCMLPDSRestoreInfoSet                                            \
-        ((void (*)(unsigned long ulRestoreSP,                                 \
-                   unsigned long ulRestorePC))ROM_PRCMTABLE[41])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the HWSPINLOCK API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockAcquire                                                 \
-        ((void (*)(uint32_t ui32LockID))ROM_HWSPINLOCKTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockTryAcquire                                              \
-        ((int32_t (*)(uint32_t ui32LockID,                                    \
-                      uint32_t ui32Retry))ROM_HWSPINLOCKTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockRelease                                                 \
-        ((void (*)(uint32_t ui32LockID))ROM_HWSPINLOCKTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_HwSpinLockTest                                                    \
-        ((uint32_t (*)(uint32_t ui32LockID,                                   \
-                       bool bCurrentStatus))ROM_HWSPINLOCKTABLE[3])
-#endif
-
-//*****************************************************************************
-//
-// Macros for calling ROM functions in the ADC API.
-//
-//*****************************************************************************
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCEnable                                                         \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[0])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDisable                                                        \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[1])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelEnable                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulChannel))ROM_ADCTABLE[2])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelDisable                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                  unsigned long ulChannel))ROM_ADCTABLE[3])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntRegister                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   void (*pfnHandler)(void)))ROM_ADCTABLE[4])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntUnregister                                                  \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[5])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[6])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntDisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[7])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntStatus                                                      \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                           unsigned long ulChannel))ROM_ADCTABLE[8])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCIntClear                                                       \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned long ulIntFlags))ROM_ADCTABLE[9])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDMAEnable                                                      \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[10])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCDMADisable                                                     \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel))ROM_ADCTABLE[11])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannelGainSet                                                 \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulChannel,                                   \
-                   unsigned char ucGain))ROM_ADCTABLE[12])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCChannleGainGet                                                 \
-        ((unsigned char (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[13])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerConfig                                                    \
-        ((void (*)(unsigned long ulBase,                                      \
-                   unsigned long ulValue))ROM_ADCTABLE[14])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerEnable                                                    \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[15])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerDisable                                                   \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[16])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerReset                                                     \
-        ((void (*)(unsigned long ulBase))ROM_ADCTABLE[17])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCTimerValueGet                                                  \
-        ((unsigned long (*)(unsigned long ulBase))ROM_ADCTABLE[18])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCFIFOLvlGet                                                     \
-        ((unsigned char (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[19])
-#endif
-#if defined(TARGET_IS_CC3200)
-#define ROM_ADCFIFORead                                                       \
-        ((unsigned long (*)(unsigned long ulBase,                             \
-                            unsigned long ulChannel))ROM_ADCTABLE[20])
-#endif
-
-#endif // __ROM_H__
diff --git a/ports/cc3200/hal/rom_map.h b/ports/cc3200/hal/rom_map.h
deleted file mode 100644
index 86a6c75fca2e6..0000000000000
--- a/ports/cc3200/hal/rom_map.h
+++ /dev/null
@@ -1,3177 +0,0 @@
-//*****************************************************************************
-//
-//  rom_map.h
-//
-//  Macros to facilitate calling functions in the ROM when they are
-//  available and in flash otherwise.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// THIS IS AN AUTO-GENERATED FILE.  DO NOT EDIT BY HAND.
-//
-//*****************************************************************************
-
-#ifndef __ROM_MAP_H__
-#define __ROM_MAP_H__
-#ifndef DEBUG
-#include "rom.h"
-#endif
-#include "rom_patch.h"
-
-//*****************************************************************************
-//
-// Macros for the Interrupt API.
-//
-//*****************************************************************************
-#ifdef ROM_IntEnable
-#define MAP_IntEnable \
-        ROM_IntEnable
-#else
-#define MAP_IntEnable \
-        IntEnable
-#endif
-#ifdef ROM_IntMasterEnable
-#define MAP_IntMasterEnable \
-        ROM_IntMasterEnable
-#else
-#define MAP_IntMasterEnable \
-        IntMasterEnable
-#endif
-#ifdef ROM_IntMasterDisable
-#define MAP_IntMasterDisable \
-        ROM_IntMasterDisable
-#else
-#define MAP_IntMasterDisable \
-        IntMasterDisable
-#endif
-#ifdef ROM_IntDisable
-#define MAP_IntDisable \
-        ROM_IntDisable
-#else
-#define MAP_IntDisable \
-        IntDisable
-#endif
-#ifdef ROM_IntPriorityGroupingSet
-#define MAP_IntPriorityGroupingSet \
-        ROM_IntPriorityGroupingSet
-#else
-#define MAP_IntPriorityGroupingSet \
-        IntPriorityGroupingSet
-#endif
-#ifdef ROM_IntPriorityGroupingGet
-#define MAP_IntPriorityGroupingGet \
-        ROM_IntPriorityGroupingGet
-#else
-#define MAP_IntPriorityGroupingGet \
-        IntPriorityGroupingGet
-#endif
-#ifdef ROM_IntPrioritySet
-#define MAP_IntPrioritySet \
-        ROM_IntPrioritySet
-#else
-#define MAP_IntPrioritySet \
-        IntPrioritySet
-#endif
-#ifdef ROM_IntPriorityGet
-#define MAP_IntPriorityGet \
-        ROM_IntPriorityGet
-#else
-#define MAP_IntPriorityGet \
-        IntPriorityGet
-#endif
-#ifdef ROM_IntPendSet
-#define MAP_IntPendSet \
-        ROM_IntPendSet
-#else
-#define MAP_IntPendSet \
-        IntPendSet
-#endif
-#ifdef ROM_IntPendClear
-#define MAP_IntPendClear \
-        ROM_IntPendClear
-#else
-#define MAP_IntPendClear \
-        IntPendClear
-#endif
-#ifdef ROM_IntPriorityMaskSet
-#define MAP_IntPriorityMaskSet \
-        ROM_IntPriorityMaskSet
-#else
-#define MAP_IntPriorityMaskSet \
-        IntPriorityMaskSet
-#endif
-#ifdef ROM_IntPriorityMaskGet
-#define MAP_IntPriorityMaskGet \
-        ROM_IntPriorityMaskGet
-#else
-#define MAP_IntPriorityMaskGet \
-        IntPriorityMaskGet
-#endif
-#ifdef ROM_IntRegister
-#define MAP_IntRegister \
-        ROM_IntRegister
-#else
-#define MAP_IntRegister \
-        IntRegister
-#endif
-#ifdef ROM_IntUnregister
-#define MAP_IntUnregister \
-        ROM_IntUnregister
-#else
-#define MAP_IntUnregister \
-        IntUnregister
-#endif
-#ifdef ROM_IntVTableBaseSet
-#define MAP_IntVTableBaseSet \
-        ROM_IntVTableBaseSet
-#else
-#define MAP_IntVTableBaseSet \
-        IntVTableBaseSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Timer API.
-//
-//*****************************************************************************
-#ifdef ROM_TimerEnable
-#define MAP_TimerEnable \
-        ROM_TimerEnable
-#else
-#define MAP_TimerEnable \
-        TimerEnable
-#endif
-#ifdef ROM_TimerDisable
-#define MAP_TimerDisable \
-        ROM_TimerDisable
-#else
-#define MAP_TimerDisable \
-        TimerDisable
-#endif
-#ifdef ROM_TimerConfigure
-#define MAP_TimerConfigure \
-        ROM_TimerConfigure
-#else
-#define MAP_TimerConfigure \
-        TimerConfigure
-#endif
-#ifdef ROM_TimerControlLevel
-#define MAP_TimerControlLevel \
-        ROM_TimerControlLevel
-#else
-#define MAP_TimerControlLevel \
-        TimerControlLevel
-#endif
-#ifdef ROM_TimerControlEvent
-#define MAP_TimerControlEvent \
-        ROM_TimerControlEvent
-#else
-#define MAP_TimerControlEvent \
-        TimerControlEvent
-#endif
-#ifdef ROM_TimerControlStall
-#define MAP_TimerControlStall \
-        ROM_TimerControlStall
-#else
-#define MAP_TimerControlStall \
-        TimerControlStall
-#endif
-#ifdef ROM_TimerPrescaleSet
-#define MAP_TimerPrescaleSet \
-        ROM_TimerPrescaleSet
-#else
-#define MAP_TimerPrescaleSet \
-        TimerPrescaleSet
-#endif
-#ifdef ROM_TimerPrescaleGet
-#define MAP_TimerPrescaleGet \
-        ROM_TimerPrescaleGet
-#else
-#define MAP_TimerPrescaleGet \
-        TimerPrescaleGet
-#endif
-#ifdef ROM_TimerPrescaleMatchSet
-#define MAP_TimerPrescaleMatchSet \
-        ROM_TimerPrescaleMatchSet
-#else
-#define MAP_TimerPrescaleMatchSet \
-        TimerPrescaleMatchSet
-#endif
-#ifdef ROM_TimerPrescaleMatchGet
-#define MAP_TimerPrescaleMatchGet \
-        ROM_TimerPrescaleMatchGet
-#else
-#define MAP_TimerPrescaleMatchGet \
-        TimerPrescaleMatchGet
-#endif
-#ifdef ROM_TimerLoadSet
-#define MAP_TimerLoadSet \
-        ROM_TimerLoadSet
-#else
-#define MAP_TimerLoadSet \
-        TimerLoadSet
-#endif
-#ifdef ROM_TimerLoadGet
-#define MAP_TimerLoadGet \
-        ROM_TimerLoadGet
-#else
-#define MAP_TimerLoadGet \
-        TimerLoadGet
-#endif
-#ifdef ROM_TimerValueGet
-#define MAP_TimerValueGet \
-        ROM_TimerValueGet
-#else
-#define MAP_TimerValueGet \
-        TimerValueGet
-#endif
-#ifdef ROM_TimerMatchSet
-#define MAP_TimerMatchSet \
-        ROM_TimerMatchSet
-#else
-#define MAP_TimerMatchSet \
-        TimerMatchSet
-#endif
-#ifdef ROM_TimerMatchGet
-#define MAP_TimerMatchGet \
-        ROM_TimerMatchGet
-#else
-#define MAP_TimerMatchGet \
-        TimerMatchGet
-#endif
-#ifdef ROM_TimerIntRegister
-#define MAP_TimerIntRegister \
-        ROM_TimerIntRegister
-#else
-#define MAP_TimerIntRegister \
-        TimerIntRegister
-#endif
-#ifdef ROM_TimerIntUnregister
-#define MAP_TimerIntUnregister \
-        ROM_TimerIntUnregister
-#else
-#define MAP_TimerIntUnregister \
-        TimerIntUnregister
-#endif
-#ifdef ROM_TimerIntEnable
-#define MAP_TimerIntEnable \
-        ROM_TimerIntEnable
-#else
-#define MAP_TimerIntEnable \
-        TimerIntEnable
-#endif
-#ifdef ROM_TimerIntDisable
-#define MAP_TimerIntDisable \
-        ROM_TimerIntDisable
-#else
-#define MAP_TimerIntDisable \
-        TimerIntDisable
-#endif
-#ifdef ROM_TimerIntStatus
-#define MAP_TimerIntStatus \
-        ROM_TimerIntStatus
-#else
-#define MAP_TimerIntStatus \
-        TimerIntStatus
-#endif
-#ifdef ROM_TimerIntClear
-#define MAP_TimerIntClear \
-        ROM_TimerIntClear
-#else
-#define MAP_TimerIntClear \
-        TimerIntClear
-#endif
-#ifdef ROM_TimerDMAEventSet
-#define MAP_TimerDMAEventSet \
-        ROM_TimerDMAEventSet
-#else
-#define MAP_TimerDMAEventSet \
-        TimerDMAEventSet
-#endif
-#ifdef ROM_TimerDMAEventGet
-#define MAP_TimerDMAEventGet \
-        ROM_TimerDMAEventGet
-#else
-#define MAP_TimerDMAEventGet \
-        TimerDMAEventGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the UART API.
-//
-//*****************************************************************************
-#ifdef ROM_UARTParityModeSet
-#define MAP_UARTParityModeSet \
-        ROM_UARTParityModeSet
-#else
-#define MAP_UARTParityModeSet \
-        UARTParityModeSet
-#endif
-#ifdef ROM_UARTParityModeGet
-#define MAP_UARTParityModeGet \
-        ROM_UARTParityModeGet
-#else
-#define MAP_UARTParityModeGet \
-        UARTParityModeGet
-#endif
-#ifdef ROM_UARTFIFOLevelSet
-#define MAP_UARTFIFOLevelSet \
-        ROM_UARTFIFOLevelSet
-#else
-#define MAP_UARTFIFOLevelSet \
-        UARTFIFOLevelSet
-#endif
-#ifdef ROM_UARTFIFOLevelGet
-#define MAP_UARTFIFOLevelGet \
-        ROM_UARTFIFOLevelGet
-#else
-#define MAP_UARTFIFOLevelGet \
-        UARTFIFOLevelGet
-#endif
-#ifdef ROM_UARTConfigSetExpClk
-#define MAP_UARTConfigSetExpClk \
-        ROM_UARTConfigSetExpClk
-#else
-#define MAP_UARTConfigSetExpClk \
-        UARTConfigSetExpClk
-#endif
-#ifdef ROM_UARTConfigGetExpClk
-#define MAP_UARTConfigGetExpClk \
-        ROM_UARTConfigGetExpClk
-#else
-#define MAP_UARTConfigGetExpClk \
-        UARTConfigGetExpClk
-#endif
-#ifdef ROM_UARTEnable
-#define MAP_UARTEnable \
-        ROM_UARTEnable
-#else
-#define MAP_UARTEnable \
-        UARTEnable
-#endif
-#ifdef ROM_UARTDisable
-#define MAP_UARTDisable \
-        ROM_UARTDisable
-#else
-#define MAP_UARTDisable \
-        UARTDisable
-#endif
-#ifdef ROM_UARTFIFOEnable
-#define MAP_UARTFIFOEnable \
-        ROM_UARTFIFOEnable
-#else
-#define MAP_UARTFIFOEnable \
-        UARTFIFOEnable
-#endif
-#ifdef ROM_UARTFIFODisable
-#define MAP_UARTFIFODisable \
-        ROM_UARTFIFODisable
-#else
-#define MAP_UARTFIFODisable \
-        UARTFIFODisable
-#endif
-#ifdef ROM_UARTCharsAvail
-#define MAP_UARTCharsAvail \
-        ROM_UARTCharsAvail
-#else
-#define MAP_UARTCharsAvail \
-        UARTCharsAvail
-#endif
-#ifdef ROM_UARTSpaceAvail
-#define MAP_UARTSpaceAvail \
-        ROM_UARTSpaceAvail
-#else
-#define MAP_UARTSpaceAvail \
-        UARTSpaceAvail
-#endif
-#ifdef ROM_UARTCharGetNonBlocking
-#define MAP_UARTCharGetNonBlocking \
-        ROM_UARTCharGetNonBlocking
-#else
-#define MAP_UARTCharGetNonBlocking \
-        UARTCharGetNonBlocking
-#endif
-#ifdef ROM_UARTCharGet
-#define MAP_UARTCharGet \
-        ROM_UARTCharGet
-#else
-#define MAP_UARTCharGet \
-        UARTCharGet
-#endif
-#ifdef ROM_UARTCharPutNonBlocking
-#define MAP_UARTCharPutNonBlocking \
-        ROM_UARTCharPutNonBlocking
-#else
-#define MAP_UARTCharPutNonBlocking \
-        UARTCharPutNonBlocking
-#endif
-#ifdef ROM_UARTCharPut
-#define MAP_UARTCharPut \
-        ROM_UARTCharPut
-#else
-#define MAP_UARTCharPut \
-        UARTCharPut
-#endif
-#ifdef ROM_UARTBreakCtl
-#define MAP_UARTBreakCtl \
-        ROM_UARTBreakCtl
-#else
-#define MAP_UARTBreakCtl \
-        UARTBreakCtl
-#endif
-#ifdef ROM_UARTBusy
-#define MAP_UARTBusy \
-        ROM_UARTBusy
-#else
-#define MAP_UARTBusy \
-        UARTBusy
-#endif
-#ifdef ROM_UARTIntRegister
-#define MAP_UARTIntRegister \
-        ROM_UARTIntRegister
-#else
-#define MAP_UARTIntRegister \
-        UARTIntRegister
-#endif
-#ifdef ROM_UARTIntUnregister
-#define MAP_UARTIntUnregister \
-        ROM_UARTIntUnregister
-#else
-#define MAP_UARTIntUnregister \
-        UARTIntUnregister
-#endif
-#ifdef ROM_UARTIntEnable
-#define MAP_UARTIntEnable \
-        ROM_UARTIntEnable
-#else
-#define MAP_UARTIntEnable \
-        UARTIntEnable
-#endif
-#ifdef ROM_UARTIntDisable
-#define MAP_UARTIntDisable \
-        ROM_UARTIntDisable
-#else
-#define MAP_UARTIntDisable \
-        UARTIntDisable
-#endif
-#ifdef ROM_UARTIntStatus
-#define MAP_UARTIntStatus \
-        ROM_UARTIntStatus
-#else
-#define MAP_UARTIntStatus \
-        UARTIntStatus
-#endif
-#ifdef ROM_UARTIntClear
-#define MAP_UARTIntClear \
-        ROM_UARTIntClear
-#else
-#define MAP_UARTIntClear \
-        UARTIntClear
-#endif
-#ifdef ROM_UARTDMAEnable
-#define MAP_UARTDMAEnable \
-        ROM_UARTDMAEnable
-#else
-#define MAP_UARTDMAEnable \
-        UARTDMAEnable
-#endif
-#ifdef ROM_UARTDMADisable
-#define MAP_UARTDMADisable \
-        ROM_UARTDMADisable
-#else
-#define MAP_UARTDMADisable \
-        UARTDMADisable
-#endif
-#ifdef ROM_UARTRxErrorGet
-#define MAP_UARTRxErrorGet \
-        ROM_UARTRxErrorGet
-#else
-#define MAP_UARTRxErrorGet \
-        UARTRxErrorGet
-#endif
-#ifdef ROM_UARTRxErrorClear
-#define MAP_UARTRxErrorClear \
-        ROM_UARTRxErrorClear
-#else
-#define MAP_UARTRxErrorClear \
-        UARTRxErrorClear
-#endif
-#ifdef ROM_UARTModemControlSet
-#define MAP_UARTModemControlSet \
-        ROM_UARTModemControlSet
-#else
-#define MAP_UARTModemControlSet \
-        UARTModemControlSet
-#endif
-#ifdef ROM_UARTModemControlClear
-#define MAP_UARTModemControlClear \
-        ROM_UARTModemControlClear
-#else
-#define MAP_UARTModemControlClear \
-        UARTModemControlClear
-#endif
-#ifdef ROM_UARTModemControlGet
-#define MAP_UARTModemControlGet \
-        ROM_UARTModemControlGet
-#else
-#define MAP_UARTModemControlGet \
-        UARTModemControlGet
-#endif
-#ifdef ROM_UARTModemStatusGet
-#define MAP_UARTModemStatusGet \
-        ROM_UARTModemStatusGet
-#else
-#define MAP_UARTModemStatusGet \
-        UARTModemStatusGet
-#endif
-#ifdef ROM_UARTFlowControlSet
-#define MAP_UARTFlowControlSet \
-        ROM_UARTFlowControlSet
-#else
-#define MAP_UARTFlowControlSet \
-        UARTFlowControlSet
-#endif
-#ifdef ROM_UARTFlowControlGet
-#define MAP_UARTFlowControlGet \
-        ROM_UARTFlowControlGet
-#else
-#define MAP_UARTFlowControlGet \
-        UARTFlowControlGet
-#endif
-#ifdef ROM_UARTTxIntModeSet
-#define MAP_UARTTxIntModeSet \
-        ROM_UARTTxIntModeSet
-#else
-#define MAP_UARTTxIntModeSet \
-        UARTTxIntModeSet
-#endif
-#ifdef ROM_UARTTxIntModeGet
-#define MAP_UARTTxIntModeGet \
-        ROM_UARTTxIntModeGet
-#else
-#define MAP_UARTTxIntModeGet \
-        UARTTxIntModeGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the uDMA API.
-//
-//*****************************************************************************
-#ifdef ROM_uDMAChannelTransferSet
-#define MAP_uDMAChannelTransferSet \
-        ROM_uDMAChannelTransferSet
-#else
-#define MAP_uDMAChannelTransferSet \
-        uDMAChannelTransferSet
-#endif
-#ifdef ROM_uDMAEnable
-#define MAP_uDMAEnable \
-        ROM_uDMAEnable
-#else
-#define MAP_uDMAEnable \
-        uDMAEnable
-#endif
-#ifdef ROM_uDMADisable
-#define MAP_uDMADisable \
-        ROM_uDMADisable
-#else
-#define MAP_uDMADisable \
-        uDMADisable
-#endif
-#ifdef ROM_uDMAErrorStatusGet
-#define MAP_uDMAErrorStatusGet \
-        ROM_uDMAErrorStatusGet
-#else
-#define MAP_uDMAErrorStatusGet \
-        uDMAErrorStatusGet
-#endif
-#ifdef ROM_uDMAErrorStatusClear
-#define MAP_uDMAErrorStatusClear \
-        ROM_uDMAErrorStatusClear
-#else
-#define MAP_uDMAErrorStatusClear \
-        uDMAErrorStatusClear
-#endif
-#ifdef ROM_uDMAChannelEnable
-#define MAP_uDMAChannelEnable \
-        ROM_uDMAChannelEnable
-#else
-#define MAP_uDMAChannelEnable \
-        uDMAChannelEnable
-#endif
-#ifdef ROM_uDMAChannelDisable
-#define MAP_uDMAChannelDisable \
-        ROM_uDMAChannelDisable
-#else
-#define MAP_uDMAChannelDisable \
-        uDMAChannelDisable
-#endif
-#ifdef ROM_uDMAChannelIsEnabled
-#define MAP_uDMAChannelIsEnabled \
-        ROM_uDMAChannelIsEnabled
-#else
-#define MAP_uDMAChannelIsEnabled \
-        uDMAChannelIsEnabled
-#endif
-#ifdef ROM_uDMAControlBaseSet
-#define MAP_uDMAControlBaseSet \
-        ROM_uDMAControlBaseSet
-#else
-#define MAP_uDMAControlBaseSet \
-        uDMAControlBaseSet
-#endif
-#ifdef ROM_uDMAControlBaseGet
-#define MAP_uDMAControlBaseGet \
-        ROM_uDMAControlBaseGet
-#else
-#define MAP_uDMAControlBaseGet \
-        uDMAControlBaseGet
-#endif
-#ifdef ROM_uDMAChannelRequest
-#define MAP_uDMAChannelRequest \
-        ROM_uDMAChannelRequest
-#else
-#define MAP_uDMAChannelRequest \
-        uDMAChannelRequest
-#endif
-#ifdef ROM_uDMAChannelAttributeEnable
-#define MAP_uDMAChannelAttributeEnable \
-        ROM_uDMAChannelAttributeEnable
-#else
-#define MAP_uDMAChannelAttributeEnable \
-        uDMAChannelAttributeEnable
-#endif
-#ifdef ROM_uDMAChannelAttributeDisable
-#define MAP_uDMAChannelAttributeDisable \
-        ROM_uDMAChannelAttributeDisable
-#else
-#define MAP_uDMAChannelAttributeDisable \
-        uDMAChannelAttributeDisable
-#endif
-#ifdef ROM_uDMAChannelAttributeGet
-#define MAP_uDMAChannelAttributeGet \
-        ROM_uDMAChannelAttributeGet
-#else
-#define MAP_uDMAChannelAttributeGet \
-        uDMAChannelAttributeGet
-#endif
-#ifdef ROM_uDMAChannelControlSet
-#define MAP_uDMAChannelControlSet \
-        ROM_uDMAChannelControlSet
-#else
-#define MAP_uDMAChannelControlSet \
-        uDMAChannelControlSet
-#endif
-#ifdef ROM_uDMAChannelSizeGet
-#define MAP_uDMAChannelSizeGet \
-        ROM_uDMAChannelSizeGet
-#else
-#define MAP_uDMAChannelSizeGet \
-        uDMAChannelSizeGet
-#endif
-#ifdef ROM_uDMAChannelModeGet
-#define MAP_uDMAChannelModeGet \
-        ROM_uDMAChannelModeGet
-#else
-#define MAP_uDMAChannelModeGet \
-        uDMAChannelModeGet
-#endif
-#ifdef ROM_uDMAIntStatus
-#define MAP_uDMAIntStatus \
-        ROM_uDMAIntStatus
-#else
-#define MAP_uDMAIntStatus \
-        uDMAIntStatus
-#endif
-#ifdef ROM_uDMAIntClear
-#define MAP_uDMAIntClear \
-        ROM_uDMAIntClear
-#else
-#define MAP_uDMAIntClear \
-        uDMAIntClear
-#endif
-#ifdef ROM_uDMAControlAlternateBaseGet
-#define MAP_uDMAControlAlternateBaseGet \
-        ROM_uDMAControlAlternateBaseGet
-#else
-#define MAP_uDMAControlAlternateBaseGet \
-        uDMAControlAlternateBaseGet
-#endif
-#ifdef ROM_uDMAChannelScatterGatherSet
-#define MAP_uDMAChannelScatterGatherSet \
-        ROM_uDMAChannelScatterGatherSet
-#else
-#define MAP_uDMAChannelScatterGatherSet \
-        uDMAChannelScatterGatherSet
-#endif
-#ifdef ROM_uDMAChannelAssign
-#define MAP_uDMAChannelAssign \
-        ROM_uDMAChannelAssign
-#else
-#define MAP_uDMAChannelAssign \
-        uDMAChannelAssign
-#endif
-#ifdef ROM_uDMAIntRegister
-#define MAP_uDMAIntRegister \
-        ROM_uDMAIntRegister
-#else
-#define MAP_uDMAIntRegister \
-        uDMAIntRegister
-#endif
-#ifdef ROM_uDMAIntUnregister
-#define MAP_uDMAIntUnregister \
-        ROM_uDMAIntUnregister
-#else
-#define MAP_uDMAIntUnregister \
-        uDMAIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Watchdog API.
-//
-//*****************************************************************************
-#ifdef ROM_WatchdogIntClear
-#define MAP_WatchdogIntClear \
-        ROM_WatchdogIntClear
-#else
-#define MAP_WatchdogIntClear \
-        WatchdogIntClear
-#endif
-#ifdef ROM_WatchdogRunning
-#define MAP_WatchdogRunning \
-        ROM_WatchdogRunning
-#else
-#define MAP_WatchdogRunning \
-        WatchdogRunning
-#endif
-#ifdef ROM_WatchdogEnable
-#define MAP_WatchdogEnable \
-        ROM_WatchdogEnable
-#else
-#define MAP_WatchdogEnable \
-        WatchdogEnable
-#endif
-#ifdef ROM_WatchdogLock
-#define MAP_WatchdogLock \
-        ROM_WatchdogLock
-#else
-#define MAP_WatchdogLock \
-        WatchdogLock
-#endif
-#ifdef ROM_WatchdogUnlock
-#define MAP_WatchdogUnlock \
-        ROM_WatchdogUnlock
-#else
-#define MAP_WatchdogUnlock \
-        WatchdogUnlock
-#endif
-#ifdef ROM_WatchdogLockState
-#define MAP_WatchdogLockState \
-        ROM_WatchdogLockState
-#else
-#define MAP_WatchdogLockState \
-        WatchdogLockState
-#endif
-#ifdef ROM_WatchdogReloadSet
-#define MAP_WatchdogReloadSet \
-        ROM_WatchdogReloadSet
-#else
-#define MAP_WatchdogReloadSet \
-        WatchdogReloadSet
-#endif
-#ifdef ROM_WatchdogReloadGet
-#define MAP_WatchdogReloadGet \
-        ROM_WatchdogReloadGet
-#else
-#define MAP_WatchdogReloadGet \
-        WatchdogReloadGet
-#endif
-#ifdef ROM_WatchdogValueGet
-#define MAP_WatchdogValueGet \
-        ROM_WatchdogValueGet
-#else
-#define MAP_WatchdogValueGet \
-        WatchdogValueGet
-#endif
-#ifdef ROM_WatchdogIntStatus
-#define MAP_WatchdogIntStatus \
-        ROM_WatchdogIntStatus
-#else
-#define MAP_WatchdogIntStatus \
-        WatchdogIntStatus
-#endif
-#ifdef ROM_WatchdogStallEnable
-#define MAP_WatchdogStallEnable \
-        ROM_WatchdogStallEnable
-#else
-#define MAP_WatchdogStallEnable \
-        WatchdogStallEnable
-#endif
-#ifdef ROM_WatchdogStallDisable
-#define MAP_WatchdogStallDisable \
-        ROM_WatchdogStallDisable
-#else
-#define MAP_WatchdogStallDisable \
-        WatchdogStallDisable
-#endif
-#ifdef ROM_WatchdogIntRegister
-#define MAP_WatchdogIntRegister \
-        ROM_WatchdogIntRegister
-#else
-#define MAP_WatchdogIntRegister \
-        WatchdogIntRegister
-#endif
-#ifdef ROM_WatchdogIntUnregister
-#define MAP_WatchdogIntUnregister \
-        ROM_WatchdogIntUnregister
-#else
-#define MAP_WatchdogIntUnregister \
-        WatchdogIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the I2C API.
-//
-//*****************************************************************************
-#ifdef ROM_I2CIntRegister
-#define MAP_I2CIntRegister \
-        ROM_I2CIntRegister
-#else
-#define MAP_I2CIntRegister \
-        I2CIntRegister
-#endif
-#ifdef ROM_I2CIntUnregister
-#define MAP_I2CIntUnregister \
-        ROM_I2CIntUnregister
-#else
-#define MAP_I2CIntUnregister \
-        I2CIntUnregister
-#endif
-#ifdef ROM_I2CTxFIFOConfigSet
-#define MAP_I2CTxFIFOConfigSet \
-        ROM_I2CTxFIFOConfigSet
-#else
-#define MAP_I2CTxFIFOConfigSet \
-        I2CTxFIFOConfigSet
-#endif
-#ifdef ROM_I2CTxFIFOFlush
-#define MAP_I2CTxFIFOFlush \
-        ROM_I2CTxFIFOFlush
-#else
-#define MAP_I2CTxFIFOFlush \
-        I2CTxFIFOFlush
-#endif
-#ifdef ROM_I2CRxFIFOConfigSet
-#define MAP_I2CRxFIFOConfigSet \
-        ROM_I2CRxFIFOConfigSet
-#else
-#define MAP_I2CRxFIFOConfigSet \
-        I2CRxFIFOConfigSet
-#endif
-#ifdef ROM_I2CRxFIFOFlush
-#define MAP_I2CRxFIFOFlush \
-        ROM_I2CRxFIFOFlush
-#else
-#define MAP_I2CRxFIFOFlush \
-        I2CRxFIFOFlush
-#endif
-#ifdef ROM_I2CFIFOStatus
-#define MAP_I2CFIFOStatus \
-        ROM_I2CFIFOStatus
-#else
-#define MAP_I2CFIFOStatus \
-        I2CFIFOStatus
-#endif
-#ifdef ROM_I2CFIFODataPut
-#define MAP_I2CFIFODataPut \
-        ROM_I2CFIFODataPut
-#else
-#define MAP_I2CFIFODataPut \
-        I2CFIFODataPut
-#endif
-#ifdef ROM_I2CFIFODataPutNonBlocking
-#define MAP_I2CFIFODataPutNonBlocking \
-        ROM_I2CFIFODataPutNonBlocking
-#else
-#define MAP_I2CFIFODataPutNonBlocking \
-        I2CFIFODataPutNonBlocking
-#endif
-#ifdef ROM_I2CFIFODataGet
-#define MAP_I2CFIFODataGet \
-        ROM_I2CFIFODataGet
-#else
-#define MAP_I2CFIFODataGet \
-        I2CFIFODataGet
-#endif
-#ifdef ROM_I2CFIFODataGetNonBlocking
-#define MAP_I2CFIFODataGetNonBlocking \
-        ROM_I2CFIFODataGetNonBlocking
-#else
-#define MAP_I2CFIFODataGetNonBlocking \
-        I2CFIFODataGetNonBlocking
-#endif
-#ifdef ROM_I2CMasterBurstLengthSet
-#define MAP_I2CMasterBurstLengthSet \
-        ROM_I2CMasterBurstLengthSet
-#else
-#define MAP_I2CMasterBurstLengthSet \
-        I2CMasterBurstLengthSet
-#endif
-#ifdef ROM_I2CMasterBurstCountGet
-#define MAP_I2CMasterBurstCountGet \
-        ROM_I2CMasterBurstCountGet
-#else
-#define MAP_I2CMasterBurstCountGet \
-        I2CMasterBurstCountGet
-#endif
-#ifdef ROM_I2CMasterGlitchFilterConfigSet
-#define MAP_I2CMasterGlitchFilterConfigSet \
-        ROM_I2CMasterGlitchFilterConfigSet
-#else
-#define MAP_I2CMasterGlitchFilterConfigSet \
-        I2CMasterGlitchFilterConfigSet
-#endif
-#ifdef ROM_I2CSlaveFIFOEnable
-#define MAP_I2CSlaveFIFOEnable \
-        ROM_I2CSlaveFIFOEnable
-#else
-#define MAP_I2CSlaveFIFOEnable \
-        I2CSlaveFIFOEnable
-#endif
-#ifdef ROM_I2CSlaveFIFODisable
-#define MAP_I2CSlaveFIFODisable \
-        ROM_I2CSlaveFIFODisable
-#else
-#define MAP_I2CSlaveFIFODisable \
-        I2CSlaveFIFODisable
-#endif
-#ifdef ROM_I2CMasterBusBusy
-#define MAP_I2CMasterBusBusy \
-        ROM_I2CMasterBusBusy
-#else
-#define MAP_I2CMasterBusBusy \
-        I2CMasterBusBusy
-#endif
-#ifdef ROM_I2CMasterBusy
-#define MAP_I2CMasterBusy \
-        ROM_I2CMasterBusy
-#else
-#define MAP_I2CMasterBusy \
-        I2CMasterBusy
-#endif
-#ifdef ROM_I2CMasterControl
-#define MAP_I2CMasterControl \
-        ROM_I2CMasterControl
-#else
-#define MAP_I2CMasterControl \
-        I2CMasterControl
-#endif
-#ifdef ROM_I2CMasterDataGet
-#define MAP_I2CMasterDataGet \
-        ROM_I2CMasterDataGet
-#else
-#define MAP_I2CMasterDataGet \
-        I2CMasterDataGet
-#endif
-#ifdef ROM_I2CMasterDataPut
-#define MAP_I2CMasterDataPut \
-        ROM_I2CMasterDataPut
-#else
-#define MAP_I2CMasterDataPut \
-        I2CMasterDataPut
-#endif
-#ifdef ROM_I2CMasterDisable
-#define MAP_I2CMasterDisable \
-        ROM_I2CMasterDisable
-#else
-#define MAP_I2CMasterDisable \
-        I2CMasterDisable
-#endif
-#ifdef ROM_I2CMasterEnable
-#define MAP_I2CMasterEnable \
-        ROM_I2CMasterEnable
-#else
-#define MAP_I2CMasterEnable \
-        I2CMasterEnable
-#endif
-#ifdef ROM_I2CMasterErr
-#define MAP_I2CMasterErr \
-        ROM_I2CMasterErr
-#else
-#define MAP_I2CMasterErr \
-        I2CMasterErr
-#endif
-#ifdef ROM_I2CMasterIntClear
-#define MAP_I2CMasterIntClear \
-        ROM_I2CMasterIntClear
-#else
-#define MAP_I2CMasterIntClear \
-        I2CMasterIntClear
-#endif
-#ifdef ROM_I2CMasterIntDisable
-#define MAP_I2CMasterIntDisable \
-        ROM_I2CMasterIntDisable
-#else
-#define MAP_I2CMasterIntDisable \
-        I2CMasterIntDisable
-#endif
-#ifdef ROM_I2CMasterIntEnable
-#define MAP_I2CMasterIntEnable \
-        ROM_I2CMasterIntEnable
-#else
-#define MAP_I2CMasterIntEnable \
-        I2CMasterIntEnable
-#endif
-#ifdef ROM_I2CMasterIntStatus
-#define MAP_I2CMasterIntStatus \
-        ROM_I2CMasterIntStatus
-#else
-#define MAP_I2CMasterIntStatus \
-        I2CMasterIntStatus
-#endif
-#ifdef ROM_I2CMasterIntEnableEx
-#define MAP_I2CMasterIntEnableEx \
-        ROM_I2CMasterIntEnableEx
-#else
-#define MAP_I2CMasterIntEnableEx \
-        I2CMasterIntEnableEx
-#endif
-#ifdef ROM_I2CMasterIntDisableEx
-#define MAP_I2CMasterIntDisableEx \
-        ROM_I2CMasterIntDisableEx
-#else
-#define MAP_I2CMasterIntDisableEx \
-        I2CMasterIntDisableEx
-#endif
-#ifdef ROM_I2CMasterIntStatusEx
-#define MAP_I2CMasterIntStatusEx \
-        ROM_I2CMasterIntStatusEx
-#else
-#define MAP_I2CMasterIntStatusEx \
-        I2CMasterIntStatusEx
-#endif
-#ifdef ROM_I2CMasterIntClearEx
-#define MAP_I2CMasterIntClearEx \
-        ROM_I2CMasterIntClearEx
-#else
-#define MAP_I2CMasterIntClearEx \
-        I2CMasterIntClearEx
-#endif
-#ifdef ROM_I2CMasterTimeoutSet
-#define MAP_I2CMasterTimeoutSet \
-        ROM_I2CMasterTimeoutSet
-#else
-#define MAP_I2CMasterTimeoutSet \
-        I2CMasterTimeoutSet
-#endif
-#ifdef ROM_I2CSlaveACKOverride
-#define MAP_I2CSlaveACKOverride \
-        ROM_I2CSlaveACKOverride
-#else
-#define MAP_I2CSlaveACKOverride \
-        I2CSlaveACKOverride
-#endif
-#ifdef ROM_I2CSlaveACKValueSet
-#define MAP_I2CSlaveACKValueSet \
-        ROM_I2CSlaveACKValueSet
-#else
-#define MAP_I2CSlaveACKValueSet \
-        I2CSlaveACKValueSet
-#endif
-#ifdef ROM_I2CMasterLineStateGet
-#define MAP_I2CMasterLineStateGet \
-        ROM_I2CMasterLineStateGet
-#else
-#define MAP_I2CMasterLineStateGet \
-        I2CMasterLineStateGet
-#endif
-#ifdef ROM_I2CMasterSlaveAddrSet
-#define MAP_I2CMasterSlaveAddrSet \
-        ROM_I2CMasterSlaveAddrSet
-#else
-#define MAP_I2CMasterSlaveAddrSet \
-        I2CMasterSlaveAddrSet
-#endif
-#ifdef ROM_I2CSlaveDataGet
-#define MAP_I2CSlaveDataGet \
-        ROM_I2CSlaveDataGet
-#else
-#define MAP_I2CSlaveDataGet \
-        I2CSlaveDataGet
-#endif
-#ifdef ROM_I2CSlaveDataPut
-#define MAP_I2CSlaveDataPut \
-        ROM_I2CSlaveDataPut
-#else
-#define MAP_I2CSlaveDataPut \
-        I2CSlaveDataPut
-#endif
-#ifdef ROM_I2CSlaveDisable
-#define MAP_I2CSlaveDisable \
-        ROM_I2CSlaveDisable
-#else
-#define MAP_I2CSlaveDisable \
-        I2CSlaveDisable
-#endif
-#ifdef ROM_I2CSlaveEnable
-#define MAP_I2CSlaveEnable \
-        ROM_I2CSlaveEnable
-#else
-#define MAP_I2CSlaveEnable \
-        I2CSlaveEnable
-#endif
-#ifdef ROM_I2CSlaveInit
-#define MAP_I2CSlaveInit \
-        ROM_I2CSlaveInit
-#else
-#define MAP_I2CSlaveInit \
-        I2CSlaveInit
-#endif
-#ifdef ROM_I2CSlaveAddressSet
-#define MAP_I2CSlaveAddressSet \
-        ROM_I2CSlaveAddressSet
-#else
-#define MAP_I2CSlaveAddressSet \
-        I2CSlaveAddressSet
-#endif
-#ifdef ROM_I2CSlaveIntClear
-#define MAP_I2CSlaveIntClear \
-        ROM_I2CSlaveIntClear
-#else
-#define MAP_I2CSlaveIntClear \
-        I2CSlaveIntClear
-#endif
-#ifdef ROM_I2CSlaveIntDisable
-#define MAP_I2CSlaveIntDisable \
-        ROM_I2CSlaveIntDisable
-#else
-#define MAP_I2CSlaveIntDisable \
-        I2CSlaveIntDisable
-#endif
-#ifdef ROM_I2CSlaveIntEnable
-#define MAP_I2CSlaveIntEnable \
-        ROM_I2CSlaveIntEnable
-#else
-#define MAP_I2CSlaveIntEnable \
-        I2CSlaveIntEnable
-#endif
-#ifdef ROM_I2CSlaveIntClearEx
-#define MAP_I2CSlaveIntClearEx \
-        ROM_I2CSlaveIntClearEx
-#else
-#define MAP_I2CSlaveIntClearEx \
-        I2CSlaveIntClearEx
-#endif
-#ifdef ROM_I2CSlaveIntDisableEx
-#define MAP_I2CSlaveIntDisableEx \
-        ROM_I2CSlaveIntDisableEx
-#else
-#define MAP_I2CSlaveIntDisableEx \
-        I2CSlaveIntDisableEx
-#endif
-#ifdef ROM_I2CSlaveIntEnableEx
-#define MAP_I2CSlaveIntEnableEx \
-        ROM_I2CSlaveIntEnableEx
-#else
-#define MAP_I2CSlaveIntEnableEx \
-        I2CSlaveIntEnableEx
-#endif
-#ifdef ROM_I2CSlaveIntStatus
-#define MAP_I2CSlaveIntStatus \
-        ROM_I2CSlaveIntStatus
-#else
-#define MAP_I2CSlaveIntStatus \
-        I2CSlaveIntStatus
-#endif
-#ifdef ROM_I2CSlaveIntStatusEx
-#define MAP_I2CSlaveIntStatusEx \
-        ROM_I2CSlaveIntStatusEx
-#else
-#define MAP_I2CSlaveIntStatusEx \
-        I2CSlaveIntStatusEx
-#endif
-#ifdef ROM_I2CSlaveStatus
-#define MAP_I2CSlaveStatus \
-        ROM_I2CSlaveStatus
-#else
-#define MAP_I2CSlaveStatus \
-        I2CSlaveStatus
-#endif
-#ifdef ROM_I2CMasterInitExpClk
-#define MAP_I2CMasterInitExpClk \
-        ROM_I2CMasterInitExpClk
-#else
-#define MAP_I2CMasterInitExpClk \
-        I2CMasterInitExpClk
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SPI API.
-//
-//*****************************************************************************
-#ifdef ROM_SPIEnable
-#define MAP_SPIEnable \
-        ROM_SPIEnable
-#else
-#define MAP_SPIEnable \
-        SPIEnable
-#endif
-#ifdef ROM_SPIDisable
-#define MAP_SPIDisable \
-        ROM_SPIDisable
-#else
-#define MAP_SPIDisable \
-        SPIDisable
-#endif
-#ifdef ROM_SPIReset
-#define MAP_SPIReset \
-        ROM_SPIReset
-#else
-#define MAP_SPIReset \
-        SPIReset
-#endif
-#ifdef ROM_SPIConfigSetExpClk
-#define MAP_SPIConfigSetExpClk \
-        ROM_SPIConfigSetExpClk
-#else
-#define MAP_SPIConfigSetExpClk \
-        SPIConfigSetExpClk
-#endif
-#ifdef ROM_SPIDataGetNonBlocking
-#define MAP_SPIDataGetNonBlocking \
-        ROM_SPIDataGetNonBlocking
-#else
-#define MAP_SPIDataGetNonBlocking \
-        SPIDataGetNonBlocking
-#endif
-#ifdef ROM_SPIDataGet
-#define MAP_SPIDataGet \
-        ROM_SPIDataGet
-#else
-#define MAP_SPIDataGet \
-        SPIDataGet
-#endif
-#ifdef ROM_SPIDataPutNonBlocking
-#define MAP_SPIDataPutNonBlocking \
-        ROM_SPIDataPutNonBlocking
-#else
-#define MAP_SPIDataPutNonBlocking \
-        SPIDataPutNonBlocking
-#endif
-#ifdef ROM_SPIDataPut
-#define MAP_SPIDataPut \
-        ROM_SPIDataPut
-#else
-#define MAP_SPIDataPut \
-        SPIDataPut
-#endif
-#ifdef ROM_SPIFIFOEnable
-#define MAP_SPIFIFOEnable \
-        ROM_SPIFIFOEnable
-#else
-#define MAP_SPIFIFOEnable \
-        SPIFIFOEnable
-#endif
-#ifdef ROM_SPIFIFODisable
-#define MAP_SPIFIFODisable \
-        ROM_SPIFIFODisable
-#else
-#define MAP_SPIFIFODisable \
-        SPIFIFODisable
-#endif
-#ifdef ROM_SPIFIFOLevelSet
-#define MAP_SPIFIFOLevelSet \
-        ROM_SPIFIFOLevelSet
-#else
-#define MAP_SPIFIFOLevelSet \
-        SPIFIFOLevelSet
-#endif
-#ifdef ROM_SPIFIFOLevelGet
-#define MAP_SPIFIFOLevelGet \
-        ROM_SPIFIFOLevelGet
-#else
-#define MAP_SPIFIFOLevelGet \
-        SPIFIFOLevelGet
-#endif
-#ifdef ROM_SPIWordCountSet
-#define MAP_SPIWordCountSet \
-        ROM_SPIWordCountSet
-#else
-#define MAP_SPIWordCountSet \
-        SPIWordCountSet
-#endif
-#ifdef ROM_SPIIntRegister
-#define MAP_SPIIntRegister \
-        ROM_SPIIntRegister
-#else
-#define MAP_SPIIntRegister \
-        SPIIntRegister
-#endif
-#ifdef ROM_SPIIntUnregister
-#define MAP_SPIIntUnregister \
-        ROM_SPIIntUnregister
-#else
-#define MAP_SPIIntUnregister \
-        SPIIntUnregister
-#endif
-#ifdef ROM_SPIIntEnable
-#define MAP_SPIIntEnable \
-        ROM_SPIIntEnable
-#else
-#define MAP_SPIIntEnable \
-        SPIIntEnable
-#endif
-#ifdef ROM_SPIIntDisable
-#define MAP_SPIIntDisable \
-        ROM_SPIIntDisable
-#else
-#define MAP_SPIIntDisable \
-        SPIIntDisable
-#endif
-#ifdef ROM_SPIIntStatus
-#define MAP_SPIIntStatus \
-        ROM_SPIIntStatus
-#else
-#define MAP_SPIIntStatus \
-        SPIIntStatus
-#endif
-#ifdef ROM_SPIIntClear
-#define MAP_SPIIntClear \
-        ROM_SPIIntClear
-#else
-#define MAP_SPIIntClear \
-        SPIIntClear
-#endif
-#ifdef ROM_SPIDmaEnable
-#define MAP_SPIDmaEnable \
-        ROM_SPIDmaEnable
-#else
-#define MAP_SPIDmaEnable \
-        SPIDmaEnable
-#endif
-#ifdef ROM_SPIDmaDisable
-#define MAP_SPIDmaDisable \
-        ROM_SPIDmaDisable
-#else
-#define MAP_SPIDmaDisable \
-        SPIDmaDisable
-#endif
-#ifdef ROM_SPICSEnable
-#define MAP_SPICSEnable \
-        ROM_SPICSEnable
-#else
-#define MAP_SPICSEnable \
-        SPICSEnable
-#endif
-#ifdef ROM_SPICSDisable
-#define MAP_SPICSDisable \
-        ROM_SPICSDisable
-#else
-#define MAP_SPICSDisable \
-        SPICSDisable
-#endif
-#ifdef ROM_SPITransfer
-#define MAP_SPITransfer \
-        ROM_SPITransfer
-#else
-#define MAP_SPITransfer \
-        SPITransfer
-#endif
-
-//*****************************************************************************
-//
-// Macros for the CAM API.
-//
-//*****************************************************************************
-#ifdef ROM_CameraReset
-#define MAP_CameraReset \
-        ROM_CameraReset
-#else
-#define MAP_CameraReset \
-        CameraReset
-#endif
-#ifdef ROM_CameraParamsConfig
-#define MAP_CameraParamsConfig \
-        ROM_CameraParamsConfig
-#else
-#define MAP_CameraParamsConfig \
-        CameraParamsConfig
-#endif
-#ifdef ROM_CameraXClkConfig
-#define MAP_CameraXClkConfig \
-        ROM_CameraXClkConfig
-#else
-#define MAP_CameraXClkConfig \
-        CameraXClkConfig
-#endif
-#ifdef ROM_CameraXClkSet
-#define MAP_CameraXClkSet \
-        ROM_CameraXClkSet
-#else
-#define MAP_CameraXClkSet \
-        CameraXClkSet
-#endif
-#ifdef ROM_CameraDMAEnable
-#define MAP_CameraDMAEnable \
-        ROM_CameraDMAEnable
-#else
-#define MAP_CameraDMAEnable \
-        CameraDMAEnable
-#endif
-#ifdef ROM_CameraDMADisable
-#define MAP_CameraDMADisable \
-        ROM_CameraDMADisable
-#else
-#define MAP_CameraDMADisable \
-        CameraDMADisable
-#endif
-#ifdef ROM_CameraThresholdSet
-#define MAP_CameraThresholdSet \
-        ROM_CameraThresholdSet
-#else
-#define MAP_CameraThresholdSet \
-        CameraThresholdSet
-#endif
-#ifdef ROM_CameraIntRegister
-#define MAP_CameraIntRegister \
-        ROM_CameraIntRegister
-#else
-#define MAP_CameraIntRegister \
-        CameraIntRegister
-#endif
-#ifdef ROM_CameraIntUnregister
-#define MAP_CameraIntUnregister \
-        ROM_CameraIntUnregister
-#else
-#define MAP_CameraIntUnregister \
-        CameraIntUnregister
-#endif
-#ifdef ROM_CameraIntEnable
-#define MAP_CameraIntEnable \
-        ROM_CameraIntEnable
-#else
-#define MAP_CameraIntEnable \
-        CameraIntEnable
-#endif
-#ifdef ROM_CameraIntDisable
-#define MAP_CameraIntDisable \
-        ROM_CameraIntDisable
-#else
-#define MAP_CameraIntDisable \
-        CameraIntDisable
-#endif
-#ifdef ROM_CameraIntStatus
-#define MAP_CameraIntStatus \
-        ROM_CameraIntStatus
-#else
-#define MAP_CameraIntStatus \
-        CameraIntStatus
-#endif
-#ifdef ROM_CameraIntClear
-#define MAP_CameraIntClear \
-        ROM_CameraIntClear
-#else
-#define MAP_CameraIntClear \
-        CameraIntClear
-#endif
-#ifdef ROM_CameraCaptureStop
-#define MAP_CameraCaptureStop \
-        ROM_CameraCaptureStop
-#else
-#define MAP_CameraCaptureStop \
-        CameraCaptureStop
-#endif
-#ifdef ROM_CameraCaptureStart
-#define MAP_CameraCaptureStart \
-        ROM_CameraCaptureStart
-#else
-#define MAP_CameraCaptureStart \
-        CameraCaptureStart
-#endif
-#ifdef ROM_CameraBufferRead
-#define MAP_CameraBufferRead \
-        ROM_CameraBufferRead
-#else
-#define MAP_CameraBufferRead \
-        CameraBufferRead
-#endif
-
-//*****************************************************************************
-//
-// Macros for the FLASH API.
-//
-//*****************************************************************************
-#ifdef ROM_FlashDisable
-#define MAP_FlashDisable \
-        ROM_FlashDisable
-#else
-#define MAP_FlashDisable \
-        FlashDisable
-#endif
-#ifdef ROM_FlashErase
-#define MAP_FlashErase \
-        ROM_FlashErase
-#else
-#define MAP_FlashErase \
-        FlashErase
-#endif
-#ifdef ROM_FlashMassErase
-#define MAP_FlashMassErase \
-        ROM_FlashMassErase
-#else
-#define MAP_FlashMassErase \
-        FlashMassErase
-#endif
-#ifdef ROM_FlashMassEraseNonBlocking
-#define MAP_FlashMassEraseNonBlocking \
-        ROM_FlashMassEraseNonBlocking
-#else
-#define MAP_FlashMassEraseNonBlocking \
-        FlashMassEraseNonBlocking
-#endif
-#ifdef ROM_FlashEraseNonBlocking
-#define MAP_FlashEraseNonBlocking \
-        ROM_FlashEraseNonBlocking
-#else
-#define MAP_FlashEraseNonBlocking \
-        FlashEraseNonBlocking
-#endif
-#ifdef ROM_FlashProgram
-#define MAP_FlashProgram \
-        ROM_FlashProgram
-#else
-#define MAP_FlashProgram \
-        FlashProgram
-#endif
-#ifdef ROM_FlashProgramNonBlocking
-#define MAP_FlashProgramNonBlocking \
-        ROM_FlashProgramNonBlocking
-#else
-#define MAP_FlashProgramNonBlocking \
-        FlashProgramNonBlocking
-#endif
-#ifdef ROM_FlashIntRegister
-#define MAP_FlashIntRegister \
-        ROM_FlashIntRegister
-#else
-#define MAP_FlashIntRegister \
-        FlashIntRegister
-#endif
-#ifdef ROM_FlashIntUnregister
-#define MAP_FlashIntUnregister \
-        ROM_FlashIntUnregister
-#else
-#define MAP_FlashIntUnregister \
-        FlashIntUnregister
-#endif
-#ifdef ROM_FlashIntEnable
-#define MAP_FlashIntEnable \
-        ROM_FlashIntEnable
-#else
-#define MAP_FlashIntEnable \
-        FlashIntEnable
-#endif
-#ifdef ROM_FlashIntDisable
-#define MAP_FlashIntDisable \
-        ROM_FlashIntDisable
-#else
-#define MAP_FlashIntDisable \
-        FlashIntDisable
-#endif
-#ifdef ROM_FlashIntStatus
-#define MAP_FlashIntStatus \
-        ROM_FlashIntStatus
-#else
-#define MAP_FlashIntStatus \
-        FlashIntStatus
-#endif
-#ifdef ROM_FlashIntClear
-#define MAP_FlashIntClear \
-        ROM_FlashIntClear
-#else
-#define MAP_FlashIntClear \
-        FlashIntClear
-#endif
-#ifdef ROM_FlashProtectGet
-#define MAP_FlashProtectGet \
-        ROM_FlashProtectGet
-#else
-#define MAP_FlashProtectGet \
-        FlashProtectGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the Pin API.
-//
-//*****************************************************************************
-#ifdef ROM_PinModeSet
-#define MAP_PinModeSet \
-        ROM_PinModeSet
-#else
-#define MAP_PinModeSet \
-        PinModeSet
-#endif
-#ifdef ROM_PinDirModeSet
-#define MAP_PinDirModeSet \
-        ROM_PinDirModeSet
-#else
-#define MAP_PinDirModeSet \
-        PinDirModeSet
-#endif
-#ifdef ROM_PinDirModeGet
-#define MAP_PinDirModeGet \
-        ROM_PinDirModeGet
-#else
-#define MAP_PinDirModeGet \
-        PinDirModeGet
-#endif
-#ifdef ROM_PinModeGet
-#define MAP_PinModeGet \
-        ROM_PinModeGet
-#else
-#define MAP_PinModeGet \
-        PinModeGet
-#endif
-#ifdef ROM_PinConfigGet
-#define MAP_PinConfigGet \
-        ROM_PinConfigGet
-#else
-#define MAP_PinConfigGet \
-        PinConfigGet
-#endif
-#ifdef ROM_PinConfigSet
-#define MAP_PinConfigSet \
-        ROM_PinConfigSet
-#else
-#define MAP_PinConfigSet \
-        PinConfigSet
-#endif
-#ifdef ROM_PinTypeUART
-#define MAP_PinTypeUART \
-        ROM_PinTypeUART
-#else
-#define MAP_PinTypeUART \
-        PinTypeUART
-#endif
-#ifdef ROM_PinTypeI2C
-#define MAP_PinTypeI2C \
-        ROM_PinTypeI2C
-#else
-#define MAP_PinTypeI2C \
-        PinTypeI2C
-#endif
-#ifdef ROM_PinTypeSPI
-#define MAP_PinTypeSPI \
-        ROM_PinTypeSPI
-#else
-#define MAP_PinTypeSPI \
-        PinTypeSPI
-#endif
-#ifdef ROM_PinTypeI2S
-#define MAP_PinTypeI2S \
-        ROM_PinTypeI2S
-#else
-#define MAP_PinTypeI2S \
-        PinTypeI2S
-#endif
-#ifdef ROM_PinTypeTimer
-#define MAP_PinTypeTimer \
-        ROM_PinTypeTimer
-#else
-#define MAP_PinTypeTimer \
-        PinTypeTimer
-#endif
-#ifdef ROM_PinTypeCamera
-#define MAP_PinTypeCamera \
-        ROM_PinTypeCamera
-#else
-#define MAP_PinTypeCamera \
-        PinTypeCamera
-#endif
-#ifdef ROM_PinTypeGPIO
-#define MAP_PinTypeGPIO \
-        ROM_PinTypeGPIO
-#else
-#define MAP_PinTypeGPIO \
-        PinTypeGPIO
-#endif
-#ifdef ROM_PinTypeADC
-#define MAP_PinTypeADC \
-        ROM_PinTypeADC
-#else
-#define MAP_PinTypeADC \
-        PinTypeADC
-#endif
-#ifdef ROM_PinTypeSDHost
-#define MAP_PinTypeSDHost \
-        ROM_PinTypeSDHost
-#else
-#define MAP_PinTypeSDHost \
-        PinTypeSDHost
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SYSTICK API.
-//
-//*****************************************************************************
-#ifdef ROM_SysTickEnable
-#define MAP_SysTickEnable \
-        ROM_SysTickEnable
-#else
-#define MAP_SysTickEnable \
-        SysTickEnable
-#endif
-#ifdef ROM_SysTickDisable
-#define MAP_SysTickDisable \
-        ROM_SysTickDisable
-#else
-#define MAP_SysTickDisable \
-        SysTickDisable
-#endif
-#ifdef ROM_SysTickIntRegister
-#define MAP_SysTickIntRegister \
-        ROM_SysTickIntRegister
-#else
-#define MAP_SysTickIntRegister \
-        SysTickIntRegister
-#endif
-#ifdef ROM_SysTickIntUnregister
-#define MAP_SysTickIntUnregister \
-        ROM_SysTickIntUnregister
-#else
-#define MAP_SysTickIntUnregister \
-        SysTickIntUnregister
-#endif
-#ifdef ROM_SysTickIntEnable
-#define MAP_SysTickIntEnable \
-        ROM_SysTickIntEnable
-#else
-#define MAP_SysTickIntEnable \
-        SysTickIntEnable
-#endif
-#ifdef ROM_SysTickIntDisable
-#define MAP_SysTickIntDisable \
-        ROM_SysTickIntDisable
-#else
-#define MAP_SysTickIntDisable \
-        SysTickIntDisable
-#endif
-#ifdef ROM_SysTickPeriodSet
-#define MAP_SysTickPeriodSet \
-        ROM_SysTickPeriodSet
-#else
-#define MAP_SysTickPeriodSet \
-        SysTickPeriodSet
-#endif
-#ifdef ROM_SysTickPeriodGet
-#define MAP_SysTickPeriodGet \
-        ROM_SysTickPeriodGet
-#else
-#define MAP_SysTickPeriodGet \
-        SysTickPeriodGet
-#endif
-#ifdef ROM_SysTickValueGet
-#define MAP_SysTickValueGet \
-        ROM_SysTickValueGet
-#else
-#define MAP_SysTickValueGet \
-        SysTickValueGet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the UTILS API.
-//
-//*****************************************************************************
-#ifdef ROM_UtilsDelay
-#define MAP_UtilsDelay \
-        ROM_UtilsDelay
-#else
-#define MAP_UtilsDelay \
-        UtilsDelay
-#endif
-
-//*****************************************************************************
-//
-// Macros for the I2S API.
-//
-//*****************************************************************************
-#ifdef ROM_I2SEnable
-#define MAP_I2SEnable \
-        ROM_I2SEnable
-#else
-#define MAP_I2SEnable \
-        I2SEnable
-#endif
-#ifdef ROM_I2SDisable
-#define MAP_I2SDisable \
-        ROM_I2SDisable
-#else
-#define MAP_I2SDisable \
-        I2SDisable
-#endif
-#ifdef ROM_I2SDataPut
-#define MAP_I2SDataPut \
-        ROM_I2SDataPut
-#else
-#define MAP_I2SDataPut \
-        I2SDataPut
-#endif
-#ifdef ROM_I2SDataPutNonBlocking
-#define MAP_I2SDataPutNonBlocking \
-        ROM_I2SDataPutNonBlocking
-#else
-#define MAP_I2SDataPutNonBlocking \
-        I2SDataPutNonBlocking
-#endif
-#ifdef ROM_I2SDataGet
-#define MAP_I2SDataGet \
-        ROM_I2SDataGet
-#else
-#define MAP_I2SDataGet \
-        I2SDataGet
-#endif
-#ifdef ROM_I2SDataGetNonBlocking
-#define MAP_I2SDataGetNonBlocking \
-        ROM_I2SDataGetNonBlocking
-#else
-#define MAP_I2SDataGetNonBlocking \
-        I2SDataGetNonBlocking
-#endif
-#ifdef ROM_I2SConfigSetExpClk
-#define MAP_I2SConfigSetExpClk \
-        ROM_I2SConfigSetExpClk
-#else
-#define MAP_I2SConfigSetExpClk \
-        I2SConfigSetExpClk
-#endif
-#ifdef ROM_I2STxFIFOEnable
-#define MAP_I2STxFIFOEnable \
-        ROM_I2STxFIFOEnable
-#else
-#define MAP_I2STxFIFOEnable \
-        I2STxFIFOEnable
-#endif
-#ifdef ROM_I2STxFIFODisable
-#define MAP_I2STxFIFODisable \
-        ROM_I2STxFIFODisable
-#else
-#define MAP_I2STxFIFODisable \
-        I2STxFIFODisable
-#endif
-#ifdef ROM_I2SRxFIFOEnable
-#define MAP_I2SRxFIFOEnable \
-        ROM_I2SRxFIFOEnable
-#else
-#define MAP_I2SRxFIFOEnable \
-        I2SRxFIFOEnable
-#endif
-#ifdef ROM_I2SRxFIFODisable
-#define MAP_I2SRxFIFODisable \
-        ROM_I2SRxFIFODisable
-#else
-#define MAP_I2SRxFIFODisable \
-        I2SRxFIFODisable
-#endif
-#ifdef ROM_I2STxFIFOStatusGet
-#define MAP_I2STxFIFOStatusGet \
-        ROM_I2STxFIFOStatusGet
-#else
-#define MAP_I2STxFIFOStatusGet \
-        I2STxFIFOStatusGet
-#endif
-#ifdef ROM_I2SRxFIFOStatusGet
-#define MAP_I2SRxFIFOStatusGet \
-        ROM_I2SRxFIFOStatusGet
-#else
-#define MAP_I2SRxFIFOStatusGet \
-        I2SRxFIFOStatusGet
-#endif
-#ifdef ROM_I2SSerializerConfig
-#define MAP_I2SSerializerConfig \
-        ROM_I2SSerializerConfig
-#else
-#define MAP_I2SSerializerConfig \
-        I2SSerializerConfig
-#endif
-#ifdef ROM_I2SIntEnable
-#define MAP_I2SIntEnable \
-        ROM_I2SIntEnable
-#else
-#define MAP_I2SIntEnable \
-        I2SIntEnable
-#endif
-#ifdef ROM_I2SIntDisable
-#define MAP_I2SIntDisable \
-        ROM_I2SIntDisable
-#else
-#define MAP_I2SIntDisable \
-        I2SIntDisable
-#endif
-#ifdef ROM_I2SIntStatus
-#define MAP_I2SIntStatus \
-        ROM_I2SIntStatus
-#else
-#define MAP_I2SIntStatus \
-        I2SIntStatus
-#endif
-#ifdef ROM_I2SIntClear
-#define MAP_I2SIntClear \
-        ROM_I2SIntClear
-#else
-#define MAP_I2SIntClear \
-        I2SIntClear
-#endif
-#ifdef ROM_I2SIntRegister
-#define MAP_I2SIntRegister \
-        ROM_I2SIntRegister
-#else
-#define MAP_I2SIntRegister \
-        I2SIntRegister
-#endif
-#ifdef ROM_I2SIntUnregister
-#define MAP_I2SIntUnregister \
-        ROM_I2SIntUnregister
-#else
-#define MAP_I2SIntUnregister \
-        I2SIntUnregister
-#endif
-
-//*****************************************************************************
-//
-// Macros for the GPIO API.
-//
-//*****************************************************************************
-#ifdef ROM_GPIODirModeSet
-#define MAP_GPIODirModeSet \
-        ROM_GPIODirModeSet
-#else
-#define MAP_GPIODirModeSet \
-        GPIODirModeSet
-#endif
-#ifdef ROM_GPIODirModeGet
-#define MAP_GPIODirModeGet \
-        ROM_GPIODirModeGet
-#else
-#define MAP_GPIODirModeGet \
-        GPIODirModeGet
-#endif
-#ifdef ROM_GPIOIntTypeSet
-#define MAP_GPIOIntTypeSet \
-        ROM_GPIOIntTypeSet
-#else
-#define MAP_GPIOIntTypeSet \
-        GPIOIntTypeSet
-#endif
-#ifdef ROM_GPIODMATriggerEnable
-#define MAP_GPIODMATriggerEnable \
-        ROM_GPIODMATriggerEnable
-#else
-#define MAP_GPIODMATriggerEnable \
-        GPIODMATriggerEnable
-#endif
-#ifdef ROM_GPIODMATriggerDisable
-#define MAP_GPIODMATriggerDisable \
-        ROM_GPIODMATriggerDisable
-#else
-#define MAP_GPIODMATriggerDisable \
-        GPIODMATriggerDisable
-#endif
-#ifdef ROM_GPIOIntTypeGet
-#define MAP_GPIOIntTypeGet \
-        ROM_GPIOIntTypeGet
-#else
-#define MAP_GPIOIntTypeGet \
-        GPIOIntTypeGet
-#endif
-#ifdef ROM_GPIOIntEnable
-#define MAP_GPIOIntEnable \
-        ROM_GPIOIntEnable
-#else
-#define MAP_GPIOIntEnable \
-        GPIOIntEnable
-#endif
-#ifdef ROM_GPIOIntDisable
-#define MAP_GPIOIntDisable \
-        ROM_GPIOIntDisable
-#else
-#define MAP_GPIOIntDisable \
-        GPIOIntDisable
-#endif
-#ifdef ROM_GPIOIntStatus
-#define MAP_GPIOIntStatus \
-        ROM_GPIOIntStatus
-#else
-#define MAP_GPIOIntStatus \
-        GPIOIntStatus
-#endif
-#ifdef ROM_GPIOIntClear
-#define MAP_GPIOIntClear \
-        ROM_GPIOIntClear
-#else
-#define MAP_GPIOIntClear \
-        GPIOIntClear
-#endif
-#ifdef ROM_GPIOIntRegister
-#define MAP_GPIOIntRegister \
-        ROM_GPIOIntRegister
-#else
-#define MAP_GPIOIntRegister \
-        GPIOIntRegister
-#endif
-#ifdef ROM_GPIOIntUnregister
-#define MAP_GPIOIntUnregister \
-        ROM_GPIOIntUnregister
-#else
-#define MAP_GPIOIntUnregister \
-        GPIOIntUnregister
-#endif
-#ifdef ROM_GPIOPinRead
-#define MAP_GPIOPinRead \
-        ROM_GPIOPinRead
-#else
-#define MAP_GPIOPinRead \
-        GPIOPinRead
-#endif
-#ifdef ROM_GPIOPinWrite
-#define MAP_GPIOPinWrite \
-        ROM_GPIOPinWrite
-#else
-#define MAP_GPIOPinWrite \
-        GPIOPinWrite
-#endif
-
-//*****************************************************************************
-//
-// Macros for the AES API.
-//
-//*****************************************************************************
-#ifdef ROM_AESConfigSet
-#define MAP_AESConfigSet \
-        ROM_AESConfigSet
-#else
-#define MAP_AESConfigSet \
-        AESConfigSet
-#endif
-#ifdef ROM_AESKey1Set
-#define MAP_AESKey1Set \
-        ROM_AESKey1Set
-#else
-#define MAP_AESKey1Set \
-        AESKey1Set
-#endif
-#ifdef ROM_AESKey2Set
-#define MAP_AESKey2Set \
-        ROM_AESKey2Set
-#else
-#define MAP_AESKey2Set \
-        AESKey2Set
-#endif
-#ifdef ROM_AESKey3Set
-#define MAP_AESKey3Set \
-        ROM_AESKey3Set
-#else
-#define MAP_AESKey3Set \
-        AESKey3Set
-#endif
-#ifdef ROM_AESIVSet
-#define MAP_AESIVSet \
-        ROM_AESIVSet
-#else
-#define MAP_AESIVSet \
-        AESIVSet
-#endif
-#ifdef ROM_AESTagRead
-#define MAP_AESTagRead \
-        ROM_AESTagRead
-#else
-#define MAP_AESTagRead \
-        AESTagRead
-#endif
-#ifdef ROM_AESDataLengthSet
-#define MAP_AESDataLengthSet \
-        ROM_AESDataLengthSet
-#else
-#define MAP_AESDataLengthSet \
-        AESDataLengthSet
-#endif
-#ifdef ROM_AESAuthDataLengthSet
-#define MAP_AESAuthDataLengthSet \
-        ROM_AESAuthDataLengthSet
-#else
-#define MAP_AESAuthDataLengthSet \
-        AESAuthDataLengthSet
-#endif
-#ifdef ROM_AESDataReadNonBlocking
-#define MAP_AESDataReadNonBlocking \
-        ROM_AESDataReadNonBlocking
-#else
-#define MAP_AESDataReadNonBlocking \
-        AESDataReadNonBlocking
-#endif
-#ifdef ROM_AESDataRead
-#define MAP_AESDataRead \
-        ROM_AESDataRead
-#else
-#define MAP_AESDataRead \
-        AESDataRead
-#endif
-#ifdef ROM_AESDataWriteNonBlocking
-#define MAP_AESDataWriteNonBlocking \
-        ROM_AESDataWriteNonBlocking
-#else
-#define MAP_AESDataWriteNonBlocking \
-        AESDataWriteNonBlocking
-#endif
-#ifdef ROM_AESDataWrite
-#define MAP_AESDataWrite \
-        ROM_AESDataWrite
-#else
-#define MAP_AESDataWrite \
-        AESDataWrite
-#endif
-#ifdef ROM_AESDataProcess
-#define MAP_AESDataProcess \
-        ROM_AESDataProcess
-#else
-#define MAP_AESDataProcess \
-        AESDataProcess
-#endif
-#ifdef ROM_AESDataMAC
-#define MAP_AESDataMAC \
-        ROM_AESDataMAC
-#else
-#define MAP_AESDataMAC \
-        AESDataMAC
-#endif
-#ifdef ROM_AESDataProcessAE
-#define MAP_AESDataProcessAE \
-        ROM_AESDataProcessAE
-#else
-#define MAP_AESDataProcessAE \
-        AESDataProcessAE
-#endif
-#ifdef ROM_AESIntStatus
-#define MAP_AESIntStatus \
-        ROM_AESIntStatus
-#else
-#define MAP_AESIntStatus \
-        AESIntStatus
-#endif
-#ifdef ROM_AESIntEnable
-#define MAP_AESIntEnable \
-        ROM_AESIntEnable
-#else
-#define MAP_AESIntEnable \
-        AESIntEnable
-#endif
-#ifdef ROM_AESIntDisable
-#define MAP_AESIntDisable \
-        ROM_AESIntDisable
-#else
-#define MAP_AESIntDisable \
-        AESIntDisable
-#endif
-#ifdef ROM_AESIntClear
-#define MAP_AESIntClear \
-        ROM_AESIntClear
-#else
-#define MAP_AESIntClear \
-        AESIntClear
-#endif
-#ifdef ROM_AESIntRegister
-#define MAP_AESIntRegister \
-        ROM_AESIntRegister
-#else
-#define MAP_AESIntRegister \
-        AESIntRegister
-#endif
-#ifdef ROM_AESIntUnregister
-#define MAP_AESIntUnregister \
-        ROM_AESIntUnregister
-#else
-#define MAP_AESIntUnregister \
-        AESIntUnregister
-#endif
-#ifdef ROM_AESDMAEnable
-#define MAP_AESDMAEnable \
-        ROM_AESDMAEnable
-#else
-#define MAP_AESDMAEnable \
-        AESDMAEnable
-#endif
-#ifdef ROM_AESDMADisable
-#define MAP_AESDMADisable \
-        ROM_AESDMADisable
-#else
-#define MAP_AESDMADisable \
-        AESDMADisable
-#endif
-
-//*****************************************************************************
-//
-// Macros for the DES API.
-//
-//*****************************************************************************
-#ifdef ROM_DESConfigSet
-#define MAP_DESConfigSet \
-        ROM_DESConfigSet
-#else
-#define MAP_DESConfigSet \
-        DESConfigSet
-#endif
-#ifdef ROM_DESDataRead
-#define MAP_DESDataRead \
-        ROM_DESDataRead
-#else
-#define MAP_DESDataRead \
-        DESDataRead
-#endif
-#ifdef ROM_DESDataReadNonBlocking
-#define MAP_DESDataReadNonBlocking \
-        ROM_DESDataReadNonBlocking
-#else
-#define MAP_DESDataReadNonBlocking \
-        DESDataReadNonBlocking
-#endif
-#ifdef ROM_DESDataProcess
-#define MAP_DESDataProcess \
-        ROM_DESDataProcess
-#else
-#define MAP_DESDataProcess \
-        DESDataProcess
-#endif
-#ifdef ROM_DESDataWrite
-#define MAP_DESDataWrite \
-        ROM_DESDataWrite
-#else
-#define MAP_DESDataWrite \
-        DESDataWrite
-#endif
-#ifdef ROM_DESDataWriteNonBlocking
-#define MAP_DESDataWriteNonBlocking \
-        ROM_DESDataWriteNonBlocking
-#else
-#define MAP_DESDataWriteNonBlocking \
-        DESDataWriteNonBlocking
-#endif
-#ifdef ROM_DESDMADisable
-#define MAP_DESDMADisable \
-        ROM_DESDMADisable
-#else
-#define MAP_DESDMADisable \
-        DESDMADisable
-#endif
-#ifdef ROM_DESDMAEnable
-#define MAP_DESDMAEnable \
-        ROM_DESDMAEnable
-#else
-#define MAP_DESDMAEnable \
-        DESDMAEnable
-#endif
-#ifdef ROM_DESIntClear
-#define MAP_DESIntClear \
-        ROM_DESIntClear
-#else
-#define MAP_DESIntClear \
-        DESIntClear
-#endif
-#ifdef ROM_DESIntDisable
-#define MAP_DESIntDisable \
-        ROM_DESIntDisable
-#else
-#define MAP_DESIntDisable \
-        DESIntDisable
-#endif
-#ifdef ROM_DESIntEnable
-#define MAP_DESIntEnable \
-        ROM_DESIntEnable
-#else
-#define MAP_DESIntEnable \
-        DESIntEnable
-#endif
-#ifdef ROM_DESIntRegister
-#define MAP_DESIntRegister \
-        ROM_DESIntRegister
-#else
-#define MAP_DESIntRegister \
-        DESIntRegister
-#endif
-#ifdef ROM_DESIntStatus
-#define MAP_DESIntStatus \
-        ROM_DESIntStatus
-#else
-#define MAP_DESIntStatus \
-        DESIntStatus
-#endif
-#ifdef ROM_DESIntUnregister
-#define MAP_DESIntUnregister \
-        ROM_DESIntUnregister
-#else
-#define MAP_DESIntUnregister \
-        DESIntUnregister
-#endif
-#ifdef ROM_DESIVSet
-#define MAP_DESIVSet \
-        ROM_DESIVSet
-#else
-#define MAP_DESIVSet \
-        DESIVSet
-#endif
-#ifdef ROM_DESKeySet
-#define MAP_DESKeySet \
-        ROM_DESKeySet
-#else
-#define MAP_DESKeySet \
-        DESKeySet
-#endif
-#ifdef ROM_DESDataLengthSet
-#define MAP_DESDataLengthSet \
-        ROM_DESDataLengthSet
-#else
-#define MAP_DESDataLengthSet \
-        DESDataLengthSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SHAMD5 API.
-//
-//*****************************************************************************
-#ifdef ROM_SHAMD5ConfigSet
-#define MAP_SHAMD5ConfigSet \
-        ROM_SHAMD5ConfigSet
-#else
-#define MAP_SHAMD5ConfigSet \
-        SHAMD5ConfigSet
-#endif
-#ifdef ROM_SHAMD5DataProcess
-#define MAP_SHAMD5DataProcess \
-        ROM_SHAMD5DataProcess
-#else
-#define MAP_SHAMD5DataProcess \
-        SHAMD5DataProcess
-#endif
-#ifdef ROM_SHAMD5DataWrite
-#define MAP_SHAMD5DataWrite \
-        ROM_SHAMD5DataWrite
-#else
-#define MAP_SHAMD5DataWrite \
-        SHAMD5DataWrite
-#endif
-#ifdef ROM_SHAMD5DataWriteNonBlocking
-#define MAP_SHAMD5DataWriteNonBlocking \
-        ROM_SHAMD5DataWriteNonBlocking
-#else
-#define MAP_SHAMD5DataWriteNonBlocking \
-        SHAMD5DataWriteNonBlocking
-#endif
-#ifdef ROM_SHAMD5DMADisable
-#define MAP_SHAMD5DMADisable \
-        ROM_SHAMD5DMADisable
-#else
-#define MAP_SHAMD5DMADisable \
-        SHAMD5DMADisable
-#endif
-#ifdef ROM_SHAMD5DMAEnable
-#define MAP_SHAMD5DMAEnable \
-        ROM_SHAMD5DMAEnable
-#else
-#define MAP_SHAMD5DMAEnable \
-        SHAMD5DMAEnable
-#endif
-#ifdef ROM_SHAMD5DataLengthSet
-#define MAP_SHAMD5DataLengthSet \
-        ROM_SHAMD5DataLengthSet
-#else
-#define MAP_SHAMD5DataLengthSet \
-        SHAMD5DataLengthSet
-#endif
-#ifdef ROM_SHAMD5HMACKeySet
-#define MAP_SHAMD5HMACKeySet \
-        ROM_SHAMD5HMACKeySet
-#else
-#define MAP_SHAMD5HMACKeySet \
-        SHAMD5HMACKeySet
-#endif
-#ifdef ROM_SHAMD5HMACPPKeyGenerate
-#define MAP_SHAMD5HMACPPKeyGenerate \
-        ROM_SHAMD5HMACPPKeyGenerate
-#else
-#define MAP_SHAMD5HMACPPKeyGenerate \
-        SHAMD5HMACPPKeyGenerate
-#endif
-#ifdef ROM_SHAMD5HMACPPKeySet
-#define MAP_SHAMD5HMACPPKeySet \
-        ROM_SHAMD5HMACPPKeySet
-#else
-#define MAP_SHAMD5HMACPPKeySet \
-        SHAMD5HMACPPKeySet
-#endif
-#ifdef ROM_SHAMD5HMACProcess
-#define MAP_SHAMD5HMACProcess \
-        ROM_SHAMD5HMACProcess
-#else
-#define MAP_SHAMD5HMACProcess \
-        SHAMD5HMACProcess
-#endif
-#ifdef ROM_SHAMD5IntClear
-#define MAP_SHAMD5IntClear \
-        ROM_SHAMD5IntClear
-#else
-#define MAP_SHAMD5IntClear \
-        SHAMD5IntClear
-#endif
-#ifdef ROM_SHAMD5IntDisable
-#define MAP_SHAMD5IntDisable \
-        ROM_SHAMD5IntDisable
-#else
-#define MAP_SHAMD5IntDisable \
-        SHAMD5IntDisable
-#endif
-#ifdef ROM_SHAMD5IntEnable
-#define MAP_SHAMD5IntEnable \
-        ROM_SHAMD5IntEnable
-#else
-#define MAP_SHAMD5IntEnable \
-        SHAMD5IntEnable
-#endif
-#ifdef ROM_SHAMD5IntRegister
-#define MAP_SHAMD5IntRegister \
-        ROM_SHAMD5IntRegister
-#else
-#define MAP_SHAMD5IntRegister \
-        SHAMD5IntRegister
-#endif
-#ifdef ROM_SHAMD5IntStatus
-#define MAP_SHAMD5IntStatus \
-        ROM_SHAMD5IntStatus
-#else
-#define MAP_SHAMD5IntStatus \
-        SHAMD5IntStatus
-#endif
-#ifdef ROM_SHAMD5IntUnregister
-#define MAP_SHAMD5IntUnregister \
-        ROM_SHAMD5IntUnregister
-#else
-#define MAP_SHAMD5IntUnregister \
-        SHAMD5IntUnregister
-#endif
-#ifdef ROM_SHAMD5ResultRead
-#define MAP_SHAMD5ResultRead \
-        ROM_SHAMD5ResultRead
-#else
-#define MAP_SHAMD5ResultRead \
-        SHAMD5ResultRead
-#endif
-
-//*****************************************************************************
-//
-// Macros for the CRC API.
-//
-//*****************************************************************************
-#ifdef ROM_CRCConfigSet
-#define MAP_CRCConfigSet \
-        ROM_CRCConfigSet
-#else
-#define MAP_CRCConfigSet \
-        CRCConfigSet
-#endif
-#ifdef ROM_CRCDataProcess
-#define MAP_CRCDataProcess \
-        ROM_CRCDataProcess
-#else
-#define MAP_CRCDataProcess \
-        CRCDataProcess
-#endif
-#ifdef ROM_CRCDataWrite
-#define MAP_CRCDataWrite \
-        ROM_CRCDataWrite
-#else
-#define MAP_CRCDataWrite \
-        CRCDataWrite
-#endif
-#ifdef ROM_CRCResultRead
-#define MAP_CRCResultRead \
-        ROM_CRCResultRead
-#else
-#define MAP_CRCResultRead \
-        CRCResultRead
-#endif
-#ifdef ROM_CRCSeedSet
-#define MAP_CRCSeedSet \
-        ROM_CRCSeedSet
-#else
-#define MAP_CRCSeedSet \
-        CRCSeedSet
-#endif
-
-//*****************************************************************************
-//
-// Macros for the SDHOST API.
-//
-//*****************************************************************************
-#ifdef ROM_SDHostCmdReset
-#define MAP_SDHostCmdReset \
-        ROM_SDHostCmdReset
-#else
-#define MAP_SDHostCmdReset \
-        SDHostCmdReset
-#endif
-#ifdef ROM_SDHostInit
-#define MAP_SDHostInit \
-        ROM_SDHostInit
-#else
-#define MAP_SDHostInit \
-        SDHostInit
-#endif
-#ifdef ROM_SDHostCmdSend
-#define MAP_SDHostCmdSend \
-        ROM_SDHostCmdSend
-#else
-#define MAP_SDHostCmdSend \
-        SDHostCmdSend
-#endif
-#ifdef ROM_SDHostIntRegister
-#define MAP_SDHostIntRegister \
-        ROM_SDHostIntRegister
-#else
-#define MAP_SDHostIntRegister \
-        SDHostIntRegister
-#endif
-#ifdef ROM_SDHostIntUnregister
-#define MAP_SDHostIntUnregister \
-        ROM_SDHostIntUnregister
-#else
-#define MAP_SDHostIntUnregister \
-        SDHostIntUnregister
-#endif
-#ifdef ROM_SDHostIntEnable
-#define MAP_SDHostIntEnable \
-        ROM_SDHostIntEnable
-#else
-#define MAP_SDHostIntEnable \
-        SDHostIntEnable
-#endif
-#ifdef ROM_SDHostIntDisable
-#define MAP_SDHostIntDisable \
-        ROM_SDHostIntDisable
-#else
-#define MAP_SDHostIntDisable \
-        SDHostIntDisable
-#endif
-#ifdef ROM_SDHostIntStatus
-#define MAP_SDHostIntStatus \
-        ROM_SDHostIntStatus
-#else
-#define MAP_SDHostIntStatus \
-        SDHostIntStatus
-#endif
-#ifdef ROM_SDHostIntClear
-#define MAP_SDHostIntClear \
-        ROM_SDHostIntClear
-#else
-#define MAP_SDHostIntClear \
-        SDHostIntClear
-#endif
-#ifdef ROM_SDHostRespStatus
-#define MAP_SDHostRespStatus \
-        ROM_SDHostRespStatus
-#else
-#define MAP_SDHostRespStatus \
-        SDHostRespStatus
-#endif
-#ifdef ROM_SDHostRespGet
-#define MAP_SDHostRespGet \
-        ROM_SDHostRespGet
-#else
-#define MAP_SDHostRespGet \
-        SDHostRespGet
-#endif
-#ifdef ROM_SDHostBlockSizeSet
-#define MAP_SDHostBlockSizeSet \
-        ROM_SDHostBlockSizeSet
-#else
-#define MAP_SDHostBlockSizeSet \
-        SDHostBlockSizeSet
-#endif
-#ifdef ROM_SDHostBlockCountSet
-#define MAP_SDHostBlockCountSet \
-        ROM_SDHostBlockCountSet
-#else
-#define MAP_SDHostBlockCountSet \
-        SDHostBlockCountSet
-#endif
-#ifdef ROM_SDHostDataNonBlockingWrite
-#define MAP_SDHostDataNonBlockingWrite \
-        ROM_SDHostDataNonBlockingWrite
-#else
-#define MAP_SDHostDataNonBlockingWrite \
-        SDHostDataNonBlockingWrite
-#endif
-#ifdef ROM_SDHostDataNonBlockingRead
-#define MAP_SDHostDataNonBlockingRead \
-        ROM_SDHostDataNonBlockingRead
-#else
-#define MAP_SDHostDataNonBlockingRead \
-        SDHostDataNonBlockingRead
-#endif
-#ifdef ROM_SDHostDataWrite
-#define MAP_SDHostDataWrite \
-        ROM_SDHostDataWrite
-#else
-#define MAP_SDHostDataWrite \
-        SDHostDataWrite
-#endif
-#ifdef ROM_SDHostDataRead
-#define MAP_SDHostDataRead \
-        ROM_SDHostDataRead
-#else
-#define MAP_SDHostDataRead \
-        SDHostDataRead
-#endif
-#ifdef ROM_SDHostSetExpClk
-#define MAP_SDHostSetExpClk \
-        ROM_SDHostSetExpClk
-#else
-#define MAP_SDHostSetExpClk \
-        SDHostSetExpClk
-#endif
-
-//*****************************************************************************
-//
-// Macros for the PRCM API.
-//
-//*****************************************************************************
-#ifdef ROM_PRCMMCUReset
-#define MAP_PRCMMCUReset \
-        ROM_PRCMMCUReset
-#else
-#define MAP_PRCMMCUReset \
-        PRCMMCUReset
-#endif
-#ifdef ROM_PRCMSysResetCauseGet
-#define MAP_PRCMSysResetCauseGet \
-        ROM_PRCMSysResetCauseGet
-#else
-#define MAP_PRCMSysResetCauseGet \
-        PRCMSysResetCauseGet
-#endif
-#ifdef ROM_PRCMPeripheralClkEnable
-#define MAP_PRCMPeripheralClkEnable \
-        ROM_PRCMPeripheralClkEnable
-#else
-#define MAP_PRCMPeripheralClkEnable \
-        PRCMPeripheralClkEnable
-#endif
-#ifdef ROM_PRCMPeripheralClkDisable
-#define MAP_PRCMPeripheralClkDisable \
-        ROM_PRCMPeripheralClkDisable
-#else
-#define MAP_PRCMPeripheralClkDisable \
-        PRCMPeripheralClkDisable
-#endif
-#ifdef ROM_PRCMPeripheralReset
-#define MAP_PRCMPeripheralReset \
-        ROM_PRCMPeripheralReset
-#else
-#define MAP_PRCMPeripheralReset \
-        PRCMPeripheralReset
-#endif
-#ifdef ROM_PRCMPeripheralStatusGet
-#define MAP_PRCMPeripheralStatusGet \
-        ROM_PRCMPeripheralStatusGet
-#else
-#define MAP_PRCMPeripheralStatusGet \
-        PRCMPeripheralStatusGet
-#endif
-#ifdef ROM_PRCMI2SClockFreqSet
-#define MAP_PRCMI2SClockFreqSet \
-        ROM_PRCMI2SClockFreqSet
-#else
-#define MAP_PRCMI2SClockFreqSet \
-        PRCMI2SClockFreqSet
-#endif
-#ifdef ROM_PRCMPeripheralClockGet
-#define MAP_PRCMPeripheralClockGet \
-        ROM_PRCMPeripheralClockGet
-#else
-#define MAP_PRCMPeripheralClockGet \
-        PRCMPeripheralClockGet
-#endif
-#ifdef ROM_PRCMSleepEnter
-#define MAP_PRCMSleepEnter \
-        ROM_PRCMSleepEnter
-#else
-#define MAP_PRCMSleepEnter \
-        PRCMSleepEnter
-#endif
-#ifdef ROM_PRCMDeepSleepEnter
-#define MAP_PRCMDeepSleepEnter \
-        ROM_PRCMDeepSleepEnter
-#else
-#define MAP_PRCMDeepSleepEnter \
-        PRCMDeepSleepEnter
-#endif
-#ifdef ROM_PRCMSRAMRetentionEnable
-#define MAP_PRCMSRAMRetentionEnable \
-        ROM_PRCMSRAMRetentionEnable
-#else
-#define MAP_PRCMSRAMRetentionEnable \
-        PRCMSRAMRetentionEnable
-#endif
-#ifdef ROM_PRCMSRAMRetentionDisable
-#define MAP_PRCMSRAMRetentionDisable \
-        ROM_PRCMSRAMRetentionDisable
-#else
-#define MAP_PRCMSRAMRetentionDisable \
-        PRCMSRAMRetentionDisable
-#endif
-#ifdef ROM_PRCMLPDSEnter
-#define MAP_PRCMLPDSEnter \
-        ROM_PRCMLPDSEnter
-#else
-#define MAP_PRCMLPDSEnter \
-        PRCMLPDSEnter
-#endif
-#ifdef ROM_PRCMLPDSIntervalSet
-#define MAP_PRCMLPDSIntervalSet \
-        ROM_PRCMLPDSIntervalSet
-#else
-#define MAP_PRCMLPDSIntervalSet \
-        PRCMLPDSIntervalSet
-#endif
-#ifdef ROM_PRCMLPDSWakeupSourceEnable
-#define MAP_PRCMLPDSWakeupSourceEnable \
-        ROM_PRCMLPDSWakeupSourceEnable
-#else
-#define MAP_PRCMLPDSWakeupSourceEnable \
-        PRCMLPDSWakeupSourceEnable
-#endif
-#ifdef ROM_PRCMLPDSWakeupCauseGet
-#define MAP_PRCMLPDSWakeupCauseGet \
-        ROM_PRCMLPDSWakeupCauseGet
-#else
-#define MAP_PRCMLPDSWakeupCauseGet \
-        PRCMLPDSWakeupCauseGet
-#endif
-#ifdef ROM_PRCMLPDSWakeUpGPIOSelect
-#define MAP_PRCMLPDSWakeUpGPIOSelect \
-        ROM_PRCMLPDSWakeUpGPIOSelect
-#else
-#define MAP_PRCMLPDSWakeUpGPIOSelect \
-        PRCMLPDSWakeUpGPIOSelect
-#endif
-#ifdef ROM_PRCMLPDSWakeupSourceDisable
-#define MAP_PRCMLPDSWakeupSourceDisable \
-        ROM_PRCMLPDSWakeupSourceDisable
-#else
-#define MAP_PRCMLPDSWakeupSourceDisable \
-        PRCMLPDSWakeupSourceDisable
-#endif
-#ifdef ROM_PRCMHibernateEnter
-#define MAP_PRCMHibernateEnter \
-        ROM_PRCMHibernateEnter
-#else
-#define MAP_PRCMHibernateEnter \
-        PRCMHibernateEnter
-#endif
-#ifdef ROM_PRCMHibernateWakeupSourceEnable
-#define MAP_PRCMHibernateWakeupSourceEnable \
-        ROM_PRCMHibernateWakeupSourceEnable
-#else
-#define MAP_PRCMHibernateWakeupSourceEnable \
-        PRCMHibernateWakeupSourceEnable
-#endif
-#ifdef ROM_PRCMHibernateWakeupCauseGet
-#define MAP_PRCMHibernateWakeupCauseGet \
-        ROM_PRCMHibernateWakeupCauseGet
-#else
-#define MAP_PRCMHibernateWakeupCauseGet \
-        PRCMHibernateWakeupCauseGet
-#endif
-#ifdef ROM_PRCMHibernateWakeUpGPIOSelect
-#define MAP_PRCMHibernateWakeUpGPIOSelect \
-        ROM_PRCMHibernateWakeUpGPIOSelect
-#else
-#define MAP_PRCMHibernateWakeUpGPIOSelect \
-        PRCMHibernateWakeUpGPIOSelect
-#endif
-#ifdef ROM_PRCMHibernateWakeupSourceDisable
-#define MAP_PRCMHibernateWakeupSourceDisable \
-        ROM_PRCMHibernateWakeupSourceDisable
-#else
-#define MAP_PRCMHibernateWakeupSourceDisable \
-        PRCMHibernateWakeupSourceDisable
-#endif
-#ifdef ROM_PRCMHibernateIntervalSet
-#define MAP_PRCMHibernateIntervalSet \
-        ROM_PRCMHibernateIntervalSet
-#else
-#define MAP_PRCMHibernateIntervalSet \
-        PRCMHibernateIntervalSet
-#endif
-#ifdef ROM_PRCMSlowClkCtrGet
-#define MAP_PRCMSlowClkCtrGet \
-        ROM_PRCMSlowClkCtrGet
-#else
-#define MAP_PRCMSlowClkCtrGet \
-        PRCMSlowClkCtrGet
-#endif
-#ifdef ROM_PRCMSlowClkCtrMatchSet
-#define MAP_PRCMSlowClkCtrMatchSet \
-        ROM_PRCMSlowClkCtrMatchSet
-#else
-#define MAP_PRCMSlowClkCtrMatchSet \
-        PRCMSlowClkCtrMatchSet
-#endif
-#ifdef ROM_PRCMSlowClkCtrMatchGet
-#define MAP_PRCMSlowClkCtrMatchGet \
-        ROM_PRCMSlowClkCtrMatchGet
-#else
-#define MAP_PRCMSlowClkCtrMatchGet \
-        PRCMSlowClkCtrMatchGet
-#endif
-#ifdef ROM_PRCMOCRRegisterWrite
-#define MAP_PRCMOCRRegisterWrite \
-        ROM_PRCMOCRRegisterWrite
-#else
-#define MAP_PRCMOCRRegisterWrite \
-        PRCMOCRRegisterWrite
-#endif
-#ifdef ROM_PRCMOCRRegisterRead
-#define MAP_PRCMOCRRegisterRead \
-        ROM_PRCMOCRRegisterRead
-#else
-#define MAP_PRCMOCRRegisterRead \
-        PRCMOCRRegisterRead
-#endif
-#ifdef ROM_PRCMIntRegister
-#define MAP_PRCMIntRegister \
-        ROM_PRCMIntRegister
-#else
-#define MAP_PRCMIntRegister \
-        PRCMIntRegister
-#endif
-#ifdef ROM_PRCMIntUnregister
-#define MAP_PRCMIntUnregister \
-        ROM_PRCMIntUnregister
-#else
-#define MAP_PRCMIntUnregister \
-        PRCMIntUnregister
-#endif
-#ifdef ROM_PRCMIntEnable
-#define MAP_PRCMIntEnable \
-        ROM_PRCMIntEnable
-#else
-#define MAP_PRCMIntEnable \
-        PRCMIntEnable
-#endif
-#ifdef ROM_PRCMIntDisable
-#define MAP_PRCMIntDisable \
-        ROM_PRCMIntDisable
-#else
-#define MAP_PRCMIntDisable \
-        PRCMIntDisable
-#endif
-#ifdef ROM_PRCMIntStatus
-#define MAP_PRCMIntStatus \
-        ROM_PRCMIntStatus
-#else
-#define MAP_PRCMIntStatus \
-        PRCMIntStatus
-#endif
-#ifdef ROM_PRCMRTCInUseSet
-#define MAP_PRCMRTCInUseSet \
-        ROM_PRCMRTCInUseSet
-#else
-#define MAP_PRCMRTCInUseSet \
-        PRCMRTCInUseSet
-#endif
-#ifdef ROM_PRCMRTCInUseGet
-#define MAP_PRCMRTCInUseGet \
-        ROM_PRCMRTCInUseGet
-#else
-#define MAP_PRCMRTCInUseGet \
-        PRCMRTCInUseGet
-#endif
-#ifdef ROM_PRCMRTCSet
-#define MAP_PRCMRTCSet \
-        ROM_PRCMRTCSet
-#else
-#define MAP_PRCMRTCSet \
-        PRCMRTCSet
-#endif
-#ifdef ROM_PRCMRTCGet
-#define MAP_PRCMRTCGet \
-        ROM_PRCMRTCGet
-#else
-#define MAP_PRCMRTCGet \
-        PRCMRTCGet
-#endif
-#ifdef ROM_PRCMRTCMatchSet
-#define MAP_PRCMRTCMatchSet \
-        ROM_PRCMRTCMatchSet
-#else
-#define MAP_PRCMRTCMatchSet \
-        PRCMRTCMatchSet
-#endif
-#ifdef ROM_PRCMRTCMatchGet
-#define MAP_PRCMRTCMatchGet \
-        ROM_PRCMRTCMatchGet
-#else
-#define MAP_PRCMRTCMatchGet \
-        PRCMRTCMatchGet
-#endif
-#ifdef ROM_PRCMLPDSRestoreInfoSet
-#define MAP_PRCMLPDSRestoreInfoSet \
-        ROM_PRCMLPDSRestoreInfoSet
-#else
-#define MAP_PRCMLPDSRestoreInfoSet \
-        PRCMLPDSRestoreInfoSet
-#endif
-
-#ifdef ROM_PRCMHIBRegRead
-#define MAP_PRCMHIBRegRead \
-        ROM_PRCMHIBRegRead
-#else
-#define MAP_PRCMHIBRegRead \
-        PRCMHIBRegRead
-#endif
-
-#ifdef ROM_PRCMHIBRegWrite
-#define MAP_PRCMHIBRegWrite \
-        ROM_PRCMHIBRegWrite
-#else
-#define MAP_PRCMHIBRegWrite \
-        PRCMHIBRegWrite
-#endif
-
-//*****************************************************************************
-//
-// Macros for the HWSPINLOCK API.
-//
-//*****************************************************************************
-#ifdef ROM_HwSpinLockAcquire
-#define MAP_HwSpinLockAcquire \
-        ROM_HwSpinLockAcquire
-#else
-#define MAP_HwSpinLockAcquire \
-        HwSpinLockAcquire
-#endif
-#ifdef ROM_HwSpinLockTryAcquire
-#define MAP_HwSpinLockTryAcquire \
-        ROM_HwSpinLockTryAcquire
-#else
-#define MAP_HwSpinLockTryAcquire \
-        HwSpinLockTryAcquire
-#endif
-#ifdef ROM_HwSpinLockRelease
-#define MAP_HwSpinLockRelease \
-        ROM_HwSpinLockRelease
-#else
-#define MAP_HwSpinLockRelease \
-        HwSpinLockRelease
-#endif
-#ifdef ROM_HwSpinLockTest
-#define MAP_HwSpinLockTest \
-        ROM_HwSpinLockTest
-#else
-#define MAP_HwSpinLockTest \
-        HwSpinLockTest
-#endif
-
-//*****************************************************************************
-//
-// Macros for the ADC API.
-//
-//*****************************************************************************
-#ifdef ROM_ADCEnable
-#define MAP_ADCEnable \
-        ROM_ADCEnable
-#else
-#define MAP_ADCEnable \
-        ADCEnable
-#endif
-#ifdef ROM_ADCDisable
-#define MAP_ADCDisable \
-        ROM_ADCDisable
-#else
-#define MAP_ADCDisable \
-        ADCDisable
-#endif
-#ifdef ROM_ADCChannelEnable
-#define MAP_ADCChannelEnable \
-        ROM_ADCChannelEnable
-#else
-#define MAP_ADCChannelEnable \
-        ADCChannelEnable
-#endif
-#ifdef ROM_ADCChannelDisable
-#define MAP_ADCChannelDisable \
-        ROM_ADCChannelDisable
-#else
-#define MAP_ADCChannelDisable \
-        ADCChannelDisable
-#endif
-#ifdef ROM_ADCIntRegister
-#define MAP_ADCIntRegister \
-        ROM_ADCIntRegister
-#else
-#define MAP_ADCIntRegister \
-        ADCIntRegister
-#endif
-#ifdef ROM_ADCIntUnregister
-#define MAP_ADCIntUnregister \
-        ROM_ADCIntUnregister
-#else
-#define MAP_ADCIntUnregister \
-        ADCIntUnregister
-#endif
-#ifdef ROM_ADCIntEnable
-#define MAP_ADCIntEnable \
-        ROM_ADCIntEnable
-#else
-#define MAP_ADCIntEnable \
-        ADCIntEnable
-#endif
-#ifdef ROM_ADCIntDisable
-#define MAP_ADCIntDisable \
-        ROM_ADCIntDisable
-#else
-#define MAP_ADCIntDisable \
-        ADCIntDisable
-#endif
-#ifdef ROM_ADCIntStatus
-#define MAP_ADCIntStatus \
-        ROM_ADCIntStatus
-#else
-#define MAP_ADCIntStatus \
-        ADCIntStatus
-#endif
-#ifdef ROM_ADCIntClear
-#define MAP_ADCIntClear \
-        ROM_ADCIntClear
-#else
-#define MAP_ADCIntClear \
-        ADCIntClear
-#endif
-#ifdef ROM_ADCDMAEnable
-#define MAP_ADCDMAEnable \
-        ROM_ADCDMAEnable
-#else
-#define MAP_ADCDMAEnable \
-        ADCDMAEnable
-#endif
-#ifdef ROM_ADCDMADisable
-#define MAP_ADCDMADisable \
-        ROM_ADCDMADisable
-#else
-#define MAP_ADCDMADisable \
-        ADCDMADisable
-#endif
-#ifdef ROM_ADCChannelGainSet
-#define MAP_ADCChannelGainSet \
-        ROM_ADCChannelGainSet
-#else
-#define MAP_ADCChannelGainSet \
-        ADCChannelGainSet
-#endif
-#ifdef ROM_ADCChannleGainGet
-#define MAP_ADCChannleGainGet \
-        ROM_ADCChannleGainGet
-#else
-#define MAP_ADCChannleGainGet \
-        ADCChannleGainGet
-#endif
-#ifdef ROM_ADCTimerConfig
-#define MAP_ADCTimerConfig \
-        ROM_ADCTimerConfig
-#else
-#define MAP_ADCTimerConfig \
-        ADCTimerConfig
-#endif
-#ifdef ROM_ADCTimerEnable
-#define MAP_ADCTimerEnable \
-        ROM_ADCTimerEnable
-#else
-#define MAP_ADCTimerEnable \
-        ADCTimerEnable
-#endif
-#ifdef ROM_ADCTimerDisable
-#define MAP_ADCTimerDisable \
-        ROM_ADCTimerDisable
-#else
-#define MAP_ADCTimerDisable \
-        ADCTimerDisable
-#endif
-#ifdef ROM_ADCTimerReset
-#define MAP_ADCTimerReset \
-        ROM_ADCTimerReset
-#else
-#define MAP_ADCTimerReset \
-        ADCTimerReset
-#endif
-#ifdef ROM_ADCTimerValueGet
-#define MAP_ADCTimerValueGet \
-        ROM_ADCTimerValueGet
-#else
-#define MAP_ADCTimerValueGet \
-        ADCTimerValueGet
-#endif
-#ifdef ROM_ADCFIFOLvlGet
-#define MAP_ADCFIFOLvlGet \
-        ROM_ADCFIFOLvlGet
-#else
-#define MAP_ADCFIFOLvlGet \
-        ADCFIFOLvlGet
-#endif
-#ifdef ROM_ADCFIFORead
-#define MAP_ADCFIFORead \
-        ROM_ADCFIFORead
-#else
-#define MAP_ADCFIFORead \
-        ADCFIFORead
-#endif
-
-#endif // __ROM_MAP_H__
diff --git a/ports/cc3200/hal/rom_patch.h b/ports/cc3200/hal/rom_patch.h
deleted file mode 100644
index 9fb8017f8e2dd..0000000000000
--- a/ports/cc3200/hal/rom_patch.h
+++ /dev/null
@@ -1,98 +0,0 @@
-//*****************************************************************************
-//
-//  rom_patch.h
-//
-//  Macros to facilitate patching driverlib API's in the ROM.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// List of API's in the ROM that need to be patched.
-// For e.g. to patch ROM_UARTCharPut add the line #undef ROM_UARTCharPut
-//*****************************************************************************
-#undef ROM_ADCIntClear
-#undef ROM_IntEnable
-#undef ROM_IntDisable
-#undef ROM_IntPendSet
-#undef ROM_SDHostCardErrorMaskSet
-#undef ROM_SDHostCardErrorMaskGet
-#undef ROM_TimerConfigure
-#undef ROM_TimerDMAEventSet
-#undef ROM_TimerDMAEventGet
-#undef ROM_SDHostDataNonBlockingWrite
-#undef ROM_SDHostDataWrite
-#undef ROM_SDHostDataRead
-#undef ROM_SDHostDataNonBlockingRead
-#undef ROM_PRCMSysResetCauseGet
-#undef ROM_PRCMPeripheralClkEnable
-#undef ROM_PRCMLPDSWakeUpGPIOSelect
-#undef ROM_PRCMHibernateWakeupSourceEnable
-#undef ROM_PRCMHibernateWakeupSourceDisable
-#undef ROM_PRCMHibernateWakeupCauseGet
-#undef ROM_PRCMHibernateIntervalSet
-#undef ROM_PRCMHibernateWakeUpGPIOSelect
-#undef ROM_PRCMHibernateEnter
-#undef ROM_PRCMSlowClkCtrGet
-#undef ROM_PRCMSlowClkCtrMatchSet
-#undef ROM_PRCMSlowClkCtrMatchGet
-#undef ROM_PRCMOCRRegisterWrite
-#undef ROM_PRCMOCRRegisterRead
-#undef ROM_PRCMIntEnable
-#undef ROM_PRCMIntDisable
-#undef ROM_PRCMRTCInUseSet
-#undef ROM_PRCMRTCInUseGet
-#undef ROM_PRCMRTCSet
-#undef ROM_PRCMRTCGet
-#undef ROM_PRCMRTCMatchSet
-#undef ROM_PRCMRTCMatchGet
-#undef ROM_PRCMPeripheralClkDisable
-#undef ROM_PRCMPeripheralReset
-#undef ROM_PRCMPeripheralStatusGet
-#undef ROM_SPIConfigSetExpClk
-#undef ROM_GPIODirModeGet
-#undef ROM_GPIOIntTypeGet
-#undef ROM_I2CMasterInitExpClk
-#undef ROM_AESDataProcess
-#undef ROM_DESDataProcess
-#undef ROM_I2SEnable
-#undef ROM_I2SConfigSetExpClk
-#undef ROM_PinConfigSet
-#undef ROM_PRCMLPDSEnter
-#undef ROM_PRCMCC3200MCUInit
-#undef ROM_SDHostIntStatus
-#undef ROM_SDHostBlockCountSet
-#undef ROM_UARTModemControlSet
-#undef ROM_UARTModemControlClear
-
diff --git a/ports/cc3200/hal/sdhost.c b/ports/cc3200/hal/sdhost.c
deleted file mode 100644
index ba98e359ead12..0000000000000
--- a/ports/cc3200/hal/sdhost.c
+++ /dev/null
@@ -1,744 +0,0 @@
-//*****************************************************************************
-//
-//  sdhost.c
-//
-//  Driver for the SD Host (SDHost) Interface
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup Secure_Digital_Host_api
-//! @{
-//
-//*****************************************************************************
-
-#include "inc/hw_types.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_mmchs.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_apps_config.h"
-#include "interrupt.h"
-#include "sdhost.h"
-
-
-//*****************************************************************************
-//
-//! Configures SDHost module.
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function configures the SDHost module, enabling internal sub-modules.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostInit(unsigned long ulBase)
-{
-  //
-  // Assert module reset
-  //
-  HWREG(ulBase + MMCHS_O_SYSCONFIG) = 0x2;
-
-  //
-  // Wait for soft reset to complete
-  //
-  while( !(HWREG(ulBase + MMCHS_O_SYSCONFIG) & 0x1) )
-  {
-
-  }
-
-  //
-  // Assert internal reset
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= (1 << 24);
-
-  //
-  // Wait for Reset to complete
-  //
-  while( (HWREG(ulBase + MMCHS_O_SYSCTL) & (0x1 << 24)) )
-  {
-
-  }
-
-  //
-  // Set capability register, 1.8 and 3.0 V
-  //
-  HWREG(ulBase + MMCHS_O_CAPA) = (0x7 <<24);
-
-  //
-  // Select bus voltage, 3.0 V
-  //
-  HWREG(ulBase + MMCHS_O_HCTL) |= 0x7 << 9;
-
-  //
-  // Power up the bus
-  //
-  HWREG(ulBase + MMCHS_O_HCTL) |= 1 << 8;
-
-  //
-  // Wait for power on
-  //
-  while( !(HWREG(ulBase + MMCHS_O_HCTL) & (1<<8)) )
-  {
-
-  }
-
-  HWREG(ulBase + MMCHS_O_CON) |= 1 << 21;
-
-  //
-  // Un-mask all events
-  //
-  HWREG(ulBase + MMCHS_O_IE) = 0xFFFFFFFF;
-}
-
-
-//*****************************************************************************
-//
-//! Resets SDHost command line
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function assers a soft reset for the command line
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostCmdReset(unsigned long ulBase)
-{
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 1 << 25;
-  while( (HWREG(ulBase + MMCHS_O_SYSCTL) & (1 << 25)) )
-  {
-
-  }
-}
-
-//*****************************************************************************
-//
-//! Sends command over SDHost interface
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulCmd is the command to send.
-//! \param ulArg is the argument for the command.
-//!
-//! This function send command to the attached card over the SDHost interface.
-//!
-//! The \e ulCmd parameter can be one of \b SDHOST_CMD_0 to \b SDHOST_CMD_63.
-//! It can be logically ORed with one or more of the following:
-//! - \b SDHOST_MULTI_BLK for multi-block transfer
-//! - \b SDHOST_WR_CMD          if command is followed by write data
-//! - \b SDHOST_RD_CMD          if command is followed by read data
-//! - \b SDHOST_DMA_EN          if SDHost need to generate DMA request.
-//! - \b SDHOST_RESP_LEN_136    if 136 bit response is expected
-//! - \b SDHOST_RESP_LEN_48     if 48 bit response is expected
-//! - \b SDHOST_RESP_LEN_48B    if 48 bit response with busy bit is expected
-//!
-//! The parameter \e ulArg is the argument for the command
-//!
-//! \return Returns 0 on success, -1 otherwise.
-//
-//*****************************************************************************
-long
-SDHostCmdSend(unsigned long ulBase, unsigned long ulCmd, unsigned ulArg)
-{
-  //
-  // Set Data Timeout
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x000E0000;
-
-  //
-  // Check for cmd inhabit
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & 0x1))
-  {
-    return -1;
-  }
-
-  //
-  // Set the argument
-  //
-  HWREG(ulBase + MMCHS_O_ARG) = ulArg;
-
-  //
-  // Send the command
-  //
-  HWREG(ulBase + MMCHS_O_CMD) = ulCmd;
-
-  return 0;
-}
-
-//*****************************************************************************
-//
-//! Writes a data word into the SDHost write buffer.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulData is data word to be transfered.
-//!
-//! This function writes a single data word into the SDHost write buffer. The
-//! function returns \b true if there was a space available in the buffer else
-//! returns \b false.
-//!
-//! \return Return \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean
-SDHostDataNonBlockingWrite(unsigned long ulBase, unsigned long ulData)
-{
-
-  //
-  // See if there is a space in the write buffer
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & (1<<10)) )
-  {
-    //
-    // Write the data into the buffer
-    //
-    HWREG(ulBase + MMCHS_O_DATA) = ulData;
-
-    //
-    // Success.
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // No free sapce, failure.
-    //
-    return(false);
-  }
-}
-
-//*****************************************************************************
-//
-//! Waits to write a data word into the SDHost write buffer.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulData is data word to be transfered.
-//!
-//! This function writes \e ulData into the SDHost write buffer. If there is no
-//! space in the write buffer this function waits until there is a space
-//! available before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostDataWrite(unsigned long ulBase, unsigned long ulData)
-{
-  //
-  // Wait until space is available
-  //
-  while( !(HWREG(ulBase + MMCHS_O_PSTATE) & (1<<10)) )
-  {
-
-  }
-
-  //
-  // Write the data
-  //
-  HWREG(ulBase + MMCHS_O_DATA) = ulData;
-}
-
-
-//*****************************************************************************
-//
-//! Waits for a data word from the SDHost read buffer
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param pulData is pointer to read data variable.
-//!
-//! This function reads a single data word from the SDHost read buffer. If there
-//! is no data available in the buffer the function will wait until a data
-//! word is received before returning.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostDataRead(unsigned long ulBase, unsigned long *pulData)
-{
-  //
-  // Wait until data is available
-  //
-  while( !(HWREG(ulBase + MMCHS_O_PSTATE) & (1<<11)) )
-  {
-
-  }
-
-  //
-  // Read the data
-  //
-  *pulData = HWREG(ulBase + MMCHS_O_DATA);
-}
-
-//*****************************************************************************
-//
-//! Reads single data word from the SDHost read buffer
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param pulData is pointer to read data variable.
-//!
-//! This function reads a data word from the SDHost read buffer. The
-//! function returns \b true if there was data available in to buffer else
-//! returns \b false.
-//!
-//! \return Return \b true on success, \b false otherwise.
-//
-//*****************************************************************************
-tBoolean
-SDHostDataNonBlockingRead(unsigned long ulBase, unsigned long *pulData)
-{
-
-  //
-  // See if there is any data in the read buffer.
-  //
-  if( (HWREG(ulBase + MMCHS_O_PSTATE) & (1<11)) )
-  {
-    //
-    // Read the data word.
-    //
-    *pulData = HWREG(ulBase + MMCHS_O_DATA);
-
-    //
-    // Success
-    //
-    return(true);
-  }
-  else
-  {
-    //
-    // No data available, failure.
-    //
-    return(false);
-  }
-}
-
-
-//*****************************************************************************
-//
-//! Registers the interrupt handler for SDHost interrupt
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param pfnHandler is a pointer to the function to be called when the
-//! SDHost interrupt occurs.
-//!
-//! This function does the actual registering of the interrupt handler.  This
-//! function enables the global interrupt in the interrupt controller; specific
-//! SDHost interrupts must be enabled via SDHostIntEnable(). It is the
-//! interrupt handler's responsibility to clear the interrupt source.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
-{
-  //
-  // Register the interrupt handler.
-  //
-  IntRegister(INT_MMCHS, pfnHandler);
-
-  //
-  // Enable the SDHost interrupt.
-  //
-  IntEnable(INT_MMCHS);
-}
-
-//*****************************************************************************
-//
-//! Unregisters the interrupt handler for SDHost interrupt
-//!
-//! \param ulBase is the base address of SDHost module
-//!
-//! This function does the actual unregistering of the interrupt handler.  It
-//! clears the handler to be called when a SDHost interrupt occurs.  This
-//! function also masks off the interrupt in the interrupt controller so that
-//! the interrupt handler no longer is called.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntUnregister(unsigned long ulBase)
-{
-  //
-  // Disable the SDHost interrupt.
-  //
-  IntDisable(INT_MMCHS);
-
-  //
-  // Unregister the interrupt handler.
-  //
-  IntUnregister(INT_MMCHS);
-}
-
-//*****************************************************************************
-//
-//! Enable individual interrupt source for the specified SDHost
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
-//!
-//! This function enables the indicated SDHost interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter is the logical OR of any of the following:
-//! - \b SDHOST_INT_CC    Command Complete interrupt
-//! - \b SDHOST_INT_TC    Transfer Complete interrupt
-//! - \b SDHOST_INT_BWR   Buffer Write Ready interrupt
-//! - \b SDHOST_INT_BRR   Buffer Read Ready interrupt
-//! - \b SDHOST_INT_ERRI  Error interrupt
-//! - \b SDHOST_INT_CTO   Command Timeout error interrupt
-//! - \b SDHOST_INT_CEB   Command End Bit error interrupt
-//! - \b SDHOST_INT_DTO   Data Timeout error interrupt
-//! - \b SDHOST_INT_DCRC  Data CRC error interrupt
-//! - \b SDHOST_INT_DEB   Data End Bit error
-//! - \b SDHOST_INT_CERR  Cart Status Error interrupt
-//! - \b SDHOST_INT_BADA  Bad Data error interrupt
-//! - \b SDHOST_INT_DMARD Read DMA done interrupt
-//! - \b SDHOST_INT_DMAWR Write DMA done interrupt
-//!
-//!     Note that SDHOST_INT_ERRI can only be used with \sa SDHostIntStatus()
-//! and is internally logical OR of all error status bits. Setting this bit
-//! alone as \e ulIntFlags doesn't generates any interrupt.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntEnable(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Enable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) =
-                                                          (ulIntFlags >> 30);
-
-  //
-  // Enable the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_ISE) |= (ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Enable individual interrupt source for the specified SDHost
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
-//!
-//! This function disables the indicated SDHost interrupt sources.  Only the
-//! sources that are enabled can be reflected to the processor interrupt;
-//! disabled sources have no effect on the processor.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to SDHostIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntDisable(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Disable DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) =
-                                                          (ulIntFlags >> 30);
-  //
-  // Disable the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_ISE) &= ~(ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Gets the current interrupt status.
-//!
-//! \param ulBase is the base address of SDHost module.
-//!
-//! This function returns the interrupt status for the specified SDHost.
-//!
-//! \return Returns the current interrupt status, enumerated as a bit field of
-//! values described in SDHostIntEnable().
-//
-//*****************************************************************************
-unsigned long
-SDHostIntStatus(unsigned long ulBase)
-{
-  unsigned long ulIntStatus;
-
-  //
-  // Get DMA done interrupt status
-  //
-  ulIntStatus = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW);
-  ulIntStatus = (ulIntStatus << 30);
-
-  //
-  // Return the status of individual interrupt sources
-  //
-  ulIntStatus |= (HWREG(ulBase + MMCHS_O_STAT) & 0x3FFFFFFF);
-
-  return(ulIntStatus);
-}
-
-//*****************************************************************************
-//
-//! Clears the individual interrupt sources.
-//!
-//! \param ulBase is the base address of SDHost module.
-//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
-//!
-//! The specified SDHost interrupt sources are cleared, so that they no longer
-//! assert.  This function must be called in the interrupt handler to keep the
-//! interrupt from being recognized again immediately upon exit.
-//!
-//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
-//! parameter to SDHostIntEnable().
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags)
-{
-  //
-  // Clear DMA done interrupts
-  //
-  HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) =
-                                                          (ulIntFlags >> 30);
-  //
-  // Clear the individual interrupt sources
-  //
-  HWREG(ulBase + MMCHS_O_STAT) = (ulIntFlags & 0x3FFFFFFF);
-}
-
-//*****************************************************************************
-//
-//! Sets the card status error mask.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulErrMask is the bit mask of card status errors to be enabled
-//!
-//! This function sets the card status error mask for response type R1, R1b,
-//! R5, R5b and R6 response. The parameter \e ulErrMask is the bit mask of card
-//! status errors to be enabled, if the corresponding bits in the 'card status'
-//! field of a respose are set then the host controller indicates a card error
-//! interrupt status. Only bits referenced as type E (error) in status field in
-//! the response can set a card status error.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SDHostCardErrorMaskSet(unsigned long ulBase, unsigned long ulErrMask)
-{
-  //
-  // Set the card status error mask
-  //
-  HWREG(ulBase + MMCHS_O_CSRE) = ulErrMask;
-}
-
-
-//*****************************************************************************
-//
-//! Gets the card status error mask.
-//!
-//! \param ulBase is the base address of SDHost module
-//!
-//! This function gets the card status error mask for response type R1, R1b,
-//! R5, R5b and R6 response.
-//!
-//! \return Returns the current card status error.
-//
-//*****************************************************************************
-unsigned long
-SDHostCardErrorMaskGet(unsigned long ulBase)
-{
-  //
-  // Return the card status error mask
-  //
-  return(HWREG(ulBase + MMCHS_O_CSRE));
-}
-
-//*****************************************************************************
-//
-//! Sets the SD Card clock.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulSDHostClk is the rate of clock supplied to SDHost module
-//! \param ulCardClk is the required SD interface clock
-//!
-//! This function configures the SDHost interface to supply the specified clock
-//! to the connected card.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostSetExpClk(unsigned long ulBase, unsigned long ulSDHostClk,
-             unsigned long ulCardClk)
-{
-  unsigned long ulDiv;
-
-  //
-  // Disable card clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) &= ~0x4;
-
-  //
-  // Enable internal clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x1;
-
-  ulDiv = ((ulSDHostClk/ulCardClk) & 0x3FF);
-
-  //
-  // Set clock divider,
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) = ((HWREG(ulBase + MMCHS_O_SYSCTL) &
-                                     ~0x0000FFC0)| (ulDiv) << 6);
-
-  //
-  // Wait for clock to stablize
-  //
-  while( !(HWREG(ulBase + MMCHS_O_SYSCTL) & 0x2) )
-  {
-
-  }
-
-  //
-  // Enable card clock
-  //
-  HWREG(ulBase + MMCHS_O_SYSCTL) |= 0x4;
-}
-
-//*****************************************************************************
-//
-//! Get the response for the last command.
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulRespnse is 128-bit response.
-//!
-//! This function gets the response from the SD card for the last command
-//! send.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostRespGet(unsigned long ulBase, unsigned long ulRespnse[4])
-{
-
-  //
-  // Read the responses.
-  //
-  ulRespnse[0] = HWREG(ulBase + MMCHS_O_RSP10);
-  ulRespnse[1] = HWREG(ulBase + MMCHS_O_RSP32);
-  ulRespnse[2] = HWREG(ulBase + MMCHS_O_RSP54);
-  ulRespnse[3] = HWREG(ulBase + MMCHS_O_RSP76);
-
-}
-
-//*****************************************************************************
-//
-//! Set the block size for data transfer
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulBlkSize is the transfer block size in bytes
-//!
-//! This function sets the block size the data transfer.
-//!
-//! The parameter \e ulBlkSize is size of each data block in bytes.
-//! This should be in range 0 - 2^10.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostBlockSizeSet(unsigned long ulBase, unsigned short ulBlkSize)
-{
-  //
-  // Set the block size
-  //
-  HWREG(ulBase + MMCHS_O_BLK) = ((HWREG(ulBase + MMCHS_O_BLK) & 0x00000FFF)|
-                                  (ulBlkSize & 0xFFF));
-}
-
-//*****************************************************************************
-//
-//! Set the block size and count for data transfer
-//!
-//! \param ulBase is the base address of SDHost module
-//! \param ulBlkCount is the number of blocks
-//!
-//! This function sets block count for the data transfer. This needs to be set
-//! for each block transfer. \sa SDHostBlockSizeSet()
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SDHostBlockCountSet(unsigned long ulBase, unsigned short ulBlkCount)
-{
-  unsigned long ulRegVal;
-
-  //
-  // Read the current value
-  //
-  ulRegVal = HWREG(ulBase + MMCHS_O_BLK);
-
-  //
-  // Set the number of blocks
-  //
-  HWREG(ulBase + MMCHS_O_BLK) = ((ulRegVal & 0x0000FFFF)|
-                                  (ulBlkCount << 16));
-}
-
-//*****************************************************************************
-//
-// Close the Doxygen group.
-//! @}
-//
-//*****************************************************************************
diff --git a/ports/cc3200/hal/sdhost.h b/ports/cc3200/hal/sdhost.h
deleted file mode 100644
index d0d3984973198..0000000000000
--- a/ports/cc3200/hal/sdhost.h
+++ /dev/null
@@ -1,204 +0,0 @@
-//*****************************************************************************
-//
-//  sdhost.h
-//
-//  Defines and Macros for the SDHost.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-#ifndef __SDHOST_H__
-#define __SDHOST_H__
-
-
-//*****************************************************************************
-//
-// If building with a C++ compiler, make all of the definitions in this header
-// have a C binding.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-extern "C"
-//{
-#endif
-
-
-//*****************************************************************************
-// Values that can be passed to SDHostRespGet().
-//*****************************************************************************
-#define SDHOST_RESP_10 0x00000003
-#define SDHOST_RESP_32 0x00000002
-#define SDHOST_RESP_54 0x00000001
-#define SDHOST_RESP_76 0x00000000
-
-
-//*****************************************************************************
-// Values that can be passed to SDHostIntEnable(), SDHostIntDisable(),
-// SDHostIntClear() ,and returned from SDHostIntStatus().
-//*****************************************************************************
-#define SDHOST_INT_CC    0x00000001
-#define SDHOST_INT_TC    0x00000002
-#define SDHOST_INT_BWR   0x00000010
-#define SDHOST_INT_BRR   0x00000020
-#define SDHOST_INT_ERRI  0x00008000
-#define SDHOST_INT_CTO   0x00010000
-#define SDHOST_INT_CEB   0x00040000
-#define SDHOST_INT_DTO   0x00100000
-#define SDHOST_INT_DCRC  0x00200000
-#define SDHOST_INT_DEB   0x00400000
-#define SDHOST_INT_CERR  0x10000000
-#define SDHOST_INT_BADA  0x20000000
-#define SDHOST_INT_DMARD 0x40000000
-#define SDHOST_INT_DMAWR 0x80000000
-
-//*****************************************************************************
-// Values that can be passed to SDHostCmdSend().
-//*****************************************************************************
-#define SDHOST_CMD_0     0x00000000
-#define SDHOST_CMD_1     0x01000000
-#define SDHOST_CMD_2     0x02000000
-#define SDHOST_CMD_3     0x03000000
-#define SDHOST_CMD_4     0x04000000
-#define SDHOST_CMD_5     0x05000000
-#define SDHOST_CMD_6     0x06000000
-#define SDHOST_CMD_7     0x07000000
-#define SDHOST_CMD_8     0x08000000
-#define SDHOST_CMD_9     0x09000000
-#define SDHOST_CMD_10    0x0A000000
-#define SDHOST_CMD_11    0x0B000000
-#define SDHOST_CMD_12    0x0C000000
-#define SDHOST_CMD_13    0x0D000000
-#define SDHOST_CMD_14    0x0E000000
-#define SDHOST_CMD_15    0x0F000000
-#define SDHOST_CMD_16    0x10000000
-#define SDHOST_CMD_17    0x11000000
-#define SDHOST_CMD_18    0x12000000
-#define SDHOST_CMD_19    0x13000000
-#define SDHOST_CMD_20    0x14000000
-#define SDHOST_CMD_21    0x15000000
-#define SDHOST_CMD_22    0x16000000
-#define SDHOST_CMD_23    0x17000000
-#define SDHOST_CMD_24    0x18000000
-#define SDHOST_CMD_25    0x19000000
-#define SDHOST_CMD_26    0x1A000000
-#define SDHOST_CMD_27    0x1B000000
-#define SDHOST_CMD_28    0x1C000000
-#define SDHOST_CMD_29    0x1D000000
-#define SDHOST_CMD_30    0x1E000000
-#define SDHOST_CMD_31    0x1F000000
-#define SDHOST_CMD_32    0x20000000
-#define SDHOST_CMD_33    0x21000000
-#define SDHOST_CMD_34    0x22000000
-#define SDHOST_CMD_35    0x23000000
-#define SDHOST_CMD_36    0x24000000
-#define SDHOST_CMD_37    0x25000000
-#define SDHOST_CMD_38    0x26000000
-#define SDHOST_CMD_39    0x27000000
-#define SDHOST_CMD_40    0x28000000
-#define SDHOST_CMD_41    0x29000000
-#define SDHOST_CMD_42    0x2A000000
-#define SDHOST_CMD_43    0x2B000000
-#define SDHOST_CMD_44    0x2C000000
-#define SDHOST_CMD_45    0x2D000000
-#define SDHOST_CMD_46    0x2E000000
-#define SDHOST_CMD_47    0x2F000000
-#define SDHOST_CMD_48    0x30000000
-#define SDHOST_CMD_49    0x31000000
-#define SDHOST_CMD_50    0x32000000
-#define SDHOST_CMD_51    0x33000000
-#define SDHOST_CMD_52    0x34000000
-#define SDHOST_CMD_53    0x35000000
-#define SDHOST_CMD_54    0x36000000
-#define SDHOST_CMD_55    0x37000000
-#define SDHOST_CMD_56    0x38000000
-#define SDHOST_CMD_57    0x39000000
-#define SDHOST_CMD_58    0x3A000000
-#define SDHOST_CMD_59    0x3B000000
-#define SDHOST_CMD_60    0x3C000000
-#define SDHOST_CMD_61    0x3D000000
-#define SDHOST_CMD_62    0x3E000000
-#define SDHOST_CMD_63    0x3F000000
-
-//*****************************************************************************
-// Values that can be logically ORed with ulCmd parameter for SDHostCmdSend().
-//*****************************************************************************
-#define SDHOST_MULTI_BLK    0x00000022
-#define SDHOST_DMA_EN       0x00000001
-#define SDHOST_WR_CMD       0x00200000
-#define SDHOST_RD_CMD       0x00200010
-#define SDHOST_RESP_LEN_136 0x00010000
-#define SDHOST_RESP_LEN_48  0x00020000
-#define SDHOST_RESP_LEN_48B 0x00030000
-
-
-//*****************************************************************************
-//
-// API Function prototypes
-//
-//*****************************************************************************
-extern void SDHostCmdReset(unsigned long ulBase);
-extern void SDHostInit(unsigned long ulBase);
-extern long SDHostCmdSend(unsigned long ulBase,unsigned long ulCmd,
-                       unsigned ulArg);
-extern void SDHostIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
-extern void SDHostIntUnregister(unsigned long ulBase);
-extern void SDHostIntEnable(unsigned long ulBase,unsigned long ulIntFlags);
-extern void SDHostIntDisable(unsigned long ulBase,unsigned long ulIntFlags);
-extern unsigned long SDHostIntStatus(unsigned long ulBase);
-extern void SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags);
-extern void SDHostCardErrorMaskSet(unsigned long ulBase,
-                                   unsigned long ulErrMask);
-extern unsigned long SDHostCardErrorMaskGet(unsigned long ulBase);
-extern void SDHostSetExpClk(unsigned long ulBase, unsigned long ulSDHostClk,
-              unsigned long ulCardClk);
-extern void SDHostRespGet(unsigned long ulBase, unsigned long ulRespnse[4]);
-extern void SDHostBlockSizeSet(unsigned long ulBase, unsigned short ulBlkSize);
-extern void SDHostBlockCountSet(unsigned long ulBase,
-                                unsigned short ulBlkCount);
-extern tBoolean SDHostDataNonBlockingWrite(unsigned long ulBase,
-                                        unsigned long ulData);
-extern tBoolean SDHostDataNonBlockingRead(unsigned long ulBase,
-                                   unsigned long *pulData);
-extern void SDHostDataWrite(unsigned long ulBase, unsigned long ulData);
-extern void SDHostDataRead(unsigned long ulBase, unsigned long *ulData);
-
-//*****************************************************************************
-//
-// Mark the end of the C bindings section for C++ compilers.
-//
-//*****************************************************************************
-#ifdef __cplusplus
-//}
-#endif
-
-#endif // __SDHOST_H__
diff --git a/ports/cc3200/hal/shamd5.c b/ports/cc3200/hal/shamd5.c
deleted file mode 100644
index 6a3cc1cc309d0..0000000000000
--- a/ports/cc3200/hal/shamd5.c
+++ /dev/null
@@ -1,1085 +0,0 @@
-//*****************************************************************************
-//
-//  shamd5.c
-//
-//  Driver for the SHA/MD5 module.
-//
-//  Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
-//
-//
-//  Redistribution and use in source and binary forms, with or without
-//  modification, are permitted provided that the following conditions
-//  are met:
-//
-//    Redistributions of source code must retain the above copyright
-//    notice, this list of conditions and the following disclaimer.
-//
-//    Redistributions in binary form must reproduce the above copyright
-//    notice, this list of conditions and the following disclaimer in the
-//    documentation and/or other materials provided with the
-//    distribution.
-//
-//    Neither the name of Texas Instruments Incorporated nor the names of
-//    its contributors may be used to endorse or promote products derived
-//    from this software without specific prior written permission.
-//
-//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-//  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-//  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-//  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-//  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-//  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-//  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-//  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-//! \addtogroup SHA_Secure_Hash_Algorithm_api
-//! @{
-//
-//*****************************************************************************
-
-#include 
-#include 
-#include "inc/hw_dthe.h"
-#include "inc/hw_ints.h"
-#include "inc/hw_memmap.h"
-#include "inc/hw_nvic.h"
-#include "inc/hw_shamd5.h"
-#include "inc/hw_types.h"
-#include "debug.h"
-#include "interrupt.h"
-#include "shamd5.h"
-#include "rom_map.h"
-
-#define SHAMD5_MODE_ALGO_MD5         0x00000000  // MD5
-#define SHAMD5_MODE_ALGO_SHA1        0x00000002  // SHA-1
-#define SHAMD5_MODE_ALGO_SHA224      0x00000004  // SHA-224
-#define SHAMD5_MODE_ALGO_SHA256      0x00000006  // SHA-256
-
-//*****************************************************************************
-//
-//! Enables the uDMA requests in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function configures the DMA options of the SHA/MD5 module.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5DMAEnable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Write the new configuration into the register.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) |=
-        SHAMD5_SYSCONFIG_PADVANCED | SHAMD5_SYSCONFIG_PDMA_EN;
-}
-
-//*****************************************************************************
-//
-//! Disables the uDMA requests in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function configures the DMA options of the SHA/MD5 module.
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5DMADisable(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Write the new configuration into the register.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) &=
-        ~(SHAMD5_SYSCONFIG_PADVANCED | SHAMD5_SYSCONFIG_PDMA_EN);
-}
-
-//*****************************************************************************
-//
-//! Get the interrupt status of the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param bMasked is \b false if the raw interrupt status is required and
-//! \b true if the masked interrupt status is required.
-//!
-//! This function returns the current value of the IRQSTATUS register.  The
-//! value will be a logical OR of the following:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return Interrupt status
-//
-//*****************************************************************************
-uint32_t
-SHAMD5IntStatus(uint32_t ui32Base, bool bMasked)
-{
-    uint32_t ui32Temp;
-    uint32_t ui32IrqEnable;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Return the value of the IRQSTATUS register.
-    //
-    if(bMasked)
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_SHA_MIS);
-        ui32IrqEnable = HWREG(ui32Base + SHAMD5_O_IRQENABLE);
-        return((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) &
-                ui32IrqEnable) | (ui32Temp & 0x00000007) << 16);
-    }
-    else
-    {
-        ui32Temp = HWREG(DTHE_BASE + DTHE_O_SHA_RIS);
-        return(HWREG(ui32Base + SHAMD5_O_IRQSTATUS) |
-               (ui32Temp & 0x00000007) << 16);
-
-    }
-}
-
-//*****************************************************************************
-//
-//! Enable interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to enable.
-//!
-//! This function enables interrupt sources in the SHA/MD5 module.
-//! ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Enable the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IM) &= ~((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + SHAMD5_O_IRQENABLE) |= ui32IntFlags & 0x0000ffff;
-
-    //
-    // Enable all interrupts.
-    //
-    HWREG(ui32Base + SHAMD5_O_SYSCONFIG) |= SHAMD5_SYSCONFIG_PIT_EN;
-}
-
-//*****************************************************************************
-//
-//! Disable interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to disable.
-//!
-//! \e ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Clear the corresponding flags disabling the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IM) |= ((ui32IntFlags & 0x00070000) >> 16);
-    HWREG(ui32Base + SHAMD5_O_IRQENABLE) &= ~(ui32IntFlags & 0x0000ffff);
-
-    //
-    // If there are no interrupts enabled, then disable all interrupts.
-    //
-    if(HWREG(ui32Base + SHAMD5_O_IRQENABLE) == 0x0)
-    {
-        HWREG(ui32Base + SHAMD5_O_SYSCONFIG) &= ~SHAMD5_SYSCONFIG_PIT_EN;
-    }
-}
-
-//*****************************************************************************
-//
-//! Clears interrupt sources in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32IntFlags contains desired interrupts to disable.
-//!
-//! \e ui32IntFlags must be a logical OR of one or more of the following
-//! values:
-//!
-//! - \b SHAMD5_INT_CONTEXT_READY - Context input registers are ready.
-//! - \b SHAMD5_INT_PARTHASH_READY - Context output registers are ready after
-//! a context switch.
-//! - \b SHAMD5_INT_INPUT_READY - Data FIFO is ready to receive data.
-//! - \b SHAMD5_INT_OUTPUT_READY - Context output registers are ready.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32IntFlags == SHAMD5_INT_CONTEXT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_PARTHASH_READY) ||
-           (ui32IntFlags == SHAMD5_INT_INPUT_READY) ||
-           (ui32IntFlags == SHAMD5_INT_OUTPUT_READY));
-
-    //
-    // Clear the corresponding flags disabling the interrupt sources.
-    //
-    HWREG(DTHE_BASE + DTHE_O_SHA_IC) = ((ui32IntFlags & 0x00070000) >> 16);
-}
-
-//*****************************************************************************
-//
-//! Registers an interrupt handler for the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pfnHandler is a pointer to the function to be called when the
-//! enabled SHA/MD5 interrupts occur.
-//!
-//! This function registers the interrupt handler in the interrupt vector
-//! table, and enables SHA/MD5 interrupts on the interrupt controller;
-//! specific SHA/MD5 interrupt sources must be enabled using
-//! SHAMD5IntEnable().  The interrupt handler being registered must clear
-//! the source of the interrupt using SHAMD5IntClear().
-//!
-//! If the application is using a static interrupt vector table stored in
-//! flash, then it is not necessary to register the interrupt handler this way.
-//! Instead, IntEnable() should be used to enable SHA/MD5 interrupts on the
-//! interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntRegister(uint32_t ui32Base, void(*pfnHandler)(void))
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Register the interrupt handler.
-    //
-    IntRegister(INT_SHA, pfnHandler);
-
-    //
-    // Enable the interrupt
-    //
-    IntEnable(INT_SHA);
-}
-
-//*****************************************************************************
-//
-//! Unregisters an interrupt handler for the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//!
-//! This function unregisters the previously registered interrupt handler and
-//! disables the interrupt in the interrupt controller.
-//!
-//! \sa IntRegister() for important information about registering interrupt
-//! handlers.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5IntUnregister(uint32_t ui32Base)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Disable the interrupt.
-    //
-    IntDisable(INT_SHA);
-
-    //
-    // Unregister the interrupt handler.
-    //
-    IntUnregister(INT_SHA);
-}
-
-//*****************************************************************************
-//
-//! Write the hash length to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32Length is the hash length in bytes.
-//!
-//! This function writes the length of the hash data of the current operation
-//! to the SHA/MD5 module.  The value must be a multiple of 64 if the close
-//! hash is not set in the mode register.
-//!
-//! \note When this register is written, hash processing is triggered.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataLengthSet(uint32_t ui32Base, uint32_t ui32Length)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Set the LENGTH register and start processing.
-    //
-    HWREG(ui32Base + SHAMD5_O_LENGTH) = ui32Length;
-}
-
-//*****************************************************************************
-//
-//! Writes the mode in the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param ui32Mode is the mode of the SHA/MD5 module.
-//!
-//! This function writes the mode register configuring the SHA/MD5 module.
-//!
-//! The ui32Mode paramerter is a bit-wise OR of values:
-//!
-//! - \b SHAMD5_ALGO_MD5 - Regular hash with MD5
-//! - \b SHAMD5_ALGO_SHA1 - Regular hash with SHA-1
-//! - \b SHAMD5_ALGO_SHA224 - Regular hash with SHA-224
-//! - \b SHAMD5_ALGO_SHA256 - Regular hash with SHA-256
-//! - \b SHAMD5_ALGO_HMAC_MD5 - HMAC with MD5
-//! - \b SHAMD5_ALGO_HMAC_SHA1 - HMAC with SHA-1
-//! - \b SHAMD5_ALGO_HMAC_SHA224 - HMAC with SHA-224
-//! - \b SHAMD5_ALGO_HMAC_SHA256 - HMAC with SHA-256
-//!
-//! \return None
-//
-//*****************************************************************************
-void
-SHAMD5ConfigSet(uint32_t ui32Base, uint32_t ui32Mode)
-{
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-    ASSERT((ui32Mode == SHAMD5_ALGO_MD5) ||
-           (ui32Mode == SHAMD5_ALGO_SHA1) ||
-           (ui32Mode == SHAMD5_ALGO_SHA224) ||
-           (ui32Mode == SHAMD5_ALGO_SHA256) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_MD5) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA1) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA224) ||
-           (ui32Mode == SHAMD5_ALGO_HMAC_SHA256));
-
-    //
-    // Write the value in the MODE register.
-    //
-    HWREG(ui32Base + SHAMD5_O_MODE) = ui32Mode;
-}
-
-//*****************************************************************************
-//
-//! Perform a non-blocking write of 16 words of data to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Src is the pointer to the 16-word array of data that will be
-//! written.
-//!
-//! This function writes 16 words of data into the data register.
-//!
-//! \return This function returns true if the write completed successfully.
-//! It returns false if the module was not ready.
-//
-//*****************************************************************************
-bool
-SHAMD5DataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src)
-{
-    uint32_t ui8Counter;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Check that the SHA/MD5 module is ready for data.  If not, return false.
-    //
-    if((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0)
-    {
-        return(false);
-    }
-
-    //
-    // Write the 16 words of data.
-    //
-    for(ui8Counter = 0; ui8Counter < 64; ui8Counter += 4)
-    {
-        HWREG(ui32Base + SHAMD5_O_DATA0_IN + ui8Counter) = *((uint32_t *)(pui8Src + ui8Counter));
-    }
-
-    //
-    // Return true as a sign of successfully completing the function.
-    //
-    return(true);
-}
-
-//*****************************************************************************
-//
-//! Perform a blocking write of 64 bytes of data to the SHA/MD5 module.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Src is the pointer to the 64-byte array of data that will be
-//! written.
-//!
-//! This function does not return until the module is ready to accept data and
-//! the data has been written.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataWrite(uint32_t ui32Base, uint8_t *pui8Src)
-{
-    uint8_t ui8Counter;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Wait for the module to be ready to accept data.
-    //
-    while((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0)
-    {
-    }
-
-    //
-    // Write the 64 bytes of data.
-    //
-    for(ui8Counter = 0; ui8Counter < 64; ui8Counter += 4)
-    {
-        HWREG(ui32Base + SHAMD5_O_DATA0_IN + ui8Counter) =
-                                        *((uint32_t *) (pui8Src + ui8Counter));
-    }
-}
-
-
-//*****************************************************************************
-//
-//! Reads the result of a hashing operation.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8Dest is the pointer to the byte array of data that will be
-//! written.
-//!
-//! This function does not return until the module is ready to accept data and
-//! the data has been written.
-//! -----------------------------------------
-//! | Algorithm | Number of Words in Result |
-//! -----------------------------------------
-//! | MD5       | 16 Bytes (128 bits)        |
-//! | SHA-1     | 20 Bytes (160 bits)        |
-//! | SHA-224   | 28 Bytes (224 bits)        |
-//! | SHA-256   | 32 Bytes (256 bits)        |
-//! -----------------------------------------
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5ResultRead(uint32_t ui32Base, uint8_t *pui8Dest)
-{
-    uint32_t ui32Idx, ui32Count;
-
-    //
-    // Check the arguments.
-    //
-    ASSERT(ui32Base == SHAMD5_BASE);
-
-    //
-    // Determine the number of bytes in the result, based on the hash type.
-    //
-    switch(HWREG(ui32Base + SHAMD5_O_MODE) & SHAMD5_MODE_ALGO_M)
-    {
-        //
-        // The MD5 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_MD5:
-        {
-            //
-            // There are 16 bytes in the MD5 hash.
-            //
-            ui32Count = 16;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-1 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA1:
-        {
-            //
-            // There are 20 bytes in the SHA-1 hash.
-            //
-            ui32Count = 20;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-224 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA224:
-        {
-            //
-            // There are 28 bytes in the SHA-224 hash.
-            //
-            ui32Count = 28;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The SHA-256 hash is being used.
-        //
-        case SHAMD5_MODE_ALGO_SHA256:
-        {
-            //
-            // There are 32 bytes in the SHA-256 hash.
-            //
-            ui32Count = 32;
-
-            //
-            // Done.
-            //
-            break;
-        }
-
-        //
-        // The hash type is not recognized.
-        //
-        default:
-        {
-            //
-            // Return without reading a result since the hardware appears to be
-            // misconfigured.
-            //
-            return;
-        }
-    }
-
-    //
-    // Read the hash result.
-    //
-    for(ui32Idx = 0; ui32Idx < ui32Count; ui32Idx += 4)
-    {
-    	*((uint32_t *)(pui8Dest+ui32Idx)) =
-                                HWREG(ui32Base + SHAMD5_O_IDIGEST_A + ui32Idx);
-    }
-}
-
-//*****************************************************************************
-//
-//! Writes multiple words of data into the SHA/MD5 data registers.
-//!
-//! \param ui32Base is the base address of the SHA/MD5 module.
-//! \param pui8DataSrc is a pointer to an array of data to be written.
-//! \param ui32DataLength is the length of the data to be written in bytes.
-//!
-//! This function writes a variable number of words into the SHA/MD5 data
-//! registers.  The function waits for each block of data to be processed
-//! before another is written.
-//!
-//! \note This function is used by SHAMD5HashCompute(), SHAMD5HMACWithKPP(),
-//! and SHAMD5HMACNoKPP() to process data.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-SHAMD5DataWriteMultiple(uint8_t *pui8DataSrc, uint32_t ui32DataLength)
-{
-    uint32_t ui32Idx, ui32Count, ui32Lastword, ui32TempData = 0;
-    uint8_t * ui8TempData;
-
-
-    //
-    // Calculate the number of blocks of data.
-    //
-    ui32Count = ui32DataLength / 64;
-
-    //
-    // Loop through all the blocks and write them into the data registers
-    // making sure to block additional operations until we can write the
-    // next 16 words.
-    //
-    for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx++)
-    {
-        //
-        // Write the block of data.
-        //
-        MAP_SHAMD5DataWrite(SHAMD5_BASE, pui8DataSrc);
-        //
-        // Increment the pointer to next block of data.
-        //
-        pui8DataSrc += 64;
-    }
-
-    //
-    // Calculate the remaining bytes of data that don't make up a full block.
-    //
-    ui32Count = ui32DataLength % 64;
-
-    //
-    // If there are bytes that do not make up a whole block, then
-    // write them separately.
-    //
-    if(ui32Count)
-    {
-        //
-        // Wait until the engine has finished processing the previous block.
-        //
-        while ((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_INPUT_READY) == 0);
-
-        //
-        // Loop through the remaining words.
-        //
-        ui32Count = ui32Count / 4;
-        for (ui32Idx = 0; ui32Idx < ui32Count; ui32Idx ++)
-        {
-            //
-            // Write the word into the data register.
-            //
-            HWREG(SHAMD5_BASE + SHAMD5_O_DATA0_IN + (ui32Idx * 4)) =* ( (uint32_t *) pui8DataSrc);
-            pui8DataSrc +=4;
-        }
-        //
-        // Loop through the remaining bytes
-        //
-        ui32Count = ui32DataLength % 4;
-        ui8TempData = (uint8_t *) &ui32TempData;
-        if(ui32Count)
-        {
-        	ui32Lastword = 0;
-        	if(ui32Idx)
-        	{
-        		ui32Lastword = (ui32Idx-1) *4;
-        	}
-        	for(ui32Idx=0 ; ui32Idx
-//! Polarity Phase  Sub-Mode
-//!   0       0        0
-//!   0       1        1
-//!   1       0        2
-//!   1       1        3
-//!
-//! -//! Required sub mode can be select by setting \e ulSubMode parameter to one -//! of the following -//! - \b SPI_SUB_MODE_0 -//! - \b SPI_SUB_MODE_1 -//! - \b SPI_SUB_MODE_2 -//! - \b SPI_SUB_MODE_3 -//! -//! The parameter \e ulConfig is logical OR of five values: the word length, -//! active level for chip select, software or hardware controled chip select, -//! 3 or 4 pin mode and turbo mode. -//! mode. -//! -//! SPI support 8, 16 and 32 bit word lengths defined by:- -//! - \b SPI_WL_8 -//! - \b SPI_WL_16 -//! - \b SPI_WL_32 -//! -//! Active state of Chip Select can be defined by:- -//! - \b SPI_CS_ACTIVELOW -//! - \b SPI_CS_ACTIVEHIGH -//! -//! SPI chip select can be configured to be controlled either by hardware or -//! software:- -//! - \b SPI_SW_CS -//! - \b SPI_HW_CS -//! -//! The module can work in 3 or 4 pin mode defined by:- -//! - \b SPI_3PIN_MODE -//! - \b SPI_4PIN_MODE -//! -//! Turbo mode can be set on or turned off using:- -//! - \b SPI_TURBO_MODE_ON -//! - \b SPI_TURBO_MODE_OFF -//! -//! \return None. -// -//***************************************************************************** -void -SPIConfigSetExpClk(unsigned long ulBase,unsigned long ulSPIClk, - unsigned long ulBitRate, unsigned long ulMode, - unsigned long ulSubMode, unsigned long ulConfig) -{ - - unsigned long ulRegData; - unsigned long ulDivider; - - // - // Read MODULCTRL register - // - ulRegData = HWREG(ulBase + MCSPI_O_MODULCTRL); - - // - // Set Master mode with h/w chip select - // - ulRegData &= ~(MCSPI_MODULCTRL_MS | - MCSPI_MODULCTRL_SINGLE); - - // - // Enable software control Chip Select, Init delay - // and 3-pin mode - // - ulRegData |= (((ulConfig >> 24) | ulMode) & 0xFF); - - // - // Write the configuration - // - HWREG(ulBase + MCSPI_O_MODULCTRL) = ulRegData; - - // - // Set IS, DPE0, DPE1 based on master or slave mode - // - if(ulMode == SPI_MODE_MASTER) - { - ulRegData = 0x1 << 16; - } - else - { - ulRegData = 0x6 << 16; - } - - // - // set clock divider granularity to 1 cycle - // - ulRegData |= MCSPI_CH0CONF_CLKG; - - // - // Get the divider value - // - ulDivider = ((ulSPIClk/ulBitRate) - 1); - - // - // The least significant four bits of the divider is used to configure - // CLKD in MCSPI_CHCONF next eight least significant bits are used to - // configure the EXTCLK in MCSPI_CHCTRL - // - ulRegData |= ((ulDivider & 0x0000000F) << 2); - HWREG(ulBase + MCSPI_O_CH0CTRL) = ((ulDivider & 0x00000FF0) << 4); - - // - // Set the protocol, CS polarity, word length - // and turbo mode - // - ulRegData = ((ulRegData | - ulSubMode) | (ulConfig & 0x0008FFFF)); - - // - // Write back the CONF register - // - HWREG(ulBase + MCSPI_O_CH0CONF) = ulRegData; - -} - -//***************************************************************************** -// -//! Receives a word from the specified port. -//! -//! \param ulBase is the base address of the SPI module. -//! \param pulData is pointer to receive data variable. -//! -//! This function gets a SPI word from the receive FIFO for the specified -//! port. -//! -//! \return Returns the number of elements read from the receive FIFO. -// -//***************************************************************************** -long -SPIDataGetNonBlocking(unsigned long ulBase, unsigned long *pulData) -{ - unsigned long ulRegVal; - - // - // Read register status register - // - ulRegVal = HWREG(ulBase + MCSPI_O_CH0STAT); - - // - // Check is data is available - // - if(ulRegVal & MCSPI_CH0STAT_RXS) - { - *pulData = HWREG(ulBase + MCSPI_O_RX0); - return(1); - } - - return(0); -} - -//***************************************************************************** -// -//! Waits for the word to be received on the specified port. -//! -//! \param ulBase is the base address of the SPI module. -//! \param pulData is pointer to receive data variable. -//! -//! This function gets a SPI word from the receive FIFO for the specified -//! port. If there is no word available, this function waits until a -//! word is received before returning. -//! -//! \return Returns the word read from the specified port, cast as an -//! \e unsigned long. -// -//***************************************************************************** -void -SPIDataGet(unsigned long ulBase, unsigned long *pulData) -{ - // - // Wait for Rx data - // - while(!(HWREG(ulBase + MCSPI_O_CH0STAT) & MCSPI_CH0STAT_RXS)) - { - } - - // - // Read the value - // - *pulData = HWREG(ulBase + MCSPI_O_RX0); -} - -//***************************************************************************** -// -//! Transmits a word on the specified port. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulData is data to be transmitted. -//! -//! This function transmits a SPI word on the transmit FIFO for the specified -//! port. -//! -//! \return Returns the number of elements written to the transmit FIFO. -//! -//***************************************************************************** -long -SPIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData) -{ - unsigned long ulRegVal; - - // - // Read status register - // - ulRegVal = HWREG(ulBase + MCSPI_O_CH0STAT); - - // - // Write value into Tx register/FIFO - // if space is available - // - if(ulRegVal & MCSPI_CH0STAT_TXS) - { - HWREG(ulBase + MCSPI_O_TX0) = ulData; - return(1); - } - - return(0); -} - -//***************************************************************************** -// -//! Waits until the word is transmitted on the specified port. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulData is data to be transmitted. -//! -//! This function transmits a SPI word on the transmit FIFO for the specified -//! port. This function waits until the space is available on transmit FIFO -//! -//! \return None -//! -//***************************************************************************** -void -SPIDataPut(unsigned long ulBase, unsigned long ulData) -{ - // - // Wait for space in FIFO - // - while(!(HWREG(ulBase + MCSPI_O_CH0STAT)&MCSPI_CH0STAT_TXS)) - { - } - - // - // Write the data - // - HWREG(ulBase + MCSPI_O_TX0) = ulData; -} - -//***************************************************************************** -// -//! Enables the transmit and/or receive FIFOs. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulFlags selects the FIFO(s) to be enabled -//! -//! This function enables the transmit and/or receive FIFOs as specified by -//! \e ulFlags. -//! The parameter \e ulFlags shoulde be logical OR of one or more of the -//! following: -//! - \b SPI_TX_FIFO -//! - \b SPI_RX_FIFO -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFOEnable(unsigned long ulBase, unsigned long ulFlags) -{ - // - // Set FIFO enable bits. - // - HWREG(ulBase + MCSPI_O_CH0CONF) |= ulFlags; -} - -//***************************************************************************** -// -//! Disables the transmit and/or receive FIFOs. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulFlags selects the FIFO(s) to be enabled -//! -//! This function disables transmit and/or receive FIFOs. as specified by -//! \e ulFlags. -//! The parameter \e ulFlags shoulde be logical OR of one or more of the -//! following: -//! - \b SPI_TX_FIFO -//! - \b SPI_RX_FIFO -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFODisable(unsigned long ulBase, unsigned long ulFlags) -{ - // - // Reset FIFO Enable bits. - // - HWREG(ulBase + MCSPI_O_CH0CONF) &= ~(ulFlags); -} - -//***************************************************************************** -// -//! Sets the FIFO level at which DMA requests or interrupts are generated. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulTxLevel is the Almost Empty Level for transmit FIFO. -//! \param ulRxLevel is the Almost Full Level for the receive FIFO. -//! -//! This function Sets the FIFO level at which DMA requests or interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void SPIFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - // - // Mask and set new FIFO thresholds. - // - ulRegVal = ((ulRegVal & 0xFFFF0000) | (((ulRxLevel-1) << 8) | (ulTxLevel-1))); - - // - // Set the transmit and receive FIFO thresholds. - // - HWREG(ulBase + MCSPI_O_XFERLEVEL) = ulRegVal; - -} - -//***************************************************************************** -// -//! Gets the FIFO level at which DMA requests or interrupts are generated. -//! -//! \param ulBase is the base address of the SPI module -//! \param pulTxLevel is a pointer to storage for the transmit FIFO level -//! \param pulRxLevel is a pointer to storage for the receive FIFO level -//! -//! This function gets the FIFO level at which DMA requests or interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -SPIFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - *pulTxLevel = (ulRegVal & 0xFF); - - *pulRxLevel = ((ulRegVal >> 8) & 0xFF); - -} - -//***************************************************************************** -// -//! Sets the word count. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulWordCount is number of SPI words to be transmitted. -//! -//! This function sets the word count, which is the number of SPI word to -//! be transferred on channel when using the FIFO buffer. -//! -//! \return None. -// -//***************************************************************************** -void -SPIWordCountSet(unsigned long ulBase, unsigned long ulWordCount) -{ - unsigned long ulRegVal; - - // - // Read the current configuration - // - ulRegVal = HWREG(ulBase + MCSPI_O_XFERLEVEL); - - // - // Mask and set the word count - // - HWREG(ulBase + MCSPI_O_XFERLEVEL) = ((ulRegVal & 0x0000FFFF)| - (ulWordCount & 0xFFFF) << 16); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for a SPI interrupt. -//! -//! \param ulBase is the base address of the SPI module -//! \param pfnHandler is a pointer to the function to be called when the -//! SPI interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! SPI interrupts must be enabled via SPIIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntRegister(unsigned long ulBase, void(*pfnHandler)(void)) -{ - unsigned long ulInt; - - // - // Determine the interrupt number based on the SPI module - // - ulInt = SPIIntNumberGet(ulBase); - - // - // Register the interrupt handler. - // - IntRegister(ulInt, pfnHandler); - - // - // Enable the SPI interrupt. - // - IntEnable(ulInt); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for a SPI interrupt. -//! -//! \param ulBase is the base address of the SPI module -//! -//! This function does the actual unregistering of the interrupt handler. It -//! clears the handler to be called when a SPI interrupt occurs. This -//! function also masks off the interrupt in the interrupt controller so that -//! the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntUnregister(unsigned long ulBase) -{ - unsigned long ulInt; - - // - // Determine the interrupt number based on the SPI module - // - ulInt = SPIIntNumberGet(ulBase); - - // - // Disable the interrupt. - // - IntDisable(ulInt); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulInt); -} - -//***************************************************************************** -// -//! Enables individual SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! This function enables the indicated SPI interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter is the logical OR of any of the following: -//! -//! - \b SPI_INT_DMATX -//! - \b SPI_INT_DMARX -//! - \b SPI_INT_EOW -//! - \b SPI_INT_RX_OVRFLOW -//! - \b SPI_INT_RX_FULL -//! - \b SPI_INT_TX_UDRFLOW -//! - \b SPI_INT_TX_EMPTY -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Enable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk; - } - - // - // Enable DMA Rx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_CLR) = ulDmaMsk; - } - - // - // Enable the specific Interrupts - // - HWREG(ulBase + MCSPI_O_IRQENABLE) |= (ulIntFlags & 0x0003000F); -} - - -//***************************************************************************** -// -//! Disables individual SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! This function disables the indicated SPI interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to SPIIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk; - } - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET) = ulDmaMsk; - } - - // - // Disable the specific Interrupts - // - HWREG(ulBase + MCSPI_O_IRQENABLE) &= ~(ulIntFlags & 0x0003000F); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the SPI module -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This function returns the interrupt status for the specified SPI. -//! The status of interrupts that are allowed to reflect to the processor can -//! be returned. -//! -//! \return Returns the current interrupt status, enumerated as a bit field of -//! values described in SPIIntEnable(). -// -//***************************************************************************** -unsigned long -SPIIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - unsigned long ulIntStat; - unsigned long ulIntFlag; - unsigned long ulDmaMsk; - - // - // Get SPI interrupt status - // - ulIntFlag = HWREG(ulBase + MCSPI_O_IRQSTATUS) & 0x0003000F; - - if(bMasked) - { - ulIntFlag &= HWREG(ulBase + MCSPI_O_IRQENABLE); - } - - // - // Get the interrupt bit - // - ulDmaMsk = SPIDmaMaskGet(ulBase); - - // - // Get the DMA interrupt status - // - if(bMasked) - { - ulIntStat = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_MASKED); - } - else - { - ulIntStat = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW); - } - - // - // Get SPI Tx DMA done status - // - if(ulIntStat & ulDmaMsk) - { - ulIntFlag |= SPI_INT_DMATX; - } - - // - // Get SPI Rx DMA done status - // - if(ulIntStat & (ulDmaMsk >> 1)) - { - ulIntFlag |= SPI_INT_DMARX; - } - - // - // Return status - // - return(ulIntFlag); -} - -//***************************************************************************** -// -//! Clears SPI interrupt sources. -//! -//! \param ulBase is the base address of the SPI module -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified SPI interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being recognized again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to SPIIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -SPIIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - unsigned long ulDmaMsk; - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMATX) - { - ulDmaMsk = SPIDmaMaskGet(ulBase); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk; - } - - // - // Disable DMA Tx Interrupt - // - if(ulIntFlags & SPI_INT_DMARX) - { - ulDmaMsk = (SPIDmaMaskGet(ulBase) >> 1); - HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_ACK) = ulDmaMsk; - } - - // - // Clear Interrupts - // - HWREG(ulBase + MCSPI_O_IRQSTATUS) = (ulIntFlags & 0x0003000F); -} - -//***************************************************************************** -// -//! Enables the chip select in software controlled mode -//! -//! \param ulBase is the base address of the SPI module. -//! -//! This function enables the Chip select in software controlled mode. The -//! active state of CS will depend on the configuration done via -//! \sa SPIConfigExpClkSet(). -//! -//! \return None. -// -//***************************************************************************** -void SPICSEnable(unsigned long ulBase) -{ - // - // Set Chip Select enable bit. - // - HWREG( ulBase+MCSPI_O_CH0CONF) |= MCSPI_CH0CONF_FORCE; -} - -//***************************************************************************** -// -//! Disables the chip select in software controlled mode -//! -//! \param ulBase is the base address of the SPI module. -//! -//! This function disables the Chip select in software controlled mode. The -//! active state of CS will depend on the configuration done via -//! sa SPIConfigSetExpClk(). -//! -//! \return None. -// -//***************************************************************************** -void SPICSDisable(unsigned long ulBase) -{ - // - // Reset Chip Select enable bit. - // - HWREG( ulBase+MCSPI_O_CH0CONF) &= ~MCSPI_CH0CONF_FORCE; -} - -//***************************************************************************** -// -//! Send/Receive data buffer over SPI channel -//! -//! \param ulBase is the base address of SPI module -//! \param ucDout is the pointer to Tx data buffer or 0. -//! \param ucDin is pointer to Rx data buffer or 0 -//! \param ulCount is the size of data in bytes. -//! \param ulFlags controlls chip select toggling. -//! -//! This function transfers \e ulCount bytes of data over SPI channel. Since -//! the API sends a SPI word at a time \e ulCount should be a multiple of -//! word length set using SPIConfigSetExpClk(). -//! -//! If the \e ucDout parameter is set to 0, the function will send 0xFF over -//! the SPI MOSI line. -//! -//! If the \e ucDin parameter is set to 0, the function will ignore data on SPI -//! MISO line. -//! -//! The parameter \e ulFlags is logical OR of one or more of the following -//! -//! - \b SPI_CS_ENABLE if CS needs to be enabled at start of transfer. -//! - \b SPI_CS_DISABLE if CS need to be disabled at the end of transfer. -//! -//! This function will not return until data has been transmitted -//! -//! \return Returns 0 on success, -1 otherwise. -// -//***************************************************************************** -long SPITransfer(unsigned long ulBase, unsigned char *ucDout, - unsigned char *ucDin, unsigned long ulCount, - unsigned long ulFlags) -{ - unsigned long ulWordLength; - long lRet; - - // - // Get the word length - // - ulWordLength = (HWREG(ulBase + MCSPI_O_CH0CONF) & MCSPI_CH0CONF_WL_M); - - // - // Check for word length. - // - if( !((ulWordLength == SPI_WL_8) || (ulWordLength == SPI_WL_16) || - (ulWordLength == SPI_WL_32)) ) - { - return -1; - } - - if( ulWordLength == SPI_WL_8 ) - { - // - // Do byte transfer - // - lRet = SPITransfer8(ulBase,ucDout,ucDin,ulCount,ulFlags); - } - else if( ulWordLength == SPI_WL_16 ) - { - - // - // Do half-word transfer - // - lRet = SPITransfer16(ulBase,(unsigned short *)ucDout, - (unsigned short *)ucDin,ulCount,ulFlags); - } - else - { - // - // Do word transfer - // - lRet = SPITransfer32(ulBase,(unsigned long *)ucDout, - (unsigned long *)ucDin,ulCount,ulFlags); - } - - // - // return - // - return lRet; - -} -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/spi.h b/ports/cc3200/hal/spi.h deleted file mode 100644 index 593986bc6da2e..0000000000000 --- a/ports/cc3200/hal/spi.h +++ /dev/null @@ -1,163 +0,0 @@ -//***************************************************************************** -// -// spi.h -// -// Defines and Macros for the SPI. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __SPI_H__ -#define __SPI_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulMode parameter -//***************************************************************************** -#define SPI_MODE_MASTER 0x00000000 -#define SPI_MODE_SLAVE 0x00000004 - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulSubMode parameter -//***************************************************************************** -#define SPI_SUB_MODE_0 0x00000000 -#define SPI_SUB_MODE_1 0x00000001 -#define SPI_SUB_MODE_2 0x00000002 -#define SPI_SUB_MODE_3 0x00000003 - - -//***************************************************************************** -// Values that can be passed to SPIConfigSetExpClk() as ulConfigFlags parameter -//***************************************************************************** -#define SPI_SW_CTRL_CS 0x01000000 -#define SPI_HW_CTRL_CS 0x00000000 -#define SPI_3PIN_MODE 0x02000000 -#define SPI_4PIN_MODE 0x00000000 -#define SPI_TURBO_ON 0x00080000 -#define SPI_TURBO_OFF 0x00000000 -#define SPI_CS_ACTIVEHIGH 0x00000000 -#define SPI_CS_ACTIVELOW 0x00000040 -#define SPI_WL_8 0x00000380 -#define SPI_WL_16 0x00000780 -#define SPI_WL_32 0x00000F80 - -//***************************************************************************** -// Values that can be passed to SPIFIFOEnable() and SPIFIFODisable() -//***************************************************************************** -#define SPI_TX_FIFO 0x08000000 -#define SPI_RX_FIFO 0x10000000 - -//***************************************************************************** -// Values that can be passed to SPIDMAEnable() and SPIDMADisable() -//***************************************************************************** -#define SPI_RX_DMA 0x00008000 -#define SPI_TX_DMA 0x00004000 - -//***************************************************************************** -// Values that can be passed to SPIIntEnable(), SPIIntDiasble(), -// SPIIntClear() or returned from SPIStatus() -//***************************************************************************** -#define SPI_INT_DMATX 0x20000000 -#define SPI_INT_DMARX 0x10000000 -#define SPI_INT_EOW 0x00020000 -#define SPI_INT_WKS 0x00010000 -#define SPI_INT_RX_OVRFLOW 0x00000008 -#define SPI_INT_RX_FULL 0x00000004 -#define SPI_INT_TX_UDRFLOW 0x00000002 -#define SPI_INT_TX_EMPTY 0x00000001 - -//***************************************************************************** -// Values that can be passed to SPITransfer() -//***************************************************************************** -#define SPI_CS_ENABLE 0x00000001 -#define SPI_CS_DISABLE 0x00000002 - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void SPIEnable(unsigned long ulBase); -extern void SPIDisable(unsigned long ulBase); -extern void SPIReset(unsigned long ulBase); -extern void SPIConfigSetExpClk(unsigned long ulBase,unsigned long ulSPIClk, - unsigned long ulBitRate, unsigned long ulMode, - unsigned long ulSubMode, unsigned long ulConfig); -extern long SPIDataGetNonBlocking(unsigned long ulBase, - unsigned long * pulData); -extern void SPIDataGet(unsigned long ulBase, unsigned long *pulData); -extern long SPIDataPutNonBlocking(unsigned long ulBase, - unsigned long ulData); -extern void SPIDataPut(unsigned long ulBase, unsigned long ulData); -extern void SPIFIFOEnable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIFIFODisable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel); -extern void SPIFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel); -extern void SPIWordCountSet(unsigned long ulBase, unsigned long ulWordCount); -extern void SPIIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void SPIIntUnregister(unsigned long ulBase); -extern void SPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void SPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long SPIIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void SPIIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void SPIDmaEnable(unsigned long ulBase, unsigned long ulFlags); -extern void SPIDmaDisable(unsigned long ulBase, unsigned long ulFlags); -extern void SPICSEnable(unsigned long ulBase); -extern void SPICSDisable(unsigned long ulBase); -extern long SPITransfer(unsigned long ulBase, unsigned char *ucDout, - unsigned char *ucDin, unsigned long ulSize, - unsigned long ulFlags); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __SPI_H__ diff --git a/ports/cc3200/hal/startup_gcc.c b/ports/cc3200/hal/startup_gcc.c deleted file mode 100644 index e173e8fdaf38b..0000000000000 --- a/ports/cc3200/hal/startup_gcc.c +++ /dev/null @@ -1,421 +0,0 @@ -//***************************************************************************** -// startup_gcc.c -// -// Startup code for use with GCC. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#include -#include "inc/hw_nvic.h" -#include "inc/hw_types.h" -#include "fault_registers.h" - -//***************************************************************************** -// -// The following are constructs created by the linker, indicating where the -// the "data" and "bss" segments reside in memory. The initializers for the -// for the "data" segment resides immediately following the "text" segment. -// -//***************************************************************************** -extern uint32_t _data; -extern uint32_t _edata; -extern uint32_t _bss; -extern uint32_t _ebss; -extern uint32_t _estack; - -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -#ifndef BOOTLOADER -__attribute__ ((section (".boot"))) -#endif -void ResetISR(void); -#ifdef DEBUG -static void NmiSR(void) __attribute__( ( naked ) ); -static void FaultISR( void ) __attribute__( ( naked ) ); -void HardFault_HandlerC(uint32_t *pulFaultStackAddress); -static void BusFaultHandler(void) __attribute__( ( naked ) ); -#endif -static void IntDefaultHandler(void) __attribute__( ( naked ) ); - -//***************************************************************************** -// -// External declaration for the freeRTOS handlers -// -//***************************************************************************** -#ifdef USE_FREERTOS -extern void vPortSVCHandler(void); -extern void xPortPendSVHandler(void); -extern void xPortSysTickHandler(void); -#endif - -//***************************************************************************** -// -// The entry point for the application. -// -//***************************************************************************** -extern int main(void); - -//***************************************************************************** -// -// The vector table. Note that the proper constructs must be placed on this to -// ensure that it ends up at physical address 0x0000.0000. -// -//***************************************************************************** -__attribute__ ((section(".intvecs"))) -void (* const g_pfnVectors[256])(void) = -{ - (void (*)(void))((uint32_t)&_estack), // The initial stack pointer - ResetISR, // The reset handler -#ifdef DEBUG - NmiSR, // The NMI handler - FaultISR, // The hard fault handler -#else - IntDefaultHandler, // The NMI handler - IntDefaultHandler, // The hard fault handler -#endif - IntDefaultHandler, // The MPU fault handler -#ifdef DEBUG - BusFaultHandler, // The bus fault handler -#else - IntDefaultHandler, // The bus fault handler -#endif - IntDefaultHandler, // The usage fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved -#ifdef USE_FREERTOS - vPortSVCHandler, // SVCall handler -#else - IntDefaultHandler, // SVCall handler -#endif - IntDefaultHandler, // Debug monitor handler - 0, // Reserved -#ifdef USE_FREERTOS - xPortPendSVHandler, // The PendSV handler - xPortSysTickHandler, // The SysTick handler -#else - IntDefaultHandler, // The PendSV handler - IntDefaultHandler, // The SysTick handler -#endif - IntDefaultHandler, // GPIO Port A - IntDefaultHandler, // GPIO Port B - IntDefaultHandler, // GPIO Port C - IntDefaultHandler, // GPIO Port D - 0, // Reserved - IntDefaultHandler, // UART0 Rx and Tx - IntDefaultHandler, // UART1 Rx and Tx - 0, // Reserved - IntDefaultHandler, // I2C0 Master and Slave - 0,0,0,0,0, // Reserved - IntDefaultHandler, // ADC Channel 0 - IntDefaultHandler, // ADC Channel 1 - IntDefaultHandler, // ADC Channel 2 - IntDefaultHandler, // ADC Channel 3 - IntDefaultHandler, // Watchdog Timer - IntDefaultHandler, // Timer 0 subtimer A - IntDefaultHandler, // Timer 0 subtimer B - IntDefaultHandler, // Timer 1 subtimer A - IntDefaultHandler, // Timer 1 subtimer B - IntDefaultHandler, // Timer 2 subtimer A - IntDefaultHandler, // Timer 2 subtimer B - 0,0,0,0, // Reserved - IntDefaultHandler, // Flash - 0,0,0,0,0, // Reserved - IntDefaultHandler, // Timer 3 subtimer A - IntDefaultHandler, // Timer 3 subtimer B - 0,0,0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // uDMA Software Transfer - IntDefaultHandler, // uDMA Error - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // SHA - 0,0, // Reserved - IntDefaultHandler, // AES - 0, // Reserved - IntDefaultHandler, // DES - 0,0,0,0,0, // Reserved - IntDefaultHandler, // SDHost - 0, // Reserved - IntDefaultHandler, // I2S - 0, // Reserved - IntDefaultHandler, // Camera - 0,0,0,0,0,0,0, // Reserved - IntDefaultHandler, // NWP to APPS Interrupt - IntDefaultHandler, // Power, Reset and Clock module - 0,0, // Reserved - IntDefaultHandler, // Shared SPI - IntDefaultHandler, // Generic SPI - IntDefaultHandler, // Link SPI - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0,0,0,0,0,0,0,0,0, // Reserved - 0,0 // Reserved -}; - - - -//***************************************************************************** -// -// This is the code that gets called when the processor first starts execution -// following a reset event. Only the absolutely necessary set is performed, -// after which the application supplied entry() routine is called. Any fancy -// actions (such as making decisions based on the reset cause register, and -// resetting the bits in that register) are left solely in the hands of the -// application. -// -//***************************************************************************** - -void ResetISR(void) -{ -#if defined(DEBUG) && !defined(BOOTLOADER) - { - // - // Fill the main stack with a known value so that - // we can measure the main stack high water mark - // - __asm volatile - ( - "ldr r0, =_stack \n" - "ldr r1, =_estack \n" - "mov r2, #0x55555555 \n" - ".thumb_func \n" - "fill_loop: \n" - "cmp r0, r1 \n" - "it lt \n" - "strlt r2, [r0], #4 \n" - "blt fill_loop \n" - ); - } -#endif - - { - // Get the initial stack pointer location from the vector table - // and write this value to the msp register - __asm volatile - ( - "ldr r0, =_text \n" - "ldr r0, [r0] \n" - "msr msp, r0 \n" - ); - } - - { - // - // Zero fill the bss segment. - // - __asm volatile - ( - "ldr r0, =_bss \n" - "ldr r1, =_ebss \n" - "mov r2, #0 \n" - ".thumb_func \n" - "zero_loop: \n" - "cmp r0, r1 \n" - "it lt \n" - "strlt r2, [r0], #4 \n" - "blt zero_loop \n" - ); - } - - { - // - // Call the application's entry point. - // - main(); - } -} - -#ifdef DEBUG -//***************************************************************************** -// -// This is the code that gets called when the processor receives a NMI. This -// simply enters an infinite loop, preserving the system state for examination -// by a debugger. -// -//***************************************************************************** - -static void NmiSR(void) -{ - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} - -//***************************************************************************** -// -// This is the code that gets called when the processor receives a hard fault -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** - -static void FaultISR(void) -{ - /* - * Get the appropriate stack pointer, depending on our mode, - * and use it as the parameter to the C handler. This function - * will never return - */ - - __asm volatile - ( - "movs r0, #4 \n" - "mov r1, lr \n" - "tst r0, r1 \n" - "beq _msp \n" - "mrs r0, psp \n" - "b HardFault_HandlerC \n" - "_msp: \n" - "mrs r0, msp \n" - "b HardFault_HandlerC \n" - ) ; -} - -//*********************************************************************************** -// HardFaultHandler_C: -// This is called from the FaultISR with a pointer the Fault stack -// as the parameter. We can then read the values from the stack and place them -// into local variables for ease of reading. -// We then read the various Fault Status and Address Registers to help decode -// cause of the fault. -// The function ends with a BKPT instruction to force control back into the debugger -//*********************************************************************************** -void HardFault_HandlerC(uint32_t *pulFaultStackAddress) -{ - volatile uint32_t r0 ; - volatile uint32_t r1 ; - volatile uint32_t r2 ; - volatile uint32_t r3 ; - volatile uint32_t r12 ; - volatile uint32_t lr ; - volatile uint32_t pc ; - volatile uint32_t psr ; - volatile _CFSR_t _CFSR ; - volatile _HFSR_t _HFSR ; - volatile uint32_t _BFAR ; - - - r0 = pulFaultStackAddress[0]; - r1 = pulFaultStackAddress[1]; - r2 = pulFaultStackAddress[2]; - r3 = pulFaultStackAddress[3]; - r12 = pulFaultStackAddress[4]; - lr = pulFaultStackAddress[5]; - pc = pulFaultStackAddress[6]; - psr = pulFaultStackAddress[7]; - - // Configurable Fault Status Register - // Consists of MMSR, BFSR and UFSR - _CFSR = (*((volatile _CFSR_t *)(0xE000ED28))); - // Hard Fault Status Register - _HFSR = (*((volatile _HFSR_t *)(0xE000ED2C))); - // Bus Fault Address Register - _BFAR = (*((volatile uint32_t *)(0xE000ED38))); - - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - for ( ; ; ) - { - // Keep the compiler happy - (void)r0, (void)r1, (void)r2, (void)r3, (void)r12, (void)lr, (void)pc, (void)psr; - (void)_CFSR, (void)_HFSR, (void)_BFAR; - } -} - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** - -static void BusFaultHandler(void) -{ - // Break into the debugger - __asm volatile ("bkpt #0 \n"); - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} -#endif - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -static void IntDefaultHandler(void) -{ -#ifdef DEBUG - // Break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - // - // Enter an infinite loop. - // - for ( ; ; ) - { - } -} - diff --git a/ports/cc3200/hal/systick.c b/ports/cc3200/hal/systick.c deleted file mode 100644 index 550e3ed1d2d49..0000000000000 --- a/ports/cc3200/hal/systick.c +++ /dev/null @@ -1,275 +0,0 @@ -//***************************************************************************** -// -// systick.c -// -// Driver for the SysTick timer in NVIC. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup systick_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_types.h" -#include "debug.h" -#include "interrupt.h" -#include "systick.h" - -//***************************************************************************** -// -//! Enables the SysTick counter. -//! -//! This function starts the SysTick counter. If an interrupt handler has been -//! registered, it is called when the SysTick counter rolls over. -//! -//! \note Calling this function causes the SysTick counter to (re)commence -//! counting from its current value. The counter is not automatically reloaded -//! with the period as specified in a previous call to SysTickPeriodSet(). If -//! an immediate reload is required, the \b NVIC_ST_CURRENT register must be -//! written to force the reload. Any write to this register clears the SysTick -//! counter to 0 and causes a reload with the supplied period on the next -//! clock. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickEnable(void) -{ - // - // Enable SysTick. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE; -} - -//***************************************************************************** -// -//! Disables the SysTick counter. -//! -//! This function stops the SysTick counter. If an interrupt handler has been -//! registered, it is not called until SysTick is restarted. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickDisable(void) -{ - // - // Disable SysTick. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_ENABLE); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for the SysTick interrupt. -//! -//! \param pfnHandler is a pointer to the function to be called when the -//! SysTick interrupt occurs. -//! -//! This function registers the handler to be called when a SysTick interrupt -//! occurs. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntRegister(void (*pfnHandler)(void)) -{ - // - // Register the interrupt handler, returning an error if an error occurs. - // - IntRegister(FAULT_SYSTICK, pfnHandler); - - // - // Enable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN; -} - -//***************************************************************************** -// -//! Unregisters the interrupt handler for the SysTick interrupt. -//! -//! This function unregisters the handler to be called when a SysTick interrupt -//! occurs. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntUnregister(void) -{ - // - // Disable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN); - - // - // Unregister the interrupt handler. - // - IntUnregister(FAULT_SYSTICK); -} - -//***************************************************************************** -// -//! Enables the SysTick interrupt. -//! -//! This function enables the SysTick interrupt, allowing it to be -//! reflected to the processor. -//! -//! \note The SysTick interrupt handler is not required to clear the SysTick -//! interrupt source because it is cleared automatically by the NVIC when the -//! interrupt handler is called. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntEnable(void) -{ - // - // Enable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN; -} - -//***************************************************************************** -// -//! Disables the SysTick interrupt. -//! -//! This function disables the SysTick interrupt, preventing it from being -//! reflected to the processor. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickIntDisable(void) -{ - // - // Disable the SysTick interrupt. - // - HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN); -} - -//***************************************************************************** -// -//! Sets the period of the SysTick counter. -//! -//! \param ulPeriod is the number of clock ticks in each period of the SysTick -//! counter and must be between 1 and 16,777,216, inclusive. -//! -//! This function sets the rate at which the SysTick counter wraps, which -//! equates to the number of processor clocks between interrupts. -//! -//! \note Calling this function does not cause the SysTick counter to reload -//! immediately. If an immediate reload is required, the \b NVIC_ST_CURRENT -//! register must be written. Any write to this register clears the SysTick -//! counter to 0 and causes a reload with the \e ulPeriod supplied here on -//! the next clock after SysTick is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -SysTickPeriodSet(unsigned long ulPeriod) -{ - // - // Check the arguments. - // - ASSERT((ulPeriod > 0) && (ulPeriod <= 16777216)); - - // - // Set the period of the SysTick counter. - // - HWREG(NVIC_ST_RELOAD) = ulPeriod - 1; -} - -//***************************************************************************** -// -//! Gets the period of the SysTick counter. -//! -//! This function returns the rate at which the SysTick counter wraps, which -//! equates to the number of processor clocks between interrupts. -//! -//! \return Returns the period of the SysTick counter. -// -//***************************************************************************** -unsigned long -SysTickPeriodGet(void) -{ - // - // Return the period of the SysTick counter. - // - return(HWREG(NVIC_ST_RELOAD) + 1); -} - -//***************************************************************************** -// -//! Gets the current value of the SysTick counter. -//! -//! This function returns the current value of the SysTick counter, which is -//! a value between the period - 1 and zero, inclusive. -//! -//! \return Returns the current value of the SysTick counter. -// -//***************************************************************************** -unsigned long -SysTickValueGet(void) -{ - // - // Return the current value of the SysTick counter. - // - return(HWREG(NVIC_ST_CURRENT)); -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/systick.h b/ports/cc3200/hal/systick.h deleted file mode 100644 index 3d1a33aaa9d6f..0000000000000 --- a/ports/cc3200/hal/systick.h +++ /dev/null @@ -1,78 +0,0 @@ -//***************************************************************************** -// -// systick.h -// -// Prototypes for the SysTick driver. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __SYSTICK_H__ -#define __SYSTICK_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern void SysTickEnable(void); -extern void SysTickDisable(void); -extern void SysTickIntRegister(void (*pfnHandler)(void)); -extern void SysTickIntUnregister(void); -extern void SysTickIntEnable(void); -extern void SysTickIntDisable(void); -extern void SysTickPeriodSet(unsigned long ulPeriod); -extern unsigned long SysTickPeriodGet(void); -extern unsigned long SysTickValueGet(void); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __SYSTICK_H__ diff --git a/ports/cc3200/hal/timer.c b/ports/cc3200/hal/timer.c deleted file mode 100644 index eaa2ed1435311..0000000000000 --- a/ports/cc3200/hal/timer.c +++ /dev/null @@ -1,1106 +0,0 @@ -//***************************************************************************** -// -// timer.c -// -// Driver for the timer module. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup GPT_General_Purpose_Timer_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_timer.h" -#include "inc/hw_types.h" -#include "debug.h" -#include "interrupt.h" -#include "timer.h" - - -//***************************************************************************** -// -//! \internal -//! Checks a timer base address. -//! -//! \param ulBase is the base address of the timer module. -//! -//! This function determines if a timer module base address is valid. -//! -//! \return Returns \b true if the base address is valid and \b false -//! otherwise. -// -//***************************************************************************** -#ifdef DEBUG -static tBoolean -TimerBaseValid(unsigned long ulBase) -{ - return((ulBase == TIMERA0_BASE) || (ulBase == TIMERA1_BASE) || - (ulBase == TIMERA2_BASE) || (ulBase == TIMERA3_BASE)); -} -#else -#define TimerBaseValid(ulBase) (ulBase) -#endif - -//***************************************************************************** -// -//! Enables the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to enable; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function enables operation of the timer module. The timer must be -//! configured before it is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -TimerEnable(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Enable the timer(s) module. - // - HWREG(ulBase + TIMER_O_CTL) |= ulTimer & (TIMER_CTL_TAEN | TIMER_CTL_TBEN); -} - -//***************************************************************************** -// -//! Disables the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to disable; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function disables operation of the timer module. -//! -//! \return None. -// -//***************************************************************************** -void -TimerDisable(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Disable the timer module. - // - HWREG(ulBase + TIMER_O_CTL) &= ~(ulTimer & - (TIMER_CTL_TAEN | TIMER_CTL_TBEN)); -} - -//***************************************************************************** -// -//! Configures the timer(s). -//! -//! \param ulBase is the base address of the timer module. -//! \param ulConfig is the configuration for the timer. -//! -//! This function configures the operating mode of the timer(s). The timer -//! module is disabled before being configured, and is left in the disabled -//! state. The 16/32-bit timer is comprised of two 16-bit timers that can -//! operate independently or be concatenated to form a 32-bit timer. -//! -//! The configuration is specified in \e ulConfig as one of the following -//! values: -//! -//! - \b TIMER_CFG_ONE_SHOT - Full-width one-shot timer -//! - \b TIMER_CFG_ONE_SHOT_UP - Full-width one-shot timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_PERIODIC - Full-width periodic timer -//! - \b TIMER_CFG_PERIODIC_UP - Full-width periodic timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_SPLIT_PAIR - Two half-width timers -//! -//! When configured for a pair of half-width timers, each timer is separately -//! configured. The first timer is configured by setting \e ulConfig to -//! the result of a logical OR operation between one of the following values -//! and \e ulConfig: -//! -//! - \b TIMER_CFG_A_ONE_SHOT - Half-width one-shot timer -//! - \b TIMER_CFG_A_ONE_SHOT_UP - Half-width one-shot timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_A_PERIODIC - Half-width periodic timer -//! - \b TIMER_CFG_A_PERIODIC_UP - Half-width periodic timer that counts up -//! instead of down (not available on all parts) -//! - \b TIMER_CFG_A_CAP_COUNT - Half-width edge count capture -//! - \b TIMER_CFG_A_CAP_TIME - Half-width edge time capture -//! - \b TIMER_CFG_A_PWM - Half-width PWM output -//! -//! Similarly, the second timer is configured by setting \e ulConfig to -//! the result of a logical OR operation between one of the corresponding -//! \b TIMER_CFG_B_* values and \e ulConfig. -//! -//! \return None. -// -//***************************************************************************** -void -TimerConfigure(unsigned long ulBase, unsigned long ulConfig) -{ - - ASSERT((ulConfig == TIMER_CFG_ONE_SHOT) || - (ulConfig == TIMER_CFG_ONE_SHOT_UP) || - (ulConfig == TIMER_CFG_PERIODIC) || - (ulConfig == TIMER_CFG_PERIODIC_UP) || - ((ulConfig & 0xff000000) == TIMER_CFG_SPLIT_PAIR)); - ASSERT(((ulConfig & 0xff000000) != TIMER_CFG_SPLIT_PAIR) || - ((((ulConfig & 0x000000ff) == TIMER_CFG_A_ONE_SHOT) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_ONE_SHOT_UP) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PERIODIC) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PERIODIC_UP) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_COUNT) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_CAP_TIME) || - ((ulConfig & 0x000000ff) == TIMER_CFG_A_PWM)) && - (((ulConfig & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT_UP) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PERIODIC) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PERIODIC_UP) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_COUNT) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_CAP_TIME) || - ((ulConfig & 0x0000ff00) == TIMER_CFG_B_PWM)))); - - // - // Enable CCP to IO path - // - HWREG(0x440260B0) = 0xFF; - - // - // Disable the timers. - // - HWREG(ulBase + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN); - - // - // Set the global timer configuration. - // - HWREG(ulBase + TIMER_O_CFG) = ulConfig >> 24; - - // - // Set the configuration of the A and B timers. Note that the B timer - // configuration is ignored by the hardware in 32-bit modes. - // - HWREG(ulBase + TIMER_O_TAMR) = ulConfig & 255; - HWREG(ulBase + TIMER_O_TBMR) = (ulConfig >> 8) & 255; -} - -//***************************************************************************** -// -//! Controls the output level. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param bInvert specifies the output level. -//! -//! This function sets the PWM output level for the specified timer. If the -//! \e bInvert parameter is \b true, then the timer's output is made active -//! low; otherwise, it is made active high. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlLevel(unsigned long ulBase, unsigned long ulTimer, - tBoolean bInvert) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the output levels as requested. - // - ulTimer &= TIMER_CTL_TAPWML | TIMER_CTL_TBPWML; - HWREG(ulBase + TIMER_O_CTL) = (bInvert ? - (HWREG(ulBase + TIMER_O_CTL) | ulTimer) : - (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer))); -} - -//***************************************************************************** -// -//! Controls the event type. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to be adjusted; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! \param ulEvent specifies the type of event; must be one of -//! \b TIMER_EVENT_POS_EDGE, \b TIMER_EVENT_NEG_EDGE, or -//! \b TIMER_EVENT_BOTH_EDGES. -//! -//! This function sets the signal edge(s) that triggers the timer when in -//! capture mode. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlEvent(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulEvent) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the event type. - // - ulEvent &= ulTimer & (TIMER_CTL_TAEVENT_M | TIMER_CTL_TBEVENT_M); - HWREG(ulBase + TIMER_O_CTL) = ((HWREG(ulBase + TIMER_O_CTL) & - ~(TIMER_CTL_TAEVENT_M | - TIMER_CTL_TBEVENT_M)) | ulEvent); -} - -//***************************************************************************** -// -//! Controls the stall handling. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to be adjusted; must be one of -//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. -//! \param bStall specifies the response to a stall signal. -//! -//! This function controls the stall response for the specified timer. If the -//! \e bStall parameter is \b true, then the timer stops counting if the -//! processor enters debug mode; otherwise the timer keeps running while in -//! debug mode. -//! -//! \return None. -// -//***************************************************************************** -void -TimerControlStall(unsigned long ulBase, unsigned long ulTimer, - tBoolean bStall) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the stall mode. - // - ulTimer &= TIMER_CTL_TASTALL | TIMER_CTL_TBSTALL; - HWREG(ulBase + TIMER_O_CTL) = (bStall ? - (HWREG(ulBase + TIMER_O_CTL) | ulTimer) : - (HWREG(ulBase + TIMER_O_CTL) & ~(ulTimer))); -} - -//***************************************************************************** -// -//! Set the timer prescale value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param ulValue is the timer prescale value which must be between 0 and 255 -//! (inclusive) for 16/32-bit timers. -//! -//! This function sets the value of the input clock prescaler. The prescaler -//! is only operational when in half-width mode and is used to extend the range -//! of the half-width timer modes. -//! -//! \return None. -// -//***************************************************************************** -void -TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - ASSERT(ulValue < 256); - - // - // Set the timer A prescaler if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAPR) = ulValue; - } - - // - // Set the timer B prescaler if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBPR) = ulValue; - } -} - - -//***************************************************************************** -// -//! Get the timer prescale value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. -//! -//! This function gets the value of the input clock prescaler. The prescaler -//! is only operational when in half-width mode and is used to extend the range -//! of the half-width timer modes. -//! -//! \return The value of the timer prescaler. -// -//***************************************************************************** - -unsigned long -TimerPrescaleGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Return the appropriate prescale value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAPR) : - HWREG(ulBase + TIMER_O_TBPR)); -} - -//***************************************************************************** -// -//! Set the timer prescale match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param ulValue is the timer prescale match value which must be between 0 -//! and 255 (inclusive) for 16/32-bit timers. -//! -//! This function sets the value of the input clock prescaler match value. -//! When in a half-width mode that uses the counter match and the prescaler, -//! the prescale match effectively extends the range of the match. -//! -//! \note The availability of the prescaler match varies with the -//! part and timer mode in use. Please consult the datasheet for the part you -//! are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - ASSERT(ulValue < 256); - - // - // Set the timer A prescale match if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAPMR) = ulValue; - } - - // - // Set the timer B prescale match if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBPMR) = ulValue; - } -} - -//***************************************************************************** -// -//! Get the timer prescale match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. -//! -//! This function gets the value of the input clock prescaler match value. -//! When in a half-width mode that uses the counter match and prescaler, the -//! prescale match effectively extends the range of the match. -//! -//! \note The availability of the prescaler match varies with the -//! part and timer mode in use. Please consult the datasheet for the part you -//! are using to determine whether this support is available. -//! -//! \return The value of the timer prescale match. -// -//***************************************************************************** -unsigned long -TimerPrescaleMatchGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Return the appropriate prescale match value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAPMR) : - HWREG(ulBase + TIMER_O_TBPMR)); -} - -//***************************************************************************** -// -//! Sets the timer load value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the -//! timer is configured for full-width operation. -//! \param ulValue is the load value. -//! -//! This function sets the timer load value; if the timer is running then the -//! value is immediately loaded into the timer. -//! -//! \note This function can be used for both full- and half-width modes of -//! 16/32-bit timers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerLoadSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the timer A load value if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAILR) = ulValue; - } - - // - // Set the timer B load value if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBILR) = ulValue; - } -} - -//***************************************************************************** -// -//! Gets the timer load value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for full-width operation. -//! -//! This function gets the currently programmed interval load value for the -//! specified timer. -//! -//! \note This function can be used for both full- and half-width modes of -//! 16/32-bit timers. -//! -//! \return Returns the load value for the timer. -// -//***************************************************************************** -unsigned long -TimerLoadGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate load value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAILR) : - HWREG(ulBase + TIMER_O_TBILR)); -} - -//***************************************************************************** -// -//! Gets the current timer value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! -//! This function reads the current value of the specified timer. -//! -//! \return Returns the current value of the timer. -// -//***************************************************************************** -unsigned long -TimerValueGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate timer value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAR) : - HWREG(ulBase + TIMER_O_TBR)); -} - -//***************************************************************************** -// -//! Sets the current timer value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! \param ulValue is the new value of the timer to be set. -//! -//! This function sets the current value of the specified timer. -//! -//! \return None. -// -//***************************************************************************** -void -TimerValueSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Set the appropriate timer value. - // - if( (ulTimer == TIMER_A) ) - { - HWREG(ulBase + TIMER_O_TAV) = ulValue; - } - else - { - HWREG(ulBase + TIMER_O_TBV) = ulValue; - } -} - - -//***************************************************************************** -// -//! Sets the timer match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s) to adjust; must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used when the -//! timer is configured for 32-bit operation. -//! \param ulValue is the match value. -//! -//! This function sets the match value for a timer. This is used in capture -//! count mode to determine when to interrupt the processor and in PWM mode to -//! determine the duty cycle of the output signal. -//! -//! \return None. -// -//***************************************************************************** -void -TimerMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Set the timer A match value if requested. - // - if(ulTimer & TIMER_A) - { - HWREG(ulBase + TIMER_O_TAMATCHR) = ulValue; - } - - // - // Set the timer B match value if requested. - // - if(ulTimer & TIMER_B) - { - HWREG(ulBase + TIMER_O_TBMATCHR) = ulValue; - } -} - -//***************************************************************************** -// -//! Gets the timer match value. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer; must be one of \b TIMER_A or -//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured -//! for 32-bit operation. -//! -//! This function gets the match value for the specified timer. -//! -//! \return Returns the match value for the timer. -// -//******************************************************************************** -unsigned long -TimerMatchGet(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B)); - - // - // Return the appropriate match value. - // - return((ulTimer == TIMER_A) ? HWREG(ulBase + TIMER_O_TAMATCHR) : - HWREG(ulBase + TIMER_O_TBMATCHR)); -} - - -//***************************************************************************** -// -//! Registers an interrupt handler for the timer interrupt. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! \param pfnHandler is a pointer to the function to be called when the timer -//! interrupt occurs. -//! -//! This function sets the handler to be called when a timer interrupt occurs. -//! In addition, this function enables the global interrupt in the interrupt -//! controller; specific timer interrupts must be enabled via TimerIntEnable(). -//! It is the interrupt handler's responsibility to clear the interrupt source -//! via TimerIntClear(). -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, - void (*pfnHandler)(void)) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - ulBase = ((ulBase == TIMERA0_BASE) ? INT_TIMERA0A : - ((ulBase == TIMERA1_BASE) ? INT_TIMERA1A : - ((ulBase == TIMERA2_BASE) ? INT_TIMERA2A : INT_TIMERA3A))); - - // - // Register an interrupt handler for timer A if requested. - // - if(ulTimer & TIMER_A) - { - // - // Register the interrupt handler. - // - IntRegister(ulBase, pfnHandler); - - // - // Enable the interrupt. - // - IntEnable(ulBase); - } - - // - // Register an interrupt handler for timer B if requested. - // - if(ulTimer & TIMER_B) - { - // - // Register the interrupt handler. - // - IntRegister(ulBase + 1, pfnHandler); - - // - // Enable the interrupt. - // - IntEnable(ulBase + 1); - } -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for the timer interrupt. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulTimer specifies the timer(s); must be one of \b TIMER_A, -//! \b TIMER_B, or \b TIMER_BOTH. -//! -//! This function clears the handler to be called when a timer interrupt -//! occurs. This function also masks off the interrupt in the interrupt -//! controller so that the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) || - (ulTimer == TIMER_BOTH)); - - // - // Get the interrupt number for this timer module. - // - - ulBase = ((ulBase == TIMERA0_BASE) ? INT_TIMERA0A : - ((ulBase == TIMERA1_BASE) ? INT_TIMERA1A : - ((ulBase == TIMERA2_BASE) ? INT_TIMERA2A : INT_TIMERA3A))); - - - - // - // Unregister the interrupt handler for timer A if requested. - // - if(ulTimer & TIMER_A) - { - // - // Disable the interrupt. - // - IntDisable(ulBase); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulBase); - } - - // - // Unregister the interrupt handler for timer B if requested. - // - if(ulTimer & TIMER_B) - { - // - // Disable the interrupt. - // - IntDisable(ulBase + 1); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulBase + 1); - } -} - -//***************************************************************************** -// -//! Enables individual timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! Enables the indicated timer interrupt sources. Only the sources that are -//! enabled can be reflected to the processor interrupt; disabled sources have -//! no effect on the processor. -//! -//! The \e ulIntFlags parameter must be the logical OR of any combination of -//! the following: -//! -//! - \b TIMER_CAPB_EVENT - Capture B event interrupt -//! - \b TIMER_CAPB_MATCH - Capture B match interrupt -//! - \b TIMER_TIMB_TIMEOUT - Timer B timeout interrupt -//! - \b TIMER_CAPA_EVENT - Capture A event interrupt -//! - \b TIMER_CAPA_MATCH - Capture A match interrupt -//! - \b TIMER_TIMA_TIMEOUT - Timer A timeout interrupt -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Enable the specified interrupts. - // - HWREG(ulBase + TIMER_O_IMR) |= ulIntFlags; -} - -//***************************************************************************** -// -//! Disables individual timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! Disables the indicated timer interrupt sources. Only the sources that are -//! enabled can be reflected to the processor interrupt; disabled sources have -//! no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to TimerIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Disable the specified interrupts. - // - HWREG(ulBase + TIMER_O_IMR) &= ~(ulIntFlags); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the timer module. -//! \param bMasked is false if the raw interrupt status is required and true if -//! the masked interrupt status is required. -//! -//! This function returns the interrupt status for the timer module. Either -//! the raw interrupt status or the status of interrupts that are allowed to -//! reflect to the processor can be returned. -//! -//! \return The current interrupt status, enumerated as a bit field of -//! values described in TimerIntEnable(). -// -//***************************************************************************** -unsigned long -TimerIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - return(bMasked ? HWREG(ulBase + TIMER_O_MIS) : - HWREG(ulBase + TIMER_O_RIS)); -} - -//***************************************************************************** -// -//! Clears timer interrupt sources. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified timer interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being triggered again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to TimerIntEnable(). -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Clear the requested interrupt sources. - // - HWREG(ulBase + TIMER_O_ICR) = ulIntFlags; -} - -//***************************************************************************** -// -//! Enables the events that can trigger a DMA request. -//! -//! \param ulBase is the base address of the timer module. -//! \param ulDMAEvent is a bit mask of the events that can trigger DMA. -//! -//! This function enables the timer events that can trigger the start of a DMA -//! sequence. The DMA trigger events are specified in the \e ui32DMAEvent -//! parameter by passing in the logical OR of the following values: -//! -//! - \b TIMER_DMA_MODEMATCH_B - The mode match DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_CAPEVENT_B - The capture event DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_CAPMATCH_B - The capture match DMA trigger for timer B is -//! enabled. -//! - \b TIMER_DMA_TIMEOUT_B - The timeout DMA trigger for timer B is enabled. -//! - \b TIMER_DMA_MODEMATCH_A - The mode match DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_CAPEVENT_A - The capture event DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_CAPMATCH_A - The capture match DMA trigger for timer A is -//! enabled. -//! - \b TIMER_DMA_TIMEOUT_A - The timeout DMA trigger for timer A is enabled. -//! -//! \return None. -// -//***************************************************************************** -void -TimerDMAEventSet(unsigned long ulBase, unsigned long ulDMAEvent) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Set the DMA triggers. - // - HWREG(ulBase + TIMER_O_DMAEV) = ulDMAEvent; -} - -//***************************************************************************** -// -//! Returns the events that can trigger a DMA request. -//! -//! \param ulBase is the base address of the timer module. -//! -//! This function returns the timer events that can trigger the start of a DMA -//! sequence. The DMA trigger events are the logical OR of the following -//! values: -//! -//! - \b TIMER_DMA_MODEMATCH_B - Enables the mode match DMA trigger for timer -//! B. -//! - \b TIMER_DMA_CAPEVENT_B - Enables the capture event DMA trigger for -//! timer B. -//! - \b TIMER_DMA_CAPMATCH_B - Enables the capture match DMA trigger for -//! timer B. -//! - \b TIMER_DMA_TIMEOUT_B - Enables the timeout DMA trigger for timer B. -//! - \b TIMER_DMA_MODEMATCH_A - Enables the mode match DMA trigger for timer -//! A. -//! - \b TIMER_DMA_CAPEVENT_A - Enables the capture event DMA trigger for -//! timer A. -//! - \b TIMER_DMA_CAPMATCH_A - Enables the capture match DMA trigger for -//! timer A. -//! - \b TIMER_DMA_TIMEOUT_A - Enables the timeout DMA trigger for timer A. -//! -//! \return The timer events that trigger the uDMA. -// -//***************************************************************************** -unsigned long -TimerDMAEventGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(TimerBaseValid(ulBase)); - - // - // Return the current DMA triggers. - // - return(HWREG(ulBase + TIMER_O_DMAEV)); -} -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/timer.h b/ports/cc3200/hal/timer.h deleted file mode 100644 index cbe4d2cb1b95a..0000000000000 --- a/ports/cc3200/hal/timer.h +++ /dev/null @@ -1,210 +0,0 @@ -//***************************************************************************** -// -// timer.h -// -// Prototypes for the timer module -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __TIMER_H__ -#define __TIMER_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Values that can be passed to TimerConfigure as the ulConfig parameter. -// -//***************************************************************************** - -#define TIMER_CFG_ONE_SHOT 0x00000021 // Full-width one-shot timer -#define TIMER_CFG_ONE_SHOT_UP 0x00000031 // Full-width one-shot up-count - // timer -#define TIMER_CFG_PERIODIC 0x00000022 // Full-width periodic timer -#define TIMER_CFG_PERIODIC_UP 0x00000032 // Full-width periodic up-count - // timer -#define TIMER_CFG_SPLIT_PAIR 0x04000000 // Two half-width timers - -#define TIMER_CFG_A_ONE_SHOT 0x00000021 // Timer A one-shot timer -#define TIMER_CFG_A_ONE_SHOT_UP 0x00000031 // Timer A one-shot up-count timer -#define TIMER_CFG_A_PERIODIC 0x00000022 // Timer A periodic timer -#define TIMER_CFG_A_PERIODIC_UP 0x00000032 // Timer A periodic up-count timer -#define TIMER_CFG_A_CAP_COUNT 0x00000003 // Timer A event counter -#define TIMER_CFG_A_CAP_COUNT_UP 0x00000013 // Timer A event up-counter -#define TIMER_CFG_A_CAP_TIME 0x00000007 // Timer A event timer -#define TIMER_CFG_A_CAP_TIME_UP 0x00000017 // Timer A event up-count timer -#define TIMER_CFG_A_PWM 0x0000000A // Timer A PWM output -#define TIMER_CFG_B_ONE_SHOT 0x00002100 // Timer B one-shot timer -#define TIMER_CFG_B_ONE_SHOT_UP 0x00003100 // Timer B one-shot up-count timer -#define TIMER_CFG_B_PERIODIC 0x00002200 // Timer B periodic timer -#define TIMER_CFG_B_PERIODIC_UP 0x00003200 // Timer B periodic up-count timer -#define TIMER_CFG_B_CAP_COUNT 0x00000300 // Timer B event counter -#define TIMER_CFG_B_CAP_COUNT_UP 0x00001300 // Timer B event up-counter -#define TIMER_CFG_B_CAP_TIME 0x00000700 // Timer B event timer -#define TIMER_CFG_B_CAP_TIME_UP 0x00001700 // Timer B event up-count timer -#define TIMER_CFG_B_PWM 0x00000A00 // Timer B PWM output - -//***************************************************************************** -// -// Values that can be passed to TimerIntEnable, TimerIntDisable, and -// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus. -// -//***************************************************************************** - -#define TIMER_TIMB_DMA 0x00002000 // TimerB DMA Done interrupt -#define TIMER_TIMB_MATCH 0x00000800 // TimerB match interrupt -#define TIMER_CAPB_EVENT 0x00000400 // CaptureB event interrupt -#define TIMER_CAPB_MATCH 0x00000200 // CaptureB match interrupt -#define TIMER_TIMB_TIMEOUT 0x00000100 // TimerB time out interrupt -#define TIMER_TIMA_DMA 0x00000020 // TimerA DMA Done interrupt -#define TIMER_TIMA_MATCH 0x00000010 // TimerA match interrupt -#define TIMER_CAPA_EVENT 0x00000004 // CaptureA event interrupt -#define TIMER_CAPA_MATCH 0x00000002 // CaptureA match interrupt -#define TIMER_TIMA_TIMEOUT 0x00000001 // TimerA time out interrupt - -//***************************************************************************** -// -// Values that can be passed to TimerControlEvent as the ulEvent parameter. -// -//***************************************************************************** -#define TIMER_EVENT_POS_EDGE 0x00000000 // Count positive edges -#define TIMER_EVENT_NEG_EDGE 0x00000404 // Count negative edges -#define TIMER_EVENT_BOTH_EDGES 0x00000C0C // Count both edges - -//***************************************************************************** -// -// Values that can be passed to most of the timer APIs as the ulTimer -// parameter. -// -//***************************************************************************** -#define TIMER_A 0x000000ff // Timer A -#define TIMER_B 0x0000ff00 // Timer B -#define TIMER_BOTH 0x0000ffff // Timer Both - - -//***************************************************************************** -// -// Values that can be passed to TimerSynchronize as the ulTimers parameter. -// -//***************************************************************************** -#define TIMER_0A_SYNC 0x00000001 // Synchronize Timer 0A -#define TIMER_0B_SYNC 0x00000002 // Synchronize Timer 0B -#define TIMER_1A_SYNC 0x00000004 // Synchronize Timer 1A -#define TIMER_1B_SYNC 0x00000008 // Synchronize Timer 1B -#define TIMER_2A_SYNC 0x00000010 // Synchronize Timer 2A -#define TIMER_2B_SYNC 0x00000020 // Synchronize Timer 2B -#define TIMER_3A_SYNC 0x00000040 // Synchronize Timer 3A -#define TIMER_3B_SYNC 0x00000080 // Synchronize Timer 3B - -//***************************************************************************** -// -// Values that can be passed to TimerDMAEventSet() or returned from -// TimerDMAEventGet(). -// -//***************************************************************************** -#define TIMER_DMA_MODEMATCH_B 0x00000800 -#define TIMER_DMA_CAPEVENT_B 0x00000400 -#define TIMER_DMA_CAPMATCH_B 0x00000200 -#define TIMER_DMA_TIMEOUT_B 0x00000100 -#define TIMER_DMA_MODEMATCH_A 0x00000010 -#define TIMER_DMA_CAPEVENT_A 0x00000004 -#define TIMER_DMA_CAPMATCH_A 0x00000002 -#define TIMER_DMA_TIMEOUT_A 0x00000001 - - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer); -extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer); -extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig); -extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer, - tBoolean bInvert); -extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulEvent); -extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer, - tBoolean bStall); -extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerPrescaleGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer); - -extern unsigned long TimerValueGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerValueSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); - -extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer, - unsigned long ulValue); -extern unsigned long TimerMatchGet(unsigned long ulBase, - unsigned long ulTimer); -extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, - void (*pfnHandler)(void)); -extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer); -extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void TimerDMAEventSet(unsigned long ulBase, unsigned long ulDMAEvent); -extern unsigned long TimerDMAEventGet(unsigned long ulBase); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __TIMER_H__ diff --git a/ports/cc3200/hal/uart.c b/ports/cc3200/hal/uart.c deleted file mode 100644 index 33d91414ba521..0000000000000 --- a/ports/cc3200/hal/uart.c +++ /dev/null @@ -1,1508 +0,0 @@ -//***************************************************************************** -// -// uart.c -// -// Driver for the UART. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup UART_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_uart.h" -#include "debug.h" -#include "interrupt.h" -#include "uart.h" - - -//***************************************************************************** -// -// A mapping of UART base address to interupt number. -// -//***************************************************************************** -static const unsigned long g_ppulUARTIntMap[][2] = -{ - { UARTA0_BASE, INT_UARTA0 }, - { UARTA1_BASE, INT_UARTA1 }, -}; - -//***************************************************************************** -// -//! \internal -//! Checks a UART base address. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function determines if a UART port base address is valid. -//! -//! \return Returns \b true if the base address is valid and \b false -//! otherwise. -// -//***************************************************************************** -#ifdef DEBUG -static tBoolean -UARTBaseValid(unsigned long ulBase) -{ - return((ulBase == UARTA0_BASE) || (ulBase == UARTA1_BASE)); -} -#else -#define UARTBaseValid(ulBase) (ulBase) -#endif - -//***************************************************************************** -// -//! \internal -//! Gets the UART interrupt number. -//! -//! \param ulBase is the base address of the UART port. -//! -//! Given a UART base address, returns the corresponding interrupt number. -//! -//! \return Returns a UART interrupt number, or -1 if \e ulBase is invalid. -// -//***************************************************************************** -static long -UARTIntNumberGet(unsigned long ulBase) -{ - unsigned long ulIdx; - - // - // Loop through the table that maps UART base addresses to interrupt - // numbers. - // - for(ulIdx = 0; ulIdx < (sizeof(g_ppulUARTIntMap) / - sizeof(g_ppulUARTIntMap[0])); ulIdx++) - { - // - // See if this base address matches. - // - if(g_ppulUARTIntMap[ulIdx][0] == ulBase) - { - // - // Return the corresponding interrupt number. - // - return(g_ppulUARTIntMap[ulIdx][1]); - } - } - - // - // The base address could not be found, so return an error. - // - return(-1); -} - -//***************************************************************************** -// -//! Sets the type of parity. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulParity specifies the type of parity to use. -//! -//! This function sets the type of parity to use for transmitting and expect -//! when receiving. The \e ulParity parameter must be one of -//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, -//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO. The last two allow -//! direct control of the parity bit; it is always either one or zero based on -//! the mode. -//! -//! \return None. -// -//***************************************************************************** -void -UARTParityModeSet(unsigned long ulBase, unsigned long ulParity) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulParity == UART_CONFIG_PAR_NONE) || - (ulParity == UART_CONFIG_PAR_EVEN) || - (ulParity == UART_CONFIG_PAR_ODD) || - (ulParity == UART_CONFIG_PAR_ONE) || - (ulParity == UART_CONFIG_PAR_ZERO)); - - // - // Set the parity mode. - // - HWREG(ulBase + UART_O_LCRH) = ((HWREG(ulBase + UART_O_LCRH) & - ~(UART_LCRH_SPS | UART_LCRH_EPS | - UART_LCRH_PEN)) | ulParity); -} - -//***************************************************************************** -// -//! Gets the type of parity currently being used. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets the type of parity used for transmitting data and -//! expected when receiving data. -//! -//! \return Returns the current parity settings, specified as one of -//! \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, \b UART_CONFIG_PAR_ODD, -//! \b UART_CONFIG_PAR_ONE, or \b UART_CONFIG_PAR_ZERO. -// -//***************************************************************************** -unsigned long -UARTParityModeGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current parity setting. - // - return(HWREG(ulBase + UART_O_LCRH) & - (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN)); -} - -//***************************************************************************** -// -//! Sets the FIFO level at which interrupts are generated. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulTxLevel is the transmit FIFO interrupt level, specified as one of -//! \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8, \b UART_FIFO_TX4_8, -//! \b UART_FIFO_TX6_8, or \b UART_FIFO_TX7_8. -//! \param ulRxLevel is the receive FIFO interrupt level, specified as one of -//! \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, \b UART_FIFO_RX4_8, -//! \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8. -//! -//! This function sets the FIFO level at which transmit and receive interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulTxLevel == UART_FIFO_TX1_8) || - (ulTxLevel == UART_FIFO_TX2_8) || - (ulTxLevel == UART_FIFO_TX4_8) || - (ulTxLevel == UART_FIFO_TX6_8) || - (ulTxLevel == UART_FIFO_TX7_8)); - ASSERT((ulRxLevel == UART_FIFO_RX1_8) || - (ulRxLevel == UART_FIFO_RX2_8) || - (ulRxLevel == UART_FIFO_RX4_8) || - (ulRxLevel == UART_FIFO_RX6_8) || - (ulRxLevel == UART_FIFO_RX7_8)); - - // - // Set the FIFO interrupt levels. - // - HWREG(ulBase + UART_O_IFLS) = ulTxLevel | ulRxLevel; -} - -//***************************************************************************** -// -//! Gets the FIFO level at which interrupts are generated. -//! -//! \param ulBase is the base address of the UART port. -//! \param pulTxLevel is a pointer to storage for the transmit FIFO level, -//! returned as one of \b UART_FIFO_TX1_8, \b UART_FIFO_TX2_8, -//! \b UART_FIFO_TX4_8, \b UART_FIFO_TX6_8, or \b UART_FIFO_TX7_8. -//! \param pulRxLevel is a pointer to storage for the receive FIFO level, -//! returned as one of \b UART_FIFO_RX1_8, \b UART_FIFO_RX2_8, -//! \b UART_FIFO_RX4_8, \b UART_FIFO_RX6_8, or \b UART_FIFO_RX7_8. -//! -//! This function gets the FIFO level at which transmit and receive interrupts -//! are generated. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Read the FIFO level register. - // - ulTemp = HWREG(ulBase + UART_O_IFLS); - - // - // Extract the transmit and receive FIFO levels. - // - *pulTxLevel = ulTemp & UART_IFLS_TX_M; - *pulRxLevel = ulTemp & UART_IFLS_RX_M; -} - -//***************************************************************************** -// -//! Sets the configuration of a UART. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulUARTClk is the rate of the clock supplied to the UART module. -//! \param ulBaud is the desired baud rate. -//! \param ulConfig is the data format for the port (number of data bits, -//! number of stop bits, and parity). -//! -//! This function configures the UART for operation in the specified data -//! format. The baud rate is provided in the \e ulBaud parameter and the data -//! format in the \e ulConfig parameter. -//! -//! The \e ulConfig parameter is the logical OR of three values: the number of -//! data bits, the number of stop bits, and the parity. \b UART_CONFIG_WLEN_8, -//! \b UART_CONFIG_WLEN_7, \b UART_CONFIG_WLEN_6, and \b UART_CONFIG_WLEN_5 -//! select from eight to five data bits per byte (respectively). -//! \b UART_CONFIG_STOP_ONE and \b UART_CONFIG_STOP_TWO select one or two stop -//! bits (respectively). \b UART_CONFIG_PAR_NONE, \b UART_CONFIG_PAR_EVEN, -//! \b UART_CONFIG_PAR_ODD, \b UART_CONFIG_PAR_ONE, and \b UART_CONFIG_PAR_ZERO -//! select the parity mode (no parity bit, even parity bit, odd parity bit, -//! parity bit always one, and parity bit always zero, respectively). -//! -//! The peripheral clock is the same as the processor clock. The frequency of -//! the system clock is the value returned by SysCtlClockGet(), or it can be -//! explicitly hard coded if it is constant and known (to save the -//! code/execution overhead of a call to SysCtlClockGet()). -//! -//! -//! \return None. -// -//***************************************************************************** -void -UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long ulBaud, unsigned long ulConfig) -{ - unsigned long ulDiv; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT(ulBaud != 0); - - // - // Stop the UART. - // - UARTDisable(ulBase); - - // - // Is the required baud rate greater than the maximum rate supported - // without the use of high speed mode? - // - if((ulBaud * 16) > ulUARTClk) - { - // - // Enable high speed mode. - // - HWREG(ulBase + UART_O_CTL) |= UART_CTL_HSE; - - // - // Half the supplied baud rate to compensate for enabling high speed - // mode. This allows the following code to be common to both cases. - // - ulBaud /= 2; - } - else - { - // - // Disable high speed mode. - // - HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_HSE); - } - - // - // Compute the fractional baud rate divider. - // - ulDiv = (((ulUARTClk * 8) / ulBaud) + 1) / 2; - - // - // Set the baud rate. - // - HWREG(ulBase + UART_O_IBRD) = ulDiv / 64; - HWREG(ulBase + UART_O_FBRD) = ulDiv % 64; - - // - // Set parity, data length, and number of stop bits. - // - HWREG(ulBase + UART_O_LCRH) = ulConfig; - - // - // Clear the flags register. - // - HWREG(ulBase + UART_O_FR) = 0; - - // - // Start the UART. - // - UARTEnable(ulBase); -} - -//***************************************************************************** -// -//! Gets the current configuration of a UART. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulUARTClk is the rate of the clock supplied to the UART module. -//! \param pulBaud is a pointer to storage for the baud rate. -//! \param pulConfig is a pointer to storage for the data format. -//! -//! The baud rate and data format for the UART is determined, given an -//! explicitly provided peripheral clock (hence the ExpClk suffix). The -//! returned baud rate is the actual baud rate; it may not be the exact baud -//! rate requested or an ``official'' baud rate. The data format returned in -//! \e pulConfig is enumerated the same as the \e ulConfig parameter of -//! UARTConfigSetExpClk(). -//! -//! The peripheral clock is the same as the processor clock. The frequency of -//! the system clock is the value returned by SysCtlClockGet(), or it can be -//! explicitly hard coded if it is constant and known (to save the -//! code/execution overhead of a call to SysCtlClockGet()). -//! -//! -//! \return None. -// -//***************************************************************************** -void -UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long *pulBaud, unsigned long *pulConfig) -{ - unsigned long ulInt, ulFrac; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Compute the baud rate. - // - ulInt = HWREG(ulBase + UART_O_IBRD); - ulFrac = HWREG(ulBase + UART_O_FBRD); - *pulBaud = (ulUARTClk * 4) / ((64 * ulInt) + ulFrac); - - // - // See if high speed mode enabled. - // - if(HWREG(ulBase + UART_O_CTL) & UART_CTL_HSE) - { - // - // High speed mode is enabled so the actual baud rate is actually - // double what was just calculated. - // - *pulBaud *= 2; - } - - // - // Get the parity, data length, and number of stop bits. - // - *pulConfig = (HWREG(ulBase + UART_O_LCRH) & - (UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 | - UART_LCRH_EPS | UART_LCRH_PEN)); -} - -//***************************************************************************** -// -//! Enables transmitting and receiving. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function sets the UARTEN, TXE, and RXE bits, and enables the transmit -//! and receive FIFOs. -//! -//! \return None. -// -//***************************************************************************** -void -UARTEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN; - - // - // Enable RX, TX, and the UART. - // - HWREG(ulBase + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE | - UART_CTL_RXE); -} - -//***************************************************************************** -// -//! Disables transmitting and receiving. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function clears the UARTEN, TXE, and RXE bits, waits for the end of -//! transmission of the current character, and flushes the transmit FIFO. -//! -//! \return None. -// -//***************************************************************************** -void -UARTDisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait for end of TX. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) - { - } - - // - // Disable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN); - - // - // Disable the UART. - // - HWREG(ulBase + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE | - UART_CTL_RXE); -} - -//***************************************************************************** -// -//! Enables the transmit and receive FIFOs. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This functions enables the transmit and receive FIFOs in the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFOEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) |= UART_LCRH_FEN; -} - -//***************************************************************************** -// -//! Disables the transmit and receive FIFOs. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This functions disables the transmit and receive FIFOs in the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFIFODisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Disable the FIFO. - // - HWREG(ulBase + UART_O_LCRH) &= ~(UART_LCRH_FEN); -} - -//***************************************************************************** -// -//! Sets the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulControl is a bit-mapped flag indicating which modem control bits -//! should be set. -//! -//! This function sets the states of the RTS modem handshake outputs -//! from the UART. -//! -//! The \e ulControl parameter is the logical OR of any of the following: -//! -//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTModemControlSet(unsigned long ulBase, unsigned long ulControl) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - - ASSERT(ulBase == UARTA1_BASE); - ASSERT((ulControl & ~(UART_OUTPUT_RTS)) == 0); - - // - // Set the appropriate modem control output bits. - // - ulTemp = HWREG(ulBase + UART_O_CTL); - ulTemp |= (ulControl & (UART_OUTPUT_RTS)); - HWREG(ulBase + UART_O_CTL) = ulTemp; -} - -//***************************************************************************** -// -//! Clears the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulControl is a bit-mapped flag indicating which modem control bits -//! should be set. -//! -//! This function clears the states of the RTS modem handshake outputs -//! from the UART. -//! -//! The \e ulControl parameter is the logical OR of any of the following: -//! -//! - \b UART_OUTPUT_RTS - The Modem Control RTS signal -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTModemControlClear(unsigned long ulBase, unsigned long ulControl) -{ - unsigned long ulTemp; - - // - // Check the arguments. - // - ASSERT(ulBase == UARTA1_BASE); - ASSERT((ulControl & ~(UART_OUTPUT_RTS)) == 0); - - // - // Set the appropriate modem control output bits. - // - ulTemp = HWREG(ulBase + UART_O_CTL); - ulTemp &= ~(ulControl & (UART_OUTPUT_RTS)); - HWREG(ulBase + UART_O_CTL) = ulTemp; -} - -//***************************************************************************** -// -//! Gets the states of the RTS modem control signals. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current states of each of the UART modem -//! control signal, RTS. -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return Returns the states of the handshake output signal. -// -//***************************************************************************** -unsigned long -UARTModemControlGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(ulBase == UARTA1_BASE); - - return(HWREG(ulBase + UART_O_CTL) & (UART_OUTPUT_RTS)); -} - -//***************************************************************************** -// -//! Gets the states of the CTS modem status signal. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current states of the UART modem status signal, -//! CTS. -//! -//! \note The availability of hardware modem handshake signals varies with the -//! part and UART in use. Please consult the datasheet for the part -//! you are using to determine whether this support is available. -//! -//! \return Returns the states of the handshake output signal -// -//***************************************************************************** -unsigned long -UARTModemStatusGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - - ASSERT(ulBase == UARTA1_BASE); - - return(HWREG(ulBase + UART_O_FR) & (UART_INPUT_CTS)); -} - -//***************************************************************************** -// -//! Sets the UART hardware flow control mode to be used. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulMode indicates the flow control modes to be used. This parameter -//! is a logical OR combination of values \b UART_FLOWCONTROL_TX and -//! \b UART_FLOWCONTROL_RX to enable hardware transmit (CTS) and receive (RTS) -//! flow control or \b UART_FLOWCONTROL_NONE to disable hardware flow control. -//! -//! This function sets the required hardware flow control modes. If \e ulMode -//! contains flag \b UART_FLOWCONTROL_TX, data is only transmitted if the -//! incoming CTS signal is asserted. If \e ulMode contains flag -//! \b UART_FLOWCONTROL_RX, the RTS output is controlled by the hardware and is -//! asserted only when there is space available in the receive FIFO. If no -//! hardware flow control is required, \b UART_FLOWCONTROL_NONE should be -//! passed. -//! -//! \note The availability of hardware flow control varies with the -//! part and UART in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode) -{ - // - // Check the arguments. - // - - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulMode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0); - - // - // Set the flow control mode as requested. - // - HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) & - ~(UART_FLOWCONTROL_TX | - UART_FLOWCONTROL_RX)) | ulMode); -} - -//***************************************************************************** -// -//! Returns the UART hardware flow control mode currently in use. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current hardware flow control mode. -//! -//! \note The availability of hardware flow control varies with the -//! part and UART in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return Returns the current flow control mode in use. This is a -//! logical OR combination of values \b UART_FLOWCONTROL_TX if transmit -//! (CTS) flow control is enabled and \b UART_FLOWCONTROL_RX if receive (RTS) -//! flow control is in use. If hardware flow control is disabled, -//! \b UART_FLOWCONTROL_NONE is returned. -// -//***************************************************************************** -unsigned long -UARTFlowControlGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - - ASSERT(UARTBaseValid(ulBase)); - - return(HWREG(ulBase + UART_O_CTL) & (UART_FLOWCONTROL_TX | - UART_FLOWCONTROL_RX)); -} - -//***************************************************************************** -// -//! Sets the operating mode for the UART transmit interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulMode is the operating mode for the transmit interrupt. It may be -//! \b UART_TXINT_MODE_EOT to trigger interrupts when the transmitter is idle -//! or \b UART_TXINT_MODE_FIFO to trigger based on the current transmit FIFO -//! level. -//! -//! This function allows the mode of the UART transmit interrupt to be set. By -//! default, the transmit interrupt is asserted when the FIFO level falls past -//! a threshold set via a call to UARTFIFOLevelSet(). Alternatively, if this -//! function is called with \e ulMode set to \b UART_TXINT_MODE_EOT, the -//! transmit interrupt is asserted once the transmitter is completely idle - -//! the transmit FIFO is empty and all bits, including any stop bits, have -//! cleared the transmitter. -//! -//! \note The availability of end-of-transmission mode varies with the -//! part in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return None. -// -//***************************************************************************** -void -UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - ASSERT((ulMode == UART_TXINT_MODE_EOT) || - (ulMode == UART_TXINT_MODE_FIFO)); - - // - // Set or clear the EOT bit of the UART control register as appropriate. - // - HWREG(ulBase + UART_O_CTL) = ((HWREG(ulBase + UART_O_CTL) & - ~(UART_TXINT_MODE_EOT | - UART_TXINT_MODE_FIFO)) | ulMode); -} - -//***************************************************************************** -// -//! Returns the current operating mode for the UART transmit interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current operating mode for the UART transmit -//! interrupt. The return value is \b UART_TXINT_MODE_EOT if the transmit -//! interrupt is currently set to be asserted once the transmitter is -//! completely idle - the transmit FIFO is empty and all bits, including any -//! stop bits, have cleared the transmitter. The return value is -//! \b UART_TXINT_MODE_FIFO if the interrupt is set to be asserted based upon -//! the level of the transmit FIFO. -//! -//! \note The availability of end-of-transmission mode varies with the -//! part in use. Please consult the datasheet for the part you are -//! using to determine whether this support is available. -//! -//! \return Returns \b UART_TXINT_MODE_FIFO or \b UART_TXINT_MODE_EOT. -// -//***************************************************************************** -unsigned long -UARTTxIntModeGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current transmit interrupt mode. - // - return(HWREG(ulBase + UART_O_CTL) & (UART_TXINT_MODE_EOT | - UART_TXINT_MODE_FIFO)); -} - -//***************************************************************************** -// -//! Determines if there are any characters in the receive FIFO. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns a flag indicating whether or not there is data -//! available in the receive FIFO. -//! -//! \return Returns \b true if there is data in the receive FIFO or \b false -//! if there is no data in the receive FIFO. -// -//***************************************************************************** -tBoolean -UARTCharsAvail(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the availability of characters. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true); -} - -//***************************************************************************** -// -//! Determines if there is any space in the transmit FIFO. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns a flag indicating whether or not there is space -//! available in the transmit FIFO. -//! -//! \return Returns \b true if there is space available in the transmit FIFO -//! or \b false if there is no space available in the transmit FIFO. -// -//***************************************************************************** -tBoolean -UARTSpaceAvail(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the availability of space. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) ? false : true); -} - -//***************************************************************************** -// -//! Receives a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets a character from the receive FIFO for the specified -//! port. -//! -//! -//! \return Returns the character read from the specified port, cast as a -//! \e long. A \b -1 is returned if there are no characters present in the -//! receive FIFO. The UARTCharsAvail() function should be called before -//! attempting to call this function. -// -//***************************************************************************** -long -UARTCharGetNonBlocking(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // See if there are any characters in the receive FIFO. - // - if(!(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE)) - { - // - // Read and return the next character. - // - return(HWREG(ulBase + UART_O_DR)); - } - else - { - // - // There are no characters, so return a failure. - // - return(-1); - } -} - -//***************************************************************************** -// -//! Waits for a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function gets a character from the receive FIFO for the specified -//! port. If there are no characters available, this function waits until a -//! character is received before returning. -//! -//! \return Returns the character read from the specified port, cast as a -//! \e long. -// -//***************************************************************************** -long -UARTCharGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait until a char is available. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) - { - } - - // - // Now get the char. - // - return(HWREG(ulBase + UART_O_DR)); -} - -//***************************************************************************** -// -//! Sends a character to the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! \param ucData is the character to be transmitted. -//! -//! This function writes the character \e ucData to the transmit FIFO for the -//! specified port. This function does not block, so if there is no space -//! available, then a \b false is returned, and the application must retry the -//! function later. -//! -//! \return Returns \b true if the character was successfully placed in the -//! transmit FIFO or \b false if there was no space available in the transmit -//! FIFO. -// -//***************************************************************************** -tBoolean -UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // See if there is space in the transmit FIFO. - // - if(!(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF)) - { - // - // Write this character to the transmit FIFO. - // - HWREG(ulBase + UART_O_DR) = ucData; - - // - // Success. - // - return(true); - } - else - { - // - // There is no space in the transmit FIFO, so return a failure. - // - return(false); - } -} - -//***************************************************************************** -// -//! Waits to send a character from the specified port. -//! -//! \param ulBase is the base address of the UART port. -//! \param ucData is the character to be transmitted. -//! -//! This function sends the character \e ucData to the transmit FIFO for the -//! specified port. If there is no space available in the transmit FIFO, this -//! function waits until there is space available before returning. -//! -//! \return None. -// -//***************************************************************************** -void -UARTCharPut(unsigned long ulBase, unsigned char ucData) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Wait until space is available. - // - while(HWREG(ulBase + UART_O_FR) & UART_FR_TXFF) - { - } - - // - // Send the char. - // - HWREG(ulBase + UART_O_DR) = ucData; -} - -//***************************************************************************** -// -//! Causes a BREAK to be sent. -//! -//! \param ulBase is the base address of the UART port. -//! \param bBreakState controls the output level. -//! -//! Calling this function with \e bBreakState set to \b true asserts a break -//! condition on the UART. Calling this function with \e bBreakState set to -//! \b false removes the break condition. For proper transmission of a break -//! command, the break must be asserted for at least two complete frames. -//! -//! \return None. -// -//***************************************************************************** -void -UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Set the break condition as requested. - // - HWREG(ulBase + UART_O_LCRH) = - (bBreakState ? - (HWREG(ulBase + UART_O_LCRH) | UART_LCRH_BRK) : - (HWREG(ulBase + UART_O_LCRH) & ~(UART_LCRH_BRK))); -} - -//***************************************************************************** -// -//! Determines whether the UART transmitter is busy or not. -//! -//! \param ulBase is the base address of the UART port. -//! -//! Allows the caller to determine whether all transmitted bytes have cleared -//! the transmitter hardware. If \b false is returned, the transmit FIFO is -//! empty and all bits of the last transmitted character, including all stop -//! bits, have left the hardware shift register. -//! -//! \return Returns \b true if the UART is transmitting or \b false if all -//! transmissions are complete. -// -//***************************************************************************** -tBoolean -UARTBusy(unsigned long ulBase) -{ - // - // Check the argument. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine if the UART is busy. - // - return((HWREG(ulBase + UART_O_FR) & UART_FR_BUSY) ? true : false); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for a UART interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! \param pfnHandler is a pointer to the function to be called when the -//! UART interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via UARTIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) -{ - unsigned long ulInt; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine the interrupt number based on the UART port. - // - - ulInt = UARTIntNumberGet(ulBase); - - // - // Register the interrupt handler. - // - IntRegister(ulInt, pfnHandler); - - // - // Enable the UART interrupt. - // - IntEnable(ulInt); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for a UART interrupt. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function does the actual unregistering of the interrupt handler. It -//! clears the handler to be called when a UART interrupt occurs. This -//! function also masks off the interrupt in the interrupt controller so that -//! the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntUnregister(unsigned long ulBase) -{ - unsigned long ulInt; - - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Determine the interrupt number based on the UART port. - // - ulInt = UARTIntNumberGet(ulBase); - - // - // Disable the interrupt. - // - IntDisable(ulInt); - - // - // Unregister the interrupt handler. - // - IntUnregister(ulInt); -} - -//***************************************************************************** -// -//! Enables individual UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is the bit mask of the interrupt sources to be enabled. -//! -//! This function enables the indicated UART interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter is the logical OR of any of the following: -//! -//! - \b UART_INT_OE - Overrun Error interrupt -//! - \b UART_INT_BE - Break Error interrupt -//! - \b UART_INT_PE - Parity Error interrupt -//! - \b UART_INT_FE - Framing Error interrupt -//! - \b UART_INT_RT - Receive Timeout interrupt -//! - \b UART_INT_TX - Transmit interrupt -//! - \b UART_INT_RX - Receive interrupt -//! - \b UART_INT_CTS - CTS interrupt -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Enable the specified interrupts. - // - HWREG(ulBase + UART_O_IM) |= ulIntFlags; -} - -//***************************************************************************** -// -//! Disables individual UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is the bit mask of the interrupt sources to be disabled. -//! -//! This function disables the indicated UART interrupt sources. Only the -//! sources that are enabled can be reflected to the processor interrupt; -//! disabled sources have no effect on the processor. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to UARTIntEnable(). -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Disable the specified interrupts. - // - HWREG(ulBase + UART_O_IM) &= ~(ulIntFlags); -} - -//***************************************************************************** -// -//! Gets the current interrupt status. -//! -//! \param ulBase is the base address of the UART port. -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This function returns the interrupt status for the specified UART. Either -//! the raw interrupt status or the status of interrupts that are allowed to -//! reflect to the processor can be returned. -//! -//! \return Returns the current interrupt status, enumerated as a bit field of -//! values described in UARTIntEnable(). -// -//***************************************************************************** -unsigned long -UARTIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - if(bMasked) - { - return(HWREG(ulBase + UART_O_MIS)); - } - else - { - return(HWREG(ulBase + UART_O_RIS)); - } -} - -//***************************************************************************** -// -//! Clears UART interrupt sources. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared. -//! -//! The specified UART interrupt sources are cleared, so that they no longer -//! assert. This function must be called in the interrupt handler to keep the -//! interrupt from being recognized again immediately upon exit. -//! -//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags -//! parameter to UARTIntEnable(). -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Clear the requested interrupt sources. - // - HWREG(ulBase + UART_O_ICR) = ulIntFlags; -} - -//***************************************************************************** -// -//! Enable UART DMA operation. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulDMAFlags is a bit mask of the DMA features to enable. -//! -//! The specified UART DMA features are enabled. The UART can be -//! configured to use DMA for transmit or receive, and to disable -//! receive if an error occurs. The \e ulDMAFlags parameter is the -//! logical OR of any of the following values: -//! -//! - UART_DMA_RX - enable DMA for receive -//! - UART_DMA_TX - enable DMA for transmit -//! - UART_DMA_ERR_RXSTOP - disable DMA receive on UART error -//! -//! \note The uDMA controller must also be set up before DMA can be used -//! with the UART. -//! -//! \return None. -// -//***************************************************************************** -void -UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Set the requested bits in the UART DMA control register. - // - HWREG(ulBase + UART_O_DMACTL) |= ulDMAFlags; -} - -//***************************************************************************** -// -//! Disable UART DMA operation. -//! -//! \param ulBase is the base address of the UART port. -//! \param ulDMAFlags is a bit mask of the DMA features to disable. -//! -//! This function is used to disable UART DMA features that were enabled -//! by UARTDMAEnable(). The specified UART DMA features are disabled. The -//! \e ulDMAFlags parameter is the logical OR of any of the following values: -//! -//! - UART_DMA_RX - disable DMA for receive -//! - UART_DMA_TX - disable DMA for transmit -//! - UART_DMA_ERR_RXSTOP - do not disable DMA receive on UART error -//! -//! \return None. -// -//***************************************************************************** -void -UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Clear the requested bits in the UART DMA control register. - // - HWREG(ulBase + UART_O_DMACTL) &= ~ulDMAFlags; -} - -//***************************************************************************** -// -//! Gets current receiver errors. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function returns the current state of each of the 4 receiver error -//! sources. The returned errors are equivalent to the four error bits -//! returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking() -//! with the exception that the overrun error is set immediately the overrun -//! occurs rather than when a character is next read. -//! -//! \return Returns a logical OR combination of the receiver error flags, -//! \b UART_RXERROR_FRAMING, \b UART_RXERROR_PARITY, \b UART_RXERROR_BREAK -//! and \b UART_RXERROR_OVERRUN. -// -//***************************************************************************** -unsigned long -UARTRxErrorGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Return the current value of the receive status register. - // - return(HWREG(ulBase + UART_O_RSR) & 0x0000000F); -} - -//***************************************************************************** -// -//! Clears all reported receiver errors. -//! -//! \param ulBase is the base address of the UART port. -//! -//! This function is used to clear all receiver error conditions reported via -//! UARTRxErrorGet(). If using the overrun, framing error, parity error or -//! break interrupts, this function must be called after clearing the interrupt -//! to ensure that later errors of the same type trigger another interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -UARTRxErrorClear(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT(UARTBaseValid(ulBase)); - - // - // Any write to the Error Clear Register will clear all bits which are - // currently set. - // - HWREG(ulBase + UART_O_ECR) = 0; -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/uart.h b/ports/cc3200/hal/uart.h deleted file mode 100644 index 503cd2c9e23a1..0000000000000 --- a/ports/cc3200/hal/uart.h +++ /dev/null @@ -1,234 +0,0 @@ -//***************************************************************************** -// -// uart.h -// -// Defines and Macros for the UART. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __UART_H__ -#define __UART_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// Values that can be passed to UARTIntEnable, UARTIntDisable, and UARTIntClear -// as the ulIntFlags parameter, and returned from UARTIntStatus. -// -//***************************************************************************** -#define UART_INT_DMATX 0x20000 // DMA Tx Done interrupt Mask -#define UART_INT_DMARX 0x10000 // DMA Rx Done interrupt Mask -#define UART_INT_EOT 0x800 // End of transfer interrupt Mask -#define UART_INT_OE 0x400 // Overrun Error Interrupt Mask -#define UART_INT_BE 0x200 // Break Error Interrupt Mask -#define UART_INT_PE 0x100 // Parity Error Interrupt Mask -#define UART_INT_FE 0x080 // Framing Error Interrupt Mask -#define UART_INT_RT 0x040 // Receive Timeout Interrupt Mask -#define UART_INT_TX 0x020 // Transmit Interrupt Mask -#define UART_INT_RX 0x010 // Receive Interrupt Mask -#define UART_INT_CTS 0x002 // CTS Modem Interrupt Mask - - -//***************************************************************************** -// -// Values that can be passed to UARTConfigSetExpClk as the ulConfig parameter -// and returned by UARTConfigGetExpClk in the pulConfig parameter. -// Additionally, the UART_CONFIG_PAR_* subset can be passed to -// UARTParityModeSet as the ulParity parameter, and are returned by -// UARTParityModeGet. -// -//***************************************************************************** -#define UART_CONFIG_WLEN_MASK 0x00000060 // Mask for extracting word length -#define UART_CONFIG_WLEN_8 0x00000060 // 8 bit data -#define UART_CONFIG_WLEN_7 0x00000040 // 7 bit data -#define UART_CONFIG_WLEN_6 0x00000020 // 6 bit data -#define UART_CONFIG_WLEN_5 0x00000000 // 5 bit data -#define UART_CONFIG_STOP_MASK 0x00000008 // Mask for extracting stop bits -#define UART_CONFIG_STOP_ONE 0x00000000 // One stop bit -#define UART_CONFIG_STOP_TWO 0x00000008 // Two stop bits -#define UART_CONFIG_PAR_MASK 0x00000086 // Mask for extracting parity -#define UART_CONFIG_PAR_NONE 0x00000000 // No parity -#define UART_CONFIG_PAR_EVEN 0x00000006 // Even parity -#define UART_CONFIG_PAR_ODD 0x00000002 // Odd parity -#define UART_CONFIG_PAR_ONE 0x00000082 // Parity bit is one -#define UART_CONFIG_PAR_ZERO 0x00000086 // Parity bit is zero - -//***************************************************************************** -// -// Values that can be passed to UARTFIFOLevelSet as the ulTxLevel parameter and -// returned by UARTFIFOLevelGet in the pulTxLevel. -// -//***************************************************************************** -#define UART_FIFO_TX1_8 0x00000000 // Transmit interrupt at 1/8 Full -#define UART_FIFO_TX2_8 0x00000001 // Transmit interrupt at 1/4 Full -#define UART_FIFO_TX4_8 0x00000002 // Transmit interrupt at 1/2 Full -#define UART_FIFO_TX6_8 0x00000003 // Transmit interrupt at 3/4 Full -#define UART_FIFO_TX7_8 0x00000004 // Transmit interrupt at 7/8 Full - -//***************************************************************************** -// -// Values that can be passed to UARTFIFOLevelSet as the ulRxLevel parameter and -// returned by UARTFIFOLevelGet in the pulRxLevel. -// -//***************************************************************************** -#define UART_FIFO_RX1_8 0x00000000 // Receive interrupt at 1/8 Full -#define UART_FIFO_RX2_8 0x00000008 // Receive interrupt at 1/4 Full -#define UART_FIFO_RX4_8 0x00000010 // Receive interrupt at 1/2 Full -#define UART_FIFO_RX6_8 0x00000018 // Receive interrupt at 3/4 Full -#define UART_FIFO_RX7_8 0x00000020 // Receive interrupt at 7/8 Full - -//***************************************************************************** -// -// Values that can be passed to UARTDMAEnable() and UARTDMADisable(). -// -//***************************************************************************** -#define UART_DMA_ERR_RXSTOP 0x00000004 // Stop DMA receive if UART error -#define UART_DMA_TX 0x00000002 // Enable DMA for transmit -#define UART_DMA_RX 0x00000001 // Enable DMA for receive - -//***************************************************************************** -// -// Values returned from UARTRxErrorGet(). -// -//***************************************************************************** -#define UART_RXERROR_OVERRUN 0x00000008 -#define UART_RXERROR_BREAK 0x00000004 -#define UART_RXERROR_PARITY 0x00000002 -#define UART_RXERROR_FRAMING 0x00000001 - -//***************************************************************************** -// -// Values that can be passed to UARTModemControlSet()and UARTModemControlClear() -// or returned from UARTModemControlGet(). -// -//***************************************************************************** -#define UART_OUTPUT_RTS 0x00000800 - -//***************************************************************************** -// -// Values that can be returned from UARTModemStatusGet(). -// -//***************************************************************************** -#define UART_INPUT_CTS 0x00000001 - -//***************************************************************************** -// -// Values that can be passed to UARTFlowControl() or returned from -// UARTFlowControlGet(). -// -//***************************************************************************** -#define UART_FLOWCONTROL_TX 0x00008000 -#define UART_FLOWCONTROL_RX 0x00004000 -#define UART_FLOWCONTROL_NONE 0x00000000 - -//***************************************************************************** -// -// Values that can be passed to UARTTxIntModeSet() or returned from -// UARTTxIntModeGet(). -// -//***************************************************************************** -#define UART_TXINT_MODE_FIFO 0x00000000 -#define UART_TXINT_MODE_EOT 0x00000010 - - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void UARTParityModeSet(unsigned long ulBase, unsigned long ulParity); -extern unsigned long UARTParityModeGet(unsigned long ulBase); -extern void UARTFIFOLevelSet(unsigned long ulBase, unsigned long ulTxLevel, - unsigned long ulRxLevel); -extern void UARTFIFOLevelGet(unsigned long ulBase, unsigned long *pulTxLevel, - unsigned long *pulRxLevel); -extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long ulBaud, unsigned long ulConfig); -extern void UARTConfigGetExpClk(unsigned long ulBase, unsigned long ulUARTClk, - unsigned long *pulBaud, - unsigned long *pulConfig); -extern void UARTEnable(unsigned long ulBase); -extern void UARTDisable(unsigned long ulBase); -extern void UARTFIFOEnable(unsigned long ulBase); -extern void UARTFIFODisable(unsigned long ulBase); -extern tBoolean UARTCharsAvail(unsigned long ulBase); -extern tBoolean UARTSpaceAvail(unsigned long ulBase); -extern long UARTCharGetNonBlocking(unsigned long ulBase); -extern long UARTCharGet(unsigned long ulBase); -extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase, - unsigned char ucData); -extern void UARTCharPut(unsigned long ulBase, unsigned char ucData); -extern void UARTBreakCtl(unsigned long ulBase, tBoolean bBreakState); -extern tBoolean UARTBusy(unsigned long ulBase); -extern void UARTIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void UARTIntUnregister(unsigned long ulBase); -extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags); -extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags); -extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags); -extern void UARTDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags); -extern void UARTDMADisable(unsigned long ulBase, unsigned long ulDMAFlags); -extern unsigned long UARTRxErrorGet(unsigned long ulBase); -extern void UARTRxErrorClear(unsigned long ulBase); -extern void UARTModemControlSet(unsigned long ulBase, - unsigned long ulControl); -extern void UARTModemControlClear(unsigned long ulBase, - unsigned long ulControl); -extern unsigned long UARTModemControlGet(unsigned long ulBase); -extern unsigned long UARTModemStatusGet(unsigned long ulBase); -extern void UARTFlowControlSet(unsigned long ulBase, unsigned long ulMode); -extern unsigned long UARTFlowControlGet(unsigned long ulBase); -extern void UARTTxIntModeSet(unsigned long ulBase, unsigned long ulMode); -extern unsigned long UARTTxIntModeGet(unsigned long ulBase); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __UART_H__ diff --git a/ports/cc3200/hal/utils.c b/ports/cc3200/hal/utils.c deleted file mode 100644 index d0b13d7bfdff9..0000000000000 --- a/ports/cc3200/hal/utils.c +++ /dev/null @@ -1,104 +0,0 @@ -//***************************************************************************** -// -// utils.c -// -// Utility APIs -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup Utils_api -//! @{ -// -//***************************************************************************** -#include "utils.h" - - -//***************************************************************************** -// -//! Provides a small delay. -//! -//! \param ulCount is the number of delay loop iterations to perform. -//! -//! This function provides a means of generating a constant length delay. It -//! is written in assembly to keep the delay consistent across tool chains, -//! avoiding the need to tune the delay based on the tool chain in use. -//! -//! The loop takes 3 cycles/loop. -//! -//! \return None. -// -//***************************************************************************** -#if defined(ewarm) || defined(DOXYGEN) -void -UtilsDelay(unsigned long ulCount) -{ - __asm(" subs r0, #1\n" - " bne.n UtilsDelay\n"); -} -#endif - -#if defined(gcc) -void __attribute__((naked)) -UtilsDelay(unsigned long ulCount) -{ - __asm(" subs r0, #1\n" - " bne UtilsDelay\n" - " bx lr"); -} -#endif - -// -// For CCS implement this function in pure assembly. This prevents the TI -// compiler from doing funny things with the optimizer. -// -#if defined(ccs) - __asm(" .sect \".text:UtilsDelay\"\n" - " .clink\n" - " .thumbfunc UtilsDelay\n" - " .thumb\n" - " .global UtilsDelay\n" - "UtilsDelay:\n" - " subs r0, #1\n" - " bne.n UtilsDelay\n" - " bx lr\n"); -#endif - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/utils.h b/ports/cc3200/hal/utils.h deleted file mode 100644 index a6fa78dac3e9a..0000000000000 --- a/ports/cc3200/hal/utils.h +++ /dev/null @@ -1,71 +0,0 @@ -//***************************************************************************** -// -// utils.h -// -// Prototypes and macros for utility APIs -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __UTILS_H__ -#define __UTILS_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -//***************************************************************************** -// -// API Function prototypes -// -//***************************************************************************** -extern void UtilsDelay(unsigned long ulCount); - - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif //__UTILS_H__ diff --git a/ports/cc3200/hal/wdt.c b/ports/cc3200/hal/wdt.c deleted file mode 100644 index 8d8a9e9df6363..0000000000000 --- a/ports/cc3200/hal/wdt.c +++ /dev/null @@ -1,491 +0,0 @@ -//***************************************************************************** -// -// wdt.c -// -// Driver for the Watchdog Timer Module. -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \addtogroup WDT_Watchdog_Timer_api -//! @{ -// -//***************************************************************************** - -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_wdt.h" -#include "debug.h" -#include "interrupt.h" -#include "wdt.h" - -//***************************************************************************** -// -//! Determines if the watchdog timer is enabled. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This will check to see if the watchdog timer is enabled. -//! -//! \return Returns \b true if the watchdog timer is enabled, and \b false -//! if it is not. -// -//***************************************************************************** -tBoolean -WatchdogRunning(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // See if the watchdog timer module is enabled, and return. - // - return(HWREG(ulBase + WDT_O_CTL) & WDT_CTL_INTEN); -} - -//***************************************************************************** -// -//! Enables the watchdog timer. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This will enable the watchdog timer counter and interrupt. -//! -//! \note This function will have no effect if the watchdog timer has -//! been locked. -//! -//! \sa WatchdogLock(), WatchdogUnlock() -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Enable the watchdog timer module. - // - HWREG(ulBase + WDT_O_CTL) |= WDT_CTL_INTEN; -} - -//***************************************************************************** -// -//! Enables the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Locks out write access to the watchdog timer configuration registers. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogLock(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Lock out watchdog register writes. Writing anything to the WDT_O_LOCK - // register causes the lock to go into effect. - // - HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_LOCKED; -} - -//***************************************************************************** -// -//! Disables the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Enables write access to the watchdog timer configuration registers. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogUnlock(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Unlock watchdog register writes. - // - HWREG(ulBase + WDT_O_LOCK) = WDT_LOCK_UNLOCK; -} - -//***************************************************************************** -// -//! Gets the state of the watchdog timer lock mechanism. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! Returns the lock state of the watchdog timer registers. -//! -//! \return Returns \b true if the watchdog timer registers are locked, and -//! \b false if they are not locked. -// -//***************************************************************************** -tBoolean -WatchdogLockState(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the lock state. - // - return((HWREG(ulBase + WDT_O_LOCK) == WDT_LOCK_LOCKED) ? true : false); -} - -//***************************************************************************** -// -//! Sets the watchdog timer reload value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param ulLoadVal is the load value for the watchdog timer. -//! -//! This function sets the value to load into the watchdog timer when the count -//! reaches zero for the first time; if the watchdog timer is running when this -//! function is called, then the value will be immediately loaded into the -//! watchdog timer counter. If the \e ulLoadVal parameter is 0, then an -//! interrupt is immediately generated. -//! -//! \note This function will have no effect if the watchdog timer has -//! been locked. -//! -//! \sa WatchdogLock(), WatchdogUnlock(), WatchdogReloadGet() -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Set the load register. - // - HWREG(ulBase + WDT_O_LOAD) = ulLoadVal; -} - -//***************************************************************************** -// -//! Gets the watchdog timer reload value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function gets the value that is loaded into the watchdog timer when -//! the count reaches zero for the first time. -//! -//! \sa WatchdogReloadSet() -//! -//! \return None. -// -//***************************************************************************** -unsigned long -WatchdogReloadGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the load register. - // - return(HWREG(ulBase + WDT_O_LOAD)); -} - -//***************************************************************************** -// -//! Gets the current watchdog timer value. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function reads the current value of the watchdog timer. -//! -//! \return Returns the current value of the watchdog timer. -// -//***************************************************************************** -unsigned long -WatchdogValueGet(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Get the current watchdog timer register value. - // - return(HWREG(ulBase + WDT_O_VALUE)); -} - -//***************************************************************************** -// -//! Registers an interrupt handler for watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param pfnHandler is a pointer to the function to be called when the -//! watchdog timer interrupt occurs. -//! -//! This function does the actual registering of the interrupt handler. This -//! will enable the global interrupt in the interrupt controller; the watchdog -//! timer interrupt must be enabled via WatchdogEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source via -//! WatchdogIntClear(). -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \note This function will only register the standard watchdog interrupt -//! handler. To register the NMI watchdog handler, use IntRegister() -//! to register the handler for the \b FAULT_NMI interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Register the interrupt handler and - // Enable the watchdog timer interrupt. - // - IntRegister(INT_WDT, pfnHandler); - IntEnable(INT_WDT); -} - -//***************************************************************************** -// -//! Unregisters an interrupt handler for the watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function does the actual unregistering of the interrupt handler. This -//! function will clear the handler to be called when a watchdog timer -//! interrupt occurs. This will also mask off the interrupt in the interrupt -//! controller so that the interrupt handler no longer is called. -//! -//! \sa IntRegister() for important information about registering interrupt -//! handlers. -//! -//! \note This function will only unregister the standard watchdog interrupt -//! handler. To unregister the NMI watchdog handler, use IntUnregister() -//! to unregister the handler for the \b FAULT_NMI interrupt. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntUnregister(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Disable the interrupt - IntDisable(INT_WDT); - - // - // Unregister the interrupt handler. - // - IntUnregister(INT_WDT); -} - -//***************************************************************************** -// -//! Gets the current watchdog timer interrupt status. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! \param bMasked is \b false if the raw interrupt status is required and -//! \b true if the masked interrupt status is required. -//! -//! This returns the interrupt status for the watchdog timer module. Either -//! the raw interrupt status or the status of interrupt that is allowed to -//! reflect to the processor can be returned. -//! -//! \return Returns the current interrupt status, where a 1 indicates that the -//! watchdog interrupt is active, and a 0 indicates that it is not active. -// -//***************************************************************************** -unsigned long -WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Return either the interrupt status or the raw interrupt status as - // requested. - // - if(bMasked) - { - return(HWREG(ulBase + WDT_O_MIS)); - } - else - { - return(HWREG(ulBase + WDT_O_RIS)); - } -} - -//***************************************************************************** -// -//! Clears the watchdog timer interrupt. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! The watchdog timer interrupt source is cleared, so that it no longer -//! asserts. -//! -//! \note Because there is a write buffer in the Cortex-M3 processor, it may -//! take several clock cycles before the interrupt source is actually cleared. -//! Therefore, it is recommended that the interrupt source be cleared early in -//! the interrupt handler (as opposed to the very last action) to avoid -//! returning from the interrupt handler before the interrupt source is -//! actually cleared. Failure to do so may result in the interrupt handler -//! being immediately reentered (because the interrupt controller still sees -//! the interrupt source asserted). -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogIntClear(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Clear the interrupt source. - // - HWREG(ulBase + WDT_O_ICR) = WDT_INT_TIMEOUT; -} - -//***************************************************************************** -// -//! Enables stalling of the watchdog timer during debug events. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function allows the watchdog timer to stop counting when the processor -//! is stopped by the debugger. By doing so, the watchdog is prevented from -//! expiring (typically almost immediately from a human time perspective) and -//! resetting the system (if reset is enabled). The watchdog will instead -//! expired after the appropriate number of processor cycles have been executed -//! while debugging (or at the appropriate time after the processor has been -//! restarted). -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogStallEnable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Enable timer stalling. - // - HWREG(ulBase + WDT_O_TEST) |= WDT_TEST_STALL; -} - -//***************************************************************************** -// -//! Disables stalling of the watchdog timer during debug events. -//! -//! \param ulBase is the base address of the watchdog timer module. -//! -//! This function disables the debug mode stall of the watchdog timer. By -//! doing so, the watchdog timer continues to count regardless of the processor -//! debug state. -//! -//! \return None. -// -//***************************************************************************** -void -WatchdogStallDisable(unsigned long ulBase) -{ - // - // Check the arguments. - // - ASSERT((ulBase == WDT_BASE)); - - // - // Disable timer stalling. - // - HWREG(ulBase + WDT_O_TEST) &= ~(WDT_TEST_STALL); -} - -//***************************************************************************** -// -// Close the Doxygen group. -//! @} -// -//***************************************************************************** diff --git a/ports/cc3200/hal/wdt.h b/ports/cc3200/hal/wdt.h deleted file mode 100644 index 2e52db42be187..0000000000000 --- a/ports/cc3200/hal/wdt.h +++ /dev/null @@ -1,82 +0,0 @@ -//***************************************************************************** -// -// wdt.h - Prototypes for the Watchdog Timer API -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __WATCHDOG_H__ -#define __WATCHDOG_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** -extern tBoolean WatchdogRunning(unsigned long ulBase); -extern void WatchdogEnable(unsigned long ulBase); -extern void WatchdogLock(unsigned long ulBase); -extern void WatchdogUnlock(unsigned long ulBase); -extern tBoolean WatchdogLockState(unsigned long ulBase); -extern void WatchdogReloadSet(unsigned long ulBase, unsigned long ulLoadVal); -extern unsigned long WatchdogReloadGet(unsigned long ulBase); -extern unsigned long WatchdogValueGet(unsigned long ulBase); -extern void WatchdogIntRegister(unsigned long ulBase, void(*pfnHandler)(void)); -extern void WatchdogIntUnregister(unsigned long ulBase); -extern unsigned long WatchdogIntStatus(unsigned long ulBase, tBoolean bMasked); -extern void WatchdogIntClear(unsigned long ulBase); -extern void WatchdogStallEnable(unsigned long ulBase); -extern void WatchdogStallDisable(unsigned long ulBase); - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __WATCHDOG_H__ diff --git a/ports/cc3200/main.c b/ports/cc3200/main.c deleted file mode 100644 index e2299e14604da..0000000000000 --- a/ports/cc3200/main.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "mptask.h" -#include "simplelink.h" -#include "pybwdt.h" -#include "debug.h" -#include "antenna.h" -#include "mperror.h" -#include "task.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ - -// This is the static memory (TCB and stack) for the idle task -static StaticTask_t xIdleTaskTCB __attribute__ ((section (".rtos_heap"))); -static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef DEBUG -OsiTaskHandle mpTaskHandle; -#endif - -// This is the FreeRTOS heap, defined here so we can put it in a special segment -uint8_t ucHeap[ configTOTAL_HEAP_SIZE ] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -// This is the static memory (TCB and stack) for the main MicroPython task -StaticTask_t mpTaskTCB __attribute__ ((section (".rtos_heap"))); -StackType_t mpTaskStack[MICROPY_TASK_STACK_LEN] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ - -__attribute__ ((section (".boot"))) -int main (void) { - - // Initialize the clocks and the interrupt system - HAL_SystemInit(); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // configure the antenna selection pins - antenna_init0(); -#endif - - // Init the watchdog - pybwdt_init0(); - -#ifndef DEBUG - OsiTaskHandle mpTaskHandle; -#endif - mpTaskHandle = xTaskCreateStatic(TASK_MicroPython, "MicroPy", - MICROPY_TASK_STACK_LEN, NULL, MICROPY_TASK_PRIORITY, mpTaskStack, &mpTaskTCB); - ASSERT(mpTaskHandle != NULL); - - osi_start(); - - for ( ; ; ); -} - -// We need this when configSUPPORT_STATIC_ALLOCATION is enabled -void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, - StackType_t **ppxIdleTaskStackBuffer, - uint32_t *pulIdleTaskStackSize ) { - *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; - *ppxIdleTaskStackBuffer = uxIdleTaskStack; - *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; -} diff --git a/ports/cc3200/misc/FreeRTOSHooks.c b/ports/cc3200/misc/FreeRTOSHooks.c deleted file mode 100644 index c618279b7e0fa..0000000000000 --- a/ports/cc3200/misc/FreeRTOSHooks.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/mphal.h" -#include "py/obj.h" -#include "inc/hw_memmap.h" -#include "pybuart.h" -#include "osi.h" -#include "mperror.h" - - -//***************************************************************************** -// -//! \brief Application defined idle task hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationIdleHook (void) -{ - // signal that we are alive and kicking - mperror_heartbeat_signal(); - // gate the processor's clock to save power - __WFI(); -} - -//***************************************************************************** -// -//! \brief Application defined malloc failed hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationMallocFailedHook (void) -{ -#ifdef DEBUG - // break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - __fatal_error("FreeRTOS malloc failed!"); -} - -//***************************************************************************** -// -//! \brief Application defined stack overflow hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationStackOverflowHook (OsiTaskHandle *pxTask, signed char *pcTaskName) -{ -#ifdef DEBUG - // Break into the debugger - __asm volatile ("bkpt #0 \n"); -#endif - - __fatal_error("Stack overflow!"); -} - -//***************************************************************************** -// -//! \brief Application defined tick hook -//! -//! \param none -//! -//! \return none -//! -//***************************************************************************** -void vApplicationTickHook (void) -{ - HAL_IncrementTick(); -} diff --git a/ports/cc3200/misc/antenna.c b/ports/cc3200/misc/antenna.c deleted file mode 100644 index afeed85e18a8b..0000000000000 --- a/ports/cc3200/misc/antenna.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "mpconfigboard.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "antenna.h" - - -#if MICROPY_HW_ANTENNA_DIVERSITY - -/****************************************************************************** -DEFINE CONSTANTS -******************************************************************************/ -#define REG_PAD_CONFIG_26 (0x4402E108) -#define REG_PAD_CONFIG_27 (0x4402E10C) - -/****************************************************************************** -DEFINE PRIVATE DATA -******************************************************************************/ -static antenna_type_t antenna_type_selected = ANTENNA_TYPE_INTERNAL; - -/****************************************************************************** -DEFINE PUBLIC FUNCTIONS -******************************************************************************/ -void antenna_init0(void) { - // enable the peripheral clock and set the gpio direction for - // both antenna 1 and antenna 2 pins - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_GPIODirModeSet(GPIOA3_BASE, 0x0C, GPIO_DIR_MODE_OUT); - - // configure antenna 1 pin type and strength - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) | (0x00000020 | 0x00000000)); - // set the mode - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_MODE_MASK) | 0x00000000) & ~(3 << 10); - // set the direction - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~0xC00) | 0x00000800); - - // configure antenna 2 pin type and strength - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~(PAD_STRENGTH_MASK | PAD_TYPE_MASK)) | (0x00000020 | 0x00000000)); - // set the mode - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_MODE_MASK) | 0x00000000) & ~(3 << 10); - // set the direction - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~0xC00) | 0x00000800); - - // select the currently active antenna - antenna_select(antenna_type_selected); -} - -void antenna_select (antenna_type_t _antenna) { - if (_antenna == ANTENNA_TYPE_INTERNAL) { - MAP_GPIOPinWrite(GPIOA3_BASE, 0x0C, 0x04); - // also configure the pull-up and pull-down accordingly - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PU; - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PD; - } else { - MAP_GPIOPinWrite(GPIOA3_BASE, 0x0C, 0x08); - // also configure the pull-up and pull-down accordingly - HWREG(REG_PAD_CONFIG_26) = ((HWREG(REG_PAD_CONFIG_26) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PD; - HWREG(REG_PAD_CONFIG_27) = ((HWREG(REG_PAD_CONFIG_27) & ~PAD_TYPE_MASK)) | PIN_TYPE_STD_PU; - } - antenna_type_selected = _antenna; -} - -#endif - diff --git a/ports/cc3200/misc/antenna.h b/ports/cc3200/misc/antenna.h deleted file mode 100644 index c9d845453e095..0000000000000 --- a/ports/cc3200/misc/antenna.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H -#define MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H - -typedef enum { - ANTENNA_TYPE_INTERNAL = 0, - ANTENNA_TYPE_EXTERNAL -} antenna_type_t; - -extern void antenna_init0 (void); -extern void antenna_select (antenna_type_t antenna_type); - -#endif // MICROPY_INCLUDED_CC3200_MISC_ANTENNA_H diff --git a/ports/cc3200/misc/help.c b/ports/cc3200/misc/help.c deleted file mode 100644 index ea0c9501dbce0..0000000000000 --- a/ports/cc3200/misc/help.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char cc3200_help_text[] = "Welcome to MicroPython!\n" - "For online help please visit http://micropython.org/help/.\n" - "For further help on a specific object, type help(obj)\n"; diff --git a/ports/cc3200/misc/mperror.c b/ports/cc3200/misc/mperror.c deleted file mode 100644 index 082d940e2f3ac..0000000000000 --- a/ports/cc3200/misc/mperror.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "hw_ints.h" -#include "hw_types.h" -#include "hw_gpio.h" -#include "hw_memmap.h" -#include "hw_gprcm.h" -#include "hw_common_reg.h" -#include "pin.h" -#include "gpio.h" -#ifndef BOOTLOADER -#include "pybpin.h" -#include "pins.h" -#endif -#include "rom_map.h" -#include "prcm.h" -#include "pybuart.h" -#include "utils.h" -#include "mperror.h" - - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MPERROR_TOOGLE_MS (50) -#define MPERROR_SIGNAL_ERROR_MS (1200) -#define MPERROR_HEARTBEAT_ON_MS (80) -#define MPERROR_HEARTBEAT_OFF_MS (3920) - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -struct mperror_heart_beat { - uint32_t off_time; - uint32_t on_time; - bool beating; - bool enabled; - bool do_disable; -} mperror_heart_beat = {.off_time = 0, .on_time = 0, .beating = false, .enabled = false, .do_disable = false}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void mperror_init0 (void) { -#ifdef BOOTLOADER - // enable the system led and the safe boot pin peripheral clocks - MAP_PRCMPeripheralClkEnable(MICROPY_SYS_LED_PRCM, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralClkEnable(MICROPY_SAFE_BOOT_PRCM, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // configure the safe boot pin - MAP_PinTypeGPIO(MICROPY_SAFE_BOOT_PIN_NUM, PIN_MODE_0, false); - MAP_PinConfigSet(MICROPY_SAFE_BOOT_PIN_NUM, PIN_STRENGTH_4MA, PIN_TYPE_STD_PD); - MAP_GPIODirModeSet(MICROPY_SAFE_BOOT_PORT, MICROPY_SAFE_BOOT_PORT_PIN, GPIO_DIR_MODE_IN); - // configure the bld - MAP_PinTypeGPIO(MICROPY_SYS_LED_PIN_NUM, PIN_MODE_0, false); - MAP_PinConfigSet(MICROPY_SYS_LED_PIN_NUM, PIN_STRENGTH_6MA, PIN_TYPE_STD); - MAP_GPIODirModeSet(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, GPIO_DIR_MODE_OUT); -#else - // configure the system led - pin_config ((pin_obj_t *)&MICROPY_SYS_LED_GPIO, PIN_MODE_0, GPIO_DIR_MODE_OUT, PIN_TYPE_STD, 0, PIN_STRENGTH_6MA); -#endif - mperror_heart_beat.enabled = true; - mperror_heartbeat_switch_off(); -} - -void mperror_bootloader_check_reset_cause (void) { - // if we are recovering from a WDT reset, trigger - // a hibernate cycle for a clean boot - if (MAP_PRCMSysResetCauseGet() == PRCM_WDT_RESET) { - HWREG(0x400F70B8) = 1; - UtilsDelay(800000/5); - HWREG(0x400F70B0) = 1; - UtilsDelay(800000/5); - - HWREG(0x4402E16C) |= 0x2; - UtilsDelay(800); - HWREG(0x4402F024) &= 0xF7FFFFFF; - - // since the reset cause will be changed, we must store the right reason - // so that the application knows it when booting for the next time - PRCMSetSpecialBit(PRCM_WDT_RESET_BIT); - - MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR); - // set the sleep interval to 10ms - MAP_PRCMHibernateIntervalSet(330); - MAP_PRCMHibernateEnter(); - } -} - -void mperror_deinit_sfe_pin (void) { - // disable the pull-down - MAP_PinConfigSet(MICROPY_SAFE_BOOT_PIN_NUM, PIN_STRENGTH_4MA, PIN_TYPE_STD); -} - -void mperror_signal_error (void) { - uint32_t count = 0; - while ((MPERROR_TOOGLE_MS * count++) < MPERROR_SIGNAL_ERROR_MS) { - // toogle the led - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, ~MAP_GPIOPinRead(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN)); - UtilsDelay(UTILS_DELAY_US_TO_COUNT(MPERROR_TOOGLE_MS * 1000)); - } -} - -void mperror_heartbeat_switch_off (void) { - if (mperror_heart_beat.enabled) { - mperror_heart_beat.on_time = 0; - mperror_heart_beat.off_time = 0; - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0); - } -} - -void mperror_heartbeat_signal (void) { - if (mperror_heart_beat.do_disable) { - mperror_heart_beat.do_disable = false; - } else if (mperror_heart_beat.enabled) { - if (!mperror_heart_beat.beating) { - if ((mperror_heart_beat.on_time = mp_hal_ticks_ms()) - mperror_heart_beat.off_time > MPERROR_HEARTBEAT_OFF_MS) { - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN); - mperror_heart_beat.beating = true; - } - } else { - if ((mperror_heart_beat.off_time = mp_hal_ticks_ms()) - mperror_heart_beat.on_time > MPERROR_HEARTBEAT_ON_MS) { - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, 0); - mperror_heart_beat.beating = false; - } - } - } -} - -void NORETURN __fatal_error(const char *msg) { -#ifdef DEBUG - if (msg != NULL) { - // wait for 20ms - UtilsDelay(UTILS_DELAY_US_TO_COUNT(20000)); - mp_hal_stdout_tx_str("\r\nFATAL ERROR:"); - mp_hal_stdout_tx_str(msg); - mp_hal_stdout_tx_str("\r\n"); - } -#endif - // signal the crash with the system led - MAP_GPIOPinWrite(MICROPY_SYS_LED_PORT, MICROPY_SYS_LED_PORT_PIN, MICROPY_SYS_LED_PORT_PIN); - for ( ;; ) {__WFI();} -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - (void) func; - printf("Assertion failed: %s, file %s, line %d\n", expr, file, line); - __fatal_error(NULL); -} - -void nlr_jump_fail(void *val) { -#ifdef DEBUG - char msg[64]; - snprintf(msg, sizeof(msg), "uncaught exception %p\n", val); - __fatal_error(msg); -#else - __fatal_error(NULL); -#endif -} - -void mperror_enable_heartbeat (bool enable) { - if (enable) { - #ifndef BOOTLOADER - // configure the led again - pin_config ((pin_obj_t *)&MICROPY_SYS_LED_GPIO, PIN_MODE_0, GPIO_DIR_MODE_OUT, PIN_TYPE_STD, 0, PIN_STRENGTH_6MA); - #endif - mperror_heart_beat.enabled = true; - mperror_heart_beat.do_disable = false; - mperror_heartbeat_switch_off(); - } else { - mperror_heart_beat.do_disable = true; - mperror_heart_beat.enabled = false; - } -} - -bool mperror_is_heartbeat_enabled (void) { - return mperror_heart_beat.enabled; -} diff --git a/ports/cc3200/misc/mperror.h b/ports/cc3200/misc/mperror.h deleted file mode 100644 index 1c3eb62697009..0000000000000 --- a/ports/cc3200/misc/mperror.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPERROR_H -#define MICROPY_INCLUDED_CC3200_MISC_MPERROR_H - -extern void NORETURN __fatal_error(const char *msg); - -void mperror_init0 (void); -void mperror_bootloader_check_reset_cause (void); -void mperror_deinit_sfe_pin (void); -void mperror_signal_error (void); -void mperror_heartbeat_switch_off (void); -void mperror_heartbeat_signal (void); -void mperror_enable_heartbeat (bool enable); -bool mperror_is_heartbeat_enabled (void); - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPERROR_H diff --git a/ports/cc3200/misc/mpexception.c b/ports/cc3200/misc/mpexception.c deleted file mode 100644 index 72d4a155fafc4..0000000000000 --- a/ports/cc3200/misc/mpexception.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "mpexception.h" - - -/****************************************************************************** -DECLARE EXPORTED DATA - ******************************************************************************/ -const char mpexception_value_invalid_arguments[] = "invalid argument(s) value"; -const char mpexception_num_type_invalid_arguments[] = "invalid argument(s) num/type"; -const char mpexception_uncaught[] = "uncaught exception"; diff --git a/ports/cc3200/misc/mpexception.h b/ports/cc3200/misc/mpexception.h deleted file mode 100644 index e84a1edb21a59..0000000000000 --- a/ports/cc3200/misc/mpexception.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H -#define MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H - -extern const char mpexception_value_invalid_arguments[]; -extern const char mpexception_num_type_invalid_arguments[]; -extern const char mpexception_uncaught[]; - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPEXCEPTION_H diff --git a/ports/cc3200/misc/mpirq.c b/ports/cc3200/misc/mpirq.c deleted file mode 100644 index d54e7465b15cf..0000000000000 --- a/ports/cc3200/misc/mpirq.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "inc/hw_types.h" -#include "interrupt.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "mperror.h" -#include "mpirq.h" - - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -const mp_arg_t mp_irq_init_args[] = { - { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_priority, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, // the lowest priority - { MP_QSTR_handler, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC uint8_t mp_irq_priorities[] = { INT_PRIORITY_LVL_7, INT_PRIORITY_LVL_6, INT_PRIORITY_LVL_5, INT_PRIORITY_LVL_4, - INT_PRIORITY_LVL_3, INT_PRIORITY_LVL_2, INT_PRIORITY_LVL_1 }; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void mp_irq_init0 (void) { - // initialize the callback objects list - mp_obj_list_init(&MP_STATE_PORT(mp_irq_obj_list), 0); -} - -mp_obj_t mp_irq_new (mp_obj_t parent, mp_obj_t handler, const mp_irq_methods_t *methods) { - mp_irq_obj_t *self = m_new_obj(mp_irq_obj_t); - self->base.type = &mp_irq_type; - self->handler = handler; - self->parent = parent; - self->methods = (mp_irq_methods_t *)methods; - self->isenabled = true; - // remove it in case it was already registered - mp_irq_remove(parent); - mp_obj_list_append(&MP_STATE_PORT(mp_irq_obj_list), self); - return self; -} - -mp_irq_obj_t *mp_irq_find (mp_obj_t parent) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - if (callback_obj->parent == parent) { - return callback_obj; - } - } - return NULL; -} - -void mp_irq_wake_all (void) { - // re-enable all active callback objects one by one - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - if (callback_obj->isenabled) { - callback_obj->methods->enable(callback_obj->parent); - } - } -} - -void mp_irq_disable_all (void) { - // re-enable all active callback objects one by one - for (mp_uint_t i = 0; i < MP_STATE_PORT(mp_irq_obj_list).len; i++) { - mp_irq_obj_t *callback_obj = ((mp_irq_obj_t *)(MP_STATE_PORT(mp_irq_obj_list).items[i])); - callback_obj->methods->disable(callback_obj->parent); - } -} - -void mp_irq_remove (const mp_obj_t parent) { - mp_irq_obj_t *callback_obj; - if ((callback_obj = mp_irq_find(parent))) { - mp_obj_list_remove(&MP_STATE_PORT(mp_irq_obj_list), callback_obj); - } -} - -uint mp_irq_translate_priority (uint priority) { - if (priority < 1 || priority > MP_ARRAY_SIZE(mp_irq_priorities)) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_irq_priorities[priority - 1]; -} - -void mp_irq_handler (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - if (self && self->handler != mp_const_none) { - // when executing code within a handler we must lock the GC to prevent - // any memory allocations. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(self->handler, self->parent); - nlr_pop(); - } - else { - // uncaught exception; disable the callback so that it doesn't run again - self->methods->disable (self->parent); - self->handler = mp_const_none; - // signal the error using the heart beat led and - // by printing a message - printf("Uncaught exception in callback handler\n"); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - mperror_signal_error(); - } - gc_unlock(); - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t mp_irq_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_irq_obj_t *self = pos_args[0]; - // this is a bit of a hack, but it let us reuse the callback_create method from our parent - ((mp_obj_t *)pos_args)[0] = self->parent; - self->methods->init (n_args, pos_args, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_irq_init_obj, 1, mp_irq_init); - -STATIC mp_obj_t mp_irq_enable (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - self->methods->enable(self->parent); - self->isenabled = true; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_enable_obj, mp_irq_enable); - -STATIC mp_obj_t mp_irq_disable (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - self->methods->disable(self->parent); - self->isenabled = false; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_disable_obj, mp_irq_disable); - -STATIC mp_obj_t mp_irq_flags (mp_obj_t self_in) { - mp_irq_obj_t *self = self_in; - return mp_obj_new_int(self->methods->flags(self->parent)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_irq_flags_obj, mp_irq_flags); - -STATIC mp_obj_t mp_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - mp_irq_handler (self_in); - return mp_const_none; -} - -STATIC const mp_rom_map_elem_t mp_irq_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&mp_irq_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&mp_irq_enable_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&mp_irq_disable_obj) }, - { MP_ROM_QSTR(MP_QSTR_flags), MP_ROM_PTR(&mp_irq_flags_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_irq_locals_dict, mp_irq_locals_dict_table); - -const mp_obj_type_t mp_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_irq, - .call = mp_irq_call, - .locals_dict = (mp_obj_t)&mp_irq_locals_dict, -}; - diff --git a/ports/cc3200/misc/mpirq.h b/ports/cc3200/misc/mpirq.h deleted file mode 100644 index 223a34cae2fc8..0000000000000 --- a/ports/cc3200/misc/mpirq.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H -#define MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define mp_irq_INIT_NUM_ARGS 4 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef mp_obj_t (*mp_irq_init_t) (size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); -typedef void (*mp_irq_void_method_t) (mp_obj_t self); -typedef int (*mp_irq_int_method_t) (mp_obj_t self); - -typedef struct { - mp_irq_init_t init; - mp_irq_void_method_t enable; - mp_irq_void_method_t disable; - mp_irq_int_method_t flags; -} mp_irq_methods_t; - -typedef struct { - mp_obj_base_t base; - mp_obj_t parent; - mp_obj_t handler; - mp_irq_methods_t *methods; - bool isenabled; -} mp_irq_obj_t; - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern const mp_arg_t mp_irq_init_args[]; -extern const mp_obj_type_t mp_irq_type; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void mp_irq_init0 (void); -mp_obj_t mp_irq_new (mp_obj_t parent, mp_obj_t handler, const mp_irq_methods_t *methods); -mp_irq_obj_t *mp_irq_find (mp_obj_t parent); -void mp_irq_wake_all (void); -void mp_irq_disable_all (void); -void mp_irq_remove (const mp_obj_t parent); -void mp_irq_handler (mp_obj_t self_in); -uint mp_irq_translate_priority (uint priority); - -#endif // MICROPY_INCLUDED_CC3200_MISC_MPIRQ_H diff --git a/ports/cc3200/mods/modmachine.c b/ports/cc3200/mods/modmachine.c deleted file mode 100644 index 6051497e30d99..0000000000000 --- a/ports/cc3200/mods/modmachine.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_uart.h" -#include "rom_map.h" -#include "prcm.h" -#include "pybuart.h" -#include "pybpin.h" -#include "pybrtc.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "moduos.h" -#include "FreeRTOS.h" -#include "portable.h" -#include "task.h" -#include "mpexception.h" -#include "random.h" -#include "pybadc.h" -#include "pybi2c.h" -#include "pybsd.h" -#include "pybwdt.h" -#include "pybsleep.h" -#include "pybspi.h" -#include "pybtimer.h" -#include "utils.h" -#include "gccollect.h" - - -#ifdef DEBUG -extern OsiTaskHandle mpTaskHandle; -extern OsiTaskHandle svTaskHandle; -extern OsiTaskHandle xSimpleLinkSpawnTaskHndl; -#endif - - -/// \module machine - functions related to the SoC -/// - -/******************************************************************************/ -// MicroPython bindings; - -STATIC mp_obj_t machine_reset(void) { - // disable wlan - wlan_stop(SL_STOP_TIMEOUT_LONG); - // reset the cpu and it's peripherals - MAP_PRCMMCUReset(true); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -#ifdef DEBUG -STATIC mp_obj_t machine_info(uint n_args, const mp_obj_t *args) { - // FreeRTOS info - { - printf("---------------------------------------------\n"); - printf("FreeRTOS\n"); - printf("---------------------------------------------\n"); - printf("Total heap: %u\n", configTOTAL_HEAP_SIZE); - printf("Free heap: %u\n", xPortGetFreeHeapSize()); - printf("MpTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark((TaskHandle_t)mpTaskHandle)); - printf("ServersTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark((TaskHandle_t)svTaskHandle)); - printf("SlTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark(xSimpleLinkSpawnTaskHndl)); - printf("IdleTask min free stack: %u\n", (unsigned int)uxTaskGetStackHighWaterMark(xTaskGetIdleTaskHandle())); - - uint32_t *pstack = (uint32_t *)&_stack; - while (*pstack == 0x55555555) { - pstack++; - } - printf("MAIN min free stack: %u\n", pstack - ((uint32_t *)&_stack)); - printf("---------------------------------------------\n"); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info); -#endif - -STATIC mp_obj_t machine_freq(void) { - return mp_obj_new_int(HAL_FCPU_HZ); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_freq_obj, machine_freq); - -STATIC mp_obj_t machine_unique_id(void) { - uint8_t mac[SL_BSSID_LENGTH]; - wlan_get_mac (mac); - return mp_obj_new_bytes(mac, SL_BSSID_LENGTH); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -STATIC mp_obj_t machine_main(mp_obj_t main) { - if (MP_OBJ_IS_STR(main)) { - MP_STATE_PORT(machine_config_main) = main; - } else { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_main_obj, machine_main); - -STATIC mp_obj_t machine_idle(void) { - __WFI(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); - -STATIC mp_obj_t machine_sleep (void) { - pyb_sleep_sleep(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep (void) { - pyb_sleep_deepsleep(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause (void) { - return mp_obj_new_int(pyb_sleep_get_reset_cause()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC mp_obj_t machine_wake_reason (void) { - return mp_obj_new_int(pyb_sleep_get_wake_reason()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_wake_reason_obj, machine_wake_reason); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, -#ifdef DEBUG - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&machine_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&machine_rng_get_obj) }, - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) }, - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) }, - { MP_ROM_QSTR(MP_QSTR_POWER_ON), MP_ROM_INT(PYB_SLP_PWRON_RESET) }, // legacy constant - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_SLP_PWRON_RESET) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_SLP_HARD_RESET) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_SLP_WDT_RESET) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_SLP_HIB_RESET) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_SLP_SOFT_RESET) }, - { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) }, - { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) }, - { MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t machine_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; diff --git a/ports/cc3200/mods/modnetwork.c b/ports/cc3200/mods/modnetwork.c deleted file mode 100644 index 37dffe731f11d..0000000000000 --- a/ports/cc3200/mods/modnetwork.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "modnetwork.h" -#include "mpexception.h" -#include "serverstask.h" -#include "simplelink.h" - - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; -} network_server_obj_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC network_server_obj_t network_server_obj; -STATIC const mp_obj_type_t network_server_type; - -/// \module network - network configuration -/// -/// This module provides network drivers and server configuration. - -void mod_network_init0(void) { -} - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -STATIC mp_obj_t network_server_init_helper(mp_obj_t self, const mp_arg_val_t *args) { - const char *user = SERVERS_DEF_USER; - const char *pass = SERVERS_DEF_PASS; - if (args[0].u_obj != MP_OBJ_NULL) { - mp_obj_t *login; - mp_obj_get_array_fixed_n(args[0].u_obj, 2, &login); - user = mp_obj_str_get_str(login[0]); - pass = mp_obj_str_get_str(login[1]); - } - - uint32_t timeout = SERVERS_DEF_TIMEOUT_MS / 1000; - if (args[1].u_obj != MP_OBJ_NULL) { - timeout = mp_obj_get_int(args[1].u_obj); - } - - // configure the new login - servers_set_login ((char *)user, (char *)pass); - - // configure the timeout - servers_set_timeout(timeout * 1000); - - // start the servers - servers_start(); - - return mp_const_none; -} - -STATIC const mp_arg_t network_server_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_login, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t network_server_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(network_server_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), network_server_args, args); - - // check the server id - if (args[0].u_obj != MP_OBJ_NULL) { - if (mp_obj_get_int(args[0].u_obj) != 0) { - mp_raise_OSError(MP_ENODEV); - } - } - - // setup the object and initialize it - network_server_obj_t *self = &network_server_obj; - self->base.type = &network_server_type; - network_server_init_helper(self, &args[1]); - - return (mp_obj_t)self; -} - -STATIC mp_obj_t network_server_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(network_server_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &network_server_args[1], args); - return network_server_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(network_server_init_obj, 1, network_server_init); - -// timeout value given in seconds -STATIC mp_obj_t network_server_timeout(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - uint32_t timeout = mp_obj_get_int(args[1]); - servers_set_timeout(timeout * 1000); - return mp_const_none; - } else { - // get - return mp_obj_new_int(servers_get_timeout() / 1000); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(network_server_timeout_obj, 1, 2, network_server_timeout); - -STATIC mp_obj_t network_server_running(mp_obj_t self_in) { - // get - return mp_obj_new_bool(servers_are_enabled()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(network_server_running_obj, network_server_running); - -STATIC mp_obj_t network_server_deinit(mp_obj_t self_in) { - // simply stop the servers - servers_stop(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(network_server_deinit_obj, network_server_deinit); -#endif - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&mod_network_nic_type_wlan) }, - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - { MP_ROM_QSTR(MP_QSTR_Server), MP_ROM_PTR(&network_server_type) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t mp_module_network = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -STATIC const mp_rom_map_elem_t network_server_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&network_server_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&network_server_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&network_server_timeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_isrunning), MP_ROM_PTR(&network_server_running_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(network_server_locals_dict, network_server_locals_dict_table); - -STATIC const mp_obj_type_t network_server_type = { - { &mp_type_type }, - .name = MP_QSTR_Server, - .make_new = network_server_make_new, - .locals_dict = (mp_obj_t)&network_server_locals_dict, -}; -#endif diff --git a/ports/cc3200/mods/modnetwork.h b/ports/cc3200/mods/modnetwork.h deleted file mode 100644 index 6ec90a2bac189..0000000000000 --- a/ports/cc3200/mods/modnetwork.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H -#define MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MOD_NETWORK_IPV4ADDR_BUF_SIZE (4) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _mod_network_nic_type_t { - mp_obj_type_t base; -} mod_network_nic_type_t; - -typedef struct _mod_network_socket_base_t { - union { - struct { - // this order is important so that fileno gets > 0 once - // the socket descriptor is assigned after being created. - uint8_t domain; - int8_t fileno; - uint8_t type; - uint8_t proto; - } u_param; - int16_t sd; - }; - uint32_t timeout_ms; // 0 for no timeout - bool cert_req; -} mod_network_socket_base_t; - -typedef struct _mod_network_socket_obj_t { - mp_obj_base_t base; - mod_network_socket_base_t sock_base; -} mod_network_socket_obj_t; - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern const mod_network_nic_type_t mod_network_nic_type_wlan; - -/****************************************************************************** - DECLARE FUNCTIONS - ******************************************************************************/ -void mod_network_init0(void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODNETWORK_H diff --git a/ports/cc3200/mods/modubinascii.c b/ports/cc3200/mods/modubinascii.c deleted file mode 100644 index 6b020ab393b80..0000000000000 --- a/ports/cc3200/mods/modubinascii.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Paul Sokolovsky - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/binary.h" -#include "extmod/modubinascii.h" -#include "modubinascii.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "crc.h" -#include "cryptohash.h" -#include "mpexception.h" - - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_rom_map_elem_t mp_module_binascii_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ubinascii) }, - { MP_ROM_QSTR(MP_QSTR_hexlify), MP_ROM_PTR(&mod_binascii_hexlify_obj) }, - { MP_ROM_QSTR(MP_QSTR_unhexlify), MP_ROM_PTR(&mod_binascii_unhexlify_obj) }, - { MP_ROM_QSTR(MP_QSTR_a2b_base64), MP_ROM_PTR(&mod_binascii_a2b_base64_obj) }, - { MP_ROM_QSTR(MP_QSTR_b2a_base64), MP_ROM_PTR(&mod_binascii_b2a_base64_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_binascii_globals, mp_module_binascii_globals_table); - -const mp_obj_module_t mp_module_ubinascii = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_binascii_globals, -}; diff --git a/ports/cc3200/mods/modubinascii.h b/ports/cc3200/mods/modubinascii.h deleted file mode 100644 index eb9fc4f219610..0000000000000 --- a/ports/cc3200/mods/modubinascii.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H - - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUBINASCII_H diff --git a/ports/cc3200/mods/moduhashlib.c b/ports/cc3200/mods/moduhashlib.c deleted file mode 100644 index 96f51492734f5..0000000000000 --- a/ports/cc3200/mods/moduhashlib.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Paul Sokolovsky - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include MICROPY_HAL_H -#include "py/runtime.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_shamd5.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "shamd5.h" -#include "cryptohash.h" -#include "mpexception.h" - - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct _mp_obj_hash_t { - mp_obj_base_t base; - uint8_t *buffer; - uint32_t b_size; - uint32_t c_size; - uint8_t algo; - uint8_t h_size; - bool fixedlen; - bool digested; - uint8_t hash[32]; -} mp_obj_hash_t; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void hash_update_internal(mp_obj_t self_in, mp_obj_t data, bool digest); -STATIC mp_obj_t hash_read (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void hash_update_internal(mp_obj_t self_in, mp_obj_t data, bool digest) { - mp_obj_hash_t *self = self_in; - mp_buffer_info_t bufinfo; - - if (data) { - mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); - } - - if (digest) { - CRYPTOHASH_SHAMD5Start (self->algo, self->b_size); - } - - if (self->c_size < self->b_size || !data || !self->fixedlen) { - if (digest || self->fixedlen) { - // no data means we want to process our internal buffer - CRYPTOHASH_SHAMD5Update (data ? bufinfo.buf : self->buffer, data ? bufinfo.len : self->b_size); - self->c_size += data ? bufinfo.len : 0; - } else { - self->buffer = m_renew(byte, self->buffer, self->b_size, self->b_size + bufinfo.len); - mp_seq_copy((byte*)self->buffer + self->b_size, bufinfo.buf, bufinfo.len, byte); - self->b_size += bufinfo.len; - self->digested = false; - } - } else { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC mp_obj_t hash_read (mp_obj_t self_in) { - mp_obj_hash_t *self = self_in; - - if (!self->fixedlen) { - if (!self->digested) { - hash_update_internal(self, MP_OBJ_NULL, true); - } - } else if (self->c_size < self->b_size) { - // it's a fixed len block which is still incomplete - mp_raise_OSError(MP_EPERM); - } - - if (!self->digested) { - CRYPTOHASH_SHAMD5Read ((uint8_t *)self->hash); - self->digested = true; - } - return mp_obj_new_bytes(self->hash, self->h_size); -} - -/******************************************************************************/ -// MicroPython bindings - -/// \classmethod \constructor([data[, block_size]]) -/// initial data must be given if block_size wants to be passed -STATIC mp_obj_t hash_make_new(mp_obj_t type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 2, false); - mp_obj_hash_t *self = m_new0(mp_obj_hash_t, 1); - self->base.type = type_in; - if (self->base.type->name == MP_QSTR_sha1) { - self->algo = SHAMD5_ALGO_SHA1; - self->h_size = 20; - } else /* if (self->base.type->name == MP_QSTR_sha256) */ { - self->algo = SHAMD5_ALGO_SHA256; - self->h_size = 32; - } /* else { - self->algo = SHAMD5_ALGO_MD5; - self->h_size = 32; - } */ - - if (n_args) { - // CPython extension to avoid buffering the data before digesting it - // Note: care must be taken to provide all intermediate blocks as multiple - // of four bytes, otherwise the resulting hash will be incorrect. - // the final block can be of any length - if (n_args > 1) { - // block size given, we will feed the data directly into the hash engine - self->fixedlen = true; - self->b_size = mp_obj_get_int(args[1]); - hash_update_internal(self, args[0], true); - } else { - hash_update_internal(self, args[0], false); - } - } - return self; -} - -STATIC mp_obj_t hash_update(mp_obj_t self_in, mp_obj_t arg) { - mp_obj_hash_t *self = self_in; - hash_update_internal(self, arg, false); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(hash_update_obj, hash_update); - -STATIC mp_obj_t hash_digest(mp_obj_t self_in) { - return hash_read(self_in); -} -MP_DEFINE_CONST_FUN_OBJ_1(hash_digest_obj, hash_digest); - -STATIC const mp_rom_map_elem_t hash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&hash_update_obj) }, - { MP_ROM_QSTR(MP_QSTR_digest), MP_ROM_PTR(&hash_digest_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(hash_locals_dict, hash_locals_dict_table); - -//STATIC const mp_obj_type_t md5_type = { -// { &mp_type_type }, -// .name = MP_QSTR_md5, -// .make_new = hash_make_new, -// .locals_dict = (mp_obj_t)&hash_locals_dict, -//}; - -STATIC const mp_obj_type_t sha1_type = { - { &mp_type_type }, - .name = MP_QSTR_sha1, - .make_new = hash_make_new, - .locals_dict = (mp_obj_t)&hash_locals_dict, -}; - -STATIC const mp_obj_type_t sha256_type = { - { &mp_type_type }, - .name = MP_QSTR_sha256, - .make_new = hash_make_new, - .locals_dict = (mp_obj_t)&hash_locals_dict, -}; - -STATIC const mp_rom_map_elem_t mp_module_hashlib_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uhashlib) }, - //{ MP_ROM_QSTR(MP_QSTR_md5), MP_ROM_PTR(&md5_type) }, - { MP_ROM_QSTR(MP_QSTR_sha1), MP_ROM_PTR(&sha1_type) }, - { MP_ROM_QSTR(MP_QSTR_sha256), MP_ROM_PTR(&sha256_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_hashlib_globals, mp_module_hashlib_globals_table); - -const mp_obj_module_t mp_module_uhashlib = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_hashlib_globals, -}; - diff --git a/ports/cc3200/mods/moduos.c b/ports/cc3200/mods/moduos.c deleted file mode 100644 index 7d99c8e80df33..0000000000000 --- a/ports/cc3200/mods/moduos.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/objtuple.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "genhdr/mpversion.h" -#include "moduos.h" -#include "sflash_diskio.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "random.h" -#include "mpexception.h" -#include "version.h" -#include "pybsd.h" -#include "pybuart.h" - -/// \module os - basic "operating system" services -/// -/// The `os` module contains functions for filesystem access and `urandom`. -/// -/// The filesystem has `/` as the root directory, and the available physical -/// drives are accessible from here. They are currently: -/// -/// /flash -- the serial flash filesystem -/// -/// On boot up, the current directory is `/flash`. - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC os_term_dup_obj_t os_term_dup_obj; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ - -void osmount_unmount_all (void) { - //TODO - /* - for (mp_uint_t i = 0; i < MP_STATE_PORT(mount_obj_list).len; i++) { - os_fs_mount_t *mount_obj = ((os_fs_mount_t *)(MP_STATE_PORT(mount_obj_list).items[i])); - unmount(mount_obj); - } - */ -} - -/******************************************************************************/ -// MicroPython bindings -// - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, WIPY_SW_VERSION_NUMBER); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); -STATIC MP_DEFINE_ATTRTUPLE( - os_uname_info_obj, - os_uname_info_fields, - 5, - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - (mp_obj_t)&os_uname_info_release_obj, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj -); - -STATIC mp_obj_t os_uname(void) { - return (mp_obj_t)&os_uname_info_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname); - -STATIC mp_obj_t os_sync(void) { - sflash_disk_flush(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_sync_obj, os_sync); - -STATIC mp_obj_t os_urandom(mp_obj_t num) { - mp_int_t n = mp_obj_get_int(num); - vstr_t vstr; - vstr_init_len(&vstr, n); - for (int i = 0; i < n; i++) { - vstr.buf[i] = rng_get(); - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); - -STATIC mp_obj_t os_dupterm(uint n_args, const mp_obj_t *args) { - if (n_args == 0) { - if (MP_STATE_PORT(os_term_dup_obj) == MP_OBJ_NULL) { - return mp_const_none; - } else { - return MP_STATE_PORT(os_term_dup_obj)->stream_o; - } - } else { - mp_obj_t stream_o = args[0]; - if (stream_o == mp_const_none) { - MP_STATE_PORT(os_term_dup_obj) = MP_OBJ_NULL; - } else { - if (!MP_OBJ_IS_TYPE(stream_o, &pyb_uart_type)) { - // must be a stream-like object providing at least read and write methods - mp_load_method(stream_o, MP_QSTR_read, os_term_dup_obj.read); - mp_load_method(stream_o, MP_QSTR_write, os_term_dup_obj.write); - } - os_term_dup_obj.stream_o = stream_o; - MP_STATE_PORT(os_term_dup_obj) = &os_term_dup_obj; - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(os_dupterm_obj, 0, 1, os_dupterm); - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove - - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&os_sync_obj) }, - { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) }, - - // MicroPython additions - // removed: mkfs - // renamed: unmount -> umount - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, - { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&os_dupterm_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/cc3200/mods/moduos.h b/ports/cc3200/mods/moduos.h deleted file mode 100644 index f183715c907ca..0000000000000 --- a/ports/cc3200/mods/moduos.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUOS_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUOS_H - -#include "py/obj.h" - -/****************************************************************************** - DEFINE PUBLIC TYPES - ******************************************************************************/ - -typedef struct _os_term_dup_obj_t { - mp_obj_t stream_o; - mp_obj_t read[3]; - mp_obj_t write[3]; -} os_term_dup_obj_t; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void osmount_unmount_all (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUOS_H diff --git a/ports/cc3200/mods/modusocket.c b/ports/cc3200/mods/modusocket.c deleted file mode 100644 index f587e765ae78a..0000000000000 --- a/ports/cc3200/mods/modusocket.c +++ /dev/null @@ -1,824 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "simplelink.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "mpexception.h" - -/******************************************************************************/ -// The following set of macros and functions provide a glue between the CC3100 -// simplelink layer and the functions/methods provided by the usocket module. -// They were historically in a separate file because usocket was designed to -// work with multiple NICs, and the wlan_XXX functions just provided one -// particular NIC implementation (that of the CC3100). But the CC3200 port only -// supports a single NIC (being the CC3100) so it's unnecessary and inefficient -// to provide an intermediate wrapper layer. Hence the wlan_XXX functions -// are provided below as static functions so they can be inlined directly by -// the corresponding usocket calls. - -#define WLAN_MAX_RX_SIZE 16000 -#define WLAN_MAX_TX_SIZE 1476 - -#define MAKE_SOCKADDR(addr, ip, port) SlSockAddr_t addr; \ - addr.sa_family = SL_AF_INET; \ - addr.sa_data[0] = port >> 8; \ - addr.sa_data[1] = port; \ - addr.sa_data[2] = ip[3]; \ - addr.sa_data[3] = ip[2]; \ - addr.sa_data[4] = ip[1]; \ - addr.sa_data[5] = ip[0]; - -#define UNPACK_SOCKADDR(addr, ip, port) port = (addr.sa_data[0] << 8) | addr.sa_data[1]; \ - ip[0] = addr.sa_data[5]; \ - ip[1] = addr.sa_data[4]; \ - ip[2] = addr.sa_data[3]; \ - ip[3] = addr.sa_data[2]; - -#define SOCKET_TIMEOUT_QUANTA_MS (20) - -STATIC int convert_sl_errno(int sl_errno) { - return -sl_errno; -} - -// This function is left as non-static so it's not inlined. -int check_timedout(mod_network_socket_obj_t *s, int ret, uint32_t *timeout_ms, int *_errno) { - if (*timeout_ms == 0 || ret != SL_EAGAIN) { - if (s->sock_base.timeout_ms > 0 && ret == SL_EAGAIN) { - *_errno = MP_ETIMEDOUT; - } else { - *_errno = convert_sl_errno(ret); - } - return -1; - } - mp_hal_delay_ms(SOCKET_TIMEOUT_QUANTA_MS); - if (*timeout_ms < SOCKET_TIMEOUT_QUANTA_MS) { - *timeout_ms = 0; - } else { - *timeout_ms -= SOCKET_TIMEOUT_QUANTA_MS; - } - return 0; -} - -STATIC int wlan_gethostbyname(const char *name, mp_uint_t len, uint8_t *out_ip, uint8_t family) { - uint32_t ip; - int result = sl_NetAppDnsGetHostByName((_i8 *)name, (_u16)len, (_u32*)&ip, (_u8)family); - out_ip[0] = ip; - out_ip[1] = ip >> 8; - out_ip[2] = ip >> 16; - out_ip[3] = ip >> 24; - return result; -} - -STATIC int wlan_socket_socket(mod_network_socket_obj_t *s, int *_errno) { - int16_t sd = sl_Socket(s->sock_base.u_param.domain, s->sock_base.u_param.type, s->sock_base.u_param.proto); - if (sd < 0) { - *_errno = sd; - return -1; - } - s->sock_base.sd = sd; - return 0; -} - -STATIC void wlan_socket_close(mod_network_socket_obj_t *s) { - // this is to prevent the finalizer to close a socket that failed when being created - if (s->sock_base.sd >= 0) { - modusocket_socket_delete(s->sock_base.sd); - sl_Close(s->sock_base.sd); - s->sock_base.sd = -1; - } -} - -STATIC int wlan_socket_bind(mod_network_socket_obj_t *s, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = sl_Bind(s->sock_base.sd, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_listen(mod_network_socket_obj_t *s, mp_int_t backlog, int *_errno) { - int ret = sl_Listen(s->sock_base.sd, backlog); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_accept(mod_network_socket_obj_t *s, mod_network_socket_obj_t *s2, byte *ip, mp_uint_t *port, int *_errno) { - // accept incoming connection - int16_t sd; - SlSockAddr_t addr; - SlSocklen_t addr_len = sizeof(addr); - - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - sd = sl_Accept(s->sock_base.sd, &addr, &addr_len); - if (sd >= 0) { - // save the socket descriptor - s2->sock_base.sd = sd; - // return ip and port - UNPACK_SOCKADDR(addr, ip, *port); - return 0; - } - if (check_timedout(s, sd, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_connect(mod_network_socket_obj_t *s, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - uint32_t timeout_ms = s->sock_base.timeout_ms; - - // For a non-blocking connect the CC3100 will return SL_EALREADY while the - // connection is in progress. - - for (;;) { - int ret = sl_Connect(s->sock_base.sd, &addr, sizeof(addr)); - if (ret == 0) { - return 0; - } - - // Check if we are in non-blocking mode and the connection is in progress - if (s->sock_base.timeout_ms == 0 && ret == SL_EALREADY) { - // To match BSD we return EINPROGRESS here - *_errno = MP_EINPROGRESS; - return -1; - } - - // We are in blocking mode, so if the connection isn't in progress then error out - if (ret != SL_EALREADY) { - *_errno = convert_sl_errno(ret); - return -1; - } - - if (check_timedout(s, SL_EAGAIN, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_send(mod_network_socket_obj_t *s, const byte *buf, mp_uint_t len, int *_errno) { - if (len == 0) { - return 0; - } - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_Send(s->sock_base.sd, (const void *)buf, len, 0); - if (ret > 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_recv(mod_network_socket_obj_t *s, byte *buf, mp_uint_t len, int *_errno) { - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_Recv(s->sock_base.sd, buf, MIN(len, WLAN_MAX_RX_SIZE), 0); - if (ret >= 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_sendto( mod_network_socket_obj_t *s, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_SendTo(s->sock_base.sd, (byte*)buf, len, 0, (SlSockAddr_t*)&addr, sizeof(addr)); - if (ret >= 0) { - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_recvfrom(mod_network_socket_obj_t *s, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - SlSockAddr_t addr; - SlSocklen_t addr_len = sizeof(addr); - uint32_t timeout_ms = s->sock_base.timeout_ms; - for (;;) { - int ret = sl_RecvFrom(s->sock_base.sd, buf, MIN(len, WLAN_MAX_RX_SIZE), 0, &addr, &addr_len); - if (ret >= 0) { - UNPACK_SOCKADDR(addr, ip, *port); - return ret; - } - if (check_timedout(s, ret, &timeout_ms, _errno)) { - return -1; - } - } -} - -STATIC int wlan_socket_setsockopt(mod_network_socket_obj_t *s, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - int ret = sl_SetSockOpt(s->sock_base.sd, level, opt, optval, optlen); - if (ret < 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int wlan_socket_settimeout(mod_network_socket_obj_t *s, mp_uint_t timeout_s, int *_errno) { - SlSockNonblocking_t option; - if (timeout_s == 0 || timeout_s == -1) { - if (timeout_s == 0) { - // set non-blocking mode - option.NonblockingEnabled = 1; - } else { - // set blocking mode - option.NonblockingEnabled = 0; - } - timeout_s = 0; - } else { - // synthesize timeout via non-blocking behaviour with a loop - option.NonblockingEnabled = 1; - } - - int ret = sl_SetSockOpt(s->sock_base.sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &option, sizeof(option)); - if (ret != 0) { - *_errno = convert_sl_errno(ret); - return -1; - } - - s->sock_base.timeout_ms = timeout_s * 1000; - return 0; -} - -STATIC int wlan_socket_ioctl (mod_network_socket_obj_t *s, mp_uint_t request, mp_uint_t arg, int *_errno) { - mp_int_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - int32_t sd = s->sock_base.sd; - - // init fds - SlFdSet_t rfds, wfds, xfds; - SL_FD_ZERO(&rfds); - SL_FD_ZERO(&wfds); - SL_FD_ZERO(&xfds); - - // set fds if needed - if (flags & MP_STREAM_POLL_RD) { - SL_FD_SET(sd, &rfds); - } - if (flags & MP_STREAM_POLL_WR) { - SL_FD_SET(sd, &wfds); - } - if (flags & MP_STREAM_POLL_HUP) { - SL_FD_SET(sd, &xfds); - } - - // call simplelink's select with minimum timeout - SlTimeval_t tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int32_t nfds = sl_Select(sd + 1, &rfds, &wfds, &xfds, &tv); - - // check for errors - if (nfds == -1) { - *_errno = nfds; - return -1; - } - - // check return of select - if (SL_FD_ISSET(sd, &rfds)) { - ret |= MP_STREAM_POLL_RD; - } - if (SL_FD_ISSET(sd, &wfds)) { - ret |= MP_STREAM_POLL_WR; - } - if (SL_FD_ISSET(sd, &xfds)) { - ret |= MP_STREAM_POLL_HUP; - } - } else { - *_errno = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define MOD_NETWORK_MAX_SOCKETS 10 - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct { - int16_t sd; - bool user; -} modusocket_sock_t; - -/****************************************************************************** - DEFINE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_type_t socket_type; -STATIC OsiLockObj_t modusocket_LockObj; -STATIC modusocket_sock_t modusocket_sockets[MOD_NETWORK_MAX_SOCKETS] = {{.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, - {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}, {.sd = -1}}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void modusocket_pre_init (void) { - // create the wlan lock - ASSERT(OSI_OK == sl_LockObjCreate(&modusocket_LockObj, "SockLock")); - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_socket_add (int16_t sd, bool user) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd < 0) { - modusocket_sockets[i].sd = sd; - modusocket_sockets[i].user = user; - break; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_socket_delete (int16_t sd) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd == sd) { - modusocket_sockets[i].sd = -1; - break; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -void modusocket_enter_sleep (void) { - SlFdSet_t socketset; - int16_t maxfd = 0; - - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - int16_t sd; - if ((sd = modusocket_sockets[i].sd) >= 0) { - SL_FD_SET(sd, &socketset); - maxfd = (maxfd > sd) ? maxfd : sd; - } - } - - if (maxfd > 0) { - // wait for any of the sockets to become ready... - sl_Select(maxfd + 1, &socketset, NULL, NULL, NULL); - } -} - -void modusocket_close_all_user_sockets (void) { - sl_LockObjLock (&modusocket_LockObj, SL_OS_WAIT_FOREVER); - for (int i = 0; i < MOD_NETWORK_MAX_SOCKETS; i++) { - if (modusocket_sockets[i].sd >= 0 && modusocket_sockets[i].user) { - sl_Close(modusocket_sockets[i].sd); - modusocket_sockets[i].sd = -1; - } - } - sl_LockObjUnlock (&modusocket_LockObj); -} - -/******************************************************************************/ -// socket class - -// constructor socket(family=AF_INET, type=SOCK_STREAM, proto=IPPROTO_TCP, fileno=None) -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - // create socket object - mod_network_socket_obj_t *s = m_new_obj_with_finaliser(mod_network_socket_obj_t); - s->base.type = (mp_obj_t)&socket_type; - s->sock_base.u_param.domain = SL_AF_INET; - s->sock_base.u_param.type = SL_SOCK_STREAM; - s->sock_base.u_param.proto = SL_IPPROTO_TCP; - s->sock_base.u_param.fileno = -1; - s->sock_base.timeout_ms = 0; - s->sock_base.cert_req = false; - - if (n_args > 0) { - s->sock_base.u_param.domain = mp_obj_get_int(args[0]); - if (n_args > 1) { - s->sock_base.u_param.type = mp_obj_get_int(args[1]); - if (n_args > 2) { - s->sock_base.u_param.proto = mp_obj_get_int(args[2]); - if (n_args > 3) { - s->sock_base.u_param.fileno = mp_obj_get_int(args[3]); - } - } - } - } - - // create the socket - int _errno; - if (wlan_socket_socket(s, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - // add the socket to the list - modusocket_socket_add(s->sock_base.sd, true); - return s; -} - -// method socket.close() -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - wlan_socket_close(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); - -// method socket.bind(address) -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // call the NIC to bind the socket - int _errno = 0; - if (wlan_socket_bind(self, ip, port, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -// method socket.listen([backlog]) -STATIC mp_obj_t socket_listen(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - int32_t backlog = 0; - if (n_args > 1) { - backlog = mp_obj_get_int(args[1]); - backlog = (backlog < 0) ? 0 : backlog; - } - - int _errno; - if (wlan_socket_listen(self, backlog, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_listen_obj, 1, 2, socket_listen); - -// method socket.accept() -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - - // create new socket object - mod_network_socket_obj_t *socket2 = m_new_obj_with_finaliser(mod_network_socket_obj_t); - // the new socket inherits all properties from its parent - memcpy (socket2, self, sizeof(mod_network_socket_obj_t)); - - // accept the incoming connection - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = 0; - int _errno = 0; - if (wlan_socket_accept(self, socket2, ip, &port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - // add the socket to the list - modusocket_socket_add(socket2->sock_base.sd, true); - - // make the return value - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = socket2; - client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_LITTLE); - return client; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -// method socket.connect(address) -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // connect the socket - int _errno; - if (wlan_socket_connect(self, ip, port, &_errno) != 0) { - if (!self->sock_base.cert_req && _errno == SL_ESECSNOVERIFY) { - return mp_const_none; - } - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -// method socket.send(bytes) -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mod_network_socket_obj_t *self = self_in; - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int _errno; - mp_int_t ret = wlan_socket_send(self, bufinfo.buf, bufinfo.len, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int_from_uint(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -// method socket.recv(bufsize) -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - mp_int_t len = mp_obj_get_int(len_in); - vstr_t vstr; - vstr_init_len(&vstr, len); - int _errno; - mp_int_t ret = wlan_socket_recv(self, (byte*)vstr.buf, len, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - if (ret == 0) { - return mp_const_empty_bytes; - } - vstr.len = ret; - vstr.buf[vstr.len] = '\0'; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -// method socket.sendto(bytes, address) -STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get the data - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); - - // get address - uint8_t ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_LITTLE); - - // call the nic to sendto - int _errno = 0; - mp_int_t ret = wlan_socket_sendto(self, bufinfo.buf, bufinfo.len, ip, port, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); - -// method socket.recvfrom(bufsize) -STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(len_in)); - byte ip[4]; - mp_uint_t port = 0; - int _errno = 0; - mp_int_t ret = wlan_socket_recvfrom(self, (byte*)vstr.buf, vstr.len, ip, &port, &_errno); - if (ret < 0) { - mp_raise_OSError(_errno); - } - mp_obj_t tuple[2]; - if (ret == 0) { - tuple[0] = mp_const_empty_bytes; - } else { - vstr.len = ret; - vstr.buf[vstr.len] = '\0'; - tuple[0] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } - tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_LITTLE); - return mp_obj_new_tuple(2, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); - -// method socket.setsockopt(level, optname, value) -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - mp_int_t level = mp_obj_get_int(args[1]); - mp_int_t opt = mp_obj_get_int(args[2]); - - const void *optval; - mp_uint_t optlen; - mp_int_t val; - if (mp_obj_is_integer(args[3])) { - val = mp_obj_get_int_truncated(args[3]); - optval = &val; - optlen = sizeof(val); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); - optval = bufinfo.buf; - optlen = bufinfo.len; - } - - int _errno; - if (wlan_socket_setsockopt(self, level, opt, optval, optlen, &_errno) != 0) { - mp_raise_OSError(-_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -// method socket.settimeout(value) -// timeout=0 means non-blocking -// timeout=None means blocking -// otherwise, timeout is in seconds -STATIC mp_obj_t socket_settimeout(mp_obj_t self_in, mp_obj_t timeout_in) { - mod_network_socket_obj_t *self = self_in; - mp_uint_t timeout; - if (timeout_in == mp_const_none) { - timeout = -1; - } else { - timeout = mp_obj_get_int(timeout_in); - } - int _errno = 0; - if (wlan_socket_settimeout(self, timeout, &_errno) != 0) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); - -// method socket.setblocking(flag) -STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t blocking) { - if (mp_obj_is_true(blocking)) { - return socket_settimeout(self_in, mp_const_none); - } else { - return socket_settimeout(self_in, MP_OBJ_NEW_SMALL_INT(0)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); - -STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { - (void)n_args; - return args[0]; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 6, socket_makefile); - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendall), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, - { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_makefile), MP_ROM_PTR(&socket_makefile_obj) }, - - // stream methods - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read1_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; - -MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -STATIC mp_uint_t socket_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - mod_network_socket_obj_t *self = self_in; - mp_int_t ret = wlan_socket_recv(self, buf, size, errcode); - if (ret < 0) { - // we need to ignore the socket closed error here because a read() without params - // only returns when the socket is closed by the other end - if (*errcode != -SL_ESECCLOSED) { - ret = MP_STREAM_ERROR; - } else { - ret = 0; - } - } - return ret; -} - -STATIC mp_uint_t socket_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - mod_network_socket_obj_t *self = self_in; - mp_int_t ret = wlan_socket_send(self, buf, size, errcode); - if (ret < 0) { - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t socket_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mod_network_socket_obj_t *self = self_in; - return wlan_socket_ioctl(self, request, arg, errcode); -} - -const mp_stream_p_t socket_stream_p = { - .read = socket_read, - .write = socket_write, - .ioctl = socket_ioctl, - .is_text = false, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -/******************************************************************************/ -// usocket module - -// function usocket.getaddrinfo(host, port) -/// \function getaddrinfo(host, port) -STATIC mp_obj_t mod_usocket_getaddrinfo(mp_obj_t host_in, mp_obj_t port_in) { - size_t hlen; - const char *host = mp_obj_str_get_data(host_in, &hlen); - mp_int_t port = mp_obj_get_int(port_in); - - // ipv4 only - uint8_t out_ip[MOD_NETWORK_IPV4ADDR_BUF_SIZE]; - int32_t result = wlan_gethostbyname(host, hlen, out_ip, SL_AF_INET); - if (result < 0) { - mp_raise_OSError(-result); - } - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(SL_AF_INET); - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(SL_SOCK_STREAM); - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = netutils_format_inet_addr(out_ip, port, NETUTILS_LITTLE); - return mp_obj_new_list(1, (mp_obj_t*)&tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_usocket_getaddrinfo_obj, mod_usocket_getaddrinfo); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_usocket_getaddrinfo_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(SL_AF_INET) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(SL_SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(SL_SOCK_DGRAM) }, - - { MP_ROM_QSTR(MP_QSTR_IPPROTO_SEC), MP_ROM_INT(SL_SEC_SOCKET) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(SL_IPPROTO_TCP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(SL_IPPROTO_UDP) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; diff --git a/ports/cc3200/mods/modusocket.h b/ports/cc3200/mods/modusocket.h deleted file mode 100644 index 6e7758662e082..0000000000000 --- a/ports/cc3200/mods/modusocket.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H -#define MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H - -extern const mp_obj_dict_t socket_locals_dict; -extern const mp_stream_p_t socket_stream_p; - -extern void modusocket_pre_init (void); -extern void modusocket_socket_add (int16_t sd, bool user); -extern void modusocket_socket_delete (int16_t sd); -extern void modusocket_enter_sleep (void); -extern void modusocket_close_all_user_sockets (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODUSOCKET_H diff --git a/ports/cc3200/mods/modussl.c b/ports/cc3200/mods/modussl.c deleted file mode 100644 index 3211570499247..0000000000000 --- a/ports/cc3200/mods/modussl.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "simplelink.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "mpexception.h" - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SSL_CERT_NONE (0) -#define SSL_CERT_OPTIONAL (1) -#define SSL_CERT_REQUIRED (2) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _mp_obj_ssl_socket_t { - mp_obj_base_t base; - mod_network_socket_base_t sock_base; - mp_obj_t o_sock; -} mp_obj_ssl_socket_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_type_t ssl_socket_type; - -/******************************************************************************/ -// MicroPython bindings; SSL class - -// ssl sockets inherit from normal socket, so we take its -// locals and stream methods -STATIC const mp_obj_type_t ssl_socket_type = { - { &mp_type_type }, - .name = MP_QSTR_ussl, - .getiter = NULL, - .iternext = NULL, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -STATIC mp_obj_t mod_ssl_wrap_socket(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_sock, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_keyfile, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_certfile, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_server_side, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_cert_reqs, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SSL_CERT_NONE} }, - { MP_QSTR_ssl_version, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SL_SO_SEC_METHOD_TLSV1} }, - { MP_QSTR_ca_certs, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse arguments - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // chech if ca validation is required - if (args[4].u_int != SSL_CERT_NONE && args[5].u_obj == mp_const_none) { - goto arg_error; - } - - // retrieve the file paths (with an 6 byte offset in order to strip it from the '/flash' prefix) - const char *keyfile = (args[1].u_obj == mp_const_none) ? NULL : &(mp_obj_str_get_str(args[1].u_obj)[6]); - const char *certfile = (args[2].u_obj == mp_const_none) ? NULL : &(mp_obj_str_get_str(args[2].u_obj)[6]); - const char *cafile = (args[6].u_obj == mp_const_none || args[4].u_int != SSL_CERT_REQUIRED) ? - NULL : &(mp_obj_str_get_str(args[6].u_obj)[6]); - - // server side requires both certfile and keyfile - if (args[3].u_bool && (!keyfile || !certfile)) { - goto arg_error; - } - - _i16 _errno; - _i16 sd = ((mod_network_socket_obj_t *)args[0].u_obj)->sock_base.sd; - - // set the requested SSL method - _u8 method = args[5].u_int; - if ((_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECMETHOD, &method, sizeof(method))) < 0) { - goto socket_error; - } - if (keyfile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_PRIVATE_KEY_FILE_NAME, keyfile, strlen(keyfile))) < 0) { - goto socket_error; - } - if (certfile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_CERTIFICATE_FILE_NAME, certfile, strlen(certfile))) < 0) { - goto socket_error; - } - if (cafile && (_errno = sl_SetSockOpt(sd, SL_SOL_SOCKET, SL_SO_SECURE_FILES_CA_FILE_NAME, cafile, strlen(cafile))) < 0) { - goto socket_error; - } - - // create the ssl socket - mp_obj_ssl_socket_t *ssl_sock = m_new_obj(mp_obj_ssl_socket_t); - // ssl sockets inherit all properties from the original socket - memcpy (&ssl_sock->sock_base, &((mod_network_socket_obj_t *)args[0].u_obj)->sock_base, sizeof(mod_network_socket_base_t)); - ssl_sock->base.type = &ssl_socket_type; - ssl_sock->sock_base.cert_req = (args[4].u_int == SSL_CERT_REQUIRED) ? true : false; - ssl_sock->o_sock = args[0].u_obj; - - return ssl_sock; - -socket_error: - mp_raise_OSError(_errno); - -arg_error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(mod_ssl_wrap_socket_obj, 0, mod_ssl_wrap_socket); - -STATIC const mp_rom_map_elem_t mp_module_ussl_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ussl) }, - { MP_ROM_QSTR(MP_QSTR_wrap_socket), MP_ROM_PTR(&mod_ssl_wrap_socket_obj) }, - - // class exceptions - { MP_ROM_QSTR(MP_QSTR_SSLError), MP_ROM_PTR(&mp_type_OSError) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_CERT_NONE), MP_ROM_INT(SSL_CERT_NONE) }, - { MP_ROM_QSTR(MP_QSTR_CERT_OPTIONAL), MP_ROM_INT(SSL_CERT_OPTIONAL) }, - { MP_ROM_QSTR(MP_QSTR_CERT_REQUIRED), MP_ROM_INT(SSL_CERT_REQUIRED) }, - - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_SSLv3), MP_ROM_INT(SL_SO_SEC_METHOD_SSLV3) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1_1), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1_1) }, - { MP_ROM_QSTR(MP_QSTR_PROTOCOL_TLSv1_2), MP_ROM_INT(SL_SO_SEC_METHOD_TLSV1_2) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_ussl_globals, mp_module_ussl_globals_table); - -const mp_obj_module_t mp_module_ussl = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_ussl_globals, -}; - diff --git a/ports/cc3200/mods/modutime.c b/ports/cc3200/mods/modutime.c deleted file mode 100644 index 13750f96b5c85..0000000000000 --- a/ports/cc3200/mods/modutime.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include "py/runtime.h" -#include "py/obj.h" -#include "py/smallint.h" -#include "py/mphal.h" -#include "lib/timeutils/timeutils.h" -#include "extmod/utime_mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "systick.h" -#include "pybrtc.h" -#include "mpexception.h" -#include "utils.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/******************************************************************************/ -// MicroPython bindings - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2015) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - if (n_args == 0 || args[0] == mp_const_none) { - timeutils_struct_time_t tm; - - // get the seconds from the RTC - timeutils_seconds_since_2000_to_struct_time(pyb_rtc_get_seconds(), &tm); - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(tm.tm_wday), - mp_obj_new_int(tm.tm_yday) - }; - return mp_obj_new_tuple(8, tuple); - } else { - mp_int_t seconds = mp_obj_get_int(args[0]); - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - size_t len; - mp_obj_t *elem; - - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - mp_raise_TypeError(mpexception_num_type_invalid_arguments); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), - mp_obj_get_int(elem[3]), mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -STATIC mp_obj_t time_time(void) { - return mp_obj_new_int(pyb_rtc_get_seconds()); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC mp_obj_t time_sleep(mp_obj_t seconds_o) { - int32_t sleep_s = mp_obj_get_int(seconds_o); - if (sleep_s > 0) { - mp_hal_delay_ms(sleep_s * 1000); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(time_sleep_obj, time_sleep); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&time_sleep_obj) }, - - // MicroPython additions - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t mp_module_utime = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/cc3200/mods/modwipy.c b/ports/cc3200/mods/modwipy.c deleted file mode 100644 index 0f16e73018b1d..0000000000000 --- a/ports/cc3200/mods/modwipy.c +++ /dev/null @@ -1,30 +0,0 @@ -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "mperror.h" - - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t mod_wipy_heartbeat(size_t n_args, const mp_obj_t *args) { - if (n_args) { - mperror_enable_heartbeat (mp_obj_is_true(args[0])); - return mp_const_none; - } else { - return mp_obj_new_bool(mperror_is_heartbeat_enabled()); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_wipy_heartbeat_obj, 0, 1, mod_wipy_heartbeat); - -STATIC const mp_rom_map_elem_t wipy_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_wipy) }, - { MP_ROM_QSTR(MP_QSTR_heartbeat), MP_ROM_PTR(&mod_wipy_heartbeat_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wipy_module_globals, wipy_module_globals_table); - -const mp_obj_module_t wipy_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&wipy_module_globals, -}; diff --git a/ports/cc3200/mods/modwlan.c b/ports/cc3200/mods/modwlan.c deleted file mode 100644 index 005334a7969df..0000000000000 --- a/ports/cc3200/mods/modwlan.c +++ /dev/null @@ -1,1304 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "simplelink.h" -#include "py/ioctl.h" -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/timeutils/timeutils.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "modwlan.h" -#include "pybrtc.h" -#include "debug.h" -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) -#include "serverstask.h" -#endif -#include "mpexception.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "antenna.h" - - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -// Status bits - These are used to set/reset the corresponding bits in a given variable -typedef enum{ - STATUS_BIT_NWP_INIT = 0, // If this bit is set: Network Processor is - // powered up - - STATUS_BIT_CONNECTION, // If this bit is set: the device is connected to - // the AP or client is connected to device (AP) - - STATUS_BIT_IP_LEASED, // If this bit is set: the device has leased IP to - // any connected client - - STATUS_BIT_IP_ACQUIRED, // If this bit is set: the device has acquired an IP - - STATUS_BIT_SMARTCONFIG_START, // If this bit is set: the SmartConfiguration - // process is started from SmartConfig app - - STATUS_BIT_P2P_DEV_FOUND, // If this bit is set: the device (P2P mode) - // found any p2p-device in scan - - STATUS_BIT_P2P_REQ_RECEIVED, // If this bit is set: the device (P2P mode) - // found any p2p-negotiation request - - STATUS_BIT_CONNECTION_FAILED, // If this bit is set: the device(P2P mode) - // connection to client(or reverse way) is failed - - STATUS_BIT_PING_DONE // If this bit is set: the device has completed - // the ping operation -} e_StatusBits; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define CLR_STATUS_BIT_ALL(status) (status = 0) -#define SET_STATUS_BIT(status, bit) (status |= ( 1 << (bit))) -#define CLR_STATUS_BIT(status, bit) (status &= ~(1 << (bit))) -#define GET_STATUS_BIT(status, bit) (0 != (status & (1 << (bit)))) - -#define IS_NW_PROCSR_ON(status) GET_STATUS_BIT(status, STATUS_BIT_NWP_INIT) -#define IS_CONNECTED(status) GET_STATUS_BIT(status, STATUS_BIT_CONNECTION) -#define IS_IP_LEASED(status) GET_STATUS_BIT(status, STATUS_BIT_IP_LEASED) -#define IS_IP_ACQUIRED(status) GET_STATUS_BIT(status, STATUS_BIT_IP_ACQUIRED) -#define IS_SMART_CFG_START(status) GET_STATUS_BIT(status, STATUS_BIT_SMARTCONFIG_START) -#define IS_P2P_DEV_FOUND(status) GET_STATUS_BIT(status, STATUS_BIT_P2P_DEV_FOUND) -#define IS_P2P_REQ_RCVD(status) GET_STATUS_BIT(status, STATUS_BIT_P2P_REQ_RECEIVED) -#define IS_CONNECT_FAILED(status) GET_STATUS_BIT(status, STATUS_BIT_CONNECTION_FAILED) -#define IS_PING_DONE(status) GET_STATUS_BIT(status, STATUS_BIT_PING_DONE) - -#define MODWLAN_SL_SCAN_ENABLE 1 -#define MODWLAN_SL_SCAN_DISABLE 0 -#define MODWLAN_SL_MAX_NETWORKS 20 - -#define MODWLAN_MAX_NETWORKS 20 -#define MODWLAN_SCAN_PERIOD_S 3600 // 1 hour -#define MODWLAN_WAIT_FOR_SCAN_MS 1050 -#define MODWLAN_CONNECTION_WAIT_MS 2 - -#define ASSERT_ON_ERROR(x) ASSERT((x) >= 0) - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC wlan_obj_t wlan_obj = { - .mode = -1, - .status = 0, - .ip = 0, - .auth = MICROPY_PORT_WLAN_AP_SECURITY, - .channel = MICROPY_PORT_WLAN_AP_CHANNEL, - .ssid = MICROPY_PORT_WLAN_AP_SSID, - .key = MICROPY_PORT_WLAN_AP_KEY, - .mac = {0}, - //.ssid_o = {0}, - //.bssid = {0}, - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - .servers_enabled = false, - #endif -}; - -STATIC const mp_irq_methods_t wlan_irq_methods; - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef SL_PLATFORM_MULTI_THREADED -OsiLockObj_t wlan_LockObj; -#endif - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void wlan_clear_data (void); -STATIC void wlan_reenable (SlWlanMode_t mode); -STATIC void wlan_servers_start (void); -STATIC void wlan_servers_stop (void); -STATIC void wlan_reset (void); -STATIC void wlan_validate_mode (uint mode); -STATIC void wlan_set_mode (uint mode); -STATIC void wlan_validate_ssid_len (uint32_t len); -STATIC void wlan_set_ssid (const char *ssid, uint8_t len, bool add_mac); -STATIC void wlan_validate_security (uint8_t auth, const char *key, uint8_t len); -STATIC void wlan_set_security (uint8_t auth, const char *key, uint8_t len); -STATIC void wlan_validate_channel (uint8_t channel); -STATIC void wlan_set_channel (uint8_t channel); -#if MICROPY_HW_ANTENNA_DIVERSITY -STATIC void wlan_validate_antenna (uint8_t antenna); -STATIC void wlan_set_antenna (uint8_t antenna); -#endif -STATIC void wlan_sl_disconnect (void); -STATIC modwlan_Status_t wlan_do_connect (const char* ssid, uint32_t ssid_len, const char* bssid, uint8_t sec, - const char* key, uint32_t key_len, int32_t timeout); -STATIC void wlan_get_sl_mac (void); -STATIC void wlan_wep_key_unhexlify (const char *key, char *key_out); -STATIC void wlan_lpds_irq_enable (mp_obj_t self_in); -STATIC void wlan_lpds_irq_disable (mp_obj_t self_in); -STATIC bool wlan_scan_result_is_unique (const mp_obj_list_t *nets, _u8 *bssid); - -//***************************************************************************** -// -//! \brief The Function Handles WLAN Events -//! -//! \param[in] pWlanEvent - Pointer to WLAN Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkWlanEventHandler(SlWlanEvent_t *pWlanEvent) { - if (!pWlanEvent) { - return; - } - - switch(pWlanEvent->Event) - { - case SL_WLAN_CONNECT_EVENT: - { - //slWlanConnectAsyncResponse_t *pEventData = &pWlanEvent->EventData.STAandP2PModeWlanConnected; - // copy the new connection data - //memcpy(wlan_obj.bssid, pEventData->bssid, SL_BSSID_LENGTH); - //memcpy(wlan_obj.ssid_o, pEventData->ssid_name, pEventData->ssid_len); - //wlan_obj.ssid_o[pEventData->ssid_len] = '\0'; - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // we must reset the servers in case that the last connection - // was lost without any notification being received - servers_reset(); - #endif - } - break; - case SL_WLAN_DISCONNECT_EVENT: - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - servers_reset(); - servers_wlan_cycle_power(); - #endif - break; - case SL_WLAN_STA_CONNECTED_EVENT: - { - //slPeerInfoAsyncResponse_t *pEventData = &pWlanEvent->EventData.APModeStaConnected; - // get the mac address and name of the connected device - //memcpy(wlan_obj.bssid, pEventData->mac, SL_BSSID_LENGTH); - //memcpy(wlan_obj.ssid_o, pEventData->go_peer_device_name, pEventData->go_peer_device_name_len); - //wlan_obj.ssid_o[pEventData->go_peer_device_name_len] = '\0'; - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // we must reset the servers in case that the last connection - // was lost without any notification being received - servers_reset(); - #endif - } - break; - case SL_WLAN_STA_DISCONNECTED_EVENT: - CLR_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION); - #if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - servers_reset(); - servers_wlan_cycle_power(); - #endif - break; - case SL_WLAN_P2P_DEV_FOUND_EVENT: - // TODO - break; - case SL_WLAN_P2P_NEG_REQ_RECEIVED_EVENT: - // TODO - break; - case SL_WLAN_CONNECTION_FAILED_EVENT: - // TODO - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles network events such as IP acquisition, IP -//! leased, IP released etc. -//! -//! \param[in] pNetAppEvent - Pointer to NetApp Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkNetAppEventHandler(SlNetAppEvent_t *pNetAppEvent) { - if(!pNetAppEvent) { - return; - } - - switch(pNetAppEvent->Event) - { - case SL_NETAPP_IPV4_IPACQUIRED_EVENT: - { - SlIpV4AcquiredAsync_t *pEventData = NULL; - - SET_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED); - - // Ip Acquired Event Data - pEventData = &pNetAppEvent->EventData.ipAcquiredV4; - - // Get the ip - wlan_obj.ip = pEventData->ip; - } - break; - case SL_NETAPP_IPV6_IPACQUIRED_EVENT: - break; - case SL_NETAPP_IP_LEASED_EVENT: - break; - case SL_NETAPP_IP_RELEASED_EVENT: - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles HTTP server events -//! -//! \param[in] pServerEvent - Contains the relevant event information -//! \param[in] pServerResponse - Should be filled by the user with the -//! relevant response information -//! -//! \return None -//! -//**************************************************************************** -void SimpleLinkHttpServerCallback(SlHttpServerEvent_t *pHttpEvent, SlHttpServerResponse_t *pHttpResponse) { - if (!pHttpEvent) { - return; - } - - switch (pHttpEvent->Event) { - case SL_NETAPP_HTTPGETTOKENVALUE_EVENT: - break; - case SL_NETAPP_HTTPPOSTTOKENVALUE_EVENT: - break; - default: - break; - } -} - -//***************************************************************************** -// -//! \brief This function handles General Events -//! -//! \param[in] pDevEvent - Pointer to General Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkGeneralEventHandler(SlDeviceEvent_t *pDevEvent) { - if (!pDevEvent) { - return; - } -} - -//***************************************************************************** -// -//! This function handles socket events indication -//! -//! \param[in] pSock - Pointer to Socket Event Info -//! -//! \return None -//! -//***************************************************************************** -void SimpleLinkSockEventHandler(SlSockEvent_t *pSock) { - if (!pSock) { - return; - } - - switch( pSock->Event ) { - case SL_SOCKET_TX_FAILED_EVENT: - switch( pSock->socketAsyncEvent.SockTxFailData.status) { - case SL_ECLOSE: - break; - default: - break; - } - break; - case SL_SOCKET_ASYNC_EVENT: - switch(pSock->socketAsyncEvent.SockAsyncData.type) { - case SSL_ACCEPT: - break; - case RX_FRAGMENTATION_TOO_BIG: - break; - case OTHER_SIDE_CLOSE_SSL_DATA_NOT_ENCRYPTED: - break; - default: - break; - } - break; - default: - break; - } -} - -//***************************************************************************** -// SimpleLink Asynchronous Event Handlers -- End -//***************************************************************************** - -__attribute__ ((section (".boot"))) -void wlan_pre_init (void) { - // create the wlan lock - #ifdef SL_PLATFORM_MULTI_THREADED - ASSERT(OSI_OK == sl_LockObjCreate(&wlan_LockObj, "WlanLock")); - #endif -} - -void wlan_first_start (void) { - if (wlan_obj.mode < 0) { - CLR_STATUS_BIT_ALL(wlan_obj.status); - wlan_obj.mode = sl_Start(0, 0, 0); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjUnlock (&wlan_LockObj); - #endif - } - - // get the mac address - wlan_get_sl_mac(); -} - -void wlan_sl_init (int8_t mode, const char *ssid, uint8_t ssid_len, uint8_t auth, const char *key, uint8_t key_len, - uint8_t channel, uint8_t antenna, bool add_mac) { - - // stop the servers - wlan_servers_stop(); - - // do a basic start - wlan_first_start(); - - // close any active connections - wlan_sl_disconnect(); - - // Remove all profiles - ASSERT_ON_ERROR(sl_WlanProfileDel(0xFF)); - - // Enable the DHCP client - uint8_t value = 1; - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_STA_P2P_CL_DHCP_ENABLE, 1, 1, &value)); - - // Set PM policy to normal - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_PM, SL_NORMAL_POLICY, NULL, 0)); - - // Unregister mDNS services - ASSERT_ON_ERROR(sl_NetAppMDNSUnRegisterService(0, 0)); - - // Stop the internal HTTP server - sl_NetAppStop(SL_NET_APP_HTTP_SERVER_ID); - - // Remove all 64 filters (8 * 8) - _WlanRxFilterOperationCommandBuff_t RxFilterIdMask; - memset ((void *)&RxFilterIdMask, 0 ,sizeof(RxFilterIdMask)); - memset(RxFilterIdMask.FilterIdMask, 0xFF, 8); - ASSERT_ON_ERROR(sl_WlanRxFilterSet(SL_REMOVE_RX_FILTER, (_u8 *)&RxFilterIdMask, sizeof(_WlanRxFilterOperationCommandBuff_t))); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // set the antenna type - wlan_set_antenna (antenna); -#endif - - // switch to the requested mode - wlan_set_mode(mode); - - // stop and start again (we need to in the propper mode from now on) - wlan_reenable(mode); - - // Set Tx power level for station or AP mode - // Number between 0-15, as dB offset from max power - 0 will set max power - uint8_t ucPower = 0; - if (mode == ROLE_AP) { - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_AP_TX_POWER, sizeof(ucPower), - (unsigned char *)&ucPower)); - - // configure all parameters - wlan_set_ssid (ssid, ssid_len, add_mac); - wlan_set_security (auth, key, key_len); - wlan_set_channel (channel); - - // set the country - _u8* country = (_u8*)"EU"; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_COUNTRY_CODE, 2, country)); - - SlNetCfgIpV4Args_t ipV4; - ipV4.ipV4 = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 IP address - ipV4.ipV4Mask = (_u32)SL_IPV4_VAL(255,255,255,0); // _u32 Subnet mask for this AP - ipV4.ipV4Gateway = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 Default gateway address - ipV4.ipV4DnsServer = (_u32)SL_IPV4_VAL(192,168,1,1); // _u32 DNS server address - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_AP_P2P_GO_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, - sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - - SlNetAppDhcpServerBasicOpt_t dhcpParams; - dhcpParams.lease_time = 4096; // lease time (in seconds) of the IP Address - dhcpParams.ipv4_addr_start = SL_IPV4_VAL(192,168,1,2); // first IP Address for allocation. - dhcpParams.ipv4_addr_last = SL_IPV4_VAL(192,168,1,254); // last IP Address for allocation. - ASSERT_ON_ERROR(sl_NetAppStop(SL_NET_APP_DHCP_SERVER_ID)); // Stop DHCP server before settings - ASSERT_ON_ERROR(sl_NetAppSet(SL_NET_APP_DHCP_SERVER_ID, NETAPP_SET_DHCP_SRV_BASIC_OPT, - sizeof(SlNetAppDhcpServerBasicOpt_t), (_u8* )&dhcpParams)); // set parameters - ASSERT_ON_ERROR(sl_NetAppStart(SL_NET_APP_DHCP_SERVER_ID)); // Start DHCP server with new settings - - // stop and start again - wlan_reenable(mode); - } else { // STA and P2P modes - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_GENERAL_PARAM_ID, WLAN_GENERAL_PARAM_OPT_STA_TX_POWER, - sizeof(ucPower), (unsigned char *)&ucPower)); - // set connection policy to Auto + Fast (tries to connect to the last connected AP) - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_CONNECTION, SL_CONNECTION_POLICY(1, 1, 0, 0, 0), NULL, 0)); - } - - // set current time and date (needed to validate certificates) - wlan_set_current_time (pyb_rtc_get_seconds()); - - // start the servers before returning - wlan_servers_start(); -} - -void wlan_update(void) { -#ifndef SL_PLATFORM_MULTI_THREADED - _SlTaskEntry(); -#endif -} - -void wlan_stop (uint32_t timeout) { - wlan_servers_stop(); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER); - #endif - sl_Stop(timeout); - wlan_clear_data(); - wlan_obj.mode = -1; -} - -void wlan_get_mac (uint8_t *macAddress) { - if (macAddress) { - memcpy (macAddress, wlan_obj.mac, SL_MAC_ADDR_LEN); - } -} - -void wlan_get_ip (uint32_t *ip) { - if (ip) { - *ip = IS_IP_ACQUIRED(wlan_obj.status) ? wlan_obj.ip : 0; - } -} - -bool wlan_is_connected (void) { - return (GET_STATUS_BIT(wlan_obj.status, STATUS_BIT_CONNECTION) && - (GET_STATUS_BIT(wlan_obj.status, STATUS_BIT_IP_ACQUIRED) || wlan_obj.mode != ROLE_STA)); -} - -void wlan_set_current_time (uint32_t seconds_since_2000) { - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds_since_2000, &tm); - - SlDateTime_t sl_datetime = {0}; - sl_datetime.sl_tm_day = tm.tm_mday; - sl_datetime.sl_tm_mon = tm.tm_mon; - sl_datetime.sl_tm_year = tm.tm_year; - sl_datetime.sl_tm_hour = tm.tm_hour; - sl_datetime.sl_tm_min = tm.tm_min; - sl_datetime.sl_tm_sec = tm.tm_sec; - sl_DevSet(SL_DEVICE_GENERAL_CONFIGURATION, SL_DEVICE_GENERAL_CONFIGURATION_DATE_TIME, sizeof(SlDateTime_t), (_u8 *)(&sl_datetime)); -} - -void wlan_off_on (void) { - // no need to lock the WLAN object on every API call since the servers and the MicroPtyhon - // task have the same priority - wlan_reenable(wlan_obj.mode); -} - -//***************************************************************************** -// DEFINE STATIC FUNCTIONS -//***************************************************************************** - -STATIC void wlan_clear_data (void) { - CLR_STATUS_BIT_ALL(wlan_obj.status); - wlan_obj.ip = 0; - //memset(wlan_obj.ssid_o, 0, sizeof(wlan_obj.ssid)); - //memset(wlan_obj.bssid, 0, sizeof(wlan_obj.bssid)); -} - -STATIC void wlan_reenable (SlWlanMode_t mode) { - // stop and start again - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjLock (&wlan_LockObj, SL_OS_WAIT_FOREVER); - #endif - sl_Stop(SL_STOP_TIMEOUT); - wlan_clear_data(); - wlan_obj.mode = sl_Start(0, 0, 0); - #ifdef SL_PLATFORM_MULTI_THREADED - sl_LockObjUnlock (&wlan_LockObj); - #endif - ASSERT (wlan_obj.mode == mode); -} - -STATIC void wlan_servers_start (void) { -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // start the servers if they were enabled before - if (wlan_obj.servers_enabled) { - servers_start(); - } -#endif -} - -STATIC void wlan_servers_stop (void) { -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - // Stop all other processes using the wlan engine - if ((wlan_obj.servers_enabled = servers_are_enabled())) { - servers_stop(); - } -#endif -} - -STATIC void wlan_reset (void) { - wlan_servers_stop(); - wlan_reenable (wlan_obj.mode); - wlan_servers_start(); -} - -STATIC void wlan_validate_mode (uint mode) { - if (mode != ROLE_STA && mode != ROLE_AP) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_mode (uint mode) { - wlan_obj.mode = mode; - ASSERT_ON_ERROR(sl_WlanSetMode(mode)); -} - -STATIC void wlan_validate_ssid_len (uint32_t len) { - if (len > MODWLAN_SSID_LEN_MAX) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_ssid (const char *ssid, uint8_t len, bool add_mac) { - if (ssid != NULL) { - // save the ssid - memcpy(&wlan_obj.ssid, ssid, len); - // append the last 2 bytes of the MAC address, since the use of this functionality is under our control - // we can assume that the lenght of the ssid is less than (32 - 5) - if (add_mac) { - snprintf((char *)&wlan_obj.ssid[len], sizeof(wlan_obj.ssid) - len, "-%02x%02x", wlan_obj.mac[4], wlan_obj.mac[5]); - len += 5; - } - wlan_obj.ssid[len] = '\0'; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_SSID, len, (unsigned char *)wlan_obj.ssid)); - } -} - -STATIC void wlan_validate_security (uint8_t auth, const char *key, uint8_t len) { - if (auth != SL_SEC_TYPE_WEP && auth != SL_SEC_TYPE_WPA_WPA2) { - goto invalid_args; - } - if (auth == SL_SEC_TYPE_WEP) { - for (mp_uint_t i = strlen(key); i > 0; i--) { - if (!unichar_isxdigit(*key++)) { - goto invalid_args; - } - } - } - return; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void wlan_set_security (uint8_t auth, const char *key, uint8_t len) { - wlan_obj.auth = auth; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_SECURITY_TYPE, sizeof(uint8_t), &auth)); - if (key != NULL) { - memcpy(&wlan_obj.key, key, len); - wlan_obj.key[len] = '\0'; - if (auth == SL_SEC_TYPE_WEP) { - _u8 wep_key[32]; - wlan_wep_key_unhexlify(key, (char *)&wep_key); - key = (const char *)&wep_key; - len /= 2; - } - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_PASSWORD, len, (unsigned char *)key)); - } else { - wlan_obj.key[0] = '\0'; - } -} - -STATIC void wlan_validate_channel (uint8_t channel) { - if (channel < 1 || channel > 11) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_channel (uint8_t channel) { - wlan_obj.channel = channel; - ASSERT_ON_ERROR(sl_WlanSet(SL_WLAN_CFG_AP_ID, WLAN_AP_OPT_CHANNEL, 1, &channel)); -} - -#if MICROPY_HW_ANTENNA_DIVERSITY -STATIC void wlan_validate_antenna (uint8_t antenna) { - if (antenna != ANTENNA_TYPE_INTERNAL && antenna != ANTENNA_TYPE_EXTERNAL) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void wlan_set_antenna (uint8_t antenna) { - wlan_obj.antenna = antenna; - antenna_select(antenna); -} -#endif - -STATIC void wlan_sl_disconnect (void) { - // Device in station-mode. Disconnect previous connection if any - // The function returns 0 if 'Disconnected done', negative number if already - // disconnected Wait for 'disconnection' event if 0 is returned, Ignore - // other return-codes - if (0 == sl_WlanDisconnect()) { - while (IS_CONNECTED(wlan_obj.status)) { - mp_hal_delay_ms(MODWLAN_CONNECTION_WAIT_MS); - wlan_update(); - } - } -} - -STATIC modwlan_Status_t wlan_do_connect (const char* ssid, uint32_t ssid_len, const char* bssid, uint8_t sec, - const char* key, uint32_t key_len, int32_t timeout) { - SlSecParams_t secParams; - secParams.Key = (_i8*)key; - secParams.KeyLen = ((key != NULL) ? key_len : 0); - secParams.Type = sec; - - // first close any active connections - wlan_sl_disconnect(); - - if (!sl_WlanConnect((_i8*)ssid, ssid_len, (_u8*)bssid, &secParams, NULL)) { - // wait for the WLAN Event - uint32_t waitForConnectionMs = 0; - while (timeout && !IS_CONNECTED(wlan_obj.status)) { - mp_hal_delay_ms(MODWLAN_CONNECTION_WAIT_MS); - waitForConnectionMs += MODWLAN_CONNECTION_WAIT_MS; - if (timeout > 0 && waitForConnectionMs > timeout) { - return MODWLAN_ERROR_TIMEOUT; - } - wlan_update(); - } - return MODWLAN_OK; - } - return MODWLAN_ERROR_INVALID_PARAMS; -} - -STATIC void wlan_get_sl_mac (void) { - // Get the MAC address - uint8_t macAddrLen = SL_MAC_ADDR_LEN; - sl_NetCfgGet(SL_MAC_ADDRESS_GET, NULL, &macAddrLen, wlan_obj.mac); -} - -STATIC void wlan_wep_key_unhexlify (const char *key, char *key_out) { - byte hex_byte = 0; - for (mp_uint_t i = strlen(key); i > 0 ; i--) { - hex_byte += unichar_xdigit_value(*key++); - if (i & 1) { - hex_byte <<= 4; - } else { - *key_out++ = hex_byte; - hex_byte = 0; - } - } -} - -STATIC void wlan_lpds_irq_enable (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - self->irq_enabled = true; -} - -STATIC void wlan_lpds_irq_disable (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - self->irq_enabled = false; -} - -STATIC int wlan_irq_flags (mp_obj_t self_in) { - wlan_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC bool wlan_scan_result_is_unique (const mp_obj_list_t *nets, _u8 *bssid) { - for (int i = 0; i < nets->len; i++) { - // index 1 in the list is the bssid - mp_obj_str_t *_bssid = (mp_obj_str_t *)((mp_obj_tuple_t *)nets->items[i])->items[1]; - if (!memcmp (_bssid->data, bssid, SL_BSSID_LENGTH)) { - return false; - } - } - return true; -} - -/******************************************************************************/ -// MicroPython bindings; WLAN class - -/// \class WLAN - WiFi driver - -STATIC mp_obj_t wlan_init_helper(wlan_obj_t *self, const mp_arg_val_t *args) { - // get the mode - int8_t mode = args[0].u_int; - wlan_validate_mode(mode); - - // get the ssid - size_t ssid_len = 0; - const char *ssid = NULL; - if (args[1].u_obj != NULL) { - ssid = mp_obj_str_get_data(args[1].u_obj, &ssid_len); - wlan_validate_ssid_len(ssid_len); - } - - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[2].u_obj != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[2].u_obj, 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - } - - // get the channel - uint8_t channel = args[3].u_int; - wlan_validate_channel(channel); - - // get the antenna type - uint8_t antenna = 0; -#if MICROPY_HW_ANTENNA_DIVERSITY - antenna = args[4].u_int; - wlan_validate_antenna(antenna); -#endif - - // initialize the wlan subsystem - wlan_sl_init(mode, (const char *)ssid, ssid_len, auth, (const char *)key, key_len, channel, antenna, false); - - return mp_const_none; -} - -STATIC const mp_arg_t wlan_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_mode, MP_ARG_INT, {.u_int = ROLE_STA} }, - { MP_QSTR_ssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_auth, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_channel, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - #if MICROPY_HW_ANTENNA_DIVERSITY - { MP_QSTR_antenna, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = ANTENNA_TYPE_INTERNAL} }, - #endif -}; -STATIC mp_obj_t wlan_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), wlan_init_args, args); - - // setup the object - wlan_obj_t *self = &wlan_obj; - self->base.type = (mp_obj_t)&mod_network_nic_type_wlan; - - // give it to the sleep module - pyb_sleep_set_wlan_obj(self); - - if (n_args > 1 || n_kw > 0) { - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - // start the peripheral - wlan_init_helper(self, &args[1]); - } - - return (mp_obj_t)self; -} - -STATIC mp_obj_t wlan_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &wlan_init_args[1], args); - return wlan_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_init_obj, 1, wlan_init); - -STATIC mp_obj_t wlan_scan(mp_obj_t self_in) { - STATIC const qstr wlan_scan_info_fields[] = { - MP_QSTR_ssid, MP_QSTR_bssid, MP_QSTR_sec, MP_QSTR_channel, MP_QSTR_rssi - }; - - // check for correct wlan mode - if (wlan_obj.mode == ROLE_AP) { - mp_raise_OSError(MP_EPERM); - } - - Sl_WlanNetworkEntry_t wlanEntry; - mp_obj_t nets = mp_obj_new_list(0, NULL); - uint8_t _index = 0; - - // trigger a new network scan - uint32_t scanSeconds = MODWLAN_SCAN_PERIOD_S; - ASSERT_ON_ERROR(sl_WlanPolicySet(SL_POLICY_SCAN , MODWLAN_SL_SCAN_ENABLE, (_u8 *)&scanSeconds, sizeof(scanSeconds))); - - // wait for the scan to complete - mp_hal_delay_ms(MODWLAN_WAIT_FOR_SCAN_MS); - - do { - if (sl_WlanGetNetworkList(_index++, 1, &wlanEntry) <= 0) { - break; - } - - // we must skip any duplicated results - if (!wlan_scan_result_is_unique(nets, wlanEntry.bssid)) { - continue; - } - - mp_obj_t tuple[5]; - tuple[0] = mp_obj_new_str((const char *)wlanEntry.ssid, wlanEntry.ssid_len, false); - tuple[1] = mp_obj_new_bytes((const byte *)wlanEntry.bssid, SL_BSSID_LENGTH); - // 'normalize' the security type - if (wlanEntry.sec_type > 2) { - wlanEntry.sec_type = 2; - } - tuple[2] = mp_obj_new_int(wlanEntry.sec_type); - tuple[3] = mp_const_none; - tuple[4] = mp_obj_new_int(wlanEntry.rssi); - - // add the network to the list - mp_obj_list_append(nets, mp_obj_new_attrtuple(wlan_scan_info_fields, 5, tuple)); - - } while (_index < MODWLAN_SL_MAX_NETWORKS); - - return nets; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_scan_obj, wlan_scan); - -STATIC mp_obj_t wlan_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_ssid, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_auth, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // check for the correct wlan mode - if (wlan_obj.mode == ROLE_AP) { - mp_raise_OSError(MP_EPERM); - } - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the ssid - size_t ssid_len; - const char *ssid = mp_obj_str_get_data(args[0].u_obj, &ssid_len); - wlan_validate_ssid_len(ssid_len); - - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[1].u_obj != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[1].u_obj, 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - - // convert the wep key if needed - if (auth == SL_SEC_TYPE_WEP) { - _u8 wep_key[32]; - wlan_wep_key_unhexlify(key, (char *)&wep_key); - key = (const char *)&wep_key; - key_len /= 2; - } - } - - // get the bssid - const char *bssid = NULL; - if (args[2].u_obj != mp_const_none) { - bssid = mp_obj_str_get_str(args[2].u_obj); - } - - // get the timeout - int32_t timeout = -1; - if (args[3].u_obj != mp_const_none) { - timeout = mp_obj_get_int(args[3].u_obj); - } - - // connect to the requested access point - modwlan_Status_t status; - status = wlan_do_connect (ssid, ssid_len, bssid, auth, key, key_len, timeout); - if (status == MODWLAN_ERROR_TIMEOUT) { - mp_raise_OSError(MP_ETIMEDOUT); - } else if (status == MODWLAN_ERROR_INVALID_PARAMS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_connect_obj, 1, wlan_connect); - -STATIC mp_obj_t wlan_disconnect(mp_obj_t self_in) { - wlan_sl_disconnect(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_disconnect_obj, wlan_disconnect); - -STATIC mp_obj_t wlan_isconnected(mp_obj_t self_in) { - return wlan_is_connected() ? mp_const_true : mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_isconnected_obj, wlan_isconnected); - -STATIC mp_obj_t wlan_ifconfig(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t wlan_ifconfig_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_config, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(wlan_ifconfig_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), wlan_ifconfig_args, args); - - // check the interface id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_EPERM); - } - - // get the configuration - if (args[1].u_obj == MP_OBJ_NULL) { - // get - unsigned char len = sizeof(SlNetCfgIpV4Args_t); - unsigned char dhcpIsOn; - SlNetCfgIpV4Args_t ipV4; - sl_NetCfgGet(SL_IPV4_STA_P2P_CL_GET_INFO, &dhcpIsOn, &len, (uint8_t *)&ipV4); - - mp_obj_t ifconfig[4] = { - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4Mask, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4Gateway, NETUTILS_LITTLE), - netutils_format_ipv4_addr((uint8_t *)&ipV4.ipV4DnsServer, NETUTILS_LITTLE) - }; - return mp_obj_new_tuple(4, ifconfig); - } else { // set the configuration - if (MP_OBJ_IS_TYPE(args[1].u_obj, &mp_type_tuple)) { - // set a static ip - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1].u_obj, 4, &items); - - SlNetCfgIpV4Args_t ipV4; - netutils_parse_ipv4_addr(items[0], (uint8_t *)&ipV4.ipV4, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[1], (uint8_t *)&ipV4.ipV4Mask, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[2], (uint8_t *)&ipV4.ipV4Gateway, NETUTILS_LITTLE); - netutils_parse_ipv4_addr(items[3], (uint8_t *)&ipV4.ipV4DnsServer, NETUTILS_LITTLE); - - if (wlan_obj.mode == ROLE_AP) { - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_AP_P2P_GO_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - SlNetAppDhcpServerBasicOpt_t dhcpParams; - dhcpParams.lease_time = 4096; // lease time (in seconds) of the IP Address - dhcpParams.ipv4_addr_start = ipV4.ipV4 + 1; // first IP Address for allocation. - dhcpParams.ipv4_addr_last = (ipV4.ipV4 & 0xFFFFFF00) + 254; // last IP Address for allocation. - ASSERT_ON_ERROR(sl_NetAppStop(SL_NET_APP_DHCP_SERVER_ID)); // stop DHCP server before settings - ASSERT_ON_ERROR(sl_NetAppSet(SL_NET_APP_DHCP_SERVER_ID, NETAPP_SET_DHCP_SRV_BASIC_OPT, - sizeof(SlNetAppDhcpServerBasicOpt_t), (_u8* )&dhcpParams)); // set parameters - ASSERT_ON_ERROR(sl_NetAppStart(SL_NET_APP_DHCP_SERVER_ID)); // start DHCP server with new settings - } else { - ASSERT_ON_ERROR(sl_NetCfgSet(SL_IPV4_STA_P2P_CL_STATIC_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, sizeof(SlNetCfgIpV4Args_t), (_u8 *)&ipV4)); - } - } else { - // check for the correct string - const char *mode = mp_obj_str_get_str(args[1].u_obj); - if (strcmp("dhcp", mode)) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - // only if we are not in AP mode - if (wlan_obj.mode != ROLE_AP) { - _u8 val = 1; - sl_NetCfgSet(SL_IPV4_STA_P2P_CL_DHCP_ENABLE, IPCONFIG_MODE_ENABLE_IPV4, 1, &val); - } - } - // config values have changed, so reset - wlan_reset(); - // set current time and date (needed to validate certificates) - wlan_set_current_time (pyb_rtc_get_seconds()); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_ifconfig_obj, 1, wlan_ifconfig); - -STATIC mp_obj_t wlan_mode(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->mode); - } else { - uint mode = mp_obj_get_int(args[1]); - wlan_validate_mode(mode); - wlan_set_mode(mode); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_mode_obj, 1, 2, wlan_mode); - -STATIC mp_obj_t wlan_ssid(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_str((const char *)self->ssid, strlen((const char *)self->ssid), false); - } else { - size_t len; - const char *ssid = mp_obj_str_get_data(args[1], &len); - wlan_validate_ssid_len(len); - wlan_set_ssid(ssid, len, false); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_ssid_obj, 1, 2, wlan_ssid); - -STATIC mp_obj_t wlan_auth(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - if (self->auth == SL_SEC_TYPE_OPEN) { - return mp_const_none; - } else { - mp_obj_t security[2]; - security[0] = mp_obj_new_int(self->auth); - security[1] = mp_obj_new_str((const char *)self->key, strlen((const char *)self->key), false); - return mp_obj_new_tuple(2, security); - } - } else { - // get the auth config - uint8_t auth = SL_SEC_TYPE_OPEN; - size_t key_len = 0; - const char *key = NULL; - if (args[1] != mp_const_none) { - mp_obj_t *sec; - mp_obj_get_array_fixed_n(args[1], 2, &sec); - auth = mp_obj_get_int(sec[0]); - key = mp_obj_str_get_data(sec[1], &key_len); - wlan_validate_security(auth, key, key_len); - } - wlan_set_security(auth, key, key_len); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_auth_obj, 1, 2, wlan_auth); - -STATIC mp_obj_t wlan_channel(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->channel); - } else { - uint8_t channel = mp_obj_get_int(args[1]); - wlan_validate_channel(channel); - wlan_set_channel(channel); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_channel_obj, 1, 2, wlan_channel); - -STATIC mp_obj_t wlan_antenna(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->antenna); - } else { - #if MICROPY_HW_ANTENNA_DIVERSITY - uint8_t antenna = mp_obj_get_int(args[1]); - wlan_validate_antenna(antenna); - wlan_set_antenna(antenna); - #endif - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_antenna_obj, 1, 2, wlan_antenna); - -STATIC mp_obj_t wlan_mac(size_t n_args, const mp_obj_t *args) { - wlan_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_bytes((const byte *)self->mac, SL_BSSID_LENGTH); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != 6) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - memcpy(self->mac, bufinfo.buf, SL_MAC_ADDR_LEN); - sl_NetCfgSet(SL_MAC_ADDRESS_SET, 1, SL_MAC_ADDR_LEN, (_u8 *)self->mac); - wlan_reset(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_mac_obj, 1, 2, wlan_mac); - -STATIC mp_obj_t wlan_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - - wlan_obj_t *self = pos_args[0]; - - // check the trigger, only one type is supported - if (mp_obj_get_int(args[0].u_obj) != MODWLAN_WIFI_EVENT_ANY) { - goto invalid_args; - } - - // check the power mode - if (mp_obj_get_int(args[3].u_obj) != PYB_PWR_MODE_LPDS) { - goto invalid_args; - } - - // create the callback - mp_obj_t _irq = mp_irq_new (self, args[2].u_obj, &wlan_irq_methods); - self->irq_obj = _irq; - - // enable the irq just before leaving - wlan_lpds_irq_enable(self); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wlan_irq_obj, 1, wlan_irq); - -//STATIC mp_obj_t wlan_connections (mp_obj_t self_in) { -// mp_obj_t device[2]; -// mp_obj_t connections = mp_obj_new_list(0, NULL); -// -// if (wlan_is_connected()) { -// device[0] = mp_obj_new_str((const char *)wlan_obj.ssid_o, strlen((const char *)wlan_obj.ssid_o), false); -// device[1] = mp_obj_new_bytes((const byte *)wlan_obj.bssid, SL_BSSID_LENGTH); -// // add the device to the list -// mp_obj_list_append(connections, mp_obj_new_tuple(MP_ARRAY_SIZE(device), device)); -// } -// return connections; -//} -//STATIC MP_DEFINE_CONST_FUN_OBJ_1(wlan_connections_obj, wlan_connections); - -//STATIC mp_obj_t wlan_urn (uint n_args, const mp_obj_t *args) { -// char urn[MAX_DEVICE_URN_LEN]; -// uint8_t len = MAX_DEVICE_URN_LEN; -// -// // an URN is given, so set it -// if (n_args == 2) { -// const char *p = mp_obj_str_get_str(args[1]); -// uint8_t len = strlen(p); -// -// // the call to sl_NetAppSet corrupts the input string URN=args[1], so we copy into a local buffer -// if (len > MAX_DEVICE_URN_LEN) { -// mp_raise_ValueError(mpexception_value_invalid_arguments); -// } -// strcpy(urn, p); -// -// if (sl_NetAppSet(SL_NET_APP_DEVICE_CONFIG_ID, NETAPP_SET_GET_DEV_CONF_OPT_DEVICE_URN, len, (unsigned char *)urn) < 0) { -// mp_raise_OSError(MP_EIO); -// } -// } -// else { -// // get the URN -// if (sl_NetAppGet(SL_NET_APP_DEVICE_CONFIG_ID, NETAPP_SET_GET_DEV_CONF_OPT_DEVICE_URN, &len, (uint8_t *)urn) < 0) { -// mp_raise_OSError(MP_EIO); -// } -// return mp_obj_new_str(urn, (len - 1), false); -// } -// -// return mp_const_none; -//} -//STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wlan_urn_obj, 1, 2, wlan_urn); - -STATIC mp_obj_t wlan_print_ver(void) { - SlVersionFull ver; - byte config_opt = SL_DEVICE_GENERAL_VERSION; - byte config_len = sizeof(ver); - sl_DevGet(SL_DEVICE_GENERAL_CONFIGURATION, &config_opt, &config_len, (byte*)&ver); - printf("NWP: %d.%d.%d.%d\n", (int)ver.NwpVersion[0], (int)ver.NwpVersion[1], (int)ver.NwpVersion[2], (int)ver.NwpVersion[3]); - printf("MAC: %d.%d.%d.%d\n", (int)ver.ChipFwAndPhyVersion.FwVersion[0], (int)ver.ChipFwAndPhyVersion.FwVersion[1], - (int)ver.ChipFwAndPhyVersion.FwVersion[2], (int)ver.ChipFwAndPhyVersion.FwVersion[3]); - printf("PHY: %d.%d.%d.%d\n", ver.ChipFwAndPhyVersion.PhyVersion[0], ver.ChipFwAndPhyVersion.PhyVersion[1], - ver.ChipFwAndPhyVersion.PhyVersion[2], ver.ChipFwAndPhyVersion.PhyVersion[3]); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(wlan_print_ver_fun_obj, wlan_print_ver); -STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(wlan_print_ver_obj, MP_ROM_PTR(&wlan_print_ver_fun_obj)); - -STATIC const mp_rom_map_elem_t wlan_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&wlan_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&wlan_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wlan_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&wlan_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&wlan_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wlan_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&wlan_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_ssid), MP_ROM_PTR(&wlan_ssid_obj) }, - { MP_ROM_QSTR(MP_QSTR_auth), MP_ROM_PTR(&wlan_auth_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&wlan_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_antenna), MP_ROM_PTR(&wlan_antenna_obj) }, - { MP_ROM_QSTR(MP_QSTR_mac), MP_ROM_PTR(&wlan_mac_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&wlan_irq_obj) }, - //{ MP_ROM_QSTR(MP_QSTR_connections), MP_ROM_PTR(&wlan_connections_obj) }, - //{ MP_ROM_QSTR(MP_QSTR_urn), MP_ROM_PTR(&wlan_urn_obj) }, - { MP_ROM_QSTR(MP_QSTR_print_ver), MP_ROM_PTR(&wlan_print_ver_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_STA), MP_ROM_INT(ROLE_STA) }, - { MP_ROM_QSTR(MP_QSTR_AP), MP_ROM_INT(ROLE_AP) }, - { MP_ROM_QSTR(MP_QSTR_WEP), MP_ROM_INT(SL_SEC_TYPE_WEP) }, - { MP_ROM_QSTR(MP_QSTR_WPA), MP_ROM_INT(SL_SEC_TYPE_WPA_WPA2) }, - { MP_ROM_QSTR(MP_QSTR_WPA2), MP_ROM_INT(SL_SEC_TYPE_WPA_WPA2) }, - #if MICROPY_HW_ANTENNA_DIVERSITY - { MP_ROM_QSTR(MP_QSTR_INT_ANT), MP_ROM_INT(ANTENNA_TYPE_INTERNAL) }, - { MP_ROM_QSTR(MP_QSTR_EXT_ANT), MP_ROM_INT(ANTENNA_TYPE_EXTERNAL) }, - #endif - { MP_ROM_QSTR(MP_QSTR_ANY_EVENT), MP_ROM_INT(MODWLAN_WIFI_EVENT_ANY) }, -}; -STATIC MP_DEFINE_CONST_DICT(wlan_locals_dict, wlan_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_wlan = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_WLAN, - .make_new = wlan_make_new, - .locals_dict = (mp_obj_t)&wlan_locals_dict, - }, -}; - -STATIC const mp_irq_methods_t wlan_irq_methods = { - .init = wlan_irq, - .enable = wlan_lpds_irq_enable, - .disable = wlan_lpds_irq_disable, - .flags = wlan_irq_flags, -}; diff --git a/ports/cc3200/mods/modwlan.h b/ports/cc3200/mods/modwlan.h deleted file mode 100644 index b806644f55e93..0000000000000 --- a/ports/cc3200/mods/modwlan.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H -#define MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SIMPLELINK_SPAWN_TASK_PRIORITY 3 -#define SIMPLELINK_TASK_STACK_SIZE 2048 -#define SL_STOP_TIMEOUT 35 -#define SL_STOP_TIMEOUT_LONG 575 - -#define MODWLAN_WIFI_EVENT_ANY 0x01 - -#define MODWLAN_SSID_LEN_MAX 32 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef enum { - MODWLAN_OK = 0, - MODWLAN_ERROR_INVALID_PARAMS = -1, - MODWLAN_ERROR_TIMEOUT = -2, - MODWLAN_ERROR_UNKNOWN = -3, -} modwlan_Status_t; - -typedef struct _wlan_obj_t { - mp_obj_base_t base; - mp_obj_t irq_obj; - uint32_t status; - - uint32_t ip; - - int8_t mode; - uint8_t auth; - uint8_t channel; - uint8_t antenna; - - // my own ssid, key and mac - uint8_t ssid[(MODWLAN_SSID_LEN_MAX + 1)]; - uint8_t key[65]; - uint8_t mac[SL_MAC_ADDR_LEN]; - - // the sssid (or name) and mac of the other device - uint8_t ssid_o[33]; - uint8_t bssid[6]; - uint8_t irq_flags; - bool irq_enabled; - -#if (MICROPY_PORT_HAS_TELNET || MICROPY_PORT_HAS_FTP) - bool servers_enabled; -#endif -} wlan_obj_t; - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -extern _SlLockObj_t wlan_LockObj; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void wlan_pre_init (void); -extern void wlan_sl_init (int8_t mode, const char *ssid, uint8_t ssid_len, uint8_t auth, const char *key, uint8_t key_len, - uint8_t channel, uint8_t antenna, bool add_mac); -extern void wlan_first_start (void); -extern void wlan_update(void); -extern void wlan_stop (uint32_t timeout); -extern void wlan_get_mac (uint8_t *macAddress); -extern void wlan_get_ip (uint32_t *ip); -extern bool wlan_is_connected (void); -extern void wlan_set_current_time (uint32_t seconds_since_2000); -extern void wlan_off_on (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_MODWLAN_H diff --git a/ports/cc3200/mods/pybadc.c b/ports/cc3200/mods/pybadc.c deleted file mode 100644 index c73b8c149aad5..0000000000000 --- a/ports/cc3200/mods/pybadc.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/binary.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_adc.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "interrupt.h" -#include "pin.h" -#include "gpio.h" -#include "prcm.h" -#include "adc.h" -#include "pybadc.h" -#include "pybpin.h" -#include "pybsleep.h" -#include "pins.h" -#include "mpexception.h" - - -/****************************************************************************** - DECLARE CONSTANTS - ******************************************************************************/ -#define PYB_ADC_NUM_CHANNELS 4 - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - bool enabled; -} pyb_adc_obj_t; - -typedef struct { - mp_obj_base_t base; - pin_obj_t *pin; - byte channel; - byte id; - bool enabled; -} pyb_adc_channel_obj_t; - - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_adc_channel_obj_t pyb_adc_channel_obj[PYB_ADC_NUM_CHANNELS] = { {.pin = &pin_GP2, .channel = ADC_CH_0, .id = 0, .enabled = false}, - {.pin = &pin_GP3, .channel = ADC_CH_1, .id = 1, .enabled = false}, - {.pin = &pin_GP4, .channel = ADC_CH_2, .id = 2, .enabled = false}, - {.pin = &pin_GP5, .channel = ADC_CH_3, .id = 3, .enabled = false} }; -STATIC pyb_adc_obj_t pyb_adc_obj = {.enabled = false}; - -STATIC const mp_obj_type_t pyb_adc_channel_type; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC mp_obj_t adc_channel_deinit(mp_obj_t self_in); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -STATIC void pyb_adc_init (pyb_adc_obj_t *self) { - // enable and configure the timer - MAP_ADCTimerConfig(ADC_BASE, (1 << 17) - 1); - MAP_ADCTimerEnable(ADC_BASE); - // enable the ADC peripheral - MAP_ADCEnable(ADC_BASE); - self->enabled = true; -} - -STATIC void pyb_adc_check_init(void) { - // not initialized - if (!pyb_adc_obj.enabled) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC void pyb_adc_channel_init (pyb_adc_channel_obj_t *self) { - // the ADC block must be enabled first - pyb_adc_check_init(); - // configure the pin in analog mode - pin_config (self->pin, -1, PIN_TYPE_ANALOG, PIN_TYPE_STD, -1, PIN_STRENGTH_2MA); - // enable the ADC channel - MAP_ADCChannelEnable(ADC_BASE, self->channel); - self->enabled = true; -} - -STATIC void pyb_adc_deinit_all_channels (void) { - for (int i = 0; i < PYB_ADC_NUM_CHANNELS; i++) { - adc_channel_deinit(&pyb_adc_channel_obj[i]); - } -} - -/******************************************************************************/ -/* MicroPython bindings : adc object */ - -STATIC void adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_adc_obj_t *self = self_in; - if (self->enabled) { - mp_printf(print, "ADC(0, bits=12)"); - } else { - mp_printf(print, "ADC(0)"); - } -} - -STATIC const mp_arg_t pyb_adc_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 12} }, -}; -STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_adc_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // check the number of bits - if (args[1].u_int != 12) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - // setup the object - pyb_adc_obj_t *self = &pyb_adc_obj; - self->base.type = &pyb_adc_type; - - // initialize and register with the sleep module - pyb_adc_init(self); - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_adc_init); - return self; -} - -STATIC mp_obj_t adc_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_adc_init_args[1], args); - // check the number of bits - if (args[0].u_int != 12) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - pyb_adc_init(pos_args[0]); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(adc_init_obj, 1, adc_init); - -STATIC mp_obj_t adc_deinit(mp_obj_t self_in) { - pyb_adc_obj_t *self = self_in; - // first deinit all channels - pyb_adc_deinit_all_channels(); - MAP_ADCDisable(ADC_BASE); - self->enabled = false; - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_deinit_obj, adc_deinit); - -STATIC mp_obj_t adc_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_adc_channel_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_adc_channel_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_adc_channel_args, args); - - uint ch_id; - if (args[0].u_obj != MP_OBJ_NULL) { - ch_id = mp_obj_get_int(args[0].u_obj); - if (ch_id >= PYB_ADC_NUM_CHANNELS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } else if (args[1].u_obj != mp_const_none) { - uint pin_ch_id = pin_find_peripheral_type (args[1].u_obj, PIN_FN_ADC, 0); - if (ch_id != pin_ch_id) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - } - } else { - ch_id = pin_find_peripheral_type (args[1].u_obj, PIN_FN_ADC, 0); - } - - // setup the object - pyb_adc_channel_obj_t *self = &pyb_adc_channel_obj[ch_id]; - self->base.type = &pyb_adc_channel_type; - pyb_adc_channel_init (self); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_adc_channel_init); - return self; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(adc_channel_obj, 1, adc_channel); - -STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&adc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&adc_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&adc_channel_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .print = adc_print, - .make_new = adc_make_new, - .locals_dict = (mp_obj_t)&adc_locals_dict, -}; - -STATIC void adc_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_adc_channel_obj_t *self = self_in; - if (self->enabled) { - mp_printf(print, "ADCChannel(%u, pin=%q)", self->id, self->pin->name); - } else { - mp_printf(print, "ADCChannel(%u)", self->id); - } -} - -STATIC mp_obj_t adc_channel_init(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - // re-enable it - pyb_adc_channel_init(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_init_obj, adc_channel_init); - -STATIC mp_obj_t adc_channel_deinit(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - - MAP_ADCChannelDisable(ADC_BASE, self->channel); - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self); - self->enabled = false; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_deinit_obj, adc_channel_deinit); - -STATIC mp_obj_t adc_channel_value(mp_obj_t self_in) { - pyb_adc_channel_obj_t *self = self_in; - uint32_t value; - - // the channel must be enabled - if (!self->enabled) { - mp_raise_OSError(MP_EPERM); - } - - // wait until a new value is available - while (!MAP_ADCFIFOLvlGet(ADC_BASE, self->channel)); - // read the sample - value = MAP_ADCFIFORead(ADC_BASE, self->channel); - // the 12 bit sampled value is stored in bits [13:2] - return MP_OBJ_NEW_SMALL_INT((value & 0x3FFF) >> 2); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_channel_value_obj, adc_channel_value); - -STATIC mp_obj_t adc_channel_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return adc_channel_value (self_in); -} - -STATIC const mp_rom_map_elem_t adc_channel_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&adc_channel_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&adc_channel_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&adc_channel_value_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_channel_locals_dict, adc_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_adc_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_ADCChannel, - .print = adc_channel_print, - .call = adc_channel_call, - .locals_dict = (mp_obj_t)&adc_channel_locals_dict, -}; diff --git a/ports/cc3200/mods/pybadc.h b/ports/cc3200/mods/pybadc.h deleted file mode 100644 index db04b006bc20a..0000000000000 --- a/ports/cc3200/mods/pybadc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBADC_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBADC_H - -extern const mp_obj_type_t pyb_adc_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBADC_H diff --git a/ports/cc3200/mods/pybflash.c b/ports/cc3200/mods/pybflash.c deleted file mode 100644 index 51f4cb5172784..0000000000000 --- a/ports/cc3200/mods/pybflash.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//#include -//#include - -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs_fat.h" - -#include "fatfs/src/drivers/sflash_diskio.h" -#include "mods/pybflash.h" - -/******************************************************************************/ -// MicroPython bindings to expose the internal flash as an object with the -// block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t pyb_flash_obj = {&pyb_flash_type}; - -STATIC mp_obj_t pyb_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_flash_obj; -} - -STATIC mp_obj_t pyb_flash_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - DRESULT res = sflash_disk_read(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SFLASH_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_readblocks_obj, pyb_flash_readblocks); - -STATIC mp_obj_t pyb_flash_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - DRESULT res = sflash_disk_write(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SFLASH_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_writeblocks_obj, pyb_flash_writeblocks); - -STATIC mp_obj_t pyb_flash_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: return MP_OBJ_NEW_SMALL_INT(sflash_disk_init() != RES_OK); - case BP_IOCTL_DEINIT: sflash_disk_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SYNC: sflash_disk_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(SFLASH_SECTOR_COUNT); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(SFLASH_SECTOR_SIZE); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_ioctl_obj, pyb_flash_ioctl); - -STATIC const mp_rom_map_elem_t pyb_flash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_flash_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_flash_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_flash_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_flash_locals_dict, pyb_flash_locals_dict_table); - -const mp_obj_type_t pyb_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_Flash, - .make_new = pyb_flash_make_new, - .locals_dict = (mp_obj_t)&pyb_flash_locals_dict, -}; - -void pyb_flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->readblocks[0] = (mp_obj_t)&pyb_flash_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->readblocks[2] = (mp_obj_t)sflash_disk_read; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_flash_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)sflash_disk_write; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_flash_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_flash_obj; -} diff --git a/ports/cc3200/mods/pybflash.h b/ports/cc3200/mods/pybflash.h deleted file mode 100644 index 6f8ddf291887a..0000000000000 --- a/ports/cc3200/mods/pybflash.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H - -#include "py/obj.h" - -extern const mp_obj_type_t pyb_flash_type; - -void pyb_flash_init_vfs(fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBFLASH_H diff --git a/ports/cc3200/mods/pybi2c.c b/ports/cc3200/mods/pybi2c.c deleted file mode 100644 index d08627fa4986e..0000000000000 --- a/ports/cc3200/mods/pybi2c.c +++ /dev/null @@ -1,531 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_i2c.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "i2c.h" -#include "pybi2c.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "utils.h" -#include "pybpin.h" -#include "pins.h" - -/// \moduleref pyb -/// \class I2C - a two-wire serial protocol - -typedef struct _pyb_i2c_obj_t { - mp_obj_base_t base; - uint baudrate; -} pyb_i2c_obj_t; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYBI2C_MIN_BAUD_RATE_HZ (50000) -#define PYBI2C_MAX_BAUD_RATE_HZ (400000) - -#define PYBI2C_TRANSC_TIMEOUT_MS (20) -#define PYBI2C_TRANSAC_WAIT_DELAY_US (10) - -#define PYBI2C_TIMEOUT_TO_COUNT(to_us, baud) (((baud) * to_us) / 16000000) - -#define RET_IF_ERR(Func) { \ - if (!Func) { \ - return false; \ - } \ - } - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_i2c_obj_t pyb_i2c_obj = {.baudrate = 0}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC bool pyb_i2c_write(byte addr, byte *data, uint len, bool stop); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// only master mode is available for the moment -STATIC void i2c_init (pyb_i2c_obj_t *self) { - // Enable the I2C Peripheral - MAP_PRCMPeripheralClkEnable(PRCM_I2CA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_I2CA0); - // Configure I2C module with the specified baudrate - MAP_I2CMasterInitExpClk(I2CA0_BASE, self->baudrate); -} - -STATIC bool pyb_i2c_transaction(uint cmd) { - // Convert the timeout to microseconds - int32_t timeout = PYBI2C_TRANSC_TIMEOUT_MS * 1000; - // Sanity check, t_timeout must be between 1 and 255 - uint t_timeout = MIN(PYBI2C_TIMEOUT_TO_COUNT(timeout, pyb_i2c_obj.baudrate), 255); - // Clear all interrupts - MAP_I2CMasterIntClearEx(I2CA0_BASE, MAP_I2CMasterIntStatusEx(I2CA0_BASE, false)); - // Set the time-out in terms of clock cycles. Not to be used with breakpoints. - MAP_I2CMasterTimeoutSet(I2CA0_BASE, t_timeout); - // Initiate the transfer. - MAP_I2CMasterControl(I2CA0_BASE, cmd); - // Wait until the current byte has been transferred. - // Poll on the raw interrupt status. - while ((MAP_I2CMasterIntStatusEx(I2CA0_BASE, false) & (I2C_MASTER_INT_DATA | I2C_MASTER_INT_TIMEOUT)) == 0) { - if (timeout < 0) { - // the peripheral is not responding, so stop - return false; - } - // wait for a few microseconds - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBI2C_TRANSAC_WAIT_DELAY_US)); - timeout -= PYBI2C_TRANSAC_WAIT_DELAY_US; - } - - // Check for any errors in the transfer - if (MAP_I2CMasterErr(I2CA0_BASE) != I2C_MASTER_ERR_NONE) { - switch(cmd) { - case I2C_MASTER_CMD_BURST_SEND_START: - case I2C_MASTER_CMD_BURST_SEND_CONT: - case I2C_MASTER_CMD_BURST_SEND_STOP: - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP); - break; - case I2C_MASTER_CMD_BURST_RECEIVE_START: - case I2C_MASTER_CMD_BURST_RECEIVE_CONT: - case I2C_MASTER_CMD_BURST_RECEIVE_FINISH: - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP); - break; - default: - break; - } - return false; - } - return true; -} - -STATIC void pyb_i2c_check_init(pyb_i2c_obj_t *self) { - // not initialized - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC bool pyb_i2c_scan_device(byte devAddr) { - bool ret = false; - // Set the I2C slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, devAddr, true); - // Initiate the transfer. - if (pyb_i2c_transaction(I2C_MASTER_CMD_SINGLE_RECEIVE)) { - ret = true; - } - // Send the stop bit to cancel the read transaction - MAP_I2CMasterControl(I2CA0_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP); - if (!ret) { - uint8_t data = 0; - if (pyb_i2c_write(devAddr, &data, sizeof(data), true)) { - ret = true; - } - } - return ret; -} - -STATIC bool pyb_i2c_mem_addr_write (byte addr, byte *mem_addr, uint mem_addr_len) { - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, false); - // Write the first byte to the controller. - MAP_I2CMasterDataPut(I2CA0_BASE, *mem_addr++); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_START)); - - // Loop until the completion of transfer or error - while (--mem_addr_len) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *mem_addr++); - // Transact over I2C to send the next byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - return true; -} - -STATIC bool pyb_i2c_mem_write (byte addr, byte *mem_addr, uint mem_addr_len, byte *data, uint data_len) { - if (pyb_i2c_mem_addr_write (addr, mem_addr, mem_addr_len)) { - // Loop until the completion of transfer or error - while (data_len--) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Transact over I2C to send the byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - // send the stop bit - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_STOP)); - return true; - } - return false; -} - -STATIC bool pyb_i2c_write(byte addr, byte *data, uint len, bool stop) { - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, false); - // Write the first byte to the controller. - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_START)); - - // Loop until the completion of transfer or error - while (--len) { - // Write the next byte of data - MAP_I2CMasterDataPut(I2CA0_BASE, *data++); - // Transact over I2C to send the byte - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_CONT)); - } - - // If a stop bit is to be sent, do it. - if (stop) { - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_SEND_STOP)); - } - return true; -} - -STATIC bool pyb_i2c_read(byte addr, byte *data, uint len) { - // Initiate a burst or single receive sequence - uint cmd = --len > 0 ? I2C_MASTER_CMD_BURST_RECEIVE_START : I2C_MASTER_CMD_SINGLE_RECEIVE; - // Set I2C codec slave address - MAP_I2CMasterSlaveAddrSet(I2CA0_BASE, addr, true); - // Initiate the transfer. - RET_IF_ERR(pyb_i2c_transaction(cmd)); - // Loop until the completion of reception or error - while (len) { - // Receive the byte over I2C - *data++ = MAP_I2CMasterDataGet(I2CA0_BASE); - if (--len) { - // Continue with reception - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_RECEIVE_CONT)); - } else { - // Complete the last reception - RET_IF_ERR(pyb_i2c_transaction(I2C_MASTER_CMD_BURST_RECEIVE_FINISH)); - } - } - - // Receive the last byte over I2C - *data = MAP_I2CMasterDataGet(I2CA0_BASE); - return true; -} - -STATIC void pyb_i2c_read_into (mp_arg_val_t *args, vstr_t *vstr) { - pyb_i2c_check_init(&pyb_i2c_obj); - // get the buffer to receive into - pyb_buf_get_for_recv(args[1].u_obj, vstr); - - // receive the data - if (!pyb_i2c_read(args[0].u_int, (byte *)vstr->buf, vstr->len)) { - mp_raise_OSError(MP_EIO); - } -} - -STATIC void pyb_i2c_readmem_into (mp_arg_val_t *args, vstr_t *vstr) { - pyb_i2c_check_init(&pyb_i2c_obj); - // get the buffer to receive into - pyb_buf_get_for_recv(args[2].u_obj, vstr); - - // get the addresses - mp_uint_t i2c_addr = args[0].u_int; - mp_uint_t mem_addr = args[1].u_int; - // determine the width of mem_addr (1 or 2 bytes) - mp_uint_t mem_addr_size = args[3].u_int >> 3; - - // write the register address to be read from - if (pyb_i2c_mem_addr_write (i2c_addr, (byte *)&mem_addr, mem_addr_size)) { - // Read the specified length of data - if (!pyb_i2c_read (i2c_addr, (byte *)vstr->buf, vstr->len)) { - mp_raise_OSError(MP_EIO); - } - } else { - mp_raise_OSError(MP_EIO); - } -} - -/******************************************************************************/ -/* MicroPython bindings */ -/******************************************************************************/ -STATIC void pyb_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_i2c_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "I2C(0, baudrate=%u)", self->baudrate); - } else { - mp_print_str(print, "I2C(0)"); - } -} - -STATIC mp_obj_t pyb_i2c_init_helper(pyb_i2c_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_scl, ARG_sda, ARG_freq }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 100000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // make sure the baudrate is between the valid range - self->baudrate = MIN(MAX(args[ARG_freq].u_int, PYBI2C_MIN_BAUD_RATE_HZ), PYBI2C_MAX_BAUD_RATE_HZ); - - // assign the pins - mp_obj_t pins[2] = {&pin_GP13, &pin_GP23}; // default (SDA, SCL) pins - if (args[ARG_scl].u_obj != MP_OBJ_NULL) { - pins[1] = args[ARG_scl].u_obj; - } - if (args[ARG_sda].u_obj != MP_OBJ_NULL) { - pins[0] = args[ARG_sda].u_obj; - } - pin_assign_pins_af(pins, 2, PIN_TYPE_STD_PU, PIN_FN_I2C, 0); - - // init the I2C bus - i2c_init(self); - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)i2c_init); - - return mp_const_none; -} - -STATIC mp_obj_t pyb_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // check the id argument, if given - if (n_args > 0) { - if (all_args[0] != MP_OBJ_NEW_SMALL_INT(0)) { - mp_raise_OSError(MP_ENODEV); - } - --n_args; - ++all_args; - } - - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - - // setup the object - pyb_i2c_obj_t *self = &pyb_i2c_obj; - self->base.type = &pyb_i2c_type; - - // start the peripheral - pyb_i2c_init_helper(self, n_args, all_args, &kw_args); - - return (mp_obj_t)self; -} - -STATIC mp_obj_t pyb_i2c_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - return pyb_i2c_init_helper(pos_args[0], n_args - 1, pos_args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_init_obj, 1, pyb_i2c_init); - -STATIC mp_obj_t pyb_i2c_deinit(mp_obj_t self_in) { - // disable the peripheral - MAP_I2CMasterDisable(I2CA0_BASE); - MAP_PRCMPeripheralClkDisable(PRCM_I2CA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // invalidate the baudrate - pyb_i2c_obj.baudrate = 0; - // unregister it with the sleep module - pyb_sleep_remove ((const mp_obj_t)self_in); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_deinit_obj, pyb_i2c_deinit); - -STATIC mp_obj_t pyb_i2c_scan(mp_obj_t self_in) { - pyb_i2c_check_init(&pyb_i2c_obj); - mp_obj_t list = mp_obj_new_list(0, NULL); - for (uint addr = 0x08; addr <= 0x77; addr++) { - for (int i = 0; i < 3; i++) { - if (pyb_i2c_scan_device(addr)) { - mp_obj_list_append(list, mp_obj_new_int(addr)); - break; - } - } - } - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_scan_obj, pyb_i2c_scan); - -STATIC mp_obj_t pyb_i2c_readfrom(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_args, args); - - vstr_t vstr; - pyb_i2c_read_into(args, &vstr); - - // return the received data - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_obj, 3, pyb_i2c_readfrom); - -STATIC mp_obj_t pyb_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_into_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_into_args, args); - - vstr_t vstr; - pyb_i2c_read_into(args, &vstr); - - // return the number of bytes received - return mp_obj_new_int(vstr.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_into_obj, 1, pyb_i2c_readfrom_into); - -STATIC mp_obj_t pyb_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_writeto_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_writeto_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_writeto_args, args); - - pyb_i2c_check_init(&pyb_i2c_obj); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[1].u_obj, &bufinfo, data); - - // send the data - if (!pyb_i2c_write(args[0].u_int, bufinfo.buf, bufinfo.len, args[2].u_bool)) { - mp_raise_OSError(MP_EIO); - } - - // return the number of bytes written - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_writeto_obj, 1, pyb_i2c_writeto); - -STATIC mp_obj_t pyb_i2c_readfrom_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t pyb_i2c_readfrom_mem_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_mem_args, args); - - vstr_t vstr; - pyb_i2c_readmem_into (args, &vstr); - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_mem_obj, 1, pyb_i2c_readfrom_mem); - -STATIC const mp_arg_t pyb_i2c_readfrom_mem_into_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, -}; - -STATIC mp_obj_t pyb_i2c_readfrom_mem_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), pyb_i2c_readfrom_mem_into_args, args); - - // get the buffer to read into - vstr_t vstr; - pyb_i2c_readmem_into (args, &vstr); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_readfrom_mem_into_obj, 1, pyb_i2c_readfrom_mem_into); - -STATIC mp_obj_t pyb_i2c_writeto_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_readfrom_mem_into_args), pyb_i2c_readfrom_mem_into_args, args); - - pyb_i2c_check_init(&pyb_i2c_obj); - - // get the buffer to write from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[2].u_obj, &bufinfo, data); - - // get the addresses - mp_uint_t i2c_addr = args[0].u_int; - mp_uint_t mem_addr = args[1].u_int; - // determine the width of mem_addr (1 or 2 bytes) - mp_uint_t mem_addr_size = args[3].u_int >> 3; - - // write the register address to write to. - if (pyb_i2c_mem_write (i2c_addr, (byte *)&mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len)) { - return mp_const_none; - } - - mp_raise_OSError(MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_writeto_mem_obj, 1, pyb_i2c_writeto_mem); - -STATIC const mp_rom_map_elem_t pyb_i2c_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_i2c_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_i2c_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&pyb_i2c_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom), MP_ROM_PTR(&pyb_i2c_readfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_into), MP_ROM_PTR(&pyb_i2c_readfrom_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto), MP_ROM_PTR(&pyb_i2c_writeto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_mem), MP_ROM_PTR(&pyb_i2c_readfrom_mem_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_mem_into), MP_ROM_PTR(&pyb_i2c_readfrom_mem_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto_mem), MP_ROM_PTR(&pyb_i2c_writeto_mem_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_i2c_locals_dict, pyb_i2c_locals_dict_table); - -const mp_obj_type_t pyb_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = pyb_i2c_print, - .make_new = pyb_i2c_make_new, - .locals_dict = (mp_obj_t)&pyb_i2c_locals_dict, -}; diff --git a/ports/cc3200/mods/pybi2c.h b/ports/cc3200/mods/pybi2c.h deleted file mode 100644 index dcc3f0468cead..0000000000000 --- a/ports/cc3200/mods/pybi2c.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H - -extern const mp_obj_type_t pyb_i2c_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBI2C_H diff --git a/ports/cc3200/mods/pybpin.c b/ports/cc3200/mods/pybpin.c deleted file mode 100644 index c877433e92e13..0000000000000 --- a/ports/cc3200/mods/pybpin.c +++ /dev/null @@ -1,962 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "interrupt.h" -#include "pybpin.h" -#include "mpirq.h" -#include "pins.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "mperror.h" - - -/// \moduleref pyb -/// \class Pin - control I/O pins -/// -/****************************************************************************** -DECLARE PRIVATE FUNCTIONS -******************************************************************************/ -STATIC pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name); -STATIC pin_obj_t *pin_find_pin_by_port_bit (const mp_obj_dict_t *named_pins, uint port, uint bit); -STATIC int8_t pin_obj_find_af (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type); -STATIC void pin_free_af_from_pins (uint8_t fn, uint8_t unit, uint8_t type); -STATIC void pin_deassign (pin_obj_t* pin); -STATIC void pin_obj_configure (const pin_obj_t *self); -STATIC void pin_get_hibernate_pin_and_idx (const pin_obj_t *self, uint *wake_pin, uint *idx); -STATIC void pin_irq_enable (mp_obj_t self_in); -STATIC void pin_irq_disable (mp_obj_t self_in); -STATIC void pin_extint_register(pin_obj_t *self, uint32_t intmode, uint32_t priority); -STATIC void pin_validate_mode (uint mode); -STATIC void pin_validate_pull (uint pull); -STATIC void pin_validate_drive (uint strength); -STATIC void pin_validate_af(const pin_obj_t* pin, int8_t idx, uint8_t *fn, uint8_t *unit, uint8_t *type); -STATIC uint8_t pin_get_value(const pin_obj_t* self); -STATIC void GPIOA0IntHandler (void); -STATIC void GPIOA1IntHandler (void); -STATIC void GPIOA2IntHandler (void); -STATIC void GPIOA3IntHandler (void); -STATIC void EXTI_Handler(uint port); - -/****************************************************************************** -DEFINE CONSTANTS -******************************************************************************/ -#define PYBPIN_NUM_WAKE_PINS (6) -#define PYBPIN_WAKES_NOT (-1) - -#define GPIO_DIR_MODE_ALT 0x00000002 // Pin is NOT controlled by the PGIO module -#define GPIO_DIR_MODE_ALT_OD 0x00000003 // Pin is NOT controlled by the PGIO module and is in open drain mode - -#define PYB_PIN_FALLING_EDGE 0x01 -#define PYB_PIN_RISING_EDGE 0x02 -#define PYB_PIN_LOW_LEVEL 0x04 -#define PYB_PIN_HIGH_LEVEL 0x08 - -/****************************************************************************** -DEFINE TYPES -******************************************************************************/ -typedef struct { - bool active; - int8_t lpds; - int8_t hib; -} pybpin_wake_pin_t; - -/****************************************************************************** -DECLARE PRIVATE DATA -******************************************************************************/ -STATIC const mp_irq_methods_t pin_irq_methods; -STATIC pybpin_wake_pin_t pybpin_wake_pin[PYBPIN_NUM_WAKE_PINS] = - { {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT}, - {.active = false, .lpds = PYBPIN_WAKES_NOT, .hib = PYBPIN_WAKES_NOT} } ; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void pin_init0(void) { -// this initalization also reconfigures the JTAG/SWD pins -#ifndef DEBUG - // assign all pins to the GPIO module so that peripherals can be connected to any - // pins without conflicts after a soft reset - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used - 1; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - pin_deassign (pin); - } -#endif -} - -// C API used to convert a user-supplied pin name into an ordinal pin number. -pin_obj_t *pin_find(mp_obj_t user_obj) { - pin_obj_t *pin_obj; - - // if a pin was provided, use it - if (MP_OBJ_IS_TYPE(user_obj, &pin_type)) { - pin_obj = user_obj; - return pin_obj; - } - - // otherwise see if the pin name matches a cpu pin - pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj); - if (pin_obj) { - return pin_obj; - } - - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -void pin_config (pin_obj_t *self, int af, uint mode, uint pull, int value, uint strength) { - self->mode = mode, self->pull = pull, self->strength = strength; - // if af is -1, then we want to keep it as it is - if (af != -1) { - self->af = af; - } - - // if value is -1, then we want to keep it as it is - if (value != -1) { - self->value = value; - } - - // mark the pin as used - self->used = true; - pin_obj_configure ((const pin_obj_t *)self); - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pin_obj_configure); -} - -void pin_assign_pins_af (mp_obj_t *pins, uint32_t n_pins, uint32_t pull, uint32_t fn, uint32_t unit) { - for (int i = 0; i < n_pins; i++) { - pin_free_af_from_pins(fn, unit, i); - if (pins[i] != mp_const_none) { - pin_obj_t *pin = pin_find(pins[i]); - pin_config (pin, pin_find_af_index(pin, fn, unit, i), 0, pull, -1, PIN_STRENGTH_2MA); - } - } -} - -uint8_t pin_find_peripheral_unit (const mp_obj_t pin, uint8_t fn, uint8_t type) { - pin_obj_t *pin_o = pin_find(pin); - for (int i = 0; i < pin_o->num_afs; i++) { - if (pin_o->af_list[i].fn == fn && pin_o->af_list[i].type == type) { - return pin_o->af_list[i].unit; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -uint8_t pin_find_peripheral_type (const mp_obj_t pin, uint8_t fn, uint8_t unit) { - pin_obj_t *pin_o = pin_find(pin); - for (int i = 0; i < pin_o->num_afs; i++) { - if (pin_o->af_list[i].fn == fn && pin_o->af_list[i].unit == unit) { - return pin_o->af_list[i].type; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -int8_t pin_find_af_index (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type) { - int8_t af = pin_obj_find_af(pin, fn, unit, type); - if (af < 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - return af; -} - -/****************************************************************************** -DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP); - if (named_elem != NULL && named_elem->value != NULL) { - return named_elem->value; - } - return NULL; -} - -STATIC pin_obj_t *pin_find_pin_by_port_bit (const mp_obj_dict_t *named_pins, uint port, uint bit) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - for (uint i = 0; i < named_map->used; i++) { - if ((((pin_obj_t *)named_map->table[i].value)->port == port) && - (((pin_obj_t *)named_map->table[i].value)->bit == bit)) { - return named_map->table[i].value; - } - } - return NULL; -} - -STATIC int8_t pin_obj_find_af (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type) { - for (int i = 0; i < pin->num_afs; i++) { - if (pin->af_list[i].fn == fn && pin->af_list[i].unit == unit && pin->af_list[i].type == type) { - return pin->af_list[i].idx; - } - } - return -1; -} - -STATIC void pin_free_af_from_pins (uint8_t fn, uint8_t unit, uint8_t type) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used - 1; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - // af is different than GPIO - if (pin->af > PIN_MODE_0) { - // check if the pin supports the target af - int af = pin_obj_find_af(pin, fn, unit, type); - if (af > 0 && af == pin->af) { - // the pin supports the target af, de-assign it - pin_deassign (pin); - } - } - } -} - -STATIC void pin_deassign (pin_obj_t* pin) { - pin_config (pin, PIN_MODE_0, GPIO_DIR_MODE_IN, PIN_TYPE_STD, -1, PIN_STRENGTH_4MA); - pin->used = false; -} - -STATIC void pin_obj_configure (const pin_obj_t *self) { - uint32_t type; - if (self->mode == PIN_TYPE_ANALOG) { - type = PIN_TYPE_ANALOG; - } else { - type = self->pull; - uint32_t direction = self->mode; - if (direction == PIN_TYPE_OD || direction == GPIO_DIR_MODE_ALT_OD) { - direction = GPIO_DIR_MODE_OUT; - type |= PIN_TYPE_OD; - } - if (self->mode != GPIO_DIR_MODE_ALT && self->mode != GPIO_DIR_MODE_ALT_OD) { - // enable the peripheral clock for the GPIO port of this pin - switch (self->port) { - case PORT_A0: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA0, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A1: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A2: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA2, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - case PORT_A3: - MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - break; - default: - break; - } - // configure the direction - MAP_GPIODirModeSet(self->port, self->bit, direction); - // set the pin value - if (self->value) { - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - } - // now set the alternate function - MAP_PinModeSet (self->pin_num, self->af); - } - MAP_PinConfigSet(self->pin_num, self->strength, type); -} - -STATIC void pin_get_hibernate_pin_and_idx (const pin_obj_t *self, uint *hib_pin, uint *idx) { - // pin_num is actually : (package_pin - 1) - switch (self->pin_num) { - case 56: // GP2 - *hib_pin = PRCM_HIB_GPIO2; - *idx = 0; - break; - case 58: // GP4 - *hib_pin = PRCM_HIB_GPIO4; - *idx = 1; - break; - case 3: // GP13 - *hib_pin = PRCM_HIB_GPIO13; - *idx = 2; - break; - case 7: // GP17 - *hib_pin = PRCM_HIB_GPIO17; - *idx = 3; - break; - case 1: // GP11 - *hib_pin = PRCM_HIB_GPIO11; - *idx = 4; - break; - case 16: // GP24 - *hib_pin = PRCM_HIB_GPIO24; - *idx = 5; - break; - default: - *idx = 0xFF; - break; - } -} - -STATIC void pin_irq_enable (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - uint hib_pin, idx; - - pin_get_hibernate_pin_and_idx (self, &hib_pin, &idx); - if (idx < PYBPIN_NUM_WAKE_PINS) { - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - // enable GPIO as a wake source during LPDS - MAP_PRCMLPDSWakeUpGPIOSelect(idx, pybpin_wake_pin[idx].lpds); - MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_GPIO); - } - - if (pybpin_wake_pin[idx].hib != PYBPIN_WAKES_NOT) { - // enable GPIO as a wake source during hibernate - MAP_PRCMHibernateWakeUpGPIOSelect(hib_pin, pybpin_wake_pin[idx].hib); - MAP_PRCMHibernateWakeupSourceEnable(hib_pin); - } - else { - MAP_PRCMHibernateWakeupSourceDisable(hib_pin); - } - } - // if idx is invalid, the pin supports active interrupts for sure - if (idx >= PYBPIN_NUM_WAKE_PINS || pybpin_wake_pin[idx].active) { - MAP_GPIOIntClear(self->port, self->bit); - MAP_GPIOIntEnable(self->port, self->bit); - } - // in case it was enabled before - else if (idx < PYBPIN_NUM_WAKE_PINS && !pybpin_wake_pin[idx].active) { - MAP_GPIOIntDisable(self->port, self->bit); - } -} - -STATIC void pin_irq_disable (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - uint hib_pin, idx; - - pin_get_hibernate_pin_and_idx (self, &hib_pin, &idx); - if (idx < PYBPIN_NUM_WAKE_PINS) { - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - // disable GPIO as a wake source during LPDS - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - } - if (pybpin_wake_pin[idx].hib != PYBPIN_WAKES_NOT) { - // disable GPIO as a wake source during hibernate - MAP_PRCMHibernateWakeupSourceDisable(hib_pin); - } - } - // not need to check for the active flag, it's safe to disable it anyway - MAP_GPIOIntDisable(self->port, self->bit); -} - -STATIC int pin_irq_flags (mp_obj_t self_in) { - const pin_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC void pin_extint_register(pin_obj_t *self, uint32_t intmode, uint32_t priority) { - void *handler; - uint32_t intnum; - - // configure the interrupt type - MAP_GPIOIntTypeSet(self->port, self->bit, intmode); - switch (self->port) { - case GPIOA0_BASE: - handler = GPIOA0IntHandler; - intnum = INT_GPIOA0; - break; - case GPIOA1_BASE: - handler = GPIOA1IntHandler; - intnum = INT_GPIOA1; - break; - case GPIOA2_BASE: - handler = GPIOA2IntHandler; - intnum = INT_GPIOA2; - break; - case GPIOA3_BASE: - default: - handler = GPIOA3IntHandler; - intnum = INT_GPIOA3; - break; - } - MAP_GPIOIntRegister(self->port, handler); - // set the interrupt to the lowest priority, to make sure that - // no other ISRs will be preemted by this one - MAP_IntPrioritySet(intnum, priority); -} - -STATIC void pin_validate_mode (uint mode) { - if (mode != GPIO_DIR_MODE_IN && mode != GPIO_DIR_MODE_OUT && mode != PIN_TYPE_OD && - mode != GPIO_DIR_MODE_ALT && mode != GPIO_DIR_MODE_ALT_OD) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} -STATIC void pin_validate_pull (uint pull) { - if (pull != PIN_TYPE_STD && pull != PIN_TYPE_STD_PU && pull != PIN_TYPE_STD_PD) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void pin_validate_drive(uint strength) { - if (strength != PIN_STRENGTH_2MA && strength != PIN_STRENGTH_4MA && strength != PIN_STRENGTH_6MA) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } -} - -STATIC void pin_validate_af(const pin_obj_t* pin, int8_t idx, uint8_t *fn, uint8_t *unit, uint8_t *type) { - for (int i = 0; i < pin->num_afs; i++) { - if (pin->af_list[i].idx == idx) { - *fn = pin->af_list[i].fn; - *unit = pin->af_list[i].unit; - *type = pin->af_list[i].type; - return; - } - } - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC uint8_t pin_get_value (const pin_obj_t* self) { - uint32_t value; - bool setdir = false; - if (self->mode == PIN_TYPE_OD || self->mode == GPIO_DIR_MODE_ALT_OD) { - setdir = true; - // configure the direction to IN for a moment in order to read the pin value - MAP_GPIODirModeSet(self->port, self->bit, GPIO_DIR_MODE_IN); - } - // now get the value - value = MAP_GPIOPinRead(self->port, self->bit); - if (setdir) { - // set the direction back to output - MAP_GPIODirModeSet(self->port, self->bit, GPIO_DIR_MODE_OUT); - if (self->value) { - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - } - // return it - return value ? 1 : 0; -} - -STATIC void GPIOA0IntHandler (void) { - EXTI_Handler(GPIOA0_BASE); -} - -STATIC void GPIOA1IntHandler (void) { - EXTI_Handler(GPIOA1_BASE); -} - -STATIC void GPIOA2IntHandler (void) { - EXTI_Handler(GPIOA2_BASE); -} - -STATIC void GPIOA3IntHandler (void) { - EXTI_Handler(GPIOA3_BASE); -} - -// common interrupt handler -STATIC void EXTI_Handler(uint port) { - uint32_t bits = MAP_GPIOIntStatus(port, true); - MAP_GPIOIntClear(port, bits); - - // might be that we have more than one pin interrupt pending - // therefore we must loop through all of the 8 possible bits - for (int i = 0; i < 8; i++) { - uint32_t bit = (1 << i); - if (bit & bits) { - pin_obj_t *self = (pin_obj_t *)pin_find_pin_by_port_bit(&pin_board_pins_locals_dict, port, bit); - if (self->irq_trigger == (PYB_PIN_FALLING_EDGE | PYB_PIN_RISING_EDGE)) { - // read the pin value (hoping that the pin level has remained stable) - self->irq_flags = MAP_GPIOPinRead(self->port, self->bit) ? PYB_PIN_RISING_EDGE : PYB_PIN_FALLING_EDGE; - } else { - // same as the triggers - self->irq_flags = self->irq_trigger; - } - mp_irq_handler(mp_irq_find(self)); - // always clear the flags after leaving the user handler - self->irq_flags = 0; - } - } -} - - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pin_init_args[] = { - { MP_QSTR_mode, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PIN_STRENGTH_4MA} }, - { MP_QSTR_alt, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, -}; -#define pin_INIT_NUM_ARGS MP_ARRAY_SIZE(pin_init_args) - -STATIC mp_obj_t pin_obj_init_helper(pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[pin_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, pos_args, kw_args, pin_INIT_NUM_ARGS, pin_init_args, args); - - // get the io mode - uint mode; - // default is input - if (args[0].u_obj == MP_OBJ_NULL) { - mode = GPIO_DIR_MODE_IN; - } else { - mode = mp_obj_get_int(args[0].u_obj); - pin_validate_mode (mode); - } - - // get the pull type - uint pull; - if (args[1].u_obj == mp_const_none) { - pull = PIN_TYPE_STD; - } else { - pull = mp_obj_get_int(args[1].u_obj); - pin_validate_pull (pull); - } - - // get the value - int value = -1; - if (args[2].u_obj != MP_OBJ_NULL) { - if (mp_obj_is_true(args[2].u_obj)) { - value = 1; - } else { - value = 0; - } - } - - // get the strenght - uint strength = args[3].u_int; - pin_validate_drive(strength); - - // get the alternate function - int af = args[4].u_int; - if (mode != GPIO_DIR_MODE_ALT && mode != GPIO_DIR_MODE_ALT_OD) { - if (af == -1) { - af = 0; - } else { - goto invalid_args; - } - } else if (af < -1 || af > 15) { - goto invalid_args; - } - - // check for a valid af and then free it from any other pins - if (af > PIN_MODE_0) { - uint8_t fn, unit, type; - pin_validate_af (self, af, &fn, &unit, &type); - pin_free_af_from_pins(fn, unit, type); - } - pin_config (self, af, mode, pull, value, strength); - - return mp_const_none; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_obj_t *self = self_in; - uint32_t pull = self->pull; - uint32_t drive = self->strength; - - // pin name - mp_printf(print, "Pin('%q'", self->name); - - // pin mode - qstr mode_qst; - uint32_t mode = self->mode; - if (mode == GPIO_DIR_MODE_IN) { - mode_qst = MP_QSTR_IN; - } else if (mode == GPIO_DIR_MODE_OUT) { - mode_qst = MP_QSTR_OUT; - } else if (mode == GPIO_DIR_MODE_ALT) { - mode_qst = MP_QSTR_ALT; - } else if (mode == GPIO_DIR_MODE_ALT_OD) { - mode_qst = MP_QSTR_ALT_OPEN_DRAIN; - } else { - mode_qst = MP_QSTR_OPEN_DRAIN; - } - mp_printf(print, ", mode=Pin.%q", mode_qst); - - // pin pull - qstr pull_qst; - if (pull == PIN_TYPE_STD) { - mp_printf(print, ", pull=%q", MP_QSTR_None); - } else { - if (pull == PIN_TYPE_STD_PU) { - pull_qst = MP_QSTR_PULL_UP; - } else { - pull_qst = MP_QSTR_PULL_DOWN; - } - mp_printf(print, ", pull=Pin.%q", pull_qst); - } - - // pin drive - qstr drv_qst; - if (drive == PIN_STRENGTH_2MA) { - drv_qst = MP_QSTR_LOW_POWER; - } else if (drive == PIN_STRENGTH_4MA) { - drv_qst = MP_QSTR_MED_POWER; - } else { - drv_qst = MP_QSTR_HIGH_POWER; - } - mp_printf(print, ", drive=Pin.%q", drv_qst); - - // pin af - int alt = (self->af == 0) ? -1 : self->af; - mp_printf(print, ", alt=%d)", alt); -} - -STATIC mp_obj_t pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // Run an argument through the mapper and return the result. - pin_obj_t *pin = (pin_obj_t *)pin_find(args[0]); - - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - - return (mp_obj_t)pin; -} - -STATIC mp_obj_t pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init); - -STATIC mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - // get the value - return MP_OBJ_NEW_SMALL_INT(pin_get_value(self)); - } else { - // set the pin value - if (mp_obj_is_true(args[1])) { - self->value = 1; - MAP_GPIOPinWrite(self->port, self->bit, self->bit); - } else { - self->value = 0; - MAP_GPIOPinWrite(self->port, self->bit, 0); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value); - -STATIC mp_obj_t pin_id(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_QSTR(self->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_id_obj, pin_id); - -STATIC mp_obj_t pin_mode(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->mode); - } else { - uint32_t mode = mp_obj_get_int(args[1]); - pin_validate_mode (mode); - self->mode = mode; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_mode_obj, 1, 2, pin_mode); - -STATIC mp_obj_t pin_pull(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - if (self->pull == PIN_TYPE_STD) { - return mp_const_none; - } - return mp_obj_new_int(self->pull); - } else { - uint32_t pull; - if (args[1] == mp_const_none) { - pull = PIN_TYPE_STD; - } else { - pull = mp_obj_get_int(args[1]); - pin_validate_pull (pull); - } - self->pull = pull; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_pull_obj, 1, 2, pin_pull); - -STATIC mp_obj_t pin_drive(size_t n_args, const mp_obj_t *args) { - pin_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(self->strength); - } else { - uint32_t strength = mp_obj_get_int(args[1]); - pin_validate_drive (strength); - self->strength = strength; - pin_obj_configure(self); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_drive_obj, 1, 2, pin_drive); - -STATIC mp_obj_t pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - mp_obj_t _args[2] = {self_in, *args}; - return pin_value (n_args + 1, _args); -} - -STATIC mp_obj_t pin_alt_list(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t af[2]; - mp_obj_t afs = mp_obj_new_list(0, NULL); - - for (int i = 0; i < self->num_afs; i++) { - af[0] = MP_OBJ_NEW_QSTR(self->af_list[i].name); - af[1] = mp_obj_new_int(self->af_list[i].idx); - mp_obj_list_append(afs, mp_obj_new_tuple(MP_ARRAY_SIZE(af), af)); - } - return afs; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_alt_list_obj, pin_alt_list); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pin_obj_t *self = pos_args[0]; - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // verify and translate the interrupt mode - uint mp_trigger = mp_obj_get_int(args[0].u_obj); - uint trigger; - if (mp_trigger == (PYB_PIN_FALLING_EDGE | PYB_PIN_RISING_EDGE)) { - trigger = GPIO_BOTH_EDGES; - } else { - switch (mp_trigger) { - case PYB_PIN_FALLING_EDGE: - trigger = GPIO_FALLING_EDGE; - break; - case PYB_PIN_RISING_EDGE: - trigger = GPIO_RISING_EDGE; - break; - case PYB_PIN_LOW_LEVEL: - trigger = GPIO_LOW_LEVEL; - break; - case PYB_PIN_HIGH_LEVEL: - trigger = GPIO_HIGH_LEVEL; - break; - default: - goto invalid_args; - } - } - - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode > (PYB_PWR_MODE_ACTIVE | PYB_PWR_MODE_LPDS | PYB_PWR_MODE_HIBERNATE)) { - goto invalid_args; - } - - // get the wake info from this pin - uint hib_pin, idx; - pin_get_hibernate_pin_and_idx ((const pin_obj_t *)self, &hib_pin, &idx); - if (pwrmode & PYB_PWR_MODE_LPDS) { - if (idx >= PYBPIN_NUM_WAKE_PINS) { - goto invalid_args; - } - // wake modes are different in LDPS - uint wake_mode; - switch (trigger) { - case GPIO_FALLING_EDGE: - wake_mode = PRCM_LPDS_FALL_EDGE; - break; - case GPIO_RISING_EDGE: - wake_mode = PRCM_LPDS_RISE_EDGE; - break; - case GPIO_LOW_LEVEL: - wake_mode = PRCM_LPDS_LOW_LEVEL; - break; - case GPIO_HIGH_LEVEL: - wake_mode = PRCM_LPDS_HIGH_LEVEL; - break; - default: - goto invalid_args; - break; - } - - // first clear the lpds value from all wake-able pins - for (uint i = 0; i < PYBPIN_NUM_WAKE_PINS; i++) { - pybpin_wake_pin[i].lpds = PYBPIN_WAKES_NOT; - } - - // enable this pin as a wake-up source during LPDS - pybpin_wake_pin[idx].lpds = wake_mode; - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - // this pin was the previous LPDS wake source, so disable it completely - if (pybpin_wake_pin[idx].lpds != PYBPIN_WAKES_NOT) { - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - } - pybpin_wake_pin[idx].lpds = PYBPIN_WAKES_NOT; - } - - if (pwrmode & PYB_PWR_MODE_HIBERNATE) { - if (idx >= PYBPIN_NUM_WAKE_PINS) { - goto invalid_args; - } - // wake modes are different in hibernate - uint wake_mode; - switch (trigger) { - case GPIO_FALLING_EDGE: - wake_mode = PRCM_HIB_FALL_EDGE; - break; - case GPIO_RISING_EDGE: - wake_mode = PRCM_HIB_RISE_EDGE; - break; - case GPIO_LOW_LEVEL: - wake_mode = PRCM_HIB_LOW_LEVEL; - break; - case GPIO_HIGH_LEVEL: - wake_mode = PRCM_HIB_HIGH_LEVEL; - break; - default: - goto invalid_args; - break; - } - - // enable this pin as wake-up source during hibernate - pybpin_wake_pin[idx].hib = wake_mode; - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].hib = PYBPIN_WAKES_NOT; - } - - // we need to update the callback atomically, so we disable the - // interrupt before we update anything. - pin_irq_disable(self); - if (pwrmode & PYB_PWR_MODE_ACTIVE) { - // register the interrupt - pin_extint_register((pin_obj_t *)self, trigger, priority); - if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].active = true; - } - } else if (idx < PYBPIN_NUM_WAKE_PINS) { - pybpin_wake_pin[idx].active = false; - } - - // all checks have passed, we can create the irq object - mp_obj_t _irq = mp_irq_new (self, args[2].u_obj, &pin_irq_methods); - if (pwrmode & PYB_PWR_MODE_LPDS) { - pyb_sleep_set_gpio_lpds_callback (_irq); - } - - // save the mp_trigge for later - self->irq_trigger = mp_trigger; - - // enable the interrupt just before leaving - pin_irq_enable(self); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq); - -STATIC const mp_rom_map_elem_t pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&pin_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&pin_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_pull), MP_ROM_PTR(&pin_pull_obj) }, - { MP_ROM_QSTR(MP_QSTR_drive), MP_ROM_PTR(&pin_drive_obj) }, - { MP_ROM_QSTR(MP_QSTR_alt_list), MP_ROM_PTR(&pin_alt_list_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pin_irq_obj) }, - - // class attributes - { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_DIR_MODE_IN) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_DIR_MODE_OUT) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(PIN_TYPE_OD) }, - { MP_ROM_QSTR(MP_QSTR_ALT), MP_ROM_INT(GPIO_DIR_MODE_ALT) }, - { MP_ROM_QSTR(MP_QSTR_ALT_OPEN_DRAIN), MP_ROM_INT(GPIO_DIR_MODE_ALT_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(PIN_TYPE_STD_PU) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(PIN_TYPE_STD_PD) }, - { MP_ROM_QSTR(MP_QSTR_LOW_POWER), MP_ROM_INT(PIN_STRENGTH_2MA) }, - { MP_ROM_QSTR(MP_QSTR_MED_POWER), MP_ROM_INT(PIN_STRENGTH_4MA) }, - { MP_ROM_QSTR(MP_QSTR_HIGH_POWER), MP_ROM_INT(PIN_STRENGTH_6MA) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(PYB_PIN_FALLING_EDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(PYB_PIN_RISING_EDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_LOW_LEVEL), MP_ROM_INT(PYB_PIN_LOW_LEVEL) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_HIGH_LEVEL), MP_ROM_INT(PYB_PIN_HIGH_LEVEL) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table); - -const mp_obj_type_t pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pin_print, - .make_new = pin_make_new, - .call = pin_call, - .locals_dict = (mp_obj_t)&pin_locals_dict, -}; - -STATIC const mp_irq_methods_t pin_irq_methods = { - .init = pin_irq, - .enable = pin_irq_enable, - .disable = pin_irq_disable, - .flags = pin_irq_flags, -}; - -STATIC void pin_named_pins_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_named_pins_obj_t *self = self_in; - mp_printf(print, "", self->name); -} - -const mp_obj_type_t pin_board_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_board, - .print = pin_named_pins_obj_print, - .locals_dict = (mp_obj_t)&pin_board_pins_locals_dict, -}; - diff --git a/ports/cc3200/mods/pybpin.h b/ports/cc3200/mods/pybpin.h deleted file mode 100644 index 74f0af2b3ca65..0000000000000 --- a/ports/cc3200/mods/pybpin.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H - -enum { - PORT_A0 = GPIOA0_BASE, - PORT_A1 = GPIOA1_BASE, - PORT_A2 = GPIOA2_BASE, - PORT_A3 = GPIOA3_BASE, -}; - -enum { - PIN_FN_UART = 0, - PIN_FN_SPI, - PIN_FN_I2S, - PIN_FN_I2C, - PIN_FN_TIM, - PIN_FN_SD, - PIN_FN_ADC, -}; - -enum { - PIN_TYPE_UART_TX = 0, - PIN_TYPE_UART_RX, - PIN_TYPE_UART_RTS, - PIN_TYPE_UART_CTS, -}; - -enum { - PIN_TYPE_SPI_CLK = 0, - PIN_TYPE_SPI_MOSI, - PIN_TYPE_SPI_MISO, - PIN_TYPE_SPI_CS0, -}; - -enum { - PIN_TYPE_I2S_CLK = 0, - PIN_TYPE_I2S_FS, - PIN_TYPE_I2S_DAT0, - PIN_TYPE_I2S_DAT1, -}; - -enum { - PIN_TYPE_I2C_SDA = 0, - PIN_TYPE_I2C_SCL, -}; - -enum { - PIN_TYPE_TIM_PWM = 0, -}; - -enum { - PIN_TYPE_SD_CLK = 0, - PIN_TYPE_SD_CMD, - PIN_TYPE_SD_DAT0, -}; - -enum { - PIN_TYPE_ADC_CH0 = 0, - PIN_TYPE_ADC_CH1, - PIN_TYPE_ADC_CH2, - PIN_TYPE_ADC_CH3, -}; - -typedef struct { - qstr name; - int8_t idx; - uint8_t fn; - uint8_t unit; - uint8_t type; -} pin_af_t; - -typedef struct { - const mp_obj_base_t base; - const qstr name; - const uint32_t port; - const pin_af_t *af_list; - uint16_t pull; - const uint8_t bit; - const uint8_t pin_num; - int8_t af; - uint8_t strength; - uint8_t mode; // this is now a combination of type and mode - const uint8_t num_afs; // 255 AFs - uint8_t value; - uint8_t used; - uint8_t irq_trigger; - uint8_t irq_flags; -} pin_obj_t; - -extern const mp_obj_type_t pin_type; - -typedef struct { - const char *name; - const pin_obj_t *pin; -} pin_named_pin_t; - -typedef struct { - mp_obj_base_t base; - qstr name; - const pin_named_pin_t *named_pins; -} pin_named_pins_obj_t; - -extern const mp_obj_type_t pin_board_pins_obj_type; -extern const mp_obj_dict_t pin_board_pins_locals_dict; - -void pin_init0(void); -void pin_config(pin_obj_t *self, int af, uint mode, uint type, int value, uint strength); -pin_obj_t *pin_find(mp_obj_t user_obj); -void pin_assign_pins_af (mp_obj_t *pins, uint32_t n_pins, uint32_t pull, uint32_t fn, uint32_t unit); -uint8_t pin_find_peripheral_unit (const mp_obj_t pin, uint8_t fn, uint8_t type); -uint8_t pin_find_peripheral_type (const mp_obj_t pin, uint8_t fn, uint8_t unit); -int8_t pin_find_af_index (const pin_obj_t* pin, uint8_t fn, uint8_t unit, uint8_t type);; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBPIN_H diff --git a/ports/cc3200/mods/pybrtc.c b/ports/cc3200/mods/pybrtc.c deleted file mode 100644 index e7b9cf258f483..0000000000000 --- a/ports/cc3200/mods/pybrtc.c +++ /dev/null @@ -1,485 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "lib/timeutils/timeutils.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "pybrtc.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "mpexception.h" - -/// \moduleref pyb -/// \class RTC - real time clock - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_irq_methods_t pyb_rtc_irq_methods; -STATIC pyb_rtc_obj_t pyb_rtc_obj; - -/****************************************************************************** - FUNCTION-LIKE MACROS - ******************************************************************************/ -#define RTC_U16MS_CYCLES(msec) ((msec * 1024) / 1000) -#define RTC_CYCLES_U16MS(cycles) ((cycles * 1000) / 1024) - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_rtc_set_time (uint32_t secs, uint16_t msecs); -STATIC uint32_t pyb_rtc_reset (void); -STATIC void pyb_rtc_disable_interupt (void); -STATIC void pyb_rtc_irq_enable (mp_obj_t self_in); -STATIC void pyb_rtc_irq_disable (mp_obj_t self_in); -STATIC int pyb_rtc_irq_flags (mp_obj_t self_in); -STATIC uint pyb_rtc_datetime_s_us(const mp_obj_t datetime, uint32_t *seconds); -STATIC mp_obj_t pyb_rtc_datetime(mp_obj_t self, const mp_obj_t datetime); -STATIC void pyb_rtc_set_alarm (pyb_rtc_obj_t *self, uint32_t seconds, uint16_t mseconds); -STATIC void rtc_msec_add(uint16_t msecs_1, uint32_t *secs, uint16_t *msecs_2); - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void pyb_rtc_pre_init(void) { - // only if comming out of a power-on reset - if (MAP_PRCMSysResetCauseGet() == PRCM_POWER_ON) { - // Mark the RTC in use first - MAP_PRCMRTCInUseSet(); - // reset the time and date - pyb_rtc_reset(); - } -} - -void pyb_rtc_get_time (uint32_t *secs, uint16_t *msecs) { - uint16_t cycles; - MAP_PRCMRTCGet (secs, &cycles); - *msecs = RTC_CYCLES_U16MS(cycles); -} - -uint32_t pyb_rtc_get_seconds (void) { - uint32_t seconds; - uint16_t mseconds; - pyb_rtc_get_time(&seconds, &mseconds); - return seconds; -} - -void pyb_rtc_calc_future_time (uint32_t a_mseconds, uint32_t *f_seconds, uint16_t *f_mseconds) { - uint32_t c_seconds; - uint16_t c_mseconds; - // get the current time - pyb_rtc_get_time(&c_seconds, &c_mseconds); - // calculate the future seconds - *f_seconds = c_seconds + (a_mseconds / 1000); - // calculate the "remaining" future mseconds - *f_mseconds = a_mseconds % 1000; - // add the current milliseconds - rtc_msec_add (c_mseconds, f_seconds, f_mseconds); -} - -void pyb_rtc_repeat_alarm (pyb_rtc_obj_t *self) { - if (self->repeat) { - uint32_t f_seconds, c_seconds; - uint16_t f_mseconds, c_mseconds; - - pyb_rtc_get_time(&c_seconds, &c_mseconds); - - // substract the time elapsed between waking up and setting up the alarm again - int32_t wake_ms = ((c_seconds * 1000) + c_mseconds) - ((self->alarm_time_s * 1000) + self->alarm_time_ms); - int32_t next_alarm = self->alarm_ms - wake_ms; - next_alarm = next_alarm > 0 ? next_alarm : PYB_RTC_MIN_ALARM_TIME_MS; - pyb_rtc_calc_future_time (next_alarm, &f_seconds, &f_mseconds); - - // now configure the alarm - pyb_rtc_set_alarm (self, f_seconds, f_mseconds); - } -} - -void pyb_rtc_disable_alarm (void) { - pyb_rtc_obj.alarmset = false; - pyb_rtc_disable_interupt(); -} - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_rtc_set_time (uint32_t secs, uint16_t msecs) { - // add the RTC access time - rtc_msec_add(RTC_ACCESS_TIME_MSEC, &secs, &msecs); - // convert from mseconds to cycles - msecs = RTC_U16MS_CYCLES(msecs); - // now set the time - MAP_PRCMRTCSet(secs, msecs); -} - -STATIC uint32_t pyb_rtc_reset (void) { - // fresh reset; configure the RTC Calendar - // set the date to 1st Jan 2015 - // set the time to 00:00:00 - uint32_t seconds = timeutils_seconds_since_2000(2015, 1, 1, 0, 0, 0); - // disable any running alarm - pyb_rtc_disable_alarm(); - // Now set the RTC calendar time - pyb_rtc_set_time(seconds, 0); - return seconds; -} - -STATIC void pyb_rtc_disable_interupt (void) { - uint primsk = disable_irq(); - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - (void)MAP_PRCMIntStatus(); - enable_irq(primsk); -} - -STATIC void pyb_rtc_irq_enable (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - // we always need interrupts if repeat is enabled - if ((self->pwrmode & PYB_PWR_MODE_ACTIVE) || self->repeat) { - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - } else { // just in case it was already enabled before - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - } - self->irq_enabled = true; -} - -STATIC void pyb_rtc_irq_disable (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - self->irq_enabled = false; - if (!self->repeat) { // we always need interrupts if repeat is enabled - pyb_rtc_disable_interupt(); - } -} - -STATIC int pyb_rtc_irq_flags (mp_obj_t self_in) { - pyb_rtc_obj_t *self = self_in; - return self->irq_flags; -} - -STATIC uint pyb_rtc_datetime_s_us(const mp_obj_t datetime, uint32_t *seconds) { - timeutils_struct_time_t tm; - uint32_t useconds; - - // set date and time - mp_obj_t *items; - size_t len; - mp_obj_get_array(datetime, &len, &items); - - // verify the tuple - if (len < 3 || len > 8) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - - tm.tm_year = mp_obj_get_int(items[0]); - tm.tm_mon = mp_obj_get_int(items[1]); - tm.tm_mday = mp_obj_get_int(items[2]); - if (len < 7) { - useconds = 0; - } else { - useconds = mp_obj_get_int(items[6]); - } - if (len < 6) { - tm.tm_sec = 0; - } else { - tm.tm_sec = mp_obj_get_int(items[5]); - } - if (len < 5) { - tm.tm_min = 0; - } else { - tm.tm_min = mp_obj_get_int(items[4]); - } - if (len < 4) { - tm.tm_hour = 0; - } else { - tm.tm_hour = mp_obj_get_int(items[3]); - } - *seconds = timeutils_seconds_since_2000(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); - return useconds; -} - -/// The 8-tuple has the same format as CPython's datetime object: -/// -/// (year, month, day, hours, minutes, seconds, milliseconds, tzinfo=None) -/// -STATIC mp_obj_t pyb_rtc_datetime(mp_obj_t self_in, const mp_obj_t datetime) { - uint32_t seconds; - uint32_t useconds; - - if (datetime != MP_OBJ_NULL) { - useconds = pyb_rtc_datetime_s_us(datetime, &seconds); - pyb_rtc_set_time (seconds, useconds / 1000); - } else { - seconds = pyb_rtc_reset(); - } - - // set WLAN time and date, this is needed to verify certificates - wlan_set_current_time(seconds); - return mp_const_none; -} - -STATIC void pyb_rtc_set_alarm (pyb_rtc_obj_t *self, uint32_t seconds, uint16_t mseconds) { - // disable the interrupt before updating anything - if (self->irq_enabled) { - MAP_PRCMIntDisable(PRCM_INT_SLOW_CLK_CTR); - } - // set the match value - MAP_PRCMRTCMatchSet(seconds, RTC_U16MS_CYCLES(mseconds)); - self->alarmset = true; - self->alarm_time_s = seconds; - self->alarm_time_ms = mseconds; - // enabled the interrupts again if applicable - if (self->irq_enabled || self->repeat) { - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - } -} - -STATIC void rtc_msec_add (uint16_t msecs_1, uint32_t *secs, uint16_t *msecs_2) { - if (msecs_1 + *msecs_2 >= 1000) { // larger than one second - *msecs_2 = (msecs_1 + *msecs_2) - 1000; - *secs += 1; // carry flag - } else { - // simply add the mseconds - *msecs_2 = msecs_1 + *msecs_2; - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pyb_rtc_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_datetime, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_rtc_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_rtc_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup the object - pyb_rtc_obj_t *self = &pyb_rtc_obj; - self->base.type = &pyb_rtc_type; - - // set the time and date - pyb_rtc_datetime((mp_obj_t)&pyb_rtc_obj, args[1].u_obj); - - // pass it to the sleep module - pyb_sleep_set_rtc_obj (self); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -STATIC mp_obj_t pyb_rtc_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_rtc_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_rtc_init_args[1], args); - return pyb_rtc_datetime(pos_args[0], args[0].u_obj); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_init_obj, 1, pyb_rtc_init); - -STATIC mp_obj_t pyb_rtc_now (mp_obj_t self_in) { - timeutils_struct_time_t tm; - uint32_t seconds; - uint16_t mseconds; - - // get the time from the RTC - pyb_rtc_get_time(&seconds, &mseconds); - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(mseconds * 1000), - mp_const_none - }; - return mp_obj_new_tuple(8, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_now_obj, pyb_rtc_now); - -STATIC mp_obj_t pyb_rtc_deinit (mp_obj_t self_in) { - pyb_rtc_reset(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_deinit_obj, pyb_rtc_deinit); - -STATIC mp_obj_t pyb_rtc_alarm(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - STATIC const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_time, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_repeat, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - pyb_rtc_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // check the alarm id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - uint32_t f_seconds; - uint16_t f_mseconds; - bool repeat = args[2].u_bool; - if (MP_OBJ_IS_TYPE(args[1].u_obj, &mp_type_tuple)) { // datetime tuple given - // repeat cannot be used with a datetime tuple - if (repeat) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - f_mseconds = pyb_rtc_datetime_s_us (args[1].u_obj, &f_seconds) / 1000; - } else { // then it must be an integer - self->alarm_ms = mp_obj_get_int(args[1].u_obj); - pyb_rtc_calc_future_time (self->alarm_ms, &f_seconds, &f_mseconds); - } - - // store the repepat flag - self->repeat = repeat; - - // now configure the alarm - pyb_rtc_set_alarm (self, f_seconds, f_mseconds); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_alarm_obj, 1, pyb_rtc_alarm); - -STATIC mp_obj_t pyb_rtc_alarm_left(size_t n_args, const mp_obj_t *args) { - pyb_rtc_obj_t *self = args[0]; - int32_t ms_left; - uint32_t c_seconds; - uint16_t c_mseconds; - - // only alarm id 0 is available - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // get the current time - pyb_rtc_get_time(&c_seconds, &c_mseconds); - - // calculate the ms left - ms_left = ((self->alarm_time_s * 1000) + self->alarm_time_ms) - ((c_seconds * 1000) + c_mseconds); - if (!self->alarmset || ms_left < 0) { - ms_left = 0; - } - return mp_obj_new_int(ms_left); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_left_obj, 1, 2, pyb_rtc_alarm_left); - -STATIC mp_obj_t pyb_rtc_alarm_cancel(size_t n_args, const mp_obj_t *args) { - // only alarm id 0 is available - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_OSError(MP_ENODEV); - } - // disable the alarm - pyb_rtc_disable_alarm(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_cancel_obj, 1, 2, pyb_rtc_alarm_cancel); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pyb_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pyb_rtc_obj_t *self = pos_args[0]; - - // save the power mode data for later - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode > (PYB_PWR_MODE_ACTIVE | PYB_PWR_MODE_LPDS | PYB_PWR_MODE_HIBERNATE)) { - goto invalid_args; - } - - // check the trigger - if (mp_obj_get_int(args[0].u_obj) == PYB_RTC_ALARM0) { - self->pwrmode = pwrmode; - pyb_rtc_irq_enable((mp_obj_t)self); - } else { - goto invalid_args; - } - - // the interrupt priority is ignored since it's already set to to highest level by the sleep module - // to make sure that the wakeup irqs are always called first when resuming from sleep - - // create the callback - mp_obj_t _irq = mp_irq_new ((mp_obj_t)self, args[2].u_obj, &pyb_rtc_irq_methods); - self->irq_obj = _irq; - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_irq_obj, 1, pyb_rtc_irq); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_rtc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_rtc_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_now), MP_ROM_PTR(&pyb_rtc_now_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&pyb_rtc_alarm_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&pyb_rtc_alarm_left_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_cancel), MP_ROM_PTR(&pyb_rtc_alarm_cancel_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_rtc_irq_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(PYB_RTC_ALARM0) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_t)&pyb_rtc_locals_dict, -}; - -STATIC const mp_irq_methods_t pyb_rtc_irq_methods = { - .init = pyb_rtc_irq, - .enable = pyb_rtc_irq_enable, - .disable = pyb_rtc_irq_disable, - .flags = pyb_rtc_irq_flags -}; diff --git a/ports/cc3200/mods/pybrtc.h b/ports/cc3200/mods/pybrtc.h deleted file mode 100644 index f73de3f5a75bd..0000000000000 --- a/ports/cc3200/mods/pybrtc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H - -// RTC triggers -#define PYB_RTC_ALARM0 (0x01) - -#define RTC_ACCESS_TIME_MSEC (5) -#define PYB_RTC_MIN_ALARM_TIME_MS (RTC_ACCESS_TIME_MSEC * 2) - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; - mp_obj_t irq_obj; - uint32_t irq_flags; - uint32_t alarm_ms; - uint32_t alarm_time_s; - uint16_t alarm_time_ms; - byte pwrmode; - bool alarmset; - bool repeat; - bool irq_enabled; -} pyb_rtc_obj_t; - -extern const mp_obj_type_t pyb_rtc_type; - -extern void pyb_rtc_pre_init(void); -extern void pyb_rtc_get_time (uint32_t *secs, uint16_t *msecs); -extern uint32_t pyb_rtc_get_seconds (void); -extern void pyb_rtc_calc_future_time (uint32_t a_mseconds, uint32_t *f_seconds, uint16_t *f_mseconds); -extern void pyb_rtc_repeat_alarm (pyb_rtc_obj_t *self); -extern void pyb_rtc_disable_alarm (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBRTC_H diff --git a/ports/cc3200/mods/pybsd.c b/ports/cc3200/mods/pybsd.c deleted file mode 100644 index c47d4e94516b4..0000000000000 --- a/ports/cc3200/mods/pybsd.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs_fat.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "gpio.h" -#include "sdhost.h" -#include "sd_diskio.h" -#include "pybsd.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "pybpin.h" -#include "pins.h" - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define PYBSD_FREQUENCY_HZ 15000000 // 15MHz - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -pybsd_obj_t pybsd_obj; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_obj_t pyb_sd_def_pin[3] = {&pin_GP10, &pin_GP11, &pin_GP15}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_sd_hw_init (pybsd_obj_t *self); -STATIC mp_obj_t pyb_sd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args); -STATIC mp_obj_t pyb_sd_deinit (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -/// Initalizes the sd card hardware driver -STATIC void pyb_sd_hw_init (pybsd_obj_t *self) { - if (self->pin_clk) { - // Configure the clock pin as output only - MAP_PinDirModeSet(((pin_obj_t *)(self->pin_clk))->pin_num, PIN_DIR_MODE_OUT); - } - // Enable SD peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // Reset MMCHS - MAP_PRCMPeripheralReset(PRCM_SDHOST); - // Initialize MMCHS - MAP_SDHostInit(SDHOST_BASE); - // Configure the card clock - MAP_SDHostSetExpClk(SDHOST_BASE, MAP_PRCMPeripheralClockGet(PRCM_SDHOST), PYBSD_FREQUENCY_HZ); - // Set card rd/wr block len - MAP_SDHostBlockSizeSet(SDHOST_BASE, SD_SECTOR_SIZE); - self->enabled = true; -} - -STATIC mp_obj_t pyb_sd_init_helper (pybsd_obj_t *self, const mp_arg_val_t *args) { - // assign the pins - mp_obj_t pins_o = args[0].u_obj; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_sd_def_pin; - } else { - mp_obj_get_array_fixed_n(pins_o, MP_ARRAY_SIZE(pyb_sd_def_pin), &pins); - } - pin_assign_pins_af (pins, MP_ARRAY_SIZE(pyb_sd_def_pin), PIN_TYPE_STD_PU, PIN_FN_SD, 0); - // save the pins clock - self->pin_clk = pin_find(pins[0]); - } - - pyb_sd_hw_init (self); - if (sd_disk_init() != 0) { - mp_raise_OSError(MP_EIO); - } - - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)pyb_sd_hw_init); - return mp_const_none; -} - -/******************************************************************************/ -// MicroPython bindings -// - -STATIC const mp_arg_t pyb_sd_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pins, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_sd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_sd_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_sd_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup and initialize the object - mp_obj_t self = &pybsd_obj; - pybsd_obj.base.type = &pyb_sd_type; - pyb_sd_init_helper (self, &args[1]); - return self; -} - -STATIC mp_obj_t pyb_sd_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_sd_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_sd_init_args[1], args); - return pyb_sd_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_sd_init_obj, 1, pyb_sd_init); - -STATIC mp_obj_t pyb_sd_deinit (mp_obj_t self_in) { - pybsd_obj_t *self = self_in; - // disable the peripheral - self->enabled = false; - MAP_PRCMPeripheralClkDisable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // de-initialze the sd card at diskio level - sd_disk_deinit(); - // unregister it from the sleep module - pyb_sleep_remove (self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_sd_deinit_obj, pyb_sd_deinit); - -STATIC mp_obj_t pyb_sd_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - DRESULT res = sd_disk_read(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SD_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_readblocks_obj, pyb_sd_readblocks); - -STATIC mp_obj_t pyb_sd_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - DRESULT res = sd_disk_write(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SD_SECTOR_SIZE); - return MP_OBJ_NEW_SMALL_INT(res != RES_OK); // return of 0 means success -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_writeblocks_obj, pyb_sd_writeblocks); - -STATIC mp_obj_t pyb_sd_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: - case BP_IOCTL_DEINIT: - case BP_IOCTL_SYNC: - // nothing to do - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SEC_COUNT: - return MP_OBJ_NEW_SMALL_INT(sd_disk_info.ulNofBlock * (sd_disk_info.ulBlockSize / 512)); - - case BP_IOCTL_SEC_SIZE: - return MP_OBJ_NEW_SMALL_INT(SD_SECTOR_SIZE); - - default: // unknown command - return MP_OBJ_NEW_SMALL_INT(-1); // error - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sd_ioctl_obj, pyb_sd_ioctl); - -STATIC const mp_rom_map_elem_t pyb_sd_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_sd_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_sd_deinit_obj) }, - // block device protocol - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_sd_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_sd_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_sd_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_sd_locals_dict, pyb_sd_locals_dict_table); - -const mp_obj_type_t pyb_sd_type = { - { &mp_type_type }, - .name = MP_QSTR_SD, - .make_new = pyb_sd_make_new, - .locals_dict = (mp_obj_t)&pyb_sd_locals_dict, -}; diff --git a/ports/cc3200/mods/pybsd.h b/ports/cc3200/mods/pybsd.h deleted file mode 100644 index af942084d774b..0000000000000 --- a/ports/cc3200/mods/pybsd.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSD_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSD_H - -/****************************************************************************** - DEFINE PUBLIC TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - mp_obj_t pin_clk; - bool enabled; -} pybsd_obj_t; - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern pybsd_obj_t pybsd_obj; -extern const mp_obj_type_t pyb_sd_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSD_H diff --git a/ports/cc3200/mods/pybsleep.c b/ports/cc3200/mods/pybsleep.c deleted file mode 100644 index 798c6538be968..0000000000000 --- a/ports/cc3200/mods/pybsleep.c +++ /dev/null @@ -1,656 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_common_reg.h" -#include "inc/hw_memmap.h" -#include "cc3200_asm.h" -#include "rom_map.h" -#include "interrupt.h" -#include "systick.h" -#include "prcm.h" -#include "spi.h" -#include "pin.h" -#include "pybsleep.h" -#include "mpirq.h" -#include "pybpin.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "osi.h" -#include "debug.h" -#include "mpexception.h" -#include "mperror.h" -#include "sleeprestore.h" -#include "serverstask.h" -#include "antenna.h" -#include "cryptohash.h" -#include "pybrtc.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ -#define SPIFLASH_INSTR_READ_STATUS (0x05) -#define SPIFLASH_INSTR_DEEP_POWER_DOWN (0xB9) -#define SPIFLASH_STATUS_BUSY (0x01) - -#define LPDS_UP_TIME (425) // 13 msec -#define LPDS_DOWN_TIME (98) // 3 msec -#define USER_OFFSET (131) // 4 smec -#define WAKEUP_TIME_LPDS (LPDS_UP_TIME + LPDS_DOWN_TIME + USER_OFFSET) // 20 msec -#define WAKEUP_TIME_HIB (32768) // 1 s - -#define FORCED_TIMER_INTERRUPT_MS (PYB_RTC_MIN_ALARM_TIME_MS) -#define FAILED_SLEEP_DELAY_MS (FORCED_TIMER_INTERRUPT_MS * 3) - -/****************************************************************************** - DECLARE PRIVATE TYPES - ******************************************************************************/ -// storage memory for Cortex M4 registers -typedef struct { - uint32_t msp; - uint32_t psp; - uint32_t psr; - uint32_t primask; - uint32_t faultmask; - uint32_t basepri; - uint32_t control; -} arm_cm4_core_regs_t; - -// storage memory for the NVIC registers -typedef struct { - uint32_t vector_table; // Vector Table Offset - uint32_t aux_ctrl; // Auxiliary control register - uint32_t int_ctrl_state; // Interrupt Control and State - uint32_t app_int; // Application Interrupt Reset control - uint32_t sys_ctrl; // System control - uint32_t config_ctrl; // Configuration control - uint32_t sys_pri_1; // System Handler Priority 1 - uint32_t sys_pri_2; // System Handler Priority 2 - uint32_t sys_pri_3; // System Handler Priority 3 - uint32_t sys_hcrs; // System Handler control and state register - uint32_t systick_ctrl; // SysTick Control Status - uint32_t systick_reload; // SysTick Reload - uint32_t systick_calib; // SysTick Calibration - uint32_t int_en[6]; // Interrupt set enable - uint32_t int_priority[49]; // Interrupt priority -} nvic_reg_store_t; - -typedef struct { - mp_obj_base_t base; - mp_obj_t obj; - WakeUpCB_t wakeup; -} pyb_sleep_obj_t; - -typedef struct { - mp_obj_t gpio_lpds_wake_cb; - wlan_obj_t *wlan_obj; - pyb_rtc_obj_t *rtc_obj; -} pybsleep_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC nvic_reg_store_t *nvic_reg_store; -STATIC pybsleep_data_t pybsleep_data = {NULL, NULL, NULL}; -volatile arm_cm4_core_regs_t vault_arm_registers; -STATIC pybsleep_reset_cause_t pybsleep_reset_cause = PYB_SLP_PWRON_RESET; -STATIC pybsleep_wake_reason_t pybsleep_wake_reason = PYB_SLP_WAKED_PWRON; -STATIC const mp_obj_type_t pyb_sleep_type = { - { &mp_type_type }, - .name = MP_QSTR_sleep, -}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pyb_sleep_obj_t *pyb_sleep_find (mp_obj_t obj); -STATIC void pyb_sleep_flash_powerdown (void); -STATIC NORETURN void pyb_sleep_suspend_enter (void); -void pyb_sleep_suspend_exit (void); -STATIC void pyb_sleep_obj_wakeup (void); -STATIC void PRCMInterruptHandler (void); -STATIC void pyb_sleep_iopark (bool hibernate); -STATIC bool setup_timer_lpds_wake (void); -STATIC bool setup_timer_hibernate_wake (void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -void pyb_sleep_pre_init (void) { - // allocate memory for nvic registers vault - ASSERT ((nvic_reg_store = mem_Malloc(sizeof(nvic_reg_store_t))) != NULL); -} - -void pyb_sleep_init0 (void) { - // initialize the sleep objects list - mp_obj_list_init(&MP_STATE_PORT(pyb_sleep_obj_list), 0); - - // register and enable the PRCM interrupt - osi_InterruptRegister(INT_PRCM, (P_OSI_INTR_ENTRY)PRCMInterruptHandler, INT_PRIORITY_LVL_1); - - // disable all LPDS and hibernate wake up sources (WLAN is disabed/enabled before entering LDPS mode) - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_GPIO); - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - MAP_PRCMHibernateWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR | PRCM_HIB_GPIO2 | PRCM_HIB_GPIO4 | PRCM_HIB_GPIO13 | - PRCM_HIB_GPIO17 | PRCM_HIB_GPIO11 | PRCM_HIB_GPIO24 | PRCM_HIB_GPIO26); - - // check the reset casue (if it's soft reset, leave it as it is) - if (pybsleep_reset_cause != PYB_SLP_SOFT_RESET) { - switch (MAP_PRCMSysResetCauseGet()) { - case PRCM_POWER_ON: - pybsleep_reset_cause = PYB_SLP_PWRON_RESET; - break; - case PRCM_CORE_RESET: - case PRCM_MCU_RESET: - case PRCM_SOC_RESET: - pybsleep_reset_cause = PYB_SLP_HARD_RESET; - break; - case PRCM_WDT_RESET: - pybsleep_reset_cause = PYB_SLP_WDT_RESET; - break; - case PRCM_HIB_EXIT: - if (PRCMGetSpecialBit(PRCM_WDT_RESET_BIT)) { - pybsleep_reset_cause = PYB_SLP_WDT_RESET; - } - else { - pybsleep_reset_cause = PYB_SLP_HIB_RESET; - // set the correct wake reason - switch (MAP_PRCMHibernateWakeupCauseGet()) { - case PRCM_HIB_WAKEUP_CAUSE_SLOW_CLOCK: - pybsleep_wake_reason = PYB_SLP_WAKED_BY_RTC; - // TODO repeat the alarm - break; - case PRCM_HIB_WAKEUP_CAUSE_GPIO: - pybsleep_wake_reason = PYB_SLP_WAKED_BY_GPIO; - break; - default: - break; - } - } - break; - default: - break; - } - } -} - -void pyb_sleep_signal_soft_reset (void) { - pybsleep_reset_cause = PYB_SLP_SOFT_RESET; -} - -void pyb_sleep_add (const mp_obj_t obj, WakeUpCB_t wakeup) { - pyb_sleep_obj_t *sleep_obj = m_new_obj(pyb_sleep_obj_t); - sleep_obj->base.type = &pyb_sleep_type; - sleep_obj->obj = obj; - sleep_obj->wakeup = wakeup; - // remove it in case it was already registered - pyb_sleep_remove (obj); - mp_obj_list_append(&MP_STATE_PORT(pyb_sleep_obj_list), sleep_obj); -} - -void pyb_sleep_remove (const mp_obj_t obj) { - pyb_sleep_obj_t *sleep_obj; - if ((sleep_obj = pyb_sleep_find(obj))) { - mp_obj_list_remove(&MP_STATE_PORT(pyb_sleep_obj_list), sleep_obj); - } -} - -void pyb_sleep_set_gpio_lpds_callback (mp_obj_t cb_obj) { - pybsleep_data.gpio_lpds_wake_cb = cb_obj; -} - -void pyb_sleep_set_wlan_obj (mp_obj_t wlan_obj) { - pybsleep_data.wlan_obj = (wlan_obj_t *)wlan_obj; -} - -void pyb_sleep_set_rtc_obj (mp_obj_t rtc_obj) { - pybsleep_data.rtc_obj = (pyb_rtc_obj_t *)rtc_obj; -} - -void pyb_sleep_sleep (void) { - nlr_buf_t nlr; - - // check if we should enable timer wake-up - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_LPDS)) { - if (!setup_timer_lpds_wake()) { - // lpds entering is not possible, wait for the forced interrupt and return - mp_hal_delay_ms(FAILED_SLEEP_DELAY_MS); - return; - } - } else { - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - } - - // do we need network wake-up? - if (pybsleep_data.wlan_obj->irq_enabled) { - MAP_PRCMLPDSWakeupSourceEnable (PRCM_LPDS_HOST_IRQ); - server_sleep_sockets(); - } else { - MAP_PRCMLPDSWakeupSourceDisable (PRCM_LPDS_HOST_IRQ); - } - - // entering and exiting suspended mode must be an atomic operation - // therefore interrupts need to be disabled - uint primsk = disable_irq(); - if (nlr_push(&nlr) == 0) { - pyb_sleep_suspend_enter(); - nlr_pop(); - } - - // an exception is always raised when exiting suspend mode - enable_irq(primsk); -} - -void pyb_sleep_deepsleep (void) { - // check if we should enable timer wake-up - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_HIBERNATE)) { - if (!setup_timer_hibernate_wake()) { - // hibernating is not possible, wait for the forced interrupt and return - mp_hal_delay_ms(FAILED_SLEEP_DELAY_MS); - return; - } - } else { - // disable the timer as hibernate wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR); - } - - wlan_stop(SL_STOP_TIMEOUT); - pyb_sleep_flash_powerdown(); - // must be done just before entering hibernate mode - pyb_sleep_iopark(true); - MAP_PRCMHibernateEnter(); -} - -pybsleep_reset_cause_t pyb_sleep_get_reset_cause (void) { - return pybsleep_reset_cause; -} - -pybsleep_wake_reason_t pyb_sleep_get_wake_reason (void) { - return pybsleep_wake_reason; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC pyb_sleep_obj_t *pyb_sleep_find (mp_obj_t obj) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_sleep_obj_list).len; i++) { - // search for the object and then remove it - pyb_sleep_obj_t *sleep_obj = ((pyb_sleep_obj_t *)(MP_STATE_PORT(pyb_sleep_obj_list).items[i])); - if (sleep_obj->obj == obj) { - return sleep_obj; - } - } - return NULL; -} - -STATIC void pyb_sleep_flash_powerdown (void) { - uint32_t status; - - // Enable clock for SSPI module - MAP_PRCMPeripheralClkEnable(PRCM_SSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // Reset SSPI at PRCM level and wait for reset to complete - MAP_PRCMPeripheralReset(PRCM_SSPI); - while(!MAP_PRCMPeripheralStatusGet(PRCM_SSPI)); - - // Reset SSPI at module level - MAP_SPIReset(SSPI_BASE); - // Configure SSPI module - MAP_SPIConfigSetExpClk (SSPI_BASE, PRCMPeripheralClockGet(PRCM_SSPI), - 20000000, SPI_MODE_MASTER,SPI_SUB_MODE_0, - (SPI_SW_CTRL_CS | - SPI_4PIN_MODE | - SPI_TURBO_OFF | - SPI_CS_ACTIVELOW | - SPI_WL_8)); - - // Enable SSPI module - MAP_SPIEnable(SSPI_BASE); - // Enable chip select for the spi flash. - MAP_SPICSEnable(SSPI_BASE); - // Wait for the spi flash - do { - // Send the status register read instruction and read back a dummy byte. - MAP_SPIDataPut(SSPI_BASE, SPIFLASH_INSTR_READ_STATUS); - MAP_SPIDataGet(SSPI_BASE, &status); - - // Write a dummy byte then read back the actual status. - MAP_SPIDataPut(SSPI_BASE, 0xFF); - MAP_SPIDataGet(SSPI_BASE, &status); - } while ((status & 0xFF) == SPIFLASH_STATUS_BUSY); - - // Disable chip select for the spi flash. - MAP_SPICSDisable(SSPI_BASE); - // Start another CS enable sequence for Power down command. - MAP_SPICSEnable(SSPI_BASE); - // Send Deep Power Down command to spi flash - MAP_SPIDataPut(SSPI_BASE, SPIFLASH_INSTR_DEEP_POWER_DOWN); - // Disable chip select for the spi flash. - MAP_SPICSDisable(SSPI_BASE); -} - -STATIC NORETURN void pyb_sleep_suspend_enter (void) { - // enable full RAM retention - MAP_PRCMSRAMRetentionEnable(PRCM_SRAM_COL_1 | PRCM_SRAM_COL_2 | PRCM_SRAM_COL_3 | PRCM_SRAM_COL_4, PRCM_SRAM_LPDS_RET); - - // save the NVIC control registers - nvic_reg_store->vector_table = HWREG(NVIC_VTABLE); - nvic_reg_store->aux_ctrl = HWREG(NVIC_ACTLR); - nvic_reg_store->int_ctrl_state = HWREG(NVIC_INT_CTRL); - nvic_reg_store->app_int = HWREG(NVIC_APINT); - nvic_reg_store->sys_ctrl = HWREG(NVIC_SYS_CTRL); - nvic_reg_store->config_ctrl = HWREG(NVIC_CFG_CTRL); - nvic_reg_store->sys_pri_1 = HWREG(NVIC_SYS_PRI1); - nvic_reg_store->sys_pri_2 = HWREG(NVIC_SYS_PRI2); - nvic_reg_store->sys_pri_3 = HWREG(NVIC_SYS_PRI3); - nvic_reg_store->sys_hcrs = HWREG(NVIC_SYS_HND_CTRL); - - // save the systick registers - nvic_reg_store->systick_ctrl = HWREG(NVIC_ST_CTRL); - nvic_reg_store->systick_reload = HWREG(NVIC_ST_RELOAD); - nvic_reg_store->systick_calib = HWREG(NVIC_ST_CAL); - - // save the interrupt enable registers - uint32_t *base_reg_addr = (uint32_t *)NVIC_EN0; - for(int32_t i = 0; i < (sizeof(nvic_reg_store->int_en) / 4); i++) { - nvic_reg_store->int_en[i] = base_reg_addr[i]; - } - - // save the interrupt priority registers - base_reg_addr = (uint32_t *)NVIC_PRI0; - for(int32_t i = 0; i < (sizeof(nvic_reg_store->int_priority) / 4); i++) { - nvic_reg_store->int_priority[i] = base_reg_addr[i]; - } - - // switch off the heartbeat led (this makes sure it will blink as soon as we wake up) - mperror_heartbeat_switch_off(); - - // park the gpio pins - pyb_sleep_iopark(false); - - // store the cpu registers - sleep_store(); - - // save the restore info and enter LPDS - MAP_PRCMLPDSRestoreInfoSet(vault_arm_registers.psp, (uint32_t)sleep_restore); - MAP_PRCMLPDSEnter(); - - // let the cpu fade away... - for ( ; ; ); -} - -void pyb_sleep_suspend_exit (void) { - // take the I2C semaphore - uint32_t reg = HWREG(COMMON_REG_BASE + COMMON_REG_O_I2C_Properties_Register); - reg = (reg & ~0x3) | 0x1; - HWREG(COMMON_REG_BASE + COMMON_REG_O_I2C_Properties_Register) = reg; - - // take the GPIO semaphore - reg = HWREG(COMMON_REG_BASE + COMMON_REG_O_GPIO_properties_register); - reg = (reg & ~0x3FF) | 0x155; - HWREG(COMMON_REG_BASE + COMMON_REG_O_GPIO_properties_register) = reg; - - // restore de NVIC control registers - HWREG(NVIC_VTABLE) = nvic_reg_store->vector_table; - HWREG(NVIC_ACTLR) = nvic_reg_store->aux_ctrl; - HWREG(NVIC_INT_CTRL) = nvic_reg_store->int_ctrl_state; - HWREG(NVIC_APINT) = nvic_reg_store->app_int; - HWREG(NVIC_SYS_CTRL) = nvic_reg_store->sys_ctrl; - HWREG(NVIC_CFG_CTRL) = nvic_reg_store->config_ctrl; - HWREG(NVIC_SYS_PRI1) = nvic_reg_store->sys_pri_1; - HWREG(NVIC_SYS_PRI2) = nvic_reg_store->sys_pri_2; - HWREG(NVIC_SYS_PRI3) = nvic_reg_store->sys_pri_3; - HWREG(NVIC_SYS_HND_CTRL) = nvic_reg_store->sys_hcrs; - - // restore the systick register - HWREG(NVIC_ST_CTRL) = nvic_reg_store->systick_ctrl; - HWREG(NVIC_ST_RELOAD) = nvic_reg_store->systick_reload; - HWREG(NVIC_ST_CAL) = nvic_reg_store->systick_calib; - - // restore the interrupt priority registers - uint32_t *base_reg_addr = (uint32_t *)NVIC_PRI0; - for (uint32_t i = 0; i < (sizeof(nvic_reg_store->int_priority) / 4); i++) { - base_reg_addr[i] = nvic_reg_store->int_priority[i]; - } - - // restore the interrupt enable registers - base_reg_addr = (uint32_t *)NVIC_EN0; - for(uint32_t i = 0; i < (sizeof(nvic_reg_store->int_en) / 4); i++) { - base_reg_addr[i] = nvic_reg_store->int_en[i]; - } - - HAL_INTRODUCE_SYNC_BARRIER(); - - // ungate the clock to the shared spi bus - MAP_PRCMPeripheralClkEnable(PRCM_SSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - -#if MICROPY_HW_ANTENNA_DIVERSITY - // re-configure the antenna selection pins - antenna_init0(); -#endif - - // reinitialize simplelink's interface - sl_IfOpen (NULL, 0); - - // restore the configuration of all active peripherals - pyb_sleep_obj_wakeup(); - - // reconfigure all the previously enabled interrupts - mp_irq_wake_all(); - - // we need to init the crypto hash engine again - //CRYPTOHASH_Init(); - - // trigger a sw interrupt - MAP_IntPendSet(INT_PRCM); - - // force an exception to go back to the point where suspend mode was entered - nlr_raise(mp_obj_new_exception(&mp_type_SystemExit)); -} - -STATIC void PRCMInterruptHandler (void) { - // reading the interrupt status automatically clears the interrupt - if (PRCM_INT_SLOW_CLK_CTR == MAP_PRCMIntStatus()) { - // reconfigure it again (if repeat is true) - pyb_rtc_repeat_alarm (pybsleep_data.rtc_obj); - pybsleep_data.rtc_obj->irq_flags = PYB_RTC_ALARM0; - // need to check if irq's are enabled from the user point of view - if (pybsleep_data.rtc_obj->irq_enabled && (pybsleep_data.rtc_obj->pwrmode & PYB_PWR_MODE_ACTIVE)) { - mp_irq_handler(pybsleep_data.rtc_obj->irq_obj); - } - pybsleep_data.rtc_obj->irq_flags = 0; - } else { - // interrupt has been triggered while waking up from LPDS - switch (MAP_PRCMLPDSWakeupCauseGet()) { - case PRCM_LPDS_HOST_IRQ: - pybsleep_data.wlan_obj->irq_flags = MODWLAN_WIFI_EVENT_ANY; - mp_irq_handler(pybsleep_data.wlan_obj->irq_obj); - pybsleep_wake_reason = PYB_SLP_WAKED_BY_WLAN; - pybsleep_data.wlan_obj->irq_flags = 0; - break; - case PRCM_LPDS_GPIO: - mp_irq_handler(pybsleep_data.gpio_lpds_wake_cb); - pybsleep_wake_reason = PYB_SLP_WAKED_BY_GPIO; - break; - case PRCM_LPDS_TIMER: - // reconfigure it again if repeat is true - pyb_rtc_repeat_alarm (pybsleep_data.rtc_obj); - pybsleep_data.rtc_obj->irq_flags = PYB_RTC_ALARM0; - // next one clears the wake cause flag - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - mp_irq_handler(pybsleep_data.rtc_obj->irq_obj); - pybsleep_data.rtc_obj->irq_flags = 0; - pybsleep_wake_reason = PYB_SLP_WAKED_BY_RTC; - break; - default: - break; - } - } -} - -STATIC void pyb_sleep_obj_wakeup (void) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_sleep_obj_list).len; i++) { - pyb_sleep_obj_t *sleep_obj = ((pyb_sleep_obj_t *)MP_STATE_PORT(pyb_sleep_obj_list).items[i]); - sleep_obj->wakeup(sleep_obj->obj); - } -} - -STATIC void pyb_sleep_iopark (bool hibernate) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - for (uint i = 0; i < named_map->used; i++) { - pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value; - switch (pin->pin_num) { -#ifdef DEBUG - // skip the JTAG pins - case PIN_16: - case PIN_17: - case PIN_19: - case PIN_20: - break; -#endif - default: - // enable a weak pull-up if the pin is unused - if (!pin->used) { - MAP_PinConfigSet(pin->pin_num, pin->strength, PIN_TYPE_STD_PU); - } - if (hibernate) { - // make it an input - MAP_PinDirModeSet(pin->pin_num, PIN_DIR_MODE_IN); - } - break; - } - } - - // park the sflash pins - HWREG(0x4402E0E8) &= ~(0x3 << 8); - HWREG(0x4402E0E8) |= (0x2 << 8); - HWREG(0x4402E0EC) &= ~(0x3 << 8); - HWREG(0x4402E0EC) |= (0x2 << 8); - HWREG(0x4402E0F0) &= ~(0x3 << 8); - HWREG(0x4402E0F0) |= (0x2 << 8); - HWREG(0x4402E0F4) &= ~(0x3 << 8); - HWREG(0x4402E0F4) |= (0x1 << 8); - - // if the board has antenna diversity, only park the antenna - // selection pins when going into hibernation -#if MICROPY_HW_ANTENNA_DIVERSITY - if (hibernate) { -#endif - // park the antenna selection pins - // (tri-stated with pull down enabled) - HWREG(0x4402E108) = 0x00000E61; - HWREG(0x4402E10C) = 0x00000E61; -#if MICROPY_HW_ANTENNA_DIVERSITY - } else { - // park the antenna selection pins - // (tri-stated without changing the pull up/down resistors) - HWREG(0x4402E108) &= ~0x000000FF; - HWREG(0x4402E108) |= 0x00000C61; - HWREG(0x4402E10C) &= ~0x000000FF; - HWREG(0x4402E10C) |= 0x00000C61; - } -#endif -} - -STATIC bool setup_timer_lpds_wake (void) { - uint64_t t_match, t_curr; - int64_t t_remaining; - - // get the time remaining for the RTC timer to expire - t_match = MAP_PRCMSlowClkCtrMatchGet(); - t_curr = MAP_PRCMSlowClkCtrGet(); - - // get the time remaining in terms of slow clocks - t_remaining = (t_match - t_curr); - if (t_remaining > WAKEUP_TIME_LPDS) { - // subtract the time it takes to wakeup from lpds - t_remaining -= WAKEUP_TIME_LPDS; - t_remaining = (t_remaining > 0xFFFFFFFF) ? 0xFFFFFFFF: t_remaining; - // setup the LPDS wake time - MAP_PRCMLPDSIntervalSet((uint32_t)t_remaining); - // enable the wake source - MAP_PRCMLPDSWakeupSourceEnable(PRCM_LPDS_TIMER); - return true; - } - - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_LPDS_TIMER); - - uint32_t f_seconds; - uint16_t f_mseconds; - // setup a timer interrupt immediately - pyb_rtc_calc_future_time (FORCED_TIMER_INTERRUPT_MS, &f_seconds, &f_mseconds); - MAP_PRCMRTCMatchSet(f_seconds, f_mseconds); - // LPDS wake by timer was not possible, force an interrupt in active mode instead - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - - return false; -} - -STATIC bool setup_timer_hibernate_wake (void) { - uint64_t t_match, t_curr; - int64_t t_remaining; - - // get the time remaining for the RTC timer to expire - t_match = MAP_PRCMSlowClkCtrMatchGet(); - t_curr = MAP_PRCMSlowClkCtrGet(); - - // get the time remaining in terms of slow clocks - t_remaining = (t_match - t_curr); - if (t_remaining > WAKEUP_TIME_HIB) { - // subtract the time it takes for wakeup from hibernate - t_remaining -= WAKEUP_TIME_HIB; - // setup the LPDS wake time - MAP_PRCMHibernateIntervalSet((uint32_t)t_remaining); - // enable the wake source - MAP_PRCMHibernateWakeupSourceEnable(PRCM_HIB_SLOW_CLK_CTR); - return true; - } - - - // disable the timer as wake source - MAP_PRCMLPDSWakeupSourceDisable(PRCM_HIB_SLOW_CLK_CTR); - - uint32_t f_seconds; - uint16_t f_mseconds; - // setup a timer interrupt immediately - pyb_rtc_calc_future_time (FORCED_TIMER_INTERRUPT_MS, &f_seconds, &f_mseconds); - MAP_PRCMRTCMatchSet(f_seconds, f_mseconds); - // LPDS wake by timer was not possible, force an interrupt in active mode instead - MAP_PRCMIntEnable(PRCM_INT_SLOW_CLK_CTR); - - return false; -} - diff --git a/ports/cc3200/mods/pybsleep.h b/ports/cc3200/mods/pybsleep.h deleted file mode 100644 index e98636178dc5d..0000000000000 --- a/ports/cc3200/mods/pybsleep.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYB_PWR_MODE_ACTIVE (0x01) -#define PYB_PWR_MODE_LPDS (0x02) -#define PYB_PWR_MODE_HIBERNATE (0x04) - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef enum { - PYB_SLP_PWRON_RESET = 0, - PYB_SLP_HARD_RESET, - PYB_SLP_WDT_RESET, - PYB_SLP_HIB_RESET, - PYB_SLP_SOFT_RESET -} pybsleep_reset_cause_t; - -typedef enum { - PYB_SLP_WAKED_PWRON = 0, - PYB_SLP_WAKED_BY_WLAN, - PYB_SLP_WAKED_BY_GPIO, - PYB_SLP_WAKED_BY_RTC -} pybsleep_wake_reason_t; - -typedef void (*WakeUpCB_t)(const mp_obj_t self); - -/****************************************************************************** - DECLARE FUNCTIONS - ******************************************************************************/ -void pyb_sleep_pre_init (void); -void pyb_sleep_init0 (void); -void pyb_sleep_signal_soft_reset (void); -void pyb_sleep_add (const mp_obj_t obj, WakeUpCB_t wakeup); -void pyb_sleep_remove (const mp_obj_t obj); -void pyb_sleep_set_gpio_lpds_callback (mp_obj_t cb_obj); -void pyb_sleep_set_wlan_obj (mp_obj_t wlan_obj); -void pyb_sleep_set_rtc_obj (mp_obj_t rtc_obj); -void pyb_sleep_sleep (void); -void pyb_sleep_deepsleep (void); -pybsleep_reset_cause_t pyb_sleep_get_reset_cause (void); -pybsleep_wake_reason_t pyb_sleep_get_wake_reason (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSLEEP_H diff --git a/ports/cc3200/mods/pybspi.c b/ports/cc3200/mods/pybspi.c deleted file mode 100644 index 27591e4f4c6b9..0000000000000 --- a/ports/cc3200/mods/pybspi.c +++ /dev/null @@ -1,387 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "bufhelper.h" -#include "inc/hw_types.h" -#include "inc/hw_mcspi.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "spi.h" -#include "pybspi.h" -#include "mpexception.h" -#include "pybsleep.h" -#include "pybpin.h" -#include "pins.h" - -/// \moduleref pyb -/// \class SPI - a master-driven serial protocol - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ -typedef struct _pyb_spi_obj_t { - mp_obj_base_t base; - uint baudrate; - uint config; - byte polarity; - byte phase; - byte submode; - byte wlen; -} pyb_spi_obj_t; - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define PYBSPI_FIRST_BIT_MSB 0 - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_spi_obj_t pyb_spi_obj = {.baudrate = 0}; - -STATIC const mp_obj_t pyb_spi_def_pin[3] = {&pin_GP14, &pin_GP16, &pin_GP30}; - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// only master mode is available for the moment -STATIC void pybspi_init (const pyb_spi_obj_t *self) { - // enable the peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_GSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_GSPI); - MAP_SPIReset(GSPI_BASE); - - // configure the interface (only master mode supported) - MAP_SPIConfigSetExpClk (GSPI_BASE, MAP_PRCMPeripheralClockGet(PRCM_GSPI), - self->baudrate, SPI_MODE_MASTER, self->submode, self->config); - - // enable the interface - MAP_SPIEnable(GSPI_BASE); -} - -STATIC void pybspi_tx (pyb_spi_obj_t *self, const void *data) { - uint32_t txdata; - switch (self->wlen) { - case 1: - txdata = (uint8_t)(*(char *)data); - break; - case 2: - txdata = (uint16_t)(*(uint16_t *)data); - break; - case 4: - txdata = (uint32_t)(*(uint32_t *)data); - break; - default: - return; - } - MAP_SPIDataPut (GSPI_BASE, txdata); -} - -STATIC void pybspi_rx (pyb_spi_obj_t *self, void *data) { - uint32_t rxdata; - MAP_SPIDataGet (GSPI_BASE, &rxdata); - if (data) { - switch (self->wlen) { - case 1: - *(char *)data = rxdata; - break; - case 2: - *(uint16_t *)data = rxdata; - break; - case 4: - *(uint32_t *)data = rxdata; - break; - default: - return; - } - } -} - -STATIC void pybspi_transfer (pyb_spi_obj_t *self, const char *txdata, char *rxdata, uint32_t len, uint32_t *txchar) { - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } - // send and receive the data - MAP_SPICSEnable(GSPI_BASE); - for (int i = 0; i < len; i += self->wlen) { - pybspi_tx(self, txdata ? (const void *)&txdata[i] : txchar); - pybspi_rx(self, rxdata ? (void *)&rxdata[i] : NULL); - } - MAP_SPICSDisable(GSPI_BASE); -} - -/******************************************************************************/ -/* MicroPython bindings */ -/******************************************************************************/ -STATIC void pyb_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_spi_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "SPI(0, baudrate=%u, bits=%u, polarity=%u, phase=%u, firstbit=SPI.MSB)", - self->baudrate, (self->wlen * 8), self->polarity, self->phase); - } else { - mp_print_str(print, "SPI(0)"); - } -} - -STATIC mp_obj_t pyb_spi_init_helper(pyb_spi_obj_t *self, const mp_arg_val_t *args) { - uint bits; - switch (args[1].u_int) { - case 8: - bits = SPI_WL_8; - break; - case 16: - bits = SPI_WL_16; - break; - case 32: - bits = SPI_WL_32; - break; - default: - goto invalid_args; - break; - } - - uint polarity = args[2].u_int; - uint phase = args[3].u_int; - if (polarity > 1 || phase > 1) { - goto invalid_args; - } - - uint firstbit = args[4].u_int; - if (firstbit != PYBSPI_FIRST_BIT_MSB) { - goto invalid_args; - } - - // build the configuration - self->baudrate = args[0].u_int; - self->wlen = args[1].u_int >> 3; - self->config = bits | SPI_CS_ACTIVELOW | SPI_SW_CTRL_CS | SPI_4PIN_MODE | SPI_TURBO_OFF; - self->polarity = polarity; - self->phase = phase; - self->submode = (polarity << 1) | phase; - - // assign the pins - mp_obj_t pins_o = args[5].u_obj; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_spi_def_pin; - } else { - mp_obj_get_array_fixed_n(pins_o, 3, &pins); - } - pin_assign_pins_af (pins, 3, PIN_TYPE_STD_PU, PIN_FN_SPI, 0); - } - - // init the bus - pybspi_init((const pyb_spi_obj_t *)self); - - // register it with the sleep module - pyb_sleep_add((const mp_obj_t)self, (WakeUpCB_t)pybspi_init); - - return mp_const_none; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -static const mp_arg_t pyb_spi_init_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000000} }, // 1MHz - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PYBSPI_FIRST_BIT_MSB} }, - { MP_QSTR_pins, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_spi_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_spi_init_args, args); - - // check the peripheral id - if (args[0].u_int != 0) { - mp_raise_OSError(MP_ENODEV); - } - - // setup the object - pyb_spi_obj_t *self = &pyb_spi_obj; - self->base.type = &pyb_spi_type; - - // start the peripheral - pyb_spi_init_helper(self, &args[1]); - - return self; -} - -STATIC mp_obj_t pyb_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_spi_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_spi_init_args[1], args); - return pyb_spi_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init); - -/// \method deinit() -/// Turn off the spi bus. -STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) { - // disable the peripheral - MAP_SPIDisable(GSPI_BASE); - MAP_PRCMPeripheralClkDisable(PRCM_GSPI, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - // invalidate the baudrate - pyb_spi_obj.baudrate = 0; - // unregister it with the sleep module - pyb_sleep_remove((const mp_obj_t)self_in); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit); - -STATIC mp_obj_t pyb_spi_write (mp_obj_t self_in, mp_obj_t buf) { - // parse args - pyb_spi_obj_t *self = self_in; - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(buf, &bufinfo, data); - - // just send - pybspi_transfer(self, (const char *)bufinfo.buf, NULL, bufinfo.len, NULL); - - // return the number of bytes written - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_spi_write_obj, pyb_spi_write); - -STATIC mp_obj_t pyb_spi_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_nbytes, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_write, MP_ARG_INT, {.u_int = 0x00} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // just receive - uint32_t write = args[1].u_int; - pybspi_transfer(self, NULL, vstr.buf, vstr.len, &write); - - // return the received data - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_read_obj, 1, pyb_spi_read); - -STATIC mp_obj_t pyb_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_buf, MP_ARG_REQUIRED | MP_ARG_OBJ, }, - { MP_QSTR_write, MP_ARG_INT, {.u_int = 0x00} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // just receive - uint32_t write = args[1].u_int; - pybspi_transfer(self, NULL, vstr.buf, vstr.len, &write); - - // return the number of bytes received - return mp_obj_new_int(vstr.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_readinto_obj, 1, pyb_spi_readinto); - -STATIC mp_obj_t pyb_spi_write_readinto (mp_obj_t self, mp_obj_t writebuf, mp_obj_t readbuf) { - // get buffers to write from/read to - mp_buffer_info_t bufinfo_write; - uint8_t data_send[1]; - mp_buffer_info_t bufinfo_read; - - if (writebuf == readbuf) { - // same object for writing and reading, it must be a r/w buffer - mp_get_buffer_raise(writebuf, &bufinfo_write, MP_BUFFER_RW); - bufinfo_read = bufinfo_write; - } else { - // get the buffer to write from - pyb_buf_get_for_send(writebuf, &bufinfo_write, data_send); - - // get the read buffer - mp_get_buffer_raise(readbuf, &bufinfo_read, MP_BUFFER_WRITE); - if (bufinfo_read.len != bufinfo_write.len) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - } - - // send and receive - pybspi_transfer(self, (const char *)bufinfo_write.buf, bufinfo_read.buf, bufinfo_write.len, NULL); - - // return the number of transferred bytes - return mp_obj_new_int(bufinfo_write.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_spi_write_readinto_obj, pyb_spi_write_readinto); - -STATIC const mp_rom_map_elem_t pyb_spi_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_spi_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&pyb_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&pyb_spi_write_readinto_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(PYBSPI_FIRST_BIT_MSB) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table); - -const mp_obj_type_t pyb_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = pyb_spi_print, - .make_new = pyb_spi_make_new, - .locals_dict = (mp_obj_t)&pyb_spi_locals_dict, -}; diff --git a/ports/cc3200/mods/pybspi.h b/ports/cc3200/mods/pybspi.h deleted file mode 100644 index b0fce88703012..0000000000000 --- a/ports/cc3200/mods/pybspi.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H - -extern const mp_obj_type_t pyb_spi_type; - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBSPI_H diff --git a/ports/cc3200/mods/pybtimer.c b/ports/cc3200/mods/pybtimer.c deleted file mode 100644 index ea795b848098e..0000000000000 --- a/ports/cc3200/mods/pybtimer.c +++ /dev/null @@ -1,732 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_timer.h" -#include "rom_map.h" -#include "interrupt.h" -#include "prcm.h" -#include "timer.h" -#include "pin.h" -#include "pybtimer.h" -#include "pybpin.h" -#include "pins.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "mpexception.h" - - -/// \moduleref pyb -/// \class Timer - generate periodic events, count events, and create PWM signals. -/// -/// Each timer consists of a counter that counts up at a certain rate. The rate -/// at which it counts is the peripheral clock frequency (in Hz) divided by the -/// timer prescaler. When the counter reaches the timer period it triggers an -/// event, and the counter resets back to zero. By using the irq method, -/// the timer event can call a Python function. - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ -#define PYBTIMER_NUM_TIMERS (4) -#define PYBTIMER_POLARITY_POS (0x01) -#define PYBTIMER_POLARITY_NEG (0x02) - -#define PYBTIMER_TIMEOUT_TRIGGER (0x01) -#define PYBTIMER_MATCH_TRIGGER (0x02) - -#define PYBTIMER_SRC_FREQ_HZ HAL_FCPU_HZ - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint32_t timer; - uint32_t config; - uint16_t irq_trigger; - uint16_t irq_flags; - uint8_t peripheral; - uint8_t id; -} pyb_timer_obj_t; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint32_t frequency; - uint32_t period; - uint16_t channel; - uint16_t duty_cycle; - uint8_t polarity; -} pyb_timer_channel_obj_t; - -/****************************************************************************** - DEFINE PRIVATE DATA - ******************************************************************************/ -STATIC const mp_irq_methods_t pyb_timer_channel_irq_methods; -STATIC pyb_timer_obj_t pyb_timer_obj[PYBTIMER_NUM_TIMERS] = {{.timer = TIMERA0_BASE, .peripheral = PRCM_TIMERA0}, - {.timer = TIMERA1_BASE, .peripheral = PRCM_TIMERA1}, - {.timer = TIMERA2_BASE, .peripheral = PRCM_TIMERA2}, - {.timer = TIMERA3_BASE, .peripheral = PRCM_TIMERA3}}; -STATIC const mp_obj_type_t pyb_timer_channel_type; -STATIC const mp_obj_t pyb_timer_pwm_pin[8] = {&pin_GP24, MP_OBJ_NULL, &pin_GP25, MP_OBJ_NULL, MP_OBJ_NULL, &pin_GP9, &pin_GP10, &pin_GP11}; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC mp_obj_t pyb_timer_channel_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); -STATIC void timer_disable (pyb_timer_obj_t *tim); -STATIC void timer_channel_init (pyb_timer_channel_obj_t *ch); -STATIC void TIMER0AIntHandler(void); -STATIC void TIMER0BIntHandler(void); -STATIC void TIMER1AIntHandler(void); -STATIC void TIMER1BIntHandler(void); -STATIC void TIMER2AIntHandler(void); -STATIC void TIMER2BIntHandler(void); -STATIC void TIMER3AIntHandler(void); -STATIC void TIMER3BIntHandler(void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void timer_init0 (void) { - mp_obj_list_init(&MP_STATE_PORT(pyb_timer_channel_obj_list), 0); -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void pyb_timer_channel_irq_enable (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - MAP_TimerIntClear(self->timer->timer, self->timer->irq_trigger & self->channel); - MAP_TimerIntEnable(self->timer->timer, self->timer->irq_trigger & self->channel); -} - -STATIC void pyb_timer_channel_irq_disable (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - MAP_TimerIntDisable(self->timer->timer, self->timer->irq_trigger & self->channel); -} - -STATIC int pyb_timer_channel_irq_flags (mp_obj_t self_in) { - pyb_timer_channel_obj_t *self = self_in; - return self->timer->irq_flags; -} - -STATIC pyb_timer_channel_obj_t *pyb_timer_channel_find (uint32_t timer, uint16_t channel_n) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(pyb_timer_channel_obj_list).len; i++) { - pyb_timer_channel_obj_t *ch = ((pyb_timer_channel_obj_t *)(MP_STATE_PORT(pyb_timer_channel_obj_list).items[i])); - // any 32-bit timer must be matched by any of its 16-bit versions - if (ch->timer->timer == timer && ((ch->channel & TIMER_A) == channel_n || (ch->channel & TIMER_B) == channel_n)) { - return ch; - } - } - return MP_OBJ_NULL; -} - -STATIC void pyb_timer_channel_remove (pyb_timer_channel_obj_t *ch) { - pyb_timer_channel_obj_t *channel; - if ((channel = pyb_timer_channel_find(ch->timer->timer, ch->channel))) { - mp_obj_list_remove(&MP_STATE_PORT(pyb_timer_channel_obj_list), channel); - // unregister it with the sleep module - pyb_sleep_remove((const mp_obj_t)channel); - } -} - -STATIC void pyb_timer_channel_add (pyb_timer_channel_obj_t *ch) { - // remove it in case it already exists - pyb_timer_channel_remove(ch); - mp_obj_list_append(&MP_STATE_PORT(pyb_timer_channel_obj_list), ch); - // register it with the sleep module - pyb_sleep_add((const mp_obj_t)ch, (WakeUpCB_t)timer_channel_init); -} - -STATIC void timer_disable (pyb_timer_obj_t *tim) { - // disable all timers and it's interrupts - MAP_TimerDisable(tim->timer, TIMER_A | TIMER_B); - MAP_TimerIntDisable(tim->timer, tim->irq_trigger); - MAP_TimerIntClear(tim->timer, tim->irq_trigger); - pyb_timer_channel_obj_t *ch; - // disable its channels - if ((ch = pyb_timer_channel_find (tim->timer, TIMER_A))) { - pyb_sleep_remove(ch); - } - if ((ch = pyb_timer_channel_find (tim->timer, TIMER_B))) { - pyb_sleep_remove(ch); - } - MAP_PRCMPeripheralClkDisable(tim->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); -} - -// computes prescaler period and match value so timer triggers at freq-Hz -STATIC uint32_t compute_prescaler_period_and_match_value(pyb_timer_channel_obj_t *ch, uint32_t *period_out, uint32_t *match_out) { - uint32_t maxcount = (ch->channel == (TIMER_A | TIMER_B)) ? 0xFFFFFFFF : 0xFFFF; - uint32_t prescaler; - uint32_t period_c = (ch->frequency > 0) ? PYBTIMER_SRC_FREQ_HZ / ch->frequency : ((PYBTIMER_SRC_FREQ_HZ / 1000000) * ch->period); - - period_c = MAX(1, period_c) - 1; - if (period_c == 0) { - goto error; - } - - prescaler = period_c >> 16; // The prescaler is an extension of the timer counter - *period_out = period_c; - - if (prescaler > 0xFF && maxcount == 0xFFFF) { - goto error; - } - // check limit values for the duty cycle - if (ch->duty_cycle == 0) { - *match_out = period_c - 1; - } else { - if (period_c > 0xFFFF) { - uint32_t match = (period_c * 100) / 10000; - *match_out = period_c - ((match * ch->duty_cycle) / 100); - } else { - *match_out = period_c - ((period_c * ch->duty_cycle) / 10000); - } - } - return prescaler; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC void timer_init (pyb_timer_obj_t *tim) { - MAP_PRCMPeripheralClkEnable(tim->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(tim->peripheral); - MAP_TimerConfigure(tim->timer, tim->config); -} - -STATIC void timer_channel_init (pyb_timer_channel_obj_t *ch) { - // calculate the period, the prescaler and the match value - uint32_t period_c; - uint32_t match; - uint32_t prescaler = compute_prescaler_period_and_match_value(ch, &period_c, &match); - - // set the prescaler - MAP_TimerPrescaleSet(ch->timer->timer, ch->channel, (prescaler < 0xFF) ? prescaler : 0); - - // set the load value - MAP_TimerLoadSet(ch->timer->timer, ch->channel, period_c); - - // configure the pwm if we are in such mode - if ((ch->timer->config & 0x0F) == TIMER_CFG_A_PWM) { - // invert the timer output if required - MAP_TimerControlLevel(ch->timer->timer, ch->channel, (ch->polarity == PYBTIMER_POLARITY_NEG) ? true : false); - // set the match value (which is simply the duty cycle translated to ticks) - MAP_TimerMatchSet(ch->timer->timer, ch->channel, match); - MAP_TimerPrescaleMatchSet(ch->timer->timer, ch->channel, match >> 16); - } - -#ifdef DEBUG - // stall the timer when the processor is halted while debugging - MAP_TimerControlStall(ch->timer->timer, ch->channel, true); -#endif - - // now enable the timer channel - MAP_TimerEnable(ch->timer->timer, ch->channel); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *tim = self_in; - uint32_t mode = tim->config & 0xFF; - - // timer mode - qstr mode_qst = MP_QSTR_PWM; - switch(mode) { - case TIMER_CFG_A_ONE_SHOT_UP: - mode_qst = MP_QSTR_ONE_SHOT; - break; - case TIMER_CFG_A_PERIODIC_UP: - mode_qst = MP_QSTR_PERIODIC; - break; - default: - break; - } - mp_printf(print, "Timer(%u, mode=Timer.%q)", tim->id, mode_qst); -} - -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *tim, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, }, - { MP_QSTR_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 16} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // check the mode - uint32_t _mode = args[0].u_int; - if (_mode != TIMER_CFG_A_ONE_SHOT_UP && _mode != TIMER_CFG_A_PERIODIC_UP && _mode != TIMER_CFG_A_PWM) { - goto error; - } - - // check the width - if (args[1].u_int != 16 && args[1].u_int != 32) { - goto error; - } - bool is16bit = (args[1].u_int == 16); - - if (!is16bit && _mode == TIMER_CFG_A_PWM) { - // 32-bit mode is only available when in free running modes - goto error; - } - tim->config = is16bit ? ((_mode | (_mode << 8)) | TIMER_CFG_SPLIT_PAIR) : _mode; - - timer_init(tim); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)tim, (WakeUpCB_t)timer_init); - - return mp_const_none; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create a new Timer object - int32_t timer_idx = mp_obj_get_int(args[0]); - if (timer_idx < 0 || timer_idx > (PYBTIMER_NUM_TIMERS - 1)) { - mp_raise_OSError(MP_ENODEV); - } - - pyb_timer_obj_t *tim = &pyb_timer_obj[timer_idx]; - tim->base.type = &pyb_timer_type; - tim->id = timer_idx; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - timer_disable(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PYBTIMER_POLARITY_POS} }, - { MP_QSTR_duty_cycle, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - pyb_timer_obj_t *tim = pos_args[0]; - mp_int_t channel_n = mp_obj_get_int(pos_args[1]); - - // verify that the timer has been already initialized - if (!tim->config) { - mp_raise_OSError(MP_EPERM); - } - if (channel_n != TIMER_A && channel_n != TIMER_B && channel_n != (TIMER_A | TIMER_B)) { - // invalid channel - goto error; - } - if (channel_n == (TIMER_A | TIMER_B) && (tim->config & TIMER_CFG_SPLIT_PAIR)) { - // 32-bit channel selected when the timer is in 16-bit mode - goto error; - } - - // if only the channel number is given return the previously - // allocated channel (or None if no previous channel) - if (n_args == 2 && kw_args->used == 0) { - pyb_timer_channel_obj_t *ch; - if ((ch = pyb_timer_channel_find(tim->timer, channel_n))) { - return ch; - } - return mp_const_none; - } - - // parse the arguments - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // throw an exception if both frequency and period are given - if (args[0].u_int != 0 && args[1].u_int != 0) { - goto error; - } - // check that at least one of them has a valid value - if (args[0].u_int <= 0 && args[1].u_int <= 0) { - goto error; - } - // check that the polarity is not 'both' in pwm mode - if ((tim->config & TIMER_A) == TIMER_CFG_A_PWM && args[2].u_int == (PYBTIMER_POLARITY_POS | PYBTIMER_POLARITY_NEG)) { - goto error; - } - - // allocate a new timer channel - pyb_timer_channel_obj_t *ch = m_new_obj(pyb_timer_channel_obj_t); - ch->base.type = &pyb_timer_channel_type; - ch->timer = tim; - ch->channel = channel_n; - - // get the frequency the polarity and the duty cycle - ch->frequency = args[0].u_int; - ch->period = args[1].u_int; - ch->polarity = args[2].u_int; - ch->duty_cycle = MIN(10000, MAX(0, args[3].u_int)); - - timer_channel_init(ch); - - // assign the pin - if ((ch->timer->config & 0x0F) == TIMER_CFG_A_PWM) { - uint32_t ch_idx = (ch->channel == TIMER_A) ? 0 : 1; - // use the default pin if available - mp_obj_t pin_o = (mp_obj_t)pyb_timer_pwm_pin[(ch->timer->id * 2) + ch_idx]; - if (pin_o != MP_OBJ_NULL) { - pin_obj_t *pin = pin_find(pin_o); - pin_config (pin, pin_find_af_index(pin, PIN_FN_TIM, ch->timer->id, PIN_TYPE_TIM_PWM), - 0, PIN_TYPE_STD, -1, PIN_STRENGTH_4MA); - } - } - - // add the timer to the list - pyb_timer_channel_add(ch); - - return ch; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_A), MP_ROM_INT(TIMER_A) }, - { MP_ROM_QSTR(MP_QSTR_B), MP_ROM_INT(TIMER_B) }, - { MP_ROM_QSTR(MP_QSTR_ONE_SHOT), MP_ROM_INT(TIMER_CFG_A_ONE_SHOT_UP) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(TIMER_CFG_A_PERIODIC_UP) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(TIMER_CFG_A_PWM) }, - { MP_ROM_QSTR(MP_QSTR_POSITIVE), MP_ROM_INT(PYBTIMER_POLARITY_POS) }, - { MP_ROM_QSTR(MP_QSTR_NEGATIVE), MP_ROM_INT(PYBTIMER_POLARITY_NEG) }, - { MP_ROM_QSTR(MP_QSTR_TIMEOUT), MP_ROM_INT(PYBTIMER_TIMEOUT_TRIGGER) }, - { MP_ROM_QSTR(MP_QSTR_MATCH), MP_ROM_INT(PYBTIMER_MATCH_TRIGGER) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_t)&pyb_timer_locals_dict, -}; - -STATIC const mp_irq_methods_t pyb_timer_channel_irq_methods = { - .init = pyb_timer_channel_irq, - .enable = pyb_timer_channel_irq_enable, - .disable = pyb_timer_channel_irq_disable, - .flags = pyb_timer_channel_irq_flags, -}; - -STATIC void TIMERGenericIntHandler(uint32_t timer, uint16_t channel) { - pyb_timer_channel_obj_t *self; - uint32_t status; - if ((self = pyb_timer_channel_find(timer, channel))) { - status = MAP_TimerIntStatus(self->timer->timer, true) & self->channel; - MAP_TimerIntClear(self->timer->timer, status); - mp_irq_handler(mp_irq_find(self)); - } -} - -STATIC void TIMER0AIntHandler(void) { - TIMERGenericIntHandler(TIMERA0_BASE, TIMER_A); -} - -STATIC void TIMER0BIntHandler(void) { - TIMERGenericIntHandler(TIMERA0_BASE, TIMER_B); -} - -STATIC void TIMER1AIntHandler(void) { - TIMERGenericIntHandler(TIMERA1_BASE, TIMER_A); -} - -STATIC void TIMER1BIntHandler(void) { - TIMERGenericIntHandler(TIMERA1_BASE, TIMER_B); -} - -STATIC void TIMER2AIntHandler(void) { - TIMERGenericIntHandler(TIMERA2_BASE, TIMER_A); -} - -STATIC void TIMER2BIntHandler(void) { - TIMERGenericIntHandler(TIMERA2_BASE, TIMER_B); -} - -STATIC void TIMER3AIntHandler(void) { - TIMERGenericIntHandler(TIMERA3_BASE, TIMER_A); -} - -STATIC void TIMER3BIntHandler(void) { - TIMERGenericIntHandler(TIMERA3_BASE, TIMER_B); -} - -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *ch = self_in; - char *ch_id = "AB"; - // timer channel - if (ch->channel == TIMER_A) { - ch_id = "A"; - } else if (ch->channel == TIMER_B) { - ch_id = "B"; - } - - mp_printf(print, "timer.channel(Timer.%s, %q=%u", ch_id, MP_QSTR_freq, ch->frequency); - - uint32_t mode = ch->timer->config & 0xFF; - if (mode == TIMER_CFG_A_PWM) { - mp_printf(print, ", %q=Timer.", MP_QSTR_polarity); - switch (ch->polarity) { - case PYBTIMER_POLARITY_POS: - mp_printf(print, "POSITIVE"); - break; - case PYBTIMER_POLARITY_NEG: - mp_printf(print, "NEGATIVE"); - break; - default: - mp_printf(print, "BOTH"); - break; - } - mp_printf(print, ", %q=%u.%02u", MP_QSTR_duty_cycle, ch->duty_cycle / 100, ch->duty_cycle % 100); - } - mp_printf(print, ")"); -} - -STATIC mp_obj_t pyb_timer_channel_freq(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->frequency); - } else { - // set - int32_t _frequency = mp_obj_get_int(args[1]); - if (_frequency <= 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - ch->frequency = _frequency; - ch->period = 1000000 / _frequency; - timer_channel_init(ch); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_freq_obj, 1, 2, pyb_timer_channel_freq); - -STATIC mp_obj_t pyb_timer_channel_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->period); - } else { - // set - int32_t _period = mp_obj_get_int(args[1]); - if (_period <= 0) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - ch->period = _period; - ch->frequency = 1000000 / _period; - timer_channel_init(ch); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_period_obj, 1, 2, pyb_timer_channel_period); - -STATIC mp_obj_t pyb_timer_channel_duty_cycle(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *ch = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(ch->duty_cycle); - } else { - // duty cycle must be converted from percentage to ticks - // calculate the period, the prescaler and the match value - uint32_t period_c; - uint32_t match; - ch->duty_cycle = MIN(10000, MAX(0, mp_obj_get_int(args[1]))); - compute_prescaler_period_and_match_value(ch, &period_c, &match); - if (n_args == 3) { - // set the new polarity if requested - ch->polarity = mp_obj_get_int(args[2]); - MAP_TimerControlLevel(ch->timer->timer, ch->channel, (ch->polarity == PYBTIMER_POLARITY_NEG) ? true : false); - } - MAP_TimerMatchSet(ch->timer->timer, ch->channel, match); - MAP_TimerPrescaleMatchSet(ch->timer->timer, ch->channel, match >> 16); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_duty_cycle_obj, 1, 3, pyb_timer_channel_duty_cycle); - -STATIC mp_obj_t pyb_timer_channel_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - pyb_timer_channel_obj_t *ch = pos_args[0]; - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // validate the power mode - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (pwrmode != PYB_PWR_MODE_ACTIVE) { - goto invalid_args; - } - - // get the trigger - uint trigger = mp_obj_get_int(args[0].u_obj); - - // disable the callback first - pyb_timer_channel_irq_disable(ch); - - uint8_t shift = (ch->channel == TIMER_B) ? 8 : 0; - uint32_t _config = (ch->channel == TIMER_B) ? ((ch->timer->config & TIMER_B) >> 8) : (ch->timer->config & TIMER_A); - switch (_config) { - case TIMER_CFG_A_ONE_SHOT_UP: - case TIMER_CFG_A_PERIODIC_UP: - ch->timer->irq_trigger |= TIMER_TIMA_TIMEOUT << shift; - if (trigger != PYBTIMER_TIMEOUT_TRIGGER) { - goto invalid_args; - } - break; - case TIMER_CFG_A_PWM: - // special case for the PWM match interrupt - ch->timer->irq_trigger |= ((ch->channel & TIMER_A) == TIMER_A) ? TIMER_TIMA_MATCH : TIMER_TIMB_MATCH; - if (trigger != PYBTIMER_MATCH_TRIGGER) { - goto invalid_args; - } - break; - default: - break; - } - // special case for a 32-bit timer - if (ch->channel == (TIMER_A | TIMER_B)) { - ch->timer->irq_trigger |= (ch->timer->irq_trigger << 8); - } - - void (*pfnHandler)(void); - uint32_t intregister; - switch (ch->timer->timer) { - case TIMERA0_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER0BIntHandler; - intregister = INT_TIMERA0B; - } else { - pfnHandler = &TIMER0AIntHandler; - intregister = INT_TIMERA0A; - } - break; - case TIMERA1_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER1BIntHandler; - intregister = INT_TIMERA1B; - } else { - pfnHandler = &TIMER1AIntHandler; - intregister = INT_TIMERA1A; - } - break; - case TIMERA2_BASE: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER2BIntHandler; - intregister = INT_TIMERA2B; - } else { - pfnHandler = &TIMER2AIntHandler; - intregister = INT_TIMERA2A; - } - break; - default: - if (ch->channel == TIMER_B) { - pfnHandler = &TIMER3BIntHandler; - intregister = INT_TIMERA3B; - } else { - pfnHandler = &TIMER3AIntHandler; - intregister = INT_TIMERA3A; - } - break; - } - - // register the interrupt and configure the priority - MAP_IntPrioritySet(intregister, priority); - MAP_TimerIntRegister(ch->timer->timer, ch->channel, pfnHandler); - - // create the callback - mp_obj_t _irq = mp_irq_new (ch, args[2].u_obj, &pyb_timer_channel_irq_methods); - - // enable the callback before returning - pyb_timer_channel_irq_enable(ch); - - return _irq; - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_irq_obj, 1, pyb_timer_channel_irq); - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_timer_channel_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_channel_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty_cycle), MP_ROM_PTR(&pyb_timer_channel_duty_cycle_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_timer_channel_irq_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_t)&pyb_timer_channel_locals_dict, -}; - diff --git a/ports/cc3200/mods/pybtimer.h b/ports/cc3200/mods/pybtimer.h deleted file mode 100644 index 0af0864ca111c..0000000000000 --- a/ports/cc3200/mods/pybtimer.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H - -/****************************************************************************** - DECLARE EXPORTED DATA - ******************************************************************************/ -extern const mp_obj_type_t pyb_timer_type; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void timer_init0 (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBTIMER_H diff --git a/ports/cc3200/mods/pybuart.c b/ports/cc3200/mods/pybuart.c deleted file mode 100644 index 35c0de9f958bd..0000000000000 --- a/ports/cc3200/mods/pybuart.c +++ /dev/null @@ -1,669 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/objlist.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "lib/utils/interrupt_char.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "inc/hw_uart.h" -#include "rom_map.h" -#include "interrupt.h" -#include "prcm.h" -#include "uart.h" -#include "pybuart.h" -#include "mpirq.h" -#include "pybsleep.h" -#include "mpexception.h" -#include "osi.h" -#include "utils.h" -#include "pin.h" -#include "pybpin.h" -#include "pins.h" -#include "moduos.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus - -/****************************************************************************** - DEFINE CONSTANTS - *******-***********************************************************************/ -#define PYBUART_FRAME_TIME_US(baud) ((11 * 1000000) / baud) -#define PYBUART_2_FRAMES_TIME_US(baud) (PYBUART_FRAME_TIME_US(baud) * 2) -#define PYBUART_RX_TIMEOUT_US(baud) (PYBUART_2_FRAMES_TIME_US(baud) * 8) // we need at least characters in the FIFO - -#define PYBUART_TX_WAIT_US(baud) ((PYBUART_FRAME_TIME_US(baud)) + 1) -#define PYBUART_TX_MAX_TIMEOUT_MS (5) - -#define PYBUART_RX_BUFFER_LEN (256) - -// interrupt triggers -#define UART_TRIGGER_RX_ANY (0x01) -#define UART_TRIGGER_RX_HALF (0x02) -#define UART_TRIGGER_RX_FULL (0x04) -#define UART_TRIGGER_TX_DONE (0x08) - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void uart_init (pyb_uart_obj_t *self); -STATIC bool uart_rx_wait (pyb_uart_obj_t *self); -STATIC void uart_check_init(pyb_uart_obj_t *self); -STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler); -STATIC void UARTGenericIntHandler(uint32_t uart_id); -STATIC void UART0IntHandler(void); -STATIC void UART1IntHandler(void); -STATIC void uart_irq_enable (mp_obj_t self_in); -STATIC void uart_irq_disable (mp_obj_t self_in); - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -struct _pyb_uart_obj_t { - mp_obj_base_t base; - pyb_uart_id_t uart_id; - uint reg; - uint baudrate; - uint config; - uint flowcontrol; - byte *read_buf; // read buffer pointer - volatile uint16_t read_buf_head; // indexes first empty slot - uint16_t read_buf_tail; // indexes first full slot (not full if equals head) - byte peripheral; - byte irq_trigger; - bool irq_enabled; - byte irq_flags; -}; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_uart_obj_t pyb_uart_obj[PYB_NUM_UARTS] = { {.reg = UARTA0_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA0}, - {.reg = UARTA1_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA1} }; -STATIC const mp_irq_methods_t uart_irq_methods; - -STATIC const mp_obj_t pyb_uart_def_pin[PYB_NUM_UARTS][2] = { {&pin_GP1, &pin_GP2}, {&pin_GP3, &pin_GP4} }; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void uart_init0 (void) { - // save references of the UART objects, to prevent the read buffers from being trashed by the gc - MP_STATE_PORT(pyb_uart_objs)[0] = &pyb_uart_obj[0]; - MP_STATE_PORT(pyb_uart_objs)[1] = &pyb_uart_obj[1]; -} - -uint32_t uart_rx_any(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via irq - return (self->read_buf_head > self->read_buf_tail) ? self->read_buf_head - self->read_buf_tail : - PYBUART_RX_BUFFER_LEN - self->read_buf_tail + self->read_buf_head; - } - return MAP_UARTCharsAvail(self->reg) ? 1 : 0; -} - -int uart_rx_char(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via irq - int data = self->read_buf[self->read_buf_tail]; - self->read_buf_tail = (self->read_buf_tail + 1) % PYBUART_RX_BUFFER_LEN; - return data; - } else { - // no buffering - return MAP_UARTCharGetNonBlocking(self->reg); - } -} - -bool uart_tx_char(pyb_uart_obj_t *self, int c) { - uint32_t timeout = 0; - while (!MAP_UARTCharPutNonBlocking(self->reg, c)) { - if (timeout++ > ((PYBUART_TX_MAX_TIMEOUT_MS * 1000) / PYBUART_TX_WAIT_US(self->baudrate))) { - return false; - } - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_TX_WAIT_US(self->baudrate))); - } - return true; -} - -bool uart_tx_strn(pyb_uart_obj_t *self, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - if (!uart_tx_char(self, *str)) { - return false; - } - } - return true; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -// assumes init parameters have been set up correctly -STATIC void uart_init (pyb_uart_obj_t *self) { - // Enable the peripheral clock - MAP_PRCMPeripheralClkEnable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - // Reset the uart - MAP_PRCMPeripheralReset(self->peripheral); - - // re-allocate the read buffer after resetting the uart (which automatically disables any irqs) - self->read_buf_head = 0; - self->read_buf_tail = 0; - self->read_buf = MP_OBJ_NULL; // free the read buffer before allocating again - self->read_buf = m_new(byte, PYBUART_RX_BUFFER_LEN); - - // Initialize the UART - MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(self->peripheral), - self->baudrate, self->config); - - // Enable the FIFO - MAP_UARTFIFOEnable(self->reg); - - // Configure the FIFO interrupt levels - MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8); - - // Configure the flow control mode - UARTFlowControlSet(self->reg, self->flowcontrol); -} - -// Waits at most timeout microseconds for at least 1 char to become ready for -// reading (from buf or for direct reading). -// Returns true if something available, false if not. -STATIC bool uart_rx_wait (pyb_uart_obj_t *self) { - int timeout = PYBUART_RX_TIMEOUT_US(self->baudrate); - for ( ; ; ) { - if (uart_rx_any(self)) { - return true; // we have at least 1 char ready for reading - } - if (timeout > 0) { - UtilsDelay(UTILS_DELAY_US_TO_COUNT(1)); - timeout--; - } - else { - return false; - } - } -} - -STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler) { - // disable the uart interrupts before updating anything - uart_irq_disable (self); - - if (self->uart_id == PYB_UART_0) { - MAP_IntPrioritySet(INT_UARTA0, priority); - MAP_UARTIntRegister(self->reg, UART0IntHandler); - } else { - MAP_IntPrioritySet(INT_UARTA1, priority); - MAP_UARTIntRegister(self->reg, UART1IntHandler); - } - - // create the callback - mp_obj_t _irq = mp_irq_new ((mp_obj_t)self, handler, &uart_irq_methods); - - // enable the interrupts now - self->irq_trigger = trigger; - uart_irq_enable (self); - return _irq; -} - -STATIC void UARTGenericIntHandler(uint32_t uart_id) { - pyb_uart_obj_t *self; - uint32_t status; - - self = &pyb_uart_obj[uart_id]; - status = MAP_UARTIntStatus(self->reg, true); - // receive interrupt - if (status & (UART_INT_RX | UART_INT_RT)) { - // set the flags - self->irq_flags = UART_TRIGGER_RX_ANY; - MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); - while (UARTCharsAvail(self->reg)) { - int data = MAP_UARTCharGetNonBlocking(self->reg); - if (MP_STATE_PORT(os_term_dup_obj) && MP_STATE_PORT(os_term_dup_obj)->stream_o == self && data == mp_interrupt_char) { - // raise an exception when interrupts are finished - mp_keyboard_interrupt(); - } else { // there's always a read buffer available - uint16_t next_head = (self->read_buf_head + 1) % PYBUART_RX_BUFFER_LEN; - if (next_head != self->read_buf_tail) { - // only store data if room in buf - self->read_buf[self->read_buf_head] = data; - self->read_buf_head = next_head; - } - } - } - } - - // check the flags to see if the user handler should be called - if ((self->irq_trigger & self->irq_flags) && self->irq_enabled) { - // call the user defined handler - mp_irq_handler(mp_irq_find(self)); - } - - // clear the flags - self->irq_flags = 0; -} - -STATIC void uart_check_init(pyb_uart_obj_t *self) { - // not initialized - if (!self->baudrate) { - mp_raise_OSError(MP_EPERM); - } -} - -STATIC void UART0IntHandler(void) { - UARTGenericIntHandler(0); -} - -STATIC void UART1IntHandler(void) { - UARTGenericIntHandler(1); -} - -STATIC void uart_irq_enable (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - // check for any of the rx interrupt types - if (self->irq_trigger & (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL)) { - MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); - MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT); - } - self->irq_enabled = true; -} - -STATIC void uart_irq_disable (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - self->irq_enabled = false; -} - -STATIC int uart_irq_flags (mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - return self->irq_flags; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (self->baudrate > 0) { - mp_printf(print, "UART(%u, baudrate=%u, bits=", self->uart_id, self->baudrate); - switch (self->config & UART_CONFIG_WLEN_MASK) { - case UART_CONFIG_WLEN_5: - mp_print_str(print, "5"); - break; - case UART_CONFIG_WLEN_6: - mp_print_str(print, "6"); - break; - case UART_CONFIG_WLEN_7: - mp_print_str(print, "7"); - break; - case UART_CONFIG_WLEN_8: - mp_print_str(print, "8"); - break; - default: - break; - } - if ((self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_NONE) { - mp_print_str(print, ", parity=None"); - } else { - mp_printf(print, ", parity=UART.%q", (self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_EVEN ? MP_QSTR_EVEN : MP_QSTR_ODD); - } - mp_printf(print, ", stop=%u)", (self->config & UART_CONFIG_STOP_MASK) == UART_CONFIG_STOP_ONE ? 1 : 2); - } - else { - mp_printf(print, "UART(%u)", self->uart_id); - } -} - -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, const mp_arg_val_t *args) { - // get the baudrate - if (args[0].u_int <= 0) { - goto error; - } - uint baudrate = args[0].u_int; - uint config; - switch (args[1].u_int) { - case 5: - config = UART_CONFIG_WLEN_5; - break; - case 6: - config = UART_CONFIG_WLEN_6; - break; - case 7: - config = UART_CONFIG_WLEN_7; - break; - case 8: - config = UART_CONFIG_WLEN_8; - break; - default: - goto error; - break; - } - // parity - if (args[2].u_obj == mp_const_none) { - config |= UART_CONFIG_PAR_NONE; - } else { - uint parity = mp_obj_get_int(args[2].u_obj); - if (parity == 0) { - config |= UART_CONFIG_PAR_EVEN; - } else if (parity == 1) { - config |= UART_CONFIG_PAR_ODD; - } else { - goto error; - } - } - // stop bits - config |= (args[3].u_int == 1 ? UART_CONFIG_STOP_ONE : UART_CONFIG_STOP_TWO); - - // assign the pins - mp_obj_t pins_o = args[4].u_obj; - uint flowcontrol = UART_FLOWCONTROL_NONE; - if (pins_o != mp_const_none) { - mp_obj_t *pins; - size_t n_pins = 2; - if (pins_o == MP_OBJ_NULL) { - // use the default pins - pins = (mp_obj_t *)pyb_uart_def_pin[self->uart_id]; - } else { - mp_obj_get_array(pins_o, &n_pins, &pins); - if (n_pins != 2 && n_pins != 4) { - goto error; - } - if (n_pins == 4) { - if (pins[PIN_TYPE_UART_RTS] != mp_const_none && pins[PIN_TYPE_UART_RX] == mp_const_none) { - goto error; // RTS pin given in TX only mode - } else if (pins[PIN_TYPE_UART_CTS] != mp_const_none && pins[PIN_TYPE_UART_TX] == mp_const_none) { - goto error; // CTS pin given in RX only mode - } else { - if (pins[PIN_TYPE_UART_RTS] != mp_const_none) { - flowcontrol |= UART_FLOWCONTROL_RX; - } - if (pins[PIN_TYPE_UART_CTS] != mp_const_none) { - flowcontrol |= UART_FLOWCONTROL_TX; - } - } - } - } - pin_assign_pins_af (pins, n_pins, PIN_TYPE_STD_PU, PIN_FN_UART, self->uart_id); - } - - self->baudrate = baudrate; - self->config = config; - self->flowcontrol = flowcontrol; - - // initialize and enable the uart - uart_init (self); - // register it with the sleep module - pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)uart_init); - // enable the callback - uart_irq_new (self, UART_TRIGGER_RX_ANY, INT_PRIORITY_LVL_3, mp_const_none); - // disable the irq (from the user point of view) - uart_irq_disable(self); - - return mp_const_none; - -error: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} - -STATIC const mp_arg_t pyb_uart_init_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_pins, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_uart_init_args, args); - - // work out the uart id - uint uart_id; - if (args[0].u_obj == MP_OBJ_NULL) { - if (args[5].u_obj != MP_OBJ_NULL) { - mp_obj_t *pins; - size_t n_pins = 2; - mp_obj_get_array(args[5].u_obj, &n_pins, &pins); - // check the Tx pin (or the Rx if Tx is None) - if (pins[0] == mp_const_none) { - uart_id = pin_find_peripheral_unit(pins[1], PIN_FN_UART, PIN_TYPE_UART_RX); - } else { - uart_id = pin_find_peripheral_unit(pins[0], PIN_FN_UART, PIN_TYPE_UART_TX); - } - } else { - // default id - uart_id = 0; - } - } else { - uart_id = mp_obj_get_int(args[0].u_obj); - } - - if (uart_id > PYB_UART_1) { - mp_raise_OSError(MP_ENODEV); - } - - // get the correct uart instance - pyb_uart_obj_t *self = &pyb_uart_obj[uart_id]; - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - - // start the peripheral - pyb_uart_init_helper(self, &args[1]); - - return self; -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args) - 1]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_uart_init_args[1], args); - return pyb_uart_init_helper(pos_args[0], args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - - // unregister it with the sleep module - pyb_sleep_remove (self); - // invalidate the baudrate - self->baudrate = 0; - // free the read buffer - m_del(byte, self->read_buf, PYBUART_RX_BUFFER_LEN); - MAP_UARTIntDisable(self->reg, UART_INT_RX | UART_INT_RT); - MAP_UARTDisable(self->reg); - MAP_PRCMPeripheralClkDisable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - uart_check_init(self); - return mp_obj_new_int(uart_rx_any(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - uart_check_init(self); - // send a break signal for at least 2 complete frames - MAP_UARTBreakCtl(self->reg, true); - UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_2_FRAMES_TIME_US(self->baudrate))); - MAP_UARTBreakCtl(self->reg, false); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak); - -/// \method irq(trigger, priority, handler, wake) -STATIC mp_obj_t pyb_uart_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); - - // check if any parameters were passed - pyb_uart_obj_t *self = pos_args[0]; - uart_check_init(self); - - // convert the priority to the correct value - uint priority = mp_irq_translate_priority (args[1].u_int); - - // check the power mode - uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); - if (PYB_PWR_MODE_ACTIVE != pwrmode) { - goto invalid_args; - } - - // check the trigger - uint trigger = mp_obj_get_int(args[0].u_obj); - if (!trigger || trigger > (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL | UART_TRIGGER_TX_DONE)) { - goto invalid_args; - } - - // register a new callback - return uart_irq_new (self, trigger, priority, args[2].u_obj); - -invalid_args: - mp_raise_ValueError(mpexception_value_invalid_arguments); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_irq_obj, 1, pyb_uart_irq); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_uart_irq_obj) }, - - /// \method read([nbytes]) - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - /// \method readline() - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - /// \method readinto(buf[, nbytes]) - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - /// \method write(buf) - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_RX_ANY), MP_ROM_INT(UART_TRIGGER_RX_ANY) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - byte *buf = buf_in; - uart_check_init(self); - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self)) { - // return MP_EAGAIN error to indicate non-blocking (then read() method returns None) - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - byte *orig_buf = buf; - for ( ; ; ) { - *buf++ = uart_rx_char(self); - if (--size == 0 || !uart_rx_wait(self)) { - // return number of bytes read - return buf - orig_buf; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - const char *buf = buf_in; - uart_check_init(self); - - // write the data - if (!uart_tx_strn(self, buf, size)) { - mp_raise_OSError(MP_EIO); - } - return size; -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - uart_check_init(self); - - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && MAP_UARTSpaceAvail(self->reg)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -STATIC const mp_irq_methods_t uart_irq_methods = { - .init = pyb_uart_irq, - .enable = uart_irq_enable, - .disable = uart_irq_disable, - .flags = uart_irq_flags -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_t)&pyb_uart_locals_dict, -}; diff --git a/ports/cc3200/mods/pybuart.h b/ports/cc3200/mods/pybuart.h deleted file mode 100644 index d481242f1fa37..0000000000000 --- a/ports/cc3200/mods/pybuart.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBUART_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBUART_H - -typedef enum { - PYB_UART_0 = 0, - PYB_UART_1 = 1, - PYB_NUM_UARTS -} pyb_uart_id_t; - -typedef struct _pyb_uart_obj_t pyb_uart_obj_t; -extern const mp_obj_type_t pyb_uart_type; - -void uart_init0(void); -uint32_t uart_rx_any(pyb_uart_obj_t *uart_obj); -int uart_rx_char(pyb_uart_obj_t *uart_obj); -bool uart_tx_char(pyb_uart_obj_t *self, int c); -bool uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBUART_H diff --git a/ports/cc3200/mods/pybwdt.c b/ports/cc3200/mods/pybwdt.c deleted file mode 100644 index 4a9fafc4a9945..0000000000000 --- a/ports/cc3200/mods/pybwdt.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "inc/hw_types.h" -#include "inc/hw_gpio.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "wdt.h" -#include "prcm.h" -#include "utils.h" -#include "pybwdt.h" -#include "mpexception.h" -#include "mperror.h" - - -/****************************************************************************** - DECLARE CONSTANTS - ******************************************************************************/ -#define PYBWDT_MILLISECONDS_TO_TICKS(ms) ((80000000 / 1000) * (ms)) -#define PYBWDT_MIN_TIMEOUT_MS (1000) - -/****************************************************************************** - DECLARE TYPES - ******************************************************************************/ -typedef struct { - mp_obj_base_t base; - bool servers; - bool servers_sleeping; - bool simplelink; - bool running; -} pyb_wdt_obj_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -STATIC pyb_wdt_obj_t pyb_wdt_obj = {.servers = false, .servers_sleeping = false, .simplelink = false, .running = false}; - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -// must be called in main.c just after initializing the hal -__attribute__ ((section (".boot"))) -void pybwdt_init0 (void) { -} - -void pybwdt_srv_alive (void) { - pyb_wdt_obj.servers = true; -} - -void pybwdt_srv_sleeping (bool state) { - pyb_wdt_obj.servers_sleeping = state; -} - -void pybwdt_sl_alive (void) { - pyb_wdt_obj.simplelink = true; -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC const mp_arg_t pyb_wdt_init_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} }, // 5 s -}; -STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // check the arguments - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_wdt_init_args)]; - mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_wdt_init_args, args); - - if (args[0].u_obj != mp_const_none && mp_obj_get_int(args[0].u_obj) > 0) { - mp_raise_OSError(MP_ENODEV); - } - uint timeout_ms = args[1].u_int; - if (timeout_ms < PYBWDT_MIN_TIMEOUT_MS) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - if (pyb_wdt_obj.running) { - mp_raise_OSError(MP_EPERM); - } - - // Enable the WDT peripheral clock - MAP_PRCMPeripheralClkEnable(PRCM_WDT, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - // Unlock to be able to configure the registers - MAP_WatchdogUnlock(WDT_BASE); - -#ifdef DEBUG - // make the WDT stall when the debugger stops on a breakpoint - MAP_WatchdogStallEnable (WDT_BASE); -#endif - - // set the watchdog timer reload value - // the WDT trigger a system reset after the second timeout - // so, divide by 2 the timeout value received - MAP_WatchdogReloadSet(WDT_BASE, PYBWDT_MILLISECONDS_TO_TICKS(timeout_ms / 2)); - - // start the timer. Once it's started, it cannot be disabled. - MAP_WatchdogEnable(WDT_BASE); - pyb_wdt_obj.base.type = &pyb_wdt_type; - pyb_wdt_obj.running = true; - - return (mp_obj_t)&pyb_wdt_obj; -} - -STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) { - pyb_wdt_obj_t *self = self_in; - if ((self->servers || self->servers_sleeping) && self->simplelink && self->running) { - self->servers = false; - self->simplelink = false; - MAP_WatchdogIntClear(WDT_BASE); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed); - -STATIC const mp_rom_map_elem_t pybwdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pybwdt_locals_dict, pybwdt_locals_dict_table); - -const mp_obj_type_t pyb_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = pyb_wdt_make_new, - .locals_dict = (mp_obj_t)&pybwdt_locals_dict, -}; - diff --git a/ports/cc3200/mods/pybwdt.h b/ports/cc3200/mods/pybwdt.h deleted file mode 100644 index 275c49435c547..0000000000000 --- a/ports/cc3200/mods/pybwdt.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H -#define MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H - -#include "py/obj.h" - -extern const mp_obj_type_t pyb_wdt_type; - -void pybwdt_init0 (void); -void pybwdt_srv_alive (void); -void pybwdt_srv_sleeping (bool state); -void pybwdt_sl_alive (void); - -#endif // MICROPY_INCLUDED_CC3200_MODS_PYBWDT_H diff --git a/ports/cc3200/mpconfigport.h b/ports/cc3200/mpconfigport.h deleted file mode 100644 index 29ae9092b1912..0000000000000 --- a/ports/cc3200/mpconfigport.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#ifndef BOOTLOADER -#include "FreeRTOS.h" -#include "semphr.h" -#endif - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_STACK_CHECK (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_OPT_COMPUTED_GOTO (0) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0) -#define MICROPY_READER_VFS (1) -#ifndef DEBUG // we need ram on the launchxl while debugging -#define MICROPY_CPYTHON_COMPAT (1) -#else -#define MICROPY_CPYTHON_COMPAT (0) -#endif -#define MICROPY_QSTR_BYTES_IN_HASH (1) - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (2) -#define MICROPY_FATFS_MAX_LFN (MICROPY_ALLOC_PATH_MAX) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) // 1=SFN/ANSI 437=LFN/U.S.(OEM) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_REENTRANT (1) -#define MICROPY_FATFS_TIMEOUT (2500) -#define MICROPY_FATFS_SYNC_T SemaphoreHandle_t - -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (1) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT cc3200_help_text -#ifndef DEBUG -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_EXECFILE (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#else -#define MICROPY_PY_BUILTINS_STR_UNICODE (0) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_EXECFILE (0) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) -#endif -#define MICROPY_PY_MICROPYTHON_MEM_INFO (0) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UERRNO_ERRORCODE (0) -#define MICROPY_PY_THREAD (1) -#define MICROPY_PY_THREAD_GIL (1) -#define MICROPY_PY_UBINASCII (0) -#define MICROPY_PY_UCTYPES (0) -#define MICROPY_PY_UZLIB (0) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (0) -#define MICROPY_PY_UHASHLIB (0) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIME_MP_HAL (1) - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) -#define MICROPY_KBD_EXCEPTION (1) - -// We define our own list of errno constants to include in uerrno module -#define MICROPY_PY_UERRNO_LIST \ - X(EPERM) \ - X(EIO) \ - X(ENODEV) \ - X(EINVAL) \ - X(ETIMEDOUT) \ - -// TODO these should be generic, not bound to fatfs -#define mp_type_fileio fatfs_type_fileio -#define mp_type_textio fatfs_type_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, \ - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t machine_module; -extern const struct _mp_obj_module_t wipy_module; -extern const struct _mp_obj_module_t mp_module_ure; -extern const struct _mp_obj_module_t mp_module_ujson; -extern const struct _mp_obj_module_t mp_module_uos; -extern const struct _mp_obj_module_t mp_module_utime; -extern const struct _mp_obj_module_t mp_module_uselect; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_network; -extern const struct _mp_obj_module_t mp_module_ubinascii; -extern const struct _mp_obj_module_t mp_module_ussl; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_wipy), MP_ROM_PTR(&wipy_module) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_uselect), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, \ - { MP_ROM_QSTR(MP_QSTR_network), MP_ROM_PTR(&mp_module_network) }, \ - { MP_ROM_QSTR(MP_QSTR_ubinascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_ussl), MP_ROM_PTR(&mp_module_ussl) }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - { MP_ROM_QSTR(MP_QSTR_struct), MP_ROM_PTR(&mp_module_ustruct) }, \ - { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_os), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, \ - { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_ssl), MP_ROM_PTR(&mp_module_ussl) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - -// vm state and root pointers for the gc -#define MP_STATE_PORT MP_STATE_VM -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t mp_const_user_interrupt; \ - mp_obj_t machine_config_main; \ - mp_obj_list_t pyb_sleep_obj_list; \ - mp_obj_list_t mp_irq_obj_list; \ - mp_obj_list_t pyb_timer_channel_obj_list; \ - struct _pyb_uart_obj_t *pyb_uart_objs[2]; \ - struct _os_term_dup_obj_t *os_term_dup_obj; \ - - -// type definitions for the specific machine -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) -#define MP_SSIZE_MAX (0x7FFFFFFF) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) -#define MICROPY_EVENT_POLL_HOOK __WFI(); - -// assembly functions to handle critical sections, interrupt -// disabling/enabling and sleep mode enter/exit -#include "cc3200_asm.h" - -// We need to provide a declaration/definition of alloca() -#include - -// Include board specific configuration -#include "mpconfigboard.h" - -#define MICROPY_MPHALPORT_H "cc3200_hal.h" -#define MICROPY_PORT_HAS_TELNET (1) -#define MICROPY_PORT_HAS_FTP (1) -#define MICROPY_PY_SYS_PLATFORM "WiPy" - -#define MICROPY_PORT_WLAN_AP_SSID "wipy-wlan" -#define MICROPY_PORT_WLAN_AP_KEY "www.wipy.io" -#define MICROPY_PORT_WLAN_AP_SECURITY SL_SEC_TYPE_WPA_WPA2 -#define MICROPY_PORT_WLAN_AP_CHANNEL 5 diff --git a/ports/cc3200/mptask.c b/ports/cc3200/mptask.c deleted file mode 100644 index 81048d1e7ef99..0000000000000 --- a/ports/cc3200/mptask.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/stackctrl.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "lib/mp-readline/readline.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "inc/hw_memmap.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pin.h" -#include "prcm.h" -#include "interrupt.h" -#include "pybuart.h" -#include "pybpin.h" -#include "pybrtc.h" -#include "lib/utils/pyexec.h" -#include "gccollect.h" -#include "gchelper.h" -#include "mperror.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modusocket.h" -#include "modwlan.h" -#include "serverstask.h" -#include "telnet.h" -#include "debug.h" -#include "sflash_diskio.h" -#include "random.h" -#include "pybi2c.h" -#include "pins.h" -#include "mods/pybflash.h" -#include "pybsleep.h" -#include "pybtimer.h" -#include "cryptohash.h" -#include "mpirq.h" -#include "updater.h" -#include "moduos.h" -#include "antenna.h" -#include "task.h" - -/****************************************************************************** - DECLARE PRIVATE CONSTANTS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -STATIC void mptask_pre_init (void); -STATIC void mptask_init_sflash_filesystem (void); -STATIC void mptask_enter_ap_mode (void); -STATIC void mptask_create_main_py (void); - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ -#ifdef DEBUG -OsiTaskHandle svTaskHandle; -#endif - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static fs_user_mount_t *sflash_vfs_fat; - -static const char fresh_main_py[] = "# main.py -- put your code here!\r\n"; -static const char fresh_boot_py[] = "# boot.py -- run on boot-up\r\n" - "# can run arbitrary Python, but best to keep it minimal\r\n" - #if MICROPY_STDIO_UART - "import os, machine\r\n" - "os.dupterm(machine.UART(0, " MP_STRINGIFY(MICROPY_STDIO_UART_BAUD) "))\r\n" - #endif - ; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ - -void TASK_MicroPython (void *pvParameters) { - // get the top of the stack to initialize the garbage collector - uint32_t sp = gc_helper_get_sp(); - - bool safeboot = false; - mptask_pre_init(); - -#ifndef DEBUG - safeboot = PRCMGetSpecialBit(PRCM_SAFE_BOOT_BIT); -#endif - -soft_reset: - - // Thread init - #if MICROPY_PY_THREAD - mp_thread_init(); - #endif - - // initialise the stack pointer for the main thread (must be done after mp_thread_init) - mp_stack_set_top((void*)sp); - - // GC init - gc_init(&_boot, &_eheap); - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_init(mp_sys_argv, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - - // execute all basic initializations - mp_irq_init0(); - pyb_sleep_init0(); - pin_init0(); - mperror_init0(); - uart_init0(); - timer_init0(); - readline_init0(); - mod_network_init0(); - rng_init0(); - - pybsleep_reset_cause_t rstcause = pyb_sleep_get_reset_cause(); - if (rstcause < PYB_SLP_SOFT_RESET) { - if (rstcause == PYB_SLP_HIB_RESET) { - // when waking up from hibernate we just want - // to enable simplelink and leave it as is - wlan_first_start(); - } - else { - // only if not comming out of hibernate or a soft reset - mptask_enter_ap_mode(); - } - - // enable telnet and ftp - servers_start(); - } - - // initialize the serial flash file system - mptask_init_sflash_filesystem(); - - // append the flash paths to the system path - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib)); - - // reset config variables; they should be set by boot.py - MP_STATE_PORT(machine_config_main) = MP_OBJ_NULL; - - if (!safeboot) { - // run boot.py - int ret = pyexec_file("boot.py", NULL); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - // flash the system led - mperror_signal_error(); - } - } - - // now we initialise sub-systems that need configuration from boot.py, - // or whose initialisation can be safely deferred until after running - // boot.py. - - // at this point everything is fully configured and initialised. - - if (!safeboot) { - // run the main script from the current directory. - if (pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) { - const char *main_py; - if (MP_STATE_PORT(machine_config_main) == MP_OBJ_NULL) { - main_py = "main.py"; - } else { - main_py = mp_obj_str_get_str(MP_STATE_PORT(machine_config_main)); - } - int ret = pyexec_file(main_py, NULL); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - // flash the system led - mperror_signal_error(); - } - } - } - - // main script is finished, so now go into REPL mode. - // the REPL mode can change, or it can request a soft reset. - for ( ; ; ) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - -soft_reset_exit: - - // soft reset - pyb_sleep_signal_soft_reset(); - mp_printf(&mp_plat_print, "PYB: soft reboot\n"); - - // disable all callbacks to avoid undefined behaviour - // when coming out of a soft reset - mp_irq_disable_all(); - - // cancel the RTC alarm which might be running independent of the irq state - pyb_rtc_disable_alarm(); - - // flush the serial flash buffer - sflash_disk_flush(); - - // clean-up the user socket space - modusocket_close_all_user_sockets(); - - // unmount all user file systems - osmount_unmount_all(); - - // wait for pending transactions to complete - mp_hal_delay_ms(20); - - goto soft_reset; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -__attribute__ ((section (".boot"))) -STATIC void mptask_pre_init (void) { - // this one only makes sense after a poweron reset - pyb_rtc_pre_init(); - - // Create the simple link spawn task - ASSERT (OSI_OK == VStartSimpleLinkSpawnTask(SIMPLELINK_SPAWN_TASK_PRIORITY)); - - // Allocate memory for the flash file system - ASSERT ((sflash_vfs_fat = mem_Malloc(sizeof(*sflash_vfs_fat))) != NULL); - - // this one allocates memory for the nvic vault - pyb_sleep_pre_init(); - - // this one allocates memory for the WLAN semaphore - wlan_pre_init(); - - // this one allocates memory for the updater semaphore - updater_pre_init(); - - // this one allocates memory for the socket semaphore - modusocket_pre_init(); - - //CRYPTOHASH_Init(); - -#ifndef DEBUG - OsiTaskHandle svTaskHandle; -#endif - svTaskHandle = xTaskCreateStatic(TASK_Servers, "Servers", - SERVERS_STACK_LEN, NULL, SERVERS_PRIORITY, svTaskStack, &svTaskTCB); - ASSERT(svTaskHandle != NULL); -} - -STATIC void mptask_init_sflash_filesystem (void) { - FILINFO fno; - - // Initialise the local flash filesystem. - // init the vfs object - fs_user_mount_t *vfs_fat = sflash_vfs_fat; - vfs_fat->flags = 0; - pyb_flash_init_vfs(vfs_fat); - - // Create it if needed, and mount in on /flash. - FRESULT res = f_mount(&vfs_fat->fatfs); - if (res == FR_NO_FILESYSTEM) { - // no filesystem, so create a fresh one - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT | FM_SFD, 0, working_buf, sizeof(working_buf)); - if (res == FR_OK) { - // success creating fresh LFS - } else { - __fatal_error("failed to create /flash"); - } - // create empty main.py - mptask_create_main_py(); - } else if (res == FR_OK) { - // mount sucessful - if (FR_OK != f_stat(&vfs_fat->fatfs, "/main.py", &fno)) { - // create empty main.py - mptask_create_main_py(); - } - } else { - fail: - __fatal_error("failed to create /flash"); - } - - // mount the flash device (there should be no other devices mounted at this point) - // we allocate this structure on the heap because vfs->next is a root pointer - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL) { - goto fail; - } - vfs->str = "/flash"; - vfs->len = 6; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; - - // create /flash/sys, /flash/lib and /flash/cert if they don't exist - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/sys")) { - f_mkdir(&vfs_fat->fatfs, "/sys"); - } - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/lib")) { - f_mkdir(&vfs_fat->fatfs, "/lib"); - } - if (FR_OK != f_chdir(&vfs_fat->fatfs, "/cert")) { - f_mkdir(&vfs_fat->fatfs, "/cert"); - } - - f_chdir(&vfs_fat->fatfs, "/"); - - // make sure we have a /flash/boot.py. Create it if needed. - res = f_stat(&vfs_fat->fatfs, "/boot.py", &fno); - if (res == FR_OK) { - if (fno.fattrib & AM_DIR) { - // exists as a directory - // TODO handle this case - // see http://elm-chan.org/fsw/ff/img/app2.c for a "rm -rf" implementation - } else { - // exists as a file, good! - } - } else { - // doesn't exist, create fresh file - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/boot.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_boot_py, sizeof(fresh_boot_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - } -} - -STATIC void mptask_enter_ap_mode (void) { - // append the mac only if it's not the first boot - bool add_mac = !PRCMGetSpecialBit(PRCM_FIRST_BOOT_BIT); - // enable simplelink in ap mode (use the MAC address to make the ssid unique) - wlan_sl_init (ROLE_AP, MICROPY_PORT_WLAN_AP_SSID, strlen(MICROPY_PORT_WLAN_AP_SSID), - MICROPY_PORT_WLAN_AP_SECURITY, MICROPY_PORT_WLAN_AP_KEY, strlen(MICROPY_PORT_WLAN_AP_KEY), - MICROPY_PORT_WLAN_AP_CHANNEL, ANTENNA_TYPE_INTERNAL, add_mac); -} - -STATIC void mptask_create_main_py (void) { - // create empty main.py - FIL fp; - f_open(&sflash_vfs_fat->fatfs, &fp, "/main.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_main_py, sizeof(fresh_main_py) - 1 /* don't count null terminator */, &n); - f_close(&fp); -} diff --git a/ports/cc3200/mptask.h b/ports/cc3200/mptask.h deleted file mode 100644 index a1c3eb2cbf45c..0000000000000 --- a/ports/cc3200/mptask.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_MPTASK_H -#define MICROPY_INCLUDED_CC3200_MPTASK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define MICROPY_TASK_PRIORITY (2) -#define MICROPY_TASK_STACK_SIZE ((6 * 1024) + 512) // in bytes -#define MICROPY_TASK_STACK_LEN (MICROPY_TASK_STACK_SIZE / sizeof(StackType_t)) - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern StackType_t mpTaskStack[]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void TASK_MicroPython (void *pvParameters); - -#endif // MICROPY_INCLUDED_CC3200_MPTASK_H diff --git a/ports/cc3200/mpthreadport.c b/ports/cc3200/mpthreadport.c deleted file mode 100644 index 9dbc518e06dcc..0000000000000 --- a/ports/cc3200/mpthreadport.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "py/mphal.h" -#include "mptask.h" -#include "task.h" -#include "irq.h" - -#if MICROPY_PY_THREAD - -// this structure forms a linked list, one node per active thread -typedef struct _thread_t { - TaskHandle_t id; // system id of thread - int ready; // whether the thread is ready and running - void *arg; // thread Python args, a GC root pointer - void *stack; // pointer to the stack - size_t stack_len; // number of words in the stack - struct _thread_t *next; -} thread_t; - -// the mutex controls access to the linked list -STATIC mp_thread_mutex_t thread_mutex; -STATIC thread_t thread_entry0; -STATIC thread_t *thread; // root pointer, handled bp mp_thread_gc_others - -void mp_thread_init(void) { - mp_thread_mutex_init(&thread_mutex); - mp_thread_set_state(&mp_state_ctx.thread); - - // create first entry in linked list of all threads - thread = &thread_entry0; - thread->id = xTaskGetCurrentTaskHandle(); - thread->ready = 1; - thread->arg = NULL; - thread->stack = mpTaskStack; - thread->stack_len = MICROPY_TASK_STACK_LEN; - thread->next = NULL; -} - -void mp_thread_gc_others(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - gc_collect_root((void**)&th, 1); - gc_collect_root(&th->arg, 1); // probably not needed - if (th->id == xTaskGetCurrentTaskHandle()) { - continue; - } - if (!th->ready) { - continue; - } - gc_collect_root(th->stack, th->stack_len); // probably not needed - } - mp_thread_mutex_unlock(&thread_mutex); -} - -mp_state_thread_t *mp_thread_get_state(void) { - return pvTaskGetThreadLocalStoragePointer(NULL, 0); -} - -void mp_thread_set_state(void *state) { - vTaskSetThreadLocalStoragePointer(NULL, 0, state); -} - -void mp_thread_start(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 1; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -STATIC void *(*ext_thread_entry)(void*) = NULL; - -STATIC void freertos_entry(void *arg) { - if (ext_thread_entry) { - ext_thread_entry(arg); - } - vTaskDelete(NULL); - for (;;) { - } -} - -void mp_thread_create(void *(*entry)(void*), void *arg, size_t *stack_size) { - // store thread entry function into a global variable so we can access it - ext_thread_entry = entry; - - if (*stack_size == 0) { - *stack_size = 4096; // default stack size - } else if (*stack_size < 2048) { - *stack_size = 2048; // minimum stack size - } - - // allocate TCB, stack and linked-list node (must be outside thread_mutex lock) - StaticTask_t *tcb = m_new(StaticTask_t, 1); - StackType_t *stack = m_new(StackType_t, *stack_size / sizeof(StackType_t)); - thread_t *th = m_new_obj(thread_t); - - mp_thread_mutex_lock(&thread_mutex, 1); - - // create thread - TaskHandle_t id = xTaskCreateStatic(freertos_entry, "Thread", *stack_size / sizeof(void*), arg, 2, stack, tcb); - if (id == NULL) { - mp_thread_mutex_unlock(&thread_mutex); - mp_raise_msg(&mp_type_OSError, "can't create thread"); - } - - // add thread to linked list of all threads - th->id = id; - th->ready = 0; - th->arg = arg; - th->stack = stack; - th->stack_len = *stack_size / sizeof(StackType_t); - th->next = thread; - thread = th; - - mp_thread_mutex_unlock(&thread_mutex); - - // adjust stack_size to provide room to recover from hitting the limit - *stack_size -= 512; -} - -void mp_thread_finish(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - // TODO unlink from list - for (thread_t *th = thread; th != NULL; th = th->next) { - if (th->id == xTaskGetCurrentTaskHandle()) { - th->ready = 0; - break; - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_mutex_init(mp_thread_mutex_t *mutex) { - mutex->handle = xSemaphoreCreateMutexStatic(&mutex->buffer); -} - -// To allow hard interrupts to work with threading we only take/give the semaphore -// if we are not within an interrupt context and interrupts are enabled. - -int mp_thread_mutex_lock(mp_thread_mutex_t *mutex, int wait) { - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - int ret = xSemaphoreTake(mutex->handle, wait ? portMAX_DELAY : 0); - return ret == pdTRUE; - } else { - return 1; - } -} - -void mp_thread_mutex_unlock(mp_thread_mutex_t *mutex) { - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - xSemaphoreGive(mutex->handle); - // TODO check return value - } -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/cc3200/mpthreadport.h b/ports/cc3200/mpthreadport.h deleted file mode 100644 index dc9ba99204e43..0000000000000 --- a/ports/cc3200/mpthreadport.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George on behalf of Pycom Ltd - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef BOOTLOADER -#include "FreeRTOS.h" -#endif - -typedef struct _mp_thread_mutex_t { - #ifndef BOOTLOADER - SemaphoreHandle_t handle; - StaticSemaphore_t buffer; - #endif -} mp_thread_mutex_t; - -void mp_thread_init(void); -void mp_thread_gc_others(void); diff --git a/ports/cc3200/qstrdefsport.h b/ports/cc3200/qstrdefsport.h deleted file mode 100644 index d5f22d70a8fca..0000000000000 --- a/ports/cc3200/qstrdefsport.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// for machine module -Q(/) -// entries for sys.path -Q(/flash) -Q(/flash/lib) diff --git a/ports/cc3200/serverstask.c b/ports/cc3200/serverstask.c deleted file mode 100644 index 100b8d33b0e1e..0000000000000 --- a/ports/cc3200/serverstask.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mpconfig.h" -#include "py/misc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "serverstask.h" -#include "simplelink.h" -#include "debug.h" -#include "telnet.h" -#include "ftp.h" -#include "pybwdt.h" -#include "modusocket.h" -#include "mpexception.h" -#include "modnetwork.h" -#include "modwlan.h" - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef struct { - uint32_t timeout; - bool enabled; - bool do_disable; - bool do_enable; - bool do_reset; - bool do_wlan_cycle_power; -} servers_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static servers_data_t servers_data = {.timeout = SERVERS_DEF_TIMEOUT_MS}; -static volatile bool sleep_sockets = false; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ - -/****************************************************************************** - DECLARE PUBLIC DATA - ******************************************************************************/ - -// This is the static memory (TCB and stack) for the servers task -StaticTask_t svTaskTCB __attribute__ ((section (".rtos_heap"))); -StackType_t svTaskStack[SERVERS_STACK_LEN] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -char servers_user[SERVERS_USER_PASS_LEN_MAX + 1]; -char servers_pass[SERVERS_USER_PASS_LEN_MAX + 1]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -void TASK_Servers (void *pvParameters) { - - bool cycle = false; - - strcpy (servers_user, SERVERS_DEF_USER); - strcpy (servers_pass, SERVERS_DEF_PASS); - - telnet_init(); - ftp_init(); - - for ( ;; ) { - - if (servers_data.do_enable) { - // enable network services - telnet_enable(); - ftp_enable(); - // now set/clear the flags - servers_data.enabled = true; - servers_data.do_enable = false; - } - else if (servers_data.do_disable) { - // disable network services - telnet_disable(); - ftp_disable(); - // now clear the flags - servers_data.do_disable = false; - servers_data.enabled = false; - } - else if (servers_data.do_reset) { - // resetting the servers is needed to prevent half-open sockets - servers_data.do_reset = false; - if (servers_data.enabled) { - telnet_reset(); - ftp_reset(); - } - // and we should also close all user sockets. We do it here - // for convinience and to save on code size. - modusocket_close_all_user_sockets(); - } - - if (cycle) { - telnet_run(); - } - else { - ftp_run(); - } - - if (sleep_sockets) { - pybwdt_srv_sleeping(true); - modusocket_enter_sleep(); - pybwdt_srv_sleeping(false); - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 2); - if (servers_data.do_wlan_cycle_power) { - servers_data.do_wlan_cycle_power = false; - wlan_off_on(); - } - sleep_sockets = false; - - } - - // set the alive flag for the wdt - pybwdt_srv_alive(); - - // move to the next cycle - cycle = cycle ? false : true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS); - } -} - -void servers_start (void) { - servers_data.do_enable = true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 3); -} - -void servers_stop (void) { - servers_data.do_disable = true; - do { - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS); - } while (servers_are_enabled()); - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS * 3); -} - -void servers_reset (void) { - servers_data.do_reset = true; -} - -void servers_wlan_cycle_power (void) { - servers_data.do_wlan_cycle_power = true; -} - -bool servers_are_enabled (void) { - return servers_data.enabled; -} - -void server_sleep_sockets (void) { - sleep_sockets = true; - mp_hal_delay_ms(SERVERS_CYCLE_TIME_MS + 1); -} - -void servers_close_socket (int16_t *sd) { - if (*sd > 0) { - modusocket_socket_delete(*sd); - sl_Close(*sd); - *sd = -1; - } -} - -void servers_set_login (char *user, char *pass) { - if (strlen(user) > SERVERS_USER_PASS_LEN_MAX || strlen(pass) > SERVERS_USER_PASS_LEN_MAX) { - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - memcpy(servers_user, user, SERVERS_USER_PASS_LEN_MAX); - memcpy(servers_pass, pass, SERVERS_USER_PASS_LEN_MAX); -} - -void servers_set_timeout (uint32_t timeout) { - if (timeout < SERVERS_MIN_TIMEOUT_MS) { - // timeout is too low - mp_raise_ValueError(mpexception_value_invalid_arguments); - } - servers_data.timeout = timeout; -} - -uint32_t servers_get_timeout (void) { - return servers_data.timeout; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ diff --git a/ports/cc3200/serverstask.h b/ports/cc3200/serverstask.h deleted file mode 100644 index c4533d717490f..0000000000000 --- a/ports/cc3200/serverstask.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_SERVERSTASK_H -#define MICROPY_INCLUDED_CC3200_SERVERSTASK_H - -/****************************************************************************** - DEFINE CONSTANTS - ******************************************************************************/ -#define SERVERS_PRIORITY 2 -#define SERVERS_STACK_SIZE 1024 // in bytes -#define SERVERS_STACK_LEN (SERVERS_STACK_SIZE / sizeof(StackType_t)) - -#define SERVERS_SSID_LEN_MAX 16 -#define SERVERS_KEY_LEN_MAX 16 - -#define SERVERS_USER_PASS_LEN_MAX 32 - -#define SERVERS_CYCLE_TIME_MS 2 - -#define SERVERS_DEF_USER "micro" -#define SERVERS_DEF_PASS "python" -#define SERVERS_DEF_TIMEOUT_MS 300000 // 5 minutes -#define SERVERS_MIN_TIMEOUT_MS 5000 // 5 seconds - -/****************************************************************************** - DEFINE TYPES - ******************************************************************************/ - -/****************************************************************************** - EXPORTED DATA - ******************************************************************************/ -extern StaticTask_t svTaskTCB; -extern StackType_t svTaskStack[]; -extern char servers_user[]; -extern char servers_pass[]; - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void TASK_Servers (void *pvParameters); -extern void servers_start (void); -extern void servers_stop (void); -extern void servers_reset (void); -extern void servers_wlan_cycle_power (void); -extern bool servers_are_enabled (void); -extern void servers_close_socket (int16_t *sd); -extern void servers_set_login (char *user, char *pass); -extern void server_sleep_sockets (void); -extern void servers_set_timeout (uint32_t timeout); -extern uint32_t servers_get_timeout (void); - -#endif // MICROPY_INCLUDED_CC3200_SERVERSTASK_H diff --git a/ports/cc3200/simplelink/cc_pal.c b/ports/cc3200/simplelink/cc_pal.c deleted file mode 100644 index 7b0be5d13e9d4..0000000000000 --- a/ports/cc3200/simplelink/cc_pal.c +++ /dev/null @@ -1,517 +0,0 @@ -//***************************************************************************** -// cc_pal.c -// -// simplelink abstraction file for CC3200 -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -//Simplelink includes -#include -#include - -//Driverlib includes -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#define REG_INT_MASK_SET 0x400F7088 -#define REG_INT_MASK_CLR 0x400F708C -#define APPS_SOFT_RESET_REG 0x4402D000 -#define OCP_SHARED_MAC_RESET_REG 0x4402E168 - -#define SPI_RATE_20M 20000000 - -#define UNUSED(x) (x = x) - -// -// GLOBAL VARIABLES -- Start -// -volatile Fd_t g_SpiFd =0; -P_EVENT_HANDLER g_pHostIntHdl = NULL; - -// -// GLOBAL VARIABLES -- End -// - - -//**************************************************************************** -// LOCAL FUNCTION PROTOTYPES -//**************************************************************************** -static int spi_Read_CPU(unsigned char *pBuff, int len); -static int spi_Write_CPU(unsigned char *pBuff, int len); - -//**************************************************************************** -// LOCAL FUNCTION DEFINITIONS -//**************************************************************************** - -/*! - \brief attempts to read up to len bytes from SPI channel into a buffer starting at pBuff. - - \param pBuff - points to first location to start writing the data - - \param len - number of bytes to read from the SPI channel - - \return upon successful completion, the function shall return Read Size. - Otherwise, -1 shall be returned - - \sa spi_Read_CPU , spi_Write_CPU - \note - \warning -*/ -int spi_Read_CPU(unsigned char *pBuff, int len) -{ - unsigned long ulCnt; - unsigned long ulStatusReg; - unsigned long *ulDataIn; - unsigned long ulTxReg; - unsigned long ulRxReg; - - MAP_SPICSEnable(LSPI_BASE); - - // - // Initialize local variable. - // - ulDataIn = (unsigned long *)pBuff; - ulCnt = (len + 3) >> 2; - ulStatusReg = LSPI_BASE+MCSPI_O_CH0STAT; - ulTxReg = LSPI_BASE + MCSPI_O_TX0; - ulRxReg = LSPI_BASE + MCSPI_O_RX0; - - // - // Reading loop - // - while(ulCnt--) - { - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_TXS )); - HWREG(ulTxReg) = 0xFFFFFFFF; - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_RXS )); - *ulDataIn = HWREG(ulRxReg); - ulDataIn++; - } - - MAP_SPICSDisable(LSPI_BASE); - - return len; -} - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return write size. - Otherwise, -1 shall be returned - - \sa spi_Read_CPU , spi_Write_CPU - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write_CPU(unsigned char *pBuff, int len) -{ - unsigned long ulCnt; - unsigned long ulStatusReg; - unsigned long *ulDataOut; - unsigned long ulDataIn; - unsigned long ulTxReg; - unsigned long ulRxReg; - - - MAP_SPICSEnable(LSPI_BASE); - - // - // Initialize local variable. - // - ulDataOut = (unsigned long *)pBuff; - ulCnt = (len +3 ) >> 2; - ulStatusReg = LSPI_BASE+MCSPI_O_CH0STAT; - ulTxReg = LSPI_BASE + MCSPI_O_TX0; - ulRxReg = LSPI_BASE + MCSPI_O_RX0; - - // - // Writing Loop - // - while(ulCnt--) - { - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_TXS )); - HWREG(ulTxReg) = *ulDataOut; - while(!( HWREG(ulStatusReg)& MCSPI_CH0STAT_RXS )); - ulDataIn = HWREG(ulRxReg); - ulDataOut++; - } - - MAP_SPICSDisable(LSPI_BASE); - - UNUSED(ulDataIn); - return len; -} - -/*! - \brief open spi communication port to be used for communicating with a SimpleLink device - - Given an interface name and option flags, this function opens the spi communication port - and creates a file descriptor. This file descriptor can be used afterwards to read and - write data from and to this specific spi channel. - The SPI speed, clock polarity, clock phase, chip select and all other attributes are all - set to hardcoded values in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the device. in systems that the spi channel is - not implemented as part of the os device drivers, this - parameter could be NULL. - \param flags - option flags - - \return upon successful completion, the function shall open the spi channel and return - a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa spi_Close , spi_Read , spi_Write - \note - \warning -*/ - -Fd_t spi_Open(char *ifName, unsigned long flags) -{ - unsigned long ulBase; - unsigned long ulSpiBitRate = SPI_RATE_20M; - - //NWP master interface - ulBase = LSPI_BASE; - - //Enable MCSPIA2 - MAP_PRCMPeripheralClkEnable(PRCM_LSPI,PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - //Disable Chip Select - MAP_SPICSDisable(ulBase); - - //Disable SPI Channel - MAP_SPIDisable(ulBase); - - // Reset SPI - MAP_SPIReset(ulBase); - - // - // Configure SPI interface - // - - MAP_SPIConfigSetExpClk(ulBase,MAP_PRCMPeripheralClockGet(PRCM_LSPI), - ulSpiBitRate,SPI_MODE_MASTER,SPI_SUB_MODE_0, - (SPI_SW_CTRL_CS | - SPI_4PIN_MODE | - SPI_TURBO_OFF | - SPI_CS_ACTIVEHIGH | - SPI_WL_32)); - - MAP_SPIEnable(ulBase); - - g_SpiFd = 1; - return g_SpiFd; -} -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ -int spi_Close(Fd_t fd) -{ - unsigned long ulBase = LSPI_BASE; - - g_SpiFd = 0; - - //Disable Chip Select - MAP_SPICSDisable(LSPI_BASE); - - - //Disable SPI Channel - MAP_SPIDisable(ulBase); - - // Reset SPI - MAP_SPIReset(ulBase); - - // Disable SPI Peripheral - MAP_PRCMPeripheralClkDisable(PRCM_LSPI,PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - - return 0; -} - -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ - -int spi_Read(Fd_t fd, unsigned char *pBuff, int len) -{ - if (fd != 1 || g_SpiFd != 1) { - return -1; - } - - return spi_Read_CPU(pBuff, len); -} - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Read - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write(Fd_t fd, unsigned char *pBuff, int len) -{ - if (fd != 1 || g_SpiFd != 1) { - return -1; - } - - return spi_Write_CPU(pBuff,len); -} - -/*! - \brief register an interrupt handler for the host IRQ - - \param InterruptHdl - pointer to interrupt handler function - - \param pValue - pointer to a memory strcuture that is passed to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - \note If there is already registered interrupt handler, the function should overwrite the old handler - with the new one - \warning -*/ - -int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue) -{ - - if(InterruptHdl == NULL) - { - //De-register Interprocessor communication interrupt between App and NWP - #ifdef SL_PLATFORM_MULTI_THREADED - osi_InterruptDeRegister(INT_NWPIC); - #else - MAP_IntDisable(INT_NWPIC); - MAP_IntUnregister(INT_NWPIC); - MAP_IntPendClear(INT_NWPIC); - #endif - } - else - { - #ifdef SL_PLATFORM_MULTI_THREADED - MAP_IntPendClear(INT_NWPIC); - osi_InterruptRegister(INT_NWPIC, (P_OSI_INTR_ENTRY)InterruptHdl,INT_PRIORITY_LVL_1); - #else - MAP_IntRegister(INT_NWPIC, InterruptHdl); - MAP_IntPrioritySet(INT_NWPIC, INT_PRIORITY_LVL_1); - MAP_IntPendClear(INT_NWPIC); - MAP_IntEnable(INT_NWPIC); - #endif - } - - return 0; -} - - -/*! - \brief Masks host IRQ - - - \sa NwpUnMaskInterrupt - - \warning -*/ -void NwpMaskInterrupt() -{ - (*(unsigned long *)REG_INT_MASK_SET) = 0x1; -} - - -/*! - \brief Unmasks host IRQ - - - \sa NwpMaskInterrupt - - \warning -*/ -void NwpUnMaskInterrupt() -{ - (*(unsigned long *)REG_INT_MASK_CLR) = 0x1; -} - -#ifdef DEBUG -/*! - \brief Preamble to the enabling the Network Processor. - Placeholder to implement any pre-process operations - before enabling networking operations. - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec - -*/ -void NwpPowerOnPreamble(void) -{ - #define MAX_RETRY_COUNT 1000 - - unsigned int sl_stop_ind, apps_int_sts_raw, nwp_lpds_wake_cfg; - unsigned int retry_count; - /* Perform the sl_stop equivalent to ensure network services - are turned off if active */ - HWREG(0x400F70B8) = 1; /* APPs to NWP interrupt */ - UtilsDelay(800000/5); - - retry_count = 0; - nwp_lpds_wake_cfg = HWREG(0x4402D404); - sl_stop_ind = HWREG(0x4402E16C); - - if((nwp_lpds_wake_cfg != 0x20) && /* Check for NWP POR condition */ - !(sl_stop_ind & 0x2)) /* Check if sl_stop was executed */ - { - /* Loop until APPs->NWP interrupt is cleared or timeout */ - while(retry_count < MAX_RETRY_COUNT) - { - apps_int_sts_raw = HWREG(0x400F70C0); - if(apps_int_sts_raw & 0x1) - { - UtilsDelay(800000/5); - retry_count++; - } - else - { - break; - } - } - } - HWREG(0x400F70B0) = 1; /* Clear APPs to NWP interrupt */ - UtilsDelay(800000/5); - - /* Stop the networking services */ - NwpPowerOff(); -} -#endif - -/*! - \brief Enable the Network Processor - - \sa sl_DeviceDisable - - \note belongs to \ref ported_sec - -*/ -void NwpPowerOn(void) -{ - //bring the 1.32 eco out of reset - HWREG(0x4402E16C) &= 0xFFFFFFFD; - - //NWP Wakeup - HWREG(0x44025118) = 1; -#ifdef DEBUG - UtilsDelay(8000000); -#endif - - //UnMask Host Interrupt - NwpUnMaskInterrupt(); -} - - -/*! - \brief Disable the Network Processor - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec -*/ -void NwpPowerOff(void) -{ - //Must delay 300 usec to enable the NWP to finish all sl_stop activities - UtilsDelay(300*80/3); - - //Mask Host Interrupt - NwpMaskInterrupt(); - - //Switch to PFM Mode - HWREG(0x4402F024) &= 0xF7FFFFFF; - - //sl_stop eco for PG1.32 devices - HWREG(0x4402E16C) |= 0x2; - - UtilsDelay(800000); -} diff --git a/ports/cc3200/simplelink/cc_pal.h b/ports/cc3200/simplelink/cc_pal.h deleted file mode 100644 index 1cf83e7710644..0000000000000 --- a/ports/cc3200/simplelink/cc_pal.h +++ /dev/null @@ -1,202 +0,0 @@ -//***************************************************************************** -// cc_pal.h -// -// Simplelink abstraction header file for CC3200 -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __CC31xx_PAL_H__ -#define __CC31xx_PAL_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - - - -/*! - \brief type definition for the spi channel file descriptor - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -typedef int Fd_t; - - -/*! - \brief type definition for the host interrupt handler - - \param pValue - pointer to any memory strcuture. The value of this pointer is givven on - registration of a new interrupt handler - - \note -*/ - -typedef void (*SL_P_EVENT_HANDLER)(void); - -#define P_EVENT_HANDLER SL_P_EVENT_HANDLER - -/*! - \brief open spi communication port to be used for communicating with a SimpleLink device - - Given an interface name and option flags, this function opens the spi communication port - and creates a file descriptor. This file descriptor can be used afterwards to read and - write data from and to this specific spi channel. - The SPI speed, clock polarity, clock phase, chip select and all other attributes are all - set to hardcoded values in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the device. in systems that the spi channel is - not implemented as part of the os device drivers, this - parameter could be NULL. - \param flags - option flags - - \return upon successful completion, the function shall open the spi channel and return - a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa spi_Close , spi_Read , spi_Write - \note - \warning -*/ -Fd_t spi_Open(char *ifName, unsigned long flags); - -/*! - \brief closes an opened spi communication port - - \param fd - file descriptor of an opened SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open - \note - \warning -*/ -int spi_Close(Fd_t fd); - -/*! - \brief attempts to read up to len bytes from SPI channel into a buffer starting at pBuff. - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start writing the data - - \param len - number of bytes to read from the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Write - \note - \warning -*/ -int spi_Read(Fd_t fd, unsigned char *pBuff, int len); - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened SPI channel - - \param pBuff - points to first location to start getting the data from - - \param len - number of bytes to write to the SPI channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa spi_Open , spi_Read - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked untill - the entire buffer write would be completed - \warning -*/ -int spi_Write(Fd_t fd, unsigned char *pBuff, int len); - -/*! - \brief register an interrupt handler for the host IRQ - - \param InterruptHdl - pointer to interrupt handler function - - \param pValue - pointer to a memory strcuture that is passed to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - \note If there is already registered interrupt handler, the function should overwrite the old handler - with the new one - \warning -*/ -int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue); - - -/*! - \brief Masks host IRQ - - - \sa NwpUnMaskInterrupt - - \warning -*/ -void NwpMaskInterrupt(); - - -/*! - \brief Unmasks host IRQ - - - \sa NwpMaskInterrupt - - \warning -*/ -void NwpUnMaskInterrupt(); - -void NwpPowerOnPreamble(void); - -void NwpPowerOff(void); - -void NwpPowerOn(void); - - -#ifdef __cplusplus -} -#endif // __cplusplus - - -#endif - diff --git a/ports/cc3200/simplelink/oslib/osi.h b/ports/cc3200/simplelink/oslib/osi.h deleted file mode 100644 index 11fe61bb63ac9..0000000000000 --- a/ports/cc3200/simplelink/oslib/osi.h +++ /dev/null @@ -1,580 +0,0 @@ -//***************************************************************************** -// osi.h -// -// MACRO and Function prototypes for TI-RTOS and Free-RTOS API calls -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list zof conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - -#ifndef __OSI_H__ -#define __OSI_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define OSI_WAIT_FOREVER (0xFFFFFFFF) - -#define OSI_NO_WAIT (0) - -typedef enum -{ - OSI_OK = 0, - OSI_FAILURE = -1, - OSI_OPERATION_FAILED = -2, - OSI_ABORTED = -3, - OSI_INVALID_PARAMS = -4, - OSI_MEMORY_ALLOCATION_FAILURE = -5, - OSI_TIMEOUT = -6, - OSI_EVENTS_IN_USE = -7, - OSI_EVENT_OPEARTION_FAILURE = -8 -}OsiReturnVal_e; - - -//#define ENTER_CRITICAL_SECTION osi_EnterCritical() -//#define EXIT_CRITICAL_SECTION osi_ExitCritical() - -typedef void* OsiMsgQ_t; - - /*! - \brief type definition for a time value - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -//typedef unsigned int OsiTime_t; -typedef unsigned int OsiTime_t; -/*! - \brief type definition for a sync object container - - Sync object is object used to synchronize between two threads or thread and interrupt handler. - One thread is waiting on the object and the other thread send a signal, which then - release the waiting thread. - The signal must be able to be sent from interrupt context. - This object is generally implemented by binary semaphore or events. - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. -*/ -//typedef unsigned int OsiSyncObj_t; -typedef void * OsiSyncObj_t; - -/*! - \brief type definition for a locking object container - - Locking object are used to protect a resource from mutual accesses of two or more threads. - The locking object should support re-entrant locks by a signal thread. - This object is generally implemented by mutex semaphore - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. -*/ -//typedef unsigned int OsiLockObj_t; -typedef void * OsiLockObj_t; - -/*! - \brief type definition for a spawn entry callback - - the spawn mechanism enable to run a function on different context. - This mechanism allow to transfer the execution context from interrupt context to thread context - or changing the context from an unknown user thread to general context. - The implementation of the spawn mechanism depends on the user's system requirements and could varies - from implementation of serialized execution using single thread to creating thread per call - - \note The stack size of the execution thread must be at least of TBD bytes! -*/ -typedef void (*P_OSI_SPAWN_ENTRY)(void* pValue); - -typedef void (*P_OSI_EVENT_HANDLER)(void* pValue); - -typedef void (*P_OSI_TASK_ENTRY)(void* pValue); - -typedef void (*P_OSI_INTR_ENTRY)(void); - -typedef void* OsiTaskHandle; - -/*! - \brief This function registers an interrupt in NVIC table - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_InterruptRegister(int iIntrNum,P_OSI_INTR_ENTRY pEntry,unsigned char ucPriority); - -/*! - \brief This function De-registers an interrupt in NVIC table - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - - \return upon successful creation the function should return Positive number - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -void osi_InterruptDeRegister(int iIntrNum); - - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t* pSyncObj); - - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjDelete(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignal(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function generates a sync signal for the object. - from ISR context. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function is called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignalFromISR(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjWait(OsiSyncObj_t* pSyncObj , OsiTime_t Timeout); - -/*! - \brief This function clears a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful clearing the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjClear(OsiSyncObj_t* pSyncObj); - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_LockObjCreate(OsiLockObj_t* pLockObj); - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjDelete osi_SyncObjDelete - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjLock osi_SyncObjWait - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -#define osi_LockObjUnlock osi_SyncObjSignal - - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -/*! - \brief This function creates a Task. - - Creates a new Task and add it to the last of tasks that are ready to run - - \param pEntry - pointer to the Task Function - \param pcName - Task Name String - \param usStackDepth - Stack Size Stack Size in 32-bit long words - \param pvParameters - pointer to structure to be passed to the Task Function - \param uxPriority - Task Priority - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_TaskCreate(P_OSI_TASK_ENTRY pEntry,const signed char * const pcName,unsigned short usStackDepth,void *pvParameters,unsigned long uxPriority,OsiTaskHandle *pTaskHandle); - -/*! - \brief This function Deletes a Task. - - Deletes a Task and remove it from list of running task - - \param pTaskHandle - Task Handle - - \note - \warning -*/ -void osi_TaskDelete(OsiTaskHandle* pTaskHandle); - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_Spawn(P_OSI_SPAWN_ENTRY pEntry , void* pValue , unsigned long flags); - - -/******************************************************************************* - -This function creates a message queue that is typically used for inter thread -communication. - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsgQName - pointer to the name of the message queue - MsgSize - the size of the message. - - NOTICE: THE MESSGAE SIZE MUST BE SMALLER THAN 16 - - MaxMsgs - maximum number of messages. - -Please note that this function allocates the entire memory required -for the maximum number of messages (MsgSize * MaxMsgs). - -********************************************************************************/ -OsiReturnVal_e osi_MsgQCreate(OsiMsgQ_t* pMsgQ , - char* pMsgQName, - unsigned long MsgSize, - unsigned long MaxMsgs); - -/******************************************************************************* - -This function deletes a specific message queue. -All threads suspended waiting for a message from this queue are resumed with -an error return value. - -Parameters: - - pMsgQ - pointer to the message queue control block - -********************************************************************************/ -OsiReturnVal_e osi_MsgQDelete(OsiMsgQ_t* pMsgQ); - - -/******************************************************************************* - -This function writes a message to a specific message queue. - -Notice that the message is copied to the queue from the memory area specified -by pMsg pointer. - --------------------------------------------------------------------------------- -THIS FUNCTION COULD BE CALLED FROM ISR AS LONG AS THE TIMEOUT PARAMETER IS -SET TO "OSI_NO_WAIT" --------------------------------------------------------------------------------- - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsg - pointer to the message - Timeout - numeric value specifies the maximum number of mSec to stay - suspended while waiting for available space for the message - -********************************************************************************/ -OsiReturnVal_e osi_MsgQWrite(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout); - - -/******************************************************************************* - -This function retrieves a message from the specified message queue. The -retrieved message is copied from the queue into the memory area specified by -the pMsg pointer - -Parameters: - - pMsgQ - pointer to the message queue control block - pMsg - pointer that specify the location where to copy the message - Timeout - numeric value specifies the maximum number of mSec to stay - suspended while waiting for a message to be available - -********************************************************************************/ -OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout); - -/*! - \brief This function starts the OS Scheduler - \param - void - \return - void - \note - \warning -*/ -void osi_start(); - -/*! - \brief Allocates Memory on Heap - \param Size - Size of the Buffer to be allocated - \sa - \note - \warning -*/ -void * mem_Malloc(unsigned long Size); - - -/*! - \brief Deallocates Memory - \param pMem - Pointer to the Buffer to be freed - \return void - \sa - \note - \warning -*/ -void mem_Free(void *pMem); - - -/*! - \brief Set Memory - \param pBuf - Pointer to the Buffer - \param Val - Value to be set - \param Size - Size of the memory to be set - \sa - \note - \warning -*/ -void mem_set(void *pBuf,int Val,size_t Size); - -/*! - \brief Copy Memory - \param pDst - Pointer to the Destination Buffer - \param pSrc - Pointer to the Source Buffer - \param Size - Size of the memory to be copied - \return void - \note - \warning -*/ -void mem_copy(void *pDst, void *pSrc,size_t Size); - -/*! - \brief Enter Critical Section - \sa - \note - \warning -*/ -void osi_EnterCritical(void); - -/*! - \brief Exit Critical Section - \sa - \note - \warning -*/ -void osi_ExitCritical(void); - -/*! - \brief This function used to save the os context before sleep - \param void - \return void - \note - \warning -*/ -void osi_ContextSave(); -/*! - \brief This function used to retrieve the context after sleep - \param void - \return void - \note - \warning -*/ -void osi_ContextRestore(); - -/*! - \brief This function used to suspend the task for the specified number of milli secs - \param MilliSecs - Time in millisecs to suspend the task - \return void - \note - \warning -*/ -void osi_Sleep(unsigned int MilliSecs); - -/*! - \brief This function used to disable the tasks - \param - void - \return - void - \note - \warning -*/ -void osi_TaskDisable(void); - -/*! - \brief This function used to enable all tasks - \param - void - \return - void - \note - \warning -*/ -void osi_TaskEnable(void); - -/*! - \brief structure definition for simple link spawn message - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. -*/ -typedef struct -{ - P_OSI_SPAWN_ENTRY pEntry; - void* pValue; -}tSimpleLinkSpawnMsg; - -/* The queue used to send message to simple link spawn task. */ -extern void* xSimpleLinkSpawnQueue; - -/* API for SL Task*/ -OsiReturnVal_e VStartSimpleLinkSpawnTask(unsigned long uxPriority); -void VDeleteSimpleLinkSpawnTask( void ); - - - -#ifdef __cplusplus -} -#endif // __cplusplus - -#endif diff --git a/ports/cc3200/simplelink/oslib/osi_freertos.c b/ports/cc3200/simplelink/oslib/osi_freertos.c deleted file mode 100644 index 53822add73d52..0000000000000 --- a/ports/cc3200/simplelink/oslib/osi_freertos.c +++ /dev/null @@ -1,747 +0,0 @@ -//***************************************************************************** -// osi_freertos.c -// -// Interface APIs for free-rtos function calls -// -// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ -// -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions -// are met: -// -// Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// -// Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the -// distribution. -// -// Neither the name of Texas Instruments Incorporated nor the names of -// its contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//***************************************************************************** - - -#include -#include -#include -#include "FreeRTOS.h" -#include "task.h" -#include "semphr.h" -#include "portmacro.h" -#include "osi.h" -#include "rom_map.h" -#include "inc/hw_types.h" -#include "interrupt.h" -#include "pybwdt.h" -#include "debug.h" - -portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; -//Local function definition -static void vSimpleLinkSpawnTask( void *pvParameters ); -//Queue Handler -QueueHandle_t xSimpleLinkSpawnQueue = NULL; -TaskHandle_t xSimpleLinkSpawnTaskHndl = NULL; -// Queue size -#define slQUEUE_SIZE ( 3 ) -#define SL_SPAWN_MAX_WAIT_MS ( 200 ) - -// This is the static memory (TCB and stack) for the SL spawn task -static StaticTask_t spawnTaskTCB __attribute__ ((section (".rtos_heap"))); -static portSTACK_TYPE spawnTaskStack[896 / sizeof(portSTACK_TYPE)] __attribute__ ((section (".rtos_heap"))) __attribute__((aligned (8))); - -/*! - \brief This function registers an interrupt in NVIC table - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param iIntrNum - Interrupt number to register - \param pEntry - Pointer to the interrupt handler - \param ucPriority - priority of the interrupt - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_InterruptRegister(int iIntrNum,P_OSI_INTR_ENTRY pEntry,unsigned char ucPriority) -{ - MAP_IntRegister(iIntrNum,(void(*)(void))pEntry); - MAP_IntPrioritySet(iIntrNum, ucPriority); - MAP_IntEnable(iIntrNum); - return OSI_OK; -} - -/*! - \brief This function De registers an interrupt in NVIC table - - - \param iIntrNum - Interrupt number to De register - - \return none - \note - \warning -*/ - -void osi_InterruptDeRegister(int iIntrNum) -{ - MAP_IntDisable(iIntrNum); - MAP_IntUnregister(iIntrNum); -} - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between different thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t* pSyncObj) -{ - SemaphoreHandle_t *pl_SyncObj = (SemaphoreHandle_t *)pSyncObj; - - *pl_SyncObj = xSemaphoreCreateBinary(); - - ASSERT (*pSyncObj != NULL); - - return OSI_OK; -} - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjDelete(OsiSyncObj_t* pSyncObj) -{ - vSemaphoreDelete(*pSyncObj ); - return OSI_OK; -} - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignal(OsiSyncObj_t* pSyncObj) -{ - xSemaphoreGive( *pSyncObj ); - return OSI_OK; -} -/*! - \brief This function generates a sync signal for the object - from ISR context. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signalling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function is called from ISR context - \warning -*/ -OsiReturnVal_e osi_SyncObjSignalFromISR(OsiSyncObj_t* pSyncObj) -{ - xHigherPriorityTaskWoken = pdFALSE; - if(pdTRUE == xSemaphoreGiveFromISR( *pSyncObj, &xHigherPriorityTaskWoken )) - { - if( xHigherPriorityTaskWoken ) - { - taskYIELD (); - } - } - return OSI_OK; -} - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjWait(OsiSyncObj_t* pSyncObj , OsiTime_t Timeout) -{ - if(pdTRUE == xSemaphoreTake( (SemaphoreHandle_t)*pSyncObj, ( TickType_t )Timeout)) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function clears a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful clearing the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_SyncObjClear(OsiSyncObj_t* pSyncObj) -{ - if (OSI_OK == osi_SyncObjWait(pSyncObj,0) ) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_LockObjCreate(OsiLockObj_t* pLockObj) -{ - SemaphoreHandle_t *pl_LockObj = (SemaphoreHandle_t *)pLockObj; - - vSemaphoreCreateBinary(*pl_LockObj); - - ASSERT (*pLockObj != NULL); - - return OSI_OK; -} - -/*! - \brief This function creates a Task. - - Creates a new Task and add it to the last of tasks that are ready to run - - \param pEntry - pointer to the Task Function - \param pcName - Task Name String - \param usStackDepth - Stack Size in bytes - \param pvParameters - pointer to structure to be passed to the Task Function - \param uxPriority - Task Priority - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e osi_TaskCreate(P_OSI_TASK_ENTRY pEntry,const signed char * const pcName, - unsigned short usStackDepth, void *pvParameters, - unsigned long uxPriority,OsiTaskHandle* pTaskHandle) -{ - ASSERT (pdPASS == xTaskCreate( pEntry, (char const*)pcName, - (usStackDepth/(sizeof( portSTACK_TYPE ))), - pvParameters,(unsigned portBASE_TYPE)uxPriority, - (TaskHandle_t*)pTaskHandle )); - return OSI_OK; -} - - -/*! - \brief This function Deletes a Task. - - Deletes a Task and remove it from list of running task - - \param pTaskHandle - Task Handle - - \note - \warning -*/ -void osi_TaskDelete(OsiTaskHandle* pTaskHandle) -{ - vTaskDelete((TaskHandle_t)*pTaskHandle); -} - - - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjDelete(OsiLockObj_t* pLockObj) -{ - vSemaphoreDelete((SemaphoreHandle_t)*pLockObj ); - return OSI_OK; -} - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjLock(OsiLockObj_t* pLockObj , OsiTime_t Timeout) -{ - //Take Semaphore - if(pdTRUE == xSemaphoreTake( *pLockObj, ( TickType_t ) Timeout )) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ -OsiReturnVal_e _osi_LockObjUnlock(OsiLockObj_t* pLockObj) -{ - //Release Semaphore - if(pdTRUE == xSemaphoreGive( *pLockObj )) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - - -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note - \warning -*/ - -OsiReturnVal_e osi_Spawn(P_OSI_SPAWN_ENTRY pEntry , void* pValue , unsigned long flags) -{ - - tSimpleLinkSpawnMsg Msg; - Msg.pEntry = pEntry; - Msg.pValue = pValue; - xHigherPriorityTaskWoken = pdFALSE; - - if(pdTRUE == xQueueSendFromISR( xSimpleLinkSpawnQueue, &Msg, &xHigherPriorityTaskWoken )) - { - if( xHigherPriorityTaskWoken ) - { - taskYIELD (); - } - return OSI_OK; - } - return OSI_OPERATION_FAILED; -} - - -/*! - \brief This is the simplelink spawn task to call SL callback from a different context - - \param pvParameters - pointer to the task parameter - - \return void - \note - \warning -*/ -void vSimpleLinkSpawnTask(void *pvParameters) -{ - tSimpleLinkSpawnMsg Msg; - portBASE_TYPE ret; - - for(;;) - { - ret = xQueueReceive( xSimpleLinkSpawnQueue, &Msg, SL_SPAWN_MAX_WAIT_MS); - if(ret == pdPASS) - { - Msg.pEntry(Msg.pValue); - } - // set the alive flag for the wdt - pybwdt_sl_alive(); - } -} - -/*! - \brief This is the API to create SL spawn task and create the SL queue - - \param uxPriority - task priority - - \return void - \note - \warning -*/ -__attribute__ ((section (".boot"))) -OsiReturnVal_e VStartSimpleLinkSpawnTask(unsigned portBASE_TYPE uxPriority) -{ - xSimpleLinkSpawnQueue = xQueueCreate( slQUEUE_SIZE, sizeof( tSimpleLinkSpawnMsg ) ); - ASSERT (xSimpleLinkSpawnQueue != NULL); - - /* - // This is the original code to create a task dynamically - ASSERT (pdPASS == xTaskCreate( vSimpleLinkSpawnTask, ( portCHAR * ) "SLSPAWN",\ - 896 / sizeof(portSTACK_TYPE), NULL, uxPriority, &xSimpleLinkSpawnTaskHndl )); - */ - - // This code creates the task using static memory for the TCB and stack - xSimpleLinkSpawnTaskHndl = xTaskCreateStatic( - vSimpleLinkSpawnTask, ( portCHAR * ) "SLSPAWN", - 896 / sizeof(portSTACK_TYPE), NULL, uxPriority, - spawnTaskStack, &spawnTaskTCB); - - ASSERT(xSimpleLinkSpawnTaskHndl != NULL); - - return OSI_OK; -} - -/*! - \brief This is the API to delete SL spawn task and delete the SL queue - - \param none - - \return void - \note - \warning -*/ -void VDeleteSimpleLinkSpawnTask( void ) -{ - if(xSimpleLinkSpawnTaskHndl) - { - vTaskDelete( xSimpleLinkSpawnTaskHndl ); - xSimpleLinkSpawnTaskHndl = 0; - } - - if(xSimpleLinkSpawnQueue) - { - vQueueDelete( xSimpleLinkSpawnQueue ); - xSimpleLinkSpawnQueue = 0; - } -} - -/*! - \brief This function is used to create the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsgQName - msg queue name - \param MsgSize - size of message on the queue - \param MaxMsgs - max. number of msgs that the queue can hold - - \return - OsiReturnVal_e - \note - \warning -*/ -OsiReturnVal_e osi_MsgQCreate(OsiMsgQ_t* pMsgQ , - char* pMsgQName, - unsigned long MsgSize, - unsigned long MaxMsgs) -{ - QueueHandle_t handle; - - //Create Queue - handle = xQueueCreate( MaxMsgs, MsgSize ); - ASSERT (handle != NULL); - - *pMsgQ = (OsiMsgQ_t)handle; - return OSI_OK; -} -/*! - \brief This function is used to delete the MsgQ - - \param pMsgQ - pointer to the message queue - - \return - OsiReturnVal_e - \note - \warning -*/ -OsiReturnVal_e osi_MsgQDelete(OsiMsgQ_t* pMsgQ) -{ - vQueueDelete((QueueHandle_t) *pMsgQ ); - return OSI_OK; -} -/*! - \brief This function is used to write data to the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsg - pointer to the Msg strut to read into - \param Timeout - timeout to wait for the Msg to be available - - \return - OsiReturnVal_e - \note - \warning -*/ - -OsiReturnVal_e osi_MsgQWrite(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout) -{ - xHigherPriorityTaskWoken = pdFALSE; - if(pdPASS == xQueueSendFromISR((QueueHandle_t) *pMsgQ, pMsg, &xHigherPriorityTaskWoken )) - { - taskYIELD (); - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} -/*! - \brief This function is used to read data from the MsgQ - - \param pMsgQ - pointer to the message queue - \param pMsg - pointer to the Msg strut to read into - \param Timeout - timeout to wait for the Msg to be available - - \return - OsiReturnVal_e - \note - \warning -*/ - -OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t* pMsgQ, void* pMsg , OsiTime_t Timeout) -{ - //Receive Item from Queue - if( pdTRUE == xQueueReceive((QueueHandle_t)*pMsgQ,pMsg,Timeout) ) - { - return OSI_OK; - } - else - { - return OSI_OPERATION_FAILED; - } -} - -/*! - \brief This function to call the memory de-allocation function of the FREERTOS - - \param Size - size of memory to alloc in bytes - - \return - void * - \note - \warning -*/ - -void * mem_Malloc(unsigned long Size) -{ - return ( void * ) pvPortMalloc( (size_t)Size ); -} - -/*! - \brief This function to call the memory de-allocation function of the FREERTOS - - \param pMem - pointer to the memory which needs to be freed - - \return - void - \note - \warning -*/ -void mem_Free(void *pMem) -{ - vPortFree( pMem ); -} - -/*! - \brief This function call the memset function - \param pBuf - pointer to the memory to be fill - \param Val - Value to be fill - \param Size - Size of the memory which needs to be fill - \return - void - \note - \warning -*/ - -void mem_set(void *pBuf,int Val,size_t Size) -{ - memset( pBuf,Val,Size); -} - -/*! - \brief This function call the memcopy function - \param pDst - pointer to the destination - \param pSrc - pointer to the source - \param Size - Size of the memory which needs to be copy - - \return - void - \note - \warning -*/ -void mem_copy(void *pDst, void *pSrc,size_t Size) -{ - memcpy(pDst,pSrc,Size); -} - - -/*! - \brief This function use to entering into critical section - \param void - \return - void - \note - \warning -*/ - -void osi_EnterCritical(void) -{ - vPortEnterCritical(); -} - -/*! - \brief This function use to exit critical section - \param void - \return - void - \note - \warning -*/ - -void osi_ExitCritical(void) -{ - vPortExitCritical(); -} -/*! - \brief This function used to start the scheduler - \param void - \return - void - \note - \warning -*/ -__attribute__ ((section (".boot"))) -void osi_start() -{ - vTaskStartScheduler(); -} -/*! - \brief This function used to suspend the task for the specified number of milli secs - \param MilliSecs - Time in millisecs to suspend the task - \return - void - \note - \warning -*/ -void osi_Sleep(unsigned int MilliSecs) -{ - vTaskDelay(MilliSecs); -} - - -/*! - \brief This function used to disable the tasks - \param - void - \return - Key with the suspended tasks - \note - \warning -*/ -void osi_TaskDisable(void) -{ - vTaskSuspendAll(); -} - - -/*! - \brief This function used to resume all the tasks - \param key - returned from suspend tasks - \return - void - \note - \warning -*/ -void osi_TaskEnable(void) -{ - xTaskResumeAll(); -} - -/*! - \brief This function used to save the OS context before sleep - \param void - \return - void - \note - \warning -*/ -void osi_ContextSave() -{ - -} -/*! - \brief This function used to restore the OS context after sleep - \param void - \return - void - \note - \warning -*/ -void osi_ContextRestore() -{ - -} diff --git a/ports/cc3200/simplelink/user.h b/ports/cc3200/simplelink/user.h deleted file mode 100644 index d3f6d4adfb6fd..0000000000000 --- a/ports/cc3200/simplelink/user.h +++ /dev/null @@ -1,1063 +0,0 @@ -/* - * user.h - CC31xx/CC32xx Host Driver Implementation - * - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * -*/ - - - -#ifndef __USER_H__ -#define __USER_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - - - - -/*! - ****************************************************************************** - - \defgroup porting_user_include Porting - User Include Files - - This section IS NOT REQUIRED in case user provided primitives are handled - in makefiles or project configurations (IDE) - - PORTING ACTION: - - Include all required header files for the definition of: - -# Transport layer library API (e.g. SPI, UART) - -# OS primitives definitions (e.g. Task spawn, Semaphores) - -# Memory management primitives (e.g. alloc, free) - - ****************************************************************************** - */ - -#include -#include "cc_pal.h" -#include "debug.h" - -/*! - \def MAX_CONCURRENT_ACTIONS - - \brief Defines the maximum number of concurrent action in the system - Min:1 , Max: 32 - - Actions which has async events as return, can be - - \sa - - \note In case there are not enough resources for the actions needed in the system, - error is received: POOL_IS_EMPTY - one option is to increase MAX_CONCURRENT_ACTIONS - (improves performance but results in memory consumption) - Other option is to call the API later (decrease performance) - - \warning In case of setting to one, recommend to use non-blocking recv\recvfrom to allow - multiple socket recv -*/ -#define MAX_CONCURRENT_ACTIONS 10 -/*! - \def CPU_FREQ_IN_MHZ - \brief Defines CPU frequency for Host side, for better accuracy of busy loops, if any - \sa - \note - - \warning If not set the default CPU frequency is set to 200MHz - This option will be deprecated in future release -*/ - -#define CPU_FREQ_IN_MHZ 80 - - -/*! - ****************************************************************************** - - \defgroup porting_capabilities Porting - Capabilities Set - - This section IS NOT REQUIRED in case one of the following pre defined - capabilities set is in use: - - SL_TINY - - SL_SMALL - - SL_FULL - - PORTING ACTION: - - Define one of the pre-defined capabilities set or uncomment the - relevant definitions below to select the required capabilities - - @{ - - ******************************************************************************* -*/ - -/*! - \def SL_INC_ARG_CHECK - - \brief Defines whether the SimpleLink driver perform argument check - or not - - When defined, the SimpleLink driver perform argument check on - function call. Removing this define could reduce some code - size and improve slightly the performances but may impact in - unpredictable behavior in case of invalid arguments - - \sa - - \note belongs to \ref proting_sec - - \warning Removing argument check may cause unpredictable behavior in - case of invalid arguments. - In this case the user is responsible to argument validity - (for example all handlers must not be NULL) -*/ -#define SL_INC_ARG_CHECK - - -/*! - \def SL_INC_STD_BSD_API_NAMING - - \brief Defines whether SimpleLink driver should expose standard BSD - APIs or not - - When defined, the SimpleLink driver in addtion to its alternative - BSD APIs expose also standard BSD APIs. - Stadrad BSD API includs the following functions: - socket , close , accept , bind , listen , connect , select , - setsockopt , getsockopt , recv , recvfrom , write , send , sendto , - gethostbyname - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -/* #define SL_INC_STD_BSD_API_NAMING */ - - -/*! - \brief Defines whether to include extended API in SimpleLink driver - or not - - When defined, the SimpleLink driver will include also all - exteded API of the included packages - - \sa ext_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_EXT_API - -/*! - \brief Defines whether to include WLAN package in SimpleLink driver - or not - - When defined, the SimpleLink driver will include also - the WLAN package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_WLAN_PKG - -/*! - \brief Defines whether to include SOCKET package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also - the SOCKET package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCKET_PKG - -/*! - \brief Defines whether to include NET_APP package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also the - NET_APP package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NET_APP_PKG - -/*! - \brief Defines whether to include NET_CFG package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also - the NET_CFG package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NET_CFG_PKG - -/*! - \brief Defines whether to include NVMEM package in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also the - NVMEM package - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_NVMEM_PKG - -/*! - \brief Defines whether to include socket server side APIs - in SimpleLink driver or not - - When defined, the SimpleLink driver will include also socket - server side APIs - - \sa server_side - - \note - - \warning -*/ -#define SL_INC_SOCK_SERVER_SIDE_API - -/*! - \brief Defines whether to include socket client side APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - client side APIs - - \sa client_side - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_CLIENT_SIDE_API - -/*! - \brief Defines whether to include socket receive APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - receive side APIs - - \sa recv_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_RECV_API - -/*! - \brief Defines whether to include socket send APIs in SimpleLink - driver or not - - When defined, the SimpleLink driver will include also socket - send side APIs - - \sa send_api - - \note belongs to \ref porting_sec - - \warning -*/ -#define SL_INC_SOCK_SEND_API - -/*! - - Close the Doxygen group. - @} - - */ - - -/*! - ****************************************************************************** - - \defgroup ported_enable_device Ported on CC32XX - Device Enable/Disable - - The enable/disable API provide mechanism to enable/disable the network processor - - - PORTING ACTION: - - None - @{ - - ****************************************************************************** - */ - -/*! - \brief Preamble to the enabling the Network Processor. - Placeholder to implement any pre-process operations - before enabling networking operations. - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec - -*/ -#ifdef DEBUG -#define sl_DeviceEnablePreamble() NwpPowerOnPreamble() -#else -#define sl_DeviceEnablePreamble() -#endif - -/*! - \brief Enable the Network Processor - - \sa sl_DeviceDisable - - \note belongs to \ref ported_sec - -*/ -#define sl_DeviceEnable() NwpPowerOn() - -/*! - \brief Disable the Network Processor - - \sa sl_DeviceEnable - - \note belongs to \ref ported_sec -*/ -#define sl_DeviceDisable() NwpPowerOff() - -/*! - - Close the Doxygen group. - @} - - */ - -/*! - ****************************************************************************** - - \defgroup ported_interface Ported on CC32XX - Communication Interface - - The simple link device can work with different communication - channels (e.g. spi/uart). Texas Instruments provides single driver - that can work with all these types. This section bind between the - physical communication interface channel and the SimpleLink driver - - - \note Correct and efficient implementation of this driver is critical - for the performances of the SimpleLink device on this platform. - - - PORTING ACTION: - - None - - @{ - - ****************************************************************************** -*/ - -#define _SlFd_t Fd_t - -/*! - \brief Opens an interface communication port to be used for communicating - with a SimpleLink device - - Given an interface name and option flags, this function opens - the communication port and creates a file descriptor. - This file descriptor is used afterwards to read and write - data from and to this specific communication channel. - The speed, clock polarity, clock phase, chip select and all other - specific attributes of the channel are all should be set to hardcoded - in this function. - - \param ifName - points to the interface name/path. The interface name is an - optional attributes that the simple link driver receives - on opening the driver (sl_Start). - In systems that the spi channel is not implemented as - part of the os device drivers, this parameter could be NULL. - - \param flags - optional flags parameters for future use - - \return upon successful completion, the function shall open the channel - and return a non-negative integer representing the file descriptor. - Otherwise, -1 shall be returned - - \sa sl_IfClose , sl_IfRead , sl_IfWrite - - \note The prototype of the function is as follow: - Fd_t xxx_IfOpen(char* pIfName , unsigned long flags); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfOpen spi_Open - -/*! - \brief Closes an opened interface communication port - - \param fd - file descriptor of opened communication channel - - \return upon successful completion, the function shall return 0. - Otherwise, -1 shall be returned - - \sa sl_IfOpen , sl_IfRead , sl_IfWrite - - \note The prototype of the function is as follow: - int xxx_IfClose(Fd_t Fd); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfClose spi_Close - -/*! - \brief Attempts to read up to len bytes from an opened communication channel - into a buffer starting at pBuff. - - \param fd - file descriptor of an opened communication channel - - \param pBuff - pointer to the first location of a buffer that contains enough - space for all expected data - - \param len - number of bytes to read from the communication channel - - \return upon successful completion, the function shall return the number of read bytes. - Otherwise, 0 shall be returned - - \sa sl_IfClose , sl_IfOpen , sl_IfWrite - - - \note The prototype of the function is as follow: - int xxx_IfRead(Fd_t Fd , char* pBuff , int Len); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfRead spi_Read - -/*! - \brief attempts to write up to len bytes to the SPI channel - - \param fd - file descriptor of an opened communication channel - - \param pBuff - pointer to the first location of a buffer that contains - the data to send over the communication channel - - \param len - number of bytes to write to the communication channel - - \return upon successful completion, the function shall return the number of sent bytes. - therwise, 0 shall be returned - - \sa sl_IfClose , sl_IfOpen , sl_IfRead - - \note This function could be implemented as zero copy and return only upon successful completion - of writing the whole buffer, but in cases that memory allocation is not too tight, the - function could copy the data to internal buffer, return back and complete the write in - parallel to other activities as long as the other SPI activities would be blocked until - the entire buffer write would be completed - - The prototype of the function is as follow: - int xxx_IfWrite(Fd_t Fd , char* pBuff , int Len); - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfWrite spi_Write - -/*! - \brief register an interrupt handler routine for the host IRQ - - \param InterruptHdl - pointer to interrupt handler routine - - \param pValue - pointer to a memory structure that is passed - to the interrupt handler. - - \return upon successful registration, the function shall return 0. - Otherwise, -1 shall be returned - - \sa - - \note If there is already registered interrupt handler, the function - should overwrite the old handler with the new one - - \note If the handler is a null pointer, the function should un-register the - interrupt handler, and the interrupts can be disabled. - - \note belongs to \ref ported_sec - - \warning -*/ -#define sl_IfRegIntHdlr(InterruptHdl , pValue) NwpRegisterInterruptHandler(InterruptHdl , pValue) - -/*! - \brief Masks the Host IRQ - - \sa sl_IfUnMaskIntHdlr - - - - \note belongs to \ref ported_sec - - \warning -*/ - - -#define sl_IfMaskIntHdlr() NwpMaskInterrupt() - -/*! - \brief Unmasks the Host IRQ - - \sa sl_IfMaskIntHdlr - - - - \note belongs to \ref ported_sec - - \warning -*/ - -#define sl_IfUnMaskIntHdlr() NwpUnMaskInterrupt() - -/*! - \brief Write Handers for statistics debug on write - - \param interface handler - pointer to interrupt handler routine - - - \return no return value - - \sa - - \note An optional hooks for monitoring before and after write info - - \note belongs to \ref ported_sec - - \warning -*/ -/* #define SL_START_WRITE_STAT */ - - -/*! - - Close the Doxygen group. - @} - -*/ - -/*! - ****************************************************************************** - - \defgroup ported_os Ported on CC32XX - Operating System - - The simple link driver can run on multi-threaded environment as well - as non-os environment (mail loop) - - This section IS NOT REQUIRED in case you are working on non-os environment. - - If you choose to work in multi-threaded environment under any operating system - you will have to provide some basic adaptation routines to allow the driver - to protect access to resources from different threads (locking object) and - to allow synchronization between threads (sync objects). - - PORTING ACTION: - -# Uncomment SL_PLATFORM_MULTI_THREADED define - -# Bind locking object routines - -# Bind synchronization object routines - -# Optional - Bind spawn thread routine - - @{ - - ****************************************************************************** -*/ - -#define SL_PLATFORM_MULTI_THREADED - - -#ifdef SL_PLATFORM_MULTI_THREADED -#include "osi.h" - - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_RET_CODE_OK ((int)OSI_OK) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_WAIT_FOREVER ((OsiTime_t)OSI_WAIT_FOREVER) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define SL_OS_NO_WAIT ((OsiTime_t)OSI_NO_WAIT) - -/*! - \brief type definition for a time value - - \note On each porting or platform the type could be whatever is needed - integer, pointer to structure etc. - - \note belongs to \ref ported_sec -*/ -#define _SlTime_t OsiTime_t - -/*! - \brief type definition for a sync object container - - Sync object is object used to synchronize between two threads or thread and interrupt handler. - One thread is waiting on the object and the other thread send a signal, which then - release the waiting thread. - The signal must be able to be sent from interrupt context. - This object is generally implemented by binary semaphore or events. - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. - - \note belongs to \ref ported_sec -*/ -typedef OsiSyncObj_t _SlSyncObj_t; - - -/*! - \brief This function creates a sync object - - The sync object is used for synchronization between diffrent thread or ISR and - a thread. - - \param pSyncObj - pointer to the sync object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjCreate(pSyncObj,pName) osi_SyncObjCreate(pSyncObj) - - -/*! - \brief This function deletes a sync object - - \param pSyncObj - pointer to the sync object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjDelete(pSyncObj) osi_SyncObjDelete(pSyncObj) - - -/*! - \brief This function generates a sync signal for the object. - - All suspended threads waiting on this sync object are resumed - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -#define sl_SyncObjSignal(pSyncObj) osi_SyncObjSignal(pSyncObj) - -/*! - \brief This function generates a sync signal for the object from Interrupt - - This is for RTOS that should signal from IRQ using a dedicated API - - \param pSyncObj - pointer to the sync object control block - - \return upon successful signaling the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note the function could be called from ISR context - \warning -*/ -#define sl_SyncObjSignalFromIRQ(pSyncObj) osi_SyncObjSignalFromISR(pSyncObj) - -/*! - \brief This function waits for a sync signal of the specific sync object - - \param pSyncObj - pointer to the sync object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the sync signal - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - \return upon successful reception of the signal within the timeout window return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_SyncObjWait(pSyncObj,Timeout) osi_SyncObjWait(pSyncObj,Timeout) - -/*! - \brief type definition for a locking object container - - Locking object are used to protect a resource from mutual accesses of two or more threads. - The locking object should suppurt reentrant locks by a signal thread. - This object is generally implemented by mutex semaphore - - \note On each porting or platform the type could be whatever is needed - integer, structure etc. - \note belongs to \ref ported_sec -*/ -typedef OsiLockObj_t _SlLockObj_t; - -/*! - \brief This function creates a locking object. - - The locking object is used for protecting a shared resources between different - threads. - - \param pLockObj - pointer to the locking object control block - - \return upon successful creation the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjCreate(pLockObj,pName) osi_LockObjCreate(pLockObj) - -/*! - \brief This function deletes a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful deletion the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjDelete(pLockObj) osi_LockObjDelete(pLockObj) - -/*! - \brief This function locks a locking object. - - All other threads that call this function before this thread calls - the osi_LockObjUnlock would be suspended - - \param pLockObj - pointer to the locking object control block - \param Timeout - numeric value specifies the maximum number of mSec to - stay suspended while waiting for the locking object - Currently, the simple link driver uses only two values: - - OSI_WAIT_FOREVER - - OSI_NO_WAIT - - - \return upon successful reception of the locking object the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjLock(pLockObj,Timeout) osi_LockObjLock(pLockObj,Timeout) - -/*! - \brief This function unlock a locking object. - - \param pLockObj - pointer to the locking object control block - - \return upon successful unlocking the function should return 0 - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define sl_LockObjUnlock(pLockObj) osi_LockObjUnlock(pLockObj) - -#endif -/*! - \brief This function call the pEntry callback from a different context - - \param pEntry - pointer to the entry callback function - - \param pValue - pointer to any type of memory structure that would be - passed to pEntry callback from the execution thread. - - \param flags - execution flags - reserved for future usage - - \return upon successful registration of the spawn the function should return 0 - (the function is not blocked till the end of the execution of the function - and could be returned before the execution is actually completed) - Otherwise, a negative value indicating the error code shall be returned - \note belongs to \ref ported_sec - \warning -*/ -#define SL_PLATFORM_EXTERNAL_SPAWN - -#ifdef SL_PLATFORM_EXTERNAL_SPAWN -#define sl_Spawn(pEntry,pValue,flags) osi_Spawn(pEntry,pValue,flags) -#endif - -/*! - - Close the Doxygen group. - @} - - */ -/*! - ****************************************************************************** - - \defgroup porting_mem_mgm Porting - Memory Management - - This section declare in which memory management model the SimpleLink driver - will run: - -# Static - -# Dynamic - - This section IS NOT REQUIRED in case Static model is selected. - - The default memory model is Static - - PORTING ACTION: - - If dynamic model is selected, define the alloc and free functions. - - @{ - - ***************************************************************************** -*/ - -/*! - \brief Defines whether the SimpleLink driver is working in dynamic - memory model or not - - When defined, the SimpleLink driver use dynamic allocations - if dynamic allocation is selected malloc and free functions - must be retrieved - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define SL_MEMORY_MGMT_DYNAMIC 1 -#define SL_MEMORY_MGMT_STATIC 0 - -#define SL_MEMORY_MGMT SL_MEMORY_MGMT_DYNAMIC - -#ifdef SL_MEMORY_MGMT_DYNAMIC -#ifdef SL_PLATFORM_MULTI_THREADED - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Malloc(Size) mem_Malloc(Size) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Free(pMem) mem_Free(pMem) -#else -#include -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Malloc(Size) malloc(Size) - -/*! - \brief - \sa - \note belongs to \ref ported_sec - \warning -*/ -#define sl_Free(pMem) free(pMem) -#endif -#endif -/*! - - Close the Doxygen group. - @} - - */ - - -/*! - ****************************************************************************** - - \defgroup porting_events Porting - Event Handlers - - This section includes the asynchronous event handlers routines - - PORTING ACTION: - -Uncomment the required handler and define your routine as the value - of this handler - - @{ - - ****************************************************************************** - */ - -/*! - \brief - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_GeneralEvtHdlr SimpleLinkGeneralEventHandler - - -/*! - \brief An event handler for WLAN connection or disconnection indication - This event handles async WLAN events. - Possible events are: - SL_WLAN_CONNECT_EVENT - indicates WLAN is connected - SL_WLAN_DISCONNECT_EVENT - indicates WLAN is disconnected - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_WlanEvtHdlr SimpleLinkWlanEventHandler - - -/*! - \brief An event handler for IP address asynchronous event. Usually accepted after new WLAN connection. - This event handles networking events. - Possible events are: - SL_NETAPP_IPV4_ACQUIRED - IP address was acquired (DHCP or Static) - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_NetAppEvtHdlr SimpleLinkNetAppEventHandler - -/*! - \brief A callback for HTTP server events. - Possible events are: - SL_NETAPP_HTTPGETTOKENVALUE - NWP requests to get the value of a specific token - SL_NETAPP_HTTPPOSTTOKENVALUE - NWP post to the host a new value for a specific token - - \param pServerEvent - Contains the relevant event information (SL_NETAPP_HTTPGETTOKENVALUE or SL_NETAPP_HTTPPOSTTOKENVALUE) - - \param pServerResponse - Should be filled by the user with the relevant response information (i.e SL_NETAPP_HTTPSETTOKENVALUE as a response to SL_NETAPP_HTTPGETTOKENVALUE event) - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_HttpServerCallback SimpleLinkHttpServerCallback -/*! - \brief - - \sa - - \note belongs to \ref porting_sec - - \warning -*/ - -#define sl_SockEvtHdlr SimpleLinkSockEventHandler - - - -#define _SL_USER_TYPES -#define _u8 unsigned char -#define _i8 signed char - -#define _u16 unsigned short -#define _i16 signed short - -#define _u32 unsigned int -#define _i32 signed int -#define _volatile volatile -#define _const const - - - -/*! - - Close the Doxygen group. - @} - - */ - - -#ifdef __cplusplus -} -#endif // __cplusplus - -#endif // __USER_H__ diff --git a/ports/cc3200/telnet/telnet.c b/ports/cc3200/telnet/telnet.c deleted file mode 100644 index dbb77cd6d762f..0000000000000 --- a/ports/cc3200/telnet/telnet.c +++ /dev/null @@ -1,498 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mpconfig.h" -#include "py/obj.h" -#include "py/mphal.h" -#include "lib/utils/interrupt_char.h" -#include "telnet.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "modusocket.h" -#include "debug.h" -#include "mpexception.h" -#include "serverstask.h" -#include "genhdr/mpversion.h" -#include "irq.h" - -/****************************************************************************** - DEFINE PRIVATE CONSTANTS - ******************************************************************************/ -#define TELNET_PORT 23 -// rxRindex and rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 -#define TELNET_RX_BUFFER_SIZE 256 -#define TELNET_MAX_CLIENTS 1 -#define TELNET_TX_RETRIES_MAX 50 -#define TELNET_WAIT_TIME_MS 5 -#define TELNET_LOGIN_RETRIES_MAX 3 -#define TELNET_CYCLE_TIME_MS (SERVERS_CYCLE_TIME_MS * 2) - -/****************************************************************************** - DEFINE PRIVATE TYPES - ******************************************************************************/ -typedef enum { - E_TELNET_RESULT_OK = 0, - E_TELNET_RESULT_AGAIN, - E_TELNET_RESULT_FAILED -} telnet_result_t; - -typedef enum { - E_TELNET_STE_DISABLED = 0, - E_TELNET_STE_START, - E_TELNET_STE_LISTEN, - E_TELNET_STE_CONNECTED, - E_TELNET_STE_LOGGED_IN -} telnet_state_t; - -typedef enum { - E_TELNET_STE_SUB_WELCOME, - E_TELNET_STE_SUB_SND_USER_OPTIONS, - E_TELNET_STE_SUB_REQ_USER, - E_TELNET_STE_SUB_GET_USER, - E_TELNET_STE_SUB_REQ_PASSWORD, - E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS, - E_TELNET_STE_SUB_GET_PASSWORD, - E_TELNET_STE_SUB_INVALID_LOGGIN, - E_TELNET_STE_SUB_SND_REPL_OPTIONS, - E_TELNET_STE_SUB_LOGGIN_SUCCESS -} telnet_connected_substate_t; - -typedef union { - telnet_connected_substate_t connected; -} telnet_substate_t; - -typedef struct { - uint8_t *rxBuffer; - uint32_t timeout; - telnet_state_t state; - telnet_substate_t substate; - int16_t sd; - int16_t n_sd; - - // rxRindex and rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 - uint8_t rxWindex; - uint8_t rxRindex; - - uint8_t txRetries; - uint8_t logginRetries; - bool enabled; - bool credentialsValid; -} telnet_data_t; - -/****************************************************************************** - DECLARE PRIVATE DATA - ******************************************************************************/ -static telnet_data_t telnet_data; -static const char* telnet_welcome_msg = "MicroPython " MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE "; " MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME "\r\n"; -static const char* telnet_request_user = "Login as: "; -static const char* telnet_request_password = "Password: "; -static const char* telnet_invalid_loggin = "\r\nInvalid credentials, try again.\r\n"; -static const char* telnet_loggin_success = "\r\nLogin succeeded!\r\nType \"help()\" for more information.\r\n"; -static const uint8_t telnet_options_user[] = // IAC WONT ECHO IAC WONT SUPPRESS_GO_AHEAD IAC WILL LINEMODE - { 255, 252, 1, 255, 252, 3, 255, 251, 34 }; -static const uint8_t telnet_options_pass[] = // IAC WILL ECHO IAC WONT SUPPRESS_GO_AHEAD IAC WILL LINEMODE - { 255, 251, 1, 255, 252, 3, 255, 251, 34 }; -static const uint8_t telnet_options_repl[] = // IAC WILL ECHO IAC WILL SUPPRESS_GO_AHEAD IAC WONT LINEMODE - { 255, 251, 1, 255, 251, 3, 255, 252, 34 }; - -/****************************************************************************** - DECLARE PRIVATE FUNCTIONS - ******************************************************************************/ -static void telnet_wait_for_enabled (void); -static bool telnet_create_socket (void); -static void telnet_wait_for_connection (void); -static void telnet_send_and_proceed (void *data, _i16 Len, telnet_connected_substate_t next_state); -static telnet_result_t telnet_send_non_blocking (void *data, _i16 Len); -static telnet_result_t telnet_recv_text_non_blocking (void *buff, _i16 Maxlen, _i16 *rxLen); -static void telnet_process (void); -static int telnet_process_credential (char *credential, _i16 rxLen); -static void telnet_parse_input (uint8_t *str, int16_t *len); -static bool telnet_send_with_retries (int16_t sd, const void *pBuf, int16_t len); -static void telnet_reset_buffer (void); - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void telnet_init (void) { - // Allocate memory for the receive buffer (from the RTOS heap) - ASSERT ((telnet_data.rxBuffer = mem_Malloc(TELNET_RX_BUFFER_SIZE)) != NULL); - telnet_data.state = E_TELNET_STE_DISABLED; -} - -void telnet_run (void) { - _i16 rxLen; - switch (telnet_data.state) { - case E_TELNET_STE_DISABLED: - telnet_wait_for_enabled(); - break; - case E_TELNET_STE_START: - if (wlan_is_connected() && telnet_create_socket()) { - telnet_data.state = E_TELNET_STE_LISTEN; - } - break; - case E_TELNET_STE_LISTEN: - telnet_wait_for_connection(); - break; - case E_TELNET_STE_CONNECTED: - switch (telnet_data.substate.connected) { - case E_TELNET_STE_SUB_WELCOME: - telnet_send_and_proceed((void *)telnet_welcome_msg, strlen(telnet_welcome_msg), E_TELNET_STE_SUB_SND_USER_OPTIONS); - break; - case E_TELNET_STE_SUB_SND_USER_OPTIONS: - telnet_send_and_proceed((void *)telnet_options_user, sizeof(telnet_options_user), E_TELNET_STE_SUB_REQ_USER); - break; - case E_TELNET_STE_SUB_REQ_USER: - // to catch any left over characters from the previous actions - telnet_recv_text_non_blocking(telnet_data.rxBuffer, TELNET_RX_BUFFER_SIZE, &rxLen); - telnet_send_and_proceed((void *)telnet_request_user, strlen(telnet_request_user), E_TELNET_STE_SUB_GET_USER); - break; - case E_TELNET_STE_SUB_GET_USER: - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(telnet_data.rxBuffer + telnet_data.rxWindex, - TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex, - &rxLen)) { - int result; - if ((result = telnet_process_credential (servers_user, rxLen))) { - telnet_data.credentialsValid = result > 0 ? true : false; - telnet_data.substate.connected = E_TELNET_STE_SUB_REQ_PASSWORD; - } - } - break; - case E_TELNET_STE_SUB_REQ_PASSWORD: - telnet_send_and_proceed((void *)telnet_request_password, strlen(telnet_request_password), E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS); - break; - case E_TELNET_STE_SUB_SND_PASSWORD_OPTIONS: - // to catch any left over characters from the previous actions - telnet_recv_text_non_blocking(telnet_data.rxBuffer, TELNET_RX_BUFFER_SIZE, &rxLen); - telnet_send_and_proceed((void *)telnet_options_pass, sizeof(telnet_options_pass), E_TELNET_STE_SUB_GET_PASSWORD); - break; - case E_TELNET_STE_SUB_GET_PASSWORD: - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(telnet_data.rxBuffer + telnet_data.rxWindex, - TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex, - &rxLen)) { - int result; - if ((result = telnet_process_credential (servers_pass, rxLen))) { - if ((telnet_data.credentialsValid = telnet_data.credentialsValid && (result > 0 ? true : false))) { - telnet_data.substate.connected = E_TELNET_STE_SUB_SND_REPL_OPTIONS; - } - else { - telnet_data.substate.connected = E_TELNET_STE_SUB_INVALID_LOGGIN; - } - } - } - break; - case E_TELNET_STE_SUB_INVALID_LOGGIN: - if (E_TELNET_RESULT_OK == telnet_send_non_blocking((void *)telnet_invalid_loggin, strlen(telnet_invalid_loggin))) { - telnet_data.credentialsValid = true; - if (++telnet_data.logginRetries >= TELNET_LOGIN_RETRIES_MAX) { - telnet_reset(); - } - else { - telnet_data.substate.connected = E_TELNET_STE_SUB_SND_USER_OPTIONS; - } - } - break; - case E_TELNET_STE_SUB_SND_REPL_OPTIONS: - telnet_send_and_proceed((void *)telnet_options_repl, sizeof(telnet_options_repl), E_TELNET_STE_SUB_LOGGIN_SUCCESS); - break; - case E_TELNET_STE_SUB_LOGGIN_SUCCESS: - if (E_TELNET_RESULT_OK == telnet_send_non_blocking((void *)telnet_loggin_success, strlen(telnet_loggin_success))) { - // clear the current line and force the prompt - telnet_reset_buffer(); - telnet_data.state= E_TELNET_STE_LOGGED_IN; - } - default: - break; - } - break; - case E_TELNET_STE_LOGGED_IN: - telnet_process(); - break; - default: - break; - } - - if (telnet_data.state >= E_TELNET_STE_CONNECTED) { - if (telnet_data.timeout++ > (servers_get_timeout() / TELNET_CYCLE_TIME_MS)) { - telnet_reset(); - } - } -} - -void telnet_tx_strn (const char *str, int len) { - if (telnet_data.n_sd > 0 && telnet_data.state == E_TELNET_STE_LOGGED_IN && len > 0) { - telnet_send_with_retries(telnet_data.n_sd, str, len); - } -} - -bool telnet_rx_any (void) { - return (telnet_data.n_sd > 0) ? (telnet_data.rxRindex != telnet_data.rxWindex && - telnet_data.state == E_TELNET_STE_LOGGED_IN) : false; -} - -int telnet_rx_char (void) { - int rx_char = -1; - if (telnet_data.rxRindex != telnet_data.rxWindex) { - // rxRindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 so that it wraps around automatically - rx_char = (int)telnet_data.rxBuffer[telnet_data.rxRindex++]; - } - return rx_char; -} - -void telnet_enable (void) { - telnet_data.enabled = true; -} - -void telnet_disable (void) { - telnet_reset(); - telnet_data.enabled = false; - telnet_data.state = E_TELNET_STE_DISABLED; -} - -void telnet_reset (void) { - // close the connection and start all over again - servers_close_socket(&telnet_data.n_sd); - servers_close_socket(&telnet_data.sd); - telnet_data.state = E_TELNET_STE_START; -} - -/****************************************************************************** - DEFINE PRIVATE FUNCTIONS - ******************************************************************************/ -static void telnet_wait_for_enabled (void) { - // Init telnet's data - telnet_data.n_sd = -1; - telnet_data.sd = -1; - - // Check if the telnet service has been enabled - if (telnet_data.enabled) { - telnet_data.state = E_TELNET_STE_START; - } -} - -static bool telnet_create_socket (void) { - SlSockNonblocking_t nonBlockingOption; - SlSockAddrIn_t sServerAddress; - _i16 result; - - // Open a socket for telnet - ASSERT ((telnet_data.sd = sl_Socket(SL_AF_INET, SL_SOCK_STREAM, SL_IPPROTO_TCP)) > 0); - if (telnet_data.sd > 0) { - // add the socket to the network administration - modusocket_socket_add(telnet_data.sd, false); - - // Enable non-blocking mode - nonBlockingOption.NonblockingEnabled = 1; - ASSERT ((result = sl_SetSockOpt(telnet_data.sd, SL_SOL_SOCKET, SL_SO_NONBLOCKING, &nonBlockingOption, sizeof(nonBlockingOption))) == SL_SOC_OK); - - // Bind the socket to a port number - sServerAddress.sin_family = SL_AF_INET; - sServerAddress.sin_addr.s_addr = SL_INADDR_ANY; - sServerAddress.sin_port = sl_Htons(TELNET_PORT); - - ASSERT ((result |= sl_Bind(telnet_data.sd, (const SlSockAddr_t *)&sServerAddress, sizeof(sServerAddress))) == SL_SOC_OK); - - // Start listening - ASSERT ((result |= sl_Listen (telnet_data.sd, TELNET_MAX_CLIENTS)) == SL_SOC_OK); - - if (result == SL_SOC_OK) { - return true; - } - servers_close_socket(&telnet_data.sd); - } - - return false; -} - -static void telnet_wait_for_connection (void) { - SlSocklen_t in_addrSize; - SlSockAddrIn_t sClientAddress; - - // accepts a connection from a TCP client, if there is any, otherwise returns SL_EAGAIN - telnet_data.n_sd = sl_Accept(telnet_data.sd, (SlSockAddr_t *)&sClientAddress, (SlSocklen_t *)&in_addrSize); - if (telnet_data.n_sd == SL_EAGAIN) { - return; - } - else { - if (telnet_data.n_sd <= 0) { - // error - telnet_reset(); - return; - } - - // close the listening socket, we don't need it anymore - servers_close_socket(&telnet_data.sd); - - // add the new socket to the network administration - modusocket_socket_add(telnet_data.n_sd, false); - - // client connected, so go on - telnet_data.rxWindex = 0; - telnet_data.rxRindex = 0; - telnet_data.txRetries = 0; - - telnet_data.state = E_TELNET_STE_CONNECTED; - telnet_data.substate.connected = E_TELNET_STE_SUB_WELCOME; - telnet_data.credentialsValid = true; - telnet_data.logginRetries = 0; - telnet_data.timeout = 0; - } -} - -static void telnet_send_and_proceed (void *data, _i16 Len, telnet_connected_substate_t next_state) { - if (E_TELNET_RESULT_OK == telnet_send_non_blocking(data, Len)) { - telnet_data.substate.connected = next_state; - } -} - -static telnet_result_t telnet_send_non_blocking (void *data, _i16 Len) { - int16_t result = sl_Send(telnet_data.n_sd, data, Len, 0); - - if (result > 0) { - telnet_data.txRetries = 0; - return E_TELNET_RESULT_OK; - } - else if ((TELNET_TX_RETRIES_MAX >= ++telnet_data.txRetries) && (result == SL_EAGAIN)) { - return E_TELNET_RESULT_AGAIN; - } - else { - // error - telnet_reset(); - return E_TELNET_RESULT_FAILED; - } -} - -static telnet_result_t telnet_recv_text_non_blocking (void *buff, _i16 Maxlen, _i16 *rxLen) { - *rxLen = sl_Recv(telnet_data.n_sd, buff, Maxlen, 0); - // if there's data received, parse it - if (*rxLen > 0) { - telnet_data.timeout = 0; - telnet_parse_input (buff, rxLen); - if (*rxLen > 0) { - return E_TELNET_RESULT_OK; - } - } - else if (*rxLen != SL_EAGAIN) { - // error - telnet_reset(); - return E_TELNET_RESULT_FAILED; - } - return E_TELNET_RESULT_AGAIN; -} - -static void telnet_process (void) { - _i16 rxLen; - _i16 maxLen = (telnet_data.rxWindex >= telnet_data.rxRindex) ? (TELNET_RX_BUFFER_SIZE - telnet_data.rxWindex) : - ((telnet_data.rxRindex - telnet_data.rxWindex) - 1); - // to avoid an overrrun - maxLen = (telnet_data.rxRindex == 0) ? (maxLen - 1) : maxLen; - - if (maxLen > 0) { - if (E_TELNET_RESULT_OK == telnet_recv_text_non_blocking(&telnet_data.rxBuffer[telnet_data.rxWindex], maxLen, &rxLen)) { - // rxWindex must be uint8_t and TELNET_RX_BUFFER_SIZE == 256 so that it wraps around automatically - telnet_data.rxWindex = telnet_data.rxWindex + rxLen; - } - } -} - -static int telnet_process_credential (char *credential, _i16 rxLen) { - telnet_data.rxWindex += rxLen; - if (telnet_data.rxWindex >= SERVERS_USER_PASS_LEN_MAX) { - telnet_data.rxWindex = SERVERS_USER_PASS_LEN_MAX; - } - - uint8_t *p = telnet_data.rxBuffer + SERVERS_USER_PASS_LEN_MAX; - // if a '\r' is found, or the length exceeds the max username length - if ((p = memchr(telnet_data.rxBuffer, '\r', telnet_data.rxWindex)) || (telnet_data.rxWindex >= SERVERS_USER_PASS_LEN_MAX)) { - uint8_t len = p - telnet_data.rxBuffer; - - telnet_data.rxWindex = 0; - if ((len > 0) && (memcmp(credential, telnet_data.rxBuffer, MAX(len, strlen(credential))) == 0)) { - return 1; - } - return -1; - } - return 0; -} - -static void telnet_parse_input (uint8_t *str, int16_t *len) { - int16_t b_len = *len; - uint8_t *b_str = str; - - for (uint8_t *_str = b_str; _str < b_str + b_len; ) { - if (*_str <= 127) { - if (telnet_data.state == E_TELNET_STE_LOGGED_IN && *_str == mp_interrupt_char) { - // raise a keyboard exception - mp_keyboard_interrupt(); - (*len)--; - _str++; - } - else if (*_str > 0) { - *str++ = *_str++; - } - else { - _str++; - *len -= 1; - } - } - else { - // in case we have received an incomplete telnet option, unlikely, but possible - _str += MIN(3, *len); - *len -= MIN(3, *len); - } - } -} - -static bool telnet_send_with_retries (int16_t sd, const void *pBuf, int16_t len) { - int32_t retries = 0; - uint32_t delay = TELNET_WAIT_TIME_MS; - // only if we are not within interrupt context and interrupts are enabled - if ((HAL_NVIC_INT_CTRL_REG & HAL_VECTACTIVE_MASK) == 0 && query_irq() == IRQ_STATE_ENABLED) { - do { - _i16 result = sl_Send(sd, pBuf, len, 0); - if (result > 0) { - return true; - } - else if (SL_EAGAIN != result) { - return false; - } - // start with the default delay and increment it on each retry - mp_hal_delay_ms(delay++); - } while (++retries <= TELNET_TX_RETRIES_MAX); - } - return false; -} - -static void telnet_reset_buffer (void) { - // erase any characters present in the current line - memset (telnet_data.rxBuffer, '\b', TELNET_RX_BUFFER_SIZE / 2); - telnet_data.rxWindex = TELNET_RX_BUFFER_SIZE / 2; - // fake an "enter" key pressed to display the prompt - telnet_data.rxBuffer[telnet_data.rxWindex++] = '\r'; -} - diff --git a/ports/cc3200/telnet/telnet.h b/ports/cc3200/telnet/telnet.h deleted file mode 100644 index 51c569104181f..0000000000000 --- a/ports/cc3200/telnet/telnet.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_TELNET_TELNET_H -#define MICROPY_INCLUDED_CC3200_TELNET_TELNET_H - -/****************************************************************************** - DECLARE EXPORTED FUNCTIONS - ******************************************************************************/ -extern void telnet_init (void); -extern void telnet_run (void); -extern void telnet_tx_strn (const char *str, int len); -extern bool telnet_rx_any (void); -extern int telnet_rx_char (void); -extern void telnet_enable (void); -extern void telnet_disable (void); -extern void telnet_reset (void); - -#endif // MICROPY_INCLUDED_CC3200_TELNET_TELNET_H diff --git a/ports/cc3200/tools/smoke.py b/ports/cc3200/tools/smoke.py deleted file mode 100644 index 3ade11cf87dd3..0000000000000 --- a/ports/cc3200/tools/smoke.py +++ /dev/null @@ -1,76 +0,0 @@ -from machine import Pin -from machine import RTC -import time -import os - -""" -Execute it like this: - -python3 run-tests --target wipy --device 192.168.1.1 ../cc3200/tools/smoke.py -""" - -pin_map = [23, 24, 11, 12, 13, 14, 15, 16, 17, 22, 28, 10, 9, 8, 7, 6, 30, 31, 3, 0, 4, 5] -test_bytes = os.urandom(1024) - -def test_pin_read (pull): - # enable the pull resistor on all pins, then read the value - for p in pin_map: - pin = Pin('GP' + str(p), mode=Pin.IN, pull=pull) - # read the pin value - print(pin()) - -def test_pin_shorts (pull): - if pull == Pin.PULL_UP: - pull_inverted = Pin.PULL_DOWN - else: - pull_inverted = Pin.PULL_UP - # enable all pulls of the specified type - for p in pin_map: - pin = Pin('GP' + str(p), mode=Pin.IN, pull=pull_inverted) - # then change the pull one pin at a time and read its value - i = 0 - while i < len(pin_map): - pin = Pin('GP' + str(pin_map[i]), mode=Pin.IN, pull=pull) - Pin('GP' + str(pin_map[i - 1]), mode=Pin.IN, pull=pull_inverted) - i += 1 - # read the pin value - print(pin()) - -test_pin_read(Pin.PULL_UP) -test_pin_read(Pin.PULL_DOWN) -test_pin_shorts(Pin.PULL_UP) -test_pin_shorts(Pin.PULL_DOWN) - -# create a test directory -os.mkdir('/flash/test') -os.chdir('/flash/test') -print(os.getcwd()) -# create a new file -f = open('test.txt', 'w') -n_w = f.write(test_bytes) -print(n_w == len(test_bytes)) -f.close() -f = open('test.txt', 'r') -r = bytes(f.read(), 'ascii') -# check that we can write and read it correctly -print(r == test_bytes) -f.close() -os.remove('test.txt') -os.chdir('..') -os.rmdir('test') - -ls = os.listdir() -print('test' not in ls) -print(ls) - -# test the real time clock -rtc = RTC() -while rtc.now()[6] > 800: - pass - -time1 = rtc.now() -time.sleep_ms(1000) -time2 = rtc.now() -print(time2[5] - time1[5] == 1) -print(time2[6] - time1[6] < 5000) # microseconds - diff --git a/ports/cc3200/tools/smoke.py.exp b/ports/cc3200/tools/smoke.py.exp deleted file mode 100644 index fdc958c85059e..0000000000000 --- a/ports/cc3200/tools/smoke.py.exp +++ /dev/null @@ -1,95 +0,0 @@ -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 -/flash/test -True -True -True -['main.py', 'sys', 'lib', 'cert', 'boot.py'] -True -True diff --git a/ports/cc3200/tools/uniflash.py b/ports/cc3200/tools/uniflash.py deleted file mode 100644 index 21da46a56f263..0000000000000 --- a/ports/cc3200/tools/uniflash.py +++ /dev/null @@ -1,81 +0,0 @@ -#!/usr/bin/env python - -""" -Flash the WiPy (format, update service pack and program). - -Example: - -> python uniflash.py -u "C:\ti\uniflash_3.2\uniflashCLI.bat" -c "C:\VirtualBoxShared\GitHub\wipy_uniflash.usf" -p 8 -s "C:\ti\CC31xx_CC32xx_ServicePack_1.0.0.10.0\servicepack_1.0.0.10.0.bin" - -or: - -> python uniflash.py -u "C:\ti\uniflash_3.2\uniflashCLI.bat" -c "C:\VirtualBoxShared\GitHub\launchxl_uniflash.usf" -p 8 -s "C:\ti\CC31xx_CC32xx_ServicePack_1.0.0.10.0\servicepack_1.0.0.10.0.bin" - -""" - -import sys -import argparse -import subprocess - - -def print_exception(e): - print ('Exception: {}, on line {}'.format(e, sys.exc_info()[-1].tb_lineno)) - - -def execute(command): - process = subprocess.Popen(command, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - cmd_log = "" - - # Poll process for new output until finished - while True: - nextline = process.stdout.readline() - if nextline == '' and process.poll() != None: - break - sys.stdout.write(nextline) - sys.stdout.flush() - cmd_log += nextline - - output = process.communicate()[0] - exitCode = process.returncode - - if exitCode == 0: - return cmd_log - else: - raise ProcessException(command, exitCode, output) - -def main(): - cmd_parser = argparse.ArgumentParser(description='Flash the WiPy and optionally run a small test on it.') - cmd_parser.add_argument('-u', '--uniflash', default=None, help='the path to the uniflash cli executable') - cmd_parser.add_argument('-c', '--config', default=None, help='the path to the uniflash config file') - cmd_parser.add_argument('-p', '--port', default=8, help='the com serial port') - cmd_parser.add_argument('-s', '--servicepack', default=None, help='the path to the servicepack file') - args = cmd_parser.parse_args() - - output = "" - com_port = 'com=' + str(args.port) - servicepack_path = 'spPath=' + args.servicepack - - try: - if args.uniflash == None or args.config == None: - raise ValueError('uniflash path and config path are mandatory') - if args.servicepack == None: - output += execute([args.uniflash, '-config', args.config, '-setOptions', com_port, '-operations', 'format', 'program']) - else: - output += execute([args.uniflash, '-config', args.config, '-setOptions', com_port, servicepack_path, '-operations', 'format', 'servicePackUpdate', 'program']) - except Exception as e: - print_exception(e) - output = "" - finally: - if "Finish Executing operation: program" in output: - print("======================================") - print("Board programmed OK") - print("======================================") - sys.exit(0) - else: - print("======================================") - print("ERROR: Programming failed!") - print("======================================") - sys.exit(1) - -if __name__ == "__main__": - main() diff --git a/ports/cc3200/tools/update-wipy.py b/ports/cc3200/tools/update-wipy.py deleted file mode 100644 index 2d5fe57c2f2ca..0000000000000 --- a/ports/cc3200/tools/update-wipy.py +++ /dev/null @@ -1,200 +0,0 @@ -#!/usr/bin/env python - -""" -The WiPy firmware update script. Transmits the specified firmware file -over FTP, and then resets the WiPy and optionally verifies that software -was correctly updated. - -Usage: - - ./update-wipy.py --file "path_to_mcuimg.bin" --verify - -Or: - - python update-wipy.py --file "path_to_mcuimg.bin" -""" - -import sys -import argparse -import time -import socket -from ftplib import FTP -from telnetlib import Telnet - - -def print_exception(e): - print ('Exception: {}, on line {}'.format(e, sys.exc_info()[-1].tb_lineno)) - - -def ftp_directory_exists(ftpobj, directory_name): - filelist = [] - ftpobj.retrlines('LIST',filelist.append) - for f in filelist: - if f.split()[-1] == directory_name: - return True - return False - - -def transfer_file(args): - with FTP(args.ip, timeout=20) as ftp: - print ('FTP connection established') - - if '230' in ftp.login(args.user, args.password): - print ('Login successful') - - if '250' in ftp.cwd('/flash'): - if not ftp_directory_exists(ftp, 'sys'): - print ('/flash/sys directory does not exist') - if not '550' in ftp.mkd('sys'): - print ('/flash/sys directory created') - else: - print ('Error: cannot create /flash/sys directory') - return False - if '250' in ftp.cwd('sys'): - print ("Entered '/flash/sys' directory") - with open(args.file, "rb") as fwfile: - print ('Firmware image found, initiating transfer...') - if '226' in ftp.storbinary("STOR " + 'mcuimg.bin', fwfile, 512): - print ('File transfer complete') - return True - else: - print ('Error: file transfer failed') - else: - print ('Error: cannot enter /flash/sys directory') - else: - print ('Error: cannot enter /flash directory') - else: - print ('Error: ftp login failed') - - return False - - -def reset_board(args): - success = False - - try: - tn = Telnet(args.ip, timeout=5) - print("Connected via Telnet, trying to login now") - - if b'Login as:' in tn.read_until(b"Login as:", timeout=5): - tn.write(bytes(args.user, 'ascii') + b"\r\n") - - if b'Password:' in tn.read_until(b"Password:", timeout=5): - # needed because of internal implementation details of the WiPy's telnet server - time.sleep(0.2) - tn.write(bytes(args.password, 'ascii') + b"\r\n") - - if b'Type "help()" for more information.' in tn.read_until(b'Type "help()" for more information.', timeout=5): - print("Telnet login succeeded") - tn.write(b'\r\x03\x03') # ctrl-C twice: interrupt any running program - time.sleep(1) - tn.write(b'\r\x02') # ctrl-B: enter friendly REPL - if b'Type "help()" for more information.' in tn.read_until(b'Type "help()" for more information.', timeout=5): - tn.write(b"import machine\r\n") - tn.write(b"machine.reset()\r\n") - time.sleep(2) - print("Reset performed") - success = True - else: - print("Error: cannot enter friendly REPL") - else: - print("Error: telnet login failed") - - except Exception as e: - print_exception(e) - finally: - try: - tn.close() - except Exception as e: - pass - return success - - -def verify_update(args): - success = False - firmware_tag = '' - - def find_tag (tag): - if tag in firmware_tag: - print("Verification passed") - return True - else: - print("Error: verification failed, the git tag doesn't match") - return False - - retries = 0 - while True: - try: - # Specify a longer time out value here because the board has just been - # reset and the wireless connection might not be fully established yet - tn = Telnet(args.ip, timeout=10) - print("Connected via telnet again, lets check the git tag") - break - except socket.timeout: - if retries < 5: - print("Timeout while connecting via telnet, retrying...") - retries += 1 - else: - print('Error: Telnet connection timed out!') - return False - - try: - firmware_tag = tn.read_until (b'with CC3200') - tag_file_path = args.file.rstrip('mcuimg.bin') + 'genhdr/mpversion.h' - - if args.tag is not None: - success = find_tag(bytes(args.tag, 'ascii')) - else: - with open(tag_file_path) as tag_file: - for line in tag_file: - bline = bytes(line, 'ascii') - if b'MICROPY_GIT_HASH' in bline: - bline = bline.lstrip(b'#define MICROPY_GIT_HASH ').replace(b'"', b'').replace(b'\r', b'').replace(b'\n', b'') - success = find_tag(bline) - break - - except Exception as e: - print_exception(e) - finally: - try: - tn.close() - except Exception as e: - pass - return success - - -def main(): - cmd_parser = argparse.ArgumentParser(description='Update the WiPy firmware with the specified image file') - cmd_parser.add_argument('-f', '--file', default=None, help='the path of the firmware file') - cmd_parser.add_argument('-u', '--user', default='micro', help='the username') - cmd_parser.add_argument('-p', '--password', default='python', help='the login password') - cmd_parser.add_argument('--ip', default='192.168.1.1', help='the ip address of the WiPy') - cmd_parser.add_argument('--verify', action='store_true', help='verify that the update succeeded') - cmd_parser.add_argument('-t', '--tag', default=None, help='git tag of the firmware image') - args = cmd_parser.parse_args() - - result = 1 - - try: - if args.file is None: - raise ValueError('the image file path must be specified') - if transfer_file(args): - if reset_board(args): - if args.verify: - print ('Waiting for the WiFi connection to come up again...') - # this time is to allow the system's wireless network card to - # connect to the WiPy again. - time.sleep(5) - if verify_update(args): - result = 0 - else: - result = 0 - - except Exception as e: - print_exception(e) - finally: - sys.exit(result) - - -if __name__ == "__main__": - main() diff --git a/ports/cc3200/util/cryptohash.c b/ports/cc3200/util/cryptohash.c deleted file mode 100644 index 909dadc8cf401..0000000000000 --- a/ports/cc3200/util/cryptohash.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_nvic.h" -#include "inc/hw_shamd5.h" -#include "inc/hw_dthe.h" -#include "hw_memmap.h" -#include "rom_map.h" -#include "prcm.h" -#include "shamd5.h" -#include "cryptohash.h" - - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void CRYPTOHASH_Init (void) { - // Enable the Data Hashing and Transform Engine - MAP_PRCMPeripheralClkEnable(PRCM_DTHE, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); - MAP_PRCMPeripheralReset(PRCM_DTHE); -} - -void CRYPTOHASH_SHAMD5Start (uint32_t algo, uint32_t blocklen) { - // wait until the context is ready - while ((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_CONTEXT_READY) == 0); - - // Configure the SHA/MD5 module algorithm - MAP_SHAMD5ConfigSet(SHAMD5_BASE, algo); - - // if not a multiple of 64 bytes, close the hash - if (blocklen % 64) { - HWREG(SHAMD5_BASE + SHAMD5_O_MODE) |= SHAMD5_MODE_CLOSE_HASH; - } - - // set the lenght - HWREG(SHAMD5_BASE + SHAMD5_O_LENGTH) = blocklen; -} - -void CRYPTOHASH_SHAMD5Update (uint8_t *data, uint32_t datalen) { - // write the data - SHAMD5DataWriteMultiple(data, datalen); -} - -void CRYPTOHASH_SHAMD5Read (uint8_t *hash) { - // wait for the output to be ready - while((HWREG(SHAMD5_BASE + SHAMD5_O_IRQSTATUS) & SHAMD5_INT_OUTPUT_READY) == 0); - // read the result - MAP_SHAMD5ResultRead(SHAMD5_BASE, hash); -} diff --git a/ports/cc3200/util/cryptohash.h b/ports/cc3200/util/cryptohash.h deleted file mode 100644 index 15d46b705b24a..0000000000000 --- a/ports/cc3200/util/cryptohash.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H -#define MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H - -/****************************************************************************** - DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ -extern void CRYPTOHASH_Init (void); -extern void CRYPTOHASH_SHAMD5Start (uint32_t algo, uint32_t blocklen); -extern void CRYPTOHASH_SHAMD5Update (uint8_t *data, uint32_t datalen); -extern void CRYPTOHASH_SHAMD5Read (uint8_t *hash); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_CRYPTOHASH_H diff --git a/ports/cc3200/util/fifo.c b/ports/cc3200/util/fifo.c deleted file mode 100644 index 421f83710060b..0000000000000 --- a/ports/cc3200/util/fifo.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "fifo.h" - - -/****************************************************************************** - DEFINE PUBLIC FUNCTIONS - ******************************************************************************/ -void FIFO_Init (FIFO_t *fifo, unsigned int uiElementsMax, - void (*pfElmentPush)(void * const pvFifo, const void * const pvElement), - void (*pfElementPop)(void * const pvFifo, void * const pvElement)) { - if (fifo) { - fifo->uiFirst = 0; - fifo->uiLast = uiElementsMax - 1; - fifo->uiElementCount = 0; - fifo->uiElementsMax = uiElementsMax; - fifo->pfElementPush = pfElmentPush; - fifo->pfElementPop = pfElementPop; - } -} - -bool FIFO_bPushElement (FIFO_t *fifo, const void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is full - if (true == FIFO_IsFull (fifo)) { - return false; - } - - // Increment the element count - if (fifo->uiElementsMax > fifo->uiElementCount) { - fifo->uiElementCount++; - } - fifo->uiLast++; - if (fifo->uiLast == fifo->uiElementsMax) { - fifo->uiLast = 0; - } - // Insert the element into the queue - fifo->pfElementPush(fifo, pvElement); - return true; -} - -bool FIFO_bPopElement (FIFO_t *fifo, void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is empty - if (true == FIFO_IsEmpty (fifo)) { - return false; - } - - // Get the element from the queue - fifo->pfElementPop(fifo, pvElement); - // Decrement the element count - if (fifo->uiElementCount > 0) { - fifo->uiElementCount--; - } - fifo->uiFirst++; - if (fifo->uiFirst == fifo->uiElementsMax) { - fifo->uiFirst = 0; - } - return true; -} - -bool FIFO_bPeekElement (FIFO_t *fifo, void * const pvElement) { - if (!fifo) { - return false; - } - // Check if the queue is empty - if (true == FIFO_IsEmpty (fifo)) { - return false; - } - // Get the element from the queue - fifo->pfElementPop(fifo, pvElement); - return true; -} - -bool FIFO_IsEmpty (FIFO_t *fifo) { - if (fifo) { - return ((fifo->uiElementCount == 0) ? true : false); - } - return false; -} - -bool FIFO_IsFull (FIFO_t *fifo) { - if (fifo) { - return ((fifo->uiElementCount < fifo->uiElementsMax) ? false : true); - } - return false; -} - -void FIFO_Flush (FIFO_t *fifo) { - if (fifo) { - fifo->uiElementCount = 0; - fifo->uiFirst = 0; - fifo->uiLast = fifo->uiElementsMax - 1; - } -} diff --git a/ports/cc3200/util/fifo.h b/ports/cc3200/util/fifo.h deleted file mode 100644 index 6ede57e1e57f3..0000000000000 --- a/ports/cc3200/util/fifo.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_FIFO_H -#define MICROPY_INCLUDED_CC3200_UTIL_FIFO_H - -typedef struct { - void *pvElements; - unsigned int uiElementCount; - unsigned int uiElementsMax; - unsigned int uiFirst; - unsigned int uiLast; - void (*pfElementPush)(void * const pvFifo, const void * const pvElement); - void (*pfElementPop)(void * const pvFifo, void * const pvElement); -}FIFO_t; - -extern void FIFO_Init (FIFO_t *fifo, unsigned int uiElementsMax, -void (*pfElmentPush)(void * const pvFifo, const void * const pvElement), -void (*pfElementPop)(void * const pvFifo, void * const pvElement)); -extern bool FIFO_bPushElement (FIFO_t *fifo, const void * const pvElement); -extern bool FIFO_bPopElement (FIFO_t *fifo, void * const pvElement); -extern bool FIFO_bPeekElement (FIFO_t *fifo, void * const pvElement); -extern bool FIFO_IsEmpty (FIFO_t *fifo); -extern bool FIFO_IsFull (FIFO_t *fifo); -extern void FIFO_Flush (FIFO_t *fifo); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_FIFO_H diff --git a/ports/cc3200/util/gccollect.c b/ports/cc3200/util/gccollect.c deleted file mode 100644 index 6e2a9081c8763..0000000000000 --- a/ports/cc3200/util/gccollect.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" -#include "gchelper.h" - -/****************************************************************************** -DECLARE PUBLIC FUNCTIONS - ******************************************************************************/ - -void gc_collect(void) { - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[10]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, ((mp_uint_t)MP_STATE_THREAD(stack_top) - sp) / sizeof(uint32_t)); - - // trace root pointers from any threads - #if MICROPY_PY_THREAD - mp_thread_gc_others(); - #endif - - // end the GC - gc_collect_end(); -} diff --git a/ports/cc3200/util/gccollect.h b/ports/cc3200/util/gccollect.h deleted file mode 100644 index 08d43d2837a92..0000000000000 --- a/ports/cc3200/util/gccollect.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H -#define MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H - -// variables defining memory layout -extern uint32_t _etext; -extern uint32_t _data; -extern uint32_t _edata; -extern uint32_t _boot; -extern uint32_t _eboot; -extern uint32_t _bss; -extern uint32_t _ebss; -extern uint32_t _heap; -extern uint32_t _eheap; -extern uint32_t _stack; -extern uint32_t _estack; - -void gc_collect(void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_GCCOLLECT_H diff --git a/ports/cc3200/util/gchelper.h b/ports/cc3200/util/gchelper.h deleted file mode 100644 index 48e81bc61df92..0000000000000 --- a/ports/cc3200/util/gchelper.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H -#define MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H - -extern mp_uint_t gc_helper_get_sp(void); -extern mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_GCHELPER_H diff --git a/ports/cc3200/util/gchelper.s b/ports/cc3200/util/gchelper.s deleted file mode 100644 index aa8fb499e9070..0000000000000 --- a/ports/cc3200/util/gchelper.s +++ /dev/null @@ -1,41 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - - - -@ uint gc_helper_get_sp(void) - .global gc_helper_get_sp - .thumb - .thumb_func - .type gc_helper_get_sp, %function -gc_helper_get_sp: - @ return the sp - mov r0, sp - bx lr - - - -@ uint gc_helper_get_regs_and_sp(r0=uint regs[10]) - .global gc_helper_get_regs_and_sp - .thumb - .thumb_func - .type gc_helper_get_regs_and_sp, %function -gc_helper_get_regs_and_sp: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ return the sp - mov r0, sp - bx lr diff --git a/ports/cc3200/util/random.c b/ports/cc3200/util/random.c deleted file mode 100644 index f8e9cdf0cb21f..0000000000000 --- a/ports/cc3200/util/random.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "inc/hw_types.h" -#include "inc/hw_ints.h" -#include "inc/hw_memmap.h" -#include "rom_map.h" -#include "pybrtc.h" -#include "simplelink.h" -#include "modnetwork.h" -#include "modwlan.h" -#include "random.h" -#include "debug.h" - -/****************************************************************************** -* LOCAL TYPES -******************************************************************************/ -typedef union _rng_id_t { - uint32_t id32; - uint16_t id16[3]; - uint8_t id8[6]; -} rng_id_t; - -/****************************************************************************** -* LOCAL VARIABLES -******************************************************************************/ -static uint32_t s_seed; - -/****************************************************************************** -* LOCAL FUNCTION DECLARATIONS -******************************************************************************/ -STATIC uint32_t lfsr (uint32_t input); - -/****************************************************************************** -* PRIVATE FUNCTIONS -******************************************************************************/ -STATIC uint32_t lfsr (uint32_t input) { - assert( input != 0 ); - return (input >> 1) ^ (-(input & 0x01) & 0x00E10000); -} - -/******************************************************************************/ -// MicroPython bindings; - -STATIC mp_obj_t machine_rng_get(void) { - return mp_obj_new_int(rng_get()); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_rng_get_obj, machine_rng_get); - -/****************************************************************************** -* PUBLIC FUNCTIONS -******************************************************************************/ -void rng_init0 (void) { - rng_id_t juggler; - uint32_t seconds; - uint16_t mseconds; - - // get the seconds and the milliseconds from the RTC - pyb_rtc_get_time(&seconds, &mseconds); - - wlan_get_mac (juggler.id8); - - // flatten the 48-bit board identification to 24 bits - juggler.id16[0] ^= juggler.id16[2]; - - juggler.id8[0] ^= juggler.id8[3]; - juggler.id8[1] ^= juggler.id8[4]; - juggler.id8[2] ^= juggler.id8[5]; - - s_seed = juggler.id32 & 0x00FFFFFF; - s_seed += (seconds & 0x000FFFFF) + mseconds; - - // the seed must not be zero - if (s_seed == 0) { - s_seed = 1; - } -} - -uint32_t rng_get (void) { - s_seed = lfsr( s_seed ); - return s_seed; -} diff --git a/ports/cc3200/util/random.h b/ports/cc3200/util/random.h deleted file mode 100644 index 02cde6b52208d..0000000000000 --- a/ports/cc3200/util/random.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H -#define MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H - -void rng_init0 (void); -uint32_t rng_get (void); - -MP_DECLARE_CONST_FUN_OBJ_0(machine_rng_get_obj); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_RANDOM_H diff --git a/ports/cc3200/util/sleeprestore.h b/ports/cc3200/util/sleeprestore.h deleted file mode 100644 index e178f4c2d078d..0000000000000 --- a/ports/cc3200/util/sleeprestore.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H -#define MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H - -extern void sleep_store(void); -extern void sleep_restore(void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_SLEEPRESTORE_H diff --git a/ports/cc3200/util/sleeprestore.s b/ports/cc3200/util/sleeprestore.s deleted file mode 100644 index c7b0c7da21bd0..0000000000000 --- a/ports/cc3200/util/sleeprestore.s +++ /dev/null @@ -1,61 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - -@ global variable with the backup registers - .extern vault_arm_registers -@ global function that performs the wake up actions - .extern pyb_sleep_suspend_exit - -@ uint sleep_store(void) - .global sleep_store - .thumb - .thumb_func - .type sleep_store, %function -sleep_store: - dsb - isb - push {r0-r12, lr} - ldr r1, =vault_arm_registers - mrs r0, msp - str r0, [r1] - mrs r0, psp - str r0, [r1, #4] - mrs r0, primask - str r0, [r1, #12] - mrs r0, faultmask - str r0, [r1, #16] - mrs r0, basepri - str r0, [r1, #20] - mrs r0, control - str r0, [r1, #24] - dsb - isb - bx lr - -@ uint sleep_restore(void) - .global sleep_restore - .thumb - .thumb_func - .type sleep_restore, %function -sleep_restore: - dsb - isb - mrs r0, msp - msr psp, r0 - ldr r1, =vault_arm_registers - ldr r0, [r1, #24] - msr control, r0 - ldr r0, [r1] - msr msp, r0 - ldr r0, [r1, #12] - msr primask, r0 - ldr r0, [r1, #16] - msr faultmask, r0 - ldr r0, [r1, #20] - msr basepri, r0 - dsb - isb - bl pyb_sleep_suspend_exit diff --git a/ports/cc3200/util/socketfifo.c b/ports/cc3200/util/socketfifo.c deleted file mode 100644 index d0a71504854a7..0000000000000 --- a/ports/cc3200/util/socketfifo.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "osi.h" -#include "fifo.h" -#include "socketfifo.h" - - -/*---------------------------------------------------------------------------- - ** Declare private functions - */ -static void socketfifo_Push (void * const pvFifo, const void * const pvElement); -static void socketfifo_Pop (void * const pvFifo, void * const pvElement); - -/*---------------------------------------------------------------------------- - ** Declare private data - */ -static FIFO_t *socketfifo; - -/*---------------------------------------------------------------------------- - ** Define public functions - */ -void SOCKETFIFO_Init (FIFO_t *fifo, void *elements, uint32_t maxcount) { - // Initialize global data - socketfifo = fifo; - socketfifo->pvElements = elements; - FIFO_Init (socketfifo, maxcount, socketfifo_Push, socketfifo_Pop); -} - -bool SOCKETFIFO_Push (const void * const element) { - return FIFO_bPushElement (socketfifo, element); -} - -bool SOCKETFIFO_Pop (void * const element) { - return FIFO_bPopElement (socketfifo, element); -} - -bool SOCKETFIFO_Peek (void * const element) { - return FIFO_bPeekElement (socketfifo, element); -} - -bool SOCKETFIFO_IsEmpty (void) { - return FIFO_IsEmpty (socketfifo); -} - -bool SOCKETFIFO_IsFull (void) { - return FIFO_IsFull (socketfifo); -} - -void SOCKETFIFO_Flush (void) { - SocketFifoElement_t element; - while (SOCKETFIFO_Pop(&element)) { - if (element.freedata) { - mem_Free(element.data); - } - } -} - -unsigned int SOCKETFIFO_Count (void) { - return socketfifo->uiElementCount; -} - -/*---------------------------------------------------------------------------- - ** Define private functions - */ -static void socketfifo_Push (void * const pvFifo, const void * const pvElement) { - if ((pvFifo != NULL) && (NULL != pvElement)) { - unsigned int uiLast = ((FIFO_t *)pvFifo)->uiLast; - memcpy (&((SocketFifoElement_t *)((FIFO_t *)pvFifo)->pvElements)[uiLast], pvElement, sizeof(SocketFifoElement_t)); - } -} - -static void socketfifo_Pop (void * const pvFifo, void * const pvElement) { - if ((pvFifo != NULL) && (NULL != pvElement)) { - unsigned int uiFirst = ((FIFO_t *)pvFifo)->uiFirst; - memcpy (pvElement, &((SocketFifoElement_t *)((FIFO_t *)pvFifo)->pvElements)[uiFirst], sizeof(SocketFifoElement_t)); - } -} - diff --git a/ports/cc3200/util/socketfifo.h b/ports/cc3200/util/socketfifo.h deleted file mode 100644 index e6cf851b1a48c..0000000000000 --- a/ports/cc3200/util/socketfifo.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H -#define MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H - -/*---------------------------------------------------------------------------- - ** Imports - */ - -/*---------------------------------------------------------------------------- - ** Define constants - */ - -/*---------------------------------------------------------------------------- - ** Define types - */ - -typedef struct { - void *data; - signed short *sd; - unsigned short datasize; - unsigned char closesockets; - bool freedata; - -}SocketFifoElement_t; - -/*---------------------------------------------------------------------------- - ** Declare public functions - */ -extern void SOCKETFIFO_Init (FIFO_t *fifo, void *elements, uint32_t maxcount); -extern bool SOCKETFIFO_Push (const void * const element); -extern bool SOCKETFIFO_Pop (void * const element); -extern bool SOCKETFIFO_Peek (void * const element); -extern bool SOCKETFIFO_IsEmpty (void); -extern bool SOCKETFIFO_IsFull (void); -extern void SOCKETFIFO_Flush (void); -extern unsigned int SOCKETFIFO_Count (void); - -#endif // MICROPY_INCLUDED_CC3200_UTIL_SOCKETFIFO_H diff --git a/ports/cc3200/version.h b/ports/cc3200/version.h deleted file mode 100644 index fccb95c5211b8..0000000000000 --- a/ports/cc3200/version.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Daniel Campora - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_CC3200_VERSION_H -#define MICROPY_INCLUDED_CC3200_VERSION_H - -#define WIPY_SW_VERSION_NUMBER "1.2.0" - -#endif // MICROPY_INCLUDED_CC3200_VERSION_H diff --git a/ports/stm32/.gitignore b/ports/cxd56/.gitignore similarity index 100% rename from ports/stm32/.gitignore rename to ports/cxd56/.gitignore diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile new file mode 100644 index 0000000000000..e2fce976d7eba --- /dev/null +++ b/ports/cxd56/Makefile @@ -0,0 +1,228 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright 2019 Sony Semiconductor Solutions Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk + +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk + +# Port-specific +include mpconfigport.mk + +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +SPRESENSE_SDK = spresense-exported-sdk + +FIRMWARE = $(SPRESENSE_SDK)/firmware + +# Platforms are: Linux, Darwin, MSYS, CYGWIN +PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null))) + +ifeq ($(PLATFORM),Darwin) + # macOS + MKSPK = mkspk/mkspk +else ifeq ($(PLATFORM),Linux) + # Linux + MKSPK = mkspk/mkspk +else + # Cygwin/MSYS2 + MKSPK = mkspk/mkspk.exe +endif + +SERIAL ?= /dev/ttyUSB0 + +INC += \ + -I. \ + -I../.. \ + -I../lib/mp-readline \ + -I../lib/timeutils \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -Iboards/$(BOARD) \ + -I$(BUILD) \ + -I$(SPRESENSE_SDK)/nuttx/include \ + -I$(SPRESENSE_SDK)/nuttx/arch \ + -I$(SPRESENSE_SDK)/nuttx/arch/chip \ + -I$(SPRESENSE_SDK)/nuttx/arch/os \ + -I$(SPRESENSE_SDK)/sdk/bsp/include \ + -I$(SPRESENSE_SDK)/sdk/bsp/include/sdk \ + +CFLAGS += \ + $(INC) \ + -DCONFIG_WCHAR_BUILTIN \ + -DCONFIG_HAVE_DOUBLE \ + -Dmain=spresense_main \ + -D_estack=__stack \ + -c \ + -Os \ + -pipe \ + -std=gnu11 \ + -mcpu=cortex-m4 \ + -mthumb \ + -mfpu=fpv4-sp-d16 \ + -mfloat-abi=hard \ + -mabi=aapcs \ + -fno-builtin \ + -fno-strict-aliasing \ + -fno-strength-reduce \ + -fomit-frame-pointer \ + -ffunction-sections \ + -fdata-sections \ + -Wall \ + +LIBM = "${shell "$(CC)" $(CFLAGS) -print-file-name=libm.a}" + +LIBGCC = "${shell "$(CC)" $(CFLAGS) -print-libgcc-file-name}" + +LDFLAGS = \ + --entry=__start \ + -nostartfiles \ + -nodefaultlibs \ + -T$(SPRESENSE_SDK)/nuttx/build/ramconfig.ld \ + --gc-sections \ + -Map=$(BUILD)/output.map \ + -o $(BUILD)/firmware.elf \ + --start-group \ + -u spresense_main \ + -u board_timerhook \ + $(BUILD)/libmpy.a \ + $(SPRESENSE_SDK)/sdk/libs/libapps.a \ + $(SPRESENSE_SDK)/sdk/libs/libsdk.a \ + $(LIBM) \ + $(LIBGCC) \ + --end-group \ + -L$(BUILD) \ + +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_CXD56 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=512 $(CFLAGS_MOD) + +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) + +SRC_S = supervisor/cpu.s + +SRC_C = \ + tick.c \ + background.c \ + fatfs_port.c \ + mphalport.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + lib/utils/stdout_helpers.c \ + lib/utils/pyexec.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ + lib/timeutils/timeutils.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/utils/interrupt_char.c \ + lib/utils/sys_stdio_mphal.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/buffer_helper.c \ + supervisor/shared/memory.c \ + lib/tinyusb/src/portable/sony/cxd56/dcd_cxd56.c \ + +OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + +all: $(BUILD)/firmware.spk + +$(FIRMWARE): + $(ECHO) "" + $(ECHO) "Download the spresense binaries zip archive from:" + $(ECHO) "https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000" + $(ECHO) "Extract spresense binaries to $(FIRMWARE)" + $(ECHO) "" + $(ECHO) "run make flash-bootloader again to flash bootloader." + exit 1 + +$(BUILD)/libmpy.a: $(SPRESENSE_SDK) $(OBJ) + $(ECHO) "AR $@" + $(Q)$(AR) rcs $(BUILD)/libmpy.a $(OBJ) + +$(BUILD)/firmware.elf: $(BUILD)/libmpy.a + $(ECHO) "LD $@" + $(Q)$(LD) $(LDFLAGS) + +$(MKSPK): + $(MAKE) -C mkspk + +$(BUILD)/firmware.spk: $(BUILD)/firmware.elf $(MKSPK) + $(ECHO) "Creating $@" + $(MKSPK) -c 2 $(BUILD)/firmware.elf nuttx $(BUILD)/firmware.spk + +flash: $(BUILD)/firmware.spk + $(ECHO) "Writing $< to the board" + $(SPRESENSE_SDK)/sdk/tools/flash.sh -c $(SERIAL) $(BUILD)/firmware.spk + +flash-bootloader: $(SPRESENSE_SDK) $(FIRMWARE) + $(ECHO) "Writing loader to the board" + $(SPRESENSE_SDK)/sdk/tools/flash.sh -l $(FIRMWARE) -c $(SERIAL) + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/cxd56/README.md b/ports/cxd56/README.md new file mode 100644 index 0000000000000..ec284e7421f00 --- /dev/null +++ b/ports/cxd56/README.md @@ -0,0 +1,98 @@ +# CircuitPython port to Spresense # + +This directory contains the port of CircuitPython to Spresense. It is a compact +development board based on Sony’s power-efficient multicore microcontroller +CXD5602. + +Board features: + +* Integrated GPS + * The embedded GNSS with support for GPS, QZSS and GLONASS enables applications + where tracking is required. +* Hi-res audio output and multi mic inputs + * Advanced 192kHz/24 bit audio codec and amplifier for audio output, and + support for up to 8 mic input channels. +* Multicore microcontroller + * Spresense is powered by Sony's CXD5602 microcontroller (ARM® Cortex®-M4F × 6 + cores), with a clock speed of 156 MHz. + +Currently, Spresense port does not support GNSS, Audio and Multicore. + +Refer to [developer.sony.com/develop/spresense/](https://developer.sony.com/develop/spresense/) +for further information about this board. + +## Prerequisites ## + +### Linux ### + +Add user to `dialout` group: + + $ sudo usermod -a -G dialout + +### Windows ### + +Download and install USB serial driver + +* [CP210x USB to serial driver for Windows 7/8/8.1](https://www.silabs.com/documents/public/software/CP210x_Windows_Drivers.zip) + +* [CP210x USB to serial driver for Windows 10](https://www.silabs.com/documents/public/software/CP210x_Universal_Windows_Driver.zip) + +### macOS ### + +Download and install USB serial driver + +* [CP210x USB to serial driver for Mac OS X](https://www.silabs.com/documents/public/software/Mac_OSX_VCP_Driver.zip) + +## Build instructions ## + +Pull all submodules into your clone: + + $ git submodule update --init --recursive + +Build the MicroPython cross-compiler: + + $ make -C mpy-cross + +Change directory to cxd56: + + $ cd ports/cxd56 + +To build circuitpython image run: + + $ make BOARD=spresense + +## USB connection ## + +Connect the `Spresense main board` to the PC via the USB cable. + +## Flash the bootloader ## + +The correct bootloader is required for the Spresense board to function. + +Bootloader information: + +* The bootloader has to be flashed the very first time the board is used. + +* You have to accept the End User License Agreement to be able to download and use the Spresense bootloader binary. + +Download the spresense binaries zip archive from: [Spresense firmware v1-4-000](https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000) + +Extract spresense binaries in your PC to ports/spresense/spresense-exported-sdk/firmware/ + +To flash the bootloader run the command: + + $ make BOARD=spresense flash-bootloader + +## Flash the circuitpython image ## + +To flash the firmware run the command: + + $ make BOARD=spresense flash + +## Accessing the board ## + +Connect the `Spresense extension board` to the PC via the USB cable. + +Once built and deployed, access the CircuitPython REPL (the Python prompt) via USB. You can run: + + $ screen /dev/ttyACM0 115200 diff --git a/ports/cxd56/alloca.h b/ports/cxd56/alloca.h new file mode 100644 index 0000000000000..aad2f8b5b33e7 --- /dev/null +++ b/ports/cxd56/alloca.h @@ -0,0 +1,6 @@ +#ifndef _ALLOCA_H +#define _ALLOCA_H + +#define alloca __builtin_alloca + +#endif /* _ALLOCA_H */ diff --git a/ports/cxd56/background.c b/ports/cxd56/background.c new file mode 100644 index 0000000000000..ade257dd24b80 --- /dev/null +++ b/ports/cxd56/background.c @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "background.h" + +#include "supervisor/usb.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/stack.h" + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + + assert_heap_ok(); + running_background_tasks = true; + + usb_background(); + filesystem_background(); + + running_background_tasks = false; + assert_heap_ok(); +} diff --git a/ports/cxd56/background.h b/ports/cxd56/background.h new file mode 100644 index 0000000000000..a38e3faed4e4c --- /dev/null +++ b/ports/cxd56/background.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_BACKGROUND_H +#define MICROPY_INCLUDED_CXD56_BACKGROUND_H + +void background_tasks_reset(void); +void run_background_tasks(void); + +#endif // MICROPY_INCLUDED_CXD56_BACKGROUND_H diff --git a/ports/cxd56/boards/board.h b/ports/cxd56/boards/board.h new file mode 100644 index 0000000000000..597ae72e6a2da --- /dev/null +++ b/ports/cxd56/boards/board.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H +#define MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H + +#include + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_CXD56_BOARDS_BOARD_H diff --git a/ports/cxd56/boards/spresense/board.c b/ports/cxd56/boards/spresense/board.c new file mode 100644 index 0000000000000..2af7cfdcf2dab --- /dev/null +++ b/ports/cxd56/boards/spresense/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/cxd56/boards/spresense/mpconfigboard.h b/ports/cxd56/boards/spresense/mpconfigboard.h new file mode 100644 index 0000000000000..0245e20450d83 --- /dev/null +++ b/ports/cxd56/boards/spresense/mpconfigboard.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define MICROPY_HW_BOARD_NAME "SPRESENSE" +#define MICROPY_HW_MCU_NAME "CXD5602" + +#define DEFAULT_I2C_BUS_SCL (&pin_I2C0_BCK) +#define DEFAULT_I2C_BUS_SDA (&pin_I2C0_BDT) + +#define DEFAULT_SPI_BUS_SCK (&pin_SPI4_SCK) +#define DEFAULT_SPI_BUS_MISO (&pin_SPI4_MISO) +#define DEFAULT_SPI_BUS_MOSI (&pin_SPI4_MOSI) + +#define DEFAULT_UART_BUS_RX (&pin_UART2_RXD) +#define DEFAULT_UART_BUS_TX (&pin_UART2_TXD) diff --git a/ports/cxd56/boards/spresense/mpconfigboard.mk b/ports/cxd56/boards/spresense/mpconfigboard.mk new file mode 100644 index 0000000000000..7b8ac6ff63446 --- /dev/null +++ b/ports/cxd56/boards/spresense/mpconfigboard.mk @@ -0,0 +1,6 @@ +USB_VID = 0x054c +USB_PID = 0x0bc2 +USB_PRODUCT = "Spresense" +USB_MANUFACTURER = "Sony" + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/cxd56/boards/spresense/pins.c b/ports/cxd56/boards/spresense/pins.c new file mode 100644 index 0000000000000..fcc854590a41c --- /dev/null +++ b/ports/cxd56/boards/spresense/pins.c @@ -0,0 +1,80 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_HIF_IRQ_OUT) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PWM3) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_SPI2_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PWM1) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PWM0) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_SPI3_CS1_X) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_SPI2_MISO) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PWM2) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_SPI4_CS_X) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_EMMC_DATA0) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_EMMC_DATA1) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_I2S0_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_I2S0_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_EMMC_DATA2) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_EMMC_DATA3) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_SEN_IRQ_IN) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_EMMC_CLK) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_EMMC_CMD) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_I2S0_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_I2S0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_UART2_CTS) }, + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_UART2_RTS) }, + { MP_ROM_QSTR(MP_QSTR_LED0), MP_ROM_PTR(&pin_I2S1_BCK) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_I2S1_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_I2S1_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_I2S1_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_LPADC0) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_LPADC1) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_LPADC2) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_LPADC3) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_HPADC0) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_HPADC1) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/cxd56/common-hal/analogio/AnalogIn.c b/ports/cxd56/common-hal/analogio/AnalogIn.c new file mode 100644 index 0000000000000..cdf37c06a7d1e --- /dev/null +++ b/ports/cxd56/common-hal/analogio/AnalogIn.c @@ -0,0 +1,133 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogIn.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *pin; + int fd; +} analogin_dev_t; + +STATIC analogin_dev_t analogin_dev[] = { + {"/dev/lpadc0", &pin_LPADC0, -1}, + {"/dev/lpadc1", &pin_LPADC1, -1}, + {"/dev/lpadc2", &pin_LPADC2, -1}, + {"/dev/lpadc3", &pin_LPADC3, -1}, + {"/dev/hpadc0", &pin_HPADC0, -1}, + {"/dev/hpadc1", &pin_HPADC1, -1}, +}; + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) { + if (!pin->analog) { + mp_raise_ValueError(translate("AnalogIn not supported on given pin")); + } + + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(analogin_dev); i++) { + if (pin->number == analogin_dev[i].pin->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + + if (analogin_dev[self->number].fd < 0) { + analogin_dev[self->number].fd = open(analogin_dev[self->number].devpath, O_RDONLY); + if (analogin_dev[self->number].fd < 0) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + } + + // SCU FIFO overwrite + ioctl(analogin_dev[self->number].fd, SCUIOC_SETFIFOMODE, 1); + + // ADC FIFO size + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_FIFOSIZE, 2); + + // start ADC + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_START, 0); + + self->pin = pin; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + + // stop ADC + ioctl(analogin_dev[self->number].fd, ANIOC_CXD56_STOP, 0); + close(analogin_dev[self->number].fd); + analogin_dev[self->number].fd = -1; + + self->pin = NULL; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return analogin_dev[self->number].fd < 0; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + uint16_t value = 0; + + read(analogin_dev[self->number].fd, &value, sizeof(value)); + + return value; +} + +// Reference voltage is a fixed value which is depending on the board. +// e.g.) +// - Reference Voltage of A4 and A5 pins on Main Board is 0.7V. +// - Reference Voltage of A0 ~ A5 pins on External Interface board +// is selected 3.3V or 5.0V by a IO Volt jumper pin. +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 0.0f; +} + +void analogin_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(analogin_dev); i++) { + if (analogin_dev[i].fd >= 0) { + // stop ADC + ioctl(analogin_dev[i].fd, ANIOC_CXD56_STOP, 0); + close(analogin_dev[i].fd); + analogin_dev[i].fd = -1; + } + } +} diff --git a/ports/cxd56/common-hal/analogio/AnalogIn.h b/ports/cxd56/common-hal/analogio/AnalogIn.h new file mode 100644 index 0000000000000..9cf73003f50d0 --- /dev/null +++ b/ports/cxd56/common-hal/analogio/AnalogIn.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + int8_t number; +} analogio_analogin_obj_t; + +void analogin_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/cxd56/common-hal/analogio/AnalogOut.c b/ports/cxd56/common-hal/analogio/AnalogOut.c new file mode 100644 index 0000000000000..3f1abe80d10ec --- /dev/null +++ b/ports/cxd56/common-hal/analogio/AnalogOut.c @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t *self, const mcu_pin_obj_t *pin) { + mp_raise_RuntimeError(translate("AnalogOut functionality not supported")); +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return true; +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { +} diff --git a/ports/cxd56/common-hal/analogio/AnalogOut.h b/ports/cxd56/common-hal/analogio/AnalogOut.h new file mode 100644 index 0000000000000..b0fd65265a08a --- /dev/null +++ b/ports/cxd56/common-hal/analogio/AnalogOut.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} analogio_analogout_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/esp8266/common-hal/analogio/__init__.c b/ports/cxd56/common-hal/analogio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/analogio/__init__.c rename to ports/cxd56/common-hal/analogio/__init__.c diff --git a/ports/cxd56/common-hal/board/__init__.c b/ports/cxd56/common-hal/board/__init__.c new file mode 100644 index 0000000000000..7a409d503edc5 --- /dev/null +++ b/ports/cxd56/common-hal/board/__init__.c @@ -0,0 +1 @@ +// No board module functions. diff --git a/ports/cxd56/common-hal/busio/I2C.c b/ports/cxd56/common-hal/busio/I2C.c new file mode 100644 index 0000000000000..c163c183a914f --- /dev/null +++ b/ports/cxd56/common-hal/busio/I2C.c @@ -0,0 +1,123 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/busio/I2C.h" + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, + const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + if (frequency != I2C_SPEED_STANDARD && frequency != I2C_SPEED_FAST) { + mp_raise_ValueError(translate("Unsupported baudrate")); + } + + if (scl->number != PIN_I2C0_BCK || sda->number != PIN_I2C0_BDT) { + mp_raise_ValueError(translate("Invalid pins")); + } + + claim_pin(scl); + claim_pin(sda); + + self->scl_pin = scl; + self->sda_pin = sda; + self->frequency = frequency; + self->i2c_dev = cxd56_i2cbus_initialize(0); +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + cxd56_i2cbus_uninitialize(self->i2c_dev); + self->i2c_dev = NULL; + + reset_pin_number(self->scl_pin->number); + reset_pin_number(self->sda_pin->number); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->i2c_dev == NULL; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = addr; + msg.flags = 0; + msg.buffer = NULL; + msg.length = 0; + return I2C_TRANSFER(self->i2c_dev, &msg, 1) < 0 ? false : true; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t address, const uint8_t *data, size_t len, bool stop) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = address; + msg.flags = (stop ? 0 : I2C_M_NOSTOP); + msg.buffer = (uint8_t *) data; + msg.length = len; + return I2C_TRANSFER(self->i2c_dev, &msg, 1); +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t address, uint8_t *data, size_t len) { + struct i2c_msg_s msg; + + msg.frequency = self->frequency; + msg.addr = address; + msg.flags = I2C_M_READ; + msg.buffer = data; + msg.length = len; + return I2C_TRANSFER(self->i2c_dev, &msg, 1); +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + never_reset_pin_number(self->scl_pin->number); + never_reset_pin_number(self->sda_pin->number); +} diff --git a/ports/cxd56/common-hal/busio/I2C.h b/ports/cxd56/common-hal/busio/I2C.h new file mode 100644 index 0000000000000..cdef270bfa513 --- /dev/null +++ b/ports/cxd56/common-hal/busio/I2C.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + struct i2c_master_s* i2c_dev; + uint32_t frequency; + bool has_lock; + const mcu_pin_obj_t *scl_pin; + const mcu_pin_obj_t *sda_pin; +} busio_i2c_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/cxd56/common-hal/busio/OneWire.h b/ports/cxd56/common-hal/busio/OneWire.h new file mode 100644 index 0000000000000..17c1b22375f41 --- /dev/null +++ b/ports/cxd56/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/cxd56/common-hal/busio/SPI.c b/ports/cxd56/common-hal/busio/SPI.c new file mode 100644 index 0000000000000..9a41011f2a609 --- /dev/null +++ b/ports/cxd56/common-hal/busio/SPI.c @@ -0,0 +1,155 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/busio/SPI.h" + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, + const mcu_pin_obj_t *mosi, const mcu_pin_obj_t *miso) { + int port = -1; + + if (clock->number == PIN_SPI4_SCK && mosi->number == PIN_SPI4_MOSI && miso->number == PIN_SPI4_MISO) { + port = 4; + } else if (clock->number == PIN_EMMC_CLK && mosi->number == PIN_EMMC_DATA0 && miso->number == PIN_EMMC_DATA1) { + port = 5; + } + + if (port < 0) { + mp_raise_ValueError(translate("Invalid pins")); + } + + claim_pin(clock); + claim_pin(mosi); + claim_pin(miso); + + self->clock_pin = clock; + self->mosi_pin = mosi; + self->miso_pin = miso; + self->spi_dev = cxd56_spibus_initialize(port); +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + + self->spi_dev = NULL; + + reset_pin_number(self->clock_pin->number); + reset_pin_number(self->mosi_pin->number); + reset_pin_number(self->miso_pin->number); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->spi_dev == NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + uint8_t mode; + + self->frequency = baudrate; + SPI_SETFREQUENCY(self->spi_dev, baudrate); + + if (polarity == 0) { + if (phase == 0) { + mode = SPIDEV_MODE0; + } else { + mode = SPIDEV_MODE1; + } + } else { + if (phase == 0) { + mode = SPIDEV_MODE2; + } else { + mode = SPIDEV_MODE3; + } + } + + self->polarity = polarity; + self->phase = phase; + SPI_SETMODE(self->spi_dev, mode); + + self->bits = bits; + SPI_SETBITS(self->spi_dev, bits); + + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { + SPI_EXCHANGE(self->spi_dev, data, NULL, len); + + return true; +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { + SPI_EXCHANGE(self->spi_dev, NULL, data, len); + + return true; +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + SPI_EXCHANGE(self->spi_dev, data_out, data_in, len); + + return true; +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t *self) { + return self->frequency; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return self->phase; +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t *self) { + return self->polarity; +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + never_reset_pin_number(self->clock_pin->number); + never_reset_pin_number(self->mosi_pin->number); + never_reset_pin_number(self->miso_pin->number); +} diff --git a/ports/cxd56/common-hal/busio/SPI.h b/ports/cxd56/common-hal/busio/SPI.h new file mode 100644 index 0000000000000..8985a60d9f460 --- /dev/null +++ b/ports/cxd56/common-hal/busio/SPI.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H + +#include + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + struct spi_dev_s* spi_dev; + uint32_t frequency; + uint8_t phase; + uint8_t polarity; + uint8_t bits; + bool has_lock; + const mcu_pin_obj_t *clock_pin; + const mcu_pin_obj_t *mosi_pin; + const mcu_pin_obj_t *miso_pin; +} busio_spi_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c new file mode 100644 index 0000000000000..3bca240e01f94 --- /dev/null +++ b/ports/cxd56/common-hal/busio/UART.c @@ -0,0 +1,212 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "py/mperrno.h" +#include "py/stream.h" +#include "py/runtime.h" + +#include "shared-bindings/busio/UART.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *tx; + const mcu_pin_obj_t *rx; + int fd; +} busio_uart_dev_t; + +STATIC busio_uart_dev_t busio_uart_dev[] = { + {"/dev/ttyS2", &pin_UART2_TXD, &pin_UART2_RXD, -1}, +}; + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + struct termios tio; + + if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + + if (bits != 8) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + if (parity != PARITY_NONE) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + if (stop != 1) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(busio_uart_dev); i++) { + if (tx->number == busio_uart_dev[i].tx->number && + rx->number == busio_uart_dev[i].rx->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + mp_raise_ValueError(translate("Invalid pins")); + } + + if (busio_uart_dev[self->number].fd < 0) { + busio_uart_dev[self->number].fd = open(busio_uart_dev[self->number].devpath, O_RDWR); + if (busio_uart_dev[self->number].fd < 0) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + } + + ioctl(busio_uart_dev[self->number].fd, TCGETS, (long unsigned int)&tio); + tio.c_speed = baudrate; + ioctl(busio_uart_dev[self->number].fd, TCSETS, (long unsigned int)&tio); + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); + + claim_pin(tx); + claim_pin(rx); + + self->tx_pin = tx; + self->rx_pin = rx; + self->baudrate = baudrate; + self->timeout_us = timeout * 1000000; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + + close(busio_uart_dev[self->number].fd); + busio_uart_dev[self->number].fd = -1; + + reset_pin_number(self->tx_pin->number); + reset_pin_number(self->rx_pin->number); +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return busio_uart_dev[self->number].fd < 0; +} + +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + fd_set rfds; + struct timeval tv; + int retval, bytes_read; + + // make sure we want at least 1 char + if (len == 0) { + return 0; + } + + FD_ZERO(&rfds); + FD_SET(busio_uart_dev[self->number].fd, &rfds); + + tv.tv_sec = 0; + tv.tv_usec = self->timeout_us; + + retval = select(busio_uart_dev[self->number].fd + 1, &rfds, NULL, NULL, &tv); + + if (retval) { + bytes_read = read(busio_uart_dev[self->number].fd, data, len); + } else { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + + return bytes_read; +} + +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + int bytes_written = write(busio_uart_dev[self->number].fd, data, len); + if (bytes_written < 0) { + *errcode = MP_EAGAIN; + return MP_STREAM_ERROR; + } + + return bytes_written; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + struct termios tio; + + ioctl(busio_uart_dev[self->number].fd, TCGETS, (long unsigned int)&tio); + tio.c_speed = baudrate; + ioctl(busio_uart_dev[self->number].fd, TCSETS, (long unsigned int)&tio); + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_us / 1000000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_us = timeout * 1000000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + int count = 0; + + ioctl(busio_uart_dev[self->number].fd, FIONREAD, (long unsigned int)&count); + + return count; +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + ioctl(busio_uart_dev[self->number].fd, TCFLSH, (long unsigned int)NULL); + return true; +} + +void busio_uart_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(busio_uart_dev); i++) { + if (busio_uart_dev[i].fd >= 0) { + close(busio_uart_dev[i].fd); + busio_uart_dev[i].fd = -1; + } + } +} diff --git a/ports/cxd56/common-hal/busio/UART.h b/ports/cxd56/common-hal/busio/UART.h new file mode 100644 index 0000000000000..a69c470566b16 --- /dev/null +++ b/ports/cxd56/common-hal/busio/UART.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + int8_t number; + const mcu_pin_obj_t *tx_pin; + const mcu_pin_obj_t *rx_pin; + uint32_t baudrate; + uint32_t timeout_us; +} busio_uart_obj_t; + +void busio_uart_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_BUSIO_UART_H diff --git a/ports/esp8266/common-hal/busio/__init__.c b/ports/cxd56/common-hal/busio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/busio/__init__.c rename to ports/cxd56/common-hal/busio/__init__.c diff --git a/ports/cxd56/common-hal/digitalio/DigitalInOut.c b/ports/cxd56/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000000..c9af12e443430 --- /dev/null +++ b/ports/cxd56/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,136 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" + +digitalinout_result_t common_hal_digitalio_digitalinout_construct(digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + if (pin->analog) { + mp_raise_ValueError(translate("DigitalInOut not supported on given pin")); + } + + claim_pin(pin); + + self->pin = pin; + self->input = true; + self->open_drain = false; + + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, PIN_FLOAT); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_digitalio_digitalinout_switch_to_input(digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + self->input = true; + self->pull = pull; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output(digitalio_digitalinout_obj_t *self, bool value, digitalio_drive_mode_t drive_mode) { + self->input = false; + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + + if (self->open_drain) { + board_gpio_write(self->pin->number, 0); + } + common_hal_digitalio_digitalinout_set_value(self, value); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(digitalio_digitalinout_obj_t *self) { + return self->input ? DIRECTION_INPUT : DIRECTION_OUTPUT; +} + +void common_hal_digitalio_digitalinout_set_value(digitalio_digitalinout_obj_t *self, bool value) { + if (self->open_drain) { + if (value) { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, PIN_PULLUP); + } else { + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, 0); + } + } else { + board_gpio_write(self->pin->number, value); + } +} + +bool common_hal_digitalio_digitalinout_get_value(digitalio_digitalinout_obj_t *self) { + return board_gpio_read(self->pin->number); +} + +void common_hal_digitalio_digitalinout_set_drive_mode(digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { + if (drive_mode == DRIVE_MODE_PUSH_PULL) { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + self->open_drain = false; + } else { + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, 0); + self->open_drain = true; + } +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode(digitalio_digitalinout_obj_t *self) { + return self->open_drain ? DRIVE_MODE_OPEN_DRAIN : DRIVE_MODE_PUSH_PULL; +} + +void common_hal_digitalio_digitalinout_set_pull(digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + self->pull = pull; + board_gpio_write(self->pin->number, -1); + board_gpio_config(self->pin->number, 0, true, true, pull); +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(digitalio_digitalinout_obj_t *self) { + return self->pull; +} + +void common_hal_digitalio_digitalinout_never_reset(digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} diff --git a/ports/cxd56/common-hal/digitalio/DigitalInOut.h b/ports/cxd56/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 0000000000000..58a11817c8a30 --- /dev/null +++ b/ports/cxd56/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + bool input; + bool open_drain; + uint8_t pull; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/esp8266/common-hal/digitalio/__init__.c b/ports/cxd56/common-hal/digitalio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/digitalio/__init__.c rename to ports/cxd56/common-hal/digitalio/__init__.c diff --git a/ports/cxd56/common-hal/microcontroller/Pin.c b/ports/cxd56/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000000..23377197c2bfc --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Pin.c @@ -0,0 +1,162 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include +#include +#include +#include + +#include "shared-bindings/microcontroller/Pin.h" + +typedef struct { + const mcu_pin_obj_t *pin; + bool reset; + bool free; +} pin_status_t; + +const mcu_pin_obj_t pin_UART2_RXD = PIN(PIN_UART2_RXD, false); +const mcu_pin_obj_t pin_UART2_TXD = PIN(PIN_UART2_TXD, false); +const mcu_pin_obj_t pin_HIF_IRQ_OUT = PIN(PIN_HIF_IRQ_OUT, false); +const mcu_pin_obj_t pin_PWM3 = PIN(PIN_PWM3, false); +const mcu_pin_obj_t pin_SPI2_MOSI = PIN(PIN_SPI2_MOSI, false); +const mcu_pin_obj_t pin_PWM1 = PIN(PIN_PWM1, false); +const mcu_pin_obj_t pin_PWM0 = PIN(PIN_PWM0, false); +const mcu_pin_obj_t pin_SPI3_CS1_X = PIN(PIN_SPI3_CS1_X, false); +const mcu_pin_obj_t pin_SPI2_MISO = PIN(PIN_SPI2_MISO, false); +const mcu_pin_obj_t pin_PWM2 = PIN(PIN_PWM2, false); +const mcu_pin_obj_t pin_SPI4_CS_X = PIN(PIN_SPI4_CS_X, false); +const mcu_pin_obj_t pin_SPI4_MOSI = PIN(PIN_SPI4_MOSI, false); +const mcu_pin_obj_t pin_SPI4_MISO = PIN(PIN_SPI4_MISO, false); +const mcu_pin_obj_t pin_SPI4_SCK = PIN(PIN_SPI4_SCK, false); +const mcu_pin_obj_t pin_I2C0_BDT = PIN(PIN_I2C0_BDT, false); +const mcu_pin_obj_t pin_I2C0_BCK = PIN(PIN_I2C0_BCK, false); +const mcu_pin_obj_t pin_EMMC_DATA0 = PIN(PIN_EMMC_DATA0, false); +const mcu_pin_obj_t pin_EMMC_DATA1 = PIN(PIN_EMMC_DATA1, false); +const mcu_pin_obj_t pin_I2S0_DATA_OUT = PIN(PIN_I2S0_DATA_OUT, false); +const mcu_pin_obj_t pin_I2S0_DATA_IN = PIN(PIN_I2S0_DATA_IN, false); +const mcu_pin_obj_t pin_EMMC_DATA2 = PIN(PIN_EMMC_DATA2, false); +const mcu_pin_obj_t pin_EMMC_DATA3 = PIN(PIN_EMMC_DATA3, false); +const mcu_pin_obj_t pin_SEN_IRQ_IN = PIN(PIN_SEN_IRQ_IN, false); +const mcu_pin_obj_t pin_EMMC_CLK = PIN(PIN_EMMC_CLK, false); +const mcu_pin_obj_t pin_EMMC_CMD = PIN(PIN_EMMC_CMD, false); +const mcu_pin_obj_t pin_I2S0_LRCK = PIN(PIN_I2S0_LRCK, false); +const mcu_pin_obj_t pin_I2S0_BCK = PIN(PIN_I2S0_BCK, false); +const mcu_pin_obj_t pin_UART2_CTS = PIN(PIN_UART2_CTS, false); +const mcu_pin_obj_t pin_UART2_RTS = PIN(PIN_UART2_RTS, false); +const mcu_pin_obj_t pin_I2S1_BCK = PIN(PIN_I2S1_BCK, false); +const mcu_pin_obj_t pin_I2S1_LRCK = PIN(PIN_I2S1_LRCK, false); +const mcu_pin_obj_t pin_I2S1_DATA_IN = PIN(PIN_I2S1_DATA_IN, false); +const mcu_pin_obj_t pin_I2S1_DATA_OUT = PIN(PIN_I2S1_DATA_OUT, false); +const mcu_pin_obj_t pin_LPADC0 = PIN(0, true); +const mcu_pin_obj_t pin_LPADC1 = PIN(1, true); +const mcu_pin_obj_t pin_LPADC2 = PIN(2, true); +const mcu_pin_obj_t pin_LPADC3 = PIN(3, true); +const mcu_pin_obj_t pin_HPADC0 = PIN(4, true); +const mcu_pin_obj_t pin_HPADC1 = PIN(5, true); + +STATIC pin_status_t pins[] = { + { &pin_UART2_RXD, true, true }, + { &pin_UART2_TXD, true, true }, + { &pin_HIF_IRQ_OUT, true, true }, + { &pin_PWM3, true, true }, + { &pin_SPI2_MOSI, true, true }, + { &pin_PWM1, true, true }, + { &pin_PWM0, true, true }, + { &pin_SPI3_CS1_X, true, true }, + { &pin_SPI2_MISO, true, true }, + { &pin_PWM2, true, true }, + { &pin_SPI4_CS_X, true, true }, + { &pin_SPI4_MOSI, true, true }, + { &pin_SPI4_MISO, true, true }, + { &pin_SPI4_SCK, true, true }, + { &pin_I2C0_BDT, true, true }, + { &pin_I2C0_BCK, true, true }, + { &pin_EMMC_DATA0, true, true }, + { &pin_EMMC_DATA1, true, true }, + { &pin_I2S0_DATA_OUT, true, true }, + { &pin_I2S0_DATA_IN, true, true }, + { &pin_EMMC_DATA2, true, true }, + { &pin_EMMC_DATA3, true, true }, + { &pin_SEN_IRQ_IN, true, true }, + { &pin_EMMC_CLK, true, true }, + { &pin_EMMC_CMD, true, true }, + { &pin_I2S0_LRCK, true, true }, + { &pin_I2S0_BCK, true, true }, + { &pin_UART2_CTS, true, true }, + { &pin_UART2_RTS, true, true }, + { &pin_I2S1_BCK, true, true }, + { &pin_I2S1_LRCK, true, true }, + { &pin_I2S1_DATA_IN, true, true }, + { &pin_I2S1_DATA_OUT, true, true }, +}; + +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin->number) { + return pins[i].free; + } + } + + return true; +} + +void never_reset_pin_number(uint8_t pin_number) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin_number) { + pins[i].reset = false; + } + } +} + +void reset_pin_number(uint8_t pin_number) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin_number) { + pins[i].free = true; + } + } +} + +void reset_all_pins(void) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (!pins[i].free && pins[i].reset) { + board_gpio_write(pins[i].pin->number, -1); + board_gpio_config(pins[i].pin->number, 0, false, true, PIN_FLOAT); + board_gpio_int(pins[i].pin->number, false); + board_gpio_intconfig(pins[i].pin->number, 0, false, NULL); + pins[i].free = true; + } + } +} + +void claim_pin(const mcu_pin_obj_t *pin) { + for (int i = 0; i < MP_ARRAY_SIZE(pins); i++) { + if (pins[i].pin->number == pin->number) { + pins[i].free = false; + } + } +} diff --git a/ports/cxd56/common-hal/microcontroller/Pin.h b/ports/cxd56/common-hal/microcontroller/Pin.h new file mode 100644 index 0000000000000..fe6524edb5aa1 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Pin.h @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +#define PIN(pin, a) \ +{ \ + { &mcu_pin_type }, \ + .number = (pin), \ + .analog = (a) \ +} + +typedef struct { + mp_obj_base_t base; + uint8_t number; + bool analog; +} mcu_pin_obj_t; + +extern const mcu_pin_obj_t pin_UART2_RXD; +extern const mcu_pin_obj_t pin_UART2_TXD; +extern const mcu_pin_obj_t pin_HIF_IRQ_OUT; +extern const mcu_pin_obj_t pin_PWM3; +extern const mcu_pin_obj_t pin_SPI2_MOSI; +extern const mcu_pin_obj_t pin_PWM1; +extern const mcu_pin_obj_t pin_PWM0; +extern const mcu_pin_obj_t pin_SPI3_CS1_X; +extern const mcu_pin_obj_t pin_SPI2_MISO; +extern const mcu_pin_obj_t pin_PWM2; +extern const mcu_pin_obj_t pin_SPI4_CS_X; +extern const mcu_pin_obj_t pin_SPI4_MOSI; +extern const mcu_pin_obj_t pin_SPI4_MISO; +extern const mcu_pin_obj_t pin_SPI4_SCK; +extern const mcu_pin_obj_t pin_I2C0_BDT; +extern const mcu_pin_obj_t pin_I2C0_BCK; +extern const mcu_pin_obj_t pin_EMMC_DATA0; +extern const mcu_pin_obj_t pin_EMMC_DATA1; +extern const mcu_pin_obj_t pin_I2S0_DATA_OUT; +extern const mcu_pin_obj_t pin_I2S0_DATA_IN; +extern const mcu_pin_obj_t pin_EMMC_DATA2; +extern const mcu_pin_obj_t pin_EMMC_DATA3; +extern const mcu_pin_obj_t pin_SEN_IRQ_IN; +extern const mcu_pin_obj_t pin_EMMC_CLK; +extern const mcu_pin_obj_t pin_EMMC_CMD; +extern const mcu_pin_obj_t pin_I2S0_LRCK; +extern const mcu_pin_obj_t pin_I2S0_BCK; +extern const mcu_pin_obj_t pin_UART2_CTS; +extern const mcu_pin_obj_t pin_UART2_RTS; +extern const mcu_pin_obj_t pin_I2S1_BCK; +extern const mcu_pin_obj_t pin_I2S1_LRCK; +extern const mcu_pin_obj_t pin_I2S1_DATA_IN; +extern const mcu_pin_obj_t pin_I2S1_DATA_OUT; +extern const mcu_pin_obj_t pin_LPADC0; +extern const mcu_pin_obj_t pin_LPADC1; +extern const mcu_pin_obj_t pin_LPADC2; +extern const mcu_pin_obj_t pin_LPADC3; +extern const mcu_pin_obj_t pin_HPADC0; +extern const mcu_pin_obj_t pin_HPADC1; + +void never_reset_pin_number(uint8_t pin_number); +void reset_pin_number(uint8_t pin_number); +void reset_all_pins(void); +void claim_pin(const mcu_pin_obj_t* pin); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/cxd56/common-hal/microcontroller/Processor.c b/ports/cxd56/common-hal/microcontroller/Processor.c new file mode 100644 index 0000000000000..3e6fc3b8aa7c3 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Processor.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +// For NAN: remove when not needed. +#include +#include "py/mphal.h" + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return mp_hal_ticks_cpu(); +} + +float common_hal_mcu_processor_get_temperature(void) { + return NAN; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + boardctl(BOARDIOC_UNIQUEID, (uintptr_t) raw_id); +} diff --git a/ports/cxd56/common-hal/microcontroller/Processor.h b/ports/cxd56/common-hal/microcontroller/Processor.h new file mode 100644 index 0000000000000..12555e82c14a9 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/Processor.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH CONFIG_BOARDCTL_UNIQUEID_SIZE + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} mcu_processor_obj_t; + +const mp_obj_type_t mcu_processor_type; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/cxd56/common-hal/microcontroller/__init__.c b/ports/cxd56/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000000..2be74b0069741 --- /dev/null +++ b/ports/cxd56/common-hal/microcontroller/__init__.c @@ -0,0 +1,111 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mphal.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/safe_mode.h" + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +void common_hal_mcu_delay_us(uint32_t delay) { + mp_hal_delay_us(delay); +} + +void common_hal_mcu_disable_interrupts(void) { + __asm volatile ("cpsid i" : : : "memory"); +} + +void common_hal_mcu_enable_interrupts(void) { + __asm volatile ("cpsie i" : : : "memory"); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if(runmode == RUNMODE_BOOTLOADER) { + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); + } else if(runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } +} + +void common_hal_mcu_reset(void) { + filesystem_flush(); + boardctl(BOARDIOC_RESET, 0); +} + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_UART2_RXD), MP_ROM_PTR(&pin_UART2_RXD) }, + { MP_ROM_QSTR(MP_QSTR_UART2_TXD), MP_ROM_PTR(&pin_UART2_TXD) }, + { MP_ROM_QSTR(MP_QSTR_HIF_IRQ_OUT), MP_ROM_PTR(&pin_HIF_IRQ_OUT) }, + { MP_ROM_QSTR(MP_QSTR_PWM3), MP_ROM_PTR(&pin_PWM3) }, + { MP_ROM_QSTR(MP_QSTR_SPI2_MOSI), MP_ROM_PTR(&pin_SPI2_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_PWM1) }, + { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_PWM0) }, + { MP_ROM_QSTR(MP_QSTR_SPI3_CS1_X), MP_ROM_PTR(&pin_SPI3_CS1_X) }, + { MP_ROM_QSTR(MP_QSTR_SPI2_MISO), MP_ROM_PTR(&pin_SPI2_MISO) }, + { MP_ROM_QSTR(MP_QSTR_PWM2), MP_ROM_PTR(&pin_PWM2) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_CS_X), MP_ROM_PTR(&pin_SPI4_CS_X) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_MOSI), MP_ROM_PTR(&pin_SPI4_MOSI) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_MISO), MP_ROM_PTR(&pin_SPI4_MISO) }, + { MP_ROM_QSTR(MP_QSTR_SPI4_SCK), MP_ROM_PTR(&pin_SPI4_SCK) }, + { MP_ROM_QSTR(MP_QSTR_I2C0_BDT), MP_ROM_PTR(&pin_I2C0_BDT) }, + { MP_ROM_QSTR(MP_QSTR_I2C0_BCK), MP_ROM_PTR(&pin_I2C0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA0), MP_ROM_PTR(&pin_EMMC_DATA0) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA1), MP_ROM_PTR(&pin_EMMC_DATA1) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_DATA_OUT), MP_ROM_PTR(&pin_I2S0_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_DATA_IN), MP_ROM_PTR(&pin_I2S0_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA2), MP_ROM_PTR(&pin_EMMC_DATA2) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_DATA3), MP_ROM_PTR(&pin_EMMC_DATA3) }, + { MP_ROM_QSTR(MP_QSTR_SEN_IRQ_IN), MP_ROM_PTR(&pin_SEN_IRQ_IN) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_CLK), MP_ROM_PTR(&pin_EMMC_CLK) }, + { MP_ROM_QSTR(MP_QSTR_EMMC_CMD), MP_ROM_PTR(&pin_EMMC_CMD) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_LRCK), MP_ROM_PTR(&pin_I2S0_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S0_BCK), MP_ROM_PTR(&pin_I2S0_BCK) }, + { MP_ROM_QSTR(MP_QSTR_UART2_CTS), MP_ROM_PTR(&pin_UART2_CTS) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RTS), MP_ROM_PTR(&pin_UART2_RTS) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_BCK), MP_ROM_PTR(&pin_I2S1_BCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_LRCK), MP_ROM_PTR(&pin_I2S1_LRCK) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_DATA_IN), MP_ROM_PTR(&pin_I2S1_DATA_IN) }, + { MP_ROM_QSTR(MP_QSTR_I2S1_DATA_OUT), MP_ROM_PTR(&pin_I2S1_DATA_OUT) }, + { MP_ROM_QSTR(MP_QSTR_LPADC0), MP_ROM_PTR(&pin_LPADC0) }, + { MP_ROM_QSTR(MP_QSTR_LPADC1), MP_ROM_PTR(&pin_LPADC1) }, + { MP_ROM_QSTR(MP_QSTR_LPADC2), MP_ROM_PTR(&pin_LPADC2) }, + { MP_ROM_QSTR(MP_QSTR_LPADC3), MP_ROM_PTR(&pin_LPADC3) }, + { MP_ROM_QSTR(MP_QSTR_HPADC0), MP_ROM_PTR(&pin_HPADC0) }, + { MP_ROM_QSTR(MP_QSTR_HPADC1), MP_ROM_PTR(&pin_HPADC1) }, +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/cxd56/common-hal/os/__init__.c b/ports/cxd56/common-hal/os/__init__.c new file mode 100644 index 0000000000000..d4b0e23becc2e --- /dev/null +++ b/ports/cxd56/common-hal/os/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "genhdr/mpversion.h" +#include "py/objstr.h" +#include "py/objtuple.h" + +STATIC const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; + +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "spresense"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "spresense"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +bool common_hal_os_urandom(uint8_t* buffer, mp_uint_t length) { + uint32_t i = 0; + + while (i < length) { + uint32_t new_random = rand(); + for (int j = 0; j < 4 && i < length; j++) { + buffer[i] = new_random & 0xff; + i++; + new_random >>= 8; + } + } + + return true; +} diff --git a/ports/cxd56/common-hal/pulseio/PWMOut.c b/ports/cxd56/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000000..7e0be566b4c60 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PWMOut.c @@ -0,0 +1,159 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/pulseio/PWMOut.h" + +typedef struct { + const char* devpath; + const mcu_pin_obj_t *pin; + int fd; + bool reset; +} pwmout_dev_t; + +STATIC pwmout_dev_t pwmout_dev[] = { + {"/dev/pwm0", &pin_PWM0, -1, true}, + {"/dev/pwm1", &pin_PWM1, -1, true}, + {"/dev/pwm2", &pin_PWM2, -1, true}, + {"/dev/pwm3", &pin_PWM3, -1, true} +}; + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t duty, uint32_t frequency, + bool variable_frequency) { + self->number = -1; + + for (int i = 0; i < MP_ARRAY_SIZE(pwmout_dev); i++) { + if (pin->number == pwmout_dev[i].pin->number) { + self->number = i; + break; + } + } + + if (self->number < 0) { + return PWMOUT_INVALID_PIN; + } + + if (pwmout_dev[self->number].fd < 0) { + pwmout_dev[self->number].fd = open(pwmout_dev[self->number].devpath, O_RDONLY); + if (pwmout_dev[self->number].fd < 0) { + return PWMOUT_INVALID_PIN; + } + } + + self->info.frequency = frequency; + self->info.duty = duty; + self->variable_frequency = variable_frequency; + + if (ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)) < 0) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } + ioctl(pwmout_dev[self->number].fd, PWMIOC_START, 0); + + claim_pin(pin); + + self->pin = pin; + + return PWMOUT_OK; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t *self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + + ioctl(pwmout_dev[self->number].fd, PWMIOC_STOP, 0); + close(pwmout_dev[self->number].fd); + pwmout_dev[self->number].fd = -1; + + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t *self) { + return pwmout_dev[self->number].fd < 0; +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) { + self->info.duty = duty; + + ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)); +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t *self) { + return self->info.duty; +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t *self, uint32_t frequency) { + self->info.frequency = frequency; + + if (ioctl(pwmout_dev[self->number].fd, PWMIOC_SETCHARACTERISTICS, (unsigned long)((uintptr_t)&self->info)) < 0) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t *self) { + return self->info.frequency; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t *self) { + return self->variable_frequency; +} + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + never_reset_pin_number(self->pin->number); + + pwmout_dev[self->number].reset = false; +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + pwmout_dev[self->number].reset = true; +} + +void pwmout_reset(void) { + for (int i = 0; i < MP_ARRAY_SIZE(pwmout_dev); i++) { + if (pwmout_dev[i].fd >= 0 && pwmout_dev[i].reset) { + ioctl(pwmout_dev[i].fd, PWMIOC_STOP, 0); + close(pwmout_dev[i].fd); + pwmout_dev[i].fd = -1; + + reset_pin_number(pwmout_dev[i].pin->number); + } + } +} + +void pwmout_start(uint8_t pwm_num) { + ioctl(pwmout_dev[pwm_num].fd, PWMIOC_START, 0); +} + +void pwmout_stop(uint8_t pwm_num) { + ioctl(pwmout_dev[pwm_num].fd, PWMIOC_STOP, 0); +} diff --git a/ports/cxd56/common-hal/pulseio/PWMOut.h b/ports/cxd56/common-hal/pulseio/PWMOut.h new file mode 100644 index 0000000000000..57fc4181f06f3 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PWMOut.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H + +#include + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + struct pwm_info_s info; + bool variable_frequency; + int8_t number; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); +void pwmout_start(uint8_t pwm_num); +void pwmout_stop(uint8_t pwm_num); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/cxd56/common-hal/pulseio/PulseIn.c b/ports/cxd56/common-hal/pulseio/PulseIn.c new file mode 100644 index 0000000000000..65ca1d97ebca3 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseIn.c @@ -0,0 +1,195 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mphal.h" + +#include "shared-bindings/pulseio/PulseIn.h" +#include "shared-bindings/microcontroller/__init__.h" + +static pulseio_pulsein_obj_t *pulsein_objects[12]; + +static int pulsein_interrupt_handler(int irq, FAR void *context, FAR void *arg); + +static int pulsein_set_config(pulseio_pulsein_obj_t *self, bool first_edge) { + int mode; + + if (!first_edge) { + mode = INT_BOTH_EDGE; + } else if (self->idle_state) { + mode = INT_FALLING_EDGE; + } else { + mode = INT_RISING_EDGE; + } + return board_gpio_intconfig(self->pin->number, mode, false, pulsein_interrupt_handler); +} + +static int pulsein_interrupt_handler(int irq, FAR void *context, FAR void *arg) { + // Grab the current time first. + uint32_t current_us = mp_hal_ticks_us(); + + pulseio_pulsein_obj_t *self = pulsein_objects[irq - CXD56_IRQ_EXDEVICE_0]; + + if (self->first_edge) { + self->first_edge = false; + pulsein_set_config(self, false); + board_gpio_int(self->pin->number, true); + } else { + uint32_t us_diff = current_us - self->last_us; + + uint16_t duration = 0xffff; + if (us_diff < duration) { + duration = us_diff; + } + + uint16_t i = (self->start + self->len) % self->maxlen; + self->buffer[i] = duration; + if (self->len < self->maxlen) { + self->len++; + } else { + self->start++; + } + } + self->last_us = current_us; + + return 0; +} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t maxlen, bool idle_state) { + self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); + if (self->buffer == NULL) { + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); + } + + self->pin = pin; + self->maxlen = maxlen; + self->idle_state = idle_state; + self->start = 0; + self->len = 0; + self->first_edge = true; + self->paused = false; + + int irq = pulsein_set_config(self, true); + if (irq < 0) { + mp_raise_RuntimeError(translate("EXTINT channel already in use")); + } else { + pulsein_objects[irq - CXD56_IRQ_EXDEVICE_0] = self; + } + + claim_pin(pin); + + board_gpio_int(self->pin->number, true); +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t *self) { + if (common_hal_pulseio_pulsein_deinited(self)) { + return; + } + + board_gpio_int(self->pin->number, false); + board_gpio_intconfig(self->pin->number, 0, false, NULL); + + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t *self) { + board_gpio_int(self->pin->number, false); + self->paused = true; +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t *self, uint16_t trigger_duration) { + // Make sure we're paused. + common_hal_pulseio_pulsein_pause(self); + + // Send the trigger pulse. + if (trigger_duration > 0) { + board_gpio_config(self->pin->number, 0, false, true, PIN_FLOAT); + board_gpio_write(self->pin->number, !self->idle_state); + common_hal_mcu_delay_us((uint32_t)trigger_duration); + board_gpio_write(self->pin->number, self->idle_state); + } + + // Reconfigure the pin and make sure its set to detect the first edge. + self->first_edge = true; + self->paused = false; + + pulsein_set_config(self, true); + board_gpio_int(self->pin->number, true); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t *self) { + common_hal_mcu_disable_interrupts(); + self->start = 0; + self->len = 0; + common_hal_mcu_enable_interrupts(); +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t *self) { + if (self->len == 0) { + mp_raise_IndexError(translate("pop from an empty PulseIn")); + } + common_hal_mcu_disable_interrupts(); + uint16_t value = self->buffer[self->start]; + self->start = (self->start + 1) % self->maxlen; + self->len--; + common_hal_mcu_enable_interrupts(); + + return value; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t *self) { + return self->maxlen; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t *self) { + return self->paused; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t *self) { + return self->len; +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t *self, int16_t index) { + common_hal_mcu_disable_interrupts(); + if (index < 0) { + index += self->len; + } + if (index < 0 || index >= self->len) { + common_hal_mcu_enable_interrupts(); + mp_raise_IndexError(translate("index out of range")); + } + uint16_t value = self->buffer[(self->start + index) % self->maxlen]; + common_hal_mcu_enable_interrupts(); + return value; +} diff --git a/ports/cxd56/common-hal/pulseio/PulseIn.h b/ports/cxd56/common-hal/pulseio/PulseIn.h new file mode 100644 index 0000000000000..ff31712abc979 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseIn.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + uint16_t *buffer; + uint16_t maxlen; + uint16_t start; + uint16_t len; + uint32_t last_us; + bool idle_state; + bool first_edge; + bool paused; +} pulseio_pulsein_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/cxd56/common-hal/pulseio/PulseOut.c b/ports/cxd56/common-hal/pulseio/PulseOut.c new file mode 100644 index 0000000000000..5e1d5a2ed4dcc --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseOut.c @@ -0,0 +1,126 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/pulseio/PulseOut.h" + +static uint16_t *pulse_buffer = NULL; +static uint16_t pulse_index = 0; +static uint16_t pulse_length; +static int pulse_fd = -1; + +static bool pulseout_timer_handler(unsigned int *next_interval_us, void *arg) +{ + uint8_t pwm_num = (uint8_t)(int)arg; + pulse_index++; + + if (pulse_index >= pulse_length) { + return false; + } + + *next_interval_us = pulse_buffer[pulse_index] * 1000; + + if (pulse_index % 2 == 0) { + pwmout_start(pwm_num); + } else { + pwmout_stop(pwm_num); + } + + return true; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t *self, + const pulseio_pwmout_obj_t *carrier) { + if (pulse_fd < 0) { + pulse_fd = open("/dev/timer0", O_RDONLY); + } + + if (pulse_fd < 0) { + mp_raise_RuntimeError(translate("All timers in use")); + } + + self->pwm_num = carrier->number; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t *self) { + if (common_hal_pulseio_pulseout_deinited(self)) { + return; + } + + ioctl(pulse_fd, TCIOC_STOP, 0); + close(pulse_fd); + pulse_fd = -1; + + pulse_buffer = NULL; +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t *self) { + return pulse_fd < 0; +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t *self, uint16_t *pulses, uint16_t len) { + if (pulse_buffer != NULL) { + mp_raise_RuntimeError(translate("Another send is already active")); + } + + struct timer_sethandler_s sethandler; + + pulse_buffer = pulses; + pulse_index = 0; + pulse_length = len; + + unsigned long timeout = pulse_buffer[0] * 1000; + + ioctl(pulse_fd, TCIOC_SETTIMEOUT, timeout); + + sethandler.handler = pulseout_timer_handler; + sethandler.arg = (void *)(int)self->pwm_num; + + ioctl(pulse_fd, TCIOC_SETHANDLER, (unsigned long)&sethandler); + ioctl(pulse_fd, TCIOC_START, 0); + + while(pulse_index < len) { + // Do other things while we wait. The interrupts will handle sending the + // signal. + RUN_BACKGROUND_TASKS; + } + + pulse_buffer = NULL; +} + +void pulseout_reset(void) { + ioctl(pulse_fd, TCIOC_STOP, 0); + close(pulse_fd); + pulse_fd = -1; + + pulse_buffer = NULL; +} diff --git a/ports/cxd56/common-hal/pulseio/PulseOut.h b/ports/cxd56/common-hal/pulseio/PulseOut.h new file mode 100644 index 0000000000000..61bc175276068 --- /dev/null +++ b/ports/cxd56/common-hal/pulseio/PulseOut.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t pwm_num; +} pulseio_pulseout_obj_t; + +void pulseout_reset(void); + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/esp8266/common-hal/pulseio/__init__.c b/ports/cxd56/common-hal/pulseio/__init__.c similarity index 100% rename from ports/esp8266/common-hal/pulseio/__init__.c rename to ports/cxd56/common-hal/pulseio/__init__.c diff --git a/ports/cxd56/common-hal/rtc/RTC.c b/ports/cxd56/common-hal/rtc/RTC.c new file mode 100644 index 0000000000000..ce65e6acde3b4 --- /dev/null +++ b/ports/cxd56/common-hal/rtc/RTC.c @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/rtc/RTC.h" + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + struct timeval tv; + + gettimeofday(&tv, NULL); + timeutils_seconds_since_2000_to_struct_time(tv.tv_sec, tm); +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + struct timeval tv = {0}; + + tv.tv_sec = timeutils_seconds_since_2000(tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); + settimeofday(&tv, NULL); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} diff --git a/ports/cxd56/common-hal/rtc/RTC.h b/ports/cxd56/common-hal/rtc/RTC.h new file mode 100644 index 0000000000000..5647fdcf1495c --- /dev/null +++ b/ports/cxd56/common-hal/rtc/RTC.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_RTC_RTC_H diff --git a/ports/cxd56/common-hal/rtc/__init__.c b/ports/cxd56/common-hal/rtc/__init__.c new file mode 100644 index 0000000000000..92d25d563e289 --- /dev/null +++ b/ports/cxd56/common-hal/rtc/__init__.c @@ -0,0 +1 @@ +// No rtc module functions. diff --git a/ports/cxd56/common-hal/supervisor/Runtime.c b/ports/cxd56/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000000..a0d9e70ab17fa --- /dev/null +++ b/ports/cxd56/common-hal/supervisor/Runtime.c @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} diff --git a/ports/cxd56/common-hal/supervisor/Runtime.h b/ports/cxd56/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000000..f4669c6ab3059 --- /dev/null +++ b/ports/cxd56/common-hal/supervisor/Runtime.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/cxd56/common-hal/supervisor/__init__.c b/ports/cxd56/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000000..e240525f22396 --- /dev/null +++ b/ports/cxd56/common-hal/supervisor/__init__.c @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; diff --git a/ports/cxd56/common-hal/time/__init__.c b/ports/cxd56/common-hal/time/__init__.c new file mode 100644 index 0000000000000..31c63cbb2972b --- /dev/null +++ b/ports/cxd56/common-hal/time/__init__.c @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mphal.h" + +#include "supervisor/shared/tick.h" + +uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + struct timeval tv; + gettimeofday(&tv, NULL); + return 1000 * ((uint64_t) tv.tv_sec * 1000000 + (uint64_t) tv.tv_usec); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/cxd56/fatfs_port.c b/ports/cxd56/fatfs_port.c new file mode 100644 index 0000000000000..e986b4c6eb5c9 --- /dev/null +++ b/ports/cxd56/fatfs_port.c @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" /* FatFs lower layer API */ +#include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ +#include "lib/timeutils/timeutils.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif + +DWORD get_fattime(void) { +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif +} diff --git a/ports/cxd56/mkspk/.gitignore b/ports/cxd56/mkspk/.gitignore new file mode 100644 index 0000000000000..e9a6ab18f8f42 --- /dev/null +++ b/ports/cxd56/mkspk/.gitignore @@ -0,0 +1,3 @@ +/mkspk +/mkspk.exe + diff --git a/ports/cxd56/mkspk/Makefile b/ports/cxd56/mkspk/Makefile new file mode 100644 index 0000000000000..d91d17a3cac64 --- /dev/null +++ b/ports/cxd56/mkspk/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# tools/mkspk/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +all: mkspk +default: mkspk +.PHONY: clean + +# Add CFLAGS=-g on the make command line to build debug versions + +CFLAGS = -O2 -Wall -I. + +# mkspk - Convert nuttx.hex image to nuttx.spk image + +mkspk: + @gcc $(CFLAGS) -o mkspk mkspk.c clefia.c + +clean: + @rm -f *.o *.a *.dSYM *~ .*.swp + @rm -f mkspk mkspk.exe diff --git a/ports/cxd56/mkspk/clefia.c b/ports/cxd56/mkspk/clefia.c new file mode 100644 index 0000000000000..02a175505da67 --- /dev/null +++ b/ports/cxd56/mkspk/clefia.c @@ -0,0 +1,517 @@ +/**************************************************************************** + * tools/cxd56/clefia.c + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include + +#include "clefia.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define clefiamul4(_x) (clefiamul2(clefiamul2((_x)))) +#define clefiamul6(_x) (clefiamul2((_x)) ^ clefiamul4((_x))) +#define clefiamul8(_x) (clefiamul2(clefiamul4((_x)))) +#define clefiamula(_x) (clefiamul2((_x)) ^ clefiamul8((_x))) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* S0 (8-bit S-box based on four 4-bit S-boxes) */ + +static const unsigned char clefia_s0[256] = +{ + 0x57u, 0x49u, 0xd1u, 0xc6u, 0x2fu, 0x33u, 0x74u, 0xfbu, + 0x95u, 0x6du, 0x82u, 0xeau, 0x0eu, 0xb0u, 0xa8u, 0x1cu, + 0x28u, 0xd0u, 0x4bu, 0x92u, 0x5cu, 0xeeu, 0x85u, 0xb1u, + 0xc4u, 0x0au, 0x76u, 0x3du, 0x63u, 0xf9u, 0x17u, 0xafu, + 0xbfu, 0xa1u, 0x19u, 0x65u, 0xf7u, 0x7au, 0x32u, 0x20u, + 0x06u, 0xceu, 0xe4u, 0x83u, 0x9du, 0x5bu, 0x4cu, 0xd8u, + 0x42u, 0x5du, 0x2eu, 0xe8u, 0xd4u, 0x9bu, 0x0fu, 0x13u, + 0x3cu, 0x89u, 0x67u, 0xc0u, 0x71u, 0xaau, 0xb6u, 0xf5u, + 0xa4u, 0xbeu, 0xfdu, 0x8cu, 0x12u, 0x00u, 0x97u, 0xdau, + 0x78u, 0xe1u, 0xcfu, 0x6bu, 0x39u, 0x43u, 0x55u, 0x26u, + 0x30u, 0x98u, 0xccu, 0xddu, 0xebu, 0x54u, 0xb3u, 0x8fu, + 0x4eu, 0x16u, 0xfau, 0x22u, 0xa5u, 0x77u, 0x09u, 0x61u, + 0xd6u, 0x2au, 0x53u, 0x37u, 0x45u, 0xc1u, 0x6cu, 0xaeu, + 0xefu, 0x70u, 0x08u, 0x99u, 0x8bu, 0x1du, 0xf2u, 0xb4u, + 0xe9u, 0xc7u, 0x9fu, 0x4au, 0x31u, 0x25u, 0xfeu, 0x7cu, + 0xd3u, 0xa2u, 0xbdu, 0x56u, 0x14u, 0x88u, 0x60u, 0x0bu, + 0xcdu, 0xe2u, 0x34u, 0x50u, 0x9eu, 0xdcu, 0x11u, 0x05u, + 0x2bu, 0xb7u, 0xa9u, 0x48u, 0xffu, 0x66u, 0x8au, 0x73u, + 0x03u, 0x75u, 0x86u, 0xf1u, 0x6au, 0xa7u, 0x40u, 0xc2u, + 0xb9u, 0x2cu, 0xdbu, 0x1fu, 0x58u, 0x94u, 0x3eu, 0xedu, + 0xfcu, 0x1bu, 0xa0u, 0x04u, 0xb8u, 0x8du, 0xe6u, 0x59u, + 0x62u, 0x93u, 0x35u, 0x7eu, 0xcau, 0x21u, 0xdfu, 0x47u, + 0x15u, 0xf3u, 0xbau, 0x7fu, 0xa6u, 0x69u, 0xc8u, 0x4du, + 0x87u, 0x3bu, 0x9cu, 0x01u, 0xe0u, 0xdeu, 0x24u, 0x52u, + 0x7bu, 0x0cu, 0x68u, 0x1eu, 0x80u, 0xb2u, 0x5au, 0xe7u, + 0xadu, 0xd5u, 0x23u, 0xf4u, 0x46u, 0x3fu, 0x91u, 0xc9u, + 0x6eu, 0x84u, 0x72u, 0xbbu, 0x0du, 0x18u, 0xd9u, 0x96u, + 0xf0u, 0x5fu, 0x41u, 0xacu, 0x27u, 0xc5u, 0xe3u, 0x3au, + 0x81u, 0x6fu, 0x07u, 0xa3u, 0x79u, 0xf6u, 0x2du, 0x38u, + 0x1au, 0x44u, 0x5eu, 0xb5u, 0xd2u, 0xecu, 0xcbu, 0x90u, + 0x9au, 0x36u, 0xe5u, 0x29u, 0xc3u, 0x4fu, 0xabu, 0x64u, + 0x51u, 0xf8u, 0x10u, 0xd7u, 0xbcu, 0x02u, 0x7du, 0x8eu +}; + +/* S1 (8-bit S-box based on inverse function) */ + +static const unsigned char clefia_s1[256] = +{ + 0x6cu, 0xdau, 0xc3u, 0xe9u, 0x4eu, 0x9du, 0x0au, 0x3du, + 0xb8u, 0x36u, 0xb4u, 0x38u, 0x13u, 0x34u, 0x0cu, 0xd9u, + 0xbfu, 0x74u, 0x94u, 0x8fu, 0xb7u, 0x9cu, 0xe5u, 0xdcu, + 0x9eu, 0x07u, 0x49u, 0x4fu, 0x98u, 0x2cu, 0xb0u, 0x93u, + 0x12u, 0xebu, 0xcdu, 0xb3u, 0x92u, 0xe7u, 0x41u, 0x60u, + 0xe3u, 0x21u, 0x27u, 0x3bu, 0xe6u, 0x19u, 0xd2u, 0x0eu, + 0x91u, 0x11u, 0xc7u, 0x3fu, 0x2au, 0x8eu, 0xa1u, 0xbcu, + 0x2bu, 0xc8u, 0xc5u, 0x0fu, 0x5bu, 0xf3u, 0x87u, 0x8bu, + 0xfbu, 0xf5u, 0xdeu, 0x20u, 0xc6u, 0xa7u, 0x84u, 0xceu, + 0xd8u, 0x65u, 0x51u, 0xc9u, 0xa4u, 0xefu, 0x43u, 0x53u, + 0x25u, 0x5du, 0x9bu, 0x31u, 0xe8u, 0x3eu, 0x0du, 0xd7u, + 0x80u, 0xffu, 0x69u, 0x8au, 0xbau, 0x0bu, 0x73u, 0x5cu, + 0x6eu, 0x54u, 0x15u, 0x62u, 0xf6u, 0x35u, 0x30u, 0x52u, + 0xa3u, 0x16u, 0xd3u, 0x28u, 0x32u, 0xfau, 0xaau, 0x5eu, + 0xcfu, 0xeau, 0xedu, 0x78u, 0x33u, 0x58u, 0x09u, 0x7bu, + 0x63u, 0xc0u, 0xc1u, 0x46u, 0x1eu, 0xdfu, 0xa9u, 0x99u, + 0x55u, 0x04u, 0xc4u, 0x86u, 0x39u, 0x77u, 0x82u, 0xecu, + 0x40u, 0x18u, 0x90u, 0x97u, 0x59u, 0xddu, 0x83u, 0x1fu, + 0x9au, 0x37u, 0x06u, 0x24u, 0x64u, 0x7cu, 0xa5u, 0x56u, + 0x48u, 0x08u, 0x85u, 0xd0u, 0x61u, 0x26u, 0xcau, 0x6fu, + 0x7eu, 0x6au, 0xb6u, 0x71u, 0xa0u, 0x70u, 0x05u, 0xd1u, + 0x45u, 0x8cu, 0x23u, 0x1cu, 0xf0u, 0xeeu, 0x89u, 0xadu, + 0x7au, 0x4bu, 0xc2u, 0x2fu, 0xdbu, 0x5au, 0x4du, 0x76u, + 0x67u, 0x17u, 0x2du, 0xf4u, 0xcbu, 0xb1u, 0x4au, 0xa8u, + 0xb5u, 0x22u, 0x47u, 0x3au, 0xd5u, 0x10u, 0x4cu, 0x72u, + 0xccu, 0x00u, 0xf9u, 0xe0u, 0xfdu, 0xe2u, 0xfeu, 0xaeu, + 0xf8u, 0x5fu, 0xabu, 0xf1u, 0x1bu, 0x42u, 0x81u, 0xd6u, + 0xbeu, 0x44u, 0x29u, 0xa6u, 0x57u, 0xb9u, 0xafu, 0xf2u, + 0xd4u, 0x75u, 0x66u, 0xbbu, 0x68u, 0x9fu, 0x50u, 0x02u, + 0x01u, 0x3cu, 0x7fu, 0x8du, 0x1au, 0x88u, 0xbdu, 0xacu, + 0xf7u, 0xe4u, 0x79u, 0x96u, 0xa2u, 0xfcu, 0x6du, 0xb2u, + 0x6bu, 0x03u, 0xe1u, 0x2eu, 0x7du, 0x14u, 0x95u, 0x1du +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void bytecpy(unsigned char *dst, const unsigned char *src, int bytelen) +{ + while (bytelen-- > 0) + { + *dst++ = *src++; + } +} + +static unsigned char clefiamul2(unsigned char x) +{ + /* multiplication over GF(2^8) (p(x) = '11d') */ + + if (x & 0x80u) + { + x ^= 0x0eu; + } + + return ((x << 1) | (x >> 7)); +} + +static void clefiaf0xor(unsigned char *dst, const unsigned char *src, + const unsigned char *rk) +{ + unsigned char x[4]; + unsigned char y[4]; + unsigned char z[4]; + + /* F0 */ + + /* Key addition */ + + bytexor(x, src, rk, 4); + + /* Substitution layer */ + + z[0] = clefia_s0[x[0]]; + z[1] = clefia_s1[x[1]]; + z[2] = clefia_s0[x[2]]; + z[3] = clefia_s1[x[3]]; + + /* Diffusion layer (M0) */ + + y[0] = z[0] ^ clefiamul2(z[1]) ^ clefiamul4(z[2]) ^ clefiamul6(z[3]); + y[1] = clefiamul2(z[0]) ^ z[1] ^ clefiamul6(z[2]) ^ clefiamul4(z[3]); + y[2] = clefiamul4(z[0]) ^ clefiamul6(z[1]) ^ z[2] ^ clefiamul2(z[3]); + y[3] = clefiamul6(z[0]) ^ clefiamul4(z[1]) ^ clefiamul2(z[2]) ^ z[3]; + + /* Xoring after F0 */ + + bytecpy(dst + 0, src + 0, 4); + bytexor(dst + 4, src + 4, y, 4); +} + +static void clefiaf1xor(unsigned char *dst, const unsigned char *src, + const unsigned char *rk) +{ + unsigned char x[4]; + unsigned char y[4]; + unsigned char z[4]; + + /* F1 */ + + /* Key addition */ + + bytexor(x, src, rk, 4); + + /* Substitution layer */ + + z[0] = clefia_s1[x[0]]; + z[1] = clefia_s0[x[1]]; + z[2] = clefia_s1[x[2]]; + z[3] = clefia_s0[x[3]]; + + /* Diffusion layer (M1) */ + + y[0] = z[0] ^ clefiamul8(z[1]) ^ clefiamul2(z[2]) ^ clefiamula(z[3]); + y[1] = clefiamul8(z[0]) ^ z[1] ^ clefiamula(z[2]) ^ clefiamul2(z[3]); + y[2] = clefiamul2(z[0]) ^ clefiamula(z[1]) ^ z[2] ^ clefiamul8(z[3]); + y[3] = clefiamula(z[0]) ^ clefiamul2(z[1]) ^ clefiamul8(z[2]) ^ z[3]; + + /* Xoring after F1 */ + + bytecpy(dst + 0, src + 0, 4); + bytexor(dst + 4, src + 4, y, 4); +} + +static void clefiagfn4(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[16]; + unsigned char fout[16]; + + bytecpy(fin, x, 16); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + rk += 8; + if (r) + { + /* swapping for encryption */ + + bytecpy(fin + 0, fout + 4, 12); + bytecpy(fin + 12, fout + 0, 4); + } + } + + bytecpy(y, fout, 16); +} + +#if 0 /* Not used */ +static void clefiagfn8(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[32]; + unsigned char fout[32]; + + bytecpy(fin, x, 32); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + clefiaf0xor(fout + 16, fin + 16, rk + 8); + clefiaf1xor(fout + 24, fin + 24, rk + 12); + rk += 16; + if (r) + { + /* swapping for encryption */ + + bytecpy(fin + 0, fout + 4, 28); + bytecpy(fin + 28, fout + 0, 4); + } + } + + bytecpy(y, fout, 32); +} +#endif + +#if 0 /* Not used */ +static void clefiagfn4inv(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[16]; + unsigned char fout[16]; + + rk += (r - 1) * 8; + bytecpy(fin, x, 16); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + rk -= 8; + if (r) + { + /* swapping for decryption */ + + bytecpy(fin + 0, fout + 12, 4); + bytecpy(fin + 4, fout + 0, 12); + } + } + + bytecpy(y, fout, 16); +} +#endif + +static void clefiadoubleswap(unsigned char *lk) +{ + unsigned char t[16]; + + t[0] = (lk[0] << 7) | (lk[1] >> 1); + t[1] = (lk[1] << 7) | (lk[2] >> 1); + t[2] = (lk[2] << 7) | (lk[3] >> 1); + t[3] = (lk[3] << 7) | (lk[4] >> 1); + t[4] = (lk[4] << 7) | (lk[5] >> 1); + t[5] = (lk[5] << 7) | (lk[6] >> 1); + t[6] = (lk[6] << 7) | (lk[7] >> 1); + t[7] = (lk[7] << 7) | (lk[15] & 0x7fu); + + t[8] = (lk[8] >> 7) | (lk[0] & 0xfeu); + t[9] = (lk[9] >> 7) | (lk[8] << 1); + t[10] = (lk[10] >> 7) | (lk[9] << 1); + t[11] = (lk[11] >> 7) | (lk[10] << 1); + t[12] = (lk[12] >> 7) | (lk[11] << 1); + t[13] = (lk[13] >> 7) | (lk[12] << 1); + t[14] = (lk[14] >> 7) | (lk[13] << 1); + t[15] = (lk[15] >> 7) | (lk[14] << 1); + + bytecpy(lk, t, 16); +} + +static void clefiaconset(unsigned char *con, const unsigned char *iv, int lk) +{ + unsigned char t[2]; + unsigned char tmp; + + bytecpy(t, iv, 2); + while (lk-- > 0) + { + con[0] = t[0] ^ 0xb7u; /* P_16 = 0xb7e1 (natural logarithm) */ + con[1] = t[1] ^ 0xe1u; + con[2] = ~((t[0] << 1) | (t[1] >> 7)); + con[3] = ~((t[1] << 1) | (t[0] >> 7)); + con[4] = ~t[0] ^ 0x24u; /* Q_16 = 0x243f (circle ratio) */ + con[5] = ~t[1] ^ 0x3fu; + con[6] = t[1]; + con[7] = t[0]; + con += 8; + + /* updating T */ + + if (t[1] & 0x01u) + { + t[0] ^= 0xa8u; + t[1] ^= 0x30u; + } + + tmp = t[0] << 7; + t[0] = (t[0] >> 1) | (t[1] << 7); + t[1] = (t[1] >> 1) | tmp; + } +} + +static void left_shift_one(uint8_t * in, uint8_t * out) +{ + int i; + int overflow; + + overflow = 0; + for (i = 15; i >= 0; i--) + { + out[i] = in[i] << 1; + out[i] |= overflow; + overflow = (in[i] >> 7) & 1; + } +} + +static void gen_subkey(struct cipher *c) +{ + uint8_t L[16]; + + memset(L, 0, 16); + clefiaencrypt(L, L, c->rk, c->round); + + left_shift_one(L, c->k1); + if (L[0] & 0x80) + { + c->k1[15] = c->k1[15] ^ 0x87; + } + + left_shift_one(c->k1, c->k2); + if (c->k1[0] & 0x80) + { + c->k2[15] = c->k2[15] ^ 0x87; + } + + memset(L, 0, 16); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +struct cipher *cipher_init(uint8_t * key, uint8_t * iv) +{ + struct cipher *c; + + c = (struct cipher *)malloc(sizeof(*c)); + if (!c) + { + return NULL; + } + + c->round = clefiakeyset(c->rk, key); + + gen_subkey(c); + memset(c->vector, 0, 16); + + return c; +} + +void cipher_deinit(struct cipher *c) +{ + memset(c, 0, sizeof(*c)); + free(c); +} + +int cipher_calc_cmac(struct cipher *c, void *data, int size, void *cmac) +{ + uint8_t m[16]; + uint8_t *p; + + if (size & 0xf) + { + return -1; + } + + p = (uint8_t *) data; + while (size) + { + bytexor(m, c->vector, p, 16); + clefiaencrypt(c->vector, m, c->rk, c->round); + size -= 16; + p += 16; + } + + bytexor(cmac, m, c->k1, 16); + clefiaencrypt(cmac, cmac, c->rk, c->round); + memset(m, 0, 16); + + return 0; +} + +void bytexor(unsigned char *dst, const unsigned char *a, + const unsigned char *b, int bytelen) +{ + while (bytelen-- > 0) + { + *dst++ = *a++ ^ *b++; + } +} + +int clefiakeyset(unsigned char *rk, const unsigned char *skey) +{ + const unsigned char iv[2] = + { + 0x42u, 0x8au /* cubic root of 2 */ + }; + + unsigned char lk[16]; + unsigned char con128[4 * 60]; + int i; + + /* generating CONi^(128) (0 <= i < 60, lk = 30) */ + + clefiaconset(con128, iv, 30); + + /* GFN_{4,12} (generating L from K) */ + + clefiagfn4(lk, skey, con128, 12); + + bytecpy(rk, skey, 8); /* initial whitening key (WK0, WK1) */ + rk += 8; + for (i = 0; i < 9; i++) + { + /* round key (RKi (0 <= i < 36)) */ + + bytexor(rk, lk, con128 + i * 16 + (4 * 24), 16); + if (i % 2) + { + bytexor(rk, rk, skey, 16); /* Xoring K */ + } + + clefiadoubleswap(lk); /* Updating L (DoubleSwap function) */ + rk += 16; + } + + bytecpy(rk, skey + 8, 8); /* final whitening key (WK2, WK3) */ + + return 18; +} + +void clefiaencrypt(unsigned char *ct, const unsigned char *pt, + const unsigned char *rk, const int r) +{ + unsigned char rin[16]; + unsigned char rout[16]; + + bytecpy(rin, pt, 16); + + bytexor(rin + 4, rin + 4, rk + 0, 4); /* initial key whitening */ + bytexor(rin + 12, rin + 12, rk + 4, 4); + rk += 8; + + clefiagfn4(rout, rin, rk, r); /* GFN_{4,r} */ + + bytecpy(ct, rout, 16); + bytexor(ct + 4, ct + 4, rk + r * 8 + 0, 4); /* final key whitening */ + bytexor(ct + 12, ct + 12, rk + r * 8 + 4, 4); +} diff --git a/ports/cxd56/mkspk/clefia.h b/ports/cxd56/mkspk/clefia.h new file mode 100644 index 0000000000000..a0e02587da98b --- /dev/null +++ b/ports/cxd56/mkspk/clefia.h @@ -0,0 +1,65 @@ +/**************************************************************************** + * tools/cxd56/clefia.h + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +#ifndef _TOOLS_CXD56_CLEFIA_H_ +#define _TOOLS_CXD56_CLEFIA_H_ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct cipher + { + int mode; + int dir; + uint8_t rk[8 * 26 + 16]; + uint8_t vector[16]; + int round; + uint8_t k1[16]; + uint8_t k2[16]; + }; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +struct cipher *cipher_init(uint8_t * key, uint8_t * iv); +void cipher_deinit(struct cipher *c); +int cipher_calc_cmac(struct cipher *c, void *data, int size, void *cmac); +void bytexor(unsigned char *dst, const unsigned char *a, + const unsigned char *b, int bytelen); +int clefiakeyset(unsigned char *rk, const unsigned char *skey); +void clefiaencrypt(unsigned char *ct, const unsigned char *pt, + const unsigned char *rk, const int r); + +#endif diff --git a/ports/cxd56/mkspk/mkspk.c b/ports/cxd56/mkspk/mkspk.c new file mode 100644 index 0000000000000..c447ad7dab1ff --- /dev/null +++ b/ports/cxd56/mkspk/mkspk.c @@ -0,0 +1,383 @@ +/**************************************************************************** + * tools/cxd56/mkspk.c + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mkspk.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct args +{ + int core; + char *elffile; + char *savename; + char *outputfile; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint8_t vmk[16] = + "\x27\xc0\xaf\x1b\x5d\xcb\xc6\xc5\x58\x22\x1c\xdd\xaf\xf3\x20\x21"; + +static struct args g_options = +{ + 0 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static struct args *parse_args(int argc, char **argv) +{ + int opt; + int show_help; + struct args *args = &g_options; + char *endp; + + show_help = 0; + + if (argc < 2) + { + show_help = 1; + } + + memset(args, 0, sizeof(*args)); + args->core = -1; + + while ((opt = getopt(argc, argv, "h:c:")) != -1) + { + switch (opt) + { + case 'c': + args->core = strtol(optarg, &endp, 0); + if (*endp) + { + fprintf(stderr, "Invalid core number \"%s\"\n", optarg); + show_help = 1; + } + break; + + case 'h': + default: + show_help = 1; + } + } + + argc -= optind; + argv += optind; + + args->elffile = argv[0]; + args->savename = argv[1]; + argc -= 2; + argv += 2; + + if (argc > 0) + { + args->outputfile = strdup(argv[0]); + } + else + { + show_help = 1; + } + + /* Sanity checks for options */ + + if (show_help == 1) + { + fprintf(stderr, + "mkspk [-c ] []\n"); + exit(EXIT_FAILURE); + } + + if (args->core < 0) + { + fprintf(stderr, "Core number is not set. Please use -c option.\n"); + exit(EXIT_FAILURE); + } + + if (strlen(args->savename) > 63) + { + fprintf(stderr, "savename too long.\n"); + exit(EXIT_FAILURE); + } + + return args; +} + +static struct elf_file *load_elf(const char *filename) +{ + size_t fsize; + int pos; + char *buf; + FILE *fp; + struct elf_file *ef; + Elf32_Shdr *sh; + uint16_t i; + int ret; + + fp = fopen(filename, "rb"); + if (!fp) + { + return NULL; + } + + ef = (struct elf_file *)malloc(sizeof(*ef)); + if (!ef) + { + return NULL; + } + + pos = fseek(fp, 0, SEEK_END); + fsize = (size_t) ftell(fp); + fseek(fp, pos, SEEK_SET); + + buf = (char *)malloc(fsize); + if (!buf) + { + return NULL; + } + + ret = fread(buf, fsize, 1, fp); + fclose(fp); + if (ret != 1) + { + return NULL; + } + + ef->data = buf; + + ef->ehdr = (Elf32_Ehdr *) buf; + + Elf32_Ehdr *h = (Elf32_Ehdr *) buf; + + if (!(h->e_ident[EI_MAG0] == 0x7f && + h->e_ident[EI_MAG1] == 'E' && + h->e_ident[EI_MAG2] == 'L' && h->e_ident[EI_MAG3] == 'F')) + { + free(ef); + free(buf); + return NULL; + } + + ef->phdr = (Elf32_Phdr *) (buf + ef->ehdr->e_phoff); + ef->shdr = (Elf32_Shdr *) (buf + ef->ehdr->e_shoff); + ef->shstring = buf + ef->shdr[ef->ehdr->e_shstrndx].sh_offset; + + for (i = 0, sh = ef->shdr; i < ef->ehdr->e_shnum; i++, sh++) + { + if (sh->sh_type == SHT_SYMTAB) + { + ef->symtab = (Elf32_Sym *) (buf + sh->sh_offset); + ef->nsyms = sh->sh_size / sh->sh_entsize; + continue; + } + + if (sh->sh_type == SHT_STRTAB) + { + if (!strcmp(".strtab", ef->shstring + sh->sh_name)) + { + ef->string = buf + sh->sh_offset; + } + } + } + + return ef; +} + +static void *create_image(struct elf_file *elf, int core, char *savename, + int *image_size) +{ + char *img; + struct spk_header *header; + struct spk_prog_info *pi; + Elf32_Phdr *ph; + Elf32_Sym *sym; + char *name; + int snlen; + int nphs, psize, imgsize; + int i; + int j; + uint32_t offset; + uint32_t sp; + + snlen = alignup(strlen(savename) + 1, 16); + + nphs = 0; + psize = 0; + for (i = 0, ph = elf->phdr; i < elf->ehdr->e_phnum; i++, ph++) + { + if (ph->p_type != PT_LOAD || ph->p_filesz == 0) + { + continue; + } + + nphs++; + psize += alignup(ph->p_filesz, 16); + } + + imgsize = sizeof(*header) + snlen + (nphs * 16) + psize; + + img = (char *)malloc(imgsize + 32); + if (!img) + { + return NULL; + } + + *image_size = imgsize; + sym = elf->symtab; + name = elf->string; + sp = 0; + + for (j = 0; j < elf->nsyms; j++, sym++) + { + if (!strcmp("__stack", name + sym->st_name)) + { + sp = sym->st_value; + } + } + + memset(img, 0, imgsize); + + header = (struct spk_header *)img; + header->magic[0] = 0xef; + header->magic[1] = 'M'; + header->magic[2] = 'O'; + header->magic[3] = 'D'; + header->cpu = core; + + header->entry = elf->ehdr->e_entry; + header->stack = sp; + header->core = core; + + header->binaries = nphs; + header->phoffs = sizeof(*header) + snlen; + header->mode = 0777; + + strncpy(img + sizeof(*header), savename, 63); + + ph = elf->phdr; + pi = (struct spk_prog_info *)(img + header->phoffs); + offset = ((char *)pi - img) + (nphs * sizeof(*pi)); + for (i = 0; i < elf->ehdr->e_phnum; i++, ph++) + { + if (ph->p_type != PT_LOAD || ph->p_filesz == 0) + continue; + pi->load_address = ph->p_paddr; + pi->offset = offset; + pi->size = alignup(ph->p_filesz, 16); /* need 16 bytes align for + * decryption */ + pi->memsize = ph->p_memsz; + + memcpy(img + pi->offset, elf->data + ph->p_offset, ph->p_filesz); + + offset += alignup(ph->p_filesz, 16); + pi++; + } + + return img; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int main(int argc, char **argv) +{ + struct args *args; + struct elf_file *elf; + struct cipher *c; + uint8_t *spkimage; + int size = 0; + FILE *fp; + char footer[16]; + + args = parse_args(argc, argv); + + elf = load_elf(args->elffile); + if (!elf) + { + fprintf(stderr, "Loading ELF %s failure.\n", args->elffile); + exit(EXIT_FAILURE); + } + + spkimage = create_image(elf, args->core, args->savename, &size); + free(elf); + + c = cipher_init(vmk, NULL); + cipher_calc_cmac(c, spkimage, size, (uint8_t *) spkimage + size); + cipher_deinit(c); + + size += 16; /* Extend CMAC size */ + + snprintf(footer, 16, "MKSPK_BN_HOOTER"); + footer[15] = '\0'; + + fp = fopen(args->outputfile, "wb"); + if (!fp) + { + fprintf(stderr, "Output file open error.\n"); + free(spkimage); + exit(EXIT_FAILURE); + } + + fwrite(spkimage, size, 1, fp); + fwrite(footer, 16, 1, fp); + + fclose(fp); + + printf("File %s is successfully created.\n", args->outputfile); + free(args->outputfile); + + memset(spkimage, 0, size); + free(spkimage); + + exit(EXIT_SUCCESS); +} diff --git a/ports/cxd56/mkspk/mkspk.h b/ports/cxd56/mkspk/mkspk.h new file mode 100644 index 0000000000000..5a67bb3dd42f5 --- /dev/null +++ b/ports/cxd56/mkspk/mkspk.h @@ -0,0 +1,83 @@ +/**************************************************************************** + * tools/cxd56/mkspk.h + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "clefia.h" +#include "elf.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define alignup(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) +#define swap(a, b) { (a) ^= (b); (b) ^= (a); (a) ^= (b); } + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct spk_header + { + uint8_t magic[4]; + uint8_t cpu; + uint8_t reserved[11]; + uint32_t entry; + uint32_t stack; + uint16_t core; + uint16_t binaries; + uint16_t phoffs; + uint16_t mode; + }; + +struct spk_prog_info + { + uint32_t load_address; + uint32_t offset; + uint32_t size; + uint32_t memsize; + }; + +struct elf_file + { + Elf32_Ehdr *ehdr; + Elf32_Phdr *phdr; + Elf32_Shdr *shdr; + Elf32_Sym *symtab; + int nsyms; + char *shstring; + char *string; + char *data; + }; diff --git a/ports/cxd56/mpconfigport.h b/ports/cxd56/mpconfigport.h new file mode 100644 index 0000000000000..df87946b95d83 --- /dev/null +++ b/ports/cxd56/mpconfigport.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __INCLUDED_MPCONFIGPORT_H +#define __INCLUDED_MPCONFIGPORT_H + +#define MICROPY_PY_SYS_PLATFORM "CXD56" + +// 64kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x10000 + +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS \ + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/cxd56/mpconfigport.mk b/ports/cxd56/mpconfigport.mk new file mode 100644 index 0000000000000..ad3d0e72df875 --- /dev/null +++ b/ports/cxd56/mpconfigport.mk @@ -0,0 +1,22 @@ +USB_SERIAL_NUMBER_LENGTH = 10 +USB_DEVICES = "CDC,MSC" +USB_MSC_MAX_PACKET_SIZE = 512 +USB_RENUMBER_ENDPOINTS = 0 +USB_CDC_EP_NUM_NOTIFICATION = 3 +USB_CDC_EP_NUM_DATA_OUT = 2 +USB_CDC_EP_NUM_DATA_IN = 1 +USB_MSC_EP_NUM_OUT = 5 +USB_MSC_EP_NUM_IN = 4 + +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 + +INTERNAL_LIBM = 1 diff --git a/ports/cxd56/mphalport.c b/ports/cxd56/mphalport.c new file mode 100644 index 0000000000000..1305706caa3ca --- /dev/null +++ b/ports/cxd56/mphalport.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include "py/mpstate.h" + +#include "supervisor/shared/tick.h" + +#define DELAY_CORRECTION (700) +#define DELAY_INTERVAL (50) + +void mp_hal_init(void) { + boardctl(BOARDIOC_INIT, 0); +} + +mp_uint_t mp_hal_ticks_ms(void) { + struct timeval tv; + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000 + tv.tv_usec / 1000; +} + +mp_uint_t mp_hal_ticks_us(void) { + struct timeval tv; + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000000 + tv.tv_usec; +} + +mp_uint_t mp_hal_ticks_cpu(void) { + return cxd56_get_cpu_baseclk(); +} + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + #ifdef MICROPY_VM_HOOK_LOOP + MICROPY_VM_HOOK_LOOP + #endif + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(uint32_t us) { + if (us) { + unsigned long long ticks = mp_hal_ticks_cpu() / 1000000L * us; + if (ticks < DELAY_CORRECTION) return; // delay time already used in calculation + + ticks -= DELAY_CORRECTION; + ticks /= 6; + // following loop takes 6 cycles + do { + __asm__ __volatile__("nop"); + } while(--ticks); + } +} diff --git a/ports/cxd56/mphalport.h b/ports/cxd56/mphalport.h new file mode 100644 index 0000000000000..a2be10b8d0db4 --- /dev/null +++ b/ports/cxd56/mphalport.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_MPHALPORT_H +#define MICROPY_INCLUDED_CXD56_MPHALPORT_H + +#include + +#include "lib/utils/interrupt_char.h" + +#endif // MICROPY_INCLUDED_CXD56_MPHALPORT_H diff --git a/ports/bare-arm/qstrdefsport.h b/ports/cxd56/qstrdefsport.h similarity index 100% rename from ports/bare-arm/qstrdefsport.h rename to ports/cxd56/qstrdefsport.h diff --git a/ports/cxd56/spresense-exported-sdk b/ports/cxd56/spresense-exported-sdk new file mode 160000 index 0000000000000..7f6568c7f4898 --- /dev/null +++ b/ports/cxd56/spresense-exported-sdk @@ -0,0 +1 @@ +Subproject commit 7f6568c7f4898cdb24a2f06040784a836050686e diff --git a/ports/cxd56/supervisor/cpu.s b/ports/cxd56/supervisor/cpu.s new file mode 100755 index 0000000000000..9e6807a5e2e99 --- /dev/null +++ b/ports/cxd56/supervisor/cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/cxd56/supervisor/internal_flash.c b/ports/cxd56/supervisor/internal_flash.c new file mode 100644 index 0000000000000..0c9a61e0635c3 --- /dev/null +++ b/ports/cxd56/supervisor/internal_flash.c @@ -0,0 +1,114 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "supervisor/flash.h" + +/* Prototypes for Remote API */ + +int FM_RawWrite(uint32_t offset, const void *buf, uint32_t size); +int FM_RawVerifyWrite(uint32_t offset, const void *buf, uint32_t size); +int FM_RawRead(uint32_t offset, void *buf, uint32_t size); +int FM_RawEraseSector(uint32_t sector); + +#define CXD56_SPIFLASHSIZE (16 * 1024 * 1024) + +#define SECTOR_SHIFT 12 +#define SECTOR_SIZE (1 << SECTOR_SHIFT) + +#define PAGE_SHIFT 9 +#define PAGE_SIZE (1 << PAGE_SHIFT) + +#define NO_SECTOR 0xffffffff + +uint8_t flash_cache[SECTOR_SIZE]; +uint32_t flash_sector = NO_SECTOR; + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return CXD56_SPIFLASHSIZE >> PAGE_SHIFT; +} + +void supervisor_flash_flush(void) { + if (flash_sector == NO_SECTOR) { + return; + } + + FM_RawEraseSector(flash_sector); + FM_RawWrite(flash_sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE); + + flash_sector = NO_SECTOR; +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + supervisor_flash_flush(); + + if (FM_RawRead(block << PAGE_SHIFT, dest, num_blocks << PAGE_SHIFT) < 0) { + return 1; + } + + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + uint32_t sector; + uint32_t block_position; + uint32_t current_block = 0; + + while (num_blocks--) { + sector = (lba << PAGE_SHIFT) >> SECTOR_SHIFT; + block_position = lba - 8 * sector; + + if (sector != flash_sector) { + supervisor_flash_flush(); + + if (FM_RawRead(sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE) < 0) { + return 1; + } + + if (memcmp(&flash_cache[block_position << PAGE_SHIFT], &src[current_block << PAGE_SHIFT], PAGE_SIZE) != 0) { + flash_sector = sector; + } + } + + memcpy(&flash_cache[block_position << PAGE_SHIFT], &src[current_block << PAGE_SHIFT], PAGE_SIZE); + + lba++; + current_block++; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} diff --git a/ports/cxd56/supervisor/internal_flash.h b/ports/cxd56/supervisor/internal_flash.h new file mode 100644 index 0000000000000..1580ad3e1e38c --- /dev/null +++ b/ports/cxd56/supervisor/internal_flash.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H + +#endif // MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_H diff --git a/ports/cxd56/supervisor/internal_flash_root_pointers.h b/ports/cxd56/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..126c6af0977e9 --- /dev/null +++ b/ports/cxd56/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_CXD56_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c new file mode 100644 index 0000000000000..5d2957f350922 --- /dev/null +++ b/ports/cxd56/supervisor/port.c @@ -0,0 +1,105 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "sched/sched.h" + +#include "boards/board.h" + +#include "supervisor/port.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/analogio/AnalogIn.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/busio/UART.h" + +safe_mode_t port_init(void) { + boardctl(BOARDIOC_INIT, 0); + + board_init(); + + if (board_requests_safe_mode()) { + return USER_SAFE_MODE; + } + + return NO_SAFE_MODE; +} + +void reset_cpu(void) { + boardctl(BOARDIOC_RESET, 0); +} + +void reset_port(void) { +#if CIRCUITPY_ANALOGIO + analogin_reset(); +#endif +#if CIRCUITPY_PULSEIO + pulseout_reset(); + pwmout_reset(); +#endif +#if CIRCUITPY_BUSIO + busio_uart_reset(); +#endif + + reset_all_pins(); +} + +void reset_to_bootloader(void) { +} + +uint32_t *port_stack_get_limit(void) { + struct tcb_s *rtcb = this_task(); + + return rtcb->adj_stack_ptr - (uint32_t)rtcb->adj_stack_size; +} + +uint32_t *port_stack_get_top(void) { + struct tcb_s *rtcb = this_task(); + + return rtcb->adj_stack_ptr; +} + +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + +extern uint32_t _ebss; + +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} diff --git a/ports/cxd56/supervisor/usb.c b/ports/cxd56/supervisor/usb.c new file mode 100644 index 0000000000000..6ad253c6d4f3f --- /dev/null +++ b/ports/cxd56/supervisor/usb.c @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/usb.h" + +void init_usb_hardware(void) { +} diff --git a/ports/cxd56/tick.c b/ports/cxd56/tick.c new file mode 100644 index 0000000000000..671b82b7447ad --- /dev/null +++ b/ports/cxd56/tick.c @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" + +#include "supervisor/shared/autoreload.h" +#include "supervisor/shared/tick.h" + +void board_timerhook(void) +{ + // Do things common to all ports when the tick occurs + supervisor_tick(); +} diff --git a/ports/cxd56/tick.h b/ports/cxd56/tick.h new file mode 100644 index 0000000000000..d641d9cd4f4a4 --- /dev/null +++ b/ports/cxd56/tick.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_TICK_H +#define MICROPY_INCLUDED_CXD56_TICK_H + +#include "py/mpconfig.h" + +#endif // MICROPY_INCLUDED_CXD56_TICK_H diff --git a/ports/esp8266/Makefile b/ports/esp8266/Makefile deleted file mode 100644 index 4a598b629107b..0000000000000 --- a/ports/esp8266/Makefile +++ /dev/null @@ -1,299 +0,0 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= feather_huzzah -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) -endif - -# If the build directory is not given, make it reflect the board name. -BUILD ?= build - -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h #$(BUILD)/pins_qstr.h - -MICROPY_PY_USSL = 1 -MICROPY_SSL_AXTLS = 1 -MICROPY_FATFS = 1 -MICROPY_PY_BTREE = 1 -BTREE_DEFS_EXTRA = -DDEFPSIZE=1024 -DMINCACHE=3 - -FROZEN_DIR ?= scripts -FROZEN_MPY_DIR ?= modules - -# include py core make definitions -include $(TOP)/py/py.mk - -FWBIN = $(BUILD)/firmware-combined.bin -PORT ?= /dev/ttyACM0 -BAUD ?= 115200 -FLASH_MODE ?= qio -FLASH_SIZE ?= detect -CROSS_COMPILE = xtensa-lx106-elf- -ESP_SDK = $(shell $(CC) -print-sysroot)/usr - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(ESP_SDK)/include - -# UART for "os" messages. 0 is normal UART as used by MicroPython REPL, -# 1 is debug UART (tx only), -1 to disable. -UART_OS = 0 - -CFLAGS_XTENSA = -fsingle-precision-constant -Wdouble-promotion \ - -D__ets__ -DICACHE_FLASH \ - -fno-inline-functions \ - -Wl,-EL -mlongcalls -mtext-section-literals -mforce-l32 \ - -DLWIP_OPEN_SRC - -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib -DUART_OS=$(UART_OS) \ - $(CFLAGS_XTENSA) $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA) - -LDSCRIPT = esp8266.ld -LDFLAGS = -nostdlib -T $(LDSCRIPT) -Map=$(@:.elf=.map) --cref -LIBS = -L$(ESP_SDK)/lib -lmain -ljson -llwip_open -lpp -lnet80211 -lwpa -lphy -lnet80211 $(LDFLAGS_MOD) - -LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) -LIBS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -COPT = -O0 -else -CFLAGS += -fdata-sections -ffunction-sections -COPT += -Os -DNDEBUG -LDFLAGS += --gc-sections -endif - -SRC_C = \ - strtoll.c \ - main.c \ - help.c \ - esp_mphal.c \ - esp_init_data.c \ - gccollect.c \ - lexerstr32.c \ - espuart.c \ - esppwm.c \ - espneopixel.c \ - intr.c \ - modpyb.c \ - modmachine.c \ - machine_pin.c \ - machine_pwm.c \ - machine_rtc.c \ - machine_adc.c \ - machine_uart.c \ - machine_wdt.c \ - machine_hspi.c \ - modesp.c \ - modnetwork.c \ - ets_alt_task.c \ - fatfs_port.c \ - posix_helpers.c \ - hspi.c \ - boards/$(BOARD)/pins.c \ - $(SRC_MOD) - -SRC_COMMON_HAL = \ - microcontroller/__init__.c \ - microcontroller/Pin.c \ - microcontroller/Processor.c \ - analogio/__init__.c \ - analogio/AnalogIn.c \ - analogio/AnalogOut.c \ - digitalio/__init__.c \ - digitalio/DigitalInOut.c \ - pulseio/__init__.c \ - pulseio/PulseIn.c \ - pulseio/PulseOut.c \ - pulseio/PWMOut.c \ - busio/__init__.c \ - busio/SPI.c \ - busio/UART.c \ - multiterminal/__init__.c \ - neopixel_write/__init__.c \ - os/__init__.c \ - storage/__init__.c \ - time/__init__.c \ - board/__init__.c - - -# These don't have corresponding files in each port but are still located in -# shared-bindings to make it clear what the contents of the modules are. -SRC_BINDINGS_ENUMS = \ - digitalio/Direction.c \ - digitalio/DriveMode.c \ - digitalio/Pull.c \ - math/__init__.c \ - microcontroller/RunMode.c \ - util.c - -SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ - $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ - $(addprefix common-hal/, $(SRC_COMMON_HAL)) -SRC_SHARED_MODULE = \ - bitbangio/__init__.c \ - bitbangio/I2C.c \ - bitbangio/OneWire.c \ - bitbangio/SPI.c \ - busio/I2C.c \ - busio/OneWire.c \ - multiterminal/__init__.c \ - os/__init__.c \ - random/__init__.c \ - storage/__init__.c \ - struct/__init__.c - -SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) - -EXTMOD_SRC_C = $(addprefix extmod/,\ - modlwip.c \ - modonewire.c \ - ) - -LIB_SRC_C = $(addprefix lib/,\ - libc/string0.c \ - libm/math.c \ - libm/fmodf.c \ - libm/nearbyintf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - mp-readline/readline.c \ - netutils/netutils.c \ - timeutils/timeutils.c \ - utils/buffer_helper.c \ - utils/context_manager_helpers.c \ - utils/pyexec.c \ - utils/interrupt_char.c \ - utils/sys_stdio_mphal.c \ - ) - -ifeq ($(MICROPY_FATFS), 1) -LIB_SRC_C += \ - lib/oofatfs/ff.c \ - lib/oofatfs/option/unicode.c -endif - -SRC_S = \ - gchelper.s \ - -OBJ = -OBJ += $(PY_O) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(STM_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) -#OBJ += $(BUILD)/pins_$(BOARD).o - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) $(STM_SRC_C) $(EXTMOD_SRC_C) $(DRIVERS_SRC_C) -# Append any auto-generated sources that are needed by sources listed in SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -all: $(BUILD)/libaxtls.a $(FWBIN) - -CONFVARS_FILE = $(BUILD)/confvars - -ifeq ($(wildcard $(CONFVARS_FILE)),) -$(shell $(MKDIR) -p $(BUILD)) -$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE)) -else ifneq ($(shell cat $(CONFVARS_FILE)), $(FROZEN_DIR) $(UART_OS)) -$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE)) -endif - -$(BUILD)/uart.o: $(CONFVARS_FILE) - -FROZEN_EXTRA_DEPS = $(CONFVARS_FILE) - -.PHONY: deploy - -deploy: $(BUILD)/firmware-combined.bin - $(ECHO) "Writing $< to the board" - $(Q)esptool.py --port $(PORT) --baud $(BAUD) write_flash --verify --flash_size=$(FLASH_SIZE) --flash_mode=$(FLASH_MODE) 0 $< - -erase: - $(ECHO) "Erase flash" - $(Q)esptool.py --port $(PORT) --baud $(BAUD) erase_flash - -reset: - echo -e "\r\nimport machine; machine.reset()\r\n" >$(PORT) - -$(FWBIN): $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)python2 $(shell which esptool.py) elf2image $^ - $(Q)$(PYTHON) makeimg.py $(BUILD)/firmware.elf-0x00000.bin $(BUILD)/firmware.elf-0x[0-5][1-f]000.bin $@ - - -$(BUILD)/firmware.elf: $(OBJ) - $(STEPECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -512k: - $(MAKE) LDSCRIPT=esp8266_512k.ld CFLAGS_EXTRA='-DMP_CONFIGFILE=""' MICROPY_FATFS=0 MICROPY_PY_BTREE=0 - -ota: - rm -f $(BUILD)/firmware.elf $(BUILD)/firmware.elf*.bin - $(MAKE) LDSCRIPT=esp8266_ota.ld FWBIN=$(BUILD)/firmware-ota.bin - -#MAKE_PINS = boards/make-pins.py -#BOARD_PINS = boards/$(BOARD)/pins.csv -#AF_FILE = boards/stm32f4xx_af.csv -#PREFIX_FILE = boards/stm32f4xx_prefix.c -#GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c -#GEN_PINS_HDR = $(HEADER_BUILD)/pins.h -#GEN_PINS_QSTR = $(BUILD)/pins_qstr.h -#GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h -#GEN_PINS_AF_PY = $(BUILD)/pins_af.py - -# Making OBJ use an order-only depenedency on the generated pins.h file -# has the side effect of making the pins.h file before we actually compile -# any of the objects. The normal dependency generation will deal with the -# case when pins.h is modified. But when it doesn't exist, we don't know -# which source files might need it. -#$(OBJ): | $(HEADER_BUILD)/pins.h - -# Use a pattern rule here so that make will only call make-pins.py once to make -# both pins_$(BOARD).c and pins.h -#$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD) -# $(ECHO) "Create $@" -# $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC) -# -#$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c -# $(call compile_c) - -include $(TOP)/py/mkrules.mk - -axtls: $(BUILD)/libaxtls.a - -$(BUILD)/libaxtls.a: - cd $(TOP)/lib/axtls; cp config/upyconfig config/.config - cd $(TOP)/lib/axtls; $(MAKE) oldconfig -B - cd $(TOP)/lib/axtls; $(MAKE) clean - cd $(TOP)/lib/axtls; $(MAKE) all CC="$(CC)" LD="$(LD)" AR="$(AR)" CFLAGS_EXTRA="$(CFLAGS_XTENSA) -Dabort=abort_ -DRT_MAX_PLAIN_LENGTH=1024 -DRT_EXTRA=4096" - cp $(TOP)/lib/axtls/_stage/libaxtls.a $@ - -clean-modules: - git clean -f -d modules - rm -f build/frozen*.c diff --git a/ports/esp8266/README.md b/ports/esp8266/README.md deleted file mode 100644 index 252e195d83d6f..0000000000000 --- a/ports/esp8266/README.md +++ /dev/null @@ -1,141 +0,0 @@ -MicroPython port to ESP8266 -=========================== - -This is an experimental port of MicroPython for the WiFi modules based -on Espressif ESP8266 chip. - -WARNING: The port is experimental and many APIs are subject to change. - -Supported features include: -- REPL (Python prompt) over UART0. -- Garbage collector, exceptions. -- Unicode support. -- Builtin modules: gc, array, collections, io, struct, sys, esp, network, - many more. -- Arbitrary-precision long integers and 30-bit precision floats. -- WiFi support. -- Sockets using modlwip. -- GPIO and bit-banging I2C, SPI support. -- 1-Wire and WS2812 (aka Neopixel) protocols support. -- Internal filesystem using the flash. -- WebREPL over WiFi from a browser (clients at https://github.com/micropython/webrepl). -- Modules for HTTP, MQTT, many other formats and protocols via - https://github.com/micropython/micropython-lib . - -Work-in-progress documentation is available at -http://docs.micropython.org/en/latest/esp8266/ . - -Build instructions ------------------- - -The tool chain required for the build is the OpenSource ESP SDK, which can be -found at . Clone this repository and -run `make` in its directory to build and install the SDK locally. Make sure -to add toolchain bin directory to your PATH. Read esp-open-sdk's README for -additional important information on toolchain setup. - -Add the external dependencies to the MicroPython repository checkout: -```bash -$ git submodule update --init -``` -See the README in the repository root for more information about external -dependencies. - -The MicroPython cross-compiler must be built to pre-compile some of the -built-in scripts to bytecode. This can be done using: -```bash -$ make -C mpy-cross -``` - -Then, to build MicroPython for the ESP8266, just run: -```bash -$ cd esp8266 -$ make axtls -$ make -``` -This will produce binary images in the `build/` subdirectory. If you install -MicroPython to your module for the first time, or after installing any other -firmware, you should erase flash completely: - -``` -esptool.py --port /dev/ttyXXX erase_flash -``` - -Erase flash also as a troubleshooting measure, if a module doesn't behave as -expected. - -To flash MicroPython image to your ESP8266, use: -```bash -$ make deploy -``` -This will use the `esptool.py` script to download the images. You must have -your ESP module in the bootloader mode, and connected to a serial port on your PC. -The default serial port is `/dev/ttyACM0`, flash mode is `qio` and flash size is -`detect` (auto-detect based on Flash ID). To specify other values, use, eg (note -that flash size is in megabits): -```bash -$ make PORT=/dev/ttyUSB0 FLASH_MODE=qio FLASH_SIZE=32m deploy -``` - -The image produced is `build/firmware-combined.bin`, to be flashed at 0x00000. - -__512KB FlashROM version__ - -The normal build described above requires modules with at least 1MB of FlashROM -onboard. There's a special configuration for 512KB modules, which can be -built with `make 512k`. This configuration is highly limited, lacks filesystem -support, WebREPL, and has many other features disabled. It's mostly suitable -for advanced users who are interested to fine-tune options to achieve a required -setup. If you are an end user, please consider using a module with at least 1MB -of FlashROM. - -First start ------------ - -__Serial prompt__ - -You can access the REPL (Python prompt) over UART (the same as used for -programming). -- Baudrate: 115200 - -__WiFi__ - -Initially, the device configures itself as a WiFi access point (AP). -- ESSID: MicroPython-xxxxxx (x’s are replaced with part of the MAC address). -- Password: micropythoN (note the upper-case N). -- IP address of the board: 192.168.4.1. -- DHCP-server is activated. - -__WebREPL__ - -Python prompt over WiFi, connecting through a browser. -- Hosted at http://micropython.org/webrepl. -- GitHub repository https://github.com/micropython/webrepl. - -Please follow the instructions there. - -Documentation -------------- - -More detailed documentation and instructions can be found at -http://docs.micropython.org/en/latest/esp8266/ , which includes Quick -Reference, Tutorial, General Information related to ESP8266 port, and -to MicroPython in general. - -Troubleshooting ---------------- - -While the port is in beta, it's known to be generally stable. If you -experience strange bootloops, crashes, lockups, here's a list to check against: - -- You didn't erase flash before programming MicroPython firmware. -- Firmware can be occasionally flashed incorrectly. Just retry. Recent - esptool.py versions have --verify option. -- Power supply you use doesn't provide enough power for ESP8266 or isn't - stable enough. -- A module/flash may be defective (not unheard of for cheap modules). - -Please consult dedicated ESP8266 forums/resources for hardware-related -problems. - -Additional information may be available by the documentation links above. diff --git a/ports/esp8266/boards/feather_huzzah/pins.c b/ports/esp8266/boards/feather_huzzah/pins.c deleted file mode 100644 index d9f03c266c499..0000000000000 --- a/ports/esp8266/boards/feather_huzzah/pins.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pin_TOUT) }, - { MP_ROM_QSTR(MP_QSTR_GPIO16), MP_ROM_PTR(&pin_XPD_DCDC) }, - { MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_MTDO) }, - { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) }, - { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_U0RXD) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_U0TXD) }, - { MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_DVDD) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_DVDD) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp8266/common-hal/analogio/AnalogIn.c b/ports/esp8266/common-hal/analogio/AnalogIn.c deleted file mode 100644 index d3a81272eef79..0000000000000 --- a/ports/esp8266/common-hal/analogio/AnalogIn.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/binary.h" -#include "py/mphal.h" -#include "common-hal/microcontroller/__init__.h" -#include "shared-bindings/analogio/AnalogIn.h" - -#include "user_interface.h" - -volatile bool adc_in_use __attribute__((aligned(4))) = false; - -void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, - const mcu_pin_obj_t *pin) { - if (pin != &pin_TOUT) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin %q does not have ADC capabilities", pin->name)); - } - adc_in_use = true; -} - -bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t* self) { - return self->deinited; -} - -void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t* self) { - if (common_hal_analogio_analogin_deinited(self)) { - return; - } - adc_in_use = false; - self->deinited = true; -} - -uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { - // ADC is 10 bit so shift by 6 to make it 16-bit. - return system_adc_read() << 6; -} - -float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { - return 1.0f; -} diff --git a/ports/esp8266/common-hal/analogio/AnalogIn.h b/ports/esp8266/common-hal/analogio/AnalogIn.h deleted file mode 100644 index b20b8cc61e21f..0000000000000 --- a/ports/esp8266/common-hal/analogio/AnalogIn.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H - -#include "common-hal/microcontroller/Pin.h" - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - bool deinited; -} analogio_analogin_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/esp8266/common-hal/analogio/AnalogOut.c b/ports/esp8266/common-hal/analogio/AnalogOut.c deleted file mode 100644 index 15e9ee2778d6c..0000000000000 --- a/ports/esp8266/common-hal/analogio/AnalogOut.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" - -#include "shared-bindings/analogio/AnalogOut.h" - -void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, - const mcu_pin_obj_t *pin) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "No hardware support for analog out.")); -} - -bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { - return true; -} - -void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { -} - -void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, - uint16_t value) { -} diff --git a/ports/esp8266/common-hal/analogio/AnalogOut.h b/ports/esp8266/common-hal/analogio/AnalogOut.h deleted file mode 100644 index 79343a78fe211..0000000000000 --- a/ports/esp8266/common-hal/analogio/AnalogOut.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H - -#include "py/obj.h" - -// Not supported, throws error on construction. -typedef struct { - mp_obj_base_t base; -} analogio_analogout_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/esp8266/common-hal/board/__init__.c b/ports/esp8266/common-hal/board/__init__.c deleted file mode 100644 index 9365f0fd96097..0000000000000 --- a/ports/esp8266/common-hal/board/__init__.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "common-hal/microcontroller/Pin.h" - -// Pins aren't actually defined here. They are in the board specific directory -// such as boards/feather_huzzah/pins.c. diff --git a/ports/esp8266/common-hal/busio/I2C.h b/ports/esp8266/common-hal/busio/I2C.h deleted file mode 100644 index f0e8ff4af8e09..0000000000000 --- a/ports/esp8266/common-hal/busio/I2C.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H - -// Use the bitbang wrapper for I2C -#include "shared-module/busio/I2C.h" - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/esp8266/common-hal/busio/OneWire.h b/ports/esp8266/common-hal/busio/OneWire.h deleted file mode 100644 index 230474067bdfe..0000000000000 --- a/ports/esp8266/common-hal/busio/OneWire.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H - -// Use the bitbang wrapper for OneWire -#include "shared-module/busio/OneWire.h" - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/esp8266/common-hal/busio/SPI.c b/ports/esp8266/common-hal/busio/SPI.c deleted file mode 100644 index b862c1da79863..0000000000000 --- a/ports/esp8266/common-hal/busio/SPI.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/microcontroller/__init__.h" -#include "common-hal/busio/SPI.h" -#include "py/nlr.h" - -#include "eagle_soc.h" -#include "ets_alt_task.h" -#include "c_types.h" -#include "gpio.h" -#include "hspi.h" - -extern const mcu_pin_obj_t pin_MTMS; -extern const mcu_pin_obj_t pin_MTCK; -extern const mcu_pin_obj_t pin_MTDI; - -void common_hal_busio_spi_construct(busio_spi_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, - const mcu_pin_obj_t * miso) { - if (clock != &pin_MTMS || !((mosi == &pin_MTCK && miso == MP_OBJ_TO_PTR(mp_const_none)) || - (mosi == MP_OBJ_TO_PTR(mp_const_none) && miso == &pin_MTDI) || - (mosi == &pin_MTCK && miso == &pin_MTDI))) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Pins not valid for SPI")); - } - - uint32_t clock_div_flag = 0; - if (SPI_CLK_USE_DIV) { - clock_div_flag = 0x0001; - } - - // Set bit 9 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag<<9)); - // GPIO12 is HSPI MISO pin (Master Data In) - if (miso == &pin_MTDI) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); - } - // GPIO13 is HSPI MOSI pin (Master Data Out) - if (mosi == &pin_MTCK) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); - } - // GPIO14 is HSPI CLK pin (Clock) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); - - spi_clock(HSPI, SPI_CLK_PREDIV, SPI_CLK_CNTDIV); - self->frequency = SPI_CLK_FREQ; - spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CS_SETUP|SPI_CS_HOLD); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE); -} - -bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { - return self->deinited; -} - -void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { - if (common_hal_busio_spi_deinited(self)) { - return; - } - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDI_U); - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTCK_U); - - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 0); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTMS_U); - - // Turn off outputs 12 - 14. - gpio_output_set(0x0, 0x0, 0x0, 0x7 << 12); - - self->deinited = true; -} - -bool common_hal_busio_spi_configure(busio_spi_obj_t *self, - uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - if (bits != 8) { - return false; - } - if (baudrate == 80000000L) { - // Special case for full speed. - spi_init_gpio(HSPI, SPI_CLK_80MHZ_NODIV); - spi_clock(HSPI, 0, 0); - self->frequency = 80000000L; - } else if (baudrate > 40000000L) { - return false; - } else { - uint32_t divider = 40000000L / baudrate; - uint16_t prediv = MIN(divider, SPI_CLKDIV_PRE + 1); - uint16_t cntdiv = (divider / prediv) * 2; // cntdiv has to be even - if (cntdiv > SPI_CLKCNT_N + 1 || cntdiv == 0 || prediv == 0) { - return false; - } - spi_init_gpio(HSPI, SPI_CLK_USE_DIV); - spi_clock(HSPI, prediv, cntdiv); - self->frequency = 80000000L / (prediv * cntdiv); - } - spi_mode(HSPI, phase, polarity); - return true; -} - -bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { - bool success = false; - common_hal_mcu_disable_interrupts(); - if (!self->locked) { - self->locked = true; - success = true; - } - common_hal_mcu_enable_interrupts(); - return success; -} - -bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { - return self->locked; -} - -void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { - self->locked = false; -} - -bool common_hal_busio_spi_write(busio_spi_obj_t *self, - const uint8_t * data, size_t len) { - size_t chunk_size = 1024; - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - spi_tx8fast(HSPI, data[i]); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - spi_tx8fast(HSPI, data[i]); - ++i; - } - while (spi_busy(HSPI)) {}; // Wait for SPI to finish the last byte. - return true; -} - -bool common_hal_busio_spi_read(busio_spi_obj_t *self, - uint8_t * data, size_t len, uint8_t write_value) { - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - uint32_t long_write_value = ((uint32_t) write_value) << 24 | - write_value << 16 | - write_value << 8 | - write_value; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0); - ++i; - } - return true; -} - -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0); - ++i; - } - return true; - -} - -uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - return self->frequency; -} diff --git a/ports/esp8266/common-hal/busio/SPI.h b/ports/esp8266/common-hal/busio/SPI.h deleted file mode 100644 index ba9a5268e0a41..0000000000000 --- a/ports/esp8266/common-hal/busio/SPI.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H - -#include "common-hal/microcontroller/Pin.h" - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - uint32_t frequency; - bool locked; - bool deinited; -} busio_spi_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/esp8266/common-hal/busio/UART.c b/ports/esp8266/common-hal/busio/UART.c deleted file mode 100644 index 9b5d86ef5c5b9..0000000000000 --- a/ports/esp8266/common-hal/busio/UART.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/__init__.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/busio/UART.h" - -#include "ets_sys.h" -#include "espuart.h" - -#include "py/nlr.h" - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, uint32_t timeout, - uint8_t receiver_buffer_size) { - if (rx != mp_const_none || tx != &pin_GPIO2) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "Only tx supported on UART1 (GPIO2).")); - } - - // set baudrate - UartDev.baut_rate = baudrate; - self->baudrate = baudrate; - - // set data bits - switch (bits) { - case 5: - UartDev.data_bits = UART_FIVE_BITS; - break; - case 6: - UartDev.data_bits = UART_SIX_BITS; - break; - case 7: - UartDev.data_bits = UART_SEVEN_BITS; - break; - case 8: - UartDev.data_bits = UART_EIGHT_BITS; - break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid data bits")); - break; - } - - if (parity == PARITY_NONE) { - UartDev.parity = UART_NONE_BITS; - UartDev.exist_parity = UART_STICK_PARITY_DIS; - } else { - UartDev.exist_parity = UART_STICK_PARITY_EN; - if (parity == PARITY_ODD) { - UartDev.parity = UART_ODD_BITS; - } else { - UartDev.parity = UART_EVEN_BITS; - } - } - - switch (stop) { - case 1: - UartDev.stop_bits = UART_ONE_STOP_BIT; - break; - case 2: - UartDev.stop_bits = UART_TWO_STOP_BIT; - break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid stop bits")); - break; - } - - uart_setup(UART1); - self->deinited = false; -} - -bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { - return self->deinited; -} - -void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - if (common_hal_busio_uart_deinited(self)) { - return; - } - // Switch GPIO2 back to a GPIO pin. - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2); - self->deinited = true; -} - -size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - return 0; -} - -// Write characters. -size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { - // write the data - for (size_t i = 0; i < len; ++i) { - uart_tx_one_char(UART1, *data++); - } - - // return number of bytes written - return len; -} - -uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { - return self->baudrate; -} - -void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { - UartDev.baut_rate = baudrate; - uart_setup(UART1); - self->baudrate = baudrate; -} - -uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - return 0; -} - -bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return true; -} diff --git a/ports/esp8266/common-hal/busio/UART.h b/ports/esp8266/common-hal/busio/UART.h deleted file mode 100644 index 9b75b66a339dc..0000000000000 --- a/ports/esp8266/common-hal/busio/UART.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H - -#include "common-hal/microcontroller/Pin.h" - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - uint32_t baudrate; - bool deinited; -} busio_uart_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_BUSIO_UART_H diff --git a/ports/esp8266/common-hal/digitalio/DigitalInOut.c b/ports/esp8266/common-hal/digitalio/DigitalInOut.c deleted file mode 100644 index 7101e641451ae..0000000000000 --- a/ports/esp8266/common-hal/digitalio/DigitalInOut.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" - -#include "shared-bindings/digitalio/DigitalInOut.h" - -digitalinout_result_t common_hal_digitalio_digitalinout_construct( - digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { - self->pin = pin; - PIN_FUNC_SELECT(self->pin->peripheral, self->pin->gpio_function); - return DIGITALINOUT_OK; -} - -bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { - return self->pin == mp_const_none; -} - -void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { - if (common_hal_digitalio_digitalinout_deinited(self)) { - return; - } - if (self->pin->gpio_number < 16) { - uint32_t pin_mask = 1 << self->pin->gpio_number; - gpio_output_set(0x0, 0x0, 0x0, pin_mask); - PIN_FUNC_SELECT(self->pin->peripheral, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } - self->pin = mp_const_none; -} - -void common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - self->output = false; - - if (self->pin->gpio_number == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - } else { - PIN_PULLUP_DIS(self->pin->peripheral); - gpio_output_set(0, 0, 0, 1 << self->pin->gpio_number); - } - common_hal_digitalio_digitalinout_set_pull(self, pull); -} - -void common_hal_digitalio_digitalinout_switch_to_output( - digitalio_digitalinout_obj_t* self, bool value, - digitalio_drive_mode_t drive_mode) { - self->output = true; - self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; - if (self->pin->gpio_number == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output - } else if (!self->open_drain) { - gpio_output_set(0, 0, 1 << self->pin->gpio_number, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } - common_hal_digitalio_digitalinout_set_value(self, value); -} - -digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( - digitalio_digitalinout_obj_t* self) { - return self->output? DIRECTION_OUTPUT : DIRECTION_INPUT; -} - -void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t* self, bool value) { - if (value) { - if (self->open_drain) { - // Disable output. - gpio_output_set(0, 0, 0, 1 << self->pin->gpio_number); - } else { - // Set high - gpio_output_set(1 << self->pin->gpio_number, 0, 0, 0); - } - } else { - if (self->open_drain) { - // Enable the output - gpio_output_set(0, 0, 1 << self->pin->gpio_number, 0); - } - // Set low - gpio_output_set(0, 1 << self->pin->gpio_number, 0, 0); - } -} - -// Register addresses taken from: https://github.com/esp8266/esp8266-wiki/wiki/gpio-registers -volatile uint32_t* PIN_DIR = (uint32_t *) 0x6000030C; -volatile uint32_t* PIN_OUT = (uint32_t *) 0x60000300; -bool common_hal_digitalio_digitalinout_get_value( - digitalio_digitalinout_obj_t* self) { - if (!self->output) { - if (self->pin->gpio_number == 16) { - return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1; - } - return GPIO_INPUT_GET(self->pin->gpio_number); - } else { - uint32_t pin_mask = 1 << self->pin->gpio_number; - if (self->open_drain && ((*PIN_DIR) & pin_mask) == 0) { - return true; - } else { - return ((*PIN_OUT) & pin_mask) != 0; - } - } -} - -void common_hal_digitalio_digitalinout_set_drive_mode( - digitalio_digitalinout_obj_t* self, - digitalio_drive_mode_t drive_mode) { - bool value = common_hal_digitalio_digitalinout_get_value(self); - self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; - // True is implemented differently between modes so reset the value to make - // sure its correct for the new mode. - if (value) { - common_hal_digitalio_digitalinout_set_value(self, value); - } -} - -digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( - digitalio_digitalinout_obj_t* self) { - if (self->open_drain) { - return DRIVE_MODE_OPEN_DRAIN; - } else { - return DRIVE_MODE_PUSH_PULL; - } -} - -void common_hal_digitalio_digitalinout_set_pull( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - if (pull == PULL_DOWN) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "ESP8266 does not support pull down.")); - return; - } - if (self->pin->gpio_number == 16) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "Pin does not support pull.")); - return; - } - if (pull == PULL_NONE) { - PIN_PULLUP_DIS(self->pin->peripheral); - } else { - PIN_PULLUP_EN(self->pin->peripheral); - } -} - -digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( - digitalio_digitalinout_obj_t* self) { - if (self->pin->gpio_number < 16 && - (READ_PERI_REG(self->pin->peripheral) & PERIPHS_IO_MUX_PULLUP) != 0) { - return PULL_UP; - } - return PULL_NONE; -} diff --git a/ports/esp8266/common-hal/digitalio/DigitalInOut.h b/ports/esp8266/common-hal/digitalio/DigitalInOut.h deleted file mode 100644 index 80c23ff9fa7c4..0000000000000 --- a/ports/esp8266/common-hal/digitalio/DigitalInOut.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H - -#include "common-hal/microcontroller/Pin.h" -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - const mcu_pin_obj_t * pin; - bool output; - bool open_drain; -} digitalio_digitalinout_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/esp8266/common-hal/microcontroller/Pin.c b/ports/esp8266/common-hal/microcontroller/Pin.c deleted file mode 100644 index 5c90f4f1a03cb..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/Pin.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/__init__.h" -#include "common-hal/microcontroller/Pin.h" -#include "shared-bindings/microcontroller/Pin.h" - -#include "py/mphal.h" - -#include "eagle_soc.h" - -extern volatile bool adc_in_use; - -bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { - if (pin == &pin_TOUT) { - return !adc_in_use; - } - if (pin->gpio_number == NO_GPIO || pin->gpio_number == SPECIAL_CASE) { - return false; - } - return (READ_PERI_REG(pin->peripheral) & - (PERIPHS_IO_MUX_FUNC<gpio_number)) == 0 && - (READ_PERI_REG(pin->peripheral) & PERIPHS_IO_MUX_PULLUP) == 0; -} - -void reset_pins(void) { - for (int i = 0; i < 17; i++) { - // 5 is RXD, 6 is TXD - if ((i > 4 && i < 13) || i == 12) { - continue; - } - uint32_t peripheral = PERIPHS_IO_MUX + i * 4; - PIN_FUNC_SELECT(peripheral, 0); - PIN_PULLUP_DIS(peripheral); - // Disable the pin. - gpio_output_set(0x0, 0x0, 0x0, 1 << i); - } -} diff --git a/ports/esp8266/common-hal/microcontroller/Pin.h b/ports/esp8266/common-hal/microcontroller/Pin.h deleted file mode 100644 index 405557ddc989f..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/Pin.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t gpio_number; - uint8_t gpio_function; - uint32_t peripheral; -} mcu_pin_obj_t; - -// Magic values for gpio_number. -#define NO_GPIO 0xff -#define SPECIAL_CASE 0xfe - -void reset_pins(void); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/esp8266/common-hal/microcontroller/Processor.c b/ports/esp8266/common-hal/microcontroller/Processor.c deleted file mode 100644 index 3602228d03e69..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/Processor.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "common-hal/microcontroller/Processor.h" - -#include - -#include "esp_mphal.h" -#include "user_interface.h" - - -float common_hal_mcu_processor_get_temperature(void) { - return NAN; -} - -uint32_t common_hal_mcu_processor_get_frequency(void) { - return mp_hal_get_cpu_freq(); -} - -void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { - uint32_t id = system_get_chip_id(); - for (int i=0; i<4; i++){ - raw_id[i] = id >> (i * 8); - } -} diff --git a/ports/esp8266/common-hal/microcontroller/Processor.h b/ports/esp8266/common-hal/microcontroller/Processor.h deleted file mode 100644 index 7d7861fd5735f..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/Processor.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H - -#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 4 - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - // Stores no state currently. -} mcu_processor_obj_t; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/esp8266/common-hal/microcontroller/__init__.c b/ports/esp8266/common-hal/microcontroller/__init__.c deleted file mode 100644 index 6d446ceacb452..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/__init__.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" - -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/microcontroller/Processor.h" - -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/microcontroller/Pin.h" -#include "shared-bindings/microcontroller/Processor.h" - -#include "eagle_soc.h" -#include "ets_alt_task.h" -#include "etshal.h" -#include "osapi.h" -#include "user_interface.h" -#include "xtirq.h" - -#define ETS_LOOP_ITER_BIT (12) - -void common_hal_mcu_delay_us(uint32_t delay) { - os_delay_us(delay); -} - -static uint16_t saved_interrupt_state; -void common_hal_mcu_disable_interrupts() { - saved_interrupt_state = disable_irq(); - saved_interrupt_state = (saved_interrupt_state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT); - ets_loop_iter_disable = 1; -} - -void common_hal_mcu_enable_interrupts() { - ets_loop_iter_disable = (saved_interrupt_state >> ETS_LOOP_ITER_BIT) & 1; - enable_irq(saved_interrupt_state & ~(1 << ETS_LOOP_ITER_BIT)); -} - -void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { - if (runmode == RUNMODE_BOOTLOADER) { - mp_raise_ValueError("Cannot reset into bootloader because no bootloader is present."); - } else if (runmode == RUNMODE_SAFE_MODE) { - mp_raise_ValueError("ESP8226 does not support safe mode."); - } -} - -void common_hal_mcu_reset(void) { - system_restart(); -} - -// The singleton microcontroller.Processor object, returned by microcontroller.cpu -// It currently only has properties, and no state. -const mcu_processor_obj_t common_hal_mcu_processor_obj = { - .base = { - .type = &mcu_processor_type, - }, -}; - -// This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_gpio_number, p_gpio_function, p_peripheral) \ -const mcu_pin_obj_t pin_## p_name = { \ - { &mcu_pin_type }, \ - .name = MP_QSTR_ ## p_name, \ - .gpio_number = p_gpio_number, \ - .gpio_function = p_gpio_function, \ - .peripheral = p_peripheral, \ -} - -// Using microcontroller names from the datasheet. -// https://cdn-shop.adafruit.com/datasheets/ESP8266_Specifications_English.pdf -// PIN(mcu name) // function notes | module name | huzzah name -PIN(TOUT, NO_GPIO, NO_GPIO, NO_GPIO); // adc | ADC | ADC -PIN(XPD_DCDC, 16, SPECIAL_CASE, SPECIAL_CASE); // gpio16 | GPIO16 | GPIO16 -PIN(MTMS, 14, FUNC_GPIO14, PERIPHS_IO_MUX_MTMS_U); // gpio14 / hspi_clk / pwm2 | GPIO14 | GPIO14/SCK -PIN(MTDI, 12, FUNC_GPIO12, PERIPHS_IO_MUX_MTDI_U); // gpio12 / hspi_miso / pwm0 | GPIO12 | GPIO12/MISO -PIN(MTCK, 13, FUNC_GPIO13, PERIPHS_IO_MUX_MTCK_U); // gpio13 / hspi_mosi / U0cts | GPIO13 | GPIO13/MOSI -PIN(MTDO, 15, FUNC_GPIO15, PERIPHS_IO_MUX_MTDO_U); // gpio15 / hspi_cs / u0rts / pwm1 | GPIO15 | GPIO15 -PIN(GPIO2, 2, FUNC_GPIO2, PERIPHS_IO_MUX_GPIO2_U); // U1txd | GPIO2 | GPIO2 -PIN(GPIO0, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U); // spi_Cs2 | GPIO0 | GPIO0 -PIN(GPIO4, 4, FUNC_GPIO4, PERIPHS_IO_MUX_GPIO4_U); // pwm3 on mcu datasheet as vdd which must be wrong | GPIO4 | GPIO4/SDA -PIN(SD_DATA_2, 9, FUNC_GPIO9, PERIPHS_IO_MUX_SD_DATA2_U); // spihd / hspihd / gpio9 | GPIO9 -PIN(SD_DATA_3, 10, FUNC_GPIO10, PERIPHS_IO_MUX_SD_DATA3_U); // spiwp / hspiwp / gpio10 | GPIO10 -PIN(SD_CMD, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_CMD_U); // spi_cs0 / gpio11 | CS0 -PIN(SD_CLK, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_CLK_U); // spi_clk / gpio6 | SCLK -PIN(SD_DATA_0, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_DATA0_U); // spi_miso / gpio7 | MISO -PIN(SD_DATA_1, NO_GPIO, NO_GPIO, PERIPHS_IO_MUX_SD_DATA1_U); // spi_mosi / gpio8 / u1rxd | MOSI -PIN(DVDD, 5, FUNC_GPIO5, PERIPHS_IO_MUX_GPIO5_U); // gpio5 | GPIO5 | GPIO5/SCL -PIN(U0RXD, 3, FUNC_GPIO3, PERIPHS_IO_MUX_U0RXD_U); // gpio3 | RXD0 | RXD -PIN(U0TXD, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U); // gpio1 / spi_cs1 | TXD0 | TXD - -// This maps MCU pin names to pin objects. -STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_TOUT), MP_ROM_PTR(&pin_TOUT) }, - { MP_ROM_QSTR(MP_QSTR_XPD_DCDC), MP_ROM_PTR(&pin_XPD_DCDC) }, - { MP_ROM_QSTR(MP_QSTR_MTMS), MP_ROM_PTR(&pin_MTMS) }, - { MP_ROM_QSTR(MP_QSTR_MTDI), MP_ROM_PTR(&pin_MTDI) }, - { MP_ROM_QSTR(MP_QSTR_MTCK), MP_ROM_PTR(&pin_MTCK) }, - { MP_ROM_QSTR(MP_QSTR_MTDO), MP_ROM_PTR(&pin_MTDO) }, - { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) }, - { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, - { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_2), MP_ROM_PTR(&pin_SD_DATA_2) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_3), MP_ROM_PTR(&pin_SD_DATA_3) }, - { MP_ROM_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_SD_CMD) }, - { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_SD_CLK) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_0), MP_ROM_PTR(&pin_SD_DATA_0) }, - { MP_ROM_QSTR(MP_QSTR_SD_DATA_1), MP_ROM_PTR(&pin_SD_DATA_1) }, - { MP_ROM_QSTR(MP_QSTR_DVDD), MP_ROM_PTR(&pin_DVDD) }, - { MP_ROM_QSTR(MP_QSTR_U0RXD), MP_ROM_PTR(&pin_U0RXD) }, - { MP_ROM_QSTR(MP_QSTR_U0TXD), MP_ROM_PTR(&pin_U0TXD) }, -}; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/esp8266/common-hal/microcontroller/__init__.h b/ports/esp8266/common-hal/microcontroller/__init__.h deleted file mode 100644 index 89be4cbb03966..0000000000000 --- a/ports/esp8266/common-hal/microcontroller/__init__.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H - -#include "common-hal/microcontroller/Pin.h" - -extern const mcu_pin_obj_t pin_TOUT; -extern const mcu_pin_obj_t pin_XPD_DCDC; -extern const mcu_pin_obj_t pin_MTMS; -extern const mcu_pin_obj_t pin_MTDI; -extern const mcu_pin_obj_t pin_MTCK; -extern const mcu_pin_obj_t pin_MTDO; -extern const mcu_pin_obj_t pin_GPIO2; -extern const mcu_pin_obj_t pin_GPIO0; -extern const mcu_pin_obj_t pin_GPIO4; -extern const mcu_pin_obj_t pin_SD_DATA_2; -extern const mcu_pin_obj_t pin_SD_DATA_3; -extern const mcu_pin_obj_t pin_SD_CMD; -extern const mcu_pin_obj_t pin_SD_CLK; -extern const mcu_pin_obj_t pin_SD_DATA_0; -extern const mcu_pin_obj_t pin_SD_DATA_1; -extern const mcu_pin_obj_t pin_DVDD; -extern const mcu_pin_obj_t pin_U0RXD; -extern const mcu_pin_obj_t pin_U0TXD; - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_MICROCONTROLLER___INIT___H diff --git a/ports/esp8266/common-hal/multiterminal/__init__.c b/ports/esp8266/common-hal/multiterminal/__init__.c deleted file mode 100644 index 492174f0bbb01..0000000000000 --- a/ports/esp8266/common-hal/multiterminal/__init__.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "esp_mphal.h" - -#include "shared-bindings/multiterminal/__init__.h" -#include "shared-module/multiterminal/__init__.h" - -void common_hal_multiterminal_schedule_secondary_terminal_read(mp_obj_t socket) { - (void) socket; - mp_hal_signal_dupterm_input(); -} - -mp_obj_t common_hal_multiterminal_get_secondary_terminal() { - return shared_module_multiterminal_get_secondary_terminal(); -} - -void common_hal_multiterminal_set_secondary_terminal(mp_obj_t secondary_terminal) { - shared_module_multiterminal_set_secondary_terminal(secondary_terminal); -} - -void common_hal_multiterminal_clear_secondary_terminal() { - shared_module_multiterminal_clear_secondary_terminal(); -} diff --git a/ports/esp8266/common-hal/neopixel_write/__init__.c b/ports/esp8266/common-hal/neopixel_write/__init__.c deleted file mode 100644 index 84a743d111ebe..0000000000000 --- a/ports/esp8266/common-hal/neopixel_write/__init__.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/neopixel_write/__init__.h" - -#include "espneopixel.h" - -void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { - esp_neopixel_write(digitalinout->pin->gpio_number, pixels, numBytes); -} diff --git a/ports/esp8266/common-hal/os/__init__.c b/ports/esp8266/common-hal/os/__init__.c deleted file mode 100644 index d9d1da2662f9e..0000000000000 --- a/ports/esp8266/common-hal/os/__init__.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "etshal.h" -#include "py/objtuple.h" -#include "py/objstr.h" -#include "genhdr/mpversion.h" -#include "user_interface.h" - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, MICROPY_PY_SYS_PLATFORM); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); - -STATIC mp_obj_tuple_t os_uname_info_obj = { - .base = {&mp_type_attrtuple}, - .len = 5, - .items = { - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - NULL, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj, - (void *)os_uname_info_fields, - } -}; - -mp_obj_t common_hal_os_uname(void) { - // We must populate the "release" field each time in case it was GC'd since the last call. - const char *ver = system_get_sdk_version(); - os_uname_info_obj.items[2] = mp_obj_new_str(ver, strlen(ver), false); - return (mp_obj_t)&os_uname_info_obj; -} - -static uint32_t last_random; -bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { - uint32_t i = 0; - while (i < length) { - uint32_t new_random = last_random; - while (new_random == last_random) { - new_random = *WDEV_HWRNG; - } - for (int j = 0; j < 4 && i < length; j++) { - buffer[i] = new_random & 0xff; - i++; - new_random >>= 8; - } - } - return true; -} diff --git a/ports/esp8266/common-hal/pulseio/PWMOut.c b/ports/esp8266/common-hal/pulseio/PWMOut.c deleted file mode 100644 index 9cc869794b5a5..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PWMOut.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "esppwm.h" - -#include "py/runtime.h" -#include "shared-bindings/pulseio/PWMOut.h" - -#include "eagle_soc.h" -#include "c_types.h" -#include "gpio.h" - -#define PWM_FREQ_MAX 1000 - -// Shared with pybpwm -extern bool pwm_inited; -bool first_channel_variable; - -void pwmout_reset(void) { - first_channel_variable = false; -} - -void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, const mcu_pin_obj_t* pin, uint16_t duty, uint32_t frequency, - bool variable_frequency) { - if (frequency > PWM_FREQ_MAX) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Maximum PWM frequency is %dhz.", PWM_FREQ_MAX)); - } else if (frequency < 1) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "Minimum PWM frequency is 1hz.")); - } - - // start the PWM subsystem if it's not already running - if (!pwm_inited) { - pwm_init(); - pwm_inited = true; - pwm_set_freq(frequency, 0); - first_channel_variable = variable_frequency; - } else if (first_channel_variable || pwm_get_freq(0) != frequency) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Multiple PWM frequencies not supported. PWM already set to %dhz.", pwm_get_freq(0))); - } - - self->channel = pwm_add(pin->gpio_number, - pin->peripheral, - pin->gpio_function); - self->pin = pin; - if (self->channel == -1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "PWM not supported on pin %d", pin->gpio_number)); - } -} - -bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { - return self->pin == mp_const_none; -} - -void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { - if (common_hal_pulseio_pwmout_deinited(self)) { - return; - } - pwm_delete(self->channel); - pwm_start(); - if (self->pin->gpio_number < 16) { - uint32_t pin_mask = 1 << self->pin->gpio_number; - gpio_output_set(0x0, 0x0, 0x0, pin_mask); - PIN_FUNC_SELECT(self->pin->peripheral, 0); - PIN_PULLUP_DIS(self->pin->peripheral); - } - self->pin = mp_const_none; -} - -void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { - // We get 16 bits of duty in but the underlying code is only ten bit. - pwm_set_duty(duty >> 6, self->channel); - pwm_start(); -} - -uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { - return pwm_get_duty(self->channel) << 6; -} - -void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { - if (frequency > PWM_FREQ_MAX) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Maximum PWM frequency is %dhz.", PWM_FREQ_MAX)); - } else if (frequency < 1) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "Minimum PWM frequency is 1hz.")); - } - pwm_set_freq(frequency, 0); -} - -uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { - return pwm_get_freq(0); -} - -bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { - return first_channel_variable; -} diff --git a/ports/esp8266/common-hal/pulseio/PWMOut.h b/ports/esp8266/common-hal/pulseio/PWMOut.h deleted file mode 100644 index d40da2632c851..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PWMOut.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H - -#include "common-hal/microcontroller/Pin.h" - -typedef struct { - mp_obj_base_t base; - int channel; - const mcu_pin_obj_t* pin; -} pulseio_pwmout_obj_t; - -void pwmout_reset(void); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/esp8266/common-hal/pulseio/PulseIn.c b/ports/esp8266/common-hal/pulseio/PulseIn.c deleted file mode 100644 index 783442b35c8b8..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PulseIn.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "mpconfigport.h" -#include "py/gc.h" -#include "py/runtime.h" -#include "shared-bindings/microcontroller/__init__.h" -#include "shared-bindings/pulseio/PulseIn.h" - -void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, - const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { - mp_raise_NotImplementedError(""); -} - -bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { - return true; -} - -void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { -} - -void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { -} - -void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, - uint16_t trigger_duration) { -} - -void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { -} - -uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { - return 0; -} - -uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { - return 0; -} - -uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { - return 0; -} - -uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, - int16_t index) { - return 0; -} diff --git a/ports/esp8266/common-hal/pulseio/PulseIn.h b/ports/esp8266/common-hal/pulseio/PulseIn.h deleted file mode 100644 index 437299f444ac6..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PulseIn.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; -} pulseio_pulsein_obj_t; - -void pwmout_reset(void); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/esp8266/common-hal/pulseio/PulseOut.c b/ports/esp8266/common-hal/pulseio/PulseOut.c deleted file mode 100644 index db2f7cbd92050..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PulseOut.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include - -#include "py/runtime.h" -#include "shared-bindings/pulseio/PulseOut.h" - -void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, - const pulseio_pwmout_obj_t* carrier) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "No hardware support for PulseOut.")); -} - -bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { - return true; -} - -void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { -} - -void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { -} diff --git a/ports/esp8266/common-hal/pulseio/PulseOut.h b/ports/esp8266/common-hal/pulseio/PulseOut.h deleted file mode 100644 index f4b8b910f5609..0000000000000 --- a/ports/esp8266/common-hal/pulseio/PulseOut.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEOUT_H -#define MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEOUT_H - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; -} pulseio_pulseout_obj_t; - -void pwmout_reset(void); - -#endif // MICROPY_INCLUDED_ESP8266_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/esp8266/common-hal/storage/__init__.c b/ports/esp8266/common-hal/storage/__init__.c deleted file mode 100644 index a4c3a387aca60..0000000000000 --- a/ports/esp8266/common-hal/storage/__init__.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the Micro Python project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "shared-bindings/storage/__init__.h" - -void common_hal_storage_remount(const char* mount_path, bool readonly) { - mp_raise_NotImplementedError(""); -} diff --git a/ports/esp8266/common-hal/time/__init__.c b/ports/esp8266/common-hal/time/__init__.c deleted file mode 100644 index 993e89b1c349e..0000000000000 --- a/ports/esp8266/common-hal/time/__init__.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" - -#include "shared-bindings/time/__init__.h" - -#include "ets_alt_task.h" -#include "user_interface.h" - -inline uint64_t common_hal_time_monotonic() { - return ((uint64_t)system_time_high_word << 32 | (uint64_t)system_get_time()) / 1000; -} - -void common_hal_time_delay_ms(uint32_t delay) { - mp_hal_delay_ms(delay); -} diff --git a/ports/esp8266/eagle.rom.addr.v6.ld b/ports/esp8266/eagle.rom.addr.v6.ld deleted file mode 100644 index 1b3ce55d01580..0000000000000 --- a/ports/esp8266/eagle.rom.addr.v6.ld +++ /dev/null @@ -1,351 +0,0 @@ -PROVIDE ( Cache_Read_Disable = 0x400047f0 ); -PROVIDE ( Cache_Read_Enable = 0x40004678 ); -PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 ); -PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c ); -PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 ); -PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 ); -PROVIDE ( GetUartDevice = 0x40003f4c ); -PROVIDE ( MD5Final = 0x40009900 ); -PROVIDE ( MD5Init = 0x40009818 ); -PROVIDE ( MD5Update = 0x40009834 ); -PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 ); -PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c ); -PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 ); -PROVIDE ( RcvMsg = 0x40003eac ); -PROVIDE ( SHA1Final = 0x4000b648 ); -PROVIDE ( SHA1Init = 0x4000b584 ); -PROVIDE ( SHA1Transform = 0x4000a364 ); -PROVIDE ( SHA1Update = 0x4000b5a8 ); -PROVIDE ( SPI_read_status = 0x400043c8 ); -PROVIDE ( SPI_write_status = 0x40004400 ); -PROVIDE ( SPI_write_enable = 0x4000443c ); -PROVIDE ( Wait_SPI_Idle = 0x4000448c ); -PROVIDE ( Enable_QMode = 0x400044c0 ); -PROVIDE ( SPIEraseArea = 0x40004b44 ); -PROVIDE ( SPIEraseBlock = 0x400049b4 ); -PROVIDE ( SPIEraseChip = 0x40004984 ); -PROVIDE ( SPIEraseSector = 0x40004a00 ); -PROVIDE ( SPILock = 0x400048a8 ); -PROVIDE ( SPIParamCfg = 0x40004c2c ); -PROVIDE ( SPIRead = 0x40004b1c ); -PROVIDE ( SPIReadModeCnfig = 0x400048ec ); -PROVIDE ( SPIUnlock = 0x40004878 ); -PROVIDE ( SPIWrite = 0x40004a4c ); -PROVIDE ( SelectSpiFunction = 0x40003f58 ); -PROVIDE ( SendMsg = 0x40003cf4 ); -PROVIDE ( UartConnCheck = 0x40003230 ); -PROVIDE ( UartConnectProc = 0x400037a0 ); -PROVIDE ( UartDwnLdProc = 0x40003368 ); -PROVIDE ( UartGetCmdLn = 0x40003ef4 ); -PROVIDE ( UartRegReadProc = 0x4000381c ); -PROVIDE ( UartRegWriteProc = 0x400037ac ); -PROVIDE ( UartRxString = 0x40003c30 ); -PROVIDE ( Uart_Init = 0x40003a14 ); -PROVIDE ( _DebugExceptionVector = 0x40000010 ); -PROVIDE ( _DoubleExceptionVector = 0x40000070 ); -PROVIDE ( _KernelExceptionVector = 0x40000030 ); -PROVIDE ( _NMIExceptionVector = 0x40000020 ); -PROVIDE ( _ResetHandler = 0x400000a4 ); -PROVIDE ( _ResetVector = 0x40000080 ); -PROVIDE ( _UserExceptionVector = 0x40000050 ); -__adddf3 = 0x4000c538; -__addsf3 = 0x4000c180; -__divdf3 = 0x4000cb94; -__divdi3 = 0x4000ce60; -__divsi3 = 0x4000dc88; -__extendsfdf2 = 0x4000cdfc; -__fixdfsi = 0x4000ccb8; -__fixunsdfsi = 0x4000cd00; -__fixunssfsi = 0x4000c4c4; -__floatsidf = 0x4000e2f0; -__floatsisf = 0x4000e2ac; -__floatunsidf = 0x4000e2e8; -__floatunsisf = 0x4000e2a4; -__muldf3 = 0x4000c8f0; -__muldi3 = 0x40000650; -__mulsf3 = 0x4000c3dc; -__subdf3 = 0x4000c688; -__subsf3 = 0x4000c268; -__truncdfsf2 = 0x4000cd5c; -__udivdi3 = 0x4000d310; -__udivsi3 = 0x4000e21c; -__umoddi3 = 0x4000d770; -__umodsi3 = 0x4000e268; -__umulsidi3 = 0x4000dcf0; -PROVIDE ( _rom_store = 0x4000e388 ); -PROVIDE ( _rom_store_table = 0x4000e328 ); -PROVIDE ( _start = 0x4000042c ); -PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 ); -PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 ); -PROVIDE ( _xtos_cause3_handler = 0x40000590 ); -PROVIDE ( _xtos_ints_off = 0x4000bda4 ); -PROVIDE ( _xtos_ints_on = 0x4000bd84 ); -PROVIDE ( _xtos_l1int_handler = 0x4000048c ); -PROVIDE ( _xtos_p_none = 0x4000dbf8 ); -PROVIDE ( _xtos_restore_intlevel = 0x4000056c ); -PROVIDE ( _xtos_return_from_exc = 0x4000dc54 ); -PROVIDE ( _xtos_set_exception_handler = 0x40000454 ); -PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 ); -PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 ); -PROVIDE ( _xtos_set_intlevel = 0x4000dbfc ); -PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 ); -PROVIDE ( _xtos_set_vpri = 0x40000574 ); -PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 ); -PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 ); -PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c ); -PROVIDE ( aes_decrypt = 0x400092d4 ); -PROVIDE ( aes_decrypt_deinit = 0x400092e4 ); -PROVIDE ( aes_decrypt_init = 0x40008ea4 ); -PROVIDE ( aes_unwrap = 0x40009410 ); -PROVIDE ( base64_decode = 0x40009648 ); -PROVIDE ( base64_encode = 0x400094fc ); -PROVIDE ( bzero = 0x4000de84 ); -PROVIDE ( cmd_parse = 0x40000814 ); -PROVIDE ( conv_str_decimal = 0x40000b24 ); -PROVIDE ( conv_str_hex = 0x40000cb8 ); -PROVIDE ( convert_para_str = 0x40000a60 ); -PROVIDE ( dtm_get_intr_mask = 0x400026d0 ); -PROVIDE ( dtm_params_init = 0x4000269c ); -PROVIDE ( dtm_set_intr_mask = 0x400026c8 ); -PROVIDE ( dtm_set_params = 0x400026dc ); -PROVIDE ( eprintf = 0x40001d14 ); -PROVIDE ( eprintf_init_buf = 0x40001cb8 ); -PROVIDE ( eprintf_to_host = 0x40001d48 ); -PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 ); -PROVIDE ( est_reset_printf_buf_len = 0x4000249c ); -PROVIDE ( ets_bzero = 0x40002ae8 ); -PROVIDE ( ets_char2xdigit = 0x40002b74 ); -PROVIDE ( ets_delay_us = 0x40002ecc ); -PROVIDE ( ets_enter_sleep = 0x400027b8 ); -PROVIDE ( ets_external_printf = 0x40002578 ); -PROVIDE ( ets_get_cpu_frequency = 0x40002f0c ); -PROVIDE ( ets_getc = 0x40002bcc ); -PROVIDE ( ets_install_external_printf = 0x40002450 ); -PROVIDE ( ets_install_putc1 = 0x4000242c ); -PROVIDE ( ets_install_putc2 = 0x4000248c ); -PROVIDE ( ets_install_uart_printf = 0x40002438 ); -PROVIDE ( ets_intr_lock = 0x40000f74 ); -PROVIDE ( ets_intr_unlock = 0x40000f80 ); -PROVIDE ( ets_isr_attach = 0x40000f88 ); -PROVIDE ( ets_isr_mask = 0x40000f98 ); -PROVIDE ( ets_isr_unmask = 0x40000fa8 ); -PROVIDE ( ets_memcmp = 0x400018d4 ); -PROVIDE ( ets_memcpy = 0x400018b4 ); -PROVIDE ( ets_memmove = 0x400018c4 ); -PROVIDE ( ets_memset = 0x400018a4 ); -PROVIDE ( _ets_post = 0x40000e24 ); -PROVIDE ( ets_printf = 0x400024cc ); -PROVIDE ( ets_putc = 0x40002be8 ); -PROVIDE ( ets_rtc_int_register = 0x40002a40 ); -PROVIDE ( _ets_run = 0x40000e04 ); -PROVIDE ( _ets_set_idle_cb = 0x40000dc0 ); -PROVIDE ( ets_set_user_start = 0x40000fbc ); -PROVIDE ( ets_str2macaddr = 0x40002af8 ); -PROVIDE ( ets_strcmp = 0x40002aa8 ); -PROVIDE ( ets_strcpy = 0x40002a88 ); -PROVIDE ( ets_strlen = 0x40002ac8 ); -PROVIDE ( ets_strncmp = 0x40002ab8 ); -PROVIDE ( ets_strncpy = 0x40002a98 ); -PROVIDE ( ets_strstr = 0x40002ad8 ); -PROVIDE ( _ets_task = 0x40000dd0 ); -PROVIDE ( ets_timer_arm = 0x40002cc4 ); -PROVIDE ( ets_timer_disarm = 0x40002d40 ); -PROVIDE ( ets_timer_done = 0x40002d80 ); -PROVIDE ( ets_timer_handler_isr = 0x40002da8 ); -PROVIDE ( _ets_timer_init = 0x40002e68 ); -PROVIDE ( ets_timer_setfn = 0x40002c48 ); -PROVIDE ( ets_uart_printf = 0x40002544 ); -PROVIDE ( ets_update_cpu_frequency = 0x40002f04 ); -PROVIDE ( ets_vprintf = 0x40001f00 ); -PROVIDE ( ets_wdt_disable = 0x400030f0 ); -PROVIDE ( ets_wdt_enable = 0x40002fa0 ); -PROVIDE ( ets_wdt_get_mode = 0x40002f34 ); -PROVIDE ( ets_wdt_init = 0x40003170 ); -PROVIDE ( ets_wdt_restore = 0x40003158 ); -PROVIDE ( ets_write_char = 0x40001da0 ); -PROVIDE ( get_first_seg = 0x4000091c ); -PROVIDE ( gpio_init = 0x40004c50 ); -PROVIDE ( gpio_input_get = 0x40004cf0 ); -PROVIDE ( gpio_intr_ack = 0x40004dcc ); -PROVIDE ( gpio_intr_handler_register = 0x40004e28 ); -PROVIDE ( gpio_intr_pending = 0x40004d88 ); -PROVIDE ( gpio_intr_test = 0x40004efc ); -PROVIDE ( gpio_output_set = 0x40004cd0 ); -PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 ); -PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 ); -PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 ); -PROVIDE ( gpio_register_get = 0x40004d5c ); -PROVIDE ( gpio_register_set = 0x40004d04 ); -PROVIDE ( hmac_md5 = 0x4000a2cc ); -PROVIDE ( hmac_md5_vector = 0x4000a160 ); -PROVIDE ( hmac_sha1 = 0x4000ba28 ); -PROVIDE ( hmac_sha1_vector = 0x4000b8b4 ); -PROVIDE ( lldesc_build_chain = 0x40004f40 ); -PROVIDE ( lldesc_num2link = 0x40005050 ); -PROVIDE ( lldesc_set_owner = 0x4000507c ); -PROVIDE ( main = 0x40000fec ); -PROVIDE ( md5_vector = 0x400097ac ); -PROVIDE ( mem_calloc = 0x40001c2c ); -PROVIDE ( mem_free = 0x400019e0 ); -PROVIDE ( mem_init = 0x40001998 ); -PROVIDE ( mem_malloc = 0x40001b40 ); -PROVIDE ( mem_realloc = 0x40001c6c ); -PROVIDE ( mem_trim = 0x40001a14 ); -PROVIDE ( mem_zalloc = 0x40001c58 ); -PROVIDE ( memcmp = 0x4000dea8 ); -PROVIDE ( memcpy = 0x4000df48 ); -PROVIDE ( memmove = 0x4000e04c ); -PROVIDE ( memset = 0x4000e190 ); -PROVIDE ( multofup = 0x400031c0 ); -PROVIDE ( pbkdf2_sha1 = 0x4000b840 ); -PROVIDE ( phy_get_romfuncs = 0x40006b08 ); -PROVIDE ( rand = 0x40000600 ); -PROVIDE ( rc4_skip = 0x4000dd68 ); -PROVIDE ( recv_packet = 0x40003d08 ); -PROVIDE ( remove_head_space = 0x40000a04 ); -PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 ); -PROVIDE ( rijndaelKeySetupEnc = 0x40009300 ); -PROVIDE ( rom_abs_temp = 0x400060c0 ); -PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 ); -PROVIDE ( rom_cal_tos_v50 = 0x40007a28 ); -PROVIDE ( rom_chip_50_set_channel = 0x40006f84 ); -PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 ); -PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec ); -PROVIDE ( rom_chip_v5_rx_init = 0x4000711c ); -PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c ); -PROVIDE ( rom_chip_v5_tx_init = 0x4000718c ); -PROVIDE ( rom_dc_iq_est = 0x4000615c ); -PROVIDE ( rom_en_pwdet = 0x400061b8 ); -PROVIDE ( rom_get_bb_atten = 0x40006238 ); -PROVIDE ( rom_get_corr_power = 0x40006260 ); -PROVIDE ( rom_get_fm_sar_dout = 0x400062dc ); -PROVIDE ( rom_get_noisefloor = 0x40006394 ); -PROVIDE ( rom_get_power_db = 0x400063b0 ); -PROVIDE ( rom_i2c_readReg = 0x40007268 ); -PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c ); -PROVIDE ( rom_i2c_writeReg = 0x400072d8 ); -PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c ); -PROVIDE ( rom_iq_est_disable = 0x40006400 ); -PROVIDE ( rom_iq_est_enable = 0x40006430 ); -PROVIDE ( rom_linear_to_db = 0x40006484 ); -PROVIDE ( rom_mhz2ieee = 0x400065a4 ); -PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 ); -PROVIDE ( rom_pbus_debugmode = 0x4000737c ); -PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 ); -PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 ); -PROVIDE ( rom_pbus_force_test = 0x4000747c ); -PROVIDE ( rom_pbus_rd = 0x400074d8 ); -PROVIDE ( rom_pbus_set_rxgain = 0x4000754c ); -PROVIDE ( rom_pbus_set_txgain = 0x40007610 ); -PROVIDE ( rom_pbus_workmode = 0x40007648 ); -PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 ); -PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc ); -PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc ); -PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 ); -PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 ); -PROVIDE ( rom_phy_reset_req = 0x40007804 ); -PROVIDE ( rom_restart_cal = 0x4000781c ); -PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 ); -PROVIDE ( rom_rfcal_rxiq = 0x4000804c ); -PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 ); -PROVIDE ( rom_rfcal_txcap = 0x40008388 ); -PROVIDE ( rom_rfcal_txiq = 0x40008610 ); -PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 ); -PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 ); -PROVIDE ( rom_rfpll_reset = 0x40007868 ); -PROVIDE ( rom_rfpll_set_freq = 0x40007968 ); -PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c ); -PROVIDE ( rom_rxiq_get_mis = 0x40006628 ); -PROVIDE ( rom_sar_init = 0x40006738 ); -PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c ); -PROVIDE ( rom_set_channel_freq = 0x40006c50 ); -PROVIDE ( rom_set_loopback_gain = 0x400067c8 ); -PROVIDE ( rom_set_noise_floor = 0x40006830 ); -PROVIDE ( rom_set_rxclk_en = 0x40006550 ); -PROVIDE ( rom_set_txbb_atten = 0x40008c6c ); -PROVIDE ( rom_set_txclk_en = 0x4000650c ); -PROVIDE ( rom_set_txiq_cal = 0x40008d34 ); -PROVIDE ( rom_start_noisefloor = 0x40006874 ); -PROVIDE ( rom_start_tx_tone = 0x400068b4 ); -PROVIDE ( rom_stop_tx_tone = 0x4000698c ); -PROVIDE ( rom_tx_mac_disable = 0x40006a98 ); -PROVIDE ( rom_tx_mac_enable = 0x40006ad4 ); -PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c ); -PROVIDE ( rom_write_rfpll_sdm = 0x400078dc ); -PROVIDE ( roundup2 = 0x400031b4 ); -PROVIDE ( rtc_enter_sleep = 0x40002870 ); -PROVIDE ( rtc_get_reset_reason = 0x400025e0 ); -PROVIDE ( rtc_intr_handler = 0x400029ec ); -PROVIDE ( rtc_set_sleep_mode = 0x40002668 ); -PROVIDE ( save_rxbcn_mactime = 0x400027a4 ); -PROVIDE ( save_tsf_us = 0x400027ac ); -PROVIDE ( send_packet = 0x40003c80 ); -PROVIDE ( sha1_prf = 0x4000ba48 ); -PROVIDE ( sha1_vector = 0x4000a2ec ); -PROVIDE ( sip_alloc_to_host_evt = 0x40005180 ); -PROVIDE ( sip_get_ptr = 0x400058a8 ); -PROVIDE ( sip_get_state = 0x40005668 ); -PROVIDE ( sip_init_attach = 0x4000567c ); -PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c ); -PROVIDE ( sip_install_rx_data_cb = 0x4000545c ); -PROVIDE ( sip_post = 0x400050fc ); -PROVIDE ( sip_post_init = 0x400056c4 ); -PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c ); -PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 ); -PROVIDE ( sip_send = 0x40005808 ); -PROVIDE ( sip_to_host_chain_append = 0x40005864 ); -PROVIDE ( sip_to_host_evt_send_done = 0x40005234 ); -PROVIDE ( slc_add_credits = 0x400060ac ); -PROVIDE ( slc_enable = 0x40005d90 ); -PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 ); -PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 ); -PROVIDE ( slc_init_attach = 0x40005c50 ); -PROVIDE ( slc_init_credit = 0x4000608c ); -PROVIDE ( slc_pause_from_host = 0x40006014 ); -PROVIDE ( slc_reattach = 0x40005c1c ); -PROVIDE ( slc_resume_from_host = 0x4000603c ); -PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 ); -PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 ); -PROVIDE ( slc_send_to_host_chain = 0x40005de4 ); -PROVIDE ( slc_set_host_io_max_window = 0x40006068 ); -PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 ); -PROVIDE ( software_reset = 0x4000264c ); -PROVIDE ( spi_flash_attach = 0x40004644 ); -PROVIDE ( srand = 0x400005f0 ); -PROVIDE ( strcmp = 0x4000bdc8 ); -PROVIDE ( strcpy = 0x4000bec8 ); -PROVIDE ( strlen = 0x4000bf4c ); -PROVIDE ( strncmp = 0x4000bfa8 ); -PROVIDE ( strncpy = 0x4000c0a0 ); -PROVIDE ( strstr = 0x4000e1e0 ); -PROVIDE ( timer_insert = 0x40002c64 ); -PROVIDE ( uartAttach = 0x4000383c ); -PROVIDE ( uart_baudrate_detect = 0x40003924 ); -PROVIDE ( uart_buff_switch = 0x400038a4 ); -PROVIDE ( uart_div_modify = 0x400039d8 ); -PROVIDE ( uart_rx_intr_handler = 0x40003bbc ); -PROVIDE ( uart_rx_one_char = 0x40003b8c ); -PROVIDE ( uart_rx_one_char_block = 0x40003b64 ); -PROVIDE ( uart_rx_readbuff = 0x40003ec8 ); -PROVIDE ( uart_tx_one_char = 0x40003b30 ); -PROVIDE ( wepkey_128 = 0x4000bc40 ); -PROVIDE ( wepkey_64 = 0x4000bb3c ); -PROVIDE ( xthal_bcopy = 0x40000688 ); -PROVIDE ( xthal_copy123 = 0x4000074c ); -PROVIDE ( xthal_get_ccompare = 0x4000dd4c ); -PROVIDE ( xthal_get_ccount = 0x4000dd38 ); -PROVIDE ( xthal_get_interrupt = 0x4000dd58 ); -PROVIDE ( xthal_get_intread = 0x4000dd58 ); -PROVIDE ( xthal_memcpy = 0x400006c4 ); -PROVIDE ( xthal_set_ccompare = 0x4000dd40 ); -PROVIDE ( xthal_set_intclear = 0x4000dd60 ); -PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 ); -PROVIDE ( xthal_window_spill = 0x4000e324 ); -PROVIDE ( xthal_window_spill_nw = 0x4000e320 ); - -PROVIDE ( Te0 = 0x3fffccf0 ); -PROVIDE ( Td0 = 0x3fffd100 ); -PROVIDE ( Td4s = 0x3fffd500); -PROVIDE ( rcons = 0x3fffd0f0); -PROVIDE ( UartDev = 0x3fffde10 ); -PROVIDE ( flashchip = 0x3fffc714); diff --git a/ports/esp8266/esp8266.ld b/ports/esp8266/esp8266.ld deleted file mode 100644 index deeb82b456122..0000000000000 --- a/ports/esp8266/esp8266.ld +++ /dev/null @@ -1,12 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - irom0_0_seg : org = 0x40209000, len = 0x8f000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp8266_512k.ld b/ports/esp8266/esp8266_512k.ld deleted file mode 100644 index 0ae663db11e29..0000000000000 --- a/ports/esp8266/esp8266_512k.ld +++ /dev/null @@ -1,12 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - irom0_0_seg : org = 0x40209000, len = 0x72000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp8266_common.ld b/ports/esp8266/esp8266_common.ld deleted file mode 100644 index 031123389ba73..0000000000000 --- a/ports/esp8266/esp8266_common.ld +++ /dev/null @@ -1,302 +0,0 @@ -/* GNU linker script for ESP8266, common sections and symbols */ - -/* define the top of RAM */ -_heap_end = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg); - -PHDRS -{ - dport0_0_phdr PT_LOAD; - dram0_0_phdr PT_LOAD; - dram0_0_bss_phdr PT_LOAD; - iram1_0_phdr PT_LOAD; - irom0_0_phdr PT_LOAD; -} - -ENTRY(firmware_start) -EXTERN(_DebugExceptionVector) -EXTERN(_DoubleExceptionVector) -EXTERN(_KernelExceptionVector) -EXTERN(_NMIExceptionVector) -EXTERN(_UserExceptionVector) - -_firmware_size = ORIGIN(irom0_0_seg) + LENGTH(irom0_0_seg) - 0x40200000; - -PROVIDE(_memmap_vecbase_reset = 0x40000000); - -/* Various memory-map dependent cache attribute settings: */ -_memmap_cacheattr_wb_base = 0x00000110; -_memmap_cacheattr_wt_base = 0x00000110; -_memmap_cacheattr_bp_base = 0x00000220; -_memmap_cacheattr_unused_mask = 0xFFFFF00F; -_memmap_cacheattr_wb_trapnull = 0x2222211F; -_memmap_cacheattr_wba_trapnull = 0x2222211F; -_memmap_cacheattr_wbna_trapnull = 0x2222211F; -_memmap_cacheattr_wt_trapnull = 0x2222211F; -_memmap_cacheattr_bp_trapnull = 0x2222222F; -_memmap_cacheattr_wb_strict = 0xFFFFF11F; -_memmap_cacheattr_wt_strict = 0xFFFFF11F; -_memmap_cacheattr_bp_strict = 0xFFFFF22F; -_memmap_cacheattr_wb_allvalid = 0x22222112; -_memmap_cacheattr_wt_allvalid = 0x22222112; -_memmap_cacheattr_bp_allvalid = 0x22222222; -PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); - -SECTIONS -{ - - .dport0.rodata : ALIGN(4) - { - _dport0_rodata_start = ABSOLUTE(.); - *(.dport0.rodata) - *(.dport.rodata) - _dport0_rodata_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .dport0.literal : ALIGN(4) - { - _dport0_literal_start = ABSOLUTE(.); - *(.dport0.literal) - *(.dport.literal) - _dport0_literal_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .dport0.data : ALIGN(4) - { - _dport0_data_start = ABSOLUTE(.); - *(.dport0.data) - *(.dport.data) - _dport0_data_end = ABSOLUTE(.); - } >dport0_0_seg :dport0_0_phdr - - .irom0.text : ALIGN(4) - { - _irom0_text_start = ABSOLUTE(.); - *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) - - /* we put some specific text in this section */ - - *common-hal/*.o*(.literal* .text*) - *shared-bindings/*.o*(.literal* .text*) - *shared-module/*.o*(.literal* .text*) - - *py/argcheck.o*(.literal* .text*) - *py/asm*.o*(.literal* .text*) - *py/bc.o*(.literal* .text*) - *py/binary.o*(.literal* .text*) - *py/builtin*.o*(.literal* .text*) - *py/compile.o*(.literal* .text*) - *py/emit*.o*(.literal* .text*) - *py/persistentcode*.o*(.literal* .text*) - *py/formatfloat.o*(.literal* .text*) - *py/frozenmod.o*(.literal* .text*) - *py/gc.o*(.literal* .text*) - *py/reader*.o*(.literal* .text*) - *py/lexer*.o*(.literal* .text*) - *py/malloc*.o*(.literal* .text*) - *py/map*.o*(.literal* .text*) - *py/mod*.o*(.literal* .text*) - *py/mpprint.o*(.literal* .text*) - *py/mpstate.o*(.literal* .text*) - *py/mpz.o*(.literal* .text*) - *py/native*.o*(.literal* .text*) - *py/nlr*.o*(.literal* .text*) - *py/obj*.o*(.literal* .text*) - *py/opmethods.o*(.literal* .text*) - *py/parse*.o*(.literal* .text*) - *py/qstr.o*(.literal* .text*) - *py/repl.o*(.literal* .text*) - *py/runtime.o*(.literal* .text*) - *py/scheduler.o*(.literal* .text*) - *py/scope.o*(.literal* .text*) - *py/sequence.o*(.literal* .text*) - *py/showbc.o*(.literal* .text*) - *py/smallint.o*(.literal* .text*) - *py/stackctrl.o*(.literal* .text*) - *py/stream.o*(.literal* .text*) - *py/unicode.o*(.literal* .text*) - *py/vm.o*(.literal* .text*) - *py/vstr.o*(.literal* .text*) - *py/warning.o*(.literal* .text*) - - *extmod/*.o*(.literal* .text*) - - *lib/oofatfs/*.o*(.literal*, .text*) - */libaxtls.a:(.literal*, .text*) - *lib/berkeley-db-1.xx/*.o(.literal*, .text*) - *lib/libm/*.o*(.literal*, .text*) - *lib/mp-readline/*.o(.literal*, .text*) - *lib/netutils/*.o*(.literal*, .text*) - *lib/timeutils/*.o*(.literal*, .text*) - *lib/utils/*.o*(.literal*, .text*) - - build/main.o(.literal* .text*) - *gccollect.o(.literal* .text*) - *gchelper.o(.literal* .text*) - *help.o(.literal* .text*) - *lexerstr32.o(.literal* .text*) - *utils.o(.literal* .text*) - *modpyb.o(.literal*, .text*) - *machine_pin.o(.literal*, .text*) - *machine_pwm.o(.literal*, .text*) - *machine_rtc.o(.literal*, .text*) - *machine_adc.o(.literal*, .text*) - *machine_uart.o(.literal*, .text*) - *modpybi2c.o(.literal*, .text*) - *modmachine.o(.literal*, .text*) - *machine_wdt.o(.literal*, .text*) - *machine_spi.o(.literal*, .text*) - *machine_hspi.o(.literal*, .text*) - *hspi.o(.literal*, .text*) - *modesp.o(.literal* .text*) - *modnetwork.o(.literal* .text*) - *moduos.o(.literal* .text*) - *modutime.o(.literal* .text*) - *modlwip.o(.literal* .text*) - *modsocket.o(.literal* .text*) - *modonewire.o(.literal* .text*) - - /* we put as much rodata as possible in this section */ - /* note that only rodata accessed as a machine word is allowed here */ - *py/qstr.o(.rodata.const_pool) - *.o(.rodata.mp_type_*) /* catches type: mp_obj_type_t */ - *.o(.rodata.*_locals_dict*) /* catches types: mp_obj_dict_t, mp_map_elem_t */ - *.o(.rodata.mp_module_*) /* catches types: mp_obj_module_t, mp_obj_dict_t, mp_map_elem_t */ - */frozen.o(.rodata.mp_frozen_sizes) /* frozen modules */ - */frozen.o(.rodata.mp_frozen_content) /* frozen modules */ - - /* for -mforce-l32 */ - build/*.o(.rodata*) - - _irom0_text_end = ABSOLUTE(.); - } >irom0_0_seg :irom0_0_phdr - - .text : ALIGN(4) - { - _stext = .; - _text_start = ABSOLUTE(.); - *(.UserEnter.text) - . = ALIGN(16); - *(.DebugExceptionVector.text) - . = ALIGN(16); - *(.NMIExceptionVector.text) - . = ALIGN(16); - *(.KernelExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN(16); - *(.UserExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN(16); - *(.DoubleExceptionVector.text) - LONG(0) - LONG(0) - LONG(0) - LONG(0) - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - *(.literal .text .literal.* .text.* .iram0.literal .iram0.text .iram0.text.*.literal .iram0.text.*) - *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.fini.literal) - *(.fini) - *(.gnu.version) - _text_end = ABSOLUTE(.); - _etext = .; - } >iram1_0_seg :iram1_0_phdr - - .lit4 : ALIGN(4) - { - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - } >iram1_0_seg :iram1_0_phdr - - .data : ALIGN(4) - { - _data_start = ABSOLUTE(.); - *(.data) - *(.data.*) - *(.gnu.linkonce.d.*) - *(.data1) - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) - *(.gnu.linkonce.s2.*) - *(.jcr) - _data_end = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_phdr - - .rodata : ALIGN(4) - { - _rodata_start = ABSOLUTE(.); - *(.sdk.version) - *(.rodata) - *(.rodata.*) - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - *(.eh_frame) - /* C++ constructor and destructor tables, properly ordered: */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - /* C++ exception handlers table: */ - __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - . = ALIGN(4); /* this table MUST be 4-byte aligned */ - _bss_table_start = ABSOLUTE(.); - LONG(_bss_start) - LONG(_bss_end) - _bss_table_end = ABSOLUTE(.); - _rodata_end = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_phdr - - .bss ALIGN(8) (NOLOAD) : ALIGN(4) - { - . = ALIGN (8); - _bss_start = ABSOLUTE(.); - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - *(.bss) - *(.bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN (8); - _bss_end = ABSOLUTE(.); - _heap_start = ABSOLUTE(.); - } >dram0_0_seg :dram0_0_bss_phdr -} - -/* get ROM code address */ -INCLUDE "eagle.rom.addr.v6.ld" diff --git a/ports/esp8266/esp8266_ota.ld b/ports/esp8266/esp8266_ota.ld deleted file mode 100644 index 604480a0a9630..0000000000000 --- a/ports/esp8266/esp8266_ota.ld +++ /dev/null @@ -1,13 +0,0 @@ -/* GNU linker script for ESP8266 */ - -MEMORY -{ - dport0_0_seg : org = 0x3ff00000, len = 0x10 - dram0_0_seg : org = 0x3ffe8000, len = 0x14000 - iram1_0_seg : org = 0x40100000, len = 0x8000 - /* 0x3c000 is size of bootloader, 0x9000 is size of packed RAM segments */ - irom0_0_seg : org = 0x40200000 + 0x3c000 + 0x9000, len = 0x8f000 -} - -/* define common sections and symbols */ -INCLUDE esp8266_common.ld diff --git a/ports/esp8266/esp_init_data.c b/ports/esp8266/esp_init_data.c deleted file mode 100644 index b14de573a76d0..0000000000000 --- a/ports/esp8266/esp_init_data.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "ets_sys.h" -#include "etshal.h" -#include "esp_mphal.h" -#include "user_interface.h" -#include "extmod/misc.h" - -NORETURN void call_user_start(void); -void ets_printf(const char *fmt, ...); -extern char flashchip; - -static const uint8_t default_init_data[] __attribute__((aligned(4))) = { -0x05, 0x00, 0x04, 0x02, 0x05, 0x05, 0x05, 0x02, 0x05, 0x00, 0x04, 0x05, 0x05, 0x04, 0x05, 0x05, -0x04, 0xfe, 0xfd, 0xff, 0xf0, 0xf0, 0xf0, 0xe0, 0xe0, 0xe0, 0xe1, 0x0a, 0xff, 0xff, 0xf8, 0x00, -0xf8, 0xf8, 0x52, 0x4e, 0x4a, 0x44, 0x40, 0x38, 0x00, 0x00, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05, -0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0xe1, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x93, 0x43, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -void firmware_start(void) { - // For SDK 1.5.2, either address has shifted and not mirrored in - // eagle.rom.addr.v6.ld, or extra initial member was added. - SpiFlashChip *flash = (SpiFlashChip*)(&flashchip + 4); - - char buf[128]; - SPIRead(flash->chip_size - 4 * 0x1000, buf, sizeof(buf)); - /*for (int i = 0; i < sizeof(buf); i++) { - static char hexf[] = "%x "; - ets_printf(hexf, buf[i]); - }*/ - - bool inited = false; - for (int i = 0; i < sizeof(buf); i++) { - if (buf[i] != 0xff) { - inited = true; - break; - } - } - - if (!inited) { - static char msg[] = "Writing init data\n"; - ets_printf(msg); - SPIRead((uint32_t)&default_init_data - 0x40200000, buf, sizeof(buf)); - SPIWrite(flash->chip_size - 4 * 0x1000, buf, sizeof(buf)); - } - - asm("j call_user_start"); -} diff --git a/ports/esp8266/esp_mphal.c b/ports/esp8266/esp_mphal.c deleted file mode 100644 index 93ebc450a3928..0000000000000 --- a/ports/esp8266/esp_mphal.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "ets_sys.h" -#include "etshal.h" -#include "espuart.h" -#include "esp_mphal.h" -#include "user_interface.h" -#include "ets_alt_task.h" -#include "py/runtime.h" -#include "extmod/misc.h" -#include "lib/utils/pyexec.h" - -STATIC byte input_buf_array[256]; -ringbuf_t input_buf = {input_buf_array, sizeof(input_buf_array)}; -void mp_hal_debug_tx_strn_cooked(void *env, const char *str, uint32_t len); -const mp_print_t mp_debug_print = {NULL, mp_hal_debug_tx_strn_cooked}; - -void mp_hal_init(void) { - //ets_wdt_disable(); // it's a pain while developing - mp_hal_rtc_init(); - uart_init(UART_BIT_RATE_115200, UART_BIT_RATE_115200); -} - -void mp_hal_delay_us(uint32_t us) { - uint32_t start = system_get_time(); - while (system_get_time() - start < us) { - ets_event_poll(); - } -} - -uint32_t mp_hal_get_cpu_freq(void) { - return system_get_cpu_freq() * 1000000; -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - int c = ringbuf_get(&input_buf); - if (c != -1) { - return c; - } - #if 0 - // Idles CPU but need more testing before enabling - if (!ets_loop_iter()) { - asm("waiti 0"); - } - #else - mp_hal_delay_us(1); - #endif - } -} - -#if 0 -void mp_hal_debug_str(const char *str) { - while (*str) { - uart_tx_one_char(UART0, *str++); - } - uart_flush(UART0); -} -#endif - -void mp_hal_stdout_tx_str(const char *str) { - const char *last = str; - while (*str) { - uart_tx_one_char(UART0, *str++); - } - mp_uos_dupterm_tx_strn(last, str - last); -} - -void mp_hal_stdout_tx_strn(const char *str, uint32_t len) { - const char *last = str; - while (len--) { - uart_tx_one_char(UART0, *str++); - } - mp_uos_dupterm_tx_strn(last, str - last); -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, uint32_t len) { - const char *last = str; - while (len--) { - if (*str == '\n') { - if (str > last) { - mp_uos_dupterm_tx_strn(last, str - last); - } - uart_tx_one_char(UART0, '\r'); - uart_tx_one_char(UART0, '\n'); - mp_uos_dupterm_tx_strn("\r\n", 2); - ++str; - last = str; - } else { - uart_tx_one_char(UART0, *str++); - } - } - if (str > last) { - mp_uos_dupterm_tx_strn(last, str - last); - } -} - -void mp_hal_debug_tx_strn_cooked(void *env, const char *str, uint32_t len) { - (void)env; - while (len--) { - if (*str == '\n') { - uart_tx_one_char(UART0, '\r'); - } - uart_tx_one_char(UART0, *str++); - } -} - -uint32_t mp_hal_ticks_ms(void) { - return ((uint64_t)system_time_high_word << 32 | (uint64_t)system_get_time()) / 1000; -} - -uint32_t mp_hal_ticks_us(void) { - return system_get_time(); -} - -void mp_hal_delay_ms(uint32_t delay) { - mp_hal_delay_us(delay * 1000); -} - -void ets_event_poll(void) { - ets_loop_iter(); - mp_handle_pending(); -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("assert:%s:%d:%s: %s\n", file, line, func, expr); - nlr_raise(mp_obj_new_exception_msg(&mp_type_AssertionError, - "C-level assert")); -} - -void mp_hal_signal_input(void) { - #if MICROPY_REPL_EVENT_DRIVEN - system_os_post(UART_TASK_ID, 0, 0); - #endif -} - -STATIC void dupterm_task_handler(os_event_t *evt) { - static byte lock; - if (lock) { - return; - } - lock = 1; - while (1) { - int c = mp_uos_dupterm_rx_chr(); - if (c < 0) { - break; - } - ringbuf_put(&input_buf, c); - } - mp_hal_signal_input(); - lock = 0; -} - -STATIC os_event_t dupterm_evt_queue[4]; - -void dupterm_task_init() { - system_os_task(dupterm_task_handler, DUPTERM_TASK_ID, dupterm_evt_queue, MP_ARRAY_SIZE(dupterm_evt_queue)); -} - -void mp_hal_signal_dupterm_input(void) { - system_os_post(DUPTERM_TASK_ID, 0, 0); -} - -// Get pointer to esf_buf bookkeeping structure -void *ets_get_esf_buf_ctlblk(void) { - // Get literal ptr before start of esf_rx_buf_alloc func - extern void *esf_rx_buf_alloc(); - return ((void**)esf_rx_buf_alloc)[-1]; -} - -// Get number of esf_buf free buffers of given type, as encoded by index -// idx 0 corresponds to buf types 1, 2; 1 - 4; 2 - 5; 3 - 7; 4 - 8 -// Only following buf types appear to be used: -// 1 - tx buffer, 5 - management frame tx buffer; 8 - rx buffer -int ets_esf_free_bufs(int idx) { - uint32_t *p = ets_get_esf_buf_ctlblk(); - uint32_t *b = (uint32_t*)p[idx]; - int cnt = 0; - while (b) { - b = (uint32_t*)b[0x20 / 4]; - cnt++; - } - return cnt; -} - -extern int mp_stream_errno; -int *__errno() { - return &mp_stream_errno; -} diff --git a/ports/esp8266/esp_mphal.h b/ports/esp8266/esp_mphal.h deleted file mode 100644 index 194e56f64939e..0000000000000 --- a/ports/esp8266/esp_mphal.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/ringbuf.h" -#include "lib/utils/interrupt_char.h" -#include "xtirq.h" - -void mp_keyboard_interrupt(void); - -struct _mp_print_t; -// Structure for UART-only output via mp_printf() -extern const struct _mp_print_t mp_debug_print; - -extern ringbuf_t input_buf; -// Call this after putting data to input_buf -void mp_hal_signal_input(void); -// Call this when data is available in dupterm object -void mp_hal_signal_dupterm_input(void); - -void mp_hal_init(void); -void mp_hal_rtc_init(void); - -uint32_t mp_hal_ticks_us(void); -__attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) { - uint32_t ccount; - __asm__ __volatile__("rsr %0,ccount":"=a" (ccount)); - return ccount; -} - -void mp_hal_delay_us(uint32_t); -void mp_hal_set_interrupt_char(int c); -uint32_t mp_hal_get_cpu_freq(void); - -#define UART_TASK_ID 0 -#define DUPTERM_TASK_ID 1 -void uart_task_init(); -void dupterm_task_init(); - -void ets_event_poll(void); -#define ETS_POLL_WHILE(cond) { while (cond) ets_event_poll(); } - -// needed for machine.I2C -#include "osapi.h" -#define mp_hal_delay_us_fast(us) os_delay_us(us) - -#define mp_hal_quiet_timing_enter() disable_irq() -#define mp_hal_quiet_timing_exit(irq_state) enable_irq(irq_state) - -// C-level pin HAL -#include "etshal.h" -#include "gpio.h" -#include "modmachine.h" -#define MP_HAL_PIN_FMT "%u" -#define mp_hal_pin_obj_t uint32_t -#define mp_hal_get_pin_obj(o) mp_obj_get_pin(o) -#define mp_hal_pin_name(p) (p) -void mp_hal_pin_input(mp_hal_pin_obj_t pin); -void mp_hal_pin_output(mp_hal_pin_obj_t pin); -void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin); -#define mp_hal_pin_od_low(p) do { \ - if ((p) == 16) { WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); } \ - else { gpio_output_set(0, 1 << (p), 1 << (p), 0); } \ - } while (0) -#define mp_hal_pin_od_high(p) do { \ - if ((p) == 16) { WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); } \ - else { gpio_output_set(1 << (p), 0, 1 << (p), 0); } \ - } while (0) -#define mp_hal_pin_read(p) pin_get(p) -#define mp_hal_pin_write(p, v) pin_set((p), (v)) - -void *ets_get_esf_buf_ctlblk(void); -int ets_esf_free_bufs(int idx); diff --git a/ports/esp8266/espneopixel.c b/ports/esp8266/espneopixel.c deleted file mode 100644 index f3827283da331..0000000000000 --- a/ports/esp8266/espneopixel.c +++ /dev/null @@ -1,56 +0,0 @@ -// Original version from https://github.com/adafruit/Adafruit_NeoPixel -// Modifications by dpgeorge to support auto-CPU-frequency detection - -// This is a mash-up of the Due show() code + insights from Michael Miller's -// ESP8266 work for the NeoPixelBus library: github.com/Makuna/NeoPixelBus -// Needs to be a separate .c file to enforce ICACHE_RAM_ATTR execution. - -#include "py/mpconfig.h" -#if MICROPY_ESP8266_NEOPIXEL - -#include "c_types.h" -#include "eagle_soc.h" -#include "user_interface.h" -#include "espneopixel.h" -#include "esp_mphal.h" - -#define NEO_KHZ400 (1) - -void /*ICACHE_RAM_ATTR*/ esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes) { - - uint8_t *p, *end, pix, mask; - uint32_t t, time0, time1, period, c, startTime, pinMask; - - pinMask = 1 << pin; - p = pixels; - end = p + numBytes; - pix = *p++; - mask = 0x80; - startTime = 0; - - uint32_t fcpu = system_get_cpu_freq() * 1000000; - - - time0 = fcpu / 2857143; // 0.35us - time1 = fcpu / 1250000; // 0.8us - period = fcpu / 800000; // 1.25us per bit - - uint32_t irq_state = mp_hal_quiet_timing_enter(); - for(t = time0;; t = time0) { - if(pix & mask) t = time1; // Bit high duration - while(((c = mp_hal_ticks_cpu()) - startTime) < period); // Wait for bit start - GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, pinMask); // Set high - startTime = c; // Save start time - while(((c = mp_hal_ticks_cpu()) - startTime) < t); // Wait high duration - GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, pinMask); // Set low - if(!(mask >>= 1)) { // Next bit/byte - if(p >= end) break; - pix = *p++; - mask = 0x80; - } - } - while((mp_hal_ticks_cpu() - startTime) < period); // Wait for last bit - mp_hal_quiet_timing_exit(irq_state); -} - -#endif // MICROPY_ESP8266_NEOPIXEL diff --git a/ports/esp8266/espneopixel.h b/ports/esp8266/espneopixel.h deleted file mode 100644 index 6743b3b97ff55..0000000000000 --- a/ports/esp8266/espneopixel.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H -#define MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H - -void esp_neopixel_write(uint8_t pin, uint8_t *pixels, uint32_t numBytes); - -#endif // MICROPY_INCLUDED_ESP8266_ESPNEOPIXEL_H diff --git a/ports/esp8266/esppwm.c b/ports/esp8266/esppwm.c deleted file mode 100644 index f1d7060dfe1bf..0000000000000 --- a/ports/esp8266/esppwm.c +++ /dev/null @@ -1,428 +0,0 @@ -/****************************************************************************** - * Copyright 2013-2014 Espressif Systems (Wuxi) - * - * FileName: pwm.c - * - * Description: pwm driver - * - * Modification history: - * 2014/5/1, v1.0 create this file. - * 2016/3/2: Modifications by dpgeorge to suit MicroPython -*******************************************************************************/ -#include -#include - -#include "etshal.h" -#include "os_type.h" -#include "gpio.h" - -#include "esppwm.h" - -#include "py/mpprint.h" -#define PWM_DBG(...) -//#define PWM_DBG(...) mp_printf(&mp_plat_print, __VA_ARGS__) - -#define ICACHE_RAM_ATTR // __attribute__((section(".text"))) - -#define PWM_CHANNEL 8 -#define PWM_DEPTH 1023 -#define PWM_FREQ_MAX 1000 -#define PWM_1S 1000000 - -struct pwm_single_param { - uint16_t gpio_set; - uint16_t gpio_clear; - uint32_t h_time; -}; - -struct pwm_param { - uint32_t period; - uint16_t freq; - uint16_t duty[PWM_CHANNEL]; -}; - -STATIC const uint8_t pin_num[PWM_CHANNEL] = {0, 2, 4, 5, 12, 13, 14, 15}; - -STATIC struct pwm_single_param pwm_single_toggle[2][PWM_CHANNEL + 1]; -STATIC struct pwm_single_param *pwm_single; - -STATIC struct pwm_param pwm; - -STATIC int8_t pwm_out_io_num[PWM_CHANNEL] = {-1, -1, -1, -1, -1, -1, -1, -1}; - -STATIC uint8_t pwm_channel_toggle[2]; -STATIC uint8_t *pwm_channel; -STATIC uint8_t pwm_toggle = 1; -STATIC uint8_t pwm_timer_down = 1; -STATIC uint8_t pwm_current_channel = 0; -STATIC uint16_t pwm_gpio = 0; -STATIC uint8_t pwm_channel_num = 0; - -//XXX: 0xffffffff/(80000000/16)=35A -#define US_TO_RTC_TIMER_TICKS(t) \ - ((t) ? \ - (((t) > 0x35A) ? \ - (((t)>>2) * ((APB_CLK_FREQ>>4)/250000) + ((t)&0x3) * ((APB_CLK_FREQ>>4)/1000000)) : \ - (((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \ - 0) - -//FRC1 -#define FRC1_ENABLE_TIMER BIT7 - -typedef enum { - DIVDED_BY_1 = 0, - DIVDED_BY_16 = 4, - DIVDED_BY_256 = 8, -} TIMER_PREDIVED_MODE; - -typedef enum { - TM_LEVEL_INT = 1, - TM_EDGE_INT = 0, -} TIMER_INT_MODE; - -STATIC void ICACHE_FLASH_ATTR -pwm_insert_sort(struct pwm_single_param pwm[], uint8 n) -{ - uint8 i; - - for (i = 1; i < n; i++) { - if (pwm[i].h_time < pwm[i - 1].h_time) { - int8 j = i - 1; - struct pwm_single_param tmp; - - memcpy(&tmp, &pwm[i], sizeof(struct pwm_single_param)); - memcpy(&pwm[i], &pwm[i - 1], sizeof(struct pwm_single_param)); - - while (tmp.h_time < pwm[j].h_time) { - memcpy(&pwm[j + 1], &pwm[j], sizeof(struct pwm_single_param)); - j--; - if (j < 0) { - break; - } - } - - memcpy(&pwm[j + 1], &tmp, sizeof(struct pwm_single_param)); - } - } -} - -STATIC volatile uint8 critical = 0; - -#define LOCK_PWM(c) do { \ - while( (c)==1 ); \ - (c) = 1; \ -} while (0) - -#define UNLOCK_PWM(c) do { \ - (c) = 0; \ -} while (0) - -void ICACHE_FLASH_ATTR -pwm_start(void) -{ - uint8 i, j; - PWM_DBG("--Function pwm_start() is called\n"); - PWM_DBG("pwm_gpio:%x,pwm_channel_num:%d\n",pwm_gpio,pwm_channel_num); - PWM_DBG("pwm_out_io_num[0]:%d,[1]:%d,[2]:%d\n",pwm_out_io_num[0],pwm_out_io_num[1],pwm_out_io_num[2]); - PWM_DBG("pwm.period:%d,pwm.duty[0]:%d,[1]:%d,[2]:%d\n",pwm.period,pwm.duty[0],pwm.duty[1],pwm.duty[2]); - - LOCK_PWM(critical); // enter critical - - struct pwm_single_param *local_single = pwm_single_toggle[pwm_toggle ^ 0x01]; - uint8 *local_channel = &pwm_channel_toggle[pwm_toggle ^ 0x01]; - - // step 1: init PWM_CHANNEL+1 channels param - for (i = 0; i < pwm_channel_num; i++) { - uint32 us = pwm.period * pwm.duty[i] / PWM_DEPTH; - local_single[i].h_time = US_TO_RTC_TIMER_TICKS(us); - PWM_DBG("i:%d us:%d ht:%d\n",i,us,local_single[i].h_time); - local_single[i].gpio_set = 0; - local_single[i].gpio_clear = 1 << pin_num[pwm_out_io_num[i]]; - } - - local_single[pwm_channel_num].h_time = US_TO_RTC_TIMER_TICKS(pwm.period); - local_single[pwm_channel_num].gpio_set = pwm_gpio; - local_single[pwm_channel_num].gpio_clear = 0; - PWM_DBG("i:%d period:%d ht:%d\n",pwm_channel_num,pwm.period,local_single[pwm_channel_num].h_time); - // step 2: sort, small to big - pwm_insert_sort(local_single, pwm_channel_num + 1); - - *local_channel = pwm_channel_num + 1; - PWM_DBG("1channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); - // step 3: combine same duty channels - for (i = pwm_channel_num; i > 0; i--) { - if (local_single[i].h_time == local_single[i - 1].h_time) { - local_single[i - 1].gpio_set |= local_single[i].gpio_set; - local_single[i - 1].gpio_clear |= local_single[i].gpio_clear; - - for (j = i + 1; j < *local_channel; j++) { - memcpy(&local_single[j - 1], &local_single[j], sizeof(struct pwm_single_param)); - } - - (*local_channel)--; - } - } - PWM_DBG("2channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); - // step 4: cacl delt time - for (i = *local_channel - 1; i > 0; i--) { - local_single[i].h_time -= local_single[i - 1].h_time; - } - - // step 5: last channel needs to clean - local_single[*local_channel-1].gpio_clear = 0; - - // step 6: if first channel duty is 0, remove it - if (local_single[0].h_time == 0) { - local_single[*local_channel - 1].gpio_set &= ~local_single[0].gpio_clear; - local_single[*local_channel - 1].gpio_clear |= local_single[0].gpio_clear; - - for (i = 1; i < *local_channel; i++) { - memcpy(&local_single[i - 1], &local_single[i], sizeof(struct pwm_single_param)); - } - - (*local_channel)--; - } - - // if timer is down, need to set gpio and start timer - if (pwm_timer_down == 1) { - pwm_channel = local_channel; - pwm_single = local_single; - // start - gpio_output_set(local_single[0].gpio_set, local_single[0].gpio_clear, pwm_gpio, 0); - - // yeah, if all channels' duty is 0 or 255, don't need to start timer, otherwise start... - if (*local_channel != 1) { - pwm_timer_down = 0; - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, local_single[0].h_time); - } - } - - if (pwm_toggle == 1) { - pwm_toggle = 0; - } else { - pwm_toggle = 1; - } - - UNLOCK_PWM(critical); // leave critical - PWM_DBG("3channel:%d,single[0]:%d,[1]:%d,[2]:%d,[3]:%d\n",*local_channel,local_single[0].h_time,local_single[1].h_time,local_single[2].h_time,local_single[3].h_time); -} - -/****************************************************************************** - * FunctionName : pwm_set_duty - * Description : set each channel's duty params - * Parameters : uint8 duty : 0 ~ PWM_DEPTH - * uint8 channel : channel index - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_set_duty(uint16 duty, uint8 channel) -{ - uint8 i; - for(i=0;i= PWM_DEPTH) { - pwm.duty[channel] = PWM_DEPTH; - } else { - pwm.duty[channel] = duty; - } - UNLOCK_PWM(critical); // leave critical -} - -/****************************************************************************** - * FunctionName : pwm_set_freq - * Description : set pwm frequency - * Parameters : uint16 freq : 100hz typically - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_set_freq(uint16 freq, uint8 channel) -{ - LOCK_PWM(critical); // enter critical - if (freq > PWM_FREQ_MAX) { - pwm.freq = PWM_FREQ_MAX; - } else if (freq < 1) { - pwm.freq = 1; - } else { - pwm.freq = freq; - } - - pwm.period = PWM_1S / pwm.freq; - UNLOCK_PWM(critical); // leave critical -} - -/****************************************************************************** - * FunctionName : pwm_get_duty - * Description : get duty of each channel - * Parameters : uint8 channel : channel index - * Returns : NONE -*******************************************************************************/ -uint16 ICACHE_FLASH_ATTR -pwm_get_duty(uint8 channel) -{ - uint8 i; - for(i=0;i= (*pwm_channel - 1)) { // *pwm_channel may change outside - pwm_single = pwm_single_toggle[local_toggle]; - pwm_channel = &pwm_channel_toggle[local_toggle]; - - gpio_output_set(pwm_single[*pwm_channel - 1].gpio_set, - pwm_single[*pwm_channel - 1].gpio_clear, - pwm_gpio, - 0); - - pwm_current_channel = 0; - - if (*pwm_channel != 1) { - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, pwm_single[pwm_current_channel].h_time); - } else { - pwm_timer_down = 1; - } - } else { - gpio_output_set(pwm_single[pwm_current_channel].gpio_set, - pwm_single[pwm_current_channel].gpio_clear, - pwm_gpio, 0); - - pwm_current_channel++; - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, pwm_single[pwm_current_channel].h_time); - } -} - -/****************************************************************************** - * FunctionName : pwm_init - * Description : pwm gpio, params and timer initialization - * Parameters : uint16 freq : pwm freq param - * uint16 *duty : each channel's duty - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -pwm_init(void) -{ - uint8 i; - - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, //FRC2_AUTO_RELOAD| - DIVDED_BY_16 - | FRC1_ENABLE_TIMER - | TM_EDGE_INT); - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, 0); - - for (i = 0; i < PWM_CHANNEL; i++) { - pwm_gpio = 0; - pwm.duty[i] = 0; - } - - pwm_set_freq(500, 0); - pwm_start(); - - ETS_FRC_TIMER1_INTR_ATTACH(pwm_tim1_intr_handler, NULL); - TM1_EDGE_INT_ENABLE(); - ETS_FRC1_INTR_ENABLE(); -} - -int ICACHE_FLASH_ATTR -pwm_add(uint8_t pin_id, uint32_t pin_mux, uint32_t pin_func){ - PWM_DBG("--Function pwm_add() is called. channel:%d\n", channel); - PWM_DBG("pwm_gpio:%x,pwm_channel_num:%d\n",pwm_gpio,pwm_channel_num); - PWM_DBG("pwm_out_io_num[0]:%d,[1]:%d,[2]:%d\n",pwm_out_io_num[0],pwm_out_io_num[1],pwm_out_io_num[2]); - PWM_DBG("pwm.duty[0]:%d,[1]:%d,[2]:%d\n",pwm.duty[0],pwm.duty[1],pwm.duty[2]); - int channel = -1; - for (int i = 0; i < PWM_CHANNEL; ++i) { - if (pin_num[i] == pin_id) { - channel = i; - break; - } - } - if (channel == -1) { - return -1; - } - uint8 i; - for(i=0;i -#include - -void pwm_init(void); -void pwm_start(void); - -void pwm_set_duty(uint16_t duty, uint8_t channel); -uint16_t pwm_get_duty(uint8_t channel); -void pwm_set_freq(uint16_t freq, uint8_t channel); -uint16_t pwm_get_freq(uint8_t channel); -int pwm_add(uint8_t pin_id, uint32_t pin_mux, uint32_t pin_func); -bool pwm_delete(uint8_t channel); - -#endif // MICROPY_INCLUDED_ESP8266_ESPPWM_H diff --git a/ports/esp8266/espuart.c b/ports/esp8266/espuart.c deleted file mode 100644 index dc4d1e611a906..0000000000000 --- a/ports/esp8266/espuart.c +++ /dev/null @@ -1,296 +0,0 @@ -/****************************************************************************** - * Copyright 2013-2014 Espressif Systems (Wuxi) - * - * FileName: uart.c - * - * Description: Two UART mode configration and interrupt handler. - * Check your hardware connection while use this mode. - * - * Modification history: - * 2014/3/12, v1.0 create this file. -*******************************************************************************/ -#include "ets_sys.h" -#include "osapi.h" -#include "espuart.h" -#include "osapi.h" -#include "uart_register.h" -#include "etshal.h" -#include "c_types.h" -#include "user_interface.h" -#include "esp_mphal.h" - -// seems that this is missing in the Espressif SDK -#define FUNC_U0RXD 0 - -#define UART_REPL UART0 - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -// the uart to which OS messages go; -1 to disable -static int uart_os = UART_OS; - -#if MICROPY_REPL_EVENT_DRIVEN -static os_event_t uart_evt_queue[16]; -#endif - -static void uart0_rx_intr_handler(void *para); - -void soft_reset(void); -void mp_keyboard_interrupt(void); - -/****************************************************************************** - * FunctionName : uart_config - * Description : Internal used function - * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled - * UART1 just used for debug output - * Parameters : uart_no, use UART0 or UART1 defined ahead - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) { - if (uart_no == UART1) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); - } else { - ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD); - } - - uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); - - WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity - | UartDev.parity - | (UartDev.stop_bits << UART_STOP_BIT_NUM_S) - | (UartDev.data_bits << UART_BIT_NUM_S)); - - // clear rx and tx fifo,not ready - SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - - if (uart_no == UART0) { - // set rx fifo trigger - WRITE_PERI_REG(UART_CONF1(uart_no), - ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | - ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | - UART_RX_FLOW_EN | - (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | - UART_RX_TOUT_EN); - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA | - UART_FRM_ERR_INT_ENA); - } else { - WRITE_PERI_REG(UART_CONF1(uart_no), - ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); - } - - // clear all interrupt - WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); - // enable rx_interrupt - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); -} - -/****************************************************************************** - * FunctionName : uart1_tx_one_char - * Description : Internal used function - * Use uart1 interface to transfer one char - * Parameters : uint8 TxChar - character to tx - * Returns : OK -*******************************************************************************/ -void uart_tx_one_char(uint8 uart, uint8 TxChar) { - while (true) { - uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { - break; - } - } - WRITE_PERI_REG(UART_FIFO(uart), TxChar); -} - -void uart_flush(uint8 uart) { - while (true) { - uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0) { - break; - } - } -} - -/****************************************************************************** - * FunctionName : uart1_write_char - * Description : Internal used function - * Do some special deal while tx char is '\r' or '\n' - * Parameters : char c - character to tx - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR -uart_os_write_char(char c) { - if (uart_os == -1) { - return; - } - if (c == '\n') { - uart_tx_one_char(uart_os, '\r'); - uart_tx_one_char(uart_os, '\n'); - } else if (c == '\r') { - } else { - uart_tx_one_char(uart_os, c); - } -} - -void ICACHE_FLASH_ATTR -uart_os_config(int uart) { - uart_os = uart; -} - -/****************************************************************************** - * FunctionName : uart0_rx_intr_handler - * Description : Internal used function - * UART0 interrupt handler, add self handle code inside - * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg - * Returns : NONE -*******************************************************************************/ - -static void uart0_rx_intr_handler(void *para) { - /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents - * uart1 and uart0 respectively - */ - - uint8 uart_no = UART_REPL; - - if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) { - // frame error - WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); - } - - if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) { - // fifo full - goto read_chars; - } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) { - read_chars: - ETS_UART_INTR_DISABLE(); - - while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { - uint8 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; - if (RcvChar == mp_interrupt_char) { - mp_keyboard_interrupt(); - } else { - ringbuf_put(&input_buf, RcvChar); - } - } - - mp_hal_signal_input(); - - // Clear pending FIFO interrupts - WRITE_PERI_REG(UART_INT_CLR(UART_REPL), UART_RXFIFO_TOUT_INT_CLR | UART_RXFIFO_FULL_INT_ST); - ETS_UART_INTR_ENABLE(); - } -} - -// Waits at most timeout microseconds for at least 1 char to become ready for reading. -// Returns true if something available, false if not. -bool uart_rx_wait(uint32_t timeout_us) { - uint32_t start = system_get_time(); - for (;;) { - if (input_buf.iget != input_buf.iput) { - return true; // have at least 1 char ready for reading - } - if (system_get_time() - start >= timeout_us) { - return false; // timeout - } - ets_event_poll(); - } -} - -int uart_rx_any(uint8 uart) { - if (input_buf.iget != input_buf.iput) { - return true; // have at least 1 char ready for reading - } - return false; -} - -int uart_tx_any_room(uint8 uart) { - uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); - if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) >= 126) { - return false; - } - return true; -} - -// Returns char from the input buffer, else -1 if buffer is empty. -int uart_rx_char(void) { - return ringbuf_get(&input_buf); -} - -int uart_rx_one_char(uint8 uart_no) { - if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { - return READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; - } - return -1; -} - -/****************************************************************************** - * FunctionName : uart_init - * Description : user interface for init uart - * Parameters : UartBautRate uart0_br - uart0 bautrate - * UartBautRate uart1_br - uart1 bautrate - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) { - // rom use 74880 baut_rate, here reinitialize - UartDev.baut_rate = uart0_br; - uart_config(UART0); - UartDev.baut_rate = uart1_br; - uart_config(UART1); - ETS_UART_INTR_ENABLE(); - - // install handler for "os" messages - os_install_putc1((void *)uart_os_write_char); -} - -void ICACHE_FLASH_ATTR uart_reattach() { - uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880); -} - -void ICACHE_FLASH_ATTR uart_setup(uint8 uart) { - ETS_UART_INTR_DISABLE(); - uart_config(uart); - ETS_UART_INTR_ENABLE(); -} - -// Task-based UART interface - -#include "py/obj.h" -#include "lib/utils/pyexec.h" - -#if MICROPY_REPL_EVENT_DRIVEN -void uart_task_handler(os_event_t *evt) { - if (pyexec_repl_active) { - // TODO: Just returning here isn't exactly right. - // What really should be done is something like - // enquing delayed event to itself, for another - // chance to feed data to REPL. Otherwise, there - // can be situation when buffer has bunch of data, - // and sits unprocessed, because we consumed all - // processing signals like this. - return; - } - - int c, ret = 0; - while ((c = ringbuf_get(&input_buf)) >= 0) { - if (c == interrupt_char) { - mp_keyboard_interrupt(); - } - ret = pyexec_event_repl_process_char(c); - if (ret & PYEXEC_FORCED_EXIT) { - break; - } - } - - if (ret & PYEXEC_FORCED_EXIT) { - soft_reset(); - } -} - -void uart_task_init() { - system_os_task(uart_task_handler, UART_TASK_ID, uart_evt_queue, sizeof(uart_evt_queue) / sizeof(*uart_evt_queue)); -} -#endif diff --git a/ports/esp8266/espuart.h b/ports/esp8266/espuart.h deleted file mode 100644 index 684689a0ecf82..0000000000000 --- a/ports/esp8266/espuart.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_UART_H -#define MICROPY_INCLUDED_ESP8266_UART_H - -#include - -#define UART0 (0) -#define UART1 (1) - -typedef enum { - UART_FIVE_BITS = 0x0, - UART_SIX_BITS = 0x1, - UART_SEVEN_BITS = 0x2, - UART_EIGHT_BITS = 0x3 -} UartBitsNum4Char; - -typedef enum { - UART_ONE_STOP_BIT = 0x1, - UART_ONE_HALF_STOP_BIT = 0x2, - UART_TWO_STOP_BIT = 0x3 -} UartStopBitsNum; - -typedef enum { - UART_NONE_BITS = 0, - UART_ODD_BITS = BIT0, - UART_EVEN_BITS = 0 -} UartParityMode; - -typedef enum { - UART_STICK_PARITY_DIS = 0, - UART_STICK_PARITY_EN = BIT1 -} UartExistParity; - -typedef enum { - UART_BIT_RATE_9600 = 9600, - UART_BIT_RATE_19200 = 19200, - UART_BIT_RATE_38400 = 38400, - UART_BIT_RATE_57600 = 57600, - UART_BIT_RATE_74880 = 74880, - UART_BIT_RATE_115200 = 115200, - UART_BIT_RATE_230400 = 230400, - UART_BIT_RATE_256000 = 256000, - UART_BIT_RATE_460800 = 460800, - UART_BIT_RATE_921600 = 921600 -} UartBautRate; - -typedef enum { - UART_NONE_CTRL, - UART_HARDWARE_CTRL, - UART_XON_XOFF_CTRL -} UartFlowCtrl; - -typedef enum { - UART_EMPTY, - UART_UNDER_WRITE, - UART_WRITE_OVER -} RcvMsgBuffState; - -typedef struct { - uint32 RcvBuffSize; - uint8 *pRcvMsgBuff; - uint8 *pWritePos; - uint8 *pReadPos; - uint8 TrigLvl; //JLU: may need to pad - RcvMsgBuffState BuffState; -} RcvMsgBuff; - -typedef struct { - uint32 TrxBuffSize; - uint8 *pTrxBuff; -} TrxMsgBuff; - -typedef enum { - UART_BAUD_RATE_DET, - UART_WAIT_SYNC_FRM, - UART_SRCH_MSG_HEAD, - UART_RCV_MSG_BODY, - UART_RCV_ESC_CHAR, -} RcvMsgState; - -typedef struct { - UartBautRate baut_rate; - UartBitsNum4Char data_bits; - UartExistParity exist_parity; - UartParityMode parity; // chip size in byte - UartStopBitsNum stop_bits; - UartFlowCtrl flow_ctrl; - RcvMsgBuff rcv_buff; - TrxMsgBuff trx_buff; - RcvMsgState rcv_state; - int received; - int buff_uart_no; //indicate which uart use tx/rx buffer -} UartDevice; - -void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); -int uart0_rx(void); -bool uart_rx_wait(uint32_t timeout_us); -int uart_rx_char(void); -void uart_tx_one_char(uint8 uart, uint8 TxChar); -void uart_flush(uint8 uart); -void uart_os_config(int uart); -void uart_setup(uint8 uart); -// check status of rx/tx -int uart_rx_any(uint8 uart); -int uart_tx_any_room(uint8 uart); - -#endif // MICROPY_INCLUDED_ESP8266_UART_H diff --git a/ports/esp8266/ets_alt_task.c b/ports/esp8266/ets_alt_task.c deleted file mode 100644 index ff7dba186907d..0000000000000 --- a/ports/esp8266/ets_alt_task.c +++ /dev/null @@ -1,214 +0,0 @@ -#include -#include "osapi.h" -#include "os_type.h" -#include "ets_sys.h" -#include -#include "etshal.h" -#include "user_interface.h" -#include "ets_alt_task.h" - -// Use standard ets_task or alternative impl -#define USE_ETS_TASK 0 - -#define MP_ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) - -struct task_entry { - os_event_t *queue; - os_task_t task; - uint8_t qlen; - uint8_t prio; - int8_t i_get; - int8_t i_put; -}; - -static void (*idle_cb)(void *); -static void *idle_arg; - -#if ESP_SDK_VERSION >= 010500 -# define FIRST_PRIO 0 -#else -# define FIRST_PRIO 0x14 -#endif -#define LAST_PRIO 0x20 -#define PRIO2ID(prio) ((prio) - FIRST_PRIO) - -volatile struct task_entry emu_tasks[PRIO2ID(LAST_PRIO) + 1]; - -static inline int prio2id(uint8_t prio) { - int id = PRIO2ID(prio); - if (id < 0 || id >= MP_ARRAY_SIZE(emu_tasks)) { - printf("task prio out of range: %d\n", prio); - while (1); - } - return id; -} - -#if DEBUG -void dump_task(int prio, volatile struct task_entry *t) { - printf("q for task %d: queue: %p, get ptr: %d, put ptr: %d, qlen: %d\n", - prio, t->queue, t->i_get, t->i_put, t->qlen); -} - -void dump_tasks(void) { - for (int i = 0; i < MP_ARRAY_SIZE(emu_tasks); i++) { - if (emu_tasks[i].qlen) { - dump_task(i + FIRST_PRIO, &emu_tasks[i]); - } - } - printf("====\n"); -} -#endif - -bool ets_task(os_task_t task, uint8 prio, os_event_t *queue, uint8 qlen) { - static unsigned cnt; - printf("#%d ets_task(%p, %d, %p, %d)\n", cnt++, task, prio, queue, qlen); -#if USE_ETS_TASK - return _ets_task(task, prio, queue, qlen); -#else - int id = prio2id(prio); - emu_tasks[id].task = task; - emu_tasks[id].queue = queue; - emu_tasks[id].qlen = qlen; - emu_tasks[id].i_get = 0; - emu_tasks[id].i_put = 0; - return true; -#endif -} - -bool ets_post(uint8 prio, os_signal_t sig, os_param_t param) { -// static unsigned cnt; printf("#%d ets_post(%d, %x, %x)\n", cnt++, prio, sig, param); -#if USE_ETS_TASK - return _ets_post(prio, sig, param); -#else - ets_intr_lock(); - - const int id = prio2id(prio); - os_event_t *q = emu_tasks[id].queue; - if (emu_tasks[id].i_put == -1) { - // queue is full - printf("ets_post: task %d queue full\n", prio); - return 1; - } - q = &q[emu_tasks[id].i_put++]; - q->sig = sig; - q->par = param; - if (emu_tasks[id].i_put == emu_tasks[id].qlen) { - emu_tasks[id].i_put = 0; - } - if (emu_tasks[id].i_put == emu_tasks[id].i_get) { - // queue got full - emu_tasks[id].i_put = -1; - } - //printf("after ets_post: "); dump_task(prio, &emu_tasks[id]); - //dump_tasks(); - - ets_intr_unlock(); - - return 0; -#endif -} - -int ets_loop_iter_disable = 0; - -// to implement a 64-bit wide microsecond counter -static uint32_t system_time_prev = 0; -uint32_t system_time_high_word = 0; - -bool ets_loop_iter(void) { - if (ets_loop_iter_disable) { - return false; - } - - // handle overflow of system microsecond counter - ets_intr_lock(); - uint32_t system_time_cur = system_get_time(); - if (system_time_cur < system_time_prev) { - system_time_high_word += 1; // record overflow of low 32-bits - } - system_time_prev = system_time_cur; - ets_intr_unlock(); - - //static unsigned cnt; - bool progress = false; - for (volatile struct task_entry *t = emu_tasks; t < &emu_tasks[MP_ARRAY_SIZE(emu_tasks)]; t++) { - system_soft_wdt_feed(); - ets_intr_lock(); - //printf("etc_loop_iter: "); dump_task(t - emu_tasks + FIRST_PRIO, t); - if (t->i_get != t->i_put) { - progress = true; - //printf("#%d Calling task %d(%p) (%x, %x)\n", cnt++, - // t - emu_tasks + FIRST_PRIO, t->task, t->queue[t->i_get].sig, t->queue[t->i_get].par); - int idx = t->i_get; - if (t->i_put == -1) { - t->i_put = t->i_get; - } - if (++t->i_get == t->qlen) { - t->i_get = 0; - } - //ets_intr_unlock(); - t->task(&t->queue[idx]); - //ets_intr_lock(); - //printf("Done calling task %d\n", t - emu_tasks + FIRST_PRIO); - } - ets_intr_unlock(); - } - return progress; -} - -#if SDK_BELOW_1_1_1 -void my_timer_isr(void *arg) { -// uart0_write_char('+'); - ets_post(0x1f, 0, 0); -} - -// Timer init func is in ROM, and calls ets_task by relative addr directly in ROM -// so, we have to re-init task using our handler -void ets_timer_init() { - printf("ets_timer_init\n"); -// _ets_timer_init(); - ets_isr_attach(10, my_timer_isr, NULL); - SET_PERI_REG_MASK(0x3FF00004, 4); - ETS_INTR_ENABLE(10); - ets_task((os_task_t)0x40002E3C, 0x1f, (os_event_t*)0x3FFFDDC0, 4); - - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x30, 0); - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x28, 0x88); - WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + 0x30, 0); - printf("Installed timer ISR\n"); -} -#endif - -bool ets_run(void) { -#if USE_ETS_TASK - #if SDK_BELOW_1_1_1 - ets_isr_attach(10, my_timer_isr, NULL); - #endif - _ets_run(); -#else -// ets_timer_init(); - *(char*)0x3FFFC6FC = 0; - ets_intr_lock(); - printf("ets_alt_task: ets_run\n"); -#if DEBUG - dump_tasks(); -#endif - ets_intr_unlock(); - while (1) { - if (!ets_loop_iter()) { - //printf("idle\n"); - ets_intr_lock(); - if (idle_cb) { - idle_cb(idle_arg); - } - asm("waiti 0"); - ets_intr_unlock(); - } - } -#endif -} - -void ets_set_idle_cb(void (*handler)(void *), void *arg) { - //printf("ets_set_idle_cb(%p, %p)\n", handler, arg); - idle_cb = handler; - idle_arg = arg; -} diff --git a/ports/esp8266/ets_alt_task.h b/ports/esp8266/ets_alt_task.h deleted file mode 100644 index 62f0025a8900d..0000000000000 --- a/ports/esp8266/ets_alt_task.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H -#define MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H - -#include -#include - -extern int ets_loop_iter_disable; -extern uint32_t system_time_high_word; - -bool ets_loop_iter(void); - -#endif // MICROPY_INCLUDED_ESP8266_ETS_ALT_TASK_H diff --git a/ports/esp8266/etshal.h b/ports/esp8266/etshal.h deleted file mode 100644 index 34787779f9c0d..0000000000000 --- a/ports/esp8266/etshal.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_ETSHAL_H -#define MICROPY_INCLUDED_ESP8266_ETSHAL_H - -#include - -// see http://esp8266-re.foogod.com/wiki/Random_Number_Generator -#define WDEV_HWRNG ((volatile uint32_t*)0x3ff20e44) - -void ets_delay_us(); -void ets_intr_lock(void); -void ets_intr_unlock(void); -void ets_isr_mask(uint32_t mask); -void ets_isr_unmask(uint32_t mask); -void ets_isr_attach(int irq_no, void (*handler)(void *), void *arg); -void ets_install_putc1(); -void uart_div_modify(); -void ets_set_idle_cb(void (*handler)(void *), void *arg); - -void ets_timer_arm_new(os_timer_t *tim, uint32_t millis, bool repeat, bool is_milli_timer); -void ets_timer_setfn(os_timer_t *tim, ETSTimerFunc callback, void *cb_data); -void ets_timer_disarm(os_timer_t *tim); - -extern void ets_wdt_disable(void); -extern void wdt_feed(void); - -// Opaque structure -#ifndef MD5_CTX -typedef char MD5_CTX[88]; -#endif - -void MD5Init(MD5_CTX *context); -void MD5Update(MD5_CTX *context, const void *data, unsigned int len); -void MD5Final(unsigned char digest[16], MD5_CTX *context); - -// These prototypes are for recent SDKs with "malloc tracking" -void *pvPortMalloc(unsigned sz, const char *fname, int line); -void *pvPortZalloc(unsigned sz, const char *fname, int line); -void *pvPortRealloc(void *p, unsigned sz, const char *fname, int line); -void vPortFree(void *p, const char *fname, int line); - -uint32_t SPIRead(uint32_t offset, void *buf, uint32_t len); -uint32_t SPIWrite(uint32_t offset, const void *buf, uint32_t len); -uint32_t SPIEraseSector(int sector); - -#endif // MICROPY_INCLUDED_ESP8266_ETSHAL_H diff --git a/ports/esp8266/fatfs_port.c b/ports/esp8266/fatfs_port.c deleted file mode 100644 index a8865c817ea26..0000000000000 --- a/ports/esp8266/fatfs_port.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "modmachine.h" - -DWORD get_fattime(void) { - - // TODO: Optimize division (there's no HW division support on ESP8266, - // so it's expensive). - uint32_t secs = (uint32_t)(pyb_rtc_get_us_since_2000() / 1000000); - - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(secs, &tm); - - return (((DWORD)(tm.tm_year - 1980) << 25) | ((DWORD)tm.tm_mon << 21) | ((DWORD)tm.tm_mday << 16) | - ((DWORD)tm.tm_hour << 11) | ((DWORD)tm.tm_min << 5) | ((DWORD)tm.tm_sec >> 1)); -} diff --git a/ports/esp8266/gccollect.c b/ports/esp8266/gccollect.c deleted file mode 100644 index cd5d4932c53b1..0000000000000 --- a/ports/esp8266/gccollect.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "gccollect.h" - -// As we do not have control over the application entry point, there is no way -// to figure out the real stack base on runtime, so it needs to be hardcoded -#define STACK_END 0x40000000 - -mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -void gc_collect(void) { - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[8]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, (STACK_END - sp) / sizeof(uint32_t)); - - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - // trace any native code because it can contain pointers to the heap - esp_native_code_gc_collect(); - #endif - - // end the GC - gc_collect_end(); -} diff --git a/ports/esp8266/gccollect.h b/ports/esp8266/gccollect.h deleted file mode 100644 index 5735d8a39018b..0000000000000 --- a/ports/esp8266/gccollect.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ESP8266_GCCOLLECT_H -#define MICROPY_INCLUDED_ESP8266_GCCOLLECT_H - -extern uint32_t _text_start; -extern uint32_t _text_end; -extern uint32_t _irom0_text_start; -extern uint32_t _irom0_text_end; -extern uint32_t _data_start; -extern uint32_t _data_end; -extern uint32_t _rodata_start; -extern uint32_t _rodata_end; -extern uint32_t _bss_start; -extern uint32_t _bss_end; -extern uint32_t _heap_start; -extern uint32_t _heap_end; - -void gc_collect(void); -void esp_native_code_gc_collect(void); - -#endif // MICROPY_INCLUDED_ESP8266_GCCOLLECT_H diff --git a/ports/esp8266/gchelper.s b/ports/esp8266/gchelper.s deleted file mode 100644 index cf543be800582..0000000000000 --- a/ports/esp8266/gchelper.s +++ /dev/null @@ -1,22 +0,0 @@ - .file "gchelper.s" - .text - - .align 4 - .global gc_helper_get_regs_and_sp - .type gc_helper_get_regs_and_sp, @function -gc_helper_get_regs_and_sp: - # store regs into given array - s32i.n a8, a2, 0 - s32i.n a9, a2, 4 - s32i.n a10, a2, 8 - s32i.n a11, a2, 12 - s32i.n a12, a2, 16 - s32i.n a13, a2, 20 - s32i.n a14, a2, 24 - s32i.n a15, a2, 28 - - # return the sp - mov a2, a1 - ret.n - - .size gc_helper_get_regs_and_sp, .-gc_helper_get_regs_and_sp diff --git a/ports/esp8266/help.c b/ports/esp8266/help.c deleted file mode 100644 index 0a851f4c487c4..0000000000000 --- a/ports/esp8266/help.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char esp_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online docs please visit http://docs.micropython.org/en/latest/esp8266/ .\n" -"For diagnostic information to include in bug reports execute 'import port_diag'.\n" -"\n" -"Basic WiFi configuration:\n" -"\n" -"import network\n" -"sta_if = network.WLAN(network.STA_IF); sta_if.active(True)\n" -"sta_if.scan() # Scan for available access points\n" -"sta_if.connect(\"\", \"\") # Connect to an AP\n" -"sta_if.isconnected() # Check for successful connection\n" -"# Change name/password of ESP8266's AP:\n" -"ap_if = network.WLAN(network.AP_IF)\n" -"ap_if.config(essid=\"\", authmode=network.AUTH_WPA_WPA2_PSK, password=\"\")\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/esp8266/hspi.c b/ports/esp8266/hspi.c deleted file mode 100644 index 554a50460f85b..0000000000000 --- a/ports/esp8266/hspi.c +++ /dev/null @@ -1,331 +0,0 @@ -/* -* The MIT License (MIT) -* -* Copyright (c) 2015 David Ogilvy (MetalPhreak) -* Modified 2016 by Radomir Dopieralski -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all -* copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -*/ - -#include "hspi.h" - -/* -Wrapper to setup HSPI/SPI GPIO pins and default SPI clock - spi_no - SPI (0) or HSPI (1) -Not used in MicroPython. -*/ -void spi_init(uint8_t spi_no) { - spi_init_gpio(spi_no, SPI_CLK_USE_DIV); - spi_clock(spi_no, SPI_CLK_PREDIV, SPI_CLK_CNTDIV); - spi_tx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW); - - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD); - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE); -} - - -/* -Configures SPI mode parameters for clock edge and clock polarity. - spi_no - SPI (0) or HSPI (1) - spi_cpha - (0) Data is valid on clock leading edge - (1) Data is valid on clock trailing edge - spi_cpol - (0) Clock is low when inactive - (1) Clock is high when inactive -For MicroPython this version is different from original. -*/ -void spi_mode(uint8_t spi_no, uint8_t spi_cpha, uint8_t spi_cpol) { - if (spi_cpol) { - SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE); - } else { - CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE); - } - if (spi_cpha == spi_cpol) { - // Mode 3 - MOSI is set on falling edge of clock - // Mode 0 - MOSI is set on falling edge of clock - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE); - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE); - } else { - // Mode 2 - MOSI is set on rising edge of clock - // Mode 1 - MOSI is set on rising edge of clock - SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE); - } -} - - -/* -Initialise the GPIO pins for use as SPI pins. - spi_no - SPI (0) or HSPI (1) - sysclk_as_spiclk - - SPI_CLK_80MHZ_NODIV (1) if using 80MHz for SPI clock. - SPI_CLK_USE_DIV (0) if using divider for lower speed. -*/ -void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk) { - uint32_t clock_div_flag = 0; - if (sysclk_as_spiclk) { - clock_div_flag = 0x0001; - } - if (spi_no == SPI) { - // Set bit 8 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005 | (clock_div_flag<<8)); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1); - } else if (spi_no == HSPI) { - // Set bit 9 if 80MHz sysclock required - WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag<<9)); - // GPIO12 is HSPI MISO pin (Master Data In) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); - // GPIO13 is HSPI MOSI pin (Master Data Out) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); - // GPIO14 is HSPI CLK pin (Clock) - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); - // GPIO15 is HSPI CS pin (Chip Select / Slave Select) - // In MicroPython, we are handling CS ourself in drivers. - // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); - } -} - - -/* -Set up the control registers for the SPI clock - spi_no - SPI (0) or HSPI (1) - prediv - predivider value (actual division value) - cntdiv - postdivider value (actual division value) -Set either divider to 0 to disable all division (80MHz sysclock) -*/ -void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv) { - if (prediv == 0 || cntdiv == 0) { - WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK); - } else { - WRITE_PERI_REG(SPI_CLOCK(spi_no), - (((prediv - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) | - (((cntdiv - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | - (((cntdiv >> 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | - ((0 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S) - ); - } -} - - -/* -Setup the byte order for shifting data out of buffer - spi_no - SPI (0) or HSPI (1) - byte_order - - SPI_BYTE_ORDER_HIGH_TO_LOW (1) - Data is sent out starting with Bit31 and down to Bit0 - SPI_BYTE_ORDER_LOW_TO_HIGH (0) - Data is sent out starting with the lowest BYTE, from MSB to LSB, - followed by the second lowest BYTE, from MSB to LSB, followed by - the second highest BYTE, from MSB to LSB, followed by the highest - BYTE, from MSB to LSB 0xABCDEFGH would be sent as 0xGHEFCDAB. -*/ -void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order) { - if (byte_order) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER); - } -} - - -/* -Setup the byte order for shifting data into buffer - spi_no - SPI (0) or HSPI (1) - byte_order - - SPI_BYTE_ORDER_HIGH_TO_LOW (1) - Data is read in starting with Bit31 and down to Bit0 - SPI_BYTE_ORDER_LOW_TO_HIGH (0) - Data is read in starting with the lowest BYTE, from MSB to LSB, - followed by the second lowest BYTE, from MSB to LSB, followed by - the second highest BYTE, from MSB to LSB, followed by the highest - BYTE, from MSB to LSB 0xABCDEFGH would be read as 0xGHEFCDAB -*/ -void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order) { - if (byte_order) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER); - } -} - - -/* -SPI transaction function - spi_no - SPI (0) or HSPI (1) - cmd_bits - actual number of bits to transmit - cmd_data - command data - addr_bits - actual number of bits to transmit - addr_data - address data - dout_bits - actual number of bits to transmit - dout_data - output data - din_bits - actual number of bits to receive -Returns: read data - uint32_t containing read in data only if RX was set - 0 - something went wrong (or actual read data was 0) - 1 - data sent ok (or actual read data is 1) -Note: all data is assumed to be stored in the lower bits of the data variables -(for anything <32 bits). -*/ -uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data, - uint32_t addr_bits, uint32_t addr_data, - uint32_t dout_bits, uint32_t dout_data, - uint32_t din_bits, uint32_t dummy_bits) { - while (spi_busy(spi_no)) {}; // Wait for SPI to be ready - -// Enable SPI Functions - // Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set. - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO | - SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY); - - // Enable functions based on number of bits. 0 bits = disabled. - // This is rather inefficient but allows for a very generic function. - // CMD ADDR and MOSI are set below to save on an extra if statement. - if (din_bits) { - if (dout_bits) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_DOUTDIN); - } else { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO); - } - } - if (dummy_bits) { - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY); - } - -// Setup Bitlengths - WRITE_PERI_REG(SPI_USER1(spi_no), - // Number of bits in Address - ((addr_bits - 1) & SPI_USR_ADDR_BITLEN) << SPI_USR_ADDR_BITLEN_S | - // Number of bits to Send - ((dout_bits - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S | - // Number of bits to receive - ((din_bits - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S | - // Number of Dummy bits to insert - ((dummy_bits - 1) & SPI_USR_DUMMY_CYCLELEN) << SPI_USR_DUMMY_CYCLELEN_S); - -// Setup Command Data - if (cmd_bits) { - // Enable COMMAND function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND); - // Align command data to high bits - uint16_t command = cmd_data << (16-cmd_bits); - // Swap byte order - command = ((command>>8)&0xff) | ((command<<8)&0xff00); - WRITE_PERI_REG(SPI_USER2(spi_no), ( - (((cmd_bits - 1) & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) | - (command & SPI_USR_COMMAND_VALUE) - )); - } - -// Setup Address Data - if (addr_bits) { - // Enable ADDRess function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR); - // Align address data to high bits - WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data << (32 - addr_bits)); - } - -// Setup DOUT data - if (dout_bits) { - // Enable MOSI function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); - // Copy data to W0 - if (READ_PERI_REG(SPI_USER(spi_no))&SPI_WR_BYTE_ORDER) { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - dout_bits)); - } else { - uint8_t dout_extra_bits = dout_bits%8; - - if (dout_extra_bits) { - // If your data isn't a byte multiple (8/16/24/32 bits) and you - // don't have SPI_WR_BYTE_ORDER set, you need this to move the - // non-8bit remainder to the MSBs. Not sure if there's even a use - // case for this, but it's here if you need it... For example, - // 0xDA4 12 bits without SPI_WR_BYTE_ORDER would usually be output - // as if it were 0x0DA4, of which 0xA4, and then 0x0 would be - // shifted out (first 8 bits of low byte, then 4 MSB bits of high - // byte - ie reverse byte order). - // The code below shifts it out as 0xA4 followed by 0xD as you - // might require. - WRITE_PERI_REG(SPI_W0(spi_no), ( - (0xFFFFFFFF << (dout_bits - dout_extra_bits) & dout_data) - << (8-dout_extra_bits) | - ((0xFFFFFFFF >> (32 - (dout_bits - dout_extra_bits))) - & dout_data) - )); - } else { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data); - } - } -} - -// Begin SPI Transaction - SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); - -// Return DIN data - if (din_bits) { - while (spi_busy(spi_no)) {}; // Wait for SPI transaction to complete - if (READ_PERI_REG(SPI_USER(spi_no))&SPI_RD_BYTE_ORDER) { - // Assuming data in is written to MSB. TBC - return READ_PERI_REG(SPI_W0(spi_no)) >> (32 - din_bits); - } else { - // Read in the same way as DOUT is sent. Note existing contents of - // SPI_W0 remain unless overwritten! - return READ_PERI_REG(SPI_W0(spi_no)); - } - return 0; // Something went wrong - } - - // Transaction completed - return 1; // Success -} - - -/* -Just do minimal work needed to send 8 bits. -*/ -inline void spi_tx8fast(uint8_t spi_no, uint8_t dout_data) { - while (spi_busy(spi_no)) {}; // Wait for SPI to be ready - -// Enable SPI Functions - // Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set. - CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO | - SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY); - -// Setup Bitlengths - WRITE_PERI_REG(SPI_USER1(spi_no), - // Number of bits to Send - ((8 - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S | - // Number of bits to receive - ((8 - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S); - - -// Setup DOUT data - // Enable MOSI function in SPI module - SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); - // Copy data to W0 - if (READ_PERI_REG(SPI_USER(spi_no)) & SPI_WR_BYTE_ORDER) { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - 8)); - } else { - WRITE_PERI_REG(SPI_W0(spi_no), dout_data); - } - -// Begin SPI Transaction - SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); -} diff --git a/ports/esp8266/hspi.h b/ports/esp8266/hspi.h deleted file mode 100644 index c68366ef4434d..0000000000000 --- a/ports/esp8266/hspi.h +++ /dev/null @@ -1,79 +0,0 @@ -/* -* The MIT License (MIT) -* -* Copyright (c) 2015 David Ogilvy (MetalPhreak) -* Modified 2016 by Radomir Dopieralski -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all -* copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -*/ - -#ifndef SPI_APP_H -#define SPI_APP_H - -#include "hspi_register.h" -#include "ets_sys.h" -#include "osapi.h" -#include "os_type.h" - -// Define SPI hardware modules -#define SPI 0 -#define HSPI 1 - -#define SPI_CLK_USE_DIV 0 -#define SPI_CLK_80MHZ_NODIV 1 - -#define SPI_BYTE_ORDER_HIGH_TO_LOW 1 -#define SPI_BYTE_ORDER_LOW_TO_HIGH 0 - -#ifndef CPU_CLK_FREQ //Should already be defined in eagle_soc.h -#define CPU_CLK_FREQ (80 * 1000000) -#endif - -// Define some default SPI clock settings -#define SPI_CLK_PREDIV 10 -#define SPI_CLK_CNTDIV 2 -#define SPI_CLK_FREQ (CPU_CLK_FREQ / (SPI_CLK_PREDIV * SPI_CLK_CNTDIV)) -// 80 / 20 = 4 MHz - -void spi_init(uint8_t spi_no); -void spi_mode(uint8_t spi_no, uint8_t spi_cpha,uint8_t spi_cpol); -void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk); -void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv); -void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order); -void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order); -uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data, - uint32_t addr_bits, uint32_t addr_data, - uint32_t dout_bits, uint32_t dout_data, - uint32_t din_bits, uint32_t dummy_bits); -void spi_tx8fast(uint8_t spi_no, uint8_t dout_data); - -// Expansion Macros -#define spi_busy(spi_no) READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR - -#define spi_txd(spi_no, bits, data) spi_transaction(spi_no, 0, 0, 0, 0, bits, (uint32_t) data, 0, 0) -#define spi_tx8(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 8, (uint32_t) data, 0, 0) -#define spi_tx16(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 16, (uint32_t) data, 0, 0) -#define spi_tx32(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 32, (uint32_t) data, 0, 0) - -#define spi_rxd(spi_no, bits) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, bits, 0) -#define spi_rx8(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 8, 0) -#define spi_rx16(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 16, 0) -#define spi_rx32(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 32, 0) - -#endif diff --git a/ports/esp8266/hspi_register.h b/ports/esp8266/hspi_register.h deleted file mode 100644 index 4dd335b400464..0000000000000 --- a/ports/esp8266/hspi_register.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Copyright (c) 2010 - 2011 Espressif System - * Modified by David Ogilvy (MetalPhreak) - * Based on original file included in SDK 1.0.0 - * - * Missing defines from previous SDK versions have - * been added and are noted with comments. The - * names of these defines are likely to change. - */ - -#ifndef SPI_REGISTER_H_INCLUDED -#define SPI_REGISTER_H_INCLUDED - -#define REG_SPI_BASE(i) (0x60000200-i*0x100) - -#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0) -#define SPI_FLASH_READ (BIT(31)) //From previous SDK -#define SPI_FLASH_WREN (BIT(30)) //From previous SDK -#define SPI_FLASH_WRDI (BIT(29)) //From previous SDK -#define SPI_FLASH_RDID (BIT(28)) //From previous SDK -#define SPI_FLASH_RDSR (BIT(27)) //From previous SDK -#define SPI_FLASH_WRSR (BIT(26)) //From previous SDK -#define SPI_FLASH_PP (BIT(25)) //From previous SDK -#define SPI_FLASH_SE (BIT(24)) //From previous SDK -#define SPI_FLASH_BE (BIT(23)) //From previous SDK -#define SPI_FLASH_CE (BIT(22)) //From previous SDK -#define SPI_FLASH_DP (BIT(21)) //From previous SDK -#define SPI_FLASH_RES (BIT(20)) //From previous SDK -#define SPI_FLASH_HPM (BIT(19)) //From previous SDK -#define SPI_USR (BIT(18)) - -#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4) - -#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8) -#define SPI_WR_BIT_ORDER (BIT(26)) -#define SPI_RD_BIT_ORDER (BIT(25)) -#define SPI_QIO_MODE (BIT(24)) -#define SPI_DIO_MODE (BIT(23)) -#define SPI_TWO_BYTE_STATUS_EN (BIT(22)) //From previous SDK -#define SPI_WP_REG (BIT(21)) //From previous SDK -#define SPI_QOUT_MODE (BIT(20)) -#define SPI_SHARE_BUS (BIT(19)) //From previous SDK -#define SPI_HOLD_MODE (BIT(18)) //From previous SDK -#define SPI_ENABLE_AHB (BIT(17)) //From previous SDK -#define SPI_SST_AAI (BIT(16)) //From previous SDK -#define SPI_RESANDRES (BIT(15)) //From previous SDK -#define SPI_DOUT_MODE (BIT(14)) -#define SPI_FASTRD_MODE (BIT(13)) - -#define SPI_CTRL1(i) (REG_SPI_BASE (i) + 0xC) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_CS_HOLD_DELAY 0x0000000F //Espressif BBS -#define SPI_CS_HOLD_DELAY_S 28 //Espressif BBS -#define SPI_CS_HOLD_DELAY_RES 0x00000FFF //Espressif BBS -#define SPI_CS_HOLD_DELAY_RES_S 16 //Espressif BBS -#define SPI_BUS_TIMER_LIMIT 0x0000FFFF //From previous SDK -#define SPI_BUS_TIMER_LIMIT_S 0 //From previous SDK - - -#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10) -#define SPI_STATUS_EXT 0x000000FF //From previous SDK -#define SPI_STATUS_EXT_S 24 //From previous SDK -#define SPI_WB_MODE 0x000000FF //From previous SDK -#define SPI_WB_MODE_S 16 //From previous SDK -#define SPI_FLASH_STATUS_PRO_FLAG (BIT(7)) //From previous SDK -#define SPI_FLASH_TOP_BOT_PRO_FLAG (BIT(5)) //From previous SDK -#define SPI_FLASH_BP2 (BIT(4)) //From previous SDK -#define SPI_FLASH_BP1 (BIT(3)) //From previous SDK -#define SPI_FLASH_BP0 (BIT(2)) //From previous SDK -#define SPI_FLASH_WRENABLE_FLAG (BIT(1)) //From previous SDK -#define SPI_FLASH_BUSY_FLAG (BIT(0)) //From previous SDK - -#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14) -#define SPI_CS_DELAY_NUM 0x0000000F -#define SPI_CS_DELAY_NUM_S 28 -#define SPI_CS_DELAY_MODE 0x00000003 -#define SPI_CS_DELAY_MODE_S 26 -#define SPI_MOSI_DELAY_NUM 0x00000007 -#define SPI_MOSI_DELAY_NUM_S 23 -#define SPI_MOSI_DELAY_MODE 0x00000003 //mode 0 : posedge; data set at positive edge of clk - //mode 1 : negedge + 1 cycle delay, only if freq<10MHz ; data set at negitive edge of clk - //mode 2 : Do not use this mode. -#define SPI_MOSI_DELAY_MODE_S 21 -#define SPI_MISO_DELAY_NUM 0x00000007 -#define SPI_MISO_DELAY_NUM_S 18 -#define SPI_MISO_DELAY_MODE 0x00000003 -#define SPI_MISO_DELAY_MODE_S 16 -#define SPI_CK_OUT_HIGH_MODE 0x0000000F -#define SPI_CK_OUT_HIGH_MODE_S 12 -#define SPI_CK_OUT_LOW_MODE 0x0000000F -#define SPI_CK_OUT_LOW_MODE_S 8 -#define SPI_HOLD_TIME 0x0000000F -#define SPI_HOLD_TIME_S 4 -#define SPI_SETUP_TIME 0x0000000F -#define SPI_SETUP_TIME_S 0 - -#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18) -#define SPI_CLK_EQU_SYSCLK (BIT(31)) -#define SPI_CLKDIV_PRE 0x00001FFF -#define SPI_CLKDIV_PRE_S 18 -#define SPI_CLKCNT_N 0x0000003F -#define SPI_CLKCNT_N_S 12 -#define SPI_CLKCNT_H 0x0000003F -#define SPI_CLKCNT_H_S 6 -#define SPI_CLKCNT_L 0x0000003F -#define SPI_CLKCNT_L_S 0 - -#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C) -#define SPI_USR_COMMAND (BIT(31)) -#define SPI_USR_ADDR (BIT(30)) -#define SPI_USR_DUMMY (BIT(29)) -#define SPI_USR_MISO (BIT(28)) -#define SPI_USR_MOSI (BIT(27)) -#define SPI_USR_DUMMY_IDLE (BIT(26)) //From previous SDK -#define SPI_USR_MOSI_HIGHPART (BIT(25)) -#define SPI_USR_MISO_HIGHPART (BIT(24)) -#define SPI_USR_PREP_HOLD (BIT(23)) //From previous SDK -#define SPI_USR_CMD_HOLD (BIT(22)) //From previous SDK -#define SPI_USR_ADDR_HOLD (BIT(21)) //From previous SDK -#define SPI_USR_DUMMY_HOLD (BIT(20)) //From previous SDK -#define SPI_USR_DIN_HOLD (BIT(19)) //From previous SDK -#define SPI_USR_DOUT_HOLD (BIT(18)) //From previous SDK -#define SPI_USR_HOLD_POL (BIT(17)) //From previous SDK -#define SPI_SIO (BIT(16)) -#define SPI_FWRITE_QIO (BIT(15)) -#define SPI_FWRITE_DIO (BIT(14)) -#define SPI_FWRITE_QUAD (BIT(13)) -#define SPI_FWRITE_DUAL (BIT(12)) -#define SPI_WR_BYTE_ORDER (BIT(11)) -#define SPI_RD_BYTE_ORDER (BIT(10)) -#define SPI_AHB_ENDIAN_MODE 0x00000003 //From previous SDK -#define SPI_AHB_ENDIAN_MODE_S 8 //From previous SDK -#define SPI_CK_OUT_EDGE (BIT(7)) -#define SPI_CK_I_EDGE (BIT(6)) -#define SPI_CS_SETUP (BIT(5)) -#define SPI_CS_HOLD (BIT(4)) -#define SPI_AHB_USR_COMMAND (BIT(3)) //From previous SDK -#define SPI_FLASH_MODE (BIT(2)) -#define SPI_AHB_USR_COMMAND_4BYTE (BIT(1)) //From previous SDK -#define SPI_DOUTDIN (BIT(0)) //From previous SDK - -//AHB = http://en.wikipedia.org/wiki/Advanced_Microcontroller_Bus_Architecture ? - - -#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20) -#define SPI_USR_ADDR_BITLEN 0x0000003F -#define SPI_USR_ADDR_BITLEN_S 26 -#define SPI_USR_MOSI_BITLEN 0x000001FF -#define SPI_USR_MOSI_BITLEN_S 17 -#define SPI_USR_MISO_BITLEN 0x000001FF -#define SPI_USR_MISO_BITLEN_S 8 -#define SPI_USR_DUMMY_CYCLELEN 0x000000FF -#define SPI_USR_DUMMY_CYCLELEN_S 0 - -#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24) -#define SPI_USR_COMMAND_BITLEN 0x0000000F -#define SPI_USR_COMMAND_BITLEN_S 28 -#define SPI_USR_COMMAND_VALUE 0x0000FFFF -#define SPI_USR_COMMAND_VALUE_S 0 - -#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28) - //previously defined as SPI_FLASH_USER3. No further info available. - -#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C) -#define SPI_IDLE_EDGE (BIT(29)) -#define SPI_CS2_DIS (BIT(2)) -#define SPI_CS1_DIS (BIT(1)) -#define SPI_CS0_DIS (BIT(0)) - -#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30) -#define SPI_SYNC_RESET (BIT(31)) -#define SPI_SLAVE_MODE (BIT(30)) -#define SPI_SLV_WR_RD_BUF_EN (BIT(29)) -#define SPI_SLV_WR_RD_STA_EN (BIT(28)) -#define SPI_SLV_CMD_DEFINE (BIT(27)) -#define SPI_TRANS_CNT 0x0000000F -#define SPI_TRANS_CNT_S 23 -#define SPI_SLV_LAST_STATE 0x00000007 //From previous SDK -#define SPI_SLV_LAST_STATE_S 20 //From previous SDK -#define SPI_SLV_LAST_COMMAND 0x00000007 //From previous SDK -#define SPI_SLV_LAST_COMMAND_S 17 //From previous SDK -#define SPI_CS_I_MODE 0x00000003 //From previous SDK -#define SPI_CS_I_MODE_S 10 //From previous SDK -#define SPI_TRANS_DONE_EN (BIT(9)) -#define SPI_SLV_WR_STA_DONE_EN (BIT(8)) -#define SPI_SLV_RD_STA_DONE_EN (BIT(7)) -#define SPI_SLV_WR_BUF_DONE_EN (BIT(6)) -#define SPI_SLV_RD_BUF_DONE_EN (BIT(5)) -#define SLV_SPI_INT_EN 0x0000001f -#define SLV_SPI_INT_EN_S 5 -#define SPI_TRANS_DONE (BIT(4)) -#define SPI_SLV_WR_STA_DONE (BIT(3)) -#define SPI_SLV_RD_STA_DONE (BIT(2)) -#define SPI_SLV_WR_BUF_DONE (BIT(1)) -#define SPI_SLV_RD_BUF_DONE (BIT(0)) - -#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34) -#define SPI_SLV_STATUS_BITLEN 0x0000001F -#define SPI_SLV_STATUS_BITLEN_S 27 -#define SPI_SLV_STATUS_FAST_EN (BIT(26)) //From previous SDK -#define SPI_SLV_STATUS_READBACK (BIT(25)) //From previous SDK -#define SPI_SLV_BUF_BITLEN 0x000001FF -#define SPI_SLV_BUF_BITLEN_S 16 -#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F -#define SPI_SLV_RD_ADDR_BITLEN_S 10 -#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F -#define SPI_SLV_WR_ADDR_BITLEN_S 4 -#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3)) -#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2)) -#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1)) -#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0)) - - - -#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38) -#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24 -#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16 -#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF -#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8 -#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF -#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0 - -#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C) -#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF -#define SPI_SLV_WRSTA_CMD_VALUE_S 24 -#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF -#define SPI_SLV_RDSTA_CMD_VALUE_S 16 -#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF -#define SPI_SLV_WRBUF_CMD_VALUE_S 8 -#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF -#define SPI_SLV_RDBUF_CMD_VALUE_S 0 - -//Previous SDKs referred to these following registers as SPI_C0 etc. - -#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) -#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) -#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) -#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) -#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) -#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) -#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) -#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) -#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) -#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) -#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) -#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) -#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) -#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) -#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) -#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) - - // +0x80 to +0xBC could be SPI_W16 through SPI_W31? - - // +0xC0 to +0xEC not currently defined. - -#define SPI_EXT0(i) (REG_SPI_BASE(i) + 0xF0) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_T_PP_ENA (BIT(31)) //From previous SDK -#define SPI_T_PP_SHIFT 0x0000000F //From previous SDK -#define SPI_T_PP_SHIFT_S 16 //From previous SDK -#define SPI_T_PP_TIME 0x00000FFF //From previous SDK -#define SPI_T_PP_TIME_S 0 //From previous SDK - -#define SPI_EXT1(i) (REG_SPI_BASE(i) + 0xF4) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_T_ERASE_ENA (BIT(31)) //From previous SDK -#define SPI_T_ERASE_SHIFT 0x0000000F //From previous SDK -#define SPI_T_ERASE_SHIFT_S 16 //From previous SDK -#define SPI_T_ERASE_TIME 0x00000FFF //From previous SDK -#define SPI_T_ERASE_TIME_S 0 //From previous SDK - -#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) //From previous SDK. Removed _FLASH_ from name to match other registers. -#define SPI_ST 0x00000007 //From previous SDK -#define SPI_ST_S 0 //From previous SDK - -#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) -#define SPI_INT_HOLD_ENA 0x00000003 -#define SPI_INT_HOLD_ENA_S 0 -#endif // SPI_REGISTER_H_INCLUDED diff --git a/ports/esp8266/intr.c b/ports/esp8266/intr.c deleted file mode 100644 index 456d6cb0464f9..0000000000000 --- a/ports/esp8266/intr.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "etshal.h" -#include "ets_alt_task.h" - -#include "modmachine.h" - -// this is in a separate file so it can go in iRAM -void pin_intr_handler_iram(void *arg) { - uint32_t status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, status); - pin_intr_handler(status); -} diff --git a/ports/esp8266/lexerstr32.c b/ports/esp8266/lexerstr32.c deleted file mode 100644 index 6fb84bb74e805..0000000000000 --- a/ports/esp8266/lexerstr32.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/lexer.h" - -#if MICROPY_ENABLE_COMPILER - -typedef struct _mp_lexer_str32_buf_t { - const uint32_t *src_cur; - uint32_t val; - uint8_t byte_off; -} mp_lexer_str32_buf_t; - -STATIC mp_uint_t str32_buf_next_byte(void *sb_in) { - mp_lexer_str32_buf_t *sb = (mp_lexer_str32_buf_t*)sb_in; - byte c = sb->val & 0xff; - if (c == 0) { - return MP_READER_EOF; - } - - if (++sb->byte_off > 3) { - sb->byte_off = 0; - sb->val = *sb->src_cur++; - } else { - sb->val >>= 8; - } - - return c; -} - -STATIC void str32_buf_free(void *sb_in) { - mp_lexer_str32_buf_t *sb = (mp_lexer_str32_buf_t*)sb_in; - m_del_obj(mp_lexer_str32_buf_t, sb); -} - -mp_lexer_t *mp_lexer_new_from_str32(qstr src_name, const char *str, mp_uint_t len, mp_uint_t free_len) { - mp_lexer_str32_buf_t *sb = m_new_obj(mp_lexer_str32_buf_t); - sb->byte_off = (uint32_t)str & 3; - sb->src_cur = (uint32_t*)(str - sb->byte_off); - sb->val = *sb->src_cur++ >> sb->byte_off * 8; - mp_reader_t reader = {sb, str32_buf_next_byte, str32_buf_free}; - return mp_lexer_new(src_name, reader); -} - -#endif // MICROPY_ENABLE_COMPILER diff --git a/ports/esp8266/machine_adc.c b/ports/esp8266/machine_adc.c deleted file mode 100644 index b422f0f9ecea2..0000000000000 --- a/ports/esp8266/machine_adc.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "user_interface.h" - -const mp_obj_type_t pyb_adc_type; - -typedef struct _pyb_adc_obj_t { - mp_obj_base_t base; - bool isvdd; -} pyb_adc_obj_t; - -STATIC pyb_adc_obj_t pyb_adc_vdd3 = {{&pyb_adc_type}, true}; -STATIC pyb_adc_obj_t pyb_adc_adc = {{&pyb_adc_type}, false}; - -STATIC mp_obj_t pyb_adc_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, - const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - mp_int_t chn = mp_obj_get_int(args[0]); - - switch (chn) { - case 0: - return &pyb_adc_adc; - case 1: - return &pyb_adc_vdd3; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "not a valid ADC Channel: %d", chn)); - } -} - -STATIC mp_obj_t pyb_adc_read(mp_obj_t self_in) { - pyb_adc_obj_t *adc = self_in; - - if (adc->isvdd) { - return mp_obj_new_int(system_get_vdd33()); - } else { - return mp_obj_new_int(system_adc_read()); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_adc_read_obj, pyb_adc_read); - -STATIC const mp_rom_map_elem_t pyb_adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_adc_read_obj) } -}; -STATIC MP_DEFINE_CONST_DICT(pyb_adc_locals_dict, pyb_adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .make_new = pyb_adc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_adc_locals_dict, -}; diff --git a/ports/esp8266/machine_hspi.c b/ports/esp8266/machine_hspi.c deleted file mode 100644 index 9fd0f48682c95..0000000000000 --- a/ports/esp8266/machine_hspi.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "ets_sys.h" -#include "etshal.h" -#include "ets_alt_task.h" - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "modmachine.h" -#include "hspi.h" - -typedef struct _machine_hspi_obj_t { - mp_obj_base_t base; - uint32_t baudrate; - uint8_t polarity; - uint8_t phase; -} machine_hspi_obj_t; - -STATIC void machine_hspi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - (void)self_in; - - if (dest == NULL) { - // fast case when we only need to write data - size_t chunk_size = 1024; - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - spi_tx8fast(HSPI, src[i]); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - spi_tx8fast(HSPI, src[i]); - ++i; - } - } else { - // we need to read and write data - - // Process data in chunks, let the pending tasks run in between - size_t chunk_size = 1024; // TODO this should depend on baudrate - size_t count = len / chunk_size; - size_t i = 0; - for (size_t j = 0; j < count; ++j) { - for (size_t k = 0; k < chunk_size; ++k) { - dest[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, src[i], 8, 0); - ++i; - } - ets_loop_iter(); - } - while (i < len) { - dest[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, src[i], 8, 0); - ++i; - } - } -} - -/******************************************************************************/ -// MicroPython bindings for HSPI - -STATIC void machine_hspi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hspi_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "HSPI(id=1, baudrate=%u, polarity=%u, phase=%u)", - self->baudrate, self->polarity, self->phase); -} - -STATIC void machine_hspi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - machine_hspi_obj_t *self = (machine_hspi_obj_t*)self_in; - - enum { ARG_baudrate, ARG_polarity, ARG_phase }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), - allowed_args, args); - - if (args[ARG_baudrate].u_int != -1) { - self->baudrate = args[ARG_baudrate].u_int; - } - if (args[ARG_polarity].u_int != -1) { - self->polarity = args[ARG_polarity].u_int; - } - if (args[ARG_phase].u_int != -1) { - self->phase = args[ARG_phase].u_int; - } - if (self->baudrate == 80000000L) { - // Special case for full speed. - spi_init_gpio(HSPI, SPI_CLK_80MHZ_NODIV); - spi_clock(HSPI, 0, 0); - } else if (self->baudrate > 40000000L) { - mp_raise_ValueError("impossible baudrate"); - } else { - uint32_t divider = 40000000L / self->baudrate; - uint16_t prediv = MIN(divider, SPI_CLKDIV_PRE + 1); - uint16_t cntdiv = (divider / prediv) * 2; // cntdiv has to be even - if (cntdiv > SPI_CLKCNT_N + 1 || cntdiv == 0 || prediv == 0) { - mp_raise_ValueError("impossible baudrate"); - } - self->baudrate = 80000000L / (prediv * cntdiv); - spi_init_gpio(HSPI, SPI_CLK_USE_DIV); - spi_clock(HSPI, prediv, cntdiv); - } - // TODO: Make the byte order configurable too (discuss param names) - spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW); - CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE | SPI_USR_MISO | - SPI_USR_ADDR | SPI_USR_COMMAND | SPI_USR_DUMMY); - // Clear Dual or Quad lines transmission mode - CLEAR_PERI_REG_MASK(SPI_CTRL(HSPI), SPI_QIO_MODE | SPI_DIO_MODE | - SPI_DOUT_MODE | SPI_QOUT_MODE); - spi_mode(HSPI, self->phase, self->polarity); -} - -mp_obj_t machine_hspi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // args[0] holds the id of the peripheral - if (args[0] != MP_OBJ_NEW_SMALL_INT(1)) { - // FlashROM is on SPI0, so far we don't support its usage - mp_raise_ValueError(NULL); - } - - machine_hspi_obj_t *self = m_new_obj(machine_hspi_obj_t); - self->base.type = &machine_hspi_type; - // set defaults - self->baudrate = 80000000L; - self->polarity = 0; - self->phase = 0; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_hspi_init((mp_obj_base_t*)self, n_args - 1, args + 1, &kw_args); - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_machine_spi_p_t machine_hspi_p = { - .init = machine_hspi_init, - .transfer = machine_hspi_transfer, -}; - -const mp_obj_type_t machine_hspi_type = { - { &mp_type_type }, - .name = MP_QSTR_HSPI, - .print = machine_hspi_print, - .make_new = mp_machine_spi_make_new, // delegate to master constructor - .protocol = &machine_hspi_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_spi_locals_dict, -}; diff --git a/ports/esp8266/machine_pin.c b/ports/esp8266/machine_pin.c deleted file mode 100644 index 14505c8f024c0..0000000000000 --- a/ports/esp8266/machine_pin.c +++ /dev/null @@ -1,518 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "etshal.h" -#include "c_types.h" -#include "user_interface.h" -#include "gpio.h" - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "extmod/virtpin.h" -#include "modmachine.h" - -#define GET_TRIGGER(phys_port) \ - GPIO_PIN_INT_TYPE_GET(GPIO_REG_READ(GPIO_PIN_ADDR(phys_port))) -#define SET_TRIGGER(phys_port, trig) \ - (GPIO_REG_WRITE(GPIO_PIN_ADDR(phys_port), \ - (GPIO_REG_READ(GPIO_PIN_ADDR(phys_port)) & ~GPIO_PIN_INT_TYPE_MASK) \ - | GPIO_PIN_INT_TYPE_SET(trig))) \ - -#define GPIO_MODE_INPUT (0) -#define GPIO_MODE_OUTPUT (1) -#define GPIO_MODE_OPEN_DRAIN (2) // synthesised -#define GPIO_PULL_NONE (0) -#define GPIO_PULL_UP (1) -// Removed in SDK 1.1.0 -//#define GPIO_PULL_DOWN (2) - -typedef struct _pin_irq_obj_t { - mp_obj_base_t base; - uint16_t phys_port; -} pin_irq_obj_t; - -const pyb_pin_obj_t pyb_pin_obj[16 + 1] = { - {{&pyb_pin_type}, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U}, - {{&pyb_pin_type}, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U}, - {{&pyb_pin_type}, 2, FUNC_GPIO2, PERIPHS_IO_MUX_GPIO2_U}, - {{&pyb_pin_type}, 3, FUNC_GPIO3, PERIPHS_IO_MUX_U0RXD_U}, - {{&pyb_pin_type}, 4, FUNC_GPIO4, PERIPHS_IO_MUX_GPIO4_U}, - {{&pyb_pin_type}, 5, FUNC_GPIO5, PERIPHS_IO_MUX_GPIO5_U}, - {{NULL}, 0, 0, 0}, - {{NULL}, 0, 0, 0}, - {{NULL}, 0, 0, 0}, - {{&pyb_pin_type}, 9, FUNC_GPIO9, PERIPHS_IO_MUX_SD_DATA2_U}, - {{&pyb_pin_type}, 10, FUNC_GPIO10, PERIPHS_IO_MUX_SD_DATA3_U}, - {{NULL}, 0, 0, 0}, - {{&pyb_pin_type}, 12, FUNC_GPIO12, PERIPHS_IO_MUX_MTDI_U}, - {{&pyb_pin_type}, 13, FUNC_GPIO13, PERIPHS_IO_MUX_MTCK_U}, - {{&pyb_pin_type}, 14, FUNC_GPIO14, PERIPHS_IO_MUX_MTMS_U}, - {{&pyb_pin_type}, 15, FUNC_GPIO15, PERIPHS_IO_MUX_MTDO_U}, - // GPIO16 is special, belongs to different register set, and - // otherwise handled specially. - {{&pyb_pin_type}, 16, -1, -1}, -}; - -STATIC uint8_t pin_mode[16 + 1]; - -// forward declaration -STATIC const pin_irq_obj_t pin_irq_obj[16]; - -// whether the irq is hard or soft -STATIC bool pin_irq_is_hard[16]; - -void pin_init0(void) { - ETS_GPIO_INTR_DISABLE(); - ETS_GPIO_INTR_ATTACH(pin_intr_handler_iram, NULL); - // disable all interrupts - memset(&MP_STATE_PORT(pin_irq_handler)[0], 0, 16 * sizeof(mp_obj_t)); - memset(pin_irq_is_hard, 0, sizeof(pin_irq_is_hard)); - for (int p = 0; p < 16; ++p) { - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << p); - SET_TRIGGER(p, 0); - } - ETS_GPIO_INTR_ENABLE(); -} - -void pin_intr_handler(uint32_t status) { - mp_sched_lock(); - gc_lock(); - status &= 0xffff; - for (int p = 0; status; ++p, status >>= 1) { - if (status & 1) { - mp_obj_t handler = MP_STATE_PORT(pin_irq_handler)[p]; - if (handler != MP_OBJ_NULL) { - if (pin_irq_is_hard[p]) { - mp_call_function_1_protected(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p])); - } else { - mp_sched_schedule(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p])); - } - } - } - } - gc_unlock(); - mp_sched_unlock(); -} - -pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in) { - if (mp_obj_get_type(pin_in) != &pyb_pin_type) { - mp_raise_ValueError("expecting a pin"); - } - pyb_pin_obj_t *self = pin_in; - return self; -} - -uint mp_obj_get_pin(mp_obj_t pin_in) { - return mp_obj_get_pin_obj(pin_in)->phys_port; -} - -void mp_hal_pin_input(mp_hal_pin_obj_t pin_id) { - pin_mode[pin_id] = GPIO_MODE_INPUT; - if (pin_id == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - } else { - const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id]; - PIN_FUNC_SELECT(self->periph, self->func); - PIN_PULLUP_DIS(self->periph); - gpio_output_set(0, 0, 0, 1 << self->phys_port); - } -} - -void mp_hal_pin_output(mp_hal_pin_obj_t pin_id) { - pin_mode[pin_id] = GPIO_MODE_OUTPUT; - if (pin_id == 16) { - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output - } else { - const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id]; - PIN_FUNC_SELECT(self->periph, self->func); - PIN_PULLUP_DIS(self->periph); - gpio_output_set(0, 0, 1 << self->phys_port, 0); - } -} - -void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin_id) { - const pyb_pin_obj_t *pin = &pyb_pin_obj[pin_id]; - - if (pin->phys_port == 16) { - // configure GPIO16 as input with output register holding 0 - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1)); // out=0 - return; - } - - ETS_GPIO_INTR_DISABLE(); - PIN_FUNC_SELECT(pin->periph, pin->func); - GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port)), - GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin->phys_port))) - | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); // open drain - GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, - GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << pin->phys_port)); - ETS_GPIO_INTR_ENABLE(); -} - -int pin_get(uint pin) { - if (pin == 16) { - return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1; - } - return GPIO_INPUT_GET(pin); -} - -void pin_set(uint pin, int value) { - if (pin == 16) { - int out_en = (pin_mode[pin] == GPIO_MODE_OUTPUT); - WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1); - WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1); - WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | out_en); - WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1) | value); - return; - } - - uint32_t enable = 0; - uint32_t disable = 0; - switch (pin_mode[pin]) { - case GPIO_MODE_INPUT: - value = -1; - disable = 1; - break; - - case GPIO_MODE_OUTPUT: - enable = 1; - break; - - case GPIO_MODE_OPEN_DRAIN: - if (value == -1) { - return; - } else if (value == 0) { - enable = 1; - } else { - value = -1; - disable = 1; - } - break; - } - - enable <<= pin; - disable <<= pin; - if (value == -1) { - gpio_output_set(0, 0, enable, disable); - } else { - gpio_output_set(value << pin, (1 - value) << pin, enable, disable); - } -} - -STATIC void pyb_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_pin_obj_t *self = self_in; - - // pin name - mp_printf(print, "Pin(%u)", self->phys_port); -} - -// pin.init(mode, pull=None, *, value) -STATIC mp_obj_t pyb_pin_obj_init_helper(pyb_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_pull, ARG_value }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[ARG_mode].u_int; - - // get pull mode - uint pull = GPIO_PULL_NONE; - if (args[ARG_pull].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[ARG_pull].u_obj); - } - - // get initial value - int value; - if (args[ARG_value].u_obj == MP_OBJ_NULL) { - value = -1; - } else { - value = mp_obj_is_true(args[ARG_value].u_obj); - } - - // save the mode - pin_mode[self->phys_port] = mode; - - // configure the GPIO as requested - if (self->phys_port == 16) { - // only pull-down seems to be supported by the hardware, and - // we only expose pull-up behaviour in software - if (pull != GPIO_PULL_NONE) { - mp_raise_ValueError("Pin(16) doesn't support pull"); - } - } else { - PIN_FUNC_SELECT(self->periph, self->func); - #if 0 - // Removed in SDK 1.1.0 - if ((pull & GPIO_PULL_DOWN) == 0) { - PIN_PULLDWN_DIS(self->periph); - } - #endif - if ((pull & GPIO_PULL_UP) == 0) { - PIN_PULLUP_DIS(self->periph); - } - #if 0 - if ((pull & GPIO_PULL_DOWN) != 0) { - PIN_PULLDWN_EN(self->periph); - } - #endif - if ((pull & GPIO_PULL_UP) != 0) { - PIN_PULLUP_EN(self->periph); - } - } - - pin_set(self->phys_port, value); - - return mp_const_none; -} - -// constructor(id, ...) -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted pin object - int wanted_pin = mp_obj_get_int(args[0]); - pyb_pin_obj_t *pin = NULL; - if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(pyb_pin_obj)) { - pin = (pyb_pin_obj_t*)&pyb_pin_obj[wanted_pin]; - } - if (pin == NULL || pin->base.type == NULL) { - mp_raise_ValueError("invalid pin"); - } - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t pyb_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - pyb_pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(pin_get(self->phys_port)); - } else { - // set pin - pin_set(self->phys_port, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -// pin.init(mode, pull) -STATIC mp_obj_t pyb_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_init_obj, 1, pyb_pin_obj_init); - -// pin.value([value]) -STATIC mp_obj_t pyb_pin_value(size_t n_args, const mp_obj_t *args) { - return pyb_pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pin_value_obj, 1, 2, pyb_pin_value); - -STATIC mp_obj_t pyb_pin_off(mp_obj_t self_in) { - pyb_pin_obj_t *self = self_in; - pin_set(self->phys_port, 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_off_obj, pyb_pin_off); - -STATIC mp_obj_t pyb_pin_on(mp_obj_t self_in) { - pyb_pin_obj_t *self = self_in; - pin_set(self->phys_port, 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_on_obj, pyb_pin_on); - -// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False) -STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_handler, ARG_trigger, ARG_hard }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_PIN_INTR_POSEDGE | GPIO_PIN_INTR_NEGEDGE} }, - { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} }, - }; - pyb_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (self->phys_port >= 16) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "pin does not have IRQ capabilities")); - } - - if (n_args > 1 || kw_args->used != 0) { - // configure irq - mp_obj_t handler = args[ARG_handler].u_obj; - uint32_t trigger = args[ARG_trigger].u_int; - if (handler == mp_const_none) { - handler = MP_OBJ_NULL; - trigger = 0; - } - ETS_GPIO_INTR_DISABLE(); - MP_STATE_PORT(pin_irq_handler)[self->phys_port] = handler; - pin_irq_is_hard[self->phys_port] = args[ARG_hard].u_bool; - SET_TRIGGER(self->phys_port, trigger); - GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->phys_port); - ETS_GPIO_INTR_ENABLE(); - } - - // return the irq object - return MP_OBJ_FROM_PTR(&pin_irq_obj[self->phys_port]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_irq_obj, 1, pyb_pin_irq); - -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode); -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - pyb_pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - return pin_get(self->phys_port); - } - case MP_PIN_WRITE: { - pin_set(self->phys_port, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_rom_map_elem_t pyb_pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pyb_pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pyb_pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_pin_irq_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUTPUT) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OPEN_DRAIN) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULL_UP) }, - //{ MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULL_DOWN) }, - - // IRQ triggers, can be or'd together - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_PIN_INTR_POSEDGE) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_PIN_INTR_NEGEDGE) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_pin_locals_dict, pyb_pin_locals_dict_table); - -STATIC const mp_pin_p_t pin_pin_p = { - .ioctl = pin_ioctl, -}; - -const mp_obj_type_t pyb_pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pyb_pin_print, - .make_new = mp_pin_make_new, - .call = pyb_pin_call, - .protocol = &pin_pin_p, - .locals_dict = (mp_obj_dict_t*)&pyb_pin_locals_dict, -}; - -/******************************************************************************/ -// Pin IRQ object - -STATIC const mp_obj_type_t pin_irq_type; - -STATIC const pin_irq_obj_t pin_irq_obj[16] = { - {{&pin_irq_type}, 0}, - {{&pin_irq_type}, 1}, - {{&pin_irq_type}, 2}, - {{&pin_irq_type}, 3}, - {{&pin_irq_type}, 4}, - {{&pin_irq_type}, 5}, - {{&pin_irq_type}, 6}, - {{&pin_irq_type}, 7}, - {{&pin_irq_type}, 8}, - {{&pin_irq_type}, 9}, - {{&pin_irq_type}, 10}, - {{&pin_irq_type}, 11}, - {{&pin_irq_type}, 12}, - {{&pin_irq_type}, 13}, - {{&pin_irq_type}, 14}, - {{&pin_irq_type}, 15}, -}; - -STATIC mp_obj_t pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - pin_irq_obj_t *self = self_in; - mp_arg_check_num(n_args, n_kw, 0, 0, false); - pin_intr_handler(1 << self->phys_port); - return mp_const_none; -} - -STATIC mp_obj_t pin_irq_trigger(size_t n_args, const mp_obj_t *args) { - pin_irq_obj_t *self = args[0]; - uint32_t orig_trig = GET_TRIGGER(self->phys_port); - if (n_args == 2) { - // set trigger - SET_TRIGGER(self->phys_port, mp_obj_get_int(args[1])); - } - // return original trigger value - return MP_OBJ_NEW_SMALL_INT(orig_trig); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_irq_trigger_obj, 1, 2, pin_irq_trigger); - -STATIC const mp_rom_map_elem_t pin_irq_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&pin_irq_trigger_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pin_irq_locals_dict, pin_irq_locals_dict_table); - -STATIC const mp_obj_type_t pin_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_IRQ, - .call = pin_irq_call, - .locals_dict = (mp_obj_dict_t*)&pin_irq_locals_dict, -}; diff --git a/ports/esp8266/machine_pwm.c b/ports/esp8266/machine_pwm.c deleted file mode 100644 index 961b8e5474cc1..0000000000000 --- a/ports/esp8266/machine_pwm.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "esppwm.h" - -#include "py/runtime.h" -#include "modmachine.h" - -typedef struct _pyb_pwm_obj_t { - mp_obj_base_t base; - pyb_pin_obj_t *pin; - uint8_t active; - uint8_t channel; -} pyb_pwm_obj_t; - -bool pwm_inited = false; - -/******************************************************************************/ -// MicroPython bindings for PWM - -STATIC void pyb_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "PWM(%u", self->pin->phys_port); - if (self->active) { - mp_printf(print, ", freq=%u, duty=%u", - pwm_get_freq(self->channel), pwm_get_duty(self->channel)); - } - mp_printf(print, ")"); -} - -STATIC void pyb_pwm_init_helper(pyb_pwm_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_freq, ARG_duty }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_duty, MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - int channel = pwm_add(self->pin->phys_port, self->pin->periph, self->pin->func); - if (channel == -1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "PWM not supported on pin %d", self->pin->phys_port)); - } - - self->channel = channel; - self->active = 1; - if (args[ARG_freq].u_int != -1) { - pwm_set_freq(args[ARG_freq].u_int, self->channel); - } - if (args[ARG_duty].u_int != -1) { - pwm_set_duty(args[ARG_duty].u_int, self->channel); - } - - pwm_start(); -} - -STATIC mp_obj_t pyb_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - pyb_pin_obj_t *pin = mp_obj_get_pin_obj(args[0]); - - // create PWM object from the given pin - pyb_pwm_obj_t *self = m_new_obj(pyb_pwm_obj_t); - self->base.type = &pyb_pwm_type; - self->pin = pin; - self->active = 0; - self->channel = -1; - - // start the PWM subsystem if it's not already running - if (!pwm_inited) { - pwm_init(); - pwm_inited = true; - } - - // start the PWM running for this channel - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_pwm_init_helper(self, n_args - 1, args + 1, &kw_args); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t pyb_pwm_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_pwm_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pwm_init_obj, 1, pyb_pwm_init); - -STATIC mp_obj_t pyb_pwm_deinit(mp_obj_t self_in) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - pwm_delete(self->channel); - self->active = 0; - pwm_start(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pwm_deinit_obj, pyb_pwm_deinit); - -STATIC mp_obj_t pyb_pwm_freq(size_t n_args, const mp_obj_t *args) { - //pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(pwm_get_freq(0)); - } else { - // set - pwm_set_freq(mp_obj_get_int(args[1]), 0); - pwm_start(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pwm_freq_obj, 1, 2, pyb_pwm_freq); - -STATIC mp_obj_t pyb_pwm_duty(size_t n_args, const mp_obj_t *args) { - pyb_pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]); - if (!self->active) { - pwm_add(self->pin->phys_port, self->pin->periph, self->pin->func); - self->active = 1; - } - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(pwm_get_duty(self->channel)); - } else { - // set - pwm_set_duty(mp_obj_get_int(args[1]), self->channel); - pwm_start(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pwm_duty_obj, 1, 2, pyb_pwm_duty); - -STATIC const mp_rom_map_elem_t pyb_pwm_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_pwm_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_pwm_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_pwm_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty), MP_ROM_PTR(&pyb_pwm_duty_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_pwm_locals_dict, pyb_pwm_locals_dict_table); - -const mp_obj_type_t pyb_pwm_type = { - { &mp_type_type }, - .name = MP_QSTR_PWM, - .print = pyb_pwm_print, - .make_new = pyb_pwm_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_pwm_locals_dict, -}; diff --git a/ports/esp8266/machine_rtc.c b/ports/esp8266/machine_rtc.c deleted file mode 100644 index bbfc172cd8aba..0000000000000 --- a/ports/esp8266/machine_rtc.c +++ /dev/null @@ -1,270 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "lib/timeutils/timeutils.h" -#include "user_interface.h" -#include "modmachine.h" - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; -} pyb_rtc_obj_t; - -#define MEM_MAGIC 0x75507921 -#define MEM_DELTA_ADDR 64 -#define MEM_CAL_ADDR (MEM_DELTA_ADDR + 2) -#define MEM_USER_MAGIC_ADDR (MEM_CAL_ADDR + 1) -#define MEM_USER_LEN_ADDR (MEM_USER_MAGIC_ADDR + 1) -#define MEM_USER_DATA_ADDR (MEM_USER_LEN_ADDR + 1) -#define MEM_USER_MAXLEN (512 - (MEM_USER_DATA_ADDR - MEM_DELTA_ADDR) * 4) - -// singleton RTC object -STATIC const pyb_rtc_obj_t pyb_rtc_obj = {{&pyb_rtc_type}}; - -// ALARM0 state -uint32_t pyb_rtc_alarm0_wake; // see MACHINE_WAKE_xxx constants -uint64_t pyb_rtc_alarm0_expiry; // in microseconds - -// RTC overflow checking -STATIC uint32_t rtc_last_ticks; - -void mp_hal_rtc_init(void) { - uint32_t magic; - - system_rtc_mem_read(MEM_USER_MAGIC_ADDR, &magic, sizeof(magic)); - if (magic != MEM_MAGIC) { - magic = MEM_MAGIC; - system_rtc_mem_write(MEM_USER_MAGIC_ADDR, &magic, sizeof(magic)); - uint32_t cal = system_rtc_clock_cali_proc(); - int64_t delta = 0; - system_rtc_mem_write(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); - uint32_t len = 0; - system_rtc_mem_write(MEM_USER_LEN_ADDR, &len, sizeof(len)); - } - // system_get_rtc_time() is always 0 after reset/deepsleep - rtc_last_ticks = system_get_rtc_time(); - - // reset ALARM0 state - pyb_rtc_alarm0_wake = 0; - pyb_rtc_alarm0_expiry = 0; -} - -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -void pyb_rtc_set_us_since_2000(uint64_t nowus) { - uint32_t cal = system_rtc_clock_cali_proc(); - // Save RTC ticks for overflow detection. - rtc_last_ticks = system_get_rtc_time(); - int64_t delta = nowus - (((uint64_t)rtc_last_ticks * cal) >> 12); - - // As the calibration value jitters quite a bit, to make the - // clock at least somewhat practically usable, we need to store it - system_rtc_mem_write(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); -}; - -uint64_t pyb_rtc_get_us_since_2000() { - uint32_t cal; - int64_t delta; - uint32_t rtc_ticks; - - system_rtc_mem_read(MEM_CAL_ADDR, &cal, sizeof(cal)); - system_rtc_mem_read(MEM_DELTA_ADDR, &delta, sizeof(delta)); - - // ESP-SDK system_get_rtc_time() only returns uint32 and therefore - // overflow about every 7:45h. Thus, we have to check for - // overflow and handle it. - rtc_ticks = system_get_rtc_time(); - if (rtc_ticks < rtc_last_ticks) { - // Adjust delta because of RTC overflow. - delta += (uint64_t)cal << 20; - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); - } - rtc_last_ticks = rtc_ticks; - - return (((uint64_t)rtc_ticks * cal) >> 12) + delta; -}; - -void rtc_prepare_deepsleep(uint64_t sleep_us) { - // RTC time will reset at wake up. Let's be preared for this. - int64_t delta = pyb_rtc_get_us_since_2000() + sleep_us; - system_rtc_mem_write(MEM_DELTA_ADDR, &delta, sizeof(delta)); -} - -STATIC mp_obj_t pyb_rtc_datetime(size_t n_args, const mp_obj_t *args) { - if (n_args == 1) { - // Get time - uint64_t msecs = pyb_rtc_get_us_since_2000() / 1000; - - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(msecs / 1000, &tm); - - mp_obj_t tuple[8] = { - mp_obj_new_int(tm.tm_year), - mp_obj_new_int(tm.tm_mon), - mp_obj_new_int(tm.tm_mday), - mp_obj_new_int(tm.tm_wday), - mp_obj_new_int(tm.tm_hour), - mp_obj_new_int(tm.tm_min), - mp_obj_new_int(tm.tm_sec), - mp_obj_new_int(msecs % 1000) - }; - - return mp_obj_new_tuple(8, tuple); - } else { - // Set time - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 8, &items); - - pyb_rtc_set_us_since_2000( - ((uint64_t)timeutils_seconds_since_2000( - mp_obj_get_int(items[0]), - mp_obj_get_int(items[1]), - mp_obj_get_int(items[2]), - mp_obj_get_int(items[4]), - mp_obj_get_int(items[5]), - mp_obj_get_int(items[6])) * 1000 + mp_obj_get_int(items[7])) * 1000); - - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_datetime_obj, 1, 2, pyb_rtc_datetime); - -STATIC mp_obj_t pyb_rtc_memory(size_t n_args, const mp_obj_t *args) { - uint8_t rtcram[MEM_USER_MAXLEN]; - uint32_t len; - - if (n_args == 1) { - // read RTC memory - - system_rtc_mem_read(MEM_USER_LEN_ADDR, &len, sizeof(len)); - system_rtc_mem_read(MEM_USER_DATA_ADDR, rtcram, (len + 3) & ~3); - - return mp_obj_new_bytes(rtcram, len); - } else { - // write RTC memory - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); - - if (bufinfo.len > MEM_USER_MAXLEN) { - mp_raise_ValueError("buffer too long"); - } - - len = bufinfo.len; - system_rtc_mem_write(MEM_USER_LEN_ADDR, &len, sizeof(len)); - - int i = 0; - for (; i < bufinfo.len; i++) { - rtcram[i] = ((uint8_t *)bufinfo.buf)[i]; - } - - system_rtc_mem_write(MEM_USER_DATA_ADDR, rtcram, (len + 3) & ~3); - - return mp_const_none; - } - -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_memory_obj, 1, 2, pyb_rtc_memory); - -STATIC mp_obj_t pyb_rtc_alarm(mp_obj_t self_in, mp_obj_t alarm_id, mp_obj_t time_in) { - (void)self_in; // unused - - // check we want alarm0 - if (mp_obj_get_int(alarm_id) != 0) { - mp_raise_ValueError("invalid alarm"); - } - - // set expiry time (in microseconds) - pyb_rtc_alarm0_expiry = pyb_rtc_get_us_since_2000() + (uint64_t)mp_obj_get_int(time_in) * 1000; - - return mp_const_none; - -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_rtc_alarm_obj, pyb_rtc_alarm); - -STATIC mp_obj_t pyb_rtc_alarm_left(size_t n_args, const mp_obj_t *args) { - // check we want alarm0 - if (n_args > 1 && mp_obj_get_int(args[1]) != 0) { - mp_raise_ValueError("invalid alarm"); - } - - uint64_t now = pyb_rtc_get_us_since_2000(); - if (pyb_rtc_alarm0_expiry <= now) { - return MP_OBJ_NEW_SMALL_INT(0); - } else { - return mp_obj_new_int((pyb_rtc_alarm0_expiry - now) / 1000); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_alarm_left_obj, 1, 2, pyb_rtc_alarm_left); - -STATIC mp_obj_t pyb_rtc_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_trigger, ARG_wake }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_wake, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // check we want alarm0 - if (args[ARG_trigger].u_int != 0) { - mp_raise_ValueError("invalid alarm"); - } - - // set the wake value - pyb_rtc_alarm0_wake = args[ARG_wake].u_int; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_rtc_irq_obj, 1, pyb_rtc_irq); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&pyb_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_memory), MP_ROM_PTR(&pyb_rtc_memory_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm), MP_ROM_PTR(&pyb_rtc_alarm_obj) }, - { MP_ROM_QSTR(MP_QSTR_alarm_left), MP_ROM_PTR(&pyb_rtc_alarm_left_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_rtc_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_ALARM0), MP_ROM_INT(0) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_rtc_locals_dict, -}; diff --git a/ports/esp8266/machine_uart.c b/ports/esp8266/machine_uart.c deleted file mode 100644 index 28fbfbaffa90c..0000000000000 --- a/ports/esp8266/machine_uart.c +++ /dev/null @@ -1,299 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "ets_sys.h" -#include "espuart.h" - -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "modmachine.h" - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -typedef struct _pyb_uart_obj_t { - mp_obj_base_t base; - uint8_t uart_id; - uint8_t bits; - uint8_t parity; - uint8_t stop; - uint32_t baudrate; - uint16_t timeout; // timeout waiting for first char (in ms) - uint16_t timeout_char; // timeout waiting between chars (in ms) -} pyb_uart_obj_t; - -STATIC const char *_parity_name[] = {"None", "1", "0"}; - -/******************************************************************************/ -// MicroPython bindings for UART - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, timeout=%u, timeout_char=%u)", - self->uart_id, self->baudrate, self->bits, _parity_name[self->parity], - self->stop, self->timeout, self->timeout_char); -} - -STATIC void pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_timeout_char }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 0} }, - //{ MP_QSTR_tx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - //{ MP_QSTR_rx, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set baudrate - if (args[ARG_baudrate].u_int > 0) { - self->baudrate = args[ARG_baudrate].u_int; - UartDev.baut_rate = self->baudrate; // Sic! - } - - // set data bits - switch (args[ARG_bits].u_int) { - case 0: - break; - case 5: - UartDev.data_bits = UART_FIVE_BITS; - self->bits = 5; - break; - case 6: - UartDev.data_bits = UART_SIX_BITS; - self->bits = 6; - break; - case 7: - UartDev.data_bits = UART_SEVEN_BITS; - self->bits = 7; - break; - case 8: - UartDev.data_bits = UART_EIGHT_BITS; - self->bits = 8; - break; - default: - mp_raise_ValueError("invalid data bits"); - break; - } - - // set parity - if (args[ARG_parity].u_obj != MP_OBJ_NULL) { - if (args[ARG_parity].u_obj == mp_const_none) { - UartDev.parity = UART_NONE_BITS; - UartDev.exist_parity = UART_STICK_PARITY_DIS; - self->parity = 0; - } else { - mp_int_t parity = mp_obj_get_int(args[ARG_parity].u_obj); - UartDev.exist_parity = UART_STICK_PARITY_EN; - if (parity & 1) { - UartDev.parity = UART_ODD_BITS; - self->parity = 1; - } else { - UartDev.parity = UART_EVEN_BITS; - self->parity = 2; - } - } - } - - // set stop bits - switch (args[ARG_stop].u_int) { - case 0: - break; - case 1: - UartDev.stop_bits = UART_ONE_STOP_BIT; - self->stop = 1; - break; - case 2: - UartDev.stop_bits = UART_TWO_STOP_BIT; - self->stop = 2; - break; - default: - mp_raise_ValueError("invalid stop bits"); - break; - } - - // set timeout - self->timeout = args[ARG_timeout].u_int; - - // set timeout_char - // make sure it is at least as long as a whole character (13 bits to be safe) - self->timeout_char = args[ARG_timeout_char].u_int; - uint32_t min_timeout_char = 13000 / self->baudrate + 1; - if (self->timeout_char < min_timeout_char) { - self->timeout_char = min_timeout_char; - } - - // setup - uart_setup(self->uart_id); -} - -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get uart id - mp_int_t uart_id = mp_obj_get_int(args[0]); - if (uart_id != 0 && uart_id != 1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) does not exist", uart_id)); - } - - // create instance - pyb_uart_obj_t *self = m_new_obj(pyb_uart_obj_t); - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - self->baudrate = 115200; - self->bits = 8; - self->parity = 0; - self->stop = 1; - self->timeout = 0; - self->timeout_char = 0; - - // init the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self->uart_id)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - - if (self->uart_id == 1) { - mp_raise_msg(&mp_type_OSError, "UART(1) can't read"); - } - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self->timeout * 1000)) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - uint8_t *buf = buf_in; - for (;;) { - *buf++ = uart_rx_char(); - if (--size == 0 || !uart_rx_wait(self->timeout_char * 1000)) { - // return number of bytes read - return buf - (uint8_t*)buf_in; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - const byte *buf = buf_in; - - /* TODO implement non-blocking - // wait to be able to write the first character - if (!uart_tx_wait(self, timeout)) { - *errcode = EAGAIN; - return MP_STREAM_ERROR; - } - */ - - // write the data - for (size_t i = 0; i < size; ++i) { - uart_tx_one_char(self->uart_id, *buf++); - } - - // return number of bytes written - return size; -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self->uart_id)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && uart_tx_any_room(self->uart_id)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict, -}; diff --git a/ports/esp8266/machine_wdt.c b/ports/esp8266/machine_wdt.c deleted file mode 100644 index 4432297fa8962..0000000000000 --- a/ports/esp8266/machine_wdt.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//#include -#include - -#include "py/runtime.h" -#include "user_interface.h" -#include "etshal.h" - -const mp_obj_type_t esp_wdt_type; - -typedef struct _machine_wdt_obj_t { - mp_obj_base_t base; -} machine_wdt_obj_t; - -STATIC machine_wdt_obj_t wdt_default = {{&esp_wdt_type}}; - -STATIC mp_obj_t machine_wdt_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - - mp_int_t id = 0; - if (n_args > 0) { - id = mp_obj_get_int(args[0]); - } - - switch (id) { - case 0: - return &wdt_default; - default: - mp_raise_ValueError(NULL); - } -} - -STATIC mp_obj_t machine_wdt_feed(mp_obj_t self_in) { - (void)self_in; - system_soft_wdt_feed(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_feed_obj, machine_wdt_feed); - -STATIC mp_obj_t machine_wdt_deinit(mp_obj_t self_in) { - (void)self_in; - ets_wdt_disable(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_wdt_deinit_obj, machine_wdt_deinit); - -STATIC const mp_rom_map_elem_t machine_wdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&machine_wdt_feed_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_wdt_deinit_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_wdt_locals_dict, machine_wdt_locals_dict_table); - -const mp_obj_type_t esp_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = machine_wdt_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_wdt_locals_dict, -}; diff --git a/ports/esp8266/main.c b/ports/esp8266/main.c deleted file mode 100644 index c590ab59eb351..0000000000000 --- a/ports/esp8266/main.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/compile.h" -#include "py/frozenmod.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "py/gc.h" -#include "lib/oofatfs/ff.h" -#include "lib/mp-readline/readline.h" -#include "lib/utils/pyexec.h" -#include "gccollect.h" -#include "user_interface.h" -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/pulseio/PWMOut.h" - -STATIC char heap[36 * 1024]; - -bool maybe_run(const char* filename, pyexec_result_t* exec_result) { - mp_import_stat_t stat = mp_import_stat(filename); - if (stat != MP_IMPORT_STAT_FILE) { - return false; - } - mp_hal_stdout_tx_str(filename); - mp_hal_stdout_tx_str(" output:\r\n"); - pyexec_file(filename, exec_result); - return true; -} - -bool serial_active = false; - -STATIC bool start_mp(void) { - pyexec_frozen_module("_boot.py"); - - pyexec_result_t result; - bool found_boot = maybe_run("settings.txt", &result) || - maybe_run("settings.py", &result) || - maybe_run("boot.py", &result) || - maybe_run("boot.txt", &result); - - if (!found_boot || !(result.return_code & PYEXEC_FORCED_EXIT)) { - maybe_run("code.txt", &result) || - maybe_run("code.py", &result) || - maybe_run("main.py", &result) || - maybe_run("main.txt", &result); - } - - if (result.return_code & PYEXEC_FORCED_EXIT) { - return false; - } - - // We can't detect connections so we wait for any character to mark the serial active. - if (!serial_active) { - mp_hal_stdin_rx_chr(); - serial_active = true; - } - mp_hal_stdout_tx_str("\r\n\r\n"); - mp_hal_stdout_tx_str("Press any key to enter the REPL. Use CTRL-D to soft reset.\r\n"); - return mp_hal_stdin_rx_chr() == CHAR_CTRL_D; -} - -STATIC void mp_reset(void) { - mp_stack_set_top((void*)0x40000000); - mp_stack_set_limit(8192); - mp_hal_init(); - gc_init(heap, heap + sizeof(heap)); - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_lib)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_)); - // Frozen modules are in their own pseudo-dir, e.g., ".frozen". - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_FROZEN_FAKE_DIR_QSTR)); - - mp_obj_list_init(mp_sys_argv, 0); - - reset_pins(); - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - extern void esp_native_code_init(void); - esp_native_code_init(); - #endif - pin_init0(); - readline_init0(); - dupterm_task_init(); - pwmout_reset(); -} - -bool soft_reset(void) { - mp_hal_stdout_tx_str("PYB: soft reboot\r\n"); - mp_hal_delay_us(10000); // allow UART to flush output - mp_reset(); - mp_hal_delay_us(1000); // Give the RTOS time to do housekeeping. - return start_mp(); -} - -void init_done(void) { - mp_reset(); - mp_hal_delay_us(1000); // Give the RTOS time to do housekeeping. - bool skip_repl = start_mp(); - mp_hal_stdout_tx_str("\r\n"); - - int exit_code = PYEXEC_FORCED_EXIT; - while (true) { - if (!skip_repl) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - exit_code = pyexec_raw_repl(); - } else { - exit_code = pyexec_friendly_repl(); - } - } - if (exit_code == PYEXEC_FORCED_EXIT) { - skip_repl = soft_reset(); - } else if (exit_code != 0) { - break; - } - } -} - -void user_init(void) { - system_init_done_cb(init_done); -} - -#if !MICROPY_VFS -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - (void)path; - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -#endif - -void MP_FASTCODE(nlr_jump_fail)(void *val) { - printf("NLR jump failed\n"); - for (;;) { - } -} - -//void __assert(const char *file, int line, const char *func, const char *expr) { -void __assert(const char *file, int line, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - for (;;) { - } -} diff --git a/ports/esp8266/makeimg.py b/ports/esp8266/makeimg.py deleted file mode 100644 index 091854fa4d8af..0000000000000 --- a/ports/esp8266/makeimg.py +++ /dev/null @@ -1,40 +0,0 @@ -import sys -import struct -import hashlib - -SEGS_MAX_SIZE = 0x9000 - -assert len(sys.argv) == 4 - -md5 = hashlib.md5() - -with open(sys.argv[3], 'wb') as fout: - - with open(sys.argv[1], 'rb') as f: - data_flash = f.read() - fout.write(data_flash) - # First 4 bytes include flash size, etc. which may be changed - # by esptool.py, etc. - md5.update(data_flash[4:]) - print('flash ', len(data_flash)) - - with open(sys.argv[2], 'rb') as f: - data_rom = f.read() - - pad = b'\xff' * (SEGS_MAX_SIZE - len(data_flash)) - assert len(pad) >= 4 - fout.write(pad[:-4]) - md5.update(pad[:-4]) - len_data = struct.pack("I", SEGS_MAX_SIZE + len(data_rom)) - fout.write(len_data) - md5.update(len_data) - print('padding ', len(pad)) - - fout.write(data_rom) - md5.update(data_rom) - print('irom0text', len(data_rom)) - - fout.write(md5.digest()) - - print('total ', SEGS_MAX_SIZE + len(data_rom)) - print('md5 ', md5.hexdigest()) diff --git a/ports/esp8266/modesp.c b/ports/esp8266/modesp.c deleted file mode 100644 index ec4e73503537b..0000000000000 --- a/ports/esp8266/modesp.c +++ /dev/null @@ -1,360 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "espuart.h" -#include "user_interface.h" -#include "mem.h" -#include "modmachine.h" - -#define MODESP_INCLUDE_CONSTANTS (1) - -void error_check(bool status, const char *msg) { - if (!status) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, msg)); - } -} - -STATIC mp_obj_t esp_osdebug(mp_obj_t val) { - if (val == mp_const_none) { - uart_os_config(-1); - } else { - uart_os_config(mp_obj_get_int(val)); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_osdebug_obj, esp_osdebug); - -STATIC mp_obj_t esp_sleep_type(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - return mp_obj_new_int(wifi_get_sleep_type()); - } else { - wifi_set_sleep_type(mp_obj_get_int(args[0])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_sleep_type_obj, 0, 1, esp_sleep_type); - -STATIC mp_obj_t esp_deepsleep(size_t n_args, const mp_obj_t *args) { - uint32_t sleep_us = n_args > 0 ? mp_obj_get_int(args[0]) : 0; - // prepare for RTC reset at wake up - rtc_prepare_deepsleep(sleep_us); - system_deep_sleep_set_option(n_args > 1 ? mp_obj_get_int(args[1]) : 0); - system_deep_sleep(sleep_us); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_deepsleep_obj, 0, 2, esp_deepsleep); - -STATIC mp_obj_t esp_flash_id() { - return mp_obj_new_int(spi_flash_get_id()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_id_obj, esp_flash_id); - -STATIC mp_obj_t esp_flash_read(mp_obj_t offset_in, mp_obj_t len_or_buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - - mp_int_t len; - byte *buf; - bool alloc_buf = MP_OBJ_IS_INT(len_or_buf_in); - - if (alloc_buf) { - len = mp_obj_get_int(len_or_buf_in); - buf = m_new(byte, len); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(len_or_buf_in, &bufinfo, MP_BUFFER_WRITE); - len = bufinfo.len; - buf = bufinfo.buf; - } - - // We know that allocation will be 4-byte aligned for sure - SpiFlashOpResult res = spi_flash_read(offset, (uint32_t*)buf, len); - if (res == SPI_FLASH_RESULT_OK) { - if (alloc_buf) { - return mp_obj_new_bytes(buf, len); - } - return mp_const_none; - } - if (alloc_buf) { - m_del(byte, buf, len); - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_read_obj, esp_flash_read); - -STATIC mp_obj_t esp_flash_write(mp_obj_t offset_in, const mp_obj_t buf_in) { - mp_int_t offset = mp_obj_get_int(offset_in); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len & 0x3) { - mp_raise_ValueError("len must be multiple of 4"); - } - SpiFlashOpResult res = spi_flash_write(offset, bufinfo.buf, bufinfo.len); - if (res == SPI_FLASH_RESULT_OK) { - return mp_const_none; - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_flash_write_obj, esp_flash_write); - -STATIC mp_obj_t esp_flash_erase(mp_obj_t sector_in) { - mp_int_t sector = mp_obj_get_int(sector_in); - SpiFlashOpResult res = spi_flash_erase_sector(sector); - if (res == SPI_FLASH_RESULT_OK) { - return mp_const_none; - } - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_flash_erase_obj, esp_flash_erase); - -STATIC mp_obj_t esp_flash_size(void) { - extern char flashchip; - // For SDK 1.5.2, either address has shifted and not mirrored in - // eagle.rom.addr.v6.ld, or extra initial member was added. - SpiFlashChip *flash = (SpiFlashChip*)(&flashchip + 4); - #if 0 - printf("deviceId: %x\n", flash->deviceId); - printf("chip_size: %u\n", flash->chip_size); - printf("block_size: %u\n", flash->block_size); - printf("sector_size: %u\n", flash->sector_size); - printf("page_size: %u\n", flash->page_size); - printf("status_mask: %u\n", flash->status_mask); - #endif - return mp_obj_new_int_from_uint(flash->chip_size); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_size_obj, esp_flash_size); - -// If there's just 1 loadable segment at the start of flash, -// we assume there's a yaota8266 bootloader. -#define IS_OTA_FIRMWARE() ((*(uint32_t*)0x40200000 & 0xff00) == 0x100) - -extern byte _firmware_size[]; - -STATIC mp_obj_t esp_flash_user_start(void) { - return MP_OBJ_NEW_SMALL_INT((uint32_t)_firmware_size); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_flash_user_start_obj, esp_flash_user_start); - -STATIC mp_obj_t esp_check_fw(void) { - MD5_CTX ctx; - char *fw_start = (char*)0x40200000; - if (IS_OTA_FIRMWARE()) { - // Skip yaota8266 bootloader - fw_start += 0x3c000; - } - - uint32_t size = *(uint32_t*)(fw_start + 0x8ffc); - printf("size: %d\n", size); - if (size > 1024 * 1024) { - printf("Invalid size\n"); - return mp_const_false; - } - MD5Init(&ctx); - MD5Update(&ctx, fw_start + 4, size - 4); - unsigned char digest[16]; - MD5Final(digest, &ctx); - printf("md5: "); - for (int i = 0; i < 16; i++) { - printf("%02x", digest[i]); - } - printf("\n"); - return mp_obj_new_bool(memcmp(digest, fw_start + size, sizeof(digest)) == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_check_fw_obj, esp_check_fw); - -STATIC mp_obj_t esp_freemem() { - return MP_OBJ_NEW_SMALL_INT(system_get_free_heap_size()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_freemem_obj, esp_freemem); - -STATIC mp_obj_t esp_meminfo() { - system_print_meminfo(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(esp_meminfo_obj, esp_meminfo); - -STATIC mp_obj_t esp_malloc(mp_obj_t size_in) { - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)os_malloc(mp_obj_get_int(size_in))); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_malloc_obj, esp_malloc); - -STATIC mp_obj_t esp_free(mp_obj_t addr_in) { - os_free((void*)mp_obj_get_int(addr_in)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_free_obj, esp_free); - -STATIC mp_obj_t esp_esf_free_bufs(mp_obj_t idx_in) { - return MP_OBJ_NEW_SMALL_INT(ets_esf_free_bufs(mp_obj_get_int(idx_in))); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_esf_free_bufs_obj, esp_esf_free_bufs); - -#if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - -// We provide here a way of committing executable data to a region from -// which it can be executed by the CPU. There are 2 such writable regions: -// - iram1, which may have some space left at the end of it -// - memory-mapped flash rom -// -// By default the iram1 region (the space at the end of it) is used. The -// user can select iram1 or a section of flash by calling the -// esp.set_native_code_location() function; see below. If flash is selected -// then it is erased as needed. - -#include "gccollect.h" - -#define IRAM1_END (0x40108000) -#define FLASH_START (0x40200000) -#define FLASH_END (0x40300000) -#define FLASH_SEC_SIZE (4096) - -#define ESP_NATIVE_CODE_IRAM1 (0) -#define ESP_NATIVE_CODE_FLASH (1) - -extern uint32_t _lit4_end; -STATIC uint32_t esp_native_code_location; -STATIC uint32_t esp_native_code_start; -STATIC uint32_t esp_native_code_end; -STATIC uint32_t esp_native_code_cur; -STATIC uint32_t esp_native_code_erased; - -void esp_native_code_init(void) { - esp_native_code_location = ESP_NATIVE_CODE_IRAM1; - esp_native_code_start = (uint32_t)&_lit4_end; - esp_native_code_end = IRAM1_END; - esp_native_code_cur = esp_native_code_start; - esp_native_code_erased = 0; -} - -void esp_native_code_gc_collect(void) { - void *src; - if (esp_native_code_location == ESP_NATIVE_CODE_IRAM1) { - src = (void*)esp_native_code_start; - } else { - src = (void*)(FLASH_START + esp_native_code_start); - } - gc_collect_root(src, (esp_native_code_end - esp_native_code_start) / sizeof(uint32_t)); -} - -void *esp_native_code_commit(void *buf, size_t len) { - //printf("COMMIT(buf=%p, len=%u, start=%08x, cur=%08x, end=%08x, erased=%08x)\n", buf, len, esp_native_code_start, esp_native_code_cur, esp_native_code_end, esp_native_code_erased); - - len = (len + 3) & ~3; - if (esp_native_code_cur + len > esp_native_code_end) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_MemoryError, - "memory allocation failed, allocating %u bytes for native code", (uint)len)); - } - - void *dest; - if (esp_native_code_location == ESP_NATIVE_CODE_IRAM1) { - dest = (void*)esp_native_code_cur; - memcpy(dest, buf, len); - } else { - SpiFlashOpResult res; - while (esp_native_code_erased < esp_native_code_cur + len) { - res = spi_flash_erase_sector(esp_native_code_erased / FLASH_SEC_SIZE); - if (res != SPI_FLASH_RESULT_OK) { - break; - } - esp_native_code_erased += FLASH_SEC_SIZE; - } - if (res == SPI_FLASH_RESULT_OK) { - res = spi_flash_write(esp_native_code_cur, buf, len); - } - if (res != SPI_FLASH_RESULT_OK) { - mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO); - } - dest = (void*)(FLASH_START + esp_native_code_cur); - } - - esp_native_code_cur += len; - - return dest; -} - -STATIC mp_obj_t esp_set_native_code_location(mp_obj_t start_in, mp_obj_t len_in) { - if (start_in == mp_const_none && len_in == mp_const_none) { - // use end of iram1 region - esp_native_code_init(); - } else { - // use flash; input params are byte offsets from start of flash - esp_native_code_location = ESP_NATIVE_CODE_FLASH; - esp_native_code_start = mp_obj_get_int(start_in); - esp_native_code_end = esp_native_code_start + mp_obj_get_int(len_in); - esp_native_code_cur = esp_native_code_start; - esp_native_code_erased = esp_native_code_start; - // memory-mapped flash is limited in extents to 1MByte - if (esp_native_code_end > FLASH_END - FLASH_START) { - mp_raise_ValueError("flash location must be below 1MByte"); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(esp_set_native_code_location_obj, esp_set_native_code_location); - -#endif - -STATIC const mp_rom_map_elem_t esp_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_esp) }, - - { MP_ROM_QSTR(MP_QSTR_osdebug), MP_ROM_PTR(&esp_osdebug_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_type), MP_ROM_PTR(&esp_sleep_type_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&esp_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_id), MP_ROM_PTR(&esp_flash_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_read), MP_ROM_PTR(&esp_flash_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_write), MP_ROM_PTR(&esp_flash_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_erase), MP_ROM_PTR(&esp_flash_erase_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_size), MP_ROM_PTR(&esp_flash_size_obj) }, - { MP_ROM_QSTR(MP_QSTR_flash_user_start), MP_ROM_PTR(&esp_flash_user_start_obj) }, - { MP_ROM_QSTR(MP_QSTR_freemem), MP_ROM_PTR(&esp_freemem_obj) }, - { MP_ROM_QSTR(MP_QSTR_meminfo), MP_ROM_PTR(&esp_meminfo_obj) }, - { MP_ROM_QSTR(MP_QSTR_check_fw), MP_ROM_PTR(&esp_check_fw_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_info_obj) }, // TODO delete/rename/move elsewhere - { MP_ROM_QSTR(MP_QSTR_malloc), MP_ROM_PTR(&esp_malloc_obj) }, - { MP_ROM_QSTR(MP_QSTR_free), MP_ROM_PTR(&esp_free_obj) }, - { MP_ROM_QSTR(MP_QSTR_esf_free_bufs), MP_ROM_PTR(&esp_esf_free_bufs_obj) }, - #if MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA - { MP_ROM_QSTR(MP_QSTR_set_native_code_location), MP_ROM_PTR(&esp_set_native_code_location_obj) }, - #endif - -#if MODESP_INCLUDE_CONSTANTS - { MP_ROM_QSTR(MP_QSTR_SLEEP_NONE), MP_ROM_INT(NONE_SLEEP_T) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP_LIGHT), MP_ROM_INT(LIGHT_SLEEP_T) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP_MODEM), MP_ROM_INT(MODEM_SLEEP_T) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(esp_module_globals, esp_module_globals_table); - -const mp_obj_module_t esp_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&esp_module_globals, -}; diff --git a/ports/esp8266/modmachine.c b/ports/esp8266/modmachine.c deleted file mode 100644 index 99286848e270a..0000000000000 --- a/ports/esp8266/modmachine.c +++ /dev/null @@ -1,279 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "modmachine.h" - -#include "xtirq.h" -#include "os_type.h" -#include "osapi.h" -#include "etshal.h" -#include "ets_alt_task.h" -#include "user_interface.h" - -#if MICROPY_PY_MACHINE - -//#define MACHINE_WAKE_IDLE (0x01) -//#define MACHINE_WAKE_SLEEP (0x02) -#define MACHINE_WAKE_DEEPSLEEP (0x04) - -extern const mp_obj_type_t esp_wdt_type; - -STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // get - return mp_obj_new_int(system_get_cpu_freq() * 1000000); - } else { - // set - mp_int_t freq = mp_obj_get_int(args[0]) / 1000000; - if (freq != 80 && freq != 160) { - mp_raise_ValueError("frequency can only be either 80Mhz or 160MHz"); - } - system_update_cpu_freq(freq); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 1, machine_freq); - -STATIC mp_obj_t machine_reset(void) { - system_restart(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_reset_cause(void) { - return MP_OBJ_NEW_SMALL_INT(system_get_rst_info()->reason); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC mp_obj_t machine_unique_id(void) { - uint32_t id = system_get_chip_id(); - return mp_obj_new_bytes((byte*)&id, sizeof(id)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -STATIC mp_obj_t machine_idle(void) { - uint32_t t = mp_hal_ticks_cpu(); - asm("waiti 0"); - t = mp_hal_ticks_cpu() - t; - return MP_OBJ_NEW_SMALL_INT(t); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle); - -STATIC mp_obj_t machine_sleep(void) { - printf("Warning: not yet implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(void) { - // default to sleep forever - uint32_t sleep_us = 0; - - // see if RTC.ALARM0 should wake the device - if (pyb_rtc_alarm0_wake & MACHINE_WAKE_DEEPSLEEP) { - uint64_t t = pyb_rtc_get_us_since_2000(); - if (pyb_rtc_alarm0_expiry <= t) { - sleep_us = 1; // alarm already expired so wake immediately - } else { - uint64_t delta = pyb_rtc_alarm0_expiry - t; - if (delta <= 0xffffffff) { - // sleep for the desired time - sleep_us = delta; - } else { - // overflow, just set to maximum sleep time - sleep_us = 0xffffffff; - } - } - } - - // prepare for RTC reset at wake up - rtc_prepare_deepsleep(sleep_us); - // put the device in a deep-sleep state - system_deep_sleep_set_option(0); // default power down mode; TODO check this - system_deep_sleep(sleep_us); - - for (;;) { - // we must not return - ets_loop_iter(); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -typedef struct _esp_timer_obj_t { - mp_obj_base_t base; - os_timer_t timer; - mp_obj_t callback; -} esp_timer_obj_t; - -const mp_obj_type_t esp_timer_type; - -STATIC void esp_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - esp_timer_obj_t *self = self_in; - mp_printf(print, "Timer(%p)", &self->timer); -} - -STATIC mp_obj_t esp_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - esp_timer_obj_t *tim = m_new_obj(esp_timer_obj_t); - tim->base.type = &esp_timer_type; - return tim; -} - -STATIC void esp_timer_cb(void *arg) { - esp_timer_obj_t *self = arg; - mp_sched_schedule(self->callback, self); -} - -STATIC mp_obj_t esp_timer_init_helper(esp_timer_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { -// { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - self->callback = args[2].u_obj; - // Be sure to disarm timer before making any changes - os_timer_disarm(&self->timer); - os_timer_setfn(&self->timer, esp_timer_cb, self); - os_timer_arm(&self->timer, args[0].u_int, args[1].u_int); - - return mp_const_none; -} - -STATIC mp_obj_t esp_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return esp_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_timer_init_obj, 1, esp_timer_init); - -STATIC mp_obj_t esp_timer_deinit(mp_obj_t self_in) { - esp_timer_obj_t *self = self_in; - os_timer_disarm(&self->timer); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_timer_deinit_obj, esp_timer_deinit); - -STATIC const mp_rom_map_elem_t esp_timer_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&esp_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&esp_timer_init_obj) }, -// { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&esp_timer_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_ONE_SHOT), MP_ROM_INT(false) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(true) }, -}; -STATIC MP_DEFINE_CONST_DICT(esp_timer_locals_dict, esp_timer_locals_dict_table); - -const mp_obj_type_t esp_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = esp_timer_print, - .make_new = esp_timer_make_new, - .locals_dict = (mp_obj_dict_t*)&esp_timer_locals_dict, -}; - -// this bit is unused in the Xtensa PS register -#define ETS_LOOP_ITER_BIT (12) - -STATIC mp_obj_t machine_disable_irq(void) { - uint32_t state = disable_irq(); - state = (state & ~(1 << ETS_LOOP_ITER_BIT)) | (ets_loop_iter_disable << ETS_LOOP_ITER_BIT); - ets_loop_iter_disable = 1; - return mp_obj_new_int(state); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq); - -STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) { - uint32_t state = mp_obj_get_int(state_in); - ets_loop_iter_disable = (state >> ETS_LOOP_ITER_BIT) & 1; - enable_irq(state & ~(1 << ETS_LOOP_ITER_BIT)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, - - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&esp_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&esp_wdt_type) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pyb_pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&pyb_pwm_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hspi_type) }, - - // wake abilities - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(MACHINE_WAKE_DEEPSLEEP) }, - - // reset causes - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(REASON_EXT_SYS_RST) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(REASON_DEEP_SLEEP_AWAKE) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(REASON_WDT_RST) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(REASON_SOFT_RESTART) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - -#endif // MICROPY_PY_MACHINE diff --git a/ports/esp8266/modmachine.h b/ports/esp8266/modmachine.h deleted file mode 100644 index eae351f68d3bf..0000000000000 --- a/ports/esp8266/modmachine.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef MICROPY_INCLUDED_ESP8266_MODMACHINE_H -#define MICROPY_INCLUDED_ESP8266_MODMACHINE_H - -#include "py/obj.h" - -extern const mp_obj_type_t pyb_pin_type; -extern const mp_obj_type_t pyb_pwm_type; -extern const mp_obj_type_t pyb_adc_type; -extern const mp_obj_type_t pyb_rtc_type; -extern const mp_obj_type_t pyb_uart_type; -extern const mp_obj_type_t pyb_i2c_type; -extern const mp_obj_type_t machine_hspi_type; - -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj); - -typedef struct _pyb_pin_obj_t { - mp_obj_base_t base; - uint16_t phys_port; - uint16_t func; - uint32_t periph; -} pyb_pin_obj_t; - -const pyb_pin_obj_t pyb_pin_obj[16 + 1]; - -void pin_init0(void); -void pin_intr_handler_iram(void *arg); -void pin_intr_handler(uint32_t); - -uint mp_obj_get_pin(mp_obj_t pin_in); -pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in); -int pin_get(uint pin); -void pin_set(uint pin, int value); - -extern uint32_t pyb_rtc_alarm0_wake; -extern uint64_t pyb_rtc_alarm0_expiry; - -void pyb_rtc_set_us_since_2000(uint64_t nowus); -uint64_t pyb_rtc_get_us_since_2000(); -void rtc_prepare_deepsleep(uint64_t sleep_us); - -#endif // MICROPY_INCLUDED_ESP8266_MODMACHINE_H diff --git a/ports/esp8266/modnetwork.c b/ports/esp8266/modnetwork.c deleted file mode 100644 index b41a11f596e90..0000000000000 --- a/ports/esp8266/modnetwork.c +++ /dev/null @@ -1,513 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015-2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "queue.h" -#include "user_interface.h" -#include "espconn.h" -#include "spi_flash.h" -#include "ets_alt_task.h" -#include "lwip/dns.h" - -#define MODNETWORK_INCLUDE_CONSTANTS (1) - -typedef struct _wlan_if_obj_t { - mp_obj_base_t base; - int if_id; -} wlan_if_obj_t; - -void error_check(bool status, const char *msg); -const mp_obj_type_t wlan_if_type; - -STATIC const wlan_if_obj_t wlan_objs[] = { - {{&wlan_if_type}, STATION_IF}, - {{&wlan_if_type}, SOFTAP_IF}, -}; - -STATIC void require_if(mp_obj_t wlan_if, int if_no) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(wlan_if); - if (self->if_id != if_no) { - error_check(false, if_no == STATION_IF ? "STA required" : "AP required"); - } -} - -STATIC mp_obj_t get_wlan(size_t n_args, const mp_obj_t *args) { - int idx = 0; - if (n_args > 0) { - idx = mp_obj_get_int(args[0]); - } - return MP_OBJ_FROM_PTR(&wlan_objs[idx]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(get_wlan_obj, 0, 1, get_wlan); - -STATIC mp_obj_t esp_active(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - uint32_t mode = wifi_get_opmode(); - if (n_args > 1) { - int mask = self->if_id == STATION_IF ? STATION_MODE : SOFTAP_MODE; - if (mp_obj_get_int(args[1]) != 0) { - mode |= mask; - } else { - mode &= ~mask; - } - error_check(wifi_set_opmode(mode), "Cannot update i/f status"); - return mp_const_none; - } - - // Get active status - if (self->if_id == STATION_IF) { - return mp_obj_new_bool(mode & STATION_MODE); - } else { - return mp_obj_new_bool(mode & SOFTAP_MODE); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_active_obj, 1, 2, esp_active); - -STATIC mp_obj_t esp_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_ssid, ARG_password, ARG_bssid }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - require_if(pos_args[0], STATION_IF); - struct station_config config = {{0}}; - size_t len; - const char *p; - bool set_config = false; - - // set parameters based on given args - if (args[ARG_ssid].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_ssid].u_obj, &len); - len = MIN(len, sizeof(config.ssid)); - memcpy(config.ssid, p, len); - set_config = true; - } - if (args[ARG_password].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_password].u_obj, &len); - len = MIN(len, sizeof(config.password)); - memcpy(config.password, p, len); - set_config = true; - } - if (args[ARG_bssid].u_obj != mp_const_none) { - p = mp_obj_str_get_data(args[ARG_bssid].u_obj, &len); - if (len != sizeof(config.bssid)) { - mp_raise_ValueError(NULL); - } - config.bssid_set = 1; - memcpy(config.bssid, p, sizeof(config.bssid)); - set_config = true; - } - - if (set_config) { - error_check(wifi_station_set_config(&config), "Cannot set STA config"); - } - error_check(wifi_station_connect(), "Cannot connect to AP"); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_connect_obj, 1, esp_connect); - -STATIC mp_obj_t esp_disconnect(mp_obj_t self_in) { - require_if(self_in, STATION_IF); - error_check(wifi_station_disconnect(), "Cannot disconnect from AP"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_disconnect_obj, esp_disconnect); - -STATIC mp_obj_t esp_status(mp_obj_t self_in) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (self->if_id == STATION_IF) { - return MP_OBJ_NEW_SMALL_INT(wifi_station_get_connect_status()); - } - return MP_OBJ_NEW_SMALL_INT(-1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_status_obj, esp_status); - -STATIC mp_obj_t *esp_scan_list = NULL; - -STATIC void esp_scan_cb(void *result, STATUS status) { - if (esp_scan_list == NULL) { - // called unexpectedly - return; - } - if (result && status == 0) { - // we need to catch any memory errors - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - for (struct bss_info *bs = result; bs; bs = STAILQ_NEXT(bs, next)) { - mp_obj_tuple_t *t = mp_obj_new_tuple(6, NULL); - #if 1 - // struct bss_info::ssid_len is not documented in SDK API Guide, - // but is present in SDK headers since 1.4.0 - t->items[0] = mp_obj_new_bytes(bs->ssid, bs->ssid_len); - #else - t->items[0] = mp_obj_new_bytes(bs->ssid, strlen((char*)bs->ssid)); - #endif - t->items[1] = mp_obj_new_bytes(bs->bssid, sizeof(bs->bssid)); - t->items[2] = MP_OBJ_NEW_SMALL_INT(bs->channel); - t->items[3] = MP_OBJ_NEW_SMALL_INT(bs->rssi); - t->items[4] = MP_OBJ_NEW_SMALL_INT(bs->authmode); - t->items[5] = MP_OBJ_NEW_SMALL_INT(bs->is_hidden); - mp_obj_list_append(*esp_scan_list, MP_OBJ_FROM_PTR(t)); - } - nlr_pop(); - } else { - mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val)); - // indicate error - *esp_scan_list = MP_OBJ_NULL; - } - } else { - // indicate error - *esp_scan_list = MP_OBJ_NULL; - } - esp_scan_list = NULL; -} - -STATIC mp_obj_t esp_scan(mp_obj_t self_in) { - require_if(self_in, STATION_IF); - if ((wifi_get_opmode() & STATION_MODE) == 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "STA must be active")); - } - mp_obj_t list = mp_obj_new_list(0, NULL); - esp_scan_list = &list; - wifi_station_scan(NULL, (scan_done_cb_t)esp_scan_cb); - while (esp_scan_list != NULL) { - // our esp_scan_cb is called via ets_loop_iter so it's safe to set the - // esp_scan_list variable to NULL without disabling interrupts - if (MP_STATE_VM(mp_pending_exception) != NULL) { - esp_scan_list = NULL; - mp_obj_t obj = MP_STATE_VM(mp_pending_exception); - MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; - nlr_raise(obj); - } - ets_loop_iter(); - } - if (list == MP_OBJ_NULL) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "scan failed")); - } - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_scan_obj, esp_scan); - -/// \method isconnected() -/// Return True if connected to an AP and an IP address has been assigned, -/// false otherwise. -STATIC mp_obj_t esp_isconnected(mp_obj_t self_in) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (self->if_id == STATION_IF) { - if (wifi_station_get_connect_status() == STATION_GOT_IP) { - return mp_const_true; - } - } else { - if (wifi_softap_get_station_num() > 0) { - return mp_const_true; - } - } - return mp_const_false; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(esp_isconnected_obj, esp_isconnected); - -STATIC mp_obj_t esp_ifconfig(size_t n_args, const mp_obj_t *args) { - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - struct ip_info info; - ip_addr_t dns_addr; - wifi_get_ip_info(self->if_id, &info); - if (n_args == 1) { - // get - dns_addr = dns_getserver(0); - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr((uint8_t*)&info.ip, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.netmask, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&info.gw, NETUTILS_BIG), - netutils_format_ipv4_addr((uint8_t*)&dns_addr, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_obj_t *items; - bool restart_dhcp_server = false; - mp_obj_get_array_fixed_n(args[1], 4, &items); - netutils_parse_ipv4_addr(items[0], (void*)&info.ip, NETUTILS_BIG); - if (mp_obj_is_integer(items[1])) { - // allow numeric netmask, i.e.: - // 24 -> 255.255.255.0 - // 16 -> 255.255.0.0 - // etc... - uint32_t* m = (uint32_t*)&info.netmask; - *m = htonl(0xffffffff << (32 - mp_obj_get_int(items[1]))); - } else { - netutils_parse_ipv4_addr(items[1], (void*)&info.netmask, NETUTILS_BIG); - } - netutils_parse_ipv4_addr(items[2], (void*)&info.gw, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[3], (void*)&dns_addr, NETUTILS_BIG); - // To set a static IP we have to disable DHCP first - if (self->if_id == STATION_IF) { - wifi_station_dhcpc_stop(); - } else { - restart_dhcp_server = wifi_softap_dhcps_status(); - wifi_softap_dhcps_stop(); - } - if (!wifi_set_ip_info(self->if_id, &info)) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, - "wifi_set_ip_info() failed")); - } - dns_setserver(0, &dns_addr); - if (restart_dhcp_server) { - wifi_softap_dhcps_start(); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_ifconfig_obj, 1, 2, esp_ifconfig); - -STATIC mp_obj_t esp_config(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - if (n_args != 1 && kwargs->used != 0) { - mp_raise_TypeError("either pos or kw args are allowed"); - } - - wlan_if_obj_t *self = MP_OBJ_TO_PTR(args[0]); - union { - struct station_config sta; - struct softap_config ap; - } cfg; - - if (self->if_id == STATION_IF) { - error_check(wifi_station_get_config(&cfg.sta), "can't get STA config"); - } else { - error_check(wifi_softap_get_config(&cfg.ap), "can't get AP config"); - } - - int req_if = -1; - - if (kwargs->used != 0) { - - for (mp_uint_t i = 0; i < kwargs->alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(kwargs, i)) { - #define QS(x) (uintptr_t)MP_OBJ_NEW_QSTR(x) - switch ((uintptr_t)kwargs->table[i].key) { - case QS(MP_QSTR_mac): { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(kwargs->table[i].value, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len != 6) { - mp_raise_ValueError("invalid buffer length"); - } - wifi_set_macaddr(self->if_id, bufinfo.buf); - break; - } - case QS(MP_QSTR_essid): { - req_if = SOFTAP_IF; - size_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.ssid)); - memcpy(cfg.ap.ssid, s, len); - cfg.ap.ssid_len = len; - break; - } - case QS(MP_QSTR_hidden): { - req_if = SOFTAP_IF; - cfg.ap.ssid_hidden = mp_obj_is_true(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_authmode): { - req_if = SOFTAP_IF; - cfg.ap.authmode = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_password): { - req_if = SOFTAP_IF; - size_t len; - const char *s = mp_obj_str_get_data(kwargs->table[i].value, &len); - len = MIN(len, sizeof(cfg.ap.password) - 1); - memcpy(cfg.ap.password, s, len); - cfg.ap.password[len] = 0; - break; - } - case QS(MP_QSTR_channel): { - req_if = SOFTAP_IF; - cfg.ap.channel = mp_obj_get_int(kwargs->table[i].value); - break; - } - case QS(MP_QSTR_dhcp_hostname): { - req_if = STATION_IF; - if (self->if_id == STATION_IF) { - const char *s = mp_obj_str_get_str(kwargs->table[i].value); - wifi_station_set_hostname((char*)s); - } - break; - } - default: - goto unknown; - } - #undef QS - } - } - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - - if (self->if_id == STATION_IF) { - error_check(wifi_station_set_config(&cfg.sta), "can't set STA config"); - } else { - error_check(wifi_softap_set_config(&cfg.ap), "can't set AP config"); - } - - return mp_const_none; - } - - // Get config - - if (n_args != 2) { - mp_raise_TypeError("can query only one param"); - } - - mp_obj_t val; - - #define QS(x) (uintptr_t)MP_OBJ_NEW_QSTR(x) - switch ((uintptr_t)args[1]) { - case QS(MP_QSTR_mac): { - uint8_t mac[6]; - wifi_get_macaddr(self->if_id, mac); - return mp_obj_new_bytes(mac, sizeof(mac)); - } - case QS(MP_QSTR_essid): - req_if = SOFTAP_IF; - val = mp_obj_new_str((char*)cfg.ap.ssid, cfg.ap.ssid_len, false); - break; - case QS(MP_QSTR_hidden): - req_if = SOFTAP_IF; - val = mp_obj_new_bool(cfg.ap.ssid_hidden); - break; - case QS(MP_QSTR_authmode): - req_if = SOFTAP_IF; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.authmode); - break; - case QS(MP_QSTR_channel): - req_if = SOFTAP_IF; - val = MP_OBJ_NEW_SMALL_INT(cfg.ap.channel); - break; - case QS(MP_QSTR_dhcp_hostname): { - req_if = STATION_IF; - char* s = wifi_station_get_hostname(); - val = mp_obj_new_str(s, strlen(s), false); - break; - } - default: - goto unknown; - } - #undef QS - - // We post-check interface requirements to save on code size - if (req_if >= 0) { - require_if(args[0], req_if); - } - - return val; - -unknown: - mp_raise_ValueError("unknown config param"); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(esp_config_obj, 1, esp_config); - -STATIC const mp_rom_map_elem_t wlan_if_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_active), MP_ROM_PTR(&esp_active_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&esp_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&esp_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_status), MP_ROM_PTR(&esp_status_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&esp_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&esp_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_config), MP_ROM_PTR(&esp_config_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&esp_ifconfig_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wlan_if_locals_dict, wlan_if_locals_dict_table); - -const mp_obj_type_t wlan_if_type = { - { &mp_type_type }, - .name = MP_QSTR_WLAN, - .locals_dict = (mp_obj_dict_t*)&wlan_if_locals_dict, -}; - -STATIC mp_obj_t esp_phy_mode(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - return mp_obj_new_int(wifi_get_phy_mode()); - } else { - wifi_set_phy_mode(mp_obj_get_int(args[0])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(esp_phy_mode_obj, 0, 1, esp_phy_mode); - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&get_wlan_obj) }, - { MP_ROM_QSTR(MP_QSTR_phy_mode), MP_ROM_PTR(&esp_phy_mode_obj) }, - -#if MODNETWORK_INCLUDE_CONSTANTS - { MP_ROM_QSTR(MP_QSTR_STA_IF), MP_ROM_INT(STATION_IF)}, - { MP_ROM_QSTR(MP_QSTR_AP_IF), MP_ROM_INT(SOFTAP_IF)}, - - { MP_ROM_QSTR(MP_QSTR_STAT_IDLE), MP_ROM_INT(STATION_IDLE)}, - { MP_ROM_QSTR(MP_QSTR_STAT_CONNECTING), MP_ROM_INT(STATION_CONNECTING)}, - { MP_ROM_QSTR(MP_QSTR_STAT_WRONG_PASSWORD), MP_ROM_INT(STATION_WRONG_PASSWORD)}, - { MP_ROM_QSTR(MP_QSTR_STAT_NO_AP_FOUND), MP_ROM_INT(STATION_NO_AP_FOUND)}, - { MP_ROM_QSTR(MP_QSTR_STAT_CONNECT_FAIL), MP_ROM_INT(STATION_CONNECT_FAIL)}, - { MP_ROM_QSTR(MP_QSTR_STAT_GOT_IP), MP_ROM_INT(STATION_GOT_IP)}, - - { MP_ROM_QSTR(MP_QSTR_MODE_11B), MP_ROM_INT(PHY_MODE_11B) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11G), MP_ROM_INT(PHY_MODE_11G) }, - { MP_ROM_QSTR(MP_QSTR_MODE_11N), MP_ROM_INT(PHY_MODE_11N) }, - - { MP_ROM_QSTR(MP_QSTR_AUTH_OPEN), MP_ROM_INT(AUTH_OPEN) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WEP), MP_ROM_INT(AUTH_WEP) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_PSK), MP_ROM_INT(AUTH_WPA_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA2_PSK), MP_ROM_INT(AUTH_WPA2_PSK) }, - { MP_ROM_QSTR(MP_QSTR_AUTH_WPA_WPA2_PSK), MP_ROM_INT(AUTH_WPA_WPA2_PSK) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t network_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; diff --git a/ports/esp8266/modpyb.c b/ports/esp8266/modpyb.c deleted file mode 100644 index 0a23f6f9da115..0000000000000 --- a/ports/esp8266/modpyb.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "gccollect.h" -#include "modmachine.h" - -// The pyb module no longer exists since all functionality now appears -// elsewhere, in more standard places (eg time, machine modules). The -// only remaining function is pyb.info() which has been moved to the -// esp module, pending deletion/renaming/moving elsewhere. - -STATIC mp_obj_t pyb_info(size_t n_args, const mp_obj_t *args) { - // print info about memory - { - printf("_text_start=%p\n", &_text_start); - printf("_text_end=%p\n", &_text_end); - printf("_irom0_text_start=%p\n", &_irom0_text_start); - printf("_irom0_text_end=%p\n", &_irom0_text_end); - printf("_data_start=%p\n", &_data_start); - printf("_data_end=%p\n", &_data_end); - printf("_rodata_start=%p\n", &_rodata_start); - printf("_rodata_end=%p\n", &_rodata_end); - printf("_bss_start=%p\n", &_bss_start); - printf("_bss_end=%p\n", &_bss_end); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - } - - // qstr info - { - mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info); diff --git a/ports/esp8266/modules/_boot.py b/ports/esp8266/modules/_boot.py deleted file mode 100644 index cbaf2aba66dbd..0000000000000 --- a/ports/esp8266/modules/_boot.py +++ /dev/null @@ -1,14 +0,0 @@ -import gc -gc.threshold((gc.mem_free() + gc.mem_alloc()) // 4) -from flashbdev import bdev -import storage - -try: - if bdev: - vfs = storage.VfsFat(bdev) - storage.mount(vfs, '/') -except OSError: - import inisetup - inisetup.setup() - -gc.collect() diff --git a/ports/esp8266/modules/flashbdev.py b/ports/esp8266/modules/flashbdev.py deleted file mode 100644 index 40ba655c64d10..0000000000000 --- a/ports/esp8266/modules/flashbdev.py +++ /dev/null @@ -1,35 +0,0 @@ -import esp - -class FlashBdev: - - SEC_SIZE = 4096 - RESERVED_SECS = 1 - START_SEC = esp.flash_user_start() // SEC_SIZE + RESERVED_SECS - NUM_BLK = 0x6b - RESERVED_SECS - - def __init__(self, blocks=NUM_BLK): - self.blocks = blocks - - def readblocks(self, n, buf): - #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - esp.flash_read((n + self.START_SEC) * self.SEC_SIZE, buf) - - def writeblocks(self, n, buf): - #print("writeblocks(%s, %x(%d))" % (n, id(buf), len(buf))) - #assert len(buf) <= self.SEC_SIZE, len(buf) - esp.flash_erase(n + self.START_SEC) - esp.flash_write((n + self.START_SEC) * self.SEC_SIZE, buf) - - def ioctl(self, op, arg): - #print("ioctl(%d, %r)" % (op, arg)) - if op == 4: # BP_IOCTL_SEC_COUNT - return self.blocks - if op == 5: # BP_IOCTL_SEC_SIZE - return self.SEC_SIZE - -size = esp.flash_size() -if size < 1024*1024: - bdev = None -else: - # 20K at the flash end is reserved for SDK params storage - bdev = FlashBdev((size - 20480) // FlashBdev.SEC_SIZE - FlashBdev.START_SEC) diff --git a/ports/esp8266/modules/inisetup.py b/ports/esp8266/modules/inisetup.py deleted file mode 100644 index 192ff5ea84ffc..0000000000000 --- a/ports/esp8266/modules/inisetup.py +++ /dev/null @@ -1,52 +0,0 @@ -from flashbdev import bdev -import network -import storage - -def wifi(): - import ubinascii - ap_if = network.WLAN(network.AP_IF) - essid = b"MicroPython-%s" % ubinascii.hexlify(ap_if.config("mac")[-3:]) - ap_if.config(essid=essid, authmode=network.AUTH_WPA_WPA2_PSK, password=b"micropythoN") - -def check_bootsec(): - buf = bytearray(bdev.SEC_SIZE) - bdev.readblocks(0, buf) - empty = True - for b in buf: - if b != 0xff: - empty = False - break - if empty: - return True - fs_corrupted() - -def fs_corrupted(): - import time - while 1: - print("""\ -The FAT filesystem starting at sector %d with size %d sectors appears to -be corrupted. If you had important data there, you may want to make a flash -snapshot to try to recover it. Otherwise, perform factory reprogramming -of MicroPython firmware (completely erase flash, followed by firmware -programming). -""" % (bdev.START_SEC, bdev.blocks)) - time.sleep(3) - -def setup(): - check_bootsec() - print("Performing initial setup") - wifi() - storage.VfsFat.mkfs(bdev) - vfs = storage.VfsFat(bdev) - storage.mount(vfs, '/') - with open("boot.py", "w") as f: - f.write("""\ -# This file is executed on every boot (including wake-boot from deepsleep) -#import esp -#esp.osdebug(None) -import gc -#import webrepl -#webrepl.start() -gc.collect() -""") - return vfs diff --git a/ports/esp8266/modules/ntptime.py b/ports/esp8266/modules/ntptime.py deleted file mode 100644 index a97e08e60d248..0000000000000 --- a/ports/esp8266/modules/ntptime.py +++ /dev/null @@ -1,36 +0,0 @@ -try: - import usocket as socket -except: - import socket -try: - import ustruct as struct -except: - import struct - -# (date(2000, 1, 1) - date(1900, 1, 1)).days * 24*60*60 -NTP_DELTA = 3155673600 - -host = "pool.ntp.org" - -def time(): - NTP_QUERY = bytearray(48) - NTP_QUERY[0] = 0x1b - addr = socket.getaddrinfo(host, 123)[0][-1] - s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM) - s.settimeout(1) - res = s.sendto(NTP_QUERY, addr) - msg = s.recv(48) - s.close() - val = struct.unpack("!I", msg[40:44])[0] - return val - NTP_DELTA - -# There's currently no timezone support in MicroPython, so -# utime.localtime() will return UTC time (as if it was .gmtime()) -def settime(): - t = time() - import machine - import utime - tm = utime.localtime(t) - tm = tm[0:3] + (0,) + tm[3:6] + (0,) - machine.RTC().datetime(tm) - print(utime.localtime()) diff --git a/ports/esp8266/modules/port_diag.py b/ports/esp8266/modules/port_diag.py deleted file mode 100644 index ef8800355aed4..0000000000000 --- a/ports/esp8266/modules/port_diag.py +++ /dev/null @@ -1,33 +0,0 @@ -import esp -import uctypes -import network -import lwip - - -def main(): - - ROM = uctypes.bytearray_at(0x40200000, 16) - fid = esp.flash_id() - - print("FlashROM:") - print("Flash ID: %x (Vendor: %x Device: %x)" % (fid, fid & 0xff, fid & 0xff00 | fid >> 16)) - - print("Flash bootloader data:") - SZ_MAP = {0: "512KB", 1: "256KB", 2: "1MB", 3: "2MB", 4: "4MB"} - FREQ_MAP = {0: "40MHZ", 1: "26MHZ", 2: "20MHz", 0xf: "80MHz"} - print("Byte @2: %02x" % ROM[2]) - print("Byte @3: %02x (Flash size: %s Flash freq: %s)" % (ROM[3], SZ_MAP.get(ROM[3] >> 4, "?"), FREQ_MAP.get(ROM[3] & 0xf))) - print("Firmware checksum:") - print(esp.check_fw()) - - print("\nNetworking:") - print("STA ifconfig:", network.WLAN(network.STA_IF).ifconfig()) - print("AP ifconfig:", network.WLAN(network.AP_IF).ifconfig()) - print("Free WiFi driver buffers of type:") - for i, comm in enumerate(("1,2 TX", "4 Mngmt TX(len: 0x41-0x100)", "5 Mngmt TX (len: 0-0x40)", "7", "8 RX")): - print("%d: %d (%s)" % (i, esp.esf_free_bufs(i), comm)) - print("lwIP PCBs:") - lwip.print_pcbs() - - -main() diff --git a/ports/esp8266/modules/upip.py b/ports/esp8266/modules/upip.py deleted file mode 120000 index 130eb69016485..0000000000000 --- a/ports/esp8266/modules/upip.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip.py \ No newline at end of file diff --git a/ports/esp8266/modules/upip_utarfile.py b/ports/esp8266/modules/upip_utarfile.py deleted file mode 120000 index d9653d6a60808..0000000000000 --- a/ports/esp8266/modules/upip_utarfile.py +++ /dev/null @@ -1 +0,0 @@ -../../../tools/upip_utarfile.py \ No newline at end of file diff --git a/ports/esp8266/modules/webrepl.py b/ports/esp8266/modules/webrepl.py deleted file mode 100644 index a6c30e2caccb5..0000000000000 --- a/ports/esp8266/modules/webrepl.py +++ /dev/null @@ -1,77 +0,0 @@ -# This module should be imported from REPL, not run from command line. -import socket -import multiterminal -import network -import websocket -import websocket_helper -import _webrepl - -listen_s = None -client_s = None - -def setup_conn(port, accept_handler): - global listen_s - listen_s = socket.socket() - listen_s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) - - ai = socket.getaddrinfo("0.0.0.0", port) - addr = ai[0][4] - - listen_s.bind(addr) - listen_s.listen(1) - if accept_handler: - listen_s.setsockopt(socket.SOL_SOCKET, 20, accept_handler) - for i in (network.AP_IF, network.STA_IF): - iface = network.WLAN(i) - if iface.active(): - print("WebREPL daemon started on ws://%s:%d" % (iface.ifconfig()[0], port)) - return listen_s - - -def accept_conn(listen_sock): - global client_s - cl, remote_addr = listen_sock.accept() - if multiterminal.get_secondary_terminal(): - print("\nConcurrent WebREPL connection from", remote_addr, "rejected") - cl.close() - return - print("\nWebREPL connection from:", remote_addr) - client_s = cl - websocket_helper.server_handshake(cl) - ws = websocket.websocket(cl, True) - ws = _webrepl._webrepl(ws) - cl.setblocking(False) - # notify REPL on socket incoming data - cl.setsockopt(socket.SOL_SOCKET, 20, multiterminal.schedule_secondary_terminal_read) - multiterminal.set_secondary_terminal(ws) - - -def stop(): - global listen_s, client_s - multiterminal.clear_secondary_terminal() - if client_s: - client_s.close() - if listen_s: - listen_s.close() - - -def start(port=8266, password=None): - stop() - if password is None: - try: - import webrepl_cfg - _webrepl.password(webrepl_cfg.PASS) - setup_conn(port, accept_conn) - print("Started webrepl in normal mode") - except: - print("WebREPL is not configured, run 'import webrepl_setup'") - else: - _webrepl.password(password) - setup_conn(port, accept_conn) - print("Started webrepl in manual override mode") - - -def start_foreground(port=8266): - stop() - s = setup_conn(port, None) - accept_conn(s) diff --git a/ports/esp8266/modules/webrepl_setup.py b/ports/esp8266/modules/webrepl_setup.py deleted file mode 100644 index 50d866b557397..0000000000000 --- a/ports/esp8266/modules/webrepl_setup.py +++ /dev/null @@ -1,108 +0,0 @@ -import sys -import os -import machine - -RC = "./boot.py" -CONFIG = "./webrepl_cfg.py" - -def input_choice(prompt, choices): - while 1: - resp = input(prompt) - if resp in choices: - return resp - -def getpass(prompt): - return input(prompt) - -def input_pass(): - while 1: - passwd1 = getpass("New password (4-9 chars): ") - if len(passwd1) < 4 or len(passwd1) > 9: - print("Invalid password length") - continue - passwd2 = getpass("Confirm password: ") - if passwd1 == passwd2: - return passwd1 - print("Passwords do not match") - - -def exists(fname): - try: - with open(fname): - pass - return True - except OSError: - return False - -def copy_stream(s_in, s_out): - buf = bytearray(64) - while 1: - sz = s_in.readinto(buf) - s_out.write(buf, sz) - - -def get_daemon_status(): - with open(RC) as f: - for l in f: - if "webrepl" in l: - if l.startswith("#"): - return False - return True - return None - -def add_daemon(): - with open(RC) as old_f, open(RC + ".tmp", "w") as new_f: - new_f.write("import webrepl\nwebrepl.start()\n") - copy_stream(old_f, new_f) - -def change_daemon(action): - LINES = ("import webrepl", "webrepl.start()") - with open(RC) as old_f, open(RC + ".tmp", "w") as new_f: - for l in old_f: - for patt in LINES: - if patt in l: - if action and l.startswith("#"): - l = l[1:] - elif not action and not l.startswith("#"): - l = "#" + l - new_f.write(l) - # FatFs rename() is not POSIX compliant, will raise OSError if - # dest file exists. - os.remove(RC) - os.rename(RC + ".tmp", RC) - - -def main(): - status = get_daemon_status() - - print("WebREPL daemon auto-start status:", "enabled" if status else "disabled") - print("\nWould you like to (E)nable or (D)isable it running on boot?") - print("(Empty line to quit)") - resp = input("> ").upper() - - if resp == "E": - if exists(CONFIG): - resp2 = input_choice("Would you like to change WebREPL password? (y/n) ", ("y", "n", "")) - else: - print("To enable WebREPL, you must set password for it") - resp2 = "y" - - if resp2 == "y": - passwd = input_pass() - with open(CONFIG, "w") as f: - f.write("PASS = %r\n" % passwd) - - - if resp not in ("D", "E") or (resp == "D" and not status) or (resp == "E" and status): - print("No further action required") - sys.exit() - - change_daemon(resp == "E") - - print("Changes will be activated after reboot") - resp = input_choice("Would you like to reboot now? (y/n) ", ("y", "n", "")) - if resp == "y": - print("Rebooting. Please manually reset if it hangs.") - machine.reset() - -main() diff --git a/ports/esp8266/modules/websocket_helper.py b/ports/esp8266/modules/websocket_helper.py deleted file mode 100644 index 9c06db50235a5..0000000000000 --- a/ports/esp8266/modules/websocket_helper.py +++ /dev/null @@ -1,74 +0,0 @@ -import sys -try: - import ubinascii as binascii -except: - import binascii -try: - import uhashlib as hashlib -except: - import hashlib - -DEBUG = 0 - -def server_handshake(sock): - clr = sock.makefile("rwb", 0) - l = clr.readline() - #sys.stdout.write(repr(l)) - - webkey = None - - while 1: - l = clr.readline() - if not l: - raise OSError("EOF in headers") - if l == b"\r\n": - break - # sys.stdout.write(l) - h, v = [x.strip() for x in l.split(b":", 1)] - if DEBUG: - print((h, v)) - if h == b'Sec-WebSocket-Key': - webkey = v - - if not webkey: - raise OSError("Not a websocket request") - - if DEBUG: - print("Sec-WebSocket-Key:", webkey, len(webkey)) - - d = hashlib.sha1(webkey) - d.update(b"258EAFA5-E914-47DA-95CA-C5AB0DC85B11") - respkey = d.digest() - respkey = binascii.b2a_base64(respkey)[:-1] - if DEBUG: - print("respkey:", respkey) - - sock.send(b"""\ -HTTP/1.1 101 Switching Protocols\r -Upgrade: websocket\r -Connection: Upgrade\r -Sec-WebSocket-Accept: """) - sock.send(respkey) - sock.send("\r\n\r\n") - - -# Very simplified client handshake, works for MicroPython's -# websocket server implementation, but probably not for other -# servers. -def client_handshake(sock): - cl = sock.makefile("rwb", 0) - cl.write(b"""\ -GET / HTTP/1.1\r -Host: echo.websocket.org\r -Connection: Upgrade\r -Upgrade: websocket\r -Sec-WebSocket-Key: foo\r -\r -""") - l = cl.readline() -# print(l) - while 1: - l = cl.readline() - if l == b"\r\n": - break -# sys.stdout.write(l) diff --git a/ports/esp8266/modutime.c b/ports/esp8266/modutime.c deleted file mode 100644 index ab9cb7dc23b3c..0000000000000 --- a/ports/esp8266/modutime.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Josef Gajdusek - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "py/smallint.h" -#include "lib/timeutils/timeutils.h" -#include "modmachine.h" -#include "user_interface.h" -#include "extmod/utime_mphal.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2014) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - timeutils_struct_time_t tm; - mp_int_t seconds; - if (n_args == 0 || args[0] == mp_const_none) { - seconds = pyb_rtc_get_us_since_2000() / 1000 / 1000; - } else { - seconds = mp_obj_get_int(args[0]); - } - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - -/// \function mktime() -/// This is inverse function of localtime. It's argument is a full 8-tuple -/// which expresses a time as per localtime. It returns an integer which is -/// the number of seconds since Jan 1, 2000. -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - size_t len; - mp_obj_t *elem; - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "mktime needs a tuple of length 8 or 9 (%d given)", len)); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), - mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), mp_obj_get_int(elem[3]), - mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -/// \function time() -/// Returns the number of seconds, as an integer, since 1/1/2000. -STATIC mp_obj_t time_time(void) { - // get date and time - return mp_obj_new_int(pyb_rtc_get_us_since_2000() / 1000 / 1000); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t utime_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/esp8266/mpconfigport.h b/ports/esp8266/mpconfigport.h deleted file mode 100644 index 8caecf7594f9e..0000000000000 --- a/ports/esp8266/mpconfigport.h +++ /dev/null @@ -1,225 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_C) -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_ALLOC_LEXER_INDENT_INIT (8) -#define MICROPY_ALLOC_PARSE_RULE_INIT (48) -#define MICROPY_ALLOC_PARSE_RULE_INC (8) -#define MICROPY_ALLOC_PARSE_RESULT_INC (8) -#define MICROPY_ALLOC_PARSE_CHUNK_INIT (64) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_XTENSA (1) -#define MICROPY_EMIT_INLINE_XTENSA (1) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (1) -#define MICROPY_DEBUG_PRINTER_DEST mp_debug_print -#define MICROPY_READER_VFS (MICROPY_VFS) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_ENABLE_SCHEDULER (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_COMPLEX (0) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_BYTEARRAY (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_SET (1) -#define MICROPY_PY_BUILTINS_SLICE (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_PROPERTY (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT esp_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_ARRAY (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_NONSTANDARD_TYPECODES (0) -#define MICROPY_PY_COLLECTIONS (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_STDIO_BUFFER (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UHASHLIB_SHA1 (MICROPY_PY_USSL && MICROPY_SSL_AXTLS) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URANDOM (0) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_LWIP (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_SPI (1) -#define MICROPY_PY_MACHINE_SPI_MAKE_NEW machine_hspi_make_new -#define MICROPY_PY_WEBSOCKET (1) -#define MICROPY_PY_WEBREPL (1) -#define MICROPY_PY_WEBREPL_DELAY (20) -#define MICROPY_PY_FRAMEBUF (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_OS_DUPTERM (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) -#define MICROPY_WARNINGS (1) -#define MICROPY_PY_STR_BYTES_CMP_WARN (1) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_STREAMS_POSIX_API (1) -#define MICROPY_MODULE_FROZEN_STR (1) -#define MICROPY_MODULE_FROZEN_MPY (1) -#define MICROPY_MODULE_FROZEN_LEXER mp_lexer_new_from_str32 -#define MICROPY_QSTR_EXTRA_POOL mp_qstr_frozen_const_pool - -#define MICROPY_VFS (1) -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MAX_SS (4096) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_VFS_FAT (1) -#define MICROPY_ESP8266_NEOPIXEL (1) - -extern void ets_event_poll(void); -#define MICROPY_EVENT_POLL_HOOK {ets_event_poll();} -#define MICROPY_VM_HOOK_COUNT (10) -#define MICROPY_VM_HOOK_INIT static uint vm_hook_divisor = MICROPY_VM_HOOK_COUNT; -#define MICROPY_VM_HOOK_POLL if (--vm_hook_divisor == 0) { \ - vm_hook_divisor = MICROPY_VM_HOOK_COUNT; \ - extern void ets_loop_iter(void); \ - ets_loop_iter(); \ - } -#define MICROPY_VM_HOOK_LOOP MICROPY_VM_HOOK_POLL -#define MICROPY_VM_HOOK_RETURN MICROPY_VM_HOOK_POLL - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p))) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; -typedef uint32_t sys_prot_t; // for modlwip -// ssize_t, off_t as required by POSIX-signatured functions in stream.h -#include - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) -void *esp_native_code_commit(void*, size_t); -#define MP_PLAT_COMMIT_EXEC(buf, len) esp_native_code_commit(buf, len) - -#define mp_type_fileio fatfs_type_fileio -#define mp_type_textio fatfs_type_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t esp_module; -extern const struct _mp_obj_module_t network_module; -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t random_module; -extern const struct _mp_obj_module_t storage_module; -extern const struct _mp_obj_module_t struct_module; -extern const struct _mp_obj_module_t mp_module_lwip; -extern const struct _mp_obj_module_t mp_module_machine; -extern const struct _mp_obj_module_t mp_module_onewire; -extern const struct _mp_obj_module_t microcontroller_module; -extern const struct _mp_obj_module_t board_module; -extern const struct _mp_obj_module_t math_module; -extern const struct _mp_obj_module_t analogio_module; -extern const struct _mp_obj_module_t digitalio_module; -extern const struct _mp_obj_module_t pulseio_module; -extern const struct _mp_obj_module_t busio_module; -extern const struct _mp_obj_module_t bitbangio_module; -extern const struct _mp_obj_module_t time_module; -extern const struct _mp_obj_module_t multiterminal_module; -extern const struct _mp_obj_module_t neopixel_write_module; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR(MP_QSTR_esp), (mp_obj_t)&esp_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_socket), (mp_obj_t)&mp_module_lwip }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_usocket), (mp_obj_t)&mp_module_lwip }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_network), (mp_obj_t)&network_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&os_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_machine), (mp_obj_t)&mp_module_machine }, \ - { MP_ROM_QSTR(MP_QSTR__onewire), MP_ROM_PTR(&mp_module_onewire) }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&random_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&struct_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_math), (mp_obj_t)&math_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_time), (mp_obj_t)&time_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_multiterminal), (mp_obj_t)&multiterminal_module }, \ - { MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_lwip) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t pin_irq_handler[16]; \ - -// We need to provide a declaration/definition of alloca() -#include - -// board specifics - -#define MICROPY_MPHALPORT_H "esp_mphal.h" -#define MICROPY_HW_BOARD_NAME "ESP module" -#define MICROPY_HW_MCU_NAME "ESP8266" -#define MICROPY_PY_SYS_PLATFORM "esp8266" - -#define MP_FASTCODE(n) __attribute__((section(".iram0.text." #n))) n - -#define _assert(expr) ((expr) ? (void)0 : __assert_func(__FILE__, __LINE__, __func__, #expr)) diff --git a/ports/esp8266/mpconfigport_512k.h b/ports/esp8266/mpconfigport_512k.h deleted file mode 100644 index b84c134792c38..0000000000000 --- a/ports/esp8266/mpconfigport_512k.h +++ /dev/null @@ -1,34 +0,0 @@ -#include - -#undef MICROPY_EMIT_XTENSA -#define MICROPY_EMIT_XTENSA (0) -#undef MICROPY_EMIT_INLINE_XTENSA -#define MICROPY_EMIT_INLINE_XTENSA (0) - -#undef MICROPY_ERROR_REPORTING -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) - -#undef MICROPY_VFS -#define MICROPY_VFS (0) -#undef MICROPY_VFS_FAT -#define MICROPY_VFS_FAT (0) - -#undef MICROPY_PERSISTENT_CODE_LOAD -#define MICROPY_PERSISTENT_CODE_LOAD (0) - -#undef MICROPY_PY_IO_FILEIO -#define MICROPY_PY_IO_FILEIO (0) - -#undef MICROPY_PY_SYS_STDIO_BUFFER -#define MICROPY_PY_SYS_STDIO_BUFFER (0) -#undef MICROPY_PY_BUILTINS_SLICE_ATTRS -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (0) -#undef MICROPY_PY_ALL_SPECIAL_METHODS -#define MICROPY_PY_ALL_SPECIAL_METHODS (0) - -#undef MICROPY_PY_FRAMEBUF -#define MICROPY_PY_FRAMEBUF (0) - -#undef mp_import_stat -#undef mp_builtin_open -#undef mp_builtin_open_obj diff --git a/ports/esp8266/posix_helpers.c b/ports/esp8266/posix_helpers.c deleted file mode 100644 index 1c20c8b0b17f6..0000000000000 --- a/ports/esp8266/posix_helpers.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include "py/mphal.h" -#include "py/gc.h" - -// Functions for external libs like axTLS, BerkeleyDB, etc. - -void *malloc(size_t size) { - void *p = gc_alloc(size, false, false); - if (p == NULL) { - // POSIX requires ENOMEM to be set in case of error - errno = ENOMEM; - } - return p; -} -void free(void *ptr) { - gc_free(ptr); -} -void *calloc(size_t nmemb, size_t size) { - return malloc(nmemb * size); -} -void *realloc(void *ptr, size_t size) { - void *p = gc_realloc(ptr, size, true); - if (p == NULL) { - // POSIX requires ENOMEM to be set in case of error - errno = ENOMEM; - } - return p; -} - -#define PLATFORM_HTONL(_n) ((uint32_t)( (((_n) & 0xff) << 24) | (((_n) & 0xff00) << 8) | (((_n) >> 8) & 0xff00) | (((_n) >> 24) & 0xff) )) -#undef htonl -#undef ntohl -uint32_t ntohl(uint32_t netlong) { - return PLATFORM_HTONL(netlong); -} -uint32_t htonl(uint32_t netlong) { - return PLATFORM_HTONL(netlong); -} - -time_t time(time_t *t) { - return mp_hal_ticks_ms() / 1000; -} - -time_t mktime(void *tm) { - return 0; -} diff --git a/ports/esp8266/qstrdefsport.h b/ports/esp8266/qstrdefsport.h deleted file mode 100644 index 8f301a69c5adf..0000000000000 --- a/ports/esp8266/qstrdefsport.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// qstrs specific to this port, only needed if they aren't auto-generated - -// Entries for sys.path -Q(/) -Q(/lib) diff --git a/ports/esp8266/strtoll.c b/ports/esp8266/strtoll.c deleted file mode 100644 index 4e8a4d05669f4..0000000000000 --- a/ports/esp8266/strtoll.c +++ /dev/null @@ -1,29 +0,0 @@ -#include - -// assumes endptr != NULL -// doesn't check for sign -// doesn't check for base-prefix -long long int strtoll(const char *nptr, char **endptr, int base) { - long long val = 0; - - for (; *nptr; nptr++) { - int v = *nptr; - if ('0' <= v && v <= '9') { - v -= '0'; - } else if ('A' <= v && v <= 'Z') { - v -= 'A' - 10; - } else if ('a' <= v && v <= 'z') { - v -= 'a' - 10; - } else { - break; - } - if (v >= base) { - break; - } - val = val * base + v; - } - - *endptr = (char*)nptr; - - return val; -} diff --git a/ports/esp8266/uart_register.h b/ports/esp8266/uart_register.h deleted file mode 100644 index 6398879ee204a..0000000000000 --- a/ports/esp8266/uart_register.h +++ /dev/null @@ -1,128 +0,0 @@ -//Generated at 2012-07-03 18:44:06 -/* - * Copyright (c) 2010 - 2011 Espressif System - * - */ - -#ifndef UART_REGISTER_H_INCLUDED -#define UART_REGISTER_H_INCLUDED -#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) -//version value:32'h062000 - -#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) -#define UART_RXFIFO_RD_BYTE 0x000000FF -#define UART_RXFIFO_RD_BYTE_S 0 - -#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) -#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) -#define UART_BRK_DET_INT_RAW (BIT(7)) -#define UART_CTS_CHG_INT_RAW (BIT(6)) -#define UART_DSR_CHG_INT_RAW (BIT(5)) -#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) -#define UART_FRM_ERR_INT_RAW (BIT(3)) -#define UART_PARITY_ERR_INT_RAW (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) -#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) - -#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) -#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) -#define UART_BRK_DET_INT_ST (BIT(7)) -#define UART_CTS_CHG_INT_ST (BIT(6)) -#define UART_DSR_CHG_INT_ST (BIT(5)) -#define UART_RXFIFO_OVF_INT_ST (BIT(4)) -#define UART_FRM_ERR_INT_ST (BIT(3)) -#define UART_PARITY_ERR_INT_ST (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) -#define UART_RXFIFO_FULL_INT_ST (BIT(0)) - -#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) -#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) -#define UART_BRK_DET_INT_ENA (BIT(7)) -#define UART_CTS_CHG_INT_ENA (BIT(6)) -#define UART_DSR_CHG_INT_ENA (BIT(5)) -#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) -#define UART_FRM_ERR_INT_ENA (BIT(3)) -#define UART_PARITY_ERR_INT_ENA (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) -#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) - -#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) -#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) -#define UART_BRK_DET_INT_CLR (BIT(7)) -#define UART_CTS_CHG_INT_CLR (BIT(6)) -#define UART_DSR_CHG_INT_CLR (BIT(5)) -#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) -#define UART_FRM_ERR_INT_CLR (BIT(3)) -#define UART_PARITY_ERR_INT_CLR (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) -#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) - -#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) -#define UART_CLKDIV_CNT 0x000FFFFF -#define UART_CLKDIV_S 0 - -#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) -#define UART_GLITCH_FILT 0x000000FF -#define UART_GLITCH_FILT_S 8 -#define UART_AUTOBAUD_EN (BIT(0)) - -#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) -#define UART_TXD (BIT(31)) -#define UART_RTSN (BIT(30)) -#define UART_DTRN (BIT(29)) -#define UART_TXFIFO_CNT 0x000000FF -#define UART_TXFIFO_CNT_S 16 -#define UART_RXD (BIT(15)) -#define UART_CTSN (BIT(14)) -#define UART_DSRN (BIT(13)) -#define UART_RXFIFO_CNT 0x000000FF -#define UART_RXFIFO_CNT_S 0 - -#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) -#define UART_TXFIFO_RST (BIT(18)) -#define UART_RXFIFO_RST (BIT(17)) -#define UART_IRDA_EN (BIT(16)) -#define UART_TX_FLOW_EN (BIT(15)) -#define UART_LOOPBACK (BIT(14)) -#define UART_IRDA_RX_INV (BIT(13)) -#define UART_IRDA_TX_INV (BIT(12)) -#define UART_IRDA_WCTL (BIT(11)) -#define UART_IRDA_TX_EN (BIT(10)) -#define UART_IRDA_DPLX (BIT(9)) -#define UART_TXD_BRK (BIT(8)) -#define UART_SW_DTR (BIT(7)) -#define UART_SW_RTS (BIT(6)) -#define UART_STOP_BIT_NUM 0x00000003 -#define UART_STOP_BIT_NUM_S 4 -#define UART_BIT_NUM 0x00000003 -#define UART_BIT_NUM_S 2 -#define UART_PARITY_EN (BIT(1)) -#define UART_PARITY (BIT(0)) - -#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) -#define UART_RX_TOUT_EN (BIT(31)) -#define UART_RX_TOUT_THRHD 0x0000007F -#define UART_RX_TOUT_THRHD_S 24 -#define UART_RX_FLOW_EN (BIT(23)) -#define UART_RX_FLOW_THRHD 0x0000007F -#define UART_RX_FLOW_THRHD_S 16 -#define UART_TXFIFO_EMPTY_THRHD 0x0000007F -#define UART_TXFIFO_EMPTY_THRHD_S 8 -#define UART_RXFIFO_FULL_THRHD 0x0000007F -#define UART_RXFIFO_FULL_THRHD_S 0 - -#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) -#define UART_LOWPULSE_MIN_CNT 0x000FFFFF -#define UART_LOWPULSE_MIN_CNT_S 0 - -#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) -#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF -#define UART_HIGHPULSE_MIN_CNT_S 0 - -#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) -#define UART_PULSE_NUM_CNT 0x0003FF -#define UART_PULSE_NUM_CNT_S 0 - -#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) -#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) -#endif // UART_REGISTER_H_INCLUDED diff --git a/ports/esp8266/user_config.h b/ports/esp8266/user_config.h deleted file mode 100644 index 8b1a393741c96..0000000000000 --- a/ports/esp8266/user_config.h +++ /dev/null @@ -1 +0,0 @@ -// empty diff --git a/ports/esp8266/xtirq.h b/ports/esp8266/xtirq.h deleted file mode 100644 index 595052fc73f3c..0000000000000 --- a/ports/esp8266/xtirq.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ESP8266_XTIRQ_H -#define MICROPY_INCLUDED_ESP8266_XTIRQ_H - -#include - -// returns the value of "intlevel" from the PS register -static inline uint32_t query_irq(void) { - uint32_t ps; - __asm__ volatile("rsr %0, ps" : "=a" (ps)); - return ps & 0xf; -} - -// irqs with a priority value lower or equal to "intlevel" will be disabled -// "intlevel" should be between 0 and 15 inclusive, and should be an integer -static inline uint32_t raise_irq_pri(uint32_t intlevel) { - uint32_t old_ps; - __asm__ volatile ("rsil %0, %1" : "=a" (old_ps) : "I" (intlevel)); - return old_ps; -} - -// "ps" should be the value returned from raise_irq_pri -static inline void restore_irq_pri(uint32_t ps) { - __asm__ volatile ("wsr %0, ps; rsync" :: "a" (ps)); -} - -static inline uint32_t disable_irq(void) { - return raise_irq_pri(15); -} - -static inline void enable_irq(uint32_t irq_state) { - restore_irq_pri(irq_state); -} - -#endif // MICROPY_INCLUDED_ESP8266_XTIRQ_H diff --git a/ports/litex/Makefile b/ports/litex/Makefile new file mode 100644 index 0000000000000..51cb186356c94 --- /dev/null +++ b/ports/litex/Makefile @@ -0,0 +1,200 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Scott Shawcroft for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk + +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = riscv64-unknown-elf- + +####################################### +# CFLAGS +####################################### + +INC += -I. +INC += -I../.. +INC += -I$(BUILD) +INC += -I$(BUILD)/genhdr +INC += -I./boards +INC += -I./boards/$(BOARD) +INC += -I./peripherals +INC += -I../../lib/mp-readline +INC += -I../../lib/tinyusb/src +INC += -I../../supervisor/shared/usb + + +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra +else + CFLAGS += -Os -DNDEBUG -ggdb3 + # TODO: Test with -flto + ### CFLAGS += -flto +endif + +CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) + +# TODO: check this +CFLAGS += -D__START=main -DFOMU + +LD_FILE := boards/$(BOARD)/$(BOARD)-spi.ld + +LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs -Wl,-melf32lriscv +LIBS := -lgcc -lc + + +LDFLAGS += -flto -ffreestanding -nostartfiles -Wl,--gc-section -Wl,-Bstatic -Wl,-melf32lriscv -nostartfiles \ + -Wl,--no-warn-mismatch \ + -Wl,--build-id=none + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_VALENTYUSB_EPTRI -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 + + +###################################### +# source +###################################### + + +SRC_C += \ + background.c \ + fatfs_port.c \ + mphalport.c \ + tick.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/timeutils/timeutils.c \ + lib/utils/buffer_helper.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/interrupt_char.c \ + lib/utils/pyexec.c \ + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + supervisor/shared/memory.c + +ifneq ($(USB),FALSE) +SRC_C += lib/tinyusb/src/portable/valentyusb/eptri/dcd_eptri.c +endif + +SRC_S = \ + crt0-vexriscv.S + +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + + +ifneq ($(FROZEN_MPY_DIR),) +FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py') +FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy)) +endif + +OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.S=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os +$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os + +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.dfu + +$(BUILD)/firmware.elf: $(OBJ) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(LD_FILE) + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary $^ $@ +# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ + +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O ihex $^ $@ +# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@ + +$(BUILD)/firmware.dfu: $(BUILD)/firmware.bin + $(ECHO) "Create $@" + $(PYTHON3) $(TOP)/tools/dfu.py -b $^ -D 0x1209:0x5bf0 "$(BUILD)/firmware.dfu" + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/litex/background.c b/ports/litex/background.c new file mode 100644 index 0000000000000..8c1897043455e --- /dev/null +++ b/ports/litex/background.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "supervisor/filesystem.h" +#include "supervisor/usb.h" +#include "supervisor/shared/stack.h" + +#if CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + running_background_tasks = true; + filesystem_background(); + + #if USB_AVAILABLE + usb_background(); + #endif + + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + running_background_tasks = false; + + assert_heap_ok(); +} diff --git a/ports/litex/background.h b/ports/litex/background.h new file mode 100644 index 0000000000000..09551c7fbb2d0 --- /dev/null +++ b/ports/litex/background.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_LITEX_BACKGROUND_H +#define MICROPY_INCLUDED_LITEX_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); + +#endif // MICROPY_INCLUDED_LITEX_BACKGROUND_H diff --git a/ports/litex/boards/board.h b/ports/litex/boards/board.h new file mode 100644 index 0000000000000..837b371904523 --- /dev/null +++ b/ports/litex/boards/board.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_LITEX_BOARDS_BOARD_H +#define MICROPY_INCLUDED_LITEX_BOARDS_BOARD_H + +#include + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_LITEX_BOARDS_BOARD_H diff --git a/ports/litex/boards/fomu/board.c b/ports/litex/boards/fomu/board.c new file mode 100644 index 0000000000000..97e1ecadd6cde --- /dev/null +++ b/ports/litex/boards/fomu/board.c @@ -0,0 +1,75 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "csr.h" + +// ICE40 LED Driver hard macro. +// See http://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/IK/ICE40LEDDriverUsageGuide.ashx?document_id=50668 +enum led_registers { + LEDDCR0 = 8, + LEDDBR = 9, + LEDDONR = 10, + LEDDOFR = 11, + LEDDBCRR = 5, + LEDDBCFR = 6, + LEDDPWRR = 1, + LEDDPWRG = 2, + LEDDPWRB = 3, +}; + +#define BREATHE_ENABLE (1 << 7) +#define BREATHE_EDGE_ON (0 << 6) +#define BREATHE_EDGE_BOTH (1 << 6) +#define BREATHE_MODE_MODULATE (1 << 5) +#define BREATHE_RATE(x) ((x & 7) << 0) + +// Write a value into the LEDDA_IP register. +static void ledda_write(uint8_t value, uint8_t addr) { + rgb_addr_write(addr); + rgb_dat_write(value); +} + +void board_init(void) { + uint8_t onrate = 15; + uint8_t offrate = 1; + + ledda_write(BREATHE_ENABLE | BREATHE_MODE_MODULATE | BREATHE_RATE(onrate), LEDDBCRR); + ledda_write(BREATHE_ENABLE | BREATHE_MODE_MODULATE | BREATHE_RATE(offrate), LEDDBCFR); + + ledda_write(123, LEDDPWRR); // Red + ledda_write(3, LEDDPWRG); // Green + ledda_write(98, LEDDPWRB); // Blue +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/litex/boards/fomu/csr.h b/ports/litex/boards/fomu/csr.h new file mode 100644 index 0000000000000..bf66fe3a17b4b --- /dev/null +++ b/ports/litex/boards/fomu/csr.h @@ -0,0 +1,647 @@ +//-------------------------------------------------------------------------------- +// Auto-generated by Migen (f4fcd10) & LiteX (de205d4a) on 2019-11-25 14:57:34 +//-------------------------------------------------------------------------------- +#include +#ifndef __GENERATED_CSR_H +#define __GENERATED_CSR_H +#include +#ifdef CSR_ACCESSORS_DEFINED +extern void csr_writeb(uint8_t value, unsigned long addr); +extern uint8_t csr_readb(unsigned long addr); +extern void csr_writew(uint16_t value, unsigned long addr); +extern uint16_t csr_readw(unsigned long addr); +extern void csr_writel(uint32_t value, unsigned long addr); +extern uint32_t csr_readl(unsigned long addr); +#else /* ! CSR_ACCESSORS_DEFINED */ +#include +#endif /* ! CSR_ACCESSORS_DEFINED */ + +/* ctrl */ +#define CSR_CTRL_BASE 0xe0000000L +#define CSR_CTRL_RESET_ADDR 0xe0000000L +#define CSR_CTRL_RESET_SIZE 1 +static inline unsigned char ctrl_reset_read(void) { + unsigned char r = csr_readl(0xe0000000L); + return r; +} +static inline void ctrl_reset_write(unsigned char value) { + csr_writel(value, 0xe0000000L); +} +#define CSR_CTRL_SCRATCH_ADDR 0xe0000004L +#define CSR_CTRL_SCRATCH_SIZE 4 +static inline unsigned int ctrl_scratch_read(void) { + unsigned int r = csr_readl(0xe0000004L); + r <<= 8; + r |= csr_readl(0xe0000008L); + r <<= 8; + r |= csr_readl(0xe000000cL); + r <<= 8; + r |= csr_readl(0xe0000010L); + return r; +} +static inline void ctrl_scratch_write(unsigned int value) { + csr_writel(value >> 24, 0xe0000004L); + csr_writel(value >> 16, 0xe0000008L); + csr_writel(value >> 8, 0xe000000cL); + csr_writel(value, 0xe0000010L); +} +#define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014L +#define CSR_CTRL_BUS_ERRORS_SIZE 4 +static inline unsigned int ctrl_bus_errors_read(void) { + unsigned int r = csr_readl(0xe0000014L); + r <<= 8; + r |= csr_readl(0xe0000018L); + r <<= 8; + r |= csr_readl(0xe000001cL); + r <<= 8; + r |= csr_readl(0xe0000020L); + return r; +} + +/* lxspi */ +#define CSR_LXSPI_BASE 0xe0007800L +#define CSR_LXSPI_BITBANG_ADDR 0xe0007800L +#define CSR_LXSPI_BITBANG_SIZE 1 +static inline unsigned char lxspi_bitbang_read(void) { + unsigned char r = csr_readl(0xe0007800L); + return r; +} +static inline void lxspi_bitbang_write(unsigned char value) { + csr_writel(value, 0xe0007800L); +} +#define CSR_LXSPI_BITBANG_MOSI_OFFSET 0 +#define CSR_LXSPI_BITBANG_MOSI_SIZE 1 +#define CSR_LXSPI_BITBANG_CLK_OFFSET 1 +#define CSR_LXSPI_BITBANG_CLK_SIZE 1 +#define CSR_LXSPI_BITBANG_CS_N_OFFSET 2 +#define CSR_LXSPI_BITBANG_CS_N_SIZE 1 +#define CSR_LXSPI_BITBANG_DIR_OFFSET 3 +#define CSR_LXSPI_BITBANG_DIR_SIZE 1 +#define CSR_LXSPI_MISO_ADDR 0xe0007804L +#define CSR_LXSPI_MISO_SIZE 1 +static inline unsigned char lxspi_miso_read(void) { + unsigned char r = csr_readl(0xe0007804L); + return r; +} +#define CSR_LXSPI_BITBANG_EN_ADDR 0xe0007808L +#define CSR_LXSPI_BITBANG_EN_SIZE 1 +static inline unsigned char lxspi_bitbang_en_read(void) { + unsigned char r = csr_readl(0xe0007808L); + return r; +} +static inline void lxspi_bitbang_en_write(unsigned char value) { + csr_writel(value, 0xe0007808L); +} + +/* messible */ +#define CSR_MESSIBLE_BASE 0xe0008000L +#define CSR_MESSIBLE_IN_ADDR 0xe0008000L +#define CSR_MESSIBLE_IN_SIZE 1 +static inline unsigned char messible_in_read(void) { + unsigned char r = csr_readl(0xe0008000L); + return r; +} +static inline void messible_in_write(unsigned char value) { + csr_writel(value, 0xe0008000L); +} +#define CSR_MESSIBLE_OUT_ADDR 0xe0008004L +#define CSR_MESSIBLE_OUT_SIZE 1 +static inline unsigned char messible_out_read(void) { + unsigned char r = csr_readl(0xe0008004L); + return r; +} +#define CSR_MESSIBLE_STATUS_ADDR 0xe0008008L +#define CSR_MESSIBLE_STATUS_SIZE 1 +static inline unsigned char messible_status_read(void) { + unsigned char r = csr_readl(0xe0008008L); + return r; +} +#define CSR_MESSIBLE_STATUS_FULL_OFFSET 0 +#define CSR_MESSIBLE_STATUS_FULL_SIZE 1 +#define CSR_MESSIBLE_STATUS_HAVE_OFFSET 1 +#define CSR_MESSIBLE_STATUS_HAVE_SIZE 1 + +/* reboot */ +#define CSR_REBOOT_BASE 0xe0006000L +#define CSR_REBOOT_CTRL_ADDR 0xe0006000L +#define CSR_REBOOT_CTRL_SIZE 1 +static inline unsigned char reboot_ctrl_read(void) { + unsigned char r = csr_readl(0xe0006000L); + return r; +} +static inline void reboot_ctrl_write(unsigned char value) { + csr_writel(value, 0xe0006000L); +} +#define CSR_REBOOT_CTRL_IMAGE_OFFSET 0 +#define CSR_REBOOT_CTRL_IMAGE_SIZE 2 +#define CSR_REBOOT_CTRL_KEY_OFFSET 2 +#define CSR_REBOOT_CTRL_KEY_SIZE 6 +#define CSR_REBOOT_ADDR_ADDR 0xe0006004L +#define CSR_REBOOT_ADDR_SIZE 4 +static inline unsigned int reboot_addr_read(void) { + unsigned int r = csr_readl(0xe0006004L); + r <<= 8; + r |= csr_readl(0xe0006008L); + r <<= 8; + r |= csr_readl(0xe000600cL); + r <<= 8; + r |= csr_readl(0xe0006010L); + return r; +} +static inline void reboot_addr_write(unsigned int value) { + csr_writel(value >> 24, 0xe0006004L); + csr_writel(value >> 16, 0xe0006008L); + csr_writel(value >> 8, 0xe000600cL); + csr_writel(value, 0xe0006010L); +} + +/* rgb */ +#define CSR_RGB_BASE 0xe0006800L +#define CSR_RGB_DAT_ADDR 0xe0006800L +#define CSR_RGB_DAT_SIZE 1 +static inline unsigned char rgb_dat_read(void) { + unsigned char r = csr_readl(0xe0006800L); + return r; +} +static inline void rgb_dat_write(unsigned char value) { + csr_writel(value, 0xe0006800L); +} +#define CSR_RGB_ADDR_ADDR 0xe0006804L +#define CSR_RGB_ADDR_SIZE 1 +static inline unsigned char rgb_addr_read(void) { + unsigned char r = csr_readl(0xe0006804L); + return r; +} +static inline void rgb_addr_write(unsigned char value) { + csr_writel(value, 0xe0006804L); +} +#define CSR_RGB_CTRL_ADDR 0xe0006808L +#define CSR_RGB_CTRL_SIZE 1 +static inline unsigned char rgb_ctrl_read(void) { + unsigned char r = csr_readl(0xe0006808L); + return r; +} +static inline void rgb_ctrl_write(unsigned char value) { + csr_writel(value, 0xe0006808L); +} +#define CSR_RGB_CTRL_EXE_OFFSET 0 +#define CSR_RGB_CTRL_EXE_SIZE 1 +#define CSR_RGB_CTRL_CURREN_OFFSET 1 +#define CSR_RGB_CTRL_CURREN_SIZE 1 +#define CSR_RGB_CTRL_RGBLEDEN_OFFSET 2 +#define CSR_RGB_CTRL_RGBLEDEN_SIZE 1 +#define CSR_RGB_CTRL_RRAW_OFFSET 3 +#define CSR_RGB_CTRL_RRAW_SIZE 1 +#define CSR_RGB_CTRL_GRAW_OFFSET 4 +#define CSR_RGB_CTRL_GRAW_SIZE 1 +#define CSR_RGB_CTRL_BRAW_OFFSET 5 +#define CSR_RGB_CTRL_BRAW_SIZE 1 +#define CSR_RGB_RAW_ADDR 0xe000680cL +#define CSR_RGB_RAW_SIZE 1 +static inline unsigned char rgb_raw_read(void) { + unsigned char r = csr_readl(0xe000680cL); + return r; +} +static inline void rgb_raw_write(unsigned char value) { + csr_writel(value, 0xe000680cL); +} +#define CSR_RGB_RAW_R_OFFSET 0 +#define CSR_RGB_RAW_R_SIZE 1 +#define CSR_RGB_RAW_G_OFFSET 1 +#define CSR_RGB_RAW_G_SIZE 1 +#define CSR_RGB_RAW_B_OFFSET 2 +#define CSR_RGB_RAW_B_SIZE 1 + +/* timer0 */ +#define CSR_TIMER0_BASE 0xe0002800L +#define CSR_TIMER0_LOAD_ADDR 0xe0002800L +#define CSR_TIMER0_LOAD_SIZE 4 +static inline unsigned int timer0_load_read(void) { + unsigned int r = csr_readl(0xe0002800L); + r <<= 8; + r |= csr_readl(0xe0002804L); + r <<= 8; + r |= csr_readl(0xe0002808L); + r <<= 8; + r |= csr_readl(0xe000280cL); + return r; +} +static inline void timer0_load_write(unsigned int value) { + csr_writel(value >> 24, 0xe0002800L); + csr_writel(value >> 16, 0xe0002804L); + csr_writel(value >> 8, 0xe0002808L); + csr_writel(value, 0xe000280cL); +} +#define CSR_TIMER0_RELOAD_ADDR 0xe0002810L +#define CSR_TIMER0_RELOAD_SIZE 4 +static inline unsigned int timer0_reload_read(void) { + unsigned int r = csr_readl(0xe0002810L); + r <<= 8; + r |= csr_readl(0xe0002814L); + r <<= 8; + r |= csr_readl(0xe0002818L); + r <<= 8; + r |= csr_readl(0xe000281cL); + return r; +} +static inline void timer0_reload_write(unsigned int value) { + csr_writel(value >> 24, 0xe0002810L); + csr_writel(value >> 16, 0xe0002814L); + csr_writel(value >> 8, 0xe0002818L); + csr_writel(value, 0xe000281cL); +} +#define CSR_TIMER0_EN_ADDR 0xe0002820L +#define CSR_TIMER0_EN_SIZE 1 +static inline unsigned char timer0_en_read(void) { + unsigned char r = csr_readl(0xe0002820L); + return r; +} +static inline void timer0_en_write(unsigned char value) { + csr_writel(value, 0xe0002820L); +} +#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824L +#define CSR_TIMER0_UPDATE_VALUE_SIZE 1 +static inline unsigned char timer0_update_value_read(void) { + unsigned char r = csr_readl(0xe0002824L); + return r; +} +static inline void timer0_update_value_write(unsigned char value) { + csr_writel(value, 0xe0002824L); +} +#define CSR_TIMER0_VALUE_ADDR 0xe0002828L +#define CSR_TIMER0_VALUE_SIZE 4 +static inline unsigned int timer0_value_read(void) { + unsigned int r = csr_readl(0xe0002828L); + r <<= 8; + r |= csr_readl(0xe000282cL); + r <<= 8; + r |= csr_readl(0xe0002830L); + r <<= 8; + r |= csr_readl(0xe0002834L); + return r; +} +#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838L +#define CSR_TIMER0_EV_STATUS_SIZE 1 +static inline unsigned char timer0_ev_status_read(void) { + unsigned char r = csr_readl(0xe0002838L); + return r; +} +static inline void timer0_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0002838L); +} +#define CSR_TIMER0_EV_PENDING_ADDR 0xe000283cL +#define CSR_TIMER0_EV_PENDING_SIZE 1 +static inline unsigned char timer0_ev_pending_read(void) { + unsigned char r = csr_readl(0xe000283cL); + return r; +} +static inline void timer0_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe000283cL); +} +#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840L +#define CSR_TIMER0_EV_ENABLE_SIZE 1 +static inline unsigned char timer0_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0002840L); + return r; +} +static inline void timer0_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0002840L); +} + +/* touch */ +#define CSR_TOUCH_BASE 0xe0005800L +#define CSR_TOUCH_O_ADDR 0xe0005800L +#define CSR_TOUCH_O_SIZE 1 +static inline unsigned char touch_o_read(void) { + unsigned char r = csr_readl(0xe0005800L); + return r; +} +static inline void touch_o_write(unsigned char value) { + csr_writel(value, 0xe0005800L); +} +#define CSR_TOUCH_OE_ADDR 0xe0005804L +#define CSR_TOUCH_OE_SIZE 1 +static inline unsigned char touch_oe_read(void) { + unsigned char r = csr_readl(0xe0005804L); + return r; +} +static inline void touch_oe_write(unsigned char value) { + csr_writel(value, 0xe0005804L); +} +#define CSR_TOUCH_I_ADDR 0xe0005808L +#define CSR_TOUCH_I_SIZE 1 +static inline unsigned char touch_i_read(void) { + unsigned char r = csr_readl(0xe0005808L); + return r; +} + +/* usb */ +#define CSR_USB_BASE 0xe0004800L +#define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L +#define CSR_USB_PULLUP_OUT_SIZE 1 +static inline unsigned char usb_pullup_out_read(void) { + unsigned char r = csr_readl(0xe0004800L); + return r; +} +static inline void usb_pullup_out_write(unsigned char value) { + csr_writel(value, 0xe0004800L); +} +#define CSR_USB_ADDRESS_ADDR 0xe0004804L +#define CSR_USB_ADDRESS_SIZE 1 +static inline unsigned char usb_address_read(void) { + unsigned char r = csr_readl(0xe0004804L); + return r; +} +static inline void usb_address_write(unsigned char value) { + csr_writel(value, 0xe0004804L); +} +#define CSR_USB_ADDRESS_ADDR_OFFSET 0 +#define CSR_USB_ADDRESS_ADDR_SIZE 7 +#define CSR_USB_NEXT_EV_ADDR 0xe0004808L +#define CSR_USB_NEXT_EV_SIZE 1 +static inline unsigned char usb_next_ev_read(void) { + unsigned char r = csr_readl(0xe0004808L); + return r; +} +#define CSR_USB_NEXT_EV_IN_OFFSET 0 +#define CSR_USB_NEXT_EV_IN_SIZE 1 +#define CSR_USB_NEXT_EV_OUT_OFFSET 1 +#define CSR_USB_NEXT_EV_OUT_SIZE 1 +#define CSR_USB_NEXT_EV_SETUP_OFFSET 2 +#define CSR_USB_NEXT_EV_SETUP_SIZE 1 +#define CSR_USB_NEXT_EV_RESET_OFFSET 3 +#define CSR_USB_NEXT_EV_RESET_SIZE 1 +#define CSR_USB_SETUP_DATA_ADDR 0xe000480cL +#define CSR_USB_SETUP_DATA_SIZE 1 +static inline unsigned char usb_setup_data_read(void) { + unsigned char r = csr_readl(0xe000480cL); + return r; +} +#define CSR_USB_SETUP_DATA_DATA_OFFSET 0 +#define CSR_USB_SETUP_DATA_DATA_SIZE 8 +#define CSR_USB_SETUP_CTRL_ADDR 0xe0004810L +#define CSR_USB_SETUP_CTRL_SIZE 1 +static inline unsigned char usb_setup_ctrl_read(void) { + unsigned char r = csr_readl(0xe0004810L); + return r; +} +static inline void usb_setup_ctrl_write(unsigned char value) { + csr_writel(value, 0xe0004810L); +} +#define CSR_USB_SETUP_CTRL_RESET_OFFSET 5 +#define CSR_USB_SETUP_CTRL_RESET_SIZE 1 +#define CSR_USB_SETUP_STATUS_ADDR 0xe0004814L +#define CSR_USB_SETUP_STATUS_SIZE 1 +static inline unsigned char usb_setup_status_read(void) { + unsigned char r = csr_readl(0xe0004814L); + return r; +} +#define CSR_USB_SETUP_STATUS_EPNO_OFFSET 0 +#define CSR_USB_SETUP_STATUS_EPNO_SIZE 4 +#define CSR_USB_SETUP_STATUS_HAVE_OFFSET 4 +#define CSR_USB_SETUP_STATUS_HAVE_SIZE 1 +#define CSR_USB_SETUP_STATUS_PEND_OFFSET 5 +#define CSR_USB_SETUP_STATUS_PEND_SIZE 1 +#define CSR_USB_SETUP_STATUS_IS_IN_OFFSET 6 +#define CSR_USB_SETUP_STATUS_IS_IN_SIZE 1 +#define CSR_USB_SETUP_STATUS_DATA_OFFSET 7 +#define CSR_USB_SETUP_STATUS_DATA_SIZE 1 +#define CSR_USB_SETUP_EV_STATUS_ADDR 0xe0004818L +#define CSR_USB_SETUP_EV_STATUS_SIZE 1 +static inline unsigned char usb_setup_ev_status_read(void) { + unsigned char r = csr_readl(0xe0004818L); + return r; +} +static inline void usb_setup_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0004818L); +} +#define CSR_USB_SETUP_EV_PENDING_ADDR 0xe000481cL +#define CSR_USB_SETUP_EV_PENDING_SIZE 1 +static inline unsigned char usb_setup_ev_pending_read(void) { + unsigned char r = csr_readl(0xe000481cL); + return r; +} +static inline void usb_setup_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe000481cL); +} +#define CSR_USB_SETUP_EV_ENABLE_ADDR 0xe0004820L +#define CSR_USB_SETUP_EV_ENABLE_SIZE 1 +static inline unsigned char usb_setup_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0004820L); + return r; +} +static inline void usb_setup_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0004820L); +} +#define CSR_USB_IN_DATA_ADDR 0xe0004824L +#define CSR_USB_IN_DATA_SIZE 1 +static inline unsigned char usb_in_data_read(void) { + unsigned char r = csr_readl(0xe0004824L); + return r; +} +static inline void usb_in_data_write(unsigned char value) { + csr_writel(value, 0xe0004824L); +} +#define CSR_USB_IN_DATA_DATA_OFFSET 0 +#define CSR_USB_IN_DATA_DATA_SIZE 8 +#define CSR_USB_IN_CTRL_ADDR 0xe0004828L +#define CSR_USB_IN_CTRL_SIZE 1 +static inline unsigned char usb_in_ctrl_read(void) { + unsigned char r = csr_readl(0xe0004828L); + return r; +} +static inline void usb_in_ctrl_write(unsigned char value) { + csr_writel(value, 0xe0004828L); +} +#define CSR_USB_IN_CTRL_EPNO_OFFSET 0 +#define CSR_USB_IN_CTRL_EPNO_SIZE 4 +#define CSR_USB_IN_CTRL_RESET_OFFSET 5 +#define CSR_USB_IN_CTRL_RESET_SIZE 1 +#define CSR_USB_IN_CTRL_STALL_OFFSET 6 +#define CSR_USB_IN_CTRL_STALL_SIZE 1 +#define CSR_USB_IN_STATUS_ADDR 0xe000482cL +#define CSR_USB_IN_STATUS_SIZE 1 +static inline unsigned char usb_in_status_read(void) { + unsigned char r = csr_readl(0xe000482cL); + return r; +} +#define CSR_USB_IN_STATUS_IDLE_OFFSET 0 +#define CSR_USB_IN_STATUS_IDLE_SIZE 1 +#define CSR_USB_IN_STATUS_HAVE_OFFSET 4 +#define CSR_USB_IN_STATUS_HAVE_SIZE 1 +#define CSR_USB_IN_STATUS_PEND_OFFSET 5 +#define CSR_USB_IN_STATUS_PEND_SIZE 1 +#define CSR_USB_IN_EV_STATUS_ADDR 0xe0004830L +#define CSR_USB_IN_EV_STATUS_SIZE 1 +static inline unsigned char usb_in_ev_status_read(void) { + unsigned char r = csr_readl(0xe0004830L); + return r; +} +static inline void usb_in_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0004830L); +} +#define CSR_USB_IN_EV_PENDING_ADDR 0xe0004834L +#define CSR_USB_IN_EV_PENDING_SIZE 1 +static inline unsigned char usb_in_ev_pending_read(void) { + unsigned char r = csr_readl(0xe0004834L); + return r; +} +static inline void usb_in_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe0004834L); +} +#define CSR_USB_IN_EV_ENABLE_ADDR 0xe0004838L +#define CSR_USB_IN_EV_ENABLE_SIZE 1 +static inline unsigned char usb_in_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0004838L); + return r; +} +static inline void usb_in_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0004838L); +} +#define CSR_USB_OUT_DATA_ADDR 0xe000483cL +#define CSR_USB_OUT_DATA_SIZE 1 +static inline unsigned char usb_out_data_read(void) { + unsigned char r = csr_readl(0xe000483cL); + return r; +} +#define CSR_USB_OUT_DATA_DATA_OFFSET 0 +#define CSR_USB_OUT_DATA_DATA_SIZE 8 +#define CSR_USB_OUT_CTRL_ADDR 0xe0004840L +#define CSR_USB_OUT_CTRL_SIZE 1 +static inline unsigned char usb_out_ctrl_read(void) { + unsigned char r = csr_readl(0xe0004840L); + return r; +} +static inline void usb_out_ctrl_write(unsigned char value) { + csr_writel(value, 0xe0004840L); +} +#define CSR_USB_OUT_CTRL_EPNO_OFFSET 0 +#define CSR_USB_OUT_CTRL_EPNO_SIZE 4 +#define CSR_USB_OUT_CTRL_ENABLE_OFFSET 4 +#define CSR_USB_OUT_CTRL_ENABLE_SIZE 1 +#define CSR_USB_OUT_CTRL_RESET_OFFSET 5 +#define CSR_USB_OUT_CTRL_RESET_SIZE 1 +#define CSR_USB_OUT_CTRL_STALL_OFFSET 6 +#define CSR_USB_OUT_CTRL_STALL_SIZE 1 +#define CSR_USB_OUT_STATUS_ADDR 0xe0004844L +#define CSR_USB_OUT_STATUS_SIZE 1 +static inline unsigned char usb_out_status_read(void) { + unsigned char r = csr_readl(0xe0004844L); + return r; +} +#define CSR_USB_OUT_STATUS_EPNO_OFFSET 0 +#define CSR_USB_OUT_STATUS_EPNO_SIZE 4 +#define CSR_USB_OUT_STATUS_HAVE_OFFSET 4 +#define CSR_USB_OUT_STATUS_HAVE_SIZE 1 +#define CSR_USB_OUT_STATUS_PEND_OFFSET 5 +#define CSR_USB_OUT_STATUS_PEND_SIZE 1 +#define CSR_USB_OUT_EV_STATUS_ADDR 0xe0004848L +#define CSR_USB_OUT_EV_STATUS_SIZE 1 +static inline unsigned char usb_out_ev_status_read(void) { + unsigned char r = csr_readl(0xe0004848L); + return r; +} +static inline void usb_out_ev_status_write(unsigned char value) { + csr_writel(value, 0xe0004848L); +} +#define CSR_USB_OUT_EV_PENDING_ADDR 0xe000484cL +#define CSR_USB_OUT_EV_PENDING_SIZE 1 +static inline unsigned char usb_out_ev_pending_read(void) { + unsigned char r = csr_readl(0xe000484cL); + return r; +} +static inline void usb_out_ev_pending_write(unsigned char value) { + csr_writel(value, 0xe000484cL); +} +#define CSR_USB_OUT_EV_ENABLE_ADDR 0xe0004850L +#define CSR_USB_OUT_EV_ENABLE_SIZE 1 +static inline unsigned char usb_out_ev_enable_read(void) { + unsigned char r = csr_readl(0xe0004850L); + return r; +} +static inline void usb_out_ev_enable_write(unsigned char value) { + csr_writel(value, 0xe0004850L); +} +#define CSR_USB_OUT_ENABLE_STATUS_ADDR 0xe0004854L +#define CSR_USB_OUT_ENABLE_STATUS_SIZE 1 +static inline unsigned char usb_out_enable_status_read(void) { + unsigned char r = csr_readl(0xe0004854L); + return r; +} +#define CSR_USB_OUT_STALL_STATUS_ADDR 0xe0004858L +#define CSR_USB_OUT_STALL_STATUS_SIZE 1 +static inline unsigned char usb_out_stall_status_read(void) { + unsigned char r = csr_readl(0xe0004858L); + return r; +} + +/* version */ +#define CSR_VERSION_BASE 0xe0007000L +#define CSR_VERSION_MAJOR_ADDR 0xe0007000L +#define CSR_VERSION_MAJOR_SIZE 1 +static inline unsigned char version_major_read(void) { + unsigned char r = csr_readl(0xe0007000L); + return r; +} +#define CSR_VERSION_MINOR_ADDR 0xe0007004L +#define CSR_VERSION_MINOR_SIZE 1 +static inline unsigned char version_minor_read(void) { + unsigned char r = csr_readl(0xe0007004L); + return r; +} +#define CSR_VERSION_REVISION_ADDR 0xe0007008L +#define CSR_VERSION_REVISION_SIZE 1 +static inline unsigned char version_revision_read(void) { + unsigned char r = csr_readl(0xe0007008L); + return r; +} +#define CSR_VERSION_GITREV_ADDR 0xe000700cL +#define CSR_VERSION_GITREV_SIZE 4 +static inline unsigned int version_gitrev_read(void) { + unsigned int r = csr_readl(0xe000700cL); + r <<= 8; + r |= csr_readl(0xe0007010L); + r <<= 8; + r |= csr_readl(0xe0007014L); + r <<= 8; + r |= csr_readl(0xe0007018L); + return r; +} +#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL +#define CSR_VERSION_GITEXTRA_SIZE 2 +static inline unsigned short int version_gitextra_read(void) { + unsigned short int r = csr_readl(0xe000701cL); + r <<= 8; + r |= csr_readl(0xe0007020L); + return r; +} +#define CSR_VERSION_DIRTY_ADDR 0xe0007024L +#define CSR_VERSION_DIRTY_SIZE 1 +static inline unsigned char version_dirty_read(void) { + unsigned char r = csr_readl(0xe0007024L); + return r; +} +#define CSR_VERSION_DIRTY_DIRTY_OFFSET 0 +#define CSR_VERSION_DIRTY_DIRTY_SIZE 1 +#define CSR_VERSION_MODEL_ADDR 0xe0007028L +#define CSR_VERSION_MODEL_SIZE 1 +static inline unsigned char version_model_read(void) { + unsigned char r = csr_readl(0xe0007028L); + return r; +} +#define CSR_VERSION_MODEL_MODEL_OFFSET 0 +#define CSR_VERSION_MODEL_MODEL_SIZE 8 +#define CSR_VERSION_SEED_ADDR 0xe000702cL +#define CSR_VERSION_SEED_SIZE 4 +static inline unsigned int version_seed_read(void) { + unsigned int r = csr_readl(0xe000702cL); + r <<= 8; + r |= csr_readl(0xe0007030L); + r <<= 8; + r |= csr_readl(0xe0007034L); + r <<= 8; + r |= csr_readl(0xe0007038L); + return r; +} + +#endif diff --git a/ports/litex/boards/fomu/fomu-spi.ld b/ports/litex/boards/fomu/fomu-spi.ld new file mode 100644 index 0000000000000..486c3cad11bf6 --- /dev/null +++ b/ports/litex/boards/fomu/fomu-spi.ld @@ -0,0 +1,116 @@ +/* + GNU linker script for Fomu +*/ + +ENTRY(_start) + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x20040000, LENGTH = 0x100000 /* entire flash, 1 MiB */ + RAM (xrw) : ORIGIN = 0x10000000, LENGTH = 0x00020000 /* 128 KiB */ +} + +/* top end of the stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* define output sections */ +SECTIONS +{ + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + + *(.itcm.*) /* Instruction Tightly Coupled Memory */ + *(.dtcm_data.*) /* Data Tightly Coupled Memory */ + + *(.text.cmp_lfn) + *(.text.qstr_find_strn) + *(.text.dcd_edpt_xfer) + *(.text.pop_rule) + *(.text.ff_wtoupper) + *(.text.dir_find) + *(.text.push_rule) + *(.text.csr_writel) + *(.text.csr_readl) + *(.text.timer0_ev_pending_write) + *(.text.autoreload_tick) + *(.text.filesystem_tick) + *(.text.usb_background) + + *(.text.dcd_*) + *(.text.tud_control_*) + *(.text.tud_cdc_n_write_flush) + *(.text.tud_task) + *(.text.tu_edpt_dir) + *(.text.tu_fifo_empty) + *(.text.usbd_edpt_busy) + *(.text.irq_getmask) + *(.text.irq_setmask) + *(.text.irq_pending) + *(.text._osal_q_lock) + *(.text.osal_queue_receive) + + *(.text.mp_obj_get_type) + *(.text.mp_parse) + *(.text.parse_compile_execute) + *(.text.mp_map_lookup) + *(.text.mp_execute_bytecode) /* Note: this function is 7kb */ + + *(.ramtext) /* .text* sections (code) */ + *(.ramtext*) /* .text* sections (code) */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.sdata) /* .data sections */ + *(.sdata*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + KEEP(*(.text.start)) /* isr vector table */ + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.srodata) /* .rodata sections (constants, strings, etc.) */ + *(.srodata*) /* .rodata* sections (constants, strings, etc.) */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ + } >FLASH + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss) + *(.bss*) + *(.dtcm_bss.*) /* Data Tightly Coupled Memory */ + *(.sbss) + *(.sbss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code */ + } >RAM + + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + _heap_start = .; /* define a global symbol at heap start */ + } >RAM +} diff --git a/ports/litex/boards/fomu/generated/soc.h b/ports/litex/boards/fomu/generated/soc.h new file mode 100644 index 0000000000000..91b2f1a310a33 --- /dev/null +++ b/ports/litex/boards/fomu/generated/soc.h @@ -0,0 +1,58 @@ +//-------------------------------------------------------------------------------- +// Auto-generated by Migen (f4fcd10) & LiteX (de205d4a) on 2019-11-25 15:17:59 +//-------------------------------------------------------------------------------- +#ifndef __GENERATED_SOC_H +#define __GENERATED_SOC_H +#define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870 +static inline int config_bitstream_sync_header1_read(void) { + return 2123999870; +} +#define CONFIG_BITSTREAM_SYNC_HEADER2 2125109630 +static inline int config_bitstream_sync_header2_read(void) { + return 2125109630; +} +#define CONFIG_CLOCK_FREQUENCY 12000000 +static inline int config_clock_frequency_read(void) { + return 12000000; +} +#define CONFIG_CPU_RESET_ADDR 0 +static inline int config_cpu_reset_addr_read(void) { + return 0; +} +#define CONFIG_CPU_TYPE "VEXRISCV" +static inline const char * config_cpu_type_read(void) { + return "VEXRISCV"; +} +#define CONFIG_CPU_TYPE_VEXRISCV +#define CONFIG_CPU_VARIANT "MIN" +static inline const char * config_cpu_variant_read(void) { + return "MIN"; +} +#define CONFIG_CPU_VARIANT_MIN +#define CONFIG_CSR_ALIGNMENT 32 +static inline int config_csr_alignment_read(void) { + return 32; +} +#define CONFIG_CSR_DATA_WIDTH 8 +static inline int config_csr_data_width_read(void) { + return 8; +} +#define CONFIG_FOMU_REV "HACKER" +static inline const char * config_fomu_rev_read(void) { + return "HACKER"; +} +#define CONFIG_FOMU_REV_HACKER +#define CONFIG_SHADOW_BASE 2147483648 +static inline int config_shadow_base_read(void) { + return 2147483648; +} +#define TIMER0_INTERRUPT 2 +static inline int timer0_interrupt_read(void) { + return 2; +} +#define USB_INTERRUPT 3 +static inline int usb_interrupt_read(void) { + return 3; +} + +#endif diff --git a/ports/litex/boards/fomu/mpconfigboard.h b/ports/litex/boards/fomu/mpconfigboard.h new file mode 100644 index 0000000000000..127301eee2b0c --- /dev/null +++ b/ports/litex/boards/fomu/mpconfigboard.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Fomu" +#define MICROPY_HW_MCU_NAME "VexRiscv" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x1000) +#define FLASH_PARTITION_OFFSET_BYTES (1024*1024) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE) diff --git a/ports/litex/boards/fomu/mpconfigboard.mk b/ports/litex/boards/fomu/mpconfigboard.mk new file mode 100644 index 0000000000000..4787803ccdd56 --- /dev/null +++ b/ports/litex/boards/fomu/mpconfigboard.mk @@ -0,0 +1,20 @@ +USB_VID = 0x1209 +USB_PID = 0x5BF0 +USB_PRODUCT = "Fomu" +USB_MANUFACTURER = "Foosn" +USB_DEVICES = "CDC,MSC,AUDIO,HID" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +# Fomu only implements rv32i +CFLAGS += -march=rv32i -mabi=ilp32 +LDFLAGS += -march=rv32i -mabi=ilp32 + +CIRCUITPY_NEOPIXEL_WRITE = 1 +CIRCUITPY_DIGITALIO = 1 +CIRCUITPY_MICROCONTROLLER = 1 diff --git a/ports/litex/boards/fomu/pins.c b/ports/litex/boards/fomu/pins.c new file mode 100644 index 0000000000000..6be495c3319ad --- /dev/null +++ b/ports/litex/boards/fomu/pins.c @@ -0,0 +1,9 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/litex/boards/fomu/profiling.gdb.txt b/ports/litex/boards/fomu/profiling.gdb.txt new file mode 100644 index 0000000000000..28faf45b73d39 --- /dev/null +++ b/ports/litex/boards/fomu/profiling.gdb.txt @@ -0,0 +1,16 @@ +set pagination 0 +set logging file profile.txt +set logging overwrite + +server define poor_profile +set $total = $arg0 +set $i = 0 + set logging on + while($i<$total) + set $i = $i + 1 + cont + p $pc + bt + end + set logging off +end diff --git a/ports/litex/common-hal/digitalio/DigitalInOut.c b/ports/litex/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000000..574d0de567431 --- /dev/null +++ b/ports/litex/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,119 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "csr.h" + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + (void)self; +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + + // claim_pin(pin); + self->pin = pin; + + return DIGITALINOUT_OK; +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == mp_const_none; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + + // reset_pin_number(0, self->pin->number); + self->pin = mp_const_none; +} + +void common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + (void)pull; + touch_oe_write(touch_oe_read() & ~(1 << self->pin->number)); +} + +void common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t *self, bool value, + digitalio_drive_mode_t drive_mode) { + (void)drive_mode; + common_hal_digitalio_digitalinout_set_value(self, value); + touch_oe_write(touch_oe_read() | (1 << self->pin->number)); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t *self) { + + return (touch_oe_read() & (1 << self->pin->number)) + ? DIRECTION_OUTPUT : DIRECTION_INPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t *self, bool value) { + if (value) + touch_o_write(touch_o_read() | (1 << self->pin->number)); + else + touch_o_write(touch_o_read() & ~(1 << self->pin->number)); +} + +bool common_hal_digitalio_digitalinout_get_value( + digitalio_digitalinout_obj_t *self) { + return !!(touch_i_read() & (1 << self->pin->number)); +} + +void common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t *self, + digitalio_drive_mode_t drive_mode) { + (void)self; + (void)drive_mode; +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT) + return DRIVE_MODE_PUSH_PULL; + else + return DRIVE_MODE_OPEN_DRAIN; +} + +void common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + (void)self; + (void)pull; +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t *self) { + return PULL_NONE; +} diff --git a/ports/litex/common-hal/digitalio/DigitalInOut.h b/ports/litex/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 0000000000000..3c5bdafaf2c47 --- /dev/null +++ b/ports/litex/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_FOMU_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_FOMU_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_FOMU_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/litex/common-hal/digitalio/__init__.c b/ports/litex/common-hal/digitalio/__init__.c new file mode 100644 index 0000000000000..20fad459593ac --- /dev/null +++ b/ports/litex/common-hal/digitalio/__init__.c @@ -0,0 +1 @@ +// No digitalio module functions. diff --git a/ports/litex/common-hal/microcontroller/Pin.c b/ports/litex/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000000..632468f6d062d --- /dev/null +++ b/ports/litex/common-hal/microcontroller/Pin.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" + +#include "py/mphal.h" + +STATIC uint8_t claimed_pins[1]; + +// Mark pin as free and return it to a quiescent state. +void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { + if (pin_port == 0x0F) { + return; + } + + // Clear claimed bit. + claimed_pins[pin_port] &= ~(1<number; +} + +bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) { + return !(claimed_pins[pin_port] & 1<number); +} diff --git a/ports/litex/common-hal/microcontroller/Pin.h b/ports/litex/common-hal/microcontroller/Pin.h new file mode 100644 index 0000000000000..186e120a28aca --- /dev/null +++ b/ports/litex/common-hal/microcontroller/Pin.h @@ -0,0 +1,59 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_FOMU_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_FOMU_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include "py/mphal.h" + + +typedef struct { + mp_obj_base_t base; + uint8_t number; +} mcu_pin_obj_t; + +#define PIN(p_number) \ +{ \ + { &mcu_pin_type }, \ + .number = p_number \ +} + +extern const mcu_pin_obj_t pin_TOUCH1; +extern const mcu_pin_obj_t pin_TOUCH2; +extern const mcu_pin_obj_t pin_TOUCH3; +extern const mcu_pin_obj_t pin_TOUCH4; + +void reset_all_pins(void); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin_port, uint8_t pin_number); +void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number); +// GPIO_TypeDef * pin_port(uint8_t pin_port); +uint16_t pin_mask(uint8_t pin_number); + +#endif // MICROPY_INCLUDED_FOMU_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/litex/common-hal/microcontroller/Processor.c b/ports/litex/common-hal/microcontroller/Processor.c new file mode 100644 index 0000000000000..9d2b05aadeab0 --- /dev/null +++ b/ports/litex/common-hal/microcontroller/Processor.c @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "common-hal/microcontroller/Processor.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "csr.h" +#include "generated/soc.h" + +float common_hal_mcu_processor_get_temperature(void) { + return NAN; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return CONFIG_CLOCK_FREQUENCY; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + raw_id[0] = csr_readl(CSR_VERSION_MAJOR_ADDR); + raw_id[1] = csr_readl(CSR_VERSION_MINOR_ADDR); + raw_id[2] = csr_readl(CSR_VERSION_REVISION_ADDR); + raw_id[3] = csr_readl(CSR_VERSION_GITREV_ADDR + 0); + raw_id[4] = csr_readl(CSR_VERSION_GITREV_ADDR + 4); + raw_id[5] = csr_readl(CSR_VERSION_GITREV_ADDR + 8); + raw_id[6] = csr_readl(CSR_VERSION_GITREV_ADDR + 12); + raw_id[7] = csr_readl(CSR_VERSION_GITEXTRA_ADDR + 0); + raw_id[8] = csr_readl(CSR_VERSION_GITEXTRA_ADDR + 4); + raw_id[9] = csr_readl(CSR_VERSION_DIRTY_ADDR); + raw_id[10] = csr_readl(CSR_VERSION_MODEL_ADDR); + raw_id[11] = csr_readl(CSR_VERSION_SEED_ADDR + 0); + raw_id[12] = csr_readl(CSR_VERSION_SEED_ADDR + 4); + raw_id[13] = csr_readl(CSR_VERSION_SEED_ADDR + 8); + raw_id[14] = csr_readl(CSR_VERSION_SEED_ADDR + 12); +} diff --git a/ports/litex/common-hal/microcontroller/Processor.h b/ports/litex/common-hal/microcontroller/Processor.h new file mode 100644 index 0000000000000..a2ea261c8f892 --- /dev/null +++ b/ports/litex/common-hal/microcontroller/Processor.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 15 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; + +#endif // MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/litex/common-hal/microcontroller/__init__.c b/ports/litex/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000000..3c91661144b81 --- /dev/null +++ b/ports/litex/common-hal/microcontroller/__init__.c @@ -0,0 +1,111 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/microcontroller/Processor.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "supervisor/filesystem.h" +#include "supervisor/shared/safe_mode.h" + +#include "csr.h" +#include "irq.h" + +void common_hal_mcu_delay_us(uint32_t delay) { + // if (__get_PRIMASK() == 0x00000000) { + // //by default use ticks_ms + // uint32_t start = get_us(); + // while (get_us()-start < delay) { + // __asm__ __volatile__("nop"); + // } + // } else { + // //when SysTick is disabled, approximate with busy loop + // const uint32_t ucount = HAL_RCC_GetSysClockFreq() / 1000000 * delay / LOOP_TICKS; + // for (uint32_t count = 0; ++count <= ucount;) { + // } + // } +} + +volatile uint32_t nesting_count = 0; + +void common_hal_mcu_disable_interrupts(void) { + irq_setie(0); + // __DMB(); + nesting_count++; +} + +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + asm("ebreak"); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + irq_setie(1); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if(runmode == RUNMODE_SAFE_MODE) + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); +} + +void common_hal_mcu_reset(void) { + filesystem_flush(); //TODO: implement as part of flash improvements + // NVIC_SystemReset(); + while(1); +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +const mcu_pin_obj_t pin_TOUCH1 = PIN(0); +const mcu_pin_obj_t pin_TOUCH2 = PIN(1); +const mcu_pin_obj_t pin_TOUCH3 = PIN(2); +const mcu_pin_obj_t pin_TOUCH4 = PIN(3); + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/litex/common-hal/neopixel_write/__init__.c b/ports/litex/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000000..29fd318d401e7 --- /dev/null +++ b/ports/litex/common-hal/neopixel_write/__init__.c @@ -0,0 +1,93 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "shared-bindings/neopixel_write/__init__.h" +#include "csr.h" + +// ICE40 LED Driver hard macro. +// See http://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/IK/ICE40LEDDriverUsageGuide.ashx?document_id=50668 +enum led_registers { + LEDDCR0 = 8, + LEDDBR = 9, + LEDDONR = 10, + LEDDOFR = 11, + LEDDBCRR = 5, + LEDDBCFR = 6, + LEDDPWRR = 1, + LEDDPWRG = 2, + LEDDPWRB = 3, +}; + +// Control register definitions +#define LEDDCR0_LEDDEN (1 << 7) +#define LEDDCR0_FR250 (1 << 6) +#define LEDDCR0_OUTPOL (1 << 5) +#define LEDDCR0_OUTSKEW (1 << 4) +#define LEDDCR0_QUICKSTOP (1 << 3) +#define LEDDCR0_PWM_MODE (1 << 2) +#define LEDDCR0_BRMSBEXT (1 << 0) + +// Write a value into the LEDDA_IP register. +static void ledda_write(uint8_t value, uint8_t addr) { + rgb_addr_write(addr); + rgb_dat_write(value); +} + +static int ledda_init_done; + +static void ledda_init(void) { + if (ledda_init_done) + return; + + // Enable the driver + rgb_ctrl_write((1 << CSR_RGB_CTRL_EXE_OFFSET) | (1 << CSR_RGB_CTRL_CURREN_OFFSET) | (1 << CSR_RGB_CTRL_RGBLEDEN_OFFSET)); + + ledda_write(LEDDCR0_LEDDEN | LEDDCR0_FR250 | LEDDCR0_QUICKSTOP, LEDDCR0); + + // Set clock register to 12 MHz / 64 kHz - 1 + ledda_write((12000000/64000)-1, LEDDBR); + + // Ensure LED "breathe" effect is diabled + ledda_write(0, LEDDBCRR); + ledda_write(0, LEDDBCFR); + + // Also disable the LED blink time + ledda_write(0, LEDDONR); + ledda_write(0, LEDDOFR); + + ledda_init_done = 1; +} + +void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { + (void)digitalinout; + (void)numBytes; + ledda_init(); + + ledda_write(pixels[0], LEDDPWRR); // Red + ledda_write(pixels[1], LEDDPWRG); // Green + ledda_write(pixels[2], LEDDPWRB); // Blue +} diff --git a/ports/litex/common-hal/supervisor/Runtime.c b/ports/litex/common-hal/supervisor/Runtime.c new file mode 100644 index 0000000000000..feab6987d8b8c --- /dev/null +++ b/ports/litex/common-hal/supervisor/Runtime.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} + diff --git a/ports/litex/common-hal/supervisor/Runtime.h b/ports/litex/common-hal/supervisor/Runtime.h new file mode 100644 index 0000000000000..d1fe246211bd5 --- /dev/null +++ b/ports/litex/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/litex/common-hal/supervisor/__init__.c b/ports/litex/common-hal/supervisor/__init__.c new file mode 100644 index 0000000000000..ac88556b45da4 --- /dev/null +++ b/ports/litex/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/litex/common-hal/time/__init__.c b/ports/litex/common-hal/time/__init__.c new file mode 100644 index 0000000000000..c85077868aa30 --- /dev/null +++ b/ports/litex/common-hal/time/__init__.c @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "tick.h" + +uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/litex/crt0-vexriscv.S b/ports/litex/crt0-vexriscv.S new file mode 100644 index 0000000000000..0419acf8511d9 --- /dev/null +++ b/ports/litex/crt0-vexriscv.S @@ -0,0 +1,94 @@ +.global main +.global isr + +.section .text.start +.global _start + +_start: + j crt_init + # This sentinal ensures that this program is loaded + # to RAM when loaded using dfu-util. + #.word 0x17ab0f23 + #.word 0x10001000 + +.section .ramtext +.global trap_entry +.align 4 +trap_entry: + sw x1, - 1*4(sp) + sw x5, - 2*4(sp) + sw x6, - 3*4(sp) + sw x7, - 4*4(sp) + sw x10, - 5*4(sp) + sw x11, - 6*4(sp) + sw x12, - 7*4(sp) + sw x13, - 8*4(sp) + sw x14, - 9*4(sp) + sw x15, -10*4(sp) + sw x16, -11*4(sp) + sw x17, -12*4(sp) + sw x28, -13*4(sp) + sw x29, -14*4(sp) + sw x30, -15*4(sp) + sw x31, -16*4(sp) + addi sp,sp,-16*4 + call isr + lw x1 , 15*4(sp) + lw x5, 14*4(sp) + lw x6, 13*4(sp) + lw x7, 12*4(sp) + lw x10, 11*4(sp) + lw x11, 10*4(sp) + lw x12, 9*4(sp) + lw x13, 8*4(sp) + lw x14, 7*4(sp) + lw x15, 6*4(sp) + lw x16, 5*4(sp) + lw x17, 4*4(sp) + lw x28, 3*4(sp) + lw x29, 2*4(sp) + lw x30, 1*4(sp) + lw x31, 0*4(sp) + addi sp,sp,16*4 + mret + +.text + +crt_init: + # # Flush the caches + # .word 16399 + # .word 19 + # .word 19 + # .word 19 + la sp, _estack - 4 + la a0, trap_entry + csrw mtvec, a0 + +bss_init: + la a0, _sbss + la a1, _ebss +bss_loop: + beq a0,a1,bss_done + sw zero,0(a0) + add a0,a0,4 + j bss_loop +bss_done: + + /* Load DATA */ + la t0, _sidata + la t1, _sdata + la t2, _edata +3: + lw t3, 0(t0) + sw t3, 0(t1) + /* _edata is aligned to 16 bytes. Use word-xfers. */ + addi t0, t0, 4 + addi t1, t1, 4 + bltu t1, t2, 3b + + li a0, 0x880 //880 enable timer + external interrupt sources (until mstatus.MIE is set, they will never trigger an interrupt) + csrw mie,a0 + + call main +infinite_loop: + j infinite_loop diff --git a/ports/litex/fatfs_port.c b/ports/litex/fatfs_port.c new file mode 100644 index 0000000000000..13ac21fb1bcca --- /dev/null +++ b/ports/litex/fatfs_port.c @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +DWORD get_fattime(void) { + // TODO: Implement this function. For now, fake it. + return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2); +} diff --git a/ports/litex/hw/common.h b/ports/litex/hw/common.h new file mode 100644 index 0000000000000..6a97ca2e93f0a --- /dev/null +++ b/ports/litex/hw/common.h @@ -0,0 +1,33 @@ +#ifndef _HW_COMMON_H_ +#define _HW_COMMON_H_ +#include +static inline void csr_writeb(uint8_t value, uint32_t addr) +{ + *((volatile uint8_t *)addr) = value; +} + +static inline uint8_t csr_readb(uint32_t addr) +{ + return *(volatile uint8_t *)addr; +} + +static inline void csr_writew(uint16_t value, uint32_t addr) +{ + *((volatile uint16_t *)addr) = value; +} + +static inline uint16_t csr_readw(uint32_t addr) +{ + return *(volatile uint16_t *)addr; +} + +static inline void csr_writel(uint32_t value, uint32_t addr) +{ + *((volatile uint32_t *)addr) = value; +} + +static inline uint32_t csr_readl(uint32_t addr) +{ + return *(volatile uint32_t *)addr; +} +#endif /* _HW_COMMON_H_ */ \ No newline at end of file diff --git a/ports/litex/irq.h b/ports/litex/irq.h new file mode 100644 index 0000000000000..a8221890719a9 --- /dev/null +++ b/ports/litex/irq.h @@ -0,0 +1,71 @@ +#ifndef __IRQ_H +#define __IRQ_H + +#ifdef __cplusplus +extern "C" { +#endif + + +#define CSR_MSTATUS_MIE 0x8 + +#define CSR_IRQ_MASK 0xBC0 +#define CSR_IRQ_PENDING 0xFC0 + +#define CSR_DCACHE_INFO 0xCC0 + +#define csrr(reg) ({ unsigned long __tmp; \ + asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ + __tmp; }) + +#define csrw(reg, val) ({ \ + if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ + asm volatile ("csrw " #reg ", %0" :: "i"(val)); \ + else \ + asm volatile ("csrw " #reg ", %0" :: "r"(val)); }) + +#define csrs(reg, bit) ({ \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \ + else \ + asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); }) + +#define csrc(reg, bit) ({ \ + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \ + else \ + asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); }) + +static inline unsigned int irq_getie(void) +{ + return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0; +} + +static inline void irq_setie(unsigned int ie) +{ + if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +} + +static inline unsigned int irq_getmask(void) +{ + unsigned int mask; + asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK)); + return mask; +} + +static inline void irq_setmask(unsigned int mask) +{ + asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask)); +} + +static inline unsigned int irq_pending(void) +{ + unsigned int pending; + asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING)); + return pending; +} + +#ifdef __cplusplus +} +#endif + +#endif /* __IRQ_H */ \ No newline at end of file diff --git a/ports/litex/mpconfigport.h b/ports/litex/mpconfigport.h new file mode 100644 index 0000000000000..cfa3eb5c74592 --- /dev/null +++ b/ports/litex/mpconfigport.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef FPGA_MPCONFIGPORT_H__ +#define FPGA_MPCONFIGPORT_H__ + +#define MICROPY_PY_UJSON (0) +#define CIRCUITPY_INTERNAL_NVM_SIZE (0) +#define MICROPY_NLR_THUMB (0) + +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS +#define MICROPY_NLR_SETJMP (1) +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 + + +#endif // __INCLUDED_FPGA_MPCONFIGPORT_H diff --git a/ports/litex/mpconfigport.mk b/ports/litex/mpconfigport.mk new file mode 100644 index 0000000000000..47e2b1abc8f21 --- /dev/null +++ b/ports/litex/mpconfigport.mk @@ -0,0 +1,31 @@ +# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk +# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. +# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz + +# Internal math library is substantially smaller than toolchain one +INTERNAL_LIBM = 1 + +# Chip supplied serial number, in bytes +USB_SERIAL_NUMBER_LENGTH = 30 + +# Longints can be implemented as mpz, as longlong, or not +LONGINT_IMPL = MPZ + +#Reduced feature set for early port +CIRCUITPY_MINIMAL_BUILD = 1 + +# CIRCUITPY_BOARD = 1 +# CIRCUITPY_DIGITALIO = 1 +# CIRCUITPY_ANALOGIO = 1 +# CIRCUITPY_MICROCONTROLLER = 1 +# CIRCUITPY_BUSIO = 1 +# CIRCUITPY_PULSEIO = 1 +# CIRCUITPY_OS = 1 +# CIRCUITPY_STORAGE = 1 +# CIRCUITPY_RANDOM = 1 +CIRCUITPY_USB_HID = 1 +CIRCUITPY_USB_MIDI = 1 + +#ifeq ($(MCU_SUB_VARIANT), stm32f412zx) +#endif diff --git a/ports/litex/mphalport.c b/ports/litex/mphalport.c new file mode 100644 index 0000000000000..005a65aac4ac6 --- /dev/null +++ b/ports/litex/mphalport.c @@ -0,0 +1,81 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mphal.h" +#include "py/mpstate.h" +#include "py/gc.h" + +#include "csr.h" +#include "generated/soc.h" + +#include "irq.h" + +#ifdef CFG_TUSB_MCU + void hal_dcd_isr(uint8_t rhport); +#endif + +/*------------------------------------------------------------------*/ +/* delay + *------------------------------------------------------------------*/ +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + #ifdef MICROPY_VM_HOOK_LOOP + MICROPY_VM_HOOK_LOOP + #endif + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +extern void SysTick_Handler(void); + +__attribute__((section(".ramtext"))) +void isr(void) { + uint8_t irqs = irq_pending() & irq_getmask(); + +#ifdef CFG_TUSB_MCU + if (irqs & (1 << USB_INTERRUPT)) + hal_dcd_isr(0); +#endif + if (irqs & (1 << TIMER0_INTERRUPT)) + SysTick_Handler(); +} + +mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs) { + unsigned long __tmp; + asm volatile ("mv %0, x2" :"=r"(__tmp)); + return __tmp; +} diff --git a/ports/litex/mphalport.h b/ports/litex/mphalport.h new file mode 100644 index 0000000000000..540575c5879ee --- /dev/null +++ b/ports/litex/mphalport.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __FOMU_HAL +#define __FOMU_HAL + +#include +#include + +#include "lib/utils/interrupt_char.h" +#include "py/mpconfig.h" +#include "supervisor/shared/tick.h" + +#define mp_hal_ticks_ms() ((mp_uint_t) supervisor_ticks_ms32()) +//#define mp_hal_delay_us(us) NRFX_DELAY_US((uint32_t) (us)) + +bool mp_hal_stdin_any(void); + +#endif diff --git a/ports/minimal/qstrdefsport.h b/ports/litex/qstrdefsport.h similarity index 100% rename from ports/minimal/qstrdefsport.h rename to ports/litex/qstrdefsport.h diff --git a/ports/litex/supervisor/internal_flash.c b/ports/litex/supervisor/internal_flash.c new file mode 100644 index 0000000000000..93aeda8cbddb3 --- /dev/null +++ b/ports/litex/supervisor/internal_flash.c @@ -0,0 +1,350 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/internal_flash.h" + +#include +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#include "supervisor/usb.h" + +#include "csr.h" +#include "irq.h" + +enum pin { + PIN_MOSI = 0, + PIN_CLK = 1, + PIN_CS = 2, + PIN_MISO_EN = 3, + PIN_MISO = 4, // Value is ignored +}; + +#define NO_CACHE 0xffffffff + +static uint8_t _flash_cache[FLASH_PAGE_SIZE] __attribute__((aligned(4))); +static uint32_t _flash_page_addr = NO_CACHE; +static bool _flash_cache_dirty; +// ------------------------------------------------------------------------- +// When performing SPI operations, the flash cannot be accessed. Since we +// normally execute directly from SPI, this can cause problems. +// To work around this, we execute from RAM. This is accomplished by marking +// functions as being in the section ".ramtext". +// When building under GCC with -O0 or -Od, the `inline` attribute is ignored. +// Therefore, we must re-implement these functions here and explicitly mark +// them as being in `.ramtext`, even though they really ought to be inlined. +__attribute__((section(".ramtext"))) +static inline void spi_writel(uint32_t value, uint32_t addr) +{ + *((volatile uint32_t *)addr) = value; +} + +__attribute__((section(".ramtext"))) +static inline uint32_t spi_readl(uint32_t addr) +{ + return *(volatile uint32_t *)addr; +} + +__attribute__((section(".ramtext"))) +static inline void bb_spi_write(unsigned char value) { + spi_writel(value, CSR_LXSPI_BITBANG_ADDR); +} + +__attribute__((section(".ramtext"))) +static inline uint32_t bb_read(void) { + return spi_readl(CSR_LXSPI_MISO_ADDR); +} + +__attribute__((section(".ramtext"))) +static inline void bb_spi_en(unsigned int en) { + spi_writel(en, CSR_LXSPI_BITBANG_EN_ADDR); +} + +__attribute__((section(".ramtext"))) +static inline void bb_spi_irq_setie(unsigned int ie) +{ + if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +} + +__attribute__((section(".ramtext"))) +static inline void bb_spi_begin(void) { + bb_spi_write((0 << PIN_CLK) | (0 << PIN_CS)); +} + +__attribute__((section(".ramtext"))) +static inline void bb_spi_end(void) { + bb_spi_write((0 << PIN_CLK) | (1 << PIN_CS)); +} + +__attribute__((section(".ramtext"))) +static void spi_single_tx(uint8_t out) { + int bit; + + for (bit = 7; bit >= 0; bit--) { + if (out & (1 << bit)) { + bb_spi_write((0 << PIN_CLK) | (1 << PIN_MOSI)); + bb_spi_write((1 << PIN_CLK) | (1 << PIN_MOSI)); + bb_spi_write((0 << PIN_CLK) | (1 << PIN_MOSI)); + } else { + bb_spi_write((0 << PIN_CLK) | (0 << PIN_MOSI)); + bb_spi_write((1 << PIN_CLK) | (0 << PIN_MOSI)); + bb_spi_write((0 << PIN_CLK) | (0 << PIN_MOSI)); + } + } +} + +__attribute__((section(".ramtext"))) +static uint8_t spi_single_rx(void) { + int bit = 0; + uint8_t in = 0; + + bb_spi_write((1 << PIN_MISO_EN) | (0 << PIN_CLK)); + + while (bit++ < 8) { + bb_spi_write((1 << PIN_MISO_EN) | (1 << PIN_CLK)); + in = (in << 1) | bb_read(); + bb_spi_write((1 << PIN_MISO_EN) | (0 << PIN_CLK)); + } + + return in; +} + +__attribute__((section(".ramtext"))) +static int bb_spi_beginErase4(uint32_t erase_addr) { + // Enable Write-Enable Latch (WEL) + bb_spi_begin(); + spi_single_tx(0x06); + bb_spi_end(); + + bb_spi_begin(); + spi_single_tx(0x20); + spi_single_tx(erase_addr >> 16); + spi_single_tx(erase_addr >> 8); + spi_single_tx(erase_addr >> 0); + bb_spi_end(); + return 0; +} + +__attribute__((section(".ramtext"))) +static int bb_spi_beginWrite(uint32_t addr, const void *v_data, unsigned int count) { + const uint8_t write_cmd = 0x02; + const uint8_t *data = v_data; + unsigned int i; + +#ifdef NDEBUG + if (v_data < (const void *)_flash_cache) { + asm("ebreak"); + } + if ((v_data+count) > (const void *)&_flash_cache[4096]) { + asm("ebreak"); + } +#endif + + // Enable Write-Enable Latch (WEL) + bb_spi_begin(); + spi_single_tx(0x06); + bb_spi_end(); + + bb_spi_begin(); + spi_single_tx(write_cmd); + spi_single_tx(addr >> 16); + spi_single_tx(addr >> 8); + spi_single_tx(addr >> 0); + for (i = 0; (i < count) && (i < 256); i++) + spi_single_tx(*data++); + bb_spi_end(); + + return 0; +} + +__attribute__((section(".ramtext"))) +static uint8_t spi_read_status(void) { + uint8_t val; + + bb_spi_begin(); + spi_single_tx(0x05); + val = spi_single_rx(); + bb_spi_end(); + return val; +} + +__attribute__((section(".ramtext"))) +static int bb_spi_is_busy(void) { + return spi_read_status() & (1 << 0); +} + +__attribute__((used)) +uint32_t page_write_log[128]; +__attribute__((used)) +uint32_t page_write_log_offset; + +__attribute__((section(".ramtext"))) +static void bb_spi_write_page(uint32_t flash_address, const uint8_t *data) { + const uint32_t flash_address_end = flash_address + FLASH_PAGE_SIZE; + + // Ensure we're within the target flash address range. + if ((flash_address - FLASH_PARTITION_OFFSET_BYTES) > FLASH_SIZE) { + asm("ebreak"); + return; + } + if (flash_address < FLASH_PARTITION_OFFSET_BYTES) { + asm("ebreak"); + return; + } + + if ((flash_address_end - FLASH_PARTITION_OFFSET_BYTES) > FLASH_SIZE) { + asm("ebreak"); + return; + } + if (flash_address_end < FLASH_PARTITION_OFFSET_BYTES) { + asm("ebreak"); + return; + } + + // Ensure we're not erasing the middle of a flash bank + if ((flash_address & 0xfff) != 0) { + asm("ebreak"); + return; + } + + page_write_log[page_write_log_offset++] = flash_address; + if (page_write_log_offset > sizeof(page_write_log)/sizeof(*page_write_log)) page_write_log_offset=0; + + while (bb_spi_is_busy()) + ; // relax + bb_spi_beginErase4(flash_address); + while (bb_spi_is_busy()) + ; // relax + while (flash_address < flash_address_end) { + bb_spi_beginWrite(flash_address, data, 256); + while (bb_spi_is_busy()) + ; // relax + flash_address += 256; + data += 256; + } +} + +static inline uint32_t lba2addr(uint32_t block) { + return (0x20000000 + FLASH_PARTITION_OFFSET_BYTES) + (block * FILESYSTEM_BLOCK_SIZE); +} + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return FLASH_SIZE/FILESYSTEM_BLOCK_SIZE; +} + +__attribute__((section(".ramtext"))) +void supervisor_flash_flush(void) { + // Skip if data is the same, or if there is no data in the cache + if (_flash_page_addr == NO_CACHE) + return; + if (!_flash_cache_dirty) + return; + + // Disable interrupts and enable bit-bang mode on the SPI flash. + // This function is running from RAM -- otherwise enabling bitbang mode + // would crash the CPU as the program suddenly became an endless stream + // of `0xffffffff`. + bb_spi_irq_setie(0); + bb_spi_write((0 << PIN_CLK) | (1 << PIN_CS)); + bb_spi_en(1); + + bb_spi_write_page(_flash_page_addr & 0x00ffffff, (const uint8_t *)_flash_cache); + + bb_spi_en(0); + bb_spi_irq_setie(1); + + _flash_cache_dirty = false; +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Must write out anything in cache before trying to read. + supervisor_flash_flush(); + + uint32_t src = lba2addr(block); + memcpy(dest, (uint8_t*) src, FILESYSTEM_BLOCK_SIZE*num_blocks); + + #if USB_AVAILABLE + usb_background(); + #endif + + return 0; +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + while (num_blocks) { + uint32_t const addr = lba2addr(lba); + uint32_t const page_addr = addr & ~(FLASH_PAGE_SIZE - 1); + + uint32_t count = 8 - (lba % 8); // up to page boundary + count = MIN(num_blocks, count); + + if (page_addr != _flash_page_addr) { + // Write out anything in cache before overwriting it. + supervisor_flash_flush(); + + _flash_page_addr = page_addr; + _flash_cache_dirty = false; + + // Copy the current contents of the entire page into the cache. + memcpy(_flash_cache, (void *)page_addr, FLASH_PAGE_SIZE); + } + + // Overwrite part or all of the page cache with the src data, but only if it's changed. + if (_flash_cache_dirty || memcmp(_flash_cache + (addr & (FLASH_PAGE_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE)) { + memcpy(_flash_cache + (addr & (FLASH_PAGE_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE); + _flash_cache_dirty = true; + } + + // adjust for next run + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + + #if USB_AVAILABLE + usb_background(); + #endif + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/ports/litex/supervisor/internal_flash.h b/ports/litex/supervisor/internal_flash.h new file mode 100644 index 0000000000000..41a69e2abef1a --- /dev/null +++ b/ports/litex/supervisor/internal_flash.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#endif // MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_H diff --git a/ports/litex/supervisor/internal_flash_root_pointers.h b/ports/litex/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..ae3e45e14c001 --- /dev/null +++ b/ports/litex/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/litex/supervisor/port.c b/ports/litex/supervisor/port.c new file mode 100644 index 0000000000000..9688c7baefa15 --- /dev/null +++ b/ports/litex/supervisor/port.c @@ -0,0 +1,85 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "supervisor/port.h" +#include "boards/board.h" +#include "tick.h" +#include "irq.h" +#include "csr.h" + +safe_mode_t port_init(void) { + irq_setmask(0); + irq_setie(1); + tick_init(); + board_init(); + return NO_SAFE_MODE; +} + +extern uint32_t _ebss; +extern uint32_t _heap_start; +extern uint32_t _estack; + +void reset_port(void) { + // reset_all_pins(); + // i2c_reset(); + // spi_reset(); + // uart_reset(); + // pwmout_reset(); +} + +void reset_to_bootloader(void) { + reboot_ctrl_write(0xac); +} + +void reset_cpu(void) { +} + +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} diff --git a/ports/litex/supervisor/usb.c b/ports/litex/supervisor/usb.c new file mode 100644 index 0000000000000..182360b713179 --- /dev/null +++ b/ports/litex/supervisor/usb.c @@ -0,0 +1,36 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "tick.h" +#include "supervisor/usb.h" +#include "lib/utils/interrupt_char.h" +#include "lib/mp-readline/readline.h" + +void init_usb_hardware(void) { + +} diff --git a/ports/litex/tick.c b/ports/litex/tick.c new file mode 100644 index 0000000000000..8ba06044ac492 --- /dev/null +++ b/ports/litex/tick.c @@ -0,0 +1,82 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "csr.h" +#include "tick.h" +#include "irq.h" + +#include "supervisor/shared/autoreload.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "shared-module/gamepad/__init__.h" +#include "shared-bindings/microcontroller/Processor.h" + +// Global millisecond tick count +// volatile uint64_t ticks_ms = 0; + +__attribute__((section(".ramtext"))) +void SysTick_Handler(void) { + timer0_ev_pending_write(1); + supervisor_tick(); +} + +void tick_init() { + int t; + + timer0_en_write(0); + t = CONFIG_CLOCK_FREQUENCY / 1000; // 1000 kHz tick + timer0_reload_write(t); + timer0_load_write(t); + timer0_en_write(1); + timer0_ev_enable_write(1); + timer0_ev_pending_write(1); + irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT)); +} + +void tick_delay(uint32_t us) { + // uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + // uint32_t us_between_ticks = SysTick->VAL / ticks_per_us; + // uint64_t start_ms = ticks_ms; + // while (us > 1000) { + // while (ticks_ms == start_ms) {} + // us -= us_between_ticks; + // start_ms = ticks_ms; + // us_between_ticks = 1000; + // } + // while (SysTick->VAL > ((us_between_ticks - us) * ticks_per_us)) {} +} + +// us counts down! +void current_tick(uint64_t* ms, uint32_t* us_until_ms) { + // uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + // *ms = ticks_ms; + // *us_until_ms = SysTick->VAL / ticks_per_us; +} + +void wait_until(uint64_t ms, uint32_t us_until_ms) { + // uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + // while(ticks_ms <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} +} diff --git a/ports/litex/tick.h b/ports/litex/tick.h new file mode 100644 index 0000000000000..b4d27b8416e50 --- /dev/null +++ b/ports/litex/tick.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_LITEX_TICK_H +#define MICROPY_INCLUDED_LITEX_TICK_H + +#include "py/mpconfig.h" + +#include + +extern volatile uint64_t ticks_ms; + +extern struct timer_descriptor ms_timer; + +void tick_init(void); + +void tick_delay(uint32_t us); + +void current_tick(uint64_t* ms, uint32_t* us_until_ms); +// Do not call this with interrupts disabled because it may be waiting for +// ticks_ms to increment. +void wait_until(uint64_t ms, uint32_t us_until_ms); + +#endif // MICROPY_INCLUDED_LITEX_TICK_H diff --git a/ports/mimxrt10xx/.gitignore b/ports/mimxrt10xx/.gitignore new file mode 100644 index 0000000000000..414487d53eb83 --- /dev/null +++ b/ports/mimxrt10xx/.gitignore @@ -0,0 +1 @@ +build-*/ diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile new file mode 100644 index 0000000000000..80d1da1aacaf2 --- /dev/null +++ b/ports/mimxrt10xx/Makefile @@ -0,0 +1,247 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# Copyright (c) 2019 Artur Pacholec +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +INC += \ + -I. \ + -I../.. \ + -I../lib/mp-readline \ + -I../lib/timeutils \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -I$(BUILD) \ + -Iboards/ \ + -Iboards/$(BOARD) \ + -Iperipherals/ \ + -Iperipherals/mimxrt10xx/ \ + -Isdk/CMSIS/Include \ + -Isdk/devices/$(CHIP_FAMILY) \ + -Isdk/devices/$(CHIP_FAMILY)/drivers \ + -Isdk/devices/$(CHIP_FAMILY)/xip \ + +# NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. + +CFLAGS += -Os -DNDEBUG + +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 + +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb + # You may want to disable -flto if it interferes with debugging. + # CFLAGS += -flto -flto-partition=none + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra +else + #CFLAGS += -flto -flto-partition=none +endif + +CFLAGS += $(INC) -Wall -Wno-cast-align -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) + +CFLAGS += \ + -mthumb \ + -mapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -DCPU_$(CHIP_VARIANT) \ + -DDEBUG \ + -DIMXRT10XX \ + -Os -g3 -Wno-unused-parameter \ + -ffunction-sections -fdata-sections -fstack-usage + +LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld) + +LD_SCRIPT_FLAG := -Wl,-T, + +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib $(addprefix $(LD_SCRIPT_FLAG), $(LD_FILES)) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LIBS := -lgcc -lc -lnosys -lm + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +LDFLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mthumb -mapcs +BOOTLOADER_SIZE := 0x6000C000 + +SRC_SDK := \ + drivers/fsl_adc.c \ + drivers/fsl_cache.c \ + drivers/fsl_clock.c \ + drivers/fsl_common.c \ + drivers/fsl_flexspi.c \ + drivers/fsl_gpio.c \ + drivers/fsl_lpi2c.c \ + drivers/fsl_lpspi.c \ + drivers/fsl_lpuart.c \ + drivers/fsl_ocotp.c \ + drivers/fsl_pwm.c \ + drivers/fsl_snvs_hp.c \ + drivers/fsl_tempmon.c \ + drivers/fsl_trng.c \ + system_$(CHIP_FAMILY).c \ + +SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK)) + +SRC_C = \ + background.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/flash_config.c \ + boards/$(BOARD)/pins.c \ + fatfs_port.c \ + lib/mp-readline/readline.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/timeutils/timeutils.c \ + lib/utils/buffer_helper.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/interrupt_char.c \ + lib/utils/pyexec.c \ + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + lib/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c \ + mphalport.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/clocks.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/periph.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/pins.c \ + reset.c \ + supervisor/flexspi_nor_flash_ops.c \ + supervisor/shared/memory.c \ + tick.c + +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 + +SRC_MOD += lib/netutils/netutils.c + +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif + +# TODO +#ifeq ($(CIRCUITPY_AUDIOBUSIO),1) +#SRC_C += peripherals/samd/i2s.c peripherals/samd/$(CHIP_FAMILY)/i2s.c +#endif +# +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +SRC_S = \ + sdk/devices/$(CHIP_FAMILY)/gcc/startup_$(CHIP_FAMILY).S \ + supervisor/cpu.S + +OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SDK:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.S=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex + +$(BUILD)/firmware.elf: $(OBJ) $(LD_FILES) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out %.ld, $^) -Wl,--start-group $(LIBS) -Wl,--end-group + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@ + +$(BUILD)/firmware.uf2: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@-binpart + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $@-binpart + $(Q)rm $@-binpart + +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/mimxrt10xx/README.md b/ports/mimxrt10xx/README.md new file mode 100644 index 0000000000000..fe7fd5ea69727 --- /dev/null +++ b/ports/mimxrt10xx/README.md @@ -0,0 +1,3 @@ +# CircuitPython Port To The NXP i.MX RT10xx Series + +This is a port of CircuitPython to the i.MX RT10xx series of chips. diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c new file mode 100644 index 0000000000000..71dd795216427 --- /dev/null +++ b/ports/mimxrt10xx/background.c @@ -0,0 +1,82 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "background.h" + +//#include "audio_dma.h" +#include "tick.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include "py/runtime.h" +#include "shared-module/network/__init__.h" +#include "supervisor/linker.h" +#include "supervisor/shared/stack.h" + +#ifdef CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +volatile uint64_t last_finished_tick = 0; + +bool stack_ok_so_far = true; + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void PLACE_IN_ITCM(run_background_tasks)(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + assert_heap_ok(); + running_background_tasks = true; + + #if CIRCUITPY_AUDIOIO || CIRCUITPY_AUDIOBUSIO + audio_dma_background(); + #endif + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + + #if CIRCUITPY_NETWORK + network_module_background(); + #endif + filesystem_background(); + usb_background(); + running_background_tasks = false; + assert_heap_ok(); + + last_finished_tick = supervisor_ticks_ms64(); +} + +bool background_tasks_ok(void) { + return supervisor_ticks_ms64() - last_finished_tick < 1000; +} diff --git a/ports/mimxrt10xx/background.h b/ports/mimxrt10xx/background.h new file mode 100644 index 0000000000000..52789d0389041 --- /dev/null +++ b/ports/mimxrt10xx/background.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H +#define MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); +void run_background_vm_tasks(void); +bool background_tasks_ok(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H diff --git a/ports/mimxrt10xx/boards/board.h b/ports/mimxrt10xx/boards/board.h new file mode 100644 index 0000000000000..92d02d900ebed --- /dev/null +++ b/ports/mimxrt10xx/boards/board.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H +#define MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H + +#include + +#include "py/mpconfig.h" +#include "fsl_common.h" + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/board.c b/ports/mimxrt10xx/boards/feather_m7_1011/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c new file mode 100644 index 0000000000000..b74c0b1514eca --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h new file mode 100644 index 0000000000000..e96ec13dd9f81 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_00) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (4 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_12) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_11) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02) diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk new file mode 100644 index 0000000000000..fbaf5d399d0aa --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8092 +USB_PRODUCT = "Feather M7 1011" +USB_MANUFACTURER = "Adafruit" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 +FLASH = W25Q32JV + +# Include these Python libraries in the firmware +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ESP32SPI +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Requests diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/pins.c b/ports/mimxrt10xx/boards/feather_m7_1011/pins.c new file mode 100644 index 0000000000000..09e3217614e76 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/pins.c @@ -0,0 +1,43 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_05) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_00) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_01) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_12) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_00) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c new file mode 100644 index 0000000000000..b74c0b1514eca --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h new file mode 100644 index 0000000000000..a715a2c5634d8 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_SD_05) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_10) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_09) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk new file mode 100644 index 0000000000000..60eed8a80dd49 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8074 +USB_PRODUCT = "Feather MIMXRT1011" +USB_MANUFACTURER = "arturo182" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 +FLASH = W25Q64JV + +# Include these Python libraries in the firmware +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ESP32SPI +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Requests diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c new file mode 100644 index 0000000000000..2c6c1ce93ec3a --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c @@ -0,0 +1,52 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_07) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_05) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_01) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_10) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_GPIO_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_GPIO_11) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c new file mode 100644 index 0000000000000..b74c0b1514eca --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h new file mode 100644 index 0000000000000..4c3953187e58a --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h @@ -0,0 +1,23 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1062" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +//#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_EMC_22) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_EMC_21) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_B1_07) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B1_06) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B1_05) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_B1_03) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_B1_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk new file mode 100644 index 0000000000000..1c8646991c502 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8076 +USB_PRODUCT = "Feather MIMXRT1062" +USB_MANUFACTURER = "arturo182" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 +FLASH = W25Q64JV diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c new file mode 100644 index 0000000000000..eb287b87aa072 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_B1_08) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B1_06) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_B1_03) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + + // TODO: Big connector + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c new file mode 100644 index 0000000000000..7e8fb75b24e14 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c @@ -0,0 +1,121 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h new file mode 100644 index 0000000000000..128e33111e17c --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "IMXRT1010-EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (16 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_10) diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk new file mode 100644 index 0000000000000..81eb63597326b --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8078 +USB_PRODUCT = "IMXRT1010-EVK" +USB_MANUFACTURER = "NXP" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 +FLASH = AT25SF128A diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c new file mode 100644 index 0000000000000..a5a598760bedc --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c @@ -0,0 +1,57 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_SD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_SW), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_08) }, + + // SPDIF + { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_11) }, + + // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_09) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/board.c b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c new file mode 100644 index 0000000000000..80a57f17bec99 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c @@ -0,0 +1,126 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, +#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally, +#else + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, +#endif + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h new file mode 100644 index 0000000000000..a40df100e3ebe --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "iMX RT 1020 EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1021DAG5A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_SD_B1_03) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_SD_B1_02) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_08) diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk new file mode 100644 index 0000000000000..7147fdf486e68 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8082 +USB_PRODUCT = "iMX RT 1020 EVK" +USB_MANUFACTURER = "NXP" + +CHIP_VARIANT = MIMXRT1021DAG5A +CHIP_FAMILY = MIMXRT1021 +FLASH = IS25LP064A diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c new file mode 100644 index 0000000000000..ef8115a64fd71 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c @@ -0,0 +1,84 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_SD_B0_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_SD_B1_04) }, + + // // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + // // Ethernet + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_AD_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + + // // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + + // CAN + { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_SD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + + // + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/board.c b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c new file mode 100644 index 0000000000000..7e046d4940ae4 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +__attribute__((section(".boot_hdr.ivt"))) + +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h new file mode 100644 index 0000000000000..8eccd8aee4862 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "iMX RT 1060 EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_07) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_06) diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk new file mode 100644 index 0000000000000..e82d8ee743f71 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8084 +USB_PRODUCT = "iMX RT 1060 EVK" +USB_MANUFACTURER = "NXP" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 +FLASH = IS25WP064A diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c new file mode 100644 index 0000000000000..2d268952d1e79 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c @@ -0,0 +1,128 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + // i2c sensor is on I2C1_SCL/SDA + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + + // Camera Sensor Interface + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_VSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PWDN), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_HSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D9), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PIXCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D2), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D5), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D4), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + + // LCD Interface + { MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_ENABLE), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_LCD_VSYNC), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_LCD_HSYNC), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D0), MP_ROM_PTR(&pin_GPIO_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D1), MP_ROM_PTR(&pin_GPIO_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D2), MP_ROM_PTR(&pin_GPIO_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D3), MP_ROM_PTR(&pin_GPIO_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D4), MP_ROM_PTR(&pin_GPIO_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D5), MP_ROM_PTR(&pin_GPIO_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D6), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D7), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D8), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D9), MP_ROM_PTR(&pin_GPIO_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D10), MP_ROM_PTR(&pin_GPIO_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D11), MP_ROM_PTR(&pin_GPIO_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D12), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D13), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D14), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D15), MP_ROM_PTR(&pin_GPIO_B1_03) }, + + // Touch Interface + { MP_ROM_QSTR(MP_QSTR_LCD_TOUCH_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + + // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + + // SPDIF + { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + + // Ethernet + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_B1_11) }, + + // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + + // CAN + { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/teensy40/board.c b/ports/mimxrt10xx/boards/teensy40/board.c new file mode 100644 index 0000000000000..52dd498b3ff9c --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/teensy40/board.ld b/ports/mimxrt10xx/boards/teensy40/board.ld new file mode 100644 index 0000000000000..8f19810a35f71 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/board.ld @@ -0,0 +1 @@ +_ld_reserved_flash_size = 4K; diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c new file mode 100644 index 0000000000000..426deb884d449 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c @@ -0,0 +1,126 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_device" +#endif + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h new file mode 100644 index 0000000000000..718d9b9673912 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h @@ -0,0 +1,18 @@ +#define MICROPY_HW_BOARD_NAME "Teensy 4.0" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (2 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_B0_03) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B0_02) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B0_01) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B0_03) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B0_02) diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk new file mode 100644 index 0000000000000..7900d327ae0e6 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8086 +USB_PRODUCT = "Teensy 4.0" +USB_MANUFACTURER = "PJRC" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 +FLASH = W25Q16JV diff --git a/ports/mimxrt10xx/boards/teensy40/pins.c b/ports/mimxrt10xx/boards/teensy40/pins.c new file mode 100644 index 0000000000000..9066ce0d2096c --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/pins.c @@ -0,0 +1,87 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // With USB on left. Bottom edge. + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_EMC_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_EMC_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B0_01) }, + + // Top edge + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA0), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL0), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + + // Back side + { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO_EMC_32) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO_EMC_31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_GPIO_EMC_37) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_GPIO_EMC_36) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO_EMC_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c new file mode 100644 index 0000000000000..2cc2681b4410c --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/analogio/AnalogIn.h" + +#include + +#include "py/runtime.h" + +#include "fsl_adc.h" + +#define ADC_CHANNEL_GROUP 0 + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, + const mcu_pin_obj_t *pin) { + adc_config_t config = {0}; + + if (pin->adc == NULL) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + + ADC_GetDefaultConfig(&config); + + config.enableLongSample = true; + config.samplePeriodMode = kADC_SamplePeriod8or24Clocks; + + ADC_Init(pin->adc, &config); + ADC_SetHardwareAverageConfig(pin->adc, kADC_HardwareAverageCount32); + ADC_DoAutoCalibration(pin->adc); + + claim_pin(pin); + + self->pin = pin; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + adc_channel_config_t config = { 0 }; + config.channelNumber = self->pin->adc_channel; + + ADC_SetChannelConfig(self->pin->adc, ADC_CHANNEL_GROUP, &config); + + while (!ADC_GetChannelStatusFlags(self->pin->adc, ADC_CHANNEL_GROUP)) { + + } + + // Shift the value to be 16 bit + return ADC_GetChannelConversionValue(self->pin->adc, ADC_CHANNEL_GROUP) << 4; +} + +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 3.3f; +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h new file mode 100644 index 0000000000000..c252ab5535542 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} analogio_analogin_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c new file mode 100644 index 0000000000000..3d072627a48c3 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { + mp_raise_NotImplementedError(translate("AnalogOut functionality not supported")); +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return true; +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h new file mode 100644 index 0000000000000..133cce8fb5b30 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} analogio_analogout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/mimxrt10xx/common-hal/analogio/__init__.c b/ports/mimxrt10xx/common-hal/analogio/__init__.c new file mode 100644 index 0000000000000..eea58c77d6315 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/__init__.c @@ -0,0 +1 @@ +// No analogio module functions. diff --git a/ports/mimxrt10xx/common-hal/board/__init__.c b/ports/mimxrt10xx/common-hal/board/__init__.c new file mode 100644 index 0000000000000..e86251480eb93 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/board/__init__.c @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mphal.h" +#include "common-hal/microcontroller/Pin.h" + +// Pins aren't actually defined here. They are in the board specific directory +// such as boards/imxrt1010_evk/pins.c. diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.c b/ports/mimxrt10xx/common-hal/busio/I2C.c new file mode 100644 index 0000000000000..0bb7dcc6c697a --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.c @@ -0,0 +1,192 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/busio/I2C.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpi2c.h" + +#define I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (1+CLOCK_GetDiv(kCLOCK_Lpi2cDiv))) + + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 1); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(3) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(1) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + + const uint32_t sda_count = sizeof(mcu_i2c_sda_list) / sizeof(mcu_periph_obj_t); + const uint32_t scl_count = sizeof(mcu_i2c_scl_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sda_count; ++i) { + if (mcu_i2c_sda_list[i].pin != sda) + continue; + + for (uint32_t j = 0; j < scl_count; ++j) { + if (mcu_i2c_scl_list[j].pin != scl) + continue; + + if (mcu_i2c_scl_list[j].bank_idx != mcu_i2c_sda_list[i].bank_idx) + continue; + + self->sda_pin = &mcu_i2c_sda_list[i]; + self->scl_pin = &mcu_i2c_scl_list[j]; + + break; + } + } + + if(self->sda_pin == NULL || self->scl_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid I2C pin selection")); + } else { + self->i2c = mcu_i2c_banks[self->sda_pin->bank_idx - 1]; + } + + config_periph_pin(self->sda_pin); + config_periph_pin(self->scl_pin); + + lpi2c_master_config_t config = { 0 }; + LPI2C_MasterGetDefaultConfig(&config); + + config.baudRate_Hz = frequency; + + LPI2C_MasterInit(self->i2c, &config, I2C_CLOCK_FREQ); + +#if CIRCUITPY_REQUIRE_I2C_PULLUPS +// if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) { +// reset_pin_number(sda->number); +// reset_pin_number(scl->number); +// mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); +// } +#endif + + claim_pin(self->sda_pin->pin); + claim_pin(self->scl_pin->pin); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->sda_pin == NULL; +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + LPI2C_MasterDeinit(self->i2c); + +// reset_pin_number(self->sda_pin); +// reset_pin_number(self->scl_pin); + + self->sda_pin = NULL; + self->scl_pin = NULL; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + lpi2c_master_transfer_t xfer = { 0 }; + xfer.slaveAddress = addr; + + return LPI2C_MasterTransferBlocking(self->i2c, &xfer) == kStatus_Success; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, + const uint8_t *data, size_t len, bool transmit_stop_bit) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.flags = transmit_stop_bit ? kLPI2C_TransferDefaultFlag : kLPI2C_TransferNoStopFlag; + xfer.slaveAddress = addr; + xfer.data = (uint8_t*)data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, + uint8_t *data, size_t len) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.direction = kLPI2C_Read; + xfer.slaveAddress = addr; + xfer.data = data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { +// never_reset_sercom(self->i2c_desc.device.hw); +// +// never_reset_pin_number(self->scl_pin); +// never_reset_pin_number(self->sda_pin); +} diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.h b/ports/mimxrt10xx/common-hal/busio/I2C.h new file mode 100644 index 0000000000000..924e108116c0d --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPI2C_Type *i2c; + bool has_lock; + const mcu_periph_obj_t *scl_pin; + const mcu_periph_obj_t *sda_pin; +} busio_i2c_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/mimxrt10xx/common-hal/busio/OneWire.h b/ports/mimxrt10xx/common-hal/busio/OneWire.h new file mode 100644 index 0000000000000..bb4bc016a40ff --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c new file mode 100644 index 0000000000000..24a6dbff6d3ed --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -0,0 +1,324 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//TODO +#include "shared-bindings/busio/SPI.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpspi.h" + +#include + +//bool never_reset_sercoms[SERCOM_INST_NUM]; +// +//void never_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = true; +// break; +// } +// } +//} +// +//void allow_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = false; +// break; +// } +// } +//} +// +//void reset_sercoms(void) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (never_reset_sercoms[i]) { +// continue; +// } +// #ifdef MICROPY_HW_APA102_SERCOM +// if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { +// continue; +// } +// #endif +// // SWRST is same for all modes of SERCOMs. +// sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; +// } +//} + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv))) + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, + const mcu_pin_obj_t *miso) { + + // TODO: Allow none mosi or miso + + const uint32_t sck_count = sizeof(mcu_spi_sck_list) / sizeof(mcu_periph_obj_t); + const uint32_t miso_count = sizeof(mcu_spi_miso_list) / sizeof(mcu_periph_obj_t); + const uint32_t mosi_count = sizeof(mcu_spi_mosi_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sck_count; ++i) { + if (mcu_spi_sck_list[i].pin != clock) + continue; + + for (uint32_t j = 0; j < miso_count; ++j) { + if (mcu_spi_miso_list[j].pin != miso) + continue; + + if (mcu_spi_miso_list[j].bank_idx != mcu_spi_sck_list[i].bank_idx) + continue; + + for (uint32_t k = 0; k < mosi_count; ++k) { + if (mcu_spi_mosi_list[k].pin != mosi) + continue; + + if (mcu_spi_mosi_list[k].bank_idx != mcu_spi_miso_list[j].bank_idx) + continue; + + self->clock_pin = &mcu_spi_sck_list[i]; + self->miso_pin = &mcu_spi_miso_list[j]; + self->mosi_pin = &mcu_spi_mosi_list[k]; + + break; + } + } + } + + if(self->clock_pin == NULL || self->mosi_pin == NULL || self->miso_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid SPI pin selection")); + } else { + self->spi = mcu_spi_banks[self->clock_pin->bank_idx - 1]; + } + + config_periph_pin(self->mosi_pin); + config_periph_pin(self->miso_pin); + config_periph_pin(self->clock_pin); + + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + // Always start at 250khz which is what SD cards need. They are sensitive to + // SPI bus noise before they are put into SPI mode. + config.baudRate = 250000; + + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, config.baudRate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + claim_pin(self->clock_pin->pin); + +// if (mosi_none) { +// self->MOSI_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(mosi->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_pull_mode(mosi->number, GPIO_PULL_OFF); +// gpio_set_pin_function(mosi->number, mosi_pinmux); +// self->MOSI_pin = mosi->number; + claim_pin(self->mosi_pin->pin); +// } + +// if (miso_none) { +// self->MISO_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(miso->number, GPIO_DIRECTION_IN); +// gpio_set_pin_pull_mode(miso->number, GPIO_PULL_OFF); +// gpio_set_pin_function(miso->number, miso_pinmux); +// self->MISO_pin = miso->number; + claim_pin(self->miso_pin->pin); +// } +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { +// never_reset_sercom(self->spi_desc.dev.prvt); + +// never_reset_pin_number(self->clock_pin); +// never_reset_pin_number(self->MOSI_pin); +// never_reset_pin_number(self->MISO_pin); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->clock_pin == NULL; +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + +// allow_reset_sercom(self->spi_desc.dev.prvt); + +// spi_m_sync_disable(&self->spi_desc); +// spi_m_sync_deinit(&self->spi_desc); +// reset_pin_number(self->clock_pin); +// reset_pin_number(self->MOSI_pin); +// reset_pin_number(self->MISO_pin); + self->clock_pin = NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, baudrate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + if ((polarity == common_hal_busio_spi_get_polarity(self)) && + (phase == common_hal_busio_spi_get_phase(self)) && + (bits == ((self->spi->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT)) + 1) { + return true; + } + + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + config.baudRate = baudrate; + config.cpol = polarity; + config.cpha = phase; + config.bitsPerFrame = bits; + + LPSPI_Deinit(self->spi); + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, + const uint8_t *data, size_t len) { + if (len == 0) { + return true; + } + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = (uint8_t*)data; + xfer.dataSize = len; + xfer.configFlags = kLPSPI_MasterPcs0; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, + uint8_t *data, size_t len, uint8_t write_value) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, write_value); + + lpspi_transfer_t xfer = { 0 }; + xfer.rxData = data; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, 0xFF); + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = data_out; + xfer.rxData = data_in; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { + return self->baudrate; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPHA_MASK) == LPSPI_TCR_CPHA_MASK); +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPOL_MASK) == LPSPI_TCR_CPOL_MASK); +} diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.h b/ports/mimxrt10xx/common-hal/busio/SPI.h new file mode 100644 index 0000000000000..0895e1ddbcd8e --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPSPI_Type *spi; + bool has_lock; + uint32_t baudrate; + const mcu_periph_obj_t *clock_pin; + const mcu_periph_obj_t *mosi_pin; + const mcu_periph_obj_t *miso_pin; +} busio_spi_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c new file mode 100644 index 0000000000000..4633507d8b0ac --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -0,0 +1,326 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/busio/UART.h" + +#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "supervisor/shared/tick.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +// TODO + +#define UART_CLOCK_FREQ (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUE(1) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(1) + | IOMUXC_SW_PAD_CTL_PAD_DSE(6) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *user_data) +{ + busio_uart_obj_t *self = (busio_uart_obj_t*)user_data; + + if (status == kStatus_LPUART_RxIdle) { + self->rx_ongoing = false; + } +} + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + + // TODO: Allow none rx or tx + + bool have_tx = tx != NULL; + bool have_rx = rx != NULL; + if (!have_tx && !have_rx) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + self->baudrate = baudrate; + self->character_bits = bits; + self->timeout_ms = timeout * 1000; + + const uint32_t rx_count = sizeof(mcu_uart_rx_list) / sizeof(mcu_periph_obj_t); + const uint32_t tx_count = sizeof(mcu_uart_tx_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < rx_count; ++i) { + if (mcu_uart_rx_list[i].pin != rx) + continue; + + for (uint32_t j = 0; j < tx_count; ++j) { + if (mcu_uart_tx_list[j].pin != tx) + continue; + + if (mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) + continue; + + self->rx_pin = &mcu_uart_rx_list[i]; + self->tx_pin = &mcu_uart_tx_list[j]; + + break; + } + } + + if(self->rx_pin == NULL || self->tx_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid UART pin selection")); + } + + // Filter for sane settings for RS485 + if (rs485_dir != NULL) { + if ((rts != NULL) || (cts != NULL)) { + mp_raise_ValueError(translate("Cannot specify RTS or CTS in RS485 mode")); + } + // For IMXRT the RTS pin is used for RS485 direction + rts = rs485_dir; + } + else { + if (rs485_invert) { + mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode")); + } + } + + // Now check for RTS/CTS (or overloaded RS485 direction) pin(s) + const uint32_t rts_count = sizeof(mcu_uart_rts_list) / sizeof(mcu_periph_obj_t); + const uint32_t cts_count = sizeof(mcu_uart_cts_list) / sizeof(mcu_periph_obj_t); + + if (rts != NULL) { + for (uint32_t i=0; i < rts_count; ++i) { + if (mcu_uart_rts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_rts_list[i].pin == rts) { + self->rts_pin = &mcu_uart_rts_list[i]; + break; + } + } + } + if (self->rts_pin == NULL) + mp_raise_ValueError(translate("Selected RTS pin not valid")); + } + + if (cts != NULL) { + for (uint32_t i=0; i < cts_count; ++i) { + if (mcu_uart_cts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_cts_list[i].pin == cts) { + self->cts_pin = &mcu_uart_cts_list[i]; + break; + } + } + } + if (self->cts_pin == NULL) + mp_raise_ValueError(translate("Selected CTS pin not valid")); + } + + self->uart = mcu_uart_banks[self->tx_pin->bank_idx - 1]; + + config_periph_pin(self->rx_pin); + config_periph_pin(self->tx_pin); + if (self->rts_pin) + config_periph_pin(self->rts_pin); + if (self->cts_pin) + config_periph_pin(self->cts_pin); + + lpuart_config_t config = { 0 }; + LPUART_GetDefaultConfig(&config); + + config.dataBitsCount = self->character_bits == 8 ? kLPUART_EightDataBits : kLPUART_SevenDataBits; + config.baudRate_Bps = self->baudrate; + config.enableTx = self->tx_pin != NULL; + config.enableRx = self->rx_pin != NULL; + config.enableRxRTS = self->rts_pin != NULL; + config.enableTxCTS = self->cts_pin != NULL; + if (self->rts_pin != NULL) + claim_pin(self->rts_pin->pin); + if (self->cts_pin != NULL) + claim_pin(self->cts_pin->pin); + + LPUART_Init(self->uart, &config, UART_CLOCK_FREQ); + + // Before we init, setup RS485 direction pin + // ..unfortunately this isn't done by the driver library + uint32_t modir = (self->uart->MODIR) & ~(LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK); + if (rs485_dir != NULL) { + modir |= LPUART_MODIR_TXRTSE_MASK; + if (rs485_invert) + modir |= LPUART_MODIR_TXRTSPOL_MASK; + } + self->uart->MODIR = modir; + + if (self->tx_pin != NULL) + claim_pin(self->tx_pin->pin); + + if (self->rx_pin != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + + if (!self->rbuf.buf) { + LPUART_Deinit(self->uart); + mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer")); + } + + LPUART_TransferCreateHandle(self->uart, &self->handle, LPUART_UserCallback, self); + LPUART_TransferStartRingBuffer(self->uart, &self->handle, self->rbuf.buf, self->rbuf.size); + + claim_pin(self->rx_pin->pin); + } +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return self->rx_pin == NULL && self->tx_pin == NULL; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + + LPUART_Deinit(self->uart); + + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; + +// reset_pin_number(self->rx_pin); +// reset_pin_number(self->tx_pin); + + self->rx_pin = NULL; + self->tx_pin = NULL; +} + +// Read characters. +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (self->rx_pin == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + + if (len == 0) { + // Nothing to read. + return 0; + } + + lpuart_transfer_t xfer = { + .data = data, + .dataSize = len, + }; + + self->rx_ongoing = true; + LPUART_TransferReceiveNonBlocking(self->uart, &self->handle, &xfer, NULL); + + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout + while (self->rx_ongoing && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + break; + } + } + + // if we timed out, stop the transfer + if (self->rx_ongoing) { + LPUART_TransferAbortReceive(self->uart, &self->handle); + } + + // No data left, we got it all + if (self->handle.rxData == NULL) { + return len; + } + + // The only place we can reliably tell how many bytes have been received is from the current + // wp in the handle (because the abort nukes rxDataSize, and reading it before abort is a race.) + return self->handle.rxData - data; +} + +// Write characters. +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx_pin == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + + LPUART_WriteBlocking(self->uart, data, len); + + return len; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + if (LPUART_SetBaudRate(self->uart, baudrate, UART_CLOCK_FREQ) == kStatus_Success) { + self->baudrate = baudrate; + } +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + return LPUART_TransferGetRxRingBufferLength(self->uart, &self->handle); +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + self->handle.rxRingBufferHead = self->handle.rxRingBufferTail; +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + if (self->tx_pin == NULL) { + return false; + } + + return LPUART_GetStatusFlags(self->uart) & kLPUART_TxDataRegEmptyFlag; +} diff --git a/ports/mimxrt10xx/common-hal/busio/UART.h b/ports/mimxrt10xx/common-hal/busio/UART.h new file mode 100644 index 0000000000000..9e768db3c05fc --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.h @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/ringbuf.h" +#include "py/obj.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +typedef struct { + mp_obj_base_t base; + LPUART_Type *uart; + lpuart_handle_t handle; + ringbuf_t rbuf; + bool rx_ongoing; + uint32_t baudrate; + uint8_t character_bits; + uint32_t timeout_ms; + const mcu_periph_obj_t *rx_pin; + const mcu_periph_obj_t *tx_pin; + const mcu_periph_obj_t *cts_pin; + const mcu_periph_obj_t *rts_pin; +} busio_uart_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H diff --git a/ports/mimxrt10xx/common-hal/busio/__init__.c b/ports/mimxrt10xx/common-hal/busio/__init__.c new file mode 100644 index 0000000000000..41761b6743aea --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/__init__.c @@ -0,0 +1 @@ +// No busio module functions. diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000000..603515764ff11 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,170 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/mphal.h" + +#include "fsl_gpio.h" + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/translate.h" + +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 5U + +void pin_config(const mcu_pin_obj_t *pin, bool open_drain, digitalio_pull_t pull) +{ + IOMUXC_SetPinConfig(0, 0, 0, 0, pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUS((pull == PULL_UP) ? 2 : 0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(pull != PULL_NONE) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(open_drain) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(1) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { + claim_pin(pin); + self->pin = pin; + self->output = false; + self->open_drain = false; + self->pull = PULL_NONE; + + // GPIO is always IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 until proven otherwise + IOMUXC_SetPinMux(pin->mux_reg, IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5, 0, 0, 0, 0); + + pin_config(pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { + return self->pin == NULL; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +void common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->output = false; + + // This also sets direction to input. + common_hal_digitalio_digitalinout_set_pull(self, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t* self, bool value, + digitalio_drive_mode_t drive_mode) { + self->output = true; + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + self->pull = PULL_NONE; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalOutput, value, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t* self) { + return self->output ? DIRECTION_OUTPUT : DIRECTION_INPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t* self, bool value) { + GPIO_PinWrite(self->pin->gpio, self->pin->number, value); +} + +bool common_hal_digitalio_digitalinout_get_value( + digitalio_digitalinout_obj_t* self) { + return GPIO_PinRead(self->pin->gpio, self->pin->number); +} + +void common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t* self, + digitalio_drive_mode_t drive_mode) { + bool value = common_hal_digitalio_digitalinout_get_value(self); + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + + pin_config(self->pin, self->open_drain, self->pull); + + // True is implemented differently between modes so reset the value to make + // sure it's correct for the new mode. + if (value) { + common_hal_digitalio_digitalinout_set_value(self, value); + } +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t* self) { + if (self->open_drain) { + return DRIVE_MODE_OPEN_DRAIN; + } else { + return DRIVE_MODE_PUSH_PULL; + } +} + +void common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->pull = pull; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t* self) { + if (self->output) { + mp_raise_AttributeError(translate("Cannot get pull while in output mode")); + return PULL_NONE; + } else { + return self->pull; + } +} diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 0000000000000..4c19de20b6255 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/Pull.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + bool output; + bool open_drain; + digitalio_pull_t pull; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/mimxrt10xx/common-hal/digitalio/__init__.c b/ports/mimxrt10xx/common-hal/digitalio/__init__.c new file mode 100644 index 0000000000000..20fad459593ac --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/__init__.c @@ -0,0 +1 @@ +// No digitalio module functions. diff --git a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c new file mode 100644 index 0000000000000..87fc511af1dae --- /dev/null +++ b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c @@ -0,0 +1,68 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "tick.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + mp_raise_NotImplementedError(translate("ParallelBus not yet supported")); +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + + return false; +} + +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + +} diff --git a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h new file mode 100644 index 0000000000000..845e44df06034 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000000..21e61d29d44ed --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -0,0 +1,230 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/rgb_led_status.h" + +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif +#ifdef SPEAKER_ENABLE_PIN +bool speaker_enable_in_use; +#endif + +//TODO + +#define PORT_COUNT (IOMUXC_SW_PAD_CTL_PAD_COUNT / 32 + 1) + +//STATIC uint32_t never_reset_pins[PORT_COUNT]; + +void reset_all_pins(void) { +// uint32_t pin_mask[PORT_COUNT] = PORT_OUT_IMPLEMENTED; + +// // Do not full reset USB lines. +// pin_mask[0] &= ~(PORT_PA24 | PORT_PA25); + +// // Do not reset SWD when a debugger is present. +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// pin_mask[0] &= ~(PORT_PA30 | PORT_PA31); +// } + +// for (uint32_t i = 0; i < PORT_COUNT; i++) { +// pin_mask[i] &= ~never_reset_pins[i]; +// } + +// gpio_set_port_direction(GPIO_PORTA, pin_mask[0] & ~MICROPY_PORT_A, GPIO_DIRECTION_OFF); +// gpio_set_port_direction(GPIO_PORTB, pin_mask[1] & ~MICROPY_PORT_B, GPIO_DIRECTION_OFF); +// #if PORT_BITS > 64 +// gpio_set_port_direction(GPIO_PORTC, pin_mask[2] & ~MICROPY_PORT_C, GPIO_DIRECTION_OFF); +// #endif +// #if PORT_BITS > 96 +// gpio_set_port_direction(GPIO_PORTD, pin_mask[3] & ~MICROPY_PORT_D, GPIO_DIRECTION_OFF); +// #endif +// +// // Configure SWD. SWDIO will be automatically switched on PA31 when a signal is input on +// // SWCLK. +// #ifdef SAMD51 +// gpio_set_pin_function(PIN_PA30, MUX_PA30H_CM4_SWCLK); +// #endif +// #ifdef SAMD21 +// gpio_set_pin_function(PIN_PA30, GPIO_PIN_FUNCTION_G); +// gpio_set_pin_function(PIN_PA31, GPIO_PIN_FUNCTION_G); +// #endif +// + #ifdef MICROPY_HW_NEOPIXEL + neopixel_in_use = false; + #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif + + // After configuring SWD because it may be shared. + #ifdef SPEAKER_ENABLE_PIN + speaker_enable_in_use = false; +// gpio_set_pin_function(SPEAKER_ENABLE_PIN->number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + #endif +} + +void never_reset_pin_number(uint8_t pin_number) { +// never_reset_pins[GPIO_PORT(pin_number)] |= 1 << GPIO_PIN(pin_number); +} + +void reset_pin_number(uint8_t pin_number) { + // never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); + + if (pin_number >= IOMUXC_SW_PAD_CTL_PAD_COUNT) { + return; + } + + #ifdef MICROPY_HW_NEOPIXEL + if (pin_number == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { +// apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; +// apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; + if (!apa102_sck_in_use && !apa102_mosi_in_use) { +// rgb_led_status_init(); + } + return; + } + #endif + +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif +// gpio_set_pin_function(pin_number, SWD_MUX); +// } else { +// gpio_set_pin_direction(pin_number, GPIO_DIRECTION_OFF); +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// } +// + #ifdef SPEAKER_ENABLE_PIN + if (pin_number == SPEAKER_ENABLE_PIN->number) { + speaker_enable_in_use = false; +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + } + #endif +} + +void claim_pin(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + neopixel_in_use = true; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) { + apa102_sck_in_use = true; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + speaker_enable_in_use = true; + } + #endif +} + +bool pin_number_is_free(uint8_t pin_number) { +// PortGroup *const port = &PORT->Group[(enum gpio_port)GPIO_PORT(pin_number)]; +// uint8_t pin_index = GPIO_PIN(pin_number); +// volatile PORT_PINCFG_Type *state = &port->PINCFG[pin_index]; +// volatile PORT_PMUX_Type *pmux = &port->PMUX[pin_index / 2]; +// +// if (pin_number == PIN_PA30 || pin_number == PIN_PA31) { +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// return false; +// } +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif) { +// return state->bit.PMUXEN == 1 && ((pmux->reg >> (4 * pin_index % 2)) & 0xf) == SWD_MUX; +// } +// } +// +// return state->bit.PMUXEN == 0 && state->bit.INEN == 0 && +// state->bit.PULLEN == 0 && (port->DIR.reg & (1 << pin_index)) == 0; + return true; +} + +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + return !neopixel_in_use; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) { + return !apa102_sck_in_use; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + return !speaker_enable_in_use; + } + #endif + + return pin_number_is_free(pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { +// reset_pin_number(pin->number); +} + +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) { +// never_reset_pin_number(pin->port, pin->number); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.h b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h new file mode 100644 index 0000000000000..74a1f7cbbd4c1 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include + +#include "pins.h" + +#ifdef MICROPY_HW_NEOPIXEL +extern bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +extern bool apa102_sck_in_use; +extern bool apa102_mosi_in_use; +#endif + +void reset_all_pins(void); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); +void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_number); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c new file mode 100644 index 0000000000000..0c8131ef40040 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -0,0 +1,70 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "common-hal/microcontroller/Processor.h" + +#include "fsl_tempmon.h" +#include "fsl_ocotp.h" +#include "clocks.h" + +float common_hal_mcu_processor_get_temperature(void) { + tempmon_config_t config; + TEMPMON_GetDefaultConfig(&config); + + TEMPMON_Init(TEMPMON, &config); + TEMPMON_StartMeasure(TEMPMON); + + const float temp = TEMPMON_GetCurrentTemperature(TEMPMON); + TEMPMON_Deinit(TEMPMON); + + return temp; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return SystemCoreClock; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + OCOTP_Init(OCOTP, CLOCK_GetFreq(kCLOCK_IpgClk)); + + // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info) + // into 8 bit wide destination, avoiding punning. + for (int i = 0; i < 4; ++i) { + uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + for (int j = 0; j < 4; j++) { + raw_id[i*4+j] = wr & 0xff; + wr >>= 8; + } + } + OCOTP_Deinit(OCOTP); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.h b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h new file mode 100644 index 0000000000000..43b0ec878c70b --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 16 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000000..a9f4c740fe350 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c @@ -0,0 +1,286 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +//TODO +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "fsl_device_registers.h" + +#include "reset.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/translate.h" + +void common_hal_mcu_delay_us(uint32_t delay) { + mp_hal_delay_us(delay); +} + +volatile uint32_t nesting_count = 0; +void common_hal_mcu_disable_interrupts(void) { + __disable_irq(); + __DMB(); + nesting_count++; +} + +void HardFault_Handler(void); +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + HardFault_Handler(); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if (runmode == RUNMODE_BOOTLOADER) { + if (!bootloader_available()) { + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); + } + // Pretend to be the first of the two reset presses needed to enter the + // bootloader. That way one reset will end in the bootloader. + SNVS->LPGPR[0] = DBL_TAP_MAGIC; + } else { + // Set up the default. + SNVS->LPGPR[0] = DBL_TAP_MAGIC_QUICK_BOOT; + } + if (runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } +} + +void common_hal_mcu_reset(void) { + NVIC_SystemReset(); +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +// NVM is only available on Express boards for now. +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, + .start_address = (uint8_t*) (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) +}; +#endif + +// This maps MCU pin names to pin objects. +STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { +#ifdef MIMXRT1011_SERIES + { MP_ROM_QSTR(MP_QSTR_GPIO_00), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_01), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_02), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_03), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_04), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_05), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_06), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_07), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_08), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_09), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_10), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_11), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_12), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_13), MP_ROM_PTR(&pin_GPIO_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_00), MP_ROM_PTR(&pin_GPIO_SD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_01), MP_ROM_PTR(&pin_GPIO_SD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_02), MP_ROM_PTR(&pin_GPIO_SD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_03), MP_ROM_PTR(&pin_GPIO_SD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_04), MP_ROM_PTR(&pin_GPIO_SD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_05), MP_ROM_PTR(&pin_GPIO_SD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_06), MP_ROM_PTR(&pin_GPIO_SD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_07), MP_ROM_PTR(&pin_GPIO_SD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_08), MP_ROM_PTR(&pin_GPIO_SD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_09), MP_ROM_PTR(&pin_GPIO_SD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_10), MP_ROM_PTR(&pin_GPIO_SD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_11), MP_ROM_PTR(&pin_GPIO_SD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_12), MP_ROM_PTR(&pin_GPIO_SD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_13), MP_ROM_PTR(&pin_GPIO_SD_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_00), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_01), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_02), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_03), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_04), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_05), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_06), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_07), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_08), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_09), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_10), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_11), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_12), MP_ROM_PTR(&pin_GPIO_AD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_13), MP_ROM_PTR(&pin_GPIO_AD_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_14), MP_ROM_PTR(&pin_GPIO_AD_14) }, +#else + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_00), MP_ROM_PTR(&pin_GPIO_EMC_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_01), MP_ROM_PTR(&pin_GPIO_EMC_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_02), MP_ROM_PTR(&pin_GPIO_EMC_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_03), MP_ROM_PTR(&pin_GPIO_EMC_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_04), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_05), MP_ROM_PTR(&pin_GPIO_EMC_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_06), MP_ROM_PTR(&pin_GPIO_EMC_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_07), MP_ROM_PTR(&pin_GPIO_EMC_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_08), MP_ROM_PTR(&pin_GPIO_EMC_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_09), MP_ROM_PTR(&pin_GPIO_EMC_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_10), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_11), MP_ROM_PTR(&pin_GPIO_EMC_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_12), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_13), MP_ROM_PTR(&pin_GPIO_EMC_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_14), MP_ROM_PTR(&pin_GPIO_EMC_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_15), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_16), MP_ROM_PTR(&pin_GPIO_EMC_16) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_17), MP_ROM_PTR(&pin_GPIO_EMC_17) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_18), MP_ROM_PTR(&pin_GPIO_EMC_18) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_19), MP_ROM_PTR(&pin_GPIO_EMC_19) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_20), MP_ROM_PTR(&pin_GPIO_EMC_20) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_21), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_22), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_23), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_24), MP_ROM_PTR(&pin_GPIO_EMC_24) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_25), MP_ROM_PTR(&pin_GPIO_EMC_25) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_26), MP_ROM_PTR(&pin_GPIO_EMC_26) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_27), MP_ROM_PTR(&pin_GPIO_EMC_27) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_28), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_29), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_30), MP_ROM_PTR(&pin_GPIO_EMC_30) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_31), MP_ROM_PTR(&pin_GPIO_EMC_31) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_32), MP_ROM_PTR(&pin_GPIO_EMC_32) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_33), MP_ROM_PTR(&pin_GPIO_EMC_33) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_34), MP_ROM_PTR(&pin_GPIO_EMC_34) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_35), MP_ROM_PTR(&pin_GPIO_EMC_35) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_36), MP_ROM_PTR(&pin_GPIO_EMC_36) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_37), MP_ROM_PTR(&pin_GPIO_EMC_37) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_38), MP_ROM_PTR(&pin_GPIO_EMC_38) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_39), MP_ROM_PTR(&pin_GPIO_EMC_39) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_40), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_41), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_00), MP_ROM_PTR(&pin_GPIO_AD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_01), MP_ROM_PTR(&pin_GPIO_AD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_02), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_03), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_04), MP_ROM_PTR(&pin_GPIO_AD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_05), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_06), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_07), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_08), MP_ROM_PTR(&pin_GPIO_AD_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_09), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_10), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_11), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_12), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_13), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_14), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_15), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_00), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_01), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_02), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_03), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_04), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_05), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_06), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_07), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_08), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_09), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_10), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_11), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_12), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_13), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_14), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_15), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + #ifdef MIMXRT1062_SERIES + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_00), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_01), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_02), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_03), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_04), MP_ROM_PTR(&pin_GPIO_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_05), MP_ROM_PTR(&pin_GPIO_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_06), MP_ROM_PTR(&pin_GPIO_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_07), MP_ROM_PTR(&pin_GPIO_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_08), MP_ROM_PTR(&pin_GPIO_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_09), MP_ROM_PTR(&pin_GPIO_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_10), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_11), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_12), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_13), MP_ROM_PTR(&pin_GPIO_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_14), MP_ROM_PTR(&pin_GPIO_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_15), MP_ROM_PTR(&pin_GPIO_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_00), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_01), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_02), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_03), MP_ROM_PTR(&pin_GPIO_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_04), MP_ROM_PTR(&pin_GPIO_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_05), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_06), MP_ROM_PTR(&pin_GPIO_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_07), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_08), MP_ROM_PTR(&pin_GPIO_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_09), MP_ROM_PTR(&pin_GPIO_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_10), MP_ROM_PTR(&pin_GPIO_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_11), MP_ROM_PTR(&pin_GPIO_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_12), MP_ROM_PTR(&pin_GPIO_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_13), MP_ROM_PTR(&pin_GPIO_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_14), MP_ROM_PTR(&pin_GPIO_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_15), MP_ROM_PTR(&pin_GPIO_B1_15) }, + #endif + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_00), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_01), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_02), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_03), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_04), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_05), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_00), MP_ROM_PTR(&pin_GPIO_SD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_01), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_02), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_03), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_04), MP_ROM_PTR(&pin_GPIO_SD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_05), MP_ROM_PTR(&pin_GPIO_SD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_06), MP_ROM_PTR(&pin_GPIO_SD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_07), MP_ROM_PTR(&pin_GPIO_SD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_08), MP_ROM_PTR(&pin_GPIO_SD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_09), MP_ROM_PTR(&pin_GPIO_SD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_10), MP_ROM_PTR(&pin_GPIO_SD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_11), MP_ROM_PTR(&pin_GPIO_SD_B1_11) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000000..3e1d343ec851e --- /dev/null +++ b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c @@ -0,0 +1,101 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#include "tick.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/microcontroller/Pin.h" + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +//sysclock divisors +#define MAGIC_800_INT 900000 // ~1.11 us -> 1.2 field +#define MAGIC_800_T0H 2800000 // ~0.36 us -> 0.44 field +#define MAGIC_800_T1H 1350000 // ~0.74 us -> 0.84 field + +#pragma GCC push_options +#pragma GCC optimize ("Os") + +void PLACE_IN_ITCM(common_hal_neopixel_write)(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, + uint32_t numBytes) { + uint8_t *p = pixels, *end = p + numBytes, pix = *p++, mask = 0x80; + uint32_t start = 0; + uint32_t cyc = 0; + + //assumes 800_000Hz frequency + //Theoretical values here are 800_000 -> 1.25us, 2500000->0.4us, 1250000->0.8us + //TODO: try to get dynamic weighting working again + const uint32_t sys_freq = SystemCoreClock; + const uint32_t interval = (sys_freq / MAGIC_800_INT); + const uint32_t t0 = (sys_freq / MAGIC_800_T0H); + const uint32_t t1 = (sys_freq / MAGIC_800_T1H); + + // This must be called while interrupts are on in case we're waiting for a + // future ms tick. + wait_until(next_start_tick_ms, next_start_tick_us); + + GPIO_Type *gpio = digitalinout->pin->gpio; + const uint32_t pin = digitalinout->pin->number; + + __disable_irq(); + // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + DWT->CYCCNT = 0; + + for(;;) { + cyc = (pix & mask) ? t1 : t0; + start = DWT->CYCCNT; + gpio->DR |= (1U << pin); + while((DWT->CYCCNT - start) < cyc); + gpio->DR &= ~(1U << pin); + while((DWT->CYCCNT - start) < interval); + if(!(mask >>= 1)) { + if(p >= end) break; + pix = *p++; + mask = 0x80; + } + } + + // Enable interrupts again + __enable_irq(); + + // Update the next start. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } +} + +#pragma GCC pop_options diff --git a/ports/mimxrt10xx/common-hal/os/__init__.c b/ports/mimxrt10xx/common-hal/os/__init__.c new file mode 100644 index 0000000000000..e84beb526c741 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/os/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "genhdr/mpversion.h" +#include "py/mpconfig.h" +#include "py/objstr.h" +#include "py/objtuple.h" +#include "py/qstr.h" + +#include "fsl_trng.h" + +STATIC const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { + trng_config_t trngConfig; + + TRNG_GetDefaultConfig(&trngConfig); + trngConfig.sampleMode = kTRNG_SampleModeVonNeumann; + + TRNG_Init(TRNG, &trngConfig); + TRNG_GetRandomData(TRNG, buffer, length); + TRNG_Deinit(TRNG); + + return true; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000000..c75b75316aef4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c @@ -0,0 +1,551 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "fsl_pwm.h" + +#include "supervisor/shared/translate.h" +#include "periph.h" + +#include + +// TODO +//#include "samd/pins.h" + +//#undef ENABLE +// +//# define _TCC_SIZE(unused, n) TCC ## n ## _SIZE, +//# define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) } +// +//static uint32_t tcc_periods[TCC_INST_NUM]; +//static uint32_t tc_periods[TC_INST_NUM]; +// +//uint32_t target_tcc_frequencies[TCC_INST_NUM]; +//uint8_t tcc_refcount[TCC_INST_NUM]; +// +//// This bitmask keeps track of which channels of a TCC are currently claimed. +//#ifdef SAMD21 +//uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially. +//#endif +//#ifdef SAMD51 +//uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially. +//#endif +// +//static uint8_t never_reset_tc_or_tcc[TC_INST_NUM + TCC_INST_NUM]; + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] += 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] += 1; +// } +// +// never_reset_pin_number(self->pin->number); +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] -= 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] -= 1; +// } +} + +void pwmout_reset(void) { +// // Reset all timers +// for (int i = 0; i < TCC_INST_NUM; i++) { +// target_tcc_frequencies[i] = 0; +// tcc_refcount[i] = 0; +// } +// Tcc *tccs[TCC_INST_NUM] = TCC_INSTS; +// for (int i = 0; i < TCC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[TC_INST_NUM + i] > 0) { +// continue; +// } +// // Disable the module before resetting it. +// if (tccs[i]->CTRLA.bit.ENABLE == 1) { +// tccs[i]->CTRLA.bit.ENABLE = 0; +// while (tccs[i]->SYNCBUSY.bit.ENABLE == 1) { +// } +// } +// uint8_t mask = 0xff; +// for (uint8_t j = 0; j < tcc_cc_num[i]; j++) { +// mask <<= 1; +// } +// tcc_channels[i] = mask; +// tccs[i]->CTRLA.bit.SWRST = 1; +// while (tccs[i]->CTRLA.bit.SWRST == 1) { +// } +// } +// Tc *tcs[TC_INST_NUM] = TC_INSTS; +// for (int i = 0; i < TC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[i] > 0) { +// continue; +// } +// tcs[i]->COUNT16.CTRLA.bit.SWRST = 1; +// while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// } +} + +//static uint8_t tcc_channel(const pin_timer_t* t) { +// // For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses +// // SAMD21-style modulo mapping. +// return t->wave_output % tcc_cc_num[t->index]; +//} + +//bool channel_ok(const pin_timer_t* t) { +// uint8_t channel_bit = 1 << tcc_channel(t); +// return (!t->is_tc && ((tcc_channels[t->index] & channel_bit) == 0)) || +// t->is_tc; +//} + +#define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk) + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + self->pin = pin; + self->variable_frequency = variable_frequency; + + const uint32_t pwm_count = sizeof(mcu_pwm_list) / sizeof(mcu_pwm_obj_t); + + for (uint32_t i = 0; i < pwm_count; ++i) { + if (mcu_pwm_list[i].pin != pin) + continue; + + printf("pwm: 0x%p, sum %d, chan %d, mux %d\r\n", mcu_pwm_list[i].pwm, mcu_pwm_list[i].submodule, mcu_pwm_list[i].channel, mcu_pwm_list[i].mux_mode); + + self->pwm = &mcu_pwm_list[i]; + + break; + } + + if (self->pwm == NULL) { + return PWMOUT_INVALID_PIN; + } + + CLOCK_SetDiv(kCLOCK_AhbDiv, 0x2); /* Set AHB PODF to 2, divide by 3 */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */ + +//TODO re-enable +// IOMUXC_SetPinMux( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 is configured as FLEXPWM1_PWM0_A */ +// 0U); /* Software Input On Field: Input Path is determined by functionality */ +// +// IOMUXC_SetPinConfig( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 PAD functional properties : */ +// 0x10A0U); /* Slew Rate Field: Slow Slew Rate +// Drive Strength Field: R0/4 +// Speed Field: fast(150MHz) +// Open Drain Enable Field: Open Drain Disabled +// Pull / Keep Enable Field: Pull/Keeper Enabled +// Pull / Keep Select Field: Keeper +// Pull Up / Down Config. Field: 100K Ohm Pull Down +// Hyst. Enable Field: Hysteresis Disabled */ + + pwm_config_t pwmConfig; + + /* + * pwmConfig.enableDebugMode = false; + * pwmConfig.enableWait = false; + * pwmConfig.reloadSelect = kPWM_LocalReload; + * pwmConfig.faultFilterCount = 0; + * pwmConfig.faultFilterPeriod = 0; + * pwmConfig.clockSource = kPWM_BusClock; + * pwmConfig.prescale = kPWM_Prescale_Divide_1; + * pwmConfig.initializationControl = kPWM_Initialize_LocalSync; + * pwmConfig.forceTrigger = kPWM_Force_Local; + * pwmConfig.reloadFrequency = kPWM_LoadEveryOportunity; + * pwmConfig.reloadLogic = kPWM_ReloadImmediate; + * pwmConfig.pairOperation = kPWM_Independent; + */ + PWM_GetDefaultConfig(&pwmConfig); + + //pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle; + pwmConfig.enableDebugMode = true; + + if (PWM_Init(PWM1, self->pwm->submodule, &pwmConfig) == kStatus_Fail) { + printf("PWM initialization failed\r\n"); + return PWMOUT_INVALID_PIN; + } + + pwm_signal_param_t pwmSignal; + + /* Set deadtime count, we set this to about 650ns */ + uint16_t deadTimeVal = ((uint64_t)PWM_SRC_CLK_FREQ * 650) / 1000000000; + + pwmSignal.pwmChannel = self->pwm->channel; + pwmSignal.level = kPWM_HighTrue; + pwmSignal.dutyCyclePercent = frequency / 2; /* 1 percent dutycycle */ + pwmSignal.deadtimeValue = deadTimeVal; + + PWM_SetupPwm(PWM1, self->pwm->submodule, &pwmSignal, 1, kPWM_SignedCenterAligned, frequency, PWM_SRC_CLK_FREQ); + + PWM_SetPwmLdok(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2, true); + + PWM_StartTimer(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2); + +// if (frequency == 0 || frequency > 6000000) { +// return PWMOUT_INVALID_FREQUENCY; +// } + +// // Figure out which timer we are using. +// // First see if a tcc is already going with the frequency we want and our +// // channel is unused. tc's don't have enough channels to share. +// const pin_timer_t* timer = NULL; +// uint8_t mux_position = 0; +// if (!variable_frequency) { +// for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) { +// if (target_tcc_frequencies[i] != frequency) { +// continue; +// } +// for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) { +// const pin_timer_t* t = &pin->timer[j]; +// if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) { +// continue; +// } +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { +// timer = t; +// mux_position = j; +// // Claim channel. +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// +// } +// } +// } +// } +// +// // No existing timer has been found, so find a new one to use and set it up. +// if (timer == NULL) { +// // By default, with fixed frequency we want to share a TCC because its likely we'll have +// // other outputs at the same frequency. If the frequency is variable then we'll only have +// // one output so we start with the TCs to see if they work. +// int8_t direction = -1; +// uint8_t start = NUM_TIMERS_PER_PIN - 1; +// bool found = false; +// if (variable_frequency) { +// direction = 1; +// start = 0; +// } +// for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { +// const pin_timer_t* t = &pin->timer[i]; +// if ((!t->is_tc && t->index >= TCC_INST_NUM) || +// (t->is_tc && t->index >= TC_INST_NUM)) { +// continue; +// } +// if (t->is_tc) { +// found = true; +// Tc* tc = tc_insts[t->index]; +// if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { +// timer = t; +// mux_position = i; +// } +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) { +// timer = t; +// mux_position = i; +// } +// } +// } +// +// if (timer == NULL) { +// if (found) { +// return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE; +// } +// return PWMOUT_ALL_TIMERS_IN_USE; +// } +// +// uint8_t resolution = 0; +// if (timer->is_tc) { +// resolution = 16; +// } else { +// // TCC resolution varies so look it up. +// const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES; +// resolution = _tcc_sizes[timer->index]; +// } +// // First determine the divisor that gets us the highest resolution. +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t top; +// uint8_t divisor; +// for (divisor = 0; divisor < 8; divisor++) { +// top = (system_clock / prescaler[divisor] / frequency) - 1; +// if (top < (1u << resolution)) { +// break; +// } +// } +// +// set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT); +// // We use the zeroeth clock on either port to go full speed. +// turn_on_clocks(timer->is_tc, timer->index, 0); +// +// if (timer->is_tc) { +// tc_periods[timer->index] = top; +// Tc* tc = tc_insts[timer->index]; +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER(divisor) | +// TC_CTRLA_WAVEGEN_MPWM; +// tc->COUNT16.CC[0].reg = top; +// #endif +// #ifdef SAMD51 +// +// tc->COUNT16.CTRLA.bit.SWRST = 1; +// while (tc->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor); +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM; +// tc->COUNT16.CCBUF[0].reg = top; +// tc->COUNT16.CCBUF[1].reg = 0; +// #endif +// +// tc_set_enable(tc, true); +// } else { +// tcc_periods[timer->index] = top; +// Tcc* tcc = tcc_insts[timer->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = divisor; +// tcc->PER.bit.PER = top; +// tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val; +// tcc_set_enable(tcc, true); +// target_tcc_frequencies[timer->index] = frequency; +// tcc_refcount[timer->index]++; +// if (variable_frequency) { +// // We're changing frequency so claim all of the channels. +// tcc_channels[timer->index] = 0xff; +// } else { +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// } +// } +// } +// +// self->timer = timer; +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position); + + common_hal_pulseio_pwmout_set_duty_cycle(self, duty); + + return PWMOUT_OK; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + return self->pin == NULL; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.SWRST = true; +// tc_wait_for_sync(tc); +// } else { +// tcc_refcount[t->index]--; +// tcc_channels[t->index] &= ~(1 << tcc_channel(t)); +// if (tcc_refcount[t->index] == 0) { +// target_tcc_frequencies[t->index] = 0; +// Tcc* tcc = tcc_insts[t->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.SWRST = true; +// while (tcc->SYNCBUSY.bit.SWRST != 0) { +// /* Wait for sync */ +// } +// } +// } +// reset_pin_number(self->pin->number); + self->pin = NULL; +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) { + PWM_UpdatePwmDutycycle(PWM1, self->pwm->submodule, self->pwm->channel, kPWM_SignedCenterAligned, duty); + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; +// #ifdef SAMD21 +// tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// Tc* tc = tc_insts[t->index]; +// while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} +// tc->COUNT16.CCBUF[1].reg = adjusted_duty; +// #endif +// } else { +// uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; +// uint8_t channel = tcc_channel(t); +// Tcc* tcc = tcc_insts[t->index]; +// +// // Write into the CC buffer register, which will be transferred to the +// // CC register on an UPDATE (when period is finished). +// // Do clock domain syncing as necessary. +// +// while (tcc->SYNCBUSY.reg != 0) {} +// +// // Lock out double-buffering while updating the CCB value. +// tcc->CTRLBSET.bit.LUPD = 1; +// #ifdef SAMD21 +// tcc->CCB[channel].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// tcc->CCBUF[channel].reg = adjusted_duty; +// #endif +// tcc->CTRLBCLR.bit.LUPD = 1; +// } +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + return 0; +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_wait_for_sync(tc); +// uint16_t cv = tc->COUNT16.CC[t->wave_output].reg; +// return cv * 0xffff / tc_periods[t->index]; +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t channel = tcc_channel(t); +// uint32_t cv = 0; +// +// while (tcc->SYNCBUSY.bit.CTRLB) {} +// +// #ifdef SAMD21 +// // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied +// // to the CC value. +// if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) { +// cv = tcc->CCB[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// #ifdef SAMD51 +// if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) { +// cv = tcc->CCBUF[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// +// uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index]; +// +// return duty_cycle; +// } +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, + uint32_t frequency) { +// if (frequency == 0 || frequency > 6000000) { +// mp_raise_ValueError(translate("Invalid PWM frequency")); +// } +// const pin_timer_t* t = self->timer; +// uint8_t resolution; +// if (t->is_tc) { +// resolution = 16; +// } else { +// resolution = 24; +// } +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t new_top; +// uint8_t new_divisor; +// for (new_divisor = 0; new_divisor < 8; new_divisor++) { +// new_top = (system_clock / prescaler[new_divisor] / frequency) - 1; +// if (new_top < (1u << resolution)) { +// break; +// } +// } +// uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self); +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor; +// tc_set_enable(tc, true); +// } +// tc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tc->COUNT16.CC[0].reg = new_top; +// #endif +// #ifdef SAMD51 +// while (tc->COUNT16.SYNCBUSY.reg != 0) {} +// tc->COUNT16.CCBUF[0].reg = new_top; +// #endif +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = new_divisor; +// tcc_set_enable(tcc, true); +// } +// while (tcc->SYNCBUSY.reg != 0) {} +// tcc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tcc->PERB.bit.PERB = new_top; +// #endif +// #ifdef SAMD51 +// tcc->PERBUF.bit.PERBUF = new_top; +// #endif +// } + +// common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty); +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// const pin_timer_t* t = self->timer; +// uint8_t divisor; +// uint32_t top; +// if (t->is_tc) { +// divisor = tc_insts[t->index]->COUNT16.CTRLA.bit.PRESCALER; +// top = tc_periods[t->index]; +// } else { +// divisor = tcc_insts[t->index]->CTRLA.bit.PRESCALER; +// top = tcc_periods[t->index]; +// } +// return (system_clock / prescaler[divisor]) / (top + 1); + return 0; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + return self->variable_frequency; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h new file mode 100644 index 0000000000000..2f0fe94c44786 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + const mcu_pwm_obj_t *pwm; + bool variable_frequency; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c new file mode 100644 index 0000000000000..24e9ad85de378 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c @@ -0,0 +1,248 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" + +#include + +#include "background.h" +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/pulseio/PulseIn.h" +#include "supervisor/shared/translate.h" + +#include "tick.h" + +// TODO +//static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { +// uint32_t sense_setting; +// if (!first_edge) { +// sense_setting = EIC_CONFIG_SENSE0_BOTH_Val; +// configure_eic_channel(self->channel, sense_setting); +// return; +// } else if (self->idle_state) { +// sense_setting = EIC_CONFIG_SENSE0_FALL_Val; +// } else { +// sense_setting = EIC_CONFIG_SENSE0_RISE_Val; +// } +// set_eic_handler(self->channel, EIC_HANDLER_PULSEIN); +// turn_on_eic_channel(self->channel, sense_setting); +//} + +//void pulsein_interrupt_handler(uint8_t channel) { +// // Grab the current time first. +// uint32_t current_us; +// uint64_t current_ms; +// current_tick(¤t_ms, ¤t_us); +// +// // current_tick gives us the remaining us until the next tick but we want the number since the +// // last ms. +// current_us = 1000 - current_us; +// pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); +// if (!background_tasks_ok() || self->errored_too_fast) { +// self->errored_too_fast = true; +// common_hal_pulseio_pulsein_pause(self); +// return; +// } +// if (self->first_edge) { +// self->first_edge = false; +// pulsein_set_config(self, false); +// } else { +// uint32_t ms_diff = current_ms - self->last_ms; +// uint16_t us_diff = current_us - self->last_us; +// uint32_t total_diff = us_diff; +// if (self->last_us > current_us) { +// total_diff = 1000 + current_us - self->last_us; +// if (ms_diff > 1) { +// total_diff += (ms_diff - 1) * 1000; +// } +// } else { +// total_diff += ms_diff * 1000; +// } +// uint16_t duration = 0xffff; +// if (total_diff < duration) { +// duration = total_diff; +// } +// +// uint16_t i = (self->start + self->len) % self->maxlen; +// self->buffer[i] = duration; +// if (self->len < self->maxlen) { +// self->len++; +// } else { +// self->start++; +// } +// } +// self->last_ms = current_ms; +// self->last_us = current_us; +//} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, + const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { +// if (!pin->has_extint) { +// mp_raise_RuntimeError(translate("No hardware support on pin")); +// } +// if (eic_get_enable() && !eic_channel_free(pin->extint_channel)) { +// mp_raise_RuntimeError(translate("EXTINT channel already in use")); +// } +// +// self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); +// if (self->buffer == NULL) { +// mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); +// } +// self->channel = pin->extint_channel; +// self->pin = pin->number; +// self->maxlen = maxlen; +// self->idle_state = idle_state; +// self->start = 0; +// self->len = 0; +// self->first_edge = true; +// self->last_us = 0; +// self->last_ms = 0; +// self->errored_too_fast = false; +// +// set_eic_channel_data(pin->extint_channel, (void*) self); +// +// // Check to see if the EIC is enabled and start it up if its not.' +// if (eic_get_enable() == 0) { +// turn_on_external_interrupt_controller(); +// } +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_A); +// +// turn_on_cpu_interrupt(self->channel); +// +// claim_pin(pin); +// +// // Set config will enable the EIC. +// pulsein_set_config(self, true); +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { +// return self->pin == NO_PIN; + return true; +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { +// if (common_hal_pulseio_pulsein_deinited(self)) { +// return; +// } +// set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); +// turn_off_eic_channel(self->channel); +// reset_pin_number(self->pin); +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, + uint16_t trigger_duration) { +// // Make sure we're paused. +// common_hal_pulseio_pulsein_pause(self); +// +// // Reset erroring +// self->errored_too_fast = false; +// +// // Send the trigger pulse. +// if (trigger_duration > 0) { +// gpio_set_pin_pull_mode(self->pin, GPIO_PULL_OFF); +// gpio_set_pin_direction(self->pin, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(self->pin, !self->idle_state); +// common_hal_mcu_delay_us((uint32_t)trigger_duration); +// gpio_set_pin_level(self->pin, self->idle_state); +// } +// +// // Reconfigure the pin and make sure its set to detect the first edge. +// self->first_edge = true; +// self->last_ms = 0; +// self->last_us = 0; +// gpio_set_pin_function(self->pin, GPIO_PIN_FUNCTION_A); +// uint32_t mask = 1 << self->channel; +// // Clear previous interrupt state and re-enable it. +// EIC->INTFLAG.reg = mask << EIC_INTFLAG_EXTINT_Pos; +// EIC->INTENSET.reg = mask << EIC_INTENSET_EXTINT_Pos; +// +// pulsein_set_config(self, true); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { +// common_hal_mcu_disable_interrupts(); +// self->start = 0; +// self->len = 0; +// common_hal_mcu_enable_interrupts(); +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { +// if (self->len == 0) { +// mp_raise_IndexError(translate("pop from an empty PulseIn")); +// } +// common_hal_mcu_disable_interrupts(); +// uint16_t value = self->buffer[self->start]; +// self->start = (self->start + 1) % self->maxlen; +// self->len--; +// common_hal_mcu_enable_interrupts(); +// +// return value; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { +// return self->maxlen; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { +// return self->len; + return 0; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; + return true; +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, + int16_t index) { +// common_hal_mcu_disable_interrupts(); +// if (index < 0) { +// index += self->len; +// } +// if (index < 0 || index >= self->len) { +// common_hal_mcu_enable_interrupts(); +// mp_raise_IndexError(translate("index out of range")); +// } +// uint16_t value = self->buffer[(self->start + index) % self->maxlen]; +// common_hal_mcu_enable_interrupts(); +// return value; + return 0; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h new file mode 100644 index 0000000000000..af742f319f5e1 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// uint8_t channel; +// uint8_t pin; +// uint16_t* buffer; +// uint16_t maxlen; +// bool idle_state; +// volatile uint16_t start; +// volatile uint16_t len; +// volatile bool first_edge; +// volatile uint64_t last_ms; +// volatile uint16_t last_us; +// volatile bool errored_too_fast; +} pulseio_pulsein_obj_t; + +//void pulsein_reset(void); +// +//void pulsein_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c new file mode 100644 index 0000000000000..a49cfa7af75d5 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c @@ -0,0 +1,207 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseOut.h" + +#include + +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/pulseio/PulseOut.h" +#include "supervisor/shared/translate.h" + +// TODO + +// This timer is shared amongst all PulseOut objects under the assumption that +// the code is single threaded. +//static uint8_t refcount = 0; +// +//static uint8_t pulseout_tc_index = 0xff; +// +//static __IO PORT_PINCFG_Type *active_pincfg = NULL; +//static uint16_t *pulse_buffer = NULL; +//static volatile uint16_t pulse_index = 0; +//static uint16_t pulse_length; +//static volatile uint32_t current_compare = 0; +// +//static void turn_on(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_PMUXEN; +//} +// +//static void turn_off(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_RESETVALUE; +//} +// +//void pulse_finish(void) { +// pulse_index++; +// +// if (active_pincfg == NULL) { +// return; +// } +// // Always turn it off. +// turn_off(active_pincfg); +// if (pulse_index >= pulse_length) { +// return; +// } +// current_compare = (current_compare + pulse_buffer[pulse_index] * 3 / 4) & 0xffff; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// if (pulse_index % 2 == 0) { +// turn_on(active_pincfg); +// } +//} + +void pulseout_interrupt_handler(uint8_t index) { +// if (index != pulseout_tc_index) return; +// Tc* tc = tc_insts[index]; +// if (!tc->COUNT16.INTFLAG.bit.MC0) return; +// +// pulse_finish(); +// +// // Clear the interrupt bit. +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +} + +void pulseout_reset() { +// refcount = 0; +// pulseout_tc_index = 0xff; +// active_pincfg = NULL; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, + const pulseio_pwmout_obj_t* carrier) { +// if (refcount == 0) { +// // Find a spare timer. +// Tc *tc = NULL; +// int8_t index = TC_INST_NUM - 1; +// for (; index >= 0; index--) { +// if (tc_insts[index]->COUNT16.CTRLA.bit.ENABLE == 0) { +// tc = tc_insts[index]; +// break; +// } +// } +// if (tc == NULL) { +// mp_raise_RuntimeError(translate("All timers in use")); +// } +// +// pulseout_tc_index = index; +// +// set_timer_handler(true, index, TC_HANDLER_PULSEOUT); +// // We use GCLK0 for SAMD21 and GCLK1 for SAMD51 because they both run at 48mhz making our +// // math the same across the boards. +// #ifdef SAMD21 +// turn_on_clocks(true, index, 0); +// #endif +// #ifdef SAMD51 +// turn_on_clocks(true, index, 1); +// #endif +// +// +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER_DIV64 | +// TC_CTRLA_WAVEGEN_NFRQ; +// #endif +// #ifdef SAMD51 +// tc_reset(tc); +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV64; +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_NFRQ; +// #endif +// +// tc_set_enable(tc, true); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// } +// refcount++; +// +// self->pin = carrier->pin->number; +// +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// self->pincfg = &port_base->PINCFG[self->pin % 32]; +// +// // Set the port to output a zero. +// port_base->OUTCLR.reg = 1 << (self->pin % 32); +// port_base->DIRSET.reg = 1 << (self->pin % 32); +// +// // Turn off the pinmux which should connect the port output. +// turn_off(self->pincfg); +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { +// return self->pin == NO_PIN; + return false; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { +// if (common_hal_pulseio_pulseout_deinited(self)) { +// return; +// } +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// port_base->DIRCLR.reg = 1 << (self->pin % 32); +// +// turn_on(self->pincfg); +// +// refcount--; +// if (refcount == 0) { +// tc_reset(tc_insts[pulseout_tc_index]); +// pulseout_tc_index = 0xff; +// } +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { +// if (active_pincfg != NULL) { +// mp_raise_RuntimeError(translate("Another send is already active")); +// } +// active_pincfg = self->pincfg; +// pulse_buffer = pulses; +// pulse_index = 0; +// pulse_length = length; +// +// current_compare = pulses[0] * 3 / 4; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// +// // Clear our interrupt in case it was set earlier +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +// tc->COUNT16.INTENSET.reg = TC_INTENSET_MC0; +// tc_enable_interrupts(pulseout_tc_index); +// turn_on(active_pincfg); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; +// +// while(pulse_index < length) { +// // Do other things while we wait. The interrupts will handle sending the +// // signal. +// RUN_BACKGROUND_TASKS; +// } +// +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// tc->COUNT16.INTENCLR.reg = TC_INTENCLR_MC0; +// tc_disable_interrupts(pulseout_tc_index); +// active_pincfg = NULL; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h new file mode 100644 index 0000000000000..ee70ac17ec940 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// __IO PORT_PINCFG_Type *pincfg; +// uint8_t pin; +} pulseio_pulseout_obj_t; + +void pulseout_reset(void); +//void pulseout_interrupt_handler(uint8_t index); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/__init__.c b/ports/mimxrt10xx/common-hal/pulseio/__init__.c new file mode 100644 index 0000000000000..2bee925bc77fb --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/__init__.c @@ -0,0 +1 @@ +// No pulseio module functions. diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.c b/ports/mimxrt10xx/common-hal/rtc/RTC.c new file mode 100644 index 0000000000000..5d6cae5201ec0 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.c @@ -0,0 +1,76 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "supervisor/shared/translate.h" + +#include "fsl_snvs_hp.h" + +void rtc_init(void) { + snvs_hp_rtc_config_t config; + SNVS_HP_RTC_GetDefaultConfig(&config); + + SNVS_HP_RTC_Init(SNVS, &config); + SNVS_HP_RTC_StartTimer(SNVS); +} + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate); + + tm->tm_year = rtcDate.year; + tm->tm_mon = rtcDate.month; + tm->tm_mday = rtcDate.day; + tm->tm_hour = rtcDate.hour; + tm->tm_min = rtcDate.minute; + tm->tm_sec = rtcDate.second; +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + rtcDate.year = tm->tm_year; + rtcDate.month = tm->tm_mon; + rtcDate.day = tm->tm_mday; + rtcDate.hour = tm->tm_hour; + rtcDate.minute = tm->tm_min; + rtcDate.second = tm->tm_sec; + + SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.h b/ports/mimxrt10xx/common-hal/rtc/RTC.h new file mode 100644 index 0000000000000..4965356c50179 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); +extern void rtc_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H diff --git a/ports/mimxrt10xx/common-hal/rtc/__init__.c b/ports/mimxrt10xx/common-hal/rtc/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.c b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000000..6be38f216ac16 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.h b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000000..11bb590635682 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/mimxrt10xx/common-hal/supervisor/__init__.c b/ports/mimxrt10xx/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000000..ac88556b45da4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/mimxrt10xx/common-hal/time/__init__.c b/ports/mimxrt10xx/common-hal/time/__init__.c new file mode 100644 index 0000000000000..524e31d1ae698 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/time/__init__.c @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "shared-bindings/time/__init__.h" + +#include "supervisor/shared/tick.h" + +#include "tick.h" + +inline uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/mimxrt10xx/fatfs_port.c b/ports/mimxrt10xx/fatfs_port.c new file mode 100644 index 0000000000000..c4ce18c2a7ff7 --- /dev/null +++ b/ports/mimxrt10xx/fatfs_port.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" /* FatFs lower layer API */ +#include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ +#include "lib/timeutils/timeutils.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif + +DWORD get_fattime(void) { +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif + + +} diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld new file mode 100644 index 0000000000000..0d0beebaae090 --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld @@ -0,0 +1,2 @@ +ram_size = 128K; +flash_config_location = 0x60000400; diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld new file mode 100644 index 0000000000000..21f2ea872c3b9 --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld @@ -0,0 +1,2 @@ +ram_size = 256K; +flash_config_location = 0x60000000; diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld new file mode 100644 index 0000000000000..e07c5c2c37bce --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld @@ -0,0 +1,2 @@ +ram_size = 1M; +flash_config_location = 0x60000000; diff --git a/ports/mimxrt10xx/linking/common.ld b/ports/mimxrt10xx/linking/common.ld new file mode 100644 index 0000000000000..10568bfb86061 --- /dev/null +++ b/ports/mimxrt10xx/linking/common.ld @@ -0,0 +1,154 @@ +/* Template for iMX RT 10xx linking. This is the last of four linker scripts passed in. + +The first three provide variables for this one. + +Boards can setup reserved flash with _ld_reserved_flash_size in board.ld. */ + +ENTRY(Reset_Handler) + +code_size = 1M; +_ld_default_stack_size = 20K; + +/* Default reserved flash to nothing. */ +_ld_reserved_flash_size = DEFINED(_ld_reserved_flash_size) ? _ld_reserved_flash_size : 0K ; + +MEMORY +{ + /* These next two sections are included in place of a bootloader. If a UF2 is used to load, it + will ignore these two sections because it lives there. */ + /* This is the first block and is read so that the bootrom knows the optimal way to interface with the flash chip. */ + FLASH_CONFIG (rx) : ORIGIN = flash_config_location, LENGTH = 512 + /* This can't move because the bootrom looks at this address. */ + FLASH_IVT (rx) : ORIGIN = 0x60001000, LENGTH = 4K + /* Place the ISRs 48k in to leave room for the bootloader when it is available. */ + FLASH_TEXT (rx) : ORIGIN = 0x6000C000, LENGTH = code_size - 48K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size + /* Teensy uses the last bit of flash for recovery. */ + RESERVED_FLASH : ORIGIN = 0x60100000 + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = ram_size - 64K + DTCM (x) : ORIGIN = 0x20000000, LENGTH = 32K + ITCM (x) : ORIGIN = 0x00000000, LENGTH = 32K +} + +__data_start__ = 0; +__data_end__ = 0; +_start = 0; + +SECTIONS +{ + .flash_config : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.conf)) + . = ALIGN(4); + } > FLASH_CONFIG + + .ivt : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.ivt)) + KEEP(* (.boot_hdr.boot_data)) + KEEP(* (.boot_hdr.dcd_data)) + . = ALIGN(4); + } > FLASH_IVT + image_vector_table = LOADADDR(.ivt); + + .text : + { + . = ALIGN(4); + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + _ld_isr_table = .; + + KEEP(*(.isr_vector)) /* Startup code */ + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + _ld_filesystem_start = ORIGIN(FLASH_FATFS); + _ld_filesystem_end = _ld_filesystem_start + LENGTH(FLASH_FATFS); + + .data : + { + . = ALIGN(4); + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + } > OCRAM AT> FLASH_TEXT + _ld_ocram_data_destination = ADDR(.data); + _ld_ocram_data_flash_copy = LOADADDR(.data); + _ld_ocram_data_size = SIZEOF(.data); + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + } > OCRAM + _ld_ocram_bss_start = ADDR(.bss); + _ld_ocram_bss_size = SIZEOF(.bss); + _ld_heap_start = _ld_ocram_bss_start + _ld_ocram_bss_size; + _ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM); + + .itcm : + { + . = ALIGN(4); + + *(.itcm.*) + + . = ALIGN(4); + } > ITCM AT> FLASH_TEXT + _ld_itcm_destination = ADDR(.itcm); + _ld_itcm_flash_copy = LOADADDR(.itcm); + _ld_itcm_size = SIZEOF(.itcm); + + .dtcm_data : + { + . = ALIGN(4); + + *(.dtcm_data.*) + + . = ALIGN(4); + } > DTCM AT> FLASH_TEXT + _ld_dtcm_data_destination = ADDR(.dtcm_data); + _ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data); + _ld_dtcm_data_size = SIZEOF(.dtcm_data); + + .dtcm_bss : + { + . = ALIGN(4); + + *(.dtcm_bss.*) + + . = ALIGN(4); + } > DTCM AT> DTCM + _ld_dtcm_bss_start = ADDR(.dtcm_bss); + _ld_dtcm_bss_size = SIZEOF(.dtcm_bss); + + .stack : + { + . = ALIGN(8); + _ld_stack_bottom = .; + . += _ld_default_stack_size; + } > DTCM + _ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM); + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/ports/mimxrt10xx/linking/flash/AT25SF128A.ld b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld new file mode 100644 index 0000000000000..205d9dd839343 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld @@ -0,0 +1 @@ +_ld_flash_size = 16M; diff --git a/ports/mimxrt10xx/linking/flash/IS25LP064A.ld b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld new file mode 100644 index 0000000000000..53d296ec80c3f --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/linking/flash/IS25WP064A.ld b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld new file mode 100644 index 0000000000000..53d296ec80c3f --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/linking/flash/W25Q16JV.ld b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld new file mode 100644 index 0000000000000..9ce06b44a8fa5 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 2M; diff --git a/ports/mimxrt10xx/linking/flash/W25Q32JV.ld b/ports/mimxrt10xx/linking/flash/W25Q32JV.ld new file mode 100644 index 0000000000000..3fa395c665ea0 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q32JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 4M; diff --git a/ports/mimxrt10xx/linking/flash/W25Q64JV.ld b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld new file mode 100644 index 0000000000000..53d296ec80c3f --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h new file mode 100644 index 0000000000000..745c12f7de755 --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.h @@ -0,0 +1,61 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __INCLUDED_MPCONFIGPORT_H +#define __INCLUDED_MPCONFIGPORT_H + +#include + +#define MICROPY_PY_SYS_PLATFORM "NXP IMXRT10XX" +#define SPI_FLASH_MAX_BAUDRATE 24000000 + +extern uint8_t _ld_filesystem_start; +extern uint8_t _ld_filesystem_end; +extern uint8_t _ld_default_stack_size; + +// 20kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t) &_ld_default_stack_size) +#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) +#define MICROPY_PY_FUNCTION_ATTRS (0) +#define MICROPY_PY_IO (1) +#define MICROPY_PY_UJSON (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) + + +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR ((uint32_t) &_ld_filesystem_start) +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE ((uint32_t) (&_ld_filesystem_end - &_ld_filesystem_start)) + +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS \ + +// TODO: +// mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk new file mode 100644 index 0000000000000..5881ac3020a02 --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -0,0 +1,30 @@ +LD_FILE = $(FLASH).ld $(CHIP_FAMILY).ld imxrt10xx.ld + +ifeq ($(LONGINT_IMPL),NONE) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none +endif + +ifeq ($(LONGINT_IMPL),MPZ) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz +endif + +ifeq ($(LONGINT_IMPL),LONGLONG) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=longlong +endif + +INTERNAL_LIBM = 1 + +USB_DEVICES = "CDC,MSC,HID" +USB_SERIAL_NUMBER_LENGTH = 32 +USB_MSC_MAX_PACKET_SIZE = 512 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/mphalport.c b/ports/mimxrt10xx/mphalport.c new file mode 100644 index 0000000000000..06275cd83c657 --- /dev/null +++ b/ports/mimxrt10xx/mphalport.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpstate.h" +#include "py/smallint.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/tick.h" + +#include "fsl_common.h" + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + RUN_BACKGROUND_TASKS; + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(mp_uint_t delay) { +#if defined(MIMXRT1011_SERIES) || defined(MIMXRT1021_SERIES) + SDK_DelayAtLeastUs(delay, SystemCoreClock); +#else + SDK_DelayAtLeastUs(delay); +#endif +} + +void mp_hal_disable_all_interrupts(void) { + common_hal_mcu_disable_interrupts(); +} + +void mp_hal_enable_all_interrupts(void) { + common_hal_mcu_enable_interrupts(); +} diff --git a/ports/mimxrt10xx/mphalport.h b/ports/mimxrt10xx/mphalport.h new file mode 100644 index 0000000000000..1acc461b7eca5 --- /dev/null +++ b/ports/mimxrt10xx/mphalport.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H +#define MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H + +#include "py/obj.h" + +#include "lib/oofatfs/ff.h" + +#include "supervisor/shared/tick.h" + +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} +// Number of bytes in receive buffer +volatile uint8_t usb_rx_count; +volatile bool mp_cdc_enabled; + +int receive_usb(void); + +void mp_hal_set_interrupt_char(int c); + +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c new file mode 100644 index 0000000000000..854ae4dee954e --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c @@ -0,0 +1,260 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ + +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */ + +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT 500000000UL +#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL + +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = { + .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.5V. It is necessary to config CORE to 500Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Xbar1); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable ADC_ACLK_EN clock gate. */ + CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK; + /* Set ADC_ACLK_PODF. */ + CLOCK_SetDiv(kCLOCK_AdcDiv, 11); + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 1); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 5U); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* Init Enet PLL. */ + CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN); + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c new file mode 100644 index 0000000000000..2fed6dfc611ab --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -0,0 +1,168 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_13), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_05), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 2, &pin_GPIO_11), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 3, &pin_GPIO_01), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_01), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 2, &pin_GPIO_SD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 3, &pin_GPIO_09), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_14), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_06), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 2, &pin_GPIO_12), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 3, &pin_GPIO_02), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_02), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 2, &pin_GPIO_SD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 3, &pin_GPIO_10), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2 }; + +const mcu_periph_obj_t mcu_spi_sck_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_06), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_08), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_12), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_11), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_04), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_06), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_10), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_10), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_03), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_05), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_09), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_09), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4 }; + +const mcu_periph_obj_t mcu_uart_rx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_11), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 1, &pin_GPIO_09), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_09), + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 1, &pin_GPIO_13), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 1, &pin_GPIO_11), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 2, &pin_GPIO_07), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_01), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 1, &pin_GPIO_05), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 0, &pin_GPIO_SD_12), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 1, &pin_GPIO_10), + + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_00), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 1, &pin_GPIO_SD_10), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 1, &pin_GPIO_12), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 2, &pin_GPIO_08), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_02), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06), +}; + +const mcu_periph_obj_t mcu_uart_rts_list[4] = { + PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07), + + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07), + + PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13), + + PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_13) +}; + +const mcu_periph_obj_t mcu_uart_cts_list[4] = { + PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_08), + + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_08), + + PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_14), + + PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_14), +}; + +const mcu_pwm_obj_t mcu_pwm_list[20] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_SD_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 1, &pin_GPIO_AD_12), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_04), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_SD_04), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_SD_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 1, &pin_GPIO_AD_11), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_06), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_AD_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_05), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_AD_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 1, &pin_GPIO_AD_10), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_08), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_AD_06), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_07), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_AD_05), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 1, &pin_GPIO_AD_09), +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h new file mode 100644 index 0000000000000..d6d4895371b81 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[8]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[4]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[4]; +extern const mcu_periph_obj_t mcu_spi_miso_list[4]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[9]; +extern const mcu_periph_obj_t mcu_uart_tx_list[9]; +extern const mcu_periph_obj_t mcu_uart_rts_list[4]; +extern const mcu_periph_obj_t mcu_uart_cts_list[4]; + +extern const mcu_pwm_obj_t mcu_pwm_list[20]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIP_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c new file mode 100644 index 0000000000000..8e68e770278cd --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c @@ -0,0 +1,77 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_00 = PIN(GPIO1, 0, GPIO_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_01 = PIN(GPIO1, 1, GPIO_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_02 = PIN(GPIO1, 2, GPIO_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_03 = PIN(GPIO1, 3, GPIO_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_04 = PIN(GPIO1, 4, GPIO_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_05 = PIN(GPIO1, 5, GPIO_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_06 = PIN(GPIO1, 6, GPIO_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_07 = PIN(GPIO1, 7, GPIO_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_08 = PIN(GPIO1, 8, GPIO_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_09 = PIN(GPIO1, 9, GPIO_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_10 = PIN(GPIO1, 10, GPIO_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_11 = PIN(GPIO1, 11, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_12 = PIN(GPIO1, 12, GPIO_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_13 = PIN(GPIO1, 13, GPIO_13, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_00 = PIN(GPIO1, 14, GPIO_AD_00, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_01 = PIN(GPIO1, 15, GPIO_AD_01, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_02 = PIN(GPIO1, 16, GPIO_AD_02, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_03 = PIN(GPIO1, 17, GPIO_AD_03, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_04 = PIN(GPIO1, 18, GPIO_AD_04, ADC1, 4); +const mcu_pin_obj_t pin_GPIO_AD_05 = PIN(GPIO1, 19, GPIO_AD_05, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_06 = PIN(GPIO1, 20, GPIO_AD_06, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_07 = PIN(GPIO1, 21, GPIO_AD_07, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_08 = PIN(GPIO1, 22, GPIO_AD_08, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_09 = PIN(GPIO1, 23, GPIO_AD_09, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_10 = PIN(GPIO1, 24, GPIO_AD_10, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_11 = PIN(GPIO1, 25, GPIO_AD_11, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_12 = PIN(GPIO1, 26, GPIO_AD_12, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_13 = PIN(GPIO1, 27, GPIO_AD_13, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_14 = PIN(GPIO1, 28, GPIO_AD_14, ADC1, 14); + +const mcu_pin_obj_t pin_GPIO_SD_00 = PIN(GPIO2, 0, GPIO_SD_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_01 = PIN(GPIO2, 1, GPIO_SD_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_02 = PIN(GPIO2, 2, GPIO_SD_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_03 = PIN(GPIO2, 3, GPIO_SD_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_04 = PIN(GPIO2, 4, GPIO_SD_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_05 = PIN(GPIO2, 5, GPIO_SD_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_06 = PIN(GPIO2, 6, GPIO_SD_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_07 = PIN(GPIO2, 7, GPIO_SD_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_08 = PIN(GPIO2, 8, GPIO_SD_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_09 = PIN(GPIO2, 9, GPIO_SD_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_10 = PIN(GPIO2, 10, GPIO_SD_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_11 = PIN(GPIO2, 11, GPIO_SD_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_12 = PIN(GPIO2, 12, GPIO_SD_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_13 = PIN(GPIO2, 13, GPIO_SD_13, NO_ADC, 0); + diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h new file mode 100644 index 0000000000000..6b31d6d8edd81 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_00; +extern const mcu_pin_obj_t pin_GPIO_01; +extern const mcu_pin_obj_t pin_GPIO_02; +extern const mcu_pin_obj_t pin_GPIO_03; +extern const mcu_pin_obj_t pin_GPIO_04; +extern const mcu_pin_obj_t pin_GPIO_05; +extern const mcu_pin_obj_t pin_GPIO_06; +extern const mcu_pin_obj_t pin_GPIO_07; +extern const mcu_pin_obj_t pin_GPIO_08; +extern const mcu_pin_obj_t pin_GPIO_09; +extern const mcu_pin_obj_t pin_GPIO_10; +extern const mcu_pin_obj_t pin_GPIO_11; +extern const mcu_pin_obj_t pin_GPIO_12; +extern const mcu_pin_obj_t pin_GPIO_13; + +extern const mcu_pin_obj_t pin_GPIO_SD_00; +extern const mcu_pin_obj_t pin_GPIO_SD_01; +extern const mcu_pin_obj_t pin_GPIO_SD_02; +extern const mcu_pin_obj_t pin_GPIO_SD_03; +extern const mcu_pin_obj_t pin_GPIO_SD_04; +extern const mcu_pin_obj_t pin_GPIO_SD_05; +extern const mcu_pin_obj_t pin_GPIO_SD_06; +extern const mcu_pin_obj_t pin_GPIO_SD_07; +extern const mcu_pin_obj_t pin_GPIO_SD_08; +extern const mcu_pin_obj_t pin_GPIO_SD_09; +extern const mcu_pin_obj_t pin_GPIO_SD_10; +extern const mcu_pin_obj_t pin_GPIO_SD_11; +extern const mcu_pin_obj_t pin_GPIO_SD_12; +extern const mcu_pin_obj_t pin_GPIO_SD_13; +extern const mcu_pin_obj_t pin_GPIO_SD_14; + +extern const mcu_pin_obj_t pin_GPIO_AD_00; +extern const mcu_pin_obj_t pin_GPIO_AD_01; +extern const mcu_pin_obj_t pin_GPIO_AD_02; +extern const mcu_pin_obj_t pin_GPIO_AD_03; +extern const mcu_pin_obj_t pin_GPIO_AD_04; +extern const mcu_pin_obj_t pin_GPIO_AD_05; +extern const mcu_pin_obj_t pin_GPIO_AD_06; +extern const mcu_pin_obj_t pin_GPIO_AD_07; +extern const mcu_pin_obj_t pin_GPIO_AD_08; +extern const mcu_pin_obj_t pin_GPIO_AD_09; +extern const mcu_pin_obj_t pin_GPIO_AD_10; +extern const mcu_pin_obj_t pin_GPIO_AD_11; +extern const mcu_pin_obj_t pin_GPIO_AD_12; +extern const mcu_pin_obj_t pin_GPIO_AD_13; +extern const mcu_pin_obj_t pin_GPIO_AD_14; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c new file mode 100644 index 0000000000000..cb9dd34c90328 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c @@ -0,0 +1,341 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +// These values are pulled from the SDK's devices/MIMXRT1021/project_template/clock_config.* files. + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ + +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */ + +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 500000000UL +#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL +#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL + +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = { + .enableClkOutput = false, /* Disable the PLL providing the ENET 125MHz reference clock */ + .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */ + .enableClkOutput25M = false, /* Disable the PLL providing the ENET 25MHz reference clock */ + .loopDivider = 1, /* Set frequency of ethernet reference clock to 50 MHz */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 500Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Adc2); + CLOCK_DisableClock(kCLOCK_Xbar1); + CLOCK_DisableClock(kCLOCK_Xbar2); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Set ARM_PODF. */ + CLOCK_SetDiv(kCLOCK_ArmDiv, 0); + /* Set PERIPH_CLK2_PODF. */ + CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable USDHC1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc1); + /* Set USDHC1_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 2); + /* Set Usdhc1 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); + /* Disable USDHC2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc2); + /* Set USDHC2_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2); + /* Set Usdhc2 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as + * well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Disable Semc clock gate. */ + CLOCK_DisableClock(kCLOCK_Semc); + /* Set SEMC_PODF. */ + CLOCK_SetDiv(kCLOCK_SemcDiv, 7); + /* Set Semc alt clock source. */ + CLOCK_SetMux(kCLOCK_SemcAltMux, 0); + /* Set Semc clock source. */ + CLOCK_SetMux(kCLOCK_SemcMux, 0); +#endif + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + CLOCK_DisableClock(kCLOCK_Lpspi3); + CLOCK_DisableClock(kCLOCK_Lpspi4); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 4); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 2); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai2); + /* Set SAI2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3); + /* Set SAI2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai2Div, 1); + /* Set Sai2 clock source. */ + CLOCK_SetMux(kCLOCK_Sai2Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + CLOCK_DisableClock(kCLOCK_Lpi2c3); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable CAN clock gate. */ + CLOCK_DisableClock(kCLOCK_Can1); + CLOCK_DisableClock(kCLOCK_Can2); + CLOCK_DisableClock(kCLOCK_Can1S); + CLOCK_DisableClock(kCLOCK_Can2S); + /* Set CAN_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_CanDiv, 1); + /* Set Can clock source. */ + CLOCK_SetMux(kCLOCK_CanMux, 2); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + CLOCK_DisableClock(kCLOCK_Lpuart5); + CLOCK_DisableClock(kCLOCK_Lpuart6); + CLOCK_DisableClock(kCLOCK_Lpuart7); + CLOCK_DisableClock(kCLOCK_Lpuart8); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as + * well.*/ +#ifndef SKIP_SYSCLK_INIT +#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) + #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged." +#endif + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* Init Enet PLL. */ + CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN); + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(3); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI2 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set ENET Tx clock source. */ + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c new file mode 100644 index 0000000000000..60f301668a253 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -0,0 +1,258 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_18), + + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B0_09), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_10), + PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[8] = { + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_19), + + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_08), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_11), + PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; + +const mcu_periph_obj_t mcu_spi_sck_list[8] = { + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B0_02), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_AD_B0_10), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_00), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_10), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 2, &pin_GPIO_SD_B1_07), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_12), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_02), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_32), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[8] = { + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_12), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 2, &pin_GPIO_SD_B1_08), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_04), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_34), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 2, &pin_GPIO_SD_B1_09), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_05), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_35), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; + +const mcu_periph_obj_t mcu_uart_rx_list[16] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_07), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_23), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_07), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_15), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_EMC_33), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B0_11), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_39), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_13), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_01), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_35), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_03), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_27), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[16] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_06), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_22), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_06), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_14), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_10), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_32), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B0_10), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_38), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_12), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_00), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_34), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_02), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_26), +}; + +const mcu_periph_obj_t mcu_uart_rts_list[10] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_09), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_EMC_21), + PERIPH_PIN(2, 2, 0, 1, &pin_GPIO_AD_B1_07), + + PERIPH_PIN(3, 2, 0, 1, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_01), + PERIPH_PIN(4, 2, 0, 1, &pin_GPIO_EMC_31), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_37), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_15), + + PERIPH_PIN(7, 2, 0, 1, &pin_GPIO_SD_B0_03), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_EMC_25), +}; + +const mcu_periph_obj_t mcu_uart_cts_list[10] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_08), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_CTS_B_SELECT_INPUT, 0, &pin_GPIO_AD_B1_06), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_CTS_B_SELECT_INPUT, 1, &pin_GPIO_EMC_20), + + PERIPH_PIN(3, 2, 0, 1, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_00), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_30), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_36), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_14), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_EMC_24), +}; + +const mcu_pwm_obj_t mcu_pwm_list[39] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_06), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_22), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_AD_B1_10), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_AD_B1_12), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_AD_B1_07), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_AD_B1_09), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_AD_B1_11), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_21), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_AD_B1_13), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 7, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 7, &pin_GPIO_EMC_29), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 7, &pin_GPIO_EMC_30), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 4, &pin_GPIO_AD_B0_14), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_36), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 4, &pin_GPIO_AD_B0_12), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_30), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 4, &pin_GPIO_AD_B0_10), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_AD_B0_06), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 4, &pin_GPIO_AD_B0_15), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_37), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 4, &pin_GPIO_AD_B0_13), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_31), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 4, &pin_GPIO_AD_B0_11), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_29), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_AD_B0_07), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmX, 6, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmX, 6, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmX, 6, &pin_GPIO_EMC_12), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmX, 6, &pin_GPIO_EMC_13), +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h new file mode 100644 index 0000000000000..ba88ef4c61431 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[8]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[8]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[8]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[16]; +extern const mcu_periph_obj_t mcu_uart_tx_list[16]; +extern const mcu_periph_obj_t mcu_uart_rts_list[10]; +extern const mcu_periph_obj_t mcu_uart_cts_list[10]; + +extern const mcu_pwm_obj_t mcu_pwm_list[39]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIP_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c new file mode 100644 index 0000000000000..4106c9bad4a1d --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c @@ -0,0 +1,128 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC2, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC2, 1); +const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 2); + +const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC2, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 4); +const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC2, 4); +const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC2, 5); +const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC2, 6); +const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC2, 7); +const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC2, 8); +const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC2, 9); +const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC2, 10); +const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC2, 11); +const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 12); +const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 13); +const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 14); +const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 15); + +const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO2, 0, GPIO_EMC_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO2, 1, GPIO_EMC_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO2, 2, GPIO_EMC_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO2, 3, GPIO_EMC_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO2, 4, GPIO_EMC_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO2, 5, GPIO_EMC_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO2, 6, GPIO_EMC_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO2, 7, GPIO_EMC_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO2, 8, GPIO_EMC_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO2, 9, GPIO_EMC_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO2, 10, GPIO_EMC_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO2, 11, GPIO_EMC_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO2, 12, GPIO_EMC_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO2, 13, GPIO_EMC_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO2, 14, GPIO_EMC_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO2, 15, GPIO_EMC_15, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO2, 16, GPIO_EMC_16, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO2, 17, GPIO_EMC_17, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO2, 18, GPIO_EMC_18, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO2, 19, GPIO_EMC_19, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO2, 20, GPIO_EMC_20, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO2, 21, GPIO_EMC_21, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO2, 22, GPIO_EMC_22, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO2, 23, GPIO_EMC_23, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO2, 24, GPIO_EMC_24, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO2, 25, GPIO_EMC_25, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO2, 26, GPIO_EMC_26, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO2, 27, GPIO_EMC_27, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO2, 28, GPIO_EMC_28, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO2, 29, GPIO_EMC_29, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO2, 30, GPIO_EMC_30, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO2, 31, GPIO_EMC_31, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 0, GPIO_EMC_32, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 1, GPIO_EMC_33, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 2, GPIO_EMC_34, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 3, GPIO_EMC_35, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 4, GPIO_EMC_36, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 5, GPIO_EMC_37, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 6, GPIO_EMC_38, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 7, GPIO_EMC_39, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 8, GPIO_EMC_40, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 9, GPIO_EMC_41, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 13, GPIO_SD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 14, GPIO_SD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 15, GPIO_SD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 16, GPIO_SD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 17, GPIO_SD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 18, GPIO_SD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_06 = PIN(GPIO3, 19, GPIO_SD_B0_06, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 20, GPIO_SD_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 21, GPIO_SD_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 22, GPIO_SD_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 23, GPIO_SD_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 24, GPIO_SD_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 25, GPIO_SD_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 26, GPIO_SD_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 27, GPIO_SD_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 28, GPIO_SD_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 29, GPIO_SD_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 30, GPIO_SD_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 31, GPIO_SD_B1_11, NO_ADC, 0); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h new file mode 100644 index 0000000000000..a13bacfc35826 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_AD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_AD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_EMC_00; +extern const mcu_pin_obj_t pin_GPIO_EMC_01; +extern const mcu_pin_obj_t pin_GPIO_EMC_02; +extern const mcu_pin_obj_t pin_GPIO_EMC_03; +extern const mcu_pin_obj_t pin_GPIO_EMC_04; +extern const mcu_pin_obj_t pin_GPIO_EMC_05; +extern const mcu_pin_obj_t pin_GPIO_EMC_06; +extern const mcu_pin_obj_t pin_GPIO_EMC_07; +extern const mcu_pin_obj_t pin_GPIO_EMC_08; +extern const mcu_pin_obj_t pin_GPIO_EMC_09; +extern const mcu_pin_obj_t pin_GPIO_EMC_10; +extern const mcu_pin_obj_t pin_GPIO_EMC_11; +extern const mcu_pin_obj_t pin_GPIO_EMC_12; +extern const mcu_pin_obj_t pin_GPIO_EMC_13; +extern const mcu_pin_obj_t pin_GPIO_EMC_14; +extern const mcu_pin_obj_t pin_GPIO_EMC_15; +extern const mcu_pin_obj_t pin_GPIO_EMC_16; +extern const mcu_pin_obj_t pin_GPIO_EMC_17; +extern const mcu_pin_obj_t pin_GPIO_EMC_18; +extern const mcu_pin_obj_t pin_GPIO_EMC_19; +extern const mcu_pin_obj_t pin_GPIO_EMC_20; +extern const mcu_pin_obj_t pin_GPIO_EMC_21; +extern const mcu_pin_obj_t pin_GPIO_EMC_22; +extern const mcu_pin_obj_t pin_GPIO_EMC_23; +extern const mcu_pin_obj_t pin_GPIO_EMC_24; +extern const mcu_pin_obj_t pin_GPIO_EMC_25; +extern const mcu_pin_obj_t pin_GPIO_EMC_26; +extern const mcu_pin_obj_t pin_GPIO_EMC_27; +extern const mcu_pin_obj_t pin_GPIO_EMC_28; +extern const mcu_pin_obj_t pin_GPIO_EMC_29; +extern const mcu_pin_obj_t pin_GPIO_EMC_30; +extern const mcu_pin_obj_t pin_GPIO_EMC_31; +extern const mcu_pin_obj_t pin_GPIO_EMC_32; +extern const mcu_pin_obj_t pin_GPIO_EMC_33; +extern const mcu_pin_obj_t pin_GPIO_EMC_34; +extern const mcu_pin_obj_t pin_GPIO_EMC_35; +extern const mcu_pin_obj_t pin_GPIO_EMC_36; +extern const mcu_pin_obj_t pin_GPIO_EMC_37; +extern const mcu_pin_obj_t pin_GPIO_EMC_38; +extern const mcu_pin_obj_t pin_GPIO_EMC_39; +extern const mcu_pin_obj_t pin_GPIO_EMC_40; +extern const mcu_pin_obj_t pin_GPIO_EMC_41; + +extern const mcu_pin_obj_t pin_GPIO_SD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_06; + +extern const mcu_pin_obj_t pin_GPIO_SD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_11; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c new file mode 100644 index 0000000000000..7b9af3a6a5145 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c @@ -0,0 +1,336 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */ + +const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = + { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Adc2); + CLOCK_DisableClock(kCLOCK_Xbar1); + CLOCK_DisableClock(kCLOCK_Xbar2); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Set ARM_PODF. */ + CLOCK_SetDiv(kCLOCK_ArmDiv, 1); + /* Set PERIPH_CLK2_PODF. */ + CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable USDHC1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc1); + /* Set USDHC1_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); + /* Set Usdhc1 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); + /* Disable USDHC2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc2); + /* Set USDHC2_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); + /* Set Usdhc2 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Disable Semc clock gate. */ + CLOCK_DisableClock(kCLOCK_Semc); + /* Set SEMC_PODF. */ + CLOCK_SetDiv(kCLOCK_SemcDiv, 7); + /* Set Semc alt clock source. */ + CLOCK_SetMux(kCLOCK_SemcAltMux, 0); + /* Set Semc clock source. */ + CLOCK_SetMux(kCLOCK_SemcMux, 0); +#endif + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + CLOCK_DisableClock(kCLOCK_Lpspi3); + CLOCK_DisableClock(kCLOCK_Lpspi4); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 4); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 2); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai2); + /* Set SAI2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3); + /* Set SAI2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai2Div, 1); + /* Set Sai2 clock source. */ + CLOCK_SetMux(kCLOCK_Sai2Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + CLOCK_DisableClock(kCLOCK_Lpi2c3); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable CAN clock gate. */ + CLOCK_DisableClock(kCLOCK_Can1); + CLOCK_DisableClock(kCLOCK_Can2); + CLOCK_DisableClock(kCLOCK_Can3); + CLOCK_DisableClock(kCLOCK_Can1S); + CLOCK_DisableClock(kCLOCK_Can2S); + CLOCK_DisableClock(kCLOCK_Can3S); + /* Set CAN_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_CanDiv, 1); + /* Set Can clock source. */ + CLOCK_SetMux(kCLOCK_CanMux, 2); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + CLOCK_DisableClock(kCLOCK_Lpuart5); + CLOCK_DisableClock(kCLOCK_Lpuart6); + CLOCK_DisableClock(kCLOCK_Lpuart7); + CLOCK_DisableClock(kCLOCK_Lpuart8); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Disable Flexio2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio2); + /* Set FLEXIO2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1); + /* Set FLEXIO2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio2Div, 7); + /* Set Flexio2 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio2Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init ARM PLL. */ + CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* DeInit Video PLL. */ + CLOCK_DeinitVideoPll(); + /* Bypass Video PLL. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK; + /* Set divider for Video PLL. */ + CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0); + /* Enable Video PLL output. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; + /* DeInit Enet PLL. */ + CLOCK_DeinitEnetPll(); + /* Bypass Enet PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1); + /* Set Enet output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1); + /* Enable Enet output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK; + /* Set Enet2 output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0); + /* Enable Enet2 output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK; + /* Enable Enet25M output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK; + /* DeInit Usb2 PLL. */ + CLOCK_DeinitUsb2Pll(); + /* Bypass Usb2 PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1); + /* Enable Usb2 PLL output. */ + CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK; + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set lvds1 clock source. */ + CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI2 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set ENET1 Tx clock source. */ + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); + /* Set ENET2 Tx clock source. */ +#if defined(FSL_IOMUXC_DRIVER_VERSION) && (FSL_IOMUXC_DRIVER_VERSION != (MAKE_VERSION(2, 0, 0))) + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, false); +#else + IOMUXC_EnableMode(IOMUXC_GPR, IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK, false); +#endif + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c new file mode 100644 index 0000000000000..9a1a4ab65c65f --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -0,0 +1,308 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS R COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_05), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B1_01), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_B0_05), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_21), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 2, &pin_GPIO_AD_B1_06), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_11), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B0_13), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_04), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B1_00), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_B0_04), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_22), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 2, &pin_GPIO_AD_B1_07), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_12), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; + +const mcu_periph_obj_t mcu_spi_sck_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_27), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B1_07), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_00), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_00), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 1, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 0, &pin_GPIO_B0_03), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 1, &pin_GPIO_B1_07), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_28), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_02), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_01), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 1, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 0, &pin_GPIO_B0_02), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 1, &pin_GPIO_B1_06), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_29), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_03), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_03), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_02), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 1, &pin_GPIO_AD_B1_13), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 0, &pin_GPIO_B0_01), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 1, &pin_GPIO_B1_05), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; + +const mcu_periph_obj_t mcu_uart_rx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_03), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_07), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_14), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RX_SELECT_INPUT, 2, &pin_GPIO_B0_09), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_01), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_20), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_B1_01), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_24), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_B1_13), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 2, &pin_GPIO_EMC_39), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_02), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_06), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TX_SELECT_INPUT, 2, &pin_GPIO_B0_08), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_00), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_19), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_B1_00), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_23), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_B1_12), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_25), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_02), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_31), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_10), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38), +}; + +const mcu_periph_obj_t mcu_uart_rts_list[9] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01), + + PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05), + PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_EMC_16), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_18), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_27), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_29), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_07), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_03), +}; + +const mcu_periph_obj_t mcu_uart_cts_list[9] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_14), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_28), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_30), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_06), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_02), +}; + +const mcu_pwm_obj_t mcu_pwm_list[67] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_SD_B0_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 4, &pin_GPIO_AD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_SD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_SD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 4, &pin_GPIO_AD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_SD_B0_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_SD_B0_05), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 4, &pin_GPIO_AD_B0_12), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_10), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_00), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_EMC_12), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_00), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_AD_B0_11), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_01), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_EMC_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_01), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 4, &pin_GPIO_AD_B0_13), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_06), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_B0_06), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_07), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_B0_07), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_08), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_B0_08), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_09), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_B0_09), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_B0_10), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_B0_11), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 0, &pin_GPIO_AD_B0_00), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_09), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_19), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_02), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_02), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 0, &pin_GPIO_AD_B0_01), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_03), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_03), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_29), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_30), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_31), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_32), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_33), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_34), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_21), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_22), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_00), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_01), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_09), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_02), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_03), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_B1_14), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_04), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_05), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_B1_15), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_17), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_18), + +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h new file mode 100644 index 0000000000000..45b92f2473a90 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[9]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[9]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[8]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[8]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[18]; +extern const mcu_periph_obj_t mcu_uart_tx_list[18]; +extern const mcu_periph_obj_t mcu_uart_rts_list[9]; +extern const mcu_periph_obj_t mcu_uart_cts_list[9]; + +extern const mcu_pwm_obj_t mcu_pwm_list[67]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c new file mode 100644 index 0000000000000..c622e759ae07d --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO4, 0, GPIO_EMC_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO4, 1, GPIO_EMC_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO4, 2, GPIO_EMC_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO4, 3, GPIO_EMC_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO4, 4, GPIO_EMC_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO4, 5, GPIO_EMC_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO4, 6, GPIO_EMC_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO4, 7, GPIO_EMC_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO4, 8, GPIO_EMC_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO4, 9, GPIO_EMC_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO4, 10, GPIO_EMC_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO4, 11, GPIO_EMC_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO4, 12, GPIO_EMC_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO4, 13, GPIO_EMC_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO4, 14, GPIO_EMC_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO4, 15, GPIO_EMC_15, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO4, 16, GPIO_EMC_16, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO4, 17, GPIO_EMC_17, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO4, 18, GPIO_EMC_18, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO4, 19, GPIO_EMC_19, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO4, 20, GPIO_EMC_20, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO4, 21, GPIO_EMC_21, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO4, 22, GPIO_EMC_22, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO4, 23, GPIO_EMC_23, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO4, 24, GPIO_EMC_24, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO4, 25, GPIO_EMC_25, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO4, 26, GPIO_EMC_26, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO4, 27, GPIO_EMC_27, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO4, 28, GPIO_EMC_28, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO4, 29, GPIO_EMC_29, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO4, 30, GPIO_EMC_30, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO4, 31, GPIO_EMC_31, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 18, GPIO_EMC_32, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 19, GPIO_EMC_33, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 20, GPIO_EMC_34, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 21, GPIO_EMC_35, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 22, GPIO_EMC_36, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 23, GPIO_EMC_37, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 24, GPIO_EMC_38, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 25, GPIO_EMC_39, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 26, GPIO_EMC_40, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 27, GPIO_EMC_41, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 4); + +const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC1, 14); +const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC1, 15); +const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 1); +const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 2); +const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 4); + +const mcu_pin_obj_t pin_GPIO_B0_00 = PIN(GPIO2, 0, GPIO_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_01 = PIN(GPIO2, 1, GPIO_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_02 = PIN(GPIO2, 2, GPIO_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_03 = PIN(GPIO2, 3, GPIO_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_04 = PIN(GPIO2, 4, GPIO_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_05 = PIN(GPIO2, 5, GPIO_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_06 = PIN(GPIO2, 6, GPIO_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_07 = PIN(GPIO2, 7, GPIO_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_08 = PIN(GPIO2, 8, GPIO_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_09 = PIN(GPIO2, 9, GPIO_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_10 = PIN(GPIO2, 10, GPIO_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_11 = PIN(GPIO2, 11, GPIO_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_12 = PIN(GPIO2, 12, GPIO_B0_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_13 = PIN(GPIO2, 13, GPIO_B0_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_14 = PIN(GPIO2, 14, GPIO_B0_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_15 = PIN(GPIO2, 15, GPIO_B0_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_B1_00 = PIN(GPIO2, 16, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_01 = PIN(GPIO2, 17, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_02 = PIN(GPIO2, 18, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_03 = PIN(GPIO2, 19, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_04 = PIN(GPIO2, 20, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_05 = PIN(GPIO2, 21, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_06 = PIN(GPIO2, 22, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_07 = PIN(GPIO2, 23, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_08 = PIN(GPIO2, 24, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_09 = PIN(GPIO2, 25, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_10 = PIN(GPIO2, 26, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_11 = PIN(GPIO2, 27, GPIO_B1_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_12 = PIN(GPIO2, 28, GPIO_B1_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_13 = PIN(GPIO2, 29, GPIO_B1_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_14 = PIN(GPIO2, 30, GPIO_B1_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_15 = PIN(GPIO2, 31, GPIO_B1_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 12, GPIO_SD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 13, GPIO_SD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 14, GPIO_SD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 15, GPIO_SD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 16, GPIO_SD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 17, GPIO_SD_B0_05, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 0, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 1, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 2, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 3, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 4, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 5, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 6, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 7, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 8, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 9, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 10, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 11, GPIO_B1_11, NO_ADC, 0); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h new file mode 100644 index 0000000000000..1e692245955dc --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h @@ -0,0 +1,161 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_EMC_00; +extern const mcu_pin_obj_t pin_GPIO_EMC_01; +extern const mcu_pin_obj_t pin_GPIO_EMC_02; +extern const mcu_pin_obj_t pin_GPIO_EMC_03; +extern const mcu_pin_obj_t pin_GPIO_EMC_04; +extern const mcu_pin_obj_t pin_GPIO_EMC_05; +extern const mcu_pin_obj_t pin_GPIO_EMC_06; +extern const mcu_pin_obj_t pin_GPIO_EMC_07; +extern const mcu_pin_obj_t pin_GPIO_EMC_08; +extern const mcu_pin_obj_t pin_GPIO_EMC_09; +extern const mcu_pin_obj_t pin_GPIO_EMC_10; +extern const mcu_pin_obj_t pin_GPIO_EMC_11; +extern const mcu_pin_obj_t pin_GPIO_EMC_12; +extern const mcu_pin_obj_t pin_GPIO_EMC_13; +extern const mcu_pin_obj_t pin_GPIO_EMC_14; +extern const mcu_pin_obj_t pin_GPIO_EMC_15; +extern const mcu_pin_obj_t pin_GPIO_EMC_16; +extern const mcu_pin_obj_t pin_GPIO_EMC_17; +extern const mcu_pin_obj_t pin_GPIO_EMC_18; +extern const mcu_pin_obj_t pin_GPIO_EMC_19; +extern const mcu_pin_obj_t pin_GPIO_EMC_20; +extern const mcu_pin_obj_t pin_GPIO_EMC_21; +extern const mcu_pin_obj_t pin_GPIO_EMC_22; +extern const mcu_pin_obj_t pin_GPIO_EMC_23; +extern const mcu_pin_obj_t pin_GPIO_EMC_24; +extern const mcu_pin_obj_t pin_GPIO_EMC_25; +extern const mcu_pin_obj_t pin_GPIO_EMC_26; +extern const mcu_pin_obj_t pin_GPIO_EMC_27; +extern const mcu_pin_obj_t pin_GPIO_EMC_28; +extern const mcu_pin_obj_t pin_GPIO_EMC_29; +extern const mcu_pin_obj_t pin_GPIO_EMC_30; +extern const mcu_pin_obj_t pin_GPIO_EMC_31; +extern const mcu_pin_obj_t pin_GPIO_EMC_32; +extern const mcu_pin_obj_t pin_GPIO_EMC_33; +extern const mcu_pin_obj_t pin_GPIO_EMC_34; +extern const mcu_pin_obj_t pin_GPIO_EMC_35; +extern const mcu_pin_obj_t pin_GPIO_EMC_36; +extern const mcu_pin_obj_t pin_GPIO_EMC_37; +extern const mcu_pin_obj_t pin_GPIO_EMC_38; +extern const mcu_pin_obj_t pin_GPIO_EMC_39; +extern const mcu_pin_obj_t pin_GPIO_EMC_40; +extern const mcu_pin_obj_t pin_GPIO_EMC_41; + +extern const mcu_pin_obj_t pin_GPIO_AD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_AD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_B0_00; +extern const mcu_pin_obj_t pin_GPIO_B0_01; +extern const mcu_pin_obj_t pin_GPIO_B0_02; +extern const mcu_pin_obj_t pin_GPIO_B0_03; +extern const mcu_pin_obj_t pin_GPIO_B0_04; +extern const mcu_pin_obj_t pin_GPIO_B0_05; +extern const mcu_pin_obj_t pin_GPIO_B0_06; +extern const mcu_pin_obj_t pin_GPIO_B0_07; +extern const mcu_pin_obj_t pin_GPIO_B0_08; +extern const mcu_pin_obj_t pin_GPIO_B0_09; +extern const mcu_pin_obj_t pin_GPIO_B0_10; +extern const mcu_pin_obj_t pin_GPIO_B0_11; +extern const mcu_pin_obj_t pin_GPIO_B0_12; +extern const mcu_pin_obj_t pin_GPIO_B0_13; +extern const mcu_pin_obj_t pin_GPIO_B0_14; +extern const mcu_pin_obj_t pin_GPIO_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_B1_00; +extern const mcu_pin_obj_t pin_GPIO_B1_01; +extern const mcu_pin_obj_t pin_GPIO_B1_02; +extern const mcu_pin_obj_t pin_GPIO_B1_03; +extern const mcu_pin_obj_t pin_GPIO_B1_04; +extern const mcu_pin_obj_t pin_GPIO_B1_05; +extern const mcu_pin_obj_t pin_GPIO_B1_06; +extern const mcu_pin_obj_t pin_GPIO_B1_07; +extern const mcu_pin_obj_t pin_GPIO_B1_08; +extern const mcu_pin_obj_t pin_GPIO_B1_09; +extern const mcu_pin_obj_t pin_GPIO_B1_10; +extern const mcu_pin_obj_t pin_GPIO_B1_11; +extern const mcu_pin_obj_t pin_GPIO_B1_12; +extern const mcu_pin_obj_t pin_GPIO_B1_13; +extern const mcu_pin_obj_t pin_GPIO_B1_14; +extern const mcu_pin_obj_t pin_GPIO_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_SD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_05; + +extern const mcu_pin_obj_t pin_GPIO_SD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_11; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h new file mode 100644 index 0000000000000..ccbba2edd4943 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h @@ -0,0 +1,29 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +extern uint32_t SystemCoreClock; + +void clocks_init(void); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h new file mode 100644 index 0000000000000..9b9713bb4d5d5 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -0,0 +1,79 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H + +#include "pins.h" + +typedef struct { + uint8_t bank_idx:4; + uint8_t mux_mode:4; + uint32_t input_reg; + uint8_t input_idx; + const mcu_pin_obj_t *pin; +} mcu_periph_obj_t; + +#define PERIPH_PIN(p_bank_idx, p_mux_mode, p_input_reg, p_input_idx, p_pin) \ +{ \ + .bank_idx = p_bank_idx, \ + .mux_mode = p_mux_mode, \ + .input_reg = p_input_reg == 0 ? 0 : (uint32_t)&(IOMUXC->SELECT_INPUT[p_input_reg]), \ + .input_idx = p_input_idx, \ + .pin = p_pin, \ +} + +typedef struct { + PWM_Type *pwm; + pwm_submodule_t submodule:4; + pwm_channels_t channel:4; + uint8_t mux_mode; + const mcu_pin_obj_t *pin; +} mcu_pwm_obj_t; + +#define PWM_PIN(p_pwm, p_submodule, p_channel, p_mux_mode, p_pin) \ +{ \ + .pwm = p_pwm, \ + .submodule = p_submodule, \ + .channel = p_channel, \ + .mux_mode = p_mux_mode, \ + .pin = p_pin, \ +} + +extern LPI2C_Type *mcu_i2c_banks[]; +extern LPSPI_Type *mcu_spi_banks[]; +extern LPUART_Type *mcu_uart_banks[]; + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/periph.h" +#elif defined(MIMXRT1021_SERIES) +#include "MIMXRT1021/periph.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/periph.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h new file mode 100644 index 0000000000000..404a411e18e6d --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h @@ -0,0 +1,77 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H + +#include +#include + +#include "fsl_iomuxc.h" +#include "fsl_pwm.h" +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +// Use illegal pin value to mark unassigned pins. +#define NO_PIN 0xff +#define NO_ADC NULL +#define NO_PWM NULL + +typedef struct { + mp_obj_base_t base; + GPIO_Type *gpio; + uint8_t number; + uint32_t mux_reg; + uint32_t cfg_reg; + ADC_Type *adc; + uint8_t adc_channel; +} mcu_pin_obj_t; + +#define PIN(p_gpio, p_number, p_enum, p_adc, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .gpio = p_gpio, \ + .number = p_number, \ + .mux_reg = (uint32_t)&(IOMUXC->SW_MUX_CTL_PAD[kIOMUXC_SW_MUX_CTL_PAD_ ## p_enum]), \ + .cfg_reg = (uint32_t)&(IOMUXC->SW_PAD_CTL_PAD[kIOMUXC_SW_PAD_CTL_PAD_ ## p_enum]), \ + .adc = p_adc, \ + .adc_channel = p_adc_channel, \ +} + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/pins.h" +#elif defined(MIMXRT1021_SERIES) +#include "MIMXRT1021/pins.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/pins.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H diff --git a/ports/pic16bit/qstrdefsport.h b/ports/mimxrt10xx/qstrdefsport.h similarity index 100% rename from ports/pic16bit/qstrdefsport.h rename to ports/mimxrt10xx/qstrdefsport.h diff --git a/ports/mimxrt10xx/reset.c b/ports/mimxrt10xx/reset.c new file mode 100644 index 0000000000000..a3a4f667deaa2 --- /dev/null +++ b/ports/mimxrt10xx/reset.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "reset.h" +#include "supervisor/filesystem.h" + +#include "fsl_common.h" + +void reset(void) { + filesystem_flush(); + NVIC_SystemReset(); +} + +bool bootloader_available(void) { + return SNVS->LPGPR[0] >= 0; +} diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h new file mode 100644 index 0000000000000..dc3106cf079d4 --- /dev/null +++ b/ports/mimxrt10xx/reset.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_RESET_H +#define MICROPY_INCLUDED_MIMXRT10XX_RESET_H + +#include +#include + +// Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 +#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set +#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef + +void reset_to_bootloader(void); +void reset(void); +bool bootloader_available(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H diff --git a/ports/mimxrt10xx/sdk b/ports/mimxrt10xx/sdk new file mode 160000 index 0000000000000..4e7438e654f4a --- /dev/null +++ b/ports/mimxrt10xx/sdk @@ -0,0 +1 @@ +Subproject commit 4e7438e654f4a6b4f386b4bb9e817d74a0fbffc7 diff --git a/ports/mimxrt10xx/supervisor/cpu.S b/ports/mimxrt10xx/supervisor/cpu.S new file mode 100755 index 0000000000000..9e6807a5e2e99 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/cpu.S @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c new file mode 100644 index 0000000000000..28d5115ac704d --- /dev/null +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -0,0 +1,342 @@ +/* + * Copyright (c) 2016, Freescale Semiconductor, Inc. + * Copyright 2016-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi.h" +#include "internal_flash.h" + +#define FLASH_QUAD_ENABLE 0x02 +#define FLASH_BUSY_STATUS_POL 1 +#define FLASH_BUSY_STATUS_OFFSET 0 + +static inline void flexspi_clock_init(void) +{ + /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */ +} + +extern flexspi_device_config_t deviceconfig; +extern const uint32_t customLUT[CUSTOM_LUT_LENGTH]; + +status_t flexspi_nor_write_enable(FLEXSPI_Type *base, uint32_t baseAddr) +{ + flexspi_transfer_t flashXfer; + status_t status; + + /* Write enable */ + flashXfer.deviceAddress = baseAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + return status; +} + +status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) +{ + /* Wait status ready. */ + bool isBusy; + uint32_t readValue; + status_t status; + flexspi_transfer_t flashXfer; + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READSTATUSREG; + flashXfer.data = &readValue; + flashXfer.dataSize = 1; + + do + { + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + if (FLASH_BUSY_STATUS_POL) + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = true; + } + else + { + isBusy = false; + } + } + else + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = false; + } + else + { + isBusy = true; + } + } + + } while (isBusy); + + return status; +} + +status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) +{ + flexspi_transfer_t flashXfer; + status_t status; + uint32_t writeValue = FLASH_QUAD_ENABLE; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + /* Enable quad mode. */ + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG; + flashXfer.data = &writeValue; + flashXfer.dataSize = 1; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src, uint32_t length) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = length; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = FLASH_PAGE_SIZE; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) +{ + uint32_t temp; + flexspi_transfer_t flashXfer; + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READID; + flashXfer.data = &temp; + flashXfer.dataSize = 1; + + status_t status = FLEXSPI_TransferBlocking(base, &flashXfer); + + *vendorId = temp; + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_erase_chip(FLEXSPI_Type *base) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASECHIP; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + return status; +} + +void flexspi_nor_flash_init(FLEXSPI_Type *base) +{ + flexspi_config_t config; + + flexspi_clock_init(); + + /*Get FLEXSPI default settings and configure the flexspi. */ + FLEXSPI_GetDefaultConfig(&config); + + /*Set AHB buffer size for reading data through AHB bus. */ + config.ahbConfig.enableAHBPrefetch = true; + config.ahbConfig.enableAHBBufferable = true; + config.ahbConfig.enableReadAddressOpt = true; + config.ahbConfig.enableAHBCachable = true; +#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; +#else + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; +#endif + FLEXSPI_Init(base, &config); + + /* Configure flash settings according to serial flash feature. */ + FLEXSPI_SetFlashConfig(base, &deviceconfig, kFLEXSPI_PortA1); + + /* Update LUT table. */ + FLEXSPI_UpdateLUT(base, 0, customLUT, CUSTOM_LUT_LENGTH); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); +} diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c new file mode 100644 index 0000000000000..7e9d8fa377070 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -0,0 +1,257 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/flash.h" + +#include +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#include "fsl_cache.h" +#include "fsl_flexspi.h" +#include "fsl_iomuxc.h" + +// defined in linker +extern uint32_t __fatfs_flash_start_addr[]; +extern uint32_t __fatfs_flash_length[]; + +#define NO_CACHE 0xffffffff +#define SECTOR_SIZE 0x1000 /* 4K */ + +uint8_t _flash_cache[SECTOR_SIZE] __attribute__((aligned(4))); +uint32_t _flash_page_addr = NO_CACHE; +static bool init_done = false; + +flexspi_device_config_t deviceconfig = { + .flexspiRootClk = 133000000, + .flashSize = (BOARD_FLASH_SIZE / 1024), + .CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, + .CSInterval = 2, + .CSHoldTime = 3, + .CSSetupTime = 3, + .dataValidTime = 0, + .columnspace = 0, + .enableWordAddress = 0, + .AWRSeqIndex = 0, + .AWRSeqNumber = 0, + .ARDSeqIndex = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD, + .ARDSeqNumber = 1, + .AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle, + .AHBWriteWaitInterval = 0, +}; + +const uint32_t customLUT[CUSTOM_LUT_LENGTH] = { + /* Normal read mode -SDR */ + /* Normal read mode -SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Fast read mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Fast read quad mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04), + + /* Read extend parameters */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Write Enable */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Erase Sector */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + + /* Page Program - single mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Page Program - quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Read ID */ + [4 * NOR_CMD_LUT_SEQ_IDX_READID] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Enable Quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04), + + /* Read status register */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Erase whole chip */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), +}; + +extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address); +extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src); +extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId); +extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base); +extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base); +extern void flexspi_nor_flash_init(FLEXSPI_Type *base); + +void supervisor_flash_init(void) { + if (init_done) + return; + + SCB_DisableDCache(); + + status_t status; + uint8_t vendorID = 0; + + flexspi_nor_flash_init(FLEXSPI); + + /* Get vendor ID. */ + status = flexspi_nor_get_vendor_id(FLEXSPI, &vendorID); + if (status != kStatus_Success) { + printf("flexspi_nor_get_vendor_id fail %ld\r\n", status); + return; + } + + /* Enter quad mode. */ + __disable_irq(); + status = flexspi_nor_enable_quad_mode(FLEXSPI); + if (status != kStatus_Success) + { + printf("flexspi_nor_enable_quad_mode fail %ld\r\n", status); + return; + } + __enable_irq(); + + SCB_EnableDCache(); + + init_done = true; +} + +static inline uint32_t lba2addr(uint32_t block) { + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE; +} + +void supervisor_flash_flush(void) { + if (_flash_page_addr == NO_CACHE) return; + status_t status; + + // Skip if data is the same + if (memcmp(_flash_cache, (void *)_flash_page_addr, SECTOR_SIZE) != 0) { + volatile uint32_t sector_addr = (_flash_page_addr - FlexSPI_AMBA_BASE); + + __disable_irq(); + status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr); + __enable_irq(); + if (status != kStatus_Success) { + printf("Page erase failure %ld!\r\n", status); + return; + } + + for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) { + __disable_irq(); + status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE); + __enable_irq(); + if (status != kStatus_Success) { + printf("Page program failure %ld!\r\n", status); + return; + } + } + + DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE); + } +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Must write out anything in cache before trying to read. + supervisor_flash_flush(); + + uint32_t src = lba2addr(block); + memcpy(dest, (uint8_t*)src, FILESYSTEM_BLOCK_SIZE * num_blocks); + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + while (num_blocks) { + uint32_t const addr = lba2addr(lba); + uint32_t const page_addr = addr & ~(SECTOR_SIZE - 1); + + uint32_t count = 8 - (lba % 8); // up to page boundary + count = MIN(num_blocks, count); + + if (page_addr != _flash_page_addr) { + // Write out anything in cache before overwriting it. + supervisor_flash_flush(); + + _flash_page_addr = page_addr; + + // Copy the current contents of the entire page into the cache. + memcpy(_flash_cache, (void *)page_addr, SECTOR_SIZE); + } + + // Overwrite part or all of the page cache with the src data. + memcpy(_flash_cache + (addr & (SECTOR_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE); + + // adjust for next run + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/ports/mimxrt10xx/supervisor/internal_flash.h b/ports/mimxrt10xx/supervisor/internal_flash.h new file mode 100644 index 0000000000000..dfbfe1d4b4e44 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#define CUSTOM_LUT_LENGTH 60 +#define FLASH_PAGE_SIZE 256 + +#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL 7 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST 13 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD 0 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1 +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 3 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE 6 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 4 +#define NOR_CMD_LUT_SEQ_IDX_READID 8 +#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 9 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG 12 +#define NOR_CMD_LUT_SEQ_IDX_ERASECHIP 5 + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H diff --git a/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..c8173175eb322 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c new file mode 100644 index 0000000000000..b311e89206511 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/port.c @@ -0,0 +1,387 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2018 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "boards/board.h" +#include "supervisor/port.h" + +#include "fsl_device_registers.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/rtc/RTC.h" + +#include "reset.h" +#include "tick.h" + +#include "tusb.h" + +#if CIRCUITPY_GAMEPAD +#include "shared-module/gamepad/__init__.h" +#endif +#if CIRCUITPY_GAMEPADSHIFT +#include "shared-module/gamepadshift/__init__.h" +#endif +#include "shared-module/_pew/PewPew.h" + +#include "clocks.h" + +#include "fsl_gpio.h" +#include "fsl_lpuart.h" + +// Device memories must be accessed in order. +#define DEVICE 2 +// Normal memory can have accesses reorder and prefetched. +#define NORMAL 0 + +// Prevents instruction access. +#define NO_EXECUTION 1 +#define EXECUTION 0 + +// Shareable if the memory system manages coherency. +#define NOT_SHAREABLE 0 +#define SHAREABLE 1 + +// +#define NOT_CACHEABLE 0 +#define CACHEABLE 1 + +#define NOT_BUFFERABLE 0 +#define BUFFERABLE 1 + +#define NO_SUBREGIONS 0 + +extern uint32_t _ld_flash_size; +extern uint32_t _ld_stack_top; + +extern uint32_t __isr_vector[]; + +extern uint32_t _ld_ocram_bss_start; +extern uint32_t _ld_ocram_bss_size; +extern uint32_t _ld_ocram_data_destination; +extern uint32_t _ld_ocram_data_size; +extern uint32_t _ld_ocram_data_flash_copy; +extern uint32_t _ld_dtcm_bss_start; +extern uint32_t _ld_dtcm_bss_size; +extern uint32_t _ld_dtcm_data_destination; +extern uint32_t _ld_dtcm_data_size; +extern uint32_t _ld_dtcm_data_flash_copy; +extern uint32_t _ld_itcm_destination; +extern uint32_t _ld_itcm_size; +extern uint32_t _ld_itcm_flash_copy; + +extern void main(void); + +// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c. +__attribute__((used, naked)) void Reset_Handler(void) { + __disable_irq(); + SCB->VTOR = (uint32_t) &__isr_vector; + __set_MSP((uint32_t) &_ld_stack_top); + + /* Disable I cache and D cache */ + SCB_DisableICache(); + SCB_DisableDCache(); + + // Changing the FlexRAM must happen here where the stack is empty. If it is in a function call, + // then the return will jump to an invalid address. + // Configure FlexRAM. The e is one block of ITCM (0b11) and DTCM (0b10). The rest is two OCRAM + // (0b01). We shift in zeroes for all unimplemented banks. + IOMUXC_GPR->GPR17 = (0xe5555555) >> (32 - 2 * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS); + + // Switch from FlexRAM fuse config to the IOMUXC values. + IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(1); + + // Let the core know the TCM sizes changed. + uint32_t current_gpr14 = IOMUXC_GPR->GPR14; + current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK; + current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(0x6); + current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK; + current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(0x6); + IOMUXC_GPR->GPR14 = current_gpr14; + + #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) + SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access */ + #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */ + + /* Disable Watchdog Power Down Counter */ + WDOG1->WMCR &= ~WDOG_WMCR_PDE_MASK; + WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK; + + /* Watchdog disable */ + WDOG1->WCR &= ~WDOG_WCR_WDE_MASK; + WDOG2->WCR &= ~WDOG_WCR_WDE_MASK; + RTWDOG->CNT = 0xD928C520U; /* 0xD928C520U is the update key */ + RTWDOG->TOVAL = 0xFFFF; + RTWDOG->CS = (uint32_t) ((RTWDOG->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK; + + /* Disable Systick which might be enabled by bootrom */ + if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) + { + SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; + } + + /* Disable MPU */ + ARM_MPU_Disable(); + + // Copy all of the code to run from ITCM. Do this while the MPU is disabled because we write + // protect it. + for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) { + (&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i]; + } + + // The first number in RBAR is the region number. When searching for a policy, the region with + // the highest number wins. If none match, then the default policy set at enable applies. + + // This is an undocumented region and is likely more registers. + MPU->RBAR = ARM_MPU_RBAR(8, 0xC0000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512MB); + + // This is the SEMC region where external RAM and 8+ flash would live. Disable for now, even though the EVKs have stuff here. + MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U); + MPU->RASR = ARM_MPU_RASR(NO_EXECUTION, ARM_MPU_AP_NONE, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1GB); + + // FlexSPI2 is 0x70000000 + + // This the first 1MB of flash is the bootloader and CircuitPython read-only data. + MPU->RBAR = ARM_MPU_RBAR(10, 0x60000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1MB); + + // The remainder of flash is the fat filesystem which could have code on it too. Make sure that + // we set the region to the minimal size so that bad data doesn't get speculatively fetched. + // Thanks to Damien for the tip! + uint32_t region_size = ARM_MPU_REGION_SIZE_32B; + uint32_t filesystem_size = &_ld_filesystem_end - &_ld_filesystem_start; + while (filesystem_size > (1u << (region_size + 1))) { + region_size += 1; + } + // Mask out as much of the remainder as we can. For example on an 8MB flash, 7MB are for the + // filesystem. The region_size here must be a power of 2 so it is 8MB. Using the subregion mask + // we can ignore 1/8th size chunks. So, we ignore the last 1MB using the subregion. + uint32_t remainder = (1u << (region_size + 1)) - filesystem_size; + uint32_t subregion_size = (1u << (region_size + 1)) / 8; + uint8_t subregion_mask = (0xff00 >> (remainder / subregion_size)) & 0xff; + + MPU->RBAR = ARM_MPU_RBAR(11, 0x60100000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, subregion_mask, region_size); + + // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to + // accidentally write the wrong value to 0x00000000 (aka NULL). + MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB); + + // This the DTCM. + MPU->RBAR = ARM_MPU_RBAR(13, 0x20000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB); + + // This is OCRAM. + MPU->RBAR = ARM_MPU_RBAR(14, 0x20200000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB); + + // We steal 64k from FlexRAM for ITCM and DTCM so disable those memory regions here. + MPU->RBAR = ARM_MPU_RBAR(15, 0x20280000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, 0x80, ARM_MPU_REGION_SIZE_512KB); + + /* Enable MPU */ + ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); + + /* We're done mucking with memory so enable I cache and D cache */ + SCB_EnableDCache(); + SCB_EnableICache(); + + // Copy all of the data to run from DTCM. + for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) { + (&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i]; + } + + // Clear DTCM bss. + for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) { + (&_ld_dtcm_bss_start)[i] = 0; + } + + // Copy all of the data to run from OCRAM. + for (uint32_t i = 0; i < ((size_t) &_ld_ocram_data_size) / 4; i++) { + (&_ld_ocram_data_destination)[i] = (&_ld_ocram_data_flash_copy)[i]; + } + + // Clear OCRAM bss. + for (uint32_t i = 0; i < ((size_t) &_ld_ocram_bss_size) / 4; i++) { + (&_ld_ocram_bss_start)[i] = 0; + } + + __enable_irq(); + main(); +} + +safe_mode_t port_init(void) { + clocks_init(); + + // Configure millisecond timer initialization. + tick_init(); + +#if CIRCUITPY_RTC + rtc_init(); +#endif + + // Reset everything into a known state before board_init. + reset_port(); + + if (board_requests_safe_mode()) { + return USER_SAFE_MODE; + } + + return NO_SAFE_MODE; +} + +void reset_port(void) { + //reset_sercoms(); + +#if CIRCUITPY_AUDIOIO + audio_dma_reset(); + audioout_reset(); +#endif +#if CIRCUITPY_AUDIOBUSIO + i2sout_reset(); + //pdmin_reset(); +#endif + +#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE + touchin_reset(); +#endif + +// eic_reset(); + +#if CIRCUITPY_PULSEIO + pulseout_reset(); + pwmout_reset(); +#endif + +#if CIRCUITPY_RTC + rtc_reset(); +#endif + +#if CIRCUITPY_GAMEPAD + gamepad_reset(); +#endif +#if CIRCUITPY_GAMEPADSHIFT + gamepadshift_reset(); +#endif +#if CIRCUITPY_PEW + pew_reset(); +#endif + + //reset_event_system(); + + reset_all_pins(); +} + +void reset_to_bootloader(void) { + SNVS->LPGPR[0] = DBL_TAP_MAGIC; + reset(); +} + +void reset_cpu(void) { + reset(); +} + +extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom; +uint32_t *port_stack_get_limit(void) { + return &_ld_heap_start; +} + +uint32_t *port_stack_get_top(void) { + return &_ld_stack_top; +} + +uint32_t *port_heap_get_bottom(void) { + return &_ld_heap_start; +} + +// Get heap top address +uint32_t *port_heap_get_top(void) { + return &_ld_heap_end; +} + +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + SNVS->LPGPR[1] = value; +} + +uint32_t port_get_saved_word(void) { + return SNVS->LPGPR[1]; +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void MemManage_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void BusFault_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void UsageFault_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void HardFault_Handler(void) +{ + reset_into_safe_mode(HARD_CRASH); + while (true) { + asm("nop;"); + } +} + diff --git a/ports/mimxrt10xx/supervisor/serial.c b/ports/mimxrt10xx/supervisor/serial.c new file mode 100644 index 0000000000000..22c979cf9a021 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/serial.c @@ -0,0 +1,93 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include +#include "supervisor/serial.h" + +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +// static LPUART_Type *uart_instance = LPUART1; // evk +static LPUART_Type *uart_instance = LPUART4; // feather 1011 +//static LPUART_Type *uart_instance = LPUART2; // feather 1062 + +static uint32_t UartSrcFreq(void) { + uint32_t freq; + + /* To make it simple, we assume default PLL and divider settings, and the only variable + from application is use PLL3 source or OSC source */ + /* PLL3 div6 80M */ + if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { + freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } else { + freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } + + return freq; +} + +void serial_init(void) { + lpuart_config_t config; + + LPUART_GetDefaultConfig(&config); + config.baudRate_Bps = 115200; + config.enableTx = true; + config.enableRx = true; + + LPUART_Init(uart_instance, &config, UartSrcFreq()); +} + +bool serial_connected(void) { + return true; +} + +char serial_read(void) { + uint8_t data; + + LPUART_ReadBlocking(uart_instance, &data, sizeof(data)); + + return data; +} + +bool serial_bytes_available(void) { + return LPUART_GetStatusFlags(uart_instance) & kLPUART_RxDataRegFullFlag; +} + +void serial_write(const char* text) { + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, strlen(text)); +} + +void serial_write_substring(const char *text, uint32_t len) { + if (len == 0) { + return; + } + + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, len); +} + diff --git a/ports/mimxrt10xx/supervisor/usb.c b/ports/mimxrt10xx/supervisor/usb.c new file mode 100644 index 0000000000000..051fcca9dedfe --- /dev/null +++ b/ports/mimxrt10xx/supervisor/usb.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "fsl_clock.h" +#include "tusb.h" + +void init_usb_hardware(void) { + CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); + CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + +#ifdef USBPHY + USBPHY_Type *usb_phy = USBPHY; +#else + USBPHY_Type *usb_phy = USBPHY1; +#endif + + // Enable PHY support for Low speed device + LS via FS Hub + usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + usb_phy->PWD = 0; + + // TX Timing + uint32_t phytx = usb_phy->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + usb_phy->TX = phytx; + + // Temporarily disable the data cache until we can sort out all of the spots in TinyUSB that + // need the cache invalidated or cleaned. + SCB_DisableDCache(); +} + +void USB_OTG1_IRQHandler(void) { + tud_isr(0); +} diff --git a/ports/mimxrt10xx/tick.c b/ports/mimxrt10xx/tick.c new file mode 100644 index 0000000000000..c19ce796edf1d --- /dev/null +++ b/ports/mimxrt10xx/tick.c @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" + +#include "fsl_common.h" + +#include "supervisor/shared/tick.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Processor.h" + +void SysTick_Handler(void) { + // SysTick interrupt handler called when the SysTick timer reaches zero + // (every millisecond). + common_hal_mcu_disable_interrupts(); + + // Read the control register to reset the COUNTFLAG. + (void) SysTick->CTRL; + + common_hal_mcu_enable_interrupts(); + + // Do things common to all ports when the tick occurs + supervisor_tick(); +} + +void tick_init() { + uint32_t ticks_per_ms = common_hal_mcu_processor_get_frequency() / 1000; + SysTick_Config(ticks_per_ms-1); +} + +void tick_delay(uint32_t us) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + uint32_t us_until_next_tick = SysTick->VAL / ticks_per_us; + uint32_t start_tick; + while (us >= us_until_next_tick) { + start_tick = SysTick->VAL; // wait for SysTick->VAL to RESET + while (SysTick->VAL < start_tick) {} + us -= us_until_next_tick; + us_until_next_tick = 1000; + } + while (SysTick->VAL > ((us_until_next_tick - us) * ticks_per_us)) {} +} + +// us counts down! +void current_tick(uint64_t* ms, uint32_t* us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + + // We disable interrupts to prevent ticks_ms from changing while we grab it. + common_hal_mcu_disable_interrupts(); + uint32_t tick_status = SysTick->CTRL; + uint32_t current_us = SysTick->VAL; + uint32_t tick_status2 = SysTick->CTRL; + uint64_t current_ms = supervisor_ticks_ms64(); + // The second clause ensures our value actually rolled over. Its possible it hit zero between + // the VAL read and CTRL read. + if ((tick_status & SysTick_CTRL_COUNTFLAG_Msk) != 0 || + ((tick_status2 & SysTick_CTRL_COUNTFLAG_Msk) != 0 && current_us > ticks_per_us)) { + current_ms++; + } + common_hal_mcu_enable_interrupts(); + *ms = current_ms; + *us_until_ms = current_us / ticks_per_us; +} + +void wait_until(uint64_t ms, uint32_t us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + while (supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} +} diff --git a/ports/mimxrt10xx/tick.h b/ports/mimxrt10xx/tick.h new file mode 100644 index 0000000000000..6660d5b4aedab --- /dev/null +++ b/ports/mimxrt10xx/tick.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_TICK_H +#define MICROPY_INCLUDED_MIMXRT10XX_TICK_H + +#include "py/mpconfig.h" + +extern struct timer_descriptor ms_timer; + +void tick_init(void); + +void tick_delay(uint32_t us); + +void current_tick(uint64_t* ms, uint32_t* us_until_ms); +// Do not call this with interrupts disabled because it may be waiting for +// ticks_ms to increment. +void wait_until(uint64_t ms, uint32_t us_until_ms); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_TICK_H diff --git a/ports/minimal/Makefile b/ports/minimal/Makefile deleted file mode 100644 index ae295d655ee46..0000000000000 --- a/ports/minimal/Makefile +++ /dev/null @@ -1,90 +0,0 @@ -include ../../py/mkenv.mk - -CROSS = 0 - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -ifeq ($(CROSS), 1) -CROSS_COMPILE = arm-none-eabi- -endif - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -ifeq ($(CROSS), 1) -DFU = $(TOP)/tools/dfu.py -PYDFU = $(TOP)/tools/pydfu.py -CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs-linux -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion -CFLAGS = $(INC) -Wall -Werror -std=c99 -nostdlib $(CFLAGS_CORTEX_M4) $(COPT) -LDFLAGS = -nostdlib -T stm32f405.ld -Map=$@.map --cref --gc-sections -else -LD = gcc -CFLAGS = -m32 $(INC) -Wall -Werror -std=c99 $(COPT) -LDFLAGS = -m32 -Wl,-Map=$@.map,--cref -Wl,--gc-sections -endif - -# Tune for Debugging or Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -Os -DNDEBUG -CFLAGS += -fdata-sections -ffunction-sections -endif - -LIBS = - -SRC_C = \ - main.c \ - uart_core.c \ - lib/utils/stdout_helpers.c \ - lib/utils/pyexec.c \ - lib/libc/string0.c \ - lib/mp-readline/readline.c \ - $(BUILD)/_frozen_mpy.c \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -ifeq ($(CROSS), 1) -all: $(BUILD)/firmware.dfu -else -all: $(BUILD)/firmware.elf -endif - -$(BUILD)/_frozen_mpy.c: frozentest.mpy $(BUILD)/genhdr/qstrdefs.generated.h - $(ECHO) "MISC freezing bytecode" - $(Q)$(TOP)/tools/mpy-tool.py -f -q $(BUILD)/genhdr/qstrdefs.preprocessed.h -mlongint-impl=none $< > $@ - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -$(BUILD)/firmware.bin: $(BUILD)/firmware.elf - $(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.bin - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(DFU) -b 0x08000000:$(BUILD)/firmware.bin $@ - -deploy: $(BUILD)/firmware.dfu - $(ECHO) "Writing $< to the board" - $(Q)$(PYTHON) $(PYDFU) -u $< - -# Run emulation build on a POSIX system with suitable terminal settings -run: - stty raw opost -echo - build/firmware.elf - @echo Resetting terminal... -# This sleep is useful to spot segfaults - sleep 1 - reset - -test: $(BUILD)/firmware.elf - $(Q)/bin/echo -e "print('hello world!', list(x+1 for x in range(10)), end='eol\\\\n')\\r\\n\\x04" | $(BUILD)/firmware.elf | tail -n2 | grep "^hello world! \\[1, 2, 3, 4, 5, 6, 7, 8, 9, 10\\]eol" - -include $(TOP)/py/mkrules.mk diff --git a/ports/minimal/README.md b/ports/minimal/README.md deleted file mode 100644 index 14b8c00a3018d..0000000000000 --- a/ports/minimal/README.md +++ /dev/null @@ -1,47 +0,0 @@ -# The minimal port - -This port is intended to be a minimal MicroPython port that actually runs. -It can run under Linux (or similar) and on any STM32F4xx MCU (eg the pyboard). - -## Building and running Linux version - -By default the port will be built for the host machine: - - $ make - -To run a small test script do: - - $ make run - -## Building for an STM32 MCU - -The Makefile has the ability to build for a Cortex-M CPU, and by default -includes some start-up code for an STM32F4xx MCU and also enables a UART -for communication. To build: - - $ make CROSS=1 - -If you previously built the Linux version, you will need to first run -`make clean` to get rid of incompatible object files. - -Building will produce the build/firmware.dfu file which can be programmed -to an MCU using: - - $ make CROSS=1 deploy - -This version of the build will work out-of-the-box on a pyboard (and -anything similar), and will give you a MicroPython REPL on UART1 at 9600 -baud. Pin PA13 will also be driven high, and this turns on the red LED on -the pyboard. - -## Building without the built-in MicroPython compiler - -This minimal port can be built with the built-in MicroPython compiler -disabled. This will reduce the firmware by about 20k on a Thumb2 machine, -and by about 40k on 32-bit x86. Without the compiler the REPL will be -disabled, but pre-compiled scripts can still be executed. - -To test out this feature, change the `MICROPY_ENABLE_COMPILER` config -option to "0" in the mpconfigport.h file in this directory. Then -recompile and run the firmware and it will execute the frozentest.py -file. diff --git a/ports/minimal/frozentest.mpy b/ports/minimal/frozentest.mpy deleted file mode 100644 index 7c6809bf6522f..0000000000000 Binary files a/ports/minimal/frozentest.mpy and /dev/null differ diff --git a/ports/minimal/frozentest.py b/ports/minimal/frozentest.py deleted file mode 100644 index 0f99b74297fbb..0000000000000 --- a/ports/minimal/frozentest.py +++ /dev/null @@ -1,7 +0,0 @@ -print('uPy') -print('a long string that is not interned') -print('a string that has unicode αβγ chars') -print(b'bytes 1234\x01') -print(123456789) -for i in range(4): - print(i) diff --git a/ports/minimal/main.c b/ports/minimal/main.c deleted file mode 100644 index 9d43a9cf97d2c..0000000000000 --- a/ports/minimal/main.c +++ /dev/null @@ -1,256 +0,0 @@ -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/gc.h" -#include "py/mperrno.h" -#include "lib/utils/pyexec.h" - -#if MICROPY_ENABLE_COMPILER -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} -#endif - -static char *stack_top; -static char heap[2048]; - -int main(int argc, char **argv) { - int stack_dummy; - stack_top = (char*)&stack_dummy; - - #if MICROPY_ENABLE_GC - gc_init(heap, heap + sizeof(heap)); - #endif - mp_init(); - #if MICROPY_ENABLE_COMPILER - #if MICROPY_REPL_EVENT_DRIVEN - pyexec_event_repl_init(); - for (;;) { - int c = mp_hal_stdin_rx_chr(); - if (pyexec_event_repl_process_char(c)) { - break; - } - } - #else - pyexec_friendly_repl(); - #endif - //do_str("print('hello world!', list(x+1 for x in range(10)), end='eol\\n')", MP_PARSE_SINGLE_INPUT); - //do_str("for i in range(10):\r\n print(i)", MP_PARSE_FILE_INPUT); - #else - pyexec_frozen_module("frozentest.py"); - #endif - mp_deinit(); - return 0; -} - -void gc_collect(void) { - // WARNING: This gc_collect implementation doesn't try to get root - // pointers from CPU registers, and thus may function incorrectly. - void *dummy; - gc_collect_start(); - gc_collect_root(&dummy, ((mp_uint_t)stack_top - (mp_uint_t)&dummy) / sizeof(mp_uint_t)); - gc_collect_end(); - gc_dump_info(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif - -#if MICROPY_MIN_USE_CORTEX_CPU - -// this is a minimal IRQ and reset framework for any Cortex-M CPU - -extern uint32_t _estack, _sidata, _sdata, _edata, _sbss, _ebss; - -void Reset_Handler(void) __attribute__((naked)); -void Reset_Handler(void) { - // set stack pointer - __asm volatile ("ldr sp, =_estack"); - // copy .data section from flash to RAM - for (uint32_t *src = &_sidata, *dest = &_sdata; dest < &_edata;) { - *dest++ = *src++; - } - // zero out .bss section - for (uint32_t *dest = &_sbss; dest < &_ebss;) { - *dest++ = 0; - } - // jump to board initialisation - void _start(void); - _start(); -} - -void Default_Handler(void) { - for (;;) { - } -} - -const uint32_t isr_vector[] __attribute__((section(".isr_vector"))) = { - (uint32_t)&_estack, - (uint32_t)&Reset_Handler, - (uint32_t)&Default_Handler, // NMI_Handler - (uint32_t)&Default_Handler, // HardFault_Handler - (uint32_t)&Default_Handler, // MemManage_Handler - (uint32_t)&Default_Handler, // BusFault_Handler - (uint32_t)&Default_Handler, // UsageFault_Handler - 0, - 0, - 0, - 0, - (uint32_t)&Default_Handler, // SVC_Handler - (uint32_t)&Default_Handler, // DebugMon_Handler - 0, - (uint32_t)&Default_Handler, // PendSV_Handler - (uint32_t)&Default_Handler, // SysTick_Handler -}; - -void _start(void) { - // when we get here: stack is initialised, bss is clear, data is copied - - // SCB->CCR: enable 8-byte stack alignment for IRQ handlers, in accord with EABI - *((volatile uint32_t*)0xe000ed14) |= 1 << 9; - - // initialise the cpu and peripherals - #if MICROPY_MIN_USE_STM32_MCU - void stm32_init(void); - stm32_init(); - #endif - - // now that we have a basic system up and running we can call main - main(0, NULL); - - // we must not return - for (;;) { - } -} - -#endif - -#if MICROPY_MIN_USE_STM32_MCU - -// this is minimal set-up code for an STM32 MCU - -typedef struct { - volatile uint32_t CR; - volatile uint32_t PLLCFGR; - volatile uint32_t CFGR; - volatile uint32_t CIR; - uint32_t _1[8]; - volatile uint32_t AHB1ENR; - volatile uint32_t AHB2ENR; - volatile uint32_t AHB3ENR; - uint32_t _2; - volatile uint32_t APB1ENR; - volatile uint32_t APB2ENR; -} periph_rcc_t; - -typedef struct { - volatile uint32_t MODER; - volatile uint32_t OTYPER; - volatile uint32_t OSPEEDR; - volatile uint32_t PUPDR; - volatile uint32_t IDR; - volatile uint32_t ODR; - volatile uint16_t BSRRL; - volatile uint16_t BSRRH; - volatile uint32_t LCKR; - volatile uint32_t AFR[2]; -} periph_gpio_t; - -typedef struct { - volatile uint32_t SR; - volatile uint32_t DR; - volatile uint32_t BRR; - volatile uint32_t CR1; -} periph_uart_t; - -#define USART1 ((periph_uart_t*) 0x40011000) -#define GPIOA ((periph_gpio_t*) 0x40020000) -#define GPIOB ((periph_gpio_t*) 0x40020400) -#define RCC ((periph_rcc_t*) 0x40023800) - -// simple GPIO interface -#define GPIO_MODE_IN (0) -#define GPIO_MODE_OUT (1) -#define GPIO_MODE_ALT (2) -#define GPIO_PULL_NONE (0) -#define GPIO_PULL_UP (0) -#define GPIO_PULL_DOWN (1) -void gpio_init(periph_gpio_t *gpio, int pin, int mode, int pull, int alt) { - gpio->MODER = (gpio->MODER & ~(3 << (2 * pin))) | (mode << (2 * pin)); - // OTYPER is left as default push-pull - // OSPEEDR is left as default low speed - gpio->PUPDR = (gpio->PUPDR & ~(3 << (2 * pin))) | (pull << (2 * pin)); - gpio->AFR[pin >> 3] = (gpio->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); -} -#define gpio_get(gpio, pin) ((gpio->IDR >> (pin)) & 1) -#define gpio_set(gpio, pin, value) do { gpio->ODR = (gpio->ODR & ~(1 << (pin))) | (value << pin); } while (0) -#define gpio_low(gpio, pin) do { gpio->BSRRH = (1 << (pin)); } while (0) -#define gpio_high(gpio, pin) do { gpio->BSRRL = (1 << (pin)); } while (0) - -void stm32_init(void) { - // basic MCU config - RCC->CR |= (uint32_t)0x00000001; // set HSION - RCC->CFGR = 0x00000000; // reset all - RCC->CR &= (uint32_t)0xfef6ffff; // reset HSEON, CSSON, PLLON - RCC->PLLCFGR = 0x24003010; // reset PLLCFGR - RCC->CR &= (uint32_t)0xfffbffff; // reset HSEBYP - RCC->CIR = 0x00000000; // disable IRQs - - // leave the clock as-is (internal 16MHz) - - // enable GPIO clocks - RCC->AHB1ENR |= 0x00000003; // GPIOAEN, GPIOBEN - - // turn on an LED! (on pyboard it's the red one) - gpio_init(GPIOA, 13, GPIO_MODE_OUT, GPIO_PULL_NONE, 0); - gpio_high(GPIOA, 13); - - // enable UART1 at 9600 baud (TX=B6, RX=B7) - gpio_init(GPIOB, 6, GPIO_MODE_ALT, GPIO_PULL_NONE, 7); - gpio_init(GPIOB, 7, GPIO_MODE_ALT, GPIO_PULL_NONE, 7); - RCC->APB2ENR |= 0x00000010; // USART1EN - USART1->BRR = (104 << 4) | 3; // 16MHz/(16*104.1875) = 9598 baud - USART1->CR1 = 0x0000200c; // USART enable, tx enable, rx enable -} - -#endif diff --git a/ports/minimal/mpconfigport.h b/ports/minimal/mpconfigport.h deleted file mode 100644 index 8744ca95081f4..0000000000000 --- a/ports/minimal/mpconfigport.h +++ /dev/null @@ -1,97 +0,0 @@ -#include - -// options to control how MicroPython is built - -// You can disable the built-in MicroPython compiler by setting the following -// config option to 0. If you do this then you won't get a REPL prompt, but you -// will still be able to execute pre-compiled scripts, compiled with mpy-cross. -#define MICROPY_ENABLE_COMPILER (1) - -#define MICROPY_QSTR_BYTES_IN_HASH (1) -#define MICROPY_QSTR_EXTRA_POOL mp_qstr_frozen_const_pool -#define MICROPY_ALLOC_PATH_MAX (256) -#define MICROPY_ALLOC_PARSE_CHUNK_INIT (16) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_GC_ALLOC_THRESHOLD (0) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_MODULE_FROZEN_MPY (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -// This port is intended to be 32-bit, but unfortunately, int32_t for -// different targets may be defined in different ways - either as int -// or as long. This requires different printf formatting specifiers -// to print such value. So, we avoid int32_t and use int directly. -#define UINT_FMT "%u" -#define INT_FMT "%d" -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size - -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// We need to provide a declaration/definition of alloca() -#include - -#define MICROPY_HW_BOARD_NAME "minimal" -#define MICROPY_HW_MCU_NAME "unknown-cpu" - -#ifdef __linux__ -#define MICROPY_MIN_USE_STDOUT (1) -#endif - -#ifdef __thumb__ -#define MICROPY_MIN_USE_CORTEX_CPU (1) -#define MICROPY_MIN_USE_STM32_MCU (1) -#endif - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; diff --git a/ports/minimal/mphalport.h b/ports/minimal/mphalport.h deleted file mode 100644 index 60d68bd2d6d50..0000000000000 --- a/ports/minimal/mphalport.h +++ /dev/null @@ -1,2 +0,0 @@ -static inline mp_uint_t mp_hal_ticks_ms(void) { return 0; } -static inline void mp_hal_set_interrupt_char(char c) {} diff --git a/ports/minimal/stm32f405.ld b/ports/minimal/stm32f405.ld deleted file mode 100644 index a202294a54eed..0000000000000 --- a/ports/minimal/stm32f405.ld +++ /dev/null @@ -1,63 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 0x010000 /* 64 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x020000 /* 128 KiB */ -} - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define output sections */ -SECTIONS -{ - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* isr vector table */ - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ - } >FLASH - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code */ - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/minimal/uart_core.c b/ports/minimal/uart_core.c deleted file mode 100644 index d2d17b4d14180..0000000000000 --- a/ports/minimal/uart_core.c +++ /dev/null @@ -1,44 +0,0 @@ -#include -#include "py/mpconfig.h" - -/* - * Core UART functions to implement for a port - */ - -#if MICROPY_MIN_USE_STM32_MCU -typedef struct { - volatile uint32_t SR; - volatile uint32_t DR; -} periph_uart_t; -#define USART1 ((periph_uart_t*)0x40011000) -#endif - -// Receive single character -int mp_hal_stdin_rx_chr(void) { - unsigned char c = 0; -#if MICROPY_MIN_USE_STDOUT - int r = read(0, &c, 1); - (void)r; -#elif MICROPY_MIN_USE_STM32_MCU - // wait for RXNE - while ((USART1->SR & (1 << 5)) == 0) { - } - c = USART1->DR; -#endif - return c; -} - -// Send string of given length -void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) { -#if MICROPY_MIN_USE_STDOUT - int r = write(1, str, len); - (void)r; -#elif MICROPY_MIN_USE_STM32_MCU - while (len--) { - // wait for TXE - while ((USART1->SR & (1 << 7)) == 0) { - } - USART1->DR = *str++; - } -#endif -} diff --git a/ports/nrf/.gitignore b/ports/nrf/.gitignore index ace93515a20cf..cda23c7a9019b 100644 --- a/ports/nrf/.gitignore +++ b/ports/nrf/.gitignore @@ -1,8 +1,9 @@ -# Nordic files -##################### -drivers/bluetooth/s1*/ +# Old Nordic soft devices that don't allow redistribution +######################################################### +drivers/bluetooth/s132_nrf52_2.0.1/ + +!drivers/bluetooth/*/*.hex # Build files ##################### build-*/ - diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile old mode 100644 new mode 100755 index 7ed14aa47cb90..89d88ce3662e2 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -1,150 +1,162 @@ -# Select the board to build for: if not given on the command line, -# then default to feather52. -BOARD ?= feather52 -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(info You must provide a BOARD parameter with 'BOARD=') + $(info Possible values are:) + $(info $(sort $(subst /.,,$(subst boards/,,$(wildcard boards/*/.))))) + $(error BOARD not defined) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif endif -# If SoftDevice is selected, try to use that one. -# Default to SD132 (exact version can be set with SOFTDEV_VERSION) -SD ?= s132 +CLI_SD := $(SD) SD_LOWER = $(shell echo $(SD) | tr '[:upper:]' '[:lower:]') -# TODO: Verify that it is a valid target. - -ifeq ($(SD), ) - # If the build directory is not given, make it reflect the board name. - BUILD ?= build-$(BOARD) - include ../../py/mkenv.mk - include boards/$(BOARD)/mpconfigboard.mk - -include mpconfigport.mk - -else - # If the build directory is not given, make it reflect the board name. - BUILD ?= build-$(BOARD)-$(SD_LOWER) - include ../../py/mkenv.mk - include boards/$(BOARD)/mpconfigboard_$(SD_LOWER).mk - -include mpconfigport.mk - - include drivers/bluetooth/bluetooth_common.mk -endif +# Build directory with SD if it's different from the default. +BUILD ?= $(if $(CLI_SD),build-$(BOARD)-$(SD_LOWER),build-$(BOARD)) +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk # qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h - -FROZEN_MPY_DIR = freeze +QSTR_DEFS = qstrdefsport.h # include py core make definitions -include ../../py/py.mk +include $(TOP)/py/py.mk include $(TOP)/supervisor/supervisor.mk -FATFS_DIR = lib/oofatfs +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +ifneq ($(SD), ) + include bluetooth/bluetooth_common.mk +endif CROSS_COMPILE = arm-none-eabi- -MCU_VARIANT_UPPER = $(shell echo $(MCU_VARIANT) | tr '[:lower:]' '[:upper:]') +FATFS_DIR = lib/oofatfs INC += -I. INC += -I../.. INC += -I$(BUILD) INC += -I$(BUILD)/genhdr INC += -I./../../lib/cmsis/inc -INC += -I./device -INC += -I./device/$(MCU_VARIANT) -INC += -I./hal -INC += -I./hal/$(MCU_VARIANT) -INC += -I./modules/machine -INC += -I./modules/ubluepy -INC += -I./modules/music -INC += -I./modules/random -INC += -I./modules/ble +INC += -I./boards/$(BOARD) +INC += -I./nrfx +INC += -I./nrfx/hal +INC += -I./nrfx/mdk +INC += -I./nrfx/drivers/include +INC += -I./nrfx/drivers/src +INC += -I./bluetooth +INC += -I./peripherals INC += -I../../lib/mp-readline -INC += -I./drivers/bluetooth -INC += -I./drivers - -NRF_DEFINES += -D$(MCU_VARIANT_UPPER) -NRF_DEFINES += -DCONFIG_GPIO_AS_PINRESET +INC += -I../../lib/tinyusb/src +INC += -I../../supervisor/shared/usb -CFLAGS_CORTEX_M = -mthumb -mabi=aapcs -fsingle-precision-constant -Wdouble-promotion +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb3 -Og +else + CFLAGS += -Os -DNDEBUG + CFLAGS += -flto -flto-partition=none +endif -CFLAGS_MCU_m4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -CFLAGS_MCU_m0 = $(CFLAGS_CORTEX_M) --short-enums -mtune=cortex-m0 -mcpu=cortex-m0 -mfloat-abi=soft -fno-builtin +CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) +# Undo some warnings. +# nrfx uses undefined preprocessor variables quite casually, so we can't do warning checks for these. +CFLAGS += -Wno-undef +# nrfx does casts that increase alignment requirements. +CFLAGS += -Wno-cast-align -CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES)) -CFLAGS += $(INC) -Wall -Werror -ansi -std=gnu99 -nostdlib $(COPT) $(NRF_DEFINES) $(CFLAGS_MOD) -CFLAGS += -fno-strict-aliasing -CFLAGS += -fstack-usage -CFLAGS += -fdata-sections -ffunction-sections -CFLAGS += -Iboards/$(BOARD) -CFLAGS += -DNRF5_HAL_H='<$(MCU_VARIANT)_hal.h>' +NRF_DEFINES += -DCONFIG_GPIO_AS_PINRESET +CFLAGS += $(NRF_DEFINES) -LDFLAGS = $(CFLAGS) -LDFLAGS += -Xlinker -Map=$(@:.elf=.map) -LDFLAGS += -mthumb -mabi=aapcs -T $(LD_FILE) -L boards/ -LDFLAGS += -Wl,--gc-sections +CFLAGS += \ + -mthumb \ + -mabi=aapcs-linux \ + -mfloat-abi=hard \ + -mcpu=cortex-m4 \ + -mfpu=fpv4-sp-d16 -#Debugging/Optimization -ifeq ($(DEBUG), 1) -#ASMFLAGS += -g -gtabs+ -CFLAGS += -O1 -ggdb -LDFLAGS += -O1 -else -CFLAGS += -Os -DNDEBUG -LDFLAGS += -Os -endif +# TODO: check this +CFLAGS += -D__START=main -LIBS = \ +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LIBS := -lgcc -lc -ifeq ($(MCU_VARIANT), nrf52) -LIBM_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-file-name=libm.a) -LIBC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-file-name=libc.a) -LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) +LDFLAGS += -mthumb -mcpu=cortex-m4 -LIBS += -L $(dir $(LIBM_FILE_NAME)) -lm -LIBS += -L $(dir $(LIBC_FILE_NAME)) -lc -LIBS += -L $(dir $(LIBGCC_FILE_NAME)) -lgcc +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm endif -SRC_HAL = $(addprefix hal/,\ - hal_uart.c \ - hal_uarte.c \ - hal_spi.c \ - hal_spie.c \ - hal_time.c \ - hal_timer.c \ - hal_twi.c \ - hal_adc.c \ - hal_adce.c \ - hal_temp.c \ - hal_gpio.c \ - hal_rng.c \ +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF5X -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 + +SRC_NRFX = $(addprefix nrfx/,\ + drivers/src/nrfx_power.c \ + drivers/src/nrfx_spim.c \ + drivers/src/nrfx_timer.c \ + drivers/src/nrfx_twim.c \ + drivers/src/nrfx_uarte.c \ + drivers/src/nrfx_gpiote.c \ + drivers/src/nrfx_rtc.c \ + drivers/src/nrfx_nvmc.c \ ) -ifeq ($(MCU_VARIANT), nrf52) -SRC_HAL += $(addprefix hal/,\ - hal_pwm.c \ - ) +ifdef EXTERNAL_FLASH_DEVICES + ifeq ($(QSPI_FLASH_FILESYSTEM),1) + SRC_NRFX += nrfx/drivers/src/nrfx_qspi.c + endif endif SRC_C += \ - mphalport.c \ - help.c \ - pin_named_pins.c \ + background.c \ fatfs_port.c \ - fifo.c \ + mphalport.c \ tick.c \ - drivers/softpwm.c \ - drivers/ticker.c \ - drivers/bluetooth/ble_drv.c \ - drivers/bluetooth/ble_uart.c \ boards/$(BOARD)/board.c \ - device/$(MCU_VARIANT)/system_$(MCU_SUB_VARIANT).c \ + boards/$(BOARD)/pins.c \ device/$(MCU_VARIANT)/startup_$(MCU_SUB_VARIANT).c \ + bluetooth/ble_drv.c \ + common-hal/_bleio/bonding.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ lib/oofatfs/ff.c \ lib/oofatfs/option/ccsbcs.c \ lib/timeutils/timeutils.c \ @@ -152,149 +164,121 @@ SRC_C += \ lib/utils/context_manager_helpers.c \ lib/utils/interrupt_char.c \ lib/utils/pyexec.c \ - lib/libc/string0.c \ - lib/mp-readline/readline.c \ - internal_flash.c \ - - -DRIVERS_SRC_C += $(addprefix modules/,\ - machine/modmachine.c \ - machine/uart.c \ - machine/spi.c \ - machine/i2c.c \ - machine/adc.c \ - machine/pin.c \ - machine/timer.c \ - machine/pwm.c \ - machine/led.c \ - machine/temp.c \ - utime/modutime.c \ - pyb/modpyb.c \ - ubluepy/modubluepy.c \ - ubluepy/ubluepy_peripheral.c \ - ubluepy/ubluepy_service.c \ - ubluepy/ubluepy_characteristic.c \ - ubluepy/ubluepy_uuid.c \ - ubluepy/ubluepy_delegate.c \ - ubluepy/ubluepy_constants.c \ - ubluepy/ubluepy_descriptor.c \ - ubluepy/ubluepy_scanner.c \ - ubluepy/ubluepy_scan_entry.c \ - music/modmusic.c \ - music/musictunes.c \ - ble/modble.c \ - random/modrandom.c \ - ) - + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + nrfx/mdk/system_$(MCU_SUB_VARIANT).c \ + peripherals/nrf/cache.c \ + peripherals/nrf/clocks.c \ + peripherals/nrf/$(MCU_CHIP)/pins.c \ + peripherals/nrf/$(MCU_CHIP)/power.c \ + peripherals/nrf/nvm.c \ + peripherals/nrf/timers.c \ + sd_mutex.c \ + supervisor/shared/memory.c + +# USB source files for nrf52840 +ifeq ($(MCU_SUB_VARIANT),nrf52840) +SRC_C += \ + lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c +endif -SRC_COMMON_HAL += \ - board/__init__.c \ - digitalio/__init__.c \ - digitalio/DigitalInOut.c \ - microcontroller/__init__.c \ - microcontroller/Pin.c \ - microcontroller/Processor.c \ - os/__init__.c \ - time/__init__.c \ - analogio/__init__.c \ - analogio/AnalogIn.c \ - analogio/AnalogOut.c \ - busio/__init__.c\ - busio/I2C.c \ - busio/SPI.c \ - busio/UART.c \ - pulseio/__init__.c \ - pulseio/PulseIn.c \ - pulseio/PulseOut.c \ - pulseio/PWMOut.c \ - storage/__init__.c \ - -# These don't have corresponding files in each port but are still located in -# shared-bindings to make it clear what the contents of the modules are. -SRC_BINDINGS_ENUMS = \ - busio/OneWire.c \ - digitalio/Direction.c \ - digitalio/DriveMode.c \ - digitalio/Pull.c \ - microcontroller/RunMode.c \ - help.c \ - math/__init__.c \ - supervisor/__init__.c \ - util.c +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 + +SRC_MOD += lib/netutils/netutils.c + +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ $(addprefix common-hal/, $(SRC_COMMON_HAL)) -SRC_SHARED_MODULE = \ - os/__init__.c \ - random/__init__.c \ - storage/__init__.c \ - struct/__init__.c \ - gamepad/__init__.c \ - gamepad/GamePad.c \ - bitbangio/__init__.c \ - bitbangio/I2C.c \ - bitbangio/OneWire.c \ - bitbangio/SPI.c \ - busio/OneWire.c \ - -# uheap/__init__.c \ - ustack/__init__.c - -SRC_SHARED_BINDINGS = \ - struct/__init__.c \ - gamepad/__init__.c \ - gamepad/GamePad.c \ - bitbangio/__init__.c \ - bitbangio/I2C.c \ - bitbangio/SPI.c \ - bitbangio/OneWire.c - - -SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_BINDINGS)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) - -FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py') -FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy)) +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +# There may be duplicates between SRC_COMMON_HAL_EXPANDED and SRC_SHARED_MODULE_EXPANDED, +# because a few modules have files both in common-hal/ and shared-modules/. +# Doing a $(sort ...) removes duplicates as part of sorting. +SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)) + +SRC_S = supervisor/cpu.s OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(BUILD)/pins_gen.o -OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_NRFX:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) $(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os $(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os -.phony: all flash sd binary hex +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 -all: binary hex +$(BUILD)/firmware.elf: $(OBJ) $(GENERATED_LD_FILE) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(GENERATED_LD_FILE) -OUTPUT_FILENAME = firmware +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary $^ $@ +# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ -## Create binary .bin file from the .out file -binary: $(BUILD)/$(OUTPUT_FILENAME).bin +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O ihex $^ $@ +# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@ -$(BUILD)/$(OUTPUT_FILENAME).bin: $(BUILD)/$(OUTPUT_FILENAME).elf - $(OBJCOPY) -O binary $< $@ +$(BUILD)/firmware.uf2: $(BUILD)/firmware.hex + $(ECHO) "Create $@" + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "$(BUILD)/firmware.uf2" $^ -## Create binary .hex file from the .out file -hex: $(BUILD)/$(OUTPUT_FILENAME).hex -$(BUILD)/$(OUTPUT_FILENAME).hex: $(BUILD)/$(OUTPUT_FILENAME).elf - $(OBJCOPY) -O ihex $< $@ +##################### +# Flash with debugger +##################### FLASHER ?= ifeq ($(FLASHER),) -flash: $(BUILD)/$(OUTPUT_FILENAME).hex +# Also update to bootloader settting to validate application and skip checksum ( app valid = 0x0001, crc = 0x0000 ) +flash: $(BUILD)/firmware.hex nrfjprog --program $< --sectorerase -f $(MCU_VARIANT) + nrfjprog --erasepage $(BOOT_SETTING_ADDR) -f $(MCU_VARIANT) + nrfjprog --memwr $(BOOT_SETTING_ADDR) --val 0x00000001 -f $(MCU_VARIANT) nrfjprog --reset -f $(MCU_VARIANT) -sd: $(BUILD)/$(OUTPUT_FILENAME).hex +sd: $(BUILD)/firmware.hex nrfjprog --eraseall -f $(MCU_VARIANT) nrfjprog --program $(SOFTDEV_HEX) -f $(MCU_VARIANT) nrfjprog --program $< --sectorerase -f $(MCU_VARIANT) @@ -302,65 +286,55 @@ sd: $(BUILD)/$(OUTPUT_FILENAME).hex else ifeq ($(FLASHER), pyocd) -flash: $(BUILD)/$(OUTPUT_FILENAME).hex - pyocd-flashtool -t $(MCU_VARIANT) $< +flash: $(BUILD)/firmware.hex + pyocd-flashtool -t $(MCU_VARIANT) $< --sector_erase +# pyocd-tool -t $(MCU_VARIANT) erase $(BOOT_SETTING_ADDR) + pyocd-tool -t $(MCU_VARIANT) write32 $(BOOT_SETTING_ADDR) 0x00000001 + pyocd-tool -t $(MCU_VARIANT) reset -sd: $(BUILD)/$(OUTPUT_FILENAME).hex +sd: $(BUILD)/firmware.hex pyocd-flashtool -t $(MCU_VARIANT) --chip_erase pyocd-flashtool -t $(MCU_VARIANT) $(SOFTDEV_HEX) - pyocd-flashtool -t $(MCU_VARIANT) $< + pyocd-flashtool -t $(MCU_VARIANT) $< --sector_erase + pyocd-tool -t $(MCU_VARIANT) reset $(BOOT_SETTING_ADDR) endif -$(BUILD)/$(OUTPUT_FILENAME).elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(CC) $(LDFLAGS) -o $@ $(OBJ) -Wl,--start-group $(LIBS) -Wl,--end-group - $(Q)$(SIZE) $@ +##################### +# Flash with DFU +##################### +.phony: dfu-gen dfu-flash -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(DRIVERS_SRC_C) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) - -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -# Making OBJ use an order-only depenedency on the generated pins.h file -# has the side effect of making the pins.h file before we actually compile -# any of the objects. The normal dependency generation will deal with the -# case when pins.h is modified. But when it doesn't exist, we don't know -# which source files might need it. -$(OBJ): | $(HEADER_BUILD)/pins.h - -# Use a pattern rule here so that make will only call make-pins.py once to make -# both pins_$(BOARD).c and pins.h -$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC) - -$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c - $(call compile_c) - -MAKE_PINS = boards/make-pins.py -BOARD_PINS = boards/$(BOARD)/pins.csv -AF_FILE = $(MCU_VARIANT)_af.csv -PREFIX_FILE = boards/$(MCU_VARIANT)_prefix.c -GEN_PINS_SRC = $(BUILD)/pins_gen.c -GEN_PINS_HDR = $(HEADER_BUILD)/pins.h -GEN_PINS_QSTR = $(BUILD)/pins_qstr.h -GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h -GEN_PINS_AF_PY = $(BUILD)/pins_af.py - -ifneq ($(FROZEN_DIR),) -# To use frozen source modules, put your .py files in a subdirectory (eg scripts/) -# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch). -CFLAGS += -DMICROPY_MODULE_FROZEN_STR -endif +NRFUTIL = adafruit-nrfutil -ifneq ($(FROZEN_MPY_DIR),) -# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and -# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch). -CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool -CFLAGS += -DMICROPY_MODULE_FROZEN_MPY +ifeq ($(MCU_SUB_VARIANT),nrf52840) + DFU_TOUCH = --touch 1200 +else + DFU_TOUCH = endif +check_defined = \ + $(strip $(foreach 1,$1, \ + $(call __check_defined,$1,$(strip $(value 2))))) +__check_defined = \ + $(if $(value $1),, \ + $(error Undefined make flag: $1$(if $2, ($2)))) + +## Flash with DFU serial +dfu-flash: $(BUILD)/dfu-package.zip + @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0) + $(NRFUTIL) --verbose dfu serial --package $^ -p $(SERIAL) -b 115200 --singlebank $(DFU_TOUCH) + +## Create DFU package file +dfu-gen: $(BUILD)/dfu-package.zip + +$(BUILD)/dfu-package.zip: $(BUILD)/firmware.hex + $(NRFUTIL) dfu genpkg --sd-req 0xFFFE --dev-type 0x0052 --application $^ $(BUILD)/dfu-package.zip + + include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/nrf/README.md b/ports/nrf/README.md index eff0f80b5e902..88dd4727381cc 100644 --- a/ports/nrf/README.md +++ b/ports/nrf/README.md @@ -2,74 +2,17 @@ This is a port of CircuitPython to the Nordic Semiconductor nRF52 series of chips. -## Supported Features +> **NOTE**: There are board-specific READMEs that may be more up to date than the + generic board-neutral documentation below. -* UART -* SPI -* LEDs -* Pins -* ADC -* I2C -* PWM -* Temperature -* RTC (Real Time Counter. Low-Power counter) -* BLE support including: - * Peripheral role - * Scanner role - * _REPL over Bluetooth LE_ (optionally using WebBluetooth) - * ubluepy: Bluetooth LE module for CircuitPython - * 1 non-connectable advertiser while in connection +## Flash -## Tested Hardware +Some boards have UF2 bootloaders and can simply be flashed in the normal way, by copying +firmware.uf2 to the BOOT drive. -* nRF52832 - * [PCA10040](http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52%2Fdita%2Fnrf52%2Fdevelopment%2Fnrf52_dev_kit.html) - * [Adafruit Feather nRF52](https://www.adafruit.com/product/3406) -* nRF52840 - * [PCA10056](http://www.nordicsemi.com/eng/Products/nRF52840-Preview-DK) +For some boards, you can use the `flash` target: -## Compile and Flash - -Prerequisite steps for building the nrf port: - - git clone .git circuitpython - cd circuitpython - git submodule update --init - make -C mpy-cross - -By default, the feather52 (nRF52832) is used as compile target. To build and flash issue the following command inside the ports/nrf/ folder: - - make - make flash - -Alternatively the target board could be defined: - - make BOARD=pca10056 - make flash - -## Compile and Flash with Bluetooth Stack - -First prepare the bluetooth folder by downloading Bluetooth LE stacks and headers: - - ./drivers/bluetooth/download_ble_stack.sh - -If the Bluetooth stacks has been downloaded, compile the target with the following command: - - make BOARD=pca10040 SD=s132 - -The **make sd** will trigger a flash of the bluetooth stack before that application is flashed. Note that **make sd** will perform a full erase of the chip, which could cause 3rd party bootloaders to also be wiped. - - make BOARD=pca10040 SD=s132 sd - -Note: further tuning of features to include in bluetooth or even setting up the device to use REPL over Bluetooth can be configured in the `bluetooth_conf.h`. - -## Target Boards and Make Flags - -Target Board (BOARD) | Bluetooth Stack (SD) | Bluetooth Support | Flash Util ----------------------|-------------------------|------------------------|------------------------------- -pca10040 | s132 | Peripheral and Scanner | [Segger](#segger-targets) -feather52 | s132 | Peripheral and Scanner | [UART DFU](#dfu-targets) -pca10056 | s140 | Peripheral and Scanner | [Segger](#segger-targets) + make BOARD=pca10056 flash ## Segger Targets @@ -89,33 +32,15 @@ note: On Linux it might be required to link SEGGER's `libjlinkarm.so` inside nrf ## DFU Targets - sudo apt-get install build-essential libffi-dev pkg-config gcc-arm-none-eabi git python python-pip - git clone https://github.com/adafruit/Adafruit_nRF52_Arduino.git - cd Adafruit_nRF52_Arduino/tools/nrfutil-0.5.2/ - sudo pip install -r requirements.txt - sudo python setup.py install +run follow command to install [adafruit-nrfutil](https://github.com/adafruit/Adafruit_nRF52_nrfutil) from PyPi + + $ pip3 install --user adafruit-nrfutil **make flash** and **make sd** will not work with DFU targets. Hence, **dfu-gen** and **dfu-flash** must be used instead. * dfu-gen: Generates a Firmware zip to be used by the DFU flash application. * dfu-flash: Triggers the DFU flash application to upload the firmware from the generated Firmware zip file. -Example on how to generate and flash feather52 target: - - make BOARD=feather52 SD=s132 - make BOARD=feather52 SD=s132 dfu-gen - make BOARD=feather52 SD=s132 dfu-flash - -## Bluetooth LE REPL - -The port also implements a BLE REPL driver. This feature is disabled by default, as it will deactivate the UART REPL when activated. As some of the nRF devices only have one UART, using the BLE REPL free's the UART instance such that it can be used as a general UART peripheral not bound to REPL. - -The configuration can be enabled by editing the `bluetooth_conf.h` and set `MICROPY_PY_BLE_NUS` to 1. When enabled you have different options to test it: * [NUS Console for Linux](https://github.com/tralamazza/nus_console) (recommended) * [WebBluetooth REPL](https://glennrub.github.io/webbluetooth/micropython/repl/) (experimental) - -Other: -* nRF UART application for IPhone/Android - -WebBluetooth mode can also be configured by editing `bluetooth_conf.h` and set `BLUETOOTH_WEBBLUETOOTH_REPL` to 1. This will alternate advertisement between Eddystone URL and regular connectable advertisement. The Eddystone URL will point the phone or PC to download [WebBluetooth REPL](https://glennrub.github.io/webbluetooth/micropython/repl/) (experimental), which subsequently can be used to connect to the Bluetooth REPL from the PC or Phone browser. diff --git a/ports/nrf/background.c b/ports/nrf/background.c new file mode 100644 index 0000000000000..966c56e0b7515 --- /dev/null +++ b/ports/nrf/background.c @@ -0,0 +1,81 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "supervisor/filesystem.h" +#include "supervisor/usb.h" +#include "supervisor/shared/stack.h" + +#if CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +#if CIRCUITPY_AUDIOBUSIO +#include "common-hal/audiobusio/I2SOut.h" +#endif + +#if CIRCUITPY_AUDIOPWMIO +#include "common-hal/audiopwmio/PWMAudioOut.h" +#endif + +#if CIRCUITPY_BLEIO +#include "supervisor/shared/bluetooth.h" +#include "common-hal/_bleio/bonding.h" +#endif + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + running_background_tasks = true; + filesystem_background(); + usb_background(); +#if CIRCUITPY_AUDIOPWMIO + audiopwmout_background(); +#endif +#if CIRCUITPY_AUDIOBUSIO + i2s_background(); +#endif + +#if CIRCUITPY_BLEIO + supervisor_bluetooth_background(); + bonding_background(); +#endif + + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + running_background_tasks = false; + + assert_heap_ok(); +} diff --git a/ports/nrf/background.h b/ports/nrf/background.h new file mode 100644 index 0000000000000..d53681c0fdeff --- /dev/null +++ b/ports/nrf/background.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_BACKGROUND_H +#define MICROPY_INCLUDED_NRF_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); + +#endif // MICROPY_INCLUDED_NRF_BACKGROUND_H diff --git a/ports/nrf/bluetooth/ble_drv.c b/ports/nrf/bluetooth/ble_drv.c new file mode 100644 index 0000000000000..e410ac3b424d4 --- /dev/null +++ b/ports/nrf/bluetooth/ble_drv.c @@ -0,0 +1,161 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "nrf_nvic.h" +#include "nrf_sdm.h" +#include "nrf_soc.h" +#include "nrfx_power.h" +#include "py/misc.h" +#include "py/mpstate.h" + +#include "supervisor/shared/bluetooth.h" + +nrf_nvic_state_t nrf_nvic_state = { 0 }; + +// Flag indicating progress of internal flash operation. +volatile sd_flash_operation_status_t sd_flash_operation_status; + +__attribute__((aligned(4))) +static uint8_t m_ble_evt_buf[sizeof(ble_evt_t) + (BLE_GATTS_VAR_ATTR_LEN_MAX)]; + +void ble_drv_reset() { + // Linked list items will be gc'd. + MP_STATE_VM(ble_drv_evt_handler_entries) = NULL; + sd_flash_operation_status = SD_FLASH_OPERATION_DONE; +} + +void ble_drv_add_event_handler_entry(ble_drv_evt_handler_entry_t* entry, ble_drv_evt_handler_t func, void *param) { + entry->next = MP_STATE_VM(ble_drv_evt_handler_entries); + entry->param = param; + entry->func = func; + + MP_STATE_VM(ble_drv_evt_handler_entries) = entry; +} + +void ble_drv_add_event_handler(ble_drv_evt_handler_t func, void *param) { + ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); + while (it != NULL) { + // If event handler and its corresponding param are already on the list, don't add again. + if ((it->func == func) && (it->param == param)) { + return; + } + it = it->next; + } + + // Add a new handler to the front of the list + ble_drv_evt_handler_entry_t *handler = m_new_ll(ble_drv_evt_handler_entry_t, 1); + ble_drv_add_event_handler_entry(handler, func, param); +} + +void ble_drv_remove_event_handler(ble_drv_evt_handler_t func, void *param) { + ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); + ble_drv_evt_handler_entry_t **prev = &MP_STATE_VM(ble_drv_evt_handler_entries); + while (it != NULL) { + if ((it->func == func) && (it->param == param)) { + // Splice out the matching handler. + *prev = it->next; + return; + } + prev = &(it->next); + it = it->next; + } +} + +extern void tusb_hal_nrf_power_event (uint32_t event); + +void SD_EVT_IRQHandler(void) { + uint32_t evt_id; + while (sd_evt_get(&evt_id) != NRF_ERROR_NOT_FOUND) { + switch (evt_id) { + // usb power event + case NRF_EVT_POWER_USB_DETECTED: + case NRF_EVT_POWER_USB_POWER_READY: + case NRF_EVT_POWER_USB_REMOVED: { + int32_t usbevt = (evt_id == NRF_EVT_POWER_USB_DETECTED ) ? NRFX_POWER_USB_EVT_DETECTED: + (evt_id == NRF_EVT_POWER_USB_POWER_READY) ? NRFX_POWER_USB_EVT_READY : + (evt_id == NRF_EVT_POWER_USB_REMOVED ) ? NRFX_POWER_USB_EVT_REMOVED : -1; + + tusb_hal_nrf_power_event(usbevt); + } + break; + + // Set flag indicating that a flash operation has finished. + case NRF_EVT_FLASH_OPERATION_SUCCESS: + sd_flash_operation_status = SD_FLASH_OPERATION_DONE; + break; + case NRF_EVT_FLASH_OPERATION_ERROR: + sd_flash_operation_status = SD_FLASH_OPERATION_ERROR; + break; + + default: + break; + } + } + + while (1) { + uint16_t evt_len = sizeof(m_ble_evt_buf); + const uint32_t err_code = sd_ble_evt_get(m_ble_evt_buf, &evt_len); + if (err_code != NRF_SUCCESS) { + if (err_code == NRF_ERROR_DATA_SIZE) { + printf("NRF_ERROR_DATA_SIZE\n"); + } + + break; + } + + ble_evt_t* event = (ble_evt_t *)m_ble_evt_buf; + #if CIRCUITPY_VERBOSE_BLE + mp_printf(&mp_plat_print, "BLE event: 0x%04x\n", event->header.evt_id); + #endif + + if (supervisor_bluetooth_hook(event)) { + continue; + } + + ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); + bool done = false; + while (it != NULL) { + #if CIRCUITPY_VERBOSE_BLE + // mp_printf(&mp_plat_print, " calling handler: 0x%08lx, param: 0x%08lx\n", it->func-1, it->param); + #endif + done = it->func(event, it->param) || done; + it = it->next; + } + #if CIRCUITPY_VERBOSE_BLE + if (event->header.evt_id == BLE_GATTS_EVT_WRITE) { + ble_gatts_evt_write_t* write_evt = &event->evt.gatts_evt.params.write; + mp_printf(&mp_plat_print, "Write to: UUID(0x%04x) handle %x of length %d auth %x\n", write_evt->uuid.uuid, write_evt->handle, write_evt->len, write_evt->auth_required); + } + #endif + } +} diff --git a/ports/nrf/bluetooth/ble_drv.h b/ports/nrf/bluetooth/ble_drv.h new file mode 100644 index 0000000000000..ece4b2436f76b --- /dev/null +++ b/ports/nrf/bluetooth/ble_drv.h @@ -0,0 +1,75 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H +#define MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H + +#include + +#include "ble.h" + +#ifndef BLE_GATT_ATT_MTU_DEFAULT + #define BLE_GATT_ATT_MTU_DEFAULT GATT_MTU_SIZE_DEFAULT +#endif + +#define BLE_CONN_CFG_TAG_CUSTOM 1 + +#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION)) +#define SEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000000) / (RESOLUTION)) +// 0.625 msecs (625 usecs) +#define ADV_INTERVAL_UNIT_FLOAT_SECS (0.000625) +// Microseconds is the base unit. The macros above know that. +#define UNIT_0_625_MS (625) +#define UNIT_1_25_MS (1250) +#define UNIT_10_MS (10000) + +typedef bool (*ble_drv_evt_handler_t)(ble_evt_t*, void*); + +typedef enum { + SD_FLASH_OPERATION_DONE, + SD_FLASH_OPERATION_IN_PROGRESS, + SD_FLASH_OPERATION_ERROR, +} sd_flash_operation_status_t; + +// Flag indicating progress of internal flash operation. +extern volatile sd_flash_operation_status_t sd_flash_operation_status; + +typedef struct ble_drv_evt_handler_entry { + struct ble_drv_evt_handler_entry *next; + void *param; + ble_drv_evt_handler_t func; +} ble_drv_evt_handler_entry_t; + +void ble_drv_reset(void); +void ble_drv_add_event_handler(ble_drv_evt_handler_t func, void *param); +void ble_drv_remove_event_handler(ble_drv_evt_handler_t func, void *param); + +// Allow for user provided entries to prevent allocations outside the VM. +void ble_drv_add_event_handler_entry(ble_drv_evt_handler_entry_t* entry, ble_drv_evt_handler_t func, void *param); + +#endif // MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_DRV_H diff --git a/ports/nrf/bluetooth/ble_uart.c b/ports/nrf/bluetooth/ble_uart.c new file mode 100644 index 0000000000000..1e7a319bdd5f8 --- /dev/null +++ b/ports/nrf/bluetooth/ble_uart.c @@ -0,0 +1,193 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "ble.h" +#include "ble_uart.h" +#include "ringbuffer.h" +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/utils/interrupt_char.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Device.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +#if CIRCUITPY_SERIAL_BLE + +static const char default_name[] = "CP-REPL"; // max 8 chars or uuid won't fit in adv data +static const char NUS_UUID[] = "6e400001-b5a3-f393-e0a9-e50e24dcca9e"; + +#define NUS_RX_UUID 0x0002 +#define NUS_TX_UUID 0x0003 +#define BUFFER_SIZE 128 + +ringBuffer_typedef(uint8_t, ringbuffer_t); + +static bleio_device_obj_t m_device; +static bleio_service_obj_t *m_nus; +static bleio_characteristic_obj_t *m_tx_chara; +static bleio_characteristic_obj_t *m_rx_chara; + +static volatile bool m_cccd_enabled; + +static uint8_t m_rx_ring_buffer_data[BUFFER_SIZE]; +static ringbuffer_t m_rx_ring_buffer = { + .size = sizeof(m_rx_ring_buffer_data) + 1, + .elems = m_rx_ring_buffer_data, +}; + +STATIC void on_ble_evt(ble_evt_t *ble_evt, void *param) { + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_DISCONNECTED: + { + mp_obj_t device_obj = MP_OBJ_FROM_PTR(&m_device); + mp_call_function_0(mp_load_attr(device_obj, qstr_from_str("start_advertising"))); + break; + } + + case BLE_GATTS_EVT_WRITE: + { + ble_gatts_evt_write_t *write = &ble_evt->evt.gatts_evt.params.write; + + if (write->handle == m_tx_chara->cccd_handle) { + m_cccd_enabled = true; + } else if (write->handle == m_rx_chara->handle) { + for (size_t i = 0; i < write->len; ++i) { +#if MICROPY_KBD_EXCEPTION + if (write->data[i] == mp_interrupt_char) { + mp_keyboard_interrupt(); + } else +#endif + { + bufferWrite(&m_rx_ring_buffer, write->data[i]); + } + } + } + } + } +} + +void ble_uart_init(void) { + mp_obj_t device_obj = MP_OBJ_FROM_PTR(&m_device); + m_device.base.type = &bleio_device_type; + m_device.service_list = mp_obj_new_list(0, NULL); + m_device.notif_handler = mp_const_none; + m_device.conn_handler = mp_const_none; + m_device.conn_handle = 0xFFFF; + m_device.is_peripheral = true; + m_device.name = mp_obj_new_str(default_name, strlen(default_name), false); + common_hal_bleio_adapter_get_address(&m_device.address); + + mp_obj_t nus_uuid_str = mp_obj_new_str(NUS_UUID, strlen(NUS_UUID), false); + mp_obj_t nus_uuid_obj = bleio_uuid_type.make_new(&bleio_uuid_type, 1, 0, &nus_uuid_str); + mp_obj_t nus_obj = bleio_service_type.make_new(&bleio_service_type, 1, 0, &nus_uuid_obj); + m_nus = MP_OBJ_TO_PTR(nus_obj); + mp_call_function_1(mp_load_attr(device_obj, qstr_from_str("add_service")), nus_obj); + + mp_obj_t tx_uuid_int = mp_obj_new_int(NUS_TX_UUID); + mp_obj_t tx_uuid_obj = bleio_uuid_type.make_new(&bleio_uuid_type, 1, 0, &tx_uuid_int); + mp_obj_t tx_obj = bleio_characteristic_type.make_new(&bleio_characteristic_type, 1, 0, &tx_uuid_obj); + m_tx_chara = MP_OBJ_TO_PTR(tx_obj); + m_tx_chara->uuid->type = UUID_TYPE_128BIT; + m_tx_chara->uuid->uuid_vs_idx = m_nus->uuid->uuid_vs_idx; + m_tx_chara->props.notify = true; + mp_call_function_1(mp_load_attr(nus_obj, qstr_from_str("add_characteristic")), tx_obj); + + mp_obj_t rx_uuid_int = mp_obj_new_int(NUS_RX_UUID); + mp_obj_t rx_uuid_obj = bleio_uuid_type.make_new(&bleio_uuid_type, 1, 0, &rx_uuid_int); + mp_obj_t rx_obj = bleio_characteristic_type.make_new(&bleio_characteristic_type, 1, 0, &rx_uuid_obj); + m_rx_chara = MP_OBJ_TO_PTR(rx_obj); + m_rx_chara->uuid->type = UUID_TYPE_128BIT; + m_rx_chara->uuid->uuid_vs_idx = m_nus->uuid->uuid_vs_idx; + m_rx_chara->props.write = true; + m_rx_chara->props.write_wo_resp = true; + mp_call_function_1(mp_load_attr(nus_obj, qstr_from_str("add_characteristic")), rx_obj); + + mp_call_function_0(mp_load_attr(device_obj, qstr_from_str("start_advertising"))); + + ble_drv_add_event_handler(on_ble_evt, &m_device); + + m_cccd_enabled = false; + + while (!m_cccd_enabled) { + RUN_BACKGROUND_TASKS; + } +} + +bool ble_uart_connected(void) { + return (m_device.conn_handle != BLE_CONN_HANDLE_INVALID); +} + +char ble_uart_rx_chr(void) { + while (isBufferEmpty(&m_rx_ring_buffer)) { + RUN_BACKGROUND_TASKS; + } + + uint8_t byte; + bufferRead(&m_rx_ring_buffer, byte); + return (int)byte; +} + +bool ble_uart_stdin_any(void) { + return !isBufferEmpty(&m_rx_ring_buffer); +} + +void ble_uart_stdout_tx_str(const char *text) { + mp_hal_stdout_tx_strn(text, strlen(text)); +} + +int mp_hal_stdin_rx_chr(void) { + return ble_uart_rx_chr(); +} + +void mp_hal_stdout_tx_strn(const char *str, size_t len) { + size_t send_len; + + while (len > 0) { + if (len >= BLE_GATT_ATT_MTU_DEFAULT - 3) { + send_len = (BLE_GATT_ATT_MTU_DEFAULT - 3); + } else { + send_len = len; + } + + mp_buffer_info_t bufinfo = { + .buf = (uint8_t*)str, + .len = send_len, + }; + + common_hal_bleio_characteristic_write_value(m_tx_chara, &bufinfo); + + len -= send_len; + str += send_len; + } +} + +#endif // CIRCUITPY_SERIAL_BLE diff --git a/ports/nrf/drivers/bluetooth/ble_uart.h b/ports/nrf/bluetooth/ble_uart.h similarity index 80% rename from ports/nrf/drivers/bluetooth/ble_uart.h rename to ports/nrf/bluetooth/ble_uart.h index e67176a26feb6..d86e6293ae558 100644 --- a/ports/nrf/drivers/bluetooth/ble_uart.h +++ b/ports/nrf/bluetooth/ble_uart.h @@ -24,19 +24,17 @@ * THE SOFTWARE. */ -#ifndef BLUETOOTH_LE_UART_H__ -#define BLUETOOTH_LE_UART_H__ +#ifndef MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_UART_H +#define MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_UART_H -#if BLUETOOTH_SD +#include -#include "modubluepy.h" #include "ble_drv.h" -void ble_uart_init0(void); -void ble_uart_advertise(void); +void ble_uart_init(void); bool ble_uart_connected(void); -bool ble_uart_enabled(void); +char ble_uart_rx_chr(void); +bool ble_uart_stdin_any(void); +void ble_uart_stdout_tx_str(const char *text); -#endif // BLUETOOTH_SD - -#endif // BLUETOOTH_LE_UART_H__ +#endif // MICROPY_INCLUDED_NRF_BLUETOOTH_BLE_UART_H diff --git a/ports/nrf/bluetooth/bluetooth_common.mk b/ports/nrf/bluetooth/bluetooth_common.mk new file mode 100644 index 0000000000000..67b779c90396c --- /dev/null +++ b/ports/nrf/bluetooth/bluetooth_common.mk @@ -0,0 +1,36 @@ +ifeq ($(SD), s140) + CFLAGS += -DBLUETOOTH_SD=140 + CFLAGS += -DBLE_API_VERSION=4 +else +$(error Incorrect softdevice set flag) +endif + +CFLAGS += -DBLUETOOTH_SD_DEBUG=1 +CFLAGS += -DSOFTDEVICE_PRESENT + +INC += -Ibluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include +INC += -Ibluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT) + +SOFTDEV_HEX_NAME = $(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_softdevice.hex +SOFTDEV_HEX_PATH = bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION) +SOFTDEV_HEX = $(SOFTDEV_HEX_PATH)/$(SOFTDEV_HEX_NAME) + +define STACK_MISSING_ERROR + + +###### ERROR: Bluetooth LE Stack not found ############ +# # +# The build target requires a Bluetooth LE stack. # +# $(SOFTDEV_HEX) not found. # +# # +# Please run the download script: # +# # +# bluetooth/download_ble_stack.sh # +# # +####################################################### + +endef + +ifeq ($(shell test ! -e $(SOFTDEV_HEX) && echo -n no),no) + $(error $(STACK_MISSING_ERROR)) +endif diff --git a/ports/nrf/drivers/bluetooth/ringbuffer.h b/ports/nrf/bluetooth/ringbuffer.h similarity index 84% rename from ports/nrf/drivers/bluetooth/ringbuffer.h rename to ports/nrf/bluetooth/ringbuffer.h index 3438b5c9b5bc1..9a06e7ccc407c 100644 --- a/ports/nrf/drivers/bluetooth/ringbuffer.h +++ b/ports/nrf/bluetooth/ringbuffer.h @@ -79,21 +79,21 @@ BUF.elems = (T*)calloc(BUF.size, sizeof(T)) -#define bufferDestroy(BUF) free(BUF->elems) -#define nextStartIndex(BUF) ((BUF->start + 1) % BUF->size) -#define nextEndIndex(BUF) ((BUF->end + 1) % BUF->size) -#define isBufferEmpty(BUF) (BUF->end == BUF->start) -#define isBufferFull(BUF) (nextEndIndex(BUF) == BUF->start) +#define bufferDestroy(BUF) free((BUF)->elems) +#define nextStartIndex(BUF) (((BUF)->start + 1) % (BUF)->size) +#define nextEndIndex(BUF) (((BUF)->end + 1) % (BUF)->size) +#define isBufferEmpty(BUF) ((BUF)->end == (BUF)->start) +#define isBufferFull(BUF) (nextEndIndex(BUF) == (BUF)->start) #define bufferWrite(BUF, ELEM) \ - BUF->elems[BUF->end] = ELEM; \ - BUF->end = (BUF->end + 1) % BUF->size; \ + (BUF)->elems[(BUF)->end] = ELEM; \ + (BUF)->end = ((BUF)->end + 1) % (BUF)->size; \ if (isBufferEmpty(BUF)) { \ - BUF->start = nextStartIndex(BUF); \ + (BUF)->start = nextStartIndex(BUF); \ } #define bufferRead(BUF, ELEM) \ - ELEM = BUF->elems[BUF->start]; \ - BUF->start = nextStartIndex(BUF); + ELEM = (BUF)->elems[(BUF)->start]; \ + (BUF)->start = nextStartIndex(BUF); #endif diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox new file mode 100644 index 0000000000000..a444c5e4ecf86 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox @@ -0,0 +1,3897 @@ +/** + * @addtogroup BLE_COMMON + * @{ + * @defgroup BLE_COMMON_MSC Message Sequence Charts + * @{ + * + * @defgroup BLE_COMMON_ENABLE BLE Stack Enable + * @{ + * @msc + * hscale = "1.5"; + * APP,SD; + * |||; + * APP=>SD [label = "sd_softdevice_enable(clock, assertion_handler);"]; + * APP<SD [label = "sd_ble_cfg_set(cfg_id, cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_cfg_set(cfg_id, cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_enable(&app_ram_base);"]; + * APP<SD [label = "sd_ble_enable(&app_ram_base);"]; + * APP<SD [label = "sd_ble_enable(&app_ram_base);"]; + * APP<SD [label = "sd_softdevice_enable(clock, assertion_handler);"]; + * APP<SD [label = "sd_ble_cfg_set(cfg_id, cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_cfg_set(cfg_id, cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_enable(&app_ram_base);"]; + * APP<SD [label = "sd_softdevice_enable(clock, assertion_handler);"]; + * APP<SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GAP, cfg = {conn_cfg_tag = 1, gap_conn_cfg.conn_count = 1, app_ram_base);"]; + * APP<SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATT, cfg = {conn_cfg_tag = 1, gatt_conn_cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATTC, cfg = {conn_cfg_tag = 1, gattc_conn_cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATTS, cfg = {conn_cfg_tag = 1, gatts_conn_cfg, app_ram_base);"]; + * APP<SD [label = "sd_ble_enable(&app_ram_base);"]; + * APP<SD [label = "sd_ble_gap_connect(params, conn_cfg_tag = BLE_CONN_CFG_TAG_DEFAULT);"]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params)"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle, conn_cfg_tag = 1);"]; + * APP<SD [label = "sd_ble_gap_connect(params, conn_cfg_tag = 1);"]; + * APP<SD [label = "sd_softdevice_enable(clock, assertion_handler);"]; + * APP<SD [label = "sd_nvic_EnableIRQ(SD_EVT_IRQn)"]; + * APP<APP [label = "SD_EVT_IRQHandler()"]; + * APP=>SD [label = "sd_ble_evt_get(buffer);"]; + * APP<SD [label = "sd_softdevice_enable(clock, assertion_handler);"]; + * APP<SD [label = "sd_app_evt_wait(void);"]; + * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"]; + * |||; + * ...; + * |||; + * SD rbox SD [label="Event Available for the App"]; + * APP<SD [label = "sd_ble_evt_get(buffer);"]; + * APP<SD [label = "sd_app_evt_wait(void);"]; + * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"]; + * |||; + * ...; + * |||; + * SD rbox SD [label="Event Available for the App"]; + * APP<SD [label = "sd_ble_evt_get(buffer);"]; + * APP<SD [label = "sd_app_evt_wait(void);"]; + * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"]; + * |||; + * ...; + * |||; + * @endmsc + * + * @} + * @} + */ + +/** + * @addtogroup BLE_GAP + * @{ + * @defgroup BLE_GAP_MSC Message Sequence Charts + * @{ + * @defgroup BLE_GAP_ADV_MSC Advertising + * @{ + * @defgroup BLE_GAP_ADV_MSC_LEGACY Advertising using legacy advertising PDUs + * @msc + * hscale = "1.5"; + * APP,SD,SCANNERS; + * |||; + * APP=>SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params)"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle, conn_cfg_tag = BLE_CONN_CFG_TAG_DEFAULT)"]; + * APP<SCANNERS [label = "Advertisement (ADV_IND/ADV_DIRECT_IND/ADV_NONCONN_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_IND/ADV_DIRECT_IND/ADV_NONCONN_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_IND/ADV_DIRECT_IND/ADV_NONCONN_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD->SCANNERS [label = "Advertisement (ADV_IND/ADV_DIRECT_IND/ADV_NONCONN_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 App Stops Advertisement "]; + * APP=>SD [label = "sd_ble_gap_adv_stop(adv_handle)"]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params : properties : type = BLE_GAP_ADV_TYPE_EXTENDED_*)"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle, conn_cfg_tag = BLE_CONN_CFG_TAG_DEFAULT)"]; + * APP<SCANNERS [label = "Advertisement (ADV_EXT_IND) on 1MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (AUX_*_IND) on 1MBPS/2MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_EXT_IND) on 1MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (AUX_*_IND) on 1MBPS/2MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD->SCANNERS [label = "Advertisement (ADV_EXT_IND) on 1MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (AUX_*_IND) on 1MBPS/2MBPS/CODED PHY", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 App Stops Advertisement "]; + * APP=>SD [label = "sd_ble_gap_adv_stop(adv_handle)"]; + * APP<CENTRAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED"]; + * |||; + * --- [label = " Variant #1 Local Disconnection "]; + * APP=>SD [label = "sd_ble_gap_disconnect(reason)"]; + * APP<CENTRAL [label = "Connection Termination", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"]; + * |||; + * --- [label = " Variant #2 Remote Disconnection "]; + * SD<:CENTRAL [label = "Connection Termination", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"]; + * @endmsc + * + * @defgroup BLE_GAP_CPU_MSC Peripheral Connection Parameter Update + * @msc + * hscale = "1.5"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established with conn. params. CP#1"]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(CP#2)"]; + * APP<CENTRAL [label = "L2CAP Connection Parameter Update Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 Central Accepts "]; + * |||; + * SD<:CENTRAL [label = "L2CAP Connection Parameter Update Response: Accepted", textcolor="#000080", linecolor="#000080"]; + * SD<:CENTRAL [label = "LL Connection Update (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#2}"]; + * |||; + * --- [label = " Variant #2 Central Rejects "]; + * |||; + * SD<:CENTRAL [label = "L2CAP Connection Parameter Update Response: Rejected", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#1}"]; + * --- [label = " Variant #3 Central Ignores "]; + * |||; + * ...; + * |||; + * SD box SD [label="Timeout"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#1}"]; + * @endmsc + * + * @defgroup BLE_GAP_RSSI_FILT_MSC RSSI for connections with event filter + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * --- [label = " Variant #1: Trigger event when a new RSSI is available"]; + * |||; + * APP=>SD [label = "sd_ble_gap_rssi_start(conn_handle, 0, 0)"]; + * APP<SD [label = "sd_ble_gap_rssi_stop()"]; + * APP<SD [label = "sd_ble_gap_rssi_start(conn_handle, 0x05, 0x00)"]; + * APP<SD [label = "sd_ble_gap_rssi_stop()"]; + * APP<SD [label = "sd_ble_gap_rssi_start(conn_handle, 0x05, 0x03)"]; + * APP<SD [label = "sd_ble_gap_rssi_stop()"]; + * APP<SD [label = "sd_ble_gap_rssi_get(conn_handle, p_rssi, p_ch_index)"]; + * APP<SD [label = "sd_ble_gap_rssi_start(conn_handle, BLE_GAP_RSSI_THRESHOLD_INVALID, 0x00)"]; + * APP<SD [label = "sd_ble_gap_rssi_get(conn_handle, p_rssi, p_ch_index)"]; + * APP<SD [label = "sd_ble_gap_rssi_get(conn_handle, p_rssi, p_ch_index)"]; + * APP<SD [label = "sd_ble_gap_rssi_stop()"]; + * APP<SD [label = "sd_ble_gap_authenticate(params)"]; + * APP<CENTRAL [label = "SMP Security Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 Central initiates Security Establishment "]; + * |||; + * APP rbox CENTRAL [label="Encryption or Pairing/Bonding initiated by Central"]; + * |||; + * --- [label = " Variant #2 Central ignores "]; + * |||; + * ...; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Timeout, error_src: local}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_LEGACY_MSC Peripheral Legacy Pairing + * @{ + * + * @defgroup BLE_GAP_PERIPH_PAIRING_JW_MSC Pairing: Just Works + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: no_bond, no_mitm, no_io_caps}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: no_bond, no_mitm, no_io_caps, p_keyset: NULL)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD abox CENTRAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_BONDING_JW_MSC Bonding: Just Works + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, no_mitm, no_io_caps}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: bond, no_mitm, no_io_caps, p_keyset)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD abox CENTRAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC Bonding: Passkey Entry, Peripheral displays + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, mitm, keyboard}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: bond, mitm, display, p_keyset)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=0}"]; + * APP rbox APP [label="Passkey displayed to the user"]; + * |||; + * SD abox CENTRAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC Bonding: Passkey Entry, User Inputs on Peripheral or OOB + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, mitm, display}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: bond, mitm, keyboard, p_keyset)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_KEY_REQUEST {type}"]; + * APP rbox APP [label="User enters Passkey or data received Out Of Band"]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(passkey or OOB)"]; + * APP<SD [label = "sd_ble_opt_set(opt_id = BLE_GAP_OPT_PASSKEY, p_opt->p_passkey=passkey)"]; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, mitm, keyboard}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: bond, mitm, display, p_keyset)"]; + * + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=0}"]; + * APP rbox APP [label="Passkey displayed to the user"]; + * |||; + * SD abox CENTRAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC Pairing failure: Confirm failed + * This occurs if the random value doesn't match, usually because the user entered a wrong pin + * or out of band data was missing. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: mitm, display}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: mitm, keyboard, p_keyset: NULL)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * SD<:CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"]; + * SD:>CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"]; + * SD<:CENTRAL [label = "SMP Pairing Random", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Confirm value, error_src: local}"]; + * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @} + * + * @defgroup BLE_GAP_PERIPH_LESC_MSC Peripheral LESC Pairing + * @{ + * + * @defgroup BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC Pairing: Just Works + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, no_bond, no_mitm, no_io_caps}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: lesc, no_bond, no_mitm, no_io_caps, p_pk_own)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * SD:>CENTRAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * SD abox CENTRAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App completes DHKey calculation"]; + * APP=>SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<CENTRAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_LESC_BONDING_NC_MSC Bonding: Numeric Comparison + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, display(kbd/yesno)}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: lesc, bond, mitm, display(kbd/yesno), keyset with p_pk_own)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * SD:>CENTRAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * SD abox CENTRAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=1}"]; + * APP rbox APP [label="Passkey displayed to the user, user compares values"]; + * |||; + * --- [label = " Variant #1 User confirms on both sides "]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(BLE_GAP_AUTH_KEY_TYPE_PASSKEY, NULL)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<CENTRAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * --- [label = " Variant #2 User does not confirm locally "]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(BLE_GAP_AUTH_KEY_TYPE_NONE, NULL)"]; + * APP<CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #3 User does not confirm remotely "]; + * SD<:CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: num comp failure, error_src: remote}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC Bonding: Passkey Entry, Peripheral Displays + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, keyboard}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: lesc, bond, mitm, display, keyset with p_pk_own)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=0}"]; + * APP rbox APP [label="Passkey displayed to the user"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * SD:>CENTRAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * --- [label = " Optional keypresses from peer "]; + * SD<:CENTRAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_KEY_PRESSED {type}"]; + * APP abox APP [label="App displays keypress"]; + * SD<:CENTRAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_KEY_PRESSED {type}"]; + * APP abox APP [label="App displays keypress"]; + * |||; + * --- [label = ""]; + * SD abox CENTRAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App completes DHKey calculation"]; + * APP=>SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<CENTRAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC Bonding: Passkey Entry, User Inputs on Peripheral + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, display}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: lesc, bond, mitm, keyboard, keyset with p_pk_own)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_KEY_REQUEST {passkey}"]; + * APP rbox APP [label="User enters Passkey"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * SD:>CENTRAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * --- [label = " Optional keypresses sent to peer "]; + * APP=>SD [label = "sd_ble_gap_keypress_notify(type)"]; + * APP<CENTRAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP=>SD [label = "sd_ble_gap_keypress_notify(type)"]; + * APP<CENTRAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = ""]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(passkey)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<CENTRAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC Bonding: Out of Band + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP=>SD [label = "sd_ble_gap_addr_set(addr)"]; + * APP<SD [label = "sd_ble_gap_lesc_oob_data_get(p_pk_own, p_oobd_own)"]; + * APP<SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: lesc, bond, oob, keyset with p_pk_own)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk, oobd_req=1}"]; + * SD:>CENTRAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * APP=>SD [label = "sd_ble_gap_lesc_oob_data_set(p_oobd_own, p_oobd_peer)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<CENTRAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @} + * + * @defgroup BLE_GAP_PERIPH_PAIRING_KS_OUT_OF_RANGE_MSC Pairing failure: Keysize out of supported range + * This occurs if the min key size offered by the peer is above 16, or max key size below 7. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Invalid params, error_src: local}"]; + * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC GAP Failed Pairing: Keysize too small + * This occurs if the max key size offered by the peer is below the min key size specified by + * the app. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * SD<:CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Enc key size, error_src: local}"]; + * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC Pairing failure: Pairing aborted by the application + * When the application detects that the pairing should not be performed, for example an + * insufficient IO combination, it can use sd_ble_gap_sec_params_reply() to send + * SMP Pairing failed to the peer. + * + * When the stack handles the response from the application it will also validate + * the passkey (SMP_STC_PASSKEY_ENTRY_FAILED). If any error is detected it will be + * reported when sd_ble_gap_sec_params_reply() is called. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"]; + * SD abox APP [label="Stack looks for errors", textbgcolor="#7f7fff"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply()"]; + * APP<CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: , error_src: local}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC Pairing failure: Pairing failed from central + * SMP Pairing Failed may be sent from the central at various times. The application should + * prepare for this and gracefully handle the event. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * SD<:CENTRAL [label = "SMP Pairing Failed", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: , error_src: remote}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC Pairing failure: Timeout + * This occurs if the central device doesn't continue the pairing sequence within 30 seconds. + * @msc + * hscale = "2"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"]; + * APP<CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * --- [ label = "Wait 30 sec" ]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Timeout, error_src: local}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_ENC_MSC Peripheral Encryption Establishment using stored keys + * @msc + * hscale = "1.5"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established"]; + * |||; + * SD<:CENTRAL [label = "LL Encryption Request (LL_ENC_REQ)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_INFO_REQUEST {addr, ediv, rand}"]; + * |||; + * --- [label = " Variant #1 App Replies with Keys "]; + * |||; + * APP rbox APP [label = "Load Peripheral Keys"]; + * APP=>SD [label = "sd_ble_gap_sec_info_reply(ediv, rand, LTK)"]; + * APP<CENTRAL [label = "LL Encryption Response (LL_ENC_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP rbox CENTRAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE"]; + * |||; + * --- [label = " Variant #2 App Replies without Keys "]; + * |||; + * APP=>SD [label = "sd_ble_gap_sec_info_reply(NULL)"]; + * APP<CENTRAL [label = "LL Reject Ind (LL_REJECT_IND): Pin or Key Missing", textcolor="#000080", linecolor="#000080"]; + * APP rbox CENTRAL [label = "Link is NOT encrypted"]; + * |||; + * --- [label = " Variant #3 App Replies with Incorrect Keys "]; + * |||; + * APP rbox APP [label = "Load Incorrect Peripheral Keys"]; + * APP=>SD [label = "sd_ble_gap_sec_info_reply(ediv, rand, LTK)"]; + * APP<CENTRAL [label = "LL Encryption Response (LL_ENC_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP rbox CENTRAL [label = "Link Terminated due to authentication error"]; + * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {MIC Failure}"]; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_INVALID_SMP_PDU_MSC Unexpected Security Packet Reception + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="No pairing in progress"]; + * |||; + * PEER rbox PEER [label="Peer misbehaving"]; + * |||; + * SD<:PEER [label = "SMP Pairing Failed (or other unexpected SMP PDU)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {PDU_INVALID}"]; + * |||; + * @endmsc + * @} + * + * + * @defgroup BLE_GAP_SCAN_MSC Scanning + * @{ + * @defgroup BLE_GAP_SCAN_MSC_LEGACY Scanning for advertisers performing legacy advertising + * @msc + * hscale = "1.5"; + * APP,SD,ADVERTISERS; + * |||; + * APP=>SD [label = "sd_ble_gap_scan_start(params : extended = 0, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params : {extended = 0, active = 1}, adv_report_buffer)"]; + * APP<ADVERTISERS [label = "Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Scan Response (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {bdaddr, rssi, data}"]; + * ...; + * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_SCAN}"]; + * |||; + * @endmsc + * @defgroup BLE_GAP_SCAN_MSC_AE Scanning for advertisers performing legacy and extended advertising + * @msc + * hscale = "1.5"; + * APP,SD,ADVERTISERS; + * |||; + * APP=>SD [label = "sd_ble_gap_scan_start(params : {extended = 1, report_incomplete_evts = 0}, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params : {extended = 1, active = 1, report_incomplete_evts = 0}, adv_report_buffer)"]; + * APP<ADVERTISERS [label = "Scan Request (AUX_SCAN_REQ) on secondary_phy", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Scan Response (AUX_SCAN_RSP) on secondary_phy", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 1, scannable = 1, scan_response = 1}, data}"]; + * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<ADVERTISERS [label = "Legacy Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 0, scannable = 1, scan_response = 0}, adv_data}"]; + * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params : {extended = 1, report_incomplete_evts = 1}, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_connect(scan_params : extended = 0, conn_params)"]; + * APP<PERIPHERAL [label = "LL Connect (CONNECT_IND)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED"]; + * |||; + * --- [label = " Variant #2 Connection Establishment Cancelled "]; + * APP=>SD [label = "sd_ble_gap_connect_cancel()"]; + * APP<SD [label = "sd_ble_gap_connect(scan_params={extended=1,scan_phys=PHY_A and PHY_B}, conn_params)"]; + * APP<PERIPHERAL [label = "LL Connect Request(AUX_CONNECT_REQ) on secondary_phy", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERAL [label = "LL Connect Response(AUX_CONNECT_RSP) on secondary_phy", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED"]; + * |||; + * --- [label = " Variant #2 Connection Establishment Cancelled "]; + * APP=>SD [label = "sd_ble_gap_connect_cancel()"]; + * APP<SD [label = "sd_ble_gap_connect(scan_params={extended=1,scan_phys=PHY_A}, conn_params)"]; + * APP<SD [label = "sd_ble_gap_conn_param_update(CP#2)"]; + * APP<PERIPHERAL [label = "LL Connection Update (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#2}"]; + * |||; + * --- [label = " Peripheral Solicited procedure"]; + * |||; + * SD<:PERIPHERAL [label = "L2CAP Connection Parameter Update Request {CP#3}", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST {CP#3}"]; + * |||; + * --- [label = " Variant #1 App Accepts "]; + * APP=>SD [label = "sd_ble_gap_conn_param_update(CP#3)"]; + * APP<PERIPHERAL [label = "L2CAP Connection Parameter Update Response: Accepted", textcolor="#000080", linecolor="#000080"]; + * SD:>PERIPHERAL [label = "LL Connection Update (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#3}"]; + * |||; + * --- [label = " Variant #2 App Rejects "]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(NULL)"]; + * APP<PERIPHERAL [label = "L2CAP Connection Parameter Update Response: Rejected", textcolor="#000080", linecolor="#000080"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_SEC_MSC Central Security Procedures + * @{ + * + * @defgroup BLE_GAP_CENTRAL_SEC_REQ_MSC Security Request Reception + * @msc + * hscale = "1.5"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Security Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_REQUEST {bond, mitm}"]; + * |||; + * --- [label = " Variant #1 Central initiates Security Establishment "]; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(ediv, rand, LTK)"]; + * APP<SD [label = "sd_ble_gap_authenticate(params)"]; + * APP<SD [label = "sd_ble_gap_authenticate(NULL)"]; + * APP<PERIPHERAL [label = "SMP Pairing Failed: Pairing Not Supported", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Pairing Not Supp, error_src: local}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_LEGACY_MSC Central Legacy Pairing + * @{ + * + * @defgroup BLE_GAP_CENTRAL_PAIRING_JW_MSC Pairing: Just Works + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(no_bond, no_mitm, no_io_caps)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: no_bond, no_mitm, no_io_caps}"]; + * |||; + * --- [label = " Variant #1 Central Accepts Peripheral parameters "]; + * |||; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, p_keyset: NULL)"]; + * |||; + * SD abox PERIPHERAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * |||; + * --- [label = " Variant #2 Central Rejects Peripheral parameters "]; + * |||; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(BLE_GAP_SEC_STATUS_INVALID_PARAMS, own_params: NULL, p_keyset: NULL)"]; + * |||; + * SD:>PERIPHERAL [label = "SMP Pairing Failed", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {FAILURE}"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_BONDING_JW_MSC Bonding: Just Works + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(bond, no_mitm, no_io_caps)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, no_mitm, no_io_caps}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, p_keyset)"]; + * |||; + * SD abox PERIPHERAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC Bonding: Passkey Entry, Central displays + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(bond, mitm, display)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, mitm, keyboard}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, p_keyset)"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=0}"]; + * APP rbox APP [label="Passkey displayed to the user"]; + * |||; + * SD abox PERIPHERAL [label="Legacy Pairing Phase 2", textbgcolor="#7f7fff"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with STK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC Bonding: Passkey Entry, User Inputs on Central or OOB + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(bond, mitm, keyboard)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: bond, mitm, display}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, p_keyset)"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_KEY_REQUEST {type}"]; + * APP rbox APP [label="User enters Passkey or data received Out Of Band"]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(passkey or OOB)"]; + * APP<SD [label = "sd_ble_gap_authenticate(lesc, no_bond, no_mitm, no_io_caps)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, no_bond, no_mitm, no_io_caps}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, p_pk_own)"]; + * APP<PERIPHERAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * SD abox PERIPHERAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * APP abox APP [label="App completes DHKey calculation"]; + * APP=>SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<PERIPHERAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC Bonding: Numeric Comparison + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(lesc, bond, mitm, display(kbd/yesno))"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, display(kbd/yesno)}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, keyset with p_pk_own)"]; + * APP<PERIPHERAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * SD abox PERIPHERAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey, match_request=1}"]; + * APP rbox APP [label="Passkey displayed to the user, user compares values"]; + * |||; + * --- [label = " Variant #1 User confirms on both sides "]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(BLE_GAP_AUTH_KEY_TYPE_PASSKEY, NULL)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<PERIPHERAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * --- [label = " Variant #2 User does not confirm locally "]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(BLE_GAP_AUTH_KEY_TYPE_NONE, NULL)"]; + * APP<PERIPHERAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #3 User does not confirm remotely "]; + * SD<:PERIPHERAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: num comp failure, error_src: remote}"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC Bonding: Passkey Entry: Central Displays + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(lesc, bond, mitm, display)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, keyboard}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, keyset with p_pk_own)"]; + * APP<PERIPHERAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * --- [label = " Optional keypresses from peer "]; + * SD<:PERIPHERAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_KEY_PRESSED {type}"]; + * APP abox APP [label="App displays keypress"]; + * SD<:PERIPHERAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_KEY_PRESSED {type}"]; + * APP abox APP [label="App displays keypress"]; + * |||; + * --- [label = ""]; + * SD abox PERIPHERAL [label="LESC Authentication Stage 1", textbgcolor="#7f7fff"]; + * |||; + * APP abox APP [label="App completes DHKey calculation"]; + * APP=>SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<PERIPHERAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC Bonding: Passkey Entry: User Inputs on Central + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate(lesc, bond, mitm, keyboard)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, mitm, display}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, keyset with p_pk_own)"]; + * APP<PERIPHERAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk}"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * --- [label = " Optional keypresses sent to peer "]; + * APP=>SD [label = "sd_ble_gap_keypress_notify(type)"]; + * APP<PERIPHERAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * APP=>SD [label = "sd_ble_gap_keypress_notify(type)"]; + * APP<PERIPHERAL [label = "Keypress Notification", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = ""]; + * APP=>SD [label = "sd_ble_gap_auth_key_reply(passkey)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<PERIPHERAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC Bonding: Out of Band + * @msc + * hscale = "2"; + * APP,SD,PERIPHERAL; + * |||; + * APP=>SD [label = "sd_ble_gap_addr_set(addr)"]; + * APP<SD [label = "sd_ble_gap_lesc_oob_data_get(p_pk_own, p_oobd_own)"]; + * APP<SD [label = "sd_ble_gap_authenticate(lesc, bond, oob)"]; + * APP<PERIPHERAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {peer_params: lesc, bond, oob}"]; + * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, own_params: NULL, keyset with p_pk_own)"]; + * APP<PERIPHERAL [label = "SMP Pairing Public Key: PKa", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing Public Key: PKb", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_LESC_DHKEY_REQUEST {p_peer_pk, oobd_req=1}"]; + * |||; + * APP abox APP [label="App starts DHKey calculation"]; + * |||; + * APP=>SD [label = "sd_ble_gap_lesc_oob_data_set(p_oobd_own, p_oobd_peer)"]; + * APP<SD [label = "sd_ble_gap_lesc_dhkey_reply(p_dhkey)"]; + * APP<PERIPHERAL [label = "SMP Pairing DHKey Check: Ea", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERAL [label = "SMP Pairing DHKey Check: Eb", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {LESC_ENC_MITM}"]; + * |||; + * SD abox PERIPHERAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"]; + * |||; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"]; + * APP rbox APP [label = "Keys stored in keyset"]; + * @endmsc + * @} + * + * @defgroup BLE_GAP_CENTRAL_INVALID_SMP_PDU_MSC Unexpected Security Packet Reception + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="No pairing in progress"]; + * |||; + * PEER rbox PEER [label="Peer misbehaving"]; + * |||; + * SD<:PEER [label = "SMP Pairing Failed (or other unexpected SMP PDU)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {PDU_INVALID}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_ENC_MSC Encryption Establishment using stored keys + * @msc + * hscale = "1.5"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(ediv, rand, LTK)"]; + * APP<PERIPHERAL [label = "LL Encryption Request (LL_ENC_REQ)", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 Peripheral replies with keys "]; + * |||; + * PERIPHERAL rbox PERIPHERAL [label = "Peripheral Loads Keys"]; + * SD<:PERIPHERAL [label = "LL Encryption Response (LL_ENC_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP rbox PERIPHERAL [label = "Encrypted with LTK"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE"]; + * |||; + * --- [label = " Variant #2 Peripheral keys missing "]; + * |||; + * PERIPHERAL rbox PERIPHERAL [label = "Peripheral Keys Missing"]; + * SD<:PERIPHERAL [label = "LL Reject Ind (LL_REJECT_IND): Pin or Key Missing", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE"]; + * APP rbox PERIPHERAL [label = "Link is NOT encrypted"]; + * |||; + * --- [label = " Variant #3 Incorrect peripheral keys "]; + * |||; + * PERIPHERAL rbox PERIPHERAL [label = "Peripheral Loads Incorrect Keys"]; + * SD<:PERIPHERAL [label = "LL Encryption Response (LL_ENC_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP rbox PERIPHERAL [label = "Link Terminated due to authentication error"]; + * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {MIC Failure}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC Central Encryption and Authentication mutual exclusion + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(ediv, rand, LTK)"]; + * APP<PEER [label = "Encryption Start (LL_START_ENC_REQ)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP note SD [label = " Encryption in progress, authentication disallowed"]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate()"]; + * APP<SD [label = "sd_ble_gap_conn_param_update()"]; + * APP<PEER [label = "Connection Update Start (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(ediv, rand, LTK)"]; + * APP<SD [label = "sd_ble_gap_authenticate()"]; + * APP<PEER [label = "Encryption Start (LL_START_ENC_REQ)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "Encryption Complete (LL_START_ENC_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE "]; + * |||; + * APP=>SD [label = "sd_ble_gap_authenticate()"]; + * APP<SD [label = "sd_ble_gap_encrypt(ediv, rand, LTK)"]; + * APP<SD [label = "sd_ble_gap_conn_param_update(conn_handle_3, CP#3)"]; + * APP<PERIPHERALS [label = "Connection Update Start on link #3 (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(conn_handle_1, CP#1)"]; + * APP<SD [label = "sd_ble_gap_conn_param_update(conn_handle_2, CP#2)"]; + * APP<PERIPHERALS [label = "L2CAP Connection Parameter Update Response: Accepted", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP note PERIPHERALS [label = " Additional procedure on link #2 fails, since another one is pending"]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(conn_handle_2, CP#5)"]; + * APP<PERIPHERALS [label = "Connection Update Start on link #1 (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERALS [label = "Connection Update Complete on link #1", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {conn_handle_1, CP#1}"]; + * |||; + * SD:>PERIPHERALS [label = "Connection Update Start on link #2 (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP note PERIPHERALS [label = " Peripheral solicited procedure on link #4"]; + * |||; + * SD<:PERIPHERALS [label = "L2CAP Connection Parameter Update Request {CP#4}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST {conn_handle_4, CP#4}"]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(conn_handle_4, CP#4)"]; + * APP<PERIPHERALS [label = "L2CAP Connection Parameter Update Response: Accepted", textcolor="#000080", linecolor="#000080"]; + * |||; + * SD<:PERIPHERALS [label = "Connection Update Complete on link #2", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {conn_handle_2, CP#2}"]; + * |||; + * SD:>PERIPHERALS [label = "Connection Update Start on link #4 (LL_CONNECTION_UPDATE_IND)", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERALS [label = "Connection Update Complete on link #4", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {conn_handle_4, CP#4}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_MULTILINK_CTRL_PROC_MSC Central Control Procedure Serialization on multiple links + * @msc + * hscale = "1.5"; + * APP,SD,PERIPHERALS; + * |||; + * APP rbox PERIPHERALS [label="Connection Established with 4 peers, all with conn. params. CP#0"]; + * |||; + * APP note PERIPHERALS [label = " Peripheral solicited procedure on link #2"]; + * |||; + * SD<:PERIPHERALS [label = "L2CAP Connection Parameter Update Request {CP#2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST {conn_handle_2, CP#3}"]; + * |||; + * APP note PERIPHERALS [label = " Encryption procedure on link #3"]; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(conn_handle_3, LTK#3)"]; + * APP<PERIPHERALS [label = "Encryption Start (LL_START_ENC_REQ) on link #3", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP note PERIPHERALS [label = " Connection Update procedure on link #1"]; + * |||; + * APP=>SD [label = "sd_ble_gap_conn_param_update(conn_handle_1, CP#1)"]; + * APP<SD [label = "sd_ble_gap_conn_param_update(conn_handle_2, CP#2)"]; + * APP<PERIPHERALS [label = "L2CAP Connection Parameter Update Response: Accepted", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP note PERIPHERALS [label = " Encryption procedure on link #4"]; + * |||; + * APP=>SD [label = "sd_ble_gap_encrypt(conn_handle_4, LTK#4)"]; + * APP<PERIPHERALS [label = "Encryption Start (LL_START_ENC_REQ) on link #4", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERALS [label = "Encryption Complete (LL_START_ENC_RSP) on link #4", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {conn_handle_4}"]; + * |||; + * SD:>PERIPHERALS [label = "Connection Update Start (LL_CONNECTION_UPDATE_IND) on link #1", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERALS [label = "Connection Update Complete on link #1", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {conn_handle_1, CP#1}"]; + * |||; + * SD:>PERIPHERALS [label = "Connection Update Start (LL_CONNECTION_UPDATE_IND on link #2", textcolor="#000080", linecolor="#000080"]; + * SD<:PERIPHERALS [label = "Connection Update Complete on link #2", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {conn_handle_2, CP#2}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_WL_SHARE_MSC Whitelist Sharing + * @msc + * hscale = "1.5"; + * APP,SD; + * |||; + * APP=>SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: { fp = CONNREQ })"]; + * APP<SD [label = "sd_ble_gap_whitelist_set(WL#1)"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<SD [label = "sd_ble_gap_whitelist_set(WL#2)"]; + * APP<SD [label = "sd_ble_gap_scan_start(use_whitelist = 1, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_adv_stop(adv_handle)"]; + * APP<SD [label = "sd_ble_gap_scan_stop()"]; + * APP<SD [label = "sd_ble_gap_whitelist_set(WL#2)"]; + * APP<SD [label = "sd_ble_gap_scan_start(use_whitelist = 1, adv_report_buffer)"]; + * APP<SD [label = "sd_ble_gap_connect(use_whitelist = 1)"]; + * APP<SD [label = "sd_ble_gap_addr_set(addr)"]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = NULL})"]; + * APP<SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD box SD [label="Private address timeout"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable2", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 Advertise with address resolvable by local IRK in device identity list "]; + * |||; + * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {{peer_addr1, peer_irk1}}, pp_local_irks: {local_irk1}) "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = peer_addr1})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD box SD [label="Private address timeout"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Resolvable2", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #3 Advertise with non-resolvable address "]; + * |||; + * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: NON_RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = NULL})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Non-Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Non-Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Non-Resolvable1", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD box SD [label="Private address timeout"]; + * SD->SCANNERS [label = "Advertisement (ADV_*_IND), Addr = Non-Resolvable2", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GAP_PRIVACY_SCAN_MSC Private Scanning + * @msc + * hscale = "1.5"; + * APP,SD,ADVERTISERS; + * |||; + * APP=>SD [label = "sd_ble_gap_addr_set(addr)"]; + * APP<SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * SD->ADVERTISERS [label = "Scan Request packet (SCAN_REQ), Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS->SD [label = "Scan Response packet (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 Active Scan with address resolvable by local IRKs "]; + * |||; + * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {{peer_addr1, peer_irk1}, {peer_addr2, peer_irk2}}, pp_local_irks: {local_irk1, local_irk2}) "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_IND/ADV_SCAN_IND), Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * SD box ADVERTISERS [label = "peer_addr1 is in the device identity list, respond with an address generated from local_irk1"]; + * SD->ADVERTISERS [label = "Scan Request packet (SCAN_REQ), Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS->SD [label = "Scan Response packet (SCAN_RSP), Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * |||; + * ...; + * ADVERTISERS->SD [label = "Advertisement (ADV_IND/ADV_SCAN_IND), Addr = Resolvable2", textcolor="#000080", linecolor="#000080"]; + * SD box ADVERTISERS [label = "Resolvable2 resolved to device identity peer_addr2 in the device identity list, respond with an address generated from local_irk2"]; + * SD->ADVERTISERS [label = "Scan Request packet (SCAN_REQ), Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS->SD [label = "Scan Response packet (SCAN_RSP), Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * |||; + * ...; + * ADVERTISERS->SD [label = "Advertisement (ADV_IND/ADV_SCAN_IND), Addr = peer_addr3", textcolor="#000080", linecolor="#000080"]; + * SD box ADVERTISERS [label = "peer_addr3 is not in the device identity list, respond with an address generated from device_irk"]; + * SD->ADVERTISERS [label = "Scan Request packet (SCAN_REQ), Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS->SD [label = "Scan Response packet (SCAN_RSP), Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #3 Active Scan with non-resolvable address "]; + * |||; + * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: NON_RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_IND/ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; + * SD->ADVERTISERS [label = "Scan Request packet (SCAN_REQ), Addr = Non-Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS->SD [label = "Scan Response packet (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC Scan Private Devices + * @msc + * hscale = "1.5"; + * APP,SD,ADVERTISERS; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: NULL) "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD note ADVERTISERS [label="Resolvable1 resolved to device identity peer_addr1"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr1, rssi, data}"]; + * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Addr = peer_addr2", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr2, rssi, data}"]; + * |||; + * --- [label = " Variant #2 Scan and resolve private devices with whitelist "]; + * |||; + * APP=>SD [label = "sd_ble_gap_whitelist_set({peer_addr1, Resolvable2}) "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Addr = Resolvable1", textcolor="#000080", linecolor="#000080"]; + * SD note ADVERTISERS [label="Resolvable1 resolved to device identity peer_addr1 which is in the whitelist"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr1, rssi, data}"]; + * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Addr = Resolvable2", textcolor="#000080", linecolor="#000080"]; + * SD note ADVERTISERS [label="Resolvable2 did not resolve to a device identity but is in the whitelist"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {Resolvable2, rssi, data}"]; + * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Addr = Resolvable3", textcolor="#000080", linecolor="#000080"]; + * SD note ADVERTISERS [label="Resolvable3 is not in the whitelist, no report generated"]; + * |||; + * --- [label = " Variant #3 Scan directed advertisers and resolve initiator address using device IRK"]; + * |||; + * APP=>SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS box SD [label = "Advertiser Address resolved using peer_irk1, Initiator address resolved using device_irk"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr: peer_addr1"]; + * |||; + * --- [label = " Variant #4 Scan directed advertisers and resolve initiator address using local IRK in device identity list"]; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: local_irk1) "]; + * APP<SD [label = "sd_ble_gap_scan_start(params, adv_report_buffer)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS box SD [label = "Advertiser Address resolved using peer_irk1, Initiator address resolved using local_irk1"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr: peer_addr1"]; + * |||; + * --- [label = " Variant #5 Scan directed advertisers with unresolved direct address "]; + * |||; + * APP=>SD [label = "sd_ble_gap_scan_start(params: {adv_dir_report = 1}, adv_report)"]; + * APP<SD [label = "Advertisement (ADV_*_IND), Advertiser Addr = peer_addr2, Initiator Addr = Resolvable2", textcolor="#000080", linecolor="#000080"]; + * ADVERTISERS box SD [label = "Resolvable2 could not be resolved, report the unresolved direct address"]; + * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {peer_addr: peer_addr2, direct_addr: Resolvable2}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC Directed Advertising + * @msc + * hscale = "1.5"; + * APP,SD,INITIATOR; + * |||; + * APP=>SD [label = "sd_ble_gap_addr_set(addr)"]; + * APP<SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: NULL) "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = peer_addr1, properties.type = directed})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<INITIATOR[label = "Advertisement (ADV_DIRECT_IND) , Advertiser Addr = addr, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = addr, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = addr, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 Private directed advertising to private peer using device IRK"]; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: NULL) "]; + * APP<SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = peer_addr1, properties.type = directed})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #3 Private directed advertising to private peer using local IRK in device identity list"]; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: ) "]; + * APP<SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = peer_addr1, properties.type = directed})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle)"]; + * APP<INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = Resolvable", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #4 Private directed advertising to non-private peer using local IRK in device identity list"]; + * |||; + + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {{peer_addr1, peer_irk=0..0}}, pp_local_irks: {{local_irk1}}) "]; + * APP<SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; + * APP<SD [label = "sd_ble_gap_adv_set_configure(&adv_handle, adv_data, params: {p_peer_addr = peer_addr1, properties.type = directed})"]; + * APP<SD [label = "sd_ble_gap_adv_start(adv_handle})"]; + * APP<INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * SD->INITIATOR[label = "Advertisement (ADV_DIRECT_IND), Advertiser Addr = Resolvable, Initiator Addr = peer_addr1", textcolor="#000080", linecolor="#000080"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_PERIPH_CONN_PRIV_MSC Peripheral Connection Establishment with Private Peer + * @msc + * hscale = "1.5"; + * APP,SD,CENTRAL; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: NULL) "]; + * APP<CENTRAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED, peer_addr = {peer_addr1, addr_id_peer = 1}"]; + * |||; + * --- [label = " Variant #2 Peer used identity address during connection setup "]; + * |||; + * APP rbox CENTRAL [label="Start Connectable Advertising"]; + * |||; + * SD<:>CENTRAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED, peer_addr = {peer_addr1, addr_id_peer = 0}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_CENTRAL_CONN_PRIV_MSC Central Connection Establishment with Private Peer + * @msc + * hscale = "1.5"; + * APP,SD,PERIPHERAL; + * |||; + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: (Undefined, Undefined), pp_local_irks: NULL) "]; + * APP<SD [label = "sd_ble_gap_connect(peer_addr = {peer_addr1, addr_id_peer = 1})"]; + * APP<PERIPHERAL [label = "Scanning", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #1 Peer used resolvable addresses during connection setup "]; + * |||; + * SD<:>PERIPHERAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED, peer_addr = {peer_addr1, addr_id_peer = 1}"]; + * |||; + * --- [label = " Variant #2 Peer used identity address during connection setup "]; + * |||; + * SD<:>PERIPHERAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED, peer_addr = {peer_addr1, addr_id_peer = 0}"]; + * |||; + * @endmsc + * + * @} + * + * @defgroup BLE_GAP_EVT_PHY_MSC PHY Update Procedure + * @{ + * + * @defgroup BLE_GAP_CENTRAL_PHY_UPDATE Central PHY Update + * @msc + * hscale = "1.5"; + * APP,SD,PERIPHERAL; + * |||; + * APP rbox PERIPHERAL [label="Connection Established. Current TX PHY and RX PHY are both 1Mbit"]; + * |||; + * --- [label = " Variant #1 Initiated by Peripheral - no change in PHY "]; + * SD<=PERIPHERAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=2Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=1Mbit, rx_phys=1Mbit})"]; + * APP<PERIPHERAL [label = "PHY Update (LL_PHY_UPDATE_IND) - No change", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=1Mbit, rx_phy=1Mbit}}"]; + * |||; + * --- [label = " Variant #2 Initiated by Peripheral - change of PHY required"]; + * SD<=PERIPHERAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=2Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=2Mbit, rx_phys=2Mbit})"]; + * APP<PERIPHERAL [label = "PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=2Mbit, S_TO_M_PHY=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=2Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #3 Initiated by APP, not supported by peer"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<PERIPHERAL [label="PHY Request (LL_PHY_REQ)", textcolor="#000080", linecolor="#000080"]; + * SD<=PERIPHERAL [label="Unknown Response (LL_UNKNOWN_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label="BLE_GAP_EVT_PHY_UPDATE {Status=Not Supported}"]; + * |||; + * --- [label = " Variant #4 Initiated by APP, change required"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<PERIPHERAL [label = "PHY Request (LL_PHY_REQ) {ALL_PHY, ALL_PHY}", textcolor="#000080", linecolor="#000080"]; + * SD<=PERIPHERAL [label = "PHY Response (LL_PHY_RSP) {ALL_PHY, ALL_PHY}", textcolor="#000080", linecolor="#000080"]; + * SD=>PERIPHERAL [label = "PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=2Mbit, S_TO_M_PHY=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=2Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #5 Initiated by Peripheral - APP has no preferences for TX direction"]; + * SD<=PERIPHERAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=1Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=1Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=BLE_GAP_PHY_AUTO, rx_phys=2Mbit})"]; + * APP<PERIPHERAL [label = "PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=1Mbit, S_TO_M_PHY=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=1Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #6 Initiated by APP, peer responding with invalid parameters"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<PERIPHERAL [label="PHY Request (LL_PHY_REQ) {ALL_PHY, ALL_PHY}", textcolor="#000080", linecolor="#000080"]; + * SD<=PERIPHERAL [label="PHY Response (LL_PHY_RSP) {tx_phys=0x00, rx_phys=0x00}", textcolor="#000080", linecolor="#000080"]; + * SD=>PERIPHERAL [label="Unknown Response (LL_UNKNOWN_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label="BLE_GAP_EVT_PHY_UPDATE {Status=Invalid LMP Parameters}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GAP_PERIPHERAL_PHY_UPDATE Peripheral PHY Update + * @msc + * hscale = "1.5"; + * APP,SD,CENTRAL; + * |||; + * APP rbox CENTRAL [label="Connection Established. Current TX PHY and RX PHY are both 1Mbit"]; + * |||; + * --- [label = " Variant #1 Initiated by Central - no change in PHY "]; + * SD<=CENTRAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=2Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=1Mbit, rx_phys=1Mbit})"]; + * APP<CENTRAL [label = "PHY Response (LL_PHY_RSP) {tx_phys=1Mbit, rx_phys=1Mbit}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label = "PHY Update (LL_PHY_UPDATE_IND) - No change", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=1Mbit, rx_phy=1Mbit}}"]; + * |||; + * --- [label = " Variant #2 Initiated by Central - change of PHY required"]; + * SD<=CENTRAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=2Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=2Mbit, rx_phys=2Mbit})"]; + * APP<CENTRAL [label = "PHY Response (LL_PHY_RSP) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label = "PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=2Mbit, S_TO_M_PHY=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=2Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #3 Initiated by APP, not supported by peer"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<CENTRAL [label="PHY Request (LL_PHY_REQ)", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label="Unknown Response (LL_UNKNOWN_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label="BLE_GAP_EVT_PHY_UPDATE {Status=Not Supported}"]; + * |||; + * --- [label = " Variant #4 Initiated by APP, change required"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<CENTRAL [label="PHY Request (LL_PHY_REQ) {ALL_PHY, ALL_PHY}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label="PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=2Mbit, S_TO_M_PHY=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label="BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=2Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #5 Initiated by Central - APP has no preferences for TX direction"]; + * SD<=CENTRAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=1Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE_REQUEST {peer_preferred_phys={tx_phys=2Mbit, rx_phys=1Mbit}}"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=BLE_GAP_PHY_AUTO, rx_phys=2Mbit})"]; + * APP<CENTRAL [label = "PHY Response (LL_PHY_RSP) {tx_phys=ALL_PHY, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label = "PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=2Mbit, S_TO_M_PHY=1Mbit}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Success, {tx_phy=1Mbit, rx_phy=2Mbit}}"]; + * |||; + * --- [label = " Variant #6 Collision between self-initiated PHY Update and peer initiated Channel Map Update procedures"]; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {tx_phys=2Mbit, rx_phys=2Mbit})"]; + * APP<CENTRAL [label = "PHY Request (LL_PHY_REQ) {tx_phys=2Mbit, rx_phys=2Mbit}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label = "Reject Command (LL_REJECT_EXT_IND) {ErrorCode=Different Transaction Collision}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_PHY_UPDATE {status=Different Transaction Collision, {tx_phy=1Mbit, rx_phy=1Mbit}}"]; + * |||; + * --- [label = " Variant #7 Initiated by APP, peer responding with invalid parameters"]; + * |||; + * APP=>SD [label = "sd_ble_gap_phy_update(conn_handle, {ALL_PHY, ALL_PHY}) "]; + * APP<CENTRAL [label="PHY Request (LL_PHY_REQ) {ALL_PHY, ALL_PHY}", textcolor="#000080", linecolor="#000080"]; + * SD<=CENTRAL [label="PHY Update (LL_PHY_UPDATE_IND) {M_TO_S_PHY=(1Mbit|2Mbit), S_TO_M_PHY=(1Mbit|2Mbit)", textcolor="#000080", linecolor="#000080"]; + * SD=>CENTRAL [label="Unknown Response (LL_UNKNOWN_RSP)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label="BLE_GAP_EVT_PHY_UPDATE {Status=Invalid LMP Parameters}"]; + * |||; + * @endmsc + * + * @} + + * @defgroup BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC Data Length Update Procedure + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Self initiated, automatic parameters "]; + * |||; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, NULL, NULL)"]; + * APP<PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * |||; + * ...; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Self initiated, application set parameters "]; + * |||; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, NULL)"]; + * APP<PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * |||; + * ...; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Peer initiated, automatic parameters "]; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * SD<:PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST {.peer_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, NULL, NULL)"]; + * APP<PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * |||; + * ...; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Peer initiated, application set parameters"]; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * SD<:PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST {.peer_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, NULL)"]; + * APP<PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; + * |||; + * ...; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Using the limitation out parameter to adjust Link Layer Data Channel PDU size, memory limited "]; + * |||; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, &limitation)"]; + * APP<SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=200, .max_rx_octets=200, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, &limitation)"]; + * APP<PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=200, rx=200}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=200, .max_rx_octets=200, .max_tx_time_us=1712, .max_rx_time_us=1712}}"]; + * |||; + * ...; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Using the limitation out parameter to adjust Link Layer Data Channel PDU size, time limited "]; + * |||; + * SD rbox SD [label = "max_tx_octets=27, max_rx_octets=27"]; + * |||; + * ...; + * |||; + * APP=>SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, &limitation)"]; + * APP<SD [label = "sd_ble_gap_data_length_update(conn_handle, {.max_tx_octets=251-178=73, .max_rx_octets=251-178=73, .max_tx_time_us=BLE_GAP_DATA_LENGTH_AUTO, .max_rx_time_us=BLE_GAP_DATA_LENGTH_AUTO}, &limitation)"]; + * APP<PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=73, rx=73}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=73, .max_rx_octets=73, .max_tx_time_us=696, .max_rx_time_us=696}}"]; + * @endmsc + * @} + * + * @} + * @} + */ + +/** + * @addtogroup BLE_GATTC + * @{ + * @defgroup BLE_GATTC_MSC Message Sequence Charts + * @{ + * @defgroup BLE_GATTC_PRIM_SRVC_DISC_MSC GATTC Primary Service Discovery + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Variant #1 Discover All Services "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle, NULL)"]; + * APP<PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Group Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"]; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N, NULL)"]; + * APP<PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Group Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"]; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N + M, NULL)"]; + * APP<PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"]; + * |||; + * --- [label = " Variant #2 Discover a Specific Service "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle, uuid)"]; + * APP<PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Find By Type Value Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"]; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N, uuid)"]; + * APP<PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Find By Type Value Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"]; + * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N + M, uuid)"]; + * APP<PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"]; + * @endmsc + * + * @defgroup BLE_GATTC_REL_DISC_MSC GATTC Relationship Discovery + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {SUCCESS, includes}"]; + * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range + N)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {SUCCESS, includes}"]; + * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range + N + M)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {ATTRIBUTE_NOT_FOUND}"]; + * @endmsc + * + * @defgroup BLE_GATTC_CHAR_DISC_MSC GATTC Characteristic Discovery + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {SUCCESS, chars}"]; + * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range + N)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {SUCCESS, chars}"]; + * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range + N + M)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {ATTRIBUTE_NOT_FOUND}"]; + * @endmsc + * + * @defgroup BLE_GATTC_DESC_DISC_MSC GATTC Descriptor Discovery + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range)"]; + * APP<PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Find Information Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {SUCCESS, descs}"]; + * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range + N)"]; + * APP<PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Find Information Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {SUCCESS, descs}"]; + * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range + N + M)"]; + * APP<PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"]; + * @endmsc + * + * @defgroup BLE_GATTC_READ_UUID_MSC GATTC Read Characteristic Value by UUID + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {SUCCESS, char_values}"]; + * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range + N)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {SUCCESS, char_values}"]; + * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range + N + M)"]; + * APP<PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {ATTRIBUTE_NOT_FOUND}"]; + * @endmsc + * + * @defgroup BLE_GATTC_VALUE_READ_MSC GATTC Characteristic or Descriptor Value Read + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Variant #1 offset == 0 "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_read(handle, 0)"]; + * APP<PEER [label = "ATT Read Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"]; + * |||; + * --- [label = " Variant #2 offset != 0 "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_read(handle, offset)"]; + * APP<PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read Blob Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"]; + * APP=>SD [label = "sd_ble_gattc_read(handle, offset + N)"]; + * APP<PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read Blob Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"]; + * APP=>SD [label = "sd_ble_gattc_read(handle, offset + N + M + 1)"]; + * APP<PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Invalid Offset", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {INVALID_OFFSET}"]; + * @endmsc + * + * @defgroup BLE_GATTC_READ_MULT_MSC GATTC Read Multiple Characteristic Values + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Variant #1 Successful request "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_char_values_read(handles)"]; + * APP<PEER [label = "ATT Read Multiple Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Read Multiple Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VALS_READ_RSP {SUCCESS, char_values}"]; + * |||; + * --- [label = " Variant #2 Failing request (invalid handle) "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_char_values_read(handles)"]; + * APP<PEER [label = "ATT Read Multiple Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Error Response: Invalid Handle", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VALS_READ_RSP {INVALID_HANDLE, error_handle=}"]; + * @endmsc + * + * @defgroup BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC GATTC Characteristic Value Write Without Response + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * --- [label = " Variant #1 App does not keep track of the available queue element count for writes without responses "]; + * APP note PEER [label = " This variant makes it possible for APP to transmit writes without responses without keeping track of the available queue element count. However, successful queuing of writes without responses cannot be guaranteed. "]; + * |||; + * APP=>SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_1)"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_2)"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_3)"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_4)"]; + * APP<PEER [label = "ATT Write Command {value_1}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Write Command {value_2}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Write Command {value_4}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE {SUCCESS, 3}"]; + * |||; + * --- [label = " Variant #2 App keeps track of the available queue element count for writes without responses "]; + * APP note PEER [label = " This variant makes it possible for APP to know when successful queuing of writes without responses is guaranteed. "]; + * |||; + * APP=>SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATTC, gattc_conn_cfg.write_cmd_tx_queue_size = 2)"]; + * APP<SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_1)"]; + * APP<SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_2)"]; + * APP<PEER [label = "ATT Write Command {value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE {SUCCESS, 1}"]; + * APP abox APP [label="available_queue_element_count += 1"]; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_3)"]; + * APP<PEER [label = "ATT Write Command {value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE {SUCCESS, 1}"]; + * APP abox APP [label="available_queue_element_count += 1"]; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_CMD, handle, value_4)"]; + * APP<PEER [label = "ATT Write Command {value_3}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Write Command {value_4}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE {SUCCESS, 2}"]; + * APP abox APP [label="available_queue_element_count += 2"]; + * @endmsc + * + * @defgroup BLE_GATTC_VALUE_WRITE_MSC GATTC Characteristic or Descriptor Value Write + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_WRITE_REQ, handle, value)"]; + * APP<PEER [label = "ATT Write Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_WRITE_REQ, SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GATTC_VALUE_LONG_WRITE_MSC GATTC Characteristic or Descriptor Value Long Write + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_PREP_WRITE_REQ, handle, offset_1, value_1)"]; + * APP<PEER [label = "ATT Prepare Write Request {handle, offset_1, value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Response {handle, offset_1, value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_PREP_WRITE_REQ, SUCCESS, value_1}"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_PREP_WRITE_REQ, handle, offset_2, value_2)"]; + * APP<PEER [label = "ATT Prepare Write Request {handle, offset_2, value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Response {handle, offset_2, value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_PREP_WRITE_REQ, SUCCESS, value_2}"]; + * |||; + * ...; + * |||; + * --- [label = " Variant #1 App executes the Long Write procedure "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_EXEC_WRITE_REQ, PREPARED_WRITE)"]; + * APP<PEER [label = "ATT Execute Write Request: flags = 0x01", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_EXEC_WRITE_REQ, SUCCESS}"]; + * |||; + * --- [label = " Variant #2 App cancels the Long Write procedure "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_EXEC_WRITE_REQ, PREPARED_CANCEL)"]; + * APP<PEER [label = "ATT Execute Write Request: flags = 0x00", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_EXEC_WRITE_REQ, SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GATTC_VALUE_RELIABLE_WRITE_MSC GATTC Characteristic or Descriptor Value Reliable Write + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_PREP_WRITE_REQ, handle_1, offset, value_1)"]; + * APP<PEER [label = "ATT Prepare Write Request {handle_1, offset, value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Response {handle_1, offset, value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_PREP_WRITE_REQ, SUCCESS, value_1}"]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_PREP_WRITE_REQ, handle_2, offset, value_2)"]; + * APP<PEER [label = "ATT Prepare Write Request {handle_2, offset, value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Response {handle_2, offset, value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_PREP_WRITE_REQ, SUCCESS, value_2}"]; + * |||; + * ...; + * |||; + * --- [label = " Variant #1 App executes the Reliable Write procedure "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_EXEC_WRITE_REQ, PREPARED_WRITE)"]; + * APP<PEER [label = "ATT Execute Write Request: flags = 0x01", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_EXEC_WRITE_REQ, SUCCESS}"]; + * |||; + * --- [label = " Variant #2 App cancels the Reliable Write procedure "]; + * |||; + * APP=>SD [label = "sd_ble_gattc_write(BLE_GATT_OP_EXEC_WRITE_REQ, PREPARED_CANCEL)"]; + * APP<PEER [label = "ATT Execute Write Request: flags = 0x00", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {BLE_GATT_OP_EXEC_WRITE_REQ, SUCCESS}"]; + * @endmsc + * + * @defgroup BLE_GATTC_HVI_MSC GATTC Handle Value Indication + * GATTC Handle Value Indication MSC + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD<:PEER [label = "ATT Handle Value Indication", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_HVX {INDICATION, data}"]; + * APP=>SD [label = "sd_ble_gattc_hv_confirm(handle)"]; + * APP<PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTC_HVN_MSC GATTC Handle Value Notification + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD<:PEER [label = "ATT Handle Value Notification", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTC_EVT_HVX {NOTIFICATION, data}"]; + * @endmsc + * + * @defgroup BLE_GATTC_TIMEOUT_MSC GATTC Timeout + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="GATTC procedure API call"]; + * SD:>PEER [label = "ATT Packet", textcolor="#000080", linecolor="#000080"]; + * APP note PEER [label = "No Response from Peer"]; + * |||; + * ...; + * |||; + * SD box SD [label="Timeout"]; + * APP<<=SD [label = "BLE_GATTC_EVT_TIMEOUT {source}"]; + * APP rbox PEER [label="No additional ATT Traffic Allowed", textbgcolour="#ff7f7f"]; + * APP=>SD [label = "Any GATT procedure API call"]; + * APP<SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATT, gatt_conn_cfg.att_mtu=100)"]; + * APP<SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gattc_exchange_mtu_request(conn_handle, client_rx_mtu=80)"]; + * APP<PEER [label = "ATT Exchange MTU Request {client_rx_mtu=80}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Exchange MTU Response {server_rx_mtu=75}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="att_mtu=75"]; + * APP<<=SD [label = "BLE_GATTC_EVT_EXCHANGE_MTU_RSP {SUCCESS, server_rx_mtu=75}"]; + * @endmsc + * + * @} + * @} + */ + +/** + * @addtogroup BLE_GATTS + * @{ + * @defgroup BLE_GATTS_MSC Message Sequence Charts + * @{ + * @defgroup BLE_GATTS_ATT_TABLE_POP_MSC GATTS ATT Table Population + * @msc + * hscale = "1.5"; + * APP,SD; + * |||; + * APP=>SD [label = "sd_ble_gatts_service_add(uuid#1)"]; + * APP<SD [label = "sd_ble_gatts_characteristic_add(handle_srvc#1, char_md, value)"]; + * APP<SD [label = "sd_ble_gatts_descriptor_add(handle_char#1, value)"]; + * APP<SD [label = "sd_ble_gatts_descriptor_add(handle_char#1, value)"]; + * APP<SD [label = "sd_ble_gatts_characteristic_add(handle_srvc#1, char_md, value)"]; + * APP<SD [label = "sd_ble_gatts_descriptor_add(handle_char#2, value)"]; + * APP<SD [label = "sd_ble_gatts_service_add(uuid#2)"]; + * APP<SD [label = "sd_ble_gatts_include_add(handle_srvc#2, handle_srvc#1)"]; + * APP<PEER [label = "ATT Read Response", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_WRITE_REQ_NO_AUTH_MSC GATTS Write Request without Authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * SD<:PEER [label = "ATT Write Request {peer_value}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Value in ATT Table: peer_value"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {WRITE_REQ, auth_required=0, peer_value}"]; + * @endmsc + * + * @defgroup BLE_GATTS_WRITE_CMD_NO_AUTH_MSC GATTS Write Command Without Authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * SD<:PEER [label = "ATT Write Command {peer_value}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Value in ATT Table: peer_value"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {WRITE_CMD, auth_required=0, peer_value}"]; + * @endmsc + * + * @defgroup BLE_GATTS_WRITE_CMD_AUTH_MSC GATTS Write Command With Authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * SD<:PEER [label = "ATT Write Command {peer_value}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {WRITE_CMD, auth_required=1, peer_value}"]; + * --- [label = " Variant #1 App Authorizes "]; + * APP=>SD [label = "sd_ble_gatts_value_set(peer_value)"]; + * APP<SD [label = "sd_ble_gatts_value_set(app_value)"]; + * APP<SD [label = "sd_ble_gatts_rw_authorize_reply(SUCCESS, app_value)"]; + * APP<PEER [label = "ATT Read Response {app_value}", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #2 App Disallows "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(READ_NOT_PERMITTED)"]; + * APP<PEER [label = "ATT Error Response", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_WRITE_REQ_AUTH_MSC GATTS Write Request with Authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * SD<:PEER [label = "ATT Write Request {peer_value}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, peer_value}"]; + * --- [label = " Variant #1 App Authorizes "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(SUCCESS, peer_value)"]; + * APP<PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #2 App Authorizes but changes value "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(SUCCESS, app_value)"]; + * APP<PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #3 App Disallows "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE_NOT_PERMITTED)"]; + * APP<PEER [label = "ATT Error Response", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC GATTS Queued Writes: Stack handled, no attributes require authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #1 Attribute Values validation passed "]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="App parses the memory it provided"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * --- [label = " Variant #2 Attribute Values validation failed "]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Error Response {Invalid Value Length / Offset}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC GATTS Queued Writes: Stack handled, one or more attributes require authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"]; + * |||; + * --- [label = " Variant #1 App Authorizes both Prepare Write and Execute Write"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="App parses the memory it provided"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * --- [label = " Variant #2 App Disallows Prepare Write and Authorizes Execute Write "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INSUF_AUTHORIZATION)"]; + * SD:>PEER [label = "ATT Error Response {Insufficient Authorization}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="App parses the memory it provided"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * --- [label = " Variant #3 App Authorizes Prepare Write and Disallows Execute Write "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="App parses the memory it provided"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, APP_ERROR_CODE)"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Error Response {APP_ERROR_CODE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC GATTS Queued Writes: App handled, no attributes require authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"]; + * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_1, offset_1, peer_value_1)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"]; + * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_2, offset_2, peer_value_2)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * |||; + * --- [label = " Variant #1 Attribute values in stack memory (VLOC_STACK), attribute values validation passed "]; + * APP=>SD [label = "sd_ble_gatts_value_set {handle_1, offset_1, peer_value_1}"]; + * APP<SD [label = "sd_ble_gatts_value_set {handle_2, offset_2, peer_value_2}"]; + * APP<SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 Attribute values in user memory (VLOC_USER), attribute values validation passed "]; + * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"]; + * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #3 Attribute values validation failed "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INVALID_OFFSET)"]; + * APP rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Error Response {Invalid Offset}", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC GATTS Queued Writes: App handled, one or more attributes require authorization + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox APP [label="Values in ATT Table in user memory (VLOC_USER):\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"]; + * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_1, offset_1, peer_value_1)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"]; + * |||; + * --- [label = " Variant #1 App Authorizes both Prepare Write and Execute Write"]; + * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_2, offset_2, peer_value_2)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"]; + * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 App Disallows Prepare Write and Authorizes Execute Write "]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INSUF_AUTHORIZATION)"]; + * SD:>PEER [label = "ATT Error Response {Insufficient Authorization}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"]; + * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #3 App Authorizes Prepare Write and Disallows Execute Write "]; + * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_2, offset_2, peer_value_2)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, APP_ERROR_CODE)"]; + * APP rbox APP [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Error Response {APP_ERROR_CODE}", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC GATTS Queued Writes: Peer cancels operation + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * |||; + * --- [label = " Variant #1 Stack handled "]; + * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {CANCEL}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * --- [label = " Variant #2 App handled "]; + * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"]; + * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_1, offset_1, peer_value_1)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"]; + * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_2, offset_2, peer_value_2)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {CANCEL}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_CANCEL}"]; + * APP rbox APP [label="App erases queue"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC GATTS Queued Writes: Prepare Queue Full + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"]; + * |||; + * --- [label = " Variant #1 Stack handled "]; + * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Error Response {Prepare Queue Full}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_NOW}"]; + * APP rbox APP [label="App parses the memory it provided"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"]; + * |||; + * --- [label = " Variant #2 App handled "]; + * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"]; + * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS, handle_1, offset_1, peer_value_1)"]; + * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"]; + * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, PREPARE_QUEUE_FULL)"]; + * SD:>PEER [label = "ATT Error Response {Prepare Queue Full}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"]; + * APP=>SD [label = "sd_ble_gatts_value_set {handle_1, offset_1, peer_value_1}"]; + * APP<SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_QUEUED_WRITE_EXECUTE_WITHOUT_PREPARE_MSC GATTS Queued Writes: Execute Write without Prepare Write + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * |||; + * SD rbox SD [label="No ATT Prepare Write Request has been received by SD"]; + * |||; + * --- [label = " Variant #1 Write cancelled "]; + * SD<:PEER [label = "ATT Execute Write Request {CANCEL}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_CANCEL}"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * --- [label = " Variant #2 Write now "]; + * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"]; + * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_NOW}"]; + * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_MTU_EXCHANGE GATTS ATT_MTU Exchange + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP=>SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATT, gatt_conn_cfg.att_mtu=100)"]; + * APP<SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gatts_exchange_mtu_reply(conn_handle, server_rx_mtu=75)"]; + * APP<PEER [label = "ATT Exchange MTU Response {server_rx_mtu=75}", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="att_mtu=75"]; + * @endmsc + * + * @defgroup BLE_GATTS_HVI_MSC GATTS Handle Value Indication + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="Indications Enabled in CCCD"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * APP=>SD [label = "sd_ble_gatts_hvx(INDICATION, app_value)"]; + * APP<PEER [label = "ATT Handle Value Indication {app_value}", textcolor="#000080", linecolor="#000080"]; + * --- [label = " Variant #1 Peer Confirms "]; + * SD<:PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_HVC"]; + * --- [label = " Variant #2 Peer Ignores "]; + * |||; + * ...; + * |||; + * SD box SD [label="Timeout"]; + * APP<<=SD [label = "BLE_GATTS_EVT_TIMEOUT"]; + * @endmsc + * + * @defgroup BLE_GATTS_HVN_MSC GATTS Handle Value Notification + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * --- [label = " Variant #1 App does not keep track of the available queue element count for notifications "]; + * APP note PEER [label = " This variant makes it possible for APP to transmit notifications without keeping track of the available queue element count. However, successful queuing of notifications cannot be guaranteed. "]; + * |||; + * APP=>SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_1)"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_2)"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_3)"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_4)"]; + * APP<PEER [label = "ATT Handle Value Notification {app_value_1}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Handle Value Notification {app_value_2}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Handle Value Notification {app_value_4}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_HVN_TX_COMPLETE {3}"]; + * |||; + * --- [label = " Variant #2 App keeps track of the available queue element count for notifications "]; + * APP note PEER [label = " This variant makes it possible for APP to know when successful queuing of notifications is guaranteed. "]; + * |||; + * APP=>SD [label = "sd_ble_cfg_set(BLE_CONN_CFG_GATTS, gatts_conn_cfg.hvn_tx_queue_size=2)"]; + * APP<SD [label = "sd_ble_enable()"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_1)"]; + * APP<SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_2)"]; + * APP<PEER [label = "ATT Handle Value Notification {app_value_1}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_HVN_TX_COMPLETE {1}"]; + * APP abox APP [label="available_queue_element_count += 1"]; + * APP=>SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_3)"]; + * APP<PEER [label = "ATT Handle Value Notification {app_value_2}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_HVN_TX_COMPLETE {1}"]; + * APP abox APP [label="available_queue_element_count += 1"]; + * APP=>SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value_4)"]; + * APP<PEER [label = "ATT Handle Value Notification {app_value_3}", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "ATT Handle Value Notification {app_value_4}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_HVN_TX_COMPLETE {2}"]; + * APP abox APP [label="available_queue_element_count += 2"]; + * @endmsc + * + * @defgroup BLE_GATTS_HVX_DISABLED_MSC GATTS Handle Value Indication or Notification disabled + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="Indications and Notifications Disabled in CCCD"]; + * |||; + * SD rbox SD [label="Value in ATT Table: current_value"]; + * APP=>SD [label = "sd_ble_gatts_hvx(INDICATION or NOTIFICATION, app_value)"]; + * APP<SD [label = "sd_ble_gatts_hvx(INDICATION or NOTIFICATION, app_value)"]; + * APP<SD [label = "sd_ble_gatts_sys_attr_set()"]; + * APP<SD [label = "sd_ble_gatts_service_changed(N, M)"]; + * APP<PEER [label = "ATT Handle Value Indication {N, M}", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_SC_CONFIRM"]; + * |||; + * SD rbox PEER [label="Service Discovery"]; + * @endmsc + * + * @defgroup BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC GATTS System Attributes Handling: Unknown Peer + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established with an Unknown Peer"]; + * |||; + * SD<:PEER [label = "ATT Read Request {sys_attr_handle}", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_GATTS_EVT_SYS_ATTR_MISSING"]; + * APP=>SD [label = "sd_ble_gatts_sys_attr_set(NULL)"]; + * APP<PEER [label = "ATT Read Response {sys_attr_value}", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC GATTS System Attributes Handling: Bonded Peer + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established with a Bonded Peer"]; + * |||; + * APP rbox PEER [label="ATT Traffic"]; + * |||; + * APP rbox PEER [label="Connection Terminated"]; + * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"]; + * |||; + * APP=>SD [label = "sd_ble_gatts_sys_attr_get()"]; + * APP<SD [label = "sd_ble_gatts_sys_attr_set(sys_attr_data)"]; + * APP<PEER [label = "ATT Read Response {sys_attr_value}", textcolor="#000080", linecolor="#000080"]; + * @endmsc + * + * @defgroup BLE_GATTS_TIMEOUT_MSC GATTS Timeout + * @msc + * hscale = "2"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="GATTS procedure API call"]; + * SD:>PEER [label = "ATT Packet", textcolor="#000080", linecolor="#000080"]; + * APP note PEER [label = "No Response from Peer"]; + * |||; + * ...; + * |||; + * SD box SD [label="Timeout"]; + * APP<<=SD [label = "BLE_GATTS_EVT_TIMEOUT {source}"]; + * APP rbox PEER [label="No additional ATT Traffic Allowed", textbgcolour="#ff7f7f"]; + * APP=>SD [label = "Any GATT procedure API call"]; + * APP< + * Queued Write + * + * Parameter + * Size (octets) + * Description + * + * + * Handle + * 2 + * Attribute Handle + * + * + * Offset + * 2 + * Value Offset + * + * + * Length + * 2 + * Value Length + * + * + * Value + * Length + * Attribute Value + * + * + * + * The application can parse the array of Queued Write instances at any time, but it is recommended to do so whenever an Execute Write ATT packet + * has been received over the air. See the GATT Server Queued Writes MSCs for more details. + * The array will be terminated by an Queued Write instance with its handle set to @ref BLE_GATT_HANDLE_INVALID. + * @} + */ + + /** + * @addtogroup BLE_GATTS_SYS_ATTRS_FORMAT User memory layout for System Attributes + * @{ + * The following table shows the memory layout used by the SoftDevice to store a + * system attribute. + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + * + *
System Attribute
ParameterSize (octets)Description
Handle2Attribute handle
Length2Attribute length
DataLengthAttribute data
+ * + * The application can obtain an array of system attributes by using @c sd_ble_gatts_sys_attr_get(). + * The array is terminated by a CRC-16-CCITT checksum of the data in the array. + * @} + * @} + */ + +/** + * @addtogroup BLE_L2CAP + * @{ + * @defgroup BLE_L2CAP_MSC Message Sequence Charts + * @{ + * @defgroup BLE_L2CAP_CH_SETUP_MSC L2CAP Channel Setup + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * --- [label = " Variant #1 Locally initiated, Establishment success "]; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(conn_handle, local_cid=INVALID, le_psm, rx_mtu, rx_mps, sdu_buf: [len, p_data1])"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "L2CAP LE Credit Based Connection Response: Connection successful", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP {conn_handle, local_cid, tx_mtu, tx_mps, credits}"]; + * |||; + * APP rbox PEER [label="L2CAP Channel Established"]; + * |||; + * --- [label = " Variant #2 Locally initiated, Establishment failure - PEER refusal "]; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(conn_handle, local_cid=INVALID, le_psm, rx_mtu, rx_mps, sdu_buf: [len, p_data1])"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "L2CAP LE Credit Based Connection Response: Connection refused - no resources available", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED {conn_handle, local_cid, sdu_buf: [len, p_data1]}"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP_REFUSED {conn_handle, local_cid, source: REMOTE, status: NO_RESOURCES}"]; + * |||; + * APP rbox PEER [label="L2CAP Channel NOT Established"]; + * |||; + * --- [label = " Variant #3 Locally initiated, Establishment failure - PEER does not respond "]; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(conn_handle, local_cid=INVALID, le_psm, rx_mtu, rx_mps, sdu_buf: p_data=NULL)"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * SD abox SD [label="Timeout"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP_REFUSED {conn_handle, local_cid, source: LOCAL, status: TIMEOUT}"]; + * |||; + * APP rbox PEER [label="L2CAP Channel NOT Established"]; + * |||; + * --- [label = " Variant #4 Remotely initiated, Establishment success "]; + * SD<:PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP_REQUEST {conn_handle, local_cid, le_psm, tx_mtu, tx_mps, credits}"]; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(conn_handle, local_cid, rx_mtu, rx_mps, sdu_buf: [len, p_data1], status: SUCCESS)"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Response: Connection successful", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PEER [label="L2CAP Channel Established"]; + * |||; + * --- [label = " Variant #5 Remotely initiated, Establishment failure - APP refusal "]; + * SD<:PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP_REQUEST {conn_handle, local_cid, le_psm, tx_mtu, tx_mps, credits}"]; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(conn_handle, local_cid, status: LE_PSM_NOT_SUPPORTED)"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Response: Connection refused - LE_PSM not supported", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PEER [label="L2CAP Channel NOT Established"]; + * |||; + * --- [label = " Variant #6 Remotely initiated, Establishment failure - SD refusal "]; + * SD<:PEER [label = "L2CAP LE Credit Based Connection Request", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="The limit of available L2CAP channels has been reached"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SETUP_REFUSED {conn_handle, local_cid=INVALID, source: LOCAL, status: NO_RESOURCES}"]; + * SD:>PEER [label = "L2CAP LE Credit Based Connection Response: Connection refused - no resources available", textcolor="#000080", linecolor="#000080"]; + * |||; + * APP rbox PEER [label="L2CAP Channel NOT Established"]; + * |||; + * @endmsc + * + * @defgroup BLE_L2CAP_CH_RELEASE_MSC L2CAP Channel Release + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP rbox PEER [label="Connection Established"]; + * |||; + * APP rbox PEER [label="L2CAP Channel Established"]; + * |||; + * --- [label = " Variant #1 Locally initiated, PEER responds "]; + * APP=>SD [label = "sd_ble_l2cap_ch_release(conn_handle, local_cid)"]; + * APP<PEER [label = "L2CAP Disconnection Request", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "L2CAP Disconnection Response", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="SD currently has three SDU data buffers supplied by APP"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED {conn_handle, local_cid, sdu_buf1}"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED {conn_handle, local_cid, sdu_buf2}"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED {conn_handle, local_cid, sdu_buf3}"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RELEASED {conn_handle, local_cid}"]; + * |||; + * --- [label = " Variant #2 Locally initiated, PEER does not respond "]; + * APP=>SD [label = "sd_ble_l2cap_ch_release(conn_handle, local_cid)"]; + * APP<PEER [label = "L2CAP Disconnection Request", textcolor="#000080", linecolor="#000080"]; + * SD abox SD [label="Timeout"]; + * SD rbox SD [label="SD does not currently have SDU data buffers supplied by APP"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RELEASED {conn_handle, local_cid}"]; + * |||; + * --- [label = " Variant #3 Remotely initiated "]; + * SD<:PEER [label = "L2CAP Disconnection Request", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="SD does not currently have SDU data buffers supplied by APP"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RELEASED {conn_handle, local_cid}"]; + * SD:>PEER [label = "L2CAP Disconnection Response", textcolor="#000080", linecolor="#000080"]; + * |||; + * @endmsc + * + * @defgroup BLE_L2CAP_CH_TX_MSC L2CAP Channel SDU Transmit + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * --- [label = " Variant #1 App ignores transmit credits, SD will transmit data as soon as possible "]; + * APP rbox PEER [label="L2CAP Channel Established, tx_queue_size=2, tx_mps=100, credits=2"]; + * |||; + * APP=>SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=140, p_data1])"]; + * APP<SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=80, p_data2])"]; + * APP<SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=280, p_data3])"]; + * APP<PEER [label = "SDU 1, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "SDU 1, Segment 2", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=140, p_data1]}"]; + * APP abox APP [label="App releases memory pointed by p_data1"]; + * SD rbox SD [label="All credits consumed"]; + * APP=>SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=280, p_data3])"]; + * APP<PEER [label = "SDU 2, Segment 1", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=80, p_data2]}"]; + * APP abox APP [label="App releases memory pointed by p_data2"]; + * SD:>PEER [label = "SDU 3, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD rbox SD [label="All credits consumed"]; + * ...; + * SD<:PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_CREDIT {conn_handle, local_cid, credits=2}"]; + * SD:>PEER [label = "SDU 3, Segment 2", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "SDU 3, Segment 3", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=280, p_data3]}"]; + * APP abox APP [label="App releases memory pointed by p_data3"]; + * |||; + * --- [label = " Variant #2 App keeps track of transmission credits and transmits only if credits are available "]; + * APP rbox PEER [label="L2CAP Channel Established, tx_queue_size=2, tx_mps=100, credits=2"]; + * APP abox APP [label="available_credits = 2"]; + * |||; + * APP=>SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=140, p_data1])"]; + * APP<PEER [label = "SDU 1, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "SDU 1, Segment 2", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=140, p_data1]}"]; + * APP abox APP [label="App releases memory pointed by p_data1"]; + * ...; + * SD<:PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_CREDIT {conn_handle, local_cid, credits=2}"]; + * APP abox APP [label="available_credits += 2\n// available_credits == 2"]; + * APP=>SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=80, p_data2])"]; + * APP<SD [label = "sd_ble_l2cap_ch_tx(conn_handle, local_cid, p_sdu_buf: [len=280, p_data3])"]; + * APP<PEER [label = "SDU 2, Segment 1", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=80, p_data2]}"]; + * APP abox APP [label="App releases memory pointed by p_data2"]; + * SD:>PEER [label = "SDU 3, Segment 1", textcolor="#000080", linecolor="#000080"]; + * ...; + * SD<:PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_CREDIT {conn_handle, local_cid, credits=2}"]; + * APP abox APP [label="available_credits += 2\n// available_credits == 0"]; + * SD:>PEER [label = "SDU 3, Segment 2", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "SDU 3, Segment 3", textcolor="#000080", linecolor="#000080"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_TX {conn_handle, local_cid, sdu_buf: [len=280, p_data3]}"]; + * APP abox APP [label="App releases memory pointed by p_data3"]; + * |||; + * @endmsc + * + * @defgroup BLE_L2CAP_CH_RX_MSC L2CAP Channel SDU Receive + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(rx_mtu=1000, rx_mps=100, sdu_buf: [len=1000, p_data1])"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Request (Initial Credits=1)", textcolor="#000080", linecolor="#000080"]; + * APP rbox PEER [label="L2CAP Channel Established, rx_queue_size=2, rx_mtu=1000, rx_mps=100"]; + * |||; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data2])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 1, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 1, Segment 2", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="1 credit left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=140, sdu_buf: [len=1000, p_data1]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data1"]; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data3])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 2, Segment 1", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="1 credit left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=80, sdu_buf: [len=1000, p_data2]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data2"]; + * SD<:PEER [label = "SDU 3, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 2", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 3", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="All credits consumed"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=280, sdu_buf: [len=1000, p_data3]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data3"]; + * |||; + * @endmsc + * + * @defgroup BLE_L2CAP_CH_FLOW_CONTROL_MSC L2CAP Channel advanced SDU reception flow control + * @msc + * hscale = "1.5"; + * APP,SD,PEER; + * |||; + * APP=>SD [label = "sd_ble_l2cap_ch_setup(rx_mtu=1000, rx_mps=100, sdu_buf: p_data=NULL)"]; + * APP<PEER [label = "L2CAP LE Credit Based Connection Request (Initial Credits=0)", textcolor="#000080", linecolor="#000080"]; + * APP rbox PEER [label="L2CAP Channel Established, rx_queue_size=2, rx_mtu=1000, rx_mps=100"]; + * |||; + * --- [label = " Variant #1 App overwrites number of credits peer should have at the start of a SDU "]; + * APP=>SD [label = "sd_ble_l2cap_ch_flow_control(conn_handle, local_cid, credits=8)"]; + * APP<SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data1])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=8)", textcolor="#000080", linecolor="#000080"]; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data2])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 1, Segment 2", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="8 credits left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=140, sdu_buf: [len=1000, p_data1]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data1"]; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data3])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="8 credits left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=80, sdu_buf: [len=1000, p_data2]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data2"]; + * SD<:PEER [label = "SDU 3, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 2", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 3", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="5 credits left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=280, sdu_buf: [len=1000, p_data3]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data3"]; + * APP rbox APP [label="Peer has credits remaining so application must provide new reception buffer as soon as possible."]; + * |||; + * --- [label = " Variant #2 App pauses traffic on a L2CAP Channel "]; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data1])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * APP=>SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data2])"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 1, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 1, Segment 2", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="1 credit left"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=140, sdu_buf: [len=1000, p_data1]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data1"]; + * APP=>SD [label = "sd_ble_l2cap_ch_flow_control(conn_handle, local_cid, credits=0)"]; + * APP<SD [label = "sd_ble_l2cap_ch_rx(conn_handle, local_cid, p_sdu_buf: [len=1000, p_data3])"]; + * APP<SD [label = "sd_ble_l2cap_ch_flow_control(conn_handle, local_cid, credits=0)"]; + * APP<SD [label = "sd_ble_l2cap_ch_flow_control(conn_handle, local_cid, credits=BLE_L2CAP_CREDITS_DEFAULT)"]; + * APP<PEER [label = "LE Flow Control Credit (credits=1)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 1", textcolor="#000080", linecolor="#000080"]; + * SD:>PEER [label = "LE Flow Control Credit (credits=2)", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 2", textcolor="#000080", linecolor="#000080"]; + * SD<:PEER [label = "SDU 3, Segment 3", textcolor="#000080", linecolor="#000080"]; + * PEER rbox PEER [label="All credits consumed"]; + * APP<<=SD [label = "BLE_L2CAP_EVT_CH_RX {conn_handle, local_cid, sdu_len=280, sdu_buf: [len=1000, p_data3]}"]; + * APP abox APP [label="App can process data and release memory pointed by p_data3"]; + * |||; + * @endmsc + * @} + * @} + */ + diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h new file mode 100644 index 0000000000000..da1a06bbcd5f7 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h @@ -0,0 +1,667 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_l2cap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific base UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ + SD_BLE_UUID_VS_REMOVE, /**< Remove a Vendor Specific base UUID. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ + BLE_CONN_CFG_L2CAP = BLE_CONN_CFG_BASE + 4, /**< BLE L2CAP specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific base UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ + BLE_COMMON_OPT_EXTENDED_RC_CAL = BLE_OPT_BASE + 2, /**< Extended RC calibration option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific base UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/** + * @brief Enable/disable extended RC calibration. + * + * If extended RC calibration is enabled and the internal RC oscillator (@ref NRF_CLOCK_LF_SRC_RC) is used as the SoftDevice + * LFCLK source, the SoftDevice as a peripheral will by default try to increase the receive window if two consecutive packets + * are not received. If it turns out that the packets were not received due to clock drift, the RC calibration is started. + * This calibration comes in addition to the periodic calibration that is configured by @ref sd_softdevice_enable(). When + * using only peripheral connections, the periodic calibration can therefore be configured with a much longer interval as the + * peripheral will be able to detect and adjust automatically to clock drift, and calibrate on demand. + * + * If extended RC calibration is disabled and the internal RC oscillator is used as the SoftDevice LFCLK source, the + * RC oscillator is calibrated periodically as configured by @ref sd_softdevice_enable(). + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended RC calibration, enabled by default. */ +} ble_common_opt_extended_rc_cal_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ + ble_common_opt_extended_rc_cal_t extended_rc_cal; /**< Parameters for enabling extended RC calibration. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * @sa sd_ble_gap_connect() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() calls + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific base UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific base UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor Specific base UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM One or more of the following is true: + * - The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + * - Dynamic part of the SoftDevice RAM region is larger then 64 kB which + * is currently not supported. + * @retval ::NRF_ERROR_RESOURCES The total number of L2CAP Channels configured using @ref sd_ble_cfg_set is too large. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a Vendor Specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific base UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific base UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/**@brief Remove a Vendor Specific base UUID. + * + * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows + * the application to reuse memory allocated for Vendor Specific base UUIDs. + * + * @note Currently this function can only be called with a p_uuid_type set to @ref BLE_UUID_TYPE_UNKNOWN or the last added UUID type. + * + * @param[in] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t::type corresponds to the UUID type that + * shall be removed. If the type is set to @ref BLE_UUID_TYPE_UNKNOWN, or the pointer is NULL, the last + * Vendor Specific base UUID will be removed. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponds to the UUID type that was + * removed. If function returns with a failure, it contains the last type that is in use by the ATT Server. + * + * @retval ::NRF_SUCCESS Successfully removed the Vendor Specific base UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_uuid_type is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If p_uuid_type points to a non-valid UUID type. + * @retval ::NRF_ERROR_FORBIDDEN If the Vendor Specific base UUID is in use by the ATT Server. + */ + +SVCALL(SD_BLE_UUID_VS_REMOVE, uint32_t, sd_ble_uuid_vs_remove(uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of Vendor Specific base UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_err.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_err.h new file mode 100644 index 0000000000000..1b4820dc3d6fc --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_err.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h new file mode 100644 index 0000000000000..a130d7b51d4a1 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h @@ -0,0 +1,2691 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */ + SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */ + SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */ + SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ + SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_ADV_ADDR_GET = BLE_GAP_SVC_BASE + 39, /**< Get the Address used on air while Advertising. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, /**< Connected to peer. \n See @ref ble_gap_evt_connected_t */ + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_ADV_REPORT = BLE_GAP_EVT_BASE + 13, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 15, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ + BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_COMPAT_MODE_1 = BLE_GAP_OPT_BASE + 3, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_SCAN_INIT = 2, /**< Scanner and initiator role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +#define BLE_GAP_ADDR_TYPE_ANONYMOUS 0x7F /**< An advertiser may advertise without its address. + This type of advertising is called anonymous. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. + If more advertising data is required, use extended advertising instead. */ +#define BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_MAX_SUPPORTED (255) /**< Maximum supported data length for an extended advertising set. */ + +#define BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_CONNECTABLE_MAX_SUPPORTED (238) /**< Maximum supported data length for an extended connectable advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ + /**@} */ + + +/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min + * @{ */ +#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_INTERVAL_MAX 0xFFFF /**< Maximum Scan interval in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min + * @{ */ +#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_WINDOW_MAX 0xFFFF /**< Maximum Scan window in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min + * @{ */ +#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in 10 ms units, i.e 10 ms. */ +#define BLE_GAP_SCAN_TIMEOUT_UNLIMITED 0x0000 /**< Continue to scan forever. */ + /** @} */ + +/**@defgroup BLE_GAP_SCAN_BUFFER_SIZE GAP Minimum scanner buffer size + * + * Scan buffers are used for storing advertising data received from an advertiser. + * If ble_gap_scan_params_t::extended is set to 0, @ref BLE_GAP_SCAN_BUFFER_MIN is the minimum scan buffer length. + * else the minimum scan buffer size is @ref BLE_GAP_SCAN_BUFFER_EXTENDED_MIN. + * @{ */ +#define BLE_GAP_SCAN_BUFFER_MIN (31) /**< Minimum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_MAX (31) /**< Maximum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MIN (255) /**< Minimum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX (1650) /**< Maximum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX_SUPPORTED (255) /**< Maximum supported data length for + an extended advertising set. */ +/** @} */ + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * The maximum supported data length for an extended advertiser is defined by + * @ref BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_MAX_SUPPORTED + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED 0x06 /**< Connectable non-scannable undirected advertising + events using extended advertising PDUs. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_DIRECTED 0x07 /**< Connectable non-scannable directed advertising + events using extended advertising PDUs. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x08 /**< Non-connectable scannable undirected advertising + events using extended advertising PDUs. + @note Only scan response data is supported. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_DIRECTED 0x09 /**< Non-connectable scannable directed advertising + events using extended advertising PDUs. + @note Only scan response data is supported. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x0A /**< Non-connectable non-scannable undirected advertising + events using extended advertising PDUs. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED 0x0B /**< Non-connectable non-scannable directed advertising + events using extended advertising PDUs. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_DATA_STATUS GAP Advertising data status + * @{ */ +#define BLE_GAP_ADV_DATA_STATUS_COMPLETE 0x00 /**< All data in the advertising event have been received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA 0x01 /**< More data to be received. + @note This value will only be used if + @ref ble_gap_scan_params_t::report_incomplete_evts and + @ref ble_gap_adv_report_type_t::extended_pdu are set to true. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED 0x02 /**< Incomplete data. Buffer size insufficient to receive more. + @note This value will only be used if + @ref ble_gap_adv_report_type_t::extended_pdu is set to true. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MISSED 0x03 /**< Failed to receive the remaining data. + @note This value will only be used if + @ref ble_gap_adv_report_type_t::extended_pdu is set to true. */ +/**@} */ + +/**@defgroup BLE_GAP_SCAN_FILTER_POLICIES GAP Scanner filter policies + * @{ */ +#define BLE_GAP_SCAN_FP_ACCEPT_ALL 0x00 /**< Accept all advertising packets except directed advertising packets + not addressed to this device. */ +#define BLE_GAP_SCAN_FP_WHITELIST 0x01 /**< Accept advertising packets from devices in the whitelist except directed + packets not addressed to this device. */ +#define BLE_GAP_SCAN_FP_ALL_NOT_RESOLVED_DIRECTED 0x02 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_ACCEPT_ALL. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +#define BLE_GAP_SCAN_FP_WHITELIST_NOT_RESOLVED_DIRECTED 0x03 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_WHITELIST. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections, for scanning, and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS | BLE_GAP_PHY_CODED) /**< All PHYs are supported. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_CODED_PHY_MIN (6) /**< The shortest event length in 1.25 ms units supporting LE Coded PHY. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ + +/**@} */ + +/**@brief Automatic data length parameter. */ +#define BLE_GAP_DATA_LENGTH_AUTO 0 + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/**@brief The total number of channels in Bluetooth Low Energy. */ +#define BLE_GAP_CHANNEL_COUNT (40) + +/**@defgroup BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS Quality of Service (QoS) Channel survey interval defines + * @{ */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS (0) /**< Continuous channel survey. */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MIN_US (7500) /**< Minimum channel survey interval in microseconds (7.5 ms). */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MAX_US (4000000) /**< Maximum channel survey interval in microseconds (4 s). */ + /**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< Omit advertiser's address from all PDUs. + @note Anonymous advertising is only available for + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED and + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED. */ + uint8_t include_tx_power : 1; /**< This feature is not supported on this SoftDevice. */ +} ble_gap_adv_properties_t; + + +/**@brief Advertising report type. */ +typedef struct +{ + uint16_t connectable : 1; /**< Connectable advertising event type. */ + uint16_t scannable : 1; /**< Scannable advertising event type. */ + uint16_t directed : 1; /**< Directed advertising event type. */ + uint16_t scan_response : 1; /**< Received a scan response. */ + uint16_t extended_pdu : 1; /**< Received an extended advertising set. */ + uint16_t status : 2; /**< Data status. See @ref BLE_GAP_ADV_DATA_STATUS. */ + uint16_t reserved : 9; /**< Reserved for future use. */ +} ble_gap_adv_report_type_t; + +/**@brief Advertising Auxiliary Pointer. */ +typedef struct +{ + uint16_t aux_offset; /**< Time offset from the beginning of advertising packet to the auxiliary packet in 100 us units. */ + uint8_t aux_phy; /**< Indicates the PHY on which the auxiliary advertising packet is sent. See @ref BLE_GAP_PHYS. */ +} ble_gap_aux_pointer_t; + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + This bit is set by the SoftDevice to indicate whether the address has been resolved from + a Resolvable Private Address (when the peer is using privacy). + If set to 1, @ref addr and @ref addr_type refer to the identity address of the resolved address. + + This bit is ignored when a variable of type @ref ble_gap_addr_t is used as input to API functions. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. + @ref addr is not used if @ref addr_type is @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + @note ble_gap_addr_t::addr_type cannot be + @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. + @note The SoftDevice will always complete at least one advertising + event even if the duration is set too low. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be used. + Masking away secondary advertising channels is not supported. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + Valid values are @ref BLE_GAP_PHY_1MBPS and @ref BLE_GAP_PHY_CODED. + @note The primary_phy shall indicate @ref BLE_GAP_PHY_1MBPS if + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising channel packets + are transmitted. + If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS will be used. + Valid values are + @ref BLE_GAP_PHY_1MBPS, @ref BLE_GAP_PHY_2MBPS, and @ref BLE_GAP_PHY_CODED. + If @ref ble_gap_adv_properties_t::type is an extended advertising type + and connectable, this is the PHY that will be used to establish a + connection and send AUX_ADV_IND packets on. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t set_id:4; /**< The advertising set identifier distinguishes this advertising set from other + advertising sets transmitted by this and other devices. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief GAP scanning parameters. */ +typedef struct +{ + uint8_t extended : 1; /**< If 1, the scanner will accept extended advertising packets. + If set to 0, the scanner will not receive advertising packets + on secondary advertising channels, and will not be able + to receive long advertising PDUs. */ + uint8_t report_incomplete_evts : 1; /**< If 1, events of type @ref ble_gap_evt_adv_report_t may have + @ref ble_gap_adv_report_type_t::status set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. + This parameter is ignored when used with @ref sd_ble_gap_connect + @note This may be used to abort receiving more packets from an extended + advertising event, and is only available for extended + scanning, see @ref sd_ble_gap_scan_start. + @note This feature is not supported by this SoftDevice. */ + uint8_t active : 1; /**< If 1, perform active scanning by sending scan requests. + This parameter is ignored when used with @ref sd_ble_gap_connect. */ + uint8_t filter_policy : 2; /**< Scanning filter policy. @sa BLE_GAP_SCAN_FILTER_POLICIES. + @note Only @ref BLE_GAP_SCAN_FP_ACCEPT_ALL and + @ref BLE_GAP_SCAN_FP_WHITELIST are valid when used with + @ref sd_ble_gap_connect */ + uint8_t scan_phys; /**< Bitfield of PHYs to scan on. If set to @ref BLE_GAP_PHY_AUTO, + scan_phys will default to @ref BLE_GAP_PHY_1MBPS. + - If @ref ble_gap_scan_params_t::extended is set to 0, the only + supported PHY is @ref BLE_GAP_PHY_1MBPS. + - When used with @ref sd_ble_gap_scan_start, + the bitfield indicates the PHYs the scanner will use for scanning + on primary advertising channels. The scanner will accept + @ref BLE_GAP_PHYS_SUPPORTED as secondary advertising channel PHYs. + - When used with @ref sd_ble_gap_connect, the + bitfield indicates the PHYs on where a connection may be initiated. + If scan_phys contains @ref BLE_GAP_PHY_1MBPS and/or @ref BLE_GAP_PHY_2MBPS, + the primary scan PHY is @ref BLE_GAP_PHY_1MBPS. + If scan_phys also contains @ref BLE_GAP_PHY_CODED, the primary scan + PHY will also contain @ref BLE_GAP_PHY_CODED. If the only scan PHY is + @ref BLE_GAP_PHY_CODED, the primary scan PHY is + @ref BLE_GAP_PHY_CODED only. */ + uint16_t interval; /**< Scan interval in 625 us units. @sa BLE_GAP_SCAN_INTERVALS. */ + uint16_t window; /**< Scan window in 625 us units. @sa BLE_GAP_SCAN_WINDOW. + If scan_phys contains both @ref BLE_GAP_PHY_1MBPS and + @ref BLE_GAP_PHY_CODED interval shall be larger than or + equal to twice the scan window. */ + uint16_t timeout; /**< Scan timeout in 10 ms units. @sa BLE_GAP_SCAN_TIMEOUT. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be + set to 0. + Masking away secondary channels is not supported. */ +} ble_gap_scan_params_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Data Length Update Procedure parameters. */ +typedef struct +{ + uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ + uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ +} ble_gap_data_length_params_t; + + +/**@brief Data Length Update Procedure local limitation. */ +typedef struct +{ + uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ + uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ + uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ +} ble_gap_data_length_limitation_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ + union + { + ble_data_t adv_report_buffer; /**< If source is set to @ref BLE_GAP_TIMEOUT_SRC_SCAN, the released + scan buffer is contained in this field. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. + * + * @note If @ref ble_gap_adv_report_type_t::status is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * not all fields in the advertising report may be available. + * + * @note When ble_gap_adv_report_type_t::status is not set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * scanning will be paused. To continue scanning, call @ref sd_ble_gap_scan_start. + */ +typedef struct +{ + ble_gap_adv_report_type_t type; /**< Advertising report type. See @ref ble_gap_adv_report_type_t. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr is resolved: + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the address is the + peer's identity address. */ + ble_gap_addr_t direct_addr; /**< Contains the target address of the advertising event if + @ref ble_gap_adv_report_type_t::directed is set to 1. If the + SoftDevice was able to resolve the address, + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the direct_addr + contains the local identity address. If the target address of the + advertising event is @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE, + and the SoftDevice was unable to resolve it, the application may try + to resolve this address to find out if the advertising event was + directed to us. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising packet was received. + See @ref BLE_GAP_PHYS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising packet was received. + See @ref BLE_GAP_PHYS. This field is set to @ref BLE_GAP_PHY_NOT_SET if no packets + were received on a secondary advertising channel. */ + int8_t tx_power; /**< TX Power reported by the advertiser in the last packet header received. + This field is set to @ref BLE_GAP_POWER_LEVEL_INVALID if the + last received packet did not contain the Tx Power field. + @note TX Power is only included in extended advertising packets. */ + int8_t rssi; /**< Received Signal Strength Indication in dBm of the last packet received. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Channel Index on which the last advertising packet is received (0-39). */ + uint8_t set_id; /**< Set ID of the received advertising data. Set ID is not present + if set to @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + uint16_t data_id:12; /**< The advertising data ID of the received advertising data. Data ID + is not present if @ref ble_gap_evt_adv_report_t::set_id is set to + @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + ble_data_t data; /**< Received advertising or scan response data. If + @ref ble_gap_adv_report_type_t::status is not set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the data buffer provided + in @ref sd_ble_gap_scan_start is now released. */ + ble_gap_aux_pointer_t aux_pointer; /**< The offset and PHY of the next advertising packet in this extended advertising + event. @note This field is only set if @ref ble_gap_adv_report_type_t::status + is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. */ +} ble_gap_evt_adv_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ +} ble_gap_evt_data_length_update_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ +typedef struct +{ + ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ +} ble_gap_evt_data_length_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT. */ +typedef struct +{ + int8_t channel_energy[BLE_GAP_CHANNEL_COUNT]; /**< The measured energy on the Bluetooth Low Energy + channels, in dBm, indexed by Channel Index. + If no measurement is available for the given channel, channel_energy is set to + @ref BLE_GAP_POWER_LEVEL_INVALID. */ +} ble_gap_evt_qos_channel_survey_report_t; + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ + ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ + ble_gap_evt_qos_channel_survey_report_t qos_channel_survey_report; /**< Quality of Service (QoS) Channel Survey Report Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the different connected roles, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too + * large. The maximum supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ + uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ + uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ + uint8_t qos_channel_survey_role_available:1; /**< If set, the Quality of Service (QoS) channel survey module is available to the + application using @ref sd_ble_gap_qos_channel_survey_start. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Compatibility mode 1 option. + * + * @details This can be used with @ref sd_ble_opt_set to enable and disable + * compatibility mode 1. Compatibility mode 1 is disabled by default. + * + * @note Compatibility mode 1 enables interoperability with devices that do not support a value of + * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a + * limited set of legacy peripheral devices from another vendor. Enabling this compatibility + * mode will only have an effect if the local device will act as a central device and + * initiate a connection to a peripheral device. In that case it may lead to the connection + * creation taking up to one connection interval longer to complete for all connections. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable compatibility mode 1.*/ +} ble_gap_opt_compat_mode_1_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising, scanning or creating a connection. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, + * scanning or creating a connection. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Get the Bluetooth device address used by the advertiser. + * + * @note This function will return the local Bluetooth address used in advertising PDUs. When + * using privacy, the SoftDevice will generate a new private address every + * @ref ble_gap_privacy_params_t::private_addr_cycle_s configured using + * @ref sd_ble_gap_privacy_set. Hence depending on when the application calls this API, the + * address returned may not be the latest address that is used in the advertising PDUs. + * + * @param[in] adv_handle The advertising handle to get the address from. + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. + * @retval ::NRF_ERROR_INVALID_STATE The advertising set is currently not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @endmscs + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning + * or creating a connection. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + Stop one or more currently active roles (Central, Peripheral, Broadcaster or Observer) and try again. + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the central role this will initiate a Link Layer connection parameter update procedure, + * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. In both cases, and regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress or link has not been established. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress or link has not been established. + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +2dBm, +3dBm, +4dBm, +5dBm, +6dBm, +7dBm and +8dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), + * otherwise in the peripheral role, an SMP Security Request will be sent. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * In the central role, this pointer may be NULL to reject a Security Request. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - No link has been established. + * - An encryption is already executing or queued. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have + * already been provided during a previous call to @ref sd_ble_gap_authenticate. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Security parameters has not been requested. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Authentication key has not been requested. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - The peer is not authenticated. + * - The application has not pulled a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Authentication key not requested. + * - Passkey has not been entered. + * - Keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref ble_gap_sec_params_t::oob flag + * in @ref sd_ble_gap_authenticate in the central role or + * in @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Authentication key not requested + * - Not expecting LESC OOB data + * - Have not actually exchanged passkeys. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Initiate GAP Encryption procedure. + * + * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE No link has been established. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. + * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. + */ +SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - No link has been established. + * - No @ref BLE_GAP_EVT_SEC_REQUEST pending. + * - LE long term key requested command not allowed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Start or continue scanning (GAP Discovery procedure, Observer Procedure). + * + * @note A call to this function will require the application to keep the memory pointed by + * p_adv_report_buffer alive until the buffer is released. The buffer is released when the scanner is stopped + * or when this function is called with another buffer. + * + * @note The scanner will automatically stop in the following cases: + * - @ref sd_ble_gap_scan_stop is called. + * - @ref sd_ble_gap_connect is called. + * - A @ref BLE_GAP_EVT_TIMEOUT with source set to @ref BLE_GAP_TIMEOUT_SRC_SCAN is received. + * - When a @ref BLE_GAP_EVT_ADV_REPORT event is received and @ref ble_gap_adv_report_type_t::status is not set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. In this case scanning is only paused to let the application + * access received data. The application must call this function to continue scanning, or call @ref sd_ble_gap_scan_stop + * to stop scanning. + * + * @note If a @ref BLE_GAP_EVT_ADV_REPORT event is received with @ref ble_gap_adv_report_type_t::status set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the scanner will continue scanning, and the application will + * receive more reports from this advertising event. The following reports will include the old and new received data. + * + * @events + * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] p_scan_params Pointer to scan parameters structure. When this function is used to continue + * scanning, this parameter must be NULL. + * @param[in] p_adv_report_buffer Pointer to buffer used to store incoming advertising data. + * The memory pointed to should be kept alive until the scanning is stopped. + * See @ref BLE_GAP_SCAN_BUFFER_SIZE for minimum and maximum buffer size. + * If the scanner receives advertising data larger than can be stored in the buffer, + * a @ref BLE_GAP_EVT_ADV_REPORT will be raised with @ref ble_gap_adv_report_type_t::status + * set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED. + * + * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Scanning is already ongoing and p_scan_params was not NULL + * - Scanning is not running and p_scan_params was NULL. + * - The scanner has timed out when this function is called to continue scanning. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported parameters supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_INVALID_LENGTH The provided buffer length is invalid. See @ref BLE_GAP_SCAN_BUFFER_MIN. + * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again + */ +SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params, ble_data_t const * p_adv_report_buffer)); + + +/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). + * + * @note The buffer provided in @ref sd_ble_gap_scan_start is released. + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. + * @retval ::NRF_ERROR_INVALID_STATE Not in the scanning state. + */ +SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); + + +/**@brief Create a connection (GAP Link Establishment). + * + * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. + * The scanning procedure will be stopped even if the function returns an error. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, A connection was established.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Failed to establish a connection.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @param[in] p_peer_addr Pointer to peer identity address. If @ref ble_gap_scan_params_t::filter_policy is set to use + * whitelist, then p_peer_addr is ignored. + * @param[in] p_scan_params Pointer to scan parameters structure. + * @param[in] p_conn_params Pointer to desired connection parameters. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. + * + * @retval ::NRF_SUCCESS Successfully initiated connection procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * - Invalid parameter(s) in p_scan_params or p_conn_params. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an + * existing locally initiated connect procedure, which must complete before initiating again. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. + * @retval ::NRF_ERROR_RESOURCES Either: + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Observer) and try again. + * - The event_length parameter associated with conn_cfg_tag is too small to be able to + * establish a connection on the selected @ref ble_gap_scan_params_t::scan_phys. + * Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); + + +/**@brief Cancel a connection establishment. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. + * @retval ::NRF_ERROR_INVALID_STATE No locally initiated connect procedure started or connection + * completed occurred. + */ +SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * When acting as a central, the SoftDevice will select the fastest common PHY in each direction. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE No link has been established. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the combination of + * @ref ble_gap_phys_t::tx_phys, @ref ble_gap_phys_t::rx_phys, and @ref ble_gap_data_length_params_t. + * The connection event length is configured with @ref BLE_CONN_CFG_GAP using @ref sd_ble_cfg_set. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + +/**@brief Initiate or respond to a Data Length Update Procedure. + * + * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of + * p_dl_params, the SoftDevice will choose the highest value supported in current + * configuration and connection parameters. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update + * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let + * the SoftDevice automatically decide the value for that member. + * Set to NULL to use automatic values for all members. + * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not + * have enough resources or does not support the requested Data Length + * Update parameters. Ignored if NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. + * @retval ::NRF_ERROR_INVALID_STATE No link has been established. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. Inspect + * p_dl_limitation to see which parameter is not supported. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the requested parameters. + * Use @ref sd_ble_cfg_set with @ref BLE_CONN_CFG_GAP to increase the connection event length. + * Inspect p_dl_limitation to see where the limitation is. + * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the + * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. + */ +SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); + +/**@brief Start the Quality of Service (QoS) channel survey module. + * + * @details The channel survey module provides measurements of the energy levels on + * the Bluetooth Low Energy channels. When the module is enabled, @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT + * events will periodically report the measured energy levels for each channel. + * + * @note The measurements are scheduled with lower priority than other Bluetooth Low Energy roles, + * Radio Timeslot API events and Flash API events. + * + * @note The channel survey module will attempt to do measurements so that the average interval + * between measurements will be interval_us. However due to the channel survey module + * having the lowest priority of all roles and modules, this may not be possible. In that + * case fewer than expected channel survey reports may be given. + * + * @note In order to use the channel survey module, @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available + * must be set. This is done using @ref sd_ble_cfg_set. + * + * @param[in] interval_us Requested average interval for the measurements and reports. See + * @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS for valid ranges. If set + * to @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS, the channel + * survey role will be scheduled at every available opportunity. + * + * @retval ::NRF_SUCCESS The module is successfully started. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. interval_us is out of the + * allowed range. + * @retval ::NRF_ERROR_INVALID_STATE Trying to start the module when already running. + * @retval ::NRF_ERROR_RESOURCES The channel survey module is not available to the application. + * Set @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available using + * @ref sd_ble_cfg_set. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_START, uint32_t, sd_ble_gap_qos_channel_survey_start(uint32_t interval_us)); + +/**@brief Stop the Quality of Service (QoS) channel survey module. + * + * @retval ::NRF_SUCCESS The module is successfully stopped. + * @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void)); + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatt.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatt.h new file mode 100644 index 0000000000000..9cb577cc85667 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatt.h @@ -0,0 +1,229 @@ +/* + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_WRITE_REQ_REJECTED 0x01FC /**< ATT Common Profile and Service Error: Write request rejected. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gattc.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gattc.h new file mode 100644 index 0000000000000..7fb3920244da3 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatts.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatts.h new file mode 100644 index 0000000000000..394d8d189726e --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_hci.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_hci.h new file mode 100644 index 0000000000000..f0dde9a03adb9 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_l2cap.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_l2cap.h new file mode 100644 index 0000000000000..edaf6641f80e8 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_l2cap.h @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) + @{ + @brief Definitions and prototypes for the L2CAP interface. + */ + +#ifndef BLE_L2CAP_H__ +#define BLE_L2CAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology + * @{ + * @details + * + * L2CAP SDU + * - A data unit that the application can send/receive to/from a peer. + * + * L2CAP PDU + * - A data unit that is exchanged between local and remote L2CAP entities. + * It consists of L2CAP protocol control information and payload fields. + * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. + * + * L2CAP MTU + * - The maximum length of an L2CAP SDU. + * + * L2CAP MPS + * - The maximum length of an L2CAP PDU payload field. + * + * Credits + * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. + * @} */ + +/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief L2CAP API SVC numbers. */ +enum BLE_L2CAP_SVCS +{ + SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE + 0, /**< Set up an L2CAP channel. */ + SD_BLE_L2CAP_CH_RELEASE = BLE_L2CAP_SVC_BASE + 1, /**< Release an L2CAP channel. */ + SD_BLE_L2CAP_CH_RX = BLE_L2CAP_SVC_BASE + 2, /**< Receive an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_TX = BLE_L2CAP_SVC_BASE + 3, /**< Transmit an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_FLOW_CONTROL = BLE_L2CAP_SVC_BASE + 4, /**< Advanced SDU reception flow control. */ +}; + +/**@brief L2CAP Event IDs. */ +enum BLE_L2CAP_EVTS +{ + BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE + 0, /**< L2CAP Channel Setup Request event. + \n See @ref ble_l2cap_evt_ch_setup_request_t. */ + BLE_L2CAP_EVT_CH_SETUP_REFUSED = BLE_L2CAP_EVT_BASE + 1, /**< L2CAP Channel Setup Refused event. + \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ + BLE_L2CAP_EVT_CH_SETUP = BLE_L2CAP_EVT_BASE + 2, /**< L2CAP Channel Setup Completed event. + \n See @ref ble_l2cap_evt_ch_setup_t. */ + BLE_L2CAP_EVT_CH_RELEASED = BLE_L2CAP_EVT_BASE + 3, /**< L2CAP Channel Released event. + \n No additional event structure applies. */ + BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED = BLE_L2CAP_EVT_BASE + 4, /**< L2CAP Channel SDU data buffer released event. + \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ + BLE_L2CAP_EVT_CH_CREDIT = BLE_L2CAP_EVT_BASE + 5, /**< L2CAP Channel Credit received. + \n See @ref ble_l2cap_evt_ch_credit_t. */ + BLE_L2CAP_EVT_CH_RX = BLE_L2CAP_EVT_BASE + 6, /**< L2CAP Channel SDU received. + \n See @ref ble_l2cap_evt_ch_rx_t. */ + BLE_L2CAP_EVT_CH_TX = BLE_L2CAP_EVT_BASE + 7, /**< L2CAP Channel SDU transmitted. + \n See @ref ble_l2cap_evt_ch_tx_t. */ +}; + +/** @} */ + +/**@addtogroup BLE_L2CAP_DEFINES Defines + * @{ */ + +/**@brief Maximum number of L2CAP channels per connection. */ +#define BLE_L2CAP_CH_COUNT_MAX (64) + +/**@brief Minimum L2CAP MTU, in bytes. */ +#define BLE_L2CAP_MTU_MIN (23) + +/**@brief Minimum L2CAP MPS, in bytes. */ +#define BLE_L2CAP_MPS_MIN (23) + +/**@brief Invalid CID. */ +#define BLE_L2CAP_CID_INVALID (0x0000) + +/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ +#define BLE_L2CAP_CREDITS_DEFAULT (1) + +/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources + * @{ */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ + /** @} */ + + /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes + * @{ */ +#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ +#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ +#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ +#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ +#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ +#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ +#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ +#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ +/** @} */ + +/** @} */ + +/**@addtogroup BLE_L2CAP_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @note These parameters are set per connection, so all L2CAP channels created on this connection + * will have the same parameters. + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. + * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. + */ +typedef struct +{ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to receive on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to transmit on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per + L2CAP channel. The minimum value is one. */ + uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission + per L2CAP channel. The minimum value is one. */ + uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection + with this configuration. The default value is zero, the maximum + value is @ref BLE_L2CAP_CH_COUNT_MAX. + @note if this parameter is set to zero, all other parameters in + @ref ble_l2cap_conn_cfg_t are ignored. */ +} ble_l2cap_conn_cfg_t; + +/**@brief L2CAP channel RX parameters. */ +typedef struct +{ + uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to + receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be + able to receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. + - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ + ble_data_t sdu_buf; /**< SDU data buffer for reception. + - If @ref ble_data_t::p_data is non-NULL, initial credits are + issued to the peer. + - If @ref ble_data_t::p_data is NULL, no initial credits are + issued to the peer. */ +} ble_l2cap_ch_rx_params_t; + +/**@brief L2CAP channel setup parameters. */ +typedef struct +{ + ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting + setup of an L2CAP channel, ignored otherwise. */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. + Used when replying to a setup request of an L2CAP + channel, ignored otherwise. */ +} ble_l2cap_ch_setup_params_t; + +/**@brief L2CAP channel TX parameters. */ +typedef struct +{ + uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to + transmit on this L2CAP channel. */ + uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is + able to receive on this L2CAP channel. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able + to transmit on this L2CAP channel. This is effective tx_mps, + selected by the SoftDevice as + MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ + uint16_t credits; /**< Initial credits given by the peer. */ +} ble_l2cap_ch_tx_params_t; + +/**@brief L2CAP Channel Setup Request event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ +} ble_l2cap_evt_ch_setup_request_t; + +/**@brief L2CAP Channel Setup Refused event. */ +typedef struct +{ + uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ +} ble_l2cap_evt_ch_setup_refused_t; + +/**@brief L2CAP Channel Setup Completed event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ +} ble_l2cap_evt_ch_setup_t; + +/**@brief L2CAP Channel SDU Data Buffer Released event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice + returns SDU data buffers supplied by the application, which have + not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or + @ref BLE_L2CAP_EVT_CH_TX event. */ +} ble_l2cap_evt_ch_sdu_buf_released_t; + +/**@brief L2CAP Channel Credit received event. */ +typedef struct +{ + uint16_t credits; /**< Additional credits given by the peer. */ +} ble_l2cap_evt_ch_credit_t; + +/**@brief L2CAP Channel received SDU event. */ +typedef struct +{ + uint16_t sdu_len; /**< Total SDU length, in bytes. */ + ble_data_t sdu_buf; /**< SDU data buffer. + @note If there is not enough space in the buffer + (sdu_buf.len < sdu_len) then the rest of the SDU will be + silently discarded by the SoftDevice. */ +} ble_l2cap_evt_ch_rx_t; + +/**@brief L2CAP Channel transmitted SDU event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< SDU data buffer. */ +} ble_l2cap_evt_ch_tx_t; + +/**@brief L2CAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or + @ref BLE_L2CAP_CID_INVALID if not present. */ + union + { + ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ + ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ + ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ + ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ + ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ + ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ + ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_l2cap_evt_t; + +/** @} */ + +/**@addtogroup BLE_L2CAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set up an L2CAP channel. + * + * @details This function is used to: + * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. + * - Reply to a setup request of an L2CAP channel (if called in response to a + * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection + * Response packet to a peer. + * + * @note A call to this function will require the application to keep the SDU data buffer alive + * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or + * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} + * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: + * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP + * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST + * event when replying to a setup request of an L2CAP channel. + * - As output: local_cid for this channel. + * @param[in] p_params L2CAP channel parameters. + * + * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, + * see @ref ble_l2cap_conn_cfg_t::ch_count. + */ +SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); + +/**@brief Release an L2CAP channel. + * + * @details This sends a Disconnection Request packet to a peer. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * + * @retval ::NRF_SUCCESS Successfully queued request for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); + +/**@brief Receive an SDU on an L2CAP channel. + * + * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers + * for reception per L2CAP channel. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Buffer accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a + * @ref BLE_L2CAP_EVT_CH_RX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Transmit an SDU on an L2CAP channel. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for + * transmission per L2CAP channel. + * + * @note The application can keep track of the available credits for transmission by following + * the procedure below: + * - Store initial credits given by the peer in a variable. + * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Decrement the variable, which stores the currently available credits, by + * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns + * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Increment the variable, which stores the currently available credits, by additional + * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than + * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in + * @ref BLE_L2CAP_EVT_CH_SETUP event. + * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a + * @ref BLE_L2CAP_EVT_CH_TX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Advanced SDU reception flow control. + * + * @details Adjust the way the SoftDevice issues credits to the peer. + * This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set + * the value that will be used for newly created channels. + * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every + * time it starts using a new reception buffer. + * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will + * use if this function is not called. + * - If set to zero, the SoftDevice will stop issuing credits for new reception + * buffers the application provides or has provided. SDU reception that is + * currently ongoing will be allowed to complete. + * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be + * written by the SoftDevice with the number of credits that is or will be + * available to the peer. If the value written by the SoftDevice is 0 when + * credits parameter was set to 0, the peer will not be able to send more + * data until more credits are provided by calling this function again with + * credits > 0. This parameter is ignored when local_cid is set to + * @ref BLE_L2CAP_CID_INVALID. + * + * @note Application should take care when setting number of credits higher than default value. In + * this case the application must make sure that the SoftDevice always has reception buffers + * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have + * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic + * on the connection handle may be stalled until the SoftDevice again has an available + * reception buffer. This applies even if the application has used this call to set the + * credits back to default, or zero. + * + * @retval ::NRF_SUCCESS Flow control parameters accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_L2CAP_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_ranges.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_ranges.h new file mode 100644 index 0000000000000..0935bca07101b --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_ranges.h @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + +#define BLE_L2CAP_SVC_BASE 0xB8 /**< L2CAP BLE SVC base. */ +#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + +#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ +#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + +#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ +#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + +#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ +#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_types.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_types.h new file mode 100644 index 0000000000000..88c93180c83da --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf52/nrf_mbr.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf52/nrf_mbr.h new file mode 100644 index 0000000000000..e0c80e278c350 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf52/nrf_mbr.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use the flash protect peripheral (BPROT or ACL) to protect the flash that is + * not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error.h new file mode 100644 index 0000000000000..6badee98e56df --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_sdm.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_sdm.h new file mode 100644 index 0000000000000..530959b9d67ad --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_soc.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_soc.h new file mode 100644 index 0000000000000..1e784b8db3832 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_nvic.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_nvic.h new file mode 100644 index 0000000000000..1f79cc3c8c22f --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_nvic.h @@ -0,0 +1,491 @@ +/* + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupt priority levels used by the SoftDevice. */ +#define __NRF_NVIC_SD_IRQ_PRIOS ((uint8_t)( \ + (1U << 0) /**< Priority level high .*/ \ + | (1U << 1) /**< Priority level medium. */ \ + | (1U << 4) /**< Priority level low. */ \ + )) + +/**@brief Interrupt priority levels available to the application. */ +#define __NRF_NVIC_APP_IRQ_PRIOS ((uint8_t)~__NRF_NVIC_SD_IRQ_PRIOS) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + || (((1 << priority) & __NRF_NVIC_APP_IRQ_PRIOS) == 0) + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_sdm.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_sdm.h new file mode 100644 index 0000000000000..282e762e004fd --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_sdm.h @@ -0,0 +1,367 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (1) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The SoftDevice variant of this firmware. */ +#define SD_VARIANT_ID 140 + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines the amount of flash that is used by the SoftDevice. + * Add @ref MBR_SIZE to find the first available flash address when the SoftDevice is installed + * just above the MBR (the usual case). + */ +#define SD_FLASH_SIZE 0x25000 + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_soc.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_soc.h new file mode 100644 index 0000000000000..beb4d3a541c05 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_soc.h @@ -0,0 +1,1079 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 6 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 6 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@brief Mask of PPI channels reserved by the SoftDevice when the SoftDevice is disabled. */ +#define NRF_SOC_SD_PPI_CHANNELS_SD_DISABLED_MSK ((uint32_t)(0)) + +/**@brief Mask of PPI channels reserved by the SoftDevice when the SoftDevice is enabled. */ +#define NRF_SOC_SD_PPI_CHANNELS_SD_ENABLED_MSK ((uint32_t)( \ + (1U << 17) \ + | (1U << 18) \ + | (1U << 19) \ + | (1U << 20) \ + | (1U << 21) \ + | (1U << 22) \ + | (1U << 23) \ + | (1U << 24) \ + | (1U << 25) \ + | (1U << 26) \ + | (1U << 27) \ + | (1U << 28) \ + | (1U << 29) \ + | (1U << 30) \ + | (1U << 31) \ + )) + +/**@brief Mask of PPI channels available to the application when the SoftDevice is disabled. */ +#define NRF_SOC_APP_PPI_CHANNELS_SD_DISABLED_MSK (~NRF_SOC_SD_PPI_CHANNELS_SD_DISABLED_MSK) + +/**@brief Mask of PPI channels available to the application when the SoftDevice is enabled. */ +#define NRF_SOC_APP_PPI_CHANNELS_SD_ENABLED_MSK (~NRF_SOC_SD_PPI_CHANNELS_SD_ENABLED_MSK) + +/**@brief Mask of PPI groups reserved by the SoftDevice when the SoftDevice is disabled. */ +#define NRF_SOC_SD_PPI_GROUPS_SD_DISABLED_MSK ((uint32_t)(0)) + +/**@brief Mask of PPI groups reserved by the SoftDevice when the SoftDevice is enabled. */ +#define NRF_SOC_SD_PPI_GROUPS_SD_ENABLED_MSK ((uint32_t)( \ + (1U << 4) \ + | (1U << 5) \ + )) + +/**@brief Mask of PPI groups available to the application when the SoftDevice is disabled. */ +#define NRF_SOC_APP_PPI_GROUPS_SD_DISABLED_MSK (~NRF_SOC_SD_PPI_GROUPS_SD_DISABLED_MSK) + +/**@brief Mask of PPI groups available to the application when the SoftDevice is enabled. */ +#define NRF_SOC_APP_PPI_GROUPS_SD_ENABLED_MSK (~NRF_SOC_SD_PPI_GROUPS_SD_ENABLED_MSK) + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_POF_THRESHOLDVDDH_SET = SOC_SVC_BASE_NOT_AVAILABLE + 12, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_POWER_DCDC0_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 20, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SD_POWER_USBPWRRDY_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 33, + SD_POWER_USBDETECTED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 34, + SD_POWER_USBREMOVED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 35, + SD_POWER_USBREGSTATUS_GET = SOC_SVC_BASE_NOT_AVAILABLE + 36, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + +/**@brief Power failure thresholds for high voltage */ +enum NRF_POWER_THRESHOLDVDDHS +{ + NRF_POWER_THRESHOLDVDDH_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V28, /**< 2.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V29, /**< 2.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V30, /**< 3.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V31, /**< 3.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V32, /**< 3.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V33, /**< 3.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V34, /**< 3.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V35, /**< 3.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V36, /**< 3.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V37, /**< 3.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V38, /**< 3.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V39, /**< 3.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V40, /**< 4.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V41, /**< 4.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V42 /**< 4.2 Volts power failure threshold. */ +}; + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_POWER_USB_POWER_READY, /**< Event indicating that a USB 3.3 V supply is ready. */ + NRF_EVT_POWER_USB_DETECTED, /**< Event indicating that voltage supply is detected on VBUS. */ + NRF_EVT_POWER_USB_REMOVED, /**< Event indicating that voltage supply is removed from VBUS. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + +/**@brief Enables or disables the USB power ready event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_POWER_READY) when a USB 3.3 V supply is ready. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbpwrrdy_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBPWRRDY_ENABLE, uint32_t, sd_power_usbpwrrdy_enable(uint8_t usbpwrrdy_enable)); + +/**@brief Enables or disables the power USB-detected event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_DETECTED) when a voltage supply is detected on VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbdetected_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBDETECTED_ENABLE, uint32_t, sd_power_usbdetected_enable(uint8_t usbdetected_enable)); + +/**@brief Enables or disables the power USB-removed event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_REMOVED) when a voltage supply is removed from VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbremoved_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREMOVED_ENABLE, uint32_t, sd_power_usbremoved_enable(uint8_t usbremoved_enable)); + +/**@brief Get USB supply status register content. + * + * @param[out] usbregstatus The content of USBREGSTATUS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREGSTATUS_GET, uint32_t, sd_power_usbregstatus_get(uint32_t * usbregstatus)); + +/**@brief Sets the power failure comparator threshold value. + * + * @note: Power failure comparator threshold setting. This setting applies both for normal voltage + * mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to + * VDDH only). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + +/**@brief Sets the power failure comparator threshold value for high voltage. + * + * @note: Power failure comparator threshold setting for high voltage mode (supply connected to + * VDDH only). This setting does not apply for normal voltage mode (supply connected to both + * VDD and VDDH). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDVDDHS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLDVDDH_SET, uint32_t, sd_power_pof_thresholdvddh_set(uint8_t threshold)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 1 (REG1). + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 0 (REG0). + * + * For more details on the REG0 stage, please see product specification. + * + * @param[in] dcdc_mode The mode of the DCDC0, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The dcdc_mode is invalid. + */ +SVCALL(SD_POWER_DCDC0_MODE_SET, uint32_t, sd_power_dcdc0_mode_set(uint8_t dcdc_mode)); + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - ACL + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_svc.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_svc.h new file mode 100644 index 0000000000000..292c692982837 --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_license-agreement.txt b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_license-agreement.txt new file mode 100644 index 0000000000000..a71adee7b9b0e --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_license-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_migration-document.pdf b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_migration-document.pdf new file mode 100644 index 0000000000000..2093d0c1482ad Binary files /dev/null and b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_migration-document.pdf differ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_release-notes.pdf b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_release-notes.pdf new file mode 100644 index 0000000000000..fff6b2d1e24d6 Binary files /dev/null and b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_release-notes.pdf differ diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_softdevice.hex b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_softdevice.hex new file mode 100644 index 0000000000000..8529afede257f --- /dev/null +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_softdevice.hex @@ -0,0 +1,9614 @@ +:020000040000FA +:1000000000040020990900002D0600007909000075 +:1000100037060000410600004B060000000000000B +:10002000000000000000000000000000BD0900000A +:1000300055060000000000005F0600006906000091 +:10004000730600007D060000870600009106000090 +:100050009B060000A5060000AF060000B9060000E0 +:10006000C3060000CD060000D7060000E106000030 +:10007000EB060000F5060000FF060000090700007F +:10008000130700001D0700002707000031070000CC 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(BLUETOOTH_SD == 132 || BLUETOOTH_SD == 140) - -#define MICROPY_PY_BLE (1) -#define MICROPY_PY_BLE_NUS (0) -#define BLUETOOTH_WEBBLUETOOTH_REPL (0) -#define MICROPY_PY_UBLUEPY (1) -#define MICROPY_PY_UBLUEPY_PERIPHERAL (1) -#define MICROPY_PY_UBLUEPY_CENTRAL (1) - -#else -#error "SD not supported" -#endif - -// Default defines. - -#ifndef MICROPY_PY_BLE -#define MICROPY_PY_BLE (0) -#endif - -#ifndef MICROPY_PY_BLE_NUS -#define MICROPY_PY_BLE_NUS (0) -#endif - -#endif diff --git a/ports/nrf/boards/TG-Watch02A/board.c b/ports/nrf/boards/TG-Watch02A/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/TG-Watch02A/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/TG-Watch02A/mpconfigboard.h b/ports/nrf/boards/TG-Watch02A/mpconfigboard.h new file mode 100644 index 0000000000000..9b8a31858d900 --- /dev/null +++ b/ports/nrf/boards/TG-Watch02A/mpconfigboard.h @@ -0,0 +1,61 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "TG-Techie's TG-Watch02A" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_07) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +#define BOARD_HAS_CRYSTAL 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_12) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_14) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_15) + +#define DEFAULT_UART_BUS_RX (&pin_P0_24) +#define DEFAULT_UART_BUS_TX (&pin_P0_25) diff --git a/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk b/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk new file mode 100644 index 0000000000000..c75c6dd3940f2 --- /dev/null +++ b/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk @@ -0,0 +1,11 @@ +USB_VID = 0x239A +USB_PID = 0x802A + +USB_PRODUCT = "TG-Watch02A" +USB_MANUFACTURER = "TG-Tech" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q128JV_SQ" diff --git a/ports/nrf/boards/TG-Watch02A/pins.c b/ports/nrf/boards/TG-Watch02A/pins.c new file mode 100644 index 0000000000000..582d954ecc805 --- /dev/null +++ b/ports/nrf/boards/TG-Watch02A/pins.c @@ -0,0 +1,51 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + + /*Port and bus pins*/ + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + + /*TG-Watch02A specific pins*/ + + //tft / display pins + { MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_DISP_PWR), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_01) }, + + //cap touch screen + { MP_ROM_QSTR(MP_QSTR_CTP_RESET), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_CTP_INT), MP_ROM_PTR(&pin_P1_05) }, + + //power / battery + { MP_ROM_QSTR(MP_QSTR_CHRG_STAT), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_BAT_VDIV), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_VBUS_PRESENT), MP_ROM_PTR(&pin_P1_04) }, + + //sensors / outputs + { MP_ROM_QSTR(MP_QSTR_RTC_RESET), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_RTC_INT), MP_ROM_PTR(&pin_P0_27) }, + + { MP_ROM_QSTR(MP_QSTR_ACCEL_INT1), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_ACCEL_INT2), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_HAPTIC_INT), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_HAPTIC_ENABLE), MP_ROM_PTR(&pin_P1_06) }, + + //smc pins + { MP_ROM_QSTR(MP_QSTR_SMC_RESET), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON0), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P1_09) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/aramcon_badge_2019/board.c b/ports/nrf/boards/aramcon_badge_2019/board.c new file mode 100644 index 0000000000000..efb449285b97b --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Uri Shaked + * Copyright (c) 2019 Benjamin Meisels + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h new file mode 100644 index 0000000000000..51d14721cfebb --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h @@ -0,0 +1,31 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "ARAMCON Badge 2019" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_11) + +#ifdef QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 4) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 6) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(1, 2) +#endif + +#ifdef SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P1_00 +#define SPI_FLASH_CS_PIN &pin_P1_02 +#endif + +#define BOARD_HAS_32KHZ_XTAL 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_28) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_03) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_01) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_10) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_09) diff --git a/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk new file mode 100644 index 0000000000000..09252ab4b7432 --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x807A +USB_PRODUCT = "ARAMCON Badge 2019" +USB_MANUFACTURER = "ARAMCON Badge Team" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +CIRCUITPY_DISPLAYIO = 1 + +CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 diff --git a/ports/nrf/boards/aramcon_badge_2019/pins.c b/ports/nrf/boards/aramcon_badge_2019/pins.c new file mode 100644 index 0000000000000..82ab20013124c --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/pins.c @@ -0,0 +1,34 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_LEFT_BUTTON), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_MIDDLE_BUTTON), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT_BUTTON), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_SND_CS), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_SND_DREQ), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_SND_RESET), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_SND_XDCS), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_DISP_BUSY), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_DISP_RESET), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_VIBRATION_MOTOR), MP_ROM_PTR(&pin_P0_17) }, + + { MP_ROM_QSTR(MP_QSTR_BATTERY_SENSE), MP_ROM_PTR(&pin_P0_30) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/arduino_nano_33_ble/README.md b/ports/nrf/boards/arduino_nano_33_ble/README.md new file mode 100644 index 0000000000000..42d7a861840a6 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/README.md @@ -0,0 +1,27 @@ +# Arduino Nano 33 BLE and Nano 33 BLE Sense + +The [Arduino Nano 33 BLE](https://store.arduino.cc/usa/nano-33-ble-with-headers) and +[Arduino Nano 33 BLE Sense](https://store.arduino.cc/usa/nano-33-ble-sense) and +are built around the NINA B306 module, based on Nordic nRF 52840 and containing +a powerful Cortex M4F. Both include an onboard 9 axis Inertial Measurement Unit (IMU), the LSM9DS1. +The Nano 33 BLE Sense adds an LPS22HB barometric pressure and temperature sensor, +an ADPS-9960 digital proximity, ambient light, RGB, and gensture sensor, +and an MP34DT05 digital microphone. + +Note: the Arduino Nano 33 BLE and BLE Sense do not include a QSPI external +flash. Any Python code will need to be stored on the internal flash +filesystem. + +I2C pins `board.SCL1` and `board.SDA1` are not exposed and are used for onboard peripherals. +Pin `board.R_PULLUP` must be set to high to enable the `SCL1` and `SDA1` pullups for proper operation. + +Pin `board.VDD_ENV` applies power to the LSM9DS1, and must be high for it to be operational. + +Pins `board.MIC_PWR`, `board.PDMDIN`, and `board.PDMCLK` are for the Nano 33 BLE Sense onboard microphone. + +Pin `board.INT_ADPS` is the interrupt pin from the ADPS-9960. + +Pins `board.RGB_LED_R`, `board.RGB_LED_G`, and `board.RGB_LED_B` +are the red, green and blue LEDS in the onboard RGB LED. + +Pins `board.LED_G` and `board.LED_Y` are onboard green and red LEDs. `board.LED_Y` is also `board.SCK`. diff --git a/ports/nrf/boards/arduino_nano_33_ble/board.c b/ports/nrf/boards/arduino_nano_33_ble/board.c new file mode 100644 index 0000000000000..ddfcde2848b74 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/board.c @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "nrf.h" +#include "nrf_rtc.h" + +void board_init(void) { + // Initializations below from Arduino variant.cpp. + + // // turn power LED on + // pinMode(LED_PWR, OUTPUT); + // digitalWrite(LED_PWR, HIGH); + + // Errata Nano33BLE - I2C pullup is on SWO line, need to disable TRACE + // was being enabled by nrfx_clock_anomaly_132 + CoreDebug->DEMCR = 0; + NRF_CLOCK->TRACECONFIG = 0; + + // FIXME: bootloader enables interrupt on COMPARE[0], which we don't handle + // Disable it here to avoid getting stuck when OVERFLOW irq is triggered + nrf_rtc_event_disable(NRF_RTC1, NRF_RTC_INT_COMPARE0_MASK); + nrf_rtc_int_disable(NRF_RTC1, NRF_RTC_INT_COMPARE0_MASK); + + // // FIXME: always enable I2C pullup and power @startup + // // Change for maximum powersave + // pinMode(PIN_ENABLE_SENSORS_3V3, OUTPUT); + // pinMode(PIN_ENABLE_I2C_PULLUP, OUTPUT); + + // digitalWrite(PIN_ENABLE_SENSORS_3V3, HIGH); + // digitalWrite(PIN_ENABLE_I2C_PULLUP, HIGH); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h new file mode 100644 index 0000000000000..d34a862439087 --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.h @@ -0,0 +1,16 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Arduino Nano 33 BLE" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_02) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_31) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_13) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_01) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_08) + +#define DEFAULT_UART_BUS_RX (&pin_P1_10) +#define DEFAULT_UART_BUS_TX (&pin_P1_03) diff --git a/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk new file mode 100644 index 0000000000000..d5e38c5b7285a --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0x2341 +USB_PID = 0x805A +USB_PRODUCT = "Arduino_Nano_33_BLE" +USB_MANUFACTURER = "Arduino" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 + +# Allocate two, not just one I2C peripheral, so that we have both +# on-board and off-board I2C available. +# When SPIM3 becomes available we'll be able to have two I2C and two SPI peripherals. +# We use a CFLAGS define here because there are include order issues +# if we try to include "mpconfigport.h" into nrfx_config.h . +CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2 diff --git a/ports/nrf/boards/arduino_nano_33_ble/pins.c b/ports/nrf/boards/arduino_nano_33_ble/pins.c new file mode 100644 index 0000000000000..9cdd36933128f --- /dev/null +++ b/ports/nrf/boards/arduino_nano_33_ble/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_08) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_LED_Y), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_RGB_LED_R), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_G), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_B), MP_ROM_PTR(&pin_P0_06) }, + + // Power line to LSM9DS1. + { MP_ROM_QSTR(MP_QSTR_VDD_ENV), MP_ROM_PTR(&pin_P0_22) }, + + // Pullup voltage for SDA1 and SCL1 + { MP_ROM_QSTR(MP_QSTR_R_PULLUP), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_MIC_PWR), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_PDMCLK), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_PDMDIN), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_INT_APDS), MP_ROM_PTR(&pin_P0_19) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/circuitplayground_bluefruit/board.c b/ports/nrf/boards/circuitplayground_bluefruit/board.c new file mode 100644 index 0000000000000..3aa6857da2ded --- /dev/null +++ b/ports/nrf/boards/circuitplayground_bluefruit/board.c @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "py/obj.h" +#include "peripherals/nrf/pins.h" +#include "supervisor/shared/board.h" + +#include "nrf_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + // Turn off board.POWER_SWITCH (power-saving switch) on each soft reload, to prevent confusion. + nrf_gpio_cfg(POWER_SWITCH_PIN->number, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + nrf_gpio_pin_write(POWER_SWITCH_PIN->number, false); + + board_reset_user_neopixels(); +} diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h new file mode 100644 index 0000000000000..17b044b145f51 --- /dev/null +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit Circuit Playground Bluefruit" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_14) + +// Board does not have a 32kHz crystal. It does have a 32MHz crystal. +#define BOARD_HAS_32KHZ_XTAL (0) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 00) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 15) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_21 +#define SPI_FLASH_MISO_PIN &pin_P0_23 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_15 +#endif + +// Disables onboard peripherals and neopixels to save power. +#define POWER_SWITCH_PIN (&pin_P0_06) + +#define USER_NEOPIXELS_PIN (&pin_P0_13) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_04) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_05) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_05) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_03) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_29) + +#define DEFAULT_UART_BUS_RX (&pin_P0_30) +#define DEFAULT_UART_BUS_TX (&pin_P0_14) + +#define SPEAKER_ENABLE_PIN (&pin_P1_04) diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk new file mode 100644 index 0000000000000..f63554e5e8f9e --- /dev/null +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x8046 +USB_PRODUCT = "Circuit Playground Bluefruit" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +# Allocate two, not just one I2C peripheral for CPB, so that we have both +# on-board and off-board I2C available. +# When SPIM3 becomes available we'll be able to have two I2C and two SPI peripherals. +# We use a CFLAGS define here because there are include order issues +# if we try to include "mpconfigport.h" into nrfx_config.h . +CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2 diff --git a/ports/nrf/boards/circuitplayground_bluefruit/pins.c b/ports/nrf/boards/circuitplayground_bluefruit/pins.c new file mode 100644 index 0000000000000..d0d9659db79a5 --- /dev/null +++ b/ports/nrf/boards/circuitplayground_bluefruit/pins.c @@ -0,0 +1,75 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_AUDIO), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_04) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_30) }, + + // This cannot be A7, as it is on CPX. We don't have enough analog inputs. + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_TEMPERATURE), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_SLIDE_SWITCH), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_06) }, + + // If high, turns off NeoPixels, LIS3DH, sound sensor, light sensor, temp sensor. + { MP_ROM_QSTR(MP_QSTR_POWER_SWITCH), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_14) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_P1_12) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_P1_04) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/clue_nrf52840_express/board.c b/ports/nrf/boards/clue_nrf52840_express/board.c new file mode 100644 index 0000000000000..e9f8d244e43b9 --- /dev/null +++ b/ports/nrf/boards/clue_nrf52840_express/board.c @@ -0,0 +1,102 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_P0_13, // TFT_DC Command or data + &pin_P0_12, // TFT_CS Chip select + &pin_P1_03, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 240, // Width (after rotation) + 240, // Height (after rotation) + 80, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_P1_05, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h new file mode 100644 index 0000000000000..9cb05de092410 --- /dev/null +++ b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit CLUE nRF52840 Express" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_16) + +#define MICROPY_HW_LED_STATUS (&pin_P1_01) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +// No 32kHz crystal. THere's a 32MHz crystal in the nRF module. +#define BOARD_HAS_32KHZ_XTAL (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_25) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_24) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_08) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_26) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_06) + +#define DEFAULT_UART_BUS_RX (&pin_P0_04) +#define DEFAULT_UART_BUS_TX (&pin_P0_05) diff --git a/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.mk new file mode 100644 index 0000000000000..16cb20824791a --- /dev/null +++ b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x8072 +USB_PRODUCT = "CLUE nRF52840 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/clue_nrf52840_express/pins.c b/ports/nrf/boards/clue_nrf52840_express/pins.c new file mode 100644 index 0000000000000..ab0738893cb36 --- /dev/null +++ b/ports/nrf/boards/clue_nrf52840_express/pins.c @@ -0,0 +1,113 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_04) }, + + { MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_07) }, + + { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_27) }, + + { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_30) }, + + { MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_P17), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_01) }, + + { MP_ROM_QSTR(MP_QSTR_P18), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_P20), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_00) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_PROXIMITY_LIGHT_INTERRUPT), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_GYRO_INTERRUPT), MP_ROM_PTR(&pin_P1_06) }, + + { MP_ROM_QSTR(MP_QSTR_WHITE_LEDS), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/common.ld b/ports/nrf/boards/common.ld deleted file mode 100644 index df81aae5833e7..0000000000000 --- a/ports/nrf/boards/common.ld +++ /dev/null @@ -1,108 +0,0 @@ -/* Flash region for File System */ -__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); -__fatfs_flash_length = LENGTH(FLASH_FATFS); - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } >FLASH - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - */ - - /* used by the startup to initialize data */ - _sidata = .; - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT (_sidata) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - _ram_start = .; /* create a global symbol at ram start for garbage collector */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - _heap_start = .; /* define a global symbol at heap start */ - . = . + _minimum_heap_size; - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - /* Remove information from the standard libraries */ - /* - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - */ - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld new file mode 100644 index 0000000000000..2fca167079993 --- /dev/null +++ b/ports/nrf/boards/common.template.ld @@ -0,0 +1,148 @@ +/* + GNU linker script for NRF52840 w/ s140 6.0.0 SoftDevice +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ + /* nRF SoftDevice */ + FLASH_MBR (rx) : ORIGIN = ${MBR_START_ADDR}, LENGTH = ${MBR_SIZE} + FLASH_SD (rx) : ORIGIN = ${SD_FLASH_START_ADDR}, LENGTH = ${SD_FLASH_SIZE} + FLASH_ISR (rx) : ORIGIN = ${ISR_START_ADDR}, LENGTH = ${ISR_SIZE} + FLASH_FIRMWARE (rx) : ORIGIN = ${CIRCUITPY_FIRMWARE_START_ADDR}, LENGTH = ${CIRCUITPY_FIRMWARE_SIZE} + FLASH_BLE_CONFIG (r) : ORIGIN = ${CIRCUITPY_BLE_CONFIG_START_ADDR}, LENGTH = ${CIRCUITPY_BLE_CONFIG_SIZE} + FLASH_NVM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_NVM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_NVM_SIZE} + FLASH_FATFS (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} + FLASH_BOOTLOADER (rx) : ORIGIN = ${BOOTLOADER_START_ADDR}, LENGTH = ${BOOTLOADER_SIZE} + FLASH_BOOTLOADER_SETTINGS (r) : ORIGIN = ${BOOTLOADER_SETTINGS_START_ADDR}, LENGTH = ${BOOTLOADER_SETTINGS_SIZE} + + + /* 0x2000000 - RAM:ORIGIN is reserved for Softdevice */ + /* SoftDevice 6.1.0 with 5 connections and various increases takes just under 64kiB. + /* To measure the minimum required amount of memory for given configuration, set this number + high enough to work and then check the mutation of the value done by sd_ble_enable. */ + SPIM3_RAM (rw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE}, LENGTH = ${SPIM3_BUFFER_SIZE} + RAM (xrw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = 256K - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE} + +} + +/* produce a link error if there is not this amount of RAM available */ +_minimum_heap_size = 0; + +/* top end of the stack */ + +/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_end = 0x20020000; /* tunable */ + +/* nrf52840 SPIM3 needs its own area to work around hardware problems. Nothing else may use this space. */ +_spim3_ram = ORIGIN(SPIM3_RAM); +_spim3_ram_end = ORIGIN(SPIM3_RAM) + LENGTH(RAM); + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_FIRMWARE + + /* + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH_FIRMWARE + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH_FIRMWARE + */ + + /* used by the startup to initialize data */ + _sidata = .; + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT (_sidata) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + _ram_start = .; /* create a global symbol at ram start for garbage collector */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + _heap_start = .; /* define a global symbol at heap start */ + . = . + _minimum_heap_size; + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + ${CIRCUITPY_DEFAULT_STACK_SIZE}; + . = ALIGN(4); + } >RAM + + /* Remove information from the standard libraries */ + /* + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + */ + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/ports/nrf/boards/electronut_labs_blip/README.md b/ports/nrf/boards/electronut_labs_blip/README.md new file mode 100644 index 0000000000000..c34ef16f8ddba --- /dev/null +++ b/ports/nrf/boards/electronut_labs_blip/README.md @@ -0,0 +1,67 @@ +# Setup + +The `Electronut Labs Blip` board is a development board based on the `nRF52840` SoC from +Nordic Semiconductors. It has a Black Magic Probe compatible programmer and debugger +built in, along with temperature/humidity sensor, ambient light intensity sensor, and +a 3-axis accelerometer. It can be used to prototype very low power devices. It also has +provision for an SD card slot, which makes it a complete and versatile development board. + +Schematic, datasheet, pin mapping etc. can be found over [here](https://docs.electronut.in/blip/). + +Features: + +* Raytac MDBT50Q-1M module based on Nordic Semiconductor's nRF52840 +* LIS2DDH12 High-performance 3-axis "femto" accelerometer +* Optical Sensor LTR-329ALS-01 +* Si7006-A20 I2C humidity and temperature sensor +* On board STM32F103CBT6 as Black magic probe debugger +* NFC Antenna +* MicroSD slot +* Power Supply: USB, JST connector for Li-ion/Li-po +* BQ24079 battery charging and power management IC + +## Installing CircuitPython submodules + +Before you can build, you will need to run the following commands once, which +will install the submodules that are part of the CircuitPython ecosystem, and +build the `mpy-cross` tool: + +``` +$ cd circuitpython +$ git submodule update --init +$ make -C mpy-cross +``` + +## Building and Flashing CircuitPython + +No special notes for this, follow `ports/nrf` generic `README.md`. + +### Flashing CircuitPython with GDB using on board Black magic probe debugger + +``` +$ cd ports/nrf +$ make V=1 SD=s140 SERIAL=/dev/ttyACM0 BOARD=electronut_labs_blip all +... +... +LINK build-electronut_labs_blip-s140/firmware.elf + +778588 bytes free in flash out of 1048576 bytes ( 1024.0 kb ). +228320 bytes free in ram for stack out of 245760 bytes ( 240.0 kb ). + +Create build-electronut_labs_blip-s140/firmware.bin +Create build-electronut_labs_blip-s140/firmware.hex +Create build-electronut_labs_blip-s140/firmware.uf2 +python3 ../../tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "build-electronut_labs_blip-s140/firmware.uf2" build-electronut_labs_blip-s140/firmware.hex +Converting to uf2, output size: 540160, start address: 0x26000 +Wrote 540160 bytes to build-electronut_labs_blip-s140/firmware.uf2. +``` + +Now you can use either `.hex` or `.elf` from the generated files inside +`build-electronut_labs_blip-s140` directory. Now you can use `arm-none-eabi-gdb` +to flash circuitpython on Blip. + +### Other tips + +Once circuitpython is running on your board, it will come up as a mass storage +device named `CIRCUITPY`, where you can drop in your python code. The file names +it looks for are `main.py`, `main.txt`, `code.py` or `code.txt`. diff --git a/ports/nrf/boards/electronut_labs_blip/board.c b/ports/nrf/boards/electronut_labs_blip/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/electronut_labs_blip/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h new file mode 100644 index 0000000000000..ed1c32bd3cade --- /dev/null +++ b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 tavish@electronut.in + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define ELECTRONUT_LABS_PAPYR + +#define MICROPY_HW_BOARD_NAME "Electronut Labs Blip" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_12) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_25) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_02) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_24) + +#define DEFAULT_UART_BUS_RX (&pin_P0_08) +#define DEFAULT_UART_BUS_TX (&pin_P0_06) diff --git a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk new file mode 100644 index 0000000000000..f30b308ecfcb4 --- /dev/null +++ b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x803C +USB_PRODUCT = "Blip" +USB_MANUFACTURER = "Electronut Labs" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_DISPLAYIO = 1 +CIRCUITPY_GAMEPAD = 1 +CIRCUITPY_STAGE = 1 diff --git a/ports/nrf/boards/electronut_labs_blip/pins.c b/ports/nrf/boards/electronut_labs_blip/pins.c new file mode 100644 index 0000000000000..a8f9af1cd74fd --- /dev/null +++ b/ports/nrf/boards/electronut_labs_blip/pins.c @@ -0,0 +1,72 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + // odd row + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_P1_06) }, + + // even row + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_P1_08) }, + + // SCL SDA as pins also + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_17) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_GREEN_LED), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P0_18) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/electronut_labs_papyr/README.md b/ports/nrf/boards/electronut_labs_papyr/README.md new file mode 100644 index 0000000000000..fda39019382ae --- /dev/null +++ b/ports/nrf/boards/electronut_labs_papyr/README.md @@ -0,0 +1,58 @@ +# Setup + +The `Electronut Labs Papyr` board is based on the `nRF52840` SoC from +Nordic Semiconductors. It has an e-ink display on it, along with a CR2477 +battery holder. + +Papyr can be programmed with the [`Adafruit nRF52 bootloader`](https://github.com/adafruit/Adafruit_nRF52_Bootloader) to + +Schematic, datasheet default pin mapping etc. can be found over [here](https://docs.electronut.in/papyr/). The default pin mapping can be found in the board directory. + +## Installing CircuitPython submodules + +Before you can build, you will need to run the following commands once, which +will install the submodules that are part of the CircuitPython ecosystem, and +build the `mpy-cross` tool: + +``` +$ cd circuitpython +$ git submodule update --init +$ make -C mpy-cross +``` + +## Installing the Bootloader + +If the `Adafruit nRF52 bootloader` is installed on the board, then the +bootloader allows you to update the core CircuitPython firmware and internal +file system contents using serial, or USB CDC, or USB mass storage. + +On empty devices, the bootloader will need to be flashed once using a +HW debugger such as a Segger J-Link, or Blackmagicprobe +(or [Electronut labs Bumpy](https://docs.electronut.in/bumpy/)). + + +## Building and Flashing CircuitPython + +No special notes for this, follow `ports/nrf` generic `README.md`. + +### Flashing CircuitPython with MSC UF2 + +`uf2` file is generated last by `all` target. + +``` +$ cd ports/nrf +$ make V=1 SD=s140 SERIAL=/dev/ttyACM0 BOARD=electronut_labs_papyr all +... +... +python3 ../../tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "build-electronut_labs_papyr-s140/firmware.uf2" build-electronut_labs_papyr-s140/firmware.hex +Converting to uf2, output size: 536576, start address: 0x26000 +Wrote 536576 bytes to build-electronut_labs_papyr-s140/firmware.uf2 +``` + +Simply drag and drop firmware.uf2 to the MSC, the nrf52840 will blink fast and reset after done. + +### Other tips + +Once circuitpython is running on your board, it will come up as a mass storage +device named `CIRCUITPY`, where you can drop in your python code. The file names +it looks for are `main.py`, `main.txt`, `code.py` or `code.txt`. diff --git a/ports/nrf/boards/electronut_labs_papyr/board.c b/ports/nrf/boards/electronut_labs_papyr/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/electronut_labs_papyr/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h new file mode 100644 index 0000000000000..4c2e7a92c1905 --- /dev/null +++ b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define ELECTRONUT_LABS_PAPYR + +#define MICROPY_HW_BOARD_NAME "Electronut Labs Papyr" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_06) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_05) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_31) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_29) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_01) + +#define DEFAULT_UART_BUS_RX (&pin_P0_07) +#define DEFAULT_UART_BUS_TX (&pin_P0_08) diff --git a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk new file mode 100644 index 0000000000000..569dccc9c4aba --- /dev/null +++ b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x803C +USB_PRODUCT = "Papyr" +USB_MANUFACTURER = "Electronut Labs" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/electronut_labs_papyr/pins.c b/ports/nrf/boards/electronut_labs_papyr/pins.c new file mode 100644 index 0000000000000..ef0178e9b11db --- /dev/null +++ b/ports/nrf/boards/electronut_labs_papyr/pins.c @@ -0,0 +1,44 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_BUSY), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_DC), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_RES), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_EINK_EN), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_GREEN_LED), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/feather52/README.md b/ports/nrf/boards/feather52/README.md deleted file mode 100644 index c98f54614ff61..0000000000000 --- a/ports/nrf/boards/feather52/README.md +++ /dev/null @@ -1,196 +0,0 @@ -# Setup - -## Installing CircuitPython submodules - -Before you can build, you will need to run the following commands once, which -will install the submodules that are part of the CircuitPython ecosystem, and -build the `mpy-cross` tool: - -``` -$ cd circuitpython -$ git submodule update --init -$ make -C mpy-cross -``` - -You then need to download the SD and Nordic SDK files via: - -> This script relies on `wget`, which must be available from the command line. - -``` -$ cd ports/nrf -$ ./drivers/bluetooth/download_ble_stack.sh -``` - -## Installing `nrfutil` - -The Adafruit Bluefruit nRF52 Feather ships with a serial and OTA BLE bootloader -that can be used to flash firmware images over a simple serial connection, -using the on-board USB serial converter. - -If you haven't installed this command-line tool yet, go to the `/libs/nrfutil` -folder (where nrfutil 0.5.2 is installed as a sub-module) and run the following -commands: - -> If you get a 'sudo: pip: command not found' error running 'sudo pip install', -you can install pip via 'sudo easy_install pip' - -``` -$ cd ../../lib/nrfutil -$ sudo pip install -r requirements.txt -$ sudo python setup.py install -``` - -# Building and flashing firmware images - -## Building CircuitPython binaries - -#### REPL over UART (default settings) - -To build a CircuitPython binary with default settings for the -`feather52` target enter: - -> **NOTE:** `BOARD=feather52` is the default option and isn't stricly required. - -``` -$ make BOARD=feather52 V=1 -``` - -#### REPL over BLE UART (AKA 'NUS') - -To build a CircuitPython binary that uses the Nordic UART Service (AKA 'NUS' or -'BLEUART'), modify `/ports/nrf/bluetooth_conf.h` to have the following macro -set to `1` in the `#elif (BLUETOOTH_SD == 132)` section: - -``` -#define MICROPY_PY_BLE_NUS (1) -``` - -... then build as normal, via: - -``` -$ make BOARD=feather52 V=1 -``` - -You can then connect over BLE UART using an application like Bluefruit LE -Connect, available for Android, iOS and OS X, or any other application that -supports the NUS service and allows you to send the corrent EOL sequence. - -## Flashing binaries with `nrfutil` - -### 1. **Update bootloader** to single-bank version - -The Adafruit nRF52 Feather ships, by default, with a **dual-bank** bootloader -that cuts the available flash memory in half in exchange for safer -OTA updates. - -Due to the size of CircuitPython, we must migrate this bootloader to a -**single-bank** version, doubling the amount of flash memory available to us. - -> These commands only need to be run once and will update the SoftDevice and -bootloader from the dual-bank version that ships on Arduino-based Adafruit -Feather52 boards to a single-bank CircuitPython compatible version: - -#### S132 v2.0.1 single-bank (recommended): - -By default s132 v2.0.1 is used when no `SOFTDEV_VERSION` field is passed in: - -``` -$ make BOARD=feather52 SERIAL=/dev/tty.SLAB_USBtoUART boot-flash -``` - -#### S132 v5.0.0 (BLE5, experimental): - -To enable BLE5 support and the latest S132 release, flash the v5.0.0 bootloader via: - -``` -$ make BOARD=feather52 SERIAL=/dev/tty.SLAB_USBtoUART SOFTDEV_VERSION=5.0.0 boot-flash -``` - -### 2. Generate and flash a CircuitPython DFU .zip package over serial - -The following command will package and flash the CircuitPython binary using the -appropriate bootloader mentionned above. - -This command assumes you have already built a valid circuitpython -image, as described earlier in this readme. - -> The name of the serial port target will vary, depending on your OS. - -``` -$ make BOARD=feather52 SERIAL=/dev/tty.SLAB_USBtoUART dfu-gen dfu-flash -``` - -By default, CircuitPython will build with **BLE** support enabled using -`SD=s132` and the `SOFTDEV_VERSION=2.0.1`. If you wish to specify a different -SD family or version you can enter the optional fields as shown below: - -``` -$ make BOARD=feather52 SERIAL=/dev/tty.SLAB_USBtoUART SD=s132 SOFTDEV_VERSION=5.0.0 dfu-gen dfu-flash -``` - -## Working with CircuitPython - -### Running local files with `ampy` - -[ampy](https://learn.adafruit.com/micropython-basics-load-files-and-run-code/install-ampy) -is a command-line tool that can be used with the nRF52 Feather to transfer -local python files to the nRF52 for execution, rather than having to enter -the REPL manually, enter paste mode, and paste the code yourself. - -> **IMPORTANT**: You must have `ampy` version **1.0.3** or higher to use `ampy` - with the nRF52. The bootloader on the nRF52 requires a delay between the - HW reset, and the moment when the command sequance is sent to enter raw - mode. This required `-d/--delay` flag was added in release 1.0.3. - - -Save the following file as `test.py`: - -``` -import board -import digitalio -import time - -led = digitalio.DigitalInOut(board.LED2) -led.direction = digitalio.Direction.OUTPUT - -while True: - led.value = True - time.sleep(0.5) - led.value = False - time.sleep(0.5) -``` - -Then run the saved file via ampy, updating the serial port as required: - -``` -$ ampy -p /dev/tty.SLAB_USBtoUART -d 1.5 run test.py -``` - -This should give you blinky at 1 Hz on LED2 (the blue LED on the nRF52 Feather). - -### Uploading files and libraries with `ampy` - -To upload Python files or pre-compiled CircuitPython libraries to the `lib` folder, -run the following commands: - -> In this example **i2c_device.py** is used, which is part of - [Adafruit_CircuitPython_BusDevice](https://github.com/adafruit/Adafruit_CircuitPython_BusDevice) - -``` -$ ampy -p /dev/tty.SLAB_USBtoUART -d 1.5 put i2c_device.py lib/i2c_device.py -``` - -To verify that the file was uploaded correctly, you can check the contents of -the `lib` folder with: - -``` -$ ampy -p /dev/tty.SLAB_USBtoUART -d 1.5 ls /lib -i2c_device.py -``` - -### Suggested libraries - -The following libraries should be installed as a minimum on most new boards: - -- [Adafruit_CircuitPython_BusDevice](https://github.com/adafruit/Adafruit_CircuitPython_BusDevice) -- [Adafruit_CircuitPython_Register](https://github.com/adafruit/Adafruit_CircuitPython_Register/tree/master) diff --git a/ports/nrf/boards/feather52/board.c b/ports/nrf/boards/feather52/board.c deleted file mode 100644 index e0b77437b9a80..0000000000000 --- a/ports/nrf/boards/feather52/board.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "nrf.h" - -#include "boards/board.h" - -// Must match temp register in bootloader -#define BOOTLOADER_VERSION_REGISTER NRF_TIMER2->CC[0] -uint32_t bootloaderVersion = 0; - -void board_init(void) { - // Retrieve bootloader version - bootloaderVersion = BOOTLOADER_VERSION_REGISTER; -} - -// Check the status of the two buttons on CircuitPlayground Express. If both are -// pressed, then boot into user safe mode. -bool board_requests_safe_mode(void) { -// gpio_set_pin_function(PIN_PA14, GPIO_PIN_FUNCTION_OFF); -// gpio_set_pin_direction(PIN_PA14, GPIO_DIRECTION_IN); -// gpio_set_pin_pull_mode(PIN_PA14, GPIO_PULL_DOWN); -// -// gpio_set_pin_function(PIN_PA28, GPIO_PIN_FUNCTION_OFF); -// gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_IN); -// gpio_set_pin_pull_mode(PIN_PA28, GPIO_PULL_DOWN); -// bool safe_mode = gpio_get_pin_level(PIN_PA14) && -// gpio_get_pin_level(PIN_PA28); -// reset_pin(PIN_PA14); -// reset_pin(PIN_PA28); -// return safe_mode; - - return false; -} - -void reset_board(void) { -// uint8_t empty[30]; -// memset(empty, 0, 30); -// digitalio_digitalinout_obj_t neopixel_pin; -// common_hal_digitalio_digitalinout_construct(&neopixel_pin, &pin_PB23); -// common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, -// DRIVE_MODE_PUSH_PULL); -// common_hal_neopixel_write(&neopixel_pin, empty, 30); -// common_hal_digitalio_digitalinout_deinit(&neopixel_pin); -} diff --git a/ports/nrf/boards/feather52/bootloader/.gitattributes b/ports/nrf/boards/feather52/bootloader/.gitattributes deleted file mode 100644 index 608f8c345c5da..0000000000000 --- a/ports/nrf/boards/feather52/bootloader/.gitattributes +++ /dev/null @@ -1,2 +0,0 @@ -# Inform git that .zip files should be treated as binary -*.zip binary diff --git a/ports/nrf/boards/feather52/bootloader/README.md b/ports/nrf/boards/feather52/bootloader/README.md deleted file mode 100644 index 434859085951e..0000000000000 --- a/ports/nrf/boards/feather52/bootloader/README.md +++ /dev/null @@ -1,9 +0,0 @@ -# Adafruit nRF52 Feather Single-Bank Bootloader - -These files contain an implementation of a single-bank bootloader, -which doubles the amount of flash memory available to applications -at the expense of safe over the air updates. - -Two versions are present, based on release **2.0.1** and **5.0.0** -of the Nordic S132 SoftDevice. The SoftDevice is included as poart -of the bootloader binary. diff --git a/ports/nrf/boards/feather52/bootloader/feather52_bootloader_2.0.1_s132_single.zip b/ports/nrf/boards/feather52/bootloader/feather52_bootloader_2.0.1_s132_single.zip deleted file mode 100644 index 42a83bb907638..0000000000000 Binary files a/ports/nrf/boards/feather52/bootloader/feather52_bootloader_2.0.1_s132_single.zip and /dev/null differ diff --git a/ports/nrf/boards/feather52/bootloader/feather52_bootloader_5.0.0_s132_single.zip b/ports/nrf/boards/feather52/bootloader/feather52_bootloader_5.0.0_s132_single.zip deleted file mode 100644 index 2f30a9fd4c9e6..0000000000000 Binary files a/ports/nrf/boards/feather52/bootloader/feather52_bootloader_5.0.0_s132_single.zip and /dev/null differ diff --git a/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_2.0.1.ld b/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_2.0.1.ld deleted file mode 100644 index a1c128e377e2d..0000000000000 --- a/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_2.0.1.ld +++ /dev/null @@ -1,44 +0,0 @@ -/* - GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice - - MEMORY MAP - ------------------------------------------------------------------------ - START ADDR END ADDR SIZE DESCRIPTION - ---------- ---------- ------- ----------------------------------------- - 0x0007F000..0x0007FFFF ( 4KB) Bootloader Settings - 0x0007E000..0x0007EFFF ( 4KB) Master Boot Record Params - 0x00074000..0x0007DFFF ( 40KB) Serial + OTA Bootloader - - 0x00073000..0x00073FFF ( 4KB ) Private Config Data (Bonding, Keys, etc.) - 0x00072000..0x00072FFF ( 4KB ) User NVM data - 0x00059000..0x00071FFF (100KB) User Filesystem - - 0x0001C000..0x00058FFF (244KB) Application Code - 0x00001000..0x0001BFFF (108KB) SoftDevice - 0x00000000..0x00000FFF (4KB) Master Boot Record -*/ - -/* Specify the memory areas (S132 2.0.1) */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */ - FLASH_ISR (rx) : ORIGIN = 0x0001c000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x0001d000, LENGTH = 0x03C000 /* APP - ISR, 240 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x00059000, LENGTH = 0x019000 /* File system 100KB KB */ - RAM (xrw) : ORIGIN = 0x20003000, LENGTH = 0x0D000 /* 52 KiB, give 8KiB headroom for softdevice */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0 /*16K Circuit Python use static variable for HEAP */; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20007000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_5.0.0.ld b/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_5.0.0.ld deleted file mode 100644 index f9209bf3d1884..0000000000000 --- a/ports/nrf/boards/feather52/custom_nrf52832_dfu_app_5.0.0.ld +++ /dev/null @@ -1,44 +0,0 @@ -/* - GNU linker script for NRF52 w/ s132 5.0.0 SoftDevice - - MEMORY MAP - ------------------------------------------------------------------------ - START ADDR END ADDR SIZE DESCRIPTION - ---------- ---------- ------- ----------------------------------------- - 0x0007F000..0x0007FFFF ( 4KB) Bootloader Settings - 0x0007E000..0x0007EFFF ( 4KB) Master Boot Record Params - 0x00074000..0x0007DFFF ( 40KB) Serial + OTA Bootloader - - 0x00073000..0x00073FFF ( 4KB ) Private Config Data (Bonding, Keys, etc.) - 0x00072000..0x00072FFF ( 4KB ) User NVM data - 0x00059000..0x00071FFF ( 100KB) User Filesystem - - 0x00023000..0x00058FFF (216KB) Application Code - 0x00001000..0x00022FFF (136KB) SoftDevice - 0x00000000..0x00000FFF (4KB) Master Boot Record -*/ - -/* Specify the memory areas (S132 5.0.0) */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */ - FLASH_ISR (rx) : ORIGIN = 0x00023000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x00024000, LENGTH = 0x036000 /* APP - ISR, 216 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x00059000, LENGTH = 0x019000 /* File system 100KB KB */ - RAM (xrw) : ORIGIN = 0x200039c0, LENGTH = 0x0c640 /* 49.5 KiB, give 8KiB headroom for softdevice */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0 /*16K Circuit Python use static variable for HEAP */; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20007000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/feather52/examples/ble_scan.py b/ports/nrf/boards/feather52/examples/ble_scan.py deleted file mode 100644 index 9cacbe6f42872..0000000000000 --- a/ports/nrf/boards/feather52/examples/ble_scan.py +++ /dev/null @@ -1,26 +0,0 @@ -from ubluepy import Scanner, constants - -def display_scan_results(scan_entries): - for e in scan_entries: - print("ADDR: ", e.addr()) - print("TYPE: ", e.addr_type()) - print("RSSI: ", e.rssi()) - - # Parse the contents of the advertising packet - scan = e.getScanData() - if scan: - for s in scan: - # Convert byte array to hex format string - hex = ' '.join('0x%02X' % b for b in s[2]) - # Display enum value and hex string together - print('\t{}: {}'.format(s[1], hex)) - - # Line break between record sets - print("") - -# Scan 1s for advertising devices in range -s = Scanner() -scan_res = s.scan(1000) - -# Display the scan results -display_scan_results(scan_res) diff --git a/ports/nrf/boards/feather52/examples/blinky.py b/ports/nrf/boards/feather52/examples/blinky.py deleted file mode 100644 index 29cca26d04038..0000000000000 --- a/ports/nrf/boards/feather52/examples/blinky.py +++ /dev/null @@ -1,12 +0,0 @@ -import board -import digitalio -import time - -led = digitalio.DigitalInOut(board.LED2) -led.direction = digitalio.Direction.OUTPUT - -while True: - led.value = True - time.sleep(0.5) - led.value = False - time.sleep(0.5) diff --git a/ports/nrf/boards/feather52/examples/i2c_scan.py b/ports/nrf/boards/feather52/examples/i2c_scan.py deleted file mode 100644 index 8e3ef557d136b..0000000000000 --- a/ports/nrf/boards/feather52/examples/i2c_scan.py +++ /dev/null @@ -1,20 +0,0 @@ -import board -import busio - -i2c = busio.I2C(board.SCL, board.SDA) -count = 0 - -# Wait for I2C lock -while not i2c.try_lock(): - pass - -# Scan for devices on the I2C bus -print("Scanning I2C bus") -for x in i2c.scan(): - print(hex(x)) - count += 1 - -print("%d device(s) found on I2C bus" % count) - -# Release the I2C bus -i2c.unlock() diff --git a/ports/nrf/boards/feather52/examples/pulseio.py b/ports/nrf/boards/feather52/examples/pulseio.py deleted file mode 100644 index cdbe16addd065..0000000000000 --- a/ports/nrf/boards/feather52/examples/pulseio.py +++ /dev/null @@ -1,25 +0,0 @@ -import time -from board import * -from pulseio import * - -# Setup BLUE and RED LEDs as PWM output (default frequency is 500 Hz) -ledb = PWMOut(LED2) -ledr = PWMOut(LED1) - -# Set the BLUE LED to have a duty cycle of 5000 (out of 65535, so ~7.5%) -ledb.duty_cycle = 5000 - -# Setup pin A0 as a standard PWM out @ 50% to test on the oscilloscope. -# You should see a 50% duty cycle waveform at ~500Hz on the scope when you -# connect a probe to pin A0 -a0 = PWMOut(A0) -a0.duty_cycle = int(65535/2) - -# Constantly pulse the RED LED -while True: - for i in range(100): - ledr.duty_cycle = int(i / 100 * 65535) - time.sleep(0.01) - for i in range(100, -1, -1): - ledr.duty_cycle = int(i / 100 * 65535) - time.sleep(0.01) diff --git a/ports/nrf/boards/feather52/mpconfigboard.h b/ports/nrf/boards/feather52/mpconfigboard.h deleted file mode 100644 index 176e614996ea0..0000000000000 --- a/ports/nrf/boards/feather52/mpconfigboard.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#define MICROPY_HW_BOARD_NAME "Bluefruit nRF52 Feather" -#define MICROPY_HW_MCU_NAME "NRF52832" -#define MICROPY_PY_SYS_PLATFORM "nrf52" - -#define MICROPY_PY_MACHINE_HW_PWM (1) -#define MICROPY_PY_MACHINE_HW_SPI (1) -#define MICROPY_PY_MACHINE_TIMER (1) -#define MICROPY_PY_MACHINE_RTC (0) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_ADC (1) -#define MICROPY_PY_MACHINE_TEMP (1) - -#define MICROPY_HW_HAS_LED (1) -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -#define MICROPY_HW_LED_COUNT (2) -#define MICROPY_HW_LED_PULLUP (0) - -#define MICROPY_HW_LED1 (17) // LED1 -#define MICROPY_HW_LED2 (19) // LED2 - -// UART config -#define MICROPY_HW_UART1_RX (pin_P0_08) -#define MICROPY_HW_UART1_TX (pin_P0_06) -#define MICROPY_HW_UART1_HWFC (0) - -// SPI0 config -#define MICROPY_HW_SPI0_NAME "SPI0" -#define MICROPY_HW_SPI0_SCK (pin_P0_12) // (Arduino D13) -#define MICROPY_HW_SPI0_MOSI (pin_P0_13) // (Arduino D11) -#define MICROPY_HW_SPI0_MISO (pin_P0_14) // (Arduino D12) - -#define MICROPY_HW_PWM0_NAME "PWM0" -#define MICROPY_HW_PWM1_NAME "PWM1" -#define MICROPY_HW_PWM2_NAME "PWM2" - -#define HELP_TEXT_BOARD_LED "1,2" - - - -#define PORT_HEAP_SIZE (32*1024) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/feather52/mpconfigboard.mk b/ports/nrf/boards/feather52/mpconfigboard.mk deleted file mode 100644 index b6a4f795b07bd..0000000000000 --- a/ports/nrf/boards/feather52/mpconfigboard.mk +++ /dev/null @@ -1,36 +0,0 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52832 -SOFTDEV_VERSION ?= 2.0.1 - -LD_FILE = boards/feather52/custom_nrf52832_dfu_app_$(SOFTDEV_VERSION).ld -BOOTLOADER_PKG = boards/feather52/bootloader/feather52_bootloader_$(SOFTDEV_VERSION)_s132_single.zip - -NRF_DEFINES += -DNRF52832_XXAA - -ifeq ($(SD), ) -INC += -Idrivers/bluetooth/s132_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s132_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include -INC += -Idrivers/bluetooth/s132_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s132_$(MCU_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT) -endif - -CFLAGS += -DADAFRUIT_FEATHER52 - -check_defined = \ - $(strip $(foreach 1,$1, \ - $(call __check_defined,$1,$(strip $(value 2))))) -__check_defined = \ - $(if $(value $1),, \ - $(error Undefined make flag: $1$(if $2, ($2)))) - -.PHONY: dfu-gen dfu-flash boot-flash - -dfu-gen: - nrfutil dfu genpkg --dev-type 0x0052 --application $(BUILD)/$(OUTPUT_FILENAME).hex $(BUILD)/dfu-package.zip - -dfu-flash: - @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0) - nrfutil dfu serial --package $(BUILD)/dfu-package.zip -p $(SERIAL) -b 115200 - -boot-flash: - @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0) - nrfutil dfu serial --package $(BOOTLOADER_PKG) -p $(SERIAL) -b 115200 diff --git a/ports/nrf/boards/feather52/mpconfigboard_s132.mk b/ports/nrf/boards/feather52/mpconfigboard_s132.mk deleted file mode 100644 index 315758de34c3b..0000000000000 --- a/ports/nrf/boards/feather52/mpconfigboard_s132.mk +++ /dev/null @@ -1,4 +0,0 @@ -# This file is a placeholder to enable building with 'SD=s132' flag -# The actual config data is stored in the file referenced below, regardless -# of whether S132 is actively used or not. -include boards/$(BOARD)/mpconfigboard.mk diff --git a/ports/nrf/boards/feather52/nrf52_hal_conf.h b/ports/nrf/boards/feather52/nrf52_hal_conf.h deleted file mode 100644 index fd6073a187b71..0000000000000 --- a/ports/nrf/boards/feather52/nrf52_hal_conf.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef NRF52_HAL_CONF_H__ -#define NRF52_HAL_CONF_H__ - -#define HAL_UART_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIME_MODULE_ENABLED -#define HAL_PWM_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_TIMER_MODULE_ENABLED -#define HAL_TWI_MODULE_ENABLED -#define HAL_ADCE_MODULE_ENABLED -#define HAL_TEMP_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -// #define HAL_UARTE_MODULE_ENABLED -// #define HAL_SPIE_MODULE_ENABLED -// #define HAL_TWIE_MODULE_ENABLED - -#endif // NRF52_HAL_CONF_H__ diff --git a/ports/nrf/boards/feather52/pins.csv b/ports/nrf/boards/feather52/pins.csv deleted file mode 100644 index 3ffab88d429eb..0000000000000 --- a/ports/nrf/boards/feather52/pins.csv +++ /dev/null @@ -1,24 +0,0 @@ -A0,P0_02,ADC0_IN0 -A1,P0_03,ADC0_IN1 -A2,P0_04,ADC0_IN2 -A3,P0_05,ADC0_IN3 -TX,P0_06 -RX,P0_08 -NFC1,P0_09 -NFC2,P0_10 -D11,P0_11 -SCK,P0_12 -MOSI,P0_13 -MISO,P0_14 -D15,P0_15 -D16,P0_16 -LED1,P0_17 -LED2,P0_19 -DFU,P0_20 -SDA,P0_25 -SCL,P0_26 -D27,P0_27 -A4,P0_28,ADC0_IN4 -A5,P0_29,ADC0_IN5 -A6,P0_30,ADC0_IN6 -A7,P0_31,ADC0_IN7 diff --git a/ports/nrf/boards/feather52840/README.md b/ports/nrf/boards/feather52840/README.md deleted file mode 100644 index 5861b43c579fd..0000000000000 --- a/ports/nrf/boards/feather52840/README.md +++ /dev/null @@ -1,201 +0,0 @@ -# Setup - -The `feather52840` board is currently based on the `PCA10056` development -board from Nordic Semiconductors, since commercial modules are not yet -available for the nRF52840. - -The difference between the `pca10056` and `feather52840` board support -packages is that no bootloader is present on the `pca10056` (a HW debugger -like a Segger J-Link is required to flash firmware images), whereas the -`feather52840` package uses a serial bootloader, with a slightly different -flash layout to account for the bootloader's presence. - -Both targets run on the same hardware and assume the same pinouts. - -The `feather52840` board support package will be updated at a later date -to reflect any pin changes in the final Feather form-factor HW. - -## Installing CircuitPython submodules - -Before you can build, you will need to run the following commands once, which -will install the submodules that are part of the CircuitPython ecosystem, and -build the `mpy-cross` tool: - -``` -$ cd circuitpython -$ git submodule update --init -$ make -C mpy-cross -``` - -You then need to download the SD and Nordic SDK files via: - -> This script relies on `wget`, which must be available from the command line. - -``` -$ cd ports/nrf -$ ./drivers/bluetooth/download_ble_stack.sh -``` - -## Installing the Serial Bootloader - -The Adafruit nRF52840 Feather uses a serial bootloader that allows you to -update the core CircuitPython firmware and internal file system contents -using only a serial connection. - -On empty devices, the serial bootloader will need to be flashed once using a -HW debugger such as a Segger J-Link before the serial updater (`nrfutil`) can -be used. - -### Install `nrfjprog` - -Before you can install the bootloader, you will first need to install the -`nrfjprog` tool from Nordic Semiconductors for your operating system. The -binary files can be downloaded via the following links: - -- [nRF5x toolset tar for Linux 32-bit v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Linux32/52619) -- [nRF5x toolset tar for Linux 64-bit v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Linux64/51388) -- [nRF5x toolset tar for OSX v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-OSX/53406) -- [nRF5x toolset installer for Windows v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Win32/48768) - -You will then need to add the `nrfjprog` folder to your system `PATH` variable -so that it is available from the command line. The exact process for this is -OS specific, but on a POSIX type system like OS X or Linux, you can -temporarily add the location to your `PATH` environment variables as follows: - -``` -$ export PATH=$PATH:YOURPATHHERE/nRF5x-Command-Line-Tools_9_7_2_OSX/nrfjprog/ -``` - -You can test this by running the following command: - -``` -$ nrfjprog --version -nrfjprog version: 9.7.2 -JLinkARM.dll version: 6.20f -``` - -### Flash the Bootloader with `nrfjprog` - -> This operation only needs to be done once, and only on boards that don't - already have the serial bootloader installed. - -Once `nrfjprog` is installed and available in `PATH` you can flash your -board with the serial bootloader via the following command: - -``` -make SD=s140 BOARD=feather52840 boot-flash -``` - -This should give you the following (or very similar) output, and you will see -a DFU blinky pattern on one of the board LEDs: - -``` -$ make SD=s140 BOARD=feather52840 boot-flash -Use make V=1, make V=2 or set BUILD_VERBOSE similarly in your environment to increase build verbosity. -nrfjprog --program boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.hex -f nrf52 --chiperase --reset -Parsing hex file. -Erasing user available code and UICR flash areas. -Applying system reset. -Checking that the area to write is not protected. -Programing device. -Applying system reset. -Run. -``` - -From this point onward, you can now use a simple serial port for firmware -updates. - -### IMPORTANT: Disable Mass Storage on PCA10056 J-Link - -The J-Link firmware on the PCA10056 implement USB Mass Storage, but this -causes a known conflict with reliable USB CDC serial port communication. In -order to use the serial bootloader, **you must disable MSD support on the -Segger J-Link**! - -To disable mass storage support, run the `JLinkExe` (or equivalent) command, -and send `MSDDisable`. (You can re-enable MSD support via `MSDEnable`): - -``` -$ JLinkExe -SEGGER J-Link Commander V6.20f (Compiled Oct 13 2017 17:20:01) -DLL version V6.20f, compiled Oct 13 2017 17:19:52 - -Connecting to J-Link via USB...O.K. -Firmware: J-Link OB-SAM3U128-V2-NordicSemi compiled Jul 24 2017 17:30:12 -Hardware version: V1.00 -S/N: 683947110 -VTref = 3.300V - - -Type "connect" to establish a target connection, '?' for help -J-Link>MSDDisable -Probe configured successfully. -J-Link>exit -``` - -## Building and Flashing CircuitPython - -### Installing `nrfutil` - -If you haven't installed the required command-line tool yet, go to the -`/libs/nrfutil` folder (where nrfutil 0.5.2b is installed as a sub-module) -and run the following commands: - -> If you get a 'sudo: pip: command not found' error running 'sudo pip install', -you can install pip via 'sudo easy_install pip' - -``` -$ cd ../../lib/nrfutil -$ sudo pip install -r requirements.txt -$ sudo python setup.py install -``` - -#### Changes to `nrfutil` in 0.5.2b - -**IMPORTANT**: Make sure that you have version **0.5.2b**, since a small -change was required to `dfu_transport_serial.py` to account for the -increased minimum flash erase time on the nRF52840 compared to the earlier -nRF52832! - -You can also manually change the file with the following new values (lines -67-68), and reinstall the utility via `sudo python setup.py install`: - -``` -FLASH_PAGE_ERASE_MAX_TIME = 0.1 # Worst time to erase a page 100 ms -FLASH_PAGE_ERASE_MIN_TIME = 0.09 # Best time to erase a page 90 ms -``` - -### Flashing CircuitPython - -With the serial bootloader present on your board, you first need to force your -board into DFU mode by holding down BUTTON1 and RESETTING the board (with -BUTTON1 still pressed as you come out of reset). - -This will give you a **fast blinky DFU pattern** to indicate you are in DFU -mode. - -At this point, you can build and flash a CircuitPython binary via the following -command: - -``` -$ make V=1 SD=s140 SERIAL=/dev/tty.usbmodem1411 BOARD=feather52840 dfu-gen dfu-flash -``` - -This should give you the following results: - -``` -$ make V=1 SD=s140 SERIAL=/dev/tty.usbmodem1411 BOARD=feather52840 dfu-gen dfu-flash -nrfutil dfu genpkg --sd-req 0xFFFE --dev-type 0x0052 --application build-feather52840-s140/firmware.hex build-feather52840-s140/dfu-package.zip -Zip created at build-feather52840-s140/dfu-package.zip -nrfutil --verbose dfu serial --package build-feather52840-s140/dfu-package.zip -p /dev/tty.usbmodem1411 -b 115200 -Upgrading target on /dev/tty.usbmodem1411 with DFU package /Users/kevintownsend/Dropbox/microBuilder/Code/CircuitPython/circuitpython-mb/ports/nrf/build-feather52840-s140/dfu-package.zip. Flow control is disabled. -Starting DFU upgrade of type 4, SoftDevice size: 0, bootloader size: 0, application size: 195252 -Sending DFU start packet -Sending DFU init packet -Sending firmware file -################################################################################################################################################################################################################################################################################################################################################################################################ -Activating new firmware - -DFU upgrade took 41.6610329151s -Device programmed. -``` diff --git a/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld b/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld deleted file mode 100644 index b5f36062499cf..0000000000000 --- a/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld +++ /dev/null @@ -1,47 +0,0 @@ -/* - GNU linker script for NRF52840 w/S140 6.0.0 SoftDevice - - MEMORY MAP - ------------------------------------------------------------------------ - START ADDR END ADDR SIZE DESCRIPTION - ---------- ---------- ------- ----------------------------------------- - 0x000FF000..0x000FFFFF ( 4KB) Bootloader Settings - 0x000FE000..0x000FEFFF ( 4KB) Master Boot Record Params - 0x000F4000..0x000FDFFF ( 40KB) Serial + OTA Bootloader - - 0x000F3000..0x000F3FFF ( 4KB ) Private Config Data (Bonding, Keys, etc.) - 0x000F2000..0x000F2FFF ( 4KB ) User NVM data - 0x000B2000..0x000F1FFF (256KB) User Filesystem - - 0x00025000..0x000B1FFF (564KB) Application Code (including ISR vector) - 0x00001000..0x00024FFF (144KB) SoftDevice - 0x00000000..0x00000FFF (4KB) Master Boot Record -*/ - -/* Specify the memory areas (S140 6.0.0) */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 - - FLASH_ISR (rx) : ORIGIN = 0x00025000, LENGTH = 0x001000 - FLASH_TEXT (rx) : ORIGIN = 0x00026000, LENGTH = 0x08C000 - FLASH_FATFS (r) : ORIGIN = 0x000B2000, LENGTH = 0x040000 - - /* 0x2000000 - RAM:ORIGIN is reserved for Softdevice */ - RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x20040000 - 0x20004000 -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20007000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/feather52840/board.c b/ports/nrf/boards/feather52840/board.c deleted file mode 100644 index 5ad81c21d7b53..0000000000000 --- a/ports/nrf/boards/feather52840/board.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "nrf.h" - -#include "boards/board.h" - -void board_init(void) { - -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.hex b/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.hex deleted file mode 100644 index b2d2521e85372..0000000000000 --- a/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.hex +++ /dev/null @@ -1,10484 +0,0 @@ -:020000040000FA -:10000000000400200108000095040000E107000042 -:100010009F040000A9040000B304000000000000D9 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-:1094E000000000000000000000000000000000007C -:1094F000000000000000000000000000000000006C -:10950000000000000000000000D00E00FFFF00007F -:1095100032000000816A0F00F16A0F000020004055 -:10952000000000000090D00325420F0001420F0010 -:020000041000EA -:0810140000400F0000E00F0096 -:00000001FF diff --git a/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.zip b/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.zip deleted file mode 100644 index 1dc00cf0ffc99..0000000000000 Binary files a/ports/nrf/boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single.zip and /dev/null differ diff --git a/ports/nrf/boards/feather52840/mpconfigboard.h b/ports/nrf/boards/feather52840/mpconfigboard.h deleted file mode 100644 index b99d9303d71b3..0000000000000 --- a/ports/nrf/boards/feather52840/mpconfigboard.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#define FEATHER52840 - -#define MICROPY_HW_BOARD_NAME "Feather52840" -#define MICROPY_HW_MCU_NAME "NRF52840" -#define MICROPY_PY_SYS_PLATFORM "nrf52840-PDK" - -#define MICROPY_PY_MACHINE_HW_PWM (1) -#define MICROPY_PY_MACHINE_HW_SPI (1) -#define MICROPY_PY_MACHINE_TIMER (1) -#define MICROPY_PY_MACHINE_RTC (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_ADC (1) -#define MICROPY_PY_MACHINE_TEMP (1) - -#define MICROPY_HW_HAS_LED (1) -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -#define MICROPY_HW_LED_COUNT (4) -#define MICROPY_HW_LED_PULLUP (1) - -#define MICROPY_HW_LED1 (13) // LED1 -#define MICROPY_HW_LED2 (14) // LED2 -#define MICROPY_HW_LED3 (15) // LED3 -#define MICROPY_HW_LED4 (16) // LED4 - -// UART config -#define MICROPY_HW_UART1_RX (pin_P0_08) -#define MICROPY_HW_UART1_TX (pin_P0_06) -#define MICROPY_HW_UART1_CTS (pin_P0_07) -#define MICROPY_HW_UART1_RTS (pin_P0_05) -#define MICROPY_HW_UART1_HWFC (1) - -// SPI0 config -#define MICROPY_HW_SPI0_NAME "SPI0" - -#define MICROPY_HW_SPI0_SCK (pin_P1_15) -#define MICROPY_HW_SPI0_MOSI (pin_P1_13) -#define MICROPY_HW_SPI0_MISO (pin_P1_14) - -#define MICROPY_HW_PWM0_NAME "PWM0" -#define MICROPY_HW_PWM1_NAME "PWM1" -#define MICROPY_HW_PWM2_NAME "PWM2" -#if 0 -#define MICROPY_HW_PWM3_NAME "PWM3" -#endif - -#define HELP_TEXT_BOARD_LED "1,2,3,4" - -#define PORT_HEAP_SIZE (128*1024) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/feather52840/mpconfigboard.mk b/ports/nrf/boards/feather52840/mpconfigboard.mk deleted file mode 100644 index a961ee22c5c18..0000000000000 --- a/ports/nrf/boards/feather52840/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -# This file is a placeholder to enable building with 'SD=s140' flag -# The actual config data is stored in the file referenced below, regardless -# of whether S140 is actively used or not. -include boards/$(BOARD)/mpconfigboard.mk diff --git a/ports/nrf/boards/feather52840/mpconfigboard_s140.mk b/ports/nrf/boards/feather52840/mpconfigboard_s140.mk deleted file mode 100644 index 4fb79e13e4991..0000000000000 --- a/ports/nrf/boards/feather52840/mpconfigboard_s140.mk +++ /dev/null @@ -1,35 +0,0 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52840 -SOFTDEV_VERSION ?= 6.0.0-6.alpha - -LD_FILE = boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld -BOOTLOADER_FILENAME = boards/feather52840/bootloader/feather52840_bootloader_6.0.0_s140_single - -NRF_DEFINES += -DNRF52840_XXAA - -CFLAGS += -DADAFRUIT_FEATHER52840 - -ifeq ($(SD), ) -INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include -INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT) -endif - -check_defined = \ - $(strip $(foreach 1,$1, \ - $(call __check_defined,$1,$(strip $(value 2))))) -__check_defined = \ - $(if $(value $1),, \ - $(error Undefined make flag: $1$(if $2, ($2)))) - -.PHONY: dfu-gen dfu-flash boot-flash - -dfu-gen: - nrfutil dfu genpkg --sd-req 0xFFFE --dev-type 0x0052 --application $(BUILD)/$(OUTPUT_FILENAME).hex $(BUILD)/dfu-package.zip - -dfu-flash: - @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyUSB0) - nrfutil --verbose dfu serial --package $(BUILD)/dfu-package.zip -p $(SERIAL) -b 115200 - -boot-flash: - nrfjprog --program $(BOOTLOADER_FILENAME).hex -f nrf52 --chiperase --reset diff --git a/ports/nrf/boards/feather52840/nrf52_hal_conf.h b/ports/nrf/boards/feather52840/nrf52_hal_conf.h deleted file mode 100644 index fd6073a187b71..0000000000000 --- a/ports/nrf/boards/feather52840/nrf52_hal_conf.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef NRF52_HAL_CONF_H__ -#define NRF52_HAL_CONF_H__ - -#define HAL_UART_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIME_MODULE_ENABLED -#define HAL_PWM_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_TIMER_MODULE_ENABLED -#define HAL_TWI_MODULE_ENABLED -#define HAL_ADCE_MODULE_ENABLED -#define HAL_TEMP_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -// #define HAL_UARTE_MODULE_ENABLED -// #define HAL_SPIE_MODULE_ENABLED -// #define HAL_TWIE_MODULE_ENABLED - -#endif // NRF52_HAL_CONF_H__ diff --git a/ports/nrf/boards/feather52840/pins.csv b/ports/nrf/boards/feather52840/pins.csv deleted file mode 100644 index 5611dc34bdd52..0000000000000 --- a/ports/nrf/boards/feather52840/pins.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00,P0_00 -P0_01,P0_01 -P0_02,P0_02,ADC0_IN0 -P0_03,P0_03,ADC0_IN1 -P0_04,P0_04,ADC0_IN2 -P0_05,P0_05,ADC0_IN3 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28,ADC0_IN4 -P0_29,P0_29,ADC0_IN5 -P0_30,P0_30,ADC0_IN6 -P0_31,P0_31,ADC0_IN7 -P1_00,P1_00 -P1_01,P1_01 -P1_02,P1_02 -P1_03,P1_03 -P1_04,P1_04 -P1_05,P1_05 -P1_06,P1_06 -P1_07,P1_07 -P1_08,P1_08 -P1_09,P1_09 -P1_10,P1_10 -P1_11,P1_11 -P1_12,P1_12 -P1_13,P1_13 -P1_14,P1_14 -P1_15,P1_15 diff --git a/ports/nrf/boards/feather_bluefruit_sense/board.c b/ports/nrf/boards/feather_bluefruit_sense/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h new file mode 100644 index 0000000000000..65d8a642e8c1c --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h @@ -0,0 +1,70 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit Feather Bluefruit Sense" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_16) + +#define MICROPY_HW_LED_STATUS (&pin_P1_09) + +// Board does not have a 32kHz crystal. It does have a 32MHz crystal. +#define BOARD_HAS_32KHZ_XTAL (0) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE (4096) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_12) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_14) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_15) + +#define DEFAULT_UART_BUS_RX (&pin_P0_24) +#define DEFAULT_UART_BUS_TX (&pin_P0_25) diff --git a/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk new file mode 100644 index 0000000000000..5813e6136be6e --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x8088 +USB_PRODUCT = "Feather Bluefruit Sense" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/feather_bluefruit_sense/pins.c b/ports/nrf/boards/feather_bluefruit_sense/pins.c new file mode 100644 index 0000000000000..c4863e17fb6e5 --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/pins.c @@ -0,0 +1,60 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_00) }, + + { MP_ROM_QSTR(MP_QSTR_PROXIMITY_LIGHT_INTERRUPT), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_GYRO_INTERRUPT), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/feather_nrf52840_express/README.md b/ports/nrf/boards/feather_nrf52840_express/README.md new file mode 100644 index 0000000000000..8d515010f9c3b --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/README.md @@ -0,0 +1,201 @@ +# Setup + +The `feather52840` board is currently based on the `PCA10056` development +board from Nordic Semiconductors, since commercial modules are not yet +available for the nRF52840. + +The difference between the `pca10056` and `feather52840` board support +packages is that no bootloader is present on the `pca10056` (a HW debugger +like a Segger J-Link is required to flash firmware images), whereas the +`feather52840` package uses a serial bootloader, with a slightly different +flash layout to account for the bootloader's presence. + +Both targets run on the same hardware and assume the same pinouts. + +The `feather52840` board support package will be updated at a later date +to reflect any pin changes in the final Feather form-factor HW. + +## Installing CircuitPython submodules + +Before you can build, you will need to run the following commands once, which +will install the submodules that are part of the CircuitPython ecosystem, and +build the `mpy-cross` tool: + +``` +$ cd circuitpython +$ git submodule update --init +$ make -C mpy-cross +``` + +You then need to download the SD and Nordic SDK files via: + +> This script relies on `wget`, which must be available from the command line. + +``` +$ cd ports/nrf +$ ./bluetooth/download_ble_stack.sh +``` + +## Installing the Serial Bootloader + +The Adafruit nRF52840 Feather uses a serial bootloader that allows you to +update the core CircuitPython firmware and internal file system contents +using only a serial connection. + +On empty devices, the serial bootloader will need to be flashed once using a +HW debugger such as a Segger J-Link before the serial updater (`adafruit-nrfutil`) can +be used. + +### Install `nrfjprog` + +Before you can install the bootloader, you will first need to install the +`nrfjprog` tool from Nordic Semiconductors for your operating system. The +binary files can be downloaded via the following links: + +- [nRF5x toolset tar for Linux 32-bit v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Linux32/52619) +- [nRF5x toolset tar for Linux 64-bit v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Linux64/51388) +- [nRF5x toolset tar for OSX v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-OSX/53406) +- [nRF5x toolset installer for Windows v9.7.2](http://www.nordicsemi.com/eng/nordic/Products/nRF52832/nRF5x-Command-Line-Tools-Win32/48768) + +You will then need to add the `nrfjprog` folder to your system `PATH` variable +so that it is available from the command line. The exact process for this is +OS specific, but on a POSIX type system like OS X or Linux, you can +temporarily add the location to your `PATH` environment variables as follows: + +``` +$ export PATH=$PATH:YOURPATHHERE/nRF5x-Command-Line-Tools_9_7_2_OSX/nrfjprog/ +``` + +You can test this by running the following command: + +``` +$ nrfjprog --version +nrfjprog version: 9.7.2 +JLinkARM.dll version: 6.20f +``` + +### Flash the USB CDC Bootloader with 'nrfjprog' + +> This operation only needs to be done once, and only on boards that don't + already have the serial bootloader installed. + +Firstly clone the [Adafruit_nRF52_Bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader.git) and enter its directory + +``` +$ git clone https://github.com/adafruit/Adafruit_nRF52_Bootloader.git +$ cd Adafruit_nRF52_Bootloader +``` + +Once `nrfjprog` is installed and available in `PATH` you can flash your +board with the serial bootloader via the following command: + +``` +make BOARD=feather_nrf52840_express VERSION=latest flash +``` + +This should give you the following (or very similar) output, and you will see +a DFU blinky pattern on one of the board LEDs: + +``` +$ make BOARD=pca10056 VERSION=latest flash +Flashing: bin/pca10056/6.0.0r0/pca10056_bootloader_s140_6.0.0r0.hex +nrfjprog --program bin/pca10056/6.0.0r0/pca10056_bootloader_s140_6.0.0r0.hex --chiperase -f nrf52 --reset +Parsing hex file. +Erasing user available code and UICR flash areas. +Applying system reset. +Checking that the area to write is not protected. +Programing device. +Applying system reset. +Run. +``` + +From this point onward, you can now use a simple serial port for firmware +updates. + +Note: You can specify other version that are available in the directory `Adafruit_nRF52_Bootloader/bin/feather_nrf52840_express/` . The `VERSION=latest` will use the latest bootloader available. + +### IMPORTANT: Disable Mass Storage on PCA10056 J-Link + +The J-Link firmware on the PCA10056 implement USB Mass Storage, but this +causes a known conflict with reliable USB CDC serial port communication. In +order to use the serial bootloader, **you must disable MSD support on the +Segger J-Link**! + +To disable mass storage support, run the `JLinkExe` (or equivalent) command, +and send `MSDDisable`. (You can re-enable MSD support via `MSDEnable`): + +``` +$ JLinkExe +SEGGER J-Link Commander V6.20f (Compiled Oct 13 2017 17:20:01) +DLL version V6.20f, compiled Oct 13 2017 17:19:52 + +Connecting to J-Link via USB...O.K. +Firmware: J-Link OB-SAM3U128-V2-NordicSemi compiled Jul 24 2017 17:30:12 +Hardware version: V1.00 +S/N: 683947110 +VTref = 3.300V + + +Type "connect" to establish a target connection, '?' for help +J-Link>MSDDisable +Probe configured successfully. +J-Link>exit +``` + +## Building and Flashing CircuitPython + +### Installing `adafruit-nrfutil` + +run follow command to install [adafruit-nrfutil](https://github.com/adafruit/Adafruit_nRF52_nrfutil) from PyPi + +``` +$ pip3 install adafruit-nrfutil --user +``` + +### Flashing CircuitPython with USB CDC + +With the serial bootloader present on your board, you first need to force your +board into DFU mode by holding down BUTTON1 and RESETTING the board (with +BUTTON1 still pressed as you come out of reset). + +This will give you a **fast blinky DFU pattern** to indicate you are in DFU +mode. + +You can **build and flash** a CircuitPython binary via the following command: + +``` +$ make V=1 SD=s140 SERIAL=/dev/tty.usbmodem1411 BOARD=feather52840 all dfu-gen dfu-flash +``` + +This should give you the following results: + +``` +$make V=1 BOARD=feather52840 SD=s140 SERIAL=/dev/tty.usbmodem1411 dfu-gen dfu-flash +nrfutil dfu genpkg --sd-req 0xFFFE --dev-type 0x0052 --application build-feather52840-s140/firmware.hex build-feather52840-s140/dfu-package.zip +Zip created at build-feather52840-s140/dfu-package.zip +nrfutil --verbose dfu serial --package build-feather52840-s140/dfu-package.zip -p /dev/ttyACM1 -b 115200 --singlebank +Upgrading target on /dev/ttyACM1 with DFU package /home/hathach/Dropbox/adafruit/circuitpython/ada_cp/ports/nrf/build-feather52840-s140/dfu-package.zip. Flow control is disabled, Single bank mode +Starting DFU upgrade of type 4, SoftDevice size: 0, bootloader size: 0, application size: 199840 +Sending DFU start packet +Sending DFU init packet +Sending firmware file +######################################################################################################################################################################################################################################################################################################################################################################################################### +Activating new firmware + +DFU upgrade took 8.50606513023s +Device programmed. +``` + +### Flashing CircuitPython with MSC UF2 + +uf2 file is generated last by `all` target + +``` +$ make V=1 SD=s140 SERIAL=/dev/tty.usbmodem1411 BOARD=feather52840 all +Create firmware.uf2 +../../tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "build-feather52840-s140/firmware.uf2" "build-feather52840-s140/firmware.hex" +Converting to uf2, output size: 392192, start address: 0x26000 +Wrote 392192 bytes to build-feather52840-s140/firmware.uf2. +``` + +Simply drag and drop firmware.uf2 to the MSC, the nrf52840 will blink fast and reset after done. diff --git a/ports/nrf/boards/feather_nrf52840_express/board.c b/ports/nrf/boards/feather_nrf52840_express/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h new file mode 100644 index 0000000000000..64988e1a28754 --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit Feather nRF52840 Express" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_16) + +#define MICROPY_HW_LED_STATUS (&pin_P1_15) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_12) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_14) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_15) + +#define DEFAULT_UART_BUS_RX (&pin_P0_24) +#define DEFAULT_UART_BUS_TX (&pin_P0_25) diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk new file mode 100644 index 0000000000000..84861a1f0bf03 --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x802A +USB_PRODUCT = "Feather nRF52840 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/feather_nrf52840_express/pins.c b/ports/nrf/boards/feather_nrf52840_express/pins.c new file mode 100644 index 0000000000000..ec2689ab45707 --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/pins.c @@ -0,0 +1,53 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/board.c b/ports/nrf/boards/itsybitsy_nrf52840_express/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h new file mode 100644 index 0000000000000..629463e4e2bcb --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h @@ -0,0 +1,43 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy nRF52840 Express" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_06) + +#define MICROPY_HW_APA102_MOSI (&pin_P0_08) +#define MICROPY_HW_APA102_SCK (&pin_P1_09) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 00) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 23) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_21 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_23 +#endif + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE (4096) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_14) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_16) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_13) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_15) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_20) + +#define DEFAULT_UART_BUS_RX (&pin_P0_25) +#define DEFAULT_UART_BUS_TX (&pin_P0_24) diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk new file mode 100644 index 0000000000000..d5587f4b94a35 --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x239A +USB_PID = 0x8052 +USB_PRODUCT = "ItsyBitsy nRF52840 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +# Don't use up a hardware SPI peripheral for the status DotStar: we only have one or two. +CIRCUITPY_BITBANG_APA102 = 1 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c b/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c new file mode 100644 index 0000000000000..364fbfd47006d --- /dev/null +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/pins.c @@ -0,0 +1,46 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_20) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/make-pins.py b/ports/nrf/boards/make-pins.py deleted file mode 100644 index 5fe6005071672..0000000000000 --- a/ports/nrf/boards/make-pins.py +++ /dev/null @@ -1,238 +0,0 @@ -#!/usr/bin/env python -"""Creates the pin file for the nRF5.""" - -from __future__ import print_function - -import argparse -import sys -import csv - - -def parse_port_pin(name_str): - """Parses a string and returns a (port-num, pin-num) tuple.""" - if len(name_str) < 4: - raise ValueError("Expecting pin name to be at least 5 charcters.") - if name_str[0] != 'P': - raise ValueError("Expecting pin name to start with P") - if name_str[1] not in ('0', '1'): - raise ValueError("Expecting pin port to be in 0 or 1") - port = ord(name_str[1]) - ord('0') - pin_str = name_str[3:] - if not pin_str.isdigit(): - raise ValueError("Expecting numeric pin number.") - return (port, int(pin_str)) - - -def split_name_num(name_num): - num = None - for num_idx in range(len(name_num) - 1, -1, -1): - if not name_num[num_idx].isdigit(): - name = name_num[0:num_idx + 1] - num_str = name_num[num_idx + 1:] - if len(num_str) > 0: - num = int(num_str) - break - return name, num - - -class Pin(object): - """Holds the information associated with a pin.""" - - def __init__(self, port, pin): - self.port = port - self.pin = pin - self.adc_channel = '0' - self.board_pin = False - - def cpu_pin_name(self): - return 'P{:d}_{:02d}'.format(self.port, self.pin) - - def is_board_pin(self): - return self.board_pin - - def set_is_board_pin(self): - self.board_pin = True - - def parse_adc(self, adc_str): - if (adc_str[:3] != 'ADC'): - return - (adc, channel) = adc_str.split('_IN') - self.adc_channel = 'SAADC_CH_PSELP_PSELP_AnalogInput%d' % int(channel) - - def print(self): - print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:d}, {:s});'.format( - self.cpu_pin_name(), self.cpu_pin_name(), - self.port, self.pin, self.adc_channel)) - - def print_header(self, hdr_file): - hdr_file.write('extern const pin_obj_t pin_{:s};\n'. - format(self.cpu_pin_name())) - - -class NamedPin(object): - - def __init__(self, name, pin): - self._name = name - self._pin = pin - - def pin(self): - return self._pin - - def name(self): - return self._name - - -class Pins(object): - - def __init__(self): - self.cpu_pins = [] # list of NamedPin objects - self.board_pins = [] # list of NamedPin objects - - def find_pin(self, port_num, pin_num): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.port == port_num and pin.pin == pin_num: - return pin - - def parse_af_file(self, filename, pinname_col, af_col, af_col_end): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[pinname_col]) - except: - continue - pin = Pin(port_num, pin_num) - for af_idx in range(af_col, len(row)): - if af_idx < af_col_end: - pin.parse_af(af_idx - af_col, row[af_idx]) - elif af_idx == af_col_end: - pin.parse_adc(row[af_idx]) - self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin)) - - def parse_board_file(self, filename): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[1]) - except: - continue - pin = self.find_pin(port_num, pin_num) - if pin: - pin.set_is_board_pin() - if len(row) == 3: - pin.parse_adc(row[2]) - self.board_pins.append(NamedPin(row[0], pin)) - - def print_named(self, label, named_pins): - print('') - print('STATIC const mp_rom_map_elem_t {:s}_table[] = {{'.format(label)) - for named_pin in named_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(), pin.cpu_pin_name())) - print('};') - print('MP_DEFINE_CONST_DICT({:s}, {:s}_table);'.format(label, label)) - - def print(self): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print() - self.print_named('mcu_pin_globals', self.cpu_pins) - self.print_named('board_module_globals', self.board_pins) - - def print_header(self, hdr_filename): - with open(hdr_filename, 'wt') as hdr_file: - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print_header(hdr_file) - - def print_qstr(self, qstr_filename): - with open(qstr_filename, 'wt') as qstr_file: - qstr_set = set([]) - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - qstr_set |= set([named_pin.name()]) - for named_pin in self.board_pins: - qstr_set |= set([named_pin.name()]) - for qstr in sorted(qstr_set): - print('Q({})'.format(qstr), file=qstr_file) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file" - ) - parser.add_argument( - "-a", "--af", - dest="af_filename", - help="Specifies the alternate function file for the chip", - default="nrf.csv" - ) - parser.add_argument( - "--af-const", - dest="af_const_filename", - help="Specifies header file for alternate function constants.", - default="build/pins_af_const.h" - ) - parser.add_argument( - "--af-py", - dest="af_py_filename", - help="Specifies the filename for the python alternate function mappings.", - default="build/pins_af.py" - ) - parser.add_argument( - "-b", "--board", - dest="board_filename", - help="Specifies the board file", - ) - parser.add_argument( - "-p", "--prefix", - dest="prefix_filename", - help="Specifies beginning portion of generated pins file", - default="nrf52_prefix.c" - ) - parser.add_argument( - "-q", "--qstr", - dest="qstr_filename", - help="Specifies name of generated qstr header file", - default="build/pins_qstr.h" - ) - parser.add_argument( - "-r", "--hdr", - dest="hdr_filename", - help="Specifies name of generated pin header file", - default="build/pins.h" - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - print('// This file was automatically generated by make-pins.py') - print('//') - if args.af_filename: - print('// --af {:s}'.format(args.af_filename)) - pins.parse_af_file(args.af_filename, 1, 2, 2) - - if args.board_filename: - print('// --board {:s}'.format(args.board_filename)) - pins.parse_board_file(args.board_filename) - - if args.prefix_filename: - print('// --prefix {:s}'.format(args.prefix_filename)) - print('') - with open(args.prefix_filename, 'r') as prefix_file: - print(prefix_file.read()) - pins.print() - pins.print_header(args.hdr_filename) - pins.print_qstr(args.qstr_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/README.md b/ports/nrf/boards/makerdiary_nrf52840_mdk/README.md new file mode 100644 index 0000000000000..f1ba8151ac719 --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/README.md @@ -0,0 +1,102 @@ +# MakerDiary NRF52840 MDK + +Refer to https://github.com/makerdiary/nrf52840-mdk or +https://wiki.makerdiary.com/nrf52840-mdk/ for more details about the device. + +Notably, CircuitPython does not currently support QSPI external flash on NRF +devices, so neither does this port - the 64Mb flash device is not used for +anything. Also, don't confuse this with the 64MiB drive that shows up on your +computer - it's actually part of the MSC driver provided by the DAPLink +debugger, and is inaccessible at all from Python land (this drive is where you +can copy `firmware.hex` if you'd prefer to flash that way as opposed to with +`pyocd`. You'll still have access to 256KB of the onboard flash, however, for +storing your Python files, cat pictures, or whatever. + +It's also interesting to note that all three LEDs and the "user button" on this +device are wired through sinks, not sources, so flip your boolean expectations +when dealing with `digitalio.DigitalInOut` on this device - `my_led.value = +True` turns the LED off! Likewise, the user button will read `False` when +pressed. + +## Installing CircuitPython submodules + +Before you can build, you will need to run the following commands once, which +will install the submodules that are part of the CircuitPython ecosystem, and +build the `mpy-cross` tool: + +``` +$ cd circuitpython +$ git submodule update --init +$ make -C mpy-cross +``` + +You then need to download the SD and Nordic SDK files via: + +> This script relies on `wget`, which must be available from the command line. + +``` +$ cd ports/nrf +$ ./drivers/bluetooth/download_ble_stack.sh +``` + +## Note about bootloaders + +While most Adafruit devices come with (or can easily be flashed with) an +Adafruit-provided bootloader (supporting niceties like UF2 flashing), this +board comes with DAPLink which (apparently?) handles everything from debugging +to programming the device, as well as the boot sequence. What's particularly +awesome about this board is that there is no physical interaction with the board +required to flash new code (read: CircuitPython builds) - the device is _always_ +listening for new firmware uploads (via `pyocd-flashtool`), even if userspace +code is running. + +## Building and Flashing CircuitPython + +You'll need to have [pyocd](https://github.com/mbedmicro/pyOCD) installed as +appropriate for your system. + +```sh +make BOARD=makerdiary_nrf52840_mdk FLASHER=pyocd SD=s140 flash +``` + +This should give you the following (or very similar) output, and you will see +a DFU blinky pattern on one of the board LEDs: + +``` +$ make BOARD=makerdiary_nrf52840_mdk FLASHER=pyocd SD=s140 flash +Use make V=1, make V=2 or set BUILD_VERBOSE similarly in your environment to increase build verbosity. +pyocd-flashtool -t nrf52 build-makerdiary_nrf52840_mdk-s140/firmware.hex --sector_erase +INFO:root:DAP SWD MODE initialised +INFO:root:ROM table #0 @ 0xe00ff000 cidr=b105100d pidr=2002c4008 +INFO:root:[0] +WARNING:root:Invalid coresight component, cidr=0x0 +INFO:root:[1] +INFO:root:[2] +WARNING:root:Invalid coresight component, cidr=0x1010101 +INFO:root:[3] +WARNING:root:Invalid coresight component, cidr=0x0 +INFO:root:[4] +INFO:root:[5] +INFO:root:CPU core is Cortex-M4 +INFO:root:FPU present +INFO:root:6 hardware breakpoints, 4 literal comparators +INFO:root:4 hardware watchpoints +[====================] 100% +INFO:root:Programmed 237568 bytes (58 pages) at 14.28 kB/s +#pyocd-tool -t nrf52 erase 0xFF000 +pyocd-tool -t nrf52 write32 0xFF000 0x00000001 +WARNING:root:Invalid coresight component, cidr=0x0 +WARNING:root:Invalid coresight component, cidr=0x1010101 +WARNING:root:Invalid coresight component, cidr=0x0 +pyocd-tool -t nrf52 reset +WARNING:root:Invalid coresight component, cidr=0x0 +WARNING:root:Invalid coresight component, cidr=0x1010101 +WARNING:root:Invalid coresight component, cidr=0x0 +Resetting target +``` + +Alternatively (and untested by me), it's apparently possible to copy +`firmware.hex` to the MSC device provided by DAPLink and flash that way. Refer +to [the upstream +documentation](https://wiki.makerdiary.com/nrf52840-mdk/getting-started/#drag-n-drop-programming) +for details. diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/board.c b/ports/nrf/boards/makerdiary_nrf52840_mdk/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h new file mode 100644 index 0000000000000..871cbe73d8ec7 --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MAKERDIARYNRF52840MDK + +#define MICROPY_HW_BOARD_NAME "MakerDiary nRF52840 MDK" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(1, 5) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(1, 4) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 2) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 1) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 3) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(1, 8) + +#define BOARD_HAS_CRYSTAL 0 + +#define DEFAULT_UART_BUS_RX (&pin_P0_19) +#define DEFAULT_UART_BUS_TX (&pin_P0_20) diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk new file mode 100644 index 0000000000000..33957504966be --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x802A +USB_PRODUCT = "nRF52840-MDK" +USB_MANUFACTURER = "makerdiary" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25R6435F" diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c b/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c new file mode 100644 index 0000000000000..5284c2484252c --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c @@ -0,0 +1,61 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_AIN0), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_AIN1), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_AIN2), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_AIN3), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_AIN4), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_AIN5), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_AIN6), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_AIN7), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_VDIV), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P31), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_CSN), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_P1_01) }, + + { MP_ROM_QSTR(MP_QSTR_TXD), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_RXD), MP_ROM_PTR(&pin_P0_19) }, + + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_P1_00) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/README.md b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/README.md new file mode 100644 index 0000000000000..e3e50f905dca0 --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/README.md @@ -0,0 +1,96 @@ +# MakerDiary NRF52840 MDK USB Dongle + +Refer to [The makerdiary Github repo](https://github.com/makerdiary/nrf52840-mdk-usb-dongle) +or [The nrf52840-mdk-usb-dongle wiki](https://wiki.makerdiary.com/nrf52840-mdk-usb-dongle/) +for more details about the device. + +This is pretty much just the nRF52840 with a useful number of pins exposed for +your pleasure along with one RGB LED and an onboard antenna in a USB stick form +factor with room for headers on the sides. + +Note that all three LEDs on this device are wired through sinks, not sources, +so flip your boolean expectations when dealing with `DigitalInOut` or `PWMOut` +on this device -- +`led.value = True` or `led.duty_cycle = 0xffff` turns the LED off! + +The onboard button is hard wired to the Reset pin so you cannot use it yourself. + +## Installing CircuitPython submodules + +Before you can build, you will need to run the following commands once, which +will install the submodules that are part of the CircuitPython ecosystem, and +build the `mpy-cross` tool: + +``` +$ cd circuitpython +$ git submodule update --init +$ make -C mpy-cross +``` + +## Note about bootloaders + +While most Adafruit devices come with (or can easily be flashed with) an +Adafruit-provided bootloader (supporting niceties like UF2 flashing), this +board comes with one that supports DFU via nrfutil. If you ever need to +restore the DFU bootloader via a SWD debugger, use +[the nRF52 open bootloader hex file](https://github.com/makerdiary/nrf52840-mdk-usb-dongle/tree/master/firmware/open_bootloader). + +## Building and Flashing CircuitPython + +``` +$ cd ports/nrf +``` + +### Build CircuitPython for the MDK USB Dongle + +``` +make BOARD=makerdiary_nrf52840_mdk_usb_dongle SD=s140 V=1 -j4 hex +``` + +This should produce a `build-makerdiary_nrf52840_mdk_usb_dongle-s140/firmware.hex` file. + +### Install nrfutil + +You'll need to have [nrfutil](https://pypi.org/project/nrfutil/) installed as +appropriate for your system. +As of 2019-01, _nrfutil still requires Python 2.7_... ugh! + +### Flash the nRF52 Radio Soft Device + +Build a DFU package from the softdevice hex file and flash it: + +```sh +nrfutil pkg generate --hw-version 52 --sd-req 0x00 --sd-id 0xAE --softdevice bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_softdevice.hex dfu_sd140-6.1.0.zip +nrfutil dfu usb-serial -pkg dfu_sd140-6.1.0.zip -p /dev/tty.usbmodemABRACADBRA # likely /dev/ttyACM0 on Linux +``` + +Note that the `--sd=id 0xAE` comes from the Nordic nRF52 manual for SoftDevice +6.1.0. When the SoftDevice is changed, read the Nordic manual to find the +correct value and use it on all of the `nrfutil pkg generate` commands. + +`/dev/tty.usbmodem*` is a macOS name. On Linux it'll likely be `/dev/ttyACM*`. On Windows probably a COM port. + +### Flash CircuitPython + +Build a DFU package from the hex application file and flash it: + +``` +nrfutil pkg generate --sd-req 0xAE --application build-makerdiary_nrf52840_mdk_usb_dongle-s140/firmware.hex --hw-version 52 --application-version 1 dfu_circuitpython.zip +nrfutil dfu usb-serial -pkg dfu_circuitpython.zip -p /dev/tty.usbmodemABRACADBRA +``` + +I'm not sure if `--application-version 1` is actually meaningful or required. + +After this, your device should be up and running CircuitPython. When it +resets, you'll see the CIRCUITPY USB filesystem and a new console usb modem +serial port show up. + +``` +Adafruit CircuitPython 4.0.0-alpha.5-139-g10ceb6716 on 2019-01-14; MakerDiary nRF52840 MDK USB Dongle with nRF52840 +>>> +``` + +### TODO items + +* Update the Makefile to do the above DFU .zip building and nrfutil flashing. +* Create a UF2 bootloader for this. It is already a USB stick form factor, it deserves to behave like one. diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/board.c b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h new file mode 100644 index 0000000000000..684b2c501a0a4 --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MAKERDIARY_NRF52840_MDK_DONGLE + +#define MICROPY_HW_BOARD_NAME "MakerDiary nRF52840 MDK USB Dongle" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define BOARD_HAS_CRYSTAL 1 // according to the schematic we do diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk new file mode 100644 index 0000000000000..55ca410d9f85b --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x802A +USB_PRODUCT = "nRF52840-MDK-Dongle" +USB_MANUFACTURER = "makerdiary" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c new file mode 100644 index 0000000000000..006b247688038 --- /dev/null +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_AIN0), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_AIN1), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_AIN2), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_AIN3), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_04) }, // User must connect manually. + { MP_ROM_QSTR(MP_QSTR_VDIV), MP_ROM_PTR(&pin_P0_05) }, // User must connect manually. + +// Not defining the NFC names until CircuitPython supports NFC. +// { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, +// { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P18), MP_ROM_PTR(&pin_P0_18) }, // !Reset button. + { MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P22), MP_ROM_PTR(&pin_P0_22) }, // green led, low is on. + { MP_ROM_QSTR(MP_QSTR_P23), MP_ROM_PTR(&pin_P0_23) }, // red led, low is on. + { MP_ROM_QSTR(MP_QSTR_P24), MP_ROM_PTR(&pin_P0_24) }, // blue led, low is on. + + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_P0_23) }, // Low is on. + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_P0_22) }, // Low is on. + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_24) }, // Low is on. + + // BUT this is the RESET pin so we can't really use it. + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_P0_18) }, // Low is pressed. +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/metro_nrf52840_express/board.c b/ports/nrf/boards/metro_nrf52840_express/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/metro_nrf52840_express/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h new file mode 100644 index 0000000000000..8373551545f18 --- /dev/null +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit Metro nRF52840 Express" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_13) + +#define MICROPY_HW_LED_STATUS (&pin_P1_13) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_23 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_16) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_15) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_07) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_08) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_11) + +#define DEFAULT_UART_BUS_RX (&pin_P0_24) +#define DEFAULT_UART_BUS_TX (&pin_P0_25) diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk new file mode 100644 index 0000000000000..b972bcbed7a1e --- /dev/null +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8040 +USB_PRODUCT = "Metro nRF52840 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +CIRCUITPY__EVE = 1 diff --git a/ports/nrf/boards/metro_nrf52840_express/pins.c b/ports/nrf/boards/metro_nrf52840_express/pins.c new file mode 100644 index 0000000000000..452e31202be25 --- /dev/null +++ b/ports/nrf/boards/metro_nrf52840_express/pins.c @@ -0,0 +1,56 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL),MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P1_13) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/nrf52832_512k_64k.ld b/ports/nrf/boards/nrf52832_512k_64k.ld deleted file mode 100644 index 699811ce866a1..0000000000000 --- a/ports/nrf/boards/nrf52832_512k_64k.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for NRF52832 blank w/ no SoftDevice -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */ - FLASH_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x066000 /* 408 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x010000 /* 64 KiB */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20008000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld b/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld deleted file mode 100644 index dbff5f987f314..0000000000000 --- a/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */ - FLASH_ISR (rx) : ORIGIN = 0x0001c000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x0001d000, LENGTH = 0x04A000 /* 296 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */ - RAM (xrw) : ORIGIN = 0x200039c0, LENGTH = 0x0c640 /* 49.5 KiB, give 8KiB headroom for softdevice */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20007000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld b/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld deleted file mode 100644 index 6d5fe63c9124f..0000000000000 --- a/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */ - FLASH_ISR (rx) : ORIGIN = 0x00023000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x00024000, LENGTH = 0x043000 /* 268 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */ - RAM (xrw) : ORIGIN = 0x200039c0, LENGTH = 0x0c640 /* 49.5 KiB, give 8KiB headroom for softdevice */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20007000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/nrf52840_1M_256k.ld b/ports/nrf/boards/nrf52840_1M_256k.ld deleted file mode 100644 index eb8a18aef6c53..0000000000000 --- a/ports/nrf/boards/nrf52840_1M_256k.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for NRF52840 blank w/ no SoftDevice -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - FLASH_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x0E6000 /* 920 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x000E7000, LENGTH = 0x019000 /* File system 100 KiB */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x040000 /* 256 KiB */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 40K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20020000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/nrf52840_1M_256k_s140_6.0.0-6.alpha.ld b/ports/nrf/boards/nrf52840_1M_256k_s140_6.0.0-6.alpha.ld deleted file mode 100644 index be2a9a75aff74..0000000000000 --- a/ports/nrf/boards/nrf52840_1M_256k_s140_6.0.0-6.alpha.ld +++ /dev/null @@ -1,28 +0,0 @@ -/* - GNU linker script for NRF52840 w/ s140 6.0.0-6.alpha SoftDevice -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */ - FLASH_ISR (rx) : ORIGIN = 0x00025000, LENGTH = 0x001000 /* sector 0, 4 KiB */ - FLASH_TEXT (rx) : ORIGIN = 0x00026000, LENGTH = 0x09A000 /* 616 KiB */ - FLASH_FATFS (r) : ORIGIN = 0x000C0000, LENGTH = 0x040000 /* File system 256 KiB */ - RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x03C000 /* 240 KiB */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 40K; -_minimum_heap_size = 0; - -/* top end of the stack */ - -/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_end = 0x20020000; /* tunable */ - -INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/nrf52_prefix.c b/ports/nrf/boards/nrf52_prefix.c index f9b25a8510a65..0c96eb61ef5ab 100644 --- a/ports/nrf/boards/nrf52_prefix.c +++ b/ports/nrf/boards/nrf52_prefix.c @@ -4,13 +4,13 @@ #include "py/obj.h" #include "py/mphal.h" -#include "pin.h" +#include "nrf_pin.h" #define PIN(p_name, p_port, p_pin, p_adc_channel) \ { \ { &mcu_pin_type }, \ .name = MP_QSTR_ ## p_name, \ - .port = PORT_ ## p_port, \ + .port = (p_port), \ .pin = (p_pin), \ - .adc_channel = p_adc_channel, \ + .adc_channel = (p_adc_channel), \ } diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c new file mode 100644 index 0000000000000..88c68bcb84b8d --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -0,0 +1,102 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0b10100000, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_P0_11, &pin_P0_12, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_P0_08, // TFT_DC Command or data + &pin_P0_14, // TFT_CS Chip select + &pin_P0_13, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 240, // Width (after rotation) + 240, // Height (after rotation) + 80, // column start + 0, // row start + 0, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_P0_02, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + false); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.h b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h new file mode 100644 index 0000000000000..8edc40423ee30 --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2020 Michael Welling + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Open Hardware Summit 2020 Badge" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 2) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 1) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 23) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P1_00 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P1_01 +#define SPI_FLASH_CS_PIN &pin_P0_23 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P1_14) +#define DEFAULT_I2C_BUS_SDA (&pin_P1_15) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_11) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_12) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_07) diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk new file mode 100644 index 0000000000000..7d2c6de987324 --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x8080 +USB_PRODUCT = "OHS2020 Badge" +USB_MANUFACTURER = "OSHWA" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c new file mode 100644 index 0000000000000..2cf783cc1efbc --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -0,0 +1,29 @@ +#include "shared-bindings/board/__init__.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW1), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW2), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW3), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW4), MP_ROM_PTR(&pin_P1_03) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/particle_argon/board.c b/ports/nrf/boards/particle_argon/board.c new file mode 100644 index 0000000000000..f891f54a13da7 --- /dev/null +++ b/ports/nrf/boards/particle_argon/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.h b/ports/nrf/boards/particle_argon/mpconfigboard.h new file mode 100644 index 0000000000000..a4952fc7979ae --- /dev/null +++ b/ports/nrf/boards/particle_argon/mpconfigboard.h @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Particle Argon" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_12) + +#define MICROPY_HW_RGB_LED_RED (&pin_P0_13) +#define MICROPY_HW_RGB_LED_GREEN (&pin_P0_14) +#define MICROPY_HW_RGB_LED_BLUE (&pin_P0_15) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 17) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_21 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_17 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_27) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_26) + +#define DEFAULT_SPI_BUS_SCK (&pin_P1_15) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_14) + +#define DEFAULT_UART_BUS_RX (&pin_P0_08) +#define DEFAULT_UART_BUS_TX (&pin_P0_06) diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.mk b/ports/nrf/boards/particle_argon/mpconfigboard.mk new file mode 100644 index 0000000000000..a0edfda958a0a --- /dev/null +++ b/ports/nrf/boards/particle_argon/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x2b04 +USB_PID = 0xc00c +USB_PRODUCT = "Argon" +USB_MANUFACTURER = "Particle" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file diff --git a/ports/nrf/boards/particle_argon/pins.c b/ports/nrf/boards/particle_argon/pins.c new file mode 100644 index 0000000000000..9fab9e6b6aded --- /dev/null +++ b/ports/nrf/boards/particle_argon/pins.c @@ -0,0 +1,70 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_MODE), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_CHARGE_STATUS), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_03) }, + + { MP_ROM_QSTR(MP_QSTR_RGB_LED_RED), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_GREEN), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_BLUE), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_14) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_ANTENNA_EXTERNAL), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_ANTENNA_PCB), MP_ROM_PTR(&pin_P0_02) }, + + + { MP_ROM_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_ESP_CTS), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_ESP_BOOT_MODE), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_ESP_WIFI_EN), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_ESP_HOST_WK), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + + +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/particle_boron/board.c b/ports/nrf/boards/particle_boron/board.c new file mode 100644 index 0000000000000..f891f54a13da7 --- /dev/null +++ b/ports/nrf/boards/particle_boron/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.h b/ports/nrf/boards/particle_boron/mpconfigboard.h new file mode 100644 index 0000000000000..bab1b3d5cd069 --- /dev/null +++ b/ports/nrf/boards/particle_boron/mpconfigboard.h @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Particle Boron" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_12) + +#define MICROPY_HW_RGB_LED_RED (&pin_P0_13) +#define MICROPY_HW_RGB_LED_GREEN (&pin_P0_14) +#define MICROPY_HW_RGB_LED_BLUE (&pin_P0_15) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 17) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_21 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_17 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_27) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_26) + +#define DEFAULT_SPI_BUS_SCK (&pin_P1_15) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_14) + +#define DEFAULT_UART_BUS_RX (&pin_P0_08) +#define DEFAULT_UART_BUS_TX (&pin_P0_06) diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.mk b/ports/nrf/boards/particle_boron/mpconfigboard.mk new file mode 100644 index 0000000000000..ccb2d63a175af --- /dev/null +++ b/ports/nrf/boards/particle_boron/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x2b04 +USB_PID = 0xc00d +USB_PRODUCT = "Boron" +USB_MANUFACTURER = "Particle" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file diff --git a/ports/nrf/boards/particle_boron/pins.c b/ports/nrf/boards/particle_boron/pins.c new file mode 100644 index 0000000000000..4d6f3e7de2260 --- /dev/null +++ b/ports/nrf/boards/particle_boron/pins.c @@ -0,0 +1,70 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_MODE), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_POWER_I2C_SDA), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_POWER_I2C_SCL), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_POWER_INTERRUPT), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_03) }, + + { MP_ROM_QSTR(MP_QSTR_RGB_LED_RED), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_GREEN), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_BLUE), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_14) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_ANTENNA_SWITCH), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_UBLOX_TX), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_RX), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_CTS), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_RTS), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_POWER_ENABLE), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_POWER_MONITOR), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_RESET), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_UBLOX_POWER_ON), MP_ROM_PTR(&pin_P0_16) }, + + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + + + +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/particle_xenon/board.c b/ports/nrf/boards/particle_xenon/board.c new file mode 100644 index 0000000000000..f891f54a13da7 --- /dev/null +++ b/ports/nrf/boards/particle_xenon/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.h b/ports/nrf/boards/particle_xenon/mpconfigboard.h new file mode 100644 index 0000000000000..f0d12bb0b9b34 --- /dev/null +++ b/ports/nrf/boards/particle_xenon/mpconfigboard.h @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Particle Xenon" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_12) + +#define CP_RGB_STATUS_R (&pin_P0_13) +#define CP_RGB_STATUS_G (&pin_P0_14) +#define CP_RGB_STATUS_B (&pin_P0_15) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 17) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_21 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_17 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_27) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_26) + +#define DEFAULT_SPI_BUS_SCK (&pin_P1_15) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_14) + +#define DEFAULT_UART_BUS_RX (&pin_P0_08) +#define DEFAULT_UART_BUS_TX (&pin_P0_06) diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.mk b/ports/nrf/boards/particle_xenon/mpconfigboard.mk new file mode 100644 index 0000000000000..3970b1d056b13 --- /dev/null +++ b/ports/nrf/boards/particle_xenon/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x2b04 +USB_PID = 0xc00e # argon is 0xc00c +USB_PRODUCT = "Xenon" +USB_MANUFACTURER = "Particle" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file diff --git a/ports/nrf/boards/particle_xenon/pins.c b/ports/nrf/boards/particle_xenon/pins.c new file mode 100644 index 0000000000000..a50c8b6418de3 --- /dev/null +++ b/ports/nrf/boards/particle_xenon/pins.c @@ -0,0 +1,63 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_MODE), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_CHARGE_STATUS), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_03) }, + + { MP_ROM_QSTR(MP_QSTR_RGB_LED_RED), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_GREEN), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_RGB_LED_BLUE), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_14) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_ANTENNA_EXTERNAL), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_ANTENNA_PCB), MP_ROM_PTR(&pin_P0_24) }, + + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + + + +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pca10040/board.c b/ports/nrf/boards/pca10040/board.c deleted file mode 100644 index 5ad81c21d7b53..0000000000000 --- a/ports/nrf/boards/pca10040/board.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "nrf.h" - -#include "boards/board.h" - -void board_init(void) { - -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/nrf/boards/pca10040/mpconfigboard.h b/ports/nrf/boards/pca10040/mpconfigboard.h deleted file mode 100644 index 905ef0f4ab1c2..0000000000000 --- a/ports/nrf/boards/pca10040/mpconfigboard.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#define PCA10040 - -#define MICROPY_HW_BOARD_NAME "PCA10040" -#define MICROPY_HW_MCU_NAME "NRF52832" -#define MICROPY_PY_SYS_PLATFORM "nrf52-DK" - -#define MICROPY_PY_MACHINE_HW_PWM (1) -#define MICROPY_PY_MACHINE_HW_SPI (1) -#define MICROPY_PY_MACHINE_TIMER (1) -#define MICROPY_PY_MACHINE_RTC (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_ADC (1) -#define MICROPY_PY_MACHINE_TEMP (1) - -#define MICROPY_HW_HAS_LED (1) -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -#define MICROPY_HW_LED_COUNT (4) -#define MICROPY_HW_LED_PULLUP (1) - -#define MICROPY_HW_LED1 (17) // LED1 -#define MICROPY_HW_LED2 (18) // LED2 -#define MICROPY_HW_LED3 (19) // LED3 -#define MICROPY_HW_LED4 (20) // LED4 - -// UART config -#define MICROPY_HW_UART1_RX (pin_P0_08) -#define MICROPY_HW_UART1_TX (pin_P0_06) -#define MICROPY_HW_UART1_CTS (pin_P0_07) -#define MICROPY_HW_UART1_RTS (pin_P0_05) -#define MICROPY_HW_UART1_HWFC (1) - -// SPI0 config -#define MICROPY_HW_SPI0_NAME "SPI0" -#define MICROPY_HW_SPI0_SCK (pin_P0_25) // (Arduino D13) -#define MICROPY_HW_SPI0_MOSI (pin_P0_23) // (Arduino D11) -#define MICROPY_HW_SPI0_MISO (pin_P0_24) // (Arduino D12) - -#define MICROPY_HW_PWM0_NAME "PWM0" -#define MICROPY_HW_PWM1_NAME "PWM1" -#define MICROPY_HW_PWM2_NAME "PWM2" - -#define HELP_TEXT_BOARD_LED "1,2,3,4" - -#define PORT_HEAP_SIZE (32*1024) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/pca10040/mpconfigboard.mk b/ports/nrf/boards/pca10040/mpconfigboard.mk deleted file mode 100644 index 83dbb5ab4200b..0000000000000 --- a/ports/nrf/boards/pca10040/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52832 -LD_FILE = boards/nrf52832_512k_64k.ld - -NRF_DEFINES += -DNRF52832_XXAA diff --git a/ports/nrf/boards/pca10040/mpconfigboard_s132.mk b/ports/nrf/boards/pca10040/mpconfigboard_s132.mk deleted file mode 100644 index 3a0b750bff458..0000000000000 --- a/ports/nrf/boards/pca10040/mpconfigboard_s132.mk +++ /dev/null @@ -1,8 +0,0 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52832 -SOFTDEV_VERSION = 5.0.0 - -LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld - -NRF_DEFINES += -DNRF52832_XXAA diff --git a/ports/nrf/boards/pca10040/nrf52_hal_conf.h b/ports/nrf/boards/pca10040/nrf52_hal_conf.h deleted file mode 100644 index fd6073a187b71..0000000000000 --- a/ports/nrf/boards/pca10040/nrf52_hal_conf.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef NRF52_HAL_CONF_H__ -#define NRF52_HAL_CONF_H__ - -#define HAL_UART_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIME_MODULE_ENABLED -#define HAL_PWM_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_TIMER_MODULE_ENABLED -#define HAL_TWI_MODULE_ENABLED -#define HAL_ADCE_MODULE_ENABLED -#define HAL_TEMP_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -// #define HAL_UARTE_MODULE_ENABLED -// #define HAL_SPIE_MODULE_ENABLED -// #define HAL_TWIE_MODULE_ENABLED - -#endif // NRF52_HAL_CONF_H__ diff --git a/ports/nrf/boards/pca10040/pins.csv b/ports/nrf/boards/pca10040/pins.csv deleted file mode 100644 index 2202224461cc7..0000000000000 --- a/ports/nrf/boards/pca10040/pins.csv +++ /dev/null @@ -1,31 +0,0 @@ -P0_01,P0_01 -P0_02,P0_02 -P0_03,P0_03 -P0_04,P0_04 -P0_05,P0_05 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28 -P0_29,P0_29 -P0_30,P0_30 -P0_31,P0_31 diff --git a/ports/nrf/boards/pca10056/board.c b/ports/nrf/boards/pca10056/board.c index 5ad81c21d7b53..4421970eefe4d 100644 --- a/ports/nrf/boards/pca10056/board.c +++ b/ports/nrf/boards/pca10056/board.c @@ -24,15 +24,9 @@ * THE SOFTWARE. */ -#include -#include - -#include "nrf.h" - #include "boards/board.h" void board_init(void) { - } bool board_requests_safe_mode(void) { diff --git a/ports/nrf/boards/pca10056/examples/buttons.py b/ports/nrf/boards/pca10056/examples/buttons.py index 9f4a7cfd48646..1a0c5aabbcaa2 100644 --- a/ports/nrf/boards/pca10056/examples/buttons.py +++ b/ports/nrf/boards/pca10056/examples/buttons.py @@ -4,10 +4,10 @@ import time pad = gamepad.GamePad( - digitalio.DigitalInOut(board.PA11), - digitalio.DigitalInOut(board.PA12), - digitalio.DigitalInOut(board.PA24), - digitalio.DigitalInOut(board.PA25), + digitalio.DigitalInOut(board.P0_11), + digitalio.DigitalInOut(board.P0_12), + digitalio.DigitalInOut(board.P0_24), + digitalio.DigitalInOut(board.P0_25), ) prev_buttons = 0 diff --git a/ports/nrf/boards/pca10056/mpconfigboard.h b/ports/nrf/boards/pca10056/mpconfigboard.h index c22347749eb77..4856a957001e4 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.h +++ b/ports/nrf/boards/pca10056/mpconfigboard.h @@ -5,6 +5,7 @@ * * Copyright (c) 2016 Glenn Ruben Bakke * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -24,64 +25,40 @@ * THE SOFTWARE. */ -#define PCA10056 - -#define MICROPY_HW_BOARD_NAME "PCA10056" -#define MICROPY_HW_MCU_NAME "NRF52840" -#define MICROPY_PY_SYS_PLATFORM "nrf52840-PDK" - -#define MICROPY_PY_MACHINE_HW_PWM (1) -#define MICROPY_PY_MACHINE_HW_SPI (1) -#define MICROPY_PY_MACHINE_TIMER (1) -#define MICROPY_PY_MACHINE_RTC (1) -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_ADC (1) -#define MICROPY_PY_MACHINE_TEMP (1) +#include "nrfx/hal/nrf_gpio.h" -#define MICROPY_HW_HAS_LED (1) -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) +#define MICROPY_HW_BOARD_NAME "PCA10056 nRF52840-DK" +#define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_HW_LED_COUNT (4) -#define MICROPY_HW_LED_PULLUP (1) +#define MICROPY_HW_LED_STATUS (&pin_P0_13) -#define MICROPY_HW_LED1 (13) // LED1 -#define MICROPY_HW_LED2 (14) // LED2 -#define MICROPY_HW_LED3 (15) // LED3 -#define MICROPY_HW_LED4 (16) // LED4 +#define DEFAULT_I2C_BUS_SCL (&pin_P0_27) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_26) -// UART config -#define MICROPY_HW_UART1_RX (pin_P0_08) -#define MICROPY_HW_UART1_TX (pin_P0_06) -#define MICROPY_HW_UART1_CTS (pin_P0_07) -#define MICROPY_HW_UART1_RTS (pin_P0_05) -#define MICROPY_HW_UART1_HWFC (1) +#define DEFAULT_SPI_BUS_SCK (&pin_P1_15) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_14) -// SPI0 config -#define MICROPY_HW_SPI0_NAME "SPI0" +#define DEFAULT_UART_BUS_RX (&pin_P1_01) +#define DEFAULT_UART_BUS_TX (&pin_P1_02) -#define MICROPY_HW_SPI0_SCK (pin_P1_15) -#define MICROPY_HW_SPI0_MOSI (pin_P1_13) -#define MICROPY_HW_SPI0_MISO (pin_P1_14) - -#define MICROPY_HW_PWM0_NAME "PWM0" -#define MICROPY_HW_PWM1_NAME "PWM1" -#define MICROPY_HW_PWM2_NAME "PWM2" -#if 0 -#define MICROPY_HW_PWM3_NAME "PWM3" +// Flash operation mode is determined by MICROPY_QSPI_DATAn pin configuration. +// A pin config is valid if it is defined and its value is not 0xFF. +// Quad mode: If all DATA0 --> DATA3 are valid +// Dual mode: If DATA0 and DATA1 are valid while either DATA2 and/or DATA3 are invalid +// Single mode: If only DATA0 is valid +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 17) #endif -#define HELP_TEXT_BOARD_LED "1,2,3,4" - -#define PORT_HEAP_SIZE (128*1024) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_21 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_17 +#endif diff --git a/ports/nrf/boards/pca10056/mpconfigboard.mk b/ports/nrf/boards/pca10056/mpconfigboard.mk index 49df644b20be8..8fd1ef08d0b3c 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.mk +++ b/ports/nrf/boards/pca10056/mpconfigboard.mk @@ -1,13 +1,10 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52840 -SOFTDEV_VERSION ?= 6.0.0-6.alpha +USB_VID = 0x239A +USB_PID = 0x802A +USB_PRODUCT = "PCA10056" +USB_MANUFACTURER = "Nordic Semiconductor" -LD_FILE = boards/nrf52840_1M_256k.ld +MCU_CHIP = nrf52840 -NRF_DEFINES += -DNRF52840_XXAA - -ifeq ($(SD), ) -INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include -INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT) -endif +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "MX25R6435F" diff --git a/ports/nrf/boards/pca10056/mpconfigboard_s140.mk b/ports/nrf/boards/pca10056/mpconfigboard_s140.mk deleted file mode 100644 index fbff1f6d8bb69..0000000000000 --- a/ports/nrf/boards/pca10056/mpconfigboard_s140.mk +++ /dev/null @@ -1,8 +0,0 @@ -MCU_SERIES = m4 -MCU_VARIANT = nrf52 -MCU_SUB_VARIANT = nrf52840 -SOFTDEV_VERSION ?= 6.0.0-6.alpha - -LD_FILE = boards/nrf52840_1M_256k_s140_$(SOFTDEV_VERSION).ld - -NRF_DEFINES += -DNRF52840_XXAA diff --git a/ports/nrf/boards/pca10056/nrf52_hal_conf.h b/ports/nrf/boards/pca10056/nrf52_hal_conf.h deleted file mode 100644 index fd6073a187b71..0000000000000 --- a/ports/nrf/boards/pca10056/nrf52_hal_conf.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef NRF52_HAL_CONF_H__ -#define NRF52_HAL_CONF_H__ - -#define HAL_UART_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIME_MODULE_ENABLED -#define HAL_PWM_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_TIMER_MODULE_ENABLED -#define HAL_TWI_MODULE_ENABLED -#define HAL_ADCE_MODULE_ENABLED -#define HAL_TEMP_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -// #define HAL_UARTE_MODULE_ENABLED -// #define HAL_SPIE_MODULE_ENABLED -// #define HAL_TWIE_MODULE_ENABLED - -#endif // NRF52_HAL_CONF_H__ diff --git a/ports/nrf/boards/pca10056/pins.c b/ports/nrf/boards/pca10056/pins.c new file mode 100644 index 0000000000000..e00bc8a11e62d --- /dev/null +++ b/ports/nrf/boards/pca10056/pins.c @@ -0,0 +1,129 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON2), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON3), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON4), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_27) }, + + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_01) }, + + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_03) }, + + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_04) }, + + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_05) }, + + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_06) }, + + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_07) }, + + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_08) }, + + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P1_12) }, + + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_13) }, + + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_14) }, + + // Note that there is no LED on D13. + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pca10056/pins.csv b/ports/nrf/boards/pca10056/pins.csv deleted file mode 100644 index a4e4e8d5d110e..0000000000000 --- a/ports/nrf/boards/pca10056/pins.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00,PA0 -P0_01,P0_01 -P0_02,P0_02,ADC0_IN0 -P0_03,P0_03,ADC0_IN1 -P0_04,P0_04,ADC0_IN2 -P0_05,P0_05,ADC0_IN3 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28,ADC0_IN4 -P0_29,P0_29,ADC0_IN5 -P0_30,P0_30,ADC0_IN6 -P0_31,P0_31,ADC0_IN7 -P1_00,P1_00 -P1_01,P1_01 -P1_02,P1_02 -P1_03,P1_03 -P1_04,P1_04 -P1_05,P1_05 -P1_06,P1_06 -P1_07,P1_07 -P1_08,P1_08 -P1_09,P1_09 -P1_10,P1_10 -P1_11,P1_11 -P1_12,P1_12 -P1_13,P1_13 -P1_14,P1_14 -P1_15,P1_15 diff --git a/ports/nrf/boards/pca10059/board.c b/ports/nrf/boards/pca10059/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/pca10059/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip b/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip new file mode 100644 index 0000000000000..691f4a1ab3cce Binary files /dev/null and b/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip differ diff --git a/ports/nrf/boards/pca10059/mpconfigboard.h b/ports/nrf/boards/pca10059/mpconfigboard.h new file mode 100644 index 0000000000000..18aa66f16b076 --- /dev/null +++ b/ports/nrf/boards/pca10059/mpconfigboard.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define MICROPY_HW_BOARD_NAME "PCA10059 nRF52840 Dongle" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_06) diff --git a/ports/nrf/boards/pca10059/mpconfigboard.mk b/ports/nrf/boards/pca10059/mpconfigboard.mk new file mode 100644 index 0000000000000..3f97b082185a0 --- /dev/null +++ b/ports/nrf/boards/pca10059/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x802A +USB_PRODUCT = "PCA10059" +USB_MANUFACTURER = "Nordic Semiconductor" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/pca10059/pins.c b/ports/nrf/boards/pca10059/pins.c new file mode 100644 index 0000000000000..932b925d17fd4 --- /dev/null +++ b/ports/nrf/boards/pca10059/pins.c @@ -0,0 +1,40 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_LED2_R), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_LED2_G), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_LED2_B), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SW1), MP_ROM_PTR(&pin_P1_06) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/README.md b/ports/nrf/boards/sparkfun_nrf52840_mini/README.md new file mode 100644 index 0000000000000..f80f1c27ca602 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/README.md @@ -0,0 +1,48 @@ +# SparkFun Pro nRF52840 Mini Breakout + +The [SparkFun Pro nRF52840 Mini](https://www.sparkfun.com/products/15025) small breakout board for Raytac's MDBT50Q-P1M module, which features an nRF52840. It breaks out as many pins as it can in an Arduino Pro Mini footprint. Also included on the board are a qwiic (I2C) connector, LiPo battery charger, and on/off switch. + +Note: the SparkFun Pro nRF52840 Mini Breakout does not include a QSPI external flash. Any Python code will need to be stored on the internal flash filesystem. + +## CircuitPython Pin Defs + +CircuitPython pin definitions try to follow those of the [Arduino Pro Mini](https://www.sparkfun.com/products/11113), which the footprint is based on. + +This can be somewhat confusing, especially around the analog pins. Here's a quick pin-map: + + + + + + + + + + + + + + + + + + + + + + +
Board pin labelDigital Pin ReferenceAdditional Pin CapabilitiesPin/Port Reference
17D1TXP0_17
15D0RXP0_15
8SDAP0_08
11SCLP0_11
19D3P0_19
20D4P0_20
21D5P0_21
22D6P0_22
23D7P0_23
9D8P0_09
10D9P0_10
2D10A0P0_02
3D11MOSI, A1P0_03
31D12MISO, A7P0_31
30D13SCK, A6P0_31
29A5P0_29
28A4P0_28
5A3P0_05
4A2P0_04
+ +If a pin isn't defined as D0, D1, etc., standard port/pin references should work -- e.g. `P0_17` is pin 17, `P0_02` is pin 2, etc. + +## Bootloader Notes + +The nRF52840 Mini ships with a slightly modified (i.e pin defs and USB defs) version of the Adafruit nRF52 bootloader, which supports UF2 and CDC bootloading. + +## Hardware Reference + +The nRF52840 Mini hardware layout is open source: + +* [Schematic](https://cdn.sparkfun.com/assets/learn_tutorials/8/2/0/nrf52840-breakout-mdbt50q-v10.pdf) +* [Eagle Files](https://cdn.sparkfun.com/assets/learn_tutorials/8/2/0/nrf52840-breakout-mdbt50q-v10.zip) +* [Hookup Guide](https://learn.sparkfun.com/tutorials/sparkfun-pro-nrf52840-mini-hookup-guide) \ No newline at end of file diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/board.c b/ports/nrf/boards/sparkfun_nrf52840_mini/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h new file mode 100644 index 0000000000000..23cce7f8a4971 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.h @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "SparkFun Pro nRF52840 Mini" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_08) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_30) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_03) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_31) + +#define DEFAULT_UART_BUS_RX (&pin_P0_15) +#define DEFAULT_UART_BUS_TX (&pin_P0_17) + +/* Note: Flash chip is not provided on SparkFun nRF52840 Mini. + * Leaving this as a reminder for future/similar versions of the board. */ +// Flash operation mode is determined by MICROPY_QSPI_DATAn pin configuration. +// A pin config is valid if it is defined and its value is not 0xFF. +// Quad mode: If all DATA0 --> DATA3 are valid +// Dual mode: If DATA0 and DATA1 are valid while either DATA2 and/or DATA3 are invalid +// Single mode: If only DATA0 is valid +/*#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 17) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_21 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_17 +#endif*/ diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk new file mode 100644 index 0000000000000..f66b2eaf7a8de --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x1B4F +USB_PID = 0x5289 +USB_PRODUCT = "SFE_nRF52840_Mini" +USB_MANUFACTURER = "SparkFun Electronics" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/pins.c b/ports/nrf/boards/sparkfun_nrf52840_mini/pins.c new file mode 100644 index 0000000000000..e7b61db584e4c --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/pins.c @@ -0,0 +1,53 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P1_15) }, // D1/TX + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_17) }, // D0/RX + // D2 on qwiic gap + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_19) }, // D3 + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_20) }, // D4 + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_21) }, // D5 + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_22) }, // D6 + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_23) }, // D7 + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_09) }, // D8 + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_10) }, // D9 + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_02) }, // D10 + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_03) }, // D11 + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_31) }, // D12 + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_30) }, // D13 + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P0_29) }, // D14 + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P0_28) }, // D15 + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_P0_05) }, // D16 + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_P0_04) }, // D17 + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) }, // A0 + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_03) }, // A1 + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_04) }, // A2 + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_05) }, // A3 + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_28) }, // A4 + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_29) }, // A5 + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_30) }, // A6 + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_31) }, // A7 + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // 8 - SDA + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // 11 - SCL + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_31) }, // 31 - MISO + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_03) }, // 3 - MOSI + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_30) }, // 30 - SCK + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_07) }, // 7 - Blue LED + + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_13) }, // 13 - Button + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_15) }, // 15 - UART RX + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_17) }, // 17 - UART TX + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_QWIIC), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/teknikio_bluebird/board.c b/ports/nrf/boards/teknikio_bluebird/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/nrf/boards/teknikio_bluebird/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/teknikio_bluebird/mpconfigboard.h b/ports/nrf/boards/teknikio_bluebird/mpconfigboard.h new file mode 100644 index 0000000000000..76e772ca9befa --- /dev/null +++ b/ports/nrf/boards/teknikio_bluebird/mpconfigboard.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//https://github.com/Teknikio/TKInventionBuilderFramework + + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Teknikio Bluebird" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_26) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_27) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_26) + +#define DEFAULT_SPI_BUS_SCK (&pin_P1_15) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_14) + +#define DEFAULT_UART_BUS_RX (&pin_P1_07) +#define DEFAULT_UART_BUS_TX (&pin_P1_08) + +#define BOARD_HAS_CRYSTAL 1 // according to the schematic we do diff --git a/ports/nrf/boards/teknikio_bluebird/mpconfigboard.mk b/ports/nrf/boards/teknikio_bluebird/mpconfigboard.mk new file mode 100644 index 0000000000000..e178a820514c4 --- /dev/null +++ b/ports/nrf/boards/teknikio_bluebird/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8070 +USB_PRODUCT = "Bluebird" +USB_MANUFACTURER = "Teknikio" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/teknikio_bluebird/pins.c b/ports/nrf/boards/teknikio_bluebird/pins.c new file mode 100644 index 0000000000000..a90dc7daa2dbf --- /dev/null +++ b/ports/nrf/boards/teknikio_bluebird/pins.c @@ -0,0 +1,62 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_08) }, + + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_04) }, + + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT_ENABLE), MP_ROM_PTR(&pin_P0_30) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_P1_11) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); \ No newline at end of file diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c new file mode 100644 index 0000000000000..53015364a6571 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -0,0 +1,740 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "bonding.h" +#include "nrfx_power.h" +#include "nrf_nvic.h" +#include "nrf_sdm.h" +#include "tick.h" +#include "py/gc.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/nvm/ByteArray.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/time/__init__.h" + +#define BLE_MIN_CONN_INTERVAL MSEC_TO_UNITS(15, UNIT_0_625_MS) +#define BLE_MAX_CONN_INTERVAL MSEC_TO_UNITS(15, UNIT_0_625_MS) +#define BLE_SLAVE_LATENCY 0 +#define BLE_CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) + +const nvm_bytearray_obj_t common_hal_bleio_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .start_address = (uint8_t*) CIRCUITPY_BLE_CONFIG_START_ADDR, + .len = CIRCUITPY_BLE_CONFIG_SIZE, +}; + +STATIC void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) { + reset_into_safe_mode(NORDIC_SOFT_DEVICE_ASSERT); +} + +bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT]; + +// Linker script provided ram start. +extern uint32_t _ram_start; +STATIC uint32_t ble_stack_enable(void) { + nrf_clock_lf_cfg_t clock_config = { +#if BOARD_HAS_32KHZ_XTAL + .source = NRF_CLOCK_LF_SRC_XTAL, + .rc_ctiv = 0, + .rc_temp_ctiv = 0, + .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM, +#else + .source = NRF_CLOCK_LF_SRC_RC, + .rc_ctiv = 16, + .rc_temp_ctiv = 2, + .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM, +#endif + }; + + uint32_t err_code = sd_softdevice_enable(&clock_config, softdevice_assert_handler); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // Start with no event handlers, etc. + ble_drv_reset(); + + // Set everything up to have one persistent code editing connection and one user managed + // connection. In the future we could move .data and .bss to the other side of the stack and + // dynamically adjust for different memory requirements of the SD based on boot.py + // configuration. + uint32_t app_ram_start = (uint32_t) &_ram_start; + + ble_cfg_t ble_conf; + ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; + // Each additional connection costs: + // about 3700-4300 bytes when .hvn_tx_queue_size is 1 + // about 9000 bytes when .hvn_tx_queue_size is 10 + ble_conf.conn_cfg.params.gap_conn_cfg.conn_count = BLEIO_TOTAL_CONNECTION_COUNT; + // Event length here can influence throughput so perhaps make multiple connection profiles + // available. + ble_conf.conn_cfg.params.gap_conn_cfg.event_length = BLE_GAP_EVENT_LENGTH_DEFAULT; + err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + memset(&ble_conf, 0, sizeof(ble_conf)); + // adv_set_count must be == 1 for S140. Cannot be increased. + ble_conf.gap_cfg.role_count_cfg.adv_set_count = 1; + // periph_role_count costs 1232 bytes for 2 to 3, then ~1840 for each further increment. + ble_conf.gap_cfg.role_count_cfg.periph_role_count = 4; + // central_role_count costs 648 bytes for 1 to 2, then ~1250 for each further increment. + ble_conf.gap_cfg.role_count_cfg.central_role_count = 4; + err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + memset(&ble_conf, 0, sizeof(ble_conf)); + ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; + // Each increment to hvn_tx_queue_size costs 2064 bytes. + // DevZone recommends not setting this directly, but instead changing gap_conn_cfg.event_length. + // However, we are setting connection extension, so this seems to make sense. + ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = 9; + err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATTS, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // Set ATT_MTU so that the maximum MTU we can negotiate is up to the full characteristic size. + memset(&ble_conf, 0, sizeof(ble_conf)); + ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; + ble_conf.conn_cfg.params.gatt_conn_cfg.att_mtu = BLE_GATTS_VAR_ATTR_LEN_MAX; + err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // Increase the GATT Server attribute size to accomodate both the CircuitPython built-in service + // and anything the user does. + memset(&ble_conf, 0, sizeof(ble_conf)); + // Each increment to the BLE_GATTS_ATTR_TAB_SIZE_DEFAULT multiplier costs 1408 bytes. + ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5; + err_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // Increase the number of vendor UUIDs supported. Apple uses a complete random number per + // service and characteristic. + memset(&ble_conf, 0, sizeof(ble_conf)); + // Each additional vs_uuid_count costs 16 bytes. + ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 75; // Defaults to 10. + err_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // This sets app_ram_start to the minimum value needed for the settings set above. + err_code = sd_ble_enable(&app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + // Turn on connection event extension so we can transmit for a longer period of time as needed. + ble_opt_t opt; + opt.common_opt.conn_evt_ext.enable = true; + err_code = sd_ble_opt_set(BLE_COMMON_OPT_CONN_EVT_EXT, &opt); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + ble_gap_conn_params_t gap_conn_params = { + .min_conn_interval = BLE_MIN_CONN_INTERVAL, + .max_conn_interval = BLE_MAX_CONN_INTERVAL, + .slave_latency = BLE_SLAVE_LATENCY, + .conn_sup_timeout = BLE_CONN_SUP_TIMEOUT, + }; + err_code = sd_ble_gap_ppcp_set(&gap_conn_params); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + err_code = sd_ble_gap_appearance_set(BLE_APPEARANCE_UNKNOWN); + return err_code; +} + +STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { + bleio_adapter_obj_t *self = (bleio_adapter_obj_t*)self_in; + + // For debugging. + // mp_printf(&mp_plat_print, "Adapter event: 0x%04x\n", ble_evt->header.evt_id); + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: { + // Find an empty connection. One must always be available because the SD has the same + // total connection limit. + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &bleio_connections[i]; + if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { + break; + } + } + + // Central has connected. + ble_gap_evt_connected_t* connected = &ble_evt->evt.gap_evt.params.connected; + + connection->conn_handle = ble_evt->evt.gap_evt.conn_handle; + connection->connection_obj = mp_const_none; + connection->pair_status = PAIR_NOT_PAIRED; + connection->mtu = 0; + + ble_drv_add_event_handler_entry(&connection->handler_entry, connection_on_ble_evt, connection); + self->connection_objs = NULL; + + // Save the current connection parameters. + memcpy(&connection->conn_params, &connected->conn_params, sizeof(ble_gap_conn_params_t)); + + #if CIRCUITPY_VERBOSE_BLE + ble_gap_conn_params_t *cp = &connected->conn_params; + mp_printf(&mp_plat_print, "conn params: min_ci %d max_ci %d s_l %d sup_timeout %d\n", cp->min_conn_interval, cp->max_conn_interval, cp->slave_latency, cp->conn_sup_timeout); + #endif + + // See if connection interval set by Central is out of range. + // If so, negotiate our preferred range. + ble_gap_conn_params_t conn_params; + sd_ble_gap_ppcp_get(&conn_params); + if (conn_params.min_conn_interval < connected->conn_params.min_conn_interval || + conn_params.min_conn_interval > connected->conn_params.max_conn_interval) { + sd_ble_gap_conn_param_update(ble_evt->evt.gap_evt.conn_handle, &conn_params); + } + self->current_advertising_data = NULL; + break; + } + case BLE_GAP_EVT_DISCONNECTED: { + // Find the connection that was disconnected. + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &bleio_connections[i]; + if (connection->conn_handle == ble_evt->evt.gap_evt.conn_handle) { + break; + } + } + ble_drv_remove_event_handler(connection_on_ble_evt, connection); + connection->conn_handle = BLE_CONN_HANDLE_INVALID; + connection->pair_status = PAIR_NOT_PAIRED; + if (connection->connection_obj != mp_const_none) { + bleio_connection_obj_t* obj = connection->connection_obj; + obj->connection = NULL; + obj->disconnect_reason = ble_evt->evt.gap_evt.params.disconnected.reason; + } + self->connection_objs = NULL; + + break; + } + + case BLE_GAP_EVT_ADV_SET_TERMINATED: + self->current_advertising_data = NULL; + break; + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled adapter event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +STATIC void get_address(bleio_adapter_obj_t *self, ble_gap_addr_t *address) { + check_nrf_error(sd_ble_gap_addr_get(address)); +} + +char default_ble_name[] = { 'C', 'I', 'R', 'C', 'U', 'I', 'T', 'P', 'Y', 0, 0, 0, 0 , 0}; + +STATIC void bleio_adapter_reset_name(bleio_adapter_obj_t *self) { + uint8_t len = sizeof(default_ble_name) - 1; + + ble_gap_addr_t local_address; + get_address(self, &local_address); + + default_ble_name[len - 4] = nibble_to_hex_lower[local_address.addr[1] >> 4 & 0xf]; + default_ble_name[len - 3] = nibble_to_hex_lower[local_address.addr[1] & 0xf]; + default_ble_name[len - 2] = nibble_to_hex_lower[local_address.addr[0] >> 4 & 0xf]; + default_ble_name[len - 1] = nibble_to_hex_lower[local_address.addr[0] & 0xf]; + default_ble_name[len] = '\0'; // for now we add null for compatibility with C ASCIIZ strings + + common_hal_bleio_adapter_set_name(self, (char*) default_ble_name); +} + +void common_hal_bleio_adapter_set_enabled(bleio_adapter_obj_t *self, bool enabled) { + const bool is_enabled = common_hal_bleio_adapter_get_enabled(self); + + // Don't enable or disable twice + if (is_enabled == enabled) { + return; + } + + uint32_t err_code; + if (enabled) { + // The SD takes over the POWER module and will fail if the module is already in use. + // Occurs when USB is initialized previously + nrfx_power_uninit(); + + err_code = ble_stack_enable(); + } else { + err_code = sd_softdevice_disable(); + } + // Re-init USB hardware + init_usb_hardware(); + + check_nrf_error(err_code); + + // Add a handler for incoming peripheral connections. + if (enabled) { + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + connection->conn_handle = BLE_CONN_HANDLE_INVALID; + } + bleio_adapter_reset_name(self); + ble_drv_add_event_handler_entry(&self->handler_entry, adapter_on_ble_evt, self); + } else { + ble_drv_reset(); + self->scan_results = NULL; + self->current_advertising_data = NULL; + self->advertising_data = NULL; + self->scan_response_data = NULL; + } +} + +bool common_hal_bleio_adapter_get_enabled(bleio_adapter_obj_t *self) { + uint8_t is_enabled; + + check_nrf_error(sd_softdevice_is_enabled(&is_enabled)); + + return is_enabled; +} + +bleio_address_obj_t *common_hal_bleio_adapter_get_address(bleio_adapter_obj_t *self) { + common_hal_bleio_adapter_set_enabled(self, true); + + ble_gap_addr_t local_address; + get_address(self, &local_address); + + bleio_address_obj_t *address = m_new_obj(bleio_address_obj_t); + address->base.type = &bleio_address_type; + + common_hal_bleio_address_construct(address, local_address.addr, local_address.addr_type); + return address; +} + +mp_obj_str_t* common_hal_bleio_adapter_get_name(bleio_adapter_obj_t *self) { + uint16_t len = 0; + sd_ble_gap_device_name_get(NULL, &len); + uint8_t buf[len]; + uint32_t err_code = sd_ble_gap_device_name_get(buf, &len); + if (err_code != NRF_SUCCESS) { + return NULL; + } + return mp_obj_new_str((char*) buf, len); +} + +void common_hal_bleio_adapter_set_name(bleio_adapter_obj_t *self, const char* name) { + ble_gap_conn_sec_mode_t sec; + sec.lv = 0; + sec.sm = 0; + sd_ble_gap_device_name_set(&sec, (const uint8_t*) name, strlen(name)); +} + +STATIC bool scan_on_ble_evt(ble_evt_t *ble_evt, void *scan_results_in) { + bleio_scanresults_obj_t *scan_results = (bleio_scanresults_obj_t*)scan_results_in; + + if (ble_evt->header.evt_id == BLE_GAP_EVT_TIMEOUT && + ble_evt->evt.gap_evt.params.timeout.src == BLE_GAP_TIMEOUT_SRC_SCAN) { + shared_module_bleio_scanresults_set_done(scan_results, true); + ble_drv_remove_event_handler(scan_on_ble_evt, scan_results); + return true; + } + + if (ble_evt->header.evt_id != BLE_GAP_EVT_ADV_REPORT) { + return false; + } + ble_gap_evt_adv_report_t *report = &ble_evt->evt.gap_evt.params.adv_report; + + shared_module_bleio_scanresults_append(scan_results, + supervisor_ticks_ms64(), + report->type.connectable, + report->type.scan_response, + report->rssi, + report->peer_addr.addr, + report->peer_addr.addr_type, + report->data.p_data, + report->data.len); + + const uint32_t err_code = sd_ble_gap_scan_start(NULL, scan_results->common_hal_data); + if (err_code != NRF_SUCCESS) { + // TODO: Pass the error into the scan results so it can throw an exception. + scan_results->done = true; + } + return true; +} + +mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active) { + if (self->scan_results != NULL) { + if (!shared_module_bleio_scanresults_get_done(self->scan_results)) { + mp_raise_bleio_BluetoothError(translate("Scan already in progess. Stop with stop_scan.")); + } + self->scan_results = NULL; + } + self->scan_results = shared_module_bleio_new_scanresults(buffer_size, prefixes, prefix_length, minimum_rssi); + size_t max_packet_size = extended ? BLE_GAP_SCAN_BUFFER_EXTENDED_MAX_SUPPORTED : BLE_GAP_SCAN_BUFFER_MAX; + uint8_t *raw_data = m_malloc(sizeof(ble_data_t) + max_packet_size, false); + ble_data_t * sd_data = (ble_data_t *) raw_data; + self->scan_results->common_hal_data = sd_data; + sd_data->len = max_packet_size; + sd_data->p_data = raw_data + sizeof(ble_data_t); + + ble_drv_add_event_handler(scan_on_ble_evt, self->scan_results); + + uint32_t nrf_timeout = SEC_TO_UNITS(timeout, UNIT_10_MS); + if (timeout <= 0.0001) { + nrf_timeout = BLE_GAP_SCAN_TIMEOUT_UNLIMITED; + } + + ble_gap_scan_params_t scan_params = { + .extended = extended, + .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), + .timeout = nrf_timeout, + .window = SEC_TO_UNITS(window, UNIT_0_625_MS), + .scan_phys = BLE_GAP_PHY_1MBPS, + .active = active + }; + uint32_t err_code; + vm_used_ble = true; + err_code = sd_ble_gap_scan_start(&scan_params, sd_data); + + if (err_code != NRF_SUCCESS) { + self->scan_results = NULL; + ble_drv_remove_event_handler(scan_on_ble_evt, self->scan_results); + check_nrf_error(err_code); + } + + return MP_OBJ_FROM_PTR(self->scan_results); +} + +void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self) { + sd_ble_gap_scan_stop(); + shared_module_bleio_scanresults_set_done(self->scan_results, true); + ble_drv_remove_event_handler(scan_on_ble_evt, self->scan_results); + self->scan_results = NULL; +} + +typedef struct { + uint16_t conn_handle; + volatile bool done; +} connect_info_t; + +STATIC bool connect_on_ble_evt(ble_evt_t *ble_evt, void *info_in) { + connect_info_t *info = (connect_info_t*)info_in; + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: + info->conn_handle = ble_evt->evt.gap_evt.conn_handle; + info->done = true; + + break; + + case BLE_GAP_EVT_TIMEOUT: + // Handle will be invalid. + info->done = true; + break; + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled central event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout) { + + ble_gap_addr_t addr; + + addr.addr_type = address->type; + mp_buffer_info_t address_buf_info; + mp_get_buffer_raise(address->bytes, &address_buf_info, MP_BUFFER_READ); + memcpy(addr.addr, (uint8_t *) address_buf_info.buf, NUM_BLEIO_ADDRESS_BYTES); + + ble_gap_scan_params_t scan_params = { + .interval = MSEC_TO_UNITS(100, UNIT_0_625_MS), + .window = MSEC_TO_UNITS(100, UNIT_0_625_MS), + .scan_phys = BLE_GAP_PHY_1MBPS, + // timeout of 0 means no timeout + .timeout = SEC_TO_UNITS(timeout, UNIT_10_MS), + }; + + ble_gap_conn_params_t conn_params = { + .conn_sup_timeout = MSEC_TO_UNITS(4000, UNIT_10_MS), + .min_conn_interval = MSEC_TO_UNITS(15, UNIT_1_25_MS), + .max_conn_interval = MSEC_TO_UNITS(300, UNIT_1_25_MS), + .slave_latency = 0, // number of conn events + }; + + connect_info_t event_info; + ble_drv_add_event_handler(connect_on_ble_evt, &event_info); + event_info.done = false; + + vm_used_ble = true; + uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM); + + if (err_code != NRF_SUCCESS) { + ble_drv_remove_event_handler(connect_on_ble_evt, &event_info); + check_nrf_error(err_code); + } + + while (!event_info.done) { + RUN_BACKGROUND_TASKS; + } + + ble_drv_remove_event_handler(connect_on_ble_evt, &event_info); + + uint16_t conn_handle = event_info.conn_handle; + if (conn_handle == BLE_CONN_HANDLE_INVALID) { + mp_raise_bleio_BluetoothError(translate("Failed to connect: timeout")); + } + + // Negotiate for better PHY, larger MTU and data lengths since we are the central. These are + // nice-to-haves so ignore any errors. + ble_gap_phys_t const phys = { + .rx_phys = BLE_GAP_PHY_AUTO, + .tx_phys = BLE_GAP_PHY_AUTO, + }; + sd_ble_gap_phy_update(conn_handle, &phys); + sd_ble_gattc_exchange_mtu_request(conn_handle, BLE_GATTS_VAR_ATTR_LEN_MAX); + sd_ble_gap_data_length_update(conn_handle, NULL, NULL); + + // Make the connection object and return it. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + if (connection->conn_handle == conn_handle) { + return bleio_connection_new_from_internal(connection); + } + } + + mp_raise_bleio_BluetoothError(translate("Failed to connect: internal error")); + + return mp_const_none; +} + +// The nRF SD 6.1.0 can only do one concurrent advertisement so share the advertising handle. +uint8_t adv_handle = BLE_GAP_ADV_SET_HANDLE_NOT_SET; + +STATIC void check_data_fit(size_t data_len, bool connectable) { + if (data_len > BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_MAX_SUPPORTED || + (connectable && data_len > BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_CONNECTABLE_MAX_SUPPORTED)) { + mp_raise_ValueError(translate("Data too large for advertisement packet")); + } +} + +uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, float interval, uint8_t *advertising_data, uint16_t advertising_data_len, uint8_t *scan_response_data, uint16_t scan_response_data_len) { + if (self->current_advertising_data != NULL && self->current_advertising_data == self->advertising_data) { + return NRF_ERROR_BUSY; + } + + // If the current advertising data isn't owned by the adapter then it must be an internal + // advertisement that we should stop. + if (self->current_advertising_data != NULL) { + common_hal_bleio_adapter_stop_advertising(self); + } + + + bool extended = advertising_data_len > BLE_GAP_ADV_SET_DATA_SIZE_MAX || + scan_response_data_len > BLE_GAP_ADV_SET_DATA_SIZE_MAX; + + uint8_t adv_type; + if (extended) { + if (connectable) { + adv_type = BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED; + } else if (scan_response_data_len > 0) { + adv_type = BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED; + } else { + adv_type = BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED; + } + } else if (connectable) { + adv_type = BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED; + } else if (scan_response_data_len > 0) { + adv_type = BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED; + } else { + adv_type = BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED; + } + + uint32_t err_code; + ble_gap_adv_params_t adv_params = { + .interval = SEC_TO_UNITS(interval, UNIT_0_625_MS), + .properties.type = adv_type, + .duration = BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED, + .filter_policy = BLE_GAP_ADV_FP_ANY, + .primary_phy = BLE_GAP_PHY_1MBPS, + }; + + const ble_gap_adv_data_t ble_gap_adv_data = { + .adv_data.p_data = advertising_data, + .adv_data.len = advertising_data_len, + .scan_rsp_data.p_data = scan_response_data_len > 0 ? scan_response_data : NULL, + .scan_rsp_data.len = scan_response_data_len, + }; + + err_code = sd_ble_gap_adv_set_configure(&adv_handle, &ble_gap_adv_data, &adv_params); + if (err_code != NRF_SUCCESS) { + return err_code; + } + + vm_used_ble = true; + err_code = sd_ble_gap_adv_start(adv_handle, BLE_CONN_CFG_TAG_CUSTOM); + if (err_code != NRF_SUCCESS) { + return err_code; + } + self->current_advertising_data = advertising_data; + return NRF_SUCCESS; +} + + +void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo) { + if (self->current_advertising_data != NULL && self->current_advertising_data == self->advertising_data) { + mp_raise_bleio_BluetoothError(translate("Already advertising.")); + } + // interval value has already been validated. + + check_data_fit(advertising_data_bufinfo->len, connectable); + check_data_fit(scan_response_data_bufinfo->len, connectable); + + if (advertising_data_bufinfo->len > 31 && scan_response_data_bufinfo->len > 0) { + mp_raise_bleio_BluetoothError(translate("Extended advertisements with scan response not supported.")); + } + // The advertising data buffers must not move, because the SoftDevice depends on them. + // So make them long-lived and reuse them onwards. + if (self->advertising_data == NULL) { + self->advertising_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_MAX_SUPPORTED * sizeof(uint8_t), false, true); + } + if (self->scan_response_data == NULL) { + self->scan_response_data = (uint8_t *) gc_alloc(BLE_GAP_ADV_SET_DATA_SIZE_EXTENDED_MAX_SUPPORTED * sizeof(uint8_t), false, true); + } + + memcpy(self->advertising_data, advertising_data_bufinfo->buf, advertising_data_bufinfo->len); + memcpy(self->scan_response_data, scan_response_data_bufinfo->buf, scan_response_data_bufinfo->len); + + check_nrf_error(_common_hal_bleio_adapter_start_advertising(self, connectable, interval, + self->advertising_data, + advertising_data_bufinfo->len, + self->scan_response_data, + scan_response_data_bufinfo->len)); +} + +void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self) { + if (adv_handle == BLE_GAP_ADV_SET_HANDLE_NOT_SET) + return; + + // TODO: Don't actually stop. Switch to advertising CircuitPython if we don't already have a connection. + const uint32_t err_code = sd_ble_gap_adv_stop(adv_handle); + self->current_advertising_data = NULL; + + if ((err_code != NRF_SUCCESS) && (err_code != NRF_ERROR_INVALID_STATE)) { + check_nrf_error(err_code); + } +} + +bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self) { + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + return true; + } + } + return false; +} + +mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self) { + if (self->connection_objs != NULL) { + return self->connection_objs; + } + size_t total_connected = 0; + mp_obj_t items[BLEIO_TOTAL_CONNECTION_COUNT]; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + if (connection->connection_obj == mp_const_none) { + connection->connection_obj = bleio_connection_new_from_internal(connection); + } + items[total_connected] = connection->connection_obj; + total_connected++; + } + } + self->connection_objs = mp_obj_new_tuple(total_connected, items); + return self->connection_objs; +} + +void common_hal_bleio_adapter_erase_bonding(bleio_adapter_obj_t *self) { + bonding_erase_storage(); +} + +void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter) { + gc_collect_root((void**)adapter, sizeof(bleio_adapter_obj_t) / sizeof(size_t)); + gc_collect_root((void**)bleio_connections, sizeof(bleio_connections) / sizeof(size_t)); +} + +void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { + common_hal_bleio_adapter_stop_scan(adapter); + if (adapter->current_advertising_data != NULL) { + common_hal_bleio_adapter_stop_advertising(adapter); + } + + adapter->connection_objs = NULL; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + // Disconnect all connections with Python state cleanly. Keep any supervisor-only connections. + if (connection->connection_obj != mp_const_none && + connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + common_hal_bleio_connection_disconnect(connection); + } + connection->connection_obj = mp_const_none; + } +} diff --git a/ports/nrf/common-hal/_bleio/Adapter.h b/ports/nrf/common-hal/_bleio/Adapter.h new file mode 100644 index 0000000000000..90c88dcbe698c --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Adapter.h @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ADAPTER_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ADAPTER_H + +#include "py/obj.h" +#include "py/objtuple.h" + +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/ScanResults.h" + +#define BLEIO_TOTAL_CONNECTION_COUNT 5 + +extern bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT]; + +typedef struct { + mp_obj_base_t base; + uint8_t* advertising_data; + uint8_t* scan_response_data; + uint8_t* current_advertising_data; + bleio_scanresults_obj_t* scan_results; + mp_obj_t name; + mp_obj_tuple_t *connection_objs; + ble_drv_evt_handler_entry_t handler_entry; +} bleio_adapter_obj_t; + +void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter); +void bleio_adapter_reset(bleio_adapter_obj_t* adapter); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ADAPTER_H diff --git a/ports/nrf/common-hal/_bleio/Attribute.c b/ports/nrf/common-hal/_bleio/Attribute.c new file mode 100644 index 0000000000000..c55914b10d6d7 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Attribute.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_bleio/Attribute.h" + +// Convert a _bleio security mode to a ble_gap_conn_sec_mode_t setting. +void bleio_attribute_gatts_set_security_mode(ble_gap_conn_sec_mode_t *perm, bleio_attribute_security_mode_t security_mode) { + switch (security_mode) { + case SECURITY_MODE_NO_ACCESS: + BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(perm); + break; + + case SECURITY_MODE_OPEN: + BLE_GAP_CONN_SEC_MODE_SET_OPEN(perm); + break; + + case SECURITY_MODE_ENC_NO_MITM: + BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(perm); + break; + + case SECURITY_MODE_ENC_WITH_MITM: + BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(perm); + break; + + case SECURITY_MODE_LESC_ENC_WITH_MITM: + BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(perm); + break; + + case SECURITY_MODE_SIGNED_NO_MITM: + BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(perm); + break; + + case SECURITY_MODE_SIGNED_WITH_MITM: + BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(perm); + break; + } +} diff --git a/ports/nrf/common-hal/_bleio/Attribute.h b/ports/nrf/common-hal/_bleio/Attribute.h new file mode 100644 index 0000000000000..8cc361046ed6b --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Attribute.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ATTRIBUTE_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ATTRIBUTE_H + +#include "shared-module/_bleio/Attribute.h" + +extern void bleio_attribute_gatts_set_security_mode(ble_gap_conn_sec_mode_t *perm, bleio_attribute_security_mode_t security_mode); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_ATTRIBUTE_H diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c new file mode 100644 index 0000000000000..e311aceb97327 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -0,0 +1,264 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/Service.h" + +#include "common-hal/_bleio/Adapter.h" +#include "common-hal/_bleio/bonding.h" + +STATIC uint16_t characteristic_get_cccd(uint16_t cccd_handle, uint16_t conn_handle) { + uint16_t cccd; + ble_gatts_value_t value = { + .p_value = (uint8_t*) &cccd, + .len = 2, + }; + + const uint32_t err_code = sd_ble_gatts_value_get(conn_handle, cccd_handle, &value); + + if (err_code == BLE_ERROR_GATTS_SYS_ATTR_MISSING) { + // CCCD is not set, so say that neither Notify nor Indicate is enabled. + cccd = 0; + } else { + check_nrf_error(err_code); + } + + return cccd; +} + + +STATIC void characteristic_gatts_notify_indicate(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, uint16_t hvx_type) { + uint16_t hvx_len = bufinfo->len; + + ble_gatts_hvx_params_t hvx_params = { + .handle = handle, + .type = hvx_type, + .offset = 0, + .p_len = &hvx_len, + .p_data = bufinfo->buf, + }; + + while (1) { + const uint32_t err_code = sd_ble_gatts_hvx(conn_handle, &hvx_params); + if (err_code == NRF_SUCCESS) { + break; + } + // TX buffer is full + // We could wait for an event indicating the write is complete, but just retrying is easier. + if (err_code == NRF_ERROR_RESOURCES) { + RUN_BACKGROUND_TASKS; + continue; + } + + // Some real error has occurred. + check_nrf_error(err_code); + } +} + +void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { + self->service = service; + self->uuid = uuid; + self->handle = BLE_GATT_HANDLE_INVALID; + self->props = props; + self->read_perm = read_perm; + self->write_perm = write_perm; + self->descriptor_list = NULL; + + const mp_int_t max_length_max = fixed_length ? BLE_GATTS_FIX_ATTR_LEN_MAX : BLE_GATTS_VAR_ATTR_LEN_MAX; + if (max_length < 0 || max_length > max_length_max) { + mp_raise_ValueError_varg(translate("max_length must be 0-%d when fixed_length is %s"), + max_length_max, fixed_length ? "True" : "False"); + } + self->max_length = max_length; + self->fixed_length = fixed_length; + + if (service->is_remote) { + self->handle = handle; + } else { + common_hal_bleio_service_add_characteristic(self->service, self, initial_value_bufinfo); + } + + if (initial_value_bufinfo != NULL) { + common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); + } +} + +bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { + return self->descriptor_list; +} + +bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_characteristic_obj_t *self) { + return self->service; +} + +size_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self, uint8_t* buf, size_t len) { + // Do GATT operations only if this characteristic has been added to a registered service. + if (self->handle != BLE_GATT_HANDLE_INVALID) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); + if (common_hal_bleio_service_get_is_remote(self->service)) { + // self->value is set by evt handler. + return common_hal_bleio_gattc_read(self->handle, conn_handle, buf, len); + } else { + return common_hal_bleio_gatts_read(self->handle, conn_handle, buf, len); + } + } + + return 0; +} + +void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, mp_buffer_info_t *bufinfo) { + if (self->fixed_length && bufinfo->len != self->max_length) { + mp_raise_ValueError(translate("Value length != required fixed length")); + } + if (bufinfo->len > self->max_length) { + mp_raise_ValueError(translate("Value length > max_length")); + } + + // Do GATT operations only if this characteristic has been added to a registered service. + if (self->handle != BLE_GATT_HANDLE_INVALID) { + + if (common_hal_bleio_service_get_is_remote(self->service)) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); + // Last argument is true if write-no-reponse desired. + common_hal_bleio_gattc_write(self->handle, conn_handle, bufinfo, + (self->props & CHAR_PROP_WRITE_NO_RESPONSE)); + } else { + // Always write the value locally even if no connections are active. + common_hal_bleio_gatts_write(self->handle, BLE_CONN_HANDLE_INVALID, bufinfo); + // Check to see if we need to notify or indicate any active connections. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + uint16_t conn_handle = connection->conn_handle; + if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { + continue; + } + + uint16_t cccd = 0; + + const bool notify = self->props & CHAR_PROP_NOTIFY; + const bool indicate = self->props & CHAR_PROP_INDICATE; + if (notify | indicate) { + cccd = characteristic_get_cccd(self->cccd_handle, conn_handle); + } + + // It's possible that both notify and indicate are set. + if (notify && (cccd & BLE_GATT_HVX_NOTIFICATION)) { + characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_NOTIFICATION); + } + if (indicate && (cccd & BLE_GATT_HVX_INDICATION)) { + characteristic_gatts_notify_indicate(self->handle, conn_handle, bufinfo, BLE_GATT_HVX_INDICATION); + } + } + } + } +} + +bleio_uuid_obj_t *common_hal_bleio_characteristic_get_uuid(bleio_characteristic_obj_t *self) { + return self->uuid; +} + +bleio_characteristic_properties_t common_hal_bleio_characteristic_get_properties(bleio_characteristic_obj_t *self) { + return self->props; +} + +void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t *self, bleio_descriptor_obj_t *descriptor) { + ble_uuid_t desc_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(descriptor->uuid, &desc_uuid); + + ble_gatts_attr_md_t desc_attr_md = { + // Data passed is not in a permanent location and should be copied. + .vloc = BLE_GATTS_VLOC_STACK, + .vlen = !descriptor->fixed_length, + }; + + bleio_attribute_gatts_set_security_mode(&desc_attr_md.read_perm, descriptor->read_perm); + bleio_attribute_gatts_set_security_mode(&desc_attr_md.write_perm, descriptor->write_perm); + + mp_buffer_info_t desc_value_bufinfo; + mp_get_buffer_raise(descriptor->value, &desc_value_bufinfo, MP_BUFFER_READ); + + ble_gatts_attr_t desc_attr = { + .p_uuid = &desc_uuid, + .p_attr_md = &desc_attr_md, + .init_len = desc_value_bufinfo.len, + .p_value = desc_value_bufinfo.buf, + .init_offs = 0, + .max_len = descriptor->max_length, + }; + + check_nrf_error(sd_ble_gatts_descriptor_add(self->handle, &desc_attr, &descriptor->handle)); + + descriptor->next = self->descriptor_list; + self->descriptor_list = descriptor; +} + +void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate) { + if (self->cccd_handle == BLE_GATT_HANDLE_INVALID) { + mp_raise_bleio_BluetoothError(translate("No CCCD for this Characteristic")); + } + + if (!common_hal_bleio_service_get_is_remote(self->service)) { + mp_raise_bleio_RoleError(translate("Can't set CCCD on local Characteristic")); + } + + const uint16_t conn_handle = bleio_connection_get_conn_handle(self->service->connection); + common_hal_bleio_check_connected(conn_handle); + + uint16_t cccd_value = + (notify ? BLE_GATT_HVX_NOTIFICATION : 0) | + (indicate ? BLE_GATT_HVX_INDICATION : 0); + + ble_gattc_write_params_t write_params = { + .write_op = BLE_GATT_OP_WRITE_REQ, + .handle = self->cccd_handle, + .p_value = (uint8_t *) &cccd_value, + .len = 2, + }; + + while (1) { + uint32_t err_code = sd_ble_gattc_write(conn_handle, &write_params); + if (err_code == NRF_SUCCESS) { + break; + } + + // Write with response will return NRF_ERROR_BUSY if the response has not been received. + // Write without reponse will return NRF_ERROR_RESOURCES if too many writes are pending. + if (err_code == NRF_ERROR_BUSY || err_code == NRF_ERROR_RESOURCES) { + // We could wait for an event indicating the write is complete, but just retrying is easier. + RUN_BACKGROUND_TASKS; + continue; + } + + // Some real error occurred. + check_nrf_error(err_code); + } + +} diff --git a/ports/nrf/common-hal/_bleio/Characteristic.h b/ports/nrf/common-hal/_bleio/Characteristic.h new file mode 100644 index 0000000000000..bb8f28495e220 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Characteristic.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTIC_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTIC_H + +#include "shared-bindings/_bleio/Attribute.h" +#include "common-hal/_bleio/Descriptor.h" +#include "shared-module/_bleio/Characteristic.h" +#include "common-hal/_bleio/Service.h" +#include "common-hal/_bleio/UUID.h" + +typedef struct _bleio_characteristic_obj { + mp_obj_base_t base; + // Will be MP_OBJ_NULL before being assigned to a Service. + bleio_service_obj_t *service; + bleio_uuid_obj_t *uuid; + mp_obj_t value; + uint16_t max_length; + bool fixed_length; + uint16_t handle; + bleio_characteristic_properties_t props; + bleio_attribute_security_mode_t read_perm; + bleio_attribute_security_mode_t write_perm; + bleio_descriptor_obj_t *descriptor_list; + uint16_t user_desc_handle; + uint16_t cccd_handle; + uint16_t sccd_handle; +} bleio_characteristic_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTIC_H diff --git a/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c new file mode 100644 index 0000000000000..9f9b453de4d36 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.c @@ -0,0 +1,162 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "ble_drv.h" +#include "ble_gatts.h" +#include "nrf_nvic.h" + +#include "lib/utils/interrupt_char.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "tick.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Connection.h" +#include "supervisor/shared/tick.h" +#include "common-hal/_bleio/CharacteristicBuffer.h" + +STATIC void write_to_ringbuf(bleio_characteristic_buffer_obj_t *self, uint8_t *data, uint16_t len) { + // Push all the data onto the ring buffer. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + for (size_t i = 0; i < len; i++) { + ringbuf_put(&self->ringbuf, data[i]); + } + sd_nvic_critical_region_exit(is_nested_critical_region); +} + +STATIC bool characteristic_buffer_on_ble_evt(ble_evt_t *ble_evt, void *param) { + bleio_characteristic_buffer_obj_t *self = (bleio_characteristic_buffer_obj_t *) param; + switch (ble_evt->header.evt_id) { + case BLE_GATTS_EVT_WRITE: { + // A client wrote to this server characteristic. + + ble_gatts_evt_write_t *evt_write = &ble_evt->evt.gatts_evt.params.write; + // Event handle must match the handle for my characteristic. + if (evt_write->handle == self->characteristic->handle) { + write_to_ringbuf(self, evt_write->data, evt_write->len); + } + break; + } + + case BLE_GATTC_EVT_HVX: { + // A remote service wrote to this characteristic. + + ble_gattc_evt_hvx_t* evt_hvx = &ble_evt->evt.gattc_evt.params.hvx; + // Must be a notification, and event handle must match the handle for my characteristic. + if (evt_hvx->type == BLE_GATT_HVX_NOTIFICATION && + evt_hvx->handle == self->characteristic->handle) { + write_to_ringbuf(self, evt_hvx->data, evt_hvx->len); + } + break; + } + default: + return false; + break; + } + return true; +} + +// Assumes that timeout and buffer_size have been validated before call. +void common_hal_bleio_characteristic_buffer_construct(bleio_characteristic_buffer_obj_t *self, + bleio_characteristic_obj_t *characteristic, + mp_float_t timeout, + size_t buffer_size) { + + self->characteristic = characteristic; + self->timeout_ms = timeout * 1000; + // This is a macro. + // true means long-lived, so it won't be moved. + ringbuf_alloc(&self->ringbuf, buffer_size, true); + + ble_drv_add_event_handler(characteristic_buffer_on_ble_evt, self); + +} + +int common_hal_bleio_characteristic_buffer_read(bleio_characteristic_buffer_obj_t *self, uint8_t *data, size_t len, int *errcode) { + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout + while ( (ringbuf_count(&self->ringbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if ( mp_hal_is_interrupted() ) { + return 0; + } + } + + // Copy received data. Lock out write interrupt handler while copying. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + + size_t rx_bytes = MIN(ringbuf_count(&self->ringbuf), len); + for ( size_t i = 0; i < rx_bytes; i++ ) { + data[i] = ringbuf_get(&self->ringbuf); + } + + // Writes now OK. + sd_nvic_critical_region_exit(is_nested_critical_region); + + return rx_bytes; +} + +uint32_t common_hal_bleio_characteristic_buffer_rx_characters_available(bleio_characteristic_buffer_obj_t *self) { + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + uint16_t count = ringbuf_count(&self->ringbuf); + sd_nvic_critical_region_exit(is_nested_critical_region); + return count; +} + +void common_hal_bleio_characteristic_buffer_clear_rx_buffer(bleio_characteristic_buffer_obj_t *self) { + // prevent conflict with uart irq + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + ringbuf_clear(&self->ringbuf); + sd_nvic_critical_region_exit(is_nested_critical_region); +} + +bool common_hal_bleio_characteristic_buffer_deinited(bleio_characteristic_buffer_obj_t *self) { + return self->characteristic == NULL; +} + +void common_hal_bleio_characteristic_buffer_deinit(bleio_characteristic_buffer_obj_t *self) { + if (!common_hal_bleio_characteristic_buffer_deinited(self)) { + ble_drv_remove_event_handler(characteristic_buffer_on_ble_evt, self); + } +} + +bool common_hal_bleio_characteristic_buffer_connected(bleio_characteristic_buffer_obj_t *self) { + return self->characteristic != NULL && + self->characteristic->service != NULL && + (!self->characteristic->service->is_remote || + (self->characteristic->service->connection != MP_OBJ_NULL && + common_hal_bleio_connection_get_connected(self->characteristic->service->connection))); +} diff --git a/ports/nrf/common-hal/_bleio/CharacteristicBuffer.h b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.h new file mode 100644 index 0000000000000..f0949251cd24a --- /dev/null +++ b/ports/nrf/common-hal/_bleio/CharacteristicBuffer.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTICBUFFER_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTICBUFFER_H + +#include "nrf_soc.h" + +#include "py/ringbuf.h" +#include "shared-bindings/_bleio/Characteristic.h" + +typedef struct { + mp_obj_base_t base; + bleio_characteristic_obj_t *characteristic; + uint32_t timeout_ms; + // Ring buffer storing consecutive incoming values. + ringbuf_t ringbuf; +} bleio_characteristic_buffer_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CHARACTERISTICBUFFER_H diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c new file mode 100644 index 0000000000000..d4c7308fd13df --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -0,0 +1,754 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_bleio/Connection.h" + +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "ble_hci.h" +#include "nrf_soc.h" +#include "lib/utils/interrupt_char.h" +#include "py/gc.h" +#include "py/objlist.h" +#include "py/objstr.h" +#include "py/qstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" +#include "supervisor/shared/tick.h" + +#include "common-hal/_bleio/bonding.h" + +#define BLE_ADV_LENGTH_FIELD_SIZE 1 +#define BLE_ADV_AD_TYPE_FIELD_SIZE 1 +#define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 + +static const ble_gap_sec_params_t pairing_sec_params = { + .bond = 1, + .mitm = 0, + .lesc = 0, + .keypress = 0, + .oob = 0, + .io_caps = BLE_GAP_IO_CAPS_NONE, + .min_key_size = 7, + .max_key_size = 16, + .kdist_own = { .enc = 1, .id = 1}, + .kdist_peer = { .enc = 1, .id = 1}, +}; + +#define CONNECTION_DEBUG (1) +#if CONNECTION_DEBUG + #define CONNECTION_DEBUG_PRINTF(...) printf(__VA_ARGS__) +#else + #define CONNECTION_DEBUG_PRINTF(...) +#endif + +static volatile bool m_discovery_in_process; +static volatile bool m_discovery_successful; + +static bleio_service_obj_t *m_char_discovery_service; +static bleio_characteristic_obj_t *m_desc_discovery_characteristic; + +bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { + bleio_connection_internal_t *self = (bleio_connection_internal_t*)self_in; + + if (BLE_GAP_EVT_BASE <= ble_evt->header.evt_id && ble_evt->header.evt_id <= BLE_GAP_EVT_LAST && + ble_evt->evt.gap_evt.conn_handle != self->conn_handle) { + return false; + } + if (BLE_GATTS_EVT_BASE <= ble_evt->header.evt_id && ble_evt->header.evt_id <= BLE_GATTS_EVT_LAST && + ble_evt->evt.gatts_evt.conn_handle != self->conn_handle) { + return false; + } + + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_DISCONNECTED: + // Adapter.c does the work for this event. + break; + + case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { + ble_gap_phys_t const phys = { + .rx_phys = BLE_GAP_PHY_AUTO, + .tx_phys = BLE_GAP_PHY_AUTO, + }; + sd_ble_gap_phy_update(ble_evt->evt.gap_evt.conn_handle, &phys); + break; + } + + case BLE_GAP_EVT_PHY_UPDATE: { // 0x22 + break; + } + + case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST: + // SoftDevice will respond to a length update request. + sd_ble_gap_data_length_update(self->conn_handle, NULL, NULL); + break; + + case BLE_GAP_EVT_DATA_LENGTH_UPDATE: { // 0x24 + break; + } + + case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST: { + ble_gatts_evt_exchange_mtu_request_t *request = + &ble_evt->evt.gatts_evt.params.exchange_mtu_request; + + uint16_t new_mtu = BLE_GATTS_VAR_ATTR_LEN_MAX; + if (request->client_rx_mtu < new_mtu) { + new_mtu = request->client_rx_mtu; + } + if (new_mtu < BLE_GATT_ATT_MTU_DEFAULT) { + new_mtu = BLE_GATT_ATT_MTU_DEFAULT; + } + if (self->mtu > 0) { + new_mtu = self->mtu; + } + + self->mtu = new_mtu; + sd_ble_gatts_exchange_mtu_reply(self->conn_handle, new_mtu); + break; + } + + + case BLE_GATTC_EVT_EXCHANGE_MTU_RSP: { + ble_gattc_evt_exchange_mtu_rsp_t *response = + &ble_evt->evt.gattc_evt.params.exchange_mtu_rsp; + + self->mtu = response->server_rx_mtu; + break; + } + + case BLE_GATTS_EVT_WRITE: + // A client wrote a value. + // If we are bonded and it's a CCCD (UUID 0x2902), store the CCCD value. + if (self->conn_handle != BLE_CONN_HANDLE_INVALID && + self->pair_status == PAIR_PAIRED && + ble_evt->evt.gatts_evt.params.write.uuid.type == BLE_UUID_TYPE_BLE && + ble_evt->evt.gatts_evt.params.write.uuid.uuid == 0x2902) { + // + // Save sys_attr data (CCCD state) in bonding area at + // next opportunity, but also remember time of this + // request, so we can consolidate closely-spaced requests. + self->do_bond_cccds = true; + self->do_bond_cccds_request_time = supervisor_ticks_ms64(); + } + // Return false so other handlers get this event as well. + return false; + + case BLE_GATTS_EVT_SYS_ATTR_MISSING: + sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); + break; + + #if CIRCUITPY_VERBOSE_BLE + // Use read authorization to snoop on all reads when doing verbose debugging. + case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST: { + + ble_gatts_evt_rw_authorize_request_t *request = + &ble_evt->evt.gatts_evt.params.authorize_request; + + mp_printf(&mp_plat_print, "Read %x offset %d ", request->request.read.handle, request->request.read.offset); + uint8_t value_bytes[22]; + ble_gatts_value_t value; + value.offset = request->request.read.offset; + value.len = 22; + value.p_value = value_bytes; + + sd_ble_gatts_value_get(self->conn_handle, request->request.read.handle, &value); + size_t len = value.len; + if (len > 22) { + len = 22; + } + for (uint8_t i = 0; i < len; i++) { + mp_printf(&mp_plat_print, " %02x", value_bytes[i]); + } + mp_printf(&mp_plat_print, "\n"); + ble_gatts_rw_authorize_reply_params_t reply; + reply.type = request->type; + reply.params.read.gatt_status = BLE_GATT_STATUS_SUCCESS; + reply.params.read.update = false; + reply.params.read.offset = request->request.read.offset; + sd_ble_gatts_rw_authorize_reply(self->conn_handle, &reply); + break; + } + #endif + + case BLE_GATTS_EVT_HVN_TX_COMPLETE: // Capture this for now. 0x55 + break; + case BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST: { + self->conn_params_updating = true; + ble_gap_evt_conn_param_update_request_t *request = + &ble_evt->evt.gap_evt.params.conn_param_update_request; + sd_ble_gap_conn_param_update(self->conn_handle, &request->conn_params); + break; + } + case BLE_GAP_EVT_CONN_PARAM_UPDATE: { // 0x12 + ble_gap_evt_conn_param_update_t *result = + &ble_evt->evt.gap_evt.params.conn_param_update; + + #if CIRCUITPY_VERBOSE_BLE + ble_gap_conn_params_t *cp = &ble_evt->evt.gap_evt.params.conn_param_update.conn_params; + mp_printf(&mp_plat_print, "conn params updated: min_ci %d max_ci %d s_l %d sup_timeout %d\n", cp->min_conn_interval, cp->max_conn_interval, cp->slave_latency, cp->conn_sup_timeout); + #endif + + memcpy(&self->conn_params, &result->conn_params, sizeof(ble_gap_conn_params_t)); + self->conn_params_updating = false; + break; + } + case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { + // First time pairing. + // 1. Either we or peer initiate the process + // 2. Peer asks for security parameters using BLE_GAP_EVT_SEC_PARAMS_REQUEST. + // 3. Pair Key exchange ("just works" implemented now; TODO: out-of-band key pairing) + // 4. Connection is secured: BLE_GAP_EVT_CONN_SEC_UPDATE + // 5. Long-term Keys exchanged: BLE_GAP_EVT_AUTH_STATUS + + bonding_clear_keys(&self->bonding_keys); + self->ediv = EDIV_INVALID; + ble_gap_sec_keyset_t keyset = { + .keys_own = { + .p_enc_key = &self->bonding_keys.own_enc, + .p_id_key = NULL, + .p_sign_key = NULL, + .p_pk = NULL + }, + + .keys_peer = { + .p_enc_key = &self->bonding_keys.peer_enc, + .p_id_key = &self->bonding_keys.peer_id, + .p_sign_key = NULL, + .p_pk = NULL + } + }; + + sd_ble_gap_sec_params_reply(self->conn_handle, BLE_GAP_SEC_STATUS_SUCCESS, + self->is_central ? NULL : &pairing_sec_params, + &keyset); + break; + } + + case BLE_GAP_EVT_LESC_DHKEY_REQUEST: + // TODO for LESC pairing: + // sd_ble_gap_lesc_dhkey_reply(...); + break; + + case BLE_GAP_EVT_AUTH_STATUS: { // 0x19 + // Key exchange completed. + ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; + self->sec_status = status->auth_status; + if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { + self->ediv = self->bonding_keys.own_enc.master_id.ediv; + self->pair_status = PAIR_PAIRED; + // Save keys in bonding area at next opportunity. + self->do_bond_keys = true; + } else { + // Inform busy-waiter pairing has failed. + self->pair_status = PAIR_NOT_PAIRED; + } + break; + } + + case BLE_GAP_EVT_SEC_INFO_REQUEST: { // 0x14 + // Peer asks for the stored keys. + // - load key and return if bonded previously. + // - Else return NULL --> Initiate key exchange + ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; + (void) sec_info_request; + if ( bonding_load_keys(self->is_central, sec_info_request->master_id.ediv, &self->bonding_keys) ) { + sd_ble_gap_sec_info_reply( + self->conn_handle, + &self->bonding_keys.own_enc.enc_info, + &self->bonding_keys.peer_id.id_info, + NULL); + self->ediv = self->bonding_keys.own_enc.master_id.ediv; + } else { + // We don't have stored keys. Ask for keys. + sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); + } + break; + } + + case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a + // We get this both on first-time pairing and on subsequent pairings using stored keys. + ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; + if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { + // Security setup did not succeed: + // mode 0, level 0 means no access + // mode 1, level 1 means open link + // mode >=1 and/or level >=1 means encryption is set up + self->pair_status = PAIR_NOT_PAIRED; + } else { + if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv)) { + // Did an sd_ble_gatts_sys_attr_set() with the stored sys_attr values. + } else { + // No matching bonding found, so use fresh system attributes. + sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); + } + self->pair_status = PAIR_PAIRED; + } + break; + } + + default: + return false; + } + return true; +} + +void bleio_connection_clear(bleio_connection_internal_t *self) { + self->remote_service_list = NULL; + + self->conn_handle = BLE_CONN_HANDLE_INVALID; + self->pair_status = PAIR_NOT_PAIRED; + bonding_clear_keys(&self->bonding_keys); +} + +bool common_hal_bleio_connection_get_paired(bleio_connection_obj_t *self) { + if (self->connection == NULL) { + return false; + } + return self->connection->pair_status == PAIR_PAIRED; +} + +bool common_hal_bleio_connection_get_connected(bleio_connection_obj_t *self) { + if (self->connection == NULL) { + return false; + } + return self->connection->conn_handle != BLE_CONN_HANDLE_INVALID; +} + +void common_hal_bleio_connection_disconnect(bleio_connection_internal_t *self) { + sd_ble_gap_disconnect(self->conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); +} + +void common_hal_bleio_connection_pair(bleio_connection_internal_t *self, bool bond) { + self->pair_status = PAIR_WAITING; + + check_nrf_error(sd_ble_gap_authenticate(self->conn_handle, &pairing_sec_params)); + + while (self->pair_status == PAIR_WAITING && !mp_hal_is_interrupted()) { + RUN_BACKGROUND_TASKS; + } + if (mp_hal_is_interrupted()) { + return; + } + check_sec_status(self->sec_status); +} + +mp_float_t common_hal_bleio_connection_get_connection_interval(bleio_connection_internal_t *self) { + while (self->conn_params_updating && !mp_hal_is_interrupted()) { + RUN_BACKGROUND_TASKS; + } + return 1.25f * self->conn_params.min_conn_interval; +} + +void common_hal_bleio_connection_set_connection_interval(bleio_connection_internal_t *self, mp_float_t new_interval) { + self->conn_params_updating = true; + uint16_t interval = new_interval / 1.25f; + self->conn_params.min_conn_interval = interval; + self->conn_params.max_conn_interval = interval; + uint32_t status = NRF_ERROR_BUSY; + while (status == NRF_ERROR_BUSY) { + status = sd_ble_gap_conn_param_update(self->conn_handle, &self->conn_params); + RUN_BACKGROUND_TASKS; + } + check_nrf_error(status); +} + +// service_uuid may be NULL, to discover all services. +STATIC bool discover_next_services(bleio_connection_internal_t* connection, uint16_t start_handle, ble_uuid_t *service_uuid) { + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t nrf_err = NRF_ERROR_BUSY; + while (nrf_err == NRF_ERROR_BUSY) { + nrf_err = sd_ble_gattc_primary_services_discover(connection->conn_handle, start_handle, service_uuid); + } + check_nrf_error(nrf_err); + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC bool discover_next_characteristics(bleio_connection_internal_t* connection, bleio_service_obj_t *service, uint16_t start_handle) { + m_char_discovery_service = service; + + ble_gattc_handle_range_t handle_range; + handle_range.start_handle = start_handle; + handle_range.end_handle = service->end_handle; + + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t err_code = sd_ble_gattc_characteristics_discover(connection->conn_handle, &handle_range); + if (err_code != NRF_SUCCESS) { + return false; + } + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC bool discover_next_descriptors(bleio_connection_internal_t* connection, bleio_characteristic_obj_t *characteristic, uint16_t start_handle, uint16_t end_handle) { + m_desc_discovery_characteristic = characteristic; + + ble_gattc_handle_range_t handle_range; + handle_range.start_handle = start_handle; + handle_range.end_handle = end_handle; + + m_discovery_successful = false; + m_discovery_in_process = true; + + uint32_t err_code = sd_ble_gattc_descriptors_discover(connection->conn_handle, &handle_range); + if (err_code != NRF_SUCCESS) { + return false; + } + + // Wait for a discovery event. + while (m_discovery_in_process) { + MICROPY_VM_HOOK_LOOP; + } + return m_discovery_successful; +} + +STATIC void on_primary_srv_discovery_rsp(ble_gattc_evt_prim_srvc_disc_rsp_t *response, bleio_connection_internal_t* connection) { + bleio_service_obj_t* tail = connection->remote_service_list; + + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_service_t *gattc_service = &response->services[i]; + + bleio_service_obj_t *service = m_new_obj(bleio_service_obj_t); + service->base.type = &bleio_service_type; + + // Initialize several fields at once. + bleio_service_from_connection(service, bleio_connection_new_from_internal(connection)); + + service->is_remote = true; + service->start_handle = gattc_service->handle_range.start_handle; + service->end_handle = gattc_service->handle_range.end_handle; + service->handle = gattc_service->handle_range.start_handle; + + if (gattc_service->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known service UUID. + bleio_uuid_obj_t *uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_service->uuid); + service->uuid = uuid; + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just set the UUID to NULL. + service->uuid = NULL; + } + + service->next = tail; + tail = service; + } + + connection->remote_service_list = tail; + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC void on_char_discovery_rsp(ble_gattc_evt_char_disc_rsp_t *response, bleio_connection_internal_t* connection) { + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_char_t *gattc_char = &response->chars[i]; + + bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); + characteristic->base.type = &bleio_characteristic_type; + + bleio_uuid_obj_t *uuid = NULL; + + if (gattc_char->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known characteristic UUID. + uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_char->uuid); + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just leave the UUID as NULL. + } + + bleio_characteristic_properties_t props = + (gattc_char->char_props.broadcast ? CHAR_PROP_BROADCAST : 0) | + (gattc_char->char_props.indicate ? CHAR_PROP_INDICATE : 0) | + (gattc_char->char_props.notify ? CHAR_PROP_NOTIFY : 0) | + (gattc_char->char_props.read ? CHAR_PROP_READ : 0) | + (gattc_char->char_props.write ? CHAR_PROP_WRITE : 0) | + (gattc_char->char_props.write_wo_resp ? CHAR_PROP_WRITE_NO_RESPONSE : 0); + + // Call common_hal_bleio_characteristic_construct() to initalize some fields and set up evt handler. + common_hal_bleio_characteristic_construct( + characteristic, m_char_discovery_service, gattc_char->handle_value, uuid, + props, SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, + GATT_MAX_DATA_LENGTH, false, // max_length, fixed_length: values may not matter for gattc + NULL); + + mp_obj_list_append(m_char_discovery_service->characteristic_list, MP_OBJ_FROM_PTR(characteristic)); + } + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC void on_desc_discovery_rsp(ble_gattc_evt_desc_disc_rsp_t *response, bleio_connection_internal_t* connection) { + for (size_t i = 0; i < response->count; ++i) { + ble_gattc_desc_t *gattc_desc = &response->descs[i]; + + // Remember handles for certain well-known descriptors. + switch (gattc_desc->uuid.uuid) { + case BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG: + m_desc_discovery_characteristic->cccd_handle = gattc_desc->handle; + break; + + case BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG: + m_desc_discovery_characteristic->sccd_handle = gattc_desc->handle; + break; + + case BLE_UUID_DESCRIPTOR_CHAR_USER_DESC: + m_desc_discovery_characteristic->user_desc_handle = gattc_desc->handle; + break; + + default: + // TODO: sd_ble_gattc_descriptors_discover() can return things that are not descriptors, + // so ignore those. + // https://devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors + break; + } + + bleio_descriptor_obj_t *descriptor = m_new_obj(bleio_descriptor_obj_t); + descriptor->base.type = &bleio_descriptor_type; + + bleio_uuid_obj_t *uuid = NULL; + + if (gattc_desc->uuid.type != BLE_UUID_TYPE_UNKNOWN) { + // Known descriptor UUID. + uuid = m_new_obj(bleio_uuid_obj_t); + uuid->base.type = &bleio_uuid_type; + bleio_uuid_construct_from_nrf_ble_uuid(uuid, &gattc_desc->uuid); + } else { + // The discovery response contained a 128-bit UUID that has not yet been registered with the + // softdevice via sd_ble_uuid_vs_add(). We need to fetch the 128-bit value and register it. + // For now, just leave the UUID as NULL. + } + + common_hal_bleio_descriptor_construct( + descriptor, m_desc_discovery_characteristic, uuid, + SECURITY_MODE_OPEN, SECURITY_MODE_OPEN, + GATT_MAX_DATA_LENGTH, false, mp_const_empty_bytes); + descriptor->handle = gattc_desc->handle; + + mp_obj_list_append(m_desc_discovery_characteristic->descriptor_list, MP_OBJ_FROM_PTR(descriptor)); + } + + if (response->count > 0) { + m_discovery_successful = true; + } + m_discovery_in_process = false; +} + +STATIC bool discovery_on_ble_evt(ble_evt_t *ble_evt, mp_obj_t payload) { + bleio_connection_internal_t* connection = MP_OBJ_TO_PTR(payload); + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_DISCONNECTED: + m_discovery_successful = false; + m_discovery_in_process = false; + break; + + case BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP: + on_primary_srv_discovery_rsp(&ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp, connection); + break; + + case BLE_GATTC_EVT_CHAR_DISC_RSP: + on_char_discovery_rsp(&ble_evt->evt.gattc_evt.params.char_disc_rsp, connection); + break; + + case BLE_GATTC_EVT_DESC_DISC_RSP: + on_desc_discovery_rsp(&ble_evt->evt.gattc_evt.params.desc_disc_rsp, connection); + break; + + default: + // CONNECTION_DEBUG_PRINTF(&mp_plat_print, "Unhandled discovery event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +STATIC void discover_remote_services(bleio_connection_internal_t *self, mp_obj_t service_uuids_whitelist) { + ble_drv_add_event_handler(discovery_on_ble_evt, self); + + // Start over with an empty list. + self->remote_service_list = NULL; + + if (service_uuids_whitelist == mp_const_none) { + // List of service UUID's not given, so discover all available services. + + uint16_t next_service_start_handle = BLE_GATT_HANDLE_START; + + while (discover_next_services(self, next_service_start_handle, MP_OBJ_NULL)) { + // discover_next_services() appends to remote_services_list. + + // Get the most recently discovered service, and then ask for services + // whose handles start after the last attribute handle inside that service. + const bleio_service_obj_t *service = self->remote_service_list; + next_service_start_handle = service->end_handle + 1; + } + } else { + mp_obj_iter_buf_t iter_buf; + mp_obj_t iterable = mp_getiter(service_uuids_whitelist, &iter_buf); + mp_obj_t uuid_obj; + while ((uuid_obj = mp_iternext(iterable)) != MP_OBJ_STOP_ITERATION) { + if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { + mp_raise_TypeError(translate("non-UUID found in service_uuids_whitelist")); + } + bleio_uuid_obj_t *uuid = MP_OBJ_TO_PTR(uuid_obj); + + ble_uuid_t nrf_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(uuid, &nrf_uuid); + + // Service might or might not be discovered; that's ok. Caller has to check + // Central.remote_services to find out. + // We only need to call this once for each service to discover. + discover_next_services(self, BLE_GATT_HANDLE_START, &nrf_uuid); + } + } + + + bleio_service_obj_t *service = self->remote_service_list; + while (service != NULL) { + // Skip the service if it had an unknown (unregistered) UUID. + if (service->uuid == NULL) { + service = service->next; + continue; + } + + uint16_t next_char_start_handle = service->start_handle; + + // Stop when we go past the end of the range of handles for this service or + // discovery call returns nothing. + // discover_next_characteristics() appends to the characteristic_list. + while (next_char_start_handle <= service->end_handle && + discover_next_characteristics(self, service, next_char_start_handle)) { + + + // Get the most recently discovered characteristic, and then ask for characteristics + // whose handles start after the last attribute handle inside that characteristic. + const bleio_characteristic_obj_t *characteristic = + MP_OBJ_TO_PTR(service->characteristic_list->items[service->characteristic_list->len - 1]); + + next_char_start_handle = characteristic->handle + 1; + } + + // Got characteristics for this service. Now discover descriptors for each characteristic. + size_t char_list_len = service->characteristic_list->len; + for (size_t char_idx = 0; char_idx < char_list_len; ++char_idx) { + bleio_characteristic_obj_t *characteristic = + MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx]); + const bool last_characteristic = char_idx == char_list_len - 1; + bleio_characteristic_obj_t *next_characteristic = last_characteristic + ? NULL + : MP_OBJ_TO_PTR(service->characteristic_list->items[char_idx + 1]); + + // Skip the characteristic if it had an unknown (unregistered) UUID. + if (characteristic->uuid == NULL) { + continue; + } + + uint16_t next_desc_start_handle = characteristic->handle + 1; + + // Don't run past the end of this service or the beginning of the next characteristic. + uint16_t next_desc_end_handle = next_characteristic == NULL + ? service->end_handle + : next_characteristic->handle - 1; + + // Stop when we go past the end of the range of handles for this service or + // discovery call returns nothing. + // discover_next_descriptors() appends to the descriptor_list. + while (next_desc_start_handle <= service->end_handle && + next_desc_start_handle <= next_desc_end_handle && + discover_next_descriptors(self, characteristic, + next_desc_start_handle, next_desc_end_handle)) { + // Get the most recently discovered descriptor, and then ask for descriptors + // whose handles start after that descriptor's handle. + const bleio_descriptor_obj_t *descriptor = characteristic->descriptor_list; + next_desc_start_handle = descriptor->handle + 1; + } + } + service = service->next; + } + + // This event handler is no longer needed. + ble_drv_remove_event_handler(discovery_on_ble_evt, self); + +} + +mp_obj_tuple_t *common_hal_bleio_connection_discover_remote_services(bleio_connection_obj_t *self, mp_obj_t service_uuids_whitelist) { + discover_remote_services(self->connection, service_uuids_whitelist); + bleio_connection_ensure_connected(self); + // Convert to a tuple and then clear the list so the callee will take ownership. + mp_obj_tuple_t *services_tuple = service_linked_list_to_tuple(self->connection->remote_service_list); + self->connection->remote_service_list = NULL; + + return services_tuple; +} + +uint16_t bleio_connection_get_conn_handle(bleio_connection_obj_t *self) { + if (self == NULL || self->connection == NULL) { + return BLE_CONN_HANDLE_INVALID; + } + return self->connection->conn_handle; +} + +mp_obj_t bleio_connection_new_from_internal(bleio_connection_internal_t* internal) { + if (internal->connection_obj != mp_const_none) { + return internal->connection_obj; + } + bleio_connection_obj_t *connection = m_new_obj(bleio_connection_obj_t); + connection->base.type = &bleio_connection_type; + connection->connection = internal; + internal->connection_obj = connection; + + return MP_OBJ_FROM_PTR(connection); +} diff --git a/ports/nrf/common-hal/_bleio/Connection.h b/ports/nrf/common-hal/_bleio/Connection.h new file mode 100644 index 0000000000000..282e0c4b5d767 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -0,0 +1,91 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H + +#include + +#include "ble.h" + +#include "py/obj.h" +#include "py/objlist.h" + +#include "common-hal/_bleio/__init__.h" +#include "common-hal/_bleio/bonding.h" +#include "shared-module/_bleio/Address.h" +#include "common-hal/_bleio/Service.h" + +typedef enum { + PAIR_NOT_PAIRED, + PAIR_WAITING, + PAIR_PAIRED, +} pair_status_t; + +// We split the Connection object into two so that the internal mechanics can live outside of the +// VM. If it were one object, then we'd risk user code seeing a connection object of theirs be +// reused. +typedef struct { + uint16_t conn_handle; + bool is_central; + // Remote services discovered when this peripheral is acting as a client. + bleio_service_obj_t *remote_service_list; + // The advertising data and scan response buffers are held by us, not by the SD, so we must + // maintain them and not change it. If we need to change the contents during advertising, + // there are tricks to get the SD to notice (see DevZone - TBS). + bonding_keys_t bonding_keys; + // EDIV: Encrypted Diversifier: Identifies LTK during legacy pairing. + uint16_t ediv; + volatile pair_status_t pair_status; + uint8_t sec_status; // Internal security status. + mp_obj_t connection_obj; + ble_drv_evt_handler_entry_t handler_entry; + ble_gap_conn_params_t conn_params; + volatile bool conn_params_updating; + uint16_t mtu; + // Request that CCCD values for this conenction be saved, using sys_attr values. + volatile bool do_bond_cccds; + // Request that security key info for this connection be saved. + volatile bool do_bond_keys; + // Time of setting do_bond_ccds: we delay a bit to consolidate multiple CCCD changes + // into one write. Time is currently in ticks_ms. + uint64_t do_bond_cccds_request_time; +} bleio_connection_internal_t; + +typedef struct { + mp_obj_base_t base; + bleio_connection_internal_t* connection; + // The HCI disconnect reason. + uint8_t disconnect_reason; +} bleio_connection_obj_t; + +bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in); + +uint16_t bleio_connection_get_conn_handle(bleio_connection_obj_t *self); +mp_obj_t bleio_connection_new_from_internal(bleio_connection_internal_t* connection); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_CONNECTION_H diff --git a/ports/nrf/common-hal/_bleio/Descriptor.c b/ports/nrf/common-hal/_bleio/Descriptor.c new file mode 100644 index 0000000000000..faf50c658c61d --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Descriptor.c @@ -0,0 +1,97 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +void common_hal_bleio_descriptor_construct(bleio_descriptor_obj_t *self, bleio_characteristic_obj_t *characteristic, bleio_uuid_obj_t *uuid, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { + self->characteristic = characteristic; + self->uuid = uuid; + self->handle = BLE_GATT_HANDLE_INVALID; + self->read_perm = read_perm; + self->write_perm = write_perm; + + const mp_int_t max_length_max = fixed_length ? BLE_GATTS_FIX_ATTR_LEN_MAX : BLE_GATTS_VAR_ATTR_LEN_MAX; + if (max_length < 0 || max_length > max_length_max) { + mp_raise_ValueError_varg(translate("max_length must be 0-%d when fixed_length is %s"), + max_length_max, fixed_length ? "True" : "False"); + } + self->max_length = max_length; + self->fixed_length = fixed_length; + + common_hal_bleio_descriptor_set_value(self, initial_value_bufinfo); +} + +bleio_uuid_obj_t *common_hal_bleio_descriptor_get_uuid(bleio_descriptor_obj_t *self) { + return self->uuid; +} + +bleio_characteristic_obj_t *common_hal_bleio_descriptor_get_characteristic(bleio_descriptor_obj_t *self) { + return self->characteristic; +} + +size_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self, uint8_t* buf, size_t len) { + // Do GATT operations only if this descriptor has been registered + if (self->handle != BLE_GATT_HANDLE_INVALID) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->characteristic->service->connection); + if (common_hal_bleio_service_get_is_remote(self->characteristic->service)) { + return common_hal_bleio_gattc_read(self->handle, conn_handle, buf, len); + } else { + return common_hal_bleio_gatts_read(self->handle, conn_handle, buf, len); + } + } + + return 0; +} + +void common_hal_bleio_descriptor_set_value(bleio_descriptor_obj_t *self, mp_buffer_info_t *bufinfo) { + if (self->fixed_length && bufinfo->len != self->max_length) { + mp_raise_ValueError(translate("Value length != required fixed length")); + } + if (bufinfo->len > self->max_length) { + mp_raise_ValueError(translate("Value length > max_length")); + } + + self->value = mp_obj_new_bytes(bufinfo->buf, bufinfo->len); + + // Do GATT operations only if this descriptor has been registered. + if (self->handle != BLE_GATT_HANDLE_INVALID) { + uint16_t conn_handle = bleio_connection_get_conn_handle(self->characteristic->service->connection); + if (common_hal_bleio_service_get_is_remote(self->characteristic->service)) { + // false means WRITE_REQ, not write-no-response + common_hal_bleio_gattc_write(self->handle, conn_handle, bufinfo, false); + } else { + common_hal_bleio_gatts_write(self->handle, conn_handle, bufinfo); + } + } + +} diff --git a/ports/nrf/common-hal/_bleio/Descriptor.h b/ports/nrf/common-hal/_bleio/Descriptor.h new file mode 100644 index 0000000000000..c70547c08e68c --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Descriptor.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_DESCRIPTOR_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_DESCRIPTOR_H + +#include "py/obj.h" + +#include "common-hal/_bleio/UUID.h" + +// Forward declare characteristic because it includes a Descriptor. +struct _bleio_characteristic_obj; + +typedef struct _bleio_descriptor_obj { + mp_obj_base_t base; + // Will be MP_OBJ_NULL before being assigned to a Characteristic. + struct _bleio_characteristic_obj *characteristic; + bleio_uuid_obj_t *uuid; + mp_obj_t value; + uint16_t max_length; + bool fixed_length; + uint16_t handle; + bleio_attribute_security_mode_t read_perm; + bleio_attribute_security_mode_t write_perm; + struct _bleio_descriptor_obj* next; +} bleio_descriptor_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_DESCRIPTOR_H diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.c b/ports/nrf/common-hal/_bleio/PacketBuffer.c new file mode 100644 index 0000000000000..6ed6d145149b3 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.c @@ -0,0 +1,341 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019-2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "ble_drv.h" +#include "ble_gatts.h" +#include "nrf_nvic.h" + +#include "lib/utils/interrupt_char.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "tick.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/PacketBuffer.h" +#include "supervisor/shared/tick.h" + +STATIC void write_to_ringbuf(bleio_packet_buffer_obj_t *self, uint8_t *data, uint16_t len) { + if (len + sizeof(uint16_t) > self->ringbuf.size) { + // This shouldn't happen. + return; + } + // Push all the data onto the ring buffer. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + // Make room for the new value by dropping the oldest packets first. + while (self->ringbuf.size - ringbuf_count(&self->ringbuf) < (int) (len + sizeof(uint16_t))) { + uint16_t packet_length; + ringbuf_get_n(&self->ringbuf, (uint8_t*) &packet_length, sizeof(uint16_t)); + for (uint16_t i = 0; i < packet_length; i++) { + ringbuf_get(&self->ringbuf); + } + // set an overflow flag? + } + ringbuf_put_n(&self->ringbuf, (uint8_t*) &len, sizeof(uint16_t)); + ringbuf_put_n(&self->ringbuf, data, len); + sd_nvic_critical_region_exit(is_nested_critical_region); +} + +STATIC uint32_t queue_next_write(bleio_packet_buffer_obj_t *self) { + // Queue up the next outgoing buffer. We use two, one that has been passed to the SD for + // transmission (when packet_queued is true) and the other is `pending` and can still be + // modified. By primarily appending to the `pending` buffer we can reduce the protocol overhead + // of the lower level link and ATT layers. + self->packet_queued = false; + if (self->pending_size > 0) { + uint16_t conn_handle = self->conn_handle; + uint32_t err_code; + if (self->client) { + ble_gattc_write_params_t write_params = { + .write_op = self->write_type, + .handle = self->characteristic->handle, + .p_value = self->outgoing[self->pending_index], + .len = self->pending_size, + }; + + err_code = sd_ble_gattc_write(conn_handle, &write_params); + } else { + uint16_t hvx_len = self->pending_size; + + ble_gatts_hvx_params_t hvx_params = { + .handle = self->characteristic->handle, + .type = self->write_type, + .offset = 0, + .p_len = &hvx_len, + .p_data = self->outgoing[self->pending_index], + }; + err_code = sd_ble_gatts_hvx(conn_handle, &hvx_params); + } + if (err_code != NRF_SUCCESS) { + // On error, simply skip updating the pending buffers so that the next HVC or WRITE + // complete event triggers another attempt. + return err_code; + } + self->pending_size = 0; + self->pending_index = (self->pending_index + 1) % 2; + self->packet_queued = true; + } + return NRF_SUCCESS; +} + +STATIC bool packet_buffer_on_ble_client_evt(ble_evt_t *ble_evt, void *param) { + bleio_packet_buffer_obj_t *self = (bleio_packet_buffer_obj_t *) param; + uint16_t conn_handle = ble_evt->evt.gattc_evt.conn_handle; + if (conn_handle != self->conn_handle) { + return false; + } + switch (ble_evt->header.evt_id) { + case BLE_GATTC_EVT_HVX: { + // A remote service wrote to this characteristic. + ble_gattc_evt_hvx_t* evt_hvx = &ble_evt->evt.gattc_evt.params.hvx; + // Must be a notification, and event handle must match the handle for my characteristic. + if (evt_hvx->handle == self->characteristic->handle) { + write_to_ringbuf(self, evt_hvx->data, evt_hvx->len); + if (evt_hvx->type == BLE_GATT_HVX_INDICATION) { + sd_ble_gattc_hv_confirm(conn_handle, evt_hvx->handle); + } + } + break; + } + case BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE: { + queue_next_write(self); + break; + } + case BLE_GATTC_EVT_WRITE_RSP: { + queue_next_write(self); + break; + } + default: + return false; + break; + } + return true; +} + +STATIC bool packet_buffer_on_ble_server_evt(ble_evt_t *ble_evt, void *param) { + bleio_packet_buffer_obj_t *self = (bleio_packet_buffer_obj_t *) param; + uint16_t conn_handle = ble_evt->evt.gatts_evt.conn_handle; + switch (ble_evt->header.evt_id) { + case BLE_GATTS_EVT_WRITE: { + // A client wrote to this server characteristic. + + ble_gatts_evt_write_t *evt_write = &ble_evt->evt.gatts_evt.params.write; + + // Event handle must match the handle for my characteristic. + if (evt_write->handle == self->characteristic->handle) { + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + self->conn_handle = conn_handle; + } else if (self->conn_handle != conn_handle) { + return false; + } + write_to_ringbuf(self, evt_write->data, evt_write->len); + } else if (evt_write->handle == self->characteristic->cccd_handle) { + uint16_t cccd = *((uint16_t*) evt_write->data); + if (cccd & BLE_GATT_HVX_NOTIFICATION) { + self->conn_handle = conn_handle; + } else { + self->conn_handle = BLE_CONN_HANDLE_INVALID; + } + } + break; + } + case BLE_GAP_EVT_DISCONNECTED: { + if (self->conn_handle == conn_handle) { + self->conn_handle = BLE_CONN_HANDLE_INVALID; + } + } + case BLE_GATTS_EVT_HVN_TX_COMPLETE: { + queue_next_write(self); + } + default: + return false; + break; + } + return true; +} + +void common_hal_bleio_packet_buffer_construct( + bleio_packet_buffer_obj_t *self, bleio_characteristic_obj_t *characteristic, + size_t buffer_size) { + + self->characteristic = characteristic; + self->client = self->characteristic->service->is_remote; + bleio_characteristic_properties_t incoming = self->characteristic->props & (CHAR_PROP_WRITE_NO_RESPONSE | CHAR_PROP_WRITE); + bleio_characteristic_properties_t outgoing = self->characteristic->props & (CHAR_PROP_NOTIFY | CHAR_PROP_INDICATE); + + if (self->client) { + // Swap if we're the client. + bleio_characteristic_properties_t temp = incoming; + incoming = outgoing; + outgoing = temp; + self->conn_handle = bleio_connection_get_conn_handle(MP_OBJ_TO_PTR(self->characteristic->service->connection)); + } else { + self->conn_handle = BLE_CONN_HANDLE_INVALID; + } + + if (incoming) { + // This is a macro. + ringbuf_alloc(&self->ringbuf, buffer_size * (sizeof(uint16_t) + characteristic->max_length), false); + + if (self->ringbuf.buf == NULL) { + mp_raise_ValueError(translate("Buffer too large and unable to allocate")); + } + } + + if (outgoing) { + self->packet_queued = false; + self->pending_index = 0; + self->pending_size = 0; + self->outgoing[0] = m_malloc(characteristic->max_length, false); + self->outgoing[1] = m_malloc(characteristic->max_length, false); + } else { + self->outgoing[0] = NULL; + self->outgoing[1] = NULL; + } + + if (self->client) { + ble_drv_add_event_handler(packet_buffer_on_ble_client_evt, self); + if (incoming) { + // Prefer notify if both are available. + if (incoming & CHAR_PROP_NOTIFY) { + self->write_type = BLE_GATT_HVX_NOTIFICATION; + common_hal_bleio_characteristic_set_cccd(self->characteristic, true, false); + } else { + common_hal_bleio_characteristic_set_cccd(self->characteristic, false, true); + } + } + if (outgoing) { + self->write_type = BLE_GATT_OP_WRITE_REQ; + if (outgoing & CHAR_PROP_WRITE_NO_RESPONSE) { + self->write_type = BLE_GATT_OP_WRITE_CMD; + } + } + } else { + ble_drv_add_event_handler(packet_buffer_on_ble_server_evt, self); + if (outgoing) { + self->write_type = BLE_GATT_HVX_INDICATION; + if (outgoing & CHAR_PROP_NOTIFY) { + self->write_type = BLE_GATT_HVX_NOTIFICATION; + } + } + } +} + +int common_hal_bleio_packet_buffer_readinto(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len) { + if (ringbuf_count(&self->ringbuf) < 2) { + return 0; + } + + uint16_t packet_length; + ringbuf_get_n(&self->ringbuf, (uint8_t*) &packet_length, sizeof(uint16_t)); + + // Copy received data. Lock out write interrupt handler while copying. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + + if (packet_length > len) { + return len - packet_length; + } + + ringbuf_get_n(&self->ringbuf, data, packet_length); + + // Writes now OK. + sd_nvic_critical_region_exit(is_nested_critical_region); + + return packet_length; +} + +void common_hal_bleio_packet_buffer_write(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len, uint8_t* header, size_t header_len) { + if (self->outgoing[0] == NULL) { + mp_raise_bleio_BluetoothError(translate("Writes not supported on Characteristic")); + } + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return; + } + uint16_t packet_size = common_hal_bleio_packet_buffer_get_packet_size(self); + uint16_t max_size = packet_size - len; + while (max_size < self->pending_size && self->conn_handle != BLE_CONN_HANDLE_INVALID) { + RUN_BACKGROUND_TASKS; + } + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return; + } + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + + uint8_t* pending = self->outgoing[self->pending_index]; + + if (self->pending_size == 0) { + memcpy(pending, header, header_len); + self->pending_size += header_len; + } + memcpy(pending + self->pending_size, data, len); + self->pending_size += len; + + sd_nvic_critical_region_exit(is_nested_critical_region); + + // If no writes are queued then sneak in this data. + if (!self->packet_queued) { + queue_next_write(self); + } +} + +uint16_t common_hal_bleio_packet_buffer_get_packet_size(bleio_packet_buffer_obj_t *self) { + uint16_t mtu; + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return 0; + } + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &bleio_connections[i]; + if (connection->conn_handle == self->conn_handle) { + break; + } + } + if (connection->mtu == 0) { + mtu = BLE_GATT_ATT_MTU_DEFAULT; + } + if (self->characteristic->max_length > mtu) { + mtu = self->characteristic->max_length; + } + uint16_t att_overhead = 3; + return mtu - att_overhead; +} + +bool common_hal_bleio_packet_buffer_deinited(bleio_packet_buffer_obj_t *self) { + return self->characteristic == NULL; +} + +void common_hal_bleio_packet_buffer_deinit(bleio_packet_buffer_obj_t *self) { + if (!common_hal_bleio_packet_buffer_deinited(self)) { + ble_drv_remove_event_handler(packet_buffer_on_ble_client_evt, self); + } +} diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.h b/ports/nrf/common-hal/_bleio/PacketBuffer.h new file mode 100644 index 0000000000000..cfccc852ed32b --- /dev/null +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019-2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H + +#include "nrf_soc.h" + +#include "py/ringbuf.h" +#include "shared-bindings/_bleio/Characteristic.h" + +typedef struct { + mp_obj_base_t base; + bleio_characteristic_obj_t *characteristic; + // Ring buffer storing consecutive incoming values. + ringbuf_t ringbuf; + // Two outgoing buffers to alternate between. One will be queued for transmission by the SD and + // the other is waiting to be queued and can be extended. + uint8_t* outgoing[2]; + uint16_t pending_size; + uint16_t conn_handle; + uint8_t pending_index; + uint8_t write_type; + bool client; + bool packet_queued; +} bleio_packet_buffer_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H diff --git a/ports/nrf/common-hal/_bleio/Service.c b/ports/nrf/common-hal/_bleio/Service.c new file mode 100644 index 0000000000000..19288f7479797 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Service.c @@ -0,0 +1,149 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "ble_drv.h" +#include "ble.h" +#include "py/runtime.h" +#include "common-hal/_bleio/__init__.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/Adapter.h" + +uint32_t _common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary, mp_obj_list_t * characteristic_list) { + self->handle = 0xFFFF; + self->uuid = uuid; + self->characteristic_list = characteristic_list; + self->is_remote = false; + self->connection = NULL; + self->is_secondary = is_secondary; + + ble_uuid_t nordic_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(uuid, &nordic_uuid); + + uint8_t service_type = BLE_GATTS_SRVC_TYPE_PRIMARY; + if (is_secondary) { + service_type = BLE_GATTS_SRVC_TYPE_SECONDARY; + } + + vm_used_ble = true; + + return sd_ble_gatts_service_add(service_type, &nordic_uuid, &self->handle); +} + +void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary) { + check_nrf_error(_common_hal_bleio_service_construct(self, uuid, is_secondary, + mp_obj_new_list(0, NULL))); +} + +void bleio_service_from_connection(bleio_service_obj_t *self, mp_obj_t connection) { + self->handle = 0xFFFF; + self->uuid = NULL; + self->characteristic_list = mp_obj_new_list(0, NULL); + self->is_remote = true; + self->is_secondary = false; + self->connection = connection; +} + +bleio_uuid_obj_t *common_hal_bleio_service_get_uuid(bleio_service_obj_t *self) { + return self->uuid; +} + +mp_obj_list_t *common_hal_bleio_service_get_characteristic_list(bleio_service_obj_t *self) { + return self->characteristic_list; +} + +bool common_hal_bleio_service_get_is_remote(bleio_service_obj_t *self) { + return self->is_remote; +} + +bool common_hal_bleio_service_get_is_secondary(bleio_service_obj_t *self) { + return self->is_secondary; +} + +void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, + bleio_characteristic_obj_t *characteristic, + mp_buffer_info_t *initial_value_bufinfo) { + ble_gatts_char_md_t char_md = { + .char_props.broadcast = (characteristic->props & CHAR_PROP_BROADCAST) ? 1 : 0, + .char_props.read = (characteristic->props & CHAR_PROP_READ) ? 1 : 0, + .char_props.write_wo_resp = (characteristic->props & CHAR_PROP_WRITE_NO_RESPONSE) ? 1 : 0, + .char_props.write = (characteristic->props & CHAR_PROP_WRITE) ? 1 : 0, + .char_props.notify = (characteristic->props & CHAR_PROP_NOTIFY) ? 1 : 0, + .char_props.indicate = (characteristic->props & CHAR_PROP_INDICATE) ? 1 : 0, + }; + + ble_gatts_attr_md_t cccd_md = { + .vloc = BLE_GATTS_VLOC_STACK, + }; + + ble_uuid_t char_uuid; + bleio_uuid_convert_to_nrf_ble_uuid(characteristic->uuid, &char_uuid); + + ble_gatts_attr_md_t char_attr_md = { + .vloc = BLE_GATTS_VLOC_STACK, + .vlen = !characteristic->fixed_length, + }; + + if (char_md.char_props.notify || char_md.char_props.indicate) { + BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm); + // Make CCCD write permission match characteristic read permission. + bleio_attribute_gatts_set_security_mode(&cccd_md.write_perm, characteristic->read_perm); + + char_md.p_cccd_md = &cccd_md; + } + + bleio_attribute_gatts_set_security_mode(&char_attr_md.read_perm, characteristic->read_perm); + bleio_attribute_gatts_set_security_mode(&char_attr_md.write_perm, characteristic->write_perm); + #if CIRCUITPY_VERBOSE_BLE + // Turn on read authorization so that we receive an event to print on every read. + char_attr_md.rd_auth = true; + #endif + + ble_gatts_attr_t char_attr = { + .p_uuid = &char_uuid, + .p_attr_md = &char_attr_md, + .init_len = 0, + .p_value = NULL, + .init_offs = 0, + .max_len = characteristic->max_length, + }; + + ble_gatts_char_handles_t char_handles; + + check_nrf_error(sd_ble_gatts_characteristic_add(self->handle, &char_md, &char_attr, &char_handles)); + + characteristic->user_desc_handle = char_handles.user_desc_handle; + characteristic->cccd_handle = char_handles.cccd_handle; + characteristic->sccd_handle = char_handles.sccd_handle; + characteristic->handle = char_handles.value_handle; + #if CIRCUITPY_VERBOSE_BLE + mp_printf(&mp_plat_print, "Char handle %x user %x cccd %x sccd %x\n", characteristic->handle, characteristic->user_desc_handle, characteristic->cccd_handle, characteristic->sccd_handle); + #endif + + mp_obj_list_append(self->characteristic_list, MP_OBJ_FROM_PTR(characteristic)); +} diff --git a/ports/nrf/common-hal/_bleio/Service.h b/ports/nrf/common-hal/_bleio/Service.h new file mode 100644 index 0000000000000..f101bc825b46e --- /dev/null +++ b/ports/nrf/common-hal/_bleio/Service.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SERVICE_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SERVICE_H + +#include "py/objlist.h" +#include "common-hal/_bleio/UUID.h" + +typedef struct bleio_service_obj { + mp_obj_base_t base; + // Handle for the local service. + uint16_t handle; + // True if created during discovery. + bool is_remote; + bool is_secondary; + bleio_uuid_obj_t *uuid; + mp_obj_t connection; + mp_obj_list_t *characteristic_list; + // Range of attribute handles of this remote service. + uint16_t start_handle; + uint16_t end_handle; + struct bleio_service_obj* next; +} bleio_service_obj_t; + +void bleio_service_from_connection(bleio_service_obj_t *self, mp_obj_t connection); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_SERVICE_H diff --git a/ports/nrf/common-hal/_bleio/UUID.c b/ports/nrf/common-hal/_bleio/UUID.c new file mode 100644 index 0000000000000..6a3d64305069f --- /dev/null +++ b/ports/nrf/common-hal/_bleio/UUID.c @@ -0,0 +1,91 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "common-hal/_bleio/UUID.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" + +#include "ble.h" +#include "ble_drv.h" +#include "nrf_error.h" + +// If uuid128 is NULL, this is a Bluetooth SIG 16-bit UUID. +// If uuid128 is not NULL, it's a 128-bit (16-byte) UUID, with bytes 12 and 13 zero'd out, where +// the 16-bit part goes. Those 16 bits are passed in uuid16. +void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, uint32_t uuid16, const uint8_t uuid128[]) { + self->nrf_ble_uuid.uuid = uuid16; + if (uuid128 == NULL) { + self->nrf_ble_uuid.type = BLE_UUID_TYPE_BLE; + } else { + ble_uuid128_t vs_uuid; + memcpy(vs_uuid.uuid128, uuid128, sizeof(vs_uuid.uuid128)); + + // Register this vendor-specific UUID. Bytes 12 and 13 will be zero. + check_nrf_error(sd_ble_uuid_vs_add(&vs_uuid, &self->nrf_ble_uuid.type)); + vm_used_ble = true; + } +} + +uint32_t common_hal_bleio_uuid_get_size(bleio_uuid_obj_t *self) { + return self->nrf_ble_uuid.type == BLE_UUID_TYPE_BLE ? 16 : 128; +} + +uint32_t common_hal_bleio_uuid_get_uuid16(bleio_uuid_obj_t *self) { + return self->nrf_ble_uuid.uuid; +} + +void common_hal_bleio_uuid_get_uuid128(bleio_uuid_obj_t *self, uint8_t uuid128[16]) { + uint8_t length; + check_nrf_error(sd_ble_uuid_encode(&self->nrf_ble_uuid, &length, uuid128)); +} + +void common_hal_bleio_uuid_pack_into(bleio_uuid_obj_t *self, uint8_t* buf) { + if (self->nrf_ble_uuid.type == BLE_UUID_TYPE_BLE) { + buf[0] = self->nrf_ble_uuid.uuid & 0xff; + buf[1] = self->nrf_ble_uuid.uuid >> 8; + } else { + common_hal_bleio_uuid_get_uuid128(self, buf); + } +} + +void bleio_uuid_construct_from_nrf_ble_uuid(bleio_uuid_obj_t *self, ble_uuid_t *nrf_ble_uuid) { + if (nrf_ble_uuid->type == BLE_UUID_TYPE_UNKNOWN) { + mp_raise_bleio_BluetoothError(translate("Unexpected nrfx uuid type")); + } + self->nrf_ble_uuid.uuid = nrf_ble_uuid->uuid; + self->nrf_ble_uuid.type = nrf_ble_uuid->type; +} + +// Fill in a ble_uuid_t from my values. +void bleio_uuid_convert_to_nrf_ble_uuid(bleio_uuid_obj_t *self, ble_uuid_t *nrf_ble_uuid) { + nrf_ble_uuid->uuid = self->nrf_ble_uuid.uuid; + nrf_ble_uuid->type = self->nrf_ble_uuid.type; +} diff --git a/ports/nrf/common-hal/_bleio/UUID.h b/ports/nrf/common-hal/_bleio/UUID.h new file mode 100644 index 0000000000000..7d3a6204ecd2e --- /dev/null +++ b/ports/nrf/common-hal/_bleio/UUID.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_UUID_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_UUID_H + +#include "py/obj.h" + +#include "ble.h" + +typedef struct { + mp_obj_base_t base; + // Use the native way of storing UUID's: + // - ble_uuid_t.uuid is a 16-bit uuid. + // - ble_uuid_t.type is BLE_UUID_TYPE_BLE if it's a 16-bit Bluetooth SIG UUID. + // or is BLE_UUID_TYPE_VENDOR_BEGIN and higher, which indexes into a table of registered + // 128-bit UUIDs. + ble_uuid_t nrf_ble_uuid; +} bleio_uuid_obj_t; + +void bleio_uuid_construct_from_nrf_ble_uuid(bleio_uuid_obj_t *self, ble_uuid_t *nrf_uuid); +void bleio_uuid_convert_to_nrf_ble_uuid(bleio_uuid_obj_t *self, ble_uuid_t *nrf_uuid); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_UUID_H diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c new file mode 100644 index 0000000000000..62a3a9299c460 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -0,0 +1,246 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" +#include "supervisor/shared/bluetooth.h" + +#include "common-hal/_bleio/__init__.h" + +void check_nrf_error(uint32_t err_code) { + if (err_code == NRF_SUCCESS) { + return; + } + switch (err_code) { + case NRF_ERROR_TIMEOUT: + mp_raise_msg(&mp_type_TimeoutError, NULL); + return; + case BLE_ERROR_INVALID_CONN_HANDLE: + mp_raise_bleio_ConnectionError(translate("Not connected")); + return; + default: + mp_raise_bleio_BluetoothError(translate("Unknown soft device error: %04x"), err_code); + break; + } +} + +void check_gatt_status(uint16_t gatt_status) { + if (gatt_status == BLE_GATT_STATUS_SUCCESS) { + return; + } + switch (gatt_status) { + case BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION: + mp_raise_bleio_SecurityError(translate("Insufficient authentication")); + return; + case BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION: + mp_raise_bleio_SecurityError(translate("Insufficient encryption")); + return; + default: + mp_raise_bleio_BluetoothError(translate("Unknown gatt error: 0x%04x"), gatt_status); + } +} + +void check_sec_status(uint8_t sec_status) { + if (sec_status == BLE_GAP_SEC_STATUS_SUCCESS) { + return; + } + + switch (sec_status) { + case BLE_GAP_SEC_STATUS_UNSPECIFIED: + mp_raise_bleio_SecurityError(translate("Unspecified issue. Can be that the pairing prompt on the other device was declined or ignored.")); + return; + default: + mp_raise_bleio_SecurityError(translate("Unknown security error: 0x%04x"), sec_status); + } +} + +// Turn off BLE on a reset or reload. +void bleio_reset() { + if (!common_hal_bleio_adapter_get_enabled(&common_hal_bleio_adapter_obj)) { + return; + } + bleio_adapter_reset(&common_hal_bleio_adapter_obj); + if (!vm_used_ble) { + // No user-code BLE operations were done, so we can maintain the supervisor state. + return; + } + common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false); + bonding_reset(); + supervisor_start_bluetooth(); +} + +// The singleton _bleio.Adapter object, bound to _bleio.adapter +// It currently only has properties and no state +bleio_adapter_obj_t common_hal_bleio_adapter_obj = { + .base = { + .type = &bleio_adapter_type, + }, +}; + +void common_hal_bleio_check_connected(uint16_t conn_handle) { + if (conn_handle == BLE_CONN_HANDLE_INVALID) { + mp_raise_bleio_ConnectionError(translate("Not connected")); + } +} + +// GATTS read of a Characteristic or Descriptor. +size_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len) { + // conn_handle might be BLE_CONN_HANDLE_INVALID if we're not connected, but that's OK, because + // we can still read and write the local value. + + ble_gatts_value_t gatts_value = { + .p_value = buf, + .len = len, + }; + + check_nrf_error(sd_ble_gatts_value_get(conn_handle, handle, &gatts_value)); + + return gatts_value.len; +} + +void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo) { + // conn_handle might be BLE_CONN_HANDLE_INVALID if we're not connected, but that's OK, because + // we can still read and write the local value. + + ble_gatts_value_t gatts_value = { + .p_value = bufinfo->buf, + .len = bufinfo->len, + }; + + check_nrf_error(sd_ble_gatts_value_set(conn_handle, handle, &gatts_value)); +} + +typedef struct { + uint8_t* buf; + size_t len; + size_t final_len; + uint16_t conn_handle; + volatile uint16_t status; + volatile bool done; +} read_info_t; + +STATIC bool _on_gattc_read_rsp_evt(ble_evt_t *ble_evt, void *param) { + read_info_t* read = param; + switch (ble_evt->header.evt_id) { + + // More events may be handled later, so keep this as a switch. + + case BLE_GATTC_EVT_READ_RSP: { + ble_gattc_evt_t* evt = &ble_evt->evt.gattc_evt; + ble_gattc_evt_read_rsp_t *response = &evt->params.read_rsp; + if (read && evt->conn_handle == read->conn_handle) { + read->status = evt->gatt_status; + size_t len = MIN(read->len, response->len); + memcpy(read->buf, response->data, len); + read->final_len = len; + // Indicate to busy-wait loop that we've read the attribute value. + read->done = true; + } + break; + } + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled characteristic event: 0x%04x\n", ble_evt->header.evt_id); + return false; + break; + } + return true; +} + +size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len) { + common_hal_bleio_check_connected(conn_handle); + + read_info_t read_info; + read_info.buf = buf; + read_info.len = len; + read_info.final_len = 0; + read_info.conn_handle = conn_handle; + // Set to true by the event handler. + read_info.done = false; + ble_drv_add_event_handler(_on_gattc_read_rsp_evt, &read_info); + + uint32_t nrf_error = NRF_ERROR_BUSY; + while (nrf_error == NRF_ERROR_BUSY) { + nrf_error = sd_ble_gattc_read(conn_handle, handle, 0); + } + if (nrf_error != NRF_SUCCESS) { + ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info); + check_nrf_error(nrf_error); + } + + while (!read_info.done) { + RUN_BACKGROUND_TASKS; + } + + ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info); + check_gatt_status(read_info.status); + return read_info.final_len; +} + +void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, bool write_no_response) { + common_hal_bleio_check_connected(conn_handle); + + ble_gattc_write_params_t write_params = { + .write_op = write_no_response ? BLE_GATT_OP_WRITE_CMD: BLE_GATT_OP_WRITE_REQ, + .handle = handle, + .p_value = bufinfo->buf, + .len = bufinfo->len, + }; + + while (1) { + uint32_t err_code = sd_ble_gattc_write(conn_handle, &write_params); + if (err_code == NRF_SUCCESS) { + break; + } + + // Write with response will return NRF_ERROR_BUSY if the response has not been received. + // Write without reponse will return NRF_ERROR_RESOURCES if too many writes are pending. + if (err_code == NRF_ERROR_BUSY || err_code == NRF_ERROR_RESOURCES) { + // We could wait for an event indicating the write is complete, but just retrying is easier. + MICROPY_VM_HOOK_LOOP; + continue; + } + + // Some real error occurred. + check_nrf_error(err_code); + } + +} + +void common_hal_bleio_gc_collect(void) { + bleio_adapter_gc_collect(&common_hal_bleio_adapter_obj); +} diff --git a/ports/nrf/common-hal/_bleio/__init__.h b/ports/nrf/common-hal/_bleio/__init__.h new file mode 100644 index 0000000000000..e216795fcd639 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/__init__.h @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_INIT_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_INIT_H + +void bleio_reset(void); + +typedef struct { + ble_gap_enc_key_t own_enc; + ble_gap_enc_key_t peer_enc; + ble_gap_id_key_t peer_id; +} bonding_keys_t; + +// We assume variable length data. +// 20 bytes max (23 - 3). +#define GATT_MAX_DATA_LENGTH (BLE_GATT_ATT_MTU_DEFAULT - 3) + +// These helpers raise the appropriate exceptions if the code doesn't equal success. +void check_nrf_error(uint32_t err_code); +void check_gatt_status(uint16_t gatt_status); +void check_sec_status(uint8_t sec_status); + +// Track if the user code modified the BLE state to know if we need to undo it on reload. +bool vm_used_ble; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_INIT_H diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c new file mode 100644 index 0000000000000..081ba992f3a46 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -0,0 +1,310 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/nvm/ByteArray.h" +#include "supervisor/shared/tick.h" + +#include "nrf_soc.h" + +#include "bonding.h" + +// Internal flash area reserved for bonding storage. +#define BONDING_PAGES_START_ADDR CIRCUITPY_BLE_CONFIG_START_ADDR +#define BONDING_PAGES_END_ADDR (CIRCUITPY_BLE_CONFIG_START_ADDR + CIRCUITPY_BLE_CONFIG_SIZE) + +// First and last four bytes are magic bytes for id and version. Data is in between. +// 'BD01' +const uint32_t BONDING_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); + +#define BONDING_DATA_START_ADDR (BONDING_PAGES_START_ADDR + sizeof(BONDING_FLAG)) +#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_FLAG)) + +#define BONDING_START_FLAG_ADDR BONDING_PAGES_START_ADDR +#define BONDING_END_FLAG_ADDR BONDING_DATA_END_ADDR + +// Save both system and user service info. +#define SYS_ATTR_FLAGS (BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS | BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS) + +#if BONDING_DEBUG +void bonding_print_block(bonding_block_t *block) { + printf("at 0x%08lx: is_central: %1d, type: 0x%x, ediv: 0x%04x, data_length: %d\n", + (uint32_t) block, block->is_central, block->type, block->ediv, block->data_length); +} + +void bonding_print_keys(bonding_keys_t *keys) { + for (size_t i = 0; i < sizeof(bonding_keys_t); i ++) { + printf("%x", ((uint8_t*) keys)[i]); + } + printf("\n"); +} +#endif + +STATIC size_t compute_block_size(uint16_t data_length) { + // Round data size up to the nearest 32-bit address. + return sizeof(bonding_block_t) + ((data_length + 3) & ~0x3); +} + +void bonding_erase_storage(void) { + // Erase all pages in the bonding area. + for(uint32_t page_address = BONDING_PAGES_START_ADDR; + page_address < BONDING_PAGES_END_ADDR; + page_address += FLASH_PAGE_SIZE) { + // Argument is page number, not address. + sd_flash_page_erase_sync(page_address / FLASH_PAGE_SIZE); + } + // Write marker words at the beginning and the end of the bonding area. + uint32_t flag = BONDING_FLAG; + sd_flash_write_sync((uint32_t *) BONDING_START_FLAG_ADDR, &flag, 1); + sd_flash_write_sync((uint32_t *) BONDING_END_FLAG_ADDR, &flag, 1); +} + +// Given NULL to start or block address, return the address of the next valid block. +// The last block returned is the unused block at the end. +// Return NULL if we have run off the end of the bonding space. + +STATIC bonding_block_t *next_block(bonding_block_t *block) { + while (1) { + // Advance to next block. + if (block == NULL) { + return (bonding_block_t *) BONDING_DATA_START_ADDR; + } else if (block->type == BLOCK_UNUSED) { + // Already at last block (the unused block). + return NULL; + } + + // Advance to next block. + block = (bonding_block_t *) ((uint8_t *) block + compute_block_size(block->data_length)); + + if (block >= (bonding_block_t *) BONDING_DATA_END_ADDR) { + // Went past end of bonding space. + return NULL; + } + if (block->type != BLOCK_INVALID) { + // Found an empty or a valid block. + return block; + } + // Invalid block (was erased); try again. + } +} + +// Find the block with given is_central, type and ediv value. +// If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. +// If not found, return NULL. +STATIC bonding_block_t *find_existing_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { + bonding_block_t *block = NULL; + while (1) { + block = next_block(block); + if (block == NULL) { + return NULL; + } + // If types match, and block is unused, just return it. + // Otherwise check that is_central and ediv match. + if (type == block->type) { + if (type == BLOCK_UNUSED || + (is_central == block->is_central && ediv == block->ediv)) { + return block; + } + } + } +} + +// Get an empty block large enough to store data_length data. +STATIC bonding_block_t* find_unused_block(uint16_t data_length) { + bonding_block_t *unused_block = find_existing_block(true, BLOCK_UNUSED, EDIV_INVALID); + // If no more room, erase all existing blocks and start over. + if (!unused_block || + (uint8_t *) unused_block + compute_block_size(data_length) >= (uint8_t *) BONDING_DATA_END_ADDR) { + bonding_erase_storage(); + unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; + } + return unused_block; +} + +// Set the header word to all 0's, to mark the block as invalid. +// We don't change data_length, so we can still skip over this block. +STATIC void invalidate_block(bonding_block_t *block) { + uint32_t zero = 0; + sd_flash_write_sync((uint32_t *) block, &zero, 1); +} + +// Write bonding block header. +STATIC void write_block_header(bonding_block_t *dest_block, bonding_block_t *source_block_header) { + sd_flash_write_sync((uint32_t *) dest_block, (uint32_t *) source_block_header, sizeof(bonding_block_t) / 4); +} + +// Write variable-length data at end of bonding block. +STATIC void write_block_data(bonding_block_t *dest_block, uint8_t *data, uint16_t data_length) { + // Minimize the number of writes. Datasheet says no more than two writes per word before erasing again. + + // Start writing after the current header. + uint32_t *flash_word_p = (uint32_t *) ((uint8_t *) dest_block + sizeof(bonding_block_t)); + while (1) { + uint32_t word = 0xffffffff; + memcpy(&word, data, data_length >= 4 ? 4 : data_length); + sd_flash_write_sync(flash_word_p, &word, 1); + if (data_length <= 4) { + break; + } + data_length -= 4; + data += 4; + // Increment by word size. + flash_word_p++; + } +} + +STATIC void write_sys_attr_block(bleio_connection_internal_t *connection) { + uint16_t length = 0; + // First find out how big a buffer we need, then fetch the data. + if(sd_ble_gatts_sys_attr_get(connection->conn_handle, NULL, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + return; + } + uint8_t sys_attr[length]; + if(sd_ble_gatts_sys_attr_get(connection->conn_handle, sys_attr, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + return; + } + + // Is there an existing sys_attr block that matches the current sys_attr data? + bonding_block_t *existing_block = + find_existing_block(connection->is_central, BLOCK_SYS_ATTR, connection->ediv); + if (existing_block) { + if (length == existing_block->data_length && + memcmp(sys_attr, existing_block->data, length) == 0) { + // Identical block found. No need to store again. + return; + } + // Data doesn't match. Invalidate block and store a new one. + invalidate_block(existing_block); + } + + bonding_block_t block_header = { + .is_central = connection->is_central, + .type = BLOCK_SYS_ATTR, + .ediv = connection->ediv, + .conn_handle = connection->conn_handle, + .data_length = length, + }; + bonding_block_t *new_block = find_unused_block(length); + write_block_header(new_block, &block_header); + write_block_data(new_block, sys_attr, length); + return; +} + +STATIC void write_keys_block(bleio_connection_internal_t *connection) { + uint16_t const ediv = connection->is_central + ? connection->bonding_keys.peer_enc.master_id.ediv + : connection->bonding_keys.own_enc.master_id.ediv; + + // Is there an existing keys block that matches? + bonding_block_t *existing_block = find_existing_block(connection->is_central, BLOCK_KEYS, ediv); + if (existing_block) { + if (existing_block->data_length == sizeof(bonding_keys_t) && + memcmp(existing_block->data, &connection->bonding_keys, sizeof(bonding_keys_t)) == 0) { + // Identical block found. No need to store again. + return; + } + // Data doesn't match. Invalidate block and store a new one. + invalidate_block(existing_block); + } + + bonding_block_t block_header = { + .is_central = connection->is_central, + .type = BLOCK_KEYS, + .ediv = ediv, + .conn_handle = connection->conn_handle, + .data_length = sizeof(bonding_keys_t), + }; + bonding_block_t *new_block = find_unused_block(sizeof(bonding_keys_t)); + write_block_header(new_block, &block_header); + write_block_data(new_block, (uint8_t *) &connection->bonding_keys, sizeof(bonding_keys_t)); +} + +void bonding_clear_keys(bonding_keys_t *bonding_keys) { + memset((uint8_t*) bonding_keys, 0, sizeof(bonding_keys_t)); +} + +void bonding_reset(void) { + if (BONDING_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || + BONDING_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { + bonding_erase_storage(); + } +} + +// Write bonding blocks to flash. Requests have been queued during evt handlers. +void bonding_background(void) { + // A paired connection will request that its keys and CCCD values be stored. + // The CCCD store whenever a CCCD value is written. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + + // Wait at least one second before saving CCCD, to consolidate + // writes that involve multiple CCCDs. For instance, for HID, + // three CCCD's are set in short succession by the HID client. + if (connection->do_bond_cccds) { + uint64_t current_ticks_ms = supervisor_ticks_ms64(); + if (current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) { + write_sys_attr_block(connection); + connection->do_bond_cccds = false; + } + } + + if (connection->do_bond_keys) { + write_keys_block(connection); + connection->do_bond_keys = false; + } + } +} + +bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { + bonding_block_t *block = find_existing_block(is_central, BLOCK_SYS_ATTR, ediv); + if (block == NULL) { + return false; + } + + return NRF_SUCCESS == + sd_ble_gatts_sys_attr_set(conn_handle, block->data, block->data_length, SYS_ATTR_FLAGS); +} + +bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { + bonding_block_t *block = find_existing_block(is_central, BLOCK_KEYS, ediv); + if (block == NULL) { + return false; + } + if (sizeof(bonding_keys_t) != block->data_length) { + // bonding_keys_t is a fixed length, so lengths should match. + return false; + } + + memcpy(bonding_keys, block->data, block->data_length); + return true; +} diff --git a/ports/nrf/common-hal/_bleio/bonding.h b/ports/nrf/common-hal/_bleio/bonding.h new file mode 100644 index 0000000000000..cb8e7c427bcd7 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/bonding.h @@ -0,0 +1,85 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H + +#include +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "common-hal/_bleio/__init__.h" + +#define EDIV_INVALID (0xffff) + +#define BONDING_DEBUG (1) +#if BONDING_DEBUG + #define BONDING_DEBUG_PRINTF(...) printf(__VA_ARGS__) + #define BONDING_DEBUG_PRINT_BLOCK(block) bonding_print_block(block) + #define BONDING_DEBUG_PRINT_KEYS(keys) bonding_print_keys(keys) +#else + #define BONDING_DEBUG_PRINTF(...) + #define BONDING_DEBUG_PRINT_BLOCK(block) + #define BONDING_DEBUG_PRINT_KEYS(keys) +#endif + +// Bonding data is stored in variable-length blocks consecutively in +// erased flash (all 1's). The blocks are 32-bit aligned, though the +// data may be any number of bytes. We hop through the blocks using +// the size field to find the next block. When we hit a word that is +// all 1's, we have reached the end of the blocks. We can write a new +// block there. + +typedef enum { + BLOCK_INVALID = 0, // Ignore this block + BLOCK_KEYS = 1, // Block contains bonding keys. + BLOCK_SYS_ATTR = 2, // Block contains sys_attr values (CCCD settings, etc.). + BLOCK_UNUSED = 0xff, // Initial erased value. +} bonding_block_type_t; + +typedef struct { + bool is_central: 1; // 1 if data is for a central role. + uint16_t reserved: 7; // Not currently used + bonding_block_type_t type: 8; // What kind of data is stored in. + uint16_t ediv; // ediv value; used as a lookup key. + uint16_t conn_handle; // Connection handle: used when a BLOCK_SYS_ATTR is queued to write. + // Not used as a key, etc. + uint16_t data_length; // Length of data in bytes, including ediv, not including padding. + // End of block header. 32-bit boundary here. + uint8_t data[]; // Rest of data in the block. Needs to be 32-bit aligned. + // Block is padded to 32-bit alignment. +} bonding_block_t; + +void bonding_background(void); +void bonding_erase_storage(void); +void bonding_reset(void); +void bonding_clear_keys(bonding_keys_t *bonding_keys); +bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); +bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H diff --git a/ports/nrf/common-hal/analogio/AnalogIn.c b/ports/nrf/common-hal/analogio/AnalogIn.c index 9923e62f5b2a4..dbcc5281ce477 100644 --- a/ports/nrf/common-hal/analogio/AnalogIn.c +++ b/ports/nrf/common-hal/analogio/AnalogIn.c @@ -3,6 +3,7 @@ * * The MIT License (MIT) * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -25,94 +26,97 @@ */ #include "common-hal/analogio/AnalogIn.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" -#include +#include "nrf_saadc.h" +#include "nrf_gpio.h" -#include "py/gc.h" -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/binary.h" -#include "py/mphal.h" -#include "shared-bindings/analogio/AnalogIn.h" -#include "nrf.h" - -void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, const mcu_pin_obj_t *pin) { - if (!pin->adc_channel) { - // No ADC function on that pin - mp_raise_ValueError("Pin does not have ADC capabilities"); - } - - hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); +#define CHANNEL_NO 0 + +void analogin_init(void) { + // Calibrate the ADC once, on startup. + nrf_saadc_enable(NRF_SAADC); + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE); + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_CALIBRATEOFFSET); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE) == 0) { } + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_CALIBRATEDONE); + nrf_saadc_disable(NRF_SAADC); +} + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const mcu_pin_obj_t *pin) { + if (pin->adc_channel == 0) + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + + nrf_gpio_cfg_default(pin->number); + + claim_pin(pin); self->pin = pin; } bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { - if (common_hal_analogio_analogin_deinited(self)) { + if (common_hal_analogio_analogin_deinited(self)) return; - } - reset_pin(self->pin->pin); - self->pin = mp_const_none; -} -void analogin_reset() { + nrf_gpio_cfg_default(self->pin->number); + + reset_pin_number(self->pin->number); + self->pin = NULL; } uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { - // Something else might have used the ADC in a different way, - // so we completely re-initialize it. - - int16_t value; - - NRF_SAADC->RESOLUTION = SAADC_RESOLUTION_VAL_14bit; - NRF_SAADC->ENABLE = 1; - - for (int i = 0; i < 8; i++) { - NRF_SAADC->CH[i].PSELN = SAADC_CH_PSELP_PSELP_NC; - NRF_SAADC->CH[i].PSELP = SAADC_CH_PSELP_PSELP_NC; - } - - NRF_SAADC->CH[0].CONFIG = ((SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk) - | ((SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) - | ((SAADC_CH_CONFIG_GAIN_Gain1_6 << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk) - | ((SAADC_CH_CONFIG_REFSEL_Internal << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk) - | ((SAADC_CH_CONFIG_TACQ_3us << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk) - | ((SAADC_CH_CONFIG_MODE_SE << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk); - NRF_SAADC->CH[0].PSELN = self->pin->adc_channel; - NRF_SAADC->CH[0].PSELP = self->pin->adc_channel; + // Something else might have used the ADC in a different way, + // so we completely re-initialize it. + nrf_saadc_value_t value; - NRF_SAADC->RESULT.PTR = (uint32_t)&value; - NRF_SAADC->RESULT.MAXCNT = 1; + const nrf_saadc_channel_config_t config = { + .resistor_p = NRF_SAADC_RESISTOR_DISABLED, + .resistor_n = NRF_SAADC_RESISTOR_DISABLED, + .gain = NRF_SAADC_GAIN1_4, + .reference = NRF_SAADC_REFERENCE_VDD4, + .acq_time = NRF_SAADC_ACQTIME_3US, + .mode = NRF_SAADC_MODE_SINGLE_ENDED, + .burst = NRF_SAADC_BURST_DISABLED + }; - NRF_SAADC->TASKS_START = 0x01UL; + nrf_saadc_resolution_set(NRF_SAADC, NRF_SAADC_RESOLUTION_14BIT); + nrf_saadc_oversample_set(NRF_SAADC, NRF_SAADC_OVERSAMPLE_DISABLED); + nrf_saadc_enable(NRF_SAADC); - while (!NRF_SAADC->EVENTS_STARTED); - NRF_SAADC->EVENTS_STARTED = 0x00UL; + for (uint32_t i = 0; i < SAADC_CH_NUM; i++) + nrf_saadc_channel_input_set(NRF_SAADC, i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); - NRF_SAADC->TASKS_SAMPLE = 0x01UL; + nrf_saadc_channel_init(NRF_SAADC, CHANNEL_NO, &config); + nrf_saadc_channel_input_set(NRF_SAADC, CHANNEL_NO, self->pin->adc_channel, self->pin->adc_channel); + nrf_saadc_buffer_init(NRF_SAADC, &value, 1); - while (!NRF_SAADC->EVENTS_END); - NRF_SAADC->EVENTS_END = 0x00UL; + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STARTED) == 0); + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STARTED); - NRF_SAADC->TASKS_STOP = 0x01UL; + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_END) == 0); + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END); - while (!NRF_SAADC->EVENTS_STOPPED); - NRF_SAADC->EVENTS_STOPPED = 0x00UL; + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STOPPED) == 0); + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STOPPED); - if (value < 0) { - value = 0; - } + nrf_saadc_disable(NRF_SAADC); - NRF_SAADC->ENABLE = 0; + if (value < 0) + value = 0; - // Map value to from 14 to 16 bits - return (value << 2); + // Map value to from 14 to 16 bits + return (value << 2); } float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + // The nominal VCC voltage return 3.3f; } diff --git a/ports/nrf/common-hal/analogio/AnalogIn.h b/ports/nrf/common-hal/analogio/AnalogIn.h index 95f599e7115d2..a268bb54e4041 100644 --- a/ports/nrf/common-hal/analogio/AnalogIn.h +++ b/ports/nrf/common-hal/analogio/AnalogIn.h @@ -36,6 +36,6 @@ typedef struct { const mcu_pin_obj_t * pin; } analogio_analogin_obj_t; -void analogin_reset(void); +void analogin_init(void); #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/nrf/common-hal/analogio/AnalogOut.c b/ports/nrf/common-hal/analogio/AnalogOut.c index d1fd4982b1efd..adafa15d5c913 100644 --- a/ports/nrf/common-hal/analogio/AnalogOut.c +++ b/ports/nrf/common-hal/analogio/AnalogOut.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2018 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,17 @@ * THE SOFTWARE. */ +#include "shared-bindings/analogio/AnalogOut.h" + #include #include #include "py/mperrno.h" #include "py/runtime.h" - -#include "shared-bindings/analogio/AnalogOut.h" - +#include "supervisor/shared/translate.h" void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - mp_raise_RuntimeError("AnalogOut functionality not supported"); + mp_raise_RuntimeError(translate("AnalogOut functionality not supported")); } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { @@ -42,9 +42,7 @@ bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - } void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { - } diff --git a/ports/nrf/common-hal/audiobusio/I2SOut.c b/ports/nrf/common-hal/audiobusio/I2SOut.c new file mode 100644 index 0000000000000..ead92b0000ca2 --- /dev/null +++ b/ports/nrf/common-hal/audiobusio/I2SOut.c @@ -0,0 +1,338 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/audiobusio/I2SOut.h" +#include "shared-bindings/audiobusio/I2SOut.h" +#include "shared-module/audiocore/__init__.h" + +#include "py/obj.h" +#include "py/runtime.h" + +static audiobusio_i2sout_obj_t *instance; + +struct { int16_t l, r; } static_sample16 = {0x8000, 0x8000}; +struct { uint8_t l1, r1, l2, r2; } static_sample8 = {0x80, 0x80, 0x80, 0x80}; + +struct frequency_info { uint32_t RATIO; uint32_t MCKFREQ; int sample_rate; float abserr; }; +struct ratio_info { uint32_t RATIO; int16_t divisor; bool can_16bit; }; +struct ratio_info ratios[] = { + { I2S_CONFIG_RATIO_RATIO_32X, 32, true }, + { I2S_CONFIG_RATIO_RATIO_48X, 48, false }, + { I2S_CONFIG_RATIO_RATIO_64X, 64, true }, + { I2S_CONFIG_RATIO_RATIO_96X, 96, true }, + { I2S_CONFIG_RATIO_RATIO_128X, 128, true }, + { I2S_CONFIG_RATIO_RATIO_192X, 192, true }, + { I2S_CONFIG_RATIO_RATIO_256X, 256, true }, + { I2S_CONFIG_RATIO_RATIO_384X, 384, true }, + { I2S_CONFIG_RATIO_RATIO_512X, 512, true }, +}; + +struct mclk_info { uint32_t MCKFREQ; int divisor; }; +struct mclk_info mclks[] = { + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8, 8 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10, 10 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11, 11 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15, 15 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16, 16 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21, 21 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23, 23 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31, 31 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42, 42 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63, 63 }, + { I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125, 125 }, +}; + +static void calculate_ratio_info(uint32_t target_sample_rate, struct frequency_info *info, + int ratio_index, int mclk_index) { + info->RATIO = ratios[ratio_index].RATIO; + info->MCKFREQ = mclks[mclk_index].MCKFREQ; + info->sample_rate = 32000000 + / ratios[ratio_index].divisor / mclks[mclk_index].divisor; + info->abserr = fabsf(1.0f * target_sample_rate - info->sample_rate) + / target_sample_rate; +} + +void choose_i2s_clocking(audiobusio_i2sout_obj_t *self, uint32_t sample_rate) { + struct frequency_info best = {0, 0, 0, 1.0}; + for (size_t ri=0; riCONFIG.SWIDTH == I2S_CONFIG_SWIDTH_SWIDTH_16Bit + && !ratios[ri].can_16bit) { + continue; + } + + for (size_t mi=0; miCONFIG.RATIO = best.RATIO; + NRF_I2S->CONFIG.MCKFREQ = best.MCKFREQ; + self->sample_rate = best.sample_rate; +} + +static void i2s_buffer_fill(audiobusio_i2sout_obj_t* self) { + void *buffer = self->buffers[self->next_buffer]; + void *buffer_start = buffer; + NRF_I2S->TXD.PTR = (uintptr_t)buffer; + self->next_buffer = !self->next_buffer; + size_t bytesleft = self->buffer_length; + + while (!self->paused && !self->stopping && bytesleft) { + if (self->sample_data == self->sample_end) { + uint32_t sample_buffer_length; + audioio_get_buffer_result_t get_buffer_result = + audiosample_get_buffer(self->sample, false, 0, + &self->sample_data, &sample_buffer_length); + self->sample_end = self->sample_data + sample_buffer_length; + if (get_buffer_result == GET_BUFFER_DONE) { + if (self->loop) { + audiosample_reset_buffer(self->sample, false, 0); + } else { + self->stopping = true; + break; + } + } + if (get_buffer_result == GET_BUFFER_ERROR || sample_buffer_length == 0) { + self->stopping = true; + break; + } + } + uint16_t bytecount = MIN(bytesleft, (size_t)(self->sample_end - self->sample_data)); + if (self->samples_signed) { + memcpy(buffer, self->sample_data, bytecount); + } else if (self->bytes_per_sample == 2) { + uint16_t *bp = (uint16_t*)buffer; + uint16_t *be = (uint16_t*)(buffer + bytecount); + uint16_t *sp = (uint16_t*)self->sample_data; + for (; bp < be;) { + *bp++ = *sp++ + 0x8000; + } + } else { + uint8_t *bp = (uint8_t*)buffer; + uint8_t *be = (uint8_t*)(buffer + bytecount); + uint8_t *sp = (uint8_t*)self->sample_data; + for (; bp < be;) { + *bp++ = *sp++ + 0x80; + } + } + buffer += bytecount; + self->sample_data += bytecount; + bytesleft -= bytecount; + } + + // Find the last frame of real audio data and replicate its samples until + // you have 32 bits worth, which is the fundamental unit of nRF I2S DMA + if(buffer != buffer_start) { + if (self->bytes_per_sample == 1 && self->channel_count == 1) { + // For 8-bit mono, 4 copies of the final sample are required + self->hold_value = 0x01010101 * *(uint8_t*)(buffer-1); + } else if (self->bytes_per_sample == 2 && self->channel_count == 2) { + // For 16-bit stereo, 1 copy of the final sample is required + self->hold_value = *(uint32_t*)(buffer-4); + } else { + // For 8-bit stereo and 16-bit mono, 2 copies of the final sample are required + self->hold_value = 0x00010001 * *(uint16_t*)(buffer-2); + } + } + + // Emulate pausing and stopping by filling the DMA buffer with copies of + // the last sample. This includes the case where this iteration of + // i2s_buffer_fill exhausted a non-looping sample. + if (self->paused || self->stopping) { + if (self->stopping) { + NRF_I2S->TASKS_STOP = 1; + self->playing = false; + } + uint32_t *bp = (uint32_t*)buffer; + uint32_t *be = (uint32_t*)(buffer + bytesleft); + for (; bp != be; ) + *bp++ = self->hold_value; + return; + } +} + +void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t* self, + const mcu_pin_obj_t* bit_clock, const mcu_pin_obj_t* word_select, + const mcu_pin_obj_t* data, bool left_justified) { + if (instance) + mp_raise_RuntimeError(translate("Device in use")); + instance = self; + + claim_pin(bit_clock); + claim_pin(word_select); + claim_pin(data); + + NRF_I2S->PSEL.SCK = self->bit_clock_pin_number = bit_clock->number; + NRF_I2S->PSEL.LRCK = self->word_select_pin_number = word_select->number; + NRF_I2S->PSEL.SDOUT = self->data_pin_number = data->number; + + NRF_I2S->CONFIG.MODE = I2S_CONFIG_MODE_MODE_Master; + NRF_I2S->CONFIG.RXEN = I2S_CONFIG_RXEN_RXEN_Disabled; + NRF_I2S->CONFIG.TXEN = I2S_CONFIG_TXEN_TXEN_Enabled; + NRF_I2S->CONFIG.MCKEN = I2S_CONFIG_MCKEN_MCKEN_Enabled; + NRF_I2S->CONFIG.SWIDTH = I2S_CONFIG_SWIDTH_SWIDTH_16Bit; + + NRF_I2S->CONFIG.ALIGN = I2S_CONFIG_ALIGN_ALIGN_Left; + NRF_I2S->CONFIG.FORMAT = left_justified ? I2S_CONFIG_FORMAT_FORMAT_Aligned + : I2S_CONFIG_FORMAT_FORMAT_I2S; +} + +bool common_hal_audiobusio_i2sout_deinited(audiobusio_i2sout_obj_t* self) { + return self->data_pin_number == 0xff; +} + +void common_hal_audiobusio_i2sout_deinit(audiobusio_i2sout_obj_t* self) { + if (common_hal_audiobusio_i2sout_deinited(self)) { + return; + } + NRF_I2S->TASKS_STOP = 1; + NRF_I2S->ENABLE = I2S_ENABLE_ENABLE_Disabled; + reset_pin_number(self->bit_clock_pin_number); + self->bit_clock_pin_number = 0xff; + reset_pin_number(self->word_select_pin_number); + self->word_select_pin_number = 0xff; + reset_pin_number(self->data_pin_number); + self->data_pin_number = 0xff; + instance = NULL; +} + +void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, + mp_obj_t sample, bool loop) { + if (common_hal_audiobusio_i2sout_get_playing(self)) { + common_hal_audiobusio_i2sout_stop(self); + } + + self->sample = sample; + self->loop = loop; + uint32_t sample_rate = audiosample_sample_rate(sample); + self->bytes_per_sample = audiosample_bits_per_sample(sample) / 8; + + uint32_t max_buffer_length; + bool single_buffer, samples_signed; + audiosample_get_buffer_structure(sample, /* single channel */ true, + &single_buffer, &samples_signed, &max_buffer_length, + &self->channel_count); + self->single_buffer = single_buffer; + self->samples_signed = samples_signed; + + + NRF_I2S->CONFIG.SWIDTH = self->bytes_per_sample == 1 + ? I2S_CONFIG_SWIDTH_SWIDTH_8Bit + : I2S_CONFIG_SWIDTH_SWIDTH_16Bit; + NRF_I2S->CONFIG.CHANNELS = self->channel_count == 1 + ? I2S_CONFIG_CHANNELS_CHANNELS_Left + : I2S_CONFIG_CHANNELS_CHANNELS_Stereo; + + choose_i2s_clocking(self, sample_rate); + /* Allocate buffers based on a maximum duration + * This duration was chosen empirically based on what would + * cause os.listdir('') to cause stuttering. It seems like a + * rather long time. + */ + enum { buffer_length_ms = 16 }; + self->buffer_length = sample_rate * buffer_length_ms + * self->bytes_per_sample * self->channel_count / 1000; + self->buffer_length = (self->buffer_length + 3) & ~3; + self->buffers[0] = m_malloc(self->buffer_length, false); + self->buffers[1] = m_malloc(self->buffer_length, false); + + + audiosample_reset_buffer(self->sample, false, 0); + + self->next_buffer = 0; + self->sample_data = self->sample_end = 0; + self->playing = true; + self->paused = false; + self->stopping = false; + i2s_buffer_fill(self); + + NRF_I2S->RXTXD.MAXCNT = self->buffer_length / 4; + NRF_I2S->ENABLE = I2S_ENABLE_ENABLE_Enabled; + + NRF_I2S->TASKS_START = 1; + + i2s_background(); +} + +void common_hal_audiobusio_i2sout_pause(audiobusio_i2sout_obj_t* self) { + self->paused = true; +} + +void common_hal_audiobusio_i2sout_resume(audiobusio_i2sout_obj_t* self) { + self->paused = false; +} + +bool common_hal_audiobusio_i2sout_get_paused(audiobusio_i2sout_obj_t* self) { + return self->paused; +} + +void common_hal_audiobusio_i2sout_stop(audiobusio_i2sout_obj_t* self) { + NRF_I2S->TASKS_STOP = 1; + self->stopping = true; +} + +bool common_hal_audiobusio_i2sout_get_playing(audiobusio_i2sout_obj_t* self) { + if (NRF_I2S->EVENTS_STOPPED) { + self->playing = false; + NRF_I2S->EVENTS_STOPPED = 0; + } + return self->playing; +} + +void i2s_background(void) { + if (NRF_I2S->EVENTS_TXPTRUPD) { + NRF_I2S->EVENTS_TXPTRUPD = 0; + if (instance) { + i2s_buffer_fill(instance); + } else { + NRF_I2S->TASKS_STOP = 1; + } + } +} + +void i2s_reset(void) { + NRF_I2S->TASKS_STOP = 1; + NRF_I2S->ENABLE = I2S_ENABLE_ENABLE_Disabled; + NRF_I2S->PSEL.MCK = 0xFFFFFFFF; + NRF_I2S->PSEL.SCK = 0xFFFFFFFF; + NRF_I2S->PSEL.LRCK = 0xFFFFFFFF; + NRF_I2S->PSEL.SDOUT = 0xFFFFFFFF; + NRF_I2S->PSEL.SDIN = 0xFFFFFFFF; + instance = NULL; +} diff --git a/ports/nrf/common-hal/audiobusio/I2SOut.h b/ports/nrf/common-hal/audiobusio/I2SOut.h new file mode 100644 index 0000000000000..16047e0ab8eed --- /dev/null +++ b/ports/nrf/common-hal/audiobusio/I2SOut.h @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOBUSIO_I2SOUT_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOBUSIO_I2SOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + + mp_obj_t *sample; + uint8_t *buffers[2]; + uint8_t *sample_data, *sample_end; + + uint16_t buffer_length; + uint16_t sample_rate; + uint32_t hold_value; + + uint8_t next_buffer; + uint8_t bit_clock_pin_number; + uint8_t word_select_pin_number; + uint8_t data_pin_number; + + uint8_t channel_count; + uint8_t bytes_per_sample; + + bool left_justified : 1; + bool playing : 1; + bool stopping : 1; + bool paused : 1; + bool loop : 1; + bool samples_signed : 1; + bool single_buffer : 1; +} audiobusio_i2sout_obj_t; + +void i2s_reset(void); +void i2s_background(void); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOBUSIO_I2SOUT_H diff --git a/ports/nrf/common-hal/audiobusio/PDMIn.c b/ports/nrf/common-hal/audiobusio/PDMIn.c new file mode 100644 index 0000000000000..ddd34174b215f --- /dev/null +++ b/ports/nrf/common-hal/audiobusio/PDMIn.c @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/audiobusio/PDMIn.h" +#include "shared-bindings/microcontroller/Pin.h" + +#include "py/runtime.h" + +__attribute__((used)) +NRF_PDM_Type *nrf_pdm = NRF_PDM; + +static uint32_t dummy_buffer[4]; + +// Caller validates that pins are free. +void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, + const mcu_pin_obj_t* clock_pin, + const mcu_pin_obj_t* data_pin, + uint32_t sample_rate, + uint8_t bit_depth, + bool mono, + uint8_t oversample) { + claim_pin(clock_pin); + claim_pin(data_pin); + + self->mono = mono; + self->clock_pin_number = clock_pin->number; + self->data_pin_number = data_pin->number; + + if (sample_rate != 16000) { + mp_raise_ValueError(translate("only sample_rate=16000 is supported")); + } + if (bit_depth != 16) { + mp_raise_ValueError(translate("only bit_depth=16 is supported")); + } + nrf_pdm->PSEL.CLK = self->clock_pin_number; + nrf_pdm->PSEL.DIN = self->data_pin_number; + nrf_pdm->PDMCLKCTRL = PDM_PDMCLKCTRL_FREQ_Default; // For Ratio64 + nrf_pdm->RATIO = PDM_RATIO_RATIO_Ratio64; + nrf_pdm->GAINL = PDM_GAINL_GAINL_DefaultGain; + nrf_pdm->GAINR = PDM_GAINR_GAINR_DefaultGain; + nrf_pdm->ENABLE = 1; + + nrf_pdm->SAMPLE.PTR = (uintptr_t)&dummy_buffer; + nrf_pdm->SAMPLE.MAXCNT = 1; + nrf_pdm->TASKS_START = 1; +} + +bool common_hal_audiobusio_pdmin_deinited(audiobusio_pdmin_obj_t* self) { + return !self->clock_pin_number; +} + +void common_hal_audiobusio_pdmin_deinit(audiobusio_pdmin_obj_t* self) { + nrf_pdm->ENABLE = 0; + + reset_pin_number(self->clock_pin_number); + self->clock_pin_number = 0; + reset_pin_number(self->data_pin_number); + self->data_pin_number = 0; +} + +uint8_t common_hal_audiobusio_pdmin_get_bit_depth(audiobusio_pdmin_obj_t* self) { + return 16; +} + +uint32_t common_hal_audiobusio_pdmin_get_sample_rate(audiobusio_pdmin_obj_t* self) { + return 16000; +} + +uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* self, + uint16_t* output_buffer, uint32_t output_buffer_length) { + // Note: Adafruit's module has SELECT pulled to GND, which makes the DATA + // valid when the CLK is low, therefore it must be sampled on the rising edge. + if (self->mono) { + nrf_pdm->MODE = PDM_MODE_OPERATION_Stereo | PDM_MODE_EDGE_LeftRising; + } else { + nrf_pdm->MODE = PDM_MODE_OPERATION_Mono | PDM_MODE_EDGE_LeftRising; + } + + // step 1. Redirect to real buffer + nrf_pdm->SAMPLE.PTR = (uintptr_t)output_buffer; + nrf_pdm->SAMPLE.MAXCNT = output_buffer_length; + + // a delay is the safest simple way to ensure that the above requested sample has started + mp_hal_delay_us(200); + nrf_pdm->EVENTS_END = 0; + + // step 2. Registers are double buffered, so pre-redirect back to dummy buffer + nrf_pdm->SAMPLE.PTR = (uintptr_t)&dummy_buffer; + nrf_pdm->SAMPLE.MAXCNT = 1; + + // Step 3. wait for PDM to end + while (!nrf_pdm->EVENTS_END) { + MICROPY_VM_HOOK_LOOP; + } + + // Step 4. They want unsigned + for (uint32_t i=0; imono) { + return (output_buffer_length / 2) * 2; + } else { + return (output_buffer_length / 4) * 4; + } +} diff --git a/ports/nrf/common-hal/audiobusio/PDMIn.h b/ports/nrf/common-hal/audiobusio/PDMIn.h new file mode 100644 index 0000000000000..d921e42ff38aa --- /dev/null +++ b/ports/nrf/common-hal/audiobusio/PDMIn.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t clock_pin_number, data_pin_number; + bool mono; +} audiobusio_pdmin_obj_t; + +#endif diff --git a/ports/nrf/common-hal/audiobusio/__init__.c b/ports/nrf/common-hal/audiobusio/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c new file mode 100644 index 0000000000000..7b99901d5c204 --- /dev/null +++ b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.c @@ -0,0 +1,321 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "extmod/vfs_fat.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/audiopwmio/PWMAudioOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/audiopwmio/PWMAudioOut.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +// TODO: This should be the same size as PWMOut.c:pwms[], but there's no trivial way to accomplish that +STATIC audiopwmio_pwmaudioout_obj_t* active_audio[4]; + +#define F_TARGET (62500) +#define F_PWM (16000000) +// return the REFRESH value, store the TOP value in an out-parameter +// Tested for key values (worst relative error = 0.224% = 3.84 cents) +// 8000: top = 250 refresh = 7 [ 8000.0] +// 22050: top = 242 refresh = 2 [22038.5] +// 24000: top = 222 refresh = 2 [24024.0] +// 44100: top = 181 refresh = 1 [44198.8] +// 48000: top = 167 refresh = 1 [47904.1] +STATIC uint32_t calculate_pwm_parameters(uint32_t sample_rate, uint32_t *top_out) { + // the desired frequency is the closest integer multiple of sample_rate not less than F_TARGET + uint32_t desired_frequency = (F_TARGET + sample_rate - 1) / sample_rate * sample_rate; + // The top value is the PWM frequency divided by the desired frequency (round to nearest) + uint32_t top = (F_PWM + desired_frequency/2) / desired_frequency; + // The actual frequency is the PWM frequency divided by the top value (round to nearest) + uint32_t actual_frequency = (F_PWM + top/2) / top; + // The multiplier is the actual frequency divided by the sample rate (round to nearest) + uint32_t multiplier = (actual_frequency + sample_rate/2) / sample_rate; + *top_out = top; + return multiplier - 1; +} + +STATIC void activate_audiopwmout_obj(audiopwmio_pwmaudioout_obj_t *self) { + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (!active_audio[i]) { + active_audio[i] = self; + break; + } + } +} +STATIC void deactivate_audiopwmout_obj(audiopwmio_pwmaudioout_obj_t *self) { + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (active_audio[i] == self) { + active_audio[i] = NULL; + } + } +} + +void audiopwmout_reset() { + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + active_audio[i] = NULL; + } +} + +STATIC void fill_buffers(audiopwmio_pwmaudioout_obj_t *self, int buf) { + self->pwm->EVENTS_SEQSTARTED[1-buf] = 0; + uint16_t *dev_buffer = self->buffers[buf]; + uint8_t *buffer; + uint32_t buffer_length; + audioio_get_buffer_result_t get_buffer_result = + audiosample_get_buffer(self->sample, false, 0, + &buffer, &buffer_length); + if (get_buffer_result == GET_BUFFER_ERROR) { + common_hal_audiopwmio_pwmaudioout_stop(self); + return; + } + uint32_t num_samples = buffer_length / self->bytes_per_sample / self->sample_channel_count; + uint16_t *end_dev_buffer = dev_buffer + 2 * num_samples; + + if (self->bytes_per_sample == 1) { + uint8_t offset = self->signed_to_unsigned ? 0x80 : 0; + uint16_t scale = self->scale; + while (dev_buffer < end_dev_buffer) { + uint8_t rawval = (*buffer++ + offset); + uint16_t val = (uint16_t)(((uint32_t)rawval * (uint32_t)scale) >> 8); + *dev_buffer++ = val; + if (self->sample_channel_count == 1) + *dev_buffer++ = val; + } + } else { + uint16_t offset = self->signed_to_unsigned ? 0x8000 : 0; + uint16_t scale = self->scale; + uint16_t *buffer16 = (uint16_t*)buffer; + while (dev_buffer < end_dev_buffer) { + uint16_t rawval = (*buffer16++ + offset); + uint16_t val = (uint16_t)((rawval * (uint32_t)scale) >> 16); + *dev_buffer++ = val; + if (self->sample_channel_count == 1) + *dev_buffer++ = val; + } + } + self->pwm->SEQ[buf].PTR = (intptr_t)self->buffers[buf]; + self->pwm->SEQ[buf].CNT = num_samples*2; + + if (self->loop && get_buffer_result == GET_BUFFER_DONE) { + audiosample_reset_buffer(self->sample, false, 0); + } else if (get_buffer_result == GET_BUFFER_DONE) { + self->pwm->SHORTS = NRF_PWM_SHORT_SEQEND0_STOP_MASK | NRF_PWM_SHORT_SEQEND1_STOP_MASK; + self->stopping = true; + } +} + +STATIC void audiopwmout_background_obj(audiopwmio_pwmaudioout_obj_t *self) { + if (!common_hal_audiopwmio_pwmaudioout_get_playing(self)) + return; + if (self->stopping) { + bool stopped = + (self->pwm->EVENTS_SEQEND[0] || !self->pwm->EVENTS_SEQSTARTED[0]) && + (self->pwm->EVENTS_SEQEND[1] || !self->pwm->EVENTS_SEQSTARTED[1]); + if (stopped) + self->pwm->TASKS_STOP = 1; + } else if (!self->paused && !self->single_buffer) { + if (self->pwm->EVENTS_SEQSTARTED[0]) fill_buffers(self, 1); + if (self->pwm->EVENTS_SEQSTARTED[1]) fill_buffers(self, 0); + } +} + +void audiopwmout_background() { + for (size_t i=0; i < MP_ARRAY_SIZE(active_audio); i++) { + if (!active_audio[i]) continue; + audiopwmout_background_obj(active_audio[i]); + } +} + +// Caller validates that pins are free. +void common_hal_audiopwmio_pwmaudioout_construct(audiopwmio_pwmaudioout_obj_t* self, + const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t quiescent_value) { + self->pwm = pwmout_allocate(256, PWM_PRESCALER_PRESCALER_DIV_1, true, NULL, NULL); + if (!self->pwm) { + mp_raise_RuntimeError(translate("All timers in use")); + } + + self->pwm->PRESCALER = PWM_PRESCALER_PRESCALER_DIV_1; + // two uint16_t values per sample when Grouped + // n.b. SEQ[#].CNT "counts" are 2 per sample (left and right channels) + self->pwm->DECODER = PWM_DECODER_LOAD_Grouped; + + // we use channels 0 and 2 because these are GROUPED; it lets us save half + // the space for sample data (no additional optimization is possible for + // single channel) + self->pwm->PSEL.OUT[0] = self->left_channel_number = left_channel->number; + claim_pin(left_channel); + + if (right_channel) + { + self->pwm->PSEL.OUT[2] = self->right_channel_number = right_channel->number; + claim_pin(right_channel); + } + + self->quiescent_value = quiescent_value >> 8; + + self->pwm->ENABLE = 1; + // TODO: Ramp from 0 to quiescent value +} + +bool common_hal_audiopwmio_pwmaudioout_deinited(audiopwmio_pwmaudioout_obj_t* self) { + return !self->pwm; +} + +void common_hal_audiopwmio_pwmaudioout_deinit(audiopwmio_pwmaudioout_obj_t* self) { + if (common_hal_audiopwmio_pwmaudioout_deinited(self)) { + return; + } + deactivate_audiopwmout_obj(self); + + // TODO: ramp the pwm down from quiescent value to 0 + self->pwm->ENABLE = 0; + + if (self->left_channel_number) + reset_pin_number(self->left_channel_number); + if (self->right_channel_number) + reset_pin_number(self->right_channel_number); + + pwmout_free_channel(self->pwm, 0); + pwmout_free_channel(self->pwm, 2); + + self->pwm = NULL; + + m_free(self->buffers[0]); + self->buffers[0] = NULL; + + m_free(self->buffers[1]); + self->buffers[1] = NULL; +} + +void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t* self, mp_obj_t sample, bool loop) { + if (common_hal_audiopwmio_pwmaudioout_get_playing(self)) { + common_hal_audiopwmio_pwmaudioout_stop(self); + } + self->sample = sample; + self->loop = loop; + + uint32_t sample_rate = audiosample_sample_rate(sample); + self->bytes_per_sample = audiosample_bits_per_sample(sample) / 8; + + uint32_t max_buffer_length; + uint8_t spacing; + audiosample_get_buffer_structure(sample, /* single channel */ false, + &self->single_buffer, &self->signed_to_unsigned, &max_buffer_length, + &spacing); + self->sample_channel_count = audiosample_channel_count(sample); + + if (max_buffer_length > UINT16_MAX) { + mp_raise_ValueError_varg(translate("Buffer length %d too big. It must be less than %d"), max_buffer_length, UINT16_MAX); + } + self->buffer_length = (uint16_t)max_buffer_length; + self->buffers[0] = m_malloc(self->buffer_length * 2 * sizeof(uint16_t), false); + if (!self->single_buffer) + self->buffers[1] = m_malloc(self->buffer_length * 2 * sizeof(uint16_t), false); + + + uint32_t top; + self->pwm->SEQ[0].REFRESH = self->pwm->SEQ[1].REFRESH = calculate_pwm_parameters(sample_rate, &top); + self->scale = top-1; + self->pwm->COUNTERTOP = top; + + self->pwm->LOOP = 1; + audiosample_reset_buffer(self->sample, false, 0); + activate_audiopwmout_obj(self); + self->stopping = false; + self->pwm->SHORTS = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; + fill_buffers(self, 0); + self->pwm->SEQ[1].PTR = self->pwm->SEQ[0].PTR; + self->pwm->SEQ[1].CNT = self->pwm->SEQ[0].CNT; + self->pwm->EVENTS_SEQSTARTED[0] = 0; + self->pwm->EVENTS_SEQSTARTED[1] = 0; + self->pwm->EVENTS_SEQEND[0] = 0; + self->pwm->EVENTS_SEQEND[1] = 0; + self->pwm->EVENTS_STOPPED = 0; + self->pwm->TASKS_SEQSTART[0] = 1; + self->playing = true; + self->paused = false; +} + +void common_hal_audiopwmio_pwmaudioout_stop(audiopwmio_pwmaudioout_obj_t* self) { + deactivate_audiopwmout_obj(self); + self->pwm->TASKS_STOP = 1; + self->stopping = false; + self->paused = false; + + m_free(self->buffers[0]); + self->buffers[0] = NULL; + + m_free(self->buffers[1]); + self->buffers[1] = NULL; +} + +bool common_hal_audiopwmio_pwmaudioout_get_playing(audiopwmio_pwmaudioout_obj_t* self) { + if (!self->paused && self->pwm->EVENTS_STOPPED) { + self->playing = false; + self->pwm->EVENTS_STOPPED = 0; + } + return self->playing; +} + +/* pause/resume present difficulties for the NRF PWM audio module. + * + * A PWM sequence can be stopped in its tracks by sending a TASKS_STOP event, + * but there's no way to pick up the sequence where it was stopped; you could + * start at the start of one of the two sequences, but especially for "single buffer" + * sample, this seems undesirable. + * + * Or, you can stop at the end of a sequence so that you don't duplicate anything + * when restarting, but again this is unsatisfactory for a "single buffer" sample. + * + * For now, I've taken the coward's way and left these methods unimplemented. + * Perhaps the way forward is to divide even "single buffer" samples into tasks of + * only a few ms long, so that they can be stopped/restarted quickly enough that it + * feels instant. (This also saves on memory, for long in-memory "single buffer" + * samples, since we have to locally take a resampled copy!) + */ +void common_hal_audiopwmio_pwmaudioout_pause(audiopwmio_pwmaudioout_obj_t* self) { + self->paused = true; + self->pwm->SHORTS = NRF_PWM_SHORT_SEQEND1_STOP_MASK; +} + +void common_hal_audiopwmio_pwmaudioout_resume(audiopwmio_pwmaudioout_obj_t* self) { + self->paused = false; + self->pwm->SHORTS = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; + if (self->pwm->EVENTS_STOPPED) { + self->pwm->EVENTS_STOPPED = 0; + self->pwm->TASKS_SEQSTART[0] = 1; + } +} + +bool common_hal_audiopwmio_pwmaudioout_get_paused(audiopwmio_pwmaudioout_obj_t* self) { + return self->paused; +} diff --git a/ports/nrf/common-hal/audiopwmio/PWMAudioOut.h b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.h new file mode 100644 index 0000000000000..ed00324c416f0 --- /dev/null +++ b/ports/nrf/common-hal/audiopwmio/PWMAudioOut.h @@ -0,0 +1,59 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOPWM_AUDIOOUT_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_AUDIOPWM_AUDIOOUT_H + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + mp_obj_t *sample; + NRF_PWM_Type *pwm; + uint16_t *buffers[2]; + + uint16_t buffer_length; + uint16_t quiescent_value; + uint16_t scale; + + uint8_t left_channel_number; + uint8_t right_channel_number; + uint8_t sample_channel_count; + uint8_t bytes_per_sample; + + bool playing; + bool stopping; + bool paused; + bool loop; + bool signed_to_unsigned; + bool single_buffer; +} audiopwmio_pwmaudioout_obj_t; + +void audiopwmout_reset(void); + +void audiopwmout_background(void); + +#endif diff --git a/ports/nrf/common-hal/audiopwmio/__init__.c b/ports/nrf/common-hal/audiopwmio/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/ports/nrf/common-hal/board/__init__.c b/ports/nrf/common-hal/board/__init__.c index 634760335e4f0..880033ed67964 100644 --- a/ports/nrf/common-hal/board/__init__.c +++ b/ports/nrf/common-hal/board/__init__.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2018 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,12 +23,3 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "common-hal/microcontroller/Pin.h" - -// Pins aren't actually defined here. They are in the board specific directory -// such as boards/arduino_zero/pins.c. diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c index 07b067a2cb1b3..37cb192df8868 100644 --- a/ports/nrf/common-hal/busio/I2C.c +++ b/ports/nrf/common-hal/busio/I2C.c @@ -3,8 +3,10 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Sandeep Mistry All right reserved. + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec * Copyright (c) 2017 hathach + * Copyright (c) 2016 Sandeep Mistry All right reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -26,49 +28,145 @@ */ #include "shared-bindings/busio/I2C.h" +#include "shared-bindings/microcontroller/__init__.h" #include "py/mperrno.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "nrfx_twim.h" +#include "nrfx_spim.h" +#include "nrf_gpio.h" + +// all TWI instances have the same max size +// 16 bits for 840, 10 bits for 810, 8 bits for 832 +#define I2C_MAX_XFER_LEN ((1UL << TWIM0_EASYDMA_MAXCNT_SIZE) - 1) + +STATIC twim_peripheral_t twim_peripherals[] = { +#if NRFX_CHECK(NRFX_TWIM0_ENABLED) + // SPIM0 and TWIM0 share an address. + { .twim = NRFX_TWIM_INSTANCE(0), + .in_use = false + }, +#endif +#if NRFX_CHECK(NRFX_TWIM1_ENABLED) + // SPIM1 and TWIM1 share an address. + { .twim = NRFX_TWIM_INSTANCE(1), + .in_use = false + }, +#endif +}; + +STATIC bool never_reset[MP_ARRAY_SIZE(twim_peripherals)]; + +void i2c_reset(void) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) { + if (never_reset[i]) { + continue; + } + nrfx_twim_uninit(&twim_peripherals[i].twim); + twim_peripherals[i].in_use = false; + } +} -#include "pins.h" -#include "nrf.h" +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) { + if (self->twim_peripheral == &twim_peripherals[i]) { + never_reset[i] = true; -void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency) { - if (scl->pin == sda->pin) { - mp_raise_ValueError("Invalid pins"); + never_reset_pin_number(self->scl_pin_number); + never_reset_pin_number(self->sda_pin_number); + break; + } } +} - NRF_GPIO->PIN_CNF[scl->pin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) - | ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) - | ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) - | ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) - | ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos); +static uint8_t twi_error_to_mp(const nrfx_err_t err) { + switch (err) { + case NRFX_ERROR_DRV_TWI_ERR_ANACK: + return MP_ENODEV; + case NRFX_ERROR_BUSY: + return MP_EBUSY; + case NRFX_ERROR_DRV_TWI_ERR_DNACK: + case NRFX_ERROR_INVALID_ADDR: + return MP_EIO; + default: + break; + } - NRF_GPIO->PIN_CNF[sda->pin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) - | ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) - | ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) - | ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) - | ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos); + return 0; +} - // 1 for I2C, 0 for SPI - self->twi = NRF_TWIM1; +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + if (scl->number == sda->number) { + mp_raise_ValueError(translate("Invalid pins")); + } - if ( frequency < 100000 ) { - self->twi->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K100; - }else if ( frequency < 250000 ) { - self->twi->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K250; - }else { - self->twi->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K400; + // Find a free instance. + self->twim_peripheral = NULL; + for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) { + if (!twim_peripherals[i].in_use) { + self->twim_peripheral = &twim_peripherals[i]; + // Mark it as in_use later after other validation is finished. + break; + } } - self->twi->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos); + if (self->twim_peripheral == NULL) { + mp_raise_ValueError(translate("All I2C peripherals are in use")); + } - self->twi->PSEL.SCL = scl->pin; - self->twi->PSEL.SDA = sda->pin; +#if CIRCUITPY_REQUIRE_I2C_PULLUPS + // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) + nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_PULLDOWN); + nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_PULLDOWN); + + common_hal_mcu_delay_us(10); + + nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_NOPULL); + + // We must pull up within 3us to achieve 400khz. + common_hal_mcu_delay_us(3); + + if (!nrf_gpio_pin_read(sda->number) || !nrf_gpio_pin_read(scl->number)) { + reset_pin_number(sda->number); + reset_pin_number(scl->number); + mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); + } +#endif + + nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG(scl->number, sda->number); + +#if defined(TWIM_FREQUENCY_FREQUENCY_K1000) + if (frequency >= 1000000) { + config.frequency = NRF_TWIM_FREQ_1000K; + } else +#endif + if (frequency >= 400000) { + config.frequency = NRF_TWIM_FREQ_400K; + } else if (frequency >= 250000) { + config.frequency = NRF_TWIM_FREQ_250K; + } else { + config.frequency = NRF_TWIM_FREQ_100K; + } + + self->scl_pin_number = scl->number; + self->sda_pin_number = sda->number; + claim_pin(sda); + claim_pin(scl); + + // About to init. If we fail after this point, common_hal_busio_i2c_deinit() will set in_use to false. + self->twim_peripheral->in_use = true; + nrfx_err_t err = nrfx_twim_init(&self->twim_peripheral->twim, &config, NULL, NULL); + if (err != NRFX_SUCCESS) { + common_hal_busio_i2c_deinit(self); + mp_raise_OSError(MP_EIO); + } } bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { - return self->twi->ENABLE == 0; + return self->sda_pin_number == NO_PIN; } void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { @@ -76,30 +174,57 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { return; } - uint8_t scl_pin = self->twi->PSEL.SCL; - uint8_t sda_pin = self->twi->PSEL.SDA; + nrfx_twim_uninit(&self->twim_peripheral->twim); - self->twi->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos); - self->twi->PSEL.SCL = (TWIM_PSEL_SCL_CONNECT_Disconnected << TWIM_PSEL_SCL_CONNECT_Pos); - self->twi->PSEL.SDA = (TWIM_PSEL_SDA_CONNECT_Disconnected << TWIM_PSEL_SDA_CONNECT_Pos); + reset_pin_number(self->sda_pin_number); + reset_pin_number(self->scl_pin_number); + self->sda_pin_number = NO_PIN; + self->scl_pin_number = NO_PIN; - reset_pin(scl_pin); - reset_pin(sda_pin); + self->twim_peripheral->in_use = false; } +// nrfx_twim_tx doesn't support 0-length data so we fall back to the hal API bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { - // Write no data when just probing - return 0 == common_hal_busio_i2c_write(self, addr, NULL, 0, true); + NRF_TWIM_Type *reg = self->twim_peripheral->twim.p_twim; + bool found = true; + + nrfx_twim_enable(&self->twim_peripheral->twim); + + nrf_twim_address_set(reg, addr); + nrf_twim_tx_buffer_set(reg, NULL, 0); + + nrf_twim_task_trigger(reg, NRF_TWIM_TASK_RESUME); + + nrf_twim_task_trigger(reg, NRF_TWIM_TASK_STARTTX); + while (nrf_twim_event_check(reg, NRF_TWIM_EVENT_TXSTARTED) == 0 && + nrf_twim_event_check(reg, NRF_TWIM_EVENT_ERROR) == 0); + nrf_twim_event_clear(reg, NRF_TWIM_EVENT_TXSTARTED); + + nrf_twim_task_trigger(reg, NRF_TWIM_TASK_STOP); + while (nrf_twim_event_check(reg, NRF_TWIM_EVENT_STOPPED) == 0); + nrf_twim_event_clear(reg, NRF_TWIM_EVENT_STOPPED); + + if (nrf_twim_event_check(reg, NRF_TWIM_EVENT_ERROR)) { + nrf_twim_event_clear(reg, NRF_TWIM_EVENT_ERROR); + + nrf_twim_errorsrc_get_and_clear(reg); + found = false; + } + + nrfx_twim_disable(&self->twim_peripheral->twim); + + return found; } bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { bool grabbed_lock = false; -// CRITICAL_SECTION_ENTER() - if (!self->has_lock) { - grabbed_lock = true; - self->has_lock = true; - } -// CRITICAL_SECTION_LEAVE(); + // NRFX_CRITICAL_SECTION_ENTER(); + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + // NRFX_CRITICAL_SECTION_EXIT(); return grabbed_lock; } @@ -112,96 +237,56 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { } uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const uint8_t *data, size_t len, bool stopBit) { - NRF_TWIM_Type* twi = self->twi; - - twi->ADDRESS = addr; - twi->TASKS_RESUME = 1; - - twi->TXD.PTR = (uint32_t) data; - twi->TXD.MAXCNT = len; - - twi->TASKS_STARTTX = 1; - - // Wait for TX started - while(!twi->EVENTS_TXSTARTED && !twi->EVENTS_ERROR) {} - twi->EVENTS_TXSTARTED = 0; - - // Wait for TX complete - if ( len ) - { - while(!twi->EVENTS_LASTTX && !twi->EVENTS_ERROR) {} - twi->EVENTS_LASTTX = 0x0UL; - } - - if (stopBit || twi->EVENTS_ERROR) - { - twi->TASKS_STOP = 0x1UL; - while(!twi->EVENTS_STOPPED); - twi->EVENTS_STOPPED = 0x0UL; - } - else - { - twi->TASKS_SUSPEND = 0x1UL; - while(!twi->EVENTS_SUSPENDED); - twi->EVENTS_SUSPENDED = 0x0UL; - } - - if (twi->EVENTS_ERROR) - { - twi->EVENTS_ERROR = 0x0UL; - uint32_t error = twi->ERRORSRC; - twi->ERRORSRC = error; - - return error; - } - - return 0; -} + if(len == 0) { + return common_hal_busio_i2c_probe(self, addr) ? 0 : MP_ENODEV; + } -uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) { - NRF_TWIM_Type* twi = self->twi; + nrfx_err_t err = NRFX_SUCCESS; - if(len == 0) return 0; - bool stopBit = true; // should be a parameter + nrfx_twim_enable(&self->twim_peripheral->twim); - twi->ADDRESS = addr; - twi->TASKS_RESUME = 0x1UL; + // break into MAX_XFER_LEN transaction + while ( len ) { + const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN); + nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_TX(addr, (uint8_t*) data, xact_len); + uint32_t const flags = (stopBit ? 0 : NRFX_TWIM_FLAG_TX_NO_STOP); - twi->RXD.PTR = (uint32_t) data; - twi->RXD.MAXCNT = len; + if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, flags)) ) { + break; + } - twi->TASKS_STARTRX = 0x1UL; + len -= xact_len; + data += xact_len; + } - while(!twi->EVENTS_RXSTARTED && !twi->EVENTS_ERROR); - twi->EVENTS_RXSTARTED = 0x0UL; + nrfx_twim_disable(&self->twim_peripheral->twim); - while(!twi->EVENTS_LASTRX && !twi->EVENTS_ERROR); - twi->EVENTS_LASTRX = 0x0UL; + return twi_error_to_mp(err); +} - if (stopBit || twi->EVENTS_ERROR) - { - twi->TASKS_STOP = 0x1UL; - while(!twi->EVENTS_STOPPED); - twi->EVENTS_STOPPED = 0x0UL; - } - else - { - twi->TASKS_SUSPEND = 0x1UL; - while(!twi->EVENTS_SUSPENDED); - twi->EVENTS_SUSPENDED = 0x0UL; - } +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) { + if(len == 0) { + return 0; + } - if (twi->EVENTS_ERROR) - { - twi->EVENTS_ERROR = 0x0UL; - uint32_t error = twi->ERRORSRC; - twi->ERRORSRC = error; + nrfx_err_t err = NRFX_SUCCESS; - return error; - } + nrfx_twim_enable(&self->twim_peripheral->twim); + + // break into MAX_XFER_LEN transaction + while ( len ) { + const size_t xact_len = MIN(len, I2C_MAX_XFER_LEN); + nrfx_twim_xfer_desc_t xfer_desc = NRFX_TWIM_XFER_DESC_RX(addr, data, xact_len); + + if ( NRFX_SUCCESS != (err = nrfx_twim_xfer(&self->twim_peripheral->twim, &xfer_desc, 0)) ) { + break; + } + + len -= xact_len; + data += xact_len; + } - // number of byte read -// (void) _p_twim->RXD.AMOUNT; + nrfx_twim_disable(&self->twim_peripheral->twim); - return 0; + return twi_error_to_mp(err); } diff --git a/ports/nrf/common-hal/busio/I2C.h b/ports/nrf/common-hal/busio/I2C.h index 899b9d5aa9480..b75d15f00fdb2 100644 --- a/ports/nrf/common-hal/busio/I2C.h +++ b/ports/nrf/common-hal/busio/I2C.h @@ -27,16 +27,23 @@ #ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_I2C_H #define MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_I2C_H -#include "common-hal/microcontroller/Pin.h" - -//#include "hal/include/hal_i2c_m_sync.h" +#include "nrfx_twim.h" #include "py/obj.h" +typedef struct { + nrfx_twim_t twim; + bool in_use; +} twim_peripheral_t; + typedef struct { mp_obj_base_t base; - volatile bool has_lock; - NRF_TWIM_Type* twi; + twim_peripheral_t* twim_peripheral; + bool has_lock; + uint8_t scl_pin_number; + uint8_t sda_pin_number; } busio_i2c_obj_t; +void i2c_reset(void); + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 62245252ef616..3f205e7782ec1 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -1,124 +1,228 @@ /* - * SPI Master library for nRF5x. - * Copyright (c) 2015 Arduino LLC - * Copyright (c) 2016 Sandeep Mistry All right reserved. - * Copyright (c) 2017 hathach + * This file is part of the MicroPython project, http://micropython.org/ * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. + * The MIT License (MIT) * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. */ +#include #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" #include "py/runtime.h" -#include "nrf.h" -#include "pins.h" - -// Convert frequency to clock-speed-dependent value. Return 0 if out of range. -static uint32_t baudrate_to_reg(const uint32_t baudrate) { - uint32_t value; - - if (baudrate <= 125000) { - value = SPI_FREQUENCY_FREQUENCY_K125; - } else if (baudrate <= 250000) { - value = SPI_FREQUENCY_FREQUENCY_K250; - } else if (baudrate <= 500000) { - value = SPI_FREQUENCY_FREQUENCY_K500; - } else if (baudrate <= 1000000) { - value = SPI_FREQUENCY_FREQUENCY_M1; - } else if (baudrate <= 2000000) { - value = SPI_FREQUENCY_FREQUENCY_M2; - } else if (baudrate <= 4000000) { - value = SPI_FREQUENCY_FREQUENCY_M4; - } else { - value = SPI_FREQUENCY_FREQUENCY_M8; +#include "nrfx_spim.h" +#include "nrf_gpio.h" + +// These are in order from highest available frequency to lowest (32MHz first, then 8MHz). +STATIC spim_peripheral_t spim_peripherals[] = { +#if NRFX_CHECK(NRFX_SPIM3_ENABLED) + // SPIM3 exists only on nRF52840 and supports 32MHz max. All other SPIM's are only 8MHz max. + // Allocate SPIM3 first. + { .spim = NRFX_SPIM_INSTANCE(3), + .max_frequency = 32000000, + .max_xfer_size = MIN(SPIM3_BUFFER_SIZE, (1UL << SPIM3_EASYDMA_MAXCNT_SIZE) - 1) + }, +#endif +#if NRFX_CHECK(NRFX_SPIM2_ENABLED) + // SPIM2 is not shared with a TWIM, so allocate before the shared ones. + { .spim = NRFX_SPIM_INSTANCE(2), + .max_frequency = 8000000, + .max_xfer_size = (1UL << SPIM2_EASYDMA_MAXCNT_SIZE) - 1 + }, +#endif +#if NRFX_CHECK(NRFX_SPIM1_ENABLED) + // SPIM1 and TWIM1 share an address. + { .spim = NRFX_SPIM_INSTANCE(1), + .max_frequency = 8000000, + .max_xfer_size = (1UL << SPIM1_EASYDMA_MAXCNT_SIZE) - 1 + }, +#endif +#if NRFX_CHECK(NRFX_SPIM0_ENABLED) + // SPIM0 and TWIM0 share an address. + { .spim = NRFX_SPIM_INSTANCE(0), + .max_frequency = 8000000, + .max_xfer_size = (1UL << SPIM0_EASYDMA_MAXCNT_SIZE) - 1 + }, +#endif +}; + +STATIC bool never_reset[MP_ARRAY_SIZE(spim_peripherals)]; + +// Separate RAM area for SPIM3 transmit buffer to avoid SPIM3 hardware errata. +// https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF52840_Rev2%2FERR%2FnRF52840%2FRev2%2Flatest%2Fanomaly_840_198.html +extern uint32_t _spim3_ram; +STATIC uint8_t *spim3_transmit_buffer = (uint8_t *) &_spim3_ram; + +void spi_reset(void) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) { + if (never_reset[i]) { + continue; + } + nrfx_spim_uninit(&spim_peripherals[i].spim); } +} - return value; +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) { + if (self->spim_peripheral == &spim_peripherals[i]) { + never_reset[i] = true; + + never_reset_pin_number(self->clock_pin_number); + never_reset_pin_number(self->MOSI_pin_number); + never_reset_pin_number(self->MISO_pin_number); + break; + } + } +} + +// Convert frequency to clock-speed-dependent value. Choose the next lower baudrate if in between +// available baudrates. +static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate) { + + static const struct { + const uint32_t boundary; + nrf_spim_frequency_t spim_frequency; + } baudrate_map[] = { +#ifdef SPIM_FREQUENCY_FREQUENCY_M32 + { 32000000, NRF_SPIM_FREQ_32M }, +#endif +#ifdef SPIM_FREQUENCY_FREQUENCY_M16 + { 16000000, NRF_SPIM_FREQ_16M }, +#endif + { 8000000, NRF_SPIM_FREQ_8M }, + { 4000000, NRF_SPIM_FREQ_4M }, + { 2000000, NRF_SPIM_FREQ_2M }, + { 1000000, NRF_SPIM_FREQ_1M }, + { 500000, NRF_SPIM_FREQ_500K }, + { 250000, NRF_SPIM_FREQ_250K }, + { 0, NRF_SPIM_FREQ_125K }, + }; + + size_t i = 0; + uint32_t boundary; + do { + boundary = baudrate_map[i].boundary; + if (baudrate >= boundary) { + return baudrate_map[i].spim_frequency; + } + i++; + } while (boundary != 0); + // Should not get here. + return 0; } void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { + // Find a free instance, with most desirable (highest freq and not shared) allocated first. + self->spim_peripheral = NULL; + for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) { + if ((spim_peripherals[i].spim.p_reg->ENABLE & SPIM_ENABLE_ENABLE_Msk) == 0) { + self->spim_peripheral = &spim_peripherals[i]; + break; + } + } - // 1 for I2C, 0 for SPI - self->spi = NRF_SPI0; + if (self->spim_peripheral == NULL) { + mp_raise_ValueError(translate("All SPI peripherals are in use")); + } - self->spi->PSELSCK = clock->pin; - self->spi->PSELMOSI = mosi->pin; - self->spi->PSELMISO = miso->pin; + nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED, + NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED); + config.frequency = baudrate_to_spim_frequency(self->spim_peripheral->max_frequency); -#if NRF52840_XXAA - self->spi->PSELSCK |= (clock->port << SPI_PSEL_SCK_PORT_Pos); - self->spi->PSELMOSI |= (mosi->port << SPI_PSEL_MOSI_PORT_Pos); - self->spi->PSELMISO |= (miso->port << SPI_PSEL_MISO_PORT_Pos); -#endif + config.sck_pin = clock->number; + self->clock_pin_number = clock->number; + claim_pin(clock); + + if (mosi != NULL) { + config.mosi_pin = mosi->number; + self->MOSI_pin_number = mosi->number; + claim_pin(mosi); + } else { + self->MOSI_pin_number = NO_PIN; + } + + if (miso != NULL) { + config.miso_pin = miso->number; + self->MISO_pin_number = mosi->number; + claim_pin(miso); + } else { + self->MISO_pin_number = NO_PIN; + } + + nrfx_err_t err = nrfx_spim_init(&self->spim_peripheral->spim, &config, NULL, NULL); + if (err != NRFX_SUCCESS) { + common_hal_busio_spi_deinit(self); + mp_raise_OSError(MP_EIO); + } } bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { - return self->spi == NULL; + return self->clock_pin_number == NO_PIN; } void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { - if (common_hal_busio_spi_deinited(self)) { + if (common_hal_busio_spi_deinited(self)) return; - } -#ifdef NRF52840_XXAA - self->spi->PSEL.SCK = SPI_PSEL_SCK_CONNECT_Disconnected; - self->spi->PSEL.MOSI = SPI_PSEL_MOSI_CONNECT_Disconnected; - self->spi->PSEL.MISO = SPI_PSEL_MISO_CONNECT_Disconnected; -#else - self->spi->PSELSCK = SPI_PSEL_SCK_PSELSCK_Disconnected; - self->spi->PSELMOSI = SPI_PSEL_MOSI_PSELMOSI_Disconnected; - self->spi->PSELMISO = SPI_PSEL_MISO_PSELMISO_Disconnected; -#endif -// reset_pin(self->clock_pin); -// reset_pin(self->MOSI_pin); -// reset_pin(self->MISO_pin); + nrfx_spim_uninit(&self->spim_peripheral->spim); - self->spi = NULL; + reset_pin_number(self->clock_pin_number); + reset_pin_number(self->MOSI_pin_number); + reset_pin_number(self->MISO_pin_number); } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - // nrf52 does not support 16 bit - if ( bits != 8 ) return false; - - self->spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); - - uint32_t config = (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos); + // nrf52 does not support 16 bit + if (bits != 8) { + return false; + } - config |= ((polarity ? SPI_CONFIG_CPOL_ActiveLow : SPI_CONFIG_CPOL_ActiveHigh) << SPI_CONFIG_CPOL_Pos); - config |= ((phase ? SPI_CONFIG_CPHA_Trailing : SPI_CONFIG_CPHA_Leading ) << SPI_CONFIG_CPHA_Pos); + // Set desired frequency, rounding down, and don't go above available frequency for this SPIM. + nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg, + baudrate_to_spim_frequency(MIN(baudrate, self->spim_peripheral->max_frequency))); - self->spi->CONFIG = config; - self->spi->FREQUENCY = baudrate_to_reg(baudrate); + nrf_spim_mode_t mode = NRF_SPIM_MODE_0; + if (polarity) { + mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2; + } else { + mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0; + } - self->spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); + nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST); - return true; + return true; } bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { bool grabbed_lock = false; -// CRITICAL_SECTION_ENTER() -// if (!self->has_lock) { - grabbed_lock = true; - self->has_lock = true; -// } -// CRITICAL_SECTION_LEAVE(); + // NRFX_CRITICAL_SECTION_ENTER(); + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + // NRFX_CRITICAL_SECTION_EXIT(); return grabbed_lock; } @@ -131,88 +235,102 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { } bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - if (len == 0) { + const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; + uint8_t *next_chunk = (uint8_t *) data; + + while (len > 0) { + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); + uint8_t *chunk = next_chunk; + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, chunk, chunk_size); + chunk = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(chunk, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { + return false; + } + next_chunk += chunk_size; + len -= chunk_size; + } return true; - } - - while (len) - { - self->spi->TXD = *data; - - while(!self->spi->EVENTS_READY); - - (void) self->spi->RXD; - data++; - len--; - - self->spi->EVENTS_READY = 0x0UL; - } - - return true; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - if (len == 0) { + uint8_t *next_chunk = data; + + while (len > 0) { + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(next_chunk, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { + return false; + } + next_chunk += chunk_size; + len -= chunk_size; + } return true; - } - - while (len) - { - self->spi->TXD = write_value; - - while(!self->spi->EVENTS_READY); - - *data = self->spi->RXD; - - data++; - len--; - - self->spi->EVENTS_READY = 0x0UL; - } - - return true; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - if (len == 0) { + const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; + uint8_t *next_chunk_out = data_out; + uint8_t *next_chunk_in = data_in; + + while (len > 0) { + uint8_t *chunk_out = next_chunk_out; + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, chunk_out, chunk_size); + chunk_out = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = + NRFX_SPIM_SINGLE_XFER(next_chunk_out, chunk_size, + next_chunk_in, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { + return false; + } + + next_chunk_out += chunk_size; + next_chunk_in += chunk_size; + len -= chunk_size; + } return true; - } - - while (len) - { - self->spi->TXD = *data_out; - - while(!self->spi->EVENTS_READY); - - *data_in = self->spi->RXD; - - data_out++; - data_in++; - len--; - - self->spi->EVENTS_READY = 0x0UL; - } - - return true; } - + uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - switch (self->spi->FREQUENCY) { - case SPI_FREQUENCY_FREQUENCY_K125: + switch (self->spim_peripheral->spim.p_reg->FREQUENCY) { + case NRF_SPIM_FREQ_125K: return 125000; - case SPI_FREQUENCY_FREQUENCY_K250: + case NRF_SPIM_FREQ_250K: return 250000; - case SPI_FREQUENCY_FREQUENCY_K500: + case NRF_SPIM_FREQ_500K: return 500000; - case SPI_FREQUENCY_FREQUENCY_M1: + case NRF_SPIM_FREQ_1M: return 1000000; - case SPI_FREQUENCY_FREQUENCY_M2: + case NRF_SPIM_FREQ_2M: return 2000000; - case SPI_FREQUENCY_FREQUENCY_M4: + case NRF_SPIM_FREQ_4M: return 4000000; - case SPI_FREQUENCY_FREQUENCY_M8: + case NRF_SPIM_FREQ_8M: return 8000000; +#ifdef SPIM_FREQUENCY_FREQUENCY_M16 + case NRF_SPIM_FREQ_16M: + return 16000000; +#endif +#ifdef SPIM_FREQUENCY_FREQUENCY_M32 + case NRF_SPIM_FREQ_32M: + return 32000000; +#endif default: return 0; } } + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPHA_Msk) >> SPIM_CONFIG_CPHA_Pos; +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPOL_Msk) >> SPIM_CONFIG_CPOL_Pos; +} diff --git a/ports/nrf/common-hal/busio/SPI.h b/ports/nrf/common-hal/busio/SPI.h index 1de74a9f29967..ef3ac9531e494 100644 --- a/ports/nrf/common-hal/busio/SPI.h +++ b/ports/nrf/common-hal/busio/SPI.h @@ -27,16 +27,24 @@ #ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_SPI_H #define MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_SPI_H -#include "common-hal/microcontroller/Pin.h" - -//#include "hal/include/hal_spi_m_sync.h" - +#include "nrfx_spim.h" #include "py/obj.h" +typedef struct { + nrfx_spim_t spim; + uint32_t max_frequency; + uint32_t max_xfer_size; +} spim_peripheral_t; + typedef struct { mp_obj_base_t base; - NRF_SPI_Type *spi; + spim_peripheral_t* spim_peripheral; bool has_lock; + uint8_t clock_pin_number; + uint8_t MOSI_pin_number; + uint8_t MISO_pin_number; } busio_spi_obj_t; +void spi_reset(void); + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c index dbc6a85331c19..4a3e74c49dd2a 100644 --- a/ports/nrf/common-hal/busio/UART.c +++ b/ports/nrf/common-hal/busio/UART.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Damien P. George + * Copyright (c) 2018 Ha Thach for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -27,63 +27,306 @@ #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/busio/UART.h" -#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "py/mpconfig.h" #include "py/gc.h" #include "py/mperrno.h" #include "py/runtime.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" #include "tick.h" +#include "nrfx_uarte.h" +#include -#include "pins.h" +// expression to examine, and return value in case of failing +#define _VERIFY_ERR(_exp) \ + do {\ + uint32_t _err = (_exp);\ + if (NRFX_SUCCESS != _err ) {\ + mp_raise_msg_varg(&mp_type_RuntimeError, translate("error = 0x%08lX"), _err);\ + }\ + }while(0) + +static nrfx_uarte_t nrfx_uartes[] = { +#if NRFX_CHECK(NRFX_UARTE0_ENABLED) + NRFX_UARTE_INSTANCE(0), +#endif +#if NRFX_CHECK(NRFX_UARTE1_ENABLED) + NRFX_UARTE_INSTANCE(1), +#endif +}; + +static uint32_t get_nrf_baud (uint32_t baudrate) { + + static const struct { + const uint32_t boundary; + nrf_uarte_baudrate_t uarte_baudraute; + } baudrate_map[] = { + { 1200, NRF_UARTE_BAUDRATE_1200 }, + { 2400, NRF_UARTE_BAUDRATE_2400 }, + { 4800, NRF_UARTE_BAUDRATE_4800 }, + { 9600, NRF_UARTE_BAUDRATE_9600 }, + { 14400, NRF_UARTE_BAUDRATE_14400 }, + { 19200, NRF_UARTE_BAUDRATE_19200 }, + { 28800, NRF_UARTE_BAUDRATE_28800 }, + { 31250, NRF_UARTE_BAUDRATE_31250 }, + { 38400, NRF_UARTE_BAUDRATE_38400 }, + { 56000, NRF_UARTE_BAUDRATE_56000 }, + { 57600, NRF_UARTE_BAUDRATE_57600 }, + { 76800, NRF_UARTE_BAUDRATE_76800 }, + { 115200, NRF_UARTE_BAUDRATE_115200 }, + { 230400, NRF_UARTE_BAUDRATE_230400 }, + { 250000, NRF_UARTE_BAUDRATE_250000 }, + { 460800, NRF_UARTE_BAUDRATE_460800 }, + { 921600, NRF_UARTE_BAUDRATE_921600 }, + { 0, NRF_UARTE_BAUDRATE_1000000 }, + }; + + size_t i = 0; + uint32_t boundary; + do { + boundary = baudrate_map[i].boundary; + if (baudrate <= boundary || boundary == 0) { + return baudrate_map[i].uarte_baudraute; + } + i++; + } while (true); +} + +static void uart_callback_irq (const nrfx_uarte_event_t * event, void * context) { + busio_uart_obj_t* self = (busio_uart_obj_t*) context; + + switch ( event->type ) { + case NRFX_UARTE_EVT_RX_DONE: + ringbuf_put_n(&self->rbuf, event->data.rxtx.p_data, event->data.rxtx.bytes); + + // keep receiving + (void) nrfx_uarte_rx(self->uarte, &self->rx_char, 1); + break; + + case NRFX_UARTE_EVT_TX_DONE: + // nothing to do + break; + + case NRFX_UARTE_EVT_ERROR: + // Possible Error source is Overrun, Parity, Framing, Break + // uint32_t errsrc = event->data.error.error_mask; + + ringbuf_put_n(&self->rbuf, event->data.error.rxtx.p_data, event->data.error.rxtx.bytes); + + // Keep receiving + (void) nrfx_uarte_rx(self->uarte, &self->rx_char, 1); + break; + + default: + break; + } +} + +void uart_reset(void) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(nrfx_uartes); i++) { + nrfx_uarte_uninit(&nrfx_uartes[i]); + } +} void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, uint32_t timeout, - uint8_t receiver_buffer_size) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + + if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + + // Find a free UART peripheral. + self->uarte = NULL; + for (size_t i = 0 ; i < MP_ARRAY_SIZE(nrfx_uartes); i++) { + if ((nrfx_uartes[i].p_reg->ENABLE & UARTE_ENABLE_ENABLE_Msk) == 0) { + self->uarte = &nrfx_uartes[i]; + break; + } + } + + if (self->uarte == NULL) { + mp_raise_ValueError(translate("All UART peripherals are in use")); + } + + if ( (tx == NULL) && (rx == NULL) ) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + if ( receiver_buffer_size == 0 ) { + mp_raise_ValueError(translate("Invalid buffer size")); + } + + if ( parity == PARITY_ODD ) { + mp_raise_ValueError(translate("Odd parity is not supported")); + } + + nrfx_uarte_config_t config = { + .pseltxd = (tx == NULL) ? NRF_UARTE_PSEL_DISCONNECTED : tx->number, + .pselrxd = (rx == NULL) ? NRF_UARTE_PSEL_DISCONNECTED : rx->number, + .pselcts = NRF_UARTE_PSEL_DISCONNECTED, + .pselrts = NRF_UARTE_PSEL_DISCONNECTED, + .p_context = self, + .baudrate = get_nrf_baud(baudrate), + .interrupt_priority = 7, + .hal_cfg = { + .hwfc = NRF_UARTE_HWFC_DISABLED, + .parity = (parity == PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED + } + }; + + _VERIFY_ERR(nrfx_uarte_init(self->uarte, &config, uart_callback_irq)); + + // Init buffer for rx + if ( rx != NULL ) { + // Initially allocate the UART's buffer in the long-lived part of the + // heap. UARTs are generally long-lived objects, but the "make long- + // lived" machinery is incapable of moving internal pointers like + // self->buffer, so do it manually. (However, as long as internal + // pointers like this are NOT moved, allocating the buffer + // in the long-lived pool is not strictly necessary) + // (This is a macro.) + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + + if ( !self->rbuf.buf ) { + nrfx_uarte_uninit(self->uarte); + mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer")); + } + + self->rx_pin_number = rx->number; + claim_pin(rx); + } + + if ( tx != NULL ) { + self->tx_pin_number = tx->number; + claim_pin(tx); + } else { + self->tx_pin_number = NO_PIN; + } + + self->baudrate = baudrate; + self->timeout_ms = timeout * 1000; + + // Initial wait for incoming byte + _VERIFY_ERR(nrfx_uarte_rx(self->uarte, &self->rx_char, 1)); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); + return self->rx_pin_number == NO_PIN; } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); - if (common_hal_busio_uart_deinited(self)) { - return; + if ( !common_hal_busio_uart_deinited(self) ) { + nrfx_uarte_uninit(self->uarte); + reset_pin_number(self->tx_pin_number); + reset_pin_number(self->rx_pin_number); + self->tx_pin_number = NO_PIN; + self->rx_pin_number = NO_PIN; + + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; } - // Do deinit; } // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); - return 0; + if ( nrf_uarte_rx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) { + mp_raise_ValueError(translate("No RX pin")); + } + + size_t rx_bytes = 0; + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout + while ( (ringbuf_count(&self->rbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if ( mp_hal_is_interrupted() ) { + return 0; + } + } + + // prevent conflict with uart irq + NVIC_DisableIRQ(nrfx_get_irq_number(self->uarte->p_reg)); + + // copy received data + rx_bytes = ringbuf_count(&self->rbuf); + rx_bytes = MIN(rx_bytes, len); + for ( uint16_t i = 0; i < rx_bytes; i++ ) { + data[i] = ringbuf_get(&self->rbuf); + } + + NVIC_EnableIRQ(nrfx_get_irq_number(self->uarte->p_reg)); + + return rx_bytes; } // Write characters. -size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); - return 0; +size_t common_hal_busio_uart_write (busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if ( nrf_uarte_tx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) { + mp_raise_ValueError(translate("No TX pin")); + } + + if ( len == 0 ) return 0; + + // EasyDMA can only access SRAM + uint8_t * tx_buf = (uint8_t*) data; + if ( !nrfx_is_in_ram(data) ) { + // TODO: If this is not too big, we could allocate it on the stack. + tx_buf = (uint8_t *) gc_alloc(len, false, false); + memcpy(tx_buf, data, len); + } + + (*errcode) = nrfx_uarte_tx(self->uarte, tx_buf, len); + _VERIFY_ERR(*errcode); + (*errcode) = 0; + + // Wait for write to complete. + while ( nrfx_uarte_tx_in_progress(self->uarte) ) { + RUN_BACKGROUND_TASKS; + } + + if ( !nrfx_is_in_ram(data) ) { + gc_free(tx_buf); + } + + return len; } uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); return self->baudrate; } void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); self->baudrate = baudrate; + nrf_uarte_baudrate_set(self->uarte->p_reg, get_nrf_baud(baudrate)); +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; } uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); - return 0; + return ringbuf_count(&self->rbuf); +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + // prevent conflict with uart irq + NVIC_DisableIRQ(nrfx_get_irq_number(self->uarte->p_reg)); + ringbuf_clear(&self->rbuf); + NVIC_EnableIRQ(nrfx_get_irq_number(self->uarte->p_reg)); } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - mp_raise_NotImplementedError("busio.UART not yet implemented"); - return false; + return !nrfx_uarte_tx_in_progress(self->uarte); } diff --git a/ports/nrf/common-hal/busio/UART.h b/ports/nrf/common-hal/busio/UART.h index 7c0493e37e82f..58432001cd78a 100644 --- a/ports/nrf/common-hal/busio/UART.h +++ b/ports/nrf/common-hal/busio/UART.h @@ -28,23 +28,26 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_UART_H #include "common-hal/microcontroller/Pin.h" +#include "nrfx_uarte.h" #include "py/obj.h" +#include "py/ringbuf.h" typedef struct { mp_obj_base_t base; - uint8_t rx_pin; - uint8_t tx_pin; - uint8_t character_bits; - bool rx_error; + + nrfx_uarte_t *uarte; + uint32_t baudrate; uint32_t timeout_ms; - // Index of the oldest received character. - uint32_t buffer_start; - // Index of the next available spot to store a character. - uint32_t buffer_size; - uint32_t buffer_length; - uint8_t* buffer; + + ringbuf_t rbuf; + uint8_t rx_char; // EasyDMA buf + + uint8_t tx_pin_number; + uint8_t rx_pin_number; } busio_uart_obj_t; +void uart_reset(void); + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BUSIO_UART_H diff --git a/ports/nrf/common-hal/digitalio/DigitalInOut.c b/ports/nrf/common-hal/digitalio/DigitalInOut.c index 66fd0eb032180..c5a7a7dfbab2a 100644 --- a/ports/nrf/common-hal/digitalio/DigitalInOut.c +++ b/ports/nrf/common-hal/digitalio/DigitalInOut.c @@ -24,146 +24,135 @@ * THE SOFTWARE. */ -#include -#include - +#include "shared-bindings/digitalio/DigitalInOut.h" #include "py/runtime.h" -#include "py/mphal.h" +#include "supervisor/shared/translate.h" -#include "hal/hal_gpio.h" +#include "nrf_gpio.h" -#include "common-hal/microcontroller/Pin.h" -#include "shared-bindings/digitalio/DigitalInOut.h" +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} digitalinout_result_t common_hal_digitalio_digitalinout_construct( - digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + claim_pin(pin); self->pin = pin; - hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + + nrf_gpio_cfg_input(pin->number, NRF_GPIO_PIN_NOPULL); + return DIGITALINOUT_OK; } -bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { - return self->pin == mp_const_none; +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == NULL; } -void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { if (common_hal_digitalio_digitalinout_deinited(self)) { return; } - reset_pin(self->pin->pin); - self->pin = mp_const_none; + nrf_gpio_cfg_default(self->pin->number); + + reset_pin_number(self->pin->number); + self->pin = NULL; } void common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - self->output = false; - - hal_gpio_cfg_pin(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + nrf_gpio_cfg_input(self->pin->number, NRF_GPIO_PIN_NOPULL); common_hal_digitalio_digitalinout_set_pull(self, pull); } void common_hal_digitalio_digitalinout_switch_to_output( - digitalio_digitalinout_obj_t* self, bool value, + digitalio_digitalinout_obj_t *self, bool value, digitalio_drive_mode_t drive_mode) { - const uint8_t pin = self->pin->pin; - self->output = true; - self->open_drain = (drive_mode == DRIVE_MODE_OPEN_DRAIN); - - hal_gpio_cfg_pin(self->pin->port, pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + common_hal_digitalio_digitalinout_set_drive_mode(self, drive_mode); common_hal_digitalio_digitalinout_set_value(self, value); } digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( - digitalio_digitalinout_obj_t* self) { - return self->output? DIRECTION_OUTPUT : DIRECTION_INPUT; + digitalio_digitalinout_obj_t *self) { + + return (nrf_gpio_pin_dir_get(self->pin->number) == NRF_GPIO_PIN_DIR_INPUT) + ? DIRECTION_INPUT : DIRECTION_OUTPUT; } void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t* self, bool value) { - if (value) { - if (self->open_drain) { - hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT); - } else { - hal_gpio_pin_set(self->pin->port, self->pin->pin); - hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_OUTPUT); - } - } else { - hal_gpio_pin_clear(self->pin->port, self->pin->pin); - hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_OUTPUT); - } + digitalio_digitalinout_obj_t *self, bool value) { + nrf_gpio_pin_write(self->pin->number, value); } bool common_hal_digitalio_digitalinout_get_value( - digitalio_digitalinout_obj_t* self) { - const uint8_t pin = self->pin->pin; - if (!self->output) { - return hal_gpio_pin_read(self->pin); - } else { - if (self->open_drain && hal_gpio_dir_get(self->pin->port, self->pin->pin) == HAL_GPIO_MODE_INPUT) { - return true; - } else { - return (GPIO_BASE(self->pin->port)->OUT >> pin) & 1; - } - } + digitalio_digitalinout_obj_t *self) { + return (nrf_gpio_pin_dir_get(self->pin->number) == NRF_GPIO_PIN_DIR_INPUT) + ? nrf_gpio_pin_read(self->pin->number) + : nrf_gpio_pin_out_read(self->pin->number); } void common_hal_digitalio_digitalinout_set_drive_mode( - digitalio_digitalinout_obj_t* self, + digitalio_digitalinout_obj_t *self, digitalio_drive_mode_t drive_mode) { - bool value = common_hal_digitalio_digitalinout_get_value(self); - self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; - // True is implemented differently between modes so reset the value to make - // sure its correct for the new mode. - if (value) { - common_hal_digitalio_digitalinout_set_value(self, value); - } + nrf_gpio_cfg(self->pin->number, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + drive_mode == DRIVE_MODE_OPEN_DRAIN ? NRF_GPIO_PIN_H0D1 : NRF_GPIO_PIN_H0H1, + NRF_GPIO_PIN_NOSENSE); } digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( - digitalio_digitalinout_obj_t* self) { - if (self->open_drain) { + digitalio_digitalinout_obj_t *self) { + uint32_t pin = self->pin->number; + // Changes pin to be a relative pin number in port. + NRF_GPIO_Type *reg = nrf_gpio_pin_port_decode(&pin); + + switch ((reg->PIN_CNF[pin] & GPIO_PIN_CNF_DRIVE_Msk) >> GPIO_PIN_CNF_DRIVE_Pos) { + case NRF_GPIO_PIN_S0D1: + case NRF_GPIO_PIN_H0D1: return DRIVE_MODE_OPEN_DRAIN; - } else { + default: return DRIVE_MODE_PUSH_PULL; } } void common_hal_digitalio_digitalinout_set_pull( - digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { - hal_gpio_pull_t asf_pull = HAL_GPIO_PULL_DISABLED; + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + nrf_gpio_pin_pull_t hal_pull = NRF_GPIO_PIN_NOPULL; + switch (pull) { case PULL_UP: - asf_pull = HAL_GPIO_PULL_UP; + hal_pull = NRF_GPIO_PIN_PULLUP; break; case PULL_DOWN: - asf_pull = HAL_GPIO_PULL_DOWN; + hal_pull = NRF_GPIO_PIN_PULLDOWN; break; case PULL_NONE: default: break; } - hal_gpio_pull_set(self->pin->port, self->pin->pin, asf_pull); + + nrf_gpio_cfg_input(self->pin->number, hal_pull); } digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( - digitalio_digitalinout_obj_t* self) { - uint32_t pin = self->pin->pin; - if (self->output) { - mp_raise_AttributeError("Cannot get pull while in output mode"); - return PULL_NONE; - } else { - hal_gpio_pull_t pull = hal_gpio_pull_get(self->pin->port, pin); - - switch(pull) - { - case HAL_GPIO_PULL_UP: - return PULL_UP; - - case HAL_GPIO_PULL_DOWN: - return PULL_DOWN; - - default: return PULL_NONE; - } + digitalio_digitalinout_obj_t *self) { + uint32_t pin = self->pin->number; + // Changes pin to be a relative pin number in port. + NRF_GPIO_Type *reg = nrf_gpio_pin_port_decode(&pin); + + if (nrf_gpio_pin_dir_get(self->pin->number) == NRF_GPIO_PIN_DIR_OUTPUT) { + mp_raise_AttributeError(translate("Cannot get pull while in output mode")); + } + + switch ((reg->PIN_CNF[pin] & GPIO_PIN_CNF_PULL_Msk) >> GPIO_PIN_CNF_PULL_Pos) { + case NRF_GPIO_PIN_PULLUP: + return PULL_UP; + case NRF_GPIO_PIN_PULLDOWN: + return PULL_DOWN; + default: + return PULL_NONE; } } diff --git a/ports/nrf/common-hal/digitalio/DigitalInOut.h b/ports/nrf/common-hal/digitalio/DigitalInOut.h index 8089d8bacc733..9122ba4a13f3d 100644 --- a/ports/nrf/common-hal/digitalio/DigitalInOut.h +++ b/ports/nrf/common-hal/digitalio/DigitalInOut.h @@ -28,13 +28,10 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_DIGITALIO_DIGITALINOUT_H #include "common-hal/microcontroller/Pin.h" -#include "py/obj.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t * pin; - bool output; - bool open_drain; + const mcu_pin_obj_t *pin; } digitalio_digitalinout_obj_t; #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/nrf/common-hal/displayio/ParallelBus.c b/ports/nrf/common-hal/displayio/ParallelBus.c new file mode 100644 index 0000000000000..be4b28a6e6bef --- /dev/null +++ b/ports/nrf/common-hal/displayio/ParallelBus.c @@ -0,0 +1,162 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "tick.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + uint8_t data_pin = data0->number; + if (data_pin % 8 != 0) { + mp_raise_ValueError(translate("Data 0 pin must be byte aligned")); + } + for (uint8_t i = 0; i < 8; i++) { + if (!pin_number_is_free(data_pin + i)) { + mp_raise_ValueError_varg(translate("Bus pin %d is already in use"), i); + } + } + NRF_GPIO_Type *g; + uint8_t num_pins_in_port; + if (data0->number < P0_PIN_NUM) { + g = NRF_P0; + num_pins_in_port = P0_PIN_NUM; + } else { + g = NRF_P1; + num_pins_in_port = P1_PIN_NUM; + } + g->DIRSET = 0xff << (data_pin % num_pins_in_port); + for (uint8_t i = 0; i < 8; i++) { + g->PIN_CNF[data_pin + i] |= NRF_GPIO_PIN_S0S1 << GPIO_PIN_CNF_DRIVE_Pos; + } + self->bus = ((uint8_t*) &g->OUT) + (data0->number % num_pins_in_port / 8); + + self->command.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->command, command); + common_hal_digitalio_digitalinout_switch_to_output(&self->command, true, DRIVE_MODE_PUSH_PULL); + + self->chip_select.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->chip_select, chip_select); + common_hal_digitalio_digitalinout_switch_to_output(&self->chip_select, true, DRIVE_MODE_PUSH_PULL); + + self->write.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->write, write); + common_hal_digitalio_digitalinout_switch_to_output(&self->write, true, DRIVE_MODE_PUSH_PULL); + + self->read.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->read, read); + common_hal_digitalio_digitalinout_switch_to_output(&self->read, true, DRIVE_MODE_PUSH_PULL); + + self->data0_pin = data_pin; + uint8_t num_pins_in_write_port; + if (data0->number < P0_PIN_NUM) { + self->write_group = NRF_P0; + num_pins_in_write_port = P0_PIN_NUM; + } else { + self->write_group = NRF_P1; + num_pins_in_write_port = P1_PIN_NUM; + } + self->write_mask = 1 << (write->number % num_pins_in_write_port); + + self->reset.base.type = &mp_type_NoneType; + if (reset != NULL) { + self->reset.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->reset, reset); + common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL); + never_reset_pin_number(reset->number); + common_hal_displayio_parallelbus_reset(self); + } + + never_reset_pin_number(command->number); + never_reset_pin_number(chip_select->number); + never_reset_pin_number(write->number); + never_reset_pin_number(read->number); + for (uint8_t i = 0; i < 8; i++) { + never_reset_pin_number(data_pin + i); + } +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + for (uint8_t i = 0; i < 8; i++) { + reset_pin_number(self->data0_pin + i); + } + + reset_pin_number(self->command.pin->number); + reset_pin_number(self->chip_select.pin->number); + reset_pin_number(self->write.pin->number); + reset_pin_number(self->read.pin->number); + reset_pin_number(self->reset.pin->number); +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + if (self->reset.base.type == &mp_type_NoneType) { + return false; + } + + common_hal_digitalio_digitalinout_set_value(&self->reset, false); + common_hal_mcu_delay_us(4); + common_hal_digitalio_digitalinout_set_value(&self->reset, true); + return true; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return true; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, false); + return true; +} + +// This ignores chip_select behaviour because data is clocked in by the write line toggling. +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA); + uint32_t* clear_write = (uint32_t*) &self->write_group->OUTCLR; + uint32_t* set_write = (uint32_t*) &self->write_group->OUTSET; + uint32_t mask = self->write_mask; + for (uint32_t i = 0; i < data_length; i++) { + *clear_write = mask; + *self->bus = data[i]; + *set_write = mask; + } +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, true); +} diff --git a/ports/nrf/common-hal/displayio/ParallelBus.h b/ports/nrf/common-hal/displayio/ParallelBus.h new file mode 100644 index 0000000000000..5c10d3d42a961 --- /dev/null +++ b/ports/nrf/common-hal/displayio/ParallelBus.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* bus; + digitalio_digitalinout_obj_t command; + digitalio_digitalinout_obj_t chip_select; + digitalio_digitalinout_obj_t reset; + digitalio_digitalinout_obj_t write; + digitalio_digitalinout_obj_t read; + uint8_t data0_pin; + NRF_GPIO_Type* write_group; + uint32_t write_mask; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/nrf/common-hal/microcontroller/Pin.c b/ports/nrf/common-hal/microcontroller/Pin.c index ee07ff09aaf45..b7931a2e16738 100644 --- a/ports/nrf/common-hal/microcontroller/Pin.c +++ b/ports/nrf/common-hal/microcontroller/Pin.c @@ -24,52 +24,175 @@ * THE SOFTWARE. */ -#include "common-hal/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "nrf_gpio.h" #include "py/mphal.h" -#if 0 +#include "nrf/pins.h" +#include "supervisor/shared/rgb_led_status.h" -extern volatile bool adc_in_use; +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif +#ifdef SPEAKER_ENABLE_PIN +bool speaker_enable_in_use; +#endif -bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { - if (pin == &pin_TOUT) { - return !adc_in_use; +// Bit mask of claimed pins on each of up to two ports. nrf52832 has one port; nrf52840 has two. +STATIC uint32_t claimed_pins[GPIO_COUNT]; +STATIC uint32_t never_reset_pins[GPIO_COUNT]; + +STATIC void reset_speaker_enable_pin(void) { +#ifdef SPEAKER_ENABLE_PIN + speaker_enable_in_use = false; + nrf_gpio_cfg(SPEAKER_ENABLE_PIN->number, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_H0H1, + NRF_GPIO_PIN_NOSENSE); + nrf_gpio_pin_write(SPEAKER_ENABLE_PIN->number, false); +#endif +} + +void reset_all_pins(void) { + for (size_t i = 0; i < GPIO_COUNT; i++) { + claimed_pins[i] = never_reset_pins[i]; } - if (pin->gpio_number == NO_GPIO || pin->gpio_number == SPECIAL_CASE) { - return false; + + for (uint32_t pin = 0; pin < NUMBER_OF_PINS; ++pin) { + if ((never_reset_pins[nrf_pin_port(pin)] & (1 << nrf_relative_pin_number(pin))) != 0) { + continue; + } + nrf_gpio_cfg_default(pin); } - return (READ_PERI_REG(pin->peripheral) & - (PERIPHS_IO_MUX_FUNC<gpio_number)) == 0 && - (READ_PERI_REG(pin->peripheral) & PERIPHS_IO_MUX_PULLUP) == 0; + + #ifdef MICROPY_HW_NEOPIXEL + neopixel_in_use = false; + #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif + + // After configuring SWD because it may be shared. + reset_speaker_enable_pin(); } -void reset_pins(void) { - for (int i = 0; i < 17; i++) { - // 5 is RXD, 6 is TXD - if ((i > 4 && i < 13) || i == 12) { - continue; +// Mark pin as free and return it to a quiescent state. +void reset_pin_number(uint8_t pin_number) { + if (pin_number == NO_PIN) { + return; + } + + // Clear claimed bit. + claimed_pins[nrf_pin_port(pin_number)] &= ~(1 << nrf_relative_pin_number(pin_number)); + + #ifdef MICROPY_HW_NEOPIXEL + if (pin_number == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { + apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; + apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; + if (!apa102_sck_in_use && !apa102_mosi_in_use) { + rgb_led_status_init(); } - uint32_t peripheral = PERIPHS_IO_MUX + i * 4; - PIN_FUNC_SELECT(peripheral, 0); - PIN_PULLUP_DIS(peripheral); - // Disable the pin. - gpio_output_set(0x0, 0x0, 0x0, 1 << i); + return; } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin_number == SPEAKER_ENABLE_PIN->number) { + reset_speaker_enable_pin(); + } + #endif } -#endif -bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { - return true; + +void never_reset_pin_number(uint8_t pin_number) { + never_reset_pins[nrf_pin_port(pin_number)] |= 1 << nrf_relative_pin_number(pin_number); } -void reset_all_pins(void) { +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) { + never_reset_pin_number(pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { + reset_pin_number(pin->number); +} + +void claim_pin(const mcu_pin_obj_t* pin) { + // Set bit in claimed_pins bitmask. + claimed_pins[nrf_pin_port(pin->number)] |= 1 << nrf_relative_pin_number(pin->number); + + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + neopixel_in_use = true; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) { + apa102_sck_in_use = true; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + speaker_enable_in_use = true; + } + #endif } -void reset_pin(uint8_t pin) { +bool pin_number_is_free(uint8_t pin_number) { + return !(claimed_pins[nrf_pin_port(pin_number)] & (1 << nrf_relative_pin_number(pin_number))); } +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + return !neopixel_in_use; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) { + return !apa102_sck_in_use; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + return !speaker_enable_in_use; + } + #endif + #ifdef NRF52840 + // If NFC pins are enabled for NFC, don't allow them to be used for GPIO. + if (((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == + (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)) && + (pin->number == 9 || pin->number == 10)) { + return false; + } + #endif + + return pin_number_is_free(pin->number); + +} diff --git a/ports/nrf/common-hal/microcontroller/Pin.h b/ports/nrf/common-hal/microcontroller/Pin.h index d7994bc0ce9db..735ed90ccaf7d 100644 --- a/ports/nrf/common-hal/microcontroller/Pin.h +++ b/ports/nrf/common-hal/microcontroller/Pin.h @@ -28,13 +28,34 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H #include "py/mphal.h" -#include "modules/machine/pin.h" -//typedef pin_obj_t mcu_pin_obj_t; -#define mcu_pin_obj_t pin_obj_t +#include "peripherals/nrf/pins.h" + +#ifdef MICROPY_HW_NEOPIXEL +extern bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +extern bool apa102_sck_in_use; +extern bool apa102_mosi_in_use; +#endif + void reset_all_pins(void); -void reset_pin(uint8_t pin); -//void claim_pin(const mcu_pin_obj_t* pin); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin); +void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); + +// Lower 5 bits of a pin number are the pin number in a port. +// upper bits (just one bit for current chips) is port number. + +static inline uint8_t nrf_pin_port(uint8_t absolute_pin) { + return absolute_pin >> 5; +} +static inline uint8_t nrf_relative_pin_number(uint8_t absolute_pin) { + return absolute_pin & 0x1f; +} #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/nrf/common-hal/microcontroller/Processor.c b/ports/nrf/common-hal/microcontroller/Processor.c index 0cceb6a665702..03d9c4d3f059a 100644 --- a/ports/nrf/common-hal/microcontroller/Processor.c +++ b/ports/nrf/common-hal/microcontroller/Processor.c @@ -26,7 +26,9 @@ #include "common-hal/microcontroller/Processor.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" +#include "nrfx_saadc.h" #ifdef BLUETOOTH_SD #include "nrf_sdm.h" #endif @@ -44,39 +46,76 @@ float common_hal_mcu_processor_get_temperature(void) { if (sd_en) { uint32_t err_code = sd_temp_get(&temp); if (err_code != NRF_SUCCESS) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not get temperature. status: 0x" HEX2_FMT, (uint16_t)err_code)); - - return 0; + mp_raise_OSError_msg(translate("Cannot get temperature")); } - } + return temp / 4.0f; + } // Fall through if SD not enabled. #endif - NRF_TEMP->TASKS_START = 1; - - while (NRF_TEMP->EVENTS_DATARDY == 0) - ; - + while (NRF_TEMP->EVENTS_DATARDY == 0) { } NRF_TEMP->EVENTS_DATARDY = 0; - temp = NRF_TEMP->TEMP; - NRF_TEMP->TASKS_STOP = 1; - return temp / 4.0f; } + + uint32_t common_hal_mcu_processor_get_frequency(void) { return 64000000ul; } -void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { +float common_hal_mcu_processor_get_voltage(void) { + nrf_saadc_value_t value; + + const nrf_saadc_channel_config_t config = { + .resistor_p = NRF_SAADC_RESISTOR_DISABLED, + .resistor_n = NRF_SAADC_RESISTOR_DISABLED, + .gain = NRF_SAADC_GAIN1_6, + .reference = NRF_SAADC_REFERENCE_INTERNAL, + .acq_time = NRF_SAADC_ACQTIME_10US, + .mode = NRF_SAADC_MODE_SINGLE_ENDED, + .burst = NRF_SAADC_BURST_DISABLED + }; + + nrf_saadc_resolution_set(NRF_SAADC, NRF_SAADC_RESOLUTION_14BIT); + nrf_saadc_oversample_set(NRF_SAADC, NRF_SAADC_OVERSAMPLE_DISABLED); + nrf_saadc_enable(NRF_SAADC); + + for (uint32_t i = 0; i < SAADC_CH_NUM; i++) { + nrf_saadc_channel_input_set(NRF_SAADC, i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); + } - uint32_t* id_addresses[2] = {(uint32_t *) 0x060, (uint32_t *) 0x064}; + nrf_saadc_channel_init(NRF_SAADC, 0, &config); + nrf_saadc_channel_input_set(NRF_SAADC, 0, NRF_SAADC_INPUT_VDD, NRF_SAADC_INPUT_VDD); + nrf_saadc_buffer_init(NRF_SAADC, &value, 1); + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_START); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STARTED) == 0) { } + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STARTED); + + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_SAMPLE); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_END) == 0) { } + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_END); + + nrf_saadc_task_trigger(NRF_SAADC, NRF_SAADC_TASK_STOP); + while (nrf_saadc_event_check(NRF_SAADC, NRF_SAADC_EVENT_STOPPED) == 0) { } + nrf_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_STOPPED); + + nrf_saadc_disable(NRF_SAADC); + + if (value < 0) { + value = 0; + } + +// The ADC reading we expect if VDD is 3.3V. +#define NOMINAL_VALUE_3_3 (((3.3f/6)/0.6f)*16383) + return (value/NOMINAL_VALUE_3_3) * 3.3f; +} + + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { for (int i=0; i<2; i++) { - for (int k=0; k<4; k++) { - raw_id[4 * i + k] = (*(id_addresses[i]) >> k * 8) & 0xff; - } + ((uint32_t*) raw_id)[i] = NRF_FICR->DEVICEID[i]; } } diff --git a/ports/nrf/common-hal/microcontroller/__init__.c b/ports/nrf/common-hal/microcontroller/__init__.c index e26acff1b4cbc..7eb1c06149cb5 100644 --- a/ports/nrf/common-hal/microcontroller/__init__.c +++ b/ports/nrf/common-hal/microcontroller/__init__.c @@ -24,31 +24,77 @@ * THE SOFTWARE. */ +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + #include "common-hal/microcontroller/Pin.h" #include "common-hal/microcontroller/Processor.h" - +#include "shared-bindings/nvm/ByteArray.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Processor.h" -// TODO porting common_hal_mcu +#include "supervisor/filesystem.h" +#include "supervisor/port.h" +#include "supervisor/shared/safe_mode.h" +#include "nrfx_glue.h" +#include "nrf_nvic.h" + +// This routine should work even when interrupts are disabled. Used by OneWire +// for precise timing. void common_hal_mcu_delay_us(uint32_t delay) { -// os_delay_us(delay); + NRFX_DELAY_US(delay); } +static volatile uint32_t nesting_count = 0; +static uint8_t is_nested_critical_region; +static uint8_t sd_is_enabled = false; void common_hal_mcu_disable_interrupts() { + sd_softdevice_is_enabled(&sd_is_enabled); + if (sd_is_enabled) { + sd_nvic_critical_region_enter(&is_nested_critical_region); + } else { + __disable_irq(); + __DMB(); + nesting_count++; + } } void common_hal_mcu_enable_interrupts() { + // Don't check here if SD is enabled, because we'll crash if interrupts + // were turned off and sd_softdevice_is_enabled is called. + if (sd_is_enabled) { + sd_nvic_critical_region_exit(is_nested_critical_region); + } else { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // crash. + reset_into_safe_mode(HARD_CRASH); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); + } } void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { - // TODO: see atmel-samd for functionality + enum { DFU_MAGIC_UF2_RESET = 0x57 }; + if(runmode == RUNMODE_BOOTLOADER) + NRF_POWER->GPREGRET = DFU_MAGIC_UF2_RESET; + else + NRF_POWER->GPREGRET = 0; + if(runmode == RUNMODE_SAFE_MODE) + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); } void common_hal_mcu_reset(void) { - // TODO: see atmel-samd for functionality + filesystem_flush(); + NVIC_SystemReset(); } // The singleton microcontroller.Processor object, bound to microcontroller.cpu @@ -59,3 +105,68 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { }, }; +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 + +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .start_address = (uint8_t*) CIRCUITPY_INTERNAL_NVM_START_ADDR, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, +}; +#endif + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, +#ifdef NRF52840 + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/nrf/common-hal/neopixel_write/__init__.c b/ports/nrf/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000000..0a4036aae312f --- /dev/null +++ b/ports/nrf/common-hal/neopixel_write/__init__.c @@ -0,0 +1,333 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/mpstate.h" +#include "shared-bindings/neopixel_write/__init__.h" +#include "nrf_pwm.h" + +#include "tick.h" + +// https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp +// [[[Begin of the Neopixel NRF52 EasyDMA implementation +// by the Hackerspace San Salvador]]] +// This technique uses the PWM peripheral on the NRF52. The PWM uses the +// EasyDMA feature included on the chip. This technique loads the duty +// cycle configuration for each cycle when the PWM is enabled. For this +// to work we need to store a 16 bit configuration for each bit of the +// RGB(W) values in the pixel buffer. +// Comparator values for the PWM were hand picked and are guaranteed to +// be 100% organic to preserve freshness and high accuracy. Current +// parameters are: +// * PWM Clock: 16Mhz +// * Minimum step time: 62.5ns +// * Time for zero in high (T0H): 0.31ms +// * Time for one in high (T1H): 0.75ms +// * Cycle time: 1.25us +// * Frequency: 800Khz +// For 400Khz we just double the calculated times. +// ---------- BEGIN Constants for the EasyDMA implementation ----------- +// The PWM starts the duty cycle in LOW. To start with HIGH we +// need to set the 15th bit on each register. + +// WS2812 (rev A) timing is 0.35 and 0.7us +//#define MAGIC_T0H 5UL | (0x8000) // 0.3125us +//#define MAGIC_T1H 12UL | (0x8000) // 0.75us + +// WS2812B (rev B) timing is 0.4 and 0.8 us +#define MAGIC_T0H 6UL | (0x8000) // 0.375us +#define MAGIC_T1H 13UL | (0x8000) // 0.8125us +#define CTOPVAL 20UL // 1.25us + +// ---------- END Constants for the EasyDMA implementation ------------- +// +// If there is no device available an alternative cycle-counter +// implementation is tried. +// The nRF52840 runs with a fixed clock of 64Mhz. The alternative +// implementation is the same as the one used for the Teensy 3.0/1/2 but +// with the Nordic SDK HAL & registers syntax. +// The number of cycles was hand picked and is guaranteed to be 100% +// organic to preserve freshness and high accuracy. +// ---------- BEGIN Constants for cycle counter implementation --------- +#define CYCLES_800_T0H 18 // ~0.36 uS +#define CYCLES_800_T1H 41 // ~0.76 uS +#define CYCLES_800 71 // ~1.25 uS + +// ---------- END of Constants for cycle counter implementation -------- + +// find a free PWM device, which is not enabled and has no connected pins +static NRF_PWM_Type* find_free_pwm (void) { + NRF_PWM_Type* PWM[] = { + NRF_PWM0, NRF_PWM1, NRF_PWM2 +#ifdef NRF_PWM3 + , NRF_PWM3 +#endif + }; + + for ( size_t device = 0; device < ARRAY_SIZE(PWM); device++ ) { + if ( (PWM[device]->ENABLE == 0) && + (PWM[device]->PSEL.OUT[0] & PWM_PSEL_OUT_CONNECT_Msk) && (PWM[device]->PSEL.OUT[1] & PWM_PSEL_OUT_CONNECT_Msk) && + (PWM[device]->PSEL.OUT[2] & PWM_PSEL_OUT_CONNECT_Msk) && (PWM[device]->PSEL.OUT[3] & PWM_PSEL_OUT_CONNECT_Msk) ) { + return PWM[device]; + } + } + + return NULL; +} + +static size_t pixels_pattern_heap_size = 0; +// Called during reset_port() to free the pattern buffer +void neopixel_write_reset(void) { + MP_STATE_VM(pixels_pattern_heap) = NULL; + pixels_pattern_heap_size = 0; +} + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { + // To support both the SoftDevice + Neopixels we use the EasyDMA + // feature from the NRF52. However this technique implies to + // generate a pattern and store it on the memory. The actual + // memory used in bytes corresponds to the following formula: + // totalMem = numBytes*8*2+(2*2) + // The two additional bytes at the end are needed to reset the + // sequence. + // + // If there is not enough memory, we will fall back to cycle counter + // using DWT + +#define PATTERN_SIZE(numBytes) (numBytes * 8 * sizeof(uint16_t) + 2 * sizeof(uint16_t)) +// Allocate PWM space for up to STACK_PIXELS on the stack, to avoid malloc'ing. +// We may need to write to the status neopixel or to Circuit Playground NeoPixels +// when we cannot malloc, between VM instantiations. +// We need space for at least 10 pixels for Circuit Playground, but let's choose 24 +// to handle larger NeoPixel rings without malloc'ing. +#define STACK_PIXELS 24 + uint32_t pattern_size = PATTERN_SIZE(numBytes); + uint16_t* pixels_pattern = NULL; + + // Use the stack to store STACK_PIXEL's worth of PWM data. uint32_t to ensure alignment. + // It is 3*STACK_PIXELS to handle RGB. + // PATTERN_SIZE is a multiple of 4, so we don't need round up to make sure one_pixel is large enough. + uint32_t stack_pixels[PATTERN_SIZE(3 * STACK_PIXELS) / sizeof(uint32_t)]; + + NRF_PWM_Type* pwm = find_free_pwm(); + + // only malloc if there is PWM device available + if ( pwm != NULL ) { + if (pattern_size <= sizeof(stack_pixels)) { + pixels_pattern = (uint16_t *) stack_pixels; + } else { + uint8_t sd_en = 0; + (void) sd_softdevice_is_enabled(&sd_en); + + if (pixels_pattern_heap_size < pattern_size) { + // Current heap buffer is too small. + if (MP_STATE_VM(pixels_pattern_heap)) { + // Old pixels_pattern_heap will be gc'd; don't free it. + pixels_pattern = NULL; + pixels_pattern_heap_size = 0; + } + + // realloc routines fall back to a plain malloc if the incoming ptr is NULL. + if (sd_en) { + // If the soft device is enabled then we must use PWM to + // transmit. This takes a bunch of memory to do so raise an + // exception if we can't. + MP_STATE_VM(pixels_pattern_heap) = + (uint16_t *) m_realloc(MP_STATE_VM(pixels_pattern_heap), pattern_size); + } else { + // Might return NULL. + MP_STATE_VM(pixels_pattern_heap) = + // true means move if necessary. + (uint16_t *) m_realloc_maybe(MP_STATE_VM(pixels_pattern_heap), pattern_size, true); + } + if (MP_STATE_VM(pixels_pattern_heap)) { + pixels_pattern_heap_size = pattern_size; + } + } + // Might be NULL, which means we failed to allocate. + pixels_pattern = MP_STATE_VM(pixels_pattern_heap); + } + } + + // Wait to make sure we don't append onto the last transmission. + wait_until(next_start_tick_ms, next_start_tick_us); + + // Use the identified device to choose the implementation + // If a PWM device is available and we have a buffer, use DMA. + if ( (pixels_pattern != NULL) && (pwm != NULL) ) { + uint16_t pos = 0; // bit position + + for ( uint16_t n = 0; n < numBytes; n++ ) { + uint8_t pix = pixels[n]; + + for ( uint8_t mask = 0x80; mask > 0; mask >>= 1 ) { + pixels_pattern[pos] = (pix & mask) ? MAGIC_T1H : MAGIC_T0H; + pos++; + } + } + + // Zero padding to indicate the end of sequence + pixels_pattern[pos++] = 0 | (0x8000); // Seq end + pixels_pattern[pos++] = 0 | (0x8000); // Seq end + + // Set the wave mode to count UP + // Set the PWM to use the 16MHz clock + // Setting of the maximum count + // but keeping it on 16Mhz allows for more granularity just + // in case someone wants to do more fine-tuning of the timing. + nrf_pwm_configure(pwm, NRF_PWM_CLK_16MHz, NRF_PWM_MODE_UP, CTOPVAL); + + // Disable loops, we want the sequence to repeat only once + nrf_pwm_loop_set(pwm, 0); + + // On the "Common" setting the PWM uses the same pattern for the + // for supported sequences. The pattern is stored on half-word of 16bits + nrf_pwm_decoder_set(pwm, PWM_DECODER_LOAD_Common, PWM_DECODER_MODE_RefreshCount); + + // Pointer to the memory storing the pattern + nrf_pwm_seq_ptr_set(pwm, 0, pixels_pattern); + + // Calculation of the number of steps loaded from memory. + nrf_pwm_seq_cnt_set(pwm, 0, pattern_size / sizeof(uint16_t)); + + // The following settings are ignored with the current config. + nrf_pwm_seq_refresh_set(pwm, 0, 0); + nrf_pwm_seq_end_delay_set(pwm, 0, 0); + + // The Neopixel implementation is a blocking algorithm. DMA + // allows for non-blocking operation. To "simulate" a blocking + // operation we enable the interruption for the end of sequence + // and block the execution thread until the event flag is set by + // the peripheral. + // pwm->INTEN |= (PWM_INTEN_SEQEND0_Enabled<pin->number, 0xFFFFFFFFUL, 0xFFFFFFFFUL, 0xFFFFFFFFUL} ); + + // Enable the PWM + nrf_pwm_enable(pwm); + + // After all of this and many hours of reading the documentation + // we are ready to start the sequence... + nrf_pwm_event_clear(pwm, NRF_PWM_EVENT_SEQEND0); + nrf_pwm_task_trigger(pwm, NRF_PWM_TASK_SEQSTART0); + + // But we have to wait for the flag to be set. + while ( !nrf_pwm_event_check(pwm, NRF_PWM_EVENT_SEQEND0) ) { + RUN_BACKGROUND_TASKS; + } + + // Before leave we clear the flag for the event. + nrf_pwm_event_clear(pwm, NRF_PWM_EVENT_SEQEND0); + + // We need to disable the device and disconnect + // all the outputs before leave or the device will not + // be selected on the next call. + // TODO: Check if disabling the device causes performance issues. + nrf_pwm_disable(pwm); + nrf_pwm_pins_set(pwm, (uint32_t[]) {0xFFFFFFFFUL, 0xFFFFFFFFUL, 0xFFFFFFFFUL, 0xFFFFFFFFUL} ); + + } // End of DMA implementation + // --------------------------------------------------------------------- + else { + // Fall back to DWT + // If you are using the Bluetooth SoftDevice we advise you to not disable + // the interrupts. Disabling the interrupts even for short periods of time + // causes the SoftDevice to stop working. + // Disable the interrupts only in cases where you need high performance for + // the LEDs and if you are not using the EasyDMA feature. + __disable_irq(); + + uint32_t decoded_pin = digitalinout->pin->number; + NRF_GPIO_Type* port = nrf_gpio_pin_port_decode(&decoded_pin); + + uint32_t pinMask = ( 1UL << decoded_pin ); + + uint32_t CYCLES_X00 = CYCLES_800; + uint32_t CYCLES_X00_T1H = CYCLES_800_T1H; + uint32_t CYCLES_X00_T0H = CYCLES_800_T0H; + + // Enable DWT in debug core + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + + // Tries to re-send the frame if is interrupted by the SoftDevice. + while ( 1 ) { + uint8_t *p = pixels; + + uint32_t cycStart = DWT->CYCCNT; + uint32_t cyc = 0; + + for ( uint16_t n = 0; n < numBytes; n++ ) { + uint8_t pix = *p++; + + for ( uint8_t mask = 0x80; mask; mask >>= 1 ) { + while ( DWT->CYCCNT - cyc < CYCLES_X00 ) + ; + cyc = DWT->CYCCNT; + + port->OUTSET |= pinMask; + + if ( pix & mask ) { + while ( DWT->CYCCNT - cyc < CYCLES_X00_T1H ) + ; + } else { + while ( DWT->CYCCNT - cyc < CYCLES_X00_T0H ) + ; + } + + port->OUTCLR |= pinMask; + } + } + while ( DWT->CYCCNT - cyc < CYCLES_X00 ) + ; + + // If total time longer than 25%, resend the whole data. + // Since we are likely to be interrupted by SoftDevice + if ( (DWT->CYCCNT - cycStart) < (8 * numBytes * ((CYCLES_X00 * 5) / 4)) ) { + break; + } + + // re-send need 300us delay + mp_hal_delay_us(300); + } + + // Enable interrupts again + __enable_irq(); + } + + // Update the next start. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } +} diff --git a/ports/nrf/common-hal/neopixel_write/__init__.h b/ports/nrf/common-hal/neopixel_write/__init__.h new file mode 100644 index 0000000000000..b8dce85adf998 --- /dev/null +++ b/ports/nrf/common-hal/neopixel_write/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_NEOPIXEL_WRITE_INIT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_NEOPIXEL_WRITE_INIT_H + +void neopixel_write_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_NEOPIXEL_WRITE_INIT_H \ No newline at end of file diff --git a/ports/nrf/common-hal/nvm/ByteArray.c b/ports/nrf/common-hal/nvm/ByteArray.c new file mode 100644 index 0000000000000..6b2f04a61bf45 --- /dev/null +++ b/ports/nrf/common-hal/nvm/ByteArray.c @@ -0,0 +1,76 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "common-hal/nvm/ByteArray.h" + +#include +#include + +#include "peripherals/nrf/nvm.h" + +uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { + return self->len; +} + +static bool write_page(uint32_t page_addr, uint32_t offset, uint32_t len, uint8_t *bytes) { + // Write a whole page to flash, buffering it first and then erasing and rewriting + // it since we can only clear a whole page at a time. + + if (offset == 0 && len == FLASH_PAGE_SIZE) { + return nrf_nvm_safe_flash_page_write(page_addr, bytes); + } else { + uint8_t buffer[FLASH_PAGE_SIZE]; + memcpy(buffer, (uint8_t *)page_addr, FLASH_PAGE_SIZE); + memcpy(buffer + offset, bytes, len); + return nrf_nvm_safe_flash_page_write(page_addr, buffer); + } +} + +bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint8_t* values, uint32_t len) { + + uint32_t address = (uint32_t) self->start_address + start_index; + uint32_t offset = address % FLASH_PAGE_SIZE; + uint32_t page_addr = address - offset; + + while (len) { + uint32_t write_len = MIN(len, FLASH_PAGE_SIZE - offset); + if (!write_page(page_addr, offset, write_len, values)) { + return false; + } + len -= write_len; + values += write_len; + page_addr += FLASH_PAGE_SIZE; + offset = 0; + } + return true; +} + +void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint32_t len, uint8_t* values) { + memcpy(values, self->start_address + start_index, len); +} diff --git a/ports/nrf/common-hal/nvm/ByteArray.h b/ports/nrf/common-hal/nvm/ByteArray.h new file mode 100644 index 0000000000000..c048d557781cf --- /dev/null +++ b/ports/nrf/common-hal/nvm/ByteArray.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_NVM_BYTEARRAY_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_NVM_BYTEARRAY_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* start_address; + uint32_t len; +} nvm_bytearray_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_NVM_BYTEARRAY_H diff --git a/ports/nrf/common-hal/nvm/__init__.c b/ports/nrf/common-hal/nvm/__init__.c new file mode 100644 index 0000000000000..3cdc9d3a4c098 --- /dev/null +++ b/ports/nrf/common-hal/nvm/__init__.c @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// No nvm module functions. diff --git a/ports/nrf/common-hal/os/__init__.c b/ports/nrf/common-hal/os/__init__.c index 402b32bc50aa0..b2ad00a5ca421 100644 --- a/ports/nrf/common-hal/os/__init__.c +++ b/ports/nrf/common-hal/os/__init__.c @@ -28,13 +28,12 @@ #include "py/mpconfig.h" #include "py/objstr.h" #include "py/objtuple.h" -#include "py/qstr.h" #ifdef BLUETOOTH_SD #include "nrf_sdm.h" #endif -#include "nrf.h" +#include "nrf_rng.h" STATIC const qstr os_uname_info_fields[] = { MP_QSTR_sysname, MP_QSTR_nodename, @@ -47,7 +46,6 @@ STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); - STATIC MP_DEFINE_ATTRTUPLE( os_uname_info_obj, os_uname_info_fields, @@ -63,28 +61,42 @@ mp_obj_t common_hal_os_uname(void) { return (mp_obj_t)&os_uname_info_obj; } -bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { +bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { #ifdef BLUETOOTH_SD uint8_t sd_en = 0; (void) sd_softdevice_is_enabled(&sd_en); if (sd_en) { - return NRF_SUCCESS == sd_rand_application_vector_get(buffer,length); + while (length != 0) { + uint8_t available = 0; + sd_rand_application_bytes_available_get(&available); + if (available) { + uint32_t request = MIN(length, available); + uint32_t result = sd_rand_application_vector_get(buffer, request); + if (result != NRF_SUCCESS) { + return false; + } + buffer += request; + length -= request; + } else { + RUN_BACKGROUND_TASKS; + } + } + return true; } #endif - NRF_RNG->EVENTS_VALRDY = 0; - NRF_RNG->TASKS_START = 1; + nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY); + nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_START); for (uint32_t i = 0; i < length; i++) { - while (NRF_RNG->EVENTS_VALRDY == 0) { - ; - } - NRF_RNG->EVENTS_VALRDY = 0; - buffer[i] = (uint8_t) NRF_RNG->VALUE; + while (nrf_rng_event_check(NRF_RNG, NRF_RNG_EVENT_VALRDY) == 0); + nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY); + + buffer[i] = nrf_rng_random_value_get(NRF_RNG); } - NRF_RNG->TASKS_STOP = 1; + nrf_rng_task_trigger(NRF_RNG, NRF_RNG_TASK_STOP); return true; } diff --git a/ports/nrf/common-hal/pulseio/PWMOut.c b/ports/nrf/common-hal/pulseio/PWMOut.c index ea9ba3f0e2ece..6921091f8a64f 100644 --- a/ports/nrf/common-hal/pulseio/PWMOut.c +++ b/ports/nrf/common-hal/pulseio/PWMOut.c @@ -3,8 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * Copyright (c) 2016 Damien P. George + * Copyright (c) 2018 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -31,93 +30,71 @@ #include "py/runtime.h" #include "common-hal/pulseio/PWMOut.h" #include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" -#define PWM_MAX_MODULE 3 -#define PWM_MAX_CHANNEL 4 +#include "nrf_gpio.h" #define PWM_MAX_FREQ (16000000) -NRF_PWM_Type* const pwm_arr[PWM_MAX_MODULE] = { NRF_PWM0, NRF_PWM1, NRF_PWM2 }; - -uint16_t _seq0[PWM_MAX_MODULE][PWM_MAX_CHANNEL]; - - -static int pin2channel(NRF_PWM_Type* pwm, uint8_t pin) -{ - for(int i=0; i < PWM_MAX_CHANNEL; i++) - { - if ( pwm->PSEL.OUT[i] == ((uint32_t)pin) ) return i; - } - - return -1; -} - -static int find_free_channel(NRF_PWM_Type* pwm) -{ - for(int i=0; i < PWM_MAX_CHANNEL; i++) - { - if (pwm->PSEL.OUT[i] == 0xFFFFFFFFUL) - { - return i; - } - } - - return -1; +STATIC NRF_PWM_Type* pwms[] = { +#if NRFX_CHECK(NRFX_PWM0_ENABLED) + NRF_PWM0, +#endif +#if NRFX_CHECK(NRFX_PWM1_ENABLED) + NRF_PWM1, +#endif +#if NRFX_CHECK(NRFX_PWM2_ENABLED) + NRF_PWM2, +#endif +#if NRFX_CHECK(NRFX_PWM3_ENABLED) + NRF_PWM3, +#endif +}; + +#define CHANNELS_PER_PWM 4 + +STATIC uint16_t pwm_seq[MP_ARRAY_SIZE(pwms)][CHANNELS_PER_PWM]; + +static uint8_t never_reset_pwm[MP_ARRAY_SIZE(pwms)]; + +STATIC int pwm_idx(NRF_PWM_Type *pwm) { + for(size_t i=0; i < MP_ARRAY_SIZE(pwms); i++) + if(pwms[i] == pwm) return i; + return -1; } -static bool pwm_is_unused(NRF_PWM_Type* pwm) -{ - for(int i=0; i < PWM_MAX_CHANNEL; i++) - { - if (pwm->PSEL.OUT[i] != 0xFFFFFFFFUL) - { - return false; +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + for(size_t i=0; i < MP_ARRAY_SIZE(pwms); i++) { + NRF_PWM_Type* pwm = pwms[i]; + if (pwm == self->pwm) { + never_reset_pwm[i] += 1; + } } - } - return true; + never_reset_pin_number(self->pin_number); } -static void find_new_pwm(pulseio_pwmout_obj_t* self) -{ - // First find unused PWM module - for(int i=0; ipwm = pwm_arr[i]; - self->channel = 0; - return; +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + for(size_t i=0; i < MP_ARRAY_SIZE(pwms); i++) { + NRF_PWM_Type* pwm = pwms[i]; + if (pwm == self->pwm) { + never_reset_pwm[i] -= 1; + } } - } - - // Find available channel in a using PWM - for(int i=0; i= 0 ) - { - self->pwm = pwm_arr[i]; - self->channel = (uint8_t) ch; - return; - } - } } -void pwmout_reset(void) -{ - for(int i=0; iENABLE = 0; pwm->MODE = PWM_MODE_UPDOWN_Up; pwm->DECODER = PWM_DECODER_LOAD_Individual; pwm->LOOP = 0; pwm->PRESCALER = PWM_PRESCALER_PRESCALER_DIV_1; // default is 500 hz pwm->COUNTERTOP = (PWM_MAX_FREQ/500); // default is 500 hz - pwm->SEQ[0].PTR = (uint32_t) _seq0[i]; - pwm->SEQ[0].CNT = PWM_MAX_CHANNEL; // default mode is Individual --> count must be 4 + pwm->SEQ[0].PTR = (uint32_t) pwm_seq[i]; + pwm->SEQ[0].CNT = CHANNELS_PER_PWM; // default mode is Individual --> count must be 4 pwm->SEQ[0].REFRESH = 0; pwm->SEQ[0].ENDDELAY = 0; @@ -126,56 +103,142 @@ void pwmout_reset(void) pwm->SEQ[1].REFRESH = 0; pwm->SEQ[1].ENDDELAY = 0; - for(int ch =0; ch < PWM_MAX_CHANNEL; ch++) - { - _seq0[i][ch] = (1UL << 15); // polarity = 0 + for(int ch =0; ch < CHANNELS_PER_PWM; ch++) { + pwm_seq[i][ch] = (1 << 15); // polarity = 0 + } +} + +void pwmout_reset(void) { + for(size_t i=0; i < MP_ARRAY_SIZE(pwms); i++) { + if (never_reset_pwm[i] > 0) { + continue; + } + reset_single_pwmout(i); + } +} + +// Find the smallest prescaler value that will allow the divisor to be in range. +// This allows the most accuracy. +bool convert_frequency(uint32_t frequency, uint16_t *countertop, nrf_pwm_clk_t *base_clock) { + uint32_t divisor = 1; + // Use a 32-bit number so we don't overflow the uint16_t; + uint32_t tentative_countertop; + for (*base_clock = PWM_PRESCALER_PRESCALER_DIV_1; + *base_clock <= PWM_PRESCALER_PRESCALER_DIV_128; + (*base_clock)++) { + tentative_countertop = PWM_MAX_FREQ / divisor / frequency; + // COUNTERTOP must be 3..32767, according to datasheet, but 3 doesn't work. 4 does. + if (tentative_countertop <= 32767 && tentative_countertop >= 4) { + // In range, OK to return. + *countertop = tentative_countertop; + return true; + } + divisor *= 2; + } + + return false; +} + +NRF_PWM_Type *pwmout_allocate(uint16_t countertop, nrf_pwm_clk_t base_clock, + bool variable_frequency, int8_t *channel_out, bool *pwm_already_in_use_out) { + for (size_t pwm_index = 0; pwm_index < MP_ARRAY_SIZE(pwms); pwm_index++) { + NRF_PWM_Type *pwm = pwms[pwm_index]; + bool pwm_already_in_use = pwm->ENABLE & SPIM_ENABLE_ENABLE_Msk; + if (pwm_already_in_use) { + if (variable_frequency) { + // Variable frequency requires exclusive use of a PWM, so try the next one. + continue; + } + + // PWM is in use, but see if it's set to the same frequency we need. If so, + // look for a free channel. + if (pwm->COUNTERTOP == countertop && pwm->PRESCALER == base_clock) { + for (size_t chan = 0; chan < CHANNELS_PER_PWM; chan++) { + if (pwm->PSEL.OUT[chan] == 0xFFFFFFFF) { + // Channel is free. + if(channel_out) + *channel_out = chan; + if(pwm_already_in_use_out) + *pwm_already_in_use_out = pwm_already_in_use; + return pwm; + } + } + } + } else { + // PWM not yet in use, so we can start to use it. Use channel 0. + if(channel_out) + *channel_out = 0; + if(pwm_already_in_use_out) + *pwm_already_in_use_out = pwm_already_in_use; + return pwm; + } } - } -} - -void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, - const mcu_pin_obj_t* pin, - uint16_t duty, - uint32_t frequency, - bool variable_frequency) { - self->pwm = NULL; - self->pin = pin; - - // check if mapped to PWM channel already - for(int i=0; ipin); - if ( ch >= 0 ) - { - self->pwm = pwm_arr[i]; - self->channel = (uint8_t) ch; - break; + return NULL; +} + +void pwmout_free_channel(NRF_PWM_Type *pwm, int8_t channel) { + // Disconnect pin from channel. + pwm->PSEL.OUT[channel] = 0xFFFFFFFF; + + for(int i=0; i < CHANNELS_PER_PWM; i++) { + if (pwm->PSEL.OUT[i] != 0xFFFFFFFF) { + // Some channel is still being used, so don't disable. + return; + } + } + + nrf_pwm_disable(pwm); +} + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, + const mcu_pin_obj_t* pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + + // We don't use the nrfx driver here because we want to dynamically allocate channels + // as needed in an already-enabled PWM. + + uint16_t countertop; + nrf_pwm_clk_t base_clock; + if (frequency == 0 || !convert_frequency(frequency, &countertop, &base_clock)) { + return PWMOUT_INVALID_FREQUENCY; } - } - // Haven't mapped before - if ( !self->pwm ) - { - find_new_pwm(self); - } + int8_t channel; + bool pwm_already_in_use; + self->pwm = pwmout_allocate(countertop, base_clock, variable_frequency, + &channel, &pwm_already_in_use); - if (self->pwm) - { - hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + if (self->pwm == NULL) { + return PWMOUT_ALL_TIMERS_IN_USE; + } + + self->channel = channel; + self->pin_number = pin->number; + claim_pin(pin); + + self->frequency = frequency; + self->variable_frequency = variable_frequency; + + // Note this is standard, not strong drive. + nrf_gpio_cfg_output(self->pin_number); // disable before mapping pin channel - self->pwm->ENABLE = 0; + nrf_pwm_disable(self->pwm); - self->pwm->PSEL.OUT[self->channel] = pin->pin; + if (!pwm_already_in_use) { + reset_single_pwmout(pwm_idx(self->pwm)); + nrf_pwm_configure(self->pwm, base_clock, NRF_PWM_MODE_UP, countertop); + } - self->pwm->COUNTERTOP = (PWM_MAX_FREQ/frequency); - self->freq = frequency; - self->variable_freq = variable_frequency; + // Connect channel to pin, without disturbing other channels. + self->pwm->PSEL.OUT[self->channel] = pin->number; - self->pwm->ENABLE = 1; + nrf_pwm_enable(self->pwm); common_hal_pulseio_pwmout_set_duty_cycle(self, duty); - } + return PWMOUT_OK; } bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { @@ -183,58 +246,53 @@ bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { } void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { - if (common_hal_pulseio_pwmout_deinited(self)) { - return; - } - - self->pwm->ENABLE = 0; + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } - self->pwm->PSEL.OUT[self->channel] = 0xFFFFFFFFUL; + nrf_gpio_cfg_default(self->pin_number); - // re-enable PWM module if there is other active channel - for(int i=0; i < PWM_MAX_CHANNEL; i++) - { - if (self->pwm->PSEL.OUT[i] != 0xFFFFFFFFUL) - { - self->pwm->ENABLE = 1; - break; - } - } + NRF_PWM_Type* pwm = self->pwm; + self->pwm = NULL; - hal_gpio_cfg_pin(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + pwmout_free_channel(pwm, self->channel); - self->pwm = NULL; - self->pin = mp_const_none; + reset_pin_number(self->pin_number); + self->pin_number = NO_PIN; } -void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { - self->duty = duty; +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty_cycle) { + self->duty_cycle = duty_cycle; - uint16_t* p_value = ((uint16_t*)self->pwm->SEQ[0].PTR) + self->channel; - *p_value = ((duty * self->pwm->COUNTERTOP) / 0xFFFF) | (1 << 15); + uint16_t* p_value = ((uint16_t*)self->pwm->SEQ[0].PTR) + self->channel; + *p_value = ((duty_cycle * self->pwm->COUNTERTOP) / 0xFFFF) | (1 << 15); - self->pwm->TASKS_SEQSTART[0] = 1; + self->pwm->TASKS_SEQSTART[0] = 1; } uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { - return self->duty; + return self->duty_cycle; } void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { - if (frequency == 0 || frequency > 16000000) { - mp_raise_ValueError("Invalid PWM frequency"); - } + // COUNTERTOP is 3..32767, so highest available frequency is PWM_MAX_FREQ / 3. + uint16_t countertop; + nrf_pwm_clk_t base_clock; + if (frequency == 0 || !convert_frequency(frequency, &countertop, &base_clock)) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } + self->frequency = frequency; - self->freq = frequency; - self->pwm->COUNTERTOP = (PWM_MAX_FREQ/frequency); - self->pwm->TASKS_SEQSTART[0] = 1; + nrf_pwm_configure(self->pwm, base_clock, NRF_PWM_MODE_UP, countertop); + // Set the duty cycle again, because it depends on COUNTERTOP, which probably changed. + // Setting the duty cycle will also do a SEQSTART. + common_hal_pulseio_pwmout_set_duty_cycle(self, self->duty_cycle); } uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { - return self->freq; + return self->frequency; } bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { - return self->variable_freq; + return self->variable_frequency; } - diff --git a/ports/nrf/common-hal/pulseio/PWMOut.h b/ports/nrf/common-hal/pulseio/PWMOut.h index 9de127ac7b615..b6798cb68597f 100644 --- a/ports/nrf/common-hal/pulseio/PWMOut.h +++ b/ports/nrf/common-hal/pulseio/PWMOut.h @@ -27,21 +27,22 @@ #ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_PULSEIO_PWMOUT_H #define MICROPY_INCLUDED_NRF_COMMON_HAL_PULSEIO_PWMOUT_H -#include "common-hal/microcontroller/Pin.h" - +#include "nrfx_pwm.h" #include "py/obj.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t *pin; NRF_PWM_Type* pwm; - - uint8_t channel; - bool variable_freq; - uint16_t duty; - uint32_t freq; + uint8_t pin_number; + uint8_t channel: 7; + bool variable_frequency: 1; + uint16_t duty_cycle; + uint32_t frequency; } pulseio_pwmout_obj_t; void pwmout_reset(void); +NRF_PWM_Type *pwmout_allocate(uint16_t countertop, nrf_pwm_clk_t base_clock, + bool variable_frequency, int8_t *channel_out, bool *pwm_already_in_use_out); +void pwmout_free_channel(NRF_PWM_Type *pwm, int8_t channel); #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/nrf/common-hal/pulseio/PulseIn.c b/ports/nrf/common-hal/pulseio/PulseIn.c index aa6bb8665b2b3..b47cc6273b620 100644 --- a/ports/nrf/common-hal/pulseio/PulseIn.c +++ b/ports/nrf/common-hal/pulseio/PulseIn.c @@ -27,54 +27,256 @@ #include "common-hal/pulseio/PulseIn.h" #include +#include -#include "mpconfigport.h" +#include "py/mpconfig.h" #include "py/gc.h" #include "py/runtime.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/pulseio/PulseIn.h" +#include "tick.h" +#include "nrfx_gpiote.h" + +// obj array to map pin -> self since nrfx hide the mapping +static pulseio_pulsein_obj_t* _objs[GPIOTE_CH_NUM]; + +// return index of the object in array +static int _find_pulsein_obj(pulseio_pulsein_obj_t* obj) { + for(size_t i = 0; i < NRFX_ARRAY_SIZE(_objs); i++ ) { + if ( _objs[i] == obj) { + return i; + } + } + + return -1; +} + +static void _pulsein_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { + // Grab the current time first. + uint32_t current_us; + uint64_t current_ms; + current_tick(¤t_ms, ¤t_us); + + // current_tick gives us the remaining us until the next tick but we want the number since the last ms. + current_us = 1000 - current_us; + + pulseio_pulsein_obj_t* self = NULL; + for(size_t i = 0; i < NRFX_ARRAY_SIZE(_objs); i++ ) { + if ( _objs[i] && _objs[i]->pin == pin ) { + self = _objs[i]; + break; + } + } + if ( !self ) return; + + if (self->first_edge) { + // first pulse is opposite state from idle + bool state = nrf_gpio_pin_read(self->pin); + if ( self->idle_state != state ) { + self->first_edge = false; + } + }else { + uint32_t ms_diff = current_ms - self->last_ms; + uint16_t us_diff = current_us - self->last_us; + uint32_t total_diff = us_diff; + + if (self->last_us > current_us) { + total_diff = 1000 + current_us - self->last_us; + if (ms_diff > 1) { + total_diff += (ms_diff - 1) * 1000; + } + } else { + total_diff += ms_diff * 1000; + } + uint16_t duration = 0xffff; + if (total_diff < duration) { + duration = total_diff; + } + + uint16_t i = (self->start + self->len) % self->maxlen; + self->buffer[i] = duration; + if (self->len < self->maxlen) { + self->len++; + } else { + self->start++; + } + } + + self->last_ms = current_ms; + self->last_us = current_us; +} + void pulsein_reset(void) { + if ( nrfx_gpiote_is_init() ) { + nrfx_gpiote_uninit(); + } + nrfx_gpiote_init(NRFX_GPIOTE_CONFIG_IRQ_PRIORITY); + memset(_objs, 0, sizeof(_objs)); } void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { - mp_raise_NotImplementedError(NULL); + int idx = _find_pulsein_obj(NULL); + if ( idx < 0 ) { + mp_raise_NotImplementedError(NULL); + } + _objs[idx] = self; + + self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); + if (self->buffer == NULL) { + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); + } + + self->pin = pin->number; + self->maxlen = maxlen; + self->idle_state = idle_state; + self->start = 0; + self->len = 0; + self->first_edge = true; + self->paused = false; + self->last_us = 0; + self->last_ms = 0; + + claim_pin(pin); + + nrfx_gpiote_in_config_t cfg = { + .sense = NRF_GPIOTE_POLARITY_TOGGLE, + .pull = NRF_GPIO_PIN_NOPULL, // idle_state ? NRF_GPIO_PIN_PULLDOWN : NRF_GPIO_PIN_PULLUP, + .is_watcher = false, // nrf_gpio_cfg_watcher vs nrf_gpio_cfg_input + .hi_accuracy = true, + .skip_gpio_setup = false + }; + nrfx_gpiote_in_init(self->pin, &cfg, _pulsein_handler); + nrfx_gpiote_in_event_enable(self->pin, true); } bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { - return 1; + return self->pin == NO_PIN; } void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { + if (common_hal_pulseio_pulsein_deinited(self)) { + return; + } + + nrfx_gpiote_in_event_disable(self->pin); + nrfx_gpiote_in_uninit(self->pin); + + // mark local array as invalid + int idx = _find_pulsein_obj(self); + if ( idx < 0 ) { + mp_raise_NotImplementedError(NULL); + } + _objs[idx] = NULL; + reset_pin_number(self->pin); + self->pin = NO_PIN; } void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { - + nrfx_gpiote_in_event_disable(self->pin); + self->paused = true; } void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, uint16_t trigger_duration) { + // Make sure we're paused. + if ( !self->paused ) { + common_hal_pulseio_pulsein_pause(self); + } + + // Send the trigger pulse. + if (trigger_duration > 0) { + nrfx_gpiote_in_uninit(self->pin); + + nrf_gpio_cfg_output(self->pin); + nrf_gpio_pin_write(self->pin, !self->idle_state); + common_hal_mcu_delay_us((uint32_t)trigger_duration); + nrf_gpio_pin_write(self->pin, self->idle_state); + + nrfx_gpiote_in_config_t cfg = { + .sense = NRF_GPIOTE_POLARITY_TOGGLE, + .pull = NRF_GPIO_PIN_NOPULL, // idle_state ? NRF_GPIO_PIN_PULLDOWN : NRF_GPIO_PIN_PULLUP, + .is_watcher = false, // nrf_gpio_cfg_watcher vs nrf_gpio_cfg_input + .hi_accuracy = true, + .skip_gpio_setup = false + }; + nrfx_gpiote_in_init(self->pin, &cfg, _pulsein_handler); + } + + self->first_edge = true; + self->paused = false; + self->last_ms = 0; + self->last_us = 0; + nrfx_gpiote_in_event_enable(self->pin, true); } void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { + if ( !self->paused ) { + nrfx_gpiote_in_event_disable(self->pin); + } + self->start = 0; + self->len = 0; + + if ( !self->paused ) { + nrfx_gpiote_in_event_enable(self->pin, true); + } +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index) { + if ( !self->paused ) { + nrfx_gpiote_in_event_disable(self->pin); + } + + if (index < 0) { + index += self->len; + } + if (index < 0 || index >= self->len) { + if ( !self->paused ) { + nrfx_gpiote_in_event_enable(self->pin, true); + } + mp_raise_IndexError(translate("index out of range")); + } + uint16_t value = self->buffer[(self->start + index) % self->maxlen]; + + if ( !self->paused ) { + nrfx_gpiote_in_event_enable(self->pin, true); + } + + return value; } uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { - return 0; + if (self->len == 0) { + mp_raise_IndexError(translate("pop from an empty PulseIn")); + } + + if ( !self->paused ) { + nrfx_gpiote_in_event_disable(self->pin); + } + + uint16_t value = self->buffer[self->start]; + self->start = (self->start + 1) % self->maxlen; + self->len--; + + if ( !self->paused ) { + nrfx_gpiote_in_event_enable(self->pin, true); + } + + return value; } uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { - return 0xadaf; + return self->maxlen; } -uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { - return 0xadaf; +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { + return self->paused; } -uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index) { - return 0xadaf; +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { + return self->len; } diff --git a/ports/nrf/common-hal/pulseio/PulseIn.h b/ports/nrf/common-hal/pulseio/PulseIn.h index 666f5a164822a..4b2c6eee3f6c7 100644 --- a/ports/nrf/common-hal/pulseio/PulseIn.h +++ b/ports/nrf/common-hal/pulseio/PulseIn.h @@ -33,15 +33,19 @@ typedef struct { mp_obj_base_t base; - uint8_t channel; + uint8_t pin; + bool idle_state; + bool paused; + volatile bool first_edge; + uint16_t* buffer; uint16_t maxlen; - bool idle_state; + volatile uint16_t start; volatile uint16_t len; - volatile bool first_edge; - uint16_t ticks_per_ms; + volatile uint16_t last_us; + volatile uint64_t last_ms; } pulseio_pulsein_obj_t; void pulsein_reset(void); diff --git a/ports/nrf/common-hal/pulseio/PulseOut.c b/ports/nrf/common-hal/pulseio/PulseOut.c index 3495f38f7d062..d0433247acfd3 100644 --- a/ports/nrf/common-hal/pulseio/PulseOut.c +++ b/ports/nrf/common-hal/pulseio/PulseOut.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Damien P. George + * Copyright (c) 2018 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -28,32 +28,135 @@ #include -#include "mpconfigport.h" +#include "py/mpconfig.h" +#include "nrf/pins.h" +#include "nrf/timers.h" #include "py/gc.h" #include "py/runtime.h" - #include "shared-bindings/pulseio/PulseOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" -//void pulse_finish(struct tc_module *const module) { -// -//} +// A single timer is shared amongst all PulseOut objects under the assumption that +// the code is single threaded. +static uint8_t refcount = 0; -void pulseout_reset() { +static nrfx_timer_t *timer = NULL; + +static uint16_t *pulse_array = NULL; +static volatile uint16_t pulse_array_index = 0; +static uint16_t pulse_array_length; + +static void turn_on(pulseio_pulseout_obj_t *pulseout) { + pulseout->pwmout->pwm->PSEL.OUT[0] = pulseout->pwmout->pin_number; +} + +static void turn_off(pulseio_pulseout_obj_t *pulseout) { + // Disconnect pin from PWM. + pulseout->pwmout->pwm->PSEL.OUT[0] = 0xffffffff; + // Make sure pin is low. + nrf_gpio_pin_clear(pulseout->pwmout->pin_number); +} + +static void start_timer(void) { + nrfx_timer_clear(timer); + // true enables interrupt. + nrfx_timer_compare(timer, NRF_TIMER_CC_CHANNEL0, pulse_array[pulse_array_index], true); + nrfx_timer_resume(timer); +} + +static void pulseout_event_handler(nrf_timer_event_t event_type, void *p_context) { + pulseio_pulseout_obj_t *pulseout = (pulseio_pulseout_obj_t*) p_context; + if (event_type != NRF_TIMER_EVENT_COMPARE0) { + // Spurious event. + return; + } + nrfx_timer_pause(timer); + + pulse_array_index++; + // No more pulses. Turn off output and don't restart. + if (pulse_array_index >= pulse_array_length) { + turn_off(pulseout); + return; + } + + // Alternate on and off, starting with on. + if (pulse_array_index % 2 == 0) { + turn_on(pulseout); + } else { + turn_off(pulseout); + } + + // Count up to the next given value. + start_timer(); } -void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, const pulseio_pwmout_obj_t* carrier) { - mp_raise_NotImplementedError(NULL); +void pulseout_reset() { + if (timer != NULL) { + nrf_peripherals_free_timer(timer); + } + refcount = 0; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, + const pulseio_pwmout_obj_t* carrier) { + if (refcount == 0) { + timer = nrf_peripherals_allocate_timer(); + if (timer == NULL) { + mp_raise_RuntimeError(translate("All timers in use")); + } + } + refcount++; + + nrfx_timer_config_t timer_config = { + // PulseOut durations are in microseconds, so this is convenient. + .frequency = NRF_TIMER_FREQ_1MHz, + .mode = NRF_TIMER_MODE_TIMER, + .bit_width = NRF_TIMER_BIT_WIDTH_32, + .interrupt_priority = NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, + .p_context = self, + }; + + self->pwmout = carrier; + + nrfx_timer_init(timer, &timer_config, &pulseout_event_handler); + turn_off(self); } bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { - return 1; + return self->pwmout == NULL; } void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { + if (common_hal_pulseio_pulseout_deinited(self)) { + return; + } + turn_on(self); + self->pwmout = NULL; + refcount--; + if (refcount == 0) { + nrf_peripherals_free_timer(timer); + } } void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { + pulse_array = pulses; + pulse_array_index = 0; + pulse_array_length = length; + + nrfx_timer_enable(timer); + + turn_on(self); + // Count up to the next given value. + start_timer(); + + while(pulse_array_index < length) { + // Do other things while we wait. The interrupts will handle sending the + // signal. + RUN_BACKGROUND_TASKS; + } + nrfx_timer_disable(timer); } diff --git a/ports/nrf/common-hal/pulseio/PulseOut.h b/ports/nrf/common-hal/pulseio/PulseOut.h index 9a764e3023098..42ec52e30e1bd 100644 --- a/ports/nrf/common-hal/pulseio/PulseOut.h +++ b/ports/nrf/common-hal/pulseio/PulseOut.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2018 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -28,13 +28,13 @@ #define MICROPY_INCLUDED_NRF_COMMON_HAL_PULSEIO_PULSEOUT_H #include "common-hal/microcontroller/Pin.h" +#include "common-hal/pulseio/PWMOut.h" #include "py/obj.h" typedef struct { mp_obj_base_t base; -// __IO PORT_PINCFG_Type *pincfg; - uint8_t pin; + const pulseio_pwmout_obj_t *pwmout; } pulseio_pulseout_obj_t; void pulseout_reset(void); diff --git a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c new file mode 100644 index 0000000000000..a0cfd48d5637b --- /dev/null +++ b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c @@ -0,0 +1,116 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/rotaryio/IncrementalEncoder.h" +#include "nrfx_gpiote.h" + +#include "py/runtime.h" + +#include + +// obj array to map pin number -> self since nrfx hide the mapping +static rotaryio_incrementalencoder_obj_t *_objs[NUMBER_OF_PINS]; + +static void _intr_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { + rotaryio_incrementalencoder_obj_t *self = _objs[pin]; + if (!self) return; + + // reads a state 0 .. 3 *in order*. + uint8_t new_state = nrf_gpio_pin_read(self->pin_a); + new_state = (new_state << 1) + (new_state ^ nrf_gpio_pin_read(self->pin_b)); + + uint8_t change = (new_state - self->state) & 0x03; + if (change == 1) self->quarter++; + else if (change == 3) self->quarter--; + // ignore other state transitions + + self->state = new_state; + + // logic from the atmel-samd port: provides some damping and scales movement + // down by 4:1. + if (self->quarter >= 4) { + self->position++; + self->quarter = 0; + } else if (self->quarter <= -4) { + self->position--; + self->quarter = 0; + } +} + +void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t* self, + const mcu_pin_obj_t* pin_a, const mcu_pin_obj_t* pin_b) { + + self->pin_a = pin_a->number; + self->pin_b = pin_b->number; + + _objs[self->pin_a] = self; + _objs[self->pin_b] = self; + + nrfx_gpiote_in_config_t cfg = { + .sense = NRF_GPIOTE_POLARITY_TOGGLE, + .pull = NRF_GPIO_PIN_PULLUP, + .is_watcher = false, + .hi_accuracy = true, + .skip_gpio_setup = false + }; + nrfx_gpiote_in_init(self->pin_a, &cfg, _intr_handler); + nrfx_gpiote_in_init(self->pin_b, &cfg, _intr_handler); + nrfx_gpiote_in_event_enable(self->pin_a, true); + nrfx_gpiote_in_event_enable(self->pin_b, true); + + claim_pin(pin_a); + claim_pin(pin_b); +} + +bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t* self) { + return self->pin_a == NO_PIN; +} + +void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t* self) { + if (common_hal_rotaryio_incrementalencoder_deinited(self)) { + return; + } + _objs[self->pin_a] = NULL; + _objs[self->pin_b] = NULL; + + nrfx_gpiote_in_event_disable(self->pin_a); + nrfx_gpiote_in_event_disable(self->pin_b); + nrfx_gpiote_in_uninit(self->pin_a); + nrfx_gpiote_in_uninit(self->pin_b); + reset_pin_number(self->pin_a); + reset_pin_number(self->pin_b); + self->pin_a = NO_PIN; + self->pin_b = NO_PIN; +} + +mp_int_t common_hal_rotaryio_incrementalencoder_get_position(rotaryio_incrementalencoder_obj_t* self) { + return self->position; +} + +void common_hal_rotaryio_incrementalencoder_set_position(rotaryio_incrementalencoder_obj_t* self, + mp_int_t new_position) { + self->position = new_position; +} diff --git a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.h b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.h new file mode 100644 index 0000000000000..1d0fe41839dbb --- /dev/null +++ b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t pin_a; + uint8_t pin_b; + uint8_t state; + int8_t quarter; + mp_int_t position; +} rotaryio_incrementalencoder_obj_t; + + +void incrementalencoder_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_ROTARYIO_INCREMENTALENCODER_H diff --git a/ports/nrf/common-hal/rotaryio/__init__.c b/ports/nrf/common-hal/rotaryio/__init__.c new file mode 100644 index 0000000000000..0aae79c26a1c7 --- /dev/null +++ b/ports/nrf/common-hal/rotaryio/__init__.c @@ -0,0 +1 @@ +// No rotaryio module functions. diff --git a/ports/nrf/common-hal/rtc/RTC.c b/ports/nrf/common-hal/rtc/RTC.c new file mode 100644 index 0000000000000..a8ea3668871ca --- /dev/null +++ b/ports/nrf/common-hal/rtc/RTC.c @@ -0,0 +1,90 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "supervisor/shared/translate.h" + +#include "nrfx_rtc.h" +#include "nrf_clock.h" + +// We clock the RTC very slowly (8Hz) so that it won't overflow often. +// But the counter is only 24 bits, so overflow is about every 24 days ... +// For testing, set this to 32768 and it'll overflow every few minutes + +#define RTC_CLOCK_HZ (8) + +volatile static uint32_t rtc_offset = 0; + +const nrfx_rtc_t rtc_instance = NRFX_RTC_INSTANCE(2); + +const nrfx_rtc_config_t rtc_config = { + .prescaler = RTC_FREQ_TO_PRESCALER(RTC_CLOCK_HZ), + .reliable = 0, + .tick_latency = 0, + .interrupt_priority = 6 +}; + +void rtc_handler(nrfx_rtc_int_type_t int_type) { + if (int_type == NRFX_RTC_INT_OVERFLOW) { + rtc_offset += (1L<<24) / RTC_CLOCK_HZ; + } +} + +void rtc_init(void) { + if (!nrf_clock_lf_is_running(NRF_CLOCK)) { + nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART); + } + nrfx_rtc_counter_clear(&rtc_instance); + nrfx_rtc_init(&rtc_instance, &rtc_config, rtc_handler); + nrfx_rtc_enable(&rtc_instance); + nrfx_rtc_overflow_enable(&rtc_instance, 1); +} + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + uint32_t t = rtc_offset + (nrfx_rtc_counter_get(&rtc_instance) / RTC_CLOCK_HZ ); + timeutils_seconds_since_2000_to_struct_time(t, tm); +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + rtc_offset = timeutils_seconds_since_2000( + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec + ); + nrfx_rtc_counter_clear(&rtc_instance); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} + diff --git a/ports/nrf/common-hal/rtc/RTC.h b/ports/nrf/common-hal/rtc/RTC.h new file mode 100644 index 0000000000000..0207c8338c6ce --- /dev/null +++ b/ports/nrf/common-hal/rtc/RTC.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); +extern void rtc_reset(void); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H diff --git a/ports/nrf/common-hal/rtc/__init__.c b/ports/nrf/common-hal/rtc/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/ports/nrf/common-hal/storage/__init__.c b/ports/nrf/common-hal/storage/__init__.c deleted file mode 100644 index 9d94d39690ba5..0000000000000 --- a/ports/nrf/common-hal/storage/__init__.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/mperrno.h" -#include "py/runtime.h" -#include "shared-bindings/storage/__init__.h" - -extern volatile bool mp_msc_enabled; - -void common_hal_storage_remount(const char* mount_path, bool readonly) { - if (strcmp(mount_path, "/") != 0) { - mp_raise_OSError(MP_EINVAL); - } -} diff --git a/ports/nrf/common-hal/supervisor/Runtime.c b/ports/nrf/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000000..feab6987d8b8c --- /dev/null +++ b/ports/nrf/common-hal/supervisor/Runtime.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} + diff --git a/ports/nrf/common-hal/supervisor/Runtime.h b/ports/nrf/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000000..dbff22e4c9245 --- /dev/null +++ b/ports/nrf/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/nrf/common-hal/supervisor/__init__.c b/ports/nrf/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000000..ac88556b45da4 --- /dev/null +++ b/ports/nrf/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/nrf/common-hal/time/__init__.c b/ports/nrf/common-hal/time/__init__.c index ec77354a93fe5..c85077868aa30 100644 --- a/ports/nrf/common-hal/time/__init__.c +++ b/ports/nrf/common-hal/time/__init__.c @@ -26,11 +26,18 @@ #include "py/mphal.h" -#include "shared-bindings/time/__init__.h" #include "tick.h" -inline uint64_t common_hal_time_monotonic() { - return ticks_ms; +uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); } void common_hal_time_delay_ms(uint32_t delay) { diff --git a/ports/nrf/device/compiler_abstraction.h b/ports/nrf/device/compiler_abstraction.h deleted file mode 100644 index df9f3dbdeeb3b..0000000000000 --- a/ports/nrf/device/compiler_abstraction.h +++ /dev/null @@ -1,144 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _COMPILER_ABSTRACTION_H -#define _COMPILER_ABSTRACTION_H - -/*lint ++flb "Enter library region" */ - -#if defined ( __CC_ARM ) - - #ifndef __ASM - #define __ASM __asm - #endif - - #ifndef __INLINE - #define __INLINE __inline - #endif - - #ifndef __WEAK - #define __WEAK __weak - #endif - - #ifndef __ALIGN - #define __ALIGN(n) __align(n) - #endif - - #ifndef __PACKED - #define __PACKED __packed - #endif - - #define GET_SP() __current_sp() - -#elif defined ( __ICCARM__ ) - - #ifndef __ASM - #define __ASM __asm - #endif - - #ifndef __INLINE - #define __INLINE inline - #endif - - #ifndef __WEAK - #define __WEAK __weak - #endif - - #ifndef __ALIGN - #define STRING_PRAGMA(x) _Pragma(#x) - #define __ALIGN(n) STRING_PRAGMA(data_alignment = n) - #endif - - #ifndef __PACKED - #define __PACKED __packed - #endif - - #define GET_SP() __get_SP() - -#elif defined ( __GNUC__ ) - - #ifndef __ASM - #define __ASM __asm - #endif - - #ifndef __INLINE - #define __INLINE inline - #endif - - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - - #ifndef __ALIGN - #define __ALIGN(n) __attribute__((aligned(n))) - #endif - - #ifndef __PACKED - #define __PACKED __attribute__((packed)) - #endif - - #define GET_SP() gcc_current_sp() - - static inline unsigned int gcc_current_sp(void) - { - register unsigned sp __ASM("sp"); - return sp; - } - -#elif defined ( __TASKING__ ) - - #ifndef __ASM - #define __ASM __asm - #endif - - #ifndef __INLINE - #define __INLINE inline - #endif - - #ifndef __WEAK - #define __WEAK __attribute__((weak)) - #endif - - #ifndef __ALIGN - #define __ALIGN(n) __align(n) - #endif - - /* Not defined for TASKING. */ - #ifndef __PACKED - #define __PACKED - #endif - - #define GET_SP() __get_MSP() - -#endif - -/*lint --flb "Leave library region" */ - -#endif diff --git a/ports/nrf/device/nrf.h b/ports/nrf/device/nrf.h deleted file mode 100644 index b74af23e6e667..0000000000000 --- a/ports/nrf/device/nrf.h +++ /dev/null @@ -1,77 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_H -#define NRF_H - -/* MDK version */ -#define MDK_MAJOR_VERSION 8 -#define MDK_MINOR_VERSION 11 -#define MDK_MICRO_VERSION 1 - -/* Define NRF52_SERIES for common use in nRF52 series devices. */ -#if defined (NRF52832_XXAA) || defined (NRF52840_XXAA) - #define NRF52_SERIES -#endif - - -#if defined(_WIN32) - /* Do not include nrf specific files when building for PC host */ -#elif defined(__unix) - /* Do not include nrf specific files when building for PC host */ -#elif defined(__APPLE__) - /* Do not include nrf specific files when building for PC host */ -#else - - /* Device selection for device includes. */ - #if defined (NRF51) - #include "nrf51.h" - #include "nrf51_bitfields.h" - #include "nrf51_deprecated.h" - #elif defined (NRF52840_XXAA) - #include "nrf52840.h" - #include "nrf52840_bitfields.h" - #include "nrf51_to_nrf52840.h" - #include "nrf52_to_nrf52840.h" - #elif defined (NRF52832_XXAA) - #include "nrf52.h" - #include "nrf52_bitfields.h" - #include "nrf51_to_nrf52.h" - #include "nrf52_name_change.h" - #else - #error "Device must be defined. See nrf.h." - #endif /* NRF51, NRF52832_XXAA, NRF52840_XXAA */ - - #include "compiler_abstraction.h" - -#endif /* _WIN32 || __unix || __APPLE__ */ - -#endif /* NRF_H */ - diff --git a/ports/nrf/device/nrf52/nrf51_to_nrf52.h b/ports/nrf/device/nrf52/nrf51_to_nrf52.h deleted file mode 100644 index 72dfd91fc0d32..0000000000000 --- a/ports/nrf/device/nrf52/nrf51_to_nrf52.h +++ /dev/null @@ -1,952 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF51_TO_NRF52_H -#define NRF51_TO_NRF52_H - -/*lint ++flb "Enter library region */ - -/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices. - * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the - * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros - * from the nrf51_deprecated.h file. */ - - -/* IRQ */ -/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ -#define UART0_IRQHandler UARTE0_UART0_IRQHandler -#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler -#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler -#define ADC_IRQHandler SAADC_IRQHandler -#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler -#define SWI0_IRQHandler SWI0_EGU0_IRQHandler -#define SWI1_IRQHandler SWI1_EGU1_IRQHandler -#define SWI2_IRQHandler SWI2_EGU2_IRQHandler -#define SWI3_IRQHandler SWI3_EGU3_IRQHandler -#define SWI4_IRQHandler SWI4_EGU4_IRQHandler -#define SWI5_IRQHandler SWI5_EGU5_IRQHandler - -#define UART0_IRQn UARTE0_UART0_IRQn -#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn -#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn -#define ADC_IRQn SAADC_IRQn -#define LPCOMP_IRQn COMP_LPCOMP_IRQn -#define SWI0_IRQn SWI0_EGU0_IRQn -#define SWI1_IRQn SWI1_EGU1_IRQn -#define SWI2_IRQn SWI2_EGU2_IRQn -#define SWI3_IRQn SWI3_EGU3_IRQn -#define SWI4_IRQn SWI4_EGU4_IRQn -#define SWI5_IRQn SWI5_EGU5_IRQn - - -/* UICR */ -/* Register RBPCONF was renamed to APPROTECT. */ -#define RBPCONF APPROTECT - -#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos -#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk -#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled -#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled - - -/* GPIO */ -/* GPIO port was renamed to P0. */ -#define NRF_GPIO NRF_P0 -#define NRF_GPIO_BASE NRF_P0_BASE - - -/* QDEC */ -/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ -#define PSELLED PSEL.LED -#define PSELA PSEL.A -#define PSELB PSEL.B - - -/* SPIS */ -/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ -#define PSELSCK PSEL.SCK -#define PSELMISO PSEL.MISO -#define PSELMOSI PSEL.MOSI -#define PSELCSN PSEL.CSN - -/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ -#define RXDPTR RXD.PTR -#define MAXRX RXD.MAXCNT -#define AMOUNTRX RXD.AMOUNT - -#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos -#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk - -#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos -#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk - -/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ -#define TXDPTR TXD.PTR -#define MAXTX TXD.MAXCNT -#define AMOUNTTX TXD.AMOUNT - -#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos -#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk - -#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos -#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk - - -/* MPU */ -/* Part of MPU module was renamed BPROT, while the rest was eliminated. */ -#define NRF_MPU NRF_BPROT - -/* Register DISABLEINDEBUG macros were affected. */ -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled - -/* Registers PROTENSET0 and PROTENSET1 were affected and renamed as CONFIG0 and CONFIG1. */ -#define PROTENSET0 CONFIG0 -#define PROTENSET1 CONFIG1 - -#define MPU_PROTENSET1_PROTREG63_Pos BPROT_CONFIG1_REGION63_Pos -#define MPU_PROTENSET1_PROTREG63_Msk BPROT_CONFIG1_REGION63_Msk -#define MPU_PROTENSET1_PROTREG63_Disabled BPROT_CONFIG1_REGION63_Disabled -#define MPU_PROTENSET1_PROTREG63_Enabled BPROT_CONFIG1_REGION63_Enabled -#define MPU_PROTENSET1_PROTREG63_Set BPROT_CONFIG1_REGION63_Enabled - -#define MPU_PROTENSET1_PROTREG62_Pos BPROT_CONFIG1_REGION62_Pos -#define MPU_PROTENSET1_PROTREG62_Msk BPROT_CONFIG1_REGION62_Msk -#define MPU_PROTENSET1_PROTREG62_Disabled BPROT_CONFIG1_REGION62_Disabled -#define MPU_PROTENSET1_PROTREG62_Enabled BPROT_CONFIG1_REGION62_Enabled -#define MPU_PROTENSET1_PROTREG62_Set BPROT_CONFIG1_REGION62_Enabled - -#define MPU_PROTENSET1_PROTREG61_Pos BPROT_CONFIG1_REGION61_Pos -#define MPU_PROTENSET1_PROTREG61_Msk BPROT_CONFIG1_REGION61_Msk -#define MPU_PROTENSET1_PROTREG61_Disabled BPROT_CONFIG1_REGION61_Disabled -#define MPU_PROTENSET1_PROTREG61_Enabled BPROT_CONFIG1_REGION61_Enabled -#define MPU_PROTENSET1_PROTREG61_Set BPROT_CONFIG1_REGION61_Enabled - -#define MPU_PROTENSET1_PROTREG60_Pos BPROT_CONFIG1_REGION60_Pos -#define MPU_PROTENSET1_PROTREG60_Msk BPROT_CONFIG1_REGION60_Msk -#define MPU_PROTENSET1_PROTREG60_Disabled BPROT_CONFIG1_REGION60_Disabled -#define MPU_PROTENSET1_PROTREG60_Enabled BPROT_CONFIG1_REGION60_Enabled -#define MPU_PROTENSET1_PROTREG60_Set BPROT_CONFIG1_REGION60_Enabled - -#define MPU_PROTENSET1_PROTREG59_Pos BPROT_CONFIG1_REGION59_Pos -#define MPU_PROTENSET1_PROTREG59_Msk BPROT_CONFIG1_REGION59_Msk -#define MPU_PROTENSET1_PROTREG59_Disabled BPROT_CONFIG1_REGION59_Disabled -#define MPU_PROTENSET1_PROTREG59_Enabled BPROT_CONFIG1_REGION59_Enabled -#define MPU_PROTENSET1_PROTREG59_Set BPROT_CONFIG1_REGION59_Enabled - -#define MPU_PROTENSET1_PROTREG58_Pos BPROT_CONFIG1_REGION58_Pos -#define MPU_PROTENSET1_PROTREG58_Msk BPROT_CONFIG1_REGION58_Msk -#define MPU_PROTENSET1_PROTREG58_Disabled BPROT_CONFIG1_REGION58_Disabled -#define MPU_PROTENSET1_PROTREG58_Enabled BPROT_CONFIG1_REGION58_Enabled -#define MPU_PROTENSET1_PROTREG58_Set BPROT_CONFIG1_REGION58_Enabled - -#define MPU_PROTENSET1_PROTREG57_Pos BPROT_CONFIG1_REGION57_Pos -#define MPU_PROTENSET1_PROTREG57_Msk BPROT_CONFIG1_REGION57_Msk -#define MPU_PROTENSET1_PROTREG57_Disabled BPROT_CONFIG1_REGION57_Disabled -#define MPU_PROTENSET1_PROTREG57_Enabled BPROT_CONFIG1_REGION57_Enabled -#define MPU_PROTENSET1_PROTREG57_Set BPROT_CONFIG1_REGION57_Enabled - -#define MPU_PROTENSET1_PROTREG56_Pos BPROT_CONFIG1_REGION56_Pos -#define MPU_PROTENSET1_PROTREG56_Msk BPROT_CONFIG1_REGION56_Msk -#define MPU_PROTENSET1_PROTREG56_Disabled BPROT_CONFIG1_REGION56_Disabled -#define MPU_PROTENSET1_PROTREG56_Enabled BPROT_CONFIG1_REGION56_Enabled -#define MPU_PROTENSET1_PROTREG56_Set BPROT_CONFIG1_REGION56_Enabled - -#define MPU_PROTENSET1_PROTREG55_Pos BPROT_CONFIG1_REGION55_Pos -#define MPU_PROTENSET1_PROTREG55_Msk BPROT_CONFIG1_REGION55_Msk -#define MPU_PROTENSET1_PROTREG55_Disabled BPROT_CONFIG1_REGION55_Disabled -#define MPU_PROTENSET1_PROTREG55_Enabled BPROT_CONFIG1_REGION55_Enabled -#define MPU_PROTENSET1_PROTREG55_Set BPROT_CONFIG1_REGION55_Enabled - -#define MPU_PROTENSET1_PROTREG54_Pos BPROT_CONFIG1_REGION54_Pos -#define MPU_PROTENSET1_PROTREG54_Msk BPROT_CONFIG1_REGION54_Msk -#define MPU_PROTENSET1_PROTREG54_Disabled BPROT_CONFIG1_REGION54_Disabled -#define MPU_PROTENSET1_PROTREG54_Enabled BPROT_CONFIG1_REGION54_Enabled -#define MPU_PROTENSET1_PROTREG54_Set BPROT_CONFIG1_REGION54_Enabled - -#define MPU_PROTENSET1_PROTREG53_Pos BPROT_CONFIG1_REGION53_Pos -#define MPU_PROTENSET1_PROTREG53_Msk BPROT_CONFIG1_REGION53_Msk -#define MPU_PROTENSET1_PROTREG53_Disabled BPROT_CONFIG1_REGION53_Disabled -#define MPU_PROTENSET1_PROTREG53_Enabled BPROT_CONFIG1_REGION53_Enabled -#define MPU_PROTENSET1_PROTREG53_Set BPROT_CONFIG1_REGION53_Enabled - -#define MPU_PROTENSET1_PROTREG52_Pos BPROT_CONFIG1_REGION52_Pos -#define MPU_PROTENSET1_PROTREG52_Msk BPROT_CONFIG1_REGION52_Msk -#define MPU_PROTENSET1_PROTREG52_Disabled BPROT_CONFIG1_REGION52_Disabled -#define MPU_PROTENSET1_PROTREG52_Enabled BPROT_CONFIG1_REGION52_Enabled -#define MPU_PROTENSET1_PROTREG52_Set BPROT_CONFIG1_REGION52_Enabled - -#define MPU_PROTENSET1_PROTREG51_Pos BPROT_CONFIG1_REGION51_Pos -#define MPU_PROTENSET1_PROTREG51_Msk BPROT_CONFIG1_REGION51_Msk -#define MPU_PROTENSET1_PROTREG51_Disabled BPROT_CONFIG1_REGION51_Disabled -#define MPU_PROTENSET1_PROTREG51_Enabled BPROT_CONFIG1_REGION51_Enabled -#define MPU_PROTENSET1_PROTREG51_Set BPROT_CONFIG1_REGION51_Enabled - -#define MPU_PROTENSET1_PROTREG50_Pos BPROT_CONFIG1_REGION50_Pos -#define MPU_PROTENSET1_PROTREG50_Msk BPROT_CONFIG1_REGION50_Msk -#define MPU_PROTENSET1_PROTREG50_Disabled BPROT_CONFIG1_REGION50_Disabled -#define MPU_PROTENSET1_PROTREG50_Enabled BPROT_CONFIG1_REGION50_Enabled -#define MPU_PROTENSET1_PROTREG50_Set BPROT_CONFIG1_REGION50_Enabled - -#define MPU_PROTENSET1_PROTREG49_Pos BPROT_CONFIG1_REGION49_Pos -#define MPU_PROTENSET1_PROTREG49_Msk BPROT_CONFIG1_REGION49_Msk -#define MPU_PROTENSET1_PROTREG49_Disabled BPROT_CONFIG1_REGION49_Disabled -#define MPU_PROTENSET1_PROTREG49_Enabled BPROT_CONFIG1_REGION49_Enabled -#define MPU_PROTENSET1_PROTREG49_Set BPROT_CONFIG1_REGION49_Enabled - -#define MPU_PROTENSET1_PROTREG48_Pos BPROT_CONFIG1_REGION48_Pos -#define MPU_PROTENSET1_PROTREG48_Msk BPROT_CONFIG1_REGION48_Msk -#define MPU_PROTENSET1_PROTREG48_Disabled BPROT_CONFIG1_REGION48_Disabled -#define MPU_PROTENSET1_PROTREG48_Enabled BPROT_CONFIG1_REGION48_Enabled -#define MPU_PROTENSET1_PROTREG48_Set BPROT_CONFIG1_REGION48_Enabled - -#define MPU_PROTENSET1_PROTREG47_Pos BPROT_CONFIG1_REGION47_Pos -#define MPU_PROTENSET1_PROTREG47_Msk BPROT_CONFIG1_REGION47_Msk -#define MPU_PROTENSET1_PROTREG47_Disabled BPROT_CONFIG1_REGION47_Disabled -#define MPU_PROTENSET1_PROTREG47_Enabled BPROT_CONFIG1_REGION47_Enabled -#define MPU_PROTENSET1_PROTREG47_Set BPROT_CONFIG1_REGION47_Enabled - -#define MPU_PROTENSET1_PROTREG46_Pos BPROT_CONFIG1_REGION46_Pos -#define MPU_PROTENSET1_PROTREG46_Msk BPROT_CONFIG1_REGION46_Msk -#define MPU_PROTENSET1_PROTREG46_Disabled BPROT_CONFIG1_REGION46_Disabled -#define MPU_PROTENSET1_PROTREG46_Enabled BPROT_CONFIG1_REGION46_Enabled -#define MPU_PROTENSET1_PROTREG46_Set BPROT_CONFIG1_REGION46_Enabled - -#define MPU_PROTENSET1_PROTREG45_Pos BPROT_CONFIG1_REGION45_Pos -#define MPU_PROTENSET1_PROTREG45_Msk BPROT_CONFIG1_REGION45_Msk -#define MPU_PROTENSET1_PROTREG45_Disabled BPROT_CONFIG1_REGION45_Disabled -#define MPU_PROTENSET1_PROTREG45_Enabled BPROT_CONFIG1_REGION45_Enabled -#define MPU_PROTENSET1_PROTREG45_Set BPROT_CONFIG1_REGION45_Enabled - -#define MPU_PROTENSET1_PROTREG44_Pos BPROT_CONFIG1_REGION44_Pos -#define MPU_PROTENSET1_PROTREG44_Msk BPROT_CONFIG1_REGION44_Msk -#define MPU_PROTENSET1_PROTREG44_Disabled BPROT_CONFIG1_REGION44_Disabled -#define MPU_PROTENSET1_PROTREG44_Enabled BPROT_CONFIG1_REGION44_Enabled -#define MPU_PROTENSET1_PROTREG44_Set BPROT_CONFIG1_REGION44_Enabled - -#define MPU_PROTENSET1_PROTREG43_Pos BPROT_CONFIG1_REGION43_Pos -#define MPU_PROTENSET1_PROTREG43_Msk BPROT_CONFIG1_REGION43_Msk -#define MPU_PROTENSET1_PROTREG43_Disabled BPROT_CONFIG1_REGION43_Disabled -#define MPU_PROTENSET1_PROTREG43_Enabled BPROT_CONFIG1_REGION43_Enabled -#define MPU_PROTENSET1_PROTREG43_Set BPROT_CONFIG1_REGION43_Enabled - -#define MPU_PROTENSET1_PROTREG42_Pos BPROT_CONFIG1_REGION42_Pos -#define MPU_PROTENSET1_PROTREG42_Msk BPROT_CONFIG1_REGION42_Msk -#define MPU_PROTENSET1_PROTREG42_Disabled BPROT_CONFIG1_REGION42_Disabled -#define MPU_PROTENSET1_PROTREG42_Enabled BPROT_CONFIG1_REGION42_Enabled -#define MPU_PROTENSET1_PROTREG42_Set BPROT_CONFIG1_REGION42_Enabled - -#define MPU_PROTENSET1_PROTREG41_Pos BPROT_CONFIG1_REGION41_Pos -#define MPU_PROTENSET1_PROTREG41_Msk BPROT_CONFIG1_REGION41_Msk -#define MPU_PROTENSET1_PROTREG41_Disabled BPROT_CONFIG1_REGION41_Disabled -#define MPU_PROTENSET1_PROTREG41_Enabled BPROT_CONFIG1_REGION41_Enabled -#define MPU_PROTENSET1_PROTREG41_Set BPROT_CONFIG1_REGION41_Enabled - -#define MPU_PROTENSET1_PROTREG40_Pos BPROT_CONFIG1_REGION40_Pos -#define MPU_PROTENSET1_PROTREG40_Msk BPROT_CONFIG1_REGION40_Msk -#define MPU_PROTENSET1_PROTREG40_Disabled BPROT_CONFIG1_REGION40_Disabled -#define MPU_PROTENSET1_PROTREG40_Enabled BPROT_CONFIG1_REGION40_Enabled -#define MPU_PROTENSET1_PROTREG40_Set BPROT_CONFIG1_REGION40_Enabled - -#define MPU_PROTENSET1_PROTREG39_Pos BPROT_CONFIG1_REGION39_Pos -#define MPU_PROTENSET1_PROTREG39_Msk BPROT_CONFIG1_REGION39_Msk -#define MPU_PROTENSET1_PROTREG39_Disabled BPROT_CONFIG1_REGION39_Disabled -#define MPU_PROTENSET1_PROTREG39_Enabled BPROT_CONFIG1_REGION39_Enabled -#define MPU_PROTENSET1_PROTREG39_Set BPROT_CONFIG1_REGION39_Enabled - -#define MPU_PROTENSET1_PROTREG38_Pos BPROT_CONFIG1_REGION38_Pos -#define MPU_PROTENSET1_PROTREG38_Msk BPROT_CONFIG1_REGION38_Msk -#define MPU_PROTENSET1_PROTREG38_Disabled BPROT_CONFIG1_REGION38_Disabled -#define MPU_PROTENSET1_PROTREG38_Enabled BPROT_CONFIG1_REGION38_Enabled -#define MPU_PROTENSET1_PROTREG38_Set BPROT_CONFIG1_REGION38_Enabled - -#define MPU_PROTENSET1_PROTREG37_Pos BPROT_CONFIG1_REGION37_Pos -#define MPU_PROTENSET1_PROTREG37_Msk BPROT_CONFIG1_REGION37_Msk -#define MPU_PROTENSET1_PROTREG37_Disabled BPROT_CONFIG1_REGION37_Disabled -#define MPU_PROTENSET1_PROTREG37_Enabled BPROT_CONFIG1_REGION37_Enabled -#define MPU_PROTENSET1_PROTREG37_Set BPROT_CONFIG1_REGION37_Enabled - -#define MPU_PROTENSET1_PROTREG36_Pos BPROT_CONFIG1_REGION36_Pos -#define MPU_PROTENSET1_PROTREG36_Msk BPROT_CONFIG1_REGION36_Msk -#define MPU_PROTENSET1_PROTREG36_Disabled BPROT_CONFIG1_REGION36_Disabled -#define MPU_PROTENSET1_PROTREG36_Enabled BPROT_CONFIG1_REGION36_Enabled -#define MPU_PROTENSET1_PROTREG36_Set BPROT_CONFIG1_REGION36_Enabled - -#define MPU_PROTENSET1_PROTREG35_Pos BPROT_CONFIG1_REGION35_Pos -#define MPU_PROTENSET1_PROTREG35_Msk BPROT_CONFIG1_REGION35_Msk -#define MPU_PROTENSET1_PROTREG35_Disabled BPROT_CONFIG1_REGION35_Disabled -#define MPU_PROTENSET1_PROTREG35_Enabled BPROT_CONFIG1_REGION35_Enabled -#define MPU_PROTENSET1_PROTREG35_Set BPROT_CONFIG1_REGION35_Enabled - -#define MPU_PROTENSET1_PROTREG34_Pos BPROT_CONFIG1_REGION34_Pos -#define MPU_PROTENSET1_PROTREG34_Msk BPROT_CONFIG1_REGION34_Msk -#define MPU_PROTENSET1_PROTREG34_Disabled BPROT_CONFIG1_REGION34_Disabled -#define MPU_PROTENSET1_PROTREG34_Enabled BPROT_CONFIG1_REGION34_Enabled -#define MPU_PROTENSET1_PROTREG34_Set BPROT_CONFIG1_REGION34_Enabled - -#define MPU_PROTENSET1_PROTREG33_Pos BPROT_CONFIG1_REGION33_Pos -#define MPU_PROTENSET1_PROTREG33_Msk BPROT_CONFIG1_REGION33_Msk -#define MPU_PROTENSET1_PROTREG33_Disabled BPROT_CONFIG1_REGION33_Disabled -#define MPU_PROTENSET1_PROTREG33_Enabled BPROT_CONFIG1_REGION33_Enabled -#define MPU_PROTENSET1_PROTREG33_Set BPROT_CONFIG1_REGION33_Enabled - -#define MPU_PROTENSET1_PROTREG32_Pos BPROT_CONFIG1_REGION32_Pos -#define MPU_PROTENSET1_PROTREG32_Msk BPROT_CONFIG1_REGION32_Msk -#define MPU_PROTENSET1_PROTREG32_Disabled BPROT_CONFIG1_REGION32_Disabled -#define MPU_PROTENSET1_PROTREG32_Enabled BPROT_CONFIG1_REGION32_Enabled -#define MPU_PROTENSET1_PROTREG32_Set BPROT_CONFIG1_REGION32_Enabled - -#define MPU_PROTENSET0_PROTREG31_Pos BPROT_CONFIG0_REGION31_Pos -#define MPU_PROTENSET0_PROTREG31_Msk BPROT_CONFIG0_REGION31_Msk -#define MPU_PROTENSET0_PROTREG31_Disabled BPROT_CONFIG0_REGION31_Disabled -#define MPU_PROTENSET0_PROTREG31_Enabled BPROT_CONFIG0_REGION31_Enabled -#define MPU_PROTENSET0_PROTREG31_Set BPROT_CONFIG0_REGION31_Enabled - -#define MPU_PROTENSET0_PROTREG30_Pos BPROT_CONFIG0_REGION30_Pos -#define MPU_PROTENSET0_PROTREG30_Msk BPROT_CONFIG0_REGION30_Msk -#define MPU_PROTENSET0_PROTREG30_Disabled BPROT_CONFIG0_REGION30_Disabled -#define MPU_PROTENSET0_PROTREG30_Enabled BPROT_CONFIG0_REGION30_Enabled -#define MPU_PROTENSET0_PROTREG30_Set BPROT_CONFIG0_REGION30_Enabled - -#define MPU_PROTENSET0_PROTREG29_Pos BPROT_CONFIG0_REGION29_Pos -#define MPU_PROTENSET0_PROTREG29_Msk BPROT_CONFIG0_REGION29_Msk -#define MPU_PROTENSET0_PROTREG29_Disabled BPROT_CONFIG0_REGION29_Disabled -#define MPU_PROTENSET0_PROTREG29_Enabled BPROT_CONFIG0_REGION29_Enabled -#define MPU_PROTENSET0_PROTREG29_Set BPROT_CONFIG0_REGION29_Enabled - -#define MPU_PROTENSET0_PROTREG28_Pos BPROT_CONFIG0_REGION28_Pos -#define MPU_PROTENSET0_PROTREG28_Msk BPROT_CONFIG0_REGION28_Msk -#define MPU_PROTENSET0_PROTREG28_Disabled BPROT_CONFIG0_REGION28_Disabled -#define MPU_PROTENSET0_PROTREG28_Enabled BPROT_CONFIG0_REGION28_Enabled -#define MPU_PROTENSET0_PROTREG28_Set BPROT_CONFIG0_REGION28_Enabled - -#define MPU_PROTENSET0_PROTREG27_Pos BPROT_CONFIG0_REGION27_Pos -#define MPU_PROTENSET0_PROTREG27_Msk BPROT_CONFIG0_REGION27_Msk -#define MPU_PROTENSET0_PROTREG27_Disabled BPROT_CONFIG0_REGION27_Disabled -#define MPU_PROTENSET0_PROTREG27_Enabled BPROT_CONFIG0_REGION27_Enabled -#define MPU_PROTENSET0_PROTREG27_Set BPROT_CONFIG0_REGION27_Enabled - -#define MPU_PROTENSET0_PROTREG26_Pos BPROT_CONFIG0_REGION26_Pos -#define MPU_PROTENSET0_PROTREG26_Msk BPROT_CONFIG0_REGION26_Msk -#define MPU_PROTENSET0_PROTREG26_Disabled BPROT_CONFIG0_REGION26_Disabled -#define MPU_PROTENSET0_PROTREG26_Enabled BPROT_CONFIG0_REGION26_Enabled -#define MPU_PROTENSET0_PROTREG26_Set BPROT_CONFIG0_REGION26_Enabled - -#define MPU_PROTENSET0_PROTREG25_Pos BPROT_CONFIG0_REGION25_Pos -#define MPU_PROTENSET0_PROTREG25_Msk BPROT_CONFIG0_REGION25_Msk -#define MPU_PROTENSET0_PROTREG25_Disabled BPROT_CONFIG0_REGION25_Disabled -#define MPU_PROTENSET0_PROTREG25_Enabled BPROT_CONFIG0_REGION25_Enabled -#define MPU_PROTENSET0_PROTREG25_Set BPROT_CONFIG0_REGION25_Enabled - -#define MPU_PROTENSET0_PROTREG24_Pos BPROT_CONFIG0_REGION24_Pos -#define MPU_PROTENSET0_PROTREG24_Msk BPROT_CONFIG0_REGION24_Msk -#define MPU_PROTENSET0_PROTREG24_Disabled BPROT_CONFIG0_REGION24_Disabled -#define MPU_PROTENSET0_PROTREG24_Enabled BPROT_CONFIG0_REGION24_Enabled -#define MPU_PROTENSET0_PROTREG24_Set BPROT_CONFIG0_REGION24_Enabled - -#define MPU_PROTENSET0_PROTREG23_Pos BPROT_CONFIG0_REGION23_Pos -#define MPU_PROTENSET0_PROTREG23_Msk BPROT_CONFIG0_REGION23_Msk -#define MPU_PROTENSET0_PROTREG23_Disabled BPROT_CONFIG0_REGION23_Disabled -#define MPU_PROTENSET0_PROTREG23_Enabled BPROT_CONFIG0_REGION23_Enabled -#define MPU_PROTENSET0_PROTREG23_Set BPROT_CONFIG0_REGION23_Enabled - -#define MPU_PROTENSET0_PROTREG22_Pos BPROT_CONFIG0_REGION22_Pos -#define MPU_PROTENSET0_PROTREG22_Msk BPROT_CONFIG0_REGION22_Msk -#define MPU_PROTENSET0_PROTREG22_Disabled BPROT_CONFIG0_REGION22_Disabled -#define MPU_PROTENSET0_PROTREG22_Enabled BPROT_CONFIG0_REGION22_Enabled -#define MPU_PROTENSET0_PROTREG22_Set BPROT_CONFIG0_REGION22_Enabled - -#define MPU_PROTENSET0_PROTREG21_Pos BPROT_CONFIG0_REGION21_Pos -#define MPU_PROTENSET0_PROTREG21_Msk BPROT_CONFIG0_REGION21_Msk -#define MPU_PROTENSET0_PROTREG21_Disabled BPROT_CONFIG0_REGION21_Disabled -#define MPU_PROTENSET0_PROTREG21_Enabled BPROT_CONFIG0_REGION21_Enabled -#define MPU_PROTENSET0_PROTREG21_Set BPROT_CONFIG0_REGION21_Enabled - -#define MPU_PROTENSET0_PROTREG20_Pos BPROT_CONFIG0_REGION20_Pos -#define MPU_PROTENSET0_PROTREG20_Msk BPROT_CONFIG0_REGION20_Msk -#define MPU_PROTENSET0_PROTREG20_Disabled BPROT_CONFIG0_REGION20_Disabled -#define MPU_PROTENSET0_PROTREG20_Enabled BPROT_CONFIG0_REGION20_Enabled -#define MPU_PROTENSET0_PROTREG20_Set BPROT_CONFIG0_REGION20_Enabled - -#define MPU_PROTENSET0_PROTREG19_Pos BPROT_CONFIG0_REGION19_Pos -#define MPU_PROTENSET0_PROTREG19_Msk BPROT_CONFIG0_REGION19_Msk -#define MPU_PROTENSET0_PROTREG19_Disabled BPROT_CONFIG0_REGION19_Disabled -#define MPU_PROTENSET0_PROTREG19_Enabled BPROT_CONFIG0_REGION19_Enabled -#define MPU_PROTENSET0_PROTREG19_Set BPROT_CONFIG0_REGION19_Enabled - -#define MPU_PROTENSET0_PROTREG18_Pos BPROT_CONFIG0_REGION18_Pos -#define MPU_PROTENSET0_PROTREG18_Msk BPROT_CONFIG0_REGION18_Msk -#define MPU_PROTENSET0_PROTREG18_Disabled BPROT_CONFIG0_REGION18_Disabled -#define MPU_PROTENSET0_PROTREG18_Enabled BPROT_CONFIG0_REGION18_Enabled -#define MPU_PROTENSET0_PROTREG18_Set BPROT_CONFIG0_REGION18_Enabled - -#define MPU_PROTENSET0_PROTREG17_Pos BPROT_CONFIG0_REGION17_Pos -#define MPU_PROTENSET0_PROTREG17_Msk BPROT_CONFIG0_REGION17_Msk -#define MPU_PROTENSET0_PROTREG17_Disabled BPROT_CONFIG0_REGION17_Disabled -#define MPU_PROTENSET0_PROTREG17_Enabled BPROT_CONFIG0_REGION17_Enabled -#define MPU_PROTENSET0_PROTREG17_Set BPROT_CONFIG0_REGION17_Enabled - -#define MPU_PROTENSET0_PROTREG16_Pos BPROT_CONFIG0_REGION16_Pos -#define MPU_PROTENSET0_PROTREG16_Msk BPROT_CONFIG0_REGION16_Msk -#define MPU_PROTENSET0_PROTREG16_Disabled BPROT_CONFIG0_REGION16_Disabled -#define MPU_PROTENSET0_PROTREG16_Enabled BPROT_CONFIG0_REGION16_Enabled -#define MPU_PROTENSET0_PROTREG16_Set BPROT_CONFIG0_REGION16_Enabled - -#define MPU_PROTENSET0_PROTREG15_Pos BPROT_CONFIG0_REGION15_Pos -#define MPU_PROTENSET0_PROTREG15_Msk BPROT_CONFIG0_REGION15_Msk -#define MPU_PROTENSET0_PROTREG15_Disabled BPROT_CONFIG0_REGION15_Disabled -#define MPU_PROTENSET0_PROTREG15_Enabled BPROT_CONFIG0_REGION15_Enabled -#define MPU_PROTENSET0_PROTREG15_Set BPROT_CONFIG0_REGION15_Enabled - -#define MPU_PROTENSET0_PROTREG14_Pos BPROT_CONFIG0_REGION14_Pos -#define MPU_PROTENSET0_PROTREG14_Msk BPROT_CONFIG0_REGION14_Msk -#define MPU_PROTENSET0_PROTREG14_Disabled BPROT_CONFIG0_REGION14_Disabled -#define MPU_PROTENSET0_PROTREG14_Enabled BPROT_CONFIG0_REGION14_Enabled -#define MPU_PROTENSET0_PROTREG14_Set BPROT_CONFIG0_REGION14_Enabled - -#define MPU_PROTENSET0_PROTREG13_Pos BPROT_CONFIG0_REGION13_Pos -#define MPU_PROTENSET0_PROTREG13_Msk BPROT_CONFIG0_REGION13_Msk -#define MPU_PROTENSET0_PROTREG13_Disabled BPROT_CONFIG0_REGION13_Disabled -#define MPU_PROTENSET0_PROTREG13_Enabled BPROT_CONFIG0_REGION13_Enabled -#define MPU_PROTENSET0_PROTREG13_Set BPROT_CONFIG0_REGION13_Enabled - -#define MPU_PROTENSET0_PROTREG12_Pos BPROT_CONFIG0_REGION12_Pos -#define MPU_PROTENSET0_PROTREG12_Msk BPROT_CONFIG0_REGION12_Msk -#define MPU_PROTENSET0_PROTREG12_Disabled BPROT_CONFIG0_REGION12_Disabled -#define MPU_PROTENSET0_PROTREG12_Enabled BPROT_CONFIG0_REGION12_Enabled -#define MPU_PROTENSET0_PROTREG12_Set BPROT_CONFIG0_REGION12_Enabled - -#define MPU_PROTENSET0_PROTREG11_Pos BPROT_CONFIG0_REGION11_Pos -#define MPU_PROTENSET0_PROTREG11_Msk BPROT_CONFIG0_REGION11_Msk -#define MPU_PROTENSET0_PROTREG11_Disabled BPROT_CONFIG0_REGION11_Disabled -#define MPU_PROTENSET0_PROTREG11_Enabled BPROT_CONFIG0_REGION11_Enabled -#define MPU_PROTENSET0_PROTREG11_Set BPROT_CONFIG0_REGION11_Enabled - -#define MPU_PROTENSET0_PROTREG10_Pos BPROT_CONFIG0_REGION10_Pos -#define MPU_PROTENSET0_PROTREG10_Msk BPROT_CONFIG0_REGION10_Msk -#define MPU_PROTENSET0_PROTREG10_Disabled BPROT_CONFIG0_REGION10_Disabled -#define MPU_PROTENSET0_PROTREG10_Enabled BPROT_CONFIG0_REGION10_Enabled -#define MPU_PROTENSET0_PROTREG10_Set BPROT_CONFIG0_REGION10_Enabled - -#define MPU_PROTENSET0_PROTREG9_Pos BPROT_CONFIG0_REGION9_Pos -#define MPU_PROTENSET0_PROTREG9_Msk BPROT_CONFIG0_REGION9_Msk -#define MPU_PROTENSET0_PROTREG9_Disabled BPROT_CONFIG0_REGION9_Disabled -#define MPU_PROTENSET0_PROTREG9_Enabled BPROT_CONFIG0_REGION9_Enabled -#define MPU_PROTENSET0_PROTREG9_Set BPROT_CONFIG0_REGION9_Enabled - -#define MPU_PROTENSET0_PROTREG8_Pos BPROT_CONFIG0_REGION8_Pos -#define MPU_PROTENSET0_PROTREG8_Msk BPROT_CONFIG0_REGION8_Msk -#define MPU_PROTENSET0_PROTREG8_Disabled BPROT_CONFIG0_REGION8_Disabled -#define MPU_PROTENSET0_PROTREG8_Enabled BPROT_CONFIG0_REGION8_Enabled -#define MPU_PROTENSET0_PROTREG8_Set BPROT_CONFIG0_REGION8_Enabled - -#define MPU_PROTENSET0_PROTREG7_Pos BPROT_CONFIG0_REGION7_Pos -#define MPU_PROTENSET0_PROTREG7_Msk BPROT_CONFIG0_REGION7_Msk -#define MPU_PROTENSET0_PROTREG7_Disabled BPROT_CONFIG0_REGION7_Disabled -#define MPU_PROTENSET0_PROTREG7_Enabled BPROT_CONFIG0_REGION7_Enabled -#define MPU_PROTENSET0_PROTREG7_Set BPROT_CONFIG0_REGION7_Enabled - -#define MPU_PROTENSET0_PROTREG6_Pos BPROT_CONFIG0_REGION6_Pos -#define MPU_PROTENSET0_PROTREG6_Msk BPROT_CONFIG0_REGION6_Msk -#define MPU_PROTENSET0_PROTREG6_Disabled BPROT_CONFIG0_REGION6_Disabled -#define MPU_PROTENSET0_PROTREG6_Enabled BPROT_CONFIG0_REGION6_Enabled -#define MPU_PROTENSET0_PROTREG6_Set BPROT_CONFIG0_REGION6_Enabled - -#define MPU_PROTENSET0_PROTREG5_Pos BPROT_CONFIG0_REGION5_Pos -#define MPU_PROTENSET0_PROTREG5_Msk BPROT_CONFIG0_REGION5_Msk -#define MPU_PROTENSET0_PROTREG5_Disabled BPROT_CONFIG0_REGION5_Disabled -#define MPU_PROTENSET0_PROTREG5_Enabled BPROT_CONFIG0_REGION5_Enabled -#define MPU_PROTENSET0_PROTREG5_Set BPROT_CONFIG0_REGION5_Enabled - -#define MPU_PROTENSET0_PROTREG4_Pos BPROT_CONFIG0_REGION4_Pos -#define MPU_PROTENSET0_PROTREG4_Msk BPROT_CONFIG0_REGION4_Msk -#define MPU_PROTENSET0_PROTREG4_Disabled BPROT_CONFIG0_REGION4_Disabled -#define MPU_PROTENSET0_PROTREG4_Enabled BPROT_CONFIG0_REGION4_Enabled -#define MPU_PROTENSET0_PROTREG4_Set BPROT_CONFIG0_REGION4_Enabled - -#define MPU_PROTENSET0_PROTREG3_Pos BPROT_CONFIG0_REGION3_Pos -#define MPU_PROTENSET0_PROTREG3_Msk BPROT_CONFIG0_REGION3_Msk -#define MPU_PROTENSET0_PROTREG3_Disabled BPROT_CONFIG0_REGION3_Disabled -#define MPU_PROTENSET0_PROTREG3_Enabled BPROT_CONFIG0_REGION3_Enabled -#define MPU_PROTENSET0_PROTREG3_Set BPROT_CONFIG0_REGION3_Enabled - -#define MPU_PROTENSET0_PROTREG2_Pos BPROT_CONFIG0_REGION2_Pos -#define MPU_PROTENSET0_PROTREG2_Msk BPROT_CONFIG0_REGION2_Msk -#define MPU_PROTENSET0_PROTREG2_Disabled BPROT_CONFIG0_REGION2_Disabled -#define MPU_PROTENSET0_PROTREG2_Enabled BPROT_CONFIG0_REGION2_Enabled -#define MPU_PROTENSET0_PROTREG2_Set BPROT_CONFIG0_REGION2_Enabled - -#define MPU_PROTENSET0_PROTREG1_Pos BPROT_CONFIG0_REGION1_Pos -#define MPU_PROTENSET0_PROTREG1_Msk BPROT_CONFIG0_REGION1_Msk -#define MPU_PROTENSET0_PROTREG1_Disabled BPROT_CONFIG0_REGION1_Disabled -#define MPU_PROTENSET0_PROTREG1_Enabled BPROT_CONFIG0_REGION1_Enabled -#define MPU_PROTENSET0_PROTREG1_Set BPROT_CONFIG0_REGION1_Enabled - -#define MPU_PROTENSET0_PROTREG0_Pos BPROT_CONFIG0_REGION0_Pos -#define MPU_PROTENSET0_PROTREG0_Msk BPROT_CONFIG0_REGION0_Msk -#define MPU_PROTENSET0_PROTREG0_Disabled BPROT_CONFIG0_REGION0_Disabled -#define MPU_PROTENSET0_PROTREG0_Enabled BPROT_CONFIG0_REGION0_Enabled -#define MPU_PROTENSET0_PROTREG0_Set BPROT_CONFIG0_REGION0_Enabled - - -/* From nrf51_deprecated.h */ - -/* NVMC */ -/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ -#define ERASEPROTECTEDPAGE ERASEPCR0 - - -/* IRQ */ -/* COMP module was eliminated. Adapted to nrf52 headers. */ -#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler -#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn - - -/* REFSEL register redefined enumerated values and added some more. */ -#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd - - -/* RADIO */ -/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ -#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos -#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk -#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include -#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip - - -/* FICR */ -/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ -#define DEVICEID0 DEVICEID[0] -#define DEVICEID1 DEVICEID[1] - -/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ -#define ER0 ER[0] -#define ER1 ER[1] -#define ER2 ER[2] -#define ER3 ER[3] - -/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ -#define IR0 IR[0] -#define IR1 IR[1] -#define IR2 IR[2] -#define IR3 IR[3] - -/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ -#define DEVICEADDR0 DEVICEADDR[0] -#define DEVICEADDR1 DEVICEADDR[1] - - -/* PPI */ -/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ -#define TASKS_CHG0EN TASKS_CHG[0].EN -#define TASKS_CHG0DIS TASKS_CHG[0].DIS -#define TASKS_CHG1EN TASKS_CHG[1].EN -#define TASKS_CHG1DIS TASKS_CHG[1].DIS -#define TASKS_CHG2EN TASKS_CHG[2].EN -#define TASKS_CHG2DIS TASKS_CHG[2].DIS -#define TASKS_CHG3EN TASKS_CHG[3].EN -#define TASKS_CHG3DIS TASKS_CHG[3].DIS - -/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ -#define CH0_EEP CH[0].EEP -#define CH0_TEP CH[0].TEP -#define CH1_EEP CH[1].EEP -#define CH1_TEP CH[1].TEP -#define CH2_EEP CH[2].EEP -#define CH2_TEP CH[2].TEP -#define CH3_EEP CH[3].EEP -#define CH3_TEP CH[3].TEP -#define CH4_EEP CH[4].EEP -#define CH4_TEP CH[4].TEP -#define CH5_EEP CH[5].EEP -#define CH5_TEP CH[5].TEP -#define CH6_EEP CH[6].EEP -#define CH6_TEP CH[6].TEP -#define CH7_EEP CH[7].EEP -#define CH7_TEP CH[7].TEP -#define CH8_EEP CH[8].EEP -#define CH8_TEP CH[8].TEP -#define CH9_EEP CH[9].EEP -#define CH9_TEP CH[9].TEP -#define CH10_EEP CH[10].EEP -#define CH10_TEP CH[10].TEP -#define CH11_EEP CH[11].EEP -#define CH11_TEP CH[11].TEP -#define CH12_EEP CH[12].EEP -#define CH12_TEP CH[12].TEP -#define CH13_EEP CH[13].EEP -#define CH13_TEP CH[13].TEP -#define CH14_EEP CH[14].EEP -#define CH14_TEP CH[14].TEP -#define CH15_EEP CH[15].EEP -#define CH15_TEP CH[15].TEP - -/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ -#define CHG0 CHG[0] -#define CHG1 CHG[1] -#define CHG2 CHG[2] -#define CHG3 CHG[3] - -/* All bitfield macros for the CHGx registers therefore changed name. */ -#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included - - - - -/*lint --flb "Leave library region" */ - -#endif /* NRF51_TO_NRF52_H */ - diff --git a/ports/nrf/device/nrf52/nrf51_to_nrf52840.h b/ports/nrf/device/nrf52/nrf51_to_nrf52840.h deleted file mode 100644 index 2ee36e7558f35..0000000000000 --- a/ports/nrf/device/nrf52/nrf51_to_nrf52840.h +++ /dev/null @@ -1,567 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF51_TO_NRF52840_H -#define NRF51_TO_NRF52840_H - -/*lint ++flb "Enter library region */ - -/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices. - * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the - * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros - * from the nrf51_deprecated.h file. */ - - -/* IRQ */ -/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ -#define UART0_IRQHandler UARTE0_UART0_IRQHandler -#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler -#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler -#define ADC_IRQHandler SAADC_IRQHandler -#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler -#define SWI0_IRQHandler SWI0_EGU0_IRQHandler -#define SWI1_IRQHandler SWI1_EGU1_IRQHandler -#define SWI2_IRQHandler SWI2_EGU2_IRQHandler -#define SWI3_IRQHandler SWI3_EGU3_IRQHandler -#define SWI4_IRQHandler SWI4_EGU4_IRQHandler -#define SWI5_IRQHandler SWI5_EGU5_IRQHandler - -#define UART0_IRQn UARTE0_UART0_IRQn -#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn -#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn -#define ADC_IRQn SAADC_IRQn -#define LPCOMP_IRQn COMP_LPCOMP_IRQn -#define SWI0_IRQn SWI0_EGU0_IRQn -#define SWI1_IRQn SWI1_EGU1_IRQn -#define SWI2_IRQn SWI2_EGU2_IRQn -#define SWI3_IRQn SWI3_EGU3_IRQn -#define SWI4_IRQn SWI4_EGU4_IRQn -#define SWI5_IRQn SWI5_EGU5_IRQn - - -/* UICR */ -/* Register RBPCONF was renamed to APPROTECT. */ -#define RBPCONF APPROTECT - -#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos -#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk -#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled -#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled - - -/* GPIO */ -/* GPIO port was renamed to P0. */ -#define NRF_GPIO NRF_P0 -#define NRF_GPIO_BASE NRF_P0_BASE - - -/* QDEC */ -/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ -#define PSELLED PSEL.LED -#define PSELA PSEL.A -#define PSELB PSEL.B - - -/* SPIS */ -/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ -#define PSELSCK PSEL.SCK -#define PSELMISO PSEL.MISO -#define PSELMOSI PSEL.MOSI -#define PSELCSN PSEL.CSN - -/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ -#define RXDPTR RXD.PTR -#define MAXRX RXD.MAXCNT -#define AMOUNTRX RXD.AMOUNT - -#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos -#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk - -#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos -#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk - -/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ -#define TXDPTR TXD.PTR -#define MAXTX TXD.MAXCNT -#define AMOUNTTX TXD.AMOUNT - -#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos -#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk - -#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos -#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk - - -/* UART */ -/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */ -#define PSELRTS PSEL.RTS -#define PSELTXD PSEL.TXD -#define PSELCTS PSEL.CTS -#define PSELRXD PSEL.RXD - -/* TWI */ -/* The registers PSELSCL, PSELSDA were restructured into a struct. */ -#define PSELSCL PSEL.SCL -#define PSELSDA PSEL.SDA - - - -/* From nrf51_deprecated.h */ - -/* NVMC */ -/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ -#define ERASEPROTECTEDPAGE ERASEPCR0 - - -/* IRQ */ -/* COMP module was eliminated. Adapted to nrf52840 headers. */ -#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler -#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn - - -/* REFSEL register redefined enumerated values and added some more. */ -#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd -#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd - - -/* RADIO */ -/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ -#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos -#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk -#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include -#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip - - -/* FICR */ -/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ -#define DEVICEID0 DEVICEID[0] -#define DEVICEID1 DEVICEID[1] - -/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ -#define ER0 ER[0] -#define ER1 ER[1] -#define ER2 ER[2] -#define ER3 ER[3] - -/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ -#define IR0 IR[0] -#define IR1 IR[1] -#define IR2 IR[2] -#define IR3 IR[3] - -/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ -#define DEVICEADDR0 DEVICEADDR[0] -#define DEVICEADDR1 DEVICEADDR[1] - - -/* PPI */ -/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ -#define TASKS_CHG0EN TASKS_CHG[0].EN -#define TASKS_CHG0DIS TASKS_CHG[0].DIS -#define TASKS_CHG1EN TASKS_CHG[1].EN -#define TASKS_CHG1DIS TASKS_CHG[1].DIS -#define TASKS_CHG2EN TASKS_CHG[2].EN -#define TASKS_CHG2DIS TASKS_CHG[2].DIS -#define TASKS_CHG3EN TASKS_CHG[3].EN -#define TASKS_CHG3DIS TASKS_CHG[3].DIS - -/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ -#define CH0_EEP CH[0].EEP -#define CH0_TEP CH[0].TEP -#define CH1_EEP CH[1].EEP -#define CH1_TEP CH[1].TEP -#define CH2_EEP CH[2].EEP -#define CH2_TEP CH[2].TEP -#define CH3_EEP CH[3].EEP -#define CH3_TEP CH[3].TEP -#define CH4_EEP CH[4].EEP -#define CH4_TEP CH[4].TEP -#define CH5_EEP CH[5].EEP -#define CH5_TEP CH[5].TEP -#define CH6_EEP CH[6].EEP -#define CH6_TEP CH[6].TEP -#define CH7_EEP CH[7].EEP -#define CH7_TEP CH[7].TEP -#define CH8_EEP CH[8].EEP -#define CH8_TEP CH[8].TEP -#define CH9_EEP CH[9].EEP -#define CH9_TEP CH[9].TEP -#define CH10_EEP CH[10].EEP -#define CH10_TEP CH[10].TEP -#define CH11_EEP CH[11].EEP -#define CH11_TEP CH[11].TEP -#define CH12_EEP CH[12].EEP -#define CH12_TEP CH[12].TEP -#define CH13_EEP CH[13].EEP -#define CH13_TEP CH[13].TEP -#define CH14_EEP CH[14].EEP -#define CH14_TEP CH[14].TEP -#define CH15_EEP CH[15].EEP -#define CH15_TEP CH[15].TEP - -/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ -#define CHG0 CHG[0] -#define CHG1 CHG[1] -#define CHG2 CHG[2] -#define CHG3 CHG[3] - -/* All bitfield macros for the CHGx registers therefore changed name. */ -#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included - -#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos -#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk -#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded -#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included - -#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos -#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk -#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded -#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included - -#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos -#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk -#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded -#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included - -#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos -#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk -#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded -#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included - -#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos -#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk -#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded -#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included - -#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos -#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk -#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded -#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included - -#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos -#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk -#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded -#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included - -#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos -#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk -#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded -#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included - -#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos -#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk -#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded -#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included - -#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos -#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk -#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded -#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included - -#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos -#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk -#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded -#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included - -#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos -#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk -#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded -#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included - -#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos -#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk -#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded -#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included - -#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos -#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk -#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded -#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included - -#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos -#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk -#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded -#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included - -#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos -#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk -#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded -#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included - - - - -/*lint --flb "Leave library region" */ - -#endif /* NRF51_TO_NRF52840_H */ - diff --git a/ports/nrf/device/nrf52/nrf52.h b/ports/nrf/device/nrf52/nrf52.h deleted file mode 100644 index 8e0ff0c0b5cbe..0000000000000 --- a/ports/nrf/device/nrf52/nrf52.h +++ /dev/null @@ -1,2091 +0,0 @@ - -/****************************************************************************************************//** - * @file nrf52.h - * - * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for - * nrf52 from Nordic Semiconductor. - * - * @version V1 - * @date 18. November 2016 - * - * @note Generated with SVDConv V2.81d - * from CMSIS SVD File 'nrf52.svd' Version 1, - * - * @par Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - *******************************************************************************************************/ - - - -/** @addtogroup Nordic Semiconductor - * @{ - */ - -/** @addtogroup nrf52 - * @{ - */ - -#ifndef NRF52_H -#define NRF52_H - -#ifdef __cplusplus -extern "C" { -#endif - - -/* ------------------------- Interrupt Number Definition ------------------------ */ - -typedef enum { -/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ - Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ - NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ - HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ - MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation - and No Match */ - BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory - related Fault */ - UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ - SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ - DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ - PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ - SysTick_IRQn = -1, /*!< 15 System Tick Timer */ -/* ---------------------- nrf52 Specific Interrupt Numbers ---------------------- */ - POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ - RADIO_IRQn = 1, /*!< 1 RADIO */ - UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */ - SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */ - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */ - NFCT_IRQn = 5, /*!< 5 NFCT */ - GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ - SAADC_IRQn = 7, /*!< 7 SAADC */ - TIMER0_IRQn = 8, /*!< 8 TIMER0 */ - TIMER1_IRQn = 9, /*!< 9 TIMER1 */ - TIMER2_IRQn = 10, /*!< 10 TIMER2 */ - RTC0_IRQn = 11, /*!< 11 RTC0 */ - TEMP_IRQn = 12, /*!< 12 TEMP */ - RNG_IRQn = 13, /*!< 13 RNG */ - ECB_IRQn = 14, /*!< 14 ECB */ - CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ - WDT_IRQn = 16, /*!< 16 WDT */ - RTC1_IRQn = 17, /*!< 17 RTC1 */ - QDEC_IRQn = 18, /*!< 18 QDEC */ - COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */ - SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */ - SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */ - SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */ - SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */ - SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */ - SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */ - TIMER3_IRQn = 26, /*!< 26 TIMER3 */ - TIMER4_IRQn = 27, /*!< 27 TIMER4 */ - PWM0_IRQn = 28, /*!< 28 PWM0 */ - PDM_IRQn = 29, /*!< 29 PDM */ - MWU_IRQn = 32, /*!< 32 MWU */ - PWM1_IRQn = 33, /*!< 33 PWM1 */ - PWM2_IRQn = 34, /*!< 34 PWM2 */ - SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */ - RTC2_IRQn = 36, /*!< 36 RTC2 */ - I2S_IRQn = 37, /*!< 37 I2S */ - FPU_IRQn = 38 /*!< 38 FPU */ -} IRQn_Type; - - -/** @addtogroup Configuration_of_CMSIS - * @{ - */ - - -/* ================================================================================ */ -/* ================ Processor and Core Peripheral Section ================ */ -/* ================================================================================ */ - -/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present or not */ -/** @} */ /* End of group Configuration_of_CMSIS */ - -#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ -#include "system_nrf52.h" /*!< nrf52 System */ - - -/* ================================================================================ */ -/* ================ Device Specific Peripheral Section ================ */ -/* ================================================================================ */ - - -/** @addtogroup Device_Peripheral_Registers - * @{ - */ - - -/* ------------------- Start of section using anonymous unions ------------------ */ -#if defined(__CC_ARM) - #pragma push - #pragma anon_unions -#elif defined(__ICCARM__) - #pragma language=extended -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) -/* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning 586 -#else - #warning Not supported compiler type -#endif - - -typedef struct { - __I uint32_t PART; /*!< Part code */ - __I uint32_t VARIANT; /*!< Part Variant, Hardware version and Production configuration */ - __I uint32_t PACKAGE; /*!< Package option */ - __I uint32_t RAM; /*!< RAM variant */ - __I uint32_t FLASH; /*!< Flash variant */ - __IO uint32_t UNUSED0[3]; /*!< Description collection[0]: Unspecified */ -} FICR_INFO_Type; - -typedef struct { - __I uint32_t A0; /*!< Slope definition A0. */ - __I uint32_t A1; /*!< Slope definition A1. */ - __I uint32_t A2; /*!< Slope definition A2. */ - __I uint32_t A3; /*!< Slope definition A3. */ - __I uint32_t A4; /*!< Slope definition A4. */ - __I uint32_t A5; /*!< Slope definition A5. */ - __I uint32_t B0; /*!< y-intercept B0. */ - __I uint32_t B1; /*!< y-intercept B1. */ - __I uint32_t B2; /*!< y-intercept B2. */ - __I uint32_t B3; /*!< y-intercept B3. */ - __I uint32_t B4; /*!< y-intercept B4. */ - __I uint32_t B5; /*!< y-intercept B5. */ - __I uint32_t T0; /*!< Segment end T0. */ - __I uint32_t T1; /*!< Segment end T1. */ - __I uint32_t T2; /*!< Segment end T2. */ - __I uint32_t T3; /*!< Segment end T3. */ - __I uint32_t T4; /*!< Segment end T4. */ -} FICR_TEMP_Type; - -typedef struct { - __I uint32_t TAGHEADER0; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER1; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER2; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER3; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ -} FICR_NFC_Type; - -typedef struct { - __IO uint32_t POWER; /*!< Description cluster[0]: RAM0 power control register */ - __O uint32_t POWERSET; /*!< Description cluster[0]: RAM0 power control set register */ - __O uint32_t POWERCLR; /*!< Description cluster[0]: RAM0 power control clear register */ - __I uint32_t RESERVED0; -} POWER_RAM_Type; - -typedef struct { - __IO uint32_t RTS; /*!< Pin select for RTS signal */ - __IO uint32_t TXD; /*!< Pin select for TXD signal */ - __IO uint32_t CTS; /*!< Pin select for CTS signal */ - __IO uint32_t RXD; /*!< Pin select for RXD signal */ -} UARTE_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} UARTE_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} UARTE_TXD_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ - __IO uint32_t MISO; /*!< Pin select for MISO signal */ -} SPIM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} SPIM_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} SPIM_TXD_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MISO; /*!< Pin select for MISO signal */ - __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ - __IO uint32_t CSN; /*!< Pin select for CSN signal */ -} SPIS_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RXD data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes received in last granted transaction */ -} SPIS_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< TXD data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */ -} SPIS_TXD_Type; - -typedef struct { - __IO uint32_t SCL; /*!< Pin select for SCL signal */ - __IO uint32_t SDA; /*!< Pin select for SDA signal */ -} TWIM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} TWIM_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} TWIM_TXD_Type; - -typedef struct { - __IO uint32_t SCL; /*!< Pin select for SCL signal */ - __IO uint32_t SDA; /*!< Pin select for SDA signal */ -} TWIS_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RXD Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in RXD buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last RXD transaction */ -} TWIS_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< TXD Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in TXD buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */ -} TWIS_TXD_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MOSI; /*!< Pin select for MOSI */ - __IO uint32_t MISO; /*!< Pin select for MISO */ -} SPI_PSEL_Type; - -typedef struct { - __IO uint32_t RX; /*!< Result of last incoming frames */ -} NFCT_FRAMESTATUS_Type; - -typedef struct { - __IO uint32_t FRAMECONFIG; /*!< Configuration of outgoing frames */ - __IO uint32_t AMOUNT; /*!< Size of outgoing frame */ -} NFCT_TXD_Type; - -typedef struct { - __IO uint32_t FRAMECONFIG; /*!< Configuration of incoming frames */ - __I uint32_t AMOUNT; /*!< Size of last incoming frame */ -} NFCT_RXD_Type; - -typedef struct { - __IO uint32_t LIMITH; /*!< Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */ - __IO uint32_t LIMITL; /*!< Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */ -} SAADC_EVENTS_CH_Type; - -typedef struct { - __IO uint32_t PSELP; /*!< Description cluster[0]: Input positive pin selection for CH[0] */ - __IO uint32_t PSELN; /*!< Description cluster[0]: Input negative pin selection for CH[0] */ - __IO uint32_t CONFIG; /*!< Description cluster[0]: Input configuration for CH[0] */ - __IO uint32_t LIMIT; /*!< Description cluster[0]: High/low limits for event monitoring - a channel */ -} SAADC_CH_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of buffer words to transfer */ - __I uint32_t AMOUNT; /*!< Number of buffer words transferred since last START */ -} SAADC_RESULT_Type; - -typedef struct { - __IO uint32_t LED; /*!< Pin select for LED signal */ - __IO uint32_t A; /*!< Pin select for A signal */ - __IO uint32_t B; /*!< Pin select for B signal */ -} QDEC_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of this - sequence */ - __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in this - sequence */ - __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between - samples loaded into compare register */ - __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */ - __I uint32_t RESERVED1[4]; -} PWM_SEQ_Type; - -typedef struct { - __IO uint32_t OUT[4]; /*!< Description collection[0]: Output pin select for PWM channel - 0 */ -} PWM_PSEL_Type; - -typedef struct { - __IO uint32_t CLK; /*!< Pin number configuration for PDM CLK signal */ - __IO uint32_t DIN; /*!< Pin number configuration for PDM DIN signal */ -} PDM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RAM address pointer to write samples to with EasyDMA */ - __IO uint32_t MAXCNT; /*!< Number of samples to allocate memory for in EasyDMA mode */ -} PDM_SAMPLE_Type; - -typedef struct { - __O uint32_t EN; /*!< Description cluster[0]: Enable channel group 0 */ - __O uint32_t DIS; /*!< Description cluster[0]: Disable channel group 0 */ -} PPI_TASKS_CHG_Type; - -typedef struct { - __IO uint32_t EEP; /*!< Description cluster[0]: Channel 0 event end-point */ - __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ -} PPI_CH_Type; - -typedef struct { - __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ -} PPI_FORK_Type; - -typedef struct { - __IO uint32_t WA; /*!< Description cluster[0]: Write access to region 0 detected */ - __IO uint32_t RA; /*!< Description cluster[0]: Read access to region 0 detected */ -} MWU_EVENTS_REGION_Type; - -typedef struct { - __IO uint32_t WA; /*!< Description cluster[0]: Write access to peripheral region 0 - detected */ - __IO uint32_t RA; /*!< Description cluster[0]: Read access to peripheral region 0 detected */ -} MWU_EVENTS_PREGION_Type; - -typedef struct { - __IO uint32_t SUBSTATWA; /*!< Description cluster[0]: Source of event/interrupt in region - 0, write access detected while corresponding subregion was enabled - for watching */ - __IO uint32_t SUBSTATRA; /*!< Description cluster[0]: Source of event/interrupt in region - 0, read access detected while corresponding subregion was enabled - for watching */ -} MWU_PERREGION_Type; - -typedef struct { - __IO uint32_t START; /*!< Description cluster[0]: Start address for region 0 */ - __IO uint32_t END; /*!< Description cluster[0]: End address of region 0 */ - __I uint32_t RESERVED2[2]; -} MWU_REGION_Type; - -typedef struct { - __I uint32_t START; /*!< Description cluster[0]: Reserved for future use */ - __I uint32_t END; /*!< Description cluster[0]: Reserved for future use */ - __IO uint32_t SUBS; /*!< Description cluster[0]: Subregions of region 0 */ - __I uint32_t RESERVED3; -} MWU_PREGION_Type; - -typedef struct { - __IO uint32_t MODE; /*!< I2S mode. */ - __IO uint32_t RXEN; /*!< Reception (RX) enable. */ - __IO uint32_t TXEN; /*!< Transmission (TX) enable. */ - __IO uint32_t MCKEN; /*!< Master clock generator enable. */ - __IO uint32_t MCKFREQ; /*!< Master clock generator frequency. */ - __IO uint32_t RATIO; /*!< MCK / LRCK ratio. */ - __IO uint32_t SWIDTH; /*!< Sample width. */ - __IO uint32_t ALIGN; /*!< Alignment of sample within a frame. */ - __IO uint32_t FORMAT; /*!< Frame format. */ - __IO uint32_t CHANNELS; /*!< Enable channels. */ -} I2S_CONFIG_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Receive buffer RAM start address. */ -} I2S_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Transmit buffer RAM start address. */ -} I2S_TXD_Type; - -typedef struct { - __IO uint32_t MAXCNT; /*!< Size of RXD and TXD buffers. */ -} I2S_RXTXD_Type; - -typedef struct { - __IO uint32_t MCK; /*!< Pin select for MCK signal. */ - __IO uint32_t SCK; /*!< Pin select for SCK signal. */ - __IO uint32_t LRCK; /*!< Pin select for LRCK signal. */ - __IO uint32_t SDIN; /*!< Pin select for SDIN signal. */ - __IO uint32_t SDOUT; /*!< Pin select for SDOUT signal. */ -} I2S_PSEL_Type; - - -/* ================================================================================ */ -/* ================ FICR ================ */ -/* ================================================================================ */ - - -/** - * @brief Factory Information Configuration Registers (FICR) - */ - -typedef struct { /*!< FICR Structure */ - __I uint32_t RESERVED0[4]; - __I uint32_t CODEPAGESIZE; /*!< Code memory page size */ - __I uint32_t CODESIZE; /*!< Code memory size */ - __I uint32_t RESERVED1[18]; - __I uint32_t DEVICEID[2]; /*!< Description collection[0]: Device identifier */ - __I uint32_t RESERVED2[6]; - __I uint32_t ER[4]; /*!< Description collection[0]: Encryption Root, word 0 */ - __I uint32_t IR[4]; /*!< Description collection[0]: Identity Root, word 0 */ - __I uint32_t DEVICEADDRTYPE; /*!< Device address type */ - __I uint32_t DEVICEADDR[2]; /*!< Description collection[0]: Device address 0 */ - __I uint32_t RESERVED3[21]; - FICR_INFO_Type INFO; /*!< Device info */ - __I uint32_t RESERVED4[185]; - FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */ - __I uint32_t RESERVED5[2]; - FICR_NFC_Type NFC; /*!< Unspecified */ -} NRF_FICR_Type; - - -/* ================================================================================ */ -/* ================ UICR ================ */ -/* ================================================================================ */ - - -/** - * @brief User Information Configuration Registers (UICR) - */ - -typedef struct { /*!< UICR Structure */ - __IO uint32_t UNUSED0; /*!< Unspecified */ - __IO uint32_t UNUSED1; /*!< Unspecified */ - __IO uint32_t UNUSED2; /*!< Unspecified */ - __I uint32_t RESERVED0; - __IO uint32_t UNUSED3; /*!< Unspecified */ - __IO uint32_t NRFFW[15]; /*!< Description collection[0]: Reserved for Nordic firmware design */ - __IO uint32_t NRFHW[12]; /*!< Description collection[0]: Reserved for Nordic hardware design */ - __IO uint32_t CUSTOMER[32]; /*!< Description collection[0]: Reserved for customer */ - __I uint32_t RESERVED1[64]; - __IO uint32_t PSELRESET[2]; /*!< Description collection[0]: Mapping of the nRESET function (see - POWER chapter for details) */ - __IO uint32_t APPROTECT; /*!< Access Port protection */ - __IO uint32_t NFCPINS; /*!< Setting of pins dedicated to NFC functionality: NFC antenna - or GPIO */ -} NRF_UICR_Type; - - -/* ================================================================================ */ -/* ================ BPROT ================ */ -/* ================================================================================ */ - - -/** - * @brief Block Protect (BPROT) - */ - -typedef struct { /*!< BPROT Structure */ - __I uint32_t RESERVED0[384]; - __IO uint32_t CONFIG0; /*!< Block protect configuration register 0 */ - __IO uint32_t CONFIG1; /*!< Block protect configuration register 1 */ - __IO uint32_t DISABLEINDEBUG; /*!< Disable protection mechanism in debug interface mode */ - __IO uint32_t UNUSED0; /*!< Unspecified */ - __IO uint32_t CONFIG2; /*!< Block protect configuration register 2 */ - __IO uint32_t CONFIG3; /*!< Block protect configuration register 3 */ -} NRF_BPROT_Type; - - -/* ================================================================================ */ -/* ================ POWER ================ */ -/* ================================================================================ */ - - -/** - * @brief Power control (POWER) - */ - -typedef struct { /*!< POWER Structure */ - __I uint32_t RESERVED0[30]; - __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode */ - __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency) */ - __I uint32_t RESERVED1[34]; - __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning */ - __I uint32_t RESERVED2[2]; - __IO uint32_t EVENTS_SLEEPENTER; /*!< CPU entered WFI/WFE sleep */ - __IO uint32_t EVENTS_SLEEPEXIT; /*!< CPU exited WFI/WFE sleep */ - __I uint32_t RESERVED3[122]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[61]; - __IO uint32_t RESETREAS; /*!< Reset reason */ - __I uint32_t RESERVED5[9]; - __I uint32_t RAMSTATUS; /*!< Deprecated register - RAM status register */ - __I uint32_t RESERVED6[53]; - __O uint32_t SYSTEMOFF; /*!< System OFF register */ - __I uint32_t RESERVED7[3]; - __IO uint32_t POFCON; /*!< Power failure comparator configuration */ - __I uint32_t RESERVED8[2]; - __IO uint32_t GPREGRET; /*!< General purpose retention register */ - __IO uint32_t GPREGRET2; /*!< General purpose retention register */ - __IO uint32_t RAMON; /*!< Deprecated register - RAM on/off register (this register is - retained) */ - __I uint32_t RESERVED9[11]; - __IO uint32_t RAMONB; /*!< Deprecated register - RAM on/off register (this register is - retained) */ - __I uint32_t RESERVED10[8]; - __IO uint32_t DCDCEN; /*!< DC/DC enable register */ - __I uint32_t RESERVED11[225]; - POWER_RAM_Type RAM[8]; /*!< Unspecified */ -} NRF_POWER_Type; - - -/* ================================================================================ */ -/* ================ CLOCK ================ */ -/* ================================================================================ */ - - -/** - * @brief Clock control (CLOCK) - */ - -typedef struct { /*!< CLOCK Structure */ - __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK crystal oscillator */ - __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK crystal oscillator */ - __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK source */ - __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK source */ - __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC oscillator */ - __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */ - __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */ - __I uint32_t RESERVED0[57]; - __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started */ - __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */ - __I uint32_t RESERVED1; - __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator complete event */ - __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */ - __I uint32_t RESERVED2[124]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[63]; - __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */ - __I uint32_t HFCLKSTAT; /*!< HFCLK status */ - __I uint32_t RESERVED4; - __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */ - __I uint32_t LFCLKSTAT; /*!< LFCLK status */ - __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ - __I uint32_t RESERVED5[62]; - __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ - __I uint32_t RESERVED6[7]; - __IO uint32_t CTIV; /*!< Calibration timer interval */ - __I uint32_t RESERVED7[8]; - __IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */ -} NRF_CLOCK_Type; - - -/* ================================================================================ */ -/* ================ RADIO ================ */ -/* ================================================================================ */ - - -/** - * @brief 2.4 GHz Radio (RADIO) - */ - -typedef struct { /*!< RADIO Structure */ - __O uint32_t TASKS_TXEN; /*!< Enable RADIO in TX mode */ - __O uint32_t TASKS_RXEN; /*!< Enable RADIO in RX mode */ - __O uint32_t TASKS_START; /*!< Start RADIO */ - __O uint32_t TASKS_STOP; /*!< Stop RADIO */ - __O uint32_t TASKS_DISABLE; /*!< Disable RADIO */ - __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal - strength. */ - __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */ - __O uint32_t TASKS_BCSTART; /*!< Start the bit counter */ - __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */ - __I uint32_t RESERVED0[55]; - __IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */ - __IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */ - __IO uint32_t EVENTS_PAYLOAD; /*!< Packet payload sent or received */ - __IO uint32_t EVENTS_END; /*!< Packet sent or received */ - __IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */ - __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */ - __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */ - __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete. */ - __I uint32_t RESERVED1[2]; - __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value. */ - __I uint32_t RESERVED2; - __IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */ - __IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */ - __I uint32_t RESERVED3[50]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED4[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED5[61]; - __I uint32_t CRCSTATUS; /*!< CRC status */ - __I uint32_t RESERVED6; - __I uint32_t RXMATCH; /*!< Received address */ - __I uint32_t RXCRC; /*!< CRC field of previously received packet */ - __I uint32_t DAI; /*!< Device address match index */ - __I uint32_t RESERVED7[60]; - __IO uint32_t PACKETPTR; /*!< Packet pointer */ - __IO uint32_t FREQUENCY; /*!< Frequency */ - __IO uint32_t TXPOWER; /*!< Output power */ - __IO uint32_t MODE; /*!< Data rate and modulation */ - __IO uint32_t PCNF0; /*!< Packet configuration register 0 */ - __IO uint32_t PCNF1; /*!< Packet configuration register 1 */ - __IO uint32_t BASE0; /*!< Base address 0 */ - __IO uint32_t BASE1; /*!< Base address 1 */ - __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0-3 */ - __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4-7 */ - __IO uint32_t TXADDRESS; /*!< Transmit address select */ - __IO uint32_t RXADDRESSES; /*!< Receive address select */ - __IO uint32_t CRCCNF; /*!< CRC configuration */ - __IO uint32_t CRCPOLY; /*!< CRC polynomial */ - __IO uint32_t CRCINIT; /*!< CRC initial value */ - __IO uint32_t UNUSED0; /*!< Unspecified */ - __IO uint32_t TIFS; /*!< Inter Frame Spacing in us */ - __I uint32_t RSSISAMPLE; /*!< RSSI sample */ - __I uint32_t RESERVED8; - __I uint32_t STATE; /*!< Current radio state */ - __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value */ - __I uint32_t RESERVED9[2]; - __IO uint32_t BCC; /*!< Bit counter compare */ - __I uint32_t RESERVED10[39]; - __IO uint32_t DAB[8]; /*!< Description collection[0]: Device address base segment 0 */ - __IO uint32_t DAP[8]; /*!< Description collection[0]: Device address prefix 0 */ - __IO uint32_t DACNF; /*!< Device address match configuration */ - __I uint32_t RESERVED11[3]; - __IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */ - __I uint32_t RESERVED12[618]; - __IO uint32_t POWER; /*!< Peripheral power control */ -} NRF_RADIO_Type; - - -/* ================================================================================ */ -/* ================ UARTE ================ */ -/* ================================================================================ */ - - -/** - * @brief UART with EasyDMA (UARTE) - */ - -typedef struct { /*!< UARTE Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ - __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ - __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ - __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ - __I uint32_t RESERVED0[7]; - __O uint32_t TASKS_FLUSHRX; /*!< Flush RX FIFO into RX buffer */ - __I uint32_t RESERVED1[52]; - __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ - __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ - __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to - Data RAM) */ - __I uint32_t RESERVED2; - __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ - __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ - __IO uint32_t EVENTS_ERROR; /*!< Error detected */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_RXSTARTED; /*!< UART receiver has started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< UART transmitter has started */ - __I uint32_t RESERVED6; - __IO uint32_t EVENTS_TXSTOPPED; /*!< Transmitter stopped */ - __I uint32_t RESERVED7[41]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[93]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED10[31]; - __IO uint32_t ENABLE; /*!< Enable UART */ - __I uint32_t RESERVED11; - UARTE_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[3]; - __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED13[3]; - UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ - __I uint32_t RESERVED14; - UARTE_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED15[7]; - __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ -} NRF_UARTE_Type; - - -/* ================================================================================ */ -/* ================ UART ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Asynchronous Receiver/Transmitter (UART) - */ - -typedef struct { /*!< UART Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ - __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ - __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ - __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ - __I uint32_t RESERVED0[3]; - __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */ - __I uint32_t RESERVED1[56]; - __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ - __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ - __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */ - __I uint32_t RESERVED2[4]; - __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ - __I uint32_t RESERVED3; - __IO uint32_t EVENTS_ERROR; /*!< Error detected */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ - __I uint32_t RESERVED5[46]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED6[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED7[93]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED8[31]; - __IO uint32_t ENABLE; /*!< Enable UART */ - __I uint32_t RESERVED9; - __IO uint32_t PSELRTS; /*!< Pin select for RTS */ - __IO uint32_t PSELTXD; /*!< Pin select for TXD */ - __IO uint32_t PSELCTS; /*!< Pin select for CTS */ - __IO uint32_t PSELRXD; /*!< Pin select for RXD */ - __I uint32_t RXD; /*!< RXD register */ - __O uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED10; - __IO uint32_t BAUDRATE; /*!< Baud rate */ - __I uint32_t RESERVED11[17]; - __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ -} NRF_UART_Type; - - -/* ================================================================================ */ -/* ================ SPIM ================ */ -/* ================================================================================ */ - - -/** - * @brief Serial Peripheral Interface Master with EasyDMA 0 (SPIM) - */ - -typedef struct { /*!< SPIM Structure */ - __I uint32_t RESERVED0[4]; - __O uint32_t TASKS_START; /*!< Start SPI transaction */ - __O uint32_t TASKS_STOP; /*!< Stop SPI transaction */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction */ - __I uint32_t RESERVED2[56]; - __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ - __I uint32_t RESERVED4; - __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached */ - __I uint32_t RESERVED6[10]; - __IO uint32_t EVENTS_STARTED; /*!< Transaction started */ - __I uint32_t RESERVED7[44]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[125]; - __IO uint32_t ENABLE; /*!< Enable SPIM */ - __I uint32_t RESERVED10; - SPIM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED11[4]; - __IO uint32_t FREQUENCY; /*!< SPI frequency */ - __I uint32_t RESERVED12[3]; - SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ - SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED13[26]; - __IO uint32_t ORC; /*!< Over-read character. Character clocked out in case and over-read - of the TXD buffer. */ -} NRF_SPIM_Type; - - -/* ================================================================================ */ -/* ================ SPIS ================ */ -/* ================================================================================ */ - - -/** - * @brief SPI Slave 0 (SPIS) - */ - -typedef struct { /*!< SPIS Structure */ - __I uint32_t RESERVED0[9]; - __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore */ - __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore, enabling the SPI slave to acquire it */ - __I uint32_t RESERVED1[54]; - __IO uint32_t EVENTS_END; /*!< Granted transaction completed */ - __I uint32_t RESERVED2[2]; - __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ - __I uint32_t RESERVED3[5]; - __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired */ - __I uint32_t RESERVED4[53]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED5[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED6[61]; - __I uint32_t SEMSTAT; /*!< Semaphore status register */ - __I uint32_t RESERVED7[15]; - __IO uint32_t STATUS; /*!< Status from last transaction */ - __I uint32_t RESERVED8[47]; - __IO uint32_t ENABLE; /*!< Enable SPI slave */ - __I uint32_t RESERVED9; - SPIS_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED10[7]; - SPIS_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED11; - SPIS_TXD_Type TXD; /*!< Unspecified */ - __I uint32_t RESERVED12; - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED13; - __IO uint32_t DEF; /*!< Default character. Character clocked out in case of an ignored - transaction. */ - __I uint32_t RESERVED14[24]; - __IO uint32_t ORC; /*!< Over-read character */ -} NRF_SPIS_Type; - - -/* ================================================================================ */ -/* ================ TWIM ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Master Interface with EasyDMA 0 (TWIM) - */ - -typedef struct { /*!< TWIM Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ - __I uint32_t RESERVED1[2]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction. Must be issued while the TWI master is - not suspended. */ - __I uint32_t RESERVED2; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED3[56]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED5[8]; - __IO uint32_t EVENTS_SUSPENDED; /*!< Last byte has been sent out after the SUSPEND task has been - issued, TWI traffic is now suspended. */ - __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ - __I uint32_t RESERVED6[2]; - __IO uint32_t EVENTS_LASTRX; /*!< Byte boundary, starting to receive the last byte */ - __IO uint32_t EVENTS_LASTTX; /*!< Byte boundary, starting to transmit the last byte */ - __I uint32_t RESERVED7[39]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[110]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED10[14]; - __IO uint32_t ENABLE; /*!< Enable TWIM */ - __I uint32_t RESERVED11; - TWIM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[5]; - __IO uint32_t FREQUENCY; /*!< TWI frequency */ - __I uint32_t RESERVED13[3]; - TWIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ - TWIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED14[13]; - __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ -} NRF_TWIM_Type; - - -/* ================================================================================ */ -/* ================ TWIS ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS) - */ - -typedef struct { /*!< TWIS Structure */ - __I uint32_t RESERVED0[5]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED2[3]; - __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */ - __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */ - __I uint32_t RESERVED3[51]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED5[9]; - __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ - __I uint32_t RESERVED6[4]; - __IO uint32_t EVENTS_WRITE; /*!< Write command received */ - __IO uint32_t EVENTS_READ; /*!< Read command received */ - __I uint32_t RESERVED7[37]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[113]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t MATCH; /*!< Status register indicating which address had a match */ - __I uint32_t RESERVED10[10]; - __IO uint32_t ENABLE; /*!< Enable TWIS */ - __I uint32_t RESERVED11; - TWIS_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[9]; - TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */ - __I uint32_t RESERVED13; - TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED14[14]; - __IO uint32_t ADDRESS[2]; /*!< Description collection[0]: TWI slave address 0 */ - __I uint32_t RESERVED15; - __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */ - __I uint32_t RESERVED16[10]; - __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read - of the transmit buffer. */ -} NRF_TWIS_Type; - - -/* ================================================================================ */ -/* ================ SPI ================ */ -/* ================================================================================ */ - - -/** - * @brief Serial Peripheral Interface 0 (SPI) - */ - -typedef struct { /*!< SPI Structure */ - __I uint32_t RESERVED0[66]; - __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */ - __I uint32_t RESERVED1[126]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[125]; - __IO uint32_t ENABLE; /*!< Enable SPI */ - __I uint32_t RESERVED3; - SPI_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED4; - __I uint32_t RXD; /*!< RXD register */ - __IO uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED5; - __IO uint32_t FREQUENCY; /*!< SPI frequency */ - __I uint32_t RESERVED6[11]; - __IO uint32_t CONFIG; /*!< Configuration register */ -} NRF_SPI_Type; - - -/* ================================================================================ */ -/* ================ TWI ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Interface 0 (TWI) - */ - -typedef struct { /*!< TWI Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ - __I uint32_t RESERVED1[2]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ - __I uint32_t RESERVED2; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED3[56]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */ - __I uint32_t RESERVED4[4]; - __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED6[4]; - __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or - received */ - __I uint32_t RESERVED7[3]; - __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */ - __I uint32_t RESERVED8[45]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED9[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED10[110]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED11[14]; - __IO uint32_t ENABLE; /*!< Enable TWI */ - __I uint32_t RESERVED12; - __IO uint32_t PSELSCL; /*!< Pin select for SCL */ - __IO uint32_t PSELSDA; /*!< Pin select for SDA */ - __I uint32_t RESERVED13[2]; - __I uint32_t RXD; /*!< RXD register */ - __IO uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED14; - __IO uint32_t FREQUENCY; /*!< TWI frequency */ - __I uint32_t RESERVED15[24]; - __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ -} NRF_TWI_Type; - - -/* ================================================================================ */ -/* ================ NFCT ================ */ -/* ================================================================================ */ - - -/** - * @brief NFC-A compatible radio (NFCT) - */ - -typedef struct { /*!< NFCT Structure */ - __O uint32_t TASKS_ACTIVATE; /*!< Activate NFC peripheral for incoming and outgoing frames, change - state to activated */ - __O uint32_t TASKS_DISABLE; /*!< Disable NFC peripheral */ - __O uint32_t TASKS_SENSE; /*!< Enable NFC sense field mode, change state to sense mode */ - __O uint32_t TASKS_STARTTX; /*!< Start transmission of a outgoing frame, change state to transmit */ - __I uint32_t RESERVED0[3]; - __O uint32_t TASKS_ENABLERXDATA; /*!< Initializes the EasyDMA for receive. */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_GOIDLE; /*!< Force state machine to IDLE state */ - __O uint32_t TASKS_GOSLEEP; /*!< Force state machine to SLEEP_A state */ - __I uint32_t RESERVED2[53]; - __IO uint32_t EVENTS_READY; /*!< The NFC peripheral is ready to receive and send frames */ - __IO uint32_t EVENTS_FIELDDETECTED; /*!< Remote NFC field detected */ - __IO uint32_t EVENTS_FIELDLOST; /*!< Remote NFC field lost */ - __IO uint32_t EVENTS_TXFRAMESTART; /*!< Marks the start of the first symbol of a transmitted frame */ - __IO uint32_t EVENTS_TXFRAMEEND; /*!< Marks the end of the last transmitted on-air symbol of a frame */ - __IO uint32_t EVENTS_RXFRAMESTART; /*!< Marks the end of the first symbol of a received frame */ - __IO uint32_t EVENTS_RXFRAMEEND; /*!< Received data have been checked (CRC, parity) and transferred - to RAM, and EasyDMA has ended accessing the RX buffer */ - __IO uint32_t EVENTS_ERROR; /*!< NFC error reported. The ERRORSTATUS register contains details - on the source of the error. */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_RXERROR; /*!< NFC RX frame error reported. The FRAMESTATUS.RX register contains - details on the source of the error. */ - __IO uint32_t EVENTS_ENDRX; /*!< RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */ - __IO uint32_t EVENTS_ENDTX; /*!< Transmission of data in RAM has ended, and EasyDMA has ended - accessing the TX buffer */ - __I uint32_t RESERVED4; - __IO uint32_t EVENTS_AUTOCOLRESSTARTED; /*!< Auto collision resolution process has started */ - __I uint32_t RESERVED5[3]; - __IO uint32_t EVENTS_COLLISION; /*!< NFC Auto collision resolution error reported. */ - __IO uint32_t EVENTS_SELECTED; /*!< NFC Auto collision resolution successfully completed */ - __IO uint32_t EVENTS_STARTED; /*!< EasyDMA is ready to receive or send frames. */ - __I uint32_t RESERVED6[43]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED7[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED8[62]; - __IO uint32_t ERRORSTATUS; /*!< NFC Error Status register */ - __I uint32_t RESERVED9; - NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< Unspecified */ - __I uint32_t RESERVED10[8]; - __I uint32_t CURRENTLOADCTRL; /*!< Current value driven to the NFC Load Control */ - __I uint32_t RESERVED11[2]; - __I uint32_t FIELDPRESENT; /*!< Indicates the presence or not of a valid field */ - __I uint32_t RESERVED12[49]; - __IO uint32_t FRAMEDELAYMIN; /*!< Minimum frame delay */ - __IO uint32_t FRAMEDELAYMAX; /*!< Maximum frame delay */ - __IO uint32_t FRAMEDELAYMODE; /*!< Configuration register for the Frame Delay Timer */ - __IO uint32_t PACKETPTR; /*!< Packet pointer for TXD and RXD data storage in Data RAM */ - __IO uint32_t MAXLEN; /*!< Size of allocated for TXD and RXD data storage buffer in Data - RAM */ - NFCT_TXD_Type TXD; /*!< Unspecified */ - NFCT_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED13[26]; - __IO uint32_t NFCID1_LAST; /*!< Last NFCID1 part (4, 7 or 10 bytes ID) */ - __IO uint32_t NFCID1_2ND_LAST; /*!< Second last NFCID1 part (7 or 10 bytes ID) */ - __IO uint32_t NFCID1_3RD_LAST; /*!< Third last NFCID1 part (10 bytes ID) */ - __I uint32_t RESERVED14; - __IO uint32_t SENSRES; /*!< NFC-A SENS_RES auto-response settings */ - __IO uint32_t SELRES; /*!< NFC-A SEL_RES auto-response settings */ -} NRF_NFCT_Type; - - -/* ================================================================================ */ -/* ================ GPIOTE ================ */ -/* ================================================================================ */ - - -/** - * @brief GPIO Tasks and Events (GPIOTE) - */ - -typedef struct { /*!< GPIOTE Structure */ - __O uint32_t TASKS_OUT[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */ - __I uint32_t RESERVED0[4]; - __O uint32_t TASKS_SET[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is to set it high. */ - __I uint32_t RESERVED1[4]; - __O uint32_t TASKS_CLR[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is to set it low. */ - __I uint32_t RESERVED2[32]; - __IO uint32_t EVENTS_IN[8]; /*!< Description collection[0]: Event generated from pin specified - in CONFIG[0].PSEL */ - __I uint32_t RESERVED3[23]; - __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism - enabled */ - __I uint32_t RESERVED4[97]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED5[129]; - __IO uint32_t CONFIG[8]; /*!< Description collection[0]: Configuration for OUT[n], SET[n] - and CLR[n] tasks and IN[n] event */ -} NRF_GPIOTE_Type; - - -/* ================================================================================ */ -/* ================ SAADC ================ */ -/* ================================================================================ */ - - -/** - * @brief Analog to Digital Converter (SAADC) - */ - -typedef struct { /*!< SAADC Structure */ - __O uint32_t TASKS_START; /*!< Start the ADC and prepare the result buffer in RAM */ - __O uint32_t TASKS_SAMPLE; /*!< Take one ADC sample, if scan is enabled all channels are sampled */ - __O uint32_t TASKS_STOP; /*!< Stop the ADC and terminate any on-going conversion */ - __O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_STARTED; /*!< The ADC has started */ - __IO uint32_t EVENTS_END; /*!< The ADC has filled up the Result buffer */ - __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the mode, - multiple conversions might be needed for a result to be transferred - to RAM. */ - __IO uint32_t EVENTS_RESULTDONE; /*!< A result is ready to get transferred to RAM. */ - __IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */ - __IO uint32_t EVENTS_STOPPED; /*!< The ADC has stopped */ - SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */ - __I uint32_t RESERVED1[106]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[61]; - __I uint32_t STATUS; /*!< Status */ - __I uint32_t RESERVED3[63]; - __IO uint32_t ENABLE; /*!< Enable or disable ADC */ - __I uint32_t RESERVED4[3]; - SAADC_CH_Type CH[8]; /*!< Unspecified */ - __I uint32_t RESERVED5[24]; - __IO uint32_t RESOLUTION; /*!< Resolution configuration */ - __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. OVERSAMPLE should not be combined - with SCAN. The RESOLUTION is applied before averaging, thus - for high OVERSAMPLE a higher RESOLUTION should be used. */ - __IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */ - __I uint32_t RESERVED6[12]; - SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */ -} NRF_SAADC_Type; - - -/* ================================================================================ */ -/* ================ TIMER ================ */ -/* ================================================================================ */ - - -/** - * @brief Timer/Counter 0 (TIMER) - */ - -typedef struct { /*!< TIMER Structure */ - __O uint32_t TASKS_START; /*!< Start Timer */ - __O uint32_t TASKS_STOP; /*!< Stop Timer */ - __O uint32_t TASKS_COUNT; /*!< Increment Timer (Counter mode only) */ - __O uint32_t TASKS_CLEAR; /*!< Clear time */ - __O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */ - __I uint32_t RESERVED0[11]; - __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[0]: Capture Timer value to CC[0] register */ - __I uint32_t RESERVED1[58]; - __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[0]: Compare event on CC[0] match */ - __I uint32_t RESERVED2[42]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED3[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[126]; - __IO uint32_t MODE; /*!< Timer mode selection */ - __IO uint32_t BITMODE; /*!< Configure the number of bits used by the TIMER */ - __I uint32_t RESERVED5; - __IO uint32_t PRESCALER; /*!< Timer prescaler register */ - __I uint32_t RESERVED6[11]; - __IO uint32_t CC[6]; /*!< Description collection[0]: Capture/Compare register 0 */ -} NRF_TIMER_Type; - - -/* ================================================================================ */ -/* ================ RTC ================ */ -/* ================================================================================ */ - - -/** - * @brief Real time counter 0 (RTC) - */ - -typedef struct { /*!< RTC Structure */ - __O uint32_t TASKS_START; /*!< Start RTC COUNTER */ - __O uint32_t TASKS_STOP; /*!< Stop RTC COUNTER */ - __O uint32_t TASKS_CLEAR; /*!< Clear RTC COUNTER */ - __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFF0 */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */ - __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */ - __I uint32_t RESERVED1[14]; - __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[0]: Compare event on CC[0] match */ - __I uint32_t RESERVED2[109]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[13]; - __IO uint32_t EVTEN; /*!< Enable or disable event routing */ - __IO uint32_t EVTENSET; /*!< Enable event routing */ - __IO uint32_t EVTENCLR; /*!< Disable event routing */ - __I uint32_t RESERVED4[110]; - __I uint32_t COUNTER; /*!< Current COUNTER value */ - __IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must - be written when RTC is stopped */ - __I uint32_t RESERVED5[13]; - __IO uint32_t CC[4]; /*!< Description collection[0]: Compare register 0 */ -} NRF_RTC_Type; - - -/* ================================================================================ */ -/* ================ TEMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Temperature Sensor (TEMP) - */ - -typedef struct { /*!< TEMP Structure */ - __O uint32_t TASKS_START; /*!< Start temperature measurement */ - __O uint32_t TASKS_STOP; /*!< Stop temperature measurement */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready */ - __I uint32_t RESERVED1[128]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[127]; - __I int32_t TEMP; /*!< Temperature in degC (0.25deg steps) */ - __I uint32_t RESERVED3[5]; - __IO uint32_t A0; /*!< Slope of 1st piece wise linear function */ - __IO uint32_t A1; /*!< Slope of 2nd piece wise linear function */ - __IO uint32_t A2; /*!< Slope of 3rd piece wise linear function */ - __IO uint32_t A3; /*!< Slope of 4th piece wise linear function */ - __IO uint32_t A4; /*!< Slope of 5th piece wise linear function */ - __IO uint32_t A5; /*!< Slope of 6th piece wise linear function */ - __I uint32_t RESERVED4[2]; - __IO uint32_t B0; /*!< y-intercept of 1st piece wise linear function */ - __IO uint32_t B1; /*!< y-intercept of 2nd piece wise linear function */ - __IO uint32_t B2; /*!< y-intercept of 3rd piece wise linear function */ - __IO uint32_t B3; /*!< y-intercept of 4th piece wise linear function */ - __IO uint32_t B4; /*!< y-intercept of 5th piece wise linear function */ - __IO uint32_t B5; /*!< y-intercept of 6th piece wise linear function */ - __I uint32_t RESERVED5[2]; - __IO uint32_t T0; /*!< End point of 1st piece wise linear function */ - __IO uint32_t T1; /*!< End point of 2nd piece wise linear function */ - __IO uint32_t T2; /*!< End point of 3rd piece wise linear function */ - __IO uint32_t T3; /*!< End point of 4th piece wise linear function */ - __IO uint32_t T4; /*!< End point of 5th piece wise linear function */ -} NRF_TEMP_Type; - - -/* ================================================================================ */ -/* ================ RNG ================ */ -/* ================================================================================ */ - - -/** - * @brief Random Number Generator (RNG) - */ - -typedef struct { /*!< RNG Structure */ - __O uint32_t TASKS_START; /*!< Task starting the random number generator */ - __O uint32_t TASKS_STOP; /*!< Task stopping the random number generator */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_VALRDY; /*!< Event being generated for every new random number written to - the VALUE register */ - __I uint32_t RESERVED1[63]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[126]; - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t VALUE; /*!< Output random number */ -} NRF_RNG_Type; - - -/* ================================================================================ */ -/* ================ ECB ================ */ -/* ================================================================================ */ - - -/** - * @brief AES ECB Mode Encryption (ECB) - */ - -typedef struct { /*!< ECB Structure */ - __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt */ - __O uint32_t TASKS_STOPECB; /*!< Abort a possible executing ECB operation */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete */ - __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted because of a STOPECB task or due to - an error */ - __I uint32_t RESERVED1[127]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[126]; - __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointers */ -} NRF_ECB_Type; - - -/* ================================================================================ */ -/* ================ CCM ================ */ -/* ================================================================================ */ - - -/** - * @brief AES CCM Mode Encryption (CCM) - */ - -typedef struct { /*!< CCM Structure */ - __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by - itself when completed. */ - __O uint32_t TASKS_CRYPT; /*!< Start encryption/decryption. This operation will stop by itself - when completed. */ - __O uint32_t TASKS_STOP; /*!< Stop encryption/decryption */ - __I uint32_t RESERVED0[61]; - __IO uint32_t EVENTS_ENDKSGEN; /*!< Key-stream generation complete */ - __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt complete */ - __IO uint32_t EVENTS_ERROR; /*!< CCM error event */ - __I uint32_t RESERVED1[61]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t MICSTATUS; /*!< MIC check result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable */ - __IO uint32_t MODE; /*!< Operation mode */ - __IO uint32_t CNFPTR; /*!< Pointer to data structure holding AES key and NONCE vector */ - __IO uint32_t INPTR; /*!< Input pointer */ - __IO uint32_t OUTPTR; /*!< Output pointer */ - __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ -} NRF_CCM_Type; - - -/* ================================================================================ */ -/* ================ AAR ================ */ -/* ================================================================================ */ - - -/** - * @brief Accelerated Address Resolver (AAR) - */ - -typedef struct { /*!< AAR Structure */ - __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK - data structure */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */ - __I uint32_t RESERVED1[61]; - __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */ - __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */ - __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */ - __I uint32_t RESERVED2[126]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t STATUS; /*!< Resolution status */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable AAR */ - __IO uint32_t NIRK; /*!< Number of IRKs */ - __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */ - __I uint32_t RESERVED5; - __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */ - __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ -} NRF_AAR_Type; - - -/* ================================================================================ */ -/* ================ WDT ================ */ -/* ================================================================================ */ - - -/** - * @brief Watchdog Timer (WDT) - */ - -typedef struct { /*!< WDT Structure */ - __O uint32_t TASKS_START; /*!< Start the watchdog */ - __I uint32_t RESERVED0[63]; - __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout */ - __I uint32_t RESERVED1[128]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[61]; - __I uint32_t RUNSTATUS; /*!< Run status */ - __I uint32_t REQSTATUS; /*!< Request status */ - __I uint32_t RESERVED3[63]; - __IO uint32_t CRV; /*!< Counter reload value */ - __IO uint32_t RREN; /*!< Enable register for reload request registers */ - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED4[60]; - __O uint32_t RR[8]; /*!< Description collection[0]: Reload request 0 */ -} NRF_WDT_Type; - - -/* ================================================================================ */ -/* ================ QDEC ================ */ -/* ================================================================================ */ - - -/** - * @brief Quadrature Decoder (QDEC) - */ - -typedef struct { /*!< QDEC Structure */ - __O uint32_t TASKS_START; /*!< Task starting the quadrature decoder */ - __O uint32_t TASKS_STOP; /*!< Task stopping the quadrature decoder */ - __O uint32_t TASKS_READCLRACC; /*!< Read and clear ACC and ACCDBL */ - __O uint32_t TASKS_RDCLRACC; /*!< Read and clear ACC */ - __O uint32_t TASKS_RDCLRDBL; /*!< Read and clear ACCDBL */ - __I uint32_t RESERVED0[59]; - __IO uint32_t EVENTS_SAMPLERDY; /*!< Event being generated for every new sample value written to - the SAMPLE register */ - __IO uint32_t EVENTS_REPORTRDY; /*!< Non-null report ready */ - __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow */ - __IO uint32_t EVENTS_DBLRDY; /*!< Double displacement(s) detected */ - __IO uint32_t EVENTS_STOPPED; /*!< QDEC has been stopped */ - __I uint32_t RESERVED1[59]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[125]; - __IO uint32_t ENABLE; /*!< Enable the quadrature decoder */ - __IO uint32_t LEDPOL; /*!< LED output pin polarity */ - __IO uint32_t SAMPLEPER; /*!< Sample period */ - __I int32_t SAMPLE; /*!< Motion sample value */ - __IO uint32_t REPORTPER; /*!< Number of samples to be taken before REPORTRDY and DBLRDY events - can be generated */ - __I int32_t ACC; /*!< Register accumulating the valid transitions */ - __I int32_t ACCREAD; /*!< Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC - task */ - QDEC_PSEL_Type PSEL; /*!< Unspecified */ - __IO uint32_t DBFEN; /*!< Enable input debounce filters */ - __I uint32_t RESERVED4[5]; - __IO uint32_t LEDPRE; /*!< Time period the LED is switched ON prior to sampling */ - __I uint32_t ACCDBL; /*!< Register accumulating the number of detected double transitions */ - __I uint32_t ACCDBLREAD; /*!< Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL - task */ -} NRF_QDEC_Type; - - -/* ================================================================================ */ -/* ================ COMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Comparator (COMP) - */ - -typedef struct { /*!< COMP Structure */ - __O uint32_t TASKS_START; /*!< Start comparator */ - __O uint32_t TASKS_STOP; /*!< Stop comparator */ - __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ - __I uint32_t RESERVED0[61]; - __IO uint32_t EVENTS_READY; /*!< COMP is ready and output is valid */ - __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ - __IO uint32_t EVENTS_UP; /*!< Upward crossing */ - __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ - __I uint32_t RESERVED1[60]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t RESULT; /*!< Compare result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< COMP enable */ - __IO uint32_t PSEL; /*!< Pin select */ - __IO uint32_t REFSEL; /*!< Reference source select */ - __IO uint32_t EXTREFSEL; /*!< External reference select */ - __I uint32_t RESERVED5[8]; - __IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */ - __IO uint32_t MODE; /*!< Mode configuration */ - __IO uint32_t HYST; /*!< Comparator hysteresis enable */ - __IO uint32_t ISOURCE; /*!< Current source select on analog input */ -} NRF_COMP_Type; - - -/* ================================================================================ */ -/* ================ LPCOMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Low Power Comparator (LPCOMP) - */ - -typedef struct { /*!< LPCOMP Structure */ - __O uint32_t TASKS_START; /*!< Start comparator */ - __O uint32_t TASKS_STOP; /*!< Stop comparator */ - __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ - __I uint32_t RESERVED0[61]; - __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid */ - __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ - __IO uint32_t EVENTS_UP; /*!< Upward crossing */ - __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ - __I uint32_t RESERVED1[60]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t RESULT; /*!< Compare result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable LPCOMP */ - __IO uint32_t PSEL; /*!< Input pin select */ - __IO uint32_t REFSEL; /*!< Reference select */ - __IO uint32_t EXTREFSEL; /*!< External reference select */ - __I uint32_t RESERVED5[4]; - __IO uint32_t ANADETECT; /*!< Analog detect configuration */ - __I uint32_t RESERVED6[5]; - __IO uint32_t HYST; /*!< Comparator hysteresis enable */ -} NRF_LPCOMP_Type; - - -/* ================================================================================ */ -/* ================ SWI ================ */ -/* ================================================================================ */ - - -/** - * @brief Software interrupt 0 (SWI) - */ - -typedef struct { /*!< SWI Structure */ - __I uint32_t UNUSED; /*!< Unused. */ -} NRF_SWI_Type; - - -/* ================================================================================ */ -/* ================ EGU ================ */ -/* ================================================================================ */ - - -/** - * @brief Event Generator Unit 0 (EGU) - */ - -typedef struct { /*!< EGU Structure */ - __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[0]: Trigger 0 for triggering the corresponding - TRIGGERED[0] event */ - __I uint32_t RESERVED0[48]; - __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[0]: Event number 0 generated by triggering - the corresponding TRIGGER[0] task */ - __I uint32_t RESERVED1[112]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ -} NRF_EGU_Type; - - -/* ================================================================================ */ -/* ================ PWM ================ */ -/* ================================================================================ */ - - -/** - * @brief Pulse Width Modulation Unit 0 (PWM) - */ - -typedef struct { /*!< PWM Structure */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current - PWM period, and stops sequence playback */ - __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all - enabled channels from sequence 0, and starts playing that sequence - at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes - PWM generation to start it was not running. */ - __O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels - if DECODER.MODE=NextStep. Does not cause PWM generation to start - it was not running. */ - __I uint32_t RESERVED1[60]; - __IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer - generated */ - __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[0]: First PWM period started on sequence - 0 */ - __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[0]: Emitted at end of every sequence - 0, when last value from RAM has been applied to wave counter */ - __IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */ - __IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times - defined in LOOP.CNT */ - __I uint32_t RESERVED2[56]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED3[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[125]; - __IO uint32_t ENABLE; /*!< PWM module enable register */ - __IO uint32_t MODE; /*!< Selects operating mode of the wave counter */ - __IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */ - __IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */ - __IO uint32_t DECODER; /*!< Configuration of the decoder */ - __IO uint32_t LOOP; /*!< Amount of playback of a loop */ - __I uint32_t RESERVED5[2]; - PWM_SEQ_Type SEQ[2]; /*!< Unspecified */ - PWM_PSEL_Type PSEL; /*!< Unspecified */ -} NRF_PWM_Type; - - -/* ================================================================================ */ -/* ================ PDM ================ */ -/* ================================================================================ */ - - -/** - * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM) - */ - -typedef struct { /*!< PDM Structure */ - __O uint32_t TASKS_START; /*!< Starts continuous PDM transfer */ - __O uint32_t TASKS_STOP; /*!< Stops PDM transfer */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_STARTED; /*!< PDM transfer has started */ - __IO uint32_t EVENTS_STOPPED; /*!< PDM transfer has finished */ - __IO uint32_t EVENTS_END; /*!< The PDM has written the last sample specified by SAMPLE.MAXCNT - (or the last sample after a STOP task has been received) to - Data RAM */ - __I uint32_t RESERVED1[125]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[125]; - __IO uint32_t ENABLE; /*!< PDM module enable register */ - __IO uint32_t PDMCLKCTRL; /*!< PDM clock generator control */ - __IO uint32_t MODE; /*!< Defines the routing of the connected PDM microphones' signals */ - __I uint32_t RESERVED3[3]; - __IO uint32_t GAINL; /*!< Left output gain adjustment */ - __IO uint32_t GAINR; /*!< Right output gain adjustment */ - __I uint32_t RESERVED4[8]; - PDM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED5[6]; - PDM_SAMPLE_Type SAMPLE; /*!< Unspecified */ -} NRF_PDM_Type; - - -/* ================================================================================ */ -/* ================ NVMC ================ */ -/* ================================================================================ */ - - -/** - * @brief Non Volatile Memory Controller (NVMC) - */ - -typedef struct { /*!< NVMC Structure */ - __I uint32_t RESERVED0[256]; - __I uint32_t READY; /*!< Ready flag */ - __I uint32_t RESERVED1[64]; - __IO uint32_t CONFIG; /*!< Configuration register */ - - union { - __IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in Code area. - Equivalent to ERASEPAGE. */ - __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in Code area */ - }; - __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */ - __IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in Code area. - Equivalent to ERASEPAGE. */ - __IO uint32_t ERASEUICR; /*!< Register for erasing User Information Configuration Registers */ - __I uint32_t RESERVED2[10]; - __IO uint32_t ICACHECNF; /*!< I-Code cache configuration register. */ - __I uint32_t RESERVED3; - __IO uint32_t IHIT; /*!< I-Code cache hit counter. */ - __IO uint32_t IMISS; /*!< I-Code cache miss counter. */ -} NRF_NVMC_Type; - - -/* ================================================================================ */ -/* ================ PPI ================ */ -/* ================================================================================ */ - - -/** - * @brief Programmable Peripheral Interconnect (PPI) - */ - -typedef struct { /*!< PPI Structure */ - PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< Channel group tasks */ - __I uint32_t RESERVED0[308]; - __IO uint32_t CHEN; /*!< Channel enable register */ - __IO uint32_t CHENSET; /*!< Channel enable set register */ - __IO uint32_t CHENCLR; /*!< Channel enable clear register */ - __I uint32_t RESERVED1; - PPI_CH_Type CH[20]; /*!< PPI Channel */ - __I uint32_t RESERVED2[148]; - __IO uint32_t CHG[6]; /*!< Description collection[0]: Channel group 0 */ - __I uint32_t RESERVED3[62]; - PPI_FORK_Type FORK[32]; /*!< Fork */ -} NRF_PPI_Type; - - -/* ================================================================================ */ -/* ================ MWU ================ */ -/* ================================================================================ */ - - -/** - * @brief Memory Watch Unit (MWU) - */ - -typedef struct { /*!< MWU Structure */ - __I uint32_t RESERVED0[64]; - MWU_EVENTS_REGION_Type EVENTS_REGION[4]; /*!< Unspecified */ - __I uint32_t RESERVED1[16]; - MWU_EVENTS_PREGION_Type EVENTS_PREGION[2]; /*!< Unspecified */ - __I uint32_t RESERVED2[100]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[5]; - __IO uint32_t NMIEN; /*!< Enable or disable non-maskable interrupt */ - __IO uint32_t NMIENSET; /*!< Enable non-maskable interrupt */ - __IO uint32_t NMIENCLR; /*!< Disable non-maskable interrupt */ - __I uint32_t RESERVED4[53]; - MWU_PERREGION_Type PERREGION[2]; /*!< Unspecified */ - __I uint32_t RESERVED5[64]; - __IO uint32_t REGIONEN; /*!< Enable/disable regions watch */ - __IO uint32_t REGIONENSET; /*!< Enable regions watch */ - __IO uint32_t REGIONENCLR; /*!< Disable regions watch */ - __I uint32_t RESERVED6[57]; - MWU_REGION_Type REGION[4]; /*!< Unspecified */ - __I uint32_t RESERVED7[32]; - MWU_PREGION_Type PREGION[2]; /*!< Unspecified */ -} NRF_MWU_Type; - - -/* ================================================================================ */ -/* ================ I2S ================ */ -/* ================================================================================ */ - - -/** - * @brief Inter-IC Sound (I2S) - */ - -typedef struct { /*!< I2S Structure */ - __O uint32_t TASKS_START; /*!< Starts continuous I2S transfer. Also starts MCK generator when - this is enabled. */ - __O uint32_t TASKS_STOP; /*!< Stops I2S transfer. Also stops MCK generator. Triggering this - task will cause the {event:STOPPED} event to be generated. */ - __I uint32_t RESERVED0[63]; - __IO uint32_t EVENTS_RXPTRUPD; /*!< The RXD.PTR register has been copied to internal double-buffers. - When the I2S module is started and RX is enabled, this event - will be generated for every RXTXD.MAXCNT words that are received - on the SDIN pin. */ - __IO uint32_t EVENTS_STOPPED; /*!< I2S transfer stopped. */ - __I uint32_t RESERVED1[2]; - __IO uint32_t EVENTS_TXPTRUPD; /*!< The TDX.PTR register has been copied to internal double-buffers. - When the I2S module is started and TX is enabled, this event - will be generated for every RXTXD.MAXCNT words that are sent - on the SDOUT pin. */ - __I uint32_t RESERVED2[122]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[125]; - __IO uint32_t ENABLE; /*!< Enable I2S module. */ - I2S_CONFIG_Type CONFIG; /*!< Unspecified */ - __I uint32_t RESERVED4[3]; - I2S_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED5; - I2S_TXD_Type TXD; /*!< Unspecified */ - __I uint32_t RESERVED6[3]; - I2S_RXTXD_Type RXTXD; /*!< Unspecified */ - __I uint32_t RESERVED7[3]; - I2S_PSEL_Type PSEL; /*!< Unspecified */ -} NRF_I2S_Type; - - -/* ================================================================================ */ -/* ================ FPU ================ */ -/* ================================================================================ */ - - -/** - * @brief FPU (FPU) - */ - -typedef struct { /*!< FPU Structure */ - __I uint32_t UNUSED; /*!< Unused. */ -} NRF_FPU_Type; - - -/* ================================================================================ */ -/* ================ GPIO ================ */ -/* ================================================================================ */ - - -/** - * @brief GPIO Port 1 (GPIO) - */ - -typedef struct { /*!< GPIO Structure */ - __I uint32_t RESERVED0[321]; - __IO uint32_t OUT; /*!< Write GPIO port */ - __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port */ - __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port */ - __I uint32_t IN; /*!< Read GPIO port */ - __IO uint32_t DIR; /*!< Direction of GPIO pins */ - __IO uint32_t DIRSET; /*!< DIR set register */ - __IO uint32_t DIRCLR; /*!< DIR clear register */ - __IO uint32_t LATCH; /*!< Latch register indicating what GPIO pins that have met the criteria - set in the PIN_CNF[n].SENSE registers */ - __IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */ - __I uint32_t RESERVED1[118]; - __IO uint32_t PIN_CNF[32]; /*!< Description collection[0]: Configuration of GPIO pins */ -} NRF_GPIO_Type; - - -/* -------------------- End of section using anonymous unions ------------------- */ -#if defined(__CC_ARM) - #pragma pop -#elif defined(__ICCARM__) - /* leave anonymous unions enabled */ -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) - /* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning restore -#else - #warning Not supported compiler type -#endif - - - - -/* ================================================================================ */ -/* ================ Peripheral memory map ================ */ -/* ================================================================================ */ - -#define NRF_FICR_BASE 0x10000000UL -#define NRF_UICR_BASE 0x10001000UL -#define NRF_BPROT_BASE 0x40000000UL -#define NRF_POWER_BASE 0x40000000UL -#define NRF_CLOCK_BASE 0x40000000UL -#define NRF_RADIO_BASE 0x40001000UL -#define NRF_UARTE0_BASE 0x40002000UL -#define NRF_UART0_BASE 0x40002000UL -#define NRF_SPIM0_BASE 0x40003000UL -#define NRF_SPIS0_BASE 0x40003000UL -#define NRF_TWIM0_BASE 0x40003000UL -#define NRF_TWIS0_BASE 0x40003000UL -#define NRF_SPI0_BASE 0x40003000UL -#define NRF_TWI0_BASE 0x40003000UL -#define NRF_SPIM1_BASE 0x40004000UL -#define NRF_SPIS1_BASE 0x40004000UL -#define NRF_TWIM1_BASE 0x40004000UL -#define NRF_TWIS1_BASE 0x40004000UL -#define NRF_SPI1_BASE 0x40004000UL -#define NRF_TWI1_BASE 0x40004000UL -#define NRF_NFCT_BASE 0x40005000UL -#define NRF_GPIOTE_BASE 0x40006000UL -#define NRF_SAADC_BASE 0x40007000UL -#define NRF_TIMER0_BASE 0x40008000UL -#define NRF_TIMER1_BASE 0x40009000UL -#define NRF_TIMER2_BASE 0x4000A000UL -#define NRF_RTC0_BASE 0x4000B000UL -#define NRF_TEMP_BASE 0x4000C000UL -#define NRF_RNG_BASE 0x4000D000UL -#define NRF_ECB_BASE 0x4000E000UL -#define NRF_CCM_BASE 0x4000F000UL -#define NRF_AAR_BASE 0x4000F000UL -#define NRF_WDT_BASE 0x40010000UL -#define NRF_RTC1_BASE 0x40011000UL -#define NRF_QDEC_BASE 0x40012000UL -#define NRF_COMP_BASE 0x40013000UL -#define NRF_LPCOMP_BASE 0x40013000UL -#define NRF_SWI0_BASE 0x40014000UL -#define NRF_EGU0_BASE 0x40014000UL -#define NRF_SWI1_BASE 0x40015000UL -#define NRF_EGU1_BASE 0x40015000UL -#define NRF_SWI2_BASE 0x40016000UL -#define NRF_EGU2_BASE 0x40016000UL -#define NRF_SWI3_BASE 0x40017000UL -#define NRF_EGU3_BASE 0x40017000UL -#define NRF_SWI4_BASE 0x40018000UL -#define NRF_EGU4_BASE 0x40018000UL -#define NRF_SWI5_BASE 0x40019000UL -#define NRF_EGU5_BASE 0x40019000UL -#define NRF_TIMER3_BASE 0x4001A000UL -#define NRF_TIMER4_BASE 0x4001B000UL -#define NRF_PWM0_BASE 0x4001C000UL -#define NRF_PDM_BASE 0x4001D000UL -#define NRF_NVMC_BASE 0x4001E000UL -#define NRF_PPI_BASE 0x4001F000UL -#define NRF_MWU_BASE 0x40020000UL -#define NRF_PWM1_BASE 0x40021000UL -#define NRF_PWM2_BASE 0x40022000UL -#define NRF_SPIM2_BASE 0x40023000UL -#define NRF_SPIS2_BASE 0x40023000UL -#define NRF_SPI2_BASE 0x40023000UL -#define NRF_RTC2_BASE 0x40024000UL -#define NRF_I2S_BASE 0x40025000UL -#define NRF_FPU_BASE 0x40026000UL -#define NRF_P0_BASE 0x50000000UL - - -/* ================================================================================ */ -/* ================ Peripheral declaration ================ */ -/* ================================================================================ */ - -#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) -#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) -#define NRF_BPROT ((NRF_BPROT_Type *) NRF_BPROT_BASE) -#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) -#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) -#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) -#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) -#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) -#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE) -#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE) -#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE) -#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE) -#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE) -#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE) -#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE) -#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE) -#define NRF_TWIM1 ((NRF_TWIM_Type *) NRF_TWIM1_BASE) -#define NRF_TWIS1 ((NRF_TWIS_Type *) NRF_TWIS1_BASE) -#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE) -#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE) -#define NRF_NFCT ((NRF_NFCT_Type *) NRF_NFCT_BASE) -#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) -#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE) -#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) -#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) -#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) -#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) -#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) -#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) -#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) -#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) -#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) -#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) -#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) -#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) -#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE) -#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE) -#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE) -#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE) -#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE) -#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE) -#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE) -#define NRF_EGU2 ((NRF_EGU_Type *) NRF_EGU2_BASE) -#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE) -#define NRF_EGU3 ((NRF_EGU_Type *) NRF_EGU3_BASE) -#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE) -#define NRF_EGU4 ((NRF_EGU_Type *) NRF_EGU4_BASE) -#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE) -#define NRF_EGU5 ((NRF_EGU_Type *) NRF_EGU5_BASE) -#define NRF_TIMER3 ((NRF_TIMER_Type *) NRF_TIMER3_BASE) -#define NRF_TIMER4 ((NRF_TIMER_Type *) NRF_TIMER4_BASE) -#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE) -#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE) -#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) -#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) -#define NRF_MWU ((NRF_MWU_Type *) NRF_MWU_BASE) -#define NRF_PWM1 ((NRF_PWM_Type *) NRF_PWM1_BASE) -#define NRF_PWM2 ((NRF_PWM_Type *) NRF_PWM2_BASE) -#define NRF_SPIM2 ((NRF_SPIM_Type *) NRF_SPIM2_BASE) -#define NRF_SPIS2 ((NRF_SPIS_Type *) NRF_SPIS2_BASE) -#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE) -#define NRF_RTC2 ((NRF_RTC_Type *) NRF_RTC2_BASE) -#define NRF_I2S ((NRF_I2S_Type *) NRF_I2S_BASE) -#define NRF_FPU ((NRF_FPU_Type *) NRF_FPU_BASE) -#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE) - - -/** @} */ /* End of group Device_Peripheral_Registers */ -/** @} */ /* End of group nrf52 */ -/** @} */ /* End of group Nordic Semiconductor */ - -#ifdef __cplusplus -} -#endif - - -#endif /* nrf52_H */ - diff --git a/ports/nrf/device/nrf52/nrf52840.h b/ports/nrf/device/nrf52/nrf52840.h deleted file mode 100644 index 92a40f4c08922..0000000000000 --- a/ports/nrf/device/nrf52/nrf52840.h +++ /dev/null @@ -1,2417 +0,0 @@ - -/****************************************************************************************************//** - * @file nrf52840.h - * - * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for - * nrf52840 from Nordic Semiconductor. - * - * @version V1 - * @date 18. November 2016 - * - * @note Generated with SVDConv V2.81d - * from CMSIS SVD File 'nrf52840.svd' Version 1, - * - * @par Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * - *******************************************************************************************************/ - - - -/** @addtogroup Nordic Semiconductor - * @{ - */ - -/** @addtogroup nrf52840 - * @{ - */ - -#ifndef NRF52840_H -#define NRF52840_H - -#ifdef __cplusplus -extern "C" { -#endif - - -/* ------------------------- Interrupt Number Definition ------------------------ */ - -typedef enum { -/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ - Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ - NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ - HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ - MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation - and No Match */ - BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory - related Fault */ - UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ - SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ - DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ - PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ - SysTick_IRQn = -1, /*!< 15 System Tick Timer */ -/* --------------------- nrf52840 Specific Interrupt Numbers -------------------- */ - POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ - RADIO_IRQn = 1, /*!< 1 RADIO */ - UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */ - SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */ - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */ - NFCT_IRQn = 5, /*!< 5 NFCT */ - GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ - SAADC_IRQn = 7, /*!< 7 SAADC */ - TIMER0_IRQn = 8, /*!< 8 TIMER0 */ - TIMER1_IRQn = 9, /*!< 9 TIMER1 */ - TIMER2_IRQn = 10, /*!< 10 TIMER2 */ - RTC0_IRQn = 11, /*!< 11 RTC0 */ - TEMP_IRQn = 12, /*!< 12 TEMP */ - RNG_IRQn = 13, /*!< 13 RNG */ - ECB_IRQn = 14, /*!< 14 ECB */ - CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ - WDT_IRQn = 16, /*!< 16 WDT */ - RTC1_IRQn = 17, /*!< 17 RTC1 */ - QDEC_IRQn = 18, /*!< 18 QDEC */ - COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */ - SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */ - SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */ - SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */ - SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */ - SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */ - SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */ - TIMER3_IRQn = 26, /*!< 26 TIMER3 */ - TIMER4_IRQn = 27, /*!< 27 TIMER4 */ - PWM0_IRQn = 28, /*!< 28 PWM0 */ - PDM_IRQn = 29, /*!< 29 PDM */ - MWU_IRQn = 32, /*!< 32 MWU */ - PWM1_IRQn = 33, /*!< 33 PWM1 */ - PWM2_IRQn = 34, /*!< 34 PWM2 */ - SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */ - RTC2_IRQn = 36, /*!< 36 RTC2 */ - I2S_IRQn = 37, /*!< 37 I2S */ - FPU_IRQn = 38, /*!< 38 FPU */ - USBD_IRQn = 39, /*!< 39 USBD */ - UARTE1_IRQn = 40, /*!< 40 UARTE1 */ - QSPI_IRQn = 41, /*!< 41 QSPI */ - CRYPTOCELL_IRQn = 42, /*!< 42 CRYPTOCELL */ - SPIM3_IRQn = 43, /*!< 43 SPIM3 */ - PWM3_IRQn = 45 /*!< 45 PWM3 */ -} IRQn_Type; - - -/** @addtogroup Configuration_of_CMSIS - * @{ - */ - - -/* ================================================================================ */ -/* ================ Processor and Core Peripheral Section ================ */ -/* ================================================================================ */ - -/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present or not */ -/** @} */ /* End of group Configuration_of_CMSIS */ - -#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ -#include "system_nrf52840.h" /*!< nrf52840 System */ - - -/* ================================================================================ */ -/* ================ Device Specific Peripheral Section ================ */ -/* ================================================================================ */ - - -/** @addtogroup Device_Peripheral_Registers - * @{ - */ - - -/* ------------------- Start of section using anonymous unions ------------------ */ -#if defined(__CC_ARM) - #pragma push - #pragma anon_unions -#elif defined(__ICCARM__) - #pragma language=extended -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) -/* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning 586 -#else - #warning Not supported compiler type -#endif - - -typedef struct { - __I uint32_t PART; /*!< Part code */ - __I uint32_t VARIANT; /*!< Part variant (hardware version and production configuration). */ - __I uint32_t PACKAGE; /*!< Package option */ - __I uint32_t RAM; /*!< RAM variant */ - __I uint32_t FLASH; /*!< Flash variant */ - __IO uint32_t UNUSED0[3]; /*!< Description collection[0]: Unspecified */ -} FICR_INFO_Type; - -typedef struct { - __I uint32_t A0; /*!< Slope definition A0. */ - __I uint32_t A1; /*!< Slope definition A1. */ - __I uint32_t A2; /*!< Slope definition A2. */ - __I uint32_t A3; /*!< Slope definition A3. */ - __I uint32_t A4; /*!< Slope definition A4. */ - __I uint32_t A5; /*!< Slope definition A5. */ - __I uint32_t B0; /*!< y-intercept B0. */ - __I uint32_t B1; /*!< y-intercept B1. */ - __I uint32_t B2; /*!< y-intercept B2. */ - __I uint32_t B3; /*!< y-intercept B3. */ - __I uint32_t B4; /*!< y-intercept B4. */ - __I uint32_t B5; /*!< y-intercept B5. */ - __I uint32_t T0; /*!< Segment end T0. */ - __I uint32_t T1; /*!< Segment end T1. */ - __I uint32_t T2; /*!< Segment end T2. */ - __I uint32_t T3; /*!< Segment end T3. */ - __I uint32_t T4; /*!< Segment end T4. */ -} FICR_TEMP_Type; - -typedef struct { - __I uint32_t TAGHEADER0; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER1; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER2; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - __I uint32_t TAGHEADER3; /*!< Default header for NFC Tag. Software can read these values to - populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ -} FICR_NFC_Type; - -typedef struct { - __IO uint32_t POWER; /*!< Description cluster[0]: RAM0 power control register */ - __O uint32_t POWERSET; /*!< Description cluster[0]: RAM0 power control set register */ - __O uint32_t POWERCLR; /*!< Description cluster[0]: RAM0 power control clear register */ - __I uint32_t RESERVED0; -} POWER_RAM_Type; - -typedef struct { - __IO uint32_t RTS; /*!< Pin select for RTS signal */ - __IO uint32_t TXD; /*!< Pin select for TXD signal */ - __IO uint32_t CTS; /*!< Pin select for CTS signal */ - __IO uint32_t RXD; /*!< Pin select for RXD signal */ -} UARTE_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} UARTE_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} UARTE_TXD_Type; - -typedef struct { - __IO uint32_t RTS; /*!< Pin select for RTS */ - __IO uint32_t TXD; /*!< Pin select for TXD */ - __IO uint32_t CTS; /*!< Pin select for CTS */ - __IO uint32_t RXD; /*!< Pin select for RXD */ -} UART_PSEL_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ - __IO uint32_t MISO; /*!< Pin select for MISO signal */ - __IO uint32_t CSN; /*!< Pin select for CSN */ -} SPIM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} SPIM_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} SPIM_TXD_Type; - -typedef struct { - __IO uint32_t RXDELAY; /*!< Sample delay for input serial data on MISO */ - __IO uint32_t CSNDUR; /*!< Minimum duration between edge of CSN and edge of SCK and minimum - duration CSN must stay high between transactions */ -} SPIM_IFTIMING_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MISO; /*!< Pin select for MISO signal */ - __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ - __IO uint32_t CSN; /*!< Pin select for CSN signal */ -} SPIS_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RXD data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes received in last granted transaction */ -} SPIS_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< TXD data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */ -} SPIS_TXD_Type; - -typedef struct { - __IO uint32_t SCL; /*!< Pin select for SCL signal */ - __IO uint32_t SDA; /*!< Pin select for SDA signal */ -} TWIM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} TWIM_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ - __IO uint32_t LIST; /*!< EasyDMA list type */ -} TWIM_TXD_Type; - -typedef struct { - __IO uint32_t SCL; /*!< Pin select for SCL signal */ - __IO uint32_t SDA; /*!< Pin select for SDA signal */ -} TWIS_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RXD Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in RXD buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last RXD transaction */ -} TWIS_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< TXD Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes in TXD buffer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */ -} TWIS_TXD_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for SCK */ - __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ - __IO uint32_t MISO; /*!< Pin select for MISO signal */ -} SPI_PSEL_Type; - -typedef struct { - __IO uint32_t SCL; /*!< Pin select for SCL */ - __IO uint32_t SDA; /*!< Pin select for SDA */ -} TWI_PSEL_Type; - -typedef struct { - __IO uint32_t RX; /*!< Result of last incoming frame */ -} NFCT_FRAMESTATUS_Type; - -typedef struct { - __IO uint32_t FRAMECONFIG; /*!< Configuration of outgoing frames */ - __IO uint32_t AMOUNT; /*!< Size of outgoing frame */ -} NFCT_TXD_Type; - -typedef struct { - __IO uint32_t FRAMECONFIG; /*!< Configuration of incoming frames */ - __I uint32_t AMOUNT; /*!< Size of last incoming frame */ -} NFCT_RXD_Type; - -typedef struct { - __IO uint32_t LIMITH; /*!< Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */ - __IO uint32_t LIMITL; /*!< Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */ -} SAADC_EVENTS_CH_Type; - -typedef struct { - __IO uint32_t PSELP; /*!< Description cluster[0]: Input positive pin selection for CH[0] */ - __IO uint32_t PSELN; /*!< Description cluster[0]: Input negative pin selection for CH[0] */ - __IO uint32_t CONFIG; /*!< Description cluster[0]: Input configuration for CH[0] */ - __IO uint32_t LIMIT; /*!< Description cluster[0]: High/low limits for event monitoring - a channel */ -} SAADC_CH_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of buffer words to transfer */ - __I uint32_t AMOUNT; /*!< Number of buffer words transferred since last START */ -} SAADC_RESULT_Type; - -typedef struct { - __IO uint32_t LED; /*!< Pin select for LED signal */ - __IO uint32_t A; /*!< Pin select for A signal */ - __IO uint32_t B; /*!< Pin select for B signal */ -} QDEC_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of sequence - A */ - __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in sequence - A */ - __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between - samples loaded to compare register (load every CNT+1 PWM periods) */ - __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */ - __I uint32_t RESERVED1[4]; -} PWM_SEQ_Type; - -typedef struct { - __IO uint32_t OUT[4]; /*!< Description collection[0]: Output pin select for PWM channel - 0 */ -} PWM_PSEL_Type; - -typedef struct { - __IO uint32_t CLK; /*!< Pin number configuration for PDM CLK signal */ - __IO uint32_t DIN; /*!< Pin number configuration for PDM DIN signal */ -} PDM_PSEL_Type; - -typedef struct { - __IO uint32_t PTR; /*!< RAM address pointer to write samples to with EasyDMA */ - __IO uint32_t MAXCNT; /*!< Number of samples to allocate memory for in EasyDMA mode */ -} PDM_SAMPLE_Type; - -typedef struct { - __IO uint32_t ADDR; /*!< Description cluster[0]: Configure the word-aligned start address - of region 0 to protect */ - __IO uint32_t SIZE; /*!< Description cluster[0]: Size of region to protect counting from - address ACL[0].ADDR. Write '0' as no effect. */ - __IO uint32_t PERM; /*!< Description cluster[0]: Access permissions for region 0 as defined - by start address ACL[0].ADDR and size ACL[0].SIZE */ - __IO uint32_t UNUSED0; /*!< Unspecified */ -} ACL_ACL_Type; - -typedef struct { - __O uint32_t EN; /*!< Description cluster[0]: Enable channel group 0 */ - __O uint32_t DIS; /*!< Description cluster[0]: Disable channel group 0 */ -} PPI_TASKS_CHG_Type; - -typedef struct { - __IO uint32_t EEP; /*!< Description cluster[0]: Channel 0 event end-point */ - __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ -} PPI_CH_Type; - -typedef struct { - __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ -} PPI_FORK_Type; - -typedef struct { - __IO uint32_t WA; /*!< Description cluster[0]: Write access to region 0 detected */ - __IO uint32_t RA; /*!< Description cluster[0]: Read access to region 0 detected */ -} MWU_EVENTS_REGION_Type; - -typedef struct { - __IO uint32_t WA; /*!< Description cluster[0]: Write access to peripheral region 0 - detected */ - __IO uint32_t RA; /*!< Description cluster[0]: Read access to peripheral region 0 detected */ -} MWU_EVENTS_PREGION_Type; - -typedef struct { - __IO uint32_t SUBSTATWA; /*!< Description cluster[0]: Source of event/interrupt in region - 0, write access detected while corresponding subregion was enabled - for watching */ - __IO uint32_t SUBSTATRA; /*!< Description cluster[0]: Source of event/interrupt in region - 0, read access detected while corresponding subregion was enabled - for watching */ -} MWU_PERREGION_Type; - -typedef struct { - __IO uint32_t START; /*!< Description cluster[0]: Start address for region 0 */ - __IO uint32_t END; /*!< Description cluster[0]: End address of region 0 */ - __I uint32_t RESERVED2[2]; -} MWU_REGION_Type; - -typedef struct { - __I uint32_t START; /*!< Description cluster[0]: Reserved for future use */ - __I uint32_t END; /*!< Description cluster[0]: Reserved for future use */ - __IO uint32_t SUBS; /*!< Description cluster[0]: Subregions of region 0 */ - __I uint32_t RESERVED3; -} MWU_PREGION_Type; - -typedef struct { - __IO uint32_t MODE; /*!< I2S mode. */ - __IO uint32_t RXEN; /*!< Reception (RX) enable. */ - __IO uint32_t TXEN; /*!< Transmission (TX) enable. */ - __IO uint32_t MCKEN; /*!< Master clock generator enable. */ - __IO uint32_t MCKFREQ; /*!< Master clock generator frequency. */ - __IO uint32_t RATIO; /*!< MCK / LRCK ratio. */ - __IO uint32_t SWIDTH; /*!< Sample width. */ - __IO uint32_t ALIGN; /*!< Alignment of sample within a frame. */ - __IO uint32_t FORMAT; /*!< Frame format. */ - __IO uint32_t CHANNELS; /*!< Enable channels. */ -} I2S_CONFIG_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Receive buffer RAM start address. */ -} I2S_RXD_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Transmit buffer RAM start address. */ -} I2S_TXD_Type; - -typedef struct { - __IO uint32_t MAXCNT; /*!< Size of RXD and TXD buffers. */ -} I2S_RXTXD_Type; - -typedef struct { - __IO uint32_t MCK; /*!< Pin select for MCK signal. */ - __IO uint32_t SCK; /*!< Pin select for SCK signal. */ - __IO uint32_t LRCK; /*!< Pin select for LRCK signal. */ - __IO uint32_t SDIN; /*!< Pin select for SDIN signal. */ - __IO uint32_t SDOUT; /*!< Pin select for SDOUT signal. */ -} I2S_PSEL_Type; - -typedef struct { - __I uint32_t EPIN[8]; /*!< Description collection[0]: IN endpoint halted status. Can be - used as is as response to a GetStatus() request to endpoint. */ - __I uint32_t RESERVED4; - __I uint32_t EPOUT[8]; /*!< Description collection[0]: OUT endpoint halted status. Can be - used as is as response to a GetStatus() request to endpoint. */ -} USBD_HALTED_Type; - -typedef struct { - __IO uint32_t EPOUT[8]; /*!< Description collection[0]: Amount of bytes received last in - the data stage of this OUT endpoint */ - __IO uint32_t ISOOUT; /*!< Amount of bytes received last on this iso OUT data endpoint */ -} USBD_SIZE_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Description cluster[0]: Data pointer */ - __IO uint32_t MAXCNT; /*!< Description cluster[0]: Maximum number of bytes to transfer */ - __I uint32_t AMOUNT; /*!< Description cluster[0]: Number of bytes transferred in the last - transaction */ - __I uint32_t RESERVED5[2]; -} USBD_EPIN_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes to transfer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} USBD_ISOIN_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Description cluster[0]: Data pointer */ - __IO uint32_t MAXCNT; /*!< Description cluster[0]: Maximum number of bytes to transfer */ - __I uint32_t AMOUNT; /*!< Description cluster[0]: Number of bytes transferred in the last - transaction */ - __I uint32_t RESERVED6[2]; -} USBD_EPOUT_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Data pointer */ - __IO uint32_t MAXCNT; /*!< Maximum number of bytes to transfer */ - __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ -} USBD_ISOOUT_Type; - -typedef struct { - __IO uint32_t SRC; /*!< Flash memory source address */ - __IO uint32_t DST; /*!< RAM destination address */ - __IO uint32_t CNT; /*!< Read transfer length */ -} QSPI_READ_Type; - -typedef struct { - __IO uint32_t DST; /*!< Flash destination address */ - __IO uint32_t SRC; /*!< RAM source address */ - __IO uint32_t CNT; /*!< Write transfer length */ -} QSPI_WRITE_Type; - -typedef struct { - __IO uint32_t PTR; /*!< Start address of flash block to be erased */ - __IO uint32_t LEN; /*!< Size of block to be erased. */ -} QSPI_ERASE_Type; - -typedef struct { - __IO uint32_t SCK; /*!< Pin select for serial clock SCK */ - __IO uint32_t CSN; /*!< Pin select for chip select signal CSN. */ - __I uint32_t RESERVED7; - __IO uint32_t IO0; /*!< Pin select for serial data MOSI/IO0. */ - __IO uint32_t IO1; /*!< Pin select for serial data MISO/IO1. */ - __IO uint32_t IO2; /*!< Pin select for serial data IO2. */ - __IO uint32_t IO3; /*!< Pin select for serial data IO3. */ -} QSPI_PSEL_Type; - - -/* ================================================================================ */ -/* ================ FICR ================ */ -/* ================================================================================ */ - - -/** - * @brief Factory Information Configuration Registers (FICR) - */ - -typedef struct { /*!< FICR Structure */ - __I uint32_t RESERVED0[4]; - __I uint32_t CODEPAGESIZE; /*!< Code memory page size */ - __I uint32_t CODESIZE; /*!< Code memory size */ - __I uint32_t RESERVED1[18]; - __I uint32_t DEVICEID[2]; /*!< Description collection[0]: Device identifier */ - __I uint32_t RESERVED2[6]; - __I uint32_t ER[4]; /*!< Description collection[0]: Encryption root, word 0 */ - __I uint32_t IR[4]; /*!< Description collection[0]: Identity Root, word 0 */ - __I uint32_t DEVICEADDRTYPE; /*!< Device address type */ - __I uint32_t DEVICEADDR[2]; /*!< Description collection[0]: Device address 0 */ - __I uint32_t RESERVED3[21]; - FICR_INFO_Type INFO; /*!< Device info */ - __I uint32_t RESERVED4[185]; - FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */ - __I uint32_t RESERVED5[2]; - FICR_NFC_Type NFC; /*!< Unspecified */ -} NRF_FICR_Type; - - -/* ================================================================================ */ -/* ================ UICR ================ */ -/* ================================================================================ */ - - -/** - * @brief User Information Configuration Registers (UICR) - */ - -typedef struct { /*!< UICR Structure */ - __IO uint32_t UNUSED0; /*!< Unspecified */ - __IO uint32_t UNUSED1; /*!< Unspecified */ - __IO uint32_t UNUSED2; /*!< Unspecified */ - __I uint32_t RESERVED0; - __IO uint32_t UNUSED3; /*!< Unspecified */ - __IO uint32_t NRFFW[15]; /*!< Description collection[0]: Reserved for Nordic firmware design */ - __IO uint32_t NRFHW[12]; /*!< Description collection[0]: Reserved for Nordic hardware design */ - __IO uint32_t CUSTOMER[32]; /*!< Description collection[0]: Reserved for customer */ - __I uint32_t RESERVED1[64]; - __IO uint32_t PSELRESET[2]; /*!< Description collection[0]: Mapping of the nRESET function */ - __IO uint32_t APPROTECT; /*!< Access port protection */ - __IO uint32_t NFCPINS; /*!< Setting of pins dedicated to NFC functionality: NFC antenna - or GPIO */ - __I uint32_t RESERVED2[60]; - __IO uint32_t EXTSUPPLY; /*!< Enable external circuitry to be supplied from VDD pin. Applicable - in 'High voltage mode' only. */ - __IO uint32_t REGOUT0; /*!< GPIO reference voltage / external output supply voltage in 'High - voltage mode'. */ -} NRF_UICR_Type; - - -/* ================================================================================ */ -/* ================ POWER ================ */ -/* ================================================================================ */ - - -/** - * @brief Power control (POWER) - */ - -typedef struct { /*!< POWER Structure */ - __I uint32_t RESERVED0[30]; - __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode */ - __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency) */ - __I uint32_t RESERVED1[34]; - __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning */ - __I uint32_t RESERVED2[2]; - __IO uint32_t EVENTS_SLEEPENTER; /*!< CPU entered WFI/WFE sleep */ - __IO uint32_t EVENTS_SLEEPEXIT; /*!< CPU exited WFI/WFE sleep */ - __IO uint32_t EVENTS_USBDETECTED; /*!< Voltage supply detected on VBUS */ - __IO uint32_t EVENTS_USBREMOVED; /*!< Voltage supply removed from VBUS */ - __IO uint32_t EVENTS_USBPWRRDY; /*!< USB 3.3 V supply ready */ - __I uint32_t RESERVED3[119]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[61]; - __IO uint32_t RESETREAS; /*!< Reset reason */ - __I uint32_t RESERVED5[9]; - __I uint32_t RAMSTATUS; /*!< Deprecated register - RAM status register */ - __I uint32_t RESERVED6[3]; - __I uint32_t USBREGSTATUS; /*!< USB supply status */ - __I uint32_t RESERVED7[49]; - __O uint32_t SYSTEMOFF; /*!< System OFF register */ - __I uint32_t RESERVED8[3]; - __IO uint32_t POFCON; /*!< Power failure comparator configuration */ - __I uint32_t RESERVED9[2]; - __IO uint32_t GPREGRET; /*!< General purpose retention register */ - __IO uint32_t GPREGRET2; /*!< General purpose retention register */ - __I uint32_t RESERVED10[21]; - __IO uint32_t DCDCEN; /*!< Enable DC/DC converter for REG1 stage. */ - __I uint32_t RESERVED11; - __IO uint32_t DCDCEN0; /*!< Enable DC/DC converter for REG0 stage. */ - __I uint32_t RESERVED12[47]; - __I uint32_t MAINREGSTATUS; /*!< Main supply status */ - __I uint32_t RESERVED13[175]; - POWER_RAM_Type RAM[9]; /*!< Unspecified */ -} NRF_POWER_Type; - - -/* ================================================================================ */ -/* ================ CLOCK ================ */ -/* ================================================================================ */ - - -/** - * @brief Clock control (CLOCK) - */ - -typedef struct { /*!< CLOCK Structure */ - __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK crystal oscillator */ - __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK crystal oscillator */ - __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK source */ - __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK source */ - __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC or LFULP oscillator */ - __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */ - __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */ - __I uint32_t RESERVED0[57]; - __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started */ - __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */ - __I uint32_t RESERVED1; - __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator complete event */ - __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */ - __I uint32_t RESERVED2[124]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[63]; - __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */ - __I uint32_t HFCLKSTAT; /*!< HFCLK status */ - __I uint32_t RESERVED4; - __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */ - __I uint32_t LFCLKSTAT; /*!< LFCLK status */ - __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ - __I uint32_t RESERVED5[62]; - __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ - __I uint32_t RESERVED6[7]; - __IO uint32_t CTIV; /*!< Calibration timer interval */ - __I uint32_t RESERVED7[8]; - __IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */ -} NRF_CLOCK_Type; - - -/* ================================================================================ */ -/* ================ RADIO ================ */ -/* ================================================================================ */ - - -/** - * @brief 2.4 GHz Radio (RADIO) - */ - -typedef struct { /*!< RADIO Structure */ - __O uint32_t TASKS_TXEN; /*!< Enable RADIO in TX mode */ - __O uint32_t TASKS_RXEN; /*!< Enable RADIO in RX mode */ - __O uint32_t TASKS_START; /*!< Start RADIO */ - __O uint32_t TASKS_STOP; /*!< Stop RADIO */ - __O uint32_t TASKS_DISABLE; /*!< Disable RADIO */ - __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal - strength. */ - __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */ - __O uint32_t TASKS_BCSTART; /*!< Start the bit counter */ - __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */ - __O uint32_t TASKS_EDSTART; /*!< Start the Energy Detect measurement used in IEEE 802.15.4 mode */ - __O uint32_t TASKS_EDSTOP; /*!< Stop the Energy Detect measurement */ - __O uint32_t TASKS_CCASTART; /*!< Start the Clear Channel Assessment used in IEEE 802.15.4 mode */ - __O uint32_t TASKS_CCASTOP; /*!< Stop the Clear Channel Assessment */ - __I uint32_t RESERVED0[51]; - __IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */ - __IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */ - __IO uint32_t EVENTS_PAYLOAD; /*!< Packet payload sent or received */ - __IO uint32_t EVENTS_END; /*!< Packet sent or received */ - __IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */ - __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */ - __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */ - __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete. */ - __I uint32_t RESERVED1[2]; - __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value. */ - __I uint32_t RESERVED2; - __IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */ - __IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */ - __IO uint32_t EVENTS_FRAMESTART; /*!< IEEE 802.15.4 length field received */ - __IO uint32_t EVENTS_EDEND; /*!< Sampling of Energy Detection complete. A new ED sample is ready - for readout from the RADIO.EDSAMPLE register */ - __IO uint32_t EVENTS_EDSTOPPED; /*!< The sampling of Energy Detection has stopped */ - __IO uint32_t EVENTS_CCAIDLE; /*!< Wireless medium in idle - clear to send */ - __IO uint32_t EVENTS_CCABUSY; /*!< Wireless medium busy - do not send */ - __IO uint32_t EVENTS_CCASTOPPED; /*!< The CCA has stopped */ - __IO uint32_t EVENTS_RATEBOOST; /*!< Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit - to Ble_LR500Kbit. */ - __IO uint32_t EVENTS_TXREADY; /*!< RADIO has ramped up and is ready to be started TX path */ - __IO uint32_t EVENTS_RXREADY; /*!< RADIO has ramped up and is ready to be started RX path */ - __IO uint32_t EVENTS_MHRMATCH; /*!< MAC Header match found. */ - __I uint32_t RESERVED3[40]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED4[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED5[61]; - __I uint32_t CRCSTATUS; /*!< CRC status */ - __I uint32_t RESERVED6; - __I uint32_t RXMATCH; /*!< Received address */ - __I uint32_t RXCRC; /*!< CRC field of previously received packet */ - __I uint32_t DAI; /*!< Device address match index */ - __I uint32_t RESERVED7[60]; - __IO uint32_t PACKETPTR; /*!< Packet pointer */ - __IO uint32_t FREQUENCY; /*!< Frequency */ - __IO uint32_t TXPOWER; /*!< Output power */ - __IO uint32_t MODE; /*!< Data rate and modulation */ - __IO uint32_t PCNF0; /*!< Packet configuration register 0 */ - __IO uint32_t PCNF1; /*!< Packet configuration register 1 */ - __IO uint32_t BASE0; /*!< Base address 0 */ - __IO uint32_t BASE1; /*!< Base address 1 */ - __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0-3 */ - __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4-7 */ - __IO uint32_t TXADDRESS; /*!< Transmit address select */ - __IO uint32_t RXADDRESSES; /*!< Receive address select */ - __IO uint32_t CRCCNF; /*!< CRC configuration */ - __IO uint32_t CRCPOLY; /*!< CRC polynomial */ - __IO uint32_t CRCINIT; /*!< CRC initial value */ - __I uint32_t RESERVED8; - __IO uint32_t TIFS; /*!< Inter Frame Spacing in us */ - __I uint32_t RSSISAMPLE; /*!< RSSI sample */ - __I uint32_t RESERVED9; - __I uint32_t STATE; /*!< Current radio state */ - __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value */ - __I uint32_t RESERVED10[2]; - __IO uint32_t BCC; /*!< Bit counter compare */ - __I uint32_t RESERVED11[39]; - __IO uint32_t DAB[8]; /*!< Description collection[0]: Device address base segment 0 */ - __IO uint32_t DAP[8]; /*!< Description collection[0]: Device address prefix 0 */ - __IO uint32_t DACNF; /*!< Device address match configuration */ - __IO uint32_t MHRMATCHCONF; /*!< Search Pattern Configuration */ - __IO uint32_t MHRMATCHMAS; /*!< Pattern mask */ - __I uint32_t RESERVED12; - __IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */ - __I uint32_t RESERVED13[3]; - __IO uint32_t SFD; /*!< IEEE 802.15.4 Start of Frame Delimiter */ - __IO uint32_t EDCNT; /*!< IEEE 802.15.4 Energy Detect Loop Count */ - __IO uint32_t EDSAMPLE; /*!< IEEE 802.15.4 Energy Detect Level */ - __IO uint32_t CCACTRL; /*!< IEEE 802.15.4 Clear Channel Assessment Control */ - __I uint32_t RESERVED14[611]; - __IO uint32_t POWER; /*!< Peripheral power control */ -} NRF_RADIO_Type; - - -/* ================================================================================ */ -/* ================ UARTE ================ */ -/* ================================================================================ */ - - -/** - * @brief UART with EasyDMA 0 (UARTE) - */ - -typedef struct { /*!< UARTE Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ - __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ - __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ - __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ - __I uint32_t RESERVED0[7]; - __O uint32_t TASKS_FLUSHRX; /*!< Flush RX FIFO into RX buffer */ - __I uint32_t RESERVED1[52]; - __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ - __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ - __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to - Data RAM) */ - __I uint32_t RESERVED2; - __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ - __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ - __IO uint32_t EVENTS_ERROR; /*!< Error detected */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_RXSTARTED; /*!< UART receiver has started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< UART transmitter has started */ - __I uint32_t RESERVED6; - __IO uint32_t EVENTS_TXSTOPPED; /*!< Transmitter stopped */ - __I uint32_t RESERVED7[41]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[93]; - __IO uint32_t ERRORSRC; /*!< Error source Note : this register is read / write one to clear. */ - __I uint32_t RESERVED10[31]; - __IO uint32_t ENABLE; /*!< Enable UART */ - __I uint32_t RESERVED11; - UARTE_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[3]; - __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED13[3]; - UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ - __I uint32_t RESERVED14; - UARTE_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED15[7]; - __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ -} NRF_UARTE_Type; - - -/* ================================================================================ */ -/* ================ UART ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Asynchronous Receiver/Transmitter (UART) - */ - -typedef struct { /*!< UART Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ - __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ - __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ - __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ - __I uint32_t RESERVED0[3]; - __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */ - __I uint32_t RESERVED1[56]; - __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ - __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ - __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */ - __I uint32_t RESERVED2[4]; - __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ - __I uint32_t RESERVED3; - __IO uint32_t EVENTS_ERROR; /*!< Error detected */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ - __I uint32_t RESERVED5[46]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED6[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED7[93]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED8[31]; - __IO uint32_t ENABLE; /*!< Enable UART */ - __I uint32_t RESERVED9; - UART_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RXD; /*!< RXD register */ - __O uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED10; - __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED11[17]; - __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ -} NRF_UART_Type; - - -/* ================================================================================ */ -/* ================ SPIM ================ */ -/* ================================================================================ */ - - -/** - * @brief Serial Peripheral Interface Master with EasyDMA 0 (SPIM) - */ - -typedef struct { /*!< SPIM Structure */ - __I uint32_t RESERVED0[4]; - __O uint32_t TASKS_START; /*!< Start SPI transaction */ - __O uint32_t TASKS_STOP; /*!< Stop SPI transaction */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction */ - __I uint32_t RESERVED2[56]; - __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ - __I uint32_t RESERVED4; - __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached */ - __I uint32_t RESERVED6[10]; - __IO uint32_t EVENTS_STARTED; /*!< Transaction started */ - __I uint32_t RESERVED7[44]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[61]; - __IO uint32_t STALLSTAT; /*!< Stall status for EasyDMA RAM accesses. The fields in this register - is set to STALL by hardware whenever a stall occurres and can - be cleared (set to NOSTALL) by the CPU. */ - __I uint32_t RESERVED10[63]; - __IO uint32_t ENABLE; /*!< Enable SPIM */ - __I uint32_t RESERVED11; - SPIM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[3]; - __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED13[3]; - SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ - SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED14[2]; - SPIM_IFTIMING_Type IFTIMING; /*!< Unspecified */ - __I uint32_t RESERVED15[22]; - __IO uint32_t ORC; /*!< Byte transmitted after TXD.MAXCNT bytes have been transmitted - in the case when RXD.MAXCNT is greater than TXD.MAXCNT */ -} NRF_SPIM_Type; - - -/* ================================================================================ */ -/* ================ SPIS ================ */ -/* ================================================================================ */ - - -/** - * @brief SPI Slave 0 (SPIS) - */ - -typedef struct { /*!< SPIS Structure */ - __I uint32_t RESERVED0[9]; - __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore */ - __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore, enabling the SPI slave to acquire it */ - __I uint32_t RESERVED1[54]; - __IO uint32_t EVENTS_END; /*!< Granted transaction completed */ - __I uint32_t RESERVED2[2]; - __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ - __I uint32_t RESERVED3[5]; - __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired */ - __I uint32_t RESERVED4[53]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED5[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED6[61]; - __I uint32_t SEMSTAT; /*!< Semaphore status register */ - __I uint32_t RESERVED7[15]; - __IO uint32_t STATUS; /*!< Status from last transaction */ - __I uint32_t RESERVED8[47]; - __IO uint32_t ENABLE; /*!< Enable SPI slave */ - __I uint32_t RESERVED9; - SPIS_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED10[7]; - SPIS_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED11; - SPIS_TXD_Type TXD; /*!< Unspecified */ - __I uint32_t RESERVED12; - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED13; - __IO uint32_t DEF; /*!< Default character. Character clocked out in case of an ignored - transaction. */ - __I uint32_t RESERVED14[24]; - __IO uint32_t ORC; /*!< Over-read character */ -} NRF_SPIS_Type; - - -/* ================================================================================ */ -/* ================ TWIM ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Master Interface with EasyDMA 0 (TWIM) - */ - -typedef struct { /*!< TWIM Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ - __I uint32_t RESERVED1[2]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction. Must be issued while the TWI master is - not suspended. */ - __I uint32_t RESERVED2; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED3[56]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED5[8]; - __IO uint32_t EVENTS_SUSPENDED; /*!< Last byte has been sent out after the SUSPEND task has been - issued, TWI traffic is now suspended. */ - __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ - __I uint32_t RESERVED6[2]; - __IO uint32_t EVENTS_LASTRX; /*!< Byte boundary, starting to receive the last byte */ - __IO uint32_t EVENTS_LASTTX; /*!< Byte boundary, starting to transmit the last byte */ - __I uint32_t RESERVED7[39]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[110]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED10[14]; - __IO uint32_t ENABLE; /*!< Enable TWIM */ - __I uint32_t RESERVED11; - TWIM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[5]; - __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED13[3]; - TWIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ - TWIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED14[13]; - __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ -} NRF_TWIM_Type; - - -/* ================================================================================ */ -/* ================ TWIS ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS) - */ - -typedef struct { /*!< TWIS Structure */ - __I uint32_t RESERVED0[5]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED2[3]; - __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */ - __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */ - __I uint32_t RESERVED3[51]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __I uint32_t RESERVED4[7]; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED5[9]; - __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ - __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ - __I uint32_t RESERVED6[4]; - __IO uint32_t EVENTS_WRITE; /*!< Write command received */ - __IO uint32_t EVENTS_READ; /*!< Read command received */ - __I uint32_t RESERVED7[37]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED8[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED9[113]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t MATCH; /*!< Status register indicating which address had a match */ - __I uint32_t RESERVED10[10]; - __IO uint32_t ENABLE; /*!< Enable TWIS */ - __I uint32_t RESERVED11; - TWIS_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED12[9]; - TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */ - __I uint32_t RESERVED13; - TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */ - __I uint32_t RESERVED14[14]; - __IO uint32_t ADDRESS[2]; /*!< Description collection[0]: TWI slave address 0 */ - __I uint32_t RESERVED15; - __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */ - __I uint32_t RESERVED16[10]; - __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read - of the transmit buffer. */ -} NRF_TWIS_Type; - - -/* ================================================================================ */ -/* ================ SPI ================ */ -/* ================================================================================ */ - - -/** - * @brief Serial Peripheral Interface 0 (SPI) - */ - -typedef struct { /*!< SPI Structure */ - __I uint32_t RESERVED0[66]; - __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */ - __I uint32_t RESERVED1[126]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[125]; - __IO uint32_t ENABLE; /*!< Enable SPI */ - __I uint32_t RESERVED3; - SPI_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED4; - __I uint32_t RXD; /*!< RXD register */ - __IO uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED5; - __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED6[11]; - __IO uint32_t CONFIG; /*!< Configuration register */ -} NRF_SPI_Type; - - -/* ================================================================================ */ -/* ================ TWI ================ */ -/* ================================================================================ */ - - -/** - * @brief I2C compatible Two-Wire Interface 0 (TWI) - */ - -typedef struct { /*!< TWI Structure */ - __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ - __I uint32_t RESERVED1[2]; - __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ - __I uint32_t RESERVED2; - __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ - __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ - __I uint32_t RESERVED3[56]; - __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ - __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */ - __I uint32_t RESERVED4[4]; - __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */ - __I uint32_t RESERVED5; - __IO uint32_t EVENTS_ERROR; /*!< TWI error */ - __I uint32_t RESERVED6[4]; - __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or - received */ - __I uint32_t RESERVED7[3]; - __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */ - __I uint32_t RESERVED8[45]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED9[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED10[110]; - __IO uint32_t ERRORSRC; /*!< Error source */ - __I uint32_t RESERVED11[14]; - __IO uint32_t ENABLE; /*!< Enable TWI */ - __I uint32_t RESERVED12; - TWI_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED13[2]; - __I uint32_t RXD; /*!< RXD register */ - __IO uint32_t TXD; /*!< TXD register */ - __I uint32_t RESERVED14; - __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */ - __I uint32_t RESERVED15[24]; - __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ -} NRF_TWI_Type; - - -/* ================================================================================ */ -/* ================ NFCT ================ */ -/* ================================================================================ */ - - -/** - * @brief NFC-A compatible radio (NFCT) - */ - -typedef struct { /*!< NFCT Structure */ - __O uint32_t TASKS_ACTIVATE; /*!< Activate NFCT peripheral for incoming and outgoing frames, change - state to activated */ - __O uint32_t TASKS_DISABLE; /*!< Disable NFCT peripheral */ - __O uint32_t TASKS_SENSE; /*!< Enable NFC sense field mode, change state to sense mode */ - __O uint32_t TASKS_STARTTX; /*!< Start transmission of an outgoing frame, change state to transmit */ - __I uint32_t RESERVED0[3]; - __O uint32_t TASKS_ENABLERXDATA; /*!< Initializes the EasyDMA for receive. */ - __I uint32_t RESERVED1; - __O uint32_t TASKS_GOIDLE; /*!< Force state machine to IDLE state */ - __O uint32_t TASKS_GOSLEEP; /*!< Force state machine to SLEEP_A state */ - __I uint32_t RESERVED2[53]; - __IO uint32_t EVENTS_READY; /*!< The NFCT peripheral is ready to receive and send frames */ - __IO uint32_t EVENTS_FIELDDETECTED; /*!< Remote NFC field detected */ - __IO uint32_t EVENTS_FIELDLOST; /*!< Remote NFC field lost */ - __IO uint32_t EVENTS_TXFRAMESTART; /*!< Marks the start of the first symbol of a transmitted frame */ - __IO uint32_t EVENTS_TXFRAMEEND; /*!< Marks the end of the last transmitted on-air symbol of a frame */ - __IO uint32_t EVENTS_RXFRAMESTART; /*!< Marks the end of the first symbol of a received frame */ - __IO uint32_t EVENTS_RXFRAMEEND; /*!< Received data has been checked (CRC, parity) and transferred - to RAM, and EasyDMA has ended accessing the RX buffer */ - __IO uint32_t EVENTS_ERROR; /*!< NFC error reported. The ERRORSTATUS register contains details - on the source of the error. */ - __I uint32_t RESERVED3[2]; - __IO uint32_t EVENTS_RXERROR; /*!< NFC RX frame error reported. The FRAMESTATUS.RX register contains - details on the source of the error. */ - __IO uint32_t EVENTS_ENDRX; /*!< RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */ - __IO uint32_t EVENTS_ENDTX; /*!< Transmission of data in RAM has ended, and EasyDMA has ended - accessing the TX buffer */ - __I uint32_t RESERVED4; - __IO uint32_t EVENTS_AUTOCOLRESSTARTED; /*!< Auto collision resolution process has started */ - __I uint32_t RESERVED5[3]; - __IO uint32_t EVENTS_COLLISION; /*!< NFC auto collision resolution error reported. */ - __IO uint32_t EVENTS_SELECTED; /*!< NFC auto collision resolution successfully completed */ - __IO uint32_t EVENTS_STARTED; /*!< EasyDMA is ready to receive or send frames. */ - __I uint32_t RESERVED6[43]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED7[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED8[62]; - __IO uint32_t ERRORSTATUS; /*!< NFC Error Status register */ - __I uint32_t RESERVED9; - NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< Unspecified */ - __I uint32_t NFCTAGSTATE; /*!< NfcTag state register */ - __I uint32_t RESERVED10[10]; - __I uint32_t FIELDPRESENT; /*!< Indicates the presence or not of a valid field */ - __I uint32_t RESERVED11[49]; - __IO uint32_t FRAMEDELAYMIN; /*!< Minimum frame delay */ - __IO uint32_t FRAMEDELAYMAX; /*!< Maximum frame delay */ - __IO uint32_t FRAMEDELAYMODE; /*!< Configuration register for the Frame Delay Timer */ - __IO uint32_t PACKETPTR; /*!< Packet pointer for TXD and RXD data storage in Data RAM */ - __IO uint32_t MAXLEN; /*!< Size of the RAM buffer allocated to TXD and RXD data storage - each */ - NFCT_TXD_Type TXD; /*!< Unspecified */ - NFCT_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED12[26]; - __IO uint32_t NFCID1_LAST; /*!< Last NFCID1 part (4, 7 or 10 bytes ID) */ - __IO uint32_t NFCID1_2ND_LAST; /*!< Second last NFCID1 part (7 or 10 bytes ID) */ - __IO uint32_t NFCID1_3RD_LAST; /*!< Third last NFCID1 part (10 bytes ID) */ - __IO uint32_t AUTOCOLRESCONFIG; /*!< Controls the auto collision resolution function. This setting - must be done before the NFCT peripheral is enabled. */ - __IO uint32_t SENSRES; /*!< NFC-A SENS_RES auto-response settings */ - __IO uint32_t SELRES; /*!< NFC-A SEL_RES auto-response settings */ -} NRF_NFCT_Type; - - -/* ================================================================================ */ -/* ================ GPIOTE ================ */ -/* ================================================================================ */ - - -/** - * @brief GPIO Tasks and Events (GPIOTE) - */ - -typedef struct { /*!< GPIOTE Structure */ - __O uint32_t TASKS_OUT[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */ - __I uint32_t RESERVED0[4]; - __O uint32_t TASKS_SET[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is to set it high. */ - __I uint32_t RESERVED1[4]; - __O uint32_t TASKS_CLR[8]; /*!< Description collection[0]: Task for writing to pin specified - in CONFIG[0].PSEL. Action on pin is to set it low. */ - __I uint32_t RESERVED2[32]; - __IO uint32_t EVENTS_IN[8]; /*!< Description collection[0]: Event generated from pin specified - in CONFIG[0].PSEL */ - __I uint32_t RESERVED3[23]; - __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism - enabled */ - __I uint32_t RESERVED4[97]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED5[129]; - __IO uint32_t CONFIG[8]; /*!< Description collection[0]: Configuration for OUT[n], SET[n] - and CLR[n] tasks and IN[n] event */ -} NRF_GPIOTE_Type; - - -/* ================================================================================ */ -/* ================ SAADC ================ */ -/* ================================================================================ */ - - -/** - * @brief Analog to Digital Converter (SAADC) - */ - -typedef struct { /*!< SAADC Structure */ - __O uint32_t TASKS_START; /*!< Start the ADC and prepare the result buffer in RAM */ - __O uint32_t TASKS_SAMPLE; /*!< Take one ADC sample, if scan is enabled all channels are sampled */ - __O uint32_t TASKS_STOP; /*!< Stop the ADC and terminate any on-going conversion */ - __O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_STARTED; /*!< The ADC has started */ - __IO uint32_t EVENTS_END; /*!< The ADC has filled up the Result buffer */ - __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the mode, - multiple conversions might be needed for a result to be transferred - to RAM. */ - __IO uint32_t EVENTS_RESULTDONE; /*!< A result is ready to get transferred to RAM. */ - __IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */ - __IO uint32_t EVENTS_STOPPED; /*!< The ADC has stopped */ - SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */ - __I uint32_t RESERVED1[106]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[61]; - __I uint32_t STATUS; /*!< Status */ - __I uint32_t RESERVED3[63]; - __IO uint32_t ENABLE; /*!< Enable or disable ADC */ - __I uint32_t RESERVED4[3]; - SAADC_CH_Type CH[8]; /*!< Unspecified */ - __I uint32_t RESERVED5[24]; - __IO uint32_t RESOLUTION; /*!< Resolution configuration */ - __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. OVERSAMPLE should not be combined - with SCAN. The RESOLUTION is applied before averaging, thus - for high OVERSAMPLE a higher RESOLUTION should be used. */ - __IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */ - __I uint32_t RESERVED6[12]; - SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */ -} NRF_SAADC_Type; - - -/* ================================================================================ */ -/* ================ TIMER ================ */ -/* ================================================================================ */ - - -/** - * @brief Timer/Counter 0 (TIMER) - */ - -typedef struct { /*!< TIMER Structure */ - __O uint32_t TASKS_START; /*!< Start Timer */ - __O uint32_t TASKS_STOP; /*!< Stop Timer */ - __O uint32_t TASKS_COUNT; /*!< Increment Timer (Counter mode only) */ - __O uint32_t TASKS_CLEAR; /*!< Clear time */ - __O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */ - __I uint32_t RESERVED0[11]; - __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[0]: Capture Timer value to CC[0] register */ - __I uint32_t RESERVED1[58]; - __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[0]: Compare event on CC[0] match */ - __I uint32_t RESERVED2[42]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED3[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[61]; - __I uint32_t STATUS; /*!< Timer status */ - __I uint32_t RESERVED5[64]; - __IO uint32_t MODE; /*!< Timer mode selection */ - __IO uint32_t BITMODE; /*!< Configure the number of bits used by the TIMER */ - __I uint32_t RESERVED6; - __IO uint32_t PRESCALER; /*!< Timer prescaler register */ - __I uint32_t RESERVED7[11]; - __IO uint32_t CC[6]; /*!< Description collection[0]: Capture/Compare register 0 */ -} NRF_TIMER_Type; - - -/* ================================================================================ */ -/* ================ RTC ================ */ -/* ================================================================================ */ - - -/** - * @brief Real time counter 0 (RTC) - */ - -typedef struct { /*!< RTC Structure */ - __O uint32_t TASKS_START; /*!< Start RTC COUNTER */ - __O uint32_t TASKS_STOP; /*!< Stop RTC COUNTER */ - __O uint32_t TASKS_CLEAR; /*!< Clear RTC COUNTER */ - __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFF0 */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */ - __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */ - __I uint32_t RESERVED1[14]; - __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[0]: Compare event on CC[0] match */ - __I uint32_t RESERVED2[109]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[13]; - __IO uint32_t EVTEN; /*!< Enable or disable event routing */ - __IO uint32_t EVTENSET; /*!< Enable event routing */ - __IO uint32_t EVTENCLR; /*!< Disable event routing */ - __I uint32_t RESERVED4[110]; - __I uint32_t COUNTER; /*!< Current COUNTER value */ - __IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must - be written when RTC is stopped */ - __I uint32_t RESERVED5[13]; - __IO uint32_t CC[4]; /*!< Description collection[0]: Compare register 0 */ -} NRF_RTC_Type; - - -/* ================================================================================ */ -/* ================ TEMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Temperature Sensor (TEMP) - */ - -typedef struct { /*!< TEMP Structure */ - __O uint32_t TASKS_START; /*!< Start temperature measurement */ - __O uint32_t TASKS_STOP; /*!< Stop temperature measurement */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready */ - __I uint32_t RESERVED1[128]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[127]; - __I int32_t TEMP; /*!< Temperature in degC (0.25deg steps) */ - __I uint32_t RESERVED3[5]; - __IO uint32_t A0; /*!< Slope of 1st piece wise linear function */ - __IO uint32_t A1; /*!< Slope of 2nd piece wise linear function */ - __IO uint32_t A2; /*!< Slope of 3rd piece wise linear function */ - __IO uint32_t A3; /*!< Slope of 4th piece wise linear function */ - __IO uint32_t A4; /*!< Slope of 5th piece wise linear function */ - __IO uint32_t A5; /*!< Slope of 6th piece wise linear function */ - __I uint32_t RESERVED4[2]; - __IO uint32_t B0; /*!< y-intercept of 1st piece wise linear function */ - __IO uint32_t B1; /*!< y-intercept of 2nd piece wise linear function */ - __IO uint32_t B2; /*!< y-intercept of 3rd piece wise linear function */ - __IO uint32_t B3; /*!< y-intercept of 4th piece wise linear function */ - __IO uint32_t B4; /*!< y-intercept of 5th piece wise linear function */ - __IO uint32_t B5; /*!< y-intercept of 6th piece wise linear function */ - __I uint32_t RESERVED5[2]; - __IO uint32_t T0; /*!< End point of 1st piece wise linear function */ - __IO uint32_t T1; /*!< End point of 2nd piece wise linear function */ - __IO uint32_t T2; /*!< End point of 3rd piece wise linear function */ - __IO uint32_t T3; /*!< End point of 4th piece wise linear function */ - __IO uint32_t T4; /*!< End point of 5th piece wise linear function */ -} NRF_TEMP_Type; - - -/* ================================================================================ */ -/* ================ RNG ================ */ -/* ================================================================================ */ - - -/** - * @brief Random Number Generator (RNG) - */ - -typedef struct { /*!< RNG Structure */ - __O uint32_t TASKS_START; /*!< Task starting the random number generator */ - __O uint32_t TASKS_STOP; /*!< Task stopping the random number generator */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_VALRDY; /*!< Event being generated for every new random number written to - the VALUE register */ - __I uint32_t RESERVED1[63]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[126]; - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t VALUE; /*!< Output random number */ -} NRF_RNG_Type; - - -/* ================================================================================ */ -/* ================ ECB ================ */ -/* ================================================================================ */ - - -/** - * @brief AES ECB Mode Encryption (ECB) - */ - -typedef struct { /*!< ECB Structure */ - __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt */ - __O uint32_t TASKS_STOPECB; /*!< Abort a possible executing ECB operation */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete */ - __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted because of a STOPECB task or due to - an error */ - __I uint32_t RESERVED1[127]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[126]; - __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointers */ -} NRF_ECB_Type; - - -/* ================================================================================ */ -/* ================ CCM ================ */ -/* ================================================================================ */ - - -/** - * @brief AES CCM Mode Encryption (CCM) - */ - -typedef struct { /*!< CCM Structure */ - __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by - itself when completed. */ - __O uint32_t TASKS_CRYPT; /*!< Start encryption/decryption. This operation will stop by itself - when completed. */ - __O uint32_t TASKS_STOP; /*!< Stop encryption/decryption */ - __O uint32_t TASKS_RATEOVERRIDE; /*!< Override DATARATE setting in MODE register with the contents - of the RATEOVERRIDE register for any ongoing encryption/decryption */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_ENDKSGEN; /*!< Key-stream generation complete */ - __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt complete */ - __IO uint32_t EVENTS_ERROR; /*!< Deprecated register - CCM error event */ - __I uint32_t RESERVED1[61]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t MICSTATUS; /*!< MIC check result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable */ - __IO uint32_t MODE; /*!< Operation mode */ - __IO uint32_t CNFPTR; /*!< Pointer to data structure holding AES key and NONCE vector */ - __IO uint32_t INPTR; /*!< Input pointer */ - __IO uint32_t OUTPTR; /*!< Output pointer */ - __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ - __IO uint32_t MAXPACKETSIZE; /*!< Length of key-stream generated when MODE.LENGTH = Extended. */ - __IO uint32_t RATEOVERRIDE; /*!< Data rate override setting. */ -} NRF_CCM_Type; - - -/* ================================================================================ */ -/* ================ AAR ================ */ -/* ================================================================================ */ - - -/** - * @brief Accelerated Address Resolver (AAR) - */ - -typedef struct { /*!< AAR Structure */ - __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK - data structure */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */ - __I uint32_t RESERVED1[61]; - __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */ - __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */ - __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */ - __I uint32_t RESERVED2[126]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t STATUS; /*!< Resolution status */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable AAR */ - __IO uint32_t NIRK; /*!< Number of IRKs */ - __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */ - __I uint32_t RESERVED5; - __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */ - __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ -} NRF_AAR_Type; - - -/* ================================================================================ */ -/* ================ WDT ================ */ -/* ================================================================================ */ - - -/** - * @brief Watchdog Timer (WDT) - */ - -typedef struct { /*!< WDT Structure */ - __O uint32_t TASKS_START; /*!< Start the watchdog */ - __I uint32_t RESERVED0[63]; - __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout */ - __I uint32_t RESERVED1[128]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[61]; - __I uint32_t RUNSTATUS; /*!< Run status */ - __I uint32_t REQSTATUS; /*!< Request status */ - __I uint32_t RESERVED3[63]; - __IO uint32_t CRV; /*!< Counter reload value */ - __IO uint32_t RREN; /*!< Enable register for reload request registers */ - __IO uint32_t CONFIG; /*!< Configuration register */ - __I uint32_t RESERVED4[60]; - __O uint32_t RR[8]; /*!< Description collection[0]: Reload request 0 */ -} NRF_WDT_Type; - - -/* ================================================================================ */ -/* ================ QDEC ================ */ -/* ================================================================================ */ - - -/** - * @brief Quadrature Decoder (QDEC) - */ - -typedef struct { /*!< QDEC Structure */ - __O uint32_t TASKS_START; /*!< Task starting the quadrature decoder */ - __O uint32_t TASKS_STOP; /*!< Task stopping the quadrature decoder */ - __O uint32_t TASKS_READCLRACC; /*!< Read and clear ACC and ACCDBL */ - __O uint32_t TASKS_RDCLRACC; /*!< Read and clear ACC */ - __O uint32_t TASKS_RDCLRDBL; /*!< Read and clear ACCDBL */ - __I uint32_t RESERVED0[59]; - __IO uint32_t EVENTS_SAMPLERDY; /*!< Event being generated for every new sample value written to - the SAMPLE register */ - __IO uint32_t EVENTS_REPORTRDY; /*!< Non-null report ready */ - __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow */ - __IO uint32_t EVENTS_DBLRDY; /*!< Double displacement(s) detected */ - __IO uint32_t EVENTS_STOPPED; /*!< QDEC has been stopped */ - __I uint32_t RESERVED1[59]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[125]; - __IO uint32_t ENABLE; /*!< Enable the quadrature decoder */ - __IO uint32_t LEDPOL; /*!< LED output pin polarity */ - __IO uint32_t SAMPLEPER; /*!< Sample period */ - __I int32_t SAMPLE; /*!< Motion sample value */ - __IO uint32_t REPORTPER; /*!< Number of samples to be taken before REPORTRDY and DBLRDY events - can be generated */ - __I int32_t ACC; /*!< Register accumulating the valid transitions */ - __I int32_t ACCREAD; /*!< Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC - task */ - QDEC_PSEL_Type PSEL; /*!< Unspecified */ - __IO uint32_t DBFEN; /*!< Enable input debounce filters */ - __I uint32_t RESERVED4[5]; - __IO uint32_t LEDPRE; /*!< Time period the LED is switched ON prior to sampling */ - __I uint32_t ACCDBL; /*!< Register accumulating the number of detected double transitions */ - __I uint32_t ACCDBLREAD; /*!< Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL - task */ -} NRF_QDEC_Type; - - -/* ================================================================================ */ -/* ================ COMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Comparator (COMP) - */ - -typedef struct { /*!< COMP Structure */ - __O uint32_t TASKS_START; /*!< Start comparator */ - __O uint32_t TASKS_STOP; /*!< Stop comparator */ - __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ - __I uint32_t RESERVED0[61]; - __IO uint32_t EVENTS_READY; /*!< COMP is ready and output is valid */ - __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ - __IO uint32_t EVENTS_UP; /*!< Upward crossing */ - __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ - __I uint32_t RESERVED1[60]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t RESULT; /*!< Compare result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< COMP enable */ - __IO uint32_t PSEL; /*!< Pin select */ - __IO uint32_t REFSEL; /*!< Reference source select */ - __IO uint32_t EXTREFSEL; /*!< External reference select */ - __I uint32_t RESERVED5[8]; - __IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */ - __IO uint32_t MODE; /*!< Mode configuration */ - __IO uint32_t HYST; /*!< Comparator hysteresis enable */ - __IO uint32_t ISOURCE; /*!< Current source select on analog input */ -} NRF_COMP_Type; - - -/* ================================================================================ */ -/* ================ LPCOMP ================ */ -/* ================================================================================ */ - - -/** - * @brief Low Power Comparator (LPCOMP) - */ - -typedef struct { /*!< LPCOMP Structure */ - __O uint32_t TASKS_START; /*!< Start comparator */ - __O uint32_t TASKS_STOP; /*!< Stop comparator */ - __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ - __I uint32_t RESERVED0[61]; - __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid */ - __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ - __IO uint32_t EVENTS_UP; /*!< Upward crossing */ - __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ - __I uint32_t RESERVED1[60]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED2[64]; - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[61]; - __I uint32_t RESULT; /*!< Compare result */ - __I uint32_t RESERVED4[63]; - __IO uint32_t ENABLE; /*!< Enable LPCOMP */ - __IO uint32_t PSEL; /*!< Input pin select */ - __IO uint32_t REFSEL; /*!< Reference select */ - __IO uint32_t EXTREFSEL; /*!< External reference select */ - __I uint32_t RESERVED5[4]; - __IO uint32_t ANADETECT; /*!< Analog detect configuration */ - __I uint32_t RESERVED6[5]; - __IO uint32_t HYST; /*!< Comparator hysteresis enable */ -} NRF_LPCOMP_Type; - - -/* ================================================================================ */ -/* ================ SWI ================ */ -/* ================================================================================ */ - - -/** - * @brief Software interrupt 0 (SWI) - */ - -typedef struct { /*!< SWI Structure */ - __I uint32_t UNUSED; /*!< Unused. */ -} NRF_SWI_Type; - - -/* ================================================================================ */ -/* ================ EGU ================ */ -/* ================================================================================ */ - - -/** - * @brief Event Generator Unit 0 (EGU) - */ - -typedef struct { /*!< EGU Structure */ - __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[0]: Trigger 0 for triggering the corresponding - TRIGGERED[0] event */ - __I uint32_t RESERVED0[48]; - __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[0]: Event number 0 generated by triggering - the corresponding TRIGGER[0] task */ - __I uint32_t RESERVED1[112]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ -} NRF_EGU_Type; - - -/* ================================================================================ */ -/* ================ PWM ================ */ -/* ================================================================================ */ - - -/** - * @brief Pulse Width Modulation Unit 0 (PWM) - */ - -typedef struct { /*!< PWM Structure */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current - PWM period, and stops sequence playback */ - __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all - enabled channels from sequence 0, and starts playing that sequence - at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes - PWM generation to start it was not running. */ - __O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels - if DECODER.MODE=NextStep. Does not cause PWM generation to start - it was not running. */ - __I uint32_t RESERVED1[60]; - __IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer - generated */ - __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[0]: First PWM period started on sequence - 0 */ - __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[0]: Emitted at end of every sequence - 0, when last value from RAM has been applied to wave counter */ - __IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */ - __IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times - defined in LOOP.CNT */ - __I uint32_t RESERVED2[56]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED3[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[125]; - __IO uint32_t ENABLE; /*!< PWM module enable register */ - __IO uint32_t MODE; /*!< Selects operating mode of the wave counter */ - __IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */ - __IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */ - __IO uint32_t DECODER; /*!< Configuration of the decoder */ - __IO uint32_t LOOP; /*!< Amount of playback of a loop */ - __I uint32_t RESERVED5[2]; - PWM_SEQ_Type SEQ[2]; /*!< Unspecified */ - PWM_PSEL_Type PSEL; /*!< Unspecified */ -} NRF_PWM_Type; - - -/* ================================================================================ */ -/* ================ PDM ================ */ -/* ================================================================================ */ - - -/** - * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM) - */ - -typedef struct { /*!< PDM Structure */ - __O uint32_t TASKS_START; /*!< Starts continuous PDM transfer */ - __O uint32_t TASKS_STOP; /*!< Stops PDM transfer */ - __I uint32_t RESERVED0[62]; - __IO uint32_t EVENTS_STARTED; /*!< PDM transfer has started */ - __IO uint32_t EVENTS_STOPPED; /*!< PDM transfer has finished */ - __IO uint32_t EVENTS_END; /*!< The PDM has written the last sample specified by SAMPLE.MAXCNT - (or the last sample after a STOP task has been received) to - Data RAM */ - __I uint32_t RESERVED1[125]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[125]; - __IO uint32_t ENABLE; /*!< PDM module enable register */ - __IO uint32_t PDMCLKCTRL; /*!< PDM clock generator control */ - __IO uint32_t MODE; /*!< Defines the routing of the connected PDM microphones' signals */ - __I uint32_t RESERVED3[3]; - __IO uint32_t GAINL; /*!< Left output gain adjustment */ - __IO uint32_t GAINR; /*!< Right output gain adjustment */ - __IO uint32_t RATIO; /*!< Selects the ratio between PDM_CLK and output sample rate. Change - PDMCLKCTRL accordingly. */ - __I uint32_t RESERVED4[7]; - PDM_PSEL_Type PSEL; /*!< Unspecified */ - __I uint32_t RESERVED5[6]; - PDM_SAMPLE_Type SAMPLE; /*!< Unspecified */ -} NRF_PDM_Type; - - -/* ================================================================================ */ -/* ================ NVMC ================ */ -/* ================================================================================ */ - - -/** - * @brief Non Volatile Memory Controller (NVMC) - */ - -typedef struct { /*!< NVMC Structure */ - __I uint32_t RESERVED0[256]; - __I uint32_t READY; /*!< Ready flag */ - __I uint32_t RESERVED1[64]; - __IO uint32_t CONFIG; /*!< Configuration register */ - - union { - __IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in Code area. - Equivalent to ERASEPAGE. */ - __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in Code area */ - }; - __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */ - __IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in Code area. - Equivalent to ERASEPAGE. */ - __IO uint32_t ERASEUICR; /*!< Register for erasing User Information Configuration Registers */ - __I uint32_t RESERVED2[10]; - __IO uint32_t ICACHECNF; /*!< I-Code cache configuration register. */ - __I uint32_t RESERVED3; - __IO uint32_t IHIT; /*!< I-Code cache hit counter. */ - __IO uint32_t IMISS; /*!< I-Code cache miss counter. */ -} NRF_NVMC_Type; - - -/* ================================================================================ */ -/* ================ ACL ================ */ -/* ================================================================================ */ - - -/** - * @brief Access control lists (ACL) - */ - -typedef struct { /*!< ACL Structure */ - __I uint32_t RESERVED0[449]; - __IO uint32_t DISABLEINDEBUG; /*!< Disable all ACL protection mechanisms for regions while in debug - mode */ - __I uint32_t RESERVED1[62]; - ACL_ACL_Type ACL[8]; /*!< Unspecified */ -} NRF_ACL_Type; - - -/* ================================================================================ */ -/* ================ PPI ================ */ -/* ================================================================================ */ - - -/** - * @brief Programmable Peripheral Interconnect (PPI) - */ - -typedef struct { /*!< PPI Structure */ - PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< Channel group tasks */ - __I uint32_t RESERVED0[308]; - __IO uint32_t CHEN; /*!< Channel enable register */ - __IO uint32_t CHENSET; /*!< Channel enable set register */ - __IO uint32_t CHENCLR; /*!< Channel enable clear register */ - __I uint32_t RESERVED1; - PPI_CH_Type CH[20]; /*!< PPI Channel */ - __I uint32_t RESERVED2[148]; - __IO uint32_t CHG[6]; /*!< Description collection[0]: Channel group 0 */ - __I uint32_t RESERVED3[62]; - PPI_FORK_Type FORK[32]; /*!< Fork */ -} NRF_PPI_Type; - - -/* ================================================================================ */ -/* ================ MWU ================ */ -/* ================================================================================ */ - - -/** - * @brief Memory Watch Unit (MWU) - */ - -typedef struct { /*!< MWU Structure */ - __I uint32_t RESERVED0[64]; - MWU_EVENTS_REGION_Type EVENTS_REGION[4]; /*!< Unspecified */ - __I uint32_t RESERVED1[16]; - MWU_EVENTS_PREGION_Type EVENTS_PREGION[2]; /*!< Unspecified */ - __I uint32_t RESERVED2[100]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[5]; - __IO uint32_t NMIEN; /*!< Enable or disable non-maskable interrupt */ - __IO uint32_t NMIENSET; /*!< Enable non-maskable interrupt */ - __IO uint32_t NMIENCLR; /*!< Disable non-maskable interrupt */ - __I uint32_t RESERVED4[53]; - MWU_PERREGION_Type PERREGION[2]; /*!< Unspecified */ - __I uint32_t RESERVED5[64]; - __IO uint32_t REGIONEN; /*!< Enable/disable regions watch */ - __IO uint32_t REGIONENSET; /*!< Enable regions watch */ - __IO uint32_t REGIONENCLR; /*!< Disable regions watch */ - __I uint32_t RESERVED6[57]; - MWU_REGION_Type REGION[4]; /*!< Unspecified */ - __I uint32_t RESERVED7[32]; - MWU_PREGION_Type PREGION[2]; /*!< Unspecified */ -} NRF_MWU_Type; - - -/* ================================================================================ */ -/* ================ I2S ================ */ -/* ================================================================================ */ - - -/** - * @brief Inter-IC Sound (I2S) - */ - -typedef struct { /*!< I2S Structure */ - __O uint32_t TASKS_START; /*!< Starts continuous I2S transfer. Also starts MCK generator when - this is enabled. */ - __O uint32_t TASKS_STOP; /*!< Stops I2S transfer. Also stops MCK generator. Triggering this - task will cause the {event:STOPPED} event to be generated. */ - __I uint32_t RESERVED0[63]; - __IO uint32_t EVENTS_RXPTRUPD; /*!< The RXD.PTR register has been copied to internal double-buffers. - When the I2S module is started and RX is enabled, this event - will be generated for every RXTXD.MAXCNT words that are received - on the SDIN pin. */ - __IO uint32_t EVENTS_STOPPED; /*!< I2S transfer stopped. */ - __I uint32_t RESERVED1[2]; - __IO uint32_t EVENTS_TXPTRUPD; /*!< The TDX.PTR register has been copied to internal double-buffers. - When the I2S module is started and TX is enabled, this event - will be generated for every RXTXD.MAXCNT words that are sent - on the SDOUT pin. */ - __I uint32_t RESERVED2[122]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED3[125]; - __IO uint32_t ENABLE; /*!< Enable I2S module. */ - I2S_CONFIG_Type CONFIG; /*!< Unspecified */ - __I uint32_t RESERVED4[3]; - I2S_RXD_Type RXD; /*!< Unspecified */ - __I uint32_t RESERVED5; - I2S_TXD_Type TXD; /*!< Unspecified */ - __I uint32_t RESERVED6[3]; - I2S_RXTXD_Type RXTXD; /*!< Unspecified */ - __I uint32_t RESERVED7[3]; - I2S_PSEL_Type PSEL; /*!< Unspecified */ -} NRF_I2S_Type; - - -/* ================================================================================ */ -/* ================ FPU ================ */ -/* ================================================================================ */ - - -/** - * @brief FPU (FPU) - */ - -typedef struct { /*!< FPU Structure */ - __I uint32_t UNUSED; /*!< Unused. */ -} NRF_FPU_Type; - - -/* ================================================================================ */ -/* ================ USBD ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Bus device (USBD) - */ - -typedef struct { /*!< USBD Structure */ - __I uint32_t RESERVED0; - __O uint32_t TASKS_STARTEPIN[8]; /*!< Description collection[0]: Captures the EPIN[0].PTR, EPIN[0].MAXCNT - and EPIN[0].CONFIG registers values, and enables endpoint IN - 0 to respond to traffic from host */ - __O uint32_t TASKS_STARTISOIN; /*!< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers - values, and enables sending data on iso endpoint */ - __O uint32_t TASKS_STARTEPOUT[8]; /*!< Description collection[0]: Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT - and EPOUT[0].CONFIG registers values, and enables endpoint 0 - to respond to traffic from host */ - __O uint32_t TASKS_STARTISOOUT; /*!< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers - values, and enables receiving of data on iso endpoint */ - __O uint32_t TASKS_EP0RCVOUT; /*!< Allows OUT data stage on control endpoint 0 */ - __O uint32_t TASKS_EP0STATUS; /*!< Allows status stage on control endpoint 0 */ - __O uint32_t TASKS_EP0STALL; /*!< STALLs data and status stage on control endpoint 0 */ - __O uint32_t TASKS_DPDMDRIVE; /*!< Forces D+ and D-lines to the state defined in the DPDMVALUE - register */ - __O uint32_t TASKS_DPDMNODRIVE; /*!< Stops forcing D+ and D- lines to any state (USB engine takes - control) */ - __I uint32_t RESERVED1[40]; - __IO uint32_t EVENTS_USBRESET; /*!< Signals that a USB reset condition has been detected on the - USB lines */ - __IO uint32_t EVENTS_STARTED; /*!< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, - or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers - have been captured on all endpoints reported in the EPSTATUS - register */ - __IO uint32_t EVENTS_ENDEPIN[8]; /*!< Description collection[0]: The whole EPIN[0] buffer has been - consumed. The RAM buffer can be accessed safely by software. */ - __IO uint32_t EVENTS_EP0DATADONE; /*!< An acknowledged data transfer has taken place on the control - endpoint */ - __IO uint32_t EVENTS_ENDISOIN; /*!< The whole ISOIN buffer has been consumed. The RAM buffer can - be accessed safely by software. */ - __IO uint32_t EVENTS_ENDEPOUT[8]; /*!< Description collection[0]: The whole EPOUT[0] buffer has been - consumed. The RAM buffer can be accessed safely by software. */ - __IO uint32_t EVENTS_ENDISOOUT; /*!< The whole ISOOUT buffer has been consumed. The RAM buffer can - be accessed safely by software. */ - __IO uint32_t EVENTS_SOF; /*!< Signals that a SOF (start of frame) condition has been detected - on the USB lines */ - __IO uint32_t EVENTS_USBEVENT; /*!< An event or an error not covered by specific events has occurred, - check EVENTCAUSE register to find the cause */ - __IO uint32_t EVENTS_EP0SETUP; /*!< A valid SETUP token has been received (and acknowledged) on - the control endpoint */ - __IO uint32_t EVENTS_EPDATA; /*!< A data transfer has occurred on a data endpoint, indicated by - the EPDATASTATUS register */ - __IO uint32_t EVENTS_ACCESSFAULT; /*!< Access to an unavailable USB register has been attempted (software - or EasyDMA). This event can get fired even when USBD is not - ENABLEd. */ - __I uint32_t RESERVED2[38]; - __IO uint32_t SHORTS; /*!< Shortcut register */ - __I uint32_t RESERVED3[63]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED4[61]; - __IO uint32_t EVENTCAUSE; /*!< Details on event that caused the USBEVENT event */ - __I uint32_t BUSSTATE; /*!< Provides the logic state of the D+ and D- lines */ - __I uint32_t RESERVED5[6]; - USBD_HALTED_Type HALTED; /*!< Unspecified */ - __I uint32_t RESERVED6; - __IO uint32_t EPSTATUS; /*!< Provides information on which endpoint's EasyDMA registers have - been captured */ - __IO uint32_t EPDATASTATUS; /*!< Provides information on which endpoint(s) an acknowledged data - transfer has occurred (EPDATA event) */ - __I uint32_t USBADDR; /*!< Device USB address */ - __I uint32_t RESERVED7[3]; - __I uint32_t BMREQUESTTYPE; /*!< SETUP data, byte 0, bmRequestType */ - __I uint32_t BREQUEST; /*!< SETUP data, byte 1, bRequest */ - __I uint32_t WVALUEL; /*!< SETUP data, byte 2, LSB of wValue */ - __I uint32_t WVALUEH; /*!< SETUP data, byte 3, MSB of wValue */ - __I uint32_t WINDEXL; /*!< SETUP data, byte 4, LSB of wIndex */ - __I uint32_t WINDEXH; /*!< SETUP data, byte 5, MSB of wIndex */ - __I uint32_t WLENGTHL; /*!< SETUP data, byte 6, LSB of wLength */ - __I uint32_t WLENGTHH; /*!< SETUP data, byte 7, MSB of wLength */ - USBD_SIZE_Type SIZE; /*!< Unspecified */ - __I uint32_t RESERVED8[15]; - __IO uint32_t ENABLE; /*!< Enable USB */ - __IO uint32_t USBPULLUP; /*!< Control of the USB pull-up */ - __IO uint32_t DPDMVALUE; /*!< State at which the DPDMDRIVE task will force D+ and D-. The - DPDMNODRIVE task reverts the control of the lines to MAC IP - (no forcing). */ - __IO uint32_t DTOGGLE; /*!< Data toggle control and status. */ - __IO uint32_t EPINEN; /*!< Endpoint IN enable */ - __IO uint32_t EPOUTEN; /*!< Endpoint OUT enable */ - __O uint32_t EPSTALL; /*!< STALL endpoints */ - __IO uint32_t ISOSPLIT; /*!< Controls the split of ISO buffers */ - __I uint32_t FRAMECNTR; /*!< Returns the current value of the start of frame counter */ - __I uint32_t RESERVED9[3]; - __IO uint32_t ISOINCONFIG; /*!< Controls the response of the ISO IN endpoint to an IN token - when no data is ready to be sent */ - __I uint32_t RESERVED10[51]; - USBD_EPIN_Type EPIN[8]; /*!< Unspecified */ - USBD_ISOIN_Type ISOIN; /*!< Unspecified */ - __I uint32_t RESERVED11[21]; - USBD_EPOUT_Type EPOUT[8]; /*!< Unspecified */ - USBD_ISOOUT_Type ISOOUT; /*!< Unspecified */ -} NRF_USBD_Type; - - -/* ================================================================================ */ -/* ================ QSPI ================ */ -/* ================================================================================ */ - - -/** - * @brief External flash interface (QSPI) - */ - -typedef struct { /*!< QSPI Structure */ - __O uint32_t TASKS_ACTIVATE; /*!< Activate QSPI interface */ - __O uint32_t TASKS_READSTART; /*!< Start transfer from external flash memory to internal RAM */ - __O uint32_t TASKS_WRITESTART; /*!< Start transfer from internal RAM to external flash memory */ - __O uint32_t TASKS_ERASESTART; /*!< Start external flash memory erase operation */ - __I uint32_t RESERVED0[60]; - __IO uint32_t EVENTS_READY; /*!< QSPI peripheral is ready. This event will be generated as a - response to any QSPI task. */ - __I uint32_t RESERVED1[127]; - __IO uint32_t INTEN; /*!< Enable or disable interrupt */ - __IO uint32_t INTENSET; /*!< Enable interrupt */ - __IO uint32_t INTENCLR; /*!< Disable interrupt */ - __I uint32_t RESERVED2[125]; - __IO uint32_t ENABLE; /*!< Enable QSPI peripheral and acquire the pins selected in PSELn - registers */ - QSPI_READ_Type READ; /*!< Unspecified */ - QSPI_WRITE_Type WRITE; /*!< Unspecified */ - QSPI_ERASE_Type ERASE; /*!< Unspecified */ - QSPI_PSEL_Type PSEL; /*!< Unspecified */ - __IO uint32_t XIPOFFSET; /*!< Address offset into the external memory for Execute in Place - operation. */ - __IO uint32_t IFCONFIG0; /*!< Interface configuration. */ - __I uint32_t RESERVED3[46]; - __IO uint32_t IFCONFIG1; /*!< Interface configuration. */ - __I uint32_t STATUS; /*!< Status register. */ - __I uint32_t RESERVED4[3]; - __IO uint32_t DPMDUR; /*!< Set the duration required to enter/exit deep power-down mode - (DPM). */ - __I uint32_t RESERVED5[3]; - __IO uint32_t ADDRCONF; /*!< Extended address configuration. */ - __I uint32_t RESERVED6[3]; - __IO uint32_t CINSTRCONF; /*!< Custom instruction configuration register. */ - __IO uint32_t CINSTRDAT0; /*!< Custom instruction data register 0. */ - __IO uint32_t CINSTRDAT1; /*!< Custom instruction data register 1. */ - __IO uint32_t IFTIMING; /*!< SPI interface timing. */ -} NRF_QSPI_Type; - - -/* ================================================================================ */ -/* ================ GPIO ================ */ -/* ================================================================================ */ - - -/** - * @brief GPIO Port 1 (GPIO) - */ - -typedef struct { /*!< GPIO Structure */ - __I uint32_t RESERVED0[321]; - __IO uint32_t OUT; /*!< Write GPIO port */ - __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port */ - __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port */ - __I uint32_t IN; /*!< Read GPIO port */ - __IO uint32_t DIR; /*!< Direction of GPIO pins */ - __IO uint32_t DIRSET; /*!< DIR set register */ - __IO uint32_t DIRCLR; /*!< DIR clear register */ - __IO uint32_t LATCH; /*!< Latch register indicating what GPIO pins that have met the criteria - set in the PIN_CNF[n].SENSE registers */ - __IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */ - __I uint32_t RESERVED1[118]; - __IO uint32_t PIN_CNF[32]; /*!< Description collection[0]: Configuration of GPIO pins */ -} NRF_GPIO_Type; - - -/* ================================================================================ */ -/* ================ CRYPTOCELL ================ */ -/* ================================================================================ */ - - -/** - * @brief ARM CryptoCell register interface (CRYPTOCELL) - */ - -typedef struct { /*!< CRYPTOCELL Structure */ - __I uint32_t RESERVED0[320]; - __IO uint32_t ENABLE; /*!< Control power and clock for ARM CryptoCell subsystem */ -} NRF_CRYPTOCELL_Type; - - -/* -------------------- End of section using anonymous unions ------------------- */ -#if defined(__CC_ARM) - #pragma pop -#elif defined(__ICCARM__) - /* leave anonymous unions enabled */ -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) - /* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning restore -#else - #warning Not supported compiler type -#endif - - - - -/* ================================================================================ */ -/* ================ Peripheral memory map ================ */ -/* ================================================================================ */ - -#define NRF_FICR_BASE 0x10000000UL -#define NRF_UICR_BASE 0x10001000UL -#define NRF_POWER_BASE 0x40000000UL -#define NRF_CLOCK_BASE 0x40000000UL -#define NRF_RADIO_BASE 0x40001000UL -#define NRF_UARTE0_BASE 0x40002000UL -#define NRF_UART0_BASE 0x40002000UL -#define NRF_SPIM0_BASE 0x40003000UL -#define NRF_SPIS0_BASE 0x40003000UL -#define NRF_TWIM0_BASE 0x40003000UL -#define NRF_TWIS0_BASE 0x40003000UL -#define NRF_SPI0_BASE 0x40003000UL -#define NRF_TWI0_BASE 0x40003000UL -#define NRF_SPIM1_BASE 0x40004000UL -#define NRF_SPIS1_BASE 0x40004000UL -#define NRF_TWIM1_BASE 0x40004000UL -#define NRF_TWIS1_BASE 0x40004000UL -#define NRF_SPI1_BASE 0x40004000UL -#define NRF_TWI1_BASE 0x40004000UL -#define NRF_NFCT_BASE 0x40005000UL -#define NRF_GPIOTE_BASE 0x40006000UL -#define NRF_SAADC_BASE 0x40007000UL -#define NRF_TIMER0_BASE 0x40008000UL -#define NRF_TIMER1_BASE 0x40009000UL -#define NRF_TIMER2_BASE 0x4000A000UL -#define NRF_RTC0_BASE 0x4000B000UL -#define NRF_TEMP_BASE 0x4000C000UL -#define NRF_RNG_BASE 0x4000D000UL -#define NRF_ECB_BASE 0x4000E000UL -#define NRF_CCM_BASE 0x4000F000UL -#define NRF_AAR_BASE 0x4000F000UL -#define NRF_WDT_BASE 0x40010000UL -#define NRF_RTC1_BASE 0x40011000UL -#define NRF_QDEC_BASE 0x40012000UL -#define NRF_COMP_BASE 0x40013000UL -#define NRF_LPCOMP_BASE 0x40013000UL -#define NRF_SWI0_BASE 0x40014000UL -#define NRF_EGU0_BASE 0x40014000UL -#define NRF_SWI1_BASE 0x40015000UL -#define NRF_EGU1_BASE 0x40015000UL -#define NRF_SWI2_BASE 0x40016000UL -#define NRF_EGU2_BASE 0x40016000UL -#define NRF_SWI3_BASE 0x40017000UL -#define NRF_EGU3_BASE 0x40017000UL -#define NRF_SWI4_BASE 0x40018000UL -#define NRF_EGU4_BASE 0x40018000UL -#define NRF_SWI5_BASE 0x40019000UL -#define NRF_EGU5_BASE 0x40019000UL -#define NRF_TIMER3_BASE 0x4001A000UL -#define NRF_TIMER4_BASE 0x4001B000UL -#define NRF_PWM0_BASE 0x4001C000UL -#define NRF_PDM_BASE 0x4001D000UL -#define NRF_NVMC_BASE 0x4001E000UL -#define NRF_ACL_BASE 0x4001E000UL -#define NRF_PPI_BASE 0x4001F000UL -#define NRF_MWU_BASE 0x40020000UL -#define NRF_PWM1_BASE 0x40021000UL -#define NRF_PWM2_BASE 0x40022000UL -#define NRF_SPIM2_BASE 0x40023000UL -#define NRF_SPIS2_BASE 0x40023000UL -#define NRF_SPI2_BASE 0x40023000UL -#define NRF_RTC2_BASE 0x40024000UL -#define NRF_I2S_BASE 0x40025000UL -#define NRF_FPU_BASE 0x40026000UL -#define NRF_USBD_BASE 0x40027000UL -#define NRF_UARTE1_BASE 0x40028000UL -#define NRF_QSPI_BASE 0x40029000UL -#define NRF_SPIM3_BASE 0x4002B000UL -#define NRF_PWM3_BASE 0x4002D000UL -#define NRF_P0_BASE 0x50000000UL -#define NRF_P1_BASE 0x50000300UL -#define NRF_CRYPTOCELL_BASE 0x5002A000UL - - -/* ================================================================================ */ -/* ================ Peripheral declaration ================ */ -/* ================================================================================ */ - -#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) -#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) -#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) -#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) -#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) -#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) -#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) -#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE) -#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE) -#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE) -#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE) -#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE) -#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE) -#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE) -#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE) -#define NRF_TWIM1 ((NRF_TWIM_Type *) NRF_TWIM1_BASE) -#define NRF_TWIS1 ((NRF_TWIS_Type *) NRF_TWIS1_BASE) -#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE) -#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE) -#define NRF_NFCT ((NRF_NFCT_Type *) NRF_NFCT_BASE) -#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) -#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE) -#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) -#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) -#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) -#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) -#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) -#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) -#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) -#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) -#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) -#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) -#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) -#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) -#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE) -#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE) -#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE) -#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE) -#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE) -#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE) -#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE) -#define NRF_EGU2 ((NRF_EGU_Type *) NRF_EGU2_BASE) -#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE) -#define NRF_EGU3 ((NRF_EGU_Type *) NRF_EGU3_BASE) -#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE) -#define NRF_EGU4 ((NRF_EGU_Type *) NRF_EGU4_BASE) -#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE) -#define NRF_EGU5 ((NRF_EGU_Type *) NRF_EGU5_BASE) -#define NRF_TIMER3 ((NRF_TIMER_Type *) NRF_TIMER3_BASE) -#define NRF_TIMER4 ((NRF_TIMER_Type *) NRF_TIMER4_BASE) -#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE) -#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE) -#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) -#define NRF_ACL ((NRF_ACL_Type *) NRF_ACL_BASE) -#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) -#define NRF_MWU ((NRF_MWU_Type *) NRF_MWU_BASE) -#define NRF_PWM1 ((NRF_PWM_Type *) NRF_PWM1_BASE) -#define NRF_PWM2 ((NRF_PWM_Type *) NRF_PWM2_BASE) -#define NRF_SPIM2 ((NRF_SPIM_Type *) NRF_SPIM2_BASE) -#define NRF_SPIS2 ((NRF_SPIS_Type *) NRF_SPIS2_BASE) -#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE) -#define NRF_RTC2 ((NRF_RTC_Type *) NRF_RTC2_BASE) -#define NRF_I2S ((NRF_I2S_Type *) NRF_I2S_BASE) -#define NRF_FPU ((NRF_FPU_Type *) NRF_FPU_BASE) -#define NRF_USBD ((NRF_USBD_Type *) NRF_USBD_BASE) -#define NRF_UARTE1 ((NRF_UARTE_Type *) NRF_UARTE1_BASE) -#define NRF_QSPI ((NRF_QSPI_Type *) NRF_QSPI_BASE) -#define NRF_SPIM3 ((NRF_SPIM_Type *) NRF_SPIM3_BASE) -#define NRF_PWM3 ((NRF_PWM_Type *) NRF_PWM3_BASE) -#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE) -#define NRF_P1 ((NRF_GPIO_Type *) NRF_P1_BASE) -#define NRF_CRYPTOCELL ((NRF_CRYPTOCELL_Type *) NRF_CRYPTOCELL_BASE) - - -/** @} */ /* End of group Device_Peripheral_Registers */ -/** @} */ /* End of group nrf52840 */ -/** @} */ /* End of group Nordic Semiconductor */ - -#ifdef __cplusplus -} -#endif - - -#endif /* nrf52840_H */ - diff --git a/ports/nrf/device/nrf52/nrf52840_bitfields.h b/ports/nrf/device/nrf52/nrf52840_bitfields.h deleted file mode 100644 index 17f63b4ec2800..0000000000000 --- a/ports/nrf/device/nrf52/nrf52840_bitfields.h +++ /dev/null @@ -1,14633 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __NRF52840_BITS_H -#define __NRF52840_BITS_H - -/*lint ++flb "Enter library region" */ - -/* Peripheral: AAR */ -/* Description: Accelerated Address Resolver */ - -/* Register: AAR_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */ -#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */ -#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for END event */ -#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Register: AAR_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for NOTRESOLVED event */ -#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for RESOLVED event */ -#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for END event */ -#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Register: AAR_STATUS */ -/* Description: Resolution status */ - -/* Bits 3..0 : The IRK that was used last time an address was resolved */ -#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ - -/* Register: AAR_ENABLE */ -/* Description: Enable AAR */ - -/* Bits 1..0 : Enable or disable AAR */ -#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */ - -/* Register: AAR_NIRK */ -/* Description: Number of IRKs */ - -/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */ -#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ -#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ - -/* Register: AAR_IRKPTR */ -/* Description: Pointer to IRK data structure */ - -/* Bits 31..0 : Pointer to the IRK data structure */ -#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */ -#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */ - -/* Register: AAR_ADDRPTR */ -/* Description: Pointer to the resolvable address */ - -/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */ -#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */ -#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */ - -/* Register: AAR_SCRATCHPTR */ -/* Description: Pointer to data area used for temporary storage */ - -/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */ -#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ -#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ - - -/* Peripheral: ACL */ -/* Description: Access control lists */ - -/* Register: ACL_DISABLEINDEBUG */ -/* Description: Disable all ACL protection mechanisms for regions while in debug mode */ - -/* Bit 0 : Disable the protection mechanism for regions while in debug mode. */ -#define ACL_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ -#define ACL_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << ACL_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ -#define ACL_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< ACL is enabled in debug mode */ -#define ACL_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< ACL is disabled in debug mode */ - -/* Register: ACL_ACL_ADDR */ -/* Description: Description cluster[0]: Configure the word-aligned start address of region 0 to protect */ - -/* Bits 31..0 : Valid word-aligned start address of region 0 to protect. Address must point to a flash page boundary. */ -#define ACL_ACL_ADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */ -#define ACL_ACL_ADDR_ADDR_Msk (0xFFFFFFFFUL << ACL_ACL_ADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */ - -/* Register: ACL_ACL_SIZE */ -/* Description: Description cluster[0]: Size of region to protect counting from address ACL[0].ADDR. Write '0' as no effect. */ - -/* Bits 31..0 : Size of flash region 0 in bytes. Must be a multiple of the flash page size. */ -#define ACL_ACL_SIZE_SIZE_Pos (0UL) /*!< Position of SIZE field. */ -#define ACL_ACL_SIZE_SIZE_Msk (0xFFFFFFFFUL << ACL_ACL_SIZE_SIZE_Pos) /*!< Bit mask of SIZE field. */ - -/* Register: ACL_ACL_PERM */ -/* Description: Description cluster[0]: Access permissions for region 0 as defined by start address ACL[0].ADDR and size ACL[0].SIZE */ - -/* Bit 2 : Configure read permissions for region 0. Write '0' has no effect. */ -#define ACL_ACL_PERM_READ_Pos (2UL) /*!< Position of READ field. */ -#define ACL_ACL_PERM_READ_Msk (0x1UL << ACL_ACL_PERM_READ_Pos) /*!< Bit mask of READ field. */ -#define ACL_ACL_PERM_READ_Enable (0UL) /*!< Allow read instructions to region 0 */ -#define ACL_ACL_PERM_READ_Disable (1UL) /*!< Block read instructions to region 0 */ - -/* Bit 1 : Configure write and erase permissions for region 0. Write '0' has no effect. */ -#define ACL_ACL_PERM_WRITE_Pos (1UL) /*!< Position of WRITE field. */ -#define ACL_ACL_PERM_WRITE_Msk (0x1UL << ACL_ACL_PERM_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define ACL_ACL_PERM_WRITE_Enable (0UL) /*!< Allow write and erase instructions to region 0 */ -#define ACL_ACL_PERM_WRITE_Disable (1UL) /*!< Block write and erase instructions to region 0 */ - - -/* Peripheral: CCM */ -/* Description: AES CCM Mode Encryption */ - -/* Register: CCM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: CCM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for ERROR event */ -#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for ENDCRYPT event */ -#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for ENDKSGEN event */ -#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */ - -/* Register: CCM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for ERROR event */ -#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for ENDCRYPT event */ -#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for ENDKSGEN event */ -#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */ - -/* Register: CCM_MICSTATUS */ -/* Description: MIC check result */ - -/* Bit 0 : The result of the MIC check performed during the previous decryption operation */ -#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */ -#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */ - -/* Register: CCM_ENABLE */ -/* Description: Enable */ - -/* Bits 1..0 : Enable or disable CCM */ -#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ - -/* Register: CCM_MODE */ -/* Description: Operation mode */ - -/* Bit 24 : Packet length configuration */ -#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */ -#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ -#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packets up to 27 bytes will be generated. */ -#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packets up to MAXPACKETSIZE bytes will be generated. */ - -/* Bits 17..16 : Radio data rate that the CCM shall run synchronous with */ -#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */ -#define CCM_MODE_DATARATE_Msk (0x3UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */ -#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< 1 Mbps */ -#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< 2 Mbps */ -#define CCM_MODE_DATARATE_125Kbps (2UL) /*!< 125 Kbps */ -#define CCM_MODE_DATARATE_500Kbps (3UL) /*!< 500 Kbps */ - -/* Bit 0 : The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered. */ -#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */ -#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */ - -/* Register: CCM_CNFPTR */ -/* Description: Pointer to data structure holding AES key and NONCE vector */ - -/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */ -#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */ -#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */ - -/* Register: CCM_INPTR */ -/* Description: Input pointer */ - -/* Bits 31..0 : Input pointer */ -#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */ -#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */ - -/* Register: CCM_OUTPTR */ -/* Description: Output pointer */ - -/* Bits 31..0 : Output pointer */ -#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */ -#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */ - -/* Register: CCM_SCRATCHPTR */ -/* Description: Pointer to data area used for temporary storage */ - -/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption. */ -#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ -#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ - -/* Register: CCM_MAXPACKETSIZE */ -/* Description: Length of key-stream generated when MODE.LENGTH = Extended. */ - -/* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet to be encrypted/decrypted. */ -#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos (0UL) /*!< Position of MAXPACKETSIZE field. */ -#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk (0xFFUL << CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos) /*!< Bit mask of MAXPACKETSIZE field. */ - -/* Register: CCM_RATEOVERRIDE */ -/* Description: Data rate override setting. */ - -/* Bits 1..0 : Data rate override setting. */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_Pos (0UL) /*!< Position of RATEOVERRIDE field. */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_Msk (0x3UL << CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) /*!< Bit mask of RATEOVERRIDE field. */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit (0UL) /*!< 1 Mbps */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit (1UL) /*!< 2 Mbps */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps (2UL) /*!< 125 Kbps */ -#define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps (3UL) /*!< 500 Kbps */ - - -/* Peripheral: CLOCK */ -/* Description: Clock control */ - -/* Register: CLOCK_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 4 : Write '1' to Enable interrupt for CTTO event */ -#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for DONE event */ -#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for LFCLKSTARTED event */ -#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for HFCLKSTARTED event */ -#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */ - -/* Register: CLOCK_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 4 : Write '1' to Disable interrupt for CTTO event */ -#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for DONE event */ -#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for LFCLKSTARTED event */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for HFCLKSTARTED event */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */ - -/* Register: CLOCK_HFCLKRUN */ -/* Description: Status indicating that HFCLKSTART task has been triggered */ - -/* Bit 0 : HFCLKSTART task triggered or not */ -#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ -#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ - -/* Register: CLOCK_HFCLKSTAT */ -/* Description: HFCLK status */ - -/* Bit 16 : HFCLK state */ -#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */ -#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */ - -/* Bit 0 : Source of HFCLK */ -#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */ -#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */ - -/* Register: CLOCK_LFCLKRUN */ -/* Description: Status indicating that LFCLKSTART task has been triggered */ - -/* Bit 0 : LFCLKSTART task triggered or not */ -#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ -#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ - -/* Register: CLOCK_LFCLKSTAT */ -/* Description: LFCLK status */ - -/* Bit 16 : LFCLK state */ -#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */ -#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */ - -/* Bits 1..0 : Source of LFCLK */ -#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ -#define CLOCK_LFCLKSTAT_SRC_LFULP (3UL) /*!< 32.768 kHz ultra low power RC oscillator */ - -/* Register: CLOCK_LFCLKSRCCOPY */ -/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ - -/* Bits 1..0 : Clock source */ -#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ -#define CLOCK_LFCLKSRCCOPY_SRC_LFULP (3UL) /*!< 32.768 kHz ultra low power RC oscillator */ - -/* Register: CLOCK_LFCLKSRC */ -/* Description: Clock source for the LFCLK */ - -/* Bit 17 : Enable or disable external source for LFCLK */ -#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */ -#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */ -#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */ -#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */ - -/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */ -#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */ -#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */ -#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */ -#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */ - -/* Bits 1..0 : Clock source */ -#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ -#define CLOCK_LFCLKSRC_SRC_LFULP (3UL) /*!< 32.768 kHz ultra low power RC oscillator */ - -/* Register: CLOCK_CTIV */ -/* Description: Calibration timer interval */ - -/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */ -#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ -#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ - -/* Register: CLOCK_TRACECONFIG */ -/* Description: Clocking options for the Trace Port debug interface */ - -/* Bits 17..16 : Pin multiplexing of trace signals. */ -#define CLOCK_TRACECONFIG_TRACEMUX_Pos (16UL) /*!< Position of TRACEMUX field. */ -#define CLOCK_TRACECONFIG_TRACEMUX_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos) /*!< Bit mask of TRACEMUX field. */ -#define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< GPIOs multiplexed onto all trace-pins */ -#define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins */ -#define CLOCK_TRACECONFIG_TRACEMUX_Parallel (2UL) /*!< TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14. */ - -/* Bits 1..0 : Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos (0UL) /*!< Position of TRACEPORTSPEED field. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) /*!< Bit mask of TRACEPORTSPEED field. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz (0UL) /*!< 32 MHz Trace Port clock (TRACECLK = 16 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz (1UL) /*!< 16 MHz Trace Port clock (TRACECLK = 8 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz (2UL) /*!< 8 MHz Trace Port clock (TRACECLK = 4 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz (3UL) /*!< 4 MHz Trace Port clock (TRACECLK = 2 MHz) */ - - -/* Peripheral: COMP */ -/* Description: Comparator */ - -/* Register: COMP_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between CROSS event and STOP task */ -#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ -#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ -#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between UP event and STOP task */ -#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ -#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ -#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DOWN event and STOP task */ -#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ -#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ -#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between READY event and STOP task */ -#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ -#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ -#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and SAMPLE task */ -#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ -#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ -#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: COMP_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 3 : Enable or disable interrupt for CROSS event */ -#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for UP event */ -#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for DOWN event */ -#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for READY event */ -#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */ - -/* Register: COMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ -#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for UP event */ -#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ -#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: COMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ -#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for UP event */ -#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ -#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: COMP_RESULT */ -/* Description: Compare result */ - -/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ -#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ -#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */ -#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */ - -/* Register: COMP_ENABLE */ -/* Description: COMP enable */ - -/* Bits 1..0 : Enable or disable COMP */ -#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ - -/* Register: COMP_PSEL */ -/* Description: Pin select */ - -/* Bits 2..0 : Analog pin select */ -#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ -#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ - -/* Register: COMP_REFSEL */ -/* Description: Reference source select */ - -/* Bits 2..0 : Reference select */ -#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ -#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */ -#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */ -#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */ -#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */ -#define COMP_REFSEL_REFSEL_ARef (7UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */ - -/* Register: COMP_EXTREFSEL */ -/* Description: External reference select */ - -/* Bit 0 : External analog reference select */ -#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ -#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ -#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ - -/* Register: COMP_TH */ -/* Description: Threshold configuration for hysteresis unit */ - -/* Bits 13..8 : VUP = (THUP+1)/64*VREF */ -#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */ -#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */ - -/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */ -#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */ -#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */ - -/* Register: COMP_MODE */ -/* Description: Mode configuration */ - -/* Bit 8 : Main operation mode */ -#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */ -#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */ -#define COMP_MODE_MAIN_SE (0UL) /*!< Single ended mode */ -#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */ - -/* Bits 1..0 : Speed and power mode */ -#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */ -#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */ -#define COMP_MODE_SP_Low (0UL) /*!< Low power mode */ -#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */ -#define COMP_MODE_SP_High (2UL) /*!< High speed mode */ - -/* Register: COMP_HYST */ -/* Description: Comparator hysteresis enable */ - -/* Bit 0 : Comparator hysteresis */ -#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ -#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ -#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ -#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */ - -/* Register: COMP_ISOURCE */ -/* Description: Current source select on analog input */ - -/* Bits 1..0 : Comparator hysteresis */ -#define COMP_ISOURCE_ISOURCE_Pos (0UL) /*!< Position of ISOURCE field. */ -#define COMP_ISOURCE_ISOURCE_Msk (0x3UL << COMP_ISOURCE_ISOURCE_Pos) /*!< Bit mask of ISOURCE field. */ -#define COMP_ISOURCE_ISOURCE_Off (0UL) /*!< Current source disabled */ -#define COMP_ISOURCE_ISOURCE_Ien2mA5 (1UL) /*!< Current source enabled (+/- 2.5 uA) */ -#define COMP_ISOURCE_ISOURCE_Ien5mA (2UL) /*!< Current source enabled (+/- 5 uA) */ -#define COMP_ISOURCE_ISOURCE_Ien10mA (3UL) /*!< Current source enabled (+/- 10 uA) */ - - -/* Peripheral: CRYPTOCELL */ -/* Description: ARM CryptoCell register interface */ - -/* Register: CRYPTOCELL_ENABLE */ -/* Description: Control power and clock for ARM CryptoCell subsystem */ - -/* Bit 0 : Enable or disable the CryptoCell subsystem */ -#define CRYPTOCELL_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define CRYPTOCELL_ENABLE_ENABLE_Msk (0x1UL << CRYPTOCELL_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define CRYPTOCELL_ENABLE_ENABLE_Disabled (0UL) /*!< CryptoCell subsystem disabled */ -#define CRYPTOCELL_ENABLE_ENABLE_Enabled (1UL) /*!< CryptoCell subsystem enabled */ - - -/* Peripheral: ECB */ -/* Description: AES ECB Mode Encryption */ - -/* Register: ECB_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 1 : Write '1' to Enable interrupt for ERRORECB event */ -#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for ENDECB event */ -#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */ - -/* Register: ECB_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 1 : Write '1' to Disable interrupt for ERRORECB event */ -#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for ENDECB event */ -#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */ - -/* Register: ECB_ECBDATAPTR */ -/* Description: ECB block encrypt memory pointers */ - -/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */ -#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */ -#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */ - - -/* Peripheral: EGU */ -/* Description: Event Generator Unit 0 */ - -/* Register: EGU_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 15 : Enable or disable interrupt for TRIGGERED[15] event */ -#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for TRIGGERED[14] event */ -#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */ - -/* Bit 13 : Enable or disable interrupt for TRIGGERED[13] event */ -#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for TRIGGERED[12] event */ -#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for TRIGGERED[11] event */ -#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for TRIGGERED[10] event */ -#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for TRIGGERED[9] event */ -#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for TRIGGERED[8] event */ -#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for TRIGGERED[7] event */ -#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for TRIGGERED[6] event */ -#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for TRIGGERED[5] event */ -#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for TRIGGERED[4] event */ -#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for TRIGGERED[3] event */ -#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for TRIGGERED[2] event */ -#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for TRIGGERED[1] event */ -#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for TRIGGERED[0] event */ -#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */ - -/* Register: EGU_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 15 : Write '1' to Enable interrupt for TRIGGERED[15] event */ -#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for TRIGGERED[14] event */ -#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for TRIGGERED[13] event */ -#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for TRIGGERED[12] event */ -#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for TRIGGERED[11] event */ -#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for TRIGGERED[10] event */ -#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for TRIGGERED[9] event */ -#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for TRIGGERED[8] event */ -#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TRIGGERED[7] event */ -#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for TRIGGERED[6] event */ -#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for TRIGGERED[5] event */ -#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for TRIGGERED[4] event */ -#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for TRIGGERED[3] event */ -#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for TRIGGERED[2] event */ -#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for TRIGGERED[1] event */ -#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for TRIGGERED[0] event */ -#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */ - -/* Register: EGU_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 15 : Write '1' to Disable interrupt for TRIGGERED[15] event */ -#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for TRIGGERED[14] event */ -#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for TRIGGERED[13] event */ -#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for TRIGGERED[12] event */ -#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for TRIGGERED[11] event */ -#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for TRIGGERED[10] event */ -#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for TRIGGERED[9] event */ -#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for TRIGGERED[8] event */ -#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TRIGGERED[7] event */ -#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for TRIGGERED[6] event */ -#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for TRIGGERED[5] event */ -#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for TRIGGERED[4] event */ -#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for TRIGGERED[3] event */ -#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for TRIGGERED[2] event */ -#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for TRIGGERED[1] event */ -#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for TRIGGERED[0] event */ -#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */ - - -/* Peripheral: FICR */ -/* Description: Factory Information Configuration Registers */ - -/* Register: FICR_CODEPAGESIZE */ -/* Description: Code memory page size */ - -/* Bits 31..0 : Code memory page size */ -#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */ -#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */ - -/* Register: FICR_CODESIZE */ -/* Description: Code memory size */ - -/* Bits 31..0 : Code memory size in number of pages */ -#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */ -#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */ - -/* Register: FICR_DEVICEID */ -/* Description: Description collection[0]: Device identifier */ - -/* Bits 31..0 : 64 bit unique device identifier */ -#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */ -#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */ - -/* Register: FICR_ER */ -/* Description: Description collection[0]: Encryption root, word 0 */ - -/* Bits 31..0 : Encryption root, word 0 */ -#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */ -#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */ - -/* Register: FICR_IR */ -/* Description: Description collection[0]: Identity Root, word 0 */ - -/* Bits 31..0 : Identity Root, word 0 */ -#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */ -#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */ - -/* Register: FICR_DEVICEADDRTYPE */ -/* Description: Device address type */ - -/* Bit 0 : Device address type */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */ - -/* Register: FICR_DEVICEADDR */ -/* Description: Description collection[0]: Device address 0 */ - -/* Bits 31..0 : 48 bit device address */ -#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */ -#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */ - -/* Register: FICR_INFO_PART */ -/* Description: Part code */ - -/* Bits 31..0 : Part code */ -#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ -#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ -#define FICR_INFO_PART_PART_N52840 (0x52840UL) /*!< nRF52840 */ -#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_VARIANT */ -/* Description: Part variant (hardware version and production configuration). */ - -/* Bits 31..0 : Part variant (hardware version and production configuration). Encoded as ASCII. */ -#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */ -#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */ -#define FICR_INFO_VARIANT_VARIANT_AAB0 (0x41414230UL) /*!< AAB0 */ -#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */ -#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */ -#define FICR_INFO_VARIANT_VARIANT_ABBA (0x41424241UL) /*!< ABBA */ -#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_PACKAGE */ -/* Description: Package option */ - -/* Bits 31..0 : Package option */ -#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_QI (0x2004UL) /*!< QIxx - 73-pin aQFN */ -#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_RAM */ -/* Description: RAM variant */ - -/* Bits 31..0 : RAM variant */ -#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ -#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ -#define FICR_INFO_RAM_RAM_K16 (0x10UL) /*!< 16 kByte RAM */ -#define FICR_INFO_RAM_RAM_K32 (0x20UL) /*!< 32 kByte RAM */ -#define FICR_INFO_RAM_RAM_K64 (0x40UL) /*!< 64 kByte RAM */ -#define FICR_INFO_RAM_RAM_K128 (0x80UL) /*!< 128 kByte RAM */ -#define FICR_INFO_RAM_RAM_K256 (0x100UL) /*!< 256 kByte RAM */ -#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_FLASH */ -/* Description: Flash variant */ - -/* Bits 31..0 : Flash variant */ -#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_K128 (0x80UL) /*!< 128 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K256 (0x100UL) /*!< 256 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K512 (0x200UL) /*!< 512 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K1024 (0x400UL) /*!< 1 MByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K2048 (0x800UL) /*!< 2 MByte FLASH */ -#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_TEMP_A0 */ -/* Description: Slope definition A0. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A1 */ -/* Description: Slope definition A1. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A2 */ -/* Description: Slope definition A2. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A3 */ -/* Description: Slope definition A3. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A4 */ -/* Description: Slope definition A4. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A5 */ -/* Description: Slope definition A5. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_B0 */ -/* Description: y-intercept B0. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B1 */ -/* Description: y-intercept B1. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B2 */ -/* Description: y-intercept B2. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B3 */ -/* Description: y-intercept B3. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B4 */ -/* Description: y-intercept B4. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B5 */ -/* Description: y-intercept B5. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_T0 */ -/* Description: Segment end T0. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T1 */ -/* Description: Segment end T1. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T2 */ -/* Description: Segment end T2. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T3 */ -/* Description: Segment end T3. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T4 */ -/* Description: Segment end T4. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_NFC_TAGHEADER0 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 3 */ -#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */ -#define FICR_NFC_TAGHEADER0_UD3_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos) /*!< Bit mask of UD3 field. */ - -/* Bits 23..16 : Unique identifier byte 2 */ -#define FICR_NFC_TAGHEADER0_UD2_Pos (16UL) /*!< Position of UD2 field. */ -#define FICR_NFC_TAGHEADER0_UD2_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos) /*!< Bit mask of UD2 field. */ - -/* Bits 15..8 : Unique identifier byte 1 */ -#define FICR_NFC_TAGHEADER0_UD1_Pos (8UL) /*!< Position of UD1 field. */ -#define FICR_NFC_TAGHEADER0_UD1_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos) /*!< Bit mask of UD1 field. */ - -/* Bits 7..0 : Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F */ -#define FICR_NFC_TAGHEADER0_MFGID_Pos (0UL) /*!< Position of MFGID field. */ -#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */ - -/* Register: FICR_NFC_TAGHEADER1 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 7 */ -#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */ -#define FICR_NFC_TAGHEADER1_UD7_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos) /*!< Bit mask of UD7 field. */ - -/* Bits 23..16 : Unique identifier byte 6 */ -#define FICR_NFC_TAGHEADER1_UD6_Pos (16UL) /*!< Position of UD6 field. */ -#define FICR_NFC_TAGHEADER1_UD6_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos) /*!< Bit mask of UD6 field. */ - -/* Bits 15..8 : Unique identifier byte 5 */ -#define FICR_NFC_TAGHEADER1_UD5_Pos (8UL) /*!< Position of UD5 field. */ -#define FICR_NFC_TAGHEADER1_UD5_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos) /*!< Bit mask of UD5 field. */ - -/* Bits 7..0 : Unique identifier byte 4 */ -#define FICR_NFC_TAGHEADER1_UD4_Pos (0UL) /*!< Position of UD4 field. */ -#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */ - -/* Register: FICR_NFC_TAGHEADER2 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 11 */ -#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */ -#define FICR_NFC_TAGHEADER2_UD11_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos) /*!< Bit mask of UD11 field. */ - -/* Bits 23..16 : Unique identifier byte 10 */ -#define FICR_NFC_TAGHEADER2_UD10_Pos (16UL) /*!< Position of UD10 field. */ -#define FICR_NFC_TAGHEADER2_UD10_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos) /*!< Bit mask of UD10 field. */ - -/* Bits 15..8 : Unique identifier byte 9 */ -#define FICR_NFC_TAGHEADER2_UD9_Pos (8UL) /*!< Position of UD9 field. */ -#define FICR_NFC_TAGHEADER2_UD9_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos) /*!< Bit mask of UD9 field. */ - -/* Bits 7..0 : Unique identifier byte 8 */ -#define FICR_NFC_TAGHEADER2_UD8_Pos (0UL) /*!< Position of UD8 field. */ -#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */ - -/* Register: FICR_NFC_TAGHEADER3 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 15 */ -#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */ -#define FICR_NFC_TAGHEADER3_UD15_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos) /*!< Bit mask of UD15 field. */ - -/* Bits 23..16 : Unique identifier byte 14 */ -#define FICR_NFC_TAGHEADER3_UD14_Pos (16UL) /*!< Position of UD14 field. */ -#define FICR_NFC_TAGHEADER3_UD14_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos) /*!< Bit mask of UD14 field. */ - -/* Bits 15..8 : Unique identifier byte 13 */ -#define FICR_NFC_TAGHEADER3_UD13_Pos (8UL) /*!< Position of UD13 field. */ -#define FICR_NFC_TAGHEADER3_UD13_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos) /*!< Bit mask of UD13 field. */ - -/* Bits 7..0 : Unique identifier byte 12 */ -#define FICR_NFC_TAGHEADER3_UD12_Pos (0UL) /*!< Position of UD12 field. */ -#define FICR_NFC_TAGHEADER3_UD12_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos) /*!< Bit mask of UD12 field. */ - - -/* Peripheral: GPIOTE */ -/* Description: GPIO Tasks and Events */ - -/* Register: GPIOTE_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 31 : Write '1' to Enable interrupt for PORT event */ -#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for IN[7] event */ -#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */ -#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */ -#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for IN[6] event */ -#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */ -#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */ -#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for IN[5] event */ -#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */ -#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */ -#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for IN[4] event */ -#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */ -#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */ -#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for IN[3] event */ -#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for IN[2] event */ -#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for IN[1] event */ -#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for IN[0] event */ -#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */ - -/* Register: GPIOTE_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 31 : Write '1' to Disable interrupt for PORT event */ -#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for IN[7] event */ -#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */ -#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */ -#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for IN[6] event */ -#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */ -#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */ -#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for IN[5] event */ -#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */ -#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */ -#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for IN[4] event */ -#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */ -#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */ -#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for IN[3] event */ -#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for IN[2] event */ -#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for IN[1] event */ -#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for IN[0] event */ -#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */ - -/* Register: GPIOTE_CONFIG */ -/* Description: Description collection[0]: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */ - -/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */ -#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */ -#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */ - -/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */ -#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */ -#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */ -#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */ -#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */ - -/* Bits 14..13 : Port number */ -#define GPIOTE_CONFIG_PORT_Pos (13UL) /*!< Position of PORT field. */ -#define GPIOTE_CONFIG_PORT_Msk (0x3UL << GPIOTE_CONFIG_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */ -#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ -#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ - -/* Bits 1..0 : Mode */ -#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */ -#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */ -#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */ - - -/* Peripheral: I2S */ -/* Description: Inter-IC Sound */ - -/* Register: I2S_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 5 : Enable or disable interrupt for TXPTRUPD event */ -#define I2S_INTEN_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTEN_TXPTRUPD_Msk (0x1UL << I2S_INTEN_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTEN_TXPTRUPD_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_TXPTRUPD_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for STOPPED event */ -#define I2S_INTEN_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTEN_STOPPED_Msk (0x1UL << I2S_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for RXPTRUPD event */ -#define I2S_INTEN_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTEN_RXPTRUPD_Msk (0x1UL << I2S_INTEN_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTEN_RXPTRUPD_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_RXPTRUPD_Enabled (1UL) /*!< Enable */ - -/* Register: I2S_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 5 : Write '1' to Enable interrupt for TXPTRUPD event */ -#define I2S_INTENSET_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTENSET_TXPTRUPD_Msk (0x1UL << I2S_INTENSET_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTENSET_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_TXPTRUPD_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for STOPPED event */ -#define I2S_INTENSET_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTENSET_STOPPED_Msk (0x1UL << I2S_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for RXPTRUPD event */ -#define I2S_INTENSET_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTENSET_RXPTRUPD_Msk (0x1UL << I2S_INTENSET_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTENSET_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_RXPTRUPD_Set (1UL) /*!< Enable */ - -/* Register: I2S_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 5 : Write '1' to Disable interrupt for TXPTRUPD event */ -#define I2S_INTENCLR_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTENCLR_TXPTRUPD_Msk (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTENCLR_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_TXPTRUPD_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for STOPPED event */ -#define I2S_INTENCLR_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTENCLR_STOPPED_Msk (0x1UL << I2S_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for RXPTRUPD event */ -#define I2S_INTENCLR_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTENCLR_RXPTRUPD_Msk (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTENCLR_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_RXPTRUPD_Clear (1UL) /*!< Disable */ - -/* Register: I2S_ENABLE */ -/* Description: Enable I2S module. */ - -/* Bit 0 : Enable I2S module. */ -#define I2S_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define I2S_ENABLE_ENABLE_Msk (0x1UL << I2S_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define I2S_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define I2S_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: I2S_CONFIG_MODE */ -/* Description: I2S mode. */ - -/* Bit 0 : I2S mode. */ -#define I2S_CONFIG_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define I2S_CONFIG_MODE_MODE_Msk (0x1UL << I2S_CONFIG_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define I2S_CONFIG_MODE_MODE_Master (0UL) /*!< Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx. */ -#define I2S_CONFIG_MODE_MODE_Slave (1UL) /*!< Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx */ - -/* Register: I2S_CONFIG_RXEN */ -/* Description: Reception (RX) enable. */ - -/* Bit 0 : Reception (RX) enable. */ -#define I2S_CONFIG_RXEN_RXEN_Pos (0UL) /*!< Position of RXEN field. */ -#define I2S_CONFIG_RXEN_RXEN_Msk (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos) /*!< Bit mask of RXEN field. */ -#define I2S_CONFIG_RXEN_RXEN_Disabled (0UL) /*!< Reception disabled and now data will be written to the RXD.PTR address. */ -#define I2S_CONFIG_RXEN_RXEN_Enabled (1UL) /*!< Reception enabled. */ - -/* Register: I2S_CONFIG_TXEN */ -/* Description: Transmission (TX) enable. */ - -/* Bit 0 : Transmission (TX) enable. */ -#define I2S_CONFIG_TXEN_TXEN_Pos (0UL) /*!< Position of TXEN field. */ -#define I2S_CONFIG_TXEN_TXEN_Msk (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos) /*!< Bit mask of TXEN field. */ -#define I2S_CONFIG_TXEN_TXEN_Disabled (0UL) /*!< Transmission disabled and now data will be read from the RXD.TXD address. */ -#define I2S_CONFIG_TXEN_TXEN_Enabled (1UL) /*!< Transmission enabled. */ - -/* Register: I2S_CONFIG_MCKEN */ -/* Description: Master clock generator enable. */ - -/* Bit 0 : Master clock generator enable. */ -#define I2S_CONFIG_MCKEN_MCKEN_Pos (0UL) /*!< Position of MCKEN field. */ -#define I2S_CONFIG_MCKEN_MCKEN_Msk (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos) /*!< Bit mask of MCKEN field. */ -#define I2S_CONFIG_MCKEN_MCKEN_Disabled (0UL) /*!< Master clock generator disabled and PSEL.MCK not connected(available as GPIO). */ -#define I2S_CONFIG_MCKEN_MCKEN_Enabled (1UL) /*!< Master clock generator running and MCK output on PSEL.MCK. */ - -/* Register: I2S_CONFIG_MCKFREQ */ -/* Description: Master clock generator frequency. */ - -/* Bits 31..0 : Master clock generator frequency. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos (0UL) /*!< Position of MCKFREQ field. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos) /*!< Bit mask of MCKFREQ field. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 (0x020C0000UL) /*!< 32 MHz / 125 = 0.256 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63 (0x04100000UL) /*!< 32 MHz / 63 = 0.5079365 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42 (0x06000000UL) /*!< 32 MHz / 42 = 0.7619048 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32 (0x08000000UL) /*!< 32 MHz / 32 = 1.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31 (0x08400000UL) /*!< 32 MHz / 31 = 1.0322581 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30 (0x08800000UL) /*!< 32 MHz / 30 = 1.0666667 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23 (0x0B000000UL) /*!< 32 MHz / 23 = 1.3913043 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21 (0x0C000000UL) /*!< 32 MHz / 21 = 1.5238095 */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16 (0x10000000UL) /*!< 32 MHz / 16 = 2.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15 (0x11000000UL) /*!< 32 MHz / 15 = 2.1333333 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11 (0x16000000UL) /*!< 32 MHz / 11 = 2.9090909 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10 (0x18000000UL) /*!< 32 MHz / 10 = 3.2 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8 (0x20000000UL) /*!< 32 MHz / 8 = 4.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6 (0x28000000UL) /*!< 32 MHz / 6 = 5.3333333 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5 (0x30000000UL) /*!< 32 MHz / 5 = 6.4 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4 (0x40000000UL) /*!< 32 MHz / 4 = 8.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3 (0x50000000UL) /*!< 32 MHz / 3 = 10.6666667 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2 (0x80000000UL) /*!< 32 MHz / 2 = 16.0 MHz */ - -/* Register: I2S_CONFIG_RATIO */ -/* Description: MCK / LRCK ratio. */ - -/* Bits 3..0 : MCK / LRCK ratio. */ -#define I2S_CONFIG_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ -#define I2S_CONFIG_RATIO_RATIO_Msk (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ -#define I2S_CONFIG_RATIO_RATIO_32X (0UL) /*!< LRCK = MCK / 32 */ -#define I2S_CONFIG_RATIO_RATIO_48X (1UL) /*!< LRCK = MCK / 48 */ -#define I2S_CONFIG_RATIO_RATIO_64X (2UL) /*!< LRCK = MCK / 64 */ -#define I2S_CONFIG_RATIO_RATIO_96X (3UL) /*!< LRCK = MCK / 96 */ -#define I2S_CONFIG_RATIO_RATIO_128X (4UL) /*!< LRCK = MCK / 128 */ -#define I2S_CONFIG_RATIO_RATIO_192X (5UL) /*!< LRCK = MCK / 192 */ -#define I2S_CONFIG_RATIO_RATIO_256X (6UL) /*!< LRCK = MCK / 256 */ -#define I2S_CONFIG_RATIO_RATIO_384X (7UL) /*!< LRCK = MCK / 384 */ -#define I2S_CONFIG_RATIO_RATIO_512X (8UL) /*!< LRCK = MCK / 512 */ - -/* Register: I2S_CONFIG_SWIDTH */ -/* Description: Sample width. */ - -/* Bits 1..0 : Sample width. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_Pos (0UL) /*!< Position of SWIDTH field. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_Msk (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos) /*!< Bit mask of SWIDTH field. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_8Bit (0UL) /*!< 8 bit. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_16Bit (1UL) /*!< 16 bit. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_24Bit (2UL) /*!< 24 bit. */ - -/* Register: I2S_CONFIG_ALIGN */ -/* Description: Alignment of sample within a frame. */ - -/* Bit 0 : Alignment of sample within a frame. */ -#define I2S_CONFIG_ALIGN_ALIGN_Pos (0UL) /*!< Position of ALIGN field. */ -#define I2S_CONFIG_ALIGN_ALIGN_Msk (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos) /*!< Bit mask of ALIGN field. */ -#define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */ -#define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */ - -/* Register: I2S_CONFIG_FORMAT */ -/* Description: Frame format. */ - -/* Bit 0 : Frame format. */ -#define I2S_CONFIG_FORMAT_FORMAT_Pos (0UL) /*!< Position of FORMAT field. */ -#define I2S_CONFIG_FORMAT_FORMAT_Msk (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos) /*!< Bit mask of FORMAT field. */ -#define I2S_CONFIG_FORMAT_FORMAT_I2S (0UL) /*!< Original I2S format. */ -#define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */ - -/* Register: I2S_CONFIG_CHANNELS */ -/* Description: Enable channels. */ - -/* Bits 1..0 : Enable channels. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Pos (0UL) /*!< Position of CHANNELS field. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Msk (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos) /*!< Bit mask of CHANNELS field. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Stereo (0UL) /*!< Stereo. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Left (1UL) /*!< Left only. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Right (2UL) /*!< Right only. */ - -/* Register: I2S_RXD_PTR */ -/* Description: Receive buffer RAM start address. */ - -/* Bits 31..0 : Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address. */ -#define I2S_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define I2S_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: I2S_TXD_PTR */ -/* Description: Transmit buffer RAM start address. */ - -/* Bits 31..0 : Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address. */ -#define I2S_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define I2S_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: I2S_RXTXD_MAXCNT */ -/* Description: Size of RXD and TXD buffers. */ - -/* Bits 13..0 : Size of RXD and TXD buffers in number of 32 bit words. */ -#define I2S_RXTXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define I2S_RXTXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: I2S_PSEL_MCK */ -/* Description: Pin select for MCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_MCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_MCK_CONNECT_Msk (0x1UL << I2S_PSEL_MCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_MCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_MCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define I2S_PSEL_MCK_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define I2S_PSEL_MCK_PORT_Msk (0x3UL << I2S_PSEL_MCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_MCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_MCK_PIN_Msk (0x1FUL << I2S_PSEL_MCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SCK */ -/* Description: Pin select for SCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SCK_CONNECT_Msk (0x1UL << I2S_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define I2S_PSEL_SCK_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define I2S_PSEL_SCK_PORT_Msk (0x3UL << I2S_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SCK_PIN_Msk (0x1FUL << I2S_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_LRCK */ -/* Description: Pin select for LRCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_LRCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_LRCK_CONNECT_Msk (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_LRCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_LRCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define I2S_PSEL_LRCK_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define I2S_PSEL_LRCK_PORT_Msk (0x3UL << I2S_PSEL_LRCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_LRCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_LRCK_PIN_Msk (0x1FUL << I2S_PSEL_LRCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SDIN */ -/* Description: Pin select for SDIN signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SDIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SDIN_CONNECT_Msk (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SDIN_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SDIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define I2S_PSEL_SDIN_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define I2S_PSEL_SDIN_PORT_Msk (0x3UL << I2S_PSEL_SDIN_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SDIN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SDIN_PIN_Msk (0x1FUL << I2S_PSEL_SDIN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SDOUT */ -/* Description: Pin select for SDOUT signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SDOUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SDOUT_CONNECT_Msk (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SDOUT_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SDOUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define I2S_PSEL_SDOUT_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define I2S_PSEL_SDOUT_PORT_Msk (0x3UL << I2S_PSEL_SDOUT_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SDOUT_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SDOUT_PIN_Msk (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos) /*!< Bit mask of PIN field. */ - - -/* Peripheral: LPCOMP */ -/* Description: Low Power Comparator */ - -/* Register: LPCOMP_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between CROSS event and STOP task */ -#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between UP event and STOP task */ -#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DOWN event and STOP task */ -#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between READY event and STOP task */ -#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and SAMPLE task */ -#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: LPCOMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ -#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for UP event */ -#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ -#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: LPCOMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ -#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for UP event */ -#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ -#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: LPCOMP_RESULT */ -/* Description: Compare result */ - -/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ -#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */ -#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */ - -/* Register: LPCOMP_ENABLE */ -/* Description: Enable LPCOMP */ - -/* Bits 1..0 : Enable or disable LPCOMP */ -#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define LPCOMP_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: LPCOMP_PSEL */ -/* Description: Input pin select */ - -/* Bits 2..0 : Analog pin select */ -#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ -#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ - -/* Register: LPCOMP_REFSEL */ -/* Description: Reference select */ - -/* Bits 3..0 : Reference select */ -#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_Msk (0xFUL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd (0UL) /*!< VDD * 1/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd (1UL) /*!< VDD * 2/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd (2UL) /*!< VDD * 3/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd (3UL) /*!< VDD * 4/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd (4UL) /*!< VDD * 5/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd (5UL) /*!< VDD * 6/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd (6UL) /*!< VDD * 7/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< External analog reference selected */ -#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd (8UL) /*!< VDD * 1/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd (9UL) /*!< VDD * 3/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd (10UL) /*!< VDD * 5/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd (11UL) /*!< VDD * 7/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd (12UL) /*!< VDD * 9/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd (13UL) /*!< VDD * 11/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd (14UL) /*!< VDD * 13/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd (15UL) /*!< VDD * 15/16 selected as reference */ - -/* Register: LPCOMP_EXTREFSEL */ -/* Description: External reference select */ - -/* Bit 0 : External analog reference select */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ - -/* Register: LPCOMP_ANADETECT */ -/* Description: Analog detect configuration */ - -/* Bits 1..0 : Analog detect configuration */ -#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETECT on crossing, both upward crossing and downward crossing */ -#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETECT on upward crossing only */ -#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETECT on downward crossing only */ - -/* Register: LPCOMP_HYST */ -/* Description: Comparator hysteresis enable */ - -/* Bit 0 : Comparator hysteresis enable */ -#define LPCOMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ -#define LPCOMP_HYST_HYST_Msk (0x1UL << LPCOMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ -#define LPCOMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ -#define LPCOMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis disabled (typ. 50 mV) */ - - -/* Peripheral: MWU */ -/* Description: Memory Watch Unit */ - -/* Register: MWU_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 27 : Enable or disable interrupt for PREGION[1].RA event */ -#define MWU_INTEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTEN_PREGION1RA_Msk (0x1UL << MWU_INTEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTEN_PREGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 26 : Enable or disable interrupt for PREGION[1].WA event */ -#define MWU_INTEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTEN_PREGION1WA_Msk (0x1UL << MWU_INTEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTEN_PREGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable interrupt for PREGION[0].RA event */ -#define MWU_INTEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTEN_PREGION0RA_Msk (0x1UL << MWU_INTEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTEN_PREGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : Enable or disable interrupt for PREGION[0].WA event */ -#define MWU_INTEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTEN_PREGION0WA_Msk (0x1UL << MWU_INTEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTEN_PREGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION0WA_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for REGION[3].RA event */ -#define MWU_INTEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTEN_REGION3RA_Msk (0x1UL << MWU_INTEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTEN_REGION3RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION3RA_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for REGION[3].WA event */ -#define MWU_INTEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTEN_REGION3WA_Msk (0x1UL << MWU_INTEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTEN_REGION3WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION3WA_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for REGION[2].RA event */ -#define MWU_INTEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTEN_REGION2RA_Msk (0x1UL << MWU_INTEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTEN_REGION2RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION2RA_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for REGION[2].WA event */ -#define MWU_INTEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTEN_REGION2WA_Msk (0x1UL << MWU_INTEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTEN_REGION2WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION2WA_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for REGION[1].RA event */ -#define MWU_INTEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTEN_REGION1RA_Msk (0x1UL << MWU_INTEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTEN_REGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for REGION[1].WA event */ -#define MWU_INTEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTEN_REGION1WA_Msk (0x1UL << MWU_INTEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTEN_REGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for REGION[0].RA event */ -#define MWU_INTEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTEN_REGION0RA_Msk (0x1UL << MWU_INTEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTEN_REGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for REGION[0].WA event */ -#define MWU_INTEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTEN_REGION0WA_Msk (0x1UL << MWU_INTEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTEN_REGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION0WA_Enabled (1UL) /*!< Enable */ - -/* Register: MWU_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 27 : Write '1' to Enable interrupt for PREGION[1].RA event */ -#define MWU_INTENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTENSET_PREGION1RA_Msk (0x1UL << MWU_INTENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 26 : Write '1' to Enable interrupt for PREGION[1].WA event */ -#define MWU_INTENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTENSET_PREGION1WA_Msk (0x1UL << MWU_INTENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable interrupt for PREGION[0].RA event */ -#define MWU_INTENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTENSET_PREGION0RA_Msk (0x1UL << MWU_INTENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 24 : Write '1' to Enable interrupt for PREGION[0].WA event */ -#define MWU_INTENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTENSET_PREGION0WA_Msk (0x1UL << MWU_INTENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION0WA_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for REGION[3].RA event */ -#define MWU_INTENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTENSET_REGION3RA_Msk (0x1UL << MWU_INTENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION3RA_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for REGION[3].WA event */ -#define MWU_INTENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTENSET_REGION3WA_Msk (0x1UL << MWU_INTENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION3WA_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for REGION[2].RA event */ -#define MWU_INTENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTENSET_REGION2RA_Msk (0x1UL << MWU_INTENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION2RA_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for REGION[2].WA event */ -#define MWU_INTENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTENSET_REGION2WA_Msk (0x1UL << MWU_INTENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION2WA_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for REGION[1].RA event */ -#define MWU_INTENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTENSET_REGION1RA_Msk (0x1UL << MWU_INTENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for REGION[1].WA event */ -#define MWU_INTENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTENSET_REGION1WA_Msk (0x1UL << MWU_INTENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for REGION[0].RA event */ -#define MWU_INTENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTENSET_REGION0RA_Msk (0x1UL << MWU_INTENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for REGION[0].WA event */ -#define MWU_INTENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTENSET_REGION0WA_Msk (0x1UL << MWU_INTENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION0WA_Set (1UL) /*!< Enable */ - -/* Register: MWU_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 27 : Write '1' to Disable interrupt for PREGION[1].RA event */ -#define MWU_INTENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTENCLR_PREGION1RA_Msk (0x1UL << MWU_INTENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 26 : Write '1' to Disable interrupt for PREGION[1].WA event */ -#define MWU_INTENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTENCLR_PREGION1WA_Msk (0x1UL << MWU_INTENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable interrupt for PREGION[0].RA event */ -#define MWU_INTENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTENCLR_PREGION0RA_Msk (0x1UL << MWU_INTENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 24 : Write '1' to Disable interrupt for PREGION[0].WA event */ -#define MWU_INTENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTENCLR_PREGION0WA_Msk (0x1UL << MWU_INTENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for REGION[3].RA event */ -#define MWU_INTENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTENCLR_REGION3RA_Msk (0x1UL << MWU_INTENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION3RA_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for REGION[3].WA event */ -#define MWU_INTENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTENCLR_REGION3WA_Msk (0x1UL << MWU_INTENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION3WA_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for REGION[2].RA event */ -#define MWU_INTENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTENCLR_REGION2RA_Msk (0x1UL << MWU_INTENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION2RA_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for REGION[2].WA event */ -#define MWU_INTENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTENCLR_REGION2WA_Msk (0x1UL << MWU_INTENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION2WA_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for REGION[1].RA event */ -#define MWU_INTENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTENCLR_REGION1RA_Msk (0x1UL << MWU_INTENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for REGION[1].WA event */ -#define MWU_INTENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTENCLR_REGION1WA_Msk (0x1UL << MWU_INTENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for REGION[0].RA event */ -#define MWU_INTENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTENCLR_REGION0RA_Msk (0x1UL << MWU_INTENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for REGION[0].WA event */ -#define MWU_INTENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTENCLR_REGION0WA_Msk (0x1UL << MWU_INTENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION0WA_Clear (1UL) /*!< Disable */ - -/* Register: MWU_NMIEN */ -/* Description: Enable or disable non-maskable interrupt */ - -/* Bit 27 : Enable or disable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIEN_PREGION1RA_Msk (0x1UL << MWU_NMIEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIEN_PREGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 26 : Enable or disable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIEN_PREGION1WA_Msk (0x1UL << MWU_NMIEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIEN_PREGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIEN_PREGION0RA_Msk (0x1UL << MWU_NMIEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIEN_PREGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : Enable or disable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIEN_PREGION0WA_Msk (0x1UL << MWU_NMIEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIEN_PREGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION0WA_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIEN_REGION3RA_Msk (0x1UL << MWU_NMIEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIEN_REGION3RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION3RA_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIEN_REGION3WA_Msk (0x1UL << MWU_NMIEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIEN_REGION3WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION3WA_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIEN_REGION2RA_Msk (0x1UL << MWU_NMIEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIEN_REGION2RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION2RA_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIEN_REGION2WA_Msk (0x1UL << MWU_NMIEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIEN_REGION2WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION2WA_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIEN_REGION1RA_Msk (0x1UL << MWU_NMIEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIEN_REGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIEN_REGION1WA_Msk (0x1UL << MWU_NMIEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIEN_REGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIEN_REGION0RA_Msk (0x1UL << MWU_NMIEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIEN_REGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIEN_REGION0WA_Msk (0x1UL << MWU_NMIEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIEN_REGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION0WA_Enabled (1UL) /*!< Enable */ - -/* Register: MWU_NMIENSET */ -/* Description: Enable non-maskable interrupt */ - -/* Bit 27 : Write '1' to Enable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIENSET_PREGION1RA_Msk (0x1UL << MWU_NMIENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 26 : Write '1' to Enable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIENSET_PREGION1WA_Msk (0x1UL << MWU_NMIENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIENSET_PREGION0RA_Msk (0x1UL << MWU_NMIENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 24 : Write '1' to Enable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIENSET_PREGION0WA_Msk (0x1UL << MWU_NMIENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION0WA_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIENSET_REGION3RA_Msk (0x1UL << MWU_NMIENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION3RA_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIENSET_REGION3WA_Msk (0x1UL << MWU_NMIENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION3WA_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIENSET_REGION2RA_Msk (0x1UL << MWU_NMIENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION2RA_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIENSET_REGION2WA_Msk (0x1UL << MWU_NMIENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION2WA_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIENSET_REGION1RA_Msk (0x1UL << MWU_NMIENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIENSET_REGION1WA_Msk (0x1UL << MWU_NMIENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIENSET_REGION0RA_Msk (0x1UL << MWU_NMIENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIENSET_REGION0WA_Msk (0x1UL << MWU_NMIENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION0WA_Set (1UL) /*!< Enable */ - -/* Register: MWU_NMIENCLR */ -/* Description: Disable non-maskable interrupt */ - -/* Bit 27 : Write '1' to Disable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIENCLR_PREGION1RA_Msk (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 26 : Write '1' to Disable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIENCLR_PREGION1WA_Msk (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIENCLR_PREGION0RA_Msk (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 24 : Write '1' to Disable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIENCLR_PREGION0WA_Msk (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIENCLR_REGION3RA_Msk (0x1UL << MWU_NMIENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION3RA_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIENCLR_REGION3WA_Msk (0x1UL << MWU_NMIENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION3WA_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIENCLR_REGION2RA_Msk (0x1UL << MWU_NMIENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION2RA_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIENCLR_REGION2WA_Msk (0x1UL << MWU_NMIENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION2WA_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIENCLR_REGION1RA_Msk (0x1UL << MWU_NMIENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIENCLR_REGION1WA_Msk (0x1UL << MWU_NMIENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIENCLR_REGION0RA_Msk (0x1UL << MWU_NMIENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIENCLR_REGION0WA_Msk (0x1UL << MWU_NMIENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION0WA_Clear (1UL) /*!< Disable */ - -/* Register: MWU_PERREGION_SUBSTATWA */ -/* Description: Description cluster[0]: Source of event/interrupt in region 0, write access detected while corresponding subregion was enabled for watching */ - -/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PERREGION_SUBSTATWA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR31_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PERREGION_SUBSTATWA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR30_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PERREGION_SUBSTATWA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR29_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PERREGION_SUBSTATWA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR28_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PERREGION_SUBSTATWA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR27_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PERREGION_SUBSTATWA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR26_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PERREGION_SUBSTATWA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR25_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PERREGION_SUBSTATWA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR24_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PERREGION_SUBSTATWA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR23_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PERREGION_SUBSTATWA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR22_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PERREGION_SUBSTATWA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR21_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PERREGION_SUBSTATWA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR20_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PERREGION_SUBSTATWA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR19_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PERREGION_SUBSTATWA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR18_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PERREGION_SUBSTATWA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR17_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PERREGION_SUBSTATWA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR16_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PERREGION_SUBSTATWA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR15_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PERREGION_SUBSTATWA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR14_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PERREGION_SUBSTATWA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR13_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PERREGION_SUBSTATWA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR12_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PERREGION_SUBSTATWA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR11_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PERREGION_SUBSTATWA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR10_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PERREGION_SUBSTATWA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR9_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PERREGION_SUBSTATWA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR8_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PERREGION_SUBSTATWA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR7_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PERREGION_SUBSTATWA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR6_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PERREGION_SUBSTATWA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR5_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PERREGION_SUBSTATWA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR4_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PERREGION_SUBSTATWA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR3_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PERREGION_SUBSTATWA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR2_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PERREGION_SUBSTATWA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR1_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PERREGION_SUBSTATWA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR0_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Register: MWU_PERREGION_SUBSTATRA */ -/* Description: Description cluster[0]: Source of event/interrupt in region 0, read access detected while corresponding subregion was enabled for watching */ - -/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PERREGION_SUBSTATRA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR31_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PERREGION_SUBSTATRA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR30_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PERREGION_SUBSTATRA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR29_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PERREGION_SUBSTATRA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR28_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PERREGION_SUBSTATRA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR27_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PERREGION_SUBSTATRA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR26_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PERREGION_SUBSTATRA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR25_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PERREGION_SUBSTATRA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR24_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PERREGION_SUBSTATRA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR23_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PERREGION_SUBSTATRA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR22_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PERREGION_SUBSTATRA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR21_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PERREGION_SUBSTATRA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR20_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PERREGION_SUBSTATRA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR19_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PERREGION_SUBSTATRA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR18_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PERREGION_SUBSTATRA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR17_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PERREGION_SUBSTATRA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR16_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PERREGION_SUBSTATRA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR15_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PERREGION_SUBSTATRA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR14_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PERREGION_SUBSTATRA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR13_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PERREGION_SUBSTATRA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR12_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PERREGION_SUBSTATRA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR11_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PERREGION_SUBSTATRA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR10_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PERREGION_SUBSTATRA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR9_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PERREGION_SUBSTATRA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR8_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PERREGION_SUBSTATRA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR7_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PERREGION_SUBSTATRA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR6_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PERREGION_SUBSTATRA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR5_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PERREGION_SUBSTATRA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR4_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PERREGION_SUBSTATRA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR3_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PERREGION_SUBSTATRA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR2_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PERREGION_SUBSTATRA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR1_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PERREGION_SUBSTATRA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR0_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Register: MWU_REGIONEN */ -/* Description: Enable/disable regions watch */ - -/* Bit 27 : Enable/disable read access watch in PREGION[1] */ -#define MWU_REGIONEN_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONEN_PRGN1RA_Msk (0x1UL << MWU_REGIONEN_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONEN_PRGN1RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ -#define MWU_REGIONEN_PRGN1RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 26 : Enable/disable write access watch in PREGION[1] */ -#define MWU_REGIONEN_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONEN_PRGN1WA_Msk (0x1UL << MWU_REGIONEN_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONEN_PRGN1WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ -#define MWU_REGIONEN_PRGN1WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 25 : Enable/disable read access watch in PREGION[0] */ -#define MWU_REGIONEN_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONEN_PRGN0RA_Msk (0x1UL << MWU_REGIONEN_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONEN_PRGN0RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ -#define MWU_REGIONEN_PRGN0RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 24 : Enable/disable write access watch in PREGION[0] */ -#define MWU_REGIONEN_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONEN_PRGN0WA_Msk (0x1UL << MWU_REGIONEN_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONEN_PRGN0WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ -#define MWU_REGIONEN_PRGN0WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 7 : Enable/disable read access watch in region[3] */ -#define MWU_REGIONEN_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONEN_RGN3RA_Msk (0x1UL << MWU_REGIONEN_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONEN_RGN3RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN3RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 6 : Enable/disable write access watch in region[3] */ -#define MWU_REGIONEN_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONEN_RGN3WA_Msk (0x1UL << MWU_REGIONEN_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONEN_RGN3WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN3WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 5 : Enable/disable read access watch in region[2] */ -#define MWU_REGIONEN_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONEN_RGN2RA_Msk (0x1UL << MWU_REGIONEN_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONEN_RGN2RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN2RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 4 : Enable/disable write access watch in region[2] */ -#define MWU_REGIONEN_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONEN_RGN2WA_Msk (0x1UL << MWU_REGIONEN_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONEN_RGN2WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN2WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 3 : Enable/disable read access watch in region[1] */ -#define MWU_REGIONEN_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONEN_RGN1RA_Msk (0x1UL << MWU_REGIONEN_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONEN_RGN1RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN1RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 2 : Enable/disable write access watch in region[1] */ -#define MWU_REGIONEN_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONEN_RGN1WA_Msk (0x1UL << MWU_REGIONEN_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONEN_RGN1WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN1WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 1 : Enable/disable read access watch in region[0] */ -#define MWU_REGIONEN_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONEN_RGN0RA_Msk (0x1UL << MWU_REGIONEN_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONEN_RGN0RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN0RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 0 : Enable/disable write access watch in region[0] */ -#define MWU_REGIONEN_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONEN_RGN0WA_Msk (0x1UL << MWU_REGIONEN_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONEN_RGN0WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN0WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Register: MWU_REGIONENSET */ -/* Description: Enable regions watch */ - -/* Bit 27 : Enable read access watch in PREGION[1] */ -#define MWU_REGIONENSET_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONENSET_PRGN1RA_Msk (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONENSET_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN1RA_Set (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 26 : Enable write access watch in PREGION[1] */ -#define MWU_REGIONENSET_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONENSET_PRGN1WA_Msk (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONENSET_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN1WA_Set (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 25 : Enable read access watch in PREGION[0] */ -#define MWU_REGIONENSET_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONENSET_PRGN0RA_Msk (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONENSET_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN0RA_Set (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 24 : Enable write access watch in PREGION[0] */ -#define MWU_REGIONENSET_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONENSET_PRGN0WA_Msk (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONENSET_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN0WA_Set (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 7 : Enable read access watch in region[3] */ -#define MWU_REGIONENSET_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONENSET_RGN3RA_Msk (0x1UL << MWU_REGIONENSET_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONENSET_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN3RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 6 : Enable write access watch in region[3] */ -#define MWU_REGIONENSET_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONENSET_RGN3WA_Msk (0x1UL << MWU_REGIONENSET_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONENSET_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN3WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 5 : Enable read access watch in region[2] */ -#define MWU_REGIONENSET_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONENSET_RGN2RA_Msk (0x1UL << MWU_REGIONENSET_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONENSET_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN2RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 4 : Enable write access watch in region[2] */ -#define MWU_REGIONENSET_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONENSET_RGN2WA_Msk (0x1UL << MWU_REGIONENSET_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONENSET_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN2WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 3 : Enable read access watch in region[1] */ -#define MWU_REGIONENSET_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONENSET_RGN1RA_Msk (0x1UL << MWU_REGIONENSET_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONENSET_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN1RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 2 : Enable write access watch in region[1] */ -#define MWU_REGIONENSET_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONENSET_RGN1WA_Msk (0x1UL << MWU_REGIONENSET_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONENSET_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN1WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 1 : Enable read access watch in region[0] */ -#define MWU_REGIONENSET_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONENSET_RGN0RA_Msk (0x1UL << MWU_REGIONENSET_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONENSET_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN0RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 0 : Enable write access watch in region[0] */ -#define MWU_REGIONENSET_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONENSET_RGN0WA_Msk (0x1UL << MWU_REGIONENSET_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONENSET_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN0WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Register: MWU_REGIONENCLR */ -/* Description: Disable regions watch */ - -/* Bit 27 : Disable read access watch in PREGION[1] */ -#define MWU_REGIONENCLR_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONENCLR_PRGN1RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONENCLR_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN1RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ - -/* Bit 26 : Disable write access watch in PREGION[1] */ -#define MWU_REGIONENCLR_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONENCLR_PRGN1WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONENCLR_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN1WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ - -/* Bit 25 : Disable read access watch in PREGION[0] */ -#define MWU_REGIONENCLR_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONENCLR_PRGN0RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONENCLR_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN0RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ - -/* Bit 24 : Disable write access watch in PREGION[0] */ -#define MWU_REGIONENCLR_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONENCLR_PRGN0WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONENCLR_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN0WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ - -/* Bit 7 : Disable read access watch in region[3] */ -#define MWU_REGIONENCLR_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONENCLR_RGN3RA_Msk (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONENCLR_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN3RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 6 : Disable write access watch in region[3] */ -#define MWU_REGIONENCLR_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONENCLR_RGN3WA_Msk (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONENCLR_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN3WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 5 : Disable read access watch in region[2] */ -#define MWU_REGIONENCLR_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONENCLR_RGN2RA_Msk (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONENCLR_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN2RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 4 : Disable write access watch in region[2] */ -#define MWU_REGIONENCLR_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONENCLR_RGN2WA_Msk (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONENCLR_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN2WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 3 : Disable read access watch in region[1] */ -#define MWU_REGIONENCLR_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONENCLR_RGN1RA_Msk (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONENCLR_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN1RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 2 : Disable write access watch in region[1] */ -#define MWU_REGIONENCLR_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONENCLR_RGN1WA_Msk (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONENCLR_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN1WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 1 : Disable read access watch in region[0] */ -#define MWU_REGIONENCLR_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONENCLR_RGN0RA_Msk (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONENCLR_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN0RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 0 : Disable write access watch in region[0] */ -#define MWU_REGIONENCLR_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONENCLR_RGN0WA_Msk (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONENCLR_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN0WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Register: MWU_REGION_START */ -/* Description: Description cluster[0]: Start address for region 0 */ - -/* Bits 31..0 : Start address for region */ -#define MWU_REGION_START_START_Pos (0UL) /*!< Position of START field. */ -#define MWU_REGION_START_START_Msk (0xFFFFFFFFUL << MWU_REGION_START_START_Pos) /*!< Bit mask of START field. */ - -/* Register: MWU_REGION_END */ -/* Description: Description cluster[0]: End address of region 0 */ - -/* Bits 31..0 : End address of region. */ -#define MWU_REGION_END_END_Pos (0UL) /*!< Position of END field. */ -#define MWU_REGION_END_END_Msk (0xFFFFFFFFUL << MWU_REGION_END_END_Pos) /*!< Bit mask of END field. */ - -/* Register: MWU_PREGION_START */ -/* Description: Description cluster[0]: Reserved for future use */ - -/* Bits 31..0 : Reserved for future use */ -#define MWU_PREGION_START_START_Pos (0UL) /*!< Position of START field. */ -#define MWU_PREGION_START_START_Msk (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos) /*!< Bit mask of START field. */ - -/* Register: MWU_PREGION_END */ -/* Description: Description cluster[0]: Reserved for future use */ - -/* Bits 31..0 : Reserved for future use */ -#define MWU_PREGION_END_END_Pos (0UL) /*!< Position of END field. */ -#define MWU_PREGION_END_END_Msk (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos) /*!< Bit mask of END field. */ - -/* Register: MWU_PREGION_SUBS */ -/* Description: Description cluster[0]: Subregions of region 0 */ - -/* Bit 31 : Include or exclude subregion 31 in region */ -#define MWU_PREGION_SUBS_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PREGION_SUBS_SR31_Msk (0x1UL << MWU_PREGION_SUBS_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PREGION_SUBS_SR31_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR31_Include (1UL) /*!< Include */ - -/* Bit 30 : Include or exclude subregion 30 in region */ -#define MWU_PREGION_SUBS_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PREGION_SUBS_SR30_Msk (0x1UL << MWU_PREGION_SUBS_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PREGION_SUBS_SR30_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR30_Include (1UL) /*!< Include */ - -/* Bit 29 : Include or exclude subregion 29 in region */ -#define MWU_PREGION_SUBS_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PREGION_SUBS_SR29_Msk (0x1UL << MWU_PREGION_SUBS_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PREGION_SUBS_SR29_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR29_Include (1UL) /*!< Include */ - -/* Bit 28 : Include or exclude subregion 28 in region */ -#define MWU_PREGION_SUBS_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PREGION_SUBS_SR28_Msk (0x1UL << MWU_PREGION_SUBS_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PREGION_SUBS_SR28_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR28_Include (1UL) /*!< Include */ - -/* Bit 27 : Include or exclude subregion 27 in region */ -#define MWU_PREGION_SUBS_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PREGION_SUBS_SR27_Msk (0x1UL << MWU_PREGION_SUBS_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PREGION_SUBS_SR27_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR27_Include (1UL) /*!< Include */ - -/* Bit 26 : Include or exclude subregion 26 in region */ -#define MWU_PREGION_SUBS_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PREGION_SUBS_SR26_Msk (0x1UL << MWU_PREGION_SUBS_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PREGION_SUBS_SR26_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR26_Include (1UL) /*!< Include */ - -/* Bit 25 : Include or exclude subregion 25 in region */ -#define MWU_PREGION_SUBS_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PREGION_SUBS_SR25_Msk (0x1UL << MWU_PREGION_SUBS_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PREGION_SUBS_SR25_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR25_Include (1UL) /*!< Include */ - -/* Bit 24 : Include or exclude subregion 24 in region */ -#define MWU_PREGION_SUBS_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PREGION_SUBS_SR24_Msk (0x1UL << MWU_PREGION_SUBS_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PREGION_SUBS_SR24_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR24_Include (1UL) /*!< Include */ - -/* Bit 23 : Include or exclude subregion 23 in region */ -#define MWU_PREGION_SUBS_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PREGION_SUBS_SR23_Msk (0x1UL << MWU_PREGION_SUBS_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PREGION_SUBS_SR23_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR23_Include (1UL) /*!< Include */ - -/* Bit 22 : Include or exclude subregion 22 in region */ -#define MWU_PREGION_SUBS_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PREGION_SUBS_SR22_Msk (0x1UL << MWU_PREGION_SUBS_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PREGION_SUBS_SR22_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR22_Include (1UL) /*!< Include */ - -/* Bit 21 : Include or exclude subregion 21 in region */ -#define MWU_PREGION_SUBS_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PREGION_SUBS_SR21_Msk (0x1UL << MWU_PREGION_SUBS_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PREGION_SUBS_SR21_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR21_Include (1UL) /*!< Include */ - -/* Bit 20 : Include or exclude subregion 20 in region */ -#define MWU_PREGION_SUBS_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PREGION_SUBS_SR20_Msk (0x1UL << MWU_PREGION_SUBS_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PREGION_SUBS_SR20_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR20_Include (1UL) /*!< Include */ - -/* Bit 19 : Include or exclude subregion 19 in region */ -#define MWU_PREGION_SUBS_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PREGION_SUBS_SR19_Msk (0x1UL << MWU_PREGION_SUBS_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PREGION_SUBS_SR19_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR19_Include (1UL) /*!< Include */ - -/* Bit 18 : Include or exclude subregion 18 in region */ -#define MWU_PREGION_SUBS_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PREGION_SUBS_SR18_Msk (0x1UL << MWU_PREGION_SUBS_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PREGION_SUBS_SR18_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR18_Include (1UL) /*!< Include */ - -/* Bit 17 : Include or exclude subregion 17 in region */ -#define MWU_PREGION_SUBS_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PREGION_SUBS_SR17_Msk (0x1UL << MWU_PREGION_SUBS_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PREGION_SUBS_SR17_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR17_Include (1UL) /*!< Include */ - -/* Bit 16 : Include or exclude subregion 16 in region */ -#define MWU_PREGION_SUBS_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PREGION_SUBS_SR16_Msk (0x1UL << MWU_PREGION_SUBS_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PREGION_SUBS_SR16_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR16_Include (1UL) /*!< Include */ - -/* Bit 15 : Include or exclude subregion 15 in region */ -#define MWU_PREGION_SUBS_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PREGION_SUBS_SR15_Msk (0x1UL << MWU_PREGION_SUBS_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PREGION_SUBS_SR15_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR15_Include (1UL) /*!< Include */ - -/* Bit 14 : Include or exclude subregion 14 in region */ -#define MWU_PREGION_SUBS_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PREGION_SUBS_SR14_Msk (0x1UL << MWU_PREGION_SUBS_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PREGION_SUBS_SR14_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR14_Include (1UL) /*!< Include */ - -/* Bit 13 : Include or exclude subregion 13 in region */ -#define MWU_PREGION_SUBS_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PREGION_SUBS_SR13_Msk (0x1UL << MWU_PREGION_SUBS_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PREGION_SUBS_SR13_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR13_Include (1UL) /*!< Include */ - -/* Bit 12 : Include or exclude subregion 12 in region */ -#define MWU_PREGION_SUBS_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PREGION_SUBS_SR12_Msk (0x1UL << MWU_PREGION_SUBS_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PREGION_SUBS_SR12_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR12_Include (1UL) /*!< Include */ - -/* Bit 11 : Include or exclude subregion 11 in region */ -#define MWU_PREGION_SUBS_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PREGION_SUBS_SR11_Msk (0x1UL << MWU_PREGION_SUBS_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PREGION_SUBS_SR11_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR11_Include (1UL) /*!< Include */ - -/* Bit 10 : Include or exclude subregion 10 in region */ -#define MWU_PREGION_SUBS_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PREGION_SUBS_SR10_Msk (0x1UL << MWU_PREGION_SUBS_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PREGION_SUBS_SR10_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR10_Include (1UL) /*!< Include */ - -/* Bit 9 : Include or exclude subregion 9 in region */ -#define MWU_PREGION_SUBS_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PREGION_SUBS_SR9_Msk (0x1UL << MWU_PREGION_SUBS_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PREGION_SUBS_SR9_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR9_Include (1UL) /*!< Include */ - -/* Bit 8 : Include or exclude subregion 8 in region */ -#define MWU_PREGION_SUBS_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PREGION_SUBS_SR8_Msk (0x1UL << MWU_PREGION_SUBS_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PREGION_SUBS_SR8_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR8_Include (1UL) /*!< Include */ - -/* Bit 7 : Include or exclude subregion 7 in region */ -#define MWU_PREGION_SUBS_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PREGION_SUBS_SR7_Msk (0x1UL << MWU_PREGION_SUBS_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PREGION_SUBS_SR7_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR7_Include (1UL) /*!< Include */ - -/* Bit 6 : Include or exclude subregion 6 in region */ -#define MWU_PREGION_SUBS_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PREGION_SUBS_SR6_Msk (0x1UL << MWU_PREGION_SUBS_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PREGION_SUBS_SR6_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR6_Include (1UL) /*!< Include */ - -/* Bit 5 : Include or exclude subregion 5 in region */ -#define MWU_PREGION_SUBS_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PREGION_SUBS_SR5_Msk (0x1UL << MWU_PREGION_SUBS_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PREGION_SUBS_SR5_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR5_Include (1UL) /*!< Include */ - -/* Bit 4 : Include or exclude subregion 4 in region */ -#define MWU_PREGION_SUBS_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PREGION_SUBS_SR4_Msk (0x1UL << MWU_PREGION_SUBS_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PREGION_SUBS_SR4_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR4_Include (1UL) /*!< Include */ - -/* Bit 3 : Include or exclude subregion 3 in region */ -#define MWU_PREGION_SUBS_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PREGION_SUBS_SR3_Msk (0x1UL << MWU_PREGION_SUBS_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PREGION_SUBS_SR3_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR3_Include (1UL) /*!< Include */ - -/* Bit 2 : Include or exclude subregion 2 in region */ -#define MWU_PREGION_SUBS_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PREGION_SUBS_SR2_Msk (0x1UL << MWU_PREGION_SUBS_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PREGION_SUBS_SR2_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR2_Include (1UL) /*!< Include */ - -/* Bit 1 : Include or exclude subregion 1 in region */ -#define MWU_PREGION_SUBS_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PREGION_SUBS_SR1_Msk (0x1UL << MWU_PREGION_SUBS_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PREGION_SUBS_SR1_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR1_Include (1UL) /*!< Include */ - -/* Bit 0 : Include or exclude subregion 0 in region */ -#define MWU_PREGION_SUBS_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PREGION_SUBS_SR0_Msk (0x1UL << MWU_PREGION_SUBS_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PREGION_SUBS_SR0_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR0_Include (1UL) /*!< Include */ - - -/* Peripheral: NFCT */ -/* Description: NFC-A compatible radio */ - -/* Register: NFCT_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 5 : Shortcut between TXFRAMEEND event and ENABLERXDATA task */ -#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos (5UL) /*!< Position of TXFRAMEEND_ENABLERXDATA field. */ -#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk (0x1UL << NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos) /*!< Bit mask of TXFRAMEEND_ENABLERXDATA field. */ -#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Disabled (0UL) /*!< Disable shortcut */ -#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between FIELDLOST event and SENSE task */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Pos (1UL) /*!< Position of FIELDLOST_SENSE field. */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Msk (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos) /*!< Bit mask of FIELDLOST_SENSE field. */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled (0UL) /*!< Disable shortcut */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between FIELDDETECTED event and ACTIVATE task */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos (0UL) /*!< Position of FIELDDETECTED_ACTIVATE field. */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos) /*!< Bit mask of FIELDDETECTED_ACTIVATE field. */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled (0UL) /*!< Disable shortcut */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: NFCT_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 20 : Enable or disable interrupt for STARTED event */ -#define NFCT_INTEN_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTEN_STARTED_Msk (0x1UL << NFCT_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for SELECTED event */ -#define NFCT_INTEN_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTEN_SELECTED_Msk (0x1UL << NFCT_INTEN_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTEN_SELECTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_SELECTED_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for COLLISION event */ -#define NFCT_INTEN_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTEN_COLLISION_Msk (0x1UL << NFCT_INTEN_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTEN_COLLISION_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_COLLISION_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for ENDTX event */ -#define NFCT_INTEN_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTEN_ENDTX_Msk (0x1UL << NFCT_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for ENDRX event */ -#define NFCT_INTEN_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTEN_ENDRX_Msk (0x1UL << NFCT_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for RXERROR event */ -#define NFCT_INTEN_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTEN_RXERROR_Msk (0x1UL << NFCT_INTEN_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTEN_RXERROR_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for ERROR event */ -#define NFCT_INTEN_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTEN_ERROR_Msk (0x1UL << NFCT_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for RXFRAMEEND event */ -#define NFCT_INTEN_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTEN_RXFRAMEEND_Msk (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTEN_RXFRAMEEND_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXFRAMEEND_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for RXFRAMESTART event */ -#define NFCT_INTEN_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTEN_RXFRAMESTART_Msk (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTEN_RXFRAMESTART_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXFRAMESTART_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for TXFRAMEEND event */ -#define NFCT_INTEN_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTEN_TXFRAMEEND_Msk (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTEN_TXFRAMEEND_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_TXFRAMEEND_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for TXFRAMESTART event */ -#define NFCT_INTEN_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTEN_TXFRAMESTART_Msk (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTEN_TXFRAMESTART_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_TXFRAMESTART_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for FIELDLOST event */ -#define NFCT_INTEN_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTEN_FIELDLOST_Msk (0x1UL << NFCT_INTEN_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTEN_FIELDLOST_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_FIELDLOST_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for FIELDDETECTED event */ -#define NFCT_INTEN_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTEN_FIELDDETECTED_Msk (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTEN_FIELDDETECTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_FIELDDETECTED_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for READY event */ -#define NFCT_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTEN_READY_Msk (0x1UL << NFCT_INTEN_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTEN_READY_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_READY_Enabled (1UL) /*!< Enable */ - -/* Register: NFCT_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 20 : Write '1' to Enable interrupt for STARTED event */ -#define NFCT_INTENSET_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTENSET_STARTED_Msk (0x1UL << NFCT_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for SELECTED event */ -#define NFCT_INTENSET_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTENSET_SELECTED_Msk (0x1UL << NFCT_INTENSET_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTENSET_SELECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_SELECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_SELECTED_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COLLISION event */ -#define NFCT_INTENSET_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTENSET_COLLISION_Msk (0x1UL << NFCT_INTENSET_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTENSET_COLLISION_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_COLLISION_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_COLLISION_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for ENDTX event */ -#define NFCT_INTENSET_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTENSET_ENDTX_Msk (0x1UL << NFCT_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for ENDRX event */ -#define NFCT_INTENSET_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTENSET_ENDRX_Msk (0x1UL << NFCT_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for RXERROR event */ -#define NFCT_INTENSET_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTENSET_RXERROR_Msk (0x1UL << NFCT_INTENSET_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTENSET_RXERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for ERROR event */ -#define NFCT_INTENSET_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTENSET_ERROR_Msk (0x1UL << NFCT_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for RXFRAMEEND event */ -#define NFCT_INTENSET_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTENSET_RXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTENSET_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXFRAMEEND_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for RXFRAMESTART event */ -#define NFCT_INTENSET_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTENSET_RXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTENSET_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXFRAMESTART_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for TXFRAMEEND event */ -#define NFCT_INTENSET_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTENSET_TXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTENSET_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_TXFRAMEEND_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for TXFRAMESTART event */ -#define NFCT_INTENSET_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTENSET_TXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTENSET_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_TXFRAMESTART_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for FIELDLOST event */ -#define NFCT_INTENSET_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTENSET_FIELDLOST_Msk (0x1UL << NFCT_INTENSET_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTENSET_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_FIELDLOST_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for FIELDDETECTED event */ -#define NFCT_INTENSET_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTENSET_FIELDDETECTED_Msk (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTENSET_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_FIELDDETECTED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define NFCT_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTENSET_READY_Msk (0x1UL << NFCT_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: NFCT_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 20 : Write '1' to Disable interrupt for STARTED event */ -#define NFCT_INTENCLR_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTENCLR_STARTED_Msk (0x1UL << NFCT_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for SELECTED event */ -#define NFCT_INTENCLR_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTENCLR_SELECTED_Msk (0x1UL << NFCT_INTENCLR_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTENCLR_SELECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_SELECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_SELECTED_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COLLISION event */ -#define NFCT_INTENCLR_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTENCLR_COLLISION_Msk (0x1UL << NFCT_INTENCLR_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTENCLR_COLLISION_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_COLLISION_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_COLLISION_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for ENDTX event */ -#define NFCT_INTENCLR_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTENCLR_ENDTX_Msk (0x1UL << NFCT_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for ENDRX event */ -#define NFCT_INTENCLR_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTENCLR_ENDRX_Msk (0x1UL << NFCT_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for RXERROR event */ -#define NFCT_INTENCLR_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTENCLR_RXERROR_Msk (0x1UL << NFCT_INTENCLR_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTENCLR_RXERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for ERROR event */ -#define NFCT_INTENCLR_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTENCLR_ERROR_Msk (0x1UL << NFCT_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for RXFRAMEEND event */ -#define NFCT_INTENCLR_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTENCLR_RXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTENCLR_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXFRAMEEND_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for RXFRAMESTART event */ -#define NFCT_INTENCLR_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTENCLR_RXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTENCLR_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXFRAMESTART_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for TXFRAMEEND event */ -#define NFCT_INTENCLR_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTENCLR_TXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTENCLR_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_TXFRAMEEND_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for TXFRAMESTART event */ -#define NFCT_INTENCLR_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTENCLR_TXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTENCLR_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_TXFRAMESTART_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for FIELDLOST event */ -#define NFCT_INTENCLR_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTENCLR_FIELDLOST_Msk (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTENCLR_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_FIELDLOST_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for FIELDDETECTED event */ -#define NFCT_INTENCLR_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTENCLR_FIELDDETECTED_Msk (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTENCLR_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_FIELDDETECTED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define NFCT_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTENCLR_READY_Msk (0x1UL << NFCT_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: NFCT_ERRORSTATUS */ -/* Description: NFC Error Status register */ - -/* Bit 0 : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX */ -#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos (0UL) /*!< Position of FRAMEDELAYTIMEOUT field. */ -#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos) /*!< Bit mask of FRAMEDELAYTIMEOUT field. */ - -/* Register: NFCT_FRAMESTATUS_RX */ -/* Description: Result of last incoming frame */ - -/* Bit 3 : Overrun detected */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos (3UL) /*!< Position of OVERRUN field. */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun (0UL) /*!< No overrun detected */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun (1UL) /*!< Overrun error */ - -/* Bit 2 : Parity status of received frame */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos (2UL) /*!< Position of PARITYSTATUS field. */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos) /*!< Bit mask of PARITYSTATUS field. */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK (0UL) /*!< Frame received with parity OK */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError (1UL) /*!< Frame received with parity error */ - -/* Bit 0 : No valid end of frame (EoF) detected */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos (0UL) /*!< Position of CRCERROR field. */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect (0UL) /*!< Valid CRC detected */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError (1UL) /*!< CRC received does not match local check */ - -/* Register: NFCT_NFCTAGSTATE */ -/* Description: NfcTag state register */ - -/* Bits 2..0 : NfcTag state */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos (0UL) /*!< Position of NFCTAGSTATE field. */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk (0x7UL << NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos) /*!< Bit mask of NFCTAGSTATE field. */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled (0UL) /*!< Disabled or sense */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_RampUp (2UL) /*!< RampUp */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Idle (3UL) /*!< Idle */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Receive (4UL) /*!< Receive */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_FrameDelay (5UL) /*!< FrameDelay */ -#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Transmit (6UL) /*!< Transmit */ - -/* Register: NFCT_FIELDPRESENT */ -/* Description: Indicates the presence or not of a valid field */ - -/* Bit 1 : Indicates if the low level has locked to the field */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Pos (1UL) /*!< Position of LOCKDETECT field. */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Msk (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos) /*!< Bit mask of LOCKDETECT field. */ -#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked (0UL) /*!< Not locked to field */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Locked (1UL) /*!< Locked to field */ - -/* Bit 0 : Indicates if a valid field is present. Available only in the activated state. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos (0UL) /*!< Position of FIELDPRESENT field. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos) /*!< Bit mask of FIELDPRESENT field. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField (0UL) /*!< No valid field detected */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent (1UL) /*!< Valid field detected */ - -/* Register: NFCT_FRAMEDELAYMIN */ -/* Description: Minimum frame delay */ - -/* Bits 15..0 : Minimum frame delay in number of 13.56 MHz clocks */ -#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos (0UL) /*!< Position of FRAMEDELAYMIN field. */ -#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos) /*!< Bit mask of FRAMEDELAYMIN field. */ - -/* Register: NFCT_FRAMEDELAYMAX */ -/* Description: Maximum frame delay */ - -/* Bits 15..0 : Maximum frame delay in number of 13.56 MHz clocks */ -#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos (0UL) /*!< Position of FRAMEDELAYMAX field. */ -#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk (0xFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos) /*!< Bit mask of FRAMEDELAYMAX field. */ - -/* Register: NFCT_FRAMEDELAYMODE */ -/* Description: Configuration register for the Frame Delay Timer */ - -/* Bits 1..0 : Configuration register for the Frame Delay Timer */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos (0UL) /*!< Position of FRAMEDELAYMODE field. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos) /*!< Bit mask of FRAMEDELAYMODE field. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun (0UL) /*!< Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window (1UL) /*!< Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal (2UL) /*!< Frame is transmitted exactly at FRAMEDELAYMAX */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid (3UL) /*!< Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX */ - -/* Register: NFCT_PACKETPTR */ -/* Description: Packet pointer for TXD and RXD data storage in Data RAM */ - -/* Bits 31..0 : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address. */ -#define NFCT_PACKETPTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define NFCT_PACKETPTR_PTR_Msk (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: NFCT_MAXLEN */ -/* Description: Size of the RAM buffer allocated to TXD and RXD data storage each */ - -/* Bits 8..0 : Size of the RAM buffer allocated to TXD and RXD data storage each */ -#define NFCT_MAXLEN_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ -#define NFCT_MAXLEN_MAXLEN_Msk (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ - -/* Register: NFCT_TXD_FRAMECONFIG */ -/* Description: Configuration of outgoing frames */ - -/* Bit 4 : CRC mode for outgoing frames */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos (4UL) /*!< Position of CRCMODETX field. */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos) /*!< Bit mask of CRCMODETX field. */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX (0UL) /*!< CRC is not added to the frame */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX (1UL) /*!< 16 bit CRC added to the frame based on all the data read from RAM that is used in the frame */ - -/* Bit 2 : Adding SoF or not in TX frames */ -#define NFCT_TXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ -#define NFCT_TXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ -#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol not added */ -#define NFCT_TXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol added */ - -/* Bit 1 : Discarding unused bits at start or end of a frame */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos (1UL) /*!< Position of DISCARDMODE field. */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos) /*!< Bit mask of DISCARDMODE field. */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd (0UL) /*!< Unused bits are discarded at end of frame (EoF) */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart (1UL) /*!< Unused bits are discarded at start of frame (SoF) */ - -/* Bit 0 : Indicates if parity is added to the frame */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not added to TX frames */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is added to TX frames */ - -/* Register: NFCT_TXD_AMOUNT */ -/* Description: Size of outgoing frame */ - -/* Bits 11..3 : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing */ -#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos (3UL) /*!< Position of TXDATABYTES field. */ -#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos) /*!< Bit mask of TXDATABYTES field. */ - -/* Bits 2..0 : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit). */ -#define NFCT_TXD_AMOUNT_TXDATABITS_Pos (0UL) /*!< Position of TXDATABITS field. */ -#define NFCT_TXD_AMOUNT_TXDATABITS_Msk (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos) /*!< Bit mask of TXDATABITS field. */ - -/* Register: NFCT_RXD_FRAMECONFIG */ -/* Description: Configuration of incoming frames */ - -/* Bit 4 : CRC mode for incoming frames */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos (4UL) /*!< Position of CRCMODERX field. */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos) /*!< Bit mask of CRCMODERX field. */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX (0UL) /*!< CRC is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX (1UL) /*!< Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated */ - -/* Bit 2 : SoF expected or not in RX frames */ -#define NFCT_RXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ -#define NFCT_RXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ -#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol is expected in RX frames */ - -/* Bit 0 : Indicates if parity expected in RX frame */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is expected in RX frames */ - -/* Register: NFCT_RXD_AMOUNT */ -/* Description: Size of last incoming frame */ - -/* Bits 11..3 : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing) */ -#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos (3UL) /*!< Position of RXDATABYTES field. */ -#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos) /*!< Bit mask of RXDATABYTES field. */ - -/* Bits 2..0 : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing). */ -#define NFCT_RXD_AMOUNT_RXDATABITS_Pos (0UL) /*!< Position of RXDATABITS field. */ -#define NFCT_RXD_AMOUNT_RXDATABITS_Msk (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos) /*!< Bit mask of RXDATABITS field. */ - -/* Register: NFCT_NFCID1_LAST */ -/* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */ - -/* Bits 31..24 : NFCID1 byte W */ -#define NFCT_NFCID1_LAST_NFCID1_W_Pos (24UL) /*!< Position of NFCID1_W field. */ -#define NFCT_NFCID1_LAST_NFCID1_W_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos) /*!< Bit mask of NFCID1_W field. */ - -/* Bits 23..16 : NFCID1 byte X */ -#define NFCT_NFCID1_LAST_NFCID1_X_Pos (16UL) /*!< Position of NFCID1_X field. */ -#define NFCT_NFCID1_LAST_NFCID1_X_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos) /*!< Bit mask of NFCID1_X field. */ - -/* Bits 15..8 : NFCID1 byte Y */ -#define NFCT_NFCID1_LAST_NFCID1_Y_Pos (8UL) /*!< Position of NFCID1_Y field. */ -#define NFCT_NFCID1_LAST_NFCID1_Y_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos) /*!< Bit mask of NFCID1_Y field. */ - -/* Bits 7..0 : NFCID1 byte Z (very last byte sent) */ -#define NFCT_NFCID1_LAST_NFCID1_Z_Pos (0UL) /*!< Position of NFCID1_Z field. */ -#define NFCT_NFCID1_LAST_NFCID1_Z_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos) /*!< Bit mask of NFCID1_Z field. */ - -/* Register: NFCT_NFCID1_2ND_LAST */ -/* Description: Second last NFCID1 part (7 or 10 bytes ID) */ - -/* Bits 23..16 : NFCID1 byte T */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos (16UL) /*!< Position of NFCID1_T field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos) /*!< Bit mask of NFCID1_T field. */ - -/* Bits 15..8 : NFCID1 byte U */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos (8UL) /*!< Position of NFCID1_U field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos) /*!< Bit mask of NFCID1_U field. */ - -/* Bits 7..0 : NFCID1 byte V */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos (0UL) /*!< Position of NFCID1_V field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos) /*!< Bit mask of NFCID1_V field. */ - -/* Register: NFCT_NFCID1_3RD_LAST */ -/* Description: Third last NFCID1 part (10 bytes ID) */ - -/* Bits 23..16 : NFCID1 byte Q */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos (16UL) /*!< Position of NFCID1_Q field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos) /*!< Bit mask of NFCID1_Q field. */ - -/* Bits 15..8 : NFCID1 byte R */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos (8UL) /*!< Position of NFCID1_R field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos) /*!< Bit mask of NFCID1_R field. */ - -/* Bits 7..0 : NFCID1 byte S */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos (0UL) /*!< Position of NFCID1_S field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos) /*!< Bit mask of NFCID1_S field. */ - -/* Register: NFCT_AUTOCOLRESCONFIG */ -/* Description: Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is enabled. */ - -/* Bit 0 : Enables/disables auto collision resolution */ -#define NFCT_AUTOCOLRESCONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define NFCT_AUTOCOLRESCONFIG_MODE_Msk (0x1UL << NFCT_AUTOCOLRESCONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define NFCT_AUTOCOLRESCONFIG_MODE_Enabled (0UL) /*!< Auto collision resolution enabled */ -#define NFCT_AUTOCOLRESCONFIG_MODE_Disabled (1UL) /*!< Auto collision resolution disabled */ - -/* Register: NFCT_SENSRES */ -/* Description: NFC-A SENS_RES auto-response settings */ - -/* Bits 15..12 : Reserved for future use. Shall be 0. */ -#define NFCT_SENSRES_RFU74_Pos (12UL) /*!< Position of RFU74 field. */ -#define NFCT_SENSRES_RFU74_Msk (0xFUL << NFCT_SENSRES_RFU74_Pos) /*!< Bit mask of RFU74 field. */ - -/* Bits 11..8 : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SENSRES_PLATFCONFIG_Pos (8UL) /*!< Position of PLATFCONFIG field. */ -#define NFCT_SENSRES_PLATFCONFIG_Msk (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos) /*!< Bit mask of PLATFCONFIG field. */ - -/* Bits 7..6 : NFCID1 size. This value is used by the auto collision resolution engine. */ -#define NFCT_SENSRES_NFCIDSIZE_Pos (6UL) /*!< Position of NFCIDSIZE field. */ -#define NFCT_SENSRES_NFCIDSIZE_Msk (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos) /*!< Bit mask of NFCIDSIZE field. */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single (0UL) /*!< NFCID1 size: single (4 bytes) */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double (1UL) /*!< NFCID1 size: double (7 bytes) */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple (2UL) /*!< NFCID1 size: triple (10 bytes) */ - -/* Bit 5 : Reserved for future use. Shall be 0. */ -#define NFCT_SENSRES_RFU5_Pos (5UL) /*!< Position of RFU5 field. */ -#define NFCT_SENSRES_RFU5_Msk (0x1UL << NFCT_SENSRES_RFU5_Pos) /*!< Bit mask of RFU5 field. */ - -/* Bits 4..0 : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SENSRES_BITFRAMESDD_Pos (0UL) /*!< Position of BITFRAMESDD field. */ -#define NFCT_SENSRES_BITFRAMESDD_Msk (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos) /*!< Bit mask of BITFRAMESDD field. */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00000 (0UL) /*!< SDD pattern 00000 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00001 (1UL) /*!< SDD pattern 00001 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00010 (2UL) /*!< SDD pattern 00010 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00100 (4UL) /*!< SDD pattern 00100 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD01000 (8UL) /*!< SDD pattern 01000 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD10000 (16UL) /*!< SDD pattern 10000 */ - -/* Register: NFCT_SELRES */ -/* Description: NFC-A SEL_RES auto-response settings */ - -/* Bit 7 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU7_Pos (7UL) /*!< Position of RFU7 field. */ -#define NFCT_SELRES_RFU7_Msk (0x1UL << NFCT_SELRES_RFU7_Pos) /*!< Bit mask of RFU7 field. */ - -/* Bits 6..5 : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SELRES_PROTOCOL_Pos (5UL) /*!< Position of PROTOCOL field. */ -#define NFCT_SELRES_PROTOCOL_Msk (0x3UL << NFCT_SELRES_PROTOCOL_Pos) /*!< Bit mask of PROTOCOL field. */ - -/* Bits 4..3 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU43_Pos (3UL) /*!< Position of RFU43 field. */ -#define NFCT_SELRES_RFU43_Msk (0x3UL << NFCT_SELRES_RFU43_Pos) /*!< Bit mask of RFU43 field. */ - -/* Bit 2 : Cascade as defined by the b3 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification (controlled by hardware, shall be 0) */ -#define NFCT_SELRES_CASCADE_Pos (2UL) /*!< Position of CASCADE field. */ -#define NFCT_SELRES_CASCADE_Msk (0x1UL << NFCT_SELRES_CASCADE_Pos) /*!< Bit mask of CASCADE field. */ - -/* Bits 1..0 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU10_Pos (0UL) /*!< Position of RFU10 field. */ -#define NFCT_SELRES_RFU10_Msk (0x3UL << NFCT_SELRES_RFU10_Pos) /*!< Bit mask of RFU10 field. */ - - -/* Peripheral: NVMC */ -/* Description: Non Volatile Memory Controller */ - -/* Register: NVMC_READY */ -/* Description: Ready flag */ - -/* Bit 0 : NVMC is ready or busy */ -#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ -#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ -#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */ -#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */ - -/* Register: NVMC_CONFIG */ -/* Description: Configuration register */ - -/* Bits 1..0 : Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated. */ -#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ -#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ -#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */ -#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write Enabled */ -#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */ - -/* Register: NVMC_ERASEPAGE */ -/* Description: Register for erasing a page in Code area */ - -/* Bits 31..0 : Register for starting erase of a page in Code area */ -#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */ -#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */ - -/* Register: NVMC_ERASEPCR1 */ -/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ - -/* Bits 31..0 : Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ -#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */ -#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */ - -/* Register: NVMC_ERASEALL */ -/* Description: Register for erasing all non-volatile user memory */ - -/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased. */ -#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */ -#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase */ - -/* Register: NVMC_ERASEPCR0 */ -/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ - -/* Bits 31..0 : Register for starting erase of a page in Code area. Equivalent to ERASEPAGE. */ -#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */ -#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */ - -/* Register: NVMC_ERASEUICR */ -/* Description: Register for erasing User Information Configuration Registers */ - -/* Bit 0 : Register starting erase of all User Information Configuration Registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased. */ -#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */ -#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */ - -/* Register: NVMC_ICACHECNF */ -/* Description: I-Code cache configuration register. */ - -/* Bit 8 : Cache profiling enable */ -#define NVMC_ICACHECNF_CACHEPROFEN_Pos (8UL) /*!< Position of CACHEPROFEN field. */ -#define NVMC_ICACHECNF_CACHEPROFEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos) /*!< Bit mask of CACHEPROFEN field. */ -#define NVMC_ICACHECNF_CACHEPROFEN_Disabled (0UL) /*!< Disable cache profiling */ -#define NVMC_ICACHECNF_CACHEPROFEN_Enabled (1UL) /*!< Enable cache profiling */ - -/* Bit 0 : Cache enable */ -#define NVMC_ICACHECNF_CACHEEN_Pos (0UL) /*!< Position of CACHEEN field. */ -#define NVMC_ICACHECNF_CACHEEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos) /*!< Bit mask of CACHEEN field. */ -#define NVMC_ICACHECNF_CACHEEN_Disabled (0UL) /*!< Disable cache. Invalidates all cache entries. */ -#define NVMC_ICACHECNF_CACHEEN_Enabled (1UL) /*!< Enable cache */ - -/* Register: NVMC_IHIT */ -/* Description: I-Code cache hit counter. */ - -/* Bits 31..0 : Number of cache hits */ -#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */ -#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */ - -/* Register: NVMC_IMISS */ -/* Description: I-Code cache miss counter. */ - -/* Bits 31..0 : Number of cache misses */ -#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */ -#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */ - - -/* Peripheral: GPIO */ -/* Description: GPIO Port 1 */ - -/* Register: GPIO_OUT */ -/* Description: Write GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */ - -/* Register: GPIO_OUTSET */ -/* Description: Set individual bits in GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Register: GPIO_OUTCLR */ -/* Description: Clear individual bits in GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Register: GPIO_IN */ -/* Description: Read GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */ - -/* Bit 30 : Pin 30 */ -#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */ - -/* Bit 29 : Pin 29 */ -#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */ - -/* Bit 28 : Pin 28 */ -#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */ - -/* Bit 27 : Pin 27 */ -#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */ - -/* Bit 26 : Pin 26 */ -#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */ - -/* Bit 25 : Pin 25 */ -#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */ - -/* Bit 24 : Pin 24 */ -#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */ - -/* Bit 23 : Pin 23 */ -#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */ - -/* Bit 22 : Pin 22 */ -#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */ - -/* Bit 21 : Pin 21 */ -#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */ - -/* Bit 20 : Pin 20 */ -#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */ - -/* Bit 19 : Pin 19 */ -#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */ - -/* Bit 18 : Pin 18 */ -#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */ - -/* Bit 17 : Pin 17 */ -#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */ - -/* Bit 16 : Pin 16 */ -#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */ - -/* Bit 15 : Pin 15 */ -#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */ - -/* Bit 14 : Pin 14 */ -#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */ - -/* Bit 13 : Pin 13 */ -#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */ - -/* Bit 12 : Pin 12 */ -#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */ - -/* Bit 11 : Pin 11 */ -#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */ - -/* Bit 10 : Pin 10 */ -#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */ - -/* Bit 9 : Pin 9 */ -#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */ - -/* Bit 8 : Pin 8 */ -#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */ - -/* Bit 7 : Pin 7 */ -#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */ - -/* Bit 6 : Pin 6 */ -#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */ - -/* Bit 5 : Pin 5 */ -#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */ - -/* Bit 4 : Pin 4 */ -#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */ - -/* Bit 3 : Pin 3 */ -#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */ - -/* Bit 2 : Pin 2 */ -#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */ - -/* Bit 1 : Pin 1 */ -#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */ - -/* Bit 0 : Pin 0 */ -#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */ - -/* Register: GPIO_DIR */ -/* Description: Direction of GPIO pins */ - -/* Bit 31 : Pin 31 */ -#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */ - -/* Bit 30 : Pin 30 */ -#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */ - -/* Bit 29 : Pin 29 */ -#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */ - -/* Bit 28 : Pin 28 */ -#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */ - -/* Bit 27 : Pin 27 */ -#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */ - -/* Bit 26 : Pin 26 */ -#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */ - -/* Bit 25 : Pin 25 */ -#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */ - -/* Bit 24 : Pin 24 */ -#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */ - -/* Bit 23 : Pin 23 */ -#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */ - -/* Bit 22 : Pin 22 */ -#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */ - -/* Bit 21 : Pin 21 */ -#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */ - -/* Bit 20 : Pin 20 */ -#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */ - -/* Bit 19 : Pin 19 */ -#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */ - -/* Bit 18 : Pin 18 */ -#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */ - -/* Bit 17 : Pin 17 */ -#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */ - -/* Bit 16 : Pin 16 */ -#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */ - -/* Bit 15 : Pin 15 */ -#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */ - -/* Bit 14 : Pin 14 */ -#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */ - -/* Bit 13 : Pin 13 */ -#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */ - -/* Bit 12 : Pin 12 */ -#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */ - -/* Bit 11 : Pin 11 */ -#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */ - -/* Bit 10 : Pin 10 */ -#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */ - -/* Bit 9 : Pin 9 */ -#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */ - -/* Bit 8 : Pin 8 */ -#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */ - -/* Bit 7 : Pin 7 */ -#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */ - -/* Bit 6 : Pin 6 */ -#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */ - -/* Bit 5 : Pin 5 */ -#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */ - -/* Bit 4 : Pin 4 */ -#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */ - -/* Bit 3 : Pin 3 */ -#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */ - -/* Bit 2 : Pin 2 */ -#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */ - -/* Bit 1 : Pin 1 */ -#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */ - -/* Bit 0 : Pin 0 */ -#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */ - -/* Register: GPIO_DIRSET */ -/* Description: DIR set register */ - -/* Bit 31 : Set as output pin 31 */ -#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 30 : Set as output pin 30 */ -#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 29 : Set as output pin 29 */ -#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 28 : Set as output pin 28 */ -#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 27 : Set as output pin 27 */ -#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 26 : Set as output pin 26 */ -#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 25 : Set as output pin 25 */ -#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 24 : Set as output pin 24 */ -#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 23 : Set as output pin 23 */ -#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 22 : Set as output pin 22 */ -#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 21 : Set as output pin 21 */ -#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 20 : Set as output pin 20 */ -#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 19 : Set as output pin 19 */ -#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 18 : Set as output pin 18 */ -#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 17 : Set as output pin 17 */ -#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 16 : Set as output pin 16 */ -#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 15 : Set as output pin 15 */ -#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 14 : Set as output pin 14 */ -#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 13 : Set as output pin 13 */ -#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 12 : Set as output pin 12 */ -#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 11 : Set as output pin 11 */ -#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 10 : Set as output pin 10 */ -#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 9 : Set as output pin 9 */ -#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 8 : Set as output pin 8 */ -#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 7 : Set as output pin 7 */ -#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 6 : Set as output pin 6 */ -#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 5 : Set as output pin 5 */ -#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 4 : Set as output pin 4 */ -#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 3 : Set as output pin 3 */ -#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 2 : Set as output pin 2 */ -#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 1 : Set as output pin 1 */ -#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 0 : Set as output pin 0 */ -#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Register: GPIO_DIRCLR */ -/* Description: DIR clear register */ - -/* Bit 31 : Set as input pin 31 */ -#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 30 : Set as input pin 30 */ -#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 29 : Set as input pin 29 */ -#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 28 : Set as input pin 28 */ -#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 27 : Set as input pin 27 */ -#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 26 : Set as input pin 26 */ -#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 25 : Set as input pin 25 */ -#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 24 : Set as input pin 24 */ -#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 23 : Set as input pin 23 */ -#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 22 : Set as input pin 22 */ -#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 21 : Set as input pin 21 */ -#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 20 : Set as input pin 20 */ -#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 19 : Set as input pin 19 */ -#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 18 : Set as input pin 18 */ -#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 17 : Set as input pin 17 */ -#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 16 : Set as input pin 16 */ -#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 15 : Set as input pin 15 */ -#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 14 : Set as input pin 14 */ -#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 13 : Set as input pin 13 */ -#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 12 : Set as input pin 12 */ -#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 11 : Set as input pin 11 */ -#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 10 : Set as input pin 10 */ -#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 9 : Set as input pin 9 */ -#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 8 : Set as input pin 8 */ -#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 7 : Set as input pin 7 */ -#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 6 : Set as input pin 6 */ -#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 5 : Set as input pin 5 */ -#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 4 : Set as input pin 4 */ -#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 3 : Set as input pin 3 */ -#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 2 : Set as input pin 2 */ -#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 1 : Set as input pin 1 */ -#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 0 : Set as input pin 0 */ -#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Register: GPIO_LATCH */ -/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */ - -/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */ - -/* Register: GPIO_DETECTMODE */ -/* Description: Select between default DETECT signal behaviour and LDETECT mode */ - -/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */ -#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */ -#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */ -#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */ -#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */ - -/* Register: GPIO_PIN_CNF */ -/* Description: Description collection[0]: Configuration of GPIO pins */ - -/* Bits 17..16 : Pin sensing mechanism */ -#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */ -#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */ -#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */ - -/* Bits 10..8 : Drive configuration */ -#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */ -#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */ -#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */ -#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */ -#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */ -#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */ -#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */ -#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */ - -/* Bits 3..2 : Pull configuration */ -#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ -#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ -#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */ -#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */ -#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */ - -/* Bit 1 : Connect or disconnect input buffer */ -#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */ -#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */ - -/* Bit 0 : Pin direction. Same physical register as DIR register */ -#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ -#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ -#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */ -#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */ - - -/* Peripheral: PDM */ -/* Description: Pulse Density Modulation (Digital Microphone) Interface */ - -/* Register: PDM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 2 : Enable or disable interrupt for END event */ -#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for STARTED event */ -#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Register: PDM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for END event */ -#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ -#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Register: PDM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for END event */ -#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ -#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Register: PDM_ENABLE */ -/* Description: PDM module enable register */ - -/* Bit 0 : Enable or disable PDM module */ -#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: PDM_PDMCLKCTRL */ -/* Description: PDM clock generator control */ - -/* Bits 31..0 : PDM_CLK frequency */ -#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */ -#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */ -#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */ -#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64. */ -#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */ -#define PDM_PDMCLKCTRL_FREQ_1231K (0x09800000UL) /*!< PDM_CLK = 32 MHz / 26 = 1.231 MHz */ -#define PDM_PDMCLKCTRL_FREQ_1280K (0x0A000000UL) /*!< PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80. */ -#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ - -/* Register: PDM_MODE */ -/* Description: Defines the routing of the connected PDM microphones' signals */ - -/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */ -#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */ -#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */ -#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */ -#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */ - -/* Bit 0 : Mono or stereo operation */ -#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */ -#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */ -#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */ -#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */ - -/* Register: PDM_GAINL */ -/* Description: Left output gain adjustment */ - -/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */ -#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */ -#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */ -#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ -#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ -#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ - -/* Register: PDM_GAINR */ -/* Description: Right output gain adjustment */ - -/* Bits 7..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */ -#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */ -#define PDM_GAINR_GAINR_Msk (0xFFUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */ -#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ -#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ -#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ - -/* Register: PDM_RATIO */ -/* Description: Selects the ratio between PDM_CLK and output sample rate. Change PDMCLKCTRL accordingly. */ - -/* Bit 0 : Selects the ratio between PDM_CLK and output sample rate */ -#define PDM_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ -#define PDM_RATIO_RATIO_Msk (0x1UL << PDM_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ -#define PDM_RATIO_RATIO_Ratio64 (0UL) /*!< Ratio of 64 */ -#define PDM_RATIO_RATIO_Ratio80 (1UL) /*!< Ratio of 80 */ - -/* Register: PDM_PSEL_CLK */ -/* Description: Pin number configuration for PDM CLK signal */ - -/* Bit 31 : Connection */ -#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */ -#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define PDM_PSEL_CLK_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define PDM_PSEL_CLK_PORT_Msk (0x3UL << PDM_PSEL_CLK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: PDM_PSEL_DIN */ -/* Description: Pin number configuration for PDM DIN signal */ - -/* Bit 31 : Connection */ -#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */ -#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define PDM_PSEL_DIN_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define PDM_PSEL_DIN_PORT_Msk (0x3UL << PDM_PSEL_DIN_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: PDM_SAMPLE_PTR */ -/* Description: RAM address pointer to write samples to with EasyDMA */ - -/* Bits 31..0 : Address to write PDM samples to over DMA */ -#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */ -#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */ - -/* Register: PDM_SAMPLE_MAXCNT */ -/* Description: Number of samples to allocate memory for in EasyDMA mode */ - -/* Bits 14..0 : Length of DMA RAM allocation in number of samples */ -#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */ -#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */ - - -/* Peripheral: POWER */ -/* Description: Power control */ - -/* Register: POWER_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 9 : Write '1' to Enable interrupt for USBPWRRDY event */ -#define POWER_INTENSET_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */ -#define POWER_INTENSET_USBPWRRDY_Msk (0x1UL << POWER_INTENSET_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */ -#define POWER_INTENSET_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_USBPWRRDY_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for USBREMOVED event */ -#define POWER_INTENSET_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */ -#define POWER_INTENSET_USBREMOVED_Msk (0x1UL << POWER_INTENSET_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */ -#define POWER_INTENSET_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_USBREMOVED_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for USBDETECTED event */ -#define POWER_INTENSET_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */ -#define POWER_INTENSET_USBDETECTED_Msk (0x1UL << POWER_INTENSET_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */ -#define POWER_INTENSET_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_USBDETECTED_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for SLEEPEXIT event */ -#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ -#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ -#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for SLEEPENTER event */ -#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ -#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ -#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for POFWARN event */ -#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */ - -/* Register: POWER_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 9 : Write '1' to Disable interrupt for USBPWRRDY event */ -#define POWER_INTENCLR_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */ -#define POWER_INTENCLR_USBPWRRDY_Msk (0x1UL << POWER_INTENCLR_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */ -#define POWER_INTENCLR_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_USBPWRRDY_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for USBREMOVED event */ -#define POWER_INTENCLR_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */ -#define POWER_INTENCLR_USBREMOVED_Msk (0x1UL << POWER_INTENCLR_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */ -#define POWER_INTENCLR_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_USBREMOVED_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for USBDETECTED event */ -#define POWER_INTENCLR_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */ -#define POWER_INTENCLR_USBDETECTED_Msk (0x1UL << POWER_INTENCLR_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */ -#define POWER_INTENCLR_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_USBDETECTED_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for SLEEPEXIT event */ -#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ -#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ -#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for SLEEPENTER event */ -#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ -#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ -#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for POFWARN event */ -#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */ - -/* Register: POWER_RESETREAS */ -/* Description: Reset reason */ - -/* Bit 20 : Reset due to wake up from System OFF mode by Vbus rising into valid range */ -#define POWER_RESETREAS_VBUS_Pos (20UL) /*!< Position of VBUS field. */ -#define POWER_RESETREAS_VBUS_Msk (0x1UL << POWER_RESETREAS_VBUS_Pos) /*!< Bit mask of VBUS field. */ -#define POWER_RESETREAS_VBUS_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_VBUS_Detected (1UL) /*!< Detected */ - -/* Bit 19 : Reset due to wake up from System OFF mode by NFC field detect */ -#define POWER_RESETREAS_NFC_Pos (19UL) /*!< Position of NFC field. */ -#define POWER_RESETREAS_NFC_Msk (0x1UL << POWER_RESETREAS_NFC_Pos) /*!< Bit mask of NFC field. */ -#define POWER_RESETREAS_NFC_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_NFC_Detected (1UL) /*!< Detected */ - -/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */ -#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ -#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ -#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */ - -/* Bit 17 : Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP */ -#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ -#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ -#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Detected */ - -/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */ -#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ -#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ -#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */ - -/* Bit 3 : Reset from CPU lock-up detected */ -#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ -#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ -#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */ - -/* Bit 2 : Reset from soft reset detected */ -#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ -#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ -#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */ - -/* Bit 1 : Reset from watchdog detected */ -#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ -#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ -#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */ - -/* Bit 0 : Reset from pin-reset detected */ -#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ -#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ -#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */ - -/* Register: POWER_RAMSTATUS */ -/* Description: Deprecated register - RAM status register */ - -/* Bit 3 : RAM block 3 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< On */ - -/* Bit 2 : RAM block 2 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< On */ - -/* Bit 1 : RAM block 1 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< On */ - -/* Bit 0 : RAM block 0 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< On */ - -/* Register: POWER_USBREGSTATUS */ -/* Description: USB supply status */ - -/* Bit 1 : USB supply output settling time elapsed */ -#define POWER_USBREGSTATUS_OUTPUTRDY_Pos (1UL) /*!< Position of OUTPUTRDY field. */ -#define POWER_USBREGSTATUS_OUTPUTRDY_Msk (0x1UL << POWER_USBREGSTATUS_OUTPUTRDY_Pos) /*!< Bit mask of OUTPUTRDY field. */ -#define POWER_USBREGSTATUS_OUTPUTRDY_NotReady (0UL) /*!< USBREG output settling time not elapsed */ -#define POWER_USBREGSTATUS_OUTPUTRDY_Ready (1UL) /*!< USBREG output settling time elapsed (same information as USBPWRRDY event) */ - -/* Bit 0 : VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information) */ -#define POWER_USBREGSTATUS_VBUSDETECT_Pos (0UL) /*!< Position of VBUSDETECT field. */ -#define POWER_USBREGSTATUS_VBUSDETECT_Msk (0x1UL << POWER_USBREGSTATUS_VBUSDETECT_Pos) /*!< Bit mask of VBUSDETECT field. */ -#define POWER_USBREGSTATUS_VBUSDETECT_NoVbus (0UL) /*!< VBUS voltage below valid threshold */ -#define POWER_USBREGSTATUS_VBUSDETECT_VbusPresent (1UL) /*!< VBUS voltage above valid threshold */ - -/* Register: POWER_SYSTEMOFF */ -/* Description: System OFF register */ - -/* Bit 0 : Enable System OFF mode */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */ - -/* Register: POWER_POFCON */ -/* Description: Power failure comparator configuration */ - -/* Bits 11..8 : Power failure comparator threshold setting for voltage supply on VDDH */ -#define POWER_POFCON_THRESHOLDVDDH_Pos (8UL) /*!< Position of THRESHOLDVDDH field. */ -#define POWER_POFCON_THRESHOLDVDDH_Msk (0xFUL << POWER_POFCON_THRESHOLDVDDH_Pos) /*!< Bit mask of THRESHOLDVDDH field. */ -#define POWER_POFCON_THRESHOLDVDDH_V27 (0UL) /*!< Set threshold to 2.7 V */ -#define POWER_POFCON_THRESHOLDVDDH_V28 (1UL) /*!< Set threshold to 2.8 V */ -#define POWER_POFCON_THRESHOLDVDDH_V29 (2UL) /*!< Set threshold to 2.9 V */ -#define POWER_POFCON_THRESHOLDVDDH_V30 (3UL) /*!< Set threshold to 3.0 V */ -#define POWER_POFCON_THRESHOLDVDDH_V31 (4UL) /*!< Set threshold to 3.1 V */ -#define POWER_POFCON_THRESHOLDVDDH_V32 (5UL) /*!< Set threshold to 3.2 V */ -#define POWER_POFCON_THRESHOLDVDDH_V33 (6UL) /*!< Set threshold to 3.3 V */ -#define POWER_POFCON_THRESHOLDVDDH_V34 (7UL) /*!< Set threshold to 3.4 V */ -#define POWER_POFCON_THRESHOLDVDDH_V35 (8UL) /*!< Set threshold to 3.5 V */ -#define POWER_POFCON_THRESHOLDVDDH_V36 (9UL) /*!< Set threshold to 3.6 V */ -#define POWER_POFCON_THRESHOLDVDDH_V37 (10UL) /*!< Set threshold to 3.7 V */ -#define POWER_POFCON_THRESHOLDVDDH_V38 (11UL) /*!< Set threshold to 3.8 V */ -#define POWER_POFCON_THRESHOLDVDDH_V39 (12UL) /*!< Set threshold to 3.9 V */ -#define POWER_POFCON_THRESHOLDVDDH_V40 (13UL) /*!< Set threshold to 4.0 V */ -#define POWER_POFCON_THRESHOLDVDDH_V41 (14UL) /*!< Set threshold to 4.1 V */ -#define POWER_POFCON_THRESHOLDVDDH_V42 (15UL) /*!< Set threshold to 4.2 V */ - -/* Bits 4..1 : Power failure comparator threshold setting */ -#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */ -#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */ -#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */ -#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */ -#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */ -#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */ -#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */ -#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */ -#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */ -#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */ -#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */ -#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */ - -/* Bit 0 : Enable or disable power failure comparator */ -#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ -#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ -#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */ -#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */ - -/* Register: POWER_GPREGRET */ -/* Description: General purpose retention register */ - -/* Bits 7..0 : General purpose retention register */ -#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ -#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ - -/* Register: POWER_GPREGRET2 */ -/* Description: General purpose retention register */ - -/* Bits 7..0 : General purpose retention register */ -#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ -#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ - -/* Register: POWER_DCDCEN */ -/* Description: Enable DC/DC converter for REG1 stage. */ - -/* Bit 0 : Enable DC/DC converter for REG1 stage. */ -#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */ -#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */ - -/* Register: POWER_DCDCEN0 */ -/* Description: Enable DC/DC converter for REG0 stage. */ - -/* Bit 0 : Enable DC/DC converter for REG0 stage. */ -#define POWER_DCDCEN0_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ -#define POWER_DCDCEN0_DCDCEN_Msk (0x1UL << POWER_DCDCEN0_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ -#define POWER_DCDCEN0_DCDCEN_Disabled (0UL) /*!< Disable */ -#define POWER_DCDCEN0_DCDCEN_Enabled (1UL) /*!< Enable */ - -/* Register: POWER_MAINREGSTATUS */ -/* Description: Main supply status */ - -/* Bit 0 : Main supply status */ -#define POWER_MAINREGSTATUS_MAINREGSTATUS_Pos (0UL) /*!< Position of MAINREGSTATUS field. */ -#define POWER_MAINREGSTATUS_MAINREGSTATUS_Msk (0x1UL << POWER_MAINREGSTATUS_MAINREGSTATUS_Pos) /*!< Bit mask of MAINREGSTATUS field. */ -#define POWER_MAINREGSTATUS_MAINREGSTATUS_Normal (0UL) /*!< Normal voltage mode. Voltage supplied on VDD. */ -#define POWER_MAINREGSTATUS_MAINREGSTATUS_High (1UL) /*!< High voltage mode. Voltage supplied on VDDH. */ - -/* Register: POWER_RAM_POWER */ -/* Description: Description cluster[0]: RAM0 power control register */ - -/* Bit 31 : Keep retention on RAM section S15 when RAM section is in OFF */ -#define POWER_RAM_POWER_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ -#define POWER_RAM_POWER_S15RETENTION_Msk (0x1UL << POWER_RAM_POWER_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ -#define POWER_RAM_POWER_S15RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S15RETENTION_On (1UL) /*!< On */ - -/* Bit 30 : Keep retention on RAM section S14 when RAM section is in OFF */ -#define POWER_RAM_POWER_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ -#define POWER_RAM_POWER_S14RETENTION_Msk (0x1UL << POWER_RAM_POWER_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ -#define POWER_RAM_POWER_S14RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S14RETENTION_On (1UL) /*!< On */ - -/* Bit 29 : Keep retention on RAM section S13 when RAM section is in OFF */ -#define POWER_RAM_POWER_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ -#define POWER_RAM_POWER_S13RETENTION_Msk (0x1UL << POWER_RAM_POWER_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ -#define POWER_RAM_POWER_S13RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S13RETENTION_On (1UL) /*!< On */ - -/* Bit 28 : Keep retention on RAM section S12 when RAM section is in OFF */ -#define POWER_RAM_POWER_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ -#define POWER_RAM_POWER_S12RETENTION_Msk (0x1UL << POWER_RAM_POWER_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ -#define POWER_RAM_POWER_S12RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S12RETENTION_On (1UL) /*!< On */ - -/* Bit 27 : Keep retention on RAM section S11 when RAM section is in OFF */ -#define POWER_RAM_POWER_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ -#define POWER_RAM_POWER_S11RETENTION_Msk (0x1UL << POWER_RAM_POWER_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ -#define POWER_RAM_POWER_S11RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S11RETENTION_On (1UL) /*!< On */ - -/* Bit 26 : Keep retention on RAM section S10 when RAM section is in OFF */ -#define POWER_RAM_POWER_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ -#define POWER_RAM_POWER_S10RETENTION_Msk (0x1UL << POWER_RAM_POWER_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ -#define POWER_RAM_POWER_S10RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S10RETENTION_On (1UL) /*!< On */ - -/* Bit 25 : Keep retention on RAM section S9 when RAM section is in OFF */ -#define POWER_RAM_POWER_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ -#define POWER_RAM_POWER_S9RETENTION_Msk (0x1UL << POWER_RAM_POWER_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ -#define POWER_RAM_POWER_S9RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S9RETENTION_On (1UL) /*!< On */ - -/* Bit 24 : Keep retention on RAM section S8 when RAM section is in OFF */ -#define POWER_RAM_POWER_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ -#define POWER_RAM_POWER_S8RETENTION_Msk (0x1UL << POWER_RAM_POWER_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ -#define POWER_RAM_POWER_S8RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S8RETENTION_On (1UL) /*!< On */ - -/* Bit 23 : Keep retention on RAM section S7 when RAM section is in OFF */ -#define POWER_RAM_POWER_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ -#define POWER_RAM_POWER_S7RETENTION_Msk (0x1UL << POWER_RAM_POWER_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ -#define POWER_RAM_POWER_S7RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S7RETENTION_On (1UL) /*!< On */ - -/* Bit 22 : Keep retention on RAM section S6 when RAM section is in OFF */ -#define POWER_RAM_POWER_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ -#define POWER_RAM_POWER_S6RETENTION_Msk (0x1UL << POWER_RAM_POWER_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ -#define POWER_RAM_POWER_S6RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S6RETENTION_On (1UL) /*!< On */ - -/* Bit 21 : Keep retention on RAM section S5 when RAM section is in OFF */ -#define POWER_RAM_POWER_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ -#define POWER_RAM_POWER_S5RETENTION_Msk (0x1UL << POWER_RAM_POWER_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ -#define POWER_RAM_POWER_S5RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S5RETENTION_On (1UL) /*!< On */ - -/* Bit 20 : Keep retention on RAM section S4 when RAM section is in OFF */ -#define POWER_RAM_POWER_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ -#define POWER_RAM_POWER_S4RETENTION_Msk (0x1UL << POWER_RAM_POWER_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ -#define POWER_RAM_POWER_S4RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S4RETENTION_On (1UL) /*!< On */ - -/* Bit 19 : Keep retention on RAM section S3 when RAM section is in OFF */ -#define POWER_RAM_POWER_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ -#define POWER_RAM_POWER_S3RETENTION_Msk (0x1UL << POWER_RAM_POWER_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ -#define POWER_RAM_POWER_S3RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S3RETENTION_On (1UL) /*!< On */ - -/* Bit 18 : Keep retention on RAM section S2 when RAM section is in OFF */ -#define POWER_RAM_POWER_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ -#define POWER_RAM_POWER_S2RETENTION_Msk (0x1UL << POWER_RAM_POWER_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ -#define POWER_RAM_POWER_S2RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S2RETENTION_On (1UL) /*!< On */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is in OFF */ -#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is in OFF */ -#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */ - -/* Bit 15 : Keep RAM section S15 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ -#define POWER_RAM_POWER_S15POWER_Msk (0x1UL << POWER_RAM_POWER_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ -#define POWER_RAM_POWER_S15POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S15POWER_On (1UL) /*!< On */ - -/* Bit 14 : Keep RAM section S14 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ -#define POWER_RAM_POWER_S14POWER_Msk (0x1UL << POWER_RAM_POWER_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ -#define POWER_RAM_POWER_S14POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S14POWER_On (1UL) /*!< On */ - -/* Bit 13 : Keep RAM section S13 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ -#define POWER_RAM_POWER_S13POWER_Msk (0x1UL << POWER_RAM_POWER_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ -#define POWER_RAM_POWER_S13POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S13POWER_On (1UL) /*!< On */ - -/* Bit 12 : Keep RAM section S12 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ -#define POWER_RAM_POWER_S12POWER_Msk (0x1UL << POWER_RAM_POWER_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ -#define POWER_RAM_POWER_S12POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S12POWER_On (1UL) /*!< On */ - -/* Bit 11 : Keep RAM section S11 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ -#define POWER_RAM_POWER_S11POWER_Msk (0x1UL << POWER_RAM_POWER_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ -#define POWER_RAM_POWER_S11POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S11POWER_On (1UL) /*!< On */ - -/* Bit 10 : Keep RAM section S10 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ -#define POWER_RAM_POWER_S10POWER_Msk (0x1UL << POWER_RAM_POWER_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ -#define POWER_RAM_POWER_S10POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S10POWER_On (1UL) /*!< On */ - -/* Bit 9 : Keep RAM section S9 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ -#define POWER_RAM_POWER_S9POWER_Msk (0x1UL << POWER_RAM_POWER_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ -#define POWER_RAM_POWER_S9POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S9POWER_On (1UL) /*!< On */ - -/* Bit 8 : Keep RAM section S8 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ -#define POWER_RAM_POWER_S8POWER_Msk (0x1UL << POWER_RAM_POWER_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ -#define POWER_RAM_POWER_S8POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S8POWER_On (1UL) /*!< On */ - -/* Bit 7 : Keep RAM section S7 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ -#define POWER_RAM_POWER_S7POWER_Msk (0x1UL << POWER_RAM_POWER_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ -#define POWER_RAM_POWER_S7POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S7POWER_On (1UL) /*!< On */ - -/* Bit 6 : Keep RAM section S6 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ -#define POWER_RAM_POWER_S6POWER_Msk (0x1UL << POWER_RAM_POWER_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ -#define POWER_RAM_POWER_S6POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S6POWER_On (1UL) /*!< On */ - -/* Bit 5 : Keep RAM section S5 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ -#define POWER_RAM_POWER_S5POWER_Msk (0x1UL << POWER_RAM_POWER_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ -#define POWER_RAM_POWER_S5POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S5POWER_On (1UL) /*!< On */ - -/* Bit 4 : Keep RAM section S4 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ -#define POWER_RAM_POWER_S4POWER_Msk (0x1UL << POWER_RAM_POWER_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ -#define POWER_RAM_POWER_S4POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S4POWER_On (1UL) /*!< On */ - -/* Bit 3 : Keep RAM section S3 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ -#define POWER_RAM_POWER_S3POWER_Msk (0x1UL << POWER_RAM_POWER_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ -#define POWER_RAM_POWER_S3POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S3POWER_On (1UL) /*!< On */ - -/* Bit 2 : Keep RAM section S2 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ -#define POWER_RAM_POWER_S2POWER_Msk (0x1UL << POWER_RAM_POWER_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ -#define POWER_RAM_POWER_S2POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S2POWER_On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM section S1 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM section S0 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */ - -/* Register: POWER_RAM_POWERSET */ -/* Description: Description cluster[0]: RAM0 power control set register */ - -/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ -#define POWER_RAM_POWERSET_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ -#define POWER_RAM_POWERSET_S15RETENTION_On (1UL) /*!< On */ - -/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ -#define POWER_RAM_POWERSET_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ -#define POWER_RAM_POWERSET_S14RETENTION_On (1UL) /*!< On */ - -/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ -#define POWER_RAM_POWERSET_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ -#define POWER_RAM_POWERSET_S13RETENTION_On (1UL) /*!< On */ - -/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ -#define POWER_RAM_POWERSET_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ -#define POWER_RAM_POWERSET_S12RETENTION_On (1UL) /*!< On */ - -/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ -#define POWER_RAM_POWERSET_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ -#define POWER_RAM_POWERSET_S11RETENTION_On (1UL) /*!< On */ - -/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ -#define POWER_RAM_POWERSET_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ -#define POWER_RAM_POWERSET_S10RETENTION_On (1UL) /*!< On */ - -/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ -#define POWER_RAM_POWERSET_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ -#define POWER_RAM_POWERSET_S9RETENTION_On (1UL) /*!< On */ - -/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ -#define POWER_RAM_POWERSET_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ -#define POWER_RAM_POWERSET_S8RETENTION_On (1UL) /*!< On */ - -/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ -#define POWER_RAM_POWERSET_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ -#define POWER_RAM_POWERSET_S7RETENTION_On (1UL) /*!< On */ - -/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ -#define POWER_RAM_POWERSET_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ -#define POWER_RAM_POWERSET_S6RETENTION_On (1UL) /*!< On */ - -/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ -#define POWER_RAM_POWERSET_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ -#define POWER_RAM_POWERSET_S5RETENTION_On (1UL) /*!< On */ - -/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ -#define POWER_RAM_POWERSET_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ -#define POWER_RAM_POWERSET_S4RETENTION_On (1UL) /*!< On */ - -/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ -#define POWER_RAM_POWERSET_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ -#define POWER_RAM_POWERSET_S3RETENTION_On (1UL) /*!< On */ - -/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ -#define POWER_RAM_POWERSET_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ -#define POWER_RAM_POWERSET_S2RETENTION_On (1UL) /*!< On */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */ - -/* Bit 15 : Keep RAM section S15 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ -#define POWER_RAM_POWERSET_S15POWER_Msk (0x1UL << POWER_RAM_POWERSET_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ -#define POWER_RAM_POWERSET_S15POWER_On (1UL) /*!< On */ - -/* Bit 14 : Keep RAM section S14 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ -#define POWER_RAM_POWERSET_S14POWER_Msk (0x1UL << POWER_RAM_POWERSET_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ -#define POWER_RAM_POWERSET_S14POWER_On (1UL) /*!< On */ - -/* Bit 13 : Keep RAM section S13 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ -#define POWER_RAM_POWERSET_S13POWER_Msk (0x1UL << POWER_RAM_POWERSET_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ -#define POWER_RAM_POWERSET_S13POWER_On (1UL) /*!< On */ - -/* Bit 12 : Keep RAM section S12 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ -#define POWER_RAM_POWERSET_S12POWER_Msk (0x1UL << POWER_RAM_POWERSET_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ -#define POWER_RAM_POWERSET_S12POWER_On (1UL) /*!< On */ - -/* Bit 11 : Keep RAM section S11 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ -#define POWER_RAM_POWERSET_S11POWER_Msk (0x1UL << POWER_RAM_POWERSET_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ -#define POWER_RAM_POWERSET_S11POWER_On (1UL) /*!< On */ - -/* Bit 10 : Keep RAM section S10 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ -#define POWER_RAM_POWERSET_S10POWER_Msk (0x1UL << POWER_RAM_POWERSET_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ -#define POWER_RAM_POWERSET_S10POWER_On (1UL) /*!< On */ - -/* Bit 9 : Keep RAM section S9 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ -#define POWER_RAM_POWERSET_S9POWER_Msk (0x1UL << POWER_RAM_POWERSET_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ -#define POWER_RAM_POWERSET_S9POWER_On (1UL) /*!< On */ - -/* Bit 8 : Keep RAM section S8 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ -#define POWER_RAM_POWERSET_S8POWER_Msk (0x1UL << POWER_RAM_POWERSET_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ -#define POWER_RAM_POWERSET_S8POWER_On (1UL) /*!< On */ - -/* Bit 7 : Keep RAM section S7 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ -#define POWER_RAM_POWERSET_S7POWER_Msk (0x1UL << POWER_RAM_POWERSET_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ -#define POWER_RAM_POWERSET_S7POWER_On (1UL) /*!< On */ - -/* Bit 6 : Keep RAM section S6 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ -#define POWER_RAM_POWERSET_S6POWER_Msk (0x1UL << POWER_RAM_POWERSET_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ -#define POWER_RAM_POWERSET_S6POWER_On (1UL) /*!< On */ - -/* Bit 5 : Keep RAM section S5 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ -#define POWER_RAM_POWERSET_S5POWER_Msk (0x1UL << POWER_RAM_POWERSET_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ -#define POWER_RAM_POWERSET_S5POWER_On (1UL) /*!< On */ - -/* Bit 4 : Keep RAM section S4 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ -#define POWER_RAM_POWERSET_S4POWER_Msk (0x1UL << POWER_RAM_POWERSET_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ -#define POWER_RAM_POWERSET_S4POWER_On (1UL) /*!< On */ - -/* Bit 3 : Keep RAM section S3 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ -#define POWER_RAM_POWERSET_S3POWER_Msk (0x1UL << POWER_RAM_POWERSET_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ -#define POWER_RAM_POWERSET_S3POWER_On (1UL) /*!< On */ - -/* Bit 2 : Keep RAM section S2 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ -#define POWER_RAM_POWERSET_S2POWER_Msk (0x1UL << POWER_RAM_POWERSET_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ -#define POWER_RAM_POWERSET_S2POWER_On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */ - -/* Register: POWER_RAM_POWERCLR */ -/* Description: Description cluster[0]: RAM0 power control clear register */ - -/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ -#define POWER_RAM_POWERCLR_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ -#define POWER_RAM_POWERCLR_S15RETENTION_Off (1UL) /*!< Off */ - -/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ -#define POWER_RAM_POWERCLR_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ -#define POWER_RAM_POWERCLR_S14RETENTION_Off (1UL) /*!< Off */ - -/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ -#define POWER_RAM_POWERCLR_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ -#define POWER_RAM_POWERCLR_S13RETENTION_Off (1UL) /*!< Off */ - -/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ -#define POWER_RAM_POWERCLR_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ -#define POWER_RAM_POWERCLR_S12RETENTION_Off (1UL) /*!< Off */ - -/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ -#define POWER_RAM_POWERCLR_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ -#define POWER_RAM_POWERCLR_S11RETENTION_Off (1UL) /*!< Off */ - -/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ -#define POWER_RAM_POWERCLR_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ -#define POWER_RAM_POWERCLR_S10RETENTION_Off (1UL) /*!< Off */ - -/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ -#define POWER_RAM_POWERCLR_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ -#define POWER_RAM_POWERCLR_S9RETENTION_Off (1UL) /*!< Off */ - -/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ -#define POWER_RAM_POWERCLR_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ -#define POWER_RAM_POWERCLR_S8RETENTION_Off (1UL) /*!< Off */ - -/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ -#define POWER_RAM_POWERCLR_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ -#define POWER_RAM_POWERCLR_S7RETENTION_Off (1UL) /*!< Off */ - -/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ -#define POWER_RAM_POWERCLR_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ -#define POWER_RAM_POWERCLR_S6RETENTION_Off (1UL) /*!< Off */ - -/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ -#define POWER_RAM_POWERCLR_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ -#define POWER_RAM_POWERCLR_S5RETENTION_Off (1UL) /*!< Off */ - -/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ -#define POWER_RAM_POWERCLR_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ -#define POWER_RAM_POWERCLR_S4RETENTION_Off (1UL) /*!< Off */ - -/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ -#define POWER_RAM_POWERCLR_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ -#define POWER_RAM_POWERCLR_S3RETENTION_Off (1UL) /*!< Off */ - -/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ -#define POWER_RAM_POWERCLR_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ -#define POWER_RAM_POWERCLR_S2RETENTION_Off (1UL) /*!< Off */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */ - -/* Bit 15 : Keep RAM section S15 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ -#define POWER_RAM_POWERCLR_S15POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ -#define POWER_RAM_POWERCLR_S15POWER_Off (1UL) /*!< Off */ - -/* Bit 14 : Keep RAM section S14 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ -#define POWER_RAM_POWERCLR_S14POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ -#define POWER_RAM_POWERCLR_S14POWER_Off (1UL) /*!< Off */ - -/* Bit 13 : Keep RAM section S13 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ -#define POWER_RAM_POWERCLR_S13POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ -#define POWER_RAM_POWERCLR_S13POWER_Off (1UL) /*!< Off */ - -/* Bit 12 : Keep RAM section S12 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ -#define POWER_RAM_POWERCLR_S12POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ -#define POWER_RAM_POWERCLR_S12POWER_Off (1UL) /*!< Off */ - -/* Bit 11 : Keep RAM section S11 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ -#define POWER_RAM_POWERCLR_S11POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ -#define POWER_RAM_POWERCLR_S11POWER_Off (1UL) /*!< Off */ - -/* Bit 10 : Keep RAM section S10 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ -#define POWER_RAM_POWERCLR_S10POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ -#define POWER_RAM_POWERCLR_S10POWER_Off (1UL) /*!< Off */ - -/* Bit 9 : Keep RAM section S9 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ -#define POWER_RAM_POWERCLR_S9POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ -#define POWER_RAM_POWERCLR_S9POWER_Off (1UL) /*!< Off */ - -/* Bit 8 : Keep RAM section S8 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ -#define POWER_RAM_POWERCLR_S8POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ -#define POWER_RAM_POWERCLR_S8POWER_Off (1UL) /*!< Off */ - -/* Bit 7 : Keep RAM section S7 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ -#define POWER_RAM_POWERCLR_S7POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ -#define POWER_RAM_POWERCLR_S7POWER_Off (1UL) /*!< Off */ - -/* Bit 6 : Keep RAM section S6 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ -#define POWER_RAM_POWERCLR_S6POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ -#define POWER_RAM_POWERCLR_S6POWER_Off (1UL) /*!< Off */ - -/* Bit 5 : Keep RAM section S5 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ -#define POWER_RAM_POWERCLR_S5POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ -#define POWER_RAM_POWERCLR_S5POWER_Off (1UL) /*!< Off */ - -/* Bit 4 : Keep RAM section S4 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ -#define POWER_RAM_POWERCLR_S4POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ -#define POWER_RAM_POWERCLR_S4POWER_Off (1UL) /*!< Off */ - -/* Bit 3 : Keep RAM section S3 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ -#define POWER_RAM_POWERCLR_S3POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ -#define POWER_RAM_POWERCLR_S3POWER_Off (1UL) /*!< Off */ - -/* Bit 2 : Keep RAM section S2 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ -#define POWER_RAM_POWERCLR_S2POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ -#define POWER_RAM_POWERCLR_S2POWER_Off (1UL) /*!< Off */ - -/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */ - -/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */ - - -/* Peripheral: PPI */ -/* Description: Programmable Peripheral Interconnect */ - -/* Register: PPI_CHEN */ -/* Description: Channel enable register */ - -/* Bit 31 : Enable or disable channel 31 */ -#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */ - -/* Bit 30 : Enable or disable channel 30 */ -#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */ - -/* Bit 29 : Enable or disable channel 29 */ -#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */ - -/* Bit 28 : Enable or disable channel 28 */ -#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */ - -/* Bit 27 : Enable or disable channel 27 */ -#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */ - -/* Bit 26 : Enable or disable channel 26 */ -#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */ - -/* Bit 25 : Enable or disable channel 25 */ -#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */ - -/* Bit 24 : Enable or disable channel 24 */ -#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */ - -/* Bit 23 : Enable or disable channel 23 */ -#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */ - -/* Bit 22 : Enable or disable channel 22 */ -#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */ - -/* Bit 21 : Enable or disable channel 21 */ -#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */ - -/* Bit 20 : Enable or disable channel 20 */ -#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */ - -/* Bit 19 : Enable or disable channel 19 */ -#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */ - -/* Bit 18 : Enable or disable channel 18 */ -#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */ - -/* Bit 17 : Enable or disable channel 17 */ -#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */ - -/* Bit 16 : Enable or disable channel 16 */ -#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */ - -/* Bit 15 : Enable or disable channel 15 */ -#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */ - -/* Bit 14 : Enable or disable channel 14 */ -#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */ - -/* Bit 13 : Enable or disable channel 13 */ -#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */ - -/* Bit 12 : Enable or disable channel 12 */ -#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */ - -/* Bit 11 : Enable or disable channel 11 */ -#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */ - -/* Bit 10 : Enable or disable channel 10 */ -#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */ - -/* Bit 9 : Enable or disable channel 9 */ -#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */ - -/* Bit 8 : Enable or disable channel 8 */ -#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */ - -/* Bit 7 : Enable or disable channel 7 */ -#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */ - -/* Bit 6 : Enable or disable channel 6 */ -#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */ - -/* Bit 5 : Enable or disable channel 5 */ -#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */ - -/* Bit 4 : Enable or disable channel 4 */ -#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */ - -/* Bit 3 : Enable or disable channel 3 */ -#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */ - -/* Bit 2 : Enable or disable channel 2 */ -#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */ - -/* Bit 1 : Enable or disable channel 1 */ -#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */ - -/* Bit 0 : Enable or disable channel 0 */ -#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */ - -/* Register: PPI_CHENSET */ -/* Description: Channel enable set register */ - -/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */ - -/* Register: PPI_CHENCLR */ -/* Description: Channel enable clear register */ - -/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */ - -/* Register: PPI_CH_EEP */ -/* Description: Description cluster[0]: Channel 0 event end-point */ - -/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */ -#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */ -#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */ - -/* Register: PPI_CH_TEP */ -/* Description: Description cluster[0]: Channel 0 task end-point */ - -/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */ -#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ -#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ - -/* Register: PPI_CHG */ -/* Description: Description collection[0]: Channel group 0 */ - -/* Bit 31 : Include or exclude channel 31 */ -#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH31_Included (1UL) /*!< Include */ - -/* Bit 30 : Include or exclude channel 30 */ -#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH30_Included (1UL) /*!< Include */ - -/* Bit 29 : Include or exclude channel 29 */ -#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH29_Included (1UL) /*!< Include */ - -/* Bit 28 : Include or exclude channel 28 */ -#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH28_Included (1UL) /*!< Include */ - -/* Bit 27 : Include or exclude channel 27 */ -#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH27_Included (1UL) /*!< Include */ - -/* Bit 26 : Include or exclude channel 26 */ -#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH26_Included (1UL) /*!< Include */ - -/* Bit 25 : Include or exclude channel 25 */ -#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH25_Included (1UL) /*!< Include */ - -/* Bit 24 : Include or exclude channel 24 */ -#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH24_Included (1UL) /*!< Include */ - -/* Bit 23 : Include or exclude channel 23 */ -#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH23_Included (1UL) /*!< Include */ - -/* Bit 22 : Include or exclude channel 22 */ -#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH22_Included (1UL) /*!< Include */ - -/* Bit 21 : Include or exclude channel 21 */ -#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH21_Included (1UL) /*!< Include */ - -/* Bit 20 : Include or exclude channel 20 */ -#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH20_Included (1UL) /*!< Include */ - -/* Bit 19 : Include or exclude channel 19 */ -#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH19_Included (1UL) /*!< Include */ - -/* Bit 18 : Include or exclude channel 18 */ -#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH18_Included (1UL) /*!< Include */ - -/* Bit 17 : Include or exclude channel 17 */ -#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH17_Included (1UL) /*!< Include */ - -/* Bit 16 : Include or exclude channel 16 */ -#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH16_Included (1UL) /*!< Include */ - -/* Bit 15 : Include or exclude channel 15 */ -#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH15_Included (1UL) /*!< Include */ - -/* Bit 14 : Include or exclude channel 14 */ -#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH14_Included (1UL) /*!< Include */ - -/* Bit 13 : Include or exclude channel 13 */ -#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH13_Included (1UL) /*!< Include */ - -/* Bit 12 : Include or exclude channel 12 */ -#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH12_Included (1UL) /*!< Include */ - -/* Bit 11 : Include or exclude channel 11 */ -#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH11_Included (1UL) /*!< Include */ - -/* Bit 10 : Include or exclude channel 10 */ -#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH10_Included (1UL) /*!< Include */ - -/* Bit 9 : Include or exclude channel 9 */ -#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH9_Included (1UL) /*!< Include */ - -/* Bit 8 : Include or exclude channel 8 */ -#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH8_Included (1UL) /*!< Include */ - -/* Bit 7 : Include or exclude channel 7 */ -#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH7_Included (1UL) /*!< Include */ - -/* Bit 6 : Include or exclude channel 6 */ -#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH6_Included (1UL) /*!< Include */ - -/* Bit 5 : Include or exclude channel 5 */ -#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH5_Included (1UL) /*!< Include */ - -/* Bit 4 : Include or exclude channel 4 */ -#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH4_Included (1UL) /*!< Include */ - -/* Bit 3 : Include or exclude channel 3 */ -#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH3_Included (1UL) /*!< Include */ - -/* Bit 2 : Include or exclude channel 2 */ -#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH2_Included (1UL) /*!< Include */ - -/* Bit 1 : Include or exclude channel 1 */ -#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH1_Included (1UL) /*!< Include */ - -/* Bit 0 : Include or exclude channel 0 */ -#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH0_Included (1UL) /*!< Include */ - -/* Register: PPI_FORK_TEP */ -/* Description: Description cluster[0]: Channel 0 task end-point */ - -/* Bits 31..0 : Pointer to task register */ -#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ -#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ - - -/* Peripheral: PWM */ -/* Description: Pulse Width Modulation Unit 0 */ - -/* Register: PWM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between LOOPSDONE event and STOP task */ -#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */ -#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */ -#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between LOOPSDONE event and SEQSTART[1] task */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between LOOPSDONE event and SEQSTART[0] task */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between SEQEND[1] event and STOP task */ -#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */ -#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */ -#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between SEQEND[0] event and STOP task */ -#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */ -#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */ -#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: PWM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 7 : Enable or disable interrupt for LOOPSDONE event */ -#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for PWMPERIODEND event */ -#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for SEQEND[1] event */ -#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for SEQEND[0] event */ -#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for SEQSTARTED[1] event */ -#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for SEQSTARTED[0] event */ -#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: PWM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 7 : Write '1' to Enable interrupt for LOOPSDONE event */ -#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for PWMPERIODEND event */ -#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for SEQEND[1] event */ -#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for SEQEND[0] event */ -#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for SEQSTARTED[1] event */ -#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for SEQSTARTED[0] event */ -#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: PWM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 7 : Write '1' to Disable interrupt for LOOPSDONE event */ -#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for PWMPERIODEND event */ -#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for SEQEND[1] event */ -#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for SEQEND[0] event */ -#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for SEQSTARTED[1] event */ -#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for SEQSTARTED[0] event */ -#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: PWM_ENABLE */ -/* Description: PWM module enable register */ - -/* Bit 0 : Enable or disable PWM module */ -#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */ -#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: PWM_MODE */ -/* Description: Selects operating mode of the wave counter */ - -/* Bit 0 : Selects up or up and down as wave counter mode */ -#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */ -#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */ -#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */ -#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */ - -/* Register: PWM_COUNTERTOP */ -/* Description: Value up to which the pulse generator counter counts */ - -/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used. */ -#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */ -#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */ - -/* Register: PWM_PRESCALER */ -/* Description: Configuration for PWM_CLK */ - -/* Bits 2..0 : Pre-scaler of PWM_CLK */ -#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ -#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 ( 8MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 ( 4MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 ( 2MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 ( 1MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 ( 500kHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 ( 250kHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 ( 125kHz) */ - -/* Register: PWM_DECODER */ -/* Description: Configuration of the decoder */ - -/* Bit 8 : Selects source for advancing the active sequence */ -#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */ -#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */ -#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */ -#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */ - -/* Bits 2..0 : How a sequence is read from RAM and spread to the compare register */ -#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */ -#define PWM_DECODER_LOAD_Msk (0x7UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */ -#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */ -#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */ -#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */ -#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */ - -/* Register: PWM_LOOP */ -/* Description: Amount of playback of a loop */ - -/* Bits 15..0 : Amount of playback of pattern cycles */ -#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */ - -/* Register: PWM_SEQ_PTR */ -/* Description: Description cluster[0]: Beginning address in Data RAM of sequence A */ - -/* Bits 31..0 : Beginning address in Data RAM of sequence A */ -#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: PWM_SEQ_CNT */ -/* Description: Description cluster[0]: Amount of values (duty cycles) in sequence A */ - -/* Bits 14..0 : Amount of values (duty cycles) in sequence A */ -#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */ - -/* Register: PWM_SEQ_REFRESH */ -/* Description: Description cluster[0]: Amount of additional PWM periods between samples loaded to compare register (load every CNT+1 PWM periods) */ - -/* Bits 23..0 : Amount of additional PWM periods between samples loaded to compare register (load every CNT+1 PWM periods) */ -#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */ - -/* Register: PWM_SEQ_ENDDELAY */ -/* Description: Description cluster[0]: Time added after the sequence */ - -/* Bits 23..0 : Time added after the sequence in PWM periods */ -#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */ - -/* Register: PWM_PSEL_OUT */ -/* Description: Description collection[0]: Output pin select for PWM channel 0 */ - -/* Bit 31 : Connection */ -#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */ -#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 9..8 : Port number */ -#define PWM_PSEL_OUT_PORT_Pos (8UL) /*!< Position of PORT field. */ -#define PWM_PSEL_OUT_PORT_Msk (0x3UL << PWM_PSEL_OUT_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */ - - -/* Peripheral: QDEC */ -/* Description: Quadrature Decoder */ - -/* Register: QDEC_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 6 : Shortcut between SAMPLERDY event and READCLRACC task */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between DBLRDY event and STOP task */ -#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */ -#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */ -#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between DBLRDY event and RDCLRDBL task */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between REPORTRDY event and STOP task */ -#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */ -#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */ -#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between REPORTRDY event and RDCLRACC task */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between SAMPLERDY event and STOP task */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: QDEC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 4 : Write '1' to Enable interrupt for STOPPED event */ -#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ -#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for DBLRDY event */ -#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ -#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ -#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for ACCOF event */ -#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for REPORTRDY event */ -#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for SAMPLERDY event */ -#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */ - -/* Register: QDEC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 4 : Write '1' to Disable interrupt for STOPPED event */ -#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ -#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for DBLRDY event */ -#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ -#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ -#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for ACCOF event */ -#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for REPORTRDY event */ -#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for SAMPLERDY event */ -#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */ - -/* Register: QDEC_ENABLE */ -/* Description: Enable the quadrature decoder */ - -/* Bit 0 : Enable or disable the quadrature decoder */ -#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: QDEC_LEDPOL */ -/* Description: LED output pin polarity */ - -/* Bit 0 : LED output pin polarity */ -#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */ -#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */ - -/* Register: QDEC_SAMPLEPER */ -/* Description: Sample period */ - -/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */ -#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */ - -/* Register: QDEC_SAMPLE */ -/* Description: Motion sample value */ - -/* Bits 31..0 : Last motion sample */ -#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ -#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ - -/* Register: QDEC_REPORTPER */ -/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */ - -/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */ -#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */ -#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */ -#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */ -#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */ -#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */ -#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */ -#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */ -#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */ -#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */ - -/* Register: QDEC_ACC */ -/* Description: Register accumulating the valid transitions */ - -/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */ -#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */ -#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */ - -/* Register: QDEC_ACCREAD */ -/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */ - -/* Bits 31..0 : Snapshot of the ACC register. */ -#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */ -#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */ - -/* Register: QDEC_PSEL_LED */ -/* Description: Pin select for LED signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QDEC_PSEL_LED_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QDEC_PSEL_LED_PORT_Msk (0x3UL << QDEC_PSEL_LED_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_PSEL_A */ -/* Description: Pin select for A signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QDEC_PSEL_A_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QDEC_PSEL_A_PORT_Msk (0x3UL << QDEC_PSEL_A_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_PSEL_B */ -/* Description: Pin select for B signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QDEC_PSEL_B_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QDEC_PSEL_B_PORT_Msk (0x3UL << QDEC_PSEL_B_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_DBFEN */ -/* Description: Enable input debounce filters */ - -/* Bit 0 : Enable input debounce filters */ -#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */ -#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */ - -/* Register: QDEC_LEDPRE */ -/* Description: Time period the LED is switched ON prior to sampling */ - -/* Bits 8..0 : Period in us the LED is switched on prior to sampling */ -#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ -#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ - -/* Register: QDEC_ACCDBL */ -/* Description: Register accumulating the number of detected double transitions */ - -/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */ -#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ -#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ - -/* Register: QDEC_ACCDBLREAD */ -/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */ - -/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ - - -/* Peripheral: QSPI */ -/* Description: External flash interface */ - -/* Register: QSPI_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 0 : Enable or disable interrupt for READY event */ -#define QSPI_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ -#define QSPI_INTEN_READY_Msk (0x1UL << QSPI_INTEN_READY_Pos) /*!< Bit mask of READY field. */ -#define QSPI_INTEN_READY_Disabled (0UL) /*!< Disable */ -#define QSPI_INTEN_READY_Enabled (1UL) /*!< Enable */ - -/* Register: QSPI_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define QSPI_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define QSPI_INTENSET_READY_Msk (0x1UL << QSPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define QSPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define QSPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define QSPI_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: QSPI_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define QSPI_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define QSPI_INTENCLR_READY_Msk (0x1UL << QSPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define QSPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define QSPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define QSPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: QSPI_ENABLE */ -/* Description: Enable QSPI peripheral and acquire the pins selected in PSELn registers */ - -/* Bit 0 : Enable or disable QSPI */ -#define QSPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define QSPI_ENABLE_ENABLE_Msk (0x1UL << QSPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define QSPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable QSPI */ -#define QSPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable QSPI */ - -/* Register: QSPI_READ_SRC */ -/* Description: Flash memory source address */ - -/* Bits 31..0 : Word-aligned flash memory source address. */ -#define QSPI_READ_SRC_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define QSPI_READ_SRC_SRC_Msk (0xFFFFFFFFUL << QSPI_READ_SRC_SRC_Pos) /*!< Bit mask of SRC field. */ - -/* Register: QSPI_READ_DST */ -/* Description: RAM destination address */ - -/* Bits 31..0 : Word-aligned RAM destination address. */ -#define QSPI_READ_DST_DST_Pos (0UL) /*!< Position of DST field. */ -#define QSPI_READ_DST_DST_Msk (0xFFFFFFFFUL << QSPI_READ_DST_DST_Pos) /*!< Bit mask of DST field. */ - -/* Register: QSPI_READ_CNT */ -/* Description: Read transfer length */ - -/* Bits 20..0 : Read transfer length in number of bytes. The length must be a multiple of 4 bytes. */ -#define QSPI_READ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define QSPI_READ_CNT_CNT_Msk (0x1FFFFFUL << QSPI_READ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ - -/* Register: QSPI_WRITE_DST */ -/* Description: Flash destination address */ - -/* Bits 31..0 : Word-aligned flash destination address. */ -#define QSPI_WRITE_DST_DST_Pos (0UL) /*!< Position of DST field. */ -#define QSPI_WRITE_DST_DST_Msk (0xFFFFFFFFUL << QSPI_WRITE_DST_DST_Pos) /*!< Bit mask of DST field. */ - -/* Register: QSPI_WRITE_SRC */ -/* Description: RAM source address */ - -/* Bits 31..0 : Word-aligned RAM source address. */ -#define QSPI_WRITE_SRC_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define QSPI_WRITE_SRC_SRC_Msk (0xFFFFFFFFUL << QSPI_WRITE_SRC_SRC_Pos) /*!< Bit mask of SRC field. */ - -/* Register: QSPI_WRITE_CNT */ -/* Description: Write transfer length */ - -/* Bits 20..0 : Write transfer length in number of bytes. The length must be a multiple of 4 bytes. */ -#define QSPI_WRITE_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define QSPI_WRITE_CNT_CNT_Msk (0x1FFFFFUL << QSPI_WRITE_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ - -/* Register: QSPI_ERASE_PTR */ -/* Description: Start address of flash block to be erased */ - -/* Bits 31..0 : Word-aligned start address of block to be erased. */ -#define QSPI_ERASE_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define QSPI_ERASE_PTR_PTR_Msk (0xFFFFFFFFUL << QSPI_ERASE_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: QSPI_ERASE_LEN */ -/* Description: Size of block to be erased. */ - -/* Bits 1..0 : LEN */ -#define QSPI_ERASE_LEN_LEN_Pos (0UL) /*!< Position of LEN field. */ -#define QSPI_ERASE_LEN_LEN_Msk (0x3UL << QSPI_ERASE_LEN_LEN_Pos) /*!< Bit mask of LEN field. */ -#define QSPI_ERASE_LEN_LEN_4KB (0UL) /*!< Erase 4 kB block (flash command 0x20) */ -#define QSPI_ERASE_LEN_LEN_64KB (1UL) /*!< Erase 64 kB block (flash command 0xD8) */ -#define QSPI_ERASE_LEN_LEN_All (2UL) /*!< Erase all (flash command 0xC7) */ - -/* Register: QSPI_PSEL_SCK */ -/* Description: Pin select for serial clock SCK */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_SCK_CONNECT_Msk (0x1UL << QSPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_SCK_PORT_Msk (0x3UL << QSPI_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_SCK_PIN_Msk (0x1FUL << QSPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_PSEL_CSN */ -/* Description: Pin select for chip select signal CSN. */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_CSN_CONNECT_Msk (0x1UL << QSPI_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_CSN_PORT_Msk (0x3UL << QSPI_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_CSN_PIN_Msk (0x1FUL << QSPI_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_PSEL_IO0 */ -/* Description: Pin select for serial data MOSI/IO0. */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_IO0_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_IO0_CONNECT_Msk (0x1UL << QSPI_PSEL_IO0_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_IO0_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_IO0_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_IO0_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_IO0_PORT_Msk (0x3UL << QSPI_PSEL_IO0_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_IO0_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_IO0_PIN_Msk (0x1FUL << QSPI_PSEL_IO0_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_PSEL_IO1 */ -/* Description: Pin select for serial data MISO/IO1. */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_IO1_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_IO1_CONNECT_Msk (0x1UL << QSPI_PSEL_IO1_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_IO1_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_IO1_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_IO1_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_IO1_PORT_Msk (0x3UL << QSPI_PSEL_IO1_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_IO1_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_IO1_PIN_Msk (0x1FUL << QSPI_PSEL_IO1_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_PSEL_IO2 */ -/* Description: Pin select for serial data IO2. */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_IO2_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_IO2_CONNECT_Msk (0x1UL << QSPI_PSEL_IO2_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_IO2_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_IO2_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_IO2_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_IO2_PORT_Msk (0x3UL << QSPI_PSEL_IO2_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_IO2_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_IO2_PIN_Msk (0x1FUL << QSPI_PSEL_IO2_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_PSEL_IO3 */ -/* Description: Pin select for serial data IO3. */ - -/* Bit 31 : Connection */ -#define QSPI_PSEL_IO3_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QSPI_PSEL_IO3_CONNECT_Msk (0x1UL << QSPI_PSEL_IO3_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QSPI_PSEL_IO3_CONNECT_Connected (0UL) /*!< Connect */ -#define QSPI_PSEL_IO3_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define QSPI_PSEL_IO3_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define QSPI_PSEL_IO3_PORT_Msk (0x3UL << QSPI_PSEL_IO3_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define QSPI_PSEL_IO3_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QSPI_PSEL_IO3_PIN_Msk (0x1FUL << QSPI_PSEL_IO3_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QSPI_XIPOFFSET */ -/* Description: Address offset into the external memory for Execute in Place operation. */ - -/* Bits 31..0 : Address offset into the external memory for Execute in Place operation. Value must be a multiple of 4. */ -#define QSPI_XIPOFFSET_XIPOFFSET_Pos (0UL) /*!< Position of XIPOFFSET field. */ -#define QSPI_XIPOFFSET_XIPOFFSET_Msk (0xFFFFFFFFUL << QSPI_XIPOFFSET_XIPOFFSET_Pos) /*!< Bit mask of XIPOFFSET field. */ - -/* Register: QSPI_IFCONFIG0 */ -/* Description: Interface configuration. */ - -/* Bit 7 : Enable deep power-down mode (DPM) feature. */ -#define QSPI_IFCONFIG0_DPMENABLE_Pos (7UL) /*!< Position of DPMENABLE field. */ -#define QSPI_IFCONFIG0_DPMENABLE_Msk (0x1UL << QSPI_IFCONFIG0_DPMENABLE_Pos) /*!< Bit mask of DPMENABLE field. */ -#define QSPI_IFCONFIG0_DPMENABLE_Disable (0UL) /*!< Disable DPM feature. */ -#define QSPI_IFCONFIG0_DPMENABLE_Enable (1UL) /*!< Enable DPM feature. */ - -/* Bit 6 : Addressing mode. */ -#define QSPI_IFCONFIG0_ADDRMODE_Pos (6UL) /*!< Position of ADDRMODE field. */ -#define QSPI_IFCONFIG0_ADDRMODE_Msk (0x1UL << QSPI_IFCONFIG0_ADDRMODE_Pos) /*!< Bit mask of ADDRMODE field. */ -#define QSPI_IFCONFIG0_ADDRMODE_24BIT (0UL) /*!< 24-bit addressing. */ -#define QSPI_IFCONFIG0_ADDRMODE_32BIT (1UL) /*!< 32-bit addressing. */ - -/* Bits 5..3 : Configure number of data lines and opcode used for writing. */ -#define QSPI_IFCONFIG0_WRITEOC_Pos (3UL) /*!< Position of WRITEOC field. */ -#define QSPI_IFCONFIG0_WRITEOC_Msk (0x7UL << QSPI_IFCONFIG0_WRITEOC_Pos) /*!< Bit mask of WRITEOC field. */ -#define QSPI_IFCONFIG0_WRITEOC_PP (0UL) /*!< Single data line SPI. PP (opcode 0x02). */ -#define QSPI_IFCONFIG0_WRITEOC_PP2O (1UL) /*!< Dual data line SPI. PP2O (opcode 0xA2). */ -#define QSPI_IFCONFIG0_WRITEOC_PP4O (2UL) /*!< Quad data line SPI. PP4O (opcode 0x32). */ -#define QSPI_IFCONFIG0_WRITEOC_PP4IO (3UL) /*!< Quad data line SPI. PP4IO (opcode 0x38). */ - -/* Bits 2..0 : Configure number of data lines and opcode used for reading. */ -#define QSPI_IFCONFIG0_READOC_Pos (0UL) /*!< Position of READOC field. */ -#define QSPI_IFCONFIG0_READOC_Msk (0x7UL << QSPI_IFCONFIG0_READOC_Pos) /*!< Bit mask of READOC field. */ -#define QSPI_IFCONFIG0_READOC_FASTREAD (0UL) /*!< Single data line SPI. FAST_READ (opcode 0x0B). */ -#define QSPI_IFCONFIG0_READOC_READ2O (1UL) /*!< Dual data line SPI. READ2O (opcode 0x3B). */ -#define QSPI_IFCONFIG0_READOC_READ2IO (2UL) /*!< Dual data line SPI. READ2IO (opcode 0xBB). */ -#define QSPI_IFCONFIG0_READOC_READ4O (3UL) /*!< Quad data line SPI. READ4O (opcode 0x6B). */ -#define QSPI_IFCONFIG0_READOC_READ4IO (4UL) /*!< Quad data line SPI. READ4IO (opcode 0xEB). */ - -/* Register: QSPI_IFCONFIG1 */ -/* Description: Interface configuration. */ - -/* Bits 31..28 : SCK frequency is given as 32 MHz / (SCKFREQ + 1). */ -#define QSPI_IFCONFIG1_SCKFREQ_Pos (28UL) /*!< Position of SCKFREQ field. */ -#define QSPI_IFCONFIG1_SCKFREQ_Msk (0xFUL << QSPI_IFCONFIG1_SCKFREQ_Pos) /*!< Bit mask of SCKFREQ field. */ - -/* Bit 25 : Select SPI mode. */ -#define QSPI_IFCONFIG1_SPIMODE_Pos (25UL) /*!< Position of SPIMODE field. */ -#define QSPI_IFCONFIG1_SPIMODE_Msk (0x1UL << QSPI_IFCONFIG1_SPIMODE_Pos) /*!< Bit mask of SPIMODE field. */ -#define QSPI_IFCONFIG1_SPIMODE_MODE0 (0UL) /*!< Mode 0: Data are captured on the clock's rising edge and data is output on a falling edge. Base level of clock is 0 (CPOL=0, CPHA=0). */ -#define QSPI_IFCONFIG1_SPIMODE_MODE3 (1UL) /*!< Mode 3: Data are captured on the clock's falling edge and data is output on a rising edge. Base level of clock is 1 (CPOL=1, CPHA=1). */ - -/* Bit 24 : Enter/exit deep power-down mode (DPM) for external flash memory. */ -#define QSPI_IFCONFIG1_DPMEN_Pos (24UL) /*!< Position of DPMEN field. */ -#define QSPI_IFCONFIG1_DPMEN_Msk (0x1UL << QSPI_IFCONFIG1_DPMEN_Pos) /*!< Bit mask of DPMEN field. */ -#define QSPI_IFCONFIG1_DPMEN_Exit (0UL) /*!< Exit DPM. */ -#define QSPI_IFCONFIG1_DPMEN_Enter (1UL) /*!< Enter DPM. */ - -/* Bits 7..0 : Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns). */ -#define QSPI_IFCONFIG1_SCKDELAY_Pos (0UL) /*!< Position of SCKDELAY field. */ -#define QSPI_IFCONFIG1_SCKDELAY_Msk (0xFFUL << QSPI_IFCONFIG1_SCKDELAY_Pos) /*!< Bit mask of SCKDELAY field. */ - -/* Register: QSPI_STATUS */ -/* Description: Status register. */ - -/* Bits 31..24 : Value of external flash devices Status Register. When the external flash has two bytes status register this field includes the value of the low byte. */ -#define QSPI_STATUS_SREG_Pos (24UL) /*!< Position of SREG field. */ -#define QSPI_STATUS_SREG_Msk (0xFFUL << QSPI_STATUS_SREG_Pos) /*!< Bit mask of SREG field. */ - -/* Bit 3 : Ready status. */ -#define QSPI_STATUS_READY_Pos (3UL) /*!< Position of READY field. */ -#define QSPI_STATUS_READY_Msk (0x1UL << QSPI_STATUS_READY_Pos) /*!< Bit mask of READY field. */ -#define QSPI_STATUS_READY_BUSY (0UL) /*!< QSPI peripheral is busy. It is not allowed to trigger any new tasks, writing custom instructions or enter/exit DPM. */ -#define QSPI_STATUS_READY_READY (1UL) /*!< QSPI peripheral is ready. It is allowed to trigger new tasks, writing custom instructions or enter/exit DPM. */ - -/* Bit 2 : Deep power-down mode (DPM) status of external flash. */ -#define QSPI_STATUS_DPM_Pos (2UL) /*!< Position of DPM field. */ -#define QSPI_STATUS_DPM_Msk (0x1UL << QSPI_STATUS_DPM_Pos) /*!< Bit mask of DPM field. */ -#define QSPI_STATUS_DPM_Disabled (0UL) /*!< External flash is not in DPM. */ -#define QSPI_STATUS_DPM_Enabled (1UL) /*!< External flash is in DPM. */ - -/* Register: QSPI_DPMDUR */ -/* Description: Set the duration required to enter/exit deep power-down mode (DPM). */ - -/* Bits 31..16 : Duration needed by external flash to exit DPM. Duration is given as EXIT * 256 * 62.5 ns. */ -#define QSPI_DPMDUR_EXIT_Pos (16UL) /*!< Position of EXIT field. */ -#define QSPI_DPMDUR_EXIT_Msk (0xFFFFUL << QSPI_DPMDUR_EXIT_Pos) /*!< Bit mask of EXIT field. */ - -/* Bits 15..0 : Duration needed by external flash to enter DPM. Duration is given as ENTER * 256 * 62.5 ns. */ -#define QSPI_DPMDUR_ENTER_Pos (0UL) /*!< Position of ENTER field. */ -#define QSPI_DPMDUR_ENTER_Msk (0xFFFFUL << QSPI_DPMDUR_ENTER_Pos) /*!< Bit mask of ENTER field. */ - -/* Register: QSPI_ADDRCONF */ -/* Description: Extended address configuration. */ - -/* Bit 27 : Send WREN (write enable opcode 0x06) before instruction. */ -#define QSPI_ADDRCONF_WREN_Pos (27UL) /*!< Position of WREN field. */ -#define QSPI_ADDRCONF_WREN_Msk (0x1UL << QSPI_ADDRCONF_WREN_Pos) /*!< Bit mask of WREN field. */ -#define QSPI_ADDRCONF_WREN_Disable (0UL) /*!< Do not send WREN. */ -#define QSPI_ADDRCONF_WREN_Enable (1UL) /*!< Send WREN. */ - -/* Bit 26 : Wait for write complete before sending command. */ -#define QSPI_ADDRCONF_WIPWAIT_Pos (26UL) /*!< Position of WIPWAIT field. */ -#define QSPI_ADDRCONF_WIPWAIT_Msk (0x1UL << QSPI_ADDRCONF_WIPWAIT_Pos) /*!< Bit mask of WIPWAIT field. */ -#define QSPI_ADDRCONF_WIPWAIT_Disable (0UL) /*!< No wait. */ -#define QSPI_ADDRCONF_WIPWAIT_Enable (1UL) /*!< Wait. */ - -/* Bits 25..24 : Extended addressing mode. */ -#define QSPI_ADDRCONF_MODE_Pos (24UL) /*!< Position of MODE field. */ -#define QSPI_ADDRCONF_MODE_Msk (0x3UL << QSPI_ADDRCONF_MODE_Pos) /*!< Bit mask of MODE field. */ -#define QSPI_ADDRCONF_MODE_NoInstr (0UL) /*!< Do not send any instruction. */ -#define QSPI_ADDRCONF_MODE_Opcode (1UL) /*!< Send opcode. */ -#define QSPI_ADDRCONF_MODE_OpByte0 (2UL) /*!< Send opcode, byte0. */ -#define QSPI_ADDRCONF_MODE_All (3UL) /*!< Send opcode, byte0, byte1. */ - -/* Bits 23..16 : Byte 1 following byte 0. */ -#define QSPI_ADDRCONF_BYTE1_Pos (16UL) /*!< Position of BYTE1 field. */ -#define QSPI_ADDRCONF_BYTE1_Msk (0xFFUL << QSPI_ADDRCONF_BYTE1_Pos) /*!< Bit mask of BYTE1 field. */ - -/* Bits 15..8 : Byte 0 following opcode. */ -#define QSPI_ADDRCONF_BYTE0_Pos (8UL) /*!< Position of BYTE0 field. */ -#define QSPI_ADDRCONF_BYTE0_Msk (0xFFUL << QSPI_ADDRCONF_BYTE0_Pos) /*!< Bit mask of BYTE0 field. */ - -/* Bits 7..0 : Opcode that enters the 32-bit addressing mode. */ -#define QSPI_ADDRCONF_OPCODE_Pos (0UL) /*!< Position of OPCODE field. */ -#define QSPI_ADDRCONF_OPCODE_Msk (0xFFUL << QSPI_ADDRCONF_OPCODE_Pos) /*!< Bit mask of OPCODE field. */ - -/* Register: QSPI_CINSTRCONF */ -/* Description: Custom instruction configuration register. */ - -/* Bit 15 : Send WREN (write enable opcode 0x06) before instruction. */ -#define QSPI_CINSTRCONF_WREN_Pos (15UL) /*!< Position of WREN field. */ -#define QSPI_CINSTRCONF_WREN_Msk (0x1UL << QSPI_CINSTRCONF_WREN_Pos) /*!< Bit mask of WREN field. */ -#define QSPI_CINSTRCONF_WREN_Disable (0UL) /*!< Do not send WREN. */ -#define QSPI_CINSTRCONF_WREN_Enable (1UL) /*!< Send WREN. */ - -/* Bit 14 : Wait for write complete before sending command. */ -#define QSPI_CINSTRCONF_WIPWAIT_Pos (14UL) /*!< Position of WIPWAIT field. */ -#define QSPI_CINSTRCONF_WIPWAIT_Msk (0x1UL << QSPI_CINSTRCONF_WIPWAIT_Pos) /*!< Bit mask of WIPWAIT field. */ -#define QSPI_CINSTRCONF_WIPWAIT_Disable (0UL) /*!< No wait. */ -#define QSPI_CINSTRCONF_WIPWAIT_Enable (1UL) /*!< Wait. */ - -/* Bit 13 : Level of the IO3 pin (if connected) during transmission of custom instruction. */ -#define QSPI_CINSTRCONF_LIO3_Pos (13UL) /*!< Position of LIO3 field. */ -#define QSPI_CINSTRCONF_LIO3_Msk (0x1UL << QSPI_CINSTRCONF_LIO3_Pos) /*!< Bit mask of LIO3 field. */ - -/* Bit 12 : Level of the IO2 pin (if connected) during transmission of custom instruction. */ -#define QSPI_CINSTRCONF_LIO2_Pos (12UL) /*!< Position of LIO2 field. */ -#define QSPI_CINSTRCONF_LIO2_Msk (0x1UL << QSPI_CINSTRCONF_LIO2_Pos) /*!< Bit mask of LIO2 field. */ - -/* Bits 11..8 : Length of custom instruction in number of bytes. */ -#define QSPI_CINSTRCONF_LENGTH_Pos (8UL) /*!< Position of LENGTH field. */ -#define QSPI_CINSTRCONF_LENGTH_Msk (0xFUL << QSPI_CINSTRCONF_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ -#define QSPI_CINSTRCONF_LENGTH_1B (1UL) /*!< Send opcode only. */ -#define QSPI_CINSTRCONF_LENGTH_2B (2UL) /*!< Send opcode, CINSTRDAT0.BYTE0. */ -#define QSPI_CINSTRCONF_LENGTH_3B (3UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */ -#define QSPI_CINSTRCONF_LENGTH_4B (4UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */ -#define QSPI_CINSTRCONF_LENGTH_5B (5UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */ -#define QSPI_CINSTRCONF_LENGTH_6B (6UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */ -#define QSPI_CINSTRCONF_LENGTH_7B (7UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */ -#define QSPI_CINSTRCONF_LENGTH_8B (8UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */ -#define QSPI_CINSTRCONF_LENGTH_9B (9UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */ - -/* Bits 7..0 : Opcode of Custom instruction. */ -#define QSPI_CINSTRCONF_OPCODE_Pos (0UL) /*!< Position of OPCODE field. */ -#define QSPI_CINSTRCONF_OPCODE_Msk (0xFFUL << QSPI_CINSTRCONF_OPCODE_Pos) /*!< Bit mask of OPCODE field. */ - -/* Register: QSPI_CINSTRDAT0 */ -/* Description: Custom instruction data register 0. */ - -/* Bits 31..24 : Data byte 3 */ -#define QSPI_CINSTRDAT0_BYTE3_Pos (24UL) /*!< Position of BYTE3 field. */ -#define QSPI_CINSTRDAT0_BYTE3_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE3_Pos) /*!< Bit mask of BYTE3 field. */ - -/* Bits 23..16 : Data byte 2 */ -#define QSPI_CINSTRDAT0_BYTE2_Pos (16UL) /*!< Position of BYTE2 field. */ -#define QSPI_CINSTRDAT0_BYTE2_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE2_Pos) /*!< Bit mask of BYTE2 field. */ - -/* Bits 15..8 : Data byte 1 */ -#define QSPI_CINSTRDAT0_BYTE1_Pos (8UL) /*!< Position of BYTE1 field. */ -#define QSPI_CINSTRDAT0_BYTE1_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE1_Pos) /*!< Bit mask of BYTE1 field. */ - -/* Bits 7..0 : Data byte 0 */ -#define QSPI_CINSTRDAT0_BYTE0_Pos (0UL) /*!< Position of BYTE0 field. */ -#define QSPI_CINSTRDAT0_BYTE0_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE0_Pos) /*!< Bit mask of BYTE0 field. */ - -/* Register: QSPI_CINSTRDAT1 */ -/* Description: Custom instruction data register 1. */ - -/* Bits 31..24 : Data byte 7 */ -#define QSPI_CINSTRDAT1_BYTE7_Pos (24UL) /*!< Position of BYTE7 field. */ -#define QSPI_CINSTRDAT1_BYTE7_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE7_Pos) /*!< Bit mask of BYTE7 field. */ - -/* Bits 23..16 : Data byte 6 */ -#define QSPI_CINSTRDAT1_BYTE6_Pos (16UL) /*!< Position of BYTE6 field. */ -#define QSPI_CINSTRDAT1_BYTE6_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE6_Pos) /*!< Bit mask of BYTE6 field. */ - -/* Bits 15..8 : Data byte 5 */ -#define QSPI_CINSTRDAT1_BYTE5_Pos (8UL) /*!< Position of BYTE5 field. */ -#define QSPI_CINSTRDAT1_BYTE5_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE5_Pos) /*!< Bit mask of BYTE5 field. */ - -/* Bits 7..0 : Data byte 4 */ -#define QSPI_CINSTRDAT1_BYTE4_Pos (0UL) /*!< Position of BYTE4 field. */ -#define QSPI_CINSTRDAT1_BYTE4_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE4_Pos) /*!< Bit mask of BYTE4 field. */ - -/* Register: QSPI_IFTIMING */ -/* Description: SPI interface timing. */ - -/* Bits 10..8 : Timing related to sampling of the input serial data. The value of RXDELAY specifies the number of 64 MHz cycles (15.625 ns) delay from the the rising edge of the SPI Clock (SCK) until the input serial data is sampled. As en example, if set to 0 the input serial data is sampled on the rising edge of SCK. */ -#define QSPI_IFTIMING_RXDELAY_Pos (8UL) /*!< Position of RXDELAY field. */ -#define QSPI_IFTIMING_RXDELAY_Msk (0x7UL << QSPI_IFTIMING_RXDELAY_Pos) /*!< Bit mask of RXDELAY field. */ - - -/* Peripheral: RADIO */ -/* Description: 2.4 GHz Radio */ - -/* Register: RADIO_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 19 : Shortcut between RXREADY event and START task */ -#define RADIO_SHORTS_RXREADY_START_Pos (19UL) /*!< Position of RXREADY_START field. */ -#define RADIO_SHORTS_RXREADY_START_Msk (0x1UL << RADIO_SHORTS_RXREADY_START_Pos) /*!< Bit mask of RXREADY_START field. */ -#define RADIO_SHORTS_RXREADY_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_RXREADY_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 18 : Shortcut between TXREADY event and START task */ -#define RADIO_SHORTS_TXREADY_START_Pos (18UL) /*!< Position of TXREADY_START field. */ -#define RADIO_SHORTS_TXREADY_START_Msk (0x1UL << RADIO_SHORTS_TXREADY_START_Pos) /*!< Bit mask of TXREADY_START field. */ -#define RADIO_SHORTS_TXREADY_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_TXREADY_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 17 : Shortcut between CCAIDLE event and STOP task */ -#define RADIO_SHORTS_CCAIDLE_STOP_Pos (17UL) /*!< Position of CCAIDLE_STOP field. */ -#define RADIO_SHORTS_CCAIDLE_STOP_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_STOP_Pos) /*!< Bit mask of CCAIDLE_STOP field. */ -#define RADIO_SHORTS_CCAIDLE_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_CCAIDLE_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 16 : Shortcut between EDEND event and DISABLE task */ -#define RADIO_SHORTS_EDEND_DISABLE_Pos (16UL) /*!< Position of EDEND_DISABLE field. */ -#define RADIO_SHORTS_EDEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_EDEND_DISABLE_Pos) /*!< Bit mask of EDEND_DISABLE field. */ -#define RADIO_SHORTS_EDEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_EDEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 15 : Shortcut between READY event and EDSTART task */ -#define RADIO_SHORTS_READY_EDSTART_Pos (15UL) /*!< Position of READY_EDSTART field. */ -#define RADIO_SHORTS_READY_EDSTART_Msk (0x1UL << RADIO_SHORTS_READY_EDSTART_Pos) /*!< Bit mask of READY_EDSTART field. */ -#define RADIO_SHORTS_READY_EDSTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_READY_EDSTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 14 : Shortcut between FRAMESTART event and BCSTART task */ -#define RADIO_SHORTS_FRAMESTART_BCSTART_Pos (14UL) /*!< Position of FRAMESTART_BCSTART field. */ -#define RADIO_SHORTS_FRAMESTART_BCSTART_Msk (0x1UL << RADIO_SHORTS_FRAMESTART_BCSTART_Pos) /*!< Bit mask of FRAMESTART_BCSTART field. */ -#define RADIO_SHORTS_FRAMESTART_BCSTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_FRAMESTART_BCSTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 13 : Shortcut between CCABUSY event and DISABLE task */ -#define RADIO_SHORTS_CCABUSY_DISABLE_Pos (13UL) /*!< Position of CCABUSY_DISABLE field. */ -#define RADIO_SHORTS_CCABUSY_DISABLE_Msk (0x1UL << RADIO_SHORTS_CCABUSY_DISABLE_Pos) /*!< Bit mask of CCABUSY_DISABLE field. */ -#define RADIO_SHORTS_CCABUSY_DISABLE_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_CCABUSY_DISABLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 12 : Shortcut between CCAIDLE event and TXEN task */ -#define RADIO_SHORTS_CCAIDLE_TXEN_Pos (12UL) /*!< Position of CCAIDLE_TXEN field. */ -#define RADIO_SHORTS_CCAIDLE_TXEN_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_TXEN_Pos) /*!< Bit mask of CCAIDLE_TXEN field. */ -#define RADIO_SHORTS_CCAIDLE_TXEN_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_CCAIDLE_TXEN_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 11 : Shortcut between RXREADY event and CCASTART task */ -#define RADIO_SHORTS_RXREADY_CCASTART_Pos (11UL) /*!< Position of RXREADY_CCASTART field. */ -#define RADIO_SHORTS_RXREADY_CCASTART_Msk (0x1UL << RADIO_SHORTS_RXREADY_CCASTART_Pos) /*!< Bit mask of RXREADY_CCASTART field. */ -#define RADIO_SHORTS_RXREADY_CCASTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_RXREADY_CCASTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 6 : Shortcut between ADDRESS event and BCSTART task */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between END event and START task */ -#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ -#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between DISABLED event and RXEN task */ -#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DISABLED event and TXEN task */ -#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between END event and DISABLE task */ -#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and START task */ -#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ -#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ -#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: RADIO_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 23 : Write '1' to Enable interrupt for MHRMATCH event */ -#define RADIO_INTENSET_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */ -#define RADIO_INTENSET_MHRMATCH_Msk (0x1UL << RADIO_INTENSET_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */ -#define RADIO_INTENSET_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_MHRMATCH_Set (1UL) /*!< Enable */ - -/* Bit 22 : Write '1' to Enable interrupt for RXREADY event */ -#define RADIO_INTENSET_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */ -#define RADIO_INTENSET_RXREADY_Msk (0x1UL << RADIO_INTENSET_RXREADY_Pos) /*!< Bit mask of RXREADY field. */ -#define RADIO_INTENSET_RXREADY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_RXREADY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_RXREADY_Set (1UL) /*!< Enable */ - -/* Bit 21 : Write '1' to Enable interrupt for TXREADY event */ -#define RADIO_INTENSET_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */ -#define RADIO_INTENSET_TXREADY_Msk (0x1UL << RADIO_INTENSET_TXREADY_Pos) /*!< Bit mask of TXREADY field. */ -#define RADIO_INTENSET_TXREADY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_TXREADY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_TXREADY_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for RATEBOOST event */ -#define RADIO_INTENSET_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */ -#define RADIO_INTENSET_RATEBOOST_Msk (0x1UL << RADIO_INTENSET_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */ -#define RADIO_INTENSET_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_RATEBOOST_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for CCASTOPPED event */ -#define RADIO_INTENSET_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */ -#define RADIO_INTENSET_CCASTOPPED_Msk (0x1UL << RADIO_INTENSET_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */ -#define RADIO_INTENSET_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CCASTOPPED_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for CCABUSY event */ -#define RADIO_INTENSET_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */ -#define RADIO_INTENSET_CCABUSY_Msk (0x1UL << RADIO_INTENSET_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */ -#define RADIO_INTENSET_CCABUSY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CCABUSY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CCABUSY_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for CCAIDLE event */ -#define RADIO_INTENSET_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */ -#define RADIO_INTENSET_CCAIDLE_Msk (0x1UL << RADIO_INTENSET_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */ -#define RADIO_INTENSET_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CCAIDLE_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for EDSTOPPED event */ -#define RADIO_INTENSET_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */ -#define RADIO_INTENSET_EDSTOPPED_Msk (0x1UL << RADIO_INTENSET_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */ -#define RADIO_INTENSET_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_EDSTOPPED_Set (1UL) /*!< Enable */ - -/* Bit 15 : Write '1' to Enable interrupt for EDEND event */ -#define RADIO_INTENSET_EDEND_Pos (15UL) /*!< Position of EDEND field. */ -#define RADIO_INTENSET_EDEND_Msk (0x1UL << RADIO_INTENSET_EDEND_Pos) /*!< Bit mask of EDEND field. */ -#define RADIO_INTENSET_EDEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_EDEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_EDEND_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for FRAMESTART event */ -#define RADIO_INTENSET_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */ -#define RADIO_INTENSET_FRAMESTART_Msk (0x1UL << RADIO_INTENSET_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */ -#define RADIO_INTENSET_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_FRAMESTART_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for CRCERROR event */ -#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ -#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for CRCOK event */ -#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ -#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ -#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for BCMATCH event */ -#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for RSSIEND event */ -#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for DEVMISS event */ -#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for DEVMATCH event */ -#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for DISABLED event */ -#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for END event */ -#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for PAYLOAD event */ -#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for ADDRESS event */ -#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: RADIO_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 23 : Write '1' to Disable interrupt for MHRMATCH event */ -#define RADIO_INTENCLR_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */ -#define RADIO_INTENCLR_MHRMATCH_Msk (0x1UL << RADIO_INTENCLR_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */ -#define RADIO_INTENCLR_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_MHRMATCH_Clear (1UL) /*!< Disable */ - -/* Bit 22 : Write '1' to Disable interrupt for RXREADY event */ -#define RADIO_INTENCLR_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */ -#define RADIO_INTENCLR_RXREADY_Msk (0x1UL << RADIO_INTENCLR_RXREADY_Pos) /*!< Bit mask of RXREADY field. */ -#define RADIO_INTENCLR_RXREADY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_RXREADY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_RXREADY_Clear (1UL) /*!< Disable */ - -/* Bit 21 : Write '1' to Disable interrupt for TXREADY event */ -#define RADIO_INTENCLR_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */ -#define RADIO_INTENCLR_TXREADY_Msk (0x1UL << RADIO_INTENCLR_TXREADY_Pos) /*!< Bit mask of TXREADY field. */ -#define RADIO_INTENCLR_TXREADY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_TXREADY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_TXREADY_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for RATEBOOST event */ -#define RADIO_INTENCLR_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */ -#define RADIO_INTENCLR_RATEBOOST_Msk (0x1UL << RADIO_INTENCLR_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */ -#define RADIO_INTENCLR_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_RATEBOOST_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for CCASTOPPED event */ -#define RADIO_INTENCLR_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */ -#define RADIO_INTENCLR_CCASTOPPED_Msk (0x1UL << RADIO_INTENCLR_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */ -#define RADIO_INTENCLR_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CCASTOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for CCABUSY event */ -#define RADIO_INTENCLR_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */ -#define RADIO_INTENCLR_CCABUSY_Msk (0x1UL << RADIO_INTENCLR_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */ -#define RADIO_INTENCLR_CCABUSY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CCABUSY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CCABUSY_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for CCAIDLE event */ -#define RADIO_INTENCLR_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */ -#define RADIO_INTENCLR_CCAIDLE_Msk (0x1UL << RADIO_INTENCLR_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */ -#define RADIO_INTENCLR_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CCAIDLE_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for EDSTOPPED event */ -#define RADIO_INTENCLR_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */ -#define RADIO_INTENCLR_EDSTOPPED_Msk (0x1UL << RADIO_INTENCLR_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */ -#define RADIO_INTENCLR_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_EDSTOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 15 : Write '1' to Disable interrupt for EDEND event */ -#define RADIO_INTENCLR_EDEND_Pos (15UL) /*!< Position of EDEND field. */ -#define RADIO_INTENCLR_EDEND_Msk (0x1UL << RADIO_INTENCLR_EDEND_Pos) /*!< Bit mask of EDEND field. */ -#define RADIO_INTENCLR_EDEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_EDEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_EDEND_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for FRAMESTART event */ -#define RADIO_INTENCLR_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */ -#define RADIO_INTENCLR_FRAMESTART_Msk (0x1UL << RADIO_INTENCLR_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */ -#define RADIO_INTENCLR_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_FRAMESTART_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for CRCERROR event */ -#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ -#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for CRCOK event */ -#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ -#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ -#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for BCMATCH event */ -#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for RSSIEND event */ -#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for DEVMISS event */ -#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for DEVMATCH event */ -#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for DISABLED event */ -#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for END event */ -#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for PAYLOAD event */ -#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for ADDRESS event */ -#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: RADIO_CRCSTATUS */ -/* Description: CRC status */ - -/* Bit 0 : CRC status of packet received */ -#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */ - -/* Register: RADIO_RXMATCH */ -/* Description: Received address */ - -/* Bits 2..0 : Received address */ -#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ -#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ - -/* Register: RADIO_RXCRC */ -/* Description: CRC field of previously received packet */ - -/* Bits 23..0 : CRC field of previously received packet */ -#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ -#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ - -/* Register: RADIO_DAI */ -/* Description: Device address match index */ - -/* Bits 2..0 : Device address match index */ -#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ -#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ - -/* Register: RADIO_PACKETPTR */ -/* Description: Packet pointer */ - -/* Bits 31..0 : Packet pointer */ -#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */ -#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */ - -/* Register: RADIO_FREQUENCY */ -/* Description: Frequency */ - -/* Bit 8 : Channel map selection. */ -#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */ -#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */ -#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */ -#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */ - -/* Bits 6..0 : Radio channel frequency */ -#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ - -/* Register: RADIO_TXPOWER */ -/* Description: Output power */ - -/* Bits 7..0 : RADIO output power. */ -#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_0dBm (0x0UL) /*!< 0 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos2dBm (0x2UL) /*!< +2 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x3UL) /*!< +3 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x4UL) /*!< +4 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos5dBm (0x5UL) /*!< +5 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos6dBm (0x6UL) /*!< +6 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos7dBm (0x7UL) /*!< +7 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos8dBm (0x8UL) /*!< +8 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos9dBm (0x9UL) /*!< +9 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< Deprecated enumerator - -40 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */ - -/* Register: RADIO_MODE */ -/* Description: Data rate and modulation */ - -/* Bits 3..0 : Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation. */ -#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Nrf_250Kbit (2UL) /*!< Deprecated enumerator - 250 kbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s Bluetooth Low Energy */ -#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbit/s Bluetooth Low Energy */ -#define RADIO_MODE_MODE_Ble_LR125Kbit (5UL) /*!< Long range 125 kbit/s (TX Only - RX supports both) */ -#define RADIO_MODE_MODE_Ble_LR500Kbit (6UL) /*!< Long range 500 kbit/s (TX Only - RX supports both) */ -#define RADIO_MODE_MODE_Ieee802154_250Kbit (15UL) /*!< IEEE 802.15.4-2006 250 kbit/s */ - -/* Register: RADIO_PCNF0 */ -/* Description: Packet configuration register 0 */ - -/* Bits 30..29 : Length of TERM field in Long Range operation */ -#define RADIO_PCNF0_TERMLEN_Pos (29UL) /*!< Position of TERMLEN field. */ -#define RADIO_PCNF0_TERMLEN_Msk (0x3UL << RADIO_PCNF0_TERMLEN_Pos) /*!< Bit mask of TERMLEN field. */ - -/* Bit 26 : Indicates if LENGTH field contains CRC or not */ -#define RADIO_PCNF0_CRCINC_Pos (26UL) /*!< Position of CRCINC field. */ -#define RADIO_PCNF0_CRCINC_Msk (0x1UL << RADIO_PCNF0_CRCINC_Pos) /*!< Bit mask of CRCINC field. */ -#define RADIO_PCNF0_CRCINC_Exclude (0UL) /*!< LENGTH does not contain CRC */ -#define RADIO_PCNF0_CRCINC_Include (1UL) /*!< LENGTH includes CRC */ - -/* Bits 25..24 : Length of preamble on air. Decision point: TASKS_START task */ -#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */ -#define RADIO_PCNF0_PLEN_Msk (0x3UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */ -#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */ -#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */ -#define RADIO_PCNF0_PLEN_32bitZero (2UL) /*!< 32-bit zero preamble - used for IEEE 802.15.4 */ -#define RADIO_PCNF0_PLEN_LongRange (3UL) /*!< Preamble - used for BTLE Long Range */ - -/* Bits 23..22 : Length of Code Indicator - Long Range */ -#define RADIO_PCNF0_CILEN_Pos (22UL) /*!< Position of CILEN field. */ -#define RADIO_PCNF0_CILEN_Msk (0x3UL << RADIO_PCNF0_CILEN_Pos) /*!< Bit mask of CILEN field. */ - -/* Bit 20 : Include or exclude S1 field in RAM */ -#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */ -#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */ -#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */ -#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */ - -/* Bits 19..16 : Length on air of S1 field in number of bits. */ -#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ -#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ - -/* Bit 8 : Length on air of S0 field in number of bytes. */ -#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ -#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ - -/* Bits 3..0 : Length on air of LENGTH field in number of bits. */ -#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ -#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ - -/* Register: RADIO_PCNF1 */ -/* Description: Packet configuration register 1 */ - -/* Bit 25 : Enable or disable packet whitening */ -#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */ -#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */ -#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least Significant bit on air first */ -#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ - -/* Bits 18..16 : Base address length in number of bytes */ -#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ -#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ - -/* Bits 15..8 : Static length in number of bytes */ -#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ -#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ - -/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */ -#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ -#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ - -/* Register: RADIO_BASE0 */ -/* Description: Base address 0 */ - -/* Bits 31..0 : Base address 0 */ -#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */ -#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */ - -/* Register: RADIO_BASE1 */ -/* Description: Base address 1 */ - -/* Bits 31..0 : Base address 1 */ -#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */ -#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */ - -/* Register: RADIO_PREFIX0 */ -/* Description: Prefixes bytes for logical addresses 0-3 */ - -/* Bits 31..24 : Address prefix 3. */ -#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ -#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ - -/* Bits 23..16 : Address prefix 2. */ -#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ -#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ - -/* Bits 15..8 : Address prefix 1. */ -#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ -#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ - -/* Bits 7..0 : Address prefix 0. */ -#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ -#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ - -/* Register: RADIO_PREFIX1 */ -/* Description: Prefixes bytes for logical addresses 4-7 */ - -/* Bits 31..24 : Address prefix 7. */ -#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ -#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ - -/* Bits 23..16 : Address prefix 6. */ -#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ -#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ - -/* Bits 15..8 : Address prefix 5. */ -#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ -#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ - -/* Bits 7..0 : Address prefix 4. */ -#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ -#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ - -/* Register: RADIO_TXADDRESS */ -/* Description: Transmit address select */ - -/* Bits 2..0 : Transmit address select */ -#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ -#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ - -/* Register: RADIO_RXADDRESSES */ -/* Description: Receive address select */ - -/* Bit 7 : Enable or disable reception on logical address 7. */ -#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable reception on logical address 6. */ -#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable reception on logical address 5. */ -#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable reception on logical address 4. */ -#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable reception on logical address 3. */ -#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable reception on logical address 2. */ -#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable reception on logical address 1. */ -#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable reception on logical address 0. */ -#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */ - -/* Register: RADIO_CRCCNF */ -/* Description: CRC configuration */ - -/* Bits 9..8 : Include or exclude packet address field out of CRC calculation. */ -#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Msk (0x3UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */ -#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */ -#define RADIO_CRCCNF_SKIPADDR_Ieee802154 (2UL) /*!< CRC calculation as per 802.15.4 standard. Starting at first byte after length field. */ - -/* Bits 1..0 : CRC length in number of bytes. */ -#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ -#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ -#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */ -#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */ -#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */ -#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */ - -/* Register: RADIO_CRCPOLY */ -/* Description: CRC polynomial */ - -/* Bits 23..0 : CRC polynomial */ -#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ -#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ - -/* Register: RADIO_CRCINIT */ -/* Description: CRC initial value */ - -/* Bits 23..0 : CRC initial value */ -#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ -#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ - -/* Register: RADIO_TIFS */ -/* Description: Inter Frame Spacing in us */ - -/* Bits 9..0 : Inter Frame Spacing in us */ -#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ -#define RADIO_TIFS_TIFS_Msk (0x3FFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ - -/* Register: RADIO_RSSISAMPLE */ -/* Description: RSSI sample */ - -/* Bits 6..0 : RSSI sample */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ - -/* Register: RADIO_STATE */ -/* Description: Current radio state */ - -/* Bits 3..0 : Current radio state */ -#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ -#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ -#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */ -#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */ -#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */ -#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */ -#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */ -#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */ -#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */ -#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */ -#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */ - -/* Register: RADIO_DATAWHITEIV */ -/* Description: Data whitening initial value */ - -/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ - -/* Register: RADIO_BCC */ -/* Description: Bit counter compare */ - -/* Bits 31..0 : Bit counter compare */ -#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */ -#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */ - -/* Register: RADIO_DAB */ -/* Description: Description collection[0]: Device address base segment 0 */ - -/* Bits 31..0 : Device address base segment 0 */ -#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */ -#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */ - -/* Register: RADIO_DAP */ -/* Description: Description collection[0]: Device address prefix 0 */ - -/* Bits 15..0 : Device address prefix 0 */ -#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ -#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ - -/* Register: RADIO_DACNF */ -/* Description: Device address match configuration */ - -/* Bit 15 : TxAdd for device address 7 */ -#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ -#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ - -/* Bit 14 : TxAdd for device address 6 */ -#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ -#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ - -/* Bit 13 : TxAdd for device address 5 */ -#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ -#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ - -/* Bit 12 : TxAdd for device address 4 */ -#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ -#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ - -/* Bit 11 : TxAdd for device address 3 */ -#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ -#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ - -/* Bit 10 : TxAdd for device address 2 */ -#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ -#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ - -/* Bit 9 : TxAdd for device address 1 */ -#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ -#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ - -/* Bit 8 : TxAdd for device address 0 */ -#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ -#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ - -/* Bit 7 : Enable or disable device address matching using device address 7 */ -#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ -#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ -#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */ - -/* Bit 6 : Enable or disable device address matching using device address 6 */ -#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ -#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ -#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */ - -/* Bit 5 : Enable or disable device address matching using device address 5 */ -#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ -#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ -#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */ - -/* Bit 4 : Enable or disable device address matching using device address 4 */ -#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ -#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ -#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */ - -/* Bit 3 : Enable or disable device address matching using device address 3 */ -#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ -#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ -#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */ - -/* Bit 2 : Enable or disable device address matching using device address 2 */ -#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ -#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ -#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */ - -/* Bit 1 : Enable or disable device address matching using device address 1 */ -#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ -#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ -#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */ - -/* Bit 0 : Enable or disable device address matching using device address 0 */ -#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ -#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ -#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */ - -/* Register: RADIO_MODECNF0 */ -/* Description: Radio mode configuration register 0 */ - -/* Bits 9..8 : Default TX value */ -#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */ -#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */ -#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */ -#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */ -#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */ - -/* Bit 0 : Radio ramp-up time */ -#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */ -#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */ -#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware written for nRF51 */ -#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification for more information */ - -/* Register: RADIO_SFD */ -/* Description: IEEE 802.15.4 Start of Frame Delimiter */ - -/* Bits 7..0 : IEEE 802.15.4 Start of Frame Delimiter */ -#define RADIO_SFD_SFD_Pos (0UL) /*!< Position of SFD field. */ -#define RADIO_SFD_SFD_Msk (0xFFUL << RADIO_SFD_SFD_Pos) /*!< Bit mask of SFD field. */ - -/* Register: RADIO_EDCNT */ -/* Description: IEEE 802.15.4 Energy Detect Loop Count */ - -/* Bits 20..0 : IEEE 802.15.4 Energy Detect Loop Count */ -#define RADIO_EDCNT_EDCNT_Pos (0UL) /*!< Position of EDCNT field. */ -#define RADIO_EDCNT_EDCNT_Msk (0x1FFFFFUL << RADIO_EDCNT_EDCNT_Pos) /*!< Bit mask of EDCNT field. */ - -/* Register: RADIO_EDSAMPLE */ -/* Description: IEEE 802.15.4 Energy Detect Level */ - -/* Bits 7..0 : IEEE 802.15.4 Energy Detect Level */ -#define RADIO_EDSAMPLE_EDLVL_Pos (0UL) /*!< Position of EDLVL field. */ -#define RADIO_EDSAMPLE_EDLVL_Msk (0xFFUL << RADIO_EDSAMPLE_EDLVL_Pos) /*!< Bit mask of EDLVL field. */ - -/* Register: RADIO_CCACTRL */ -/* Description: IEEE 802.15.4 Clear Channel Assessment Control */ - -/* Bits 31..24 : Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled. */ -#define RADIO_CCACTRL_CCACORRCNT_Pos (24UL) /*!< Position of CCACORRCNT field. */ -#define RADIO_CCACTRL_CCACORRCNT_Msk (0xFFUL << RADIO_CCACTRL_CCACORRCNT_Pos) /*!< Bit mask of CCACORRCNT field. */ - -/* Bits 23..16 : CCA Correlator Busy Threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode. */ -#define RADIO_CCACTRL_CCACORRTHRES_Pos (16UL) /*!< Position of CCACORRTHRES field. */ -#define RADIO_CCACTRL_CCACORRTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCACORRTHRES_Pos) /*!< Bit mask of CCACORRTHRES field. */ - -/* Bits 15..8 : CCA Energy Busy Threshold. Used in all the CCA modes except CarrierMode. */ -#define RADIO_CCACTRL_CCAEDTHRES_Pos (8UL) /*!< Position of CCAEDTHRES field. */ -#define RADIO_CCACTRL_CCAEDTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCAEDTHRES_Pos) /*!< Bit mask of CCAEDTHRES field. */ - -/* Bits 2..0 : CCA Mode Of Operation */ -#define RADIO_CCACTRL_CCAMODE_Pos (0UL) /*!< Position of CCAMODE field. */ -#define RADIO_CCACTRL_CCAMODE_Msk (0x7UL << RADIO_CCACTRL_CCAMODE_Pos) /*!< Bit mask of CCAMODE field. */ -#define RADIO_CCACTRL_CCAMODE_EdMode (0UL) /*!< Energy Above Threshold */ -#define RADIO_CCACTRL_CCAMODE_CarrierMode (1UL) /*!< Carrier Seen */ -#define RADIO_CCACTRL_CCAMODE_CarrierAndEdMode (2UL) /*!< Energy Above Threshold AND Carrier Seen */ -#define RADIO_CCACTRL_CCAMODE_CarrierOrEdMode (3UL) /*!< Energy Above Threshold OR Carrier Seen */ -#define RADIO_CCACTRL_CCAMODE_EdModeTest1 (4UL) /*!< Energy Above Threshold test mode that will abort when first ED measurement over threshold is seen. No averaging. */ - -/* Register: RADIO_POWER */ -/* Description: Peripheral power control */ - -/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */ -#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */ -#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */ - - -/* Peripheral: RNG */ -/* Description: Random Number Generator */ - -/* Register: RNG_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 0 : Shortcut between VALRDY event and STOP task */ -#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: RNG_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for VALRDY event */ -#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */ -#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */ -#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */ - -/* Register: RNG_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for VALRDY event */ -#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */ -#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */ -#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */ - -/* Register: RNG_CONFIG */ -/* Description: Configuration register */ - -/* Bit 0 : Bias correction */ -#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */ -#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */ - -/* Register: RNG_VALUE */ -/* Description: Output random number */ - -/* Bits 7..0 : Generated random number */ -#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ -#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ - - -/* Peripheral: RTC */ -/* Description: Real time counter 0 */ - -/* Register: RTC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ -#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ -#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ -#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ -#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for OVRFLW event */ -#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for TICK event */ -#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */ - -/* Register: RTC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ -#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ -#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ -#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ -#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for OVRFLW event */ -#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for TICK event */ -#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */ - -/* Register: RTC_EVTEN */ -/* Description: Enable or disable event routing */ - -/* Bit 19 : Enable or disable event routing for COMPARE[3] event */ -#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable event routing for COMPARE[2] event */ -#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable event routing for COMPARE[1] event */ -#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Enable */ - -/* Bit 16 : Enable or disable event routing for COMPARE[0] event */ -#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable event routing for OVRFLW event */ -#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable event routing for TICK event */ -#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Enable */ - -/* Register: RTC_EVTENSET */ -/* Description: Enable event routing */ - -/* Bit 19 : Write '1' to Enable event routing for COMPARE[3] event */ -#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable event routing for COMPARE[2] event */ -#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable event routing for COMPARE[1] event */ -#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable event routing for COMPARE[0] event */ -#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable event routing for OVRFLW event */ -#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable event routing for TICK event */ -#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */ - -/* Register: RTC_EVTENCLR */ -/* Description: Disable event routing */ - -/* Bit 19 : Write '1' to Disable event routing for COMPARE[3] event */ -#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable event routing for COMPARE[2] event */ -#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable event routing for COMPARE[1] event */ -#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable event routing for COMPARE[0] event */ -#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable event routing for OVRFLW event */ -#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable event routing for TICK event */ -#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */ - -/* Register: RTC_COUNTER */ -/* Description: Current COUNTER value */ - -/* Bits 23..0 : Counter value */ -#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ -#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ - -/* Register: RTC_PRESCALER */ -/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */ - -/* Bits 11..0 : Prescaler value */ -#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: RTC_CC */ -/* Description: Description collection[0]: Compare register 0 */ - -/* Bits 23..0 : Compare value */ -#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ -#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ - - -/* Peripheral: SAADC */ -/* Description: Analog to Digital Converter */ - -/* Register: SAADC_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 21 : Enable or disable interrupt for CH[7].LIMITL event */ -#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for CH[7].LIMITH event */ -#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for CH[6].LIMITL event */ -#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for CH[6].LIMITH event */ -#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable interrupt for CH[5].LIMITL event */ -#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 16 : Enable or disable interrupt for CH[5].LIMITH event */ -#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 15 : Enable or disable interrupt for CH[4].LIMITL event */ -#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for CH[4].LIMITH event */ -#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 13 : Enable or disable interrupt for CH[3].LIMITL event */ -#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for CH[3].LIMITH event */ -#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for CH[2].LIMITL event */ -#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for CH[2].LIMITH event */ -#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for CH[1].LIMITL event */ -#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for CH[1].LIMITH event */ -#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for CH[0].LIMITL event */ -#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for CH[0].LIMITH event */ -#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for STOPPED event */ -#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for CALIBRATEDONE event */ -#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for RESULTDONE event */ -#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for DONE event */ -#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for END event */ -#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for STARTED event */ -#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Register: SAADC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 21 : Write '1' to Enable interrupt for CH[7].LIMITL event */ -#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for CH[7].LIMITH event */ -#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for CH[6].LIMITL event */ -#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for CH[6].LIMITH event */ -#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for CH[5].LIMITL event */ -#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for CH[5].LIMITH event */ -#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 15 : Write '1' to Enable interrupt for CH[4].LIMITL event */ -#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for CH[4].LIMITH event */ -#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for CH[3].LIMITL event */ -#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for CH[3].LIMITH event */ -#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for CH[2].LIMITL event */ -#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for CH[2].LIMITH event */ -#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for CH[1].LIMITL event */ -#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for CH[1].LIMITH event */ -#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for CH[0].LIMITL event */ -#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for CH[0].LIMITH event */ -#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for STOPPED event */ -#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for CALIBRATEDONE event */ -#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for RESULTDONE event */ -#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for DONE event */ -#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for END event */ -#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ -#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Register: SAADC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 21 : Write '1' to Disable interrupt for CH[7].LIMITL event */ -#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for CH[7].LIMITH event */ -#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for CH[6].LIMITL event */ -#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for CH[6].LIMITH event */ -#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for CH[5].LIMITL event */ -#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for CH[5].LIMITH event */ -#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 15 : Write '1' to Disable interrupt for CH[4].LIMITL event */ -#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for CH[4].LIMITH event */ -#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for CH[3].LIMITL event */ -#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for CH[3].LIMITH event */ -#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for CH[2].LIMITL event */ -#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for CH[2].LIMITH event */ -#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for CH[1].LIMITL event */ -#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for CH[1].LIMITH event */ -#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for CH[0].LIMITL event */ -#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for CH[0].LIMITH event */ -#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for STOPPED event */ -#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for CALIBRATEDONE event */ -#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for RESULTDONE event */ -#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for DONE event */ -#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for END event */ -#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ -#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Register: SAADC_STATUS */ -/* Description: Status */ - -/* Bit 0 : Status */ -#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */ -#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */ - -/* Register: SAADC_ENABLE */ -/* Description: Enable or disable ADC */ - -/* Bit 0 : Enable or disable ADC */ -#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable ADC */ -#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable ADC */ - -/* Register: SAADC_CH_PSELP */ -/* Description: Description cluster[0]: Input positive pin selection for CH[0] */ - -/* Bits 4..0 : Analog positive input channel */ -#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */ -#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */ -#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */ -#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */ -#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */ -#define SAADC_CH_PSELP_PSELP_VDDHDIV5 (0x11UL) /*!< VDDH/5 */ - -/* Register: SAADC_CH_PSELN */ -/* Description: Description cluster[0]: Input negative pin selection for CH[0] */ - -/* Bits 4..0 : Analog negative input, enables differential channel */ -#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */ -#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */ -#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */ -#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */ -#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */ -#define SAADC_CH_PSELN_PSELN_VDDHDIV5 (0x11UL) /*!< VDDH/5 */ - -/* Register: SAADC_CH_CONFIG */ -/* Description: Description cluster[0]: Input configuration for CH[0] */ - -/* Bit 24 : Enable burst mode */ -#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */ -#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */ -#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */ -#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */ - -/* Bit 20 : Enable differential mode */ -#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */ -#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single ended, PSELN will be ignored, negative input to ADC shorted to GND */ -#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */ - -/* Bits 18..16 : Acquisition time, the time the ADC uses to sample the input voltage */ -#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */ -#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */ -#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */ -#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */ -#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */ -#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */ -#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */ -#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */ - -/* Bit 12 : Reference control */ -#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */ -#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */ -#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */ - -/* Bits 10..8 : Gain control */ -#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */ -#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */ -#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */ -#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */ -#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */ -#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */ - -/* Bits 5..4 : Negative channel resistor control */ -#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ -#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */ -#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */ -#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */ -#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */ -#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */ - -/* Bits 1..0 : Positive channel resistor control */ -#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */ -#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */ -#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */ -#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */ -#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */ -#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */ - -/* Register: SAADC_CH_LIMIT */ -/* Description: Description cluster[0]: High/low limits for event monitoring a channel */ - -/* Bits 31..16 : High level limit */ -#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */ -#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */ - -/* Bits 15..0 : Low level limit */ -#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */ -#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */ - -/* Register: SAADC_RESOLUTION */ -/* Description: Resolution configuration */ - -/* Bits 2..0 : Set the resolution */ -#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */ -#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */ -#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bit */ -#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bit */ -#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bit */ -#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bit */ - -/* Register: SAADC_OVERSAMPLE */ -/* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */ - -/* Bits 3..0 : Oversample control */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */ - -/* Register: SAADC_SAMPLERATE */ -/* Description: Controls normal or continuous sample rate */ - -/* Bit 12 : Select mode for sample rate control */ -#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */ -#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */ -#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */ - -/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */ -#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */ -#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */ - -/* Register: SAADC_RESULT_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SAADC_RESULT_MAXCNT */ -/* Description: Maximum number of buffer words to transfer */ - -/* Bits 14..0 : Maximum number of buffer words to transfer */ -#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SAADC_RESULT_AMOUNT */ -/* Description: Number of buffer words transferred since last START */ - -/* Bits 14..0 : Number of buffer words transferred since last START. This register can be read after an END or STOPPED event. */ -#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - - -/* Peripheral: SPI */ -/* Description: Serial Peripheral Interface 0 */ - -/* Register: SPI_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for READY event */ -#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: SPI_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for READY event */ -#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: SPI_ENABLE */ -/* Description: Enable SPI */ - -/* Bits 3..0 : Enable or disable SPI */ -#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */ -#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */ - -/* Register: SPI_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bit 31 : Connection */ -#define SPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPI_PSEL_SCK_CONNECT_Msk (0x1UL << SPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define SPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPI_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPI_PSEL_SCK_PORT_Msk (0x3UL << SPI_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPI_PSEL_SCK_PIN_Msk (0x1FUL << SPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPI_PSEL_MOSI */ -/* Description: Pin select for MOSI signal */ - -/* Bit 31 : Connection */ -#define SPI_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPI_PSEL_MOSI_CONNECT_Msk (0x1UL << SPI_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPI_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ -#define SPI_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPI_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPI_PSEL_MOSI_PORT_Msk (0x3UL << SPI_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPI_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPI_PSEL_MOSI_PIN_Msk (0x1FUL << SPI_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPI_PSEL_MISO */ -/* Description: Pin select for MISO signal */ - -/* Bit 31 : Connection */ -#define SPI_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPI_PSEL_MISO_CONNECT_Msk (0x1UL << SPI_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPI_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ -#define SPI_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPI_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPI_PSEL_MISO_PORT_Msk (0x3UL << SPI_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPI_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPI_PSEL_MISO_PIN_Msk (0x1FUL << SPI_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPI_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RX data received. Double buffered */ -#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: SPI_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TX data to send. Double buffered */ -#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: SPI_FREQUENCY */ -/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : SPI master data rate */ -#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ -#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ -#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ - -/* Register: SPI_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - - -/* Peripheral: SPIM */ -/* Description: Serial Peripheral Interface Master with EasyDMA 0 */ - -/* Register: SPIM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 17 : Shortcut between END event and START task */ -#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ -#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ -#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: SPIM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 19 : Write '1' to Enable interrupt for STARTED event */ -#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ -#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for END event */ -#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: SPIM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 19 : Write '1' to Disable interrupt for STARTED event */ -#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ -#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for END event */ -#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: SPIM_STALLSTAT */ -/* Description: Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU. */ - -/* Bit 1 : Stall status for EasyDMA RAM writes */ -#define SPIM_STALLSTAT_RX_Pos (1UL) /*!< Position of RX field. */ -#define SPIM_STALLSTAT_RX_Msk (0x1UL << SPIM_STALLSTAT_RX_Pos) /*!< Bit mask of RX field. */ -#define SPIM_STALLSTAT_RX_NOSTALL (0UL) /*!< No stall */ -#define SPIM_STALLSTAT_RX_STALL (1UL) /*!< A stall has occurred */ - -/* Bit 0 : Stall status for EasyDMA RAM reads */ -#define SPIM_STALLSTAT_TX_Pos (0UL) /*!< Position of TX field. */ -#define SPIM_STALLSTAT_TX_Msk (0x1UL << SPIM_STALLSTAT_TX_Pos) /*!< Bit mask of TX field. */ -#define SPIM_STALLSTAT_TX_NOSTALL (0UL) /*!< No stall */ -#define SPIM_STALLSTAT_TX_STALL (1UL) /*!< A stall has occurred */ - -/* Register: SPIM_ENABLE */ -/* Description: Enable SPIM */ - -/* Bits 3..0 : Enable or disable SPIM */ -#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */ -#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */ - -/* Register: SPIM_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIM_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIM_PSEL_SCK_PORT_Msk (0x3UL << SPIM_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_PSEL_MOSI */ -/* Description: Pin select for MOSI signal */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIM_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIM_PSEL_MOSI_PORT_Msk (0x3UL << SPIM_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_PSEL_MISO */ -/* Description: Pin select for MISO signal */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIM_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIM_PSEL_MISO_PORT_Msk (0x3UL << SPIM_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_PSEL_CSN */ -/* Description: Pin select for CSN */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_CSN_CONNECT_Msk (0x1UL << SPIM_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIM_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIM_PSEL_CSN_PORT_Msk (0x3UL << SPIM_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_CSN_PIN_Msk (0x1FUL << SPIM_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_FREQUENCY */ -/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : SPI master data rate */ -#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_M16 (0x0A000000UL) /*!< 16 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M32 (0x14000000UL) /*!< 32 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ - -/* Register: SPIM_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 15..0 : Maximum number of bytes in receive buffer */ -#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 15..0 : Number of bytes transferred in the last transaction */ -#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIM_RXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 1..0 : List type */ -#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define SPIM_RXD_LIST_LIST_Msk (0x3UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: SPIM_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_TXD_MAXCNT */ -/* Description: Number of bytes in transmit buffer */ - -/* Bits 15..0 : Maximum number of bytes in transmit buffer */ -#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 15..0 : Number of bytes transferred in the last transaction */ -#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIM_TXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 1..0 : List type */ -#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define SPIM_TXD_LIST_LIST_Msk (0x3UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: SPIM_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - -/* Register: SPIM_IFTIMING_RXDELAY */ -/* Description: Sample delay for input serial data on MISO */ - -/* Bits 2..0 : Sample delay for input serial data on MISO. The value specifies the number of 64 MHz clock cycles (15.625 ns) delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled. As en example, if RXDELAY = 0 and CONFIG.CPHA = 0, the input serial data is sampled on the rising edge of SCK. */ -#define SPIM_IFTIMING_RXDELAY_RXDELAY_Pos (0UL) /*!< Position of RXDELAY field. */ -#define SPIM_IFTIMING_RXDELAY_RXDELAY_Msk (0x7UL << SPIM_IFTIMING_RXDELAY_RXDELAY_Pos) /*!< Bit mask of RXDELAY field. */ - -/* Register: SPIM_IFTIMING_CSNDUR */ -/* Description: Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions */ - -/* Bits 7..0 : Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions. The value is specified in number of 64 MHz clock cycles (15.625 ns). */ -#define SPIM_IFTIMING_CSNDUR_CSNDUR_Pos (0UL) /*!< Position of CSNDUR field. */ -#define SPIM_IFTIMING_CSNDUR_CSNDUR_Msk (0xFFUL << SPIM_IFTIMING_CSNDUR_CSNDUR_Pos) /*!< Bit mask of CSNDUR field. */ - -/* Register: SPIM_ORC */ -/* Description: Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT */ - -/* Bits 7..0 : Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT. */ -#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: SPIS */ -/* Description: SPI Slave 0 */ - -/* Register: SPIS_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 2 : Shortcut between END event and ACQUIRE task */ -#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */ -#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: SPIS_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 10 : Write '1' to Enable interrupt for ACQUIRED event */ -#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for END event */ -#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Register: SPIS_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 10 : Write '1' to Disable interrupt for ACQUIRED event */ -#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for END event */ -#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Register: SPIS_SEMSTAT */ -/* Description: Semaphore status register */ - -/* Bits 1..0 : Semaphore status */ -#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */ -#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */ -#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */ -#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */ - -/* Register: SPIS_STATUS */ -/* Description: Status from last transaction */ - -/* Bit 1 : RX buffer overflow detected, and prevented */ -#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */ -#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */ -#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Bit 0 : TX buffer over-read detected, and prevented */ -#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */ -#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */ -#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Register: SPIS_ENABLE */ -/* Description: Enable SPI slave */ - -/* Bits 3..0 : Enable or disable SPI slave */ -#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */ -#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */ - -/* Register: SPIS_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIS_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIS_PSEL_SCK_PORT_Msk (0x3UL << SPIS_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_MISO */ -/* Description: Pin select for MISO signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIS_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIS_PSEL_MISO_PORT_Msk (0x3UL << SPIS_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_MOSI */ -/* Description: Pin select for MOSI signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIS_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIS_PSEL_MOSI_PORT_Msk (0x3UL << SPIS_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_CSN */ -/* Description: Pin select for CSN signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define SPIS_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define SPIS_PSEL_CSN_PORT_Msk (0x3UL << SPIS_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_RXD_PTR */ -/* Description: RXD data pointer */ - -/* Bits 31..0 : RXD data pointer */ -#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIS_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIS_RXD_AMOUNT */ -/* Description: Number of bytes received in last granted transaction */ - -/* Bits 7..0 : Number of bytes received in the last granted transaction */ -#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIS_TXD_PTR */ -/* Description: TXD data pointer */ - -/* Bits 31..0 : TXD data pointer */ -#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIS_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIS_TXD_AMOUNT */ -/* Description: Number of bytes transmitted in last granted transaction */ - -/* Bits 7..0 : Number of bytes transmitted in last granted transaction */ -#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIS_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - -/* Register: SPIS_DEF */ -/* Description: Default character. Character clocked out in case of an ignored transaction. */ - -/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */ -#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ -#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ - -/* Register: SPIS_ORC */ -/* Description: Over-read character */ - -/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */ -#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: TEMP */ -/* Description: Temperature Sensor */ - -/* Register: TEMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for DATARDY event */ -#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */ -#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */ -#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */ - -/* Register: TEMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for DATARDY event */ -#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */ -#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */ -#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */ - -/* Register: TEMP_TEMP */ -/* Description: Temperature in degC (0.25deg steps) */ - -/* Bits 31..0 : Temperature in degC (0.25deg steps) */ -#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */ -#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */ - -/* Register: TEMP_A0 */ -/* Description: Slope of 1st piece wise linear function */ - -/* Bits 11..0 : Slope of 1st piece wise linear function */ -#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */ -#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */ - -/* Register: TEMP_A1 */ -/* Description: Slope of 2nd piece wise linear function */ - -/* Bits 11..0 : Slope of 2nd piece wise linear function */ -#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */ -#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */ - -/* Register: TEMP_A2 */ -/* Description: Slope of 3rd piece wise linear function */ - -/* Bits 11..0 : Slope of 3rd piece wise linear function */ -#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */ -#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */ - -/* Register: TEMP_A3 */ -/* Description: Slope of 4th piece wise linear function */ - -/* Bits 11..0 : Slope of 4th piece wise linear function */ -#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */ -#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */ - -/* Register: TEMP_A4 */ -/* Description: Slope of 5th piece wise linear function */ - -/* Bits 11..0 : Slope of 5th piece wise linear function */ -#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */ -#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */ - -/* Register: TEMP_A5 */ -/* Description: Slope of 6th piece wise linear function */ - -/* Bits 11..0 : Slope of 6th piece wise linear function */ -#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */ -#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */ - -/* Register: TEMP_B0 */ -/* Description: y-intercept of 1st piece wise linear function */ - -/* Bits 13..0 : y-intercept of 1st piece wise linear function */ -#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */ -#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ - -/* Register: TEMP_B1 */ -/* Description: y-intercept of 2nd piece wise linear function */ - -/* Bits 13..0 : y-intercept of 2nd piece wise linear function */ -#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */ -#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */ - -/* Register: TEMP_B2 */ -/* Description: y-intercept of 3rd piece wise linear function */ - -/* Bits 13..0 : y-intercept of 3rd piece wise linear function */ -#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */ -#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */ - -/* Register: TEMP_B3 */ -/* Description: y-intercept of 4th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 4th piece wise linear function */ -#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */ -#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */ - -/* Register: TEMP_B4 */ -/* Description: y-intercept of 5th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 5th piece wise linear function */ -#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */ -#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */ - -/* Register: TEMP_B5 */ -/* Description: y-intercept of 6th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 6th piece wise linear function */ -#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ -#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */ - -/* Register: TEMP_T0 */ -/* Description: End point of 1st piece wise linear function */ - -/* Bits 7..0 : End point of 1st piece wise linear function */ -#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */ -#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */ - -/* Register: TEMP_T1 */ -/* Description: End point of 2nd piece wise linear function */ - -/* Bits 7..0 : End point of 2nd piece wise linear function */ -#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */ -#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */ - -/* Register: TEMP_T2 */ -/* Description: End point of 3rd piece wise linear function */ - -/* Bits 7..0 : End point of 3rd piece wise linear function */ -#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */ -#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */ - -/* Register: TEMP_T3 */ -/* Description: End point of 4th piece wise linear function */ - -/* Bits 7..0 : End point of 4th piece wise linear function */ -#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */ -#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */ - -/* Register: TEMP_T4 */ -/* Description: End point of 5th piece wise linear function */ - -/* Bits 7..0 : End point of 5th piece wise linear function */ -#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */ -#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */ - - -/* Peripheral: TIMER */ -/* Description: Timer/Counter 0 */ - -/* Register: TIMER_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 13 : Shortcut between COMPARE[5] event and STOP task */ -#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */ -#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */ -#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 12 : Shortcut between COMPARE[4] event and STOP task */ -#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */ -#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */ -#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 11 : Shortcut between COMPARE[3] event and STOP task */ -#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 10 : Shortcut between COMPARE[2] event and STOP task */ -#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 9 : Shortcut between COMPARE[1] event and STOP task */ -#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 8 : Shortcut between COMPARE[0] event and STOP task */ -#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between COMPARE[5] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between COMPARE[4] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between COMPARE[3] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between COMPARE[2] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between COMPARE[1] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between COMPARE[0] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TIMER_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 21 : Write '1' to Enable interrupt for COMPARE[5] event */ -#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ -#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ -#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for COMPARE[4] event */ -#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ -#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ -#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ -#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ -#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ -#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ -#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Register: TIMER_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 21 : Write '1' to Disable interrupt for COMPARE[5] event */ -#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ -#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ -#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for COMPARE[4] event */ -#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ -#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ -#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ -#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ -#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ -#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ -#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Register: TIMER_STATUS */ -/* Description: Timer status */ - -/* Bit 0 : Timer status */ -#define TIMER_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define TIMER_STATUS_STATUS_Msk (0x1UL << TIMER_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define TIMER_STATUS_STATUS_Stopped (0UL) /*!< Timer is stopped */ -#define TIMER_STATUS_STATUS_Started (1UL) /*!< Timer is started */ - -/* Register: TIMER_MODE */ -/* Description: Timer mode selection */ - -/* Bits 1..0 : Timer mode */ -#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */ -#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */ -#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */ - -/* Register: TIMER_BITMODE */ -/* Description: Configure the number of bits used by the TIMER */ - -/* Bits 1..0 : Timer bit width */ -#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */ - -/* Register: TIMER_PRESCALER */ -/* Description: Timer prescaler register */ - -/* Bits 3..0 : Prescaler value */ -#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: TIMER_CC */ -/* Description: Description collection[0]: Capture/Compare register 0 */ - -/* Bits 31..0 : Capture/Compare value */ -#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */ -#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */ - - -/* Peripheral: TWI */ -/* Description: I2C compatible Two-Wire Interface 0 */ - -/* Register: TWI_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 1 : Shortcut between BB event and STOP task */ -#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between BB event and SUSPEND task */ -#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWI_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ -#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for BB event */ -#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDSENT event */ -#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDREADY event */ -#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWI_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ -#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for BB event */ -#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDSENT event */ -#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDREADY event */ -#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWI_ERRORSRC */ -/* Description: Error source */ - -/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ -#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */ -#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */ - -/* Bit 1 : NACK received after sending the address (write '1' to clear) */ -#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ -#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ -#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */ -#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */ - -/* Bit 0 : Overrun error */ -#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ -#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ - -/* Register: TWI_ENABLE */ -/* Description: Enable TWI */ - -/* Bits 3..0 : Enable or disable TWI */ -#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */ -#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */ - -/* Register: TWI_PSEL_SCL */ -/* Description: Pin select for SCL */ - -/* Bit 31 : Connection */ -#define TWI_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWI_PSEL_SCL_CONNECT_Msk (0x1UL << TWI_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWI_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ -#define TWI_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWI_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWI_PSEL_SCL_PORT_Msk (0x3UL << TWI_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWI_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWI_PSEL_SCL_PIN_Msk (0x1FUL << TWI_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWI_PSEL_SDA */ -/* Description: Pin select for SDA */ - -/* Bit 31 : Connection */ -#define TWI_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWI_PSEL_SDA_CONNECT_Msk (0x1UL << TWI_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWI_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ -#define TWI_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWI_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWI_PSEL_SDA_PORT_Msk (0x3UL << TWI_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWI_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWI_PSEL_SDA_PIN_Msk (0x1FUL << TWI_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWI_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RXD register */ -#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: TWI_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TXD register */ -#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: TWI_FREQUENCY */ -/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : TWI master clock frequency */ -#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ -#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */ - -/* Register: TWI_ADDRESS */ -/* Description: Address used in the TWI transfer */ - -/* Bits 6..0 : Address used in the TWI transfer */ -#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - - -/* Peripheral: TWIM */ -/* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */ - -/* Register: TWIM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 12 : Shortcut between LASTRX event and STOP task */ -#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */ -#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */ -#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 10 : Shortcut between LASTRX event and STARTTX task */ -#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */ -#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */ -#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 9 : Shortcut between LASTTX event and STOP task */ -#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */ -#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */ -#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 8 : Shortcut between LASTTX event and SUSPEND task */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 7 : Shortcut between LASTTX event and STARTRX task */ -#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */ -#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */ -#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWIM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 24 : Enable or disable interrupt for LASTTX event */ -#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */ - -/* Bit 23 : Enable or disable interrupt for LASTRX event */ -#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for SUSPENDED event */ -#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: TWIM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 24 : Write '1' to Enable interrupt for LASTTX event */ -#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */ - -/* Bit 23 : Write '1' to Enable interrupt for LASTRX event */ -#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ -#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWIM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 24 : Write '1' to Disable interrupt for LASTTX event */ -#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */ - -/* Bit 23 : Write '1' to Disable interrupt for LASTRX event */ -#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ -#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWIM_ERRORSRC */ -/* Description: Error source */ - -/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ -#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ - -/* Bit 1 : NACK received after sending the address (write '1' to clear) */ -#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ -#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ -#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */ - -/* Bit 0 : Overrun error */ -#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */ - -/* Register: TWIM_ENABLE */ -/* Description: Enable TWIM */ - -/* Bits 3..0 : Enable or disable TWIM */ -#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */ -#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */ - -/* Register: TWIM_PSEL_SCL */ -/* Description: Pin select for SCL signal */ - -/* Bit 31 : Connection */ -#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWIM_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWIM_PSEL_SCL_PORT_Msk (0x3UL << TWIM_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIM_PSEL_SDA */ -/* Description: Pin select for SDA signal */ - -/* Bit 31 : Connection */ -#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWIM_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWIM_PSEL_SDA_PORT_Msk (0x3UL << TWIM_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIM_FREQUENCY */ -/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : TWI master clock frequency */ -#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ -#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */ - -/* Register: TWIM_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIM_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIM_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ -#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIM_RXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: TWIM_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIM_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIM_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ -#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIM_TXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: TWIM_ADDRESS */ -/* Description: Address used in the TWI transfer */ - -/* Bits 6..0 : Address used in the TWI transfer */ -#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - - -/* Peripheral: TWIS */ -/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */ - -/* Register: TWIS_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 14 : Shortcut between READ event and SUSPEND task */ -#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */ -#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */ -#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 13 : Shortcut between WRITE event and SUSPEND task */ -#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */ -#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */ -#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWIS_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 26 : Enable or disable interrupt for READ event */ -#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable interrupt for WRITE event */ -#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: TWIS_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 26 : Write '1' to Enable interrupt for READ event */ -#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable interrupt for WRITE event */ -#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWIS_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 26 : Write '1' to Disable interrupt for READ event */ -#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable interrupt for WRITE event */ -#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWIS_ERRORSRC */ -/* Description: Error source */ - -/* Bit 3 : TX buffer over-read detected, and prevented */ -#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */ -#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ -#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */ - -/* Bit 2 : NACK sent after receiving a data byte */ -#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ - -/* Bit 0 : RX buffer overflow detected, and prevented */ -#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */ -#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ -#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */ - -/* Register: TWIS_MATCH */ -/* Description: Status register indicating which address had a match */ - -/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */ -#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */ -#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */ - -/* Register: TWIS_ENABLE */ -/* Description: Enable TWIS */ - -/* Bits 3..0 : Enable or disable TWIS */ -#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */ -#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */ - -/* Register: TWIS_PSEL_SCL */ -/* Description: Pin select for SCL signal */ - -/* Bit 31 : Connection */ -#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWIS_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWIS_PSEL_SCL_PORT_Msk (0x3UL << TWIS_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIS_PSEL_SDA */ -/* Description: Pin select for SDA signal */ - -/* Bit 31 : Connection */ -#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define TWIS_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define TWIS_PSEL_SDA_PORT_Msk (0x3UL << TWIS_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIS_RXD_PTR */ -/* Description: RXD Data pointer */ - -/* Bits 31..0 : RXD Data pointer */ -#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIS_RXD_MAXCNT */ -/* Description: Maximum number of bytes in RXD buffer */ - -/* Bits 7..0 : Maximum number of bytes in RXD buffer */ -#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIS_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last RXD transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last RXD transaction */ -#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIS_TXD_PTR */ -/* Description: TXD Data pointer */ - -/* Bits 31..0 : TXD Data pointer */ -#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIS_TXD_MAXCNT */ -/* Description: Maximum number of bytes in TXD buffer */ - -/* Bits 7..0 : Maximum number of bytes in TXD buffer */ -#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIS_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last TXD transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last TXD transaction */ -#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIS_ADDRESS */ -/* Description: Description collection[0]: TWI slave address 0 */ - -/* Bits 6..0 : TWI slave address */ -#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - -/* Register: TWIS_CONFIG */ -/* Description: Configuration register for the address match mechanism */ - -/* Bit 1 : Enable or disable address matching on ADDRESS[1] */ -#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */ -#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */ -#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */ -#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */ - -/* Bit 0 : Enable or disable address matching on ADDRESS[0] */ -#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */ -#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */ -#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */ -#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */ - -/* Register: TWIS_ORC */ -/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */ - -/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */ -#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: UART */ -/* Description: Universal Asynchronous Receiver/Transmitter */ - -/* Register: UART_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between NCTS event and STOPRX task */ -#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */ -#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between CTS event and STARTRX task */ -#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: UART_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ -#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ -#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ -#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ -#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for CTS event */ -#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */ - -/* Register: UART_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ -#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ -#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ -#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ -#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for CTS event */ -#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */ - -/* Register: UART_ERRORSRC */ -/* Description: Error source */ - -/* Bit 3 : Break condition */ -#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ -#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ -#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ - -/* Bit 2 : Framing error occurred */ -#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ - -/* Bit 1 : Parity error */ -#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ - -/* Bit 0 : Overrun error */ -#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ - -/* Register: UART_ENABLE */ -/* Description: Enable UART */ - -/* Bits 3..0 : Enable or disable UART */ -#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */ -#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */ - -/* Register: UART_PSEL_RTS */ -/* Description: Pin select for RTS */ - -/* Bit 31 : Connection */ -#define UART_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UART_PSEL_RTS_CONNECT_Msk (0x1UL << UART_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UART_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UART_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UART_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UART_PSEL_RTS_PORT_Msk (0x3UL << UART_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UART_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UART_PSEL_RTS_PIN_Msk (0x1FUL << UART_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UART_PSEL_TXD */ -/* Description: Pin select for TXD */ - -/* Bit 31 : Connection */ -#define UART_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UART_PSEL_TXD_CONNECT_Msk (0x1UL << UART_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UART_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UART_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UART_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UART_PSEL_TXD_PORT_Msk (0x3UL << UART_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UART_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UART_PSEL_TXD_PIN_Msk (0x1FUL << UART_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UART_PSEL_CTS */ -/* Description: Pin select for CTS */ - -/* Bit 31 : Connection */ -#define UART_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UART_PSEL_CTS_CONNECT_Msk (0x1UL << UART_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UART_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UART_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UART_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UART_PSEL_CTS_PORT_Msk (0x3UL << UART_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UART_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UART_PSEL_CTS_PIN_Msk (0x1FUL << UART_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UART_PSEL_RXD */ -/* Description: Pin select for RXD */ - -/* Bit 31 : Connection */ -#define UART_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UART_PSEL_RXD_CONNECT_Msk (0x1UL << UART_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UART_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UART_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UART_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UART_PSEL_RXD_PORT_Msk (0x3UL << UART_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UART_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UART_PSEL_RXD_PIN_Msk (0x1FUL << UART_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UART_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RX data received in previous transfers, double buffered */ -#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: UART_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TX data to be transferred */ -#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: UART_BAUDRATE */ -/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : Baud rate */ -#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ -#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ -#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ -#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ -#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */ -#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ -#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */ -#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ -#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */ -#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ -#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */ -#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ -#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */ -#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */ -#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ -#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */ -#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */ -#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ - -/* Register: UART_CONFIG */ -/* Description: Configuration of parity and hardware flow control */ - -/* Bits 3..1 : Parity */ -#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ -#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ - -/* Bit 0 : Hardware flow control */ -#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ -#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ -#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ -#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ - - -/* Peripheral: UARTE */ -/* Description: UART with EasyDMA 0 */ - -/* Register: UARTE_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 6 : Shortcut between ENDRX event and STOPRX task */ -#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */ -#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */ -#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */ -#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between ENDRX event and STARTRX task */ -#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */ -#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */ -#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: UARTE_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 22 : Enable or disable interrupt for TXSTOPPED event */ -#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable interrupt for RXTO event */ -#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for ENDTX event */ -#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for TXDRDY event */ -#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for ENDRX event */ -#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for RXDRDY event */ -#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for NCTS event */ -#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for CTS event */ -#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */ - -/* Register: UARTE_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 22 : Write '1' to Enable interrupt for TXSTOPPED event */ -#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ -#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ -#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ -#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ -#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ -#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for CTS event */ -#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */ - -/* Register: UARTE_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 22 : Write '1' to Disable interrupt for TXSTOPPED event */ -#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ -#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ -#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ -#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ -#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ -#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for CTS event */ -#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */ - -/* Register: UARTE_ERRORSRC */ -/* Description: Error source Note : this register is read / write one to clear. */ - -/* Bit 3 : Break condition */ -#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ -#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ -#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ - -/* Bit 2 : Framing error occurred */ -#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ -#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ -#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ - -/* Bit 1 : Parity error */ -#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ - -/* Bit 0 : Overrun error */ -#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ - -/* Register: UARTE_ENABLE */ -/* Description: Enable UART */ - -/* Bits 3..0 : Enable or disable UARTE */ -#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */ -#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */ - -/* Register: UARTE_PSEL_RTS */ -/* Description: Pin select for RTS signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UARTE_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UARTE_PSEL_RTS_PORT_Msk (0x3UL << UARTE_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_TXD */ -/* Description: Pin select for TXD signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UARTE_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UARTE_PSEL_TXD_PORT_Msk (0x3UL << UARTE_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_CTS */ -/* Description: Pin select for CTS signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UARTE_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UARTE_PSEL_CTS_PORT_Msk (0x3UL << UARTE_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_RXD */ -/* Description: Pin select for RXD signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number */ -#define UARTE_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UARTE_PSEL_RXD_PORT_Msk (0x3UL << UARTE_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_BAUDRATE */ -/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : Baud rate */ -#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ -#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ -#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ -#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ -#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ - -/* Register: UARTE_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: UARTE_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 9..0 : Maximum number of bytes in receive buffer */ -#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: UARTE_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 9..0 : Number of bytes transferred in the last transaction */ -#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: UARTE_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: UARTE_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 9..0 : Maximum number of bytes in transmit buffer */ -#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: UARTE_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 9..0 : Number of bytes transferred in the last transaction */ -#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: UARTE_CONFIG */ -/* Description: Configuration of parity and hardware flow control */ - -/* Bit 4 : Stop bits */ -#define UARTE_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */ -#define UARTE_CONFIG_STOP_Msk (0x1UL << UARTE_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */ -#define UARTE_CONFIG_STOP_One (0UL) /*!< One stop bit */ -#define UARTE_CONFIG_STOP_Two (1UL) /*!< Two stop bits */ - -/* Bits 3..1 : Parity */ -#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ -#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include even parity bit */ - -/* Bit 0 : Hardware flow control */ -#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ -#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ -#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ -#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ - - -/* Peripheral: UICR */ -/* Description: User Information Configuration Registers */ - -/* Register: UICR_NRFFW */ -/* Description: Description collection[0]: Reserved for Nordic firmware design */ - -/* Bits 31..0 : Reserved for Nordic firmware design */ -#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */ -#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */ - -/* Register: UICR_NRFHW */ -/* Description: Description collection[0]: Reserved for Nordic hardware design */ - -/* Bits 31..0 : Reserved for Nordic hardware design */ -#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */ -#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */ - -/* Register: UICR_CUSTOMER */ -/* Description: Description collection[0]: Reserved for customer */ - -/* Bits 31..0 : Reserved for customer */ -#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */ -#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */ - -/* Register: UICR_PSELRESET */ -/* Description: Description collection[0]: Mapping of the nRESET function */ - -/* Bit 31 : Connection */ -#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */ -#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 6..5 : Port number onto which nRESET is exposed */ -#define UICR_PSELRESET_PORT_Pos (5UL) /*!< Position of PORT field. */ -#define UICR_PSELRESET_PORT_Msk (0x3UL << UICR_PSELRESET_PORT_Pos) /*!< Bit mask of PORT field. */ - -/* Bits 4..0 : Pin number of PORT onto which nRESET is exposed */ -#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UICR_PSELRESET_PIN_Msk (0x1FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UICR_APPROTECT */ -/* Description: Access port protection */ - -/* Bits 7..0 : Enable or disable Access Port protection. */ -#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */ -#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */ -#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */ -#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */ - -/* Register: UICR_NFCPINS */ -/* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */ - -/* Bit 0 : Setting of pins dedicated to NFC functionality */ -#define UICR_NFCPINS_PROTECT_Pos (0UL) /*!< Position of PROTECT field. */ -#define UICR_NFCPINS_PROTECT_Msk (0x1UL << UICR_NFCPINS_PROTECT_Pos) /*!< Bit mask of PROTECT field. */ -#define UICR_NFCPINS_PROTECT_Disabled (0UL) /*!< Operation as GPIO pins. Same protection as normal GPIO pins */ -#define UICR_NFCPINS_PROTECT_NFC (1UL) /*!< Operation as NFC antenna pins. Configures the protection for NFC operation */ - -/* Register: UICR_EXTSUPPLY */ -/* Description: Enable external circuitry to be supplied from VDD pin. Applicable in 'High voltage mode' only. */ - -/* Bit 0 : Enable external circuitry to be supplied from VDD pin (output of REG0 stage). */ -#define UICR_EXTSUPPLY_EXTSUPPLY_Pos (0UL) /*!< Position of EXTSUPPLY field. */ -#define UICR_EXTSUPPLY_EXTSUPPLY_Msk (0x1UL << UICR_EXTSUPPLY_EXTSUPPLY_Pos) /*!< Bit mask of EXTSUPPLY field. */ -#define UICR_EXTSUPPLY_EXTSUPPLY_Disabled (0UL) /*!< No current can be drawn from the VDD pin. */ -#define UICR_EXTSUPPLY_EXTSUPPLY_Enabled (1UL) /*!< It is allowed to supply external circuitry from the VDD pin. */ - -/* Register: UICR_REGOUT0 */ -/* Description: GPIO reference voltage / external output supply voltage in 'High voltage mode'. */ - -/* Bits 2..0 : Output voltage from of REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VEXDIF. */ -#define UICR_REGOUT0_VOUT_Pos (0UL) /*!< Position of VOUT field. */ -#define UICR_REGOUT0_VOUT_Msk (0x7UL << UICR_REGOUT0_VOUT_Pos) /*!< Bit mask of VOUT field. */ -#define UICR_REGOUT0_VOUT_1V8 (0UL) /*!< 1.8 V */ -#define UICR_REGOUT0_VOUT_2V1 (1UL) /*!< 2.1 V */ -#define UICR_REGOUT0_VOUT_2V4 (2UL) /*!< 2.4 V */ -#define UICR_REGOUT0_VOUT_2V7 (3UL) /*!< 2.7 V */ -#define UICR_REGOUT0_VOUT_3V0 (4UL) /*!< 3.0 V */ -#define UICR_REGOUT0_VOUT_3V3 (5UL) /*!< 3.3 V */ -#define UICR_REGOUT0_VOUT_DEFAULT (7UL) /*!< Default voltage: 1.8 V */ - - -/* Peripheral: USBD */ -/* Description: Universal Serial Bus device */ - -/* Register: USBD_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */ -#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos (4UL) /*!< Position of ENDEPOUT0_EP0RCVOUT field. */ -#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos) /*!< Bit mask of ENDEPOUT0_EP0RCVOUT field. */ -#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Disabled (0UL) /*!< Disable shortcut */ -#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between ENDEPOUT[0] event and EP0STATUS task */ -#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos (3UL) /*!< Position of ENDEPOUT0_EP0STATUS field. */ -#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos) /*!< Bit mask of ENDEPOUT0_EP0STATUS field. */ -#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */ -#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between EP0DATADONE event and EP0STATUS task */ -#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos (2UL) /*!< Position of EP0DATADONE_EP0STATUS field. */ -#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos) /*!< Bit mask of EP0DATADONE_EP0STATUS field. */ -#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */ -#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between EP0DATADONE event and STARTEPOUT[0] task */ -#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos (1UL) /*!< Position of EP0DATADONE_STARTEPOUT0 field. */ -#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPOUT0 field. */ -#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Disabled (0UL) /*!< Disable shortcut */ -#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between EP0DATADONE event and STARTEPIN[0] task */ -#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos (0UL) /*!< Position of EP0DATADONE_STARTEPIN0 field. */ -#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPIN0 field. */ -#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Disabled (0UL) /*!< Disable shortcut */ -#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: USBD_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 25 : Enable or disable interrupt for ACCESSFAULT event */ -#define USBD_INTEN_ACCESSFAULT_Pos (25UL) /*!< Position of ACCESSFAULT field. */ -#define USBD_INTEN_ACCESSFAULT_Msk (0x1UL << USBD_INTEN_ACCESSFAULT_Pos) /*!< Bit mask of ACCESSFAULT field. */ -#define USBD_INTEN_ACCESSFAULT_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ACCESSFAULT_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : Enable or disable interrupt for EPDATA event */ -#define USBD_INTEN_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ -#define USBD_INTEN_EPDATA_Msk (0x1UL << USBD_INTEN_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ -#define USBD_INTEN_EPDATA_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_EPDATA_Enabled (1UL) /*!< Enable */ - -/* Bit 23 : Enable or disable interrupt for EP0SETUP event */ -#define USBD_INTEN_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ -#define USBD_INTEN_EP0SETUP_Msk (0x1UL << USBD_INTEN_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ -#define USBD_INTEN_EP0SETUP_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_EP0SETUP_Enabled (1UL) /*!< Enable */ - -/* Bit 22 : Enable or disable interrupt for USBEVENT event */ -#define USBD_INTEN_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ -#define USBD_INTEN_USBEVENT_Msk (0x1UL << USBD_INTEN_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ -#define USBD_INTEN_USBEVENT_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_USBEVENT_Enabled (1UL) /*!< Enable */ - -/* Bit 21 : Enable or disable interrupt for SOF event */ -#define USBD_INTEN_SOF_Pos (21UL) /*!< Position of SOF field. */ -#define USBD_INTEN_SOF_Msk (0x1UL << USBD_INTEN_SOF_Pos) /*!< Bit mask of SOF field. */ -#define USBD_INTEN_SOF_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_SOF_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for ENDISOOUT event */ -#define USBD_INTEN_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ -#define USBD_INTEN_ENDISOOUT_Msk (0x1UL << USBD_INTEN_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ -#define USBD_INTEN_ENDISOOUT_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDISOOUT_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for ENDEPOUT[7] event */ -#define USBD_INTEN_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ -#define USBD_INTEN_ENDEPOUT7_Msk (0x1UL << USBD_INTEN_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ -#define USBD_INTEN_ENDEPOUT7_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT7_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for ENDEPOUT[6] event */ -#define USBD_INTEN_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ -#define USBD_INTEN_ENDEPOUT6_Msk (0x1UL << USBD_INTEN_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ -#define USBD_INTEN_ENDEPOUT6_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT6_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable interrupt for ENDEPOUT[5] event */ -#define USBD_INTEN_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ -#define USBD_INTEN_ENDEPOUT5_Msk (0x1UL << USBD_INTEN_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ -#define USBD_INTEN_ENDEPOUT5_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT5_Enabled (1UL) /*!< Enable */ - -/* Bit 16 : Enable or disable interrupt for ENDEPOUT[4] event */ -#define USBD_INTEN_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ -#define USBD_INTEN_ENDEPOUT4_Msk (0x1UL << USBD_INTEN_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ -#define USBD_INTEN_ENDEPOUT4_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT4_Enabled (1UL) /*!< Enable */ - -/* Bit 15 : Enable or disable interrupt for ENDEPOUT[3] event */ -#define USBD_INTEN_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ -#define USBD_INTEN_ENDEPOUT3_Msk (0x1UL << USBD_INTEN_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ -#define USBD_INTEN_ENDEPOUT3_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT3_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for ENDEPOUT[2] event */ -#define USBD_INTEN_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ -#define USBD_INTEN_ENDEPOUT2_Msk (0x1UL << USBD_INTEN_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ -#define USBD_INTEN_ENDEPOUT2_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT2_Enabled (1UL) /*!< Enable */ - -/* Bit 13 : Enable or disable interrupt for ENDEPOUT[1] event */ -#define USBD_INTEN_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ -#define USBD_INTEN_ENDEPOUT1_Msk (0x1UL << USBD_INTEN_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ -#define USBD_INTEN_ENDEPOUT1_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT1_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for ENDEPOUT[0] event */ -#define USBD_INTEN_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ -#define USBD_INTEN_ENDEPOUT0_Msk (0x1UL << USBD_INTEN_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ -#define USBD_INTEN_ENDEPOUT0_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPOUT0_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for ENDISOIN event */ -#define USBD_INTEN_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ -#define USBD_INTEN_ENDISOIN_Msk (0x1UL << USBD_INTEN_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ -#define USBD_INTEN_ENDISOIN_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDISOIN_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for EP0DATADONE event */ -#define USBD_INTEN_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ -#define USBD_INTEN_EP0DATADONE_Msk (0x1UL << USBD_INTEN_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ -#define USBD_INTEN_EP0DATADONE_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_EP0DATADONE_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ENDEPIN[7] event */ -#define USBD_INTEN_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ -#define USBD_INTEN_ENDEPIN7_Msk (0x1UL << USBD_INTEN_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ -#define USBD_INTEN_ENDEPIN7_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN7_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for ENDEPIN[6] event */ -#define USBD_INTEN_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ -#define USBD_INTEN_ENDEPIN6_Msk (0x1UL << USBD_INTEN_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ -#define USBD_INTEN_ENDEPIN6_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN6_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for ENDEPIN[5] event */ -#define USBD_INTEN_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ -#define USBD_INTEN_ENDEPIN5_Msk (0x1UL << USBD_INTEN_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ -#define USBD_INTEN_ENDEPIN5_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN5_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for ENDEPIN[4] event */ -#define USBD_INTEN_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ -#define USBD_INTEN_ENDEPIN4_Msk (0x1UL << USBD_INTEN_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ -#define USBD_INTEN_ENDEPIN4_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN4_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for ENDEPIN[3] event */ -#define USBD_INTEN_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ -#define USBD_INTEN_ENDEPIN3_Msk (0x1UL << USBD_INTEN_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ -#define USBD_INTEN_ENDEPIN3_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN3_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for ENDEPIN[2] event */ -#define USBD_INTEN_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ -#define USBD_INTEN_ENDEPIN2_Msk (0x1UL << USBD_INTEN_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ -#define USBD_INTEN_ENDEPIN2_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN2_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for ENDEPIN[1] event */ -#define USBD_INTEN_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ -#define USBD_INTEN_ENDEPIN1_Msk (0x1UL << USBD_INTEN_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ -#define USBD_INTEN_ENDEPIN1_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN1_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for ENDEPIN[0] event */ -#define USBD_INTEN_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ -#define USBD_INTEN_ENDEPIN0_Msk (0x1UL << USBD_INTEN_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ -#define USBD_INTEN_ENDEPIN0_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_ENDEPIN0_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STARTED event */ -#define USBD_INTEN_STARTED_Pos (1UL) /*!< Position of STARTED field. */ -#define USBD_INTEN_STARTED_Msk (0x1UL << USBD_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define USBD_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for USBRESET event */ -#define USBD_INTEN_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ -#define USBD_INTEN_USBRESET_Msk (0x1UL << USBD_INTEN_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ -#define USBD_INTEN_USBRESET_Disabled (0UL) /*!< Disable */ -#define USBD_INTEN_USBRESET_Enabled (1UL) /*!< Enable */ - -/* Register: USBD_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 25 : Write '1' to Enable interrupt for ACCESSFAULT event */ -#define USBD_INTENSET_ACCESSFAULT_Pos (25UL) /*!< Position of ACCESSFAULT field. */ -#define USBD_INTENSET_ACCESSFAULT_Msk (0x1UL << USBD_INTENSET_ACCESSFAULT_Pos) /*!< Bit mask of ACCESSFAULT field. */ -#define USBD_INTENSET_ACCESSFAULT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ACCESSFAULT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ACCESSFAULT_Set (1UL) /*!< Enable */ - -/* Bit 24 : Write '1' to Enable interrupt for EPDATA event */ -#define USBD_INTENSET_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ -#define USBD_INTENSET_EPDATA_Msk (0x1UL << USBD_INTENSET_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ -#define USBD_INTENSET_EPDATA_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_EPDATA_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_EPDATA_Set (1UL) /*!< Enable */ - -/* Bit 23 : Write '1' to Enable interrupt for EP0SETUP event */ -#define USBD_INTENSET_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ -#define USBD_INTENSET_EP0SETUP_Msk (0x1UL << USBD_INTENSET_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ -#define USBD_INTENSET_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_EP0SETUP_Set (1UL) /*!< Enable */ - -/* Bit 22 : Write '1' to Enable interrupt for USBEVENT event */ -#define USBD_INTENSET_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ -#define USBD_INTENSET_USBEVENT_Msk (0x1UL << USBD_INTENSET_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ -#define USBD_INTENSET_USBEVENT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_USBEVENT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_USBEVENT_Set (1UL) /*!< Enable */ - -/* Bit 21 : Write '1' to Enable interrupt for SOF event */ -#define USBD_INTENSET_SOF_Pos (21UL) /*!< Position of SOF field. */ -#define USBD_INTENSET_SOF_Msk (0x1UL << USBD_INTENSET_SOF_Pos) /*!< Bit mask of SOF field. */ -#define USBD_INTENSET_SOF_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_SOF_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_SOF_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for ENDISOOUT event */ -#define USBD_INTENSET_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ -#define USBD_INTENSET_ENDISOOUT_Msk (0x1UL << USBD_INTENSET_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ -#define USBD_INTENSET_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDISOOUT_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for ENDEPOUT[7] event */ -#define USBD_INTENSET_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ -#define USBD_INTENSET_ENDEPOUT7_Msk (0x1UL << USBD_INTENSET_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ -#define USBD_INTENSET_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT7_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for ENDEPOUT[6] event */ -#define USBD_INTENSET_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ -#define USBD_INTENSET_ENDEPOUT6_Msk (0x1UL << USBD_INTENSET_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ -#define USBD_INTENSET_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT6_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for ENDEPOUT[5] event */ -#define USBD_INTENSET_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ -#define USBD_INTENSET_ENDEPOUT5_Msk (0x1UL << USBD_INTENSET_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ -#define USBD_INTENSET_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT5_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for ENDEPOUT[4] event */ -#define USBD_INTENSET_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ -#define USBD_INTENSET_ENDEPOUT4_Msk (0x1UL << USBD_INTENSET_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ -#define USBD_INTENSET_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT4_Set (1UL) /*!< Enable */ - -/* Bit 15 : Write '1' to Enable interrupt for ENDEPOUT[3] event */ -#define USBD_INTENSET_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ -#define USBD_INTENSET_ENDEPOUT3_Msk (0x1UL << USBD_INTENSET_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ -#define USBD_INTENSET_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT3_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for ENDEPOUT[2] event */ -#define USBD_INTENSET_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ -#define USBD_INTENSET_ENDEPOUT2_Msk (0x1UL << USBD_INTENSET_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ -#define USBD_INTENSET_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT2_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for ENDEPOUT[1] event */ -#define USBD_INTENSET_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ -#define USBD_INTENSET_ENDEPOUT1_Msk (0x1UL << USBD_INTENSET_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ -#define USBD_INTENSET_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT1_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for ENDEPOUT[0] event */ -#define USBD_INTENSET_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ -#define USBD_INTENSET_ENDEPOUT0_Msk (0x1UL << USBD_INTENSET_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ -#define USBD_INTENSET_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPOUT0_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for ENDISOIN event */ -#define USBD_INTENSET_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ -#define USBD_INTENSET_ENDISOIN_Msk (0x1UL << USBD_INTENSET_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ -#define USBD_INTENSET_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDISOIN_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for EP0DATADONE event */ -#define USBD_INTENSET_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ -#define USBD_INTENSET_EP0DATADONE_Msk (0x1UL << USBD_INTENSET_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ -#define USBD_INTENSET_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_EP0DATADONE_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ENDEPIN[7] event */ -#define USBD_INTENSET_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ -#define USBD_INTENSET_ENDEPIN7_Msk (0x1UL << USBD_INTENSET_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ -#define USBD_INTENSET_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN7_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for ENDEPIN[6] event */ -#define USBD_INTENSET_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ -#define USBD_INTENSET_ENDEPIN6_Msk (0x1UL << USBD_INTENSET_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ -#define USBD_INTENSET_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN6_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for ENDEPIN[5] event */ -#define USBD_INTENSET_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ -#define USBD_INTENSET_ENDEPIN5_Msk (0x1UL << USBD_INTENSET_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ -#define USBD_INTENSET_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN5_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for ENDEPIN[4] event */ -#define USBD_INTENSET_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ -#define USBD_INTENSET_ENDEPIN4_Msk (0x1UL << USBD_INTENSET_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ -#define USBD_INTENSET_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN4_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for ENDEPIN[3] event */ -#define USBD_INTENSET_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ -#define USBD_INTENSET_ENDEPIN3_Msk (0x1UL << USBD_INTENSET_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ -#define USBD_INTENSET_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN3_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDEPIN[2] event */ -#define USBD_INTENSET_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ -#define USBD_INTENSET_ENDEPIN2_Msk (0x1UL << USBD_INTENSET_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ -#define USBD_INTENSET_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN2_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for ENDEPIN[1] event */ -#define USBD_INTENSET_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ -#define USBD_INTENSET_ENDEPIN1_Msk (0x1UL << USBD_INTENSET_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ -#define USBD_INTENSET_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN1_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for ENDEPIN[0] event */ -#define USBD_INTENSET_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ -#define USBD_INTENSET_ENDEPIN0_Msk (0x1UL << USBD_INTENSET_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ -#define USBD_INTENSET_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_ENDEPIN0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STARTED event */ -#define USBD_INTENSET_STARTED_Pos (1UL) /*!< Position of STARTED field. */ -#define USBD_INTENSET_STARTED_Msk (0x1UL << USBD_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define USBD_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for USBRESET event */ -#define USBD_INTENSET_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ -#define USBD_INTENSET_USBRESET_Msk (0x1UL << USBD_INTENSET_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ -#define USBD_INTENSET_USBRESET_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENSET_USBRESET_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENSET_USBRESET_Set (1UL) /*!< Enable */ - -/* Register: USBD_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 25 : Write '1' to Disable interrupt for ACCESSFAULT event */ -#define USBD_INTENCLR_ACCESSFAULT_Pos (25UL) /*!< Position of ACCESSFAULT field. */ -#define USBD_INTENCLR_ACCESSFAULT_Msk (0x1UL << USBD_INTENCLR_ACCESSFAULT_Pos) /*!< Bit mask of ACCESSFAULT field. */ -#define USBD_INTENCLR_ACCESSFAULT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ACCESSFAULT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ACCESSFAULT_Clear (1UL) /*!< Disable */ - -/* Bit 24 : Write '1' to Disable interrupt for EPDATA event */ -#define USBD_INTENCLR_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ -#define USBD_INTENCLR_EPDATA_Msk (0x1UL << USBD_INTENCLR_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ -#define USBD_INTENCLR_EPDATA_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_EPDATA_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_EPDATA_Clear (1UL) /*!< Disable */ - -/* Bit 23 : Write '1' to Disable interrupt for EP0SETUP event */ -#define USBD_INTENCLR_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ -#define USBD_INTENCLR_EP0SETUP_Msk (0x1UL << USBD_INTENCLR_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ -#define USBD_INTENCLR_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_EP0SETUP_Clear (1UL) /*!< Disable */ - -/* Bit 22 : Write '1' to Disable interrupt for USBEVENT event */ -#define USBD_INTENCLR_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ -#define USBD_INTENCLR_USBEVENT_Msk (0x1UL << USBD_INTENCLR_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ -#define USBD_INTENCLR_USBEVENT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_USBEVENT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_USBEVENT_Clear (1UL) /*!< Disable */ - -/* Bit 21 : Write '1' to Disable interrupt for SOF event */ -#define USBD_INTENCLR_SOF_Pos (21UL) /*!< Position of SOF field. */ -#define USBD_INTENCLR_SOF_Msk (0x1UL << USBD_INTENCLR_SOF_Pos) /*!< Bit mask of SOF field. */ -#define USBD_INTENCLR_SOF_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_SOF_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_SOF_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for ENDISOOUT event */ -#define USBD_INTENCLR_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ -#define USBD_INTENCLR_ENDISOOUT_Msk (0x1UL << USBD_INTENCLR_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ -#define USBD_INTENCLR_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDISOOUT_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for ENDEPOUT[7] event */ -#define USBD_INTENCLR_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ -#define USBD_INTENCLR_ENDEPOUT7_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ -#define USBD_INTENCLR_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT7_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for ENDEPOUT[6] event */ -#define USBD_INTENCLR_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ -#define USBD_INTENCLR_ENDEPOUT6_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ -#define USBD_INTENCLR_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT6_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for ENDEPOUT[5] event */ -#define USBD_INTENCLR_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ -#define USBD_INTENCLR_ENDEPOUT5_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ -#define USBD_INTENCLR_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT5_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for ENDEPOUT[4] event */ -#define USBD_INTENCLR_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ -#define USBD_INTENCLR_ENDEPOUT4_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ -#define USBD_INTENCLR_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT4_Clear (1UL) /*!< Disable */ - -/* Bit 15 : Write '1' to Disable interrupt for ENDEPOUT[3] event */ -#define USBD_INTENCLR_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ -#define USBD_INTENCLR_ENDEPOUT3_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ -#define USBD_INTENCLR_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT3_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for ENDEPOUT[2] event */ -#define USBD_INTENCLR_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ -#define USBD_INTENCLR_ENDEPOUT2_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ -#define USBD_INTENCLR_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT2_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for ENDEPOUT[1] event */ -#define USBD_INTENCLR_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ -#define USBD_INTENCLR_ENDEPOUT1_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ -#define USBD_INTENCLR_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT1_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for ENDEPOUT[0] event */ -#define USBD_INTENCLR_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ -#define USBD_INTENCLR_ENDEPOUT0_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ -#define USBD_INTENCLR_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPOUT0_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for ENDISOIN event */ -#define USBD_INTENCLR_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ -#define USBD_INTENCLR_ENDISOIN_Msk (0x1UL << USBD_INTENCLR_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ -#define USBD_INTENCLR_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDISOIN_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for EP0DATADONE event */ -#define USBD_INTENCLR_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ -#define USBD_INTENCLR_EP0DATADONE_Msk (0x1UL << USBD_INTENCLR_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ -#define USBD_INTENCLR_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_EP0DATADONE_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ENDEPIN[7] event */ -#define USBD_INTENCLR_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ -#define USBD_INTENCLR_ENDEPIN7_Msk (0x1UL << USBD_INTENCLR_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ -#define USBD_INTENCLR_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN7_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for ENDEPIN[6] event */ -#define USBD_INTENCLR_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ -#define USBD_INTENCLR_ENDEPIN6_Msk (0x1UL << USBD_INTENCLR_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ -#define USBD_INTENCLR_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN6_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for ENDEPIN[5] event */ -#define USBD_INTENCLR_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ -#define USBD_INTENCLR_ENDEPIN5_Msk (0x1UL << USBD_INTENCLR_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ -#define USBD_INTENCLR_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN5_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for ENDEPIN[4] event */ -#define USBD_INTENCLR_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ -#define USBD_INTENCLR_ENDEPIN4_Msk (0x1UL << USBD_INTENCLR_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ -#define USBD_INTENCLR_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN4_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for ENDEPIN[3] event */ -#define USBD_INTENCLR_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ -#define USBD_INTENCLR_ENDEPIN3_Msk (0x1UL << USBD_INTENCLR_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ -#define USBD_INTENCLR_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN3_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDEPIN[2] event */ -#define USBD_INTENCLR_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ -#define USBD_INTENCLR_ENDEPIN2_Msk (0x1UL << USBD_INTENCLR_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ -#define USBD_INTENCLR_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN2_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for ENDEPIN[1] event */ -#define USBD_INTENCLR_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ -#define USBD_INTENCLR_ENDEPIN1_Msk (0x1UL << USBD_INTENCLR_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ -#define USBD_INTENCLR_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN1_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for ENDEPIN[0] event */ -#define USBD_INTENCLR_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ -#define USBD_INTENCLR_ENDEPIN0_Msk (0x1UL << USBD_INTENCLR_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ -#define USBD_INTENCLR_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_ENDEPIN0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STARTED event */ -#define USBD_INTENCLR_STARTED_Pos (1UL) /*!< Position of STARTED field. */ -#define USBD_INTENCLR_STARTED_Msk (0x1UL << USBD_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define USBD_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for USBRESET event */ -#define USBD_INTENCLR_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ -#define USBD_INTENCLR_USBRESET_Msk (0x1UL << USBD_INTENCLR_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ -#define USBD_INTENCLR_USBRESET_Disabled (0UL) /*!< Read: Disabled */ -#define USBD_INTENCLR_USBRESET_Enabled (1UL) /*!< Read: Enabled */ -#define USBD_INTENCLR_USBRESET_Clear (1UL) /*!< Disable */ - -/* Register: USBD_EVENTCAUSE */ -/* Description: Details on event that caused the USBEVENT event */ - -/* Bit 11 : Wrapper has re-initialized SFRs to the proper values. MAC is ready for normal operation. Write '1' to clear. */ -#define USBD_EVENTCAUSE_READY_Pos (11UL) /*!< Position of READY field. */ -#define USBD_EVENTCAUSE_READY_Msk (0x1UL << USBD_EVENTCAUSE_READY_Pos) /*!< Bit mask of READY field. */ -#define USBD_EVENTCAUSE_READY_NotDetected (0UL) /*!< USBEVENT was not issued due to USBD peripheral ready */ -#define USBD_EVENTCAUSE_READY_Ready (1UL) /*!< USBD peripheral is ready */ - -/* Bit 9 : Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines. Write '1' to clear. */ -#define USBD_EVENTCAUSE_RESUME_Pos (9UL) /*!< Position of RESUME field. */ -#define USBD_EVENTCAUSE_RESUME_Msk (0x1UL << USBD_EVENTCAUSE_RESUME_Pos) /*!< Bit mask of RESUME field. */ -#define USBD_EVENTCAUSE_RESUME_NotDetected (0UL) /*!< Resume not detected */ -#define USBD_EVENTCAUSE_RESUME_Detected (1UL) /*!< Resume detected */ - -/* Bit 8 : Signals that the USB lines have been seen idle long enough for the device to enter suspend. Write '1' to clear. */ -#define USBD_EVENTCAUSE_SUSPEND_Pos (8UL) /*!< Position of SUSPEND field. */ -#define USBD_EVENTCAUSE_SUSPEND_Msk (0x1UL << USBD_EVENTCAUSE_SUSPEND_Pos) /*!< Bit mask of SUSPEND field. */ -#define USBD_EVENTCAUSE_SUSPEND_NotDetected (0UL) /*!< Suspend not detected */ -#define USBD_EVENTCAUSE_SUSPEND_Detected (1UL) /*!< Suspend detected */ - -/* Bit 0 : CRC error was detected on isochronous OUT endpoint 8. Write '1' to clear. */ -#define USBD_EVENTCAUSE_ISOOUTCRC_Pos (0UL) /*!< Position of ISOOUTCRC field. */ -#define USBD_EVENTCAUSE_ISOOUTCRC_Msk (0x1UL << USBD_EVENTCAUSE_ISOOUTCRC_Pos) /*!< Bit mask of ISOOUTCRC field. */ -#define USBD_EVENTCAUSE_ISOOUTCRC_NotDetected (0UL) /*!< No error detected */ -#define USBD_EVENTCAUSE_ISOOUTCRC_Detected (1UL) /*!< Error detected */ - -/* Register: USBD_BUSSTATE */ -/* Description: Provides the logic state of the D+ and D- lines */ - -/* Bit 1 : State of the D+ line */ -#define USBD_BUSSTATE_DP_Pos (1UL) /*!< Position of DP field. */ -#define USBD_BUSSTATE_DP_Msk (0x1UL << USBD_BUSSTATE_DP_Pos) /*!< Bit mask of DP field. */ -#define USBD_BUSSTATE_DP_Low (0UL) /*!< Low */ -#define USBD_BUSSTATE_DP_High (1UL) /*!< High */ - -/* Bit 0 : State of the D- line */ -#define USBD_BUSSTATE_DM_Pos (0UL) /*!< Position of DM field. */ -#define USBD_BUSSTATE_DM_Msk (0x1UL << USBD_BUSSTATE_DM_Pos) /*!< Bit mask of DM field. */ -#define USBD_BUSSTATE_DM_Low (0UL) /*!< Low */ -#define USBD_BUSSTATE_DM_High (1UL) /*!< High */ - -/* Register: USBD_HALTED_EPIN */ -/* Description: Description collection[0]: IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ - -/* Bits 15..0 : IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ -#define USBD_HALTED_EPIN_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */ -#define USBD_HALTED_EPIN_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPIN_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */ -#define USBD_HALTED_EPIN_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */ -#define USBD_HALTED_EPIN_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */ - -/* Register: USBD_HALTED_EPOUT */ -/* Description: Description collection[0]: OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ - -/* Bits 15..0 : OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ -#define USBD_HALTED_EPOUT_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */ -#define USBD_HALTED_EPOUT_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPOUT_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */ -#define USBD_HALTED_EPOUT_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */ -#define USBD_HALTED_EPOUT_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */ - -/* Register: USBD_EPSTATUS */ -/* Description: Provides information on which endpoint's EasyDMA registers have been captured */ - -/* Bit 24 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT8_Pos (24UL) /*!< Position of EPOUT8 field. */ -#define USBD_EPSTATUS_EPOUT8_Msk (0x1UL << USBD_EPSTATUS_EPOUT8_Pos) /*!< Bit mask of EPOUT8 field. */ -#define USBD_EPSTATUS_EPOUT8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 23 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */ -#define USBD_EPSTATUS_EPOUT7_Msk (0x1UL << USBD_EPSTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */ -#define USBD_EPSTATUS_EPOUT7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 22 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */ -#define USBD_EPSTATUS_EPOUT6_Msk (0x1UL << USBD_EPSTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */ -#define USBD_EPSTATUS_EPOUT6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 21 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */ -#define USBD_EPSTATUS_EPOUT5_Msk (0x1UL << USBD_EPSTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */ -#define USBD_EPSTATUS_EPOUT5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 20 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */ -#define USBD_EPSTATUS_EPOUT4_Msk (0x1UL << USBD_EPSTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */ -#define USBD_EPSTATUS_EPOUT4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 19 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */ -#define USBD_EPSTATUS_EPOUT3_Msk (0x1UL << USBD_EPSTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */ -#define USBD_EPSTATUS_EPOUT3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 18 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */ -#define USBD_EPSTATUS_EPOUT2_Msk (0x1UL << USBD_EPSTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */ -#define USBD_EPSTATUS_EPOUT2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 17 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */ -#define USBD_EPSTATUS_EPOUT1_Msk (0x1UL << USBD_EPSTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */ -#define USBD_EPSTATUS_EPOUT1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 16 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPOUT0_Pos (16UL) /*!< Position of EPOUT0 field. */ -#define USBD_EPSTATUS_EPOUT0_Msk (0x1UL << USBD_EPSTATUS_EPOUT0_Pos) /*!< Bit mask of EPOUT0 field. */ -#define USBD_EPSTATUS_EPOUT0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPOUT0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 8 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN8_Pos (8UL) /*!< Position of EPIN8 field. */ -#define USBD_EPSTATUS_EPIN8_Msk (0x1UL << USBD_EPSTATUS_EPIN8_Pos) /*!< Bit mask of EPIN8 field. */ -#define USBD_EPSTATUS_EPIN8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 7 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */ -#define USBD_EPSTATUS_EPIN7_Msk (0x1UL << USBD_EPSTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */ -#define USBD_EPSTATUS_EPIN7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 6 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */ -#define USBD_EPSTATUS_EPIN6_Msk (0x1UL << USBD_EPSTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */ -#define USBD_EPSTATUS_EPIN6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 5 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */ -#define USBD_EPSTATUS_EPIN5_Msk (0x1UL << USBD_EPSTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */ -#define USBD_EPSTATUS_EPIN5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 4 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */ -#define USBD_EPSTATUS_EPIN4_Msk (0x1UL << USBD_EPSTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */ -#define USBD_EPSTATUS_EPIN4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 3 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */ -#define USBD_EPSTATUS_EPIN3_Msk (0x1UL << USBD_EPSTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */ -#define USBD_EPSTATUS_EPIN3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 2 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */ -#define USBD_EPSTATUS_EPIN2_Msk (0x1UL << USBD_EPSTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */ -#define USBD_EPSTATUS_EPIN2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 1 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */ -#define USBD_EPSTATUS_EPIN1_Msk (0x1UL << USBD_EPSTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */ -#define USBD_EPSTATUS_EPIN1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Bit 0 : Endpoint's EasyDMA registers captured state. Write '1' to clear. */ -#define USBD_EPSTATUS_EPIN0_Pos (0UL) /*!< Position of EPIN0 field. */ -#define USBD_EPSTATUS_EPIN0_Msk (0x1UL << USBD_EPSTATUS_EPIN0_Pos) /*!< Bit mask of EPIN0 field. */ -#define USBD_EPSTATUS_EPIN0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ -#define USBD_EPSTATUS_EPIN0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ - -/* Register: USBD_EPDATASTATUS */ -/* Description: Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event) */ - -/* Bit 23 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */ -#define USBD_EPDATASTATUS_EPOUT7_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */ -#define USBD_EPDATASTATUS_EPOUT7_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT7_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 22 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */ -#define USBD_EPDATASTATUS_EPOUT6_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */ -#define USBD_EPDATASTATUS_EPOUT6_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT6_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 21 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */ -#define USBD_EPDATASTATUS_EPOUT5_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */ -#define USBD_EPDATASTATUS_EPOUT5_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT5_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 20 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */ -#define USBD_EPDATASTATUS_EPOUT4_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */ -#define USBD_EPDATASTATUS_EPOUT4_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT4_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 19 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */ -#define USBD_EPDATASTATUS_EPOUT3_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */ -#define USBD_EPDATASTATUS_EPOUT3_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT3_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 18 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */ -#define USBD_EPDATASTATUS_EPOUT2_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */ -#define USBD_EPDATASTATUS_EPOUT2_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT2_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 17 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */ -#define USBD_EPDATASTATUS_EPOUT1_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */ -#define USBD_EPDATASTATUS_EPOUT1_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPOUT1_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 7 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */ -#define USBD_EPDATASTATUS_EPIN7_Msk (0x1UL << USBD_EPDATASTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */ -#define USBD_EPDATASTATUS_EPIN7_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN7_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 6 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */ -#define USBD_EPDATASTATUS_EPIN6_Msk (0x1UL << USBD_EPDATASTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */ -#define USBD_EPDATASTATUS_EPIN6_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN6_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 5 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */ -#define USBD_EPDATASTATUS_EPIN5_Msk (0x1UL << USBD_EPDATASTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */ -#define USBD_EPDATASTATUS_EPIN5_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN5_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 4 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */ -#define USBD_EPDATASTATUS_EPIN4_Msk (0x1UL << USBD_EPDATASTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */ -#define USBD_EPDATASTATUS_EPIN4_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN4_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 3 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */ -#define USBD_EPDATASTATUS_EPIN3_Msk (0x1UL << USBD_EPDATASTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */ -#define USBD_EPDATASTATUS_EPIN3_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN3_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 2 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */ -#define USBD_EPDATASTATUS_EPIN2_Msk (0x1UL << USBD_EPDATASTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */ -#define USBD_EPDATASTATUS_EPIN2_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN2_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Bit 1 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ -#define USBD_EPDATASTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */ -#define USBD_EPDATASTATUS_EPIN1_Msk (0x1UL << USBD_EPDATASTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */ -#define USBD_EPDATASTATUS_EPIN1_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ -#define USBD_EPDATASTATUS_EPIN1_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ - -/* Register: USBD_USBADDR */ -/* Description: Device USB address */ - -/* Bits 6..0 : Device USB address */ -#define USBD_USBADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */ -#define USBD_USBADDR_ADDR_Msk (0x7FUL << USBD_USBADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */ - -/* Register: USBD_BMREQUESTTYPE */ -/* Description: SETUP data, byte 0, bmRequestType */ - -/* Bit 7 : Data transfer direction */ -#define USBD_BMREQUESTTYPE_DIRECTION_Pos (7UL) /*!< Position of DIRECTION field. */ -#define USBD_BMREQUESTTYPE_DIRECTION_Msk (0x1UL << USBD_BMREQUESTTYPE_DIRECTION_Pos) /*!< Bit mask of DIRECTION field. */ -#define USBD_BMREQUESTTYPE_DIRECTION_HostToDevice (0UL) /*!< Host-to-device */ -#define USBD_BMREQUESTTYPE_DIRECTION_DeviceToHost (1UL) /*!< Device-to-host */ - -/* Bits 6..5 : Data transfer type */ -#define USBD_BMREQUESTTYPE_TYPE_Pos (5UL) /*!< Position of TYPE field. */ -#define USBD_BMREQUESTTYPE_TYPE_Msk (0x3UL << USBD_BMREQUESTTYPE_TYPE_Pos) /*!< Bit mask of TYPE field. */ -#define USBD_BMREQUESTTYPE_TYPE_Standard (0UL) /*!< Standard */ -#define USBD_BMREQUESTTYPE_TYPE_Class (1UL) /*!< Class */ -#define USBD_BMREQUESTTYPE_TYPE_Vendor (2UL) /*!< Vendor */ - -/* Bits 4..0 : Data transfer type */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Pos (0UL) /*!< Position of RECIPIENT field. */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Msk (0x1FUL << USBD_BMREQUESTTYPE_RECIPIENT_Pos) /*!< Bit mask of RECIPIENT field. */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Device (0UL) /*!< Device */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Interface (1UL) /*!< Interface */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Endpoint (2UL) /*!< Endpoint */ -#define USBD_BMREQUESTTYPE_RECIPIENT_Other (3UL) /*!< Other */ - -/* Register: USBD_BREQUEST */ -/* Description: SETUP data, byte 1, bRequest */ - -/* Bits 7..0 : SETUP data, byte 1, bRequest. Values provides for standard requests only, user must implement Class and Vendor values. */ -#define USBD_BREQUEST_BREQUEST_Pos (0UL) /*!< Position of BREQUEST field. */ -#define USBD_BREQUEST_BREQUEST_Msk (0xFFUL << USBD_BREQUEST_BREQUEST_Pos) /*!< Bit mask of BREQUEST field. */ -#define USBD_BREQUEST_BREQUEST_STD_GET_STATUS (0UL) /*!< Standard request GET_STATUS */ -#define USBD_BREQUEST_BREQUEST_STD_CLEAR_FEATURE (1UL) /*!< Standard request CLEAR_FEATURE */ -#define USBD_BREQUEST_BREQUEST_STD_SET_FEATURE (3UL) /*!< Standard request SET_FEATURE */ -#define USBD_BREQUEST_BREQUEST_STD_SET_ADDRESS (5UL) /*!< Standard request SET_ADDRESS */ -#define USBD_BREQUEST_BREQUEST_STD_GET_DESCRIPTOR (6UL) /*!< Standard request GET_DESCRIPTOR */ -#define USBD_BREQUEST_BREQUEST_STD_SET_DESCRIPTOR (7UL) /*!< Standard request SET_DESCRIPTOR */ -#define USBD_BREQUEST_BREQUEST_STD_GET_CONFIGURATION (8UL) /*!< Standard request GET_CONFIGURATION */ -#define USBD_BREQUEST_BREQUEST_STD_SET_CONFIGURATION (9UL) /*!< Standard request SET_CONFIGURATION */ -#define USBD_BREQUEST_BREQUEST_STD_GET_INTERFACE (10UL) /*!< Standard request GET_INTERFACE */ -#define USBD_BREQUEST_BREQUEST_STD_SET_INTERFACE (11UL) /*!< Standard request SET_INTERFACE */ -#define USBD_BREQUEST_BREQUEST_STD_SYNCH_FRAME (12UL) /*!< Standard request SYNCH_FRAME */ - -/* Register: USBD_WVALUEL */ -/* Description: SETUP data, byte 2, LSB of wValue */ - -/* Bits 7..0 : SETUP data, byte 2, LSB of wValue */ -#define USBD_WVALUEL_WVALUEL_Pos (0UL) /*!< Position of WVALUEL field. */ -#define USBD_WVALUEL_WVALUEL_Msk (0xFFUL << USBD_WVALUEL_WVALUEL_Pos) /*!< Bit mask of WVALUEL field. */ - -/* Register: USBD_WVALUEH */ -/* Description: SETUP data, byte 3, MSB of wValue */ - -/* Bits 7..0 : SETUP data, byte 3, MSB of wValue */ -#define USBD_WVALUEH_WVALUEH_Pos (0UL) /*!< Position of WVALUEH field. */ -#define USBD_WVALUEH_WVALUEH_Msk (0xFFUL << USBD_WVALUEH_WVALUEH_Pos) /*!< Bit mask of WVALUEH field. */ - -/* Register: USBD_WINDEXL */ -/* Description: SETUP data, byte 4, LSB of wIndex */ - -/* Bits 7..0 : SETUP data, byte 4, LSB of wIndex */ -#define USBD_WINDEXL_WINDEXL_Pos (0UL) /*!< Position of WINDEXL field. */ -#define USBD_WINDEXL_WINDEXL_Msk (0xFFUL << USBD_WINDEXL_WINDEXL_Pos) /*!< Bit mask of WINDEXL field. */ - -/* Register: USBD_WINDEXH */ -/* Description: SETUP data, byte 5, MSB of wIndex */ - -/* Bits 7..0 : SETUP data, byte 5, MSB of wIndex */ -#define USBD_WINDEXH_WINDEXH_Pos (0UL) /*!< Position of WINDEXH field. */ -#define USBD_WINDEXH_WINDEXH_Msk (0xFFUL << USBD_WINDEXH_WINDEXH_Pos) /*!< Bit mask of WINDEXH field. */ - -/* Register: USBD_WLENGTHL */ -/* Description: SETUP data, byte 6, LSB of wLength */ - -/* Bits 7..0 : SETUP data, byte 6, LSB of wLength */ -#define USBD_WLENGTHL_WLENGTHL_Pos (0UL) /*!< Position of WLENGTHL field. */ -#define USBD_WLENGTHL_WLENGTHL_Msk (0xFFUL << USBD_WLENGTHL_WLENGTHL_Pos) /*!< Bit mask of WLENGTHL field. */ - -/* Register: USBD_WLENGTHH */ -/* Description: SETUP data, byte 7, MSB of wLength */ - -/* Bits 7..0 : SETUP data, byte 7, MSB of wLength */ -#define USBD_WLENGTHH_WLENGTHH_Pos (0UL) /*!< Position of WLENGTHH field. */ -#define USBD_WLENGTHH_WLENGTHH_Msk (0xFFUL << USBD_WLENGTHH_WLENGTHH_Pos) /*!< Bit mask of WLENGTHH field. */ - -/* Register: USBD_SIZE_EPOUT */ -/* Description: Description collection[0]: Amount of bytes received last in the data stage of this OUT endpoint */ - -/* Bits 6..0 : Amount of bytes received last in the data stage of this OUT endpoint */ -#define USBD_SIZE_EPOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */ -#define USBD_SIZE_EPOUT_SIZE_Msk (0x7FUL << USBD_SIZE_EPOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */ - -/* Register: USBD_SIZE_ISOOUT */ -/* Description: Amount of bytes received last on this iso OUT data endpoint */ - -/* Bit 16 : Zero-length data packet received */ -#define USBD_SIZE_ISOOUT_ZERO_Pos (16UL) /*!< Position of ZERO field. */ -#define USBD_SIZE_ISOOUT_ZERO_Msk (0x1UL << USBD_SIZE_ISOOUT_ZERO_Pos) /*!< Bit mask of ZERO field. */ -#define USBD_SIZE_ISOOUT_ZERO_Normal (0UL) /*!< No zero-length data received, use value in SIZE */ -#define USBD_SIZE_ISOOUT_ZERO_ZeroData (1UL) /*!< Zero-length data received, ignore value in SIZE */ - -/* Bits 9..0 : Amount of bytes received last on this iso OUT data endpoint */ -#define USBD_SIZE_ISOOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */ -#define USBD_SIZE_ISOOUT_SIZE_Msk (0x3FFUL << USBD_SIZE_ISOOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */ - -/* Register: USBD_ENABLE */ -/* Description: Enable USB */ - -/* Bit 0 : Enable USB */ -#define USBD_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define USBD_ENABLE_ENABLE_Msk (0x1UL << USBD_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define USBD_ENABLE_ENABLE_Disabled (0UL) /*!< USB peripheral is disabled */ -#define USBD_ENABLE_ENABLE_Enabled (1UL) /*!< USB peripheral is enabled */ - -/* Register: USBD_USBPULLUP */ -/* Description: Control of the USB pull-up */ - -/* Bit 0 : Control of the USB pull-up on the D+ line */ -#define USBD_USBPULLUP_CONNECT_Pos (0UL) /*!< Position of CONNECT field. */ -#define USBD_USBPULLUP_CONNECT_Msk (0x1UL << USBD_USBPULLUP_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define USBD_USBPULLUP_CONNECT_Disabled (0UL) /*!< Pull-up is disconnected */ -#define USBD_USBPULLUP_CONNECT_Enabled (1UL) /*!< Pull-up is connected to D+ */ - -/* Register: USBD_DPDMVALUE */ -/* Description: State at which the DPDMDRIVE task will force D+ and D-. The DPDMNODRIVE task reverts the control of the lines to MAC IP (no forcing). */ - -/* Bits 4..0 : State at which the DPDMDRIVE task will force D+ and D- */ -#define USBD_DPDMVALUE_STATE_Pos (0UL) /*!< Position of STATE field. */ -#define USBD_DPDMVALUE_STATE_Msk (0x1FUL << USBD_DPDMVALUE_STATE_Pos) /*!< Bit mask of STATE field. */ -#define USBD_DPDMVALUE_STATE_Resume (1UL) /*!< D+ forced low, D- forced high (K state) for a timing pre-set in hardware (50 us or 5 ms, depending on bus state) */ -#define USBD_DPDMVALUE_STATE_J (2UL) /*!< D+ forced high, D- forced low (J state) */ -#define USBD_DPDMVALUE_STATE_K (4UL) /*!< D+ forced low, D- forced high (K state) */ - -/* Register: USBD_DTOGGLE */ -/* Description: Data toggle control and status. */ - -/* Bits 9..8 : Data toggle value */ -#define USBD_DTOGGLE_VALUE_Pos (8UL) /*!< Position of VALUE field. */ -#define USBD_DTOGGLE_VALUE_Msk (0x3UL << USBD_DTOGGLE_VALUE_Pos) /*!< Bit mask of VALUE field. */ -#define USBD_DTOGGLE_VALUE_Nop (0UL) /*!< No action on data toggle when writing the register with this value */ -#define USBD_DTOGGLE_VALUE_Data0 (1UL) /*!< Data toggle is DATA0 on endpoint set by EP and IO */ -#define USBD_DTOGGLE_VALUE_Data1 (2UL) /*!< Data toggle is DATA1 on endpoint set by EP and IO */ - -/* Bit 7 : Selects IN or OUT endpoint */ -#define USBD_DTOGGLE_IO_Pos (7UL) /*!< Position of IO field. */ -#define USBD_DTOGGLE_IO_Msk (0x1UL << USBD_DTOGGLE_IO_Pos) /*!< Bit mask of IO field. */ -#define USBD_DTOGGLE_IO_Out (0UL) /*!< Selects OUT endpoint */ -#define USBD_DTOGGLE_IO_In (1UL) /*!< Selects IN endpoint */ - -/* Bits 2..0 : Select bulk endpoint number */ -#define USBD_DTOGGLE_EP_Pos (0UL) /*!< Position of EP field. */ -#define USBD_DTOGGLE_EP_Msk (0x7UL << USBD_DTOGGLE_EP_Pos) /*!< Bit mask of EP field. */ - -/* Register: USBD_EPINEN */ -/* Description: Endpoint IN enable */ - -/* Bit 8 : Enable iso IN endpoint */ -#define USBD_EPINEN_ISOIN_Pos (8UL) /*!< Position of ISOIN field. */ -#define USBD_EPINEN_ISOIN_Msk (0x1UL << USBD_EPINEN_ISOIN_Pos) /*!< Bit mask of ISOIN field. */ -#define USBD_EPINEN_ISOIN_Disable (0UL) /*!< Disable iso IN endpoint 8 */ -#define USBD_EPINEN_ISOIN_Enable (1UL) /*!< Enable iso IN endpoint 8 */ - -/* Bit 7 : Enable IN endpoint 7 */ -#define USBD_EPINEN_IN7_Pos (7UL) /*!< Position of IN7 field. */ -#define USBD_EPINEN_IN7_Msk (0x1UL << USBD_EPINEN_IN7_Pos) /*!< Bit mask of IN7 field. */ -#define USBD_EPINEN_IN7_Disable (0UL) /*!< Disable endpoint IN 7 (no response to IN tokens) */ -#define USBD_EPINEN_IN7_Enable (1UL) /*!< Enable endpoint IN 7 (response to IN tokens) */ - -/* Bit 6 : Enable IN endpoint 6 */ -#define USBD_EPINEN_IN6_Pos (6UL) /*!< Position of IN6 field. */ -#define USBD_EPINEN_IN6_Msk (0x1UL << USBD_EPINEN_IN6_Pos) /*!< Bit mask of IN6 field. */ -#define USBD_EPINEN_IN6_Disable (0UL) /*!< Disable endpoint IN 6 (no response to IN tokens) */ -#define USBD_EPINEN_IN6_Enable (1UL) /*!< Enable endpoint IN 6 (response to IN tokens) */ - -/* Bit 5 : Enable IN endpoint 5 */ -#define USBD_EPINEN_IN5_Pos (5UL) /*!< Position of IN5 field. */ -#define USBD_EPINEN_IN5_Msk (0x1UL << USBD_EPINEN_IN5_Pos) /*!< Bit mask of IN5 field. */ -#define USBD_EPINEN_IN5_Disable (0UL) /*!< Disable endpoint IN 5 (no response to IN tokens) */ -#define USBD_EPINEN_IN5_Enable (1UL) /*!< Enable endpoint IN 5 (response to IN tokens) */ - -/* Bit 4 : Enable IN endpoint 4 */ -#define USBD_EPINEN_IN4_Pos (4UL) /*!< Position of IN4 field. */ -#define USBD_EPINEN_IN4_Msk (0x1UL << USBD_EPINEN_IN4_Pos) /*!< Bit mask of IN4 field. */ -#define USBD_EPINEN_IN4_Disable (0UL) /*!< Disable endpoint IN 4 (no response to IN tokens) */ -#define USBD_EPINEN_IN4_Enable (1UL) /*!< Enable endpoint IN 4 (response to IN tokens) */ - -/* Bit 3 : Enable IN endpoint 3 */ -#define USBD_EPINEN_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define USBD_EPINEN_IN3_Msk (0x1UL << USBD_EPINEN_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define USBD_EPINEN_IN3_Disable (0UL) /*!< Disable endpoint IN 3 (no response to IN tokens) */ -#define USBD_EPINEN_IN3_Enable (1UL) /*!< Enable endpoint IN 3 (response to IN tokens) */ - -/* Bit 2 : Enable IN endpoint 2 */ -#define USBD_EPINEN_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define USBD_EPINEN_IN2_Msk (0x1UL << USBD_EPINEN_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define USBD_EPINEN_IN2_Disable (0UL) /*!< Disable endpoint IN 2 (no response to IN tokens) */ -#define USBD_EPINEN_IN2_Enable (1UL) /*!< Enable endpoint IN 2 (response to IN tokens) */ - -/* Bit 1 : Enable IN endpoint 1 */ -#define USBD_EPINEN_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define USBD_EPINEN_IN1_Msk (0x1UL << USBD_EPINEN_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define USBD_EPINEN_IN1_Disable (0UL) /*!< Disable endpoint IN 1 (no response to IN tokens) */ -#define USBD_EPINEN_IN1_Enable (1UL) /*!< Enable endpoint IN 1 (response to IN tokens) */ - -/* Bit 0 : Enable IN endpoint 0 */ -#define USBD_EPINEN_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define USBD_EPINEN_IN0_Msk (0x1UL << USBD_EPINEN_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define USBD_EPINEN_IN0_Disable (0UL) /*!< Disable endpoint IN 0 (no response to IN tokens) */ -#define USBD_EPINEN_IN0_Enable (1UL) /*!< Enable endpoint IN 0 (response to IN tokens) */ - -/* Register: USBD_EPOUTEN */ -/* Description: Endpoint OUT enable */ - -/* Bit 8 : Enable iso OUT endpoint 8 */ -#define USBD_EPOUTEN_ISOOUT_Pos (8UL) /*!< Position of ISOOUT field. */ -#define USBD_EPOUTEN_ISOOUT_Msk (0x1UL << USBD_EPOUTEN_ISOOUT_Pos) /*!< Bit mask of ISOOUT field. */ -#define USBD_EPOUTEN_ISOOUT_Disable (0UL) /*!< Disable iso OUT endpoint 8 */ -#define USBD_EPOUTEN_ISOOUT_Enable (1UL) /*!< Enable iso OUT endpoint 8 */ - -/* Bit 7 : Enable OUT endpoint 7 */ -#define USBD_EPOUTEN_OUT7_Pos (7UL) /*!< Position of OUT7 field. */ -#define USBD_EPOUTEN_OUT7_Msk (0x1UL << USBD_EPOUTEN_OUT7_Pos) /*!< Bit mask of OUT7 field. */ -#define USBD_EPOUTEN_OUT7_Disable (0UL) /*!< Disable endpoint OUT 7 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT7_Enable (1UL) /*!< Enable endpoint OUT 7 (response to OUT tokens) */ - -/* Bit 6 : Enable OUT endpoint 6 */ -#define USBD_EPOUTEN_OUT6_Pos (6UL) /*!< Position of OUT6 field. */ -#define USBD_EPOUTEN_OUT6_Msk (0x1UL << USBD_EPOUTEN_OUT6_Pos) /*!< Bit mask of OUT6 field. */ -#define USBD_EPOUTEN_OUT6_Disable (0UL) /*!< Disable endpoint OUT 6 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT6_Enable (1UL) /*!< Enable endpoint OUT 6 (response to OUT tokens) */ - -/* Bit 5 : Enable OUT endpoint 5 */ -#define USBD_EPOUTEN_OUT5_Pos (5UL) /*!< Position of OUT5 field. */ -#define USBD_EPOUTEN_OUT5_Msk (0x1UL << USBD_EPOUTEN_OUT5_Pos) /*!< Bit mask of OUT5 field. */ -#define USBD_EPOUTEN_OUT5_Disable (0UL) /*!< Disable endpoint OUT 5 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT5_Enable (1UL) /*!< Enable endpoint OUT 5 (response to OUT tokens) */ - -/* Bit 4 : Enable OUT endpoint 4 */ -#define USBD_EPOUTEN_OUT4_Pos (4UL) /*!< Position of OUT4 field. */ -#define USBD_EPOUTEN_OUT4_Msk (0x1UL << USBD_EPOUTEN_OUT4_Pos) /*!< Bit mask of OUT4 field. */ -#define USBD_EPOUTEN_OUT4_Disable (0UL) /*!< Disable endpoint OUT 4 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT4_Enable (1UL) /*!< Enable endpoint OUT 4 (response to OUT tokens) */ - -/* Bit 3 : Enable OUT endpoint 3 */ -#define USBD_EPOUTEN_OUT3_Pos (3UL) /*!< Position of OUT3 field. */ -#define USBD_EPOUTEN_OUT3_Msk (0x1UL << USBD_EPOUTEN_OUT3_Pos) /*!< Bit mask of OUT3 field. */ -#define USBD_EPOUTEN_OUT3_Disable (0UL) /*!< Disable endpoint OUT 3 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT3_Enable (1UL) /*!< Enable endpoint OUT 3 (response to OUT tokens) */ - -/* Bit 2 : Enable OUT endpoint 2 */ -#define USBD_EPOUTEN_OUT2_Pos (2UL) /*!< Position of OUT2 field. */ -#define USBD_EPOUTEN_OUT2_Msk (0x1UL << USBD_EPOUTEN_OUT2_Pos) /*!< Bit mask of OUT2 field. */ -#define USBD_EPOUTEN_OUT2_Disable (0UL) /*!< Disable endpoint OUT 2 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT2_Enable (1UL) /*!< Enable endpoint OUT 2 (response to OUT tokens) */ - -/* Bit 1 : Enable OUT endpoint 1 */ -#define USBD_EPOUTEN_OUT1_Pos (1UL) /*!< Position of OUT1 field. */ -#define USBD_EPOUTEN_OUT1_Msk (0x1UL << USBD_EPOUTEN_OUT1_Pos) /*!< Bit mask of OUT1 field. */ -#define USBD_EPOUTEN_OUT1_Disable (0UL) /*!< Disable endpoint OUT 1 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT1_Enable (1UL) /*!< Enable endpoint OUT 1 (response to OUT tokens) */ - -/* Bit 0 : Enable OUT endpoint 0 */ -#define USBD_EPOUTEN_OUT0_Pos (0UL) /*!< Position of OUT0 field. */ -#define USBD_EPOUTEN_OUT0_Msk (0x1UL << USBD_EPOUTEN_OUT0_Pos) /*!< Bit mask of OUT0 field. */ -#define USBD_EPOUTEN_OUT0_Disable (0UL) /*!< Disable endpoint OUT 0 (no response to OUT tokens) */ -#define USBD_EPOUTEN_OUT0_Enable (1UL) /*!< Enable endpoint OUT 0 (response to OUT tokens) */ - -/* Register: USBD_EPSTALL */ -/* Description: STALL endpoints */ - -/* Bit 8 : Stall selected endpoint */ -#define USBD_EPSTALL_STALL_Pos (8UL) /*!< Position of STALL field. */ -#define USBD_EPSTALL_STALL_Msk (0x1UL << USBD_EPSTALL_STALL_Pos) /*!< Bit mask of STALL field. */ -#define USBD_EPSTALL_STALL_UnStall (0UL) /*!< Don't stall selected endpoint */ -#define USBD_EPSTALL_STALL_Stall (1UL) /*!< Stall selected endpoint */ - -/* Bit 7 : Selects IN or OUT endpoint */ -#define USBD_EPSTALL_IO_Pos (7UL) /*!< Position of IO field. */ -#define USBD_EPSTALL_IO_Msk (0x1UL << USBD_EPSTALL_IO_Pos) /*!< Bit mask of IO field. */ -#define USBD_EPSTALL_IO_Out (0UL) /*!< Selects OUT endpoint */ -#define USBD_EPSTALL_IO_In (1UL) /*!< Selects IN endpoint */ - -/* Bits 2..0 : Select endpoint number */ -#define USBD_EPSTALL_EP_Pos (0UL) /*!< Position of EP field. */ -#define USBD_EPSTALL_EP_Msk (0x7UL << USBD_EPSTALL_EP_Pos) /*!< Bit mask of EP field. */ - -/* Register: USBD_ISOSPLIT */ -/* Description: Controls the split of ISO buffers */ - -/* Bits 15..0 : Controls the split of ISO buffers */ -#define USBD_ISOSPLIT_SPLIT_Pos (0UL) /*!< Position of SPLIT field. */ -#define USBD_ISOSPLIT_SPLIT_Msk (0xFFFFUL << USBD_ISOSPLIT_SPLIT_Pos) /*!< Bit mask of SPLIT field. */ -#define USBD_ISOSPLIT_SPLIT_OneDir (0x0000UL) /*!< Full buffer dedicated to either iso IN or OUT */ -#define USBD_ISOSPLIT_SPLIT_HalfIN (0x0080UL) /*!< Lower half for IN, upper half for OUT */ - -/* Register: USBD_FRAMECNTR */ -/* Description: Returns the current value of the start of frame counter */ - -/* Bits 10..0 : Returns the current value of the start of frame counter */ -#define USBD_FRAMECNTR_FRAMECNTR_Pos (0UL) /*!< Position of FRAMECNTR field. */ -#define USBD_FRAMECNTR_FRAMECNTR_Msk (0x7FFUL << USBD_FRAMECNTR_FRAMECNTR_Pos) /*!< Bit mask of FRAMECNTR field. */ - -/* Register: USBD_ISOINCONFIG */ -/* Description: Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */ - -/* Bit 0 : Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */ -#define USBD_ISOINCONFIG_RESPONSE_Pos (0UL) /*!< Position of RESPONSE field. */ -#define USBD_ISOINCONFIG_RESPONSE_Msk (0x1UL << USBD_ISOINCONFIG_RESPONSE_Pos) /*!< Bit mask of RESPONSE field. */ -#define USBD_ISOINCONFIG_RESPONSE_NoResp (0UL) /*!< Endpoint does not respond in that case */ -#define USBD_ISOINCONFIG_RESPONSE_ZeroData (1UL) /*!< Endpoint responds with a zero-length data packet in that case */ - -/* Register: USBD_EPIN_PTR */ -/* Description: Description cluster[0]: Data pointer */ - -/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ -#define USBD_EPIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define USBD_EPIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: USBD_EPIN_MAXCNT */ -/* Description: Description cluster[0]: Maximum number of bytes to transfer */ - -/* Bits 6..0 : Maximum number of bytes to transfer */ -#define USBD_EPIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define USBD_EPIN_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: USBD_EPIN_AMOUNT */ -/* Description: Description cluster[0]: Number of bytes transferred in the last transaction */ - -/* Bits 6..0 : Number of bytes transferred in the last transaction */ -#define USBD_EPIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define USBD_EPIN_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: USBD_ISOIN_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ -#define USBD_ISOIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define USBD_ISOIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: USBD_ISOIN_MAXCNT */ -/* Description: Maximum number of bytes to transfer */ - -/* Bits 9..0 : Maximum number of bytes to transfer */ -#define USBD_ISOIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define USBD_ISOIN_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: USBD_ISOIN_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 9..0 : Number of bytes transferred in the last transaction */ -#define USBD_ISOIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define USBD_ISOIN_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: USBD_EPOUT_PTR */ -/* Description: Description cluster[0]: Data pointer */ - -/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ -#define USBD_EPOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define USBD_EPOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: USBD_EPOUT_MAXCNT */ -/* Description: Description cluster[0]: Maximum number of bytes to transfer */ - -/* Bits 6..0 : Maximum number of bytes to transfer */ -#define USBD_EPOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define USBD_EPOUT_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: USBD_EPOUT_AMOUNT */ -/* Description: Description cluster[0]: Number of bytes transferred in the last transaction */ - -/* Bits 6..0 : Number of bytes transferred in the last transaction */ -#define USBD_EPOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define USBD_EPOUT_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: USBD_ISOOUT_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ -#define USBD_ISOOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define USBD_ISOOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: USBD_ISOOUT_MAXCNT */ -/* Description: Maximum number of bytes to transfer */ - -/* Bits 9..0 : Maximum number of bytes to transfer */ -#define USBD_ISOOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define USBD_ISOOUT_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: USBD_ISOOUT_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 9..0 : Number of bytes transferred in the last transaction */ -#define USBD_ISOOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define USBD_ISOOUT_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - - -/* Peripheral: WDT */ -/* Description: Watchdog Timer */ - -/* Register: WDT_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for TIMEOUT event */ -#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ -#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ -#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */ - -/* Register: WDT_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for TIMEOUT event */ -#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ -#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ -#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */ - -/* Register: WDT_RUNSTATUS */ -/* Description: Run status */ - -/* Bit 0 : Indicates whether or not the watchdog is running */ -#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */ -#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */ - -/* Register: WDT_REQSTATUS */ -/* Description: Request status */ - -/* Bit 7 : Request status for RR[7] register */ -#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */ - -/* Bit 6 : Request status for RR[6] register */ -#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */ - -/* Bit 5 : Request status for RR[5] register */ -#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */ - -/* Bit 4 : Request status for RR[4] register */ -#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */ - -/* Bit 3 : Request status for RR[3] register */ -#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */ - -/* Bit 2 : Request status for RR[2] register */ -#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */ - -/* Bit 1 : Request status for RR[1] register */ -#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */ - -/* Bit 0 : Request status for RR[0] register */ -#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */ - -/* Register: WDT_CRV */ -/* Description: Counter reload value */ - -/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */ -#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */ -#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */ - -/* Register: WDT_RREN */ -/* Description: Enable register for reload request registers */ - -/* Bit 7 : Enable or disable RR[7] register */ -#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */ -#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */ - -/* Bit 6 : Enable or disable RR[6] register */ -#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */ -#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */ - -/* Bit 5 : Enable or disable RR[5] register */ -#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */ -#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */ - -/* Bit 4 : Enable or disable RR[4] register */ -#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */ -#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */ - -/* Bit 3 : Enable or disable RR[3] register */ -#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */ -#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */ - -/* Bit 2 : Enable or disable RR[2] register */ -#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */ -#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */ - -/* Bit 1 : Enable or disable RR[1] register */ -#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */ -#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */ - -/* Bit 0 : Enable or disable RR[0] register */ -#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */ -#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */ - -/* Register: WDT_CONFIG */ -/* Description: Configuration register */ - -/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */ -#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ -#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ -#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */ -#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */ - -/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */ -#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */ -#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */ - -/* Register: WDT_RR */ -/* Description: Description collection[0]: Reload request 0 */ - -/* Bits 31..0 : Reload request register */ -#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ -#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ -#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */ - - -/*lint --flb "Leave library region" */ -#endif diff --git a/ports/nrf/device/nrf52/nrf52_bitfields.h b/ports/nrf/device/nrf52/nrf52_bitfields.h deleted file mode 100644 index b695bf8a19db1..0000000000000 --- a/ports/nrf/device/nrf52/nrf52_bitfields.h +++ /dev/null @@ -1,12642 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __NRF52_BITS_H -#define __NRF52_BITS_H - -/*lint ++flb "Enter library region" */ - -/* Peripheral: AAR */ -/* Description: Accelerated Address Resolver */ - -/* Register: AAR_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */ -#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */ -#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for END event */ -#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Register: AAR_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for NOTRESOLVED event */ -#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for RESOLVED event */ -#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for END event */ -#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Register: AAR_STATUS */ -/* Description: Resolution status */ - -/* Bits 3..0 : The IRK that was used last time an address was resolved */ -#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ - -/* Register: AAR_ENABLE */ -/* Description: Enable AAR */ - -/* Bits 1..0 : Enable or disable AAR */ -#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */ - -/* Register: AAR_NIRK */ -/* Description: Number of IRKs */ - -/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */ -#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ -#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ - -/* Register: AAR_IRKPTR */ -/* Description: Pointer to IRK data structure */ - -/* Bits 31..0 : Pointer to the IRK data structure */ -#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */ -#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */ - -/* Register: AAR_ADDRPTR */ -/* Description: Pointer to the resolvable address */ - -/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */ -#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */ -#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */ - -/* Register: AAR_SCRATCHPTR */ -/* Description: Pointer to data area used for temporary storage */ - -/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */ -#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ -#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ - - -/* Peripheral: BPROT */ -/* Description: Block Protect */ - -/* Register: BPROT_CONFIG0 */ -/* Description: Block protect configuration register 0 */ - -/* Bit 31 : Enable protection for region 31. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION31_Pos (31UL) /*!< Position of REGION31 field. */ -#define BPROT_CONFIG0_REGION31_Msk (0x1UL << BPROT_CONFIG0_REGION31_Pos) /*!< Bit mask of REGION31 field. */ -#define BPROT_CONFIG0_REGION31_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION31_Enabled (1UL) /*!< Protection enable */ - -/* Bit 30 : Enable protection for region 30. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION30_Pos (30UL) /*!< Position of REGION30 field. */ -#define BPROT_CONFIG0_REGION30_Msk (0x1UL << BPROT_CONFIG0_REGION30_Pos) /*!< Bit mask of REGION30 field. */ -#define BPROT_CONFIG0_REGION30_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION30_Enabled (1UL) /*!< Protection enable */ - -/* Bit 29 : Enable protection for region 29. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION29_Pos (29UL) /*!< Position of REGION29 field. */ -#define BPROT_CONFIG0_REGION29_Msk (0x1UL << BPROT_CONFIG0_REGION29_Pos) /*!< Bit mask of REGION29 field. */ -#define BPROT_CONFIG0_REGION29_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION29_Enabled (1UL) /*!< Protection enable */ - -/* Bit 28 : Enable protection for region 28. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION28_Pos (28UL) /*!< Position of REGION28 field. */ -#define BPROT_CONFIG0_REGION28_Msk (0x1UL << BPROT_CONFIG0_REGION28_Pos) /*!< Bit mask of REGION28 field. */ -#define BPROT_CONFIG0_REGION28_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION28_Enabled (1UL) /*!< Protection enable */ - -/* Bit 27 : Enable protection for region 27. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION27_Pos (27UL) /*!< Position of REGION27 field. */ -#define BPROT_CONFIG0_REGION27_Msk (0x1UL << BPROT_CONFIG0_REGION27_Pos) /*!< Bit mask of REGION27 field. */ -#define BPROT_CONFIG0_REGION27_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION27_Enabled (1UL) /*!< Protection enable */ - -/* Bit 26 : Enable protection for region 26. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION26_Pos (26UL) /*!< Position of REGION26 field. */ -#define BPROT_CONFIG0_REGION26_Msk (0x1UL << BPROT_CONFIG0_REGION26_Pos) /*!< Bit mask of REGION26 field. */ -#define BPROT_CONFIG0_REGION26_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION26_Enabled (1UL) /*!< Protection enable */ - -/* Bit 25 : Enable protection for region 25. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION25_Pos (25UL) /*!< Position of REGION25 field. */ -#define BPROT_CONFIG0_REGION25_Msk (0x1UL << BPROT_CONFIG0_REGION25_Pos) /*!< Bit mask of REGION25 field. */ -#define BPROT_CONFIG0_REGION25_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION25_Enabled (1UL) /*!< Protection enable */ - -/* Bit 24 : Enable protection for region 24. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION24_Pos (24UL) /*!< Position of REGION24 field. */ -#define BPROT_CONFIG0_REGION24_Msk (0x1UL << BPROT_CONFIG0_REGION24_Pos) /*!< Bit mask of REGION24 field. */ -#define BPROT_CONFIG0_REGION24_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION24_Enabled (1UL) /*!< Protection enable */ - -/* Bit 23 : Enable protection for region 23. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION23_Pos (23UL) /*!< Position of REGION23 field. */ -#define BPROT_CONFIG0_REGION23_Msk (0x1UL << BPROT_CONFIG0_REGION23_Pos) /*!< Bit mask of REGION23 field. */ -#define BPROT_CONFIG0_REGION23_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION23_Enabled (1UL) /*!< Protection enable */ - -/* Bit 22 : Enable protection for region 22. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION22_Pos (22UL) /*!< Position of REGION22 field. */ -#define BPROT_CONFIG0_REGION22_Msk (0x1UL << BPROT_CONFIG0_REGION22_Pos) /*!< Bit mask of REGION22 field. */ -#define BPROT_CONFIG0_REGION22_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION22_Enabled (1UL) /*!< Protection enable */ - -/* Bit 21 : Enable protection for region 21. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION21_Pos (21UL) /*!< Position of REGION21 field. */ -#define BPROT_CONFIG0_REGION21_Msk (0x1UL << BPROT_CONFIG0_REGION21_Pos) /*!< Bit mask of REGION21 field. */ -#define BPROT_CONFIG0_REGION21_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION21_Enabled (1UL) /*!< Protection enable */ - -/* Bit 20 : Enable protection for region 20. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION20_Pos (20UL) /*!< Position of REGION20 field. */ -#define BPROT_CONFIG0_REGION20_Msk (0x1UL << BPROT_CONFIG0_REGION20_Pos) /*!< Bit mask of REGION20 field. */ -#define BPROT_CONFIG0_REGION20_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION20_Enabled (1UL) /*!< Protection enable */ - -/* Bit 19 : Enable protection for region 19. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION19_Pos (19UL) /*!< Position of REGION19 field. */ -#define BPROT_CONFIG0_REGION19_Msk (0x1UL << BPROT_CONFIG0_REGION19_Pos) /*!< Bit mask of REGION19 field. */ -#define BPROT_CONFIG0_REGION19_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION19_Enabled (1UL) /*!< Protection enable */ - -/* Bit 18 : Enable protection for region 18. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION18_Pos (18UL) /*!< Position of REGION18 field. */ -#define BPROT_CONFIG0_REGION18_Msk (0x1UL << BPROT_CONFIG0_REGION18_Pos) /*!< Bit mask of REGION18 field. */ -#define BPROT_CONFIG0_REGION18_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION18_Enabled (1UL) /*!< Protection enable */ - -/* Bit 17 : Enable protection for region 17. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION17_Pos (17UL) /*!< Position of REGION17 field. */ -#define BPROT_CONFIG0_REGION17_Msk (0x1UL << BPROT_CONFIG0_REGION17_Pos) /*!< Bit mask of REGION17 field. */ -#define BPROT_CONFIG0_REGION17_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION17_Enabled (1UL) /*!< Protection enable */ - -/* Bit 16 : Enable protection for region 16. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION16_Pos (16UL) /*!< Position of REGION16 field. */ -#define BPROT_CONFIG0_REGION16_Msk (0x1UL << BPROT_CONFIG0_REGION16_Pos) /*!< Bit mask of REGION16 field. */ -#define BPROT_CONFIG0_REGION16_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION16_Enabled (1UL) /*!< Protection enable */ - -/* Bit 15 : Enable protection for region 15. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION15_Pos (15UL) /*!< Position of REGION15 field. */ -#define BPROT_CONFIG0_REGION15_Msk (0x1UL << BPROT_CONFIG0_REGION15_Pos) /*!< Bit mask of REGION15 field. */ -#define BPROT_CONFIG0_REGION15_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION15_Enabled (1UL) /*!< Protection enable */ - -/* Bit 14 : Enable protection for region 14. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION14_Pos (14UL) /*!< Position of REGION14 field. */ -#define BPROT_CONFIG0_REGION14_Msk (0x1UL << BPROT_CONFIG0_REGION14_Pos) /*!< Bit mask of REGION14 field. */ -#define BPROT_CONFIG0_REGION14_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION14_Enabled (1UL) /*!< Protection enable */ - -/* Bit 13 : Enable protection for region 13. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION13_Pos (13UL) /*!< Position of REGION13 field. */ -#define BPROT_CONFIG0_REGION13_Msk (0x1UL << BPROT_CONFIG0_REGION13_Pos) /*!< Bit mask of REGION13 field. */ -#define BPROT_CONFIG0_REGION13_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION13_Enabled (1UL) /*!< Protection enable */ - -/* Bit 12 : Enable protection for region 12. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION12_Pos (12UL) /*!< Position of REGION12 field. */ -#define BPROT_CONFIG0_REGION12_Msk (0x1UL << BPROT_CONFIG0_REGION12_Pos) /*!< Bit mask of REGION12 field. */ -#define BPROT_CONFIG0_REGION12_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION12_Enabled (1UL) /*!< Protection enable */ - -/* Bit 11 : Enable protection for region 11. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION11_Pos (11UL) /*!< Position of REGION11 field. */ -#define BPROT_CONFIG0_REGION11_Msk (0x1UL << BPROT_CONFIG0_REGION11_Pos) /*!< Bit mask of REGION11 field. */ -#define BPROT_CONFIG0_REGION11_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION11_Enabled (1UL) /*!< Protection enable */ - -/* Bit 10 : Enable protection for region 10. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION10_Pos (10UL) /*!< Position of REGION10 field. */ -#define BPROT_CONFIG0_REGION10_Msk (0x1UL << BPROT_CONFIG0_REGION10_Pos) /*!< Bit mask of REGION10 field. */ -#define BPROT_CONFIG0_REGION10_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION10_Enabled (1UL) /*!< Protection enable */ - -/* Bit 9 : Enable protection for region 9. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION9_Pos (9UL) /*!< Position of REGION9 field. */ -#define BPROT_CONFIG0_REGION9_Msk (0x1UL << BPROT_CONFIG0_REGION9_Pos) /*!< Bit mask of REGION9 field. */ -#define BPROT_CONFIG0_REGION9_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION9_Enabled (1UL) /*!< Protection enable */ - -/* Bit 8 : Enable protection for region 8. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION8_Pos (8UL) /*!< Position of REGION8 field. */ -#define BPROT_CONFIG0_REGION8_Msk (0x1UL << BPROT_CONFIG0_REGION8_Pos) /*!< Bit mask of REGION8 field. */ -#define BPROT_CONFIG0_REGION8_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION8_Enabled (1UL) /*!< Protection enable */ - -/* Bit 7 : Enable protection for region 7. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION7_Pos (7UL) /*!< Position of REGION7 field. */ -#define BPROT_CONFIG0_REGION7_Msk (0x1UL << BPROT_CONFIG0_REGION7_Pos) /*!< Bit mask of REGION7 field. */ -#define BPROT_CONFIG0_REGION7_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION7_Enabled (1UL) /*!< Protection enable */ - -/* Bit 6 : Enable protection for region 6. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION6_Pos (6UL) /*!< Position of REGION6 field. */ -#define BPROT_CONFIG0_REGION6_Msk (0x1UL << BPROT_CONFIG0_REGION6_Pos) /*!< Bit mask of REGION6 field. */ -#define BPROT_CONFIG0_REGION6_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION6_Enabled (1UL) /*!< Protection enable */ - -/* Bit 5 : Enable protection for region 5. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION5_Pos (5UL) /*!< Position of REGION5 field. */ -#define BPROT_CONFIG0_REGION5_Msk (0x1UL << BPROT_CONFIG0_REGION5_Pos) /*!< Bit mask of REGION5 field. */ -#define BPROT_CONFIG0_REGION5_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION5_Enabled (1UL) /*!< Protection enable */ - -/* Bit 4 : Enable protection for region 4. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION4_Pos (4UL) /*!< Position of REGION4 field. */ -#define BPROT_CONFIG0_REGION4_Msk (0x1UL << BPROT_CONFIG0_REGION4_Pos) /*!< Bit mask of REGION4 field. */ -#define BPROT_CONFIG0_REGION4_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION4_Enabled (1UL) /*!< Protection enable */ - -/* Bit 3 : Enable protection for region 3. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION3_Pos (3UL) /*!< Position of REGION3 field. */ -#define BPROT_CONFIG0_REGION3_Msk (0x1UL << BPROT_CONFIG0_REGION3_Pos) /*!< Bit mask of REGION3 field. */ -#define BPROT_CONFIG0_REGION3_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION3_Enabled (1UL) /*!< Protection enable */ - -/* Bit 2 : Enable protection for region 2. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION2_Pos (2UL) /*!< Position of REGION2 field. */ -#define BPROT_CONFIG0_REGION2_Msk (0x1UL << BPROT_CONFIG0_REGION2_Pos) /*!< Bit mask of REGION2 field. */ -#define BPROT_CONFIG0_REGION2_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION2_Enabled (1UL) /*!< Protection enable */ - -/* Bit 1 : Enable protection for region 1. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION1_Pos (1UL) /*!< Position of REGION1 field. */ -#define BPROT_CONFIG0_REGION1_Msk (0x1UL << BPROT_CONFIG0_REGION1_Pos) /*!< Bit mask of REGION1 field. */ -#define BPROT_CONFIG0_REGION1_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION1_Enabled (1UL) /*!< Protection enable */ - -/* Bit 0 : Enable protection for region 0. Write '0' has no effect. */ -#define BPROT_CONFIG0_REGION0_Pos (0UL) /*!< Position of REGION0 field. */ -#define BPROT_CONFIG0_REGION0_Msk (0x1UL << BPROT_CONFIG0_REGION0_Pos) /*!< Bit mask of REGION0 field. */ -#define BPROT_CONFIG0_REGION0_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG0_REGION0_Enabled (1UL) /*!< Protection enable */ - -/* Register: BPROT_CONFIG1 */ -/* Description: Block protect configuration register 1 */ - -/* Bit 31 : Enable protection for region 63. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION63_Pos (31UL) /*!< Position of REGION63 field. */ -#define BPROT_CONFIG1_REGION63_Msk (0x1UL << BPROT_CONFIG1_REGION63_Pos) /*!< Bit mask of REGION63 field. */ -#define BPROT_CONFIG1_REGION63_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION63_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 30 : Enable protection for region 62. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION62_Pos (30UL) /*!< Position of REGION62 field. */ -#define BPROT_CONFIG1_REGION62_Msk (0x1UL << BPROT_CONFIG1_REGION62_Pos) /*!< Bit mask of REGION62 field. */ -#define BPROT_CONFIG1_REGION62_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION62_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 29 : Enable protection for region 61. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION61_Pos (29UL) /*!< Position of REGION61 field. */ -#define BPROT_CONFIG1_REGION61_Msk (0x1UL << BPROT_CONFIG1_REGION61_Pos) /*!< Bit mask of REGION61 field. */ -#define BPROT_CONFIG1_REGION61_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION61_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 28 : Enable protection for region 60. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION60_Pos (28UL) /*!< Position of REGION60 field. */ -#define BPROT_CONFIG1_REGION60_Msk (0x1UL << BPROT_CONFIG1_REGION60_Pos) /*!< Bit mask of REGION60 field. */ -#define BPROT_CONFIG1_REGION60_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION60_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 27 : Enable protection for region 59. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION59_Pos (27UL) /*!< Position of REGION59 field. */ -#define BPROT_CONFIG1_REGION59_Msk (0x1UL << BPROT_CONFIG1_REGION59_Pos) /*!< Bit mask of REGION59 field. */ -#define BPROT_CONFIG1_REGION59_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION59_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 26 : Enable protection for region 58. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION58_Pos (26UL) /*!< Position of REGION58 field. */ -#define BPROT_CONFIG1_REGION58_Msk (0x1UL << BPROT_CONFIG1_REGION58_Pos) /*!< Bit mask of REGION58 field. */ -#define BPROT_CONFIG1_REGION58_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION58_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 25 : Enable protection for region 57. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION57_Pos (25UL) /*!< Position of REGION57 field. */ -#define BPROT_CONFIG1_REGION57_Msk (0x1UL << BPROT_CONFIG1_REGION57_Pos) /*!< Bit mask of REGION57 field. */ -#define BPROT_CONFIG1_REGION57_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION57_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 24 : Enable protection for region 56. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION56_Pos (24UL) /*!< Position of REGION56 field. */ -#define BPROT_CONFIG1_REGION56_Msk (0x1UL << BPROT_CONFIG1_REGION56_Pos) /*!< Bit mask of REGION56 field. */ -#define BPROT_CONFIG1_REGION56_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION56_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 23 : Enable protection for region 55. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION55_Pos (23UL) /*!< Position of REGION55 field. */ -#define BPROT_CONFIG1_REGION55_Msk (0x1UL << BPROT_CONFIG1_REGION55_Pos) /*!< Bit mask of REGION55 field. */ -#define BPROT_CONFIG1_REGION55_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION55_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 22 : Enable protection for region 54. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION54_Pos (22UL) /*!< Position of REGION54 field. */ -#define BPROT_CONFIG1_REGION54_Msk (0x1UL << BPROT_CONFIG1_REGION54_Pos) /*!< Bit mask of REGION54 field. */ -#define BPROT_CONFIG1_REGION54_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION54_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 21 : Enable protection for region 53. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION53_Pos (21UL) /*!< Position of REGION53 field. */ -#define BPROT_CONFIG1_REGION53_Msk (0x1UL << BPROT_CONFIG1_REGION53_Pos) /*!< Bit mask of REGION53 field. */ -#define BPROT_CONFIG1_REGION53_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION53_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 20 : Enable protection for region 52. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION52_Pos (20UL) /*!< Position of REGION52 field. */ -#define BPROT_CONFIG1_REGION52_Msk (0x1UL << BPROT_CONFIG1_REGION52_Pos) /*!< Bit mask of REGION52 field. */ -#define BPROT_CONFIG1_REGION52_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION52_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 19 : Enable protection for region 51. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION51_Pos (19UL) /*!< Position of REGION51 field. */ -#define BPROT_CONFIG1_REGION51_Msk (0x1UL << BPROT_CONFIG1_REGION51_Pos) /*!< Bit mask of REGION51 field. */ -#define BPROT_CONFIG1_REGION51_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION51_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 18 : Enable protection for region 50. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION50_Pos (18UL) /*!< Position of REGION50 field. */ -#define BPROT_CONFIG1_REGION50_Msk (0x1UL << BPROT_CONFIG1_REGION50_Pos) /*!< Bit mask of REGION50 field. */ -#define BPROT_CONFIG1_REGION50_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION50_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 17 : Enable protection for region 49. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION49_Pos (17UL) /*!< Position of REGION49 field. */ -#define BPROT_CONFIG1_REGION49_Msk (0x1UL << BPROT_CONFIG1_REGION49_Pos) /*!< Bit mask of REGION49 field. */ -#define BPROT_CONFIG1_REGION49_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION49_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 16 : Enable protection for region 48. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION48_Pos (16UL) /*!< Position of REGION48 field. */ -#define BPROT_CONFIG1_REGION48_Msk (0x1UL << BPROT_CONFIG1_REGION48_Pos) /*!< Bit mask of REGION48 field. */ -#define BPROT_CONFIG1_REGION48_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION48_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 15 : Enable protection for region 47. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION47_Pos (15UL) /*!< Position of REGION47 field. */ -#define BPROT_CONFIG1_REGION47_Msk (0x1UL << BPROT_CONFIG1_REGION47_Pos) /*!< Bit mask of REGION47 field. */ -#define BPROT_CONFIG1_REGION47_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION47_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 14 : Enable protection for region 46. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION46_Pos (14UL) /*!< Position of REGION46 field. */ -#define BPROT_CONFIG1_REGION46_Msk (0x1UL << BPROT_CONFIG1_REGION46_Pos) /*!< Bit mask of REGION46 field. */ -#define BPROT_CONFIG1_REGION46_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION46_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 13 : Enable protection for region 45. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION45_Pos (13UL) /*!< Position of REGION45 field. */ -#define BPROT_CONFIG1_REGION45_Msk (0x1UL << BPROT_CONFIG1_REGION45_Pos) /*!< Bit mask of REGION45 field. */ -#define BPROT_CONFIG1_REGION45_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION45_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 12 : Enable protection for region 44. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION44_Pos (12UL) /*!< Position of REGION44 field. */ -#define BPROT_CONFIG1_REGION44_Msk (0x1UL << BPROT_CONFIG1_REGION44_Pos) /*!< Bit mask of REGION44 field. */ -#define BPROT_CONFIG1_REGION44_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION44_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 11 : Enable protection for region 43. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION43_Pos (11UL) /*!< Position of REGION43 field. */ -#define BPROT_CONFIG1_REGION43_Msk (0x1UL << BPROT_CONFIG1_REGION43_Pos) /*!< Bit mask of REGION43 field. */ -#define BPROT_CONFIG1_REGION43_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION43_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 10 : Enable protection for region 42. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION42_Pos (10UL) /*!< Position of REGION42 field. */ -#define BPROT_CONFIG1_REGION42_Msk (0x1UL << BPROT_CONFIG1_REGION42_Pos) /*!< Bit mask of REGION42 field. */ -#define BPROT_CONFIG1_REGION42_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION42_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 9 : Enable protection for region 41. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION41_Pos (9UL) /*!< Position of REGION41 field. */ -#define BPROT_CONFIG1_REGION41_Msk (0x1UL << BPROT_CONFIG1_REGION41_Pos) /*!< Bit mask of REGION41 field. */ -#define BPROT_CONFIG1_REGION41_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION41_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 8 : Enable protection for region 40. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION40_Pos (8UL) /*!< Position of REGION40 field. */ -#define BPROT_CONFIG1_REGION40_Msk (0x1UL << BPROT_CONFIG1_REGION40_Pos) /*!< Bit mask of REGION40 field. */ -#define BPROT_CONFIG1_REGION40_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION40_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 7 : Enable protection for region 39. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION39_Pos (7UL) /*!< Position of REGION39 field. */ -#define BPROT_CONFIG1_REGION39_Msk (0x1UL << BPROT_CONFIG1_REGION39_Pos) /*!< Bit mask of REGION39 field. */ -#define BPROT_CONFIG1_REGION39_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION39_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 6 : Enable protection for region 38. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION38_Pos (6UL) /*!< Position of REGION38 field. */ -#define BPROT_CONFIG1_REGION38_Msk (0x1UL << BPROT_CONFIG1_REGION38_Pos) /*!< Bit mask of REGION38 field. */ -#define BPROT_CONFIG1_REGION38_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION38_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 5 : Enable protection for region 37. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION37_Pos (5UL) /*!< Position of REGION37 field. */ -#define BPROT_CONFIG1_REGION37_Msk (0x1UL << BPROT_CONFIG1_REGION37_Pos) /*!< Bit mask of REGION37 field. */ -#define BPROT_CONFIG1_REGION37_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION37_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 4 : Enable protection for region 36. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION36_Pos (4UL) /*!< Position of REGION36 field. */ -#define BPROT_CONFIG1_REGION36_Msk (0x1UL << BPROT_CONFIG1_REGION36_Pos) /*!< Bit mask of REGION36 field. */ -#define BPROT_CONFIG1_REGION36_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION36_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 3 : Enable protection for region 35. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION35_Pos (3UL) /*!< Position of REGION35 field. */ -#define BPROT_CONFIG1_REGION35_Msk (0x1UL << BPROT_CONFIG1_REGION35_Pos) /*!< Bit mask of REGION35 field. */ -#define BPROT_CONFIG1_REGION35_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION35_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 2 : Enable protection for region 34. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION34_Pos (2UL) /*!< Position of REGION34 field. */ -#define BPROT_CONFIG1_REGION34_Msk (0x1UL << BPROT_CONFIG1_REGION34_Pos) /*!< Bit mask of REGION34 field. */ -#define BPROT_CONFIG1_REGION34_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION34_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 1 : Enable protection for region 33. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION33_Pos (1UL) /*!< Position of REGION33 field. */ -#define BPROT_CONFIG1_REGION33_Msk (0x1UL << BPROT_CONFIG1_REGION33_Pos) /*!< Bit mask of REGION33 field. */ -#define BPROT_CONFIG1_REGION33_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION33_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 0 : Enable protection for region 32. Write '0' has no effect. */ -#define BPROT_CONFIG1_REGION32_Pos (0UL) /*!< Position of REGION32 field. */ -#define BPROT_CONFIG1_REGION32_Msk (0x1UL << BPROT_CONFIG1_REGION32_Pos) /*!< Bit mask of REGION32 field. */ -#define BPROT_CONFIG1_REGION32_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG1_REGION32_Enabled (1UL) /*!< Protection enabled */ - -/* Register: BPROT_DISABLEINDEBUG */ -/* Description: Disable protection mechanism in debug interface mode */ - -/* Bit 0 : Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode. */ -#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ -#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ -#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Enable in debug */ -#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Disable in debug */ - -/* Register: BPROT_CONFIG2 */ -/* Description: Block protect configuration register 2 */ - -/* Bit 31 : Enable protection for region 95. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION95_Pos (31UL) /*!< Position of REGION95 field. */ -#define BPROT_CONFIG2_REGION95_Msk (0x1UL << BPROT_CONFIG2_REGION95_Pos) /*!< Bit mask of REGION95 field. */ -#define BPROT_CONFIG2_REGION95_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION95_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 30 : Enable protection for region 94. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION94_Pos (30UL) /*!< Position of REGION94 field. */ -#define BPROT_CONFIG2_REGION94_Msk (0x1UL << BPROT_CONFIG2_REGION94_Pos) /*!< Bit mask of REGION94 field. */ -#define BPROT_CONFIG2_REGION94_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION94_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 29 : Enable protection for region 93. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION93_Pos (29UL) /*!< Position of REGION93 field. */ -#define BPROT_CONFIG2_REGION93_Msk (0x1UL << BPROT_CONFIG2_REGION93_Pos) /*!< Bit mask of REGION93 field. */ -#define BPROT_CONFIG2_REGION93_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION93_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 28 : Enable protection for region 92. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION92_Pos (28UL) /*!< Position of REGION92 field. */ -#define BPROT_CONFIG2_REGION92_Msk (0x1UL << BPROT_CONFIG2_REGION92_Pos) /*!< Bit mask of REGION92 field. */ -#define BPROT_CONFIG2_REGION92_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION92_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 27 : Enable protection for region 91. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION91_Pos (27UL) /*!< Position of REGION91 field. */ -#define BPROT_CONFIG2_REGION91_Msk (0x1UL << BPROT_CONFIG2_REGION91_Pos) /*!< Bit mask of REGION91 field. */ -#define BPROT_CONFIG2_REGION91_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION91_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 26 : Enable protection for region 90. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION90_Pos (26UL) /*!< Position of REGION90 field. */ -#define BPROT_CONFIG2_REGION90_Msk (0x1UL << BPROT_CONFIG2_REGION90_Pos) /*!< Bit mask of REGION90 field. */ -#define BPROT_CONFIG2_REGION90_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION90_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 25 : Enable protection for region 89. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION89_Pos (25UL) /*!< Position of REGION89 field. */ -#define BPROT_CONFIG2_REGION89_Msk (0x1UL << BPROT_CONFIG2_REGION89_Pos) /*!< Bit mask of REGION89 field. */ -#define BPROT_CONFIG2_REGION89_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION89_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 24 : Enable protection for region 88. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION88_Pos (24UL) /*!< Position of REGION88 field. */ -#define BPROT_CONFIG2_REGION88_Msk (0x1UL << BPROT_CONFIG2_REGION88_Pos) /*!< Bit mask of REGION88 field. */ -#define BPROT_CONFIG2_REGION88_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION88_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 23 : Enable protection for region 87. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION87_Pos (23UL) /*!< Position of REGION87 field. */ -#define BPROT_CONFIG2_REGION87_Msk (0x1UL << BPROT_CONFIG2_REGION87_Pos) /*!< Bit mask of REGION87 field. */ -#define BPROT_CONFIG2_REGION87_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION87_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 22 : Enable protection for region 86. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION86_Pos (22UL) /*!< Position of REGION86 field. */ -#define BPROT_CONFIG2_REGION86_Msk (0x1UL << BPROT_CONFIG2_REGION86_Pos) /*!< Bit mask of REGION86 field. */ -#define BPROT_CONFIG2_REGION86_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION86_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 21 : Enable protection for region 85. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION85_Pos (21UL) /*!< Position of REGION85 field. */ -#define BPROT_CONFIG2_REGION85_Msk (0x1UL << BPROT_CONFIG2_REGION85_Pos) /*!< Bit mask of REGION85 field. */ -#define BPROT_CONFIG2_REGION85_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION85_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 20 : Enable protection for region 84. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION84_Pos (20UL) /*!< Position of REGION84 field. */ -#define BPROT_CONFIG2_REGION84_Msk (0x1UL << BPROT_CONFIG2_REGION84_Pos) /*!< Bit mask of REGION84 field. */ -#define BPROT_CONFIG2_REGION84_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION84_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 19 : Enable protection for region 83. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION83_Pos (19UL) /*!< Position of REGION83 field. */ -#define BPROT_CONFIG2_REGION83_Msk (0x1UL << BPROT_CONFIG2_REGION83_Pos) /*!< Bit mask of REGION83 field. */ -#define BPROT_CONFIG2_REGION83_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION83_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 18 : Enable protection for region 82. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION82_Pos (18UL) /*!< Position of REGION82 field. */ -#define BPROT_CONFIG2_REGION82_Msk (0x1UL << BPROT_CONFIG2_REGION82_Pos) /*!< Bit mask of REGION82 field. */ -#define BPROT_CONFIG2_REGION82_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION82_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 17 : Enable protection for region 81. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION81_Pos (17UL) /*!< Position of REGION81 field. */ -#define BPROT_CONFIG2_REGION81_Msk (0x1UL << BPROT_CONFIG2_REGION81_Pos) /*!< Bit mask of REGION81 field. */ -#define BPROT_CONFIG2_REGION81_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION81_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 16 : Enable protection for region 80. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION80_Pos (16UL) /*!< Position of REGION80 field. */ -#define BPROT_CONFIG2_REGION80_Msk (0x1UL << BPROT_CONFIG2_REGION80_Pos) /*!< Bit mask of REGION80 field. */ -#define BPROT_CONFIG2_REGION80_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION80_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 15 : Enable protection for region 79. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION79_Pos (15UL) /*!< Position of REGION79 field. */ -#define BPROT_CONFIG2_REGION79_Msk (0x1UL << BPROT_CONFIG2_REGION79_Pos) /*!< Bit mask of REGION79 field. */ -#define BPROT_CONFIG2_REGION79_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION79_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 14 : Enable protection for region 78. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION78_Pos (14UL) /*!< Position of REGION78 field. */ -#define BPROT_CONFIG2_REGION78_Msk (0x1UL << BPROT_CONFIG2_REGION78_Pos) /*!< Bit mask of REGION78 field. */ -#define BPROT_CONFIG2_REGION78_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION78_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 13 : Enable protection for region 77. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION77_Pos (13UL) /*!< Position of REGION77 field. */ -#define BPROT_CONFIG2_REGION77_Msk (0x1UL << BPROT_CONFIG2_REGION77_Pos) /*!< Bit mask of REGION77 field. */ -#define BPROT_CONFIG2_REGION77_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION77_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 12 : Enable protection for region 76. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION76_Pos (12UL) /*!< Position of REGION76 field. */ -#define BPROT_CONFIG2_REGION76_Msk (0x1UL << BPROT_CONFIG2_REGION76_Pos) /*!< Bit mask of REGION76 field. */ -#define BPROT_CONFIG2_REGION76_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION76_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 11 : Enable protection for region 75. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION75_Pos (11UL) /*!< Position of REGION75 field. */ -#define BPROT_CONFIG2_REGION75_Msk (0x1UL << BPROT_CONFIG2_REGION75_Pos) /*!< Bit mask of REGION75 field. */ -#define BPROT_CONFIG2_REGION75_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION75_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 10 : Enable protection for region 74. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION74_Pos (10UL) /*!< Position of REGION74 field. */ -#define BPROT_CONFIG2_REGION74_Msk (0x1UL << BPROT_CONFIG2_REGION74_Pos) /*!< Bit mask of REGION74 field. */ -#define BPROT_CONFIG2_REGION74_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION74_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 9 : Enable protection for region 73. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION73_Pos (9UL) /*!< Position of REGION73 field. */ -#define BPROT_CONFIG2_REGION73_Msk (0x1UL << BPROT_CONFIG2_REGION73_Pos) /*!< Bit mask of REGION73 field. */ -#define BPROT_CONFIG2_REGION73_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION73_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 8 : Enable protection for region 72. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION72_Pos (8UL) /*!< Position of REGION72 field. */ -#define BPROT_CONFIG2_REGION72_Msk (0x1UL << BPROT_CONFIG2_REGION72_Pos) /*!< Bit mask of REGION72 field. */ -#define BPROT_CONFIG2_REGION72_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION72_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 7 : Enable protection for region 71. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION71_Pos (7UL) /*!< Position of REGION71 field. */ -#define BPROT_CONFIG2_REGION71_Msk (0x1UL << BPROT_CONFIG2_REGION71_Pos) /*!< Bit mask of REGION71 field. */ -#define BPROT_CONFIG2_REGION71_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION71_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 6 : Enable protection for region 70. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION70_Pos (6UL) /*!< Position of REGION70 field. */ -#define BPROT_CONFIG2_REGION70_Msk (0x1UL << BPROT_CONFIG2_REGION70_Pos) /*!< Bit mask of REGION70 field. */ -#define BPROT_CONFIG2_REGION70_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION70_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 5 : Enable protection for region 69. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION69_Pos (5UL) /*!< Position of REGION69 field. */ -#define BPROT_CONFIG2_REGION69_Msk (0x1UL << BPROT_CONFIG2_REGION69_Pos) /*!< Bit mask of REGION69 field. */ -#define BPROT_CONFIG2_REGION69_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION69_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 4 : Enable protection for region 68. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION68_Pos (4UL) /*!< Position of REGION68 field. */ -#define BPROT_CONFIG2_REGION68_Msk (0x1UL << BPROT_CONFIG2_REGION68_Pos) /*!< Bit mask of REGION68 field. */ -#define BPROT_CONFIG2_REGION68_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION68_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 3 : Enable protection for region 67. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION67_Pos (3UL) /*!< Position of REGION67 field. */ -#define BPROT_CONFIG2_REGION67_Msk (0x1UL << BPROT_CONFIG2_REGION67_Pos) /*!< Bit mask of REGION67 field. */ -#define BPROT_CONFIG2_REGION67_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION67_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 2 : Enable protection for region 66. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION66_Pos (2UL) /*!< Position of REGION66 field. */ -#define BPROT_CONFIG2_REGION66_Msk (0x1UL << BPROT_CONFIG2_REGION66_Pos) /*!< Bit mask of REGION66 field. */ -#define BPROT_CONFIG2_REGION66_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION66_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 1 : Enable protection for region 65. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION65_Pos (1UL) /*!< Position of REGION65 field. */ -#define BPROT_CONFIG2_REGION65_Msk (0x1UL << BPROT_CONFIG2_REGION65_Pos) /*!< Bit mask of REGION65 field. */ -#define BPROT_CONFIG2_REGION65_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION65_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 0 : Enable protection for region 64. Write '0' has no effect. */ -#define BPROT_CONFIG2_REGION64_Pos (0UL) /*!< Position of REGION64 field. */ -#define BPROT_CONFIG2_REGION64_Msk (0x1UL << BPROT_CONFIG2_REGION64_Pos) /*!< Bit mask of REGION64 field. */ -#define BPROT_CONFIG2_REGION64_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG2_REGION64_Enabled (1UL) /*!< Protection enabled */ - -/* Register: BPROT_CONFIG3 */ -/* Description: Block protect configuration register 3 */ - -/* Bit 31 : Enable protection for region 127. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION127_Pos (31UL) /*!< Position of REGION127 field. */ -#define BPROT_CONFIG3_REGION127_Msk (0x1UL << BPROT_CONFIG3_REGION127_Pos) /*!< Bit mask of REGION127 field. */ -#define BPROT_CONFIG3_REGION127_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION127_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 30 : Enable protection for region 126. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION126_Pos (30UL) /*!< Position of REGION126 field. */ -#define BPROT_CONFIG3_REGION126_Msk (0x1UL << BPROT_CONFIG3_REGION126_Pos) /*!< Bit mask of REGION126 field. */ -#define BPROT_CONFIG3_REGION126_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION126_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 29 : Enable protection for region 125. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION125_Pos (29UL) /*!< Position of REGION125 field. */ -#define BPROT_CONFIG3_REGION125_Msk (0x1UL << BPROT_CONFIG3_REGION125_Pos) /*!< Bit mask of REGION125 field. */ -#define BPROT_CONFIG3_REGION125_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION125_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 28 : Enable protection for region 124. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION124_Pos (28UL) /*!< Position of REGION124 field. */ -#define BPROT_CONFIG3_REGION124_Msk (0x1UL << BPROT_CONFIG3_REGION124_Pos) /*!< Bit mask of REGION124 field. */ -#define BPROT_CONFIG3_REGION124_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION124_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 27 : Enable protection for region 123. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION123_Pos (27UL) /*!< Position of REGION123 field. */ -#define BPROT_CONFIG3_REGION123_Msk (0x1UL << BPROT_CONFIG3_REGION123_Pos) /*!< Bit mask of REGION123 field. */ -#define BPROT_CONFIG3_REGION123_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION123_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 26 : Enable protection for region 122. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION122_Pos (26UL) /*!< Position of REGION122 field. */ -#define BPROT_CONFIG3_REGION122_Msk (0x1UL << BPROT_CONFIG3_REGION122_Pos) /*!< Bit mask of REGION122 field. */ -#define BPROT_CONFIG3_REGION122_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION122_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 25 : Enable protection for region 121. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION121_Pos (25UL) /*!< Position of REGION121 field. */ -#define BPROT_CONFIG3_REGION121_Msk (0x1UL << BPROT_CONFIG3_REGION121_Pos) /*!< Bit mask of REGION121 field. */ -#define BPROT_CONFIG3_REGION121_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION121_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 24 : Enable protection for region 120. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION120_Pos (24UL) /*!< Position of REGION120 field. */ -#define BPROT_CONFIG3_REGION120_Msk (0x1UL << BPROT_CONFIG3_REGION120_Pos) /*!< Bit mask of REGION120 field. */ -#define BPROT_CONFIG3_REGION120_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION120_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 23 : Enable protection for region 119. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION119_Pos (23UL) /*!< Position of REGION119 field. */ -#define BPROT_CONFIG3_REGION119_Msk (0x1UL << BPROT_CONFIG3_REGION119_Pos) /*!< Bit mask of REGION119 field. */ -#define BPROT_CONFIG3_REGION119_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION119_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 22 : Enable protection for region 118. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION118_Pos (22UL) /*!< Position of REGION118 field. */ -#define BPROT_CONFIG3_REGION118_Msk (0x1UL << BPROT_CONFIG3_REGION118_Pos) /*!< Bit mask of REGION118 field. */ -#define BPROT_CONFIG3_REGION118_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION118_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 21 : Enable protection for region 117. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION117_Pos (21UL) /*!< Position of REGION117 field. */ -#define BPROT_CONFIG3_REGION117_Msk (0x1UL << BPROT_CONFIG3_REGION117_Pos) /*!< Bit mask of REGION117 field. */ -#define BPROT_CONFIG3_REGION117_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION117_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 20 : Enable protection for region 116. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION116_Pos (20UL) /*!< Position of REGION116 field. */ -#define BPROT_CONFIG3_REGION116_Msk (0x1UL << BPROT_CONFIG3_REGION116_Pos) /*!< Bit mask of REGION116 field. */ -#define BPROT_CONFIG3_REGION116_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION116_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 19 : Enable protection for region 115. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION115_Pos (19UL) /*!< Position of REGION115 field. */ -#define BPROT_CONFIG3_REGION115_Msk (0x1UL << BPROT_CONFIG3_REGION115_Pos) /*!< Bit mask of REGION115 field. */ -#define BPROT_CONFIG3_REGION115_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION115_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 18 : Enable protection for region 114. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION114_Pos (18UL) /*!< Position of REGION114 field. */ -#define BPROT_CONFIG3_REGION114_Msk (0x1UL << BPROT_CONFIG3_REGION114_Pos) /*!< Bit mask of REGION114 field. */ -#define BPROT_CONFIG3_REGION114_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION114_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 17 : Enable protection for region 113. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION113_Pos (17UL) /*!< Position of REGION113 field. */ -#define BPROT_CONFIG3_REGION113_Msk (0x1UL << BPROT_CONFIG3_REGION113_Pos) /*!< Bit mask of REGION113 field. */ -#define BPROT_CONFIG3_REGION113_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION113_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 16 : Enable protection for region 112. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION112_Pos (16UL) /*!< Position of REGION112 field. */ -#define BPROT_CONFIG3_REGION112_Msk (0x1UL << BPROT_CONFIG3_REGION112_Pos) /*!< Bit mask of REGION112 field. */ -#define BPROT_CONFIG3_REGION112_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION112_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 15 : Enable protection for region 111. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION111_Pos (15UL) /*!< Position of REGION111 field. */ -#define BPROT_CONFIG3_REGION111_Msk (0x1UL << BPROT_CONFIG3_REGION111_Pos) /*!< Bit mask of REGION111 field. */ -#define BPROT_CONFIG3_REGION111_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION111_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 14 : Enable protection for region 110. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION110_Pos (14UL) /*!< Position of REGION110 field. */ -#define BPROT_CONFIG3_REGION110_Msk (0x1UL << BPROT_CONFIG3_REGION110_Pos) /*!< Bit mask of REGION110 field. */ -#define BPROT_CONFIG3_REGION110_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION110_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 13 : Enable protection for region 109. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION109_Pos (13UL) /*!< Position of REGION109 field. */ -#define BPROT_CONFIG3_REGION109_Msk (0x1UL << BPROT_CONFIG3_REGION109_Pos) /*!< Bit mask of REGION109 field. */ -#define BPROT_CONFIG3_REGION109_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION109_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 12 : Enable protection for region 108. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION108_Pos (12UL) /*!< Position of REGION108 field. */ -#define BPROT_CONFIG3_REGION108_Msk (0x1UL << BPROT_CONFIG3_REGION108_Pos) /*!< Bit mask of REGION108 field. */ -#define BPROT_CONFIG3_REGION108_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION108_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 11 : Enable protection for region 107. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION107_Pos (11UL) /*!< Position of REGION107 field. */ -#define BPROT_CONFIG3_REGION107_Msk (0x1UL << BPROT_CONFIG3_REGION107_Pos) /*!< Bit mask of REGION107 field. */ -#define BPROT_CONFIG3_REGION107_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION107_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 10 : Enable protection for region 106. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION106_Pos (10UL) /*!< Position of REGION106 field. */ -#define BPROT_CONFIG3_REGION106_Msk (0x1UL << BPROT_CONFIG3_REGION106_Pos) /*!< Bit mask of REGION106 field. */ -#define BPROT_CONFIG3_REGION106_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION106_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 9 : Enable protection for region 105. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION105_Pos (9UL) /*!< Position of REGION105 field. */ -#define BPROT_CONFIG3_REGION105_Msk (0x1UL << BPROT_CONFIG3_REGION105_Pos) /*!< Bit mask of REGION105 field. */ -#define BPROT_CONFIG3_REGION105_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION105_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 8 : Enable protection for region 104. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION104_Pos (8UL) /*!< Position of REGION104 field. */ -#define BPROT_CONFIG3_REGION104_Msk (0x1UL << BPROT_CONFIG3_REGION104_Pos) /*!< Bit mask of REGION104 field. */ -#define BPROT_CONFIG3_REGION104_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION104_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 7 : Enable protection for region 103. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION103_Pos (7UL) /*!< Position of REGION103 field. */ -#define BPROT_CONFIG3_REGION103_Msk (0x1UL << BPROT_CONFIG3_REGION103_Pos) /*!< Bit mask of REGION103 field. */ -#define BPROT_CONFIG3_REGION103_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION103_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 6 : Enable protection for region 102. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION102_Pos (6UL) /*!< Position of REGION102 field. */ -#define BPROT_CONFIG3_REGION102_Msk (0x1UL << BPROT_CONFIG3_REGION102_Pos) /*!< Bit mask of REGION102 field. */ -#define BPROT_CONFIG3_REGION102_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION102_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 5 : Enable protection for region 101. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION101_Pos (5UL) /*!< Position of REGION101 field. */ -#define BPROT_CONFIG3_REGION101_Msk (0x1UL << BPROT_CONFIG3_REGION101_Pos) /*!< Bit mask of REGION101 field. */ -#define BPROT_CONFIG3_REGION101_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION101_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 4 : Enable protection for region 100. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION100_Pos (4UL) /*!< Position of REGION100 field. */ -#define BPROT_CONFIG3_REGION100_Msk (0x1UL << BPROT_CONFIG3_REGION100_Pos) /*!< Bit mask of REGION100 field. */ -#define BPROT_CONFIG3_REGION100_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION100_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 3 : Enable protection for region 99. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION99_Pos (3UL) /*!< Position of REGION99 field. */ -#define BPROT_CONFIG3_REGION99_Msk (0x1UL << BPROT_CONFIG3_REGION99_Pos) /*!< Bit mask of REGION99 field. */ -#define BPROT_CONFIG3_REGION99_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION99_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 2 : Enable protection for region 98. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION98_Pos (2UL) /*!< Position of REGION98 field. */ -#define BPROT_CONFIG3_REGION98_Msk (0x1UL << BPROT_CONFIG3_REGION98_Pos) /*!< Bit mask of REGION98 field. */ -#define BPROT_CONFIG3_REGION98_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION98_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 1 : Enable protection for region 97. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION97_Pos (1UL) /*!< Position of REGION97 field. */ -#define BPROT_CONFIG3_REGION97_Msk (0x1UL << BPROT_CONFIG3_REGION97_Pos) /*!< Bit mask of REGION97 field. */ -#define BPROT_CONFIG3_REGION97_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION97_Enabled (1UL) /*!< Protection enabled */ - -/* Bit 0 : Enable protection for region 96. Write '0' has no effect. */ -#define BPROT_CONFIG3_REGION96_Pos (0UL) /*!< Position of REGION96 field. */ -#define BPROT_CONFIG3_REGION96_Msk (0x1UL << BPROT_CONFIG3_REGION96_Pos) /*!< Bit mask of REGION96 field. */ -#define BPROT_CONFIG3_REGION96_Disabled (0UL) /*!< Protection disabled */ -#define BPROT_CONFIG3_REGION96_Enabled (1UL) /*!< Protection enabled */ - - -/* Peripheral: CCM */ -/* Description: AES CCM Mode Encryption */ - -/* Register: CCM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: CCM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for ERROR event */ -#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for ENDCRYPT event */ -#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for ENDKSGEN event */ -#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */ - -/* Register: CCM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for ERROR event */ -#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for ENDCRYPT event */ -#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for ENDKSGEN event */ -#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ -#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ -#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */ - -/* Register: CCM_MICSTATUS */ -/* Description: MIC check result */ - -/* Bit 0 : The result of the MIC check performed during the previous decryption operation */ -#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */ -#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */ - -/* Register: CCM_ENABLE */ -/* Description: Enable */ - -/* Bits 1..0 : Enable or disable CCM */ -#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ - -/* Register: CCM_MODE */ -/* Description: Operation mode */ - -/* Bit 24 : Packet length configuration */ -#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */ -#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ -#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field is 5-bit */ -#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field is 8-bit */ - -/* Bit 16 : Data rate that the CCM shall run in synch with */ -#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */ -#define CCM_MODE_DATARATE_Msk (0x1UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */ -#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< In synch with 1 Mbit data rate */ -#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< In synch with 2 Mbit data rate */ - -/* Bit 0 : The mode of operation to be used */ -#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */ -#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */ - -/* Register: CCM_CNFPTR */ -/* Description: Pointer to data structure holding AES key and NONCE vector */ - -/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */ -#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */ -#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */ - -/* Register: CCM_INPTR */ -/* Description: Input pointer */ - -/* Bits 31..0 : Input pointer */ -#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */ -#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */ - -/* Register: CCM_OUTPTR */ -/* Description: Output pointer */ - -/* Bits 31..0 : Output pointer */ -#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */ -#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */ - -/* Register: CCM_SCRATCHPTR */ -/* Description: Pointer to data area used for temporary storage */ - -/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption. */ -#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ -#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ - - -/* Peripheral: CLOCK */ -/* Description: Clock control */ - -/* Register: CLOCK_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 4 : Write '1' to Enable interrupt for CTTO event */ -#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for DONE event */ -#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for LFCLKSTARTED event */ -#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for HFCLKSTARTED event */ -#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */ - -/* Register: CLOCK_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 4 : Write '1' to Disable interrupt for CTTO event */ -#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for DONE event */ -#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for LFCLKSTARTED event */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for HFCLKSTARTED event */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */ - -/* Register: CLOCK_HFCLKRUN */ -/* Description: Status indicating that HFCLKSTART task has been triggered */ - -/* Bit 0 : HFCLKSTART task triggered or not */ -#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ -#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ - -/* Register: CLOCK_HFCLKSTAT */ -/* Description: HFCLK status */ - -/* Bit 16 : HFCLK state */ -#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */ -#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */ - -/* Bit 0 : Source of HFCLK */ -#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */ -#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */ - -/* Register: CLOCK_LFCLKRUN */ -/* Description: Status indicating that LFCLKSTART task has been triggered */ - -/* Bit 0 : LFCLKSTART task triggered or not */ -#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ -#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ - -/* Register: CLOCK_LFCLKSTAT */ -/* Description: LFCLK status */ - -/* Bit 16 : LFCLK state */ -#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */ -#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */ - -/* Bits 1..0 : Source of LFCLK */ -#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ - -/* Register: CLOCK_LFCLKSRCCOPY */ -/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ - -/* Bits 1..0 : Clock source */ -#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ - -/* Register: CLOCK_LFCLKSRC */ -/* Description: Clock source for the LFCLK */ - -/* Bit 17 : Enable or disable external source for LFCLK */ -#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */ -#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */ -#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */ -#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */ - -/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */ -#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */ -#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */ -#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */ -#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */ - -/* Bits 1..0 : Clock source */ -#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ -#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ -#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ - -/* Register: CLOCK_CTIV */ -/* Description: Calibration timer interval */ - -/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */ -#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ -#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ - -/* Register: CLOCK_TRACECONFIG */ -/* Description: Clocking options for the Trace Port debug interface */ - -/* Bits 17..16 : Pin multiplexing of trace signals. */ -#define CLOCK_TRACECONFIG_TRACEMUX_Pos (16UL) /*!< Position of TRACEMUX field. */ -#define CLOCK_TRACECONFIG_TRACEMUX_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos) /*!< Bit mask of TRACEMUX field. */ -#define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< GPIOs multiplexed onto all trace-pins */ -#define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins */ -#define CLOCK_TRACECONFIG_TRACEMUX_Parallel (2UL) /*!< TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14. */ - -/* Bits 1..0 : Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos (0UL) /*!< Position of TRACEPORTSPEED field. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) /*!< Bit mask of TRACEPORTSPEED field. */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz (0UL) /*!< 32 MHz Trace Port clock (TRACECLK = 16 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz (1UL) /*!< 16 MHz Trace Port clock (TRACECLK = 8 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz (2UL) /*!< 8 MHz Trace Port clock (TRACECLK = 4 MHz) */ -#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz (3UL) /*!< 4 MHz Trace Port clock (TRACECLK = 2 MHz) */ - - -/* Peripheral: COMP */ -/* Description: Comparator */ - -/* Register: COMP_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between CROSS event and STOP task */ -#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ -#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ -#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between UP event and STOP task */ -#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ -#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ -#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DOWN event and STOP task */ -#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ -#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ -#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between READY event and STOP task */ -#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ -#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ -#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and SAMPLE task */ -#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ -#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ -#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ -#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: COMP_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 3 : Enable or disable interrupt for CROSS event */ -#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for UP event */ -#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for DOWN event */ -#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for READY event */ -#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */ -#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */ - -/* Register: COMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ -#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for UP event */ -#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ -#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: COMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ -#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for UP event */ -#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ -#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ -#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ -#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: COMP_RESULT */ -/* Description: Compare result */ - -/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ -#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ -#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */ -#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */ - -/* Register: COMP_ENABLE */ -/* Description: COMP enable */ - -/* Bits 1..0 : Enable or disable COMP */ -#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ - -/* Register: COMP_PSEL */ -/* Description: Pin select */ - -/* Bits 2..0 : Analog pin select */ -#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ -#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ -#define COMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ - -/* Register: COMP_REFSEL */ -/* Description: Reference source select */ - -/* Bits 2..0 : Reference select */ -#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ -#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */ -#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */ -#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */ -#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */ -#define COMP_REFSEL_REFSEL_ARef (7UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */ - -/* Register: COMP_EXTREFSEL */ -/* Description: External reference select */ - -/* Bit 0 : External analog reference select */ -#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ -#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ -#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ - -/* Register: COMP_TH */ -/* Description: Threshold configuration for hysteresis unit */ - -/* Bits 13..8 : VUP = (THUP+1)/64*VREF */ -#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */ -#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */ - -/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */ -#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */ -#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */ - -/* Register: COMP_MODE */ -/* Description: Mode configuration */ - -/* Bit 8 : Main operation mode */ -#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */ -#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */ -#define COMP_MODE_MAIN_SE (0UL) /*!< Single ended mode */ -#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */ - -/* Bits 1..0 : Speed and power mode */ -#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */ -#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */ -#define COMP_MODE_SP_Low (0UL) /*!< Low power mode */ -#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */ -#define COMP_MODE_SP_High (2UL) /*!< High speed mode */ - -/* Register: COMP_HYST */ -/* Description: Comparator hysteresis enable */ - -/* Bit 0 : Comparator hysteresis */ -#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ -#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ -#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ -#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */ - -/* Register: COMP_ISOURCE */ -/* Description: Current source select on analog input */ - -/* Bits 1..0 : Comparator hysteresis */ -#define COMP_ISOURCE_ISOURCE_Pos (0UL) /*!< Position of ISOURCE field. */ -#define COMP_ISOURCE_ISOURCE_Msk (0x3UL << COMP_ISOURCE_ISOURCE_Pos) /*!< Bit mask of ISOURCE field. */ -#define COMP_ISOURCE_ISOURCE_Off (0UL) /*!< Current source disabled */ -#define COMP_ISOURCE_ISOURCE_Ien2mA5 (1UL) /*!< Current source enabled (+/- 2.5 uA) */ -#define COMP_ISOURCE_ISOURCE_Ien5mA (2UL) /*!< Current source enabled (+/- 5 uA) */ -#define COMP_ISOURCE_ISOURCE_Ien10mA (3UL) /*!< Current source enabled (+/- 10 uA) */ - - -/* Peripheral: ECB */ -/* Description: AES ECB Mode Encryption */ - -/* Register: ECB_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 1 : Write '1' to Enable interrupt for ERRORECB event */ -#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for ENDECB event */ -#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */ - -/* Register: ECB_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 1 : Write '1' to Disable interrupt for ERRORECB event */ -#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for ENDECB event */ -#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */ -#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */ -#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */ - -/* Register: ECB_ECBDATAPTR */ -/* Description: ECB block encrypt memory pointers */ - -/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */ -#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */ -#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */ - - -/* Peripheral: EGU */ -/* Description: Event Generator Unit 0 */ - -/* Register: EGU_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 15 : Enable or disable interrupt for TRIGGERED[15] event */ -#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for TRIGGERED[14] event */ -#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */ - -/* Bit 13 : Enable or disable interrupt for TRIGGERED[13] event */ -#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for TRIGGERED[12] event */ -#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for TRIGGERED[11] event */ -#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for TRIGGERED[10] event */ -#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for TRIGGERED[9] event */ -#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for TRIGGERED[8] event */ -#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for TRIGGERED[7] event */ -#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for TRIGGERED[6] event */ -#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for TRIGGERED[5] event */ -#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for TRIGGERED[4] event */ -#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for TRIGGERED[3] event */ -#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for TRIGGERED[2] event */ -#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for TRIGGERED[1] event */ -#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for TRIGGERED[0] event */ -#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */ -#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */ - -/* Register: EGU_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 15 : Write '1' to Enable interrupt for TRIGGERED[15] event */ -#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for TRIGGERED[14] event */ -#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for TRIGGERED[13] event */ -#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for TRIGGERED[12] event */ -#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for TRIGGERED[11] event */ -#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for TRIGGERED[10] event */ -#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for TRIGGERED[9] event */ -#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for TRIGGERED[8] event */ -#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TRIGGERED[7] event */ -#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for TRIGGERED[6] event */ -#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for TRIGGERED[5] event */ -#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for TRIGGERED[4] event */ -#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for TRIGGERED[3] event */ -#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for TRIGGERED[2] event */ -#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for TRIGGERED[1] event */ -#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for TRIGGERED[0] event */ -#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */ - -/* Register: EGU_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 15 : Write '1' to Disable interrupt for TRIGGERED[15] event */ -#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ -#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ -#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for TRIGGERED[14] event */ -#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ -#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ -#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for TRIGGERED[13] event */ -#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ -#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ -#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for TRIGGERED[12] event */ -#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ -#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ -#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for TRIGGERED[11] event */ -#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ -#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ -#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for TRIGGERED[10] event */ -#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ -#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ -#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for TRIGGERED[9] event */ -#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ -#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ -#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for TRIGGERED[8] event */ -#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ -#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ -#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TRIGGERED[7] event */ -#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ -#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ -#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for TRIGGERED[6] event */ -#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ -#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ -#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for TRIGGERED[5] event */ -#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ -#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ -#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for TRIGGERED[4] event */ -#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ -#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ -#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for TRIGGERED[3] event */ -#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ -#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ -#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for TRIGGERED[2] event */ -#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ -#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ -#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for TRIGGERED[1] event */ -#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ -#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ -#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for TRIGGERED[0] event */ -#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ -#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ -#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ -#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ -#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */ - - -/* Peripheral: FICR */ -/* Description: Factory Information Configuration Registers */ - -/* Register: FICR_CODEPAGESIZE */ -/* Description: Code memory page size */ - -/* Bits 31..0 : Code memory page size */ -#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */ -#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */ - -/* Register: FICR_CODESIZE */ -/* Description: Code memory size */ - -/* Bits 31..0 : Code memory size in number of pages */ -#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */ -#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */ - -/* Register: FICR_DEVICEID */ -/* Description: Description collection[0]: Device identifier */ - -/* Bits 31..0 : 64 bit unique device identifier */ -#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */ -#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */ - -/* Register: FICR_ER */ -/* Description: Description collection[0]: Encryption Root, word 0 */ - -/* Bits 31..0 : Encryption Root, word n */ -#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */ -#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */ - -/* Register: FICR_IR */ -/* Description: Description collection[0]: Identity Root, word 0 */ - -/* Bits 31..0 : Identity Root, word n */ -#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */ -#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */ - -/* Register: FICR_DEVICEADDRTYPE */ -/* Description: Device address type */ - -/* Bit 0 : Device address type */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */ - -/* Register: FICR_DEVICEADDR */ -/* Description: Description collection[0]: Device address 0 */ - -/* Bits 31..0 : 48 bit device address */ -#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */ -#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */ - -/* Register: FICR_INFO_PART */ -/* Description: Part code */ - -/* Bits 31..0 : Part code */ -#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ -#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ -#define FICR_INFO_PART_PART_N52832 (0x52832UL) /*!< nRF52832 */ -#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_VARIANT */ -/* Description: Part Variant, Hardware version and Production configuration */ - -/* Bits 31..0 : Part Variant, Hardware version and Production configuration, encoded as ASCII */ -#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */ -#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */ -#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */ -#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */ -#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_PACKAGE */ -/* Description: Package option */ - -/* Bits 31..0 : Package option */ -#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */ -#define FICR_INFO_PACKAGE_PACKAGE_CH (0x2001UL) /*!< CHxx - 7x8 WLCSP 56 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_CI (0x2002UL) /*!< CIxx - 7x8 WLCSP 56 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_RAM */ -/* Description: RAM variant */ - -/* Bits 31..0 : RAM variant */ -#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ -#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ -#define FICR_INFO_RAM_RAM_K16 (0x10UL) /*!< 16 kByte RAM */ -#define FICR_INFO_RAM_RAM_K32 (0x20UL) /*!< 32 kByte RAM */ -#define FICR_INFO_RAM_RAM_K64 (0x40UL) /*!< 64 kByte RAM */ -#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_FLASH */ -/* Description: Flash variant */ - -/* Bits 31..0 : Flash variant */ -#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_K128 (0x80UL) /*!< 128 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K256 (0x100UL) /*!< 256 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_K512 (0x200UL) /*!< 512 kByte FLASH */ -#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_TEMP_A0 */ -/* Description: Slope definition A0. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A1 */ -/* Description: Slope definition A1. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A2 */ -/* Description: Slope definition A2. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A3 */ -/* Description: Slope definition A3. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A4 */ -/* Description: Slope definition A4. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_A5 */ -/* Description: Slope definition A5. */ - -/* Bits 11..0 : A (slope definition) register. */ -#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */ -#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */ - -/* Register: FICR_TEMP_B0 */ -/* Description: y-intercept B0. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B1 */ -/* Description: y-intercept B1. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B2 */ -/* Description: y-intercept B2. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B3 */ -/* Description: y-intercept B3. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B4 */ -/* Description: y-intercept B4. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_B5 */ -/* Description: y-intercept B5. */ - -/* Bits 13..0 : B (y-intercept) */ -#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */ -#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */ - -/* Register: FICR_TEMP_T0 */ -/* Description: Segment end T0. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T1 */ -/* Description: Segment end T1. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T2 */ -/* Description: Segment end T2. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T3 */ -/* Description: Segment end T3. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_TEMP_T4 */ -/* Description: Segment end T4. */ - -/* Bits 7..0 : T (segment end)register. */ -#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */ -#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */ - -/* Register: FICR_NFC_TAGHEADER0 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 3 */ -#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */ -#define FICR_NFC_TAGHEADER0_UD3_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos) /*!< Bit mask of UD3 field. */ - -/* Bits 23..16 : Unique identifier byte 2 */ -#define FICR_NFC_TAGHEADER0_UD2_Pos (16UL) /*!< Position of UD2 field. */ -#define FICR_NFC_TAGHEADER0_UD2_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos) /*!< Bit mask of UD2 field. */ - -/* Bits 15..8 : Unique identifier byte 1 */ -#define FICR_NFC_TAGHEADER0_UD1_Pos (8UL) /*!< Position of UD1 field. */ -#define FICR_NFC_TAGHEADER0_UD1_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos) /*!< Bit mask of UD1 field. */ - -/* Bits 7..0 : Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F */ -#define FICR_NFC_TAGHEADER0_MFGID_Pos (0UL) /*!< Position of MFGID field. */ -#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */ - -/* Register: FICR_NFC_TAGHEADER1 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 7 */ -#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */ -#define FICR_NFC_TAGHEADER1_UD7_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos) /*!< Bit mask of UD7 field. */ - -/* Bits 23..16 : Unique identifier byte 6 */ -#define FICR_NFC_TAGHEADER1_UD6_Pos (16UL) /*!< Position of UD6 field. */ -#define FICR_NFC_TAGHEADER1_UD6_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos) /*!< Bit mask of UD6 field. */ - -/* Bits 15..8 : Unique identifier byte 5 */ -#define FICR_NFC_TAGHEADER1_UD5_Pos (8UL) /*!< Position of UD5 field. */ -#define FICR_NFC_TAGHEADER1_UD5_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos) /*!< Bit mask of UD5 field. */ - -/* Bits 7..0 : Unique identifier byte 4 */ -#define FICR_NFC_TAGHEADER1_UD4_Pos (0UL) /*!< Position of UD4 field. */ -#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */ - -/* Register: FICR_NFC_TAGHEADER2 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 11 */ -#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */ -#define FICR_NFC_TAGHEADER2_UD11_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos) /*!< Bit mask of UD11 field. */ - -/* Bits 23..16 : Unique identifier byte 10 */ -#define FICR_NFC_TAGHEADER2_UD10_Pos (16UL) /*!< Position of UD10 field. */ -#define FICR_NFC_TAGHEADER2_UD10_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos) /*!< Bit mask of UD10 field. */ - -/* Bits 15..8 : Unique identifier byte 9 */ -#define FICR_NFC_TAGHEADER2_UD9_Pos (8UL) /*!< Position of UD9 field. */ -#define FICR_NFC_TAGHEADER2_UD9_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos) /*!< Bit mask of UD9 field. */ - -/* Bits 7..0 : Unique identifier byte 8 */ -#define FICR_NFC_TAGHEADER2_UD8_Pos (0UL) /*!< Position of UD8 field. */ -#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */ - -/* Register: FICR_NFC_TAGHEADER3 */ -/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ - -/* Bits 31..24 : Unique identifier byte 15 */ -#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */ -#define FICR_NFC_TAGHEADER3_UD15_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos) /*!< Bit mask of UD15 field. */ - -/* Bits 23..16 : Unique identifier byte 14 */ -#define FICR_NFC_TAGHEADER3_UD14_Pos (16UL) /*!< Position of UD14 field. */ -#define FICR_NFC_TAGHEADER3_UD14_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos) /*!< Bit mask of UD14 field. */ - -/* Bits 15..8 : Unique identifier byte 13 */ -#define FICR_NFC_TAGHEADER3_UD13_Pos (8UL) /*!< Position of UD13 field. */ -#define FICR_NFC_TAGHEADER3_UD13_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos) /*!< Bit mask of UD13 field. */ - -/* Bits 7..0 : Unique identifier byte 12 */ -#define FICR_NFC_TAGHEADER3_UD12_Pos (0UL) /*!< Position of UD12 field. */ -#define FICR_NFC_TAGHEADER3_UD12_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos) /*!< Bit mask of UD12 field. */ - - -/* Peripheral: GPIOTE */ -/* Description: GPIO Tasks and Events */ - -/* Register: GPIOTE_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 31 : Write '1' to Enable interrupt for PORT event */ -#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for IN[7] event */ -#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */ -#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */ -#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for IN[6] event */ -#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */ -#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */ -#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for IN[5] event */ -#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */ -#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */ -#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for IN[4] event */ -#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */ -#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */ -#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for IN[3] event */ -#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for IN[2] event */ -#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for IN[1] event */ -#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for IN[0] event */ -#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */ - -/* Register: GPIOTE_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 31 : Write '1' to Disable interrupt for PORT event */ -#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for IN[7] event */ -#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */ -#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */ -#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for IN[6] event */ -#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */ -#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */ -#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for IN[5] event */ -#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */ -#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */ -#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for IN[4] event */ -#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */ -#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */ -#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for IN[3] event */ -#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for IN[2] event */ -#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for IN[1] event */ -#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for IN[0] event */ -#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */ -#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */ -#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */ - -/* Register: GPIOTE_CONFIG */ -/* Description: Description collection[0]: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */ - -/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */ -#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */ -#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */ - -/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */ -#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */ -#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */ -#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */ -#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */ - -/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */ -#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ -#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ - -/* Bits 1..0 : Mode */ -#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */ -#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */ -#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */ - - -/* Peripheral: I2S */ -/* Description: Inter-IC Sound */ - -/* Register: I2S_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 5 : Enable or disable interrupt for TXPTRUPD event */ -#define I2S_INTEN_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTEN_TXPTRUPD_Msk (0x1UL << I2S_INTEN_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTEN_TXPTRUPD_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_TXPTRUPD_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for STOPPED event */ -#define I2S_INTEN_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTEN_STOPPED_Msk (0x1UL << I2S_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for RXPTRUPD event */ -#define I2S_INTEN_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTEN_RXPTRUPD_Msk (0x1UL << I2S_INTEN_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTEN_RXPTRUPD_Disabled (0UL) /*!< Disable */ -#define I2S_INTEN_RXPTRUPD_Enabled (1UL) /*!< Enable */ - -/* Register: I2S_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 5 : Write '1' to Enable interrupt for TXPTRUPD event */ -#define I2S_INTENSET_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTENSET_TXPTRUPD_Msk (0x1UL << I2S_INTENSET_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTENSET_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_TXPTRUPD_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for STOPPED event */ -#define I2S_INTENSET_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTENSET_STOPPED_Msk (0x1UL << I2S_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for RXPTRUPD event */ -#define I2S_INTENSET_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTENSET_RXPTRUPD_Msk (0x1UL << I2S_INTENSET_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTENSET_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENSET_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENSET_RXPTRUPD_Set (1UL) /*!< Enable */ - -/* Register: I2S_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 5 : Write '1' to Disable interrupt for TXPTRUPD event */ -#define I2S_INTENCLR_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ -#define I2S_INTENCLR_TXPTRUPD_Msk (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ -#define I2S_INTENCLR_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_TXPTRUPD_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for STOPPED event */ -#define I2S_INTENCLR_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ -#define I2S_INTENCLR_STOPPED_Msk (0x1UL << I2S_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define I2S_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for RXPTRUPD event */ -#define I2S_INTENCLR_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ -#define I2S_INTENCLR_RXPTRUPD_Msk (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ -#define I2S_INTENCLR_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ -#define I2S_INTENCLR_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ -#define I2S_INTENCLR_RXPTRUPD_Clear (1UL) /*!< Disable */ - -/* Register: I2S_ENABLE */ -/* Description: Enable I2S module. */ - -/* Bit 0 : Enable I2S module. */ -#define I2S_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define I2S_ENABLE_ENABLE_Msk (0x1UL << I2S_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define I2S_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define I2S_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: I2S_CONFIG_MODE */ -/* Description: I2S mode. */ - -/* Bit 0 : I2S mode. */ -#define I2S_CONFIG_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define I2S_CONFIG_MODE_MODE_Msk (0x1UL << I2S_CONFIG_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define I2S_CONFIG_MODE_MODE_Master (0UL) /*!< Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx. */ -#define I2S_CONFIG_MODE_MODE_Slave (1UL) /*!< Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx */ - -/* Register: I2S_CONFIG_RXEN */ -/* Description: Reception (RX) enable. */ - -/* Bit 0 : Reception (RX) enable. */ -#define I2S_CONFIG_RXEN_RXEN_Pos (0UL) /*!< Position of RXEN field. */ -#define I2S_CONFIG_RXEN_RXEN_Msk (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos) /*!< Bit mask of RXEN field. */ -#define I2S_CONFIG_RXEN_RXEN_Disabled (0UL) /*!< Reception disabled and now data will be written to the RXD.PTR address. */ -#define I2S_CONFIG_RXEN_RXEN_Enabled (1UL) /*!< Reception enabled. */ - -/* Register: I2S_CONFIG_TXEN */ -/* Description: Transmission (TX) enable. */ - -/* Bit 0 : Transmission (TX) enable. */ -#define I2S_CONFIG_TXEN_TXEN_Pos (0UL) /*!< Position of TXEN field. */ -#define I2S_CONFIG_TXEN_TXEN_Msk (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos) /*!< Bit mask of TXEN field. */ -#define I2S_CONFIG_TXEN_TXEN_Disabled (0UL) /*!< Transmission disabled and now data will be read from the RXD.TXD address. */ -#define I2S_CONFIG_TXEN_TXEN_Enabled (1UL) /*!< Transmission enabled. */ - -/* Register: I2S_CONFIG_MCKEN */ -/* Description: Master clock generator enable. */ - -/* Bit 0 : Master clock generator enable. */ -#define I2S_CONFIG_MCKEN_MCKEN_Pos (0UL) /*!< Position of MCKEN field. */ -#define I2S_CONFIG_MCKEN_MCKEN_Msk (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos) /*!< Bit mask of MCKEN field. */ -#define I2S_CONFIG_MCKEN_MCKEN_Disabled (0UL) /*!< Master clock generator disabled and PSEL.MCK not connected(available as GPIO). */ -#define I2S_CONFIG_MCKEN_MCKEN_Enabled (1UL) /*!< Master clock generator running and MCK output on PSEL.MCK. */ - -/* Register: I2S_CONFIG_MCKFREQ */ -/* Description: Master clock generator frequency. */ - -/* Bits 31..0 : Master clock generator frequency. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos (0UL) /*!< Position of MCKFREQ field. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos) /*!< Bit mask of MCKFREQ field. */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 (0x020C0000UL) /*!< 32 MHz / 125 = 0.256 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63 (0x04100000UL) /*!< 32 MHz / 63 = 0.5079365 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42 (0x06000000UL) /*!< 32 MHz / 42 = 0.7619048 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32 (0x08000000UL) /*!< 32 MHz / 32 = 1.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31 (0x08400000UL) /*!< 32 MHz / 31 = 1.0322581 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30 (0x08800000UL) /*!< 32 MHz / 30 = 1.0666667 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23 (0x0B000000UL) /*!< 32 MHz / 23 = 1.3913043 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21 (0x0C000000UL) /*!< 32 MHz / 21 = 1.5238095 */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16 (0x10000000UL) /*!< 32 MHz / 16 = 2.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15 (0x11000000UL) /*!< 32 MHz / 15 = 2.1333333 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11 (0x16000000UL) /*!< 32 MHz / 11 = 2.9090909 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10 (0x18000000UL) /*!< 32 MHz / 10 = 3.2 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8 (0x20000000UL) /*!< 32 MHz / 8 = 4.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6 (0x28000000UL) /*!< 32 MHz / 6 = 5.3333333 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5 (0x30000000UL) /*!< 32 MHz / 5 = 6.4 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4 (0x40000000UL) /*!< 32 MHz / 4 = 8.0 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3 (0x50000000UL) /*!< 32 MHz / 3 = 10.6666667 MHz */ -#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2 (0x80000000UL) /*!< 32 MHz / 2 = 16.0 MHz */ - -/* Register: I2S_CONFIG_RATIO */ -/* Description: MCK / LRCK ratio. */ - -/* Bits 3..0 : MCK / LRCK ratio. */ -#define I2S_CONFIG_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ -#define I2S_CONFIG_RATIO_RATIO_Msk (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ -#define I2S_CONFIG_RATIO_RATIO_32X (0UL) /*!< LRCK = MCK / 32 */ -#define I2S_CONFIG_RATIO_RATIO_48X (1UL) /*!< LRCK = MCK / 48 */ -#define I2S_CONFIG_RATIO_RATIO_64X (2UL) /*!< LRCK = MCK / 64 */ -#define I2S_CONFIG_RATIO_RATIO_96X (3UL) /*!< LRCK = MCK / 96 */ -#define I2S_CONFIG_RATIO_RATIO_128X (4UL) /*!< LRCK = MCK / 128 */ -#define I2S_CONFIG_RATIO_RATIO_192X (5UL) /*!< LRCK = MCK / 192 */ -#define I2S_CONFIG_RATIO_RATIO_256X (6UL) /*!< LRCK = MCK / 256 */ -#define I2S_CONFIG_RATIO_RATIO_384X (7UL) /*!< LRCK = MCK / 384 */ -#define I2S_CONFIG_RATIO_RATIO_512X (8UL) /*!< LRCK = MCK / 512 */ - -/* Register: I2S_CONFIG_SWIDTH */ -/* Description: Sample width. */ - -/* Bits 1..0 : Sample width. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_Pos (0UL) /*!< Position of SWIDTH field. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_Msk (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos) /*!< Bit mask of SWIDTH field. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_8Bit (0UL) /*!< 8 bit. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_16Bit (1UL) /*!< 16 bit. */ -#define I2S_CONFIG_SWIDTH_SWIDTH_24Bit (2UL) /*!< 24 bit. */ - -/* Register: I2S_CONFIG_ALIGN */ -/* Description: Alignment of sample within a frame. */ - -/* Bit 0 : Alignment of sample within a frame. */ -#define I2S_CONFIG_ALIGN_ALIGN_Pos (0UL) /*!< Position of ALIGN field. */ -#define I2S_CONFIG_ALIGN_ALIGN_Msk (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos) /*!< Bit mask of ALIGN field. */ -#define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */ -#define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */ - -/* Register: I2S_CONFIG_FORMAT */ -/* Description: Frame format. */ - -/* Bit 0 : Frame format. */ -#define I2S_CONFIG_FORMAT_FORMAT_Pos (0UL) /*!< Position of FORMAT field. */ -#define I2S_CONFIG_FORMAT_FORMAT_Msk (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos) /*!< Bit mask of FORMAT field. */ -#define I2S_CONFIG_FORMAT_FORMAT_I2S (0UL) /*!< Original I2S format. */ -#define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */ - -/* Register: I2S_CONFIG_CHANNELS */ -/* Description: Enable channels. */ - -/* Bits 1..0 : Enable channels. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Pos (0UL) /*!< Position of CHANNELS field. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Msk (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos) /*!< Bit mask of CHANNELS field. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Stereo (0UL) /*!< Stereo. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Left (1UL) /*!< Left only. */ -#define I2S_CONFIG_CHANNELS_CHANNELS_Right (2UL) /*!< Right only. */ - -/* Register: I2S_RXD_PTR */ -/* Description: Receive buffer RAM start address. */ - -/* Bits 31..0 : Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address. */ -#define I2S_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define I2S_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: I2S_TXD_PTR */ -/* Description: Transmit buffer RAM start address. */ - -/* Bits 31..0 : Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address. */ -#define I2S_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define I2S_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: I2S_RXTXD_MAXCNT */ -/* Description: Size of RXD and TXD buffers. */ - -/* Bits 13..0 : Size of RXD and TXD buffers in number of 32 bit words. */ -#define I2S_RXTXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define I2S_RXTXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: I2S_PSEL_MCK */ -/* Description: Pin select for MCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_MCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_MCK_CONNECT_Msk (0x1UL << I2S_PSEL_MCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_MCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_MCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_MCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_MCK_PIN_Msk (0x1FUL << I2S_PSEL_MCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SCK */ -/* Description: Pin select for SCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SCK_CONNECT_Msk (0x1UL << I2S_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SCK_PIN_Msk (0x1FUL << I2S_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_LRCK */ -/* Description: Pin select for LRCK signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_LRCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_LRCK_CONNECT_Msk (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_LRCK_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_LRCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_LRCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_LRCK_PIN_Msk (0x1FUL << I2S_PSEL_LRCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SDIN */ -/* Description: Pin select for SDIN signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SDIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SDIN_CONNECT_Msk (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SDIN_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SDIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SDIN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SDIN_PIN_Msk (0x1FUL << I2S_PSEL_SDIN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: I2S_PSEL_SDOUT */ -/* Description: Pin select for SDOUT signal. */ - -/* Bit 31 : Connection */ -#define I2S_PSEL_SDOUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define I2S_PSEL_SDOUT_CONNECT_Msk (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define I2S_PSEL_SDOUT_CONNECT_Connected (0UL) /*!< Connect */ -#define I2S_PSEL_SDOUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define I2S_PSEL_SDOUT_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define I2S_PSEL_SDOUT_PIN_Msk (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos) /*!< Bit mask of PIN field. */ - - -/* Peripheral: LPCOMP */ -/* Description: Low Power Comparator */ - -/* Register: LPCOMP_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between CROSS event and STOP task */ -#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between UP event and STOP task */ -#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DOWN event and STOP task */ -#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between READY event and STOP task */ -#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and SAMPLE task */ -#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ -#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: LPCOMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ -#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for UP event */ -#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ -#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: LPCOMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ -#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for UP event */ -#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ -#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: LPCOMP_RESULT */ -/* Description: Compare result */ - -/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ -#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */ -#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */ - -/* Register: LPCOMP_ENABLE */ -/* Description: Enable LPCOMP */ - -/* Bits 1..0 : Enable or disable LPCOMP */ -#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define LPCOMP_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: LPCOMP_PSEL */ -/* Description: Input pin select */ - -/* Bits 2..0 : Analog pin select */ -#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ -#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ -#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ - -/* Register: LPCOMP_REFSEL */ -/* Description: Reference select */ - -/* Bits 3..0 : Reference select */ -#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_Msk (0xFUL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd (0UL) /*!< VDD * 1/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd (1UL) /*!< VDD * 2/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd (2UL) /*!< VDD * 3/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd (3UL) /*!< VDD * 4/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd (4UL) /*!< VDD * 5/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd (5UL) /*!< VDD * 6/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd (6UL) /*!< VDD * 7/8 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< External analog reference selected */ -#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd (8UL) /*!< VDD * 1/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd (9UL) /*!< VDD * 3/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd (10UL) /*!< VDD * 5/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd (11UL) /*!< VDD * 7/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd (12UL) /*!< VDD * 9/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd (13UL) /*!< VDD * 11/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd (14UL) /*!< VDD * 13/16 selected as reference */ -#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd (15UL) /*!< VDD * 15/16 selected as reference */ - -/* Register: LPCOMP_EXTREFSEL */ -/* Description: External reference select */ - -/* Bit 0 : External analog reference select */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ - -/* Register: LPCOMP_ANADETECT */ -/* Description: Analog detect configuration */ - -/* Bits 1..0 : Analog detect configuration */ -#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETECT on crossing, both upward crossing and downward crossing */ -#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETECT on upward crossing only */ -#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETECT on downward crossing only */ - -/* Register: LPCOMP_HYST */ -/* Description: Comparator hysteresis enable */ - -/* Bit 0 : Comparator hysteresis enable */ -#define LPCOMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ -#define LPCOMP_HYST_HYST_Msk (0x1UL << LPCOMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ -#define LPCOMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ -#define LPCOMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis disabled (typ. 50 mV) */ - - -/* Peripheral: MWU */ -/* Description: Memory Watch Unit */ - -/* Register: MWU_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 27 : Enable or disable interrupt for PREGION[1].RA event */ -#define MWU_INTEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTEN_PREGION1RA_Msk (0x1UL << MWU_INTEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTEN_PREGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 26 : Enable or disable interrupt for PREGION[1].WA event */ -#define MWU_INTEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTEN_PREGION1WA_Msk (0x1UL << MWU_INTEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTEN_PREGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable interrupt for PREGION[0].RA event */ -#define MWU_INTEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTEN_PREGION0RA_Msk (0x1UL << MWU_INTEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTEN_PREGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : Enable or disable interrupt for PREGION[0].WA event */ -#define MWU_INTEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTEN_PREGION0WA_Msk (0x1UL << MWU_INTEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTEN_PREGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_PREGION0WA_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for REGION[3].RA event */ -#define MWU_INTEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTEN_REGION3RA_Msk (0x1UL << MWU_INTEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTEN_REGION3RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION3RA_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for REGION[3].WA event */ -#define MWU_INTEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTEN_REGION3WA_Msk (0x1UL << MWU_INTEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTEN_REGION3WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION3WA_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for REGION[2].RA event */ -#define MWU_INTEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTEN_REGION2RA_Msk (0x1UL << MWU_INTEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTEN_REGION2RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION2RA_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for REGION[2].WA event */ -#define MWU_INTEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTEN_REGION2WA_Msk (0x1UL << MWU_INTEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTEN_REGION2WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION2WA_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for REGION[1].RA event */ -#define MWU_INTEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTEN_REGION1RA_Msk (0x1UL << MWU_INTEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTEN_REGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for REGION[1].WA event */ -#define MWU_INTEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTEN_REGION1WA_Msk (0x1UL << MWU_INTEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTEN_REGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for REGION[0].RA event */ -#define MWU_INTEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTEN_REGION0RA_Msk (0x1UL << MWU_INTEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTEN_REGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for REGION[0].WA event */ -#define MWU_INTEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTEN_REGION0WA_Msk (0x1UL << MWU_INTEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTEN_REGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_INTEN_REGION0WA_Enabled (1UL) /*!< Enable */ - -/* Register: MWU_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 27 : Write '1' to Enable interrupt for PREGION[1].RA event */ -#define MWU_INTENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTENSET_PREGION1RA_Msk (0x1UL << MWU_INTENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 26 : Write '1' to Enable interrupt for PREGION[1].WA event */ -#define MWU_INTENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTENSET_PREGION1WA_Msk (0x1UL << MWU_INTENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable interrupt for PREGION[0].RA event */ -#define MWU_INTENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTENSET_PREGION0RA_Msk (0x1UL << MWU_INTENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 24 : Write '1' to Enable interrupt for PREGION[0].WA event */ -#define MWU_INTENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTENSET_PREGION0WA_Msk (0x1UL << MWU_INTENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_PREGION0WA_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for REGION[3].RA event */ -#define MWU_INTENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTENSET_REGION3RA_Msk (0x1UL << MWU_INTENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION3RA_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for REGION[3].WA event */ -#define MWU_INTENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTENSET_REGION3WA_Msk (0x1UL << MWU_INTENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION3WA_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for REGION[2].RA event */ -#define MWU_INTENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTENSET_REGION2RA_Msk (0x1UL << MWU_INTENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION2RA_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for REGION[2].WA event */ -#define MWU_INTENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTENSET_REGION2WA_Msk (0x1UL << MWU_INTENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION2WA_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for REGION[1].RA event */ -#define MWU_INTENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTENSET_REGION1RA_Msk (0x1UL << MWU_INTENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for REGION[1].WA event */ -#define MWU_INTENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTENSET_REGION1WA_Msk (0x1UL << MWU_INTENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for REGION[0].RA event */ -#define MWU_INTENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTENSET_REGION0RA_Msk (0x1UL << MWU_INTENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for REGION[0].WA event */ -#define MWU_INTENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTENSET_REGION0WA_Msk (0x1UL << MWU_INTENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENSET_REGION0WA_Set (1UL) /*!< Enable */ - -/* Register: MWU_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 27 : Write '1' to Disable interrupt for PREGION[1].RA event */ -#define MWU_INTENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_INTENCLR_PREGION1RA_Msk (0x1UL << MWU_INTENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_INTENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 26 : Write '1' to Disable interrupt for PREGION[1].WA event */ -#define MWU_INTENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_INTENCLR_PREGION1WA_Msk (0x1UL << MWU_INTENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_INTENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable interrupt for PREGION[0].RA event */ -#define MWU_INTENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_INTENCLR_PREGION0RA_Msk (0x1UL << MWU_INTENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_INTENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 24 : Write '1' to Disable interrupt for PREGION[0].WA event */ -#define MWU_INTENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_INTENCLR_PREGION0WA_Msk (0x1UL << MWU_INTENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_INTENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for REGION[3].RA event */ -#define MWU_INTENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_INTENCLR_REGION3RA_Msk (0x1UL << MWU_INTENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_INTENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION3RA_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for REGION[3].WA event */ -#define MWU_INTENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_INTENCLR_REGION3WA_Msk (0x1UL << MWU_INTENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_INTENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION3WA_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for REGION[2].RA event */ -#define MWU_INTENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_INTENCLR_REGION2RA_Msk (0x1UL << MWU_INTENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_INTENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION2RA_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for REGION[2].WA event */ -#define MWU_INTENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_INTENCLR_REGION2WA_Msk (0x1UL << MWU_INTENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_INTENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION2WA_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for REGION[1].RA event */ -#define MWU_INTENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_INTENCLR_REGION1RA_Msk (0x1UL << MWU_INTENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_INTENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for REGION[1].WA event */ -#define MWU_INTENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_INTENCLR_REGION1WA_Msk (0x1UL << MWU_INTENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_INTENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for REGION[0].RA event */ -#define MWU_INTENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_INTENCLR_REGION0RA_Msk (0x1UL << MWU_INTENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_INTENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for REGION[0].WA event */ -#define MWU_INTENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_INTENCLR_REGION0WA_Msk (0x1UL << MWU_INTENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_INTENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_INTENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_INTENCLR_REGION0WA_Clear (1UL) /*!< Disable */ - -/* Register: MWU_NMIEN */ -/* Description: Enable or disable non-maskable interrupt */ - -/* Bit 27 : Enable or disable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIEN_PREGION1RA_Msk (0x1UL << MWU_NMIEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIEN_PREGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 26 : Enable or disable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIEN_PREGION1WA_Msk (0x1UL << MWU_NMIEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIEN_PREGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIEN_PREGION0RA_Msk (0x1UL << MWU_NMIEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIEN_PREGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : Enable or disable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIEN_PREGION0WA_Msk (0x1UL << MWU_NMIEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIEN_PREGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_PREGION0WA_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIEN_REGION3RA_Msk (0x1UL << MWU_NMIEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIEN_REGION3RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION3RA_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIEN_REGION3WA_Msk (0x1UL << MWU_NMIEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIEN_REGION3WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION3WA_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIEN_REGION2RA_Msk (0x1UL << MWU_NMIEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIEN_REGION2RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION2RA_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIEN_REGION2WA_Msk (0x1UL << MWU_NMIEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIEN_REGION2WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION2WA_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIEN_REGION1RA_Msk (0x1UL << MWU_NMIEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIEN_REGION1RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION1RA_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIEN_REGION1WA_Msk (0x1UL << MWU_NMIEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIEN_REGION1WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION1WA_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIEN_REGION0RA_Msk (0x1UL << MWU_NMIEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIEN_REGION0RA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION0RA_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIEN_REGION0WA_Msk (0x1UL << MWU_NMIEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIEN_REGION0WA_Disabled (0UL) /*!< Disable */ -#define MWU_NMIEN_REGION0WA_Enabled (1UL) /*!< Enable */ - -/* Register: MWU_NMIENSET */ -/* Description: Enable non-maskable interrupt */ - -/* Bit 27 : Write '1' to Enable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIENSET_PREGION1RA_Msk (0x1UL << MWU_NMIENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 26 : Write '1' to Enable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIENSET_PREGION1WA_Msk (0x1UL << MWU_NMIENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIENSET_PREGION0RA_Msk (0x1UL << MWU_NMIENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 24 : Write '1' to Enable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIENSET_PREGION0WA_Msk (0x1UL << MWU_NMIENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_PREGION0WA_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIENSET_REGION3RA_Msk (0x1UL << MWU_NMIENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION3RA_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIENSET_REGION3WA_Msk (0x1UL << MWU_NMIENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION3WA_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIENSET_REGION2RA_Msk (0x1UL << MWU_NMIENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION2RA_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIENSET_REGION2WA_Msk (0x1UL << MWU_NMIENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION2WA_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIENSET_REGION1RA_Msk (0x1UL << MWU_NMIENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION1RA_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIENSET_REGION1WA_Msk (0x1UL << MWU_NMIENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION1WA_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIENSET_REGION0RA_Msk (0x1UL << MWU_NMIENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION0RA_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIENSET_REGION0WA_Msk (0x1UL << MWU_NMIENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENSET_REGION0WA_Set (1UL) /*!< Enable */ - -/* Register: MWU_NMIENCLR */ -/* Description: Disable non-maskable interrupt */ - -/* Bit 27 : Write '1' to Disable non-maskable interrupt for PREGION[1].RA event */ -#define MWU_NMIENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ -#define MWU_NMIENCLR_PREGION1RA_Msk (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ -#define MWU_NMIENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 26 : Write '1' to Disable non-maskable interrupt for PREGION[1].WA event */ -#define MWU_NMIENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ -#define MWU_NMIENCLR_PREGION1WA_Msk (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ -#define MWU_NMIENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable non-maskable interrupt for PREGION[0].RA event */ -#define MWU_NMIENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ -#define MWU_NMIENCLR_PREGION0RA_Msk (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ -#define MWU_NMIENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 24 : Write '1' to Disable non-maskable interrupt for PREGION[0].WA event */ -#define MWU_NMIENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ -#define MWU_NMIENCLR_PREGION0WA_Msk (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ -#define MWU_NMIENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable non-maskable interrupt for REGION[3].RA event */ -#define MWU_NMIENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ -#define MWU_NMIENCLR_REGION3RA_Msk (0x1UL << MWU_NMIENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ -#define MWU_NMIENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION3RA_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable non-maskable interrupt for REGION[3].WA event */ -#define MWU_NMIENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ -#define MWU_NMIENCLR_REGION3WA_Msk (0x1UL << MWU_NMIENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ -#define MWU_NMIENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION3WA_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable non-maskable interrupt for REGION[2].RA event */ -#define MWU_NMIENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ -#define MWU_NMIENCLR_REGION2RA_Msk (0x1UL << MWU_NMIENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ -#define MWU_NMIENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION2RA_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable non-maskable interrupt for REGION[2].WA event */ -#define MWU_NMIENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ -#define MWU_NMIENCLR_REGION2WA_Msk (0x1UL << MWU_NMIENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ -#define MWU_NMIENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION2WA_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable non-maskable interrupt for REGION[1].RA event */ -#define MWU_NMIENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ -#define MWU_NMIENCLR_REGION1RA_Msk (0x1UL << MWU_NMIENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ -#define MWU_NMIENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION1RA_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable non-maskable interrupt for REGION[1].WA event */ -#define MWU_NMIENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ -#define MWU_NMIENCLR_REGION1WA_Msk (0x1UL << MWU_NMIENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ -#define MWU_NMIENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION1WA_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable non-maskable interrupt for REGION[0].RA event */ -#define MWU_NMIENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ -#define MWU_NMIENCLR_REGION0RA_Msk (0x1UL << MWU_NMIENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ -#define MWU_NMIENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION0RA_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable non-maskable interrupt for REGION[0].WA event */ -#define MWU_NMIENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ -#define MWU_NMIENCLR_REGION0WA_Msk (0x1UL << MWU_NMIENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ -#define MWU_NMIENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ -#define MWU_NMIENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ -#define MWU_NMIENCLR_REGION0WA_Clear (1UL) /*!< Disable */ - -/* Register: MWU_PERREGION_SUBSTATWA */ -/* Description: Description cluster[0]: Source of event/interrupt in region 0, write access detected while corresponding subregion was enabled for watching */ - -/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PERREGION_SUBSTATWA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR31_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PERREGION_SUBSTATWA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR30_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PERREGION_SUBSTATWA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR29_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PERREGION_SUBSTATWA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR28_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PERREGION_SUBSTATWA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR27_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PERREGION_SUBSTATWA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR26_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PERREGION_SUBSTATWA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR25_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PERREGION_SUBSTATWA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR24_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PERREGION_SUBSTATWA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR23_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PERREGION_SUBSTATWA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR22_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PERREGION_SUBSTATWA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR21_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PERREGION_SUBSTATWA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR20_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PERREGION_SUBSTATWA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR19_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PERREGION_SUBSTATWA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR18_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PERREGION_SUBSTATWA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR17_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PERREGION_SUBSTATWA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR16_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PERREGION_SUBSTATWA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR15_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PERREGION_SUBSTATWA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR14_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PERREGION_SUBSTATWA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR13_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PERREGION_SUBSTATWA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR12_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PERREGION_SUBSTATWA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR11_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PERREGION_SUBSTATWA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR10_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PERREGION_SUBSTATWA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR9_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PERREGION_SUBSTATWA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR8_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PERREGION_SUBSTATWA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR7_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PERREGION_SUBSTATWA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR6_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PERREGION_SUBSTATWA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR5_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PERREGION_SUBSTATWA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR4_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PERREGION_SUBSTATWA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR3_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PERREGION_SUBSTATWA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR2_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PERREGION_SUBSTATWA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR1_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATWA_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PERREGION_SUBSTATWA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess (0UL) /*!< No write access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATWA_SR0_Access (1UL) /*!< Write access(es) occurred in this subregion */ - -/* Register: MWU_PERREGION_SUBSTATRA */ -/* Description: Description cluster[0]: Source of event/interrupt in region 0, read access detected while corresponding subregion was enabled for watching */ - -/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PERREGION_SUBSTATRA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR31_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PERREGION_SUBSTATRA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR30_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PERREGION_SUBSTATRA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR29_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PERREGION_SUBSTATRA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR28_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PERREGION_SUBSTATRA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR27_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PERREGION_SUBSTATRA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR26_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PERREGION_SUBSTATRA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR25_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PERREGION_SUBSTATRA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR24_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PERREGION_SUBSTATRA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR23_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PERREGION_SUBSTATRA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR22_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PERREGION_SUBSTATRA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR21_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PERREGION_SUBSTATRA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR20_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PERREGION_SUBSTATRA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR19_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PERREGION_SUBSTATRA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR18_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PERREGION_SUBSTATRA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR17_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PERREGION_SUBSTATRA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR16_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PERREGION_SUBSTATRA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR15_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PERREGION_SUBSTATRA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR14_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PERREGION_SUBSTATRA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR13_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PERREGION_SUBSTATRA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR12_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PERREGION_SUBSTATRA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR11_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PERREGION_SUBSTATRA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR10_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PERREGION_SUBSTATRA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR9_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PERREGION_SUBSTATRA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR8_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PERREGION_SUBSTATRA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR7_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PERREGION_SUBSTATRA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR6_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PERREGION_SUBSTATRA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR5_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PERREGION_SUBSTATRA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR4_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PERREGION_SUBSTATRA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR3_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PERREGION_SUBSTATRA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR2_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PERREGION_SUBSTATRA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR1_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ -#define MWU_PERREGION_SUBSTATRA_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PERREGION_SUBSTATRA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess (0UL) /*!< No read access occurred in this subregion */ -#define MWU_PERREGION_SUBSTATRA_SR0_Access (1UL) /*!< Read access(es) occurred in this subregion */ - -/* Register: MWU_REGIONEN */ -/* Description: Enable/disable regions watch */ - -/* Bit 27 : Enable/disable read access watch in PREGION[1] */ -#define MWU_REGIONEN_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONEN_PRGN1RA_Msk (0x1UL << MWU_REGIONEN_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONEN_PRGN1RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ -#define MWU_REGIONEN_PRGN1RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 26 : Enable/disable write access watch in PREGION[1] */ -#define MWU_REGIONEN_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONEN_PRGN1WA_Msk (0x1UL << MWU_REGIONEN_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONEN_PRGN1WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ -#define MWU_REGIONEN_PRGN1WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 25 : Enable/disable read access watch in PREGION[0] */ -#define MWU_REGIONEN_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONEN_PRGN0RA_Msk (0x1UL << MWU_REGIONEN_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONEN_PRGN0RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ -#define MWU_REGIONEN_PRGN0RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 24 : Enable/disable write access watch in PREGION[0] */ -#define MWU_REGIONEN_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONEN_PRGN0WA_Msk (0x1UL << MWU_REGIONEN_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONEN_PRGN0WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ -#define MWU_REGIONEN_PRGN0WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 7 : Enable/disable read access watch in region[3] */ -#define MWU_REGIONEN_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONEN_RGN3RA_Msk (0x1UL << MWU_REGIONEN_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONEN_RGN3RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN3RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 6 : Enable/disable write access watch in region[3] */ -#define MWU_REGIONEN_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONEN_RGN3WA_Msk (0x1UL << MWU_REGIONEN_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONEN_RGN3WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN3WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 5 : Enable/disable read access watch in region[2] */ -#define MWU_REGIONEN_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONEN_RGN2RA_Msk (0x1UL << MWU_REGIONEN_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONEN_RGN2RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN2RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 4 : Enable/disable write access watch in region[2] */ -#define MWU_REGIONEN_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONEN_RGN2WA_Msk (0x1UL << MWU_REGIONEN_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONEN_RGN2WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN2WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 3 : Enable/disable read access watch in region[1] */ -#define MWU_REGIONEN_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONEN_RGN1RA_Msk (0x1UL << MWU_REGIONEN_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONEN_RGN1RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN1RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 2 : Enable/disable write access watch in region[1] */ -#define MWU_REGIONEN_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONEN_RGN1WA_Msk (0x1UL << MWU_REGIONEN_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONEN_RGN1WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN1WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Bit 1 : Enable/disable read access watch in region[0] */ -#define MWU_REGIONEN_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONEN_RGN0RA_Msk (0x1UL << MWU_REGIONEN_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONEN_RGN0RA_Disable (0UL) /*!< Disable read access watch in this region */ -#define MWU_REGIONEN_RGN0RA_Enable (1UL) /*!< Enable read access watch in this region */ - -/* Bit 0 : Enable/disable write access watch in region[0] */ -#define MWU_REGIONEN_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONEN_RGN0WA_Msk (0x1UL << MWU_REGIONEN_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONEN_RGN0WA_Disable (0UL) /*!< Disable write access watch in this region */ -#define MWU_REGIONEN_RGN0WA_Enable (1UL) /*!< Enable write access watch in this region */ - -/* Register: MWU_REGIONENSET */ -/* Description: Enable regions watch */ - -/* Bit 27 : Enable read access watch in PREGION[1] */ -#define MWU_REGIONENSET_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONENSET_PRGN1RA_Msk (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONENSET_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN1RA_Set (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 26 : Enable write access watch in PREGION[1] */ -#define MWU_REGIONENSET_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONENSET_PRGN1WA_Msk (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONENSET_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN1WA_Set (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 25 : Enable read access watch in PREGION[0] */ -#define MWU_REGIONENSET_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONENSET_PRGN0RA_Msk (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONENSET_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN0RA_Set (1UL) /*!< Enable read access watch in this PREGION */ - -/* Bit 24 : Enable write access watch in PREGION[0] */ -#define MWU_REGIONENSET_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONENSET_PRGN0WA_Msk (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONENSET_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENSET_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENSET_PRGN0WA_Set (1UL) /*!< Enable write access watch in this PREGION */ - -/* Bit 7 : Enable read access watch in region[3] */ -#define MWU_REGIONENSET_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONENSET_RGN3RA_Msk (0x1UL << MWU_REGIONENSET_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONENSET_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN3RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 6 : Enable write access watch in region[3] */ -#define MWU_REGIONENSET_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONENSET_RGN3WA_Msk (0x1UL << MWU_REGIONENSET_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONENSET_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN3WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 5 : Enable read access watch in region[2] */ -#define MWU_REGIONENSET_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONENSET_RGN2RA_Msk (0x1UL << MWU_REGIONENSET_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONENSET_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN2RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 4 : Enable write access watch in region[2] */ -#define MWU_REGIONENSET_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONENSET_RGN2WA_Msk (0x1UL << MWU_REGIONENSET_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONENSET_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN2WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 3 : Enable read access watch in region[1] */ -#define MWU_REGIONENSET_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONENSET_RGN1RA_Msk (0x1UL << MWU_REGIONENSET_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONENSET_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN1RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 2 : Enable write access watch in region[1] */ -#define MWU_REGIONENSET_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONENSET_RGN1WA_Msk (0x1UL << MWU_REGIONENSET_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONENSET_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN1WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Bit 1 : Enable read access watch in region[0] */ -#define MWU_REGIONENSET_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONENSET_RGN0RA_Msk (0x1UL << MWU_REGIONENSET_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONENSET_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN0RA_Set (1UL) /*!< Enable read access watch in this region */ - -/* Bit 0 : Enable write access watch in region[0] */ -#define MWU_REGIONENSET_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONENSET_RGN0WA_Msk (0x1UL << MWU_REGIONENSET_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONENSET_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENSET_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENSET_RGN0WA_Set (1UL) /*!< Enable write access watch in this region */ - -/* Register: MWU_REGIONENCLR */ -/* Description: Disable regions watch */ - -/* Bit 27 : Disable read access watch in PREGION[1] */ -#define MWU_REGIONENCLR_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ -#define MWU_REGIONENCLR_PRGN1RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ -#define MWU_REGIONENCLR_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN1RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ - -/* Bit 26 : Disable write access watch in PREGION[1] */ -#define MWU_REGIONENCLR_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ -#define MWU_REGIONENCLR_PRGN1WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ -#define MWU_REGIONENCLR_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN1WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ - -/* Bit 25 : Disable read access watch in PREGION[0] */ -#define MWU_REGIONENCLR_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ -#define MWU_REGIONENCLR_PRGN0RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ -#define MWU_REGIONENCLR_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN0RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ - -/* Bit 24 : Disable write access watch in PREGION[0] */ -#define MWU_REGIONENCLR_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ -#define MWU_REGIONENCLR_PRGN0WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ -#define MWU_REGIONENCLR_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ -#define MWU_REGIONENCLR_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ -#define MWU_REGIONENCLR_PRGN0WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ - -/* Bit 7 : Disable read access watch in region[3] */ -#define MWU_REGIONENCLR_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ -#define MWU_REGIONENCLR_RGN3RA_Msk (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ -#define MWU_REGIONENCLR_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN3RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 6 : Disable write access watch in region[3] */ -#define MWU_REGIONENCLR_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ -#define MWU_REGIONENCLR_RGN3WA_Msk (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ -#define MWU_REGIONENCLR_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN3WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 5 : Disable read access watch in region[2] */ -#define MWU_REGIONENCLR_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ -#define MWU_REGIONENCLR_RGN2RA_Msk (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ -#define MWU_REGIONENCLR_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN2RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 4 : Disable write access watch in region[2] */ -#define MWU_REGIONENCLR_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ -#define MWU_REGIONENCLR_RGN2WA_Msk (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ -#define MWU_REGIONENCLR_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN2WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 3 : Disable read access watch in region[1] */ -#define MWU_REGIONENCLR_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ -#define MWU_REGIONENCLR_RGN1RA_Msk (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ -#define MWU_REGIONENCLR_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN1RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 2 : Disable write access watch in region[1] */ -#define MWU_REGIONENCLR_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ -#define MWU_REGIONENCLR_RGN1WA_Msk (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ -#define MWU_REGIONENCLR_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN1WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Bit 1 : Disable read access watch in region[0] */ -#define MWU_REGIONENCLR_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ -#define MWU_REGIONENCLR_RGN0RA_Msk (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ -#define MWU_REGIONENCLR_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN0RA_Clear (1UL) /*!< Disable read access watch in this region */ - -/* Bit 0 : Disable write access watch in region[0] */ -#define MWU_REGIONENCLR_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ -#define MWU_REGIONENCLR_RGN0WA_Msk (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ -#define MWU_REGIONENCLR_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ -#define MWU_REGIONENCLR_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ -#define MWU_REGIONENCLR_RGN0WA_Clear (1UL) /*!< Disable write access watch in this region */ - -/* Register: MWU_REGION_START */ -/* Description: Description cluster[0]: Start address for region 0 */ - -/* Bits 31..0 : Start address for region */ -#define MWU_REGION_START_START_Pos (0UL) /*!< Position of START field. */ -#define MWU_REGION_START_START_Msk (0xFFFFFFFFUL << MWU_REGION_START_START_Pos) /*!< Bit mask of START field. */ - -/* Register: MWU_REGION_END */ -/* Description: Description cluster[0]: End address of region 0 */ - -/* Bits 31..0 : End address of region. */ -#define MWU_REGION_END_END_Pos (0UL) /*!< Position of END field. */ -#define MWU_REGION_END_END_Msk (0xFFFFFFFFUL << MWU_REGION_END_END_Pos) /*!< Bit mask of END field. */ - -/* Register: MWU_PREGION_START */ -/* Description: Description cluster[0]: Reserved for future use */ - -/* Bits 31..0 : Reserved for future use */ -#define MWU_PREGION_START_START_Pos (0UL) /*!< Position of START field. */ -#define MWU_PREGION_START_START_Msk (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos) /*!< Bit mask of START field. */ - -/* Register: MWU_PREGION_END */ -/* Description: Description cluster[0]: Reserved for future use */ - -/* Bits 31..0 : Reserved for future use */ -#define MWU_PREGION_END_END_Pos (0UL) /*!< Position of END field. */ -#define MWU_PREGION_END_END_Msk (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos) /*!< Bit mask of END field. */ - -/* Register: MWU_PREGION_SUBS */ -/* Description: Description cluster[0]: Subregions of region 0 */ - -/* Bit 31 : Include or exclude subregion 31 in region */ -#define MWU_PREGION_SUBS_SR31_Pos (31UL) /*!< Position of SR31 field. */ -#define MWU_PREGION_SUBS_SR31_Msk (0x1UL << MWU_PREGION_SUBS_SR31_Pos) /*!< Bit mask of SR31 field. */ -#define MWU_PREGION_SUBS_SR31_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR31_Include (1UL) /*!< Include */ - -/* Bit 30 : Include or exclude subregion 30 in region */ -#define MWU_PREGION_SUBS_SR30_Pos (30UL) /*!< Position of SR30 field. */ -#define MWU_PREGION_SUBS_SR30_Msk (0x1UL << MWU_PREGION_SUBS_SR30_Pos) /*!< Bit mask of SR30 field. */ -#define MWU_PREGION_SUBS_SR30_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR30_Include (1UL) /*!< Include */ - -/* Bit 29 : Include or exclude subregion 29 in region */ -#define MWU_PREGION_SUBS_SR29_Pos (29UL) /*!< Position of SR29 field. */ -#define MWU_PREGION_SUBS_SR29_Msk (0x1UL << MWU_PREGION_SUBS_SR29_Pos) /*!< Bit mask of SR29 field. */ -#define MWU_PREGION_SUBS_SR29_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR29_Include (1UL) /*!< Include */ - -/* Bit 28 : Include or exclude subregion 28 in region */ -#define MWU_PREGION_SUBS_SR28_Pos (28UL) /*!< Position of SR28 field. */ -#define MWU_PREGION_SUBS_SR28_Msk (0x1UL << MWU_PREGION_SUBS_SR28_Pos) /*!< Bit mask of SR28 field. */ -#define MWU_PREGION_SUBS_SR28_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR28_Include (1UL) /*!< Include */ - -/* Bit 27 : Include or exclude subregion 27 in region */ -#define MWU_PREGION_SUBS_SR27_Pos (27UL) /*!< Position of SR27 field. */ -#define MWU_PREGION_SUBS_SR27_Msk (0x1UL << MWU_PREGION_SUBS_SR27_Pos) /*!< Bit mask of SR27 field. */ -#define MWU_PREGION_SUBS_SR27_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR27_Include (1UL) /*!< Include */ - -/* Bit 26 : Include or exclude subregion 26 in region */ -#define MWU_PREGION_SUBS_SR26_Pos (26UL) /*!< Position of SR26 field. */ -#define MWU_PREGION_SUBS_SR26_Msk (0x1UL << MWU_PREGION_SUBS_SR26_Pos) /*!< Bit mask of SR26 field. */ -#define MWU_PREGION_SUBS_SR26_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR26_Include (1UL) /*!< Include */ - -/* Bit 25 : Include or exclude subregion 25 in region */ -#define MWU_PREGION_SUBS_SR25_Pos (25UL) /*!< Position of SR25 field. */ -#define MWU_PREGION_SUBS_SR25_Msk (0x1UL << MWU_PREGION_SUBS_SR25_Pos) /*!< Bit mask of SR25 field. */ -#define MWU_PREGION_SUBS_SR25_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR25_Include (1UL) /*!< Include */ - -/* Bit 24 : Include or exclude subregion 24 in region */ -#define MWU_PREGION_SUBS_SR24_Pos (24UL) /*!< Position of SR24 field. */ -#define MWU_PREGION_SUBS_SR24_Msk (0x1UL << MWU_PREGION_SUBS_SR24_Pos) /*!< Bit mask of SR24 field. */ -#define MWU_PREGION_SUBS_SR24_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR24_Include (1UL) /*!< Include */ - -/* Bit 23 : Include or exclude subregion 23 in region */ -#define MWU_PREGION_SUBS_SR23_Pos (23UL) /*!< Position of SR23 field. */ -#define MWU_PREGION_SUBS_SR23_Msk (0x1UL << MWU_PREGION_SUBS_SR23_Pos) /*!< Bit mask of SR23 field. */ -#define MWU_PREGION_SUBS_SR23_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR23_Include (1UL) /*!< Include */ - -/* Bit 22 : Include or exclude subregion 22 in region */ -#define MWU_PREGION_SUBS_SR22_Pos (22UL) /*!< Position of SR22 field. */ -#define MWU_PREGION_SUBS_SR22_Msk (0x1UL << MWU_PREGION_SUBS_SR22_Pos) /*!< Bit mask of SR22 field. */ -#define MWU_PREGION_SUBS_SR22_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR22_Include (1UL) /*!< Include */ - -/* Bit 21 : Include or exclude subregion 21 in region */ -#define MWU_PREGION_SUBS_SR21_Pos (21UL) /*!< Position of SR21 field. */ -#define MWU_PREGION_SUBS_SR21_Msk (0x1UL << MWU_PREGION_SUBS_SR21_Pos) /*!< Bit mask of SR21 field. */ -#define MWU_PREGION_SUBS_SR21_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR21_Include (1UL) /*!< Include */ - -/* Bit 20 : Include or exclude subregion 20 in region */ -#define MWU_PREGION_SUBS_SR20_Pos (20UL) /*!< Position of SR20 field. */ -#define MWU_PREGION_SUBS_SR20_Msk (0x1UL << MWU_PREGION_SUBS_SR20_Pos) /*!< Bit mask of SR20 field. */ -#define MWU_PREGION_SUBS_SR20_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR20_Include (1UL) /*!< Include */ - -/* Bit 19 : Include or exclude subregion 19 in region */ -#define MWU_PREGION_SUBS_SR19_Pos (19UL) /*!< Position of SR19 field. */ -#define MWU_PREGION_SUBS_SR19_Msk (0x1UL << MWU_PREGION_SUBS_SR19_Pos) /*!< Bit mask of SR19 field. */ -#define MWU_PREGION_SUBS_SR19_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR19_Include (1UL) /*!< Include */ - -/* Bit 18 : Include or exclude subregion 18 in region */ -#define MWU_PREGION_SUBS_SR18_Pos (18UL) /*!< Position of SR18 field. */ -#define MWU_PREGION_SUBS_SR18_Msk (0x1UL << MWU_PREGION_SUBS_SR18_Pos) /*!< Bit mask of SR18 field. */ -#define MWU_PREGION_SUBS_SR18_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR18_Include (1UL) /*!< Include */ - -/* Bit 17 : Include or exclude subregion 17 in region */ -#define MWU_PREGION_SUBS_SR17_Pos (17UL) /*!< Position of SR17 field. */ -#define MWU_PREGION_SUBS_SR17_Msk (0x1UL << MWU_PREGION_SUBS_SR17_Pos) /*!< Bit mask of SR17 field. */ -#define MWU_PREGION_SUBS_SR17_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR17_Include (1UL) /*!< Include */ - -/* Bit 16 : Include or exclude subregion 16 in region */ -#define MWU_PREGION_SUBS_SR16_Pos (16UL) /*!< Position of SR16 field. */ -#define MWU_PREGION_SUBS_SR16_Msk (0x1UL << MWU_PREGION_SUBS_SR16_Pos) /*!< Bit mask of SR16 field. */ -#define MWU_PREGION_SUBS_SR16_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR16_Include (1UL) /*!< Include */ - -/* Bit 15 : Include or exclude subregion 15 in region */ -#define MWU_PREGION_SUBS_SR15_Pos (15UL) /*!< Position of SR15 field. */ -#define MWU_PREGION_SUBS_SR15_Msk (0x1UL << MWU_PREGION_SUBS_SR15_Pos) /*!< Bit mask of SR15 field. */ -#define MWU_PREGION_SUBS_SR15_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR15_Include (1UL) /*!< Include */ - -/* Bit 14 : Include or exclude subregion 14 in region */ -#define MWU_PREGION_SUBS_SR14_Pos (14UL) /*!< Position of SR14 field. */ -#define MWU_PREGION_SUBS_SR14_Msk (0x1UL << MWU_PREGION_SUBS_SR14_Pos) /*!< Bit mask of SR14 field. */ -#define MWU_PREGION_SUBS_SR14_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR14_Include (1UL) /*!< Include */ - -/* Bit 13 : Include or exclude subregion 13 in region */ -#define MWU_PREGION_SUBS_SR13_Pos (13UL) /*!< Position of SR13 field. */ -#define MWU_PREGION_SUBS_SR13_Msk (0x1UL << MWU_PREGION_SUBS_SR13_Pos) /*!< Bit mask of SR13 field. */ -#define MWU_PREGION_SUBS_SR13_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR13_Include (1UL) /*!< Include */ - -/* Bit 12 : Include or exclude subregion 12 in region */ -#define MWU_PREGION_SUBS_SR12_Pos (12UL) /*!< Position of SR12 field. */ -#define MWU_PREGION_SUBS_SR12_Msk (0x1UL << MWU_PREGION_SUBS_SR12_Pos) /*!< Bit mask of SR12 field. */ -#define MWU_PREGION_SUBS_SR12_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR12_Include (1UL) /*!< Include */ - -/* Bit 11 : Include or exclude subregion 11 in region */ -#define MWU_PREGION_SUBS_SR11_Pos (11UL) /*!< Position of SR11 field. */ -#define MWU_PREGION_SUBS_SR11_Msk (0x1UL << MWU_PREGION_SUBS_SR11_Pos) /*!< Bit mask of SR11 field. */ -#define MWU_PREGION_SUBS_SR11_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR11_Include (1UL) /*!< Include */ - -/* Bit 10 : Include or exclude subregion 10 in region */ -#define MWU_PREGION_SUBS_SR10_Pos (10UL) /*!< Position of SR10 field. */ -#define MWU_PREGION_SUBS_SR10_Msk (0x1UL << MWU_PREGION_SUBS_SR10_Pos) /*!< Bit mask of SR10 field. */ -#define MWU_PREGION_SUBS_SR10_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR10_Include (1UL) /*!< Include */ - -/* Bit 9 : Include or exclude subregion 9 in region */ -#define MWU_PREGION_SUBS_SR9_Pos (9UL) /*!< Position of SR9 field. */ -#define MWU_PREGION_SUBS_SR9_Msk (0x1UL << MWU_PREGION_SUBS_SR9_Pos) /*!< Bit mask of SR9 field. */ -#define MWU_PREGION_SUBS_SR9_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR9_Include (1UL) /*!< Include */ - -/* Bit 8 : Include or exclude subregion 8 in region */ -#define MWU_PREGION_SUBS_SR8_Pos (8UL) /*!< Position of SR8 field. */ -#define MWU_PREGION_SUBS_SR8_Msk (0x1UL << MWU_PREGION_SUBS_SR8_Pos) /*!< Bit mask of SR8 field. */ -#define MWU_PREGION_SUBS_SR8_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR8_Include (1UL) /*!< Include */ - -/* Bit 7 : Include or exclude subregion 7 in region */ -#define MWU_PREGION_SUBS_SR7_Pos (7UL) /*!< Position of SR7 field. */ -#define MWU_PREGION_SUBS_SR7_Msk (0x1UL << MWU_PREGION_SUBS_SR7_Pos) /*!< Bit mask of SR7 field. */ -#define MWU_PREGION_SUBS_SR7_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR7_Include (1UL) /*!< Include */ - -/* Bit 6 : Include or exclude subregion 6 in region */ -#define MWU_PREGION_SUBS_SR6_Pos (6UL) /*!< Position of SR6 field. */ -#define MWU_PREGION_SUBS_SR6_Msk (0x1UL << MWU_PREGION_SUBS_SR6_Pos) /*!< Bit mask of SR6 field. */ -#define MWU_PREGION_SUBS_SR6_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR6_Include (1UL) /*!< Include */ - -/* Bit 5 : Include or exclude subregion 5 in region */ -#define MWU_PREGION_SUBS_SR5_Pos (5UL) /*!< Position of SR5 field. */ -#define MWU_PREGION_SUBS_SR5_Msk (0x1UL << MWU_PREGION_SUBS_SR5_Pos) /*!< Bit mask of SR5 field. */ -#define MWU_PREGION_SUBS_SR5_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR5_Include (1UL) /*!< Include */ - -/* Bit 4 : Include or exclude subregion 4 in region */ -#define MWU_PREGION_SUBS_SR4_Pos (4UL) /*!< Position of SR4 field. */ -#define MWU_PREGION_SUBS_SR4_Msk (0x1UL << MWU_PREGION_SUBS_SR4_Pos) /*!< Bit mask of SR4 field. */ -#define MWU_PREGION_SUBS_SR4_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR4_Include (1UL) /*!< Include */ - -/* Bit 3 : Include or exclude subregion 3 in region */ -#define MWU_PREGION_SUBS_SR3_Pos (3UL) /*!< Position of SR3 field. */ -#define MWU_PREGION_SUBS_SR3_Msk (0x1UL << MWU_PREGION_SUBS_SR3_Pos) /*!< Bit mask of SR3 field. */ -#define MWU_PREGION_SUBS_SR3_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR3_Include (1UL) /*!< Include */ - -/* Bit 2 : Include or exclude subregion 2 in region */ -#define MWU_PREGION_SUBS_SR2_Pos (2UL) /*!< Position of SR2 field. */ -#define MWU_PREGION_SUBS_SR2_Msk (0x1UL << MWU_PREGION_SUBS_SR2_Pos) /*!< Bit mask of SR2 field. */ -#define MWU_PREGION_SUBS_SR2_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR2_Include (1UL) /*!< Include */ - -/* Bit 1 : Include or exclude subregion 1 in region */ -#define MWU_PREGION_SUBS_SR1_Pos (1UL) /*!< Position of SR1 field. */ -#define MWU_PREGION_SUBS_SR1_Msk (0x1UL << MWU_PREGION_SUBS_SR1_Pos) /*!< Bit mask of SR1 field. */ -#define MWU_PREGION_SUBS_SR1_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR1_Include (1UL) /*!< Include */ - -/* Bit 0 : Include or exclude subregion 0 in region */ -#define MWU_PREGION_SUBS_SR0_Pos (0UL) /*!< Position of SR0 field. */ -#define MWU_PREGION_SUBS_SR0_Msk (0x1UL << MWU_PREGION_SUBS_SR0_Pos) /*!< Bit mask of SR0 field. */ -#define MWU_PREGION_SUBS_SR0_Exclude (0UL) /*!< Exclude */ -#define MWU_PREGION_SUBS_SR0_Include (1UL) /*!< Include */ - - -/* Peripheral: NFCT */ -/* Description: NFC-A compatible radio */ - -/* Register: NFCT_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 1 : Shortcut between FIELDLOST event and SENSE task */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Pos (1UL) /*!< Position of FIELDLOST_SENSE field. */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Msk (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos) /*!< Bit mask of FIELDLOST_SENSE field. */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled (0UL) /*!< Disable shortcut */ -#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between FIELDDETECTED event and ACTIVATE task */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos (0UL) /*!< Position of FIELDDETECTED_ACTIVATE field. */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos) /*!< Bit mask of FIELDDETECTED_ACTIVATE field. */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled (0UL) /*!< Disable shortcut */ -#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: NFCT_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 20 : Enable or disable interrupt for STARTED event */ -#define NFCT_INTEN_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTEN_STARTED_Msk (0x1UL << NFCT_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for SELECTED event */ -#define NFCT_INTEN_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTEN_SELECTED_Msk (0x1UL << NFCT_INTEN_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTEN_SELECTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_SELECTED_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for COLLISION event */ -#define NFCT_INTEN_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTEN_COLLISION_Msk (0x1UL << NFCT_INTEN_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTEN_COLLISION_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_COLLISION_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for ENDTX event */ -#define NFCT_INTEN_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTEN_ENDTX_Msk (0x1UL << NFCT_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for ENDRX event */ -#define NFCT_INTEN_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTEN_ENDRX_Msk (0x1UL << NFCT_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for RXERROR event */ -#define NFCT_INTEN_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTEN_RXERROR_Msk (0x1UL << NFCT_INTEN_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTEN_RXERROR_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for ERROR event */ -#define NFCT_INTEN_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTEN_ERROR_Msk (0x1UL << NFCT_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for RXFRAMEEND event */ -#define NFCT_INTEN_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTEN_RXFRAMEEND_Msk (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTEN_RXFRAMEEND_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXFRAMEEND_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for RXFRAMESTART event */ -#define NFCT_INTEN_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTEN_RXFRAMESTART_Msk (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTEN_RXFRAMESTART_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_RXFRAMESTART_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for TXFRAMEEND event */ -#define NFCT_INTEN_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTEN_TXFRAMEEND_Msk (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTEN_TXFRAMEEND_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_TXFRAMEEND_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for TXFRAMESTART event */ -#define NFCT_INTEN_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTEN_TXFRAMESTART_Msk (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTEN_TXFRAMESTART_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_TXFRAMESTART_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for FIELDLOST event */ -#define NFCT_INTEN_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTEN_FIELDLOST_Msk (0x1UL << NFCT_INTEN_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTEN_FIELDLOST_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_FIELDLOST_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for FIELDDETECTED event */ -#define NFCT_INTEN_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTEN_FIELDDETECTED_Msk (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTEN_FIELDDETECTED_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_FIELDDETECTED_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for READY event */ -#define NFCT_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTEN_READY_Msk (0x1UL << NFCT_INTEN_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTEN_READY_Disabled (0UL) /*!< Disable */ -#define NFCT_INTEN_READY_Enabled (1UL) /*!< Enable */ - -/* Register: NFCT_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 20 : Write '1' to Enable interrupt for STARTED event */ -#define NFCT_INTENSET_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTENSET_STARTED_Msk (0x1UL << NFCT_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for SELECTED event */ -#define NFCT_INTENSET_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTENSET_SELECTED_Msk (0x1UL << NFCT_INTENSET_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTENSET_SELECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_SELECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_SELECTED_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COLLISION event */ -#define NFCT_INTENSET_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTENSET_COLLISION_Msk (0x1UL << NFCT_INTENSET_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTENSET_COLLISION_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_COLLISION_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_COLLISION_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for ENDTX event */ -#define NFCT_INTENSET_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTENSET_ENDTX_Msk (0x1UL << NFCT_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for ENDRX event */ -#define NFCT_INTENSET_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTENSET_ENDRX_Msk (0x1UL << NFCT_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for RXERROR event */ -#define NFCT_INTENSET_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTENSET_RXERROR_Msk (0x1UL << NFCT_INTENSET_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTENSET_RXERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for ERROR event */ -#define NFCT_INTENSET_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTENSET_ERROR_Msk (0x1UL << NFCT_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for RXFRAMEEND event */ -#define NFCT_INTENSET_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTENSET_RXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTENSET_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXFRAMEEND_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for RXFRAMESTART event */ -#define NFCT_INTENSET_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTENSET_RXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTENSET_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_RXFRAMESTART_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for TXFRAMEEND event */ -#define NFCT_INTENSET_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTENSET_TXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTENSET_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_TXFRAMEEND_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for TXFRAMESTART event */ -#define NFCT_INTENSET_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTENSET_TXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTENSET_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_TXFRAMESTART_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for FIELDLOST event */ -#define NFCT_INTENSET_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTENSET_FIELDLOST_Msk (0x1UL << NFCT_INTENSET_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTENSET_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_FIELDLOST_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for FIELDDETECTED event */ -#define NFCT_INTENSET_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTENSET_FIELDDETECTED_Msk (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTENSET_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_FIELDDETECTED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define NFCT_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTENSET_READY_Msk (0x1UL << NFCT_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: NFCT_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 20 : Write '1' to Disable interrupt for STARTED event */ -#define NFCT_INTENCLR_STARTED_Pos (20UL) /*!< Position of STARTED field. */ -#define NFCT_INTENCLR_STARTED_Msk (0x1UL << NFCT_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define NFCT_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for SELECTED event */ -#define NFCT_INTENCLR_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ -#define NFCT_INTENCLR_SELECTED_Msk (0x1UL << NFCT_INTENCLR_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ -#define NFCT_INTENCLR_SELECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_SELECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_SELECTED_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COLLISION event */ -#define NFCT_INTENCLR_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ -#define NFCT_INTENCLR_COLLISION_Msk (0x1UL << NFCT_INTENCLR_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ -#define NFCT_INTENCLR_COLLISION_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_COLLISION_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_COLLISION_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for AUTOCOLRESSTARTED event */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for ENDTX event */ -#define NFCT_INTENCLR_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ -#define NFCT_INTENCLR_ENDTX_Msk (0x1UL << NFCT_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define NFCT_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for ENDRX event */ -#define NFCT_INTENCLR_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ -#define NFCT_INTENCLR_ENDRX_Msk (0x1UL << NFCT_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define NFCT_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for RXERROR event */ -#define NFCT_INTENCLR_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ -#define NFCT_INTENCLR_RXERROR_Msk (0x1UL << NFCT_INTENCLR_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ -#define NFCT_INTENCLR_RXERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for ERROR event */ -#define NFCT_INTENCLR_ERROR_Pos (7UL) /*!< Position of ERROR field. */ -#define NFCT_INTENCLR_ERROR_Msk (0x1UL << NFCT_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define NFCT_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for RXFRAMEEND event */ -#define NFCT_INTENCLR_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ -#define NFCT_INTENCLR_RXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ -#define NFCT_INTENCLR_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXFRAMEEND_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for RXFRAMESTART event */ -#define NFCT_INTENCLR_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ -#define NFCT_INTENCLR_RXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ -#define NFCT_INTENCLR_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_RXFRAMESTART_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for TXFRAMEEND event */ -#define NFCT_INTENCLR_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ -#define NFCT_INTENCLR_TXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ -#define NFCT_INTENCLR_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_TXFRAMEEND_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for TXFRAMESTART event */ -#define NFCT_INTENCLR_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ -#define NFCT_INTENCLR_TXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ -#define NFCT_INTENCLR_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_TXFRAMESTART_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for FIELDLOST event */ -#define NFCT_INTENCLR_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ -#define NFCT_INTENCLR_FIELDLOST_Msk (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ -#define NFCT_INTENCLR_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_FIELDLOST_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for FIELDDETECTED event */ -#define NFCT_INTENCLR_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ -#define NFCT_INTENCLR_FIELDDETECTED_Msk (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ -#define NFCT_INTENCLR_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_FIELDDETECTED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define NFCT_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define NFCT_INTENCLR_READY_Msk (0x1UL << NFCT_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define NFCT_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define NFCT_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define NFCT_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: NFCT_ERRORSTATUS */ -/* Description: NFC Error Status register */ - -/* Bit 3 : Field level is too low at min load resistance */ -#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos (3UL) /*!< Position of NFCFIELDTOOWEAK field. */ -#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos) /*!< Bit mask of NFCFIELDTOOWEAK field. */ - -/* Bit 2 : Field level is too high at max load resistance */ -#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos (2UL) /*!< Position of NFCFIELDTOOSTRONG field. */ -#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Msk (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos) /*!< Bit mask of NFCFIELDTOOSTRONG field. */ - -/* Bit 0 : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX */ -#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos (0UL) /*!< Position of FRAMEDELAYTIMEOUT field. */ -#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos) /*!< Bit mask of FRAMEDELAYTIMEOUT field. */ - -/* Register: NFCT_FRAMESTATUS_RX */ -/* Description: Result of last incoming frames */ - -/* Bit 3 : Overrun detected */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos (3UL) /*!< Position of OVERRUN field. */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun (0UL) /*!< No overrun detected */ -#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun (1UL) /*!< Overrun error */ - -/* Bit 2 : Parity status of received frame */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos (2UL) /*!< Position of PARITYSTATUS field. */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos) /*!< Bit mask of PARITYSTATUS field. */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK (0UL) /*!< Frame received with parity OK */ -#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError (1UL) /*!< Frame received with parity error */ - -/* Bit 0 : No valid End of Frame detected */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos (0UL) /*!< Position of CRCERROR field. */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect (0UL) /*!< Valid CRC detected */ -#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError (1UL) /*!< CRC received does not match local check */ - -/* Register: NFCT_CURRENTLOADCTRL */ -/* Description: Current value driven to the NFC Load Control */ - -/* Bits 5..0 : Current value driven to the NFC Load Control */ -#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos (0UL) /*!< Position of CURRENTLOADCTRL field. */ -#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Msk (0x3FUL << NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos) /*!< Bit mask of CURRENTLOADCTRL field. */ - -/* Register: NFCT_FIELDPRESENT */ -/* Description: Indicates the presence or not of a valid field */ - -/* Bit 1 : Indicates if the low level has locked to the field */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Pos (1UL) /*!< Position of LOCKDETECT field. */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Msk (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos) /*!< Bit mask of LOCKDETECT field. */ -#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked (0UL) /*!< Not locked to field */ -#define NFCT_FIELDPRESENT_LOCKDETECT_Locked (1UL) /*!< Locked to field */ - -/* Bit 0 : Indicates the presence or not of a valid field. Available only in the activated state. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos (0UL) /*!< Position of FIELDPRESENT field. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos) /*!< Bit mask of FIELDPRESENT field. */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField (0UL) /*!< No valid field detected */ -#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent (1UL) /*!< Valid field detected */ - -/* Register: NFCT_FRAMEDELAYMIN */ -/* Description: Minimum frame delay */ - -/* Bits 15..0 : Minimum frame delay in number of 13.56 MHz clocks */ -#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos (0UL) /*!< Position of FRAMEDELAYMIN field. */ -#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos) /*!< Bit mask of FRAMEDELAYMIN field. */ - -/* Register: NFCT_FRAMEDELAYMAX */ -/* Description: Maximum frame delay */ - -/* Bits 15..0 : Maximum frame delay in number of 13.56 MHz clocks */ -#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos (0UL) /*!< Position of FRAMEDELAYMAX field. */ -#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk (0xFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos) /*!< Bit mask of FRAMEDELAYMAX field. */ - -/* Register: NFCT_FRAMEDELAYMODE */ -/* Description: Configuration register for the Frame Delay Timer */ - -/* Bits 1..0 : Configuration register for the Frame Delay Timer */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos (0UL) /*!< Position of FRAMEDELAYMODE field. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos) /*!< Bit mask of FRAMEDELAYMODE field. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun (0UL) /*!< Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout. */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window (1UL) /*!< Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal (2UL) /*!< Frame is transmitted exactly at FRAMEDELAYMAX */ -#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid (3UL) /*!< Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX */ - -/* Register: NFCT_PACKETPTR */ -/* Description: Packet pointer for TXD and RXD data storage in Data RAM */ - -/* Bits 31..0 : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte aligned RAM address. */ -#define NFCT_PACKETPTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define NFCT_PACKETPTR_PTR_Msk (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: NFCT_MAXLEN */ -/* Description: Size of allocated for TXD and RXD data storage buffer in Data RAM */ - -/* Bits 8..0 : Size of allocated for TXD and RXD data storage buffer in Data RAM */ -#define NFCT_MAXLEN_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ -#define NFCT_MAXLEN_MAXLEN_Msk (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ - -/* Register: NFCT_TXD_FRAMECONFIG */ -/* Description: Configuration of outgoing frames */ - -/* Bit 4 : CRC mode for outgoing frames */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos (4UL) /*!< Position of CRCMODETX field. */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos) /*!< Bit mask of CRCMODETX field. */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX (0UL) /*!< CRC is not added to the frame */ -#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX (1UL) /*!< 16 bit CRC added to the frame based on all the data read from RAM that is used in the frame */ - -/* Bit 2 : Adding SoF or not in TX frames */ -#define NFCT_TXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ -#define NFCT_TXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ -#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< Start of Frame symbol not added */ -#define NFCT_TXD_FRAMECONFIG_SOF_SoF (1UL) /*!< Start of Frame symbol added */ - -/* Bit 1 : Discarding unused bits in start or at end of a Frame */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos (1UL) /*!< Position of DISCARDMODE field. */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos) /*!< Bit mask of DISCARDMODE field. */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd (0UL) /*!< Unused bits is discarded at end of frame */ -#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart (1UL) /*!< Unused bits is discarded at start of frame */ - -/* Bit 0 : Adding parity or not in the frame */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not added in TX frames */ -#define NFCT_TXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is added TX frames */ - -/* Register: NFCT_TXD_AMOUNT */ -/* Description: Size of outgoing frame */ - -/* Bits 11..3 : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing */ -#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos (3UL) /*!< Position of TXDATABYTES field. */ -#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos) /*!< Bit mask of TXDATABYTES field. */ - -/* Bits 2..0 : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit). */ -#define NFCT_TXD_AMOUNT_TXDATABITS_Pos (0UL) /*!< Position of TXDATABITS field. */ -#define NFCT_TXD_AMOUNT_TXDATABITS_Msk (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos) /*!< Bit mask of TXDATABITS field. */ - -/* Register: NFCT_RXD_FRAMECONFIG */ -/* Description: Configuration of incoming frames */ - -/* Bit 4 : CRC mode for incoming frames */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos (4UL) /*!< Position of CRCMODERX field. */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos) /*!< Bit mask of CRCMODERX field. */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX (0UL) /*!< CRC is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX (1UL) /*!< Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated */ - -/* Bit 2 : SoF expected or not in RX frames */ -#define NFCT_RXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ -#define NFCT_RXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ -#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< Start of Frame symbol is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_SOF_SoF (1UL) /*!< Start of Frame symbol is expected in RX frames */ - -/* Bit 0 : Parity expected or not in RX frame */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not expected in RX frames */ -#define NFCT_RXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is expected in RX frames */ - -/* Register: NFCT_RXD_AMOUNT */ -/* Description: Size of last incoming frame */ - -/* Bits 11..3 : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing) */ -#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos (3UL) /*!< Position of RXDATABYTES field. */ -#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos) /*!< Bit mask of RXDATABYTES field. */ - -/* Bits 2..0 : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing). */ -#define NFCT_RXD_AMOUNT_RXDATABITS_Pos (0UL) /*!< Position of RXDATABITS field. */ -#define NFCT_RXD_AMOUNT_RXDATABITS_Msk (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos) /*!< Bit mask of RXDATABITS field. */ - -/* Register: NFCT_NFCID1_LAST */ -/* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */ - -/* Bits 31..24 : NFCID1 byte W */ -#define NFCT_NFCID1_LAST_NFCID1_W_Pos (24UL) /*!< Position of NFCID1_W field. */ -#define NFCT_NFCID1_LAST_NFCID1_W_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos) /*!< Bit mask of NFCID1_W field. */ - -/* Bits 23..16 : NFCID1 byte X */ -#define NFCT_NFCID1_LAST_NFCID1_X_Pos (16UL) /*!< Position of NFCID1_X field. */ -#define NFCT_NFCID1_LAST_NFCID1_X_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos) /*!< Bit mask of NFCID1_X field. */ - -/* Bits 15..8 : NFCID1 byte Y */ -#define NFCT_NFCID1_LAST_NFCID1_Y_Pos (8UL) /*!< Position of NFCID1_Y field. */ -#define NFCT_NFCID1_LAST_NFCID1_Y_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos) /*!< Bit mask of NFCID1_Y field. */ - -/* Bits 7..0 : NFCID1 byte Z (very last byte sent) */ -#define NFCT_NFCID1_LAST_NFCID1_Z_Pos (0UL) /*!< Position of NFCID1_Z field. */ -#define NFCT_NFCID1_LAST_NFCID1_Z_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos) /*!< Bit mask of NFCID1_Z field. */ - -/* Register: NFCT_NFCID1_2ND_LAST */ -/* Description: Second last NFCID1 part (7 or 10 bytes ID) */ - -/* Bits 23..16 : NFCID1 byte T */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos (16UL) /*!< Position of NFCID1_T field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos) /*!< Bit mask of NFCID1_T field. */ - -/* Bits 15..8 : NFCID1 byte U */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos (8UL) /*!< Position of NFCID1_U field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos) /*!< Bit mask of NFCID1_U field. */ - -/* Bits 7..0 : NFCID1 byte V */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos (0UL) /*!< Position of NFCID1_V field. */ -#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos) /*!< Bit mask of NFCID1_V field. */ - -/* Register: NFCT_NFCID1_3RD_LAST */ -/* Description: Third last NFCID1 part (10 bytes ID) */ - -/* Bits 23..16 : NFCID1 byte Q */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos (16UL) /*!< Position of NFCID1_Q field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos) /*!< Bit mask of NFCID1_Q field. */ - -/* Bits 15..8 : NFCID1 byte R */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos (8UL) /*!< Position of NFCID1_R field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos) /*!< Bit mask of NFCID1_R field. */ - -/* Bits 7..0 : NFCID1 byte S */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos (0UL) /*!< Position of NFCID1_S field. */ -#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos) /*!< Bit mask of NFCID1_S field. */ - -/* Register: NFCT_SENSRES */ -/* Description: NFC-A SENS_RES auto-response settings */ - -/* Bits 15..12 : Reserved for future use. Shall be 0. */ -#define NFCT_SENSRES_RFU74_Pos (12UL) /*!< Position of RFU74 field. */ -#define NFCT_SENSRES_RFU74_Msk (0xFUL << NFCT_SENSRES_RFU74_Pos) /*!< Bit mask of RFU74 field. */ - -/* Bits 11..8 : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SENSRES_PLATFCONFIG_Pos (8UL) /*!< Position of PLATFCONFIG field. */ -#define NFCT_SENSRES_PLATFCONFIG_Msk (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos) /*!< Bit mask of PLATFCONFIG field. */ - -/* Bits 7..6 : NFCID1 size. This value is used by the Auto collision resolution engine. */ -#define NFCT_SENSRES_NFCIDSIZE_Pos (6UL) /*!< Position of NFCIDSIZE field. */ -#define NFCT_SENSRES_NFCIDSIZE_Msk (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos) /*!< Bit mask of NFCIDSIZE field. */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single (0UL) /*!< NFCID1 size: single (4 bytes) */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double (1UL) /*!< NFCID1 size: double (7 bytes) */ -#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple (2UL) /*!< NFCID1 size: triple (10 bytes) */ - -/* Bit 5 : Reserved for future use. Shall be 0. */ -#define NFCT_SENSRES_RFU5_Pos (5UL) /*!< Position of RFU5 field. */ -#define NFCT_SENSRES_RFU5_Msk (0x1UL << NFCT_SENSRES_RFU5_Pos) /*!< Bit mask of RFU5 field. */ - -/* Bits 4..0 : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SENSRES_BITFRAMESDD_Pos (0UL) /*!< Position of BITFRAMESDD field. */ -#define NFCT_SENSRES_BITFRAMESDD_Msk (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos) /*!< Bit mask of BITFRAMESDD field. */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00000 (0UL) /*!< SDD pattern 00000 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00001 (1UL) /*!< SDD pattern 00001 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00010 (2UL) /*!< SDD pattern 00010 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD00100 (4UL) /*!< SDD pattern 00100 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD01000 (8UL) /*!< SDD pattern 01000 */ -#define NFCT_SENSRES_BITFRAMESDD_SDD10000 (16UL) /*!< SDD pattern 10000 */ - -/* Register: NFCT_SELRES */ -/* Description: NFC-A SEL_RES auto-response settings */ - -/* Bit 7 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU7_Pos (7UL) /*!< Position of RFU7 field. */ -#define NFCT_SELRES_RFU7_Msk (0x1UL << NFCT_SELRES_RFU7_Pos) /*!< Bit mask of RFU7 field. */ - -/* Bits 6..5 : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ -#define NFCT_SELRES_PROTOCOL_Pos (5UL) /*!< Position of PROTOCOL field. */ -#define NFCT_SELRES_PROTOCOL_Msk (0x3UL << NFCT_SELRES_PROTOCOL_Pos) /*!< Bit mask of PROTOCOL field. */ - -/* Bits 4..3 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU43_Pos (3UL) /*!< Position of RFU43 field. */ -#define NFCT_SELRES_RFU43_Msk (0x3UL << NFCT_SELRES_RFU43_Pos) /*!< Bit mask of RFU43 field. */ - -/* Bit 2 : Cascade bit (controlled by hardware, write has no effect) */ -#define NFCT_SELRES_CASCADE_Pos (2UL) /*!< Position of CASCADE field. */ -#define NFCT_SELRES_CASCADE_Msk (0x1UL << NFCT_SELRES_CASCADE_Pos) /*!< Bit mask of CASCADE field. */ -#define NFCT_SELRES_CASCADE_Complete (0UL) /*!< NFCID1 complete */ -#define NFCT_SELRES_CASCADE_NotComplete (1UL) /*!< NFCID1 not complete */ - -/* Bits 1..0 : Reserved for future use. Shall be 0. */ -#define NFCT_SELRES_RFU10_Pos (0UL) /*!< Position of RFU10 field. */ -#define NFCT_SELRES_RFU10_Msk (0x3UL << NFCT_SELRES_RFU10_Pos) /*!< Bit mask of RFU10 field. */ - - -/* Peripheral: NVMC */ -/* Description: Non Volatile Memory Controller */ - -/* Register: NVMC_READY */ -/* Description: Ready flag */ - -/* Bit 0 : NVMC is ready or busy */ -#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ -#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ -#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */ -#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */ - -/* Register: NVMC_CONFIG */ -/* Description: Configuration register */ - -/* Bits 1..0 : Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated. */ -#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ -#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ -#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */ -#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write Enabled */ -#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */ - -/* Register: NVMC_ERASEPAGE */ -/* Description: Register for erasing a page in Code area */ - -/* Bits 31..0 : Register for starting erase of a page in Code area */ -#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */ -#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */ - -/* Register: NVMC_ERASEPCR1 */ -/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ - -/* Bits 31..0 : Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ -#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */ -#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */ - -/* Register: NVMC_ERASEALL */ -/* Description: Register for erasing all non-volatile user memory */ - -/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased. */ -#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */ -#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase */ - -/* Register: NVMC_ERASEPCR0 */ -/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ - -/* Bits 31..0 : Register for starting erase of a page in Code area. Equivalent to ERASEPAGE. */ -#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */ -#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */ - -/* Register: NVMC_ERASEUICR */ -/* Description: Register for erasing User Information Configuration Registers */ - -/* Bit 0 : Register starting erase of all User Information Configuration Registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased. */ -#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */ -#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */ - -/* Register: NVMC_ICACHECNF */ -/* Description: I-Code cache configuration register. */ - -/* Bit 8 : Cache profiling enable */ -#define NVMC_ICACHECNF_CACHEPROFEN_Pos (8UL) /*!< Position of CACHEPROFEN field. */ -#define NVMC_ICACHECNF_CACHEPROFEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos) /*!< Bit mask of CACHEPROFEN field. */ -#define NVMC_ICACHECNF_CACHEPROFEN_Disabled (0UL) /*!< Disable cache profiling */ -#define NVMC_ICACHECNF_CACHEPROFEN_Enabled (1UL) /*!< Enable cache profiling */ - -/* Bit 0 : Cache enable */ -#define NVMC_ICACHECNF_CACHEEN_Pos (0UL) /*!< Position of CACHEEN field. */ -#define NVMC_ICACHECNF_CACHEEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos) /*!< Bit mask of CACHEEN field. */ -#define NVMC_ICACHECNF_CACHEEN_Disabled (0UL) /*!< Disable cache. Invalidates all cache entries. */ -#define NVMC_ICACHECNF_CACHEEN_Enabled (1UL) /*!< Enable cache */ - -/* Register: NVMC_IHIT */ -/* Description: I-Code cache hit counter. */ - -/* Bits 31..0 : Number of cache hits */ -#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */ -#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */ - -/* Register: NVMC_IMISS */ -/* Description: I-Code cache miss counter. */ - -/* Bits 31..0 : Number of cache misses */ -#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */ -#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */ - - -/* Peripheral: GPIO */ -/* Description: GPIO Port 1 */ - -/* Register: GPIO_OUT */ -/* Description: Write GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */ -#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */ - -/* Register: GPIO_OUTSET */ -/* Description: Set individual bits in GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ - -/* Register: GPIO_OUTCLR */ -/* Description: Clear individual bits in GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 30 : Pin 30 */ -#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 29 : Pin 29 */ -#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 28 : Pin 28 */ -#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 27 : Pin 27 */ -#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 26 : Pin 26 */ -#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 25 : Pin 25 */ -#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 24 : Pin 24 */ -#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 23 : Pin 23 */ -#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 22 : Pin 22 */ -#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 21 : Pin 21 */ -#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 20 : Pin 20 */ -#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 19 : Pin 19 */ -#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 18 : Pin 18 */ -#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 17 : Pin 17 */ -#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 16 : Pin 16 */ -#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 15 : Pin 15 */ -#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 14 : Pin 14 */ -#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 13 : Pin 13 */ -#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 12 : Pin 12 */ -#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 11 : Pin 11 */ -#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 10 : Pin 10 */ -#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 9 : Pin 9 */ -#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 8 : Pin 8 */ -#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 7 : Pin 7 */ -#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 6 : Pin 6 */ -#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 5 : Pin 5 */ -#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 4 : Pin 4 */ -#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 3 : Pin 3 */ -#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 2 : Pin 2 */ -#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 1 : Pin 1 */ -#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Bit 0 : Pin 0 */ -#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */ -#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */ -#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ - -/* Register: GPIO_IN */ -/* Description: Read GPIO port */ - -/* Bit 31 : Pin 31 */ -#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */ - -/* Bit 30 : Pin 30 */ -#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */ - -/* Bit 29 : Pin 29 */ -#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */ - -/* Bit 28 : Pin 28 */ -#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */ - -/* Bit 27 : Pin 27 */ -#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */ - -/* Bit 26 : Pin 26 */ -#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */ - -/* Bit 25 : Pin 25 */ -#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */ - -/* Bit 24 : Pin 24 */ -#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */ - -/* Bit 23 : Pin 23 */ -#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */ - -/* Bit 22 : Pin 22 */ -#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */ - -/* Bit 21 : Pin 21 */ -#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */ - -/* Bit 20 : Pin 20 */ -#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */ - -/* Bit 19 : Pin 19 */ -#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */ - -/* Bit 18 : Pin 18 */ -#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */ - -/* Bit 17 : Pin 17 */ -#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */ - -/* Bit 16 : Pin 16 */ -#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */ - -/* Bit 15 : Pin 15 */ -#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */ - -/* Bit 14 : Pin 14 */ -#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */ - -/* Bit 13 : Pin 13 */ -#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */ - -/* Bit 12 : Pin 12 */ -#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */ - -/* Bit 11 : Pin 11 */ -#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */ - -/* Bit 10 : Pin 10 */ -#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */ - -/* Bit 9 : Pin 9 */ -#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */ - -/* Bit 8 : Pin 8 */ -#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */ - -/* Bit 7 : Pin 7 */ -#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */ - -/* Bit 6 : Pin 6 */ -#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */ - -/* Bit 5 : Pin 5 */ -#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */ - -/* Bit 4 : Pin 4 */ -#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */ - -/* Bit 3 : Pin 3 */ -#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */ - -/* Bit 2 : Pin 2 */ -#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */ - -/* Bit 1 : Pin 1 */ -#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */ - -/* Bit 0 : Pin 0 */ -#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */ -#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */ - -/* Register: GPIO_DIR */ -/* Description: Direction of GPIO pins */ - -/* Bit 31 : Pin 31 */ -#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */ - -/* Bit 30 : Pin 30 */ -#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */ - -/* Bit 29 : Pin 29 */ -#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */ - -/* Bit 28 : Pin 28 */ -#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */ - -/* Bit 27 : Pin 27 */ -#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */ - -/* Bit 26 : Pin 26 */ -#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */ - -/* Bit 25 : Pin 25 */ -#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */ - -/* Bit 24 : Pin 24 */ -#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */ - -/* Bit 23 : Pin 23 */ -#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */ - -/* Bit 22 : Pin 22 */ -#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */ - -/* Bit 21 : Pin 21 */ -#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */ - -/* Bit 20 : Pin 20 */ -#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */ - -/* Bit 19 : Pin 19 */ -#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */ - -/* Bit 18 : Pin 18 */ -#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */ - -/* Bit 17 : Pin 17 */ -#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */ - -/* Bit 16 : Pin 16 */ -#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */ - -/* Bit 15 : Pin 15 */ -#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */ - -/* Bit 14 : Pin 14 */ -#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */ - -/* Bit 13 : Pin 13 */ -#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */ - -/* Bit 12 : Pin 12 */ -#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */ - -/* Bit 11 : Pin 11 */ -#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */ - -/* Bit 10 : Pin 10 */ -#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */ - -/* Bit 9 : Pin 9 */ -#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */ - -/* Bit 8 : Pin 8 */ -#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */ - -/* Bit 7 : Pin 7 */ -#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */ - -/* Bit 6 : Pin 6 */ -#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */ - -/* Bit 5 : Pin 5 */ -#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */ - -/* Bit 4 : Pin 4 */ -#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */ - -/* Bit 3 : Pin 3 */ -#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */ - -/* Bit 2 : Pin 2 */ -#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */ - -/* Bit 1 : Pin 1 */ -#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */ - -/* Bit 0 : Pin 0 */ -#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */ -#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */ - -/* Register: GPIO_DIRSET */ -/* Description: DIR set register */ - -/* Bit 31 : Set as output pin 31 */ -#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 30 : Set as output pin 30 */ -#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 29 : Set as output pin 29 */ -#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 28 : Set as output pin 28 */ -#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 27 : Set as output pin 27 */ -#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 26 : Set as output pin 26 */ -#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 25 : Set as output pin 25 */ -#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 24 : Set as output pin 24 */ -#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 23 : Set as output pin 23 */ -#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 22 : Set as output pin 22 */ -#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 21 : Set as output pin 21 */ -#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 20 : Set as output pin 20 */ -#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 19 : Set as output pin 19 */ -#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 18 : Set as output pin 18 */ -#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 17 : Set as output pin 17 */ -#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 16 : Set as output pin 16 */ -#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 15 : Set as output pin 15 */ -#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 14 : Set as output pin 14 */ -#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 13 : Set as output pin 13 */ -#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 12 : Set as output pin 12 */ -#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 11 : Set as output pin 11 */ -#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 10 : Set as output pin 10 */ -#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 9 : Set as output pin 9 */ -#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 8 : Set as output pin 8 */ -#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 7 : Set as output pin 7 */ -#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 6 : Set as output pin 6 */ -#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 5 : Set as output pin 5 */ -#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 4 : Set as output pin 4 */ -#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 3 : Set as output pin 3 */ -#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 2 : Set as output pin 2 */ -#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 1 : Set as output pin 1 */ -#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Bit 0 : Set as output pin 0 */ -#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ - -/* Register: GPIO_DIRCLR */ -/* Description: DIR clear register */ - -/* Bit 31 : Set as input pin 31 */ -#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 30 : Set as input pin 30 */ -#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 29 : Set as input pin 29 */ -#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 28 : Set as input pin 28 */ -#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 27 : Set as input pin 27 */ -#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 26 : Set as input pin 26 */ -#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 25 : Set as input pin 25 */ -#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 24 : Set as input pin 24 */ -#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 23 : Set as input pin 23 */ -#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 22 : Set as input pin 22 */ -#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 21 : Set as input pin 21 */ -#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 20 : Set as input pin 20 */ -#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 19 : Set as input pin 19 */ -#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 18 : Set as input pin 18 */ -#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 17 : Set as input pin 17 */ -#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 16 : Set as input pin 16 */ -#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 15 : Set as input pin 15 */ -#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 14 : Set as input pin 14 */ -#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 13 : Set as input pin 13 */ -#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 12 : Set as input pin 12 */ -#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 11 : Set as input pin 11 */ -#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 10 : Set as input pin 10 */ -#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 9 : Set as input pin 9 */ -#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 8 : Set as input pin 8 */ -#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 7 : Set as input pin 7 */ -#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 6 : Set as input pin 6 */ -#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 5 : Set as input pin 5 */ -#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 4 : Set as input pin 4 */ -#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 3 : Set as input pin 3 */ -#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 2 : Set as input pin 2 */ -#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 1 : Set as input pin 1 */ -#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Bit 0 : Set as input pin 0 */ -#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */ -#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */ -#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ - -/* Register: GPIO_LATCH */ -/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */ - -/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */ - -/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */ -#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */ -#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */ - -/* Register: GPIO_DETECTMODE */ -/* Description: Select between default DETECT signal behaviour and LDETECT mode */ - -/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */ -#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */ -#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */ -#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */ -#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */ - -/* Register: GPIO_PIN_CNF */ -/* Description: Description collection[0]: Configuration of GPIO pins */ - -/* Bits 17..16 : Pin sensing mechanism */ -#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */ -#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */ -#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */ - -/* Bits 10..8 : Drive configuration */ -#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */ -#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */ -#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */ -#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */ -#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */ -#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */ -#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */ -#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */ - -/* Bits 3..2 : Pull configuration */ -#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ -#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ -#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */ -#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */ -#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */ - -/* Bit 1 : Connect or disconnect input buffer */ -#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */ -#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */ - -/* Bit 0 : Pin direction. Same physical register as DIR register */ -#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ -#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ -#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */ -#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */ - - -/* Peripheral: PDM */ -/* Description: Pulse Density Modulation (Digital Microphone) Interface */ - -/* Register: PDM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 2 : Enable or disable interrupt for END event */ -#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for STARTED event */ -#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Register: PDM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for END event */ -#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ -#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Register: PDM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for END event */ -#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */ -#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ -#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Register: PDM_ENABLE */ -/* Description: PDM module enable register */ - -/* Bit 0 : Enable or disable PDM module */ -#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: PDM_PDMCLKCTRL */ -/* Description: PDM clock generator control */ - -/* Bits 31..0 : PDM_CLK frequency */ -#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */ -#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */ -#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */ -#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz */ -#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */ - -/* Register: PDM_MODE */ -/* Description: Defines the routing of the connected PDM microphones' signals */ - -/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */ -#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */ -#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */ -#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */ -#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */ - -/* Bit 0 : Mono or stereo operation */ -#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */ -#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */ -#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */ -#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */ - -/* Register: PDM_GAINL */ -/* Description: Left output gain adjustment */ - -/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */ -#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */ -#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */ -#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ -#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ -#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ - -/* Register: PDM_GAINR */ -/* Description: Right output gain adjustment */ - -/* Bits 7..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */ -#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */ -#define PDM_GAINR_GAINR_Msk (0xFFUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */ -#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ -#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ -#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ - -/* Register: PDM_PSEL_CLK */ -/* Description: Pin number configuration for PDM CLK signal */ - -/* Bit 31 : Connection */ -#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */ -#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: PDM_PSEL_DIN */ -/* Description: Pin number configuration for PDM DIN signal */ - -/* Bit 31 : Connection */ -#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */ -#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: PDM_SAMPLE_PTR */ -/* Description: RAM address pointer to write samples to with EasyDMA */ - -/* Bits 31..0 : Address to write PDM samples to over DMA */ -#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */ -#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */ - -/* Register: PDM_SAMPLE_MAXCNT */ -/* Description: Number of samples to allocate memory for in EasyDMA mode */ - -/* Bits 14..0 : Length of DMA RAM allocation in number of samples */ -#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */ -#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */ - - -/* Peripheral: POWER */ -/* Description: Power control */ - -/* Register: POWER_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 6 : Write '1' to Enable interrupt for SLEEPEXIT event */ -#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ -#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ -#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for SLEEPENTER event */ -#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ -#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ -#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for POFWARN event */ -#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */ - -/* Register: POWER_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 6 : Write '1' to Disable interrupt for SLEEPEXIT event */ -#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ -#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ -#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for SLEEPENTER event */ -#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ -#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ -#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for POFWARN event */ -#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */ -#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */ -#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */ - -/* Register: POWER_RESETREAS */ -/* Description: Reset reason */ - -/* Bit 19 : Reset due to wake up from System OFF mode by NFC field detect */ -#define POWER_RESETREAS_NFC_Pos (19UL) /*!< Position of NFC field. */ -#define POWER_RESETREAS_NFC_Msk (0x1UL << POWER_RESETREAS_NFC_Pos) /*!< Bit mask of NFC field. */ -#define POWER_RESETREAS_NFC_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_NFC_Detected (1UL) /*!< Detected */ - -/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */ -#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ -#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ -#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */ - -/* Bit 17 : Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP */ -#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ -#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ -#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Detected */ - -/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */ -#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ -#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ -#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */ - -/* Bit 3 : Reset from CPU lock-up detected */ -#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ -#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ -#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */ - -/* Bit 2 : Reset from soft reset detected */ -#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ -#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ -#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */ - -/* Bit 1 : Reset from watchdog detected */ -#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ -#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ -#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */ - -/* Bit 0 : Reset from pin-reset detected */ -#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ -#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ -#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */ -#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */ - -/* Register: POWER_RAMSTATUS */ -/* Description: Deprecated register - RAM status register */ - -/* Bit 3 : RAM block 3 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< On */ - -/* Bit 2 : RAM block 2 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< On */ - -/* Bit 1 : RAM block 1 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< On */ - -/* Bit 0 : RAM block 0 is on or off/powering up */ -#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< Off */ -#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< On */ - -/* Register: POWER_SYSTEMOFF */ -/* Description: System OFF register */ - -/* Bit 0 : Enable System OFF mode */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */ - -/* Register: POWER_POFCON */ -/* Description: Power failure comparator configuration */ - -/* Bits 4..1 : Power failure comparator threshold setting */ -#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */ -#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */ -#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */ -#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */ -#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */ -#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */ -#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */ -#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */ -#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */ -#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */ -#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */ -#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */ - -/* Bit 0 : Enable or disable power failure comparator */ -#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ -#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ -#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */ -#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */ - -/* Register: POWER_GPREGRET */ -/* Description: General purpose retention register */ - -/* Bits 7..0 : General purpose retention register */ -#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ -#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ - -/* Register: POWER_GPREGRET2 */ -/* Description: General purpose retention register */ - -/* Bits 7..0 : General purpose retention register */ -#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ -#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ - -/* Register: POWER_RAMON */ -/* Description: Deprecated register - RAM on/off register (this register is retained) */ - -/* Bit 17 : Keep retention on RAM block 1 when RAM block is switched off */ -#define POWER_RAMON_OFFRAM1_Pos (17UL) /*!< Position of OFFRAM1 field. */ -#define POWER_RAMON_OFFRAM1_Msk (0x1UL << POWER_RAMON_OFFRAM1_Pos) /*!< Bit mask of OFFRAM1 field. */ -#define POWER_RAMON_OFFRAM1_RAM1Off (0UL) /*!< Off */ -#define POWER_RAMON_OFFRAM1_RAM1On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM block 0 when RAM block is switched off */ -#define POWER_RAMON_OFFRAM0_Pos (16UL) /*!< Position of OFFRAM0 field. */ -#define POWER_RAMON_OFFRAM0_Msk (0x1UL << POWER_RAMON_OFFRAM0_Pos) /*!< Bit mask of OFFRAM0 field. */ -#define POWER_RAMON_OFFRAM0_RAM0Off (0UL) /*!< Off */ -#define POWER_RAMON_OFFRAM0_RAM0On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM block 1 on or off in system ON Mode */ -#define POWER_RAMON_ONRAM1_Pos (1UL) /*!< Position of ONRAM1 field. */ -#define POWER_RAMON_ONRAM1_Msk (0x1UL << POWER_RAMON_ONRAM1_Pos) /*!< Bit mask of ONRAM1 field. */ -#define POWER_RAMON_ONRAM1_RAM1Off (0UL) /*!< Off */ -#define POWER_RAMON_ONRAM1_RAM1On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM block 0 on or off in system ON Mode */ -#define POWER_RAMON_ONRAM0_Pos (0UL) /*!< Position of ONRAM0 field. */ -#define POWER_RAMON_ONRAM0_Msk (0x1UL << POWER_RAMON_ONRAM0_Pos) /*!< Bit mask of ONRAM0 field. */ -#define POWER_RAMON_ONRAM0_RAM0Off (0UL) /*!< Off */ -#define POWER_RAMON_ONRAM0_RAM0On (1UL) /*!< On */ - -/* Register: POWER_RAMONB */ -/* Description: Deprecated register - RAM on/off register (this register is retained) */ - -/* Bit 17 : Keep retention on RAM block 3 when RAM block is switched off */ -#define POWER_RAMONB_OFFRAM3_Pos (17UL) /*!< Position of OFFRAM3 field. */ -#define POWER_RAMONB_OFFRAM3_Msk (0x1UL << POWER_RAMONB_OFFRAM3_Pos) /*!< Bit mask of OFFRAM3 field. */ -#define POWER_RAMONB_OFFRAM3_RAM3Off (0UL) /*!< Off */ -#define POWER_RAMONB_OFFRAM3_RAM3On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM block 2 when RAM block is switched off */ -#define POWER_RAMONB_OFFRAM2_Pos (16UL) /*!< Position of OFFRAM2 field. */ -#define POWER_RAMONB_OFFRAM2_Msk (0x1UL << POWER_RAMONB_OFFRAM2_Pos) /*!< Bit mask of OFFRAM2 field. */ -#define POWER_RAMONB_OFFRAM2_RAM2Off (0UL) /*!< Off */ -#define POWER_RAMONB_OFFRAM2_RAM2On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM block 3 on or off in system ON Mode */ -#define POWER_RAMONB_ONRAM3_Pos (1UL) /*!< Position of ONRAM3 field. */ -#define POWER_RAMONB_ONRAM3_Msk (0x1UL << POWER_RAMONB_ONRAM3_Pos) /*!< Bit mask of ONRAM3 field. */ -#define POWER_RAMONB_ONRAM3_RAM3Off (0UL) /*!< Off */ -#define POWER_RAMONB_ONRAM3_RAM3On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM block 2 on or off in system ON Mode */ -#define POWER_RAMONB_ONRAM2_Pos (0UL) /*!< Position of ONRAM2 field. */ -#define POWER_RAMONB_ONRAM2_Msk (0x1UL << POWER_RAMONB_ONRAM2_Pos) /*!< Bit mask of ONRAM2 field. */ -#define POWER_RAMONB_ONRAM2_RAM2Off (0UL) /*!< Off */ -#define POWER_RAMONB_ONRAM2_RAM2On (1UL) /*!< On */ - -/* Register: POWER_DCDCEN */ -/* Description: DC/DC enable register */ - -/* Bit 0 : Enable or disable DC/DC converter */ -#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */ -#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */ - -/* Register: POWER_RAM_POWER */ -/* Description: Description cluster[0]: RAM0 power control register */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is in OFF */ -#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is in OFF */ -#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM section S1 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM section S0 ON or OFF in System ON mode. */ -#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */ -#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */ - -/* Register: POWER_RAM_POWERSET */ -/* Description: Description cluster[0]: RAM0 power control set register */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ -#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */ - -/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */ - -/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */ - -/* Register: POWER_RAM_POWERCLR */ -/* Description: Description cluster[0]: RAM0 power control clear register */ - -/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ -#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ -#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */ - -/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ -#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ -#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ -#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */ - -/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ -#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ -#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */ - -/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ -#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ -#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ -#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */ - - -/* Peripheral: PPI */ -/* Description: Programmable Peripheral Interconnect */ - -/* Register: PPI_CHEN */ -/* Description: Channel enable register */ - -/* Bit 31 : Enable or disable channel 31 */ -#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */ - -/* Bit 30 : Enable or disable channel 30 */ -#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */ - -/* Bit 29 : Enable or disable channel 29 */ -#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */ - -/* Bit 28 : Enable or disable channel 28 */ -#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */ - -/* Bit 27 : Enable or disable channel 27 */ -#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */ - -/* Bit 26 : Enable or disable channel 26 */ -#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */ - -/* Bit 25 : Enable or disable channel 25 */ -#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */ - -/* Bit 24 : Enable or disable channel 24 */ -#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */ - -/* Bit 23 : Enable or disable channel 23 */ -#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */ - -/* Bit 22 : Enable or disable channel 22 */ -#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */ - -/* Bit 21 : Enable or disable channel 21 */ -#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */ - -/* Bit 20 : Enable or disable channel 20 */ -#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */ - -/* Bit 19 : Enable or disable channel 19 */ -#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */ - -/* Bit 18 : Enable or disable channel 18 */ -#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */ - -/* Bit 17 : Enable or disable channel 17 */ -#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */ - -/* Bit 16 : Enable or disable channel 16 */ -#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */ - -/* Bit 15 : Enable or disable channel 15 */ -#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */ - -/* Bit 14 : Enable or disable channel 14 */ -#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */ - -/* Bit 13 : Enable or disable channel 13 */ -#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */ - -/* Bit 12 : Enable or disable channel 12 */ -#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */ - -/* Bit 11 : Enable or disable channel 11 */ -#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */ - -/* Bit 10 : Enable or disable channel 10 */ -#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */ - -/* Bit 9 : Enable or disable channel 9 */ -#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */ - -/* Bit 8 : Enable or disable channel 8 */ -#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */ - -/* Bit 7 : Enable or disable channel 7 */ -#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */ - -/* Bit 6 : Enable or disable channel 6 */ -#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */ - -/* Bit 5 : Enable or disable channel 5 */ -#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */ - -/* Bit 4 : Enable or disable channel 4 */ -#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */ - -/* Bit 3 : Enable or disable channel 3 */ -#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */ - -/* Bit 2 : Enable or disable channel 2 */ -#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */ - -/* Bit 1 : Enable or disable channel 1 */ -#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */ - -/* Bit 0 : Enable or disable channel 0 */ -#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */ -#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */ - -/* Register: PPI_CHENSET */ -/* Description: Channel enable set register */ - -/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */ - -/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */ -#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */ - -/* Register: PPI_CHENCLR */ -/* Description: Channel enable clear register */ - -/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */ - -/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */ -#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */ -#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */ -#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */ - -/* Register: PPI_CH_EEP */ -/* Description: Description cluster[0]: Channel 0 event end-point */ - -/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */ -#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */ -#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */ - -/* Register: PPI_CH_TEP */ -/* Description: Description cluster[0]: Channel 0 task end-point */ - -/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */ -#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ -#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ - -/* Register: PPI_CHG */ -/* Description: Description collection[0]: Channel group 0 */ - -/* Bit 31 : Include or exclude channel 31 */ -#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH31_Included (1UL) /*!< Include */ - -/* Bit 30 : Include or exclude channel 30 */ -#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH30_Included (1UL) /*!< Include */ - -/* Bit 29 : Include or exclude channel 29 */ -#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH29_Included (1UL) /*!< Include */ - -/* Bit 28 : Include or exclude channel 28 */ -#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH28_Included (1UL) /*!< Include */ - -/* Bit 27 : Include or exclude channel 27 */ -#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH27_Included (1UL) /*!< Include */ - -/* Bit 26 : Include or exclude channel 26 */ -#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH26_Included (1UL) /*!< Include */ - -/* Bit 25 : Include or exclude channel 25 */ -#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH25_Included (1UL) /*!< Include */ - -/* Bit 24 : Include or exclude channel 24 */ -#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH24_Included (1UL) /*!< Include */ - -/* Bit 23 : Include or exclude channel 23 */ -#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH23_Included (1UL) /*!< Include */ - -/* Bit 22 : Include or exclude channel 22 */ -#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH22_Included (1UL) /*!< Include */ - -/* Bit 21 : Include or exclude channel 21 */ -#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH21_Included (1UL) /*!< Include */ - -/* Bit 20 : Include or exclude channel 20 */ -#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH20_Included (1UL) /*!< Include */ - -/* Bit 19 : Include or exclude channel 19 */ -#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */ -#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */ -#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH19_Included (1UL) /*!< Include */ - -/* Bit 18 : Include or exclude channel 18 */ -#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */ -#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */ -#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH18_Included (1UL) /*!< Include */ - -/* Bit 17 : Include or exclude channel 17 */ -#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */ -#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */ -#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH17_Included (1UL) /*!< Include */ - -/* Bit 16 : Include or exclude channel 16 */ -#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */ -#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */ -#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH16_Included (1UL) /*!< Include */ - -/* Bit 15 : Include or exclude channel 15 */ -#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH15_Included (1UL) /*!< Include */ - -/* Bit 14 : Include or exclude channel 14 */ -#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH14_Included (1UL) /*!< Include */ - -/* Bit 13 : Include or exclude channel 13 */ -#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH13_Included (1UL) /*!< Include */ - -/* Bit 12 : Include or exclude channel 12 */ -#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH12_Included (1UL) /*!< Include */ - -/* Bit 11 : Include or exclude channel 11 */ -#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH11_Included (1UL) /*!< Include */ - -/* Bit 10 : Include or exclude channel 10 */ -#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH10_Included (1UL) /*!< Include */ - -/* Bit 9 : Include or exclude channel 9 */ -#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH9_Included (1UL) /*!< Include */ - -/* Bit 8 : Include or exclude channel 8 */ -#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH8_Included (1UL) /*!< Include */ - -/* Bit 7 : Include or exclude channel 7 */ -#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH7_Included (1UL) /*!< Include */ - -/* Bit 6 : Include or exclude channel 6 */ -#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH6_Included (1UL) /*!< Include */ - -/* Bit 5 : Include or exclude channel 5 */ -#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH5_Included (1UL) /*!< Include */ - -/* Bit 4 : Include or exclude channel 4 */ -#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH4_Included (1UL) /*!< Include */ - -/* Bit 3 : Include or exclude channel 3 */ -#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH3_Included (1UL) /*!< Include */ - -/* Bit 2 : Include or exclude channel 2 */ -#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH2_Included (1UL) /*!< Include */ - -/* Bit 1 : Include or exclude channel 1 */ -#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH1_Included (1UL) /*!< Include */ - -/* Bit 0 : Include or exclude channel 0 */ -#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */ -#define PPI_CHG_CH0_Included (1UL) /*!< Include */ - -/* Register: PPI_FORK_TEP */ -/* Description: Description cluster[0]: Channel 0 task end-point */ - -/* Bits 31..0 : Pointer to task register */ -#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ -#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ - - -/* Peripheral: PWM */ -/* Description: Pulse Width Modulation Unit 0 */ - -/* Register: PWM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between LOOPSDONE event and STOP task */ -#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */ -#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */ -#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between LOOPSDONE event and SEQSTART[1] task */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between LOOPSDONE event and SEQSTART[0] task */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between SEQEND[1] event and STOP task */ -#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */ -#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */ -#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between SEQEND[0] event and STOP task */ -#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */ -#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */ -#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: PWM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 7 : Enable or disable interrupt for LOOPSDONE event */ -#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for PWMPERIODEND event */ -#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for SEQEND[1] event */ -#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for SEQEND[0] event */ -#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for SEQSTARTED[1] event */ -#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for SEQSTARTED[0] event */ -#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: PWM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 7 : Write '1' to Enable interrupt for LOOPSDONE event */ -#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for PWMPERIODEND event */ -#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for SEQEND[1] event */ -#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for SEQEND[0] event */ -#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for SEQSTARTED[1] event */ -#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for SEQSTARTED[0] event */ -#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: PWM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 7 : Write '1' to Disable interrupt for LOOPSDONE event */ -#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ -#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ -#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for PWMPERIODEND event */ -#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ -#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ -#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for SEQEND[1] event */ -#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ -#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ -#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for SEQEND[0] event */ -#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ -#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ -#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for SEQSTARTED[1] event */ -#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ -#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ -#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for SEQSTARTED[0] event */ -#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ -#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ -#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: PWM_ENABLE */ -/* Description: PWM module enable register */ - -/* Bit 0 : Enable or disable PWM module */ -#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */ -#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: PWM_MODE */ -/* Description: Selects operating mode of the wave counter */ - -/* Bit 0 : Selects up or up and down as wave counter mode */ -#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */ -#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */ -#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */ -#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */ - -/* Register: PWM_COUNTERTOP */ -/* Description: Value up to which the pulse generator counter counts */ - -/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used. */ -#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */ -#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */ - -/* Register: PWM_PRESCALER */ -/* Description: Configuration for PWM_CLK */ - -/* Bits 2..0 : Pre-scaler of PWM_CLK */ -#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ -#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 ( 8MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 ( 4MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 ( 2MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 ( 1MHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 ( 500kHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 ( 250kHz) */ -#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 ( 125kHz) */ - -/* Register: PWM_DECODER */ -/* Description: Configuration of the decoder */ - -/* Bit 8 : Selects source for advancing the active sequence */ -#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */ -#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */ -#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */ -#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */ - -/* Bits 2..0 : How a sequence is read from RAM and spread to the compare register */ -#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */ -#define PWM_DECODER_LOAD_Msk (0x7UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */ -#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */ -#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */ -#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */ -#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */ - -/* Register: PWM_LOOP */ -/* Description: Amount of playback of a loop */ - -/* Bits 15..0 : Amount of playback of pattern cycles */ -#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */ - -/* Register: PWM_SEQ_PTR */ -/* Description: Description cluster[0]: Beginning address in Data RAM of this sequence */ - -/* Bits 31..0 : Beginning address in Data RAM of this sequence */ -#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: PWM_SEQ_CNT */ -/* Description: Description cluster[0]: Amount of values (duty cycles) in this sequence */ - -/* Bits 14..0 : Amount of values (duty cycles) in this sequence */ -#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */ - -/* Register: PWM_SEQ_REFRESH */ -/* Description: Description cluster[0]: Amount of additional PWM periods between samples loaded into compare register */ - -/* Bits 23..0 : Amount of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */ -#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */ -#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */ - -/* Register: PWM_SEQ_ENDDELAY */ -/* Description: Description cluster[0]: Time added after the sequence */ - -/* Bits 23..0 : Time added after the sequence in PWM periods */ -#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */ -#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */ - -/* Register: PWM_PSEL_OUT */ -/* Description: Description collection[0]: Output pin select for PWM channel 0 */ - -/* Bit 31 : Connection */ -#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */ -#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */ - - -/* Peripheral: QDEC */ -/* Description: Quadrature Decoder */ - -/* Register: QDEC_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 6 : Shortcut between SAMPLERDY event and READCLRACC task */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between DBLRDY event and STOP task */ -#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */ -#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */ -#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between DBLRDY event and RDCLRDBL task */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between REPORTRDY event and STOP task */ -#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */ -#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */ -#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between REPORTRDY event and RDCLRACC task */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between SAMPLERDY event and STOP task */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: QDEC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 4 : Write '1' to Enable interrupt for STOPPED event */ -#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ -#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for DBLRDY event */ -#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ -#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ -#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for ACCOF event */ -#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for REPORTRDY event */ -#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for SAMPLERDY event */ -#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */ - -/* Register: QDEC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 4 : Write '1' to Disable interrupt for STOPPED event */ -#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ -#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for DBLRDY event */ -#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ -#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ -#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for ACCOF event */ -#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for REPORTRDY event */ -#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for SAMPLERDY event */ -#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ -#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ -#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */ - -/* Register: QDEC_ENABLE */ -/* Description: Enable the quadrature decoder */ - -/* Bit 0 : Enable or disable the quadrature decoder */ -#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ -#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ - -/* Register: QDEC_LEDPOL */ -/* Description: LED output pin polarity */ - -/* Bit 0 : LED output pin polarity */ -#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */ -#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */ - -/* Register: QDEC_SAMPLEPER */ -/* Description: Sample period */ - -/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */ -#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */ -#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */ - -/* Register: QDEC_SAMPLE */ -/* Description: Motion sample value */ - -/* Bits 31..0 : Last motion sample */ -#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ -#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ - -/* Register: QDEC_REPORTPER */ -/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */ - -/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */ -#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */ -#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */ -#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */ -#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */ -#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */ -#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */ -#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */ -#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */ -#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */ - -/* Register: QDEC_ACC */ -/* Description: Register accumulating the valid transitions */ - -/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */ -#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */ -#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */ - -/* Register: QDEC_ACCREAD */ -/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */ - -/* Bits 31..0 : Snapshot of the ACC register. */ -#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */ -#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */ - -/* Register: QDEC_PSEL_LED */ -/* Description: Pin select for LED signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_PSEL_A */ -/* Description: Pin select for A signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_PSEL_B */ -/* Description: Pin select for B signal */ - -/* Bit 31 : Connection */ -#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */ -#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: QDEC_DBFEN */ -/* Description: Enable input debounce filters */ - -/* Bit 0 : Enable input debounce filters */ -#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */ -#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */ - -/* Register: QDEC_LEDPRE */ -/* Description: Time period the LED is switched ON prior to sampling */ - -/* Bits 8..0 : Period in us the LED is switched on prior to sampling */ -#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ -#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ - -/* Register: QDEC_ACCDBL */ -/* Description: Register accumulating the number of detected double transitions */ - -/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */ -#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ -#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ - -/* Register: QDEC_ACCDBLREAD */ -/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */ - -/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ - - -/* Peripheral: RADIO */ -/* Description: 2.4 GHz Radio */ - -/* Register: RADIO_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 6 : Shortcut between ADDRESS event and BCSTART task */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between END event and START task */ -#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ -#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between DISABLED event and RXEN task */ -#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between DISABLED event and TXEN task */ -#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between END event and DISABLE task */ -#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between READY event and START task */ -#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ -#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ -#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */ -#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: RADIO_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 13 : Write '1' to Enable interrupt for CRCERROR event */ -#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ -#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for CRCOK event */ -#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ -#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ -#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for BCMATCH event */ -#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for RSSIEND event */ -#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for DEVMISS event */ -#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for DEVMATCH event */ -#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for DISABLED event */ -#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for END event */ -#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for PAYLOAD event */ -#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for ADDRESS event */ -#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for READY event */ -#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: RADIO_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 13 : Write '1' to Disable interrupt for CRCERROR event */ -#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ -#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ -#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for CRCOK event */ -#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ -#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ -#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for BCMATCH event */ -#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for RSSIEND event */ -#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for DEVMISS event */ -#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for DEVMATCH event */ -#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for DISABLED event */ -#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for END event */ -#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for PAYLOAD event */ -#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for ADDRESS event */ -#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for READY event */ -#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: RADIO_CRCSTATUS */ -/* Description: CRC status */ - -/* Bit 0 : CRC status of packet received */ -#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */ - -/* Register: RADIO_RXMATCH */ -/* Description: Received address */ - -/* Bits 2..0 : Received address */ -#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ -#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ - -/* Register: RADIO_RXCRC */ -/* Description: CRC field of previously received packet */ - -/* Bits 23..0 : CRC field of previously received packet */ -#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ -#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ - -/* Register: RADIO_DAI */ -/* Description: Device address match index */ - -/* Bits 2..0 : Device address match index */ -#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ -#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ - -/* Register: RADIO_PACKETPTR */ -/* Description: Packet pointer */ - -/* Bits 31..0 : Packet pointer */ -#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */ -#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */ - -/* Register: RADIO_FREQUENCY */ -/* Description: Frequency */ - -/* Bit 8 : Channel map selection. */ -#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */ -#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */ -#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */ -#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */ - -/* Bits 6..0 : Radio channel frequency */ -#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ - -/* Register: RADIO_TXPOWER */ -/* Description: Output power */ - -/* Bits 7..0 : RADIO output power. */ -#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_0dBm (0x00UL) /*!< 0 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x03UL) /*!< +3 dBm */ -#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x04UL) /*!< +4 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< Deprecated enumerator - -40 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */ -#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */ - -/* Register: RADIO_MODE */ -/* Description: Data rate and modulation */ - -/* Bits 3..0 : Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation. */ -#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Nrf_250Kbit (2UL) /*!< Deprecated enumerator - 250 kbit/s Nordic proprietary radio mode */ -#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s Bluetooth Low Energy */ - -/* Register: RADIO_PCNF0 */ -/* Description: Packet configuration register 0 */ - -/* Bit 24 : Length of preamble on air. Decision point: TASKS_START task */ -#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */ -#define RADIO_PCNF0_PLEN_Msk (0x1UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */ -#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */ -#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */ - -/* Bit 20 : Include or exclude S1 field in RAM */ -#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */ -#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */ -#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */ -#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */ - -/* Bits 19..16 : Length on air of S1 field in number of bits. */ -#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ -#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ - -/* Bit 8 : Length on air of S0 field in number of bytes. */ -#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ -#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ - -/* Bits 3..0 : Length on air of LENGTH field in number of bits. */ -#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ -#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ - -/* Register: RADIO_PCNF1 */ -/* Description: Packet configuration register 1 */ - -/* Bit 25 : Enable or disable packet whitening */ -#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */ -#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */ - -/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */ -#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least Significant bit on air first */ -#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ - -/* Bits 18..16 : Base address length in number of bytes */ -#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ -#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ - -/* Bits 15..8 : Static length in number of bytes */ -#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ -#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ - -/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */ -#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ -#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ - -/* Register: RADIO_BASE0 */ -/* Description: Base address 0 */ - -/* Bits 31..0 : Base address 0 */ -#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */ -#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */ - -/* Register: RADIO_BASE1 */ -/* Description: Base address 1 */ - -/* Bits 31..0 : Base address 1 */ -#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */ -#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */ - -/* Register: RADIO_PREFIX0 */ -/* Description: Prefixes bytes for logical addresses 0-3 */ - -/* Bits 31..24 : Address prefix 3. */ -#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ -#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ - -/* Bits 23..16 : Address prefix 2. */ -#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ -#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ - -/* Bits 15..8 : Address prefix 1. */ -#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ -#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ - -/* Bits 7..0 : Address prefix 0. */ -#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ -#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ - -/* Register: RADIO_PREFIX1 */ -/* Description: Prefixes bytes for logical addresses 4-7 */ - -/* Bits 31..24 : Address prefix 7. */ -#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ -#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ - -/* Bits 23..16 : Address prefix 6. */ -#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ -#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ - -/* Bits 15..8 : Address prefix 5. */ -#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ -#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ - -/* Bits 7..0 : Address prefix 4. */ -#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ -#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ - -/* Register: RADIO_TXADDRESS */ -/* Description: Transmit address select */ - -/* Bits 2..0 : Transmit address select */ -#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ -#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ - -/* Register: RADIO_RXADDRESSES */ -/* Description: Receive address select */ - -/* Bit 7 : Enable or disable reception on logical address 7. */ -#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable reception on logical address 6. */ -#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable reception on logical address 5. */ -#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable reception on logical address 4. */ -#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable reception on logical address 3. */ -#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable reception on logical address 2. */ -#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable reception on logical address 1. */ -#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable reception on logical address 0. */ -#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */ -#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */ - -/* Register: RADIO_CRCCNF */ -/* Description: CRC configuration */ - -/* Bit 8 : Include or exclude packet address field out of CRC calculation. */ -#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Msk (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */ -#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */ - -/* Bits 1..0 : CRC length in number of bytes. */ -#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ -#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ -#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */ -#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */ -#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */ -#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */ - -/* Register: RADIO_CRCPOLY */ -/* Description: CRC polynomial */ - -/* Bits 23..0 : CRC polynomial */ -#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ -#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ - -/* Register: RADIO_CRCINIT */ -/* Description: CRC initial value */ - -/* Bits 23..0 : CRC initial value */ -#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ -#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ - -/* Register: RADIO_TIFS */ -/* Description: Inter Frame Spacing in us */ - -/* Bits 7..0 : Inter Frame Spacing in us */ -#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ -#define RADIO_TIFS_TIFS_Msk (0xFFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ - -/* Register: RADIO_RSSISAMPLE */ -/* Description: RSSI sample */ - -/* Bits 6..0 : RSSI sample */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ - -/* Register: RADIO_STATE */ -/* Description: Current radio state */ - -/* Bits 3..0 : Current radio state */ -#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ -#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ -#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */ -#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */ -#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */ -#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */ -#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */ -#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */ -#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */ -#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */ -#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */ - -/* Register: RADIO_DATAWHITEIV */ -/* Description: Data whitening initial value */ - -/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ - -/* Register: RADIO_BCC */ -/* Description: Bit counter compare */ - -/* Bits 31..0 : Bit counter compare */ -#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */ -#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */ - -/* Register: RADIO_DAB */ -/* Description: Description collection[0]: Device address base segment 0 */ - -/* Bits 31..0 : Device address base segment 0 */ -#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */ -#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */ - -/* Register: RADIO_DAP */ -/* Description: Description collection[0]: Device address prefix 0 */ - -/* Bits 15..0 : Device address prefix 0 */ -#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ -#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ - -/* Register: RADIO_DACNF */ -/* Description: Device address match configuration */ - -/* Bit 15 : TxAdd for device address 7 */ -#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ -#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ - -/* Bit 14 : TxAdd for device address 6 */ -#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ -#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ - -/* Bit 13 : TxAdd for device address 5 */ -#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ -#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ - -/* Bit 12 : TxAdd for device address 4 */ -#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ -#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ - -/* Bit 11 : TxAdd for device address 3 */ -#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ -#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ - -/* Bit 10 : TxAdd for device address 2 */ -#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ -#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ - -/* Bit 9 : TxAdd for device address 1 */ -#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ -#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ - -/* Bit 8 : TxAdd for device address 0 */ -#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ -#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ - -/* Bit 7 : Enable or disable device address matching using device address 7 */ -#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ -#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ -#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */ - -/* Bit 6 : Enable or disable device address matching using device address 6 */ -#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ -#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ -#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */ - -/* Bit 5 : Enable or disable device address matching using device address 5 */ -#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ -#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ -#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */ - -/* Bit 4 : Enable or disable device address matching using device address 4 */ -#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ -#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ -#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */ - -/* Bit 3 : Enable or disable device address matching using device address 3 */ -#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ -#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ -#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */ - -/* Bit 2 : Enable or disable device address matching using device address 2 */ -#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ -#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ -#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */ - -/* Bit 1 : Enable or disable device address matching using device address 1 */ -#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ -#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ -#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */ - -/* Bit 0 : Enable or disable device address matching using device address 0 */ -#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ -#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ -#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */ -#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */ - -/* Register: RADIO_MODECNF0 */ -/* Description: Radio mode configuration register 0 */ - -/* Bits 9..8 : Default TX value */ -#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */ -#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */ -#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */ -#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */ -#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */ - -/* Bit 0 : Radio ramp-up time */ -#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */ -#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */ -#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware written for nRF51 */ -#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification for more information */ - -/* Register: RADIO_POWER */ -/* Description: Peripheral power control */ - -/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */ -#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */ -#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */ - - -/* Peripheral: RNG */ -/* Description: Random Number Generator */ - -/* Register: RNG_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 0 : Shortcut between VALRDY event and STOP task */ -#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: RNG_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for VALRDY event */ -#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */ -#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */ -#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */ - -/* Register: RNG_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for VALRDY event */ -#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */ -#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */ -#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */ - -/* Register: RNG_CONFIG */ -/* Description: Configuration register */ - -/* Bit 0 : Bias correction */ -#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */ -#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */ - -/* Register: RNG_VALUE */ -/* Description: Output random number */ - -/* Bits 7..0 : Generated random number */ -#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ -#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ - - -/* Peripheral: RTC */ -/* Description: Real time counter 0 */ - -/* Register: RTC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ -#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ -#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ -#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ -#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for OVRFLW event */ -#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for TICK event */ -#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */ - -/* Register: RTC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ -#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ -#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ -#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ -#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for OVRFLW event */ -#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for TICK event */ -#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */ - -/* Register: RTC_EVTEN */ -/* Description: Enable or disable event routing */ - -/* Bit 19 : Enable or disable event routing for COMPARE[3] event */ -#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable event routing for COMPARE[2] event */ -#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable event routing for COMPARE[1] event */ -#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Enable */ - -/* Bit 16 : Enable or disable event routing for COMPARE[0] event */ -#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable event routing for OVRFLW event */ -#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable event routing for TICK event */ -#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */ -#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Enable */ - -/* Register: RTC_EVTENSET */ -/* Description: Enable event routing */ - -/* Bit 19 : Write '1' to Enable event routing for COMPARE[3] event */ -#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable event routing for COMPARE[2] event */ -#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable event routing for COMPARE[1] event */ -#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable event routing for COMPARE[0] event */ -#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable event routing for OVRFLW event */ -#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable event routing for TICK event */ -#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */ - -/* Register: RTC_EVTENCLR */ -/* Description: Disable event routing */ - -/* Bit 19 : Write '1' to Disable event routing for COMPARE[3] event */ -#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable event routing for COMPARE[2] event */ -#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable event routing for COMPARE[1] event */ -#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable event routing for COMPARE[0] event */ -#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable event routing for OVRFLW event */ -#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable event routing for TICK event */ -#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ -#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ -#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */ - -/* Register: RTC_COUNTER */ -/* Description: Current COUNTER value */ - -/* Bits 23..0 : Counter value */ -#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ -#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ - -/* Register: RTC_PRESCALER */ -/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */ - -/* Bits 11..0 : Prescaler value */ -#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: RTC_CC */ -/* Description: Description collection[0]: Compare register 0 */ - -/* Bits 23..0 : Compare value */ -#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ -#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ - - -/* Peripheral: SAADC */ -/* Description: Analog to Digital Converter */ - -/* Register: SAADC_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 21 : Enable or disable interrupt for CH[7].LIMITL event */ -#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for CH[7].LIMITH event */ -#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for CH[6].LIMITL event */ -#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for CH[6].LIMITH event */ -#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable interrupt for CH[5].LIMITL event */ -#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 16 : Enable or disable interrupt for CH[5].LIMITH event */ -#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 15 : Enable or disable interrupt for CH[4].LIMITL event */ -#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 14 : Enable or disable interrupt for CH[4].LIMITH event */ -#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 13 : Enable or disable interrupt for CH[3].LIMITL event */ -#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 12 : Enable or disable interrupt for CH[3].LIMITH event */ -#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 11 : Enable or disable interrupt for CH[2].LIMITL event */ -#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 10 : Enable or disable interrupt for CH[2].LIMITH event */ -#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for CH[1].LIMITL event */ -#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for CH[1].LIMITH event */ -#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for CH[0].LIMITL event */ -#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */ - -/* Bit 6 : Enable or disable interrupt for CH[0].LIMITH event */ -#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */ - -/* Bit 5 : Enable or disable interrupt for STOPPED event */ -#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for CALIBRATEDONE event */ -#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 3 : Enable or disable interrupt for RESULTDONE event */ -#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for DONE event */ -#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for END event */ -#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for STARTED event */ -#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */ -#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */ - -/* Register: SAADC_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 21 : Write '1' to Enable interrupt for CH[7].LIMITL event */ -#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for CH[7].LIMITH event */ -#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for CH[6].LIMITL event */ -#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for CH[6].LIMITH event */ -#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for CH[5].LIMITL event */ -#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for CH[5].LIMITH event */ -#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 15 : Write '1' to Enable interrupt for CH[4].LIMITL event */ -#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for CH[4].LIMITH event */ -#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 13 : Write '1' to Enable interrupt for CH[3].LIMITL event */ -#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 12 : Write '1' to Enable interrupt for CH[3].LIMITH event */ -#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 11 : Write '1' to Enable interrupt for CH[2].LIMITL event */ -#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 10 : Write '1' to Enable interrupt for CH[2].LIMITH event */ -#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for CH[1].LIMITL event */ -#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for CH[1].LIMITH event */ -#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for CH[0].LIMITL event */ -#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for CH[0].LIMITH event */ -#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */ - -/* Bit 5 : Write '1' to Enable interrupt for STOPPED event */ -#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for CALIBRATEDONE event */ -#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */ - -/* Bit 3 : Write '1' to Enable interrupt for RESULTDONE event */ -#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for DONE event */ -#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for END event */ -#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ -#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Register: SAADC_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 21 : Write '1' to Disable interrupt for CH[7].LIMITL event */ -#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ -#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ -#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for CH[7].LIMITH event */ -#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ -#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ -#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for CH[6].LIMITL event */ -#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ -#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ -#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for CH[6].LIMITH event */ -#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ -#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ -#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for CH[5].LIMITL event */ -#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ -#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ -#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for CH[5].LIMITH event */ -#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ -#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ -#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 15 : Write '1' to Disable interrupt for CH[4].LIMITL event */ -#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ -#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ -#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for CH[4].LIMITH event */ -#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ -#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ -#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 13 : Write '1' to Disable interrupt for CH[3].LIMITL event */ -#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ -#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ -#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 12 : Write '1' to Disable interrupt for CH[3].LIMITH event */ -#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ -#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ -#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 11 : Write '1' to Disable interrupt for CH[2].LIMITL event */ -#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ -#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ -#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 10 : Write '1' to Disable interrupt for CH[2].LIMITH event */ -#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ -#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ -#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for CH[1].LIMITL event */ -#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ -#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ -#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for CH[1].LIMITH event */ -#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ -#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ -#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for CH[0].LIMITL event */ -#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ -#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ -#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for CH[0].LIMITH event */ -#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ -#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ -#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */ - -/* Bit 5 : Write '1' to Disable interrupt for STOPPED event */ -#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ -#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for CALIBRATEDONE event */ -#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ -#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ -#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */ - -/* Bit 3 : Write '1' to Disable interrupt for RESULTDONE event */ -#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ -#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ -#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for DONE event */ -#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */ -#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ -#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for END event */ -#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ -#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ -#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ -#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Register: SAADC_STATUS */ -/* Description: Status */ - -/* Bit 0 : Status */ -#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */ -#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */ - -/* Register: SAADC_ENABLE */ -/* Description: Enable or disable ADC */ - -/* Bit 0 : Enable or disable ADC */ -#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable ADC */ -#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable ADC */ - -/* Register: SAADC_CH_PSELP */ -/* Description: Description cluster[0]: Input positive pin selection for CH[0] */ - -/* Bits 4..0 : Analog positive input channel */ -#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */ -#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */ -#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */ -#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */ -#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */ -#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */ - -/* Register: SAADC_CH_PSELN */ -/* Description: Description cluster[0]: Input negative pin selection for CH[0] */ - -/* Bits 4..0 : Analog negative input, enables differential channel */ -#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */ -#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */ -#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */ -#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */ -#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */ -#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */ - -/* Register: SAADC_CH_CONFIG */ -/* Description: Description cluster[0]: Input configuration for CH[0] */ - -/* Bit 24 : Enable burst mode */ -#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */ -#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */ -#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */ -#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */ - -/* Bit 20 : Enable differential mode */ -#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */ -#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single ended, PSELN will be ignored, negative input to ADC shorted to GND */ -#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */ - -/* Bits 18..16 : Acquisition time, the time the ADC uses to sample the input voltage */ -#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */ -#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */ -#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */ -#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */ -#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */ -#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */ -#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */ -#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */ - -/* Bit 12 : Reference control */ -#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */ -#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */ -#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */ - -/* Bits 10..8 : Gain control */ -#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */ -#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */ -#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */ -#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */ -#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */ -#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */ -#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */ - -/* Bits 5..4 : Negative channel resistor control */ -#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ -#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */ -#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */ -#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */ -#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */ -#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */ - -/* Bits 1..0 : Positive channel resistor control */ -#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */ -#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */ -#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */ -#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */ -#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */ -#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */ - -/* Register: SAADC_CH_LIMIT */ -/* Description: Description cluster[0]: High/low limits for event monitoring a channel */ - -/* Bits 31..16 : High level limit */ -#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */ -#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */ - -/* Bits 15..0 : Low level limit */ -#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */ -#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */ - -/* Register: SAADC_RESOLUTION */ -/* Description: Resolution configuration */ - -/* Bits 2..0 : Set the resolution */ -#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */ -#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */ -#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bit */ -#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bit */ -#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bit */ -#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bit */ - -/* Register: SAADC_OVERSAMPLE */ -/* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */ - -/* Bits 3..0 : Oversample control */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */ -#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */ - -/* Register: SAADC_SAMPLERATE */ -/* Description: Controls normal or continuous sample rate */ - -/* Bit 12 : Select mode for sample rate control */ -#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */ -#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */ -#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */ - -/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */ -#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */ -#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */ - -/* Register: SAADC_RESULT_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SAADC_RESULT_MAXCNT */ -/* Description: Maximum number of buffer words to transfer */ - -/* Bits 14..0 : Maximum number of buffer words to transfer */ -#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SAADC_RESULT_AMOUNT */ -/* Description: Number of buffer words transferred since last START */ - -/* Bits 14..0 : Number of buffer words transferred since last START. This register can be read after an END or STOPPED event. */ -#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - - -/* Peripheral: SPI */ -/* Description: Serial Peripheral Interface 0 */ - -/* Register: SPI_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 2 : Write '1' to Enable interrupt for READY event */ -#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ -#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ -#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */ - -/* Register: SPI_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 2 : Write '1' to Disable interrupt for READY event */ -#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ -#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ -#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ - -/* Register: SPI_ENABLE */ -/* Description: Enable SPI */ - -/* Bits 3..0 : Enable or disable SPI */ -#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */ -#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */ - -/* Register: SPI_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bits 31..0 : Pin number configuration for SPI SCK signal */ -#define SPI_PSEL_SCK_PSELSCK_Pos (0UL) /*!< Position of PSELSCK field. */ -#define SPI_PSEL_SCK_PSELSCK_Msk (0xFFFFFFFFUL << SPI_PSEL_SCK_PSELSCK_Pos) /*!< Bit mask of PSELSCK field. */ -#define SPI_PSEL_SCK_PSELSCK_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: SPI_PSEL_MOSI */ -/* Description: Pin select for MOSI */ - -/* Bits 31..0 : Pin number configuration for SPI MOSI signal */ -#define SPI_PSEL_MOSI_PSELMOSI_Pos (0UL) /*!< Position of PSELMOSI field. */ -#define SPI_PSEL_MOSI_PSELMOSI_Msk (0xFFFFFFFFUL << SPI_PSEL_MOSI_PSELMOSI_Pos) /*!< Bit mask of PSELMOSI field. */ -#define SPI_PSEL_MOSI_PSELMOSI_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: SPI_PSEL_MISO */ -/* Description: Pin select for MISO */ - -/* Bits 31..0 : Pin number configuration for SPI MISO signal */ -#define SPI_PSEL_MISO_PSELMISO_Pos (0UL) /*!< Position of PSELMISO field. */ -#define SPI_PSEL_MISO_PSELMISO_Msk (0xFFFFFFFFUL << SPI_PSEL_MISO_PSELMISO_Pos) /*!< Bit mask of PSELMISO field. */ -#define SPI_PSEL_MISO_PSELMISO_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: SPI_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RX data received. Double buffered */ -#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: SPI_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TX data to send. Double buffered */ -#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: SPI_FREQUENCY */ -/* Description: SPI frequency */ - -/* Bits 31..0 : SPI master data rate */ -#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ -#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ -#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ -#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ - -/* Register: SPI_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - - -/* Peripheral: SPIM */ -/* Description: Serial Peripheral Interface Master with EasyDMA 0 */ - -/* Register: SPIM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 17 : Shortcut between END event and START task */ -#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ -#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ -#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: SPIM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 19 : Write '1' to Enable interrupt for STARTED event */ -#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ -#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 6 : Write '1' to Enable interrupt for END event */ -#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: SPIM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 19 : Write '1' to Disable interrupt for STARTED event */ -#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ -#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 6 : Write '1' to Disable interrupt for END event */ -#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: SPIM_ENABLE */ -/* Description: Enable SPIM */ - -/* Bits 3..0 : Enable or disable SPIM */ -#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */ -#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */ - -/* Register: SPIM_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_PSEL_MOSI */ -/* Description: Pin select for MOSI signal */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_PSEL_MISO */ -/* Description: Pin select for MISO signal */ - -/* Bit 31 : Connection */ -#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIM_FREQUENCY */ -/* Description: SPI frequency */ - -/* Bits 31..0 : SPI master data rate */ -#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ -#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ -#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ - -/* Register: SPIM_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction */ -#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIM_RXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define SPIM_RXD_LIST_LIST_Msk (0x7UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: SPIM_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction */ -#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIM_TXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define SPIM_TXD_LIST_LIST_Msk (0x7UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: SPIM_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - -/* Register: SPIM_ORC */ -/* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer. */ - -/* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. */ -#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: SPIS */ -/* Description: SPI Slave 0 */ - -/* Register: SPIS_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 2 : Shortcut between END event and ACQUIRE task */ -#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */ -#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: SPIS_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 10 : Write '1' to Enable interrupt for ACQUIRED event */ -#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for END event */ -#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */ - -/* Register: SPIS_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 10 : Write '1' to Disable interrupt for ACQUIRED event */ -#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for END event */ -#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ -#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ -#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */ - -/* Register: SPIS_SEMSTAT */ -/* Description: Semaphore status register */ - -/* Bits 1..0 : Semaphore status */ -#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */ -#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */ -#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */ -#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */ - -/* Register: SPIS_STATUS */ -/* Description: Status from last transaction */ - -/* Bit 1 : RX buffer overflow detected, and prevented */ -#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */ -#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */ -#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Bit 0 : TX buffer over-read detected, and prevented */ -#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */ -#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */ -#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Register: SPIS_ENABLE */ -/* Description: Enable SPI slave */ - -/* Bits 3..0 : Enable or disable SPI slave */ -#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */ -#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */ - -/* Register: SPIS_PSEL_SCK */ -/* Description: Pin select for SCK */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_MISO */ -/* Description: Pin select for MISO signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_MOSI */ -/* Description: Pin select for MOSI signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_PSEL_CSN */ -/* Description: Pin select for CSN signal */ - -/* Bit 31 : Connection */ -#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ -#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: SPIS_RXD_PTR */ -/* Description: RXD data pointer */ - -/* Bits 31..0 : RXD data pointer */ -#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIS_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIS_RXD_AMOUNT */ -/* Description: Number of bytes received in last granted transaction */ - -/* Bits 7..0 : Number of bytes received in the last granted transaction */ -#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIS_TXD_PTR */ -/* Description: TXD data pointer */ - -/* Bits 31..0 : TXD data pointer */ -#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIS_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIS_TXD_AMOUNT */ -/* Description: Number of bytes transmitted in last granted transaction */ - -/* Bits 7..0 : Number of bytes transmitted in last granted transaction */ -#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIS_CONFIG */ -/* Description: Configuration register */ - -/* Bit 2 : Serial clock (SCK) polarity */ -#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ -#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ - -/* Bit 1 : Serial clock (SCK) phase */ -#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ -#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ - -/* Bit 0 : Bit order */ -#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ -#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ - -/* Register: SPIS_DEF */ -/* Description: Default character. Character clocked out in case of an ignored transaction. */ - -/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */ -#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ -#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ - -/* Register: SPIS_ORC */ -/* Description: Over-read character */ - -/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */ -#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: TEMP */ -/* Description: Temperature Sensor */ - -/* Register: TEMP_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for DATARDY event */ -#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */ -#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */ -#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */ - -/* Register: TEMP_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for DATARDY event */ -#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */ -#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */ -#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */ - -/* Register: TEMP_TEMP */ -/* Description: Temperature in degC (0.25deg steps) */ - -/* Bits 31..0 : Temperature in degC (0.25deg steps) */ -#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */ -#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */ - -/* Register: TEMP_A0 */ -/* Description: Slope of 1st piece wise linear function */ - -/* Bits 11..0 : Slope of 1st piece wise linear function */ -#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */ -#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */ - -/* Register: TEMP_A1 */ -/* Description: Slope of 2nd piece wise linear function */ - -/* Bits 11..0 : Slope of 2nd piece wise linear function */ -#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */ -#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */ - -/* Register: TEMP_A2 */ -/* Description: Slope of 3rd piece wise linear function */ - -/* Bits 11..0 : Slope of 3rd piece wise linear function */ -#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */ -#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */ - -/* Register: TEMP_A3 */ -/* Description: Slope of 4th piece wise linear function */ - -/* Bits 11..0 : Slope of 4th piece wise linear function */ -#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */ -#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */ - -/* Register: TEMP_A4 */ -/* Description: Slope of 5th piece wise linear function */ - -/* Bits 11..0 : Slope of 5th piece wise linear function */ -#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */ -#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */ - -/* Register: TEMP_A5 */ -/* Description: Slope of 6th piece wise linear function */ - -/* Bits 11..0 : Slope of 6th piece wise linear function */ -#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */ -#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */ - -/* Register: TEMP_B0 */ -/* Description: y-intercept of 1st piece wise linear function */ - -/* Bits 13..0 : y-intercept of 1st piece wise linear function */ -#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */ -#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ - -/* Register: TEMP_B1 */ -/* Description: y-intercept of 2nd piece wise linear function */ - -/* Bits 13..0 : y-intercept of 2nd piece wise linear function */ -#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */ -#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */ - -/* Register: TEMP_B2 */ -/* Description: y-intercept of 3rd piece wise linear function */ - -/* Bits 13..0 : y-intercept of 3rd piece wise linear function */ -#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */ -#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */ - -/* Register: TEMP_B3 */ -/* Description: y-intercept of 4th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 4th piece wise linear function */ -#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */ -#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */ - -/* Register: TEMP_B4 */ -/* Description: y-intercept of 5th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 5th piece wise linear function */ -#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */ -#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */ - -/* Register: TEMP_B5 */ -/* Description: y-intercept of 6th piece wise linear function */ - -/* Bits 13..0 : y-intercept of 6th piece wise linear function */ -#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ -#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */ - -/* Register: TEMP_T0 */ -/* Description: End point of 1st piece wise linear function */ - -/* Bits 7..0 : End point of 1st piece wise linear function */ -#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */ -#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */ - -/* Register: TEMP_T1 */ -/* Description: End point of 2nd piece wise linear function */ - -/* Bits 7..0 : End point of 2nd piece wise linear function */ -#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */ -#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */ - -/* Register: TEMP_T2 */ -/* Description: End point of 3rd piece wise linear function */ - -/* Bits 7..0 : End point of 3rd piece wise linear function */ -#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */ -#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */ - -/* Register: TEMP_T3 */ -/* Description: End point of 4th piece wise linear function */ - -/* Bits 7..0 : End point of 4th piece wise linear function */ -#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */ -#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */ - -/* Register: TEMP_T4 */ -/* Description: End point of 5th piece wise linear function */ - -/* Bits 7..0 : End point of 5th piece wise linear function */ -#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */ -#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */ - - -/* Peripheral: TIMER */ -/* Description: Timer/Counter 0 */ - -/* Register: TIMER_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 13 : Shortcut between COMPARE[5] event and STOP task */ -#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */ -#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */ -#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 12 : Shortcut between COMPARE[4] event and STOP task */ -#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */ -#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */ -#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 11 : Shortcut between COMPARE[3] event and STOP task */ -#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 10 : Shortcut between COMPARE[2] event and STOP task */ -#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 9 : Shortcut between COMPARE[1] event and STOP task */ -#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 8 : Shortcut between COMPARE[0] event and STOP task */ -#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between COMPARE[5] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 4 : Shortcut between COMPARE[4] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between COMPARE[3] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 2 : Shortcut between COMPARE[2] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 1 : Shortcut between COMPARE[1] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between COMPARE[0] event and CLEAR task */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TIMER_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 21 : Write '1' to Enable interrupt for COMPARE[5] event */ -#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ -#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ -#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for COMPARE[4] event */ -#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ -#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ -#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ -#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ -#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ -#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ - -/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ -#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ - -/* Register: TIMER_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 21 : Write '1' to Disable interrupt for COMPARE[5] event */ -#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ -#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ -#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for COMPARE[4] event */ -#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ -#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ -#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ -#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ -#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ -#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ - -/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ -#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ -#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ -#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ - -/* Register: TIMER_MODE */ -/* Description: Timer mode selection */ - -/* Bits 1..0 : Timer mode */ -#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */ -#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */ -#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */ - -/* Register: TIMER_BITMODE */ -/* Description: Configure the number of bits used by the TIMER */ - -/* Bits 1..0 : Timer bit width */ -#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */ -#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */ - -/* Register: TIMER_PRESCALER */ -/* Description: Timer prescaler register */ - -/* Bits 3..0 : Prescaler value */ -#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: TIMER_CC */ -/* Description: Description collection[0]: Capture/Compare register 0 */ - -/* Bits 31..0 : Capture/Compare value */ -#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */ -#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */ - - -/* Peripheral: TWI */ -/* Description: I2C compatible Two-Wire Interface 0 */ - -/* Register: TWI_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 1 : Shortcut between BB event and STOP task */ -#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 0 : Shortcut between BB event and SUSPEND task */ -#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWI_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ -#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ - -/* Bit 14 : Write '1' to Enable interrupt for BB event */ -#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDSENT event */ -#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDREADY event */ -#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWI_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ -#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ - -/* Bit 14 : Write '1' to Disable interrupt for BB event */ -#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDSENT event */ -#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDREADY event */ -#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWI_ERRORSRC */ -/* Description: Error source */ - -/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ -#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */ -#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */ -#define TWI_ERRORSRC_DNACK_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Bit 1 : NACK received after sending the address (write '1' to clear) */ -#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ -#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ -#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */ -#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */ -#define TWI_ERRORSRC_ANACK_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Bit 0 : Overrun error */ -#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ -#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ -#define TWI_ERRORSRC_OVERRUN_Clear (1UL) /*!< Write: clear error on writing '1' */ - -/* Register: TWI_ENABLE */ -/* Description: Enable TWI */ - -/* Bits 3..0 : Enable or disable TWI */ -#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */ -#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */ - -/* Register: TWI_PSELSCL */ -/* Description: Pin select for SCL */ - -/* Bits 31..0 : Pin number configuration for TWI SCL signal */ -#define TWI_PSELSCL_PSELSCL_Pos (0UL) /*!< Position of PSELSCL field. */ -#define TWI_PSELSCL_PSELSCL_Msk (0xFFFFFFFFUL << TWI_PSELSCL_PSELSCL_Pos) /*!< Bit mask of PSELSCL field. */ -#define TWI_PSELSCL_PSELSCL_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: TWI_PSELSDA */ -/* Description: Pin select for SDA */ - -/* Bits 31..0 : Pin number configuration for TWI SDA signal */ -#define TWI_PSELSDA_PSELSDA_Pos (0UL) /*!< Position of PSELSDA field. */ -#define TWI_PSELSDA_PSELSDA_Msk (0xFFFFFFFFUL << TWI_PSELSDA_PSELSDA_Pos) /*!< Bit mask of PSELSDA field. */ -#define TWI_PSELSDA_PSELSDA_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: TWI_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RXD register */ -#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: TWI_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TXD register */ -#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: TWI_FREQUENCY */ -/* Description: TWI frequency */ - -/* Bits 31..0 : TWI master clock frequency */ -#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ -#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */ - -/* Register: TWI_ADDRESS */ -/* Description: Address used in the TWI transfer */ - -/* Bits 6..0 : Address used in the TWI transfer */ -#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - - -/* Peripheral: TWIM */ -/* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */ - -/* Register: TWIM_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 12 : Shortcut between LASTRX event and STOP task */ -#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */ -#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */ -#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 10 : Shortcut between LASTRX event and STARTTX task */ -#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */ -#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */ -#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 9 : Shortcut between LASTTX event and STOP task */ -#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */ -#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */ -#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 8 : Shortcut between LASTTX event and SUSPEND task */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 7 : Shortcut between LASTTX event and STARTRX task */ -#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */ -#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */ -#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWIM_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 24 : Enable or disable interrupt for LASTTX event */ -#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */ - -/* Bit 23 : Enable or disable interrupt for LASTRX event */ -#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 18 : Enable or disable interrupt for SUSPENDED event */ -#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: TWIM_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 24 : Write '1' to Enable interrupt for LASTTX event */ -#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */ - -/* Bit 23 : Write '1' to Enable interrupt for LASTRX event */ -#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ -#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWIM_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 24 : Write '1' to Disable interrupt for LASTTX event */ -#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ -#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ -#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */ - -/* Bit 23 : Write '1' to Disable interrupt for LASTRX event */ -#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ -#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ -#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ -#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWIM_ERRORSRC */ -/* Description: Error source */ - -/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ -#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ - -/* Bit 1 : NACK received after sending the address (write '1' to clear) */ -#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ -#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ -#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */ - -/* Bit 0 : Overrun error */ -#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */ -#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */ - -/* Register: TWIM_ENABLE */ -/* Description: Enable TWIM */ - -/* Bits 3..0 : Enable or disable TWIM */ -#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */ -#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */ - -/* Register: TWIM_PSEL_SCL */ -/* Description: Pin select for SCL signal */ - -/* Bit 31 : Connection */ -#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIM_PSEL_SDA */ -/* Description: Pin select for SDA signal */ - -/* Bit 31 : Connection */ -#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIM_FREQUENCY */ -/* Description: TWI frequency */ - -/* Bits 31..0 : TWI master clock frequency */ -#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ -#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ -#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */ - -/* Register: TWIM_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIM_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIM_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ -#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIM_RXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: TWIM_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIM_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIM_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ -#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIM_TXD_LIST */ -/* Description: EasyDMA list type */ - -/* Bits 2..0 : List type */ -#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ -#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ -#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ -#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ - -/* Register: TWIM_ADDRESS */ -/* Description: Address used in the TWI transfer */ - -/* Bits 6..0 : Address used in the TWI transfer */ -#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - - -/* Peripheral: TWIS */ -/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */ - -/* Register: TWIS_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 14 : Shortcut between READ event and SUSPEND task */ -#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */ -#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */ -#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 13 : Shortcut between WRITE event and SUSPEND task */ -#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */ -#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */ -#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ -#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: TWIS_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 26 : Enable or disable interrupt for READ event */ -#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */ - -/* Bit 25 : Enable or disable interrupt for WRITE event */ -#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for STOPPED event */ -#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ -#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ - -/* Register: TWIS_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 26 : Write '1' to Enable interrupt for READ event */ -#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */ - -/* Bit 25 : Write '1' to Enable interrupt for WRITE event */ -#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ -#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */ - -/* Register: TWIS_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 26 : Write '1' to Disable interrupt for READ event */ -#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */ -#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */ -#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */ - -/* Bit 25 : Write '1' to Disable interrupt for WRITE event */ -#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */ -#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */ -#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ -#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ - -/* Register: TWIS_ERRORSRC */ -/* Description: Error source */ - -/* Bit 3 : TX buffer over-read detected, and prevented */ -#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */ -#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ -#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */ - -/* Bit 2 : NACK sent after receiving a data byte */ -#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ - -/* Bit 0 : RX buffer overflow detected, and prevented */ -#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */ -#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ -#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */ -#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */ - -/* Register: TWIS_MATCH */ -/* Description: Status register indicating which address had a match */ - -/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */ -#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */ -#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */ - -/* Register: TWIS_ENABLE */ -/* Description: Enable TWIS */ - -/* Bits 3..0 : Enable or disable TWIS */ -#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */ -#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */ - -/* Register: TWIS_PSEL_SCL */ -/* Description: Pin select for SCL signal */ - -/* Bit 31 : Connection */ -#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIS_PSEL_SDA */ -/* Description: Pin select for SDA signal */ - -/* Bit 31 : Connection */ -#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ -#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: TWIS_RXD_PTR */ -/* Description: RXD Data pointer */ - -/* Bits 31..0 : RXD Data pointer */ -#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIS_RXD_MAXCNT */ -/* Description: Maximum number of bytes in RXD buffer */ - -/* Bits 7..0 : Maximum number of bytes in RXD buffer */ -#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIS_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last RXD transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last RXD transaction */ -#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIS_TXD_PTR */ -/* Description: TXD Data pointer */ - -/* Bits 31..0 : TXD Data pointer */ -#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: TWIS_TXD_MAXCNT */ -/* Description: Maximum number of bytes in TXD buffer */ - -/* Bits 7..0 : Maximum number of bytes in TXD buffer */ -#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: TWIS_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last TXD transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last TXD transaction */ -#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: TWIS_ADDRESS */ -/* Description: Description collection[0]: TWI slave address 0 */ - -/* Bits 6..0 : TWI slave address */ -#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - -/* Register: TWIS_CONFIG */ -/* Description: Configuration register for the address match mechanism */ - -/* Bit 1 : Enable or disable address matching on ADDRESS[1] */ -#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */ -#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */ -#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */ -#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */ - -/* Bit 0 : Enable or disable address matching on ADDRESS[0] */ -#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */ -#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */ -#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */ -#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */ - -/* Register: TWIS_ORC */ -/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */ - -/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */ -#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - - -/* Peripheral: UART */ -/* Description: Universal Asynchronous Receiver/Transmitter */ - -/* Register: UART_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 4 : Shortcut between NCTS event and STOPRX task */ -#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */ -#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 3 : Shortcut between CTS event and STARTRX task */ -#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: UART_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ -#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ -#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ -#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ -#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for CTS event */ -#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */ - -/* Register: UART_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ -#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ -#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ -#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ -#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for CTS event */ -#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */ - -/* Register: UART_ERRORSRC */ -/* Description: Error source */ - -/* Bit 3 : Break condition */ -#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ -#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ -#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ - -/* Bit 2 : Framing error occurred */ -#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ - -/* Bit 1 : Parity error */ -#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ - -/* Bit 0 : Overrun error */ -#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ -#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ - -/* Register: UART_ENABLE */ -/* Description: Enable UART */ - -/* Bits 3..0 : Enable or disable UART */ -#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */ -#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */ - -/* Register: UART_PSELRTS */ -/* Description: Pin select for RTS */ - -/* Bits 31..0 : Pin number configuration for UART RTS signal */ -#define UART_PSELRTS_PSELRTS_Pos (0UL) /*!< Position of PSELRTS field. */ -#define UART_PSELRTS_PSELRTS_Msk (0xFFFFFFFFUL << UART_PSELRTS_PSELRTS_Pos) /*!< Bit mask of PSELRTS field. */ -#define UART_PSELRTS_PSELRTS_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: UART_PSELTXD */ -/* Description: Pin select for TXD */ - -/* Bits 31..0 : Pin number configuration for UART TXD signal */ -#define UART_PSELTXD_PSELTXD_Pos (0UL) /*!< Position of PSELTXD field. */ -#define UART_PSELTXD_PSELTXD_Msk (0xFFFFFFFFUL << UART_PSELTXD_PSELTXD_Pos) /*!< Bit mask of PSELTXD field. */ -#define UART_PSELTXD_PSELTXD_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: UART_PSELCTS */ -/* Description: Pin select for CTS */ - -/* Bits 31..0 : Pin number configuration for UART CTS signal */ -#define UART_PSELCTS_PSELCTS_Pos (0UL) /*!< Position of PSELCTS field. */ -#define UART_PSELCTS_PSELCTS_Msk (0xFFFFFFFFUL << UART_PSELCTS_PSELCTS_Pos) /*!< Bit mask of PSELCTS field. */ -#define UART_PSELCTS_PSELCTS_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: UART_PSELRXD */ -/* Description: Pin select for RXD */ - -/* Bits 31..0 : Pin number configuration for UART RXD signal */ -#define UART_PSELRXD_PSELRXD_Pos (0UL) /*!< Position of PSELRXD field. */ -#define UART_PSELRXD_PSELRXD_Msk (0xFFFFFFFFUL << UART_PSELRXD_PSELRXD_Pos) /*!< Bit mask of PSELRXD field. */ -#define UART_PSELRXD_PSELRXD_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ - -/* Register: UART_RXD */ -/* Description: RXD register */ - -/* Bits 7..0 : RX data received in previous transfers, double buffered */ -#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: UART_TXD */ -/* Description: TXD register */ - -/* Bits 7..0 : TX data to be transferred */ -#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: UART_BAUDRATE */ -/* Description: Baud rate */ - -/* Bits 31..0 : Baud rate */ -#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ -#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ -#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ -#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ -#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */ -#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ -#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */ -#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ -#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */ -#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ -#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */ -#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ -#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */ -#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */ -#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ -#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */ -#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */ -#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ - -/* Register: UART_CONFIG */ -/* Description: Configuration of parity and hardware flow control */ - -/* Bits 3..1 : Parity */ -#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ -#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ - -/* Bit 0 : Hardware flow control */ -#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ -#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ -#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ -#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ - - -/* Peripheral: UARTE */ -/* Description: UART with EasyDMA */ - -/* Register: UARTE_SHORTS */ -/* Description: Shortcut register */ - -/* Bit 6 : Shortcut between ENDRX event and STOPRX task */ -#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */ -#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */ -#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */ -#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Bit 5 : Shortcut between ENDRX event and STARTRX task */ -#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */ -#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */ -#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ -#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ - -/* Register: UARTE_INTEN */ -/* Description: Enable or disable interrupt */ - -/* Bit 22 : Enable or disable interrupt for TXSTOPPED event */ -#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */ - -/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ -#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ -#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ - -/* Bit 17 : Enable or disable interrupt for RXTO event */ -#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */ - -/* Bit 9 : Enable or disable interrupt for ERROR event */ -#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */ - -/* Bit 8 : Enable or disable interrupt for ENDTX event */ -#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ - -/* Bit 7 : Enable or disable interrupt for TXDRDY event */ -#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */ - -/* Bit 4 : Enable or disable interrupt for ENDRX event */ -#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ - -/* Bit 2 : Enable or disable interrupt for RXDRDY event */ -#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */ - -/* Bit 1 : Enable or disable interrupt for NCTS event */ -#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */ - -/* Bit 0 : Enable or disable interrupt for CTS event */ -#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */ -#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */ - -/* Register: UARTE_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 22 : Write '1' to Enable interrupt for TXSTOPPED event */ -#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */ - -/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ -#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ -#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ - -/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ -#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */ - -/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ -#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */ - -/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ -#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */ - -/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ -#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ -#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */ - -/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ -#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ - -/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ -#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */ - -/* Bit 0 : Write '1' to Enable interrupt for CTS event */ -#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */ - -/* Register: UARTE_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 22 : Write '1' to Disable interrupt for TXSTOPPED event */ -#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ -#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ -#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */ - -/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ -#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ -#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ -#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ -#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ -#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ -#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ - -/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ -#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ - -/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ -#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ - -/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ -#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ - -/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ -#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ -#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ - -/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ -#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ - -/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ -#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ - -/* Bit 0 : Write '1' to Disable interrupt for CTS event */ -#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ -#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ -#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */ - -/* Register: UARTE_ERRORSRC */ -/* Description: Error source */ - -/* Bit 3 : Break condition */ -#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ -#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ -#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ - -/* Bit 2 : Framing error occurred */ -#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ -#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ -#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ - -/* Bit 1 : Parity error */ -#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ - -/* Bit 0 : Overrun error */ -#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ -#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ - -/* Register: UARTE_ENABLE */ -/* Description: Enable UART */ - -/* Bits 3..0 : Enable or disable UARTE */ -#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */ -#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */ - -/* Register: UARTE_PSEL_RTS */ -/* Description: Pin select for RTS signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_TXD */ -/* Description: Pin select for TXD signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_CTS */ -/* Description: Pin select for CTS signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_PSEL_RXD */ -/* Description: Pin select for RXD signal */ - -/* Bit 31 : Connection */ -#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ -#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : Pin number */ -#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UARTE_BAUDRATE */ -/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ - -/* Bits 31..0 : Baud rate */ -#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ -#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ -#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ -#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ -#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */ -#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ - -/* Register: UARTE_RXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: UARTE_RXD_MAXCNT */ -/* Description: Maximum number of bytes in receive buffer */ - -/* Bits 7..0 : Maximum number of bytes in receive buffer */ -#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: UARTE_RXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction */ -#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: UARTE_TXD_PTR */ -/* Description: Data pointer */ - -/* Bits 31..0 : Data pointer */ -#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: UARTE_TXD_MAXCNT */ -/* Description: Maximum number of bytes in transmit buffer */ - -/* Bits 7..0 : Maximum number of bytes in transmit buffer */ -#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: UARTE_TXD_AMOUNT */ -/* Description: Number of bytes transferred in the last transaction */ - -/* Bits 7..0 : Number of bytes transferred in the last transaction */ -#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: UARTE_CONFIG */ -/* Description: Configuration of parity and hardware flow control */ - -/* Bits 3..1 : Parity */ -#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ -#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ - -/* Bit 0 : Hardware flow control */ -#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ -#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ -#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ -#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ - - -/* Peripheral: UICR */ -/* Description: User Information Configuration Registers */ - -/* Register: UICR_NRFFW */ -/* Description: Description collection[0]: Reserved for Nordic firmware design */ - -/* Bits 31..0 : Reserved for Nordic firmware design */ -#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */ -#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */ - -/* Register: UICR_NRFHW */ -/* Description: Description collection[0]: Reserved for Nordic hardware design */ - -/* Bits 31..0 : Reserved for Nordic hardware design */ -#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */ -#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */ - -/* Register: UICR_CUSTOMER */ -/* Description: Description collection[0]: Reserved for customer */ - -/* Bits 31..0 : Reserved for customer */ -#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */ -#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */ - -/* Register: UICR_PSELRESET */ -/* Description: Description collection[0]: Mapping of the nRESET function (see POWER chapter for details) */ - -/* Bit 31 : Connection */ -#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ -#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ -#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */ -#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */ - -/* Bits 4..0 : GPIO number P0.n onto which Reset is exposed */ -#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */ -#define UICR_PSELRESET_PIN_Msk (0x1FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */ - -/* Register: UICR_APPROTECT */ -/* Description: Access Port protection */ - -/* Bits 7..0 : Enable or disable Access Port protection. Any other value than 0xFF being written to this field will enable protection. */ -#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */ -#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */ -#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */ -#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */ - -/* Register: UICR_NFCPINS */ -/* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */ - -/* Bit 0 : Setting of pins dedicated to NFC functionality */ -#define UICR_NFCPINS_PROTECT_Pos (0UL) /*!< Position of PROTECT field. */ -#define UICR_NFCPINS_PROTECT_Msk (0x1UL << UICR_NFCPINS_PROTECT_Pos) /*!< Bit mask of PROTECT field. */ -#define UICR_NFCPINS_PROTECT_Disabled (0UL) /*!< Operation as GPIO pins. Same protection as normal GPIO pins */ -#define UICR_NFCPINS_PROTECT_NFC (1UL) /*!< Operation as NFC antenna pins. Configures the protection for NFC operation */ - - -/* Peripheral: WDT */ -/* Description: Watchdog Timer */ - -/* Register: WDT_INTENSET */ -/* Description: Enable interrupt */ - -/* Bit 0 : Write '1' to Enable interrupt for TIMEOUT event */ -#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ -#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ -#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */ - -/* Register: WDT_INTENCLR */ -/* Description: Disable interrupt */ - -/* Bit 0 : Write '1' to Disable interrupt for TIMEOUT event */ -#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ -#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ -#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */ - -/* Register: WDT_RUNSTATUS */ -/* Description: Run status */ - -/* Bit 0 : Indicates whether or not the watchdog is running */ -#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */ -#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */ - -/* Register: WDT_REQSTATUS */ -/* Description: Request status */ - -/* Bit 7 : Request status for RR[7] register */ -#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */ - -/* Bit 6 : Request status for RR[6] register */ -#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */ - -/* Bit 5 : Request status for RR[5] register */ -#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */ - -/* Bit 4 : Request status for RR[4] register */ -#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */ - -/* Bit 3 : Request status for RR[3] register */ -#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */ - -/* Bit 2 : Request status for RR[2] register */ -#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */ - -/* Bit 1 : Request status for RR[1] register */ -#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */ - -/* Bit 0 : Request status for RR[0] register */ -#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */ -#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */ - -/* Register: WDT_CRV */ -/* Description: Counter reload value */ - -/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */ -#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */ -#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */ - -/* Register: WDT_RREN */ -/* Description: Enable register for reload request registers */ - -/* Bit 7 : Enable or disable RR[7] register */ -#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */ -#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */ - -/* Bit 6 : Enable or disable RR[6] register */ -#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */ -#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */ - -/* Bit 5 : Enable or disable RR[5] register */ -#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */ -#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */ - -/* Bit 4 : Enable or disable RR[4] register */ -#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */ -#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */ - -/* Bit 3 : Enable or disable RR[3] register */ -#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */ -#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */ - -/* Bit 2 : Enable or disable RR[2] register */ -#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */ -#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */ - -/* Bit 1 : Enable or disable RR[1] register */ -#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */ -#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */ - -/* Bit 0 : Enable or disable RR[0] register */ -#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */ -#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */ - -/* Register: WDT_CONFIG */ -/* Description: Configuration register */ - -/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */ -#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ -#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ -#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */ -#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */ - -/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */ -#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */ -#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */ - -/* Register: WDT_RR */ -/* Description: Description collection[0]: Reload request 0 */ - -/* Bits 31..0 : Reload request register */ -#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ -#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ -#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */ - - -/*lint --flb "Leave library region" */ -#endif diff --git a/ports/nrf/device/nrf52/nrf52_name_change.h b/ports/nrf/device/nrf52/nrf52_name_change.h deleted file mode 100644 index 61f90adb0ccfe..0000000000000 --- a/ports/nrf/device/nrf52/nrf52_name_change.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF52_NAME_CHANGE_H -#define NRF52_NAME_CHANGE_H - -/*lint ++flb "Enter library region */ - -/* This file is given to prevent your SW from not compiling with the updates made to nrf52.h and - * nrf52_bitfields.h. The macros defined in this file were available previously. Do not use these - * macros on purpose. Use the ones defined in nrf52.h and nrf52_bitfields.h instead. - */ - -/* I2S */ -/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */ -#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled -#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled -#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master -#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave -#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled -#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled -#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled -#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled -#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled -#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled -#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit -#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit -#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit -#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left -#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right -#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned -#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo -#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left -#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right - -/* LPCOMP */ -/* Corrected typo in RESULT register. */ -#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below - -/*lint --flb "Leave library region" */ - -#endif /* NRF52_NAME_CHANGE_H */ - diff --git a/ports/nrf/device/nrf52/nrf52_to_nrf52840.h b/ports/nrf/device/nrf52/nrf52_to_nrf52840.h deleted file mode 100644 index 3067dcc005082..0000000000000 --- a/ports/nrf/device/nrf52/nrf52_to_nrf52840.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2016, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF52_TO_NRF52840_H -#define NRF52_TO_NRF52840_H - -/*lint ++flb "Enter library region */ - -/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices. - * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the - * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros - * from the nrf52_namechange.h file. */ - -/* Differences between latest nRF52 headers and nRF52840 headers. */ - -/* UART */ -/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */ -#define PSELRTS PSEL.RTS -#define PSELTXD PSEL.TXD -#define PSELCTS PSEL.CTS -#define PSELRXD PSEL.RXD - -/* TWI */ -/* The registers PSELSCL, PSELSDA were restructured into a struct. */ -#define PSELSCL PSEL.SCL -#define PSELSDA PSEL.SDA - - -/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */ - -/* I2S */ -/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */ -#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled -#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled -#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master -#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave -#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled -#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled -#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled -#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled -#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled -#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled -#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit -#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit -#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit -#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left -#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right -#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned -#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo -#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left -#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right - -/* LPCOMP */ -/* Corrected typo in RESULT register. */ -#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below - - -/*lint --flb "Leave library region" */ - -#endif /* NRF51_TO_NRF52840_H */ - diff --git a/ports/nrf/device/nrf52/startup_nrf52832.c b/ports/nrf/device/nrf52/startup_nrf52.c similarity index 100% rename from ports/nrf/device/nrf52/startup_nrf52832.c rename to ports/nrf/device/nrf52/startup_nrf52.c diff --git a/ports/nrf/device/nrf52/startup_nrf52840.c b/ports/nrf/device/nrf52/startup_nrf52840.c index 30634a1b540c3..8e1c360128840 100644 --- a/ports/nrf/device/nrf52/startup_nrf52840.c +++ b/ports/nrf/device/nrf52/startup_nrf52840.c @@ -116,7 +116,7 @@ void CRYPTOCELL_IRQHandler (void) __attribute__ ((weak, alias("Default_Han void SPIM3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); void PWM3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler"))); -const func __Vectors[] __attribute__ ((section(".isr_vector"))) = { +const func __Vectors[] __attribute__ ((used, section(".isr_vector"))) = { (func)&_estack, Reset_Handler, NMI_Handler, diff --git a/ports/nrf/device/nrf52/system_nrf52.h b/ports/nrf/device/nrf52/system_nrf52.h deleted file mode 100644 index 9201e7926ba0f..0000000000000 --- a/ports/nrf/device/nrf52/system_nrf52.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright (c) 2012 ARM LIMITED - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of ARM nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef SYSTEM_NRF52_H -#define SYSTEM_NRF52_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemCoreClock variable. - */ -extern void SystemInit (void); - -/** - * Update SystemCoreClock variable - * - * @param none - * @return none - * - * @brief Updates the SystemCoreClock with current core Clock - * retrieved from cpu registers. - */ -extern void SystemCoreClockUpdate (void); - -#ifdef __cplusplus -} -#endif - -#endif /* SYSTEM_NRF52_H */ diff --git a/ports/nrf/device/nrf52/system_nrf52832.c b/ports/nrf/device/nrf52/system_nrf52832.c deleted file mode 100644 index b96b41717cb94..0000000000000 --- a/ports/nrf/device/nrf52/system_nrf52832.c +++ /dev/null @@ -1,308 +0,0 @@ -/* Copyright (c) 2012 ARM LIMITED - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of ARM nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include "nrf.h" -#include "system_nrf52.h" - -/*lint ++flb "Enter library region" */ - -#define __SYSTEM_CLOCK_64M (64000000UL) - -static bool errata_16(void); -static bool errata_31(void); -static bool errata_32(void); -static bool errata_36(void); -static bool errata_37(void); -static bool errata_57(void); -static bool errata_66(void); -static bool errata_108(void); - - -#if defined ( __CC_ARM ) - uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; -#elif defined ( __ICCARM__ ) - __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M; -#elif defined ( __GNUC__ ) - uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; -#endif - -void SystemCoreClockUpdate(void) -{ - SystemCoreClock = __SYSTEM_CLOCK_64M; -} - -void SystemInit(void) -{ - /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_16()){ - *(volatile uint32_t *)0x4007C074 = 3131961357ul; - } - - /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_31()){ - *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13; - } - - /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_32()){ - CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk; - } - - /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_36()){ - NRF_CLOCK->EVENTS_DONE = 0; - NRF_CLOCK->EVENTS_CTTO = 0; - NRF_CLOCK->CTIV = 0; - } - - /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_37()){ - *(volatile uint32_t *)0x400005A0 = 0x3; - } - - /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_57()){ - *(volatile uint32_t *)0x40005610 = 0x00000005; - *(volatile uint32_t *)0x40005688 = 0x00000001; - *(volatile uint32_t *)0x40005618 = 0x00000000; - *(volatile uint32_t *)0x40005614 = 0x0000003F; - } - - /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_66()){ - NRF_TEMP->A0 = NRF_FICR->TEMP.A0; - NRF_TEMP->A1 = NRF_FICR->TEMP.A1; - NRF_TEMP->A2 = NRF_FICR->TEMP.A2; - NRF_TEMP->A3 = NRF_FICR->TEMP.A3; - NRF_TEMP->A4 = NRF_FICR->TEMP.A4; - NRF_TEMP->A5 = NRF_FICR->TEMP.A5; - NRF_TEMP->B0 = NRF_FICR->TEMP.B0; - NRF_TEMP->B1 = NRF_FICR->TEMP.B1; - NRF_TEMP->B2 = NRF_FICR->TEMP.B2; - NRF_TEMP->B3 = NRF_FICR->TEMP.B3; - NRF_TEMP->B4 = NRF_FICR->TEMP.B4; - NRF_TEMP->B5 = NRF_FICR->TEMP.B5; - NRF_TEMP->T0 = NRF_FICR->TEMP.T0; - NRF_TEMP->T1 = NRF_FICR->TEMP.T1; - NRF_TEMP->T2 = NRF_FICR->TEMP.T2; - NRF_TEMP->T3 = NRF_FICR->TEMP.T3; - NRF_TEMP->T4 = NRF_FICR->TEMP.T4; - } - - /* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_108()){ - *(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F; - } - - /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the - * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit - * operations are not used in your code. */ - #if (__FPU_USED == 1) - SCB->CPACR |= (3UL << 20) | (3UL << 22); - __DSB(); - __ISB(); - #endif - - /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined, - two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as - normal GPIOs. */ - #if defined (CONFIG_NFCT_PINS_AS_GPIOS) - if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){ - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NVIC_SystemReset(); - } - #endif - - /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not - defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be - reserved for PinReset and not available as normal GPIO. */ - #if defined (CONFIG_GPIO_AS_PINRESET) - if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) || - ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){ - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->PSELRESET[0] = 21; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->PSELRESET[1] = 21; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NVIC_SystemReset(); - } - #endif - - /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product - Specification to see which one). */ - #if defined (ENABLE_SWO) - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos; - NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - #endif - - /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product - Specification to see which ones). */ - #if defined (ENABLE_TRACE) - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos; - NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - #endif - - SystemCoreClockUpdate(); -} - - -static bool errata_16(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - } - - return false; -} - -static bool errata_31(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){ - return true; - } - } - - return false; -} - -static bool errata_32(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - } - - return false; -} - -static bool errata_36(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){ - return true; - } - } - - return false; -} - -static bool errata_37(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - } - - return false; -} - -static bool errata_57(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - } - - return false; -} - -static bool errata_66(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){ - return true; - } - } - - return false; -} - - -static bool errata_108(void) -{ - if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){ - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){ - return true; - } - if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){ - return true; - } - } - - return false; -} - - -/*lint --flb "Leave library region" */ diff --git a/ports/nrf/device/nrf52/system_nrf52840.c b/ports/nrf/device/nrf52/system_nrf52840.c deleted file mode 100644 index 4a94218cc35de..0000000000000 --- a/ports/nrf/device/nrf52/system_nrf52840.c +++ /dev/null @@ -1,209 +0,0 @@ -/* Copyright (c) 2012 ARM LIMITED - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of ARM nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include "nrf.h" -#include "system_nrf52840.h" - -/*lint ++flb "Enter library region" */ - -#define __SYSTEM_CLOCK_64M (64000000UL) - -static bool errata_36(void); -static bool errata_98(void); -static bool errata_103(void); -static bool errata_115(void); -static bool errata_120(void); - - -#if defined ( __CC_ARM ) - uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; -#elif defined ( __ICCARM__ ) - __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M; -#elif defined ( __GNUC__ ) - uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M; -#endif - -void SystemCoreClockUpdate(void) -{ - SystemCoreClock = __SYSTEM_CLOCK_64M; -} - -void SystemInit(void) -{ - /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_36()){ - NRF_CLOCK->EVENTS_DONE = 0; - NRF_CLOCK->EVENTS_CTTO = 0; - NRF_CLOCK->CTIV = 0; - } - - /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_98()){ - *(volatile uint32_t *)0x4000568Cul = 0x00038148ul; - } - - /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_103()){ - NRF_CCM->MAXPACKETSIZE = 0xFBul; - } - - /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_115()){ - *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F); - } - - /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document - for your device located at https://infocenter.nordicsemi.com/ */ - if (errata_120()){ - *(volatile uint32_t *)0x40029640ul = 0x200ul; - } - - /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the - * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit - * operations are not used in your code. */ - #if (__FPU_USED == 1) - SCB->CPACR |= (3UL << 20) | (3UL << 22); - __DSB(); - __ISB(); - #endif - - /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined, - two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as - normal GPIOs. */ - #if defined (CONFIG_NFCT_PINS_AS_GPIOS) - if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){ - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NVIC_SystemReset(); - } - #endif - - /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not - defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be - reserved for PinReset and not available as normal GPIO. */ - #if defined (CONFIG_GPIO_AS_PINRESET) - if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) || - ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){ - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->PSELRESET[0] = 18; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_UICR->PSELRESET[1] = 18; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} - NVIC_SystemReset(); - } - #endif - - /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product - Specification to see which one). */ - #if defined (ENABLE_SWO) - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos; - NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - #endif - - /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product - Specification to see which ones). */ - #if defined (ENABLE_TRACE) - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos; - NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - #endif - - SystemCoreClockUpdate(); -} - - -static bool errata_36(void) -{ - if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){ - return true; - } - - return false; -} - - -static bool errata_98(void) -{ - if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){ - return true; - } - - return false; -} - - -static bool errata_103(void) -{ - if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){ - return true; - } - - return false; -} - - -static bool errata_115(void) -{ - if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){ - return true; - } - - return false; -} - - -static bool errata_120(void) -{ - if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){ - return true; - } - - return false; -} - -/*lint --flb "Leave library region" */ diff --git a/ports/nrf/device/nrf52/system_nrf52840.h b/ports/nrf/device/nrf52/system_nrf52840.h deleted file mode 100644 index 9201e7926ba0f..0000000000000 --- a/ports/nrf/device/nrf52/system_nrf52840.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright (c) 2012 ARM LIMITED - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of ARM nor the names of its contributors may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef SYSTEM_NRF52_H -#define SYSTEM_NRF52_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemCoreClock variable. - */ -extern void SystemInit (void); - -/** - * Update SystemCoreClock variable - * - * @param none - * @return none - * - * @brief Updates the SystemCoreClock with current core Clock - * retrieved from cpu registers. - */ -extern void SystemCoreClockUpdate (void); - -#ifdef __cplusplus -} -#endif - -#endif /* SYSTEM_NRF52_H */ diff --git a/ports/nrf/drivers/bluetooth/ble_drv.c b/ports/nrf/drivers/bluetooth/ble_drv.c deleted file mode 100644 index e0a7950a0c216..0000000000000 --- a/ports/nrf/drivers/bluetooth/ble_drv.c +++ /dev/null @@ -1,1095 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#if BLUETOOTH_SD - -#include -#include -#include - -#include "py/runtime.h" -#include "ble_drv.h" -#include "mpconfigport.h" -#include "nrf_sdm.h" -#include "ble_gap.h" -#include "ble.h" // sd_ble_uuid_encode - - -#define BLE_DRIVER_VERBOSE 0 -#if BLE_DRIVER_VERBOSE -#define BLE_DRIVER_LOG printf -#else -#define BLE_DRIVER_LOG(...) -#endif - -#define BLE_ADV_LENGTH_FIELD_SIZE 1 -#define BLE_ADV_AD_TYPE_FIELD_SIZE 1 -#define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 - -#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION)) -#define UNIT_0_625_MS (625) -#define UNIT_10_MS (10000) -#define APP_CFG_NON_CONN_ADV_TIMEOUT 0 // Disable timeout. -#define NON_CONNECTABLE_ADV_INTERVAL MSEC_TO_UNITS(100, UNIT_0_625_MS) - -#define BLE_MIN_CONN_INTERVAL MSEC_TO_UNITS(12, UNIT_0_625_MS) -#define BLE_MAX_CONN_INTERVAL MSEC_TO_UNITS(12, UNIT_0_625_MS) -#define BLE_SLAVE_LATENCY 0 -#define BLE_CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) - -#define SD_TEST_OR_ENABLE() \ -if (ble_drv_stack_enabled() == 0) { \ - (void)ble_drv_stack_enable(); \ -} - -static volatile bool m_adv_in_progress; -static volatile bool m_tx_in_progress; - -static ble_drv_gap_evt_callback_t gap_event_handler; -static ble_drv_gatts_evt_callback_t gatts_event_handler; - -static mp_obj_t mp_gap_observer; -static mp_obj_t mp_gatts_observer; - -static volatile bool m_primary_service_found; -static volatile bool m_characteristic_found; -static volatile bool m_write_done; - -static volatile ble_drv_adv_evt_callback_t adv_event_handler; -static volatile ble_drv_gattc_evt_callback_t gattc_event_handler; -static volatile ble_drv_disc_add_service_callback_t disc_add_service_handler; -static volatile ble_drv_disc_add_char_callback_t disc_add_char_handler; -static volatile ble_drv_gattc_char_data_callback_t gattc_char_data_handle; - -static mp_obj_t mp_adv_observer; -static mp_obj_t mp_gattc_observer; -static mp_obj_t mp_gattc_disc_service_observer; -static mp_obj_t mp_gattc_disc_char_observer; -static mp_obj_t mp_gattc_char_data_observer; - -#include "nrf_nvic.h" - -nrf_nvic_state_t nrf_nvic_state = {0}; - -void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) { - BLE_DRIVER_LOG("ERROR: SoftDevice assert!!!"); -} - -uint32_t ble_drv_stack_enable(void) { - m_adv_in_progress = false; - m_tx_in_progress = false; - -#if BLUETOOTH_LFCLK_RC - nrf_clock_lf_cfg_t clock_config = { - .source = NRF_CLOCK_LF_SRC_RC, - .rc_ctiv = 16, - .rc_temp_ctiv = 2, -#if (BLE_API_VERSION == 4) - .accuracy = 0 -#else - .xtal_accuracy = 0 -#endif - }; -#else - nrf_clock_lf_cfg_t clock_config = { - .source = NRF_CLOCK_LF_SRC_XTAL, - .rc_ctiv = 0, - .rc_temp_ctiv = 0, -#if (BLE_API_VERSION == 4) - .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM -#else - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM -#endif - }; -#endif - uint32_t err_code = sd_softdevice_enable(&clock_config, - softdevice_assert_handler); - - BLE_DRIVER_LOG("SoftDevice enable status: " UINT_FMT "\n", (uint16_t)err_code); - - err_code = sd_nvic_EnableIRQ(SWI2_EGU2_IRQn); - - BLE_DRIVER_LOG("IRQ enable status: " UINT_FMT "\n", (uint16_t)err_code); - - // Enable BLE stack. -#if (BLE_API_VERSION == 2) - ble_enable_params_t ble_enable_params; - memset(&ble_enable_params, 0x00, sizeof(ble_enable_params)); - ble_enable_params.gatts_enable_params.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT; - ble_enable_params.gatts_enable_params.service_changed = 0; - ble_enable_params.gap_enable_params.periph_conn_count = 1; - ble_enable_params.gap_enable_params.central_conn_count = 1; -#endif - -#if (BLE_API_VERSION == 2) - uint32_t app_ram_start = 0x200039c0; - err_code = sd_ble_enable(&ble_enable_params, &app_ram_start); // 8K SD headroom from linker script. - BLE_DRIVER_LOG("BLE ram size: " UINT_FMT "\n", (uint16_t)app_ram_start); -#else - uint32_t app_ram_start = 0x20004000; - err_code = sd_ble_enable(&app_ram_start); - BLE_DRIVER_LOG("BLE ram size: " UINT_FMT "\n", (uint16_t)app_ram_start); -#endif - - - BLE_DRIVER_LOG("BLE enable status: " UINT_FMT "\n", (uint16_t)err_code); - - // set up security mode - ble_gap_conn_params_t gap_conn_params; - ble_gap_conn_sec_mode_t sec_mode; - - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode); - - const char device_name[] = "micr"; - - if ((err_code = sd_ble_gap_device_name_set(&sec_mode, - (const uint8_t *)device_name, - strlen(device_name))) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Cannot apply GAP parameters.")); - } - - // set connection parameters - memset(&gap_conn_params, 0, sizeof(gap_conn_params)); - - gap_conn_params.min_conn_interval = BLE_MIN_CONN_INTERVAL; - gap_conn_params.max_conn_interval = BLE_MAX_CONN_INTERVAL; - gap_conn_params.slave_latency = BLE_SLAVE_LATENCY; - gap_conn_params.conn_sup_timeout = BLE_CONN_SUP_TIMEOUT; - - if (sd_ble_gap_ppcp_set(&gap_conn_params) != 0) { - - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Cannot set PPCP parameters.")); - } - - return err_code; -} - -void ble_drv_stack_disable(void) { - sd_softdevice_disable(); -} - -uint8_t ble_drv_stack_enabled(void) { - uint8_t is_enabled; - uint32_t err_code = sd_softdevice_is_enabled(&is_enabled); - (void)err_code; - - BLE_DRIVER_LOG("Is enabled status: " UINT_FMT "\n", (uint16_t)err_code); - - return is_enabled; -} - -void ble_drv_address_get(ble_drv_addr_t * p_addr) { - SD_TEST_OR_ENABLE(); - - ble_gap_addr_t local_ble_addr; -#if (BLE_API_VERSION == 2) - uint32_t err_code = sd_ble_gap_address_get(&local_ble_addr); -#else - uint32_t err_code = sd_ble_gap_addr_get(&local_ble_addr); -#endif - - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not query for the device address.")); - } - - BLE_DRIVER_LOG("ble address, type: " HEX2_FMT ", " \ - "address: " HEX2_FMT ":" HEX2_FMT ":" HEX2_FMT ":" \ - HEX2_FMT ":" HEX2_FMT ":" HEX2_FMT "\n", \ - local_ble_addr.addr_type, \ - local_ble_addr.addr[5], local_ble_addr.addr[4], local_ble_addr.addr[3], \ - local_ble_addr.addr[2], local_ble_addr.addr[1], local_ble_addr.addr[0]); - - p_addr->addr_type = local_ble_addr.addr_type; - memcpy(p_addr->addr, local_ble_addr.addr, 6); -} - -bool ble_drv_uuid_add_vs(uint8_t * p_uuid, uint8_t * idx) { - SD_TEST_OR_ENABLE(); - - if (sd_ble_uuid_vs_add((ble_uuid128_t const *)p_uuid, idx) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not add Vendor Specific 128-bit UUID.")); - } - - return true; -} - -bool ble_drv_service_add(ubluepy_service_obj_t * p_service_obj) { - SD_TEST_OR_ENABLE(); - - if (p_service_obj->p_uuid->type > BLE_UUID_TYPE_BLE) { - - ble_uuid_t uuid; - uuid.type = p_service_obj->p_uuid->uuid_vs_idx; - uuid.uuid = p_service_obj->p_uuid->value[0]; - uuid.uuid += p_service_obj->p_uuid->value[1] << 8; - - if (sd_ble_gatts_service_add(p_service_obj->type, - &uuid, - &p_service_obj->handle) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not add Service.")); - } - } else if (p_service_obj->p_uuid->type == BLE_UUID_TYPE_BLE) { - BLE_DRIVER_LOG("adding service\n"); - - ble_uuid_t uuid; - uuid.type = p_service_obj->p_uuid->type; - uuid.uuid = p_service_obj->p_uuid->value[0]; - uuid.uuid += p_service_obj->p_uuid->value[1] << 8; - - if (sd_ble_gatts_service_add(p_service_obj->type, - &uuid, - &p_service_obj->handle) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not add Service.")); - } - } - return true; -} - -bool ble_drv_characteristic_add(ubluepy_characteristic_obj_t * p_char_obj) { - ble_gatts_char_md_t char_md; - ble_gatts_attr_md_t cccd_md; - ble_gatts_attr_t attr_char_value; - ble_uuid_t uuid; - ble_gatts_attr_md_t attr_md; - - memset(&char_md, 0, sizeof(char_md)); - - char_md.char_props.broadcast = (p_char_obj->props & UBLUEPY_PROP_BROADCAST) ? 1 : 0; - char_md.char_props.read = (p_char_obj->props & UBLUEPY_PROP_READ) ? 1 : 0; - char_md.char_props.write_wo_resp = (p_char_obj->props & UBLUEPY_PROP_WRITE_WO_RESP) ? 1 : 0; - char_md.char_props.write = (p_char_obj->props & UBLUEPY_PROP_WRITE) ? 1 : 0; - char_md.char_props.notify = (p_char_obj->props & UBLUEPY_PROP_NOTIFY) ? 1 : 0; - char_md.char_props.indicate = (p_char_obj->props & UBLUEPY_PROP_INDICATE) ? 1 : 0; -#if 0 - char_md.char_props.auth_signed_wr = (p_char_obj->props & UBLUEPY_PROP_NOTIFY) ? 1 : 0; -#endif - - - char_md.p_char_user_desc = NULL; - char_md.p_char_pf = NULL; - char_md.p_user_desc_md = NULL; - char_md.p_sccd_md = NULL; - - // if cccd - if (p_char_obj->attrs & UBLUEPY_ATTR_CCCD) { - memset(&cccd_md, 0, sizeof(cccd_md)); - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm); - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.write_perm); - cccd_md.vloc = BLE_GATTS_VLOC_STACK; - char_md.p_cccd_md = &cccd_md; - } else { - char_md.p_cccd_md = NULL; - } - - uuid.type = p_char_obj->p_uuid->type; - uuid.uuid = p_char_obj->p_uuid->value[0]; - uuid.uuid += p_char_obj->p_uuid->value[1] << 8; - - memset(&attr_md, 0, sizeof(attr_md)); - - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.read_perm); - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.write_perm); - - attr_md.vloc = BLE_GATTS_VLOC_STACK; - attr_md.rd_auth = 0; - attr_md.wr_auth = 0; - attr_md.vlen = 1; - - memset(&attr_char_value, 0, sizeof(attr_char_value)); - - attr_char_value.p_uuid = &uuid; - attr_char_value.p_attr_md = &attr_md; - attr_char_value.init_len = sizeof(uint8_t); - attr_char_value.init_offs = 0; -#if (BLE_API_VERSION == 2) - attr_char_value.max_len = (GATT_MTU_SIZE_DEFAULT - 3); -#else - attr_char_value.max_len = (BLE_GATT_ATT_MTU_DEFAULT - 3); -#endif - - ble_gatts_char_handles_t handles; - - if (sd_ble_gatts_characteristic_add(p_char_obj->service_handle, - &char_md, - &attr_char_value, - &handles) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not add Characteristic.")); - } - - // apply handles to object instance - p_char_obj->handle = handles.value_handle; - p_char_obj->user_desc_handle = handles.user_desc_handle; - p_char_obj->cccd_handle = handles.cccd_handle; - p_char_obj->sccd_handle = handles.sccd_handle; - - return true; -} - -bool ble_drv_advertise_data(ubluepy_advertise_data_t * p_adv_params) { - SD_TEST_OR_ENABLE(); - - uint8_t byte_pos = 0; - -#if (BLUETOOTH_SD == 140) - uint8_t adv_data[BLE_GAP_ADV_SR_MAX_LEN_DEFAULT]; -#else - uint8_t adv_data[BLE_GAP_ADV_MAX_SIZE]; -#endif - - if (p_adv_params->device_name_len > 0) { - ble_gap_conn_sec_mode_t sec_mode; - - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode); - - if (sd_ble_gap_device_name_set(&sec_mode, - p_adv_params->p_device_name, - p_adv_params->device_name_len) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not apply device name in the stack.")); - } - - BLE_DRIVER_LOG("Device name applied\n"); - - adv_data[byte_pos] = (BLE_ADV_AD_TYPE_FIELD_SIZE + p_adv_params->device_name_len); - byte_pos += BLE_ADV_LENGTH_FIELD_SIZE; - adv_data[byte_pos] = BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME; - byte_pos += BLE_ADV_AD_TYPE_FIELD_SIZE; - memcpy(&adv_data[byte_pos], p_adv_params->p_device_name, p_adv_params->device_name_len); - // increment position counter to see if it fits, and in case more content should - // follow in this adv packet. - byte_pos += p_adv_params->device_name_len; - } - - // Add FLAGS only if manually controlled data has not been used. - if (p_adv_params->data_len == 0) { - // set flags, default to disc mode - adv_data[byte_pos] = (BLE_ADV_AD_TYPE_FIELD_SIZE + BLE_AD_TYPE_FLAGS_DATA_SIZE); - byte_pos += BLE_ADV_LENGTH_FIELD_SIZE; - adv_data[byte_pos] = BLE_GAP_AD_TYPE_FLAGS; - byte_pos += BLE_AD_TYPE_FLAGS_DATA_SIZE; - adv_data[byte_pos] = BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE; - byte_pos += 1; - } - - if (p_adv_params->num_of_services > 0) { - - bool type_16bit_present = false; - bool type_128bit_present = false; - - for (uint8_t i = 0; i < p_adv_params->num_of_services; i++) { - ubluepy_service_obj_t * p_service = (ubluepy_service_obj_t *)p_adv_params->p_services[i]; - if (p_service->p_uuid->type == UBLUEPY_UUID_16_BIT) { - type_16bit_present = true; - } - - if (p_service->p_uuid->type == UBLUEPY_UUID_128_BIT) { - type_128bit_present = true; - } - } - - if (type_16bit_present) { - uint8_t size_byte_pos = byte_pos; - - // skip length byte for now, apply total length post calculation - byte_pos += BLE_ADV_LENGTH_FIELD_SIZE; - - adv_data[byte_pos] = BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE; - byte_pos += BLE_ADV_AD_TYPE_FIELD_SIZE; - - uint8_t uuid_total_size = 0; - uint8_t encoded_size = 0; - - for (uint8_t i = 0; i < p_adv_params->num_of_services; i++) { - ubluepy_service_obj_t * p_service = (ubluepy_service_obj_t *)p_adv_params->p_services[i]; - - ble_uuid_t uuid; - uuid.type = p_service->p_uuid->type; - uuid.uuid = p_service->p_uuid->value[0]; - uuid.uuid += p_service->p_uuid->value[1] << 8; - // calculate total size of uuids - if (sd_ble_uuid_encode(&uuid, &encoded_size, NULL) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not encode UUID, to check length.")); - } - - // do encoding into the adv buffer - if (sd_ble_uuid_encode(&uuid, &encoded_size, &adv_data[byte_pos]) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can encode UUID into the advertisment packet.")); - } - - BLE_DRIVER_LOG("encoded uuid for service %u: ", 0); - for (uint8_t j = 0; j < encoded_size; j++) { - BLE_DRIVER_LOG(HEX2_FMT " ", adv_data[byte_pos + j]); - } - BLE_DRIVER_LOG("\n"); - - uuid_total_size += encoded_size; // size of entry - byte_pos += encoded_size; // relative to adv data packet - BLE_DRIVER_LOG("ADV: uuid size: %u, type: %u, uuid: %x%x, vs_idx: %u\n", - encoded_size, p_service->p_uuid->type, - p_service->p_uuid->value[1], - p_service->p_uuid->value[0], - p_service->p_uuid->uuid_vs_idx); - } - - adv_data[size_byte_pos] = (BLE_ADV_AD_TYPE_FIELD_SIZE + uuid_total_size); - } - - if (type_128bit_present) { - uint8_t size_byte_pos = byte_pos; - - // skip length byte for now, apply total length post calculation - byte_pos += BLE_ADV_LENGTH_FIELD_SIZE; - - adv_data[byte_pos] = BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE; - byte_pos += BLE_ADV_AD_TYPE_FIELD_SIZE; - - uint8_t uuid_total_size = 0; - uint8_t encoded_size = 0; - - for (uint8_t i = 0; i < p_adv_params->num_of_services; i++) { - ubluepy_service_obj_t * p_service = (ubluepy_service_obj_t *)p_adv_params->p_services[i]; - - ble_uuid_t uuid; - uuid.type = p_service->p_uuid->uuid_vs_idx; - uuid.uuid = p_service->p_uuid->value[0]; - uuid.uuid += p_service->p_uuid->value[1] << 8; - - // calculate total size of uuids - if (sd_ble_uuid_encode(&uuid, &encoded_size, NULL) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not encode UUID, to check length.")); - } - - // do encoding into the adv buffer - if (sd_ble_uuid_encode(&uuid, &encoded_size, &adv_data[byte_pos]) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can encode UUID into the advertisment packet.")); - } - - BLE_DRIVER_LOG("encoded uuid for service %u: ", 0); - for (uint8_t j = 0; j < encoded_size; j++) { - BLE_DRIVER_LOG(HEX2_FMT " ", adv_data[byte_pos + j]); - } - BLE_DRIVER_LOG("\n"); - - uuid_total_size += encoded_size; // size of entry - byte_pos += encoded_size; // relative to adv data packet - BLE_DRIVER_LOG("ADV: uuid size: %u, type: %x%x, uuid: %u, vs_idx: %u\n", - encoded_size, p_service->p_uuid->type, - p_service->p_uuid->value[1], - p_service->p_uuid->value[0], - p_service->p_uuid->uuid_vs_idx); - } - - adv_data[size_byte_pos] = (BLE_ADV_AD_TYPE_FIELD_SIZE + uuid_total_size); - } - } - - if ((p_adv_params->data_len > 0) && (p_adv_params->p_data != NULL)) { -#if (BLUETOOTH_SD == 140) - if (p_adv_params->data_len + byte_pos > BLE_GAP_ADV_SR_MAX_LEN_DEFAULT) { -#else - if (p_adv_params->data_len + byte_pos > BLE_GAP_ADV_MAX_SIZE) { -#endif - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not fit data into the advertisment packet.")); - } - - memcpy(adv_data, p_adv_params->p_data, p_adv_params->data_len); - byte_pos += p_adv_params->data_len; - } - - // scan response data not set - uint32_t err_code; -#if (BLUETOOTH_SD == 140) - const ble_data_t ble_adv_data = { - .p_data = adv_data, - .len = byte_pos - }; - - if ((err_code = sd_ble_gap_adv_data_set(BLE_GAP_ADV_SET_HANDLE_DEFAULT, &ble_adv_data, NULL)) != 0) { -#else - if ((err_code = sd_ble_gap_adv_data_set(adv_data, byte_pos, NULL, 0)) != 0) { -#endif - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not apply advertisment data. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - BLE_DRIVER_LOG("Set Adv data size: " UINT_FMT "\n", byte_pos); - - static ble_gap_adv_params_t m_adv_params; - - // initialize advertising params - memset(&m_adv_params, 0, sizeof(m_adv_params)); - if (p_adv_params->connectable) { -#if (BLUETOOTH_SD == 140) - m_adv_params.properties.connectable = 1; - m_adv_params.properties.scannable = 1; -#else - m_adv_params.type = BLE_GAP_ADV_TYPE_ADV_IND; -#endif - } else { -#if (BLUETOOTH_SD == 140) - m_adv_params.properties.connectable = 0; -#else - m_adv_params.type = BLE_GAP_ADV_TYPE_ADV_NONCONN_IND; -#endif - } - - m_adv_params.p_peer_addr = NULL; // undirected advertisement - m_adv_params.fp = BLE_GAP_ADV_FP_ANY; - m_adv_params.interval = MSEC_TO_UNITS(100, UNIT_0_625_MS); // approx 8 ms -#if (BLUETOOTH_SD == 140) - m_adv_params.duration = 0; // infinite advertisment - m_adv_params.properties.legacy_pdu = 1; - m_adv_params.primary_phy = BLE_GAP_PHY_1MBPS; -#else - m_adv_params.timeout = 0; // infinite advertisment -#endif - - ble_drv_advertise_stop(); - -#if (BLUETOOTH_SD == 140) - err_code = sd_ble_gap_adv_start(BLE_GAP_ADV_SET_HANDLE_DEFAULT, &m_adv_params, BLE_CONN_CFG_TAG_DEFAULT); -#elif (BLUETOOTH_SD == 132 && BLE_API_VERSION == 4) - err_code = sd_ble_gap_adv_start(&m_adv_params, BLE_CONN_CFG_TAG_DEFAULT); -#else - err_code = sd_ble_gap_adv_start(&m_adv_params); -#endif - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not start advertisment. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - - m_adv_in_progress = true; - - return true; -} - -void ble_drv_advertise_stop(void) { - if (m_adv_in_progress == true) { - uint32_t err_code; -#if (BLUETOOTH_SD == 140) - if ((err_code = sd_ble_gap_adv_stop(BLE_GAP_ADV_SET_HANDLE_DEFAULT)) != 0) { -#else - if ((err_code = sd_ble_gap_adv_stop()) != 0) { -#endif - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not stop advertisment. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - } - m_adv_in_progress = false; -} - -void ble_drv_attr_s_read(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data) { - ble_gatts_value_t gatts_value; - memset(&gatts_value, 0, sizeof(gatts_value)); - - gatts_value.len = len; - gatts_value.offset = 0; - gatts_value.p_value = p_data; - - uint32_t err_code = sd_ble_gatts_value_get(conn_handle, - handle, - &gatts_value); - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not read attribute value. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - -} - -void ble_drv_attr_s_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data) { - ble_gatts_value_t gatts_value; - memset(&gatts_value, 0, sizeof(gatts_value)); - - gatts_value.len = len; - gatts_value.offset = 0; - gatts_value.p_value = p_data; - - uint32_t err_code = sd_ble_gatts_value_set(conn_handle, handle, &gatts_value); - - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not write attribute value. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } -} - -void ble_drv_attr_s_notify(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data) { - uint16_t hvx_len = len; - ble_gatts_hvx_params_t hvx_params; - - memset(&hvx_params, 0, sizeof(hvx_params)); - - hvx_params.handle = handle; - hvx_params.type = BLE_GATT_HVX_NOTIFICATION; - hvx_params.offset = 0; - hvx_params.p_len = &hvx_len; - hvx_params.p_data = p_data; - - while (m_tx_in_progress) { - ; - } - - m_tx_in_progress = true; - uint32_t err_code; - if ((err_code = sd_ble_gatts_hvx(conn_handle, &hvx_params)) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not notify attribute value. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } -} - -void ble_drv_gap_event_handler_set(mp_obj_t obj, ble_drv_gap_evt_callback_t evt_handler) { - mp_gap_observer = obj; - gap_event_handler = evt_handler; -} - -void ble_drv_gatts_event_handler_set(mp_obj_t obj, ble_drv_gatts_evt_callback_t evt_handler) { - mp_gatts_observer = obj; - gatts_event_handler = evt_handler; -} - -void ble_drv_gattc_event_handler_set(mp_obj_t obj, ble_drv_gattc_evt_callback_t evt_handler) { - mp_gattc_observer = obj; - gattc_event_handler = evt_handler; -} - -void ble_drv_adv_report_handler_set(mp_obj_t obj, ble_drv_adv_evt_callback_t evt_handler) { - mp_adv_observer = obj; - adv_event_handler = evt_handler; -} - - -void ble_drv_attr_c_read(uint16_t conn_handle, uint16_t handle, mp_obj_t obj, ble_drv_gattc_char_data_callback_t cb) { - - mp_gattc_char_data_observer = obj; - gattc_char_data_handle = cb; - - uint32_t err_code = sd_ble_gattc_read(conn_handle, - handle, - 0); - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not read attribute value. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - - while (gattc_char_data_handle != NULL) { - ; - } -} - -void ble_drv_attr_c_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data, bool w_response) { - - ble_gattc_write_params_t write_params; - - if (w_response) { - write_params.write_op = BLE_GATT_OP_WRITE_REQ; - } else { - write_params.write_op = BLE_GATT_OP_WRITE_CMD; - } - - write_params.flags = BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL; - write_params.handle = handle; - write_params.offset = 0; - write_params.len = len; - write_params.p_value = p_data; - - m_write_done = !w_response; - - uint32_t err_code = sd_ble_gattc_write(conn_handle, &write_params); - - if (err_code != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not write attribute value. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } - - while (m_write_done != true) { - ; - } -} - -void ble_drv_scan_start(void) { - SD_TEST_OR_ENABLE(); - - ble_gap_scan_params_t scan_params; - memset(&scan_params, 0, sizeof(ble_gap_scan_params_t)); - - scan_params.active = 1; - scan_params.interval = MSEC_TO_UNITS(100, UNIT_0_625_MS); - scan_params.window = MSEC_TO_UNITS(100, UNIT_0_625_MS); -#if (BLUETOOTH_SD == 140) - scan_params.filter_policy = BLE_GAP_SCAN_FP_ACCEPT_ALL; - scan_params.filter_duplicates = BLE_GAP_SCAN_DUPLICATES_SUPPRESS; - scan_params.scan_phy = BLE_GAP_PHY_1MBPS; - scan_params.duration = 0; // Infinite -#else - scan_params.timeout = 0; // Infinite -#endif - - uint32_t err_code; - if ((err_code = sd_ble_gap_scan_start(&scan_params)) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not start scanning. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } -} - -void ble_drv_scan_stop(void) { - sd_ble_gap_scan_stop(); -} - -void ble_drv_connect(uint8_t * p_addr, uint8_t addr_type) { - SD_TEST_OR_ENABLE(); - - ble_gap_scan_params_t scan_params; - scan_params.active = 1; - scan_params.interval = MSEC_TO_UNITS(100, UNIT_0_625_MS); - scan_params.window = MSEC_TO_UNITS(100, UNIT_0_625_MS); -#if (BLUETOOTH_SD == 140) - scan_params.duration = 0; // Infinite -#else - scan_params.timeout = 0; // Infinite -#endif - - ble_gap_addr_t addr; - memset(&addr, 0, sizeof(addr)); - - addr.addr_type = addr_type; - memcpy(addr.addr, p_addr, 6); - - BLE_DRIVER_LOG("GAP CONNECTING: "HEX2_FMT":"HEX2_FMT":"HEX2_FMT":"HEX2_FMT":"HEX2_FMT":"HEX2_FMT", type: %d\n", - addr.addr[0], addr.addr[1], addr.addr[2], addr.addr[3], addr.addr[4], addr.addr[5], addr.addr_type); - - ble_gap_conn_params_t conn_params; - -// (void)sd_ble_gap_ppcp_get(&conn_params); - - // set connection parameters - memset(&conn_params, 0, sizeof(conn_params)); - - conn_params.min_conn_interval = BLE_MIN_CONN_INTERVAL; - conn_params.max_conn_interval = BLE_MAX_CONN_INTERVAL; - conn_params.slave_latency = BLE_SLAVE_LATENCY; - conn_params.conn_sup_timeout = BLE_CONN_SUP_TIMEOUT; - - uint32_t err_code; -#if (BLE_API_VERSION == 2) - if ((err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params)) != 0) { -#else - if ((err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_DEFAULT)) != 0) { -#endif - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "Can not connect. status: 0x" HEX2_FMT, (uint16_t)err_code)); - } -} - -bool ble_drv_discover_services(mp_obj_t obj, uint16_t conn_handle, uint16_t start_handle, ble_drv_disc_add_service_callback_t cb) { - BLE_DRIVER_LOG("Discover primary services. Conn handle: 0x" HEX2_FMT "\n", - conn_handle); - - mp_gattc_disc_service_observer = obj; - disc_add_service_handler = cb; - - m_primary_service_found = false; - - uint32_t err_code; - err_code = sd_ble_gattc_primary_services_discover(conn_handle, - start_handle, - NULL); - if (err_code != 0) { - return false; - } - - // busy loop until last service has been iterated - while (disc_add_service_handler != NULL) { - ; - } - - if (m_primary_service_found) { - return true; - } else { - return false; - } -} - -bool ble_drv_discover_characteristic(mp_obj_t obj, - uint16_t conn_handle, - uint16_t start_handle, - uint16_t end_handle, - ble_drv_disc_add_char_callback_t cb) { - BLE_DRIVER_LOG("Discover characteristicts. Conn handle: 0x" HEX2_FMT "\n", - conn_handle); - - mp_gattc_disc_char_observer = obj; - disc_add_char_handler = cb; - - ble_gattc_handle_range_t handle_range; - handle_range.start_handle = start_handle; - handle_range.end_handle = end_handle; - - m_characteristic_found = false; - - uint32_t err_code; - err_code = sd_ble_gattc_characteristics_discover(conn_handle, &handle_range); - if (err_code != 0) { - return false; - } - - // busy loop until last service has been iterated - while (disc_add_char_handler != NULL) { - ; - } - - if (m_characteristic_found) { - return true; - } else { - return false; - } -} - -void ble_drv_discover_descriptors(void) { - -} - -static void ble_evt_handler(ble_evt_t * p_ble_evt) { -// S132 event ranges. -// Common 0x01 -> 0x0F -// GAP 0x10 -> 0x2F -// GATTC 0x30 -> 0x4F -// GATTS 0x50 -> 0x6F -// L2CAP 0x70 -> 0x8F - switch (p_ble_evt->header.evt_id) { - case BLE_GAP_EVT_CONNECTED: - BLE_DRIVER_LOG("GAP CONNECT\n"); - m_adv_in_progress = false; - gap_event_handler(mp_gap_observer, p_ble_evt->header.evt_id, p_ble_evt->evt.gap_evt.conn_handle, p_ble_evt->header.evt_len - (2 * sizeof(uint16_t)), NULL); - - ble_gap_conn_params_t conn_params; - (void)sd_ble_gap_ppcp_get(&conn_params); - (void)sd_ble_gap_conn_param_update(p_ble_evt->evt.gap_evt.conn_handle, &conn_params); - break; - - case BLE_GAP_EVT_DISCONNECTED: - BLE_DRIVER_LOG("GAP DISCONNECT\n"); - gap_event_handler(mp_gap_observer, p_ble_evt->header.evt_id, p_ble_evt->evt.gap_evt.conn_handle, p_ble_evt->header.evt_len - (2 * sizeof(uint16_t)), NULL); - break; - - case BLE_GATTS_EVT_HVC: - gatts_event_handler(mp_gatts_observer, p_ble_evt->header.evt_id, p_ble_evt->evt.gatts_evt.params.hvc.handle, p_ble_evt->header.evt_len - (2 * sizeof(uint16_t)), NULL); - break; - - case BLE_GATTS_EVT_WRITE: - BLE_DRIVER_LOG("GATTS write\n"); - - uint16_t handle = p_ble_evt->evt.gatts_evt.params.write.handle; - uint16_t data_len = p_ble_evt->evt.gatts_evt.params.write.len; - uint8_t * p_data = &p_ble_evt->evt.gatts_evt.params.write.data[0]; - - gatts_event_handler(mp_gatts_observer, p_ble_evt->header.evt_id, handle, data_len, p_data); - break; - - case BLE_GAP_EVT_CONN_PARAM_UPDATE: - BLE_DRIVER_LOG("GAP CONN PARAM UPDATE\n"); - break; - - case BLE_GATTS_EVT_SYS_ATTR_MISSING: - // No system attributes have been stored. - (void)sd_ble_gatts_sys_attr_set(p_ble_evt->evt.gatts_evt.conn_handle, NULL, 0, 0); - break; - -#if (BLE_API_VERSION == 4) - case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST: - BLE_DRIVER_LOG("GATTS EVT EXCHANGE MTU REQUEST\n"); - (void)sd_ble_gatts_exchange_mtu_reply(p_ble_evt->evt.gatts_evt.conn_handle, 23); // MAX MTU size - break; -#endif - -#if (BLE_API_VERSION == 4) - case BLE_GATTS_EVT_HVN_TX_COMPLETE: -#else - case BLE_EVT_TX_COMPLETE: -#endif - BLE_DRIVER_LOG("BLE EVT TX COMPLETE\n"); - m_tx_in_progress = false; - break; - - case BLE_GAP_EVT_SEC_PARAMS_REQUEST: - BLE_DRIVER_LOG("BLE EVT SEC PARAMS REQUEST\n"); - // pairing not supported - (void)sd_ble_gap_sec_params_reply(p_ble_evt->evt.gatts_evt.conn_handle, - BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, - NULL, NULL); - break; - - case BLE_GAP_EVT_ADV_REPORT: - BLE_DRIVER_LOG("BLE EVT ADV REPORT\n"); - ble_drv_adv_data_t adv_data = { - .p_peer_addr = p_ble_evt->evt.gap_evt.params.adv_report.peer_addr.addr, - .addr_type = p_ble_evt->evt.gap_evt.params.adv_report.peer_addr.addr_type, -#if (BLUETOOTH_SD == 140) - .is_scan_resp = p_ble_evt->evt.gap_evt.params.adv_report.type.scannable, -#else - .is_scan_resp = p_ble_evt->evt.gap_evt.params.adv_report.scan_rsp, -#endif - .rssi = p_ble_evt->evt.gap_evt.params.adv_report.rssi, - .data_len = p_ble_evt->evt.gap_evt.params.adv_report.dlen, - .p_data = p_ble_evt->evt.gap_evt.params.adv_report.data, -#if (BLUETOOTH_SD == 132) - .adv_type = p_ble_evt->evt.gap_evt.params.adv_report.type -#endif - }; - - // TODO: Fix unsafe callback to possible undefined callback... - adv_event_handler(mp_adv_observer, - p_ble_evt->header.evt_id, - &adv_data); - break; - - case BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST: - BLE_DRIVER_LOG("BLE EVT CONN PARAM UPDATE REQUEST\n"); - - (void)sd_ble_gap_conn_param_update(p_ble_evt->evt.gap_evt.conn_handle, - &p_ble_evt->evt.gap_evt.params.conn_param_update_request.conn_params); - break; - - case BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP: - BLE_DRIVER_LOG("BLE EVT PRIMARY SERVICE DISCOVERY RESPONSE\n"); - BLE_DRIVER_LOG(">>> service count: %d\n", p_ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp.count); - - for (uint16_t i = 0; i < p_ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp.count; i++) { - ble_gattc_service_t * p_service = &p_ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp.services[i]; - - ble_drv_service_data_t service; - service.uuid_type = p_service->uuid.type; - service.uuid = p_service->uuid.uuid; - service.start_handle = p_service->handle_range.start_handle; - service.end_handle = p_service->handle_range.end_handle; - - disc_add_service_handler(mp_gattc_disc_service_observer, &service); - } - - if (p_ble_evt->evt.gattc_evt.params.prim_srvc_disc_rsp.count > 0) { - m_primary_service_found = true; - } - - // mark end of service discovery - disc_add_service_handler = NULL; - - break; - - case BLE_GATTC_EVT_CHAR_DISC_RSP: - BLE_DRIVER_LOG("BLE EVT CHAR DISCOVERY RESPONSE\n"); - BLE_DRIVER_LOG(">>> characteristic count: %d\n", p_ble_evt->evt.gattc_evt.params.char_disc_rsp.count); - - for (uint16_t i = 0; i < p_ble_evt->evt.gattc_evt.params.char_disc_rsp.count; i++) { - ble_gattc_char_t * p_char = &p_ble_evt->evt.gattc_evt.params.char_disc_rsp.chars[i]; - - ble_drv_char_data_t char_data; - char_data.uuid_type = p_char->uuid.type; - char_data.uuid = p_char->uuid.uuid; - char_data.decl_handle = p_char->handle_decl; - char_data.value_handle = p_char->handle_value; - - char_data.props |= (p_char->char_props.broadcast) ? UBLUEPY_PROP_BROADCAST : 0; - char_data.props |= (p_char->char_props.read) ? UBLUEPY_PROP_READ : 0; - char_data.props |= (p_char->char_props.write_wo_resp) ? UBLUEPY_PROP_WRITE_WO_RESP : 0; - char_data.props |= (p_char->char_props.write) ? UBLUEPY_PROP_WRITE : 0; - char_data.props |= (p_char->char_props.notify) ? UBLUEPY_PROP_NOTIFY : 0; - char_data.props |= (p_char->char_props.indicate) ? UBLUEPY_PROP_INDICATE : 0; - #if 0 - char_data.props |= (p_char->char_props.auth_signed_wr) ? UBLUEPY_PROP_NOTIFY : 0; - #endif - - disc_add_char_handler(mp_gattc_disc_char_observer, &char_data); - } - - if (p_ble_evt->evt.gattc_evt.params.char_disc_rsp.count > 0) { - m_characteristic_found = true; - } - - // mark end of characteristic discovery - disc_add_char_handler = NULL; - - break; - - case BLE_GATTC_EVT_READ_RSP: - BLE_DRIVER_LOG("BLE EVT READ RESPONSE, offset: 0x"HEX2_FMT", length: 0x"HEX2_FMT"\n", - p_ble_evt->evt.gattc_evt.params.read_rsp.offset, - p_ble_evt->evt.gattc_evt.params.read_rsp.len); - - gattc_char_data_handle(mp_gattc_char_data_observer, - p_ble_evt->evt.gattc_evt.params.read_rsp.len, - p_ble_evt->evt.gattc_evt.params.read_rsp.data); - - // mark end of read - gattc_char_data_handle = NULL; - - break; - - case BLE_GATTC_EVT_WRITE_RSP: - BLE_DRIVER_LOG("BLE EVT WRITE RESPONSE\n"); - m_write_done = true; - break; - - case BLE_GATTC_EVT_HVX: - BLE_DRIVER_LOG("BLE EVT HVX RESPONSE\n"); - break; - - default: - BLE_DRIVER_LOG(">>> unhandled evt: 0x" HEX2_FMT "\n", p_ble_evt->header.evt_id); - break; - } -} - -#if (BLE_API_VERSION == 2) -static uint8_t m_ble_evt_buf[sizeof(ble_evt_t) + (GATT_MTU_SIZE_DEFAULT)] __attribute__ ((aligned (4))); -#else -static uint8_t m_ble_evt_buf[sizeof(ble_evt_t) + (BLE_GATT_ATT_MTU_DEFAULT)] __attribute__ ((aligned (4))); -#endif - -void SWI2_EGU2_IRQHandler(void) { - uint32_t evt_id; - uint32_t err_code; - do { - err_code = sd_evt_get(&evt_id); - // TODO: handle non ble events - } while (err_code != NRF_ERROR_NOT_FOUND && err_code != NRF_SUCCESS); - - uint16_t evt_len = sizeof(m_ble_evt_buf); - do { - err_code = sd_ble_evt_get(m_ble_evt_buf, &evt_len); - ble_evt_handler((ble_evt_t *)m_ble_evt_buf); - } while (err_code != NRF_ERROR_NOT_FOUND && err_code != NRF_SUCCESS); -} - -#endif // BLUETOOTH_SD diff --git a/ports/nrf/drivers/bluetooth/ble_drv.h b/ports/nrf/drivers/bluetooth/ble_drv.h deleted file mode 100644 index d8b7154671bc7..0000000000000 --- a/ports/nrf/drivers/bluetooth/ble_drv.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef BLUETOOTH_LE_DRIVER_H__ -#define BLUETOOTH_LE_DRIVER_H__ - -#if BLUETOOTH_SD - -#include -#include - -#include "modubluepy.h" - -typedef struct { - uint8_t addr[6]; - uint8_t addr_type; -} ble_drv_addr_t; - -typedef struct { - uint8_t * p_peer_addr; - uint8_t addr_type; - bool is_scan_resp; - int8_t rssi; - uint8_t data_len; - uint8_t * p_data; - uint8_t adv_type; -} ble_drv_adv_data_t; - -typedef struct { - uint16_t uuid; - uint8_t uuid_type; - uint16_t start_handle; - uint16_t end_handle; -} ble_drv_service_data_t; - -typedef struct { - uint16_t uuid; - uint8_t uuid_type; - uint8_t props; - uint16_t decl_handle; - uint16_t value_handle; -} ble_drv_char_data_t; - -typedef void (*ble_drv_gap_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t conn_handle, uint16_t length, uint8_t * data); -typedef void (*ble_drv_gatts_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data); -typedef void (*ble_drv_gattc_evt_callback_t)(mp_obj_t self, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data); -typedef void (*ble_drv_adv_evt_callback_t)(mp_obj_t self, uint16_t event_id, ble_drv_adv_data_t * data); -typedef void (*ble_drv_disc_add_service_callback_t)(mp_obj_t self, ble_drv_service_data_t * p_service_data); -typedef void (*ble_drv_disc_add_char_callback_t)(mp_obj_t self, ble_drv_char_data_t * p_desc_data); -typedef void (*ble_drv_gattc_char_data_callback_t)(mp_obj_t self, uint16_t length, uint8_t * p_data); - -uint32_t ble_drv_stack_enable(void); - -void ble_drv_stack_disable(void); - -uint8_t ble_drv_stack_enabled(void); - -void ble_drv_address_get(ble_drv_addr_t * p_addr); - -bool ble_drv_uuid_add_vs(uint8_t * p_uuid, uint8_t * idx); - -bool ble_drv_service_add(ubluepy_service_obj_t * p_service_obj); - -bool ble_drv_characteristic_add(ubluepy_characteristic_obj_t * p_char_obj); - -bool ble_drv_advertise_data(ubluepy_advertise_data_t * p_adv_params); - -void ble_drv_advertise_stop(void); - -void ble_drv_gap_event_handler_set(mp_obj_t obs, ble_drv_gap_evt_callback_t evt_handler); - -void ble_drv_gatts_event_handler_set(mp_obj_t obj, ble_drv_gatts_evt_callback_t evt_handler); - -void ble_drv_gattc_event_handler_set(mp_obj_t obj, ble_drv_gattc_evt_callback_t evt_handler); - -void ble_drv_attr_s_read(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data); - -void ble_drv_attr_c_read(uint16_t conn_handle, uint16_t handle, mp_obj_t obj, ble_drv_gattc_char_data_callback_t cb); - -void ble_drv_attr_s_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data); - -void ble_drv_attr_s_notify(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data); - -void ble_drv_attr_c_write(uint16_t conn_handle, uint16_t handle, uint16_t len, uint8_t * p_data, bool w_response); - -void ble_drv_scan_start(void); - -void ble_drv_scan_stop(void); - -void ble_drv_adv_report_handler_set(mp_obj_t obj, ble_drv_adv_evt_callback_t evt_handler); - -void ble_drv_connect(uint8_t * p_addr, uint8_t addr_type); - -bool ble_drv_discover_services(mp_obj_t obj, uint16_t conn_handle, uint16_t start_handle, ble_drv_disc_add_service_callback_t cb); - -bool ble_drv_discover_characteristic(mp_obj_t obj, - uint16_t conn_handle, - uint16_t start_handle, - uint16_t end_handle, - ble_drv_disc_add_char_callback_t cb); - -void ble_drv_discover_descriptors(void); - -#endif // BLUETOOTH_SD - -#endif // BLUETOOTH_LE_DRIVER_H__ diff --git a/ports/nrf/drivers/bluetooth/ble_uart.c b/ports/nrf/drivers/bluetooth/ble_uart.c deleted file mode 100644 index 069d71589ba53..0000000000000 --- a/ports/nrf/drivers/bluetooth/ble_uart.c +++ /dev/null @@ -1,279 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#if BLUETOOTH_SD - -#include -#include "ble_uart.h" -#include "ringbuffer.h" -#include "hal/hal_time.h" -#include "lib/utils/interrupt_char.h" - -#if MICROPY_PY_BLE_NUS - -#if BLUETOOTH_WEBBLUETOOTH_REPL -#include "hal_time.h" -#endif // BLUETOOTH_WEBBLUETOOTH_REPL - -static ubluepy_uuid_obj_t uuid_obj_service = { - .base.type = &ubluepy_uuid_type, - .type = UBLUEPY_UUID_128_BIT, - .value = {0x01, 0x00} -}; - -static ubluepy_uuid_obj_t uuid_obj_char_tx = { - .base.type = &ubluepy_uuid_type, - .type = UBLUEPY_UUID_128_BIT, - .value = {0x03, 0x00} -}; - -static ubluepy_uuid_obj_t uuid_obj_char_rx = { - .base.type = &ubluepy_uuid_type, - .type = UBLUEPY_UUID_128_BIT, - .value = {0x02, 0x00} -}; - -static ubluepy_service_obj_t ble_uart_service = { - .base.type = &ubluepy_service_type, - .p_uuid = &uuid_obj_service, - .type = UBLUEPY_SERVICE_PRIMARY -}; - -static ubluepy_characteristic_obj_t ble_uart_char_rx = { - .base.type = &ubluepy_characteristic_type, - .p_uuid = &uuid_obj_char_rx, - .props = UBLUEPY_PROP_WRITE | UBLUEPY_PROP_WRITE_WO_RESP, - .attrs = 0, -}; - -static ubluepy_characteristic_obj_t ble_uart_char_tx = { - .base.type = &ubluepy_characteristic_type, - .p_uuid = &uuid_obj_char_tx, - .props = UBLUEPY_PROP_NOTIFY, - .attrs = UBLUEPY_ATTR_CCCD, -}; - -static ubluepy_peripheral_obj_t ble_uart_peripheral = { - .base.type = &ubluepy_peripheral_type, - .conn_handle = 0xFFFF, -}; - -static volatile bool m_cccd_enabled; -static volatile bool m_connected; - -ringBuffer_typedef(uint8_t, ringbuffer_t); - -static ringbuffer_t m_rx_ring_buffer; -static ringbuffer_t * mp_rx_ring_buffer = &m_rx_ring_buffer; -static uint8_t m_rx_ring_buffer_data[128]; - -static ubluepy_advertise_data_t m_adv_data_uart_service; - -#if BLUETOOTH_WEBBLUETOOTH_REPL -static ubluepy_advertise_data_t m_adv_data_eddystone_url; -#endif // BLUETOOTH_WEBBLUETOOTH_REPL - -int mp_hal_stdin_rx_chr(void) { - while (isBufferEmpty(mp_rx_ring_buffer)) { - ; - } - - uint8_t byte; - bufferRead(mp_rx_ring_buffer, byte); - return (int)byte; -} - -bool mp_hal_stdin_any(void) { - return !isBufferEmpty(mp_rx_ring_buffer); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - uint8_t *buf = (uint8_t *)str; - size_t send_len; - - while (len > 0) { - if (len >= 20) { - send_len = 20; // (GATT_MTU_SIZE_DEFAULT - 3) - } else { - send_len = len; - } - - ubluepy_characteristic_obj_t * p_char = &ble_uart_char_tx; - - ble_drv_attr_s_notify(p_char->p_service->p_periph->conn_handle, - p_char->handle, - send_len, - buf); - - len -= send_len; - buf += send_len; - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) { - mp_hal_stdout_tx_strn(str, len); -} - -STATIC void gap_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t conn_handle, uint16_t length, uint8_t * data) { - ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in); - - if (event_id == 16) { // connect event - self->conn_handle = conn_handle; - m_connected = true; - } else if (event_id == 17) { // disconnect event - self->conn_handle = 0xFFFF; // invalid connection handle - m_connected = false; - ble_uart_advertise(); - } -} - -STATIC void gatts_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data) { - ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in); - (void)self; - - if (event_id == 80) { // gatts write - if (ble_uart_char_tx.cccd_handle == attr_handle) { - m_cccd_enabled = true; - } else if (ble_uart_char_rx.handle == attr_handle) { - for (uint16_t i = 0; i < length; i++) { - #if MICROPY_KBD_EXCEPTION - if (data[i] == mp_interrupt_char) { - mp_keyboard_interrupt(); - } else - #endif - { - bufferWrite(mp_rx_ring_buffer, data[i]); - } - } - } - } -} - -void ble_uart_init0(void) { - uint8_t base_uuid[] = {0x9E, 0xCA, 0xDC, 0x24, 0x0E, 0xE5, 0xA9, 0xE0, 0x93, 0xF3, 0xA3, 0xB5, 0x00, 0x00, 0x40, 0x6E}; - uint8_t uuid_vs_idx; - - (void)ble_drv_uuid_add_vs(base_uuid, &uuid_vs_idx); - - uuid_obj_service.uuid_vs_idx = uuid_vs_idx; - uuid_obj_char_tx.uuid_vs_idx = uuid_vs_idx; - uuid_obj_char_rx.uuid_vs_idx = uuid_vs_idx; - - (void)ble_drv_service_add(&ble_uart_service); - ble_uart_service.char_list = mp_obj_new_list(0, NULL); - - // add TX characteristic - ble_uart_char_tx.service_handle = ble_uart_service.handle; - bool retval = ble_drv_characteristic_add(&ble_uart_char_tx); - if (retval) { - ble_uart_char_tx.p_service = &ble_uart_service; - } - mp_obj_list_append(ble_uart_service.char_list, MP_OBJ_FROM_PTR(&ble_uart_char_tx)); - - // add RX characteristic - ble_uart_char_rx.service_handle = ble_uart_service.handle; - retval = ble_drv_characteristic_add(&ble_uart_char_rx); - if (retval) { - ble_uart_char_rx.p_service = &ble_uart_service; - } - mp_obj_list_append(ble_uart_service.char_list, MP_OBJ_FROM_PTR(&ble_uart_char_rx)); - - // setup the peripheral - ble_uart_peripheral.service_list = mp_obj_new_list(0, NULL); - mp_obj_list_append(ble_uart_peripheral.service_list, MP_OBJ_FROM_PTR(&ble_uart_service)); - ble_uart_service.p_periph = &ble_uart_peripheral; - - ble_drv_gap_event_handler_set(MP_OBJ_FROM_PTR(&ble_uart_peripheral), gap_event_handler); - ble_drv_gatts_event_handler_set(MP_OBJ_FROM_PTR(&ble_uart_peripheral), gatts_event_handler); - - ble_uart_peripheral.conn_handle = 0xFFFF; - - char device_name[] = "mpus"; - - mp_obj_t service_list = mp_obj_new_list(0, NULL); - mp_obj_list_append(service_list, MP_OBJ_FROM_PTR(&ble_uart_service)); - - mp_obj_t * services = NULL; - mp_uint_t num_services; - mp_obj_get_array(service_list, &num_services, &services); - - m_adv_data_uart_service.p_services = services; - m_adv_data_uart_service.num_of_services = num_services; - m_adv_data_uart_service.p_device_name = (uint8_t *)device_name; - m_adv_data_uart_service.device_name_len = strlen(device_name); - m_adv_data_uart_service.connectable = true; - m_adv_data_uart_service.p_data = NULL; - -#if BLUETOOTH_WEBBLUETOOTH_REPL - // for now point eddystone URL to https://goo.gl/x46FES => https://glennrub.github.io/webbluetooth/micropython/repl/ - static uint8_t eddystone_url_data[27] = {0x2, 0x1, 0x6, - 0x3, 0x3, 0xaa, 0xfe, - 19, 0x16, 0xaa, 0xfe, 0x10, 0xee, 0x3, 'g', 'o', 'o', '.', 'g', 'l', '/', 'x', '4', '6', 'F', 'E', 'S'}; - // eddystone url adv data - m_adv_data_eddystone_url.p_data = eddystone_url_data; - m_adv_data_eddystone_url.data_len = sizeof(eddystone_url_data); - m_adv_data_eddystone_url.connectable = false; -#endif - - m_cccd_enabled = false; - - // initialize ring buffer - m_rx_ring_buffer.size = sizeof(m_rx_ring_buffer_data) + 1; - m_rx_ring_buffer.start = 0; - m_rx_ring_buffer.end = 0; - m_rx_ring_buffer.elems = m_rx_ring_buffer_data; - - m_connected = false; - - ble_uart_advertise(); -} - -void ble_uart_advertise(void) { -#if BLUETOOTH_WEBBLUETOOTH_REPL - while (!m_connected) { - (void)ble_drv_advertise_data(&m_adv_data_uart_service); - mp_hal_delay_ms(500); - (void)ble_drv_advertise_data(&m_adv_data_eddystone_url); - mp_hal_delay_ms(500); - } - - ble_drv_advertise_stop(); -#else - (void)ble_drv_advertise_data(&m_adv_data_uart_service); -#endif // BLUETOOTH_WEBBLUETOOTH_REPL -} - -bool ble_uart_connected(void) { - return (m_connected); -} - -bool ble_uart_enabled(void) { - return (m_cccd_enabled); -} - -#endif // MICROPY_PY_BLE_NUS - -#endif // BLUETOOTH_SD diff --git a/ports/nrf/drivers/bluetooth/bluetooth_common.mk b/ports/nrf/drivers/bluetooth/bluetooth_common.mk deleted file mode 100644 index d52aaccfdc520..0000000000000 --- a/ports/nrf/drivers/bluetooth/bluetooth_common.mk +++ /dev/null @@ -1,46 +0,0 @@ -ifeq ($(SD), s132) - SOFTDEV_VERSION_LONG = $(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION) - CFLAGS += -DBLUETOOTH_SD=132 - -ifeq ($(SOFTDEV_VERSION), 2.0.1) - CFLAGS += -DBLE_API_VERSION=2 -else ifeq ($(SOFTDEV_VERSION), 5.0.0) - CFLAGS += -DBLE_API_VERSION=4 -endif -else ifeq ($(SD), s140) - SOFTDEV_VERSION_LONG = $(SD)_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION) - - CFLAGS += -DBLUETOOTH_SD=140 - CFLAGS += -DBLE_API_VERSION=4 -else -$(error Incorrect softdevice set flag) -endif - -CFLAGS += -DBLUETOOTH_SD_DEBUG=1 - -INC += -Idrivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SOFTDEV_VERSION_LONG)_API/include -INC += -Idrivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/$(SOFTDEV_VERSION_LONG)_API/include/$(MCU_VARIANT) - -SOFTDEV_HEX_NAME = $(SOFTDEV_VERSION_LONG)_softdevice.hex -SOFTDEV_HEX_PATH = drivers/bluetooth/$(SD)_$(MCU_VARIANT)_$(SOFTDEV_VERSION) -SOFTDEV_HEX = $(SOFTDEV_HEX_PATH)/$(SOFTDEV_HEX_NAME) - -define STACK_MISSING_ERROR - - -###### ERROR: Bluetooth LE Stack not found ############ -# # -# The build target requires a Bluetooth LE stack. # -# $(SOFTDEV_VERSION_LONG) Bluetooth LE stack not found. # -# # -# Please run the download script: # -# # -# drivers/bluetooth/download_ble_stack.sh # -# # -####################################################### - -endef - -ifeq ($(shell test ! -e $(SOFTDEV_HEX) && echo -n no),no) - $(error $(STACK_MISSING_ERROR)) -endif diff --git a/ports/nrf/drivers/bluetooth/download_ble_stack.sh b/ports/nrf/drivers/bluetooth/download_ble_stack.sh deleted file mode 100755 index 799ffc214ab6f..0000000000000 --- a/ports/nrf/drivers/bluetooth/download_ble_stack.sh +++ /dev/null @@ -1,74 +0,0 @@ -#!/bin/bash - -function download_s132_nrf52_2_0_1 -{ - echo "" - echo "####################################" - echo "### Downloading s132_nrf52_2.0.1 ###" - echo "####################################" - echo "" - - mkdir -p $1/s132_nrf52_2.0.1 - cd $1/s132_nrf52_2.0.1 - wget https://www.nordicsemi.com/eng/nordic/download_resource/51479/6/84640562/95151 - mv 95151 temp.zip - unzip -u temp.zip - rm temp.zip - cd - -} - -function download_s132_nrf52_5_0_0 -{ - echo "" - echo "####################################" - echo "### Downloading s132_nrf52_5.0.0 ###" - echo "####################################" - echo "" - - mkdir -p $1/s132_nrf52_5.0.0 - cd $1/s132_nrf52_5.0.0 - - wget http://www.nordicsemi.com/eng/nordic/download_resource/58987/11/7198220/116068 - mv 116068 temp.zip - unzip -u temp.zip - rm temp.zip - cd - -} - -function download_s140_nrf52_6_0_0_6_alpha -{ - echo "" - echo "############################################" - echo "### Downloading s140_nrf52_6.0.0-6.alpha ###" - echo "############################################" - echo "" - - mkdir -p $1/s140_nrf52_6.0.0-6.alpha - cd $1/s140_nrf52_6.0.0-6.alpha - - wget http://www.nordicsemi.com/eng/nordic/download_resource/60624/18/61756799/116072 - mv 116072 temp.zip - unzip -u temp.zip - rm temp.zip - cd - -} - -SCRIPT_DIR="$(cd -P "$(dirname "${BASH_SOURCE[0]}")" && pwd)" - -if [ $# -eq 0 ]; then - echo "No Bluetooth LE stack defined, downloading all." - download_s132_nrf52_2_0_1 ${SCRIPT_DIR} - download_s132_nrf52_5_0_0 ${SCRIPT_DIR} - download_s140_nrf52_6_0_0_6_alpha ${SCRIPT_DIR} -else - case $1 in - "s132_nrf52_2_0_1" ) - download_s132_nrf52_2_0_1 ${SCRIPT_DIR} ;; - "s132_nrf52_5_0_0" ) - download_s132_nrf52_5_0_0 ${SCRIPT_DIR} ;; - "s140_nrf52_6_0_0_6_alpha" ) - download_s140_nrf52_6_0_0_6_alpha ${SCRIPT_DIR} ;; - esac -fi - -exit 0 diff --git a/ports/nrf/drivers/softpwm.c b/ports/nrf/drivers/softpwm.c deleted file mode 100644 index 22564f7d0a38a..0000000000000 --- a/ports/nrf/drivers/softpwm.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Mark Shannon - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" - -#if MICROPY_PY_MACHINE_SOFT_PWM - -#include "stddef.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "hal_timer.h" -#include "hal_gpio.h" -#include "pin.h" - -#include "ticker.h" - -#define CYCLES_PER_MICROSECONDS 16 - -#define MICROSECONDS_PER_TICK 16 -#define CYCLES_PER_TICK (CYCLES_PER_MICROSECONDS*MICROSECONDS_PER_TICK) -// This must be an integer multiple of MICROSECONDS_PER_TICK -#define MICROSECONDS_PER_MACRO_TICK 6000 -#define MILLISECONDS_PER_MACRO_TICK 6 - -#define PWM_TICKER_INDEX 2 - -// Default period of 20ms -#define DEFAULT_PERIOD ((20*1000)/MICROSECONDS_PER_TICK) - -typedef struct _pwm_event { - uint16_t time; - uint8_t pin; - uint8_t turn_on; -} pwm_event; - -typedef struct _pwm_events { - uint8_t count; - uint16_t period; - uint32_t all_pins; - pwm_event events[1]; -} pwm_events; - -static const pwm_events OFF_EVENTS = { - .count = 1, - .period = DEFAULT_PERIOD, - .all_pins = 0, - .events = { - { - .time = 1024, - .pin = 31, - .turn_on = 0 - } - } -}; - -#define active_events MP_STATE_PORT(pwm_active_events) -#define pending_events MP_STATE_PORT(pwm_pending_events) - -void softpwm_init(void) { - active_events = &OFF_EVENTS; - pending_events = NULL; -} - -static uint8_t next_event = 0; - -static inline int32_t pwm_get_period_ticks(void) { - const pwm_events *tmp = pending_events; - if (tmp == NULL) - tmp = active_events; - return tmp->period; -} - -#if 0 -void pwm_dump_events(const pwm_events *events) { - printf("Count %d, period %d, all pins %d\r\n", events->count, events->period, events->all_pins); - for (uint32_t i = 0; i < events->count; i++) { - const pwm_event *event = &events->events[i]; - printf("Event. pin: %d, duty cycle: %d, turn_on: %d\r\n", - event->pin, event->time, event->turn_on); - } -} - -void pwm_dump_state(void) { - while(pending_events); - pwm_dump_events(active_events); -} -#endif - -static const pwm_events *swap_pending(const pwm_events *in) { - __disable_irq(); - const pwm_events *result = pending_events; - pending_events = in; - __enable_irq(); - return result; -} - -static pwm_events *copy_events(const pwm_events *orig, uint32_t count) { - pwm_events *events = m_malloc(sizeof(pwm_events) + (count-1)*sizeof(pwm_event)); - events->count = count; - uint32_t copy = count > orig->count ? orig->count : count; - for (uint32_t i = 0; i < copy; i++) { - events->events[i] = orig->events[i]; - } - return events; -} - -static int find_pin_in_events(const pwm_events *events, uint32_t pin) { - for (int i = 0; i < events->count; i++) { - if (events->events[i].pin == pin) - return i; - } - return -1; -} - -static void sort_events(pwm_events *events) { - // Insertion sort - for (int32_t i = 1; i < events->count; i++) { - pwm_event x = events->events[i]; - int32_t j; - for (j = i - 1; j >= 0 && events->events[j].time > x.time; j--) { - events->events[j+1] = events->events[j]; - } - events->events[j+1] = x; - } -} - -int32_t pwm_callback(void) { - int32_t tdiff; - const pwm_events *events = active_events; - const pwm_event *event = &events->events[next_event]; - int32_t tnow = (event->time*events->period)>>10; - do { - if (event->turn_on) { - hal_gpio_pin_set(0, event->pin); - next_event++; - } else { - hal_gpio_out_clear(0, events->all_pins); - next_event = 0; - tnow = 0; - if (pending_events) { - events = pending_events; - active_events = events; - pending_events = NULL; - } - } - event = &events->events[next_event]; - tdiff = ((event->time*events->period)>>10) - tnow; - } while (tdiff == 0); - return tdiff; -} - -void pwm_start(void) { - set_ticker_callback(PWM_TICKER_INDEX, pwm_callback, 120); -} - -void pwm_stop(void) { - clear_ticker_callback(PWM_TICKER_INDEX); -} - -static void pwm_set_period_ticks(int32_t ticks) { - const pwm_events *old_events = swap_pending(NULL); - if (old_events == NULL) { - old_events = active_events; - } - pwm_events *events = copy_events(old_events, old_events->count); - events->all_pins = old_events->all_pins; - events->period = ticks; - pending_events = events; -} - -int pwm_set_period_us(int32_t us) { - if ((us < 256) || - (us > 1000000)) { - return -1; - } - pwm_set_period_ticks(us/MICROSECONDS_PER_TICK); - return 0; -} - -int32_t pwm_get_period_us(void) { - return pwm_get_period_ticks()*MICROSECONDS_PER_TICK; -} - -void pwm_set_duty_cycle(int32_t pin, uint32_t value) { - if (value >= (1<<10)) { - value = (1<<10)-1; - } - uint32_t turn_on_time = 1024-value; - const pwm_events *old_events = swap_pending(NULL); - if (old_events == NULL) { - old_events = active_events; - } - if (((1<all_pins) == 0) { - hal_gpio_cfg_pin(0, pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - } - int ev = find_pin_in_events(old_events, pin); - pwm_events *events; - if (ev < 0 && value == 0) { - return; - } else if (ev < 0) { - events = copy_events(old_events, old_events->count+1); - events->all_pins = old_events->all_pins | (1<events[old_events->count].time = turn_on_time; - events->events[old_events->count].pin = pin; - events->events[old_events->count].turn_on = 1; - } else if (value == 0) { - events = copy_events(old_events, old_events->count-1); - events->all_pins = old_events->all_pins & ~(1<count-1) { - events->events[ev] = old_events->events[old_events->count-1]; - } - } else { - events = copy_events(old_events, old_events->count); - events->all_pins = old_events->all_pins; - events->events[ev].time = turn_on_time; - } - events->period = old_events->period; - sort_events(events); - pending_events = events; - return; -} - -void pwm_release(int32_t pin) { - pwm_set_duty_cycle(pin, 0); - const pwm_events *ev = active_events; - int i = find_pin_in_events(ev, pin); - if (i < 0) - return; - // If i >= 0 it means that `ev` is in RAM, so it safe to discard the const qualifier - ((pwm_events *)ev)->events[i].pin = 31; - hal_gpio_pin_clear(0, pin); -} - -#endif // MICROPY_PY_MACHINE_SOFT_PWM diff --git a/ports/nrf/drivers/softpwm.h b/ports/nrf/drivers/softpwm.h deleted file mode 100644 index a73c15cd85c47..0000000000000 --- a/ports/nrf/drivers/softpwm.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __MICROPY_INCLUDED_LIB_PWM_H__ -#define __MICROPY_INCLUDED_LIB_PWM_H__ - -void softpwm_init(void); -void pwm_start(void); -void pwm_stop(void); - -int pwm_set_period_us(int32_t us); -int32_t pwm_get_period_us(void); -void pwm_set_duty_cycle(int32_t pin, int32_t value); -void pwm_release(int32_t pin); - -#endif // __MICROPY_INCLUDED_LIB_PWM_H__ diff --git a/ports/nrf/drivers/ticker.c b/ports/nrf/drivers/ticker.c deleted file mode 100644 index aa730d643df55..0000000000000 --- a/ports/nrf/drivers/ticker.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Mark Shannon - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" - -#if MICROPY_PY_MACHINE_SOFT_PWM - -#include "ticker.h" -#include "hal_irq.h" - -#define FastTicker NRF_TIMER1 -#define FastTicker_IRQn TIMER1_IRQn -#define FastTicker_IRQHandler TIMER1_IRQHandler - -#define SlowTicker_IRQn SWI0_IRQn -#define SlowTicker_IRQHandler SWI0_IRQHandler - -// Ticker callback function called every MACRO_TICK -static volatile callback_ptr slow_ticker; - -void ticker_init(callback_ptr slow_ticker_callback) { - slow_ticker = slow_ticker_callback; - - NRF_TIMER_Type *ticker = FastTicker; -#ifdef NRF51 - ticker->POWER = 1; -#endif - __NOP(); - ticker_stop(); - ticker->TASKS_CLEAR = 1; - ticker->CC[3] = MICROSECONDS_PER_MACRO_TICK; - ticker->MODE = TIMER_MODE_MODE_Timer; - ticker->BITMODE = TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos; - ticker->PRESCALER = 4; // 1 tick == 1 microsecond - ticker->INTENSET = TIMER_INTENSET_COMPARE3_Msk; - ticker->SHORTS = 0; - -#ifdef NRF51 - hal_irq_priority(FastTicker_IRQn, 1); -#else - hal_irq_priority(FastTicker_IRQn, 2); -#endif - - hal_irq_priority(SlowTicker_IRQn, 3); - hal_irq_priority(SlowTicker_IRQn, 3); - - hal_irq_enable(SlowTicker_IRQn); -} - -/* Start and stop timer 1 including workarounds for Anomaly 73 for Timer -* http://www.nordicsemi.com/eng/content/download/29490/494569/file/nRF51822-PAN%20v3.0.pdf -*/ -void ticker_start(void) { - hal_irq_enable(FastTicker_IRQn); -#ifdef NRF51 - *(uint32_t *)0x40009C0C = 1; // for Timer 1 -#endif - FastTicker->TASKS_START = 1; -} - -void ticker_stop(void) { - hal_irq_disable(FastTicker_IRQn); - FastTicker->TASKS_STOP = 1; -#ifdef NRF51 - *(uint32_t *)0x40009C0C = 0; // for Timer 1 -#endif -} - -int32_t noop(void) { - return -1; -} - -volatile uint32_t ticks; - -static ticker_callback_ptr callbacks[3] = { noop, noop, noop }; - -void FastTicker_IRQHandler(void) { - NRF_TIMER_Type *ticker = FastTicker; - ticker_callback_ptr *call = callbacks; - if (ticker->EVENTS_COMPARE[0]) { - ticker->EVENTS_COMPARE[0] = 0; - ticker->CC[0] += call[0]()*MICROSECONDS_PER_TICK; - } - if (ticker->EVENTS_COMPARE[1]) { - ticker->EVENTS_COMPARE[1] = 0; - ticker->CC[1] += call[1]()*MICROSECONDS_PER_TICK; - } - if (ticker->EVENTS_COMPARE[2]) { - ticker->EVENTS_COMPARE[2] = 0; - ticker->CC[2] += call[2]()*MICROSECONDS_PER_TICK; - } - if (ticker->EVENTS_COMPARE[3]) { - ticker->EVENTS_COMPARE[3] = 0; - ticker->CC[3] += MICROSECONDS_PER_MACRO_TICK; - ticks += MILLISECONDS_PER_MACRO_TICK; - hal_irq_pending(SlowTicker_IRQn); - } -} - - -static const uint32_t masks[3] = { - TIMER_INTENCLR_COMPARE0_Msk, - TIMER_INTENCLR_COMPARE1_Msk, - TIMER_INTENCLR_COMPARE2_Msk, -}; - -int set_ticker_callback(uint32_t index, ticker_callback_ptr func, int32_t initial_delay_us) { - if (index > 3) - return -1; - NRF_TIMER_Type *ticker = FastTicker; - callbacks[index] = noop; - ticker->INTENCLR = masks[index]; - ticker->TASKS_CAPTURE[index] = 1; - uint32_t t = FastTicker->CC[index]; - // Need to make sure that set tick is aligned to lastest tick - // Use CC[3] as a reference, as that is always up-to-date. - int32_t cc3 = FastTicker->CC[3]; - int32_t delta = t+initial_delay_us-cc3; - delta = (delta/MICROSECONDS_PER_TICK+1)*MICROSECONDS_PER_TICK; - callbacks[index] = func; - ticker->INTENSET = masks[index]; - FastTicker->CC[index] = cc3 + delta; - return 0; -} - -int clear_ticker_callback(uint32_t index) { - if (index > 3) - return -1; - FastTicker->INTENCLR = masks[index]; - callbacks[index] = noop; - return 0; -} - -void SlowTicker_IRQHandler(void) -{ - slow_ticker(); -} - -#endif // MICROPY_PY_MACHINE_SOFT_PWM diff --git a/ports/nrf/drivers/ticker.h b/ports/nrf/drivers/ticker.h deleted file mode 100644 index 6ac87cd503623..0000000000000 --- a/ports/nrf/drivers/ticker.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __MICROPY_INCLUDED_LIB_TICKER_H__ -#define __MICROPY_INCLUDED_LIB_TICKER_H__ - -/************************************* - * 62.5kHz (16µs cycle time) ticker. - ************************************/ - -#include "nrf.h" - -typedef void (*callback_ptr)(void); -typedef int32_t (*ticker_callback_ptr)(void); - -void ticker_init(callback_ptr slow_ticker_callback); -void ticker_start(void); -void ticker_stop(void); - -int clear_ticker_callback(uint32_t index); -int set_ticker_callback(uint32_t index, ticker_callback_ptr func, int32_t initial_delay_us); - -int set_low_priority_callback(callback_ptr callback, int id); - -#define CYCLES_PER_MICROSECONDS 16 - -#define MICROSECONDS_PER_TICK 16 -#define CYCLES_PER_TICK (CYCLES_PER_MICROSECONDS*MICROSECONDS_PER_TICK) -// This must be an integer multiple of MICROSECONDS_PER_TICK -#define MICROSECONDS_PER_MACRO_TICK 6000 -#define MILLISECONDS_PER_MACRO_TICK 6 - -#endif // __MICROPY_INCLUDED_LIB_TICKER_H__ \ No newline at end of file diff --git a/ports/nrf/examples/mountsd.py b/ports/nrf/examples/mountsd.py deleted file mode 100644 index 1577221a62049..0000000000000 --- a/ports/nrf/examples/mountsd.py +++ /dev/null @@ -1,35 +0,0 @@ -""" - -Example for pca10040 / nrf52832 to show how mount -and list a sdcard connected over SPI. - - -Direct wireing on SD card (SPI): - ______________________________ - | \ - | 9. | NC | \ - | 1. | ~CS | | - | 2. | MOSI | | - | 3. | GND | | - | 4. | VCC3.3| | - | 5. | SCK | | - | 6. | GND | | - | 7. | MISO | | - | 8. | NC | | - | | - --------------------------------- -""" - -import os -from machine import SPI, Pin -from sdcard import SDCard - -def mnt(): - cs = Pin("A22", mode=Pin.OUT) - sd = SDCard(SPI(0), cs) - os.mount(sd, '/') - -def list(): - files = os.listdir() - print(files) - diff --git a/ports/nrf/examples/musictest.py b/ports/nrf/examples/musictest.py deleted file mode 100644 index d958543ec36cc..0000000000000 --- a/ports/nrf/examples/musictest.py +++ /dev/null @@ -1,13 +0,0 @@ -# -# Example usage where "A3" is the Buzzer pin. -# -# from musictest import play -# play("A3") -# - -from machine import Pin -import music - -def play(pin_str): - p = Pin(pin_str, mode=Pin.OUT) - music.play(music.PRELUDE, pin=p) diff --git a/ports/nrf/examples/nrf52_pwm.py b/ports/nrf/examples/nrf52_pwm.py deleted file mode 100644 index 2ea1e7be7eb55..0000000000000 --- a/ports/nrf/examples/nrf52_pwm.py +++ /dev/null @@ -1,15 +0,0 @@ -import time -from machine import PWM, Pin - -def pulse(): - for i in range(0, 101): - p = PWM(0, Pin("A17", mode=Pin.OUT), freq=PWM.FREQ_16MHZ, duty=i, period=16000) - p.init() - time.sleep_ms(10) - p.deinit() - - for i in range(0, 101): - p = PWM(0, Pin("A17", mode=Pin.OUT), freq=PWM.FREQ_16MHZ, duty=100-i, period=16000) - p.init() - time.sleep_ms(10) - p.deinit() diff --git a/ports/nrf/examples/nrf52_servo.py b/ports/nrf/examples/nrf52_servo.py deleted file mode 100644 index e9c594af3ec8e..0000000000000 --- a/ports/nrf/examples/nrf52_servo.py +++ /dev/null @@ -1,50 +0,0 @@ -# This file is part of the MicroPython project, http://micropython.org/ -# -# The MIT License (MIT) -# -# Copyright (c) 2017 Glenn Ruben Bakke -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE - -import time -from machine import PWM, Pin - -class Servo(): - def __init__(self, pin_name=""): - if pin_name: - self.pin = Pin(pin_name, mode=Pin.OUT, pull=Pin.PULL_DOWN) - else: - self.pin = Pin("A22", mode=Pin.OUT, pull=Pin.PULL_DOWN) - def left(self): - p = PWM(0, self.pin, freq=PWM.FREQ_125KHZ, pulse_width=105, period=2500, mode=PWM.MODE_HIGH_LOW) - p.init() - time.sleep_ms(200) - p.deinit() - - def center(self): - p = PWM(0, self.pin, freq=PWM.FREQ_125KHZ, pulse_width=188, period=2500, mode=PWM.MODE_HIGH_LOW) - p.init() - time.sleep_ms(200) - p.deinit() - - def right(self): - p = PWM(0, self.pin, freq=PWM.FREQ_125KHZ, pulse_width=275, period=2500, mode=PWM.MODE_HIGH_LOW) - p.init() - time.sleep_ms(200) - p.deinit() diff --git a/ports/nrf/examples/powerup.py b/ports/nrf/examples/powerup.py deleted file mode 100644 index fd7dd83439466..0000000000000 --- a/ports/nrf/examples/powerup.py +++ /dev/null @@ -1,213 +0,0 @@ -# This file is part of the MicroPython project, http://micropython.org/ -# -# The MIT License (MIT) -# -# Copyright (c) 2017 Glenn Ruben Bakke -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE - -# MicroPython controller for PowerUp 3.0 paper airplane -# https://www.poweruptoys.com/products/powerup-v3 -# -# Examples is written for nrf52832, pca10040 using s132 bluetooth stack. -# -# Joystick shield pin mapping: -# - analog stick x-direction - ADC0 - P0.02/"A02" -# - buttons P0.13 - P0.16 / "A13", "A14", "A15", "A16" -# -# Example usage: -# -# from powerup import PowerUp3 -# p = PowerUp3() - -import time -from machine import ADC -from machine import Pin -from ubluepy import Peripheral, Scanner, constants - -def bytes_to_str(bytes): - string = "" - for b in bytes: - string += chr(b) - return string - -def get_device_names(scan_entries): - dev_names = [] - for e in scan_entries: - scan = e.getScanData() - if scan: - for s in scan: - if s[0] == constants.ad_types.AD_TYPE_COMPLETE_LOCAL_NAME: - dev_names.append((e, bytes_to_str(s[2]))) - return dev_names - -def find_device_by_name(name): - s = Scanner() - scan_res = s.scan(500) - - device_names = get_device_names(scan_res) - for dev in device_names: - if name == dev[1]: - return dev[0] - -class PowerUp3: - def __init__(self): - self.x_adc = ADC(1) - - self.btn_speed_up = Pin("A13", mode=Pin.IN, pull=Pin.PULL_UP) - self.btn_speed_down = Pin("A15", mode=Pin.IN, pull=Pin.PULL_UP) - self.btn_speed_full = Pin("A14", mode=Pin.IN, pull=Pin.PULL_UP) - self.btn_speed_off = Pin("A16", mode=Pin.IN, pull=Pin.PULL_UP) - - self.x_mid = 0 - - self.calibrate() - self.connect() - self.loop() - - def read_stick_x(self): - return self.x_adc.value() - - def button_speed_up(self): - return not bool(self.btn_speed_up.value()) - - def button_speed_down(self): - return not bool(self.btn_speed_down.value()) - - def button_speed_full(self): - return not bool(self.btn_speed_full.value()) - - def button_speed_off(self): - return not bool(self.btn_speed_off.value()) - - def calibrate(self): - self.x_mid = self.read_stick_x() - - def __str__(self): - return "calibration x: %i, y: %i" % (self.x_mid) - - def map_chars(self): - s = self.p.getServices() - - service_batt = s[3] - service_control = s[4] - - self.char_batt_lvl = service_batt.getCharacteristics()[0] - self.char_control_speed = service_control.getCharacteristics()[0] - self.char_control_angle = service_control.getCharacteristics()[2] - - def battery_level(self): - return int(self.char_batt_lvl.read()[0]) - - def speed(self, new_speed=None): - if new_speed == None: - return int(self.char_control_speed.read()[0]) - else: - self.char_control_speed.write(bytearray([new_speed])) - - def angle(self, new_angle=None): - if new_angle == None: - return int(self.char_control_angle.read()[0]) - else: - self.char_control_angle.write(bytearray([new_angle])) - - def connect(self): - dev = None - - # connect to the airplane - while not dev: - dev = find_device_by_name("TailorToys PowerUp") - if dev: - self.p = Peripheral() - self.p.connect(dev.addr()) - - # locate interesting characteristics - self.map_chars() - - def rudder_center(self): - if self.old_angle != 0: - self.old_angle = 0 - self.angle(0) - - def rudder_left(self, angle): - steps = (angle // self.interval_size_left) - new_angle = 60 - steps - - if self.old_angle != new_angle: - self.angle(new_angle) - self.old_angle = new_angle - - def rudder_right(self, angle): - steps = (angle // self.interval_size_right) - new_angle = -steps - - if self.old_angle != new_angle: - self.angle(new_angle) - self.old_angle = new_angle - - def throttle(self, speed): - if (speed > 200): - speed = 200 - elif (speed < 0): - speed = 0 - - if self.old_speed != speed: - self.speed(speed) - self.old_speed = speed - - def loop(self): - adc_threshold = 10 - right_threshold = self.x_mid + adc_threshold - left_threshold = self.x_mid - adc_threshold - - self.interval_size_left = self.x_mid // 60 - self.interval_size_right = (255 - self.x_mid) // 60 - - self.old_angle = 0 - self.old_speed = 0 - - while True: - - time.sleep_ms(100) - - # read out new angle - new_angle = self.read_stick_x() - if (new_angle < 256): - if (new_angle > right_threshold): - self.rudder_right(new_angle - self.x_mid) - elif (new_angle < left_threshold): - self.rudder_left(new_angle) - else: - self.rudder_center() - - # read out new speed - new_speed = self.old_speed - - if self.button_speed_up(): - new_speed += 25 - elif self.button_speed_down(): - new_speed -= 25 - elif self.button_speed_full(): - new_speed = 200 - elif self.button_speed_off(): - new_speed = 0 - else: - pass - - self.throttle(new_speed) diff --git a/ports/nrf/examples/seeed_tft.py b/ports/nrf/examples/seeed_tft.py deleted file mode 100644 index f751bbb0f274d..0000000000000 --- a/ports/nrf/examples/seeed_tft.py +++ /dev/null @@ -1,210 +0,0 @@ -# This file is part of the MicroPython project, http://micropython.org/ -# -# The MIT License (MIT) -# -# Copyright (c) 2016 Glenn Ruben Bakke -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -MicroPython Seeedstudio TFT Shield V2 driver, SPI interfaces, Analog GPIO -Contains SD-card reader, LCD and Touch sensor - -The pca10040 pin layout is used as reference. - -Example usage of LCD: - - from seeedstudio_tft_shield_v2 import ILI9341 - - lcd = ILI9341(240, 320) - lcd.text("Hello World!, 32, 32) - lcd.show() - -Example usage of SD card reader: - - import os - from seeedstudio_tft_shield_v2 import mount_tf - - tf = mount_tf() - os.listdir() -""" -import os -import time -import framebuf - -from machine import SPI, Pin -from sdcard import SDCard - -def mount_tf(self, mount_point="/"): - sd = SDCard(SPI(0), Pin("A15", mode=Pin.OUT)) - os.mount(sd, mount_point) - -class ILI9341: - def __init__(self, width, height): - self.width = width - self.height = height - self.pages = self.height // 8 - self.buffer = bytearray(self.pages * self.width) - self.framebuf = framebuf.FrameBuffer(self.buffer, self.width, self.height, framebuf.MONO_VLSB) - - self.spi = SPI(0) - # chip select - self.cs = Pin("A16", mode=Pin.OUT, pull=Pin.PULL_UP) - # command - self.dc = Pin("A17", mode=Pin.OUT, pull=Pin.PULL_UP) - - # initialize all pins high - self.cs.high() - self.dc.high() - - self.spi.init(baudrate=8000000, phase=0, polarity=0) - - self.init_display() - - - def init_display(self): - time.sleep_ms(500) - - self.write_cmd(0x01) - - time.sleep_ms(200) - - self.write_cmd(0xCF) - self.write_data(bytearray([0x00, 0x8B, 0x30])) - - self.write_cmd(0xED) - self.write_data(bytearray([0x67, 0x03, 0x12, 0x81])) - - self.write_cmd(0xE8) - self.write_data(bytearray([0x85, 0x10, 0x7A])) - - self.write_cmd(0xCB) - self.write_data(bytearray([0x39, 0x2C, 0x00, 0x34, 0x02])) - - self.write_cmd(0xF7) - self.write_data(bytearray([0x20])) - - self.write_cmd(0xEA) - self.write_data(bytearray([0x00, 0x00])) - - # Power control - self.write_cmd(0xC0) - # VRH[5:0] - self.write_data(bytearray([0x1B])) - - # Power control - self.write_cmd(0xC1) - # SAP[2:0];BT[3:0] - self.write_data(bytearray([0x10])) - - # VCM control - self.write_cmd(0xC5) - self.write_data(bytearray([0x3F, 0x3C])) - - # VCM control2 - self.write_cmd(0xC7) - self.write_data(bytearray([0xB7])) - - # Memory Access Control - self.write_cmd(0x36) - self.write_data(bytearray([0x08])) - - self.write_cmd(0x3A) - self.write_data(bytearray([0x55])) - - self.write_cmd(0xB1) - self.write_data(bytearray([0x00, 0x1B])) - - # Display Function Control - self.write_cmd(0xB6) - self.write_data(bytearray([0x0A, 0xA2])) - - # 3Gamma Function Disable - self.write_cmd(0xF2) - self.write_data(bytearray([0x00])) - - # Gamma curve selected - self.write_cmd(0x26) - self.write_data(bytearray([0x01])) - - # Set Gamma - self.write_cmd(0xE0) - self.write_data(bytearray([0x0F, 0x2A, 0x28, 0x08, 0x0E, 0x08, 0x54, 0XA9, 0x43, 0x0A, 0x0F, 0x00, 0x00, 0x00, 0x00])) - - # Set Gamma - self.write_cmd(0XE1) - self.write_data(bytearray([0x00, 0x15, 0x17, 0x07, 0x11, 0x06, 0x2B, 0x56, 0x3C, 0x05, 0x10, 0x0F, 0x3F, 0x3F, 0x0F])) - - # Exit Sleep - self.write_cmd(0x11) - time.sleep_ms(120) - - # Display on - self.write_cmd(0x29) - time.sleep_ms(500) - self.fill(0) - - def show(self): - # set col - self.write_cmd(0x2A) - self.write_data(bytearray([0x00, 0x00])) - self.write_data(bytearray([0x00, 0xef])) - - # set page - self.write_cmd(0x2B) - self.write_data(bytearray([0x00, 0x00])) - self.write_data(bytearray([0x01, 0x3f])) - - self.write_cmd(0x2c); - - num_of_pixels = self.height * self.width - - for row in range(0, self.pages): - for pixel_pos in range(0, 8): - for col in range(0, self.width): - compressed_pixel = self.buffer[row * 240 + col] - if ((compressed_pixel >> pixel_pos) & 0x1) == 0: - self.write_data(bytearray([0x00, 0x00])) - else: - self.write_data(bytearray([0xFF, 0xFF])) - - def fill(self, col): - self.framebuf.fill(col) - - def pixel(self, x, y, col): - self.framebuf.pixel(x, y, col) - - def scroll(self, dx, dy): - self.framebuf.scroll(dx, dy) - - def text(self, string, x, y, col=1): - self.framebuf.text(string, x, y, col) - - def write_cmd(self, cmd): - self.dc.low() - self.cs.low() - self.spi.write(bytearray([cmd])) - self.cs.high() - - def write_data(self, buf): - self.dc.high() - self.cs.low() - self.spi.write(buf) - self.cs.high() - diff --git a/ports/nrf/examples/ssd1306_mod.py b/ports/nrf/examples/ssd1306_mod.py deleted file mode 100644 index 0cee2c2a674f3..0000000000000 --- a/ports/nrf/examples/ssd1306_mod.py +++ /dev/null @@ -1,27 +0,0 @@ -# NOTE: Modified version to align with implemented I2C API in nrf port. -# -# Examples usage of SSD1306_SPI on pca10040 -# -# from machine import Pin, SPI -# from ssd1306 import SSD1306_SPI -# spi = SPI(0, baudrate=40000000) -# dc = Pin.board.PA11 -# res = Pin.board.PA12 -# cs = Pin.board.PA13 -# disp = SSD1306_SPI(128, 64, spi, dc, res, cs) -# -# -# Example usage of SSD1306_I2C on pca10040 -# -# from machine import Pin, I2C -# from ssd1306_mod import SSD1306_I2C_Mod -# i2c = I2C(0, Pin.board.PA3, Pin.board.PA4) -# disp = SSD1306_I2C_Mod(128, 64, i2c) - -from ssd1306 import SSD1306_I2C - -class SSD1306_I2C_Mod(SSD1306_I2C): - - def write_data(self, buf): - buffer = bytearray([0x40]) + buf # Co=0, D/C#=1 - self.i2c.writeto(self.addr, buffer) diff --git a/ports/nrf/examples/ubluepy_eddystone.py b/ports/nrf/examples/ubluepy_eddystone.py index c8abd5aea6ba0..baf25ba4b477b 100644 --- a/ports/nrf/examples/ubluepy_eddystone.py +++ b/ports/nrf/examples/ubluepy_eddystone.py @@ -44,7 +44,7 @@ def generate_eddystone_adv_packet(url): service_data = uuid + eddystone_data packet_service_data = gen_ad_type_content(constants.ad_types.AD_TYPE_SERVICE_DATA, service_data) - # generate advertisment packet + # generate advertisement packet packet = bytearray([]) packet.extend(packet_flags) packet.extend(packet_uuid16) diff --git a/ports/nrf/examples/ubluepy_temp.py b/ports/nrf/examples/ubluepy_temp.py index fac091bc178c3..e5c157dbbd4c1 100644 --- a/ports/nrf/examples/ubluepy_temp.py +++ b/ports/nrf/examples/ubluepy_temp.py @@ -41,7 +41,7 @@ def event_handler(id, handle, data): rtc.stop() # indicate 'disconnected' LED(1).off() - # restart advertisment + # restart advertisement periph.advertise(device_name="micr_temp", services=[serv_env_sense]) elif id == constants.EVT_GATTS_WRITE: diff --git a/ports/nrf/fatfs_port.c b/ports/nrf/fatfs_port.c index 13ac21fb1bcca..cb1bfa83473db 100644 --- a/ports/nrf/fatfs_port.c +++ b/ports/nrf/fatfs_port.c @@ -26,8 +26,17 @@ #include "py/runtime.h" #include "lib/oofatfs/ff.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/RTC.h" +#include "shared-bindings/time/__init__.h" DWORD get_fattime(void) { - // TODO: Implement this function. For now, fake it. - return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2); +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif } diff --git a/ports/nrf/fifo.c b/ports/nrf/fifo.c deleted file mode 100644 index 7e8f989c30e96..0000000000000 --- a/ports/nrf/fifo.c +++ /dev/null @@ -1,267 +0,0 @@ -/******************************************************************************/ -/*! - @file fifo.c - @author hathach (tinyusb.org) - - @section DESCRIPTION - - Light-weight FIFO buffer with basic mutex support - - @section LICENSE - - Software License Agreement (BSD License) - - Copyright (c) 2012, K. Townsend (microBuilder.eu) - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holders nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -/******************************************************************************/ - -#include "fifo.h" - -/*------------------------------------------------------------------*/ -/* - *------------------------------------------------------------------*/ -#if CFG_FIFO_MUTEX - -#define mutex_lock_if_needed(_ff) if (_ff->mutex) fifo_mutex_lock(_ff->mutex) -#define mutex_unlock_if_needed(_ff) if (_ff->mutex) fifo_mutex_unlock(_ff->mutex) - -#else - -#define mutex_lock_if_needed(_ff) -#define mutex_unlock_if_needed(_ff) - -#endif - -static inline uint16_t min16_of(uint16_t x, uint16_t y) -{ - return (x < y) ? x : y; -} - -static inline bool fifo_initalized(fifo_t* f) -{ - return (f->buffer != NULL) && (f->depth > 0) && (f->item_size > 0); -} - - -/******************************************************************************/ -/*! - @brief Read one byte out of the RX buffer. - - This function will return the byte located at the array index of the - read pointer, and then increment the read pointer index. If the read - pointer exceeds the maximum buffer size, it will roll over to zero. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_buffer - Pointer to the place holder for data read from the buffer - - @returns TRUE if the queue is not empty -*/ -/******************************************************************************/ -bool fifo_read(fifo_t* f, void * p_buffer) -{ - if( !fifo_initalized(f) ) return false; - if( fifo_empty(f) ) return false; - - mutex_lock_if_needed(f); - - memcpy(p_buffer, - f->buffer + (f->rd_idx * f->item_size), - f->item_size); - f->rd_idx = (f->rd_idx + 1) % f->depth; - f->count--; - - mutex_unlock_if_needed(f); - - return true; -} - -/******************************************************************************/ -/*! - @brief This function will read n elements into the array index specified by - the write pointer and increment the write index. If the write index - exceeds the max buffer size, then it will roll over to zero. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_data - The pointer to data location - @param[in] count - Number of element that buffer can afford - - @returns number of bytes read from the FIFO -*/ -/******************************************************************************/ -uint16_t fifo_read_n (fifo_t* f, void * p_buffer, uint16_t count) -{ - if( !fifo_initalized(f) ) return false; - if( fifo_empty(f) ) return false; - - /* Limit up to fifo's count */ - count = min16_of(count, f->count); - if( count == 0 ) return 0; - - mutex_lock_if_needed(f); - - /* Could copy up to 2 portions marked as 'x' if queue is wrapped around - * case 1: ....RxxxxW....... - * case 2: xxxxxW....Rxxxxxx - */ -// uint16_t index2upper = min16_of(count, f->count-f->rd_idx); - - uint8_t* p_buf = (uint8_t*) p_buffer; - uint16_t len = 0; - while( (len < count) && fifo_read(f, p_buf) ) - { - len++; - p_buf += f->item_size; - } - - mutex_unlock_if_needed(f); - - return len; -} - -/******************************************************************************/ -/*! - @brief Reads one item without removing it from the FIFO - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] position - Position to read from in the FIFO buffer - @param[in] p_buffer - Pointer to the place holder for data read from the buffer - - @returns TRUE if the queue is not empty -*/ -/******************************************************************************/ -bool fifo_peek_at(fifo_t* f, uint16_t position, void * p_buffer) -{ - if ( !fifo_initalized(f) ) return false; - if ( position >= f->count ) return false; - - // rd_idx is position=0 - uint16_t index = (f->rd_idx + position) % f->depth; - memcpy(p_buffer, - f->buffer + (index * f->item_size), - f->item_size); - - return true; -} - -/******************************************************************************/ -/*! - @brief Write one element into the RX buffer. - - This function will write one element into the array index specified by - the write pointer and increment the write index. If the write index - exceeds the max buffer size, then it will roll over to zero. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_data - The byte to add to the FIFO - - @returns TRUE if the data was written to the FIFO (overwrittable - FIFO will always return TRUE) -*/ -/******************************************************************************/ -bool fifo_write(fifo_t* f, void const * p_data) -{ - if ( !fifo_initalized(f) ) return false; - if ( fifo_full(f) && !f->overwritable ) return false; - - mutex_lock_if_needed(f); - - memcpy( f->buffer + (f->wr_idx * f->item_size), - p_data, - f->item_size); - - f->wr_idx = (f->wr_idx + 1) % f->depth; - - if (fifo_full(f)) - { - f->rd_idx = f->wr_idx; // keep the full state (rd == wr && len = size) - } - else - { - f->count++; - } - - mutex_unlock_if_needed(f); - - return true; -} - -/******************************************************************************/ -/*! - @brief This function will write n elements into the array index specified by - the write pointer and increment the write index. If the write index - exceeds the max buffer size, then it will roll over to zero. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_data - The pointer to data to add to the FIFO - @param[in] count - Number of element - @return Number of written elements -*/ -/******************************************************************************/ -uint16_t fifo_write_n(fifo_t* f, void const * p_data, uint16_t count) -{ - if ( count == 0 ) return 0; - - uint8_t* p_buf = (uint8_t*) p_data; - - uint16_t len = 0; - while( (len < count) && fifo_write(f, p_buf) ) - { - len++; - p_buf += f->item_size; - } - - return len; -} - -/******************************************************************************/ -/*! - @brief Clear the fifo read and write pointers and set length to zero - - @param[in] f - Pointer to the FIFO buffer to manipulate -*/ -/******************************************************************************/ -void fifo_clear(fifo_t *f) -{ - mutex_lock_if_needed(f); - - f->rd_idx = f->wr_idx = f->count = 0; - - mutex_unlock_if_needed(f); -} diff --git a/ports/nrf/fifo.h b/ports/nrf/fifo.h deleted file mode 100644 index df54350cf41a4..0000000000000 --- a/ports/nrf/fifo.h +++ /dev/null @@ -1,148 +0,0 @@ -/******************************************************************************/ -/*! - @file fifo.h - @author hathach (tinyusb.org) - - @section LICENSE - - Software License Agreement (BSD License) - - Copyright (c) 2012, K. Townsend (microBuilder.eu) - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holders nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -/******************************************************************************/ -#ifndef __FIFO_H__ -#define __FIFO_H__ - -#define CFG_FIFO_MUTEX 1 - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#if CFG_FIFO_MUTEX - -#include "nrf.h" - -#define fifo_mutex_t IRQn_Type - -#define fifo_mutex_lock(m) NVIC_DisableIRQ(m) -#define fifo_mutex_unlock(m) NVIC_EnableIRQ(m) - -/* Internal use only */ -#define _mutex_declare(m) .mutex = m - -#else - -#define _mutex_declare(m) - -#endif - -typedef struct _fifo_t -{ - uint8_t* const buffer ; ///< buffer pointer - uint16_t const depth ; ///< max items - uint16_t const item_size ; ///< size of each item - volatile uint16_t count ; ///< number of items in queue - volatile uint16_t wr_idx ; ///< write pointer - volatile uint16_t rd_idx ; ///< read pointer - bool const overwritable; - -#if CFG_FIFO_MUTEX - fifo_mutex_t const mutex; -#endif - -} fifo_t; - -/** - * Macro to declare a fifo - * @param name : name of the fifo - * @param depth : max number of items - * @param type : data type of item - * @param overwritable : whether fifo should be overwrite when full - * @param mutex : mutex object - */ -#define FIFO_DEF(_name, _depth, _type, _overwritable, _mutex)\ - _type _name##_buffer[_depth];\ - fifo_t _name##_fifo = {\ - .buffer = (uint8_t*) _name##_buffer,\ - .depth = _depth,\ - .item_size = sizeof(_type),\ - .overwritable = _overwritable,\ - _mutex_declare(_mutex)\ - };\ - fifo_t* _name = &_name##_fifo - - -void fifo_clear (fifo_t *f); - -bool fifo_write (fifo_t* f, void const * p_data); -uint16_t fifo_write_n (fifo_t* f, void const * p_data, uint16_t count); - -bool fifo_read (fifo_t* f, void * p_buffer); -uint16_t fifo_read_n (fifo_t* f, void * p_buffer, uint16_t count); - -bool fifo_peek_at (fifo_t* f, uint16_t position, void * p_buffer); -static inline bool fifo_peek(fifo_t* f, void * p_buffer) -{ - return fifo_peek_at(f, 0, p_buffer); -} - - -static inline bool fifo_empty(fifo_t* f) -{ - return (f->count == 0); -} - -static inline bool fifo_full(fifo_t* f) -{ - return (f->count == f->depth); -} - -static inline uint16_t fifo_count(fifo_t* f) -{ - return f->count; -} - -static inline uint16_t fifo_remaining(fifo_t* f) -{ - return f->depth - f->count; -} - -static inline uint16_t fifo_depth(fifo_t* f) -{ - return f->depth; -} - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/ports/nrf/gccollect.h b/ports/nrf/gccollect.h deleted file mode 100644 index 6a285b017a1fe..0000000000000 --- a/ports/nrf/gccollect.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef GC_COLLECT_H__ -#define GC_COLLECT_H__ - -extern uint32_t _etext; -extern uint32_t _sidata; -extern uint32_t _ram_start; -extern uint32_t _sdata; -extern uint32_t _edata; -extern uint32_t _sbss; -extern uint32_t _ebss; -extern uint32_t _heap_start; -extern uint32_t _heap_end; -extern uint32_t _estack; -extern uint32_t _ram_end; - -void gc_collect(void); - -#endif diff --git a/ports/nrf/hal/hal_adc.c b/ports/nrf/hal/hal_adc.c deleted file mode 100644 index a6cf453914d9c..0000000000000 --- a/ports/nrf/hal/hal_adc.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "mphalport.h" -#include "hal_adc.h" - -#ifdef HAL_ADC_MODULE_ENABLED - -#define ADC_REF_VOLTAGE_IN_MILLIVOLTS (1200) // Reference voltage (in milli volts) used by ADC while doing conversion. -#define ADC_PRE_SCALING_COMPENSATION (3) // The ADC is configured to use VDD with 1/3 prescaling as input. And hence the result of conversion is to be multiplied by 3 to get the actual value of the battery voltage. -#define DIODE_FWD_VOLT_DROP_MILLIVOLTS (270) // Typical forward voltage drop of the diode (Part no: SD103ATW-7-F) that is connected in series with the voltage supply. This is the voltage drop when the forward current is 1mA. Source: Data sheet of 'SURFACE MOUNT SCHOTTKY BARRIER DIODE ARRAY' available at www.diodes.com. - -#define ADC_RESULT_IN_MILLI_VOLTS(ADC_VALUE)\ - ((((ADC_VALUE) * ADC_REF_VOLTAGE_IN_MILLIVOLTS) / 255) * ADC_PRE_SCALING_COMPENSATION) - -static const uint32_t hal_adc_input_lookup[] = { - ADC_CONFIG_PSEL_AnalogInput0 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput1 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput2 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput3 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput4 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput5 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput6 << ADC_CONFIG_PSEL_Pos, - ADC_CONFIG_PSEL_AnalogInput7 << ADC_CONFIG_PSEL_Pos -}; - - -static uint8_t battery_level_in_percent(const uint16_t mvolts) -{ - uint8_t battery_level; - - if (mvolts >= 3000) { - battery_level = 100; - } else if (mvolts > 2900) { - battery_level = 100 - ((3000 - mvolts) * 58) / 100; - } else if (mvolts > 2740) { - battery_level = 42 - ((2900 - mvolts) * 24) / 160; - } else if (mvolts > 2440) { - battery_level = 18 - ((2740 - mvolts) * 12) / 300; - } else if (mvolts > 2100) { - battery_level = 6 - ((2440 - mvolts) * 6) / 340; - } else { - battery_level = 0; - } - - return battery_level; -} - -uint16_t hal_adc_channel_value(hal_adc_config_t const * p_adc_conf) { - ADC_BASE->INTENSET = ADC_INTENSET_END_Msk; - ADC_BASE->CONFIG = (ADC_CONFIG_RES_8bit << ADC_CONFIG_RES_Pos) - | (ADC_CONFIG_INPSEL_AnalogInputTwoThirdsPrescaling << ADC_CONFIG_INPSEL_Pos) - | (ADC_CONFIG_REFSEL_VBG << ADC_CONFIG_REFSEL_Pos) - | (hal_adc_input_lookup[p_adc_conf->channel]) - | (ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos); - - ADC_BASE->EVENTS_END = 0; - ADC_BASE->ENABLE = ADC_ENABLE_ENABLE_Enabled; - - ADC_BASE->EVENTS_END = 0; - ADC_BASE->TASKS_START = 1; - - while (!ADC_BASE->EVENTS_END) { - ; - } - - uint8_t adc_result; - - ADC_BASE->EVENTS_END = 0; - adc_result = ADC_BASE->RESULT; - ADC_BASE->TASKS_STOP = 1; - - return adc_result; -} - -uint16_t hal_adc_battery_level(void) { - ADC_BASE->INTENSET = ADC_INTENSET_END_Msk; - ADC_BASE->CONFIG = (ADC_CONFIG_RES_8bit << ADC_CONFIG_RES_Pos) - | (ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling << ADC_CONFIG_INPSEL_Pos) - | (ADC_CONFIG_REFSEL_VBG << ADC_CONFIG_REFSEL_Pos) - | (ADC_CONFIG_PSEL_Disabled << ADC_CONFIG_PSEL_Pos) - | (ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos); - - ADC_BASE->EVENTS_END = 0; - ADC_BASE->ENABLE = ADC_ENABLE_ENABLE_Enabled; - - ADC_BASE->EVENTS_END = 0; - ADC_BASE->TASKS_START = 1; - - while (!ADC_BASE->EVENTS_END) { - ; - } - - uint8_t adc_result; - uint16_t batt_lvl_in_milli_volts; - - ADC_BASE->EVENTS_END = 0; - adc_result = ADC_BASE->RESULT; - ADC_BASE->TASKS_STOP = 1; - - batt_lvl_in_milli_volts = ADC_RESULT_IN_MILLI_VOLTS(adc_result) + DIODE_FWD_VOLT_DROP_MILLIVOLTS; - return battery_level_in_percent(batt_lvl_in_milli_volts); -} - -#endif // HAL_ADC_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_adc.h b/ports/nrf/hal/hal_adc.h deleted file mode 100644 index 76ed7e66182c1..0000000000000 --- a/ports/nrf/hal/hal_adc.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_ADC_H__ -#define HAL_ADC_H__ - -#include - -#include "nrf.h" - -#if NRF51 - -#define ADC_IRQ_NUM ADC_IRQn -#define ADC_BASE ((NRF_ADC_Type *)NRF_ADC_BASE) -#define HAL_ADC_Type NRF_ADC_Type - -#else - -#define ADC_IRQ_NUM SAADC_IRQn -#define ADC_BASE ((NRF_SAADC_Type *)NRF_SAADC_BASE) -#define HAL_ADC_Type NRF_SAADC_Type - -#endif - -typedef enum { - HAL_ADC_CHANNEL_2 = 2, - HAL_ADC_CHANNEL_3, - HAL_ADC_CHANNEL_4, - HAL_ADC_CHANNEL_5, - HAL_ADC_CHANNEL_6, - HAL_ADC_CHANNEL_7, -} hal_adc_channel_t; - -/** - * @brief ADC Configuration Structure definition - */ -typedef struct { - hal_adc_channel_t channel; -} hal_adc_config_t; - -/** - * @brief ADC handle Structure definition - */ -typedef struct __ADC_HandleTypeDef { - hal_adc_config_t config; /* ADC config parameters */ -} ADC_HandleTypeDef; - -uint16_t hal_adc_channel_value(hal_adc_config_t const * p_adc_conf); - -uint16_t hal_adc_battery_level(void); - -#endif // HAL_ADC_H__ diff --git a/ports/nrf/hal/hal_adce.c b/ports/nrf/hal/hal_adce.c deleted file mode 100644 index 0abdf07c377ef..0000000000000 --- a/ports/nrf/hal/hal_adce.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_adc.h" - -#ifdef HAL_ADCE_MODULE_ENABLED - -static const uint32_t hal_adc_input_lookup_pos[] = { - SAADC_CH_PSELP_PSELP_AnalogInput0 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput1 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput2 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput3 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput4 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput5 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput6 << SAADC_CH_PSELP_PSELP_Pos, - SAADC_CH_PSELP_PSELP_AnalogInput7 << SAADC_CH_PSELP_PSELP_Pos -}; - -#define HAL_ADCE_PSELP_NOT_CONNECTED (SAADC_CH_PSELP_PSELP_NC << SAADC_CH_PSELP_PSELP_Pos) -#define HAL_ADCE_PSELP_VDD (SAADC_CH_PSELP_PSELP_VDD << SAADC_CH_PSELP_PSELP_Pos) - -/*static const uint32_t hal_adc_input_lookup_neg[] = { - SAADC_CH_PSELN_PSELN_AnalogInput0 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput1 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput2 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput3 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput4 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput5 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput6 << SAADC_CH_PSELN_PSELN_Pos, - SAADC_CH_PSELN_PSELN_AnalogInput7 << SAADC_CH_PSELN_PSELN_Pos -};*/ - -#define HAL_ADCE_PSELN_NOT_CONNECTED (SAADC_CH_PSELN_PSELN_NC << SAADC_CH_PSELN_PSELN_Pos) -#define HAL_ADCE_PSELN_VDD (SAADC_CH_PSELN_PSELN_VDD << SAADC_CH_PSELN_PSELN_Pos) - -uint16_t hal_adc_channel_value(hal_adc_config_t const * p_adc_conf) { - int16_t result = 0; - - // configure to use VDD/4 and gain 1/4 - ADC_BASE->CH[0].CONFIG = (SAADC_CH_CONFIG_GAIN_Gain1_4 << SAADC_CH_CONFIG_GAIN_Pos) - | (SAADC_CH_CONFIG_MODE_SE << SAADC_CH_CONFIG_MODE_Pos) - | (SAADC_CH_CONFIG_REFSEL_VDD1_4 << SAADC_CH_CONFIG_REFSEL_Pos) - | (SAADC_CH_CONFIG_RESN_Bypass << SAADC_CH_CONFIG_RESN_Pos) - | (SAADC_CH_CONFIG_RESP_Bypass << SAADC_CH_CONFIG_RESP_Pos) - | (SAADC_CH_CONFIG_TACQ_3us << SAADC_CH_CONFIG_TACQ_Pos); - - // positive input - ADC_BASE->CH[0].PSELP = hal_adc_input_lookup_pos[p_adc_conf->channel]; // HAL_ADCE_PSELP_VDD; - ADC_BASE->CH[0].PSELN = HAL_ADCE_PSELN_NOT_CONNECTED; - - ADC_BASE->RESOLUTION = SAADC_RESOLUTION_VAL_8bit << SAADC_RESOLUTION_VAL_Pos; - ADC_BASE->RESULT.MAXCNT = 1; - ADC_BASE->RESULT.PTR = (uint32_t)&result; - ADC_BASE->SAMPLERATE = SAADC_SAMPLERATE_MODE_Task << SAADC_SAMPLERATE_MODE_Pos; - ADC_BASE->ENABLE = SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos; - - // calibrate ADC - ADC_BASE->TASKS_CALIBRATEOFFSET = 1; - while (ADC_BASE->EVENTS_CALIBRATEDONE == 0) { - ; - } - ADC_BASE->EVENTS_CALIBRATEDONE = 0; - while (ADC_BASE->STATUS == (SAADC_STATUS_STATUS_Busy << SAADC_STATUS_STATUS_Pos)) { - ; - } - - // start the ADC - ADC_BASE->TASKS_START = 1; - while (ADC_BASE->EVENTS_STARTED == 0) { - ; - } - ADC_BASE->EVENTS_STARTED = 0; - - // sample ADC - ADC_BASE->TASKS_SAMPLE = 1; - while (ADC_BASE->EVENTS_END == 0) { - ; - } - ADC_BASE->EVENTS_END = 0; - - ADC_BASE->TASKS_STOP = 1; - while (ADC_BASE->EVENTS_STOPPED == 0) { - ; - } - ADC_BASE->EVENTS_STOPPED = 0; - - return result; -} - -uint16_t hal_adc_battery_level(void) { - return 0; -} - -#endif // HAL_ADCE_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_gpio.c b/ports/nrf/hal/hal_gpio.c deleted file mode 100644 index 7cc57af2b9b9b..0000000000000 --- a/ports/nrf/hal/hal_gpio.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "hal_gpio.h" -#include "mphalport.h" -#include "hal_irq.h" - -#define GPIOTE_IRQ_NUM GPIOTE_IRQn -#define GPIOTE_BASE ((NRF_GPIOTE_Type *)NRF_GPIOTE_BASE) -#define HAL_GPIOTE_Type NRF_GPIOTE_Type - -static hal_gpio_event_callback_t m_callback; - -void hal_gpio_register_callback(hal_gpio_event_callback_t cb) { - m_callback = cb; - -#if 0 - hal_gpio_event_config_t config; - config.channel = HAL_GPIO_EVENT_CHANNEL_0; - config.event = HAL_GPIO_POLARITY_EVENT_HIGH_TO_LOW; - config.init_level = 1; - config.pin = 13; - config.port = 0; - - // start LFCLK if not already started - if (NRF_CLOCK->LFCLKSTAT == 0) { - NRF_CLOCK->TASKS_LFCLKSTART = 1; - while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0); - NRF_CLOCK->EVENTS_LFCLKSTARTED = 0; - } - - hal_irq_enable(GPIOTE_IRQ_NUM); - hal_irq_priority(GPIOTE_IRQ_NUM, 3); - - hal_gpio_event_config(&config); -#endif -} - -void hal_gpio_event_config(hal_gpio_event_config_t const * p_config) { -#if 0 - hal_gpio_cfg_pin(p_config->port, p_config->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_UP); - - uint8_t channel = (uint8_t)p_config->channel; - GPIOTE_BASE->CONFIG[channel] = \ - GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos \ - | p_config->pin << GPIOTE_CONFIG_PSEL_Pos \ - | p_config->event \ - | p_config->init_level << GPIOTE_CONFIG_OUTINIT_Pos; - - GPIOTE_BASE->INTENSET = 1 << channel; - GPIOTE_BASE->EVENTS_IN[channel] = 0; -#endif -} - -#if 0 - -void GPIOTE_IRQHandler(void) { - if (GPIOTE_BASE->EVENTS_IN[0]) { - GPIOTE_BASE->EVENTS_IN[0] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_0); - } - if (GPIOTE_BASE->EVENTS_IN[1]) { - GPIOTE_BASE->EVENTS_IN[1] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_1); - } - if (GPIOTE_BASE->EVENTS_IN[2]) { - GPIOTE_BASE->EVENTS_IN[2] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_2); - } - if (GPIOTE_BASE->EVENTS_IN[3]) { - GPIOTE_BASE->EVENTS_IN[3] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_3); - } -#if NRF52 - if (GPIOTE_BASE->EVENTS_IN[4]) { - GPIOTE_BASE->EVENTS_IN[4] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_4); - } - if (GPIOTE_BASE->EVENTS_IN[5]) { - GPIOTE_BASE->EVENTS_IN[5] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_5); - } - if (GPIOTE_BASE->EVENTS_IN[6]) { - GPIOTE_BASE->EVENTS_IN[6] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_6); - } - if (GPIOTE_BASE->EVENTS_IN[7]) { - GPIOTE_BASE->EVENTS_IN[7] = 0; - m_callback(HAL_GPIO_EVENT_CHANNEL_7); - } -#endif -} - -#endif // if 0 diff --git a/ports/nrf/hal/hal_gpio.h b/ports/nrf/hal/hal_gpio.h deleted file mode 100644 index 5a86b25444aa0..0000000000000 --- a/ports/nrf/hal/hal_gpio.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_GPIO_H__ -#define HAL_GPIO_H__ - -#include "nrf.h" - -#if NRF51 - #define POINTERS (const uint32_t[]){NRF_GPIO_BASE} -#endif - -#if NRF52 - #ifdef NRF52832_XXAA - #define POINTERS (const uint32_t[]){NRF_P0_BASE} - #endif - - #ifdef NRF52840_XXAA - #define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE} - #endif -#endif - -#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x]) - -#define hal_gpio_pin_high(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTSET = (1 << (p)->pin) ) -#define hal_gpio_pin_low(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTCLR = (1 << (p)->pin) ) -#define hal_gpio_pin_read(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->IN >> ((p)->pin) & 1) - -typedef enum { - HAL_GPIO_POLARITY_EVENT_LOW_TO_HIGH = GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos, - HAL_GPIO_POLARITY_EVENT_HIGH_TO_LOW = GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos, - HAL_GPIO_POLARITY_EVENT_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos -} hal_gpio_polarity_event_t; - -typedef enum { - HAL_GPIO_PULL_DISABLED = (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos), - HAL_GPIO_PULL_DOWN = (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos), - HAL_GPIO_PULL_UP = (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) -} hal_gpio_pull_t; - -typedef enum { - HAL_GPIO_MODE_OUTPUT = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos), - HAL_GPIO_MODE_INPUT = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos), -} hal_gpio_mode_t; - -static inline void hal_gpio_cfg_pin(uint8_t port, uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) { - GPIO_BASE(port)->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) - | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) - | pull - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) - | mode; -} - -static inline void hal_gpio_dir_set(uint8_t port, uint32_t pin, hal_gpio_mode_t mode) -{ - GPIO_BASE(port)->PIN_CNF[pin] &= ~GPIO_PIN_CNF_DIR_Msk; - GPIO_BASE(port)->PIN_CNF[pin] |= mode; -} - -static inline hal_gpio_mode_t hal_gpio_dir_get(uint8_t port, uint32_t pin) -{ - return GPIO_BASE(port)->PIN_CNF[pin] & GPIO_PIN_CNF_DIR_Msk; -} - -static inline void hal_gpio_pull_set(uint8_t port, uint32_t pin, hal_gpio_pull_t pull) -{ - GPIO_BASE(port)->PIN_CNF[pin] &= ~GPIO_PIN_CNF_PULL_Msk; - GPIO_BASE(port)->PIN_CNF[pin] |= pull; -} - -static inline hal_gpio_pull_t hal_gpio_pull_get(uint8_t port, uint32_t pin) -{ - return GPIO_BASE(port)->PIN_CNF[pin] & GPIO_PIN_CNF_PULL_Msk; -} - -static inline void hal_gpio_out_set(uint8_t port, uint32_t pin_mask) { - GPIO_BASE(port)->OUTSET = pin_mask; -} - -static inline void hal_gpio_out_clear(uint8_t port, uint32_t pin_mask) { - GPIO_BASE(port)->OUTCLR = pin_mask; -} - -static inline void hal_gpio_pin_set(uint8_t port, uint32_t pin) { - GPIO_BASE(port)->OUTSET = (1 << pin); -} - -static inline void hal_gpio_pin_clear(uint8_t port, uint32_t pin) { - GPIO_BASE(port)->OUTCLR = (1 << pin); -} - -static inline void hal_gpio_pin_set_value(uint8_t port, uint32_t pin, uint8_t value) { - if (value) { - hal_gpio_pin_set(port, pin); - }else { - hal_gpio_pin_clear(port, pin); - } -} - -static inline void hal_gpio_pin_toggle(uint8_t port, uint32_t pin) { - uint32_t pin_mask = (1 << pin); - uint32_t pins_state = NRF_GPIO->OUT; - - GPIO_BASE(port)->OUTSET = (~pins_state) & pin_mask; - GPIO_BASE(port)->OUTCLR = pins_state & pin_mask; -} - -typedef enum { - HAL_GPIO_EVENT_CHANNEL_0 = 0, - HAL_GPIO_EVENT_CHANNEL_1, - HAL_GPIO_EVENT_CHANNEL_2, - HAL_GPIO_EVENT_CHANNEL_3, -#if NRF52 - HAL_GPIO_EVENT_CHANNEL_4, - HAL_GPIO_EVENT_CHANNEL_5, - HAL_GPIO_EVENT_CHANNEL_6, - HAL_GPIO_EVENT_CHANNEL_7 -#endif -} hal_gpio_event_channel_t; - -typedef struct { - hal_gpio_event_channel_t channel; - hal_gpio_polarity_event_t event; - uint32_t pin; - uint8_t port; - uint8_t init_level; -} hal_gpio_event_config_t; - -typedef void (*hal_gpio_event_callback_t)(hal_gpio_event_channel_t channel); - -void hal_gpio_register_callback(hal_gpio_event_callback_t cb); - -void hal_gpio_event_config(hal_gpio_event_config_t const * p_config); - -#endif // HAL_GPIO_H__ diff --git a/ports/nrf/hal/hal_irq.h b/ports/nrf/hal/hal_irq.h deleted file mode 100644 index d8e4ddba42441..0000000000000 --- a/ports/nrf/hal/hal_irq.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_IRQ_H__ -#define HAL_IRQ_H__ - -#include - -#include "nrf.h" - -#if BLUETOOTH_SD -#include "py/nlr.h" -#include "ble_drv.h" - -#define BLUETOOTH_STACK_ENABLED() (ble_drv_stack_enabled()) - -#ifdef NRF51 - #include "nrf_soc.h" -#elif defined(NRF52) - #include "nrf_nvic.h" -#endif -#endif // BLUETOOTH_SD - -static inline void hal_irq_clear(uint32_t irq_num) { -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - if (sd_nvic_ClearPendingIRQ(irq_num) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "IRQ (%d) clear error", irq_num)); - } - } else -#endif // BLUETOOTH_SD - { - NVIC_ClearPendingIRQ(irq_num); - } -} - -static inline void hal_irq_enable(uint32_t irq_num) { - hal_irq_clear(irq_num); - -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - if (sd_nvic_EnableIRQ(irq_num) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "IRQ (%d) enable error", irq_num)); - } - } else -#endif // BLUETOOTH_SD - { - NVIC_EnableIRQ(irq_num); - } -} - -static inline void hal_irq_disable(uint32_t irq_num) { -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - if (sd_nvic_DisableIRQ(irq_num) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "IRQ (%d) disable error", irq_num)); - } - } else -#endif // BLUETOOTH_SD - { - NVIC_DisableIRQ(irq_num); - } -} - -static inline void hal_irq_priority(uint32_t irq_num, uint8_t priority) { -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - if (sd_nvic_SetPriority(irq_num, priority) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "IRQ (%d) priority error", irq_num, priority)); - } - } else -#endif // BLUETOOTH_SD - { - NVIC_SetPriority(irq_num, priority); - } -} - -static inline void hal_irq_pending(uint32_t irq_num) { -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - if (sd_nvic_SetPendingIRQ(irq_num) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "IRQ (%d) pending error", irq_num)); - } - } else -#endif // BLUETOOTH_SD - { - NVIC_SetPendingIRQ(irq_num); - } -} - -#endif // HAL_IRQ_H__ diff --git a/ports/nrf/hal/hal_pwm.c b/ports/nrf/hal/hal_pwm.c deleted file mode 100644 index c7ae31a996a6f..0000000000000 --- a/ports/nrf/hal/hal_pwm.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "mphalport.h" -#include "hal_pwm.h" - -#ifdef HAL_PWM_MODULE_ENABLED - -#define PWM_COUNTER_TOP 16000 // 16MHz divided by 16000-> 1ms - -volatile uint16_t g_pwm_seq[4]; -volatile uint16_t g_pwm_period; - -static const uint32_t hal_pwm_frequency_lookup[] = { - PWM_PRESCALER_PRESCALER_DIV_1, // 16MHz - PWM_PRESCALER_PRESCALER_DIV_2, // 8MHz - PWM_PRESCALER_PRESCALER_DIV_4, // 4MHz - PWM_PRESCALER_PRESCALER_DIV_8, // 2MHz - PWM_PRESCALER_PRESCALER_DIV_16, // 1MHz - PWM_PRESCALER_PRESCALER_DIV_32, // 500kHz - PWM_PRESCALER_PRESCALER_DIV_64, // 250kHz - PWM_PRESCALER_PRESCALER_DIV_128 // 125kHz -}; - -void hal_pwm_init(NRF_PWM_Type * p_instance, hal_pwm_init_t const * p_pwm_init) { - g_pwm_period = p_pwm_init->period; - uint16_t pulse_width = ((g_pwm_period * p_pwm_init->duty)/100); - - if (p_pwm_init->pulse_width > 0) { - pulse_width = p_pwm_init->pulse_width; - } - - if (p_pwm_init->mode == HAL_PWM_MODE_HIGH_LOW) { - g_pwm_seq[0] = g_pwm_period - pulse_width; - g_pwm_seq[1] = g_pwm_period - pulse_width; - } else { - g_pwm_seq[0] = pulse_width; - g_pwm_seq[1] = pulse_width; - } - - g_pwm_seq[2] = 0; - g_pwm_seq[3] = 0; - - p_instance->PSEL.OUT[0] = (p_pwm_init->pwm_pin << PWM_PSEL_OUT_PIN_Pos) - | (PWM_PSEL_OUT_CONNECT_Connected << PWM_PSEL_OUT_CONNECT_Pos); - - p_instance->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos); - p_instance->MODE = (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos); - p_instance->PRESCALER = (hal_pwm_frequency_lookup[p_pwm_init->freq] << PWM_PRESCALER_PRESCALER_Pos); - p_instance->COUNTERTOP = (p_pwm_init->period << PWM_COUNTERTOP_COUNTERTOP_Pos); - p_instance->LOOP = (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos); - p_instance->DECODER = (PWM_DECODER_LOAD_Individual << PWM_DECODER_LOAD_Pos) - | (PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos); - p_instance->SEQ[0].PTR = ((uint32_t)(g_pwm_seq) << PWM_SEQ_PTR_PTR_Pos); - p_instance->SEQ[0].CNT = ((sizeof(g_pwm_seq) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos); - - p_instance->SEQ[0].REFRESH = 0; - p_instance->SEQ[0].ENDDELAY = 0; -} - -void hal_pwm_start(NRF_PWM_Type * p_instance) { - p_instance->TASKS_SEQSTART[0] = 1; -} - -void hal_pwm_stop(NRF_PWM_Type * p_instance) { - p_instance->TASKS_SEQSTART[0] = 0; - p_instance->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos); -} - -void hal_pwm_freq_set(NRF_PWM_Type * p_instance, uint16_t freq) { -#if 0 - p_instance->PRESCALER = (hal_pwm_frequency_lookup[freq] << PWM_PRESCALER_PRESCALER_Pos); -#endif -} - -void hal_pwm_period_set(NRF_PWM_Type * p_instance, uint16_t period) { -#if 0 - g_pwm_period = period; - p_instance->COUNTERTOP = (g_pwm_period << PWM_COUNTERTOP_COUNTERTOP_Pos); -#endif -} - -void hal_pwm_duty_set(NRF_PWM_Type * p_instance, uint8_t duty) { -#if 0 - uint16_t duty_cycle = ((g_pwm_period * duty)/100); - - g_pwm_seq[0] = duty_cycle; - g_pwm_seq[1] = duty_cycle; -#endif -} - -#endif // HAL_PWM_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_pwm.h b/ports/nrf/hal/hal_pwm.h deleted file mode 100644 index 49214ed200ce3..0000000000000 --- a/ports/nrf/hal/hal_pwm.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_PWM_H__ -#define HAL_PWM_H__ - -#include - -#include "nrf.h" - -// TODO: nrf51 series need Soft PWM. Not part of HAL. - -#if NRF52 - -#define PWM0 ((NRF_PWM_Type *)NRF_PWM0_BASE) -#define PWM0_IRQ_NUM PWM1_IRQn -#define PWM1 ((NRF_PWM_Type *)NRF_PWM1_BASE) -#define PWM1_IRQ_NUM PWM1_IRQn -#define PWM2 ((NRF_PWM_Type *)NRF_PWM2_BASE) -#define PWM2_IRQ_NUM PWM2_IRQn - -#if 0 // TODO: nrf52840 -#define PWM3 ((NRF_PWM_Type *)NRF_PWM3_BASE) -#define PWM3_IRQ_NUM PWM3_IRQn -#endif - -#else -#error "Device not supported." -#endif - -/** - * @brief PWM frequency type definition - */ -typedef enum { - HAL_PWM_FREQ_16Mhz = 0, - HAL_PWM_FREQ_8Mhz, - HAL_PWM_FREQ_4Mhz, - HAL_PWM_FREQ_2Mhz, - HAL_PWM_FREQ_1Mhz, - HAL_PWM_FREQ_500khz, - HAL_PWM_FREQ_250khz, - HAL_PWM_FREQ_125khz -} hal_pwm_freq_t; - -/** - * @brief PWM mode type definition - */ -typedef enum { - HAL_PWM_MODE_LOW_HIGH = 0, - HAL_PWM_MODE_HIGH_LOW -} hal_pwm_mode_t; - - -typedef struct { - uint8_t pwm_pin; - hal_pwm_freq_t freq; - uint8_t duty; - uint16_t pulse_width; - uint16_t period; - hal_pwm_mode_t mode; -} hal_pwm_init_t; - -/** - * @brief PWM handle Structure definition - */ -typedef struct __PWM_HandleTypeDef -{ - NRF_PWM_Type *instance; /* PWM registers base address */ - hal_pwm_init_t init; /* PWM initialization parameters */ -} PWM_HandleTypeDef; - - -void hal_pwm_init(NRF_PWM_Type * p_instance, hal_pwm_init_t const * p_pwm_init); - -void hal_pwm_freq_set(NRF_PWM_Type * p_instance, uint16_t freq); - -void hal_pwm_period_set(NRF_PWM_Type * p_instance, uint16_t period); - -void hal_pwm_duty_set(NRF_PWM_Type * p_instance, uint8_t duty); - -void hal_pwm_start(NRF_PWM_Type * p_instance); - -void hal_pwm_stop(NRF_PWM_Type * p_instance); - -#endif // HAL_PWM_H__ diff --git a/ports/nrf/hal/hal_qspie.c b/ports/nrf/hal/hal_qspie.c deleted file mode 100644 index 90863b62031fd..0000000000000 --- a/ports/nrf/hal/hal_qspie.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_qspie.h" - -#ifdef HAL_QSPIE_MODULE_ENABLED - -#define QSPI_IRQ_NUM QSPI_IRQn -#define QSPI_BASE ((NRF_QSPI_Type *)NRF_QSPI_BASE) - -// frequency, 32 MHz / (SCKFREQ + 1) -static const uint32_t hal_qspi_frequency_lookup[] = { - (15 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 2 Mbps - (7 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 4 Mbps - (3 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 8 Mbps - (1 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 16 Mbps - (0 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 32 Mbps -}; - -void hal_qspi_master_init(NRF_QSPI_Type * p_instance, hal_qspi_init_t const * p_qspi_init) -{ - // configure SCK - p_instance->PSEL.SCK = (p_qspi_init->clk_pin << QSPI_PSEL_SCK_PIN_Pos) - | (p_qspi_init->clk_pin_port << QSPI_PSEL_SCK_PORT_Pos) - | (QSPI_PSEL_SCK_CONNECT_Connected << QSPI_PSEL_SCK_CONNECT_Pos); - - // configure CS - if (p_qspi_init->use_csn) { - p_instance->PSEL.CSN = (p_qspi_init->clk_pin << QSPI_PSEL_CSN_PIN_Pos) - | (p_qspi_init->clk_pin_port << QSPI_PSEL_CSN_PORT_Pos) - | (QSPI_PSEL_CSN_CONNECT_Connected << QSPI_PSEL_CSN_CONNECT_Pos); - } else { - p_instance->PSEL.CSN = (QSPI_PSEL_CSN_CONNECT_Disconnected << QSPI_PSEL_CSN_CONNECT_Pos); - } - - // configure MOSI/IO0, valid for all configurations - p_instance->PSEL.IO0 = (p_qspi_init->d0_mosi_pin << QSPI_PSEL_IO0_PIN_Pos) - | (p_qspi_init->d0_mosi_pin_port << QSPI_PSEL_IO0_PORT_Pos) - | (QSPI_PSEL_IO0_CONNECT_Connected << QSPI_PSEL_IO0_CONNECT_Pos); - - if (p_qspi_init->data_line != HAL_QSPI_DATA_LINE_SINGLE) { - // configure MISO/IO1 - p_instance->PSEL.IO1 = (p_qspi_init->d1_miso_pin << QSPI_PSEL_IO1_PIN_Pos) - | (p_qspi_init->d1_miso_pin_port << QSPI_PSEL_IO1_PORT_Pos) - | (QSPI_PSEL_IO1_CONNECT_Connected << QSPI_PSEL_IO1_CONNECT_Pos); - - if (p_qspi_init->data_line == HAL_QSPI_DATA_LINE_QUAD) { - // configure IO2 - p_instance->PSEL.IO2 = (p_qspi_init->d2_pin << QSPI_PSEL_IO2_PIN_Pos) - | (p_qspi_init->d2_pin_port << QSPI_PSEL_IO2_PORT_Pos) - | (QSPI_PSEL_IO2_CONNECT_Connected << QSPI_PSEL_IO2_CONNECT_Pos); - - // configure IO3 - p_instance->PSEL.IO3 = (p_qspi_init->d3_pin << QSPI_PSEL_IO3_PIN_Pos) - | (p_qspi_init->d3_pin_port << QSPI_PSEL_IO3_PORT_Pos) - | (QSPI_PSEL_IO3_CONNECT_Connected << QSPI_PSEL_IO3_CONNECT_Pos); - } - } - - uint32_t mode; - switch (p_qspi_init->mode) { - case HAL_SPI_MODE_CPOL0_CPHA0: - mode = (QSPI_IFCONFIG1_SPIMODE_MODE0 << QSPI_IFCONFIG1_SPIMODE_Pos); - break; - case HAL_SPI_MODE_CPOL1_CPHA1: - mode = (QSPI_IFCONFIG1_SPIMODE_MODE3 << QSPI_IFCONFIG1_SPIMODE_Pos); - break; - default: - mode = 0; - break; - } - - // interface config1 - p_instance->IFCONFIG1 = hal_qspi_frequency_lookup[p_qspi_init->freq] - | mode - | (1 << QSPI_IFCONFIG1_SCKDELAY_Pos); // number of 16 MHz periods (62.5 ns) - - p_instance->ENABLE = 1; -} - -void hal_qspi_master_tx_rx(NRF_QSPI_Type * p_instance, - uint16_t transfer_size, - const uint8_t * tx_data, - uint8_t * rx_data) -{ - p_instance->READ.DST = (uint32_t)rx_data; - p_instance->READ.CNT = transfer_size; - p_instance->READ.SRC = (uint32_t)tx_data; - p_instance->READ.CNT = transfer_size; - p_instance->TASKS_ACTIVATE = 1; - while (p_instance->EVENTS_READY == 0) { - ; - } - - p_instance->TASKS_ACTIVATE = 0; -} - -#endif // HAL_QSPIE_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_qspie.h b/ports/nrf/hal/hal_qspie.h deleted file mode 100644 index c964ff43870f4..0000000000000 --- a/ports/nrf/hal/hal_qspie.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_QSPIE_H__ -#define HAL_QSPIE_H__ - -#ifdef HAL_QSPIE_MODULE_ENABLED - -#if NRF52840_XXAA - -#include - -#else -#error "Device not supported." -#endif - -/** - * @brief Quad SPI clock frequency type definition - */ -typedef enum { - HAL_FREQ_2_Mbps, - HAL_FREQ_4_Mbps, - HAL_FREQ_8_Mbps, - HAL_FREQ_16_Mbps, - HAL_FREQ_32_Mbps -} hal_qspi_clk_freq_t; - -/** - * @brief Quad SPI mode type definition - */ -typedef enum { - HAL_SPI_MODE_CPOL0_CPHA0 = 0, // CPOL = 0, CPHA = 0 (data on leading edge) - HAL_SPI_MODE_CPOL1_CPHA1 = 3 // CPOL = 1, CPHA = 1 (data on trailing edge) -} hal_qspi_mode_t; - -/** - * @brief Quad SPI data line configuration type definition - */ -typedef enum { - HAL_QSPI_DATA_LINE_SINGLE, - HAL_QSPI_DATA_LINE_DUAL, - HAL_QSPI_DATA_LINE_QUAD -} hal_qspi_data_line_t; - - - -/** - * @brief Quad SPI Configuration Structure definition - */ -typedef struct { - uint8_t d0_mosi_pin; - uint8_t d1_miso_pin; - uint8_t d2_pin; - uint8_t d3_pin; - uint8_t clk_pin; - uint8_t csn_pin; - uint8_t d0_mosi_pin_port; - uint8_t d1_miso_pin_port; - uint8_t d2_pin_port; - uint8_t d3_pin_port; - uint8_t clk_pin_port; - uint8_t csn_pin_port; - bool use_csn; - hal_qspi_mode_t mode; - hal_qspi_data_line_t data_line; - hal_qspi_clk_freq_t freq; -} hal_qspi_init_t; - -/** - * @brief Quad SPI handle Structure definition - */ -typedef struct __QSPI_HandleTypeDef -{ - NRF_QSPI_Type *instance; /* QSPI registers base address */ - hal_qspi_init_t init; /* QSPI initialization parameters */ -} QSPI_HandleTypeDef; - -void hal_qspi_master_init(NRF_QSPI_Type * p_instance, hal_qspi_init_t const * p_qspi_init); - -void hal_qspi_master_tx_rx(NRF_QSPI_Type * p_instance, - uint16_t transfer_size, - const uint8_t * tx_data, - uint8_t * rx_data); - -#endif // HAL_QSPIE_MODULE_ENABLED - -#endif // HAL_QSPIE_H__ diff --git a/ports/nrf/hal/hal_rng.c b/ports/nrf/hal/hal_rng.c deleted file mode 100644 index 39b6f57896acf..0000000000000 --- a/ports/nrf/hal/hal_rng.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_rng.h" - -#ifdef HAL_RNG_MODULE_ENABLED - -#if BLUETOOTH_SD -#include "py/nlr.h" -#include "ble_drv.h" -#include "nrf_soc.h" - -#define BLUETOOTH_STACK_ENABLED() (ble_drv_stack_enabled()) - -#endif // BLUETOOTH_SD - -uint32_t hal_rng_generate(void) { - - uint32_t retval = 0; - -#if BLUETOOTH_SD - - if (BLUETOOTH_STACK_ENABLED() == 1) { - uint32_t status; - do { - status = sd_rand_application_vector_get((uint8_t *)&retval, 4); // Extract 4 bytes - } while (status != 0); - } else { -#endif - uint8_t * p_retval = (uint8_t *)&retval; - - NRF_RNG->EVENTS_VALRDY = 0; - NRF_RNG->TASKS_START = 1; - - for (uint16_t i = 0; i < 4; i++) { - while (NRF_RNG->EVENTS_VALRDY == 0) { - ; - } - NRF_RNG->EVENTS_VALRDY = 0; - p_retval[i] = NRF_RNG->VALUE; - } - - NRF_RNG->TASKS_STOP = 1; -#if BLUETOOTH_SD - } -#endif - - return retval; -} - -#endif // HAL_RNG_MODULE_ENABLED - diff --git a/ports/nrf/hal/hal_rng.h b/ports/nrf/hal/hal_rng.h deleted file mode 100644 index d09a26eb9e698..0000000000000 --- a/ports/nrf/hal/hal_rng.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_RNG_H__ -#define HAL_RNG_H__ - -#include "nrf.h" - -uint32_t hal_rng_generate(void); - -#endif // HAL_RNG_H__ diff --git a/ports/nrf/hal/hal_rtc.c b/ports/nrf/hal/hal_rtc.c deleted file mode 100644 index ba968f90c0d8f..0000000000000 --- a/ports/nrf/hal/hal_rtc.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_rtc.h" -#include "hal_irq.h" - -#ifdef HAL_RTC_MODULE_ENABLED - -#define HAL_LFCLK_FREQ (32768UL) -#define HAL_RTC_FREQ (10UL) -#define HAL_RTC_COUNTER_PRESCALER ((HAL_LFCLK_FREQ/HAL_RTC_FREQ)-1) - -static hal_rtc_app_callback m_callback; - -static uint32_t m_period[sizeof(RTC_BASE_POINTERS) / sizeof(uint32_t)]; - -void hal_rtc_callback_set(hal_rtc_app_callback callback) { - m_callback = callback; -} - -void hal_rtc_init(hal_rtc_conf_t const * p_rtc_conf) { - NRF_RTC_Type * p_rtc = RTC_BASE(p_rtc_conf->id); - - // start LFCLK if not already started - if (NRF_CLOCK->LFCLKSTAT == 0) { - NRF_CLOCK->TASKS_LFCLKSTART = 1; - while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0); - NRF_CLOCK->EVENTS_LFCLKSTARTED = 0; - } - - m_period[p_rtc_conf->id] = p_rtc_conf->period; - - p_rtc->PRESCALER = HAL_RTC_COUNTER_PRESCALER; - hal_irq_priority(RTC_IRQ_NUM(p_rtc_conf->id), p_rtc_conf->irq_priority); -} - -void hal_rtc_start(uint8_t id) { - NRF_RTC_Type * p_rtc = RTC_BASE(id); - - uint32_t period = HAL_RTC_FREQ * m_period[id]; - uint32_t counter = p_rtc->COUNTER; - - p_rtc->CC[0] = counter + period; - - p_rtc->EVTENSET = RTC_EVTEN_COMPARE0_Msk; - p_rtc->INTENSET = RTC_INTENSET_COMPARE0_Msk; - - hal_irq_clear(RTC_IRQ_NUM(id)); - hal_irq_enable(RTC_IRQ_NUM(id)); - - p_rtc->TASKS_START = 1; -} - -void hal_rtc_stop(uint8_t id) { - NRF_RTC_Type * p_rtc = RTC_BASE(id); - - p_rtc->EVTENCLR = RTC_EVTEN_COMPARE0_Msk; - p_rtc->INTENCLR = RTC_INTENSET_COMPARE0_Msk; - - hal_irq_disable(RTC_IRQ_NUM(id)); - - p_rtc->TASKS_STOP = 1; -} - -static void common_irq_handler(uint8_t id) { - NRF_RTC_Type * p_rtc = RTC_BASE(id); - - // clear all events - p_rtc->EVENTS_COMPARE[0] = 0; - p_rtc->EVENTS_COMPARE[1] = 0; - p_rtc->EVENTS_COMPARE[2] = 0; - p_rtc->EVENTS_COMPARE[3] = 0; - p_rtc->EVENTS_TICK = 0; - p_rtc->EVENTS_OVRFLW = 0; - - m_callback(id); -} - -void RTC0_IRQHandler(void) -{ - common_irq_handler(0); -} - -void RTC1_IRQHandler(void) -{ - common_irq_handler(1); -} - -#if NRF52 - -void RTC2_IRQHandler(void) -{ - common_irq_handler(2); -} - -#endif // NRF52 - -#endif // HAL_RTC_MODULE_ENABLED - diff --git a/ports/nrf/hal/hal_rtc.h b/ports/nrf/hal/hal_rtc.h deleted file mode 100644 index 62bc028b05bb1..0000000000000 --- a/ports/nrf/hal/hal_rtc.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_RTC_H__ -#define HAL_RTC_H__ - -#include "nrf.h" - -#if NRF51 - #define RTC_BASE_POINTERS (const uint32_t[]){NRF_RTC0_BASE, \ - NRF_RTC1_BASE} - #define RTC_IRQ_VALUES (const uint32_t[]){RTC0_IRQn, \ - RTC1_IRQn} -#endif - -#if NRF52 - #define RTC_BASE_POINTERS (const uint32_t[]){NRF_RTC0_BASE, \ - NRF_RTC1_BASE, \ - NRF_RTC2_BASE} - #define RTC_IRQ_VALUES (const uint32_t[]){RTC0_IRQn, \ - RTC1_IRQn, \ - RTC2_IRQn} -#endif - -#define RTC_BASE(x) ((NRF_RTC_Type *)RTC_BASE_POINTERS[x]) -#define RTC_IRQ_NUM(x) (RTC_IRQ_VALUES[x]) - -typedef void (*hal_rtc_app_callback)(uint8_t id); - -/** - * @brief RTC Configuration Structure definition - */ -typedef struct { - uint8_t id; /* RTC instance id */ - uint32_t period; /* RTC period in ms */ - uint32_t irq_priority; /* RTC IRQ priority */ -} hal_rtc_conf_t; - -void hal_rtc_callback_set(hal_rtc_app_callback callback); - -void hal_rtc_init(hal_rtc_conf_t const * p_rtc_config); - -void hal_rtc_start(uint8_t id); - -void hal_rtc_stop(uint8_t id); - -#endif // HAL_RTC_H__ diff --git a/ports/nrf/hal/hal_spi.c b/ports/nrf/hal/hal_spi.c deleted file mode 100644 index 2de203d2377c2..0000000000000 --- a/ports/nrf/hal/hal_spi.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "mphalport.h" -#include "hal_spi.h" - -#ifdef HAL_SPI_MODULE_ENABLED - -static const uint32_t hal_spi_frequency_lookup[] = { - SPI_FREQUENCY_FREQUENCY_K125, // 125 kbps - SPI_FREQUENCY_FREQUENCY_K250, // 250 kbps - SPI_FREQUENCY_FREQUENCY_K500, // 500 kbps - SPI_FREQUENCY_FREQUENCY_M1, // 1 Mbps - SPI_FREQUENCY_FREQUENCY_M2, // 2 Mbps - SPI_FREQUENCY_FREQUENCY_M4, // 4 Mbps - SPI_FREQUENCY_FREQUENCY_M8 // 8 Mbps -}; - -void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init) { - hal_gpio_cfg_pin(p_spi_init->clk_pin->port, p_spi_init->clk_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->mosi_pin->port, p_spi_init->mosi_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->miso_pin->port, p_spi_init->miso_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - -#if NRF51 - p_instance->PSELSCK = p_spi_init->clk_pin->pin; - p_instance->PSELMOSI = p_spi_init->mosi_pin->pin; - p_instance->PSELMISO = p_spi_init->miso_pin->pin; -#else - p_instance->PSEL.SCK = p_spi_init->clk_pin->pin; - p_instance->PSEL.MOSI = p_spi_init->mosi_pin->pin; - p_instance->PSEL.MISO = p_spi_init->miso_pin->pin; - -#if NRF52840_XXAA - p_instance->PSEL.SCK |= (p_spi_init->clk_pin->port << SPI_PSEL_SCK_PORT_Pos); - p_instance->PSEL.MOSI |= (p_spi_init->mosi_pin->port << SPI_PSEL_MOSI_PORT_Pos); - p_instance->PSEL.MISO |= (p_spi_init->miso_pin->port << SPI_PSEL_MISO_PORT_Pos); -#endif - -#endif - - p_instance->FREQUENCY = hal_spi_frequency_lookup[p_spi_init->freq]; - - uint32_t mode; - switch (p_spi_init->mode) { - case HAL_SPI_MODE_CPOL0_CPHA0: - mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL0_CPHA1: - mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL1_CPHA0: - mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL1_CPHA1: - mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); - break; - default: - mode = 0; - break; - } - - if (p_spi_init->firstbit == HAL_SPI_LSB_FIRST) { - p_instance->CONFIG = (mode | (SPI_CONFIG_ORDER_LsbFirst << SPI_CONFIG_ORDER_Pos)); - } else { - p_instance->CONFIG = (mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos)); - } - - p_instance->EVENTS_READY = 0U; - p_instance->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); -} - -void hal_spi_master_tx_rx(NRF_SPI_Type * p_instance, - uint16_t transfer_size, - const uint8_t * tx_data, - uint8_t * rx_data) { - - uint16_t number_of_txd_bytes = 0; - - p_instance->EVENTS_READY = 0; - - while (number_of_txd_bytes < transfer_size) { - p_instance->TXD = (uint32_t)(tx_data[number_of_txd_bytes]); - - // wait for the transaction complete or timeout (about 10ms - 20 ms) - while (p_instance->EVENTS_READY == 0) { - ; - } - - p_instance->EVENTS_READY = 0; - - uint8_t in_byte = (uint8_t)p_instance->RXD; - - if (rx_data != NULL) { - rx_data[number_of_txd_bytes] = in_byte; - } - - number_of_txd_bytes++; - }; -} - -#endif // HAL_SPI_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_spi.h b/ports/nrf/hal/hal_spi.h deleted file mode 100644 index cb01284689952..0000000000000 --- a/ports/nrf/hal/hal_spi.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_SPI_H__ -#define HAL_SPI_H__ - -#include -#include "nrf.h" - -#if NRF51 - #define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, NRF_SPI1_BASE} - #define SPI_IRQ_VALUES (const uint32_t[]){SPI0_TWI0_IRQn, SPI1_TWI1_IRQn} -#endif - -#if NRF52 - #ifdef NRF52832_XXAA - #define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \ - NRF_SPI1_BASE, \ - NRF_SPI2_BASE} - #define SPI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \ - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \ - SPIM2_SPIS2_SPI2_IRQn} - #endif - - #ifdef NRF52840_XXAA - #define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \ - NRF_SPI1_BASE, \ - NRF_SPI2_BASE, \ - NRF_SPIM3_BASE} - #define SPI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \ - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \ - SPIM2_SPIS2_SPI2_IRQn, \ - SPIM3_IRQn} - #endif -#endif - -#define SPI_BASE(x) ((NRF_SPI_Type *)SPI_BASE_POINTERS[x]) -#define SPI_IRQ_NUM(x) (SPI_IRQ_VALUES[x]) - -/** - * @brief SPI clock frequency type definition - */ -typedef enum { - HAL_SPI_FREQ_125_Kbps = 0, - HAL_SPI_FREQ_250_Kbps, - HAL_SPI_FREQ_500_Kbps, - HAL_SPI_FREQ_1_Mbps, - HAL_SPI_FREQ_2_Mbps, - HAL_SPI_FREQ_4_Mbps, - HAL_SPI_FREQ_8_Mbps, -#if NRF52840_XXAA - HAL_SPI_FREQ_16_Mbps, - HAL_SPI_FREQ_32_Mbps -#endif -} hal_spi_clk_freq_t; - -/** - * @brief SPI mode type definition - */ -typedef enum { - HAL_SPI_MODE_CPOL0_CPHA0 = 0, // CPOL = 0, CPHA = 0 (data on leading edge) - HAL_SPI_MODE_CPOL0_CPHA1, // CPOL = 0, CPHA = 1 (data on trailing edge) - HAL_SPI_MODE_CPOL1_CPHA0, // CPOL = 1, CPHA = 0 (data on leading edge) - HAL_SPI_MODE_CPOL1_CPHA1 // CPOL = 1, CPHA = 1 (data on trailing edge) -} hal_spi_mode_t; - -/** - * @brief SPI firstbit mode definition - */ -typedef enum { - HAL_SPI_MSB_FIRST = 0, - HAL_SPI_LSB_FIRST -} hal_spi_firstbit_t; - -/** - * @brief SPI Configuration Structure definition - */ -typedef struct { - const pin_obj_t * mosi_pin; - const pin_obj_t * miso_pin; - const pin_obj_t * clk_pin; - hal_spi_firstbit_t firstbit; - hal_spi_mode_t mode; - uint32_t irq_priority; - hal_spi_clk_freq_t freq; -} hal_spi_init_t; - -/** - * @brief SPI handle Structure definition - */ -typedef struct __SPI_HandleTypeDef -{ - NRF_SPI_Type *instance; /* SPI registers base address */ - hal_spi_init_t init; /* SPI initialization parameters */ -} SPI_HandleTypeDef; - -void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init); - -void hal_spi_master_tx_rx(NRF_SPI_Type * p_instance, - uint16_t transfer_size, - const uint8_t * tx_data, - uint8_t * rx_data); - -#endif // HAL_SPI_H__ diff --git a/ports/nrf/hal/hal_spie.c b/ports/nrf/hal/hal_spie.c deleted file mode 100644 index e2639e45608e7..0000000000000 --- a/ports/nrf/hal/hal_spie.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "mphalport.h" -#include "hal_spi.h" - -#ifdef HAL_SPIE_MODULE_ENABLED - -static const uint32_t hal_spi_frequency_lookup[] = { - SPIM_FREQUENCY_FREQUENCY_K125, // 125 kbps - SPIM_FREQUENCY_FREQUENCY_K250, // 250 kbps - SPIM_FREQUENCY_FREQUENCY_K500, // 500 kbps - SPIM_FREQUENCY_FREQUENCY_M1, // 1 Mbps - SPIM_FREQUENCY_FREQUENCY_M2, // 2 Mbps - SPIM_FREQUENCY_FREQUENCY_M4, // 4 Mbps - SPIM_FREQUENCY_FREQUENCY_M8, // 8 Mbps -#if NRF52840_XXAA - SPIM_FREQUENCY_FREQUENCY_M16, // 16 Mbps - SPIM_FREQUENCY_FREQUENCY_M32, // 32 Mbps -#endif -}; - -void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init) { - // cast to master type - NRF_SPIM_Type * spim_instance = (NRF_SPIM_Type *)p_instance; - - hal_gpio_cfg_pin(p_spi_init->clk_pin->port, p_spi_init->clk_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->mosi_pin->port, p_spi_init->mosi_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->miso_pin->port, p_spi_init->miso_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - - spim_instance->PSEL.SCK = p_spi_init->clk_pin->pin; - spim_instance->PSEL.MOSI = p_spi_init->mosi_pin->pin; - spim_instance->PSEL.MISO = p_spi_init->miso_pin->pin; - -#if NRF52840_XXAA - spim_instance->PSEL.SCK |= (p_spi_init->clk_pin->port << SPIM_PSEL_SCK_PORT_Pos); - spim_instance->PSEL.MOSI |= (p_spi_init->mosi_pin->port << SPIM_PSEL_MOSI_PORT_Pos); - spim_instance->PSEL.MISO |= (p_spi_init->miso_pin->port << SPIM_PSEL_MISO_PORT_Pos); -#endif - - spim_instance->FREQUENCY = hal_spi_frequency_lookup[p_spi_init->freq]; - - uint32_t mode; - switch (p_spi_init->mode) { - case HAL_SPI_MODE_CPOL0_CPHA0: - mode = (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL0_CPHA1: - mode = (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL1_CPHA0: - mode = (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos); - break; - case HAL_SPI_MODE_CPOL1_CPHA1: - mode = (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos) | (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos); - break; - default: - mode = 0; - break; - } - - if (p_spi_init->firstbit == HAL_SPI_LSB_FIRST) { - spim_instance->CONFIG = (mode | (SPIM_CONFIG_ORDER_LsbFirst << SPIM_CONFIG_ORDER_Pos)); - } else { - spim_instance->CONFIG = (mode | (SPIM_CONFIG_ORDER_MsbFirst << SPIM_CONFIG_ORDER_Pos)); - } - - spim_instance->EVENTS_END = 0; - spim_instance->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); -} - -void hal_spi_master_tx_rx(NRF_SPI_Type * p_instance, uint16_t transfer_size, const uint8_t * tx_data, uint8_t * rx_data) { - - // cast to master type - NRF_SPIM_Type * spim_instance = (NRF_SPIM_Type *)p_instance; - - if (tx_data != NULL) { - spim_instance->TXD.PTR = (uint32_t)(tx_data); - spim_instance->TXD.MAXCNT = transfer_size; - } - - if (rx_data != NULL) { - spim_instance->RXD.PTR = (uint32_t)(rx_data); - spim_instance->RXD.MAXCNT = transfer_size; - } - - spim_instance->TASKS_START = 1; - - while(spim_instance->EVENTS_END != 1) { - ; - } - - spim_instance->EVENTS_END = 0; - spim_instance->TASKS_STOP = 1; -} - -#endif // HAL_SPIE_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_temp.c b/ports/nrf/hal/hal_temp.c deleted file mode 100644 index c88814dd1b4d1..0000000000000 --- a/ports/nrf/hal/hal_temp.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Bander F. Ajba - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "mphalport.h" -#include "hal_temp.h" - -#if BLUETOOTH_SD -#include "py/nlr.h" -#include "ble_drv.h" -#include "nrf_soc.h" -#define BLUETOOTH_STACK_ENABLED() (ble_drv_stack_enabled()) -#endif // BLUETOOTH_SD - -#ifdef HAL_TEMP_MODULE_ENABLED - -void hal_temp_init(void) { - // @note Workaround for PAN_028 rev2.0A anomaly 31 - TEMP: Temperature offset value has to be manually loaded to the TEMP module - *(uint32_t *) 0x4000C504 = 0; -} - - - -int32_t hal_temp_read(void) { -#if BLUETOOTH_SD - if (BLUETOOTH_STACK_ENABLED() == 1) { - int32_t temp; - (void)sd_temp_get(&temp); - return temp / 4; // resolution of 0.25 degree celsius - } -#endif // BLUETOOTH_SD - - int32_t volatile temp; - hal_temp_init(); - - NRF_TEMP->TASKS_START = 1; // Start the temperature measurement. - - while (NRF_TEMP->EVENTS_DATARDY == 0) { - // Do nothing. - } - - NRF_TEMP->EVENTS_DATARDY = 0; - - // @note Workaround for PAN_028 rev2.0A anomaly 29 - TEMP: Stop task clears the TEMP register. - temp = (((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP) / 4); - - // @note Workaround for PAN_028 rev2.0A anomaly 30 - TEMP: Temp module analog front end does not power down when DATARDY event occurs. - NRF_TEMP->TASKS_STOP = 1; // Stop the temperature measurement. - return temp; -} - -#endif // HAL_TEMP_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_temp.h b/ports/nrf/hal/hal_temp.h deleted file mode 100644 index b203c944ddd5a..0000000000000 --- a/ports/nrf/hal/hal_temp.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Bander F. Ajba - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_TEMP_H__ -#define HAL_TEMP_H__ - -#include "nrf.h" - -#define MASK_SIGN (0x00000200UL) -#define MASK_SIGN_EXTENSION (0xFFFFFC00UL) - -void hal_temp_init(void); - -int32_t hal_temp_read(void); - -#endif \ No newline at end of file diff --git a/ports/nrf/hal/hal_time.c b/ports/nrf/hal/hal_time.c deleted file mode 100644 index 706bd3a175b9b..0000000000000 --- a/ports/nrf/hal/hal_time.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_time.h" - -#ifdef HAL_TIME_MODULE_ENABLED - -void mp_hal_delay_us(mp_uint_t us) -{ - register uint32_t delay __ASM ("r0") = us; - __ASM volatile ( -#ifdef NRF51 - ".syntax unified\n" -#endif - "1:\n" - " SUBS %0, %0, #1\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" -#ifdef NRF52 - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" -#endif - " BNE 1b\n" -#ifdef NRF51 - ".syntax divided\n" -#endif - : "+r" (delay)); -} - -void mp_hal_delay_ms(mp_uint_t ms) -{ - for (mp_uint_t i = 0; i < ms; i++) - { - mp_hal_delay_us(999); - } -} - -#endif // HAL_TIME_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_time.h b/ports/nrf/hal/hal_time.h deleted file mode 100644 index 20393f918b23a..0000000000000 --- a/ports/nrf/hal/hal_time.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_TIME_H__ -#define HAL_TIME_H__ - -void mp_hal_delay_ms(mp_uint_t ms); - -void mp_hal_delay_us(mp_uint_t us); - -#endif // HAL_TIME_H__ diff --git a/ports/nrf/hal/hal_timer.c b/ports/nrf/hal/hal_timer.c deleted file mode 100644 index 458353c8ca56c..0000000000000 --- a/ports/nrf/hal/hal_timer.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_timer.h" -#include "hal_irq.h" - -#ifdef HAL_TIMER_MODULE_ENABLED - -static hal_timer_app_callback m_callback; - -void hal_timer_callback_set(hal_timer_app_callback callback) { - m_callback = callback; -} - -void hal_timer_init(hal_timer_conf_t const * p_timer_conf) { - NRF_TIMER_Type * p_timer = TIMER_BASE(p_timer_conf->id); - - p_timer->CC[0] = 1000 * p_timer_conf->period; - p_timer->MODE = TIMER_MODE_MODE_Timer; - p_timer->BITMODE = TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos; - p_timer->PRESCALER = 4; // 1 us - p_timer->INTENSET = TIMER_INTENSET_COMPARE0_Msk; - p_timer->SHORTS = (TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos); - p_timer->TASKS_CLEAR = 1; - - hal_irq_priority(TIMER_IRQ_NUM(p_timer_conf->id), p_timer_conf->irq_priority); -} - -void hal_timer_start(uint8_t id) { - NRF_TIMER_Type * p_timer = TIMER_BASE(id); - - p_timer->TASKS_CLEAR = 1; - hal_irq_enable(TIMER_IRQ_NUM(id)); - p_timer->TASKS_START = 1; -} - -void hal_timer_stop(uint8_t id) { - NRF_TIMER_Type * p_timer = TIMER_BASE(id); - - hal_irq_disable(TIMER_IRQ_NUM(id)); - p_timer->TASKS_STOP = 1; -} - -static void common_irq_handler(uint8_t id) { - NRF_TIMER_Type * p_timer = TIMER_BASE(id); - - if (p_timer->EVENTS_COMPARE[0]) { - p_timer->EVENTS_COMPARE[0] = 0; - m_callback(id); - } -} - -void TIMER0_IRQHandler(void) { - common_irq_handler(0); -} - -#if (MICROPY_PY_MACHINE_SOFT_PWM != 1) -void TIMER1_IRQHandler(void) { - common_irq_handler(1); -} -#endif - -void TIMER2_IRQHandler(void) { - common_irq_handler(2); -} - -#if NRF52 - -void TIMER3_IRQHandler(void) { - common_irq_handler(3); -} - -void TIMER4_IRQHandler(void) { - common_irq_handler(4); -} - -#endif - -#endif // HAL_TIMER_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_timer.h b/ports/nrf/hal/hal_timer.h deleted file mode 100644 index 7d109c6d11d60..0000000000000 --- a/ports/nrf/hal/hal_timer.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_TIMER_H__ -#define HAL_TIMER_H__ - -#include "nrf.h" - -#if NRF51 - #define TIMER_BASE_POINTERS (const uint32_t[]){NRF_TIMER0_BASE, \ - NRF_TIMER1_BASE, \ - NRF_TIMER2_BASE} - #define TIMER_IRQ_VALUES (const uint32_t[]){TIMER0_IRQn, \ - TIMER1_IRQn, \ - TIMER2_IRQn} -#endif - -#if NRF52 - #define TIMER_BASE_POINTERS (const uint32_t[]){NRF_TIMER0_BASE, \ - NRF_TIMER1_BASE, \ - NRF_TIMER1_BASE, \ - NRF_TIMER1_BASE, \ - NRF_TIMER2_BASE} - #define TIMER_IRQ_VALUES (const uint32_t[]){TIMER0_IRQn, \ - TIMER1_IRQn, \ - TIMER2_IRQn, \ - TIMER3_IRQn, \ - TIMER4_IRQn} -#endif - -#define TIMER_BASE(x) ((NRF_TIMER_Type *)TIMER_BASE_POINTERS[x]) -#define TIMER_IRQ_NUM(x) (TIMER_IRQ_VALUES[x]) - -typedef void (*hal_timer_app_callback)(uint8_t id); - -/** - * @brief Timer Configuration Structure definition - */ -typedef struct { - uint8_t id; - uint32_t period; - uint8_t irq_priority; -} hal_timer_conf_t; - -void hal_timer_callback_set(hal_timer_app_callback callback); - -void hal_timer_init(hal_timer_conf_t const * p_timer_config); - -void hal_timer_start(uint8_t id); - -void hal_timer_stop(uint8_t id); - -#endif // HAL_TIMER_H__ diff --git a/ports/nrf/hal/hal_twi.c b/ports/nrf/hal/hal_twi.c deleted file mode 100644 index 65d729c94bd6b..0000000000000 --- a/ports/nrf/hal/hal_twi.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_twi.h" - -#ifdef HAL_TWI_MODULE_ENABLED - -static const uint32_t hal_twi_frequency_lookup[] = { - TWI_FREQUENCY_FREQUENCY_K100, // 100 kbps - TWI_FREQUENCY_FREQUENCY_K250, // 250 kbps - TWI_FREQUENCY_FREQUENCY_K400, // 400 kbps -}; - -void hal_twi_master_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init) { - -#if NRF52840_XXAA - p_instance->PSEL.SCL = p_twi_init->scl_pin->pin; - p_instance->PSEL.SDA = p_twi_init->sda_pin->pin; - p_instance->PSEL.SCL |= (p_twi_init->scl_pin->port << TWI_PSEL_SCL_PORT_Pos); - p_instance->PSEL.SDA |= (p_twi_init->sda_pin->port << TWI_PSEL_SDA_PORT_Pos); -#else - p_instance->PSELSCL = p_twi_init->scl_pin->pin; - p_instance->PSELSDA = p_twi_init->sda_pin->pin; -#endif - - p_instance->FREQUENCY = hal_twi_frequency_lookup[p_twi_init->freq]; - p_instance->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos); -} -#include -void hal_twi_master_tx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - const uint8_t * tx_data, - bool stop) { - - uint16_t number_of_txd_bytes = 0; - - p_instance->ADDRESS = addr; - - p_instance->EVENTS_TXDSENT = 0; - - p_instance->TXD = tx_data[number_of_txd_bytes]; - p_instance->TASKS_STARTTX = 1; - - while (number_of_txd_bytes < transfer_size) { - // wait for the transaction complete - while (p_instance->EVENTS_TXDSENT == 0) { - ; - } - - number_of_txd_bytes++; - - // TODO: This could go one byte out of bound. - p_instance->TXD = tx_data[number_of_txd_bytes]; - p_instance->EVENTS_TXDSENT = 0; - } - - - if (stop) { - p_instance->EVENTS_STOPPED = 0; - p_instance->TASKS_STOP = 1; - - while (p_instance->EVENTS_STOPPED == 0) { - ; - } - } -} - -void hal_twi_master_rx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - uint8_t * rx_data, - bool stop) { - - uint16_t number_of_rxd_bytes = 0; - - p_instance->ADDRESS = addr; - - p_instance->EVENTS_RXDREADY = 0; - - p_instance->TASKS_STARTRX = 1; - - while (number_of_rxd_bytes < transfer_size) { - // wait for the transaction complete - while (p_instance->EVENTS_RXDREADY == 0) { - ; - } - - rx_data[number_of_rxd_bytes] = p_instance->RXD; - p_instance->EVENTS_RXDREADY = 0; - - number_of_rxd_bytes++; - } - - if (stop) { - p_instance->EVENTS_STOPPED = 0; - p_instance->TASKS_STOP = 1; - - while (p_instance->EVENTS_STOPPED == 0) { - ; - } - } -} - -void hal_twi_slave_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init) { -} - -#endif // HAL_TWI_MODULE_ENABLED - diff --git a/ports/nrf/hal/hal_twi.h b/ports/nrf/hal/hal_twi.h deleted file mode 100644 index 834c512a08702..0000000000000 --- a/ports/nrf/hal/hal_twi.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_TWI_H__ -#define HAL_TWI_H__ - -#include -#include "nrf.h" - -#define TWI_BASE_POINTERS (const uint32_t[]){NRF_TWI0_BASE, NRF_TWI1_BASE} -#define TWI_BASE(x) ((NRF_TWI_Type *)TWI_BASE_POINTERS[x]) - -#if NRF51 - -#define TWI_IRQ_VALUES (const uint32_t[]){SPI0_TWI0_IRQn, SPI1_TWI1_IRQn} - -#elif NRF52 - -#define TWI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \ - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn} - -#endif - -#if NRF52 - -/** - * @brief TWIM Configuration Structure definition - */ -typedef struct { -} hal_twim_init_t; - -/** - * @brief TWIS Configuration Structure definition - */ -typedef struct { -} hal_twis_init_t; - -#endif - -/** - * @brief TWI clock frequency type definition - */ -typedef enum { - HAL_TWI_FREQ_100_Kbps = 0, - HAL_TWI_FREQ_250_Kbps, - HAL_TWI_FREQ_400_Kbps -} hal_twi_clk_freq_t; - -/** - * @brief TWI role type definition - */ -typedef enum { - HAL_TWI_MASTER, - HAL_TWI_SLAVE -} hal_twi_role_t; - -/** - * @brief TWI Configuration Structure definition - */ -typedef struct { - uint8_t id; /* TWI instance id */ - const pin_obj_t * scl_pin; /* TWI SCL pin */ - const pin_obj_t * sda_pin; /* TWI SDA pin */ - hal_twi_role_t role; /* TWI master/slave */ - hal_twi_clk_freq_t freq; /* TWI frequency */ -} hal_twi_init_t; - -/** - * @brief TWI handle Structure definition - */ -typedef struct __TWI_HandleTypeDef -{ - NRF_TWI_Type *instance; /* TWI register base address */ - hal_twi_init_t init; /* TWI initialization parameters */ -} TWI_HandleTypeDef; - -void hal_twi_master_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init); - -void hal_twi_master_tx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - const uint8_t * tx_data, - bool stop); - -void hal_twi_master_rx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - uint8_t * rx_data, - bool stop); - - -void hal_twi_slave_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init); - - -#endif // HAL_TWI_H__ diff --git a/ports/nrf/hal/hal_twie.c b/ports/nrf/hal/hal_twie.c deleted file mode 100644 index cfa930f1d908d..0000000000000 --- a/ports/nrf/hal/hal_twie.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "mphalport.h" -#include "hal_twi.h" - -#ifdef HAL_TWIE_MODULE_ENABLED - -// EasyDMA variants -#define TWI_MASTER_BASE(x) ((NRF_TWIM_Type *)TWI_BASE_POINTERS[x]) -#define TWI_SLAVE_BASE(x) ((NRF_TWIS_Type *)TWI_BASE_POINTERS[x]) - -static const uint32_t hal_twi_frequency_lookup[] = { - TWIM_FREQUENCY_FREQUENCY_K100, // 100 kbps - TWIM_FREQUENCY_FREQUENCY_K250, // 250 kbps - TWIM_FREQUENCY_FREQUENCY_K400, // 400 kbps -}; - -void hal_twi_master_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init) { - // cast to master type - NRF_TWIM_Type * twim_instance = (NRF_TWIM_Type *)p_instance; - - twim_instance->PSEL.SCL = p_twi_init->scl_pin->pin; - twim_instance->PSEL.SDA = p_twi_init->sda_pin->pin; - -#if NRF52840_XXAA - twim_instance->PSEL.SCL |= (p_twi_init->scl_pin->port << TWIM_PSEL_SCL_PORT_Pos); - twim_instance->PSEL.SDA |= (p_twi_init->sda_pin->port << TWIM_PSEL_SDA_PORT_Pos); -#endif - twim_instance->FREQUENCY = hal_twi_frequency_lookup[p_twi_init->freq]; - twim_instance->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos); -} - -#include - -void hal_twi_master_tx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - const uint8_t * tx_data, - bool stop) { - // cast to master type - NRF_TWIM_Type * twim_instance = (NRF_TWIM_Type *)p_instance; - - twim_instance->ADDRESS = addr; - - printf("Hal I2C transfer size: %u, addr: %x, stop: %u\n", transfer_size, addr, stop); - twim_instance->TXD.MAXCNT = transfer_size; - twim_instance->TXD.PTR = (uint32_t)tx_data; - - if (stop) { - twim_instance->SHORTS = TWIM_SHORTS_LASTTX_STOP_Msk; - } else { - twim_instance->SHORTS = TWIM_SHORTS_LASTTX_SUSPEND_Msk; - } - - if (twim_instance->EVENTS_SUSPENDED == 1) { - printf("Resuming\n"); - twim_instance->EVENTS_SUSPENDED = 0; - twim_instance->EVENTS_STOPPED = 0; - twim_instance->TASKS_RESUME = 1; // in case of resume - } else { - printf("Starting\n"); - twim_instance->EVENTS_SUSPENDED = 0; - twim_instance->EVENTS_STOPPED = 0; - twim_instance->TASKS_STARTTX = 1; - } - - printf("Going into loop\n"); - while (twim_instance->EVENTS_STOPPED == 0 && twim_instance->EVENTS_SUSPENDED == 0) { - ; - } -} - -void hal_twi_master_rx(NRF_TWI_Type * p_instance, - uint8_t addr, - uint16_t transfer_size, - const uint8_t * rx_data) { - // cast to master type - NRF_TWIM_Type * twim_instance = (NRF_TWIM_Type *)p_instance; - - twim_instance->ADDRESS = addr; - -} - -void hal_twi_slave_init(NRF_TWI_Type * p_instance, hal_twi_init_t const * p_twi_init) { - // cast to slave type - NRF_TWIS_Type * twis_instance = (NRF_TWIS_Type *)p_instance; - (void)twis_instance; -} - -#endif // HAL_TWIE_MODULE_ENABLED - diff --git a/ports/nrf/hal/hal_uart.c b/ports/nrf/hal/hal_uart.c deleted file mode 100644 index e8d4230816ae5..0000000000000 --- a/ports/nrf/hal/hal_uart.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "nrf.h" -#include "mphalport.h" -#include "hal_uart.h" -#include "fifo.h" - -#include "lib/utils/interrupt_char.h" - -#ifdef HAL_UART_MODULE_ENABLED - -FIFO_DEF(_ff_uart, 128, uint8_t, true, UARTE0_UART0_IRQn); - -uint32_t hal_uart_baudrate_lookup[] = { - UART_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud. - UART_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud. - UART_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud. - UART_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud. - UART_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud. - UART_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud. - UART_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud. - UART_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud. - UART_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud. - UART_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud. - UART_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud. - UART_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud. - UART_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud. - UART_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud. - UART_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud. - UART_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud. -}; - -hal_uart_error_t hal_uart_char_write(NRF_UART_Type * p_instance, uint8_t ch) { - p_instance->ERRORSRC = 0; - p_instance->TXD = (uint8_t)ch; - while (p_instance->EVENTS_TXDRDY != 1) { - // Blocking wait. - } - - // Clear the TX flag. - p_instance->EVENTS_TXDRDY = 0; - - return p_instance->ERRORSRC; -} - -hal_uart_error_t hal_uart_char_read(NRF_UART_Type * p_instance, uint8_t * ch) { - while ( !fifo_read(_ff_uart, ch) ) { - // wait for fifo data - } - - return HAL_UART_ERROR_NONE; -} - -hal_uart_error_t hal_uart_buffer_write(NRF_UART_Type * p_instance, uint8_t * p_buffer, uint32_t num_of_bytes, uart_complete_cb cb) { - int i = 0; - hal_uart_error_t err = 0; - uint8_t ch = p_buffer[i++]; - while (i < num_of_bytes) { - err = hal_uart_char_write(p_instance, ch); - if (err) { - return err; - } - ch = p_buffer[i++]; - } - cb(); - return err; -} - -hal_uart_error_t hal_uart_buffer_read(NRF_UART_Type * p_instance, uint8_t * p_buffer, uint32_t num_of_bytes, uart_complete_cb cb) { - int i = 0; - hal_uart_error_t err = 0; - while (i < num_of_bytes) { - hal_uart_error_t err = hal_uart_char_read(p_instance, &p_buffer[i]); - if (err) { - return err; - } - i++; - } - cb(); - return err; -} - -int hal_uart_available(NRF_UART_Type * p_instance) -{ - return fifo_count(_ff_uart); -} - -void hal_uart_init(NRF_UART_Type * p_instance, hal_uart_init_t const * p_uart_init) { - hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->rx_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - - hal_gpio_pin_clear(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin); - - p_instance->PSELTXD = p_uart_init->tx_pin->pin; - p_instance->PSELRXD = p_uart_init->rx_pin->pin; - -#if NRF52840_XXAA - p_instance->PSELTXD |= (p_uart_init->tx_pin->port << UARTE_PSEL_TXD_PORT_Pos); - p_instance->PSELRXD |= (p_uart_init->rx_pin->port << UARTE_PSEL_RXD_PORT_Pos); -#endif - - if (p_uart_init->flow_control) { - hal_gpio_cfg_pin(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_uart_init->cts_pin->port, p_uart_init->cts_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - - p_instance->PSELCTS = p_uart_init->cts_pin->pin; - p_instance->PSELRTS = p_uart_init->rts_pin->pin; - -#if NRF52840_XXAA - p_instance->PSELCTS |= (p_uart_init->cts_pin->port << UARTE_PSEL_CTS_PORT_Pos); - p_instance->PSELRTS |= (p_uart_init->rts_pin->port << UARTE_PSEL_RTS_PORT_Pos); -#endif - - p_instance->CONFIG = (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); - } - - p_instance->BAUDRATE = (hal_uart_baudrate_lookup[p_uart_init->baud_rate]); - p_instance->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos); - p_instance->EVENTS_TXDRDY = 0; - p_instance->EVENTS_RXDRDY = 0; - p_instance->TASKS_STARTTX = 1; - p_instance->TASKS_STARTRX = 1; - - // Adafruit IRQ + fifo - fifo_clear(_ff_uart); - p_instance->INTENSET = UART_INTENSET_RXDRDY_Msk; - NVIC_ClearPendingIRQ(p_uart_init->irq_num); - NVIC_SetPriority(p_uart_init->irq_num, p_uart_init->irq_priority); - NVIC_EnableIRQ(p_uart_init->irq_num); -} - - -void UARTE0_UART0_IRQHandler(void) -{ - NRF_UART_Type * p_instance = NRF_UART0; - - if (p_instance->EVENTS_RXDRDY) - { - uint8_t ch = (uint8_t) p_instance->RXD; - - // Keyboard interrupt - if (mp_interrupt_char != -1 && ch == mp_interrupt_char) - { - mp_keyboard_interrupt(); - }else - { - fifo_write(_ff_uart, &ch); - } - - p_instance->EVENTS_RXDRDY = 0x0UL; - } -} - -#endif // HAL_UART_MODULE_ENABLED diff --git a/ports/nrf/hal/hal_uart.h b/ports/nrf/hal/hal_uart.h deleted file mode 100644 index 76c09b335f408..0000000000000 --- a/ports/nrf/hal/hal_uart.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HAL_UART_H__ -#define HAL_UART_H__ - -#include -#include - -#include "nrf.h" - -#if NRF51 - #define UART_HWCONTROL_NONE ((uint32_t)UART_CONFIG_HWFC_Disabled << UART_CONFIG_HWFC_Pos) - #define UART_HWCONTROL_RTS_CTS ((uint32_t)(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos) - #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ - (((CONTROL) == UART_HWCONTROL_NONE) || \ - ((CONTROL) == UART_HWCONTROL_RTS_CTS)) - #define UART_BASE_POINTERS (const uint32_t[]){NRF_UART0_BASE} - #define UART_IRQ_VALUES (const uint32_t[]){UART0_IRQn} - -#elif NRF52 - #define UART_HWCONTROL_NONE ((uint32_t)UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos) - #define UART_HWCONTROL_RTS_CTS ((uint32_t)(UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos) - #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ - (((CONTROL) == UART_HWCONTROL_NONE) || \ - ((CONTROL) == UART_HWCONTROL_RTS_CTS)) - #ifdef HAL_UART_MODULE_ENABLED - #define UART_BASE_POINTERS (const uint32_t[]){NRF_UART0_BASE} - #define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn} - #else // HAL_UARTE_MODULE_ENABLED - #ifdef NRF52832_XXAA - #define UART_BASE_POINTERS (const uint32_t[]){NRF_UARTE0_BASE} - #define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn} - #elif NRF52840_XXAA - #define UART_BASE_POINTERS (const uint32_t[]){NRF_UARTE0_BASE, \ - NRF_UARTE1_BASE} - #define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn, \ - UARTE1_IRQn} - #endif // HAL_UARTE_MODULE_ENABLED - #endif -#else -#error "Device not supported." -#endif - -#define UART_BASE(x) ((NRF_UART_Type *)UART_BASE_POINTERS[x]) -#define UART_IRQ_NUM(x) (UART_IRQ_VALUES[x]) - -typedef enum -{ - HAL_UART_ERROR_NONE = 0x00, /*!< No error */ - HAL_UART_ERROR_ORE = 0x01, /*!< Overrun error. A start bit is received while the previous data still lies in RXD. (Previous data is lost.) */ - HAL_UART_ERROR_PE = 0x02, /*!< Parity error. A character with bad parity is received, if HW parity check is enabled. */ - HAL_UART_ERROR_FE = 0x04, /*!< Frame error. A valid stop bit is not detected on the serial data input after all bits in a character have been received. */ - HAL_UART_ERROR_BE = 0x08, /*!< Break error. The serial data input is '0' for longer than the length of a data frame. (The data frame length is 10 bits without parity bit, and 11 bits with parity bit.). */ -} hal_uart_error_t; - -typedef enum { - HAL_UART_BAUD_1K2 = 0, /**< 1200 baud */ - HAL_UART_BAUD_2K4, /**< 2400 baud */ - HAL_UART_BAUD_4K8, /**< 4800 baud */ - HAL_UART_BAUD_9K6, /**< 9600 baud */ - HAL_UART_BAUD_14K4, /**< 14.4 kbaud */ - HAL_UART_BAUD_19K2, /**< 19.2 kbaud */ - HAL_UART_BAUD_28K8, /**< 28.8 kbaud */ - HAL_UART_BAUD_38K4, /**< 38.4 kbaud */ - HAL_UART_BAUD_57K6, /**< 57.6 kbaud */ - HAL_UART_BAUD_76K8, /**< 76.8 kbaud */ - HAL_UART_BAUD_115K2, /**< 115.2 kbaud */ - HAL_UART_BAUD_230K4, /**< 230.4 kbaud */ - HAL_UART_BAUD_250K0, /**< 250.0 kbaud */ - HAL_UART_BAUD_500K0, /**< 500.0 kbaud */ - HAL_UART_BAUD_1M0 /**< 1 mbaud */ -} hal_uart_baudrate_t; - -typedef struct { - uint8_t id; /* UART instance id */ - const pin_obj_t * rx_pin; /* RX pin. */ - const pin_obj_t * tx_pin; /* TX pin. */ - const pin_obj_t * rts_pin; /* RTS pin, only used if flow control is enabled. */ - const pin_obj_t * cts_pin; /* CTS pin, only used if flow control is enabled. */ - bool flow_control; /* Flow control setting, if flow control is used, the system will use low power UART mode, based on CTS signal. */ - bool use_parity; /* Even parity if TRUE, no parity if FALSE. */ - uint32_t baud_rate; /* Baud rate configuration. */ - uint32_t irq_priority; /* UARTE IRQ priority. */ - uint32_t irq_num; -} hal_uart_init_t; - -typedef struct -{ - NRF_UART_Type * p_instance; /* UART registers base address */ - hal_uart_init_t init; /* UART communication parameters */ -} UART_HandleTypeDef; - -typedef void (*uart_complete_cb)(void); - -void hal_uart_init(NRF_UART_Type * p_instance, hal_uart_init_t const * p_uart_init); - -hal_uart_error_t hal_uart_char_write(NRF_UART_Type * p_instance, uint8_t ch); - -hal_uart_error_t hal_uart_char_read(NRF_UART_Type * p_instance, uint8_t * ch); -int hal_uart_available(NRF_UART_Type * p_instance); - -#endif // HAL_UART_H__ diff --git a/ports/nrf/hal/hal_uarte.c b/ports/nrf/hal/hal_uarte.c deleted file mode 100644 index d3e899b91d22f..0000000000000 --- a/ports/nrf/hal/hal_uarte.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "mphalport.h" - -#include "hal_uart.h" -#include "hal_irq.h" - -#ifdef HAL_UARTE_MODULE_ENABLED - -#include "nrf.h" - -#ifndef NRF52 -#error "Device not supported." -#endif - -#define UART_BASE(x) ((NRF_UART_Type *)UART_BASE_POINTERS[x]) -#define UART_IRQ_NUM(x) (UART_IRQ_VALUES[x]) - -#define TX_BUF_SIZE 1 -#define RX_BUF_SIZE 1 - -static const uint32_t hal_uart_baudrate_lookup[] = { - UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud. - UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud. - UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud. - UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud. - UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud. - UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud. - UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud. - UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud. - UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud. - UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud. - UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud. - UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud. - UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud. - UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud. - UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud. - UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud. -}; - -void nrf_sendchar(NRF_UART_Type * p_instance, int ch) { - hal_uart_char_write(p_instance, ch); -} - -void hal_uart_init(NRF_UART_Type * p_instance, hal_uart_init_t const * p_uart_init) { - - NRF_UARTE_Type * uarte_instance = (NRF_UARTE_Type *)p_instance; - - hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_pin_set(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin); - hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->rx_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - - uarte_instance->BAUDRATE = (hal_uart_baudrate_lookup[p_uart_init->baud_rate]); - - uint32_t hwfc = (p_uart_init->flow_control) - ? (UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos) - : (UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos); - - uint32_t parity = (p_uart_init->use_parity) - ? (UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos) - : (UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos); - - uarte_instance->CONFIG = (uint32_t)hwfc | (uint32_t)parity; - - uarte_instance->PSEL.RXD = p_uart_init->rx_pin->pin; - uarte_instance->PSEL.TXD = p_uart_init->tx_pin->pin; - -#if NRF52840_XXAA - uarte_instance->PSEL.RXD |= (p_uart_init->rx_pin->port << UARTE_PSEL_RXD_PORT_Pos); - uarte_instance->PSEL.TXD |= (p_uart_init->tx_pin->port << UARTE_PSEL_TXD_PORT_Pos); -#endif - - if (hwfc) { - hal_gpio_cfg_pin(p_uart_init->cts_pin->port, p_uart_init->cts_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_pin_set(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin); - - uarte_instance->PSEL.RTS = p_uart_init->rts_pin->pin; - uarte_instance->PSEL.CTS = p_uart_init->cts_pin->pin; - -#if NRF52840_XXAA - uarte_instance->PSEL.RTS |= (p_uart_init->rx_pin->port << UARTE_PSEL_RTS_PORT_Pos); - uarte_instance->PSEL.CTS |= (p_uart_init->rx_pin->port << UARTE_PSEL_CTS_PORT_Pos); -#endif - } - - hal_irq_priority(p_uart_init->irq_num, p_uart_init->irq_priority); - hal_irq_enable(p_uart_init->irq_num); - - uarte_instance->INTENSET = (UARTE_INTENSET_ENDRX_Set << UARTE_INTENSET_ENDRX_Pos); - uarte_instance->INTENSET = (UARTE_INTENSET_ENDTX_Set << UARTE_INTENSET_ENDTX_Pos); - - uarte_instance->ENABLE = (UARTE_ENABLE_ENABLE_Enabled << UARTE_ENABLE_ENABLE_Pos); - - uarte_instance->EVENTS_ENDTX = 0; - uarte_instance->EVENTS_ENDRX = 0; -} - -hal_uart_error_t hal_uart_char_write(NRF_UART_Type * p_instance, uint8_t ch) { - - NRF_UARTE_Type * uarte_instance = (NRF_UARTE_Type *)p_instance; - - uarte_instance->ERRORSRC = 0; - - - static volatile uint8_t m_tx_buf[TX_BUF_SIZE]; - (void)m_tx_buf; - - uarte_instance->INTENCLR = (UARTE_INTENSET_ENDTX_Set << UARTE_INTENSET_ENDTX_Pos); - - m_tx_buf[0] = ch; - - uarte_instance->TXD.PTR = (uint32_t)((uint8_t *)m_tx_buf); - uarte_instance->TXD.MAXCNT = (uint32_t)sizeof(m_tx_buf); - - uarte_instance->TASKS_STARTTX = 1; - - while((0 == uarte_instance->EVENTS_ENDTX)); - - uarte_instance->EVENTS_ENDTX = 0; - uarte_instance->TASKS_STOPTX = 1; - - uarte_instance->INTENSET = (UARTE_INTENSET_ENDTX_Set << UARTE_INTENSET_ENDTX_Pos); - - return uarte_instance->ERRORSRC; -} - -hal_uart_error_t hal_uart_char_read(NRF_UART_Type * p_instance, uint8_t * ch) { - - NRF_UARTE_Type * uarte_instance = (NRF_UARTE_Type *)p_instance; - - uarte_instance->ERRORSRC = 0; - - static volatile uint8_t m_rx_buf[RX_BUF_SIZE]; - - uarte_instance->INTENCLR = (UARTE_INTENSET_ENDRX_Set << UARTE_INTENSET_ENDRX_Pos); - - uarte_instance->RXD.PTR = (uint32_t)((uint8_t *)m_rx_buf); - uarte_instance->RXD.MAXCNT = (uint32_t)sizeof(m_rx_buf); - - uarte_instance->TASKS_STARTRX = 1; - - while ((0 == uarte_instance->EVENTS_ENDRX)); - - uarte_instance->EVENTS_ENDRX = 0; - uarte_instance->TASKS_STOPRX = 1; - - uarte_instance->INTENSET = (UARTE_INTENSET_ENDRX_Set << UARTE_INTENSET_ENDRX_Pos); - *ch = (uint8_t)m_rx_buf[0]; - - return uarte_instance->ERRORSRC; -} - -#endif // HAL_UARTE_MODULE_ENABLED diff --git a/ports/nrf/hal/nrf52_hal.h b/ports/nrf/hal/nrf52_hal.h deleted file mode 100644 index daa05e9101da8..0000000000000 --- a/ports/nrf/hal/nrf52_hal.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -// include config from board -#include "nrf52_hal_conf.h" diff --git a/ports/nrf/help.c b/ports/nrf/help.c deleted file mode 100644 index 5cbb0fc911f51..0000000000000 --- a/ports/nrf/help.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -#if BLUETOOTH_SD -#include "help_sd.h" -#endif - -const char nrf5_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online help please visit http://micropython.org/help/.\n" -"\n" -"Quick overview of commands for the board:\n" -#if MICROPY_HW_HAS_LED -" pyb.LED(n) -- create an LED object for LED n (n=" HELP_TEXT_BOARD_LED ")\n" -"\n" -#endif -#if BLUETOOTH_SD -HELP_TEXT_SD -#endif -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/nrf/internal_flash.c b/ports/nrf/internal_flash.c deleted file mode 100644 index 2f069a2f9579d..0000000000000 --- a/ports/nrf/internal_flash.c +++ /dev/null @@ -1,243 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "internal_flash.h" - -#include -#include - -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "py/mphal.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "supervisor/shared/rgb_led_status.h" - -#include "nrf.h" - -#ifdef BLUETOOTH_SD -#include "nrf_sdm.h" -#endif - -// defined in linker -extern uint32_t __fatfs_flash_start_addr[]; -extern uint32_t __fatfs_flash_length[]; - -void internal_flash_init(void) { - // Activity LED for flash writes. - #ifdef MICROPY_HW_LED_MSC - struct port_config pin_conf; - port_get_config_defaults(&pin_conf); - - pin_conf.direction = PORT_PIN_DIR_OUTPUT; - port_pin_set_config(MICROPY_HW_LED_MSC, &pin_conf); - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); - #endif -// flash_init(&internal_flash_desc, NVMCTRL); -} - -uint32_t internal_flash_get_block_size(void) { - return FILESYSTEM_BLOCK_SIZE; -} - -uint32_t internal_flash_get_block_count(void) { - return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE ; -} - -void internal_flash_flush(void) { -} - -void flash_flush(void) { - internal_flash_flush(); -} - -static uint32_t convert_block_to_flash_addr(uint32_t block) { - return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE; -} - -bool internal_flash_write_block(const uint8_t *src, uint32_t block) { - uint8_t sd_en = 0; - -#ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, true); -#endif - temp_status_color(ACTIVE_WRITE); - // non-MBR block, copy to cache - - uint32_t dest = convert_block_to_flash_addr(block); - - uint32_t pagenum = dest / FLASH_PAGE_SIZE; - uint32_t* flash_align = (uint32_t*) (pagenum*FLASH_PAGE_SIZE); - - // Read back current page to update only 512 portion - __ALIGN(4) uint8_t buf[FLASH_PAGE_SIZE]; - memcpy(buf, flash_align, FLASH_PAGE_SIZE); - memcpy(buf + (dest%FLASH_PAGE_SIZE), src, FILESYSTEM_BLOCK_SIZE); - -#ifdef BLUETOOTH_SD - (void) sd_softdevice_is_enabled(&sd_en); - - if (sd_en) { - if (NRF_SUCCESS != sd_flash_page_erase(pagenum)) { - return false; - } - - if (NRF_SUCCESS != sd_flash_write(flash_align, (uint32_t*) buf, FLASH_PAGE_SIZE / sizeof(uint32_t))) { - return false; - } - } -#endif - - if (!sd_en) { - // Erase - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - NRF_NVMC->ERASEPAGE = dest; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - // Write - uint32_t *p_src = (uint32_t*) buf; - uint32_t *p_dest = flash_align; - uint32_t i = 0; - - while (i < (FLASH_PAGE_SIZE / sizeof(uint32_t))) { - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - *p_dest++ = *p_src++; - - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy); - - ++i; - } - } - - clear_temp_status(); -#ifdef MICROPY_HW_LED_MSC - port_pin_set_output_level(MICROPY_HW_LED_MSC, false); -#endif - return true; -} - -mp_uint_t internal_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { - uint32_t src = convert_block_to_flash_addr(block); - memcpy(dest, (uint8_t*) src, FILESYSTEM_BLOCK_SIZE*num_blocks); - return 0; // success -} - -mp_uint_t internal_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!internal_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the flash as an object with the block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t internal_flash_obj = {&internal_flash_type}; - -STATIC mp_obj_t internal_flash_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&internal_flash_obj; -} - -STATIC mp_obj_t internal_flash_obj_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = internal_flash_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_readblocks_obj, internal_flash_obj_readblocks); - -STATIC mp_obj_t internal_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = internal_flash_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_writeblocks_obj, internal_flash_obj_writeblocks); - -STATIC mp_obj_t internal_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: internal_flash_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: internal_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: internal_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(internal_flash_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(internal_flash_get_block_size()); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(internal_flash_obj_ioctl_obj, internal_flash_obj_ioctl); - -STATIC const mp_rom_map_elem_t internal_flash_obj_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&internal_flash_obj_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&internal_flash_obj_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&internal_flash_obj_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(internal_flash_obj_locals_dict, internal_flash_obj_locals_dict_table); - -const mp_obj_type_t internal_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_InternalFlash, - .make_new = internal_flash_obj_make_new, - .locals_dict = (mp_obj_t)&internal_flash_obj_locals_dict, -}; - -void flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - -// vfs->fatfs.part = 1; // flash filesystem lives on first partition - vfs->readblocks[0] = (mp_obj_t)&internal_flash_obj_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&internal_flash_obj; - vfs->readblocks[2] = (mp_obj_t)internal_flash_read_blocks; // native version - - vfs->writeblocks[0] = (mp_obj_t)&internal_flash_obj_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&internal_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)internal_flash_write_blocks; // native version - - vfs->u.ioctl[0] = (mp_obj_t)&internal_flash_obj_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&internal_flash_obj; -} diff --git a/ports/nrf/internal_flash.h b/ports/nrf/internal_flash.h deleted file mode 100644 index 79b786555f27c..0000000000000 --- a/ports/nrf/internal_flash.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H -#define MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H - -#include -#include - -#include "mpconfigport.h" - -#define FLASH_ROOT_POINTERS - -#define FLASH_PAGE_SIZE 0x1000 -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 - -#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) - -void internal_flash_init(void); -uint32_t internal_flash_get_block_size(void); -uint32_t internal_flash_get_block_count(void); -void internal_flash_irq_handler(void); -void internal_flash_flush(void); -bool internal_flash_read_block(uint8_t *dest, uint32_t block); -bool internal_flash_write_block(const uint8_t *src, uint32_t block); - -// these return 0 on success, non-zero on error -mp_uint_t internal_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t internal_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t internal_flash_type; - -struct _fs_user_mount_t; - -void flash_init_vfs(struct _fs_user_mount_t *vfs); -void flash_flush(void); - -#endif // MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H diff --git a/ports/nrf/ld_defines.c b/ports/nrf/ld_defines.c new file mode 100644 index 0000000000000..ebe9c4929e557 --- /dev/null +++ b/ports/nrf/ld_defines.c @@ -0,0 +1,42 @@ +// Fake source file used only to capture #define values for use in ld template files. +#include "mpconfigport.h" + +// For each value needed in the LD file, create a C-like line: +// /*NAME_OF_VALUE=*/ NAME_OF_VALUE; +// The C preprocessor will replace NAME_OF_VALUE with the actual value. +// This will be post-processed by tools/gen_ld_files.py to extract the name and value. + +// The next line is a marker to start looking for definitions. Lines above the next line are ignored. +// START_LD_DEFINES + +/*MBR_START_ADDR=*/ MBR_START_ADDR; +/*MBR_SIZE=*/ MBR_SIZE; + +/*SD_FLASH_START_ADDR=*/ SD_FLASH_START_ADDR; +/*SD_FLASH_SIZE=*/ SD_FLASH_SIZE; + +/*ISR_START_ADDR=*/ ISR_START_ADDR; +/*ISR_SIZE=*/ ISR_SIZE; + +/*CIRCUITPY_DEFAULT_STACK_SIZE=*/ CIRCUITPY_DEFAULT_STACK_SIZE; + +/*CIRCUITPY_FIRMWARE_START_ADDR=*/ CIRCUITPY_FIRMWARE_START_ADDR; +/*CIRCUITPY_FIRMWARE_SIZE=*/ CIRCUITPY_FIRMWARE_SIZE; + +/*CIRCUITPY_BLE_CONFIG_START_ADDR=*/ CIRCUITPY_BLE_CONFIG_START_ADDR; +/*CIRCUITPY_BLE_CONFIG_SIZE=*/ CIRCUITPY_BLE_CONFIG_SIZE; + +/*CIRCUITPY_INTERNAL_NVM_START_ADDR=*/ CIRCUITPY_INTERNAL_NVM_START_ADDR; +/*CIRCUITPY_INTERNAL_NVM_SIZE=*/ CIRCUITPY_INTERNAL_NVM_SIZE; + +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR; +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE; + +/*BOOTLOADER_START_ADDR=*/ BOOTLOADER_START_ADDR; +/*BOOTLOADER_SIZE=*/ BOOTLOADER_SIZE; + +/*BOOTLOADER_SETTINGS_START_ADDR=*/ BOOTLOADER_SETTINGS_START_ADDR; +/*BOOTLOADER_SETTINGS_SIZE=*/ BOOTLOADER_SETTINGS_SIZE; + +/*SOFTDEVICE_RAM_SIZE=*/ SOFTDEVICE_RAM_SIZE; +/*SPIM3_BUFFER_SIZE=*/ SPIM3_BUFFER_SIZE; diff --git a/ports/nrf/modules/ble/help_sd.h b/ports/nrf/modules/ble/help_sd.h deleted file mode 100644 index 027bbdd513489..0000000000000 --- a/ports/nrf/modules/ble/help_sd.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HELP_SD_H__ -#define HELP_SD_H__ - -#include "bluetooth_conf.h" - -#if MICROPY_PY_BLE - -#define HELP_TEXT_SD \ -"If compiled with SD= the additional commands are\n" \ -"available:\n" \ -" ble.enable() -- enable bluetooth stack\n" \ -" ble.disable() -- disable bluetooth stack\n" \ -" ble.enabled() -- check whether bluetooth stack is enabled\n" \ -" ble.address() -- return device address as text string\n" \ -"\n" - -#else -#define HELP_TEXT_SD -#endif // MICROPY_PY_BLE - -#endif diff --git a/ports/nrf/modules/ble/modble.c b/ports/nrf/modules/ble/modble.c deleted file mode 100644 index e025006b17acd..0000000000000 --- a/ports/nrf/modules/ble/modble.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "py/runtime.h" - -#if MICROPY_PY_BLE - -#include "led.h" -#include "mpconfigboard.h" -#include "ble_drv.h" - -/// \method enable() -/// Enable BLE softdevice. -mp_obj_t ble_obj_enable(void) { - printf("SoftDevice enabled\n"); - uint32_t err_code = ble_drv_stack_enable(); - if (err_code < 0) { - // TODO: raise exception. - } - return mp_const_none; -} - -/// \method disable() -/// Disable BLE softdevice. -mp_obj_t ble_obj_disable(void) { - ble_drv_stack_disable(); - return mp_const_none; -} - -/// \method enabled() -/// Get state of whether the softdevice is enabled or not. -mp_obj_t ble_obj_enabled(void) { - uint8_t is_enabled = ble_drv_stack_enabled(); - mp_int_t enabled = is_enabled; - return MP_OBJ_NEW_SMALL_INT(enabled); -} - -/// \method address() -/// Return device address as text string. -mp_obj_t ble_obj_address(void) { - ble_drv_addr_t local_addr; - ble_drv_address_get(&local_addr); - - vstr_t vstr; - vstr_init(&vstr, 17); - - vstr_printf(&vstr, ""HEX2_FMT":"HEX2_FMT":"HEX2_FMT":" \ - HEX2_FMT":"HEX2_FMT":"HEX2_FMT"", - local_addr.addr[5], local_addr.addr[4], local_addr.addr[3], - local_addr.addr[2], local_addr.addr[1], local_addr.addr[0]); - - mp_obj_t mac_str = mp_obj_new_str(vstr.buf, vstr.len, false); - - vstr_clear(&vstr); - - return mac_str; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_0(ble_obj_enable_obj, ble_obj_enable); -STATIC MP_DEFINE_CONST_FUN_OBJ_0(ble_obj_disable_obj, ble_obj_disable); -STATIC MP_DEFINE_CONST_FUN_OBJ_0(ble_obj_enabled_obj, ble_obj_enabled); -STATIC MP_DEFINE_CONST_FUN_OBJ_0(ble_obj_address_obj, ble_obj_address); - -STATIC const mp_rom_map_elem_t ble_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ble) }, - { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&ble_obj_enable_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&ble_obj_disable_obj) }, - { MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&ble_obj_enabled_obj) }, - { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&ble_obj_address_obj) }, -}; - - -STATIC MP_DEFINE_CONST_DICT(ble_module_globals, ble_module_globals_table); - -const mp_obj_module_t ble_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&ble_module_globals, -}; - -#endif // MICROPY_PY_BLE diff --git a/ports/nrf/modules/machine/adc.c b/ports/nrf/modules/machine/adc.c deleted file mode 100644 index 61cb6f7b490a9..0000000000000 --- a/ports/nrf/modules/machine/adc.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "adc.h" -#include "hal_adc.h" - -#if MICROPY_PY_MACHINE_ADC - -typedef struct _machine_adc_obj_t { - mp_obj_base_t base; - ADC_HandleTypeDef *adc; -} machine_adc_obj_t; - -ADC_HandleTypeDef ADCHandle0 = {.config.channel = 0}; -ADC_HandleTypeDef ADCHandle1 = {.config.channel = 1}; -ADC_HandleTypeDef ADCHandle2 = {.config.channel = 2}; -ADC_HandleTypeDef ADCHandle3 = {.config.channel = 3}; -ADC_HandleTypeDef ADCHandle4 = {.config.channel = 4}; -ADC_HandleTypeDef ADCHandle5 = {.config.channel = 5}; -ADC_HandleTypeDef ADCHandle6 = {.config.channel = 6}; -ADC_HandleTypeDef ADCHandle7 = {.config.channel = 7}; - -STATIC const machine_adc_obj_t machine_adc_obj[] = { - {{&machine_adc_type}, &ADCHandle0}, - {{&machine_adc_type}, &ADCHandle1}, - {{&machine_adc_type}, &ADCHandle2}, - {{&machine_adc_type}, &ADCHandle3}, - {{&machine_adc_type}, &ADCHandle4}, - {{&machine_adc_type}, &ADCHandle5}, - {{&machine_adc_type}, &ADCHandle6}, - {{&machine_adc_type}, &ADCHandle7}, -}; - -STATIC int adc_find(mp_obj_t id) { - // given an integer id - int adc_id = mp_obj_get_int(id); - - int adc_idx = adc_id; - - if (adc_idx >= 0 && adc_idx <= MP_ARRAY_SIZE(machine_adc_obj) - && machine_adc_obj[adc_idx].adc != NULL) { - return adc_idx; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "ADC(%d) does not exist", adc_id)); -} - - -/// \method __str__() -/// Return a string describing the ADC object. -STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - machine_adc_obj_t *self = o; - - (void)self; - - mp_printf(print, "ADC()"); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -// for make_new -enum { - ARG_NEW_PIN, -}; - -STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { ARG_NEW_PIN, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1) } }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - int adc_id = adc_find(args[ARG_NEW_PIN].u_obj); - const machine_adc_obj_t *self = &machine_adc_obj[adc_id]; - - return MP_OBJ_FROM_PTR(self); -} - -/// \method value() -/// Read adc level. -mp_obj_t machine_adc_value(mp_obj_t self_in) { - machine_adc_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(hal_adc_channel_value(&self->adc->config)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_machine_adc_value_obj, machine_adc_value); - -/// \method battery_level() -/// Get battery level in percentage. -mp_obj_t machine_adc_battery_level(void) { - return MP_OBJ_NEW_SMALL_INT(hal_adc_battery_level()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mp_machine_adc_battery_level_obj, machine_adc_battery_level); - -STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&mp_machine_adc_value_obj) }, - - // class methods - { MP_ROM_QSTR(MP_QSTR_battery_level), MP_ROM_PTR(&mp_machine_adc_battery_level_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table); - -const mp_obj_type_t machine_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .make_new = machine_adc_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_adc_locals_dict, - .print = machine_adc_print, -}; - -#endif // MICROPY_PY_MACHINE_ADC diff --git a/ports/nrf/modules/machine/adc.h b/ports/nrf/modules/machine/adc.h deleted file mode 100644 index a8ff56fbba0ee..0000000000000 --- a/ports/nrf/modules/machine/adc.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef ADC_H__ -#define ADC_H__ - -#include "hal_adc.h" - -extern const mp_obj_type_t machine_adc_type; - -#endif // ADC_H__ diff --git a/ports/nrf/modules/machine/i2c.c b/ports/nrf/modules/machine/i2c.c deleted file mode 100644 index 943599816e595..0000000000000 --- a/ports/nrf/modules/machine/i2c.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_i2c.h" -#include "i2c.h" -#include "hal_twi.h" - -#if MICROPY_PY_MACHINE_I2C - -STATIC const mp_obj_type_t machine_hard_i2c_type; - -typedef struct _machine_hard_i2c_obj_t { - mp_obj_base_t base; - TWI_HandleTypeDef *i2c; -} machine_hard_i2c_obj_t; - -TWI_HandleTypeDef I2CHandle0 = {.instance = NULL, .init.id = 0}; -TWI_HandleTypeDef I2CHandle1 = {.instance = NULL, .init.id = 1}; - -STATIC const machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - {{&machine_hard_i2c_type}, &I2CHandle0}, - {{&machine_hard_i2c_type}, &I2CHandle1}, -}; - -void i2c_init0(void) { - // reset the I2C handles - memset(&I2CHandle0, 0, sizeof(TWI_HandleTypeDef)); - I2CHandle0.instance = TWI_BASE(0); - memset(&I2CHandle1, 0, sizeof(TWI_HandleTypeDef)); - I2CHandle0.instance = TWI_BASE(1); -} - -STATIC int i2c_find(mp_obj_t id) { - // given an integer id - int i2c_id = mp_obj_get_int(id); - if (i2c_id >= 0 && i2c_id <= MP_ARRAY_SIZE(machine_hard_i2c_obj) - && machine_hard_i2c_obj[i2c_id].i2c != NULL) { - return i2c_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%d) does not exist", i2c_id)); -} - -STATIC void machine_hard_i2c_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - machine_hard_i2c_obj_t *self = o; - mp_printf(print, "I2C(%u, scl=(port=%u, pin=%u), sda=(port=%u, pin=%u))", - self->i2c->init.id, - self->i2c->init.scl_pin->port, - self->i2c->init.scl_pin->pin, - self->i2c->init.sda_pin->port, - self->i2c->init.sda_pin->pin); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -// for make_new -enum { - ARG_NEW_id, - ARG_NEW_scl, - ARG_NEW_sda, - ARG_NEW_freq, - ARG_NEW_timeout, -}; - -mp_obj_t machine_hard_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { ARG_NEW_id, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { ARG_NEW_scl, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { ARG_NEW_sda, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int i2c_id = i2c_find(args[ARG_NEW_id].u_obj); - const machine_hard_i2c_obj_t *self = &machine_hard_i2c_obj[i2c_id]; - - if (args[ARG_NEW_scl].u_obj != MP_OBJ_NULL) { - self->i2c->init.scl_pin = args[ARG_NEW_scl].u_obj; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C SCL Pin not set")); - } - - if (args[ARG_NEW_sda].u_obj != MP_OBJ_NULL) { - self->i2c->init.sda_pin = args[ARG_NEW_sda].u_obj; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C SDA Pin not set")); - } - - self->i2c->init.freq = HAL_TWI_FREQ_100_Kbps; - - hal_twi_master_init(self->i2c->instance, &self->i2c->init); - - return MP_OBJ_FROM_PTR(self); -} - -#include - -int machine_hard_i2c_readfrom(mp_obj_base_t *self_in, uint16_t addr, uint8_t *dest, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t *)self_in; - - hal_twi_master_rx(self->i2c->instance, addr, len, dest, stop); - - return 0; -} - -int machine_hard_i2c_writeto(mp_obj_base_t *self_in, uint16_t addr, const uint8_t *src, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t *)self_in; - - hal_twi_master_tx(self->i2c->instance, addr, len, src, stop); - - return 0; -} - -STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { - .readfrom = machine_hard_i2c_readfrom, - .writeto = machine_hard_i2c_writeto, -}; - -STATIC const mp_obj_type_t machine_hard_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = machine_hard_i2c_print, - .make_new = machine_hard_i2c_make_new, - .protocol = &machine_hard_i2c_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_soft_i2c_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_I2C diff --git a/ports/nrf/modules/machine/i2c.h b/ports/nrf/modules/machine/i2c.h deleted file mode 100644 index cd8d4507c39d1..0000000000000 --- a/ports/nrf/modules/machine/i2c.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef I2C_H__ -#define I2C_H__ - -#include "hal_twi.h" - -extern const mp_obj_type_t machine_i2c_type; - -void i2c_init0(void); - -#endif // I2C_H__ diff --git a/ports/nrf/modules/machine/led.c b/ports/nrf/modules/machine/led.c deleted file mode 100644 index 423c70bb8670e..0000000000000 --- a/ports/nrf/modules/machine/led.c +++ /dev/null @@ -1,155 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" - -#include "mphalport.h" -#include "led.h" -#include "mpconfigboard.h" - -#if MICROPY_HW_HAS_LED - -#define LED_OFF(led) {(MICROPY_HW_LED_PULLUP) ? hal_gpio_pin_set(0, led) : hal_gpio_pin_clear(0, led); } -#define LED_ON(led) {(MICROPY_HW_LED_PULLUP) ? hal_gpio_pin_clear(0, led) : hal_gpio_pin_set(0, led); } - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; - mp_uint_t led_id; - mp_uint_t hw_pin; - uint8_t hw_pin_port; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { -#if MICROPY_HW_LED_TRICOLOR - {{&pyb_led_type}, PYB_LED_RED, MICROPY_HW_LED_RED}, - {{&pyb_led_type}, PYB_LED_GREEN, MICROPY_HW_LED_GREEN}, - {{&pyb_led_type}, PYB_LED_BLUE, MICROPY_HW_LED_BLUE}, -#elif (MICROPY_HW_LED_COUNT == 1) - {{&pyb_led_type}, PYB_LED1, MICROPY_HW_LED1}, -#elif (MICROPY_HW_LED_COUNT == 2) - {{&pyb_led_type}, PYB_LED1, MICROPY_HW_LED1}, - {{&pyb_led_type}, PYB_LED2, MICROPY_HW_LED2}, -#else - {{&pyb_led_type}, PYB_LED1, MICROPY_HW_LED1}, - {{&pyb_led_type}, PYB_LED2, MICROPY_HW_LED2}, - {{&pyb_led_type}, PYB_LED3, MICROPY_HW_LED3}, - {{&pyb_led_type}, PYB_LED4, MICROPY_HW_LED4}, -#endif -}; - -#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj) - -void led_state(pyb_led_obj_t * led_obj, int state) { - if (state == 1) { - LED_ON(led_obj->hw_pin); - } else { - LED_OFF(led_obj->hw_pin); - } -} - -void led_toggle(pyb_led_obj_t * led_obj) { - hal_gpio_pin_toggle(0, led_obj->hw_pin); -} - - - -/******************************************************************************/ -/* MicroPython bindings */ - -void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - mp_printf(print, "LED(%lu)", self->led_id); -} - -/// \classmethod \constructor(id) -/// Create an LED object associated with the given LED: -/// -/// - `id` is the LED number, 1-4. -STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get led number - mp_int_t led_id = mp_obj_get_int(args[0]); - - // check led number - if (!(1 <= led_id && led_id <= NUM_LEDS)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED(%d) does not exist", led_id)); - } - - hal_gpio_cfg_pin(0, pyb_led_obj[led_id - 1].hw_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - LED_OFF(pyb_led_obj[led_id - 1].hw_pin); - - // return static led object - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -/// \method on() -/// Turn the LED on. -mp_obj_t led_obj_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self, 1); - return mp_const_none; -} - -/// \method off() -/// Turn the LED off. -mp_obj_t led_obj_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self, 0); - return mp_const_none; -} - -/// \method toggle() -/// Toggle the LED between on and off. -mp_obj_t led_obj_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(self); - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle); - -STATIC const mp_rom_map_elem_t led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = led_obj_print, - .make_new = led_obj_make_new, - .locals_dict = (mp_obj_dict_t*)&led_locals_dict, -}; - -#endif // MICROPY_HW_HAS_LED diff --git a/ports/nrf/modules/machine/led.h b/ports/nrf/modules/machine/led.h deleted file mode 100644 index c9e20ce4c8f0e..0000000000000 --- a/ports/nrf/modules/machine/led.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef LED_H -#define LED_H - -typedef enum { -#if MICROPY_HW_LED_TRICOLOR - PYB_LED_RED = 1, - PYB_LED_GREEN = 2, - PYB_LED_BLUE = 3 -#elif (MICROPY_HW_LED_COUNT == 1) - PYB_LED1 = 1, -#elif (MICROPY_HW_LED_COUNT == 2) - PYB_LED1 = 1, - PYB_LED2 = 2, -#else - PYB_LED1 = 1, - PYB_LED2 = 2, - PYB_LED3 = 3, - PYB_LED4 = 4 -#endif -} pyb_led_t; - -void led_init(void); - -extern const mp_obj_type_t pyb_led_type; - -#endif // LED_H diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c deleted file mode 100644 index ad536a37db886..0000000000000 --- a/ports/nrf/modules/machine/modmachine.c +++ /dev/null @@ -1,244 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include - -#include "modmachine.h" -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "gccollect.h" -#include "pin.h" -#include "uart.h" -#include "spi.h" -#include "i2c.h" -#include "timer.h" -#if MICROPY_PY_MACHINE_HW_PWM -#include "pwm.h" -#endif -#if MICROPY_PY_MACHINE_ADC -#include "adc.h" -#endif -#if MICROPY_PY_MACHINE_TEMP -#include "temp.h" -#endif -#if MICROPY_PY_MACHINE_RTC -#include "rtc.h" -#endif - -#define PYB_RESET_HARD (0) -#define PYB_RESET_WDT (1) -#define PYB_RESET_SOFT (2) -#define PYB_RESET_LOCKUP (3) -#define PYB_RESET_POWER_ON (16) -#define PYB_RESET_LPCOMP (17) -#define PYB_RESET_DIF (18) -#define PYB_RESET_NFC (19) - -STATIC uint32_t reset_cause; - -void machine_init(void) { - uint32_t state = NRF_POWER->RESETREAS; - if (state & POWER_RESETREAS_RESETPIN_Msk) { - reset_cause = PYB_RESET_HARD; - } else if (state & POWER_RESETREAS_DOG_Msk) { - reset_cause = PYB_RESET_WDT; - } else if (state & POWER_RESETREAS_SREQ_Msk) { - reset_cause = PYB_RESET_SOFT; - } else if (state & POWER_RESETREAS_LOCKUP_Msk) { - reset_cause = PYB_RESET_LOCKUP; - } else if (state & POWER_RESETREAS_OFF_Msk) { - reset_cause = PYB_RESET_POWER_ON; - } else if (state & POWER_RESETREAS_LPCOMP_Msk) { - reset_cause = PYB_RESET_LPCOMP; - } else if (state & POWER_RESETREAS_DIF_Msk) { - reset_cause = PYB_RESET_DIF; -#if NRF52 - } else if (state & POWER_RESETREAS_NFC_Msk) { - reset_cause = PYB_RESET_NFC; -#endif - } - - // clear reset reason - NRF_POWER->RESETREAS = (1 << reset_cause); -} - -// machine.info([dump_alloc_table]) -// Print out lots of information about the board. -STATIC mp_obj_t machine_info(mp_uint_t n_args, const mp_obj_t *args) { - // to print info about memory - { - printf("_etext=%p\n", &_etext); - printf("_sidata=%p\n", &_sidata); - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_ram_start=%p\n", &_ram_start); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - printf("_ram_end=%p\n", &_ram_end); - } - - // qstr info - { - mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info); - -// Resets the pyboard in a manner similar to pushing the external RESET button. -STATIC mp_obj_t machine_reset(void) { - NVIC_SystemReset(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_soft_reset(void) { - pyexec_system_exit = PYEXEC_FORCED_EXIT; - nlr_raise(mp_obj_new_exception(&mp_type_SystemExit)); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset); - -STATIC mp_obj_t machine_sleep(void) { - __WFE(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(void) { - __WFI(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause(void) { - return MP_OBJ_NEW_SMALL_INT(reset_cause); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC mp_obj_t machine_enable_irq(void) { -#ifndef BLUETOOTH_SD - __enable_irq(); -#else - -#endif - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_enable_irq_obj, machine_enable_irq); - -// Resets the pyboard in a manner similar to pushing the external RESET button. -STATIC mp_obj_t machine_disable_irq(void) { -#ifndef BLUETOOTH_SD - __disable_irq(); -#else - -#endif - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_disable_irq_obj, machine_disable_irq); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_hard_uart_type) }, -#if MICROPY_PY_MACHINE_HW_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, -#endif -#if MICROPY_PY_MACHINE_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, -#endif -#if MICROPY_PY_MACHINE_ADC - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) }, -#endif -#if MICROPY_PY_MACHINE_RTC - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) }, -#endif -#if MICROPY_PY_MACHINE_TIMER - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, -#endif -#if MICROPY_PY_MACHINE_HW_PWM - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_hard_pwm_type) }, -#endif -#if MICROPY_PY_MACHINE_TEMP - { MP_ROM_QSTR(MP_QSTR_Temp), MP_ROM_PTR(&machine_temp_type) }, -#endif - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT) }, - { MP_ROM_QSTR(MP_QSTR_LOCKUP_RESET), MP_ROM_INT(PYB_RESET_LOCKUP) }, - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON) }, - { MP_ROM_QSTR(MP_QSTR_LPCOMP_RESET), MP_ROM_INT(PYB_RESET_LPCOMP) }, - { MP_ROM_QSTR(MP_QSTR_DEBUG_IF_RESET), MP_ROM_INT(PYB_RESET_DIF) }, -#if NRF52 - { MP_ROM_QSTR(MP_QSTR_NFC_RESET), MP_ROM_INT(PYB_RESET_NFC) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t machine_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - diff --git a/ports/nrf/modules/machine/modmachine.h b/ports/nrf/modules/machine/modmachine.h deleted file mode 100644 index 76b4ad7242313..0000000000000 --- a/ports/nrf/modules/machine/modmachine.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef __MICROPY_INCLUDED_NRF5_MODMACHINE_H__ -#define __MICROPY_INCLUDED_NRF5_MODMACHINE_H__ - -#include "py/mpstate.h" -#include "py/nlr.h" -#include "py/obj.h" - -void machine_init(void); - -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_sleep_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_deepsleep_obj); - -#endif // __MICROPY_INCLUDED_NRF5_MODMACHINE_H__ diff --git a/ports/nrf/modules/machine/pin.c b/ports/nrf/modules/machine/pin.c deleted file mode 100644 index d7306a4991b06..0000000000000 --- a/ports/nrf/modules/machine/pin.c +++ /dev/null @@ -1,695 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -/// \moduleref pyb -/// \class Pin - control I/O pins -/// -/// A pin is the basic object to control I/O pins. It has methods to set -/// the mode of the pin (input, output, etc) and methods to get and set the -/// digital logic level. For analog control of a pin, see the ADC class. -/// -/// Usage Model: -/// -/// All Board Pins are predefined as pyb.Pin.board.Name -/// -/// x1_pin = pyb.Pin.board.X1 -/// -/// g = pyb.Pin(pyb.Pin.board.X1, pyb.Pin.IN) -/// -/// CPU pins which correspond to the board pins are available -/// as `pyb.cpu.Name`. For the CPU pins, the names are the port letter -/// followed by the pin number. On the PYBv1.0, `pyb.Pin.board.X1` and -/// `pyb.Pin.cpu.B6` are the same pin. -/// -/// You can also use strings: -/// -/// g = pyb.Pin('X1', pyb.Pin.OUT_PP) -/// -/// Users can add their own names: -/// -/// MyMapperDict = { 'LeftMotorDir' : pyb.Pin.cpu.C12 } -/// pyb.Pin.dict(MyMapperDict) -/// g = pyb.Pin("LeftMotorDir", pyb.Pin.OUT_OD) -/// -/// and can query mappings -/// -/// pin = pyb.Pin("LeftMotorDir") -/// -/// Users can also add their own mapping function: -/// -/// def MyMapper(pin_name): -/// if pin_name == "LeftMotorDir": -/// return pyb.Pin.cpu.A0 -/// -/// pyb.Pin.mapper(MyMapper) -/// -/// So, if you were to call: `pyb.Pin("LeftMotorDir", pyb.Pin.OUT_PP)` -/// then `"LeftMotorDir"` is passed directly to the mapper function. -/// -/// To summarise, the following order determines how things get mapped into -/// an ordinal pin number: -/// -/// 1. Directly specify a pin object -/// 2. User supplied mapping function -/// 3. User supplied mapping (object must be usable as a dictionary key) -/// 4. Supply a string which matches a board pin -/// 5. Supply a string which matches a CPU port/pin -/// -/// You can set `pyb.Pin.debug(True)` to get some debug information about -/// how a particular object gets mapped to a pin. - -// Pin class variables -STATIC bool pin_class_debug; - -// Forward declare function -void gpio_irq_event_callback(hal_gpio_event_channel_t channel); - -void pin_init0(void) { - MP_STATE_PORT(pin_class_mapper) = mp_const_none; - MP_STATE_PORT(pin_class_map_dict) = mp_const_none; - pin_class_debug = false; - - hal_gpio_register_callback(gpio_irq_event_callback); -} - -// C API used to convert a user-supplied pin name into an ordinal pin number. -const pin_obj_t *pin_find(mp_obj_t user_obj) { - const pin_obj_t *pin_obj; - - // If a pin was provided, then use it - if (MP_OBJ_IS_TYPE(user_obj, &pin_type)) { - pin_obj = user_obj; - if (pin_class_debug) { - printf("Pin map passed pin "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - if (MP_STATE_PORT(pin_class_mapper) != mp_const_none) { - pin_obj = mp_call_function_1(MP_STATE_PORT(pin_class_mapper), user_obj); - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("Pin.mapper didn't return a Pin object"); - } - if (pin_class_debug) { - printf("Pin.mapper maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - // The pin mapping function returned mp_const_none, fall through to - // other lookup methods. - } - - if (MP_STATE_PORT(pin_class_map_dict) != mp_const_none) { - mp_map_t *pin_map_map = mp_obj_dict_get_map(MP_STATE_PORT(pin_class_map_dict)); - mp_map_elem_t *elem = mp_map_lookup(pin_map_map, user_obj, MP_MAP_LOOKUP); - if (elem != NULL && elem->value != NULL) { - pin_obj = elem->value; - if (pin_class_debug) { - printf("Pin.map_dict maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - } - - // See if the pin name matches a board pin - pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.board maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - // See if the pin name matches a cpu pin - pin_obj = pin_find_named_pin(&pin_cpu_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.cpu maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin '%s' not a valid pin identifier", mp_obj_str_get_str(user_obj))); -} - -/// \method __str__() -/// Return a string describing the pin object. -STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_obj_t *self = self_in; - - // pin name - mp_printf(print, "Pin(Pin.cpu.%q, mode=Pin.", self->name); - mp_printf(print, "port=0x%x, ", self->port); - mp_printf(print, "pin=0x%x, ", self->pin); -// mp_printf(print, "pin_mask=0x%x,", self->pin_mask); -/* - uint32_t mode = pin_get_mode(self); - - if (mode == GPIO_MODE_ANALOG) { - // analog - mp_print_str(print, "ANALOG)"); - - } else { - // IO mode - bool af = false; - qstr mode_qst; - if (mode == GPIO_MODE_INPUT) { - mode_qst = MP_QSTR_IN; - } else if (mode == GPIO_MODE_OUTPUT_PP) { - mode_qst = MP_QSTR_OUT; - } else if (mode == GPIO_MODE_OUTPUT_OD) { - mode_qst = MP_QSTR_OPEN_DRAIN; - } else { - af = true; - if (mode == GPIO_MODE_AF_PP) { - mode_qst = MP_QSTR_ALT; - } else { - mode_qst = MP_QSTR_ALT_OPEN_DRAIN; - } - } - mp_print_str(print, qstr_str(mode_qst)); - // pull mode - qstr pull_qst = MP_QSTR_NULL; - uint32_t pull = pin_get_pull(self); - if (pull == GPIO_PULLUP) { - pull_qst = MP_QSTR_PULL_UP; - } else if (pull == GPIO_PULLDOWN) { - pull_qst = MP_QSTR_PULL_DOWN; - } - if (pull_qst != MP_QSTR_NULL) { - mp_printf(print, ", pull=Pin.%q", pull_qst); - } - // AF mode - if (af) { - mp_uint_t af_idx = pin_get_af(self); - const pin_af_obj_t *af_obj = pin_find_af_by_index(self, af_idx); - if (af_obj == NULL) { - mp_printf(print, ", af=%d)", af_idx); - } else { - mp_printf(print, ", af=Pin.%q)", af_obj->name); - } - } else { -*/ - mp_print_str(print, ")"); - /* } - }*/ - -} - -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *pin, mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args); - -/// \classmethod \constructor(id, ...) -/// Create a new Pin object associated with the id. If additional arguments are given, -/// they are used to initialise the pin. See `init`. -STATIC mp_obj_t pin_make_new(const mp_obj_type_t *type, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // Run an argument through the mapper and return the result. - const pin_obj_t *pin = pin_find(args[0]); - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t pin_call(mp_obj_t self_in, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self)); - } else { - // set pin - mp_hal_pin_write(self, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -STATIC mp_obj_t pin_off(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_low(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_off_obj, pin_off); - -STATIC mp_obj_t pin_on(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_high(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_on_obj, pin_on); - -/// \classmethod mapper([fun]) -/// Get or set the pin mapper function. -STATIC mp_obj_t pin_mapper(mp_uint_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_mapper) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_mapper); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_mapper_fun_obj, 1, 2, pin_mapper); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_mapper_obj, (mp_obj_t)&pin_mapper_fun_obj); - -/// \classmethod dict([dict]) -/// Get or set the pin mapper dictionary. -STATIC mp_obj_t pin_map_dict(mp_uint_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_map_dict) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_map_dict); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_map_dict_fun_obj, 1, 2, pin_map_dict); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_map_dict_obj, (mp_obj_t)&pin_map_dict_fun_obj); - -/// \classmethod af_list() -/// Returns an array of alternate functions available for this pin. -STATIC mp_obj_t pin_af_list(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - - const pin_af_obj_t *af = self->af; - for (mp_uint_t i = 0; i < self->num_af; i++, af++) { - mp_obj_list_append(result, (mp_obj_t)af); - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_list_obj, pin_af_list); - -/// \classmethod debug([state]) -/// Get or set the debugging state (`True` or `False` for on or off). -STATIC mp_obj_t pin_debug(mp_uint_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - pin_class_debug = mp_obj_is_true(args[1]); - return mp_const_none; - } - return mp_obj_new_bool(pin_class_debug); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_debug_fun_obj, 1, 2, pin_debug); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_debug_obj, (mp_obj_t)&pin_debug_fun_obj); - -// init(mode, pull=None, af=-1, *, value, alt) -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_af, MP_ARG_INT, {.u_int = -1}}, // legacy - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - { MP_QSTR_alt, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get pull mode - uint pull = HAL_GPIO_PULL_DISABLED; - if (args[1].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[1].u_obj); - } - - // if given, set the pin value before initialising to prevent glitches - if (args[3].u_obj != MP_OBJ_NULL) { - mp_hal_pin_write(self, mp_obj_is_true(args[3].u_obj)); - } - - // get io mode - uint mode = args[0].u_int; - if (mode == HAL_GPIO_MODE_OUTPUT || mode == HAL_GPIO_MODE_INPUT) { - hal_gpio_cfg_pin(self->port, self->pin, mode, pull); - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin mode: %d", mode)); - } - - return mp_const_none; -} - -STATIC mp_obj_t pin_obj_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init); - -/// \method value([value]) -/// Get or set the digital logic level of the pin: -/// -/// - With no argument, return 0 or 1 depending on the logic level of the pin. -/// - With `value` given, set the logic level of the pin. `value` can be -/// anything that converts to a boolean. If it converts to `True`, the pin -/// is set high, otherwise it is set low. -STATIC mp_obj_t pin_value(mp_uint_t n_args, const mp_obj_t *args) { - return pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value); - -/// \method low() -/// Set the pin to a low logic level. -STATIC mp_obj_t pin_low(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_low(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_low_obj, pin_low); - -/// \method high() -/// Set the pin to a high logic level. -STATIC mp_obj_t pin_high(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_high(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_high_obj, pin_high); - -/// \method name() -/// Get the pin name. -STATIC mp_obj_t pin_name(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_QSTR(self->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_name_obj, pin_name); - -/// \method names() -/// Returns the cpu and board names for this pin. -STATIC mp_obj_t pin_names(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - mp_obj_list_append(result, MP_OBJ_NEW_QSTR(self->name)); - - mp_map_t *map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - mp_map_elem_t *elem = map->table; - - for (mp_uint_t i = 0; i < map->used; i++, elem++) { - if (elem->value == self) { - mp_obj_list_append(result, elem->key); - } - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_names_obj, pin_names); - -/// \method port() -/// Get the pin port. -STATIC mp_obj_t pin_port(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->port); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_port_obj, pin_port); - -/// \method pin() -/// Get the pin number. -STATIC mp_obj_t pin_pin(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->pin); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pin_obj, pin_pin); - -/// \method gpio() -/// Returns the base address of the GPIO block associated with this pin. -STATIC mp_obj_t pin_gpio(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_int_t)self->gpio); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_gpio_obj, pin_gpio); - -/// \method mode() -/// Returns the currently configured mode of the pin. The integer returned -/// will match one of the allowed constants for the mode argument to the init -/// function. -STATIC mp_obj_t pin_mode(mp_obj_t self_in) { - return mp_const_none; // TODO: MP_OBJ_NEW_SMALL_INT(pin_get_mode(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_mode_obj, pin_mode); - -/// \method pull() -/// Returns the currently configured pull of the pin. The integer returned -/// will match one of the allowed constants for the pull argument to the init -/// function. -STATIC mp_obj_t pin_pull(mp_obj_t self_in) { - return mp_const_none; // TODO: MP_OBJ_NEW_SMALL_INT(pin_get_pull(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pull_obj, pin_pull); - -/// \method af() -/// Returns the currently configured alternate-function of the pin. The -/// integer returned will match one of the allowed constants for the af -/// argument to the init function. -STATIC mp_obj_t pin_af(mp_obj_t self_in) { - return mp_const_none; // TODO: MP_OBJ_NEW_SMALL_INT(pin_get_af(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_obj, pin_af); - -STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = HAL_GPIO_POLARITY_EVENT_TOGGLE} }, - { MP_QSTR_wake, MP_ARG_BOOL, {.u_bool = false} }, - }; - pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - (void)self; - - // return the irq object - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq); - - -STATIC const mp_rom_map_elem_t pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&pin_low_obj) }, - { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&pin_high_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_names), MP_ROM_PTR(&pin_names_obj) }, - { MP_ROM_QSTR(MP_QSTR_af_list), MP_ROM_PTR(&pin_af_list_obj) }, - { MP_ROM_QSTR(MP_QSTR_port), MP_ROM_PTR(&pin_port_obj) }, - { MP_ROM_QSTR(MP_QSTR_pin), MP_ROM_PTR(&pin_pin_obj) }, - { MP_ROM_QSTR(MP_QSTR_gpio), MP_ROM_PTR(&pin_gpio_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&pin_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_pull), MP_ROM_PTR(&pin_pull_obj) }, - { MP_ROM_QSTR(MP_QSTR_af), MP_ROM_PTR(&pin_af_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pin_irq_obj) }, - - // class methods - { MP_ROM_QSTR(MP_QSTR_mapper), MP_ROM_PTR(&pin_mapper_obj) }, - { MP_ROM_QSTR(MP_QSTR_dict), MP_ROM_PTR(&pin_map_dict_obj) }, - { MP_ROM_QSTR(MP_QSTR_debug), MP_ROM_PTR(&pin_debug_obj) }, - - // class attributes - { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) }, - { MP_ROM_QSTR(MP_QSTR_cpu), MP_ROM_PTR(&pin_cpu_pins_obj_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(HAL_GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(HAL_GPIO_MODE_OUTPUT) }, -/* - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_ALT), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_ALT_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_ANALOG), MP_ROM_INT(GPIO_MODE_ANALOG) }, -*/ - { MP_ROM_QSTR(MP_QSTR_PULL_DISABLED), MP_ROM_INT(HAL_GPIO_PULL_DISABLED) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(HAL_GPIO_PULL_UP) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(HAL_GPIO_PULL_DOWN) }, - - // IRQ triggers, can be or'd together - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(HAL_GPIO_POLARITY_EVENT_LOW_TO_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(HAL_GPIO_POLARITY_EVENT_HIGH_TO_LOW) }, -/* - // legacy class constants - { MP_ROM_QSTR(MP_QSTR_OUT_PP), MP_ROM_INT(GPIO_MODE_OUTPUT_PP) }, - { MP_ROM_QSTR(MP_QSTR_OUT_OD), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_AF_PP), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_AF_OD), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_NONE), MP_ROM_INT(GPIO_NOPULL) }, -*/ -//#include "genhdr/pins_af_const.h" -}; - -STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table); - -const mp_obj_type_t pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pin_print, - .make_new = pin_make_new, - .call = pin_call, - .locals_dict = (mp_obj_dict_t*)&pin_locals_dict, -}; - -/// \moduleref pyb -/// \class PinAF - Pin Alternate Functions -/// -/// A Pin represents a physical pin on the microcprocessor. Each pin -/// can have a variety of functions (GPIO, I2C SDA, etc). Each PinAF -/// object represents a particular function for a pin. -/// -/// Usage Model: -/// -/// x3 = pyb.Pin.board.X3 -/// x3_af = x3.af_list() -/// -/// x3_af will now contain an array of PinAF objects which are availble on -/// pin X3. -/// -/// For the pyboard, x3_af would contain: -/// [Pin.AF1_TIM2, Pin.AF2_TIM5, Pin.AF3_TIM9, Pin.AF7_USART2] -/// -/// Normally, each peripheral would configure the af automatically, but sometimes -/// the same function is available on multiple pins, and having more control -/// is desired. -/// -/// To configure X3 to expose TIM2_CH3, you could use: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=pyb.Pin.AF1_TIM2) -/// or: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=1) - -/// \method __str__() -/// Return a string describing the alternate function. -STATIC void pin_af_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_af_obj_t *self = self_in; - mp_printf(print, "Pin.%q", self->name); -} - -/// \method index() -/// Return the alternate function index. -STATIC mp_obj_t pin_af_index(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT(af->idx); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_index_obj, pin_af_index); - -/// \method name() -/// Return the name of the alternate function. -STATIC mp_obj_t pin_af_name(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_QSTR(af->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_name_obj, pin_af_name); - -/// \method reg() -/// Return the base register associated with the peripheral assigned to this -/// alternate function. -STATIC mp_obj_t pin_af_reg(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)af->reg); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_reg_obj, pin_af_reg); - -STATIC const mp_rom_map_elem_t pin_af_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_index), MP_ROM_PTR(&pin_af_index_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_af_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pin_af_reg_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pin_af_locals_dict, pin_af_locals_dict_table); - -const mp_obj_type_t pin_af_type = { - { &mp_type_type }, - .name = MP_QSTR_PinAF, - .print = pin_af_obj_print, - .locals_dict = (mp_obj_dict_t*)&pin_af_locals_dict, -}; - -/******************************************************************************/ -// Pin IRQ object - -void gpio_irq_event_callback(hal_gpio_event_channel_t channel) { - // printf("### gpio irq received on channel %d\n", (uint16_t)channel); -} - -typedef struct _pin_irq_obj_t { - mp_obj_base_t base; - pin_obj_t pin; -} pin_irq_obj_t; - -// STATIC const mp_obj_type_t pin_irq_type; - -/*STATIC mp_obj_t pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - pin_irq_obj_t *self = self_in; - (void)self; - return mp_const_none; -}*/ - -/*STATIC mp_obj_t pin_irq_trigger(size_t n_args, const mp_obj_t *args) { - pin_irq_obj_t *self = args[0]; - (void)self; - return mp_const_none; -}*/ -// STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_irq_trigger_obj, 1, 2, pin_irq_trigger); - -// STATIC const mp_rom_map_elem_t pin_irq_locals_dict_table[] = { -// { MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&pin_irq_trigger_obj) }, -// }; - -// STATIC MP_DEFINE_CONST_DICT(pin_irq_locals_dict, pin_irq_locals_dict_table); - -/*STATIC const mp_obj_type_t pin_irq_type = { - { &mp_type_type }, - .name = MP_QSTR_IRQ, - .call = pin_irq_call, - .locals_dict = (mp_obj_dict_t*)&pin_irq_locals_dict, -};*/ diff --git a/ports/nrf/modules/machine/pin.h b/ports/nrf/modules/machine/pin.h deleted file mode 100644 index c34726174c8fe..0000000000000 --- a/ports/nrf/modules/machine/pin.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef __MICROPY_INCLUDED_NRF5_PIN_H__ -#define __MICROPY_INCLUDED_NRF5_PIN_H__ - -// This file requires pin_defs_xxx.h (which has port specific enums and -// defines, so we include it here. It should never be included directly - -#include MICROPY_PIN_DEFS_PORT_H -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t idx; - uint8_t fn; - uint8_t unit; - uint8_t type; - - union { - void *reg; - }; -} pin_af_obj_t; - -typedef struct { - mp_obj_base_t base; - qstr name; - - uint32_t port : 1; - uint32_t pin : 5; // Some ARM processors use 32 bits/PORT - uint32_t num_af : 4; - uint32_t adc_channel : 4; // 0 is no ADC, ADC channel from 1 to 8 - -// uint32_t pin_mask; - pin_gpio_t *gpio; - const pin_af_obj_t *af; - uint32_t pull; -} pin_obj_t; - -// Adafruit -extern const mp_obj_type_t mcu_pin_type; - -extern const mp_obj_type_t pin_type; -extern const mp_obj_type_t pin_af_type; - -typedef struct { - const char *name; - const pin_obj_t *pin; -} pin_named_pin_t; - -extern const pin_named_pin_t pin_board_pins[]; -extern const pin_named_pin_t pin_cpu_pins[]; - -//extern pin_map_obj_t pin_map_obj; - -typedef struct { - mp_obj_base_t base; - qstr name; - const pin_named_pin_t *named_pins; -} pin_named_pins_obj_t; - -extern const mp_obj_type_t pin_board_pins_obj_type; -extern const mp_obj_type_t pin_cpu_pins_obj_type; - -//extern const mp_obj_dict_t pin_cpu_pins_locals_dict; -//extern const mp_obj_dict_t pin_board_pins_locals_dict; - -// Adafruit modification for CircuitPython board module -extern const mp_obj_dict_t mcu_pin_globals; -extern const mp_obj_dict_t board_module_globals; - -#define pin_cpu_pins_locals_dict mcu_pin_globals -#define pin_board_pins_locals_dict board_module_globals - - -MP_DECLARE_CONST_FUN_OBJ_KW(pin_init_obj); - -void pin_init0(void); -uint32_t pin_get_mode(const pin_obj_t *pin); -uint32_t pin_get_pull(const pin_obj_t *pin); -uint32_t pin_get_af(const pin_obj_t *pin); -const pin_obj_t *pin_find(mp_obj_t user_obj); -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name); -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit); -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx); -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name); - -#endif // __MICROPY_INCLUDED_NRF5_PIN_H__ diff --git a/ports/nrf/modules/machine/pwm.c b/ports/nrf/modules/machine/pwm.c deleted file mode 100644 index 6a98677af1872..0000000000000 --- a/ports/nrf/modules/machine/pwm.c +++ /dev/null @@ -1,333 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" - -#if MICROPY_PY_MACHINE_HW_PWM - -#include "pin.h" -//#include "genhdr/pins.h" -#include "pins.h" -#include "pwm.h" - -#if NRF52 -// Use PWM hardware. -#include "hal_pwm.h" -#endif - -#ifdef MICROPY_HW_PWM0_NAME -PWM_HandleTypeDef PWMHandle0 = {.instance = NULL}; -#endif - -STATIC const pyb_pwm_obj_t machine_pwm_obj[] = { - #ifdef MICROPY_HW_PWM0_NAME - {{&machine_hard_pwm_type}, &PWMHandle0}, - #else - {{&machine_hard_pwm_type}, NULL}, - #endif -}; - -void pwm_init0(void) { - // reset the PWM handles - #ifdef MICROPY_HW_PWM0_NAME - memset(&PWMHandle0, 0, sizeof(PWM_HandleTypeDef)); - PWMHandle0.instance = PWM0; - #endif -} - -STATIC int pwm_find(mp_obj_t id) { - if (MP_OBJ_IS_STR(id)) { - // given a string id - const char *port = mp_obj_str_get_str(id); - if (0) { - #ifdef MICROPY_HW_PWM0_NAME - } else if (strcmp(port, MICROPY_HW_PWM0_NAME) == 0) { - return 1; - #endif - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "PWM(%s) does not exist", port)); - } else { - // given an integer id - int pwm_id = mp_obj_get_int(id); - if (pwm_id >= 0 && pwm_id <= MP_ARRAY_SIZE(machine_pwm_obj) - && machine_pwm_obj[pwm_id].pwm != NULL) { - return pwm_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "PWM(%d) does not exist", pwm_id)); - } -} - -void pwm_init(PWM_HandleTypeDef *pwm) { - // start pwm - hal_pwm_start(pwm->instance); -} - -void pwm_deinit(PWM_HandleTypeDef *pwm) { - // stop pwm - hal_pwm_stop(pwm->instance); -} - -STATIC void pwm_print(const mp_print_t *print, PWM_HandleTypeDef *pwm, bool legacy) { - uint pwm_num = 0; // default to PWM0 - mp_printf(print, "PWM(%u)", pwm_num); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -// for make_new -enum { - ARG_NEW_id, - ARG_NEW_pin, - ARG_NEW_freq, - ARG_NEW_period, - ARG_NEW_duty, - ARG_NEW_pulse_width, - ARG_NEW_mode -}; - -// for init -enum { - ARG_INIT_pin -}; - -// for freq -enum { - ARG_FREQ_freq -}; - -STATIC mp_obj_t machine_hard_pwm_make_new(mp_arg_val_t *args); -STATIC void machine_hard_pwm_init(mp_obj_t self, mp_arg_val_t *args); -STATIC void machine_hard_pwm_deinit(mp_obj_t self); -STATIC mp_obj_t machine_hard_pwm_freq(mp_obj_t self, mp_arg_val_t *args); - -/* common code for both soft and hard implementations *************************/ - -STATIC mp_obj_t machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_pin, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_duty, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pulse_width, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[ARG_NEW_id].u_obj == MP_OBJ_NEW_SMALL_INT(-1)) { - // TODO: implement soft PWM - // return machine_soft_pwm_make_new(args); - return mp_const_none; - } else { - // hardware peripheral id given - return machine_hard_pwm_make_new(args); - } -} - -STATIC mp_obj_t machine_pwm_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} } - }; - - // parse args - mp_obj_t self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { - machine_hard_pwm_init(self, args); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pwm_init_obj, 1, machine_pwm_init); - -STATIC mp_obj_t machine_pwm_deinit(mp_obj_t self) { - // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { - machine_hard_pwm_deinit(self); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pwm_deinit_obj, machine_pwm_deinit); - -STATIC mp_obj_t machine_pwm_freq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} }, - }; - - mp_obj_t self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { - machine_hard_pwm_freq(self, args); - } else { - // soft pwm - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(mp_machine_pwm_freq_obj, 1, machine_pwm_freq); - -STATIC mp_obj_t machine_pwm_period(size_t n_args, const mp_obj_t *args) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_pwm_period_obj, 1, 2, machine_pwm_period); - -STATIC mp_obj_t machine_pwm_duty(size_t n_args, const mp_obj_t *args) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_pwm_duty_obj, 1, 2, machine_pwm_duty); - -STATIC const mp_rom_map_elem_t machine_pwm_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pwm_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_pwm_deinit_obj) }, - - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&mp_machine_pwm_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&mp_machine_pwm_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_duty), MP_ROM_PTR(&mp_machine_pwm_duty_obj) }, - - { MP_ROM_QSTR(MP_QSTR_FREQ_16MHZ), MP_ROM_INT(HAL_PWM_FREQ_16Mhz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_8MHZ), MP_ROM_INT(HAL_PWM_FREQ_8Mhz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_4MHZ), MP_ROM_INT(HAL_PWM_FREQ_4Mhz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_2MHZ), MP_ROM_INT(HAL_PWM_FREQ_2Mhz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_1MHZ), MP_ROM_INT(HAL_PWM_FREQ_1Mhz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_500KHZ), MP_ROM_INT(HAL_PWM_FREQ_500khz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_250KHZ), MP_ROM_INT(HAL_PWM_FREQ_250khz) }, - { MP_ROM_QSTR(MP_QSTR_FREQ_125KHZ), MP_ROM_INT(HAL_PWM_FREQ_125khz) }, - - { MP_ROM_QSTR(MP_QSTR_MODE_LOW_HIGH), MP_ROM_INT(HAL_PWM_MODE_LOW_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_MODE_HIGH_LOW), MP_ROM_INT(HAL_PWM_MODE_HIGH_LOW) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_pwm_locals_dict, machine_pwm_locals_dict_table); - -/* code for hard implementation ***********************************************/ - -STATIC const machine_hard_pwm_obj_t machine_hard_pwm_obj[] = { - {{&machine_hard_pwm_type}, &machine_pwm_obj[0]}, -}; - -STATIC void machine_hard_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_pwm_obj_t *self = self_in; - pwm_print(print, self->pyb->pwm, false); -} - -STATIC mp_obj_t machine_hard_pwm_make_new(mp_arg_val_t *args) { - // get static peripheral object - int pwm_id = pwm_find(args[ARG_NEW_id].u_obj); - const machine_hard_pwm_obj_t *self = &machine_hard_pwm_obj[pwm_id]; - - // check if PWM pin is set - if (args[ARG_NEW_pin].u_obj != MP_OBJ_NULL) { - pin_obj_t *pin_obj = args[ARG_NEW_pin].u_obj; - self->pyb->pwm->init.pwm_pin = pin_obj->pin; - } else { - // TODO: raise exception. - } - - if (args[ARG_NEW_freq].u_obj != MP_OBJ_NULL) { - self->pyb->pwm->init.freq = mp_obj_get_int(args[ARG_NEW_freq].u_obj); - } else { - self->pyb->pwm->init.freq = 50; // 50 Hz by default. - } - - if (args[ARG_NEW_period].u_obj != MP_OBJ_NULL) { - self->pyb->pwm->init.period = mp_obj_get_int(args[ARG_NEW_period].u_obj); - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "PWM period has to be within 16000 frequence cycles", self->pyb->pwm->init.period)); - } - - if (args[ARG_NEW_duty].u_obj != MP_OBJ_NULL) { - self->pyb->pwm->init.duty = mp_obj_get_int(args[ARG_NEW_duty].u_obj); - } else { - self->pyb->pwm->init.duty = 50; // 50% by default. - } - - if (args[ARG_NEW_pulse_width].u_obj != MP_OBJ_NULL) { - self->pyb->pwm->init.pulse_width = mp_obj_get_int(args[ARG_NEW_pulse_width].u_obj); - } else { - self->pyb->pwm->init.pulse_width = 0; - } - - if (args[ARG_NEW_mode].u_obj != MP_OBJ_NULL) { - self->pyb->pwm->init.mode = mp_obj_get_int(args[ARG_NEW_mode].u_obj); - } else { - self->pyb->pwm->init.mode = HAL_PWM_MODE_HIGH_LOW; - } - - hal_pwm_init(self->pyb->pwm->instance, &self->pyb->pwm->init); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC void machine_hard_pwm_init(mp_obj_t self_in, mp_arg_val_t *args) { - machine_hard_pwm_obj_t *self = self_in; - pwm_init(self->pyb->pwm); -} - -STATIC void machine_hard_pwm_deinit(mp_obj_t self_in) { - machine_hard_pwm_obj_t *self = self_in; - pwm_deinit(self->pyb->pwm); -} - -STATIC mp_obj_t machine_hard_pwm_freq(mp_obj_t self_in, mp_arg_val_t *args) { - machine_hard_pwm_obj_t *self = self_in; - - if (args[ARG_FREQ_freq].u_int != -1) { - self->pyb->pwm->init.freq = args[ARG_FREQ_freq].u_int; - hal_pwm_init(self->pyb->pwm->instance, &self->pyb->pwm->init); - } else { - return MP_OBJ_NEW_SMALL_INT(self->pyb->pwm->init.freq); - } - - return mp_const_none; -} - - -const mp_obj_type_t machine_hard_pwm_type = { - { &mp_type_type }, - .name = MP_QSTR_PWM, - .print = machine_hard_pwm_print, - .make_new = machine_pwm_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_pwm_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_HW_PWM diff --git a/ports/nrf/modules/machine/pwm.h b/ports/nrf/modules/machine/pwm.h deleted file mode 100644 index 85184bae01657..0000000000000 --- a/ports/nrf/modules/machine/pwm.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "hal_pwm.h" - -typedef struct _pyb_pwm_obj_t { - mp_obj_base_t base; - PWM_HandleTypeDef *pwm; -} pyb_pwm_obj_t; - -typedef struct _machine_hard_pwm_obj_t { - mp_obj_base_t base; - const pyb_pwm_obj_t *pyb; -} machine_hard_pwm_obj_t; - -void pwm_init0(void); - -extern const mp_obj_type_t machine_hard_pwm_type; diff --git a/ports/nrf/modules/machine/rtc.c b/ports/nrf/modules/machine/rtc.c deleted file mode 100644 index cbf9e62114c56..0000000000000 --- a/ports/nrf/modules/machine/rtc.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "rtc.h" -#include "hal_rtc.h" - -#if MICROPY_PY_MACHINE_RTC - -typedef struct _machine_rtc_obj_t { - mp_obj_base_t base; - hal_rtc_conf_t * p_config; - mp_obj_t callback; - mp_int_t period; - mp_int_t mode; -} machine_rtc_obj_t; - -static hal_rtc_conf_t rtc_config0 = {.id = 0}; -static hal_rtc_conf_t rtc_config1 = {.id = 1}; -#if NRF52 -static hal_rtc_conf_t rtc_config2 = {.id = 2}; -#endif - -STATIC machine_rtc_obj_t machine_rtc_obj[] = { - {{&machine_rtc_type}, &rtc_config0}, - {{&machine_rtc_type}, &rtc_config1}, -#if NRF52 - {{&machine_rtc_type}, &rtc_config2}, -#endif -}; - -STATIC void hal_interrupt_handle(uint8_t id) { - machine_rtc_obj_t * self = &machine_rtc_obj[id];; - - mp_call_function_1(self->callback, self); - - if (self != NULL) { - hal_rtc_stop(id); - if (self->mode == 1) { - hal_rtc_start(id); - } - } -} - -void rtc_init0(void) { - hal_rtc_callback_set(hal_interrupt_handle); -} - -STATIC int rtc_find(mp_obj_t id) { - // given an integer id - int rtc_id = mp_obj_get_int(id); - if (rtc_id >= 0 && rtc_id <= MP_ARRAY_SIZE(machine_rtc_obj) - && machine_rtc_obj[rtc_id].p_config != NULL) { - return rtc_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "RTC(%d) does not exist", rtc_id)); -} - -STATIC void rtc_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - machine_rtc_obj_t *self = o; - mp_printf(print, "RTC(%u)", self->p_config->id); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -STATIC mp_obj_t machine_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int rtc_id = rtc_find(args[0].u_obj); - - // unconst machine object in order to set a callback. - machine_rtc_obj_t * self = (machine_rtc_obj_t *)&machine_rtc_obj[rtc_id]; - - self->p_config->period = args[1].u_int; - - self->mode = args[2].u_int; - - if (args[3].u_obj != mp_const_none) { - self->callback = args[3].u_obj; - } - -#ifdef NRF51 - self->p_config->irq_priority = 3; -#else - self->p_config->irq_priority = 6; -#endif - - hal_rtc_init(self->p_config); - - return MP_OBJ_FROM_PTR(self); -} - -/// \method start(period) -/// Start the RTC timer. Timeout occurs after number of periods -/// in the configured frequency has been reached. -/// -STATIC mp_obj_t machine_rtc_start(mp_obj_t self_in) { - machine_rtc_obj_t * self = MP_OBJ_TO_PTR(self_in); - - hal_rtc_start(self->p_config->id); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_rtc_start_obj, machine_rtc_start); - -/// \method stop() -/// Stop the RTC timer. -/// -STATIC mp_obj_t machine_rtc_stop(mp_obj_t self_in) { - machine_rtc_obj_t * self = MP_OBJ_TO_PTR(self_in); - - hal_rtc_stop(self->p_config->id); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_rtc_stop_obj, machine_rtc_stop); - - -STATIC const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_start), MP_ROM_PTR(&machine_rtc_start_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&machine_rtc_stop_obj) }, - - // constants - { MP_ROM_QSTR(MP_QSTR_ONESHOT), MP_ROM_INT(0) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(1) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table); - -const mp_obj_type_t machine_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .print = rtc_print, - .make_new = machine_rtc_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_rtc_locals_dict -}; - -#endif // MICROPY_PY_MACHINE_RTC diff --git a/ports/nrf/modules/machine/rtc.h b/ports/nrf/modules/machine/rtc.h deleted file mode 100644 index 6bf6efa6ad6ee..0000000000000 --- a/ports/nrf/modules/machine/rtc.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef RTC_H__ -#define RTC_H__ - -#include "hal_rtc.h" - -extern const mp_obj_type_t machine_rtc_type; - -void rtc_init0(void); - -#endif // RTC_H__ diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c deleted file mode 100644 index 5c097fd7657f2..0000000000000 --- a/ports/nrf/modules/machine/spi.c +++ /dev/null @@ -1,378 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "pin.h" -//#include "genhdr/pins.h" -#include "pins.h" -#include "spi.h" -#include "hal_spi.h" - -#if MICROPY_PY_MACHINE_HW_SPI - -/// \moduleref pyb -/// \class SPI - a master-driven serial protocol -/// -/// SPI is a serial protocol that is driven by a master. At the physical level -/// there are 3 lines: SCK, MOSI, MISO. -/// -/// See usage model of I2C; SPI is very similar. Main difference is -/// parameters to init the SPI bus: -/// -/// from pyb import SPI -/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7) -/// -/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be -/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1 -/// to sample data on the first or second clock edge respectively. Crc can be -/// None for no CRC, or a polynomial specifier. -/// -/// Additional method for SPI: -/// -/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes -/// buf = bytearray(4) -/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf -/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf - -SPI_HandleTypeDef SPIHandle0 = {.instance = NULL}; -SPI_HandleTypeDef SPIHandle1 = {.instance = NULL}; -#if NRF52 -SPI_HandleTypeDef SPIHandle2 = {.instance = NULL}; -#if NRF52840_XXAA -SPI_HandleTypeDef SPIHandle3 = {.instance = NULL}; // 32 Mbs master only -#endif // NRF52840_XXAA -#endif // NRF52 - -STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = { - {{&machine_hard_spi_type}, &SPIHandle0}, - {{&machine_hard_spi_type}, &SPIHandle1}, -#if NRF52 - {{&machine_hard_spi_type}, &SPIHandle2}, -#if NRF52840_XXAA - {{&machine_hard_spi_type}, &SPIHandle3}, -#endif // NRF52840_XXAA -#endif // NRF52 - -}; - -void spi_init0(void) { - // reset the SPI handles - memset(&SPIHandle0, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle0.instance = SPI_BASE(0); - memset(&SPIHandle1, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle1.instance = SPI_BASE(1); -#if NRF52 - memset(&SPIHandle2, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle2.instance = SPI_BASE(2); -#if NRF52840_XXAA - memset(&SPIHandle3, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle3.instance = SPI_BASE(3); -#endif // NRF52840_XXAA -#endif // NRF52 -} - -STATIC int spi_find(mp_obj_t id) { - if (MP_OBJ_IS_STR(id)) { - // given a string id - const char *port = mp_obj_str_get_str(id); - if (0) { - #ifdef MICROPY_HW_SPI0_NAME - } else if (strcmp(port, MICROPY_HW_SPI0_NAME) == 0) { - return 1; - #endif - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%s) does not exist", port)); - } else { - // given an integer id - int spi_id = mp_obj_get_int(id); - if (spi_id >= 0 && spi_id <= MP_ARRAY_SIZE(machine_hard_spi_obj) - && machine_hard_spi_obj[spi_id].spi != NULL) { - return spi_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%d) does not exist", spi_id)); - } -} - -void spi_init(SPI_HandleTypeDef *spi, bool enable_nss_pin) { -} - -void spi_deinit(SPI_HandleTypeDef *spi) { -} - -STATIC void spi_transfer(const machine_hard_spi_obj_t * self, size_t len, const void * src, void * dest) { - hal_spi_master_tx_rx(self->spi->instance, len, src, dest); -} - -STATIC void spi_print(const mp_print_t *print, SPI_HandleTypeDef *spi, bool legacy) { - uint spi_num = 0; // default to SPI1 - mp_printf(print, "SPI(%u)", spi_num); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -// for make_new -enum { - ARG_NEW_id, - ARG_NEW_baudrate, - ARG_NEW_polarity, - ARG_NEW_phase, - ARG_NEW_bits, - ARG_NEW_firstbit, - ARG_NEW_sck, - ARG_NEW_mosi, - ARG_NEW_miso -}; - -// for init -enum { - ARG_INIT_baudrate, - ARG_INIT_polarity, - ARG_INIT_phase, - ARG_INIT_bits, - ARG_INIT_firstbit -}; - -STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args); -STATIC void machine_hard_spi_init(mp_obj_t self, mp_arg_val_t *args); -STATIC void machine_hard_spi_deinit(mp_obj_t self); - -/* common code for both soft and hard implementations *************************/ - -STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0 /* SPI_FIRSTBIT_MSB */} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[ARG_NEW_id].u_obj == MP_OBJ_NEW_SMALL_INT(-1)) { - // TODO: implement soft SPI - // return machine_soft_spi_make_new(args); - return mp_const_none; - } else { - // hardware peripheral id given - return machine_hard_spi_make_new(args); - } -} - -STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - }; - - // parse args - mp_obj_t self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_spi_type) { - machine_hard_spi_init(self, args); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init); - -STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) { - // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_spi_type) { - machine_hard_spi_deinit(self); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_spi_deinit_obj, machine_spi_deinit); - -STATIC const mp_rom_map_elem_t machine_spi_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_spi_deinit_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) }, - - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(HAL_SPI_MSB_FIRST) }, // SPI_FIRSTBIT_MSB - { MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(HAL_SPI_LSB_FIRST) }, // SPI_FIRSTBIT_LSB -}; - -STATIC MP_DEFINE_CONST_DICT(machine_spi_locals_dict, machine_spi_locals_dict_table); - -/* code for hard implementation ***********************************************/ - -STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_spi_obj_t *self = self_in; - spi_print(print, self->spi, false); -} - -STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args) { - // get static peripheral object - int spi_id = spi_find(args[ARG_NEW_id].u_obj); - const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id]; - - // here we would check the sck/mosi/miso pins and configure them - if (args[ARG_NEW_sck].u_obj != MP_OBJ_NULL - && args[ARG_NEW_mosi].u_obj != MP_OBJ_NULL - && args[ARG_NEW_miso].u_obj != MP_OBJ_NULL) { - - self->spi->init.clk_pin = args[ARG_NEW_sck].u_obj; - self->spi->init.mosi_pin = args[ARG_NEW_mosi].u_obj; - self->spi->init.miso_pin = args[ARG_NEW_miso].u_obj; - } else { - self->spi->init.clk_pin = &MICROPY_HW_SPI0_SCK; - self->spi->init.mosi_pin = &MICROPY_HW_SPI0_MOSI; - self->spi->init.miso_pin = &MICROPY_HW_SPI0_MISO; - } - - int baudrate = args[ARG_NEW_baudrate].u_int; - - if (baudrate <= 125000) { - self->spi->init.freq = HAL_SPI_FREQ_125_Kbps; - } else if (baudrate <= 250000) { - self->spi->init.freq = HAL_SPI_FREQ_250_Kbps; - } else if (baudrate <= 500000) { - self->spi->init.freq = HAL_SPI_FREQ_500_Kbps; - } else if (baudrate <= 1000000) { - self->spi->init.freq = HAL_SPI_FREQ_1_Mbps; - } else if (baudrate <= 2000000) { - self->spi->init.freq = HAL_SPI_FREQ_2_Mbps; - } else if (baudrate <= 4000000) { - self->spi->init.freq = HAL_SPI_FREQ_4_Mbps; - } else if (baudrate <= 8000000) { - self->spi->init.freq = HAL_SPI_FREQ_8_Mbps; -#if NRF52840_XXAA - } else if (baudrate <= 16000000) { - self->spi->init.freq = HAL_SPI_FREQ_16_Mbps; - } else if (baudrate <= 32000000) { - self->spi->init.freq = HAL_SPI_FREQ_32_Mbps; -#endif - } else { // Default - self->spi->init.freq = HAL_SPI_FREQ_1_Mbps; - } -#ifdef NRF51 - self->spi->init.irq_priority = 3; -#else - self->spi->init.irq_priority = 6; -#endif - self->spi->init.mode = HAL_SPI_MODE_CPOL0_CPHA0; - self->spi->init.firstbit = (args[ARG_NEW_firstbit].u_int == 0) ? HAL_SPI_MSB_FIRST : HAL_SPI_LSB_FIRST;; - hal_spi_master_init(self->spi->instance, &self->spi->init); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC void machine_hard_spi_init(mp_obj_t self_in, mp_arg_val_t *args) { -} - -STATIC void machine_hard_spi_deinit(mp_obj_t self_in) { - machine_hard_spi_obj_t *self = self_in; - spi_deinit(self->spi); -} - -STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_transfer(self, len, src, dest); -} - - -STATIC mp_obj_t mp_machine_spi_read(size_t n_args, const mp_obj_t *args) { - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(args[1])); - memset(vstr.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, vstr.len); - spi_transfer(args[0], vstr.len, vstr.buf, vstr.buf); - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj, 2, 3, mp_machine_spi_read); - -STATIC mp_obj_t mp_machine_spi_readinto(size_t n_args, const mp_obj_t *args) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); - memset(bufinfo.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, bufinfo.len); - spi_transfer(args[0], bufinfo.len, bufinfo.buf, bufinfo.buf); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj, 2, 3, mp_machine_spi_readinto); - -STATIC mp_obj_t mp_machine_spi_write(mp_obj_t self, mp_obj_t wr_buf) { - mp_buffer_info_t src; - mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ); - spi_transfer(self, src.len, (const uint8_t*)src.buf, NULL); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj, mp_machine_spi_write); - -STATIC mp_obj_t mp_machine_spi_write_readinto(mp_obj_t self, mp_obj_t wr_buf, mp_obj_t rd_buf) { - mp_buffer_info_t src; - mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ); - mp_buffer_info_t dest; - mp_get_buffer_raise(rd_buf, &dest, MP_BUFFER_WRITE); - if (src.len != dest.len) { - mp_raise_ValueError("buffers must be the same length"); - } - spi_transfer(self, src.len, src.buf, dest.buf); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj, mp_machine_spi_write_readinto); - - -STATIC const mp_machine_spi_p_t machine_hard_spi_p = { - .transfer = machine_hard_spi_transfer, -}; - -const mp_obj_type_t machine_hard_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = machine_hard_spi_print, - .make_new = machine_spi_make_new, - .protocol = &machine_hard_spi_p, - .locals_dict = (mp_obj_dict_t*)&machine_spi_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_HW_SPI diff --git a/ports/nrf/modules/machine/spi.h b/ports/nrf/modules/machine/spi.h deleted file mode 100644 index 71053fc276d17..0000000000000 --- a/ports/nrf/modules/machine/spi.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include "py/obj.h" - -#include "hal_spi.h" - -typedef struct _machine_hard_spi_obj_t { - mp_obj_base_t base; - SPI_HandleTypeDef *spi; -} machine_hard_spi_obj_t; - -extern const mp_obj_type_t machine_hard_spi_type; - -void spi_init0(void); diff --git a/ports/nrf/modules/machine/temp.c b/ports/nrf/modules/machine/temp.c deleted file mode 100644 index 9f1840c6ef6ef..0000000000000 --- a/ports/nrf/modules/machine/temp.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Bander F. Ajba - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "temp.h" -#include "hal_temp.h" - -#if MICROPY_PY_MACHINE_TEMP - -typedef struct _machine_temp_obj_t { - mp_obj_base_t base; -} machine_temp_obj_t; - -/// \method __str__() -/// Return a string describing the Temp object. -STATIC void machine_temp_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - machine_temp_obj_t *self = o; - - (void)self; - - mp_printf(print, "Temp"); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -STATIC mp_obj_t machine_temp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - machine_temp_obj_t *self = m_new_obj(machine_temp_obj_t); - - self->base.type = &machine_temp_type; - - return MP_OBJ_FROM_PTR(self); -} - -/// \method read() -/// Get temperature. -STATIC mp_obj_t machine_temp_read(mp_uint_t n_args, const mp_obj_t *args) { - - return MP_OBJ_NEW_SMALL_INT(hal_temp_read()); -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_temp_read_obj, 0, 1, machine_temp_read); - -STATIC const mp_rom_map_elem_t machine_temp_locals_dict_table[] = { - // instance methods - // class methods - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_temp_read_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_temp_locals_dict, machine_temp_locals_dict_table); - -const mp_obj_type_t machine_temp_type = { - { &mp_type_type }, - .name = MP_QSTR_Temp, - .make_new = machine_temp_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_temp_locals_dict, - .print = machine_temp_print, -}; - -#endif // MICROPY_PY_MACHINE_TEMP diff --git a/ports/nrf/modules/machine/temp.h b/ports/nrf/modules/machine/temp.h deleted file mode 100644 index e8f751bdfa3c7..0000000000000 --- a/ports/nrf/modules/machine/temp.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Bander F. Ajba - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef TEMP_H__ -#define TEMP_H__ - -extern const mp_obj_type_t machine_temp_type; - -int32_t temp_read(void); - -#endif // TEMP_H__ diff --git a/ports/nrf/modules/machine/timer.c b/ports/nrf/modules/machine/timer.c deleted file mode 100644 index c8eb2ef30bb5c..0000000000000 --- a/ports/nrf/modules/machine/timer.c +++ /dev/null @@ -1,194 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "timer.h" -#include "hal_timer.h" - -#if MICROPY_PY_MACHINE_TIMER - -typedef struct _machine_timer_obj_t { - mp_obj_base_t base; - hal_timer_conf_t * p_config; - mp_obj_t callback; - mp_int_t period; - mp_int_t mode; -} machine_timer_obj_t; - -static hal_timer_conf_t timer_config0 = {.id = 0}; -static hal_timer_conf_t timer_config1 = {.id = 1}; -static hal_timer_conf_t timer_config2 = {.id = 2}; - -#if NRF52 -static hal_timer_conf_t timer_config3 = {.id = 3}; -static hal_timer_conf_t timer_config4 = {.id = 4}; -#endif - -STATIC machine_timer_obj_t machine_timer_obj[] = { - {{&machine_timer_type}, &timer_config0}, - {{&machine_timer_type}, &timer_config1}, - {{&machine_timer_type}, &timer_config2}, -#if NRF52 - {{&machine_timer_type}, &timer_config3}, - {{&machine_timer_type}, &timer_config4}, -#endif -}; - -STATIC void hal_interrupt_handle(uint8_t id) { - machine_timer_obj_t * self = &machine_timer_obj[id]; - - mp_call_function_1(self->callback, self); - - if (self != NULL) { - hal_timer_stop(id); - if (self->mode == 1) { - hal_timer_start(id); - } - } -} - -void timer_init0(void) { - hal_timer_callback_set(hal_interrupt_handle); -} - -STATIC int timer_find(mp_obj_t id) { - // given an integer id - int timer_id = mp_obj_get_int(id); - if (timer_id >= 0 && timer_id < MP_ARRAY_SIZE(machine_timer_obj) - && machine_timer_obj[timer_id].p_config != NULL) { - return timer_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Timer(%d) does not exist", timer_id)); -} - -STATIC void timer_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - machine_timer_obj_t *self = o; - mp_printf(print, "Timer(%u)", self->p_config->id); -} - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -STATIC mp_obj_t machine_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int timer_id = timer_find(args[0].u_obj); - -#if BLUETOOTH_SD - if (timer_id == 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Timer(%d) reserved by Bluetooth LE stack.", timer_id)); - } -#endif - -#if MICROPY_PY_MACHINE_SOFT_PWM - if (timer_id == 1) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Timer(%d) reserved by ticker driver.", timer_id)); - } -#endif - - machine_timer_obj_t *self = &machine_timer_obj[timer_id]; - - self->p_config->period = args[1].u_int; - - self->mode = args[2].u_int; - - if (args[3].u_obj != mp_const_none) { - self->callback = args[3].u_obj; - } - -#ifdef NRF51 - self->p_config->irq_priority = 3; -#else - self->p_config->irq_priority = 6; -#endif - - hal_timer_init(self->p_config); - - return MP_OBJ_FROM_PTR(self); -} - -/// \method start(period) -/// Start the timer. -/// -STATIC mp_obj_t machine_timer_start(mp_obj_t self_in) { - machine_timer_obj_t * self = MP_OBJ_TO_PTR(self_in); - - hal_timer_start(self->p_config->id); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_start_obj, machine_timer_start); - -/// \method stop() -/// Stop the timer. -/// -STATIC mp_obj_t machine_timer_stop(mp_obj_t self_in) { - machine_timer_obj_t * self = MP_OBJ_TO_PTR(self_in); - - hal_timer_stop(self->p_config->id); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_timer_stop_obj, machine_timer_stop); - -STATIC const mp_rom_map_elem_t machine_timer_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_start), MP_ROM_PTR(&machine_timer_start_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&machine_timer_stop_obj) }, - - // constants - { MP_ROM_QSTR(MP_QSTR_ONESHOT), MP_ROM_INT(0) }, - { MP_ROM_QSTR(MP_QSTR_PERIODIC), MP_ROM_INT(1) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_timer_locals_dict, machine_timer_locals_dict_table); - -const mp_obj_type_t machine_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = timer_print, - .make_new = machine_timer_make_new, - .locals_dict = (mp_obj_dict_t*)&machine_timer_locals_dict -}; - -#endif // MICROPY_PY_MACHINE_TIMER diff --git a/ports/nrf/modules/machine/timer.h b/ports/nrf/modules/machine/timer.h deleted file mode 100644 index 2989dc69be448..0000000000000 --- a/ports/nrf/modules/machine/timer.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef TIMER_H__ -#define TIMER_H__ - -#include "hal_timer.h" - -extern const mp_obj_type_t machine_timer_type; - -void timer_init0(void); - -#endif // TIMER_H__ diff --git a/ports/nrf/modules/machine/uart.c b/ports/nrf/modules/machine/uart.c deleted file mode 100644 index 26b9ae7d360c1..0000000000000 --- a/ports/nrf/modules/machine/uart.c +++ /dev/null @@ -1,385 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/nlr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "pin.h" -//#include "genhdr/pins.h" -#include "pins.h" - -#include "uart.h" -#include "mpconfigboard.h" -#include "nrf.h" -#include "mphalport.h" -#include "hal_uart.h" - -typedef struct _machine_hard_uart_obj_t { - mp_obj_base_t base; - UART_HandleTypeDef * uart; - byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars -} machine_hard_uart_obj_t; - -UART_HandleTypeDef UARTHandle0 = {.p_instance = NULL, .init.id = 0}; -#if NRF52840_XXAA -UART_HandleTypeDef UARTHandle1 = {.p_instance = NULL, .init.id = 1}; -#endif - -STATIC machine_hard_uart_obj_t machine_hard_uart_obj[] = { - {{&machine_hard_uart_type}, &UARTHandle0}, -#if NRF52840_XXAA - {{&machine_hard_uart_type}, &UARTHandle1}, -#endif -}; - -void uart_init0(void) { - // reset the UART handles - memset(&UARTHandle0, 0, sizeof(UART_HandleTypeDef)); - UARTHandle0.p_instance = UART_BASE(0); - UARTHandle0.init.irq_num = UARTE0_UART0_IRQn; - -#if NRF52840_XXAA - memset(&UARTHandle1, 0, sizeof(UART_HandleTypeDef)); - UARTHandle0.p_instance = UART_BASE(1); -#endif -} - -STATIC int uart_find(mp_obj_t id) { - // given an integer id - int uart_id = mp_obj_get_int(id); - if (uart_id >= 0 && uart_id <= MP_ARRAY_SIZE(machine_hard_uart_obj) - && machine_hard_uart_obj[uart_id].uart != NULL) { - return uart_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "UART(%d) does not exist", uart_id)); -} - -//void uart_irq_handler(mp_uint_t uart_id) { -// -//} - -bool uart_rx_any(machine_hard_uart_obj_t *uart_obj) { - // TODO: uart will block for now. - return hal_uart_available(uart_obj->uart->p_instance) > 0; -} - -int uart_rx_char(machine_hard_uart_obj_t * self) { - uint8_t ch; - hal_uart_char_read(self->uart->p_instance, &ch); - return (int)ch; -} - -STATIC hal_uart_error_t uart_tx_char(machine_hard_uart_obj_t * self, int c) { - return hal_uart_char_write(self->uart->p_instance, (char)c); -} - - -void uart_tx_strn(machine_hard_uart_obj_t *uart_obj, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - uart_tx_char(uart_obj, *str); - } -} - -void uart_tx_strn_cooked(machine_hard_uart_obj_t *uart_obj, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - if (*str == '\n') { - uart_tx_char(uart_obj, '\r'); - } - uart_tx_char(uart_obj, *str); - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void machine_hard_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { -} - - - -/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, read_buf_len=64) -/// -/// Initialise the UART bus with the given parameters: -/// - `id`is bus id. -/// - `baudrate` is the clock rate. -/// - `bits` is the number of bits per byte, 7, 8 or 9. -/// - `parity` is the parity, `None`, 0 (even) or 1 (odd). -/// - `stop` is the number of stop bits, 1 or 2. -/// - `timeout` is the timeout in milliseconds to wait for the first character. -/// - `timeout_char` is the timeout in milliseconds to wait between characters. -/// - `read_buf_len` is the character length of the read buffer (0 to disable). -STATIC mp_obj_t machine_hard_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int uart_id = uart_find(args[0].u_obj); - machine_hard_uart_obj_t * self = &machine_hard_uart_obj[uart_id]; - - hal_uart_init_t * init = &self->uart->init; - - // flow control - init->flow_control = args[5].u_int; - -#if MICROPY_HW_UART1_HWFC - init->flow_control = true; -#else - init->flow_control = false; -#endif - init->use_parity = false; -#if (BLUETOOTH_SD == 100) - init->irq_priority = 3; -#else - init->irq_priority = 6; -#endif - - switch (args[1].u_int) { - case 1200: - init->baud_rate = HAL_UART_BAUD_1K2; - break; - case 2400: - init->baud_rate = HAL_UART_BAUD_2K4; - break; - case 4800: - init->baud_rate = HAL_UART_BAUD_4K8; - break; - case 9600: - init->baud_rate = HAL_UART_BAUD_9K6; - break; - case 14400: - init->baud_rate = HAL_UART_BAUD_14K4; - break; - case 19200: - init->baud_rate = HAL_UART_BAUD_19K2; - break; - case 28800: - init->baud_rate = HAL_UART_BAUD_28K8; - break; - case 38400: - init->baud_rate = HAL_UART_BAUD_38K4; - break; - case 57600: - init->baud_rate = HAL_UART_BAUD_57K6; - break; - case 76800: - init->baud_rate = HAL_UART_BAUD_76K8; - break; - case 115200: - init->baud_rate = HAL_UART_BAUD_115K2; - break; - case 230400: - init->baud_rate = HAL_UART_BAUD_230K4; - break; - case 250000: - init->baud_rate = HAL_UART_BAUD_250K0; - break; - case 500000: - init->baud_rate = HAL_UART_BAUD_500K0; - break; - case 1000000: - init->baud_rate = HAL_UART_BAUD_1M0; - break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "UART baudrate not supported, %ul", init->baud_rate)); - break; - } - - init->rx_pin = &MICROPY_HW_UART1_RX; - init->tx_pin = &MICROPY_HW_UART1_TX; - -#if MICROPY_HW_UART1_HWFC - init->rts_pin = &MICROPY_HW_UART1_RTS; - init->cts_pin = &MICROPY_HW_UART1_CTS; -#endif - - hal_uart_init(self->uart->p_instance, init); - - return MP_OBJ_FROM_PTR(self); -} - -/// \method writechar(char) -/// Write a single character on the bus. `char` is an integer to write. -/// Return value: `None`. -STATIC mp_obj_t machine_hard_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) { - machine_hard_uart_obj_t *self = self_in; - - // get the character to write (might be 9 bits) - uint16_t data = mp_obj_get_int(char_in); - - hal_uart_error_t err = 0; - for (int i = 0; i < 2; i++) { - err = uart_tx_char(self, (int)(&data)[i]); - } - - HAL_StatusTypeDef status = self->uart->p_instance->EVENTS_ERROR; - - if (err != HAL_UART_ERROR_NONE) { - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_hard_uart_writechar_obj, machine_hard_uart_writechar); - -/// \method readchar() -/// Receive a single character on the bus. -/// Return value: The character read, as an integer. Returns -1 on timeout. -STATIC mp_obj_t machine_hard_uart_readchar(mp_obj_t self_in) { - machine_hard_uart_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_hard_uart_readchar_obj, machine_hard_uart_readchar); - -// uart.sendbreak() -STATIC mp_obj_t machine_hard_uart_sendbreak(mp_obj_t self_in) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_hard_uart_sendbreak_obj, machine_hard_uart_sendbreak); - -STATIC const mp_rom_map_elem_t machine_hard_uart_locals_dict_table[] = { - // instance methods - /// \method read([nbytes]) - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - /// \method readline() - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - /// \method readinto(buf[, nbytes]) - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - /// \method writechar(buf) - { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&machine_hard_uart_writechar_obj) }, - { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&machine_hard_uart_readchar_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_hard_uart_sendbreak_obj) }, - - // class constants -/* - { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, - { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, -*/ -}; - -STATIC MP_DEFINE_CONST_DICT(machine_hard_uart_locals_dict, machine_hard_uart_locals_dict_table); - -STATIC mp_uint_t machine_hard_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - machine_hard_uart_obj_t *self = self_in; - byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - // convert byte size to char size - size >>= self->char_width; - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // read the data - byte * orig_buf = buf; - for (;;) { - int data = uart_rx_char(self); - - *buf++ = data; - - if (--size == 0) { - // return number of bytes read - return buf - orig_buf; - } - } -} - -STATIC mp_uint_t machine_hard_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - machine_hard_uart_obj_t *self = self_in; - const byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - hal_uart_error_t err = 0; - for (int i = 0; i < size; i++) { - err = uart_tx_char(self, (int)((uint8_t *)buf)[i]); - } - - if (err == HAL_UART_ERROR_NONE) { - // return number of bytes written - return size; - } else { - *errcode = mp_hal_status_to_errno_table[err]; - return MP_STREAM_ERROR; - } -} - -STATIC mp_uint_t machine_hard_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - machine_hard_uart_obj_t *self = self_in; - (void)self; - return MP_STREAM_ERROR; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = machine_hard_uart_read, - .write = machine_hard_uart_write, - .ioctl = machine_hard_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t machine_hard_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = machine_hard_uart_print, - .make_new = machine_hard_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&machine_hard_uart_locals_dict, -}; - diff --git a/ports/nrf/modules/machine/uart.h b/ports/nrf/modules/machine/uart.h deleted file mode 100644 index a4453eadff3b8..0000000000000 --- a/ports/nrf/modules/machine/uart.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef UART_H__ -#define UART_H__ - -typedef enum { - PYB_UART_NONE = 0, - PYB_UART_1 = 1, -} pyb_uart_t; - -typedef struct _machine_hard_uart_obj_t machine_hard_uart_obj_t; -extern const mp_obj_type_t machine_hard_uart_type; - -void uart_init0(void); -void uart_deinit(void); -void uart_irq_handler(mp_uint_t uart_id); - -bool uart_rx_any(machine_hard_uart_obj_t * uart_obj); -int uart_rx_char(machine_hard_uart_obj_t * uart_obj); -void uart_tx_strn(machine_hard_uart_obj_t * uart_obj, const char *str, uint len); -void uart_tx_strn_cooked(machine_hard_uart_obj_t *uart_obj, const char *str, uint len); - -#endif diff --git a/ports/nrf/modules/music/modmusic.c b/ports/nrf/modules/music/modmusic.c deleted file mode 100644 index c2afc341cbdbf..0000000000000 --- a/ports/nrf/modules/music/modmusic.c +++ /dev/null @@ -1,517 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" - -#if MICROPY_PY_MUSIC - -// #include "microbitobj.h" -// #include "microbitmusic.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "modmusic.h" -#include "musictunes.h" -#include "softpwm.h" -#include "ticker.h" -#include "pin.h" -#include "genhdr/pins.h" - -#define DEFAULT_BPM 120 -#define DEFAULT_TICKS 4 // i.e. 4 ticks per beat -#define DEFAULT_OCTAVE 4 // C4 is middle C -#define DEFAULT_DURATION 4 // Crotchet -#define ARTICULATION_MS 10 // articulation between notes in milliseconds - -typedef struct _music_data_t { - uint16_t bpm; - uint16_t ticks; - - // store these to simplify the writing process - uint8_t last_octave; - uint8_t last_duration; - - // Asynchronous parts. - volatile uint8_t async_state; - bool async_loop; - uint32_t async_wait_ticks; - uint16_t async_notes_len; - uint16_t async_notes_index; - const pin_obj_t *async_pin; - mp_obj_t async_note; -} music_data_t; - -enum { - ASYNC_MUSIC_STATE_IDLE, - ASYNC_MUSIC_STATE_NEXT_NOTE, - ASYNC_MUSIC_STATE_ARTICULATE, -}; - -#define music_data MP_STATE_PORT(music_data) - -extern volatile uint32_t ticks; - -STATIC uint32_t start_note(const char *note_str, size_t note_len, const pin_obj_t *pin); - -void microbit_music_init0(void) { - softpwm_init(); - ticker_init(microbit_music_tick); - ticker_start(); - pwm_start(); -} - -void microbit_music_tick(void) { - if (music_data == NULL) { - // music module not yet imported - return; - } - - if (music_data->async_state == ASYNC_MUSIC_STATE_IDLE) { - // nothing to do - return; - } - - if (ticks < music_data->async_wait_ticks) { - // need to wait for timeout to expire - return; - } - - if (music_data->async_state == ASYNC_MUSIC_STATE_ARTICULATE) { - // turn off output and rest - pwm_set_duty_cycle(music_data->async_pin->pin, 0); // TODO: remove pin setting. - music_data->async_wait_ticks = ticks + ARTICULATION_MS; - music_data->async_state = ASYNC_MUSIC_STATE_NEXT_NOTE; - } else if (music_data->async_state == ASYNC_MUSIC_STATE_NEXT_NOTE) { - // play next note - if (music_data->async_notes_index >= music_data->async_notes_len) { - if (music_data->async_loop) { - music_data->async_notes_index = 0; - } else { - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; -// TODO: microbit_obj_pin_free(music_data->async_pin); - music_data->async_pin = NULL; - return; - } - } - mp_obj_t note; - if (music_data->async_notes_len == 1) { - note = music_data->async_note; - } else { - note = ((mp_obj_t*)music_data->async_note)[music_data->async_notes_index]; - } - if (note == mp_const_none) { - // a rest (is this even used anymore?) - pwm_set_duty_cycle(music_data->async_pin->pin, 0); // TODO: remove pin setting. - music_data->async_wait_ticks = 60000 / music_data->bpm; - music_data->async_state = ASYNC_MUSIC_STATE_NEXT_NOTE; - } else { - // a note - mp_uint_t note_len; - const char *note_str = mp_obj_str_get_data(note, ¬e_len); - uint32_t delay_on = start_note(note_str, note_len, music_data->async_pin); - music_data->async_wait_ticks = ticks + delay_on; - music_data->async_notes_index += 1; - music_data->async_state = ASYNC_MUSIC_STATE_ARTICULATE; - } - } -} - -STATIC void wait_async_music_idle(void) { - // wait for the async music state to become idle - while (music_data->async_state != ASYNC_MUSIC_STATE_IDLE) { - // allow CTRL-C to stop the music - if (MP_STATE_VM(mp_pending_exception) != MP_OBJ_NULL) { - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; - pwm_set_duty_cycle(music_data->async_pin->pin, 0); // TODO: remove pin setting. - break; - } - } -} - -STATIC uint32_t start_note(const char *note_str, size_t note_len, const pin_obj_t *pin) { - pwm_set_duty_cycle(pin->pin, 128); // TODO: remove pin setting. - - // [NOTE](#|b)(octave)(:length) - // technically, c4 is middle c, so we'll go with that... - // if we define A as 0 and G as 7, then we can use the following - // array of us periods - - // these are the periods of note4 (the octave ascending from middle c) from A->B then C->G - STATIC uint16_t periods_us[] = {2273, 2025, 3822, 3405, 3034, 2863, 2551}; - // A#, -, C#, D#, -, F#, G# - STATIC uint16_t periods_sharps_us[] = {2145, 0, 3608, 3214, 0, 2703, 2408}; - - // we'll represent the note as an integer (A=0, G=6) - // TODO: validate the note - uint8_t note_index = (note_str[0] & 0x1f) - 1; - - // TODO: the duration and bpm should be persistent between notes - uint32_t ms_per_tick = (60000 / music_data->bpm) / music_data->ticks; - - int8_t octave = 0; - bool sharp = false; - - size_t current_position = 1; - - // parse sharp or flat - if (current_position < note_len && (note_str[current_position] == '#' || note_str[current_position] == 'b')) { - if (note_str[current_position] == 'b') { - // make sure we handle wrapping round gracefully - if (note_index == 0) { - note_index = 6; - } else { - note_index--; - } - - // handle the unusual edge case of Cb - if (note_index == 1) { - octave--; - } - } - - sharp = true; - current_position++; - } - - // parse the octave - if (current_position < note_len && note_str[current_position] != ':') { - // currently this will only work with a one digit number - // use +=, since the sharp/flat code changes octave to compensate. - music_data->last_octave = (note_str[current_position] & 0xf); - current_position++; - } - - octave += music_data->last_octave; - - // parse the duration - if (current_position < note_len && note_str[current_position] == ':') { - // I'll make this handle up to two digits for the time being. - current_position++; - - if (current_position < note_len) { - music_data->last_duration = note_str[current_position] & 0xf; - - current_position++; - if (current_position < note_len) { - music_data->last_duration *= 10; - music_data->last_duration += note_str[current_position] & 0xf; - } - } else { - // technically, this should be a syntax error, since this means - // that no duration has been specified. For the time being, - // we'll let you off :D - } - } - // play the note! - - // make the octave relative to octave 4 - octave -= 4; - - // 18 is 'r' or 'R' - if (note_index < 10) { - uint32_t period; - if (sharp) { - if (octave >= 0) { - period = periods_sharps_us[note_index] >> octave; - } - else { - period = periods_sharps_us[note_index] << -octave; - } - } else { - if (octave >= 0) { - period = periods_us[note_index] >> octave; - } - else { - period = periods_us[note_index] << -octave; - } - } - pwm_set_period_us(period); - } else { - pwm_set_duty_cycle(pin->pin, 0); // TODO: remove pin setting. - } - - // Cut off a short time from end of note so we hear articulation. - mp_int_t gap_ms = (ms_per_tick * music_data->last_duration) - ARTICULATION_MS; - if (gap_ms < ARTICULATION_MS) { - gap_ms = ARTICULATION_MS; - } - return gap_ms; -} - -STATIC mp_obj_t microbit_music_reset(void) { - music_data->bpm = DEFAULT_BPM; - music_data->ticks = DEFAULT_TICKS; - music_data->last_octave = DEFAULT_OCTAVE; - music_data->last_duration = DEFAULT_DURATION; - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(microbit_music_reset_obj, microbit_music_reset); - -STATIC mp_obj_t microbit_music_get_tempo(void) { - mp_obj_t tempo_tuple[2]; - - tempo_tuple[0] = mp_obj_new_int(music_data->bpm); - tempo_tuple[1] = mp_obj_new_int(music_data->ticks); - - return mp_obj_new_tuple(2, tempo_tuple); -} -MP_DEFINE_CONST_FUN_OBJ_0(microbit_music_get_tempo_obj, microbit_music_get_tempo); - -STATIC mp_obj_t microbit_music_stop(mp_uint_t n_args, const mp_obj_t *args) { - const pin_obj_t *pin; - if (n_args == 0) { -#ifdef MICROPY_HW_MUSIC_PIN - pin = &MICROPY_HW_MUSIC_PIN; -#else - mp_raise_ValueError("pin parameter not given"); -#endif - } else { - pin = (pin_obj_t *)args[0]; - } - (void)pin; - // Raise exception if the pin we are trying to stop is not in a compatible mode. -// TODO: microbit_obj_pin_acquire(pin, microbit_pin_mode_music); - pwm_set_duty_cycle(pin->pin, 0); // TODO: remove pin setting. -// TODO: microbit_obj_pin_free(pin); - music_data->async_pin = NULL; - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(microbit_music_stop_obj, 0, 1, microbit_music_stop); - -STATIC mp_obj_t microbit_music_play(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_music, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_pin, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_wait, MP_ARG_BOOL, {.u_bool = true} }, - { MP_QSTR_loop, MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // reset octave and duration so tunes always play the same - music_data->last_octave = DEFAULT_OCTAVE; - music_data->last_duration = DEFAULT_DURATION; - - // get either a single note or a list of notes - mp_uint_t len; - mp_obj_t *items; - if (MP_OBJ_IS_STR_OR_BYTES(args[0].u_obj)) { - len = 1; - items = &args[0].u_obj; - } else { - mp_obj_get_array(args[0].u_obj, &len, &items); - } - - // Release the previous pin -// TODO: microbit_obj_pin_free(music_data->async_pin); - music_data->async_pin = NULL; - - // get the pin to play on - const pin_obj_t *pin; - if (args[1].u_obj == MP_OBJ_NULL) { -#ifdef MICROPY_HW_MUSIC_PIN - pin = &MICROPY_HW_MUSIC_PIN; -#else - mp_raise_ValueError("pin parameter not given"); -#endif - } else { - pin = (pin_obj_t *)args[1].u_obj; - } - // TODO: microbit_obj_pin_acquire(pin, microbit_pin_mode_music); - - // start the tune running in the background - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; - music_data->async_wait_ticks = ticks; - music_data->async_loop = args[3].u_bool; - music_data->async_notes_len = len; - music_data->async_notes_index = 0; - if (len == 1) { - // If a string was passed as a single note then we can't store a pointer - // to args[0].u_obj, so instead store the single string directly (also - // works if a tuple/list of one element was passed). - music_data->async_note = items[0]; - } else { - music_data->async_note = items; - } - music_data->async_pin = pin; - music_data->async_state = ASYNC_MUSIC_STATE_NEXT_NOTE; - - if (args[2].u_bool) { - // wait for tune to finish - wait_async_music_idle(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(microbit_music_play_obj, 0, microbit_music_play); - -STATIC mp_obj_t microbit_music_pitch(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_frequency, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_duration, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_pin, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_wait, MP_ARG_BOOL, {.u_bool = true} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the parameters - mp_uint_t frequency = args[0].u_int; - mp_int_t duration = args[1].u_int; - - // get the pin to play on - const pin_obj_t *pin; - if (args[2].u_obj == MP_OBJ_NULL) { -#ifdef MICROPY_HW_MUSIC_PIN - pin = &MICROPY_HW_MUSIC_PIN; -#else - mp_raise_ValueError("pin parameter not given"); -#endif - } else { - pin = (pin_obj_t *)args[2].u_obj; - } - - // Update pin modes -//TODO: microbit_obj_pin_free(music_data->async_pin); - music_data->async_pin = NULL; -//TODO: microbit_obj_pin_acquire(pin, microbit_pin_mode_music); - bool wait = args[3].u_bool; - pwm_set_duty_cycle(pin->pin, 128); // TODO: remove pin setting. - if (frequency == 0) { -//TODO: pwm_release(pin->name); - } else if (pwm_set_period_us(1000000/frequency)) { - pwm_release(pin->pin); // TODO: remove pin setting. - mp_raise_ValueError("invalid pitch"); - } - if (duration >= 0) { - // use async machinery to stop the pitch after the duration - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; - music_data->async_wait_ticks = ticks + duration; - music_data->async_loop = false; - music_data->async_notes_len = 0; - music_data->async_notes_index = 0; - music_data->async_note = NULL; - music_data->async_pin = pin; - music_data->async_state = ASYNC_MUSIC_STATE_ARTICULATE; - - if (wait) { - // wait for the pitch to finish - wait_async_music_idle(); - } - } else { - // don't block here, since there's no reason to leave a pitch forever in a blocking C function - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(microbit_music_pitch_obj, 0, microbit_music_pitch); - -STATIC mp_obj_t microbit_music_set_tempo(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_ticks, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bpm, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[0].u_int != 0) { - // set ticks - music_data->ticks = args[0].u_int; - } - - if (args[1].u_int != 0) { - music_data->bpm = args[1].u_int; - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(microbit_music_set_tempo_obj, 0, microbit_music_set_tempo); - - -static mp_obj_t music_init(void) { - microbit_music_init0(); - - music_data = m_new_obj(music_data_t); - music_data->bpm = DEFAULT_BPM; - music_data->ticks = DEFAULT_TICKS; - music_data->last_octave = DEFAULT_OCTAVE; - music_data->last_duration = DEFAULT_DURATION; - music_data->async_state = ASYNC_MUSIC_STATE_IDLE; - music_data->async_pin = NULL; - music_data->async_note = NULL; - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(music___init___obj, music_init); - -STATIC const mp_rom_map_elem_t microbit_music_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___init__), MP_ROM_PTR(&music___init___obj) }, - - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(µbit_music_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_set_tempo), MP_ROM_PTR(µbit_music_set_tempo_obj) }, - { MP_ROM_QSTR(MP_QSTR_get_tempo), MP_ROM_PTR(µbit_music_get_tempo_obj) }, - { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(µbit_music_play_obj) }, - { MP_ROM_QSTR(MP_QSTR_pitch), MP_ROM_PTR(µbit_music_pitch_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(µbit_music_stop_obj) }, - - { MP_ROM_QSTR(MP_QSTR_DADADADUM), MP_ROM_PTR(µbit_music_tune_dadadadum_obj) }, - { MP_ROM_QSTR(MP_QSTR_ENTERTAINER), MP_ROM_PTR(µbit_music_tune_entertainer_obj) }, - { MP_ROM_QSTR(MP_QSTR_PRELUDE), MP_ROM_PTR(µbit_music_tune_prelude_obj) }, - { MP_ROM_QSTR(MP_QSTR_ODE), MP_ROM_PTR(µbit_music_tune_ode_obj) }, - { MP_ROM_QSTR(MP_QSTR_NYAN), MP_ROM_PTR(µbit_music_tune_nyan_obj) }, - { MP_ROM_QSTR(MP_QSTR_RINGTONE), MP_ROM_PTR(µbit_music_tune_ringtone_obj) }, - { MP_ROM_QSTR(MP_QSTR_FUNK), MP_ROM_PTR(µbit_music_tune_funk_obj) }, - { MP_ROM_QSTR(MP_QSTR_BLUES), MP_ROM_PTR(µbit_music_tune_blues_obj) }, - { MP_ROM_QSTR(MP_QSTR_BIRTHDAY), MP_ROM_PTR(µbit_music_tune_birthday_obj) }, - { MP_ROM_QSTR(MP_QSTR_WEDDING), MP_ROM_PTR(µbit_music_tune_wedding_obj) }, - { MP_ROM_QSTR(MP_QSTR_FUNERAL), MP_ROM_PTR(µbit_music_tune_funeral_obj) }, - { MP_ROM_QSTR(MP_QSTR_PUNCHLINE), MP_ROM_PTR(µbit_music_tune_punchline_obj) }, - { MP_ROM_QSTR(MP_QSTR_PYTHON), MP_ROM_PTR(µbit_music_tune_python_obj) }, - { MP_ROM_QSTR(MP_QSTR_BADDY), MP_ROM_PTR(µbit_music_tune_baddy_obj) }, - { MP_ROM_QSTR(MP_QSTR_CHASE), MP_ROM_PTR(µbit_music_tune_chase_obj) }, - { MP_ROM_QSTR(MP_QSTR_BA_DING), MP_ROM_PTR(µbit_music_tune_ba_ding_obj) }, - { MP_ROM_QSTR(MP_QSTR_WAWAWAWAA), MP_ROM_PTR(µbit_music_tune_wawawawaa_obj) }, - { MP_ROM_QSTR(MP_QSTR_JUMP_UP), MP_ROM_PTR(µbit_music_tune_jump_up_obj) }, - { MP_ROM_QSTR(MP_QSTR_JUMP_DOWN), MP_ROM_PTR(µbit_music_tune_jump_down_obj) }, - { MP_ROM_QSTR(MP_QSTR_POWER_UP), MP_ROM_PTR(µbit_music_tune_power_up_obj) }, - { MP_ROM_QSTR(MP_QSTR_POWER_DOWN), MP_ROM_PTR(µbit_music_tune_power_down_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(microbit_music_locals_dict, microbit_music_locals_dict_table); - -const mp_obj_module_t music_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)µbit_music_locals_dict, -}; - -#endif // MICROPY_PY_MUSIC diff --git a/ports/nrf/modules/music/modmusic.h b/ports/nrf/modules/music/modmusic.h deleted file mode 100644 index 8e64f021985f9..0000000000000 --- a/ports/nrf/modules/music/modmusic.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MICROPY_INCLUDED_MICROBIT_MUSIC_H__ -#define __MICROPY_INCLUDED_MICROBIT_MUSIC_H__ - -void microbit_music_init0(void); -void microbit_music_tick(void); - -#endif // __MICROPY_INCLUDED_MICROBIT_MUSIC_H__ diff --git a/ports/nrf/modules/music/musictunes.c b/ports/nrf/modules/music/musictunes.c deleted file mode 100644 index f5e7f4a519f71..0000000000000 --- a/ports/nrf/modules/music/musictunes.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The music encoded herein is either in the public domain, composed by - * Nicholas H.Tollervey or the composer is untraceable and covered by fair - * (educational) use. - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * Copyright (c) 2015 Nicholas H. Tollervey - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mphal.h" -#include "py/objtuple.h" - -#if MICROPY_PY_MUSIC - -#define N(q) MP_ROM_QSTR(MP_QSTR_ ## q) -#define T(name, ...) const mp_obj_tuple_t microbit_music_tune_ ## name ## _obj = {{&mp_type_tuple}, .len = (sizeof((mp_obj_t[]){__VA_ARGS__})/sizeof(mp_obj_t)), .items = {__VA_ARGS__}}; - - -T(dadadadum, - N(r4_colon_2), N(g), N(g), N(g), N(eb_colon_8), N(r_colon_2), N(f), N(f), - N(f), N(d_colon_8)); - -T(entertainer, - N(d4_colon_1), N(d_hash_), N(e), N(c5_colon_2), N(e4_colon_1), - N(c5_colon_2), N(e4_colon_1), N(c5_colon_3), N(c_colon_1), N(d), - N(d_hash_), N(e), N(c), N(d), N(e_colon_2), N(b4_colon_1), N(d5_colon_2), - N(c_colon_4)); - -T(prelude, - N(c4_colon_1), N(e), N(g), N(c5), N(e), N(g4), N(c5), N(e), N(c4), N(e), - N(g), N(c5), N(e), N(g4), N(c5), N(e), N(c4), N(d), N(g), N(d5), N(f), - N(g4), N(d5), N(f), N(c4), N(d), N(g), N(d5), N(f), N(g4), N(d5), N(f), - N(b3), N(d4), N(g), N(d5), N(f), N(g4), N(d5), N(f), N(b3), N(d4), N(g), - N(d5), N(f), N(g4), N(d5), N(f), N(c4), N(e), N(g), N(c5), N(e), N(g4), - N(c5), N(e), N(c4), N(e), N(g), N(c5), N(e), N(g4), N(c5), N(e)); - -T(ode, - N(e4), N(e), N(f), N(g), N(g), N(f), N(e), N(d), N(c), N(c), N(d), N(e), - N(e_colon_6), N(d_colon_2), N(d_colon_8), N(e_colon_4), N(e), N(f), N(g), - N(g), N(f), N(e), N(d), N(c), N(c), N(d), N(e), N(d_colon_6), - N(c_colon_2), N(c_colon_8)); - -T(nyan, - N(f_hash_5_colon_2), N(g_hash_), N(c_hash__colon_1), N(d_hash__colon_2), - N(b4_colon_1), N(d5_colon_1), N(c_hash_), N(b4_colon_2), N(b), - N(c_hash_5), N(d), N(d_colon_1), N(c_hash_), N(b4_colon_1), - N(c_hash_5_colon_1), N(d_hash_), N(f_hash_), N(g_hash_), N(d_hash_), - N(f_hash_), N(c_hash_), N(d), N(b4), N(c_hash_5), N(b4), - N(d_hash_5_colon_2), N(f_hash_), N(g_hash__colon_1), N(d_hash_), - N(f_hash_), N(c_hash_), N(d_hash_), N(b4), N(d5), N(d_hash_), N(d), - N(c_hash_), N(b4), N(c_hash_5), N(d_colon_2), N(b4_colon_1), N(c_hash_5), - N(d_hash_), N(f_hash_), N(c_hash_), N(d), N(c_hash_), N(b4), - N(c_hash_5_colon_2), N(b4), N(c_hash_5), N(b4), N(f_hash__colon_1), - N(g_hash_), N(b_colon_2), N(f_hash__colon_1), N(g_hash_), N(b), - N(c_hash_5), N(d_hash_), N(b4), N(e5), N(d_hash_), N(e), N(f_hash_), - N(b4_colon_2), N(b), N(f_hash__colon_1), N(g_hash_), N(b), N(f_hash_), - N(e5), N(d_hash_), N(c_hash_), N(b4), N(f_hash_), N(d_hash_), N(e), - N(f_hash_), N(b_colon_2), N(f_hash__colon_1), N(g_hash_), N(b_colon_2), - N(f_hash__colon_1), N(g_hash_), N(b), N(b), N(c_hash_5), N(d_hash_), - N(b4), N(f_hash_), N(g_hash_), N(f_hash_), N(b_colon_2), N(b_colon_1), - N(a_hash_), N(b), N(f_hash_), N(g_hash_), N(b), N(e5), N(d_hash_), N(e), - N(f_hash_), N(b4_colon_2), N(c_hash_5)); - -T(ringtone, - N(c4_colon_1), N(d), N(e_colon_2), N(g), N(d_colon_1), N(e), N(f_colon_2), - N(a), N(e_colon_1), N(f), N(g_colon_2), N(b), N(c5_colon_4)); - -T(funk, - N(c2_colon_2), N(c), N(d_hash_), N(c_colon_1), N(f_colon_2), N(c_colon_1), - N(f_colon_2), N(f_hash_), N(g), N(c), N(c), N(g), N(c_colon_1), - N(f_hash__colon_2), N(c_colon_1), N(f_hash__colon_2), N(f), N(d_hash_)); - -T(blues, - N(c2_colon_2), N(e), N(g), N(a), N(a_hash_), N(a), N(g), N(e), - N(c2_colon_2), N(e), N(g), N(a), N(a_hash_), N(a), N(g), N(e), N(f), N(a), - N(c3), N(d), N(d_hash_), N(d), N(c), N(a2), N(c2_colon_2), N(e), N(g), - N(a), N(a_hash_), N(a), N(g), N(e), N(g), N(b), N(d3), N(f), N(f2), N(a), - N(c3), N(d_hash_), N(c2_colon_2), N(e), N(g), N(e), N(g), N(f), N(e), - N(d)); - -T(birthday, - N(c4_colon_3), N(c_colon_1), N(d_colon_4), N(c_colon_4), N(f), - N(e_colon_8), N(c_colon_3), N(c_colon_1), N(d_colon_4), N(c_colon_4), - N(g), N(f_colon_8), N(c_colon_3), N(c_colon_1), N(c5_colon_4), N(a4), - N(f), N(e), N(d), N(a_hash__colon_3), N(a_hash__colon_1), N(a_colon_4), - N(f), N(g), N(f_colon_8)); - -T(wedding, - N(c4_colon_4), N(f_colon_3), N(f_colon_1), N(f_colon_8), N(c_colon_4), - N(g_colon_3), N(e_colon_1), N(f_colon_8), N(c_colon_4), N(f_colon_3), - N(a_colon_1), N(c5_colon_4), N(a4_colon_3), N(f_colon_1), N(f_colon_4), - N(e_colon_3), N(f_colon_1), N(g_colon_8)); - -T(funeral, - N(c3_colon_4), N(c_colon_3), N(c_colon_1), N(c_colon_4), - N(d_hash__colon_3), N(d_colon_1), N(d_colon_3), N(c_colon_1), - N(c_colon_3), N(b2_colon_1), N(c3_colon_4)); - -T(punchline, - N(c4_colon_3), N(g3_colon_1), N(f_hash_), N(g), N(g_hash__colon_3), N(g), - N(r), N(b), N(c4)); - -T(python, - N(d5_colon_1), N(b4), N(r), N(b), N(b), N(a_hash_), N(b), N(g5), N(r), - N(d), N(d), N(r), N(b4), N(c5), N(r), N(c), N(c), N(r), N(d), - N(e_colon_5), N(c_colon_1), N(a4), N(r), N(a), N(a), N(g_hash_), N(a), - N(f_hash_5), N(r), N(e), N(e), N(r), N(c), N(b4), N(r), N(b), N(b), N(r), - N(c5), N(d_colon_5), N(d_colon_1), N(b4), N(r), N(b), N(b), N(a_hash_), - N(b), N(b5), N(r), N(g), N(g), N(r), N(d), N(c_hash_), N(r), N(a), N(a), - N(r), N(a), N(a_colon_5), N(g_colon_1), N(f_hash__colon_2), N(a_colon_1), - N(a), N(g_hash_), N(a), N(e_colon_2), N(a_colon_1), N(a), N(g_hash_), - N(a), N(d), N(r), N(c_hash_), N(d), N(r), N(c_hash_), N(d_colon_2), - N(r_colon_3)); - -T(baddy, - N(c3_colon_3), N(r), N(d_colon_2), N(d_hash_), N(r), N(c), N(r), N(f_hash__colon_8), ); - -T(chase, - N(a4_colon_1), N(b), N(c5), N(b4), N(a_colon_2), N(r), N(a_colon_1), N(b), N(c5), N(b4), N(a_colon_2), N(r), N(a_colon_2), N(e5), N(d_hash_), N(e), N(f), N(e), N(d_hash_), N(e), N(b4_colon_1), N(c5), N(d), N(c), N(b4_colon_2), N(r), N(b_colon_1), N(c5), N(d), N(c), N(b4_colon_2), N(r), N(b_colon_2), N(e5), N(d_hash_), N(e), N(f), N(e), N(d_hash_), N(e), ); - -T(ba_ding, - N(b5_colon_1), N(e6_colon_3), ); - -T(wawawawaa, - N(e3_colon_3), N(r_colon_1), N(d_hash__colon_3), N(r_colon_1), N(d_colon_4), N(r_colon_1), N(c_hash__colon_8), ); - -T(jump_up, - N(c5_colon_1), N(d), N(e), N(f), N(g), ); - -T(jump_down, - N(g5_colon_1), N(f), N(e), N(d), N(c), ); - -T(power_up, - N(g4_colon_1), N(c5), N(e), N(g_colon_2), N(e_colon_1), N(g_colon_3), ); - -T(power_down, - N(g5_colon_1), N(d_hash_), N(c), N(g4_colon_2), N(b_colon_1), N(c5_colon_3), ); - -#undef N -#undef T - -#endif // MICROPY_PY_MUSIC diff --git a/ports/nrf/modules/music/musictunes.h b/ports/nrf/modules/music/musictunes.h deleted file mode 100644 index 82dda5cc7a9fe..0000000000000 --- a/ports/nrf/modules/music/musictunes.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MUSIC_TUNES_H__ -#define MUSIC_TUNES_H__ - -extern const struct _mp_obj_tuple_t microbit_music_tune_dadadadum_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_entertainer_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_prelude_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_ode_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_nyan_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_ringtone_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_funk_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_blues_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_birthday_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_wedding_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_funeral_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_punchline_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_python_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_baddy_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_chase_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_ba_ding_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_wawawawaa_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_jump_up_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_jump_down_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_power_up_obj; -extern const struct _mp_obj_tuple_t microbit_music_tune_power_down_obj; - -#endif // MUSIC_TUNES_H__ diff --git a/ports/nrf/modules/pyb/modpyb.c b/ports/nrf/modules/pyb/modpyb.c deleted file mode 100644 index dc2f0ae5172b3..0000000000000 --- a/ports/nrf/modules/pyb/modpyb.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" -#include "lib/utils/pyexec.h" -#include "py/runtime.h" -#include "py/obj.h" -#include "led.h" -#include "nrf.h" // TODO: figure out where to put this import -#include "pin.h" - -#if MICROPY_HW_HAS_LED -#define PYB_LED_MODULE { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, -#else -#define PYB_LED_MODULE -#endif - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - PYB_LED_MODULE -/* { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) }*/ -}; - - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/nrf/modules/random/modrandom.c b/ports/nrf/modules/random/modrandom.c deleted file mode 100644 index 0e140750daf46..0000000000000 --- a/ports/nrf/modules/random/modrandom.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Paul Sokolovsky - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "hal_rng.h" - -#if MICROPY_PY_HW_RNG - -static inline int rand30() { - uint32_t val = hal_rng_generate(); - return (val & 0x3fffffff); // binary mask b00111111111111111111111111111111 -} - -static inline int randbelow(int n) { - return rand30() % n; -} - -STATIC mp_obj_t mod_random_getrandbits(mp_obj_t num_in) { - int n = mp_obj_get_int(num_in); - if (n > 30 || n == 0) { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } - uint32_t mask = ~0; - // Beware of C undefined behavior when shifting by >= than bit size - mask >>= (32 - n); - return mp_obj_new_int_from_uint(rand30() & mask); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_random_getrandbits_obj, mod_random_getrandbits); - -STATIC mp_obj_t mod_random_randrange(size_t n_args, const mp_obj_t *args) { - mp_int_t start = mp_obj_get_int(args[0]); - if (n_args == 1) { - // range(stop) - if (start > 0) { - return mp_obj_new_int(randbelow(start)); - } else { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } - } else { - mp_int_t stop = mp_obj_get_int(args[1]); - if (n_args == 2) { - // range(start, stop) - if (start < stop) { - return mp_obj_new_int(start + randbelow(stop - start)); - } else { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } - } else { - // range(start, stop, step) - mp_int_t step = mp_obj_get_int(args[2]); - mp_int_t n; - if (step > 0) { - n = (stop - start + step - 1) / step; - } else if (step < 0) { - n = (stop - start + step + 1) / step; - } else { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } - if (n > 0) { - return mp_obj_new_int(start + step * randbelow(n)); - } else { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } - } - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_random_randrange_obj, 1, 3, mod_random_randrange); - -STATIC mp_obj_t mod_random_randint(mp_obj_t a_in, mp_obj_t b_in) { - mp_int_t a = mp_obj_get_int(a_in); - mp_int_t b = mp_obj_get_int(b_in); - if (a <= b) { - return mp_obj_new_int(a + randbelow(b - a + 1)); - } else { - nlr_raise(mp_obj_new_exception(&mp_type_ValueError)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_random_randint_obj, mod_random_randint); - -STATIC mp_obj_t mod_random_choice(mp_obj_t seq) { - mp_int_t len = mp_obj_get_int(mp_obj_len(seq)); - if (len > 0) { - return mp_obj_subscr(seq, mp_obj_new_int(randbelow(len)), MP_OBJ_SENTINEL); - } else { - nlr_raise(mp_obj_new_exception(&mp_type_IndexError)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_random_choice_obj, mod_random_choice); - -#if MICROPY_PY_BUILTINS_FLOAT - -// returns a number in the range [0..1) using RNG to fill in the fraction bits -STATIC mp_float_t randfloat(void) { - #if MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_DOUBLE - typedef uint64_t mp_float_int_t; - #elif MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_FLOAT - typedef uint32_t mp_float_int_t; - #endif - union { - mp_float_t f; - #if MP_ENDIANNESS_LITTLE - struct { mp_float_int_t frc:MP_FLOAT_FRAC_BITS, exp:MP_FLOAT_EXP_BITS, sgn:1; } p; - #else - struct { mp_float_int_t sgn:1, exp:MP_FLOAT_EXP_BITS, frc:MP_FLOAT_FRAC_BITS; } p; - #endif - } u; - u.p.sgn = 0; - u.p.exp = (1 << (MP_FLOAT_EXP_BITS - 1)) - 1; - if (MP_FLOAT_FRAC_BITS <= 30) { - u.p.frc = rand30(); - } else { - u.p.frc = ((uint64_t)rand30() << 30) | (uint64_t)rand30(); - } - return u.f - 1; -} - -STATIC mp_obj_t mod_random_random(void) { - return mp_obj_new_float(randfloat()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_random_random_obj, mod_random_random); - -STATIC mp_obj_t mod_random_uniform(mp_obj_t a_in, mp_obj_t b_in) { - mp_float_t a = mp_obj_get_float(a_in); - mp_float_t b = mp_obj_get_float(b_in); - return mp_obj_new_float(a + (b - a) * randfloat()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_random_uniform_obj, mod_random_uniform); - -#endif - -STATIC const mp_rom_map_elem_t mp_module_random_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_random) }, - { MP_ROM_QSTR(MP_QSTR_getrandbits), MP_ROM_PTR(&mod_random_getrandbits_obj) }, - { MP_ROM_QSTR(MP_QSTR_randrange), MP_ROM_PTR(&mod_random_randrange_obj) }, - { MP_ROM_QSTR(MP_QSTR_randint), MP_ROM_PTR(&mod_random_randint_obj) }, - { MP_ROM_QSTR(MP_QSTR_choice), MP_ROM_PTR(&mod_random_choice_obj) }, -#if MICROPY_PY_BUILTINS_FLOAT - { MP_ROM_QSTR(MP_QSTR_random), MP_ROM_PTR(&mod_random_random_obj) }, - { MP_ROM_QSTR(MP_QSTR_uniform), MP_ROM_PTR(&mod_random_uniform_obj) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_random_globals, mp_module_random_globals_table); - -const mp_obj_module_t random_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_random_globals, -}; - -#endif // MICROPY_PY_HW_RNG diff --git a/ports/nrf/modules/ubluepy/modubluepy.c b/ports/nrf/modules/ubluepy/modubluepy.c deleted file mode 100644 index b306c065b2906..0000000000000 --- a/ports/nrf/modules/ubluepy/modubluepy.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" - -#if MICROPY_PY_UBLUEPY - -extern const mp_obj_type_t ubluepy_peripheral_type; -extern const mp_obj_type_t ubluepy_service_type; -extern const mp_obj_type_t ubluepy_uuid_type; -extern const mp_obj_type_t ubluepy_characteristic_type; -extern const mp_obj_type_t ubluepy_delegate_type; -extern const mp_obj_type_t ubluepy_constants_type; -extern const mp_obj_type_t ubluepy_scanner_type; -extern const mp_obj_type_t ubluepy_scan_entry_type; - -STATIC const mp_rom_map_elem_t mp_module_ubluepy_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ubluepy) }, -#if MICROPY_PY_UBLUEPY_PERIPHERAL - { MP_ROM_QSTR(MP_QSTR_Peripheral), MP_ROM_PTR(&ubluepy_peripheral_type) }, -#endif -#if 0 // MICROPY_PY_UBLUEPY_CENTRAL - { MP_ROM_QSTR(MP_QSTR_Central), MP_ROM_PTR(&ubluepy_central_type) }, -#endif -#if MICROPY_PY_UBLUEPY_CENTRAL - { MP_ROM_QSTR(MP_QSTR_Scanner), MP_ROM_PTR(&ubluepy_scanner_type) }, - { MP_ROM_QSTR(MP_QSTR_ScanEntry), MP_ROM_PTR(&ubluepy_scan_entry_type) }, -#endif - { MP_ROM_QSTR(MP_QSTR_DefaultDelegate), MP_ROM_PTR(&ubluepy_delegate_type) }, - { MP_ROM_QSTR(MP_QSTR_UUID), MP_ROM_PTR(&ubluepy_uuid_type) }, - { MP_ROM_QSTR(MP_QSTR_Service), MP_ROM_PTR(&ubluepy_service_type) }, - { MP_ROM_QSTR(MP_QSTR_Characteristic), MP_ROM_PTR(&ubluepy_characteristic_type) }, - { MP_ROM_QSTR(MP_QSTR_constants), MP_ROM_PTR(&ubluepy_constants_type) }, -#if MICROPY_PY_UBLUEPY_DESCRIPTOR - { MP_ROM_QSTR(MP_QSTR_Descriptor), MP_ROM_PTR(&ubluepy_descriptor_type) }, -#endif -}; - - -STATIC MP_DEFINE_CONST_DICT(mp_module_ubluepy_globals, mp_module_ubluepy_globals_table); - -const mp_obj_module_t mp_module_ubluepy = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_ubluepy_globals, -}; - -#endif // MICROPY_PY_UBLUEPY diff --git a/ports/nrf/modules/ubluepy/modubluepy.h b/ports/nrf/modules/ubluepy/modubluepy.h deleted file mode 100644 index 83d86c5dfd6f3..0000000000000 --- a/ports/nrf/modules/ubluepy/modubluepy.h +++ /dev/null @@ -1,200 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef UBLUEPY_H__ -#define UBLUEPY_H__ - -/* Examples: - -Advertisment: - -from ubluepy import Peripheral -p = Peripheral() -p.advertise(device_name="MicroPython") - -DB setup: - -from ubluepy import Service, Characteristic, UUID, Peripheral, constants -from pyb import LED - -def event_handler(id, handle, data): - print("BLE event:", id, "handle:", handle) - print(data) - - if id == constants.EVT_GAP_CONNECTED: - # connected - LED(2).on() - elif id == constants.EVT_GAP_DISCONNECTED: - # disconnect - LED(2).off() - elif id == 80: - print("id 80, data:", data) - -# u0 = UUID("0x180D") # HRM service -# u1 = UUID("0x2A37") # HRM measurement - -u0 = UUID("6e400001-b5a3-f393-e0a9-e50e24dcca9e") -u1 = UUID("6e400002-b5a3-f393-e0a9-e50e24dcca9e") -u2 = UUID("6e400003-b5a3-f393-e0a9-e50e24dcca9e") -s = Service(u0) -c0 = Characteristic(u1, props = Characteristic.PROP_WRITE | Characteristic.PROP_WRITE_WO_RESP) -c1 = Characteristic(u2, props = Characteristic.PROP_NOTIFY, attrs = Characteristic.ATTR_CCCD) -s.addCharacteristic(c0) -s.addCharacteristic(c1) -p = Peripheral() -p.addService(s) -p.setConnectionHandler(event_handler) -p.advertise(device_name="micr", services=[s]) - -*/ - -#include "py/obj.h" - -extern const mp_obj_type_t ubluepy_uuid_type; -extern const mp_obj_type_t ubluepy_service_type; -extern const mp_obj_type_t ubluepy_characteristic_type; -extern const mp_obj_type_t ubluepy_peripheral_type; -extern const mp_obj_type_t ubluepy_scanner_type; -extern const mp_obj_type_t ubluepy_scan_entry_type; -extern const mp_obj_type_t ubluepy_constants_type; -extern const mp_obj_type_t ubluepy_constants_ad_types_type; - -typedef enum { - UBLUEPY_UUID_16_BIT = 1, - UBLUEPY_UUID_128_BIT -} ubluepy_uuid_type_t; - -typedef enum { - UBLUEPY_SERVICE_PRIMARY = 1, - UBLUEPY_SERVICE_SECONDARY = 2 -} ubluepy_service_type_t; - -typedef enum { - UBLUEPY_ADDR_TYPE_PUBLIC = 0, - UBLUEPY_ADDR_TYPE_RANDOM_STATIC = 1, -#if 0 - UBLUEPY_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE = 2, - UBLUEPY_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE = 3, -#endif -} ubluepy_addr_type_t; - -typedef enum { - UBLUEPY_ROLE_PERIPHERAL, - UBLUEPY_ROLE_CENTRAL -} ubluepy_role_type_t; - -typedef struct _ubluepy_uuid_obj_t { - mp_obj_base_t base; - ubluepy_uuid_type_t type; - uint8_t value[2]; - uint8_t uuid_vs_idx; -} ubluepy_uuid_obj_t; - -typedef struct _ubluepy_peripheral_obj_t { - mp_obj_base_t base; - ubluepy_role_type_t role; - volatile uint16_t conn_handle; - mp_obj_t delegate; - mp_obj_t notif_handler; - mp_obj_t conn_handler; - mp_obj_t service_list; -} ubluepy_peripheral_obj_t; - -typedef struct _ubluepy_service_obj_t { - mp_obj_base_t base; - uint16_t handle; - uint8_t type; - ubluepy_uuid_obj_t * p_uuid; - ubluepy_peripheral_obj_t * p_periph; - mp_obj_t char_list; - uint16_t start_handle; - uint16_t end_handle; -} ubluepy_service_obj_t; - -typedef struct _ubluepy_characteristic_obj_t { - mp_obj_base_t base; - uint16_t handle; - ubluepy_uuid_obj_t * p_uuid; - uint16_t service_handle; - uint16_t user_desc_handle; - uint16_t cccd_handle; - uint16_t sccd_handle; - uint8_t props; - uint8_t attrs; - ubluepy_service_obj_t * p_service; - mp_obj_t value_data; -} ubluepy_characteristic_obj_t; - -typedef struct _ubluepy_descriptor_obj_t { - mp_obj_base_t base; - uint16_t handle; - ubluepy_uuid_obj_t * p_uuid; -} ubluepy_descriptor_obj_t; - -typedef struct _ubluepy_delegate_obj_t { - mp_obj_base_t base; -} ubluepy_delegate_obj_t; - -typedef struct _ubluepy_advertise_data_t { - uint8_t * p_device_name; - uint8_t device_name_len; - mp_obj_t * p_services; - uint8_t num_of_services; - uint8_t * p_data; - uint8_t data_len; - bool connectable; -} ubluepy_advertise_data_t; - -typedef struct _ubluepy_scanner_obj_t { - mp_obj_base_t base; - mp_obj_t adv_reports; -} ubluepy_scanner_obj_t; - -typedef struct _ubluepy_scan_entry_obj_t { - mp_obj_base_t base; - mp_obj_t addr; - uint8_t addr_type; - bool connectable; - int8_t rssi; - mp_obj_t data; -} ubluepy_scan_entry_obj_t; - -typedef enum _ubluepy_prop_t { - UBLUEPY_PROP_BROADCAST = 0x01, - UBLUEPY_PROP_READ = 0x02, - UBLUEPY_PROP_WRITE_WO_RESP = 0x04, - UBLUEPY_PROP_WRITE = 0x08, - UBLUEPY_PROP_NOTIFY = 0x10, - UBLUEPY_PROP_INDICATE = 0x20, - UBLUEPY_PROP_AUTH_SIGNED_WR = 0x40, -} ubluepy_prop_t; - -typedef enum _ubluepy_attr_t { - UBLUEPY_ATTR_CCCD = 0x01, - UBLUEPY_ATTR_SCCD = 0x02, -} ubluepy_attr_t; - -#endif // UBLUEPY_H__ diff --git a/ports/nrf/modules/ubluepy/ubluepy_characteristic.c b/ports/nrf/modules/ubluepy/ubluepy_characteristic.c deleted file mode 100644 index 8e1d0eb1e40d8..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_characteristic.c +++ /dev/null @@ -1,222 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" - -#if MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL - -#include "modubluepy.h" -#include "ble_drv.h" - -STATIC void ubluepy_characteristic_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_characteristic_obj_t * self = (ubluepy_characteristic_obj_t *)o; - - mp_printf(print, "Characteristic(handle: 0x" HEX2_FMT ", conn_handle: " HEX2_FMT ")", - self->handle, self->p_service->p_periph->conn_handle); -} - -STATIC mp_obj_t ubluepy_characteristic_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_uuid, MP_ARG_REQUIRED| MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_props, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UBLUEPY_PROP_READ | UBLUEPY_PROP_WRITE} }, - { MP_QSTR_attrs, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_characteristic_obj_t *s = m_new_obj(ubluepy_characteristic_obj_t); - s->base.type = type; - - mp_obj_t uuid_obj = args[0].u_obj; - - if (uuid_obj == mp_const_none) { - return MP_OBJ_FROM_PTR(s); - } - - if (MP_OBJ_IS_TYPE(uuid_obj, &ubluepy_uuid_type)) { - s->p_uuid = MP_OBJ_TO_PTR(uuid_obj); - // (void)sd_characterstic_add(s); - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid UUID parameter")); - } - - if (args[1].u_int > 0) { - s->props = (uint8_t)args[1].u_int; - } - - if (args[2].u_int > 0) { - s->attrs = (uint8_t)args[2].u_int; - } - - // clear pointer to service - s->p_service = NULL; - - // clear pointer to char value data - s->value_data = NULL; - - return MP_OBJ_FROM_PTR(s); -} - -void char_data_callback(mp_obj_t self_in, uint16_t length, uint8_t * p_data) { - ubluepy_characteristic_obj_t * self = MP_OBJ_TO_PTR(self_in); - self->value_data = mp_obj_new_bytearray(length, p_data); -} - -/// \method read() -/// Read Characteristic value. -/// -STATIC mp_obj_t char_read(mp_obj_t self_in) { - ubluepy_characteristic_obj_t * self = MP_OBJ_TO_PTR(self_in); - -#if MICROPY_PY_UBLUEPY_CENTRAL - // TODO: free any previous allocation of value_data - - ble_drv_attr_c_read(self->p_service->p_periph->conn_handle, - self->handle, - self_in, - char_data_callback); - - return self->value_data; -#else - (void)self; - return mp_const_none; -#endif -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_characteristic_read_obj, char_read); - -/// \method write(data, [with_response=False]) -/// Write Characteristic value. -/// -STATIC mp_obj_t char_write(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - ubluepy_characteristic_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_obj_t data = pos_args[1]; - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_with_response, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false } }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); - - // figure out mode of the Peripheral - ubluepy_role_type_t role = self->p_service->p_periph->role; - - if (role == UBLUEPY_ROLE_PERIPHERAL) { - if (self->props & UBLUEPY_PROP_NOTIFY) { - ble_drv_attr_s_notify(self->p_service->p_periph->conn_handle, - self->handle, - bufinfo.len, - bufinfo.buf); - } else { - ble_drv_attr_s_write(self->p_service->p_periph->conn_handle, - self->handle, - bufinfo.len, - bufinfo.buf); - } - } else { -#if MICROPY_PY_UBLUEPY_CENTRAL - bool with_response = args[0].u_bool; - - ble_drv_attr_c_write(self->p_service->p_periph->conn_handle, - self->handle, - bufinfo.len, - bufinfo.buf, - with_response); -#endif - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(ubluepy_characteristic_write_obj, 2, char_write); - -/// \method properties() -/// Read Characteristic value properties. -/// -STATIC mp_obj_t char_properties(mp_obj_t self_in) { - ubluepy_characteristic_obj_t * self = MP_OBJ_TO_PTR(self_in); - return MP_OBJ_NEW_SMALL_INT(self->props); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_characteristic_get_properties_obj, char_properties); - -/// \method uuid() -/// Get UUID instance of the characteristic. -/// -STATIC mp_obj_t char_uuid(mp_obj_t self_in) { - ubluepy_characteristic_obj_t * self = MP_OBJ_TO_PTR(self_in); - return MP_OBJ_FROM_PTR(self->p_uuid); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_characteristic_get_uuid_obj, char_uuid); - - -STATIC const mp_rom_map_elem_t ubluepy_characteristic_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&ubluepy_characteristic_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&ubluepy_characteristic_write_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_supportsRead), MP_ROM_PTR(&ubluepy_characteristic_supports_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_propertiesToString), MP_ROM_PTR(&ubluepy_characteristic_properties_to_str_obj) }, - { MP_ROM_QSTR(MP_QSTR_getHandle), MP_ROM_PTR(&ubluepy_characteristic_get_handle_obj) }, - - // Properties - { MP_ROM_QSTR(MP_QSTR_peripheral), MP_ROM_PTR(&ubluepy_characteristic_get_peripheral_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&ubluepy_characteristic_get_uuid_obj) }, - { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&ubluepy_characteristic_get_properties_obj) }, - - { MP_ROM_QSTR(MP_QSTR_PROP_BROADCAST), MP_ROM_INT(UBLUEPY_PROP_BROADCAST) }, - { MP_ROM_QSTR(MP_QSTR_PROP_READ), MP_ROM_INT(UBLUEPY_PROP_READ) }, - { MP_ROM_QSTR(MP_QSTR_PROP_WRITE_WO_RESP), MP_ROM_INT(UBLUEPY_PROP_WRITE_WO_RESP) }, - { MP_ROM_QSTR(MP_QSTR_PROP_WRITE), MP_ROM_INT(UBLUEPY_PROP_WRITE) }, - { MP_ROM_QSTR(MP_QSTR_PROP_NOTIFY), MP_ROM_INT(UBLUEPY_PROP_NOTIFY) }, - { MP_ROM_QSTR(MP_QSTR_PROP_INDICATE), MP_ROM_INT(UBLUEPY_PROP_INDICATE) }, - { MP_ROM_QSTR(MP_QSTR_PROP_AUTH_SIGNED_WR), MP_ROM_INT(UBLUEPY_PROP_AUTH_SIGNED_WR) }, - -#if MICROPY_PY_UBLUEPY_PERIPHERAL - { MP_ROM_QSTR(MP_QSTR_ATTR_CCCD), MP_ROM_INT(UBLUEPY_ATTR_CCCD) }, -#endif - -#if MICROPY_PY_UBLUEPY_CENTRAL - { MP_ROM_QSTR(MP_QSTR_PROP_AUTH_SIGNED_WR), MP_ROM_INT(UBLUEPY_ATTR_SCCD) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_characteristic_locals_dict, ubluepy_characteristic_locals_dict_table); - -const mp_obj_type_t ubluepy_characteristic_type = { - { &mp_type_type }, - .name = MP_QSTR_Characteristic, - .print = ubluepy_characteristic_print, - .make_new = ubluepy_characteristic_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_characteristic_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL diff --git a/ports/nrf/modules/ubluepy/ubluepy_constants.c b/ports/nrf/modules/ubluepy/ubluepy_constants.c deleted file mode 100644 index 14e433e6ebff3..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_constants.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" - -#if MICROPY_PY_UBLUEPY - -#include "modubluepy.h" - -STATIC const mp_rom_map_elem_t ubluepy_constants_ad_types_locals_dict_table[] = { - // GAP AD Types - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_FLAGS), MP_ROM_INT(0x01) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE), MP_ROM_INT(0x02) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE), MP_ROM_INT(0x03) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE), MP_ROM_INT(0x04) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE), MP_ROM_INT(0x05) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE), MP_ROM_INT(0x06) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE), MP_ROM_INT(0x07) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SHORT_LOCAL_NAME), MP_ROM_INT(0x08) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_COMPLETE_LOCAL_NAME), MP_ROM_INT(0x09) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_TX_POWER_LEVEL), MP_ROM_INT(0x0A) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_CLASS_OF_DEVICE), MP_ROM_INT(0x0D) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SIMPLE_PAIRING_HASH_C), MP_ROM_INT(0x0E) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R), MP_ROM_INT(0x0F) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SECURITY_MANAGER_TK_VALUE), MP_ROM_INT(0x10) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS), MP_ROM_INT(0x11) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE), MP_ROM_INT(0x12) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT), MP_ROM_INT(0x14) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT), MP_ROM_INT(0x15) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SERVICE_DATA), MP_ROM_INT(0x16) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_PUBLIC_TARGET_ADDRESS), MP_ROM_INT(0x17) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_RANDOM_TARGET_ADDRESS), MP_ROM_INT(0x18) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_APPEARANCE), MP_ROM_INT(0x19) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_ADVERTISING_INTERVAL), MP_ROM_INT(0x1A) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS), MP_ROM_INT(0x1B) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_LE_ROLE), MP_ROM_INT(0x1C) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SIMPLE_PAIRING_HASH_C256), MP_ROM_INT(0x1D) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256), MP_ROM_INT(0x1E) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SERVICE_DATA_32BIT_UUID), MP_ROM_INT(0x20) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_SERVICE_DATA_128BIT_UUID), MP_ROM_INT(0x21) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_URI), MP_ROM_INT(0x24) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_3D_INFORMATION_DATA), MP_ROM_INT(0x3D) }, - { MP_ROM_QSTR(MP_QSTR_AD_TYPE_MANUFACTURER_SPECIFIC_DATA), MP_ROM_INT(0xFF) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_constants_ad_types_locals_dict, ubluepy_constants_ad_types_locals_dict_table); - -const mp_obj_type_t ubluepy_constants_ad_types_type = { - { &mp_type_type }, - .name = MP_QSTR_ad_types, - .locals_dict = (mp_obj_dict_t*)&ubluepy_constants_ad_types_locals_dict -}; - -STATIC const mp_rom_map_elem_t ubluepy_constants_locals_dict_table[] = { - // GAP events - { MP_ROM_QSTR(MP_QSTR_EVT_GAP_CONNECTED), MP_ROM_INT(16) }, - { MP_ROM_QSTR(MP_QSTR_EVT_GAP_DISCONNECTED), MP_ROM_INT(17) }, - { MP_ROM_QSTR(MP_QSTR_EVT_GATTS_WRITE), MP_ROM_INT(80) }, - { MP_ROM_QSTR(MP_QSTR_UUID_CCCD), MP_ROM_INT(0x2902) }, - - { MP_ROM_QSTR(MP_QSTR_ADDR_TYPE_PUBLIC), MP_ROM_INT(UBLUEPY_ADDR_TYPE_PUBLIC) }, - { MP_ROM_QSTR(MP_QSTR_ADDR_TYPE_RANDOM_STATIC), MP_ROM_INT(UBLUEPY_ADDR_TYPE_RANDOM_STATIC) }, - - { MP_ROM_QSTR(MP_QSTR_ad_types), MP_ROM_PTR(&ubluepy_constants_ad_types_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_constants_locals_dict, ubluepy_constants_locals_dict_table); - -const mp_obj_type_t ubluepy_constants_type = { - { &mp_type_type }, - .name = MP_QSTR_constants, - .locals_dict = (mp_obj_dict_t*)&ubluepy_constants_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY diff --git a/ports/nrf/modules/ubluepy/ubluepy_delegate.c b/ports/nrf/modules/ubluepy/ubluepy_delegate.c deleted file mode 100644 index 07bb7f49286fd..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_delegate.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" - -#if MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL - -#include "modubluepy.h" - -STATIC void ubluepy_delegate_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_delegate_obj_t * self = (ubluepy_delegate_obj_t *)o; - (void)self; - mp_printf(print, "DefaultDelegate()"); -} - -STATIC mp_obj_t ubluepy_delegate_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - ubluepy_delegate_obj_t *s = m_new_obj(ubluepy_delegate_obj_t); - s->base.type = type; - - return MP_OBJ_FROM_PTR(s); -} - -/// \method handleConnection() -/// Handle connection events. -/// -STATIC mp_obj_t delegate_handle_conn(mp_obj_t self_in) { - ubluepy_delegate_obj_t *self = MP_OBJ_TO_PTR(self_in); - - (void)self; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_delegate_handle_conn_obj, delegate_handle_conn); - -/// \method handleNotification() -/// Handle notification events. -/// -STATIC mp_obj_t delegate_handle_notif(mp_obj_t self_in) { - ubluepy_delegate_obj_t *self = MP_OBJ_TO_PTR(self_in); - - (void)self; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_delegate_handle_notif_obj, delegate_handle_notif); - -STATIC const mp_rom_map_elem_t ubluepy_delegate_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_handleConnection), MP_ROM_PTR(&ubluepy_delegate_handle_conn_obj) }, - { MP_ROM_QSTR(MP_QSTR_handleNotification), MP_ROM_PTR(&ubluepy_delegate_handle_notif_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_handleDiscovery), MP_ROM_PTR(&ubluepy_delegate_handle_disc_obj) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_delegate_locals_dict, ubluepy_delegate_locals_dict_table); - -const mp_obj_type_t ubluepy_delegate_type = { - { &mp_type_type }, - .name = MP_QSTR_DefaultDelegate, - .print = ubluepy_delegate_print, - .make_new = ubluepy_delegate_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_delegate_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL diff --git a/ports/nrf/modules/ubluepy/ubluepy_descriptor.c b/ports/nrf/modules/ubluepy/ubluepy_descriptor.c deleted file mode 100644 index b15301954d07e..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_descriptor.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "py/misc.h" - -#if MICROPY_PY_UBLUEPY - -#include "modubluepy.h" -#include "ble_drv.h" - -STATIC void ubluepy_descriptor_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_descriptor_obj_t * self = (ubluepy_descriptor_obj_t *)o; - - mp_printf(print, "Descriptor(uuid: 0x" HEX2_FMT HEX2_FMT ")", - self->p_uuid->value[1], self->p_uuid->value[0]); -} - -STATIC mp_obj_t ubluepy_descriptor_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - - enum { ARG_NEW_UUID }; - - static const mp_arg_t allowed_args[] = { - { ARG_NEW_UUID, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_descriptor_obj_t * s = m_new_obj(ubluepy_descriptor_obj_t); - s->base.type = type; - - mp_obj_t uuid_obj = args[ARG_NEW_UUID].u_obj; - - (void)uuid_obj; - - return MP_OBJ_FROM_PTR(s); -} - -STATIC const mp_rom_map_elem_t ubluepy_descriptor_locals_dict_table[] = { -#if 0 - { MP_ROM_QSTR(MP_QSTR_binVal), MP_ROM_PTR(&ubluepy_descriptor_bin_val_obj) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_descriptor_locals_dict, ubluepy_descriptor_locals_dict_table); - -const mp_obj_type_t ubluepy_descriptor_type = { - { &mp_type_type }, - .name = MP_QSTR_Descriptor, - .print = ubluepy_descriptor_print, - .make_new = ubluepy_descriptor_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_descriptor_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY diff --git a/ports/nrf/modules/ubluepy/ubluepy_peripheral.c b/ports/nrf/modules/ubluepy/ubluepy_peripheral.c deleted file mode 100644 index 48e46737481cb..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_peripheral.c +++ /dev/null @@ -1,498 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "py/objlist.h" - -#if MICROPY_PY_UBLUEPY - -#include "ble_drv.h" - -STATIC void ubluepy_peripheral_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_peripheral_obj_t * self = (ubluepy_peripheral_obj_t *)o; - (void)self; - mp_printf(print, "Peripheral(conn_handle: " HEX2_FMT ")", - self->conn_handle); -} - -STATIC void gap_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t conn_handle, uint16_t length, uint8_t * data) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - if (event_id == 16) { // connect event - self->conn_handle = conn_handle; - } else if (event_id == 17) { // disconnect event - self->conn_handle = 0xFFFF; // invalid connection handle - } - - if (self->conn_handler != mp_const_none) { - mp_obj_t args[3]; - mp_uint_t num_of_args = 3; - args[0] = MP_OBJ_NEW_SMALL_INT(event_id); - args[1] = MP_OBJ_NEW_SMALL_INT(conn_handle); - if (data != NULL) { - args[2] = mp_obj_new_bytearray_by_ref(length, data); - } else { - args[2] = mp_const_none; - } - - // for now hard-code all events to conn_handler - mp_call_function_n_kw(self->conn_handler, num_of_args, 0, args); - } - - (void)self; -} - -STATIC void gatts_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - if (self->conn_handler != mp_const_none) { - mp_obj_t args[3]; - mp_uint_t num_of_args = 3; - args[0] = MP_OBJ_NEW_SMALL_INT(event_id); - args[1] = MP_OBJ_NEW_SMALL_INT(attr_handle); - if (data != NULL) { - args[2] = mp_obj_new_bytearray_by_ref(length, data); - } else { - args[2] = mp_const_none; - } - - // for now hard-code all events to conn_handler - mp_call_function_n_kw(self->conn_handler, num_of_args, 0, args); - } - -} - -#if MICROPY_PY_UBLUEPY_CENTRAL - -static volatile bool m_disc_evt_received; - -STATIC void gattc_event_handler(mp_obj_t self_in, uint16_t event_id, uint16_t attr_handle, uint16_t length, uint8_t * data) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - (void)self; - m_disc_evt_received = true; -} -#endif - -STATIC mp_obj_t ubluepy_peripheral_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - enum { - ARG_NEW_DEVICE_ADDR, - ARG_NEW_ADDR_TYPE - }; - - static const mp_arg_t allowed_args[] = { - { ARG_NEW_DEVICE_ADDR, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { ARG_NEW_ADDR_TYPE, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_peripheral_obj_t *s = m_new_obj(ubluepy_peripheral_obj_t); - s->base.type = type; - - s->delegate = mp_const_none; - s->conn_handler = mp_const_none; - s->notif_handler = mp_const_none; - s->conn_handle = 0xFFFF; - - s->service_list = mp_obj_new_list(0, NULL); - - return MP_OBJ_FROM_PTR(s); -} - -/// \method withDelegate(DefaultDelegate) -/// Set delegate instance for handling Bluetooth LE events. -/// -STATIC mp_obj_t peripheral_with_delegate(mp_obj_t self_in, mp_obj_t delegate) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - self->delegate = delegate; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_peripheral_with_delegate_obj, peripheral_with_delegate); - -/// \method setNotificationHandler(func) -/// Set handler for Bluetooth LE notification events. -/// -STATIC mp_obj_t peripheral_set_notif_handler(mp_obj_t self_in, mp_obj_t func) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - self->notif_handler = func; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_peripheral_set_notif_handler_obj, peripheral_set_notif_handler); - -/// \method setConnectionHandler(func) -/// Set handler for Bluetooth LE connection events. -/// -STATIC mp_obj_t peripheral_set_conn_handler(mp_obj_t self_in, mp_obj_t func) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - self->conn_handler = func; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_peripheral_set_conn_handler_obj, peripheral_set_conn_handler); - -#if MICROPY_PY_UBLUEPY_PERIPHERAL - -/// \method advertise(device_name, [service=[service1, service2, ...]], [data=bytearray], [connectable=True]) -/// Start advertising. Connectable advertisment type by default. -/// -STATIC mp_obj_t peripheral_advertise(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_device_name, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_services, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_data, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_connectable, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - - self->role = UBLUEPY_ROLE_PERIPHERAL; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_obj_t device_name_obj = args[0].u_obj; - mp_obj_t service_obj = args[1].u_obj; - mp_obj_t data_obj = args[2].u_obj; - mp_obj_t connectable_obj = args[3].u_obj; - - ubluepy_advertise_data_t adv_data; - memset(&adv_data, 0, sizeof(ubluepy_advertise_data_t)); - - if (device_name_obj != mp_const_none && MP_OBJ_IS_STR(device_name_obj)) { - GET_STR_DATA_LEN(device_name_obj, str_data, str_len); - - adv_data.p_device_name = (uint8_t *)str_data; - adv_data.device_name_len = str_len; - } - - if (service_obj != mp_const_none) { - mp_obj_t * services = NULL; - mp_uint_t num_services; - mp_obj_get_array(service_obj, &num_services, &services); - - if (num_services > 0) { - adv_data.p_services = services; - adv_data.num_of_services = num_services; - } - } - - if (data_obj != mp_const_none) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_obj, &bufinfo, MP_BUFFER_READ); - - if (bufinfo.len > 0) { - adv_data.p_data = bufinfo.buf; - adv_data.data_len = bufinfo.len; - } - } - - adv_data.connectable = true; - if (connectable_obj != mp_const_none && !(mp_obj_is_true(connectable_obj))) { - adv_data.connectable = false; - } else { - ble_drv_gap_event_handler_set(MP_OBJ_FROM_PTR(self), gap_event_handler); - ble_drv_gatts_event_handler_set(MP_OBJ_FROM_PTR(self), gatts_event_handler); - } - - (void)ble_drv_advertise_data(&adv_data); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(ubluepy_peripheral_advertise_obj, 0, peripheral_advertise); - -/// \method advertise_stop() -/// Stop advertisment if any onging advertisment. -/// -STATIC mp_obj_t peripheral_advertise_stop(mp_obj_t self_in) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - (void)self; - - ble_drv_advertise_stop(); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_peripheral_advertise_stop_obj, peripheral_advertise_stop); - -#endif // MICROPY_PY_UBLUEPY_PERIPHERAL - -/// \method disconnect() -/// disconnect connection. -/// -STATIC mp_obj_t peripheral_disconnect(mp_obj_t self_in) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); - - (void)self; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_peripheral_disconnect_obj, peripheral_disconnect); - -/// \method addService(Service) -/// Add service to the Peripheral. -/// -STATIC mp_obj_t peripheral_add_service(mp_obj_t self_in, mp_obj_t service) { - ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in); - ubluepy_service_obj_t * p_service = MP_OBJ_TO_PTR(service); - - p_service->p_periph = self; - - mp_obj_list_append(self->service_list, service); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_peripheral_add_service_obj, peripheral_add_service); - -/// \method getServices() -/// Return list with all service registered in the Peripheral. -/// -STATIC mp_obj_t peripheral_get_services(mp_obj_t self_in) { - ubluepy_peripheral_obj_t * self = MP_OBJ_TO_PTR(self_in); - - return self->service_list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_peripheral_get_services_obj, peripheral_get_services); - -#if MICROPY_PY_UBLUEPY_CENTRAL - -void static disc_add_service(mp_obj_t self, ble_drv_service_data_t * p_service_data) { - ubluepy_service_obj_t * p_service = m_new_obj(ubluepy_service_obj_t); - p_service->base.type = &ubluepy_service_type; - - ubluepy_uuid_obj_t * p_uuid = m_new_obj(ubluepy_uuid_obj_t); - p_uuid->base.type = &ubluepy_uuid_type; - - p_service->p_uuid = p_uuid; - - p_uuid->type = p_service_data->uuid_type; - p_uuid->value[0] = p_service_data->uuid & 0xFF; - p_uuid->value[1] = p_service_data->uuid >> 8; - - p_service->handle = p_service_data->start_handle; - p_service->start_handle = p_service_data->start_handle; - p_service->end_handle = p_service_data->end_handle; - - p_service->char_list = mp_obj_new_list(0, NULL); - - peripheral_add_service(self, MP_OBJ_FROM_PTR(p_service)); -} - -void static disc_add_char(mp_obj_t service_in, ble_drv_char_data_t * p_desc_data) { - ubluepy_service_obj_t * p_service = MP_OBJ_TO_PTR(service_in); - ubluepy_characteristic_obj_t * p_char = m_new_obj(ubluepy_characteristic_obj_t); - p_char->base.type = &ubluepy_characteristic_type; - - ubluepy_uuid_obj_t * p_uuid = m_new_obj(ubluepy_uuid_obj_t); - p_uuid->base.type = &ubluepy_uuid_type; - - p_char->p_uuid = p_uuid; - - p_uuid->type = p_desc_data->uuid_type; - p_uuid->value[0] = p_desc_data->uuid & 0xFF; - p_uuid->value[1] = p_desc_data->uuid >> 8; - - // add characteristic specific data from discovery - p_char->props = p_desc_data->props; - p_char->handle = p_desc_data->value_handle; - - // equivalent to ubluepy_service.c - service_add_characteristic() - // except the registration of the characteristic towards the bluetooth stack - p_char->service_handle = p_service->handle; - p_char->p_service = p_service; - - mp_obj_list_append(p_service->char_list, MP_OBJ_FROM_PTR(p_char)); -} - -/// \method connect(device_address [, addr_type=ADDR_TYPE_PUBLIC]) -/// Connect to device peripheral with the given device address. -/// addr_type can be either ADDR_TYPE_PUBLIC (default) or -/// ADDR_TYPE_RANDOM_STATIC. -/// -STATIC mp_obj_t peripheral_connect(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - ubluepy_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_obj_t dev_addr = pos_args[1]; - - self->role = UBLUEPY_ROLE_CENTRAL; - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_addr_type, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UBLUEPY_ADDR_TYPE_PUBLIC } }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - uint8_t addr_type = args[0].u_int; - - ble_drv_gap_event_handler_set(MP_OBJ_FROM_PTR(self), gap_event_handler); - - if (MP_OBJ_IS_STR(dev_addr)) { - GET_STR_DATA_LEN(dev_addr, str_data, str_len); - if (str_len == 17) { // Example "11:22:33:aa:bb:cc" - - uint8_t * p_addr = m_new(uint8_t, 6); - - p_addr[0] = unichar_xdigit_value(str_data[16]); - p_addr[0] += unichar_xdigit_value(str_data[15]) << 4; - p_addr[1] = unichar_xdigit_value(str_data[13]); - p_addr[1] += unichar_xdigit_value(str_data[12]) << 4; - p_addr[2] = unichar_xdigit_value(str_data[10]); - p_addr[2] += unichar_xdigit_value(str_data[9]) << 4; - p_addr[3] = unichar_xdigit_value(str_data[7]); - p_addr[3] += unichar_xdigit_value(str_data[6]) << 4; - p_addr[4] = unichar_xdigit_value(str_data[4]); - p_addr[4] += unichar_xdigit_value(str_data[3]) << 4; - p_addr[5] = unichar_xdigit_value(str_data[1]); - p_addr[5] += unichar_xdigit_value(str_data[0]) << 4; - - ble_drv_connect(p_addr, addr_type); - - m_del(uint8_t, p_addr, 6); - } - } - - // block until connected - while (self->conn_handle == 0xFFFF) { - ; - } - - ble_drv_gattc_event_handler_set(MP_OBJ_FROM_PTR(self), gattc_event_handler); - - bool service_disc_retval = ble_drv_discover_services(self, self->conn_handle, 0x0001, disc_add_service); - - // continue discovery of primary services ... - while (service_disc_retval) { - // locate the last added service - mp_obj_t * services = NULL; - mp_uint_t num_services; - mp_obj_get_array(self->service_list, &num_services, &services); - - ubluepy_service_obj_t * p_service = (ubluepy_service_obj_t *)services[num_services - 1]; - - service_disc_retval = ble_drv_discover_services(self, - self->conn_handle, - p_service->end_handle + 1, - disc_add_service); - } - - // For each service perform a characteristic discovery - mp_obj_t * services = NULL; - mp_uint_t num_services; - mp_obj_get_array(self->service_list, &num_services, &services); - - for (uint16_t s = 0; s < num_services; s++) { - ubluepy_service_obj_t * p_service = (ubluepy_service_obj_t *)services[s]; - bool char_disc_retval = ble_drv_discover_characteristic(p_service, - self->conn_handle, - p_service->start_handle, - p_service->end_handle, - disc_add_char); - // continue discovery of characteristics ... - while (char_disc_retval) { - mp_obj_t * characteristics = NULL; - mp_uint_t num_chars; - mp_obj_get_array(p_service->char_list, &num_chars, &characteristics); - - ubluepy_characteristic_obj_t * p_char = (ubluepy_characteristic_obj_t *)characteristics[num_chars - 1]; - uint16_t next_handle = p_char->handle + 1; - if ((next_handle) < p_service->end_handle) { - char_disc_retval = ble_drv_discover_characteristic(p_service, - self->conn_handle, - next_handle, - p_service->end_handle, - disc_add_char); - } else { - break; - } - } - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(ubluepy_peripheral_connect_obj, 2, peripheral_connect); - -#endif - -STATIC const mp_rom_map_elem_t ubluepy_peripheral_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_withDelegate), MP_ROM_PTR(&ubluepy_peripheral_with_delegate_obj) }, - { MP_ROM_QSTR(MP_QSTR_setNotificationHandler), MP_ROM_PTR(&ubluepy_peripheral_set_notif_handler_obj) }, - { MP_ROM_QSTR(MP_QSTR_setConnectionHandler), MP_ROM_PTR(&ubluepy_peripheral_set_conn_handler_obj) }, - { MP_ROM_QSTR(MP_QSTR_getServices), MP_ROM_PTR(&ubluepy_peripheral_get_services_obj) }, -#if MICROPY_PY_UBLUEPY_CENTRAL - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&ubluepy_peripheral_connect_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&ubluepy_peripheral_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_getServiceByUUID), MP_ROM_PTR(&ubluepy_peripheral_get_service_by_uuid_obj) }, - { MP_ROM_QSTR(MP_QSTR_getCharacteristics), MP_ROM_PTR(&ubluepy_peripheral_get_chars_obj) }, - { MP_ROM_QSTR(MP_QSTR_getDescriptors), MP_ROM_PTR(&ubluepy_peripheral_get_descs_obj) }, - { MP_ROM_QSTR(MP_QSTR_waitForNotifications), MP_ROM_PTR(&ubluepy_peripheral_wait_for_notif_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeCharacteristic), MP_ROM_PTR(&ubluepy_peripheral_write_char_obj) }, - { MP_ROM_QSTR(MP_QSTR_readCharacteristic), MP_ROM_PTR(&ubluepy_peripheral_read_char_obj) }, -#endif // 0 -#endif // MICROPY_PY_UBLUEPY_CENTRAL -#if MICROPY_PY_UBLUEPY_PERIPHERAL - { MP_ROM_QSTR(MP_QSTR_advertise), MP_ROM_PTR(&ubluepy_peripheral_advertise_obj) }, - { MP_ROM_QSTR(MP_QSTR_advertise_stop), MP_ROM_PTR(&ubluepy_peripheral_advertise_stop_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&ubluepy_peripheral_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_addService), MP_ROM_PTR(&ubluepy_peripheral_add_service_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_addCharacteristic), MP_ROM_PTR(&ubluepy_peripheral_add_char_obj) }, - { MP_ROM_QSTR(MP_QSTR_addDescriptor), MP_ROM_PTR(&ubluepy_peripheral_add_desc_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeCharacteristic), MP_ROM_PTR(&ubluepy_peripheral_write_char_obj) }, - { MP_ROM_QSTR(MP_QSTR_readCharacteristic), MP_ROM_PTR(&ubluepy_peripheral_read_char_obj) }, -#endif -#endif -#if MICROPY_PY_UBLUEPY_BROADCASTER - { MP_ROM_QSTR(MP_QSTR_advertise), MP_ROM_PTR(&ubluepy_peripheral_advertise_obj) }, -#endif -#if MICROPY_PY_UBLUEPY_OBSERVER - // Nothing yet. -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_peripheral_locals_dict, ubluepy_peripheral_locals_dict_table); - -const mp_obj_type_t ubluepy_peripheral_type = { - { &mp_type_type }, - .name = MP_QSTR_Peripheral, - .print = ubluepy_peripheral_print, - .make_new = ubluepy_peripheral_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_peripheral_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY diff --git a/ports/nrf/modules/ubluepy/ubluepy_scan_entry.c b/ports/nrf/modules/ubluepy/ubluepy_scan_entry.c deleted file mode 100644 index 8a936d5928e81..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_scan_entry.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "py/objlist.h" -#include "py/objarray.h" -#include "py/objtuple.h" -#include "py/qstr.h" - -#if MICROPY_PY_UBLUEPY_CENTRAL - -#include "ble_drv.h" - -STATIC void ubluepy_scan_entry_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_scan_entry_obj_t * self = (ubluepy_scan_entry_obj_t *)o; - (void)self; - mp_printf(print, "ScanEntry"); -} - -/// \method addr() -/// Return address as text string. -/// -STATIC mp_obj_t scan_entry_get_addr(mp_obj_t self_in) { - ubluepy_scan_entry_obj_t *self = MP_OBJ_TO_PTR(self_in); - return self->addr; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bluepy_scan_entry_get_addr_obj, scan_entry_get_addr); - -/// \method addr_type() -/// Return address type value. -/// -STATIC mp_obj_t scan_entry_get_addr_type(mp_obj_t self_in) { - ubluepy_scan_entry_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(self->addr_type); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bluepy_scan_entry_get_addr_type_obj, scan_entry_get_addr_type); - -/// \method rssi() -/// Return RSSI value. -/// -STATIC mp_obj_t scan_entry_get_rssi(mp_obj_t self_in) { - ubluepy_scan_entry_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(self->rssi); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bluepy_scan_entry_get_rssi_obj, scan_entry_get_rssi); - -/// \method getScanData() -/// Return list of the scan data tupples (ad_type, description, value) -/// -STATIC mp_obj_t scan_entry_get_scan_data(mp_obj_t self_in) { - ubluepy_scan_entry_obj_t * self = MP_OBJ_TO_PTR(self_in); - - mp_obj_t retval_list = mp_obj_new_list(0, NULL); - - // TODO: check if self->data is set - mp_obj_array_t * data = MP_OBJ_TO_PTR(self->data); - - uint16_t byte_index = 0; - - while (byte_index < data->len) { - mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(3, NULL)); - - uint8_t adv_item_len = ((uint8_t * )data->items)[byte_index]; - uint8_t adv_item_type = ((uint8_t * )data->items)[byte_index + 1]; - - mp_obj_t description = mp_const_none; - - mp_map_t *constant_map = mp_obj_dict_get_map(ubluepy_constants_ad_types_type.locals_dict); - mp_map_elem_t *ad_types_table = MP_OBJ_TO_PTR(constant_map->table); - - uint16_t num_of_elements = constant_map->used; - - for (uint16_t i = 0; i < num_of_elements; i++) { - mp_map_elem_t element = (mp_map_elem_t)*ad_types_table; - ad_types_table++; - uint16_t element_value = mp_obj_get_int(element.value); - - if (adv_item_type == element_value) { - qstr key_qstr = MP_OBJ_QSTR_VALUE(element.key); - const char * text = qstr_str(key_qstr); - size_t len = qstr_len(key_qstr); - - vstr_t vstr; - vstr_init(&vstr, len); - vstr_printf(&vstr, "%s", text); - description = mp_obj_new_str(vstr.buf, vstr.len, false); - vstr_clear(&vstr); - } - } - - t->items[0] = MP_OBJ_NEW_SMALL_INT(adv_item_type); - t->items[1] = description; - t->items[2] = mp_obj_new_bytearray(adv_item_len - 1, - &((uint8_t * )data->items)[byte_index + 2]); - mp_obj_list_append(retval_list, MP_OBJ_FROM_PTR(t)); - - byte_index += adv_item_len + 1; - } - - return retval_list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_scan_entry_get_scan_data_obj, scan_entry_get_scan_data); - -STATIC const mp_rom_map_elem_t ubluepy_scan_entry_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_addr), MP_ROM_PTR(&bluepy_scan_entry_get_addr_obj) }, - { MP_ROM_QSTR(MP_QSTR_addr_type), MP_ROM_PTR(&bluepy_scan_entry_get_addr_type_obj) }, - { MP_ROM_QSTR(MP_QSTR_rssi), MP_ROM_PTR(&bluepy_scan_entry_get_rssi_obj) }, - { MP_ROM_QSTR(MP_QSTR_getScanData), MP_ROM_PTR(&ubluepy_scan_entry_get_scan_data_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_scan_entry_locals_dict, ubluepy_scan_entry_locals_dict_table); - -const mp_obj_type_t ubluepy_scan_entry_type = { - { &mp_type_type }, - .name = MP_QSTR_ScanEntry, - .print = ubluepy_scan_entry_print, - .locals_dict = (mp_obj_dict_t*)&ubluepy_scan_entry_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY_CENTRAL diff --git a/ports/nrf/modules/ubluepy/ubluepy_scanner.c b/ports/nrf/modules/ubluepy/ubluepy_scanner.c deleted file mode 100644 index b9c442ac59d15..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_scanner.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "py/objlist.h" - -#if MICROPY_PY_UBLUEPY_CENTRAL - -#include "ble_drv.h" -#include "hal_time.h" - -STATIC void adv_event_handler(mp_obj_t self_in, uint16_t event_id, ble_drv_adv_data_t * data) { - ubluepy_scanner_obj_t *self = MP_OBJ_TO_PTR(self_in); - - ubluepy_scan_entry_obj_t * item = m_new_obj(ubluepy_scan_entry_obj_t); - item->base.type = &ubluepy_scan_entry_type; - - vstr_t vstr; - vstr_init(&vstr, 17); - - vstr_printf(&vstr, ""HEX2_FMT":"HEX2_FMT":"HEX2_FMT":" \ - HEX2_FMT":"HEX2_FMT":"HEX2_FMT"", - data->p_peer_addr[5], data->p_peer_addr[4], data->p_peer_addr[3], - data->p_peer_addr[2], data->p_peer_addr[1], data->p_peer_addr[0]); - - item->addr = mp_obj_new_str(vstr.buf, vstr.len, false); - - vstr_clear(&vstr); - - item->addr_type = data->addr_type; - item->rssi = data->rssi; - item->data = mp_obj_new_bytearray(data->data_len, data->p_data); - - mp_obj_list_append(self->adv_reports, item); -} - -STATIC void ubluepy_scanner_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_scanner_obj_t * self = (ubluepy_scanner_obj_t *)o; - (void)self; - mp_printf(print, "Scanner"); -} - -STATIC mp_obj_t ubluepy_scanner_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - static const mp_arg_t allowed_args[] = { - - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_scanner_obj_t * s = m_new_obj(ubluepy_scanner_obj_t); - s->base.type = type; - - return MP_OBJ_FROM_PTR(s); -} - -/// \method scan(timeout) -/// Scan for devices. Timeout is in milliseconds and will set the duration -/// of the scanning. -/// -STATIC mp_obj_t scanner_scan(mp_obj_t self_in, mp_obj_t timeout_in) { - ubluepy_scanner_obj_t * self = MP_OBJ_TO_PTR(self_in); - mp_int_t timeout = mp_obj_get_int(timeout_in); - - self->adv_reports = mp_obj_new_list(0, NULL); - - ble_drv_adv_report_handler_set(MP_OBJ_FROM_PTR(self), adv_event_handler); - - // start - ble_drv_scan_start(); - - // sleep - mp_hal_delay_ms(timeout); - - // stop - ble_drv_scan_stop(); - - return self->adv_reports; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_scanner_scan_obj, scanner_scan); - -STATIC const mp_rom_map_elem_t ubluepy_scanner_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&ubluepy_scanner_scan_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_scanner_locals_dict, ubluepy_scanner_locals_dict_table); - - -const mp_obj_type_t ubluepy_scanner_type = { - { &mp_type_type }, - .name = MP_QSTR_Scanner, - .print = ubluepy_scanner_print, - .make_new = ubluepy_scanner_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_scanner_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY_CENTRAL diff --git a/ports/nrf/modules/ubluepy/ubluepy_service.c b/ports/nrf/modules/ubluepy/ubluepy_service.c deleted file mode 100644 index 68d905743fa43..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_service.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objlist.h" - -#if MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL - -#include "modubluepy.h" -#include "ble_drv.h" - -STATIC void ubluepy_service_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_service_obj_t * self = (ubluepy_service_obj_t *)o; - - mp_printf(print, "Service(handle: 0x" HEX2_FMT ")", self->handle); -} - -STATIC mp_obj_t ubluepy_service_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - - enum { ARG_NEW_UUID, ARG_NEW_TYPE }; - - static const mp_arg_t allowed_args[] = { - { ARG_NEW_UUID, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { ARG_NEW_TYPE, MP_ARG_INT, {.u_int = UBLUEPY_SERVICE_PRIMARY} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_service_obj_t *s = m_new_obj(ubluepy_service_obj_t); - s->base.type = type; - - mp_obj_t uuid_obj = args[ARG_NEW_UUID].u_obj; - - if (uuid_obj == MP_OBJ_NULL) { - return MP_OBJ_FROM_PTR(s); - } - - if (MP_OBJ_IS_TYPE(uuid_obj, &ubluepy_uuid_type)) { - s->p_uuid = MP_OBJ_TO_PTR(uuid_obj); - - uint8_t type = args[ARG_NEW_TYPE].u_int; - if (type > 0 && type <= UBLUEPY_SERVICE_PRIMARY) { - s->type = type; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid Service type")); - } - - (void)ble_drv_service_add(s); - - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid UUID parameter")); - } - - // clear reference to peripheral - s->p_periph = NULL; - s->char_list = mp_obj_new_list(0, NULL); - - return MP_OBJ_FROM_PTR(s); -} - -/// \method addCharacteristic(Characteristic) -/// Add Characteristic to the Service. -/// -STATIC mp_obj_t service_add_characteristic(mp_obj_t self_in, mp_obj_t characteristic) { - ubluepy_service_obj_t * self = MP_OBJ_TO_PTR(self_in); - ubluepy_characteristic_obj_t * p_char = MP_OBJ_TO_PTR(characteristic); - - p_char->service_handle = self->handle; - - bool retval = ble_drv_characteristic_add(p_char); - - if (retval) { - p_char->p_service = self; - } - - mp_obj_list_append(self->char_list, characteristic); - - // return mp_obj_new_bool(retval); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_service_add_char_obj, service_add_characteristic); - -/// \method getCharacteristics() -/// Return list with all characteristics registered in the Service. -/// -STATIC mp_obj_t service_get_chars(mp_obj_t self_in) { - ubluepy_service_obj_t * self = MP_OBJ_TO_PTR(self_in); - - return self->char_list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_service_get_chars_obj, service_get_chars); - -/// \method getCharacteristic(UUID) -/// Return Characteristic with the given UUID. -/// -STATIC mp_obj_t service_get_characteristic(mp_obj_t self_in, mp_obj_t uuid) { - ubluepy_service_obj_t * self = MP_OBJ_TO_PTR(self_in); - ubluepy_uuid_obj_t * p_uuid = MP_OBJ_TO_PTR(uuid); - - // validate that there is an UUID object passed in as parameter - if (!(MP_OBJ_IS_TYPE(uuid, &ubluepy_uuid_type))) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid UUID parameter")); - } - - mp_obj_t * chars = NULL; - mp_uint_t num_chars = 0; - mp_obj_get_array(self->char_list, &num_chars, &chars); - - for (uint8_t i = 0; i < num_chars; i++) { - ubluepy_characteristic_obj_t * p_char = (ubluepy_characteristic_obj_t *)chars[i]; - - bool type_match = p_char->p_uuid->type == p_uuid->type; - bool uuid_match = ((uint16_t)(*(uint16_t *)&p_char->p_uuid->value[0]) == - (uint16_t)(*(uint16_t *)&p_uuid->value[0])); - - if (type_match && uuid_match) { - return MP_OBJ_FROM_PTR(p_char); - } - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(ubluepy_service_get_char_obj, service_get_characteristic); - -/// \method uuid() -/// Get UUID instance of the Service. -/// -STATIC mp_obj_t service_uuid(mp_obj_t self_in) { - ubluepy_service_obj_t * self = MP_OBJ_TO_PTR(self_in); - return MP_OBJ_FROM_PTR(self->p_uuid); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_service_get_uuid_obj, service_uuid); - -STATIC const mp_rom_map_elem_t ubluepy_service_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_getCharacteristic), MP_ROM_PTR(&ubluepy_service_get_char_obj) }, - { MP_ROM_QSTR(MP_QSTR_addCharacteristic), MP_ROM_PTR(&ubluepy_service_add_char_obj) }, - { MP_ROM_QSTR(MP_QSTR_getCharacteristics), MP_ROM_PTR(&ubluepy_service_get_chars_obj) }, -#if 0 - // Properties - { MP_ROM_QSTR(MP_QSTR_peripheral), MP_ROM_PTR(&ubluepy_service_get_peripheral_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&ubluepy_service_get_uuid_obj) }, - { MP_ROM_QSTR(MP_QSTR_PRIMARY), MP_ROM_INT(UBLUEPY_SERVICE_PRIMARY) }, - { MP_ROM_QSTR(MP_QSTR_SECONDARY), MP_ROM_INT(UBLUEPY_SERVICE_SECONDARY) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_service_locals_dict, ubluepy_service_locals_dict_table); - -const mp_obj_type_t ubluepy_service_type = { - { &mp_type_type }, - .name = MP_QSTR_Service, - .print = ubluepy_service_print, - .make_new = ubluepy_service_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_service_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY_PERIPHERAL || MICROPY_PY_UBLUEPY_CENTRAL diff --git a/ports/nrf/modules/ubluepy/ubluepy_uuid.c b/ports/nrf/modules/ubluepy/ubluepy_uuid.c deleted file mode 100644 index 380d2e4046e35..0000000000000 --- a/ports/nrf/modules/ubluepy/ubluepy_uuid.c +++ /dev/null @@ -1,173 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/runtime.h" -#include "py/objstr.h" -#include "py/misc.h" - -#if MICROPY_PY_UBLUEPY - -#include "modubluepy.h" -#include "ble_drv.h" - -STATIC void ubluepy_uuid_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind) { - ubluepy_uuid_obj_t * self = (ubluepy_uuid_obj_t *)o; - if (self->type == UBLUEPY_UUID_16_BIT) { - mp_printf(print, "UUID(uuid: 0x" HEX2_FMT HEX2_FMT ")", - self->value[1], self->value[0]); - } else { - mp_printf(print, "UUID(uuid: 0x" HEX2_FMT HEX2_FMT ", VS idx: " HEX2_FMT ")", - self->value[1], self->value[0], self->uuid_vs_idx); - } -} - -STATIC mp_obj_t ubluepy_uuid_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - - enum { ARG_NEW_UUID }; - - static const mp_arg_t allowed_args[] = { - { ARG_NEW_UUID, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - ubluepy_uuid_obj_t *s = m_new_obj(ubluepy_uuid_obj_t); - s->base.type = type; - - mp_obj_t uuid_obj = args[ARG_NEW_UUID].u_obj; - - if (uuid_obj == MP_OBJ_NULL) { - return MP_OBJ_FROM_PTR(s); - } - - if (MP_OBJ_IS_INT(uuid_obj)) { - s->type = UBLUEPY_UUID_16_BIT; - s->value[1] = (((uint16_t)mp_obj_get_int(uuid_obj)) >> 8) & 0xFF; - s->value[0] = ((uint8_t)mp_obj_get_int(uuid_obj)) & 0xFF; - } else if (MP_OBJ_IS_STR(uuid_obj)) { - GET_STR_DATA_LEN(uuid_obj, str_data, str_len); - if (str_len == 6) { // Assume hex digit prefixed with 0x - s->type = UBLUEPY_UUID_16_BIT; - s->value[0] = unichar_xdigit_value(str_data[5]); - s->value[0] += unichar_xdigit_value(str_data[4]) << 4; - s->value[1] = unichar_xdigit_value(str_data[3]); - s->value[1] += unichar_xdigit_value(str_data[2]) << 4; - } else if (str_len == 36) { - s->type = UBLUEPY_UUID_128_BIT; - uint8_t buffer[16]; - buffer[0] = unichar_xdigit_value(str_data[35]); - buffer[0] += unichar_xdigit_value(str_data[34]) << 4; - buffer[1] = unichar_xdigit_value(str_data[33]); - buffer[1] += unichar_xdigit_value(str_data[32]) << 4; - buffer[2] = unichar_xdigit_value(str_data[31]); - buffer[2] += unichar_xdigit_value(str_data[30]) << 4; - buffer[3] = unichar_xdigit_value(str_data[29]); - buffer[3] += unichar_xdigit_value(str_data[28]) << 4; - buffer[4] = unichar_xdigit_value(str_data[27]); - buffer[4] += unichar_xdigit_value(str_data[26]) << 4; - buffer[5] = unichar_xdigit_value(str_data[25]); - buffer[5] += unichar_xdigit_value(str_data[24]) << 4; - // 23 '-' - buffer[6] = unichar_xdigit_value(str_data[22]); - buffer[6] += unichar_xdigit_value(str_data[21]) << 4; - buffer[7] = unichar_xdigit_value(str_data[20]); - buffer[7] += unichar_xdigit_value(str_data[19]) << 4; - // 18 '-' - buffer[8] = unichar_xdigit_value(str_data[17]); - buffer[8] += unichar_xdigit_value(str_data[16]) << 4; - buffer[9] = unichar_xdigit_value(str_data[15]); - buffer[9] += unichar_xdigit_value(str_data[14]) << 4; - // 13 '-' - buffer[10] = unichar_xdigit_value(str_data[12]); - buffer[10] += unichar_xdigit_value(str_data[11]) << 4; - buffer[11] = unichar_xdigit_value(str_data[10]); - buffer[11] += unichar_xdigit_value(str_data[9]) << 4; - // 8 '-' - // 16-bit field - s->value[0] = unichar_xdigit_value(str_data[7]); - s->value[0] += unichar_xdigit_value(str_data[6]) << 4; - s->value[1] = unichar_xdigit_value(str_data[5]); - s->value[1] += unichar_xdigit_value(str_data[4]) << 4; - - buffer[14] = unichar_xdigit_value(str_data[3]); - buffer[14] += unichar_xdigit_value(str_data[2]) << 4; - buffer[15] = unichar_xdigit_value(str_data[1]); - buffer[15] += unichar_xdigit_value(str_data[0]) << 4; - - ble_drv_uuid_add_vs(buffer, &s->uuid_vs_idx); - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid UUID string length")); - } - } else if (MP_OBJ_IS_TYPE(uuid_obj, &ubluepy_uuid_type)) { - // deep copy instance - ubluepy_uuid_obj_t * p_old = MP_OBJ_TO_PTR(uuid_obj); - s->type = p_old->type; - s->value[0] = p_old->value[0]; - s->value[1] = p_old->value[1]; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Invalid UUID parameter")); - } - - return MP_OBJ_FROM_PTR(s); -} - -/// \method binVal() -/// Get binary value of the 16 or 128 bit UUID. Returned as bytearray type. -/// -STATIC mp_obj_t uuid_bin_val(mp_obj_t self_in) { - ubluepy_uuid_obj_t * self = MP_OBJ_TO_PTR(self_in); - - // TODO: Extend the uint16 byte value to 16 byte if 128-bit, - // also encapsulate it in a bytearray. For now, return - // the uint16_t field of the UUID. - return MP_OBJ_NEW_SMALL_INT(self->value[0] | self->value[1] << 8); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(ubluepy_uuid_bin_val_obj, uuid_bin_val); - -STATIC const mp_rom_map_elem_t ubluepy_uuid_locals_dict_table[] = { -#if 0 - { MP_ROM_QSTR(MP_QSTR_getCommonName), MP_ROM_PTR(&ubluepy_uuid_get_common_name_obj) }, -#endif - // Properties - { MP_ROM_QSTR(MP_QSTR_binVal), MP_ROM_PTR(&ubluepy_uuid_bin_val_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(ubluepy_uuid_locals_dict, ubluepy_uuid_locals_dict_table); - -const mp_obj_type_t ubluepy_uuid_type = { - { &mp_type_type }, - .name = MP_QSTR_UUID, - .print = ubluepy_uuid_print, - .make_new = ubluepy_uuid_make_new, - .locals_dict = (mp_obj_dict_t*)&ubluepy_uuid_locals_dict -}; - -#endif // MICROPY_PY_UBLUEPY diff --git a/ports/nrf/modules/utime/modutime.c b/ports/nrf/modules/utime/modutime.c deleted file mode 100644 index 8e9c05c1ee4bb..0000000000000 --- a/ports/nrf/modules/utime/modutime.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include NRF5_HAL_H - -#include "py/nlr.h" -#include "py/smallint.h" -#include "py/obj.h" -#include "extmod/utime_mphal.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t mp_module_utime = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index e806c201f165f..44e51fc5f38fc 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2015 Glenn Ruben Bakke + * Copyright (c) 2019 Dan Halbert for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -27,308 +28,144 @@ #ifndef NRF5_MPCONFIGPORT_H__ #define NRF5_MPCONFIGPORT_H__ -#include - -// options to control how MicroPython is built -#define MICROPY_ALLOC_PATH_MAX (512) -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) -#define MICROPY_READER_VFS (MICROPY_VFS) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (0) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -//CP UPDATE: See mpconfigport.h for LONGINT implementation -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) - -#define MICROPY_OPT_COMPUTED_GOTO (0) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0) -#define MICROPY_OPT_MPZ_BITWISE (0) - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_FATFS_USE_LABEL (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MULTI_PARTITION (0) -#define MICROPY_FATFS_NUM_PERSISTENT (1) - -//#define MICROPY_FATFS_MAX_SS (4096) -#define FILESYSTEM_BLOCK_SIZE (512) - -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (MICROPY_VFS) - -// TODO these should be generic, not bound to fatfs -#define mp_type_fileio fatfs_type_fileio -#define mp_type_textio fatfs_type_textio - -// use vfs's functions for import stat and builtin open -#if MICROPY_VFS -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj -#endif +#include "ble_drv.h" -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (0) -#define MICROPY_PY_BUILTINS_STR_PARTITION (0) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_EXECFILE (0) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT nrf5_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_MODULE_BUILTIN_INIT (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (0) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (0) -#define MICROPY_NONSTANDARD_TYPECODES (0) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (0) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_STDFILES (0) -#define MICROPY_PY_SYS_STDIO_BUFFER (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_IO_FILEIO (0) -#define MICROPY_PY_UERRNO (0) -#define MICROPY_PY_UBINASCII (0) -#define MICROPY_PY_URANDOM (0) -#define MICROPY_PY_URANDOM_EXTRA_FUNCS (0) -#define MICROPY_PY_UCTYPES (0) -#define MICROPY_PY_UZLIB (0) -#define MICROPY_PY_UJSON (0) -#define MICROPY_PY_URE (0) -#define MICROPY_PY_UHEAPQ (0) -#define MICROPY_PY_UHASHLIB (0) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PULSE (0) -#define MICROPY_PY_MACHINE_I2C_MAKE_NEW machine_hard_i2c_make_new -#define MICROPY_PY_MACHINE_SPI (0) -#define MICROPY_PY_FRAMEBUF (0) - -#define MICROPY_KBD_EXCEPTION (1) - -#ifndef MICROPY_HW_LED_COUNT -#define MICROPY_HW_LED_COUNT (0) -#endif +#include "nrf_mbr.h" // for MBR_SIZE +#include "nrf_sdm.h" // for SD_FLASH_SIZE +#include "peripherals/nrf/nvm.h" // for FLASH_PAGE_SIZE -#ifndef MICROPY_HW_LED_PULLUP -#define MICROPY_HW_LED_PULLUP (0) -#endif +// Max RAM used by SoftDevice. Can be changed when SoftDevice parameters are changed. +// See common.template.ld. +#define SOFTDEVICE_RAM_SIZE (64*1024) -#ifndef MICROPY_PY_MUSIC -#define MICROPY_PY_MUSIC (0) +#ifdef NRF52840 +#define MICROPY_PY_SYS_PLATFORM "nRF52840" +#define FLASH_SIZE (0x100000) // 1MiB +// Special RAM area for SPIM3 transmit buffer, to work around hardware bug. +// See common.template.ld. +#define SPIM3_BUFFER_SIZE (8192) #endif -#ifndef MICROPY_PY_MACHINE_ADC -#define MICROPY_PY_MACHINE_ADC (0) -#endif +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) +#define MICROPY_PY_FUNCTION_ATTRS (1) +#define MICROPY_PY_IO (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) +#define MICROPY_PY_SYS_STDIO_BUFFER (1) +#define MICROPY_PY_UBINASCII (1) +#define MICROPY_PY_UJSON (1) -#ifndef MICROPY_PY_MACHINE_I2C -#define MICROPY_PY_MACHINE_I2C (0) -#endif +// 24kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 -#ifndef MICROPY_PY_MACHINE_HW_SPI -#define MICROPY_PY_MACHINE_HW_SPI (1) -#endif +//////////////////////////////////////////////////////////////////////////////////////////////////// -#ifndef MICROPY_PY_MACHINE_HW_PWM -#define MICROPY_PY_MACHINE_HW_PWM (0) -#endif +// This also includes mpconfigboard.h. +#include "py/circuitpy_mpconfig.h" -#ifndef MICROPY_PY_MACHINE_SOFT_PWM -#define MICROPY_PY_MACHINE_SOFT_PWM (0) -#endif +// Definitions that might be overriden by mpconfigboard.h -#ifndef MICROPY_PY_MACHINE_TIMER -#define MICROPY_PY_MACHINE_TIMER (0) +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (8192) #endif -#ifndef MICROPY_PY_MACHINE_RTC -#define MICROPY_PY_MACHINE_RTC (0) +#ifndef BOARD_HAS_32KHZ_XTAL +// Assume crystal is present, which is the most common case. +#define BOARD_HAS_32KHZ_XTAL (1) #endif -#ifndef MICROPY_PY_HW_RNG -#define MICROPY_PY_HW_RNG (1) +#if INTERNAL_FLASH_FILESYSTEM + #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (256*1024) + #endif +#else + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) #endif +// Flash layout, starting at 0x00000000 +// +// - SoftDevice +// - ISR +// - firmware +// - BLE config (bonding info, etc.) (optional) +// - microcontroller.nvm (optional) +// - internal CIRCUITPY flash filesystem (optional) +// The flash filesystem is adjacent to the bootloader, so that its location will not change even if +// other regions change in size. +// - bootloader (note the MBR at 0x0 redirects to the bootloader here, in high flash) +// - bootloader settings -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) +// Define these regions starting up from the bottom of flash: -// Scan gamepad every 32ms -#define CIRCUITPY_GAMEPAD_TICKS 0x1f +#define MBR_START_ADDR (0x0) +// MBR_SIZE is from nrf_mbr.h +#define SD_FLASH_START_ADDR (MBR_START_ADDR + MBR_SIZE) -// if sdk is in use, import configuration -#if BLUETOOTH_SD -#include "bluetooth_conf.h" -#endif +// SD_FLASH_SIZE is from nrf_sdm.h +#define ISR_START_ADDR (SD_FLASH_START_ADDR + SD_FLASH_SIZE) +#define ISR_SIZE (0x1000) // 4kiB -#ifndef MICROPY_PY_UBLUEPY -#define MICROPY_PY_UBLUEPY (0) -#endif +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE FLASH_PAGE_SIZE -#ifndef MICROPY_PY_BLE_NUS -#define MICROPY_PY_BLE_NUS (0) -#endif +#define CIRCUITPY_FIRMWARE_START_ADDR (ISR_START_ADDR + ISR_SIZE) -// type definitions for the specific machine +// Define these regions starting down from the bootloader: -#define BYTES_PER_WORD (4) +// Bootloader values from https://github.com/adafruit/Adafruit_nRF52_Bootloader/blob/master/src/linker/s140_v6.ld +#define BOOTLOADER_START_ADDR (0x000F4000) +#define BOOTLOADER_SIZE (0xA000) // 40kiB +#define BOOTLOADER_SETTINGS_START_ADDR (0x000FF000) +#define BOOTLOADER_SETTINGS_SIZE (0x1000) // 4kiB -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE) -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%u" -#define INT_FMT "%d" -#define HEX2_FMT "%02x" - -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE > 0 && CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR != (BOOTLOADER_START_ADDR - 256*1024) +#warning Internal flash filesystem location has moved! +#endif -// extra built in modules to add to the list of known ones +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE) -extern const struct _mp_obj_module_t microcontroller_module; -extern const struct _mp_obj_module_t bitbangio_module; -extern const struct _mp_obj_module_t analogio_module; -extern const struct _mp_obj_module_t digitalio_module; -extern const struct _mp_obj_module_t pulseio_module; -extern const struct _mp_obj_module_t busio_module; -extern const struct _mp_obj_module_t board_module; -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t random_module; -extern const struct _mp_obj_module_t storage_module; -extern const struct _mp_obj_module_t struct_module; -extern const struct _mp_obj_module_t time_module; -extern const struct _mp_obj_module_t supervisor_module; -extern const struct _mp_obj_module_t gamepad_module; +// 32kiB for bonding, etc. +#define CIRCUITPY_BLE_CONFIG_SIZE (32*1024) +#define CIRCUITPY_BLE_CONFIG_START_ADDR (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE) -extern const struct _mp_obj_module_t pyb_module; -extern const struct _mp_obj_module_t machine_module; -extern const struct _mp_obj_module_t mp_module_utime; -extern const struct _mp_obj_module_t mp_module_ubluepy; -extern const struct _mp_obj_module_t music_module; -extern const struct _mp_obj_module_t random_module; +// The firmware space is the space left over between the fixed lower and upper regions. +#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) -extern const struct _mp_obj_module_t ble_module; +#if BOOTLOADER_START_ADDR % FLASH_ERASE_SIZE != 0 +#error BOOTLOADER_START_ADDR must be on a flash erase boundary. +#endif -#if MICROPY_PY_MUSIC -#define MUSIC_MODULE { MP_ROM_QSTR(MP_QSTR_music), MP_ROM_PTR(&music_module) }, -#else -#define MUSIC_MODULE +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash erase boundary. +#endif +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if MICROPY_PY_HW_RNG -#define RANDOM_MODULE { MP_ROM_QSTR(MP_QSTR_random), MP_ROM_PTR(&random_module) }, -#else -#define RANDOM_MODULE +#if CIRCUITPY_BLE_CONFIG_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be on a flash erase boundary. +#endif +#if CIRCUITPY_BLE_CONFIG_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if MICROPY_PY_UBLUEPY -#define UBLUEPY_MODULE { MP_ROM_QSTR(MP_QSTR_ubluepy), MP_ROM_PTR(&mp_module_ubluepy) }, -#else -#define UBLUEPY_MODULE +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash erase boundary. +#endif +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if MICROPY_PY_BLE -extern const struct _mp_obj_module_t ble_module; -#define BLE_MODULE { MP_ROM_QSTR(MP_QSTR_ble), MP_ROM_PTR(&ble_module) }, -#else -#define BLE_MODULE +#if CIRCUITPY_FIRMWARE_SIZE < 0 +#error No space left in flash for firmware after specifying other regions! #endif -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_OBJ_NEW_QSTR (MP_QSTR_board ), (mp_obj_t)&board_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_busio ), (mp_obj_t)&busio_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_analogio ), (mp_obj_t)&analogio_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_digitalio ), (mp_obj_t)&digitalio_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_pulseio ), (mp_obj_t)&pulseio_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_microcontroller ), (mp_obj_t)µcontroller_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_bitbangio ), (mp_obj_t)&bitbangio_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_os ), (mp_obj_t)&os_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_random ), (mp_obj_t)&random_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_storage ), (mp_obj_t)&storage_module },\ - { MP_OBJ_NEW_QSTR (MP_QSTR_struct ), (mp_obj_t)&struct_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_supervisor ), (mp_obj_t)&supervisor_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_gamepad ), (mp_obj_t)&gamepad_module }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_time ), (mp_obj_t)&time_module }, \ - { MP_ROM_QSTR (MP_QSTR_pyb ), MP_ROM_PTR(&pyb_module) }, \ - { MP_ROM_QSTR (MP_QSTR_utime ), MP_ROM_PTR(&mp_module_utime) }, \ - MUSIC_MODULE \ - RANDOM_MODULE \ - BLE_MODULE \ - UBLUEPY_MODULE \ - - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR (MP_QSTR_time ), MP_ROM_PTR(&mp_module_utime) }, \ - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR (MP_QSTR_help), MP_ROM_PTR(&mp_builtin_help_obj) }, \ - { MP_OBJ_NEW_QSTR (MP_QSTR_input), (mp_obj_t)&mp_builtin_input_obj }, \ - { MP_ROM_QSTR (MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR (MP_QSTR_pyb ), MP_ROM_PTR(&pyb_module) }, \ - { MP_ROM_QSTR (MP_QSTR_machine ), MP_ROM_PTR(&machine_module) }, \ - BLE_MODULE \ - -#define MP_STATE_PORT MP_STATE_VM #define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t pyb_config_main; \ - mp_obj_t pin_class_mapper; \ - mp_obj_t pin_class_map_dict; \ - /* Used to do callbacks to Python code on interrupt */ \ - struct _pyb_timer_obj_t *pyb_timer_obj_all[14]; \ - \ - /* stdio is repeated on this UART object if it's not null */ \ - struct _machine_hard_uart_obj_t *pyb_stdio_uart; \ - \ - /* pointers to all UART objects (if they have been created) */ \ - struct _machine_hard_uart_obj_t *pyb_uart_obj_all[1]; \ - \ - /* list of registered NICs */ \ - mp_obj_list_t mod_network_nic_list; \ - \ - /* microbit modules */ \ - struct _music_data_t *music_data; \ - const struct _pwm_events *pwm_active_events; \ - const struct _pwm_events *pwm_pending_events; \ - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// We need to provide a declaration/definition of alloca() -#include - -#define MICROPY_PIN_DEFS_PORT_H "pin_defs_nrf5.h" -#define CIRCUITPY_BOOT_OUTPUT_FILE "/boot_out.txt" + CIRCUITPY_COMMON_ROOT_POINTERS \ + uint16_t* pixels_pattern_heap; \ + ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \ -#endif + +#endif // NRF5_MPCONFIGPORT_H__ diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index 17304b783b9dc..fcc59c484ab72 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -1,7 +1,73 @@ +# All linking can be done with this common templated linker script, which has +# parameters that vary based on chip and/or board. +LD_TEMPLATE_FILE = boards/common.template.ld + # Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk # $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. # This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz -INTERNAL_LIBM = (1) +INTERNAL_LIBM = 1 + +USB_SERIAL_NUMBER_LENGTH = 16 + +# All nRF ports have longints. +LONGINT_IMPL = MPZ + +# Audio via PWM +ifndef CIRCUITPY_AUDIOCORE +CIRCUITPY_AUDIOCORE = 1 +endif + +CIRCUITPY_AUDIOIO = 0 + + +# The ifndef's allow overriding in mpconfigboard.mk. + +ifndef +CIRCUITPY_BLEIO = 1 +endif + +ifndef CIRCUITPY_AUDIOMIXER +CIRCUITPY_AUDIOMIXER = 1 +endif + +ifndef CIRCUITPY_AUDIOPWMIO +CIRCUITPY_AUDIOPWMIO = 1 +endif + +ifndef CIRCUITPY_AUDIOBUSIO +CIRCUITPY_AUDIOBUSIO = 1 +endif + +# No I2CSlave implementation +CIRCUITPY_I2CSLAVE = 0 + +# enable RTC +ifndef CIRCUITPY_RTC +CIRCUITPY_RTC = 1 +endif + +# frequencyio not yet implemented +CIRCUITPY_FREQUENCYIO = 0 + +# nRF52840-specific + +ifeq ($(MCU_CHIP),nrf52840) +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 + +SD ?= s140 +SOFTDEV_VERSION ?= 6.1.0 + +BOOT_SETTING_ADDR = 0xFF000 +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 + +# CircuitPython doesn't yet support NFC so force the NFC antenna pins to be GPIO. +# See https://github.com/adafruit/circuitpython/issues/1300 +# Defined here because system_nrf52840.c doesn't #include any of our own include files. +CFLAGS += -DCONFIG_NFCT_PINS_AS_GPIOS +CIRCUITPY_ULAB = 1 +endif diff --git a/ports/nrf/mphalport.c b/ports/nrf/mphalport.c index 957d3535d296a..3885d5a826676 100644 --- a/ports/nrf/mphalport.c +++ b/ports/nrf/mphalport.c @@ -3,6 +3,8 @@ * * The MIT License (MIT) * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec * Copyright (c) 2015 Glenn Ruben Bakke * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -24,62 +26,27 @@ * THE SOFTWARE. */ -#include #include -#include "py/mpstate.h" #include "py/mphal.h" -#include "py/mperrno.h" -#include "hal_uart.h" - -#define UART_INSTANCE UART_BASE(0) -FIL* boot_output_file; - -// this table converts from HAL_StatusTypeDef to POSIX errno -const byte mp_hal_status_to_errno_table[4] = { - [HAL_OK] = 0, - [HAL_ERROR] = MP_EIO, - [HAL_BUSY] = MP_EBUSY, - [HAL_TIMEOUT] = MP_ETIMEDOUT, -}; - -NORETURN void mp_hal_raise(HAL_StatusTypeDef status) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_OSError, MP_OBJ_NEW_SMALL_INT(mp_hal_status_to_errno_table[status]))); -} - -#if (MICROPY_PY_BLE_NUS == 0) -int mp_hal_stdin_rx_chr(void) { - for (;;) { - if ( hal_uart_available(UART_INSTANCE) ) { - uint8_t ch; - hal_uart_char_read(UART_INSTANCE, &ch); - return (int) ch; +#include "py/mpstate.h" +#include "py/gc.h" +#include "supervisor/shared/tick.h" + +/*------------------------------------------------------------------*/ +/* delay + *------------------------------------------------------------------*/ +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + RUN_BACKGROUND_TASKS; + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. } - - return 0; -} - -bool mp_hal_stdin_any(void) { - return hal_uart_available(UART_INSTANCE); -} - -void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) { - while(len--) { - hal_uart_char_write(UART_INSTANCE, *str++); - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, mp_uint_t len) { - while(len--){ - if (*str == '\n') { - hal_uart_char_write(UART_INSTANCE, '\r'); - } - hal_uart_char_write(UART_INSTANCE, *str++); - } -} -#endif - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); } diff --git a/ports/nrf/mphalport.h b/ports/nrf/mphalport.h index 3334fd7fe96a7..8bb351401ade4 100644 --- a/ports/nrf/mphalport.h +++ b/ports/nrf/mphalport.h @@ -27,53 +27,19 @@ #ifndef __NRF52_HAL #define __NRF52_HAL -#include "py/mpconfig.h" -#include NRF5_HAL_H -#include "pin.h" -#include "hal_gpio.h" - -#include "lib/oofatfs/ff.h" - -typedef enum -{ - HAL_OK = 0x00, - HAL_ERROR = 0x01, - HAL_BUSY = 0x02, - HAL_TIMEOUT = 0x03 -} HAL_StatusTypeDef; - -extern FIL* boot_output_file; - -static inline uint32_t hal_tick_fake(void) { - return 0; -} +#include +#include -#define mp_hal_ticks_ms hal_tick_fake // TODO: implement. Right now, return 0 always +#include "lib/utils/interrupt_char.h" +#include "nrfx_uarte.h" +#include "py/mpconfig.h" +#include "supervisor/shared/tick.h" -extern const unsigned char mp_hal_status_to_errno_table[4]; +extern nrfx_uarte_t serial_instance; -NORETURN void mp_hal_raise(HAL_StatusTypeDef status); -void mp_hal_set_interrupt_char(int c); // -1 to disable +#define mp_hal_ticks_ms() ((mp_uint_t) supervisor_ticks_ms32()) +#define mp_hal_delay_us(us) NRFX_DELAY_US((uint32_t) (us)) -int mp_hal_stdin_rx_chr(void); -void mp_hal_stdout_tx_str(const char *str); bool mp_hal_stdin_any(void); -#define mp_hal_pin_obj_t const pin_obj_t* -#define mp_hal_get_pin_obj(o) pin_find(o) -#define mp_hal_pin_high(p) hal_gpio_pin_high(p) -#define mp_hal_pin_low(p) hal_gpio_pin_low(p) -#define mp_hal_pin_read(p) hal_gpio_pin_read(p) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) -#define mp_hal_pin_od_low(p) mp_hal_pin_low(p) -#define mp_hal_pin_od_high(p) mp_hal_pin_high(p) -#define mp_hal_pin_open_drain(p) hal_gpio_cfg_pin(p->port, p->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED) - - -// TODO: empty implementation for now. Used by machine_spi.c:69 -#define mp_hal_delay_us_fast(p) -#define mp_hal_ticks_us() (0) -#define mp_hal_ticks_cpu() (0) - #endif - diff --git a/ports/nrf/nrf52_af.csv b/ports/nrf/nrf52_af.csv deleted file mode 100644 index 284370d0602c0..0000000000000 --- a/ports/nrf/nrf52_af.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00,P0_00 -P0_01,P0_01 -P0_02,P0_02 -P0_03,P0_03 -P0_04,P0_04 -P0_05,P0_05 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28 -P0_29,P0_29 -P0_30,P0_30 -P0_31,P0_31 -P1_00,P1_00 -P1_01,P1_01 -P1_02,P1_02 -P1_03,P1_03 -P1_04,P1_04 -P1_05,P1_05 -P1_06,P1_06 -P1_07,P1_07 -P1_08,P1_08 -P1_09,P1_09 -P1_10,P1_10 -P1_11,P1_11 -P1_12,P1_12 -P1_13,P1_13 -P1_14,P1_14 -P1_15,P1_15 diff --git a/ports/nrf/nrfx b/ports/nrf/nrfx new file mode 160000 index 0000000000000..3f55e49eb11e6 --- /dev/null +++ b/ports/nrf/nrfx @@ -0,0 +1 @@ +Subproject commit 3f55e49eb11e6db0da1da09e189bb094222702c9 diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h new file mode 100644 index 0000000000000..e37c6093407a9 --- /dev/null +++ b/ports/nrf/nrfx_config.h @@ -0,0 +1,120 @@ +#ifndef NRFX_CONFIG_H__ +#define NRFX_CONFIG_H__ + +// Power +#define NRFX_POWER_ENABLED 1 +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7 + +// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH. +// It doesn't work with the SoftDevice. +// See https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session +// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840 +#ifdef NRF52840_XXAA +// #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1 +#endif + +// SPI +#define NRFX_SPIM_ENABLED 1 + +// TWIM0 and TWIM1 are the same peripherals as SPIM0 and SPIM1. +// The IRQ handlers for these peripherals are set up at compile time, +// so out of the box TWIM0/SPIM0 and TWIM1/SPIM1 cannot be shared +// between common-hal/busio/I2C.c and SPI.c. +// We could write an interrupt handler that checks whether it's +// being used for SPI or I2C, but perhaps one I2C and two SPI or two I2C and one SPI +// are good enough for now. + +// CIRCUITPY_NRF_NUM_I2C is 1 or 2 to choose how many I2C (TWIM) peripherals +// to provide. +// With SPIM3 working we can have two I2C and two SPI. +#ifndef CIRCUITPY_NRF_NUM_I2C +#define CIRCUITPY_NRF_NUM_I2C 2 +#endif + +#if CIRCUITPY_NRF_NUM_I2C != 1 && CIRCUITPY_NRF_NUM_I2C != 2 +# error CIRCUITPY_NRF_NUM_I2C must be 1 or 2 +#endif + +// Enable SPIM1, SPIM2 and SPIM3 (if available) +// No conflict with TWIM0. +#if CIRCUITPY_NRF_NUM_I2C == 1 +#define NRFX_SPIM1_ENABLED 1 +#endif +#define NRFX_SPIM2_ENABLED 1 +#ifdef NRF52840_XXAA + #define NRFX_SPIM_EXTENDED_ENABLED 1 + #define NRFX_SPIM3_ENABLED 1 +#else + #define NRFX_SPIM3_ENABLED 0 +#endif + + +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#define NRFX_SPIM_MISO_PULL_CFG 1 + +// QSPI +#define NRFX_QSPI_ENABLED 1 + +// TWI aka. I2C; always enable TWIM0 (no conflict with SPIM1 and SPIM2) +#define NRFX_TWIM_ENABLED 1 +#define NRFX_TWIM0_ENABLED 1 + +#if CIRCUITPY_NRF_NUM_I2C == 2 +#define NRFX_TWIM1_ENABLED 1 +#endif + +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K +#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 + +// UART +#define NRFX_UARTE_ENABLED 1 +#define NRFX_UARTE0_ENABLED 1 +#define NRFX_UARTE1_ENABLED 1 + +// PWM +#define NRFX_PWM0_ENABLED 1 +#define NRFX_PWM1_ENABLED 1 +#define NRFX_PWM2_ENABLED 1 + +#ifdef NRF_PWM3 +#define NRFX_PWM3_ENABLED 1 +#else +#define NRFX_PWM3_ENABLED 0 +#endif + +#define NRFX_RTC_ENABLED 1 +#define NRFX_RTC0_ENABLED 1 +#define NRFX_RTC1_ENABLED 1 +#define NRFX_RTC2_ENABLED 1 + +// TIMERS +#define NRFX_TIMER_ENABLED 1 +// Don't enable TIMER0: it's used by the SoftDevice. +#define NRFX_TIMER0_ENABLED 0 +#define NRFX_TIMER1_ENABLED 1 +#define NRFX_TIMER2_ENABLED 1 + +#ifdef NRF_TIMER3 +#define NRFX_TIMER3_ENABLED 1 +#else +#define NRFX_TIMER3_ENABLED 0 +#endif + +#ifdef NRF_TIMER4 +#define NRFX_TIMER4_ENABLED 1 +#else +#define NRFX_TIMER4_ENABLED 0 +#endif + +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 + +// GPIO interrupt +#define NRFX_GPIOTE_ENABLED 1 +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 + +// NVM controller +#define NRFX_NVMC_ENABLED 1 + +#endif // NRFX_CONFIG_H__ diff --git a/ports/nrf/nrfx_glue.h b/ports/nrf/nrfx_glue.h new file mode 100644 index 0000000000000..345de387045c6 --- /dev/null +++ b/ports/nrf/nrfx_glue.h @@ -0,0 +1,247 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_GLUE_H__ +#define NRFX_GLUE_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * @defgroup nrfx_glue nrfx_glue.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +#include + +void __assert_func(const char *file, int line, const char *func, const char *expr); + +//------------------------------------------------------------------------------ + +/** + * @brief Macro for placing a runtime assertion. + * + * @param expression Expression to evaluate. + */ + +#ifndef NDEBUG +#define NRFX_ASSERT(expr) ((expr) ? (void)0 : __assert_func(__FILE__, __LINE__, __FUNCTION__, #expr)) +#else +#define NRFX_ASSERT(expr) +#endif +/** + * @brief Macro for placing a compile time assertion. + * + * @param expression Expression to evaluate. + */ +#define NRFX_STATIC_ASSERT(expression) + + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) +#endif + +//------------------------------------------------------------------------------ + +#ifdef SOFTDEVICE_PRESENT +#define INTERRUPT_PRIORITY_IS_VALID(pri) ((((pri) > 1) && ((pri) < 4)) || \ + (((pri) > 4) && ((pri) < 8))) +#else +#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 8) +#endif //SOFTDEVICE_PRESENT + +/** + * @brief Macro for setting the priority of a specific IRQ. + * + * @param irq_number IRQ number. + * @param priority Priority to set. + */ +#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) \ + _NRFX_IRQ_PRIORITY_SET(irq_number, priority) +static inline void _NRFX_IRQ_PRIORITY_SET(IRQn_Type irq_number, + uint8_t priority) +{ + //ASSERT(INTERRUPT_PRIORITY_IS_VALID(priority)); + NVIC_SetPriority(irq_number, priority); +} + +/** + * @brief Macro for enabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_ENABLE(irq_number) _NRFX_IRQ_ENABLE(irq_number) +static inline void _NRFX_IRQ_ENABLE(IRQn_Type irq_number) +{ + NVIC_ClearPendingIRQ(irq_number); + NVIC_EnableIRQ(irq_number); +} + +/** + * @brief Macro for checking if a specific IRQ is enabled. + * + * @param irq_number IRQ number. + * + * @retval true If the IRQ is enabled. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number) +static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number) +{ + return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32))); +} + +/** + * @brief Macro for disabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number) +static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number) +{ + NVIC_DisableIRQ(irq_number); +} + +/** + * @brief Macro for setting a specific IRQ as pending. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_SET(irq_number) _NRFX_IRQ_PENDING_SET(irq_number) +static inline void _NRFX_IRQ_PENDING_SET(IRQn_Type irq_number) +{ + NVIC_SetPendingIRQ(irq_number); +} + +/** + * @brief Macro for clearing the pending status of a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_CLEAR(irq_number) _NRFX_IRQ_PENDING_CLEAR(irq_number) +static inline void _NRFX_IRQ_PENDING_CLEAR(IRQn_Type irq_number) +{ + NVIC_ClearPendingIRQ(irq_number); +} + +/** + * @brief Macro for checking the pending status of a specific IRQ. + * + * @retval true If the IRQ is pending. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_PENDING(irq_number) _NRFX_IRQ_IS_PENDING(irq_number) +static inline bool _NRFX_IRQ_IS_PENDING(IRQn_Type irq_number) +{ + return (NVIC_GetPendingIRQ(irq_number) == 1); +} + +//#include +//#include +/** + * @brief Macro for entering into a critical section. + */ +#define NRFX_CRITICAL_SECTION_ENTER() CRITICAL_REGION_ENTER() + +/** + * @brief Macro for exiting from a critical section. + */ +#define NRFX_CRITICAL_SECTION_EXIT() CRITICAL_REGION_EXIT() + +//------------------------------------------------------------------------------ + +/** + * @brief When set to a non-zero value, this macro specifies that + * @ref nrfx_coredep_delay_us uses a precise DWT-based solution. + * A compilation error is generated if the DWT unit is not present + * in the SoC used. + */ +#define NRFX_DELAY_DWT_BASED 0 + +#include + +#define NRFX_DELAY_US(us_time) nrfx_coredep_delay_us(us_time) + +//------------------------------------------------------------------------------ + +/** + * @brief When set to a non-zero value, this macro specifies that the + * @ref nrfx_error_codes and the @ref ret_code_t type itself are defined + * in a customized way and the default definitions from @c + * should not be used. + */ +#define NRFX_CUSTOM_ERROR_CODES 0 + +//------------------------------------------------------------------------------ + +/** + * @brief Bitmask defining PPI channels reserved to be used outside of nrfx. + */ +#define NRFX_PPI_CHANNELS_USED NRF_PPI_CHANNELS_USED + +/** + * @brief Bitmask defining PPI groups reserved to be used outside of nrfx. + */ +#define NRFX_PPI_GROUPS_USED NRF_PPI_GROUPS_USED + +/** + * @brief Bitmask defining SWI instances reserved to be used outside of nrfx. + */ +#define NRFX_SWI_USED NRF_SWI_USED + +/** + * @brief Bitmask defining TIMER instances reserved to be used outside of nrfx. + */ +#define NRFX_TIMERS_USED NRF_TIMERS_USED + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_GLUE_H__ diff --git a/ports/nrf/nrfx_log.h b/ports/nrf/nrfx_log.h new file mode 100644 index 0000000000000..886eb75f8662a --- /dev/null +++ b/ports/nrf/nrfx_log.h @@ -0,0 +1,138 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_LOG_H__ +#define NRFX_LOG_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_log nrfx_log.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +/** + * @brief Macro for logging a message with the severity level ERROR. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_ERROR(format, ...) + +/** + * @brief Macro for logging a message with the severity level WARNING. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_WARNING(format, ...) + +/** + * @brief Macro for logging a message with the severity level INFO. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_INFO(format, ...) + +/** + * @brief Macro for logging a message with the severity level DEBUG. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_DEBUG(format, ...) + + +/** + * @brief Macro for logging a memory dump with the severity level ERROR. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level WARNING. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level INFO. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_INFO(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level DEBUG. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length) + + +/** + * @brief Macro for getting the textual representation of a given error code. + * + * @param[in] error_code Error code. + * + * @return String containing the textual representation of the error code. + */ +#define NRFX_LOG_ERROR_STRING_GET(error_code) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_LOG_H__ diff --git a/ports/nrf/peripherals/nrf/cache.c b/ports/nrf/peripherals/nrf/cache.c new file mode 100644 index 0000000000000..02e11c4613a4d --- /dev/null +++ b/ports/nrf/peripherals/nrf/cache.c @@ -0,0 +1,38 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx.h" + +// Turn off cache and invalidate all data in it. +void nrf_peripherals_disable_and_clear_cache(void) { + // Disabling cache also invalidates all cache entries. + NRF_NVMC->ICACHECNF &= ~(1 << NVMC_ICACHECNF_CACHEEN_Pos); +} + +// Enable cache +void nrf_peripherals_enable_cache(void) { + NRF_NVMC->ICACHECNF |= 1 << NVMC_ICACHECNF_CACHEEN_Pos; +} diff --git a/ports/nrf/peripherals/nrf/cache.h b/ports/nrf/peripherals/nrf/cache.h new file mode 100644 index 0000000000000..d9ba63f3db6c1 --- /dev/null +++ b/ports/nrf/peripherals/nrf/cache.h @@ -0,0 +1,28 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +void nrf_peripherals_disable_and_clear_cache(void); +void nrf_peripherals_enable_cache(void); diff --git a/ports/nrf/peripherals/nrf/clocks.c b/ports/nrf/peripherals/nrf/clocks.c new file mode 100644 index 0000000000000..269365cc94ff1 --- /dev/null +++ b/ports/nrf/peripherals/nrf/clocks.c @@ -0,0 +1,42 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx.h" +#include "mpconfigport.h" + +void nrf_peripherals_clocks_init(void) { + +#if BOARD_HAS_32KHZ_XTAL + NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); +#else + NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); +#endif + NRF_CLOCK->TASKS_LFCLKSTART = 1UL; + + // Wait for clocks to start. + while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {} +} diff --git a/ports/nrf/peripherals/nrf/clocks.h b/ports/nrf/peripherals/nrf/clocks.h new file mode 100644 index 0000000000000..e815d849ff5ba --- /dev/null +++ b/ports/nrf/peripherals/nrf/clocks.h @@ -0,0 +1,27 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +void nrf_peripherals_clocks_init(void); diff --git a/ports/nrf/peripherals/nrf/nrf52840/pins.c b/ports/nrf/peripherals/nrf/nrf52840/pins.c new file mode 100644 index 0000000000000..b7dc8e65e0598 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52840/pins.c @@ -0,0 +1,78 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "nrf/pins.h" + +const mcu_pin_obj_t pin_P0_00 = PIN(P0_00, 0, 0, 0); +const mcu_pin_obj_t pin_P0_01 = PIN(P0_01, 0, 1, 0); +const mcu_pin_obj_t pin_P0_02 = PIN(P0_02, 0, 2, SAADC_CH_PSELP_PSELP_AnalogInput0); +const mcu_pin_obj_t pin_P0_03 = PIN(P0_03, 0, 3, SAADC_CH_PSELP_PSELP_AnalogInput1); +const mcu_pin_obj_t pin_P0_04 = PIN(P0_04, 0, 4, SAADC_CH_PSELP_PSELP_AnalogInput2); +const mcu_pin_obj_t pin_P0_05 = PIN(P0_05, 0, 5, SAADC_CH_PSELP_PSELP_AnalogInput3); +const mcu_pin_obj_t pin_P0_06 = PIN(P0_06, 0, 6, 0); +const mcu_pin_obj_t pin_P0_07 = PIN(P0_07, 0, 7, 0); +const mcu_pin_obj_t pin_P0_08 = PIN(P0_08, 0, 8, 0); +const mcu_pin_obj_t pin_P0_09 = PIN(P0_09, 0, 9, 0); +const mcu_pin_obj_t pin_P0_10 = PIN(P0_10, 0, 10, 0); +const mcu_pin_obj_t pin_P0_11 = PIN(P0_11, 0, 11, 0); +const mcu_pin_obj_t pin_P0_12 = PIN(P0_12, 0, 12, 0); +const mcu_pin_obj_t pin_P0_13 = PIN(P0_13, 0, 13, 0); +const mcu_pin_obj_t pin_P0_14 = PIN(P0_14, 0, 14, 0); +const mcu_pin_obj_t pin_P0_15 = PIN(P0_15, 0, 15, 0); +const mcu_pin_obj_t pin_P0_16 = PIN(P0_16, 0, 16, 0); +const mcu_pin_obj_t pin_P0_17 = PIN(P0_17, 0, 17, 0); +const mcu_pin_obj_t pin_P0_18 = PIN(P0_18, 0, 18, 0); +const mcu_pin_obj_t pin_P0_19 = PIN(P0_19, 0, 19, 0); +const mcu_pin_obj_t pin_P0_20 = PIN(P0_20, 0, 20, 0); +const mcu_pin_obj_t pin_P0_21 = PIN(P0_21, 0, 21, 0); +const mcu_pin_obj_t pin_P0_22 = PIN(P0_22, 0, 22, 0); +const mcu_pin_obj_t pin_P0_23 = PIN(P0_23, 0, 23, 0); +const mcu_pin_obj_t pin_P0_24 = PIN(P0_24, 0, 24, 0); +const mcu_pin_obj_t pin_P0_25 = PIN(P0_25, 0, 25, 0); +const mcu_pin_obj_t pin_P0_26 = PIN(P0_26, 0, 26, 0); +const mcu_pin_obj_t pin_P0_27 = PIN(P0_27, 0, 27, 0); +const mcu_pin_obj_t pin_P0_28 = PIN(P0_28, 0, 28, SAADC_CH_PSELP_PSELP_AnalogInput4); +const mcu_pin_obj_t pin_P0_29 = PIN(P0_29, 0, 29, SAADC_CH_PSELP_PSELP_AnalogInput5); +const mcu_pin_obj_t pin_P0_30 = PIN(P0_30, 0, 30, SAADC_CH_PSELP_PSELP_AnalogInput6); +const mcu_pin_obj_t pin_P0_31 = PIN(P0_31, 0, 31, SAADC_CH_PSELP_PSELP_AnalogInput7); +const mcu_pin_obj_t pin_P1_00 = PIN(P1_00, 1, 0, 0); +const mcu_pin_obj_t pin_P1_01 = PIN(P1_01, 1, 1, 0); +const mcu_pin_obj_t pin_P1_02 = PIN(P1_02, 1, 2, 0); +const mcu_pin_obj_t pin_P1_03 = PIN(P1_03, 1, 3, 0); +const mcu_pin_obj_t pin_P1_04 = PIN(P1_04, 1, 4, 0); +const mcu_pin_obj_t pin_P1_05 = PIN(P1_05, 1, 5, 0); +const mcu_pin_obj_t pin_P1_06 = PIN(P1_06, 1, 6, 0); +const mcu_pin_obj_t pin_P1_07 = PIN(P1_07, 1, 7, 0); +const mcu_pin_obj_t pin_P1_08 = PIN(P1_08, 1, 8, 0); +const mcu_pin_obj_t pin_P1_09 = PIN(P1_09, 1, 9, 0); +const mcu_pin_obj_t pin_P1_10 = PIN(P1_10, 1, 10, 0); +const mcu_pin_obj_t pin_P1_11 = PIN(P1_11, 1, 11, 0); +const mcu_pin_obj_t pin_P1_12 = PIN(P1_12, 1, 12, 0); +const mcu_pin_obj_t pin_P1_13 = PIN(P1_13, 1, 13, 0); +const mcu_pin_obj_t pin_P1_14 = PIN(P1_14, 1, 14, 0); +const mcu_pin_obj_t pin_P1_15 = PIN(P1_15, 1, 15, 0); diff --git a/ports/nrf/peripherals/nrf/nrf52840/pins.h b/ports/nrf/peripherals/nrf/nrf52840/pins.h new file mode 100644 index 0000000000000..3ad72ff6327af --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52840/pins.h @@ -0,0 +1,79 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 by Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H +#define MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H + +extern const mcu_pin_obj_t pin_P0_00; +extern const mcu_pin_obj_t pin_P0_01; +extern const mcu_pin_obj_t pin_P0_02; +extern const mcu_pin_obj_t pin_P0_03; +extern const mcu_pin_obj_t pin_P0_04; +extern const mcu_pin_obj_t pin_P0_05; +extern const mcu_pin_obj_t pin_P0_06; +extern const mcu_pin_obj_t pin_P0_07; +extern const mcu_pin_obj_t pin_P0_08; +extern const mcu_pin_obj_t pin_P0_09; +extern const mcu_pin_obj_t pin_P0_10; +extern const mcu_pin_obj_t pin_P0_11; +extern const mcu_pin_obj_t pin_P0_12; +extern const mcu_pin_obj_t pin_P0_13; +extern const mcu_pin_obj_t pin_P0_14; +extern const mcu_pin_obj_t pin_P0_15; +extern const mcu_pin_obj_t pin_P0_16; +extern const mcu_pin_obj_t pin_P0_17; +extern const mcu_pin_obj_t pin_P0_18; +extern const mcu_pin_obj_t pin_P0_19; +extern const mcu_pin_obj_t pin_P0_20; +extern const mcu_pin_obj_t pin_P0_21; +extern const mcu_pin_obj_t pin_P0_22; +extern const mcu_pin_obj_t pin_P0_23; +extern const mcu_pin_obj_t pin_P0_24; +extern const mcu_pin_obj_t pin_P0_25; +extern const mcu_pin_obj_t pin_P0_26; +extern const mcu_pin_obj_t pin_P0_27; +extern const mcu_pin_obj_t pin_P0_28; +extern const mcu_pin_obj_t pin_P0_29; +extern const mcu_pin_obj_t pin_P0_30; +extern const mcu_pin_obj_t pin_P0_31; +extern const mcu_pin_obj_t pin_P1_00; +extern const mcu_pin_obj_t pin_P1_01; +extern const mcu_pin_obj_t pin_P1_02; +extern const mcu_pin_obj_t pin_P1_03; +extern const mcu_pin_obj_t pin_P1_04; +extern const mcu_pin_obj_t pin_P1_05; +extern const mcu_pin_obj_t pin_P1_06; +extern const mcu_pin_obj_t pin_P1_07; +extern const mcu_pin_obj_t pin_P1_08; +extern const mcu_pin_obj_t pin_P1_09; +extern const mcu_pin_obj_t pin_P1_10; +extern const mcu_pin_obj_t pin_P1_11; +extern const mcu_pin_obj_t pin_P1_12; +extern const mcu_pin_obj_t pin_P1_13; +extern const mcu_pin_obj_t pin_P1_14; +extern const mcu_pin_obj_t pin_P1_15; + +#endif // MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H diff --git a/ports/nrf/peripherals/nrf/nrf52840/power.c b/ports/nrf/peripherals/nrf/nrf52840/power.c new file mode 100644 index 0000000000000..d64c536bb3843 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52840/power.c @@ -0,0 +1,50 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx.h" +#include "hal/nrf_nvmc.h" + +void nrf_peripherals_power_init(void) { + // Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff + // if flash is erased, which sets the default to 1.8V + // This matters only when "high voltage mode" is enabled, which is true on the PCA10059, + // and might be true on other boards. + if (NRF_UICR->REGOUT0 == 0xffffffff && NRF_POWER->MAINREGSTATUS & 1) { + // Expand what nrf_nvmc_word_write() did. + // It's missing from nrfx V2.0.0, and nrfx_nvmc_word_write() does bounds + // checking which prevents writes to UICR. + // Reported: https://devzone.nordicsemi.com/f/nordic-q-a/57243/nrfx_nvmc-h-api-cannot-write-to-uicr + NRF_NVMC->CONFIG = NRF_NVMC_MODE_WRITE; + while (!(NRF_NVMC->READY & NVMC_READY_READY_Msk)) {} + NRF_UICR->REGOUT0 = UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos; + __DMB(); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {} + NRF_NVMC->CONFIG = NRF_NVMC_MODE_READONLY; + + // Must reset to enable change. + NVIC_SystemReset(); + } +} diff --git a/ports/nrf/peripherals/nrf/nvm.c b/ports/nrf/peripherals/nrf/nvm.c new file mode 100644 index 0000000000000..63b168f14e6f1 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nvm.c @@ -0,0 +1,135 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include +#include + +#include "nrfx_nvmc.h" + +#define FLASH_PAGE_SIZE (4096) + +#ifdef BLUETOOTH_SD +#include "ble_drv.h" +#include "nrf_sdm.h" + +STATIC bool sd_is_enabled(void) { + uint8_t sd_en = 0; + (void) sd_softdevice_is_enabled(&sd_en); + return sd_en; +} + +STATIC void sd_flash_operation_start(void) { + sd_flash_operation_status = SD_FLASH_OPERATION_IN_PROGRESS; +} + +STATIC sd_flash_operation_status_t sd_flash_operation_wait_until_done(void) { + // If the SD is not enabled, no events are generated, so just return immediately. + if (sd_is_enabled()) { + while (sd_flash_operation_status == SD_FLASH_OPERATION_IN_PROGRESS) { + sd_app_evt_wait(); + } + } else { + sd_flash_operation_status = SD_FLASH_OPERATION_DONE; + } + return sd_flash_operation_status; + +} + +bool sd_flash_page_erase_sync(uint32_t page_number) { + sd_flash_operation_start(); + if (sd_flash_page_erase(page_number) != NRF_SUCCESS) { + return false; + } + if (sd_flash_operation_wait_until_done() == SD_FLASH_OPERATION_ERROR) { + return false; + } + return true; +} + +bool sd_flash_write_sync(uint32_t *dest_words, uint32_t* src_words, uint32_t num_words) { + sd_flash_operation_start(); + if (sd_flash_write(dest_words, src_words, num_words) != NRF_SUCCESS) { + return false; + } + if (sd_flash_operation_wait_until_done() == SD_FLASH_OPERATION_ERROR) { + return false; + } + return true; +} + +#endif + +// The nRF52840 datasheet specifies a maximum of two writes to a flash +// location before an erase is necessary, even if the write is all +// ones (erased state). So we can't avoid erases even if the page +// appears to be already erased (all ones), unless we keep track of +// writes to a page. + +bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data) { + #ifdef BLUETOOTH_SD + if (sd_is_enabled()) { + uint32_t err_code; + sd_flash_operation_status_t status; + + sd_flash_operation_start(); + err_code = sd_flash_page_erase(page_addr / FLASH_PAGE_SIZE); + if (err_code != NRF_SUCCESS) { + return false; + } + status = sd_flash_operation_wait_until_done(); + if (status == SD_FLASH_OPERATION_ERROR) { + return false; + } + + // Divide a full page into parts, because writing a full page causes an assertion failure. + // See https://devzone.nordicsemi.com/f/nordic-q-a/40088/sd_flash_write-cause-nrf_fault_id_sd_assert/ + const size_t BLOCK_PARTS = 2; + size_t words_to_write = FLASH_PAGE_SIZE / sizeof(uint32_t) / BLOCK_PARTS; + for (size_t i = 0; i < BLOCK_PARTS; i++) { + sd_flash_operation_start(); + err_code = sd_flash_write(((uint32_t *)page_addr) + i * words_to_write, + (uint32_t *)data + i * words_to_write, + words_to_write); + if (err_code != NRF_SUCCESS) { + return false; + } + status = sd_flash_operation_wait_until_done(); + if (status == SD_FLASH_OPERATION_ERROR) { + return false; + } + } + + return true; + } + #endif + + nrfx_nvmc_page_erase(page_addr); + nrfx_nvmc_bytes_write(page_addr, data, FLASH_PAGE_SIZE); + return true; +} diff --git a/ports/nrf/peripherals/nrf/nvm.h b/ports/nrf/peripherals/nrf/nvm.h new file mode 100644 index 0000000000000..8ba95773d67c4 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nvm.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define FLASH_PAGE_SIZE (4096) + +#if BLUETOOTH_SD +bool sd_flash_page_erase_sync(uint32_t page_number); +bool sd_flash_write_sync(uint32_t *dest_words, uint32_t* src_words, uint32_t num_words); +#endif + +bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data); diff --git a/ports/nrf/peripherals/nrf/pins.h b/ports/nrf/peripherals/nrf/pins.h new file mode 100644 index 0000000000000..3a4c995790b37 --- /dev/null +++ b/ports/nrf/peripherals/nrf/pins.h @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ +#define __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ + +#include +#include + +#include "nrf_gpio.h" + +typedef struct { + mp_obj_base_t base; + // These could be squeezed to fewer bits if more fields are needed. + uint8_t number; // port << 5 | pin number in port (0-31): 6 bits needed + uint8_t adc_channel; // 0 is no ADC, ADC channel from 1 to 8: + // 4 bits needed here; 5 bits used in periph registers +} mcu_pin_obj_t; + +extern const mp_obj_type_t mcu_pin_type; + +// Used in device-specific pins.c +#define PIN(p_name, p_port, p_pin, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .number = NRF_GPIO_PIN_MAP(p_port, p_pin), \ + .adc_channel = (p_adc_channel), \ +} + +// Use illegal pin value to mark unassigned pins. +#define NO_PIN 0xff + +// Choose based on chip, but not specifically revision (e.g., not NRF52840_XXAA) +#ifdef NRF52840 +#include "nrf52840/pins.h" +#endif + +#endif // __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ diff --git a/ports/nrf/peripherals/nrf/power.h b/ports/nrf/peripherals/nrf/power.h new file mode 100644 index 0000000000000..c3744618cac16 --- /dev/null +++ b/ports/nrf/peripherals/nrf/power.h @@ -0,0 +1,27 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +void nrf_peripherals_power_init(void); diff --git a/ports/nrf/peripherals/nrf/timers.c b/ports/nrf/peripherals/nrf/timers.c new file mode 100644 index 0000000000000..88f3dd4681bbb --- /dev/null +++ b/ports/nrf/peripherals/nrf/timers.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseOut.h" + +#include + +#include "nrfx.h" +#include "nrfx_timer.h" + +#include "py/mpconfig.h" +#include "py/runtime.h" + +STATIC nrfx_timer_t nrfx_timers[] = { +#if NRFX_CHECK(NRFX_TIMER0_ENABLED) + #error NRFX_TIMER0_ENABLED should not be on: TIMER0 is used by the SoftDevice + NRFX_TIMER_INSTANCE(0), +#endif +#if NRFX_CHECK(NRFX_TIMER1_ENABLED) + NRFX_TIMER_INSTANCE(1), +#endif +#if NRFX_CHECK(NRFX_TIMER2_ENABLED) + NRFX_TIMER_INSTANCE(2), +#endif +#if NRFX_CHECK(NRFX_TIMER3_ENABLED) + NRFX_TIMER_INSTANCE(3), +#endif +#if NRFX_CHECK(NRFX_TIMER4_ENABLED) + NRFX_TIMER_INSTANCE(4), +#endif +}; + +static bool nrfx_timer_allocated[ARRAY_SIZE(nrfx_timers)]; + +void timers_reset(void) { + for (size_t i = 0; i < ARRAY_SIZE(nrfx_timers); i ++) { + nrfx_timer_uninit(&nrfx_timers[i]); + nrfx_timer_allocated[i] = false; + } +} + +// Returns a free nrfx_timer instance, and marks it as allocated. +// The caller should init as with the desired config. +// Returns NULL if no timer is available. +nrfx_timer_t* nrf_peripherals_allocate_timer(void) { + for (size_t i = 0; i < ARRAY_SIZE(nrfx_timers); i ++) { + if (!nrfx_timer_allocated[i]) { + nrfx_timer_allocated[i] = true; + return &nrfx_timers[i]; + } + } + return NULL; +} + +// Free a timer, which may or may not have been initialized. +void nrf_peripherals_free_timer(nrfx_timer_t* timer) { + for (size_t i = 0; i < ARRAY_SIZE(nrfx_timers); i ++) { + if (timer == &nrfx_timers[i]) { + nrfx_timer_allocated[i] = false; + // Safe to call even if not initialized. + nrfx_timer_uninit(timer); + return; + } + } +} diff --git a/ports/nrf/peripherals/nrf/timers.h b/ports/nrf/peripherals/nrf/timers.h new file mode 100644 index 0000000000000..7d3815579af66 --- /dev/null +++ b/ports/nrf/peripherals/nrf/timers.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx.h" +#include "nrfx_timer.h" + +void timers_reset(void); +nrfx_timer_t* nrf_peripherals_allocate_timer(void); +void nrf_peripherals_free_timer(nrfx_timer_t* timer); diff --git a/ports/nrf/pin_defs_nrf5.h b/ports/nrf/pin_defs_nrf5.h deleted file mode 100644 index 2c12045c10e22..0000000000000 --- a/ports/nrf/pin_defs_nrf5.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This file contains pin definitions that are specific to the nrf port. -// This file should only ever be #included by pin.h and not directly. - -enum { - PORT_0, - PORT_1, -}; - -typedef NRF_GPIO_Type pin_gpio_t; diff --git a/ports/nrf/pin_named_pins.c b/ports/nrf/pin_named_pins.c deleted file mode 100644 index e1d8736b9cf23..0000000000000 --- a/ports/nrf/pin_named_pins.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -STATIC void pin_named_pins_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_named_pins_obj_t *self = self_in; - mp_printf(print, "", self->name); -} - -const mp_obj_type_t pin_cpu_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_cpu, - .print = pin_named_pins_obj_print, - .locals_dict = (mp_obj_t)&pin_cpu_pins_locals_dict, -}; - -const mp_obj_type_t pin_board_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_board, - .print = pin_named_pins_obj_print, - .locals_dict = (mp_obj_t)&pin_board_pins_locals_dict, -}; - -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP); - if (named_elem != NULL && named_elem->value != NULL) { - return named_elem->value; - } - return NULL; -} - -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->fn == fn && af->unit == unit) { - return af; - } - } - return NULL; -} - -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->idx == af_idx) { - return af; - } - } - return NULL; -} - -/* unused -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (strcmp(name, qstr_str(af->name)) == 0) { - return af; - } - } - return NULL; -} -*/ diff --git a/ports/nrf/qstrdefsport.h b/ports/nrf/qstrdefsport.h index ef398a4c0acdc..3ba897069bf73 100644 --- a/ports/nrf/qstrdefsport.h +++ b/ports/nrf/qstrdefsport.h @@ -1,139 +1 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Glenn Ruben Bakke - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - // qstrs specific to this port -Q(a) -Q(a#) -Q(a#:1) -Q(a#:3) -Q(a2) -Q(a4) -Q(a4:1) -Q(a4:3) -Q(a:1) -Q(a:2) -Q(a:4) -Q(a:5) -Q(b) -Q(b2:1) -Q(b3) -Q(b4) -Q(b4:1) -Q(b4:2) -Q(b5) -Q(b5:1) -Q(b:1) -Q(b:2) -Q(c) -Q(c#) -Q(c#5) -Q(c#5:1) -Q(c#5:2) -Q(c#:1) -Q(c#:8) -Q(c2:2) -Q(c3) -Q(c3:3) -Q(c3:4) -Q(c4) -Q(c4:1) -Q(c4:3) -Q(c4:4) -Q(c5) -Q(c5:1) -Q(c5:2) -Q(c5:3) -Q(c5:4) -Q(c:1) -Q(c:2) -Q(c:3) -Q(c:4) -Q(c:8) -Q(d) -Q(d#) -Q(d#5:2) -Q(d#:2) -Q(d#:3) -Q(d3) -Q(d4) -Q(d4:1) -Q(d5) -Q(d5:1) -Q(d5:2) -Q(d:1) -Q(d:2) -Q(d:3) -Q(d:4) -Q(d:5) -Q(d:6) -Q(d:8) -Q(e) -Q(e3:3) -Q(e4) -Q(e4:1) -Q(e5) -Q(e6:3) -Q(e:1) -Q(e:2) -Q(e:3) -Q(e:4) -Q(e:5) -Q(e:6) -Q(e:8) -Q(eb:8) -Q(f) -Q(f#) -Q(f#5) -Q(f#5:2) -Q(f#:1) -Q(f#:2) -Q(f#:8) -Q(f2) -Q(f:1) -Q(f:2) -Q(f:3) -Q(f:4) -Q(f:8) -Q(g) -Q(g#) -Q(g#:1) -Q(g#:3) -Q(g3:1) -Q(g4) -Q(g4:1) -Q(g4:2) -Q(g5) -Q(g5:1) -Q(g:1) -Q(g:2) -Q(g:3) -Q(g:8) -Q(r) -Q(r4:2) -Q(r:1) -Q(r:2) -Q(r:3) - diff --git a/ports/nrf/sd_mutex.c b/ports/nrf/sd_mutex.c new file mode 100644 index 0000000000000..b3162e6af922e --- /dev/null +++ b/ports/nrf/sd_mutex.c @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpconfig.h" +#include "py/runtime.h" +#include "nrf_soc.h" + +void sd_mutex_acquire_check(nrf_mutex_t* p_mutex) { + uint32_t err_code = sd_mutex_acquire(p_mutex); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to acquire mutex, err 0x%04x"), err_code); + } +} + +void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex) { + while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { + RUN_BACKGROUND_TASKS; + } +} + +void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex) { + while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { + } +} + +void sd_mutex_release_check(nrf_mutex_t* p_mutex) { + uint32_t err_code = sd_mutex_release(p_mutex); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to release mutex, err 0x%04x"), err_code); + } +} diff --git a/ports/nrf/sd_mutex.h b/ports/nrf/sd_mutex.h new file mode 100644 index 0000000000000..ca46917205bb7 --- /dev/null +++ b/ports/nrf/sd_mutex.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_SD_MUTEX_H +#define MICROPY_INCLUDED_NRF_SD_MUTEX_H + +#include "nrf_soc.h" + +// Helpers for common usage of nrf_mutex. + +// Try to acquire a mutex right now. Raise exception if we can't get it. +void sd_mutex_acquire_check(nrf_mutex_t* p_mutex); + +// Wait for a mutex to become available. Run VM background tasks while waiting. +void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex); + +// Wait for a mutex to become available.. Block VM while waiting. +void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex); + +// Release a mutex, and raise exception on error. +void sd_mutex_release_check(nrf_mutex_t* p_mutex); + +#endif // MICROPY_INCLUDED_NRF_SD_MUTEX_H diff --git a/ports/nrf/supervisor/cpu.s b/ports/nrf/supervisor/cpu.s new file mode 100755 index 0000000000000..9e6807a5e2e99 --- /dev/null +++ b/ports/nrf/supervisor/cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/nrf/supervisor/filesystem.c b/ports/nrf/supervisor/filesystem.c deleted file mode 100644 index 5d622725b448c..0000000000000 --- a/ports/nrf/supervisor/filesystem.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/vfs_fat.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" - -#include "py/mpstate.h" - -#include "internal_flash.h" - -fs_user_mount_t fs_user_mount_flash; -mp_vfs_mount_t mp_vfs_mount_flash; - - -void filesystem_init(bool create_allowed) { - // init the vfs object - fs_user_mount_t *vfs_fat = &fs_user_mount_flash; - vfs_fat->flags = 0; - flash_init_vfs(vfs_fat); - - // try to mount the flash - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (res == FR_NO_FILESYSTEM && create_allowed) { - // no filesystem so create a fresh one - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT | FM_SFD, 4096, working_buf, sizeof(working_buf)); - // Flush the new file system to make sure its repaired immediately. - flash_flush(); - if (res != FR_OK) { - return; - } - - // set label - f_setlabel(&vfs_fat->fatfs, "CIRCUITPY"); - flash_flush(); - - // create lib folder - f_mkdir(&vfs_fat->fatfs, "/lib"); - } else if (res != FR_OK) { - return; - } - mp_vfs_mount_t *vfs = &mp_vfs_mount_flash; - vfs->str = "/"; - vfs->len = 1; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; -} - -void filesystem_flush(void) { - flash_flush(); -} - -void filesystem_writable_by_python(bool writable) { -} - -bool filesystem_present(void) { - return true; -} diff --git a/ports/nrf/supervisor/internal_flash.c b/ports/nrf/supervisor/internal_flash.c new file mode 100644 index 0000000000000..a44f047ff622f --- /dev/null +++ b/ports/nrf/supervisor/internal_flash.c @@ -0,0 +1,121 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/flash.h" + +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" +#include "supervisor/shared/safe_mode.h" + +#include "peripherals/nrf/nvm.h" + +#ifdef BLUETOOTH_SD +#include "ble_drv.h" +#include "nrf_sdm.h" +#endif + +#define NO_CACHE 0xffffffff + +uint8_t _flash_cache[FLASH_PAGE_SIZE] __attribute__((aligned(4))); +uint32_t _flash_page_addr = NO_CACHE; + + +/*------------------------------------------------------------------*/ +/* Internal Flash API + *------------------------------------------------------------------*/ +static inline uint32_t lba2addr(uint32_t block) { + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; +} + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE ; +} + +void supervisor_flash_flush(void) { + if (_flash_page_addr == NO_CACHE) return; + + // Skip if data is the same + if (memcmp(_flash_cache, (void *)_flash_page_addr, FLASH_PAGE_SIZE) != 0) { + if (!nrf_nvm_safe_flash_page_write(_flash_page_addr, _flash_cache)) { + reset_into_safe_mode(FLASH_WRITE_FAIL); + } + } +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Must write out anything in cache before trying to read. + supervisor_flash_flush(); + + uint32_t src = lba2addr(block); + memcpy(dest, (uint8_t*) src, FILESYSTEM_BLOCK_SIZE*num_blocks); + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + while (num_blocks) { + uint32_t const addr = lba2addr(lba); + uint32_t const page_addr = addr & ~(FLASH_PAGE_SIZE - 1); + + uint32_t count = 8 - (lba % 8); // up to page boundary + count = MIN(num_blocks, count); + + if (page_addr != _flash_page_addr) { + // Write out anything in cache before overwriting it. + supervisor_flash_flush(); + + _flash_page_addr = page_addr; + + // Copy the current contents of the entire page into the cache. + memcpy(_flash_cache, (void *)page_addr, FLASH_PAGE_SIZE); + } + + // Overwrite part or all of the page cache with the src data. + memcpy(_flash_cache + (addr & (FLASH_PAGE_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE); + + // adjust for next run + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} diff --git a/ports/nrf/supervisor/internal_flash.h b/ports/nrf/supervisor/internal_flash.h new file mode 100644 index 0000000000000..024a53ebba0d3 --- /dev/null +++ b/ports/nrf/supervisor/internal_flash.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#endif // MICROPY_INCLUDED_NRF_INTERNAL_FLASH_H diff --git a/ports/nrf/supervisor/internal_flash_root_pointers.h b/ports/nrf/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..cc6074585edfa --- /dev/null +++ b/ports/nrf/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_NRF_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_NRF_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_NRF_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index c72ed7cc35a1e..cbe0cec54d0e5 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -28,58 +28,152 @@ #include "supervisor/port.h" #include "boards/board.h" +#include "nrfx/hal/nrf_power.h" +#include "nrfx/drivers/include/nrfx_power.h" + +#include "nrf/cache.h" +#include "nrf/clocks.h" +#include "nrf/power.h" +#include "nrf/timers.h" + #include "shared-module/gamepad/__init__.h" #include "common-hal/microcontroller/Pin.h" +#include "common-hal/_bleio/__init__.h" +#include "common-hal/analogio/AnalogIn.h" +#include "common-hal/busio/I2C.h" +#include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" #include "common-hal/pulseio/PWMOut.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/rtc/RTC.h" +#include "common-hal/neopixel_write/__init__.h" #include "tick.h" +#include "shared-bindings/rtc/__init__.h" + +#ifdef CIRCUITPY_AUDIOBUSIO +#include "common-hal/audiobusio/I2SOut.h" +#endif + +#ifdef CIRCUITPY_AUDIOPWMIO +#include "common-hal/audiopwmio/PWMAudioOut.h" +#endif + +static void power_warning_handler(void) { + reset_into_safe_mode(BROWNOUT); +} + safe_mode_t port_init(void) { - board_init(); + nrf_peripherals_clocks_init(); - // Configure millisecond timer initialization. - tick_init(); + // If GPIO voltage is set wrong in UICR, this will fix it, and + // will also do a reset to make the change take effect. + nrf_peripherals_power_init(); -#if 0 - #ifdef CIRCUITPY_CANARY_WORD - // Run in safe mode if the canary is corrupt. - if (_ezero != CIRCUITPY_CANARY_WORD) { - return HARD_CRASH; - } + nrfx_power_pofwarn_config_t power_failure_config; + power_failure_config.handler = power_warning_handler; + power_failure_config.thr = NRF_POWER_POFTHR_V27; + #if NRF_POWER_HAS_VDDH + power_failure_config.thrvddh = NRF_POWER_POFTHRVDDH_V27; #endif + nrfx_power_pof_init(&power_failure_config); + nrfx_power_pof_enable(&power_failure_config); - if (board_requests_safe_mode()) { - return USER_SAFE_MODE; - } + nrf_peripherals_enable_cache(); + + // Configure millisecond timer initialization. + tick_init(); + +#if CIRCUITPY_ANALOGIO + analogin_init(); #endif + #if CIRCUITPY_RTC + rtc_init(); + #endif + return NO_SAFE_MODE; } void reset_port(void) { - #ifdef CIRCUITPY_GAMEPAD_TICKS - gamepad_reset(); - #endif +#ifdef CIRCUITPY_GAMEPAD_TICKS + gamepad_reset(); +#endif + + i2c_reset(); + spi_reset(); + uart_reset(); + neopixel_write_reset(); + +#if CIRCUITPY_AUDIOBUSIO + i2s_reset(); +#endif + +#if CIRCUITPY_AUDIOPWMIO + audiopwmout_reset(); +#endif + +#if CIRCUITPY_PULSEIO pwmout_reset(); + pulseout_reset(); + pulsein_reset(); +#endif + + timers_reset(); + +#if CIRCUITPY_RTC + rtc_reset(); +#endif + +#if CIRCUITPY_BLEIO + bleio_reset(); +#endif + reset_all_pins(); } +void reset_to_bootloader(void) { + enum { DFU_MAGIC_SERIAL = 0x4e }; -void HardFault_Handler(void) -{ -#if NRF52 -// static volatile uint32_t reg; -// static volatile uint32_t reg2; -// static volatile uint32_t bfar; -// reg = SCB->HFSR; -// reg2 = SCB->CFSR; -// bfar = SCB->BFAR; -// for (int i = 0; i < 0; i++) -// { -// (void)reg; -// (void)reg2; -// (void)bfar; -// } -#endif + NRF_POWER->GPREGRET = DFU_MAGIC_SERIAL; + reset_cpu(); +} + +void reset_cpu(void) { + NVIC_SystemReset(); +} + +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); } +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +extern uint32_t _ebss; +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} + +void HardFault_Handler(void) { + reset_into_safe_mode(HARD_CRASH); + while (true) { + asm("nop;"); + } +} diff --git a/ports/nrf/supervisor/qspi_flash.c b/ports/nrf/supervisor/qspi_flash.c new file mode 100644 index 0000000000000..90260b0912cb2 --- /dev/null +++ b/ports/nrf/supervisor/qspi_flash.c @@ -0,0 +1,198 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/spi_flash_api.h" + +#include +#include + +#include "py/mpconfig.h" // for EXTERNAL_FLASH_QSPI_DUAL +#include "nrfx_qspi.h" + +#include "shared-bindings/microcontroller/__init__.h" + +#include "supervisor/shared/external_flash/common_commands.h" +#include "supervisor/shared/external_flash/qspi_flash.h" + +bool spi_flash_command(uint8_t command) { + nrf_qspi_cinstr_conf_t cinstr_cfg = { + .opcode = command, + .length = 1, + .io2_level = true, + .io3_level = true, + .wipwait = false, + .wren = false + }; + return nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL) == NRFX_SUCCESS; +} + +bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) { + nrf_qspi_cinstr_conf_t cinstr_cfg = { + .opcode = command, + .length = length + 1, + .io2_level = true, + .io3_level = true, + .wipwait = false, + .wren = false + }; + return nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, response) == NRFX_SUCCESS; + +} + +bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t length) { + nrf_qspi_cinstr_conf_t cinstr_cfg = { + .opcode = command, + .length = length + 1, + .io2_level = true, + .io3_level = true, + .wipwait = false, + .wren = false // We do this manually. + }; + return nrfx_qspi_cinstr_xfer(&cinstr_cfg, data, NULL) == NRFX_SUCCESS; +} + +bool spi_flash_sector_command(uint8_t command, uint32_t address) { + if (command != CMD_SECTOR_ERASE) { + return false; + } + return nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, address) == NRFX_SUCCESS; +} + +bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { + // TODO: In theory, this also needs to handle unaligned data and + // non-multiple-of-4 length. (in practice, I don't think the fat layer + // generates such writes) + return nrfx_qspi_write(data, length, address) == NRFX_SUCCESS; +} + +bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { + int misaligned = ((intptr_t)data) & 3; + // If the data is misaligned, we need to read 4 bytes + // into an aligned buffer, and then copy 1, 2, or 3 bytes from the aligned + // buffer to data. + if(misaligned) { + int sz = 4 - misaligned; + __attribute__((aligned(4))) uint8_t buf[4]; + + if(nrfx_qspi_read(buf, 4, address) != NRFX_SUCCESS) { + return false; + } + memcpy(data, buf, sz); + data += sz; + address += sz; + length -= sz; + } + + // nrfx_qspi_read works in 4 byte increments, though it doesn't + // signal an error if sz is not a multiple of 4. Read (directly into data) + // all but the last 1, 2, or 3 bytes depending on the (remaining) length. + uint32_t sz = length & ~(uint32_t)3; + if(nrfx_qspi_read(data, sz, address) != NRFX_SUCCESS) { + return false; + } + data += sz; + address += sz; + length -= sz; + + // Now, if we have any bytes left over, we must do a final read of 4 + // bytes and copy 1, 2, or 3 bytes to data. + if(length) { + __attribute__((aligned(4))) uint8_t buf[4]; + if(nrfx_qspi_read(buf, 4, address) != NRFX_SUCCESS) { + return false; + } + memcpy(data, buf, length); + } + + return true; +} + +void spi_flash_init(void) { + // Init QSPI flash + nrfx_qspi_config_t qspi_cfg = { + .xip_offset = 0, + .pins = { + .sck_pin = MICROPY_QSPI_SCK, + .csn_pin = MICROPY_QSPI_CS, + .io0_pin = MICROPY_QSPI_DATA0, + .io1_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io2_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io3_pin = NRF_QSPI_PIN_NOT_CONNECTED, + + }, + .prot_if = { + .readoc = NRF_QSPI_READOC_FASTREAD, + .writeoc = NRF_QSPI_WRITEOC_PP, + .addrmode = NRF_QSPI_ADDRMODE_24BIT, + .dpmconfig = false + }, + .phy_if = { + .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2MHz and speed up once we know what we're talking to. + .sck_delay = 10, // min time CS must stay high before going low again. in unit of 62.5 ns + .spi_mode = NRF_QSPI_MODE_0, + .dpmen = false + }, + .irq_priority = 7, + }; + +#if EXTERNAL_FLASH_QSPI_DUAL + qspi_cfg.pins.io1_pin = MICROPY_QSPI_DATA1; + qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ2O; + qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP2O; +#else + qspi_cfg.pins.io1_pin = MICROPY_QSPI_DATA1; + qspi_cfg.pins.io2_pin = MICROPY_QSPI_DATA2; + qspi_cfg.pins.io3_pin = MICROPY_QSPI_DATA3; + qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ4IO; + qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O; +#endif + + // No callback for blocking API + nrfx_qspi_init(&qspi_cfg, NULL, NULL); +} + +void spi_flash_init_device(const external_flash_device* device) { + check_quad_enable(device); + + // Switch to single output line if the device doesn't support quad programs. + if (!device->supports_qspi_writes) { + NRF_QSPI->IFCONFIG0 &= ~QSPI_IFCONFIG0_WRITEOC_Msk; + NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP << QSPI_IFCONFIG0_WRITEOC_Pos; + } + + // Speed up as much as we can. + // Start at 16 MHz and go down. + // At 32 MHz GD25Q16C doesn't work reliably on Feather 52840, even though it should work up to 104 MHz. + // sckfreq = 0 is 32 Mhz + // sckfreq = 1 is 16 MHz, etc. + uint8_t sckfreq = 1; + while (32000000 / (sckfreq + 1) > device->max_clock_speed_mhz * 1000000 && sckfreq < 16) { + sckfreq += 1; + } + NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk; + NRF_QSPI->IFCONFIG1 |= sckfreq << QSPI_IFCONFIG1_SCKFREQ_Pos; +} diff --git a/ports/nrf/supervisor/serial.c b/ports/nrf/supervisor/serial.c index 51e61bce7cc1d..b19e9267ccdb3 100644 --- a/ports/nrf/supervisor/serial.c +++ b/ports/nrf/supervisor/serial.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,58 +24,104 @@ * THE SOFTWARE. */ -#include "supervisor/serial.h" +#include "py/mphal.h" -#include "py/obj.h" -#include "py/runtime.h" -#include "mphalport.h" -#include "pins.h" -#include "hal_uart.h" +#include "supervisor/serial.h" -#if (MICROPY_PY_BLE_NUS) +#if CIRCUITPY_SERIAL_BLE #include "ble_uart.h" +#elif CIRCUITPY_SERIAL_UART +#include +#include "nrf_gpio.h" +#include "nrfx_uarte.h" #endif +#if CIRCUITPY_SERIAL_BLE + void serial_init(void) { + ble_uart_init(); +} -#if MICROPY_PY_BLE_NUS - ble_uart_init0(); - while (!ble_uart_enabled()) { - ; - } -#else - hal_uart_init_t param = - { - .id = 0, - .rx_pin = &MICROPY_HW_UART1_RX, - .tx_pin = &MICROPY_HW_UART1_TX, - .rts_pin = NULL, - .cts_pin = NULL, - .flow_control = MICROPY_HW_UART1_HWFC ? true : false, - .use_parity = false, - .baud_rate = HAL_UART_BAUD_115K2, - .irq_priority = 6, - .irq_num = UARTE0_UART0_IRQn - }; - - hal_uart_init( UART_BASE(0), ¶m); -#endif +bool serial_connected(void) { + return ble_uart_connected(); +} + +char serial_read(void) { + return (char) ble_uart_rx_chr(); +} + +bool serial_bytes_available(void) { + return ble_uart_stdin_any(); +} + +void serial_write(const char *text) { + ble_uart_stdout_tx_str(text); } +#elif CIRCUITPY_SERIAL_UART + +uint8_t serial_received_char; +nrfx_uarte_t serial_instance = NRFX_UARTE_INSTANCE(0); + +void serial_init(void) { + nrfx_uarte_config_t config = { + .pseltxd = MICROPY_HW_UART_TX, + .pselrxd = MICROPY_HW_UART_RX, + .pselcts = NRF_UARTE_PSEL_DISCONNECTED, + .pselrts = NRF_UARTE_PSEL_DISCONNECTED, + .p_context = NULL, + .hwfc = NRF_UARTE_HWFC_DISABLED, + .parity = NRF_UARTE_PARITY_EXCLUDED, + .baudrate = NRF_UARTE_BAUDRATE_115200, + .interrupt_priority = 7 + }; + + nrfx_uarte_uninit(&serial_instance); + const nrfx_err_t err = nrfx_uarte_init(&serial_instance, &config, NULL); // no callback for blocking mode + + if (err != NRFX_SUCCESS) { + NRFX_ASSERT(err); + } + + // enabled receiving + nrf_uarte_task_trigger(serial_instance.p_reg, NRF_UARTE_TASK_STARTRX); +} bool serial_connected(void) { return true; } char serial_read(void) { - return (char) mp_hal_stdin_rx_chr(); + uint8_t data; + nrfx_uarte_rx(&serial_instance, &data, 1); + return data; } bool serial_bytes_available(void) { - return mp_hal_stdin_any(); + return nrf_uarte_event_check(serial_instance.p_reg, NRF_UARTE_EVENT_RXDRDY); } void serial_write(const char* text) { - mp_hal_stdout_tx_str(text); + serial_write_substring(text, strlen(text)); +} + +void serial_write_substring(const char *text, uint32_t len) { + if (len == 0) { + return; + } + + // EasyDMA can only access SRAM + uint8_t * tx_buf = (uint8_t*) text; + if ( !nrfx_is_in_ram(text) ) { + tx_buf = (uint8_t *) m_malloc(len, false); + memcpy(tx_buf, text, len); + } + + nrfx_uarte_tx(&serial_instance, tx_buf, len); + + if ( !nrfx_is_in_ram(text) ) { + m_free(tx_buf); + } } +#endif // CIRCUITPY_SERIAL_UART diff --git a/ports/nrf/supervisor/usb.c b/ports/nrf/supervisor/usb.c new file mode 100644 index 0000000000000..bb9d78101cba3 --- /dev/null +++ b/ports/nrf/supervisor/usb.c @@ -0,0 +1,89 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx.h" +#include "nrfx_power.h" +#include "tick.h" +#include "supervisor/usb.h" +#include "lib/utils/interrupt_char.h" +#include "lib/mp-readline/readline.h" + +#ifdef SOFTDEVICE_PRESENT +#include "nrf_sdm.h" +#include "nrf_soc.h" +#endif + +// tinyusb function that handles power event (detected, ready, removed) +// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled. +extern void tusb_hal_nrf_power_event(uint32_t event); + +void init_usb_hardware(void) { + + // 2 is max priority (0, 1 are reserved for SD) + NVIC_SetPriority(USBD_IRQn, 2); + + // USB power may already be ready at this time -> no event generated + // We need to invoke the handler based on the status initially for the first call + static bool first_call = true; + uint32_t usb_reg; + +#ifdef SOFTDEVICE_PRESENT + uint8_t sd_en = false; + (void) sd_softdevice_is_enabled(&sd_en); + + if ( sd_en ) { + sd_power_usbdetected_enable(true); + sd_power_usbpwrrdy_enable(true); + sd_power_usbremoved_enable(true); + + sd_power_usbregstatus_get(&usb_reg); + }else +#endif + { + // Power module init + const nrfx_power_config_t pwr_cfg = { 0 }; + nrfx_power_init(&pwr_cfg); + + // Register tusb function as USB power handler + const nrfx_power_usbevt_config_t config = { .handler = (nrfx_power_usb_event_handler_t) tusb_hal_nrf_power_event }; + nrfx_power_usbevt_init(&config); + + nrfx_power_usbevt_enable(); + + usb_reg = NRF_POWER->USBREGSTATUS; + } + + if ( first_call ) { + first_call = false; + if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) { + tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED); + } + + if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) { + tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY); + } + } +} diff --git a/ports/nrf/tick.c b/ports/nrf/tick.c index fccc8181d085f..ac825a7f1f517 100644 --- a/ports/nrf/tick.c +++ b/ports/nrf/tick.c @@ -26,43 +26,29 @@ #include "tick.h" -#include "supervisor/shared/autoreload.h" +#include "supervisor/shared/tick.h" #include "shared-module/gamepad/__init__.h" #include "shared-bindings/microcontroller/Processor.h" #include "nrf.h" -// Global millisecond tick count -volatile uint64_t ticks_ms = 0; - void SysTick_Handler(void) { - // SysTick interrupt handler called when the SysTick timer reaches zero - // (every millisecond). - ticks_ms += 1; - - #ifdef CIRCUITPY_AUTORELOAD_DELAY_MS - autoreload_tick(); - #endif - #ifdef CIRCUITPY_GAMEPAD_TICKS - if (!(ticks_ms & CIRCUITPY_GAMEPAD_TICKS)) { - gamepad_tick(); - } - #endif + // Do things common to all ports when the tick occurs + supervisor_tick(); } void tick_init() { uint32_t ticks_per_ms = common_hal_mcu_processor_get_frequency() / 1000; - SysTick_Config(ticks_per_ms); -// NVIC_EnableIRQ(SysTick_IRQn); + SysTick_Config(ticks_per_ms); // interrupt is enabled } void tick_delay(uint32_t us) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; uint32_t us_between_ticks = SysTick->VAL / ticks_per_us; - uint64_t start_ms = ticks_ms; + uint64_t start_ms = supervisor_ticks_ms64(); while (us > 1000) { - while (ticks_ms == start_ms) {} + while (supervisor_ticks_ms64() == start_ms) {} us -= us_between_ticks; - start_ms = ticks_ms; + start_ms = supervisor_ticks_ms64(); us_between_ticks = 1000; } while (SysTick->VAL > ((us_between_ticks - us) * ticks_per_us)) {} @@ -71,11 +57,11 @@ void tick_delay(uint32_t us) { // us counts down! void current_tick(uint64_t* ms, uint32_t* us_until_ms) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; - *ms = ticks_ms; + *ms = supervisor_ticks_ms64(); *us_until_ms = SysTick->VAL / ticks_per_us; } void wait_until(uint64_t ms, uint32_t us_until_ms) { uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; - while(ticks_ms <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} + while(supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} } diff --git a/ports/nrf/tick.h b/ports/nrf/tick.h index 73f17d7031be9..d638ad0251412 100644 --- a/ports/nrf/tick.h +++ b/ports/nrf/tick.h @@ -26,12 +26,10 @@ #ifndef MICROPY_INCLUDED_NRF_TICK_H #define MICROPY_INCLUDED_NRF_TICK_H -#include "mpconfigport.h" +#include "py/mpconfig.h" #include -extern volatile uint64_t ticks_ms; - extern struct timer_descriptor ms_timer; void tick_init(void); diff --git a/ports/pic16bit/Makefile b/ports/pic16bit/Makefile deleted file mode 100644 index 970e75d1fb8ef..0000000000000 --- a/ports/pic16bit/Makefile +++ /dev/null @@ -1,70 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -XC16 = /opt/microchip/xc16/v1.24 -CROSS_COMPILE = $(XC16)/bin/xc16- - -PARTFAMILY = dsPIC33F -PART = 33FJ256GP506 - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(XC16)/include -INC += -I$(XC16)/support/$(PARTFAMILY)/h - -CFLAGS_PIC16BIT = -mcpu=$(PART) -mlarge-code -CFLAGS = $(INC) -Wall -Werror -std=gnu99 -nostdlib $(CFLAGS_PIC16BIT) $(COPT) - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -O0 -ggdb -else -CFLAGS += -O1 -DNDEBUG -endif - -LDFLAGS = --heap=0 -nostdlib -T $(XC16)/support/$(PARTFAMILY)/gld/p$(PART).gld -Map=$@.map --cref -p$(PART) -LIBS = -L$(XC16)/lib -L$(XC16)/lib/$(PARTFAMILY) -lc -lm -lpic30 -lp$(PART) - -SRC_C = \ - main.c \ - board.c \ - pic16bit_mphal.c \ - modpyb.c \ - modpybled.c \ - modpybswitch.c \ - lib/utils/pyexec.c \ - lib/utils/sys_stdio_mphal.c \ - lib/mp-readline/readline.c \ - -SRC_S = \ -# gchelper.s \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(SRC_S:.s=.o)) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -all: $(BUILD)/firmware.hex - -$(BUILD)/firmware.hex: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(CROSS_COMPILE)bin2hex $< - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)size $@ - -$(PY_BUILD)/gc.o: CFLAGS += -O1 -$(PY_BUILD)/vm.o: CFLAGS += -O1 - -include $(TOP)/py/mkrules.mk diff --git a/ports/pic16bit/board.c b/ports/pic16bit/board.c deleted file mode 100644 index 0321b0ee22de1..0000000000000 --- a/ports/pic16bit/board.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "board.h" - -/********************************************************************/ -// CPU - -void cpu_init(void) { - // set oscillator to operate at 40MHz - // Fosc = Fin*M/(N1*N2), Fcy = Fosc/2 - // Fosc = 7.37M*40/(2*2) = 80Mhz for 7.37M input clock - PLLFBD = 41; // M=39 - CLKDIVbits.PLLPOST = 0; // N1=2 - CLKDIVbits.PLLPRE = 0; // N2=2 - OSCTUN = 0; - - // initiate clock switch to FRC with PLL - __builtin_write_OSCCONH(0x01); - __builtin_write_OSCCONL(0x01); - - // wait for clock switch to occur - while (OSCCONbits.COSC != 0x01) { - } - while (!OSCCONbits.LOCK) { - } -} - -/********************************************************************/ -// LEDs - -#define RED_LED_TRIS _TRISC15 -#define YELLOW_LED_TRIS _TRISC13 -#define GREEN_LED_TRIS _TRISC14 - -#define RED_LED _LATC15 -#define YELLOW_LED _LATC13 -#define GREEN_LED _LATC14 - -#define LED_ON (0) -#define LED_OFF (1) - -void led_init(void) { - // set led GPIO as outputs - RED_LED_TRIS = 0; - YELLOW_LED_TRIS = 0; - GREEN_LED_TRIS = 0; - - // turn off the LEDs - RED_LED = LED_OFF; - YELLOW_LED = LED_OFF; - GREEN_LED = LED_OFF; -} - -void led_state(int led, int state) { - int val = state ? LED_ON : LED_OFF; - switch (led) { - case 1: RED_LED = val; break; - case 2: YELLOW_LED = val; break; - case 3: GREEN_LED = val; break; - } -} - -void led_toggle(int led) { - switch (led) { - case 1: RED_LED ^= 1; break; - case 2: YELLOW_LED ^= 1; break; - case 3: GREEN_LED ^= 1; break; - } -} - -/********************************************************************/ -// switches - -#define SWITCH_S1_TRIS _TRISD8 -#define SWITCH_S2_TRIS _TRISD9 - -#define SWITCH_S1 _RD8 -#define SWITCH_S2 _RD9 - -void switch_init(void) { - // set switch GPIO as inputs - SWITCH_S1_TRIS = 1; - SWITCH_S2_TRIS = 1; -} - -int switch_get(int sw) { - int val = 1; - switch (sw) { - case 1: val = SWITCH_S1; break; - case 2: val = SWITCH_S2; break; - } - return val == 0; -} - -/********************************************************************/ -// UART - -/* -// TODO need an irq -void uart_rx_irq(void) { - if (c == interrupt_char) { - MP_STATE_VM(mp_pending_exception) = MP_STATE_PORT(keyboard_interrupt_obj); - } -} -*/ - -void uart_init(void) { - // baudrate = F_CY / 16 (uxbrg + 1) - // F_CY = 40MHz for us - UART1.uxbrg = 64; // 38400 baud - UART1.uxmode = 1 << 15; // UARTEN - UART1.uxsta = 1 << 10; // UTXEN -} - -int uart_rx_any(void) { - return UART1.uxsta & 1; // URXDA -} - -int uart_rx_char(void) { - return UART1.uxrxreg; -} - -void uart_tx_char(int chr) { - while (UART1.uxsta & (1 << 9)) { - // tx fifo is full - } - UART1.uxtxreg = chr; -} diff --git a/ports/pic16bit/board.h b/ports/pic16bit/board.h deleted file mode 100644 index f45f875449e9e..0000000000000 --- a/ports/pic16bit/board.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_PIC16BIT_BOARD_H -#define MICROPY_INCLUDED_PIC16BIT_BOARD_H - -void cpu_init(void); - -void led_init(void); -void led_state(int led, int state); -void led_toggle(int led); - -void switch_init(void); -int switch_get(int sw); - -void uart_init(void); -int uart_rx_any(void); -int uart_rx_char(void); -void uart_tx_char(int chr); - -#endif // MICROPY_INCLUDED_PIC16BIT_BOARD_H diff --git a/ports/pic16bit/main.c b/ports/pic16bit/main.c deleted file mode 100644 index 4a61c5ff53252..0000000000000 --- a/ports/pic16bit/main.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "py/mperrno.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" -#include "board.h" -#include "modpyb.h" - -_FGS(GWRP_OFF & GCP_OFF); -_FOSCSEL(FNOSC_FRC); -_FOSC(FCKSM_CSECMD & OSCIOFNC_ON & POSCMD_NONE); -_FWDT(FWDTEN_OFF); - -// maximum heap for device with 8k RAM -static char heap[4600]; - -int main(int argc, char **argv) { - // init the CPU and the peripherals - cpu_init(); - led_init(); - switch_init(); - uart_init(); - -soft_reset: - - // flash green led for 150ms to indicate boot - led_state(1, 0); - led_state(2, 0); - led_state(3, 1); - mp_hal_delay_ms(150); - led_state(3, 0); - - // init MicroPython runtime - int stack_dummy; - MP_STATE_THREAD(stack_top) = (char*)&stack_dummy; - gc_init(heap, heap + sizeof(heap)); - mp_init(); - mp_hal_init(); - readline_init0(); - - // REPL loop - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("PYB: soft reboot\n"); - mp_deinit(); - goto soft_reset; -} - -void gc_collect(void) { - // TODO possibly need to trace registers - void *dummy; - gc_collect_start(); - // Node: stack is ascending - gc_collect_root(&dummy, ((mp_uint_t)&dummy - (mp_uint_t)MP_STATE_THREAD(stack_top)) / sizeof(mp_uint_t)); - gc_collect_end(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - while (1); -} - -void NORETURN __fatal_error(const char *msg) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif diff --git a/ports/pic16bit/modpyb.c b/ports/pic16bit/modpyb.c deleted file mode 100644 index 62991463364e8..0000000000000 --- a/ports/pic16bit/modpyb.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "modpyb.h" - -STATIC mp_obj_t pyb_millis(void) { - return MP_OBJ_NEW_SMALL_INT(mp_hal_ticks_ms()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis); - -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x1fff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) { - mp_int_t ms = mp_obj_get_int(ms_in); - if (ms >= 0) { - mp_hal_delay_ms(ms); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay); - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&pyb_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&pyb_delay_obj) }, - - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/pic16bit/modpyb.h b/ports/pic16bit/modpyb.h deleted file mode 100644 index ac19fd2f3650f..0000000000000 --- a/ports/pic16bit/modpyb.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_PIC16BIT_MODPYB_H -#define MICROPY_INCLUDED_PIC16BIT_MODPYB_H - -extern const mp_obj_type_t pyb_led_type; -extern const mp_obj_type_t pyb_switch_type; -extern const mp_obj_module_t pyb_module; - -#endif // MICROPY_INCLUDED_PIC16BIT_MODPYB_H diff --git a/ports/pic16bit/modpybled.c b/ports/pic16bit/modpybled.c deleted file mode 100644 index 0d200c60390a2..0000000000000 --- a/ports/pic16bit/modpybled.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "board.h" -#include "modpyb.h" - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}}, - {{&pyb_led_type}}, - {{&pyb_led_type}}, -}; - -#define NUM_LED MP_ARRAY_SIZE(pyb_led_obj) -#define LED_ID(obj) ((obj) - &pyb_led_obj[0] + 1) - -void pyb_led_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - mp_printf(print, "LED(%u)", LED_ID(self)); -} - -STATIC mp_obj_t pyb_led_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - mp_int_t led_id = mp_obj_get_int(args[0]); - if (!(1 <= led_id && led_id <= NUM_LED)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED %d does not exist", led_id)); - } - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -mp_obj_t pyb_led_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(LED_ID(self), 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_on_obj, pyb_led_on); - -mp_obj_t pyb_led_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(LED_ID(self), 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_off_obj, pyb_led_off); - -mp_obj_t pyb_led_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(LED_ID(self)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_led_toggle_obj, pyb_led_toggle); - -STATIC const mp_rom_map_elem_t pyb_led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pyb_led_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pyb_led_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&pyb_led_toggle_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_led_locals_dict, pyb_led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = pyb_led_print, - .make_new = pyb_led_make_new, - .locals_dict = (mp_obj_t)&pyb_led_locals_dict, -}; diff --git a/ports/pic16bit/modpybswitch.c b/ports/pic16bit/modpybswitch.c deleted file mode 100644 index 0799ad9e8281b..0000000000000 --- a/ports/pic16bit/modpybswitch.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "board.h" -#include "modpyb.h" - -typedef struct _pyb_switch_obj_t { - mp_obj_base_t base; -} pyb_switch_obj_t; - -STATIC const pyb_switch_obj_t pyb_switch_obj[] = { - {{&pyb_switch_type}}, - {{&pyb_switch_type}}, -}; - -#define NUM_SWITCH MP_ARRAY_SIZE(pyb_switch_obj) -#define SWITCH_ID(obj) ((obj) - &pyb_switch_obj[0] + 1) - -void pyb_switch_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_switch_obj_t *self = self_in; - mp_printf(print, "Switch(%u)", SWITCH_ID(self)); -} - -STATIC mp_obj_t pyb_switch_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); - mp_int_t sw_id = mp_obj_get_int(args[0]); - if (!(1 <= sw_id && sw_id <= NUM_SWITCH)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Switch %d does not exist", sw_id)); - } - return (mp_obj_t)&pyb_switch_obj[sw_id - 1]; -} - -mp_obj_t pyb_switch_value(mp_obj_t self_in) { - pyb_switch_obj_t *self = self_in; - return switch_get(SWITCH_ID(self)) ? mp_const_true : mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_switch_value_obj, pyb_switch_value); - -mp_obj_t pyb_switch_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return pyb_switch_value(self_in); -} - -STATIC const mp_rom_map_elem_t pyb_switch_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_switch_value_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_switch_locals_dict, pyb_switch_locals_dict_table); - -const mp_obj_type_t pyb_switch_type = { - { &mp_type_type }, - .name = MP_QSTR_Switch, - .print = pyb_switch_print, - .make_new = pyb_switch_make_new, - .call = pyb_switch_call, - .locals_dict = (mp_obj_t)&pyb_switch_locals_dict, -}; diff --git a/ports/pic16bit/mpconfigport.h b/ports/pic16bit/mpconfigport.h deleted file mode 100644 index 59880dc5992e8..0000000000000 --- a/ports/pic16bit/mpconfigport.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -// options to control how MicroPython is built -#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_B) -#define MICROPY_ALLOC_PATH_MAX (64) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_MEM_STATS (0) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_REPL_EVENT_DRIVEN (0) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (0) -#define MICROPY_ENABLE_DOC_STRING (0) -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_BUILTINS_BYTEARRAY (0) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (0) -#define MICROPY_PY_BUILTINS_FROZENSET (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY___FILE__ (0) -#define MICROPY_PY_GC (1) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_MATH (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS (0) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE) -#define MICROPY_NO_ALLOCA (1) - -// type definitions for the specific machine - -#define MP_ENDIANNESS_LITTLE (1) -#define MPZ_DIG_SIZE (8) - -// The xc16 compiler doesn't seem to respect alignment (!!) so we -// need to use instead an object representation that allows for -// 2-byte aligned pointers (see config setting above). -//#define MICROPY_OBJ_BASE_ALIGNMENT __attribute__((aligned(4))) - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p))) - -#define UINT_FMT "%u" -#define INT_FMT "%d" -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size - -typedef int mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// extra builtin names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra builtin modules to add to the list of known ones -extern const struct _mp_obj_module_t pyb_module; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - char *readline_hist[8]; \ - mp_obj_t keyboard_interrupt_obj; \ - -#define MICROPY_MPHALPORT_H "pic16bit_mphal.h" -#define MICROPY_HW_BOARD_NAME "dsPICSK" -#define MICROPY_HW_MCU_NAME "dsPIC33" - -// XC16 toolchain doesn't seem to define these -typedef int intptr_t; -typedef unsigned int uintptr_t; diff --git a/ports/pic16bit/pic16bit_mphal.c b/ports/pic16bit/pic16bit_mphal.c deleted file mode 100644 index 35955f2d3ee57..0000000000000 --- a/ports/pic16bit/pic16bit_mphal.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include "py/mphal.h" -#include "board.h" - -static int interrupt_char; - -void mp_hal_init(void) { - MP_STATE_PORT(keyboard_interrupt_obj) = mp_obj_new_exception(&mp_type_KeyboardInterrupt); -} - -mp_uint_t mp_hal_ticks_ms(void) { - // TODO - return 0; -} - -void mp_hal_delay_ms(mp_uint_t ms) { - // tuned for fixed CPU frequency - for (int i = ms; i > 0; i--) { - for (volatile int j = 0; j < 5000; j++) { - } - } -} - -void mp_hal_set_interrupt_char(int c) { - interrupt_char = c; -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - if (uart_rx_any()) { - return uart_rx_char(); - } - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - for (; len > 0; --len) { - uart_tx_char(*str++); - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - for (; len > 0; --len) { - if (*str == '\n') { - uart_tx_char('\r'); - } - uart_tx_char(*str++); - } -} diff --git a/ports/pic16bit/pic16bit_mphal.h b/ports/pic16bit/pic16bit_mphal.h deleted file mode 100644 index f5da6cdc8d042..0000000000000 --- a/ports/pic16bit/pic16bit_mphal.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpstate.h" - -void mp_hal_init(void); - -void mp_hal_set_interrupt_char(int c); diff --git a/ports/pic16bit/unistd.h b/ports/pic16bit/unistd.h deleted file mode 100644 index 23c5e54c7536e..0000000000000 --- a/ports/pic16bit/unistd.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef MICROPY_INCLUDED_PIC16BIT_UNISTD_H -#define MICROPY_INCLUDED_PIC16BIT_UNISTD_H - -// XC16 compiler doesn't seem to have unistd.h file - -#define SEEK_SET 0 -#define SEEK_CUR 1 - -typedef int ssize_t; - -#endif // MICROPY_INCLUDED_PIC16BIT_UNISTD_H diff --git a/ports/qemu-arm/Makefile b/ports/qemu-arm/Makefile deleted file mode 100644 index 39e13853f4425..0000000000000 --- a/ports/qemu-arm/Makefile +++ /dev/null @@ -1,115 +0,0 @@ -include ../../py/mkenv.mk --include mpconfigport.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(TOP)/tools/tinytest/ - -CFLAGS_CORTEX_M3 = -mthumb -mcpu=cortex-m3 -mfloat-abi=soft -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 $(CFLAGS_CORTEX_M3) $(COPT) \ - -ffunction-sections -fdata-sections - -#Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -DPENDSV_DEBUG -COPT = -O0 -else -COPT += -Os -DNDEBUG -endif - -## With CoudeSourcery it's actually a little different, you just need `-T generic-m-hosted.ld`. -## Although for some reason `$(LD)` will not find that linker script, it works with `$(CC)`. -## It turns out that this is specific to CoudeSourcery, and ARM version of GCC ships something -## else instead and according to the following files, this is what we need to pass to `$(CC). -## - gcc-arm-none-eabi-4_8-2014q1/share/gcc-arm-none-eabi/samples/src/makefile.conf -## - gcc-arm-none-eabi-4_8-2014q1/share/gcc-arm-none-eabi/samples/src/qemu/Makefile -LDFLAGS= --specs=nano.specs --specs=rdimon.specs -Wl,--gc-sections -Wl,-Map=$(@:.elf=.map) - -SRC_COMMON_C = \ - moduos.c \ - modmachine.c \ - -SRC_RUN_C = \ - main.c \ - -SRC_TEST_C = \ - test_main.c \ - -LIB_SRC_C = $(addprefix lib/,\ - libm/math.c \ - libm/fmodf.c \ - libm/nearbyintf.c \ - libm/ef_sqrt.c \ - libm/kf_rem_pio2.c \ - libm/kf_sin.c \ - libm/kf_cos.c \ - libm/kf_tan.c \ - libm/ef_rem_pio2.c \ - libm/sf_sin.c \ - libm/sf_cos.c \ - libm/sf_tan.c \ - libm/sf_frexp.c \ - libm/sf_modf.c \ - libm/sf_ldexp.c \ - libm/asinfacosf.c \ - libm/atanf.c \ - libm/atan2f.c \ - utils/sys_stdio_mphal.c \ - ) - -OBJ_COMMON = -OBJ_COMMON += $(PY_O) -OBJ_COMMON += $(addprefix $(BUILD)/, $(SRC_COMMON_C:.c=.o)) -OBJ_COMMON += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) - -OBJ_RUN = -OBJ_RUN += $(addprefix $(BUILD)/, $(SRC_RUN_C:.c=.o)) - -OBJ_TEST = -OBJ_TEST += $(addprefix $(BUILD)/, $(SRC_TEST_C:.c=.o)) -OBJ_TEST += $(BUILD)/tinytest.o - -# All object files, needed to get dependencies correct -OBJ = $(OBJ_COMMON) $(OBJ_RUN) $(OBJ_TEST) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_COMMON_C) $(SRC_RUN_C) $(LIB_SRC_C) - -all: run - -run: $(BUILD)/firmware.elf - qemu-system-arm -machine integratorcp -cpu cortex-m3 -nographic -monitor null -serial null -semihosting -kernel $(BUILD)/firmware.elf - -test: $(BUILD)/firmware-test.elf - qemu-system-arm -machine integratorcp -cpu cortex-m3 -nographic -monitor null -serial null -semihosting -kernel $(BUILD)/firmware-test.elf > $(BUILD)/console.out - $(Q)tail -n2 $(BUILD)/console.out - $(Q)tail -n1 $(BUILD)/console.out | grep -q "status: 0" - -.PHONY: $(BUILD)/genhdr/tests.h - -$(BUILD)/test_main.o: $(BUILD)/genhdr/tests.h -$(BUILD)/genhdr/tests.h: - $(Q)echo "Generating $@";(cd $(TOP)/tests; ../tools/tinytest-codegen.py) > $@ - -$(BUILD)/tinytest.o: - $(Q)$(CC) $(CFLAGS) -DNO_FORKING -o $@ -c $(TOP)/tools/tinytest/tinytest.c - -## `$(LD)` doesn't seem to like `--specs` for some reason, but we can just use `$(CC)` here. -$(BUILD)/firmware.elf: $(OBJ_COMMON) $(OBJ_RUN) - $(Q)$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -$(BUILD)/firmware-test.elf: $(OBJ_COMMON) $(OBJ_TEST) - $(Q)$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/qemu-arm/README.md b/ports/qemu-arm/README.md deleted file mode 100644 index 0cf93c7d5613a..0000000000000 --- a/ports/qemu-arm/README.md +++ /dev/null @@ -1,23 +0,0 @@ -This is experimental, community-supported port for Cortex-M emulation as -provided by QEMU (http://qemu.org). - -The purposes of this port are to enable: - -1. Continuous integration - - run tests against architecture-specific parts of code base -2. Experimentation - - simulation & prototyping of anything that has architecture-specific - code - - exploring instruction set in terms of optimising some part of - MicroPython or a module -3. Streamlined debugging - - no need for JTAG or even an MCU chip itself - - no need to use OpenOCD or anything else that might slow down the - process in terms of plugging things together, pressing buttons, etc. - -This port will only work with with [GCC ARM Embedded](launchpad.net/gcc-arm-embedded) -toolchain and not with CodeSourcery toolchain. You will need to modify -`LDFLAGS` if you want to use CodeSourcery's version of `arm-none-eabi`. -The difference is that CodeSourcery needs `-T generic-m-hosted.ld` while -ARM's version requires `--specs=nano.specs --specs=rdimon.specs` to be -passed to the linker. diff --git a/ports/qemu-arm/main.c b/ports/qemu-arm/main.c deleted file mode 100644 index d23ef576f9ede..0000000000000 --- a/ports/qemu-arm/main.c +++ /dev/null @@ -1,60 +0,0 @@ -#include -#include -#include -#include -#include - -#include "py/obj.h" -#include "py/compile.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/repl.h" -#include "py/mperrno.h" - -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} - -int main(int argc, char **argv) { - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - void *heap = malloc(16 * 1024); - gc_init(heap, (char*)heap + 16 * 1024); - mp_init(); - do_str("print('hello world!')", MP_PARSE_SINGLE_INPUT); - mp_deinit(); - return 0; -} - -void gc_collect(void) { -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - printf("uncaught NLR\n"); - exit(1); -} diff --git a/ports/qemu-arm/modmachine.c b/ports/qemu-arm/modmachine.c deleted file mode 100644 index 0f66349a8befc..0000000000000 --- a/ports/qemu-arm/modmachine.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/machine_mem.h" -#include "extmod/machine_pinbase.h" -#include "extmod/machine_signal.h" - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_PinBase), MP_ROM_PTR(&machine_pinbase_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; diff --git a/ports/qemu-arm/moduos.c b/ports/qemu-arm/moduos.c deleted file mode 100644 index a48b51db01ae0..0000000000000 --- a/ports/qemu-arm/moduos.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "extmod/vfs.h" - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename), MP_ROM_PTR(&mp_vfs_rename_obj) }, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, - - // MicroPython extensions - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/qemu-arm/mpconfigport.h b/ports/qemu-arm/mpconfigport.h deleted file mode 100644 index 1998837846bce..0000000000000 --- a/ports/qemu-arm/mpconfigport.h +++ /dev/null @@ -1,72 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (512) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (1) -#define MICROPY_EMIT_INLINE_THUMB (1) -#define MICROPY_MALLOC_USES_ALLOCATED_SIZE (1) -#define MICROPY_MEM_STATS (1) -#define MICROPY_DEBUG_PRINTERS (0) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_HELPER_REPL (0) -#define MICROPY_HELPER_LEXER_UNIX (0) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_USE_INTERNAL_PRINTF (0) -#define MICROPY_VFS (1) - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%lu" -#define INT_FMT "%ld" - -typedef int32_t mp_int_t; // must be pointer size -typedef uint32_t mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#include -#define MP_PLAT_PRINT_STRN(str, len) write(1, str, len) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built-in modules to add to the list of known ones -extern const struct _mp_obj_module_t mp_module_uos; - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) }, \ - -// We need to provide a declaration/definition of alloca() -#include diff --git a/ports/qemu-arm/mphalport.h b/ports/qemu-arm/mphalport.h deleted file mode 100644 index d996402ae4ac4..0000000000000 --- a/ports/qemu-arm/mphalport.h +++ /dev/null @@ -1,2 +0,0 @@ -#define mp_hal_stdin_rx_chr() (0) -#define mp_hal_stdout_tx_strn_cooked(s, l) write(1, (s), (l)) diff --git a/ports/qemu-arm/test_main.c b/ports/qemu-arm/test_main.c deleted file mode 100644 index c018ae4285822..0000000000000 --- a/ports/qemu-arm/test_main.c +++ /dev/null @@ -1,92 +0,0 @@ -#include -#include -#include -#include -#include - -#include "py/obj.h" -#include "py/compile.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mperrno.h" - -#include "tinytest.h" -#include "tinytest_macros.h" - -#define HEAP_SIZE (128 * 1024) -STATIC void *heap; - -void do_str(const char *src); -inline void do_str(const char *src) { - gc_init(heap, (char*)heap + HEAP_SIZE); - mp_init(); - - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, MP_PARSE_FILE_INPUT); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, false); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - mp_obj_t exc = (mp_obj_t)nlr.ret_val; - if (mp_obj_is_subclass_fast(mp_obj_get_type(exc), &mp_type_SystemExit)) { - // Assume that sys.exit() is called to skip the test. - // TODO: That can be always true, we should set up convention to - // use specific exit code as skip indicator. - tinytest_set_test_skipped_(); - goto end; - } - mp_obj_print_exception(&mp_plat_print, exc); - tt_abort_msg("Uncaught exception"); - } -end: - mp_deinit(); -} - -#include "genhdr/tests.h" - -int main() { - const char a[] = {"sim"}; - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - heap = malloc(HEAP_SIZE); - int r = tinytest_main(1, (const char **) a, groups); - printf( "status: %i\n", r); - return r; -} - -void gc_collect(void) { - gc_collect_start(); - - // get the registers and the sp - jmp_buf env; - setjmp(env); - volatile mp_uint_t dummy; - void *sp = (void*)&dummy; - - // trace the stack, including the registers (since they live on the stack in this function) - gc_collect_root((void**)sp, ((uint32_t)MP_STATE_THREAD(stack_top) - (uint32_t)sp) / sizeof(uint32_t)); - - gc_collect_end(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -void nlr_jump_fail(void *val) { - printf("uncaught NLR\n"); - exit(1); -} diff --git a/ports/stm/.gitignore b/ports/stm/.gitignore new file mode 100644 index 0000000000000..3080ece14dad3 --- /dev/null +++ b/ports/stm/.gitignore @@ -0,0 +1,9 @@ +# Build files +##################### +build-*/ + +# Reference files +##################### +ref/ + +.gdb_history \ No newline at end of file diff --git a/ports/stm/Makefile b/ports/stm/Makefile new file mode 100755 index 0000000000000..f8c05fd802b33 --- /dev/null +++ b/ports/stm/Makefile @@ -0,0 +1,283 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# Copyright (c) 2019 Lucian Copeland for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. +# DEBUG = 1 + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk + +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +####################################### +# CFLAGS +####################################### + +INC += -I. +INC += -I../.. +INC += -I$(BUILD) +INC += -I$(BUILD)/genhdr +INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc +INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc/Legacy +INC += -I./st_driver/CMSIS/Device/ST/STM32F4xx/Include +INC += -I./st_driver/CMSIS/Include +INC += -I./boards +INC += -I./boards/$(BOARD) +INC += -I./peripherals +INC += -I../../lib/mp-readline +INC += -I../../lib/tinyusb/src +INC += -I../../supervisor/shared/usb + + +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra +else + CFLAGS += -Os -DNDEBUG + CFLAGS += -ggdb + # TODO: Test with -flto + ### CFLAGS += -flto +endif + + +C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) + +CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) + +# Undo some warnings. +# STM32 apparently also uses undefined preprocessor variables quite casually, +# so we can't do warning checks for these. +CFLAGS += -Wno-undef +# STM32 might do casts that increase alignment requirements. +CFLAGS += -Wno-cast-align + +CFLAGS += \ + -mthumb \ + -mabi=aapcs-linux \ + -mfloat-abi=hard \ + -mcpu=cortex-m4 \ + -mfpu=fpv4-sp-d16 + +# TODO: check this +CFLAGS += -D__START=main + +#need both command and valid file to use uf2 bootloader +ifndef LD_FILE + ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),) + LD_FILE = $(LD_BOOT) + BOOTLOADER_OFFSET = $(UF2_OFFSET) + CFLAGS += -DUF2_BOOTLOADER_ENABLED + else + LD_FILE = $(LD_DEFAULT) + endif +endif + +# Add bootloader specific items +ifndef BOOTLOADER_OFFSET + BOOTLOADER_OFFSET := 0x8000000 +endif + +LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LIBS := -lgcc -lc + +LDFLAGS += -mthumb -mcpu=cortex-m4 + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 + + +###################################### +# source +###################################### + +SRC_STM32 = \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \ + st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \ + system_stm32f4xx.c + + +SRC_C += \ + background.c \ + fatfs_port.c \ + mphalport.c \ + tick.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + peripherals/stm32f4/$(MCU_SUB_VARIANT)/pins.c \ + peripherals/stm32f4/$(MCU_SUB_VARIANT)/clocks.c \ + peripherals/stm32f4/$(MCU_SUB_VARIANT)/gpio.c \ + peripherals/stm32f4/$(MCU_SUB_VARIANT)/periph.c \ + lib/libc/string0.c \ + lib/mp-readline/readline.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/timeutils/timeutils.c \ + lib/utils/buffer_helper.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/interrupt_char.c \ + lib/utils/pyexec.c \ + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + supervisor/shared/memory.c + +ifneq ($(USB),FALSE) +SRC_C += lib/tinyusb/src/portable/st/synopsys/dcd_synopsys.c +endif + +SRC_S = \ + supervisor/cpu.s \ + boards/startup_$(MCU_SUB_VARIANT).s + +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + + +ifneq ($(FROZEN_MPY_DIR),) +FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py') +FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy)) +endif + +OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_STM32:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os +$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os + +# List of sources for qstr extraction +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR += + + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 + +$(BUILD)/firmware.elf: $(OBJ) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(LD_FILE) + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary $^ $@ +# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ + +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O ihex $^ $@ +# $(Q)$(OBJCOPY) -O ihex -j .vectors -j .text -j .data $^ $@ + +$(BUILD)/firmware.uf2: $(BUILD)/firmware.hex + $(ECHO) "Create $@" + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b $(BOOTLOADER_OFFSET) -c -o "$(BUILD)/firmware.uf2" $^ + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/stm/README.md b/ports/stm/README.md new file mode 100644 index 0000000000000..a860c01ce4593 --- /dev/null +++ b/ports/stm/README.md @@ -0,0 +1,3 @@ +# CircuitPython Port To The ST Microelectronics STM32F4 Series + +This is a port of CircuitPython to the STM32F4 series of chips. diff --git a/ports/stm/background.c b/ports/stm/background.c new file mode 100644 index 0000000000000..8c1897043455e --- /dev/null +++ b/ports/stm/background.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "supervisor/filesystem.h" +#include "supervisor/usb.h" +#include "supervisor/shared/stack.h" + +#if CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + running_background_tasks = true; + filesystem_background(); + + #if USB_AVAILABLE + usb_background(); + #endif + + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + running_background_tasks = false; + + assert_heap_ok(); +} diff --git a/ports/stm/background.h b/ports/stm/background.h new file mode 100644 index 0000000000000..05a4f894a6c05 --- /dev/null +++ b/ports/stm/background.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_BACKGROUND_H +#define MICROPY_INCLUDED_STM32F4_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); + +#endif // MICROPY_INCLUDED_STM32F4_BACKGROUND_H diff --git a/ports/stm/boards/STM32F401xd_fs.ld b/ports/stm/boards/STM32F401xd_fs.ld new file mode 100644 index 0000000000000..c42dfcca8c976 --- /dev/null +++ b/ports/stm/boards/STM32F401xd_fs.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 320K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F401xe_boot.ld b/ports/stm/boards/STM32F401xe_boot.ld new file mode 100644 index 0000000000000..125d785fc228d --- /dev/null +++ b/ports/stm/boards/STM32F401xe_boot.ld @@ -0,0 +1,106 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F401xe_fs.ld b/ports/stm/boards/STM32F401xe_fs.ld new file mode 100644 index 0000000000000..fd30e16228dd0 --- /dev/null +++ b/ports/stm/boards/STM32F401xe_fs.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F405_boot.ld b/ports/stm/boards/STM32F405_boot.ld new file mode 100644 index 0000000000000..64da3b6520e4a --- /dev/null +++ b/ports/stm/boards/STM32F405_boot.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F405 with bootloader + Based on Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 1024K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K /* sectors 5+ */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + diff --git a/ports/stm/boards/STM32F405_default.ld b/ports/stm/boards/STM32F405_default.ld new file mode 100644 index 0000000000000..c2b8c843ee448 --- /dev/null +++ b/ports/stm/boards/STM32F405_default.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F405_fs.ld b/ports/stm/boards/STM32F405_fs.ld new file mode 100644 index 0000000000000..7f7c917846662 --- /dev/null +++ b/ports/stm/boards/STM32F405_fs.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F407_fs.ld b/ports/stm/boards/STM32F407_fs.ld new file mode 100644 index 0000000000000..7f7c917846662 --- /dev/null +++ b/ports/stm/boards/STM32F407_fs.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F411VETx_FLASH.ld b/ports/stm/boards/STM32F411VETx_FLASH.ld new file mode 100644 index 0000000000000..ac1ba32408618 --- /dev/null +++ b/ports/stm/boards/STM32F411VETx_FLASH.ld @@ -0,0 +1,109 @@ +/* + GNU linker script for STM32F411 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = 0x2001c000; /* tunable */ + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F411VETx_nvm_FLASH.ld b/ports/stm/boards/STM32F411VETx_nvm_FLASH.ld new file mode 100644 index 0000000000000..8382cb7818647 --- /dev/null +++ b/ports/stm/boards/STM32F411VETx_nvm_FLASH.ld @@ -0,0 +1,118 @@ +/* + GNU linker script for STM32F411 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */ + FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = 0x2001c000; /* tunable */ + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* Non-volitile memory */ + .nvm_data : + { + . = ALIGN(4); + KEEP(*(.nvm_data)) + . = ALIGN(4); + } >FLASH_NVM + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32F412ZGTx_FLASH.ld b/ports/stm/boards/STM32F412ZGTx_FLASH.ld new file mode 100644 index 0000000000000..e0586709e6cd1 --- /dev/null +++ b/ports/stm/boards/STM32F412ZGTx_FLASH.ld @@ -0,0 +1,105 @@ +/* + GNU linker script for STM32F412 +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = 0x20020000; /* tunable */ + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/ports/stm/boards/board.h b/ports/stm/boards/board.h new file mode 100644 index 0000000000000..22d9e99be091e --- /dev/null +++ b/ports/stm/boards/board.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_STM32F4_BOARDS_BOARD_H +#define MICROPY_INCLUDED_STM32F4_BOARDS_BOARD_H + +#include + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_STM32F4_BOARDS_BOARD_H diff --git a/ports/stm/boards/espruino_pico/README.md b/ports/stm/boards/espruino_pico/README.md new file mode 100644 index 0000000000000..9f0321c474dcd --- /dev/null +++ b/ports/stm/boards/espruino_pico/README.md @@ -0,0 +1,15 @@ +# Flashing the Espruino Pico + +The Espruino Pico is normally updated via a bootloader activated by the Espruino web app. This approach is not practical for Circuitpython as it takes too much space from the internal filesystem - thus, you will need to follow the instructions for advanced reflashing using the built-in ROM bootloader on all STM32F4 MCUs (instructions sourced from https://www.espruino.com/Pico#advanced-reflashing) + + - Short out the BOOT0/BTN solder jumper on the back of the board - you can do this by drawing over it with a pencil. + - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux + - **Mac**: install with Homebrew: `brew install dfu-util` + - **Linux**: install with apt-get: `sudo apt-get install dfu-util` + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - Hold down the Pico's button while plugging it into USB (when overwriting Espruino's default firmware) + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. + + +To reinstall Espruino, follow the same steps with the latest Espruino Pico binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. \ No newline at end of file diff --git a/ports/stm/boards/espruino_pico/board.c b/ports/stm/boards/espruino_pico/board.c new file mode 100644 index 0000000000000..82b0c506edcfc --- /dev/null +++ b/ports/stm/boards/espruino_pico/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.h b/ports/stm/boards/espruino_pico/mpconfigboard.h new file mode 100644 index 0000000000000..d4430380c6435 --- /dev/null +++ b/ports/stm/boards/espruino_pico/mpconfigboard.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Espruino Pico" +#define MICROPY_HW_MCU_NAME "STM32F401xD" + +#define FLASH_SIZE (0x60000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS (500) +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +#define BOARD_OSC_DIV (8) + diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.mk b/ports/stm/boards/espruino_pico/mpconfigboard.mk new file mode 100644 index 0000000000000..151ca1437a912 --- /dev/null +++ b/ports/stm/boards/espruino_pico/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x808E +USB_PRODUCT = "Espruino Pico" +USB_MANUFACTURER = "Espruino" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f401xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F401xE +LD_FILE = boards/STM32F401xd_fs.ld # use for internal flash + diff --git a/ports/stm/boards/espruino_pico/pins.c b/ports/stm/boards/espruino_pico/pins.c new file mode 100644 index 0000000000000..55c0336c54eae --- /dev/null +++ b/ports/stm/boards/espruino_pico/pins.c @@ -0,0 +1,33 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_BTN), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PB12) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/espruino_pico/stm32f4xx_hal_conf.h b/ports/stm/boards/espruino_pico/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..ab04df3182598 --- /dev/null +++ b/ports/stm/boards/espruino_pico/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/espruino_wifi/README.MD b/ports/stm/boards/espruino_wifi/README.MD new file mode 100644 index 0000000000000..8c2cd3be2bcf5 --- /dev/null +++ b/ports/stm/boards/espruino_wifi/README.MD @@ -0,0 +1,15 @@ +# Flashing the Espruino Wifi + +The Espruino Wifi is normally updated via a bootloader activated by the Espruino web app. This approach is not practical for Circuitpython as it takes too much space from the internal filesystem - thus, you will need to follow the instructions for advanced reflashing using the built-in ROM bootloader on all STM32F4 MCUs (instructions sourced from https://www.espruino.com/Wifi#advanced-reflashing) + + - Short out the BOOT0/BTN solder jumper on the back of the board - you can do this by drawing over it with a pencil. + - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux + - **Mac**: install with Homebrew: `brew install dfu-util` + - **Linux**: install with apt-get: `sudo apt-get install dfu-util` + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - Hold down the Wifi's button while plugging it into USB (when overwriting Espruino's default firmware) + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. + + +To reinstall Espruino, follow the same steps with the latest Espruino Wifi binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. \ No newline at end of file diff --git a/ports/stm/boards/espruino_wifi/board.c b/ports/stm/boards/espruino_wifi/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/espruino_wifi/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/espruino_wifi/mpconfigboard.h b/ports/stm/boards/espruino_wifi/mpconfigboard.h new file mode 100644 index 0000000000000..abdc9e8fac4ab --- /dev/null +++ b/ports/stm/boards/espruino_wifi/mpconfigboard.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Espruino Wifi" +#define MICROPY_HW_MCU_NAME "STM32F411xE" + +#define FLASH_SIZE (0x80000) //512K +#define FLASH_PAGE_SIZE (0x4000) //16K + +#define BOARD_OSC_DIV (8) +#define BOARD_OVERWRITE_SWD (1) diff --git a/ports/stm/boards/espruino_wifi/mpconfigboard.mk b/ports/stm/boards/espruino_wifi/mpconfigboard.mk new file mode 100644 index 0000000000000..8b28cf07c7f77 --- /dev/null +++ b/ports/stm/boards/espruino_wifi/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x8090 +USB_PRODUCT = "Espruino Wifi" +USB_MANUFACTURER = "Espruino" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm/boards/espruino_wifi/pins.c b/ports/stm/boards/espruino_wifi/pins.c new file mode 100644 index 0000000000000..8800317d50c8a --- /dev/null +++ b/ports/stm/boards/espruino_wifi/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + //P1 + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_BTN), MP_ROM_PTR(&pin_PC13) }, + + { MP_ROM_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_ESP_CHPD), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_ESP_GPIO13), MP_ROM_PTR(&pin_PA15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/espruino_wifi/stm32f4xx_hal_conf.h b/ports/stm/boards/espruino_wifi/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..18d9d60ebe5b8 --- /dev/null +++ b/ports/stm/boards/espruino_wifi/stm32f4xx_hal_conf.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/feather_stm32f405_express/board.c b/ports/stm/boards/feather_stm32f405_express/board.c new file mode 100644 index 0000000000000..82b0c506edcfc --- /dev/null +++ b/ports/stm/boards/feather_stm32f405_express/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.h new file mode 100644 index 0000000000000..6600fcf671c1a --- /dev/null +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.h @@ -0,0 +1,58 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" +#define MICROPY_HW_MCU_NAME "STM32F405RG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define MICROPY_HW_NEOPIXEL (&pin_PC00) + +#define BOARD_OSC_DIV (12) + +// On-board flash +#define SPI_FLASH_MOSI_PIN (&pin_PB05) +#define SPI_FLASH_MISO_PIN (&pin_PB04) +#define SPI_FLASH_SCK_PIN (&pin_PB03) +#define SPI_FLASH_CS_PIN (&pin_PA15) + +// Bootloader only +#ifdef UF2_BOOTLOADER_ENABLED + #define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader +#endif + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) +#define DEFAULT_SPI_BUS_MISO (&pin_PB14) + +#define DEFAULT_UART_BUS_RX (&pin_PB11) +#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk new file mode 100644 index 0000000000000..312ca6b480ef5 --- /dev/null +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -0,0 +1,22 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Feather STM32F405 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F405xx + +# Default includes filesystem, but uses external flash +LD_DEFAULT = boards/STM32F405_default.ld +LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option +UF2_OFFSET = 0x8010000 + diff --git a/ports/stm/boards/feather_stm32f405_express/pins.c b/ports/stm/boards/feather_stm32f405_express/pins.c new file mode 100644 index 0000000000000..ebc8fa337e288 --- /dev/null +++ b/ports/stm/boards/feather_stm32f405_express/pins.c @@ -0,0 +1,35 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h b/ports/stm/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..8031403a91e5b --- /dev/null +++ b/ports/stm/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/meowbit_v121/board.c b/ports/stm/boards/meowbit_v121/board.c new file mode 100644 index 0000000000000..9e2d99bce080f --- /dev/null +++ b/ports/stm/boards/meowbit_v121/board.c @@ -0,0 +1,124 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +#include "shared-bindings/board/__init__.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "shared-bindings/busio/SPI.h" + +#include "supervisor/spi_flash_api.h" + +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x20, 0, // _INVOFF //MISMATCh 0x2a vs 0x20 + 0x36, 1, 0x18, // _MADCTL bottom to top refresh + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 0x10, 0x02, 0x1c, 0x07, 0x12, + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, // _GMCTRP1 Gamma + 0xe1, 0x10, 0x03, 0x1d, 0x07, 0x06, + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, // _GMCTRN1 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + +void board_init(void) { + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + busio_spi_obj_t *internal_spi = &supervisor_flash_spi_bus; + common_hal_displayio_fourwire_construct(bus, + internal_spi, + &pin_PA08, // Command or data + &pin_PB12, // Chip select + &pin_PB10, // Reset + 24000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 160, // Width + 128, // Height + 0, // column start + 0, // row start + 90, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PB03, + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.h b/ports/stm/boards/meowbit_v121/mpconfigboard.h new file mode 100644 index 0000000000000..babf54a3a9d89 --- /dev/null +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "MEOWBIT" +#define MICROPY_HW_MCU_NAME "STM32F401xE" + +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +#define BOARD_OSC_DIV (12) +#define BOARD_NO_VBUS_SENSE (1) +#define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader +#define BOARD_USE_INTERNAL_SPI + +// On-board flash +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk new file mode 100644 index 0000000000000..16268ba11935d --- /dev/null +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -0,0 +1,24 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Meowbit" +USB_MANUFACTURER = "Kittenbot" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +LONGINT_IMPL = MPZ + +BOOTLOADER_OFFSET = 0x8010000 + +# INTERNAL_FLASH_FILESYSTEM = 1 +# LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f401xe +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F401xE +LD_FILE = boards/STM32F401xe_boot.ld +# LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash + diff --git a/ports/stm/boards/meowbit_v121/pins.c b/ports/stm/boards/meowbit_v121/pins.c new file mode 100644 index 0000000000000..af896fad87a51 --- /dev/null +++ b/ports/stm/boards/meowbit_v121/pins.c @@ -0,0 +1,68 @@ +#include "shared-bindings/board/__init__.h" +#include "supervisor/spi_flash_api.h" + +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) }, + + { MP_ROM_QSTR(MP_QSTR_DISP_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_DISP_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_DISP_MOSI), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_DISP_RST), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_BUZZ), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_BTNA), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_BTNB), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_DOWN), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_LEFT), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_TEMP), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_MENU), MP_ROM_PTR(&pin_PC15) }, + + { MP_ROM_QSTR(MP_QSTR_JACK_TX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_JACK_PWREN), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_JACK_SND), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_ACC_INT), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_ACC_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_ACC_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + // { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PC06) }, //these are wrong on Meowbit diagram. + // { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, //they cannot be used together (UART2 vs 6) + { MP_ROM_QSTR(MP_QSTR_NSS), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC10) }, + + { MP_ROM_QSTR(MP_QSTR_P20), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA10) }, //in use by USB + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)}, + { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&supervisor_flash_spi_bus) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/meowbit_v121/stm32f4xx_hal_conf.h b/ports/stm/boards/meowbit_v121/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..68a49b4ba8621 --- /dev/null +++ b/ports/stm/boards/meowbit_v121/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/openocd_stm32f4.cfg b/ports/stm/boards/openocd_stm32f4.cfg similarity index 79% rename from ports/stm32/boards/openocd_stm32f4.cfg rename to ports/stm/boards/openocd_stm32f4.cfg index ee96b91bd9687..19631a7c8ee80 100644 --- a/ports/stm32/boards/openocd_stm32f4.cfg +++ b/ports/stm/boards/openocd_stm32f4.cfg @@ -17,7 +17,7 @@ source [find target/stm32f4x.cfg] reset_config srst_only init -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { +proc stm_flash { BIN0 ADDR0 {BIN1 ""} {ADDR1 ""} } { reset halt sleep 100 wait_halt 2 @@ -25,10 +25,12 @@ proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { sleep 100 verify_image $BIN0 $ADDR0 sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 + if {$BIN1 ne ""} { + flash write_image erase $BIN1 $ADDR1 + sleep 100 + verify_image $BIN1 $ADDR1 + sleep 100 + } reset run shutdown } diff --git a/ports/stm/boards/pyb_nano_v2/board.c b/ports/stm/boards/pyb_nano_v2/board.c new file mode 100644 index 0000000000000..82b0c506edcfc --- /dev/null +++ b/ports/stm/boards/pyb_nano_v2/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.h b/ports/stm/boards/pyb_nano_v2/mpconfigboard.h new file mode 100644 index 0000000000000..965e7d5ff4aa7 --- /dev/null +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "PYB LR Nano V2" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (8) + +// On-board flash +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB12) + +#define CIRCUITPY_AUTORELOAD_DELAY_MS (500) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) + +#define AUTORESET_DELAY_MS (500) diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk new file mode 100644 index 0000000000000..a8472608b747d --- /dev/null +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x8068 +USB_PRODUCT = "PYB LR Nano V2" +USB_MANUFACTURER = "MicroPython Chinese Community" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q64JV_IQ +LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm/boards/pyb_nano_v2/pins.c b/ports/stm/boards/pyb_nano_v2/pins.c new file mode 100644 index 0000000000000..e10124f6afb32 --- /dev/null +++ b/ports/stm/boards/pyb_nano_v2/pins.c @@ -0,0 +1,59 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_Y10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_Y9), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_Y8), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_Y7), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_Y6), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_Y5), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_Y4), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_Y3), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_Y2), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_Y1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_Y0), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_X15), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_X14), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_X13), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_X12), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_X11), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_X10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_X9), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_X8), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_X7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_X6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_X5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_X4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_X3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_X2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_X1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_X0), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SDA2), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SCL2), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_SDA3), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_SCL3), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_SCK1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MISO1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOSI1), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_SCK2), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MISO2), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI2), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_LED_YELLOW), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_SW), MP_ROM_PTR(&pin_PC13) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/pyb_nano_v2/stm32f4xx_hal_conf.h b/ports/stm/boards/pyb_nano_v2/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..ab04df3182598 --- /dev/null +++ b/ports/stm/boards/pyb_nano_v2/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/pyboard_v11/board.c b/ports/stm/boards/pyboard_v11/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/pyboard_v11/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/pyboard_v11/mpconfigboard.h b/ports/stm/boards/pyboard_v11/mpconfigboard.h new file mode 100644 index 0000000000000..398731d30c64f --- /dev/null +++ b/ports/stm/boards/pyboard_v11/mpconfigboard.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "PyboardV1_1" +#define MICROPY_HW_MCU_NAME "STM32F405RG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (12) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm/boards/pyboard_v11/mpconfigboard.mk b/ports/stm/boards/pyboard_v11/mpconfigboard.mk new file mode 100644 index 0000000000000..ef1b8f0ca156d --- /dev/null +++ b/ports/stm/boards/pyboard_v11/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x805C +USB_PRODUCT = "Pyboard Version 1.1" +USB_MANUFACTURER = "George Robotic" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F405xx +LD_FILE = boards/STM32F405_fs.ld + diff --git a/ports/stm/boards/pyboard_v11/pins.c b/ports/stm/boards/pyboard_v11/pins.c new file mode 100644 index 0000000000000..8783dfcf105ab --- /dev/null +++ b/ports/stm/boards/pyboard_v11/pins.c @@ -0,0 +1,52 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_Y1), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_Y2), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_Y3), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_Y4), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_Y5), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_Y6), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_Y7), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_Y8), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_Y9), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_Y10), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_Y11), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_Y12), MP_ROM_PTR(&pin_PB01) }, + + { MP_ROM_QSTR(MP_QSTR_X1), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_X2), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_X3), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_X4), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_X5), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_X6), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_X7), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_X8), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_X9), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_X10), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_X11), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_X12), MP_ROM_PTR(&pin_PC05) }, + + { MP_ROM_QSTR(MP_QSTR_X17), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_X18), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_X19), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_X20), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_X21), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_X22), MP_ROM_PTR(&pin_PC03) }, + + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PA13) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA13) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/pyboard_v11/stm32f4xx_hal_conf.h b/ports/stm/boards/pyboard_v11/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..4dc18cb7f41c8 --- /dev/null +++ b/ports/stm/boards/pyboard_v11/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/startup_stm32f401xe.s b/ports/stm/boards/startup_stm32f401xe.s new file mode 100644 index 0000000000000..815ac17197b53 --- /dev/null +++ b/ports/stm/boards/startup_stm32f401xe.s @@ -0,0 +1,448 @@ +/** + ****************************************************************************** + * @file startup_stm32f401xe.s + * @author MCD Application Team + * @brief STM32F401xExx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + /* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word 0 /* Reserved */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word 0 /* Reserved */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FPU_IRQHandler /* FPU */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI4 */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/ports/stm/boards/startup_stm32f405xx.s b/ports/stm/boards/startup_stm32f405xx.s new file mode 100644 index 0000000000000..6b77655ca1b31 --- /dev/null +++ b/ports/stm/boards/startup_stm32f405xx.s @@ -0,0 +1,516 @@ +/** + ****************************************************************************** + * @file startup_stm32f405xx.s + * @author MCD Application Team + * @brief STM32F405xx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + diff --git a/ports/stm/boards/startup_stm32f407xx.s b/ports/stm/boards/startup_stm32f407xx.s new file mode 100644 index 0000000000000..6b77655ca1b31 --- /dev/null +++ b/ports/stm/boards/startup_stm32f407xx.s @@ -0,0 +1,516 @@ +/** + ****************************************************************************** + * @file startup_stm32f405xx.s + * @author MCD Application Team + * @brief STM32F405xx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + diff --git a/ports/stm/boards/startup_stm32f411xe.s b/ports/stm/boards/startup_stm32f411xe.s new file mode 100644 index 0000000000000..3aac640cb2f8e --- /dev/null +++ b/ports/stm/boards/startup_stm32f411xe.s @@ -0,0 +1,452 @@ +/** + ****************************************************************************** + * @file startup_stm32f411xe.s + * @author MCD Application Team + * @brief STM32F411xExx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word 0 /* Reserved */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word 0 /* Reserved */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FPU_IRQHandler /* FPU */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/ports/stm/boards/startup_stm32f412zx.s b/ports/stm/boards/startup_stm32f412zx.s new file mode 100644 index 0000000000000..8012207957fea --- /dev/null +++ b/ports/stm/boards/startup_stm32f412zx.s @@ -0,0 +1,524 @@ +/** + ****************************************************************************** + * @file startup_stm32f412zx.s + * @author MCD Application Team + * @brief STM32F412Zx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word 0 /* Reserved */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word TIM6_IRQHandler /* TIM6 */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word DFSDM1_FLT0_IRQHandler /* DFSDM1 Filter0 */ + .word DFSDM1_FLT1_IRQHandler /* DFSDM1 Filter1 */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word RNG_IRQHandler /* RNG */ + .word FPU_IRQHandler /* FPU */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word QUADSPI_IRQHandler /* QuadSPI */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FMPI2C1_EV_IRQHandler /* FMPI2C1 Event */ + .word FMPI2C1_ER_IRQHandler /* FMPI2C1 Error */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_IRQHandler + .thumb_set TIM6_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak RNG_IRQHandler + .thumb_set RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak FMPI2C1_EV_IRQHandler + .thumb_set FMPI2C1_EV_IRQHandler,Default_Handler + + .weak FMPI2C1_ER_IRQHandler + .thumb_set FMPI2C1_ER_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/stm32f411ce_blackpill/board.c b/ports/stm/boards/stm32f411ce_blackpill/board.c new file mode 100644 index 0000000000000..82b0c506edcfc --- /dev/null +++ b/ports/stm/boards/stm32f411ce_blackpill/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.h b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.h new file mode 100644 index 0000000000000..2ae1a29268948 --- /dev/null +++ b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "stm32f411ce-blackpill" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (25) +#define BOARD_NO_VBUS_SENSE (1) + +// On-board flash +// #define SPI_FLASH_MOSI_PIN (&pin_PA07) +// #define SPI_FLASH_MISO_PIN (&pin_PA06) +// #define SPI_FLASH_SCK_PIN (&pin_PA05) +// #define SPI_FLASH_CS_PIN (&pin_PA04) + +#define CIRCUITPY_AUTORELOAD_DELAY_MS (500) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) + +#define AUTORESET_DELAY_MS (500) diff --git a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk new file mode 100644 index 0000000000000..68c6a1eeaa56b --- /dev/null +++ b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x239A +USB_PID = 0x806A +USB_PRODUCT = "stm32f411ce blackpill" +USB_MANUFACTURER = "Unknown" +USB_DEVICES = "CDC,MSC" + +# SPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = xxxxxx #See supervisor/shared/external_flash/devices.h for options +# LONGINT_IMPL = MPZ + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm/boards/stm32f411ce_blackpill/pins.c b/ports/stm/boards/stm32f411ce_blackpill/pins.c new file mode 100644 index 0000000000000..aa9736fc4c884 --- /dev/null +++ b/ports/stm/boards/stm32f411ce_blackpill/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, //USB (shouldn't be used) + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, //USB (shouldn't be used) + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PA11) }, //USB (shouldn't be used) + { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PA12) }, //USB (shouldn't be used) + { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_B2), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h b/ports/stm/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..81d29f2420826 --- /dev/null +++ b/ports/stm/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/stm32f411ve_discovery/board.c b/ports/stm/boards/stm32f411ve_discovery/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/stm32f411ve_discovery/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.h b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.h new file mode 100644 index 0000000000000..49ef80cdd7259 --- /dev/null +++ b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "STM32F411E_DISCO" +#define MICROPY_HW_MCU_NAME "STM32F411xE" + +#define FLASH_SIZE (0x80000) //512K +#define FLASH_PAGE_SIZE (0x4000) //16K + +#define BOARD_OSC_DIV (8) diff --git a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk new file mode 100644 index 0000000000000..64e2b4dc53c19 --- /dev/null +++ b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x805E +USB_PRODUCT = "STM32F411VE Discovery Board - CPy" +USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 100 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm/boards/stm32f411ve_discovery/pins.c b/ports/stm/boards/stm32f411ve_discovery/pins.c new file mode 100644 index 0000000000000..673c412d51606 --- /dev/null +++ b/ports/stm/boards/stm32f411ve_discovery/pins.c @@ -0,0 +1,106 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + //P1 + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, + //P2 + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + //ST LED names + { MP_ROM_QSTR(MP_QSTR_LD3), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LD4), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LD5), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LD6), MP_ROM_PTR(&pin_PD15) }, + //more useful LED names + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PD15) }, + //AnalogIO names + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + //actual LED names + { MP_ROM_QSTR(MP_QSTR_LED_ORANGE), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_PD15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h b/ports/stm/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..18d9d60ebe5b8 --- /dev/null +++ b/ports/stm/boards/stm32f411ve_discovery/stm32f4xx_hal_conf.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/stm32f412zg_discovery/board.c b/ports/stm/boards/stm32f412zg_discovery/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/stm32f412zg_discovery/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.h b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.h new file mode 100644 index 0000000000000..f34b830fb2934 --- /dev/null +++ b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "STM32F412G_DISCO" +#define MICROPY_HW_MCU_NAME "STM32F412xGS" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (8) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB10) +#define DEFAULT_I2C_BUS_SDA (&pin_PB09) diff --git a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk new file mode 100644 index 0000000000000..b0205fc73309d --- /dev/null +++ b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -0,0 +1,22 @@ +USB_VID = 0x239A +USB_PID = 0x8056 +USB_PRODUCT = "STM32F412ZG Discovery Board - CPy" +USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC,HID" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +# QSPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = N25Q128A +# LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f412zx +MCU_PACKAGE = 144 +CMSIS_MCU = STM32F412Zx +LD_FILE = boards/STM32F412ZGTx_FLASH.ld + + diff --git a/ports/stm/boards/stm32f412zg_discovery/pins.c b/ports/stm/boards/stm32f412zg_discovery/pins.c new file mode 100644 index 0000000000000..ab90b045581b9 --- /dev/null +++ b/ports/stm/boards/stm32f412zg_discovery/pins.c @@ -0,0 +1,94 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) }, + { MP_ROM_QSTR(MP_QSTR_PF03), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_PF10), MP_ROM_PTR(&pin_PF10) }, + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) }, + { MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_PG12), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_PG13), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_PG14), MP_ROM_PTR(&pin_PG14) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PF10) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PF04) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, //USART6 TX + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, //USART6 RX + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC05) }, //alt PB09, see F401ZG-DISCO manual + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB00) }, //alt PB10, see F401ZG-DISCO manual + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PE03) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h b/ports/stm/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..f1b4013485580 --- /dev/null +++ b/ports/stm/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h @@ -0,0 +1,438 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +#define HAL_SRAM_MODULE_ENABLED +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +#define HAL_QSPI_MODULE_ENABLED +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/stm32f4_discovery/board.c b/ports/stm/boards/stm32f4_discovery/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/stm32f4_discovery/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/stm32f4_discovery/mpconfigboard.h b/ports/stm/boards/stm32f4_discovery/mpconfigboard.h new file mode 100644 index 0000000000000..fcd7aa09cd5fe --- /dev/null +++ b/ports/stm/boards/stm32f4_discovery/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "STM32F4_DISCO" +#define MICROPY_HW_MCU_NAME "STM32F407VG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (8) diff --git a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk new file mode 100644 index 0000000000000..312a20f65ada5 --- /dev/null +++ b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x808A +USB_PRODUCT = "STM32F407VG Discovery Board - CPy" +USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +# This is technically a F407 but there's no difference +# other than the camera and ethernet, which aren't supported. +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f407xx +MCU_PACKAGE = 100 +CMSIS_MCU = STM32F407xx +LD_FILE = boards/STM32F407_fs.ld + diff --git a/ports/stm/boards/stm32f4_discovery/pins.c b/ports/stm/boards/stm32f4_discovery/pins.c new file mode 100644 index 0000000000000..712932145aca0 --- /dev/null +++ b/ports/stm/boards/stm32f4_discovery/pins.c @@ -0,0 +1,107 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + //P1 + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, // Differs from F411 + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, + //P2 + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + //ST LED names + { MP_ROM_QSTR(MP_QSTR_LD3), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LD4), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LD5), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LD6), MP_ROM_PTR(&pin_PD15) }, + //more useful LED names + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PD15) }, + //AnalogIO names + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + //actual LED names + { MP_ROM_QSTR(MP_QSTR_LED_ORANGE), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_PD15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32f4_discovery/stm32f4xx_hal_conf.h b/ports/stm/boards/stm32f4_discovery/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..ee5832d49cb8b --- /dev/null +++ b/ports/stm/boards/stm32f4_discovery/stm32f4xx_hal_conf.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/thunderpack/board.c b/ports/stm/boards/thunderpack/board.c new file mode 100644 index 0000000000000..4421970eefe4d --- /dev/null +++ b/ports/stm/boards/thunderpack/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/thunderpack/mpconfigboard.h b/ports/stm/boards/thunderpack/mpconfigboard.h new file mode 100644 index 0000000000000..0b3c55819a155 --- /dev/null +++ b/ports/stm/boards/thunderpack/mpconfigboard.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#define MICROPY_HW_BOARD_NAME "THUNDERPACK" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +// Non-volatile memory config +#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 + +// Putting the entire flash sector in the NVM byte array buffer +// would take up too much RAM. This limits how much of the sector we use. +#define NVM_BYTEARRAY_BUFFER_SIZE 512 + +// Flash config +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) +#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) + +#define BOARD_OSC_DIV (24) +#define BOARD_OVERWRITE_SWD (1) +#define BOARD_NO_VBUS_SENSE (1) + +// Status LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA02) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk new file mode 100644 index 0000000000000..6fcaae6ab0ac9 --- /dev/null +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -0,0 +1,20 @@ +USB_VID = 0x239A +USB_PID = 0x806A +USB_PRODUCT = "Thunderpack STM32F411" +USB_MANUFACTURER = "Jeremy Gillick" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +CIRCUITPY_NVM = 1 + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_nvm_FLASH.ld +STARTUP_FILE = startup_stm32f411xe.s + + diff --git a/ports/stm/boards/thunderpack/pins.c b/ports/stm/boards/thunderpack/pins.c new file mode 100644 index 0000000000000..559d9658e705c --- /dev/null +++ b/ports/stm/boards/thunderpack/pins.c @@ -0,0 +1,34 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB04) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/thunderpack/stm32f4xx_hal_conf.h b/ports/stm/boards/thunderpack/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000000..5cb5634223585 --- /dev/null +++ b/ports/stm/boards/thunderpack/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/common-hal/analogio/AnalogIn.c b/ports/stm/common-hal/analogio/AnalogIn.c new file mode 100644 index 0000000000000..1d1b308b66529 --- /dev/null +++ b/ports/stm/common-hal/analogio/AnalogIn.c @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/analogio/AnalogIn.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4xx_ll_gpio.h" +#include "stm32f4xx_ll_adc.h" +#include "stm32f4xx_ll_bus.h" + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, + const mcu_pin_obj_t *pin) { + + // No ADC function on pin + if (pin->adc_unit == 0x00) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + // TODO: add ADC traits to structure? + + // Note that ADC2 is always bundled pin-to-pin with ADC1 if it exists, and used only + // for dual conversion. For this basic application it is never used. + LL_GPIO_SetPinMode(pin_port(pin->port), (uint32_t)pin_mask(pin->number), LL_GPIO_MODE_ANALOG); + if (pin->adc_unit & 0x01) { + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1); + } else if (pin->adc_unit == 0x04) { + #ifdef LL_APB2_GRP1_PERIPH_ADC3 + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC3); + #endif + } else { + mp_raise_ValueError(translate("Invalid ADC Unit value")); + } + claim_pin(pin); + self->pin = pin; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + reset_pin_number(self->pin->port,self->pin->number); + self->pin = NULL; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + // Something else might have used the ADC in a different way, + // so we completely re-initialize it. + ADC_TypeDef * ADCx; + + if(self->pin->adc_unit & 0x01) { + ADCx = ADC1; + } else if (self->pin->adc_unit == 0x04) { + #ifdef ADC3 + ADCx = ADC3; + #endif + } else { + mp_raise_ValueError(translate("Invalid ADC Unit value")); + } + + LL_GPIO_SetPinMode(pin_port(self->pin->port), (uint32_t)pin_mask(self->pin->number), LL_GPIO_MODE_ANALOG); + //LL_GPIO_PIN_0 + + //HAL Implementation + ADC_HandleTypeDef AdcHandle; + ADC_ChannelConfTypeDef sConfig; + + AdcHandle.Instance = ADCx; + AdcHandle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; + AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; + AdcHandle.Init.ScanConvMode = DISABLE; + AdcHandle.Init.ContinuousConvMode = DISABLE; + AdcHandle.Init.DiscontinuousConvMode = DISABLE; + AdcHandle.Init.NbrOfDiscConversion = 0; + AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; + AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + AdcHandle.Init.NbrOfConversion = 1; + AdcHandle.Init.DMAContinuousRequests = DISABLE; + AdcHandle.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + HAL_ADC_Init(&AdcHandle); + + sConfig.Channel = (uint32_t)self->pin->adc_channel; //ADC_CHANNEL_0 <-normal iteration, not mask + sConfig.Rank = 1; + sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES; //Taken from micropython + HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + + HAL_ADC_Start(&AdcHandle); + HAL_ADC_PollForConversion(&AdcHandle,1); + uint16_t value = (uint16_t)HAL_ADC_GetValue(&AdcHandle); + HAL_ADC_Stop(&AdcHandle); + + // // Shift the value to be 16 bit. + return value << 4; +} + +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 3.3f; +} diff --git a/ports/stm/common-hal/analogio/AnalogIn.h b/ports/stm/common-hal/analogio/AnalogIn.h new file mode 100644 index 0000000000000..910092897e4a8 --- /dev/null +++ b/ports/stm/common-hal/analogio/AnalogIn.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t * pin; +} analogio_analogin_obj_t; + +static inline uint8_t stm32_adc_units(uint8_t adc_packed) { + return adc_packed >> 5; +} + +static inline uint8_t stm32_adc_channel(uint8_t adc_packed) { + return adc_packed & 0x1f; +} + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/stm/common-hal/analogio/AnalogOut.c b/ports/stm/common-hal/analogio/AnalogOut.c new file mode 100644 index 0000000000000..2ea969f5038f7 --- /dev/null +++ b/ports/stm/common-hal/analogio/AnalogOut.c @@ -0,0 +1,124 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019, Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" + +//DAC is shared between both channels. +#if HAS_DAC +DAC_HandleTypeDef handle; +#endif + +STATIC bool dac_on[2]; + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, + const mcu_pin_obj_t *pin) { + #if !(HAS_DAC) + mp_raise_ValueError(translate("No DAC on chip")); + #else + if (pin == &pin_PA04) { + self->channel = DAC_CHANNEL_1; + self->dac_index = 0; + } else if (pin == &pin_PA05) { + self->channel = DAC_CHANNEL_2; + self->dac_index = 1; + } else { + mp_raise_ValueError(translate("Invalid DAC pin supplied")); + } + + //Only init if the shared DAC is empty or reset + if (handle.Instance == NULL || handle.State == HAL_DAC_STATE_RESET) { + __HAL_RCC_DAC_CLK_ENABLE(); + handle.Instance = DAC; + if (HAL_DAC_Init(&handle) != HAL_OK) + { + mp_raise_ValueError(translate("DAC Device Init Error")); + } + } + + //init channel specific pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + + self->ch_handle.DAC_Trigger = DAC_TRIGGER_NONE; + self->ch_handle.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; + if (HAL_DAC_ConfigChannel(&handle, &self->ch_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("DAC Channel Init Error")); + } + + dac_on[self->dac_index] = true; + self->pin = pin; + claim_pin(pin); + #endif +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return !dac_on[self->dac_index]; +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { + #if HAS_DAC + reset_pin_number(self->pin->port,self->pin->number); + self->pin = NULL; + dac_on[self->dac_index] = false; + + //turn off the DAC if both channels are off + if(dac_on[0] == false && dac_on[1] == false) { + __HAL_RCC_DAC_CLK_DISABLE(); + HAL_DAC_DeInit(&handle); + } + #endif +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, + uint16_t value) { + #if HAS_DAC + HAL_DAC_SetValue(&handle, self->channel, DAC_ALIGN_12B_R, value >> 4); + HAL_DAC_Start(&handle, self->channel); + #endif +} + +void analogout_reset(void) { + #if HAS_DAC + __HAL_RCC_DAC_CLK_DISABLE(); + HAL_DAC_DeInit(&handle); + #endif +} diff --git a/ports/stm/common-hal/analogio/AnalogOut.h b/ports/stm/common-hal/analogio/AnalogOut.h new file mode 100644 index 0000000000000..61591d0e6569c --- /dev/null +++ b/ports/stm/common-hal/analogio/AnalogOut.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +typedef struct { + mp_obj_base_t base; +#if HAS_DAC + DAC_ChannelConfTypeDef ch_handle; +#endif + const mcu_pin_obj_t * pin; + uint8_t channel; + uint8_t dac_index:1; +} analogio_analogout_obj_t; + +void analogout_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/stm/common-hal/analogio/__init__.c b/ports/stm/common-hal/analogio/__init__.c new file mode 100644 index 0000000000000..eea58c77d6315 --- /dev/null +++ b/ports/stm/common-hal/analogio/__init__.c @@ -0,0 +1 @@ +// No analogio module functions. diff --git a/ports/stm/common-hal/board/__init__.c b/ports/stm/common-hal/board/__init__.c new file mode 100644 index 0000000000000..880033ed67964 --- /dev/null +++ b/ports/stm/common-hal/board/__init__.c @@ -0,0 +1,25 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ diff --git a/ports/stm/common-hal/busio/I2C.c b/ports/stm/common-hal/busio/I2C.c new file mode 100644 index 0000000000000..8e98b966d2414 --- /dev/null +++ b/ports/stm/common-hal/busio/I2C.c @@ -0,0 +1,250 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include + +#include "shared-bindings/busio/I2C.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "stm32f4xx_hal.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/translate.h" +#include "common-hal/microcontroller/Pin.h" + +//arrays use 0 based numbering: I2C1 is stored at index 0 +#define MAX_I2C 3 +STATIC bool reserved_i2c[MAX_I2C]; +STATIC bool never_reset_i2c[MAX_I2C]; + +#define ALL_CLOCKS 0xFF +STATIC void i2c_clock_enable(uint8_t mask); +STATIC void i2c_clock_disable(uint8_t mask); + +void i2c_reset(void) { + uint16_t never_reset_mask = 0x00; + for(int i = 0; i < MAX_I2C; i++) { + if (!never_reset_i2c[i]) { + reserved_i2c[i] = false; + } else { + never_reset_mask |= 1 << i; + } + } + i2c_clock_disable(ALL_CLOCKS & ~(never_reset_mask)); +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency, uint32_t timeout) { + + //match pins to I2C objects + I2C_TypeDef * I2Cx; + uint8_t sda_len = MP_ARRAY_SIZE(mcu_i2c_sda_list); + uint8_t scl_len = MP_ARRAY_SIZE(mcu_i2c_scl_list); + bool i2c_taken = false; + + for (uint i = 0; i < sda_len; i++) { + if (mcu_i2c_sda_list[i].pin == sda) { + for (uint j = 0; j < scl_len; j++) { + if ((mcu_i2c_scl_list[j].pin == scl) + && (mcu_i2c_scl_list[j].i2c_index == mcu_i2c_sda_list[i].i2c_index)) { + //keep looking if the I2C is taken, could be another SCL that works + if (reserved_i2c[mcu_i2c_scl_list[i].i2c_index - 1]) { + i2c_taken = true; + continue; + } + self->scl = &mcu_i2c_scl_list[j]; + self->sda = &mcu_i2c_sda_list[i]; + break; + } + } + } + } + + //handle typedef selection, errors + if (self->sda != NULL && self->scl != NULL ) { + I2Cx = mcu_i2c_banks[self->sda->i2c_index - 1]; + } else { + if (i2c_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid I2C pin selection")); + } + } + + //Start GPIO for each pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(sda->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = self->sda->altfn_index; + HAL_GPIO_Init(pin_port(sda->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(scl->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = self->scl->altfn_index; + HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); + + //Note: due to I2C soft reboot issue, do not relocate clock init. + i2c_clock_enable(1 << (self->sda->i2c_index - 1)); + reserved_i2c[self->sda->i2c_index - 1] = true; + + self->handle.Instance = I2Cx; + self->handle.Init.ClockSpeed = 100000; + self->handle.Init.DutyCycle = I2C_DUTYCYCLE_2; + self->handle.Init.OwnAddress1 = 0; + self->handle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + self->handle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + self->handle.Init.OwnAddress2 = 0; + self->handle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + self->handle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + self->handle.State = HAL_I2C_STATE_RESET; + if (HAL_I2C_Init(&(self->handle)) != HAL_OK) { + mp_raise_RuntimeError(translate("I2C Init Error")); + } + claim_pin(sda); + claim_pin(scl); +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { + if (self->handle.Instance == mcu_i2c_banks[i]) { + never_reset_i2c[i] = true; + + never_reset_pin_number(self->scl->pin->port, self->scl->pin->number); + never_reset_pin_number(self->sda->pin->port, self->sda->pin->number); + break; + } + } +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->sda == NULL; +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + i2c_clock_disable(1 << (self->sda->i2c_index - 1)); + reserved_i2c[self->sda->i2c_index - 1] = false; + never_reset_i2c[self->sda->i2c_index - 1] = false; + + reset_pin_number(self->sda->pin->port,self->sda->pin->number); + reset_pin_number(self->scl->pin->port,self->scl->pin->number); + self->sda = NULL; + self->scl = NULL; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + return HAL_I2C_IsDeviceReady(&(self->handle), (uint16_t)(addr << 1), 2, 2) == HAL_OK; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; + + //Critical section code that may be required at some point. + // uint32_t store_primask = __get_PRIMASK(); + // __disable_irq(); + // __DMB(); + + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + + // __DMB(); + // __set_PRIMASK(store_primask); + + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, + const uint8_t *data, size_t len, bool transmit_stop_bit) { + HAL_StatusTypeDef result = HAL_I2C_Master_Transmit(&(self->handle), (uint16_t)(addr << 1), + (uint8_t *)data, (uint16_t)len, 500); + return result == HAL_OK ? 0 : MP_EIO; +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, + uint8_t *data, size_t len) { + return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 500) + == HAL_OK ? 0 : MP_EIO; +} + +STATIC void i2c_clock_enable(uint8_t mask) { + //Note: hard reset required due to soft reboot issue. + #ifdef I2C1 + if (mask & (1 << 0)) { + __HAL_RCC_I2C1_CLK_ENABLE(); + __HAL_RCC_I2C1_FORCE_RESET(); + __HAL_RCC_I2C1_RELEASE_RESET(); + } + #endif + #ifdef I2C2 + if (mask & (1 << 1)) { + __HAL_RCC_I2C2_CLK_ENABLE(); + __HAL_RCC_I2C2_FORCE_RESET(); + __HAL_RCC_I2C2_RELEASE_RESET(); + } + #endif + #ifdef I2C3 + if (mask & (1 << 2)) { + __HAL_RCC_I2C3_CLK_ENABLE(); + __HAL_RCC_I2C3_FORCE_RESET(); + __HAL_RCC_I2C3_RELEASE_RESET(); + } + #endif +} + +STATIC void i2c_clock_disable(uint8_t mask) { + #ifdef I2C1 + if (mask & (1 << 0)) { + __HAL_RCC_I2C1_CLK_DISABLE(); + } + #endif + #ifdef I2C2 + if (mask & (1 << 1)) { + __HAL_RCC_I2C2_CLK_DISABLE(); + } + #endif + #ifdef I2C3 + if (mask & (1 << 2)) { + __HAL_RCC_I2C3_CLK_DISABLE(); + } + #endif +} diff --git a/ports/stm/common-hal/busio/I2C.h b/ports/stm/common-hal/busio/I2C.h new file mode 100644 index 0000000000000..b5c891a98d10f --- /dev/null +++ b/ports/stm/common-hal/busio/I2C.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + I2C_HandleTypeDef handle; + bool has_lock; + const mcu_i2c_scl_obj_t *scl; + const mcu_i2c_sda_obj_t *sda; +} busio_i2c_obj_t; + +void i2c_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/stm/common-hal/busio/OneWire.h b/ports/stm/common-hal/busio/OneWire.h new file mode 100644 index 0000000000000..6e8c829793a26 --- /dev/null +++ b/ports/stm/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c new file mode 100644 index 0000000000000..7e25e0a5719f3 --- /dev/null +++ b/ports/stm/common-hal/busio/SPI.c @@ -0,0 +1,470 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include + +#include "shared-bindings/busio/SPI.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "stm32f4xx_hal.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "boards/board.h" +#include "supervisor/shared/translate.h" +#include "common-hal/microcontroller/Pin.h" + +// Note that any bugs introduced in this file can cause crashes at startup +// for chips using external SPI flash. + +//arrays use 0 based numbering: SPI1 is stored at index 0 +#define MAX_SPI 6 +STATIC bool reserved_spi[MAX_SPI]; +STATIC bool never_reset_spi[MAX_SPI]; + +#define ALL_CLOCKS 0xFF +STATIC void spi_clock_enable(uint8_t mask); +STATIC void spi_clock_disable(uint8_t mask); + +STATIC uint32_t get_busclock(SPI_TypeDef * instance) { + //SPI2 and 3 are on PCLK1, if they exist. + #ifdef SPI2 + if (instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + #endif + #ifdef SPI3 + if (instance == SPI3) return HAL_RCC_GetPCLK1Freq(); + #endif + return HAL_RCC_GetPCLK2Freq(); +} + +STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, uint32_t busclock) { + static const uint32_t baud_map[8][2] = { + {2,SPI_BAUDRATEPRESCALER_2}, + {4,SPI_BAUDRATEPRESCALER_4}, + {8,SPI_BAUDRATEPRESCALER_8}, + {16,SPI_BAUDRATEPRESCALER_16}, + {32,SPI_BAUDRATEPRESCALER_32}, + {64,SPI_BAUDRATEPRESCALER_64}, + {128,SPI_BAUDRATEPRESCALER_128}, + {256,SPI_BAUDRATEPRESCALER_256} + }; + size_t i = 0; + uint16_t divisor; + do { + divisor = baud_map[i][0]; + if (baudrate >= (busclock/divisor)) { + *prescaler = divisor; + return baud_map[i][1]; + } + i++; + } while (divisor != 256); + //only gets here if requested baud is lower than minimum + *prescaler = 256; + return SPI_BAUDRATEPRESCALER_256; +} + +void spi_reset(void) { + uint16_t never_reset_mask = 0x00; + for (int i = 0; i < MAX_SPI; i++) { + if (!never_reset_spi[i]) { + reserved_spi[i] = false; + } else { + never_reset_mask |= 1 << i; + } + } + spi_clock_disable(ALL_CLOCKS & ~(never_reset_mask)); +} + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t * sck, const mcu_pin_obj_t * mosi, + const mcu_pin_obj_t * miso) { + + //match pins to SPI objects + SPI_TypeDef * SPIx; + + uint8_t sck_len = MP_ARRAY_SIZE(mcu_spi_sck_list); + uint8_t mosi_len = MP_ARRAY_SIZE(mcu_spi_mosi_list); + uint8_t miso_len = MP_ARRAY_SIZE(mcu_spi_miso_list); + bool spi_taken = false; + + //SCK is not optional. MOSI and MISO are + for (uint i = 0; i < sck_len; i++) { + if (mcu_spi_sck_list[i].pin == sck) { + //if both MOSI and MISO exist, loop search normally + if ((mosi != NULL) && (miso != NULL)) { + //MOSI + for (uint j = 0; j < mosi_len; j++) { + if (mcu_spi_mosi_list[j].pin == mosi) { + //MISO + for (uint k = 0; k < miso_len; k++) { + if ((mcu_spi_miso_list[k].pin == miso) //everything needs the same index + && (mcu_spi_sck_list[i].spi_index == mcu_spi_mosi_list[j].spi_index) + && (mcu_spi_sck_list[i].spi_index == mcu_spi_miso_list[k].spi_index)) { + //keep looking if the SPI is taken, edge case + if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + spi_taken = true; + continue; + } + //store pins if not + self->sck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = &mcu_spi_miso_list[k]; + break; + } + } + } + } + // if just MISO, reduce search + } else if (miso != NULL) { + for (uint j = 0; j < miso_len; j++) { + if ((mcu_spi_miso_list[j].pin == miso) //only SCK and MISO need the same index + && (mcu_spi_sck_list[i].spi_index == mcu_spi_miso_list[j].spi_index)) { + //keep looking if the SPI is taken, edge case + if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + spi_taken = true; + continue; + } + //store pins if not + self->sck = &mcu_spi_sck_list[i]; + self->mosi = NULL; + self->miso = &mcu_spi_miso_list[j]; + break; + } + } + // if just MOSI, reduce search + } else if (mosi != NULL) { + for (uint j = 0; j < mosi_len; j++) { + if ((mcu_spi_mosi_list[j].pin == mosi) //only SCK and MOSI need the same index + && (mcu_spi_sck_list[i].spi_index == mcu_spi_mosi_list[j].spi_index)) { + //keep looking if the SPI is taken, edge case + if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + spi_taken = true; + continue; + } + //store pins if not + self->sck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = NULL; + break; + } + } + } else { + //throw an error immediately + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); + } + } + } + + //handle typedef selection, errors + if ( (self->sck != NULL && self->mosi != NULL && self->miso != NULL) || + (self->sck != NULL && self->mosi != NULL && miso == NULL) || + (self->sck != NULL && self->miso != NULL && mosi == NULL)) { + SPIx = mcu_spi_banks[self->sck->spi_index - 1]; + } else { + if (spi_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid SPI pin selection")); + } + } + + //Start GPIO for each pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(sck->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->sck->altfn_index; + HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); + + if (self->mosi != NULL) { + GPIO_InitStruct.Pin = pin_mask(mosi->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->mosi->altfn_index; + HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + } + + if (self->miso != NULL) { + GPIO_InitStruct.Pin = pin_mask(miso->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->miso->altfn_index; + HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + } + + spi_clock_enable(1 << (self->sck->spi_index - 1)); + reserved_spi[self->sck->spi_index - 1] = true; + + self->handle.Instance = SPIx; + self->handle.Init.Mode = SPI_MODE_MASTER; + // Direction change only required for RX-only, see RefMan RM0090:884 + self->handle.Init.Direction = (self->mosi == NULL) ? SPI_CR1_RXONLY : SPI_DIRECTION_2LINES; + self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + self->handle.Init.NSS = SPI_NSS_SOFT; + self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; + self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; + self->handle.Init.TIMode = SPI_TIMODE_DISABLE; + self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + self->handle.Init.CRCPolynomial = 10; + if (HAL_SPI_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("SPI Init Error")); + } + self->baudrate = (get_busclock(SPIx) / 16); + self->prescaler = 16; + self->polarity = 0; + self->phase = 0; + self->bits = 8; + + claim_pin(sck); + if (self->mosi != NULL) { + claim_pin(mosi); + } + if (self->miso != NULL) { + claim_pin(miso); + } +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + if (mcu_spi_banks[i] == self->handle.Instance) { + never_reset_spi[i] = true; + never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); + if (self->mosi != NULL) { + never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + } + if (self->miso != NULL) { + never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + } + break; + } + } +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->sck->pin == NULL; +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + spi_clock_disable(1<<(self->sck->spi_index - 1)); + reserved_spi[self->sck->spi_index - 1] = false; + never_reset_spi[self->sck->spi_index - 1] = false; + + reset_pin_number(self->sck->pin->port,self->sck->pin->number); + if (self->mosi != NULL) { + reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + } + if (self->miso != NULL) { + reset_pin_number(self->miso->pin->port,self->miso->pin->number); + } + self->sck = NULL; + self->mosi = NULL; + self->miso = NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + //This resets the SPI, so check before updating it redundantly + if (baudrate == self->baudrate && polarity== self->polarity + && phase == self->phase && bits == self->bits) { + return true; + } + + //Deinit SPI + HAL_SPI_DeInit(&self->handle); + + self->handle.Init.DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT; + self->handle.Init.CLKPolarity = (polarity) ? SPI_POLARITY_HIGH : SPI_POLARITY_LOW; + self->handle.Init.CLKPhase = (phase) ? SPI_PHASE_2EDGE : SPI_PHASE_1EDGE; + + self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler, + get_busclock(self->handle.Instance)); + + if (HAL_SPI_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("SPI Re-initialization error")); + } + + self->baudrate = baudrate; + self->polarity = polarity; + self->phase = phase; + self->bits = bits; + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; + + //Critical section code that may be required at some point. + // uint32_t store_primask = __get_PRIMASK(); + // __disable_irq(); + // __DMB(); + + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + + // __DMB(); + // __set_PRIMASK(store_primask); + + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, + const uint8_t *data, size_t len) { + if (self->mosi == NULL) { + mp_raise_ValueError(translate("No MOSI Pin")); + } + HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); + return result == HAL_OK; +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, + uint8_t *data, size_t len, uint8_t write_value) { + if (self->miso == NULL) { + mp_raise_ValueError(translate("No MISO Pin")); + } + HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); + return result == HAL_OK; +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, + uint8_t *data_out, uint8_t *data_in, size_t len) { + if (self->miso == NULL || self->mosi == NULL) { + mp_raise_ValueError(translate("Missing MISO or MOSI Pin")); + } + HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, + data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); + return result == HAL_OK; +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { + //returns actual frequency + uint32_t result = HAL_RCC_GetPCLK2Freq()/self->prescaler; + return result; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return self->phase; +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return self->polarity; +} + +STATIC void spi_clock_enable(uint8_t mask) { + #ifdef SPI1 + if (mask & (1 << 0)) { + __HAL_RCC_SPI1_CLK_ENABLE(); + } + #endif + #ifdef SPI2 + if (mask & (1 << 1)) { + __HAL_RCC_SPI2_CLK_ENABLE(); + } + #endif + #ifdef SPI3 + if (mask & (1 << 2)) { + __HAL_RCC_SPI3_CLK_ENABLE(); + } + #endif + #ifdef SPI4 + if (mask & (1 << 3)) { + __HAL_RCC_SPI4_CLK_ENABLE(); + } + #endif + #ifdef SPI5 + if (mask & (1 << 4)) { + __HAL_RCC_SPI5_CLK_ENABLE(); + } + #endif + #ifdef SPI6 + if (mask & (1 << 5)) { + __HAL_RCC_SPI6_CLK_ENABLE(); + } + #endif +} + +STATIC void spi_clock_disable(uint8_t mask) { + #ifdef SPI1 + if (mask & (1 << 0)) { + __HAL_RCC_SPI1_CLK_DISABLE(); + __HAL_RCC_SPI1_FORCE_RESET(); + __HAL_RCC_SPI1_RELEASE_RESET(); + } + #endif + #ifdef SPI2 + if (mask & (1 << 1)) { + __HAL_RCC_SPI2_CLK_DISABLE(); + __HAL_RCC_SPI2_FORCE_RESET(); + __HAL_RCC_SPI2_RELEASE_RESET(); + } + #endif + #ifdef SPI3 + if (mask & (1 << 2)) { + __HAL_RCC_SPI3_CLK_DISABLE(); + __HAL_RCC_SPI3_FORCE_RESET(); + __HAL_RCC_SPI3_RELEASE_RESET(); + } + #endif + #ifdef SPI4 + if (mask & (1 << 3)) { + __HAL_RCC_SPI4_CLK_DISABLE(); + __HAL_RCC_SPI4_FORCE_RESET(); + __HAL_RCC_SPI4_RELEASE_RESET(); + } + #endif + #ifdef SPI5 + if (mask & (1 << 4)) { + __HAL_RCC_SPI5_CLK_DISABLE(); + __HAL_RCC_SPI5_FORCE_RESET(); + __HAL_RCC_SPI5_RELEASE_RESET(); + } + #endif + #ifdef SPI6 + if (mask & (1 << 5)) { + __HAL_RCC_SPI6_CLK_DISABLE(); + __HAL_RCC_SPI6_FORCE_RESET(); + __HAL_RCC_SPI6_RELEASE_RESET(); + } + #endif +} diff --git a/ports/stm/common-hal/busio/SPI.h b/ports/stm/common-hal/busio/SPI.h new file mode 100644 index 0000000000000..067d2fcb65d15 --- /dev/null +++ b/ports/stm/common-hal/busio/SPI.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + SPI_HandleTypeDef handle; + bool has_lock; + const mcu_spi_sck_obj_t *sck; + const mcu_spi_mosi_obj_t *mosi; + const mcu_spi_miso_obj_t *miso; + const mcu_spi_nss_obj_t *nss; + uint32_t baudrate; + uint16_t prescaler; + uint8_t polarity; + uint8_t phase; + uint8_t bits; +} busio_spi_obj_t; + +void spi_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c new file mode 100644 index 0000000000000..0b434fd0236d0 --- /dev/null +++ b/ports/stm/common-hal/busio/UART.c @@ -0,0 +1,626 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/busio/UART.h" + +#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "supervisor/shared/translate.h" + +#include "tick.h" +#include "stm32f4xx_hal.h" + +#define ALL_UARTS 0xFFFF + +//arrays use 0 based numbering: UART1 is stored at index 0 +STATIC bool reserved_uart[MAX_UART]; +int errflag; //Used to restart read halts + +STATIC void uart_clock_enable(uint16_t mask); +STATIC void uart_clock_disable(uint16_t mask); +STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); + +STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, + int uart_index, bool uart_taken) { + if (pin_eval) { + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[uart_index] = self; + return mcu_uart_banks[uart_index]; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware in use, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } +} + +void uart_reset(void) { + for (uint8_t i = 0; i < MAX_UART; i++) { + reserved_uart[i] = false; + MP_STATE_PORT(cpy_uart_obj_all)[i] = NULL; + } + uart_clock_disable(ALL_UARTS); +} + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + + //match pins to UART objects + USART_TypeDef * USARTx; + + uint8_t tx_len = MP_ARRAY_SIZE(mcu_uart_tx_list); + uint8_t rx_len = MP_ARRAY_SIZE(mcu_uart_rx_list); + bool uart_taken = false; + uint8_t uart_index = 0; //origin 0 corrected + + if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert == true)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + + //Can have both pins, or either + if ((tx != NULL) && (rx != NULL)) { + //normal find loop if both pins exist + for (uint i = 0; i < tx_len; i++) { + if (mcu_uart_tx_list[i].pin == tx) { + //rx + for (uint j = 0; j < rx_len; j++) { + if (mcu_uart_rx_list[j].pin == rx + && mcu_uart_rx_list[j].uart_index == mcu_uart_tx_list[i].uart_index) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->tx = &mcu_uart_tx_list[i]; + self->rx = &mcu_uart_rx_list[j]; + break; + } + } + } + } + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL && self->rx != NULL), + uart_index, uart_taken); + } else if (tx == NULL) { + //If there is no tx, run only rx + for (uint i = 0; i < rx_len; i++) { + if (mcu_uart_rx_list[i].pin == rx) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_rx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->rx = &mcu_uart_rx_list[i]; + break; + } + } + uart_index = self->rx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->rx != NULL), + uart_index, uart_taken); + } else if (rx == NULL) { + //If there is no rx, run only tx + for (uint i = 0; i < tx_len; i++) { + if (mcu_uart_tx_list[i].pin == tx) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->tx = &mcu_uart_tx_list[i]; + break; + } + } + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL), + uart_index, uart_taken); + } else { + //both pins cannot be empty + mp_raise_ValueError(translate("Supply at least one UART pin")); + } + + //Other errors + if ( receiver_buffer_size == 0 ) { + mp_raise_ValueError(translate("Invalid buffer size")); + } + if ( bits != 8 && bits != 9 ) { + mp_raise_ValueError(translate("Invalid word/bit length")); + } + if ( USARTx == NULL) { //this can only be hit if the periph file is wrong + mp_raise_ValueError(translate("Internal define error")); + } + + //GPIO Init + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if (self->tx != NULL) { + GPIO_InitStruct.Pin = pin_mask(tx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->tx->altfn_index; + HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); + } + if (self->rx != NULL) { + GPIO_InitStruct.Pin = pin_mask(rx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->rx->altfn_index; + HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + } + + //reserve uart and enable the peripheral + reserved_uart[uart_index] = true; + uart_clock_enable(1 << (uart_index)); + uart_assign_irq(self, USARTx); + + self->handle.Instance = USARTx; + self->handle.Init.BaudRate = baudrate; + self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B; + self->handle.Init.StopBits = (stop > 1) ? UART_STOPBITS_2 : UART_STOPBITS_1; + self->handle.Init.Parity = (parity == PARITY_ODD) ? UART_PARITY_ODD : + (parity == PARITY_EVEN) ? UART_PARITY_EVEN : + UART_PARITY_NONE; + self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX : + (self->tx != NULL) ? UART_MODE_TX : + UART_MODE_RX; + self->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + self->handle.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("UART Init Error")); + + } + + // Init buffer for rx and claim pins + if (self->rx != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + if (!self->rbuf.buf) { + mp_raise_ValueError(translate("UART Buffer allocation error")); + } + claim_pin(rx); + } + if (self->tx != NULL) { + claim_pin(tx); + } + self->baudrate = baudrate; + self->timeout_ms = timeout * 1000; + + //start the interrupt series + if ((HAL_UART_GetState(&self->handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + mp_raise_ValueError(translate("Could not start interrupt, RX busy")); + } + + //start the receive interrupt chain + HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); + HAL_NVIC_EnableIRQ(self->irq); + + errflag = HAL_OK; +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return self->tx->pin == NULL; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) return; + + reset_pin_number(self->tx->pin->port,self->tx->pin->number); + reset_pin_number(self->rx->pin->port,self->rx->pin->number); + self->tx = NULL; + self->rx = NULL; + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; +} + +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (self->rx == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + + size_t rx_bytes = 0; + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout, same as nrf + while ( (ringbuf_count(&self->rbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + //restart if it failed in the callback + if (errflag != HAL_OK) { + errflag = HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + } + // Allow user to break out of a timeout with a KeyboardInterrupt. + if ( mp_hal_is_interrupted() ) { + return 0; + } + } + + // Halt reception + HAL_NVIC_DisableIRQ(self->irq); + // copy received data + rx_bytes = ringbuf_count(&self->rbuf); + rx_bytes = MIN(rx_bytes, len); + for (uint16_t i = 0; i < rx_bytes; i++) { + data[i] = ringbuf_get(&self->rbuf); + } + HAL_NVIC_EnableIRQ(self->irq); + + if (rx_bytes == 0) { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + return rx_bytes; +} + +// Write characters. +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + bool write_err = false; //write error shouldn't disable interrupts + + HAL_NVIC_DisableIRQ(self->irq); + if (HAL_UART_Transmit(&self->handle, (uint8_t*)data, len, HAL_MAX_DELAY) != HAL_OK) { + write_err = true; + } + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_EnableIRQ(self->irq); + + if (write_err) { + mp_raise_ValueError(translate("UART write error")); + } + return len; +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) +{ + for (int i = 0; i < 7; i++) { + //get context pointer and cast it as struct pointer + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if (handle == &context->handle) { + //check if transaction is ongoing + if ((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + return; + } + ringbuf_put_n(&context->rbuf, &context->rx_char, 1); + errflag = HAL_UART_Receive_IT(handle, &context->rx_char, 1); + + return; + } + } +} + +void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) +{ + if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_PE) != RESET) { + __HAL_UART_CLEAR_PEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_FE) != RESET) { + __HAL_UART_CLEAR_FEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_NE) != RESET) { + __HAL_UART_CLEAR_NEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_ORE) != RESET) { + __HAL_UART_CLEAR_OREFLAG(UartHandle); + } + //restart serial read after an error + for (int i = 0; i < 7; i++) { + busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if (UartHandle == &context->handle) { + HAL_UART_Receive_IT(UartHandle, &context->rx_char, 1); + return; + } + } + +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + //Don't reset if it's the same value + if (baudrate == self->baudrate) return; + + //Otherwise de-init and set new rate + if (HAL_UART_DeInit(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART De-init error")); + } + self->handle.Init.BaudRate = baudrate; + if (HAL_UART_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART Re-init error")); + } + + self->baudrate = baudrate; +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + return ringbuf_count(&self->rbuf); +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + // Halt reception + HAL_NVIC_DisableIRQ(self->irq); + ringbuf_clear(&self->rbuf); + HAL_NVIC_EnableIRQ(self->irq); +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + return __HAL_UART_GET_FLAG(&self->handle, UART_FLAG_TXE); +} + +STATIC void call_hal_irq(int uart_num) { + //Create casted context pointer + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[uart_num - 1]; + if (context != NULL) { + HAL_NVIC_ClearPendingIRQ(context->irq); + HAL_UART_IRQHandler(&context->handle); + } +} + +// UART/USART IRQ handlers +void USART1_IRQHandler(void) { + call_hal_irq(1); +} + +void USART2_IRQHandler(void) { + call_hal_irq(2); +} + +void USART3_IRQHandler(void) { + call_hal_irq(3); +} + +void UART4_IRQHandler(void) { + call_hal_irq(4); +} + +void UART5_IRQHandler(void) { + call_hal_irq(5); +} + +void USART6_IRQHandler(void) { + call_hal_irq(6); +} + +STATIC void uart_clock_enable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_ENABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_ENABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_ENABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_ENABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_ENABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_ENABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_ENABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_ENABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_ENABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_ENABLE(); + } + #endif +} + +STATIC void uart_clock_disable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_DISABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_DISABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_DISABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_DISABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_DISABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_DISABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_DISABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_DISABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_DISABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_DISABLE(); + } + #endif +} + +STATIC void uart_assign_irq(busio_uart_obj_t *self, USART_TypeDef * USARTx) { + #ifdef USART1 + if (USARTx == USART1) { + self->irq = USART1_IRQn; + } + #endif + #ifdef USART2 + if (USARTx == USART2) { + self->irq = USART2_IRQn; + } + #endif + #ifdef USART3 + if (USARTx == USART3) { + self->irq = USART3_IRQn; + } + #endif + #ifdef UART4 + if (USARTx == UART4) { + self->irq = UART4_IRQn; + } + #endif + #ifdef UART5 + if (USARTx == UART5) { + self->irq = UART5_IRQn; + } + #endif + #ifdef USART6 + if (USARTx == USART6) { + self->irq = USART6_IRQn; + } + #endif + #ifdef UART7 + if (USARTx == UART7) { + self->irq = UART7_IRQn; + } + #endif + #ifdef UART8 + if (USARTx == UART8) { + self->irq = UART8_IRQn; + } + #endif + #ifdef UART9 + if (USARTx == UART9) { + self->irq = UART9_IRQn; + } + #endif + #ifdef UART10 + if (USARTx == UART10) { + self->irq = UART10_IRQn; + } + #endif +} diff --git a/ports/stm/common-hal/busio/UART.h b/ports/stm/common-hal/busio/UART.h new file mode 100644 index 0000000000000..cde5fadd00b50 --- /dev/null +++ b/ports/stm/common-hal/busio/UART.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H + +#include "common-hal/microcontroller/Pin.h" +#include "stm32f4/periph.h" +#include "stm32f4xx_hal.h" + +#include "py/obj.h" +#include "py/ringbuf.h" + +#ifndef UART_IRQPRI +#define UART_IRQPRI 1 +#endif +#ifndef UART_IRQSUB_PRI +#define UART_IRQSUB_PRI 0 +#endif + +typedef struct { + mp_obj_base_t base; + UART_HandleTypeDef handle; + IRQn_Type irq; + const mcu_uart_tx_obj_t *tx; + const mcu_uart_rx_obj_t *rx; + + ringbuf_t rbuf; + uint8_t rx_char; + + uint32_t baudrate; + uint32_t timeout_ms; +} busio_uart_obj_t; + +void uart_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm/common-hal/busio/__init__.c b/ports/stm/common-hal/busio/__init__.c new file mode 100644 index 0000000000000..41761b6743aea --- /dev/null +++ b/ports/stm/common-hal/busio/__init__.c @@ -0,0 +1 @@ +// No busio module functions. diff --git a/ports/stm/common-hal/digitalio/DigitalInOut.c b/ports/stm/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000000..be2db4dace552 --- /dev/null +++ b/ports/stm/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,160 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4xx_ll_gpio.h" + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->port, self->pin->number); +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + + claim_pin(pin); + self->pin = pin; + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(self->pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(pin_port(self->pin->port), &GPIO_InitStruct); + + return DIGITALINOUT_OK; +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + + reset_pin_number(self->pin->port, self->pin->number); + self->pin = NULL; +} + +void common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(self->pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(pin_port(self->pin->port), &GPIO_InitStruct); + + common_hal_digitalio_digitalinout_set_pull(self, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t *self, bool value, + digitalio_drive_mode_t drive_mode) { + + common_hal_digitalio_digitalinout_set_drive_mode(self, drive_mode); + common_hal_digitalio_digitalinout_set_value(self, value); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t *self) { + + return (LL_GPIO_GetPinMode(pin_port(self->pin->port), pin_mask(self->pin->number)) + == LL_GPIO_MODE_INPUT) ? DIRECTION_INPUT : DIRECTION_OUTPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t *self, bool value) { + HAL_GPIO_WritePin(pin_port(self->pin->port), pin_mask(self->pin->number), value); +} + +bool common_hal_digitalio_digitalinout_get_value( + digitalio_digitalinout_obj_t *self) { + return (LL_GPIO_GetPinMode(pin_port(self->pin->port), pin_mask(self->pin->number)) == LL_GPIO_MODE_INPUT) + ? HAL_GPIO_ReadPin(pin_port(self->pin->port), pin_mask(self->pin->number)) + : LL_GPIO_IsOutputPinSet(pin_port(self->pin->port), pin_mask(self->pin->number)); +} + +void common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t *self, + digitalio_drive_mode_t drive_mode) { + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(self->pin->number); + GPIO_InitStruct.Mode = (drive_mode == DRIVE_MODE_OPEN_DRAIN ? + GPIO_MODE_OUTPUT_OD : GPIO_MODE_OUTPUT_PP); + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(pin_port(self->pin->port), &GPIO_InitStruct); +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t *self) { + + return LL_GPIO_GetPinOutputType(pin_port(self->pin->port), pin_mask(self->pin->number)) + == LL_GPIO_OUTPUT_OPENDRAIN ? DRIVE_MODE_OPEN_DRAIN : DRIVE_MODE_PUSH_PULL; +} + +void common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + + switch (pull) { + case PULL_UP: + LL_GPIO_SetPinPull(pin_port(self->pin->port), pin_mask(self->pin->number),LL_GPIO_PULL_UP); + break; + case PULL_DOWN: + LL_GPIO_SetPinPull(pin_port(self->pin->port), pin_mask(self->pin->number),LL_GPIO_PULL_DOWN); + break; + case PULL_NONE: + LL_GPIO_SetPinPull(pin_port(self->pin->port), pin_mask(self->pin->number),LL_GPIO_PULL_NO); + break; + default: + break; + } +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t *self) { + + + switch (LL_GPIO_GetPinPull(pin_port(self->pin->port), pin_mask(self->pin->number))) { + case LL_GPIO_PULL_UP: + return PULL_UP; + case LL_GPIO_PULL_DOWN: + return PULL_DOWN; + case LL_GPIO_PULL_NO: + return PULL_NONE; + default: + return PULL_NONE; + } +} diff --git a/ports/stm/common-hal/digitalio/DigitalInOut.h b/ports/stm/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 0000000000000..76aa2c85564d2 --- /dev/null +++ b/ports/stm/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/stm/common-hal/digitalio/__init__.c b/ports/stm/common-hal/digitalio/__init__.c new file mode 100644 index 0000000000000..20fad459593ac --- /dev/null +++ b/ports/stm/common-hal/digitalio/__init__.c @@ -0,0 +1 @@ +// No digitalio module functions. diff --git a/ports/stm/common-hal/displayio/ParallelBus.c b/ports/stm/common-hal/displayio/ParallelBus.c new file mode 100644 index 0000000000000..1b808ec025e40 --- /dev/null +++ b/ports/stm/common-hal/displayio/ParallelBus.c @@ -0,0 +1,68 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "tick.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + mp_raise_NotImplementedError(translate("ParallelBus not yet supported")); +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + + return false; +} + +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + +} diff --git a/ports/stm/common-hal/displayio/ParallelBus.h b/ports/stm/common-hal/displayio/ParallelBus.h new file mode 100644 index 0000000000000..85d100715ee83 --- /dev/null +++ b/ports/stm/common-hal/displayio/ParallelBus.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000000..1d4d45b9785a0 --- /dev/null +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -0,0 +1,134 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/rgb_led_status.h" + +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4xx_hal.h" + +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif + +#if MCU_PACKAGE == 144 + #define GPIO_PORT_COUNT 7 + GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; +#elif MCU_PACKAGE == 100 + #define GPIO_PORT_COUNT 5 + GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; +#elif MCU_PACKAGE == 64 + #define GPIO_PORT_COUNT 3 + GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; +#elif MCU_PACKAGE == 48 + #define GPIO_PORT_COUNT 3 + GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; +#endif + + +STATIC uint16_t claimed_pins[GPIO_PORT_COUNT]; +STATIC uint16_t never_reset_pins[GPIO_PORT_COUNT]; + +void reset_all_pins(void) { + // Reset claimed pins + for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) { + claimed_pins[i] = never_reset_pins[i]; + } + for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) { + HAL_GPIO_DeInit(ports[i], ~never_reset_pins[i]); + } + + #ifdef MICROPY_HW_NEOPIXEL + neopixel_in_use = false; + #endif +} + +// Mark pin as free and return it to a quiescent state. +void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { + if (pin_port == 0x0F) { + return; + } + // Clear claimed bit & reset + claimed_pins[pin_port] &= ~(1<port && pin_number == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif +} + +void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) { + never_reset_pins[pin_port] |= 1<port, pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { + reset_pin_number(pin->port, pin->number); +} + +void claim_pin(const mcu_pin_obj_t* pin) { + // Set bit in claimed_pins bitmask. + claimed_pins[pin->port] |= 1<number; + + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + neopixel_in_use = true; + } + #endif +} + +bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) { + return !(claimed_pins[pin_port] & 1<port, pin->number); +} + +GPIO_TypeDef * pin_port(uint8_t pin_port) { + return ports[pin_port]; +} + +uint16_t pin_mask(uint8_t pin_number) { + return 1< +#include "common-hal/microcontroller/Processor.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "stm32f4xx_hal.h" + +#define STM32_UUID ((uint32_t *)0x1FFF7A10) + +//Factory calibration locations +#define ADC_CAL_ADDRESS (0x1fff7a2a) +#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) +#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) +#define VREFIN_CAL ((uint16_t *)ADC_CAL_ADDRESS) + +// correction factor for reference value +STATIC volatile float adc_refcor = 1.0f; + +STATIC void set_adc_params(ADC_HandleTypeDef *AdcHandle) { + AdcHandle->Instance = ADC1; + AdcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + AdcHandle->Init.Resolution = ADC_RESOLUTION_12B; + AdcHandle->Init.ScanConvMode = DISABLE; + AdcHandle->Init.ContinuousConvMode = DISABLE; + AdcHandle->Init.DiscontinuousConvMode = DISABLE; + AdcHandle->Init.NbrOfDiscConversion = 0; + AdcHandle->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + AdcHandle->Init.ExternalTrigConv = ADC_SOFTWARE_START; + AdcHandle->Init.DataAlign = ADC_DATAALIGN_RIGHT; + AdcHandle->Init.NbrOfConversion = 1; + AdcHandle->Init.DMAContinuousRequests = DISABLE; + AdcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV; +} + +float common_hal_mcu_processor_get_temperature(void) { + __HAL_RCC_ADC1_CLK_ENABLE(); + + //HAL Implementation + ADC_HandleTypeDef AdcHandle; + ADC_ChannelConfTypeDef sConfig; + set_adc_params(&AdcHandle); + HAL_ADC_Init(&AdcHandle); + + ADC->CCR |= ADC_CCR_TSVREFE; + ADC->CCR &= ~ADC_CCR_VBATE; // If this somehow got turned on, it'll return bad values. + + sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; //either 16 or 18, depending on chip + sConfig.Rank = 1; + sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; // Temp sensor likes 10us minimum + HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + + HAL_ADC_Start(&AdcHandle); + if (HAL_ADC_PollForConversion(&AdcHandle,1) != HAL_OK) { + mp_raise_RuntimeError(translate("Temperature read timed out")); + } + uint32_t value = (uint32_t)HAL_ADC_GetValue(&AdcHandle); + HAL_ADC_Stop(&AdcHandle); + + //There's no F4 specific appnote for this but it works the same as the L1 in AN3964 + float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; + return (((float)value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; +} + +float common_hal_mcu_processor_get_voltage(void) { + __HAL_RCC_ADC1_CLK_ENABLE(); + + //HAL Implementation + ADC_HandleTypeDef AdcHandle; + ADC_ChannelConfTypeDef sConfig; + set_adc_params(&AdcHandle); + HAL_ADC_Init(&AdcHandle); + + ADC->CCR |= ADC_CCR_TSVREFE; + + sConfig.Channel = ADC_CHANNEL_VREFINT; + sConfig.Rank = 1; + sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + + HAL_ADC_Start(&AdcHandle); + if (HAL_ADC_PollForConversion(&AdcHandle,1) != HAL_OK) { + mp_raise_RuntimeError(translate("Voltage read timed out")); + } + uint32_t value = (uint32_t)HAL_ADC_GetValue(&AdcHandle); + HAL_ADC_Stop(&AdcHandle); + + //This value could be used to actively correct ADC values. + adc_refcor = ((float)(*VREFIN_CAL)) / ((float)value); + + return adc_refcor * 3.3f; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return SystemCoreClock; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + for (int i=0; i<3; i++) { + ((uint32_t*) raw_id)[i] = STM32_UUID[i]; + } +} diff --git a/ports/stm/common-hal/microcontroller/Processor.h b/ports/stm/common-hal/microcontroller/Processor.h new file mode 100644 index 0000000000000..311333e7de512 --- /dev/null +++ b/ports/stm/common-hal/microcontroller/Processor.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 12 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/stm/common-hal/microcontroller/__init__.c b/ports/stm/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000000..d407ecfe50c91 --- /dev/null +++ b/ports/stm/common-hal/microcontroller/__init__.c @@ -0,0 +1,256 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/microcontroller/Processor.h" + +#include "shared-bindings/nvm/ByteArray.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "supervisor/filesystem.h" +#include "supervisor/shared/safe_mode.h" + +#include "stm32f4xx_hal.h" + +//tested divisor value for busy loop in us delay +#define LOOP_TICKS 12 + +STATIC uint32_t get_us(void) { + uint32_t ticks_per_us = HAL_RCC_GetSysClockFreq()/1000000; + uint32_t micros, sys_cycles; + do { + micros = supervisor_ticks_ms32(); + sys_cycles = SysTick->VAL; //counts backwards + } while (micros != supervisor_ticks_ms32()); //try again if ticks_ms rolled over + return (micros * 1000) + (ticks_per_us * 1000 - sys_cycles) / ticks_per_us; +} + +void common_hal_mcu_delay_us(uint32_t delay) { + if (__get_PRIMASK() == 0x00000000) { + //by default use ticks_ms + uint32_t start = get_us(); + while (get_us()-start < delay) { + __asm__ __volatile__("nop"); + } + } else { + //when SysTick is disabled, approximate with busy loop + const uint32_t ucount = HAL_RCC_GetSysClockFreq() / 1000000 * delay / LOOP_TICKS; + for (uint32_t count = 0; ++count <= ucount;) { + } + } +} + +volatile uint32_t nesting_count = 0; + +void common_hal_mcu_disable_interrupts(void) { + __disable_irq(); + __DMB(); + nesting_count++; +} + +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + asm("bkpt"); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if(runmode == RUNMODE_SAFE_MODE) + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); +} + +void common_hal_mcu_reset(void) { + filesystem_flush(); //TODO: implement as part of flash improvements + NVIC_SystemReset(); +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .len = NVM_BYTEARRAY_BUFFER_SIZE, + .start_address = (uint8_t*) (CIRCUITPY_INTERNAL_NVM_START_ADDR) +}; +#endif + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { +#if MCU_PACKAGE >= 100 + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, +#if MCU_PACKAGE == 144 + { MP_ROM_QSTR(MP_QSTR_PF00), MP_ROM_PTR(&pin_PF00) }, + { MP_ROM_QSTR(MP_QSTR_PF01), MP_ROM_PTR(&pin_PF01) }, + { MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) }, + { MP_ROM_QSTR(MP_QSTR_PF03), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_PF04), MP_ROM_PTR(&pin_PF04) }, + { MP_ROM_QSTR(MP_QSTR_PF05), MP_ROM_PTR(&pin_PF05) }, + { MP_ROM_QSTR(MP_QSTR_PF06), MP_ROM_PTR(&pin_PF06) }, + { MP_ROM_QSTR(MP_QSTR_PF07), MP_ROM_PTR(&pin_PF07) }, + { MP_ROM_QSTR(MP_QSTR_PF08), MP_ROM_PTR(&pin_PF08) }, + { MP_ROM_QSTR(MP_QSTR_PF09), MP_ROM_PTR(&pin_PF09) }, + { MP_ROM_QSTR(MP_QSTR_PF10), MP_ROM_PTR(&pin_PF10) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, +#if MCU_PACKAGE == 144 + { MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) }, + { MP_ROM_QSTR(MP_QSTR_PF12), MP_ROM_PTR(&pin_PF12) }, + { MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) }, + { MP_ROM_QSTR(MP_QSTR_PF14), MP_ROM_PTR(&pin_PF14) }, + { MP_ROM_QSTR(MP_QSTR_PF15), MP_ROM_PTR(&pin_PF15) }, + { MP_ROM_QSTR(MP_QSTR_PG00), MP_ROM_PTR(&pin_PG00) }, + { MP_ROM_QSTR(MP_QSTR_PG01), MP_ROM_PTR(&pin_PG01) }, +#endif +#if MCU_PACKAGE >= 100 + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, +#if MCU_PACKAGE == 144 || defined STM32F405xx + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, +#if MCU_PACKAGE >= 100 + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, +#endif +#if MCU_PACKAGE == 144 + { MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_PG03), MP_ROM_PTR(&pin_PG03) }, + { MP_ROM_QSTR(MP_QSTR_PG04), MP_ROM_PTR(&pin_PG04) }, + { MP_ROM_QSTR(MP_QSTR_PG05), MP_ROM_PTR(&pin_PG05) }, + { MP_ROM_QSTR(MP_QSTR_PG06), MP_ROM_PTR(&pin_PG06) }, + { MP_ROM_QSTR(MP_QSTR_PG07), MP_ROM_PTR(&pin_PG07) }, + { MP_ROM_QSTR(MP_QSTR_PG08), MP_ROM_PTR(&pin_PG08) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, +#if MCU_PACKAGE >= 100 + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, +#endif +#if MCU_PACKAGE == 144 + { MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_PG12), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_PG13), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_PG14), MP_ROM_PTR(&pin_PG14) }, + { MP_ROM_QSTR(MP_QSTR_PG15), MP_ROM_PTR(&pin_PG15) }, +#endif + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, +#if MCU_PACKAGE >= 100 + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/common-hal/neopixel_write/__init__.c b/ports/stm/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000000..6740a0d348a5e --- /dev/null +++ b/ports/stm/common-hal/neopixel_write/__init__.c @@ -0,0 +1,102 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#include "tick.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/microcontroller/Pin.h" +#include "stm32f4xx_hal.h" +#include "stm32f4xx_ll_gpio.h" + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +//sysclock divisors +#define MAGIC_800_INT 900000 // ~1.11 us -> 1.2 field +#define MAGIC_800_T0H 2800000 // ~0.36 us -> 0.44 field +#define MAGIC_800_T1H 1350000 // ~0.74 us -> 0.84 field + +#pragma GCC push_options +#pragma GCC optimize ("Os") + +void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, + uint32_t numBytes) { + uint8_t *p = pixels, *end = p + numBytes, pix = *p++, mask = 0x80; + uint32_t start = 0; + uint32_t cyc = 0; + + //assumes 800_000Hz frequency + //Theoretical values here are 800_000 -> 1.25us, 2500000->0.4us, 1250000->0.8us + //TODO: try to get dynamic weighting working again + uint32_t sys_freq = HAL_RCC_GetSysClockFreq(); + uint32_t interval = sys_freq/MAGIC_800_INT; + uint32_t t0 = (sys_freq/MAGIC_800_T0H); + uint32_t t1 = (sys_freq/MAGIC_800_T1H); + + // This must be called while interrupts are on in case we're waiting for a + // future ms tick. + wait_until(next_start_tick_ms, next_start_tick_us); + + GPIO_TypeDef * p_port = pin_port(digitalinout->pin->port); + uint32_t p_mask = pin_mask(digitalinout->pin->number); + + __disable_irq(); + // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + DWT->CYCCNT = 0; + + for(;;) { + cyc = (pix & mask) ? t1 : t0; + start = DWT->CYCCNT; + LL_GPIO_SetOutputPin(p_port, p_mask); + while((DWT->CYCCNT - start) < cyc); + LL_GPIO_ResetOutputPin(p_port, p_mask); + while((DWT->CYCCNT - start) < interval); + if(!(mask >>= 1)) { + if(p >= end) break; + pix = *p++; + mask = 0x80; + } + } + + // Enable interrupts again + __enable_irq(); + + // Update the next start. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } +} + +#pragma GCC pop_options \ No newline at end of file diff --git a/ports/stm/common-hal/nvm/ByteArray.c b/ports/stm/common-hal/nvm/ByteArray.c new file mode 100644 index 0000000000000..1aaf54653b847 --- /dev/null +++ b/ports/stm/common-hal/nvm/ByteArray.c @@ -0,0 +1,73 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/nvm/ByteArray.h" + +#include "stm32f4xx_hal.h" + +#include "supervisor/shared/stack.h" + +#include +#include + +uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { + return self->len; +} + +bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint8_t* values, uint32_t len) { + // Copy flash to buffer + uint8_t buffer[self->len]; + memcpy(buffer, self->start_address, self->len); + + // Set bytes in buffer + memmove(buffer + start_index, values, len); + + // Erase flash sector + HAL_FLASH_Unlock(); + __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR ); + FLASH_Erase_Sector(CIRCUITPY_INTERNAL_NVM_SECTOR, VOLTAGE_RANGE_3); + + // Write bytes to flash + uint32_t i; + uint32_t flash_addr = (uint32_t)self->start_address; + for (i = 0; i < self->len; i++, flash_addr++) { + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, flash_addr, buffer[i]) != HAL_OK) { + HAL_FLASH_Lock(); + return false; + } + } + + // Finish up + HAL_FLASH_Lock(); + return true; +} + +// NVM memory is memory mapped so reading it is easy. +void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint32_t len, uint8_t* values) { + memcpy(values, self->start_address + start_index, len); +} diff --git a/ports/stm/common-hal/nvm/ByteArray.h b/ports/stm/common-hal/nvm/ByteArray.h new file mode 100644 index 0000000000000..b6ea36de3f9c7 --- /dev/null +++ b/ports/stm/common-hal/nvm/ByteArray.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_NVM_BYTEARRAY_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_NVM_BYTEARRAY_H + +#include "py/obj.h" + +// STM flash is saved in sectors (not pages), at a minimum size of 16k. +// To limit the RAM usage during writing, we want to set a smaller +// maximum value. +#ifndef NVM_BYTEARRAY_BUFFER_SIZE +#define NVM_BYTEARRAY_BUFFER_SIZE 512 +#endif + +typedef struct { + mp_obj_base_t base; + uint8_t* start_address; + uint32_t len; +} nvm_bytearray_obj_t; + +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_NVM_BYTEARRAY_H diff --git a/ports/stm/common-hal/nvm/__init__.c b/ports/stm/common-hal/nvm/__init__.c new file mode 100644 index 0000000000000..f0792430f01ce --- /dev/null +++ b/ports/stm/common-hal/nvm/__init__.c @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// No nvm module functions. diff --git a/ports/stm/common-hal/os/__init__.c b/ports/stm/common-hal/os/__init__.c new file mode 100644 index 0000000000000..0b3153286aeec --- /dev/null +++ b/ports/stm/common-hal/os/__init__.c @@ -0,0 +1,95 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "genhdr/mpversion.h" +#include "py/mpconfig.h" +#include "py/objstr.h" +#include "py/objtuple.h" + +#include "py/mperrno.h" +#include "py/runtime.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +STATIC const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "stm32f4"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "stm32f4"); + +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +#define RNG_TIMEOUT 5 + +bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { + #if (HAS_TRNG) + //init the RNG + __HAL_RCC_RNG_CLK_ENABLE(); + RNG_HandleTypeDef handle; + handle.Instance = RNG; + if (HAL_RNG_Init(&handle) != HAL_OK) mp_raise_ValueError(translate("RNG Init Error")); + + //Assign bytes + for (uint i = 0; i < length; i++) { + uint32_t temp; + uint32_t start = HAL_GetTick(); + //the HAL function has a timeout, but it isn't long enough, and isn't adjustable + while(!(__HAL_RNG_GET_FLAG(&handle,RNG_FLAG_DRDY)) && ((HAL_GetTick() - start) < RNG_TIMEOUT)); + // + if (HAL_RNG_GenerateRandomNumber(&handle, &temp) != HAL_OK) { + mp_raise_ValueError(translate("Random number generation error")); + } + *buffer = (uint8_t)temp; + } + + //shut down the peripheral + if (HAL_RNG_DeInit(&handle) != HAL_OK) mp_raise_ValueError(translate("RNG DeInit Error")); + __HAL_RCC_RNG_CLK_DISABLE(); + + return true; + #else + return false; + #endif +} \ No newline at end of file diff --git a/ports/stm/common-hal/pulseio/PWMOut.c b/ports/stm/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000000..d62ee2a380da8 --- /dev/null +++ b/ports/stm/common-hal/pulseio/PWMOut.c @@ -0,0 +1,448 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Uses code from Micropython, Copyright (c) 2013-2016 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "py/runtime.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "stm32f4xx_hal.h" +#include "common-hal/microcontroller/Pin.h" + +#define ALL_CLOCKS 0xFFFF + +STATIC uint8_t reserved_tim[TIM_BANK_ARRAY_LEN]; +STATIC uint32_t tim_frequencies[TIM_BANK_ARRAY_LEN]; +STATIC bool never_reset_tim[TIM_BANK_ARRAY_LEN]; + +STATIC void tim_clock_enable(uint16_t mask); +STATIC void tim_clock_disable(uint16_t mask); + +// Get the frequency (in Hz) of the source clock for the given timer. +// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. +// If the APB prescaler is 1, then the timer clock is equal to its respective +// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its +// respective APB clock. See DM00031020 Rev 4, page 115. +STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { + uint32_t source, clk_div; + if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) { + // TIM{1,8,9,10,11} are on APB2 + source = HAL_RCC_GetPCLK2Freq(); + clk_div = RCC->CFGR & RCC_CFGR_PPRE2; + } else { + // TIM{2,3,4,5,6,7,12,13,14} are on APB1 + source = HAL_RCC_GetPCLK1Freq(); + clk_div = RCC->CFGR & RCC_CFGR_PPRE1; + } + if (clk_div != 0) { + // APB prescaler for this timer is > 1 + source *= 2; + } + return source; +} + +STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { + //duty cycle is duty/0xFFFF fraction x (number of pulses per period) + return (duty*period) / ((1 << 16) - 1); +} + +STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, + uint32_t frequency, uint32_t source_freq) { + //Find the largest possible period supported by this frequency + for (int i = 0; i < (1 << 16); i++) { + *period = source_freq / (i * frequency); + if (*period < (1 << 16) && *period >= 2) { + *prescaler = i; + break; + } + } + if (*prescaler == 0) { + mp_raise_ValueError(translate("Invalid frequency supplied")); + } +} + +void pwmout_reset(void) { + uint16_t never_reset_mask = 0x00; + for (int i = 0; i < TIM_BANK_ARRAY_LEN; i++) { + if (!never_reset_tim[i]) { + reserved_tim[i] = 0x00; + tim_frequencies[i] = 0x00; + } else { + never_reset_mask |= 1 << i; + } + } + tim_clock_disable(ALL_CLOCKS & ~(never_reset_mask)); +} + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, + const mcu_pin_obj_t* pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + TIM_TypeDef * TIMx; + uint8_t tim_num = MP_ARRAY_SIZE(mcu_tim_pin_list); + bool tim_chan_taken = false; + bool tim_taken_f_mismatch = false; + bool var_freq_mismatch = false; + bool first_time_setup = true; + + for (uint i = 0; i < tim_num; i++) { + const mcu_tim_pin_obj_t * l_tim = &mcu_tim_pin_list[i]; + uint8_t l_tim_index = l_tim->tim_index - 1; + uint8_t l_tim_channel = l_tim->channel_index - 1; + + //if pin is same + if (l_tim->pin == pin) { + //check if the timer has a channel active + if (reserved_tim[l_tim_index] != 0) { + //is it the same channel? (or all channels reserved by a var-freq) + if (reserved_tim[l_tim_index] & 1 << (l_tim_channel)) { + tim_chan_taken = true; + continue; //keep looking, might be another viable option + } + //If the frequencies are the same it's ok + if (tim_frequencies[l_tim_index] != frequency) { + tim_taken_f_mismatch = true; + continue; //keep looking + } + //you can't put a variable frequency on a partially reserved timer + if (variable_frequency) { + var_freq_mismatch = true; + continue; //keep looking + } + first_time_setup = false; //skip setting up the timer + } + //No problems taken, so set it up + self->tim = l_tim; + break; + } + } + + //handle valid/invalid timer instance + if (self->tim != NULL) { + //create instance + TIMx = mcu_tim_banks[self->tim->tim_index - 1]; + //reserve timer/channel + if (variable_frequency) { + reserved_tim[self->tim->tim_index - 1] = 0x0F; + } else { + reserved_tim[self->tim->tim_index - 1] |= 1 << (self->tim->channel_index - 1); + } + tim_frequencies[self->tim->tim_index - 1] = frequency; + } else { //no match found + if (tim_chan_taken) { + mp_raise_ValueError(translate("No more timers available on this pin.")); + } else if (tim_taken_f_mismatch) { + mp_raise_ValueError(translate("Frequency must match existing PWMOut using this timer")); + } else if (var_freq_mismatch) { + mp_raise_ValueError(translate("Cannot vary frequency on a timer that is already in use")); + } else { + mp_raise_ValueError(translate("Invalid pins for PWMOut")); + } + } + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = self->tim->altfn_index; + HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + + tim_clock_enable(1 << (self->tim->tim_index - 1)); + + //translate channel into handle value + self->channel = 4 * (self->tim->channel_index - 1); + + uint32_t prescaler = 0; //prescaler is 15 bit + uint32_t period = 0; //period is 16 bit + timer_get_optimal_divisors(&period, &prescaler, frequency, + timer_get_source_freq(self->tim->tim_index)); + + //Timer init + self->handle.Instance = TIMx; + self->handle.Init.Period = period - 1; + self->handle.Init.Prescaler = prescaler - 1; + self->handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + self->handle.Init.CounterMode = TIM_COUNTERMODE_UP; + self->handle.Init.RepetitionCounter = 0; + + //only run init if this is the first instance of this timer + if (first_time_setup) { + if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("Could not initialize timer")); + } + } + + //Channel/PWM init + self->chan_handle.OCMode = TIM_OCMODE_PWM1; + self->chan_handle.Pulse = timer_get_internal_duty(duty, period); + self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; + self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not initialize channel")); + } + if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not start PWM")); + } + + self->variable_frequency = variable_frequency; + self->frequency = frequency; + self->duty_cycle = duty; + self->period = period; + + return PWMOUT_OK; +} + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + for (size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) { + if (mcu_tim_banks[i] == self->handle.Instance) { + never_reset_tim[i] = true; + never_reset_pin_number(self->tim->pin->port, self->tim->pin->number); + break; + } + } +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + for(size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) { + if (mcu_tim_banks[i] == self->handle.Instance) { + never_reset_tim[i] = false; + break; + } + } +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + return self->tim == NULL; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + //var freq shuts down entire timer, others just their channel + if (self->variable_frequency) { + reserved_tim[self->tim->tim_index - 1] = 0x00; + } else { + reserved_tim[self->tim->tim_index - 1] &= ~(1 << self->tim->channel_index); + HAL_TIM_PWM_Stop(&self->handle, self->channel); + } + reset_pin_number(self->tim->pin->port,self->tim->pin->number); + self->tim = NULL; + + //if reserved timer has no active channels, we can disable it + if (!reserved_tim[self->tim->tim_index - 1]) { + tim_frequencies[self->tim->tim_index - 1] = 0x00; + tim_clock_disable(1 << (self->tim->tim_index - 1)); + } +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { + uint32_t internal_duty_cycle = timer_get_internal_duty(duty, self->period); + __HAL_TIM_SET_COMPARE(&self->handle, self->channel, internal_duty_cycle); + self->duty_cycle = duty; +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + return self->duty_cycle; +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { + //don't halt setup for the same frequency + if (frequency == self->frequency) { + return; + } + + uint32_t prescaler = 0; + uint32_t period = 0; + timer_get_optimal_divisors(&period, &prescaler, frequency, + timer_get_source_freq(self->tim->tim_index)); + + //shut down + HAL_TIM_PWM_Stop(&self->handle, self->channel); + + //Only change altered values + self->handle.Init.Period = period - 1; + self->handle.Init.Prescaler = prescaler - 1; + + //restart everything, adjusting for new speed + if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("Could not re-init timer")); + } + + self->chan_handle.Pulse = timer_get_internal_duty(self->duty_cycle, period); + + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not re-init channel")); + } + if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not restart PWM")); + } + + tim_frequencies[self->tim->tim_index - 1] = frequency; + self->frequency = frequency; + self->period = period; +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { + return self->frequency; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + return self->variable_frequency; +} + +STATIC void tim_clock_enable(uint16_t mask) { + #ifdef TIM1 + if (mask & (1 << 0)) { + __HAL_RCC_TIM1_CLK_ENABLE(); + } + #endif + #ifdef TIM2 + if (mask & (1 << 1)) { + __HAL_RCC_TIM2_CLK_ENABLE(); + } + #endif + #ifdef TIM3 + if (mask & (1 << 2)) { + __HAL_RCC_TIM3_CLK_ENABLE(); + } + #endif + #ifdef TIM4 + if (mask & (1 << 3)) { + __HAL_RCC_TIM4_CLK_ENABLE(); + } + #endif + #ifdef TIM5 + if (mask & (1 << 4)) { + __HAL_RCC_TIM5_CLK_ENABLE(); + } + #endif + //6 and 7 are reserved ADC timers + #ifdef TIM8 + if (mask & (1 << 7)) { + __HAL_RCC_TIM8_CLK_ENABLE(); + } + #endif + #ifdef TIM9 + if (mask & (1 << 8)) { + __HAL_RCC_TIM9_CLK_ENABLE(); + } + #endif + #ifdef TIM10 + if (mask & (1 << 9)) { + __HAL_RCC_TIM10_CLK_ENABLE(); + } + #endif + #ifdef TIM11 + if (mask & (1 << 10)) { + __HAL_RCC_TIM11_CLK_ENABLE(); + } + #endif + #ifdef TIM12 + if (mask & (1 << 11)) { + __HAL_RCC_TIM12_CLK_ENABLE(); + } + #endif + #ifdef TIM13 + if (mask & (1 << 12)) { + __HAL_RCC_TIM13_CLK_ENABLE(); + } + #endif + #ifdef TIM14 + if (mask & (1 << 13)) { + __HAL_RCC_TIM14_CLK_ENABLE(); + } + #endif +} + +STATIC void tim_clock_disable(uint16_t mask) { + #ifdef TIM1 + if (mask & (1 << 0)) { + __HAL_RCC_TIM1_CLK_DISABLE(); + } + #endif + #ifdef TIM2 + if (mask & (1 << 1)) { + __HAL_RCC_TIM2_CLK_DISABLE(); + } + #endif + #ifdef TIM3 + if (mask & (1 << 2)) { + __HAL_RCC_TIM3_CLK_DISABLE(); + } + #endif + #ifdef TIM4 + if (mask & (1 << 3)) { + __HAL_RCC_TIM4_CLK_DISABLE(); + } + #endif + #ifdef TIM5 + if (mask & (1 << 4)) { + __HAL_RCC_TIM5_CLK_DISABLE(); + } + #endif + //6 and 7 are reserved ADC timers + #ifdef TIM8 + if (mask & (1 << 7)) { + __HAL_RCC_TIM8_CLK_DISABLE(); + } + #endif + #ifdef TIM9 + if (mask & (1 << 8)) { + __HAL_RCC_TIM9_CLK_DISABLE(); + } + #endif + #ifdef TIM10 + if (mask & (1 << 9)) { + __HAL_RCC_TIM10_CLK_DISABLE(); + } + #endif + #ifdef TIM11 + if (mask & (1 << 10)) { + __HAL_RCC_TIM11_CLK_DISABLE(); + } + #endif + #ifdef TIM12 + if (mask & (1 << 11)) { + __HAL_RCC_TIM12_CLK_DISABLE(); + } + #endif + #ifdef TIM13 + if (mask & (1 << 12)) { + __HAL_RCC_TIM13_CLK_DISABLE(); + } + #endif + #ifdef TIM14 + if (mask & (1 << 13)) { + __HAL_RCC_TIM14_CLK_DISABLE(); + } + #endif +} diff --git a/ports/stm/common-hal/pulseio/PWMOut.h b/ports/stm/common-hal/pulseio/PWMOut.h new file mode 100644 index 0000000000000..59fc04e5ff6bf --- /dev/null +++ b/ports/stm/common-hal/pulseio/PWMOut.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + TIM_HandleTypeDef handle; + TIM_OC_InitTypeDef chan_handle; + const mcu_tim_pin_obj_t *tim; + uint8_t channel: 7; + bool variable_frequency: 1; + uint16_t duty_cycle; + uint32_t frequency; + uint32_t period; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/stm/common-hal/pulseio/PulseIn.c b/ports/stm/common-hal/pulseio/PulseIn.c new file mode 100644 index 0000000000000..8428a22789f9c --- /dev/null +++ b/ports/stm/common-hal/pulseio/PulseIn.c @@ -0,0 +1,303 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" +#include +#include +#include "py/mpconfig.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/pulseio/PulseIn.h" +#include "tick.h" + +#include "stm32f4xx_hal.h" + +#define STM32_GPIO_PORT_SIZE 16 + +static pulseio_pulsein_obj_t* _objs[STM32_GPIO_PORT_SIZE]; + +static void assign_EXTI_Interrupt(pulseio_pulsein_obj_t* self, uint8_t num); + +static void pulsein_handler(uint8_t num) { + // Interrupt register must be cleared manually + EXTI->PR = 1 << num; + + // Grab the current time first. + uint32_t current_us; + uint64_t current_ms; + current_tick(¤t_ms, ¤t_us); + + // current_tick gives us the remaining us until the next tick but we want the number since the last ms. + current_us = 1000 - current_us; + + pulseio_pulsein_obj_t* self = _objs[num]; + if ( !self ) return; + + if (self->first_edge) { + // first pulse is opposite state from idle + bool state = HAL_GPIO_ReadPin(pin_port(self->pin->port), pin_mask(self->pin->number)); + if ( self->idle_state != state ) { + self->first_edge = false; + } + } else { + uint32_t ms_diff = current_ms - self->last_ms; + uint16_t us_diff = current_us - self->last_us; + uint32_t total_diff = us_diff; + + if (self->last_us > current_us) { + total_diff = 1000 + current_us - self->last_us; + if (ms_diff > 1) { + total_diff += (ms_diff - 1) * 1000; + } + } else { + total_diff += ms_diff * 1000; + } + uint16_t duration = 0xffff; + if (total_diff < duration) { + duration = total_diff; + } + + uint16_t i = (self->start + self->len) % self->maxlen; + self->buffer[i] = duration; + if (self->len < self->maxlen) { + self->len++; + } else { + self->start++; + } + } + + self->last_ms = current_ms; + self->last_us = current_us; +} + +void pulsein_reset(void) { + // Disable all active interrupts and clear array + for (uint i = 0; i < STM32_GPIO_PORT_SIZE; i++) { + if (_objs[i] != NULL) { + HAL_NVIC_DisableIRQ(_objs[i]->irq); + } + } + memset(_objs, 0, sizeof(_objs)); +} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, const mcu_pin_obj_t* pin, + uint16_t maxlen, bool idle_state) { + // STM32 has one shared EXTI for each pin number, 0-15 + uint8_t p_num = pin->number; + if(_objs[p_num]) { + mp_raise_ValueError(translate("Pin number already reserved by EXTI")); + } + _objs[p_num] = self; + + // Allocate pulse buffer + self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); + if (self->buffer == NULL) { + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), + maxlen * sizeof(uint16_t)); + } + + // Set internal variables + self->pin = pin; + self->maxlen = maxlen; + self->idle_state = idle_state; + self->start = 0; + self->len = 0; + self->first_edge = true; + self->paused = false; + self->last_us = 0; + self->last_ms = 0; + + // EXTI pins can also be read as an input + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + + // Interrupt starts immediately + assign_EXTI_Interrupt(self, pin->number); + HAL_NVIC_EnableIRQ(self->irq); + claim_pin(pin); +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { + return (self->pin == NULL); +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { + if (common_hal_pulseio_pulsein_deinited(self)) { + return; + } + //Remove pulsein slot from shared array + HAL_NVIC_DisableIRQ(self->irq); + _objs[self->pin->number] = NULL; + reset_pin_number(self->pin->port, self->pin->number); + self->pin = NULL; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { + HAL_NVIC_DisableIRQ(self->irq); + self->paused = true; +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, uint16_t trigger_duration) { + // Make sure we're paused. + if ( !self->paused ) { + common_hal_pulseio_pulsein_pause(self); + } + + // Send the trigger pulse. + if (trigger_duration > 0) { + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(self->pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(pin_port(self->pin->port), &GPIO_InitStruct); + + HAL_GPIO_WritePin(pin_port(self->pin->port), pin_mask(self->pin->number), !self->idle_state); + common_hal_mcu_delay_us((uint32_t)trigger_duration); + HAL_GPIO_WritePin(pin_port(self->pin->port), pin_mask(self->pin->number), self->idle_state); + + GPIO_InitStruct.Pin = pin_mask(self->pin->number); + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(pin_port(self->pin->port), &GPIO_InitStruct); + } + + self->first_edge = true; + self->paused = false; + self->last_ms = 0; + self->last_us = 0; + + HAL_NVIC_EnableIRQ(self->irq); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { + HAL_NVIC_DisableIRQ(self->irq); + self->start = 0; + self->len = 0; + HAL_NVIC_EnableIRQ(self->irq); +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index) { + HAL_NVIC_DisableIRQ(self->irq); + if (index < 0) { + index += self->len; + } + if (index < 0 || index >= self->len) { + HAL_NVIC_EnableIRQ(self->irq); + mp_raise_IndexError(translate("index out of range")); + } + uint16_t value = self->buffer[(self->start + index) % self->maxlen]; + HAL_NVIC_EnableIRQ(self->irq); + return value; +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { + if (self->len == 0) { + mp_raise_IndexError(translate("pop from an empty PulseIn")); + } + HAL_NVIC_DisableIRQ(self->irq); + uint16_t value = self->buffer[self->start]; + self->start = (self->start + 1) % self->maxlen; + self->len--; + HAL_NVIC_EnableIRQ(self->irq); + + return value; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { + return self->maxlen; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { + return self->paused; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { + return self->len; +} + +static void assign_EXTI_Interrupt(pulseio_pulsein_obj_t* self, uint8_t num) { + if (num == 0) { + self->irq = EXTI0_IRQn; + } else if (num == 1) { + self->irq = EXTI1_IRQn; + } else if (num == 2) { + self->irq = EXTI2_IRQn; + } else if (num == 3) { + self->irq = EXTI3_IRQn; + } else if (num == 4) { + self->irq = EXTI4_IRQn; + } else if (num >= 5 && num <= 9 ) { + self->irq = EXTI9_5_IRQn; + } else if (num >= 10 && num <= 15) { + self->irq = EXTI15_10_IRQn; + } +} + +void EXTI0_IRQHandler(void) +{ + pulsein_handler(0); +} +void EXTI1_IRQHandler(void) +{ + pulsein_handler(1); +} +void EXTI2_IRQHandler(void) +{ + pulsein_handler(2); +} +void EXTI3_IRQHandler(void) +{ + pulsein_handler(3); +} +void EXTI4_IRQHandler(void) +{ + pulsein_handler(4); +} + +void EXTI9_5_IRQHandler(void) +{ + uint32_t pending = EXTI->PR; + for (uint i = 5; i <= 9; i++) { + if(pending & (1 << i)) { + pulsein_handler(i); + } + } +} + +void EXTI15_10_IRQHandler(void) +{ + uint32_t pending = EXTI->PR; + for (uint i = 10; i <= 15; i++) { + if(pending & (1 << i)) { + pulsein_handler(i); + } + } +} diff --git a/ports/stm/common-hal/pulseio/PulseIn.h b/ports/stm/common-hal/pulseio/PulseIn.h new file mode 100644 index 0000000000000..5456613c6aef1 --- /dev/null +++ b/ports/stm/common-hal/pulseio/PulseIn.h @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + + const mcu_pin_obj_t* pin; + IRQn_Type irq; + bool idle_state; + bool paused; + volatile bool first_edge; + + uint16_t* buffer; + uint16_t maxlen; + + volatile uint16_t start; + volatile uint16_t len; + volatile uint16_t last_us; + volatile uint64_t last_ms; +} pulseio_pulsein_obj_t; + +void pulsein_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/stm/common-hal/pulseio/PulseOut.c b/ports/stm/common-hal/pulseio/PulseOut.c new file mode 100644 index 0000000000000..d82525ea166d3 --- /dev/null +++ b/ports/stm/common-hal/pulseio/PulseOut.c @@ -0,0 +1,214 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseOut.h" + +#include + +#include "py/mpconfig.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/pulseio/PulseOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "supervisor/shared/translate.h" + +#include "stm32f4xx_hal.h" +#include "common-hal/microcontroller/Pin.h" +#include "tick.h" + +// A single timer is shared amongst all PulseOut objects under the assumption that +// the code is single threaded. +STATIC uint8_t refcount = 0; + +STATIC uint16_t *pulse_array = NULL; +STATIC volatile uint16_t pulse_array_index = 0; +STATIC uint16_t pulse_array_length; + +//Timer is shared, must be accessible by interrupt +STATIC TIM_HandleTypeDef t7_handle; +pulseio_pulseout_obj_t *curr_pulseout = NULL; + +STATIC void turn_on(pulseio_pulseout_obj_t *pulseout) { + // Turn on PWM + HAL_TIM_PWM_Start(&(pulseout->pwmout->handle), pulseout->pwmout->channel); +} + +STATIC void turn_off(pulseio_pulseout_obj_t *pulseout) { + // Turn off PWM + HAL_TIM_PWM_Stop(&(pulseout->pwmout->handle), pulseout->pwmout->channel); + // Make sure pin is low. + HAL_GPIO_WritePin(pin_port(pulseout->pwmout->tim->pin->port), + pin_mask(pulseout->pwmout->tim->pin->number), 0); +} + +STATIC void start_timer(void) { + // Set the new period + t7_handle.Init.Period = pulse_array[pulse_array_index] - 1; + HAL_TIM_Base_Init(&t7_handle); + + // TIM7 has limited HAL support, set registers manually + t7_handle.Instance->SR = 0; // Prevent the SR from triggering an interrupt + t7_handle.Instance->CR1 |= TIM_CR1_CEN; // Resume timer + t7_handle.Instance->CR1 |= TIM_CR1_URS; // Disable non-overflow interrupts + __HAL_TIM_ENABLE_IT(&t7_handle, TIM_IT_UPDATE); + +} + +STATIC void pulseout_event_handler(void) { + if (curr_pulseout->pwmout == NULL) { + return; //invalid interrupt + } + + HAL_GPIO_WritePin(pin_port(2),pin_mask(6), 1); + HAL_GPIO_WritePin(pin_port(2),pin_mask(6), 0); + + pulse_array_index++; + + // No more pulses. Turn off output and don't restart. + if (pulse_array_index >= pulse_array_length) { + turn_off(curr_pulseout); + return; + } + + // Alternate on and off, starting with on. + if (pulse_array_index % 2 == 0) { + turn_on(curr_pulseout); + } else { + turn_off(curr_pulseout); + } + + // Count up to the next given value. + start_timer(); +} + +void pulseout_reset() { + #if HAS_BASIC_TIM + __HAL_RCC_TIM7_CLK_DISABLE(); + refcount = 0; + #endif +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, + const pulseio_pwmout_obj_t* carrier) { +#if !(HAS_BASIC_TIM) + mp_raise_NotImplementedError(translate("PulseOut not supported on this chip")); +#else + // Add to active PulseOuts + refcount++; + + // Calculate a 1 ms period + uint32_t source, clk_div; + source = HAL_RCC_GetPCLK1Freq(); // TIM7 is on APB1 + clk_div = RCC->CFGR & RCC_CFGR_PPRE1; + // APB quirk, see See DM00031020 Rev 4, page 115. + if (clk_div != 0) { + // APB prescaler for this timer is > 1 + source *= 2; + } + + uint32_t prescaler = source/1000000; //1us intervals + + __HAL_RCC_TIM7_CLK_ENABLE(); + HAL_NVIC_SetPriority(TIM7_IRQn, 4, 0); + HAL_NVIC_EnableIRQ(TIM7_IRQn); + + // Timers 6 and 7 have no pins, so using them doesn't affect PWM availability + t7_handle.Instance = TIM7; + t7_handle.Init.Period = 100; //immediately replaced. + t7_handle.Init.Prescaler = prescaler - 1; + t7_handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + t7_handle.Init.CounterMode = TIM_COUNTERMODE_UP; + t7_handle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + + HAL_TIM_Base_Init(&t7_handle); + t7_handle.Instance->SR = 0; + + // The HAL can't work with const, recast required. + self->pwmout = (pulseio_pwmout_obj_t*)carrier; + + turn_off(self); +#endif +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { + return self->pwmout == NULL; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { + if (common_hal_pulseio_pulseout_deinited(self)) { + return; + } + turn_on(self); + self->pwmout = NULL; + + refcount--; + if (refcount == 0) { + #if HAS_BASIC_TIM + __HAL_RCC_TIM7_CLK_DISABLE(); + #endif + } +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { + pulse_array = pulses; + pulse_array_index = 0; + pulse_array_length = length; + curr_pulseout = self; + + turn_on(self); + + // Count up to the next given value. + start_timer(); + + // Use when debugging, or issues are irrecoverable + // uint32_t starttime = supervisor_ticks_ms64(); + // uint32_t timeout = 10000; + while(pulse_array_index < length) { + // Do other things while we wait. The interrupts will handle sending the + // signal. + RUN_BACKGROUND_TASKS; + + // Use when debugging, or issues are irrecoverable + // if ((supervisor_ticks_ms64() - starttime ) > timeout ) { + // mp_raise_RuntimeError(translate("Error: Send Timeout")); + // } + } + //turn off timer counter. + t7_handle.Instance->CR1 &= ~TIM_CR1_CEN; +} + +void TIM7_IRQHandler(void) +{ + // Detect TIM Update event + if (__HAL_TIM_GET_FLAG(&t7_handle, TIM_FLAG_UPDATE) != RESET) + { + if (__HAL_TIM_GET_IT_SOURCE(&t7_handle, TIM_IT_UPDATE) != RESET) + { + __HAL_TIM_CLEAR_IT(&t7_handle, TIM_IT_UPDATE); + pulseout_event_handler(); + } + } +} diff --git a/ports/stm/common-hal/pulseio/PulseOut.h b/ports/stm/common-hal/pulseio/PulseOut.h new file mode 100644 index 0000000000000..aa97396d0078d --- /dev/null +++ b/ports/stm/common-hal/pulseio/PulseOut.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/pulseio/PWMOut.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + pulseio_pwmout_obj_t *pwmout; +} pulseio_pulseout_obj_t; + +void pulseout_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/stm/common-hal/pulseio/__init__.c b/ports/stm/common-hal/pulseio/__init__.c new file mode 100644 index 0000000000000..2bee925bc77fb --- /dev/null +++ b/ports/stm/common-hal/pulseio/__init__.c @@ -0,0 +1 @@ +// No pulseio module functions. diff --git a/ports/stm/common-hal/supervisor/Runtime.c b/ports/stm/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000000..feab6987d8b8c --- /dev/null +++ b/ports/stm/common-hal/supervisor/Runtime.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} + diff --git a/ports/stm/common-hal/supervisor/Runtime.h b/ports/stm/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000000..9a798e05677b0 --- /dev/null +++ b/ports/stm/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/stm/common-hal/supervisor/__init__.c b/ports/stm/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000000..ac88556b45da4 --- /dev/null +++ b/ports/stm/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/stm/common-hal/time/__init__.c b/ports/stm/common-hal/time/__init__.c new file mode 100644 index 0000000000000..c85077868aa30 --- /dev/null +++ b/ports/stm/common-hal/time/__init__.c @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "tick.h" + +uint64_t common_hal_time_monotonic(void) { + return supervisor_ticks_ms64(); +} + +uint64_t common_hal_time_monotonic_ns(void) { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/stm/fatfs_port.c b/ports/stm/fatfs_port.c new file mode 100644 index 0000000000000..13ac21fb1bcca --- /dev/null +++ b/ports/stm/fatfs_port.c @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +DWORD get_fattime(void) { + // TODO: Implement this function. For now, fake it. + return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2); +} diff --git a/ports/stm/mpconfigport.h b/ports/stm/mpconfigport.h new file mode 100644 index 0000000000000..283984ea90396 --- /dev/null +++ b/ports/stm/mpconfigport.h @@ -0,0 +1,59 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef STM32F4_MPCONFIGPORT_H__ +#define STM32F4_MPCONFIGPORT_H__ + +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) +#define MICROPY_PY_FUNCTION_ATTRS (1) +#define MICROPY_PY_IO (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) +#define MICROPY_PY_UJSON (1) + +// 24kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 + +#include "py/circuitpy_mpconfig.h" + +//Board flags: +#ifndef BOARD_OVERWRITE_SWD +#define BOARD_OVERWRITE_SWD (0) +#endif +#ifndef BOARD_VTOR_DEFER +#define BOARD_VTOR_DEFER (0) +#endif +#ifndef BOARD_NO_VBUS_SENSE +#define BOARD_NO_VBUS_SENSE (0) +#endif + +#define MAX_UART 10 //how many UART are implemented + +#define MICROPY_PORT_ROOT_POINTERS \ + void *cpy_uart_obj_all[MAX_UART]; \ + CIRCUITPY_COMMON_ROOT_POINTERS + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk new file mode 100644 index 0000000000000..529a94248702a --- /dev/null +++ b/ports/stm/mpconfigport.mk @@ -0,0 +1,77 @@ +# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk +# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. +# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz + +# Internal math library is substantially smaller than toolchain one +INTERNAL_LIBM = 1 + +# Chip supplied serial number, in bytes +USB_SERIAL_NUMBER_LENGTH = 24 + +# Longints can be implemented as mpz, as longlong, or not +LONGINT_IMPL = MPZ + +#Reduced feature set for early port +CIRCUITPY_MINIMAL_BUILD = 1 + +# The ifndef's allow overriding in mpconfigboard.mk. + +ifndef CIRCUITPY_BOARD +CIRCUITPY_BOARD = 1 +endif + +ifndef CIRCUITPY_DIGITALIO +CIRCUITPY_DIGITALIO = 1 +endif + +ifndef CIRCUITPY_ANALOGIO +CIRCUITPY_ANALOGIO = 1 +endif + +ifndef CIRCUITPY_MICROCONTROLLER +CIRCUITPY_MICROCONTROLLER = 1 +endif + +ifndef CIRCUITPY_BUSIO +CIRCUITPY_BUSIO = 1 +endif + +ifndef CIRCUITPY_PULSEIO +CIRCUITPY_PULSEIO = 1 +endif + +ifndef CIRCUITPY_OS +CIRCUITPY_OS = 1 +endif + +ifndef CIRCUITPY_STORAGE +CIRCUITPY_STORAGE = 1 +endif + +ifndef CIRCUITPY_RANDOM +CIRCUITPY_RANDOM = 1 +endif + +ifndef CRICUITPY_USB_HID +CIRCUITPY_USB_HID = 1 +endif + +ifndef CIRCUITPY_USB_MIDI +CIRCUITPY_USB_MIDI = 1 +endif + +ifndef CIRCUITPY_NEOPIXEL_WRITE +CIRCUITPY_NEOPIXEL_WRITE = 1 +endif + +ifndef CIRCUITPY_DISPLAYIO +CIRCUITPY_DISPLAYIO = 1 +endif + +CFLAGS += -DMICROPY_CPYTHON_COMPAT=1 + +CIRCUITPY_ULAB = 1 + +#ifeq ($(MCU_SUB_VARIANT), stm32f412zx) +#endif diff --git a/ports/stm/mphalport.c b/ports/stm/mphalport.c new file mode 100644 index 0000000000000..a3cf501c046b5 --- /dev/null +++ b/ports/stm/mphalport.c @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mphal.h" +#include "py/mpstate.h" +#include "py/gc.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/tick.h" +#include "stm32f4xx_hal.h" + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + RUN_BACKGROUND_TASKS; + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(mp_uint_t delay) { + common_hal_mcu_delay_us(delay); +} + +void mp_hal_disable_all_interrupts(void) { + common_hal_mcu_disable_interrupts(); +} + +void mp_hal_enable_all_interrupts(void) { + common_hal_mcu_enable_interrupts(); +} diff --git a/ports/stm/mphalport.h b/ports/stm/mphalport.h new file mode 100644 index 0000000000000..b392cb0f84e9b --- /dev/null +++ b/ports/stm/mphalport.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2015 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_MPHALPORT_H +#define MICROPY_INCLUDED_STM32F4_MPHALPORT_H + +#include "py/obj.h" + +#include "lib/oofatfs/ff.h" + +#include "supervisor/shared/tick.h" + +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} +// Number of bytes in receive buffer +volatile uint8_t usb_rx_count; +volatile bool mp_cdc_enabled; + +int receive_usb(void); + +void mp_hal_set_interrupt_char(int c); + +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); + +#endif // MICROPY_INCLUDED_STM32F4_MPHALPORT_H diff --git a/ports/stm/peripherals/stm32f4/clocks.h b/ports/stm/peripherals/stm32f4/clocks.h new file mode 100644 index 0000000000000..c7ba846622ca2 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/clocks.h @@ -0,0 +1,27 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +void stm32f4_peripherals_clocks_init(void); diff --git a/ports/stm/peripherals/stm32f4/gpio.h b/ports/stm/peripherals/stm32f4/gpio.h new file mode 100644 index 0000000000000..34f89e79212c1 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/gpio.h @@ -0,0 +1,28 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +void stm32f4_peripherals_gpio_init(void); +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state); diff --git a/ports/stm/peripherals/stm32f4/periph.h b/ports/stm/peripherals/stm32f4/periph.h new file mode 100644 index 0000000000000..d311afe4a1c23 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/periph.h @@ -0,0 +1,180 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ +#define __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ + +#include +#include + +#include "stm32f4xx_hal.h" +#include "stm32f4/pins.h" + +// I2C +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. + +typedef struct { + uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) + uint8_t altfn_index:4; //Index of the altfn for this pin (0 to 15) + const mcu_pin_obj_t * pin; +} mcu_i2c_sda_obj_t; + +typedef struct { + uint8_t i2c_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_i2c_scl_obj_t; + + +#define I2C_SDA(index, alt, sda_pin) \ +{ \ + .i2c_index = index, \ + .altfn_index = alt, \ + .pin = sda_pin, \ +} + +#define I2C_SCL(index, alt, scl_pin) \ +{ \ + .i2c_index = index, \ + .altfn_index = alt, \ + .pin = scl_pin, \ +} + +// SPI +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. + +typedef struct { + uint8_t spi_index:4; //Up to 6 SPI units + uint8_t altfn_index:4; //Up to 15 alt channels + const mcu_pin_obj_t * pin; +} mcu_spi_sck_obj_t; + +typedef struct { + uint8_t spi_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_mosi_obj_t; + +typedef struct { + uint8_t spi_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_miso_obj_t; + +typedef struct { + uint8_t spi_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_nss_obj_t; + +#define SPI(index, alt, spi_pin) \ +{ \ + .spi_index = index, \ + .altfn_index = alt, \ + .pin = spi_pin, \ +} + +// UART +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_tx_obj_t; + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_rx_obj_t; + +#define UART(index, alt, uart_pin) \ +{ \ + .uart_index = index, \ + .altfn_index = alt, \ + .pin = uart_pin, \ +} + +//Timers +typedef struct { + uint8_t tim_index:4; + uint8_t altfn_index:4; + uint8_t channel_index:4; + const mcu_pin_obj_t * pin; +} mcu_tim_pin_obj_t; + +#define TIM(index, alt, channel, tim_pin) \ +{ \ + .tim_index = index, \ + .altfn_index = alt, \ + .channel_index = channel, \ + .pin = tim_pin, \ +} + +//Access Lines + +#ifdef STM32F401xE +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32f401xe/periph.h" +#endif + +#ifdef STM32F411xE +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32f411xe/periph.h" +#endif + +#ifdef STM32F412Zx +#define HAS_DAC 0 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f412zx/periph.h" +#endif + +//Foundation Lines + +#ifdef STM32F405xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f405xx/periph.h" +#endif + +#ifdef STM32F407xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f407xx/periph.h" +#endif + +#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ diff --git a/ports/stm/peripherals/stm32f4/pins.h b/ports/stm/peripherals/stm32f4/pins.h new file mode 100644 index 0000000000000..44ef4c1baf789 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/pins.h @@ -0,0 +1,96 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ +#define __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ + +#include +#include + +#include "stm32f4xx_hal.h" + +typedef struct { + mp_obj_base_t base; + uint8_t port:4; + uint8_t number:4; + uint8_t adc_unit:3; + uint8_t adc_channel:5; +} mcu_pin_obj_t; + +//Standard stm32 adc unit combinations +#define ADC_1 1 +#define ADC_12 3 +#define ADC_123 7 +#define ADC_3 4 + +//STM32 ADC pins can have a combination of 1, 2 or all 3 ADCs on a single pin, +//but all 3 ADCs will share the same input number per pin. +//F4 family has 3 ADC max, 24 channels max. +#define ADC_INPUT(mask, number) \ + .adc_unit = mask, \ + .adc_channel = number, + +#define NO_ADC \ + .adc_unit = 0x00, \ + .adc_channel = 0x1f + +extern const mp_obj_type_t mcu_pin_type; + +// STM32 can have up to 9 ports, each restricted to 16 pins +// We split the pin/port evenly, in contrast to nrf. +#define PIN(p_port, p_number, p_adc) \ +{ \ + { &mcu_pin_type }, \ + .port = p_port, \ + .number = p_number, \ + p_adc \ +} + +// Use illegal pin value to mark unassigned pins. +#define NO_PIN 0xff + +// Choose based on chip +#ifdef STM32F401xE +#include "stm32f401xe/pins.h" +#endif +#ifdef STM32F411xE +#include "stm32f411xe/pins.h" +#endif +#ifdef STM32F412Zx +#include "stm32f412zx/pins.h" +#endif +#ifdef STM32F405xx +#include "stm32f405xx/pins.h" +#endif +#ifdef STM32F407xx +#include "stm32f407xx/pins.h" +#endif + +#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c new file mode 100644 index 0000000000000..53810af26380b --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c @@ -0,0 +1,62 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); +} diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c new file mode 100644 index 0000000000000..7bd61966270e2 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c @@ -0,0 +1,51 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK +} + +//LEDs are inverted on F411 DISCO +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { +} + + diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c new file mode 100644 index 0000000000000..b1208418609b0 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c @@ -0,0 +1,173 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 9, &pin_PB03), + I2C_SDA(3, 4, &pin_PC09), + I2C_SDA(3, 9, &pin_PB04), +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +// SPI + +SPI_TypeDef * mcu_spi_banks[4] = {SPI1, SPI2, SPI3, SPI4}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[9] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), + SPI(4, 5, &pin_PE02), + SPI(4, 5, &pin_PE12), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PE06), + SPI(4, 5, &pin_PE14), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[8] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), + SPI(4, 5, &pin_PE05), + SPI(4, 5, &pin_PE13), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[9] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(4, 5, &pin_PE11), +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[6] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(6, 8, &pin_PC06), + UART(2, 7, &pin_PD05), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[6] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB07), + UART(6, 8, &pin_PC07), + UART(2, 7, &pin_PD06), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10, + TIM11, NULL, NULL, NULL}; + +//#define TIM(index, alt, channel, tim_pin) +const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h new file mode 100644 index 0000000000000..6085f1ff2b571 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[4]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[9]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[8]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[9]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[6]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 44 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c new file mode 100644 index 0000000000000..7e88c3dcbab8e --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c @@ -0,0 +1,123 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); //SWDIO +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); //SWCLK +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); //JTDI + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h new file mode 100644 index 0000000000000..09bc8f13e3861 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h @@ -0,0 +1,121 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H + +//Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only +//pg 38 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +//pg 39 +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +//pg 40 +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +//pg 41 +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +extern const mcu_pin_obj_t pin_PE15; +//pg 42 +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 43 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +//pg 44 +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; +//pg 45 +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +//pg 46 +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c new file mode 100644 index 0000000000000..2afca64e831b5 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c @@ -0,0 +1,64 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. + + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); +} diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c new file mode 100644 index 0000000000000..d1eaa90d1b193 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c @@ -0,0 +1,60 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //Enable all GPIO for now + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK + // never_reset_pin_number(0,15); //PA15 JTDI + // never_reset_pin_number(1,3); //PB3 JTDO + // never_reset_pin_number(1,4); //PB4 JTRST + + // Port H is not included in GPIO port array + // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,1); //PH1 JTRST +} + +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { + +} + + diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c new file mode 100644 index 0000000000000..bc03f7c7bebd2 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c @@ -0,0 +1,194 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 4, &pin_PB11), + I2C_SDA(3, 4, &pin_PC09), +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { + UART(4, 8, &pin_PA00), + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(4, 8, &pin_PC10), + UART(5, 8, &pin_PC12), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(4, 8, &pin_PA01), + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(4, 8, &pin_PC11), + UART(5, 8, &pin_PD02), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, + TIM11, TIM12, TIM13, TIM14}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(13,9,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(14,9,1,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(2,1,4,&pin_PB11), + TIM(12,9,1,&pin_PB14), + TIM(12,9,2,&pin_PB15), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(8,3,1,&pin_PC06), + TIM(8,3,2,&pin_PC07), + TIM(8,3,3,&pin_PC08), + TIM(8,3,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), + TIM(10,3,1,&pin_PF06), + TIM(11,3,1,&pin_PF07), + TIM(13,9,1,&pin_PF08), + TIM(14,9,1,&pin_PF09), + // TIM(12,9,1,&pin_PH06), //TODO: include these when pin map is expanded + // TIM(12,9,2,&pin_PH09), + // TIM(5,2,1,&pin_PH10), + // TIM(5,2,2,&pin_PH11), + // TIM(5,2,3,&pin_PH12), + // TIM(5,2,4,&pin_PI00), + // TIM(8,3,4,&pin_PI02), + // TIM(8,3,1,&pin_PI05), + // TIM(8,3,2,&pin_PI06), + // TIM(8,3,3,&pin_PI07), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h new file mode 100644 index 0000000000000..e87e798574b93 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[3]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 56 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c new file mode 100644 index 0000000000000..86445fe140d0d --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_123,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1 + +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h new file mode 100644 index 0000000000000..180f5c316fa5e --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h @@ -0,0 +1,158 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H + +//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only +//pg 50 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +//pg 51 +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only +//pg 52 +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +//pg 53 +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PC04; +//pg 54 +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only +//pg 55 +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +//pg 56 +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; // 144 only +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +//pg 57 +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 58 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PG02; // 144 only +extern const mcu_pin_obj_t pin_PG03; // 144 only +extern const mcu_pin_obj_t pin_PG04; // 144 only +extern const mcu_pin_obj_t pin_PG05; // 144 only +extern const mcu_pin_obj_t pin_PG06; // 144 only +extern const mcu_pin_obj_t pin_PG07; // 144 only +extern const mcu_pin_obj_t pin_PG08; // 144 only +//pg 59 +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +//pg 60 +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +//pg 61 +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +//pg 62 +extern const mcu_pin_obj_t pin_PG09; // 144 only +extern const mcu_pin_obj_t pin_PG10; // 144 only +extern const mcu_pin_obj_t pin_PG11; // 144 only +extern const mcu_pin_obj_t pin_PG12; // 144 only +extern const mcu_pin_obj_t pin_PG13; // 144 only +extern const mcu_pin_obj_t pin_PG14; // 144 only +extern const mcu_pin_obj_t pin_PG15; // 144 only +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +//pg 63 +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c new file mode 100644 index 0000000000000..2afca64e831b5 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c @@ -0,0 +1,64 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. + + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); +} diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c new file mode 100644 index 0000000000000..d1eaa90d1b193 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c @@ -0,0 +1,60 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //Enable all GPIO for now + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK + // never_reset_pin_number(0,15); //PA15 JTDI + // never_reset_pin_number(1,3); //PB3 JTDO + // never_reset_pin_number(1,4); //PB4 JTRST + + // Port H is not included in GPIO port array + // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,1); //PH1 JTRST +} + +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { + +} + + diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c new file mode 100644 index 0000000000000..bc03f7c7bebd2 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c @@ -0,0 +1,194 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 4, &pin_PB11), + I2C_SDA(3, 4, &pin_PC09), +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { + UART(4, 8, &pin_PA00), + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(4, 8, &pin_PC10), + UART(5, 8, &pin_PC12), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(4, 8, &pin_PA01), + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(4, 8, &pin_PC11), + UART(5, 8, &pin_PD02), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, + TIM11, TIM12, TIM13, TIM14}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(13,9,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(14,9,1,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(2,1,4,&pin_PB11), + TIM(12,9,1,&pin_PB14), + TIM(12,9,2,&pin_PB15), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(8,3,1,&pin_PC06), + TIM(8,3,2,&pin_PC07), + TIM(8,3,3,&pin_PC08), + TIM(8,3,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), + TIM(10,3,1,&pin_PF06), + TIM(11,3,1,&pin_PF07), + TIM(13,9,1,&pin_PF08), + TIM(14,9,1,&pin_PF09), + // TIM(12,9,1,&pin_PH06), //TODO: include these when pin map is expanded + // TIM(12,9,2,&pin_PH09), + // TIM(5,2,1,&pin_PH10), + // TIM(5,2,2,&pin_PH11), + // TIM(5,2,3,&pin_PH12), + // TIM(5,2,4,&pin_PI00), + // TIM(8,3,4,&pin_PI02), + // TIM(8,3,1,&pin_PI05), + // TIM(8,3,2,&pin_PI06), + // TIM(8,3,3,&pin_PI07), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h new file mode 100644 index 0000000000000..e87e798574b93 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[3]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 56 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c new file mode 100644 index 0000000000000..86445fe140d0d --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_123,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1 + +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h new file mode 100644 index 0000000000000..180f5c316fa5e --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h @@ -0,0 +1,158 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H + +//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only +//pg 50 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +//pg 51 +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only +//pg 52 +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +//pg 53 +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PC04; +//pg 54 +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only +//pg 55 +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +//pg 56 +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; // 144 only +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +//pg 57 +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 58 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PG02; // 144 only +extern const mcu_pin_obj_t pin_PG03; // 144 only +extern const mcu_pin_obj_t pin_PG04; // 144 only +extern const mcu_pin_obj_t pin_PG05; // 144 only +extern const mcu_pin_obj_t pin_PG06; // 144 only +extern const mcu_pin_obj_t pin_PG07; // 144 only +extern const mcu_pin_obj_t pin_PG08; // 144 only +//pg 59 +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +//pg 60 +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +//pg 61 +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +//pg 62 +extern const mcu_pin_obj_t pin_PG09; // 144 only +extern const mcu_pin_obj_t pin_PG10; // 144 only +extern const mcu_pin_obj_t pin_PG11; // 144 only +extern const mcu_pin_obj_t pin_PG12; // 144 only +extern const mcu_pin_obj_t pin_PG13; // 144 only +extern const mcu_pin_obj_t pin_PG14; // 144 only +extern const mcu_pin_obj_t pin_PG15; // 144 only +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +//pg 63 +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c new file mode 100644 index 0000000000000..53810af26380b --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c @@ -0,0 +1,62 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); +} diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c new file mode 100644 index 0000000000000..aee0bd5eb8696 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c @@ -0,0 +1,59 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "py/mpconfig.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + + #if !(BOARD_OVERWRITE_SWD) + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK + #endif + + // Port H is not included in GPIO port array + // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,1); //PH1 JTRST +} + +//LEDs are inverted on F411 DISCO +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { +} + + diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c new file mode 100644 index 0000000000000..b7d9edf4f7eec --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c @@ -0,0 +1,194 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[7] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 9, &pin_PB09), + I2C_SDA(2, 9, &pin_PB03), + I2C_SDA(3, 4, &pin_PC09), + I2C_SDA(3, 9, &pin_PB04), + I2C_SDA(3, 9, &pin_PB08) +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +// SPI + +SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 7, &pin_PB12), + SPI(3, 6, &pin_PC10), + SPI(4, 6, &pin_PB13), + SPI(4, 5, &pin_PE02), + SPI(4, 5, &pin_PE12), + SPI(5, 6, &pin_PB00), + SPI(5, 6, &pin_PE02), + SPI(5, 6, &pin_PE12) +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PA01), + SPI(4, 5, &pin_PE06), + SPI(4, 5, &pin_PE14), + SPI(5, 6, &pin_PA10), + SPI(5, 6, &pin_PB08), + SPI(5, 6, &pin_PE06), + SPI(5, 6, &pin_PE14) +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), + SPI(4, 6, &pin_PA11), + SPI(4, 5, &pin_PE05), + SPI(4, 5, &pin_PE13), + SPI(5, 6, &pin_PA12), + SPI(5, 6, &pin_PE05), + SPI(5, 6, &pin_PE13) +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(4, 5, &pin_PE11), + SPI(5, 6, &pin_PB01), + SPI(5, 6, &pin_PE04), + SPI(5, 6, &pin_PE11) +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[7] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(6, 8, &pin_PC06), + UART(2, 7, &pin_PD05), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[7] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(6, 8, &pin_PC07), + UART(2, 7, &pin_PD06), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10, + TIM11, NULL, NULL, NULL}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h new file mode 100644 index 0000000000000..d657d73b68475 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[7]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[5]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 44 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c new file mode 100644 index 0000000000000..7e88c3dcbab8e --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c @@ -0,0 +1,123 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); //SWDIO +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); //SWCLK +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); //JTDI + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h new file mode 100644 index 0000000000000..37d3a5cf11953 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h @@ -0,0 +1,121 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H + +//Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only +//pg 38 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +//pg 39 +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +//pg 40 +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +//pg 41 +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +extern const mcu_pin_obj_t pin_PE15; +//pg 42 +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 43 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +//pg 44 +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; +//pg 45 +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +//pg 46 +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c new file mode 100644 index 0000000000000..b208f9dfb3754 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c @@ -0,0 +1,75 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the + * device is clocked below the maximum system frequency, to update the + * voltage scaling value regarding system frequency refer to product + * datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 200; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + RCC_OscInitStruct.PLL.PLLR = 2; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLLSAI output as USB clock source */ + PeriphClkInitStruct.PLLI2S.PLLI2SM = 8; + PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4; + PeriphClkInitStruct.PLLI2S.PLLI2SN = 192; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CK48; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ; + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + * clocks dividers */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); +} diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c new file mode 100644 index 0000000000000..d17ab4e0181e6 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c @@ -0,0 +1,243 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/* GPIO PIN REFERENCE +#define LED3_Pin GPIO_PIN_2 +#define LED3_GPIO_Port GPIOE +#define LED4_Pin GPIO_PIN_3 +#define LED4_GPIO_Port GPIOE +#define DFSDM_DATIN3_Pin GPIO_PIN_4 +#define DFSDM_DATIN3_GPIO_Port GPIOE +#define A0_Pin GPIO_PIN_0 +#define A0_GPIO_Port GPIOF +#define LCD_BLCTRL_Pin GPIO_PIN_5 +#define LCD_BLCTRL_GPIO_Port GPIOF +#define QSPI_BK1_IO3_Pin GPIO_PIN_6 +#define QSPI_BK1_IO3_GPIO_Port GPIOF +#define QSPI_BK1_IO2_Pin GPIO_PIN_7 +#define QSPI_BK1_IO2_GPIO_Port GPIOF +#define QSPI_BK1_IO0_Pin GPIO_PIN_8 +#define QSPI_BK1_IO0_GPIO_Port GPIOF +#define QSPI_BK1_IO1_Pin GPIO_PIN_9 +#define QSPI_BK1_IO1_GPIO_Port GPIOF +#define STLK_MCO_Pin GPIO_PIN_0 +#define STLK_MCO_GPIO_Port GPIOH +#define DFSDM_CKOUT_Pin GPIO_PIN_2 +#define DFSDM_CKOUT_GPIO_Port GPIOC +#define JOY_SEL_Pin GPIO_PIN_0 +#define JOY_SEL_GPIO_Port GPIOA +#define STLINK_RX_Pin GPIO_PIN_2 +#define STLINK_RX_GPIO_Port GPIOA +#define STLINK_TX_Pin GPIO_PIN_3 +#define STLINK_TX_GPIO_Port GPIOA +#define CODEC_I2S3_WS_Pin GPIO_PIN_4 +#define CODEC_I2S3_WS_GPIO_Port GPIOA +#define DFSDM_DATIN0_Pin GPIO_PIN_1 +#define DFSDM_DATIN0_GPIO_Port GPIOB +#define QSPI_CLK_Pin GPIO_PIN_2 +#define QSPI_CLK_GPIO_Port GPIOB +#define EXT_RESET_Pin GPIO_PIN_11 +#define EXT_RESET_GPIO_Port GPIOF +#define CTP_RST_Pin GPIO_PIN_12 +#define CTP_RST_GPIO_Port GPIOF +#define JOY_RIGHT_Pin GPIO_PIN_14 +#define JOY_RIGHT_GPIO_Port GPIOF +#define JOY_LEFT_Pin GPIO_PIN_15 +#define JOY_LEFT_GPIO_Port GPIOF +#define JOY_UP_Pin GPIO_PIN_0 +#define JOY_UP_GPIO_Port GPIOG +#define JOY_DOWN_Pin GPIO_PIN_1 +#define JOY_DOWN_GPIO_Port GPIOG +#define D4_Pin GPIO_PIN_7 +#define D4_GPIO_Port GPIOE +#define D5_Pin GPIO_PIN_8 +#define D5_GPIO_Port GPIOE +#define D6_Pin GPIO_PIN_9 +#define D6_GPIO_Port GPIOE +#define D7_Pin GPIO_PIN_10 +#define D7_GPIO_Port GPIOE +#define D8_Pin GPIO_PIN_11 +#define D8_GPIO_Port GPIOE +#define D9_Pin GPIO_PIN_12 +#define D9_GPIO_Port GPIOE +#define D10_Pin GPIO_PIN_13 +#define D10_GPIO_Port GPIOE +#define D11_Pin GPIO_PIN_14 +#define D11_GPIO_Port GPIOE +#define D12_Pin GPIO_PIN_15 +#define D12_GPIO_Port GPIOE +#define I2C2_SCL_Pin GPIO_PIN_10 +#define I2C2_SCL_GPIO_Port GPIOB +#define M2_CKIN_Pin GPIO_PIN_11 +#define M2_CKIN_GPIO_Port GPIOB +#define CODEC_I2S3_SCK_Pin GPIO_PIN_12 +#define CODEC_I2S3_SCK_GPIO_Port GPIOB +#define D13_Pin GPIO_PIN_8 +#define D13_GPIO_Port GPIOD +#define D14_Pin GPIO_PIN_9 +#define D14_GPIO_Port GPIOD +#define D15_Pin GPIO_PIN_10 +#define D15_GPIO_Port GPIOD +#define LCD_RESET_Pin GPIO_PIN_11 +#define LCD_RESET_GPIO_Port GPIOD +#define D0_Pin GPIO_PIN_14 +#define D0_GPIO_Port GPIOD +#define D1_Pin GPIO_PIN_15 +#define D1_GPIO_Port GPIOD +#define CODEC_INT_Pin GPIO_PIN_2 +#define CODEC_INT_GPIO_Port GPIOG +#define LCD_TE_Pin GPIO_PIN_4 +#define LCD_TE_GPIO_Port GPIOG +#define CTP_INT_Pin GPIO_PIN_5 +#define CTP_INT_GPIO_Port GPIOG +#define QSPI_BK1_NCS_Pin GPIO_PIN_6 +#define QSPI_BK1_NCS_GPIO_Port GPIOG +#define USB_OTGFS_OVRCR_Pin GPIO_PIN_7 +#define USB_OTGFS_OVRCR_GPIO_Port GPIOG +#define USB_OTGFS_PPWR_EN_Pin GPIO_PIN_8 +#define USB_OTGFS_PPWR_EN_GPIO_Port GPIOG +#define CODEC_I2S3_MCK_Pin GPIO_PIN_7 +#define CODEC_I2S3_MCK_GPIO_Port GPIOC +#define uSD_D0_Pin GPIO_PIN_8 +#define uSD_D0_GPIO_Port GPIOC +#define uSD_D1_Pin GPIO_PIN_9 +#define uSD_D1_GPIO_Port GPIOC +#define M2_CKINA8_Pin GPIO_PIN_8 +#define M2_CKINA8_GPIO_Port GPIOA +#define USB_OTGFS_VBUS_Pin GPIO_PIN_9 +#define USB_OTGFS_VBUS_GPIO_Port GPIOA +#define USB_OTGFS_ID_Pin GPIO_PIN_10 +#define USB_OTGFS_ID_GPIO_Port GPIOA +#define USB_OTGFS_DM_Pin GPIO_PIN_11 +#define USB_OTGFS_DM_GPIO_Port GPIOA +#define USB_OTGFS_DP_Pin GPIO_PIN_12 +#define USB_OTGFS_DP_GPIO_Port GPIOA +#define SWDIO_Pin GPIO_PIN_13 +#define SWDIO_GPIO_Port GPIOA +#define SWCLK_Pin GPIO_PIN_14 +#define SWCLK_GPIO_Port GPIOA +#define uSD_D2_Pin GPIO_PIN_10 +#define uSD_D2_GPIO_Port GPIOC +#define uSD_D3_Pin GPIO_PIN_11 +#define uSD_D3_GPIO_Port GPIOC +#define uSD_CLK_Pin GPIO_PIN_12 +#define uSD_CLK_GPIO_Port GPIOC +#define D2_Pin GPIO_PIN_0 +#define D2_GPIO_Port GPIOD +#define D3_Pin GPIO_PIN_1 +#define D3_GPIO_Port GPIOD +#define uSD_CMD_Pin GPIO_PIN_2 +#define uSD_CMD_GPIO_Port GPIOD +#define uSD_DETECT_Pin GPIO_PIN_3 +#define uSD_DETECT_GPIO_Port GPIOD +#define FMC_NOE_Pin GPIO_PIN_4 +#define FMC_NOE_GPIO_Port GPIOD +#define FMC_NWE_Pin GPIO_PIN_5 +#define FMC_NWE_GPIO_Port GPIOD +#define FMC_NE1_Pin GPIO_PIN_7 +#define FMC_NE1_GPIO_Port GPIOD +#define SWO_Pin GPIO_PIN_3 +#define SWO_GPIO_Port GPIOB +#define CODEC_I2S3ext_SD_Pin GPIO_PIN_4 +#define CODEC_I2S3ext_SD_GPIO_Port GPIOB +#define CODEC_I2S3_SD_Pin GPIO_PIN_5 +#define CODEC_I2S3_SD_GPIO_Port GPIOB +#define I2C1_SCL_Pin GPIO_PIN_6 +#define I2C1_SCL_GPIO_Port GPIOB +#define I2C1_SDA_Pin GPIO_PIN_7 +#define I2C1_SDA_GPIO_Port GPIOB +#define I2C2_SDA_Pin GPIO_PIN_9 +#define I2C2_SDA_GPIO_Port GPIOB +#define LED1_Pin GPIO_PIN_0 +#define LED1_GPIO_Port GPIOE +#define LED2_Pin GPIO_PIN_1 +#define LED2_GPIO_Port GPIOE +*/ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //Enable all GPIO for now + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_RESET); + //HAL_GPIO_WritePin(USB_OTGFS_PPWR_EN_GPIO_Port, USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_SET); + + //Configure LED pins + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + //Status LED chain + stm32f4_peripherals_status_led(0,1); + stm32f4_peripherals_status_led(1,0); + stm32f4_peripherals_status_led(2,0); + stm32f4_peripherals_status_led(3,0); + + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK + //never_reset_pin_number(0,15); //PA15 JTDI + //never_reset_pin_number(1,3); //PB3 JTDO + //never_reset_pin_number(1,4); //PB4 JTRST + + // Port H is not included in GPIO port array + // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,1); //PH1 JTRST +} + +//LEDs are inverted on F411 DISCO +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { + switch(led) + { + case 0: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0, (state ^ 1)); + break; + case 1: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, (state ^ 1)); + break; + case 2: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, (state ^ 1)); + break; + case 3: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, (state ^ 1)); + break; + default: break; + } +} + + diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c new file mode 100644 index 0000000000000..f5effa80ed0f0 --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c @@ -0,0 +1,223 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 4, &pin_PB11), //not on LQFP100 + I2C_SDA(2, 9, &pin_PB09), + I2C_SDA(2, 9, &pin_PB03), + I2C_SDA(3, 4, &pin_PC09), + I2C_SDA(3, 9, &pin_PB04), + I2C_SDA(3, 9, &pin_PB08) +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +// SPI + +SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 7, &pin_PB12), + SPI(3, 6, &pin_PC10), + SPI(4, 6, &pin_PB13), + SPI(4, 5, &pin_PE02), + SPI(4, 5, &pin_PE12), + SPI(5, 6, &pin_PB00), + SPI(5, 6, &pin_PE02), + SPI(5, 6, &pin_PE12) +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PA01), + SPI(4, 5, &pin_PE06), + SPI(4, 5, &pin_PE14), + SPI(5, 6, &pin_PA10), + SPI(5, 6, &pin_PB08), + SPI(5, 6, &pin_PE06), + SPI(5, 6, &pin_PE14) +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), + SPI(4, 6, &pin_PA11), + SPI(4, 5, &pin_PE05), + SPI(4, 5, &pin_PE13), + SPI(5, 6, &pin_PA12), + SPI(5, 6, &pin_PE05), + SPI(5, 6, &pin_PE13) +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(4, 5, &pin_PE11), + SPI(5, 6, &pin_PB01), + SPI(5, 6, &pin_PE04), + SPI(5, 6, &pin_PE11) +}; + +//UART + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[11] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(3, 7, &pin_PC05), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, + TIM11, TIM12, TIM13, TIM14}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[60] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(13,9,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(14,9,1,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(2,1,4,&pin_PB11), + TIM(12,9,1,&pin_PB14), + TIM(12,9,2,&pin_PB15), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(8,3,1,&pin_PC06), + TIM(8,3,2,&pin_PC07), + TIM(8,3,3,&pin_PC08), + TIM(8,3,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), + TIM(10,3,1,&pin_PF06), + TIM(11,3,1,&pin_PF07), + TIM(13,9,1,&pin_PF08), + TIM(14,9,1,&pin_PF09), + TIM(5,2,1,&pin_PF03), + TIM(5,2,2,&pin_PF04), + TIM(5,2,3,&pin_PF05), + TIM(5,2,4,&pin_PF10), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h new file mode 100644 index 0000000000000..e0141e6dab7cc --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h @@ -0,0 +1,58 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + + +//SPI +extern SPI_TypeDef * mcu_spi_banks[5]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 60 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c new file mode 100644 index 0000000000000..c56de5a2950cc --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); + +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h new file mode 100644 index 0000000000000..180f5c316fa5e --- /dev/null +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h @@ -0,0 +1,158 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H + +//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only +//pg 50 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +//pg 51 +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only +//pg 52 +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +//pg 53 +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PC04; +//pg 54 +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only +//pg 55 +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +//pg 56 +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; // 144 only +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +//pg 57 +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 58 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PG02; // 144 only +extern const mcu_pin_obj_t pin_PG03; // 144 only +extern const mcu_pin_obj_t pin_PG04; // 144 only +extern const mcu_pin_obj_t pin_PG05; // 144 only +extern const mcu_pin_obj_t pin_PG06; // 144 only +extern const mcu_pin_obj_t pin_PG07; // 144 only +extern const mcu_pin_obj_t pin_PG08; // 144 only +//pg 59 +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +//pg 60 +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +//pg 61 +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +//pg 62 +extern const mcu_pin_obj_t pin_PG09; // 144 only +extern const mcu_pin_obj_t pin_PG10; // 144 only +extern const mcu_pin_obj_t pin_PG11; // 144 only +extern const mcu_pin_obj_t pin_PG12; // 144 only +extern const mcu_pin_obj_t pin_PG13; // 144 only +extern const mcu_pin_obj_t pin_PG14; // 144 only +extern const mcu_pin_obj_t pin_PG15; // 144 only +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +//pg 63 +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H diff --git a/ports/qemu-arm/qstrdefsport.h b/ports/stm/qstrdefsport.h similarity index 100% rename from ports/qemu-arm/qstrdefsport.h rename to ports/stm/qstrdefsport.h diff --git a/ports/stm/st_driver b/ports/stm/st_driver new file mode 160000 index 0000000000000..3fc2e0f3db155 --- /dev/null +++ b/ports/stm/st_driver @@ -0,0 +1 @@ +Subproject commit 3fc2e0f3db155b33177bb0705e0dd65cadb58412 diff --git a/ports/stm/supervisor/cpu.s b/ports/stm/supervisor/cpu.s new file mode 100755 index 0000000000000..9e6807a5e2e99 --- /dev/null +++ b/ports/stm/supervisor/cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/stm/supervisor/internal_flash.c b/ports/stm/supervisor/internal_flash.c new file mode 100644 index 0000000000000..046b26baf2786 --- /dev/null +++ b/ports/stm/supervisor/internal_flash.c @@ -0,0 +1,204 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/internal_flash.h" + +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#include "stm32f4xx_hal.h" + +typedef struct { + uint32_t base_address; + uint32_t sector_size; + uint32_t sector_count; +} flash_layout_t; + +/*------------------------------------------------------------------*/ +/* Internal Flash API + *------------------------------------------------------------------*/ + +static const flash_layout_t flash_layout[] = { + { 0x08000000, 0x04000, 4 }, + { 0x08010000, 0x10000, 1 }, + { 0x08020000, 0x20000, 3 }, + #if defined(FLASH_SECTOR_8) + { 0x08080000, 0x20000, 4 }, + #endif + #if defined(FLASH_SECTOR_12) + { 0x08100000, 0x04000, 4 }, + { 0x08110000, 0x10000, 1 }, + { 0x08120000, 0x20000, 7 }, + #endif +}; + +static uint8_t sector_copy[0x4000] __attribute__((aligned(4))); + +//Return the sector of a given flash address. +uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { + if (addr >= flash_layout[0].base_address) { + uint32_t sector_index = 0; + for (uint8_t i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { + for (uint8_t j = 0; j < flash_layout[i].sector_count; ++j) { + uint32_t sector_start_next = flash_layout[i].base_address + + (j + 1) * flash_layout[i].sector_size; + if (addr < sector_start_next) { + if (start_addr != NULL) { + *start_addr = flash_layout[i].base_address + + j * flash_layout[i].sector_size; + } + if (size != NULL) { + *size = flash_layout[i].sector_size; + } + return sector_index; + } + ++sector_index; + } + } + } + return 0; +} + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS; +} + +void supervisor_flash_flush(void) { +} + +static int32_t convert_block_to_flash_addr(uint32_t block) { + if (0 <= block && block < INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS) { + // a block in partition 1 + return INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; + } + // bad block + return -1; +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + int32_t src = convert_block_to_flash_addr(block); + if (src == -1) { + // bad block number + return false; + } + memcpy(dest, (uint8_t*) src, FILESYSTEM_BLOCK_SIZE*num_blocks); + return 0; // success +} + +bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { + int32_t dest = convert_block_to_flash_addr(block); + if (dest == -1) { + // bad block number + mp_printf(&mp_plat_print, "BAD FLASH BLOCK ERROR"); + return false; + } + + // unlock flash + HAL_FLASH_Unlock(); + + // set up for erase + FLASH_EraseInitTypeDef EraseInitStruct; + EraseInitStruct.TypeErase = TYPEERASE_SECTORS; + EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V + // get the sector information + uint32_t sector_size; + uint32_t sector_start_addr; + EraseInitStruct.Sector = flash_get_sector_info(dest, §or_start_addr, §or_size); + EraseInitStruct.NbSectors = 1; + if (sector_size>0x4000) return false; + + // copy the sector + memcpy(sector_copy,(void *)sector_start_addr,sector_size); + + // // overwrite sector data + memcpy(sector_copy+(dest-sector_start_addr),src,FILESYSTEM_BLOCK_SIZE); + + // find end address, subtract for number of sectors + // Shouldn't be required since blocks will always fit in a single sector, they should never overlap + //EraseInitStruct.NbSectors = flash_get_sector_info(dest + FILESYSTEM_BLOCK_SIZE - 1, NULL, NULL) - EraseInitStruct.Sector + 1; + + // erase the sector + uint32_t SectorError = 0; + if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { + // error occurred during sector erase + HAL_FLASH_Lock(); // lock the flash + mp_printf(&mp_plat_print, "FLASH SECTOR ERASE ERROR"); + return false; + } + + __HAL_FLASH_DATA_CACHE_DISABLE(); + __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); + + __HAL_FLASH_DATA_CACHE_RESET(); + __HAL_FLASH_INSTRUCTION_CACHE_RESET(); + + __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); + __HAL_FLASH_DATA_CACHE_ENABLE(); + + // reprogram the sector + for (uint32_t i = 0; i < sector_size; i++) { + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, sector_start_addr, (uint64_t)sector_copy[i]) != HAL_OK) { + // error occurred during flash write + HAL_FLASH_Lock(); // lock the flash + mp_printf(&mp_plat_print, "FLASH WRITE ERROR"); + return false; + } + sector_start_addr += 1; + } + + // lock the flash + HAL_FLASH_Lock(); + + return true; +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + + for (size_t i = 0; i < num_blocks; i++) { + if (!supervisor_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { + return 1; // error + } + } + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h new file mode 100644 index 0000000000000..859470ff0983f --- /dev/null +++ b/ports/stm/supervisor/internal_flash.h @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#ifdef STM32F401xE +#define STM32_FLASH_SIZE 0x80000 //512KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + +#ifdef STM32F411xE +#define STM32_FLASH_SIZE 0x80000 //512KiB +#ifdef CIRCUITPY_NVM +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x8000 //32KiB +#else +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif +#endif + +#ifdef STM32F412Zx +#define STM32_FLASH_SIZE 0x100000 //1MB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + +#ifdef STM32F405xx +#define STM32_FLASH_SIZE 0x100000 //1MB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + +#ifdef STM32F407xx +#define STM32_FLASH_SIZE 0x100000 //1MB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + +#define STM32_FLASH_OFFSET 0x8000000 //All STM32 chips map to this flash location + +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 +#define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#endif // MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_H diff --git a/ports/stm/supervisor/internal_flash_root_pointers.h b/ports/stm/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000000..7a8681bd95cb5 --- /dev/null +++ b/ports/stm/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_STM32F4_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c new file mode 100644 index 0000000000000..948e9f2e4a67e --- /dev/null +++ b/ports/stm/supervisor/port.c @@ -0,0 +1,108 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "supervisor/port.h" +#include "boards/board.h" +#include "tick.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/busio/I2C.h" +#include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PulseIn.h" + +#include "stm32f4/clocks.h" +#include "stm32f4/gpio.h" + +#include "stm32f4xx_hal.h" + +safe_mode_t port_init(void) { + HAL_Init(); + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + stm32f4_peripherals_clocks_init(); + stm32f4_peripherals_gpio_init(); + + tick_init(); + + return NO_SAFE_MODE; +} + +void reset_port(void) { + reset_all_pins(); + i2c_reset(); + spi_reset(); + uart_reset(); + pwmout_reset(); + pulseout_reset(); + pulsein_reset(); +} + +void reset_to_bootloader(void) { + +} + +void reset_cpu(void) { + NVIC_SystemReset(); +} + +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + +uint32_t *port_stack_get_limit(void) { + return &_ebss; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +extern uint32_t _ebss; +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + _ebss = value; +} + +uint32_t port_get_saved_word(void) { + return _ebss; +} + +void HardFault_Handler(void) { + reset_into_safe_mode(HARD_CRASH); + while (true) { + asm("nop;"); + } +} diff --git a/ports/stm/supervisor/qspi_flash.c b/ports/stm/supervisor/qspi_flash.c new file mode 100644 index 0000000000000..f3915273b38b9 --- /dev/null +++ b/ports/stm/supervisor/qspi_flash.c @@ -0,0 +1,162 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/spi_flash_api.h" + +#include +#include + +#include "py/mpconfig.h" // for EXTERNAL_FLASH_QSPI_DUAL +//#include "nrfx_qspi.h" + +//#include "shared-bindings/microcontroller/__init__.h" + +#include "supervisor/shared/external_flash/common_commands.h" +#include "supervisor/shared/external_flash/qspi_flash.h" + +bool spi_flash_command(uint8_t command) { + // nrf_qspi_cinstr_conf_t cinstr_cfg = { + // .opcode = command, + // .length = 1, + // .io2_level = true, + // .io3_level = true, + // .wipwait = false, + // .wren = false + // }; + return false; //nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL) == NRFX_SUCCESS; +} + +bool spi_flash_read_command(uint8_t command, uint8_t* response, uint32_t length) { + // nrf_qspi_cinstr_conf_t cinstr_cfg = { + // .opcode = command, + // .length = length + 1, + // .io2_level = true, + // .io3_level = true, + // .wipwait = false, + // .wren = false + // }; + // return nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, response) == NRFX_SUCCESS; + return false; + +} + +bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t length) { + // nrf_qspi_cinstr_conf_t cinstr_cfg = { + // .opcode = command, + // .length = length + 1, + // .io2_level = true, + // .io3_level = true, + // .wipwait = false, + // .wren = false // We do this manually. + // }; + // return nrfx_qspi_cinstr_xfer(&cinstr_cfg, data, NULL) == NRFX_SUCCESS; + return false; +} + +bool spi_flash_sector_command(uint8_t command, uint32_t address) { + // if (command != CMD_SECTOR_ERASE) { + // return false; + // } + // return nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, address) == NRFX_SUCCESS; + return false; +} + +bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) { + // return nrfx_qspi_write(data, length, address) == NRFX_SUCCESS; + return false; +} + +bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) { + // return nrfx_qspi_read(data, length, address) == NRFX_SUCCESS; + return false; +} + +void spi_flash_init(void) { + // Init QSPI flash +// nrfx_qspi_config_t qspi_cfg = { +// .xip_offset = 0, +// .pins = { +// .sck_pin = MICROPY_QSPI_SCK, +// .csn_pin = MICROPY_QSPI_CS, +// .io0_pin = MICROPY_QSPI_DATA0, +// .io1_pin = NRF_QSPI_PIN_NOT_CONNECTED, +// .io2_pin = NRF_QSPI_PIN_NOT_CONNECTED, +// .io3_pin = NRF_QSPI_PIN_NOT_CONNECTED, + +// }, +// .prot_if = { +// .readoc = NRF_QSPI_READOC_FASTREAD, +// .writeoc = NRF_QSPI_WRITEOC_PP, +// .addrmode = NRF_QSPI_ADDRMODE_24BIT, +// .dpmconfig = false +// }, +// .phy_if = { +// .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2MHz and speed up once we know what we're talking to. +// .sck_delay = 10, // min time CS must stay high before going low again. in unit of 62.5 ns +// .spi_mode = NRF_QSPI_MODE_0, +// .dpmen = false +// }, +// .irq_priority = 7, +// }; + +// #if EXTERNAL_FLASH_QSPI_DUAL +// qspi_cfg.pins.io1_pin = MICROPY_QSPI_DATA1; +// qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ2O; +// qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP2O; +// #else +// qspi_cfg.pins.io1_pin = MICROPY_QSPI_DATA1; +// qspi_cfg.pins.io2_pin = MICROPY_QSPI_DATA2; +// qspi_cfg.pins.io3_pin = MICROPY_QSPI_DATA3; +// qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ4IO; +// qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O; +// #endif + +// // No callback for blocking API +// nrfx_qspi_init(&qspi_cfg, NULL, NULL); +} + +void spi_flash_init_device(const external_flash_device* device) { + // check_quad_enable(device); + + // // Switch to single output line if the device doesn't support quad programs. + // if (!device->supports_qspi_writes) { + // NRF_QSPI->IFCONFIG0 &= ~QSPI_IFCONFIG0_WRITEOC_Msk; + // NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP << QSPI_IFCONFIG0_WRITEOC_Pos; + // } + + // // Speed up as much as we can. + // // Start at 16 MHz and go down. + // // At 32 MHz GD25Q16C doesn't work reliably on Feather 52840, even though it should work up to 104 MHz. + // // sckfreq = 0 is 32 Mhz + // // sckfreq = 1 is 16 MHz, etc. + // uint8_t sckfreq = 1; + // while (32000000 / (sckfreq + 1) > device->max_clock_speed_mhz * 1000000 && sckfreq < 16) { + // sckfreq += 1; + // } + // NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk; + // NRF_QSPI->IFCONFIG1 |= sckfreq << QSPI_IFCONFIG1_SCKFREQ_Pos; +} diff --git a/ports/stm/supervisor/serial.c b/ports/stm/supervisor/serial.c new file mode 100644 index 0000000000000..ce13660000041 --- /dev/null +++ b/ports/stm/supervisor/serial.c @@ -0,0 +1,75 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include +#include "supervisor/serial.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" + +UART_HandleTypeDef huart2; + +void serial_init(void) { + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart2) == HAL_OK) + { + stm32f4_peripherals_status_led(1,1); + } +} + +bool serial_connected(void) { + return true; +} + +char serial_read(void) { + uint8_t data; + HAL_UART_Receive(&huart2, &data, 1,500); + return data; +} + +bool serial_bytes_available(void) { + return __HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE); +} + +void serial_write(const char* text) { + serial_write_substring(text, strlen(text)); +} + +void serial_write_substring(const char *text, uint32_t len) { + if (len == 0) { + return; + } + HAL_UART_Transmit(&huart2, (uint8_t*)text, len, 5000); +} + diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c new file mode 100644 index 0000000000000..8bfdcde4030d5 --- /dev/null +++ b/ports/stm/supervisor/usb.c @@ -0,0 +1,119 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "tick.h" +#include "supervisor/usb.h" +#include "lib/utils/interrupt_char.h" +#include "lib/mp-readline/readline.h" +#include "stm32f4xx_hal.h" + +#include "py/mpconfig.h" + +#include "common-hal/microcontroller/Pin.h" + +STATIC void init_usb_vbus_sense(void) { + +#if (BOARD_NO_VBUS_SENSE) + // Disable VBUS sensing + #ifdef USB_OTG_GCCFG_VBDEN + // Deactivate VBUS Sensing B + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; + + // B-peripheral session valid override enable + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; + #else + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; + #endif +#else + // Enable VBUS hardware sensing + #ifdef USB_OTG_GCCFG_VBDEN + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; + #else + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS; + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN; // B Device sense + #endif +#endif +} + +void init_usb_hardware(void) { + //TODO: if future chips overload this with options, move to peripherals management. + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /**USB_OTG_FS GPIO Configuration + PA10 ------> USB_OTG_FS_ID + PA11 ------> USB_OTG_FS_DM + PA12 ------> USB_OTG_FS_DP + */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + + /* Configure DM DP Pins */ + GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + never_reset_pin_number(0, 11); + never_reset_pin_number(0, 12); + + /* Configure VBUS Pin */ +#if !(BOARD_NO_VBUS_SENSE) + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + never_reset_pin_number(0, 9); +#endif + + /* This for ID line debug */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + never_reset_pin_number(0, 10); + +#ifdef STM32F412Zx + /* Configure POWER_SWITCH IO pin (F412 ONLY)*/ + GPIO_InitStruct.Pin = GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + never_reset_pin_number(0, 8); +#endif + + /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + init_usb_vbus_sense(); +} diff --git a/ports/stm/system_stm32f4xx.c b/ports/stm/system_stm32f4xx.c new file mode 100644 index 0000000000000..caa4f9cafbd7b --- /dev/null +++ b/ports/stm/system_stm32f4xx.c @@ -0,0 +1,788 @@ +/* + * Taken from ST Cube library and modified. See below for original header. + * + * Modifications copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/** + ****************************************************************************** + * @file system_stm32f4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f4xx_system + * @{ + */ + +/** @addtogroup STM32F4xx_System_Private_Includes + * @{ + */ + + +#include "stm32f4xx.h" +#include "py/mpconfig.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\ + STM32F412Zx || STM32F412Vx */ + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +/* #define DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\ + STM32F479xx */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ +uint32_t SystemCoreClock = 16000000; +const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting, vector table location and External memory + * configuration. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + + /* Configure the Vector Table location add offset address ------------------*/ +#if !(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already + #ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ + #else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + #endif +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value + * depends on the application requirements), user has to ensure that HSE_VALUE + * is same as the real frequency of the crystal used. Otherwise, this function + * may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM) +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; + + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register __IO uint32_t index; + + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */ + RCC->AHB1ENR |= 0x000001F8; + + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + FMC_Bank5_6->SDCR[0] = 0x000019E4; + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ + FMC_Bank5_6->SDCMR = 0x00000073; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ + FMC_Bank5_6->SDCMR = 0x00046014; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ + + (void)(tmp); +} +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ +#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +#if defined (DATA_IN_ExtSDRAM) + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register __IO uint32_t index; + +#if defined(STM32F446xx) + /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface + clock */ + RCC->AHB1ENR |= 0x0000007D; +#else + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface + clock */ + RCC->AHB1ENR |= 0x000001F8; +#endif /* STM32F446xx */ + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + +#if defined(STM32F446xx) + /* Connect PAx pins to FMC Alternate function */ + GPIOA->AFR[0] |= 0xC0000000; + GPIOA->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOA->MODER |= 0x00008000; + /* Configure PDx pins speed to 50 MHz */ + GPIOA->OSPEEDR |= 0x00008000; + /* Configure PDx pins Output type to push-pull */ + GPIOA->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOA->PUPDR |= 0x00000000; + + /* Connect PCx pins to FMC Alternate function */ + GPIOC->AFR[0] |= 0x00CC0000; + GPIOC->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOC->MODER |= 0x00000A00; + /* Configure PDx pins speed to 50 MHz */ + GPIOC->OSPEEDR |= 0x00000A00; + /* Configure PDx pins Output type to push-pull */ + GPIOC->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOC->PUPDR |= 0x00000000; +#endif /* STM32F446xx */ + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x000000CC; + GPIOD->AFR[1] = 0xCC000CCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xA02A000A; + /* Configure PDx pins speed to 50 MHz */ + GPIOD->OSPEEDR = 0xA02A000A; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 50 MHz */ + GPIOE->OSPEEDR = 0xAAAA800A; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + /* Configure and enable SDRAM bank1 */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCR[0] = 0x00001954; +#else + FMC_Bank5_6->SDCR[0] = 0x000019E4; +#endif /* STM32F446xx */ + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x000000F3; +#else + FMC_Bank5_6->SDCMR = 0x00000073; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x00044014; +#else + FMC_Bank5_6->SDCMR = 0x00046014; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; +#if defined(STM32F446xx) + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1)); +#else + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); +#endif /* STM32F446xx */ + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); +#endif /* DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ + +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) + +#if defined(DATA_IN_ExtSRAM) +/*-- GPIOs Configuration -----------------------------------------------------*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR |= 0x00000078; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x000000C0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00085AAA; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000CAFFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FMC/FSMC Configuration --------------------------------------------------*/ + /* Enable the FMC/FSMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\ + || defined(STM32F412Zx) || defined(STM32F412Vx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN); + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001011; + FSMC_Bank1->BTCR[3] = 0x00000201; + FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF; +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */ + +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\ + STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */ + (void)(tmp); +} +#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/tick.c b/ports/stm/tick.c new file mode 100644 index 0000000000000..f4adf183aa66d --- /dev/null +++ b/ports/stm/tick.c @@ -0,0 +1,81 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" + +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "stm32f4xx.h" + +void SysTick_Handler(void) { + // SysTick interrupt handler called when the SysTick timer reaches zero + // (every millisecond). + + // Do things common to all ports when the tick occurs + supervisor_tick(); +} + +uint32_t HAL_GetTick(void) //override ST HAL +{ + return (uint32_t)supervisor_ticks_ms32(); +} + +void tick_init() { + uint32_t ticks_per_ms = SystemCoreClock/ 1000; + SysTick_Config(ticks_per_ms); // interrupt is enabled + + NVIC_EnableIRQ(SysTick_IRQn); + // Bump up the systick interrupt so nothing else interferes with timekeeping. + NVIC_SetPriority(SysTick_IRQn, 0); + NVIC_SetPriority(OTG_FS_IRQn, 1); +} + +void tick_delay(uint32_t us) { + uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + uint32_t us_between_ticks = SysTick->VAL / ticks_per_us; + uint64_t start_ms = supervisor_ticks_ms64(); + while (us > 1000) { + while (supervisor_ticks_ms64() == start_ms) {} + us -= us_between_ticks; + start_ms = supervisor_ticks_ms64(); + us_between_ticks = 1000; + } + while (SysTick->VAL > ((us_between_ticks - us) * ticks_per_us)) {} +} + +// us counts down! +void current_tick(uint64_t* ms, uint32_t* us_until_ms) { + uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + *ms = supervisor_ticks_ms32(); + *us_until_ms = SysTick->VAL / ticks_per_us; +} + +void wait_until(uint64_t ms, uint32_t us_until_ms) { + uint32_t ticks_per_us = SystemCoreClock / 1000 / 1000; + while(supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} +} diff --git a/ports/stm/tick.h b/ports/stm/tick.h new file mode 100644 index 0000000000000..999acc7a3c989 --- /dev/null +++ b/ports/stm/tick.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_STM32F4_TICK_H +#define MICROPY_INCLUDED_STM32F4_TICK_H + +#include "py/mpconfig.h" + +#include + +extern struct timer_descriptor ms_timer; + +void tick_init(void); + +void tick_delay(uint32_t us); + +void current_tick(uint64_t* ms, uint32_t* us_until_ms); +// Do not call this with interrupts disabled because it may be waiting for +// ticks_ms to increment. +void wait_until(uint64_t ms, uint32_t us_until_ms); + +#endif // MICROPY_INCLUDED_STM32F4_TICK_H diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile deleted file mode 100644 index a6e82b24d4d79..0000000000000 --- a/ports/stm32/Makefile +++ /dev/null @@ -1,481 +0,0 @@ -# Select the board to build for: if not given on the command line, -# then default to PYBV10. -BOARD ?= PYBV10 -ifeq ($(wildcard boards/$(BOARD)/.),) -$(error Invalid BOARD specified) -endif - -# If the build directory is not given, make it reflect the board name. -BUILD ?= build-$(BOARD) - -include ../../py/mkenv.mk --include mpconfigport.mk -include boards/$(BOARD)/mpconfigboard.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h - -# directory containing scripts to be frozen as bytecode -FROZEN_MPY_DIR ?= modules - -# include py core make definitions -include $(TOP)/py/py.mk - -LD_DIR=boards -CMSIS_DIR=$(TOP)/lib/stm32lib/CMSIS/STM32$(MCU_SERIES_UPPER)xx/Include -MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]') -HAL_DIR=lib/stm32lib/STM32$(MCU_SERIES_UPPER)xx_HAL_Driver -USBDEV_DIR=usbdev -#USBHOST_DIR=usbhost -FATFS_DIR=lib/oofatfs -DFU=$(TOP)/tools/dfu.py -# may need to prefix dfu-util with sudo -USE_PYDFU ?= 1 -PYDFU ?= $(TOP)/tools/pydfu.py -DFU_UTIL ?= dfu-util -DEVICE=0483:df11 -STFLASH ?= st-flash -OPENOCD ?= openocd -OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg - -CROSS_COMPILE = arm-none-eabi- - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(TOP)/lib/cmsis/inc -INC += -I$(CMSIS_DIR)/ -INC += -I$(TOP)/$(HAL_DIR)/Inc -INC += -I$(USBDEV_DIR)/core/inc -I$(USBDEV_DIR)/class/inc -#INC += -I$(USBHOST_DIR) - -# Basic Cortex-M flags -CFLAGS_CORTEX_M = -mthumb - -# Select hardware floating-point support -ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32F767xx STM32F769xx)) -CFLAGS_CORTEX_M += -mfpu=fpv5-d16 -mfloat-abi=hard -else -CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard -endif - -# Options for particular MCU series -CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_F4 -CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7 -DMCU_SERIES_F7 -CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4 -DMCU_SERIES_L4 - -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA) -CFLAGS += -D$(CMSIS_MCU) -CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES)) -CFLAGS += $(COPT) -CFLAGS += -Iboards/$(BOARD) -CFLAGS += -DSTM32_HAL_H='' - -ifeq ($(MICROPY_FLOAT_IMPL),double) -CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE -else -CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT -CFLAGS += -fsingle-precision-constant -Wdouble-promotion -endif - -LDFLAGS = -nostdlib -L $(LD_DIR) -T $(LD_FILE) -Map=$(@:.elf=.map) --cref -LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) - -# Remove uncalled code from the final image. -CFLAGS += -fdata-sections -ffunction-sections -LDFLAGS += --gc-sections - -# Debugging/Optimization -ifeq ($(DEBUG), 1) -CFLAGS += -g -DPENDSV_DEBUG -COPT = -O0 -else -COPT += -Os -DNDEBUG -endif - -SRC_LIB = $(addprefix lib/,\ - libc/string0.c \ - oofatfs/ff.c \ - oofatfs/option/unicode.c \ - mp-readline/builtin_input.c \ - mp-readline/readline.c \ - netutils/netutils.c \ - timeutils/timeutils.c \ - utils/pyexec.c \ - utils/interrupt_char.c \ - utils/sys_stdio_mphal.c \ - ) - -ifeq ($(MICROPY_FLOAT_IMPL),double) -SRC_LIBM = $(addprefix lib/libm_dbl/,\ - __cos.c \ - __expo2.c \ - __fpclassify.c \ - __rem_pio2.c \ - __rem_pio2_large.c \ - __signbit.c \ - __sin.c \ - __tan.c \ - acos.c \ - acosh.c \ - asin.c \ - asinh.c \ - atan.c \ - atan2.c \ - atanh.c \ - ceil.c \ - cos.c \ - cosh.c \ - erf.c \ - exp.c \ - expm1.c \ - floor.c \ - fmod.c \ - frexp.c \ - ldexp.c \ - lgamma.c \ - log.c \ - log10.c \ - log1p.c \ - modf.c \ - nearbyint.c \ - pow.c \ - rint.c \ - scalbn.c \ - sin.c \ - sinh.c \ - sqrt.c \ - tan.c \ - tanh.c \ - tgamma.c \ - trunc.c \ - ) -else -SRC_LIBM = $(addprefix lib/libm/,\ - math.c \ - thumb_vfp_sqrtf.c \ - acoshf.c \ - asinfacosf.c \ - asinhf.c \ - atan2f.c \ - atanf.c \ - atanhf.c \ - ef_rem_pio2.c \ - erf_lgamma.c \ - fmodf.c \ - kf_cos.c \ - kf_rem_pio2.c \ - kf_sin.c \ - kf_tan.c \ - log1pf.c \ - nearbyintf.c \ - sf_cos.c \ - sf_erf.c \ - sf_frexp.c \ - sf_ldexp.c \ - sf_modf.c \ - sf_sin.c \ - sf_tan.c \ - wf_lgamma.c \ - wf_tgamma.c \ - ) -endif - -EXTMOD_SRC_C = $(addprefix extmod/,\ - modonewire.c \ - ) - -DRIVERS_SRC_C = $(addprefix drivers/,\ - memory/spiflash.c \ - ) - -SRC_C = \ - main.c \ - system_stm32.c \ - stm32_it.c \ - usbd_conf.c \ - usbd_desc.c \ - usbd_cdc_interface.c \ - usbd_hid_interface.c \ - usbd_msc_storage.c \ - mphalport.c \ - mpthreadport.c \ - irq.c \ - pendsv.c \ - systick.c \ - pybthread.c \ - timer.c \ - led.c \ - pin.c \ - pin_defs_stm32.c \ - pin_named_pins.c \ - bufhelper.c \ - dma.c \ - i2c.c \ - spi.c \ - uart.c \ - can.c \ - usb.c \ - wdt.c \ - gccollect.c \ - help.c \ - machine_i2c.c \ - modmachine.c \ - modpyb.c \ - modstm.c \ - moduos.c \ - modutime.c \ - modusocket.c \ - modnetwork.c \ - extint.c \ - usrsw.c \ - rng.c \ - rtc.c \ - flash.c \ - storage.c \ - sdcard.c \ - fatfs_port.c \ - lcd.c \ - accel.c \ - servo.c \ - dac.c \ - adc.c \ - $(wildcard boards/$(BOARD)/*.c) - -SRC_O = \ - startup_stm32.o \ - gchelper.o \ - -SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\ - hal.c \ - hal_adc.c \ - hal_adc_ex.c \ - hal_can.c \ - hal_cortex.c \ - hal_dac.c \ - hal_dac_ex.c \ - hal_dma.c \ - hal_flash.c \ - hal_flash_ex.c \ - hal_gpio.c \ - hal_i2c.c \ - hal_pcd.c \ - hal_pcd_ex.c \ - hal_pwr.c \ - hal_pwr_ex.c \ - hal_rcc.c \ - hal_rcc_ex.c \ - hal_rng.c \ - hal_rtc.c \ - hal_rtc_ex.c \ - hal_sd.c \ - hal_spi.c \ - hal_tim.c \ - hal_tim_ex.c \ - hal_uart.c \ - ll_sdmmc.c \ - ll_usb.c \ - ) - -SRC_USBDEV = $(addprefix $(USBDEV_DIR)/,\ - core/src/usbd_core.c \ - core/src/usbd_ctlreq.c \ - core/src/usbd_ioreq.c \ - class/src/usbd_cdc_msc_hid.c \ - class/src/usbd_msc_bot.c \ - class/src/usbd_msc_scsi.c \ - class/src/usbd_msc_data.c \ - ) - -ifneq ($(MICROPY_PY_WIZNET5K),0) -WIZNET5K_DIR=drivers/wiznet5k -INC += -I$(TOP)/$(WIZNET5K_DIR) -CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) -SRC_MOD += modnwwiznet5k.c -SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ - ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ - ethernet/wizchip_conf.c \ - ethernet/socket.c \ - internet/dns/dns.c \ - ) -endif - -# for CC3000 module -ifeq ($(MICROPY_PY_CC3K),1) -CC3000_DIR=drivers/cc3000 -INC += -I$(TOP)/$(CC3000_DIR)/inc -CFLAGS_MOD += -DMICROPY_PY_CC3K=1 -SRC_MOD += modnwcc3k.c -SRC_MOD += $(addprefix $(CC3000_DIR)/src/,\ - cc3000_common.c \ - evnt_handler.c \ - hci.c \ - netapp.c \ - nvmem.c \ - security.c \ - socket.c \ - wlan.c \ - ccspi.c \ - inet_ntop.c \ - inet_pton.c \ - patch.c \ - patch_prog.c \ - ) -endif - -OBJ = -OBJ += $(PY_O) -OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_O)) -OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) -OBJ += $(BUILD)/pins_$(BOARD).o - -# We put several files into the first 16K section with the ISRs. -# If we compile these using -O0 then it won't fit. So if you really want these -# to be compiled with -O0, then edit boards/common.ld (in the .isr_vector section) -# and comment out the following lines. -$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os -$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os -$(PY_BUILD)/formatfloat.o: COPT += -Os -$(PY_BUILD)/parsenum.o: COPT += -Os -$(PY_BUILD)/mpprint.o: COPT += -Os - -all: $(TOP)/lib/stm32lib/README.md $(BUILD)/firmware.dfu $(BUILD)/firmware.hex - -# For convenience, automatically fetch required submodules if they don't exist -$(TOP)/lib/stm32lib/README.md: - $(ECHO) "stm32lib submodule not found, fetching it now..." - (cd $(TOP) && git submodule update --init lib/stm32lib) - -ifneq ($(FROZEN_DIR),) -# To use frozen source modules, put your .py files in a subdirectory (eg scripts/) -# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch). -CFLAGS += -DMICROPY_MODULE_FROZEN_STR -endif - -ifneq ($(FROZEN_MPY_DIR),) -# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and -# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch). -CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool -CFLAGS += -DMICROPY_MODULE_FROZEN_MPY -endif - -.PHONY: deploy - -deploy: $(BUILD)/firmware.dfu - $(ECHO) "Writing $< to the board" -ifeq ($(USE_PYDFU),1) - $(Q)$(PYTHON) $(PYDFU) -u $< -else - $(Q)$(DFU_UTIL) -a 0 -d $(DEVICE) -D $< -endif - -FLASH_ADDR ?= 0x08000000 -TEXT_ADDR ?= 0x08020000 - -deploy-stlink: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware0.bin to the board via ST-LINK" - $(Q)$(STFLASH) write $(BUILD)/firmware0.bin $(FLASH_ADDR) - $(ECHO) "Writing $(BUILD)/firmware1.bin to the board via ST-LINK" - $(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT_ADDR) - -deploy-openocd: $(BUILD)/firmware.dfu - $(ECHO) "Writing $(BUILD)/firmware{0,1}.bin to the board via ST-LINK using OpenOCD" - $(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware0.bin $(FLASH_ADDR) $(BUILD)/firmware1.bin $(TEXT_ADDR)" - -$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .isr_vector $^ $(BUILD)/firmware0.bin - $(Q)$(OBJCOPY) -O binary -j .text -j .data $^ $(BUILD)/firmware1.bin - $(Q)$(PYTHON) $(DFU) -b $(FLASH_ADDR):$(BUILD)/firmware0.bin -b $(TEXT_ADDR):$(BUILD)/firmware1.bin $@ - -$(BUILD)/firmware.hex: $(BUILD)/firmware.elf - $(ECHO) "Create $@" - $(Q)$(OBJCOPY) -O ihex $< $@ - -$(BUILD)/firmware.elf: $(OBJ) - $(ECHO) "LINK $@" - $(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS) - $(Q)$(SIZE) $@ - -PLLVALUES = boards/pllvalues.py -MAKE_PINS = boards/make-pins.py -BOARD_PINS = boards/$(BOARD)/pins.csv -PREFIX_FILE = boards/stm32f4xx_prefix.c -GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c -GEN_PINS_HDR = $(HEADER_BUILD)/pins.h -GEN_PINS_QSTR = $(BUILD)/pins_qstr.h -GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h -GEN_PINS_AF_PY = $(BUILD)/pins_af.py - -INSERT_USB_IDS = $(TOP)/tools/insert-usb-ids.py -FILE2H = $(TOP)/tools/file2h.py - -USB_IDS_FILE = usb.h -CDCINF_TEMPLATE = pybcdc.inf_template -GEN_CDCINF_FILE = $(HEADER_BUILD)/pybcdc.inf -GEN_CDCINF_HEADER = $(HEADER_BUILD)/pybcdc_inf.h - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SRC_MOD) $(SRC_LIB) $(EXTMOD_SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += $(GEN_CDCINF_HEADER) - -# Making OBJ use an order-only depenedency on the generated pins.h file -# has the side effect of making the pins.h file before we actually compile -# any of the objects. The normal dependency generation will deal with the -# case when pins.h is modified. But when it doesn't exist, we don't know -# which source files might need it. -$(OBJ): | $(GEN_PINS_HDR) - -# With conditional pins, we may need to regenerate qstrdefs.h when config -# options change. -$(HEADER_BUILD)/qstrdefs.generated.h: boards/$(BOARD)/mpconfigboard.h - -# main.c can't be even preprocessed without $(GEN_CDCINF_HEADER) -main.c: $(GEN_CDCINF_HEADER) - -# Use a pattern rule here so that make will only call make-pins.py once to make -# both pins_$(BOARD).c and pins.h -$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC) - -$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c - $(call compile_c) - -GEN_PLLFREQTABLE_HDR = $(HEADER_BUILD)/pllfreqtable.h -GEN_STMCONST_HDR = $(HEADER_BUILD)/modstm_const.h -GEN_STMCONST_QSTR = $(BUILD)/modstm_qstr.h -GEN_STMCONST_MPZ = $(HEADER_BUILD)/modstm_mpz.h -CMSIS_MCU_LOWER = $(shell echo $(CMSIS_MCU) | tr '[:upper:]' '[:lower:]') -CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h - -modmachine.c: $(GEN_PLLFREQTABLE_HDR) -$(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(PLLVALUES) -c file:boards/$(BOARD)/stm32$(MCU_SERIES)xx_hal_conf.h > $@ - -$(BUILD)/modstm.o: $(GEN_STMCONST_HDR) -# Use a pattern rule here so that make will only call make-stmconst.py once to -# make both modstm_const.h and modstm_qstr.h -$(HEADER_BUILD)/%_const.h $(BUILD)/%_qstr.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD) - $(ECHO) "Create stmconst $@" - $(Q)$(PYTHON) make-stmconst.py --qstr $(GEN_STMCONST_QSTR) --mpz $(GEN_STMCONST_MPZ) $(CMSIS_MCU_HDR) > $(GEN_STMCONST_HDR) - -$(GEN_CDCINF_HEADER): $(GEN_CDCINF_FILE) $(FILE2H) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(FILE2H) $< > $@ - -$(GEN_CDCINF_FILE): $(CDCINF_TEMPLATE) $(INSERT_USB_IDS) $(USB_IDS_FILE) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(INSERT_USB_IDS) $(USB_IDS_FILE) $< > $@ - -include $(TOP)/py/mkrules.mk diff --git a/ports/stm32/README.md b/ports/stm32/README.md deleted file mode 100644 index bb184e8db6aeb..0000000000000 --- a/ports/stm32/README.md +++ /dev/null @@ -1,115 +0,0 @@ -MicroPython port to STM32 MCUs -============================== - -This directory contains the port of MicroPython to ST's line of STM32Fxxx -microcontrollers. It is based on the STM32Cube HAL library and currently -supports: STM32F401, STM32F405, STM32F411, STM32F429, STM32F746. - -The officially supported boards are the line of pyboards: PYBv1.0 and PYBv1.1 -(both with STM32F405), and PYBLITEv1.0 (with STM32F411). See -[micropython.org/pyboard](http://www.micropython.org/pyboard/) for further -details. - -Other boards that are supported include ST Discovery and Nucleo boards. -See the boards/ subdirectory, which contains the configuration files used -to build each individual board. - -Build instructions ------------------- - -Before building the firmware for a given board the MicroPython cross-compiler -must be built; it will be used to pre-compile some of the built-in scripts to -bytecode. The cross-compiler is built and run on the host machine, using: -```bash -$ make -C mpy-cross -``` -This command should be executed from the root directory of this repository. -All other commands below should be executed from the ports/stm32/ directory. - -An ARM compiler is required for the build, along with the associated binary -utilities. The default compiler is `arm-none-eabi-gcc`, which is available for -Arch Linux via the package `arm-none-eabi-gcc`, for Ubuntu via instructions -[here](https://launchpad.net/~team-gcc-arm-embedded/+archive/ubuntu/ppa), or -see [here](https://launchpad.net/gcc-arm-embedded) for the main GCC ARM -Embedded page. The compiler can be changed using the `CROSS_COMPILE` variable -when invoking `make`. - -To build for a given board, run: - - $ make BOARD=PYBV11 - -The default board is PYBV10 but any of the names of the subdirectories in the -`boards/` directory can be passed as the argument to `BOARD=`. The above command -should produce binary images in the `build-PYBV11/` subdirectory (or the -equivalent directory for the board specified). - -You must then get your board/microcontroller into DFU mode. On the pyboard -connect the 3V3 pin to the P1/DFU pin with a wire (they are next to each -other on the bottom left of the board, second row from the bottom) and then -reset (by pressing the RST button) or power on the board. Then flash the -firmware using the command: - - $ make BOARD=PYBV11 deploy - -This will use the included `tools/pydfu.py` script. You can use instead the -`dfu-util` program (available [here](http://dfu-util.sourceforge.net/)) by -passing `USE_PYDFU=0`: - - $ make BOARD=PYBV11 USE_PYDFU=0 deploy - -If flashing the firmware does not work it may be because you don't have the -correct permissions. Try then: - - $ sudo make BOARD=PYBV11 deploy - -Or using `dfu-util` directly: - - $ sudo dfu-util -a 0 -d 0483:df11 -D build-PYBV11/firmware.dfu - - -### Flashing the Firmware with stlink - -ST Discovery or Nucleo boards have a builtin programmer called ST-LINK. With -these boards and using Linux or OS X, you have the option to upload the -`stm32` firmware using the `st-flash` utility from the -[stlink](https://github.com/texane/stlink) project. To do so, connect the board -with a mini USB cable to its ST-LINK USB port and then use the make target -`deploy-stlink`. For example, if you have the STM32F4DISCOVERY board, you can -run: - - $ make BOARD=STM32F4DISC deploy-stlink - -The `st-flash` program should detect the USB connection to the board -automatically. If not, run `lsusb` to determine its USB bus and device number -and set the `STLINK_DEVICE` environment variable accordingly, using the format -`:`. Example: - - $ lsusb - [...] - Bus 002 Device 035: ID 0483:3748 STMicroelectronics ST-LINK/V2 - $ export STLINK_DEVICE="002:0035" - $ make BOARD=STM32F4DISC deploy-stlink - - -### Flashing the Firmware with OpenOCD - -Another option to deploy the firmware on ST Discovery or Nucleo boards with a -ST-LINK interface uses [OpenOCD](http://openocd.org/). Connect the board with -a mini USB cable to its ST-LINK USB port and then use the make target -`deploy-openocd`. For example, if you have the STM32F4DISCOVERY board: - - $ make BOARD=STM32F4DISC deploy-openocd - -The `openocd` program, which writes the firmware to the target board's flash, -is configured via the file `ports/stm32/boards/openocd_stm32f4.cfg`. This -configuration should work for all boards based on a STM32F4xx MCU with a -ST-LINKv2 interface. You can override the path to this configuration by setting -`OPENOCD_CONFIG` in your Makefile or on the command line. - -Accessing the board -------------------- - -Once built and deployed, access the MicroPython REPL (the Python prompt) via USB -serial or UART, depending on the board. For the pyboard you can try: - - $ picocom /dev/ttyACM0 diff --git a/ports/stm32/accel.c b/ports/stm32/accel.c deleted file mode 100644 index 7b36e208236ed..0000000000000 --- a/ports/stm32/accel.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mphal.h" -#include "py/runtime.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "i2c.h" -#include "accel.h" - -#if MICROPY_HW_HAS_MMA7660 - -/// \moduleref pyb -/// \class Accel - accelerometer control -/// -/// Accel is an object that controls the accelerometer. Example usage: -/// -/// accel = pyb.Accel() -/// for i in range(10): -/// print(accel.x(), accel.y(), accel.z()) -/// -/// Raw values are between -32 and 31. - -#define MMA_ADDR (0x98) -#define MMA_REG_X (0) -#define MMA_REG_Y (1) -#define MMA_REG_Z (2) -#define MMA_REG_TILT (3) -#define MMA_REG_MODE (7) -#define MMA_AXIS_SIGNED_VALUE(i) (((i) & 0x3f) | ((i) & 0x20 ? (~0x1f) : 0)) - -void accel_init(void) { - // PB5 is connected to AVDD; pull high to enable MMA accel device - mp_hal_pin_low(&MICROPY_HW_MMA_AVDD_PIN); // turn off AVDD - mp_hal_pin_output(&MICROPY_HW_MMA_AVDD_PIN); -} - -STATIC void accel_start(void) { - // start the I2C bus in master mode - I2CHandle1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - I2CHandle1.Init.ClockSpeed = 400000; - I2CHandle1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLED; - I2CHandle1.Init.DutyCycle = I2C_DUTYCYCLE_16_9; - I2CHandle1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLED; - I2CHandle1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - I2CHandle1.Init.OwnAddress1 = PYB_I2C_MASTER_ADDRESS; - I2CHandle1.Init.OwnAddress2 = 0xfe; // unused - i2c_init(&I2CHandle1); - - // turn off AVDD, wait 30ms, turn on AVDD, wait 30ms again - mp_hal_pin_low(&MICROPY_HW_MMA_AVDD_PIN); // turn off - mp_hal_delay_ms(30); - mp_hal_pin_high(&MICROPY_HW_MMA_AVDD_PIN); // turn on - mp_hal_delay_ms(30); - - HAL_StatusTypeDef status; - - for (int i = 0; i < 10; i++) { - status = HAL_I2C_IsDeviceReady(&I2CHandle1, MMA_ADDR, 10, 200); - if (status == HAL_OK) { - break; - } - } - - if (status != HAL_OK) { - mp_raise_msg(&mp_type_OSError, "accelerometer not found"); - } - - // set MMA to active mode - uint8_t data[1] = {1}; // active mode - status = HAL_I2C_Mem_Write(&I2CHandle1, MMA_ADDR, MMA_REG_MODE, I2C_MEMADD_SIZE_8BIT, data, 1, 200); - - // wait for MMA to become active - mp_hal_delay_ms(30); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -#define NUM_AXIS (3) -#define FILT_DEPTH (4) - -typedef struct _pyb_accel_obj_t { - mp_obj_base_t base; - int16_t buf[NUM_AXIS * FILT_DEPTH]; -} pyb_accel_obj_t; - -STATIC pyb_accel_obj_t pyb_accel_obj; - -/// \classmethod \constructor() -/// Create and return an accelerometer object. -/// -/// Note: if you read accelerometer values immediately after creating this object -/// you will get 0. It takes around 20ms for the first sample to be ready, so, -/// unless you have some other code between creating this object and reading its -/// values, you should put a `pyb.delay(20)` after creating it. For example: -/// -/// accel = pyb.Accel() -/// pyb.delay(20) -/// print(accel.x()) -STATIC mp_obj_t pyb_accel_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // init accel object - pyb_accel_obj.base.type = &pyb_accel_type; - accel_start(); - - return &pyb_accel_obj; -} - -STATIC mp_obj_t read_axis(int axis) { - uint8_t data[1]; - HAL_I2C_Mem_Read(&I2CHandle1, MMA_ADDR, axis, I2C_MEMADD_SIZE_8BIT, data, 1, 200); - return mp_obj_new_int(MMA_AXIS_SIGNED_VALUE(data[0])); -} - -/// \method x() -/// Get the x-axis value. -STATIC mp_obj_t pyb_accel_x(mp_obj_t self_in) { - return read_axis(MMA_REG_X); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_x_obj, pyb_accel_x); - -/// \method y() -/// Get the y-axis value. -STATIC mp_obj_t pyb_accel_y(mp_obj_t self_in) { - return read_axis(MMA_REG_Y); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_y_obj, pyb_accel_y); - -/// \method z() -/// Get the z-axis value. -STATIC mp_obj_t pyb_accel_z(mp_obj_t self_in) { - return read_axis(MMA_REG_Z); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_z_obj, pyb_accel_z); - -/// \method tilt() -/// Get the tilt register. -STATIC mp_obj_t pyb_accel_tilt(mp_obj_t self_in) { - uint8_t data[1]; - HAL_I2C_Mem_Read(&I2CHandle1, MMA_ADDR, MMA_REG_TILT, I2C_MEMADD_SIZE_8BIT, data, 1, 200); - return mp_obj_new_int(data[0]); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_tilt_obj, pyb_accel_tilt); - -/// \method filtered_xyz() -/// Get a 3-tuple of filtered x, y and z values. -STATIC mp_obj_t pyb_accel_filtered_xyz(mp_obj_t self_in) { - pyb_accel_obj_t *self = self_in; - - memmove(self->buf, self->buf + NUM_AXIS, NUM_AXIS * (FILT_DEPTH - 1) * sizeof(int16_t)); - - uint8_t data[NUM_AXIS]; - HAL_I2C_Mem_Read(&I2CHandle1, MMA_ADDR, MMA_REG_X, I2C_MEMADD_SIZE_8BIT, data, NUM_AXIS, 200); - - mp_obj_t tuple[NUM_AXIS]; - for (int i = 0; i < NUM_AXIS; i++) { - self->buf[NUM_AXIS * (FILT_DEPTH - 1) + i] = MMA_AXIS_SIGNED_VALUE(data[i]); - int32_t val = 0; - for (int j = 0; j < FILT_DEPTH; j++) { - val += self->buf[i + NUM_AXIS * j]; - } - tuple[i] = mp_obj_new_int(val); - } - - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_accel_filtered_xyz_obj, pyb_accel_filtered_xyz); - -STATIC mp_obj_t pyb_accel_read(mp_obj_t self_in, mp_obj_t reg) { - uint8_t data[1]; - HAL_I2C_Mem_Read(&I2CHandle1, MMA_ADDR, mp_obj_get_int(reg), I2C_MEMADD_SIZE_8BIT, data, 1, 200); - return mp_obj_new_int(data[0]); -} -MP_DEFINE_CONST_FUN_OBJ_2(pyb_accel_read_obj, pyb_accel_read); - -STATIC mp_obj_t pyb_accel_write(mp_obj_t self_in, mp_obj_t reg, mp_obj_t val) { - uint8_t data[1]; - data[0] = mp_obj_get_int(val); - HAL_I2C_Mem_Write(&I2CHandle1, MMA_ADDR, mp_obj_get_int(reg), I2C_MEMADD_SIZE_8BIT, data, 1, 200); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_3(pyb_accel_write_obj, pyb_accel_write); - -STATIC const mp_rom_map_elem_t pyb_accel_locals_dict_table[] = { - // TODO add init, deinit, and perhaps reset methods - { MP_ROM_QSTR(MP_QSTR_x), MP_ROM_PTR(&pyb_accel_x_obj) }, - { MP_ROM_QSTR(MP_QSTR_y), MP_ROM_PTR(&pyb_accel_y_obj) }, - { MP_ROM_QSTR(MP_QSTR_z), MP_ROM_PTR(&pyb_accel_z_obj) }, - { MP_ROM_QSTR(MP_QSTR_tilt), MP_ROM_PTR(&pyb_accel_tilt_obj) }, - { MP_ROM_QSTR(MP_QSTR_filtered_xyz), MP_ROM_PTR(&pyb_accel_filtered_xyz_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&pyb_accel_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_accel_write_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_accel_locals_dict, pyb_accel_locals_dict_table); - -const mp_obj_type_t pyb_accel_type = { - { &mp_type_type }, - .name = MP_QSTR_Accel, - .make_new = pyb_accel_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_accel_locals_dict, -}; - -#endif // MICROPY_HW_HAS_MMA7660 diff --git a/ports/stm32/accel.h b/ports/stm32/accel.h deleted file mode 100644 index fc35f77756684..0000000000000 --- a/ports/stm32/accel.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_ACCEL_H -#define MICROPY_INCLUDED_STMHAL_ACCEL_H - -extern const mp_obj_type_t pyb_accel_type; - -void accel_init(void); - -#endif // MICROPY_INCLUDED_STMHAL_ACCEL_H diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c deleted file mode 100644 index 9a0dc56a37703..0000000000000 --- a/ports/stm32/adc.c +++ /dev/null @@ -1,677 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/binary.h" -#include "py/mphal.h" -#include "adc.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "timer.h" - -/// \moduleref pyb -/// \class ADC - analog to digital conversion: read analog values on a pin -/// -/// Usage: -/// -/// adc = pyb.ADC(pin) # create an analog object from a pin -/// val = adc.read() # read an analog value -/// -/// adc = pyb.ADCAll(resolution) # creale an ADCAll object -/// val = adc.read_channel(channel) # read the given channel -/// val = adc.read_core_temp() # read MCU temperature -/// val = adc.read_core_vbat() # read MCU VBAT -/// val = adc.read_core_vref() # read MCU VREF - -/* ADC defintions */ -#define ADCx (ADC1) -#define ADCx_CLK_ENABLE __ADC1_CLK_ENABLE -#define ADC_NUM_CHANNELS (19) - -#if defined(MCU_SERIES_F4) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (15) -#define ADC_CAL_ADDRESS (0x1fff7a2a) -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) - -#elif defined(MCU_SERIES_F7) - -#define ADC_FIRST_GPIO_CHANNEL (0) -#define ADC_LAST_GPIO_CHANNEL (15) -#define ADC_CAL_ADDRESS (0x1ff0f44a) -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) - -#elif defined(MCU_SERIES_L4) - -#define ADC_FIRST_GPIO_CHANNEL (1) -#define ADC_LAST_GPIO_CHANNEL (16) -#define ADC_CAL_ADDRESS (0x1fff75aa) -#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS - 2)) -#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 0x20)) - -#else - -#error Unsupported processor - -#endif - -#if defined(STM32F405xx) || defined(STM32F415xx) || \ - defined(STM32F407xx) || defined(STM32F417xx) || \ - defined(STM32F401xC) || defined(STM32F401xE) || \ - defined(STM32F411xE) -#define VBAT_DIV (2) -#elif defined(STM32F427xx) || defined(STM32F429xx) || \ - defined(STM32F437xx) || defined(STM32F439xx) || \ - defined(STM32F746xx) || defined(STM32F767xx) || \ - defined(STM32F769xx) || defined(STM32F446xx) -#define VBAT_DIV (4) -#elif defined(STM32L475xx) || defined(STM32L476xx) -#define VBAT_DIV (3) -#else -#error Unsupported processor -#endif - -/* Core temperature sensor definitions */ -#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */ -#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */ - -// scale and calibration values for VBAT and VREF -#define ADC_SCALE (3.3f / 4095) -#define VREFIN_CAL ((uint16_t *)ADC_CAL_ADDRESS) - -typedef struct _pyb_obj_adc_t { - mp_obj_base_t base; - mp_obj_t pin_name; - int channel; - ADC_HandleTypeDef handle; -} pyb_obj_adc_t; - -// convert user-facing channel number into internal channel number -static inline uint32_t adc_get_internal_channel(uint32_t channel) { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - // on F4 and F7 MCUs we want channel 16 to always be the TEMPSENSOR - // (on some MCUs ADC_CHANNEL_TEMPSENSOR=16, on others it doesn't) - if (channel == 16) { - channel = ADC_CHANNEL_TEMPSENSOR; - } - #endif - return channel; -} - -STATIC bool is_adcx_channel(int channel) { -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - return IS_ADC_CHANNEL(channel); -#elif defined(MCU_SERIES_L4) - ADC_HandleTypeDef handle; - handle.Instance = ADCx; - return IS_ADC_CHANNEL(&handle, channel); -#else - #error Unsupported processor -#endif -} - -STATIC void adc_wait_for_eoc_or_timeout(int32_t timeout) { - uint32_t tickstart = HAL_GetTick(); -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - while ((ADCx->SR & ADC_FLAG_EOC) != ADC_FLAG_EOC) { -#elif defined(MCU_SERIES_L4) - while (READ_BIT(ADCx->ISR, ADC_FLAG_EOC) != ADC_FLAG_EOC) { -#else - #error Unsupported processor -#endif - if (((HAL_GetTick() - tickstart ) > timeout)) { - break; // timeout - } - } -} - -STATIC void adcx_clock_enable(void) { -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - ADCx_CLK_ENABLE(); -#elif defined(MCU_SERIES_L4) - __HAL_RCC_ADC_CLK_ENABLE(); -#else - #error Unsupported processor -#endif -} - -STATIC void adc_init_single(pyb_obj_adc_t *adc_obj) { - if (!is_adcx_channel(adc_obj->channel)) { - return; - } - - if (ADC_FIRST_GPIO_CHANNEL <= adc_obj->channel && adc_obj->channel <= ADC_LAST_GPIO_CHANNEL) { - // Channels 0-16 correspond to real pins. Configure the GPIO pin in - // ADC mode. - const pin_obj_t *pin = pin_adc1[adc_obj->channel]; - mp_hal_gpio_clock_enable(pin->gpio); - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = pin->pin_mask; -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - GPIO_InitStructure.Mode = GPIO_MODE_ANALOG; -#elif defined(MCU_SERIES_L4) - GPIO_InitStructure.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; -#else - #error Unsupported processor -#endif - GPIO_InitStructure.Pull = GPIO_NOPULL; - HAL_GPIO_Init(pin->gpio, &GPIO_InitStructure); - } - - adcx_clock_enable(); - - ADC_HandleTypeDef *adcHandle = &adc_obj->handle; - adcHandle->Instance = ADCx; - adcHandle->Init.ContinuousConvMode = DISABLE; - adcHandle->Init.DiscontinuousConvMode = DISABLE; - adcHandle->Init.NbrOfDiscConversion = 0; - adcHandle->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - adcHandle->Init.DataAlign = ADC_DATAALIGN_RIGHT; - adcHandle->Init.NbrOfConversion = 1; - adcHandle->Init.DMAContinuousRequests = DISABLE; - adcHandle->Init.Resolution = ADC_RESOLUTION_12B; -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - adcHandle->Init.ScanConvMode = DISABLE; - adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; - adcHandle->Init.EOCSelection = DISABLE; -#elif defined(MCU_SERIES_L4) - adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; - adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE; - adcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV; - adcHandle->Init.ExternalTrigConv = ADC_SOFTWARE_START; - adcHandle->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - adcHandle->Init.LowPowerAutoWait = DISABLE; - adcHandle->Init.Overrun = ADC_OVR_DATA_PRESERVED; - adcHandle->Init.OversamplingMode = DISABLE; -#else - #error Unsupported processor -#endif - - HAL_ADC_Init(adcHandle); - -#if defined(MCU_SERIES_L4) - ADC_MultiModeTypeDef multimode; - multimode.Mode = ADC_MODE_INDEPENDENT; - if (HAL_ADCEx_MultiModeConfigChannel(adcHandle, &multimode) != HAL_OK) - { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Can not set multimode on ADC1 channel: %d", adc_obj->channel)); - } -#endif -} - -STATIC void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel) { - ADC_ChannelConfTypeDef sConfig; - - sConfig.Channel = channel; - sConfig.Rank = 1; -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES; -#elif defined(MCU_SERIES_L4) - sConfig.SamplingTime = ADC_SAMPLETIME_12CYCLES_5; - sConfig.SingleDiff = ADC_SINGLE_ENDED; - sConfig.OffsetNumber = ADC_OFFSET_NONE; -#else - #error Unsupported processor -#endif - sConfig.Offset = 0; - - HAL_ADC_ConfigChannel(adc_handle, &sConfig); -} - -STATIC uint32_t adc_read_channel(ADC_HandleTypeDef *adcHandle) { - uint32_t rawValue = 0; - - HAL_ADC_Start(adcHandle); - if (HAL_ADC_PollForConversion(adcHandle, 10) == HAL_OK - && (HAL_ADC_GetState(adcHandle) & HAL_ADC_STATE_EOC_REG) == HAL_ADC_STATE_EOC_REG) { - rawValue = HAL_ADC_GetValue(adcHandle); - } - HAL_ADC_Stop(adcHandle); - - return rawValue; -} - -/******************************************************************************/ -/* MicroPython bindings : adc object (single channel) */ - -STATIC void adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_obj_adc_t *self = self_in; - mp_print_str(print, "pin_name, PRINT_STR); - mp_printf(print, " channel=%lu>", self->channel); -} - -/// \classmethod \constructor(pin) -/// Create an ADC object associated with the given pin. -/// This allows you to then read analog values on that pin. -STATIC mp_obj_t adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // 1st argument is the pin name - mp_obj_t pin_obj = args[0]; - - uint32_t channel; - - if (MP_OBJ_IS_INT(pin_obj)) { - channel = adc_get_internal_channel(mp_obj_get_int(pin_obj)); - } else { - const pin_obj_t *pin = pin_find(pin_obj); - if ((pin->adc_num & PIN_ADC1) == 0) { - // No ADC1 function on that pin - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %q does not have ADC capabilities", pin->name)); - } - channel = pin->adc_channel; - } - - if (!is_adcx_channel(channel)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "not a valid ADC Channel: %d", channel)); - } - - - if (ADC_FIRST_GPIO_CHANNEL <= channel && channel <= ADC_LAST_GPIO_CHANNEL) { - // these channels correspond to physical GPIO ports so make sure they exist - if (pin_adc1[channel] == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "channel %d not available on this board", channel)); - } - } - - pyb_obj_adc_t *o = m_new_obj(pyb_obj_adc_t); - memset(o, 0, sizeof(*o)); - o->base.type = &pyb_adc_type; - o->pin_name = pin_obj; - o->channel = channel; - adc_init_single(o); - - return o; -} - -/// \method read() -/// Read the value on the analog pin and return it. The returned value -/// will be between 0 and 4095. -STATIC mp_obj_t adc_read(mp_obj_t self_in) { - pyb_obj_adc_t *self = self_in; - - adc_config_channel(&self->handle, self->channel); - uint32_t data = adc_read_channel(&self->handle); - return mp_obj_new_int(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_read_obj, adc_read); - -/// \method read_timed(buf, timer) -/// -/// Read analog values into `buf` at a rate set by the `timer` object. -/// -/// `buf` can be bytearray or array.array for example. The ADC values have -/// 12-bit resolution and are stored directly into `buf` if its element size is -/// 16 bits or greater. If `buf` has only 8-bit elements (eg a bytearray) then -/// the sample resolution will be reduced to 8 bits. -/// -/// `timer` should be a Timer object, and a sample is read each time the timer -/// triggers. The timer must already be initialised and running at the desired -/// sampling frequency. -/// -/// To support previous behaviour of this function, `timer` can also be an -/// integer which specifies the frequency (in Hz) to sample at. In this case -/// Timer(6) will be automatically configured to run at the given frequency. -/// -/// Example using a Timer object (preferred way): -/// -/// adc = pyb.ADC(pyb.Pin.board.X19) # create an ADC on pin X19 -/// tim = pyb.Timer(6, freq=10) # create a timer running at 10Hz -/// buf = bytearray(100) # creat a buffer to store the samples -/// adc.read_timed(buf, tim) # sample 100 values, taking 10s -/// -/// Example using an integer for the frequency: -/// -/// adc = pyb.ADC(pyb.Pin.board.X19) # create an ADC on pin X19 -/// buf = bytearray(100) # create a buffer of 100 bytes -/// adc.read_timed(buf, 10) # read analog values into buf at 10Hz -/// # this will take 10 seconds to finish -/// for val in buf: # loop over all values -/// print(val) # print the value out -/// -/// This function does not allocate any memory. -STATIC mp_obj_t adc_read_timed(mp_obj_t self_in, mp_obj_t buf_in, mp_obj_t freq_in) { - pyb_obj_adc_t *self = self_in; - - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); - size_t typesize = mp_binary_get_size('@', bufinfo.typecode, NULL); - - TIM_HandleTypeDef *tim; - #if defined(TIM6) - if (mp_obj_is_integer(freq_in)) { - // freq in Hz given so init TIM6 (legacy behaviour) - tim = timer_tim6_init(mp_obj_get_int(freq_in)); - HAL_TIM_Base_Start(tim); - } else - #endif - { - // use the supplied timer object as the sampling time base - tim = pyb_timer_get_handle(freq_in); - } - - // configure the ADC channel - adc_config_channel(&self->handle, self->channel); - - // This uses the timer in polling mode to do the sampling - // TODO use DMA - - uint nelems = bufinfo.len / typesize; - for (uint index = 0; index < nelems; index++) { - // Wait for the timer to trigger so we sample at the correct frequency - while (__HAL_TIM_GET_FLAG(tim, TIM_FLAG_UPDATE) == RESET) { - } - __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE); - - if (index == 0) { - // for the first sample we need to turn the ADC on - HAL_ADC_Start(&self->handle); - } else { - // for subsequent samples we can just set the "start sample" bit -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART; -#elif defined(MCU_SERIES_L4) - SET_BIT(ADCx->CR, ADC_CR_ADSTART); -#else - #error Unsupported processor -#endif - } - - // wait for sample to complete - #define READ_TIMED_TIMEOUT (10) // in ms - adc_wait_for_eoc_or_timeout(READ_TIMED_TIMEOUT); - - // read value - uint value = ADCx->DR; - - // store value in buffer - if (typesize == 1) { - value >>= 4; - } - mp_binary_set_val_array_from_int(bufinfo.typecode, bufinfo.buf, index, value); - } - - // turn the ADC off - HAL_ADC_Stop(&self->handle); - - #if defined(TIM6) - if (mp_obj_is_integer(freq_in)) { - // stop timer if we initialised TIM6 in this function (legacy behaviour) - HAL_TIM_Base_Stop(tim); - } - #endif - - return mp_obj_new_int(bufinfo.len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(adc_read_timed_obj, adc_read_timed); - -STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&adc_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_timed), MP_ROM_PTR(&adc_read_timed_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(adc_locals_dict, adc_locals_dict_table); - -const mp_obj_type_t pyb_adc_type = { - { &mp_type_type }, - .name = MP_QSTR_ADC, - .print = adc_print, - .make_new = adc_make_new, - .locals_dict = (mp_obj_dict_t*)&adc_locals_dict, -}; - -/******************************************************************************/ -/* adc all object */ - -typedef struct _pyb_adc_all_obj_t { - mp_obj_base_t base; - ADC_HandleTypeDef handle; -} pyb_adc_all_obj_t; - -void adc_init_all(pyb_adc_all_obj_t *adc_all, uint32_t resolution, uint32_t en_mask) { - - switch (resolution) { - case 6: resolution = ADC_RESOLUTION_6B; break; - case 8: resolution = ADC_RESOLUTION_8B; break; - case 10: resolution = ADC_RESOLUTION_10B; break; - case 12: resolution = ADC_RESOLUTION_12B; break; - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "resolution %d not supported", resolution)); - } - - for (uint32_t channel = ADC_FIRST_GPIO_CHANNEL; channel <= ADC_LAST_GPIO_CHANNEL; ++channel) { - // only initialise those channels that are selected with the en_mask - if (en_mask & (1 << channel)) { - // Channels 0-16 correspond to real pins. Configure the GPIO pin in - // ADC mode. - const pin_obj_t *pin = pin_adc1[channel]; - if (pin) { - mp_hal_gpio_clock_enable(pin->gpio); - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = pin->pin_mask; - GPIO_InitStructure.Mode = GPIO_MODE_ANALOG; - GPIO_InitStructure.Pull = GPIO_NOPULL; - HAL_GPIO_Init(pin->gpio, &GPIO_InitStructure); - } - } - } - - adcx_clock_enable(); - - ADC_HandleTypeDef *adcHandle = &adc_all->handle; - adcHandle->Instance = ADCx; - adcHandle->Init.Resolution = resolution; - adcHandle->Init.ContinuousConvMode = DISABLE; - adcHandle->Init.DiscontinuousConvMode = DISABLE; - adcHandle->Init.NbrOfDiscConversion = 0; - adcHandle->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - adcHandle->Init.DataAlign = ADC_DATAALIGN_RIGHT; - adcHandle->Init.NbrOfConversion = 1; - adcHandle->Init.DMAContinuousRequests = DISABLE; - adcHandle->Init.EOCSelection = DISABLE; -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - adcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - adcHandle->Init.ScanConvMode = DISABLE; - adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; -#elif defined(MCU_SERIES_L4) - adcHandle->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2; - adcHandle->Init.ScanConvMode = ADC_SCAN_DISABLE; - adcHandle->Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_CC1; - adcHandle->Init.LowPowerAutoWait = DISABLE; - adcHandle->Init.Overrun = ADC_OVR_DATA_PRESERVED; - adcHandle->Init.OversamplingMode = DISABLE; -#else - #error Unsupported processor -#endif - - HAL_ADC_Init(adcHandle); -} - -uint32_t adc_config_and_read_channel(ADC_HandleTypeDef *adcHandle, uint32_t channel) { - adc_config_channel(adcHandle, channel); - return adc_read_channel(adcHandle); -} - -int adc_get_resolution(ADC_HandleTypeDef *adcHandle) { - uint32_t res_reg = __HAL_ADC_GET_RESOLUTION(adcHandle); - - switch (res_reg) { - case ADC_RESOLUTION_6B: return 6; - case ADC_RESOLUTION_8B: return 8; - case ADC_RESOLUTION_10B: return 10; - } - return 12; -} - -int adc_read_core_temp(ADC_HandleTypeDef *adcHandle) { - int32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_TEMPSENSOR); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - return ((raw_value - CORE_TEMP_V25) / CORE_TEMP_AVG_SLOPE) + 25; -} - -#if MICROPY_PY_BUILTINS_FLOAT -// correction factor for reference value -STATIC volatile float adc_refcor = 1.0f; - -float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) { - int32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_TEMPSENSOR); - - // constants assume 12-bit resolution so we scale the raw value to 12-bits - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; - return (((float)raw_value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; -} - -float adc_read_core_vbat(ADC_HandleTypeDef *adcHandle) { - uint32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_VBAT); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - // ST docs say that (at least on STM32F42x and STM32F43x), VBATE must - // be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT - // conversions to work. VBATE is enabled by the above call to read - // the channel, and here we disable VBATE so a subsequent call for - // TEMPSENSOR or VREFINT works correctly. - ADC->CCR &= ~ADC_CCR_VBATE; - #endif - - return raw_value * VBAT_DIV * ADC_SCALE * adc_refcor; -} - -float adc_read_core_vref(ADC_HandleTypeDef *adcHandle) { - uint32_t raw_value = adc_config_and_read_channel(adcHandle, ADC_CHANNEL_VREFINT); - - // Note: constants assume 12-bit resolution, so we scale the raw value to - // be 12-bits. - raw_value <<= (12 - adc_get_resolution(adcHandle)); - - // update the reference correction factor - adc_refcor = ((float)(*VREFIN_CAL)) / ((float)raw_value); - - return (*VREFIN_CAL) * ADC_SCALE; -} -#endif - -/******************************************************************************/ -/* MicroPython bindings : adc_all object */ - -STATIC mp_obj_t adc_all_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 2, false); - - // make ADCAll object - pyb_adc_all_obj_t *o = m_new_obj(pyb_adc_all_obj_t); - o->base.type = &pyb_adc_all_type; - mp_int_t res = mp_obj_get_int(args[0]); - uint32_t en_mask = 0xffffffff; - if (n_args > 1) { - en_mask = mp_obj_get_int(args[1]); - } - adc_init_all(o, res, en_mask); - - return o; -} - -STATIC mp_obj_t adc_all_read_channel(mp_obj_t self_in, mp_obj_t channel) { - pyb_adc_all_obj_t *self = self_in; - uint32_t chan = adc_get_internal_channel(mp_obj_get_int(channel)); - uint32_t data = adc_config_and_read_channel(&self->handle, chan); - return mp_obj_new_int(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(adc_all_read_channel_obj, adc_all_read_channel); - -STATIC mp_obj_t adc_all_read_core_temp(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - #if MICROPY_PY_BUILTINS_FLOAT - float data = adc_read_core_temp_float(&self->handle); - return mp_obj_new_float(data); - #else - int data = adc_read_core_temp(&self->handle); - return mp_obj_new_int(data); - #endif -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_temp_obj, adc_all_read_core_temp); - -#if MICROPY_PY_BUILTINS_FLOAT -STATIC mp_obj_t adc_all_read_core_vbat(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - float data = adc_read_core_vbat(&self->handle); - return mp_obj_new_float(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_vbat_obj, adc_all_read_core_vbat); - -STATIC mp_obj_t adc_all_read_core_vref(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - float data = adc_read_core_vref(&self->handle); - return mp_obj_new_float(data); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_core_vref_obj, adc_all_read_core_vref); - -STATIC mp_obj_t adc_all_read_vref(mp_obj_t self_in) { - pyb_adc_all_obj_t *self = self_in; - adc_read_core_vref(&self->handle); - return mp_obj_new_float(3.3 * adc_refcor); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(adc_all_read_vref_obj, adc_all_read_vref); -#endif - -STATIC const mp_rom_map_elem_t adc_all_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_read_channel), MP_ROM_PTR(&adc_all_read_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_core_temp), MP_ROM_PTR(&adc_all_read_core_temp_obj) }, -#if MICROPY_PY_BUILTINS_FLOAT - { MP_ROM_QSTR(MP_QSTR_read_core_vbat), MP_ROM_PTR(&adc_all_read_core_vbat_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_core_vref), MP_ROM_PTR(&adc_all_read_core_vref_obj) }, - { MP_ROM_QSTR(MP_QSTR_read_vref), MP_ROM_PTR(&adc_all_read_vref_obj) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(adc_all_locals_dict, adc_all_locals_dict_table); - -const mp_obj_type_t pyb_adc_all_type = { - { &mp_type_type }, - .name = MP_QSTR_ADCAll, - .make_new = adc_all_make_new, - .locals_dict = (mp_obj_dict_t*)&adc_all_locals_dict, -}; diff --git a/ports/stm32/adc.h b/ports/stm32/adc.h deleted file mode 100644 index c90e6b34339a4..0000000000000 --- a/ports/stm32/adc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_ADC_H -#define MICROPY_INCLUDED_STMHAL_ADC_H - -extern const mp_obj_type_t pyb_adc_type; -extern const mp_obj_type_t pyb_adc_all_type; - -#endif // MICROPY_INCLUDED_STMHAL_ADC_H diff --git a/ports/stm32/autoflash b/ports/stm32/autoflash deleted file mode 100755 index d2240ccb55c8c..0000000000000 --- a/ports/stm32/autoflash +++ /dev/null @@ -1,44 +0,0 @@ -#!/bin/sh -# -# This script loops doing the following: -# - wait for DFU device -# - flash DFU device -# - wait for DFU to exit -# - wait for serial port to appear -# - run a terminal - -SERIAL=/dev/ttyACM0 -DEVICE=0483:df11 - -while true; do - echo "waiting for DFU device..." - while true; do - if lsusb | grep -q DFU; then - break - fi - sleep 1s - done - - echo "found DFU device, flashing" - dfu-util -a 0 -d $DEVICE -D build/flash.dfu - - echo "waiting for DFU to exit..." - while true; do - if lsusb | grep -q DFU; then - sleep 1s - continue - fi - break - done - - echo "waiting for $SERIAL..." - while true; do - if ls /dev/tty* | grep -q $SERIAL; then - break - fi - sleep 1s - continue - done - sleep 1s - picocom $SERIAL -done diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h deleted file mode 100644 index 77f029c00644d..0000000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h +++ /dev/null @@ -1,76 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "B-L475E-IOT01A" -#define MICROPY_HW_MCU_NAME "STM32L475" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV4) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART1 config connected to ST-Link -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -// USART2 config connected to PMOD: Flow control is defined and therfore used -#define MICROPY_HW_UART2_CTS (pin_D3) -#define MICROPY_HW_UART2_RTS (pin_D4) -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -// USART3 config for internal use -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -// USART4 config -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -// USART 1 is connected to the virtual com port on the ST-LINK -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) - -#define MICROPY_HW_SPI2_NSS (pin_D0) -#define MICROPY_HW_SPI2_SCK (pin_D1) -#define MICROPY_HW_SPI2_MISO (pin_D3) -#define MICROPY_HW_SPI2_MOSI (pin_D4) - -#define MICROPY_HW_SPI3_NSS (pin_A15) -#define MICROPY_HW_SPI3_SCK (pin_C10) -#define MICROPY_HW_SPI3_MISO (pin_C11) -#define MICROPY_HW_SPI3_MOSI (pin_C12) - -// User and wake-up switch. Pressing the button makes the input go low. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // green -#define MICROPY_HW_LED2 (pin_B14) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk deleted file mode 100644 index 1ba61a32742da..0000000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk +++ /dev/null @@ -1,8 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L475xx -# The stm32l475 does not have a LDC controller which is -# the only diffrence to the stm32l476 - so reuse some files. -AF_FILE = boards/stm32l476_af.csv -LD_FILE = boards/stm32l476xg.ld -TEXT_ADDR = 0x08004000 -OPENOCD_CONFIG = boards/openocd_stm32l4.cfg diff --git a/ports/stm32/boards/B_L475E_IOT01A/pins.csv b/ports/stm32/boards/B_L475E_IOT01A/pins.csv deleted file mode 100644 index afe87b71c437c..0000000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/pins.csv +++ /dev/null @@ -1,82 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h b/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h deleted file mode 100644 index 9348e06790496..0000000000000 --- a/ports/stm32/boards/B_L475E_IOT01A/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#define USE_USB_FS -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/CERB40/mpconfigboard.h b/ports/stm32/boards/CERB40/mpconfigboard.h deleted file mode 100644 index 284de7a40f21d..0000000000000 --- a/ports/stm32/boards/CERB40/mpconfigboard.h +++ /dev/null @@ -1,67 +0,0 @@ -#define CERB40 - -#define MICROPY_HW_BOARD_NAME "Cerb40" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// The Cerb40 has No LEDs - -// The Cerb40 has No SDCard - -// USB config -//#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -//#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/CERB40/mpconfigboard.mk b/ports/stm32/boards/CERB40/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/CERB40/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/CERB40/pins.csv b/ports/stm32/boards/CERB40/pins.csv deleted file mode 100644 index 411031e8f5d8e..0000000000000 --- a/ports/stm32/boards/CERB40/pins.csv +++ /dev/null @@ -1,46 +0,0 @@ -JP1,3.3V -JP2,GND -JP3,PA8 -JP4,PA13 -JP5,PA7 -JP6,PA6 -JP7,PC10 -JP8,PA14 -JP9,PC11 -JP10,PB4 -JP11,PB9 -JP12,PB3 -JP13,PD2 -JP14,PC12 -JP15,VBAT -JP16,PB8 -JP17,Loader -JP18,PB7 -JP19,PB6 -JP20,PB5 -JP21,Reset -JP22,PC0 -JP23,PC1 -JP24,PC2 -JP25,PC3 -JP26,PA0 -JP27,PA1 -JP28,PA2 -JP29,PA3 -JP30,PA4 -JP31,PA5 -JP32,PB10 -JP33,PB11 -JP34,PB14 -JP35,PB15 -JP36,PC6 -JP37,PC7 -JP38,PC8 -JP39,PC9 -JP40,VUSB -UART1_TX,PA9 -UART1_RX,PA10 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 diff --git a/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h b/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h deleted file mode 100644 index d6aca705cf0f8..0000000000000 --- a/ports/stm32/boards/CERB40/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h b/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h deleted file mode 100644 index d065180d8af91..0000000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.h +++ /dev/null @@ -1,72 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "Espruino Pico" -#define MICROPY_HW_MCU_NAME "STM32F401CD" - -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_PY_BUILTINS_COMPLEX (0) -#define MICROPY_PY_USOCKET (0) -#define MICROPY_PY_NETWORK (0) - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -// Pico has an 8 MHz HSE and the F401 does 84 MHz max -#define MICROPY_HW_CLK_PLLM (5) -#define MICROPY_HW_CLK_PLLN (210) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// does not have a 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (0) - -// UART config -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_TX (pin_A11) -#define MICROPY_HW_UART6_RX (pin_A12) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B3) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_B4) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// BTN1 has no pullup or pulldown; it is active high and broken out on a header -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLDOWN) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// Pico has 2 LEDs -#define MICROPY_HW_LED1 (pin_B2) // red -#define MICROPY_HW_LED2 (pin_B12) // green -#define MICROPY_HW_LED3 (pin_B12) // green -#define MICROPY_HW_LED4 (pin_B12) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk b/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk deleted file mode 100644 index d531a594a170b..0000000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/mpconfigboard.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F401xE -AF_FILE = boards/stm32f401_af.csv -LD_FILE = boards/stm32f401xd.ld - -# Don't include default frozen modules because MCU is tight on flash space -FROZEN_MPY_DIR ?= diff --git a/ports/stm32/boards/ESPRUINO_PICO/pins.csv b/ports/stm32/boards/ESPRUINO_PICO/pins.csv deleted file mode 100644 index 636eb2cb3cd1d..0000000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/pins.csv +++ /dev/null @@ -1,34 +0,0 @@ -B3,PB3 -B4,PB4 -B5,PB5 -B6,PB6 -B7,PB7 -A8,PA8 -B8,PB8 -B9,PB9 -A10,PA10 -A0,PA0 -A1,PA1 -A2,PA2 -A3,PA3 -A4,PA4 -A5,PA5 -A6,PA6 -A7,PA7 -B1,PB1 -B10,PB10 -B13,PB13 -B14,PB14 -B15,PB15 -B0,PB0 -SW,PC13 -LED_RED,PB2 -LED_GREEN,PB12 -USB_VBUS,PA9 -USB_DM,PA11 -USB_DP,PA12 -OSC32_IN,PC14 -OSC32_OUT,PC15 -NC1,PA13 -NC2,PA14 -NC3,PA15 diff --git a/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h b/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h deleted file mode 100644 index 11a396b73e1b4..0000000000000 --- a/ports/stm32/boards/ESPRUINO_PICO/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/HYDRABUS/mpconfigboard.h b/ports/stm32/boards/HYDRABUS/mpconfigboard.h deleted file mode 100644 index 38fba9787aaaf..0000000000000 --- a/ports/stm32/boards/HYDRABUS/mpconfigboard.h +++ /dev/null @@ -1,81 +0,0 @@ -#define HYDRABUSV10 - -#define MICROPY_HW_BOARD_NAME "HydraBus1.0" -#define MICROPY_HW_MCU_NAME "STM32F4" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (0) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// USRSW/UBTN (Needs Jumper UBTN) is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// The HydraBus has 1 LED (Needs jumper on ULED) -#define MICROPY_HW_LED1 (pin_A4) // green -#define MICROPY_HW_LED2 (pin_A4) // same as LED1 -#define MICROPY_HW_LED3 (pin_A4) // same as LED1 -#define MICROPY_HW_LED4 (pin_A4) // same as LED1 -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch (not used, always on) -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (1) - -// USB config -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/HYDRABUS/mpconfigboard.mk b/ports/stm32/boards/HYDRABUS/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/HYDRABUS/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/HYDRABUS/pins.csv b/ports/stm32/boards/HYDRABUS/pins.csv deleted file mode 100644 index 47e1f431398dd..0000000000000 --- a/ports/stm32/boards/HYDRABUS/pins.csv +++ /dev/null @@ -1,52 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -VUSB,PB13 -USB1D_N,PB14 -USB1D_P,PB15 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PD2,PD2 -BOOT0,BOOT0 -PA15,PA15 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 diff --git a/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h b/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h deleted file mode 100644 index d3df51c10190d..0000000000000 --- a/ports/stm32/boards/HYDRABUS/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/LIMIFROG/board_init.c b/ports/stm32/boards/LIMIFROG/board_init.c deleted file mode 100644 index 72f920842467a..0000000000000 --- a/ports/stm32/boards/LIMIFROG/board_init.c +++ /dev/null @@ -1,154 +0,0 @@ -// The code is this file allows the user to enter DFU mode when the board -// starts up, by connecting POS10 on the external connector to GND. -// The code itself is taken from the LimiFrog software repository found at -// https://github.com/LimiFrog/LimiFrog-SW, and the original license header -// is copied below. - -#include STM32_HAL_H - -static void LBF_DFU_If_Needed(void); - -void LIMIFROG_board_early_init(void) { - LBF_DFU_If_Needed(); -} - -/******************************************************************************* - * LBF_DFU_If_Needed.c - * - * (c)2015 LimiFrog / CYMEYA - * This program is licensed under the terms of the MIT License. - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND. - * Please refer to the License File LICENSE.txt located at the root of this - * project for full licensing conditions, - * or visit https://opensource.org/licenses/MIT. - ******************************************************************************/ - -#define __LIMIFROG_02 - -/* ==== BTLE (excl UART) ======================================== */ -// PC9 = BT_RST (active high) - -#define BT_RST_PIN GPIO_PIN_9 -#define BT_RST_PORT GPIOC - -// Position 10 -#ifdef __LIMIFROG_01 - #define CONN_POS10_PIN GPIO_PIN_9 - #define CONN_POS10_PORT GPIOB -#else - #define CONN_POS10_PIN GPIO_PIN_8 - #define CONN_POS10_PORT GPIOB -#endif - -static inline void GPIO_HIGH(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIOx->BSRR = (uint32_t)GPIO_Pin; -} - -static inline int IS_GPIO_RESET(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIO_PinState bitstatus; - if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - { - bitstatus = GPIO_PIN_SET; - } - else - { - bitstatus = GPIO_PIN_RESET; - } - return (bitstatus==GPIO_PIN_RESET); -} - -/************************************************************** - RATIONALE FOR THIS FUNCTION : - - - The STM32 embeds in ROM a bootloader that allows to - obtain code and boot from a number of different interfaces, - including USB in a mode called "DFU" (Device Frimware Update) - [see AN3606 from ST for full details] - This bootloader code is executed instead of the regular - application code when pin BOOT0 is pulled-up (which on - LimiFrog0.2 is achieved by pressing the general-purpose - pushbutton switch on the side. - - The bootloader monitors a number of IOs of the STM32 to decide - from which interface it should boot. - - Problem in LimiFrog (up to versions 0.2a at least): upon - power-up the BLE modules generates some activity on UART3, - which is part of the pins monitored by the STM32. - This misleads the bootloader in trying to boot from UART3 - and, as a result, not continuing with booting from USB. - - - This code implements an alternative solution to launch the - bootloader while making sure UART3 remains stable. - - The idea it to start application code with a check, prior to any - other applicative code, of whether USB bootload is required (as - flagged by a GPIO pulled low at reset, in the same way as BOOT0). - The hadware reset pin of BLE is asserted (so that now it won't - generate any acitivity on UART3), and if USB bootload is required : - bootload ROM is remapped at address 0x0, stack pointer is - updated and the code is branched to the start of the bootloader. - - This code is run prior to any applicative configuration of clocks, - IRQs etc. -- the STM32 is therefore still running from MSI - - THIS FUNCTION MAY BE SUPPRESSED IF YOU NEVER NEED TO BOOT DFU MODE - - ********************************************************************/ - -static void LBF_DFU_If_Needed(void) -{ - - - GPIO_InitTypeDef GPIO_InitStruct; - - - // Initialize and assert pin BTLE_RST - // (hw reset to BLE module, so it won't drive UART3) - - __GPIOC_CLK_ENABLE(); - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_LOW; - GPIO_InitStruct.Pin = BT_RST_PIN; - HAL_GPIO_Init(BT_RST_PORT, &GPIO_InitStruct); - - GPIO_HIGH(BT_RST_PORT, BT_RST_PIN); // assert BTLE reset - - - /* -- Bootloader will be called if position 10 on the extension port - is actively pulled low -- */ - // Note - this is an arbitrary choice, code could be modified to - // monitor another GPIO of the STM32 and/or decide that active level - // is high rather than low - - - // Initialize Extension Port Position 10 = PB8 (bears I2C1_SCL) - // Use weak pull-up to detect if pin is externally pulled low - - __GPIOB_CLK_ENABLE(); - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Pin = CONN_POS10_PIN; - HAL_GPIO_Init(CONN_POS10_PORT, &GPIO_InitStruct); - - // If selection pin pulled low... - if ( IS_GPIO_RESET(CONN_POS10_PORT, CONN_POS10_PIN )) - - { - // Remap bootloader ROM (ie System Flash) to address 0x0 - SYSCFG->MEMRMP = 0x00000001; - - // Init stack pointer with value residing at ROM base - asm ( - "LDR R0, =0x00000000\n\t" // load ROM base address" - "LDR SP,[R0, #0]\n\t" // assign main stack pointer" - ); - - // Jump to address pointed by 0x00000004 -- */ - - asm ( - "LDR R0,[R0, #4]\n\t" // load bootloader address - "BX R0\n\t" - ); - - } -} diff --git a/ports/stm32/boards/LIMIFROG/mpconfigboard.h b/ports/stm32/boards/LIMIFROG/mpconfigboard.h deleted file mode 100644 index 42b862fcf5640..0000000000000 --- a/ports/stm32/boards/LIMIFROG/mpconfigboard.h +++ /dev/null @@ -1,61 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "LIMIFROG" -#define MICROPY_HW_MCU_NAME "STM32L476" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -#define MICROPY_BOARD_EARLY_INIT LIMIFROG_board_early_init -void LIMIFROG_board_early_init(void); - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART config -#define MICROPY_HW_UART3_TX (pin_C10) -#define MICROPY_HW_UART3_RX (pin_C11) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) - -#define MICROPY_HW_SPI3_NSS (pin_A15) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -#define MICROPY_HW_USRSW_PIN (pin_A15) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_C3) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -// #define MICROPY_HW_USB_OTG_ID_PIN (pin_C12) // This is not the official ID Pin which should be PA10 diff --git a/ports/stm32/boards/LIMIFROG/mpconfigboard.mk b/ports/stm32/boards/LIMIFROG/mpconfigboard.mk deleted file mode 100644 index a1304b6559a5e..0000000000000 --- a/ports/stm32/boards/LIMIFROG/mpconfigboard.mk +++ /dev/null @@ -1,5 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILE = boards/stm32l476xe.ld -TEXT_ADDR = 0x08004000 diff --git a/ports/stm32/boards/LIMIFROG/pins.csv b/ports/stm32/boards/LIMIFROG/pins.csv deleted file mode 100644 index 52f96b669c36d..0000000000000 --- a/ports/stm32/boards/LIMIFROG/pins.csv +++ /dev/null @@ -1,114 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PF0,PF0 -PF1,PF1 -PF2,PF2 -PF3,PF3 -PF4,PF4 -PF5,PF5 -PF6,PF6 -PF7,PF7 -PF8,PF8 -PF9,PF9 -PF10,PF10 -PF11,PF11 -PF12,PF12 -PF13,PF13 -PF14,PF14 -PF15,PF15 -PG0,PG0 -PG1,PG1 -PG2,PG2 -PG3,PG3 -PG4,PG4 -PG5,PG5 -PG6,PG6 -PG7,PG7 -PG8,PG8 -PG9,PG9 -PG10,PG10 -PG11,PG11 -PG12,PG12 -PG13,PG13 -PG14,PG14 -PG15,PG15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h b/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h deleted file mode 100644 index 9348e06790496..0000000000000 --- a/ports/stm32/boards/LIMIFROG/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#define USE_USB_FS -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c b/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c deleted file mode 100644 index 085034b2d8fa3..0000000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/board_init.c +++ /dev/null @@ -1,24 +0,0 @@ -#include STM32_HAL_H - -void NETDUINO_PLUS_2_board_early_init(void) { - - __GPIOB_CLK_ENABLE(); - - // Turn off the backlight. LCD_BL_CTRL = PK3 - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; - GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - -#if MICROPY_HW_HAS_SDCARD - // Turn on the power enable for the sdcard (PB1) - GPIO_InitStructure.Pin = GPIO_PIN_1; - HAL_GPIO_Init(GPIOB, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, GPIO_PIN_SET); -#endif - - // Turn on the power for the 5V on the expansion header (PB2) - GPIO_InitStructure.Pin = GPIO_PIN_2; - HAL_GPIO_Init(GPIOB, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_2, GPIO_PIN_SET); -} diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h b/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h deleted file mode 100644 index 9586ae4e55977..0000000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.h +++ /dev/null @@ -1,73 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NetduinoPlus2" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) - -#define MICROPY_HW_HAS_FLASH (1) -// On the netuino, the sdcard appears to be wired up as a 1-bit -// SPI, so the driver needs to be converted to support that before -// we can turn this on. -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -void NETDUINO_PLUS_2_board_early_init(void); -#define MICROPY_BOARD_EARLY_INIT NETDUINO_PLUS_2_board_early_init - -// HSE is 25MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) - -// SPI busses -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_B11) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_A10) // Blue LED -#define MICROPY_HW_LED2 (pin_C13) // White LED (aka Power) -#define MICROPY_HW_LED3 (pin_A10) // Same as Led(1) -#define MICROPY_HW_LED4 (pin_C13) // Same as Led(2) -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB VBUS detect pin -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk b/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv b/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv deleted file mode 100644 index 3e71fade6e257..0000000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/pins.csv +++ /dev/null @@ -1,35 +0,0 @@ -D0,PC7 -D1,PC6 -D2,PA3 -D3,PA2 -D4,PB12 -D5,PB8 -D6,PB9 -D7,PA1 -D8,PA0 -D9,PA6 -D10,PB10 -D11,PB15 -D12,PB14 -D13,PB13 -SDA,PB6 -SCL,PB7 -A0,PC0 -A1,PC1 -A2,PC2 -A3,PC3 -A4,PC4 -A5,PC5 -LED,PA10 -SW,PB11 -PWR_LED,PC13 -PWR_SD,PB1 -PWR_HDR,PB2 -PWR_ETH,PC15 -RST_ETH,PD2 -UART1_TX,PA9 -UART3_TX,PD8 -UART3_RX,PD9 -UART3_RTS,PD12 -UART3_CTS,PD11 -UART5_TX,PC12 diff --git a/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h b/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h deleted file mode 100644 index 42c2c4e9beea3..0000000000000 --- a/ports/stm32/boards/NETDUINO_PLUS_2/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h deleted file mode 100644 index a843d3c35fb7c..0000000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h +++ /dev/null @@ -1,57 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F401RE" -#define MICROPY_HW_MCU_NAME "STM32F401xE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 84MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 3 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B9) // D14, pin 5 on CN10 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk deleted file mode 100644 index eb391bed73df1..0000000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F401xE -AF_FILE = boards/stm32f401_af.csv -LD_FILE = boards/stm32f401xe.ld diff --git a/ports/stm32/boards/NUCLEO_F401RE/pins.csv b/ports/stm32/boards/NUCLEO_F401RE/pins.csv deleted file mode 100644 index 6fbf91e29a85d..0000000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/pins.csv +++ /dev/null @@ -1,75 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h deleted file mode 100644 index f4db4cb6318c5..0000000000000 --- a/ports/stm32/boards/NUCLEO_F401RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,413 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -// This board doesn't really have USB, but the stm32 codebase doesn't build -// without some USB defined, so we leave this on for now. -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h deleted file mode 100644 index 26b1e0b619d2e..0000000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.h +++ /dev/null @@ -1,68 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F411RE" -#define MICROPY_HW_MCU_NAME "STM32F411xE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 96MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (192) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 3 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B9) // D14, pin 5 on CN10 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -#define MICROPY_HW_SPI4_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI4_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI4_MISO (pin_A1) // pin 30 on CN7 -#define MICROPY_HW_SPI4_MOSI (pin_A11) // pin 14 on CN10 - - -#define MICROPY_HW_SPI5_NSS (pin_B1) // pin 24 on CN10 -#define MICROPY_HW_SPI5_SCK (pin_A10) // pin 33 on CN10 -#define MICROPY_HW_SPI5_MISO (pin_A12) // pin 12 on CN10 -#define MICROPY_HW_SPI5_MOSI (pin_B0) // pin 34 on CN7 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk deleted file mode 100644 index 71b3b19d65a36..0000000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILE = boards/stm32f411.ld diff --git a/ports/stm32/boards/NUCLEO_F411RE/pins.csv b/ports/stm32/boards/NUCLEO_F411RE/pins.csv deleted file mode 100644 index 6fbf91e29a85d..0000000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/pins.csv +++ /dev/null @@ -1,75 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h deleted file mode 100644 index 0c424888f8d33..0000000000000 --- a/ports/stm32/boards/NUCLEO_F411RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,413 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -// This board doesn't really have USB, but the stm32 codebase doesn't build -// without some USB defined, so we leave this on for now. -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h deleted file mode 100644 index 42cc9d68cd361..0000000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h +++ /dev/null @@ -1,83 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F429ZI" -#define MICROPY_HW_MCU_NAME "STM32F429" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (180) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) - -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) - -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) - -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_C11) - -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) - -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_B3) -#define MICROPY_HW_SPI1_MISO (pin_B4) -#define MICROPY_HW_SPI1_MOSI (pin_B5) - -#define MICROPY_HW_SPI4_NSS (pin_E4) -#define MICROPY_HW_SPI4_SCK (pin_E2) -#define MICROPY_HW_SPI4_MISO (pin_E5) -#define MICROPY_HW_SPI4_MOSI (pin_E6) - -#define MICROPY_HW_SPI5_NSS (pin_F6) -#define MICROPY_HW_SPI5_SCK (pin_F7) -#define MICROPY_HW_SPI5_MISO (pin_F8) -#define MICROPY_HW_SPI5_MOSI (pin_F9) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk deleted file mode 100644 index 1bbf808b69fa0..0000000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F429xx -AF_FILE = boards/stm32f429_af.csv -LD_FILE = boards/stm32f429.ld diff --git a/ports/stm32/boards/NUCLEO_F429ZI/pins.csv b/ports/stm32/boards/NUCLEO_F429ZI/pins.csv deleted file mode 100644 index 8a892d3c2f298..0000000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/pins.csv +++ /dev/null @@ -1,117 +0,0 @@ -PF4,PF4 -PF5,PF5 -PF2,PF2 -PF3,PF3 -PF0,PF0 -PF1,PF1 -PC14,PC14 -PC15,PC15 -PE6,PE6 -PC13,PC13 -PE4,PE4 -PE5,PE5 -PE2,PE2 -PE3,PE3 -PE0,PE0 -PE1,PE1 -PB8,PB8 -PB9,PB9 -PB6,PB6 -PB7,PB7 -PB4,PB4 -PB5,PB5 -PG15,PG15 -PB3,PB3 -PG13,PG13 -PG14,PG14 -PG11,PG11 -PG12,PG12 -PG9,PG9 -PG10,PG10 -PD7,PD7 -PD6,PD6 -PD5,PD5 -PD4,PD4 -PD3,PD3 -PD2,PD2 -PD1,PD1 -PD0,PD0 -PC12,PC12 -PC11,PC11 -PC10,PC10 -PA15,PA15 -PA14,PA14 -PA13,PA13 -PA12,PA12 -PA11,PA11 -PA10,PA10 -PA9,PA9 -PA8,PA8 -PC9,PC9 -PC8,PC8 -PC7,PC7 -PC6,PC6 -PG8,PG8 -PG7,PG7 -PG6,PG6 -PG5,PG5 -PG4,PG4 -PF6,PF6 -PF8,PF8 -PF7,PF7 -PF10,PF10 -PF9,PF9 -PH1,PH1 -PH0,PH0 -PC1,PC1 -PC0,PC0 -PC3,PC3 -PC2,PC2 -PA1,PA1 -PA0,PA0 -PA3,PA3 -PA2,PA2 -PA5,PA5 -PA4,PA4 -PA7,PA7 -PA6,PA6 -PC5,PC5 -PC4,PC4 -PB1,PB1 -PB0,PB0 -PB2,PB2 -PF12,PF12 -PF11,PF11 -PF14,PF14 -PF13,PF13 -PG0,PG0 -PF15,PF15 -PE7,PE7 -PG1,PG1 -PE9,PE9 -PE8,PE8 -PE11,PE11 -PE10,PE10 -PE13,PE13 -PE12,PE12 -PE15,PE15 -PE14,PE14 -PB11,PB11 -PB10,PB10 -PB13,PB13 -PB12,PB12 -PB15,PB15 -PB14,PB14 -PD9,PD9 -PD8,PD8 -PD11,PD11 -PD10,PD10 -PD13,PD13 -PD12,PD12 -PD15,PD15 -PD14,PD14 -PG3,PG3 -PG2,PG2 -SW,PA0 -LED_GREEN,PG13 -LED_RED,PG14 diff --git a/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h deleted file mode 100644 index d121b18c5e3d8..0000000000000 --- a/ports/stm32/boards/NUCLEO_F429ZI/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h deleted file mode 100644 index d801fa18854d3..0000000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.h +++ /dev/null @@ -1,64 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-F446RE" -#define MICROPY_HW_MCU_NAME "STM32F446xx" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_ENABLE_RTC (1) - -// HSE is 8MHz, CPU freq set to 168MHz. Using PLLQ for USB this gives a nice -// 48 MHz clock for USB. To goto 180 MHz, I think that USB would need to be -// configured to use PLLSAI -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -// UART 2 connects to the STM32F103 (STLINK) on the Nucleo board -// and this is exposed as a USB Serial port. -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) // Arduino D10, pin 17 on CN10 -#define MICROPY_HW_I2C1_SDA (pin_B7) // pin 21 on CN7 -#define MICROPY_HW_I2C2_SCL (pin_B10) // Arduino D6, pin 25 on CN10 -#define MICROPY_HW_I2C2_SDA (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_I2C3_SCL (pin_A8) // Arduino D7, pin 23 on CN10 -#define MICROPY_HW_I2C3_SDA (pin_C9) // pin 1 on CN10 - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A15) // pin 17 on CN7 -#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin 11 on CN10 -#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin 13 on CN10 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin 15 on CN10 - -#define MICROPY_HW_SPI2_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI2_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI2_MISO (pin_B14) // pin 28 on CN10 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // pin 26 on CN10 - -#define MICROPY_HW_SPI3_NSS (pin_A4) // Arduino A2, pin 32 on CN7 -#define MICROPY_HW_SPI3_SCK (pin_B3) // Arduino D3, pin 31 on CN10 -#define MICROPY_HW_SPI3_MISO (pin_B4) // Arduino D5, pin 27 on CN10 -#define MICROPY_HW_SPI3_MOSI (pin_B5) // Arduino D4, pin 29 on CN10 - -#define MICROPY_HW_SPI4_NSS (pin_B12) // pin 16 on CN10 -#define MICROPY_HW_SPI4_SCK (pin_B13) // pin 30 on CN10 -#define MICROPY_HW_SPI4_MISO (pin_A1) // pin 30 on CN7 -#define MICROPY_HW_SPI4_MOSI (pin_A11) // pin 14 on CN10 - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk deleted file mode 100644 index e1ec6d57cf670..0000000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F446xx -AF_FILE = boards/stm32f429_af.csv -LD_FILE = boards/stm32f411.ld diff --git a/ports/stm32/boards/NUCLEO_F446RE/pins.csv b/ports/stm32/boards/NUCLEO_F446RE/pins.csv deleted file mode 100644 index 5b09bcc74be56..0000000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/pins.csv +++ /dev/null @@ -1,72 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED,PA5 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h deleted file mode 100644 index 487ca009f2cc3..0000000000000 --- a/ports/stm32/boards/NUCLEO_F446RE/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,413 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -// This board doesn't really have USB, but the stm32 codebase doesn't build -// without some USB defined, so we leave this on for now. -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h deleted file mode 100644 index 8952bce82f8b8..0000000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h +++ /dev/null @@ -1,76 +0,0 @@ -// This board is only confirmed to operate using DFU mode and openocd. -// DFU mode can be accessed by setting BOOT0 (see schematics) -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. - -#define MICROPY_HW_BOARD_NAME "NUCLEO-F767ZI" -#define MICROPY_HW_MCU_NAME "STM32F767" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (4) -#define MICROPY_HW_CLK_PLLN (216) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -#define MICROPY_HW_UART2_RTS (pin_D4) -#define MICROPY_HW_UART2_CTS (pin_D3) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART6_TX (pin_G14) -#define MICROPY_HW_UART6_RX (pin_G9) -#define MICROPY_HW_UART_REPL PYB_UART_3 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI3_NSS (pin_A4) -#define MICROPY_HW_SPI3_SCK (pin_B3) -#define MICROPY_HW_SPI3_MISO (pin_B4) -#define MICROPY_HW_SPI3_MOSI (pin_B5) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B0) // green -#define MICROPY_HW_LED2 (pin_B7) // blue -#define MICROPY_HW_LED3 (pin_B14) // red -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk deleted file mode 100644 index ba28a16e1ee22..0000000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk +++ /dev/null @@ -1,5 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F767xx -MICROPY_FLOAT_IMPL = double -AF_FILE = boards/stm32f767_af.csv -LD_FILE = boards/stm32f767.ld diff --git a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv b/ports/stm32/boards/NUCLEO_F767ZI/pins.csv deleted file mode 100644 index 897b1473e71f4..0000000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv +++ /dev/null @@ -1,68 +0,0 @@ -A0,PA3 -A1,PC0 -A2,PC3 -A3,PF3 -A4,PF5 -A5,PF10 -D0,PG9 -D1,PG14 -D2,PF15 -D3,PE13 -D4,PF14 -D5,PE11 -D6,PE9 -D7,PF13 -D8,PF12 -D9,PD15 -D10,PD14 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -D16,PC6 -D17,PB15 -D18,PB13 -D19,PB12 -D20,PA15 -D21,PC7 -D22,PB5 -D23,PB3 -D24,PA4 -D25,PB4 -LED1,PB0 -LED2,PB7 -LED3,PB14 -SW,PC13 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_SW,PC13 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 -VCP_TX,PD8 -VCP_RX,PD9 -UART2_TX,PD5 -UART2_RX,PD6 -UART2_RTS,PD4 -UART2_CTS,PD3 -UART6_TX,PG14 -UART6_RX,PG9 -SPI_B_NSS,PA4 -SPI_B_SCK,PB3 -SPI_B_MOSI,PB5 diff --git a/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h deleted file mode 100644 index e1aa4578d5f77..0000000000000 --- a/ports/stm32/boards/NUCLEO_F767ZI/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,429 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h deleted file mode 100644 index f2474619feac3..0000000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h +++ /dev/null @@ -1,53 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "NUCLEO-L476RG" -#define MICROPY_HW_MCU_NAME "STM32L476RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RTC (1) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLR (2) -#define MICROPY_HW_CLK_PLLP (7) -#define MICROPY_HW_CLK_PLLQ (4) - -// UART config -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) - -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_C0) -#define MICROPY_HW_I2C3_SDA (pin_C1) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_B3) -#define MICROPY_HW_SPI1_MISO (pin_B4) -#define MICROPY_HW_SPI1_MOSI (pin_B5) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_C13) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED1 (pin_A5) // Green LD2 LED on Nucleo -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk deleted file mode 100644 index abb4a35707b6a..0000000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk +++ /dev/null @@ -1,5 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILE = boards/stm32l476xg.ld -TEXT_ADDR = 0x08004000 diff --git a/ports/stm32/boards/NUCLEO_L476RG/pins.csv b/ports/stm32/boards/NUCLEO_L476RG/pins.csv deleted file mode 100644 index 035d933f5dd45..0000000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/pins.csv +++ /dev/null @@ -1,76 +0,0 @@ -D0,PA3 -D1,PA2 -D2,PA10 -D3,PB3 -D4,PB5 -D5,PB4 -D6,PB10 -D7,PA8 -D8,PA9 -D9,PC7 -D10,PB6 -D11,PA7 -D12,PA6 -D13,PA5 -D14,PB9 -D15,PB8 -A0,PA0 -A1,PA1 -A2,PA4 -A3,PB0 -A4,PC1 -A5,PC0 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD2,PD2 -PH0,PH0 -PH1,PH1 -LED_GREEN,PA5 -LED_ORANGE,PA5 -LED_RED,PA5 -LED_BLUE,PA4 -SW,PC13 diff --git a/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h b/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h deleted file mode 100755 index 9348e06790496..0000000000000 --- a/ports/stm32/boards/NUCLEO_L476RG/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#define USE_USB_FS -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h b/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h deleted file mode 100644 index 5ede682647a64..0000000000000 --- a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.h +++ /dev/null @@ -1,80 +0,0 @@ -#define STM32E407 - -#define MICROPY_HW_BOARD_NAME "OLIMEX STM32-E407" -#define MICROPY_HW_MCU_NAME "STM32F407" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#if MICROPY_HW_HAS_SWITCH == 0 -// NOTE: A0 also connects to the user switch. To use UART4 you should -// set MICROPY_HW_HAS_SWITCH to 0, and also remove SB20 (on the back -// of the board near the USER switch). -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#endif -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_C13) -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C11) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk b/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk deleted file mode 100644 index ece09caa13737..0000000000000 --- a/ports/stm32/boards/OLIMEX_E407/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F407xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/OLIMEX_E407/pins.csv b/ports/stm32/boards/OLIMEX_E407/pins.csv deleted file mode 100644 index 6b91f74ae4777..0000000000000 --- a/ports/stm32/boards/OLIMEX_E407/pins.csv +++ /dev/null @@ -1,85 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -LED_GREEN,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PA0,PA0 - diff --git a/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h b/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h deleted file mode 100644 index b84b0a89207d0..0000000000000 --- a/ports/stm32/boards/OLIMEX_E407/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBLITEV10/mpconfigboard.h b/ports/stm32/boards/PYBLITEV10/mpconfigboard.h deleted file mode 100644 index 090ba4cf1beb2..0000000000000 --- a/ports/stm32/boards/PYBLITEV10/mpconfigboard.h +++ /dev/null @@ -1,87 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBLITEv1.0" -#define MICROPY_HW_MCU_NAME "STM32F411RE" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (192) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// Pyboard lite has an optional 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_NAME "XA" -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C3_NAME "Y" -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_B8) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_B5) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_A10) diff --git a/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk b/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk deleted file mode 100644 index 71b3b19d65a36..0000000000000 --- a/ports/stm32/boards/PYBLITEV10/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILE = boards/stm32f411.ld diff --git a/ports/stm32/boards/PYBLITEV10/pins.csv b/ports/stm32/boards/PYBLITEV10/pins.csv deleted file mode 100644 index 838587c1bcca0..0000000000000 --- a/ports/stm32/boards/PYBLITEV10/pins.csv +++ /dev/null @@ -1,60 +0,0 @@ -X1,PA2 -X2,PA3 -X3,PA0 -X4,PA1 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB10 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PA8 -Y10,PB8 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_BLUE,PB4 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -MMA_AVDD,PA10 -MMA_INT,PB2 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD_SW,PB5 -USB_VBUS,PA9 -USB_DM,PA11 -USB_DP,PA12 -USB_ID,PA10 -OSC32_IN,PC14 -OSC32_OUT,PC15 diff --git a/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h deleted file mode 100644 index 4ee8e727690fe..0000000000000 --- a/ports/stm32/boards/PYBLITEV10/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV10/mpconfigboard.h b/ports/stm32/boards/PYBV10/mpconfigboard.h deleted file mode 100644 index c06022a34d1f5..0000000000000 --- a/ports/stm32/boards/PYBV10/mpconfigboard.h +++ /dev/null @@ -1,99 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv1.0" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" // CAN1 on RX,TX = Y3,Y4 = PB8,PB9 -#define MICROPY_HW_CAN2_NAME "YB" // CAN2 on RX,TX = Y5,Y6 = PB12,PB13 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV10/mpconfigboard.mk b/ports/stm32/boards/PYBV10/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/PYBV10/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/PYBV10/pins.csv b/ports/stm32/boards/PYBV10/pins.csv deleted file mode 100644 index cee80a1aa1cf9..0000000000000 --- a/ports/stm32/boards/PYBV10/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h deleted file mode 100644 index 3d925226449a1..0000000000000 --- a/ports/stm32/boards/PYBV10/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV11/mpconfigboard.h b/ports/stm32/boards/PYBV11/mpconfigboard.h deleted file mode 100644 index c69e52cc50d4c..0000000000000 --- a/ports/stm32/boards/PYBV11/mpconfigboard.h +++ /dev/null @@ -1,99 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv1.1" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 12MHz -#define MICROPY_HW_CLK_PLLM (12) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) -#define MICROPY_HW_CLK_LAST_FREQ (1) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) -#define MICROPY_HW_RTC_USE_US (0) -#define MICROPY_HW_RTC_USE_CALOUT (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_TX (pin_B6) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" // CAN1 on RX,TX = Y3,Y4 = PB8,PB9 -#define MICROPY_HW_CAN2_NAME "YB" // CAN2 on RX,TX = Y5,Y6 = PB12,PB13 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV11/mpconfigboard.mk b/ports/stm32/boards/PYBV11/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/PYBV11/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/PYBV11/pins.csv b/ports/stm32/boards/PYBV11/pins.csv deleted file mode 100644 index cee80a1aa1cf9..0000000000000 --- a/ports/stm32/boards/PYBV11/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h deleted file mode 100644 index b84b0a89207d0..0000000000000 --- a/ports/stm32/boards/PYBV11/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV3/mpconfigboard.h b/ports/stm32/boards/PYBV3/mpconfigboard.h deleted file mode 100644 index 1f49af4da1216..0000000000000 --- a/ports/stm32/boards/PYBV3/mpconfigboard.h +++ /dev/null @@ -1,88 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv3" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_B10) -#define MICROPY_HW_UART3_RX (pin_B11) -#define MICROPY_HW_UART3_RTS (pin_B14) -#define MICROPY_HW_UART3_CTS (pin_B13) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// X-skin: X9=PB6=SCL, X10=PB7=SDA -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) - -// Y-skin: Y9=PB10=SCL, Y10=PB11=SDA -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_A13) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// LEDs -#define MICROPY_HW_LED_INVERTED (1) // LEDs are on when pin is driven low -#define MICROPY_HW_LED1 (pin_A8) // R1 - red -#define MICROPY_HW_LED2 (pin_A10) // R2 - red -#define MICROPY_HW_LED3 (pin_C4) // G1 - green -#define MICROPY_HW_LED4 (pin_C5) // G2 - green -#define MICROPY_HW_LED1_PWM { TIM1, 1, TIM_CHANNEL_1, GPIO_AF1_TIM1 } -#define MICROPY_HW_LED2_PWM { TIM1, 1, TIM_CHANNEL_3, GPIO_AF1_TIM1 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C13) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLDOWN) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_SET) - -// USB VBUS detect pin -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV3/mpconfigboard.mk b/ports/stm32/boards/PYBV3/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/PYBV3/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/PYBV3/pins.csv b/ports/stm32/boards/PYBV3/pins.csv deleted file mode 100644 index b20bd4ffbd91c..0000000000000 --- a/ports/stm32/boards/PYBV3/pins.csv +++ /dev/null @@ -1,46 +0,0 @@ -B13,PB13 -B14,PB14 -B15,PB15 -C6,PC6 -C7,PC7 -A13,PA13 -A14,PA14 -A15,PA15 -B3,PB3 -B4,PB4 -B6,PB6 -B7,PB7 -B8,PB8 -B9,PB9 -C0,PC0 -C1,PC1 -C2,PC2 -C3,PC3 -A0,PA0 -A1,PA1 -A2,PA2 -A3,PA3 -A4,PA4 -A5,PA5 -A6,PA6 -A7,PA7 -B0,PB0 -B1,PB1 -B10,PB10 -B11,PB11 -B12,PB12 -LED_R1,PA8 -LED_R2,PA10 -LED_G1,PC4 -LED_G2,PC5 -SW,PA13 -SD,PC13 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CK,PC12 -SD_CMD,PD2 -UART1_TX,PA9 diff --git a/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h deleted file mode 100644 index d3df51c10190d..0000000000000 --- a/ports/stm32/boards/PYBV3/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/PYBV4/mpconfigboard.h b/ports/stm32/boards/PYBV4/mpconfigboard.h deleted file mode 100644 index 2a4829c3e3079..0000000000000 --- a/ports/stm32/boards/PYBV4/mpconfigboard.h +++ /dev/null @@ -1,96 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "PYBv4" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (1) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (1) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// The pyboard has a 32kHz crystal for the RTC -#define MICROPY_HW_RTC_USE_LSE (1) - -// UART config -#define MICROPY_HW_UART1_NAME "XB" -#define MICROPY_HW_UART1_PORT (GPIOB) -#define MICROPY_HW_UART1_PINS (GPIO_PIN_6 | GPIO_PIN_7) -#define MICROPY_HW_UART2_PORT (GPIOA) -#define MICROPY_HW_UART2_PINS (GPIO_PIN_2 | GPIO_PIN_3) -#define MICROPY_HW_UART2_RTS (GPIO_PIN_1) -#define MICROPY_HW_UART2_CTS (GPIO_PIN_0) -#define MICROPY_HW_UART3_NAME "YB" -#define MICROPY_HW_UART3_PORT (GPIOB) -#define MICROPY_HW_UART3_PINS (GPIO_PIN_10 | GPIO_PIN_11) -#define MICROPY_HW_UART3_RTS (GPIO_PIN_14) -#define MICROPY_HW_UART3_CTS (GPIO_PIN_13) -#define MICROPY_HW_UART4_NAME "XA" -#define MICROPY_HW_UART4_PORT (GPIOA) -#define MICROPY_HW_UART4_PINS (GPIO_PIN_0 | GPIO_PIN_1) -#define MICROPY_HW_UART6_NAME "YA" -#define MICROPY_HW_UART6_PORT (GPIOC) -#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7) - -// I2C busses -#define MICROPY_HW_I2C1_NAME "X" -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_NAME "Y" -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NAME "X" -#define MICROPY_HW_SPI1_NSS (pin_A4) // X5 -#define MICROPY_HW_SPI1_SCK (pin_A5) // X6 -#define MICROPY_HW_SPI1_MISO (pin_A6) // X7 -#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8 -#define MICROPY_HW_SPI2_NAME "Y" -#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5 -#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6 -#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7 -#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8 - -// CAN busses -#define MICROPY_HW_CAN1_NAME "YA" // CAN1 on RX,TX = Y3,Y4 = PB8,PB9 -#define MICROPY_HW_CAN2_NAME "YB" // CAN2 on RX,TX = Y5,Y6 = PB12,PB13 - -// USRSW has no pullup or pulldown, and pressing the switch makes the input go low -#define MICROPY_HW_USRSW_PIN (pin_B3) -#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING) -#define MICROPY_HW_USRSW_PRESSED (0) - -// The pyboard has 4 LEDs -#define MICROPY_HW_LED1 (pin_A13) // red -#define MICROPY_HW_LED2 (pin_A14) // green -#define MICROPY_HW_LED3 (pin_A15) // yellow -#define MICROPY_HW_LED4 (pin_B4) // blue -#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 } -#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 } -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) - -// MMA accelerometer config -#define MICROPY_HW_MMA_AVDD_PIN (pin_B5) diff --git a/ports/stm32/boards/PYBV4/mpconfigboard.mk b/ports/stm32/boards/PYBV4/mpconfigboard.mk deleted file mode 100644 index 5734c66904e96..0000000000000 --- a/ports/stm32/boards/PYBV4/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F405xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/PYBV4/pins.csv b/ports/stm32/boards/PYBV4/pins.csv deleted file mode 100644 index cee80a1aa1cf9..0000000000000 --- a/ports/stm32/boards/PYBV4/pins.csv +++ /dev/null @@ -1,59 +0,0 @@ -X1,PA0 -X2,PA1 -X3,PA2 -X4,PA3 -X5,PA4 -X6,PA5 -X7,PA6 -X8,PA7 -X9,PB6 -X10,PB7 -X11,PC4 -X12,PC5 -X13,Reset -X14,GND -X15,3.3V -X16,VIN -X17,PB3 -X18,PC13 -X19,PC0 -X20,PC1 -X21,PC2 -X22,PC3 -X23,A3.3V -X24,AGND -Y1,PC6 -Y2,PC7 -Y3,PB8 -Y4,PB9 -Y5,PB12 -Y6,PB13 -Y7,PB14 -Y8,PB15 -Y9,PB10 -Y10,PB11 -Y11,PB0 -Y12,PB1 -Y13,Reset -Y14,GND -Y15,3.3V -Y16,VIN -SW,PB3 -LED_RED,PA13 -LED_GREEN,PA14 -LED_YELLOW,PA15 -LED_BLUE,PB4 -MMA_INT,PB2 -MMA_AVDD,PB5 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CMD,PD2 -SD_CK,PC12 -SD,PA8 -SD_SW,PA8 -USB_VBUS,PA9 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 diff --git a/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h b/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h deleted file mode 100644 index d3df51c10190d..0000000000000 --- a/ports/stm32/boards/PYBV4/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F411DISC/mpconfigboard.h b/ports/stm32/boards/STM32F411DISC/mpconfigboard.h deleted file mode 100644 index 1488cd7640289..0000000000000 --- a/ports/stm32/boards/STM32F411DISC/mpconfigboard.h +++ /dev/null @@ -1,70 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F411DISC" -#define MICROPY_HW_MCU_NAME "STM32F411" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (1) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (5) -#define MICROPY_HW_CLK_PLLN (210) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) -#define MICROPY_HW_CLK_PLLQ (7) - -// does not have a 32kHz crystal -#define MICROPY_HW_RTC_USE_LSE (0) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B9) -//#define MICROPY_HW_I2C2_SCL (pin_B10) -//#define MICROPY_HW_I2C2_SDA (pin_B11) -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_A9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_D14) // red -#define MICROPY_HW_LED2 (pin_D12) // green -#define MICROPY_HW_LED3 (pin_D13) // orange -#define MICROPY_HW_LED4 (pin_D15) // blue -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk deleted file mode 100644 index 71b3b19d65a36..0000000000000 --- a/ports/stm32/boards/STM32F411DISC/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F411xE -AF_FILE = boards/stm32f411_af.csv -LD_FILE = boards/stm32f411.ld diff --git a/ports/stm32/boards/STM32F411DISC/pins.csv b/ports/stm32/boards/STM32F411DISC/pins.csv deleted file mode 100644 index 96077d54d4c7e..0000000000000 --- a/ports/stm32/boards/STM32F411DISC/pins.csv +++ /dev/null @@ -1,84 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -LED_GREEN,PD12 -LED_ORANGE,PD13 -LED_RED,PD14 -LED_BLUE,PD15 -SW,PA0 diff --git a/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index 921cbe5fe1555..0000000000000 --- a/ports/stm32/boards/STM32F411DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h deleted file mode 100644 index fc0702025267c..0000000000000 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h +++ /dev/null @@ -1,73 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "F429I-DISCO" -#define MICROPY_HW_MCU_NAME "STM32F429" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_D8) -#define MICROPY_HW_UART2_RX (pin_D9) - -// I2C busses -#define MICROPY_HW_I2C3_SCL (pin_A8) -#define MICROPY_HW_I2C3_SDA (pin_C9) - -// SPI busses -//#define MICROPY_HW_SPI1_NSS (pin_A4) -//#define MICROPY_HW_SPI1_SCK (pin_A5) -//#define MICROPY_HW_SPI1_MISO (pin_A6) -//#define MICROPY_HW_SPI1_MOSI (pin_A7) -#if defined(USE_USB_HS_IN_FS) -// The HS USB uses B14 & B15 for D- and D+ -#else -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#endif -//#define MICROPY_HW_SPI4_NSS (pin_E11) -//#define MICROPY_HW_SPI4_SCK (pin_E12) -//#define MICROPY_HW_SPI4_MISO (pin_E13) -//#define MICROPY_HW_SPI4_MOSI (pin_E14) -#define MICROPY_HW_SPI5_NSS (pin_F6) -#define MICROPY_HW_SPI5_SCK (pin_F7) -#define MICROPY_HW_SPI5_MISO (pin_F8) -#define MICROPY_HW_SPI5_MOSI (pin_F9) -//#define MICROPY_HW_SPI6_NSS (pin_G8) -//#define MICROPY_HW_SPI6_SCK (pin_G13) -//#define MICROPY_HW_SPI6_MISO (pin_G12) -//#define MICROPY_HW_SPI6_MOSI (pin_G14) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_G14) // red -#define MICROPY_HW_LED2 (pin_G13) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_B13) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_B12) diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk deleted file mode 100644 index 1bbf808b69fa0..0000000000000 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F429xx -AF_FILE = boards/stm32f429_af.csv -LD_FILE = boards/stm32f429.ld diff --git a/ports/stm32/boards/STM32F429DISC/pins.csv b/ports/stm32/boards/STM32F429DISC/pins.csv deleted file mode 100644 index 8a892d3c2f298..0000000000000 --- a/ports/stm32/boards/STM32F429DISC/pins.csv +++ /dev/null @@ -1,117 +0,0 @@ -PF4,PF4 -PF5,PF5 -PF2,PF2 -PF3,PF3 -PF0,PF0 -PF1,PF1 -PC14,PC14 -PC15,PC15 -PE6,PE6 -PC13,PC13 -PE4,PE4 -PE5,PE5 -PE2,PE2 -PE3,PE3 -PE0,PE0 -PE1,PE1 -PB8,PB8 -PB9,PB9 -PB6,PB6 -PB7,PB7 -PB4,PB4 -PB5,PB5 -PG15,PG15 -PB3,PB3 -PG13,PG13 -PG14,PG14 -PG11,PG11 -PG12,PG12 -PG9,PG9 -PG10,PG10 -PD7,PD7 -PD6,PD6 -PD5,PD5 -PD4,PD4 -PD3,PD3 -PD2,PD2 -PD1,PD1 -PD0,PD0 -PC12,PC12 -PC11,PC11 -PC10,PC10 -PA15,PA15 -PA14,PA14 -PA13,PA13 -PA12,PA12 -PA11,PA11 -PA10,PA10 -PA9,PA9 -PA8,PA8 -PC9,PC9 -PC8,PC8 -PC7,PC7 -PC6,PC6 -PG8,PG8 -PG7,PG7 -PG6,PG6 -PG5,PG5 -PG4,PG4 -PF6,PF6 -PF8,PF8 -PF7,PF7 -PF10,PF10 -PF9,PF9 -PH1,PH1 -PH0,PH0 -PC1,PC1 -PC0,PC0 -PC3,PC3 -PC2,PC2 -PA1,PA1 -PA0,PA0 -PA3,PA3 -PA2,PA2 -PA5,PA5 -PA4,PA4 -PA7,PA7 -PA6,PA6 -PC5,PC5 -PC4,PC4 -PB1,PB1 -PB0,PB0 -PB2,PB2 -PF12,PF12 -PF11,PF11 -PF14,PF14 -PF13,PF13 -PG0,PG0 -PF15,PF15 -PE7,PE7 -PG1,PG1 -PE9,PE9 -PE8,PE8 -PE11,PE11 -PE10,PE10 -PE13,PE13 -PE12,PE12 -PE15,PE15 -PE14,PE14 -PB11,PB11 -PB10,PB10 -PB13,PB13 -PB12,PB12 -PB15,PB15 -PB14,PB14 -PD9,PD9 -PD8,PD8 -PD11,PD11 -PD10,PD10 -PD13,PD13 -PD12,PD12 -PD15,PD15 -PD14,PD14 -PG3,PG3 -PG2,PG2 -SW,PA0 -LED_GREEN,PG13 -LED_RED,PG14 diff --git a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index 4f5962dcbdd1b..0000000000000 --- a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,412 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_HS -#define USE_USB_HS_IN_FS - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F439/mpconfigboard.h b/ports/stm32/boards/STM32F439/mpconfigboard.h deleted file mode 100644 index eca79bf582483..0000000000000 --- a/ports/stm32/boards/STM32F439/mpconfigboard.h +++ /dev/null @@ -1,85 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "CustomPCB" -#define MICROPY_HW_MCU_NAME "STM32F439" - -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) //works with no SD card too -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// SD card detect switch -#if MICROPY_HW_HAS_SDCARD -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (1) -#endif - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) //divide external clock by this to get 1MHz -#define MICROPY_HW_CLK_PLLN (384) //this number is the PLL clock in MHz -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) //divide PLL clock by this to get core clock -#define MICROPY_HW_CLK_PLLQ (8) //divide core clock by this to get 48MHz - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -#define MICROPY_HW_UART2_RTS (pin_D1) -#define MICROPY_HW_UART2_CTS (pin_D0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_A8) -#define MICROPY_HW_I2C1_SDA (pin_C9) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#if defined(USE_USB_HS_IN_FS) -// The HS USB uses B14 & B15 for D- and D+ -#else -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) -#endif -#define MICROPY_HW_SPI3_NSS (pin_E11) -#define MICROPY_HW_SPI3_SCK (pin_E12) -#define MICROPY_HW_SPI3_MISO (pin_E13) -#define MICROPY_HW_SPI3_MOSI (pin_E14) -//#define MICROPY_HW_SPI4_NSS (pin_E11) -//#define MICROPY_HW_SPI4_SCK (pin_E12) -//#define MICROPY_HW_SPI4_MISO (pin_E13) -//#define MICROPY_HW_SPI4_MOSI (pin_E14) -//#define MICROPY_HW_SPI5_NSS (pin_F6) -//#define MICROPY_HW_SPI5_SCK (pin_F7) -//#define MICROPY_HW_SPI5_MISO (pin_F8) -//#define MICROPY_HW_SPI5_MOSI (pin_F9) -//#define MICROPY_HW_SPI6_NSS (pin_G8) -//#define MICROPY_HW_SPI6_SCK (pin_G13) -//#define MICROPY_HW_SPI6_MISO (pin_G12) -//#define MICROPY_HW_SPI6_MOSI (pin_G14) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - diff --git a/ports/stm32/boards/STM32F439/mpconfigboard.mk b/ports/stm32/boards/STM32F439/mpconfigboard.mk deleted file mode 100644 index 0c30c06a30842..0000000000000 --- a/ports/stm32/boards/STM32F439/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F439xx -AF_FILE = boards/stm32f439_af.csv -LD_FILE = boards/stm32f439.ld diff --git a/ports/stm32/boards/STM32F439/pins.csv b/ports/stm32/boards/STM32F439/pins.csv deleted file mode 100644 index cc9443dea5f2d..0000000000000 --- a/ports/stm32/boards/STM32F439/pins.csv +++ /dev/null @@ -1,85 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -VUSB,PB13 -USB1D_N,PB14 -USB1D_P,PB15 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PD2,PD2 -BOOT0,BOOT0 -PA15,PA15 -PA13,PA13 -PA14,PA14 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 diff --git a/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h deleted file mode 100644 index d121b18c5e3d8..0000000000000 --- a/ports/stm32/boards/STM32F439/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - - /* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F4DISC/mpconfigboard.h b/ports/stm32/boards/STM32F4DISC/mpconfigboard.h deleted file mode 100644 index 1058755158ccd..0000000000000 --- a/ports/stm32/boards/STM32F4DISC/mpconfigboard.h +++ /dev/null @@ -1,86 +0,0 @@ -#define STM32F4DISC - -#define MICROPY_HW_BOARD_NAME "F4DISC" -#define MICROPY_HW_MCU_NAME "STM32F407" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (1) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (1) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 8MHz -#define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (336) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (7) - -// UART config -#if 0 -// A9 is used for USB VBUS detect, and A10 is used for USB_FS_ID. -// UART1 is also on PB6/7 but PB6 is tied to the Audio SCL line. -// Without board modifications, this makes UART1 unusable on this board. -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#endif -#define MICROPY_HW_UART2_TX (pin_A2) -#define MICROPY_HW_UART2_RX (pin_A3) -#define MICROPY_HW_UART2_RTS (pin_A1) -#define MICROPY_HW_UART2_CTS (pin_A0) -#define MICROPY_HW_UART3_TX (pin_D8) -#define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART3_RTS (pin_D12) -#define MICROPY_HW_UART3_CTS (pin_D11) -#if MICROPY_HW_HAS_SWITCH == 0 -// NOTE: A0 also connects to the user switch. To use UART4 you should -// set MICROPY_HW_HAS_SWITCH to 0, and also remove SB20 (on the back -// of the board near the USER switch). -#define MICROPY_HW_UART4_TX (pin_A0) -#define MICROPY_HW_UART4_RX (pin_A1) -#endif -// NOTE: PC7 is connected to MCLK on the Audio chip. This is an input signal -// so I think as long as you're not using the audio chip then it should -// be fine to use as a UART pin. -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI1_NSS (pin_A4) -#define MICROPY_HW_SPI1_SCK (pin_A5) -#define MICROPY_HW_SPI1_MISO (pin_A6) -#define MICROPY_HW_SPI1_MOSI (pin_A7) -#define MICROPY_HW_SPI2_NSS (pin_B12) -#define MICROPY_HW_SPI2_SCK (pin_B13) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_D14) // red -#define MICROPY_HW_LED2 (pin_D12) // green -#define MICROPY_HW_LED3 (pin_D13) // orange -#define MICROPY_HW_LED4 (pin_D15) // blue -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk deleted file mode 100644 index ece09caa13737..0000000000000 --- a/ports/stm32/boards/STM32F4DISC/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f4 -CMSIS_MCU = STM32F407xx -AF_FILE = boards/stm32f405_af.csv -LD_FILE = boards/stm32f405.ld diff --git a/ports/stm32/boards/STM32F4DISC/pins.csv b/ports/stm32/boards/STM32F4DISC/pins.csv deleted file mode 100644 index 4049fef7d919c..0000000000000 --- a/ports/stm32/boards/STM32F4DISC/pins.csv +++ /dev/null @@ -1,85 +0,0 @@ -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PC4,PC4 -PC5,PC5 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PH0,PH0 -PH1,PH1 -LED_GREEN,PD12 -LED_ORANGE,PD13 -LED_RED,PD14 -LED_BLUE,PD15 -SW,PA0 - diff --git a/ports/stm32/boards/STM32F4DISC/staccel.py b/ports/stm32/boards/STM32F4DISC/staccel.py deleted file mode 100644 index 2f2561d1cb04e..0000000000000 --- a/ports/stm32/boards/STM32F4DISC/staccel.py +++ /dev/null @@ -1,98 +0,0 @@ -""" -Driver for accelerometer on STM32F4 Discover board. - -Sets accelerometer range at +-2g. -Returns list containing X,Y,Z axis acceleration values in 'g' units (9.8m/s^2). - -See: - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/Components/lis302dl/lis302dl.h - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/Components/lis302dl/lis302dl.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery.h - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery_accelerometer.c - STM32Cube_FW_F4_V1.1.0/Drivers/BSP/STM32F4-Discovery/stm32f4_discovery_accelerometer.h - STM32Cube_FW_F4_V1.1.0/Projects/STM32F4-Discovery/Demonstrations/Src/main.c -""" - -from micropython import const -from pyb import Pin -from pyb import SPI - -READWRITE_CMD = const(0x80) -MULTIPLEBYTE_CMD = const(0x40) -WHO_AM_I_ADDR = const(0x0f) -OUT_X_ADDR = const(0x29) -OUT_Y_ADDR = const(0x2b) -OUT_Z_ADDR = const(0x2d) -OUT_T_ADDR = const(0x0c) - -LIS302DL_WHO_AM_I_VAL = const(0x3b) -LIS302DL_CTRL_REG1_ADDR = const(0x20) -# Configuration for 100Hz sampling rate, +-2g range -LIS302DL_CONF = const(0b01000111) - -LIS3DSH_WHO_AM_I_VAL = const(0x3f) -LIS3DSH_CTRL_REG4_ADDR = const(0x20) -LIS3DSH_CTRL_REG5_ADDR = const(0x24) -# Configuration for 100Hz sampling rate, +-2g range -LIS3DSH_CTRL_REG4_CONF = const(0b01100111) -LIS3DSH_CTRL_REG5_CONF = const(0b00000000) - -class STAccel: - def __init__(self): - self.cs_pin = Pin('PE3', Pin.OUT_PP, Pin.PULL_NONE) - self.cs_pin.high() - self.spi = SPI(1, SPI.MASTER, baudrate=328125, polarity=0, phase=1, bits=8) - - self.who_am_i = self.read_id() - - if self.who_am_i == LIS302DL_WHO_AM_I_VAL: - self.write_bytes(LIS302DL_CTRL_REG1_ADDR, bytearray([LIS302DL_CONF])) - self.sensitivity = 18 - elif self.who_am_i == LIS3DSH_WHO_AM_I_VAL: - self.write_bytes(LIS3DSH_CTRL_REG4_ADDR, bytearray([LIS3DSH_CTRL_REG4_CONF])) - self.write_bytes(LIS3DSH_CTRL_REG5_ADDR, bytearray([LIS3DSH_CTRL_REG5_CONF])) - self.sensitivity = 0.06 * 256 - else: - raise Exception('LIS302DL or LIS3DSH accelerometer not present') - - def convert_raw_to_g(self, x): - if x & 0x80: - x = x - 256 - return x * self.sensitivity / 1000 - - def read_bytes(self, addr, nbytes): - if nbytes > 1: - addr |= READWRITE_CMD | MULTIPLEBYTE_CMD - else: - addr |= READWRITE_CMD - self.cs_pin.low() - self.spi.send(addr) - #buf = self.spi.send_recv(bytearray(nbytes * [0])) # read data, MSB first - buf = self.spi.recv(nbytes) - self.cs_pin.high() - return buf - - def write_bytes(self, addr, buf): - if len(buf) > 1: - addr |= MULTIPLEBYTE_CMD - self.cs_pin.low() - self.spi.send(addr) - for b in buf: - self.spi.send(b) - self.cs_pin.high() - - def read_id(self): - return self.read_bytes(WHO_AM_I_ADDR, 1)[0] - - def x(self): - return self.convert_raw_to_g(self.read_bytes(OUT_X_ADDR, 1)[0]) - - def y(self): - return self.convert_raw_to_g(self.read_bytes(OUT_Y_ADDR, 1)[0]) - - def z(self): - return self.convert_raw_to_g(self.read_bytes(OUT_Z_ADDR, 1)[0]) - - def xyz(self): - return (self.x(), self.y(), self.z()) diff --git a/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h deleted file mode 100644 index d3df51c10190d..0000000000000 --- a/ports/stm32/boards/STM32F4DISC/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,411 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 0 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848 PHY Address*/ -#define DP83848_PHY_ADDRESS 0x01 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h deleted file mode 100644 index 50b9c1618fae1..0000000000000 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h +++ /dev/null @@ -1,78 +0,0 @@ -// This board is confirmed to operate using stlink and openocd. -// REPL is on UART(1) and is available through the stlink USB-UART device. -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. -#define MICROPY_HW_BOARD_NAME "F769DISC" -#define MICROPY_HW_MCU_NAME "STM32F769" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (1) - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (432) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_A10) -#define MICROPY_HW_UART5_TX (pin_C12) -#define MICROPY_HW_UART5_RX (pin_D2) -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI2_NSS (pin_A11) -#define MICROPY_HW_SPI2_SCK (pin_A12) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_J13) // red -#define MICROPY_HW_LED2 (pin_J5) // green -#define MICROPY_HW_LED3 (pin_A12) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDMMC2_CK (pin_D6) -#define MICROPY_HW_SDMMC2_CMD (pin_D7) -#define MICROPY_HW_SDMMC2_D0 (pin_G9) -#define MICROPY_HW_SDMMC2_D1 (pin_G10) -#define MICROPY_HW_SDMMC2_D2 (pin_B3) -#define MICROPY_HW_SDMMC2_D3 (pin_B4) -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_I15) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config (CN13 - USB OTG FS) -/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ -#define MICROPY_HW_USB_OTG_ID_PIN (pin_J12) diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk deleted file mode 100644 index 99234e4cf1d20..0000000000000 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk +++ /dev/null @@ -1,5 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F769xx -MICROPY_FLOAT_IMPL = double -AF_FILE = boards/stm32f767_af.csv -LD_FILE = boards/stm32f769.ld diff --git a/ports/stm32/boards/STM32F769DISC/pins.csv b/ports/stm32/boards/STM32F769DISC/pins.csv deleted file mode 100644 index dcc2df208944b..0000000000000 --- a/ports/stm32/boards/STM32F769DISC/pins.csv +++ /dev/null @@ -1,57 +0,0 @@ -A0,PA0 -A1,PF10 -A2,PF9 -A3,PF8 -A4,PF7 -A5,PF6 -D0,PC7 -D1,PC6 -D2,PG6 -D3,PB4 -D4,PG7 -D5,PA8 -D6,PH6 -D7,PI3 -D8,PI2 -D9,PA15 -D10,PI0 -D11,PB15 -D12,PB14 -D13,PI1 -D14,PB9 -D15,PB8 -LED1,PJ13 -LED2,PJ5 -LED3,PA12 -SW,PI11 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_D0,PG9 -SD_D1,PG10 -SD_D2,PB3 -SD_D3,PB4 -SD_CK,PD6 -SD_CMD,PD7 -SD_SW,PI15 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA8 -USB_DM,PA11 -USB_DP,PA12 -UART1_TX,PA9 -UART1_RX,PA10 -UART5_TX,PC12 -UART5_RX,PD2 diff --git a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h b/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h deleted file mode 100644 index ce8254902650b..0000000000000 --- a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,430 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_HS -#define USE_USB_HS_IN_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32F7DISC/board_init.c b/ports/stm32/boards/STM32F7DISC/board_init.c deleted file mode 100644 index 4530a47063d70..0000000000000 --- a/ports/stm32/boards/STM32F7DISC/board_init.c +++ /dev/null @@ -1,15 +0,0 @@ -#include STM32_HAL_H - -void STM32F7DISC_board_early_init(void) { - GPIO_InitTypeDef GPIO_InitStructure; - - __GPIOK_CLK_ENABLE(); - - // Turn off the backlight. LCD_BL_CTRL = PK3 - GPIO_InitStructure.Pin = GPIO_PIN_3; - GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; - HAL_GPIO_Init(GPIOK, &GPIO_InitStructure); - HAL_GPIO_WritePin(GPIOK, GPIO_PIN_3, GPIO_PIN_RESET); -} diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h deleted file mode 100644 index 44a39c0a1a19c..0000000000000 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h +++ /dev/null @@ -1,82 +0,0 @@ -#define STM32F7DISC - -#define MICROPY_HW_BOARD_NAME "F7DISC" -#define MICROPY_HW_MCU_NAME "STM32F746" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (1) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (1) - -#define MICROPY_BOARD_EARLY_INIT STM32F7DISC_board_early_init -void STM32F7DISC_board_early_init(void); - -// HSE is 25MHz -// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz -// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz -// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz -#define MICROPY_HW_CLK_PLLM (25) -#define MICROPY_HW_CLK_PLLN (432) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (9) - -// From the reference manual, for 2.7V to 3.6V -// 151-180 MHz => 5 wait states -// 181-210 MHz => 6 wait states -// 211-216 MHz => 7 wait states -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states - -// UART config -#define MICROPY_HW_UART1_TX (pin_A9) -#define MICROPY_HW_UART1_RX (pin_B7) -#define MICROPY_HW_UART6_TX (pin_C6) -#define MICROPY_HW_UART6_RX (pin_C7) -#define MICROPY_HW_UART7_TX (pin_F6) -#define MICROPY_HW_UART7_RX (pin_F7) -#define MICROPY_HW_UART_REPL PYB_UART_1 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) - -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) - -// SPI -#define MICROPY_HW_SPI2_NSS (pin_I0) -#define MICROPY_HW_SPI2_SCK (pin_I1) -#define MICROPY_HW_SPI2_MISO (pin_B14) -#define MICROPY_HW_SPI2_MOSI (pin_B15) - -// USRSW is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_I11) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_I1) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_C13) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) - -// USB config (CN13 - USB OTG FS) -// The Hardware VBUS detect only works on pin PA9. The STM32F7 Discovery uses -// PA9 for VCP_TX functionality and connects the VBUS to pin J12 (so software -// only detect). So we don't define the VBUS detect pin since that requires PA9. - -/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ -#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk deleted file mode 100644 index 7c6bc4584ac30..0000000000000 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk +++ /dev/null @@ -1,4 +0,0 @@ -MCU_SERIES = f7 -CMSIS_MCU = STM32F746xx -AF_FILE = boards/stm32f746_af.csv -LD_FILE = boards/stm32f746.ld diff --git a/ports/stm32/boards/STM32F7DISC/pins.csv b/ports/stm32/boards/STM32F7DISC/pins.csv deleted file mode 100644 index 1aa8a9b3a1ed2..0000000000000 --- a/ports/stm32/boards/STM32F7DISC/pins.csv +++ /dev/null @@ -1,53 +0,0 @@ -A0,PA0 -A1,PF10 -A2,PF9 -A3,PF8 -A4,PF7 -A5,PF6 -D0,PC7 -D1,PC6 -D2,PG6 -D3,PB4 -D4,PG7 -D5,PA8 -D6,PH6 -D7,PI3 -D8,PI2 -D9,PA15 -D10,PI0 -D11,PB15 -D12,PB14 -D13,PI1 -D14,PB9 -D15,PB8 -LED,PI1 -SW,PI11 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 -SD_D0,PC8 -SD_D1,PC9 -SD_D2,PC10 -SD_D3,PC11 -SD_CK,PC12 -SD_CMD,PD2 -SD_SW,PC13 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 -USB_VBUS,PJ12 -USB_ID,PA10 -USB_DM,PA11 -USB_DP,PA12 -VCP_TX,PA9 -VCP_RX,PB7 diff --git a/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h b/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h deleted file mode 100644 index 3fbfb431005c7..0000000000000 --- a/ports/stm32/boards/STM32F7DISC/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,429 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -#define USE_USB_FS - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ - - -/* ########################## Timeout Configuration ######################### */ -/** - * @brief This is the HAL configuration section - */ -#define HAL_ACCURATE_TIMEOUT_ENABLED 0 -#define HAL_TIMEOUT_VALUE 0x1FFFFFF - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2 -#define MAC_ADDR1 1 -#define MAC_ADDR2 0 -#define MAC_ADDR3 0 -#define MAC_ADDR4 0 -#define MAC_ADDR5 0 - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ - -#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ - -#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ - -#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/STM32L476DISC/board_init.c b/ports/stm32/boards/STM32L476DISC/board_init.c deleted file mode 100644 index fdc41c4019a3d..0000000000000 --- a/ports/stm32/boards/STM32L476DISC/board_init.c +++ /dev/null @@ -1,10 +0,0 @@ -#include "py/mphal.h" -#include "genhdr/pins.h" - -void STM32L476DISC_board_early_init(void) { - // set SPI flash WP and HOLD pins high - mp_hal_pin_output(&pin_E14); - mp_hal_pin_output(&pin_E15); - mp_hal_pin_write(&pin_E14, 1); - mp_hal_pin_write(&pin_E15, 1); -} diff --git a/ports/stm32/boards/STM32L476DISC/mpconfigboard.h b/ports/stm32/boards/STM32L476DISC/mpconfigboard.h deleted file mode 100644 index 9dbadd5300c79..0000000000000 --- a/ports/stm32/boards/STM32L476DISC/mpconfigboard.h +++ /dev/null @@ -1,68 +0,0 @@ -#define MICROPY_BOARD_EARLY_INIT STM32L476DISC_board_early_init -void STM32L476DISC_board_early_init(void); - -#define MICROPY_HW_BOARD_NAME "L476-DISCO" -#define MICROPY_HW_MCU_NAME "STM32L476" - -#define MICROPY_HW_HAS_SWITCH (1) -#define MICROPY_HW_HAS_FLASH (1) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (1) -#define MICROPY_HW_ENABLE_RTC (1) -#define MICROPY_HW_ENABLE_TIMER (1) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_CAN (0) - -// use external SPI flash for storage -#define MICROPY_HW_SPIFLASH_SIZE_BITS (128 * 1024 * 1024) -#define MICROPY_HW_SPIFLASH_CS (pin_E11) -#define MICROPY_HW_SPIFLASH_SCK (pin_E10) -#define MICROPY_HW_SPIFLASH_MOSI (pin_E12) -#define MICROPY_HW_SPIFLASH_MISO (pin_E13) - -// MSI is used and is 4MHz -#define MICROPY_HW_CLK_PLLM (1) -#define MICROPY_HW_CLK_PLLN (40) -#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) -#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) -#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2) - -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 - -// USART config -#define MICROPY_HW_UART2_TX (pin_D5) -#define MICROPY_HW_UART2_RX (pin_D6) -// USART 2 is connected to the virtual com port on the ST-LINK -#define MICROPY_HW_UART_REPL PYB_UART_2 -#define MICROPY_HW_UART_REPL_BAUD 115200 - -// I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B6) -#define MICROPY_HW_I2C1_SDA (pin_B7) -#define MICROPY_HW_I2C2_SCL (pin_B10) -#define MICROPY_HW_I2C2_SDA (pin_B11) - -// SPI busses -#define MICROPY_HW_SPI2_NSS (pin_D0) -#define MICROPY_HW_SPI2_SCK (pin_D1) -#define MICROPY_HW_SPI2_MISO (pin_D3) -#define MICROPY_HW_SPI2_MOSI (pin_D4) - -// Joystick is pulled low. Pressing the button makes the input go high. -#define MICROPY_HW_USRSW_PIN (pin_A0) -#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) -#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) -#define MICROPY_HW_USRSW_PRESSED (1) - -// LEDs -#define MICROPY_HW_LED1 (pin_B2) // red -#define MICROPY_HW_LED2 (pin_E8) // green -#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) -#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) - -// USB config -// #define MICROPY_HW_USB_OTG_ID_PIN (pin_C12) // This is not the official ID Pin which should be PA10 diff --git a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk b/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk deleted file mode 100644 index 72468d89ce6cf..0000000000000 --- a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk +++ /dev/null @@ -1,6 +0,0 @@ -MCU_SERIES = l4 -CMSIS_MCU = STM32L476xx -AF_FILE = boards/stm32l476_af.csv -LD_FILE = boards/stm32l476xg.ld -TEXT_ADDR = 0x08004000 -OPENOCD_CONFIG = boards/openocd_stm32l4.cfg diff --git a/ports/stm32/boards/STM32L476DISC/pins.csv b/ports/stm32/boards/STM32L476DISC/pins.csv deleted file mode 100644 index 52f96b669c36d..0000000000000 --- a/ports/stm32/boards/STM32L476DISC/pins.csv +++ /dev/null @@ -1,114 +0,0 @@ -PA0,PA0 -PA1,PA1 -PA2,PA2 -PA3,PA3 -PA4,PA4 -PA5,PA5 -PA6,PA6 -PA7,PA7 -PA8,PA8 -PA9,PA9 -PA10,PA10 -PA11,PA11 -PA12,PA12 -PA13,PA13 -PA14,PA14 -PA15,PA15 -PB0,PB0 -PB1,PB1 -PB2,PB2 -PB3,PB3 -PB4,PB4 -PB5,PB5 -PB6,PB6 -PB7,PB7 -PB8,PB8 -PB9,PB9 -PB10,PB10 -PB11,PB11 -PB12,PB12 -PB13,PB13 -PB14,PB14 -PB15,PB15 -PC0,PC0 -PC1,PC1 -PC2,PC2 -PC3,PC3 -PC4,PC4 -PC5,PC5 -PC6,PC6 -PC7,PC7 -PC8,PC8 -PC9,PC9 -PC10,PC10 -PC11,PC11 -PC12,PC12 -PC13,PC13 -PC14,PC14 -PC15,PC15 -PD0,PD0 -PD1,PD1 -PD2,PD2 -PD3,PD3 -PD4,PD4 -PD5,PD5 -PD6,PD6 -PD7,PD7 -PD8,PD8 -PD9,PD9 -PD10,PD10 -PD11,PD11 -PD12,PD12 -PD13,PD13 -PD14,PD14 -PD15,PD15 -PE0,PE0 -PE1,PE1 -PE2,PE2 -PE3,PE3 -PE4,PE4 -PE5,PE5 -PE6,PE6 -PE7,PE7 -PE8,PE8 -PE9,PE9 -PE10,PE10 -PE11,PE11 -PE12,PE12 -PE13,PE13 -PE14,PE14 -PE15,PE15 -PF0,PF0 -PF1,PF1 -PF2,PF2 -PF3,PF3 -PF4,PF4 -PF5,PF5 -PF6,PF6 -PF7,PF7 -PF8,PF8 -PF9,PF9 -PF10,PF10 -PF11,PF11 -PF12,PF12 -PF13,PF13 -PF14,PF14 -PF15,PF15 -PG0,PG0 -PG1,PG1 -PG2,PG2 -PG3,PG3 -PG4,PG4 -PG5,PG5 -PG6,PG6 -PG7,PG7 -PG8,PG8 -PG9,PG9 -PG10,PG10 -PG11,PG11 -PG12,PG12 -PG13,PG13 -PG14,PG14 -PG15,PG15 -PH0,PH0 -PH1,PH1 diff --git a/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h b/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h deleted file mode 100644 index 9348e06790496..0000000000000 --- a/ports/stm32/boards/STM32L476DISC/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.2.0 - * @date 25-November-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2015 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#define USE_USB_FS -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DFSDM_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_OPAMP_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/* #define HAL_SAI_MODULE_ENABLED */ -#define HAL_SD_MODULE_ENABLED -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -/* #define HAL_SWPMI_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED -/* #define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/boards/common.ld b/ports/stm32/boards/common.ld deleted file mode 100644 index e5dea49d08bae..0000000000000 --- a/ports/stm32/boards/common.ld +++ /dev/null @@ -1,90 +0,0 @@ -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. So we pull in a couple of object files to pad it - out. */ - - . = ALIGN(4); - - /* NOTE: If you update the list of files contained in .isr_vector, - then be sure to also update smhal/Makefile where it forcibly - builds each of these files with -Os */ - - */ff.o(.text*) - */vfs_fat_*.o(.text*) - */py/formatfloat.o(.text*) - */py/parsenum.o(.text*) - */py/mpprint.o(.text*) - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32/boards/make-pins.py b/ports/stm32/boards/make-pins.py deleted file mode 100755 index 210c7b63c8a43..0000000000000 --- a/ports/stm32/boards/make-pins.py +++ /dev/null @@ -1,468 +0,0 @@ -#!/usr/bin/env python -"""Creates the pin file for the STM32F4xx.""" - -from __future__ import print_function - -import argparse -import sys -import csv - -SUPPORTED_FN = { - 'TIM' : ['CH1', 'CH2', 'CH3', 'CH4', - 'CH1N', 'CH2N', 'CH3N', 'CH1_ETR', 'ETR', 'BKIN'], - 'I2C' : ['SDA', 'SCL'], - 'I2S' : ['CK', 'MCK', 'SD', 'WS', 'EXTSD'], - 'USART' : ['RX', 'TX', 'CTS', 'RTS', 'CK'], - 'UART' : ['RX', 'TX', 'CTS', 'RTS'], - 'SPI' : ['NSS', 'SCK', 'MISO', 'MOSI'], - 'SDMMC' : ['CK', 'CMD', 'D0', 'D1', 'D2', 'D3'], -} - -CONDITIONAL_VAR = { - 'I2C' : 'MICROPY_HW_I2C{num}_SCL', - 'I2S' : 'MICROPY_HW_ENABLE_I2S{num}', - 'SPI' : 'MICROPY_HW_SPI{num}_SCK', - 'UART' : 'MICROPY_HW_UART{num}_TX', - 'USART' : 'MICROPY_HW_UART{num}_TX', - 'SDMMC' : 'MICROPY_HW_SDMMC{num}_CK', -} - -def parse_port_pin(name_str): - """Parses a string and returns a (port-num, pin-num) tuple.""" - if len(name_str) < 3: - raise ValueError("Expecting pin name to be at least 3 charcters.") - if name_str[0] != 'P': - raise ValueError("Expecting pin name to start with P") - if name_str[1] < 'A' or name_str[1] > 'K': - raise ValueError("Expecting pin port to be between A and K") - port = ord(name_str[1]) - ord('A') - pin_str = name_str[2:] - if not pin_str.isdigit(): - raise ValueError("Expecting numeric pin number.") - return (port, int(pin_str)) - -def split_name_num(name_num): - num = None - for num_idx in range(len(name_num) - 1, -1, -1): - if not name_num[num_idx].isdigit(): - name = name_num[0:num_idx + 1] - num_str = name_num[num_idx + 1:] - if len(num_str) > 0: - num = int(num_str) - break - return name, num - -def conditional_var(name_num): - # Try the specific instance first. For example, if name_num is UART4_RX - # then try UART4 first, and then try UART second. - name, num = split_name_num(name_num) - var = [] - if name in CONDITIONAL_VAR: - var.append(CONDITIONAL_VAR[name].format(num=num)) - if name_num in CONDITIONAL_VAR: - var.append(CONDITIONAL_VAR[name_num]) - return var - -def print_conditional_if(cond_var, file=None): - if cond_var: - cond_str = [] - for var in cond_var: - if var.find('ENABLE') >= 0: - cond_str.append('(defined({0}) && {0})'.format(var)) - else: - cond_str.append('defined({0})'.format(var)) - print('#if ' + ' || '.join(cond_str), file=file) - -def print_conditional_endif(cond_var, file=None): - if cond_var: - print('#endif', file=file) - - -class AlternateFunction(object): - """Holds the information associated with a pins alternate function.""" - - def __init__(self, idx, af_str): - self.idx = idx - # Special case. We change I2S2ext_SD into I2S2_EXTSD so that it parses - # the same way the other peripherals do. - af_str = af_str.replace('ext_', '_EXT') - - self.af_str = af_str - - self.func = '' - self.fn_num = None - self.pin_type = '' - self.supported = False - - af_words = af_str.split('_', 1) - self.func, self.fn_num = split_name_num(af_words[0]) - if len(af_words) > 1: - self.pin_type = af_words[1] - if self.func in SUPPORTED_FN: - pin_types = SUPPORTED_FN[self.func] - if self.pin_type in pin_types: - self.supported = True - - def is_supported(self): - return self.supported - - def ptr(self): - """Returns the numbered function (i.e. USART6) for this AF.""" - if self.fn_num is None: - return self.func - return '{:s}{:d}'.format(self.func, self.fn_num) - - def mux_name(self): - return 'AF{:d}_{:s}'.format(self.idx, self.ptr()) - - def print(self): - """Prints the C representation of this AF.""" - cond_var = None - if self.supported: - cond_var = conditional_var('{}{}'.format(self.func, self.fn_num)) - print_conditional_if(cond_var) - print(' AF', end='') - else: - print(' //', end='') - fn_num = self.fn_num - if fn_num is None: - fn_num = 0 - print('({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}'.format(self.idx, - self.func, fn_num, self.pin_type, self.ptr(), self.af_str)) - print_conditional_endif(cond_var) - - def qstr_list(self): - return [self.mux_name()] - - -class Pin(object): - """Holds the information associated with a pin.""" - - def __init__(self, port, pin): - self.port = port - self.pin = pin - self.alt_fn = [] - self.alt_fn_count = 0 - self.adc_num = 0 - self.adc_channel = 0 - self.board_pin = False - - def port_letter(self): - return chr(self.port + ord('A')) - - def cpu_pin_name(self): - return '{:s}{:d}'.format(self.port_letter(), self.pin) - - def is_board_pin(self): - return self.board_pin - - def set_is_board_pin(self): - self.board_pin = True - - def parse_adc(self, adc_str): - if (adc_str[:3] != 'ADC'): - return - (adc,channel) = adc_str.split('_') - for idx in range(3, len(adc)): - adc_num = int(adc[idx]) # 1, 2, or 3 - self.adc_num |= (1 << (adc_num - 1)) - self.adc_channel = int(channel[2:]) - - def parse_af(self, af_idx, af_strs_in): - if len(af_strs_in) == 0: - return - # If there is a slash, then the slash separates 2 aliases for the - # same alternate function. - af_strs = af_strs_in.split('/') - for af_str in af_strs: - alt_fn = AlternateFunction(af_idx, af_str) - self.alt_fn.append(alt_fn) - if alt_fn.is_supported(): - self.alt_fn_count += 1 - - def alt_fn_name(self, null_if_0=False): - if null_if_0 and self.alt_fn_count == 0: - return 'NULL' - return 'pin_{:s}_af'.format(self.cpu_pin_name()) - - def adc_num_str(self): - str = '' - for adc_num in range(1,4): - if self.adc_num & (1 << (adc_num - 1)): - if len(str) > 0: - str += ' | ' - str += 'PIN_ADC' - str += chr(ord('0') + adc_num) - if len(str) == 0: - str = '0' - return str - - def print(self): - if self.alt_fn_count == 0: - print("// ", end='') - print('const pin_af_obj_t {:s}[] = {{'.format(self.alt_fn_name())) - for alt_fn in self.alt_fn: - alt_fn.print() - if self.alt_fn_count == 0: - print("// ", end='') - print('};') - print('') - print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:s}, {:s}, {:d});'.format( - self.cpu_pin_name(), self.port_letter(), self.pin, - self.alt_fn_name(null_if_0=True), - self.adc_num_str(), self.adc_channel)) - print('') - - def print_header(self, hdr_file): - hdr_file.write('extern const pin_obj_t pin_{:s};\n'. - format(self.cpu_pin_name())) - if self.alt_fn_count > 0: - hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'. - format(self.cpu_pin_name())) - - def qstr_list(self): - result = [] - for alt_fn in self.alt_fn: - if alt_fn.is_supported(): - result += alt_fn.qstr_list() - return result - - -class NamedPin(object): - - def __init__(self, name, pin): - self._name = name - self._pin = pin - - def pin(self): - return self._pin - - def name(self): - return self._name - - -class Pins(object): - - def __init__(self): - self.cpu_pins = [] # list of NamedPin objects - self.board_pins = [] # list of NamedPin objects - - def find_pin(self, port_num, pin_num): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.port == port_num and pin.pin == pin_num: - return pin - - def parse_af_file(self, filename, pinname_col, af_col): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[pinname_col]) - except: - continue - pin = Pin(port_num, pin_num) - for af_idx in range(af_col, len(row)): - if af_idx < af_col + 16: - pin.parse_af(af_idx - af_col, row[af_idx]) - elif af_idx == af_col + 16: - pin.parse_adc(row[af_idx]) - self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin)) - - def parse_board_file(self, filename): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[1]) - except: - continue - pin = self.find_pin(port_num, pin_num) - if pin: - pin.set_is_board_pin() - self.board_pins.append(NamedPin(row[0], pin)) - - def print_named(self, label, named_pins): - print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label)) - for named_pin in named_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(), pin.cpu_pin_name())) - print('};') - print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label)); - - def print(self): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print() - self.print_named('cpu', self.cpu_pins) - print('') - self.print_named('board', self.board_pins) - - def print_adc(self, adc_num): - print(''); - print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num)) - for channel in range(17): - if channel == 16: - print('#if defined(MCU_SERIES_L4)') - adc_found = False - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if (pin.is_board_pin() and - (pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)): - print(' &pin_{:s}, // {:d}'.format(pin.cpu_pin_name(), channel)) - adc_found = True - break - if not adc_found: - print(' NULL, // {:d}'.format(channel)) - if channel == 16: - print('#endif') - print('};') - - - def print_header(self, hdr_filename): - with open(hdr_filename, 'wt') as hdr_file: - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print_header(hdr_file) - hdr_file.write('extern const pin_obj_t * const pin_adc1[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc2[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc3[];\n') - # provide #define's mapping board to cpu name - for named_pin in self.board_pins: - hdr_file.write("#define pyb_pin_{:s} pin_{:s}\n".format(named_pin.name(), named_pin.pin().cpu_pin_name())) - - def print_qstr(self, qstr_filename): - with open(qstr_filename, 'wt') as qstr_file: - qstr_set = set([]) - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - qstr_set |= set(pin.qstr_list()) - qstr_set |= set([named_pin.name()]) - for named_pin in self.board_pins: - qstr_set |= set([named_pin.name()]) - for qstr in sorted(qstr_set): - cond_var = None - if qstr.startswith('AF'): - af_words = qstr.split('_') - cond_var = conditional_var(af_words[1]) - print_conditional_if(cond_var, file=qstr_file) - print('Q({})'.format(qstr), file=qstr_file) - print_conditional_endif(cond_var, file=qstr_file) - - def print_af_hdr(self, af_const_filename): - with open(af_const_filename, 'wt') as af_const_file: - af_hdr_set = set([]) - mux_name_width = 0 - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - for af in pin.alt_fn: - if af.is_supported(): - mux_name = af.mux_name() - af_hdr_set |= set([mux_name]) - if len(mux_name) > mux_name_width: - mux_name_width = len(mux_name) - for mux_name in sorted(af_hdr_set): - af_words = mux_name.split('_') # ex mux_name: AF9_I2C2 - cond_var = conditional_var(af_words[1]) - print_conditional_if(cond_var, file=af_const_file) - key = 'MP_ROM_QSTR(MP_QSTR_{}),'.format(mux_name) - val = 'MP_ROM_INT(GPIO_{})'.format(mux_name) - print(' { %-*s %s },' % (mux_name_width + 26, key, val), - file=af_const_file) - print_conditional_endif(cond_var, file=af_const_file) - - def print_af_py(self, af_py_filename): - with open(af_py_filename, 'wt') as af_py_file: - print('PINS_AF = (', file=af_py_file); - for named_pin in self.board_pins: - print(" ('%s', " % named_pin.name(), end='', file=af_py_file) - for af in named_pin.pin().alt_fn: - if af.is_supported(): - print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file) - print('),', file=af_py_file) - print(')', file=af_py_file) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file" - ) - parser.add_argument( - "-a", "--af", - dest="af_filename", - help="Specifies the alternate function file for the chip", - default="stm32f4xx_af.csv" - ) - parser.add_argument( - "--af-const", - dest="af_const_filename", - help="Specifies header file for alternate function constants.", - default="build/pins_af_const.h" - ) - parser.add_argument( - "--af-py", - dest="af_py_filename", - help="Specifies the filename for the python alternate function mappings.", - default="build/pins_af.py" - ) - parser.add_argument( - "-b", "--board", - dest="board_filename", - help="Specifies the board file", - ) - parser.add_argument( - "-p", "--prefix", - dest="prefix_filename", - help="Specifies beginning portion of generated pins file", - default="stm32f4xx_prefix.c" - ) - parser.add_argument( - "-q", "--qstr", - dest="qstr_filename", - help="Specifies name of generated qstr header file", - default="build/pins_qstr.h" - ) - parser.add_argument( - "-r", "--hdr", - dest="hdr_filename", - help="Specifies name of generated pin header file", - default="build/pins.h" - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - print('// This file was automatically generated by make-pins.py') - print('//') - if args.af_filename: - print('// --af {:s}'.format(args.af_filename)) - pins.parse_af_file(args.af_filename, 1, 2) - - if args.board_filename: - print('// --board {:s}'.format(args.board_filename)) - pins.parse_board_file(args.board_filename) - - if args.prefix_filename: - print('// --prefix {:s}'.format(args.prefix_filename)) - print('') - with open(args.prefix_filename, 'r') as prefix_file: - print(prefix_file.read()) - pins.print() - pins.print_adc(1) - pins.print_adc(2) - pins.print_adc(3) - pins.print_header(args.hdr_filename) - pins.print_qstr(args.qstr_filename) - pins.print_af_hdr(args.af_const_filename) - pins.print_af_py(args.af_py_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/stm32/boards/openocd_stm32f7.cfg b/ports/stm32/boards/openocd_stm32f7.cfg deleted file mode 100644 index 55b6326503792..0000000000000 --- a/ports/stm32/boards/openocd_stm32f7.cfg +++ /dev/null @@ -1,42 +0,0 @@ -# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger -# and an STM32F7 target microcontroller. -# -# To flash your firmware: -# -# $ openocd -f openocd_stm32f7.cfg \ -# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000" -# -# For a gdb server on port 3333: -# -# $ openocd -f openocd_stm32f7.cfg - - -source [find interface/stlink-v2-1.cfg] -transport select hla_swd -source [find target/stm32f7x.cfg] -reset_config srst_only -init - -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { - reset halt - sleep 100 - wait_halt 2 - flash write_image erase $BIN0 $ADDR0 - sleep 100 - verify_image $BIN0 $ADDR0 - sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 - reset run - shutdown -} - -proc stm_erase {} { - reset halt - sleep 100 - stm32f7x mass_erase 0 - sleep 100 - shutdown -} diff --git a/ports/stm32/boards/openocd_stm32l4.cfg b/ports/stm32/boards/openocd_stm32l4.cfg deleted file mode 100644 index 59e98de038c2d..0000000000000 --- a/ports/stm32/boards/openocd_stm32l4.cfg +++ /dev/null @@ -1,42 +0,0 @@ -# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger -# and an STM32L4 target microcontroller. -# -# To flash your firmware: -# -# $ openocd -f openocd_stm32l4.cfg \ -# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08004000" -# -# For a gdb server on port 3333: -# -# $ openocd -f openocd_stm32l4.cfg - - -source [find interface/stlink-v2-1.cfg] -transport select hla_swd -source [find target/stm32l4x.cfg] -reset_config srst_only -init - -proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } { - reset halt - sleep 100 - wait_halt 2 - flash write_image erase $BIN0 $ADDR0 - sleep 100 - verify_image $BIN0 $ADDR0 - sleep 100 - flash write_image erase $BIN1 $ADDR1 - sleep 100 - verify_image $BIN1 $ADDR1 - sleep 100 - reset run - shutdown -} - -proc stm_erase {} { - reset halt - sleep 100 - stm32l4x mass_erase 0 - sleep 100 - shutdown -} diff --git a/ports/stm32/boards/pllvalues.py b/ports/stm32/boards/pllvalues.py deleted file mode 100644 index befd6cfa0df52..0000000000000 --- a/ports/stm32/boards/pllvalues.py +++ /dev/null @@ -1,165 +0,0 @@ -""" -This is an auxiliary script that is used to compute valid PLL values to set -the CPU frequency to a given value. The algorithm here appears as C code -for the machine.freq() function. -""" - -from __future__ import print_function - -def close_int(x): - return abs(x - round(x)) < 0.01 - -# original version that requires N/M to be an integer (for simplicity) -def compute_pll(hse, sys): - for P in (2, 4, 6, 8): # allowed values of P - Q = sys * P / 48 - NbyM = sys * P / hse - # N/M and Q must be integers - if not (close_int(NbyM) and close_int(Q)): - continue - # VCO_OUT must be between 192MHz and 432MHz - if not (192 <= hse * NbyM <= 432): - continue - # compute M - M = int(192 // NbyM) - while hse > 2 * M or NbyM * M < 192: - M += 1 - # VCO_IN must be between 1MHz and 2MHz (2MHz recommended) - if not (M <= hse): - continue - # compute N - N = NbyM * M - # N and Q are restricted - if not (192 <= N <= 432 and 2 <= Q <= 15): - continue - # found valid values - assert NbyM == N // M - return (M, N, P, Q) - # no valid values found - return None - -# improved version that doesn't require N/M to be an integer -def compute_pll2(hse, sys): - # Loop over the allowed values of P, looking for a valid PLL configuration - # that gives the desired "sys" frequency. We use floats for P to force - # floating point arithmetic on Python 2. - for P in (2.0, 4.0, 6.0, 8.0): - Q = sys * P / 48 - # Q must be an integer in a set range - if not (close_int(Q) and 2 <= Q <= 15): - continue - NbyM = sys * P / hse - # VCO_OUT must be between 192MHz and 432MHz - if not (192 <= hse * NbyM <= 432): - continue - # compute M - M = 192 // NbyM # starting value - while hse > 2 * M or NbyM * M < 192 or not close_int(NbyM * M): - M += 1 - # VCO_IN must be between 1MHz and 2MHz (2MHz recommended) - if not (M <= hse): - continue - # compute N - N = NbyM * M - # N must be an integer - if not close_int(N): - continue - # N is restricted - if not (192 <= N <= 432): - continue - # found valid values - return (M, N, P, Q) - # no valid values found - return None - -def compute_derived(hse, pll): - M, N, P, Q = pll - vco_in = hse / M - vco_out = hse * N / M - pllck = hse / M * N / P - pll48ck = hse / M * N / Q - return (vco_in, vco_out, pllck, pll48ck) - -def verify_pll(hse, pll): - M, N, P, Q = pll - vco_in, vco_out, pllck, pll48ck = compute_derived(hse, pll) - - # verify ints - assert close_int(M) - assert close_int(N) - assert close_int(P) - assert close_int(Q) - - # verify range - assert 2 <= M <= 63 - assert 192 <= N <= 432 - assert P in (2, 4, 6, 8) - assert 2 <= Q <= 15 - assert 1 <= vco_in <= 2 - assert 192 <= vco_out <= 432 - -def generate_c_table(hse, valid_plls): - valid_plls = valid_plls + [(16, (0, 0, 2, 0))] - if hse < 16: - valid_plls.append((hse, (1, 0, 2, 0))) - valid_plls.sort() - print("// (M, P/2-1, SYS) values for %u MHz HSE" % hse) - print("static const uint16_t pll_freq_table[%u] = {" % len(valid_plls)) - for sys, (M, N, P, Q) in valid_plls: - print(" (%u << 10) | (%u << 8) | %u," % (M, P // 2 - 1, sys)) - print("};") - -def print_table(hse, valid_plls): - print("HSE =", hse, "MHz") - print("sys : M N P Q : VCO_IN VCO_OUT PLLCK PLL48CK") - out_format = "%3u : %2u %.1f %.2f %.2f : %5.2f %6.2f %6.2f %6.2f" - for sys, pll in valid_plls: - print(out_format % ((sys,) + pll + compute_derived(hse, pll))) - print("found %u valid configurations" % len(valid_plls)) - -def main(): - global out_format - - # parse input args - import sys - argv = sys.argv[1:] - - c_table = False - if argv[0] == '-c': - c_table = True - argv.pop(0) - - if len(argv) != 1: - print("usage: pllvalues.py [-c] ") - sys.exit(1) - - if argv[0].startswith("file:"): - # extract HSE_VALUE from header file - with open(argv[0][5:]) as f: - for line in f: - line = line.strip() - if line.startswith("#define") and line.find("HSE_VALUE") != -1: - idx_start = line.find("((uint32_t)") + 11 - idx_end = line.find(")", idx_start) - hse = int(line[idx_start:idx_end]) // 1000000 - break - else: - raise ValueError("%s does not contain a definition of HSE_VALUE" % argv[0]) - else: - # HSE given directly as an integer - hse = int(argv[0]) - - valid_plls = [] - for sysclk in range(1, 217): - pll = compute_pll2(hse, sysclk) - if pll is not None: - verify_pll(hse, pll) - valid_plls.append((sysclk, pll)) - - if c_table: - generate_c_table(hse, valid_plls) - else: - print_table(hse, valid_plls) - -if __name__ == "__main__": - main() diff --git a/ports/stm32/boards/stm32f401_af.csv b/ports/stm32/boards/stm32f401_af.csv deleted file mode 100644 index 3b29e134955e4..0000000000000 --- a/ports/stm32/boards/stm32f401_af.csv +++ /dev/null @@ -1,83 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/SPI2/I2S2/SPI3/I2S3/SPI4,SPI2/I2S2/SPI3/I2S3,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,OTG1_FS,,SDIO,,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK,,,,,,,,,,EVENTOUT,ADC1_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,,,,,,,,,,EVENTOUT,ADC1_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI,,,,,,,,,,EVENTOUT,ADC1_IN7 -PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,OTG_FS_VBUS,,,,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,USART6_TX,,OTG_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,USART6_RX,,OTG_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS_SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK_SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,,,,,,,,,,EVENTOUT,ADC1_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,,,,,,,,,,EVENTOUT,ADC1_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO_SWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,I2C2_SDA,,,,,,EVENTOUT, -PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,,,,,,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,,,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,,,,SDIO_D4,,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,,,,SDIO_D5,,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,,,,,,,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10 -PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13 -PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14 -PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15 -PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT, -PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT, -PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT, -PortE,PE1,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,,,,,,,,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,,,,,,,,,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,,,,,,,,,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,,,,,,,,,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f401xd.ld b/ports/stm32/boards/stm32f401xd.ld deleted file mode 100644 index 89f60560964b7..0000000000000 --- a/ports/stm32/boards/stm32f401xd.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - GNU linker script for STM32F401xD -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 256K /* sectors 5,6 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ diff --git a/ports/stm32/boards/stm32f401xe.ld b/ports/stm32/boards/stm32f401xe.ld deleted file mode 100644 index ae2f899048358..0000000000000 --- a/ports/stm32/boards/stm32f401xe.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - GNU linker script for STM32F401xE -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ diff --git a/ports/stm32/boards/stm32f405.ld b/ports/stm32/boards/stm32f405.ld deleted file mode 100644 index c6107913f2b75..0000000000000 --- a/ports/stm32/boards/stm32f405.ld +++ /dev/null @@ -1,32 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3,4 are for filesystem */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5,6,7,8,9,10,11 */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f405_af.csv b/ports/stm32/boards/stm32f405_af.csv deleted file mode 100644 index 81f5e80ed1724..0000000000000 --- a/ports/stm32/boards/stm32f405_af.csv +++ /dev/null @@ -1,142 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/SPI2/I2S2/I2S2ext,SPI3/I2Sext/I2S3,USART1/2/3/I2S3ext,UART4/5/USART6,CAN1/CAN2/TIM12/13/14,OTG_FS/OTG_HS,ETH,FSMC/SDIO/OTG_FS,DCMI,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII__REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCK,,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FSMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC123_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC123_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FSMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FSMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,,,USART2_CTS,,,,,FSMC_CLK,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FSMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FSMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,,,USART2_RX,,,,,FSMC_NWAIT,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FSMC_NE1/FSMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FSMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FSMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FSMC_D15,,,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FSMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FSMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FSMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FSMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FSMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,FSMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,,,,,FSMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,,,,,,,ETH_MII_TXD3,FSMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,FSMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,,,,,,,,FSMC_A20,DCMI_D4,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,,,,,,,,FSMC_A21,DCMI_D6,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,,,,,,,,FSMC_A22,DCMI_D7,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,FSMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,FSMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FSMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FSMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,,,,,,,,FSMC_D8,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,,,,,,,,FSMC_D9,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,,,,,,,,FSMC_D10,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,,,,,,,,FSMC_D11,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FSMC_D12,,,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FSMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FSMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FSMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FSMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FSMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FSMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,,,,,,,,FSMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,,,,,,,,FSMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,,,,,TIM13_CH1,,,FSMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,,,,,TIM14_CH1,,,FSMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FSMC_INTR,,,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,,,,,,,,,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FSMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FSMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FSMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FSMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FSMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FSMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FSMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FSMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FSMC_A14,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FSMC_A15,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FSMC_INT2,,,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FSMC_INT3,,,EVENTOUT, -PortG,PG8,,,,,,,,,USART6_RTS,,,ETH_PPS_OUT,,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FSMC_NE2/FSMC_NCE3,,,EVENTOUT, -PortG,PG10,,,,,,,,,,,,,FSMC_NCE4_1/FSMC_NE3,,,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FSMC_NCE4_2,,,EVENTOUT, -PortG,PG12,,,,,,,,,USART6_RTS,,,,FSMC_NE4,,,EVENTOUT, -PortG,PG13,,,,,,,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FSMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FSMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,,,,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,,,,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,,,,,,,,,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,,,,,TIM12_CH1,,ETH_MII_RXD2,,,,EVENTOUT, -PortH,PH7,,,,,I2C3_SCL,,,,,,,ETH_MII_RXD3,,,,EVENTOUT, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,,DCMI_HSYNC,,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,,DCMI_D0,,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,,DCMI_D1,,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,,DCMI_D2,,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,,DCMI_D3,,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,,,,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,,DCMI_D4,,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,,DCMI_D11,,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,,DCMI_D13,,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,DCMI_D8,,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,,DCMI_D9,,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,,DCMI_D5,,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,,DCMI_VSYNC,,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,,DCMI_D6,,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,,DCMI_D7,,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,,,,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,,,,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f411.ld b/ports/stm32/boards/stm32f411.ld deleted file mode 100644 index 7adfa35c95798..0000000000000 --- a/ports/stm32/boards/stm32f411.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - GNU linker script for STM32F411 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K, 4 is 64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f411_af.csv b/ports/stm32/boards/stm32f411_af.csv deleted file mode 100644 index 29267b1d958bf..0000000000000 --- a/ports/stm32/boards/stm32f411_af.csv +++ /dev/null @@ -1,84 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3,SPI2/I2S2/SPI3/I2S3/SPI4/I2S4/SPI5/I2S5,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,,,SDIO,,,,ADC -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,ADC1_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,,,,,,,,EVENTOUT,ADC1_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,,,,EVENTOUT,ADC1_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,,,,,,EVENTOUT,ADC1_IN3 -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,ADC1_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK/I2S1_CK,,,,,,,,,,EVENTOUT,ADC1_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,I2S2_MCK,,,,,,SDIO_CMD,,,EVENTOUT,ADC1_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI/I2S1_SD,,,,,,,,,,EVENTOUT,ADC1_IN7 -PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,USB_FS_SOF,,SDIO_D1,,,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,SPI4_MISO,USART1_CTS,USART6_TX,,USB_FS_DM,,,,,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,SPI5_MISO,USART1_RTS,USART6_RX,,USB_FS_DP,,,,,EVENTOUT, -PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,ADC1_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,ADC1_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO-SWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,,I2C2_SDA,,,,,,EVENTOUT, -PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,SDIO_D0,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,,,SDIO_D3,,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,SDIO_D0,,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,,,I2C3_SDA,,,SDIO_D4,,,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,I2C2_SDA,,,SDIO_D5,,,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,,,,,,SDIO_D7,,,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,,,,,,,,,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,,,,,,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,,,,,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,SDIO_D6,,,EVENTOUT, -PortB,PB15,RTC_50Hz,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN10 -PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,ADC1_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,ADC1_IN13 -PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN14 -PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC1_IN15 -PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT, -PortC,PC7,,,TIM3_CH2,,,SPI2_SCK/I2S2_CK,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT, -PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT, -PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S2_CKIN,,,,,,,SDIO_D1,,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT, -PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT, -PortE,PE1,,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, diff --git a/ports/stm32/boards/stm32f429.ld b/ports/stm32/boards/stm32f429.ld deleted file mode 100644 index a0931684d2e58..0000000000000 --- a/ports/stm32/boards/stm32f429.ld +++ /dev/null @@ -1,32 +0,0 @@ -/* - GNU linker script for STM32F429i-Discovery kit with external 8MByte SDRam -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0, 16 KiB */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1-4: 3*16K+64K */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K - SDRAM(xrw) : ORIGIN = 0xC0000000, LENGTH = 8192K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2001c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f429_af.csv b/ports/stm32/boards/stm32f429_af.csv deleted file mode 100644 index 2e501ade0bac8..0000000000000 --- a/ports/stm32/boards/stm32f429_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS, -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT, -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,UART8_Rx,,,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,UART8_Tx,,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,UART7_Rx,,,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_Tx,,,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,,,FMC_D8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,,,FMC_D9,,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,,,FMC_D10,,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,,,FMC_D11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_Rx,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_Tx,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT, -PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32f439.ld b/ports/stm32/boards/stm32f439.ld deleted file mode 100644 index a76a0ebc79268..0000000000000 --- a/ports/stm32/boards/stm32f439.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - GNU linker script for STM32F439 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 are 128K */ - FLASH_FS (rx) : ORIGIN = 0x08100000, LENGTH = 256K /* sectors 12-17 are 4*16K+64K+128K */ - FLASH_FS2 (rx) : ORIGIN = 0x08140000, LENGTH = 128K /* sector 18 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* top end of the stack */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2002c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f439_af.csv b/ports/stm32/boards/stm32f439_af.csv deleted file mode 100644 index 5d5c3e72d6d2b..0000000000000 --- a/ports/stm32/boards/stm32f439_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11,I2C1/2/3,SPI1/2/3/4/5/6,SPI2/3/SAI1,SPI3/USART1/2/3,USART6/UART4/5/7/8,CAN1/2/TIM12/13/14/LCD,OTG2_HS/OTG1_FS,ETH,FMC/SDIO/OTG2_FS,DCMI,LCD,SYS, -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,ETH_MII_CRS,,,,EVENTOUT,ADC123_IN0 -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,,,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,,EVENTOUT,ADC123_IN1 -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,,,,ETH_MDIO,,,,EVENTOUT,ADC123_IN2 -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT,ADC123_IN3 -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT,ADC12_IN4 -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK,,,,,OTG_HS_ULPI_CK,,,,,EVENTOUT,ADC12_IN5 -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT,ADC12_IN6 -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,,,,EVENTOUT,ADC12_IN7 -PortA,PA8,MCO1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT, -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT, -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT, -PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT, -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS,SPI3_NSS/I2S3_WS,,,,,,,,,EVENTOUT, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,,,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT,ADC12_IN8 -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT,ADC12_IN9 -PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT, -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT, -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,,,,,,,EVENTOUT, -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT, -PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,CAN2_TX,,,FMC_SDNE1,DCMI_D5,,EVENTOUT, -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT, -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDIO_D4,DCMI_D6,LCD_B6,EVENTOUT, -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDIO_D5,DCMI_D7,LCD_B7,EVENTOUT, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT, -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT, -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,I2S2ext_SD,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT, -PortC,PC0,,,,,,,,,,,OTG_HS_ULPI_STP,,FMC_SDNWE,,,EVENTOUT,ADC123_IN10 -PortC,PC1,,,,,,,,,,,,ETH_MDC,,,,EVENTOUT,ADC123_IN11 -PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT,ADC123_IN12 -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT,ADC123_IN13 -PortC,PC4,,,,,,,,,,,,ETH_MII_RXD0/ETH_RMII_RXD0,,,,EVENTOUT,ADC12_IN14 -PortC,PC5,,,,,,,,,,,,ETH_MII_RXD1/ETH_RMII_RXD1,,,,EVENTOUT,ADC12_IN15 -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,DCMI_D0,LCD_HSYNC,EVENTOUT, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDIO_D7,DCMI_D1,LCD_G6,EVENTOUT, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,USART6_CK,,,,SDIO_D0,DCMI_D2,,EVENTOUT, -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,,,,,SDIO_D1,DCMI_D3,,EVENTOUT, -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,,,,SDIO_D2,DCMI_D8,LCD_R2,EVENTOUT, -PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,USART3_RX,UART4_RX,,,,SDIO_D3,DCMI_D4,,EVENTOUT, -PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDIO_CK,DCMI_D9,,EVENTOUT, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT, -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT, -PortD,PD2,,,TIM3_ETR,,,,,,UART5_RX,,,,SDIO_CMD,DCMI_D11,,EVENTOUT, -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT, -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT, -PortD,PD6,,,,,,I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT, -PortD,PD7,,,,,,,,USART2_CK,,,,,FMC_NE1/FMC_NCE2,,,EVENTOUT, -PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT, -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT, -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT, -PortD,PD11,,,,,,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT, -PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT, -PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT, -PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT, -PortE,PE0,,,TIM4_ETR,,,,,,UART8_Rx,,,,FMC_NBL0,DCMI_D2,,EVENTOUT, -PortE,PE1,,,,,,,,,UART8_Tx,,,,FMC_NBL1,DCMI_D3,,EVENTOUT, -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT, -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT, -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT, -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT, -PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT, -PortE,PE7,,TIM1_ETR,,,,,,,UART7_Rx,,,,FMC_D4,,,EVENTOUT, -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_Tx,,,,FMC_D5,,,EVENTOUT, -PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT, -PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT, -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,SPI3_NSS,,,,,,FMC_D8,,LCD_G3,EVENTOUT, -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,SPI3_SCK,,,,,,FMC_D9,,LCD_B4,EVENTOUT, -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI3_MISO,,,,,,FMC_D10,,LCD_DE,EVENTOUT, -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,SP3_MOSI,,,,,,FMC_D11,,LCD_CLK,EVENTOUT, -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9 -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14 -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15 -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_Rx,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4 -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_Tx,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5 -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6 -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7 -PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8 -PortF,PF11,,,,,,SPI5_MOSI,,,,,,,FMC_SDNRAS,DCMI_D12,,EVENTOUT, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT, -PortF,PF13,,,,,,,,,,,,,FMC_A7,,,EVENTOUT, -PortF,PF14,,,,,,,,,,,,,FMC_A8,,,EVENTOUT, -PortF,PF15,,,,,,,,,,,,,FMC_A9,,,EVENTOUT, -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT, -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT, -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT, -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT, -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT, -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT, -PortG,PG6,,,,,,,,,,,,,FMC_INT2,DCMI_D12,LCD_R7,EVENTOUT, -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT3,DCMI_D13,LCD_CLK,EVENTOUT, -PortG,PG8,,,,,,SPI6_NSS,,,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT, -PortG,PG9,,,,,,,,,USART6_RX,,,,FMC_NE2/FMC_NCE3,DCMI_VSYNC(1),,EVENTOUT, -PortG,PG10,,,,,,,,,,LCD_G3,,,FMC_NCE4_1/FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT, -PortG,PG11,,,,,,,,,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,FMC_NCE4_2,DCMI_D3,LCD_B3,EVENTOUT, -PortG,PG12,,,,,,SPI6_MISO,,,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT, -PortG,PG13,,,,,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,,EVENTOUT, -PortG,PG14,,,,,,SPI6_MOSI,,,USART6_TX,,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,,EVENTOUT, -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT, -PortH,PH2,,,,,,,,,,,,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT, -PortH,PH3,,,,,,,,,,,,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT, -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT, -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT, -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,,FMC_SDNE1,DCMI_D8,,, -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,, -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT, -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT, -PortH,PH10,,,TIM5_CH1,,,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT, -PortH,PH11,,,TIM5_CH2,,,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT, -PortH,PH12,,,TIM5_CH3,,,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT, -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT, -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT, -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT, -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT, -PortI,PI1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT, -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,I2S2ext_SD,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT, -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT, -PortI,PI4,,,,TIM8_BKIN,,,,,,,,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT, -PortI,PI5,,,,TIM8_CH1,,,,,,,,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT, -PortI,PI6,,,,TIM8_CH2,,,,,,,,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT, -PortI,PI7,,,,TIM8_CH3,,,,,,,,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT, -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT, -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT, -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT, -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT, -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT, -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT, -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT, -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT, -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT, -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT, -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT, -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT, -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT, -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT, -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT, -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT, -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT, -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT, -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT, -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT, -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT, -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT, -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT, -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT, -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT, -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT, -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT, -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT, -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT, -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT, -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT, -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT, diff --git a/ports/stm32/boards/stm32f4xx_prefix.c b/ports/stm32/boards/stm32f4xx_prefix.c deleted file mode 100644 index f4ffdab68efec..0000000000000 --- a/ports/stm32/boards/stm32f4xx_prefix.c +++ /dev/null @@ -1,32 +0,0 @@ -// stm32f4xx_prefix.c becomes the initial portion of the generated pins file. - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "pin.h" - -#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \ -{ \ - { &pin_af_type }, \ - .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \ - .idx = (af_idx), \ - .fn = AF_FN_ ## af_fn, \ - .unit = (af_unit), \ - .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \ - .af_fn = (af_ptr) \ -} - -#define PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel) \ -{ \ - { &pin_type }, \ - .name = MP_QSTR_ ## p_port ## p_pin, \ - .port = PORT_ ## p_port, \ - .pin = (p_pin), \ - .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \ - .pin_mask = (1 << ((p_pin) & 0x0f)), \ - .gpio = GPIO ## p_port, \ - .af = p_af, \ - .adc_num = p_adc_num, \ - .adc_channel = p_adc_channel, \ -} diff --git a/ports/stm32/boards/stm32f746.ld b/ports/stm32/boards/stm32f746.ld deleted file mode 100644 index ce5e85bb6d948..0000000000000 --- a/ports/stm32/boards/stm32f746.ld +++ /dev/null @@ -1,32 +0,0 @@ -/* - GNU linker script for STM32F405 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* SRAM1 = 240K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x2004c000; /* tunable */ diff --git a/ports/stm32/boards/stm32f746_af.csv b/ports/stm32/boards/stm32f746_af.csv deleted file mode 100644 index eabc9ab3bad14..0000000000000 --- a/ports/stm32/boards/stm32f746_af.csv +++ /dev/null @@ -1,171 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15 -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT -PortA,PA5,,TIM2_CH1/TIM2_ETR,TIM8_CH1N,SPI1_SCK/I2S1_CK,,,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT -PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT -PortA,PA13,JTMS,SWDIO,,,,,,,,,,,,,,EVENTOUT -PortA,PA14,JTCK,SWCLK,,,,,,,,,,,,,,EVENTOUT -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMICE,CSPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT -PortB,PB0,,TIM1_CH2N,TIM3_CH3T,IM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT -PortB,PB1,,TIM1_CH3N,TIM3_CH4T,IM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT -PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT -PortB,PB6,,,TIM4_CH1,HDMICEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT -PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT -PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT -PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT -PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT -PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT -PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT -PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT -PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,,FMC_NE1,,,EVENTOUT -PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT -PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT -PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT -PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT -PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT -PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT -PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT -PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT -PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT -PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT -PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT -PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT -PortF,PF10,,,,,,,,,,,,,,DCMI_D11,LCD_DE,EVENTOUT -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT -PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT -PortF,PF14,,,,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT -PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT -PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT -PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT -PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT -PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT -PortG,PG11,,,,,,,,SPDIFRX_IN0,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT -PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT -PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT -PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT -PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT -PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT -PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT - diff --git a/ports/stm32/boards/stm32f767.ld b/ports/stm32/boards/stm32f767.ld deleted file mode 100644 index 225abd810f724..0000000000000 --- a/ports/stm32/boards/stm32f767.ld +++ /dev/null @@ -1,32 +0,0 @@ -/* - GNU linker script for STM32F767 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20078000; /* tunable */ diff --git a/ports/stm32/boards/stm32f767_af.csv b/ports/stm32/boards/stm32f767_af.csv deleted file mode 100644 index 1708dfcca4f80..0000000000000 --- a/ports/stm32/boards/stm32f767_af.csv +++ /dev/null @@ -1,170 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15 -,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FS,SDMMC2/ETH,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS -PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT -PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT -PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT -PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT -PortA,PA5,,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,SPI1_SCK/I2S1_CK,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT -PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT -PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT -PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT -PortA,PA13,JTMS,SWDIO,,,,,,,,,,,,,,EVENTOUT -PortA,PA14,JTCK,SWCLK,,,,,,,,,,,,,,EVENTOUT -PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMICEC,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT -PortB,PB0,,TIM1_CH2N,TIM3_CH3T,TIM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT -PortB,PB1,,TIM1_CH3N,TIM3_CH4T,TIM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT -PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT -PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,SDMMC2_D2,,,,,EVENTOUT -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,SDMMC2_D3,,,,,EVENTOUT -PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT -PortB,PB6,,,TIM4_CH1,HDMICEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT -PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT -PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,SDMMC2_D4,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT -PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,SDMMC2_D5,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT -PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT -PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,SDMMC2_D0,,OTG_HS_DM,,,EVENTOUT -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,SDMMC2_D1,,OTG_HS_DP,,,EVENTOUT -PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT -PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT -PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT -PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT -PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT -PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,SDMMC2_D6,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,SDMMC2_D7,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT -PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT -PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S2_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT -PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT -PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT -PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT -PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT -PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT -PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT -PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT -PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,SDMMC2_CK,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT -PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,SDMMC2_CMD,FMC_NE1,,,EVENTOUT -PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT -PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT -PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT -PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT -PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT -PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT -PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT -PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT -PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT -PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT -PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT -PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT -PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT -PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT -PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT -PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT -PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT -PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT -PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT -PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT -PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT -PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT -PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT -PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT -PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT -PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT -PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT -PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT -PortF,PF10,,,,,,,,,,,,,,DCMI_D11,LCD_DE,EVENTOUT -PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT -PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT -PortF,PF14,,,,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT -PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT -PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT -PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT -PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT -PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT -PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT -PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT -PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT -PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT -PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT -PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,SDMMC2_D0,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT -PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT -PortG,PG11,,,,,,,,SPDIFRX_IN0,,,SDMMC2_D2,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT -PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,SDMMC2_D3,FMC_NE4,,LCD_B1,EVENTOUT -PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT -PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT -PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT -PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT -PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT -PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT -PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT -PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT -PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT -PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT -PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT -PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT -PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT -PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT -PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT -PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT -PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT -PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT -PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT -PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT -PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT -PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT -PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT -PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT -PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT -PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT -PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT -PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT -PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT -PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT -PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT -PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT -PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT -PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT -PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT -PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT -PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT -PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT -PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT -PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT -PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT -PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT -PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT -PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT -PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT -PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT -PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT -PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT -PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT -PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT -PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT -PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT -PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT -PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT -PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT -PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT -PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT diff --git a/ports/stm32/boards/stm32f769.ld b/ports/stm32/boards/stm32f769.ld deleted file mode 100644 index c4cabe7a4d422..0000000000000 --- a/ports/stm32/boards/stm32f769.ld +++ /dev/null @@ -1,32 +0,0 @@ -/* - GNU linker script for STM32F769 -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ - FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ - DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ - RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */ -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20078000; /* tunable */ diff --git a/ports/stm32/boards/stm32l476_af.csv b/ports/stm32/boards/stm32l476_af.csv deleted file mode 100644 index d67c33880fb0b..0000000000000 --- a/ports/stm32/boards/stm32l476_af.csv +++ /dev/null @@ -1,116 +0,0 @@ -Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,, -,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,UART4/UART5/LPUART1,CAN1/TSC,OTG_FS/QUADSPI,LCD,SDMMC1/COMP1/COMP2/FMC/SWPMI1,SAI1/SAI2,TIM2/TIM15/TIM16/TIM17/LPTIM2,EVENTOUT,ADC,COMP -PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT,ADC12_IN5, -PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT,ADC12_IN6, -PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,,,,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT,ADC12_IN7, -PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,,,,LCD_SEG2,,,TIM15_CH2,EVENTOUT,ADC12_IN8, -PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT,ADC12_IN9, -PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC12_IN10, -PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,USART3_CTS,,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT,ADC12_IN11, -PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT,ADC12_IN12, -PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,,,LPTIM2_OUT,EVENTOUT,, -PortA,PA9,,TIM1_CH2,,,,,,USART1_TX,,,,LCD_COM1,,,TIM15_BKIN,EVENTOUT,, -PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,,TIM17_BKIN,EVENTOUT,, -PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT,, -PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT,, -PortA,PA13,JTMS-SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,,,,EVENTOUT,, -PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT,, -PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,,SPI1_NSS,SPI3_NSS,,UART4_RTS_DE,TSC_G3_IO1,,LCD_SEG17,,SAI2_FS_B,,EVENTOUT,, -PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,,,EVENTOUT,ADC12_IN15, -PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN0,USART3_RTS_DE,,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT,ADC12_IN16,COMP1_INN -PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM_CKIN0,,,,,,,,,EVENTOUT,,COMP1_INP -PortB,PB3,JTDO-TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS_DE,,,,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT,,COMP2_INM -PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS_DE,TSC_G2_IO1,,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT,,COMP2_INP -PortB,PB5,,LPTIM1_IN1,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT,, -PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,,DFSDM_DATIN5,USART1_TX,,TSC_G2_IO3,,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT,,COMP2_INP -PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,,DFSDM_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT,,COMP2_INM -PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM_DATIN6,,,CAN1_RX,,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT,, -PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM_CKIN6,,,CAN1_TX,,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT,, -PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK,DFSDM_DATIN7,USART3_TX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT,, -PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT,, -PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM_DATIN1,USART3_CK,LPUART1_RTS_DE,TSC_G1_IO1,,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT,, -PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,, -PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM_DATIN2,USART3_RTS_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT,, -PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT,, -PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,DFSDM_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT,ADC123_IN1, -PortC,PC1,,LPTIM1_OUT,,,I2C3_SDA,,DFSDM_CKIN4,,LPUART1_TX,,,LCD_SEG19,,,,EVENTOUT,ADC123_IN2, -PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM_CKOUT,,,,,LCD_SEG20,,,,EVENTOUT,ADC123_IN3, -PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT,ADC123_IN4, -PortC,PC4,,,,,,,,USART3_TX,,,,LCD_SEG22,,,,EVENTOUT,ADC12_IN13,COMP1_INM -PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT,ADC12_IN14,COMP1_INP -PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM_CKIN3,,,TSC_G4_IO1,,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT,, -PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM_DATIN3,,,TSC_G4_IO2,,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT,, -PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,,LCD_SEG26,SDMMC1_D0,,,EVENTOUT,, -PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,,,,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT,, -PortC,PC10,,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT,, -PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT,, -PortC,PC12,,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT,, -PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,, -PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,, -PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,, -PortD,PD0,,,,,,SPI2_NSS,DFSDM_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,, -PortD,PD1,,,,,,SPI2_SCK,DFSDM_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,, -PortD,PD2,,,TIM3_ETR,,,,,USART3_RTS_DE,UART5_RX,TSC_SYNC,,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT,, -PortD,PD3,,,,,,SPI2_MISO,DFSDM_DATIN0,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT,, -PortD,PD4,,,,,,SPI2_MOSI,DFSDM_CKIN0,USART2_RTS_DE,,,,,FMC_NOE,,,EVENTOUT,, -PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT,, -PortD,PD6,,,,,,,DFSDM_DATIN1,USART2_RX,,,,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,, -PortD,PD7,,,,,,,DFSDM_CKIN1,USART2_CK,,,,,FMC_NE1,,,EVENTOUT,, -PortD,PD8,,,,,,,,USART3_TX,,,,LCD_SEG28,FMC_D13,,,EVENTOUT,, -PortD,PD9,,,,,,,,USART3_RX,,,,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT,, -PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT,, -PortD,PD11,,,,,,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT,, -PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT,, -PortD,PD13,,,TIM4_CH2,,,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT,, -PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT,, -PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT,, -PortE,PE0,,,TIM4_ETR,,,,,,,,,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT,, -PortE,PE1,,,,,,,,,,,,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT,, -PortE,PE2,TRACECK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT,, -PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT,, -PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G7_IO3,,,FMC_A20,SAI1_FS_A,,EVENTOUT,, -PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM_CKIN3,,,TSC_G7_IO4,,,FMC_A21,SAI1_SCK_A,,EVENTOUT,, -PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT,, -PortE,PE7,,TIM1_ETR,,,,,DFSDM_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,, -PortE,PE8,,TIM1_CH1N,,,,,DFSDM_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,, -PortE,PE9,,TIM1_CH1,,,,,DFSDM_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,, -PortE,PE10,,TIM1_CH2N,,,,,DFSDM_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,, -PortE,PE11,,TIM1_CH2,,,,,DFSDM_CKIN4,,,TSC_G5_IO2,QUADSPI_NCS,,FMC_D8,,,EVENTOUT,, -PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT,, -PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT,, -PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT,, -PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT,, -PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT,, -PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT,, -PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,, -PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN6, -PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN7, -PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN8, -PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,,,,SAI1_SD_B,,EVENTOUT,ADC3_IN9, -PortF,PF7,,,TIM5_CH2,,,,,,,,,,,SAI1_MCLK_B,,EVENTOUT,ADC3_IN10, -PortF,PF8,,,TIM5_CH3,,,,,,,,,,,SAI1_SCK_B,,EVENTOUT,ADC3_IN11, -PortF,PF9,,,TIM5_CH4,,,,,,,,,,,SAI1_FS_B,TIM15_CH1,EVENTOUT,ADC3_IN12, -PortF,PF10,,,,,,,,,,,,,,,TIM15_CH2,EVENTOUT,ADC3_IN13, -PortF,PF11,,,,,,,,,,,,,,,,EVENTOUT,, -PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT,, -PortF,PF13,,,,,,,DFSDM_DATIN6,,,,,,FMC_A7,,,EVENTOUT,, -PortF,PF14,,,,,,,DFSDM_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT,, -PortF,PF15,,,,,,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT,, -PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT,, -PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT,, -PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT,, -PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT,, -PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT,, -PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT,, -PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS_DE,,,,,,,EVENTOUT,, -PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT3,,,EVENTOUT,, -PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT,, -PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE3/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT,, -PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT,, -PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT,, -PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT,, -PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT,, -PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT,, -PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT,, -PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,, -PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,, diff --git a/ports/stm32/boards/stm32l476xe.ld b/ports/stm32/boards/stm32l476xe.ld deleted file mode 100644 index 11b2972adec7a..0000000000000 --- a/ports/stm32/boards/stm32l476xe.ld +++ /dev/null @@ -1,35 +0,0 @@ -/* - GNU linker script for STM32L476XE -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */ - FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 368K /* sectors 8-191 */ - FLASH_FS (r) : ORIGIN = 0x08060000, LENGTH = 128K /* sectors 192-255 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K - SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ - -_flash_fs_start = ORIGIN(FLASH_FS); -_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); diff --git a/ports/stm32/boards/stm32l476xg.ld b/ports/stm32/boards/stm32l476xg.ld deleted file mode 100644 index a94fa275047d1..0000000000000 --- a/ports/stm32/boards/stm32l476xg.ld +++ /dev/null @@ -1,37 +0,0 @@ -/* - GNU linker script for STM32L476XG -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sectors 0-7 */ - FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 496K /* sectors 8-255 */ - FLASH_FS (r) : ORIGIN = 0x08080000, LENGTH = 512K /* sectors 256-511 */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K - SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K -} - -ENTRY(Reset_Handler) - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* define common sections and symbols */ -INCLUDE common.ld - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = 0x20014000; /* tunable */ - -_flash_fs_start = ORIGIN(FLASH_FS); -_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); diff --git a/ports/stm32/bufhelper.c b/ports/stm32/bufhelper.c deleted file mode 100644 index 79511969b737a..0000000000000 --- a/ports/stm32/bufhelper.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "bufhelper.h" - -void pyb_buf_get_for_send(mp_obj_t o, mp_buffer_info_t *bufinfo, byte *tmp_data) { - if (MP_OBJ_IS_INT(o)) { - tmp_data[0] = mp_obj_get_int(o); - bufinfo->buf = tmp_data; - bufinfo->len = 1; - bufinfo->typecode = 'B'; - } else { - mp_get_buffer_raise(o, bufinfo, MP_BUFFER_READ); - } -} - -mp_obj_t pyb_buf_get_for_recv(mp_obj_t o, vstr_t *vstr) { - if (MP_OBJ_IS_INT(o)) { - // allocate a new bytearray of given length - vstr_init_len(vstr, mp_obj_get_int(o)); - return MP_OBJ_NULL; - } else { - // get the existing buffer - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(o, &bufinfo, MP_BUFFER_WRITE); - vstr->buf = bufinfo.buf; - vstr->len = bufinfo.len; - return o; - } -} diff --git a/ports/stm32/bufhelper.h b/ports/stm32/bufhelper.h deleted file mode 100644 index c1967bf430905..0000000000000 --- a/ports/stm32/bufhelper.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_BUFHELPER_H -#define MICROPY_INCLUDED_STMHAL_BUFHELPER_H - -void pyb_buf_get_for_send(mp_obj_t o, mp_buffer_info_t *bufinfo, byte *tmp_data); -mp_obj_t pyb_buf_get_for_recv(mp_obj_t o, vstr_t *vstr); - -#endif // MICROPY_INCLUDED_STMHAL_BUFHELPER_H diff --git a/ports/stm32/can.c b/ports/stm32/can.c deleted file mode 100644 index 25a608ce9b295..0000000000000 --- a/ports/stm32/can.c +++ /dev/null @@ -1,900 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objtuple.h" -#include "py/runtime.h" -#include "py/gc.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "can.h" -#include "irq.h" - -#if MICROPY_HW_ENABLE_CAN - -#define MASK16 (0) -#define LIST16 (1) -#define MASK32 (2) -#define LIST32 (3) - -/// \moduleref pyb -/// \class CAN - controller area network communication bus -/// -/// CAN implements the standard CAN communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. Note that -/// to connect the pyboard to a CAN bus you must use a CAN transceiver -/// to convert the CAN logic signals from the pyboard to the correct -/// voltage levels on the bus. -/// -/// Note that this driver does not yet support filter configuration -/// (it defaults to a single filter that lets through all messages), -/// or bus timing configuration (except for setting the prescaler). -/// -/// Example usage (works without anything connected): -/// -/// from pyb import CAN -/// can = pyb.CAN(1, pyb.CAN.LOOPBACK) -/// can.send('message!', 123) # send message with id 123 -/// can.recv(0) # receive message on FIFO 0 - -typedef enum _rx_state_t { - RX_STATE_FIFO_EMPTY = 0, - RX_STATE_MESSAGE_PENDING, - RX_STATE_FIFO_FULL, - RX_STATE_FIFO_OVERFLOW, -} rx_state_t; - -typedef struct _pyb_can_obj_t { - mp_obj_base_t base; - mp_obj_t rxcallback0; - mp_obj_t rxcallback1; - mp_uint_t can_id : 8; - bool is_enabled : 1; - bool extframe : 1; - byte rx_state0; - byte rx_state1; - CAN_HandleTypeDef can; -} pyb_can_obj_t; - -STATIC mp_obj_t pyb_can_deinit(mp_obj_t self_in); - -STATIC uint8_t can2_start_bank = 14; - -// assumes Init parameters have been set up correctly -STATIC bool can_init(pyb_can_obj_t *can_obj) { - CAN_TypeDef *CANx = NULL; - - uint32_t GPIO_Pin = 0; - uint8_t GPIO_AF_CANx = 0; - GPIO_TypeDef* GPIO_Port = NULL; - - switch (can_obj->can_id) { - // CAN1 is on RX,TX = Y3,Y4 = PB9,PB9 - case PYB_CAN_1: - CANx = CAN1; - GPIO_AF_CANx = GPIO_AF9_CAN1; - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_8 | GPIO_PIN_9; - __CAN1_CLK_ENABLE(); - break; - - // CAN2 is on RX,TX = Y5,Y6 = PB12,PB13 - case PYB_CAN_2: - CANx = CAN2; - GPIO_AF_CANx = GPIO_AF9_CAN2; - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_12 | GPIO_PIN_13; - __CAN1_CLK_ENABLE(); // CAN2 is a "slave" and needs CAN1 enabled as well - __CAN2_CLK_ENABLE(); - break; - - default: - return false; - } - - // init GPIO - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = GPIO_Pin; - GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; - GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - GPIO_InitStructure.Alternate = GPIO_AF_CANx; - HAL_GPIO_Init(GPIO_Port, &GPIO_InitStructure); - - // init CANx - can_obj->can.Instance = CANx; - HAL_CAN_Init(&can_obj->can); - - can_obj->is_enabled = true; - - return true; -} - -void can_init0(void) { - for (uint i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) { - MP_STATE_PORT(pyb_can_obj_all)[i] = NULL; - } -} - -void can_deinit(void) { - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all)); i++) { - pyb_can_obj_t *can_obj = MP_STATE_PORT(pyb_can_obj_all)[i]; - if (can_obj != NULL) { - pyb_can_deinit(can_obj); - } - } -} - -STATIC void can_clearfilter(uint32_t f) { - CAN_FilterConfTypeDef filter; - - filter.FilterIdHigh = 0; - filter.FilterIdLow = 0; - filter.FilterMaskIdHigh = 0; - filter.FilterMaskIdLow = 0; - filter.FilterFIFOAssignment = CAN_FILTER_FIFO0; - filter.FilterNumber = f; - filter.FilterMode = CAN_FILTERMODE_IDMASK; - filter.FilterScale = CAN_FILTERSCALE_16BIT; - filter.FilterActivation = DISABLE; - filter.BankNumber = can2_start_bank; - - HAL_CAN_ConfigFilter(NULL, &filter); -} - -// We have our own version of CAN transmit so we can handle Timeout=0 correctly. -STATIC HAL_StatusTypeDef CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout) { - uint32_t transmitmailbox; - uint32_t tickstart; - uint32_t rqcpflag; - uint32_t txokflag; - - // Check the parameters - assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE)); - assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR)); - assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC)); - - // Select one empty transmit mailbox - if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) { - transmitmailbox = CAN_TXMAILBOX_0; - rqcpflag = CAN_FLAG_RQCP0; - txokflag = CAN_FLAG_TXOK0; - } else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) { - transmitmailbox = CAN_TXMAILBOX_1; - rqcpflag = CAN_FLAG_RQCP1; - txokflag = CAN_FLAG_TXOK1; - } else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) { - transmitmailbox = CAN_TXMAILBOX_2; - rqcpflag = CAN_FLAG_RQCP2; - txokflag = CAN_FLAG_TXOK2; - } else { - transmitmailbox = CAN_TXSTATUS_NOMAILBOX; - } - - if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) { - // Set up the Id - hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ; - if (hcan->pTxMsg->IDE == CAN_ID_STD) { - assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \ - hcan->pTxMsg->RTR); - } else { - assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \ - hcan->pTxMsg->IDE | \ - hcan->pTxMsg->RTR); - } - - // Set up the DLC - hcan->pTxMsg->DLC &= (uint8_t)0x0000000F; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC; - - // Set up the data field - hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) | - ((uint32_t)hcan->pTxMsg->Data[2] << 16) | - ((uint32_t)hcan->pTxMsg->Data[1] << 8) | - ((uint32_t)hcan->pTxMsg->Data[0])); - hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) | - ((uint32_t)hcan->pTxMsg->Data[6] << 16) | - ((uint32_t)hcan->pTxMsg->Data[5] << 8) | - ((uint32_t)hcan->pTxMsg->Data[4])); - // Request transmission - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ; - - if (Timeout == 0) { - return HAL_OK; - } - - // Get tick - tickstart = HAL_GetTick(); - // Check End of transmission flag - while (!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox))) { - // Check for the Timeout - if (Timeout != HAL_MAX_DELAY) { - if ((HAL_GetTick() - tickstart) > Timeout) { - // When the timeout expires, we try to abort the transmission of the packet - __HAL_CAN_CANCEL_TRANSMIT(hcan, transmitmailbox); - while (!__HAL_CAN_GET_FLAG(hcan, rqcpflag)) { - } - if (__HAL_CAN_GET_FLAG(hcan, txokflag)) { - // The abort attempt failed and the message was sent properly - return HAL_OK; - } else { - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; - } else { - return HAL_BUSY; - } -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC void pyb_can_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_can_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "CAN(%u)", self->can_id); - } else { - mp_printf(print, "CAN(%u, CAN.", self->can_id); - qstr mode; - switch (self->can.Init.Mode) { - case CAN_MODE_NORMAL: mode = MP_QSTR_NORMAL; break; - case CAN_MODE_LOOPBACK: mode = MP_QSTR_LOOPBACK; break; - case CAN_MODE_SILENT: mode = MP_QSTR_SILENT; break; - case CAN_MODE_SILENT_LOOPBACK: default: mode = MP_QSTR_SILENT_LOOPBACK; break; - } - mp_printf(print, "%q, extframe=", mode); - if (self->extframe) { - mode = MP_QSTR_True; - } else { - mode = MP_QSTR_False; - } - mp_printf(print, "%q)", mode); - } -} - -// init(mode, extframe=False, prescaler=100, *, sjw=1, bs1=6, bs2=8) -STATIC mp_obj_t pyb_can_init_helper(pyb_can_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = CAN_MODE_NORMAL} }, - { MP_QSTR_extframe, MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_prescaler, MP_ARG_INT, {.u_int = 100} }, - { MP_QSTR_sjw, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_bs1, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 6} }, - { MP_QSTR_bs2, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - self->extframe = args[1].u_bool; - - // set the CAN configuration values - memset(&self->can, 0, sizeof(self->can)); - CAN_InitTypeDef *init = &self->can.Init; - init->Mode = args[0].u_int << 4; // shift-left so modes fit in a small-int - init->Prescaler = args[2].u_int; - init->SJW = ((args[3].u_int - 1) & 3) << 24; - init->BS1 = ((args[4].u_int - 1) & 0xf) << 16; - init->BS2 = ((args[5].u_int - 1) & 7) << 20; - init->TTCM = DISABLE; - init->ABOM = DISABLE; - init->AWUM = DISABLE; - init->NART = DISABLE; - init->RFLM = DISABLE; - init->TXFP = DISABLE; - - // init CAN (if it fails, it's because the port doesn't exist) - if (!can_init(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%d) doesn't exist", self->can_id)); - } - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a CAN object on the given bus. `bus` can be 1-2, or 'YA' or 'YB'. -/// With no additional parameters, the CAN object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the CAN busses are: -/// -/// - `CAN(1)` is on `YA`: `(RX, TX) = (Y3, Y4) = (PB8, PB9)` -/// - `CAN(2)` is on `YB`: `(RX, TX) = (Y5, Y6) = (PB12, PB13)` -STATIC mp_obj_t pyb_can_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out port - mp_uint_t can_idx; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_CAN1_NAME - } else if (strcmp(port, MICROPY_HW_CAN1_NAME) == 0) { - can_idx = PYB_CAN_1; - #endif - #ifdef MICROPY_HW_CAN2_NAME - } else if (strcmp(port, MICROPY_HW_CAN2_NAME) == 0) { - can_idx = PYB_CAN_2; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%s) doesn't exist", port)); - } - } else { - can_idx = mp_obj_get_int(args[0]); - } - if (can_idx < 1 || can_idx > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_can_obj_all))) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "CAN(%d) doesn't exist", can_idx)); - } - - pyb_can_obj_t *self; - if (MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1] == NULL) { - self = m_new_obj(pyb_can_obj_t); - self->base.type = &pyb_can_type; - self->can_id = can_idx; - self->is_enabled = false; - MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1] = self; - } else { - self = MP_STATE_PORT(pyb_can_obj_all)[can_idx - 1]; - } - - if (!self->is_enabled || n_args > 1) { - if (self->is_enabled) { - // The caller is requesting a reconfiguration of the hardware - // this can only be done if the hardware is in init mode - pyb_can_deinit(self); - } - - self->rxcallback0 = mp_const_none; - self->rxcallback1 = mp_const_none; - self->rx_state0 = RX_STATE_FIFO_EMPTY; - self->rx_state1 = RX_STATE_FIFO_EMPTY; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_can_init_helper(self, n_args - 1, args + 1, &kw_args); - } - } - - return self; -} - -STATIC mp_obj_t pyb_can_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_can_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_init_obj, 1, pyb_can_init); - -/// \method deinit() -/// Turn off the CAN bus. -STATIC mp_obj_t pyb_can_deinit(mp_obj_t self_in) { - pyb_can_obj_t *self = self_in; - self->is_enabled = false; - HAL_CAN_DeInit(&self->can); - if (self->can.Instance == CAN1) { - HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn); - HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn); - __CAN1_FORCE_RESET(); - __CAN1_RELEASE_RESET(); - __CAN1_CLK_DISABLE(); - } else if (self->can.Instance == CAN2) { - HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn); - HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn); - __CAN2_FORCE_RESET(); - __CAN2_RELEASE_RESET(); - __CAN2_CLK_DISABLE(); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_can_deinit_obj, pyb_can_deinit); - -/// \method any(fifo) -/// Return `True` if any message waiting on the FIFO, else `False`. -STATIC mp_obj_t pyb_can_any(mp_obj_t self_in, mp_obj_t fifo_in) { - pyb_can_obj_t *self = self_in; - mp_int_t fifo = mp_obj_get_int(fifo_in); - if (fifo == 0) { - if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0) { - return mp_const_true; - } - } else { - if (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0) { - return mp_const_true; - } - } - return mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_any_obj, pyb_can_any); - -/// \method send(send, addr, *, timeout=5000) -/// Send a message on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `addr` is the address to send to -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_can_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_rtr, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - if (bufinfo.len > 8) { - mp_raise_ValueError("CAN data field too long"); - } - - // send the data - CanTxMsgTypeDef tx_msg; - if (self->extframe) { - tx_msg.ExtId = args[1].u_int & 0x1FFFFFFF; - tx_msg.IDE = CAN_ID_EXT; - } else { - tx_msg.StdId = args[1].u_int & 0x7FF; - tx_msg.IDE = CAN_ID_STD; - } - if (args[3].u_bool == false) { - tx_msg.RTR = CAN_RTR_DATA; - } else { - tx_msg.RTR = CAN_RTR_REMOTE; - } - tx_msg.DLC = bufinfo.len; - for (mp_uint_t i = 0; i < bufinfo.len; i++) { - tx_msg.Data[i] = ((byte*)bufinfo.buf)[i]; // Data is uint32_t but holds only 1 byte - } - - self->can.pTxMsg = &tx_msg; - HAL_StatusTypeDef status = CAN_Transmit(&self->can, args[2].u_int); - - if (status != HAL_OK) { - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_send_obj, 1, pyb_can_send); - -/// \method recv(fifo, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `fifo` is an integer, which is the FIFO to receive on -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: buffer of data bytes. -STATIC mp_obj_t pyb_can_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_fifo, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // receive the data - CanRxMsgTypeDef rx_msg; - self->can.pRxMsg = self->can.pRx1Msg = &rx_msg; - HAL_StatusTypeDef status = HAL_CAN_Receive(&self->can, args[0].u_int, args[1].u_int); - - if (status != HAL_OK) { - mp_hal_raise(status); - } - - // Manage the rx state machine - if ((args[0].u_int == CAN_FIFO0 && self->rxcallback0 != mp_const_none) || - (args[0].u_int == CAN_FIFO1 && self->rxcallback1 != mp_const_none)) { - byte *state = (args[0].u_int == CAN_FIFO0) ? &self->rx_state0 : &self->rx_state1; - - switch (*state) { - case RX_STATE_FIFO_EMPTY: - break; - case RX_STATE_MESSAGE_PENDING: - if (__HAL_CAN_MSG_PENDING(&self->can, args[0].u_int) == 0) { - // Fifo is empty - __HAL_CAN_ENABLE_IT(&self->can, (args[0].u_int == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - *state = RX_STATE_FIFO_EMPTY; - } - break; - case RX_STATE_FIFO_FULL: - __HAL_CAN_ENABLE_IT(&self->can, (args[0].u_int == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - *state = RX_STATE_MESSAGE_PENDING; - break; - case RX_STATE_FIFO_OVERFLOW: - __HAL_CAN_ENABLE_IT(&self->can, (args[0].u_int == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_ENABLE_IT(&self->can, (args[0].u_int == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - *state = RX_STATE_MESSAGE_PENDING; - break; - } - } - - // return the received data - // TODO use a namedtuple (when namedtuple types can be stored in ROM) - mp_obj_tuple_t *tuple = mp_obj_new_tuple(4, NULL); - if (rx_msg.IDE == CAN_ID_STD) { - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.StdId); - } else { - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(rx_msg.ExtId); - } - tuple->items[1] = rx_msg.RTR == CAN_RTR_REMOTE ? mp_const_true : mp_const_false; - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(rx_msg.FMI); - vstr_t vstr; - vstr_init_len(&vstr, rx_msg.DLC); - for (mp_uint_t i = 0; i < rx_msg.DLC; i++) { - vstr.buf[i] = rx_msg.Data[i]; // Data is uint32_t but holds only 1 byte - } - tuple->items[3] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - return tuple; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_recv_obj, 1, pyb_can_recv); - -/// \class method initfilterbanks -/// -/// Set up the filterbanks. All filter will be disabled and set to their reset states. -/// -/// - `banks` is an integer that sets how many filter banks that are reserved for CAN1. -/// 0 -> no filters assigned for CAN1 -/// 28 -> all filters are assigned to CAN1 -/// CAN2 will get the rest of the 28 available. -/// -/// Return value: none. -STATIC mp_obj_t pyb_can_initfilterbanks(mp_obj_t self, mp_obj_t bank_in) { - can2_start_bank = mp_obj_get_int(bank_in); - - for (int f = 0; f < 28; f++) { - can_clearfilter(f); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_initfilterbanks_fun_obj, pyb_can_initfilterbanks); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pyb_can_initfilterbanks_obj, (const mp_obj_t)&pyb_can_initfilterbanks_fun_obj); - -STATIC mp_obj_t pyb_can_clearfilter(mp_obj_t self_in, mp_obj_t bank_in) { - pyb_can_obj_t *self = self_in; - mp_int_t f = mp_obj_get_int(bank_in); - if (self->can_id == 2) { - f += can2_start_bank; - } - can_clearfilter(f); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_can_clearfilter_obj, pyb_can_clearfilter); - -/// Configures a filterbank -/// Return value: `None`. -#define EXTENDED_ID_TO_16BIT_FILTER(id) (((id & 0xC00000) >> 13) | ((id & 0x38000) >> 15)) | 8 -STATIC mp_obj_t pyb_can_setfilter(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_bank, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_fifo, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = CAN_FILTER_FIFO0} }, - { MP_QSTR_params, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_rtr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - - // parse args - pyb_can_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - size_t len; - size_t rtr_len; - mp_uint_t rtr_masks[4] = {0, 0, 0, 0}; - mp_obj_t *rtr_flags; - mp_obj_t *params; - mp_obj_get_array(args[3].u_obj, &len, ¶ms); - if (args[4].u_obj != MP_OBJ_NULL){ - mp_obj_get_array(args[4].u_obj, &rtr_len, &rtr_flags); - } - - CAN_FilterConfTypeDef filter; - if (args[1].u_int == MASK16 || args[1].u_int == LIST16) { - if (len != 4) { - goto error; - } - filter.FilterScale = CAN_FILTERSCALE_16BIT; - if (self->extframe) { - if (args[4].u_obj != MP_OBJ_NULL) { - if (args[1].u_int == MASK16) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = 0x02; - rtr_masks[2] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - rtr_masks[3] = 0x02; - } else { // LIST16 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - rtr_masks[2] = mp_obj_get_int(rtr_flags[2]) ? 0x02 : 0; - rtr_masks[3] = mp_obj_get_int(rtr_flags[3]) ? 0x02 : 0; - } - } - filter.FilterIdLow = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[0])) | rtr_masks[0]; // id1 - filter.FilterMaskIdLow = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[1])) | rtr_masks[1]; // mask1 - filter.FilterIdHigh = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[2])) | rtr_masks[2]; // id2 - filter.FilterMaskIdHigh = EXTENDED_ID_TO_16BIT_FILTER(mp_obj_get_int(params[3])) | rtr_masks[3]; // mask2 - } else { // Basic frames - if (args[4].u_obj != MP_OBJ_NULL) { - if (args[1].u_int == MASK16) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x10 : 0; - rtr_masks[1] = 0x10; - rtr_masks[2] = mp_obj_get_int(rtr_flags[1]) ? 0x10 : 0; - rtr_masks[3] = 0x10; - } else { // LIST16 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x10 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x10 : 0; - rtr_masks[2] = mp_obj_get_int(rtr_flags[2]) ? 0x10 : 0; - rtr_masks[3] = mp_obj_get_int(rtr_flags[3]) ? 0x10 : 0; - } - } - filter.FilterIdLow = (mp_obj_get_int(params[0]) << 5) | rtr_masks[0]; // id1 - filter.FilterMaskIdLow = (mp_obj_get_int(params[1]) << 5) | rtr_masks[1]; // mask1 - filter.FilterIdHigh = (mp_obj_get_int(params[2]) << 5) | rtr_masks[2]; // id2 - filter.FilterMaskIdHigh = (mp_obj_get_int(params[3]) << 5) | rtr_masks[3]; // mask2 - } - if (args[1].u_int == MASK16) { - filter.FilterMode = CAN_FILTERMODE_IDMASK; - } - if (args[1].u_int == LIST16) { - filter.FilterMode = CAN_FILTERMODE_IDLIST; - } - } - else if (args[1].u_int == MASK32 || args[1].u_int == LIST32) { - if (len != 2) { - goto error; - } - filter.FilterScale = CAN_FILTERSCALE_32BIT; - if (args[4].u_obj != MP_OBJ_NULL) { - if (args[1].u_int == MASK32) { - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = 0x02; - } else { // LIST32 - rtr_masks[0] = mp_obj_get_int(rtr_flags[0]) ? 0x02 : 0; - rtr_masks[1] = mp_obj_get_int(rtr_flags[1]) ? 0x02 : 0; - } - } - filter.FilterIdHigh = (mp_obj_get_int(params[0]) & 0x1FFFE000) >> 13; - filter.FilterIdLow = (((mp_obj_get_int(params[0]) & 0x00001FFF) << 3) | 4) | rtr_masks[0]; - filter.FilterMaskIdHigh = (mp_obj_get_int(params[1]) & 0x1FFFE000 ) >> 13; - filter.FilterMaskIdLow = (((mp_obj_get_int(params[1]) & 0x00001FFF) << 3) | 4) | rtr_masks[1]; - if (args[1].u_int == MASK32) { - filter.FilterMode = CAN_FILTERMODE_IDMASK; - } - if (args[1].u_int == LIST32) { - filter.FilterMode = CAN_FILTERMODE_IDLIST; - } - } else { - goto error; - } - - filter.FilterFIFOAssignment = args[2].u_int; // fifo - filter.FilterNumber = args[0].u_int; // bank - if (self->can_id == 1) { - if (filter.FilterNumber >= can2_start_bank) { - goto error; - } - } else { - filter.FilterNumber = filter.FilterNumber + can2_start_bank; - if (filter.FilterNumber > 27) { - goto error; - } - } - filter.FilterActivation = ENABLE; - filter.BankNumber = can2_start_bank; - HAL_CAN_ConfigFilter(&self->can, &filter); - - return mp_const_none; - -error: - mp_raise_ValueError("CAN filter parameter error"); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_can_setfilter_obj, 1, pyb_can_setfilter); - -STATIC mp_obj_t pyb_can_rxcallback(mp_obj_t self_in, mp_obj_t fifo_in, mp_obj_t callback_in) { - pyb_can_obj_t *self = self_in; - mp_int_t fifo = mp_obj_get_int(fifo_in); - mp_obj_t *callback; - - callback = (fifo == 0) ? &self->rxcallback0 : &self->rxcallback1; - if (callback_in == mp_const_none) { - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_DISABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1); - *callback = mp_const_none; - } else if (*callback != mp_const_none) { - // Rx call backs has already been initialized - // only the callback function should be changed - *callback = callback_in; - } else if (mp_obj_is_callable(callback_in)) { - *callback = callback_in; - uint32_t irq; - if (self->can_id == PYB_CAN_1) { - irq = (fifo == 0) ? CAN1_RX0_IRQn : CAN1_RX1_IRQn; - } else { - irq = (fifo == 0) ? CAN2_RX0_IRQn : CAN2_RX1_IRQn; - } - HAL_NVIC_SetPriority(irq, IRQ_PRI_CAN, IRQ_SUBPRI_CAN); - HAL_NVIC_EnableIRQ(irq); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_ENABLE_IT(&self->can, (fifo == 0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_can_rxcallback_obj, pyb_can_rxcallback); - -STATIC const mp_rom_map_elem_t pyb_can_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_can_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_can_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_can_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_can_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_can_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_initfilterbanks), MP_ROM_PTR(&pyb_can_initfilterbanks_obj) }, - { MP_ROM_QSTR(MP_QSTR_setfilter), MP_ROM_PTR(&pyb_can_setfilter_obj) }, - { MP_ROM_QSTR(MP_QSTR_clearfilter), MP_ROM_PTR(&pyb_can_clearfilter_obj) }, - { MP_ROM_QSTR(MP_QSTR_rxcallback), MP_ROM_PTR(&pyb_can_rxcallback_obj) }, - - // class constants - // Note: we use the ST constants >> 4 so they fit in a small-int. The - // right-shift is undone when the constants are used in the init function. - { MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(CAN_MODE_NORMAL >> 4) }, - { MP_ROM_QSTR(MP_QSTR_LOOPBACK), MP_ROM_INT(CAN_MODE_LOOPBACK >> 4) }, - { MP_ROM_QSTR(MP_QSTR_SILENT), MP_ROM_INT(CAN_MODE_SILENT >> 4) }, - { MP_ROM_QSTR(MP_QSTR_SILENT_LOOPBACK), MP_ROM_INT(CAN_MODE_SILENT_LOOPBACK >> 4) }, - { MP_ROM_QSTR(MP_QSTR_MASK16), MP_ROM_INT(MASK16) }, - { MP_ROM_QSTR(MP_QSTR_LIST16), MP_ROM_INT(LIST16) }, - { MP_ROM_QSTR(MP_QSTR_MASK32), MP_ROM_INT(MASK32) }, - { MP_ROM_QSTR(MP_QSTR_LIST32), MP_ROM_INT(LIST32) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_can_locals_dict, pyb_can_locals_dict_table); - -mp_uint_t can_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_can_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) - && ((__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO0) != 0) - || (__HAL_CAN_MSG_PENDING(&self->can, CAN_FIFO1) != 0))) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && (self->can.Instance->TSR & CAN_TSR_TME)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = -1; - } - return ret; -} - -void can_rx_irq_handler(uint can_id, uint fifo_id) { - mp_obj_t callback; - pyb_can_obj_t *self; - mp_obj_t irq_reason = MP_OBJ_NEW_SMALL_INT(0); - byte *state; - - self = MP_STATE_PORT(pyb_can_obj_all)[can_id - 1]; - - if (fifo_id == CAN_FIFO0) { - callback = self->rxcallback0; - state = &self->rx_state0; - } else { - callback = self->rxcallback1; - state = &self->rx_state1; - } - - switch (*state) { - case RX_STATE_FIFO_EMPTY: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FMP0 : CAN_IT_FMP1); - irq_reason = MP_OBJ_NEW_SMALL_INT(0); - *state = RX_STATE_MESSAGE_PENDING; - break; - case RX_STATE_MESSAGE_PENDING: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FF0 : CAN_IT_FF1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FF0 : CAN_FLAG_FF1); - irq_reason = MP_OBJ_NEW_SMALL_INT(1); - *state = RX_STATE_FIFO_FULL; - break; - case RX_STATE_FIFO_FULL: - __HAL_CAN_DISABLE_IT(&self->can, (fifo_id == CAN_FIFO0) ? CAN_IT_FOV0 : CAN_IT_FOV1); - __HAL_CAN_CLEAR_FLAG(&self->can, (fifo_id == CAN_FIFO0) ? CAN_FLAG_FOV0 : CAN_FLAG_FOV1); - irq_reason = MP_OBJ_NEW_SMALL_INT(2); - *state = RX_STATE_FIFO_OVERFLOW; - break; - case RX_STATE_FIFO_OVERFLOW: - // This should never happen - break; - } - - if (callback != mp_const_none) { - mp_sched_lock(); - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_2(callback, self, irq_reason); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - pyb_can_rxcallback(self, MP_OBJ_NEW_SMALL_INT(fifo_id), mp_const_none); - printf("uncaught exception in CAN(%u) rx interrupt handler\n", self->can_id); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } -} - -STATIC const mp_stream_p_t can_stream_p = { - //.read = can_read, // is read sensible for CAN? - //.write = can_write, // is write sensible for CAN? - .ioctl = can_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_can_type = { - { &mp_type_type }, - .name = MP_QSTR_CAN, - .print = pyb_can_print, - .make_new = pyb_can_make_new, - .protocol = &can_stream_p, - .locals_dict = (mp_obj_t)&pyb_can_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_CAN diff --git a/ports/stm32/can.h b/ports/stm32/can.h deleted file mode 100644 index 86001281390a4..0000000000000 --- a/ports/stm32/can.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_CAN_H -#define MICROPY_INCLUDED_STMHAL_CAN_H - -#define PYB_CAN_1 (1) -#define PYB_CAN_2 (2) - -extern const mp_obj_type_t pyb_can_type; - -void can_init0(void); -void can_deinit(void); -void can_rx_irq_handler(uint can_id, uint fifo_id); - -#endif // MICROPY_INCLUDED_STMHAL_CAN_H diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c deleted file mode 100644 index 268b1bcfb639a..0000000000000 --- a/ports/stm32/dac.c +++ /dev/null @@ -1,506 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "timer.h" -#include "dac.h" -#include "dma.h" -#include "pin.h" -#include "genhdr/pins.h" - -/// \moduleref pyb -/// \class DAC - digital to analog conversion -/// -/// The DAC is used to output analog values (a specific voltage) on pin X5 or pin X6. -/// The voltage will be between 0 and 3.3V. -/// -/// *This module will undergo changes to the API.* -/// -/// Example usage: -/// -/// from pyb import DAC -/// -/// dac = DAC(1) # create DAC 1 on pin X5 -/// dac.write(128) # write a value to the DAC (makes X5 1.65V) -/// -/// To output a continuous sine-wave: -/// -/// import math -/// from pyb import DAC -/// -/// # create a buffer containing a sine-wave -/// buf = bytearray(100) -/// for i in range(len(buf)): -/// buf[i] = 128 + int(127 * math.sin(2 * math.pi * i / len(buf))) -/// -/// # output the sine-wave at 400Hz -/// dac = DAC(1) -/// dac.write_timed(buf, 400 * len(buf), mode=DAC.CIRCULAR) - -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC - -STATIC DAC_HandleTypeDef DAC_Handle; - -void dac_init(void) { - memset(&DAC_Handle, 0, sizeof DAC_Handle); - DAC_Handle.Instance = DAC; - DAC_Handle.State = HAL_DAC_STATE_RESET; - HAL_DAC_Init(&DAC_Handle); -} - -#if defined(TIM6) -STATIC void TIM6_Config(uint freq) { - // Init TIM6 at the required frequency (in Hz) - TIM_HandleTypeDef *tim = timer_tim6_init(freq); - - // TIM6 TRGO selection - TIM_MasterConfigTypeDef config; - config.MasterOutputTrigger = TIM_TRGO_UPDATE; - config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(tim, &config); - - // TIM6 start counter - HAL_TIM_Base_Start(tim); -} -#endif - -STATIC uint32_t TIMx_Config(mp_obj_t timer) { - // TRGO selection to trigger DAC - TIM_HandleTypeDef *tim = pyb_timer_get_handle(timer); - TIM_MasterConfigTypeDef config; - config.MasterOutputTrigger = TIM_TRGO_UPDATE; - config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(tim, &config); - - // work out the trigger channel (only certain ones are supported) - if (tim->Instance == TIM2) { - return DAC_TRIGGER_T2_TRGO; - } else if (tim->Instance == TIM4) { - return DAC_TRIGGER_T4_TRGO; - } else if (tim->Instance == TIM5) { - return DAC_TRIGGER_T5_TRGO; - #if defined(TIM6) - } else if (tim->Instance == TIM6) { - return DAC_TRIGGER_T6_TRGO; - #endif - #if defined(TIM7) - } else if (tim->Instance == TIM7) { - return DAC_TRIGGER_T7_TRGO; - #endif - #if defined(TIM8) - } else if (tim->Instance == TIM8) { - return DAC_TRIGGER_T8_TRGO; - #endif - } else { - mp_raise_ValueError("Timer does not support DAC triggering"); - } -} - -/******************************************************************************/ -// MicroPython bindings - -typedef enum { - DAC_STATE_RESET, - DAC_STATE_WRITE_SINGLE, - DAC_STATE_BUILTIN_WAVEFORM, - DAC_STATE_DMA_WAVEFORM, // should be last enum since we use space beyond it -} pyb_dac_state_t; - -typedef struct _pyb_dac_obj_t { - mp_obj_base_t base; - uint32_t dac_channel; // DAC_CHANNEL_1 or DAC_CHANNEL_2 - const dma_descr_t *tx_dma_descr; - uint16_t pin; // GPIO_PIN_4 or GPIO_PIN_5 - uint8_t bits; // 8 or 12 - uint8_t state; -} pyb_dac_obj_t; - -STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // GPIO configuration - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = self->pin; - GPIO_InitStructure.Mode = GPIO_MODE_ANALOG; - GPIO_InitStructure.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); - - // DAC peripheral clock - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - __DAC_CLK_ENABLE(); - #elif defined(MCU_SERIES_L4) - __HAL_RCC_DAC1_CLK_ENABLE(); - #else - #error Unsupported Processor - #endif - - // stop anything already going on - __DMA1_CLK_ENABLE(); - DMA_HandleTypeDef DMA_Handle; - /* Get currently configured dma */ - dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL); - // Need to deinit DMA first - DMA_Handle.State = HAL_DMA_STATE_READY; - HAL_DMA_DeInit(&DMA_Handle); - - HAL_DAC_Stop(&DAC_Handle, self->dac_channel); - if ((self->dac_channel == DAC_CHANNEL_1 && DAC_Handle.DMA_Handle1 != NULL) - || (self->dac_channel == DAC_CHANNEL_2 && DAC_Handle.DMA_Handle2 != NULL)) { - HAL_DAC_Stop_DMA(&DAC_Handle, self->dac_channel); - } - - // set bit resolution - if (args[0].u_int == 8 || args[0].u_int == 12) { - self->bits = args[0].u_int; - } else { - mp_raise_ValueError("unsupported bits"); - } - - // reset state of DAC - self->state = DAC_STATE_RESET; - - return mp_const_none; -} - -// create the dac object -// currently support either DAC1 on X5 (id = 1) or DAC2 on X6 (id = 2) - -/// \classmethod \constructor(port) -/// Construct a new DAC object. -/// -/// `port` can be a pin object, or an integer (1 or 2). -/// DAC(1) is on pin X5 and DAC(2) is on pin X6. -STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get pin/channel to output on - mp_int_t dac_id; - if (MP_OBJ_IS_INT(args[0])) { - dac_id = mp_obj_get_int(args[0]); - } else { - const pin_obj_t *pin = pin_find(args[0]); - if (pin == &pin_A4) { - dac_id = 1; - } else if (pin == &pin_A5) { - dac_id = 2; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have DAC capabilities", pin->name)); - } - } - - pyb_dac_obj_t *dac = m_new_obj(pyb_dac_obj_t); - dac->base.type = &pyb_dac_type; - - if (dac_id == 1) { - dac->pin = GPIO_PIN_4; - dac->dac_channel = DAC_CHANNEL_1; - dac->tx_dma_descr = &dma_DAC_1_TX; - } else if (dac_id == 2) { - dac->pin = GPIO_PIN_5; - dac->dac_channel = DAC_CHANNEL_2; - dac->tx_dma_descr = &dma_DAC_2_TX; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC(%d) doesn't exist", dac_id)); - } - - // configure the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_dac_init_helper(dac, n_args - 1, args + 1, &kw_args); - - // return object - return dac; -} - -STATIC mp_obj_t pyb_dac_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_dac_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_init_obj, 1, pyb_dac_init); - -/// \method deinit() -/// Turn off the DAC, enable other use of pin. -STATIC mp_obj_t pyb_dac_deinit(mp_obj_t self_in) { - pyb_dac_obj_t *self = self_in; - if (self->dac_channel == DAC_CHANNEL_1) { - DAC_Handle.Instance->CR &= ~DAC_CR_EN1; - DAC_Handle.Instance->CR |= DAC_CR_BOFF1; - } else { - DAC_Handle.Instance->CR &= ~DAC_CR_EN2; - DAC_Handle.Instance->CR |= DAC_CR_BOFF2; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_dac_deinit_obj, pyb_dac_deinit); - -#if defined(TIM6) -/// \method noise(freq) -/// Generate a pseudo-random noise signal. A new random sample is written -/// to the DAC output at the given frequency. -STATIC mp_obj_t pyb_dac_noise(mp_obj_t self_in, mp_obj_t freq) { - pyb_dac_obj_t *self = self_in; - - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(freq)); - - if (self->state != DAC_STATE_BUILTIN_WAVEFORM) { - // configure DAC to trigger via TIM6 - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_T6_TRGO; - config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_BUILTIN_WAVEFORM; - } - - // set noise wave generation - HAL_DACEx_NoiseWaveGenerate(&DAC_Handle, self->dac_channel, DAC_LFSRUNMASK_BITS10_0); - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_L, 0x7ff0); - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_noise_obj, pyb_dac_noise); -#endif - -#if defined(TIM6) -/// \method triangle(freq) -/// Generate a triangle wave. The value on the DAC output changes at -/// the given frequency, and the frequence of the repeating triangle wave -/// itself is 256 (or 1024, need to check) times smaller. -STATIC mp_obj_t pyb_dac_triangle(mp_obj_t self_in, mp_obj_t freq) { - pyb_dac_obj_t *self = self_in; - - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(freq)); - - if (self->state != DAC_STATE_BUILTIN_WAVEFORM) { - // configure DAC to trigger via TIM6 - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_T6_TRGO; - config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_BUILTIN_WAVEFORM; - } - - // set triangle wave generation - HAL_DACEx_TriangleWaveGenerate(&DAC_Handle, self->dac_channel, DAC_TRIANGLEAMPLITUDE_1023); - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R, 0x100); - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_triangle_obj, pyb_dac_triangle); -#endif - -/// \method write(value) -/// Direct access to the DAC output (8 bit only at the moment). -STATIC mp_obj_t pyb_dac_write(mp_obj_t self_in, mp_obj_t val) { - pyb_dac_obj_t *self = self_in; - - if (self->state != DAC_STATE_WRITE_SINGLE) { - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = DAC_TRIGGER_NONE; - config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_WRITE_SINGLE; - } - - // DAC output is always 12-bit at the hardware level, and we provide support - // for multiple bit "resolutions" simply by shifting the input value. - HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R, - mp_obj_get_int(val) << (12 - self->bits)); - - HAL_DAC_Start(&DAC_Handle, self->dac_channel); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_write_obj, pyb_dac_write); - -#if defined(TIM6) -/// \method write_timed(data, freq, *, mode=DAC.NORMAL) -/// Initiates a burst of RAM to DAC using a DMA transfer. -/// The input data is treated as an array of bytes (8 bit data). -/// -/// `freq` can be an integer specifying the frequency to write the DAC -/// samples at, using Timer(6). Or it can be an already-initialised -/// Timer object which is used to trigger the DAC sample. Valid timers -/// are 2, 4, 5, 6, 7 and 8. -/// -/// `mode` can be `DAC.NORMAL` or `DAC.CIRCULAR`. -/// -// TODO add callback argument, to call when transfer is finished -// TODO add double buffer argument -// -// TODO reconsider API, eg: write_trig(data, *, trig=None, loop=False) -// Then trigger can be timer (preinitialised with desired freq) or pin (extint9), -// and we can reuse the same timer for both DACs (and maybe also ADC) without -// setting the freq twice. -// Can still do 1-liner: dac.write_trig(buf, trig=Timer(6, freq=100), loop=True) -mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DMA_NORMAL} }, - }; - - // parse args - pyb_dac_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the data to write - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[0].u_obj, &bufinfo, MP_BUFFER_READ); - - uint32_t dac_trigger; - if (mp_obj_is_integer(args[1].u_obj)) { - // set TIM6 to trigger the DAC at the given frequency - TIM6_Config(mp_obj_get_int(args[1].u_obj)); - dac_trigger = DAC_TRIGGER_T6_TRGO; - } else { - // set the supplied timer to trigger the DAC (timer should be initialised) - dac_trigger = TIMx_Config(args[1].u_obj); - } - - __DMA1_CLK_ENABLE(); - - DMA_HandleTypeDef DMA_Handle; - /* Get currently configured dma */ - dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL); - /* - DMA_Cmd(DMA_Handle->Instance, DISABLE); - while (DMA_GetCmdStatus(DMA_Handle->Instance) != DISABLE) { - } - - DAC_Cmd(self->dac_channel, DISABLE); - */ - - /* - // DAC channel configuration - DAC_InitTypeDef DAC_InitStructure; - DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO; - DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; - DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_TriangleAmplitude_1; // unused, but need to set it to a valid value - DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; - DAC_Init(self->dac_channel, &DAC_InitStructure); - */ - - // Need to deinit DMA first - DMA_Handle.State = HAL_DMA_STATE_READY; - HAL_DMA_DeInit(&DMA_Handle); - - if (self->bits == 8) { - DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - } else { - DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; - DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; - } - DMA_Handle.Init.Mode = args[2].u_int; - HAL_DMA_Init(&DMA_Handle); - - if (self->dac_channel == DAC_CHANNEL_1) { - __HAL_LINKDMA(&DAC_Handle, DMA_Handle1, DMA_Handle); - } else { - __HAL_LINKDMA(&DAC_Handle, DMA_Handle2, DMA_Handle); - } - - DAC_Handle.Instance = DAC; - DAC_Handle.State = HAL_DAC_STATE_RESET; - HAL_DAC_Init(&DAC_Handle); - - if (self->state != DAC_STATE_DMA_WAVEFORM + dac_trigger) { - DAC_ChannelConfTypeDef config; - config.DAC_Trigger = dac_trigger; - config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; - HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel); - self->state = DAC_STATE_DMA_WAVEFORM + dac_trigger; - } - - if (self->bits == 8) { - HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel, - (uint32_t*)bufinfo.buf, bufinfo.len, DAC_ALIGN_8B_R); - } else { - HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel, - (uint32_t*)bufinfo.buf, bufinfo.len / 2, DAC_ALIGN_12B_R); - } - - /* - // enable DMA stream - DMA_Cmd(DMA_Handle->Instance, ENABLE); - while (DMA_GetCmdStatus(DMA_Handle->Instance) == DISABLE) { - } - - // enable DAC channel - DAC_Cmd(self->dac_channel, ENABLE); - - // enable DMA for DAC channel - DAC_DMACmd(self->dac_channel, ENABLE); - */ - - //printf("DMA: %p %lu\n", bufinfo.buf, bufinfo.len); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_write_timed_obj, 1, pyb_dac_write_timed); -#endif - -STATIC const mp_rom_map_elem_t pyb_dac_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_dac_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_dac_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_dac_write_obj) }, - #if defined(TIM6) - { MP_ROM_QSTR(MP_QSTR_noise), MP_ROM_PTR(&pyb_dac_noise_obj) }, - { MP_ROM_QSTR(MP_QSTR_triangle), MP_ROM_PTR(&pyb_dac_triangle_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&pyb_dac_write_timed_obj) }, - #endif - - // class constants - { MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(DMA_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_CIRCULAR), MP_ROM_INT(DMA_CIRCULAR) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_dac_locals_dict, pyb_dac_locals_dict_table); - -const mp_obj_type_t pyb_dac_type = { - { &mp_type_type }, - .name = MP_QSTR_DAC, - .make_new = pyb_dac_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_dac_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_DAC diff --git a/ports/stm32/dac.h b/ports/stm32/dac.h deleted file mode 100644 index f487f52a92fe3..0000000000000 --- a/ports/stm32/dac.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_DAC_H -#define MICROPY_INCLUDED_STMHAL_DAC_H - -void dac_init(void); - -extern const mp_obj_type_t pyb_dac_type; - -#endif // MICROPY_INCLUDED_STMHAL_DAC_H diff --git a/ports/stm32/dma.c b/ports/stm32/dma.c deleted file mode 100644 index df6275d652ce9..0000000000000 --- a/ports/stm32/dma.c +++ /dev/null @@ -1,508 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/obj.h" -#include "dma.h" -#include "irq.h" - -typedef enum { - dma_id_not_defined=-1, - dma_id_0, - dma_id_1, - dma_id_2, - dma_id_3, - dma_id_4, - dma_id_5, - dma_id_6, - dma_id_7, - dma_id_8, - dma_id_9, - dma_id_10, - dma_id_11, - dma_id_12, - dma_id_13, - dma_id_14, - dma_id_15, -} dma_id_t; - -typedef struct _dma_descr_t { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - DMA_Stream_TypeDef *instance; - #elif defined(MCU_SERIES_L4) - DMA_Channel_TypeDef *instance; - #else - #error "Unsupported Processor" - #endif - uint32_t sub_instance; - uint32_t transfer_direction; // periph to memory or vice-versa - dma_id_t id; - const DMA_InitTypeDef *init; -} dma_descr_t; - -// Default parameters to dma_init() shared by spi and i2c; Channel and Direction -// vary depending on the peripheral instance so they get passed separately -static const DMA_InitTypeDef dma_init_struct_spi_i2c = { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .Channel = 0, - #elif defined(MCU_SERIES_L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_BYTE, - .MemDataAlignment = DMA_MDATAALIGN_BYTE, - .Mode = DMA_NORMAL, - .Priority = DMA_PRIORITY_LOW, - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .FIFOMode = DMA_FIFOMODE_DISABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL, - .MemBurst = DMA_MBURST_INC4, - .PeriphBurst = DMA_PBURST_INC4 - #endif -}; - -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -// Parameters to dma_init() for SDIO tx and rx. -static const DMA_InitTypeDef dma_init_struct_sdio = { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .Channel = 0, - #elif defined(MCU_SERIES_L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_WORD, - .MemDataAlignment = DMA_MDATAALIGN_WORD, - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .Mode = DMA_PFCTRL, - #elif defined(MCU_SERIES_L4) - .Mode = DMA_NORMAL, - #endif - .Priority = DMA_PRIORITY_VERY_HIGH, - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .FIFOMode = DMA_FIFOMODE_ENABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL, - .MemBurst = DMA_MBURST_INC4, - .PeriphBurst = DMA_PBURST_INC4, - #endif -}; -#endif - -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC -// Default parameters to dma_init() for DAC tx -static const DMA_InitTypeDef dma_init_struct_dac = { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .Channel = 0, - #elif defined(MCU_SERIES_L4) - .Request = 0, - #endif - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_BYTE, - .MemDataAlignment = DMA_MDATAALIGN_BYTE, - .Mode = DMA_NORMAL, - .Priority = DMA_PRIORITY_HIGH, - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - .FIFOMode = DMA_FIFOMODE_DISABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL, - .MemBurst = DMA_MBURST_SINGLE, - .PeriphBurst = DMA_PBURST_SINGLE, - #endif -}; -#endif - -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (8) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_channel) (((dma_channel) & DMA_SxCR_CHSEL) >> 25) - -#define DMA1_ENABLE_MASK (0x00ff) // Bits in dma_enable_mask corresponding to DMA1 -#define DMA2_ENABLE_MASK (0xff00) // Bits in dma_enable_mask corresponding to DMA2 - -// These descriptors are ordered by DMAx_Stream number, and within a stream by channel -// number. The duplicate streams are ok as long as they aren't used at the same time. -// -// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit -// around each transfer. - -// DMA1 streams -const dma_descr_t dma_I2C_1_RX = { DMA1_Stream0, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_3_RX = { DMA1_Stream2, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#if defined(MCU_SERIES_F7) -const dma_descr_t dma_I2C_4_RX = { DMA1_Stream2, DMA_CHANNEL_2, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#endif -const dma_descr_t dma_I2C_3_RX = { DMA1_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_RX = { DMA1_Stream2, DMA_CHANNEL_7, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_RX = { DMA1_Stream3, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_2_TX = { DMA1_Stream4, DMA_CHANNEL_0, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_TX = { DMA1_Stream4, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -#if defined(MCU_SERIES_F7) -const dma_descr_t dma_I2C_4_TX = { DMA1_Stream5, DMA_CHANNEL_2, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c }; -#endif -#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Stream5, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_dac }; -const dma_descr_t dma_DAC_2_TX = { DMA1_Stream6, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_6, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_3_TX = { DMA1_Stream7, DMA_CHANNEL_0, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Stream7, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_TX = { DMA1_Stream7, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_7, &dma_init_struct_spi_i2c }; -/* not preferred streams -const dma_descr_t dma_SPI_3_RX = { DMA1_Stream0, DMA_CHANNEL_0, DMA_PERIPH_TO_MEMORY, dma_id_0, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Stream6, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_6, &dma_init_struct_spi_i2c }; -*/ - -// DMA2 streams -#if defined(MCU_SERIES_F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDMMC_2_RX= { DMA2_Stream0, DMA_CHANNEL_11, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_1_RX = { DMA2_Stream2, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_RX = { DMA2_Stream3, DMA_CHANNEL_2, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDIO_0_RX= { DMA2_Stream3, DMA_CHANNEL_4, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_4_RX = { DMA2_Stream3, DMA_CHANNEL_5, DMA_PERIPH_TO_MEMORY, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_TX = { DMA2_Stream4, DMA_CHANNEL_2, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_TX = { DMA2_Stream4, DMA_CHANNEL_5, DMA_MEMORY_TO_PERIPH, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_6_TX = { DMA2_Stream5, DMA_CHANNEL_1, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_1_TX = { DMA2_Stream5, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -#if defined(MCU_SERIES_F7) && defined(SDMMC2) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDMMC_2_TX= { DMA2_Stream5, DMA_CHANNEL_11, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_sdio }; -#endif -const dma_descr_t dma_SPI_6_RX = { DMA2_Stream6, DMA_CHANNEL_1, DMA_PERIPH_TO_MEMORY, dma_id_14, &dma_init_struct_spi_i2c }; -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -const dma_descr_t dma_SDIO_0_TX= { DMA2_Stream6, DMA_CHANNEL_4, DMA_MEMORY_TO_PERIPH, dma_id_14, &dma_init_struct_sdio }; -#endif -/* not preferred streams -const dma_descr_t dma_SPI_1_TX = { DMA2_Stream3, DMA_CHANNEL_3, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_1_RX = { DMA2_Stream0, DMA_CHANNEL_3, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_RX = { DMA2_Stream0, DMA_CHANNEL_4, DMA_PERIPH_TO_MEMORY, dma_id_8, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_4_TX = { DMA2_Stream1, DMA_CHANNEL_4, DMA_MEMORY_TO_PERIPH, dma_id_9, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_RX = { DMA2_Stream5, DMA_CHANNEL_7, DMA_PERIPH_TO_MEMORY, dma_id_13, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_5_TX = { DMA2_Stream6, DMA_CHANNEL_7, DMA_MEMORY_TO_PERIPH, dma_id_14, &dma_init_struct_spi_i2c }; -*/ - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Stream0_IRQn, - DMA1_Stream1_IRQn, - DMA1_Stream2_IRQn, - DMA1_Stream3_IRQn, - DMA1_Stream4_IRQn, - DMA1_Stream5_IRQn, - DMA1_Stream6_IRQn, - DMA1_Stream7_IRQn, - DMA2_Stream0_IRQn, - DMA2_Stream1_IRQn, - DMA2_Stream2_IRQn, - DMA2_Stream3_IRQn, - DMA2_Stream4_IRQn, - DMA2_Stream5_IRQn, - DMA2_Stream6_IRQn, - DMA2_Stream7_IRQn, -}; - -#elif defined(MCU_SERIES_L4) - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (7) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_request) (dma_request) - -#define DMA1_ENABLE_MASK (0x007f) // Bits in dma_enable_mask corresponfing to DMA1 -#define DMA2_ENABLE_MASK (0x3f80) // Bits in dma_enable_mask corresponding to DMA2 - -// These descriptors are ordered by DMAx_Channel number, and within a channel by request -// number. The duplicate streams are ok as long as they aren't used at the same time. - -// DMA1 streams -//const dma_descr_t dma_ADC_1_RX = { DMA1_Channel1, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_0, NULL }; // unused -//const dma_descr_t dma_ADC_2_RX = { DMA1_Channel2, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_1, NULL }; // unused -const dma_descr_t dma_SPI_1_RX = { DMA1_Channel2, DMA_REQUEST_1, DMA_PERIPH_TO_MEMORY, dma_id_1, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_TX = { DMA1_Channel2, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_1, &dma_init_struct_spi_i2c }; -//const dma_descr_t dma_ADC_3_RX = { DMA1_Channel3, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_2, NULL }; // unused -const dma_descr_t dma_SPI_1_TX = { DMA1_Channel3, DMA_REQUEST_1, DMA_MEMORY_TO_PERIPH, dma_id_2, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_3_RX = { DMA1_Channel3, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_2, &dma_init_struct_spi_i2c }; -#if MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_1_TX = { DMA1_Channel3, DMA_REQUEST_6, DMA_MEMORY_TO_PERIPH, dma_id_2, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_2_RX = { DMA1_Channel4, DMA_REQUEST_1, DMA_PERIPH_TO_MEMORY, dma_id_3, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_TX = { DMA1_Channel4, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_3, &dma_init_struct_spi_i2c }; -#if MICROPY_HW_ENABLE_DAC -const dma_descr_t dma_DAC_2_TX = { DMA1_Channel4, DMA_REQUEST_5, DMA_MEMORY_TO_PERIPH, dma_id_3, &dma_init_struct_dac }; -#endif -const dma_descr_t dma_SPI_2_TX = { DMA1_Channel5, DMA_REQUEST_1, DMA_MEMORY_TO_PERIPH, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_2_RX = { DMA1_Channel5, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_4, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA1_Channel6, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_5, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_RX = { DMA1_Channel7, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_6, &dma_init_struct_spi_i2c }; - -// DMA2 streams -const dma_descr_t dma_SPI_3_RX = { DMA2_Channel1, DMA_REQUEST_3, DMA_PERIPH_TO_MEMORY, dma_id_7, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_SPI_3_TX = { DMA2_Channel2, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_8, &dma_init_struct_spi_i2c }; -/* not preferred streams -const dma_descr_t dma_ADC_1_RX = { DMA2_Channel3, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_9, NULL }; -const dma_descr_t dma_SPI_1_RX = { DMA2_Channel3, DMA_REQUEST_4, DMA_PERIPH_TO_MEMORY, dma_id_9, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_ADC_2_RX = { DMA2_Channel4, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_10, NULL }; -const dma_descr_t dma_DAC_1_TX = { DMA2_Channel4, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_dac }; -const dma_descr_t dma_SPI_1_TX = { DMA2_Channel4, DMA_REQUEST_4, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_spi_i2c }; -*/ -#if defined(MICROPY_HW_HAS_SDCARD) && MICROPY_HW_HAS_SDCARD -// defined twice as L4 HAL only needs one channel and can correctly switch direction but sdcard.c needs two channels -const dma_descr_t dma_SDIO_0_TX= { DMA2_Channel4, DMA_REQUEST_7, DMA_MEMORY_TO_PERIPH, dma_id_10, &dma_init_struct_sdio }; -const dma_descr_t dma_SDIO_0_RX= { DMA2_Channel4, DMA_REQUEST_7, DMA_PERIPH_TO_MEMORY, dma_id_10, &dma_init_struct_sdio }; -#endif -/* not preferred streams -const dma_descr_t dma_ADC_3_RX = { DMA2_Channel5, DMA_REQUEST_0, DMA_PERIPH_TO_MEMORY, dma_id_11, NULL }; -const dma_descr_t dma_DAC_2_TX = { DMA2_Channel5, DMA_REQUEST_3, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_dac }; -const dma_descr_t dma_SDIO_0_TX= { DMA2_Channel5, DMA_REQUEST_7, DMA_MEMORY_TO_PERIPH, dma_id_11, &dma_init_struct_sdio }; -const dma_descr_t dma_I2C_1_RX = { DMA2_Channel6, DMA_REQUEST_5, DMA_PERIPH_TO_MEMORY, dma_id_12, &dma_init_struct_spi_i2c }; -const dma_descr_t dma_I2C_1_TX = { DMA2_Channel7, DMA_REQUEST_5, DMA_MEMORY_TO_PERIPH, dma_id_13, &dma_init_struct_spi_i2c }; -*/ - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Channel1_IRQn, - DMA1_Channel2_IRQn, - DMA1_Channel3_IRQn, - DMA1_Channel4_IRQn, - DMA1_Channel5_IRQn, - DMA1_Channel6_IRQn, - DMA1_Channel7_IRQn, - DMA2_Channel1_IRQn, - DMA2_Channel2_IRQn, - DMA2_Channel3_IRQn, - DMA2_Channel4_IRQn, - DMA2_Channel5_IRQn, - DMA2_Channel6_IRQn, - DMA2_Channel7_IRQn, -}; - -#endif - -static DMA_HandleTypeDef *dma_handle[NSTREAM] = {NULL}; -static uint8_t dma_last_sub_instance[NSTREAM]; -static volatile uint32_t dma_enable_mask = 0; -volatile dma_idle_count_t dma_idle; - -#define DMA_INVALID_CHANNEL 0xff // Value stored in dma_last_channel which means invalid - -#define DMA1_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA1EN) != 0) -#define DMA2_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA2EN) != 0) - -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - -void DMA1_Stream0_IRQHandler(void) { IRQ_ENTER(DMA1_Stream0_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Stream0_IRQn); } -void DMA1_Stream1_IRQHandler(void) { IRQ_ENTER(DMA1_Stream1_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Stream1_IRQn); } -void DMA1_Stream2_IRQHandler(void) { IRQ_ENTER(DMA1_Stream2_IRQn); if (dma_handle[dma_id_2] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_2]); } IRQ_EXIT(DMA1_Stream2_IRQn); } -void DMA1_Stream3_IRQHandler(void) { IRQ_ENTER(DMA1_Stream3_IRQn); if (dma_handle[dma_id_3] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_3]); } IRQ_EXIT(DMA1_Stream3_IRQn); } -void DMA1_Stream4_IRQHandler(void) { IRQ_ENTER(DMA1_Stream4_IRQn); if (dma_handle[dma_id_4] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_4]); } IRQ_EXIT(DMA1_Stream4_IRQn); } -void DMA1_Stream5_IRQHandler(void) { IRQ_ENTER(DMA1_Stream5_IRQn); if (dma_handle[dma_id_5] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_5]); } IRQ_EXIT(DMA1_Stream5_IRQn); } -void DMA1_Stream6_IRQHandler(void) { IRQ_ENTER(DMA1_Stream6_IRQn); if (dma_handle[dma_id_6] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_6]); } IRQ_EXIT(DMA1_Stream6_IRQn); } -void DMA1_Stream7_IRQHandler(void) { IRQ_ENTER(DMA1_Stream7_IRQn); if (dma_handle[dma_id_7] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_7]); } IRQ_EXIT(DMA1_Stream7_IRQn); } -void DMA2_Stream0_IRQHandler(void) { IRQ_ENTER(DMA2_Stream0_IRQn); if (dma_handle[dma_id_8] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_8]); } IRQ_EXIT(DMA2_Stream0_IRQn); } -void DMA2_Stream1_IRQHandler(void) { IRQ_ENTER(DMA2_Stream1_IRQn); if (dma_handle[dma_id_9] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_9]); } IRQ_EXIT(DMA2_Stream1_IRQn); } -void DMA2_Stream2_IRQHandler(void) { IRQ_ENTER(DMA2_Stream2_IRQn); if (dma_handle[dma_id_10] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_10]); } IRQ_EXIT(DMA2_Stream2_IRQn); } -void DMA2_Stream3_IRQHandler(void) { IRQ_ENTER(DMA2_Stream3_IRQn); if (dma_handle[dma_id_11] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_11]); } IRQ_EXIT(DMA2_Stream3_IRQn); } -void DMA2_Stream4_IRQHandler(void) { IRQ_ENTER(DMA2_Stream4_IRQn); if (dma_handle[dma_id_12] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_12]); } IRQ_EXIT(DMA2_Stream4_IRQn); } -void DMA2_Stream5_IRQHandler(void) { IRQ_ENTER(DMA2_Stream5_IRQn); if (dma_handle[dma_id_13] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_13]); } IRQ_EXIT(DMA2_Stream5_IRQn); } -void DMA2_Stream6_IRQHandler(void) { IRQ_ENTER(DMA2_Stream6_IRQn); if (dma_handle[dma_id_14] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_14]); } IRQ_EXIT(DMA2_Stream6_IRQn); } -void DMA2_Stream7_IRQHandler(void) { IRQ_ENTER(DMA2_Stream7_IRQn); if (dma_handle[dma_id_15] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_15]); } IRQ_EXIT(DMA2_Stream7_IRQn); } - -#elif defined(MCU_SERIES_L4) - -void DMA1_Channel1_IRQHandler(void) { IRQ_ENTER(DMA1_Channel1_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Channel1_IRQn); } -void DMA1_Channel2_IRQHandler(void) { IRQ_ENTER(DMA1_Channel2_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Channel2_IRQn); } -void DMA1_Channel3_IRQHandler(void) { IRQ_ENTER(DMA1_Channel3_IRQn); if (dma_handle[dma_id_2] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_2]); } IRQ_EXIT(DMA1_Channel3_IRQn); } -void DMA1_Channel4_IRQHandler(void) { IRQ_ENTER(DMA1_Channel4_IRQn); if (dma_handle[dma_id_3] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_3]); } IRQ_EXIT(DMA1_Channel4_IRQn); } -void DMA1_Channel5_IRQHandler(void) { IRQ_ENTER(DMA1_Channel5_IRQn); if (dma_handle[dma_id_4] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_4]); } IRQ_EXIT(DMA1_Channel5_IRQn); } -void DMA1_Channel6_IRQHandler(void) { IRQ_ENTER(DMA1_Channel6_IRQn); if (dma_handle[dma_id_5] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_5]); } IRQ_EXIT(DMA1_Channel6_IRQn); } -void DMA1_Channel7_IRQHandler(void) { IRQ_ENTER(DMA1_Channel7_IRQn); if (dma_handle[dma_id_6] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_6]); } IRQ_EXIT(DMA1_Channel7_IRQn); } -void DMA2_Channel1_IRQHandler(void) { IRQ_ENTER(DMA2_Channel1_IRQn); if (dma_handle[dma_id_7] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_7]); } IRQ_EXIT(DMA2_Channel1_IRQn); } -void DMA2_Channel2_IRQHandler(void) { IRQ_ENTER(DMA2_Channel2_IRQn); if (dma_handle[dma_id_8] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_8]); } IRQ_EXIT(DMA2_Channel2_IRQn); } -void DMA2_Channel3_IRQHandler(void) { IRQ_ENTER(DMA2_Channel3_IRQn); if (dma_handle[dma_id_9] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_9]); } IRQ_EXIT(DMA2_Channel3_IRQn); } -void DMA2_Channel4_IRQHandler(void) { IRQ_ENTER(DMA2_Channel4_IRQn); if (dma_handle[dma_id_10] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_10]);} IRQ_EXIT(DMA2_Channel4_IRQn); } -void DMA2_Channel5_IRQHandler(void) { IRQ_ENTER(DMA2_Channel5_IRQn); if (dma_handle[dma_id_11] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_11]);} IRQ_EXIT(DMA2_Channel5_IRQn); } -void DMA2_Channel6_IRQHandler(void) { IRQ_ENTER(DMA2_Channel6_IRQn); if (dma_handle[dma_id_12] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_12]);} IRQ_EXIT(DMA2_Channel6_IRQn); } -void DMA2_Channel7_IRQHandler(void) { IRQ_ENTER(DMA2_Channel7_IRQn); if (dma_handle[dma_id_13] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_13]);} IRQ_EXIT(DMA2_Channel7_IRQn); } - -#endif - -// Resets the idle counter for the DMA controller associated with dma_id. -static void dma_tickle(dma_id_t dma_id) { - dma_idle.counter[(dma_id < NSTREAMS_PER_CONTROLLER) ? 0 : 1] = 1; -} - -static void dma_enable_clock(dma_id_t dma_id) { - // We don't want dma_tick_handler() to turn off the clock right after we - // enable it, so we need to mark the channel in use in an atomic fashion. - mp_uint_t irq_state = MICROPY_BEGIN_ATOMIC_SECTION(); - uint32_t old_enable_mask = dma_enable_mask; - dma_enable_mask |= (1 << dma_id); - MICROPY_END_ATOMIC_SECTION(irq_state); - - if (dma_id < NSTREAMS_PER_CONTROLLER) { - if (((old_enable_mask & DMA1_ENABLE_MASK) == 0) && !DMA1_IS_CLK_ENABLED()) { - __DMA1_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA1) needs to be invalidated. - - for (int channel = 0; channel < NSTREAMS_PER_CONTROLLER; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } else { - if (((old_enable_mask & DMA2_ENABLE_MASK) == 0) && !DMA2_IS_CLK_ENABLED()) { - __DMA2_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA1) needs to be invalidated. - - for (int channel = NSTREAMS_PER_CONTROLLER; channel < NSTREAM; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } -} - -static void dma_disable_clock(dma_id_t dma_id) { - // We just mark the clock as disabled here, but we don't actually disable it. - // We wait for the timer to expire first, which means that back-to-back - // transfers don't have to initialize as much. - dma_tickle(dma_id); - dma_enable_mask &= ~(1 << dma_id); -} - -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data) { - // initialise parameters - dma->Instance = dma_descr->instance; - dma->Init = *dma_descr->init; - dma->Init.Direction = dma_descr->transfer_direction; - #if defined(MCU_SERIES_L4) - dma->Init.Request = dma_descr->sub_instance; - #else - dma->Init.Channel = dma_descr->sub_instance; - #endif - // half of __HAL_LINKDMA(data, xxx, *dma) - // caller must implement other half by doing: data->xxx = dma - dma->Parent = data; -} - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data){ - // Some drivers allocate the DMA_HandleTypeDef from the stack - // (i.e. dac, i2c, spi) and for those cases we need to clear the - // structure so we don't get random values from the stack) - memset(dma, 0, sizeof(*dma)); - - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - - dma_init_handle(dma, dma_descr, data); - // set global pointer for IRQ handler - dma_handle[dma_id] = dma; - - dma_enable_clock(dma_id); - - // if this stream was previously configured for this channel/request then we - // can skip most of the initialisation - uint8_t sub_inst = DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance); - if (dma_last_sub_instance[dma_id] != sub_inst) { - dma_last_sub_instance[dma_id] = sub_inst; - - // reset and configure DMA peripheral - // (dma->State is set to HAL_DMA_STATE_RESET by memset above) - HAL_DMA_DeInit(dma); - HAL_DMA_Init(dma); - HAL_NVIC_SetPriority(dma_irqn[dma_id], IRQ_PRI_DMA, IRQ_SUBPRI_DMA); - } else { - // only necessary initialization - dma->State = HAL_DMA_STATE_READY; -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - // calculate DMA base address and bitshift to be used in IRQ handler - extern uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); - DMA_CalcBaseAndBitshift(dma); -#endif - } - - HAL_NVIC_EnableIRQ(dma_irqn[dma_id]); - } -} - -void dma_deinit(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - HAL_NVIC_DisableIRQ(dma_irqn[dma_descr->id]); - dma_handle[dma_descr->id] = NULL; - - dma_disable_clock(dma_descr->id); - } -} - -void dma_invalidate_channel(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - if (dma_last_sub_instance[dma_id] == DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance) ) { - dma_last_sub_instance[dma_id] = DMA_INVALID_CHANNEL; - } - } -} - -// Called from the SysTick handler -// We use LSB of tick to select which controller to process -void dma_idle_handler(int tick) { - static const uint32_t controller_mask[] = { - DMA1_ENABLE_MASK, DMA2_ENABLE_MASK - }; - { - int controller = tick & 1; - if (dma_idle.counter[controller] == 0) { - return; - } - if (++dma_idle.counter[controller] > DMA_IDLE_TICK_MAX) { - if ((dma_enable_mask & controller_mask[controller]) == 0) { - // Nothing is active and we've reached our idle timeout, - // Now we'll really disable the clock. - dma_idle.counter[controller] = 0; - if (controller == 0) { - __DMA1_CLK_DISABLE(); - } else { - __DMA2_CLK_DISABLE(); - } - } else { - // Something is still active, but the counter never got - // reset, so we'll reset the counter here. - dma_idle.counter[controller] = 1; - } - } - } -} diff --git a/ports/stm32/dma.h b/ports/stm32/dma.h deleted file mode 100644 index 55fb62175811b..0000000000000 --- a/ports/stm32/dma.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_DMA_H -#define MICROPY_INCLUDED_STMHAL_DMA_H - -typedef struct _dma_descr_t dma_descr_t; - -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - -extern const dma_descr_t dma_I2C_1_RX; -extern const dma_descr_t dma_SPI_3_RX; -extern const dma_descr_t dma_I2C_4_RX; -extern const dma_descr_t dma_I2C_3_RX; -extern const dma_descr_t dma_I2C_2_RX; -extern const dma_descr_t dma_SPI_2_RX; -extern const dma_descr_t dma_SPI_2_TX; -extern const dma_descr_t dma_I2C_3_TX; -extern const dma_descr_t dma_I2C_4_TX; -extern const dma_descr_t dma_DAC_1_TX; -extern const dma_descr_t dma_DAC_2_TX; -extern const dma_descr_t dma_SPI_3_TX; -extern const dma_descr_t dma_I2C_1_TX; -extern const dma_descr_t dma_I2C_2_TX; -extern const dma_descr_t dma_SDMMC_2_RX; -extern const dma_descr_t dma_SPI_1_RX; -extern const dma_descr_t dma_SPI_5_RX; -extern const dma_descr_t dma_SDIO_0_RX; -extern const dma_descr_t dma_SPI_4_RX; -extern const dma_descr_t dma_SPI_5_TX; -extern const dma_descr_t dma_SPI_4_TX; -extern const dma_descr_t dma_SPI_6_TX; -extern const dma_descr_t dma_SPI_1_TX; -extern const dma_descr_t dma_SDMMC_2_TX; -extern const dma_descr_t dma_SPI_6_RX; -extern const dma_descr_t dma_SDIO_0_TX; - -#elif defined(MCU_SERIES_L4) - -extern const dma_descr_t dma_ADC_1_RX; -extern const dma_descr_t dma_ADC_2_RX; -extern const dma_descr_t dma_SPI_1_RX; -extern const dma_descr_t dma_I2C_3_TX; -extern const dma_descr_t dma_ADC_3_RX; -extern const dma_descr_t dma_SPI_1_TX; -extern const dma_descr_t dma_I2C_3_RX; -extern const dma_descr_t dma_DAC_1_TX; -extern const dma_descr_t dma_SPI_2_RX; -extern const dma_descr_t dma_I2C_2_TX; -extern const dma_descr_t dma_DAC_2_TX; -extern const dma_descr_t dma_SPI_2_TX; -extern const dma_descr_t dma_I2C_2_RX; -extern const dma_descr_t dma_I2C_1_TX; -extern const dma_descr_t dma_I2C_1_RX; -extern const dma_descr_t dma_SPI_3_RX; -extern const dma_descr_t dma_SPI_3_TX; -extern const dma_descr_t dma_SDIO_0_TX; -extern const dma_descr_t dma_SDIO_0_RX; - -#endif - -typedef union { - uint16_t enabled; // Used to test if both counters are == 0 - uint8_t counter[2]; -} dma_idle_count_t; -extern volatile dma_idle_count_t dma_idle; -#define DMA_IDLE_ENABLED() (dma_idle.enabled != 0) - -#define DMA_SYSTICK_MASK 0x0e -#define DMA_MSECS_PER_SYSTICK (DMA_SYSTICK_MASK + 1) -#define DMA_IDLE_TICK_MAX (8) // 128 msec -#define DMA_IDLE_TICK(tick) (((tick) & DMA_SYSTICK_MASK) == 0) - - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data); -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data); -void dma_deinit(const dma_descr_t *dma_descr); -void dma_invalidate_channel(const dma_descr_t *dma_descr); -void dma_idle_handler(int controller); - -#endif // MICROPY_INCLUDED_STMHAL_DMA_H diff --git a/ports/stm32/extint.c b/ports/stm32/extint.c deleted file mode 100644 index 41943f1cdb510..0000000000000 --- a/ports/stm32/extint.c +++ /dev/null @@ -1,508 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "pin.h" -#include "extint.h" -#include "irq.h" - -/// \moduleref pyb -/// \class ExtInt - configure I/O pins to interrupt on external events -/// -/// There are a total of 22 interrupt lines. 16 of these can come from GPIO pins -/// and the remaining 6 are from internal sources. -/// -/// For lines 0 thru 15, a given line can map to the corresponding line from an -/// arbitrary port. So line 0 can map to Px0 where x is A, B, C, ... and -/// line 1 can map to Px1 where x is A, B, C, ... -/// -/// def callback(line): -/// print("line =", line) -/// -/// Note: ExtInt will automatically configure the gpio line as an input. -/// -/// extint = pyb.ExtInt(pin, pyb.ExtInt.IRQ_FALLING, pyb.Pin.PULL_UP, callback) -/// -/// Now every time a falling edge is seen on the X1 pin, the callback will be -/// called. Caution: mechanical pushbuttons have "bounce" and pushing or -/// releasing a switch will often generate multiple edges. -/// See: http://www.eng.utah.edu/~cs5780/debouncing.pdf for a detailed -/// explanation, along with various techniques for debouncing. -/// -/// Trying to register 2 callbacks onto the same pin will throw an exception. -/// -/// If pin is passed as an integer, then it is assumed to map to one of the -/// internal interrupt sources, and must be in the range 16 thru 22. -/// -/// All other pin objects go through the pin mapper to come up with one of the -/// gpio pins. -/// -/// extint = pyb.ExtInt(pin, mode, pull, callback) -/// -/// Valid modes are pyb.ExtInt.IRQ_RISING, pyb.ExtInt.IRQ_FALLING, -/// pyb.ExtInt.IRQ_RISING_FALLING, pyb.ExtInt.EVT_RISING, -/// pyb.ExtInt.EVT_FALLING, and pyb.ExtInt.EVT_RISING_FALLING. -/// -/// Only the IRQ_xxx modes have been tested. The EVT_xxx modes have -/// something to do with sleep mode and the WFE instruction. -/// -/// Valid pull values are pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN, pyb.Pin.PULL_NONE. -/// -/// There is also a C API, so that drivers which require EXTI interrupt lines -/// can also use this code. See extint.h for the available functions and -/// usrsw.h for an example of using this. - -// TODO Add python method to change callback object. - -#define EXTI_OFFSET (EXTI_BASE - PERIPH_BASE) - -// Macro used to set/clear the bit corresponding to the line in the IMR/EMR -// register in an atomic fashion by using bitband addressing. -#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line) * 4))) - -#if defined(MCU_SERIES_L4) -// The L4 MCU supports 40 Events/IRQs lines of the type configurable and direct. -// Here we only support configurable line types. Details, see page 330 of RM0351, Rev 1. -// The USB_FS_WAKUP event is a direct type and there is no support for it. -#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR1) -#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR1) -#define EXTI_RTSR EXTI->RTSR1 -#define EXTI_FTSR EXTI->FTSR1 -#else -#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR) -#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR) -#define EXTI_RTSR EXTI->RTSR -#define EXTI_FTSR EXTI->FTSR -#endif - -#define EXTI_SWIER_BB(line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + offsetof(EXTI_TypeDef, SWIER)) * 32) + ((line) * 4))) - -typedef struct { - mp_obj_base_t base; - mp_int_t line; -} extint_obj_t; - -STATIC uint8_t pyb_extint_mode[EXTI_NUM_VECTORS]; -STATIC bool pyb_extint_hard_irq[EXTI_NUM_VECTORS]; - -// The callback arg is a small-int or a ROM Pin object, so no need to scan by GC -STATIC mp_obj_t pyb_extint_callback_arg[EXTI_NUM_VECTORS]; - -#if !defined(ETH) -#define ETH_WKUP_IRQn 62 // Some MCUs don't have ETH, but we want a value to put in our table -#endif -#if !defined(OTG_HS_WKUP_IRQn) -#define OTG_HS_WKUP_IRQn 76 // Some MCUs don't have HS, but we want a value to put in our table -#endif -#if !defined(OTG_FS_WKUP_IRQn) -#define OTG_FS_WKUP_IRQn 42 // Some MCUs don't have FS IRQ, but we want a value to put in our table -#endif - -STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = { - EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn, EXTI4_IRQn, - EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, - EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, - EXTI15_10_IRQn, - #if defined(MCU_SERIES_L4) - PVD_PVM_IRQn, - #else - PVD_IRQn, - #endif - RTC_Alarm_IRQn, - OTG_FS_WKUP_IRQn, - ETH_WKUP_IRQn, - OTG_HS_WKUP_IRQn, - TAMP_STAMP_IRQn, - RTC_WKUP_IRQn, -}; - -// Set override_callback_obj to true if you want to unconditionally set the -// callback function. -uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj) { - const pin_obj_t *pin = NULL; - uint v_line; - - if (MP_OBJ_IS_INT(pin_obj)) { - // If an integer is passed in, then use it to identify lines 16 thru 22 - // We expect lines 0 thru 15 to be passed in as a pin, so that we can - // get both the port number and line number. - v_line = mp_obj_get_int(pin_obj); - if (v_line < 16) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d < 16, use a Pin object", v_line)); - } - if (v_line >= EXTI_NUM_VECTORS) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d >= max of %d", v_line, EXTI_NUM_VECTORS)); - } - } else { - pin = pin_find(pin_obj); - v_line = pin->pin; - } - if (mode != GPIO_MODE_IT_RISING && - mode != GPIO_MODE_IT_FALLING && - mode != GPIO_MODE_IT_RISING_FALLING && - mode != GPIO_MODE_EVT_RISING && - mode != GPIO_MODE_EVT_FALLING && - mode != GPIO_MODE_EVT_RISING_FALLING) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid ExtInt Mode: %d", mode)); - } - if (pull != GPIO_NOPULL && - pull != GPIO_PULLUP && - pull != GPIO_PULLDOWN) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid ExtInt Pull: %d", pull)); - } - - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[v_line]; - if (!override_callback_obj && *cb != mp_const_none && callback_obj != mp_const_none) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "ExtInt vector %d is already in use", v_line)); - } - - // We need to update callback atomically, so we disable the line - // before we update anything. - - extint_disable(v_line); - - *cb = callback_obj; - pyb_extint_mode[v_line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000 - EXTI_Mode_Interrupt : EXTI_Mode_Event; - - if (*cb != mp_const_none) { - pyb_extint_hard_irq[v_line] = true; - pyb_extint_callback_arg[v_line] = MP_OBJ_NEW_SMALL_INT(v_line); - - mp_hal_gpio_clock_enable(pin->gpio); - GPIO_InitTypeDef exti; - exti.Pin = pin->pin_mask; - exti.Mode = mode; - exti.Pull = pull; - exti.Speed = GPIO_SPEED_FAST; - HAL_GPIO_Init(pin->gpio, &exti); - - // Calling HAL_GPIO_Init does an implicit extint_enable - - /* Enable and set NVIC Interrupt to the lowest priority */ - HAL_NVIC_SetPriority(nvic_irq_channel[v_line], IRQ_PRI_EXTINT, IRQ_SUBPRI_EXTINT); - HAL_NVIC_EnableIRQ(nvic_irq_channel[v_line]); - } - return v_line; -} - -// This function is intended to be used by the Pin.irq() method -void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj) { - uint32_t line = pin->pin; - - // Check if the ExtInt line is already in use by another Pin/ExtInt - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line]; - if (*cb != mp_const_none && MP_OBJ_FROM_PTR(pin) != pyb_extint_callback_arg[line]) { - if (MP_OBJ_IS_SMALL_INT(pyb_extint_callback_arg[line])) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "ExtInt vector %d is already in use", line)); - } else { - const pin_obj_t *other_pin = (const pin_obj_t*)pyb_extint_callback_arg[line]; - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, - "IRQ resource already taken by Pin('%q')", other_pin->name)); - } - } - - extint_disable(line); - - *cb = callback_obj; - pyb_extint_mode[line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000 - EXTI_Mode_Interrupt : EXTI_Mode_Event; - - if (*cb != mp_const_none) { - // Configure and enable the callback - - pyb_extint_hard_irq[line] = hard_irq; - pyb_extint_callback_arg[line] = MP_OBJ_FROM_PTR(pin); - - // Route the GPIO to EXTI - __HAL_RCC_SYSCFG_CLK_ENABLE(); - SYSCFG->EXTICR[line >> 2] = - (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03)))) - | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03))); - - // Enable or disable the rising detector - if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING) { - EXTI_RTSR |= 1 << line; - } else { - EXTI_RTSR &= ~(1 << line); - } - - // Enable or disable the falling detector - if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING) { - EXTI_FTSR |= 1 << line; - } else { - EXTI_FTSR &= ~(1 << line); - } - - // Configure the NVIC - HAL_NVIC_SetPriority(nvic_irq_channel[line], IRQ_PRI_EXTINT, IRQ_SUBPRI_EXTINT); - HAL_NVIC_EnableIRQ(nvic_irq_channel[line]); - - // Enable the interrupt - extint_enable(line); - } -} - -void extint_enable(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - #if defined(MCU_SERIES_F7) - // The Cortex-M7 doesn't have bitband support. - mp_uint_t irq_state = disable_irq(); - if (pyb_extint_mode[line] == EXTI_Mode_Interrupt) { - EXTI->IMR |= (1 << line); - } else { - EXTI->EMR |= (1 << line); - } - enable_irq(irq_state); - #else - // Since manipulating IMR/EMR is a read-modify-write, and we want this to - // be atomic, we use the bit-band area to just affect the bit we're - // interested in. - EXTI_MODE_BB(pyb_extint_mode[line], line) = 1; - #endif -} - -void extint_disable(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - - #if defined(MCU_SERIES_F7) - // The Cortex-M7 doesn't have bitband support. - mp_uint_t irq_state = disable_irq(); - EXTI->IMR &= ~(1 << line); - EXTI->EMR &= ~(1 << line); - enable_irq(irq_state); - #else - // Since manipulating IMR/EMR is a read-modify-write, and we want this to - // be atomic, we use the bit-band area to just affect the bit we're - // interested in. - EXTI_MODE_BB(EXTI_Mode_Interrupt, line) = 0; - EXTI_MODE_BB(EXTI_Mode_Event, line) = 0; - #endif -} - -void extint_swint(uint line) { - if (line >= EXTI_NUM_VECTORS) { - return; - } - // we need 0 to 1 transition to trigger the interrupt -#if defined(MCU_SERIES_L4) - EXTI->SWIER1 &= ~(1 << line); - EXTI->SWIER1 |= (1 << line); -#else - EXTI->SWIER &= ~(1 << line); - EXTI->SWIER |= (1 << line); -#endif -} - -/// \method line() -/// Return the line number that the pin is mapped to. -STATIC mp_obj_t extint_obj_line(mp_obj_t self_in) { - extint_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->line); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_line_obj, extint_obj_line); - -/// \method enable() -/// Enable a disabled interrupt. -STATIC mp_obj_t extint_obj_enable(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_enable(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_enable_obj, extint_obj_enable); - -/// \method disable() -/// Disable the interrupt associated with the ExtInt object. -/// This could be useful for debouncing. -STATIC mp_obj_t extint_obj_disable(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_disable(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_disable_obj, extint_obj_disable); - -/// \method swint() -/// Trigger the callback from software. -STATIC mp_obj_t extint_obj_swint(mp_obj_t self_in) { - extint_obj_t *self = self_in; - extint_swint(self->line); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_swint_obj, extint_obj_swint); - -// TODO document as a staticmethod -/// \classmethod regs() -/// Dump the values of the EXTI registers. -STATIC mp_obj_t extint_regs(void) { - #if defined(MCU_SERIES_L4) - printf("EXTI_IMR1 %08lx\n", EXTI->IMR1); - printf("EXTI_IMR2 %08lx\n", EXTI->IMR2); - printf("EXTI_EMR1 %08lx\n", EXTI->EMR1); - printf("EXTI_EMR2 %08lx\n", EXTI->EMR2); - printf("EXTI_RTSR1 %08lx\n", EXTI->RTSR1); - printf("EXTI_RTSR2 %08lx\n", EXTI->RTSR2); - printf("EXTI_FTSR1 %08lx\n", EXTI->FTSR1); - printf("EXTI_FTSR2 %08lx\n", EXTI->FTSR2); - printf("EXTI_SWIER1 %08lx\n", EXTI->SWIER1); - printf("EXTI_SWIER2 %08lx\n", EXTI->SWIER2); - printf("EXTI_PR1 %08lx\n", EXTI->PR1); - printf("EXTI_PR2 %08lx\n", EXTI->PR2); - #else - printf("EXTI_IMR %08lx\n", EXTI->IMR); - printf("EXTI_EMR %08lx\n", EXTI->EMR); - printf("EXTI_RTSR %08lx\n", EXTI->RTSR); - printf("EXTI_FTSR %08lx\n", EXTI->FTSR); - printf("EXTI_SWIER %08lx\n", EXTI->SWIER); - printf("EXTI_PR %08lx\n", EXTI->PR); - #endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(extint_regs_fun_obj, extint_regs); -STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(extint_regs_obj, (mp_obj_t)&extint_regs_fun_obj); - -/// \classmethod \constructor(pin, mode, pull, callback) -/// Create an ExtInt object: -/// -/// - `pin` is the pin on which to enable the interrupt (can be a pin object or any valid pin name). -/// - `mode` can be one of: -/// - `ExtInt.IRQ_RISING` - trigger on a rising edge; -/// - `ExtInt.IRQ_FALLING` - trigger on a falling edge; -/// - `ExtInt.IRQ_RISING_FALLING` - trigger on a rising or falling edge. -/// - `pull` can be one of: -/// - `pyb.Pin.PULL_NONE` - no pull up or down resistors; -/// - `pyb.Pin.PULL_UP` - enable the pull-up resistor; -/// - `pyb.Pin.PULL_DOWN` - enable the pull-down resistor. -/// - `callback` is the function to call when the interrupt triggers. The -/// callback function must accept exactly 1 argument, which is the line that -/// triggered the interrupt. -STATIC const mp_arg_t pyb_extint_make_new_args[] = { - { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pull, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_callback, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, -}; -#define PYB_EXTINT_MAKE_NEW_NUM_ARGS MP_ARRAY_SIZE(pyb_extint_make_new_args) - -STATIC mp_obj_t extint_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // type_in == extint_obj_type - - // parse args - mp_arg_val_t vals[PYB_EXTINT_MAKE_NEW_NUM_ARGS]; - mp_arg_parse_all_kw_array(n_args, n_kw, args, PYB_EXTINT_MAKE_NEW_NUM_ARGS, pyb_extint_make_new_args, vals); - - extint_obj_t *self = m_new_obj(extint_obj_t); - self->base.type = type; - self->line = extint_register(vals[0].u_obj, vals[1].u_int, vals[2].u_int, vals[3].u_obj, false); - - return self; -} - -STATIC void extint_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - extint_obj_t *self = self_in; - mp_printf(print, "", self->line); -} - -STATIC const mp_rom_map_elem_t extint_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_line), MP_ROM_PTR(&extint_obj_line_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&extint_obj_enable_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&extint_obj_disable_obj) }, - { MP_ROM_QSTR(MP_QSTR_swint), MP_ROM_PTR(&extint_obj_swint_obj) }, - { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&extint_regs_obj) }, - - // class constants - /// \constant IRQ_RISING - interrupt on a rising edge - /// \constant IRQ_FALLING - interrupt on a falling edge - /// \constant IRQ_RISING_FALLING - interrupt on a rising or falling edge - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING_FALLING), MP_ROM_INT(GPIO_MODE_IT_RISING_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_RISING), MP_ROM_INT(GPIO_MODE_EVT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_FALLING), MP_ROM_INT(GPIO_MODE_EVT_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_EVT_RISING_FALLING), MP_ROM_INT(GPIO_MODE_EVT_RISING_FALLING) }, -}; - -STATIC MP_DEFINE_CONST_DICT(extint_locals_dict, extint_locals_dict_table); - -const mp_obj_type_t extint_type = { - { &mp_type_type }, - .name = MP_QSTR_ExtInt, - .print = extint_obj_print, - .make_new = extint_make_new, - .locals_dict = (mp_obj_dict_t*)&extint_locals_dict, -}; - -void extint_init0(void) { - for (int i = 0; i < PYB_EXTI_NUM_VECTORS; i++) { - MP_STATE_PORT(pyb_extint_callback)[i] = mp_const_none; - pyb_extint_mode[i] = EXTI_Mode_Interrupt; - } -} - -// Interrupt handler -void Handle_EXTI_Irq(uint32_t line) { - if (__HAL_GPIO_EXTI_GET_FLAG(1 << line)) { - __HAL_GPIO_EXTI_CLEAR_FLAG(1 << line); - if (line < EXTI_NUM_VECTORS) { - mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line]; - if (*cb != mp_const_none) { - // If it's a soft IRQ handler then just schedule callback for later - if (!pyb_extint_hard_irq[line]) { - mp_sched_schedule(*cb, pyb_extint_callback_arg[line]); - return; - } - - mp_sched_lock(); - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(*cb, pyb_extint_callback_arg[line]); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - *cb = mp_const_none; - extint_disable(line); - printf("Uncaught exception in ExtInt interrupt handler line %lu\n", line); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } - } - } -} diff --git a/ports/stm32/extint.h b/ports/stm32/extint.h deleted file mode 100644 index 846790b9be99c..0000000000000 --- a/ports/stm32/extint.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_EXTINT_H -#define MICROPY_INCLUDED_STMHAL_EXTINT_H - -// Vectors 0-15 are for regular pins -// Vectors 16-22 are for internal sources. -// -// Use the following constants for the internal sources: - -#define EXTI_PVD_OUTPUT (16) -#define EXTI_RTC_ALARM (17) -#define EXTI_USB_OTG_FS_WAKEUP (18) -#define EXTI_ETH_WAKEUP (19) -#define EXTI_USB_OTG_HS_WAKEUP (20) -#define EXTI_RTC_TIMESTAMP (21) -#define EXTI_RTC_WAKEUP (22) -#if defined(MCU_SERIES_F7) -#define EXTI_LPTIM1_ASYNC_EVENT (23) -#endif - -#define EXTI_NUM_VECTORS (PYB_EXTI_NUM_VECTORS) - -#define EXTI_MODE_INTERRUPT (offsetof(EXTI_TypeDef, IMR)) -#define EXTI_MODE_EVENT (offsetof(EXTI_TypeDef, EMR)) - -#define EXTI_TRIGGER_RISING (offsetof(EXTI_TypeDef, RTSR)) -#define EXTI_TRIGGER_FALLING (offsetof(EXTI_TypeDef, FTSR)) -#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING + EXTI_TRIGGER_FALLING) // just different from RISING or FALLING - -void extint_init0(void); - -uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj); -void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj); - -void extint_enable(uint line); -void extint_disable(uint line); -void extint_swint(uint line); - -void Handle_EXTI_Irq(uint32_t line); - -extern const mp_obj_type_t extint_type; - -#endif // MICROPY_INCLUDED_STMHAL_EXTINT_H diff --git a/ports/stm32/fatfs_port.c b/ports/stm32/fatfs_port.c deleted file mode 100644 index 17ec3f7266915..0000000000000 --- a/ports/stm32/fatfs_port.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "rtc.h" - -DWORD get_fattime(void) { - rtc_init_finalise(); - RTC_TimeTypeDef time; - RTC_DateTypeDef date; - HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, FORMAT_BIN); - return ((2000 + date.Year - 1980) << 25) | ((date.Month) << 21) | ((date.Date) << 16) | ((time.Hours) << 11) | ((time.Minutes) << 5) | (time.Seconds / 2); -} diff --git a/ports/stm32/flash.c b/ports/stm32/flash.c deleted file mode 100644 index bebb3a16193e8..0000000000000 --- a/ports/stm32/flash.c +++ /dev/null @@ -1,288 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/misc.h" -#include "flash.h" - -typedef struct { - uint32_t base_address; - uint32_t sector_size; - uint32_t sector_count; -} flash_layout_t; - -#if defined(MCU_SERIES_F4) - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x04000, 4 }, - { 0x08010000, 0x10000, 1 }, - { 0x08020000, 0x20000, 3 }, - #if defined(FLASH_SECTOR_8) - { 0x08080000, 0x20000, 4 }, - #endif - #if defined(FLASH_SECTOR_12) - { 0x08100000, 0x04000, 4 }, - { 0x08110000, 0x10000, 1 }, - { 0x08120000, 0x20000, 7 }, - #endif -}; - -#elif defined(MCU_SERIES_F7) - -// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to -// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7 -#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR - -static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x08000, 4 }, - { 0x08020000, 0x20000, 1 }, - { 0x08040000, 0x40000, 3 }, -}; - -#elif defined(MCU_SERIES_L4) - -static const flash_layout_t flash_layout[] = { - { (uint32_t)FLASH_BASE, (uint32_t)FLASH_PAGE_SIZE, 512 }, -}; - -#else -#error Unsupported processor -#endif - -#if defined(MCU_SERIES_L4) - -// get the bank of a given flash address -static uint32_t get_bank(uint32_t addr) { - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) { - // no bank swap - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - return FLASH_BANK_1; - } else { - return FLASH_BANK_2; - } - } else { - // bank swap - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - return FLASH_BANK_2; - } else { - return FLASH_BANK_1; - } - } -} - -// get the page of a given flash address -static uint32_t get_page(uint32_t addr) { - if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) { - // bank 1 - return (addr - FLASH_BASE) / FLASH_PAGE_SIZE; - } else { - // bank 2 - return (addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE; - } -} - -#endif - -uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { - if (addr >= flash_layout[0].base_address) { - uint32_t sector_index = 0; - for (int i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) { - for (int j = 0; j < flash_layout[i].sector_count; ++j) { - uint32_t sector_start_next = flash_layout[i].base_address - + (j + 1) * flash_layout[i].sector_size; - if (addr < sector_start_next) { - if (start_addr != NULL) { - *start_addr = flash_layout[i].base_address - + j * flash_layout[i].sector_size; - } - if (size != NULL) { - *size = flash_layout[i].sector_size; - } - return sector_index; - } - ++sector_index; - } - } - } - return 0; -} - -void flash_erase(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - FLASH_EraseInitTypeDef EraseInitStruct; - - #if defined(MCU_SERIES_L4) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS); - - // erase the sector(s) - // The sector returned by flash_get_sector_info can not be used - // as the flash has on each bank 0/1 pages 0..255 - EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - EraseInitStruct.Banks = get_bank(flash_dest); - EraseInitStruct.Page = get_page(flash_dest); - EraseInitStruct.NbPages = get_page(flash_dest + 4 * num_word32 - 1) - EraseInitStruct.Page + 1;; - #else - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR); - - // erase the sector(s) - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - #endif - - uint32_t SectorError = 0; - if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } -} - -/* -// erase the sector using an interrupt -void flash_erase_it(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR); - - // erase the sector(s) - FLASH_EraseInitTypeDef EraseInitStruct; - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - if (HAL_FLASHEx_Erase_IT(&EraseInitStruct) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } -} -*/ - -void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - #if defined(MCU_SERIES_L4) - - // program the flash uint64 by uint64 - for (int i = 0; i < num_word32 / 2; i++) { - uint64_t val = *(uint64_t*)src; - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 8; - src += 2; - } - if ((num_word32 & 0x01) == 1) { - uint64_t val = *(uint64_t*)flash_dest; - val = (val & 0xffffffff00000000uL) | (*src); - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - } - - #else - - // program the flash word by word - for (int i = 0; i < num_word32; i++) { - if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 4; - src += 1; - } - - #endif - - // lock the flash - HAL_FLASH_Lock(); -} - -/* - use erase, then write -void flash_erase_and_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) { - // check there is something to write - if (num_word32 == 0) { - return; - } - - // unlock - HAL_FLASH_Unlock(); - - // Clear pending flags (if any) - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | - FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR); - - // erase the sector(s) - FLASH_EraseInitTypeDef EraseInitStruct; - EraseInitStruct.TypeErase = TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V - EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL); - EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1; - uint32_t SectorError = 0; - if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { - // error occurred during sector erase - HAL_FLASH_Lock(); // lock the flash - return; - } - - // program the flash word by word - for (int i = 0; i < num_word32; i++) { - if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) { - // error occurred during flash write - HAL_FLASH_Lock(); // lock the flash - return; - } - flash_dest += 4; - src += 1; - } - - // lock the flash - HAL_FLASH_Lock(); -} -*/ diff --git a/ports/stm32/flash.h b/ports/stm32/flash.h deleted file mode 100644 index 688e70a3cd5f8..0000000000000 --- a/ports/stm32/flash.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_FLASH_H -#define MICROPY_INCLUDED_STMHAL_FLASH_H - -uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size); -void flash_erase(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32); -void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32); - -#endif // MICROPY_INCLUDED_STMHAL_FLASH_H diff --git a/ports/stm32/gccollect.c b/ports/stm32/gccollect.c deleted file mode 100644 index cdec2a136cf8c..0000000000000 --- a/ports/stm32/gccollect.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" -#include "systick.h" - -mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs); - -void gc_collect(void) { - // get current time, in case we want to time the GC - #if 0 - uint32_t start = mp_hal_ticks_us(); - #endif - - // start the GC - gc_collect_start(); - - // get the registers and the sp - mp_uint_t regs[10]; - mp_uint_t sp = gc_helper_get_regs_and_sp(regs); - - // trace the stack, including the registers (since they live on the stack in this function) - #if MICROPY_PY_THREAD - gc_collect_root((void**)sp, ((uint32_t)MP_STATE_THREAD(stack_top) - sp) / sizeof(uint32_t)); - #else - gc_collect_root((void**)sp, ((uint32_t)&_ram_end - sp) / sizeof(uint32_t)); - #endif - - // trace root pointers from any threads - #if MICROPY_PY_THREAD - mp_thread_gc_others(); - #endif - - // end the GC - gc_collect_end(); - - #if 0 - // print GC info - uint32_t ticks = mp_hal_ticks_us() - start; - gc_info_t info; - gc_info(&info); - printf("GC@%lu %lums\n", start, ticks); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - #endif -} diff --git a/ports/stm32/gccollect.h b/ports/stm32/gccollect.h deleted file mode 100644 index 1b64a51a6a111..0000000000000 --- a/ports/stm32/gccollect.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_GCCOLLECT_H -#define MICROPY_INCLUDED_STMHAL_GCCOLLECT_H - -// variables defining memory layout -// (these probably belong somewhere else...) -extern uint32_t _etext; -extern uint32_t _sidata; -extern uint32_t _ram_start; -extern uint32_t _sdata; -extern uint32_t _edata; -extern uint32_t _sbss; -extern uint32_t _ebss; -extern uint32_t _heap_start; -extern uint32_t _heap_end; -extern uint32_t _estack; -extern uint32_t _ram_end; - -#endif // MICROPY_INCLUDED_STMHAL_GCCOLLECT_H diff --git a/ports/stm32/gchelper.s b/ports/stm32/gchelper.s deleted file mode 100644 index 6baedcdd0e43c..0000000000000 --- a/ports/stm32/gchelper.s +++ /dev/null @@ -1,62 +0,0 @@ - .syntax unified - .cpu cortex-m4 - .thumb - .text - .align 2 - -@ uint gc_helper_get_regs_and_sp(r0=uint regs[10]) - .global gc_helper_get_regs_and_sp - .thumb - .thumb_func - .type gc_helper_get_regs_and_sp, %function -gc_helper_get_regs_and_sp: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ return the sp - mov r0, sp - bx lr - - -@ this next function is now obsolete - - .size gc_helper_get_regs_and_clean_stack, .-gc_helper_get_regs_and_clean_stack -@ void gc_helper_get_regs_and_clean_stack(r0=uint regs[10], r1=heap_end) - .global gc_helper_get_regs_and_clean_stack - .thumb - .thumb_func - .type gc_helper_get_regs_and_clean_stack, %function -gc_helper_get_regs_and_clean_stack: - @ store registers into given array - str r4, [r0], #4 - str r5, [r0], #4 - str r6, [r0], #4 - str r7, [r0], #4 - str r8, [r0], #4 - str r9, [r0], #4 - str r10, [r0], #4 - str r11, [r0], #4 - str r12, [r0], #4 - str r13, [r0], #4 - - @ clean the stack from given pointer up to current sp - movs r0, #0 - mov r2, sp - b.n .entry -.loop: - str r0, [r1], #4 -.entry: - cmp r1, r2 - bcc.n .loop - bx lr - - .size gc_helper_get_regs_and_clean_stack, .-gc_helper_get_regs_and_clean_stack diff --git a/ports/stm32/help.c b/ports/stm32/help.c deleted file mode 100644 index f9d97b70d662d..0000000000000 --- a/ports/stm32/help.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char stm32_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online help please visit http://micropython.org/help/.\n" -"\n" -"Quick overview of commands for the board:\n" -" pyb.info() -- print some general information\n" -" pyb.delay(n) -- wait for n milliseconds\n" -" pyb.millis() -- get number of milliseconds since hard reset\n" -" pyb.Switch() -- create a switch object\n" -" Switch methods: (), callback(f)\n" -" pyb.LED(n) -- create an LED object for LED n (n=1,2,3,4)\n" -" LED methods: on(), off(), toggle(), intensity()\n" -" pyb.Pin(pin) -- get a pin, eg pyb.Pin('X1')\n" -" pyb.Pin(pin, m, [p]) -- get a pin and configure it for IO mode m, pull mode p\n" -" Pin methods: init(..), value([v]), high(), low()\n" -" pyb.ExtInt(pin, m, p, callback) -- create an external interrupt object\n" -" pyb.ADC(pin) -- make an analog object from a pin\n" -" ADC methods: read(), read_timed(buf, freq)\n" -" pyb.DAC(port) -- make a DAC object\n" -" DAC methods: triangle(freq), write(n), write_timed(buf, freq)\n" -" pyb.RTC() -- make an RTC object; methods: datetime([val])\n" -" pyb.rng() -- get a 30-bit hardware random number\n" -" pyb.Servo(n) -- create Servo object for servo n (n=1,2,3,4)\n" -" Servo methods: calibration(..), angle([x, [t]]), speed([x, [t]])\n" -" pyb.Accel() -- create an Accelerometer object\n" -" Accelerometer methods: x(), y(), z(), tilt(), filtered_xyz()\n" -"\n" -"Pins are numbered X1-X12, X17-X22, Y1-Y12, or by their MCU name\n" -"Pin IO modes are: pyb.Pin.IN, pyb.Pin.OUT_PP, pyb.Pin.OUT_OD\n" -"Pin pull modes are: pyb.Pin.PULL_NONE, pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN\n" -"Additional serial bus objects: pyb.I2C(n), pyb.SPI(n), pyb.UART(n)\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -"For a list of available modules, type help('modules')\n" -; diff --git a/ports/stm32/i2c.c b/ports/stm32/i2c.c deleted file mode 100644 index b22787cab58dd..0000000000000 --- a/ports/stm32/i2c.c +++ /dev/null @@ -1,1035 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "bufhelper.h" -#include "dma.h" -#include "i2c.h" - -/// \moduleref pyb -/// \class I2C - a two-wire serial protocol -/// -/// I2C is a two-wire protocol for communicating between devices. At the physical -/// level it consists of 2 wires: SCL and SDA, the clock and data lines respectively. -/// -/// I2C objects are created attached to a specific bus. They can be initialised -/// when created, or initialised later on: -/// -/// from pyb import I2C -/// -/// i2c = I2C(1) # create on bus 1 -/// i2c = I2C(1, I2C.MASTER) # create and init as a master -/// i2c.init(I2C.MASTER, baudrate=20000) # init as a master -/// i2c.init(I2C.SLAVE, addr=0x42) # init as a slave with given address -/// i2c.deinit() # turn off the peripheral -/// -/// Printing the i2c object gives you information about its configuration. -/// -/// Basic methods for slave are send and recv: -/// -/// i2c.send('abc') # send 3 bytes -/// i2c.send(0x42) # send a single byte, given by the number -/// data = i2c.recv(3) # receive 3 bytes -/// -/// To receive inplace, first create a bytearray: -/// -/// data = bytearray(3) # create a buffer -/// i2c.recv(data) # receive 3 bytes, writing them into data -/// -/// You can specify a timeout (in ms): -/// -/// i2c.send(b'123', timeout=2000) # timout after 2 seconds -/// -/// A master must specify the recipient's address: -/// -/// i2c.init(I2C.MASTER) -/// i2c.send('123', 0x42) # send 3 bytes to slave with address 0x42 -/// i2c.send(b'456', addr=0x42) # keyword for address -/// -/// Master also has other methods: -/// -/// i2c.is_ready(0x42) # check if slave 0x42 is ready -/// i2c.scan() # scan for slaves on the bus, returning -/// # a list of valid addresses -/// i2c.mem_read(3, 0x42, 2) # read 3 bytes from memory of slave 0x42, -/// # starting at address 2 in the slave -/// i2c.mem_write('abc', 0x42, 2, timeout=1000) -#define PYB_I2C_MASTER (0) -#define PYB_I2C_SLAVE (1) - -#if defined(MICROPY_HW_I2C1_SCL) -I2C_HandleTypeDef I2CHandle1 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C2_SCL) -I2C_HandleTypeDef I2CHandle2 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C3_SCL) -I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_I2C4_SCL) -I2C_HandleTypeDef I2CHandle4 = {.Instance = NULL}; -#endif - -STATIC bool pyb_i2c_use_dma[4]; - -const pyb_i2c_obj_t pyb_i2c_obj[] = { - #if defined(MICROPY_HW_I2C1_SCL) - {{&pyb_i2c_type}, &I2CHandle1, &dma_I2C_1_TX, &dma_I2C_1_RX, &pyb_i2c_use_dma[0]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C2_SCL) - {{&pyb_i2c_type}, &I2CHandle2, &dma_I2C_2_TX, &dma_I2C_2_RX, &pyb_i2c_use_dma[1]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C3_SCL) - {{&pyb_i2c_type}, &I2CHandle3, &dma_I2C_3_TX, &dma_I2C_3_RX, &pyb_i2c_use_dma[2]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C4_SCL) - {{&pyb_i2c_type}, &I2CHandle4, &dma_I2C_4_TX, &dma_I2C_4_RX, &pyb_i2c_use_dma[3]}, - #else - {{&pyb_i2c_type}, NULL, NULL, NULL, NULL}, - #endif -}; - -#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - -// The STM32F0, F3, F7 and L4 use a TIMINGR register rather than ClockSpeed and -// DutyCycle. - -#if defined(STM32F746xx) - -// The value 0x40912732 was obtained from the DISCOVERY_I2Cx_TIMING constant -// defined in the STM32F7Cube file Drivers/BSP/STM32F746G-Discovery/stm32f7456g_discovery.h -#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x40912732}} -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (100000) -#define MICROPY_HW_I2C_BAUDRATE_MAX (100000) - -#elif defined(STM32F767xx) || defined(STM32F769xx) - -// These timing values are for f_I2CCLK=54MHz and are only approximate -#define MICROPY_HW_I2C_BAUDRATE_TIMING { \ - {100000, 0xb0420f13}, \ - {400000, 0x70330309}, \ - {1000000, 0x50100103}, \ - } -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (400000) -#define MICROPY_HW_I2C_BAUDRATE_MAX (1000000) - -#elif defined(MCU_SERIES_L4) - -// The value 0x90112626 was obtained from the DISCOVERY_I2C1_TIMING constant -// defined in the STM32L4Cube file Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h -#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x90112626}} -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (100000) -#define MICROPY_HW_I2C_BAUDRATE_MAX (100000) - -#else -#error "no I2C timings for this MCU" -#endif - -STATIC const struct { - uint32_t baudrate; - uint32_t timing; -} pyb_i2c_baudrate_timing[] = MICROPY_HW_I2C_BAUDRATE_TIMING; - -#define NUM_BAUDRATE_TIMINGS MP_ARRAY_SIZE(pyb_i2c_baudrate_timing) - -STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) { - for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) { - if (pyb_i2c_baudrate_timing[i].baudrate == baudrate) { - init->Timing = pyb_i2c_baudrate_timing[i].timing; - return; - } - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "Unsupported I2C baudrate: %lu", baudrate)); -} - -uint32_t i2c_get_baudrate(I2C_InitTypeDef *init) { - for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) { - if (pyb_i2c_baudrate_timing[i].timing == init->Timing) { - return pyb_i2c_baudrate_timing[i].baudrate; - } - } - return 0; -} - -#else - -#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (400000) -#define MICROPY_HW_I2C_BAUDRATE_MAX (400000) - -STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) { - init->ClockSpeed = baudrate; - init->DutyCycle = I2C_DUTYCYCLE_16_9; -} - -uint32_t i2c_get_baudrate(I2C_InitTypeDef *init) { - return init->ClockSpeed; -} - -#endif - -void i2c_init0(void) { - // reset the I2C1 handles - #if defined(MICROPY_HW_I2C1_SCL) - memset(&I2CHandle1, 0, sizeof(I2C_HandleTypeDef)); - I2CHandle1.Instance = I2C1; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - memset(&I2CHandle2, 0, sizeof(I2C_HandleTypeDef)); - I2CHandle2.Instance = I2C2; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - memset(&I2CHandle3, 0, sizeof(I2C_HandleTypeDef)); - I2CHandle3.Instance = I2C3; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - memset(&I2CHandle4, 0, sizeof(I2C_HandleTypeDef)); - I2CHandle3.Instance = I2C4; - #endif -} - -void i2c_init(I2C_HandleTypeDef *i2c) { - int i2c_unit; - const pin_obj_t *scl_pin; - const pin_obj_t *sda_pin; - - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c == &I2CHandle1) { - i2c_unit = 1; - scl_pin = &MICROPY_HW_I2C1_SCL; - sda_pin = &MICROPY_HW_I2C1_SDA; - __I2C1_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c == &I2CHandle2) { - i2c_unit = 2; - scl_pin = &MICROPY_HW_I2C2_SCL; - sda_pin = &MICROPY_HW_I2C2_SDA; - __I2C2_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c == &I2CHandle3) { - i2c_unit = 3; - scl_pin = &MICROPY_HW_I2C3_SCL; - sda_pin = &MICROPY_HW_I2C3_SDA; - __I2C3_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c == &I2CHandle4) { - i2c_unit = 4; - scl_pin = &MICROPY_HW_I2C4_SCL; - sda_pin = &MICROPY_HW_I2C4_SDA; - __I2C3_CLK_ENABLE(); - #endif - } else { - // I2C does not exist for this board (shouldn't get here, should be checked by caller) - return; - } - - // init the GPIO lines - uint32_t mode = MP_HAL_PIN_MODE_ALT_OPEN_DRAIN; - uint32_t pull = MP_HAL_PIN_PULL_NONE; // have external pull-up resistors on both lines - mp_hal_pin_config_alt(scl_pin, mode, pull, AF_FN_I2C, i2c_unit); - mp_hal_pin_config_alt(sda_pin, mode, pull, AF_FN_I2C, i2c_unit); - - // init the I2C device - if (HAL_I2C_Init(i2c) != HAL_OK) { - // init error - // TODO should raise an exception, but this function is not necessarily going to be - // called via Python, so may not be properly wrapped in an NLR handler - printf("OSError: HAL_I2C_Init failed\n"); - return; - } - - // invalidate the DMA channels so they are initialised on first use - const pyb_i2c_obj_t *self = &pyb_i2c_obj[i2c_unit - 1]; - dma_invalidate_channel(self->tx_dma_descr); - dma_invalidate_channel(self->rx_dma_descr); - - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c->Instance == I2C1) { - HAL_NVIC_EnableIRQ(I2C1_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C1_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c->Instance == I2C2) { - HAL_NVIC_EnableIRQ(I2C2_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C2_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c->Instance == I2C3) { - HAL_NVIC_EnableIRQ(I2C3_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C3_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c->Instance == I2C4) { - HAL_NVIC_EnableIRQ(I2C4_EV_IRQn); - HAL_NVIC_EnableIRQ(I2C4_ER_IRQn); - #endif - } -} - -void i2c_deinit(I2C_HandleTypeDef *i2c) { - HAL_I2C_DeInit(i2c); - if (0) { - #if defined(MICROPY_HW_I2C1_SCL) - } else if (i2c->Instance == I2C1) { - __I2C1_FORCE_RESET(); - __I2C1_RELEASE_RESET(); - __I2C1_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C1_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C1_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C2_SCL) - } else if (i2c->Instance == I2C2) { - __I2C2_FORCE_RESET(); - __I2C2_RELEASE_RESET(); - __I2C2_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C2_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C2_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C3_SCL) - } else if (i2c->Instance == I2C3) { - __I2C3_FORCE_RESET(); - __I2C3_RELEASE_RESET(); - __I2C3_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C3_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C3_ER_IRQn); - #endif - #if defined(MICROPY_HW_I2C4_SCL) - } else if (i2c->Instance == I2C4) { - __HAL_RCC_I2C4_FORCE_RESET(); - __HAL_RCC_I2C4_RELEASE_RESET(); - __HAL_RCC_I2C4_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(I2C4_EV_IRQn); - HAL_NVIC_DisableIRQ(I2C4_ER_IRQn); - #endif - } -} - -void i2c_init_freq(const pyb_i2c_obj_t *self, mp_int_t freq) { - I2C_InitTypeDef *init = &self->i2c->Init; - - init->AddressingMode = I2C_ADDRESSINGMODE_7BIT; - init->DualAddressMode = I2C_DUALADDRESS_DISABLED; - init->GeneralCallMode = I2C_GENERALCALL_DISABLED; - init->NoStretchMode = I2C_NOSTRETCH_DISABLE; - init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS; - init->OwnAddress2 = 0; // unused - if (freq != -1) { - i2c_set_baudrate(init, MIN(freq, MICROPY_HW_I2C_BAUDRATE_MAX)); - } - - *self->use_dma = false; - - // init the I2C bus - i2c_deinit(self->i2c); - i2c_init(self->i2c); -} - -STATIC void i2c_reset_after_error(I2C_HandleTypeDef *i2c) { - // wait for bus-busy flag to be cleared, with a timeout - for (int timeout = 50; timeout > 0; --timeout) { - if (!__HAL_I2C_GET_FLAG(i2c, I2C_FLAG_BUSY)) { - // stop bit was generated and bus is back to normal - return; - } - mp_hal_delay_ms(1); - } - // bus was/is busy, need to reset the peripheral to get it to work again - i2c_deinit(i2c); - i2c_init(i2c); -} - -void i2c_ev_irq_handler(mp_uint_t i2c_id) { - I2C_HandleTypeDef *hi2c; - - switch (i2c_id) { - #if defined(MICROPY_HW_I2C1_SCL) - case 1: - hi2c = &I2CHandle1; - break; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - case 2: - hi2c = &I2CHandle2; - break; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - case 3: - hi2c = &I2CHandle3; - break; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - case 4: - hi2c = &I2CHandle4; - break; - #endif - default: - return; - } - - #if defined(MCU_SERIES_F4) - - if (hi2c->Instance->SR1 & I2C_FLAG_BTF && hi2c->State == HAL_I2C_STATE_BUSY_TX) { - if (hi2c->XferCount != 0U) { - hi2c->Instance->DR = *hi2c->pBuffPtr++; - hi2c->XferCount--; - } else { - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); - if (hi2c->XferOptions != I2C_FIRST_FRAME) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->State = HAL_I2C_STATE_READY; - } - } - - #else - - // if not an F4 MCU, use the HAL's IRQ handler - HAL_I2C_EV_IRQHandler(hi2c); - - #endif -} - -void i2c_er_irq_handler(mp_uint_t i2c_id) { - I2C_HandleTypeDef *hi2c; - - switch (i2c_id) { - #if defined(MICROPY_HW_I2C1_SCL) - case 1: - hi2c = &I2CHandle1; - break; - #endif - #if defined(MICROPY_HW_I2C2_SCL) - case 2: - hi2c = &I2CHandle2; - break; - #endif - #if defined(MICROPY_HW_I2C3_SCL) - case 3: - hi2c = &I2CHandle3; - break; - #endif - #if defined(MICROPY_HW_I2C4_SCL) - case 4: - hi2c = &I2CHandle4; - break; - #endif - default: - return; - } - - #if defined(MCU_SERIES_F4) - - uint32_t sr1 = hi2c->Instance->SR1; - - // I2C Bus error - if (sr1 & I2C_FLAG_BERR) { - hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - } - - // I2C Arbitration Loss error - if (sr1 & I2C_FLAG_ARLO) { - hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - } - - // I2C Acknowledge failure - if (sr1 & I2C_FLAG_AF) { - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - - // I2C Over-Run/Under-Run - if (sr1 & I2C_FLAG_OVR) { - hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - } - - #else - - // if not an F4 MCU, use the HAL's IRQ handler - HAL_I2C_ER_IRQHandler(hi2c); - - #endif -} - -STATIC HAL_StatusTypeDef i2c_wait_dma_finished(I2C_HandleTypeDef *i2c, uint32_t timeout) { - // Note: we can't use WFI to idle in this loop because the DMA completion - // interrupt may occur before the WFI. Hence we miss it and have to wait - // until the next sys-tick (up to 1ms). - uint32_t start = HAL_GetTick(); - while (HAL_I2C_GetState(i2c) != HAL_I2C_STATE_READY) { - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -static inline bool in_master_mode(pyb_i2c_obj_t *self) { return self->i2c->Init.OwnAddress1 == PYB_I2C_MASTER_ADDRESS; } - -STATIC void pyb_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_i2c_obj_t *self = self_in; - - uint i2c_num = 0; - if (0) { } - #if defined(MICROPY_HW_I2C1_SCL) - else if (self->i2c->Instance == I2C1) { i2c_num = 1; } - #endif - #if defined(MICROPY_HW_I2C2_SCL) - else if (self->i2c->Instance == I2C2) { i2c_num = 2; } - #endif - #if defined(MICROPY_HW_I2C3_SCL) - else if (self->i2c->Instance == I2C3) { i2c_num = 3; } - #endif - #if defined(MICROPY_HW_I2C4_SCL) - else if (self->i2c->Instance == I2C4) { i2c_num = 4; } - #endif - - if (self->i2c->State == HAL_I2C_STATE_RESET) { - mp_printf(print, "I2C(%u)", i2c_num); - } else { - if (in_master_mode(self)) { - mp_printf(print, "I2C(%u, I2C.MASTER, baudrate=%u)", i2c_num, i2c_get_baudrate(&self->i2c->Init)); - } else { - mp_printf(print, "I2C(%u, I2C.SLAVE, addr=0x%02x)", i2c_num, (self->i2c->Instance->OAR1 >> 1) & 0x7f); - } - } -} - -/// \method init(mode, *, addr=0x12, baudrate=400000, gencall=False) -/// -/// Initialise the I2C bus with the given parameters: -/// -/// - `mode` must be either `I2C.MASTER` or `I2C.SLAVE` -/// - `addr` is the 7-bit address (only sensible for a slave) -/// - `baudrate` is the SCL clock rate (only sensible for a master) -/// - `gencall` is whether to support general call mode -STATIC mp_obj_t pyb_i2c_init_helper(const pyb_i2c_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_INT, {.u_int = PYB_I2C_MASTER} }, - { MP_QSTR_addr, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0x12} }, - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_HW_I2C_BAUDRATE_DEFAULT} }, - { MP_QSTR_gencall, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_dma, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the I2C configuration values - I2C_InitTypeDef *init = &self->i2c->Init; - - if (args[0].u_int == PYB_I2C_MASTER) { - // use a special address to indicate we are a master - init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS; - } else { - init->OwnAddress1 = (args[1].u_int << 1) & 0xfe; - } - - i2c_set_baudrate(init, MIN(args[2].u_int, MICROPY_HW_I2C_BAUDRATE_MAX)); - init->AddressingMode = I2C_ADDRESSINGMODE_7BIT; - init->DualAddressMode = I2C_DUALADDRESS_DISABLED; - init->GeneralCallMode = args[3].u_bool ? I2C_GENERALCALL_ENABLED : I2C_GENERALCALL_DISABLED; - init->OwnAddress2 = 0; // unused - init->NoStretchMode = I2C_NOSTRETCH_DISABLE; - - *self->use_dma = args[4].u_bool; - - // init the I2C bus - i2c_deinit(self->i2c); - i2c_init(self->i2c); - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct an I2C object on the given bus. `bus` can be 1 or 2. -/// With no additional parameters, the I2C object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the I2C busses are: -/// -/// - `I2C(1)` is on the X position: `(SCL, SDA) = (X9, X10) = (PB6, PB7)` -/// - `I2C(2)` is on the Y position: `(SCL, SDA) = (Y9, Y10) = (PB10, PB11)` -STATIC mp_obj_t pyb_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out i2c bus - int i2c_id = 0; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_I2C1_NAME - } else if (strcmp(port, MICROPY_HW_I2C1_NAME) == 0) { - i2c_id = 1; - #endif - #ifdef MICROPY_HW_I2C2_NAME - } else if (strcmp(port, MICROPY_HW_I2C2_NAME) == 0) { - i2c_id = 2; - #endif - #ifdef MICROPY_HW_I2C3_NAME - } else if (strcmp(port, MICROPY_HW_I2C3_NAME) == 0) { - i2c_id = 3; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%s) doesn't exist", port)); - } - } else { - i2c_id = mp_obj_get_int(args[0]); - if (i2c_id < 1 || i2c_id > MP_ARRAY_SIZE(pyb_i2c_obj) - || pyb_i2c_obj[i2c_id - 1].i2c == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%d) doesn't exist", i2c_id)); - } - } - - // get I2C object - const pyb_i2c_obj_t *i2c_obj = &pyb_i2c_obj[i2c_id - 1]; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_i2c_init_helper(i2c_obj, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)i2c_obj; -} - -STATIC mp_obj_t pyb_i2c_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_i2c_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_init_obj, 1, pyb_i2c_init); - -/// \method deinit() -/// Turn off the I2C bus. -STATIC mp_obj_t pyb_i2c_deinit(mp_obj_t self_in) { - pyb_i2c_obj_t *self = self_in; - i2c_deinit(self->i2c); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_deinit_obj, pyb_i2c_deinit); - -/// \method is_ready(addr) -/// Check if an I2C device responds to the given address. Only valid when in master mode. -STATIC mp_obj_t pyb_i2c_is_ready(mp_obj_t self_in, mp_obj_t i2c_addr_o) { - pyb_i2c_obj_t *self = self_in; - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - mp_uint_t i2c_addr = mp_obj_get_int(i2c_addr_o) << 1; - - for (int i = 0; i < 10; i++) { - HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, i2c_addr, 10, 200); - if (status == HAL_OK) { - return mp_const_true; - } - } - - return mp_const_false; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_i2c_is_ready_obj, pyb_i2c_is_ready); - -/// \method scan() -/// Scan all I2C addresses from 0x08 to 0x77 and return a list of those that respond. -/// Only valid when in master mode. -STATIC mp_obj_t pyb_i2c_scan(mp_obj_t self_in) { - pyb_i2c_obj_t *self = self_in; - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - mp_obj_t list = mp_obj_new_list(0, NULL); - - for (uint addr = 0x08; addr <= 0x77; addr++) { - HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, addr << 1, 1, 200); - if (status == HAL_OK) { - mp_obj_list_append(list, MP_OBJ_NEW_SMALL_INT(addr)); - } - } - - return list; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_scan_obj, pyb_i2c_scan); - -/// \method send(send, addr=0x00, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object) -/// - `addr` is the address to send to (only required in master mode) -/// - `timeout` is the timeout in milliseconds to wait for the send -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_i2c_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - DMA_HandleTypeDef tx_dma; - if (use_dma) { - dma_init(&tx_dma, self->tx_dma_descr, self->i2c); - self->i2c->hdmatx = &tx_dma; - self->i2c->hdmarx = NULL; - } - - // send the data - HAL_StatusTypeDef status; - if (in_master_mode(self)) { - if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) { - if (use_dma) { - dma_deinit(self->tx_dma_descr); - } - mp_raise_TypeError("addr argument required"); - } - mp_uint_t i2c_addr = args[1].u_int << 1; - if (!use_dma) { - status = HAL_I2C_Master_Transmit(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len, args[2].u_int); - } else { - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Master_Transmit_DMA(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len); - } - } else { - if (!use_dma) { - status = HAL_I2C_Slave_Transmit(self->i2c, bufinfo.buf, bufinfo.len, args[2].u_int); - } else { - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Slave_Transmit_DMA(self->i2c, bufinfo.buf, bufinfo.len); - } - } - - // if we used DMA, wait for it to finish - if (use_dma) { - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[2].u_int); - } - dma_deinit(self->tx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_send_obj, 1, pyb_i2c_send); - -/// \method recv(recv, addr=0x00, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes -/// - `addr` is the address to receive from (only required in master mode) -/// - `timeout` is the timeout in milliseconds to wait for the receive -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -STATIC mp_obj_t pyb_i2c_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - DMA_HandleTypeDef rx_dma; - if (use_dma) { - dma_init(&rx_dma, self->rx_dma_descr, self->i2c); - self->i2c->hdmatx = NULL; - self->i2c->hdmarx = &rx_dma; - } - - // receive the data - HAL_StatusTypeDef status; - if (in_master_mode(self)) { - if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) { - mp_raise_TypeError("addr argument required"); - } - mp_uint_t i2c_addr = args[1].u_int << 1; - if (!use_dma) { - status = HAL_I2C_Master_Receive(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len, args[2].u_int); - } else { - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Master_Receive_DMA(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len); - } - } else { - if (!use_dma) { - status = HAL_I2C_Slave_Receive(self->i2c, (uint8_t*)vstr.buf, vstr.len, args[2].u_int); - } else { - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Slave_Receive_DMA(self->i2c, (uint8_t*)vstr.buf, vstr.len); - } - } - - // if we used DMA, wait for it to finish - if (use_dma) { - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[2].u_int); - } - dma_deinit(self->rx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_recv_obj, 1, pyb_i2c_recv); - -/// \method mem_read(data, addr, memaddr, timeout=5000, addr_size=8) -/// -/// Read from the memory of an I2C device: -/// -/// - `data` can be an integer or a buffer to read into -/// - `addr` is the I2C device address -/// - `memaddr` is the memory location within the I2C device -/// - `timeout` is the timeout in milliseconds to wait for the read -/// - `addr_size` selects width of memaddr: 8 or 16 bits -/// -/// Returns the read data. -/// This is only valid in master mode. -STATIC const mp_arg_t pyb_i2c_mem_read_allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - { MP_QSTR_addr_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, -}; - -STATIC mp_obj_t pyb_i2c_mem_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args); - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - // get the buffer to read into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // get the addresses - mp_uint_t i2c_addr = args[1].u_int << 1; - mp_uint_t mem_addr = args[2].u_int; - // determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width - mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT; - if (args[4].u_int != 8) { - mem_addr_size = I2C_MEMADD_SIZE_16BIT; - } - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - HAL_StatusTypeDef status; - if (!use_dma) { - status = HAL_I2C_Mem_Read(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len, args[3].u_int); - } else { - DMA_HandleTypeDef rx_dma; - dma_init(&rx_dma, self->rx_dma_descr, self->i2c); - self->i2c->hdmatx = NULL; - self->i2c->hdmarx = &rx_dma; - MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len); - status = HAL_I2C_Mem_Read_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len); - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[3].u_int); - } - dma_deinit(self->rx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - // return the read data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_read_obj, 1, pyb_i2c_mem_read); - -/// \method mem_write(data, addr, memaddr, timeout=5000, addr_size=8) -/// -/// Write to the memory of an I2C device: -/// -/// - `data` can be an integer or a buffer to write from -/// - `addr` is the I2C device address -/// - `memaddr` is the memory location within the I2C device -/// - `timeout` is the timeout in milliseconds to wait for the write -/// - `addr_size` selects width of memaddr: 8 or 16 bits -/// -/// Returns `None`. -/// This is only valid in master mode. -STATIC mp_obj_t pyb_i2c_mem_write(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // parse args (same as mem_read) - pyb_i2c_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args); - - if (!in_master_mode(self)) { - mp_raise_TypeError("I2C must be a master"); - } - - // get the buffer to write from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // get the addresses - mp_uint_t i2c_addr = args[1].u_int << 1; - mp_uint_t mem_addr = args[2].u_int; - // determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width - mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT; - if (args[4].u_int != 8) { - mem_addr_size = I2C_MEMADD_SIZE_16BIT; - } - - // if option is set and IRQs are enabled then we can use DMA - bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED; - - HAL_StatusTypeDef status; - if (!use_dma) { - status = HAL_I2C_Mem_Write(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len, args[3].u_int); - } else { - DMA_HandleTypeDef tx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->i2c); - self->i2c->hdmatx = &tx_dma; - self->i2c->hdmarx = NULL; - MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len); - status = HAL_I2C_Mem_Write_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len); - if (status == HAL_OK) { - status = i2c_wait_dma_finished(self->i2c, args[3].u_int); - } - dma_deinit(self->tx_dma_descr); - } - - if (status != HAL_OK) { - i2c_reset_after_error(self->i2c); - mp_hal_raise(status); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_write_obj, 1, pyb_i2c_mem_write); - -STATIC const mp_rom_map_elem_t pyb_i2c_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_i2c_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_i2c_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_is_ready), MP_ROM_PTR(&pyb_i2c_is_ready_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&pyb_i2c_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_i2c_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_i2c_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem_read), MP_ROM_PTR(&pyb_i2c_mem_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem_write), MP_ROM_PTR(&pyb_i2c_mem_write_obj) }, - - // class constants - /// \constant MASTER - for initialising the bus to master mode - /// \constant SLAVE - for initialising the bus to slave mode - { MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(PYB_I2C_MASTER) }, - { MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(PYB_I2C_SLAVE) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_i2c_locals_dict, pyb_i2c_locals_dict_table); - -const mp_obj_type_t pyb_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = pyb_i2c_print, - .make_new = pyb_i2c_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_i2c_locals_dict, -}; diff --git a/ports/stm32/i2c.h b/ports/stm32/i2c.h deleted file mode 100644 index 6affe3973b10d..0000000000000 --- a/ports/stm32/i2c.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_I2C_H -#define MICROPY_INCLUDED_STMHAL_I2C_H - -#include "dma.h" - -// use this for OwnAddress1 to configure I2C in master mode -#define PYB_I2C_MASTER_ADDRESS (0xfe) - -typedef struct _pyb_i2c_obj_t { - mp_obj_base_t base; - I2C_HandleTypeDef *i2c; - const dma_descr_t *tx_dma_descr; - const dma_descr_t *rx_dma_descr; - bool *use_dma; -} pyb_i2c_obj_t; - -extern I2C_HandleTypeDef I2CHandle1; -extern I2C_HandleTypeDef I2CHandle2; -extern I2C_HandleTypeDef I2CHandle3; -extern const mp_obj_type_t pyb_i2c_type; -extern const pyb_i2c_obj_t pyb_i2c_obj[4]; - -void i2c_init0(void); -void i2c_init(I2C_HandleTypeDef *i2c); -void i2c_init_freq(const pyb_i2c_obj_t *self, mp_int_t freq); -uint32_t i2c_get_baudrate(I2C_InitTypeDef *init); -void i2c_ev_irq_handler(mp_uint_t i2c_id); -void i2c_er_irq_handler(mp_uint_t i2c_id); - -#endif // MICROPY_INCLUDED_STMHAL_I2C_H diff --git a/ports/stm32/irq.c b/ports/stm32/irq.c deleted file mode 100644 index 7298a4b504c75..0000000000000 --- a/ports/stm32/irq.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/obj.h" -#include "py/mphal.h" -#include "irq.h" - -/// \moduleref pyb - -#if IRQ_ENABLE_STATS -uint32_t irq_stats[FPU_IRQn + 1] = {0}; -#endif - -/// \function wfi() -/// Wait for an interrupt. -/// This executies a `wfi` instruction which reduces power consumption -/// of the MCU until an interrupt occurs, at which point execution continues. -STATIC mp_obj_t pyb_wfi(void) { - __WFI(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_wfi_obj, pyb_wfi); - -/// \function disable_irq() -/// Disable interrupt requests. -/// Returns the previous IRQ state: `False`/`True` for disabled/enabled IRQs -/// respectively. This return value can be passed to enable_irq to restore -/// the IRQ to its original state. -STATIC mp_obj_t pyb_disable_irq(void) { - return mp_obj_new_bool(disable_irq() == IRQ_STATE_ENABLED); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_disable_irq_obj, pyb_disable_irq); - -/// \function enable_irq(state=True) -/// Enable interrupt requests. -/// If `state` is `True` (the default value) then IRQs are enabled. -/// If `state` is `False` then IRQs are disabled. The most common use of -/// this function is to pass it the value returned by `disable_irq` to -/// exit a critical section. -STATIC mp_obj_t pyb_enable_irq(uint n_args, const mp_obj_t *arg) { - enable_irq((n_args == 0 || mp_obj_is_true(arg[0])) ? IRQ_STATE_ENABLED : IRQ_STATE_DISABLED); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_enable_irq_obj, 0, 1, pyb_enable_irq); - -#if IRQ_ENABLE_STATS -// return a memoryview of the irq statistics array -STATIC mp_obj_t pyb_irq_stats(void) { - return mp_obj_new_memoryview(0x80 | 'I', MP_ARRAY_SIZE(irq_stats), &irq_stats[0]); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_irq_stats_obj, pyb_irq_stats); -#endif diff --git a/ports/stm32/irq.h b/ports/stm32/irq.h deleted file mode 100644 index 2cf58639ea012..0000000000000 --- a/ports/stm32/irq.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_IRQ_H -#define MICROPY_INCLUDED_STMHAL_IRQ_H - -// these states correspond to values from query_irq, enable_irq and disable_irq -#define IRQ_STATE_DISABLED (0x00000001) -#define IRQ_STATE_ENABLED (0x00000000) - -// Enable this to get a count for the number of times each irq handler is called, -// accessible via pyb.irq_stats(). -#define IRQ_ENABLE_STATS (0) - -#if IRQ_ENABLE_STATS -extern uint32_t irq_stats[FPU_IRQn + 1]; -#define IRQ_ENTER(irq) ++irq_stats[irq] -#define IRQ_EXIT(irq) -#else -#define IRQ_ENTER(irq) -#define IRQ_EXIT(irq) -#endif - -static inline mp_uint_t query_irq(void) { - return __get_PRIMASK(); -} - -// enable_irq and disable_irq are defined inline in mpconfigport.h - -#if __CORTEX_M >= 0x03 - -// irqs with a priority value greater or equal to "pri" will be disabled -// "pri" should be between 1 and 15 inclusive -static inline uint32_t raise_irq_pri(uint32_t pri) { - uint32_t basepri = __get_BASEPRI(); - // If non-zero, the processor does not process any exception with a - // priority value greater than or equal to BASEPRI. - // When writing to BASEPRI_MAX the write goes to BASEPRI only if either: - // - Rn is non-zero and the current BASEPRI value is 0 - // - Rn is non-zero and less than the current BASEPRI value - pri <<= (8 - __NVIC_PRIO_BITS); - __ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory"); - return basepri; -} - -// "basepri" should be the value returned from raise_irq_pri -static inline void restore_irq_pri(uint32_t basepri) { - __set_BASEPRI(basepri); -} - -#endif - -MP_DECLARE_CONST_FUN_OBJ_0(pyb_wfi_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_disable_irq_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_enable_irq_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj); - -// IRQ priority definitions. -// -// Lower number implies higher interrupt priority. -// -// The default priority grouping is set to NVIC_PRIORITYGROUP_4 in the -// HAL_Init function. This corresponds to 4 bits for the priority field -// and 0 bits for the sub-priority field (which means that for all intensive -// purposes that the sub-priorities below are ignored). -// -// While a given interrupt is being processed, only higher priority (lower number) -// interrupts will preempt a given interrupt. If sub-priorities are active -// then the sub-priority determines the order that pending interrupts of -// a given priority are executed. This is only meaningful if 2 or more -// interrupts of the same priority are pending at the same time. -// -// The priority of the SysTick timer is determined from the TICK_INT_PRIORITY -// value which is normally set to 0 in the stm32f4xx_hal_conf.h file. -// -// The following interrupts are arranged from highest priority to lowest -// priority to make it a bit easier to figure out. - -// Priority Sub-Priority -// -------- ------------ -//#def IRQ_PRI_SYSTICK 0 -//#def IRQ_SUBPRI_SYSTICK 0 - -// The UARTs have no FIFOs, so if they don't get serviced quickly then characters -// get dropped. The handling for each character only consumes about 0.5 usec -#define IRQ_PRI_UART 1 -#define IRQ_SUBPRI_UART 0 - -// Flash IRQ must be higher priority than interrupts of all those components -// that rely on the flash storage. -#define IRQ_PRI_FLASH 2 -#define IRQ_SUBPRI_FLASH 0 - -// SDIO must be higher priority than DMA for SDIO DMA transfers to work. -#define IRQ_PRI_SDIO 4 -#define IRQ_SUBPRI_SDIO 0 - -// DMA should be higher priority than USB, since USB Mass Storage calls -// into the sdcard driver which waits for the DMA to complete. -#define IRQ_PRI_DMA 5 -#define IRQ_SUBPRI_DMA 0 - -#define IRQ_PRI_OTG_FS 6 -#define IRQ_SUBPRI_OTG_FS 0 - -#define IRQ_PRI_OTG_HS 6 -#define IRQ_SUBPRI_OTG_HS 0 - -#define IRQ_PRI_TIM5 6 -#define IRQ_SUBPRI_TIM5 0 - -#define IRQ_PRI_CAN 7 -#define IRQ_SUBPRI_CAN 0 - -// Interrupt priority for non-special timers. -#define IRQ_PRI_TIMX 13 -#define IRQ_SUBPRI_TIMX 0 - -#define IRQ_PRI_EXTINT 14 -#define IRQ_SUBPRI_EXTINT 0 - -// PENDSV should be at the lowst priority so that other interrupts complete -// before exception is raised. -#define IRQ_PRI_PENDSV 15 -#define IRQ_SUBPRI_PENDSV 0 - -#define IRQ_PRI_RTC_WKUP 15 -#define IRQ_SUBPRI_RTC_WKUP 0 - -#endif // MICROPY_INCLUDED_STMHAL_IRQ_H diff --git a/ports/stm32/lcd.c b/ports/stm32/lcd.c deleted file mode 100644 index 488df1699ce06..0000000000000 --- a/ports/stm32/lcd.c +++ /dev/null @@ -1,528 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/mphal.h" -#include "py/runtime.h" - -#if MICROPY_HW_HAS_LCD - -#include "pin.h" -#include "genhdr/pins.h" -#include "bufhelper.h" -#include "spi.h" -#include "font_petme128_8x8.h" -#include "lcd.h" - -/// \moduleref pyb -/// \class LCD - LCD control for the LCD touch-sensor pyskin -/// -/// The LCD class is used to control the LCD on the LCD touch-sensor pyskin, -/// LCD32MKv1.0. The LCD is a 128x32 pixel monochrome screen, part NHD-C12832A1Z. -/// -/// The pyskin must be connected in either the X or Y positions, and then -/// an LCD object is made using: -/// -/// lcd = pyb.LCD('X') # if pyskin is in the X position -/// lcd = pyb.LCD('Y') # if pyskin is in the Y position -/// -/// Then you can use: -/// -/// lcd.light(True) # turn the backlight on -/// lcd.write('Hello world!\n') # print text to the screen -/// -/// This driver implements a double buffer for setting/getting pixels. -/// For example, to make a bouncing dot, try: -/// -/// x = y = 0 -/// dx = dy = 1 -/// while True: -/// # update the dot's position -/// x += dx -/// y += dy -/// -/// # make the dot bounce of the edges of the screen -/// if x <= 0 or x >= 127: dx = -dx -/// if y <= 0 or y >= 31: dy = -dy -/// -/// lcd.fill(0) # clear the buffer -/// lcd.pixel(x, y, 1) # draw the dot -/// lcd.show() # show the buffer -/// pyb.delay(50) # pause for 50ms - -#define LCD_INSTR (0) -#define LCD_DATA (1) - -#define LCD_CHAR_BUF_W (16) -#define LCD_CHAR_BUF_H (4) - -#define LCD_PIX_BUF_W (128) -#define LCD_PIX_BUF_H (32) -#define LCD_PIX_BUF_BYTE_SIZE (LCD_PIX_BUF_W * LCD_PIX_BUF_H / 8) - -typedef struct _pyb_lcd_obj_t { - mp_obj_base_t base; - - // hardware control for the LCD - SPI_HandleTypeDef *spi; - const pin_obj_t *pin_cs1; - const pin_obj_t *pin_rst; - const pin_obj_t *pin_a0; - const pin_obj_t *pin_bl; - - // character buffer for stdout-like output - char char_buffer[LCD_CHAR_BUF_W * LCD_CHAR_BUF_H]; - int line; - int column; - int next_line; - - // double buffering for pixel buffer - byte pix_buf[LCD_PIX_BUF_BYTE_SIZE]; - byte pix_buf2[LCD_PIX_BUF_BYTE_SIZE]; -} pyb_lcd_obj_t; - -STATIC void lcd_delay(void) { - __asm volatile ("nop\nnop"); -} - -STATIC void lcd_out(pyb_lcd_obj_t *lcd, int instr_data, uint8_t i) { - lcd_delay(); - mp_hal_pin_low(lcd->pin_cs1); // CS=0; enable - if (instr_data == LCD_INSTR) { - mp_hal_pin_low(lcd->pin_a0); // A0=0; select instr reg - } else { - mp_hal_pin_high(lcd->pin_a0); // A0=1; select data reg - } - lcd_delay(); - HAL_SPI_Transmit(lcd->spi, &i, 1, 1000); - lcd_delay(); - mp_hal_pin_high(lcd->pin_cs1); // CS=1; disable -} - -// write a string to the LCD at the current cursor location -// output it straight away (doesn't use the pixel buffer) -STATIC void lcd_write_strn(pyb_lcd_obj_t *lcd, const char *str, unsigned int len) { - int redraw_min = lcd->line * LCD_CHAR_BUF_W + lcd->column; - int redraw_max = redraw_min; - for (; len > 0; len--, str++) { - // move to next line if needed - if (lcd->next_line) { - if (lcd->line + 1 < LCD_CHAR_BUF_H) { - lcd->line += 1; - } else { - lcd->line = LCD_CHAR_BUF_H - 1; - for (int i = 0; i < LCD_CHAR_BUF_W * (LCD_CHAR_BUF_H - 1); i++) { - lcd->char_buffer[i] = lcd->char_buffer[i + LCD_CHAR_BUF_W]; - } - for (int i = 0; i < LCD_CHAR_BUF_W; i++) { - lcd->char_buffer[LCD_CHAR_BUF_W * (LCD_CHAR_BUF_H - 1) + i] = ' '; - } - redraw_min = 0; - redraw_max = LCD_CHAR_BUF_W * LCD_CHAR_BUF_H; - } - lcd->next_line = 0; - lcd->column = 0; - } - if (*str == '\n') { - lcd->next_line = 1; - } else if (*str == '\r') { - lcd->column = 0; - } else if (*str == '\b') { - if (lcd->column > 0) { - lcd->column--; - redraw_min = 0; // could optimise this to not redraw everything - } - } else if (lcd->column >= LCD_CHAR_BUF_W) { - lcd->next_line = 1; - str -= 1; - len += 1; - } else { - lcd->char_buffer[lcd->line * LCD_CHAR_BUF_W + lcd->column] = *str; - lcd->column += 1; - int max = lcd->line * LCD_CHAR_BUF_W + lcd->column; - if (max > redraw_max) { - redraw_max = max; - } - } - } - - // we must draw upside down, because the LCD is upside down - for (int i = redraw_min; i < redraw_max; i++) { - uint page = i / LCD_CHAR_BUF_W; - uint offset = 8 * (LCD_CHAR_BUF_W - 1 - (i - (page * LCD_CHAR_BUF_W))); - lcd_out(lcd, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(lcd, LCD_INSTR, 0x10 | ((offset >> 4) & 0x0f)); // column address set upper - lcd_out(lcd, LCD_INSTR, 0x00 | (offset & 0x0f)); // column address set lower - int chr = lcd->char_buffer[i]; - if (chr < 32 || chr > 126) { - chr = 127; - } - const uint8_t *chr_data = &font_petme128_8x8[(chr - 32) * 8]; - for (int j = 7; j >= 0; j--) { - lcd_out(lcd, LCD_DATA, chr_data[j]); - } - } -} - -/// \classmethod \constructor(skin_position) -/// -/// Construct an LCD object in the given skin position. `skin_position` can be 'X' or 'Y', and -/// should match the position where the LCD pyskin is plugged in. -STATIC mp_obj_t pyb_lcd_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get LCD position - const char *lcd_id = mp_obj_str_get_str(args[0]); - - // create lcd object - pyb_lcd_obj_t *lcd = m_new_obj(pyb_lcd_obj_t); - lcd->base.type = &pyb_lcd_type; - - // configure pins - // TODO accept an SPI object and pin objects for full customisation - if ((lcd_id[0] | 0x20) == 'x' && lcd_id[1] == '\0') { - lcd->spi = &SPIHandle1; - lcd->pin_cs1 = &pyb_pin_X3; - lcd->pin_rst = &pyb_pin_X4; - lcd->pin_a0 = &pyb_pin_X5; - lcd->pin_bl = &pyb_pin_X12; - } else if ((lcd_id[0] | 0x20) == 'y' && lcd_id[1] == '\0') { - lcd->spi = &SPIHandle2; - lcd->pin_cs1 = &pyb_pin_Y3; - lcd->pin_rst = &pyb_pin_Y4; - lcd->pin_a0 = &pyb_pin_Y5; - lcd->pin_bl = &pyb_pin_Y12; - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LCD(%s) doesn't exist", lcd_id)); - } - - // init the SPI bus - SPI_InitTypeDef *init = &lcd->spi->Init; - init->Mode = SPI_MODE_MASTER; - - // compute the baudrate prescaler from the desired baudrate - // select a prescaler that yields at most the desired baudrate - uint spi_clock; - if (lcd->spi->Instance == SPI1) { - // SPI1 is on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } else { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } - uint br_prescale = spi_clock / 16000000; // datasheet says LCD can run at 20MHz, but we go for 16MHz - if (br_prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; } - else if (br_prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; } - else if (br_prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; } - else if (br_prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; } - else if (br_prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; } - else if (br_prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; } - else if (br_prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; } - else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; } - - // data is sent bigendian, latches on rising clock - init->CLKPolarity = SPI_POLARITY_HIGH; - init->CLKPhase = SPI_PHASE_2EDGE; - init->Direction = SPI_DIRECTION_2LINES; - init->DataSize = SPI_DATASIZE_8BIT; - init->NSS = SPI_NSS_SOFT; - init->FirstBit = SPI_FIRSTBIT_MSB; - init->TIMode = SPI_TIMODE_DISABLED; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 0; - - // init the SPI bus - spi_init(lcd->spi, false); - - // set the pins to default values - mp_hal_pin_high(lcd->pin_cs1); - mp_hal_pin_high(lcd->pin_rst); - mp_hal_pin_high(lcd->pin_a0); - mp_hal_pin_low(lcd->pin_bl); - - // init the pins to be push/pull outputs - mp_hal_pin_output(lcd->pin_cs1); - mp_hal_pin_output(lcd->pin_rst); - mp_hal_pin_output(lcd->pin_a0); - mp_hal_pin_output(lcd->pin_bl); - - // init the LCD - mp_hal_delay_ms(1); // wait a bit - mp_hal_pin_low(lcd->pin_rst); // RST=0; reset - mp_hal_delay_ms(1); // wait for reset; 2us min - mp_hal_pin_high(lcd->pin_rst); // RST=1; enable - mp_hal_delay_ms(1); // wait for reset; 2us min - lcd_out(lcd, LCD_INSTR, 0xa0); // ADC select, normal - lcd_out(lcd, LCD_INSTR, 0xc0); // common output mode select, normal (this flips the display) - lcd_out(lcd, LCD_INSTR, 0xa2); // LCD bias set, 1/9 bias - lcd_out(lcd, LCD_INSTR, 0x2f); // power control set, 0b111=(booster on, vreg on, vfollow on) - lcd_out(lcd, LCD_INSTR, 0x21); // v0 voltage regulator internal resistor ratio set, 0b001=small - lcd_out(lcd, LCD_INSTR, 0x81); // electronic volume mode set - lcd_out(lcd, LCD_INSTR, 0x28); // electronic volume register set - lcd_out(lcd, LCD_INSTR, 0x40); // display start line set, 0 - lcd_out(lcd, LCD_INSTR, 0xaf); // LCD display, on - - // clear LCD RAM - for (int page = 0; page < 4; page++) { - lcd_out(lcd, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(lcd, LCD_INSTR, 0x10); // column address set upper - lcd_out(lcd, LCD_INSTR, 0x00); // column address set lower - for (int i = 0; i < 128; i++) { - lcd_out(lcd, LCD_DATA, 0x00); - } - } - - // clear local char buffer - memset(lcd->char_buffer, ' ', LCD_CHAR_BUF_H * LCD_CHAR_BUF_W); - lcd->line = 0; - lcd->column = 0; - lcd->next_line = 0; - - // clear local pixel buffer - memset(lcd->pix_buf, 0, LCD_PIX_BUF_BYTE_SIZE); - memset(lcd->pix_buf2, 0, LCD_PIX_BUF_BYTE_SIZE); - - return lcd; -} - -/// \method command(instr_data, buf) -/// -/// Send an arbitrary command to the LCD. Pass 0 for `instr_data` to send an -/// instruction, otherwise pass 1 to send data. `buf` is a buffer with the -/// instructions/data to send. -STATIC mp_obj_t pyb_lcd_command(mp_obj_t self_in, mp_obj_t instr_data_in, mp_obj_t val) { - pyb_lcd_obj_t *self = self_in; - - // get whether instr or data - int instr_data = mp_obj_get_int(instr_data_in); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(val, &bufinfo, data); - - // send the data - for (uint i = 0; i < bufinfo.len; i++) { - lcd_out(self, instr_data, ((byte*)bufinfo.buf)[i]); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_lcd_command_obj, pyb_lcd_command); - -/// \method contrast(value) -/// -/// Set the contrast of the LCD. Valid values are between 0 and 47. -STATIC mp_obj_t pyb_lcd_contrast(mp_obj_t self_in, mp_obj_t contrast_in) { - pyb_lcd_obj_t *self = self_in; - int contrast = mp_obj_get_int(contrast_in); - if (contrast < 0) { - contrast = 0; - } else if (contrast > 0x2f) { - contrast = 0x2f; - } - lcd_out(self, LCD_INSTR, 0x81); // electronic volume mode set - lcd_out(self, LCD_INSTR, contrast); // electronic volume register set - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_contrast_obj, pyb_lcd_contrast); - -/// \method light(value) -/// -/// Turn the backlight on/off. True or 1 turns it on, False or 0 turns it off. -STATIC mp_obj_t pyb_lcd_light(mp_obj_t self_in, mp_obj_t value) { - pyb_lcd_obj_t *self = self_in; - if (mp_obj_is_true(value)) { - mp_hal_pin_high(self->pin_bl); // set pin high to turn backlight on - } else { - mp_hal_pin_low(self->pin_bl); // set pin low to turn backlight off - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_light_obj, pyb_lcd_light); - -/// \method write(str) -/// -/// Write the string `str` to the screen. It will appear immediately. -STATIC mp_obj_t pyb_lcd_write(mp_obj_t self_in, mp_obj_t str) { - pyb_lcd_obj_t *self = self_in; - size_t len; - const char *data = mp_obj_str_get_data(str, &len); - lcd_write_strn(self, data, len); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_write_obj, pyb_lcd_write); - -/// \method fill(colour) -/// -/// Fill the screen with the given colour (0 or 1 for white or black). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_fill(mp_obj_t self_in, mp_obj_t col_in) { - pyb_lcd_obj_t *self = self_in; - int col = mp_obj_get_int(col_in); - if (col) { - col = 0xff; - } - memset(self->pix_buf, col, LCD_PIX_BUF_BYTE_SIZE); - memset(self->pix_buf2, col, LCD_PIX_BUF_BYTE_SIZE); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_lcd_fill_obj, pyb_lcd_fill); - -/// \method get(x, y) -/// -/// Get the pixel at the position `(x, y)`. Returns 0 or 1. -/// -/// This method reads from the visible buffer. -STATIC mp_obj_t pyb_lcd_get(mp_obj_t self_in, mp_obj_t x_in, mp_obj_t y_in) { - pyb_lcd_obj_t *self = self_in; - int x = mp_obj_get_int(x_in); - int y = mp_obj_get_int(y_in); - if (0 <= x && x <= 127 && 0 <= y && y <= 31) { - uint byte_pos = x + 128 * ((uint)y >> 3); - if (self->pix_buf[byte_pos] & (1 << (y & 7))) { - return mp_obj_new_int(1); - } - } - return mp_obj_new_int(0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_lcd_get_obj, pyb_lcd_get); - -/// \method pixel(x, y, colour) -/// -/// Set the pixel at `(x, y)` to the given colour (0 or 1). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_pixel(size_t n_args, const mp_obj_t *args) { - pyb_lcd_obj_t *self = args[0]; - int x = mp_obj_get_int(args[1]); - int y = mp_obj_get_int(args[2]); - if (0 <= x && x <= 127 && 0 <= y && y <= 31) { - uint byte_pos = x + 128 * ((uint)y >> 3); - if (mp_obj_get_int(args[3]) == 0) { - self->pix_buf2[byte_pos] &= ~(1 << (y & 7)); - } else { - self->pix_buf2[byte_pos] |= 1 << (y & 7); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_lcd_pixel_obj, 4, 4, pyb_lcd_pixel); - -/// \method text(str, x, y, colour) -/// -/// Draw the given text to the position `(x, y)` using the given colour (0 or 1). -/// -/// This method writes to the hidden buffer. Use `show()` to show the buffer. -STATIC mp_obj_t pyb_lcd_text(size_t n_args, const mp_obj_t *args) { - // extract arguments - pyb_lcd_obj_t *self = args[0]; - size_t len; - const char *data = mp_obj_str_get_data(args[1], &len); - int x0 = mp_obj_get_int(args[2]); - int y0 = mp_obj_get_int(args[3]); - int col = mp_obj_get_int(args[4]); - - // loop over chars - for (const char *top = data + len; data < top; data++) { - // get char and make sure its in range of font - uint chr = *(byte*)data; - if (chr < 32 || chr > 127) { - chr = 127; - } - // get char data - const uint8_t *chr_data = &font_petme128_8x8[(chr - 32) * 8]; - // loop over char data - for (uint j = 0; j < 8; j++, x0++) { - if (0 <= x0 && x0 < LCD_PIX_BUF_W) { // clip x - uint vline_data = chr_data[j]; // each byte of char data is a vertical column of 8 pixels, LSB at top - for (int y = y0; vline_data; vline_data >>= 1, y++) { // scan over vertical column - if (vline_data & 1) { // only draw if pixel set - if (0 <= y && y < LCD_PIX_BUF_H) { // clip y - uint byte_pos = x0 + LCD_PIX_BUF_W * ((uint)y >> 3); - if (col == 0) { - // clear pixel - self->pix_buf2[byte_pos] &= ~(1 << (y & 7)); - } else { - // set pixel - self->pix_buf2[byte_pos] |= 1 << (y & 7); - } - } - } - } - } - } - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_lcd_text_obj, 5, 5, pyb_lcd_text); - -/// \method show() -/// -/// Show the hidden buffer on the screen. -STATIC mp_obj_t pyb_lcd_show(mp_obj_t self_in) { - pyb_lcd_obj_t *self = self_in; - memcpy(self->pix_buf, self->pix_buf2, LCD_PIX_BUF_BYTE_SIZE); - for (uint page = 0; page < 4; page++) { - lcd_out(self, LCD_INSTR, 0xb0 | page); // page address set - lcd_out(self, LCD_INSTR, 0x10); // column address set upper; 0 - lcd_out(self, LCD_INSTR, 0x00); // column address set lower; 0 - for (uint i = 0; i < 128; i++) { - lcd_out(self, LCD_DATA, self->pix_buf[128 * page + 127 - i]); - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_lcd_show_obj, pyb_lcd_show); - -STATIC const mp_rom_map_elem_t pyb_lcd_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_command), MP_ROM_PTR(&pyb_lcd_command_obj) }, - { MP_ROM_QSTR(MP_QSTR_contrast), MP_ROM_PTR(&pyb_lcd_contrast_obj) }, - { MP_ROM_QSTR(MP_QSTR_light), MP_ROM_PTR(&pyb_lcd_light_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_lcd_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_fill), MP_ROM_PTR(&pyb_lcd_fill_obj) }, - { MP_ROM_QSTR(MP_QSTR_get), MP_ROM_PTR(&pyb_lcd_get_obj) }, - { MP_ROM_QSTR(MP_QSTR_pixel), MP_ROM_PTR(&pyb_lcd_pixel_obj) }, - { MP_ROM_QSTR(MP_QSTR_text), MP_ROM_PTR(&pyb_lcd_text_obj) }, - { MP_ROM_QSTR(MP_QSTR_show), MP_ROM_PTR(&pyb_lcd_show_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_lcd_locals_dict, pyb_lcd_locals_dict_table); - -const mp_obj_type_t pyb_lcd_type = { - { &mp_type_type }, - .name = MP_QSTR_LCD, - .make_new = pyb_lcd_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_lcd_locals_dict, -}; - -#endif // MICROPY_HW_HAS_LCD diff --git a/ports/stm32/lcd.h b/ports/stm32/lcd.h deleted file mode 100644 index c0d9bd97da210..0000000000000 --- a/ports/stm32/lcd.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_LCD_H -#define MICROPY_INCLUDED_STMHAL_LCD_H - -extern const mp_obj_type_t pyb_lcd_type; - -#endif // MICROPY_INCLUDED_STMHAL_LCD_H diff --git a/ports/stm32/led.c b/ports/stm32/led.c deleted file mode 100644 index 9bbcaa6b30d29..0000000000000 --- a/ports/stm32/led.c +++ /dev/null @@ -1,377 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "timer.h" -#include "led.h" -#include "pin.h" -#include "genhdr/pins.h" - -#if defined(MICROPY_HW_LED1) - -/// \moduleref pyb -/// \class LED - LED object -/// -/// The LED object controls an individual LED (Light Emitting Diode). - -// the default is that LEDs are not inverted, and pin driven high turns them on -#ifndef MICROPY_HW_LED_INVERTED -#define MICROPY_HW_LED_INVERTED (0) -#endif - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; - mp_uint_t led_id; - const pin_obj_t *led_pin; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}, 1, &MICROPY_HW_LED1}, -#if defined(MICROPY_HW_LED2) - {{&pyb_led_type}, 2, &MICROPY_HW_LED2}, -#if defined(MICROPY_HW_LED3) - {{&pyb_led_type}, 3, &MICROPY_HW_LED3}, -#if defined(MICROPY_HW_LED4) - {{&pyb_led_type}, 4, &MICROPY_HW_LED4}, -#endif -#endif -#endif -}; -#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj) - -void led_init(void) { - /* Turn off LEDs and initialize */ - for (int led = 0; led < NUM_LEDS; led++) { - const pin_obj_t *led_pin = pyb_led_obj[led].led_pin; - mp_hal_gpio_clock_enable(led_pin->gpio); - MICROPY_HW_LED_OFF(led_pin); - mp_hal_pin_output(led_pin); - } -} - -#if defined(MICROPY_HW_LED1_PWM) \ - || defined(MICROPY_HW_LED2_PWM) \ - || defined(MICROPY_HW_LED3_PWM) \ - || defined(MICROPY_HW_LED4_PWM) - -// The following is semi-generic code to control LEDs using PWM. -// It currently supports TIM1, TIM2 and TIM3, channels 1-4. -// Configure by defining the relevant MICROPY_HW_LEDx_PWM macros in mpconfigboard.h. -// If they are not defined then PWM will not be available for that LED. - -#define LED_PWM_ENABLED (1) - -#ifndef MICROPY_HW_LED1_PWM -#define MICROPY_HW_LED1_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED2_PWM -#define MICROPY_HW_LED2_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED3_PWM -#define MICROPY_HW_LED3_PWM { NULL, 0, 0, 0 } -#endif -#ifndef MICROPY_HW_LED4_PWM -#define MICROPY_HW_LED4_PWM { NULL, 0, 0, 0 } -#endif - -#define LED_PWM_TIM_PERIOD (10000) // TIM runs at 1MHz and fires every 10ms - -// this gives the address of the CCR register for channels 1-4 -#define LED_PWM_CCR(pwm_cfg) ((volatile uint32_t*)&(pwm_cfg)->tim->CCR1 + ((pwm_cfg)->tim_channel >> 2)) - -typedef struct _led_pwm_config_t { - TIM_TypeDef *tim; - uint8_t tim_id; - uint8_t tim_channel; - uint8_t alt_func; -} led_pwm_config_t; - -STATIC const led_pwm_config_t led_pwm_config[] = { - MICROPY_HW_LED1_PWM, - MICROPY_HW_LED2_PWM, - MICROPY_HW_LED3_PWM, - MICROPY_HW_LED4_PWM, -}; - -STATIC uint8_t led_pwm_state = 0; - -static inline bool led_pwm_is_enabled(int led) { - return (led_pwm_state & (1 << led)) != 0; -} - -// this function has a large stack so it should not be inlined -STATIC void led_pwm_init(int led) __attribute__((noinline)); -STATIC void led_pwm_init(int led) { - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - - // GPIO configuration - mp_hal_pin_config(led_pin, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, pwm_cfg->alt_func); - - // TIM configuration - switch (pwm_cfg->tim_id) { - case 1: __TIM1_CLK_ENABLE(); break; - case 2: __TIM2_CLK_ENABLE(); break; - case 3: __TIM3_CLK_ENABLE(); break; - default: assert(0); - } - TIM_HandleTypeDef tim = {0}; - tim.Instance = pwm_cfg->tim; - tim.Init.Period = LED_PWM_TIM_PERIOD - 1; - tim.Init.Prescaler = timer_get_source_freq(pwm_cfg->tim_id) / 1000000 - 1; // TIM runs at 1MHz - tim.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - tim.Init.CounterMode = TIM_COUNTERMODE_UP; - tim.Init.RepetitionCounter = 0; - HAL_TIM_PWM_Init(&tim); - - // PWM configuration - TIM_OC_InitTypeDef oc_init; - oc_init.OCMode = TIM_OCMODE_PWM1; - oc_init.Pulse = 0; // off - oc_init.OCPolarity = MICROPY_HW_LED_INVERTED ? TIM_OCPOLARITY_LOW : TIM_OCPOLARITY_HIGH; - oc_init.OCFastMode = TIM_OCFAST_DISABLE; - oc_init.OCNPolarity = TIM_OCNPOLARITY_HIGH; // needed for TIM1 and TIM8 - oc_init.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 - oc_init.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 - HAL_TIM_PWM_ConfigChannel(&tim, &oc_init, pwm_cfg->tim_channel); - HAL_TIM_PWM_Start(&tim, pwm_cfg->tim_channel); - - // indicate that this LED is using PWM - led_pwm_state |= 1 << led; -} - -STATIC void led_pwm_deinit(int led) { - // make the LED's pin a standard GPIO output pin - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *g = led_pin->gpio; - uint32_t pin = led_pin->pin; - static const int mode = 1; // output - static const int alt = 0; // no alt func - g->MODER = (g->MODER & ~(3 << (2 * pin))) | (mode << (2 * pin)); - g->AFR[pin >> 3] = (g->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); - led_pwm_state &= ~(1 << led); -} - -#else -#define LED_PWM_ENABLED (0) -#endif - -void led_state(pyb_led_t led, int state) { - if (led < 1 || led > NUM_LEDS) { - return; - } - - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - //printf("led_state(%d,%d)\n", led, state); - if (state == 0) { - // turn LED off - MICROPY_HW_LED_OFF(led_pin); - } else { - // turn LED on - MICROPY_HW_LED_ON(led_pin); - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - led_pwm_deinit(led); - } - #endif -} - -void led_toggle(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return; - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - // if PWM is enabled then LED has non-zero intensity, so turn it off - led_state(led, 0); - return; - } - #endif - - // toggle the output data register to toggle the LED state - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - led_pin->gpio->ODR ^= led_pin->pin_mask; -} - -int led_get_intensity(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return 0; - } - - #if LED_PWM_ENABLED - if (led_pwm_is_enabled(led)) { - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - mp_uint_t i = (*LED_PWM_CCR(pwm_cfg) * 255 + LED_PWM_TIM_PERIOD - 2) / (LED_PWM_TIM_PERIOD - 1); - if (i > 255) { - i = 255; - } - return i; - } - #endif - - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *gpio = led_pin->gpio; - - if (gpio->ODR & led_pin->pin_mask) { - // pin is high - return MICROPY_HW_LED_INVERTED ? 0 : 255; - } else { - // pin is low - return MICROPY_HW_LED_INVERTED ? 255 : 0; - } -} - -void led_set_intensity(pyb_led_t led, mp_int_t intensity) { - #if LED_PWM_ENABLED - if (intensity > 0 && intensity < 255) { - const led_pwm_config_t *pwm_cfg = &led_pwm_config[led - 1]; - if (pwm_cfg->tim != NULL) { - // set intensity using PWM pulse width - if (!led_pwm_is_enabled(led)) { - led_pwm_init(led); - } - *LED_PWM_CCR(pwm_cfg) = intensity * (LED_PWM_TIM_PERIOD - 1) / 255; - return; - } - } - #endif - - // intensity not supported for this LED; just turn it on/off - led_state(led, intensity > 0); -} - -void led_debug(int n, int delay) { - led_state(1, n & 1); - led_state(2, n & 2); - led_state(3, n & 4); - led_state(4, n & 8); - mp_hal_delay_ms(delay); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - mp_printf(print, "LED(%lu)", self->led_id); -} - -/// \classmethod \constructor(id) -/// Create an LED object associated with the given LED: -/// -/// - `id` is the LED number, 1-4. -STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get led number - mp_int_t led_id = mp_obj_get_int(args[0]); - - // check led number - if (!(1 <= led_id && led_id <= NUM_LEDS)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED(%d) doesn't exist", led_id)); - } - - // return static led object - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -/// \method on() -/// Turn the LED on. -mp_obj_t led_obj_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 1); - return mp_const_none; -} - -/// \method off() -/// Turn the LED off. -mp_obj_t led_obj_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 0); - return mp_const_none; -} - -/// \method toggle() -/// Toggle the LED between on and off. -mp_obj_t led_obj_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(self->led_id); - return mp_const_none; -} - -/// \method intensity([value]) -/// Get or set the LED intensity. Intensity ranges between 0 (off) and 255 (full on). -/// If no argument is given, return the LED intensity. -/// If an argument is given, set the LED intensity and return `None`. -mp_obj_t led_obj_intensity(size_t n_args, const mp_obj_t *args) { - pyb_led_obj_t *self = args[0]; - if (n_args == 1) { - return mp_obj_new_int(led_get_intensity(self->led_id)); - } else { - led_set_intensity(self->led_id, mp_obj_get_int(args[1])); - return mp_const_none; - } -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle); -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(led_obj_intensity_obj, 1, 2, led_obj_intensity); - -STATIC const mp_rom_map_elem_t led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) }, - { MP_ROM_QSTR(MP_QSTR_intensity), MP_ROM_PTR(&led_obj_intensity_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = led_obj_print, - .make_new = led_obj_make_new, - .locals_dict = (mp_obj_dict_t*)&led_locals_dict, -}; - -#else -// For boards with no LEDs, we leave an empty function here so that we don't -// have to put conditionals everywhere. -void led_init(void) { -} -void led_state(pyb_led_t led, int state) { -} -void led_toggle(pyb_led_t led) { -} -#endif // defined(MICROPY_HW_LED1) diff --git a/ports/stm32/led.h b/ports/stm32/led.h deleted file mode 100644 index f1b05d1e28270..0000000000000 --- a/ports/stm32/led.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_LED_H -#define MICROPY_INCLUDED_STMHAL_LED_H - -typedef enum { - // PYBv3 - PYB_LED_R1 = 1, - PYB_LED_R2 = 2, - PYB_LED_G1 = 3, - PYB_LED_G2 = 4, - // PYBv4 - PYB_LED_RED = 1, - PYB_LED_GREEN = 2, - PYB_LED_YELLOW = 3, - PYB_LED_BLUE = 4, - //STM32F4DISC - PYB_LED_R = 1, - PYB_LED_G = 2, - PYB_LED_B = 3, - PYB_LED_O = 4, -} pyb_led_t; - -void led_init(void); -void led_state(pyb_led_t led, int state); -void led_toggle(pyb_led_t led); -void led_debug(int value, int delay); - -extern const mp_obj_type_t pyb_led_type; - -#endif // MICROPY_INCLUDED_STMHAL_LED_H diff --git a/ports/stm32/machine_i2c.c b/ports/stm32/machine_i2c.c deleted file mode 100644 index 1be2151e3bd75..0000000000000 --- a/ports/stm32/machine_i2c.c +++ /dev/null @@ -1,550 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "py/mperrno.h" -#include "extmod/machine_i2c.h" -#include "genhdr/pins.h" -#include "i2c.h" - -STATIC const mp_obj_type_t machine_hard_i2c_type; - -#if defined(MCU_SERIES_F4) - -// F4xx specific driver for I2C hardware peripheral -// The hardware-specific I2C code below is based heavily on the code from -// V1.5.2 of the STM32 CUBE F4 HAL. Its copyright notice is given here. -/* -* COPYRIGHT(c) 2016 STMicroelectronics -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* 1. Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* 2. Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* 3. Neither the name of STMicroelectronics nor the names of its contributors -* may be used to endorse or promote products derived from this software -* without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -typedef struct _machine_hard_i2c_obj_t { - mp_obj_base_t base; - const pyb_i2c_obj_t *pyb; - uint32_t *timeout; -} machine_hard_i2c_obj_t; - -STATIC uint32_t machine_hard_i2c_timeout[4]; - -STATIC const machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - {{&machine_hard_i2c_type}, &pyb_i2c_obj[0], &machine_hard_i2c_timeout[0]}, - {{&machine_hard_i2c_type}, &pyb_i2c_obj[1], &machine_hard_i2c_timeout[1]}, - {{&machine_hard_i2c_type}, &pyb_i2c_obj[2], &machine_hard_i2c_timeout[2]}, - {{&machine_hard_i2c_type}, &pyb_i2c_obj[3], &machine_hard_i2c_timeout[3]}, -}; - -STATIC void machine_hard_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "I2C(%u, freq=%u, timeout=%u)", - self - &machine_hard_i2c_obj[0] + 1, - i2c_get_baudrate(&self->pyb->i2c->Init), - *self->timeout); -} - -STATIC void machine_hard_i2c_init(const machine_hard_i2c_obj_t *self, uint32_t freq, uint32_t timeout) { - *self->timeout = timeout; - i2c_init_freq(self->pyb, freq); -} - -// this function is based on STM code -STATIC bool I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) { - /* Clear NACKF Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - return true; - } - return false; -} - -// this function is based on STM code -STATIC bool I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - /* Wait until flag is set */ - while ((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) { - if (Timeout != HAL_MAX_DELAY) { - if ((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) { - return false; - } - } - } - return true; -} - -// this function is based on STM code -STATIC int I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) { - /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) { - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - return -MP_EBUSY; - } - - /* Check for the Timeout */ - if ((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) { - return -MP_ETIMEDOUT; - } - } - return 0; -} - -// this function is based on STM code -STATIC int send_addr_byte(I2C_HandleTypeDef *hi2c, uint8_t addr_byte, uint32_t Timeout, uint32_t Tickstart) { - /* Generate Start */ - hi2c->Instance->CR1 |= I2C_CR1_START; - - /* Wait until SB flag is set */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart)) { - return -MP_ETIMEDOUT; - } - - /* Send slave address */ - hi2c->Instance->DR = addr_byte; - - /* Wait until ADDR flag is set */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) { - // nack received for addr, release the bus cleanly - hi2c->Instance->CR1 |= I2C_CR1_STOP; - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - return -MP_ENODEV; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) { - if ((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) { - return -MP_ETIMEDOUT; - } - } - } - - return 0; -} - -// this function is based on STM code -int machine_hard_i2c_readfrom(mp_obj_base_t *self_in, uint16_t addr, uint8_t *dest, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t*)self_in; - I2C_HandleTypeDef *hi2c = self->pyb->i2c; - uint32_t Timeout = *self->timeout; - - /* Init tickstart for timeout management*/ - uint32_t tickstart = HAL_GetTick(); - -#if 0 - // TODO: for multi-master, here we could wait for the bus to be free - // we'd need a flag to tell if we were in the middle of a set of transactions - // (ie didn't send a stop bit in the last call) - /* Wait until BUSY flag is reset */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart)) { - return -MP_EBUSY; - } -#endif - - /* Check if the I2C is already enabled */ - if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) { - /* Enable I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - } - - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - - /* Enable Acknowledge */ - hi2c->Instance->CR1 |= I2C_CR1_ACK; - - /* Send Slave Address */ - int ret = send_addr_byte(hi2c, I2C_7BIT_ADD_READ(addr << 1), Timeout, tickstart); - if (ret != 0) { - return ret; - } - - if (len == 0U) { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - - /* Generate Stop */ - if (stop) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - } else if (len == 1U) { - /* Disable Acknowledge */ - hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - - /* Generate Stop */ - if (stop) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - } else if (len == 2U) { - /* Disable Acknowledge */ - hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - - /* Enable Pos */ - hi2c->Instance->CR1 |= I2C_CR1_POS; - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - } else { - /* Enable Acknowledge */ - hi2c->Instance->CR1 |= I2C_CR1_ACK; - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - } - - while (len > 0U) { - if (len <= 3U) { - if (len == 1U) { - /* Wait until RXNE flag is set */ - int ret = I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart); - if (ret != 0) { - return ret; - } - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - } else if (len == 2U) { - /* Wait until BTF flag is set */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart)) { - return -MP_ETIMEDOUT; - } - - /* Generate Stop */ - if (stop) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - } else { - /* Wait until BTF flag is set */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart)) { - return -MP_ETIMEDOUT; - } - - /* Disable Acknowledge */ - hi2c->Instance->CR1 &= ~I2C_CR1_ACK; - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - - /* Wait until BTF flag is set */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart)) { - return -MP_ETIMEDOUT; - } - - /* Generate Stop */ - if (stop) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - } - } else { - /* Wait until RXNE flag is set */ - int ret = I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart); - if (ret != 0) { - return ret; - } - - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) { - /* Read data from DR */ - *dest++ = hi2c->Instance->DR; - len--; - } - } - } - - return 0; -} - -// this function is based on STM code -int machine_hard_i2c_writeto(mp_obj_base_t *self_in, uint16_t addr, const uint8_t *src, size_t len, bool stop) { - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t*)self_in; - I2C_HandleTypeDef *hi2c = self->pyb->i2c; - uint32_t Timeout = *self->timeout; - - /* Init tickstart for timeout management*/ - uint32_t tickstart = HAL_GetTick(); - -#if 0 - // TODO: for multi-master, here we could wait for the bus to be free - // we'd need a flag to tell if we were in the middle of a set of transactions - // (ie didn't send a stop bit in the last call) - /* Wait until BUSY flag is reset */ - if (!I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart)) { - return -MP_EBUSY; - } -#endif - - /* Check if the I2C is already enabled */ - if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) { - /* Enable I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - } - - /* Disable Pos */ - hi2c->Instance->CR1 &= ~I2C_CR1_POS; - - /* Send Slave Address */ - int ret = send_addr_byte(hi2c, I2C_7BIT_ADD_WRITE(addr << 1), Timeout, tickstart); - if (ret != 0) { - return ret; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - - int num_acks = 0; - - while (len > 0U) { - /* Wait until TXE flag is set */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c)) { - goto nack; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) { - if ((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) { - goto timeout; - } - } - } - - /* Write data to DR */ - hi2c->Instance->DR = *src++; - len--; - - /* Wait until BTF flag is set */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c)) { - goto nack; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) { - if ((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) { - goto timeout; - } - } - } - ++num_acks; - } -nack: - - /* Generate Stop */ - if (stop) { - hi2c->Instance->CR1 |= I2C_CR1_STOP; - } - - return num_acks; - -timeout: - // timeout, release the bus cleanly - hi2c->Instance->CR1 |= I2C_CR1_STOP; - return -MP_ETIMEDOUT; -} - -#else - -// No hardware I2C driver for this MCU so use the software implementation - -typedef mp_machine_soft_i2c_obj_t machine_hard_i2c_obj_t; - -STATIC machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - #if defined(MICROPY_HW_I2C1_SCL) - {{&machine_hard_i2c_type}, 1, 500, &MICROPY_HW_I2C1_SCL, &MICROPY_HW_I2C1_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C2_SCL) - {{&machine_hard_i2c_type}, 1, 500, &MICROPY_HW_I2C2_SCL, &MICROPY_HW_I2C2_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C3_SCL) - {{&machine_hard_i2c_type}, 1, 500, &MICROPY_HW_I2C3_SCL, &MICROPY_HW_I2C3_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif - #if defined(MICROPY_HW_I2C4_SCL) - {{&machine_hard_i2c_type}, 1, 500, &MICROPY_HW_I2C4_SCL, &MICROPY_HW_I2C4_SDA}, - #else - {{NULL}, 0, 0, NULL, NULL}, - #endif -}; - -STATIC void machine_hard_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "I2C(%u, scl=%q, sda=%q, freq=%u, timeout=%u)", - self - &machine_hard_i2c_obj[0] + 1, - self->scl->name, self->sda->name, 500000 / self->us_delay, self->us_timeout); -} - -STATIC void machine_hard_i2c_init(machine_hard_i2c_obj_t *self, uint32_t freq, uint32_t timeout) { - // set parameters - if (freq >= 1000000) { - // allow fastest possible bit-bang rate - self->us_delay = 0; - } else { - self->us_delay = 500000 / freq; - if (self->us_delay == 0) { - self->us_delay = 1; - } - } - - self->us_timeout = timeout; - - // init pins - mp_hal_pin_open_drain(self->scl); - mp_hal_pin_open_drain(self->sda); -} - -#define machine_hard_i2c_readfrom mp_machine_soft_i2c_readfrom -#define machine_hard_i2c_writeto mp_machine_soft_i2c_writeto - -#endif - -/******************************************************************************/ -/* MicroPython bindings for machine API */ - -mp_obj_t machine_hard_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse args - enum { ARG_id, ARG_scl, ARG_sda, ARG_freq, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_scl, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_sda, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // work out i2c bus - int i2c_id = 0; - if (MP_OBJ_IS_STR(args[ARG_id].u_obj)) { - const char *port = mp_obj_str_get_str(args[ARG_id].u_obj); - if (0) { - #ifdef MICROPY_HW_I2C1_NAME - } else if (strcmp(port, MICROPY_HW_I2C1_NAME) == 0) { - i2c_id = 1; - #endif - #ifdef MICROPY_HW_I2C2_NAME - } else if (strcmp(port, MICROPY_HW_I2C2_NAME) == 0) { - i2c_id = 2; - #endif - #ifdef MICROPY_HW_I2C3_NAME - } else if (strcmp(port, MICROPY_HW_I2C3_NAME) == 0) { - i2c_id = 3; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%s) doesn't exist", port)); - } - } else { - i2c_id = mp_obj_get_int(args[ARG_id].u_obj); - if (i2c_id < 1 || i2c_id > MP_ARRAY_SIZE(machine_hard_i2c_obj) - || machine_hard_i2c_obj[i2c_id - 1].base.type == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "I2C(%d) doesn't exist", i2c_id)); - } - } - - // get static peripheral object - machine_hard_i2c_obj_t *self = (machine_hard_i2c_obj_t*)&machine_hard_i2c_obj[i2c_id - 1]; - - // here we would check the scl/sda pins and configure them, but it's not implemented - if (args[ARG_scl].u_obj != MP_OBJ_NULL || args[ARG_sda].u_obj != MP_OBJ_NULL) { - mp_raise_ValueError("explicit choice of scl/sda is not implemented"); - } - - // initialise the I2C peripheral - machine_hard_i2c_init(self, args[ARG_freq].u_int, args[ARG_timeout].u_int); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { - .readfrom = machine_hard_i2c_readfrom, - .writeto = machine_hard_i2c_writeto, -}; - -STATIC const mp_obj_type_t machine_hard_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .print = machine_hard_i2c_print, - .make_new = machine_hard_i2c_make_new, - .protocol = &machine_hard_i2c_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_soft_i2c_locals_dict, -}; diff --git a/ports/stm32/main.c b/ports/stm32/main.c deleted file mode 100644 index 16279d073d554..0000000000000 --- a/ports/stm32/main.c +++ /dev/null @@ -1,699 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "lib/mp-readline/readline.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" - -#include "systick.h" -#include "pendsv.h" -#include "pybthread.h" -#include "gccollect.h" -#include "modmachine.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "timer.h" -#include "led.h" -#include "pin.h" -#include "extint.h" -#include "usrsw.h" -#include "usb.h" -#include "rtc.h" -#include "storage.h" -#include "sdcard.h" -#include "rng.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "can.h" -#include "modnetwork.h" - -void SystemClock_Config(void); - -pyb_thread_t pyb_thread_main; -fs_user_mount_t fs_user_mount_flash; - -void flash_error(int n) { - for (int i = 0; i < n; i++) { - led_state(PYB_LED_RED, 1); - led_state(PYB_LED_GREEN, 0); - mp_hal_delay_ms(250); - led_state(PYB_LED_RED, 0); - led_state(PYB_LED_GREEN, 1); - mp_hal_delay_ms(250); - } - led_state(PYB_LED_GREEN, 0); -} - -void NORETURN __fatal_error(const char *msg) { - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - led_state(1, 1); - led_state(2, 1); - led_state(3, 1); - led_state(4, 1); - mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14); - mp_hal_stdout_tx_strn(msg, strlen(msg)); - for (uint i = 0;;) { - led_toggle(((i++) & 3) + 1); - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - if (i >= 16) { - // to conserve power - __WFI(); - } - } -} - -void nlr_jump_fail(void *val) { - printf("FATAL: uncaught exception %p\n", val); - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)val); - __fatal_error(""); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - (void)func; - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error(""); -} -#endif - -STATIC mp_obj_t pyb_main(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_opt, MP_ARG_INT, {.u_int = 0} } - }; - - if (MP_OBJ_IS_STR(pos_args[0])) { - MP_STATE_PORT(pyb_config_main) = pos_args[0]; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - MP_STATE_VM(mp_optimise_value) = args[0].u_int; - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_main_obj, 1, pyb_main); - -static const char fresh_boot_py[] = -"# boot.py -- run on boot-up\r\n" -"# can run arbitrary Python, but best to keep it minimal\r\n" -"\r\n" -"import machine\r\n" -"import pyb\r\n" -"#pyb.main('main.py') # main script to run after this one\r\n" -"#pyb.usb_mode('VCP+MSC') # act as a serial and a storage device\r\n" -"#pyb.usb_mode('VCP+HID') # act as a serial device and a mouse\r\n" -; - -static const char fresh_main_py[] = -"# main.py -- put your code here!\r\n" -; - -static const char fresh_pybcdc_inf[] = -#include "genhdr/pybcdc_inf.h" -; - -static const char fresh_readme_txt[] = -"This is a MicroPython board\r\n" -"\r\n" -"You can get started right away by writing your Python code in 'main.py'.\r\n" -"\r\n" -"For a serial prompt:\r\n" -" - Windows: you need to go to 'Device manager', right click on the unknown device,\r\n" -" then update the driver software, using the 'pybcdc.inf' file found on this drive.\r\n" -" Then use a terminal program like Hyperterminal or putty.\r\n" -" - Mac OS X: use the command: screen /dev/tty.usbmodem*\r\n" -" - Linux: use the command: screen /dev/ttyACM0\r\n" -"\r\n" -"Please visit http://micropython.org/help/ for further help.\r\n" -; - -// avoid inlining to avoid stack usage within main() -MP_NOINLINE STATIC bool init_flash_fs(uint reset_mode) { - // init the vfs object - fs_user_mount_t *vfs_fat = &fs_user_mount_flash; - vfs_fat->flags = 0; - pyb_flash_init_vfs(vfs_fat); - - // try to mount the flash - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (reset_mode == 3 || res == FR_NO_FILESYSTEM) { - // no filesystem, or asked to reset it, so create a fresh one - - // LED on to indicate creation of LFS - led_state(PYB_LED_GREEN, 1); - uint32_t start_tick = HAL_GetTick(); - - uint8_t working_buf[_MAX_SS]; - res = f_mkfs(&vfs_fat->fatfs, FM_FAT, 0, working_buf, sizeof(working_buf)); - if (res == FR_OK) { - // success creating fresh LFS - } else { - printf("PYB: can't create flash filesystem\n"); - return false; - } - - // set label - f_setlabel(&vfs_fat->fatfs, "pybflash"); - - // create empty main.py - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/main.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_main_py, sizeof(fresh_main_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - - // create .inf driver file - f_open(&vfs_fat->fatfs, &fp, "/pybcdc.inf", FA_WRITE | FA_CREATE_ALWAYS); - f_write(&fp, fresh_pybcdc_inf, sizeof(fresh_pybcdc_inf) - 1 /* don't count null terminator */, &n); - f_close(&fp); - - // create readme file - f_open(&vfs_fat->fatfs, &fp, "/README.txt", FA_WRITE | FA_CREATE_ALWAYS); - f_write(&fp, fresh_readme_txt, sizeof(fresh_readme_txt) - 1 /* don't count null terminator */, &n); - f_close(&fp); - - // keep LED on for at least 200ms - sys_tick_wait_at_least(start_tick, 200); - led_state(PYB_LED_GREEN, 0); - } else if (res == FR_OK) { - // mount sucessful - } else { - fail: - printf("PYB: can't mount flash\n"); - return false; - } - - // mount the flash device (there should be no other devices mounted at this point) - // we allocate this structure on the heap because vfs->next is a root pointer - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL) { - goto fail; - } - vfs->str = "/flash"; - vfs->len = 6; - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - MP_STATE_VM(vfs_mount_table) = vfs; - - // The current directory is used as the boot up directory. - // It is set to the internal flash filesystem by default. - MP_STATE_PORT(vfs_cur) = vfs; - - // Make sure we have a /flash/boot.py. Create it if needed. - FILINFO fno; - res = f_stat(&vfs_fat->fatfs, "/boot.py", &fno); - if (res != FR_OK) { - // doesn't exist, create fresh file - - // LED on to indicate creation of boot.py - led_state(PYB_LED_GREEN, 1); - uint32_t start_tick = HAL_GetTick(); - - FIL fp; - f_open(&vfs_fat->fatfs, &fp, "/boot.py", FA_WRITE | FA_CREATE_ALWAYS); - UINT n; - f_write(&fp, fresh_boot_py, sizeof(fresh_boot_py) - 1 /* don't count null terminator */, &n); - // TODO check we could write n bytes - f_close(&fp); - - // keep LED on for at least 200ms - sys_tick_wait_at_least(start_tick, 200); - led_state(PYB_LED_GREEN, 0); - } - - return true; -} - -#if MICROPY_HW_HAS_SDCARD -STATIC bool init_sdcard_fs(bool first_soft_reset) { - bool first_part = true; - for (int part_num = 1; part_num <= 4; ++part_num) { - // create vfs object - fs_user_mount_t *vfs_fat = m_new_obj_maybe(fs_user_mount_t); - mp_vfs_mount_t *vfs = m_new_obj_maybe(mp_vfs_mount_t); - if (vfs == NULL || vfs_fat == NULL) { - break; - } - vfs_fat->flags = FSUSER_FREE_OBJ; - sdcard_init_vfs(vfs_fat, part_num); - - // try to mount the partition - FRESULT res = f_mount(&vfs_fat->fatfs); - - if (res != FR_OK) { - // couldn't mount - m_del_obj(fs_user_mount_t, vfs_fat); - m_del_obj(mp_vfs_mount_t, vfs); - } else { - // mounted via FatFs, now mount the SD partition in the VFS - if (first_part) { - // the first available partition is traditionally called "sd" for simplicity - vfs->str = "/sd"; - vfs->len = 3; - } else { - // subsequent partitions are numbered by their index in the partition table - if (part_num == 2) { - vfs->str = "/sd2"; - } else if (part_num == 2) { - vfs->str = "/sd3"; - } else { - vfs->str = "/sd4"; - } - vfs->len = 4; - } - vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); - vfs->next = NULL; - for (mp_vfs_mount_t **m = &MP_STATE_VM(vfs_mount_table);; m = &(*m)->next) { - if (*m == NULL) { - *m = vfs; - break; - } - } - - if (first_soft_reset) { - // use SD card as medium for the USB MSD - #if defined(USE_DEVICE_MODE) - pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_SDCARD; - #endif - } - - #if defined(USE_DEVICE_MODE) - // only use SD card as current directory if that's what the USB medium is - if (pyb_usb_storage_medium == PYB_USB_STORAGE_MEDIUM_SDCARD) - #endif - { - if (first_part) { - // use SD card as current directory - MP_STATE_PORT(vfs_cur) = vfs; - } - } - first_part = false; - } - } - - if (first_part) { - printf("PYB: can't mount SD card\n"); - return false; - } else { - return true; - } -} -#endif - -STATIC uint update_reset_mode(uint reset_mode) { -#if MICROPY_HW_HAS_SWITCH - if (switch_get()) { - - // The original method used on the pyboard is appropriate if you have 2 - // or more LEDs. -#if defined(MICROPY_HW_LED2) - for (uint i = 0; i < 3000; i++) { - if (!switch_get()) { - break; - } - mp_hal_delay_ms(20); - if (i % 30 == 29) { - if (++reset_mode > 3) { - reset_mode = 1; - } - led_state(2, reset_mode & 1); - led_state(3, reset_mode & 2); - led_state(4, reset_mode & 4); - } - } - // flash the selected reset mode - for (uint i = 0; i < 6; i++) { - led_state(2, 0); - led_state(3, 0); - led_state(4, 0); - mp_hal_delay_ms(50); - led_state(2, reset_mode & 1); - led_state(3, reset_mode & 2); - led_state(4, reset_mode & 4); - mp_hal_delay_ms(50); - } - mp_hal_delay_ms(400); - -#elif defined(MICROPY_HW_LED1) - - // For boards with only a single LED, we'll flash that LED the - // appropriate number of times, with a pause between each one - for (uint i = 0; i < 10; i++) { - led_state(1, 0); - for (uint j = 0; j < reset_mode; j++) { - if (!switch_get()) { - break; - } - led_state(1, 1); - mp_hal_delay_ms(100); - led_state(1, 0); - mp_hal_delay_ms(200); - } - mp_hal_delay_ms(400); - if (!switch_get()) { - break; - } - if (++reset_mode > 3) { - reset_mode = 1; - } - } - // Flash the selected reset mode - for (uint i = 0; i < 2; i++) { - for (uint j = 0; j < reset_mode; j++) { - led_state(1, 1); - mp_hal_delay_ms(100); - led_state(1, 0); - mp_hal_delay_ms(200); - } - mp_hal_delay_ms(400); - } -#else -#error Need a reset mode update method -#endif - } -#endif - return reset_mode; -} - -int main(void) { - // TODO disable JTAG - - /* STM32F4xx HAL library initialization: - - Configure the Flash prefetch, instruction and Data caches - - Configure the Systick to generate an interrupt each 1 msec - - Set NVIC Group Priority to 4 - - Global MSP (MCU Support Package) initialization - */ - HAL_Init(); - - // set the system clock to be HSE - SystemClock_Config(); - - // enable GPIO clocks - __GPIOA_CLK_ENABLE(); - __GPIOB_CLK_ENABLE(); - __GPIOC_CLK_ENABLE(); - __GPIOD_CLK_ENABLE(); - - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - #if defined(__HAL_RCC_DTCMRAMEN_CLK_ENABLE) - // The STM32F746 doesn't really have CCM memory, but it does have DTCM, - // which behaves more or less like normal SRAM. - __HAL_RCC_DTCMRAMEN_CLK_ENABLE(); - #elif defined(CCMDATARAM_BASE) - // enable the CCM RAM - __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); - #endif - #endif - - #if defined(MICROPY_BOARD_EARLY_INIT) - MICROPY_BOARD_EARLY_INIT(); - #endif - - // basic sub-system init - #if MICROPY_PY_THREAD - pyb_thread_init(&pyb_thread_main); - #endif - pendsv_init(); - led_init(); -#if MICROPY_HW_HAS_SWITCH - switch_init0(); -#endif - -#if defined(USE_DEVICE_MODE) - // default to internal flash being the usb medium - pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_FLASH; -#endif - - int first_soft_reset = true; - -soft_reset: - - // check if user switch held to select the reset mode -#if defined(MICROPY_HW_LED2) - led_state(1, 0); - led_state(2, 1); -#else - led_state(1, 1); - led_state(2, 0); -#endif - led_state(3, 0); - led_state(4, 0); - uint reset_mode = update_reset_mode(1); - - machine_init(); - -#if MICROPY_HW_ENABLE_RTC - if (first_soft_reset) { - rtc_init_start(false); - } -#endif - - // more sub-system init -#if MICROPY_HW_HAS_SDCARD - if (first_soft_reset) { - sdcard_init(); - } -#endif - if (first_soft_reset) { - storage_init(); - } - - // Python threading init - #if MICROPY_PY_THREAD - mp_thread_init(); - #endif - - // Stack limit should be less than real stack size, so we have a chance - // to recover from limit hit. (Limit is measured in bytes.) - // Note: stack control relies on main thread being initialised above - mp_stack_set_top(&_estack); - mp_stack_set_limit((char*)&_estack - (char*)&_heap_end - 1024); - - // GC init - gc_init(&_heap_start, &_heap_end); - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - // Initialise low-level sub-systems. Here we need to very basic things like - // zeroing out memory and resetting any of the sub-systems. Following this - // we can run Python scripts (eg boot.py), but anything that is configurable - // by boot.py must be set after boot.py is run. - - readline_init0(); - pin_init0(); - extint_init0(); - timer_init0(); - uart_init0(); - - // Define MICROPY_HW_UART_REPL to be PYB_UART_6 and define - // MICROPY_HW_UART_REPL_BAUD in your mpconfigboard.h file if you want a - // REPL on a hardware UART as well as on USB VCP -#if defined(MICROPY_HW_UART_REPL) - { - mp_obj_t args[2] = { - MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL), - MP_OBJ_NEW_SMALL_INT(MICROPY_HW_UART_REPL_BAUD), - }; - MP_STATE_PORT(pyb_stdio_uart) = pyb_uart_type.make_new((mp_obj_t)&pyb_uart_type, MP_ARRAY_SIZE(args), 0, args); - } -#else - MP_STATE_PORT(pyb_stdio_uart) = NULL; -#endif - -#if MICROPY_HW_ENABLE_CAN - can_init0(); -#endif - -#if MICROPY_HW_ENABLE_RNG - rng_init0(); -#endif - - i2c_init0(); - spi_init0(); - pyb_usb_init0(); - - // Initialise the local flash filesystem. - // Create it if needed, mount in on /flash, and set it as current dir. - bool mounted_flash = init_flash_fs(reset_mode); - - bool mounted_sdcard = false; -#if MICROPY_HW_HAS_SDCARD - // if an SD card is present then mount it on /sd/ - if (sdcard_is_present()) { - // if there is a file in the flash called "SKIPSD", then we don't mount the SD card - if (!mounted_flash || f_stat(&fs_user_mount_flash.fatfs, "/SKIPSD", NULL) != FR_OK) { - mounted_sdcard = init_sdcard_fs(first_soft_reset); - } - } -#endif - - // set sys.path based on mounted filesystems (/sd is first so it can override /flash) - if (mounted_sdcard) { - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_sd)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_sd_slash_lib)); - } - if (mounted_flash) { - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash)); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib)); - } - - // reset config variables; they should be set by boot.py - MP_STATE_PORT(pyb_config_main) = MP_OBJ_NULL; - - // run boot.py, if it exists - // TODO perhaps have pyb.reboot([bootpy]) function to soft-reboot and execute custom boot.py - if (reset_mode == 1 || reset_mode == 3) { - const char *boot_py = "boot.py"; - mp_import_stat_t stat = mp_import_stat(boot_py); - if (stat == MP_IMPORT_STAT_FILE) { - int ret = pyexec_file(boot_py); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - flash_error(4); - } - } - } - - // turn boot-up LEDs off -#if !defined(MICROPY_HW_LED2) - // If there is only one LED on the board then it's used to signal boot-up - // and so we turn it off here. Otherwise LED(1) is used to indicate dirty - // flash cache and so we shouldn't change its state. - led_state(1, 0); -#endif - led_state(2, 0); - led_state(3, 0); - led_state(4, 0); - - // Now we initialise sub-systems that need configuration from boot.py, - // or whose initialisation can be safely deferred until after running - // boot.py. - -#if defined(USE_DEVICE_MODE) - // init USB device to default setting if it was not already configured - if (!(pyb_usb_flags & PYB_USB_FLAG_USB_MODE_CALLED)) { - pyb_usb_dev_init(USBD_VID, USBD_PID_CDC_MSC, USBD_MODE_CDC_MSC, NULL); - } -#endif - -#if MICROPY_HW_HAS_MMA7660 - // MMA accel: init and reset - accel_init(); -#endif - -#if MICROPY_HW_ENABLE_SERVO - // servo - servo_init(); -#endif - -#if MICROPY_HW_ENABLE_DAC - // DAC - dac_init(); -#endif - -#if MICROPY_PY_NETWORK - mod_network_init(); -#endif - - // At this point everything is fully configured and initialised. - - // Run the main script from the current directory. - if ((reset_mode == 1 || reset_mode == 3) && pyexec_mode_kind == PYEXEC_MODE_FRIENDLY_REPL) { - const char *main_py; - if (MP_STATE_PORT(pyb_config_main) == MP_OBJ_NULL) { - main_py = "main.py"; - } else { - main_py = mp_obj_str_get_str(MP_STATE_PORT(pyb_config_main)); - } - mp_import_stat_t stat = mp_import_stat(main_py); - if (stat == MP_IMPORT_STAT_FILE) { - int ret = pyexec_file(main_py); - if (ret & PYEXEC_FORCED_EXIT) { - goto soft_reset_exit; - } - if (!ret) { - flash_error(3); - } - } - } - - // Main script is finished, so now go into REPL mode. - // The REPL mode can change, or it can request a soft reset. - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - -soft_reset_exit: - - // soft reset - - printf("PYB: sync filesystems\n"); - storage_flush(); - - printf("PYB: soft reboot\n"); - timer_deinit(); - uart_deinit(); -#if MICROPY_HW_ENABLE_CAN - can_deinit(); -#endif - - #if MICROPY_PY_THREAD - pyb_thread_deinit(); - #endif - - first_soft_reset = false; - goto soft_reset; -} diff --git a/ports/stm32/make-stmconst.py b/ports/stm32/make-stmconst.py deleted file mode 100644 index 3a8e22b38669a..0000000000000 --- a/ports/stm32/make-stmconst.py +++ /dev/null @@ -1,258 +0,0 @@ -""" -This script reads in the given CMSIS device include file (eg stm32f405xx.h), -extracts relevant peripheral constants, and creates qstrs, mpz's and constants -for the stm module. -""" - -from __future__ import print_function - -import argparse -import re - -# Python 2/3 compatibility -import platform -if platform.python_version_tuple()[0] == '2': - def convert_bytes_to_str(b): - return b -elif platform.python_version_tuple()[0] == '3': - def convert_bytes_to_str(b): - try: - return str(b, 'utf8') - except ValueError: - # some files have invalid utf8 bytes, so filter them out - return ''.join(chr(l) for l in b if l <= 126) -# end compatibility code - -# given a list of (name,regex) pairs, find the first one that matches the given line -def re_match_first(regexs, line): - for name, regex in regexs: - match = re.match(regex, line) - if match: - return name, match - return None, None - -class LexerError(Exception): - def __init__(self, line): - self.line = line - -class Lexer: - re_io_reg = r'__IO uint(?P8|16|32)_t +(?P[A-Z0-9]+)' - re_comment = r'(?P[A-Za-z0-9 \-/_()&]+)' - re_addr_offset = r'Address offset: (?P0x[0-9A-Z]{2,3})' - regexs = ( - ('#define hex', re.compile(r'#define +(?P[A-Z0-9_]+) +(?:\(\(uint32_t\))?(?P0x[0-9A-F]+)U?(?:\))?($| +/\*)')), - ('#define X', re.compile(r'#define +(?P[A-Z0-9_]+) +(?P[A-Z0-9_]+)($| +/\*)')), - ('#define X+hex', re.compile(r'#define +(?P[A-Za-z0-9_]+) +\((?P[A-Z0-9_]+) \+ (?P0x[0-9A-F]+)U?\)($| +/\*)')), - ('#define typedef', re.compile(r'#define +(?P[A-Z0-9_]+(ext)?) +\(\([A-Za-z0-9_]+_TypeDef \*\) (?P[A-Za-z0-9_]+)\)($| +/\*)')), - ('typedef struct', re.compile(r'typedef struct$')), - ('{', re.compile(r'{$')), - ('}', re.compile(r'}$')), - ('} TypeDef', re.compile(r'} *(?P[A-Z][A-Za-z0-9_]+)_(?P([A-Za-z0-9_]+)?)TypeDef;$')), - ('IO reg', re.compile(re_io_reg + r'; +/\*!< ' + re_comment + r', +' + re_addr_offset + r' *\*/')), - ('IO reg array', re.compile(re_io_reg + r'\[(?P[2-8])\]; +/\*!< ' + re_comment + r', +' + re_addr_offset + r'-(0x[0-9A-Z]{2,3}) *\*/')), - ) - - def __init__(self, filename): - self.file = open(filename, 'rb') - self.line_number = 0 - - def next_match(self, strictly_next=False): - while True: - line = self.file.readline() - line = convert_bytes_to_str(line) - self.line_number += 1 - if len(line) == 0: - return ('EOF', None) - match = re_match_first(Lexer.regexs, line.strip()) - if strictly_next or match[0] is not None: - return match - - def must_match(self, kind): - match = self.next_match(strictly_next=True) - if match[0] != kind: - raise LexerError(self.line_number) - return match - -def parse_file(filename): - lexer = Lexer(filename) - - reg_defs = {} - consts = {} - periphs = [] - while True: - m = lexer.next_match() - if m[0] == 'EOF': - break - elif m[0] == '#define hex': - d = m[1].groupdict() - consts[d['id']] = int(d['hex'], base=16) - elif m[0] == '#define X': - d = m[1].groupdict() - if d['id2'] in consts: - consts[d['id']] = consts[d['id2']] - elif m[0] == '#define X+hex': - d = m[1].groupdict() - if d['id2'] in consts: - consts[d['id']] = consts[d['id2']] + int(d['hex'], base=16) - elif m[0] == '#define typedef': - d = m[1].groupdict() - if d['id2'] in consts: - periphs.append((d['id'], consts[d['id2']])) - elif m[0] == 'typedef struct': - lexer.must_match('{') - m = lexer.next_match() - regs = [] - while m[0] in ('IO reg', 'IO reg array'): - d = m[1].groupdict() - reg = d['reg'] - offset = int(d['offset'], base=16) - bits = int(d['bits']) - comment = d['comment'] - if m[0] == 'IO reg': - regs.append((reg, offset, bits, comment)) - else: - for i in range(int(d['array'])): - regs.append((reg + str(i), offset + i * bits // 8, bits, comment)) - m = lexer.next_match() - if m[0] == '}': - pass - elif m[0] == '} TypeDef': - reg_defs[m[1].groupdict()['id']] = regs - else: - raise LexerError(lexer.line_number) - - return periphs, reg_defs - -def print_int_obj(val, needed_mpzs): - if -0x40000000 <= val < 0x40000000: - print('MP_ROM_INT(%#x)' % val, end='') - else: - print('MP_ROM_PTR(&mpz_%08x)' % val, end='') - needed_mpzs.add(val) - -def print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs): - qstr = periph_name.upper() - print('{ MP_ROM_QSTR(MP_QSTR_%s), ' % qstr, end='') - print_int_obj(periph_val, needed_mpzs) - print(' },') - needed_qstrs.add(qstr) - -def print_regs(reg_name, reg_defs, needed_qstrs, needed_mpzs): - reg_name = reg_name.upper() - for r in reg_defs: - qstr = reg_name + '_' + r[0] - print('{ MP_ROM_QSTR(MP_QSTR_%s), ' % qstr, end='') - print_int_obj(r[1], needed_mpzs) - print(' }, // %s-bits, %s' % (r[2], r[3])) - needed_qstrs.add(qstr) - -# This version of print regs groups registers together into submodules (eg GPIO submodule). -# This makes the qstrs shorter, and makes the list of constants more manageable (since -# they are not all in one big module) but it is then harder to compile the constants, and -# is more cumbersome to access. -# As such, we don't use this version. -# And for the number of constants we have, this function seems to use about the same amount -# of ROM as print_regs. -def print_regs_as_submodules(reg_name, reg_defs, modules, needed_qstrs): - mod_name_lower = reg_name.lower() + '_' - mod_name_upper = mod_name_lower.upper() - modules.append((mod_name_lower, mod_name_upper)) - - print(""" -STATIC const mp_rom_map_elem_t stm_%s_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_%s) }, -""" % (mod_name_lower, mod_name_upper)) - needed_qstrs.add(mod_name_upper) - - for r in reg_defs: - print(' { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_INT(%#x) }, // %s-bits, %s' % (r[0], r[1], r[2], r[3])) - needed_qstrs.add(r[0]) - - print("""}; - -STATIC MP_DEFINE_CONST_DICT(stm_%s_globals, stm_%s_globals_table); - -const mp_obj_module_t stm_%s_obj = { - .base = { &mp_type_module }, - .name = MP_QSTR_%s, - .globals = (mp_obj_dict_t*)&stm_%s_globals, -}; -""" % (mod_name_lower, mod_name_lower, mod_name_lower, mod_name_upper, mod_name_lower)) - -def main(): - cmd_parser = argparse.ArgumentParser(description='Extract ST constants from a C header file.') - cmd_parser.add_argument('file', nargs=1, help='input file') - cmd_parser.add_argument('-q', '--qstr', dest='qstr_filename', default='build/stmconst_qstr.h', - help='Specified the name of the generated qstr header file') - cmd_parser.add_argument('--mpz', dest='mpz_filename', default='build/stmconst_mpz.h', - help='the destination file of the generated mpz header') - args = cmd_parser.parse_args() - - periphs, reg_defs = parse_file(args.file[0]) - - # add legacy GPIO constants that were removed when upgrading CMSIS - if 'GPIO' in reg_defs and 'stm32f4' in args.file[0]: - reg_defs['GPIO'].append(['BSRRL', 0x18, 16, 'legacy register']) - reg_defs['GPIO'].append(['BSRRH', 0x1a, 16, 'legacy register']) - - modules = [] - needed_qstrs = set() - needed_mpzs = set() - - print("// Automatically generated from %s by make-stmconst.py" % args.file[0]) - print("") - - for periph_name, periph_val in periphs: - print_periph(periph_name, periph_val, needed_qstrs, needed_mpzs) - - for reg in ( - 'ADC', - #'ADC_Common', - #'CAN_TxMailBox', - #'CAN_FIFOMailBox', - #'CAN_FilterRegister', - #'CAN', - 'CRC', - 'DAC', - 'DBGMCU', - 'DMA_Stream', - 'DMA', - 'EXTI', - 'FLASH', - 'GPIO', - 'SYSCFG', - 'I2C', - 'IWDG', - 'PWR', - 'RCC', - 'RTC', - #'SDIO', - 'SPI', - 'TIM', - 'USART', - 'WWDG', - 'RNG', - ): - if reg in reg_defs: - print_regs(reg, reg_defs[reg], needed_qstrs, needed_mpzs) - #print_regs_as_submodules(reg, reg_defs[reg], modules, needed_qstrs) - - #print("#define MOD_STM_CONST_MODULES \\") - #for mod_lower, mod_upper in modules: - # print(" { MP_ROM_QSTR(MP_QSTR_%s), MP_ROM_PTR(&stm_%s_obj) }, \\" % (mod_upper, mod_lower)) - - print("") - - with open(args.qstr_filename, 'wt') as qstr_file: - for qstr in sorted(needed_qstrs): - print('Q({})'.format(qstr), file=qstr_file) - - with open(args.mpz_filename, 'wt') as mpz_file: - for mpz in sorted(needed_mpzs): - assert 0 <= mpz <= 0xffffffff - print('STATIC const mp_obj_int_t mpz_%08x = {{&mp_type_int}, ' - '{.neg=0, .fixed_dig=1, .alloc=2, .len=2, ' '.dig=(uint16_t*)(const uint16_t[]){%#x, %#x}}};' - % (mpz, mpz & 0xffff, (mpz >> 16) & 0xffff), file=mpz_file) - -if __name__ == "__main__": - main() diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c deleted file mode 100644 index 8c59758fa309b..0000000000000 --- a/ports/stm32/modmachine.c +++ /dev/null @@ -1,593 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "modmachine.h" -#include "py/gc.h" -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "gccollect.h" -#include "irq.h" -#include "pybthread.h" -#include "rng.h" -#include "storage.h" -#include "pin.h" -#include "timer.h" -#include "usb.h" -#include "rtc.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "wdt.h" -#include "genhdr/pllfreqtable.h" - -#if defined(MCU_SERIES_L4) -// L4 does not have a POR, so use BOR instead -#define RCC_CSR_PORRSTF RCC_CSR_BORRSTF -#endif - -#define PYB_RESET_SOFT (0) -#define PYB_RESET_POWER_ON (1) -#define PYB_RESET_HARD (2) -#define PYB_RESET_WDT (3) -#define PYB_RESET_DEEPSLEEP (4) - -STATIC uint32_t reset_cause; - -void machine_init(void) { - #if defined(MCU_SERIES_F4) - if (PWR->CSR & PWR_CSR_SBF) { - // came out of standby - reset_cause = PYB_RESET_DEEPSLEEP; - PWR->CR |= PWR_CR_CSBF; - } else - #elif defined(MCU_SERIES_F7) - if (PWR->CSR1 & PWR_CSR1_SBF) { - // came out of standby - reset_cause = PYB_RESET_DEEPSLEEP; - PWR->CR1 |= PWR_CR1_CSBF; - } else - #endif - { - // get reset cause from RCC flags - uint32_t state = RCC->CSR; - if (state & RCC_CSR_IWDGRSTF || state & RCC_CSR_WWDGRSTF) { - reset_cause = PYB_RESET_WDT; - } else if (state & RCC_CSR_PORRSTF || state & RCC_CSR_BORRSTF) { - reset_cause = PYB_RESET_POWER_ON; - } else if (state & RCC_CSR_PINRSTF) { - reset_cause = PYB_RESET_HARD; - } else { - // default is soft reset - reset_cause = PYB_RESET_SOFT; - } - } - // clear RCC reset flags - RCC->CSR |= RCC_CSR_RMVF; -} - -// machine.info([dump_alloc_table]) -// Print out lots of information about the board. -STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) { - // get and print unique id; 96 bits - { - byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - // SYSCLK=168MHz, HCLK=168MHz, PCLK1=42MHz, PCLK2=84MHz - { - printf("S=%lu\nH=%lu\nP1=%lu\nP2=%lu\n", - HAL_RCC_GetSysClockFreq(), - HAL_RCC_GetHCLKFreq(), - HAL_RCC_GetPCLK1Freq(), - HAL_RCC_GetPCLK2Freq()); - } - - // to print info about memory - { - printf("_etext=%p\n", &_etext); - printf("_sidata=%p\n", &_sidata); - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_ram_start=%p\n", &_ram_start); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - printf("_ram_end=%p\n", &_ram_end); - } - - // qstr info - { - mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - // free space on flash - { - for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { - if (strncmp("/flash", vfs->str, vfs->len) == 0) { - // assumes that it's a FatFs filesystem - fs_user_mount_t *vfs_fat = MP_OBJ_TO_PTR(vfs->obj); - DWORD nclst; - f_getfree(&vfs_fat->fatfs, &nclst); - printf("LFS free: %u bytes\n", (uint)(nclst * vfs_fat->fatfs.csize * 512)); - break; - } - } - } - - #if MICROPY_PY_THREAD - pyb_thread_dump(); - #endif - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info); - -// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU. -STATIC mp_obj_t machine_unique_id(void) { - byte *id = (byte*)MP_HAL_UNIQUE_ID_ADDRESS; - return mp_obj_new_bytes(id, 12); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id); - -// Resets the pyboard in a manner similar to pushing the external RESET button. -STATIC mp_obj_t machine_reset(void) { - NVIC_SystemReset(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_soft_reset(void) { - pyexec_system_exit = PYEXEC_FORCED_EXIT; - nlr_raise(mp_obj_new_exception(&mp_type_SystemExit)); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset); - -// Activate the bootloader without BOOT* pins. -STATIC NORETURN mp_obj_t machine_bootloader(void) { - pyb_usb_dev_deinit(); - storage_flush(); - - HAL_RCC_DeInit(); - HAL_DeInit(); - - #if (__MPU_PRESENT == 1) - // MPU must be disabled for bootloader to function correctly - HAL_MPU_Disable(); - #endif - -#if defined(MCU_SERIES_F7) - // arm-none-eabi-gcc 4.9.0 does not correctly inline this - // MSP function, so we write it out explicitly here. - //__set_MSP(*((uint32_t*) 0x1FF00000)); - __ASM volatile ("movw r3, #0x0000\nmovt r3, #0x1FF0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp"); - - ((void (*)(void)) *((uint32_t*) 0x1FF00004))(); -#else - __HAL_REMAPMEMORY_SYSTEMFLASH(); - - // arm-none-eabi-gcc 4.9.0 does not correctly inline this - // MSP function, so we write it out explicitly here. - //__set_MSP(*((uint32_t*) 0x00000000)); - __ASM volatile ("movs r3, #0\nldr r3, [r3, #0]\nMSR msp, r3\n" : : : "r3", "sp"); - - ((void (*)(void)) *((uint32_t*) 0x00000004))(); -#endif - - while (1); -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_bootloader_obj, machine_bootloader); - -// get or set the MCU frequencies -STATIC mp_uint_t machine_freq_calc_ahb_div(mp_uint_t wanted_div) { - if (wanted_div <= 1) { return RCC_SYSCLK_DIV1; } - else if (wanted_div <= 2) { return RCC_SYSCLK_DIV2; } - else if (wanted_div <= 4) { return RCC_SYSCLK_DIV4; } - else if (wanted_div <= 8) { return RCC_SYSCLK_DIV8; } - else if (wanted_div <= 16) { return RCC_SYSCLK_DIV16; } - else if (wanted_div <= 64) { return RCC_SYSCLK_DIV64; } - else if (wanted_div <= 128) { return RCC_SYSCLK_DIV128; } - else if (wanted_div <= 256) { return RCC_SYSCLK_DIV256; } - else { return RCC_SYSCLK_DIV512; } -} -STATIC mp_uint_t machine_freq_calc_apb_div(mp_uint_t wanted_div) { - if (wanted_div <= 1) { return RCC_HCLK_DIV1; } - else if (wanted_div <= 2) { return RCC_HCLK_DIV2; } - else if (wanted_div <= 4) { return RCC_HCLK_DIV4; } - else if (wanted_div <= 8) { return RCC_HCLK_DIV8; } - else { return RCC_SYSCLK_DIV16; } -} -STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - // get - mp_obj_t tuple[4] = { - mp_obj_new_int(HAL_RCC_GetSysClockFreq()), - mp_obj_new_int(HAL_RCC_GetHCLKFreq()), - mp_obj_new_int(HAL_RCC_GetPCLK1Freq()), - mp_obj_new_int(HAL_RCC_GetPCLK2Freq()), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_int_t wanted_sysclk = mp_obj_get_int(args[0]) / 1000000; - - #if defined(MCU_SERIES_L4) - mp_raise_NotImplementedError("machine.freq set not supported yet"); - #endif - - // default PLL parameters that give 48MHz on PLL48CK - uint32_t m = HSE_VALUE / 1000000, n = 336, p = 2, q = 7; - uint32_t sysclk_source; - - // search for a valid PLL configuration that keeps USB at 48MHz - for (const uint16_t *pll = &pll_freq_table[MP_ARRAY_SIZE(pll_freq_table) - 1]; pll >= &pll_freq_table[0]; --pll) { - uint32_t sys = *pll & 0xff; - if (sys <= wanted_sysclk) { - m = (*pll >> 10) & 0x3f; - p = ((*pll >> 7) & 0x6) + 2; - if (m == 0) { - // special entry for using HSI directly - sysclk_source = RCC_SYSCLKSOURCE_HSI; - goto set_clk; - } else if (m == 1) { - // special entry for using HSE directly - sysclk_source = RCC_SYSCLKSOURCE_HSE; - goto set_clk; - } else { - // use PLL - sysclk_source = RCC_SYSCLKSOURCE_PLLCLK; - uint32_t vco_out = sys * p; - n = vco_out * m / (HSE_VALUE / 1000000); - q = vco_out / 48; - goto set_clk; - } - } - } - mp_raise_ValueError("can't make valid freq"); - - set_clk: - //printf("%lu %lu %lu %lu %lu\n", sysclk_source, m, n, p, q); - - // let the USB CDC have a chance to process before we change the clock - mp_hal_delay_ms(5); - - // desired system clock source is in sysclk_source - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) { - // set HSE as system clock source to allow modification of the PLL configuration - // we then change to PLL after re-configuring PLL - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - } else { - // directly set the system clock source as desired - RCC_ClkInitStruct.SYSCLKSource = sysclk_source; - } - wanted_sysclk *= 1000000; - if (n_args >= 2) { - // note: AHB freq required to be >= 14.2MHz for USB operation - RCC_ClkInitStruct.AHBCLKDivider = machine_freq_calc_ahb_div(wanted_sysclk / mp_obj_get_int(args[1])); - } else { - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - } - if (n_args >= 3) { - RCC_ClkInitStruct.APB1CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[2])); - } else { - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - } - if (n_args >= 4) { - RCC_ClkInitStruct.APB2CLKDivider = machine_freq_calc_apb_div(wanted_sysclk / mp_obj_get_int(args[3])); - } else { - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - } - #if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - uint32_t h = RCC_ClkInitStruct.AHBCLKDivider >> 4; - uint32_t b1 = RCC_ClkInitStruct.APB1CLKDivider >> 10; - uint32_t b2 = RCC_ClkInitStruct.APB2CLKDivider >> 10; - #endif - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { - goto fail; - } - - // re-configure PLL - // even if we don't use the PLL for the system clock, we still need it for USB, RNG and SDIO - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = m; - RCC_OscInitStruct.PLL.PLLN = n; - RCC_OscInitStruct.PLL.PLLP = p; - RCC_OscInitStruct.PLL.PLLQ = q; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - goto fail; - } - - // set PLL as system clock source if wanted - if (sysclk_source == RCC_SYSCLKSOURCE_PLLCLK) { - #if defined(MCU_SERIES_F7) - // if possible, scale down the internal voltage regulator to save power - uint32_t volt_scale; - if (wanted_sysclk <= 151000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE3; - } else if (wanted_sysclk <= 180000000) { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE2; - } else { - volt_scale = PWR_REGULATOR_VOLTAGE_SCALE1; - } - if (HAL_PWREx_ControlVoltageScaling(volt_scale) != HAL_OK) { - goto fail; - } - #endif - - #if !defined(MICROPY_HW_FLASH_LATENCY) - #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5 - #endif - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, MICROPY_HW_FLASH_LATENCY) != HAL_OK) { - goto fail; - } - } - - #if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - #if defined(MCU_SERIES_F7) - #define FREQ_BKP BKP31R - #else - #define FREQ_BKP BKP19R - #endif - // qqqqqqqq pppppppp nnnnnnnn nnmmmmmm - // qqqqQQQQ ppppppPP nNNNNNNN NNMMMMMM - // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM - p = (p / 2) - 1; - RTC->FREQ_BKP = m - | (n << 6) | (p << 16) | (q << 18) - | (h << 22) - | (b1 << 26) - | (b2 << 29); - #endif - - return mp_const_none; - - fail:; - void NORETURN __fatal_error(const char *msg); - __fatal_error("can't change freq"); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq); - -STATIC mp_obj_t machine_sleep(void) { - #if defined(MCU_SERIES_L4) - - // Enter Stop 1 mode - __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI); - HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); - - // reconfigure system clock after wakeup - // Enable Power Control clock - __HAL_RCC_PWR_CLK_ENABLE(); - - // Get the Oscillators configuration according to the internal RCC registers - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - HAL_RCC_GetOscConfig(&RCC_OscInitStruct); - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - - // Get the Clocks configuration according to the internal RCC registers - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - uint32_t pFLatency = 0; - HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency); - - // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, pFLatency); - - #else - - // takes longer to wake but reduces stop current - HAL_PWREx_EnableFlashPowerDown(); - - # if defined(MCU_SERIES_F7) - HAL_PWR_EnterSTOPMode((PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_FPDS | PWR_CR1_UDEN), PWR_STOPENTRY_WFI); - # else - HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); - #endif - - // reconfigure the system clock after waking up - - // enable HSE - __HAL_RCC_HSE_CONFIG(RCC_HSE_ON); - while (!__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY)) { - } - - // enable PLL - __HAL_RCC_PLL_ENABLE(); - while (!__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)) { - } - - // select PLL as system clock source - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK); - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) { - } - - #endif - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep); - -STATIC mp_obj_t machine_deepsleep(void) { - rtc_init_finalise(); - -#if defined(MCU_SERIES_L4) - printf("machine.deepsleep not supported yet\n"); -#else - // We need to clear the PWR wake-up-flag before entering standby, since - // the flag may have been set by a previous wake-up event. Furthermore, - // we need to disable the wake-up sources while clearing this flag, so - // that if a source is active it does actually wake the device. - // See section 5.3.7 of RM0090. - - // Note: we only support RTC ALRA, ALRB, WUT and TS. - // TODO support TAMP and WKUP (PA0 external pin). - uint32_t irq_bits = RTC_CR_ALRAIE | RTC_CR_ALRBIE | RTC_CR_WUTIE | RTC_CR_TSIE; - - // save RTC interrupts - uint32_t save_irq_bits = RTC->CR & irq_bits; - - // disable RTC interrupts - RTC->CR &= ~irq_bits; - - // clear RTC wake-up flags - RTC->ISR &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF | RTC_ISR_WUTF | RTC_ISR_TSF); - - #if defined(MCU_SERIES_F7) - // disable wake-up flags - PWR->CSR2 &= ~(PWR_CSR2_EWUP6 | PWR_CSR2_EWUP5 | PWR_CSR2_EWUP4 | PWR_CSR2_EWUP3 | PWR_CSR2_EWUP2 | PWR_CSR2_EWUP1); - // clear global wake-up flag - PWR->CR2 |= PWR_CR2_CWUPF6 | PWR_CR2_CWUPF5 | PWR_CR2_CWUPF4 | PWR_CR2_CWUPF3 | PWR_CR2_CWUPF2 | PWR_CR2_CWUPF1; - #else - // clear global wake-up flag - PWR->CR |= PWR_CR_CWUF; - #endif - - // enable previously-enabled RTC interrupts - RTC->CR |= save_irq_bits; - - // enter standby mode - HAL_PWR_EnterSTANDBYMode(); - // we never return; MCU is reset on exit from standby -#endif - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(machine_deepsleep_obj, machine_deepsleep); - -STATIC mp_obj_t machine_reset_cause(void) { - return MP_OBJ_NEW_SMALL_INT(reset_cause); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) }, -#endif - - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - -#if 0 - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, -#endif - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - { MP_ROM_QSTR(MP_QSTR_HeartBeat), MP_ROM_PTR(&pyb_heartbeat_type) }, - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON) }, - { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD) }, - { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT) }, - { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_RESET_DEEPSLEEP) }, - { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT) }, -#if 0 - { MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) }, - { MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) }, - { MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t machine_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h deleted file mode 100644 index 77668695fcf9c..0000000000000 --- a/ports/stm32/modmachine.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_MODMACHINE_H -#define MICROPY_INCLUDED_STMHAL_MODMACHINE_H - -#include "py/obj.h" - -void machine_init(void); - -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_unique_id_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_reset_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_bootloader_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_sleep_obj); -MP_DECLARE_CONST_FUN_OBJ_0(machine_deepsleep_obj); - -#endif // MICROPY_INCLUDED_STMHAL_MODMACHINE_H diff --git a/ports/stm32/modnetwork.c b/ports/stm32/modnetwork.c deleted file mode 100644 index 6421745325244..0000000000000 --- a/ports/stm32/modnetwork.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "modnetwork.h" - -#if MICROPY_PY_NETWORK - -/// \module network - network configuration -/// -/// This module provides network drivers and routing configuration. - -void mod_network_init(void) { - mp_obj_list_init(&MP_STATE_PORT(mod_network_nic_list), 0); -} - -void mod_network_register_nic(mp_obj_t nic) { - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - if (MP_STATE_PORT(mod_network_nic_list).items[i] == nic) { - // nic already registered - return; - } - } - // nic not registered so add to list - mp_obj_list_append(&MP_STATE_PORT(mod_network_nic_list), nic); -} - -mp_obj_t mod_network_find_nic(const uint8_t *ip) { - // find a NIC that is suited to given IP address - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; - // TODO check IP suitability here - //mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); - return nic; - } - - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "no available NIC")); -} - -STATIC mp_obj_t network_route(void) { - return &MP_STATE_PORT(mod_network_nic_list); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(network_route_obj, network_route); - -STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, - - #if MICROPY_PY_WIZNET5K - { MP_ROM_QSTR(MP_QSTR_WIZNET5K), MP_ROM_PTR(&mod_network_nic_type_wiznet5k) }, - #endif - #if MICROPY_PY_CC3K - { MP_ROM_QSTR(MP_QSTR_CC3K), MP_ROM_PTR(&mod_network_nic_type_cc3k) }, - #endif - - { MP_ROM_QSTR(MP_QSTR_route), MP_ROM_PTR(&network_route_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); - -const mp_obj_module_t mp_module_network = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_network_globals, -}; - -#endif // MICROPY_PY_NETWORK diff --git a/ports/stm32/modnetwork.h b/ports/stm32/modnetwork.h deleted file mode 100644 index ecda94da4139b..0000000000000 --- a/ports/stm32/modnetwork.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_MODNETWORK_H -#define MICROPY_INCLUDED_STMHAL_MODNETWORK_H - -#define MOD_NETWORK_IPADDR_BUF_SIZE (4) - -#define MOD_NETWORK_AF_INET (2) -#define MOD_NETWORK_AF_INET6 (10) - -#define MOD_NETWORK_SOCK_STREAM (1) -#define MOD_NETWORK_SOCK_DGRAM (2) -#define MOD_NETWORK_SOCK_RAW (3) - -struct _mod_network_socket_obj_t; - -typedef struct _mod_network_nic_type_t { - mp_obj_type_t base; - - // API for non-socket operations - int (*gethostbyname)(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *ip_out); - - // API for socket operations; return -1 on error - int (*socket)(struct _mod_network_socket_obj_t *socket, int *_errno); - void (*close)(struct _mod_network_socket_obj_t *socket); - int (*bind)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); - int (*listen)(struct _mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno); - int (*accept)(struct _mod_network_socket_obj_t *socket, struct _mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno); - int (*connect)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); - mp_uint_t (*send)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno); - mp_uint_t (*recv)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno); - mp_uint_t (*sendto)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno); - mp_uint_t (*recvfrom)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno); - int (*setsockopt)(struct _mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno); - int (*settimeout)(struct _mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno); - int (*ioctl)(struct _mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); -} mod_network_nic_type_t; - -typedef struct _mod_network_socket_obj_t { - mp_obj_base_t base; - mp_obj_t nic; - mod_network_nic_type_t *nic_type; - union { - struct { - uint8_t domain; - uint8_t type; - int8_t fileno; - } u_param; - mp_uint_t u_state; - }; -} mod_network_socket_obj_t; - -extern const mod_network_nic_type_t mod_network_nic_type_wiznet5k; -extern const mod_network_nic_type_t mod_network_nic_type_cc3k; - -void mod_network_init(void); -void mod_network_register_nic(mp_obj_t nic); -mp_obj_t mod_network_find_nic(const uint8_t *ip); - -#endif // MICROPY_INCLUDED_STMHAL_MODNETWORK_H diff --git a/ports/stm32/modnwcc3k.c b/ports/stm32/modnwcc3k.c deleted file mode 100644 index 8cc0a613d1984..0000000000000 --- a/ports/stm32/modnwcc3k.c +++ /dev/null @@ -1,601 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -// CC3000 defines its own ENOBUFS (different to standard one!) -#undef ENOBUFS - -#include "py/objtuple.h" -#include "py/objlist.h" -#include "py/stream.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "spi.h" - -#include "hci.h" -#include "socket.h" -#include "inet_ntop.h" -#include "inet_pton.h" -#include "ccspi.h" -#include "wlan.h" -#include "nvmem.h" -#include "netapp.h" -#include "patch_prog.h" - -#define MAX_ADDRSTRLEN (128) -#define MAX_RX_PACKET (CC3000_RX_BUFFER_SIZE-CC3000_MINIMAL_RX_SIZE-1) -#define MAX_TX_PACKET (CC3000_TX_BUFFER_SIZE-CC3000_MINIMAL_TX_SIZE-1) - -#define MAKE_SOCKADDR(addr, ip, port) \ - sockaddr addr; \ - addr.sa_family = AF_INET; \ - addr.sa_data[0] = port >> 8; \ - addr.sa_data[1] = port; \ - addr.sa_data[2] = ip[0]; \ - addr.sa_data[3] = ip[1]; \ - addr.sa_data[4] = ip[2]; \ - addr.sa_data[5] = ip[3]; - -#define UNPACK_SOCKADDR(addr, ip, port) \ - port = (addr.sa_data[0] << 8) | addr.sa_data[1]; \ - ip[0] = addr.sa_data[2]; \ - ip[1] = addr.sa_data[3]; \ - ip[2] = addr.sa_data[4]; \ - ip[3] = addr.sa_data[5]; - -STATIC int cc3k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); - -int CC3000_EXPORT(errno); // for cc3000 driver - -STATIC volatile uint32_t fd_closed_state = 0; -STATIC volatile bool wlan_connected = false; -STATIC volatile bool ip_obtained = false; - -STATIC int cc3k_get_fd_closed_state(int fd) { - return fd_closed_state & (1 << fd); -} - -STATIC void cc3k_set_fd_closed_state(int fd) { - fd_closed_state |= 1 << fd; -} - -STATIC void cc3k_reset_fd_closed_state(int fd) { - fd_closed_state &= ~(1 << fd); -} - -STATIC void cc3k_callback(long event_type, char *data, unsigned char length) { - switch (event_type) { - case HCI_EVNT_WLAN_UNSOL_CONNECT: - wlan_connected = true; - break; - case HCI_EVNT_WLAN_UNSOL_DISCONNECT: - // link down - wlan_connected = false; - ip_obtained = false; - break; - case HCI_EVNT_WLAN_UNSOL_DHCP: - ip_obtained = true; - break; - case HCI_EVNT_BSD_TCP_CLOSE_WAIT: - // mark socket for closure - cc3k_set_fd_closed_state(data[0]); - break; - } -} - -STATIC int cc3k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip) { - uint32_t ip; - // CC3000 gethostbyname is unreliable and usually returns -95 on first call - for (int retry = 5; CC3000_EXPORT(gethostbyname)((char*)name, len, &ip) < 0; retry--) { - if (retry == 0 || CC3000_EXPORT(errno) != -95) { - return CC3000_EXPORT(errno); - } - mp_hal_delay_ms(50); - } - - if (ip == 0) { - // unknown host - return -2; - } - - out_ip[0] = ip >> 24; - out_ip[1] = ip >> 16; - out_ip[2] = ip >> 8; - out_ip[3] = ip; - - return 0; -} - -STATIC int cc3k_socket_socket(mod_network_socket_obj_t *socket, int *_errno) { - if (socket->u_param.domain != MOD_NETWORK_AF_INET) { - *_errno = MP_EAFNOSUPPORT; - return -1; - } - - mp_uint_t type; - switch (socket->u_param.type) { - case MOD_NETWORK_SOCK_STREAM: type = SOCK_STREAM; break; - case MOD_NETWORK_SOCK_DGRAM: type = SOCK_DGRAM; break; - case MOD_NETWORK_SOCK_RAW: type = SOCK_RAW; break; - default: *_errno = MP_EINVAL; return -1; - } - - // open socket - int fd = CC3000_EXPORT(socket)(AF_INET, type, 0); - if (fd < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - // clear socket state - cc3k_reset_fd_closed_state(fd); - - // store state of this socket - socket->u_state = fd; - - // make accept blocking by default - int optval = SOCK_OFF; - socklen_t optlen = sizeof(optval); - CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_ACCEPT_NONBLOCK, &optval, optlen); - - return 0; -} - -STATIC void cc3k_socket_close(mod_network_socket_obj_t *socket) { - CC3000_EXPORT(closesocket)(socket->u_state); -} - -STATIC int cc3k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(bind)(socket->u_state, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int cc3k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno) { - int ret = CC3000_EXPORT(listen)(socket->u_state, backlog); - if (ret != 0) { - *_errno = ret; - return -1; - } - return 0; -} - -STATIC int cc3k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno) { - // accept incoming connection - int fd; - sockaddr addr; - socklen_t addr_len = sizeof(addr); - if ((fd = CC3000_EXPORT(accept)(socket->u_state, &addr, &addr_len)) < 0) { - if (fd == SOC_IN_PROGRESS) { - *_errno = MP_EAGAIN; - } else { - *_errno = -fd; - } - return -1; - } - - // clear socket state - cc3k_reset_fd_closed_state(fd); - - // store state in new socket object - socket2->u_state = fd; - - // return ip and port - // it seems CC3000 returns little endian for accept?? - //UNPACK_SOCKADDR(addr, ip, *port); - *port = (addr.sa_data[1] << 8) | addr.sa_data[0]; - ip[3] = addr.sa_data[2]; - ip[2] = addr.sa_data[3]; - ip[1] = addr.sa_data[4]; - ip[0] = addr.sa_data[5]; - - return 0; -} - -STATIC int cc3k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(connect)(socket->u_state, &addr, sizeof(addr)); - if (ret != 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return 0; -} - -STATIC mp_uint_t cc3k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno) { - if (cc3k_get_fd_closed_state(socket->u_state)) { - CC3000_EXPORT(closesocket)(socket->u_state); - *_errno = MP_EPIPE; - return -1; - } - - // CC3K does not handle fragmentation, and will overflow, - // split the packet into smaller ones and send them out. - mp_int_t bytes = 0; - while (bytes < len) { - int n = MIN((len - bytes), MAX_TX_PACKET); - n = CC3000_EXPORT(send)(socket->u_state, (uint8_t*)buf + bytes, n, 0); - if (n <= 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - bytes += n; - } - - return bytes; -} - -STATIC mp_uint_t cc3k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) { - // check the socket is open - if (cc3k_get_fd_closed_state(socket->u_state)) { - // socket is closed, but CC3000 may have some data remaining in buffer, so check - fd_set rfds; - FD_ZERO(&rfds); - FD_SET(socket->u_state, &rfds); - cc3000_timeval tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int nfds = CC3000_EXPORT(select)(socket->u_state + 1, &rfds, NULL, NULL, &tv); - if (nfds == -1 || !FD_ISSET(socket->u_state, &rfds)) { - // no data waiting, so close socket and return 0 data - CC3000_EXPORT(closesocket)(socket->u_state); - return 0; - } - } - - // cap length at MAX_RX_PACKET - len = MIN(len, MAX_RX_PACKET); - - // do the recv - int ret = CC3000_EXPORT(recv)(socket->u_state, buf, len, 0); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - return ret; -} - -STATIC mp_uint_t cc3k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - MAKE_SOCKADDR(addr, ip, port) - int ret = CC3000_EXPORT(sendto)(socket->u_state, (byte*)buf, len, 0, (sockaddr*)&addr, sizeof(addr)); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return ret; -} - -STATIC mp_uint_t cc3k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - sockaddr addr; - socklen_t addr_len = sizeof(addr); - mp_int_t ret = CC3000_EXPORT(recvfrom)(socket->u_state, buf, len, 0, &addr, &addr_len); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - UNPACK_SOCKADDR(addr, ip, *port); - return ret; -} - -STATIC int cc3k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - int ret = CC3000_EXPORT(setsockopt)(socket->u_state, level, opt, optval, optlen); - if (ret < 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - return 0; -} - -STATIC int cc3k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno) { - int ret; - if (timeout_ms == 0 || timeout_ms == -1) { - int optval; - socklen_t optlen = sizeof(optval); - if (timeout_ms == 0) { - // set non-blocking mode - optval = SOCK_ON; - } else { - // set blocking mode - optval = SOCK_OFF; - } - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_RECV_NONBLOCK, &optval, optlen); - if (ret == 0) { - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_ACCEPT_NONBLOCK, &optval, optlen); - } - } else { - // set timeout - socklen_t optlen = sizeof(timeout_ms); - ret = CC3000_EXPORT(setsockopt)(socket->u_state, SOL_SOCKET, SOCKOPT_RECV_TIMEOUT, &timeout_ms, optlen); - } - - if (ret != 0) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - return 0; -} - -STATIC int cc3k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno) { - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - int fd = socket->u_state; - - // init fds - fd_set rfds, wfds, xfds; - FD_ZERO(&rfds); - FD_ZERO(&wfds); - FD_ZERO(&xfds); - - // set fds if needed - if (flags & MP_STREAM_POLL_RD) { - FD_SET(fd, &rfds); - - // A socked that just closed is available for reading. A call to - // recv() returns 0 which is consistent with BSD. - if (cc3k_get_fd_closed_state(fd)) { - ret |= MP_STREAM_POLL_RD; - } - } - if (flags & MP_STREAM_POLL_WR) { - FD_SET(fd, &wfds); - } - if (flags & MP_STREAM_POLL_HUP) { - FD_SET(fd, &xfds); - } - - // call cc3000 select with minimum timeout - cc3000_timeval tv; - tv.tv_sec = 0; - tv.tv_usec = 1; - int nfds = CC3000_EXPORT(select)(fd + 1, &rfds, &wfds, &xfds, &tv); - - // check for error - if (nfds == -1) { - *_errno = CC3000_EXPORT(errno); - return -1; - } - - // check return of select - if (FD_ISSET(fd, &rfds)) { - ret |= MP_STREAM_POLL_RD; - } - if (FD_ISSET(fd, &wfds)) { - ret |= MP_STREAM_POLL_WR; - } - if (FD_ISSET(fd, &xfds)) { - ret |= MP_STREAM_POLL_HUP; - } - } else { - *_errno = MP_EINVAL; - ret = -1; - } - return ret; -} - -/******************************************************************************/ -// MicroPython bindings; CC3K class - -typedef struct _cc3k_obj_t { - mp_obj_base_t base; -} cc3k_obj_t; - -STATIC const cc3k_obj_t cc3k_obj = {{(mp_obj_type_t*)&mod_network_nic_type_cc3k}}; - -// \classmethod \constructor(spi, pin_cs, pin_en, pin_irq) -// Initialise the CC3000 using the given SPI bus and pins and return a CC3K object. -// -// Note: pins were originally hard-coded to: -// PYBv1.0: init(pyb.SPI(2), pyb.Pin.board.Y5, pyb.Pin.board.Y4, pyb.Pin.board.Y3) -// [SPI on Y position; Y6=B13=SCK, Y7=B14=MISO, Y8=B15=MOSI] -// -// STM32F4DISC: init(pyb.SPI(2), pyb.Pin.cpu.A15, pyb.Pin.cpu.B10, pyb.Pin.cpu.B11) -STATIC mp_obj_t cc3k_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 4, 4, false); - - // set the pins to use - SpiInit( - spi_get_handle(args[0]), - pin_find(args[1]), - pin_find(args[2]), - pin_find(args[3]) - ); - - // initialize and start the module - wlan_init(cc3k_callback, NULL, NULL, NULL, - ReadWlanInterruptPin, SpiResumeSpi, SpiPauseSpi, WriteWlanPin); - - if (wlan_start(0) != 0) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "failed to init CC3000 module")); - } - - // set connection policy. this should be called explicitly by the user - // wlan_ioctl_set_connection_policy(0, 0, 0); - - // Mask out all non-required events from the CC3000 - wlan_set_event_mask(HCI_EVNT_WLAN_KEEPALIVE| - HCI_EVNT_WLAN_UNSOL_INIT| - HCI_EVNT_WLAN_ASYNC_PING_REPORT| - HCI_EVNT_WLAN_ASYNC_SIMPLE_CONFIG_DONE); - - // register with network module - mod_network_register_nic((mp_obj_t)&cc3k_obj); - - return (mp_obj_t)&cc3k_obj; -} - -// method connect(ssid, key=None, *, security=WPA2, bssid=None) -STATIC mp_obj_t cc3k_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_ssid, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_key, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_security, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = WLAN_SEC_WPA2} }, - { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get ssid - size_t ssid_len; - const char *ssid = mp_obj_str_get_data(args[0].u_obj, &ssid_len); - - // get key and sec - size_t key_len = 0; - const char *key = NULL; - mp_uint_t sec = WLAN_SEC_UNSEC; - if (args[1].u_obj != mp_const_none) { - key = mp_obj_str_get_data(args[1].u_obj, &key_len); - sec = args[2].u_int; - } - - // get bssid - const char *bssid = NULL; - if (args[3].u_obj != mp_const_none) { - bssid = mp_obj_str_get_str(args[3].u_obj); - } - - // connect to AP - if (wlan_connect(sec, (char*)ssid, ssid_len, (uint8_t*)bssid, (uint8_t*)key, key_len) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, "could not connect to ssid=%s, sec=%d, key=%s\n", ssid, sec, key)); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(cc3k_connect_obj, 1, cc3k_connect); - -STATIC mp_obj_t cc3k_disconnect(mp_obj_t self_in) { - // should we check return value? - wlan_disconnect(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_disconnect_obj, cc3k_disconnect); - -STATIC mp_obj_t cc3k_isconnected(mp_obj_t self_in) { - return mp_obj_new_bool(wlan_connected && ip_obtained); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_isconnected_obj, cc3k_isconnected); - -STATIC mp_obj_t cc3k_ifconfig(mp_obj_t self_in) { - tNetappIpconfigRetArgs ipconfig; - netapp_ipconfig(&ipconfig); - - // render MAC address - VSTR_FIXED(mac_vstr, 18); - const uint8_t *mac = ipconfig.uaMacAddr; - vstr_printf(&mac_vstr, "%02x:%02x:%02x:%02x:%02x:%02x", mac[5], mac[4], mac[3], mac[2], mac[1], mac[0]); - - // create and return tuple with ifconfig info - mp_obj_t tuple[7] = { - netutils_format_ipv4_addr(ipconfig.aucIP, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucSubnetMask, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDefaultGateway, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDNSServer, NETUTILS_LITTLE), - netutils_format_ipv4_addr(ipconfig.aucDHCPServer, NETUTILS_LITTLE), - mp_obj_new_str(mac_vstr.buf, mac_vstr.len, false), - mp_obj_new_str((const char*)ipconfig.uaSSID, strlen((const char*)ipconfig.uaSSID), false), - }; - return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_ifconfig_obj, cc3k_ifconfig); - -STATIC mp_obj_t cc3k_patch_version(mp_obj_t self_in) { - uint8_t pver[2]; - mp_obj_tuple_t *t_pver; - - nvmem_read_sp_version(pver); - t_pver = mp_obj_new_tuple(2, NULL); - t_pver->items[0] = mp_obj_new_int(pver[0]); - t_pver->items[1] = mp_obj_new_int(pver[1]); - return t_pver; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(cc3k_patch_version_obj, cc3k_patch_version); - -STATIC mp_obj_t cc3k_patch_program(mp_obj_t self_in, mp_obj_t key_in) { - const char *key = mp_obj_str_get_str(key_in); - if (key[0] == 'p' && key[1] == 'g' && key[2] == 'm' && key[3] == '\0') { - patch_prog_start(); - } else { - mp_print_str(&mp_plat_print, "pass 'pgm' as argument in order to program\n"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc3k_patch_program_obj, cc3k_patch_program); - -STATIC const mp_rom_map_elem_t cc3k_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&cc3k_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&cc3k_disconnect_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&cc3k_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&cc3k_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_patch_version), MP_ROM_PTR(&cc3k_patch_version_obj) }, - { MP_ROM_QSTR(MP_QSTR_patch_program), MP_ROM_PTR(&cc3k_patch_program_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_WEP), MP_ROM_INT(WLAN_SEC_WEP) }, - { MP_ROM_QSTR(MP_QSTR_WPA), MP_ROM_INT(WLAN_SEC_WPA) }, - { MP_ROM_QSTR(MP_QSTR_WPA2), MP_ROM_INT(WLAN_SEC_WPA2) }, -}; - -STATIC MP_DEFINE_CONST_DICT(cc3k_locals_dict, cc3k_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_cc3k = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_CC3K, - .make_new = cc3k_make_new, - .locals_dict = (mp_obj_dict_t*)&cc3k_locals_dict, - }, - .gethostbyname = cc3k_gethostbyname, - .socket = cc3k_socket_socket, - .close = cc3k_socket_close, - .bind = cc3k_socket_bind, - .listen = cc3k_socket_listen, - .accept = cc3k_socket_accept, - .connect = cc3k_socket_connect, - .send = cc3k_socket_send, - .recv = cc3k_socket_recv, - .sendto = cc3k_socket_sendto, - .recvfrom = cc3k_socket_recvfrom, - .setsockopt = cc3k_socket_setsockopt, - .settimeout = cc3k_socket_settimeout, - .ioctl = cc3k_socket_ioctl, -}; diff --git a/ports/stm32/modnwwiznet5k.c b/ports/stm32/modnwwiznet5k.c deleted file mode 100644 index 763137c703abf..0000000000000 --- a/ports/stm32/modnwwiznet5k.c +++ /dev/null @@ -1,501 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "spi.h" - -#include "ethernet/wizchip_conf.h" -#include "ethernet/socket.h" -#include "internet/dns/dns.h" - -/// \moduleref network - -typedef struct _wiznet5k_obj_t { - mp_obj_base_t base; - mp_uint_t cris_state; - SPI_HandleTypeDef *spi; - const pin_obj_t *cs; - const pin_obj_t *rst; - uint8_t socket_used; -} wiznet5k_obj_t; - -STATIC wiznet5k_obj_t wiznet5k_obj; - -STATIC void wiz_cris_enter(void) { - wiznet5k_obj.cris_state = MICROPY_BEGIN_ATOMIC_SECTION(); -} - -STATIC void wiz_cris_exit(void) { - MICROPY_END_ATOMIC_SECTION(wiznet5k_obj.cris_state); -} - -STATIC void wiz_cs_select(void) { - mp_hal_pin_low(wiznet5k_obj.cs); -} - -STATIC void wiz_cs_deselect(void) { - mp_hal_pin_high(wiznet5k_obj.cs); -} - -STATIC void wiz_spi_read(uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Receive(wiznet5k_obj.spi, buf, len, 5000); - (void)status; -} - -STATIC void wiz_spi_write(const uint8_t *buf, uint32_t len) { - HAL_StatusTypeDef status = HAL_SPI_Transmit(wiznet5k_obj.spi, (uint8_t*)buf, len, 5000); - (void)status; -} - -STATIC int wiznet5k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip) { - uint8_t dns_ip[MOD_NETWORK_IPADDR_BUF_SIZE] = {8, 8, 8, 8}; - uint8_t *buf = m_new(uint8_t, MAX_DNS_BUF_SIZE); - DNS_init(0, buf); - mp_int_t ret = DNS_run(dns_ip, (uint8_t*)name, out_ip); - m_del(uint8_t, buf, MAX_DNS_BUF_SIZE); - if (ret == 1) { - // success - return 0; - } else { - // failure - return -2; - } -} - -STATIC int wiznet5k_socket_socket(mod_network_socket_obj_t *socket, int *_errno) { - if (socket->u_param.domain != MOD_NETWORK_AF_INET) { - *_errno = MP_EAFNOSUPPORT; - return -1; - } - - switch (socket->u_param.type) { - case MOD_NETWORK_SOCK_STREAM: socket->u_param.type = Sn_MR_TCP; break; - case MOD_NETWORK_SOCK_DGRAM: socket->u_param.type = Sn_MR_UDP; break; - default: *_errno = MP_EINVAL; return -1; - } - - if (socket->u_param.fileno == -1) { - // get first unused socket number - for (mp_uint_t sn = 0; sn < _WIZCHIP_SOCK_NUM_; sn++) { - if ((wiznet5k_obj.socket_used & (1 << sn)) == 0) { - wiznet5k_obj.socket_used |= (1 << sn); - socket->u_param.fileno = sn; - break; - } - } - if (socket->u_param.fileno == -1) { - // too many open sockets - *_errno = MP_EMFILE; - return -1; - } - } - - // WIZNET does not have a concept of pure "open socket". You need to know - // if it's a server or client at the time of creation of the socket. - // So, we defer the open until we know what kind of socket we want. - - // use "domain" to indicate that this socket has not yet been opened - socket->u_param.domain = 0; - - return 0; -} - -STATIC void wiznet5k_socket_close(mod_network_socket_obj_t *socket) { - uint8_t sn = (uint8_t)socket->u_param.fileno; - if (sn < _WIZCHIP_SOCK_NUM_) { - wiznet5k_obj.socket_used &= ~(1 << sn); - WIZCHIP_EXPORT(close)(sn); - } -} - -STATIC int wiznet5k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - // open the socket in server mode (if port != 0) - mp_int_t ret = WIZCHIP_EXPORT(socket)(socket->u_param.fileno, socket->u_param.type, port, 0); - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - - // indicate that this socket has been opened - socket->u_param.domain = 1; - - // success - return 0; -} - -STATIC int wiznet5k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno) { - mp_int_t ret = WIZCHIP_EXPORT(listen)(socket->u_param.fileno); - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return 0; -} - -STATIC int wiznet5k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno) { - for (;;) { - int sr = getSn_SR((uint8_t)socket->u_param.fileno); - if (sr == SOCK_ESTABLISHED) { - socket2->u_param = socket->u_param; - getSn_DIPR((uint8_t)socket2->u_param.fileno, ip); - *port = getSn_PORT(socket2->u_param.fileno); - - // WIZnet turns the listening socket into the client socket, so we - // need to re-bind and re-listen on another socket for the server. - // TODO handle errors, especially no-more-sockets error - socket->u_param.domain = MOD_NETWORK_AF_INET; - socket->u_param.fileno = -1; - int _errno2; - if (wiznet5k_socket_socket(socket, &_errno2) != 0) { - //printf("(bad resocket %d)\n", _errno2); - } else if (wiznet5k_socket_bind(socket, NULL, *port, &_errno2) != 0) { - //printf("(bad rebind %d)\n", _errno2); - } else if (wiznet5k_socket_listen(socket, 0, &_errno2) != 0) { - //printf("(bad relisten %d)\n", _errno2); - } - - return 0; - } - if (sr == SOCK_CLOSED || sr == SOCK_CLOSE_WAIT) { - wiznet5k_socket_close(socket); - *_errno = MP_ENOTCONN; // ?? - return -1; - } - mp_hal_delay_ms(1); - } -} - -STATIC int wiznet5k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { - // use "bind" function to open the socket in client mode - if (wiznet5k_socket_bind(socket, ip, 0, _errno) != 0) { - return -1; - } - - // now connect - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(connect)(socket->u_param.fileno, ip, port); - MP_THREAD_GIL_ENTER(); - - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - - // success - return 0; -} - -STATIC mp_uint_t wiznet5k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno) { - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(send)(socket->u_param.fileno, (byte*)buf, len); - MP_THREAD_GIL_ENTER(); - - // TODO convert Wiz errno's to POSIX ones - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) { - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(recv)(socket->u_param.fileno, buf, len); - MP_THREAD_GIL_ENTER(); - - // TODO convert Wiz errno's to POSIX ones - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { - if (socket->u_param.domain == 0) { - // socket not opened; use "bind" function to open the socket in client mode - if (wiznet5k_socket_bind(socket, ip, 0, _errno) != 0) { - return -1; - } - } - - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(sendto)(socket->u_param.fileno, (byte*)buf, len, ip, port); - MP_THREAD_GIL_ENTER(); - - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC mp_uint_t wiznet5k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { - uint16_t port2; - MP_THREAD_GIL_EXIT(); - mp_int_t ret = WIZCHIP_EXPORT(recvfrom)(socket->u_param.fileno, buf, len, ip, &port2); - MP_THREAD_GIL_ENTER(); - *port = port2; - if (ret < 0) { - wiznet5k_socket_close(socket); - *_errno = -ret; - return -1; - } - return ret; -} - -STATIC int wiznet5k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { - // TODO - *_errno = MP_EINVAL; - return -1; -} - -STATIC int wiznet5k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno) { - // TODO - *_errno = MP_EINVAL; - return -1; - - /* - if (timeout_ms == 0) { - // set non-blocking mode - uint8_t arg = SOCK_IO_NONBLOCK; - WIZCHIP_EXPORT(ctlsocket)(socket->u_param.fileno, CS_SET_IOMODE, &arg); - } - */ -} - -STATIC int wiznet5k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno) { - if (request == MP_STREAM_POLL) { - int ret = 0; - if (arg & MP_STREAM_POLL_RD && getSn_RX_RSR(socket->u_param.fileno) != 0) { - ret |= MP_STREAM_POLL_RD; - } - if (arg & MP_STREAM_POLL_WR && getSn_TX_FSR(socket->u_param.fileno) != 0) { - ret |= MP_STREAM_POLL_WR; - } - return ret; - } else { - *_errno = MP_EINVAL; - return MP_STREAM_ERROR; - } -} - -#if 0 -STATIC void wiznet5k_socket_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) { - wiznet5k_socket_obj_t *self = self_in; - print(env, "", self->sn, getSn_MR(self->sn)); -} - -STATIC mp_obj_t wiznet5k_socket_disconnect(mp_obj_t self_in) { - mp_int_t ret = WIZCHIP_EXPORT(disconnect)(self->sn); - return 0; -} -#endif - -/******************************************************************************/ -// MicroPython bindings - -/// \classmethod \constructor(spi, pin_cs, pin_rst) -/// Create and return a WIZNET5K object. -STATIC mp_obj_t wiznet5k_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 3, 3, false); - - // init the wiznet5k object - wiznet5k_obj.base.type = (mp_obj_type_t*)&mod_network_nic_type_wiznet5k; - wiznet5k_obj.cris_state = 0; - wiznet5k_obj.spi = spi_get_handle(args[0]); - wiznet5k_obj.cs = pin_find(args[1]); - wiznet5k_obj.rst = pin_find(args[2]); - wiznet5k_obj.socket_used = 0; - - /*!< SPI configuration */ - wiznet5k_obj.spi->Init.Mode = SPI_MODE_MASTER; - wiznet5k_obj.spi->Init.Direction = SPI_DIRECTION_2LINES; - wiznet5k_obj.spi->Init.DataSize = SPI_DATASIZE_8BIT; - wiznet5k_obj.spi->Init.CLKPolarity = SPI_POLARITY_LOW; // clock is low when idle - wiznet5k_obj.spi->Init.CLKPhase = SPI_PHASE_1EDGE; // data latched on first edge, which is rising edge for low-idle - wiznet5k_obj.spi->Init.NSS = SPI_NSS_SOFT; - wiznet5k_obj.spi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; // clock freq = f_PCLK / this_prescale_value; Wiz820i can do up to 80MHz - wiznet5k_obj.spi->Init.FirstBit = SPI_FIRSTBIT_MSB; - wiznet5k_obj.spi->Init.TIMode = SPI_TIMODE_DISABLED; - wiznet5k_obj.spi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; - wiznet5k_obj.spi->Init.CRCPolynomial = 7; // unused - spi_init(wiznet5k_obj.spi, false); - - mp_hal_pin_output(wiznet5k_obj.cs); - mp_hal_pin_output(wiznet5k_obj.rst); - - mp_hal_pin_low(wiznet5k_obj.rst); - mp_hal_delay_ms(1); // datasheet says 2us - mp_hal_pin_high(wiznet5k_obj.rst); - mp_hal_delay_ms(160); // datasheet says 150ms - - reg_wizchip_cris_cbfunc(wiz_cris_enter, wiz_cris_exit); - reg_wizchip_cs_cbfunc(wiz_cs_select, wiz_cs_deselect); - reg_wizchip_spi_cbfunc(wiz_spi_read, wiz_spi_write); - - uint8_t sn_size[16] = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}; // 2k buffer for each socket - ctlwizchip(CW_INIT_WIZCHIP, sn_size); - - // set some sensible default values; they are configurable using ifconfig method - wiz_NetInfo netinfo = { - .mac = {0x00, 0x08, 0xdc, 0xab, 0xcd, 0xef}, - .ip = {192, 168, 0, 18}, - .sn = {255, 255, 255, 0}, - .gw = {192, 168, 0, 1}, - .dns = {8, 8, 8, 8}, // Google public DNS - .dhcp = NETINFO_STATIC, - }; - ctlnetwork(CN_SET_NETINFO, (void*)&netinfo); - - // seems we need a small delay after init - mp_hal_delay_ms(250); - - // register with network module - mod_network_register_nic(&wiznet5k_obj); - - // return wiznet5k object - return &wiznet5k_obj; -} - -/// \method regs() -/// Dump WIZNET5K registers. -STATIC mp_obj_t wiznet5k_regs(mp_obj_t self_in) { - //wiznet5k_obj_t *self = self_in; - printf("Wiz CREG:"); - for (int i = 0; i < 0x50; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = i; - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - for (int sn = 0; sn < 4; ++sn) { - printf("\nWiz SREG[%d]:", sn); - for (int i = 0; i < 0x30; ++i) { - if (i % 16 == 0) { - printf("\n %04x:", i); - } - #if MICROPY_PY_WIZNET5K == 5200 - uint32_t reg = WIZCHIP_SREG_ADDR(sn, i); - #else - uint32_t reg = _W5500_IO_BASE_ | i << 8 | WIZCHIP_SREG_BLOCK(sn) << 3; - #endif - printf(" %02x", WIZCHIP_READ(reg)); - } - } - printf("\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_regs_obj, wiznet5k_regs); - -STATIC mp_obj_t wiznet5k_isconnected(mp_obj_t self_in) { - (void)self_in; - return mp_obj_new_bool(wizphy_getphylink() == PHY_LINK_ON); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_isconnected_obj, wiznet5k_isconnected); - -/// \method ifconfig([(ip, subnet, gateway, dns)]) -/// Get/set IP address, subnet mask, gateway and DNS. -STATIC mp_obj_t wiznet5k_ifconfig(size_t n_args, const mp_obj_t *args) { - wiz_NetInfo netinfo; - ctlnetwork(CN_GET_NETINFO, &netinfo); - if (n_args == 1) { - // get - mp_obj_t tuple[4] = { - netutils_format_ipv4_addr(netinfo.ip, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.sn, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.gw, NETUTILS_BIG), - netutils_format_ipv4_addr(netinfo.dns, NETUTILS_BIG), - }; - return mp_obj_new_tuple(4, tuple); - } else { - // set - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 4, &items); - netutils_parse_ipv4_addr(items[0], netinfo.ip, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[1], netinfo.sn, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[2], netinfo.gw, NETUTILS_BIG); - netutils_parse_ipv4_addr(items[3], netinfo.dns, NETUTILS_BIG); - ctlnetwork(CN_SET_NETINFO, &netinfo); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_ifconfig_obj, 1, 2, wiznet5k_ifconfig); - -STATIC const mp_rom_map_elem_t wiznet5k_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&wiznet5k_regs_obj) }, - { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wiznet5k_ifconfig_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&wiznet5k_isconnected_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(wiznet5k_locals_dict, wiznet5k_locals_dict_table); - -const mod_network_nic_type_t mod_network_nic_type_wiznet5k = { - .base = { - { &mp_type_type }, - .name = MP_QSTR_WIZNET5K, - .make_new = wiznet5k_make_new, - .locals_dict = (mp_obj_dict_t*)&wiznet5k_locals_dict, - }, - .gethostbyname = wiznet5k_gethostbyname, - .socket = wiznet5k_socket_socket, - .close = wiznet5k_socket_close, - .bind = wiznet5k_socket_bind, - .listen = wiznet5k_socket_listen, - .accept = wiznet5k_socket_accept, - .connect = wiznet5k_socket_connect, - .send = wiznet5k_socket_send, - .recv = wiznet5k_socket_recv, - .sendto = wiznet5k_socket_sendto, - .recvfrom = wiznet5k_socket_recvfrom, - .setsockopt = wiznet5k_socket_setsockopt, - .settimeout = wiznet5k_socket_settimeout, - .ioctl = wiznet5k_socket_ioctl, -}; diff --git a/ports/stm32/modpyb.c b/ports/stm32/modpyb.c deleted file mode 100644 index 81cbdcc19135e..0000000000000 --- a/ports/stm32/modpyb.c +++ /dev/null @@ -1,234 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/builtin.h" -#include "py/mphal.h" -#include "lib/utils/pyexec.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "gccollect.h" -#include "stm32_it.h" -#include "irq.h" -#include "systick.h" -#include "led.h" -#include "pin.h" -#include "timer.h" -#include "extint.h" -#include "usrsw.h" -#include "rng.h" -#include "rtc.h" -#include "i2c.h" -#include "spi.h" -#include "uart.h" -#include "can.h" -#include "adc.h" -#include "storage.h" -#include "sdcard.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "lcd.h" -#include "usb.h" -#include "portmodules.h" -#include "modmachine.h" -#include "extmod/vfs.h" -#include "extmod/utime_mphal.h" - -STATIC mp_obj_t pyb_fault_debug(mp_obj_t value) { - pyb_hard_fault_debug = mp_obj_is_true(value); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_fault_debug_obj, pyb_fault_debug); - -/// \function elapsed_millis(start) -/// Returns the number of milliseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 12.4 days. -/// -/// Example: -/// start = pyb.millis() -/// while pyb.elapsed_millis(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -/// \function elapsed_micros(start) -/// Returns the number of microseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 17.8 minutes. -/// -/// Example: -/// start = pyb.micros() -/// while pyb.elapsed_micros(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) { - uint32_t startMicros = mp_obj_get_int(start); - uint32_t currMicros = mp_hal_ticks_us(); - return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros); - -MP_DECLARE_CONST_FUN_OBJ_KW(pyb_main_obj); // defined in main.c - -// Get or set the UART object that the REPL is repeated on. -// This is a legacy function, use of uos.dupterm is preferred. -STATIC mp_obj_t pyb_repl_uart(size_t n_args, const mp_obj_t *args) { - if (n_args == 0) { - if (MP_STATE_PORT(pyb_stdio_uart) == NULL) { - return mp_const_none; - } else { - return MP_STATE_PORT(pyb_stdio_uart); - } - } else { - if (args[0] == mp_const_none) { - MP_STATE_PORT(pyb_stdio_uart) = NULL; - } else if (mp_obj_get_type(args[0]) == &pyb_uart_type) { - MP_STATE_PORT(pyb_stdio_uart) = args[0]; - } else { - mp_raise_ValueError("need a UART object"); - } - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_repl_uart_obj, 0, 1, pyb_repl_uart); - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_fault_debug), MP_ROM_PTR(&pyb_fault_debug_obj) }, - - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_hard_reset), MP_ROM_PTR(&machine_reset_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) }, - - { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - #if IRQ_ENABLE_STATS - { MP_ROM_QSTR(MP_QSTR_irq_stats), MP_ROM_PTR(&pyb_irq_stats_obj) }, - #endif - - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&machine_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_standby), MP_ROM_PTR(&machine_deepsleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_repl_uart), MP_ROM_PTR(&pyb_repl_uart_obj) }, - - { MP_ROM_QSTR(MP_QSTR_usb_mode), MP_ROM_PTR(&pyb_usb_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid_mouse), MP_ROM_PTR(&pyb_usb_hid_mouse_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid_keyboard), MP_ROM_PTR(&pyb_usb_hid_keyboard_obj) }, - { MP_ROM_QSTR(MP_QSTR_USB_VCP), MP_ROM_PTR(&pyb_usb_vcp_type) }, - { MP_ROM_QSTR(MP_QSTR_USB_HID), MP_ROM_PTR(&pyb_usb_hid_type) }, - // these 2 are deprecated; use USB_VCP.isconnected and USB_HID.send instead - { MP_ROM_QSTR(MP_QSTR_have_cdc), MP_ROM_PTR(&pyb_have_cdc_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid), MP_ROM_PTR(&pyb_hid_send_report_obj) }, - - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_micros), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_micros), MP_ROM_PTR(&pyb_elapsed_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_udelay), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&mod_os_sync_obj) }, - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -#endif - -#if MICROPY_HW_ENABLE_RTC - { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, -#endif - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, - { MP_ROM_QSTR(MP_QSTR_ExtInt), MP_ROM_PTR(&extint_type) }, - -#if MICROPY_HW_ENABLE_SERVO - { MP_ROM_QSTR(MP_QSTR_pwm), MP_ROM_PTR(&pyb_pwm_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_servo), MP_ROM_PTR(&pyb_servo_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_Servo), MP_ROM_PTR(&pyb_servo_type) }, -#endif - -#if MICROPY_HW_HAS_SWITCH - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -#endif - -#if MICROPY_HW_HAS_FLASH - { MP_ROM_QSTR(MP_QSTR_Flash), MP_ROM_PTR(&pyb_flash_type) }, -#endif - -#if MICROPY_HW_HAS_SDCARD - { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sdcard_obj) }, // now obsolete - { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&pyb_sdcard_type) }, -#endif - -#if defined(MICROPY_HW_LED1) - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, -#endif - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, -#if MICROPY_HW_ENABLE_CAN - { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&pyb_can_type) }, -#endif - - { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_ADCAll), MP_ROM_PTR(&pyb_adc_all_type) }, - -#if MICROPY_HW_ENABLE_DAC - { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pyb_dac_type) }, -#endif - -#if MICROPY_HW_HAS_MMA7660 - { MP_ROM_QSTR(MP_QSTR_Accel), MP_ROM_PTR(&pyb_accel_type) }, -#endif - -#if MICROPY_HW_HAS_LCD - { MP_ROM_QSTR(MP_QSTR_LCD), MP_ROM_PTR(&pyb_lcd_type) }, -#endif -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/stm32/modstm.c b/ports/stm32/modstm.c deleted file mode 100644 index 2084c0aa0e380..0000000000000 --- a/ports/stm32/modstm.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/objint.h" -#include "extmod/machine_mem.h" -#include "genhdr/modstm_mpz.h" -#include "portmodules.h" - -STATIC const mp_rom_map_elem_t stm_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_stm) }, - - { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) }, - { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, - -#include "genhdr/modstm_const.h" -}; - -STATIC MP_DEFINE_CONST_DICT(stm_module_globals, stm_module_globals_table); - -const mp_obj_module_t stm_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&stm_module_globals, -}; diff --git a/ports/stm32/modules/lcd160cr.py b/ports/stm32/modules/lcd160cr.py deleted file mode 120000 index 9e63f1d23f851..0000000000000 --- a/ports/stm32/modules/lcd160cr.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/display/lcd160cr.py \ No newline at end of file diff --git a/ports/stm32/modules/lcd160cr_test.py b/ports/stm32/modules/lcd160cr_test.py deleted file mode 120000 index 5f5bcc1281807..0000000000000 --- a/ports/stm32/modules/lcd160cr_test.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/display/lcd160cr_test.py \ No newline at end of file diff --git a/ports/stm32/modules/onewire.py b/ports/stm32/modules/onewire.py deleted file mode 120000 index 33f30e84f11cd..0000000000000 --- a/ports/stm32/modules/onewire.py +++ /dev/null @@ -1 +0,0 @@ -../../../drivers/onewire/onewire.py \ No newline at end of file diff --git a/ports/stm32/moduos.c b/ports/stm32/moduos.c deleted file mode 100644 index f6e1483d35516..0000000000000 --- a/ports/stm32/moduos.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/objtuple.h" -#include "py/objstr.h" -#include "lib/timeutils/timeutils.h" -#include "lib/oofatfs/ff.h" -#include "lib/oofatfs/diskio.h" -#include "extmod/misc.h" -#include "extmod/vfs.h" -#include "extmod/vfs_fat.h" -#include "genhdr/mpversion.h" -#include "rng.h" -#include "uart.h" -#include "portmodules.h" - -/// \module os - basic "operating system" services -/// -/// The `os` module contains functions for filesystem access and `urandom`. -/// -/// The filesystem has `/` as the root directory, and the available physical -/// drives are accessible from here. They are currently: -/// -/// /flash -- the internal flash filesystem -/// /sd -- the SD card (if it exists) -/// -/// On boot up, the current directory is `/flash` if no SD card is inserted, -/// otherwise it is `/sd`. - -STATIC const qstr os_uname_info_fields[] = { - MP_QSTR_sysname, MP_QSTR_nodename, - MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine -}; -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "pyboard"); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "pyboard"); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); -STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); -STATIC MP_DEFINE_ATTRTUPLE( - os_uname_info_obj, - os_uname_info_fields, - 5, - (mp_obj_t)&os_uname_info_sysname_obj, - (mp_obj_t)&os_uname_info_nodename_obj, - (mp_obj_t)&os_uname_info_release_obj, - (mp_obj_t)&os_uname_info_version_obj, - (mp_obj_t)&os_uname_info_machine_obj -); - -STATIC mp_obj_t os_uname(void) { - return (mp_obj_t)&os_uname_info_obj; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(os_uname_obj, os_uname); - -/// \function sync() -/// Sync all filesystems. -STATIC mp_obj_t os_sync(void) { - for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { - // this assumes that vfs->obj is fs_user_mount_t with block device functions - disk_ioctl(MP_OBJ_TO_PTR(vfs->obj), CTRL_SYNC, NULL); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_0(mod_os_sync_obj, os_sync); - -#if MICROPY_HW_ENABLE_RNG -/// \function urandom(n) -/// Return a bytes object with n random bytes, generated by the hardware -/// random number generator. -STATIC mp_obj_t os_urandom(mp_obj_t num) { - mp_int_t n = mp_obj_get_int(num); - vstr_t vstr; - vstr_init_len(&vstr, n); - for (int i = 0; i < n; i++) { - vstr.buf[i] = rng_get(); - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); -#endif - -STATIC const mp_rom_map_elem_t os_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, - - { MP_ROM_QSTR(MP_QSTR_uname), MP_ROM_PTR(&os_uname_obj) }, - - { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, - { MP_ROM_QSTR(MP_QSTR_ilistdir), MP_ROM_PTR(&mp_vfs_ilistdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_listdir), MP_ROM_PTR(&mp_vfs_listdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_mkdir), MP_ROM_PTR(&mp_vfs_mkdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&mp_vfs_remove_obj) }, - { MP_ROM_QSTR(MP_QSTR_rename),MP_ROM_PTR(&mp_vfs_rename_obj)}, - { MP_ROM_QSTR(MP_QSTR_rmdir), MP_ROM_PTR(&mp_vfs_rmdir_obj) }, - { MP_ROM_QSTR(MP_QSTR_stat), MP_ROM_PTR(&mp_vfs_stat_obj) }, - { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, - { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove - - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&mod_os_sync_obj) }, - - /// \constant sep - separation character used in paths - { MP_ROM_QSTR(MP_QSTR_sep), MP_ROM_QSTR(MP_QSTR__slash_) }, - -#if MICROPY_HW_ENABLE_RNG - { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&os_urandom_obj) }, -#endif - - // these are MicroPython extensions - { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&mp_uos_dupterm_obj) }, - { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, - { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(os_module_globals, os_module_globals_table); - -const mp_obj_module_t mp_module_uos = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&os_module_globals, -}; diff --git a/ports/stm32/modusocket.c b/ports/stm32/modusocket.c deleted file mode 100644 index 71a237b0d9fce..0000000000000 --- a/ports/stm32/modusocket.c +++ /dev/null @@ -1,470 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/objtuple.h" -#include "py/objlist.h" -#include "py/runtime.h" -#include "py/mperrno.h" -#include "lib/netutils/netutils.h" -#include "modnetwork.h" - -#if MICROPY_PY_USOCKET - -/******************************************************************************/ -// socket class - -STATIC const mp_obj_type_t socket_type; - -// constructor socket(family=AF_INET, type=SOCK_STREAM, proto=0, fileno=None) -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - // create socket object (not bound to any NIC yet) - mod_network_socket_obj_t *s = m_new_obj_with_finaliser(mod_network_socket_obj_t); - s->base.type = (mp_obj_t)&socket_type; - s->nic = MP_OBJ_NULL; - s->nic_type = NULL; - s->u_param.domain = MOD_NETWORK_AF_INET; - s->u_param.type = MOD_NETWORK_SOCK_STREAM; - s->u_param.fileno = -1; - if (n_args >= 1) { - s->u_param.domain = mp_obj_get_int(args[0]); - if (n_args >= 2) { - s->u_param.type = mp_obj_get_int(args[1]); - if (n_args >= 4) { - s->u_param.fileno = mp_obj_get_int(args[3]); - } - } - } - - return s; -} - -STATIC void socket_select_nic(mod_network_socket_obj_t *self, const byte *ip) { - if (self->nic == MP_OBJ_NULL) { - // select NIC based on IP - self->nic = mod_network_find_nic(ip); - self->nic_type = (mod_network_nic_type_t*)mp_obj_get_type(self->nic); - - // call the NIC to open the socket - int _errno; - if (self->nic_type->socket(self, &_errno) != 0) { - mp_raise_OSError(_errno); - } - } -} -// method socket.close() -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic != MP_OBJ_NULL) { - self->nic_type->close(self); - self->nic = MP_OBJ_NULL; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); - -// method socket.bind(address) -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to bind the socket - int _errno; - if (self->nic_type->bind(self, ip, port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -// method socket.listen(backlog) -STATIC mp_obj_t socket_listen(mp_obj_t self_in, mp_obj_t backlog) { - mod_network_socket_obj_t *self = self_in; - - if (self->nic == MP_OBJ_NULL) { - // not connected - // TODO I think we can listen even if not bound... - mp_raise_OSError(MP_ENOTCONN); - } - - int _errno; - if (self->nic_type->listen(self, mp_obj_get_int(backlog), &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); - -// method socket.accept() -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - mod_network_socket_obj_t *self = self_in; - - // create new socket object - // starts with empty NIC so that finaliser doesn't run close() method if accept() fails - mod_network_socket_obj_t *socket2 = m_new_obj_with_finaliser(mod_network_socket_obj_t); - socket2->base.type = (mp_obj_t)&socket_type; - socket2->nic = MP_OBJ_NULL; - socket2->nic_type = NULL; - - // accept incoming connection - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port; - int _errno; - if (self->nic_type->accept(self, socket2, ip, &port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - // new socket has valid state, so set the NIC to the same as parent - socket2->nic = self->nic; - socket2->nic_type = self->nic_type; - - // make the return value - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = socket2; - client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - - return client; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -// method socket.connect(address) -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to connect the socket - int _errno; - if (self->nic_type->connect(self, ip, port, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -// method socket.send(bytes) -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_EPIPE); - } - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int _errno; - mp_uint_t ret = self->nic_type->send(self, bufinfo.buf, bufinfo.len, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - return mp_obj_new_int_from_uint(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -// method socket.recv(bufsize) -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - mp_int_t len = mp_obj_get_int(len_in); - vstr_t vstr; - vstr_init_len(&vstr, len); - int _errno; - mp_uint_t ret = self->nic_type->recv(self, (byte*)vstr.buf, len, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - if (ret == 0) { - return mp_const_empty_bytes; - } - vstr.len = ret; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -// method socket.sendto(bytes, address) -STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { - mod_network_socket_obj_t *self = self_in; - - // get the data - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); - - // get address - uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); - - // check if we need to select a NIC - socket_select_nic(self, ip); - - // call the NIC to sendto - int _errno; - mp_int_t ret = self->nic_type->sendto(self, bufinfo.buf, bufinfo.len, ip, port, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); - -// method socket.recvfrom(bufsize) -STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(len_in)); - byte ip[4]; - mp_uint_t port; - int _errno; - mp_int_t ret = self->nic_type->recvfrom(self, (byte*)vstr.buf, vstr.len, ip, &port, &_errno); - if (ret == -1) { - mp_raise_OSError(_errno); - } - mp_obj_t tuple[2]; - if (ret == 0) { - tuple[0] = mp_const_empty_bytes; - } else { - vstr.len = ret; - tuple[0] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } - tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); - return mp_obj_new_tuple(2, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); - -// method socket.setsockopt(level, optname, value) -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - mod_network_socket_obj_t *self = args[0]; - - mp_int_t level = mp_obj_get_int(args[1]); - mp_int_t opt = mp_obj_get_int(args[2]); - - const void *optval; - mp_uint_t optlen; - mp_int_t val; - if (mp_obj_is_integer(args[3])) { - val = mp_obj_get_int_truncated(args[3]); - optval = &val; - optlen = sizeof(val); - } else { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); - optval = bufinfo.buf; - optlen = bufinfo.len; - } - - int _errno; - if (self->nic_type->setsockopt(self, level, opt, optval, optlen, &_errno) != 0) { - mp_raise_OSError(_errno); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -// method socket.settimeout(value) -// timeout=0 means non-blocking -// timeout=None means blocking -// otherwise, timeout is in seconds -STATIC mp_obj_t socket_settimeout(mp_obj_t self_in, mp_obj_t timeout_in) { - mod_network_socket_obj_t *self = self_in; - if (self->nic == MP_OBJ_NULL) { - // not connected - mp_raise_OSError(MP_ENOTCONN); - } - mp_uint_t timeout; - if (timeout_in == mp_const_none) { - timeout = -1; - } else { - #if MICROPY_PY_BUILTINS_FLOAT - timeout = 1000 * mp_obj_get_float(timeout_in); - #else - timeout = 1000 * mp_obj_get_int(timeout_in); - #endif - } - int _errno; - if (self->nic_type->settimeout(self, timeout, &_errno) != 0) { - mp_raise_OSError(_errno); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); - -// method socket.setblocking(flag) -STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t blocking) { - if (mp_obj_is_true(blocking)) { - return socket_settimeout(self_in, mp_const_none); - } else { - return socket_settimeout(self_in, MP_OBJ_NEW_SMALL_INT(0)); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, - { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, - { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -mp_uint_t socket_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mod_network_socket_obj_t *self = self_in; - return self->nic_type->ioctl(self, request, arg, errcode); -} - -STATIC const mp_stream_p_t socket_stream_p = { - .ioctl = socket_ioctl, - .is_text = false, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_dict_t*)&socket_locals_dict, -}; - -/******************************************************************************/ -// usocket module - -// function usocket.getaddrinfo(host, port) -STATIC mp_obj_t mod_usocket_getaddrinfo(mp_obj_t host_in, mp_obj_t port_in) { - size_t hlen; - const char *host = mp_obj_str_get_data(host_in, &hlen); - mp_int_t port = mp_obj_get_int(port_in); - uint8_t out_ip[MOD_NETWORK_IPADDR_BUF_SIZE]; - bool have_ip = false; - - if (hlen > 0) { - // check if host is already in IP form - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - netutils_parse_ipv4_addr(host_in, out_ip, NETUTILS_BIG); - have_ip = true; - nlr_pop(); - } else { - // swallow exception: host was not in IP form so need to do DNS lookup - } - } - - if (!have_ip) { - // find a NIC that can do a name lookup - for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { - mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; - mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); - if (nic_type->gethostbyname != NULL) { - int ret = nic_type->gethostbyname(nic, host, hlen, out_ip); - if (ret != 0) { - mp_raise_OSError(ret); - } - have_ip = true; - break; - } - } - } - - if (!have_ip) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "no available NIC")); - } - - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_AF_INET); - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_SOCK_STREAM); - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = netutils_format_inet_addr(out_ip, port, NETUTILS_BIG); - return mp_obj_new_list(1, (mp_obj_t*)&tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(mod_usocket_getaddrinfo_obj, mod_usocket_getaddrinfo); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_usocket_getaddrinfo_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(MOD_NETWORK_AF_INET) }, - { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(MOD_NETWORK_AF_INET6) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(MOD_NETWORK_SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(MOD_NETWORK_SOCK_DGRAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_RAW), MP_ROM_INT(MOD_NETWORK_SOCK_RAW) }, - - /* - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IP), MP_ROM_INT(MOD_NETWORK_IPPROTO_IP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_ICMP), MP_ROM_INT(MOD_NETWORK_IPPROTO_ICMP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV4), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV4) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(MOD_NETWORK_IPPROTO_TCP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(MOD_NETWORK_IPPROTO_UDP) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV6), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV6) }, - { MP_ROM_QSTR(MP_QSTR_IPPROTO_RAW), MP_ROM_INT(MOD_NETWORK_IPPROTO_RAW) }, - */ -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; - -#endif // MICROPY_PY_USOCKET diff --git a/ports/stm32/modutime.c b/ports/stm32/modutime.c deleted file mode 100644 index 54045f4c5cda1..0000000000000 --- a/ports/stm32/modutime.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/smallint.h" -#include "py/obj.h" -#include "lib/timeutils/timeutils.h" -#include "extmod/utime_mphal.h" -#include "systick.h" -#include "portmodules.h" -#include "rtc.h" - -/// \module time - time related functions -/// -/// The `time` module provides functions for getting the current time and date, -/// and for sleeping. - -/// \function localtime([secs]) -/// Convert a time expressed in seconds since Jan 1, 2000 into an 8-tuple which -/// contains: (year, month, mday, hour, minute, second, weekday, yearday) -/// If secs is not provided or None, then the current time from the RTC is used. -/// year includes the century (for example 2014) -/// month is 1-12 -/// mday is 1-31 -/// hour is 0-23 -/// minute is 0-59 -/// second is 0-59 -/// weekday is 0-6 for Mon-Sun. -/// yearday is 1-366 -STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { - if (n_args == 0 || args[0] == mp_const_none) { - // get current date and time - // note: need to call get time then get date to correctly access the registers - rtc_init_finalise(); - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, FORMAT_BIN); - mp_obj_t tuple[8] = { - mp_obj_new_int(2000 + date.Year), - mp_obj_new_int(date.Month), - mp_obj_new_int(date.Date), - mp_obj_new_int(time.Hours), - mp_obj_new_int(time.Minutes), - mp_obj_new_int(time.Seconds), - mp_obj_new_int(date.WeekDay - 1), - mp_obj_new_int(timeutils_year_day(2000 + date.Year, date.Month, date.Date)), - }; - return mp_obj_new_tuple(8, tuple); - } else { - mp_int_t seconds = mp_obj_get_int(args[0]); - timeutils_struct_time_t tm; - timeutils_seconds_since_2000_to_struct_time(seconds, &tm); - mp_obj_t tuple[8] = { - tuple[0] = mp_obj_new_int(tm.tm_year), - tuple[1] = mp_obj_new_int(tm.tm_mon), - tuple[2] = mp_obj_new_int(tm.tm_mday), - tuple[3] = mp_obj_new_int(tm.tm_hour), - tuple[4] = mp_obj_new_int(tm.tm_min), - tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), - }; - return mp_obj_new_tuple(8, tuple); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); - - -/// \function mktime() -/// This is inverse function of localtime. It's argument is a full 8-tuple -/// which expresses a time as per localtime. It returns an integer which is -/// the number of seconds since Jan 1, 2000. -STATIC mp_obj_t time_mktime(mp_obj_t tuple) { - - size_t len; - mp_obj_t *elem; - - mp_obj_get_array(tuple, &len, &elem); - - // localtime generates a tuple of len 8. CPython uses 9, so we accept both. - if (len < 8 || len > 9) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "mktime needs a tuple of length 8 or 9 (%d given)", len)); - } - - return mp_obj_new_int_from_uint(timeutils_mktime(mp_obj_get_int(elem[0]), - mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), mp_obj_get_int(elem[3]), - mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5]))); -} -MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); - -/// \function time() -/// Returns the number of seconds, as an integer, since 1/1/2000. -STATIC mp_obj_t time_time(void) { - // get date and time - // note: need to call get time then get date to correctly access the registers - rtc_init_finalise(); - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, FORMAT_BIN); - return mp_obj_new_int(timeutils_seconds_since_2000(2000 + date.Year, date.Month, date.Date, time.Hours, time.Minutes, time.Seconds)); -} -MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); - -STATIC const mp_rom_map_elem_t time_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - - { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, - { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(time_module_globals, time_module_globals_table); - -const mp_obj_module_t mp_module_utime = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&time_module_globals, -}; diff --git a/ports/stm32/mpconfigport.h b/ports/stm32/mpconfigport.h deleted file mode 100644 index 51d44256161ab..0000000000000 --- a/ports/stm32/mpconfigport.h +++ /dev/null @@ -1,362 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// Options to control how MicroPython is built for this port, -// overriding defaults in py/mpconfig.h. - -// board specific definitions -#include "mpconfigboard.h" - -// memory allocation policies -#define MICROPY_ALLOC_PATH_MAX (128) - -// emitters -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#ifndef MICROPY_EMIT_THUMB -#define MICROPY_EMIT_THUMB (1) -#endif -#ifndef MICROPY_EMIT_INLINE_THUMB -#define MICROPY_EMIT_INLINE_THUMB (1) -#endif - -// compiler configuration -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) -#define MICROPY_COMP_RETURN_IF_EXPR (1) - -// optimisations -#define MICROPY_OPT_COMPUTED_GOTO (1) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0) -#define MICROPY_OPT_MPZ_BITWISE (1) - -// Python internal features -#define MICROPY_READER_VFS (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#ifndef MICROPY_FLOAT_IMPL // can be configured by each board via mpconfigboard.mk -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#endif -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_USE_INTERNAL_ERRNO (1) -#define MICROPY_ENABLE_SCHEDULER (1) -#define MICROPY_SCHEDULER_DEPTH (8) -#define MICROPY_VFS (1) -#define MICROPY_VFS_FAT (1) - -// control over Python builtins -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (1) -#define MICROPY_PY_BUILTINS_STR_PARTITION (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_EXECFILE (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT stm32_help_text -#define MICROPY_PY_BUILTINS_HELP_MODULES (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) -#define MICROPY_PY_CMATH (1) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_STDIO_BUFFER (1) -#ifndef MICROPY_PY_SYS_PLATFORM // let boards override it if they want -#define MICROPY_PY_SYS_PLATFORM "pyboard" -#endif -#define MICROPY_PY_UERRNO (1) -#ifndef MICROPY_PY_THREAD -#define MICROPY_PY_THREAD (0) -#endif - -// extended modules -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_URANDOM_EXTRA_FUNCS (1) -#define MICROPY_PY_USELECT (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_OS_DUPTERM (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_PY_MACHINE_I2C (1) -#define MICROPY_PY_MACHINE_I2C_MAKE_NEW machine_hard_i2c_make_new -#define MICROPY_PY_MACHINE_SPI (1) -#define MICROPY_PY_MACHINE_SPI_MSB (SPI_FIRSTBIT_MSB) -#define MICROPY_PY_MACHINE_SPI_LSB (SPI_FIRSTBIT_LSB) -#define MICROPY_PY_MACHINE_SPI_MAKE_NEW machine_hard_spi_make_new -#define MICROPY_PY_MACHINE_SPI_MIN_DELAY (0) -#define MICROPY_PY_MACHINE_SPI_MAX_BAUDRATE (HAL_RCC_GetSysClockFreq() / 48) -#define MICROPY_PY_FRAMEBUF (1) -#ifndef MICROPY_PY_USOCKET -#define MICROPY_PY_USOCKET (1) -#endif -#ifndef MICROPY_PY_NETWORK -#define MICROPY_PY_NETWORK (1) -#endif - -// fatfs configuration used in ffconf.h -#define MICROPY_FATFS_ENABLE_LFN (1) -#define MICROPY_FATFS_LFN_CODE_PAGE (437) /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ -#define MICROPY_FATFS_USE_LABEL (1) -#define MICROPY_FATFS_RPATH (2) -#define MICROPY_FATFS_MULTI_PARTITION (1) - -// TODO these should be generic, not bound to fatfs -#define mp_type_fileio fatfs_type_fileio -#define mp_type_textio fatfs_type_textio - -// use vfs's functions for import stat and builtin open -#define mp_import_stat mp_vfs_import_stat -#define mp_builtin_open mp_vfs_open -#define mp_builtin_open_obj mp_vfs_open_obj - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t machine_module; -extern const struct _mp_obj_module_t pyb_module; -extern const struct _mp_obj_module_t stm_module; -extern const struct _mp_obj_module_t mp_module_ubinascii; -extern const struct _mp_obj_module_t mp_module_ure; -extern const struct _mp_obj_module_t mp_module_uzlib; -extern const struct _mp_obj_module_t mp_module_ujson; -extern const struct _mp_obj_module_t mp_module_uheapq; -extern const struct _mp_obj_module_t mp_module_uhashlib; -extern const struct _mp_obj_module_t mp_module_uos; -extern const struct _mp_obj_module_t mp_module_utime; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_network; -extern const struct _mp_obj_module_t mp_module_onewire; - -#if MICROPY_PY_USOCKET -#define SOCKET_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, -#define SOCKET_BUILTIN_MODULE_WEAK_LINKS { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, -#else -#define SOCKET_BUILTIN_MODULE -#define SOCKET_BUILTIN_MODULE_WEAK_LINKS -#endif - -#if MICROPY_PY_NETWORK -#define NETWORK_BUILTIN_MODULE { MP_ROM_QSTR(MP_QSTR_network), MP_ROM_PTR(&mp_module_network) }, -#else -#define NETWORK_BUILTIN_MODULE -#endif - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - { MP_ROM_QSTR(MP_QSTR_stm), MP_ROM_PTR(&stm_module) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) }, \ - SOCKET_BUILTIN_MODULE \ - NETWORK_BUILTIN_MODULE \ - { MP_ROM_QSTR(MP_QSTR__onewire), MP_ROM_PTR(&mp_module_onewire) }, \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, \ - { MP_ROM_QSTR(MP_QSTR_collections), MP_ROM_PTR(&mp_module_collections) }, \ - { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, \ - { MP_ROM_QSTR(MP_QSTR_zlib), MP_ROM_PTR(&mp_module_uzlib) }, \ - { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, \ - { MP_ROM_QSTR(MP_QSTR_heapq), MP_ROM_PTR(&mp_module_uheapq) }, \ - { MP_ROM_QSTR(MP_QSTR_hashlib), MP_ROM_PTR(&mp_module_uhashlib) }, \ - { MP_ROM_QSTR(MP_QSTR_io), MP_ROM_PTR(&mp_module_io) }, \ - { MP_ROM_QSTR(MP_QSTR_os), MP_ROM_PTR(&mp_module_uos) }, \ - { MP_ROM_QSTR(MP_QSTR_random), MP_ROM_PTR(&mp_module_urandom) }, \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_utime) }, \ - { MP_ROM_QSTR(MP_QSTR_select), MP_ROM_PTR(&mp_module_uselect) }, \ - SOCKET_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_struct), MP_ROM_PTR(&mp_module_ustruct) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&machine_module) }, \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - { MP_ROM_QSTR(MP_QSTR_stm), MP_ROM_PTR(&stm_module) }, \ - -#if defined(MCU_SERIES_F7) -#define PYB_EXTI_NUM_VECTORS (24) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (8) -#elif defined(MCU_SERIES_L4) -#define PYB_EXTI_NUM_VECTORS (23) -#define MICROPY_HW_MAX_TIMER (17) -#define MICROPY_HW_MAX_UART (6) -#else -#define PYB_EXTI_NUM_VECTORS (23) -#define MICROPY_HW_MAX_TIMER (14) -#define MICROPY_HW_MAX_UART (6) -#endif - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - \ - mp_obj_t pyb_hid_report_desc; \ - \ - mp_obj_t pyb_config_main; \ - \ - mp_obj_t pyb_switch_callback; \ - \ - mp_obj_t pin_class_mapper; \ - mp_obj_t pin_class_map_dict; \ - \ - mp_obj_t pyb_extint_callback[PYB_EXTI_NUM_VECTORS]; \ - \ - /* pointers to all Timer objects (if they have been created) */ \ - struct _pyb_timer_obj_t *pyb_timer_obj_all[MICROPY_HW_MAX_TIMER]; \ - \ - /* stdio is repeated on this UART object if it's not null */ \ - struct _pyb_uart_obj_t *pyb_stdio_uart; \ - \ - /* pointers to all UART objects (if they have been created) */ \ - struct _pyb_uart_obj_t *pyb_uart_obj_all[MICROPY_HW_MAX_UART]; \ - \ - /* pointers to all CAN objects (if they have been created) */ \ - struct _pyb_can_obj_t *pyb_can_obj_all[2]; \ - \ - /* list of registered NICs */ \ - mp_obj_list_t mod_network_nic_list; \ - -// type definitions for the specific machine - -#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) - -#define MP_SSIZE_MAX (0x7fffffff) - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// We have inlined IRQ functions for efficiency (they are generally -// 1 machine instruction). -// -// Note on IRQ state: you should not need to know the specific -// value of the state variable, but rather just pass the return -// value from disable_irq back to enable_irq. If you really need -// to know the machine-specific values, see irq.h. - -#include STM32_HAL_H - -static inline void enable_irq(mp_uint_t state) { - __set_PRIMASK(state); -} - -static inline mp_uint_t disable_irq(void) { - mp_uint_t state = __get_PRIMASK(); - __disable_irq(); - return state; -} - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) - -#if MICROPY_PY_THREAD -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - if (pyb_thread_enabled) { \ - MP_THREAD_GIL_EXIT(); \ - pyb_thread_yield(); \ - MP_THREAD_GIL_ENTER(); \ - } else { \ - __WFI(); \ - } \ - } while (0); - -#define MICROPY_THREAD_YIELD() pyb_thread_yield() -#else -#define MICROPY_EVENT_POLL_HOOK \ - do { \ - extern void mp_handle_pending(void); \ - mp_handle_pending(); \ - __WFI(); \ - } while (0); - -#define MICROPY_THREAD_YIELD() -#endif - -// We need an implementation of the log2 function which is not a macro -#define MP_NEED_LOG2 (1) - -// There is no classical C heap in bare-metal ports, only Python -// garbage-collected heap. For completeness, emulate C heap via -// GC heap. Note that MicroPython core never uses malloc() and friends, -// so these defines are mostly to help extension module writers. -#define malloc(n) m_malloc(n) -#define free(p) m_free(p) -#define realloc(p, n) m_realloc(p, n) - -// see stm32f4XX_hal_conf.h USE_USB_FS & USE_USB_HS -// at the moment only USB_FS is supported -#define USE_DEVICE_MODE -//#define USE_HOST_MODE - -// We need to provide a declaration/definition of alloca() -#include - -#define MICROPY_PIN_DEFS_PORT_H "pin_defs_stm32.h" diff --git a/ports/stm32/mpconfigport.mk b/ports/stm32/mpconfigport.mk deleted file mode 100644 index e708de6c1b0e1..0000000000000 --- a/ports/stm32/mpconfigport.mk +++ /dev/null @@ -1,10 +0,0 @@ -# Enable/disable extra modules - -# wiznet5k module for ethernet support; valid values are: -# 0 : no Wiznet support -# 5200 : support for W5200 module -# 5500 : support for W5500 module -MICROPY_PY_WIZNET5K ?= 0 - -# cc3k module for wifi support -MICROPY_PY_CC3K ?= 0 diff --git a/ports/stm32/mphalport.c b/ports/stm32/mphalport.c deleted file mode 100644 index e9c4f28f79d02..0000000000000 --- a/ports/stm32/mphalport.c +++ /dev/null @@ -1,171 +0,0 @@ -#include - -#include "py/runtime.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "extmod/misc.h" -#include "usb.h" -#include "uart.h" - -bool mp_hal_ticks_cpu_enabled = false; - -// this table converts from HAL_StatusTypeDef to POSIX errno -const byte mp_hal_status_to_errno_table[4] = { - [HAL_OK] = 0, - [HAL_ERROR] = MP_EIO, - [HAL_BUSY] = MP_EBUSY, - [HAL_TIMEOUT] = MP_ETIMEDOUT, -}; - -NORETURN void mp_hal_raise(HAL_StatusTypeDef status) { - mp_raise_OSError(mp_hal_status_to_errno_table[status]); -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { -#if 0 -#ifdef USE_HOST_MODE - pyb_usb_host_process(); - int c = pyb_usb_host_get_keyboard(); - if (c != 0) { - return c; - } -#endif -#endif - - byte c; - if (usb_vcp_recv_byte(&c) != 0) { - return c; - } else if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) { - return uart_rx_char(MP_STATE_PORT(pyb_stdio_uart)); - } - int dupterm_c = mp_uos_dupterm_rx_chr(); - if (dupterm_c >= 0) { - return dupterm_c; - } - MICROPY_EVENT_POLL_HOOK - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len); - } -#if 0 && defined(USE_HOST_MODE) && MICROPY_HW_HAS_LCD - lcd_print_strn(str, len); -#endif - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn(str, len); - } - mp_uos_dupterm_tx_strn(str, len); -} - -// Efficiently convert "\n" to "\r\n" -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - const char *last = str; - while (len--) { - if (*str == '\n') { - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } - mp_hal_stdout_tx_strn("\r\n", 2); - ++str; - last = str; - } else { - ++str; - } - } - if (str > last) { - mp_hal_stdout_tx_strn(last, str - last); - } -} - -void mp_hal_ticks_cpu_enable(void) { - if (!mp_hal_ticks_cpu_enabled) { - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - #if defined(__CORTEX_M) && __CORTEX_M == 7 - // on Cortex-M7 we must unlock the DWT before writing to its registers - DWT->LAR = 0xc5acce55; - #endif - DWT->CYCCNT = 0; - DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; - mp_hal_ticks_cpu_enabled = true; - } -} - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) { - if (0) { - #ifdef __GPIOA_CLK_ENABLE - } else if (gpio == GPIOA) { - __GPIOA_CLK_ENABLE(); - #endif - #ifdef __GPIOB_CLK_ENABLE - } else if (gpio == GPIOB) { - __GPIOB_CLK_ENABLE(); - #endif - #ifdef __GPIOC_CLK_ENABLE - } else if (gpio == GPIOC) { - __GPIOC_CLK_ENABLE(); - #endif - #ifdef __GPIOD_CLK_ENABLE - } else if (gpio == GPIOD) { - __GPIOD_CLK_ENABLE(); - #endif - #ifdef __GPIOE_CLK_ENABLE - } else if (gpio == GPIOE) { - __GPIOE_CLK_ENABLE(); - #endif - #if defined(GPIOF) && defined(__GPIOF_CLK_ENABLE) - } else if (gpio == GPIOF) { - __GPIOF_CLK_ENABLE(); - #endif - #if defined(GPIOG) && defined(__GPIOG_CLK_ENABLE) - } else if (gpio == GPIOG) { - #if defined(STM32L476xx) || defined(STM32L486xx) - // Port G pins 2 thru 15 are powered using VddIO2 on these MCUs. - HAL_PWREx_EnableVddIO2(); - #endif - __GPIOG_CLK_ENABLE(); - #endif - #ifdef __GPIOH_CLK_ENABLE - } else if (gpio == GPIOH) { - __GPIOH_CLK_ENABLE(); - #endif - #if defined(GPIOI) && defined(__GPIOI_CLK_ENABLE) - } else if (gpio == GPIOI) { - __GPIOI_CLK_ENABLE(); - #endif - #if defined(GPIOJ) && defined(__GPIOJ_CLK_ENABLE) - } else if (gpio == GPIOJ) { - __GPIOJ_CLK_ENABLE(); - #endif - #if defined(GPIOK) && defined(__GPIOK_CLK_ENABLE) - } else if (gpio == GPIOK) { - __GPIOK_CLK_ENABLE(); - #endif - } -} - -void mp_hal_pin_config(mp_hal_pin_obj_t pin_obj, uint32_t mode, uint32_t pull, uint32_t alt) { - GPIO_TypeDef *gpio = pin_obj->gpio; - uint32_t pin = pin_obj->pin; - mp_hal_gpio_clock_enable(gpio); - gpio->MODER = (gpio->MODER & ~(3 << (2 * pin))) | ((mode & 3) << (2 * pin)); - gpio->OTYPER = (gpio->OTYPER & ~(1 << pin)) | ((mode >> 2) << pin); - gpio->OSPEEDR = (gpio->OSPEEDR & ~(3 << (2 * pin))) | (2 << (2 * pin)); // full speed - gpio->PUPDR = (gpio->PUPDR & ~(3 << (2 * pin))) | (pull << (2 * pin)); - gpio->AFR[pin >> 3] = (gpio->AFR[pin >> 3] & ~(15 << (4 * (pin & 7)))) | (alt << (4 * (pin & 7))); -} - -bool mp_hal_pin_config_alt(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint8_t fn, uint8_t unit) { - const pin_af_obj_t *af = pin_find_af(pin, fn, unit); - if (af == NULL) { - return false; - } - mp_hal_pin_config(pin, mode, pull, af->idx); - return true; -} diff --git a/ports/stm32/mphalport.h b/ports/stm32/mphalport.h deleted file mode 100644 index 939df0b3d2256..0000000000000 --- a/ports/stm32/mphalport.h +++ /dev/null @@ -1,75 +0,0 @@ -// We use the ST Cube HAL library for most hardware peripherals -#include STM32_HAL_H -#include "pin.h" - -// The unique id address differs per MCU. Ideally this define should -// go in some MCU-specific header, but for now it lives here. -#if defined(MCU_SERIES_F4) -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1fff7a10) -#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) -#define MP_HAL_CLEAN_DCACHE(addr, size) -#elif defined(MCU_SERIES_F7) -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1ff0f420) -#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f))) -#define MP_HAL_CLEAN_DCACHE(addr, size) (SCB_CleanDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f))) -#elif defined(MCU_SERIES_L4) -#define MP_HAL_UNIQUE_ID_ADDRESS (0x1fff7590) -#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) -#define MP_HAL_CLEAN_DCACHE(addr, size) -#else -#error mphalport.h: Unrecognized MCU_SERIES -#endif - -extern const unsigned char mp_hal_status_to_errno_table[4]; - -NORETURN void mp_hal_raise(HAL_StatusTypeDef status); -void mp_hal_set_interrupt_char(int c); // -1 to disable - -// timing functions - -#include "irq.h" - -#define mp_hal_quiet_timing_enter() raise_irq_pri(1) -#define mp_hal_quiet_timing_exit(irq_state) restore_irq_pri(irq_state) -#define mp_hal_delay_us_fast(us) mp_hal_delay_us(us) - -extern bool mp_hal_ticks_cpu_enabled; -void mp_hal_ticks_cpu_enable(void); -static inline mp_uint_t mp_hal_ticks_cpu(void) { - if (!mp_hal_ticks_cpu_enabled) { - mp_hal_ticks_cpu_enable(); - } - return DWT->CYCCNT; -} - -// C-level pin HAL - -#include "pin.h" - -#define MP_HAL_PIN_FMT "%q" -#define MP_HAL_PIN_MODE_INPUT (0) -#define MP_HAL_PIN_MODE_OUTPUT (1) -#define MP_HAL_PIN_MODE_ALT (2) -#define MP_HAL_PIN_MODE_ANALOG (3) -#define MP_HAL_PIN_MODE_OPEN_DRAIN (5) -#define MP_HAL_PIN_MODE_ALT_OPEN_DRAIN (6) -#define MP_HAL_PIN_PULL_NONE (GPIO_NOPULL) -#define MP_HAL_PIN_PULL_UP (GPIO_PULLUP) -#define MP_HAL_PIN_PULL_DOWN (GPIO_PULLDOWN) - -#define mp_hal_pin_obj_t const pin_obj_t* -#define mp_hal_get_pin_obj(o) pin_find(o) -#define mp_hal_pin_name(p) ((p)->name) -#define mp_hal_pin_input(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_output(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_open_drain(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, 0) -#define mp_hal_pin_high(p) (((p)->gpio->BSRR) = (p)->pin_mask) -#define mp_hal_pin_low(p) (((p)->gpio->BSRR) = ((p)->pin_mask << 16)) -#define mp_hal_pin_od_low(p) mp_hal_pin_low(p) -#define mp_hal_pin_od_high(p) mp_hal_pin_high(p) -#define mp_hal_pin_read(p) (((p)->gpio->IDR >> (p)->pin) & 1) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio); -void mp_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt); -bool mp_hal_pin_config_alt(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint8_t fn, uint8_t unit); diff --git a/ports/stm32/mpthreadport.c b/ports/stm32/mpthreadport.c deleted file mode 100644 index 11653b24cfbde..0000000000000 --- a/ports/stm32/mpthreadport.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/gc.h" -#include "py/mpthread.h" -#include "gccollect.h" - -#if MICROPY_PY_THREAD - -// the mutex controls access to the linked list -STATIC mp_thread_mutex_t thread_mutex; - -void mp_thread_init(void) { - mp_thread_mutex_init(&thread_mutex); - mp_thread_set_state(&mp_state_ctx.thread); -} - -void mp_thread_gc_others(void) { - mp_thread_mutex_lock(&thread_mutex, 1); - for (pyb_thread_t *th = pyb_thread_all; th != NULL; th = th->all_next) { - gc_collect_root((void**)&th, 1); - gc_collect_root(&th->arg, 1); - gc_collect_root(&th->stack, 1); - if (th != pyb_thread_cur) { - gc_collect_root(th->stack, th->stack_len); - } - } - mp_thread_mutex_unlock(&thread_mutex); -} - -void mp_thread_create(void *(*entry)(void*), void *arg, size_t *stack_size) { - if (*stack_size == 0) { - *stack_size = 4096; // default stack size - } else if (*stack_size < 2048) { - *stack_size = 2048; // minimum stack size - } - - // round stack size to a multiple of the word size - size_t stack_len = *stack_size / sizeof(uint32_t); - *stack_size = stack_len * sizeof(uint32_t); - - // allocate stack and linked-list node (must be done outside thread_mutex lock) - uint32_t *stack = m_new(uint32_t, stack_len); - pyb_thread_t *th = m_new_obj(pyb_thread_t); - - mp_thread_mutex_lock(&thread_mutex, 1); - - // create thread - uint32_t id = pyb_thread_new(th, stack, stack_len, entry, arg); - if (id == 0) { - mp_thread_mutex_unlock(&thread_mutex); - nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "can't create thread")); - } - - mp_thread_mutex_unlock(&thread_mutex); - - // adjust stack_size to provide room to recover from hitting the limit - *stack_size -= 1024; -} - -void mp_thread_start(void) { -} - -void mp_thread_finish(void) { -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/stm32/mpthreadport.h b/ports/stm32/mpthreadport.h deleted file mode 100644 index 8e2372dcb4350..0000000000000 --- a/ports/stm32/mpthreadport.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpthread.h" -#include "pybthread.h" - -typedef pyb_mutex_t mp_thread_mutex_t; - -void mp_thread_init(void); -void mp_thread_gc_others(void); - -static inline void mp_thread_set_state(void *state) { - pyb_thread_set_local(state); -} - -static inline struct _mp_state_thread_t *mp_thread_get_state(void) { - return pyb_thread_get_local(); -} - -static inline void mp_thread_mutex_init(mp_thread_mutex_t *m) { - pyb_mutex_init(m); -} - -static inline int mp_thread_mutex_lock(mp_thread_mutex_t *m, int wait) { - return pyb_mutex_lock(m, wait); -} - -static inline void mp_thread_mutex_unlock(mp_thread_mutex_t *m) { - pyb_mutex_unlock(m); -} diff --git a/ports/stm32/pendsv.c b/ports/stm32/pendsv.c deleted file mode 100644 index 0aeb1a6dcfcb3..0000000000000 --- a/ports/stm32/pendsv.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "lib/utils/interrupt_char.h" -#include "pendsv.h" -#include "irq.h" - -// This variable is used to save the exception object between a ctrl-C and the -// PENDSV call that actually raises the exception. It must be non-static -// otherwise gcc-5 optimises it away. It can point to the heap but is not -// traced by GC. This is okay because we only ever set it to -// mp_kbd_exception which is in the root-pointer set. -void *pendsv_object; - -void pendsv_init(void) { - // set PendSV interrupt at lowest priority - HAL_NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV, IRQ_SUBPRI_PENDSV); -} - -// Call this function to raise a pending exception during an interrupt. -// It will first try to raise the exception "softly" by setting the -// mp_pending_exception variable and hoping that the VM will notice it. -// If this function is called a second time (ie with the mp_pending_exception -// variable already set) then it will force the exception by using the hardware -// PENDSV feature. This will wait until all interrupts are finished then raise -// the given exception object using nlr_jump in the context of the top-level -// thread. -void pendsv_kbd_intr(void) { - if (MP_STATE_VM(mp_pending_exception) == MP_OBJ_NULL) { - mp_keyboard_interrupt(); - } else { - MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; - pendsv_object = &MP_STATE_VM(mp_kbd_exception); - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } -} - -void pendsv_isr_handler(void) { - // re-jig the stack so that when we return from this interrupt handler - // it returns instead to nlr_jump with argument pendsv_object - // note that stack has a different layout if DEBUG is enabled - // - // on entry to this (naked) function, stack has the following layout: - // - // stack layout with DEBUG disabled: - // sp[6]: pc=r15 - // sp[5]: lr=r14 - // sp[4]: r12 - // sp[3]: r3 - // sp[2]: r2 - // sp[1]: r1 - // sp[0]: r0 - // - // stack layout with DEBUG enabled: - // sp[8]: pc=r15 - // sp[7]: lr=r14 - // sp[6]: r12 - // sp[5]: r3 - // sp[4]: r2 - // sp[3]: r1 - // sp[2]: r0 - // sp[1]: 0xfffffff9 - // sp[0]: ? - -#if MICROPY_PY_THREAD - __asm volatile ( - "ldr r1, pendsv_object_ptr\n" - "ldr r0, [r1]\n" - "cmp r0, 0\n" - "beq .no_obj\n" - "str r0, [sp, #0]\n" // store to r0 on stack - "mov r0, #0\n" - "str r0, [r1]\n" // clear pendsv_object - "ldr r0, nlr_jump_ptr\n" - "str r0, [sp, #24]\n" // store to pc on stack - "bx lr\n" // return from interrupt; will return to nlr_jump - - ".no_obj:\n" // pendsv_object==NULL - "push {r4-r11, lr}\n" - "vpush {s16-s31}\n" - "mrs r5, primask\n" // save PRIMASK in r5 - "cpsid i\n" // disable interrupts while we change stacks - "mov r0, sp\n" // pass sp to save - "mov r4, lr\n" // save lr because we are making a call - "bl pyb_thread_next\n" // get next thread to execute - "mov lr, r4\n" // restore lr - "mov sp, r0\n" // switch stacks - "msr primask, r5\n" // reenable interrupts - "vpop {s16-s31}\n" - "pop {r4-r11, lr}\n" - "bx lr\n" // return from interrupt; will return to new thread - ".align 2\n" - "pendsv_object_ptr: .word pendsv_object\n" - "nlr_jump_ptr: .word nlr_jump\n" - ); -#else - __asm volatile ( - "ldr r0, pendsv_object_ptr\n" - "ldr r0, [r0]\n" -#if defined(PENDSV_DEBUG) - "str r0, [sp, #8]\n" -#else - "str r0, [sp, #0]\n" -#endif - "ldr r0, nlr_jump_ptr\n" -#if defined(PENDSV_DEBUG) - "str r0, [sp, #32]\n" -#else - "str r0, [sp, #24]\n" -#endif - "bx lr\n" - ".align 2\n" - "pendsv_object_ptr: .word pendsv_object\n" - "nlr_jump_ptr: .word nlr_jump\n" - ); -#endif - - /* - uint32_t x[2] = {0x424242, 0xdeaddead}; - printf("PendSV: %p\n", x); - for (uint32_t *p = (uint32_t*)(((uint32_t)x - 15) & 0xfffffff0), i = 64; i > 0; p += 4, i -= 4) { - printf(" %p: %08x %08x %08x %08x\n", p, (uint)p[0], (uint)p[1], (uint)p[2], (uint)p[3]); - } - */ -} diff --git a/ports/stm32/pendsv.h b/ports/stm32/pendsv.h deleted file mode 100644 index 6a9eb0d794d0b..0000000000000 --- a/ports/stm32/pendsv.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_PENDSV_H -#define MICROPY_INCLUDED_STMHAL_PENDSV_H - -void pendsv_init(void); -void pendsv_kbd_intr(void); - -// since we play tricks with the stack, the compiler must not generate a -// prelude for this function -void pendsv_isr_handler(void) __attribute__((naked)); - -#endif // MICROPY_INCLUDED_STMHAL_PENDSV_H diff --git a/ports/stm32/pin.c b/ports/stm32/pin.c deleted file mode 100644 index ee2d846469a20..0000000000000 --- a/ports/stm32/pin.c +++ /dev/null @@ -1,674 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/virtpin.h" -#include "pin.h" -#include "extint.h" - -/// \moduleref pyb -/// \class Pin - control I/O pins -/// -/// A pin is the basic object to control I/O pins. It has methods to set -/// the mode of the pin (input, output, etc) and methods to get and set the -/// digital logic level. For analog control of a pin, see the ADC class. -/// -/// Usage Model: -/// -/// All Board Pins are predefined as pyb.Pin.board.Name -/// -/// x1_pin = pyb.Pin.board.X1 -/// -/// g = pyb.Pin(pyb.Pin.board.X1, pyb.Pin.IN) -/// -/// CPU pins which correspond to the board pins are available -/// as `pyb.cpu.Name`. For the CPU pins, the names are the port letter -/// followed by the pin number. On the PYBv1.0, `pyb.Pin.board.X1` and -/// `pyb.Pin.cpu.B6` are the same pin. -/// -/// You can also use strings: -/// -/// g = pyb.Pin('X1', pyb.Pin.OUT_PP) -/// -/// Users can add their own names: -/// -/// MyMapperDict = { 'LeftMotorDir' : pyb.Pin.cpu.C12 } -/// pyb.Pin.dict(MyMapperDict) -/// g = pyb.Pin("LeftMotorDir", pyb.Pin.OUT_OD) -/// -/// and can query mappings -/// -/// pin = pyb.Pin("LeftMotorDir") -/// -/// Users can also add their own mapping function: -/// -/// def MyMapper(pin_name): -/// if pin_name == "LeftMotorDir": -/// return pyb.Pin.cpu.A0 -/// -/// pyb.Pin.mapper(MyMapper) -/// -/// So, if you were to call: `pyb.Pin("LeftMotorDir", pyb.Pin.OUT_PP)` -/// then `"LeftMotorDir"` is passed directly to the mapper function. -/// -/// To summarise, the following order determines how things get mapped into -/// an ordinal pin number: -/// -/// 1. Directly specify a pin object -/// 2. User supplied mapping function -/// 3. User supplied mapping (object must be usable as a dictionary key) -/// 4. Supply a string which matches a board pin -/// 5. Supply a string which matches a CPU port/pin -/// -/// You can set `pyb.Pin.debug(True)` to get some debug information about -/// how a particular object gets mapped to a pin. - -// Pin class variables -STATIC bool pin_class_debug; - -void pin_init0(void) { - MP_STATE_PORT(pin_class_mapper) = mp_const_none; - MP_STATE_PORT(pin_class_map_dict) = mp_const_none; - pin_class_debug = false; -} - -// C API used to convert a user-supplied pin name into an ordinal pin number. -const pin_obj_t *pin_find(mp_obj_t user_obj) { - const pin_obj_t *pin_obj; - - // If a pin was provided, then use it - if (MP_OBJ_IS_TYPE(user_obj, &pin_type)) { - pin_obj = user_obj; - if (pin_class_debug) { - printf("Pin map passed pin "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - if (MP_STATE_PORT(pin_class_mapper) != mp_const_none) { - pin_obj = mp_call_function_1(MP_STATE_PORT(pin_class_mapper), user_obj); - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("Pin.mapper didn't return a Pin object"); - } - if (pin_class_debug) { - printf("Pin.mapper maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - // The pin mapping function returned mp_const_none, fall through to - // other lookup methods. - } - - if (MP_STATE_PORT(pin_class_map_dict) != mp_const_none) { - mp_map_t *pin_map_map = mp_obj_dict_get_map(MP_STATE_PORT(pin_class_map_dict)); - mp_map_elem_t *elem = mp_map_lookup(pin_map_map, user_obj, MP_MAP_LOOKUP); - if (elem != NULL && elem->value != NULL) { - pin_obj = elem->value; - if (pin_class_debug) { - printf("Pin.map_dict maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - } - - // See if the pin name matches a board pin - pin_obj = pin_find_named_pin(&pin_board_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.board maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - // See if the pin name matches a cpu pin - pin_obj = pin_find_named_pin(&pin_cpu_pins_locals_dict, user_obj); - if (pin_obj) { - if (pin_class_debug) { - printf("Pin.cpu maps "); - mp_obj_print(user_obj, PRINT_REPR); - printf(" to "); - mp_obj_print((mp_obj_t)pin_obj, PRINT_STR); - printf("\n"); - } - return pin_obj; - } - - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%s) doesn't exist", mp_obj_str_get_str(user_obj))); -} - -/// \method __str__() -/// Return a string describing the pin object. -STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_obj_t *self = self_in; - - // pin name - mp_printf(print, "Pin(Pin.cpu.%q, mode=Pin.", self->name); - - uint32_t mode = pin_get_mode(self); - - if (mode == GPIO_MODE_ANALOG) { - // analog - mp_print_str(print, "ANALOG)"); - - } else { - // IO mode - bool af = false; - qstr mode_qst; - if (mode == GPIO_MODE_INPUT) { - mode_qst = MP_QSTR_IN; - } else if (mode == GPIO_MODE_OUTPUT_PP) { - mode_qst = MP_QSTR_OUT; - } else if (mode == GPIO_MODE_OUTPUT_OD) { - mode_qst = MP_QSTR_OPEN_DRAIN; - } else { - af = true; - if (mode == GPIO_MODE_AF_PP) { - mode_qst = MP_QSTR_ALT; - } else { - mode_qst = MP_QSTR_ALT_OPEN_DRAIN; - } - } - mp_print_str(print, qstr_str(mode_qst)); - - // pull mode - qstr pull_qst = MP_QSTR_NULL; - uint32_t pull = pin_get_pull(self); - if (pull == GPIO_PULLUP) { - pull_qst = MP_QSTR_PULL_UP; - } else if (pull == GPIO_PULLDOWN) { - pull_qst = MP_QSTR_PULL_DOWN; - } - if (pull_qst != MP_QSTR_NULL) { - mp_printf(print, ", pull=Pin.%q", pull_qst); - } - - // AF mode - if (af) { - mp_uint_t af_idx = pin_get_af(self); - const pin_af_obj_t *af_obj = pin_find_af_by_index(self, af_idx); - if (af_obj == NULL) { - mp_printf(print, ", af=%d)", af_idx); - } else { - mp_printf(print, ", af=Pin.%q)", af_obj->name); - } - } else { - mp_print_str(print, ")"); - } - } -} - -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *pin, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); - -/// \classmethod \constructor(id, ...) -/// Create a new Pin object associated with the id. If additional arguments are given, -/// they are used to initialise the pin. See `init`. -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // Run an argument through the mapper and return the result. - const pin_obj_t *pin = pin_find(args[0]); - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - pin_obj_t *self = self_in; - if (n_args == 0) { - // get pin - return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self)); - } else { - // set pin - mp_hal_pin_write(self, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -/// \classmethod mapper([fun]) -/// Get or set the pin mapper function. -STATIC mp_obj_t pin_mapper(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_mapper) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_mapper); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_mapper_fun_obj, 1, 2, pin_mapper); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_mapper_obj, (mp_obj_t)&pin_mapper_fun_obj); - -/// \classmethod dict([dict]) -/// Get or set the pin mapper dictionary. -STATIC mp_obj_t pin_map_dict(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - MP_STATE_PORT(pin_class_map_dict) = args[1]; - return mp_const_none; - } - return MP_STATE_PORT(pin_class_map_dict); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_map_dict_fun_obj, 1, 2, pin_map_dict); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_map_dict_obj, (mp_obj_t)&pin_map_dict_fun_obj); - -/// \classmethod af_list() -/// Returns an array of alternate functions available for this pin. -STATIC mp_obj_t pin_af_list(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - - const pin_af_obj_t *af = self->af; - for (mp_uint_t i = 0; i < self->num_af; i++, af++) { - mp_obj_list_append(result, (mp_obj_t)af); - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_list_obj, pin_af_list); - -/// \classmethod debug([state]) -/// Get or set the debugging state (`True` or `False` for on or off). -STATIC mp_obj_t pin_debug(size_t n_args, const mp_obj_t *args) { - if (n_args > 1) { - pin_class_debug = mp_obj_is_true(args[1]); - return mp_const_none; - } - return mp_obj_new_bool(pin_class_debug); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_debug_fun_obj, 1, 2, pin_debug); -STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(pin_debug_obj, (mp_obj_t)&pin_debug_fun_obj); - -// init(mode, pull=None, af=-1, *, value, alt) -STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_af, MP_ARG_INT, {.u_int = -1}}, // legacy - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - { MP_QSTR_alt, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[0].u_int; - if (!IS_GPIO_MODE(mode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin mode: %d", mode)); - } - - // get pull mode - uint pull = GPIO_NOPULL; - if (args[1].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[1].u_obj); - } - if (!IS_GPIO_PULL(pull)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin pull: %d", pull)); - } - - // get af (alternate function); alt-arg overrides af-arg - mp_int_t af = args[4].u_int; - if (af == -1) { - af = args[2].u_int; - } - if ((mode == GPIO_MODE_AF_PP || mode == GPIO_MODE_AF_OD) && !IS_GPIO_AF(af)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin af: %d", af)); - } - - // enable the peripheral clock for the port of this pin - mp_hal_gpio_clock_enable(self->gpio); - - // if given, set the pin value before initialising to prevent glitches - if (args[3].u_obj != MP_OBJ_NULL) { - mp_hal_pin_write(self, mp_obj_is_true(args[3].u_obj)); - } - - // configure the GPIO as requested - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = self->pin_mask; - GPIO_InitStructure.Mode = mode; - GPIO_InitStructure.Pull = pull; - GPIO_InitStructure.Speed = GPIO_SPEED_FAST; - GPIO_InitStructure.Alternate = af; - HAL_GPIO_Init(self->gpio, &GPIO_InitStructure); - - return mp_const_none; -} - -STATIC mp_obj_t pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init); - -/// \method value([value]) -/// Get or set the digital logic level of the pin: -/// -/// - With no argument, return 0 or 1 depending on the logic level of the pin. -/// - With `value` given, set the logic level of the pin. `value` can be -/// anything that converts to a boolean. If it converts to `True`, the pin -/// is set high, otherwise it is set low. -STATIC mp_obj_t pin_value(size_t n_args, const mp_obj_t *args) { - return pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_value_obj, 1, 2, pin_value); - -STATIC mp_obj_t pin_off(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_low(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_off_obj, pin_off); - -STATIC mp_obj_t pin_on(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_hal_pin_high(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_on_obj, pin_on); - -// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False) -STATIC mp_obj_t pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_handler, ARG_trigger, ARG_hard }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_MODE_IT_RISING | GPIO_MODE_IT_FALLING} }, - { MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} }, - }; - pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (n_args > 1 || kw_args->used != 0) { - // configure irq - extint_register_pin(self, args[ARG_trigger].u_int, - args[ARG_hard].u_bool, args[ARG_handler].u_obj); - } - - // TODO should return an IRQ object - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_irq_obj, 1, pin_irq); - -/// \method name() -/// Get the pin name. -STATIC mp_obj_t pin_name(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_QSTR(self->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_name_obj, pin_name); - -/// \method names() -/// Returns the cpu and board names for this pin. -STATIC mp_obj_t pin_names(mp_obj_t self_in) { - pin_obj_t *self = self_in; - mp_obj_t result = mp_obj_new_list(0, NULL); - mp_obj_list_append(result, MP_OBJ_NEW_QSTR(self->name)); - - mp_map_t *map = mp_obj_dict_get_map((mp_obj_t)&pin_board_pins_locals_dict); - mp_map_elem_t *elem = map->table; - - for (mp_uint_t i = 0; i < map->used; i++, elem++) { - if (elem->value == self) { - mp_obj_list_append(result, elem->key); - } - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_names_obj, pin_names); - -/// \method port() -/// Get the pin port. -STATIC mp_obj_t pin_port(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->port); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_port_obj, pin_port); - -/// \method pin() -/// Get the pin number. -STATIC mp_obj_t pin_pin(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(self->pin); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pin_obj, pin_pin); - -/// \method gpio() -/// Returns the base address of the GPIO block associated with this pin. -STATIC mp_obj_t pin_gpio(mp_obj_t self_in) { - pin_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_int_t)self->gpio); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_gpio_obj, pin_gpio); - -/// \method mode() -/// Returns the currently configured mode of the pin. The integer returned -/// will match one of the allowed constants for the mode argument to the init -/// function. -STATIC mp_obj_t pin_mode(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_mode(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_mode_obj, pin_mode); - -/// \method pull() -/// Returns the currently configured pull of the pin. The integer returned -/// will match one of the allowed constants for the pull argument to the init -/// function. -STATIC mp_obj_t pin_pull(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_pull(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_pull_obj, pin_pull); - -/// \method af() -/// Returns the currently configured alternate-function of the pin. The -/// integer returned will match one of the allowed constants for the af -/// argument to the init function. -STATIC mp_obj_t pin_af(mp_obj_t self_in) { - return MP_OBJ_NEW_SMALL_INT(pin_get_af(self_in)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_obj, pin_af); - -STATIC const mp_rom_map_elem_t pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pin_irq_obj) }, - - // Legacy names as used by pyb.Pin - { MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&pin_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_names), MP_ROM_PTR(&pin_names_obj) }, - { MP_ROM_QSTR(MP_QSTR_af_list), MP_ROM_PTR(&pin_af_list_obj) }, - { MP_ROM_QSTR(MP_QSTR_port), MP_ROM_PTR(&pin_port_obj) }, - { MP_ROM_QSTR(MP_QSTR_pin), MP_ROM_PTR(&pin_pin_obj) }, - { MP_ROM_QSTR(MP_QSTR_gpio), MP_ROM_PTR(&pin_gpio_obj) }, - { MP_ROM_QSTR(MP_QSTR_mode), MP_ROM_PTR(&pin_mode_obj) }, - { MP_ROM_QSTR(MP_QSTR_pull), MP_ROM_PTR(&pin_pull_obj) }, - { MP_ROM_QSTR(MP_QSTR_af), MP_ROM_PTR(&pin_af_obj) }, - - // class methods - { MP_ROM_QSTR(MP_QSTR_mapper), MP_ROM_PTR(&pin_mapper_obj) }, - { MP_ROM_QSTR(MP_QSTR_dict), MP_ROM_PTR(&pin_map_dict_obj) }, - { MP_ROM_QSTR(MP_QSTR_debug), MP_ROM_PTR(&pin_debug_obj) }, - - // class attributes - { MP_ROM_QSTR(MP_QSTR_board), MP_ROM_PTR(&pin_board_pins_obj_type) }, - { MP_ROM_QSTR(MP_QSTR_cpu), MP_ROM_PTR(&pin_cpu_pins_obj_type) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUTPUT_PP) }, - { MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_ALT), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_ALT_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_ANALOG), MP_ROM_INT(GPIO_MODE_ANALOG) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULLUP) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULLDOWN) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING) }, - { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING) }, - - // legacy class constants - { MP_ROM_QSTR(MP_QSTR_OUT_PP), MP_ROM_INT(GPIO_MODE_OUTPUT_PP) }, - { MP_ROM_QSTR(MP_QSTR_OUT_OD), MP_ROM_INT(GPIO_MODE_OUTPUT_OD) }, - { MP_ROM_QSTR(MP_QSTR_AF_PP), MP_ROM_INT(GPIO_MODE_AF_PP) }, - { MP_ROM_QSTR(MP_QSTR_AF_OD), MP_ROM_INT(GPIO_MODE_AF_OD) }, - { MP_ROM_QSTR(MP_QSTR_PULL_NONE), MP_ROM_INT(GPIO_NOPULL) }, - -#include "genhdr/pins_af_const.h" -}; - -STATIC MP_DEFINE_CONST_DICT(pin_locals_dict, pin_locals_dict_table); - -STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - return mp_hal_pin_read(self); - } - case MP_PIN_WRITE: { - mp_hal_pin_write(self, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_pin_p_t pin_pin_p = { - .ioctl = pin_ioctl, -}; - -const mp_obj_type_t pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = pin_print, - .make_new = mp_pin_make_new, - .call = pin_call, - .protocol = &pin_pin_p, - .locals_dict = (mp_obj_dict_t*)&pin_locals_dict, -}; - -/// \moduleref pyb -/// \class PinAF - Pin Alternate Functions -/// -/// A Pin represents a physical pin on the microcprocessor. Each pin -/// can have a variety of functions (GPIO, I2C SDA, etc). Each PinAF -/// object represents a particular function for a pin. -/// -/// Usage Model: -/// -/// x3 = pyb.Pin.board.X3 -/// x3_af = x3.af_list() -/// -/// x3_af will now contain an array of PinAF objects which are availble on -/// pin X3. -/// -/// For the pyboard, x3_af would contain: -/// [Pin.AF1_TIM2, Pin.AF2_TIM5, Pin.AF3_TIM9, Pin.AF7_USART2] -/// -/// Normally, each peripheral would configure the af automatically, but sometimes -/// the same function is available on multiple pins, and having more control -/// is desired. -/// -/// To configure X3 to expose TIM2_CH3, you could use: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=pyb.Pin.AF1_TIM2) -/// or: -/// pin = pyb.Pin(pyb.Pin.board.X3, mode=pyb.Pin.AF_PP, af=1) - -/// \method __str__() -/// Return a string describing the alternate function. -STATIC void pin_af_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pin_af_obj_t *self = self_in; - mp_printf(print, "Pin.%q", self->name); -} - -/// \method index() -/// Return the alternate function index. -STATIC mp_obj_t pin_af_index(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT(af->idx); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_index_obj, pin_af_index); - -/// \method name() -/// Return the name of the alternate function. -STATIC mp_obj_t pin_af_name(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_QSTR(af->name); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_name_obj, pin_af_name); - -/// \method reg() -/// Return the base register associated with the peripheral assigned to this -/// alternate function. For example, if the alternate function were TIM2_CH3 -/// this would return stm.TIM2 -STATIC mp_obj_t pin_af_reg(mp_obj_t self_in) { - pin_af_obj_t *af = self_in; - return MP_OBJ_NEW_SMALL_INT((mp_uint_t)af->reg); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pin_af_reg_obj, pin_af_reg); - -STATIC const mp_rom_map_elem_t pin_af_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_index), MP_ROM_PTR(&pin_af_index_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&pin_af_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pin_af_reg_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pin_af_locals_dict, pin_af_locals_dict_table); - -const mp_obj_type_t pin_af_type = { - { &mp_type_type }, - .name = MP_QSTR_PinAF, - .print = pin_af_obj_print, - .locals_dict = (mp_obj_dict_t*)&pin_af_locals_dict, -}; diff --git a/ports/stm32/pin.h b/ports/stm32/pin.h deleted file mode 100644 index 90de79e5ceb5c..0000000000000 --- a/ports/stm32/pin.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_PIN_H -#define MICROPY_INCLUDED_STMHAL_PIN_H - -// This file requires pin_defs_xxx.h (which has port specific enums and -// defines, so we include it here. It should never be included directly - -#include MICROPY_PIN_DEFS_PORT_H -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - qstr name; - uint8_t idx; - uint8_t fn; - uint8_t unit; - uint8_t type; - - union { - void *reg; - - PIN_DEFS_PORT_AF_UNION - }; -} pin_af_obj_t; - -typedef struct { - mp_obj_base_t base; - qstr name; - uint32_t port : 4; - uint32_t pin : 5; // Some ARM processors use 32 bits/PORT - uint32_t num_af : 4; - uint32_t adc_channel : 5; // Some ARM processors use 32 bits/PORT - uint32_t adc_num : 3; // 1 bit per ADC - uint32_t pin_mask; - pin_gpio_t *gpio; - const pin_af_obj_t *af; -} pin_obj_t; - -extern const mp_obj_type_t pin_type; -extern const mp_obj_type_t pin_af_type; - -typedef struct { - const char *name; - const pin_obj_t *pin; -} pin_named_pin_t; - -extern const pin_named_pin_t pin_board_pins[]; -extern const pin_named_pin_t pin_cpu_pins[]; - -//extern pin_map_obj_t pin_map_obj; - -typedef struct { - mp_obj_base_t base; - qstr name; - const pin_named_pin_t *named_pins; -} pin_named_pins_obj_t; - -extern const mp_obj_type_t pin_board_pins_obj_type; -extern const mp_obj_type_t pin_cpu_pins_obj_type; - -extern const mp_obj_dict_t pin_cpu_pins_locals_dict; -extern const mp_obj_dict_t pin_board_pins_locals_dict; - -MP_DECLARE_CONST_FUN_OBJ_KW(pin_init_obj); - -void pin_init0(void); -uint32_t pin_get_mode(const pin_obj_t *pin); -uint32_t pin_get_pull(const pin_obj_t *pin); -uint32_t pin_get_af(const pin_obj_t *pin); -const pin_obj_t *pin_find(mp_obj_t user_obj); -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name); -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit); -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx); -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name); - -#endif // MICROPY_INCLUDED_STMHAL_PIN_H diff --git a/ports/stm32/pin_defs_stm32.c b/ports/stm32/pin_defs_stm32.c deleted file mode 100644 index 0aef5f95fa294..0000000000000 --- a/ports/stm32/pin_defs_stm32.c +++ /dev/null @@ -1,31 +0,0 @@ -#include "py/obj.h" -#include "pin.h" - -// Returns the pin mode. This value returned by this macro should be one of: -// GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD, -// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG. - -uint32_t pin_get_mode(const pin_obj_t *pin) { - GPIO_TypeDef *gpio = pin->gpio; - uint32_t mode = (gpio->MODER >> (pin->pin * 2)) & 3; - if (mode != GPIO_MODE_ANALOG) { - if (gpio->OTYPER & pin->pin_mask) { - mode |= 1 << 4; - } - } - return mode; -} - -// Returns the pin pullup/pulldown. The value returned by this macro should -// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN. - -uint32_t pin_get_pull(const pin_obj_t *pin) { - return (pin->gpio->PUPDR >> (pin->pin * 2)) & 3; -} - -// Returns the af (alternate function) index currently set for a pin. - -uint32_t pin_get_af(const pin_obj_t *pin) { - return (pin->gpio->AFR[pin->pin >> 3] >> ((pin->pin & 7) * 4)) & 0xf; -} - diff --git a/ports/stm32/pin_defs_stm32.h b/ports/stm32/pin_defs_stm32.h deleted file mode 100644 index c5b2862835dbc..0000000000000 --- a/ports/stm32/pin_defs_stm32.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// This file contains pin definitions that are specific to the stm32 port. -// This file should only ever be #included by pin.h and not directly. - -enum { - PORT_A, - PORT_B, - PORT_C, - PORT_D, - PORT_E, - PORT_F, - PORT_G, - PORT_H, - PORT_I, - PORT_J, - PORT_K, -}; - -enum { - AF_FN_TIM, - AF_FN_I2C, - AF_FN_USART, - AF_FN_UART = AF_FN_USART, - AF_FN_SPI, - AF_FN_I2S, - AF_FN_SDMMC, -}; - -enum { - AF_PIN_TYPE_TIM_CH1 = 0, - AF_PIN_TYPE_TIM_CH2, - AF_PIN_TYPE_TIM_CH3, - AF_PIN_TYPE_TIM_CH4, - AF_PIN_TYPE_TIM_CH1N, - AF_PIN_TYPE_TIM_CH2N, - AF_PIN_TYPE_TIM_CH3N, - AF_PIN_TYPE_TIM_CH1_ETR, - AF_PIN_TYPE_TIM_ETR, - AF_PIN_TYPE_TIM_BKIN, - - AF_PIN_TYPE_I2C_SDA = 0, - AF_PIN_TYPE_I2C_SCL, - - AF_PIN_TYPE_USART_TX = 0, - AF_PIN_TYPE_USART_RX, - AF_PIN_TYPE_USART_CTS, - AF_PIN_TYPE_USART_RTS, - AF_PIN_TYPE_USART_CK, - AF_PIN_TYPE_UART_TX = AF_PIN_TYPE_USART_TX, - AF_PIN_TYPE_UART_RX = AF_PIN_TYPE_USART_RX, - AF_PIN_TYPE_UART_CTS = AF_PIN_TYPE_USART_CTS, - AF_PIN_TYPE_UART_RTS = AF_PIN_TYPE_USART_RTS, - - AF_PIN_TYPE_SPI_MOSI = 0, - AF_PIN_TYPE_SPI_MISO, - AF_PIN_TYPE_SPI_SCK, - AF_PIN_TYPE_SPI_NSS, - - AF_PIN_TYPE_I2S_CK = 0, - AF_PIN_TYPE_I2S_MCK, - AF_PIN_TYPE_I2S_SD, - AF_PIN_TYPE_I2S_WS, - AF_PIN_TYPE_I2S_EXTSD, - - AF_PIN_TYPE_SDMMC_CK = 0, - AF_PIN_TYPE_SDMMC_CMD, - AF_PIN_TYPE_SDMMC_D0, - AF_PIN_TYPE_SDMMC_D1, - AF_PIN_TYPE_SDMMC_D2, - AF_PIN_TYPE_SDMMC_D3, -}; - -// The HAL uses a slightly different naming than we chose, so we provide -// some #defines to massage things. Also I2S and SPI share the same -// peripheral. - -#define GPIO_AF5_I2S2 GPIO_AF5_SPI2 -#define GPIO_AF5_I2S3 GPIO_AF5_I2S3ext -#define GPIO_AF6_I2S2 GPIO_AF6_I2S2ext -#define GPIO_AF6_I2S3 GPIO_AF6_SPI3 -#define GPIO_AF7_I2S2 GPIO_AF7_SPI2 -#define GPIO_AF7_I2S3 GPIO_AF7_I2S3ext - -#define I2S2 SPI2 -#define I2S3 SPI3 - -enum { - PIN_ADC1 = (1 << 0), - PIN_ADC2 = (1 << 1), - PIN_ADC3 = (1 << 2), -}; - -// Note that SPI and I2S are really the same peripheral as far as the HAL -// is concerned, so there is no I2S_TypeDef. -// We use void* for SDMMC because not all MCUs have the SDMMC_TypeDef type. -#define PIN_DEFS_PORT_AF_UNION \ - TIM_TypeDef *TIM; \ - I2C_TypeDef *I2C; \ - USART_TypeDef *USART; \ - USART_TypeDef *UART; \ - SPI_TypeDef *SPI;\ - SPI_TypeDef *I2S; \ - void *SDMMC; \ - -typedef GPIO_TypeDef pin_gpio_t; - diff --git a/ports/stm32/pin_named_pins.c b/ports/stm32/pin_named_pins.c deleted file mode 100644 index 726da54dd6cf3..0000000000000 --- a/ports/stm32/pin_named_pins.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -const mp_obj_type_t pin_cpu_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_cpu, - .locals_dict = (mp_obj_t)&pin_cpu_pins_locals_dict, -}; - -const mp_obj_type_t pin_board_pins_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_board, - .locals_dict = (mp_obj_t)&pin_board_pins_locals_dict, -}; - -const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name) { - mp_map_t *named_map = mp_obj_dict_get_map((mp_obj_t)named_pins); - mp_map_elem_t *named_elem = mp_map_lookup(named_map, name, MP_MAP_LOOKUP); - if (named_elem != NULL && named_elem->value != NULL) { - return named_elem->value; - } - return NULL; -} - -const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->fn == fn && af->unit == unit) { - return af; - } - } - return NULL; -} - -const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (af->idx == af_idx) { - return af; - } - } - return NULL; -} - -/* unused -const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name) { - const pin_af_obj_t *af = pin->af; - for (mp_uint_t i = 0; i < pin->num_af; i++, af++) { - if (strcmp(name, qstr_str(af->name)) == 0) { - return af; - } - } - return NULL; -} -*/ diff --git a/ports/stm32/portmodules.h b/ports/stm32/portmodules.h deleted file mode 100644 index b575109b89688..0000000000000 --- a/ports/stm32/portmodules.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_PORTMODULES_H -#define MICROPY_INCLUDED_STMHAL_PORTMODULES_H - -extern const mp_obj_module_t pyb_module; -extern const mp_obj_module_t stm_module; -extern const mp_obj_module_t mp_module_uos; -extern const mp_obj_module_t mp_module_utime; -extern const mp_obj_module_t mp_module_usocket; - -// additional helper functions exported by the modules - -MP_DECLARE_CONST_FUN_OBJ_1(time_sleep_ms_obj); -MP_DECLARE_CONST_FUN_OBJ_1(time_sleep_us_obj); - -MP_DECLARE_CONST_FUN_OBJ_0(mod_os_sync_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_dupterm_obj); - -#endif // MICROPY_INCLUDED_STMHAL_PORTMODULES_H diff --git a/ports/stm32/pybcdc.inf_template b/ports/stm32/pybcdc.inf_template deleted file mode 100644 index 85279ada3414a..0000000000000 --- a/ports/stm32/pybcdc.inf_template +++ /dev/null @@ -1,92 +0,0 @@ -; Windows USB CDC ACM Setup File -; Based on INF files which were: -; Copyright (c) 2000 Microsoft Corporation -; Copyright (C) 2007 Microchip Technology Inc. -; Likely to be covered by the MLPL as found at: -; . - -[Version] -Signature="$Windows NT$" -Class=Ports -ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} -Provider=%MFGNAME% -LayoutFile=layout.inf -DriverVer=03/11/2010,5.1.2600.3 - -[Manufacturer] -%MFGNAME%=DeviceList, NTamd64 - -[DestinationDirs] -DefaultDestDir=12 - -;--------------------------------------------------------------------- -; Windows 2000/XP/Server2003/Vista/Server2008/7 - 32bit Sections - -[DriverInstall.nt] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles.nt -AddReg=DriverInstall.nt.AddReg - -[DriverCopyFiles.nt] -usbser.sys,,,0x20 - -[DriverInstall.nt.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.nt.Services] -AddService=usbser, 0x00000002, DriverService.nt - -[DriverService.nt] -DisplayName=%SERVICE% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;--------------------------------------------------------------------- -; Windows XP/Server2003/Vista/Server2008/7 - 64bit Sections - -[DriverInstall.NTamd64] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles.NTamd64 -AddReg=DriverInstall.NTamd64.AddReg - -[DriverCopyFiles.NTamd64] -usbser.sys,,,0x20 - -[DriverInstall.NTamd64.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.NTamd64.Services] -AddService=usbser, 0x00000002, DriverService.NTamd64 - -[DriverService.NTamd64] -DisplayName=%SERVICE% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;--------------------------------------------------------------------- -; Vendor and Product ID Definitions - -[SourceDisksFiles] -[SourceDisksNames] -[DeviceList] -%DESCRIPTION%=DriverInstall, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC} - -[DeviceList.NTamd64] -%DESCRIPTION%=DriverInstall, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_MSC}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_00, USB\VID_${USB_VID}&PID_${USB_PID_CDC_HID}&MI_01, USB\VID_${USB_VID}&PID_${USB_PID_CDC} - -;--------------------------------------------------------------------- -; String Definitions - -[Strings] -MFGFILENAME="pybcdc" -MFGNAME="MicroPython" -DESCRIPTION="Pyboard USB Comm Port" -SERVICE="USB Serial Driver" diff --git a/ports/stm32/pybthread.c b/ports/stm32/pybthread.c deleted file mode 100644 index 6baf88f66b25a..0000000000000 --- a/ports/stm32/pybthread.c +++ /dev/null @@ -1,237 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "gccollect.h" -#include "irq.h" -#include "pybthread.h" - -#if MICROPY_PY_THREAD - -#define PYB_MUTEX_UNLOCKED ((void*)0) -#define PYB_MUTEX_LOCKED ((void*)1) - -// These macros are used when we only need to protect against a thread -// switch; other interrupts are still allowed to proceed. -#define RAISE_IRQ_PRI() raise_irq_pri(IRQ_PRI_PENDSV) -#define RESTORE_IRQ_PRI(state) restore_irq_pri(state) - -extern void __fatal_error(const char*); - -volatile int pyb_thread_enabled; -pyb_thread_t *volatile pyb_thread_all; -pyb_thread_t *volatile pyb_thread_cur; - -static inline void pyb_thread_add_to_runable(pyb_thread_t *thread) { - thread->run_prev = pyb_thread_cur->run_prev; - thread->run_next = pyb_thread_cur; - pyb_thread_cur->run_prev->run_next = thread; - pyb_thread_cur->run_prev = thread; -} - -static inline void pyb_thread_remove_from_runable(pyb_thread_t *thread) { - if (thread->run_next == thread) { - __fatal_error("deadlock"); - } - thread->run_prev->run_next = thread->run_next; - thread->run_next->run_prev = thread->run_prev; -} - -void pyb_thread_init(pyb_thread_t *thread) { - pyb_thread_enabled = 0; - pyb_thread_all = thread; - pyb_thread_cur = thread; - thread->sp = NULL; // will be set when this thread switches out - thread->local_state = 0; // will be set by mp_thread_init - thread->arg = NULL; - thread->stack = &_heap_end; - thread->stack_len = ((uint32_t)&_estack - (uint32_t)&_heap_end) / sizeof(uint32_t); - thread->all_next = NULL; - thread->run_prev = thread; - thread->run_next = thread; - thread->queue_next = NULL; -} - -void pyb_thread_deinit() { - uint32_t irq_state = disable_irq(); - pyb_thread_enabled = 0; - pyb_thread_all = pyb_thread_cur; - pyb_thread_cur->all_next = NULL; - pyb_thread_cur->run_prev = pyb_thread_cur; - pyb_thread_cur->run_next = pyb_thread_cur; - enable_irq(irq_state); -} - -STATIC void pyb_thread_terminate(void) { - uint32_t irq_state = disable_irq(); - pyb_thread_t *thread = pyb_thread_cur; - // take current thread off the run list - pyb_thread_remove_from_runable(thread); - // take current thread off the list of all threads - for (pyb_thread_t **n = (pyb_thread_t**)&pyb_thread_all;; n = &(*n)->all_next) { - if (*n == thread) { - *n = thread->all_next; - break; - } - } - // clean pointers as much as possible to help GC - thread->all_next = NULL; - thread->queue_next = NULL; - thread->stack = NULL; - if (pyb_thread_all->all_next == NULL) { - // only 1 thread left - pyb_thread_enabled = 0; - } - // thread switch will occur after we enable irqs - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - enable_irq(irq_state); - // should not return - __fatal_error("could not terminate"); -} - -uint32_t pyb_thread_new(pyb_thread_t *thread, void *stack, size_t stack_len, void *entry, void *arg) { - uint32_t *stack_top = (uint32_t*)stack + stack_len; // stack is full descending - *--stack_top = 0x01000000; // xPSR (thumb bit set) - *--stack_top = (uint32_t)entry & 0xfffffffe; // pc (must have bit 0 cleared, even for thumb code) - *--stack_top = (uint32_t)pyb_thread_terminate; // lr - *--stack_top = 0; // r12 - *--stack_top = 0; // r3 - *--stack_top = 0; // r2 - *--stack_top = 0; // r1 - *--stack_top = (uint32_t)arg; // r0 - *--stack_top = 0xfffffff9; // lr (return to thread mode, non-FP, use MSP) - stack_top -= 8; // r4-r11 - stack_top -= 16; // s16-s31 (we assume all threads use FP registers) - thread->sp = stack_top; - thread->local_state = 0; - thread->arg = arg; - thread->stack = stack; - thread->stack_len = stack_len; - thread->queue_next = NULL; - uint32_t irq_state = disable_irq(); - pyb_thread_enabled = 1; - thread->all_next = pyb_thread_all; - pyb_thread_all = thread; - pyb_thread_add_to_runable(thread); - enable_irq(irq_state); - return (uint32_t)thread; // success -} - -void pyb_thread_dump(void) { - if (!pyb_thread_enabled) { - printf("THREAD: only main thread\n"); - } else { - printf("THREAD:\n"); - for (pyb_thread_t *th = pyb_thread_all; th != NULL; th = th->all_next) { - bool runable = false; - for (pyb_thread_t *th2 = pyb_thread_cur;; th2 = th2->run_next) { - if (th == th2) { - runable = true; - break; - } - if (th2->run_next == pyb_thread_cur) { - break; - } - } - printf(" id=%p sp=%p sz=%u", th, th->stack, th->stack_len); - if (runable) { - printf(" (runable)"); - } - printf("\n"); - } - } -} - -// should only be called from pendsv_isr_handler -void *pyb_thread_next(void *sp) { - pyb_thread_cur->sp = sp; - pyb_thread_cur = pyb_thread_cur->run_next; - pyb_thread_cur->timeslice = 4; // in milliseconds - return pyb_thread_cur->sp; -} - -void pyb_mutex_init(pyb_mutex_t *m) { - *m = PYB_MUTEX_UNLOCKED; -} - -int pyb_mutex_lock(pyb_mutex_t *m, int wait) { - uint32_t irq_state = RAISE_IRQ_PRI(); - if (*m == PYB_MUTEX_UNLOCKED) { - // mutex is available - *m = PYB_MUTEX_LOCKED; - RESTORE_IRQ_PRI(irq_state); - } else { - // mutex is locked - if (!wait) { - RESTORE_IRQ_PRI(irq_state); - return 0; // failed to lock mutex - } - if (*m == PYB_MUTEX_LOCKED) { - *m = pyb_thread_cur; - } else { - for (pyb_thread_t *n = *m;; n = n->queue_next) { - if (n->queue_next == NULL) { - n->queue_next = pyb_thread_cur; - break; - } - } - } - pyb_thread_cur->queue_next = NULL; - // take current thread off the run list - pyb_thread_remove_from_runable(pyb_thread_cur); - // thread switch will occur after we enable irqs - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - RESTORE_IRQ_PRI(irq_state); - // when we come back we have the mutex - } - return 1; // have mutex -} - -void pyb_mutex_unlock(pyb_mutex_t *m) { - uint32_t irq_state = RAISE_IRQ_PRI(); - if (*m == PYB_MUTEX_LOCKED) { - // no threads are blocked on the mutex - *m = PYB_MUTEX_UNLOCKED; - } else { - // at least one thread is blocked on this mutex - pyb_thread_t *th = *m; - if (th->queue_next == NULL) { - // no other threads are blocked - *m = PYB_MUTEX_LOCKED; - } else { - // at least one other thread is still blocked - *m = th->queue_next; - } - // put unblocked thread on runable list - pyb_thread_add_to_runable(th); - } - RESTORE_IRQ_PRI(irq_state); -} - -#endif // MICROPY_PY_THREAD diff --git a/ports/stm32/pybthread.h b/ports/stm32/pybthread.h deleted file mode 100644 index f628f934bc1a5..0000000000000 --- a/ports/stm32/pybthread.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_PYBTHREAD_H -#define MICROPY_INCLUDED_STMHAL_PYBTHREAD_H - -typedef struct _pyb_thread_t { - void *sp; - uint32_t local_state; - void *arg; // thread Python args, a GC root pointer - void *stack; // pointer to the stack - size_t stack_len; // number of words in the stack - uint32_t timeslice; - struct _pyb_thread_t *all_next; - struct _pyb_thread_t *run_prev; - struct _pyb_thread_t *run_next; - struct _pyb_thread_t *queue_next; -} pyb_thread_t; - -typedef pyb_thread_t *pyb_mutex_t; - -extern volatile int pyb_thread_enabled; -extern pyb_thread_t *volatile pyb_thread_all; -extern pyb_thread_t *volatile pyb_thread_cur; - -void pyb_thread_init(pyb_thread_t *th); -void pyb_thread_deinit(); -uint32_t pyb_thread_new(pyb_thread_t *th, void *stack, size_t stack_len, void *entry, void *arg); -void pyb_thread_dump(void); - -static inline uint32_t pyb_thread_get_id(void) { - return (uint32_t)pyb_thread_cur; -} - -static inline void pyb_thread_set_local(void *value) { - pyb_thread_cur->local_state = (uint32_t)value; -} - -static inline void *pyb_thread_get_local(void) { - return (void*)pyb_thread_cur->local_state; -} - -static inline void pyb_thread_yield(void) { - if (pyb_thread_cur->run_next == pyb_thread_cur) { - __WFI(); - } else { - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } -} - -void pyb_mutex_init(pyb_mutex_t *m); -int pyb_mutex_lock(pyb_mutex_t *m, int wait); -void pyb_mutex_unlock(pyb_mutex_t *m); - -#endif // MICROPY_INCLUDED_STMHAL_PYBTHREAD_H diff --git a/ports/stm32/qstrdefsport.h b/ports/stm32/qstrdefsport.h deleted file mode 100644 index 31220c5a42b23..0000000000000 --- a/ports/stm32/qstrdefsport.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// qstrs specific to this port - -Q(boot.py) -Q(main.py) -// Entries for sys.path -Q(/flash) -Q(/flash/lib) -Q(/sd) -Q(/sd/lib) -// for usb modes -Q(MSC+HID) -Q(VCP+MSC) -Q(VCP+HID) -Q(CDC+MSC) -Q(CDC+HID) -Q(/) - - -// The following qstrings not referenced from anywhere in the sources -Q(CDC) -Q(flash) diff --git a/ports/stm32/rng.c b/ports/stm32/rng.c deleted file mode 100644 index c0c5e9aeb559f..0000000000000 --- a/ports/stm32/rng.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/obj.h" -#include "rng.h" - -#if MICROPY_HW_ENABLE_RNG - -/// \moduleref pyb - -STATIC RNG_HandleTypeDef RNGHandle = {.Instance = NULL}; - -void rng_init0(void) { - // reset the RNG handle - memset(&RNGHandle, 0, sizeof(RNG_HandleTypeDef)); - RNGHandle.Instance = RNG; -} - -void rng_init(void) { - __RNG_CLK_ENABLE(); - HAL_RNG_Init(&RNGHandle); -} - -uint32_t rng_get(void) { - if (RNGHandle.State == HAL_RNG_STATE_RESET) { - rng_init(); - } - return HAL_RNG_GetRandomNumber(&RNGHandle); -} - -/// \function rng() -/// Return a 30-bit hardware generated random number. -STATIC mp_obj_t pyb_rng_get(void) { - if (RNGHandle.State == HAL_RNG_STATE_RESET) { - rng_init(); - } - return mp_obj_new_int(HAL_RNG_GetRandomNumber(&RNGHandle) >> 2); -} - -MP_DEFINE_CONST_FUN_OBJ_0(pyb_rng_get_obj, pyb_rng_get); - -#endif // MICROPY_HW_ENABLE_RNG diff --git a/ports/stm32/rng.h b/ports/stm32/rng.h deleted file mode 100644 index 43e49fe72e9c9..0000000000000 --- a/ports/stm32/rng.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_RNG_H -#define MICROPY_INCLUDED_STMHAL_RNG_H - -void rng_init0(void); -uint32_t rng_get(void); - -MP_DECLARE_CONST_FUN_OBJ_0(pyb_rng_get_obj); - -#endif // MICROPY_INCLUDED_STMHAL_RNG_H diff --git a/ports/stm32/rtc.c b/ports/stm32/rtc.c deleted file mode 100644 index 73272d3631aa9..0000000000000 --- a/ports/stm32/rtc.c +++ /dev/null @@ -1,730 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "rtc.h" -#include "irq.h" - -/// \moduleref pyb -/// \class RTC - real time clock -/// -/// The RTC is and independent clock that keeps track of the date -/// and time. -/// -/// Example usage: -/// -/// rtc = pyb.RTC() -/// rtc.datetime((2014, 5, 1, 4, 13, 0, 0, 0)) -/// print(rtc.datetime()) - -RTC_HandleTypeDef RTCHandle; - -// rtc_info indicates various things about RTC startup -// it's a bit of a hack at the moment -static mp_uint_t rtc_info; - -// Note: LSI is around (32KHz), these dividers should work either way -// ck_spre(1Hz) = RTCCLK(LSE) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1) -// modify RTC_ASYNCH_PREDIV & RTC_SYNCH_PREDIV in board//mpconfigport.h to change sub-second ticks -// default is 3906.25 µs, min is ~30.52 µs (will increas Ivbat by ~500nA) -#ifndef RTC_ASYNCH_PREDIV -#define RTC_ASYNCH_PREDIV (0x7f) -#endif -#ifndef RTC_SYNCH_PREDIV -#define RTC_SYNCH_PREDIV (0x00ff) -#endif - -STATIC HAL_StatusTypeDef PYB_RTC_Init(RTC_HandleTypeDef *hrtc); -STATIC void PYB_RTC_MspInit_Kick(RTC_HandleTypeDef *hrtc, bool rtc_use_lse); -STATIC HAL_StatusTypeDef PYB_RTC_MspInit_Finalise(RTC_HandleTypeDef *hrtc); -STATIC void RTC_CalendarConfig(void); - -#if defined(MICROPY_HW_RTC_USE_LSE) && MICROPY_HW_RTC_USE_LSE -STATIC bool rtc_use_lse = true; -#else -STATIC bool rtc_use_lse = false; -#endif -STATIC uint32_t rtc_startup_tick; -STATIC bool rtc_need_init_finalise = false; - -// check if LSE exists -// not well tested, should probably be removed -STATIC bool lse_magic(void) { -#if 0 - uint32_t mode_in = GPIOC->MODER & 0x3fffffff; - uint32_t mode_out = mode_in | 0x40000000; - GPIOC->MODER = mode_out; - GPIOC->OTYPER &= 0x7fff; - GPIOC->BSRRH = 0x8000; - GPIOC->OSPEEDR &= 0x3fffffff; - GPIOC->PUPDR &= 0x3fffffff; - int i = 0xff0; - __IO int d = 0; - uint32_t tc = 0; - __IO uint32_t j; - while (i) { - GPIOC->MODER = mode_out; - GPIOC->MODER = mode_in; - for (j = 0; j < d; j++) ; - i--; - if ((GPIOC->IDR & 0x8000) == 0) { - tc++; - } - } - return (tc < 0xff0)?true:false; -#else - return false; -#endif -} - -void rtc_init_start(bool force_init) { - RTCHandle.Instance = RTC; - - /* Configure RTC prescaler and RTC data registers */ - /* RTC configured as follow: - - Hour Format = Format 24 - - Asynch Prediv = Value according to source clock - - Synch Prediv = Value according to source clock - - OutPut = Output Disable - - OutPutPolarity = High Polarity - - OutPutType = Open Drain */ - RTCHandle.Init.HourFormat = RTC_HOURFORMAT_24; - RTCHandle.Init.AsynchPrediv = RTC_ASYNCH_PREDIV; - RTCHandle.Init.SynchPrediv = RTC_SYNCH_PREDIV; - RTCHandle.Init.OutPut = RTC_OUTPUT_DISABLE; - RTCHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - RTCHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - - rtc_need_init_finalise = false; - - if (!force_init) { - if ((RCC->BDCR & (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) == (RCC_BDCR_LSEON | RCC_BDCR_LSERDY)) { - // LSE is enabled & ready --> no need to (re-)init RTC - // remove Backup Domain write protection - HAL_PWR_EnableBkUpAccess(); - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - // provide some status information - rtc_info |= 0x40000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8; - return; - } else if (((RCC->BDCR & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL_1) && ((RCC->CSR & 3) == 3)) { - // LSI configured & enabled & ready --> no need to (re-)init RTC - // remove Backup Domain write protection - HAL_PWR_EnableBkUpAccess(); - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - RCC->CSR |= 1; - // provide some status information - rtc_info |= 0x80000 | (RCC->BDCR & 7) | (RCC->CSR & 3) << 8; - return; - } - } - - rtc_startup_tick = HAL_GetTick(); - rtc_info = 0x3f000000 | (rtc_startup_tick & 0xffffff); - if (rtc_use_lse) { - if (lse_magic()) { - // don't even try LSE - rtc_use_lse = false; - rtc_info &= ~0x01000000; - } - } - PYB_RTC_MspInit_Kick(&RTCHandle, rtc_use_lse); -} - -void rtc_init_finalise() { - if (!rtc_need_init_finalise) { - return; - } - - rtc_info = 0x20000000 | (rtc_use_lse << 28); - if (PYB_RTC_Init(&RTCHandle) != HAL_OK) { - if (rtc_use_lse) { - // fall back to LSI... - rtc_use_lse = false; - rtc_startup_tick = HAL_GetTick(); - PYB_RTC_MspInit_Kick(&RTCHandle, rtc_use_lse); - HAL_PWR_EnableBkUpAccess(); - RTCHandle.State = HAL_RTC_STATE_RESET; - if (PYB_RTC_Init(&RTCHandle) != HAL_OK) { - rtc_info = 0x0100ffff; // indicate error - return; - } - } else { - // init error - rtc_info = 0xffff; // indicate error - return; - } - } - - // record how long it took for the RTC to start up - rtc_info |= (HAL_GetTick() - rtc_startup_tick) & 0xffff; - - // fresh reset; configure RTC Calendar - RTC_CalendarConfig(); - #if defined(MCU_SERIES_L4) - if(__HAL_RCC_GET_FLAG(RCC_FLAG_BORRST) != RESET) { - #else - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PORRST) != RESET) { - #endif - // power on reset occurred - rtc_info |= 0x10000; - } - if(__HAL_RCC_GET_FLAG(RCC_FLAG_PINRST) != RESET) { - // external reset occurred - rtc_info |= 0x20000; - } - // Clear source Reset Flag - __HAL_RCC_CLEAR_RESET_FLAGS(); - rtc_need_init_finalise = false; -} - -STATIC HAL_StatusTypeDef PYB_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - /*------------------------------ LSI Configuration -------------------------*/ - if ((RCC_OscInitStruct->OscillatorType & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) { - // Check the LSI State - if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) { - // Enable the Internal Low Speed oscillator (LSI). - __HAL_RCC_LSI_ENABLE(); - } else { - // Disable the Internal Low Speed oscillator (LSI). - __HAL_RCC_LSI_DISABLE(); - } - } - - /*------------------------------ LSE Configuration -------------------------*/ - if ((RCC_OscInitStruct->OscillatorType & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) { - // Enable Power Clock - __PWR_CLK_ENABLE(); - HAL_PWR_EnableBkUpAccess(); - uint32_t tickstart = HAL_GetTick(); - - #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - //__HAL_RCC_PWR_CLK_ENABLE(); - // Enable write access to Backup domain - //PWR->CR1 |= PWR_CR1_DBP; - // Wait for Backup domain Write protection disable - while ((PWR->CR1 & PWR_CR1_DBP) == RESET) { - if (HAL_GetTick() - tickstart > RCC_DBP_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - #else - // Enable write access to Backup domain - //PWR->CR |= PWR_CR_DBP; - // Wait for Backup domain Write protection disable - while ((PWR->CR & PWR_CR_DBP) == RESET) { - if (HAL_GetTick() - tickstart > DBP_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - #endif - - // Set the new LSE configuration - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - } - - return HAL_OK; -} - -STATIC HAL_StatusTypeDef PYB_RTC_Init(RTC_HandleTypeDef *hrtc) { - // Check the RTC peripheral state - if (hrtc == NULL) { - return HAL_ERROR; - } - if (hrtc->State == HAL_RTC_STATE_RESET) { - // Allocate lock resource and initialize it - hrtc->Lock = HAL_UNLOCKED; - // Initialize RTC MSP - if (PYB_RTC_MspInit_Finalise(hrtc) != HAL_OK) { - return HAL_ERROR; - } - } - - // Set RTC state - hrtc->State = HAL_RTC_STATE_BUSY; - - // Disable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - // Set Initialization mode - if (RTC_EnterInitMode(hrtc) != HAL_OK) { - // Enable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - // Set RTC state - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } else { - // Clear RTC_CR FMT, OSEL and POL Bits - hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); - // Set RTC_CR register - hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); - - // Configure the RTC PRER - hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); - hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16); - - // Exit Initialization mode - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - - #if defined(MCU_SERIES_L4) - hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMOUTTYPE; - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType); - #elif defined(MCU_SERIES_F7) - hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE; - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType); - #else - hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE; - hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType); - #endif - - // Enable the write protection for RTC registers - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - // Set RTC state - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; - } -} - -STATIC void PYB_RTC_MspInit_Kick(RTC_HandleTypeDef *hrtc, bool rtc_use_lse) { - /* To change the source clock of the RTC feature (LSE, LSI), You have to: - - Enable the power clock using __PWR_CLK_ENABLE() - - Enable write access using HAL_PWR_EnableBkUpAccess() function before to - configure the RTC clock source (to be done once after reset). - - Reset the Back up Domain using __HAL_RCC_BACKUPRESET_FORCE() and - __HAL_RCC_BACKUPRESET_RELEASE(). - - Configure the needed RTc clock source */ - - // RTC clock source uses LSE (external crystal) only if relevant - // configuration variable is set. Otherwise it uses LSI (internal osc). - - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - if (rtc_use_lse) { - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.LSIState = RCC_LSI_OFF; - } else { - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - } - PYB_RCC_OscConfig(&RCC_OscInitStruct); - - // now ramp up osc. in background and flag calendear init needed - rtc_need_init_finalise = true; -} - -#define PYB_LSE_TIMEOUT_VALUE 1000 // ST docs spec 2000 ms LSE startup, seems to be too pessimistic -#define PYB_LSI_TIMEOUT_VALUE 500 // this is way too pessimistic, typ. < 1ms - -STATIC HAL_StatusTypeDef PYB_RTC_MspInit_Finalise(RTC_HandleTypeDef *hrtc) { - // we already had a kick so now wait for the corresponding ready state... - if (rtc_use_lse) { - // we now have to wait for LSE ready or timeout - uint32_t tickstart = rtc_startup_tick; - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) { - if ((HAL_GetTick() - tickstart ) > PYB_LSE_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - } else { - // we now have to wait for LSI ready or timeout - uint32_t tickstart = rtc_startup_tick; - while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) { - if ((HAL_GetTick() - tickstart ) > PYB_LSI_TIMEOUT_VALUE) { - return HAL_TIMEOUT; - } - } - } - - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; - if (rtc_use_lse) { - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - } else { - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; - } - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - //Error_Handler(); - return HAL_ERROR; - } - - // enable RTC peripheral clock - __HAL_RCC_RTC_ENABLE(); - return HAL_OK; -} - -STATIC void RTC_CalendarConfig(void) { - // set the date to 1st Jan 2015 - RTC_DateTypeDef date; - date.Year = 15; - date.Month = 1; - date.Date = 1; - date.WeekDay = RTC_WEEKDAY_THURSDAY; - - if(HAL_RTC_SetDate(&RTCHandle, &date, FORMAT_BIN) != HAL_OK) { - // init error - return; - } - - // set the time to 00:00:00 - RTC_TimeTypeDef time; - time.Hours = 0; - time.Minutes = 0; - time.Seconds = 0; - time.TimeFormat = RTC_HOURFORMAT12_AM; - time.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - time.StoreOperation = RTC_STOREOPERATION_RESET; - - if (HAL_RTC_SetTime(&RTCHandle, &time, FORMAT_BIN) != HAL_OK) { - // init error - return; - } -} - -/******************************************************************************/ -// MicroPython bindings - -typedef struct _pyb_rtc_obj_t { - mp_obj_base_t base; -} pyb_rtc_obj_t; - -STATIC const pyb_rtc_obj_t pyb_rtc_obj = {{&pyb_rtc_type}}; - -/// \classmethod \constructor() -/// Create an RTC object. -STATIC mp_obj_t pyb_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return constant object - return (mp_obj_t)&pyb_rtc_obj; -} - -// force rtc to re-initialise -mp_obj_t pyb_rtc_init(mp_obj_t self_in) { - rtc_init_start(true); - rtc_init_finalise(); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_init_obj, pyb_rtc_init); - -/// \method info() -/// Get information about the startup time and reset source. -/// -/// - The lower 0xffff are the number of milliseconds the RTC took to -/// start up. -/// - Bit 0x10000 is set if a power-on reset occurred. -/// - Bit 0x20000 is set if an external reset occurred -mp_obj_t pyb_rtc_info(mp_obj_t self_in) { - return mp_obj_new_int(rtc_info); -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_rtc_info_obj, pyb_rtc_info); - -/// \method datetime([datetimetuple]) -/// Get or set the date and time of the RTC. -/// -/// With no arguments, this method returns an 8-tuple with the current -/// date and time. With 1 argument (being an 8-tuple) it sets the date -/// and time. -/// -/// The 8-tuple has the following format: -/// -/// (year, month, day, weekday, hours, minutes, seconds, subseconds) -/// -/// `weekday` is 1-7 for Monday through Sunday. -/// -/// `subseconds` counts down from 255 to 0 - -#define MEG_DIV_64 (1000000 / 64) -#define MEG_DIV_SCALE ((RTC_SYNCH_PREDIV + 1) / 64) - -#if defined(MICROPY_HW_RTC_USE_US) && MICROPY_HW_RTC_USE_US -uint32_t rtc_subsec_to_us(uint32_t ss) { - return ((RTC_SYNCH_PREDIV - ss) * MEG_DIV_64) / MEG_DIV_SCALE; -} - -uint32_t rtc_us_to_subsec(uint32_t us) { - return RTC_SYNCH_PREDIV - (us * MEG_DIV_SCALE / MEG_DIV_64); -} -#else -#define rtc_us_to_subsec -#define rtc_subsec_to_us -#endif - -mp_obj_t pyb_rtc_datetime(size_t n_args, const mp_obj_t *args) { - rtc_init_finalise(); - if (n_args == 1) { - // get date and time - // note: need to call get time then get date to correctly access the registers - RTC_DateTypeDef date; - RTC_TimeTypeDef time; - HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN); - HAL_RTC_GetDate(&RTCHandle, &date, FORMAT_BIN); - mp_obj_t tuple[8] = { - mp_obj_new_int(2000 + date.Year), - mp_obj_new_int(date.Month), - mp_obj_new_int(date.Date), - mp_obj_new_int(date.WeekDay), - mp_obj_new_int(time.Hours), - mp_obj_new_int(time.Minutes), - mp_obj_new_int(time.Seconds), - mp_obj_new_int(rtc_subsec_to_us(time.SubSeconds)), - }; - return mp_obj_new_tuple(8, tuple); - } else { - // set date and time - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[1], 8, &items); - - RTC_DateTypeDef date; - date.Year = mp_obj_get_int(items[0]) - 2000; - date.Month = mp_obj_get_int(items[1]); - date.Date = mp_obj_get_int(items[2]); - date.WeekDay = mp_obj_get_int(items[3]); - HAL_RTC_SetDate(&RTCHandle, &date, FORMAT_BIN); - - RTC_TimeTypeDef time; - time.Hours = mp_obj_get_int(items[4]); - time.Minutes = mp_obj_get_int(items[5]); - time.Seconds = mp_obj_get_int(items[6]); - time.SubSeconds = rtc_us_to_subsec(mp_obj_get_int(items[7])); - time.TimeFormat = RTC_HOURFORMAT12_AM; - time.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - time.StoreOperation = RTC_STOREOPERATION_SET; - HAL_RTC_SetTime(&RTCHandle, &time, FORMAT_BIN); - - return mp_const_none; - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_datetime_obj, 1, 2, pyb_rtc_datetime); - -// wakeup(None) -// wakeup(ms, callback=None) -// wakeup(wucksel, wut, callback) -mp_obj_t pyb_rtc_wakeup(size_t n_args, const mp_obj_t *args) { - // wut is wakeup counter start value, wucksel is clock source - // counter is decremented at wucksel rate, and wakes the MCU when it gets to 0 - // wucksel=0b000 is RTC/16 (RTC runs at 32768Hz) - // wucksel=0b001 is RTC/8 - // wucksel=0b010 is RTC/4 - // wucksel=0b011 is RTC/2 - // wucksel=0b100 is 1Hz clock - // wucksel=0b110 is 1Hz clock with 0x10000 added to wut - // so a 1 second wakeup could be wut=2047, wucksel=0b000, or wut=4095, wucksel=0b001, etc - - rtc_init_finalise(); - - // disable wakeup IRQ while we configure it - HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn); - - bool enable = false; - mp_int_t wucksel; - mp_int_t wut; - mp_obj_t callback = mp_const_none; - if (n_args <= 3) { - if (args[1] == mp_const_none) { - // disable wakeup - } else { - // time given in ms - mp_int_t ms = mp_obj_get_int(args[1]); - mp_int_t div = 2; - wucksel = 3; - while (div <= 16 && ms > 2000 * div) { - div *= 2; - wucksel -= 1; - } - if (div <= 16) { - wut = 32768 / div * ms / 1000; - } else { - // use 1Hz clock - wucksel = 4; - wut = ms / 1000; - if (wut > 0x10000) { - // wut too large for 16-bit register, try to offset by 0x10000 - wucksel = 6; - wut -= 0x10000; - if (wut > 0x10000) { - // wut still too large - mp_raise_ValueError("wakeup value too large"); - } - } - } - // wut register should be 1 less than desired value, but guard against wut=0 - if (wut > 0) { - wut -= 1; - } - enable = true; - } - if (n_args == 3) { - callback = args[2]; - } - } else { - // config values given directly - wucksel = mp_obj_get_int(args[1]); - wut = mp_obj_get_int(args[2]); - callback = args[3]; - enable = true; - } - - // set the callback - MP_STATE_PORT(pyb_extint_callback)[22] = callback; - - // disable register write protection - RTC->WPR = 0xca; - RTC->WPR = 0x53; - - // clear WUTE - RTC->CR &= ~(1 << 10); - - // wait until WUTWF is set - while (!(RTC->ISR & (1 << 2))) { - } - - if (enable) { - // program WUT - RTC->WUTR = wut; - - // set WUTIE to enable wakeup interrupts - // set WUTE to enable wakeup - // program WUCKSEL - RTC->CR = (RTC->CR & ~7) | (1 << 14) | (1 << 10) | (wucksel & 7); - - // enable register write protection - RTC->WPR = 0xff; - - // enable external interrupts on line 22 - #if defined(MCU_SERIES_L4) - EXTI->IMR1 |= 1 << 22; - EXTI->RTSR1 |= 1 << 22; - #else - EXTI->IMR |= 1 << 22; - EXTI->RTSR |= 1 << 22; - #endif - - // clear interrupt flags - RTC->ISR &= ~(1 << 10); - #if defined(MCU_SERIES_L4) - EXTI->PR1 = 1 << 22; - #else - EXTI->PR = 1 << 22; - #endif - - HAL_NVIC_SetPriority(RTC_WKUP_IRQn, IRQ_PRI_RTC_WKUP, IRQ_SUBPRI_RTC_WKUP); - HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn); - - //printf("wut=%d wucksel=%d\n", wut, wucksel); - } else { - // clear WUTIE to disable interrupts - RTC->CR &= ~(1 << 14); - - // enable register write protection - RTC->WPR = 0xff; - - // disable external interrupts on line 22 - #if defined(MCU_SERIES_L4) - EXTI->IMR1 &= ~(1 << 22); - #else - EXTI->IMR &= ~(1 << 22); - #endif - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_wakeup_obj, 2, 4, pyb_rtc_wakeup); - -// calibration(None) -// calibration(cal) -// When an integer argument is provided, check that it falls in the range [-511 to 512] -// and set the calibration value; otherwise return calibration value -mp_obj_t pyb_rtc_calibration(size_t n_args, const mp_obj_t *args) { - rtc_init_finalise(); - mp_int_t cal; - if (n_args == 2) { - cal = mp_obj_get_int(args[1]); - mp_uint_t cal_p, cal_m; - if (cal < -511 || cal > 512) { -#if defined(MICROPY_HW_RTC_USE_CALOUT) && MICROPY_HW_RTC_USE_CALOUT - if ((cal & 0xfffe) == 0x0ffe) { - // turn on/off X18 (PC13) 512Hz output - // Note: - // Output will stay active even in VBAT mode (and inrease current) - if (cal & 1) { - HAL_RTCEx_SetCalibrationOutPut(&RTCHandle, RTC_CALIBOUTPUT_512HZ); - } else { - HAL_RTCEx_DeactivateCalibrationOutPut(&RTCHandle); - } - return mp_obj_new_int(cal & 1); - } else { - mp_raise_ValueError("calibration value out of range"); - } -#else - mp_raise_ValueError("calibration value out of range"); -#endif - } - if (cal > 0) { - cal_p = RTC_SMOOTHCALIB_PLUSPULSES_SET; - cal_m = 512 - cal; - } else { - cal_p = RTC_SMOOTHCALIB_PLUSPULSES_RESET; - cal_m = -cal; - } - HAL_RTCEx_SetSmoothCalib(&RTCHandle, RTC_SMOOTHCALIB_PERIOD_32SEC, cal_p, cal_m); - return mp_const_none; - } else { - // printf("CALR = 0x%x\n", (mp_uint_t) RTCHandle.Instance->CALR); // DEBUG - // Test if CALP bit is set in CALR: - if (RTCHandle.Instance->CALR & 0x8000) { - cal = 512 - (RTCHandle.Instance->CALR & 0x1ff); - } else { - cal = -(RTCHandle.Instance->CALR & 0x1ff); - } - return mp_obj_new_int(cal); - } -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_rtc_calibration_obj, 1, 2, pyb_rtc_calibration); - -STATIC const mp_rom_map_elem_t pyb_rtc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_rtc_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_rtc_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&pyb_rtc_datetime_obj) }, - { MP_ROM_QSTR(MP_QSTR_wakeup), MP_ROM_PTR(&pyb_rtc_wakeup_obj) }, - { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&pyb_rtc_calibration_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_rtc_locals_dict, pyb_rtc_locals_dict_table); - -const mp_obj_type_t pyb_rtc_type = { - { &mp_type_type }, - .name = MP_QSTR_RTC, - .make_new = pyb_rtc_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_rtc_locals_dict, -}; diff --git a/ports/stm32/rtc.h b/ports/stm32/rtc.h deleted file mode 100644 index 09ab2aedff103..0000000000000 --- a/ports/stm32/rtc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_RTC_H -#define MICROPY_INCLUDED_STMHAL_RTC_H - -extern RTC_HandleTypeDef RTCHandle; -extern const mp_obj_type_t pyb_rtc_type; - -void rtc_init_start(bool force_init); -void rtc_init_finalise(void); - -#endif // MICROPY_INCLUDED_STMHAL_RTC_H diff --git a/ports/stm32/sdcard.c b/ports/stm32/sdcard.c deleted file mode 100644 index 484426b8468b1..0000000000000 --- a/ports/stm32/sdcard.c +++ /dev/null @@ -1,546 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs_fat.h" - -#include "sdcard.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "bufhelper.h" -#include "dma.h" -#include "irq.h" - -#if MICROPY_HW_HAS_SDCARD - -#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - -// The F7 has 2 SDMMC units but at the moment we only support using one of them in -// a given build. If a boards config file defines MICROPY_HW_SDMMC2_CK then SDMMC2 -// is used, otherwise SDMMC1 is used. - -#if defined(MICROPY_HW_SDMMC2_CK) -#define SDIO SDMMC2 -#define SDMMC_CLK_ENABLE() __HAL_RCC_SDMMC2_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __HAL_RCC_SDMMC2_CLK_DISABLE() -#define SDMMC_IRQn SDMMC2_IRQn -#define SDMMC_TX_DMA dma_SDMMC_2_TX -#define SDMMC_RX_DMA dma_SDMMC_2_RX -#else -#define SDIO SDMMC1 -#define SDMMC_CLK_ENABLE() __HAL_RCC_SDMMC1_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __HAL_RCC_SDMMC1_CLK_DISABLE() -#define SDMMC_IRQn SDMMC1_IRQn -#define SDMMC_TX_DMA dma_SDIO_0_TX -#define SDMMC_RX_DMA dma_SDIO_0_RX -#endif - -// The F7 & L4 series calls the peripheral SDMMC rather than SDIO, so provide some -// #defines for backwards compatability. - -#define SDIO_CLOCK_EDGE_RISING SDMMC_CLOCK_EDGE_RISING -#define SDIO_CLOCK_EDGE_FALLING SDMMC_CLOCK_EDGE_FALLING - -#define SDIO_CLOCK_BYPASS_DISABLE SDMMC_CLOCK_BYPASS_DISABLE -#define SDIO_CLOCK_BYPASS_ENABLE SDMMC_CLOCK_BYPASS_ENABLE - -#define SDIO_CLOCK_POWER_SAVE_DISABLE SDMMC_CLOCK_POWER_SAVE_DISABLE -#define SDIO_CLOCK_POWER_SAVE_ENABLE SDMMC_CLOCK_POWER_SAVE_ENABLE - -#define SDIO_BUS_WIDE_1B SDMMC_BUS_WIDE_1B -#define SDIO_BUS_WIDE_4B SDMMC_BUS_WIDE_4B -#define SDIO_BUS_WIDE_8B SDMMC_BUS_WIDE_8B - -#define SDIO_HARDWARE_FLOW_CONTROL_DISABLE SDMMC_HARDWARE_FLOW_CONTROL_DISABLE -#define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDMMC_HARDWARE_FLOW_CONTROL_ENABLE - -#define SDIO_TRANSFER_CLK_DIV SDMMC_TRANSFER_CLK_DIV - -#else - -// These are definitions for F4 MCUs so there is a common macro across all MCUs. - -#define SDMMC_CLK_ENABLE() __SDIO_CLK_ENABLE() -#define SDMMC_CLK_DISABLE() __SDIO_CLK_DISABLE() -#define SDMMC_IRQn SDIO_IRQn -#define SDMMC_TX_DMA dma_SDIO_0_TX -#define SDMMC_RX_DMA dma_SDIO_0_RX - -#endif - -// If no custom SDIO pins defined, use the default ones -#ifndef MICROPY_HW_SDMMC_CK - -#define MICROPY_HW_SDMMC_D0 (pin_C8) -#define MICROPY_HW_SDMMC_D1 (pin_C9) -#define MICROPY_HW_SDMMC_D2 (pin_C10) -#define MICROPY_HW_SDMMC_D3 (pin_C11) -#define MICROPY_HW_SDMMC_CK (pin_C12) -#define MICROPY_HW_SDMMC_CMD (pin_D2) - -#endif - -// TODO: Since SDIO is fundamentally half-duplex, we really only need to -// tie up one DMA channel. However, the HAL DMA API doesn't -// seem to provide a convenient way to change the direction. I believe that -// its as simple as changing the CR register and the Init.Direction field -// and make DMA_SetConfig public. - -// TODO: I think that as an optimization, we can allocate these dynamically -// if an sd card is detected. This will save approx 260 bytes of RAM -// when no sdcard was being used. -static SD_HandleTypeDef sd_handle; -static DMA_HandleTypeDef sd_rx_dma, sd_tx_dma; - -void sdcard_init(void) { - // invalidate the sd_handle - sd_handle.Instance = NULL; - - // configure SD GPIO - // we do this here an not in HAL_SD_MspInit because it apparently - // makes it more robust to have the pins always pulled high - // Note: the mp_hal_pin_config function will configure the GPIO in - // fast mode which can do up to 50MHz. This should be plenty for SDIO - // which clocks up to 25MHz maximum. - #if defined(MICROPY_HW_SDMMC2_CK) - // Use SDMMC2 peripheral with pins provided by the board's config - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_CK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_CMD, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_D0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_D1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_D2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - mp_hal_pin_config_alt(&MICROPY_HW_SDMMC2_D3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, AF_FN_SDMMC, 2); - #else - // Default SDIO/SDMMC1 config - mp_hal_pin_config(&MICROPY_HW_SDMMC_D0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(&MICROPY_HW_SDMMC_D1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(&MICROPY_HW_SDMMC_D2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(&MICROPY_HW_SDMMC_D3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(&MICROPY_HW_SDMMC_CK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - mp_hal_pin_config(&MICROPY_HW_SDMMC_CMD, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP, GPIO_AF12_SDIO); - #endif - - // configure the SD card detect pin - // we do this here so we can detect if the SD card is inserted before powering it on - mp_hal_pin_config(&MICROPY_HW_SDCARD_DETECT_PIN, MP_HAL_PIN_MODE_INPUT, MICROPY_HW_SDCARD_DETECT_PULL, 0); -} - -void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { - // enable SDIO clock - SDMMC_CLK_ENABLE(); - - // NVIC configuration for SDIO interrupts - HAL_NVIC_SetPriority(SDMMC_IRQn, IRQ_PRI_SDIO, IRQ_SUBPRI_SDIO); - HAL_NVIC_EnableIRQ(SDMMC_IRQn); - - // GPIO have already been initialised by sdcard_init -} - -void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) { - HAL_NVIC_DisableIRQ(SDMMC_IRQn); - SDMMC_CLK_DISABLE(); -} - -bool sdcard_is_present(void) { - return HAL_GPIO_ReadPin(MICROPY_HW_SDCARD_DETECT_PIN.gpio, MICROPY_HW_SDCARD_DETECT_PIN.pin_mask) == MICROPY_HW_SDCARD_DETECT_PRESENT; -} - -bool sdcard_power_on(void) { - if (!sdcard_is_present()) { - return false; - } - if (sd_handle.Instance) { - return true; - } - - // SD device interface configuration - sd_handle.Instance = SDIO; - sd_handle.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING; - sd_handle.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE; - sd_handle.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_ENABLE; - sd_handle.Init.BusWide = SDIO_BUS_WIDE_1B; - sd_handle.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE; - sd_handle.Init.ClockDiv = SDIO_TRANSFER_CLK_DIV; - - // init the SD interface, with retry if it's not ready yet - for (int retry = 10; HAL_SD_Init(&sd_handle) != HAL_OK; retry--) { - if (retry == 0) { - goto error; - } - mp_hal_delay_ms(50); - } - - // configure the SD bus width for wide operation - if (HAL_SD_ConfigWideBusOperation(&sd_handle, SDIO_BUS_WIDE_4B) != HAL_OK) { - HAL_SD_DeInit(&sd_handle); - goto error; - } - - return true; - -error: - sd_handle.Instance = NULL; - return false; -} - -void sdcard_power_off(void) { - if (!sd_handle.Instance) { - return; - } - HAL_SD_DeInit(&sd_handle); - sd_handle.Instance = NULL; -} - -uint64_t sdcard_get_capacity_in_bytes(void) { - if (sd_handle.Instance == NULL) { - return 0; - } - HAL_SD_CardInfoTypeDef cardinfo; - HAL_SD_GetCardInfo(&sd_handle, &cardinfo); - return (uint64_t)cardinfo.LogBlockNbr * (uint64_t)cardinfo.LogBlockSize; -} - -void SDIO_IRQHandler(void) { - IRQ_ENTER(SDIO_IRQn); - HAL_SD_IRQHandler(&sd_handle); - IRQ_EXIT(SDIO_IRQn); -} - -#if defined(MCU_SERIES_F7) -void SDMMC2_IRQHandler(void) { - IRQ_ENTER(SDMMC2_IRQn); - HAL_SD_IRQHandler(&sd_handle); - IRQ_EXIT(SDMMC2_IRQn); -} -#endif - -STATIC HAL_StatusTypeDef sdcard_wait_finished(SD_HandleTypeDef *sd, uint32_t timeout) { - // Wait for HAL driver to be ready (eg for DMA to finish) - uint32_t start = HAL_GetTick(); - while (sd->State == HAL_SD_STATE_BUSY) { - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - // Wait for SD card to complete the operation - for (;;) { - HAL_SD_CardStateTypeDef state = HAL_SD_GetCardState(sd); - if (state == HAL_SD_CARD_TRANSFER) { - return HAL_OK; - } - if (!(state == HAL_SD_CARD_SENDING || state == HAL_SD_CARD_RECEIVING || state == HAL_SD_CARD_PROGRAMMING)) { - return HAL_ERROR; - } - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - // check that SD card is initialised - if (sd_handle.Instance == NULL) { - return HAL_ERROR; - } - - HAL_StatusTypeDef err = HAL_OK; - - // check that dest pointer is aligned on a 4-byte boundary - uint8_t *orig_dest = NULL; - uint32_t saved_word; - if (((uint32_t)dest & 3) != 0) { - // Pointer is not aligned so it needs fixing. - // We could allocate a temporary block of RAM (as sdcard_write_blocks - // does) but instead we are going to use the dest buffer inplace. We - // are going to align the pointer, save the initial word at the aligned - // location, read into the aligned memory, move the memory back to the - // unaligned location, then restore the initial bytes at the aligned - // location. We should have no trouble doing this as those initial - // bytes at the aligned location should be able to be changed for the - // duration of this function call. - orig_dest = dest; - dest = (uint8_t*)((uint32_t)dest & ~3); - saved_word = *(uint32_t*)dest; - } - - if (query_irq() == IRQ_STATE_ENABLED) { - // we must disable USB irqs to prevent MSC contention with SD card - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - dma_init(&sd_rx_dma, &SDMMC_RX_DMA, &sd_handle); - sd_handle.hdmarx = &sd_rx_dma; - - // make sure cache is flushed and invalidated so when DMA updates the RAM - // from reading the peripheral the CPU then reads the new data - MP_HAL_CLEANINVALIDATE_DCACHE(dest, num_blocks * SDCARD_BLOCK_SIZE); - - err = HAL_SD_ReadBlocks_DMA(&sd_handle, dest, block_num, num_blocks); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - - dma_deinit(&SDMMC_RX_DMA); - sd_handle.hdmarx = NULL; - - restore_irq_pri(basepri); - } else { - err = HAL_SD_ReadBlocks(&sd_handle, dest, block_num, num_blocks, 60000); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - } - - if (orig_dest != NULL) { - // move the read data to the non-aligned position, and restore the initial bytes - memmove(orig_dest, dest, num_blocks * SDCARD_BLOCK_SIZE); - memcpy(dest, &saved_word, orig_dest - dest); - } - - return err; -} - -mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - // check that SD card is initialised - if (sd_handle.Instance == NULL) { - return HAL_ERROR; - } - - HAL_StatusTypeDef err = HAL_OK; - - // check that src pointer is aligned on a 4-byte boundary - if (((uint32_t)src & 3) != 0) { - // pointer is not aligned, so allocate a temporary block to do the write - uint8_t *src_aligned = m_new_maybe(uint8_t, SDCARD_BLOCK_SIZE); - if (src_aligned == NULL) { - return HAL_ERROR; - } - for (size_t i = 0; i < num_blocks; ++i) { - memcpy(src_aligned, src + i * SDCARD_BLOCK_SIZE, SDCARD_BLOCK_SIZE); - err = sdcard_write_blocks(src_aligned, block_num + i, 1); - if (err != HAL_OK) { - break; - } - } - m_del(uint8_t, src_aligned, SDCARD_BLOCK_SIZE); - return err; - } - - if (query_irq() == IRQ_STATE_ENABLED) { - // we must disable USB irqs to prevent MSC contention with SD card - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - dma_init(&sd_tx_dma, &SDMMC_TX_DMA, &sd_handle); - sd_handle.hdmatx = &sd_tx_dma; - - // make sure cache is flushed to RAM so the DMA can read the correct data - MP_HAL_CLEAN_DCACHE(src, num_blocks * SDCARD_BLOCK_SIZE); - - err = HAL_SD_WriteBlocks_DMA(&sd_handle, (uint8_t*)src, block_num, num_blocks); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - dma_deinit(&SDMMC_TX_DMA); - sd_handle.hdmatx = NULL; - - restore_irq_pri(basepri); - } else { - err = HAL_SD_WriteBlocks(&sd_handle, (uint8_t*)src, block_num, num_blocks, 60000); - if (err == HAL_OK) { - err = sdcard_wait_finished(&sd_handle, 60000); - } - } - - return err; -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the SD card as an object with the block protocol. - -// there is a singleton SDCard object -const mp_obj_base_t pyb_sdcard_obj = {&pyb_sdcard_type}; - -STATIC mp_obj_t pyb_sdcard_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_sdcard_obj; -} - -STATIC mp_obj_t sd_present(mp_obj_t self) { - return mp_obj_new_bool(sdcard_is_present()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(sd_present_obj, sd_present); - -STATIC mp_obj_t sd_power(mp_obj_t self, mp_obj_t state) { - bool result; - if (mp_obj_is_true(state)) { - result = sdcard_power_on(); - } else { - sdcard_power_off(); - result = true; - } - return mp_obj_new_bool(result); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(sd_power_obj, sd_power); - -STATIC mp_obj_t sd_info(mp_obj_t self) { - if (sd_handle.Instance == NULL) { - return mp_const_none; - } - HAL_SD_CardInfoTypeDef cardinfo; - HAL_SD_GetCardInfo(&sd_handle, &cardinfo); - // cardinfo.SD_csd and cardinfo.SD_cid have lots of info but we don't use them - mp_obj_t tuple[3] = { - mp_obj_new_int_from_ull((uint64_t)cardinfo.LogBlockNbr * (uint64_t)cardinfo.LogBlockSize), - mp_obj_new_int_from_uint(cardinfo.LogBlockSize), - mp_obj_new_int(cardinfo.CardType), - }; - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(sd_info_obj, sd_info); - -// now obsolete, kept for backwards compatibility -STATIC mp_obj_t sd_read(mp_obj_t self, mp_obj_t block_num) { - uint8_t *dest = m_new(uint8_t, SDCARD_BLOCK_SIZE); - mp_uint_t ret = sdcard_read_blocks(dest, mp_obj_get_int(block_num), 1); - - if (ret != 0) { - m_del(uint8_t, dest, SDCARD_BLOCK_SIZE); - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "sdcard_read_blocks failed [%u]", ret)); - } - - return mp_obj_new_bytearray_by_ref(SDCARD_BLOCK_SIZE, dest); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(sd_read_obj, sd_read); - -// now obsolete, kept for backwards compatibility -STATIC mp_obj_t sd_write(mp_obj_t self, mp_obj_t block_num, mp_obj_t data) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(data, &bufinfo, MP_BUFFER_READ); - if (bufinfo.len % SDCARD_BLOCK_SIZE != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "writes must be a multiple of %d bytes", SDCARD_BLOCK_SIZE)); - } - - mp_uint_t ret = sdcard_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - - if (ret != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "sdcard_write_blocks failed [%u]", ret)); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(sd_write_obj, sd_write); - -STATIC mp_obj_t pyb_sdcard_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = sdcard_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - return mp_obj_new_bool(ret == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_readblocks_obj, pyb_sdcard_readblocks); - -STATIC mp_obj_t pyb_sdcard_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = sdcard_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / SDCARD_BLOCK_SIZE); - return mp_obj_new_bool(ret == 0); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_writeblocks_obj, pyb_sdcard_writeblocks); - -STATIC mp_obj_t pyb_sdcard_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: - if (!sdcard_power_on()) { - return MP_OBJ_NEW_SMALL_INT(-1); // error - } - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_DEINIT: - sdcard_power_off(); - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SYNC: - // nothing to do - return MP_OBJ_NEW_SMALL_INT(0); // success - - case BP_IOCTL_SEC_COUNT: - return MP_OBJ_NEW_SMALL_INT(0); // TODO - - case BP_IOCTL_SEC_SIZE: - return MP_OBJ_NEW_SMALL_INT(SDCARD_BLOCK_SIZE); - - default: // unknown command - return MP_OBJ_NEW_SMALL_INT(-1); // error - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_sdcard_ioctl_obj, pyb_sdcard_ioctl); - -STATIC const mp_rom_map_elem_t pyb_sdcard_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_present), MP_ROM_PTR(&sd_present_obj) }, - { MP_ROM_QSTR(MP_QSTR_power), MP_ROM_PTR(&sd_power_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&sd_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&sd_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&sd_write_obj) }, - // block device protocol - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_sdcard_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_sdcard_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_sdcard_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_sdcard_locals_dict, pyb_sdcard_locals_dict_table); - -const mp_obj_type_t pyb_sdcard_type = { - { &mp_type_type }, - .name = MP_QSTR_SDCard, - .make_new = pyb_sdcard_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_sdcard_locals_dict, -}; - -void sdcard_init_vfs(fs_user_mount_t *vfs, int part) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = part; - vfs->readblocks[0] = (mp_obj_t)&pyb_sdcard_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_sdcard_obj; - vfs->readblocks[2] = (mp_obj_t)sdcard_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_sdcard_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_sdcard_obj; - vfs->writeblocks[2] = (mp_obj_t)sdcard_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_sdcard_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_sdcard_obj; -} - -#endif // MICROPY_HW_HAS_SDCARD diff --git a/ports/stm32/sdcard.h b/ports/stm32/sdcard.h deleted file mode 100644 index 8c698fc2f7d8b..0000000000000 --- a/ports/stm32/sdcard.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_SDCARD_H -#define MICROPY_INCLUDED_STMHAL_SDCARD_H - -// this is a fixed size and should not be changed -#define SDCARD_BLOCK_SIZE (512) - -void sdcard_init(void); -bool sdcard_is_present(void); -bool sdcard_power_on(void); -void sdcard_power_off(void); -uint64_t sdcard_get_capacity_in_bytes(void); - -// these return 0 on success, non-zero on error -mp_uint_t sdcard_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t sdcard_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t pyb_sdcard_type; -extern const struct _mp_obj_base_t pyb_sdcard_obj; - -struct _fs_user_mount_t; -void sdcard_init_vfs(struct _fs_user_mount_t *vfs, int part); - -#endif // MICROPY_INCLUDED_STMHAL_SDCARD_H diff --git a/ports/stm32/servo.c b/ports/stm32/servo.c deleted file mode 100644 index 0e54b4d0af41e..0000000000000 --- a/ports/stm32/servo.c +++ /dev/null @@ -1,334 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "timer.h" -#include "servo.h" - -#if MICROPY_HW_ENABLE_SERVO - -// This file implements the pyb.Servo class which controls standard hobby servo -// motors that have 3-wires (ground, power, signal). -// -// The driver uses hardware PWM to drive servos on pins X1, X2, X3, X4 which are -// assumed to be on PA0, PA1, PA2, PA3 but not necessarily in that order (the -// pins PA0-PA3 are used directly if the X pins are not defined). -// -// TIM2 and TIM5 have CH1-CH4 on PA0-PA3 respectively. They are both 32-bit -// counters with 16-bit prescaler. TIM5 is used by this driver. - -#define PYB_SERVO_NUM (4) - -typedef struct _pyb_servo_obj_t { - mp_obj_base_t base; - const pin_obj_t *pin; - uint8_t pulse_min; // units of 10us - uint8_t pulse_max; // units of 10us - uint8_t pulse_centre; // units of 10us - uint8_t pulse_angle_90; // units of 10us; pulse at 90 degrees, minus pulse_centre - uint8_t pulse_speed_100; // units of 10us; pulse at 100% forward speed, minus pulse_centre - uint16_t pulse_cur; // units of 10us - uint16_t pulse_dest; // units of 10us - int16_t pulse_accum; - uint16_t time_left; -} pyb_servo_obj_t; - -STATIC pyb_servo_obj_t pyb_servo_obj[PYB_SERVO_NUM]; - -void servo_init(void) { - timer_tim5_init(); - - // reset servo objects - for (int i = 0; i < PYB_SERVO_NUM; i++) { - pyb_servo_obj[i].base.type = &pyb_servo_type; - pyb_servo_obj[i].pulse_min = 64; - pyb_servo_obj[i].pulse_max = 242; - pyb_servo_obj[i].pulse_centre = 150; - pyb_servo_obj[i].pulse_angle_90 = 97; - pyb_servo_obj[i].pulse_speed_100 = 70; - pyb_servo_obj[i].pulse_cur = 150; - pyb_servo_obj[i].pulse_dest = 0; - pyb_servo_obj[i].time_left = 0; - } - - // assign servo objects to specific pins (must be some permutation of PA0-PA3) - #ifdef pyb_pin_X1 - pyb_servo_obj[0].pin = &pyb_pin_X1; - pyb_servo_obj[1].pin = &pyb_pin_X2; - pyb_servo_obj[2].pin = &pyb_pin_X3; - pyb_servo_obj[3].pin = &pyb_pin_X4; - #else - pyb_servo_obj[0].pin = &pin_A0; - pyb_servo_obj[1].pin = &pin_A1; - pyb_servo_obj[2].pin = &pin_A2; - pyb_servo_obj[3].pin = &pin_A3; - #endif -} - -void servo_timer_irq_callback(void) { - bool need_it = false; - for (int i = 0; i < PYB_SERVO_NUM; i++) { - pyb_servo_obj_t *s = &pyb_servo_obj[i]; - if (s->pulse_cur != s->pulse_dest) { - // clamp pulse to within min/max - if (s->pulse_dest < s->pulse_min) { - s->pulse_dest = s->pulse_min; - } else if (s->pulse_dest > s->pulse_max) { - s->pulse_dest = s->pulse_max; - } - // adjust cur to get closer to dest - if (s->time_left <= 1) { - s->pulse_cur = s->pulse_dest; - s->time_left = 0; - } else { - s->pulse_accum += s->pulse_dest - s->pulse_cur; - s->pulse_cur += s->pulse_accum / s->time_left; - s->pulse_accum %= s->time_left; - s->time_left--; - need_it = true; - } - // set the pulse width - *(&TIM5->CCR1 + s->pin->pin) = s->pulse_cur; - } - } - if (need_it) { - __HAL_TIM_ENABLE_IT(&TIM5_Handle, TIM_IT_UPDATE); - } else { - __HAL_TIM_DISABLE_IT(&TIM5_Handle, TIM_IT_UPDATE); - } -} - -STATIC void servo_init_channel(pyb_servo_obj_t *s) { - static const uint8_t channel_table[4] = - {TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4}; - uint32_t channel = channel_table[s->pin->pin]; - - // GPIO configuration - mp_hal_pin_config(s->pin, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, GPIO_AF2_TIM5); - - // PWM mode configuration - TIM_OC_InitTypeDef oc_init; - oc_init.OCMode = TIM_OCMODE_PWM1; - oc_init.Pulse = s->pulse_cur; // units of 10us - oc_init.OCPolarity = TIM_OCPOLARITY_HIGH; - oc_init.OCFastMode = TIM_OCFAST_DISABLE; - HAL_TIM_PWM_ConfigChannel(&TIM5_Handle, &oc_init, channel); - - // start PWM - HAL_TIM_PWM_Start(&TIM5_Handle, channel); -} - -/******************************************************************************/ -// MicroPython bindings - -STATIC mp_obj_t pyb_servo_set(mp_obj_t port, mp_obj_t value) { - int p = mp_obj_get_int(port); - int v = mp_obj_get_int(value); - if (v < 50) { v = 50; } - if (v > 250) { v = 250; } - switch (p) { - case 1: TIM5->CCR1 = v; break; - case 2: TIM5->CCR2 = v; break; - case 3: TIM5->CCR3 = v; break; - case 4: TIM5->CCR4 = v; break; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_2(pyb_servo_set_obj, pyb_servo_set); - -STATIC mp_obj_t pyb_pwm_set(mp_obj_t period, mp_obj_t pulse) { - int pe = mp_obj_get_int(period); - int pu = mp_obj_get_int(pulse); - TIM5->ARR = pe; - TIM5->CCR3 = pu; - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_2(pyb_pwm_set_obj, pyb_pwm_set); - -STATIC void pyb_servo_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_servo_obj_t *self = self_in; - mp_printf(print, "", self - &pyb_servo_obj[0] + 1, 10 * self->pulse_cur); -} - -/// \classmethod \constructor(id) -/// Create a servo object. `id` is 1-4. -STATIC mp_obj_t pyb_servo_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get servo number - mp_int_t servo_id = mp_obj_get_int(args[0]) - 1; - - // check servo number - if (!(0 <= servo_id && servo_id < PYB_SERVO_NUM)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Servo(%d) doesn't exist", servo_id + 1)); - } - - // get and init servo object - pyb_servo_obj_t *s = &pyb_servo_obj[servo_id]; - s->pulse_dest = s->pulse_cur; - s->time_left = 0; - servo_init_channel(s); - - return s; -} - -/// \method pulse_width([value]) -/// Get or set the pulse width in milliseconds. -STATIC mp_obj_t pyb_servo_pulse_width(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get pulse width, in us - return mp_obj_new_int(10 * self->pulse_cur); - } else { - // set pulse width, in us - self->pulse_dest = mp_obj_get_int(args[1]) / 10; - self->time_left = 0; - servo_timer_irq_callback(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_pulse_width_obj, 1, 2, pyb_servo_pulse_width); - -/// \method calibration([pulse_min, pulse_max, pulse_centre, [pulse_angle_90, pulse_speed_100]]) -/// Get or set the calibration of the servo timing. -// TODO should accept 1 arg, a 5-tuple of values to set -STATIC mp_obj_t pyb_servo_calibration(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get calibration values - mp_obj_t tuple[5]; - tuple[0] = mp_obj_new_int(10 * self->pulse_min); - tuple[1] = mp_obj_new_int(10 * self->pulse_max); - tuple[2] = mp_obj_new_int(10 * self->pulse_centre); - tuple[3] = mp_obj_new_int(10 * (self->pulse_angle_90 + self->pulse_centre)); - tuple[4] = mp_obj_new_int(10 * (self->pulse_speed_100 + self->pulse_centre)); - return mp_obj_new_tuple(5, tuple); - } else if (n_args >= 4) { - // set min, max, centre - self->pulse_min = mp_obj_get_int(args[1]) / 10; - self->pulse_max = mp_obj_get_int(args[2]) / 10; - self->pulse_centre = mp_obj_get_int(args[3]) / 10; - if (n_args == 4) { - return mp_const_none; - } else if (n_args == 6) { - self->pulse_angle_90 = mp_obj_get_int(args[4]) / 10 - self->pulse_centre; - self->pulse_speed_100 = mp_obj_get_int(args[5]) / 10 - self->pulse_centre; - return mp_const_none; - } - } - - // bad number of arguments - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "calibration expecting 1, 4 or 6 arguments, got %d", n_args)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_calibration_obj, 1, 6, pyb_servo_calibration); - -/// \method angle([angle, time=0]) -/// Get or set the angle of the servo. -/// -/// - `angle` is the angle to move to in degrees. -/// - `time` is the number of milliseconds to take to get to the specified angle. -STATIC mp_obj_t pyb_servo_angle(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get angle - return mp_obj_new_int((self->pulse_cur - self->pulse_centre) * 90 / self->pulse_angle_90); - } else { -#if MICROPY_PY_BUILTINS_FLOAT - self->pulse_dest = self->pulse_centre + self->pulse_angle_90 * mp_obj_get_float(args[1]) / 90.0; -#else - self->pulse_dest = self->pulse_centre + self->pulse_angle_90 * mp_obj_get_int(args[1]) / 90; -#endif - if (n_args == 2) { - // set angle immediately - self->time_left = 0; - } else { - // set angle over a given time (given in milli seconds) - self->time_left = mp_obj_get_int(args[2]) / 20; - self->pulse_accum = 0; - } - servo_timer_irq_callback(); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_angle_obj, 1, 3, pyb_servo_angle); - -/// \method speed([speed, time=0]) -/// Get or set the speed of a continuous rotation servo. -/// -/// - `speed` is the speed to move to change to, between -100 and 100. -/// - `time` is the number of milliseconds to take to get to the specified speed. -STATIC mp_obj_t pyb_servo_speed(size_t n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get speed - return mp_obj_new_int((self->pulse_cur - self->pulse_centre) * 100 / self->pulse_speed_100); - } else { -#if MICROPY_PY_BUILTINS_FLOAT - self->pulse_dest = self->pulse_centre + self->pulse_speed_100 * mp_obj_get_float(args[1]) / 100.0; -#else - self->pulse_dest = self->pulse_centre + self->pulse_speed_100 * mp_obj_get_int(args[1]) / 100; -#endif - if (n_args == 2) { - // set speed immediately - self->time_left = 0; - } else { - // set speed over a given time (given in milli seconds) - self->time_left = mp_obj_get_int(args[2]) / 20; - self->pulse_accum = 0; - } - servo_timer_irq_callback(); - return mp_const_none; - } -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_servo_speed_obj, 1, 3, pyb_servo_speed); - -STATIC const mp_rom_map_elem_t pyb_servo_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_servo_pulse_width_obj) }, - { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&pyb_servo_calibration_obj) }, - { MP_ROM_QSTR(MP_QSTR_angle), MP_ROM_PTR(&pyb_servo_angle_obj) }, - { MP_ROM_QSTR(MP_QSTR_speed), MP_ROM_PTR(&pyb_servo_speed_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_servo_locals_dict, pyb_servo_locals_dict_table); - -const mp_obj_type_t pyb_servo_type = { - { &mp_type_type }, - .name = MP_QSTR_Servo, - .print = pyb_servo_print, - .make_new = pyb_servo_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_servo_locals_dict, -}; - -#endif // MICROPY_HW_ENABLE_SERVO diff --git a/ports/stm32/servo.h b/ports/stm32/servo.h deleted file mode 100644 index c602a07da5ecf..0000000000000 --- a/ports/stm32/servo.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_SERVO_H -#define MICROPY_INCLUDED_STMHAL_SERVO_H - -void servo_init(void); -void servo_timer_irq_callback(void); - -extern const mp_obj_type_t pyb_servo_type; - -MP_DECLARE_CONST_FUN_OBJ_2(pyb_servo_set_obj); -MP_DECLARE_CONST_FUN_OBJ_2(pyb_pwm_set_obj); - -#endif // MICROPY_INCLUDED_STMHAL_SERVO_H diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c deleted file mode 100644 index cfd9c2667f866..0000000000000 --- a/ports/stm32/spi.c +++ /dev/null @@ -1,955 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/machine_spi.h" -#include "irq.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "bufhelper.h" -#include "dma.h" -#include "spi.h" - -/// \moduleref pyb -/// \class SPI - a master-driven serial protocol -/// -/// SPI is a serial protocol that is driven by a master. At the physical level -/// there are 3 lines: SCK, MOSI, MISO. -/// -/// See usage model of I2C; SPI is very similar. Main difference is -/// parameters to init the SPI bus: -/// -/// from pyb import SPI -/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7) -/// -/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be -/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1 -/// to sample data on the first or second clock edge respectively. Crc can be -/// None for no CRC, or a polynomial specifier. -/// -/// Additional method for SPI: -/// -/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes -/// buf = bytearray(4) -/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf -/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf - -// Possible DMA configurations for SPI busses: -// SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3 -// SPI1_RX: DMA2_Stream0.CHANNEL_3 or DMA2_Stream2.CHANNEL_3 -// SPI2_TX: DMA1_Stream4.CHANNEL_0 -// SPI2_RX: DMA1_Stream3.CHANNEL_0 -// SPI3_TX: DMA1_Stream5.CHANNEL_0 or DMA1_Stream7.CHANNEL_0 -// SPI3_RX: DMA1_Stream0.CHANNEL_0 or DMA1_Stream2.CHANNEL_0 -// SPI4_TX: DMA2_Stream4.CHANNEL_5 or DMA2_Stream1.CHANNEL_4 -// SPI4_RX: DMA2_Stream3.CHANNEL_5 or DMA2_Stream0.CHANNEL_4 -// SPI5_TX: DMA2_Stream4.CHANNEL_2 or DMA2_Stream6.CHANNEL_7 -// SPI5_RX: DMA2_Stream3.CHANNEL_2 or DMA2_Stream5.CHANNEL_7 -// SPI6_TX: DMA2_Stream5.CHANNEL_1 -// SPI6_RX: DMA2_Stream6.CHANNEL_1 - -typedef struct _pyb_spi_obj_t { - mp_obj_base_t base; - SPI_HandleTypeDef *spi; - const dma_descr_t *tx_dma_descr; - const dma_descr_t *rx_dma_descr; -} pyb_spi_obj_t; - -#if defined(MICROPY_HW_SPI1_SCK) -SPI_HandleTypeDef SPIHandle1 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI2_SCK) -SPI_HandleTypeDef SPIHandle2 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI3_SCK) -SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI4_SCK) -SPI_HandleTypeDef SPIHandle4 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI5_SCK) -SPI_HandleTypeDef SPIHandle5 = {.Instance = NULL}; -#endif -#if defined(MICROPY_HW_SPI6_SCK) -SPI_HandleTypeDef SPIHandle6 = {.Instance = NULL}; -#endif - -STATIC const pyb_spi_obj_t pyb_spi_obj[] = { - #if defined(MICROPY_HW_SPI1_SCK) - {{&pyb_spi_type}, &SPIHandle1, &dma_SPI_1_TX, &dma_SPI_1_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI2_SCK) - {{&pyb_spi_type}, &SPIHandle2, &dma_SPI_2_TX, &dma_SPI_2_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI3_SCK) - {{&pyb_spi_type}, &SPIHandle3, &dma_SPI_3_TX, &dma_SPI_3_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI4_SCK) - {{&pyb_spi_type}, &SPIHandle4, &dma_SPI_4_TX, &dma_SPI_4_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI5_SCK) - {{&pyb_spi_type}, &SPIHandle5, &dma_SPI_5_TX, &dma_SPI_5_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif - #if defined(MICROPY_HW_SPI6_SCK) - {{&pyb_spi_type}, &SPIHandle6, &dma_SPI_6_TX, &dma_SPI_6_RX}, - #else - {{&pyb_spi_type}, NULL, NULL, NULL}, - #endif -}; - -void spi_init0(void) { - // reset the SPI handles - #if defined(MICROPY_HW_SPI1_SCK) - memset(&SPIHandle1, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle1.Instance = SPI1; - #endif - #if defined(MICROPY_HW_SPI2_SCK) - memset(&SPIHandle2, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle2.Instance = SPI2; - #endif - #if defined(MICROPY_HW_SPI3_SCK) - memset(&SPIHandle3, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle3.Instance = SPI3; - #endif - #if defined(MICROPY_HW_SPI4_SCK) - memset(&SPIHandle4, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle4.Instance = SPI4; - #endif - #if defined(MICROPY_HW_SPI5_SCK) - memset(&SPIHandle5, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle5.Instance = SPI5; - #endif - #if defined(MICROPY_HW_SPI6_SCK) - memset(&SPIHandle6, 0, sizeof(SPI_HandleTypeDef)); - SPIHandle6.Instance = SPI6; - #endif -} - -STATIC int spi_find(mp_obj_t id) { - if (MP_OBJ_IS_STR(id)) { - // given a string id - const char *port = mp_obj_str_get_str(id); - if (0) { - #ifdef MICROPY_HW_SPI1_NAME - } else if (strcmp(port, MICROPY_HW_SPI1_NAME) == 0) { - return 1; - #endif - #ifdef MICROPY_HW_SPI2_NAME - } else if (strcmp(port, MICROPY_HW_SPI2_NAME) == 0) { - return 2; - #endif - #ifdef MICROPY_HW_SPI3_NAME - } else if (strcmp(port, MICROPY_HW_SPI3_NAME) == 0) { - return 3; - #endif - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%s) doesn't exist", port)); - } else { - // given an integer id - int spi_id = mp_obj_get_int(id); - if (spi_id >= 1 && spi_id <= MP_ARRAY_SIZE(pyb_spi_obj) - && pyb_spi_obj[spi_id - 1].spi != NULL) { - return spi_id; - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "SPI(%d) doesn't exist", spi_id)); - } -} - -// sets the parameters in the SPI_InitTypeDef struct -// if an argument is -1 then the corresponding parameter is not changed -STATIC void spi_set_params(SPI_HandleTypeDef *spi, uint32_t prescale, int32_t baudrate, - int32_t polarity, int32_t phase, int32_t bits, int32_t firstbit) { - SPI_InitTypeDef *init = &spi->Init; - - if (prescale != 0xffffffff || baudrate != -1) { - if (prescale == 0xffffffff) { - // prescaler not given, so select one that yields at most the requested baudrate - mp_uint_t spi_clock; - if (spi->Instance == SPI2 || spi->Instance == SPI3) { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } else { - // SPI1, SPI4, SPI5 and SPI6 are on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } - prescale = spi_clock / baudrate; - } - if (prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; } - else if (prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; } - else if (prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; } - else if (prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; } - else if (prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; } - else if (prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; } - else if (prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; } - else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; } - } - - if (polarity != -1) { - init->CLKPolarity = polarity == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH; - } - - if (phase != -1) { - init->CLKPhase = phase == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE; - } - - if (bits != -1) { - init->DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT; - } - - if (firstbit != -1) { - init->FirstBit = firstbit; - } -} - -// TODO allow to take a list of pins to use -void spi_init(SPI_HandleTypeDef *spi, bool enable_nss_pin) { - const pyb_spi_obj_t *self; - const pin_obj_t *pins[4]; - pins[0] = NULL; - - if (0) { - #if defined(MICROPY_HW_SPI1_SCK) - } else if (spi->Instance == SPI1) { - self = &pyb_spi_obj[0]; - #if defined(MICROPY_HW_SPI1_NSS) - pins[0] = &MICROPY_HW_SPI1_NSS; - #endif - pins[1] = &MICROPY_HW_SPI1_SCK; - pins[2] = &MICROPY_HW_SPI1_MISO; - pins[3] = &MICROPY_HW_SPI1_MOSI; - // enable the SPI clock - __SPI1_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI2_SCK) - } else if (spi->Instance == SPI2) { - self = &pyb_spi_obj[1]; - #if defined(MICROPY_HW_SPI2_NSS) - pins[0] = &MICROPY_HW_SPI2_NSS; - #endif - pins[1] = &MICROPY_HW_SPI2_SCK; - pins[2] = &MICROPY_HW_SPI2_MISO; - pins[3] = &MICROPY_HW_SPI2_MOSI; - // enable the SPI clock - __SPI2_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI3_SCK) - } else if (spi->Instance == SPI3) { - self = &pyb_spi_obj[2]; - #if defined(MICROPY_HW_SPI3_NSS) - pins[0] = &MICROPY_HW_SPI3_NSS; - #endif - pins[1] = &MICROPY_HW_SPI3_SCK; - pins[2] = &MICROPY_HW_SPI3_MISO; - pins[3] = &MICROPY_HW_SPI3_MOSI; - // enable the SPI clock - __SPI3_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI4_SCK) - } else if (spi->Instance == SPI4) { - self = &pyb_spi_obj[3]; - #if defined(MICROPY_HW_SPI4_NSS) - pins[0] = &MICROPY_HW_SPI4_NSS; - #endif - pins[1] = &MICROPY_HW_SPI4_SCK; - pins[2] = &MICROPY_HW_SPI4_MISO; - pins[3] = &MICROPY_HW_SPI4_MOSI; - // enable the SPI clock - __SPI4_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI5_SCK) - } else if (spi->Instance == SPI5) { - self = &pyb_spi_obj[4]; - #if defined(MICROPY_HW_SPI5_NSS) - pins[0] = &MICROPY_HW_SPI5_NSS; - #endif - pins[1] = &MICROPY_HW_SPI5_SCK; - pins[2] = &MICROPY_HW_SPI5_MISO; - pins[3] = &MICROPY_HW_SPI5_MOSI; - // enable the SPI clock - __SPI5_CLK_ENABLE(); - #endif - #if defined(MICROPY_HW_SPI6_SCK) - } else if (spi->Instance == SPI6) { - self = &pyb_spi_obj[5]; - #if defined(MICROPY_HW_SPI6_NSS) - pins[0] = &MICROPY_HW_SPI6_NSS; - #endif - pins[1] = &MICROPY_HW_SPI6_SCK; - pins[2] = &MICROPY_HW_SPI6_MISO; - pins[3] = &MICROPY_HW_SPI6_MOSI; - // enable the SPI clock - __SPI6_CLK_ENABLE(); - #endif - } else { - // SPI does not exist for this board (shouldn't get here, should be checked by caller) - return; - } - - // init the GPIO lines - uint32_t mode = MP_HAL_PIN_MODE_ALT; - uint32_t pull = spi->Init.CLKPolarity == SPI_POLARITY_LOW ? MP_HAL_PIN_PULL_DOWN : MP_HAL_PIN_PULL_UP; - for (uint i = (enable_nss_pin && pins[0] ? 0 : 1); i < 4; i++) { - mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_SPI, (self - &pyb_spi_obj[0]) + 1); - } - - // init the SPI device - if (HAL_SPI_Init(spi) != HAL_OK) { - // init error - // TODO should raise an exception, but this function is not necessarily going to be - // called via Python, so may not be properly wrapped in an NLR handler - printf("OSError: HAL_SPI_Init failed\n"); - return; - } - - // After calling HAL_SPI_Init() it seems that the DMA gets disconnected if - // it was previously configured. So we invalidate the DMA channel to force - // an initialisation the next time we use it. - dma_invalidate_channel(self->tx_dma_descr); - dma_invalidate_channel(self->rx_dma_descr); -} - -void spi_deinit(SPI_HandleTypeDef *spi) { - HAL_SPI_DeInit(spi); - if (0) { - #if defined(MICROPY_HW_SPI1_SCK) - } else if (spi->Instance == SPI1) { - __SPI1_FORCE_RESET(); - __SPI1_RELEASE_RESET(); - __SPI1_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI2_SCK) - } else if (spi->Instance == SPI2) { - __SPI2_FORCE_RESET(); - __SPI2_RELEASE_RESET(); - __SPI2_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI3_SCK) - } else if (spi->Instance == SPI3) { - __SPI3_FORCE_RESET(); - __SPI3_RELEASE_RESET(); - __SPI3_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI4_SCK) - } else if (spi->Instance == SPI4) { - __SPI4_FORCE_RESET(); - __SPI4_RELEASE_RESET(); - __SPI4_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI5_SCK) - } else if (spi->Instance == SPI5) { - __SPI5_FORCE_RESET(); - __SPI5_RELEASE_RESET(); - __SPI5_CLK_DISABLE(); - #endif - #if defined(MICROPY_HW_SPI6_SCK) - } else if (spi->Instance == SPI6) { - __SPI6_FORCE_RESET(); - __SPI6_RELEASE_RESET(); - __SPI6_CLK_DISABLE(); - #endif - } -} - -STATIC HAL_StatusTypeDef spi_wait_dma_finished(SPI_HandleTypeDef *spi, uint32_t timeout) { - // Note: we can't use WFI to idle in this loop because the DMA completion - // interrupt may occur before the WFI. Hence we miss it and have to wait - // until the next sys-tick (up to 1ms). - uint32_t start = HAL_GetTick(); - while (HAL_SPI_GetState(spi) != HAL_SPI_STATE_READY) { - if (HAL_GetTick() - start >= timeout) { - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -// A transfer of "len" bytes should take len*8*1000/baudrate milliseconds. -// To simplify the calculation we assume the baudrate is never less than 8kHz -// and use that value for the baudrate in the formula, plus a small constant. -#define SPI_TRANSFER_TIMEOUT(len) ((len) + 100) - -STATIC void spi_transfer(const pyb_spi_obj_t *self, size_t len, const uint8_t *src, uint8_t *dest, uint32_t timeout) { - // Note: there seems to be a problem sending 1 byte using DMA the first - // time directly after the SPI/DMA is initialised. The cause of this is - // unknown but we sidestep the issue by using polling for 1 byte transfer. - - HAL_StatusTypeDef status; - - if (dest == NULL) { - // send only - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_Transmit(self->spi, (uint8_t*)src, len, timeout); - } else { - DMA_HandleTypeDef tx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - self->spi->hdmarx = NULL; - MP_HAL_CLEAN_DCACHE(src, len); - status = HAL_SPI_Transmit_DMA(self->spi, (uint8_t*)src, len); - if (status == HAL_OK) { - status = spi_wait_dma_finished(self->spi, timeout); - } - dma_deinit(self->tx_dma_descr); - } - } else if (src == NULL) { - // receive only - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_Receive(self->spi, dest, len, timeout); - } else { - DMA_HandleTypeDef tx_dma, rx_dma; - if (self->spi->Init.Mode == SPI_MODE_MASTER) { - // in master mode the HAL actually does a TransmitReceive call - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - } else { - self->spi->hdmatx = NULL; - } - dma_init(&rx_dma, self->rx_dma_descr, self->spi); - self->spi->hdmarx = &rx_dma; - MP_HAL_CLEANINVALIDATE_DCACHE(dest, len); - status = HAL_SPI_Receive_DMA(self->spi, dest, len); - if (status == HAL_OK) { - status = spi_wait_dma_finished(self->spi, timeout); - } - if (self->spi->hdmatx != NULL) { - dma_deinit(self->tx_dma_descr); - } - dma_deinit(self->rx_dma_descr); - } - } else { - // send and receive - if (len == 1 || query_irq() == IRQ_STATE_DISABLED) { - status = HAL_SPI_TransmitReceive(self->spi, (uint8_t*)src, dest, len, timeout); - } else { - DMA_HandleTypeDef tx_dma, rx_dma; - dma_init(&tx_dma, self->tx_dma_descr, self->spi); - self->spi->hdmatx = &tx_dma; - dma_init(&rx_dma, self->rx_dma_descr, self->spi); - self->spi->hdmarx = &rx_dma; - MP_HAL_CLEAN_DCACHE(src, len); - MP_HAL_CLEANINVALIDATE_DCACHE(dest, len); - status = HAL_SPI_TransmitReceive_DMA(self->spi, (uint8_t*)src, dest, len); - if (status == HAL_OK) { - status = spi_wait_dma_finished(self->spi, timeout); - } - dma_deinit(self->tx_dma_descr); - dma_deinit(self->rx_dma_descr); - } - } - - if (status != HAL_OK) { - mp_hal_raise(status); - } -} - -STATIC void spi_print(const mp_print_t *print, SPI_HandleTypeDef *spi, bool legacy) { - uint spi_num = 1; // default to SPI1 - if (spi->Instance == SPI2) { spi_num = 2; } - else if (spi->Instance == SPI3) { spi_num = 3; } - #if defined(SPI4) - else if (spi->Instance == SPI4) { spi_num = 4; } - #endif - #if defined(SPI5) - else if (spi->Instance == SPI5) { spi_num = 5; } - #endif - #if defined(SPI6) - else if (spi->Instance == SPI6) { spi_num = 6; } - #endif - - mp_printf(print, "SPI(%u", spi_num); - if (spi->State != HAL_SPI_STATE_RESET) { - if (spi->Init.Mode == SPI_MODE_MASTER) { - // compute baudrate - uint spi_clock; - if (spi->Instance == SPI2 || spi->Instance == SPI3) { - // SPI2 and SPI3 are on APB1 - spi_clock = HAL_RCC_GetPCLK1Freq(); - } else { - // SPI1, SPI4, SPI5 and SPI6 are on APB2 - spi_clock = HAL_RCC_GetPCLK2Freq(); - } - uint log_prescaler = (spi->Init.BaudRatePrescaler >> 3) + 1; - uint baudrate = spi_clock >> log_prescaler; - if (legacy) { - mp_printf(print, ", SPI.MASTER"); - } - mp_printf(print, ", baudrate=%u", baudrate); - if (legacy) { - mp_printf(print, ", prescaler=%u", 1 << log_prescaler); - } - } else { - mp_printf(print, ", SPI.SLAVE"); - } - mp_printf(print, ", polarity=%u, phase=%u, bits=%u", spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16); - if (spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) { - mp_printf(print, ", crc=0x%x", spi->Init.CRCPolynomial); - } - } - mp_print_str(print, ")"); -} - -/******************************************************************************/ -/* MicroPython bindings for legacy pyb API */ - -SPI_HandleTypeDef *spi_get_handle(mp_obj_t o) { - if (!MP_OBJ_IS_TYPE(o, &pyb_spi_type)) { - mp_raise_ValueError("expecting an SPI object"); - } - pyb_spi_obj_t *self = o; - return self->spi; -} - -STATIC void pyb_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_spi_obj_t *self = self_in; - spi_print(print, self->spi, true); -} - -/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None) -/// -/// Initialise the SPI bus with the given parameters: -/// -/// - `mode` must be either `SPI.MASTER` or `SPI.SLAVE`. -/// - `baudrate` is the SCK clock rate (only sensible for a master). -STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} }, - { MP_QSTR_ti, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_crc, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the SPI configuration values - SPI_InitTypeDef *init = &self->spi->Init; - init->Mode = args[0].u_int; - - spi_set_params(self->spi, args[2].u_int, args[1].u_int, args[3].u_int, args[4].u_int, - args[6].u_int, args[8].u_int); - - init->Direction = args[5].u_int; - init->NSS = args[7].u_int; - init->TIMode = args[9].u_bool ? SPI_TIMODE_ENABLED : SPI_TIMODE_DISABLED; - if (args[10].u_obj == mp_const_none) { - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 0; - } else { - init->CRCCalculation = SPI_CRCCALCULATION_ENABLED; - init->CRCPolynomial = mp_obj_get_int(args[10].u_obj); - } - - // init the SPI bus - spi_init(self->spi, init->NSS != SPI_NSS_SOFT); - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct an SPI object on the given bus. `bus` can be 1 or 2. -/// With no additional parameters, the SPI object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the SPI busses are: -/// -/// - `SPI(1)` is on the X position: `(NSS, SCK, MISO, MOSI) = (X5, X6, X7, X8) = (PA4, PA5, PA6, PA7)` -/// - `SPI(2)` is on the Y position: `(NSS, SCK, MISO, MOSI) = (Y5, Y6, Y7, Y8) = (PB12, PB13, PB14, PB15)` -/// -/// At the moment, the NSS pin is not used by the SPI driver and is free -/// for other use. -STATIC mp_obj_t pyb_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out SPI bus - int spi_id = spi_find(args[0]); - - // get SPI object - const pyb_spi_obj_t *spi_obj = &pyb_spi_obj[spi_id - 1]; - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_spi_init_helper(spi_obj, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)spi_obj; -} - -STATIC mp_obj_t pyb_spi_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_spi_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init); - -/// \method deinit() -/// Turn off the SPI bus. -STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) { - pyb_spi_obj_t *self = self_in; - spi_deinit(self->spi); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit); - -/// \method send(send, *, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC mp_obj_t pyb_spi_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data); - - // send the data - spi_transfer(self, bufinfo.len, bufinfo.buf, NULL, args[1].u_int); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_obj, 1, pyb_spi_send); - -/// \method recv(recv, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -STATIC mp_obj_t pyb_spi_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr); - - // receive the data - spi_transfer(self, vstr.len, NULL, (uint8_t*)vstr.buf, args[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_recv_obj, 1, pyb_spi_recv); - -/// \method send_recv(send, recv=None, *, timeout=5000) -/// -/// Send and receive data on the bus at the same time: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `recv` is a mutable buffer which will be filled with received bytes. -/// It can be the same as `send`, or omitted. If omitted, a new buffer will -/// be created. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: the buffer with the received bytes. -STATIC mp_obj_t pyb_spi_send_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - static const mp_arg_t allowed_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_recv, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_spi_obj_t *self = pos_args[0]; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get buffers to send from/receive to - mp_buffer_info_t bufinfo_send; - uint8_t data_send[1]; - mp_buffer_info_t bufinfo_recv; - vstr_t vstr_recv; - mp_obj_t o_ret; - - if (args[0].u_obj == args[1].u_obj) { - // same object for send and receive, it must be a r/w buffer - mp_get_buffer_raise(args[0].u_obj, &bufinfo_send, MP_BUFFER_RW); - bufinfo_recv = bufinfo_send; - o_ret = args[0].u_obj; - } else { - // get the buffer to send from - pyb_buf_get_for_send(args[0].u_obj, &bufinfo_send, data_send); - - // get the buffer to receive into - if (args[1].u_obj == MP_OBJ_NULL) { - // only send argument given, so create a fresh buffer of the send length - vstr_init_len(&vstr_recv, bufinfo_send.len); - bufinfo_recv.len = vstr_recv.len; - bufinfo_recv.buf = vstr_recv.buf; - o_ret = MP_OBJ_NULL; - } else { - // recv argument given - mp_get_buffer_raise(args[1].u_obj, &bufinfo_recv, MP_BUFFER_WRITE); - if (bufinfo_recv.len != bufinfo_send.len) { - mp_raise_ValueError("recv must be same length as send"); - } - o_ret = args[1].u_obj; - } - } - - // do the transfer - spi_transfer(self, bufinfo_send.len, bufinfo_send.buf, bufinfo_recv.buf, args[2].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return o_ret; - } else { - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr_recv); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_recv_obj, 1, pyb_spi_send_recv); - -STATIC const mp_rom_map_elem_t pyb_spi_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_spi_deinit_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) }, - - // legacy methods - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_spi_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_spi_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_send_recv), MP_ROM_PTR(&pyb_spi_send_recv_obj) }, - - // class constants - /// \constant MASTER - for initialising the bus to master mode - /// \constant SLAVE - for initialising the bus to slave mode - /// \constant MSB - set the first bit to MSB - /// \constant LSB - set the first bit to LSB - { MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(SPI_MODE_MASTER) }, - { MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(SPI_MODE_SLAVE) }, - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(SPI_FIRSTBIT_MSB) }, - { MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(SPI_FIRSTBIT_LSB) }, - /* TODO - { MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES ((uint32_t)0x00000000) - { MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY - { MP_ROM_QSTR(MP_QSTR_DIRECTION_1LINE SPI_CR1_BIDIMODE - { MP_ROM_QSTR(MP_QSTR_NSS_SOFT SPI_CR1_SSM - { MP_ROM_QSTR(MP_QSTR_NSS_HARD_INPUT ((uint32_t)0x00000000) - { MP_ROM_QSTR(MP_QSTR_NSS_HARD_OUTPUT ((uint32_t)0x00040000) - */ -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table); - -STATIC void spi_transfer_machine(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - spi_transfer((pyb_spi_obj_t*)self_in, len, src, dest, SPI_TRANSFER_TIMEOUT(len)); -} - -STATIC const mp_machine_spi_p_t pyb_spi_p = { - .transfer = spi_transfer_machine, -}; - -const mp_obj_type_t pyb_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = pyb_spi_print, - .make_new = pyb_spi_make_new, - .protocol = &pyb_spi_p, - .locals_dict = (mp_obj_dict_t*)&pyb_spi_locals_dict, -}; - -/******************************************************************************/ -// Implementation of hard SPI for machine module - -typedef struct _machine_hard_spi_obj_t { - mp_obj_base_t base; - const pyb_spi_obj_t *pyb; -} machine_hard_spi_obj_t; - -STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = { - {{&machine_hard_spi_type}, &pyb_spi_obj[0]}, - {{&machine_hard_spi_type}, &pyb_spi_obj[1]}, - {{&machine_hard_spi_type}, &pyb_spi_obj[2]}, - {{&machine_hard_spi_type}, &pyb_spi_obj[3]}, - {{&machine_hard_spi_type}, &pyb_spi_obj[4]}, - {{&machine_hard_spi_type}, &pyb_spi_obj[5]}, -}; - -STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_print(print, self->pyb->spi, false); -} - -mp_obj_t machine_hard_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get static peripheral object - int spi_id = spi_find(args[ARG_id].u_obj); - const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id - 1]; - - // here we would check the sck/mosi/miso pins and configure them, but it's not implemented - if (args[ARG_sck].u_obj != MP_OBJ_NULL - || args[ARG_mosi].u_obj != MP_OBJ_NULL - || args[ARG_miso].u_obj != MP_OBJ_NULL) { - mp_raise_ValueError("explicit choice of sck/mosi/miso is not implemented"); - } - - // set the SPI configuration values - SPI_InitTypeDef *init = &self->pyb->spi->Init; - init->Mode = SPI_MODE_MASTER; - - // these parameters are not currently configurable - init->Direction = SPI_DIRECTION_2LINES; - init->NSS = SPI_NSS_SOFT; - init->TIMode = SPI_TIMODE_DISABLED; - init->CRCCalculation = SPI_CRCCALCULATION_DISABLED; - init->CRCPolynomial = 0; - - // set configurable paramaters - spi_set_params(self->pyb->spi, 0xffffffff, args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int, - args[ARG_firstbit].u_int); - - // init the SPI bus - spi_init(self->pyb->spi, false); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC void machine_hard_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - - enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the SPI configuration values - spi_set_params(self->pyb->spi, 0xffffffff, args[ARG_baudrate].u_int, - args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int, - args[ARG_firstbit].u_int); - - // re-init the SPI bus - spi_init(self->pyb->spi, false); -} - -STATIC void machine_hard_spi_deinit(mp_obj_base_t *self_in) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_deinit(self->pyb->spi); -} - -STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in; - spi_transfer(self->pyb, len, src, dest, SPI_TRANSFER_TIMEOUT(len)); -} - -STATIC const mp_machine_spi_p_t machine_hard_spi_p = { - .init = machine_hard_spi_init, - .deinit = machine_hard_spi_deinit, - .transfer = machine_hard_spi_transfer, -}; - -const mp_obj_type_t machine_hard_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SPI, - .print = machine_hard_spi_print, - .make_new = mp_machine_spi_make_new, // delegate to master constructor - .protocol = &machine_hard_spi_p, - .locals_dict = (mp_obj_t)&mp_machine_spi_locals_dict, -}; diff --git a/ports/stm32/spi.h b/ports/stm32/spi.h deleted file mode 100644 index eda109a7ef2a3..0000000000000 --- a/ports/stm32/spi.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_SPI_H -#define MICROPY_INCLUDED_STMHAL_SPI_H - -extern SPI_HandleTypeDef SPIHandle1; -extern SPI_HandleTypeDef SPIHandle2; -extern SPI_HandleTypeDef SPIHandle3; -extern SPI_HandleTypeDef SPIHandle4; -extern SPI_HandleTypeDef SPIHandle5; -extern SPI_HandleTypeDef SPIHandle6; -extern const mp_obj_type_t pyb_spi_type; -extern const mp_obj_type_t machine_soft_spi_type; -extern const mp_obj_type_t machine_hard_spi_type; - -void spi_init0(void); -void spi_init(SPI_HandleTypeDef *spi, bool enable_nss_pin); -SPI_HandleTypeDef *spi_get_handle(mp_obj_t o); - -#endif // MICROPY_INCLUDED_STMHAL_SPI_H diff --git a/ports/stm32/startup_stm32.S b/ports/stm32/startup_stm32.S deleted file mode 100644 index a688cd067390b..0000000000000 --- a/ports/stm32/startup_stm32.S +++ /dev/null @@ -1,822 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32.S - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief STM32Fxxxxx Devices vector table for Atollic TrueSTUDIO toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4/M7 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified -#if defined(MCU_SERIES_F7) - .cpu cortex-m7 -#elif defined(MCU_SERIES_F4) || defined(MCU_SERIES_L4) - .cpu cortex-m4 -#else - #error "Unknown MCU Series" -#endif - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system initialization function.*/ - bl SystemInit -/* Call static constructors */ - /*bl __libc_init_array*/ -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M4/M7. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ -#if defined(MCU_SERIES_L4) - .word PVD_PVM_IRQHandler /* PVD and PVM through EXTI line detection */ -#else - .word PVD_IRQHandler /* PVD through EXTI Line detection */ -#endif - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ -#if defined(MCU_SERIES_L4) - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .word ADC1_2_IRQHandler /* ADC1 and ADC2 */ -#else - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ -#endif - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ -#if defined(MCU_SERIES_L4) - .word TIM1_BRK_TIM15_IRQHandler /* TIM1 Break and TIM15 */ - .word TIM1_UP_TIM16_IRQHandler /* TIM1 Update and TIM16 */ - .word TIM1_TRG_COM_TIM17_IRQHandler /* TIM1 Trigger and Commutation and TIM17 */ -#else - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ -#endif - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ -#if defined(MCU_SERIES_L4) - .word DFSDM3_IRQHandler /* Digital filter for sigma delta modulator 3 */ - .word TIM8_BRK_IRQHandler /* TIM8 Break */ - .word TIM8_UP_IRQHandler /* TIM8 Update */ - .word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ -#else - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ -#endif - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ -#if defined(MCU_SERIES_L4) - .word ADC3_IRQHandler /* ADC3 global interrupt */ -#else - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ -#endif -#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - .word FMC_IRQHandler /* FMC */ - .word SDMMC1_IRQHandler /* SDMMC1 */ -#else - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ -#endif - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ -#if defined(MCU_SERIES_L4) - .word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .word DFSDM0_IRQHandler /* Digital filter for sigma delta modulator 0 */ - .word DFSDM1_IRQHandler /* Digital filter for sigma delta modulator 1 */ - .word DFSDM2_IRQHandler /* Digital filter for sigma delta modulator 2 */ - .word COMP_IRQHandler /* Comporator thru EXTI line */ - .word LPTIM1_IRQHandler /* Low power timer 1 */ - .word LPTIM2_IRQHandler /* Low power timer 2 */ -#else - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ -#endif - .word OTG_FS_IRQHandler /* USB OTG FS */ -#if defined(MCU_SERIES_L4) - .word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .word LPUART1_IRQHandler /* Low power UART */ - .word QUADSPI_IRQHandler /* Quad SPI */ -#else - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ -#endif - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ -#if defined(MCU_SERIES_L4) - .word SAI1_IRQHandler /* Serial audio interface 1 */ - .word SAI2_IRQHandler /* Serial audio interface 2 */ - .word SWPMI1_IRQHandler /* Single wire protocole 1 */ - .word TSC_IRQHandler /* Touch sensig controller */ - .word LCD_IRQHandler /* LCD */ -#else - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ -#endif - .word 0 /* CRYP crypto */ -#if defined(MCU_SERIES_L4) - .word RNG_IRQHandler /* Random number generator */ -#else - .word HASH_RNG_IRQHandler /* Hash and Rng */ -#endif - .word FPU_IRQHandler /* FPU */ - -#if defined(MCU_SERIES_F7) - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - .word SPI4_IRQHandler /* SPI4 */ - .word SPI5_IRQHandler /* SPI5 */ - .word SPI6_IRQHandler /* SPI6 */ - .word SAI1_IRQHandler /* SAI1 */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word DMA2D_IRQHandler /* DMA2D */ - .word SAI2_IRQHandler /* SAI2 */ - .word QUADSPI_IRQHandler /* QUADSPI */ - .word LPTIM1_IRQHandler /* LPTIM1 */ - .word CEC_IRQHandler /* HDMI_CEC */ - .word I2C4_EV_IRQHandler /* I2C4 Event */ - .word I2C4_ER_IRQHandler /* I2C4 Error */ - .word SPDIF_RX_IRQHandler /* SPDIF_RX */ - .word DSIHOST_IRQHandler /* DSI host */ - .word DFSDM1_FLT0_IRQHandler /* DFSDM1 filter 0 */ - .word DFSDM1_FLT1_IRQHandler /* DFSDM1 filter 1 */ - .word DFSDM1_FLT2_IRQHandler /* DFSDM1 filter 2 */ - .word DFSDM1_FLT3_IRQHandler /* DFSDM1 filter 3 */ - .word SDMMC2_IRQHandler /* SDMMC2 */ -#endif - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak PVD_PVM_IRQHandler - .thumb_set PVD_PVM_IRQHandler,Default_Handler -#else - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler -#endif - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler -#else - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler -#endif - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler -#else - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler -#endif - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak DFSDM3_IRQHandler - .thumb_set DFSDM3_IRQHandler,Default_Handler - - .weak TIM8_BRK_IRQHandler - .thumb_set TIM8_BRK_IRQHandler,Default_Handler - - .weak TIM8_UP_IRQHandler - .thumb_set TIM8_UP_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_IRQHandler - .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler -#else - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler -#endif - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler -#else - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler -#endif - -#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler -#else - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler -#endif - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak DFSDM0_IRQHandler - .thumb_set DFSDM0_IRQHandler,Default_Handler - - .weak DFSDM1_IRQHandler - .thumb_set DFSDM1_IRQHandler,Default_Handler - - .weak DFSDM2_IRQHandler - .thumb_set DFSDM2_IRQHandler,Default_Handler - - .weak COMP_IRQHandler - .thumb_set COMP_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler -#else - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler -#endif - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak DMA2_Channel6_IRQHandler - .thumb_set DMA2_Channel6_IRQHandler,Default_Handler - - .weak DMA2_Channel7_IRQHandler - .thumb_set DMA2_Channel7_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler -#else - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler -#endif - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - -#if defined(MCU_SERIES_L4) - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak SWPMI1_IRQHandler - .thumb_set SWPMI1_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak LCD_IRQHandler - .thumb_set LCD_IRQHandler,Default_Handler - - .weak RNG_IRQHandler - .thumb_set RNG_IRQHandler,Default_Handler -#else - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler -#endif - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler -#if defined(MCU_SERIES_F7) - .weak UART7_IRQHandler - .thumb_set UART7_IRQHandler,Default_Handler - - .weak UART8_IRQHandler - .thumb_set UART8_IRQHandler,Default_Handler - - .weak SPI4_IRQHandler - .thumb_set SPI4_IRQHandler,Default_Handler - - .weak SPI5_IRQHandler - .thumb_set SPI5_IRQHandler,Default_Handler - - .weak SPI6_IRQHandler - .thumb_set SPI6_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak DMA2D_IRQHandler - .thumb_set DMA2D_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - - .weak I2C4_EV_IRQHandler - .thumb_set I2C4_EV_IRQHandler,Default_Handler - - .weak I2C4_ER_IRQHandler - .thumb_set I2C4_ER_IRQHandler,Default_Handler - - .weak SPDIF_RX_IRQHandler - .thumb_set SPDIF_RX_IRQHandler,Default_Handler - - .weak DSIHOST_IRQHandler - .thumb_set DSIHOST_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak SDMMC2_IRQHandler - .thumb_set SDMMC2_IRQHandler,Default_Handler -#endif - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/stm32_it.c b/ports/stm32/stm32_it.c deleted file mode 100644 index f1ac9b6b85b0f..0000000000000 --- a/ports/stm32/stm32_it.c +++ /dev/null @@ -1,798 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Original template from ST Cube library. See below for header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -/** - ****************************************************************************** - * @file Templates/Src/stm32f4xx_it.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and - * peripherals interrupt service routine. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -#include - -#include "py/obj.h" -#include "py/mphal.h" -#include "stm32_it.h" -#include "pendsv.h" -#include "irq.h" -#include "pybthread.h" -#include "gccollect.h" -#include "extint.h" -#include "timer.h" -#include "uart.h" -#include "storage.h" -#include "can.h" -#include "dma.h" -#include "i2c.h" -#include "usb.h" - -extern void __fatal_error(const char*); -extern PCD_HandleTypeDef pcd_fs_handle; -extern PCD_HandleTypeDef pcd_hs_handle; - -/******************************************************************************/ -/* Cortex-M4 Processor Exceptions Handlers */ -/******************************************************************************/ - -// Set the following to 1 to get some more information on the Hard Fault -// More information about decoding the fault registers can be found here: -// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0646a/Cihdjcfc.html - -STATIC char *fmt_hex(uint32_t val, char *buf) { - const char *hexDig = "0123456789abcdef"; - - buf[0] = hexDig[(val >> 28) & 0x0f]; - buf[1] = hexDig[(val >> 24) & 0x0f]; - buf[2] = hexDig[(val >> 20) & 0x0f]; - buf[3] = hexDig[(val >> 16) & 0x0f]; - buf[4] = hexDig[(val >> 12) & 0x0f]; - buf[5] = hexDig[(val >> 8) & 0x0f]; - buf[6] = hexDig[(val >> 4) & 0x0f]; - buf[7] = hexDig[(val >> 0) & 0x0f]; - buf[8] = '\0'; - - return buf; -} - -STATIC void print_reg(const char *label, uint32_t val) { - char hexStr[9]; - - mp_hal_stdout_tx_str(label); - mp_hal_stdout_tx_str(fmt_hex(val, hexStr)); - mp_hal_stdout_tx_str("\r\n"); -} - -STATIC void print_hex_hex(const char *label, uint32_t val1, uint32_t val2) { - char hex_str[9]; - mp_hal_stdout_tx_str(label); - mp_hal_stdout_tx_str(fmt_hex(val1, hex_str)); - mp_hal_stdout_tx_str(" "); - mp_hal_stdout_tx_str(fmt_hex(val2, hex_str)); - mp_hal_stdout_tx_str("\r\n"); -} - -// The ARMv7M Architecture manual (section B.1.5.6) says that upon entry -// to an exception, that the registers will be in the following order on the -// // stack: R0, R1, R2, R3, R12, LR, PC, XPSR - -typedef struct { - uint32_t r0, r1, r2, r3, r12, lr, pc, xpsr; -} ExceptionRegisters_t; - -int pyb_hard_fault_debug = 0; - -void HardFault_C_Handler(ExceptionRegisters_t *regs) { - if (!pyb_hard_fault_debug) { - NVIC_SystemReset(); - } - - // We need to disable the USB so it doesn't try to write data out on - // the VCP and then block indefinitely waiting for the buffer to drain. - pyb_usb_flags = 0; - - mp_hal_stdout_tx_str("HardFault\r\n"); - - print_reg("R0 ", regs->r0); - print_reg("R1 ", regs->r1); - print_reg("R2 ", regs->r2); - print_reg("R3 ", regs->r3); - print_reg("R12 ", regs->r12); - print_reg("SP ", (uint32_t)regs); - print_reg("LR ", regs->lr); - print_reg("PC ", regs->pc); - print_reg("XPSR ", regs->xpsr); - - uint32_t cfsr = SCB->CFSR; - - print_reg("HFSR ", SCB->HFSR); - print_reg("CFSR ", cfsr); - if (cfsr & 0x80) { - print_reg("MMFAR ", SCB->MMFAR); - } - if (cfsr & 0x8000) { - print_reg("BFAR ", SCB->BFAR); - } - - if ((void*)&_ram_start <= (void*)regs && (void*)regs < (void*)&_ram_end) { - mp_hal_stdout_tx_str("Stack:\r\n"); - uint32_t *stack_top = &_estack; - if ((void*)regs < (void*)&_heap_end) { - // stack not in static stack area so limit the amount we print - stack_top = (uint32_t*)regs + 32; - } - for (uint32_t *sp = (uint32_t*)regs; sp < stack_top; ++sp) { - print_hex_hex(" ", (uint32_t)sp, *sp); - } - } - - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) { - __fatal_error("HardFault"); - } -} - -// Naked functions have no compiler generated gunk, so are the best thing to -// use for asm functions. -__attribute__((naked)) -void HardFault_Handler(void) { - - // From the ARMv7M Architecture Reference Manual, section B.1.5.6 - // on entry to the Exception, the LR register contains, amongst other - // things, the value of CONTROL.SPSEL. This can be found in bit 3. - // - // If CONTROL.SPSEL is 0, then the exception was stacked up using the - // main stack pointer (aka MSP). If CONTROL.SPSEL is 1, then the exception - // was stacked up using the process stack pointer (aka PSP). - - __asm volatile( - " tst lr, #4 \n" // Test Bit 3 to see which stack pointer we should use. - " ite eq \n" // Tell the assembler that the nest 2 instructions are if-then-else - " mrseq r0, msp \n" // Make R0 point to main stack pointer - " mrsne r0, psp \n" // Make R0 point to process stack pointer - " b HardFault_C_Handler \n" // Off to C land - ); -} - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) { -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) { - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) { - __fatal_error("MemManage"); - } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) { - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) { - __fatal_error("BusFault"); - } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) { - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) { - __fatal_error("UsageFault"); - } -} - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) { -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) { -} - -/** - * @brief This function handles PendSVC exception. - * @param None - * @retval None - */ -void PendSV_Handler(void) { - pendsv_isr_handler(); -} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -void SysTick_Handler(void) { - // Instead of calling HAL_IncTick we do the increment here of the counter. - // This is purely for efficiency, since SysTick is called 1000 times per - // second at the highest interrupt priority. - // Note: we don't need uwTick to be declared volatile here because this is - // the only place where it can be modified, and the code is more efficient - // without the volatile specifier. - extern uint32_t uwTick; - uwTick += 1; - - // Read the systick control regster. This has the side effect of clearing - // the COUNTFLAG bit, which makes the logic in mp_hal_ticks_us - // work properly. - SysTick->CTRL; - - // Right now we have the storage and DMA controllers to process during - // this interrupt and we use custom dispatch handlers. If this needs to - // be generalised in the future then a dispatch table can be used as - // follows: ((void(*)(void))(systick_dispatch[uwTick & 0xf]))(); - - if (STORAGE_IDLE_TICK(uwTick)) { - NVIC->STIR = FLASH_IRQn; - } - - if (DMA_IDLE_ENABLED() && DMA_IDLE_TICK(uwTick)) { - dma_idle_handler(uwTick); - } - - #if MICROPY_PY_THREAD - if (pyb_thread_enabled) { - if (pyb_thread_cur->timeslice == 0) { - if (pyb_thread_cur->run_next != pyb_thread_cur) { - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - } - } else { - --pyb_thread_cur->timeslice; - } - } - #endif -} - -/******************************************************************************/ -/* STM32F4xx Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f4xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles USB-On-The-Go FS global interrupt request. - * @param None - * @retval None - */ -#if defined(USE_USB_FS) -void OTG_FS_IRQHandler(void) { - IRQ_ENTER(OTG_FS_IRQn); - HAL_PCD_IRQHandler(&pcd_fs_handle); - IRQ_EXIT(OTG_FS_IRQn); -} -#endif -#if defined(USE_USB_HS) -void OTG_HS_IRQHandler(void) { - IRQ_ENTER(OTG_HS_IRQn); - HAL_PCD_IRQHandler(&pcd_hs_handle); - IRQ_EXIT(OTG_HS_IRQn); -} -#endif - -#if defined(USE_USB_FS) || defined(USE_USB_HS) -/** - * @brief This function handles USB OTG Common FS/HS Wakeup functions. - * @param *pcd_handle for FS or HS - * @retval None - */ -STATIC void OTG_CMD_WKUP_Handler(PCD_HandleTypeDef *pcd_handle) { - - if (pcd_handle->Init.low_power_enable) { - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - - /* Configures system clock after wake-up from STOP: enable HSE, PLL and select - PLL as system clock source (HSE and PLL are disabled in STOP mode) */ - - __HAL_RCC_HSE_CONFIG(RCC_HSE_ON); - - /* Wait till HSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - {} - - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - - /* Wait till PLL is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - {} - - /* Select PLL as SYSCLK */ - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK); - - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - {} - - /* ungate PHY clock */ - __HAL_PCD_UNGATE_PHYCLOCK(pcd_handle); - } - -} -#endif - -#if defined(USE_USB_FS) -/** - * @brief This function handles USB OTG FS Wakeup IRQ Handler. - * @param None - * @retval None - */ -void OTG_FS_WKUP_IRQHandler(void) { - IRQ_ENTER(OTG_FS_WKUP_IRQn); - - OTG_CMD_WKUP_Handler(&pcd_fs_handle); - - /* Clear EXTI pending Bit*/ - __HAL_USB_FS_EXTI_CLEAR_FLAG(); - - IRQ_EXIT(OTG_FS_WKUP_IRQn); -} -#endif - -#if defined(USE_USB_HS) -/** - * @brief This function handles USB OTG HS Wakeup IRQ Handler. - * @param None - * @retval None - */ -void OTG_HS_WKUP_IRQHandler(void) { - IRQ_ENTER(OTG_HS_WKUP_IRQn); - - OTG_CMD_WKUP_Handler(&pcd_hs_handle); - - /* Clear EXTI pending Bit*/ - __HAL_USB_HS_EXTI_CLEAR_FLAG(); - - IRQ_EXIT(OTG_HS_WKUP_IRQn); -} -#endif - -/** - * @brief This function handles PPP interrupt request. - * @param None - * @retval None - */ -/*void PPP_IRQHandler(void) -{ -}*/ - -// Handle a flash (erase/program) interrupt. -void FLASH_IRQHandler(void) { - IRQ_ENTER(FLASH_IRQn); - // This calls the real flash IRQ handler, if needed - /* - uint32_t flash_cr = FLASH->CR; - if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) { - HAL_FLASH_IRQHandler(); - } - */ - // This call the storage IRQ handler, to check if the flash cache needs flushing - storage_irq_handler(); - IRQ_EXIT(FLASH_IRQn); -} - -/** - * @brief These functions handle the EXTI interrupt requests. - * @param None - * @retval None - */ -void EXTI0_IRQHandler(void) { - IRQ_ENTER(EXTI0_IRQn); - Handle_EXTI_Irq(0); - IRQ_EXIT(EXTI0_IRQn); -} - -void EXTI1_IRQHandler(void) { - IRQ_ENTER(EXTI1_IRQn); - Handle_EXTI_Irq(1); - IRQ_EXIT(EXTI1_IRQn); -} - -void EXTI2_IRQHandler(void) { - IRQ_ENTER(EXTI2_IRQn); - Handle_EXTI_Irq(2); - IRQ_EXIT(EXTI2_IRQn); -} - -void EXTI3_IRQHandler(void) { - IRQ_ENTER(EXTI3_IRQn); - Handle_EXTI_Irq(3); - IRQ_EXIT(EXTI3_IRQn); -} - -void EXTI4_IRQHandler(void) { - IRQ_ENTER(EXTI4_IRQn); - Handle_EXTI_Irq(4); - IRQ_EXIT(EXTI4_IRQn); -} - -void EXTI9_5_IRQHandler(void) { - IRQ_ENTER(EXTI9_5_IRQn); - Handle_EXTI_Irq(5); - Handle_EXTI_Irq(6); - Handle_EXTI_Irq(7); - Handle_EXTI_Irq(8); - Handle_EXTI_Irq(9); - IRQ_EXIT(EXTI9_5_IRQn); -} - -void EXTI15_10_IRQHandler(void) { - IRQ_ENTER(EXTI15_10_IRQn); - Handle_EXTI_Irq(10); - Handle_EXTI_Irq(11); - Handle_EXTI_Irq(12); - Handle_EXTI_Irq(13); - Handle_EXTI_Irq(14); - Handle_EXTI_Irq(15); - IRQ_EXIT(EXTI15_10_IRQn); -} - -void PVD_IRQHandler(void) { - IRQ_ENTER(PVD_IRQn); - Handle_EXTI_Irq(EXTI_PVD_OUTPUT); - IRQ_EXIT(PVD_IRQn); -} - -#if defined(MCU_SERIES_L4) -void PVD_PVM_IRQHandler(void) { - IRQ_ENTER(PVD_PVM_IRQn); - Handle_EXTI_Irq(EXTI_PVD_OUTPUT); - IRQ_EXIT(PVD_PVM_IRQn); -} -#endif - -void RTC_Alarm_IRQHandler(void) { - IRQ_ENTER(RTC_Alarm_IRQn); - Handle_EXTI_Irq(EXTI_RTC_ALARM); - IRQ_EXIT(RTC_Alarm_IRQn); -} - -#if defined(ETH) // The 407 has ETH, the 405 doesn't -void ETH_WKUP_IRQHandler(void) { - IRQ_ENTER(ETH_WKUP_IRQn); - Handle_EXTI_Irq(EXTI_ETH_WAKEUP); - IRQ_EXIT(ETH_WKUP_IRQn); -} -#endif - -void TAMP_STAMP_IRQHandler(void) { - IRQ_ENTER(TAMP_STAMP_IRQn); - Handle_EXTI_Irq(EXTI_RTC_TIMESTAMP); - IRQ_EXIT(TAMP_STAMP_IRQn); -} - -void RTC_WKUP_IRQHandler(void) { - IRQ_ENTER(RTC_WKUP_IRQn); - RTC->ISR &= ~(1 << 10); // clear wakeup interrupt flag - Handle_EXTI_Irq(EXTI_RTC_WAKEUP); // clear EXTI flag and execute optional callback - IRQ_EXIT(RTC_WKUP_IRQn); -} - -void TIM1_BRK_TIM9_IRQHandler(void) { - IRQ_ENTER(TIM1_BRK_TIM9_IRQn); - timer_irq_handler(9); - IRQ_EXIT(TIM1_BRK_TIM9_IRQn); -} - -#if defined(MCU_SERIES_L4) -void TIM1_BRK_TIM15_IRQHandler(void) { - IRQ_ENTER(TIM1_BRK_TIM15_IRQn); - timer_irq_handler(15); - IRQ_EXIT(TIM1_BRK_TIM15_IRQn); -} -#endif - -void TIM1_UP_TIM10_IRQHandler(void) { - IRQ_ENTER(TIM1_UP_TIM10_IRQn); - timer_irq_handler(1); - timer_irq_handler(10); - IRQ_EXIT(TIM1_UP_TIM10_IRQn); -} - -#if defined(MCU_SERIES_L4) -void TIM1_UP_TIM16_IRQHandler(void) { - IRQ_ENTER(TIM1_UP_TIM16_IRQn); - timer_irq_handler(1); - timer_irq_handler(16); - IRQ_EXIT(TIM1_UP_TIM16_IRQn); -} -#endif - -void TIM1_TRG_COM_TIM11_IRQHandler(void) { - IRQ_ENTER(TIM1_TRG_COM_TIM11_IRQn); - timer_irq_handler(11); - IRQ_EXIT(TIM1_TRG_COM_TIM11_IRQn); -} - -#if defined(MCU_SERIES_L4) -void TIM1_TRG_COM_TIM17_IRQHandler(void) { - IRQ_ENTER(TIM1_TRG_COM_TIM17_IRQn); - timer_irq_handler(17); - IRQ_EXIT(TIM1_TRG_COM_TIM17_IRQn); -} -#endif - -void TIM1_CC_IRQHandler(void) { - IRQ_ENTER(TIM1_CC_IRQn); - timer_irq_handler(1); - IRQ_EXIT(TIM1_CC_IRQn); -} - -void TIM2_IRQHandler(void) { - IRQ_ENTER(TIM2_IRQn); - timer_irq_handler(2); - IRQ_EXIT(TIM2_IRQn); -} - -void TIM3_IRQHandler(void) { - IRQ_ENTER(TIM3_IRQn); - timer_irq_handler(3); - IRQ_EXIT(TIM3_IRQn); -} - -void TIM4_IRQHandler(void) { - IRQ_ENTER(TIM4_IRQn); - timer_irq_handler(4); - IRQ_EXIT(TIM4_IRQn); -} - -void TIM5_IRQHandler(void) { - IRQ_ENTER(TIM5_IRQn); - timer_irq_handler(5); - HAL_TIM_IRQHandler(&TIM5_Handle); - IRQ_EXIT(TIM5_IRQn); -} - -#if defined(TIM6) // STM32F401 doesn't have TIM6 -void TIM6_DAC_IRQHandler(void) { - IRQ_ENTER(TIM6_DAC_IRQn); - timer_irq_handler(6); - IRQ_EXIT(TIM6_DAC_IRQn); -} -#endif - -#if defined(TIM7) // STM32F401 doesn't have TIM7 -void TIM7_IRQHandler(void) { - IRQ_ENTER(TIM7_IRQn); - timer_irq_handler(7); - IRQ_EXIT(TIM7_IRQn); -} -#endif - -#if defined(TIM8) // STM32F401 doesn't have TIM8 -void TIM8_BRK_TIM12_IRQHandler(void) { - IRQ_ENTER(TIM8_BRK_TIM12_IRQn); - timer_irq_handler(12); - IRQ_EXIT(TIM8_BRK_TIM12_IRQn); -} - -void TIM8_UP_TIM13_IRQHandler(void) { - IRQ_ENTER(TIM8_UP_TIM13_IRQn); - timer_irq_handler(8); - timer_irq_handler(13); - IRQ_EXIT(TIM8_UP_TIM13_IRQn); -} - -#if defined(MCU_SERIES_L4) -void TIM8_UP_IRQHandler(void) { - IRQ_ENTER(TIM8_UP_IRQn); - timer_irq_handler(8); - IRQ_EXIT(TIM8_UP_IRQn); -} -#endif - -void TIM8_CC_IRQHandler(void) { - IRQ_ENTER(TIM8_CC_IRQn); - timer_irq_handler(8); - IRQ_EXIT(TIM8_CC_IRQn); -} - -void TIM8_TRG_COM_TIM14_IRQHandler(void) { - IRQ_ENTER(TIM8_TRG_COM_TIM14_IRQn); - timer_irq_handler(14); - IRQ_EXIT(TIM8_TRG_COM_TIM14_IRQn); -} -#endif - -// UART/USART IRQ handlers -void USART1_IRQHandler(void) { - IRQ_ENTER(USART1_IRQn); - uart_irq_handler(1); - IRQ_EXIT(USART1_IRQn); -} - -void USART2_IRQHandler(void) { - IRQ_ENTER(USART2_IRQn); - uart_irq_handler(2); - IRQ_EXIT(USART2_IRQn); -} - -void USART3_IRQHandler(void) { - IRQ_ENTER(USART3_IRQn); - uart_irq_handler(3); - IRQ_EXIT(USART3_IRQn); -} - -void UART4_IRQHandler(void) { - IRQ_ENTER(UART4_IRQn); - uart_irq_handler(4); - IRQ_EXIT(UART4_IRQn); -} - -void UART5_IRQHandler(void) { - IRQ_ENTER(UART5_IRQn); - uart_irq_handler(5); - IRQ_EXIT(UART5_IRQn); -} - -void USART6_IRQHandler(void) { - IRQ_ENTER(USART6_IRQn); - uart_irq_handler(6); - IRQ_EXIT(USART6_IRQn); -} - -#if defined(MICROPY_HW_UART7_TX) -void UART7_IRQHandler(void) { - IRQ_ENTER(UART7_IRQn); - uart_irq_handler(7); - IRQ_EXIT(UART7_IRQn); -} -#endif - -#if defined(MICROPY_HW_UART8_TX) -void UART8_IRQHandler(void) { - IRQ_ENTER(UART8_IRQn); - uart_irq_handler(8); - IRQ_EXIT(UART8_IRQn); -} -#endif - -#if MICROPY_HW_ENABLE_CAN -void CAN1_RX0_IRQHandler(void) { - IRQ_ENTER(CAN1_RX0_IRQn); - can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0); - IRQ_EXIT(CAN1_RX0_IRQn); -} - -void CAN1_RX1_IRQHandler(void) { - IRQ_ENTER(CAN1_RX1_IRQn); - can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1); - IRQ_EXIT(CAN1_RX1_IRQn); -} - -void CAN2_RX0_IRQHandler(void) { - IRQ_ENTER(CAN2_RX0_IRQn); - can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0); - IRQ_EXIT(CAN2_RX0_IRQn); -} - -void CAN2_RX1_IRQHandler(void) { - IRQ_ENTER(CAN2_RX1_IRQn); - can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1); - IRQ_EXIT(CAN2_RX1_IRQn); -} -#endif // MICROPY_HW_ENABLE_CAN - -#if defined(MICROPY_HW_I2C1_SCL) -void I2C1_EV_IRQHandler(void) { - IRQ_ENTER(I2C1_EV_IRQn); - i2c_ev_irq_handler(1); - IRQ_EXIT(I2C1_EV_IRQn); -} - -void I2C1_ER_IRQHandler(void) { - IRQ_ENTER(I2C1_ER_IRQn); - i2c_er_irq_handler(1); - IRQ_EXIT(I2C1_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C1_SCL) - -#if defined(MICROPY_HW_I2C2_SCL) -void I2C2_EV_IRQHandler(void) { - IRQ_ENTER(I2C2_EV_IRQn); - i2c_ev_irq_handler(2); - IRQ_EXIT(I2C2_EV_IRQn); -} - -void I2C2_ER_IRQHandler(void) { - IRQ_ENTER(I2C2_ER_IRQn); - i2c_er_irq_handler(2); - IRQ_EXIT(I2C2_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C2_SCL) - -#if defined(MICROPY_HW_I2C3_SCL) -void I2C3_EV_IRQHandler(void) { - IRQ_ENTER(I2C3_EV_IRQn); - i2c_ev_irq_handler(3); - IRQ_EXIT(I2C3_EV_IRQn); -} - -void I2C3_ER_IRQHandler(void) { - IRQ_ENTER(I2C3_ER_IRQn); - i2c_er_irq_handler(3); - IRQ_EXIT(I2C3_ER_IRQn); -} -#endif // defined(MICROPY_HW_I2C3_SCL) diff --git a/ports/stm32/stm32_it.h b/ports/stm32/stm32_it.h deleted file mode 100644 index b498dee8dae39..0000000000000 --- a/ports/stm32/stm32_it.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Original template from ST Cube library. See below for header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_STM32_IT_H -#define MICROPY_INCLUDED_STMHAL_STM32_IT_H - -/** - ****************************************************************************** - * @file Templates/Inc/stm32f4xx_it.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -extern int pyb_hard_fault_debug; - -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); -#ifdef USE_USB_FS -void OTG_FS_IRQHandler(void); -#endif -#ifdef USE_USB_HS -void OTG_HS_IRQHandler(void); -#endif - -#endif // MICROPY_INCLUDED_STMHAL_STM32_IT_H diff --git a/ports/stm32/storage.c b/ports/stm32/storage.c deleted file mode 100644 index 4b329c2dbbb9f..0000000000000 --- a/ports/stm32/storage.c +++ /dev/null @@ -1,521 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" -#include "lib/oofatfs/ff.h" -#include "extmod/vfs_fat.h" - -#include "systick.h" -#include "led.h" -#include "flash.h" -#include "storage.h" -#include "irq.h" - -#if defined(MICROPY_HW_SPIFLASH_SIZE_BITS) -#define USE_INTERNAL (0) -#else -#define USE_INTERNAL (1) -#endif - -#if USE_INTERNAL - -#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k - -// enable this to get an extra 64k of storage (uses the last sector of the flash) -#if 0 -#define FLASH_MEM_SEG2_START_ADDR (0x080e0000) // sector 11 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 11: 128k -#endif - -#elif defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) - -STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k -#define CACHE_MEM_START_ADDR (&flash_cache_mem[0]) -#define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k - -#elif defined(STM32F429xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k - -#elif defined(STM32F439xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08100000) // sector 12 -#define FLASH_MEM_SEG1_NUM_BLOCKS (384) // sectors 12,13,14,15,16,17: 16k+16k+16k+16k+64k+64k(of 128k)=192k -#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k) - -#elif defined(STM32F746xx) || defined(STM32F767xx) || defined(STM32F769xx) - -// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this. - -#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max -#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k - -#elif defined(STM32L475xx) || defined(STM32L476xx) - -extern uint8_t _flash_fs_start; -extern uint8_t _flash_fs_end; - -// The STM32L475/6 doesn't have CCRAM, so we use the 32K SRAM2 for this. -#define CACHE_MEM_START_ADDR (0x10000000) // SRAM2 data RAM, 32k -#define FLASH_SECTOR_SIZE_MAX (0x00800) // 2k max -#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start) -#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512) - -#else -#error "no storage support for this MCU" -#endif - -#if !defined(FLASH_MEM_SEG2_START_ADDR) -#define FLASH_MEM_SEG2_START_ADDR (0) // no second segment -#define FLASH_MEM_SEG2_NUM_BLOCKS (0) // no second segment -#endif - -#define FLASH_PART1_START_BLOCK (0x100) -#define FLASH_PART1_NUM_BLOCKS (FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) - -#define FLASH_FLAG_DIRTY (1) -#define FLASH_FLAG_FORCE_WRITE (2) -#define FLASH_FLAG_ERASED (4) -static bool flash_is_initialised = false; -static __IO uint8_t flash_flags = 0; -static uint32_t flash_cache_sector_id; -static uint32_t flash_cache_sector_start; -static uint32_t flash_cache_sector_size; -static uint32_t flash_tick_counter_last_write; - -static void flash_cache_flush(void) { - if (flash_flags & FLASH_FLAG_DIRTY) { - flash_flags |= FLASH_FLAG_FORCE_WRITE; - while (flash_flags & FLASH_FLAG_DIRTY) { - NVIC->STIR = FLASH_IRQn; - } - } -} - -static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) { - uint32_t flash_sector_start; - uint32_t flash_sector_size; - uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); - if (flash_sector_size > FLASH_SECTOR_SIZE_MAX) { - flash_sector_size = FLASH_SECTOR_SIZE_MAX; - } - if (flash_cache_sector_id != flash_sector_id) { - flash_cache_flush(); - memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size); - flash_cache_sector_id = flash_sector_id; - flash_cache_sector_start = flash_sector_start; - flash_cache_sector_size = flash_sector_size; - } - flash_flags |= FLASH_FLAG_DIRTY; - led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on - flash_tick_counter_last_write = HAL_GetTick(); - return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; -} - -static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) { - uint32_t flash_sector_start; - uint32_t flash_sector_size; - uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); - if (flash_cache_sector_id == flash_sector_id) { - // in cache, copy from there - return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; - } - // not in cache, copy straight from flash - return (uint8_t*)flash_addr; -} - -#else - -#include "drivers/memory/spiflash.h" -#include "genhdr/pins.h" - -#define FLASH_PART1_START_BLOCK (0x100) -#define FLASH_PART1_NUM_BLOCKS (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) - -static bool flash_is_initialised = false; - -STATIC const mp_machine_soft_spi_obj_t spiflash_spi_bus = { - .base = {&mp_machine_soft_spi_type}, - .delay_half = MICROPY_PY_MACHINE_SPI_MIN_DELAY, - .polarity = 0, - .phase = 0, - .sck = &MICROPY_HW_SPIFLASH_SCK, - .mosi = &MICROPY_HW_SPIFLASH_MOSI, - .miso = &MICROPY_HW_SPIFLASH_MISO, -}; - -STATIC const mp_spiflash_t spiflash = { - .cs = &MICROPY_HW_SPIFLASH_CS, - .spi = (mp_obj_base_t*)&spiflash_spi_bus.base, -}; - -#endif - -void storage_init(void) { - if (!flash_is_initialised) { - #if USE_INTERNAL - flash_flags = 0; - flash_cache_sector_id = 0; - flash_tick_counter_last_write = 0; - #else - mp_spiflash_init((mp_spiflash_t*)&spiflash); - #endif - flash_is_initialised = true; - } - - #if USE_INTERNAL - // Enable the flash IRQ, which is used to also call our storage IRQ handler - // It needs to go at a higher priority than all those components that rely on - // the flash storage (eg higher than USB MSC). - HAL_NVIC_SetPriority(FLASH_IRQn, IRQ_PRI_FLASH, IRQ_SUBPRI_FLASH); - HAL_NVIC_EnableIRQ(FLASH_IRQn); - #endif -} - -uint32_t storage_get_block_size(void) { - return FLASH_BLOCK_SIZE; -} - -uint32_t storage_get_block_count(void) { - return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS; -} - -void storage_irq_handler(void) { - #if USE_INTERNAL - - if (!(flash_flags & FLASH_FLAG_DIRTY)) { - return; - } - - // This code uses interrupts to erase the flash - /* - if (flash_erase_state == 0) { - flash_erase_it(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); - flash_erase_state = 1; - return; - } - - if (flash_erase_state == 1) { - // wait for erase - // TODO add timeout - #define flash_erase_done() (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) == RESET) - if (!flash_erase_done()) { - return; - } - flash_erase_state = 2; - } - */ - - // This code erases the flash directly, waiting for it to finish - if (!(flash_flags & FLASH_FLAG_ERASED)) { - flash_erase(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); - flash_flags |= FLASH_FLAG_ERASED; - return; - } - - // If not a forced write, wait at least 5 seconds after last write to flush - // On file close and flash unmount we get a forced write, so we can afford to wait a while - if ((flash_flags & FLASH_FLAG_FORCE_WRITE) || sys_tick_has_passed(flash_tick_counter_last_write, 5000)) { - // sync the cache RAM buffer by writing it to the flash page - flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); - // clear the flash flags now that we have a clean cache - flash_flags = 0; - // indicate a clean cache with LED off - led_state(PYB_LED_RED, 0); - } - - #endif -} - -void storage_flush(void) { - #if USE_INTERNAL - flash_cache_flush(); - #endif -} - -static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { - buf[0] = boot; - - if (num_blocks == 0) { - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - } else { - buf[1] = 0xff; - buf[2] = 0xff; - buf[3] = 0xff; - } - - buf[4] = type; - - if (num_blocks == 0) { - buf[5] = 0; - buf[6] = 0; - buf[7] = 0; - } else { - buf[5] = 0xff; - buf[6] = 0xff; - buf[7] = 0xff; - } - - buf[8] = start_block; - buf[9] = start_block >> 8; - buf[10] = start_block >> 16; - buf[11] = start_block >> 24; - - buf[12] = num_blocks; - buf[13] = num_blocks >> 8; - buf[14] = num_blocks >> 16; - buf[15] = num_blocks >> 24; -} - -#if USE_INTERNAL - -static uint32_t convert_block_to_flash_addr(uint32_t block) { - if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { - // a block in partition 1 - block -= FLASH_PART1_START_BLOCK; - if (block < FLASH_MEM_SEG1_NUM_BLOCKS) { - return FLASH_MEM_SEG1_START_ADDR + block * FLASH_BLOCK_SIZE; - } else if (block < FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) { - return FLASH_MEM_SEG2_START_ADDR + (block - FLASH_MEM_SEG1_NUM_BLOCKS) * FLASH_BLOCK_SIZE; - } - // can add more flash segments here if needed, following above pattern - } - // bad block - return -1; -} - -#endif - -bool storage_read_block(uint8_t *dest, uint32_t block) { - //printf("RD %u\n", block); - if (block == 0) { - // fake the MBR so we can decide on our own partition table - - for (int i = 0; i < 446; i++) { - dest[i] = 0; - } - - build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS); - build_partition(dest + 462, 0, 0, 0, 0); - build_partition(dest + 478, 0, 0, 0, 0); - build_partition(dest + 494, 0, 0, 0, 0); - - dest[510] = 0x55; - dest[511] = 0xaa; - - return true; - - } else { - #if USE_INTERNAL - - // non-MBR block, get data from flash memory, possibly via cache - uint32_t flash_addr = convert_block_to_flash_addr(block); - if (flash_addr == -1) { - // bad block number - return false; - } - uint8_t *src = flash_cache_get_addr_for_read(flash_addr); - memcpy(dest, src, FLASH_BLOCK_SIZE); - return true; - - #else - - // non-MBR block, get data from SPI flash - - if (block < FLASH_PART1_START_BLOCK || block >= FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { - // bad block number - return false; - } - - // we must disable USB irqs to prevent MSC contention with SPI flash - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - mp_spiflash_read((mp_spiflash_t*)&spiflash, - (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE, FLASH_BLOCK_SIZE, dest); - - restore_irq_pri(basepri); - - return true; - - #endif - } -} - -bool storage_write_block(const uint8_t *src, uint32_t block) { - //printf("WR %u\n", block); - if (block == 0) { - // can't write MBR, but pretend we did - return true; - - } else { - #if USE_INTERNAL - - // non-MBR block, copy to cache - uint32_t flash_addr = convert_block_to_flash_addr(block); - if (flash_addr == -1) { - // bad block number - return false; - } - uint8_t *dest = flash_cache_get_addr_for_write(flash_addr); - memcpy(dest, src, FLASH_BLOCK_SIZE); - return true; - - #else - - // non-MBR block, write to SPI flash - - if (block < FLASH_PART1_START_BLOCK || block >= FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { - // bad block number - return false; - } - - // we must disable USB irqs to prevent MSC contention with SPI flash - uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - - int ret = mp_spiflash_write((mp_spiflash_t*)&spiflash, - (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE, FLASH_BLOCK_SIZE, src); - - restore_irq_pri(basepri); - - return ret == 0; - - #endif - } -} - -mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!storage_read_block(dest + i * FLASH_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -mp_uint_t storage_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { - for (size_t i = 0; i < num_blocks; i++) { - if (!storage_write_block(src + i * FLASH_BLOCK_SIZE, block_num + i)) { - return 1; // error - } - } - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings -// -// Expose the flash as an object with the block protocol. - -// there is a singleton Flash object -STATIC const mp_obj_base_t pyb_flash_obj = {&pyb_flash_type}; - -STATIC mp_obj_t pyb_flash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // return singleton object - return (mp_obj_t)&pyb_flash_obj; -} - -STATIC mp_obj_t pyb_flash_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); - mp_uint_t ret = storage_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_readblocks_obj, pyb_flash_readblocks); - -STATIC mp_obj_t pyb_flash_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); - mp_uint_t ret = storage_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE); - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_writeblocks_obj, pyb_flash_writeblocks); - -STATIC mp_obj_t pyb_flash_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { - mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: storage_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: storage_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: storage_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(storage_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(storage_get_block_size()); - default: return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(pyb_flash_ioctl_obj, pyb_flash_ioctl); - -STATIC const mp_rom_map_elem_t pyb_flash_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&pyb_flash_readblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&pyb_flash_writeblocks_obj) }, - { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&pyb_flash_ioctl_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_flash_locals_dict, pyb_flash_locals_dict_table); - -const mp_obj_type_t pyb_flash_type = { - { &mp_type_type }, - .name = MP_QSTR_Flash, - .make_new = pyb_flash_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_flash_locals_dict, -}; - -void pyb_flash_init_vfs(fs_user_mount_t *vfs) { - vfs->base.type = &mp_fat_vfs_type; - vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; - vfs->fatfs.drv = vfs; - vfs->fatfs.part = 1; // flash filesystem lives on first partition - vfs->readblocks[0] = (mp_obj_t)&pyb_flash_readblocks_obj; - vfs->readblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->readblocks[2] = (mp_obj_t)storage_read_blocks; // native version - vfs->writeblocks[0] = (mp_obj_t)&pyb_flash_writeblocks_obj; - vfs->writeblocks[1] = (mp_obj_t)&pyb_flash_obj; - vfs->writeblocks[2] = (mp_obj_t)storage_write_blocks; // native version - vfs->u.ioctl[0] = (mp_obj_t)&pyb_flash_ioctl_obj; - vfs->u.ioctl[1] = (mp_obj_t)&pyb_flash_obj; -} diff --git a/ports/stm32/storage.h b/ports/stm32/storage.h deleted file mode 100644 index 291e09a9aedca..0000000000000 --- a/ports/stm32/storage.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_STORAGE_H -#define MICROPY_INCLUDED_STMHAL_STORAGE_H - -#define FLASH_BLOCK_SIZE (512) - -#define STORAGE_SYSTICK_MASK (0x1ff) // 512ms -#define STORAGE_IDLE_TICK(tick) (((tick) & STORAGE_SYSTICK_MASK) == 2) - -void storage_init(void); -uint32_t storage_get_block_size(void); -uint32_t storage_get_block_count(void); -void storage_irq_handler(void); -void storage_flush(void); -bool storage_read_block(uint8_t *dest, uint32_t block); -bool storage_write_block(const uint8_t *src, uint32_t block); - -// these return 0 on success, non-zero on error -mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); -mp_uint_t storage_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); - -extern const struct _mp_obj_type_t pyb_flash_type; - -struct _fs_user_mount_t; -void pyb_flash_init_vfs(struct _fs_user_mount_t *vfs); - -#endif // MICROPY_INCLUDED_STMHAL_STORAGE_H diff --git a/ports/stm32/system_stm32.c b/ports/stm32/system_stm32.c deleted file mode 100644 index b71a03181a7c4..0000000000000 --- a/ports/stm32/system_stm32.c +++ /dev/null @@ -1,496 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and modified. See below for original header. - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -/** - ****************************************************************************** - * @file system_stm32.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief CMSIS Cortex-M4/M7 Device Peripheral Access Layer System Source File. - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32fxxx_system - * @{ - */ - -/** @addtogroup STM32Fxxx_System_Private_Includes - * @{ - */ - -#include "py/mphal.h" - -void __fatal_error(const char *msg); - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Defines - * @{ - */ - -#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - -#define CONFIG_RCC_CR_1ST (RCC_CR_HSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON || RCC_CR_CSSON || RCC_CR_PLLON) -#define CONFIG_RCC_PLLCFGR (0x24003010) - -#if defined(MCU_SERIES_F4) -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -#elif defined(MCU_SERIES_F7) -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -#endif - -#elif defined(MCU_SERIES_L4) - -#define CONFIG_RCC_CR_1ST (RCC_CR_MSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON || RCC_CR_CSSON || RCC_CR_HSION || RCC_CR_PLLON) -#define CONFIG_RCC_PLLCFGR (0x00001000) -/* - * FIXME Do not know why I have to define these arrays here! they should be defined in the - * hal_rcc-file!! - * - */ -const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; -const uint32_t MSIRangeTable[12] = {100000, 200000, 400000, 800000, 1000000, 2000000, \ - 4000000, 8000000, 16000000, 24000000, 32000000, 48000000}; -#else -#error Unknown processor -#endif - -/************************* Miscellaneous Configuration ************************/ - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ -/******************************************************************************/ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Variables - * @{ - */ - /* This variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ - uint32_t SystemCoreClock = 16000000; - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32Fxxx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the FPU setting, vector table location and External memory - * configuration. - * @param None - * @retval None - */ -void SystemInit(void) -{ - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - #endif - /* Reset the RCC clock configuration to the default reset state ------------*/ - - /* Set HSION bit */ - RCC->CR |= CONFIG_RCC_CR_1ST; - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000; - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= ~ CONFIG_RCC_CR_2ND; - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = CONFIG_RCC_PLLCFGR; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Disable all interrupts */ - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - RCC->CIR = 0x00000000; - #elif defined(MCU_SERIES_L4) - RCC->CIER = 0x00000000; - #endif - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif - - /* dpgeorge: enable 8-byte stack alignment for IRQ handlers, in accord with EABI */ - SCB->CCR |= SCB_CCR_STKALIGN_Msk; -} - - -/** - * @brief System Clock Configuration - * - * The system Clock is configured for F4/F7 as follows: - * System Clock source = PLL (HSE) - * SYSCLK(Hz) = 168000000 - * HCLK(Hz) = 168000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 4 - * APB2 Prescaler = 2 - * HSE Frequency(Hz) = HSE_VALUE - * PLL_M = HSE_VALUE/1000000 - * PLL_N = 336 - * PLL_P = 2 - * PLL_Q = 7 - * VDD(V) = 3.3 - * Main regulator output voltage = Scale1 mode - * Flash Latency(WS) = 5 - * - * The system Clock is configured for L4 as follows: - * System Clock source = PLL (MSI) - * SYSCLK(Hz) = 80000000 - * HCLK(Hz) = 80000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 1 - * APB2 Prescaler = 1 - * MSI Frequency(Hz) = MSI_VALUE (4000000) - * LSE Frequency(Hz) = 32768 - * PLL_M = 1 - * PLL_N = 40 - * PLL_P = 7 - * PLL_Q = 2 - * PLL_R = 2 <= This is the source for SysClk, not as on F4/7 PLL_P - * Flash Latency(WS) = 4 - * @param None - * @retval None - * - * PLL is configured as follows: - * - * VCO_IN - * F4/F7 = HSE / M - * L4 = MSI / M - * VCO_OUT - * F4/F7 = HSE / M * N - * L4 = MSI / M * N - * PLLCLK - * F4/F7 = HSE / M * N / P - * L4 = MSI / M * N / R - * PLL48CK - * F4/F7 = HSE / M * N / Q - * L4 = MSI / M * N / Q USB Clock is obtained over PLLSAI1 - * - * SYSCLK = PLLCLK - * HCLK = SYSCLK / AHB_PRESC - * PCLKx = HCLK / APBx_PRESC - * - * Constraints on parameters: - * - * VCO_IN between 1MHz and 2MHz (2MHz recommended) - * VCO_OUT between 192MHz and 432MHz - * HSE = 8MHz - * M = 2 .. 63 (inclusive) - * N = 192 ... 432 (inclusive) - * P = 2, 4, 6, 8 - * Q = 2 .. 15 (inclusive) - * - * AHB_PRESC=1,2,4,8,16,64,128,256,512 - * APBx_PRESC=1,2,4,8,16 - * - * Output clocks: - * - * CPU SYSCLK max 168MHz - * USB,RNG,SDIO PLL48CK must be 48MHz for USB - * AHB HCLK max 168MHz - * APB1 PCLK1 max 42MHz - * APB2 PCLK2 max 84MHz - * - * Timers run from APBx if APBx_PRESC=1, else 2x APBx - */ -void SystemClock_Config(void) -{ - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; - - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - /* Enable Power Control clock */ - __PWR_CLK_ENABLE(); - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - #elif defined(MCU_SERIES_L4) - // Configure LSE Drive Capability - __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - #endif - - /* Enable HSE Oscillator and activate PLL with HSE as source */ - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - #elif defined(MCU_SERIES_L4) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; - #endif - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 - clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - -#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - #if defined(MCU_SERIES_F7) - #define FREQ_BKP BKP31R - #elif defined(MCU_SERIES_L4) - #error Unsupported Processor - #else - #define FREQ_BKP BKP19R - #endif - uint32_t m = RTC->FREQ_BKP; - uint32_t n; - uint32_t p; - uint32_t q; - - // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM - uint32_t h = (m >> 22) & 0xf; - uint32_t b1 = (m >> 26) & 0x7; - uint32_t b2 = (m >> 29) & 0x7; - q = (m >> 18) & 0xf; - p = (((m >> 16) & 0x03)+1)*2; - n = (m >> 6) & 0x3ff; - m &= 0x3f; - if ((q < 2) || (q > 15) || (p > 8) || (p < 2) || (n < 192) || (n >= 433) || (m < 2)) { - m = MICROPY_HW_CLK_PLLM; - n = MICROPY_HW_CLK_PLLN; - p = MICROPY_HW_CLK_PLLP; - q = MICROPY_HW_CLK_PLLQ; - h = RCC_SYSCLK_DIV1; - b1 = RCC_HCLK_DIV4; - b2 = RCC_HCLK_DIV2; - } else { - h <<= 4; - b1 <<= 10; - b2 <<= 10; - } - RCC_OscInitStruct.PLL.PLLM = m; //MICROPY_HW_CLK_PLLM; - RCC_OscInitStruct.PLL.PLLN = n; //MICROPY_HW_CLK_PLLN; - RCC_OscInitStruct.PLL.PLLP = p; //MICROPY_HW_CLK_PLLP; - RCC_OscInitStruct.PLL.PLLQ = q; //MICROPY_HW_CLK_PLLQ; - - RCC_ClkInitStruct.AHBCLKDivider = h; //RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = b1; //RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = b2; //RCC_HCLK_DIV2; -#else // defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ - RCC_OscInitStruct.PLL.PLLM = MICROPY_HW_CLK_PLLM; - RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN; - RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP; - RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ; - #if defined(MCU_SERIES_L4) - RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR; - #endif - - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - #elif defined(MCU_SERIES_L4) - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - #endif -#endif - if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - __fatal_error("HAL_RCC_OscConfig"); - } - -#if defined(MCU_SERIES_F7) - /* Activate the OverDrive to reach the 200 MHz Frequency */ - if (HAL_PWREx_EnableOverDrive() != HAL_OK) - { - __fatal_error("HAL_PWREx_EnableOverDrive"); - } -#endif - -#if !defined(MICROPY_HW_FLASH_LATENCY) -#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5 -#endif - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, MICROPY_HW_FLASH_LATENCY) != HAL_OK) - { - __fatal_error("HAL_RCC_ClockConfig"); - } - -#if defined(MCU_SERIES_F7) - // The DFU bootloader changes the clocksource register from its default power - // on reset value, so we set it back here, so the clocksources are the same - // whether we were started from DFU or from a power on reset. - - RCC->DCKCFGR2 = 0; -#endif -#if defined(MCU_SERIES_L4) - // Enable MSI-Hardware auto calibration mode with LSE - HAL_RCCEx_EnableMSIPLLMode(); - - RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_I2C1 - |RCC_PERIPHCLK_USB |RCC_PERIPHCLK_ADC - |RCC_PERIPHCLK_RNG |RCC_PERIPHCLK_RTC; - PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; - /* PLLSAI is used to clock USB, ADC, I2C1 and RNG. The frequency is - HSE(8MHz)/PLLM(2)*PLLSAI1N(24)/PLLSAIQ(2) = 48MHz. See the STM32CubeMx - application or the reference manual. */ - PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; - PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLLSAI1; - PeriphClkInitStruct.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; - PeriphClkInitStruct.PLLSAI1.PLLSAI1M = 1; - PeriphClkInitStruct.PLLSAI1.PLLSAI1N = 24; - PeriphClkInitStruct.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; - PeriphClkInitStruct.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; - PeriphClkInitStruct.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; - PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK - |RCC_PLLSAI1_48M2CLK - |RCC_PLLSAI1_ADC1CLK; - - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - { - __fatal_error("HAL_RCCEx_PeriphCLKConfig"); - } - - __PWR_CLK_ENABLE(); - - HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); - - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); -#endif -} - -void HAL_MspInit(void) { -#if defined(MCU_SERIES_F7) - /* Enable I-Cache */ - SCB_EnableICache(); - - /* Enable D-Cache */ - SCB_EnableDCache(); -#endif -} diff --git a/ports/stm32/systick.c b/ports/stm32/systick.c deleted file mode 100644 index c07d0fabce345..0000000000000 --- a/ports/stm32/systick.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/runtime.h" -#include "py/mphal.h" -#include "irq.h" -#include "systick.h" -#include "pybthread.h" - -extern __IO uint32_t uwTick; - -// We provide our own version of HAL_Delay that calls __WFI while waiting, -// and works when interrupts are disabled. This function is intended to be -// used only by the ST HAL functions. -void HAL_Delay(uint32_t Delay) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = uwTick; - // Wraparound of tick is taken care of by 2's complement arithmetic. - while (uwTick - start < Delay) { - // Enter sleep mode, waiting for (at least) the SysTick interrupt. - __WFI(); - } - } else { - // IRQs disabled, use mp_hal_delay_ms routine. - mp_hal_delay_ms(Delay); - } -} - -// Core delay function that does an efficient sleep and may switch thread context. -// If IRQs are enabled then we must have the GIL. -void mp_hal_delay_ms(mp_uint_t Delay) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = uwTick; - // Wraparound of tick is taken care of by 2's complement arithmetic. - while (uwTick - start < Delay) { - // This macro will execute the necessary idle behaviour. It may - // raise an exception, switch threads or enter sleep mode (waiting for - // (at least) the SysTick interrupt). - MICROPY_EVENT_POLL_HOOK - } - } else { - // IRQs disabled, so need to use a busy loop for the delay. - // To prevent possible overflow of the counter we use a double loop. - const uint32_t count_1ms = HAL_RCC_GetSysClockFreq() / 4000; - for (int i = 0; i < Delay; i++) { - for (uint32_t count = 0; ++count <= count_1ms;) { - } - } - } -} - -// delay for given number of microseconds -void mp_hal_delay_us(mp_uint_t usec) { - if (query_irq() == IRQ_STATE_ENABLED) { - // IRQs enabled, so can use systick counter to do the delay - uint32_t start = mp_hal_ticks_us(); - while (mp_hal_ticks_us() - start < usec) { - } - } else { - // IRQs disabled, so need to use a busy loop for the delay - // sys freq is always a multiple of 2MHz, so division here won't lose precision - const uint32_t ucount = HAL_RCC_GetSysClockFreq() / 2000000 * usec / 2; - for (uint32_t count = 0; ++count <= ucount;) { - } - } -} - -bool sys_tick_has_passed(uint32_t start_tick, uint32_t delay_ms) { - return HAL_GetTick() - start_tick >= delay_ms; -} - -// waits until at least delay_ms milliseconds have passed from the sampling of -// startTick. Handles overflow properly. Assumes stc was taken from -// HAL_GetTick() some time before calling this function. -void sys_tick_wait_at_least(uint32_t start_tick, uint32_t delay_ms) { - while (!sys_tick_has_passed(start_tick, delay_ms)) { - __WFI(); // enter sleep mode, waiting for interrupt - } -} - -mp_uint_t mp_hal_ticks_ms(void) { - return uwTick; -} - -// The SysTick timer counts down at 168 MHz, so we can use that knowledge -// to grab a microsecond counter. -// -// We assume that HAL_GetTickis returns milliseconds. -mp_uint_t mp_hal_ticks_us(void) { - mp_uint_t irq_state = disable_irq(); - uint32_t counter = SysTick->VAL; - uint32_t milliseconds = HAL_GetTick(); - uint32_t status = SysTick->CTRL; - enable_irq(irq_state); - - // It's still possible for the countflag bit to get set if the counter was - // reloaded between reading VAL and reading CTRL. With interrupts disabled - // it definitely takes less than 50 HCLK cycles between reading VAL and - // reading CTRL, so the test (counter > 50) is to cover the case where VAL - // is +ve and very close to zero, and the COUNTFLAG bit is also set. - if ((status & SysTick_CTRL_COUNTFLAG_Msk) && counter > 50) { - // This means that the HW reloaded VAL between the time we read VAL and the - // time we read CTRL, which implies that there is an interrupt pending - // to increment the tick counter. - milliseconds++; - } - uint32_t load = SysTick->LOAD; - counter = load - counter; // Convert from decrementing to incrementing - - // ((load + 1) / 1000) is the number of counts per microsecond. - // - // counter / ((load + 1) / 1000) scales from the systick clock to microseconds - // and is the same thing as (counter * 1000) / (load + 1) - return milliseconds * 1000 + (counter * 1000) / (load + 1); -} diff --git a/ports/stm32/systick.h b/ports/stm32/systick.h deleted file mode 100644 index c1def50c29da5..0000000000000 --- a/ports/stm32/systick.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_SYSTICK_H -#define MICROPY_INCLUDED_STMHAL_SYSTICK_H - -void sys_tick_wait_at_least(uint32_t stc, uint32_t delay_ms); -bool sys_tick_has_passed(uint32_t stc, uint32_t delay_ms); - -#endif // MICROPY_INCLUDED_STMHAL_SYSTICK_H diff --git a/ports/stm32/timer.c b/ports/stm32/timer.c deleted file mode 100644 index 96a6baa02df1a..0000000000000 --- a/ports/stm32/timer.c +++ /dev/null @@ -1,1433 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "timer.h" -#include "servo.h" -#include "pin.h" -#include "irq.h" - -/// \moduleref pyb -/// \class Timer - periodically call a function -/// -/// Timers can be used for a great variety of tasks. At the moment, only -/// the simplest case is implemented: that of calling a function periodically. -/// -/// Each timer consists of a counter that counts up at a certain rate. The rate -/// at which it counts is the peripheral clock frequency (in Hz) divided by the -/// timer prescaler. When the counter reaches the timer period it triggers an -/// event, and the counter resets back to zero. By using the callback method, -/// the timer event can call a Python function. -/// -/// Example usage to toggle an LED at a fixed frequency: -/// -/// tim = pyb.Timer(4) # create a timer object using timer 4 -/// tim.init(freq=2) # trigger at 2Hz -/// tim.callback(lambda t:pyb.LED(1).toggle()) -/// -/// Further examples: -/// -/// tim = pyb.Timer(4, freq=100) # freq in Hz -/// tim = pyb.Timer(4, prescaler=0, period=99) -/// tim.counter() # get counter (can also set) -/// tim.prescaler(2) # set prescaler (can also get) -/// tim.period(199) # set period (can also get) -/// tim.callback(lambda t: ...) # set callback for update interrupt (t=tim instance) -/// tim.callback(None) # clear callback -/// -/// *Note:* Timer 3 is used for fading the blue LED. Timer 5 controls -/// the servo driver, and Timer 6 is used for timed ADC/DAC reading/writing. -/// It is recommended to use the other timers in your programs. - -// The timers can be used by multiple drivers, and need a common point for -// the interrupts to be dispatched, so they are all collected here. -// -// TIM3: -// - LED 4, PWM to set the LED intensity -// -// TIM5: -// - servo controller, PWM -// -// TIM6: -// - ADC, DAC for read_timed and write_timed - -typedef enum { - CHANNEL_MODE_PWM_NORMAL, - CHANNEL_MODE_PWM_INVERTED, - CHANNEL_MODE_OC_TIMING, - CHANNEL_MODE_OC_ACTIVE, - CHANNEL_MODE_OC_INACTIVE, - CHANNEL_MODE_OC_TOGGLE, - CHANNEL_MODE_OC_FORCED_ACTIVE, - CHANNEL_MODE_OC_FORCED_INACTIVE, - CHANNEL_MODE_IC, - CHANNEL_MODE_ENC_A, - CHANNEL_MODE_ENC_B, - CHANNEL_MODE_ENC_AB, -} pyb_channel_mode; - -STATIC const struct { - qstr name; - uint32_t oc_mode; -} channel_mode_info[] = { - { MP_QSTR_PWM, TIM_OCMODE_PWM1 }, - { MP_QSTR_PWM_INVERTED, TIM_OCMODE_PWM2 }, - { MP_QSTR_OC_TIMING, TIM_OCMODE_TIMING }, - { MP_QSTR_OC_ACTIVE, TIM_OCMODE_ACTIVE }, - { MP_QSTR_OC_INACTIVE, TIM_OCMODE_INACTIVE }, - { MP_QSTR_OC_TOGGLE, TIM_OCMODE_TOGGLE }, - { MP_QSTR_OC_FORCED_ACTIVE, TIM_OCMODE_FORCED_ACTIVE }, - { MP_QSTR_OC_FORCED_INACTIVE, TIM_OCMODE_FORCED_INACTIVE }, - { MP_QSTR_IC, 0 }, - { MP_QSTR_ENC_A, TIM_ENCODERMODE_TI1 }, - { MP_QSTR_ENC_B, TIM_ENCODERMODE_TI2 }, - { MP_QSTR_ENC_AB, TIM_ENCODERMODE_TI12 }, -}; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint8_t channel; - uint8_t mode; - mp_obj_t callback; - struct _pyb_timer_channel_obj_t *next; -} pyb_timer_channel_obj_t; - -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint8_t tim_id; - uint8_t is_32bit; - mp_obj_t callback; - TIM_HandleTypeDef tim; - IRQn_Type irqn; - pyb_timer_channel_obj_t *channel; -} pyb_timer_obj_t; - -// The following yields TIM_IT_UPDATE when channel is zero and -// TIM_IT_CC1..TIM_IT_CC4 when channel is 1..4 -#define TIMER_IRQ_MASK(channel) (1 << (channel)) -#define TIMER_CNT_MASK(self) ((self)->is_32bit ? 0xffffffff : 0xffff) -#define TIMER_CHANNEL(self) ((((self)->channel) - 1) << 2) - -TIM_HandleTypeDef TIM5_Handle; -TIM_HandleTypeDef TIM6_Handle; - -#define PYB_TIMER_OBJ_ALL_NUM MP_ARRAY_SIZE(MP_STATE_PORT(pyb_timer_obj_all)) - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in); -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback); -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback); - -void timer_init0(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - MP_STATE_PORT(pyb_timer_obj_all)[i] = NULL; - } -} - -// unregister all interrupt sources -void timer_deinit(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_t *tim = MP_STATE_PORT(pyb_timer_obj_all)[i]; - if (tim != NULL) { - pyb_timer_deinit(tim); - } - } -} - -// TIM5 is set-up for the servo controller -// This function inits but does not start the timer -void timer_tim5_init(void) { - // TIM5 clock enable - __TIM5_CLK_ENABLE(); - - // set up and enable interrupt - HAL_NVIC_SetPriority(TIM5_IRQn, IRQ_PRI_TIM5, IRQ_SUBPRI_TIM5); - HAL_NVIC_EnableIRQ(TIM5_IRQn); - - // PWM clock configuration - TIM5_Handle.Instance = TIM5; - TIM5_Handle.Init.Period = 2000 - 1; // timer cycles at 50Hz - TIM5_Handle.Init.Prescaler = (timer_get_source_freq(5) / 100000) - 1; // timer runs at 100kHz - TIM5_Handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - TIM5_Handle.Init.CounterMode = TIM_COUNTERMODE_UP; - - HAL_TIM_PWM_Init(&TIM5_Handle); -} - -#if defined(TIM6) -// Init TIM6 with a counter-overflow at the given frequency (given in Hz) -// TIM6 is used by the DAC and ADC for auto sampling at a given frequency -// This function inits but does not start the timer -TIM_HandleTypeDef *timer_tim6_init(uint freq) { - // TIM6 clock enable - __TIM6_CLK_ENABLE(); - - // Timer runs at SystemCoreClock / 2 - // Compute the prescaler value so TIM6 triggers at freq-Hz - uint32_t period = MAX(1, timer_get_source_freq(6) / freq); - uint32_t prescaler = 1; - while (period > 0xffff) { - period >>= 1; - prescaler <<= 1; - } - - // Time base clock configuration - TIM6_Handle.Instance = TIM6; - TIM6_Handle.Init.Period = period - 1; - TIM6_Handle.Init.Prescaler = prescaler - 1; - TIM6_Handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; // unused for TIM6 - TIM6_Handle.Init.CounterMode = TIM_COUNTERMODE_UP; // unused for TIM6 - HAL_TIM_Base_Init(&TIM6_Handle); - - return &TIM6_Handle; -} -#endif - -// Interrupt dispatch -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - #if MICROPY_HW_ENABLE_SERVO - if (htim == &TIM5_Handle) { - servo_timer_irq_callback(); - } - #endif -} - -// Get the frequency (in Hz) of the source clock for the given timer. -// On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. -// If the APB prescaler is 1, then the timer clock is equal to its respective -// APB clock. Otherwise (APB prescaler > 1) the timer clock is twice its -// respective APB clock. See DM00031020 Rev 4, page 115. -uint32_t timer_get_source_freq(uint32_t tim_id) { - uint32_t source; - if (tim_id == 1 || (8 <= tim_id && tim_id <= 11)) { - // TIM{1,8,9,10,11} are on APB2 - source = HAL_RCC_GetPCLK2Freq(); - if ((uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3) != RCC_HCLK_DIV1) { - source *= 2; - } - } else { - // TIM{2,3,4,5,6,7,12,13,14} are on APB1 - source = HAL_RCC_GetPCLK1Freq(); - if ((uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1) != RCC_HCLK_DIV1) { - source *= 2; - } - } - return source; -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC const mp_obj_type_t pyb_timer_channel_type; - -// This is the largest value that we can multiply by 100 and have the result -// fit in a uint32_t. -#define MAX_PERIOD_DIV_100 42949672 - -// computes prescaler and period so TIM triggers at freq-Hz -STATIC uint32_t compute_prescaler_period_from_freq(pyb_timer_obj_t *self, mp_obj_t freq_in, uint32_t *period_out) { - uint32_t source_freq = timer_get_source_freq(self->tim_id); - uint32_t prescaler = 1; - uint32_t period; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(freq_in, &mp_type_float)) { - float freq = mp_obj_get_float(freq_in); - if (freq <= 0) { - goto bad_freq; - } - while (freq < 1 && prescaler < 6553) { - prescaler *= 10; - freq *= 10; - } - period = (float)source_freq / freq; - #endif - } else { - mp_int_t freq = mp_obj_get_int(freq_in); - if (freq <= 0) { - goto bad_freq; - bad_freq: - mp_raise_ValueError("must have positive freq"); - } - period = source_freq / freq; - } - period = MAX(1, period); - while (period > TIMER_CNT_MASK(self)) { - // if we can divide exactly, do that first - if (period % 5 == 0) { - prescaler *= 5; - period /= 5; - } else if (period % 3 == 0) { - prescaler *= 3; - period /= 3; - } else { - // may not divide exactly, but loses minimal precision - prescaler <<= 1; - period >>= 1; - } - } - *period_out = (period - 1) & TIMER_CNT_MASK(self); - return (prescaler - 1) & 0xffff; -} - -// Helper function for determining the period used for calculating percent -STATIC uint32_t compute_period(pyb_timer_obj_t *self) { - // In center mode, compare == period corresponds to 100% - // In edge mode, compare == (period + 1) corresponds to 100% - uint32_t period = (__HAL_TIM_GetAutoreload(&self->tim) & TIMER_CNT_MASK(self)); - if (period != 0xffffffff) { - if (self->tim.Init.CounterMode == TIM_COUNTERMODE_UP || - self->tim.Init.CounterMode == TIM_COUNTERMODE_DOWN) { - // Edge mode - period++; - } - } - return period; -} - -// Helper function to compute PWM value from timer period and percent value. -// 'percent_in' can be an int or a float between 0 and 100 (out of range -// values are clamped). -STATIC uint32_t compute_pwm_value_from_percent(uint32_t period, mp_obj_t percent_in) { - uint32_t cmp; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(percent_in, &mp_type_float)) { - mp_float_t percent = mp_obj_get_float(percent_in); - if (percent <= 0.0) { - cmp = 0; - } else if (percent >= 100.0) { - cmp = period; - } else { - cmp = percent / 100.0 * ((mp_float_t)period); - } - #endif - } else { - // For integer arithmetic, if period is large and 100*period will - // overflow, then divide period before multiplying by cmp. Otherwise - // do it the other way round to retain precision. - mp_int_t percent = mp_obj_get_int(percent_in); - if (percent <= 0) { - cmp = 0; - } else if (percent >= 100) { - cmp = period; - } else if (period > MAX_PERIOD_DIV_100) { - cmp = (uint32_t)percent * (period / 100); - } else { - cmp = ((uint32_t)percent * period) / 100; - } - } - return cmp; -} - -// Helper function to compute percentage from timer perion and PWM value. -STATIC mp_obj_t compute_percent_from_pwm_value(uint32_t period, uint32_t cmp) { - #if MICROPY_PY_BUILTINS_FLOAT - mp_float_t percent; - if (cmp >= period) { - percent = 100.0; - } else { - percent = (mp_float_t)cmp * 100.0 / ((mp_float_t)period); - } - return mp_obj_new_float(percent); - #else - mp_int_t percent; - if (cmp >= period) { - percent = 100; - } else if (cmp > MAX_PERIOD_DIV_100) { - percent = cmp / (period / 100); - } else { - percent = cmp * 100 / period; - } - return mp_obj_new_int(percent); - #endif -} - -// Computes the 8-bit value for the DTG field in the BDTR register. -// -// 1 tick = 1 count of the timer's clock (source_freq) divided by div. -// 0-128 ticks in inrements of 1 -// 128-256 ticks in increments of 2 -// 256-512 ticks in increments of 8 -// 512-1008 ticks in increments of 16 -STATIC uint32_t compute_dtg_from_ticks(mp_int_t ticks) { - if (ticks <= 0) { - return 0; - } - if (ticks < 128) { - return ticks; - } - if (ticks < 256) { - return 0x80 | ((ticks - 128) / 2); - } - if (ticks < 512) { - return 0xC0 | ((ticks - 256) / 8); - } - if (ticks < 1008) { - return 0xE0 | ((ticks - 512) / 16); - } - return 0xFF; -} - -// Given the 8-bit value stored in the DTG field of the BDTR register, compute -// the number of ticks. -STATIC mp_int_t compute_ticks_from_dtg(uint32_t dtg) { - if ((dtg & 0x80) == 0) { - return dtg & 0x7F; - } - if ((dtg & 0xC0) == 0x80) { - return 128 + ((dtg & 0x3F) * 2); - } - if ((dtg & 0xE0) == 0xC0) { - return 256 + ((dtg & 0x1F) * 8); - } - return 512 + ((dtg & 0x1F) * 16); -} - -STATIC void config_deadtime(pyb_timer_obj_t *self, mp_int_t ticks) { - TIM_BreakDeadTimeConfigTypeDef deadTimeConfig; - deadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; - deadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - deadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - deadTimeConfig.DeadTime = compute_dtg_from_ticks(ticks); - deadTimeConfig.BreakState = TIM_BREAK_DISABLE; - deadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW; - deadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - HAL_TIMEx_ConfigBreakDeadTime(&self->tim, &deadTimeConfig); -} - -TIM_HandleTypeDef *pyb_timer_get_handle(mp_obj_t timer) { - if (mp_obj_get_type(timer) != &pyb_timer_type) { - mp_raise_ValueError("need a Timer object"); - } - pyb_timer_obj_t *self = timer; - return &self->tim; -} - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *self = self_in; - - if (self->tim.State == HAL_TIM_STATE_RESET) { - mp_printf(print, "Timer(%u)", self->tim_id); - } else { - uint32_t prescaler = self->tim.Instance->PSC & 0xffff; - uint32_t period = __HAL_TIM_GetAutoreload(&self->tim) & TIMER_CNT_MASK(self); - // for efficiency, we compute and print freq as an int (not a float) - uint32_t freq = timer_get_source_freq(self->tim_id) / ((prescaler + 1) * (period + 1)); - mp_printf(print, "Timer(%u, freq=%u, prescaler=%u, period=%u, mode=%s, div=%u", - self->tim_id, - freq, - prescaler, - period, - self->tim.Init.CounterMode == TIM_COUNTERMODE_UP ? "UP" : - self->tim.Init.CounterMode == TIM_COUNTERMODE_DOWN ? "DOWN" : "CENTER", - self->tim.Init.ClockDivision == TIM_CLOCKDIVISION_DIV4 ? 4 : - self->tim.Init.ClockDivision == TIM_CLOCKDIVISION_DIV2 ? 2 : 1); - - #if defined(IS_TIM_ADVANCED_INSTANCE) - if (IS_TIM_ADVANCED_INSTANCE(self->tim.Instance)) - #elif defined(IS_TIM_BREAK_INSTANCE) - if (IS_TIM_BREAK_INSTANCE(self->tim.Instance)) - #else - if (0) - #endif - { - mp_printf(print, ", deadtime=%u", - compute_ticks_from_dtg(self->tim.Instance->BDTR & TIM_BDTR_DTG)); - } - mp_print_str(print, ")"); - } -} - -/// \method init(*, freq, prescaler, period) -/// Initialise the timer. Initialisation must be either by frequency (in Hz) -/// or by prescaler and period: -/// -/// tim.init(freq=100) # set the timer to trigger at 100Hz -/// tim.init(prescaler=83, period=999) # set the prescaler and period directly -/// -/// Keyword arguments: -/// -/// - `freq` - specifies the periodic frequency of the timer. You migh also -/// view this as the frequency with which the timer goes through -/// one complete cycle. -/// -/// - `prescaler` [0-0xffff] - specifies the value to be loaded into the -/// timer's Prescaler Register (PSC). The timer clock source is divided by -/// (`prescaler + 1`) to arrive at the timer clock. Timers 2-7 and 12-14 -/// have a clock source of 84 MHz (pyb.freq()[2] * 2), and Timers 1, and 8-11 -/// have a clock source of 168 MHz (pyb.freq()[3] * 2). -/// -/// - `period` [0-0xffff] for timers 1, 3, 4, and 6-15. [0-0x3fffffff] for timers 2 & 5. -/// Specifies the value to be loaded into the timer's AutoReload -/// Register (ARR). This determines the period of the timer (i.e. when the -/// counter cycles). The timer counter will roll-over after `period + 1` -/// timer clock cycles. -/// -/// - `mode` can be one of: -/// - `Timer.UP` - configures the timer to count from 0 to ARR (default) -/// - `Timer.DOWN` - configures the timer to count from ARR down to 0. -/// - `Timer.CENTER` - confgures the timer to count from 0 to ARR and -/// then back down to 0. -/// -/// - `div` can be one of 1, 2, or 4. Divides the timer clock to determine -/// the sampling clock used by the digital filters. -/// -/// - `callback` - as per Timer.callback() -/// -/// - `deadtime` - specifies the amount of "dead" or inactive time between -/// transitions on complimentary channels (both channels will be inactive) -/// for this time). `deadtime` may be an integer between 0 and 1008, with -/// the following restrictions: 0-128 in steps of 1. 128-256 in steps of -/// 2, 256-512 in steps of 8, and 512-1008 in steps of 16. `deadime` -/// measures ticks of `source_freq` divided by `div` clock ticks. -/// `deadtime` is only available on timers 1 and 8. -/// -/// You must either specify freq or both of period and prescaler. -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = TIM_COUNTERMODE_UP} }, - { MP_QSTR_div, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_deadtime, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // set the TIM configuration values - TIM_Base_InitTypeDef *init = &self->tim.Init; - - if (args[0].u_obj != mp_const_none) { - // set prescaler and period from desired frequency - init->Prescaler = compute_prescaler_period_from_freq(self, args[0].u_obj, &init->Period); - } else if (args[1].u_int != 0xffffffff && args[2].u_int != 0xffffffff) { - // set prescaler and period directly - init->Prescaler = args[1].u_int; - init->Period = args[2].u_int; - } else { - mp_raise_TypeError("must specify either freq, or prescaler and period"); - } - - init->CounterMode = args[3].u_int; - if (!IS_TIM_COUNTER_MODE(init->CounterMode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid mode (%d)", init->CounterMode)); - } - - init->ClockDivision = args[4].u_int == 2 ? TIM_CLOCKDIVISION_DIV2 : - args[4].u_int == 4 ? TIM_CLOCKDIVISION_DIV4 : - TIM_CLOCKDIVISION_DIV1; - - init->RepetitionCounter = 0; - - // enable TIM clock - switch (self->tim_id) { - case 1: __TIM1_CLK_ENABLE(); break; - case 2: __TIM2_CLK_ENABLE(); break; - case 3: __TIM3_CLK_ENABLE(); break; - case 4: __TIM4_CLK_ENABLE(); break; - case 5: __TIM5_CLK_ENABLE(); break; - #if defined(TIM6) - case 6: __TIM6_CLK_ENABLE(); break; - #endif - #if defined(TIM7) - case 7: __TIM7_CLK_ENABLE(); break; - #endif - #if defined(TIM8) - case 8: __TIM8_CLK_ENABLE(); break; - #endif - #if defined(TIM9) - case 9: __TIM9_CLK_ENABLE(); break; - #endif - #if defined(TIM10) - case 10: __TIM10_CLK_ENABLE(); break; - #endif - #if defined(TIM11) - case 11: __TIM11_CLK_ENABLE(); break; - #endif - #if defined(TIM12) - case 12: __TIM12_CLK_ENABLE(); break; - #endif - #if defined(TIM13) - case 13: __TIM13_CLK_ENABLE(); break; - #endif - #if defined(TIM14) - case 14: __TIM14_CLK_ENABLE(); break; - #endif - #if defined(TIM15) - case 15: __TIM15_CLK_ENABLE(); break; - #endif - #if defined(TIM16) - case 16: __TIM16_CLK_ENABLE(); break; - #endif - #if defined(TIM17) - case 17: __TIM17_CLK_ENABLE(); break; - #endif - } - - // set IRQ priority (if not a special timer) - if (self->tim_id != 5) { - HAL_NVIC_SetPriority(self->irqn, IRQ_PRI_TIMX, IRQ_SUBPRI_TIMX); - if (self->tim_id == 1) { - HAL_NVIC_SetPriority(TIM1_CC_IRQn, IRQ_PRI_TIMX, IRQ_SUBPRI_TIMX); - #if defined(TIM8) - } else if (self->tim_id == 8) { - HAL_NVIC_SetPriority(TIM8_CC_IRQn, IRQ_PRI_TIMX, IRQ_SUBPRI_TIMX); - #endif - } - } - - // init TIM - HAL_TIM_Base_Init(&self->tim); - #if defined(IS_TIM_ADVANCED_INSTANCE) - if (IS_TIM_ADVANCED_INSTANCE(self->tim.Instance)) { - #elif defined(IS_TIM_BREAK_INSTANCE) - if (IS_TIM_BREAK_INSTANCE(self->tim.Instance)) { - #else - if (0) { - #endif - config_deadtime(self, args[6].u_int); - } - - // Enable ARPE so that the auto-reload register is buffered. - // This allows to smoothly change the frequency of the timer. - self->tim.Instance->CR1 |= TIM_CR1_ARPE; - - // Start the timer running - if (args[5].u_obj == mp_const_none) { - HAL_TIM_Base_Start(&self->tim); - } else { - pyb_timer_callback(self, args[5].u_obj); - } - - return mp_const_none; -} - -// This table encodes the timer instance and irq number. -// It assumes that timer instance pointer has the lower 8 bits cleared. -#define TIM_ENTRY(id, irq) [id - 1] = (uint32_t)TIM##id | irq -STATIC const uint32_t tim_instance_table[MICROPY_HW_MAX_TIMER] = { - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - TIM_ENTRY(1, TIM1_UP_TIM10_IRQn), - #elif defined(MCU_SERIES_L4) - TIM_ENTRY(1, TIM1_UP_TIM16_IRQn), - #endif - TIM_ENTRY(2, TIM2_IRQn), - TIM_ENTRY(3, TIM3_IRQn), - TIM_ENTRY(4, TIM4_IRQn), - TIM_ENTRY(5, TIM5_IRQn), - #if defined(TIM6) - TIM_ENTRY(6, TIM6_DAC_IRQn), - #endif - #if defined(TIM7) - TIM_ENTRY(7, TIM7_IRQn), - #endif - #if defined(TIM8) - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - TIM_ENTRY(8, TIM8_UP_TIM13_IRQn), - #elif defined(MCU_SERIES_L4) - TIM_ENTRY(8, TIM8_UP_IRQn), - #endif - #endif - #if defined(TIM9) - TIM_ENTRY(9, TIM1_BRK_TIM9_IRQn), - #endif - #if defined(TIM10) - TIM_ENTRY(10, TIM1_UP_TIM10_IRQn), - #endif - #if defined(TIM11) - TIM_ENTRY(11, TIM1_TRG_COM_TIM11_IRQn), - #endif - #if defined(TIM12) - TIM_ENTRY(12, TIM8_BRK_TIM12_IRQn), - #endif - #if defined(TIM13) - TIM_ENTRY(13, TIM8_UP_TIM13_IRQn), - #endif - #if defined(TIM14) - TIM_ENTRY(14, TIM8_TRG_COM_TIM14_IRQn), - #endif - #if defined(TIM15) - TIM_ENTRY(15, TIM1_BRK_TIM15_IRQn), - #endif - #if defined(TIM16) - TIM_ENTRY(16, TIM1_UP_TIM16_IRQn), - #endif - #if defined(TIM17) - TIM_ENTRY(17, TIM1_TRG_COM_TIM17_IRQn), - #endif -}; -#undef TIM_ENTRY - -/// \classmethod \constructor(id, ...) -/// Construct a new timer object of the given id. If additional -/// arguments are given, then the timer is initialised by `init(...)`. -/// `id` can be 1 to 14, excluding 3. -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the timer id - mp_int_t tim_id = mp_obj_get_int(args[0]); - - // check if the timer exists - if (tim_id <= 0 || tim_id > MICROPY_HW_MAX_TIMER || tim_instance_table[tim_id - 1] == 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Timer(%d) doesn't exist", tim_id)); - } - - pyb_timer_obj_t *tim; - if (MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1] == NULL) { - // create new Timer object - tim = m_new_obj(pyb_timer_obj_t); - memset(tim, 0, sizeof(*tim)); - tim->base.type = &pyb_timer_type; - tim->tim_id = tim_id; - tim->is_32bit = tim_id == 2 || tim_id == 5; - tim->callback = mp_const_none; - uint32_t ti = tim_instance_table[tim_id - 1]; - tim->tim.Instance = (TIM_TypeDef*)(ti & 0xffffff00); - tim->irqn = ti & 0xff; - MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1] = tim; - } else { - // reference existing Timer object - tim = MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1]; - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -// timer.deinit() -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - - // Disable the base interrupt - pyb_timer_callback(self_in, mp_const_none); - - pyb_timer_channel_obj_t *chan = self->channel; - self->channel = NULL; - - // Disable the channel interrupts - while (chan != NULL) { - pyb_timer_channel_callback(chan, mp_const_none); - pyb_timer_channel_obj_t *prev_chan = chan; - chan = chan->next; - prev_chan->next = NULL; - } - - self->tim.State = HAL_TIM_STATE_RESET; - self->tim.Instance->CCER = 0x0000; // disable all capture/compare outputs - self->tim.Instance->CR1 = 0x0000; // disable the timer and reset its state - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -/// \method channel(channel, mode, ...) -/// -/// If only a channel number is passed, then a previously initialized channel -/// object is returned (or `None` if there is no previous channel). -/// -/// Othwerwise, a TimerChannel object is initialized and returned. -/// -/// Each channel can be configured to perform pwm, output compare, or -/// input capture. All channels share the same underlying timer, which means -/// that they share the same timer clock. -/// -/// Keyword arguments: -/// -/// - `mode` can be one of: -/// - `Timer.PWM` - configure the timer in PWM mode (active high). -/// - `Timer.PWM_INVERTED` - configure the timer in PWM mode (active low). -/// - `Timer.OC_TIMING` - indicates that no pin is driven. -/// - `Timer.OC_ACTIVE` - the pin will be made active when a compare -/// match occurs (active is determined by polarity) -/// - `Timer.OC_INACTIVE` - the pin will be made inactive when a compare -/// match occurs. -/// - `Timer.OC_TOGGLE` - the pin will be toggled when an compare match occurs. -/// - `Timer.OC_FORCED_ACTIVE` - the pin is forced active (compare match is ignored). -/// - `Timer.OC_FORCED_INACTIVE` - the pin is forced inactive (compare match is ignored). -/// - `Timer.IC` - configure the timer in Input Capture mode. -/// - `Timer.ENC_A` --- configure the timer in Encoder mode. The counter only changes when CH1 changes. -/// - `Timer.ENC_B` --- configure the timer in Encoder mode. The counter only changes when CH2 changes. -/// - `Timer.ENC_AB` --- configure the timer in Encoder mode. The counter changes when CH1 or CH2 changes. -/// -/// - `callback` - as per TimerChannel.callback() -/// -/// - `pin` None (the default) or a Pin object. If specified (and not None) -/// this will cause the alternate function of the the indicated pin -/// to be configured for this timer channel. An error will be raised if -/// the pin doesn't support any alternate functions for this timer channel. -/// -/// Keyword arguments for Timer.PWM modes: -/// -/// - `pulse_width` - determines the initial pulse width value to use. -/// - `pulse_width_percent` - determines the initial pulse width percentage to use. -/// -/// Keyword arguments for Timer.OC modes: -/// -/// - `compare` - determines the initial value of the compare register. -/// -/// - `polarity` can be one of: -/// - `Timer.HIGH` - output is active high -/// - `Timer.LOW` - output is acive low -/// -/// Optional keyword arguments for Timer.IC modes: -/// -/// - `polarity` can be one of: -/// - `Timer.RISING` - captures on rising edge. -/// - `Timer.FALLING` - captures on falling edge. -/// - `Timer.BOTH` - captures on both edges. -/// -/// Note that capture only works on the primary channel, and not on the -/// complimentary channels. -/// -/// Notes for Timer.ENC modes: -/// -/// - Requires 2 pins, so one or both pins will need to be configured to use -/// the appropriate timer AF using the Pin API. -/// - Read the encoder value using the timer.counter() method. -/// - Only works on CH1 and CH2 (and not on CH1N or CH2N) -/// - The channel number is ignored when setting the encoder mode. -/// -/// PWM Example: -/// -/// timer = pyb.Timer(2, freq=1000) -/// ch2 = timer.channel(2, pyb.Timer.PWM, pin=pyb.Pin.board.X2, pulse_width=210000) -/// ch3 = timer.channel(3, pyb.Timer.PWM, pin=pyb.Pin.board.X3, pulse_width=420000) -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pulse_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pulse_width_percent, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_compare, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - }; - - pyb_timer_obj_t *self = pos_args[0]; - mp_int_t channel = mp_obj_get_int(pos_args[1]); - - if (channel < 1 || channel > 4) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid channel (%d)", channel)); - } - - pyb_timer_channel_obj_t *chan = self->channel; - pyb_timer_channel_obj_t *prev_chan = NULL; - - while (chan != NULL) { - if (chan->channel == channel) { - break; - } - prev_chan = chan; - chan = chan->next; - } - - // If only the channel number is given return the previously allocated - // channel (or None if no previous channel). - if (n_args == 2 && kw_args->used == 0) { - if (chan) { - return chan; - } - return mp_const_none; - } - - // If there was already a channel, then remove it from the list. Note that - // the order we do things here is important so as to appear atomic to - // the IRQ handler. - if (chan) { - // Turn off any IRQ associated with the channel. - pyb_timer_channel_callback(chan, mp_const_none); - - // Unlink the channel from the list. - if (prev_chan) { - prev_chan->next = chan->next; - } - self->channel = chan->next; - chan->next = NULL; - } - - // Allocate and initialize a new channel - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - chan = m_new_obj(pyb_timer_channel_obj_t); - memset(chan, 0, sizeof(*chan)); - chan->base.type = &pyb_timer_channel_type; - chan->timer = self; - chan->channel = channel; - chan->mode = args[0].u_int; - chan->callback = args[1].u_obj; - - mp_obj_t pin_obj = args[2].u_obj; - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("pin argument needs to be be a Pin type"); - } - const pin_obj_t *pin = pin_obj; - const pin_af_obj_t *af = pin_find_af(pin, AF_FN_TIM, self->tim_id); - if (af == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have an af for Timer(%d)", pin->name, self->tim_id)); - } - // pin.init(mode=AF_PP, af=idx) - const mp_obj_t args2[6] = { - (mp_obj_t)&pin_init_obj, - pin_obj, - MP_OBJ_NEW_QSTR(MP_QSTR_mode), MP_OBJ_NEW_SMALL_INT(GPIO_MODE_AF_PP), - MP_OBJ_NEW_QSTR(MP_QSTR_af), MP_OBJ_NEW_SMALL_INT(af->idx) - }; - mp_call_method_n_kw(0, 2, args2); - } - - // Link the channel to the timer before we turn the channel on. - // Note that this needs to appear atomic to the IRQ handler (the write - // to self->channel is atomic, so we're good, but I thought I'd mention - // in case this was ever changed in the future). - chan->next = self->channel; - self->channel = chan; - - switch (chan->mode) { - - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: { - TIM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - if (args[4].u_obj != mp_const_none) { - // pulse width percent given - uint32_t period = compute_period(self); - oc_config.Pulse = compute_pwm_value_from_percent(period, args[4].u_obj); - } else { - // use absolute pulse width value (defaults to 0 if nothing given) - oc_config.Pulse = args[3].u_int; - } - oc_config.OCPolarity = TIM_OCPOLARITY_HIGH; - oc_config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - oc_config.OCFastMode = TIM_OCFAST_DISABLE; - oc_config.OCIdleState = TIM_OCIDLESTATE_SET; - oc_config.OCNIdleState = TIM_OCNIDLESTATE_SET; - - HAL_TIM_PWM_ConfigChannel(&self->tim, &oc_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_PWM_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - // Start the complimentary channel too (if its supported) - if (IS_TIM_CCXN_INSTANCE(self->tim.Instance, TIMER_CHANNEL(chan))) { - HAL_TIMEx_PWMN_Start(&self->tim, TIMER_CHANNEL(chan)); - } - break; - } - - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - case CHANNEL_MODE_OC_FORCED_ACTIVE: - case CHANNEL_MODE_OC_FORCED_INACTIVE: { - TIM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - oc_config.Pulse = args[5].u_int; - oc_config.OCPolarity = args[6].u_int; - if (oc_config.OCPolarity == 0xffffffff) { - oc_config.OCPolarity = TIM_OCPOLARITY_HIGH; - } - if (oc_config.OCPolarity == TIM_OCPOLARITY_HIGH) { - oc_config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - } else { - oc_config.OCNPolarity = TIM_OCNPOLARITY_LOW; - } - oc_config.OCFastMode = TIM_OCFAST_DISABLE; - oc_config.OCIdleState = TIM_OCIDLESTATE_SET; - oc_config.OCNIdleState = TIM_OCNIDLESTATE_SET; - - if (!IS_TIM_OC_POLARITY(oc_config.OCPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", oc_config.OCPolarity)); - } - HAL_TIM_OC_ConfigChannel(&self->tim, &oc_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_OC_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - // Start the complimentary channel too (if its supported) - if (IS_TIM_CCXN_INSTANCE(self->tim.Instance, TIMER_CHANNEL(chan))) { - HAL_TIMEx_OCN_Start(&self->tim, TIMER_CHANNEL(chan)); - } - break; - } - - case CHANNEL_MODE_IC: { - TIM_IC_InitTypeDef ic_config; - - ic_config.ICPolarity = args[6].u_int; - if (ic_config.ICPolarity == 0xffffffff) { - ic_config.ICPolarity = TIM_ICPOLARITY_RISING; - } - ic_config.ICSelection = TIM_ICSELECTION_DIRECTTI; - ic_config.ICPrescaler = TIM_ICPSC_DIV1; - ic_config.ICFilter = 0; - - if (!IS_TIM_IC_POLARITY(ic_config.ICPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", ic_config.ICPolarity)); - } - HAL_TIM_IC_ConfigChannel(&self->tim, &ic_config, TIMER_CHANNEL(chan)); - if (chan->callback == mp_const_none) { - HAL_TIM_IC_Start(&self->tim, TIMER_CHANNEL(chan)); - } else { - pyb_timer_channel_callback(chan, chan->callback); - } - break; - } - - case CHANNEL_MODE_ENC_A: - case CHANNEL_MODE_ENC_B: - case CHANNEL_MODE_ENC_AB: { - TIM_Encoder_InitTypeDef enc_config; - - enc_config.EncoderMode = channel_mode_info[chan->mode].oc_mode; - enc_config.IC1Polarity = args[6].u_int; - if (enc_config.IC1Polarity == 0xffffffff) { - enc_config.IC1Polarity = TIM_ICPOLARITY_RISING; - } - enc_config.IC2Polarity = enc_config.IC1Polarity; - enc_config.IC1Selection = TIM_ICSELECTION_DIRECTTI; - enc_config.IC2Selection = TIM_ICSELECTION_DIRECTTI; - enc_config.IC1Prescaler = TIM_ICPSC_DIV1; - enc_config.IC2Prescaler = TIM_ICPSC_DIV1; - enc_config.IC1Filter = 0; - enc_config.IC2Filter = 0; - - if (!IS_TIM_IC_POLARITY(enc_config.IC1Polarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid polarity (%d)", enc_config.IC1Polarity)); - } - // Only Timers 1, 2, 3, 4, 5, and 8 support encoder mode - if (self->tim.Instance != TIM1 - && self->tim.Instance != TIM2 - && self->tim.Instance != TIM3 - && self->tim.Instance != TIM4 - && self->tim.Instance != TIM5 - #if defined(TIM8) - && self->tim.Instance != TIM8 - #endif - ) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "encoder not supported on timer %d", self->tim_id)); - } - - // Disable & clear the timer interrupt so that we don't trigger - // an interrupt by initializing the timer. - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - HAL_TIM_Encoder_Init(&self->tim, &enc_config); - __HAL_TIM_SetCounter(&self->tim, 0); - if (self->callback != mp_const_none) { - __HAL_TIM_CLEAR_FLAG(&self->tim, TIM_IT_UPDATE); - __HAL_TIM_ENABLE_IT(&self->tim, TIM_IT_UPDATE); - } - HAL_TIM_Encoder_Start(&self->tim, TIM_CHANNEL_ALL); - break; - } - - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid mode (%d)", chan->mode)); - } - - return chan; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -/// \method counter([value]) -/// Get or set the timer counter. -STATIC mp_obj_t pyb_timer_counter(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->tim.Instance->CNT); - } else { - // set - __HAL_TIM_SetCounter(&self->tim, mp_obj_get_int(args[1])); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_counter_obj, 1, 2, pyb_timer_counter); - -/// \method source_freq() -/// Get the frequency of the source of the timer. -STATIC mp_obj_t pyb_timer_source_freq(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - uint32_t source_freq = timer_get_source_freq(self->tim_id); - return mp_obj_new_int(source_freq); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_source_freq_obj, pyb_timer_source_freq); - -/// \method freq([value]) -/// Get or set the frequency for the timer (changes prescaler and period if set). -STATIC mp_obj_t pyb_timer_freq(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - uint32_t prescaler = self->tim.Instance->PSC & 0xffff; - uint32_t period = __HAL_TIM_GetAutoreload(&self->tim) & TIMER_CNT_MASK(self); - uint32_t source_freq = timer_get_source_freq(self->tim_id); - uint32_t divide = ((prescaler + 1) * (period + 1)); - #if MICROPY_PY_BUILTINS_FLOAT - if (source_freq % divide != 0) { - return mp_obj_new_float((float)source_freq / (float)divide); - } else - #endif - { - return mp_obj_new_int(source_freq / divide); - } - } else { - // set - uint32_t period; - uint32_t prescaler = compute_prescaler_period_from_freq(self, args[1], &period); - self->tim.Instance->PSC = prescaler; - __HAL_TIM_SetAutoreload(&self->tim, period); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_freq_obj, 1, 2, pyb_timer_freq); - -/// \method prescaler([value]) -/// Get or set the prescaler for the timer. -STATIC mp_obj_t pyb_timer_prescaler(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->tim.Instance->PSC & 0xffff); - } else { - // set - self->tim.Instance->PSC = mp_obj_get_int(args[1]) & 0xffff; - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_prescaler_obj, 1, 2, pyb_timer_prescaler); - -/// \method period([value]) -/// Get or set the period of the timer. -STATIC mp_obj_t pyb_timer_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(__HAL_TIM_GetAutoreload(&self->tim) & TIMER_CNT_MASK(self)); - } else { - // set - __HAL_TIM_SetAutoreload(&self->tim, mp_obj_get_int(args[1]) & TIMER_CNT_MASK(self)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_period_obj, 1, 2, pyb_timer_period); - -/// \method callback(fun) -/// Set the function to be called when the timer triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - __HAL_TIM_DISABLE_IT(&self->tim, TIM_IT_UPDATE); - self->callback = callback; - // start timer, so that it interrupts on overflow, but clear any - // pending interrupts which may have been set by initializing it. - __HAL_TIM_CLEAR_FLAG(&self->tim, TIM_IT_UPDATE); - HAL_TIM_Base_Start_IT(&self->tim); // This will re-enable the IRQ - HAL_NVIC_EnableIRQ(self->irqn); - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_callback_obj, pyb_timer_callback); - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_counter), MP_ROM_PTR(&pyb_timer_counter_obj) }, - { MP_ROM_QSTR(MP_QSTR_source_freq), MP_ROM_PTR(&pyb_timer_source_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_timer_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_prescaler), MP_ROM_PTR(&pyb_timer_prescaler_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_INT(TIM_COUNTERMODE_UP) }, - { MP_ROM_QSTR(MP_QSTR_DOWN), MP_ROM_INT(TIM_COUNTERMODE_DOWN) }, - { MP_ROM_QSTR(MP_QSTR_CENTER), MP_ROM_INT(TIM_COUNTERMODE_CENTERALIGNED1) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(CHANNEL_MODE_PWM_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_PWM_INVERTED), MP_ROM_INT(CHANNEL_MODE_PWM_INVERTED) }, - { MP_ROM_QSTR(MP_QSTR_OC_TIMING), MP_ROM_INT(CHANNEL_MODE_OC_TIMING) }, - { MP_ROM_QSTR(MP_QSTR_OC_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_TOGGLE), MP_ROM_INT(CHANNEL_MODE_OC_TOGGLE) }, - { MP_ROM_QSTR(MP_QSTR_OC_FORCED_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_FORCED_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_FORCED_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_FORCED_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_IC), MP_ROM_INT(CHANNEL_MODE_IC) }, - { MP_ROM_QSTR(MP_QSTR_ENC_A), MP_ROM_INT(CHANNEL_MODE_ENC_A) }, - { MP_ROM_QSTR(MP_QSTR_ENC_B), MP_ROM_INT(CHANNEL_MODE_ENC_B) }, - { MP_ROM_QSTR(MP_QSTR_ENC_AB), MP_ROM_INT(CHANNEL_MODE_ENC_AB) }, - { MP_ROM_QSTR(MP_QSTR_HIGH), MP_ROM_INT(TIM_OCPOLARITY_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_LOW), MP_ROM_INT(TIM_OCPOLARITY_LOW) }, - { MP_ROM_QSTR(MP_QSTR_RISING), MP_ROM_INT(TIM_ICPOLARITY_RISING) }, - { MP_ROM_QSTR(MP_QSTR_FALLING), MP_ROM_INT(TIM_ICPOLARITY_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_BOTH), MP_ROM_INT(TIM_ICPOLARITY_BOTHEDGE) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_timer_locals_dict, -}; - -/// \moduleref pyb -/// \class TimerChannel - setup a channel for a timer. -/// -/// Timer channels are used to generate/capture a signal using a timer. -/// -/// TimerChannel objects are created using the Timer.channel() method. -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *self = self_in; - - mp_printf(print, "TimerChannel(timer=%u, channel=%u, mode=%s)", - self->timer->tim_id, - self->channel, - qstr_str(channel_mode_info[self->mode].name)); -} - -/// \method capture([value]) -/// Get or set the capture value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// capture is the logical name to use when the channel is in input capture mode. - -/// \method compare([value]) -/// Get or set the compare value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// compare is the logical name to use when the channel is in output compare mode. - -/// \method pulse_width([value]) -/// Get or set the pulse width value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// pulse_width is the logical name to use when the channel is in PWM mode. -/// -/// In edge aligned mode, a pulse_width of `period + 1` corresponds to a duty cycle of 100% -/// In center aligned mode, a pulse width of `period` corresponds to a duty cycle of 100% -STATIC mp_obj_t pyb_timer_channel_capture_compare(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(__HAL_TIM_GetCompare(&self->timer->tim, TIMER_CHANNEL(self)) & TIMER_CNT_MASK(self->timer)); - } else { - // set - __HAL_TIM_SetCompare(&self->timer->tim, TIMER_CHANNEL(self), mp_obj_get_int(args[1]) & TIMER_CNT_MASK(self->timer)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_capture_compare_obj, 1, 2, pyb_timer_channel_capture_compare); - -/// \method pulse_width_percent([value]) -/// Get or set the pulse width percentage associated with a channel. The value -/// is a number between 0 and 100 and sets the percentage of the timer period -/// for which the pulse is active. The value can be an integer or -/// floating-point number for more accuracy. For example, a value of 25 gives -/// a duty cycle of 25%. -STATIC mp_obj_t pyb_timer_channel_pulse_width_percent(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - uint32_t period = compute_period(self->timer); - if (n_args == 1) { - // get - uint32_t cmp = __HAL_TIM_GetCompare(&self->timer->tim, TIMER_CHANNEL(self)) & TIMER_CNT_MASK(self->timer); - return compute_percent_from_pwm_value(period, cmp); - } else { - // set - uint32_t cmp = compute_pwm_value_from_percent(period, args[1]); - __HAL_TIM_SetCompare(&self->timer->tim, TIMER_CHANNEL(self), cmp & TIMER_CNT_MASK(self->timer)); - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_pulse_width_percent_obj, 1, 2, pyb_timer_channel_pulse_width_percent); - -/// \method callback(fun) -/// Set the function to be called when the timer channel triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_channel_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_TIM_DISABLE_IT(&self->timer->tim, TIMER_IRQ_MASK(self->channel)); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - uint8_t tim_id = self->timer->tim_id; - __HAL_TIM_CLEAR_IT(&self->timer->tim, TIMER_IRQ_MASK(self->channel)); - if (tim_id == 1) { - HAL_NVIC_EnableIRQ(TIM1_CC_IRQn); - #if defined(TIM8) // STM32F401 doesn't have a TIM8 - } else if (tim_id == 8) { - HAL_NVIC_EnableIRQ(TIM8_CC_IRQn); - #endif - } else { - HAL_NVIC_EnableIRQ(self->timer->irqn); - } - // start timer, so that it interrupts on overflow - switch (self->mode) { - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: - HAL_TIM_PWM_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - case CHANNEL_MODE_OC_FORCED_ACTIVE: - case CHANNEL_MODE_OC_FORCED_INACTIVE: - HAL_TIM_OC_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - case CHANNEL_MODE_IC: - HAL_TIM_IC_Start_IT(&self->timer->tim, TIMER_CHANNEL(self)); - break; - } - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_channel_callback_obj, pyb_timer_channel_callback); - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_channel_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width_percent), MP_ROM_PTR(&pyb_timer_channel_pulse_width_percent_obj) }, - { MP_ROM_QSTR(MP_QSTR_capture), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_compare), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_dict_t*)&pyb_timer_channel_locals_dict, -}; - -STATIC void timer_handle_irq_channel(pyb_timer_obj_t *tim, uint8_t channel, mp_obj_t callback) { - uint32_t irq_mask = TIMER_IRQ_MASK(channel); - - if (__HAL_TIM_GET_FLAG(&tim->tim, irq_mask) != RESET) { - if (__HAL_TIM_GET_ITSTATUS(&tim->tim, irq_mask) != RESET) { - // clear the interrupt - __HAL_TIM_CLEAR_IT(&tim->tim, irq_mask); - - // execute callback if it's set - if (callback != mp_const_none) { - mp_sched_lock(); - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(callback, tim); - nlr_pop(); - } else { - // Uncaught exception; disable the callback so it doesn't run again. - tim->callback = mp_const_none; - __HAL_TIM_DISABLE_IT(&tim->tim, irq_mask); - if (channel == 0) { - printf("uncaught exception in Timer(%u) interrupt handler\n", tim->tim_id); - } else { - printf("uncaught exception in Timer(%u) channel %u interrupt handler\n", tim->tim_id, channel); - } - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - mp_sched_unlock(); - } - } - } -} - -void timer_irq_handler(uint tim_id) { - if (tim_id - 1 < PYB_TIMER_OBJ_ALL_NUM) { - // get the timer object - pyb_timer_obj_t *tim = MP_STATE_PORT(pyb_timer_obj_all)[tim_id - 1]; - - if (tim == NULL) { - // Timer object has not been set, so we can't do anything. - // This can happen under normal circumstances for timers like - // 1 & 10 which use the same IRQ. - return; - } - - // Check for timer (versus timer channel) interrupt. - timer_handle_irq_channel(tim, 0, tim->callback); - uint32_t handled = TIMER_IRQ_MASK(0); - - // Check to see if a timer channel interrupt was pending - pyb_timer_channel_obj_t *chan = tim->channel; - while (chan != NULL) { - timer_handle_irq_channel(tim, chan->channel, chan->callback); - handled |= TIMER_IRQ_MASK(chan->channel); - chan = chan->next; - } - - // Finally, clear any remaining interrupt sources. Otherwise we'll - // just get called continuously. - uint32_t unhandled = tim->tim.Instance->DIER & 0xff & ~handled; - if (unhandled != 0) { - __HAL_TIM_DISABLE_IT(&tim->tim, unhandled); - __HAL_TIM_CLEAR_IT(&tim->tim, unhandled); - printf("Unhandled interrupt SR=0x%02lx (now disabled)\n", unhandled); - } - } -} diff --git a/ports/stm32/timer.h b/ports/stm32/timer.h deleted file mode 100644 index 775accc3d42a4..0000000000000 --- a/ports/stm32/timer.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_TIMER_H -#define MICROPY_INCLUDED_STMHAL_TIMER_H - -extern TIM_HandleTypeDef TIM5_Handle; - -extern const mp_obj_type_t pyb_timer_type; - -void timer_init0(void); -void timer_tim5_init(void); -TIM_HandleTypeDef *timer_tim6_init(uint freq); -void timer_deinit(void); -uint32_t timer_get_source_freq(uint32_t tim_id); -void timer_irq_handler(uint tim_id); - -TIM_HandleTypeDef *pyb_timer_get_handle(mp_obj_t timer); - -#endif // MICROPY_INCLUDED_STMHAL_TIMER_H diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c deleted file mode 100644 index 8f0513e8c9281..0000000000000 --- a/ports/stm32/uart.c +++ /dev/null @@ -1,1030 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -//#include "py/ioctl.h" -//#include "py/nlr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "uart.h" -#include "irq.h" -#include "genhdr/pins.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus -/// -/// UART implements the standard UART/USART duplex serial communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. The unit of communication -/// is a character (not to be confused with a string character) which can be 8 or 9 -/// bits wide. -/// -/// UART objects can be created and initialised using: -/// -/// from pyb import UART -/// -/// uart = UART(1, 9600) # init with given baudrate -/// uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters -/// -/// Bits can be 8 or 9. Parity can be None, 0 (even) or 1 (odd). Stop can be 1 or 2. -/// -/// A UART object acts like a stream object and reading and writing is done -/// using the standard stream methods: -/// -/// uart.read(10) # read 10 characters, returns a bytes object -/// uart.read() # read all available characters -/// uart.readline() # read a line -/// uart.readinto(buf) # read and store into the given buffer -/// uart.write('abc') # write the 3 characters -/// -/// Individual characters can be read/written using: -/// -/// uart.readchar() # read 1 character and returns it as an integer -/// uart.writechar(42) # write 1 character -/// -/// To check if there is anything to be read, use: -/// -/// uart.any() # returns True if any characters waiting - -#define CHAR_WIDTH_8BIT (0) -#define CHAR_WIDTH_9BIT (1) - -struct _pyb_uart_obj_t { - mp_obj_base_t base; - UART_HandleTypeDef uart; // this is 17 words big - IRQn_Type irqn; - pyb_uart_t uart_id : 8; - bool is_enabled : 1; - byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars - uint16_t char_mask; // 0x7f for 7 bit, 0xff for 8 bit, 0x1ff for 9 bit - uint16_t timeout; // timeout waiting for first char - uint16_t timeout_char; // timeout waiting between chars - uint16_t read_buf_len; // len in chars; buf can hold len-1 chars - volatile uint16_t read_buf_head; // indexes first empty slot - uint16_t read_buf_tail; // indexes first full slot (not full if equals head) - byte *read_buf; // byte or uint16_t, depending on char size -}; - -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in); - -void uart_init0(void) { - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) { - MP_STATE_PORT(pyb_uart_obj_all)[i] = NULL; - } -} - -// unregister all interrupt sources -void uart_deinit(void) { - for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) { - pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i]; - if (uart_obj != NULL) { - pyb_uart_deinit(uart_obj); - } - } -} - -STATIC bool uart_exists(int uart_id) { - if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) { - // safeguard against pyb_uart_obj_all array being configured too small - return false; - } - switch (uart_id) { - #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX) - case PYB_UART_1: return true; - #endif - - #if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX) - case PYB_UART_2: return true; - #endif - - #if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX) - case PYB_UART_3: return true; - #endif - - #if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX) - case PYB_UART_4: return true; - #endif - - #if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX) - case PYB_UART_5: return true; - #endif - - #if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX) - case PYB_UART_6: return true; - #endif - - #if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX) - case PYB_UART_7: return true; - #endif - - #if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX) - case PYB_UART_8: return true; - #endif - - default: return false; - } -} - -// assumes Init parameters have been set up correctly -STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) { - USART_TypeDef *UARTx; - IRQn_Type irqn; - int uart_unit; - - const pin_obj_t *pins[4] = {0}; - - switch (uart_obj->uart_id) { - #if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX) - case PYB_UART_1: - uart_unit = 1; - UARTx = USART1; - irqn = USART1_IRQn; - pins[0] = &MICROPY_HW_UART1_TX; - pins[1] = &MICROPY_HW_UART1_RX; - __USART1_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX) - case PYB_UART_2: - uart_unit = 2; - UARTx = USART2; - irqn = USART2_IRQn; - pins[0] = &MICROPY_HW_UART2_TX; - pins[1] = &MICROPY_HW_UART2_RX; - #if defined(MICROPY_HW_UART2_RTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - pins[2] = &MICROPY_HW_UART2_RTS; - } - #endif - #if defined(MICROPY_HW_UART2_CTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - pins[3] = &MICROPY_HW_UART2_CTS; - } - #endif - __USART2_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX) - case PYB_UART_3: - uart_unit = 3; - UARTx = USART3; - irqn = USART3_IRQn; - pins[0] = &MICROPY_HW_UART3_TX; - pins[1] = &MICROPY_HW_UART3_RX; - #if defined(MICROPY_HW_UART3_RTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - pins[2] = &MICROPY_HW_UART3_RTS; - } - #endif - #if defined(MICROPY_HW_UART3_CTS) - if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - pins[3] = &MICROPY_HW_UART3_CTS; - } - #endif - __USART3_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX) - case PYB_UART_4: - uart_unit = 4; - UARTx = UART4; - irqn = UART4_IRQn; - pins[0] = &MICROPY_HW_UART4_TX; - pins[1] = &MICROPY_HW_UART4_RX; - __UART4_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX) - case PYB_UART_5: - uart_unit = 5; - UARTx = UART5; - irqn = UART5_IRQn; - pins[0] = &MICROPY_HW_UART5_TX; - pins[1] = &MICROPY_HW_UART5_RX; - __UART5_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX) - case PYB_UART_6: - uart_unit = 6; - UARTx = USART6; - irqn = USART6_IRQn; - pins[0] = &MICROPY_HW_UART6_TX; - pins[1] = &MICROPY_HW_UART6_RX; - __USART6_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX) - case PYB_UART_7: - uart_unit = 7; - UARTx = UART7; - irqn = UART7_IRQn; - pins[0] = &MICROPY_HW_UART7_TX; - pins[1] = &MICROPY_HW_UART7_RX; - __UART7_CLK_ENABLE(); - break; - #endif - - #if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX) - case PYB_UART_8: - uart_unit = 8; - UARTx = UART8; - irqn = UART8_IRQn; - pins[0] = &MICROPY_HW_UART8_TX; - pins[1] = &MICROPY_HW_UART8_RX; - __UART8_CLK_ENABLE(); - break; - #endif - - default: - // UART does not exist or is not configured for this board - return false; - } - - uint32_t mode = MP_HAL_PIN_MODE_ALT; - uint32_t pull = MP_HAL_PIN_PULL_UP; - - for (uint i = 0; i < 4; i++) { - if (pins[i] != NULL) { - bool ret = mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_UART, uart_unit); - if (!ret) { - return false; - } - } - } - - uart_obj->irqn = irqn; - uart_obj->uart.Instance = UARTx; - - // init UARTx - HAL_UART_Init(&uart_obj->uart); - - uart_obj->is_enabled = true; - - return true; -} - -/* obsolete and unused -bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) { - UART_HandleTypeDef *uh = &uart_obj->uart; - memset(uh, 0, sizeof(*uh)); - uh->Init.BaudRate = baudrate; - uh->Init.WordLength = UART_WORDLENGTH_8B; - uh->Init.StopBits = UART_STOPBITS_1; - uh->Init.Parity = UART_PARITY_NONE; - uh->Init.Mode = UART_MODE_TX_RX; - uh->Init.HwFlowCtl = UART_HWCONTROL_NONE; - uh->Init.OverSampling = UART_OVERSAMPLING_16; - return uart_init2(uart_obj); -} -*/ - -mp_uint_t uart_rx_any(pyb_uart_obj_t *self) { - int buffer_bytes = self->read_buf_head - self->read_buf_tail; - if (buffer_bytes < 0) { - return buffer_bytes + self->read_buf_len; - } else if (buffer_bytes > 0) { - return buffer_bytes; - } else { - return __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET; - } -} - -// Waits at most timeout milliseconds for at least 1 char to become ready for -// reading (from buf or for direct reading). -// Returns true if something available, false if not. -STATIC bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) { - uint32_t start = HAL_GetTick(); - for (;;) { - if (self->read_buf_tail != self->read_buf_head || __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - return true; // have at least 1 char ready for reading - } - if (HAL_GetTick() - start >= timeout) { - return false; // timeout - } - MICROPY_EVENT_POLL_HOOK - } -} - -// assumes there is a character available -int uart_rx_char(pyb_uart_obj_t *self) { - if (self->read_buf_tail != self->read_buf_head) { - // buffering via IRQ - int data; - if (self->char_width == CHAR_WIDTH_9BIT) { - data = ((uint16_t*)self->read_buf)[self->read_buf_tail]; - } else { - data = self->read_buf[self->read_buf_tail]; - } - self->read_buf_tail = (self->read_buf_tail + 1) % self->read_buf_len; - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - // UART was stalled by flow ctrl: re-enable IRQ now we have room in buffer - __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); - } - return data; - } else { - // no buffering - #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - return self->uart.Instance->RDR & self->char_mask; - #else - return self->uart.Instance->DR & self->char_mask; - #endif - } -} - -// Waits at most timeout milliseconds for TX register to become empty. -// Returns true if can write, false if can't. -STATIC bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) { - uint32_t start = HAL_GetTick(); - for (;;) { - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) { - return true; // tx register is empty - } - if (HAL_GetTick() - start >= timeout) { - return false; // timeout - } - MICROPY_EVENT_POLL_HOOK - } -} - -// Waits at most timeout milliseconds for UART flag to be set. -// Returns true if flag is/was set, false on timeout. -STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t timeout) { - // Note: we don't use WFI to idle in this loop because UART tx doesn't generate - // an interrupt and the flag can be set quickly if the baudrate is large. - uint32_t start = HAL_GetTick(); - for (;;) { - if (__HAL_UART_GET_FLAG(&self->uart, flag)) { - return true; - } - if (timeout == 0 || HAL_GetTick() - start >= timeout) { - return false; // timeout - } - } -} - -// src - a pointer to the data to send (16-bit aligned for 9-bit chars) -// num_chars - number of characters to send (9-bit chars count for 2 bytes from src) -// *errcode - returns 0 for success, MP_Exxx on error -// returns the number of characters sent (valid even if there was an error) -STATIC size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) { - if (num_chars == 0) { - *errcode = 0; - return 0; - } - - uint32_t timeout; - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - // CTS can hold off transmission for an arbitrarily long time. Apply - // the overall timeout rather than the character timeout. - timeout = self->timeout; - } else { - // The timeout specified here is for waiting for the TX data register to - // become empty (ie between chars), as well as for the final char to be - // completely transferred. The default value for timeout_char is long - // enough for 1 char, but we need to double it to wait for the last char - // to be transferred to the data register, and then to be transmitted. - timeout = 2 * self->timeout_char; - } - - const uint8_t *src = (const uint8_t*)src_in; - size_t num_tx = 0; - USART_TypeDef *uart = self->uart.Instance; - - while (num_tx < num_chars) { - if (!uart_wait_flag_set(self, UART_FLAG_TXE, timeout)) { - *errcode = MP_ETIMEDOUT; - return num_tx; - } - uint32_t data; - if (self->char_width == CHAR_WIDTH_9BIT) { - data = *((uint16_t*)src) & 0x1ff; - src += 2; - } else { - data = *src++; - } - #if defined(MCU_SERIES_F4) - uart->DR = data; - #else - uart->TDR = data; - #endif - ++num_tx; - } - - // wait for the UART frame to complete - if (!uart_wait_flag_set(self, UART_FLAG_TC, timeout)) { - *errcode = MP_ETIMEDOUT; - return num_tx; - } - - *errcode = 0; - return num_tx; -} - -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) { - int errcode; - uart_tx_data(uart_obj, str, len, &errcode); -} - -// this IRQ handler is set up to handle RXNE interrupts only -void uart_irq_handler(mp_uint_t uart_id) { - // get the uart object - pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1]; - - if (self == NULL) { - // UART object has not been set, so we can't do anything, not - // even disable the IRQ. This should never happen. - return; - } - - if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) { - if (self->read_buf_len != 0) { - uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len; - if (next_head != self->read_buf_tail) { - // only read data if room in buf - #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE - #else - int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE - #endif - data &= self->char_mask; - if (self->char_width == CHAR_WIDTH_9BIT) { - ((uint16_t*)self->read_buf)[self->read_buf_head] = data; - } else { - self->read_buf[self->read_buf_head] = data; - } - self->read_buf_head = next_head; - } else { // No room: leave char in buf, disable interrupt - __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE); - } - } - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "UART(%u)", self->uart_id); - } else { - mp_int_t bits = (self->uart.Init.WordLength == UART_WORDLENGTH_8B ? 8 : 9); - if (self->uart.Init.Parity != UART_PARITY_NONE) { - bits -= 1; - } - mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=", - self->uart_id, self->uart.Init.BaudRate, bits); - if (self->uart.Init.Parity == UART_PARITY_NONE) { - mp_print_str(print, "None"); - } else { - mp_printf(print, "%u", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1); - } - if (self->uart.Init.HwFlowCtl) { - mp_printf(print, ", flow="); - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) { - mp_printf(print, "RTS%s", self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS ? "|" : ""); - } - if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) { - mp_printf(print, "CTS"); - } - } - mp_printf(print, ", stop=%u, timeout=%u, timeout_char=%u, read_buf_len=%u)", - self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2, - self->timeout, self->timeout_char, - self->read_buf_len == 0 ? 0 : self->read_buf_len - 1); // -1 to adjust for usable length of buffer - } -} - -/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, flow=0, read_buf_len=64) -/// -/// Initialise the UART bus with the given parameters: -/// -/// - `baudrate` is the clock rate. -/// - `bits` is the number of bits per byte, 7, 8 or 9. -/// - `parity` is the parity, `None`, 0 (even) or 1 (odd). -/// - `stop` is the number of stop bits, 1 or 2. -/// - `timeout` is the timeout in milliseconds to wait for the first character. -/// - `timeout_char` is the timeout in milliseconds to wait between characters. -/// - `flow` is RTS | CTS where RTS == 256, CTS == 512 -/// - `read_buf_len` is the character length of the read buffer (0 to disable). -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_HWCONTROL_NONE} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, - { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, - }; - - // parse args - struct { - mp_arg_val_t baudrate, bits, parity, stop, flow, timeout, timeout_char, read_buf_len; - } args; - mp_arg_parse_all(n_args, pos_args, kw_args, - MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args); - - // set the UART configuration values - memset(&self->uart, 0, sizeof(self->uart)); - UART_InitTypeDef *init = &self->uart.Init; - - // baudrate - init->BaudRate = args.baudrate.u_int; - - // parity - mp_int_t bits = args.bits.u_int; - if (args.parity.u_obj == mp_const_none) { - init->Parity = UART_PARITY_NONE; - } else { - mp_int_t parity = mp_obj_get_int(args.parity.u_obj); - init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN; - bits += 1; // STs convention has bits including parity - } - - // number of bits - if (bits == 8) { - init->WordLength = UART_WORDLENGTH_8B; - } else if (bits == 9) { - init->WordLength = UART_WORDLENGTH_9B; - } else { - mp_raise_ValueError("unsupported combination of bits and parity"); - } - - // stop bits - switch (args.stop.u_int) { - case 1: init->StopBits = UART_STOPBITS_1; break; - default: init->StopBits = UART_STOPBITS_2; break; - } - - // flow control - init->HwFlowCtl = args.flow.u_int; - - // extra config (not yet configurable) - init->Mode = UART_MODE_TX_RX; - init->OverSampling = UART_OVERSAMPLING_16; - - // init UART (if it fails, it's because the port doesn't exist) - if (!uart_init2(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", self->uart_id)); - } - - // set timeout - self->timeout = args.timeout.u_int; - - // set timeout_char - // make sure it is at least as long as a whole character (13 bits to be safe) - // minimum value is 2ms because sys-tick has a resolution of only 1ms - self->timeout_char = args.timeout_char.u_int; - uint32_t min_timeout_char = 13000 / init->BaudRate + 2; - if (self->timeout_char < min_timeout_char) { - self->timeout_char = min_timeout_char; - } - - // setup the read buffer - m_del(byte, self->read_buf, self->read_buf_len << self->char_width); - if (init->WordLength == UART_WORDLENGTH_9B && init->Parity == UART_PARITY_NONE) { - self->char_mask = 0x1ff; - self->char_width = CHAR_WIDTH_9BIT; - } else { - if (init->WordLength == UART_WORDLENGTH_9B || init->Parity == UART_PARITY_NONE) { - self->char_mask = 0xff; - } else { - self->char_mask = 0x7f; - } - self->char_width = CHAR_WIDTH_8BIT; - } - self->read_buf_head = 0; - self->read_buf_tail = 0; - if (args.read_buf_len.u_int <= 0) { - // no read buffer - self->read_buf_len = 0; - self->read_buf = NULL; - HAL_NVIC_DisableIRQ(self->irqn); - __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE); - } else { - // read buffer using interrupts - self->read_buf_len = args.read_buf_len.u_int + 1; // +1 to adjust for usable length of buffer - self->read_buf = m_new(byte, self->read_buf_len << self->char_width); - __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); - HAL_NVIC_SetPriority(self->irqn, IRQ_PRI_UART, IRQ_SUBPRI_UART); - HAL_NVIC_EnableIRQ(self->irqn); - } - - // compute actual baudrate that was configured - // (this formula assumes UART_OVERSAMPLING_16) - uint32_t actual_baudrate = 0; - #if defined(MCU_SERIES_F7) - UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; - UART_GETCLOCKSOURCE(&self->uart, clocksource); - switch (clocksource) { - case UART_CLOCKSOURCE_PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break; - case UART_CLOCKSOURCE_HSI: actual_baudrate = HSI_VALUE; break; - case UART_CLOCKSOURCE_SYSCLK: actual_baudrate = HAL_RCC_GetSysClockFreq(); break; - case UART_CLOCKSOURCE_LSE: actual_baudrate = LSE_VALUE; break; - case UART_CLOCKSOURCE_UNDEFINED: break; - } - #else - if (self->uart.Instance == USART1 - #if defined(USART6) - || self->uart.Instance == USART6 - #endif - ) { - actual_baudrate = HAL_RCC_GetPCLK2Freq(); - } else { - actual_baudrate = HAL_RCC_GetPCLK1Freq(); - } - #endif - actual_baudrate /= self->uart.Instance->BRR; - - // check we could set the baudrate within 5% - uint32_t baudrate_diff; - if (actual_baudrate > init->BaudRate) { - baudrate_diff = actual_baudrate - init->BaudRate; - } else { - baudrate_diff = init->BaudRate - actual_baudrate; - } - init->BaudRate = actual_baudrate; // remember actual baudrate for printing - if (20 * baudrate_diff > init->BaudRate) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "set baudrate %d is not within 5%% of desired value", actual_baudrate)); - } - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'. -/// With no additional parameters, the UART object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the UART busses are: -/// -/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)` -/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)` -/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)` -/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)` -/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)` -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // work out port - int uart_id = 0; - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { - #ifdef MICROPY_HW_UART1_NAME - } else if (strcmp(port, MICROPY_HW_UART1_NAME) == 0) { - uart_id = PYB_UART_1; - #endif - #ifdef MICROPY_HW_UART2_NAME - } else if (strcmp(port, MICROPY_HW_UART2_NAME) == 0) { - uart_id = PYB_UART_2; - #endif - #ifdef MICROPY_HW_UART3_NAME - } else if (strcmp(port, MICROPY_HW_UART3_NAME) == 0) { - uart_id = PYB_UART_3; - #endif - #ifdef MICROPY_HW_UART4_NAME - } else if (strcmp(port, MICROPY_HW_UART4_NAME) == 0) { - uart_id = PYB_UART_4; - #endif - #ifdef MICROPY_HW_UART5_NAME - } else if (strcmp(port, MICROPY_HW_UART5_NAME) == 0) { - uart_id = PYB_UART_5; - #endif - #ifdef MICROPY_HW_UART6_NAME - } else if (strcmp(port, MICROPY_HW_UART6_NAME) == 0) { - uart_id = PYB_UART_6; - #endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%s) doesn't exist", port)); - } - } else { - uart_id = mp_obj_get_int(args[0]); - if (!uart_exists(uart_id)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", uart_id)); - } - } - - pyb_uart_obj_t *self; - if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) { - // create new UART object - self = m_new0(pyb_uart_obj_t, 1); - self->base.type = &pyb_uart_type; - self->uart_id = uart_id; - MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self; - } else { - // reference existing UART object - self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1]; - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args); - } - - return self; -} - -STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -/// \method deinit() -/// Turn off the UART bus. -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - self->is_enabled = false; - UART_HandleTypeDef *uart = &self->uart; - HAL_UART_DeInit(uart); - if (uart->Instance == USART1) { - HAL_NVIC_DisableIRQ(USART1_IRQn); - __USART1_FORCE_RESET(); - __USART1_RELEASE_RESET(); - __USART1_CLK_DISABLE(); - } else if (uart->Instance == USART2) { - HAL_NVIC_DisableIRQ(USART2_IRQn); - __USART2_FORCE_RESET(); - __USART2_RELEASE_RESET(); - __USART2_CLK_DISABLE(); - #if defined(USART3) - } else if (uart->Instance == USART3) { - HAL_NVIC_DisableIRQ(USART3_IRQn); - __USART3_FORCE_RESET(); - __USART3_RELEASE_RESET(); - __USART3_CLK_DISABLE(); - #endif - #if defined(UART4) - } else if (uart->Instance == UART4) { - HAL_NVIC_DisableIRQ(UART4_IRQn); - __UART4_FORCE_RESET(); - __UART4_RELEASE_RESET(); - __UART4_CLK_DISABLE(); - #endif - #if defined(UART5) - } else if (uart->Instance == UART5) { - HAL_NVIC_DisableIRQ(UART5_IRQn); - __UART5_FORCE_RESET(); - __UART5_RELEASE_RESET(); - __UART5_CLK_DISABLE(); - #endif - #if defined(UART6) - } else if (uart->Instance == USART6) { - HAL_NVIC_DisableIRQ(USART6_IRQn); - __USART6_FORCE_RESET(); - __USART6_RELEASE_RESET(); - __USART6_CLK_DISABLE(); - #endif - #if defined(UART7) - } else if (uart->Instance == UART7) { - HAL_NVIC_DisableIRQ(UART7_IRQn); - __UART7_FORCE_RESET(); - __UART7_RELEASE_RESET(); - __UART7_CLK_DISABLE(); - #endif - #if defined(UART8) - } else if (uart->Instance == UART8) { - HAL_NVIC_DisableIRQ(UART8_IRQn); - __UART8_FORCE_RESET(); - __UART8_RELEASE_RESET(); - __UART8_CLK_DISABLE(); - #endif - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -/// \method writechar(char) -/// Write a single character on the bus. `char` is an integer to write. -/// Return value: `None`. -STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) { - pyb_uart_obj_t *self = self_in; - - // get the character to write (might be 9 bits) - uint16_t data = mp_obj_get_int(char_in); - - // write the character - int errcode; - if (uart_tx_wait(self, self->timeout)) { - uart_tx_data(self, &data, 1, &errcode); - } else { - errcode = MP_ETIMEDOUT; - } - - if (errcode != 0) { - mp_raise_OSError(errcode); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar); - -/// \method readchar() -/// Receive a single character on the bus. -/// Return value: The character read, as an integer. Returns -1 on timeout. -STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - if (uart_rx_wait(self, self->timeout)) { - return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self)); - } else { - // return -1 on timeout - return MP_OBJ_NEW_SMALL_INT(-1); - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar); - -// uart.sendbreak() -STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4) - self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register - #else - self->uart.Instance->CR1 |= USART_CR1_SBK; - #endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - - /// \method read([nbytes]) - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - /// \method readline() - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)}, - /// \method readinto(buf[, nbytes]) - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - /// \method write(buf) - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - - { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&pyb_uart_writechar_obj) }, - { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&pyb_uart_readchar_obj) }, - { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, - { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - // convert byte size to char size - size >>= self->char_width; - - // make sure we want at least 1 char - if (size == 0) { - return 0; - } - - // wait for first char to become available - if (!uart_rx_wait(self, self->timeout)) { - // return EAGAIN error to indicate non-blocking (then read() method returns None) - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // read the data - byte *orig_buf = buf; - for (;;) { - int data = uart_rx_char(self); - if (self->char_width == CHAR_WIDTH_9BIT) { - *(uint16_t*)buf = data; - buf += 2; - } else { - *buf++ = data; - } - if (--size == 0 || !uart_rx_wait(self, self->timeout_char)) { - // return number of bytes read - return buf - orig_buf; - } - } -} - -STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { - pyb_uart_obj_t *self = self_in; - const byte *buf = buf_in; - - // check that size is a multiple of character width - if (size & self->char_width) { - *errcode = MP_EIO; - return MP_STREAM_ERROR; - } - - // wait to be able to write the first character. EAGAIN causes write to return None - if (!uart_tx_wait(self, self->timeout)) { - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - - // write the data - size_t num_tx = uart_tx_data(self, buf, size >> self->char_width, errcode); - - if (*errcode == 0 || *errcode == MP_ETIMEDOUT) { - // return number of bytes written, even if there was a timeout - return num_tx << self->char_width; - } else { - return MP_STREAM_ERROR; - } -} - -STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_uart_obj_t *self = self_in; - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t uart_stream_p = { - .read = pyb_uart_read, - .write = pyb_uart_write, - .ioctl = pyb_uart_ioctl, - .is_text = false, -}; - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &uart_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict, -}; diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h deleted file mode 100644 index d176520a1b01e..0000000000000 --- a/ports/stm32/uart.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_UART_H -#define MICROPY_INCLUDED_STMHAL_UART_H - -typedef enum { - PYB_UART_NONE = 0, - PYB_UART_1 = 1, - PYB_UART_2 = 2, - PYB_UART_3 = 3, - PYB_UART_4 = 4, - PYB_UART_5 = 5, - PYB_UART_6 = 6, - PYB_UART_7 = 7, - PYB_UART_8 = 8, -} pyb_uart_t; - -typedef struct _pyb_uart_obj_t pyb_uart_obj_t; -extern const mp_obj_type_t pyb_uart_type; - -void uart_init0(void); -void uart_deinit(void); -void uart_irq_handler(mp_uint_t uart_id); - -mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj); -int uart_rx_char(pyb_uart_obj_t *uart_obj); -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len); - -#endif // MICROPY_INCLUDED_STMHAL_UART_H diff --git a/ports/stm32/usb.c b/ports/stm32/usb.c deleted file mode 100644 index 5017bb9303f04..0000000000000 --- a/ports/stm32/usb.c +++ /dev/null @@ -1,741 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_cdc_msc_hid.h" -#include "usbd_cdc_interface.h" -#include "usbd_msc_storage.h" -#include "usbd_hid_interface.h" - -#include "py/ioctl.h" -#include "py/objstr.h" -#include "py/runtime.h" -#include "py/stream.h" -#include "py/mperrno.h" -#include "py/mphal.h" -#include "bufhelper.h" -#include "usb.h" - -#if defined(USE_USB_FS) -#define USB_PHY_ID USB_PHY_FS_ID -#elif defined(USE_USB_HS) && defined(USE_USB_HS_IN_FS) -#define USB_PHY_ID USB_PHY_HS_ID -#else -#error Unable to determine proper USB_PHY_ID to use -#endif - -// this will be persistent across a soft-reset -mp_uint_t pyb_usb_flags = 0; - -typedef struct _usb_device_t { - uint32_t enabled; - USBD_HandleTypeDef hUSBDDevice; - usbd_cdc_msc_hid_state_t usbd_cdc_msc_hid_state; - usbd_cdc_itf_t usbd_cdc_itf; - usbd_hid_itf_t usbd_hid_itf; -} usb_device_t; - -#ifdef USE_DEVICE_MODE -usb_device_t usb_device; -pyb_usb_storage_medium_t pyb_usb_storage_medium = PYB_USB_STORAGE_MEDIUM_NONE; -#endif - -// predefined hid mouse data -STATIC const mp_obj_str_t pyb_usb_hid_mouse_desc_obj = { - {&mp_type_bytes}, - 0, // hash not valid - USBD_HID_MOUSE_REPORT_DESC_SIZE, - USBD_HID_MOUSE_ReportDesc, -}; -const mp_obj_tuple_t pyb_usb_hid_mouse_obj = { - {&mp_type_tuple}, - 5, - { - MP_OBJ_NEW_SMALL_INT(1), // subclass: boot - MP_OBJ_NEW_SMALL_INT(2), // protocol: mouse - MP_OBJ_NEW_SMALL_INT(USBD_HID_MOUSE_MAX_PACKET), - MP_OBJ_NEW_SMALL_INT(8), // polling interval: 8ms - (mp_obj_t)&pyb_usb_hid_mouse_desc_obj, - }, -}; - -// predefined hid keyboard data -STATIC const mp_obj_str_t pyb_usb_hid_keyboard_desc_obj = { - {&mp_type_bytes}, - 0, // hash not valid - USBD_HID_KEYBOARD_REPORT_DESC_SIZE, - USBD_HID_KEYBOARD_ReportDesc, -}; -const mp_obj_tuple_t pyb_usb_hid_keyboard_obj = { - {&mp_type_tuple}, - 5, - { - MP_OBJ_NEW_SMALL_INT(1), // subclass: boot - MP_OBJ_NEW_SMALL_INT(1), // protocol: keyboard - MP_OBJ_NEW_SMALL_INT(USBD_HID_KEYBOARD_MAX_PACKET), - MP_OBJ_NEW_SMALL_INT(8), // polling interval: 8ms - (mp_obj_t)&pyb_usb_hid_keyboard_desc_obj, - }, -}; - -void pyb_usb_init0(void) { - mp_hal_set_interrupt_char(-1); - MP_STATE_PORT(pyb_hid_report_desc) = MP_OBJ_NULL; -} - -bool pyb_usb_dev_init(uint16_t vid, uint16_t pid, usb_device_mode_t mode, USBD_HID_ModeInfoTypeDef *hid_info) { -#ifdef USE_DEVICE_MODE - usb_device_t *usb_dev = &usb_device; - if (!usb_dev->enabled) { - // only init USB once in the device's power-lifetime - - // configure the VID, PID and the USBD mode (interfaces it will expose) - USBD_SetVIDPIDRelease(&usb_dev->usbd_cdc_msc_hid_state, vid, pid, 0x0200, mode == USBD_MODE_CDC); - if (USBD_SelectMode(&usb_dev->usbd_cdc_msc_hid_state, mode, hid_info) != 0) { - return false; - } - - // set up the USBD state - USBD_HandleTypeDef *usbd = &usb_dev->hUSBDDevice; - usbd->id = USB_PHY_ID; - usbd->dev_state = USBD_STATE_DEFAULT; - usbd->pDesc = (USBD_DescriptorsTypeDef*)&USBD_Descriptors; - usbd->pClass = &USBD_CDC_MSC_HID; - usb_dev->usbd_cdc_msc_hid_state.pdev = usbd; - usb_dev->usbd_cdc_msc_hid_state.cdc = &usb_dev->usbd_cdc_itf; - usb_dev->usbd_cdc_msc_hid_state.hid = &usb_dev->usbd_hid_itf; - usbd->pClassData = &usb_dev->usbd_cdc_msc_hid_state; - - switch (pyb_usb_storage_medium) { -#if MICROPY_HW_HAS_SDCARD - case PYB_USB_STORAGE_MEDIUM_SDCARD: - USBD_MSC_RegisterStorage(&usb_dev->usbd_cdc_msc_hid_state, (USBD_StorageTypeDef*)&USBD_SDCARD_STORAGE_fops); - break; -#endif - default: - USBD_MSC_RegisterStorage(&usb_dev->usbd_cdc_msc_hid_state, (USBD_StorageTypeDef*)&USBD_FLASH_STORAGE_fops); - break; - } - - // start the USB device - USBD_LL_Init(usbd); - USBD_LL_Start(usbd); - usb_dev->enabled = true; - } -#endif - - return true; -} - -void pyb_usb_dev_deinit(void) { - usb_device_t *usb_dev = &usb_device; - if (usb_dev->enabled) { - USBD_Stop(&usb_dev->hUSBDDevice); - usb_dev->enabled = false; - } -} - -bool usb_vcp_is_enabled(void) { - return usb_device.enabled; -} - -int usb_vcp_recv_byte(uint8_t *c) { - return usbd_cdc_rx(&usb_device.usbd_cdc_itf, c, 1, 0); -} - -void usb_vcp_send_strn(const char *str, int len) { -#ifdef USE_DEVICE_MODE - if (usb_device.enabled) { - usbd_cdc_tx_always(&usb_device.usbd_cdc_itf, (const uint8_t*)str, len); - } -#endif -} - -/******************************************************************************/ -// MicroPython bindings for USB - -/* - Philosophy of USB driver and Python API: pyb.usb_mode(...) configures the USB - on the board. The USB itself is not an entity, rather the interfaces are, and - can be accessed by creating objects, such as pyb.USB_VCP() and pyb.USB_HID(). - - We have: - - pyb.usb_mode() # return the current usb mode - pyb.usb_mode(None) # disable USB - pyb.usb_mode('VCP') # enable with VCP interface - pyb.usb_mode('VCP+MSC') # enable with VCP and MSC interfaces - pyb.usb_mode('VCP+HID') # enable with VCP and HID, defaulting to mouse protocol - pyb.usb_mode('VCP+HID', vid=0xf055, pid=0x9800) # specify VID and PID - pyb.usb_mode('VCP+HID', hid=pyb.hid_mouse) - pyb.usb_mode('VCP+HID', hid=pyb.hid_keyboard) - pyb.usb_mode('VCP+HID', pid=0x1234, hid=(subclass, protocol, max_packet_len, polling_interval, report_desc)) - - vcp = pyb.USB_VCP() # get the VCP device for read/write - hid = pyb.USB_HID() # get the HID device for write/poll - - Possible extensions: - pyb.usb_mode('host', ...) - pyb.usb_mode('OTG', ...) - pyb.usb_mode(..., port=2) # for second USB port -*/ - -STATIC mp_obj_t pyb_usb_mode(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_vid, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = USBD_VID} }, - { MP_QSTR_pid, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_hid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = (mp_obj_t)&pyb_usb_hid_mouse_obj} }, - }; - - // fetch the current usb mode -> pyb.usb_mode() - if (n_args == 0) { - #if defined(USE_HOST_MODE) - return MP_OBJ_NEW_QSTR(MP_QSTR_host); - #elif defined(USE_DEVICE_MODE) - uint8_t mode = USBD_GetMode(&usb_device.usbd_cdc_msc_hid_state); - switch (mode) { - case USBD_MODE_CDC: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP); - case USBD_MODE_MSC: - return MP_OBJ_NEW_QSTR(MP_QSTR_MSC); - case USBD_MODE_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_HID); - case USBD_MODE_CDC_MSC: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP_plus_MSC); - case USBD_MODE_CDC_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_VCP_plus_HID); - case USBD_MODE_MSC_HID: - return MP_OBJ_NEW_QSTR(MP_QSTR_MSC_plus_HID); - default: - return mp_const_none; - } - #endif - } - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // record the fact that the usb has been explicitly configured - pyb_usb_flags |= PYB_USB_FLAG_USB_MODE_CALLED; - - // check if user wants to disable the USB - if (args[0].u_obj == mp_const_none) { - // disable usb - #if defined(USE_DEVICE_MODE) - pyb_usb_dev_deinit(); - #endif - return mp_const_none; - } - - // get mode string - const char *mode_str = mp_obj_str_get_str(args[0].u_obj); - -#if defined(USE_HOST_MODE) - - // hardware configured for USB host mode - - if (strcmp(mode_str, "host") == 0) { - pyb_usb_host_init(); - } else { - goto bad_mode; - } - -#elif defined(USE_DEVICE_MODE) - - // hardware configured for USB device mode - - // get the VID, PID and USB mode - // note: PID=-1 means select PID based on mode - // note: we support CDC as a synonym for VCP for backward compatibility - uint16_t vid = args[1].u_int; - uint16_t pid = args[2].u_int; - usb_device_mode_t mode; - if (strcmp(mode_str, "CDC+MSC") == 0 || strcmp(mode_str, "VCP+MSC") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC_MSC; - } - mode = USBD_MODE_CDC_MSC; - } else if (strcmp(mode_str, "CDC+HID") == 0 || strcmp(mode_str, "VCP+HID") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC_HID; - } - mode = USBD_MODE_CDC_HID; - } else if (strcmp(mode_str, "CDC") == 0 || strcmp(mode_str, "VCP") == 0) { - if (args[2].u_int == -1) { - pid = USBD_PID_CDC; - } - mode = USBD_MODE_CDC; - } else { - goto bad_mode; - } - - // get hid info if user selected such a mode - USBD_HID_ModeInfoTypeDef hid_info; - if (mode & USBD_MODE_HID) { - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[3].u_obj, 5, &items); - hid_info.subclass = mp_obj_get_int(items[0]); - hid_info.protocol = mp_obj_get_int(items[1]); - hid_info.max_packet_len = mp_obj_get_int(items[2]); - hid_info.polling_interval = mp_obj_get_int(items[3]); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(items[4], &bufinfo, MP_BUFFER_READ); - hid_info.report_desc = bufinfo.buf; - hid_info.report_desc_len = bufinfo.len; - - // need to keep a copy of this so report_desc does not get GC'd - MP_STATE_PORT(pyb_hid_report_desc) = items[4]; - } - - // init the USB device - if (!pyb_usb_dev_init(vid, pid, mode, &hid_info)) { - goto bad_mode; - } - -#else - // hardware not configured for USB - goto bad_mode; -#endif - - return mp_const_none; - -bad_mode: - mp_raise_ValueError("bad USB mode"); -} -MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_mode_obj, 0, pyb_usb_mode); - -/******************************************************************************/ -// MicroPython bindings for USB VCP - -/// \moduleref pyb -/// \class USB_VCP - USB virtual comm port -/// -/// The USB_VCP class allows creation of an object representing the USB -/// virtual comm port. It can be used to read and write data over USB to -/// the connected host. - -typedef struct _pyb_usb_vcp_obj_t { - mp_obj_base_t base; - usb_device_t *usb_dev; -} pyb_usb_vcp_obj_t; - -STATIC const pyb_usb_vcp_obj_t pyb_usb_vcp_obj = {{&pyb_usb_vcp_type}, &usb_device}; - -STATIC void pyb_usb_vcp_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mp_print_str(print, "USB_VCP()"); -} - -/// \classmethod \constructor() -/// Create a new USB_VCP object. -STATIC mp_obj_t pyb_usb_vcp_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // TODO raise exception if USB is not configured for VCP - - // return the USB VCP object - return (mp_obj_t)&pyb_usb_vcp_obj; -} - -STATIC mp_obj_t pyb_usb_vcp_setinterrupt(mp_obj_t self_in, mp_obj_t int_chr_in) { - mp_hal_set_interrupt_char(mp_obj_get_int(int_chr_in)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_usb_vcp_setinterrupt_obj, pyb_usb_vcp_setinterrupt); - -STATIC mp_obj_t pyb_usb_vcp_isconnected(mp_obj_t self_in) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_bool(usbd_cdc_is_connected(&self->usb_dev->usbd_cdc_itf)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_vcp_isconnected_obj, pyb_usb_vcp_isconnected); - -// deprecated in favour of USB_VCP.isconnected -STATIC mp_obj_t pyb_have_cdc(void) { - return pyb_usb_vcp_isconnected(MP_OBJ_NULL); -} -MP_DEFINE_CONST_FUN_OBJ_0(pyb_have_cdc_obj, pyb_have_cdc); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_usb_vcp_any(mp_obj_t self_in) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (usbd_cdc_rx_num(&self->usb_dev->usbd_cdc_itf) > 0) { - return mp_const_true; - } else { - return mp_const_false; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_vcp_any_obj, pyb_usb_vcp_any); - -/// \method send(data, *, timeout=5000) -/// Send data over the USB VCP: -/// -/// - `data` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: number of bytes sent. -STATIC const mp_arg_t pyb_usb_vcp_send_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_USB_VCP_SEND_NUM_ARGS MP_ARRAY_SIZE(pyb_usb_vcp_send_args) - -STATIC mp_obj_t pyb_usb_vcp_send(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[PYB_USB_VCP_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_USB_VCP_SEND_NUM_ARGS, pyb_usb_vcp_send_args, vals); - - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(vals[0].u_obj, &bufinfo, data); - - // send the data - int ret = usbd_cdc_tx(&self->usb_dev->usbd_cdc_itf, bufinfo.buf, bufinfo.len, vals[1].u_int); - - return mp_obj_new_int(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_vcp_send_obj, 1, pyb_usb_vcp_send); - -/// \method recv(data, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `data` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `data` is an integer then a new buffer of the bytes received, -/// otherwise the number of bytes read into `data` is returned. -STATIC mp_obj_t pyb_usb_vcp_recv(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[PYB_USB_VCP_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_USB_VCP_SEND_NUM_ARGS, pyb_usb_vcp_send_args, vals); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &vstr); - - // receive the data - int ret = usbd_cdc_rx(&self->usb_dev->usbd_cdc_itf, (uint8_t*)vstr.buf, vstr.len, vals[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return mp_obj_new_int(ret); // number of bytes read into given buffer - } else { - vstr.len = ret; // set actual number of bytes read - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); // create a new buffer - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_vcp_recv_obj, 1, pyb_usb_vcp_recv); - -mp_obj_t pyb_usb_vcp___exit__(size_t n_args, const mp_obj_t *args) { - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_usb_vcp___exit___obj, 4, 4, pyb_usb_vcp___exit__); - -STATIC const mp_rom_map_elem_t pyb_usb_vcp_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_setinterrupt), MP_ROM_PTR(&pyb_usb_vcp_setinterrupt_obj) }, - { MP_ROM_QSTR(MP_QSTR_isconnected), MP_ROM_PTR(&pyb_usb_vcp_isconnected_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_usb_vcp_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_usb_vcp_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_usb_vcp_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)}, - { MP_ROM_QSTR(MP_QSTR_readlines), MP_ROM_PTR(&mp_stream_unbuffered_readlines_obj)}, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&pyb_usb_vcp___exit___obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_usb_vcp_locals_dict, pyb_usb_vcp_locals_dict_table); - -STATIC mp_uint_t pyb_usb_vcp_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - int ret = usbd_cdc_rx(&self->usb_dev->usbd_cdc_itf, (byte*)buf, size, 0); - if (ret == 0) { - // return EAGAIN error to indicate non-blocking - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t pyb_usb_vcp_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - int ret = usbd_cdc_tx(&self->usb_dev->usbd_cdc_itf, (const byte*)buf, size, 0); - if (ret == 0) { - // return EAGAIN error to indicate non-blocking - *errcode = MP_EAGAIN; - return MP_STREAM_ERROR; - } - return ret; -} - -STATIC mp_uint_t pyb_usb_vcp_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - mp_uint_t ret; - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && usbd_cdc_rx_num(&self->usb_dev->usbd_cdc_itf) > 0) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && usbd_cdc_tx_half_empty(&self->usb_dev->usbd_cdc_itf)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t pyb_usb_vcp_stream_p = { - .read = pyb_usb_vcp_read, - .write = pyb_usb_vcp_write, - .ioctl = pyb_usb_vcp_ioctl, -}; - -const mp_obj_type_t pyb_usb_vcp_type = { - { &mp_type_type }, - .name = MP_QSTR_USB_VCP, - .print = pyb_usb_vcp_print, - .make_new = pyb_usb_vcp_make_new, - .getiter = mp_identity_getiter, - .iternext = mp_stream_unbuffered_iter, - .protocol = &pyb_usb_vcp_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_usb_vcp_locals_dict, -}; - -/******************************************************************************/ -// MicroPython bindings for USB HID - -typedef struct _pyb_usb_hid_obj_t { - mp_obj_base_t base; - usb_device_t *usb_dev; -} pyb_usb_hid_obj_t; - -STATIC const pyb_usb_hid_obj_t pyb_usb_hid_obj = {{&pyb_usb_hid_type}, &usb_device}; - -STATIC mp_obj_t pyb_usb_hid_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // TODO raise exception if USB is not configured for HID - - // return the USB HID object - return (mp_obj_t)&pyb_usb_hid_obj; -} - -/// \method recv(data, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `data` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `data` is an integer then a new buffer of the bytes received, -/// otherwise the number of bytes read into `data` is returned. -STATIC mp_obj_t pyb_usb_hid_recv(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - static const mp_arg_t allowed_args[] = { - { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, - }; - - // parse args - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(args[0]); - mp_arg_val_t vals[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, vals); - - // get the buffer to receive into - vstr_t vstr; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &vstr); - - // receive the data - int ret = usbd_hid_rx(&self->usb_dev->usbd_hid_itf, vstr.len, (uint8_t*)vstr.buf, vals[1].u_int); - - // return the received data - if (o_ret != MP_OBJ_NULL) { - return mp_obj_new_int(ret); // number of bytes read into given buffer - } else { - vstr.len = ret; // set actual number of bytes read - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); // create a new buffer - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_usb_hid_recv_obj, 1, pyb_usb_hid_recv); - -STATIC mp_obj_t pyb_usb_hid_send(mp_obj_t self_in, mp_obj_t report_in) { -#ifdef USE_DEVICE_MODE - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_buffer_info_t bufinfo; - byte temp_buf[8]; - // get the buffer to send from - // we accept either a byte array, or a tuple/list of integers - if (!mp_get_buffer(report_in, &bufinfo, MP_BUFFER_READ)) { - mp_obj_t *items; - mp_obj_get_array(report_in, &bufinfo.len, &items); - if (bufinfo.len > sizeof(temp_buf)) { - mp_raise_ValueError("tuple/list too large for HID report; use bytearray instead"); - } - for (int i = 0; i < bufinfo.len; i++) { - temp_buf[i] = mp_obj_get_int(items[i]); - } - bufinfo.buf = temp_buf; - } - - // send the data - if (USBD_OK == USBD_HID_SendReport(&self->usb_dev->usbd_cdc_msc_hid_state, bufinfo.buf, bufinfo.len)) { - return mp_obj_new_int(bufinfo.len); - } else { - return mp_obj_new_int(0); - } -#endif - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_usb_hid_send_obj, pyb_usb_hid_send); - -// deprecated in favour of USB_HID.send -STATIC mp_obj_t pyb_hid_send_report(mp_obj_t arg) { - return pyb_usb_hid_send(MP_OBJ_FROM_PTR(&pyb_usb_hid_obj), arg); -} -MP_DEFINE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj, pyb_hid_send_report); - -STATIC const mp_rom_map_elem_t pyb_usb_hid_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_usb_hid_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_usb_hid_recv_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_usb_hid_locals_dict, pyb_usb_hid_locals_dict_table); - -STATIC mp_uint_t pyb_usb_hid_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { - pyb_usb_vcp_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_uint_t ret; - if (request == MP_STREAM_POLL) { - mp_uint_t flags = arg; - ret = 0; - if ((flags & MP_STREAM_POLL_RD) && usbd_hid_rx_num(&self->usb_dev->usbd_hid_itf) > 0) { - ret |= MP_STREAM_POLL_RD; - } - if ((flags & MP_STREAM_POLL_WR) && USBD_HID_CanSendReport(&self->usb_dev->usbd_cdc_msc_hid_state)) { - ret |= MP_STREAM_POLL_WR; - } - } else { - *errcode = MP_EINVAL; - ret = MP_STREAM_ERROR; - } - return ret; -} - -STATIC const mp_stream_p_t pyb_usb_hid_stream_p = { - .ioctl = pyb_usb_hid_ioctl, -}; - -const mp_obj_type_t pyb_usb_hid_type = { - { &mp_type_type }, - .name = MP_QSTR_USB_HID, - .make_new = pyb_usb_hid_make_new, - .protocol = &pyb_usb_hid_stream_p, - .locals_dict = (mp_obj_dict_t*)&pyb_usb_hid_locals_dict, -}; - -/******************************************************************************/ -// code for experimental USB OTG support - -#ifdef USE_HOST_MODE - -#include "led.h" -#include "usbh_core.h" -#include "usbh_usr.h" -#include "usbh_hid_core.h" -#include "usbh_hid_keybd.h" -#include "usbh_hid_mouse.h" - -__ALIGN_BEGIN USBH_HOST USB_Host __ALIGN_END ; - -static int host_is_enabled = 0; - -void pyb_usb_host_init(void) { - if (!host_is_enabled) { - // only init USBH once in the device's power-lifetime - /* Init Host Library */ - USBH_Init(&USB_OTG_Core, USB_OTG_FS_CORE_ID, &USB_Host, &HID_cb, &USR_Callbacks); - } - host_is_enabled = 1; -} - -void pyb_usb_host_process(void) { - USBH_Process(&USB_OTG_Core, &USB_Host); -} - -uint8_t usb_keyboard_key = 0; - -// TODO this is an ugly hack to get key presses -uint pyb_usb_host_get_keyboard(void) { - uint key = usb_keyboard_key; - usb_keyboard_key = 0; - return key; -} - -void USR_MOUSE_Init(void) { - led_state(4, 1); - USB_OTG_BSP_mDelay(100); - led_state(4, 0); -} - -void USR_MOUSE_ProcessData(HID_MOUSE_Data_TypeDef *data) { - led_state(4, 1); - USB_OTG_BSP_mDelay(50); - led_state(4, 0); -} - -void USR_KEYBRD_Init(void) { - led_state(4, 1); - USB_OTG_BSP_mDelay(100); - led_state(4, 0); -} - -void USR_KEYBRD_ProcessData(uint8_t pbuf) { - led_state(4, 1); - USB_OTG_BSP_mDelay(50); - led_state(4, 0); - usb_keyboard_key = pbuf; -} - -#endif // USE_HOST_MODE diff --git a/ports/stm32/usb.h b/ports/stm32/usb.h deleted file mode 100644 index 41c461fb2ffd2..0000000000000 --- a/ports/stm32/usb.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_USB_H -#define MICROPY_INCLUDED_STMHAL_USB_H - -#include "usbd_cdc_msc_hid0.h" - -#define PYB_USB_FLAG_USB_MODE_CALLED (0x0002) - -// Windows needs a different PID to distinguish different device configurations -#define USBD_VID (0xf055) -#define USBD_PID_CDC_MSC (0x9800) -#define USBD_PID_CDC_HID (0x9801) -#define USBD_PID_CDC (0x9802) - -typedef enum { - PYB_USB_STORAGE_MEDIUM_NONE = 0, - PYB_USB_STORAGE_MEDIUM_FLASH, - PYB_USB_STORAGE_MEDIUM_SDCARD, -} pyb_usb_storage_medium_t; - -typedef enum { - USB_PHY_FS_ID = 0, - USB_PHY_HS_ID = 1, -} USB_PHY_ID; - -extern mp_uint_t pyb_usb_flags; -extern pyb_usb_storage_medium_t pyb_usb_storage_medium; -extern const struct _mp_obj_tuple_t pyb_usb_hid_mouse_obj; -extern const struct _mp_obj_tuple_t pyb_usb_hid_keyboard_obj; -extern const mp_obj_type_t pyb_usb_vcp_type; -extern const mp_obj_type_t pyb_usb_hid_type; -MP_DECLARE_CONST_FUN_OBJ_KW(pyb_usb_mode_obj); -MP_DECLARE_CONST_FUN_OBJ_0(pyb_have_cdc_obj); // deprecated -MP_DECLARE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj); // deprecated - -void pyb_usb_init0(void); -bool pyb_usb_dev_init(uint16_t vid, uint16_t pid, usb_device_mode_t mode, USBD_HID_ModeInfoTypeDef *hid_info); -void pyb_usb_dev_deinit(void); -bool usb_vcp_is_enabled(void); -int usb_vcp_recv_byte(uint8_t *c); // if a byte is available, return 1 and put the byte in *c, else return 0 -void usb_vcp_send_strn(const char* str, int len); - -void pyb_usb_host_init(void); -void pyb_usb_host_process(void); -uint pyb_usb_host_get_keyboard(void); - -#endif // MICROPY_INCLUDED_STMHAL_USB_H diff --git a/ports/stm32/usbd_cdc_interface.c b/ports/stm32/usbd_cdc_interface.c deleted file mode 100644 index 2e9fba917cd01..0000000000000 --- a/ports/stm32/usbd_cdc_interface.c +++ /dev/null @@ -1,349 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and heavily modified. See below for original - * copyright header. - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_cdc_interface.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Source file for USBD CDC interface - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include -#include - -#include "usbd_cdc_msc_hid.h" -#include "usbd_cdc_interface.h" -#include "pendsv.h" - -#include "py/obj.h" -#include "lib/utils/interrupt_char.h" -#include "irq.h" - -// CDC control commands -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -uint8_t *usbd_cdc_init(usbd_cdc_itf_t *cdc, usbd_cdc_msc_hid_state_t *usbd) { - // Link the parent state - cdc->usbd = usbd; - - // Reset all the CDC state - // Note: we don't reset tx_buf_ptr_in in order to allow the output buffer to - // be filled (by usbd_cdc_tx_always) before the USB device is connected. - cdc->rx_buf_put = 0; - cdc->rx_buf_get = 0; - cdc->tx_buf_ptr_out = 0; - cdc->tx_buf_ptr_out_shadow = 0; - cdc->tx_buf_ptr_wait_count = 0; - cdc->tx_need_empty_packet = 0; - cdc->dev_is_connected = 0; - - // Return the buffer to place the first USB OUT packet - return cdc->rx_packet_buf; -} - -// Manage the CDC class requests -// cmd: command code -// pbuf: buffer containing command data (request parameters) -// length: number of data to be sent (in bytes) -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_cdc_control(usbd_cdc_itf_t *cdc, uint8_t cmd, uint8_t* pbuf, uint16_t length) { - switch (cmd) { - case CDC_SEND_ENCAPSULATED_COMMAND: - /* Add your code here */ - break; - - case CDC_GET_ENCAPSULATED_RESPONSE: - /* Add your code here */ - break; - - case CDC_SET_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_GET_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_CLEAR_COMM_FEATURE: - /* Add your code here */ - break; - - case CDC_SET_LINE_CODING: - #if 0 - LineCoding.bitrate = (uint32_t)(pbuf[0] | (pbuf[1] << 8) |\ - (pbuf[2] << 16) | (pbuf[3] << 24)); - LineCoding.format = pbuf[4]; - LineCoding.paritytype = pbuf[5]; - LineCoding.datatype = pbuf[6]; - /* Set the new configuration */ - #endif - break; - - case CDC_GET_LINE_CODING: - /* Add your code here */ - pbuf[0] = (uint8_t)(115200); - pbuf[1] = (uint8_t)(115200 >> 8); - pbuf[2] = (uint8_t)(115200 >> 16); - pbuf[3] = (uint8_t)(115200 >> 24); - pbuf[4] = 0; // stop bits (1) - pbuf[5] = 0; // parity (none) - pbuf[6] = 8; // number of bits (8) - break; - - case CDC_SET_CONTROL_LINE_STATE: - cdc->dev_is_connected = length & 1; // wValue is passed in Len (bit of a hack) - break; - - case CDC_SEND_BREAK: - /* Add your code here */ - break; - - default: - break; - } - - return USBD_OK; -} - -// This function is called to process outgoing data. We hook directly into the -// SOF (start of frame) callback so that it is called exactly at the time it is -// needed (reducing latency), and often enough (increasing bandwidth). -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) { - usbd_cdc_msc_hid_state_t *usbd = ((USBD_HandleTypeDef*)hpcd->pData)->pClassData; - usbd_cdc_itf_t *cdc = usbd->cdc; - - if (cdc == NULL || !cdc->dev_is_connected) { - // CDC device is not connected to a host, so we are unable to send any data - return; - } - - if (cdc->tx_buf_ptr_out == cdc->tx_buf_ptr_in && !cdc->tx_need_empty_packet) { - // No outstanding data to send - return; - } - - if (cdc->tx_buf_ptr_out != cdc->tx_buf_ptr_out_shadow) { - // We have sent data and are waiting for the low-level USB driver to - // finish sending it over the USB in-endpoint. - // SOF occurs every 1ms, so we have a 500 * 1ms = 500ms timeout - // We have a relatively large timeout because the USB host may be busy - // doing other things and we must give it a chance to read our data. - if (cdc->tx_buf_ptr_wait_count < 500) { - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - if (USBx_INEP(CDC_IN_EP & 0x7f)->DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ) { - // USB in-endpoint is still reading the data - cdc->tx_buf_ptr_wait_count++; - return; - } - } - cdc->tx_buf_ptr_out = cdc->tx_buf_ptr_out_shadow; - } - - if (cdc->tx_buf_ptr_out_shadow != cdc->tx_buf_ptr_in || cdc->tx_need_empty_packet) { - uint32_t buffptr; - uint32_t buffsize; - - if (cdc->tx_buf_ptr_out_shadow > cdc->tx_buf_ptr_in) { // rollback - buffsize = USBD_CDC_TX_DATA_SIZE - cdc->tx_buf_ptr_out_shadow; - } else { - buffsize = cdc->tx_buf_ptr_in - cdc->tx_buf_ptr_out_shadow; - } - - buffptr = cdc->tx_buf_ptr_out_shadow; - - if (USBD_CDC_TransmitPacket(cdc->usbd, buffsize, &cdc->tx_buf[buffptr]) == USBD_OK) { - cdc->tx_buf_ptr_out_shadow += buffsize; - if (cdc->tx_buf_ptr_out_shadow == USBD_CDC_TX_DATA_SIZE) { - cdc->tx_buf_ptr_out_shadow = 0; - } - cdc->tx_buf_ptr_wait_count = 0; - - // According to the USB specification, a packet size of 64 bytes (CDC_DATA_FS_MAX_PACKET_SIZE) - // gets held at the USB host until the next packet is sent. This is because a - // packet of maximum size is considered to be part of a longer chunk of data, and - // the host waits for all data to arrive (ie, waits for a packet < max packet size). - // To flush a packet of exactly max packet size, we need to send a zero-size packet. - // See eg http://www.cypress.com/?id=4&rID=92719 - cdc->tx_need_empty_packet = (buffsize > 0 && buffsize % CDC_DATA_FS_MAX_PACKET_SIZE == 0 && cdc->tx_buf_ptr_out_shadow == cdc->tx_buf_ptr_in); - } - } -} - -// Data received over USB OUT endpoint is processed here. -// len: number of bytes received into the buffer we passed to USBD_CDC_ReceivePacket -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_cdc_receive(usbd_cdc_itf_t *cdc, size_t len) { - // copy the incoming data into the circular buffer - for (const uint8_t *src = cdc->rx_packet_buf, *top = cdc->rx_packet_buf + len; src < top; ++src) { - if (mp_interrupt_char != -1 && *src == mp_interrupt_char) { - pendsv_kbd_intr(); - } else { - uint16_t next_put = (cdc->rx_buf_put + 1) & (USBD_CDC_RX_DATA_SIZE - 1); - if (next_put == cdc->rx_buf_get) { - // overflow, we just discard the rest of the chars - break; - } - cdc->rx_user_buf[cdc->rx_buf_put] = *src; - cdc->rx_buf_put = next_put; - } - } - - // initiate next USB packet transfer - USBD_CDC_ReceivePacket(cdc->usbd, cdc->rx_packet_buf); - - return USBD_OK; -} - -int usbd_cdc_tx_half_empty(usbd_cdc_itf_t *cdc) { - int32_t tx_waiting = (int32_t)cdc->tx_buf_ptr_in - (int32_t)cdc->tx_buf_ptr_out; - if (tx_waiting < 0) { - tx_waiting += USBD_CDC_TX_DATA_SIZE; - } - return tx_waiting <= USBD_CDC_TX_DATA_SIZE / 2; -} - -// timout in milliseconds. -// Returns number of bytes written to the device. -int usbd_cdc_tx(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len, uint32_t timeout) { - for (uint32_t i = 0; i < len; i++) { - // Wait until the device is connected and the buffer has space, with a given timeout - uint32_t start = HAL_GetTick(); - while (!cdc->dev_is_connected || ((cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1)) == cdc->tx_buf_ptr_out) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return i; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be drained; return immediately - return i; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Write data to device buffer - cdc->tx_buf[cdc->tx_buf_ptr_in] = buf[i]; - cdc->tx_buf_ptr_in = (cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1); - } - - // Success, return number of bytes read - return len; -} - -// Always write all of the data to the device tx buffer, even if the -// device is not connected, or if the buffer is full. Has a small timeout -// to wait for the buffer to be drained, in the case the device is connected. -void usbd_cdc_tx_always(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len) { - for (int i = 0; i < len; i++) { - // If the CDC device is not connected to the host then we don't have anyone to receive our data. - // The device may become connected in the future, so we should at least try to fill the buffer - // and hope that it doesn't overflow by the time the device connects. - // If the device is not connected then we should go ahead and fill the buffer straight away, - // ignoring overflow. Otherwise, we should make sure that we have enough room in the buffer. - if (cdc->dev_is_connected) { - // If the buffer is full, wait until it gets drained, with a timeout of 500ms - // (wraparound of tick is taken care of by 2's complement arithmetic). - uint32_t start = HAL_GetTick(); - while (((cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1)) == cdc->tx_buf_ptr_out && HAL_GetTick() - start <= 500) { - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be drained; exit loop - break; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Some unused code that makes sure the low-level USB buffer is drained. - // Waiting for low-level is handled in HAL_PCD_SOFCallback. - /* - start = HAL_GetTick(); - PCD_HandleTypeDef *hpcd = hUSBDDevice.pData; - if (hpcd->IN_ep[0x83 & 0x7f].is_in) { - //volatile uint32_t *xfer_count = &hpcd->IN_ep[0x83 & 0x7f].xfer_count; - //volatile uint32_t *xfer_len = &hpcd->IN_ep[0x83 & 0x7f].xfer_len; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - while ( - // *xfer_count < *xfer_len // using this works - // (USBx_INEP(3)->DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ) // using this works - && HAL_GetTick() - start <= 2000) { - __WFI(); // enter sleep mode, waiting for interrupt - } - } - */ - } - - cdc->tx_buf[cdc->tx_buf_ptr_in] = buf[i]; - cdc->tx_buf_ptr_in = (cdc->tx_buf_ptr_in + 1) & (USBD_CDC_TX_DATA_SIZE - 1); - } -} - -// Returns number of bytes in the rx buffer. -int usbd_cdc_rx_num(usbd_cdc_itf_t *cdc) { - int32_t rx_waiting = (int32_t)cdc->rx_buf_put - (int32_t)cdc->rx_buf_get; - if (rx_waiting < 0) { - rx_waiting += USBD_CDC_RX_DATA_SIZE; - } - return rx_waiting; -} - -// timout in milliseconds. -// Returns number of bytes read from the device. -int usbd_cdc_rx(usbd_cdc_itf_t *cdc, uint8_t *buf, uint32_t len, uint32_t timeout) { - // loop to read bytes - for (uint32_t i = 0; i < len; i++) { - // Wait until we have at least 1 byte to read - uint32_t start = HAL_GetTick(); - while (cdc->rx_buf_put == cdc->rx_buf_get) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return i; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be filled; return immediately - return i; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // Copy byte from device to user buffer - buf[i] = cdc->rx_user_buf[cdc->rx_buf_get]; - cdc->rx_buf_get = (cdc->rx_buf_get + 1) & (USBD_CDC_RX_DATA_SIZE - 1); - } - - // Success, return number of bytes read - return len; -} diff --git a/ports/stm32/usbd_cdc_interface.h b/ports/stm32/usbd_cdc_interface.h deleted file mode 100644 index 98b8fc077d399..0000000000000 --- a/ports/stm32/usbd_cdc_interface.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ -#ifndef MICROPY_INCLUDED_STMHAL_USBD_CDC_INTERFACE_H -#define MICROPY_INCLUDED_STMHAL_USBD_CDC_INTERFACE_H - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Inc/usbd_cdc_interface.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Header for usbd_cdc_interface.c file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#define USBD_CDC_RX_DATA_SIZE (1024) // this must be 2 or greater, and a power of 2 -#define USBD_CDC_TX_DATA_SIZE (1024) // I think this can be any value (was 2048) - -typedef struct _usbd_cdc_itf_t { - usbd_cdc_msc_hid_state_t *usbd; // the parent USB device - - uint8_t rx_packet_buf[CDC_DATA_FS_MAX_PACKET_SIZE]; // received data from USB OUT endpoint is stored in this buffer - uint8_t rx_user_buf[USBD_CDC_RX_DATA_SIZE]; // received data is buffered here until the user reads it - volatile uint16_t rx_buf_put; // circular buffer index - uint16_t rx_buf_get; // circular buffer index - - uint8_t tx_buf[USBD_CDC_TX_DATA_SIZE]; // data for USB IN endpoind is stored in this buffer - uint16_t tx_buf_ptr_in; // increment this pointer modulo USBD_CDC_TX_DATA_SIZE when new data is available - volatile uint16_t tx_buf_ptr_out; // increment this pointer modulo USBD_CDC_TX_DATA_SIZE when data is drained - uint16_t tx_buf_ptr_out_shadow; // shadow of above - uint8_t tx_buf_ptr_wait_count; // used to implement a timeout waiting for low-level USB driver - uint8_t tx_need_empty_packet; // used to flush the USB IN endpoint if the last packet was exactly the endpoint packet size - - volatile uint8_t dev_is_connected; // indicates if we are connected -} usbd_cdc_itf_t; - -static inline int usbd_cdc_is_connected(usbd_cdc_itf_t *cdc) { - return cdc->dev_is_connected; -} - -int usbd_cdc_tx_half_empty(usbd_cdc_itf_t *cdc); -int usbd_cdc_tx(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len, uint32_t timeout); -void usbd_cdc_tx_always(usbd_cdc_itf_t *cdc, const uint8_t *buf, uint32_t len); - -int usbd_cdc_rx_num(usbd_cdc_itf_t *cdc); -int usbd_cdc_rx(usbd_cdc_itf_t *cdc, uint8_t *buf, uint32_t len, uint32_t timeout); - -#endif // MICROPY_INCLUDED_STMHAL_USBD_CDC_INTERFACE_H diff --git a/ports/stm32/usbd_conf.c b/ports/stm32/usbd_conf.c deleted file mode 100644 index d39144851ffcc..0000000000000 --- a/ports/stm32/usbd_conf.c +++ /dev/null @@ -1,689 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_conf.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file implements the USB Device library callbacks and MSP - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" -#include "py/obj.h" -#include "irq.h" -#include "usb.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -#ifdef USE_USB_FS -PCD_HandleTypeDef pcd_fs_handle; -#endif -#ifdef USE_USB_HS -PCD_HandleTypeDef pcd_hs_handle; -#endif -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* - PCD BSP Routines -*******************************************************************************/ -/** - * @brief Initializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) -{ - GPIO_InitTypeDef GPIO_InitStruct; - - if(hpcd->Instance == USB_OTG_FS) - { - /* Configure USB FS GPIOs */ - __GPIOA_CLK_ENABLE(); - - GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* Configure VBUS Pin */ -#if defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - // USB VBUS detect pin is always A9 - GPIO_InitStruct.Pin = GPIO_PIN_9; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -#endif - -#if defined(MICROPY_HW_USB_OTG_ID_PIN) - // USB ID pin is always A10 - GPIO_InitStruct.Pin = GPIO_PIN_10; - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -#endif - - /* Enable USB FS Clocks */ - __USB_OTG_FS_CLK_ENABLE(); - -#if defined (MCU_SERIES_L4) - /* Enable VDDUSB */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - else - { - HAL_PWREx_EnableVddUSB(); - } -#endif - - /* Set USBFS Interrupt priority */ - HAL_NVIC_SetPriority(OTG_FS_IRQn, IRQ_PRI_OTG_FS, IRQ_SUBPRI_OTG_FS); - - /* Enable USBFS Interrupt */ - HAL_NVIC_EnableIRQ(OTG_FS_IRQn); - } -#if defined(USE_USB_HS) - else if(hpcd->Instance == USB_OTG_HS) - { -#if defined(USE_USB_HS_IN_FS) - - /* Configure USB FS GPIOs */ - __GPIOB_CLK_ENABLE(); - - /* Configure DM DP Pins */ - GPIO_InitStruct.Pin = (GPIO_PIN_14 | GPIO_PIN_15); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - -#if defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - /* Configure VBUS Pin */ - GPIO_InitStruct.Pin = GPIO_PIN_13; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -#endif - -#if defined(MICROPY_HW_USB_OTG_ID_PIN) - /* Configure ID pin */ - GPIO_InitStruct.Pin = GPIO_PIN_12; - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -#endif - /* - * Enable calling WFI and correct - * function of the embedded USB_FS_IN_HS phy - */ - __OTGHSULPI_CLK_SLEEP_DISABLE(); - __OTGHS_CLK_SLEEP_ENABLE(); - /* Enable USB HS Clocks */ - __USB_OTG_HS_CLK_ENABLE(); - -#else // !USE_USB_HS_IN_FS - - /* Configure USB HS GPIOs */ - __GPIOA_CLK_ENABLE(); - __GPIOB_CLK_ENABLE(); - __GPIOC_CLK_ENABLE(); - __GPIOH_CLK_ENABLE(); - __GPIOI_CLK_ENABLE(); - - /* CLK */ - GPIO_InitStruct.Pin = GPIO_PIN_5; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* D0 */ - GPIO_InitStruct.Pin = GPIO_PIN_3; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* D1 D2 D3 D4 D5 D6 D7 */ - GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_5 |\ - GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* STP */ - GPIO_InitStruct.Pin = GPIO_PIN_0; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /* NXT */ - GPIO_InitStruct.Pin = GPIO_PIN_4; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); - - /* DIR */ - GPIO_InitStruct.Pin = GPIO_PIN_11; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; - HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); - - /* Enable USB HS Clocks */ - __USB_OTG_HS_CLK_ENABLE(); - __USB_OTG_HS_ULPI_CLK_ENABLE(); -#endif // !USE_USB_HS_IN_FS - - /* Set USBHS Interrupt to the lowest priority */ - HAL_NVIC_SetPriority(OTG_HS_IRQn, IRQ_PRI_OTG_HS, IRQ_SUBPRI_OTG_HS); - - /* Enable USBHS Interrupt */ - HAL_NVIC_EnableIRQ(OTG_HS_IRQn); - } -#endif // USE_USB_HS -} -/** - * @brief DeInitializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) -{ - if(hpcd->Instance == USB_OTG_FS) - { - /* Disable USB FS Clocks */ - __USB_OTG_FS_CLK_DISABLE(); - __SYSCFG_CLK_DISABLE(); - } - #if defined(USE_USB_HS) - else if(hpcd->Instance == USB_OTG_HS) - { - /* Disable USB FS Clocks */ - __USB_OTG_HS_CLK_DISABLE(); - __SYSCFG_CLK_DISABLE(); - } - #endif -} - -/******************************************************************************* - LL Driver Callbacks (PCD -> USB Device Library) -*******************************************************************************/ - - -/** - * @brief Setup stage callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SetupStage(hpcd->pData, (uint8_t *)hpcd->Setup); -} - -/** - * @brief Data Out stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataOutStage(hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); -} - -/** - * @brief Data In stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataInStage(hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); -} - -/** - * @brief SOF callback. - * @param hpcd: PCD handle - * @retval None - */ -/* -This is now handled by the USB CDC interface. -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SOF(hpcd->pData); -} -*/ - -/** - * @brief Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_SpeedTypeDef speed = USBD_SPEED_FULL; - - /* Set USB Current Speed */ - switch(hpcd->Init.speed) - { -#if defined(PCD_SPEED_HIGH) - case PCD_SPEED_HIGH: - speed = USBD_SPEED_HIGH; - break; -#endif - - case PCD_SPEED_FULL: - speed = USBD_SPEED_FULL; - break; - - default: - speed = USBD_SPEED_FULL; - break; - } - USBD_LL_SetSpeed(hpcd->pData, speed); - - /* Reset Device */ - USBD_LL_Reset(hpcd->pData); -} - -/** - * @brief Suspend callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_Suspend(hpcd->pData); -} - -/** - * @brief Resume callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_Resume(hpcd->pData); -} - -/** - * @brief ISOC Out Incomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoOUTIncomplete(hpcd->pData, epnum); -} - -/** - * @brief ISOC In Incomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint Number - * @retval None - */ -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoINIncomplete(hpcd->pData, epnum); -} - -/** - * @brief Connect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevConnected(hpcd->pData); -} - -/** - * @brief Disconnect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevDisconnected(hpcd->pData); -} - -/******************************************************************************* - LL Driver Interface (USB Device Library --> PCD) -*******************************************************************************/ -/** - * @brief Initializes the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev) -{ -#if defined(USE_USB_FS) -if (pdev->id == USB_PHY_FS_ID) -{ - /*Set LL Driver parameters */ - pcd_fs_handle.Instance = USB_OTG_FS; - pcd_fs_handle.Init.dev_endpoints = 4; - pcd_fs_handle.Init.use_dedicated_ep1 = 0; - pcd_fs_handle.Init.ep0_mps = 0x40; - pcd_fs_handle.Init.dma_enable = 0; - pcd_fs_handle.Init.low_power_enable = 0; - pcd_fs_handle.Init.phy_itface = PCD_PHY_EMBEDDED; - pcd_fs_handle.Init.Sof_enable = 1; - pcd_fs_handle.Init.speed = PCD_SPEED_FULL; -#if defined(MCU_SERIES_L4) - pcd_fs_handle.Init.lpm_enable = DISABLE; - pcd_fs_handle.Init.battery_charging_enable = DISABLE; -#endif -#if !defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - pcd_fs_handle.Init.vbus_sensing_enable = 0; // No VBUS Sensing on USB0 -#else - pcd_fs_handle.Init.vbus_sensing_enable = 1; -#endif - /* Link The driver to the stack */ - pcd_fs_handle.pData = pdev; - pdev->pData = &pcd_fs_handle; - /*Initialize LL Driver */ - HAL_PCD_Init(&pcd_fs_handle); - - HAL_PCD_SetRxFiFo(&pcd_fs_handle, 0x80); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 0, 0x20); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 1, 0x40); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 2, 0x20); - HAL_PCD_SetTxFiFo(&pcd_fs_handle, 3, 0x40); -} -#endif -#if defined(USE_USB_HS) -if (pdev->id == USB_PHY_HS_ID) -{ -#if defined(USE_USB_HS_IN_FS) - /*Set LL Driver parameters */ - pcd_hs_handle.Instance = USB_OTG_HS; - pcd_hs_handle.Init.dev_endpoints = 4; - pcd_hs_handle.Init.use_dedicated_ep1 = 0; - pcd_hs_handle.Init.ep0_mps = 0x40; - pcd_hs_handle.Init.dma_enable = 0; - pcd_hs_handle.Init.low_power_enable = 0; - pcd_hs_handle.Init.phy_itface = PCD_PHY_EMBEDDED; - pcd_hs_handle.Init.Sof_enable = 1; - pcd_hs_handle.Init.speed = PCD_SPEED_HIGH_IN_FULL; -#if !defined(MICROPY_HW_USB_VBUS_DETECT_PIN) - pcd_hs_handle.Init.vbus_sensing_enable = 0; // No VBUS Sensing on USB0 -#else - pcd_hs_handle.Init.vbus_sensing_enable = 1; -#endif - /* Link The driver to the stack */ - pcd_hs_handle.pData = pdev; - pdev->pData = &pcd_hs_handle; - /*Initialize LL Driver */ - HAL_PCD_Init(&pcd_hs_handle); - - HAL_PCD_SetRxFiFo(&pcd_hs_handle, 0x80); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 0, 0x20); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 1, 0x40); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 2, 0x20); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 3, 0x40); -#else // !defined(USE_USB_HS_IN_FS) - /*Set LL Driver parameters */ - pcd_hs_handle.Instance = USB_OTG_HS; - pcd_hs_handle.Init.dev_endpoints = 6; - pcd_hs_handle.Init.use_dedicated_ep1 = 0; - pcd_hs_handle.Init.ep0_mps = 0x40; - - /* Be aware that enabling USB-DMA mode will result in data being sent only by - multiple of 4 packet sizes. This is due to the fact that USB-DMA does - not allow sending data from non word-aligned addresses. - For this specific application, it is advised to not enable this option - unless required. */ - pcd_hs_handle.Init.dma_enable = 0; - - pcd_hs_handle.Init.low_power_enable = 0; - pcd_hs_handle.Init.phy_itface = PCD_PHY_ULPI; - pcd_hs_handle.Init.Sof_enable = 1; - pcd_hs_handle.Init.speed = PCD_SPEED_HIGH; - pcd_hs_handle.Init.vbus_sensing_enable = 1; - /* Link The driver to the stack */ - pcd_hs_handle.pData = pdev; - pdev->pData = &pcd_hs_handle; - /*Initialize LL Driver */ - HAL_PCD_Init(&pcd_hs_handle); - - HAL_PCD_SetRxFiFo(&pcd_hs_handle, 0x200); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 0, 0x80); - HAL_PCD_SetTxFiFo(&pcd_hs_handle, 1, 0x174); - -#endif // !USE_USB_HS_IN_FS -} -#endif // USE_USB_HS - return USBD_OK; -} - -/** - * @brief De-Initializes the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) -{ - HAL_PCD_DeInit(pdev->pData); - return USBD_OK; -} - -/** - * @brief Starts the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) -{ - HAL_PCD_Start(pdev->pData); - return USBD_OK; -} - -/** - * @brief Stops the Low Level portion of the Device driver. - * @param pdev: Device handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) -{ - HAL_PCD_Stop(pdev->pData); - return USBD_OK; -} - -/** - * @brief Opens an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param ep_type: Endpoint Type - * @param ep_mps: Endpoint Max Packet Size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_mps) -{ - HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); - return USBD_OK; -} - -/** - * @brief Closes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_PCD_EP_Close(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Flushes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_PCD_EP_Flush(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Sets a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_PCD_EP_SetStall(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Clears a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); - return USBD_OK; -} - -/** - * @brief Returns Stall condition. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval Stall (1: yes, 0: No) - */ -uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - PCD_HandleTypeDef *hpcd = pdev->pData; - - if((ep_addr & 0x80) == 0x80) - { - return hpcd->IN_ep[ep_addr & 0x7F].is_stall; - } - else - { - return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; - } -} - -/** - * @brief Assigns an USB address to the device - * @param pdev: Device handle - * @param dev_addr: USB address - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) -{ - HAL_PCD_SetAddress(pdev->pData, dev_addr); - return USBD_OK; -} - -/** - * @brief Transmits data over an endpoint - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param pbuf: Pointer to data to be sent - * @param size: Data size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size) -{ - HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); - return USBD_OK; -} - -/** - * @brief Prepares an endpoint for reception - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @param pbuf:pointer to data to be received - * @param size: data size - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size) -{ - HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); - return USBD_OK; -} - -/** - * @brief Returns the last transfered packet size. - * @param pdev: Device handle - * @param ep_addr: Endpoint Number - * @retval Recived Data Size - */ -uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - return HAL_PCD_EP_GetRxCount(pdev->pData, ep_addr); -} - -/** - * @brief Delay routine for the USB Device Library - * @param Delay: Delay in ms - * @retval None - */ -void USBD_LL_Delay(uint32_t Delay) -{ - HAL_Delay(Delay); -} - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_conf.h b/ports/stm32/usbd_conf.h deleted file mode 100644 index 34ebe27b9a094..0000000000000 --- a/ports/stm32/usbd_conf.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Inc/usbd_conf.h - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief General low level driver configuration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CONF_H -#define __USBD_CONF_H - -/* Includes ------------------------------------------------------------------*/ -#include -#include -#include - -#include "py/mpconfig.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Common Config */ -#define USBD_MAX_NUM_INTERFACES 1 -#define USBD_MAX_NUM_CONFIGURATION 1 -#define USBD_MAX_STR_DESC_SIZ 0x100 -#define USBD_SUPPORT_USER_STRING 0 -#define USBD_SELF_POWERED 0 -#define USBD_DEBUG_LEVEL 0 - -/* Exported macro ------------------------------------------------------------*/ -/* Memory management macros */ -/* -these should not be used because the GC is reset on a soft reset but the usb is not -#include "gc.h" -#define USBD_malloc gc_alloc -#define USBD_free gc_free -#define USBD_memset memset -#define USBD_memcpy memcpy -*/ - -/* DEBUG macros */ -#if (USBD_DEBUG_LEVEL > 0) -#define USBD_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_UsrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 1) - -#define USBD_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_ErrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 2) -#define USBD_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_DbgLog(...) -#endif - -/* Exported functions ------------------------------------------------------- */ - -#endif /* __USBD_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_desc.c b/ports/stm32/usbd_desc.c deleted file mode 100644 index 1de75aee0f823..0000000000000 --- a/ports/stm32/usbd_desc.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_desc.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief This file provides the USBD descriptors and string formating method. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_conf.h" - -// need these headers just for MP_HAL_UNIQUE_ID_ADDRESS -#include "py/misc.h" -#include "py/mphal.h" - -// So we don't clash with existing ST boards, we use the unofficial FOSS VID. -// This needs a proper solution. -#define USBD_VID 0xf055 -#define USBD_PID 0x9800 -#define USBD_LANGID_STRING 0x409 -#define USBD_MANUFACTURER_STRING "MicroPython" -#define USBD_PRODUCT_HS_STRING "Pyboard Virtual Comm Port in HS Mode" -#define USBD_PRODUCT_FS_STRING "Pyboard Virtual Comm Port in FS Mode" -#define USBD_CONFIGURATION_HS_STRING "Pyboard Config" -#define USBD_INTERFACE_HS_STRING "Pyboard Interface" -#define USBD_CONFIGURATION_FS_STRING "Pyboard Config" -#define USBD_INTERFACE_FS_STRING "Pyboard Interface" - -__ALIGN_BEGIN static const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = { - USB_LEN_LANGID_STR_DESC, - USB_DESC_TYPE_STRING, - LOBYTE(USBD_LANGID_STRING), - HIBYTE(USBD_LANGID_STRING), -}; - -// set the VID, PID and device release number -void USBD_SetVIDPIDRelease(usbd_cdc_msc_hid_state_t *usbd, uint16_t vid, uint16_t pid, uint16_t device_release_num, int cdc_only) { - uint8_t *dev_desc = &usbd->usbd_device_desc[0]; - - dev_desc[0] = USB_LEN_DEV_DESC; // bLength - dev_desc[1] = USB_DESC_TYPE_DEVICE; // bDescriptorType - dev_desc[2] = 0x00; // bcdUSB - dev_desc[3] = 0x02; // bcdUSB - if (cdc_only) { - // Make it look like a Communications device if we're only - // using CDC. Otherwise, windows gets confused when we tell it that - // its a composite device with only a cdc serial interface. - dev_desc[4] = 0x02; // bDeviceClass - dev_desc[5] = 0x00; // bDeviceSubClass - dev_desc[6] = 0x00; // bDeviceProtocol - } else { - // For the other modes, we make this look like a composite device. - dev_desc[4] = 0xef; // bDeviceClass: Miscellaneous Device Class - dev_desc[5] = 0x02; // bDeviceSubClass: Common Class - dev_desc[6] = 0x01; // bDeviceProtocol: Interface Association Descriptor - } - dev_desc[7] = USB_MAX_EP0_SIZE; // bMaxPacketSize - dev_desc[8] = LOBYTE(vid); // idVendor - dev_desc[9] = HIBYTE(vid); // idVendor - dev_desc[10] = LOBYTE(pid); // idVendor - dev_desc[11] = HIBYTE(pid); // idVendor - dev_desc[12] = LOBYTE(device_release_num); // bcdDevice - dev_desc[13] = HIBYTE(device_release_num); // bcdDevice - dev_desc[14] = USBD_IDX_MFC_STR; // Index of manufacturer string - dev_desc[15] = USBD_IDX_PRODUCT_STR; // Index of product string - dev_desc[16] = USBD_IDX_SERIAL_STR; // Index of serial number string - dev_desc[17] = USBD_MAX_NUM_CONFIGURATION; // bNumConfigurations -} - -/** - * @brief Returns the device descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_DeviceDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *dev_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_device_desc; - *length = USB_LEN_DEV_DESC; - return dev_desc; -} - -/** - * @brief Returns the LangID string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_LangIDStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - *length = sizeof(USBD_LangIDDesc); - return (uint8_t*)USBD_LangIDDesc; // the data should only be read from this buf -} - -/** - * @brief Returns the product string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_ProductStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - if (pdev->dev_speed == USBD_SPEED_HIGH) { - USBD_GetString((uint8_t *)USBD_PRODUCT_HS_STRING, str_desc, length); - } else { - USBD_GetString((uint8_t *)USBD_PRODUCT_FS_STRING, str_desc, length); - } - return str_desc; -} - -/** - * @brief Returns the manufacturer string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_ManufacturerStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, str_desc, length); - return str_desc; -} - -/** - * @brief Returns the serial number string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_SerialStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - // This document: http://www.usb.org/developers/docs/devclass_docs/usbmassbulk_10.pdf - // says that the serial number has to be at least 12 digits long and that - // the last 12 digits need to be unique. It also stipulates that the valid - // character set is that of upper-case hexadecimal digits. - // - // The onboard DFU bootloader produces a 12-digit serial number based on - // the 96-bit unique ID, so for consistency we go with this algorithm. - // You can see the serial number if you do: - // - // dfu-util -l - // - // See: https://my.st.com/52d187b7 for the algorithim used. - - uint8_t *id = (uint8_t *)MP_HAL_UNIQUE_ID_ADDRESS; - char serial_buf[16]; - snprintf(serial_buf, sizeof(serial_buf), - "%02X%02X%02X%02X%02X%02X", - id[11], id[10] + id[2], id[9], id[8] + id[0], id[7], id[6]); - - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - USBD_GetString((uint8_t *)serial_buf, str_desc, length); - return str_desc; -} - -/** - * @brief Returns the configuration string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_ConfigStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - if (pdev->dev_speed == USBD_SPEED_HIGH) { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_HS_STRING, str_desc, length); - } else { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_FS_STRING, str_desc, length); - } - return str_desc; -} - -/** - * @brief Returns the interface string descriptor. - * @param speed: Current device speed - * @param length: Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -STATIC uint8_t *USBD_InterfaceStrDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - uint8_t *str_desc = ((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->usbd_str_desc; - if (pdev->dev_speed == USBD_SPEED_HIGH) { - USBD_GetString((uint8_t *)USBD_INTERFACE_HS_STRING, str_desc, length); - } else { - USBD_GetString((uint8_t *)USBD_INTERFACE_FS_STRING, str_desc, length); - } - return str_desc; -} - -const USBD_DescriptorsTypeDef USBD_Descriptors = { - USBD_DeviceDescriptor, - USBD_LangIDStrDescriptor, - USBD_ManufacturerStrDescriptor, - USBD_ProductStrDescriptor, - USBD_SerialStrDescriptor, - USBD_ConfigStrDescriptor, - USBD_InterfaceStrDescriptor, -}; - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbd_desc.h b/ports/stm32/usbd_desc.h deleted file mode 100644 index a4de6c6819cdd..0000000000000 --- a/ports/stm32/usbd_desc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_USBD_DESC_H -#define MICROPY_INCLUDED_STMHAL_USBD_DESC_H - -#include "usbd_cdc_msc_hid.h" - -extern const USBD_DescriptorsTypeDef USBD_Descriptors; - -void USBD_SetVIDPIDRelease(usbd_cdc_msc_hid_state_t *usbd, uint16_t vid, uint16_t pid, uint16_t device_release_num, int cdc_only); - -#endif // MICROPY_INCLUDED_STMHAL_USBD_DESC_H diff --git a/ports/stm32/usbd_hid_interface.c b/ports/stm32/usbd_hid_interface.c deleted file mode 100644 index 4ee533c21cf9f..0000000000000 --- a/ports/stm32/usbd_hid_interface.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * Taken from ST Cube library and heavily modified. See below for original - * copyright header. - */ - -/** - ****************************************************************************** - * @file USB_Device/CDC_Standalone/Src/usbd_cdc_interface.c - * @author MCD Application Team - * @version V1.0.1 - * @date 26-February-2014 - * @brief Source file for USBD CDC interface - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include - -#include "usbd_hid_interface.h" - -#include "py/obj.h" -#include "irq.h" -#include "usb.h" - -uint8_t *usbd_hid_init(usbd_hid_itf_t *hid, usbd_cdc_msc_hid_state_t *usbd) { - hid->usbd = usbd; - hid->current_read_buffer = 0; - hid->last_read_len = 0; - hid->current_write_buffer = 0; - - // Return the buffer to place the first USB OUT packet - return hid->buffer[hid->current_write_buffer]; -} - -// Data received over USB OUT endpoint is processed here. -// len: number of bytes received into the buffer we passed to USBD_HID_ReceivePacket -// Returns USBD_OK if all operations are OK else USBD_FAIL -int8_t usbd_hid_receive(usbd_hid_itf_t *hid, size_t len) { - hid->current_write_buffer = !hid->current_write_buffer; - hid->last_read_len = len; - // initiate next USB packet transfer, to append to existing data in buffer - USBD_HID_ReceivePacket(hid->usbd, hid->buffer[hid->current_write_buffer]); - // Set NAK to indicate we need to process read buffer - USBD_HID_SetNAK(hid->usbd); - return USBD_OK; -} - -// Returns number of ready rx buffers. -int usbd_hid_rx_num(usbd_hid_itf_t *hid) { - return hid->current_read_buffer != hid->current_write_buffer; -} - -// timout in milliseconds. -// Returns number of bytes read from the device. -int usbd_hid_rx(usbd_hid_itf_t *hid, size_t len, uint8_t *buf, uint32_t timeout) { - // Wait until we have buffer to read - uint32_t start = HAL_GetTick(); - while (hid->current_read_buffer == hid->current_write_buffer) { - // Wraparound of tick is taken care of by 2's complement arithmetic. - if (HAL_GetTick() - start >= timeout) { - // timeout - return 0; - } - if (query_irq() == IRQ_STATE_DISABLED) { - // IRQs disabled so buffer will never be filled; return immediately - return 0; - } - __WFI(); // enter sleep mode, waiting for interrupt - } - - // There is not enough space in buffer - if (len < hid->last_read_len) { - return 0; - } - - // Copy bytes from device to user buffer - memcpy(buf, hid->buffer[hid->current_read_buffer], hid->last_read_len); - hid->current_read_buffer = !hid->current_read_buffer; - - // Clear NAK to indicate we are ready to read more data - USBD_HID_ClearNAK(hid->usbd); - - // Success, return number of bytes read - return hid->last_read_len; -} diff --git a/ports/stm32/usbd_hid_interface.h b/ports/stm32/usbd_hid_interface.h deleted file mode 100644 index 79040b57e95b1..0000000000000 --- a/ports/stm32/usbd_hid_interface.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ -#ifndef MICROPY_INCLUDED_STMHAL_USBD_HID_INTERFACE_H -#define MICROPY_INCLUDED_STMHAL_USBD_HID_INTERFACE_H - -#include "usbd_cdc_msc_hid.h" - -typedef struct _usbd_hid_itf_t { - usbd_cdc_msc_hid_state_t *usbd; // the parent USB device - - uint8_t buffer[2][HID_DATA_FS_MAX_PACKET_SIZE]; // pair of buffers to read individual packets into - int8_t current_read_buffer; // which buffer to read from - uint32_t last_read_len; // length of last read - int8_t current_write_buffer; // which buffer to write to -} usbd_hid_itf_t; - -int usbd_hid_rx_num(usbd_hid_itf_t *hid); -int usbd_hid_rx(usbd_hid_itf_t *hid, size_t len, uint8_t *buf, uint32_t timeout); - -#endif // MICROPY_INCLUDED_STMHAL_USBD_HID_INTERFACE_H diff --git a/ports/stm32/usbd_msc_storage.c b/ports/stm32/usbd_msc_storage.c deleted file mode 100644 index f825c3d70d6f2..0000000000000 --- a/ports/stm32/usbd_msc_storage.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - */ - -/** - ****************************************************************************** - * @file usbd_storage_msd.c - * @author MCD application Team - * @version V1.1.0 - * @date 19-March-2012 - * @brief This file provides the disk operations functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2012 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Heavily modified by dpgeorge for MicroPython. - * - ****************************************************************************** - */ - -#include - -#include "usbd_cdc_msc_hid.h" -#include "usbd_msc_storage.h" - -#include "py/misc.h" -#include "storage.h" -#include "sdcard.h" - -// These are needed to support removal of the medium, so that the USB drive -// can be unmounted, and won't be remounted automatically. -static uint8_t flash_started = 0; - -#if MICROPY_HW_HAS_SDCARD -static uint8_t sdcard_started = 0; -#endif - -/******************************************************************************/ -// Callback functions for when the internal flash is the mass storage device - -static const int8_t FLASH_STORAGE_Inquirydata[] = { // 36 bytes - // LUN 0 - 0x00, - 0x80, // 0x00 for a fixed drive, 0x80 for a removable drive - 0x02, - 0x02, - (STANDARD_INQUIRY_DATA_LEN - 5), - 0x00, - 0x00, - 0x00, - 'u', 'P', 'y', ' ', ' ', ' ', ' ', ' ', // Manufacturer : 8 bytes - 'm', 'i', 'c', 'r', 'o', 'S', 'D', ' ', // Product : 16 Bytes - 'F', 'l', 'a', 's', 'h', ' ', ' ', ' ', - '1', '.', '0' ,'0', // Version : 4 Bytes -}; - -/** - * @brief Initialize the storage medium - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_Init(uint8_t lun) { - storage_init(); - flash_started = 1; - return 0; -} - -/** - * @brief return medium capacity and block size - * @param lun : logical unit number - * @param block_num : number of physical block - * @param block_size : size of a physical block - * @retval Status - */ -int8_t FLASH_STORAGE_GetCapacity(uint8_t lun, uint32_t *block_num, uint16_t *block_size) { - *block_size = storage_get_block_size(); - *block_num = storage_get_block_count(); - return 0; -} - -/** - * @brief check whether the medium is ready - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_IsReady(uint8_t lun) { - if (flash_started) { - return 0; - } - return -1; -} - -/** - * @brief check whether the medium is write-protected - * @param lun : logical unit number - * @retval Status - */ -int8_t FLASH_STORAGE_IsWriteProtected(uint8_t lun) { - return 0; -} - -// Remove the lun -int8_t FLASH_STORAGE_StartStopUnit(uint8_t lun, uint8_t started) { - flash_started = started; - return 0; -} - -int8_t FLASH_STORAGE_PreventAllowMediumRemoval(uint8_t lun, uint8_t param) { - // sync the flash so that the cache is cleared and the device can be unplugged/turned off - storage_flush(); - return 0; -} - -/** - * @brief Read data from the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to save data - * @param blk_addr : address of 1st block to be read - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t FLASH_STORAGE_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - storage_read_blocks(buf, blk_addr, blk_len); - return 0; -} - -/** - * @brief Write data to the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to write from - * @param blk_addr : address of 1st block to be written - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t FLASH_STORAGE_Write (uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - storage_write_blocks(buf, blk_addr, blk_len); - return 0; -} - -/** - * @brief Return number of supported logical unit - * @param None - * @retval number of logical unit - */ -int8_t FLASH_STORAGE_GetMaxLun(void) { - return 0; -} - -const USBD_StorageTypeDef USBD_FLASH_STORAGE_fops = { - FLASH_STORAGE_Init, - FLASH_STORAGE_GetCapacity, - FLASH_STORAGE_IsReady, - FLASH_STORAGE_IsWriteProtected, - FLASH_STORAGE_StartStopUnit, - FLASH_STORAGE_PreventAllowMediumRemoval, - FLASH_STORAGE_Read, - FLASH_STORAGE_Write, - FLASH_STORAGE_GetMaxLun, - (int8_t *)FLASH_STORAGE_Inquirydata, -}; - -/******************************************************************************/ -// Callback functions for when the SD card is the mass storage device - -#if MICROPY_HW_HAS_SDCARD - -static const int8_t SDCARD_STORAGE_Inquirydata[] = { // 36 bytes - // LUN 0 - 0x00, - 0x80, // 0x00 for a fixed drive, 0x80 for a removable drive - 0x02, - 0x02, - (STANDARD_INQUIRY_DATA_LEN - 5), - 0x00, - 0x00, - 0x00, - 'u', 'P', 'y', ' ', ' ', ' ', ' ', ' ', // Manufacturer : 8 bytes - 'm', 'i', 'c', 'r', 'o', 'S', 'D', ' ', // Product : 16 Bytes - 'S', 'D', ' ', 'c', 'a', 'r', 'd', ' ', - '1', '.', '0' ,'0', // Version : 4 Bytes -}; - -/** - * @brief Initialize the storage medium - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_Init(uint8_t lun) { - if (!sdcard_power_on()) { - return -1; - } - sdcard_started = 1; - return 0; - -} - -/** - * @brief return medium capacity and block size - * @param lun : logical unit number - * @param block_num : number of physical block - * @param block_size : size of a physical block - * @retval Status - */ -int8_t SDCARD_STORAGE_GetCapacity(uint8_t lun, uint32_t *block_num, uint16_t *block_size) { - *block_size = SDCARD_BLOCK_SIZE; - *block_num = sdcard_get_capacity_in_bytes() / SDCARD_BLOCK_SIZE; - return 0; -} - -/** - * @brief check whether the medium is ready - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_IsReady(uint8_t lun) { - if (sdcard_started) { - return 0; - } - return -1; -} - -/** - * @brief check whether the medium is write-protected - * @param lun : logical unit number - * @retval Status - */ -int8_t SDCARD_STORAGE_IsWriteProtected(uint8_t lun) { - return 0; -} - -// Remove the lun -int8_t SDCARD_STORAGE_StartStopUnit(uint8_t lun, uint8_t started) { - sdcard_started = started; - return 0; -} - -int8_t SDCARD_STORAGE_PreventAllowMediumRemoval(uint8_t lun, uint8_t param) { - return 0; -} - -/** - * @brief Read data from the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to save data - * @param blk_addr : address of 1st block to be read - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t SDCARD_STORAGE_Read(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - if (sdcard_read_blocks(buf, blk_addr, blk_len) != 0) { - return -1; - } - return 0; -} - -/** - * @brief Write data to the medium - * @param lun : logical unit number - * @param buf : Pointer to the buffer to write from - * @param blk_addr : address of 1st block to be written - * @param blk_len : nmber of blocks to be read - * @retval Status - */ -int8_t SDCARD_STORAGE_Write(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len) { - if (sdcard_write_blocks(buf, blk_addr, blk_len) != 0) { - return -1; - } - return 0; -} - -/** - * @brief Return number of supported logical unit - * @param None - * @retval number of logical unit - */ -int8_t SDCARD_STORAGE_GetMaxLun(void) { - return 0; -} - -const USBD_StorageTypeDef USBD_SDCARD_STORAGE_fops = { - SDCARD_STORAGE_Init, - SDCARD_STORAGE_GetCapacity, - SDCARD_STORAGE_IsReady, - SDCARD_STORAGE_IsWriteProtected, - SDCARD_STORAGE_StartStopUnit, - SDCARD_STORAGE_PreventAllowMediumRemoval, - SDCARD_STORAGE_Read, - SDCARD_STORAGE_Write, - SDCARD_STORAGE_GetMaxLun, - (int8_t *)SDCARD_STORAGE_Inquirydata, -}; - -#endif // MICROPY_HW_HAS_SDCARD diff --git a/ports/stm32/usbd_msc_storage.h b/ports/stm32/usbd_msc_storage.h deleted file mode 100644 index 6cc40d2d623a0..0000000000000 --- a/ports/stm32/usbd_msc_storage.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_USBD_MSC_STORAGE_H -#define MICROPY_INCLUDED_STMHAL_USBD_MSC_STORAGE_H - -extern const USBD_StorageTypeDef USBD_FLASH_STORAGE_fops; -extern const USBD_StorageTypeDef USBD_SDCARD_STORAGE_fops; - -#endif // MICROPY_INCLUDED_STMHAL_USBD_MSC_STORAGE_H diff --git a/ports/stm32/usbdev/Release_Notes.html b/ports/stm32/usbdev/Release_Notes.html deleted file mode 100644 index 487b455266fef..0000000000000 --- a/ports/stm32/usbdev/Release_Notes.html +++ /dev/null @@ -1,974 +0,0 @@ - - - - - - - - -Release Notes for STM32 USB Device Library - - - - - - - - -
- -

 

- -
- - - - - -
- - - - - - - -
-

Back to Release page

-
-

Release Notes for STM32 USB Device Library

-

Copyright - 2014 STMicroelectronics

-

-
-

 

- - - - -
-

Update History

-

V2.0.0 / 18-February-2014

- - - - - -

Main -Changes

- - - - - - - - - -
    -
  • Major update -based on STM32Cube specification: Library Core, Classes architecture and APIs -modified vs. V1.1.0, and thus the 2 versions are not compatible.
    -
  • This version has to be used only with STM32Cube based development
    • -
- - -

V1.1.0 / 19-March-2012

-

Main -Changes

- -
  • Official support of STM32F4xx devices
  • All source files: license disclaimer text update and add link to the License file on ST Internet.
  • Handle test mode in the set feature request
  • Handle dynamically the USB SELF POWERED feature
  • Handle correctly the USBD_CtlError process to take into account error during Control OUT stage
  • Miscellaneous bug fix

V1.0.0 / 22-July-2011

Main -Changes

-
  • First official version for STM32F105/7xx and STM32F2xx devices

-

License

-

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at:


Unless -required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT -WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See -the License for the specific language governing permissions and -limitations under the License. -
-
-
-

For - complete documentation on STM32 - Microcontrollers visit www.st.com/STM32

-
-

-
- -
- -

 

- -
- - \ No newline at end of file diff --git a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h b/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h deleted file mode 100644 index a26b1df0dc7b2..0000000000000 --- a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid.h +++ /dev/null @@ -1,158 +0,0 @@ -#ifndef _USB_CDC_MSC_CORE_H_ -#define _USB_CDC_MSC_CORE_H_ - -#include "usbd_cdc_msc_hid0.h" -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_ioreq.h" - -// Needed for the CDC+MSC+HID state and should be maximum of all template -// config descriptors defined in usbd_cdc_msc_hid.c -#define MAX_TEMPLATE_CONFIG_DESC_SIZE (107) - -// CDC, MSC and HID packet sizes -#define CDC_DATA_FS_MAX_PACKET_SIZE (64) // endpoint IN & OUT packet size -#define MSC_MEDIA_PACKET (2048) // was 8192; how low can it go whilst still working? -#define HID_DATA_FS_MAX_PACKET_SIZE (64) // endpoint IN & OUT packet size - -// Need to define here for BOT and SCSI layers -#define MSC_IN_EP (0x81) -#define MSC_OUT_EP (0x01) - -// Need to define here for usbd_cdc_interface.c (it needs CDC_IN_EP) -#define CDC_IN_EP (0x83) -#define CDC_OUT_EP (0x03) -#define CDC_CMD_EP (0x82) - -typedef struct { - uint32_t bitrate; - uint8_t format; - uint8_t paritytype; - uint8_t datatype; -} USBD_CDC_LineCodingTypeDef; - -typedef struct { - uint32_t data[CDC_DATA_FS_MAX_PACKET_SIZE/4]; /* Force 32bits alignment */ - uint8_t CmdOpCode; - uint8_t CmdLength; - - __IO uint32_t TxState; - __IO uint32_t RxState; -} USBD_CDC_HandleTypeDef; - -typedef struct _USBD_STORAGE { - int8_t (* Init) (uint8_t lun); - int8_t (* GetCapacity) (uint8_t lun, uint32_t *block_num, uint16_t *block_size); - int8_t (* IsReady) (uint8_t lun); - int8_t (* IsWriteProtected) (uint8_t lun); - int8_t (* StartStopUnit)(uint8_t lun, uint8_t started); - int8_t (* PreventAllowMediumRemoval)(uint8_t lun, uint8_t param0); - int8_t (* Read) (uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); - int8_t (* Write)(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len); - int8_t (* GetMaxLun)(void); - int8_t *pInquiry; -} USBD_StorageTypeDef; - -typedef struct { - uint32_t max_lun; - uint32_t interface; - uint8_t bot_state; - uint8_t bot_status; - uint16_t bot_data_length; - uint8_t bot_data[MSC_MEDIA_PACKET]; - USBD_MSC_BOT_CBWTypeDef cbw; - USBD_MSC_BOT_CSWTypeDef csw; - - USBD_SCSI_SenseTypeDef scsi_sense [SENSE_LIST_DEEPTH]; - uint8_t scsi_sense_head; - uint8_t scsi_sense_tail; - - uint16_t scsi_blk_size; - uint32_t scsi_blk_nbr; - - uint32_t scsi_blk_addr_in_blks; - uint32_t scsi_blk_len; - - // operations of the underlying block device - USBD_StorageTypeDef *bdev_ops; -} USBD_MSC_BOT_HandleTypeDef; - -typedef enum { - HID_IDLE = 0, - HID_BUSY, -} HID_StateTypeDef; - -typedef struct { - uint32_t Protocol; - uint32_t IdleState; - uint32_t AltSetting; - HID_StateTypeDef state; -} USBD_HID_HandleTypeDef; - -typedef struct _usbd_cdc_msc_hid_state_t { - USBD_HandleTypeDef *pdev; - - uint8_t usbd_mode; - uint8_t cdc_iface_num; - uint8_t hid_in_ep; - uint8_t hid_out_ep; - uint8_t hid_iface_num; - uint8_t usbd_config_desc_size; - uint8_t *hid_desc; - const uint8_t *hid_report_desc; - - USBD_CDC_HandleTypeDef CDC_ClassData; - USBD_MSC_BOT_HandleTypeDef MSC_BOT_ClassData; - USBD_HID_HandleTypeDef HID_ClassData; - - // RAM to hold the current descriptors, which we configure on the fly - __ALIGN_BEGIN uint8_t usbd_device_desc[USB_LEN_DEV_DESC] __ALIGN_END; - __ALIGN_BEGIN uint8_t usbd_str_desc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; - __ALIGN_BEGIN uint8_t usbd_config_desc[MAX_TEMPLATE_CONFIG_DESC_SIZE] __ALIGN_END; - - void *cdc; - void *hid; -} usbd_cdc_msc_hid_state_t; - -#define USBD_HID_MOUSE_MAX_PACKET (4) -#define USBD_HID_MOUSE_REPORT_DESC_SIZE (74) - -extern const uint8_t USBD_HID_MOUSE_ReportDesc[USBD_HID_MOUSE_REPORT_DESC_SIZE]; - -#define USBD_HID_KEYBOARD_MAX_PACKET (8) -#define USBD_HID_KEYBOARD_REPORT_DESC_SIZE (63) - -extern const uint8_t USBD_HID_KEYBOARD_ReportDesc[USBD_HID_KEYBOARD_REPORT_DESC_SIZE]; - -extern const USBD_ClassTypeDef USBD_CDC_MSC_HID; - -// returns 0 on success, -1 on failure -int USBD_SelectMode(usbd_cdc_msc_hid_state_t *usbd, uint32_t mode, USBD_HID_ModeInfoTypeDef *hid_info); -// returns the current usb mode -uint8_t USBD_GetMode(usbd_cdc_msc_hid_state_t *usbd); - -uint8_t USBD_CDC_ReceivePacket(usbd_cdc_msc_hid_state_t *usbd, uint8_t *buf); -uint8_t USBD_CDC_TransmitPacket(usbd_cdc_msc_hid_state_t *usbd, size_t len, const uint8_t *buf); - -static inline void USBD_MSC_RegisterStorage(usbd_cdc_msc_hid_state_t *usbd, USBD_StorageTypeDef *fops) { - usbd->MSC_BOT_ClassData.bdev_ops = fops; -} - -uint8_t USBD_HID_ReceivePacket(usbd_cdc_msc_hid_state_t *usbd, uint8_t *buf); -int USBD_HID_CanSendReport(usbd_cdc_msc_hid_state_t *usbd); -uint8_t USBD_HID_SendReport(usbd_cdc_msc_hid_state_t *usbd, uint8_t *report, uint16_t len); -uint8_t USBD_HID_SetNAK(usbd_cdc_msc_hid_state_t *usbd); -uint8_t USBD_HID_ClearNAK(usbd_cdc_msc_hid_state_t *usbd); - -// These are provided externally to implement the CDC interface -struct _usbd_cdc_itf_t; -uint8_t *usbd_cdc_init(struct _usbd_cdc_itf_t *cdc, usbd_cdc_msc_hid_state_t *usbd); -int8_t usbd_cdc_control(struct _usbd_cdc_itf_t *cdc, uint8_t cmd, uint8_t* pbuf, uint16_t length); -int8_t usbd_cdc_receive(struct _usbd_cdc_itf_t *cdc, size_t len); - -// These are provided externally to implement the HID interface -struct _usbd_hid_itf_t; -uint8_t *usbd_hid_init(struct _usbd_hid_itf_t *hid, usbd_cdc_msc_hid_state_t *usbd); -int8_t usbd_hid_receive(struct _usbd_hid_itf_t *hid, size_t len); - -#endif // _USB_CDC_MSC_CORE_H_ diff --git a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h b/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h deleted file mode 100644 index 08882bb1aec1d..0000000000000 --- a/ports/stm32/usbdev/class/inc/usbd_cdc_msc_hid0.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H -#define MICROPY_INCLUDED_STMHAL_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H - -// these are exports for the CDC/MSC/HID interface that are independent -// from any other definitions/declarations - -// only CDC_MSC and CDC_HID are available -typedef enum { - USBD_MODE_CDC = 0x01, - USBD_MODE_MSC = 0x02, - USBD_MODE_HID = 0x04, - USBD_MODE_CDC_MSC = 0x03, - USBD_MODE_CDC_HID = 0x05, - USBD_MODE_MSC_HID = 0x06, -} usb_device_mode_t; - -typedef struct _USBD_HID_ModeInfoTypeDef { - uint8_t subclass; // 0=no sub class, 1=boot - uint8_t protocol; // 0=none, 1=keyboard, 2=mouse - uint8_t max_packet_len; // only support up to 255 - uint8_t polling_interval; // in units of 1ms - uint8_t report_desc_len; - const uint8_t *report_desc; -} USBD_HID_ModeInfoTypeDef; - -#endif // MICROPY_INCLUDED_STMHAL_USBDEV_CLASS_INC_USBD_CDC_MSC_HID0_H diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_bot.h b/ports/stm32/usbdev/class/inc/usbd_msc_bot.h deleted file mode 100644 index 41f8ab5a53582..0000000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_bot.h +++ /dev/null @@ -1,151 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_bot.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_bot.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#include "usbd_core.h" - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_MSC_BOT_H -#define __USBD_MSC_BOT_H - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup MSC_BOT - * @brief This file is the Header file for usbd_bot.c - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ -#define USBD_BOT_IDLE 0 /* Idle state */ -#define USBD_BOT_DATA_OUT 1 /* Data Out state */ -#define USBD_BOT_DATA_IN 2 /* Data In state */ -#define USBD_BOT_LAST_DATA_IN 3 /* Last Data In Last */ -#define USBD_BOT_SEND_DATA 4 /* Send Immediate data */ -#define USBD_BOT_NO_DATA 5 /* No data Stage */ - -#define USBD_BOT_CBW_SIGNATURE 0x43425355 -#define USBD_BOT_CSW_SIGNATURE 0x53425355 -#define USBD_BOT_CBW_LENGTH 31 -#define USBD_BOT_CSW_LENGTH 13 -#define USBD_BOT_MAX_DATA 256 - -/* CSW Status Definitions */ -#define USBD_CSW_CMD_PASSED 0x00 -#define USBD_CSW_CMD_FAILED 0x01 -#define USBD_CSW_PHASE_ERROR 0x02 - -/* BOT Status */ -#define USBD_BOT_STATUS_NORMAL 0 -#define USBD_BOT_STATUS_RECOVERY 1 -#define USBD_BOT_STATUS_ERROR 2 - - -#define USBD_DIR_IN 0 -#define USBD_DIR_OUT 1 -#define USBD_BOTH_DIR 2 - -/** - * @} - */ - -/** @defgroup MSC_CORE_Private_TypesDefinitions - * @{ - */ - -typedef struct -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataLength; - uint8_t bmFlags; - uint8_t bLUN; - uint8_t bCBLength; - uint8_t CB[16]; - uint8_t ReservedForAlign; -} -USBD_MSC_BOT_CBWTypeDef; - - -typedef struct -{ - uint32_t dSignature; - uint32_t dTag; - uint32_t dDataResidue; - uint8_t bStatus; - uint8_t ReservedForAlign[3]; -} -USBD_MSC_BOT_CSWTypeDef; - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_Types - * @{ - */ - -/** - * @} - */ -/** @defgroup USBD_CORE_Exported_FunctionsPrototypes - * @{ - */ -void MSC_BOT_Init (USBD_HandleTypeDef *pdev); -void MSC_BOT_Reset (USBD_HandleTypeDef *pdev); -void MSC_BOT_DeInit (USBD_HandleTypeDef *pdev); -void MSC_BOT_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -void MSC_BOT_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -void MSC_BOT_SendCSW (USBD_HandleTypeDef *pdev, - uint8_t CSW_Status); - -void MSC_BOT_CplClrFeature (USBD_HandleTypeDef *pdev, - uint8_t epnum); -/** - * @} - */ - -#endif /* __USBD_MSC_BOT_H */ -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_data.h b/ports/stm32/usbdev/class/inc/usbd_msc_data.h deleted file mode 100644 index f468267f43dc6..0000000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_data.h +++ /dev/null @@ -1,104 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_data.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_data.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef _USBD_MSC_DATA_H_ -#define _USBD_MSC_DATA_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_INFO - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_INFO_Exported_Defines - * @{ - */ -#define MODE_SENSE6_LEN 8 -#define MODE_SENSE10_LEN 8 -#define LENGTH_INQUIRY_PAGE00 7 -#define LENGTH_FORMAT_CAPACITIES 20 - -/** - * @} - */ - - -/** @defgroup USBD_INFO_Exported_TypesDefinitions - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_INFO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_INFO_Exported_Variables - * @{ - */ -extern const uint8_t MSC_Page00_Inquiry_Data[]; -extern const uint8_t MSC_Mode_Sense6_data[]; -extern const uint8_t MSC_Mode_Sense10_data[] ; - -/** - * @} - */ - -/** @defgroup USBD_INFO_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#endif /* _USBD_MSC_DATA_H_ */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h b/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h deleted file mode 100644 index 34f059ee5d8ee..0000000000000 --- a/ports/stm32/usbdev/class/inc/usbd_msc_scsi.h +++ /dev/null @@ -1,195 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_scsi.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header for the usbd_msc_scsi.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_MSC_SCSI_H -#define __USBD_MSC_SCSI_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_SCSI - * @brief header file for the storage disk file - * @{ - */ - -/** @defgroup USBD_SCSI_Exported_Defines - * @{ - */ - -#define SENSE_LIST_DEEPTH 4 - -/* SCSI Commands */ -#define SCSI_FORMAT_UNIT 0x04 -#define SCSI_INQUIRY 0x12 -#define SCSI_MODE_SELECT6 0x15 -#define SCSI_MODE_SELECT10 0x55 -#define SCSI_MODE_SENSE6 0x1A -#define SCSI_MODE_SENSE10 0x5A -#define SCSI_ALLOW_MEDIUM_REMOVAL 0x1E -#define SCSI_SYNCHRONIZE_CACHE10 0x35 -#define SCSI_SYNCHRONIZE_CACHE16 0x91 -#define SCSI_READ6 0x08 -#define SCSI_READ10 0x28 -#define SCSI_READ12 0xA8 -#define SCSI_READ16 0x88 - -#define SCSI_READ_CAPACITY10 0x25 -#define SCSI_READ_CAPACITY16 0x9E - -#define SCSI_REQUEST_SENSE 0x03 -#define SCSI_START_STOP_UNIT 0x1B -#define SCSI_TEST_UNIT_READY 0x00 -#define SCSI_WRITE6 0x0A -#define SCSI_WRITE10 0x2A -#define SCSI_WRITE12 0xAA -#define SCSI_WRITE16 0x8A - -#define SCSI_VERIFY10 0x2F -#define SCSI_VERIFY12 0xAF -#define SCSI_VERIFY16 0x8F - -#define SCSI_SEND_DIAGNOSTIC 0x1D -#define SCSI_READ_FORMAT_CAPACITIES 0x23 - -#define NO_SENSE 0 -#define RECOVERED_ERROR 1 -#define NOT_READY 2 -#define MEDIUM_ERROR 3 -#define HARDWARE_ERROR 4 -#define ILLEGAL_REQUEST 5 -#define UNIT_ATTENTION 6 -#define DATA_PROTECT 7 -#define BLANK_CHECK 8 -#define VENDOR_SPECIFIC 9 -#define COPY_ABORTED 10 -#define ABORTED_COMMAND 11 -#define VOLUME_OVERFLOW 13 -#define MISCOMPARE 14 - - -#define INVALID_CDB 0x20 -#define INVALID_FIELED_IN_COMMAND 0x24 -#define PARAMETER_LIST_LENGTH_ERROR 0x1A -#define INVALID_FIELD_IN_PARAMETER_LIST 0x26 -#define ADDRESS_OUT_OF_RANGE 0x21 -#define MEDIUM_NOT_PRESENT 0x3A -#define MEDIUM_HAVE_CHANGED 0x28 -#define WRITE_PROTECTED 0x27 -#define UNRECOVERED_READ_ERROR 0x11 -#define WRITE_FAULT 0x03 - -#define READ_FORMAT_CAPACITY_DATA_LEN 0x0C -#define READ_CAPACITY10_DATA_LEN 0x08 -#define MODE_SENSE10_DATA_LEN 0x08 -#define MODE_SENSE6_DATA_LEN 0x04 -#define REQUEST_SENSE_DATA_LEN 0x12 -#define STANDARD_INQUIRY_DATA_LEN 0x24 -#define BLKVFY 0x04 - -extern uint8_t Page00_Inquiry_Data[]; -extern uint8_t Standard_Inquiry_Data[]; -extern uint8_t Standard_Inquiry_Data2[]; -extern uint8_t Mode_Sense6_data[]; -extern uint8_t Mode_Sense10_data[]; -extern uint8_t Scsi_Sense_Data[]; -extern uint8_t ReadCapacity10_Data[]; -extern uint8_t ReadFormatCapacity_Data []; -/** - * @} - */ - - -/** @defgroup USBD_SCSI_Exported_TypesDefinitions - * @{ - */ - -typedef struct _SENSE_ITEM { - char Skey; - union { - struct _ASCs { - char ASC; - char ASCQ; - }b; - unsigned int ASC; - char *pData; - } w; -} USBD_SCSI_SenseTypeDef; -/** - * @} - */ - -/** @defgroup USBD_SCSI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_SCSI_Exported_Variables - * @{ - */ - -/** - * @} - */ -/** @defgroup USBD_SCSI_Exported_FunctionsPrototype - * @{ - */ -int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t *cmd); - -void SCSI_SenseCode(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t sKey, - uint8_t ASC); - -/** - * @} - */ - -#endif /* __USBD_MSC_SCSI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c b/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c deleted file mode 100644 index 379a8f32ce123..0000000000000 --- a/ports/stm32/usbdev/class/src/usbd_cdc_msc_hid.c +++ /dev/null @@ -1,1053 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "usbd_ioreq.h" -#include "usbd_cdc_msc_hid.h" - -#define CDC_TEMPLATE_CONFIG_DESC_SIZE (67) -#define CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE (98) -#define CDC_HID_TEMPLATE_CONFIG_DESC_SIZE (107) -#define CDC_HID_TEMPLATE_HID_DESC_OFFSET (9) -#define HID_DESC_OFFSET_SUBCLASS (6) -#define HID_DESC_OFFSET_PROTOCOL (7) -#define HID_DESC_OFFSET_SUBDESC (9) -#define HID_DESC_OFFSET_REPORT_DESC_LEN (16) -#define HID_DESC_OFFSET_MAX_PACKET_LO (22) -#define HID_DESC_OFFSET_MAX_PACKET_HI (23) -#define HID_DESC_OFFSET_POLLING_INTERVAL (24) -#define HID_DESC_OFFSET_MAX_PACKET_OUT_LO (29) -#define HID_DESC_OFFSET_MAX_PACKET_OUT_HI (30) -#define HID_DESC_OFFSET_POLLING_INTERVAL_OUT (31) -#define HID_SUBDESC_LEN (9) - -#define CDC_IFACE_NUM_ALONE (0) -#define CDC_IFACE_NUM_WITH_MSC (1) -#define CDC_IFACE_NUM_WITH_HID (1) -#define MSC_IFACE_NUM_WITH_CDC (0) -#define HID_IFACE_NUM_WITH_CDC (0) -#define HID_IFACE_NUM_WITH_MSC (1) -#define HID_IN_EP_WITH_CDC (0x81) -#define HID_OUT_EP_WITH_CDC (0x01) -#define HID_IN_EP_WITH_MSC (0x83) -#define HID_OUT_EP_WITH_MSC (0x03) - -#define USB_DESC_TYPE_ASSOCIATION (0x0b) - -#define CDC_CMD_PACKET_SIZE (8) // Control Endpoint Packet size -#define CDC_DATA_IN_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE -#define CDC_DATA_OUT_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE - -#define MSC_MAX_PACKET (0x40) -#define BOT_GET_MAX_LUN (0xfe) -#define BOT_RESET (0xff) - -#define HID_DESCRIPTOR_TYPE (0x21) -#define HID_REPORT_DESC (0x22) -#define HID_REQ_SET_PROTOCOL (0x0b) -#define HID_REQ_GET_PROTOCOL (0x03) -#define HID_REQ_SET_IDLE (0x0a) -#define HID_REQ_GET_IDLE (0x02) - -/* -// this is used only in high-speed mode, which we don't support -// USB Standard Device Descriptor -__ALIGN_BEGIN static uint8_t USBD_CDC_MSC_HID_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END = { - USB_LEN_DEV_QUALIFIER_DESC, - USB_DESC_TYPE_DEVICE_QUALIFIER, - 0x00, - 0x02, - 0x00, - 0x00, - 0x00, - 0x40, // same for CDC and MSC (latter being MSC_MAX_PACKET), HID is 0x04 - 0x01, - 0x00, -}; -*/ - -// USB CDC MSC device Configuration Descriptor -static const uint8_t cdc_msc_template_config_desc[CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength: no of returned bytes - HIBYTE(CDC_MSC_TEMPLATE_CONFIG_DESC_SIZE), - 0x03, // bNumInterfaces: 3 interfaces - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //========================================================================== - // MSC only has 1 interface so doesn't need an IAD - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface descriptor - MSC_IFACE_NUM_WITH_CDC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints - 0x08, // bInterfaceClass: MSC Class - 0x06, // bInterfaceSubClass : SCSI transparent - 0x50, // nInterfaceProtocol - 0x00, // iInterface: - - // Endpoint IN descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_IN_EP, // bEndpointAddress: IN, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint OUT descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - MSC_OUT_EP, // bEndpointAddress: OUT, address 3 - 0x02, // bmAttributes: Bulk endpoint type - LOBYTE(MSC_MAX_PACKET), // wMaxPacketSize - HIBYTE(MSC_MAX_PACKET), - 0x00, // bInterval: ignore for Bulk transfer - - //========================================================================== - // Interface Association for CDC VCP - 0x08, // bLength: 8 bytes - USB_DESC_TYPE_ASSOCIATION, // bDescriptorType: IAD - CDC_IFACE_NUM_WITH_MSC, // bFirstInterface: first interface for this association - 0x02, // bInterfaceCount: nummber of interfaces for this association - 0x02, // bFunctionClass: Communication Interface Class - 0x02, // bFunctionSubClass: Abstract Control Model - 0x01, // bFunctionProtocol: Common AT commands - 0x00, // iFunction: index of string for this function - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_WITH_MSC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_WITH_MSC + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_WITH_MSC + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_WITH_MSC + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface - CDC_IFACE_NUM_WITH_MSC + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0A, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer -}; - -// USB CDC HID device Configuration Descriptor -static const uint8_t cdc_hid_template_config_desc[CDC_HID_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_HID_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength: no of returned bytes - HIBYTE(CDC_HID_TEMPLATE_CONFIG_DESC_SIZE), - 0x03, // bNumInterfaces: 3 interfaces - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //========================================================================== - // HID only has 1 interface so doesn't need an IAD - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface descriptor - HID_IFACE_NUM_WITH_CDC, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints - 0x03, // bInterfaceClass: HID Class - 0x01, // bInterfaceSubClass: 0=no sub class, 1=boot - 0x02, // nInterfaceProtocol: 0=none, 1=keyboard, 2=mouse - 0x00, // iInterface: - - // HID descriptor - 0x09, // bLength: HID Descriptor size - HID_DESCRIPTOR_TYPE, // bDescriptorType: HID - 0x11, // bcdHID: HID Class Spec release number - 0x01, - 0x00, // bCountryCode: Hardware target country - 0x01, // bNumDescriptors: Number of HID class descriptors to follow - 0x22, // bDescriptorType - USBD_HID_MOUSE_REPORT_DESC_SIZE, // wItemLength: Total length of Report descriptor - 0x00, - - // Endpoint IN descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - HID_IN_EP_WITH_CDC, // bEndpointAddress: IN - 0x03, // bmAttributes: Interrupt endpoint type - LOBYTE(USBD_HID_MOUSE_MAX_PACKET), // wMaxPacketSize - HIBYTE(USBD_HID_MOUSE_MAX_PACKET), - 0x08, // bInterval: Polling interval - - // Endpoint OUT descriptor - 0x07, // bLength: Endpoint descriptor length - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint descriptor type - HID_OUT_EP_WITH_CDC, // bEndpointAddress: OUT - 0x03, // bmAttributes: Interrupt endpoint type - LOBYTE(USBD_HID_MOUSE_MAX_PACKET), // wMaxPacketSize - HIBYTE(USBD_HID_MOUSE_MAX_PACKET), - 0x08, // bInterval: Polling interval - - //========================================================================== - // Interface Association for CDC VCP - 0x08, // bLength: 8 bytes - USB_DESC_TYPE_ASSOCIATION, // bDescriptorType: IAD - CDC_IFACE_NUM_WITH_HID, // bFirstInterface: first interface for this association - 0x02, // bInterfaceCount: nummber of interfaces for this association - 0x02, // bFunctionClass: Communication Interface Class - 0x02, // bFunctionSubClass: Abstract Control Model - 0x01, // bFunctionProtocol: Common AT commands - 0x00, // iFunction: index of string for this function - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_WITH_HID, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_WITH_HID + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_WITH_HID + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_WITH_HID + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: interface - CDC_IFACE_NUM_WITH_HID + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0A, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer -}; - -static const uint8_t cdc_template_config_desc[CDC_TEMPLATE_CONFIG_DESC_SIZE] = { - //-------------------------------------------------------------------------- - // Configuration Descriptor - 0x09, // bLength: Configuration Descriptor size - USB_DESC_TYPE_CONFIGURATION, // bDescriptorType: Configuration - LOBYTE(CDC_TEMPLATE_CONFIG_DESC_SIZE), // wTotalLength:no of returned bytes - HIBYTE(CDC_TEMPLATE_CONFIG_DESC_SIZE), - 0x02, // bNumInterfaces: 2 interface - 0x01, // bConfigurationValue: Configuration value - 0x00, // iConfiguration: Index of string descriptor describing the configuration - 0x80, // bmAttributes: bus powered; 0xc0 for self powered - 0xfa, // bMaxPower: in units of 2mA - - //-------------------------------------------------------------------------- - // Interface Descriptor - 0x09, // bLength: Interface Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: Interface - CDC_IFACE_NUM_ALONE, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x01, // bNumEndpoints: One endpoints used - 0x02, // bInterfaceClass: Communication Interface Class - 0x02, // bInterfaceSubClass: Abstract Control Model - 0x01, // bInterfaceProtocol: Common AT commands - 0x00, // iInterface: - - // Header Functional Descriptor - 0x05, // bLength: Endpoint Descriptor size - 0x24, // bDescriptorType: CS_INTERFACE - 0x00, // bDescriptorSubtype: Header Func Desc - 0x10, // bcdCDC: spec release number - 0x01, // ? - - // Call Management Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x01, // bDescriptorSubtype: Call Management Func Desc - 0x00, // bmCapabilities: D0+D1 - CDC_IFACE_NUM_ALONE + 1, // bDataInterface: 1 - - // ACM Functional Descriptor - 0x04, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x02, // bDescriptorSubtype: Abstract Control Management desc - 0x02, // bmCapabilities - - // Union Functional Descriptor - 0x05, // bFunctionLength - 0x24, // bDescriptorType: CS_INTERFACE - 0x06, // bDescriptorSubtype: Union func desc - CDC_IFACE_NUM_ALONE + 0, // bMasterInterface: Communication class interface - CDC_IFACE_NUM_ALONE + 1, // bSlaveInterface0: Data Class Interface - - // Endpoint 2 Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_CMD_EP, // bEndpointAddress - 0x03, // bmAttributes: Interrupt - LOBYTE(CDC_CMD_PACKET_SIZE), // wMaxPacketSize: - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x20, // bInterval: polling interval in frames of 1ms - - //-------------------------------------------------------------------------- - // Data class interface descriptor - 0x09, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_INTERFACE, // bDescriptorType: - CDC_IFACE_NUM_ALONE + 1, // bInterfaceNumber: Number of Interface - 0x00, // bAlternateSetting: Alternate setting - 0x02, // bNumEndpoints: Two endpoints used - 0x0a, // bInterfaceClass: CDC - 0x00, // bInterfaceSubClass: ? - 0x00, // bInterfaceProtocol: ? - 0x00, // iInterface: - - // Endpoint OUT Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_OUT_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, // bInterval: ignore for Bulk transfer - - // Endpoint IN Descriptor - 0x07, // bLength: Endpoint Descriptor size - USB_DESC_TYPE_ENDPOINT, // bDescriptorType: Endpoint - CDC_IN_EP, // bEndpointAddress - 0x02, // bmAttributes: Bulk - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE),// wMaxPacketSize: - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00 // bInterval: ignore for Bulk transfer -}; - -__ALIGN_BEGIN const uint8_t USBD_HID_MOUSE_ReportDesc[USBD_HID_MOUSE_REPORT_DESC_SIZE] __ALIGN_END = { - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x02, // Usage (Mouse), - 0xA1, 0x01, // Collection (Application), - 0x09, 0x01, // Usage (Pointer), - 0xA1, 0x00, // Collection (Physical), - 0x05, 0x09, // Usage Page (Buttons), - 0x19, 0x01, // Usage Minimum (01), - 0x29, 0x03, // Usage Maximum (03), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x95, 0x03, // Report Count (3), - 0x75, 0x01, // Report Size (1), - 0x81, 0x02, // Input(Data, Variable, Absolute), -- 3 button bits - 0x95, 0x01, // Report Count(1), - 0x75, 0x05, // Report Size(5), - 0x81, 0x01, // Input(Constant), -- 5 bit padding - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x30, // Usage (X), - 0x09, 0x31, // Usage (Y), - 0x09, 0x38, // Usage (Wheel), - 0x15, 0x81, // Logical Minimum (-127), - 0x25, 0x7F, // Logical Maximum (127), - 0x75, 0x08, // Report Size (8), - 0x95, 0x03, // Report Count (3), - 0x81, 0x06, // Input(Data, Variable, Relative), -- 3 position bytes (X,Y,Wheel) - 0xC0, // End Collection, - 0x09, 0x3c, // Usage (Motion Wakeup), - 0x05, 0xff, // Usage Page (?), - 0x09, 0x01, // Usage (?), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x75, 0x01, // Report Size(1), - 0x95, 0x02, // Report Count(2), - 0xb1, 0x22, // ? - 0x75, 0x06, // Report Size(6), - 0x95, 0x01, // Report Count(1), - 0xb1, 0x01, // ? - 0xc0 // End Collection -}; - -__ALIGN_BEGIN const uint8_t USBD_HID_KEYBOARD_ReportDesc[USBD_HID_KEYBOARD_REPORT_DESC_SIZE] __ALIGN_END = { - // From p69 of http://www.usb.org/developers/devclass_docs/HID1_11.pdf - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x06, // Usage (Keyboard), - 0xA1, 0x01, // Collection (Application), - 0x05, 0x07, // Usage Page (Key Codes); - 0x19, 0xE0, // Usage Minimum (224), - 0x29, 0xE7, // Usage Maximum (231), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x75, 0x01, // Report Size (1), - 0x95, 0x08, // Report Count (8), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Modifier byte - 0x95, 0x01, // Report Count (1), - 0x75, 0x08, // Report Size (8), - 0x81, 0x01, // Input (Constant), ;Reserved byte - 0x95, 0x05, // Report Count (5), - 0x75, 0x01, // Report Size (1), - 0x05, 0x08, // Usage Page (Page# for LEDs), - 0x19, 0x01, // Usage Minimum (1), - 0x29, 0x05, // Usage Maximum (5), - 0x91, 0x02, // Output (Data, Variable, Absolute), ;LED report - 0x95, 0x01, // Report Count (1), - 0x75, 0x03, // Report Size (3), - 0x91, 0x01, // Output (Constant), ;LED report padding - 0x95, 0x06, // Report Count (6), - 0x75, 0x08, // Report Size (8), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x65, // Logical Maximum(101), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0x00, // Usage Minimum (0), - 0x29, 0x65, // Usage Maximum (101), - 0x81, 0x00, // Input (Data, Array), ;Key arrays (6 bytes) - 0xC0 // End Collection -}; - -// return the saved usb mode -uint8_t USBD_GetMode(usbd_cdc_msc_hid_state_t *usbd) { - return usbd->usbd_mode; -} - -int USBD_SelectMode(usbd_cdc_msc_hid_state_t *usbd, uint32_t mode, USBD_HID_ModeInfoTypeDef *hid_info) { - // save mode - usbd->usbd_mode = mode; - - // construct config desc - switch (usbd->usbd_mode) { - case USBD_MODE_CDC_MSC: - usbd->usbd_config_desc_size = sizeof(cdc_msc_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_msc_template_config_desc, sizeof(cdc_msc_template_config_desc)); - usbd->cdc_iface_num = CDC_IFACE_NUM_WITH_MSC; - break; - - case USBD_MODE_CDC_HID: - usbd->usbd_config_desc_size = sizeof(cdc_hid_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_hid_template_config_desc, sizeof(cdc_hid_template_config_desc)); - usbd->cdc_iface_num = CDC_IFACE_NUM_WITH_HID; - usbd->hid_in_ep = HID_IN_EP_WITH_CDC; - usbd->hid_out_ep = HID_OUT_EP_WITH_CDC; - usbd->hid_iface_num = HID_IFACE_NUM_WITH_CDC; - usbd->hid_desc = usbd->usbd_config_desc + CDC_HID_TEMPLATE_HID_DESC_OFFSET; - break; - - case USBD_MODE_CDC: - usbd->usbd_config_desc_size = sizeof(cdc_template_config_desc); - memcpy(usbd->usbd_config_desc, cdc_template_config_desc, sizeof(cdc_template_config_desc)); - usbd->cdc_iface_num = CDC_IFACE_NUM_ALONE; - break; - - /* - // not implemented - case USBD_MODE_MSC_HID: - hid_in_ep = HID_IN_EP_WITH_MSC; - hid_out_ep = HID_OUT_EP_WITH_MSC; - hid_iface_num = HID_IFACE_NUM_WITH_MSC; - break; - */ - - default: - // mode not supported - return -1; - } - - // configure the HID descriptor, if needed - if (usbd->usbd_mode & USBD_MODE_HID) { - uint8_t *hid_desc = usbd->hid_desc; - hid_desc[HID_DESC_OFFSET_SUBCLASS] = hid_info->subclass; - hid_desc[HID_DESC_OFFSET_PROTOCOL] = hid_info->protocol; - hid_desc[HID_DESC_OFFSET_REPORT_DESC_LEN] = hid_info->report_desc_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_LO] = hid_info->max_packet_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_HI] = 0; - hid_desc[HID_DESC_OFFSET_POLLING_INTERVAL] = hid_info->polling_interval; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] = hid_info->max_packet_len; - hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] = 0; - hid_desc[HID_DESC_OFFSET_POLLING_INTERVAL_OUT] = hid_info->polling_interval; - usbd->hid_report_desc = hid_info->report_desc; - } - - return 0; -} - -static uint8_t USBD_CDC_MSC_HID_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - if (pdev->dev_speed == USBD_SPEED_HIGH) { - // can't handle high speed - return 1; - } - - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - if (usbd->usbd_mode & USBD_MODE_CDC) { - // CDC VCP component - - // Open EP IN - USBD_LL_OpenEP(pdev, - CDC_IN_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_IN_PACKET_SIZE); - - // Open EP OUT - USBD_LL_OpenEP(pdev, - CDC_OUT_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_OUT_PACKET_SIZE); - - // Open Command IN EP - USBD_LL_OpenEP(pdev, - CDC_CMD_EP, - USBD_EP_TYPE_INTR, - CDC_CMD_PACKET_SIZE); - - // Init physical Interface components - uint8_t *buf = usbd_cdc_init(usbd->cdc, usbd); - - // Init Xfer states - usbd->CDC_ClassData.TxState = 0; - usbd->CDC_ClassData.RxState = 0; - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, buf, CDC_DATA_OUT_PACKET_SIZE); - } - - if (usbd->usbd_mode & USBD_MODE_MSC) { - // MSC component - - // Open EP OUT - USBD_LL_OpenEP(pdev, - MSC_OUT_EP, - USBD_EP_TYPE_BULK, - MSC_MAX_PACKET); - - // Open EP IN - USBD_LL_OpenEP(pdev, - MSC_IN_EP, - USBD_EP_TYPE_BULK, - MSC_MAX_PACKET); - - // Init the BOT layer - MSC_BOT_Init(pdev); - } - - if (usbd->usbd_mode & USBD_MODE_HID) { - // HID component - - // get max packet lengths from descriptor - uint16_t mps_in = - usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_LO] - | (usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_HI] << 8); - uint16_t mps_out = - usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] - | (usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] << 8); - - // Open EP IN - USBD_LL_OpenEP(pdev, - usbd->hid_in_ep, - USBD_EP_TYPE_INTR, - mps_in); - - // Open EP OUT - USBD_LL_OpenEP(pdev, - usbd->hid_out_ep, - USBD_EP_TYPE_INTR, - mps_out); - - uint8_t *buf = usbd_hid_init(usbd->hid, usbd); - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(pdev, usbd->hid_out_ep, buf, mps_out); - - usbd->HID_ClassData.state = HID_IDLE; - } - - return 0; -} - -static uint8_t USBD_CDC_MSC_HID_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - if ((usbd->usbd_mode & USBD_MODE_CDC) && usbd->cdc) { - // CDC VCP component - - // close endpoints - USBD_LL_CloseEP(pdev, CDC_IN_EP); - USBD_LL_CloseEP(pdev, CDC_OUT_EP); - USBD_LL_CloseEP(pdev, CDC_CMD_EP); - } - - if (usbd->usbd_mode & USBD_MODE_MSC) { - // MSC component - - // close endpoints - USBD_LL_CloseEP(pdev, MSC_OUT_EP); - USBD_LL_CloseEP(pdev, MSC_IN_EP); - - // DeInit the BOT layer - MSC_BOT_DeInit(pdev); - } - - if (usbd->usbd_mode & USBD_MODE_HID) { - // HID component - - // close endpoints - USBD_LL_CloseEP(pdev, usbd->hid_in_ep); - USBD_LL_CloseEP(pdev, usbd->hid_out_ep); - } - - return 0; -} - -static uint8_t USBD_CDC_MSC_HID_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { - - /* - printf("SU: %x %x %x %x\n", req->bmRequest, req->bRequest, req->wValue, req->wIndex); - - This is what we get when MSC is IFACE=0 and CDC is IFACE=1,2: - SU: 21 22 0 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_CONTROL_LINE_STATE - SU: 21 20 0 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_LINE_CODING - SU: a1 fe 0 0 -- 0x80 | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; BOT_GET_MAX_LUN; 0; 0 - SU: 21 22 3 1 -- USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; CDC_SET_CONTROL_LINE_STATE - - On a Mac OS X, with MSC then CDC: - SU: a1 fe 0 0 - SU: 21 22 2 1 - SU: 21 22 3 1 - SU: 21 20 0 1 - */ - - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - - switch (req->bmRequest & USB_REQ_TYPE_MASK) { - - // Class request - case USB_REQ_TYPE_CLASS: - // req->wIndex is the recipient interface number - if ((usbd->usbd_mode & USBD_MODE_CDC) && req->wIndex == usbd->cdc_iface_num) { - // CDC component - if (req->wLength) { - if (req->bmRequest & 0x80) { - // device-to-host request - usbd_cdc_control(usbd->cdc, req->bRequest, (uint8_t*)usbd->CDC_ClassData.data, req->wLength); - USBD_CtlSendData(pdev, (uint8_t*)usbd->CDC_ClassData.data, req->wLength); - } else { - // host-to-device request - usbd->CDC_ClassData.CmdOpCode = req->bRequest; - usbd->CDC_ClassData.CmdLength = req->wLength; - USBD_CtlPrepareRx(pdev, (uint8_t*)usbd->CDC_ClassData.data, req->wLength); - } - } else { - // Not a Data request - // Transfer the command to the interface layer - return usbd_cdc_control(usbd->cdc, req->bRequest, NULL, req->wValue); - } - } else if ((usbd->usbd_mode & USBD_MODE_MSC) && req->wIndex == MSC_IFACE_NUM_WITH_CDC) { - // MSC component - switch (req->bRequest) { - case BOT_GET_MAX_LUN: - if ((req->wValue == 0) && (req->wLength == 1) && ((req->bmRequest & 0x80) == 0x80)) { - usbd->MSC_BOT_ClassData.max_lun = usbd->MSC_BOT_ClassData.bdev_ops->GetMaxLun(); - USBD_CtlSendData(pdev, (uint8_t *)&usbd->MSC_BOT_ClassData.max_lun, 1); - } else { - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - break; - - case BOT_RESET: - if ((req->wValue == 0) && (req->wLength == 0) && ((req->bmRequest & 0x80) != 0x80)) { - MSC_BOT_Reset(pdev); - } else { - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - break; - - default: - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - } else if ((usbd->usbd_mode & USBD_MODE_HID) && req->wIndex == usbd->hid_iface_num) { - switch (req->bRequest) { - case HID_REQ_SET_PROTOCOL: - usbd->HID_ClassData.Protocol = (uint8_t)(req->wValue); - break; - - case HID_REQ_GET_PROTOCOL: - USBD_CtlSendData(pdev, (uint8_t *)&usbd->HID_ClassData.Protocol, 1); - break; - - case HID_REQ_SET_IDLE: - usbd->HID_ClassData.IdleState = (uint8_t)(req->wValue >> 8); - break; - - case HID_REQ_GET_IDLE: - USBD_CtlSendData(pdev, (uint8_t *)&usbd->HID_ClassData.IdleState, 1); - break; - - default: - USBD_CtlError(pdev, req); - return USBD_FAIL; - } - } - break; - - // Interface & Endpoint request - case USB_REQ_TYPE_STANDARD: - if ((usbd->usbd_mode & USBD_MODE_MSC) && req->wIndex == MSC_IFACE_NUM_WITH_CDC) { - switch (req->bRequest) { - case USB_REQ_GET_INTERFACE : - USBD_CtlSendData(pdev, (uint8_t *)&usbd->MSC_BOT_ClassData.interface, 1); - break; - - case USB_REQ_SET_INTERFACE : - usbd->MSC_BOT_ClassData.interface = (uint8_t)(req->wValue); - break; - - case USB_REQ_CLEAR_FEATURE: - // Flush the FIFO and Clear the stall status - USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex); - - // Re-activate the EP - USBD_LL_CloseEP(pdev, (uint8_t)req->wIndex); - if((((uint8_t)req->wIndex) & 0x80) == 0x80) { - // Open EP IN - USBD_LL_OpenEP(pdev, MSC_IN_EP, USBD_EP_TYPE_BULK, MSC_MAX_PACKET); - } else { - // Open EP OUT - USBD_LL_OpenEP(pdev, MSC_OUT_EP, USBD_EP_TYPE_BULK, MSC_MAX_PACKET); - } - // Handle BOT error - MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex); - break; - } - } else if ((usbd->usbd_mode & USBD_MODE_HID) && req->wIndex == usbd->hid_iface_num) { - switch (req->bRequest) { - case USB_REQ_GET_DESCRIPTOR: { - uint16_t len = 0; - const uint8_t *pbuf = NULL; - if (req->wValue >> 8 == HID_REPORT_DESC) { - len = usbd->hid_desc[HID_DESC_OFFSET_REPORT_DESC_LEN]; - len = MIN(len, req->wLength); - pbuf = usbd->hid_report_desc; - } else if (req->wValue >> 8 == HID_DESCRIPTOR_TYPE) { - len = MIN(HID_SUBDESC_LEN, req->wLength); - pbuf = usbd->hid_desc + HID_DESC_OFFSET_SUBDESC; - } - USBD_CtlSendData(pdev, (uint8_t*)pbuf, len); - break; - } - - case USB_REQ_GET_INTERFACE: - USBD_CtlSendData(pdev, (uint8_t *)&usbd->HID_ClassData.AltSetting, 1); - break; - - case USB_REQ_SET_INTERFACE: - usbd->HID_ClassData.AltSetting = (uint8_t)(req->wValue); - break; - } - } - break; - } - return USBD_OK; -} - -/* unused -static uint8_t EP0_TxSent(USBD_HandleTypeDef *pdev) { -} -*/ - -static uint8_t USBD_CDC_MSC_HID_EP0_RxReady(USBD_HandleTypeDef *pdev) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if (usbd->cdc != NULL && usbd->CDC_ClassData.CmdOpCode != 0xff) { - usbd_cdc_control(usbd->cdc, usbd->CDC_ClassData.CmdOpCode, (uint8_t*)usbd->CDC_ClassData.data, usbd->CDC_ClassData.CmdLength); - usbd->CDC_ClassData.CmdOpCode = 0xff; - } - - return USBD_OK; -} - -static uint8_t USBD_CDC_MSC_HID_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if ((usbd->usbd_mode & USBD_MODE_CDC) && (epnum == (CDC_IN_EP & 0x7f) || epnum == (CDC_CMD_EP & 0x7f))) { - usbd->CDC_ClassData.TxState = 0; - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_MSC) && epnum == (MSC_IN_EP & 0x7f)) { - MSC_BOT_DataIn(pdev, epnum); - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_HID) && epnum == (usbd->hid_in_ep & 0x7f)) { - /* Ensure that the FIFO is empty before a new transfer, this condition could - be caused by a new transfer before the end of the previous transfer */ - usbd->HID_ClassData.state = HID_IDLE; - return USBD_OK; - } - - return USBD_OK; -} - -static uint8_t USBD_CDC_MSC_HID_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - if ((usbd->usbd_mode & USBD_MODE_CDC) && epnum == (CDC_OUT_EP & 0x7f)) { - /* Get the received data length */ - size_t len = USBD_LL_GetRxDataSize (pdev, epnum); - - /* USB data will be immediately processed, this allow next USB traffic being - NAKed till the end of the application Xfer */ - usbd_cdc_receive(usbd->cdc, len); - - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_MSC) && epnum == (MSC_OUT_EP & 0x7f)) { - MSC_BOT_DataOut(pdev, epnum); - return USBD_OK; - } else if ((usbd->usbd_mode & USBD_MODE_HID) && epnum == (usbd->hid_out_ep & 0x7f)) { - size_t len = USBD_LL_GetRxDataSize(pdev, epnum); - usbd_hid_receive(usbd->hid, len); - } - - return USBD_OK; -} - -static uint8_t *USBD_CDC_MSC_HID_GetCfgDesc(USBD_HandleTypeDef *pdev, uint16_t *length) { - usbd_cdc_msc_hid_state_t *usbd = pdev->pClassData; - *length = usbd->usbd_config_desc_size; - return usbd->usbd_config_desc; -} - -// this is used only in high-speed mode, which we don't support -uint8_t *USBD_CDC_MSC_HID_GetDeviceQualifierDescriptor(USBD_HandleTypeDef *pdev, uint16_t *length) { - /* - *length = sizeof(USBD_CDC_MSC_HID_DeviceQualifierDesc); - return USBD_CDC_MSC_HID_DeviceQualifierDesc; - */ - *length = 0; - return NULL; -} - -// data received on non-control OUT endpoint -uint8_t USBD_CDC_TransmitPacket(usbd_cdc_msc_hid_state_t *usbd, size_t len, const uint8_t *buf) { - if (usbd->CDC_ClassData.TxState == 0) { - // transmit next packet - USBD_LL_Transmit(usbd->pdev, CDC_IN_EP, (uint8_t*)buf, len); - - // Tx transfer in progress - usbd->CDC_ClassData.TxState = 1; - return USBD_OK; - } else { - return USBD_BUSY; - } -} - -// prepare OUT endpoint for reception -uint8_t USBD_CDC_ReceivePacket(usbd_cdc_msc_hid_state_t *usbd, uint8_t *buf) { - // Suspend or Resume USB Out process - if (usbd->pdev->dev_speed == USBD_SPEED_HIGH) { - return USBD_FAIL; - } - - // Prepare Out endpoint to receive next packet - USBD_LL_PrepareReceive(usbd->pdev, CDC_OUT_EP, buf, CDC_DATA_OUT_PACKET_SIZE); - - return USBD_OK; -} - -// prepare OUT endpoint for reception -uint8_t USBD_HID_ReceivePacket(usbd_cdc_msc_hid_state_t *usbd, uint8_t *buf) { - // Suspend or Resume USB Out process - if (usbd->pdev->dev_speed == USBD_SPEED_HIGH) { - return USBD_FAIL; - } - - // Prepare Out endpoint to receive next packet - uint16_t mps_out = - usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_LO] - | (usbd->hid_desc[HID_DESC_OFFSET_MAX_PACKET_OUT_HI] << 8); - USBD_LL_PrepareReceive(usbd->pdev, usbd->hid_out_ep, buf, mps_out); - - return USBD_OK; -} - -int USBD_HID_CanSendReport(usbd_cdc_msc_hid_state_t *usbd) { - return usbd->pdev->dev_state == USBD_STATE_CONFIGURED && usbd->HID_ClassData.state == HID_IDLE; -} - -uint8_t USBD_HID_SendReport(usbd_cdc_msc_hid_state_t *usbd, uint8_t *report, uint16_t len) { - if (usbd->pdev->dev_state == USBD_STATE_CONFIGURED) { - if (usbd->HID_ClassData.state == HID_IDLE) { - usbd->HID_ClassData.state = HID_BUSY; - USBD_LL_Transmit(usbd->pdev, usbd->hid_in_ep, report, len); - } - } - return USBD_OK; -} - -uint8_t USBD_HID_SetNAK(usbd_cdc_msc_hid_state_t *usbd) { - // get USBx object from pdev (needed for USBx_OUTEP macro below) - PCD_HandleTypeDef *hpcd = usbd->pdev->pData; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - // set NAK on HID OUT endpoint - USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; - return USBD_OK; -} - -uint8_t USBD_HID_ClearNAK(usbd_cdc_msc_hid_state_t *usbd) { - // get USBx object from pdev (needed for USBx_OUTEP macro below) - PCD_HandleTypeDef *hpcd = usbd->pdev->pData; - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - // clear NAK on HID OUT endpoint - USBx_OUTEP(HID_OUT_EP_WITH_CDC)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; - return USBD_OK; -} - -// CDC/MSC/HID interface class callback structure -const USBD_ClassTypeDef USBD_CDC_MSC_HID = { - USBD_CDC_MSC_HID_Init, - USBD_CDC_MSC_HID_DeInit, - USBD_CDC_MSC_HID_Setup, - NULL, // EP0_TxSent - USBD_CDC_MSC_HID_EP0_RxReady, - USBD_CDC_MSC_HID_DataIn, - USBD_CDC_MSC_HID_DataOut, - NULL, // SOF - NULL, // IsoINIncomplete - NULL, // IsoOUTIncomplete - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetCfgDesc, - USBD_CDC_MSC_HID_GetDeviceQualifierDescriptor, -}; diff --git a/ports/stm32/usbdev/class/src/usbd_msc_bot.c b/ports/stm32/usbdev/class/src/usbd_msc_bot.c deleted file mode 100644 index 2fccd9e082476..0000000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_bot.c +++ /dev/null @@ -1,407 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_bot.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the BOT protocol core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_cdc_msc_hid.h" -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_BOT - * @brief BOT protocol module - * @{ - */ - -/** @defgroup MSC_BOT_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_FunctionPrototypes - * @{ - */ -static void MSC_BOT_CBW_Decode (USBD_HandleTypeDef *pdev); - -static void MSC_BOT_SendData (USBD_HandleTypeDef *pdev, - uint8_t* pbuf, - uint16_t len); - -static void MSC_BOT_Abort(USBD_HandleTypeDef *pdev); -/** - * @} - */ - - -/** @defgroup MSC_BOT_Private_Functions - * @{ - */ - - - -/** -* @brief MSC_BOT_Init -* Initialize the BOT Process -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_Init (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_state = USBD_BOT_IDLE; - hmsc->bot_status = USBD_BOT_STATUS_NORMAL; - - hmsc->scsi_sense_tail = 0; - hmsc->scsi_sense_head = 0; - - hmsc->bdev_ops->Init(0); - - USBD_LL_FlushEP(pdev, MSC_OUT_EP); - USBD_LL_FlushEP(pdev, MSC_IN_EP); - - /* Prapare EP to Receive First BOT Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); -} - -/** -* @brief MSC_BOT_Reset -* Reset the BOT Machine -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_Reset (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_state = USBD_BOT_IDLE; - hmsc->bot_status = USBD_BOT_STATUS_RECOVERY; - - /* Prapare EP to Receive First BOT Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); -} - -/** -* @brief MSC_BOT_DeInit -* Uninitialize the BOT Machine -* @param pdev: device instance -* @retval None -*/ -void MSC_BOT_DeInit (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_state = USBD_BOT_IDLE; -} - -/** -* @brief MSC_BOT_DataIn -* Handle BOT IN data stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ -void MSC_BOT_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - switch (hmsc->bot_state) - { - case USBD_BOT_DATA_IN: - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - break; - - case USBD_BOT_SEND_DATA: - case USBD_BOT_LAST_DATA_IN: - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_PASSED); - - break; - - default: - break; - } -} -/** -* @brief MSC_BOT_DataOut -* Proccess MSC OUT data -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ -void MSC_BOT_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - switch (hmsc->bot_state) - { - case USBD_BOT_IDLE: - MSC_BOT_CBW_Decode(pdev); - break; - - case USBD_BOT_DATA_OUT: - - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - - break; - - default: - break; - } -} - -/** -* @brief MSC_BOT_CBW_Decode -* Decode the CBW command and set the BOT state machine accordingtly -* @param pdev: device instance -* @retval None -*/ -static void MSC_BOT_CBW_Decode (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->csw.dTag = hmsc->cbw.dTag; - hmsc->csw.dDataResidue = hmsc->cbw.dDataLength; - - if ((USBD_LL_GetRxDataSize (pdev ,MSC_OUT_EP) != USBD_BOT_CBW_LENGTH) || - (hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE)|| - (hmsc->cbw.bLUN > 1) || - (hmsc->cbw.bCBLength < 1) || - (hmsc->cbw.bCBLength > 16)) - { - - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - - hmsc->bot_status = USBD_BOT_STATUS_ERROR; - MSC_BOT_Abort(pdev); - - } - else - { - if(SCSI_ProcessCmd(pdev, - hmsc->cbw.bLUN, - &hmsc->cbw.CB[0]) < 0) - { - if(hmsc->bot_state == USBD_BOT_NO_DATA) - { - MSC_BOT_SendCSW (pdev, - USBD_CSW_CMD_FAILED); - } - else - { - MSC_BOT_Abort(pdev); - } - } - /*Burst xfer handled internally*/ - else if ((hmsc->bot_state != USBD_BOT_DATA_IN) && - (hmsc->bot_state != USBD_BOT_DATA_OUT) && - (hmsc->bot_state != USBD_BOT_LAST_DATA_IN)) - { - if (hmsc->bot_data_length > 0) - { - MSC_BOT_SendData(pdev, - hmsc->bot_data, - hmsc->bot_data_length); - } - else if (hmsc->bot_data_length == 0) - { - MSC_BOT_SendCSW (pdev, - USBD_CSW_CMD_PASSED); - } - } - } -} - -/** -* @brief MSC_BOT_SendData -* Send the requested data -* @param pdev: device instance -* @param buf: pointer to data buffer -* @param len: Data Length -* @retval None -*/ -static void MSC_BOT_SendData(USBD_HandleTypeDef *pdev, - uint8_t* buf, - uint16_t len) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - len = MIN (hmsc->cbw.dDataLength, len); - hmsc->csw.dDataResidue -= len; - hmsc->csw.bStatus = USBD_CSW_CMD_PASSED; - hmsc->bot_state = USBD_BOT_SEND_DATA; - - USBD_LL_Transmit (pdev, MSC_IN_EP, buf, len); -} - -/** -* @brief MSC_BOT_SendCSW -* Send the Command Status Wrapper -* @param pdev: device instance -* @param status : CSW status -* @retval None -*/ -void MSC_BOT_SendCSW (USBD_HandleTypeDef *pdev, - uint8_t CSW_Status) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->csw.dSignature = USBD_BOT_CSW_SIGNATURE; - hmsc->csw.bStatus = CSW_Status; - hmsc->bot_state = USBD_BOT_IDLE; - - USBD_LL_Transmit (pdev, - MSC_IN_EP, - (uint8_t *)&hmsc->csw, - USBD_BOT_CSW_LENGTH); - - /* Prapare EP to Receive next Cmd */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); - -} - -/** -* @brief MSC_BOT_Abort -* Abort the current transfer -* @param pdev: device instance -* @retval status -*/ - -static void MSC_BOT_Abort (USBD_HandleTypeDef *pdev) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((hmsc->cbw.bmFlags == 0) && - (hmsc->cbw.dDataLength != 0) && - (hmsc->bot_status == USBD_BOT_STATUS_NORMAL) ) - { - USBD_LL_StallEP(pdev, MSC_OUT_EP ); - } - USBD_LL_StallEP(pdev, MSC_IN_EP); - - if(hmsc->bot_status == USBD_BOT_STATUS_ERROR) - { - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - (uint8_t *)&hmsc->cbw, - USBD_BOT_CBW_LENGTH); - } -} - -/** -* @brief MSC_BOT_CplClrFeature -* Complete the clear feature request -* @param pdev: device instance -* @param epnum: endpoint index -* @retval None -*/ - -void MSC_BOT_CplClrFeature (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bot_status == USBD_BOT_STATUS_ERROR )/* Bad CBW Signature */ - { - USBD_LL_StallEP(pdev, MSC_IN_EP); - hmsc->bot_status = USBD_BOT_STATUS_NORMAL; - } - else if(((epnum & 0x80) == 0x80) && ( hmsc->bot_status != USBD_BOT_STATUS_RECOVERY)) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_FAILED); - } - -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/src/usbd_msc_data.c b/ports/stm32/usbdev/class/src/usbd_msc_data.c deleted file mode 100644 index 4d72bd5fce8fe..0000000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_data.c +++ /dev/null @@ -1,134 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_data.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the vital inquiry pages and sense data. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_data.h" - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_DATA - * @brief Mass storage info/data module - * @{ - */ - -/** @defgroup MSC_DATA_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Variables - * @{ - */ - - -/* USB Mass storage Page 0 Inquiry Data */ -const uint8_t MSC_Page00_Inquiry_Data[] = {//7 - 0x00, - 0x00, - 0x00, - (LENGTH_INQUIRY_PAGE00 - 4), - 0x00, - 0x80, - 0x83 -}; -/* USB Mass storage sense 6 Data */ -const uint8_t MSC_Mode_Sense6_data[] = { - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; -/* USB Mass storage sense 10 Data */ -const uint8_t MSC_Mode_Sense10_data[] = { - 0x00, - 0x06, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 -}; -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_DATA_Private_Functions - * @{ - */ - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/class/src/usbd_msc_scsi.c b/ports/stm32/usbdev/class/src/usbd_msc_scsi.c deleted file mode 100644 index 50cd5b97150da..0000000000000 --- a/ports/stm32/usbdev/class/src/usbd_msc_scsi.c +++ /dev/null @@ -1,811 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_msc_scsi.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the USBD SCSI layer functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_msc_bot.h" -#include "usbd_msc_scsi.h" -#include "usbd_msc_data.h" -#include "usbd_cdc_msc_hid.h" - - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup MSC_SCSI - * @brief Mass storage SCSI layer module - * @{ - */ - -/** @defgroup MSC_SCSI_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_FunctionPrototypes - * @{ - */ -static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_RequestSense (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_AllowMediumRemoval(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ModeSense6 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_ModeSense10 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_SynchronizeCache(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_Write10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params); -static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params); -static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params); -static int8_t SCSI_CheckAddressRange (USBD_HandleTypeDef *pdev, - uint8_t lun , - uint32_t blk_offset , - uint16_t blk_nbr); -static int8_t SCSI_ProcessRead (USBD_HandleTypeDef *pdev, - uint8_t lun); - -static int8_t SCSI_ProcessWrite (USBD_HandleTypeDef *pdev, - uint8_t lun); -/** - * @} - */ - - -/** @defgroup MSC_SCSI_Private_Functions - * @{ - */ - - -/** -* @brief SCSI_ProcessCmd -* Process SCSI commands -* @param pdev: device instance -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, - uint8_t lun, - uint8_t *params) -{ - /* - if (params[0] != SCSI_READ10 && params[0] != SCSI_WRITE10) { - printf("SCSI_ProcessCmd(lun=%d, params=%x, %x)\n", lun, params[0], params[1]); - } - */ - - switch (params[0]) - { - case SCSI_TEST_UNIT_READY: - return SCSI_TestUnitReady(pdev, lun, params); - - case SCSI_REQUEST_SENSE: - return SCSI_RequestSense (pdev, lun, params); - case SCSI_INQUIRY: - return SCSI_Inquiry(pdev, lun, params); - - case SCSI_START_STOP_UNIT: - return SCSI_StartStopUnit(pdev, lun, params); - - case SCSI_ALLOW_MEDIUM_REMOVAL: - return SCSI_AllowMediumRemoval(pdev, lun, params); - - case SCSI_MODE_SENSE6: - return SCSI_ModeSense6 (pdev, lun, params); - - case SCSI_MODE_SENSE10: - return SCSI_ModeSense10 (pdev, lun, params); - - case SCSI_SYNCHRONIZE_CACHE10: - case SCSI_SYNCHRONIZE_CACHE16: - return SCSI_SynchronizeCache(pdev, lun, params); - - case SCSI_READ_FORMAT_CAPACITIES: - return SCSI_ReadFormatCapacity(pdev, lun, params); - - case SCSI_READ_CAPACITY10: - return SCSI_ReadCapacity10(pdev, lun, params); - - case SCSI_READ10: - return SCSI_Read10(pdev, lun, params); - - case SCSI_WRITE10: - return SCSI_Write10(pdev, lun, params); - - case SCSI_VERIFY10: - return SCSI_Verify10(pdev, lun, params); - - default: - SCSI_SenseCode(pdev, - lun, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } -} - - -/** -* @brief SCSI_TestUnitReady -* Process SCSI Test Unit Ready Command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - /* case 9 : Hi > D0 */ - if (hmsc->cbw.dDataLength != 0) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - - hmsc->bot_state = USBD_BOT_NO_DATA; - return -1; - } - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_Inquiry -* Process Inquiry command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint8_t* pPage; - uint16_t len; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if (params[1] & 0x01)/*Evpd is set*/ - { - pPage = (uint8_t *)MSC_Page00_Inquiry_Data; - len = LENGTH_INQUIRY_PAGE00; - } - else - { - - pPage = (uint8_t *)&hmsc->bdev_ops->pInquiry[lun * STANDARD_INQUIRY_DATA_LEN]; - len = pPage[4] + 5; - - if (params[4] <= len) - { - len = params[4]; - } - } - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = pPage[len]; - } - return 0; -} - -/** -* @brief SCSI_ReadCapacity10 -* Process Read Capacity 10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bdev_ops->GetCapacity(lun, &hmsc->scsi_blk_nbr, &hmsc->scsi_blk_size) != 0) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - else - { - - hmsc->bot_data[0] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 24); - hmsc->bot_data[1] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 16); - hmsc->bot_data[2] = (uint8_t)((hmsc->scsi_blk_nbr - 1) >> 8); - hmsc->bot_data[3] = (uint8_t)(hmsc->scsi_blk_nbr - 1); - - hmsc->bot_data[4] = (uint8_t)(hmsc->scsi_blk_size >> 24); - hmsc->bot_data[5] = (uint8_t)(hmsc->scsi_blk_size >> 16); - hmsc->bot_data[6] = (uint8_t)(hmsc->scsi_blk_size >> 8); - hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_size); - - hmsc->bot_data_length = 8; - return 0; - } -} -/** -* @brief SCSI_ReadFormatCapacity -* Process Read Format Capacity command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - uint16_t blk_size; - uint32_t blk_nbr; - uint16_t i; - - for(i=0 ; i < 12 ; i++) - { - hmsc->bot_data[i] = 0; - } - - if(hmsc->bdev_ops->GetCapacity(lun, &blk_nbr, &blk_size) != 0) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - else - { - hmsc->bot_data[3] = 0x08; - hmsc->bot_data[4] = (uint8_t)((blk_nbr - 1) >> 24); - hmsc->bot_data[5] = (uint8_t)((blk_nbr - 1) >> 16); - hmsc->bot_data[6] = (uint8_t)((blk_nbr - 1) >> 8); - hmsc->bot_data[7] = (uint8_t)(blk_nbr - 1); - - hmsc->bot_data[8] = 0x02; - hmsc->bot_data[9] = (uint8_t)(blk_size >> 16); - hmsc->bot_data[10] = (uint8_t)(blk_size >> 8); - hmsc->bot_data[11] = (uint8_t)(blk_size); - - hmsc->bot_data_length = 12; - return 0; - } -} -/** -* @brief SCSI_ModeSense6 -* Process Mode Sense6 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ModeSense6 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - uint16_t len = 8 ; - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = MSC_Mode_Sense6_data[len]; - } - return 0; -} - -/** -* @brief SCSI_ModeSense10 -* Process Mode Sense10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_ModeSense10 (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint16_t len = 8; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->bot_data_length = len; - - while (len) - { - len--; - hmsc->bot_data[len] = MSC_Mode_Sense10_data[len]; - } - return 0; -} - -static int8_t SCSI_SynchronizeCache(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) { - // nothing to synchronize, so just return "success" - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_RequestSense -* Process Request Sense command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_RequestSense (USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - uint8_t i; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - for(i=0 ; i < REQUEST_SENSE_DATA_LEN ; i++) - { - hmsc->bot_data[i] = 0; - } - - hmsc->bot_data[0] = 0x70; - hmsc->bot_data[7] = REQUEST_SENSE_DATA_LEN - 6; - - if((hmsc->scsi_sense_head != hmsc->scsi_sense_tail)) { - - hmsc->bot_data[2] = hmsc->scsi_sense[hmsc->scsi_sense_head].Skey; - hmsc->bot_data[12] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASCQ; - hmsc->bot_data[13] = hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASC; - hmsc->scsi_sense_head++; - - if (hmsc->scsi_sense_head == SENSE_LIST_DEEPTH) - { - hmsc->scsi_sense_head = 0; - } - } - hmsc->bot_data_length = REQUEST_SENSE_DATA_LEN; - - if (params[4] <= REQUEST_SENSE_DATA_LEN) - { - hmsc->bot_data_length = params[4]; - } - return 0; -} - -/** -* @brief SCSI_SenseCode -* Load the last error code in the error list -* @param lun: Logical unit number -* @param sKey: Sense Key -* @param ASC: Additional Sense Key -* @retval none - -*/ -void SCSI_SenseCode(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t sKey, uint8_t ASC) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - hmsc->scsi_sense[hmsc->scsi_sense_tail].Skey = sKey; - hmsc->scsi_sense[hmsc->scsi_sense_tail].w.ASC = ASC << 8; - hmsc->scsi_sense_tail++; - if (hmsc->scsi_sense_tail == SENSE_LIST_DEEPTH) - { - hmsc->scsi_sense_tail = 0; - } -} -/** -* @brief SCSI_StartStopUnit -* Process Start Stop Unit command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - - // On Mac OS X, when the device is ejected a SCSI_START_STOP_UNIT command is sent. - // Bit 0 of params[4] is the START bit. - // If we get a stop, we must really stop the device so that the Mac does not - // automatically remount it. - hmsc->bdev_ops->StartStopUnit(lun, params[4] & 1); - - return 0; -} - -/** -* @brief SCSI_AllowMediumRemoval -* Process Allow Medium Removal command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_AllowMediumRemoval(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - hmsc->bot_data_length = 0; - hmsc->bdev_ops->PreventAllowMediumRemoval(lun, params[0]); - return 0; -} - -/** -* @brief SCSI_Read10 -* Process Read10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ -static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if(hmsc->bot_state == USBD_BOT_IDLE) /* Idle */ - { - - /* case 10 : Ho <> Di */ - - if ((hmsc->cbw.bmFlags & 0x80) != 0x80) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | \ - (params[3] << 16) | \ - (params[4] << 8) | \ - params[5]; - - hmsc->scsi_blk_len = (params[7] << 8) | \ - params[8]; - - - - if( SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr_in_blks, hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - - hmsc->bot_state = USBD_BOT_DATA_IN; - hmsc->scsi_blk_len *= hmsc->scsi_blk_size; - - /* cases 4,5 : Hi <> Dn */ - if (hmsc->cbw.dDataLength != hmsc->scsi_blk_len) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - } - hmsc->bot_data_length = MSC_MEDIA_PACKET; - - return SCSI_ProcessRead(pdev, lun); -} - -/** -* @brief SCSI_Write10 -* Process Write10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_Write10 (USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */ - { - - /* case 8 : Hi <> Do */ - - if ((hmsc->cbw.bmFlags & 0x80) == 0x80) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - /* Check whether Media is ready */ - if(hmsc->bdev_ops->IsReady(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - MEDIUM_NOT_PRESENT); - return -1; - } - - /* Check If media is write-protected */ - if(hmsc->bdev_ops->IsWriteProtected(lun) !=0 ) - { - SCSI_SenseCode(pdev, - lun, - NOT_READY, - WRITE_PROTECTED); - return -1; - } - - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | \ - (params[3] << 16) | \ - (params[4] << 8) | \ - params[5]; - hmsc->scsi_blk_len = (params[7] << 8) | \ - params[8]; - - /* check if LBA address is in the right range */ - if(SCSI_CheckAddressRange(pdev, - lun, - hmsc->scsi_blk_addr_in_blks, - hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - - hmsc->scsi_blk_len *= hmsc->scsi_blk_size; - - /* cases 3,11,13 : Hn,Ho <> D0 */ - if (hmsc->cbw.dDataLength != hmsc->scsi_blk_len) - { - SCSI_SenseCode(pdev, - hmsc->cbw.bLUN, - ILLEGAL_REQUEST, - INVALID_CDB); - return -1; - } - - /* Prepare EP to receive first data packet */ - hmsc->bot_state = USBD_BOT_DATA_OUT; - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - hmsc->bot_data, - MIN (hmsc->scsi_blk_len, MSC_MEDIA_PACKET)); - } - else /* Write Process ongoing */ - { - return SCSI_ProcessWrite(pdev, lun); - } - return 0; -} - - -/** -* @brief SCSI_Verify10 -* Process Verify10 command -* @param lun: Logical unit number -* @param params: Command parameters -* @retval status -*/ - -static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun , uint8_t *params) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((params[1]& 0x02) == 0x02) - { - SCSI_SenseCode (pdev, - lun, - ILLEGAL_REQUEST, - INVALID_FIELED_IN_COMMAND); - return -1; /* Error, Verify Mode Not supported*/ - } - - hmsc->scsi_blk_addr_in_blks = (params[2] << 24) | (params[3] << 16) | (params[4] << 8) | params[5]; - hmsc->scsi_blk_len = (params[7] << 8) | params[8]; - - if(SCSI_CheckAddressRange(pdev, - lun, - hmsc->scsi_blk_addr_in_blks, - hmsc->scsi_blk_len) < 0) - { - return -1; /* error */ - } - hmsc->bot_data_length = 0; - return 0; -} - -/** -* @brief SCSI_CheckAddressRange -* Check address range -* @param lun: Logical unit number -* @param blk_offset: first block address -* @param blk_nbr: number of block to be processed -* @retval status -*/ -static int8_t SCSI_CheckAddressRange (USBD_HandleTypeDef *pdev, uint8_t lun , uint32_t blk_offset , uint16_t blk_nbr) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - if ((blk_offset + blk_nbr) > hmsc->scsi_blk_nbr ) - { - SCSI_SenseCode(pdev, - lun, - ILLEGAL_REQUEST, - ADDRESS_OUT_OF_RANGE); - return -1; - } - return 0; -} - -/** -* @brief SCSI_ProcessRead -* Handle Read Process -* @param lun: Logical unit number -* @retval status -*/ -static int8_t SCSI_ProcessRead (USBD_HandleTypeDef *pdev, uint8_t lun) -{ - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - uint32_t len; - - len = MIN(hmsc->scsi_blk_len , MSC_MEDIA_PACKET); - - if( hmsc->bdev_ops->Read(lun , - hmsc->bot_data, - hmsc->scsi_blk_addr_in_blks, - len / hmsc->scsi_blk_size) < 0) - { - - SCSI_SenseCode(pdev, - lun, - HARDWARE_ERROR, - UNRECOVERED_READ_ERROR); - return -1; - } - - - USBD_LL_Transmit (pdev, - MSC_IN_EP, - hmsc->bot_data, - len); - - - hmsc->scsi_blk_addr_in_blks += len / hmsc->scsi_blk_size; - hmsc->scsi_blk_len -= len; - - /* case 6 : Hi = Di */ - hmsc->csw.dDataResidue -= len; - - if (hmsc->scsi_blk_len == 0) - { - hmsc->bot_state = USBD_BOT_LAST_DATA_IN; - } - return 0; -} - -/** -* @brief SCSI_ProcessWrite -* Handle Write Process -* @param lun: Logical unit number -* @retval status -*/ - -static int8_t SCSI_ProcessWrite (USBD_HandleTypeDef *pdev, uint8_t lun) -{ - uint32_t len; - USBD_MSC_BOT_HandleTypeDef *hmsc = &((usbd_cdc_msc_hid_state_t*)pdev->pClassData)->MSC_BOT_ClassData; - - len = MIN(hmsc->scsi_blk_len , MSC_MEDIA_PACKET); - - if(hmsc->bdev_ops->Write(lun , - hmsc->bot_data, - hmsc->scsi_blk_addr_in_blks, - len / hmsc->scsi_blk_size) < 0) - { - SCSI_SenseCode(pdev, - lun, - HARDWARE_ERROR, - WRITE_FAULT); - return -1; - } - - - hmsc->scsi_blk_addr_in_blks += len / hmsc->scsi_blk_size; - hmsc->scsi_blk_len -= len; - - /* case 12 : Ho = Do */ - hmsc->csw.dDataResidue -= len; - - if (hmsc->scsi_blk_len == 0) - { - MSC_BOT_SendCSW (pdev, USBD_CSW_CMD_PASSED); - } - else - { - /* Prapare EP to Receive next packet */ - USBD_LL_PrepareReceive (pdev, - MSC_OUT_EP, - hmsc->bot_data, - MIN (hmsc->scsi_blk_len, MSC_MEDIA_PACKET)); - } - - return 0; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_core.h b/ports/stm32/usbdev/core/inc/usbd_core.h deleted file mode 100644 index 3178d4a4baef3..0000000000000 --- a/ports/stm32/usbdev/core/inc/usbd_core.h +++ /dev/null @@ -1,159 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief Header file for usbd_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CORE_H -#define __USBD_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" -#include "usbd_def.h" -#include "usbd_ioreq.h" -#include "usbd_ctlreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_CORE - * @brief This file is the Header file for usbd_core.c file - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ -#define USBD_SOF USBD_LL_SOF -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_FunctionsPrototype - * @{ - */ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, const USBD_ClassTypeDef *pclass); - -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); - -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); - -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); - -/* USBD Low Level Driver */ -USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_mps); - -USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr); -USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -void USBD_LL_Delay (uint32_t Delay); - -/** - * @} - */ - -#endif /* __USBD_CORE_H */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbdev/core/inc/usbd_ctlreq.h b/ports/stm32/usbdev/core/inc/usbd_ctlreq.h deleted file mode 100644 index 9edf07924713f..0000000000000 --- a/ports/stm32/usbdev/core/inc/usbd_ctlreq.h +++ /dev/null @@ -1,106 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header file for the usbd_req.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USB_REQUEST_H_ -#define __USB_REQUEST_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_REQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_REQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Exported_Types - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_REQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - - -void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - -void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata); - -void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len); -/** - * @} - */ - -#endif /* __USB_REQUEST_H_ */ - -/** - * @} - */ - -/** -* @} -*/ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_def.h b/ports/stm32/usbdev/core/inc/usbd_def.h deleted file mode 100644 index 888d426ef3c9f..0000000000000 --- a/ports/stm32/usbdev/core/inc/usbd_def.h +++ /dev/null @@ -1,321 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_def.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief general defines for the usb device library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USBD_DEF_H -#define __USBD_DEF_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_DEF - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_DEF_Exported_Defines - * @{ - */ - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -#define USB_LEN_DEV_QUALIFIER_DESC 0x0A -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_LANGID_STR_DESC 0x04 -#define USB_LEN_OTHER_SPEED_DESC_SIZ 0x09 - -#define USBD_IDX_LANGID_STR 0x00 -#define USBD_IDX_MFC_STR 0x01 -#define USBD_IDX_PRODUCT_STR 0x02 -#define USBD_IDX_SERIAL_STR 0x03 -#define USBD_IDX_CONFIG_STR 0x04 -#define USBD_IDX_INTERFACE_STR 0x05 - -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_MASK 0x60 - -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_MASK 0x03 - -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 - - -#define USB_CONFIG_REMOTE_WAKEUP 2 -#define USB_CONFIG_SELF_POWERED 1 - -#define USB_FEATURE_EP_HALT 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 -#define USB_FEATURE_TEST_MODE 2 - - -#define USB_HS_MAX_PACKET_SIZE 512 -#define USB_FS_MAX_PACKET_SIZE 64 -#define USB_MAX_EP0_SIZE 64 - -/* Device Status */ -#define USBD_STATE_DEFAULT 1 -#define USBD_STATE_ADDRESSED 2 -#define USBD_STATE_CONFIGURED 3 -#define USBD_STATE_SUSPENDED 4 - - -/* EP0 State */ -#define USBD_EP0_IDLE 0 -#define USBD_EP0_SETUP 1 -#define USBD_EP0_DATA_IN 2 -#define USBD_EP0_DATA_OUT 3 -#define USBD_EP0_STATUS_IN 4 -#define USBD_EP0_STATUS_OUT 5 -#define USBD_EP0_STALL 6 - -#define USBD_EP_TYPE_CTRL 0 -#define USBD_EP_TYPE_ISOC 1 -#define USBD_EP_TYPE_BULK 2 -#define USBD_EP_TYPE_INTR 3 - - -/** - * @} - */ - - -/** @defgroup USBD_DEF_Exported_TypesDefinitions - * @{ - */ - -typedef struct usb_setup_req -{ - - uint8_t bmRequest; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -}USBD_SetupReqTypedef; - -struct _USBD_HandleTypeDef; - -typedef struct _Device_cb -{ - uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - /* Control Endpoints*/ - uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req); - uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev ); - uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev ); - /* Class Specific Endpoints*/ - uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev); - uint8_t (*IsoINIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*IsoOUTIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - - uint8_t *(*GetHSConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetFSConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetOtherSpeedConfigDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetDeviceQualifierDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); -#if (USBD_SUPPORT_USER_STRING == 1) - uint8_t *(*GetUsrStrDescriptor)(struct _USBD_HandleTypeDef *pdev ,uint8_t index, uint16_t *length); -#endif - -} USBD_ClassTypeDef; - -/* Following USB Device Speed */ -typedef enum -{ - USBD_SPEED_HIGH = 0, - USBD_SPEED_FULL = 1, - USBD_SPEED_LOW = 2, -}USBD_SpeedTypeDef; - -/* Following USB Device status */ -typedef enum { - USBD_OK = 0, - USBD_BUSY, - USBD_FAIL, -}USBD_StatusTypeDef; - -struct _USBD_HandleTypeDef; - -/* USB Device descriptors structure */ -typedef struct -{ - uint8_t *(*GetDeviceDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetLangIDStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetManufacturerStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetProductStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetSerialStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetConfigurationStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); - uint8_t *(*GetInterfaceStrDescriptor)(struct _USBD_HandleTypeDef *pdev, uint16_t *length); -} USBD_DescriptorsTypeDef; - -/* USB Device handle structure */ -typedef struct -{ - uint32_t status; - uint32_t total_length; - uint32_t rem_length; - uint32_t maxpacket; -} USBD_EndpointTypeDef; - -/* USB Device handle structure */ -typedef struct _USBD_HandleTypeDef -{ - uint8_t id; - uint32_t dev_config; - uint32_t dev_default_config; - uint32_t dev_config_status; - USBD_SpeedTypeDef dev_speed; - USBD_EndpointTypeDef ep_in[15]; - USBD_EndpointTypeDef ep_out[15]; - uint32_t ep0_state; - uint32_t ep0_data_len; - uint8_t dev_state; - uint8_t dev_old_state; - uint8_t dev_address; - uint8_t dev_connection_status; - uint8_t dev_test_mode; - uint32_t dev_remote_wakeup; - - USBD_SetupReqTypedef request; - USBD_DescriptorsTypeDef *pDesc; - const USBD_ClassTypeDef *pClass; - void *pClassData; - void *pUserData; - void *pData; -} USBD_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBD_DEF_Exported_Macros - * @{ - */ -#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \ - (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LOBYTE(x) ((uint8_t)(x & 0x00FF)) -#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* In HS mode and when the DMA is used, all variables and data structures dealing - with the DMA during the transaction process should be 4-bytes aligned */ - -#if defined (__GNUC__) /* GNU Compiler */ - #define __ALIGN_END __attribute__ ((aligned (4))) - #define __ALIGN_BEGIN -#else - #define __ALIGN_END - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #elif defined (__TASKING__) /* TASKING Compiler */ - #define __ALIGN_BEGIN __align(4) - #endif /* __CC_ARM */ -#endif /* __GNUC__ */ - - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#endif /* __USBD_DEF_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/inc/usbd_ioreq.h b/ports/stm32/usbdev/core/inc/usbd_ioreq.h deleted file mode 100644 index 04e01b854beb7..0000000000000 --- a/ports/stm32/usbdev/core/inc/usbd_ioreq.h +++ /dev/null @@ -1,121 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.h - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief header file for the usbd_ioreq.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ - -#ifndef __USBD_IOREQ_H_ -#define __USBD_IOREQ_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" -#include "usbd_core.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_IOREQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_IOREQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Exported_Types - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_IOREQ_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *buf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev); - -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , - uint8_t epnum); - -/** - * @} - */ - -#endif /* __USBD_IOREQ_H_ */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/src/usbd_core.c b/ports/stm32/usbdev/core/src/usbd_core.c deleted file mode 100644 index ae5b99626f647..0000000000000 --- a/ports/stm32/usbdev/core/src/usbd_core.c +++ /dev/null @@ -1,554 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides all the USBD core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY -* @{ -*/ - - -/** @defgroup USBD_CORE -* @brief usbd core module -* @{ -*/ - -/** @defgroup USBD_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Defines -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - - - -/** @defgroup USBD_CORE_Private_FunctionPrototypes -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Functions -* @{ -*/ - -/** -* @brief USBD_Init -* Initailizes the device stack and load the class driver -* @param pdev: device instance -* @param core_address: USB OTG core ID -* @param pdesc: Descriptor structure address -* @param id: Low level core index -* @retval None -*/ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(pdev == NULL) - { - USBD_ErrLog("Invalid Device handle"); - return USBD_FAIL; - } - - /* Unlink previous class*/ - if(pdev->pClass != NULL) - { - pdev->pClass = NULL; - } - - /* Assign USBD Descriptors */ - if(pdesc != NULL) - { - pdev->pDesc = pdesc; - } - - /* Set Device initial State */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->id = id; - /* Initialize low level driver */ - USBD_LL_Init(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_DeInit -* Re-Initialize th device library -* @param pdev: device instance -* @retval status: status -*/ -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev) -{ - /* Set Default State */ - pdev->dev_state = USBD_STATE_DEFAULT; - - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - /* Initialize low level driver */ - USBD_LL_DeInit(pdev); - - return USBD_OK; -} - - -/** - * @brief USBD_RegisterClass - * Link class driver to Device Core. - * @param pDevice : Device Handle - * @param pclass: Class handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, const USBD_ClassTypeDef *pclass) -{ - USBD_StatusTypeDef status = USBD_OK; - if(pclass != 0) - { - /* link the class tgo the USB Device handle */ - pdev->pClass = pclass; - status = USBD_OK; - } - else - { - USBD_ErrLog("Invalid Class handle"); - status = USBD_FAIL; - } - - return status; -} - -/** - * @brief USBD_Start - * Start the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev) -{ - - /* Start the low level driver */ - USBD_LL_Start(pdev); - - return USBD_OK; -} - -/** - * @brief USBD_Stop - * Stop the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_RunTestMode -* Launch test mode process -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - - -/** -* @brief USBD_SetClassConfig -* Configure device and start the interface -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status -*/ - -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - USBD_StatusTypeDef ret = USBD_FAIL; - - if(pdev->pClass != NULL) - { - /* Set configuration and Start the Class*/ - if(pdev->pClass->Init(pdev, cfgidx) == 0) - { - ret = USBD_OK; - } - } - return ret; -} - -/** -* @brief USBD_ClrClassConfig -* Clear current configuration -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status: USBD_StatusTypeDef -*/ -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - /* Clear configuration and Deinitialize the Class process*/ - pdev->pClass->DeInit(pdev, cfgidx); - return USBD_OK; -} - - -/** -* @brief USBD_SetupStage -* Handle the setup stage -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) -{ - - USBD_ParseSetupRequest(&pdev->request, psetup); - - pdev->ep0_state = USBD_EP0_SETUP; - pdev->ep0_data_len = pdev->request.wLength; - - switch (pdev->request.bmRequest & 0x1F) - { - case USB_REQ_RECIPIENT_DEVICE: - USBD_StdDevReq (pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_INTERFACE: - USBD_StdItfReq(pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_ENDPOINT: - USBD_StdEPReq(pdev, &pdev->request); - break; - - default: - USBD_LL_StallEP(pdev , pdev->request.bmRequest & 0x80); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_DataOutStage -* Handle data OUT stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_out[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_OUT) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueRx (pdev, - pdata, - MIN(pep->rem_length ,pep->maxpacket)); - } - else - { - if((pdev->pClass->EP0_RxReady != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_RxReady(pdev); - } - USBD_CtlSendStatus(pdev); - } - } - } - else if((pdev->pClass->DataOut != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataOut(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_DataInStage -* Handle data in stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_in[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_IN) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueSendData (pdev, - pdata, - pep->rem_length); - } - else - { /* last packet is MPS multiple, so send ZLP packet */ - if((pep->total_length % pep->maxpacket == 0) && - (pep->total_length >= pep->maxpacket) && - (pep->total_length < pdev->ep0_data_len )) - { - - USBD_CtlContinueSendData(pdev , NULL, 0); - pdev->ep0_data_len = 0; - } - else - { - if((pdev->pClass->EP0_TxSent != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_TxSent(pdev); - } - USBD_CtlReceiveStatus(pdev); - } - } - } - if (pdev->dev_test_mode == 1) - { - USBD_RunTestMode(pdev); - pdev->dev_test_mode = 0; - } - } - else if((pdev->pClass->DataIn != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataIn(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) -{ - /* Open EP0 OUT */ - USBD_LL_OpenEP(pdev, - 0x00, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; - - /* Open EP0 IN */ - USBD_LL_OpenEP(pdev, - 0x80, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; - /* Upon Reset call usr call back */ - pdev->dev_state = USBD_STATE_DEFAULT; - - if (pdev->pClassData) - pdev->pClass->DeInit(pdev, pdev->dev_config); - - - return USBD_OK; -} - - - - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) -{ - pdev->dev_speed = speed; - return USBD_OK; -} - -/** -* @brief USBD_Suspend -* Handle Suspend event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) -{ - pdev->dev_old_state = pdev->dev_state; - pdev->dev_state = USBD_STATE_SUSPENDED; - return USBD_OK; -} - -/** -* @brief USBD_Resume -* Handle Resume event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) -{ - pdev->dev_state = pdev->dev_old_state; - return USBD_OK; -} - -/** -* @brief USBD_SOF -* Handle SOF event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) -{ - if(pdev->dev_state == USBD_STATE_CONFIGURED) - { - if(pdev->pClass->SOF != NULL) - { - pdev->pClass->SOF(pdev); - } - } - return USBD_OK; -} - -/** -* @brief USBD_IsoINIncomplete -* Handle iso in incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_IsoOUTIncomplete -* Handle iso out incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevConnected -* Handle device connection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevDisconnected -* Handle device disconnection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->pClass->DeInit(pdev, pdev->dev_config); - - return USBD_OK; -} -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbdev/core/src/usbd_ctlreq.c b/ports/stm32/usbdev/core/src/usbd_ctlreq.c deleted file mode 100644 index 5fba322fa6add..0000000000000 --- a/ports/stm32/usbdev/core/src/usbd_ctlreq.c +++ /dev/null @@ -1,769 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides the standard USB requests following chapter 9. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ctlreq.h" -#include "usbd_ioreq.h" - - -/** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_REQ - * @brief USB standard requests module - * @{ - */ - -/** @defgroup USBD_REQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_FunctionPrototypes - * @{ - */ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static uint8_t USBD_GetLen(uint8_t *buf); - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Functions - * @{ - */ - - -/** -* @brief USBD_StdDevReq -* Handle standard usb device requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (req->bRequest) - { - case USB_REQ_GET_DESCRIPTOR: - - USBD_GetDescriptor (pdev, req) ; - break; - - case USB_REQ_SET_ADDRESS: - USBD_SetAddress(pdev, req); - break; - - case USB_REQ_SET_CONFIGURATION: - USBD_SetConfig (pdev , req); - break; - - case USB_REQ_GET_CONFIGURATION: - USBD_GetConfig (pdev , req); - break; - - case USB_REQ_GET_STATUS: - USBD_GetStatus (pdev , req); - break; - - - case USB_REQ_SET_FEATURE: - USBD_SetFeature (pdev , req); - break; - - case USB_REQ_CLEAR_FEATURE: - USBD_ClrFeature (pdev , req); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - - return ret; -} - -/** -* @brief USBD_StdItfReq -* Handle standard usb interface requests -* @param pdev: USB OTG device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (pdev->dev_state) - { - case USBD_STATE_CONFIGURED: - - if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) - { - pdev->pClass->Setup (pdev, req); - - if((req->wLength == 0)&& (ret == USBD_OK)) - { - USBD_CtlSendStatus(pdev); - } - } - else - { - USBD_CtlError(pdev , req); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_StdEPReq -* Handle standard usb endpoint requests -* @param pdev: USB OTG device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - - uint8_t ep_addr; - USBD_StatusTypeDef ret = USBD_OK; - USBD_EndpointTypeDef *pep; - ep_addr = LOBYTE(req->wIndex); - - switch (req->bRequest) - { - - case USB_REQ_SET_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - - } - } - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_CLEAR_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_ClearStallEP(pdev , ep_addr); - pdev->pClass->Setup (pdev, req); - } - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_GET_STATUS: - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - pep = ((ep_addr & 0x80) == 0x80) ? &pdev->ep_in[ep_addr & 0x7F]:\ - &pdev->ep_out[ep_addr & 0x7F]; - if(USBD_LL_IsStallEP(pdev, ep_addr)) - { - pep->status = 0x0001; - } - else - { - pep->status = 0x0000; - } - - USBD_CtlSendData (pdev, - (uint8_t *)&pep->status, - 2); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - default: - break; - } - return ret; -} -/** -* @brief USBD_GetDescriptor -* Handle Get Descriptor requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint16_t len; - uint8_t *pbuf; - - - switch (req->wValue >> 8) - { - case USB_DESC_TYPE_DEVICE: - pbuf = pdev->pDesc->GetDeviceDescriptor(pdev, &len); - break; - - case USB_DESC_TYPE_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - else - { - pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - break; - - case USB_DESC_TYPE_STRING: - switch ((uint8_t)(req->wValue)) - { - case USBD_IDX_LANGID_STR: - pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev, &len); - break; - - case USBD_IDX_MFC_STR: - pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev, &len); - break; - - case USBD_IDX_PRODUCT_STR: - pbuf = pdev->pDesc->GetProductStrDescriptor(pdev, &len); - break; - - case USBD_IDX_SERIAL_STR: - pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev, &len); - break; - - case USBD_IDX_CONFIG_STR: - pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev, &len); - break; - - case USBD_IDX_INTERFACE_STR: - pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev, &len); - break; - - default: -#if (USBD_SUPPORT_USER_STRING == 1) - pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue) , &len); - break; -#else - USBD_CtlError(pdev , req); - return; -#endif - } - break; - case USB_DESC_TYPE_DEVICE_QUALIFIER: - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(pdev, &len); - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(pdev, &len); - pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - default: - USBD_CtlError(pdev , req); - return; - } - - if((len != 0)&& (req->wLength != 0)) - { - - len = MIN(len , req->wLength); - - USBD_CtlSendData (pdev, - pbuf, - len); - } - -} - -/** -* @brief USBD_SetAddress -* Set device address -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint8_t dev_addr; - - if ((req->wIndex == 0) && (req->wLength == 0)) - { - dev_addr = (uint8_t)(req->wValue) & 0x7F; - - if (pdev->dev_state == USBD_STATE_CONFIGURED) - { - USBD_CtlError(pdev , req); - } - else - { - pdev->dev_address = dev_addr; - USBD_LL_SetUSBAddress(pdev, dev_addr); - USBD_CtlSendStatus(pdev); - - if (dev_addr != 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - } - else - { - pdev->dev_state = USBD_STATE_DEFAULT; - } - } - } - else - { - USBD_CtlError(pdev , req); - } -} - -/** -* @brief USBD_SetConfig -* Handle Set device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - uint8_t cfgidx; - - cfgidx = (uint8_t)(req->wValue); - - if (cfgidx > USBD_MAX_NUM_CONFIGURATION ) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if (cfgidx) - { - pdev->dev_config = cfgidx; - pdev->dev_state = USBD_STATE_CONFIGURED; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - case USBD_STATE_CONFIGURED: - if (cfgidx == 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - pdev->dev_config = cfgidx; - USBD_ClrClassConfig(pdev , cfgidx); - USBD_CtlSendStatus(pdev); - - } - else if (cfgidx != pdev->dev_config) - { - /* Clear old configuration */ - USBD_ClrClassConfig(pdev , pdev->dev_config); - - /* set new configuration */ - pdev->dev_config = cfgidx; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetConfig -* Handle Get device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wLength != 1) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state ) - { - case USBD_STATE_ADDRESSED: - pdev->dev_default_config = 0; - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_default_config, - 1); - break; - - case USBD_STATE_CONFIGURED: - - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_config, - 1); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetStatus -* Handle Get Status request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - -#if ( USBD_SELF_POWERED == 1) - pdev->dev_config_status = USB_CONFIG_SELF_POWERED; -#else - pdev->dev_config_status = 0; -#endif - - if (pdev->dev_remote_wakeup) - { - pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; - } - - USBD_CtlSendData (pdev, - (uint8_t *)& pdev->dev_config_status, - 2); - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - - -/** -* @brief USBD_SetFeature -* Handle Set device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 1; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - -} - - -/** -* @brief USBD_ClrFeature -* Handle clear device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 0; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - -/** -* @brief USBD_ParseSetupRequest -* Copy buffer into setup structure -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) -{ - req->bmRequest = *(uint8_t *) (pdata); - req->bRequest = *(uint8_t *) (pdata + 1); - req->wValue = SWAPBYTE (pdata + 2); - req->wIndex = SWAPBYTE (pdata + 4); - req->wLength = SWAPBYTE (pdata + 6); - -} - -/** -* @brief USBD_CtlError -* Handle USB low level Error -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_CtlError( USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - USBD_LL_StallEP(pdev , 0x80); - USBD_LL_StallEP(pdev , 0); -} - - -/** - * @brief USBD_GetString - * Convert Ascii string into unicode one - * @param desc : descriptor buffer - * @param unicode : Formatted string buffer (unicode) - * @param len : descriptor length - * @retval None - */ -void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) -{ - uint8_t idx = 0; - - if (desc != NULL) - { - *len = USBD_GetLen(desc) * 2 + 2; - unicode[idx++] = *len; - unicode[idx++] = USB_DESC_TYPE_STRING; - - while (*desc != '\0') - { - unicode[idx++] = *desc++; - unicode[idx++] = 0x00; - } - } -} - -/** - * @brief USBD_GetLen - * return the string length - * @param buf : pointer to the ascii string buffer - * @retval string length - */ -static uint8_t USBD_GetLen(uint8_t *buf) -{ - uint8_t len = 0; - - while (*buf != '\0') - { - len++; - buf++; - } - - return len; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbdev/core/src/usbd_ioreq.c b/ports/stm32/usbdev/core/src/usbd_ioreq.c deleted file mode 100644 index 9e396ba5661bf..0000000000000 --- a/ports/stm32/usbdev/core/src/usbd_ioreq.c +++ /dev/null @@ -1,236 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.c - * @author MCD Application Team - * @version V2.0.0 - * @date 18-February-2014 - * @brief This file provides the IO requests APIs for control endpoints. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_IOREQ - * @brief control I/O requests module - * @{ - */ - -/** @defgroup USBD_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Functions - * @{ - */ - -/** -* @brief USBD_CtlSendData -* send data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_IN; - pdev->ep_in[0].total_length = len; - pdev->ep_in[0].rem_length = len; - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueSendData -* continue sending data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Start the next transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlPrepareRx -* receive data on the ctl pipe -* @param pdev: USB OTG device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_OUT; - pdev->ep_out[0].total_length = len; - pdev->ep_out[0].rem_length = len; - /* Start the transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueRx -* continue receive data on the ctl pipe -* @param pdev: USB OTG device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - return USBD_OK; -} -/** -* @brief USBD_CtlSendStatus -* send zero lzngth packet on the ctl pipe -* @param pdev: USB OTG device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) -{ - - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_IN; - - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, NULL, 0); - - return USBD_OK; -} - -/** -* @brief USBD_CtlReceiveStatus -* receive zero lzngth packet on the ctl pipe -* @param pdev: USB OTG device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_OUT; - - /* Start the transfer */ - USBD_LL_PrepareReceive ( pdev, - 0, - NULL, - 0); - - return USBD_OK; -} - - -/** -* @brief USBD_GetRxCount -* returns the received data length -* @param pdev: USB OTG device instance -* epnum: endpoint index -* @retval Rx Data blength -*/ -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) -{ - return USBD_LL_GetRxDataSize(pdev, ep_addr); -} - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h b/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h deleted file mode 100644 index 8cee530d06e5d..0000000000000 --- a/ports/stm32/usbhost/Class/AUDIO/Inc/usbh_audio.h +++ /dev/null @@ -1,581 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_audio.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_audio.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_AUDIO_H -#define __USBH_AUDIO_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_AUDIO_CLASS - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE - * @brief This file is the Header file for usbh_audio.c - * @{ - */ - - -/** @defgroup USBH_AUDIO_CORE_Exported_Types - * @{ - */ - -/* States for AUDIO State Machine */ -typedef enum -{ - AUDIO_INIT = 0, - AUDIO_IDLE, - AUDIO_CS_REQUESTS, - AUDIO_SET_DEFAULT_FEATURE_UNIT, - AUDIO_SET_INTERFACE, - AUDIO_SET_STREAMING_INTERFACE, - AUDIO_SET_CUR1, - AUDIO_GET_MIN, - AUDIO_GET_MAX, - AUDIO_GET_RES, - AUDIO_GET_CUR1, - AUDIO_SET_CUR2, - AUDIO_GET_CUR2, - AUDIO_SET_CUR3, - AUDIO_SET_INTERFACE0, - AUDIO_SET_INTERFACE1, - AUDIO_SET_INTERFACE2, - AUDIO_ISOC_OUT, - AUDIO_ISOC_IN, - AUDIO_ISOC_POLL, - AUDIO_ERROR, -} -AUDIO_StateTypeDef; - -typedef enum -{ - AUDIO_REQ_INIT = 1, - AUDIO_REQ_IDLE, - AUDIO_REQ_SET_DEFAULT_IN_INTERFACE, - AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE, - AUDIO_REQ_SET_IN_INTERFACE, - AUDIO_REQ_SET_OUT_INTERFACE, - AUDIO_REQ_CS_REQUESTS, -} -AUDIO_ReqStateTypeDef; - -typedef enum -{ - AUDIO_REQ_SET_VOLUME = 1, - AUDIO_REQ_SET_MUTE, - AUDIO_REQ_GET_CURR_VOLUME, - AUDIO_REQ_GET_MIN_VOLUME, - AUDIO_REQ_GET_MAX_VOLUME, - AUDIO_REQ_GET_VOLUME, - AUDIO_REQ_GET_RESOLUTION, - AUDIO_REQ_CS_IDLE, -} -AUDIO_CSReqStateTypeDef; - -typedef enum -{ - AUDIO_PLAYBACK_INIT = 1, - AUDIO_PLAYBACK_SET_EP, - AUDIO_PLAYBACK_SET_EP_FREQ, - AUDIO_PLAYBACK_PLAY, - AUDIO_PLAYBACK_IDLE, -} -AUDIO_PlayStateTypeDef; - -typedef enum -{ - VOLUME_UP = 1, - VOLUME_DOWN = 2, -} -AUDIO_VolumeCtrlTypeDef; - -typedef enum -{ - AUDIO_CONTROL_INIT = 1, - AUDIO_CONTROL_CHANGE, - AUDIO_CONTROL_IDLE, - AUDIO_CONTROL_VOLUME_UP, - AUDIO_CONTROL_VOLUME_DOWN, -} -AUDIO_ControlStateTypeDef; - - -typedef enum -{ - AUDIO_DATA_START_OUT = 1, - AUDIO_DATA_OUT, -} -AUDIO_ProcessingTypeDef; - -/* Structure for AUDIO process */ -typedef struct -{ - uint8_t Channels; - uint8_t Bits; - uint32_t SampleRate; -} -AUDIO_FormatTypeDef; - -typedef struct -{ - uint8_t Ep; - uint16_t EpSize; - uint8_t AltSettings; - uint8_t interface; - uint8_t valid; - uint16_t Poll; -} -AUDIO_STREAMING_IN_HandleTypeDef; - -typedef struct -{ - uint8_t Ep; - uint16_t EpSize; - uint8_t AltSettings; - uint8_t interface; - uint8_t valid; - uint16_t Poll; -} -AUDIO_STREAMING_OUT_HandleTypeDef; - - -typedef struct -{ - uint8_t mute; - uint32_t volumeMin; - uint32_t volumeMax; - uint32_t volume; - uint32_t resolution; -} -AUDIO_ControlAttributeTypeDef; - -typedef struct -{ - - uint8_t Ep; - uint16_t EpSize; - uint8_t interface; - uint8_t AltSettings; - uint8_t supported; - - uint8_t Pipe; - uint8_t Poll; - uint32_t timer ; - - uint8_t asociated_as; - uint8_t asociated_mixer; - uint8_t asociated_selector; - uint8_t asociated_feature; - uint8_t asociated_terminal; - uint8_t asociated_channels; - - uint32_t frequency; - uint8_t *buf; - uint8_t *cbuf; - uint32_t partial_ptr; - - uint32_t global_ptr; - uint16_t frame_length; - uint32_t total_length; - - AUDIO_ControlAttributeTypeDef attribute; -} -AUDIO_InterfaceStreamPropTypeDef; - -typedef struct -{ - - uint8_t Ep; - uint16_t EpSize; - uint8_t interface; - uint8_t supported; - - uint8_t Pipe; - uint8_t Poll; - uint32_t timer ; -} -AUDIO_InterfaceControlPropTypeDef; - - -#define AUDIO_MAX_AUDIO_STD_INTERFACE 0x05 -#define AUDIO_MAX_FREQ_SUPPORTED 0x05 -#define AUDIO_MAX_STREAMING_INTERFACE 0x05 -#define AUDIO_MAX_NUM_IN_TERMINAL 0x04 -#define AUDIO_MAX_NUM_OUT_TERMINAL 0x04 -#define AUDIO_MAX_NUM_FEATURE_UNIT 0x04 -#define AUDIO_MAX_NUM_MIXER_UNIT 0x04 -#define AUDIO_MAX_NUM_SELECTOR_UNIT 0x04 - -#define HEADPHONE_SUPPORTED 0x01 -#define MICROPHONE_SUPPORTED 0x02 -#define HEADSET_SUPPORTED 0x03 - - -/*Class-Specific AS(Audio Streaming) Interface Descriptor*/ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalLink; - uint8_t bDelay; - uint8_t wFormatTag[2]; -} -AUDIO_ASGeneralDescTypeDef; - -/*Class-Specific AS(Audio Streaming) Format Type Descriptor*/ -typedef struct -{ - uint8_t bLength; /*At to be deside*/ - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bFormatType; - uint8_t bNrChannels; - uint8_t bSubframeSize; - uint8_t bBitResolution; - uint8_t bSamFreqType; - uint8_t tSamFreq[][3]; -} -AUDIO_ASFormatTypeDescTypeDef; - -/*Class-Specific AS(Audio Streaming) Interface Descriptor*/ -typedef struct -{ - AUDIO_ASGeneralDescTypeDef *GeneralDesc; - AUDIO_ASFormatTypeDescTypeDef *FormatTypeDesc; -} -AUDIO_ASDescTypeDef; - -/* 4.3.2 Class-Specific AC Interface Descriptor */ - -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bcdADC[2]; - uint8_t wTotalLength[2]; - uint8_t bInCollection; - uint8_t baInterfaceNr[]; -} -AUDIO_HeaderDescTypeDef; - -/* 4.3.2.1 Input Terminal Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalID; - uint8_t wTerminalType[2]; - uint8_t bAssocTerminal; - uint8_t bNrChannels; - uint8_t wChannelConfig[2]; - uint8_t iChannelNames; - uint8_t iTerminal; -} -AUDIO_ITDescTypeDef; - -/* 4.3.2.2 Output Terminal Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bTerminalID; - uint8_t wTerminalType[2]; - uint8_t bAssocTerminal; - uint8_t bSourceID; - uint8_t iTerminal; -} -AUDIO_OTDescTypeDef; - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bSourceID; - uint8_t bControlSize; - uint8_t bmaControls[][2]; -} -AUDIO_FeatureDescTypeDef; - - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bNrInPins; - uint8_t bSourceID0; - uint8_t bSourceID1; - uint8_t bNrChannels; - uint8_t bmChannelsConfig[2]; - uint8_t iChannelsNames; - uint8_t bmaControls; - uint8_t iMixer; -} -AUDIO_MixerDescTypeDef; - - - -/* 4.3.2.3 Feature Descriptor */ -typedef struct -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubtype; - uint8_t bUnitID; - uint8_t bNrInPins; - uint8_t bSourceID0; - uint8_t iSelector; -} -AUDIO_SelectorDescTypeDef; - -/*Class-Specific AC(Audio Control) Interface Descriptor*/ -typedef struct -{ - AUDIO_HeaderDescTypeDef *HeaderDesc; - AUDIO_ITDescTypeDef *InputTerminalDesc [AUDIO_MAX_NUM_IN_TERMINAL]; - AUDIO_OTDescTypeDef *OutputTerminalDesc[AUDIO_MAX_NUM_OUT_TERMINAL]; - AUDIO_FeatureDescTypeDef *FeatureUnitDesc [AUDIO_MAX_NUM_FEATURE_UNIT]; - AUDIO_MixerDescTypeDef *MixerUnitDesc [AUDIO_MAX_NUM_MIXER_UNIT]; - AUDIO_SelectorDescTypeDef *SelectorUnitDesc [AUDIO_MAX_NUM_SELECTOR_UNIT]; -} -AUDIO_ACDescTypeDef; - -/*Class-Specific AC : Global descriptor*/ - -typedef struct -{ - AUDIO_ACDescTypeDef cs_desc; /* Only one control descriptor*/ - AUDIO_ASDescTypeDef as_desc[AUDIO_MAX_STREAMING_INTERFACE]; - - uint16_t ASNum; - uint16_t InputTerminalNum; - uint16_t OutputTerminalNum; - uint16_t FeatureUnitNum; - uint16_t SelectorUnitNum; - uint16_t MixerUnitNum; -} -AUDIO_ClassSpecificDescTypedef; - - -typedef struct _AUDIO_Process -{ - AUDIO_ReqStateTypeDef req_state; - AUDIO_CSReqStateTypeDef cs_req_state; - AUDIO_PlayStateTypeDef play_state; - AUDIO_ControlStateTypeDef control_state; - AUDIO_ProcessingTypeDef processing_state; - - AUDIO_STREAMING_IN_HandleTypeDef stream_in[AUDIO_MAX_AUDIO_STD_INTERFACE]; - AUDIO_STREAMING_OUT_HandleTypeDef stream_out[AUDIO_MAX_AUDIO_STD_INTERFACE]; - AUDIO_ClassSpecificDescTypedef class_desc; - - AUDIO_InterfaceStreamPropTypeDef headphone; - AUDIO_InterfaceStreamPropTypeDef microphone; - AUDIO_InterfaceControlPropTypeDef control; - uint16_t mem [8]; - uint8_t temp_feature; - uint8_t temp_channels; -} -AUDIO_HandleTypeDef; - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Defines - * @{ - */ - - -/*Audio Interface Subclass Codes*/ -#define AC_CLASS 0x01 - -/* A.2 Audio Interface Subclass Codes */ -#define USB_SUBCLASS_AUDIOCONTROL 0x01 -#define USB_SUBCLASS_AUDIOSTREAMING 0x02 -#define USB_SUBCLASS_MIDISTREAMING 0x03 - -#define USB_DESC_TYPE_CS_INTERFACE 0x24 -#define USB_DESC_TYPE_CS_ENDPOINT 0x25 - -/* A.5 Audio Class-Specific AC Interface Descriptor Subtypes */ -#define UAC_HEADER 0x01 -#define UAC_INPUT_TERMINAL 0x02 -#define UAC_OUTPUT_TERMINAL 0x03 -#define UAC_MIXER_UNIT 0x04 -#define UAC_SELECTOR_UNIT 0x05 -#define UAC_FEATURE_UNIT 0x06 -#define UAC_PROCESSING_UNIT 0x07 -#define UAC_EXTENSION_UNIT 0x08 - -/*Audio Class-Specific Endpoint Descriptor Subtypes*/ -#define EP_CONTROL_UNDEFINED 0x00 -#define SAMPLING_FREQ_CONTROL 0x01 -#define PITCH_CONTROL 0x02 - -/*Feature unit control selector*/ -#define FU_CONTROL_UNDEFINED 0x00 -#define MUTE_CONTROL 0x01 -#define VOLUME_CONTROL 0x02 -#define BASS_CONTROL 0x03 -#define MID_CONTROL 0x04 -#define TREBLE_CONTROL 0x05 -#define GRAPHIC_EQUALIZER_CONTROL 0x06 -#define AUTOMATIC_GAIN_CONTROL 0x07 -#define DELAY_CONTROL 0x08 -#define BASS_BOOST_CONTROL 0x09 -#define LOUDNESS_CONTROL 0x0A - -/*Terminal control selector*/ -#define TE_CONTROL_UNDEFINED 0x00 -#define COPY_PROTECT_CONTROL 0x01 - - -/* A.6 Audio Class-Specific AS Interface Descriptor Subtypes */ -#define UAC_AS_GENERAL 0x01 -#define UAC_FORMAT_TYPE 0x02 -#define UAC_FORMAT_SPECIFIC 0x03 - -/* A.8 Audio Class-Specific Endpoint Descriptor Subtypes */ -#define UAC_EP_GENERAL 0x01 - -/* A.9 Audio Class-Specific Request Codes */ -#define UAC_SET_ 0x00 -#define UAC_GET_ 0x80 - -#define UAC__CUR 0x1 -#define UAC__MIN 0x2 -#define UAC__MAX 0x3 -#define UAC__RES 0x4 -#define UAC__MEM 0x5 - -#define UAC_SET_CUR (UAC_SET_ | UAC__CUR) -#define UAC_GET_CUR (UAC_GET_ | UAC__CUR) -#define UAC_SET_MIN (UAC_SET_ | UAC__MIN) -#define UAC_GET_MIN (UAC_GET_ | UAC__MIN) -#define UAC_SET_MAX (UAC_SET_ | UAC__MAX) -#define UAC_GET_MAX (UAC_GET_ | UAC__MAX) -#define UAC_SET_RES (UAC_SET_ | UAC__RES) -#define UAC_GET_RES (UAC_GET_ | UAC__RES) -#define UAC_SET_MEM (UAC_SET_ | UAC__MEM) -#define UAC_GET_MEM (UAC_GET_ | UAC__MEM) - -#define UAC_GET_STAT 0xff - -/* MIDI - A.1 MS Class-Specific Interface Descriptor Subtypes */ -#define UAC_MS_HEADER 0x01 -#define UAC_MIDI_IN_JACK 0x02 -#define UAC_MIDI_OUT_JACK 0x03 - -/* MIDI - A.1 MS Class-Specific Endpoint Descriptor Subtypes */ -#define UAC_MS_GENERAL 0x01 - -/* Terminals - 2.1 USB Terminal Types */ -#define UAC_TERMINAL_UNDEFINED 0x100 -#define UAC_TERMINAL_STREAMING 0x101 -#define UAC_TERMINAL_VENDOR_SPEC 0x1FF - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef AUDIO_Class; -#define USBH_AUDIO_CLASS &AUDIO_Class -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_AUDIO_SetFrequency (USBH_HandleTypeDef *phost, - uint16_t sample_rate, - uint8_t channel_num, - uint8_t data_width); - -USBH_StatusTypeDef USBH_AUDIO_Play (USBH_HandleTypeDef *phost, uint8_t *buf, uint32_t length); -USBH_StatusTypeDef USBH_AUDIO_Stop (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_Suspend (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_Resume (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_AUDIO_SetVolume (USBH_HandleTypeDef *phost, AUDIO_VolumeCtrlTypeDef volume_ctl); -USBH_StatusTypeDef USBH_AUDIO_ChangeOutBuffer (USBH_HandleTypeDef *phost, uint8_t *buf); -int32_t USBH_AUDIO_GetOutOffset (USBH_HandleTypeDef *phost); - -void USBH_AUDIO_FrequencySet(USBH_HandleTypeDef *phost); -/** - * @} - */ - - -#endif /* __USBH_AUDIO_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c b/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c deleted file mode 100644 index b9677b6c2b4d5..0000000000000 --- a/ports/stm32/usbhost/Class/AUDIO/Src/usbh_audio.c +++ /dev/null @@ -1,1994 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_audio.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the AC Layer Handlers for USB Host AC class. - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_audio.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_AUDIO_CLASS - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE - * @brief This file includes HID Layer Handlers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_AUDIO_CORE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_AUDIO_CORE_Private_FunctionPrototypes - * @{ - */ - -static USBH_StatusTypeDef USBH_AUDIO_InterfaceInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_InterfaceDeInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_Process(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_SOFProcess(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_ClassRequest(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_CSRequest(USBH_HandleTypeDef *phost, - uint8_t feature, - uint8_t channel); - -static USBH_StatusTypeDef USBH_AUDIO_HandleCSRequest(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingIN(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingOUT(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_FindHIDControl(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_ParseCSDescriptors(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_AUDIO_BuildHeadphonePath(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_BuildMicrophonePath(USBH_HandleTypeDef *phost); -int32_t USBH_AUDIO_FindLinkedUnitIN(USBH_HandleTypeDef *phost, uint8_t UnitID); -int32_t USBH_AUDIO_FindLinkedUnitOUT(USBH_HandleTypeDef *phost, uint8_t UnitID); - - - -static USBH_StatusTypeDef ParseCSDescriptors(AUDIO_ClassSpecificDescTypedef *class_desc, - uint8_t ac_subclass, - uint8_t *pdesc); - - -static USBH_StatusTypeDef USBH_AUDIO_Transmit (USBH_HandleTypeDef *phost); - - -static USBH_StatusTypeDef USBH_AC_SetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetMin(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetMax(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AC_GetRes(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length); - -static USBH_StatusTypeDef USBH_AUDIO_SetEndpointControls(USBH_HandleTypeDef *phost, - uint8_t Ep, - uint8_t *buff); - -static USBH_StatusTypeDef AUDIO_SetVolume (USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel, uint16_t volume); - -static USBH_StatusTypeDef USBH_AUDIO_InputStream (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_OutputStream (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_Control (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_AUDIO_SetControlAttribute (USBH_HandleTypeDef *phost, uint8_t attrib); -static int32_t USBH_AUDIO_FindLinkedUnit(USBH_HandleTypeDef *phost, uint8_t UnitID); - -USBH_ClassTypeDef AUDIO_Class = -{ - "AUDIO", - AC_CLASS, - USBH_AUDIO_InterfaceInit, - USBH_AUDIO_InterfaceDeInit, - USBH_AUDIO_ClassRequest, - USBH_AUDIO_Process, - USBH_AUDIO_SOFProcess, - NULL, -}; - -/** - * @} - */ - -/** @defgroup USBH_AUDIO_CORE_Private_Functions - * @{ - */ - -/** - * @brief USBH_AUDIO_InterfaceInit - * The function init the Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_InterfaceInit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_FAIL ; - USBH_StatusTypeDef out_status, in_status ; - AUDIO_HandleTypeDef *AUDIO_Handle; - uint8_t interface, index; - uint16_t ep_size_out = 0; - uint16_t ep_size_in = 0; - - interface = USBH_FindInterface(phost, AC_CLASS, USB_SUBCLASS_AUDIOCONTROL, 0x00); - - if(interface == 0xFF) /* Not Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - status = USBH_FAIL; - } - else - { - - - phost->pActiveClass->pData = (AUDIO_HandleTypeDef *)USBH_malloc (sizeof(AUDIO_HandleTypeDef)); - AUDIO_Handle = phost->pActiveClass->pData; - USBH_memset(AUDIO_Handle, 0, sizeof(AUDIO_HandleTypeDef)); - - - /* 1st Step: Find Audio Interfaces */ - out_status = USBH_AUDIO_FindAudioStreamingIN (phost); - - in_status = USBH_AUDIO_FindAudioStreamingOUT(phost); - - if((out_status == USBH_FAIL) && (in_status == USBH_FAIL)) - { - USBH_DbgLog ("%s class configuration not supported.", phost->pActiveClass->Name); - } - else - { - /* 2nd Step: Select Audio Streaming Interfaces with largest endpoint size : default behavior*/ - for (index = 0; index < AUDIO_MAX_AUDIO_STD_INTERFACE; index ++) - { - if( AUDIO_Handle->stream_out[index].valid == 1) - { - if(ep_size_out < AUDIO_Handle->stream_out[index].EpSize) - { - ep_size_out = AUDIO_Handle->stream_out[index].EpSize; - AUDIO_Handle->headphone.interface = AUDIO_Handle->stream_out[index].interface; - AUDIO_Handle->headphone.AltSettings = AUDIO_Handle->stream_out[index].AltSettings; - AUDIO_Handle->headphone.Ep = AUDIO_Handle->stream_out[index].Ep; - AUDIO_Handle->headphone.EpSize = AUDIO_Handle->stream_out[index].EpSize; - AUDIO_Handle->headphone.Poll = AUDIO_Handle->stream_out[index].Poll; - AUDIO_Handle->headphone.supported = 1; - } - } - - if( AUDIO_Handle->stream_in[index].valid == 1) - { - if(ep_size_in < AUDIO_Handle->stream_in[index].EpSize) - { - ep_size_in = AUDIO_Handle->stream_in[index].EpSize; - AUDIO_Handle->microphone.interface = AUDIO_Handle->stream_in[index].interface; - AUDIO_Handle->microphone.AltSettings = AUDIO_Handle->stream_in[index].AltSettings; - AUDIO_Handle->microphone.Ep = AUDIO_Handle->stream_in[index].Ep; - AUDIO_Handle->microphone.EpSize = AUDIO_Handle->stream_in[index].EpSize; - AUDIO_Handle->microphone.Poll = AUDIO_Handle->stream_out[index].Poll; - AUDIO_Handle->microphone.supported = 1; - } - } - } - - if(USBH_AUDIO_FindHIDControl(phost) == USBH_OK) - { - AUDIO_Handle->control.supported = 1; - } - - /* 3rd Step: Find and Parse Audio interfaces */ - USBH_AUDIO_ParseCSDescriptors (phost); - - - /* 4th Step: Open the Audio streaming pipes*/ - if(AUDIO_Handle->headphone.supported == 1) - { - USBH_AUDIO_BuildHeadphonePath (phost); - - AUDIO_Handle->headphone.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->headphone.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->headphone.Pipe, - AUDIO_Handle->headphone.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_ISOC, - AUDIO_Handle->headphone.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->headphone.Pipe, 0); - - } - - if(AUDIO_Handle->microphone.supported == 1) - { - USBH_AUDIO_BuildMicrophonePath (phost); - AUDIO_Handle->microphone.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->microphone.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->microphone.Pipe, - AUDIO_Handle->microphone.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_ISOC, - AUDIO_Handle->microphone.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->microphone.Pipe, 0); - } - - if(AUDIO_Handle->control.supported == 1) - { - AUDIO_Handle->control.Pipe = USBH_AllocPipe(phost, AUDIO_Handle->control.Ep); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - AUDIO_Handle->control.Pipe, - AUDIO_Handle->control.Ep, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - AUDIO_Handle->control.EpSize); - - USBH_LL_SetToggle (phost, AUDIO_Handle->control.Pipe, 0); - - } - - AUDIO_Handle->req_state = AUDIO_REQ_INIT; - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - - status = USBH_OK; - } - } - return status; -} - - - -/** - * @brief USBH_AUDIO_InterfaceDeInit - * The function DeInit the Pipes used for the Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if(AUDIO_Handle->microphone.Pipe != 0x00) - { - USBH_ClosePipe (phost, AUDIO_Handle->microphone.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->microphone.Pipe); - AUDIO_Handle->microphone.Pipe = 0; /* Reset the pipe as Free */ - } - - if( AUDIO_Handle->headphone.Pipe != 0x00) - { - USBH_ClosePipe(phost, AUDIO_Handle->headphone.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->headphone.Pipe); - AUDIO_Handle->headphone.Pipe = 0; /* Reset the pipe as Free */ - } - - if( AUDIO_Handle->control.Pipe != 0x00) - { - USBH_ClosePipe(phost, AUDIO_Handle->control.Pipe); - USBH_FreePipe (phost, AUDIO_Handle->control.Pipe); - AUDIO_Handle->control.Pipe = 0; /* Reset the pipe as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - return USBH_OK ; -} - -/** - * @brief USBH_AUDIO_ClassRequest - * The function is responsible for handling Standard requests - * for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_ClassRequest(USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_BUSY; - - /* Switch AUDIO REQ state machine */ - switch (AUDIO_Handle->req_state) - { - case AUDIO_REQ_INIT: - case AUDIO_REQ_SET_DEFAULT_IN_INTERFACE: - if(AUDIO_Handle->microphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->microphone.interface, - 0); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE; - } - - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case AUDIO_REQ_SET_DEFAULT_OUT_INTERFACE: - if(AUDIO_Handle->headphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->headphone.interface, - 0); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_CS_REQUESTS; - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; - - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - } - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_CS_REQUESTS; - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case AUDIO_REQ_CS_REQUESTS: - if(USBH_AUDIO_HandleCSRequest (phost) == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_IN_INTERFACE; - } - break; - - case AUDIO_REQ_SET_IN_INTERFACE: - if(AUDIO_Handle->microphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->microphone.interface, - AUDIO_Handle->microphone.AltSettings); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_OUT_INTERFACE; - } - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_SET_OUT_INTERFACE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - case AUDIO_REQ_SET_OUT_INTERFACE: - if(AUDIO_Handle->headphone.supported == 1) - { - req_status = USBH_SetInterface(phost, - AUDIO_Handle->headphone.interface, - AUDIO_Handle->headphone.AltSettings); - - if(req_status == USBH_OK) - { - AUDIO_Handle->req_state = AUDIO_REQ_IDLE; - } - - } - else - { - AUDIO_Handle->req_state = AUDIO_REQ_IDLE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - case AUDIO_REQ_IDLE: - AUDIO_Handle->play_state = AUDIO_PLAYBACK_INIT; - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - default: - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_CSRequest - * The function is responsible for handling AC Specific requests for a specific feature and channel - * for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_CSRequest(USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_BUSY; - - /* Switch AUDIO REQ state machine */ - switch (AUDIO_Handle->cs_req_state) - { - case AUDIO_REQ_GET_VOLUME: - req_status = USBH_AC_GetCur(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_MIN_VOLUME; - AUDIO_Handle->headphone.attribute.volume = LE16(&(AUDIO_Handle->mem[0])); - } - break; - - case AUDIO_REQ_GET_MIN_VOLUME: - req_status = USBH_AC_GetMin(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_MAX_VOLUME; - AUDIO_Handle->headphone.attribute.volumeMin = LE16(&AUDIO_Handle->mem[0]); - } - break; - - case AUDIO_REQ_GET_MAX_VOLUME: - req_status = USBH_AC_GetMax(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_RESOLUTION; - AUDIO_Handle->headphone.attribute.volumeMax = LE16(&AUDIO_Handle->mem[0]); - - if (AUDIO_Handle->headphone.attribute.volumeMax < AUDIO_Handle->headphone.attribute.volumeMin) - { - AUDIO_Handle->headphone.attribute.volumeMax = 0xFF00; - } - } - break; - - case AUDIO_REQ_GET_RESOLUTION: - req_status = USBH_AC_GetRes(phost, - UAC_FEATURE_UNIT, /* subtype */ - feature, /* feature */ - VOLUME_CONTROL, /* Selector */ - channel, /* channel */ - 0x02); /* length */ - if(req_status != USBH_BUSY) - { - AUDIO_Handle->cs_req_state = AUDIO_REQ_CS_IDLE; - AUDIO_Handle->headphone.attribute.resolution = LE16(&AUDIO_Handle->mem[0]); - } - break; - - - case AUDIO_REQ_CS_IDLE: - status = USBH_OK; - default: - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_HandleCSRequest - * The function is responsible for handling AC Specific requests for a all features - * and associated channels for Audio class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_HandleCSRequest(USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef cs_status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - cs_status = USBH_AUDIO_CSRequest(phost, - AUDIO_Handle->temp_feature, - AUDIO_Handle->temp_channels); - - if(cs_status != USBH_BUSY) - { - - if(AUDIO_Handle->temp_channels == 1) - { - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = 0; - status = USBH_OK; - } - else - { - AUDIO_Handle->temp_channels--; - } - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - return status; -} - -/** - * @brief USBH_AUDIO_Process - * The function is for managing state machine for Audio data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if(AUDIO_Handle->headphone.supported == 1) - { - USBH_AUDIO_OutputStream (phost); - } - - if(AUDIO_Handle->microphone.supported == 1) - { - USBH_AUDIO_InputStream (phost); - } - - return status; -} - -/** - * @brief USBH_AUDIO_SOFProcess - * The function is for managing the SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SOFProcess (USBH_HandleTypeDef *phost) -{ - return USBH_OK; -} -/** - * @brief Find IN Audio Streaming interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingIN(USBH_HandleTypeDef *phost) -{ - uint8_t interface, alt_settings; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOSTREAMING IN interface */ - alt_settings = 0; - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == AC_CLASS)&& - (phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass == USB_SUBCLASS_AUDIOSTREAMING)) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - AUDIO_Handle->stream_in[alt_settings].Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->stream_in[alt_settings].EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->stream_in[alt_settings].interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->stream_in[alt_settings].AltSettings = phost->device.CfgDesc.Itf_Desc[interface].bAlternateSetting; - AUDIO_Handle->stream_in[alt_settings].Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->stream_in[alt_settings].valid = 1; - alt_settings++; - } - } - } - - if(alt_settings > 0) - { - status = USBH_OK; - } - - return status; -} - -/** - * @brief Find OUT Audio Streaming interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindAudioStreamingOUT(USBH_HandleTypeDef *phost) -{ - uint8_t interface, alt_settings; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOSTREAMING IN interface */ - alt_settings = 0; - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == AC_CLASS)&& - (phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass == USB_SUBCLASS_AUDIOSTREAMING)) - { - if(((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) == 0x00)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - AUDIO_Handle->stream_out[alt_settings].Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->stream_out[alt_settings].EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->stream_out[alt_settings].interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->stream_out[alt_settings].AltSettings = phost->device.CfgDesc.Itf_Desc[interface].bAlternateSetting; - AUDIO_Handle->stream_out[alt_settings].Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->stream_out[alt_settings].valid = 1; - alt_settings++; - } - } - } - - if(alt_settings > 0) - { - status = USBH_OK; - } - - return status; -} - -/** - * @brief Find HID Control interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_FindHIDControl(USBH_HandleTypeDef *phost) -{ - uint8_t interface; - USBH_StatusTypeDef status = USBH_FAIL ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Look For AUDIOCONTROL interface */ - interface = USBH_FindInterface(phost, AC_CLASS, USB_SUBCLASS_AUDIOCONTROL, 0xFF); - if(interface != 0xFF) - { - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == 0x03)&& /*HID*/ - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize > 0)) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) == 0x80) - { - AUDIO_Handle->control.Ep = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - AUDIO_Handle->control.EpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - AUDIO_Handle->control.interface = phost->device.CfgDesc.Itf_Desc[interface].bInterfaceNumber; - AUDIO_Handle->control.Poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bInterval; - AUDIO_Handle->control.supported = 1; - status = USBH_OK; - break; - } - } - } - } - return status; -} - -/** - * @brief Parse AC and interfaces Descriptors - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_ParseCSDescriptors(USBH_HandleTypeDef *phost) -{ - USBH_DescHeader_t *pdesc ; - uint16_t ptr; - int8_t itf_index = 0; - int8_t itf_number = 0; - int8_t alt_setting; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - pdesc = (USBH_DescHeader_t *)(phost->device.CfgDesc_Raw); - ptr = USB_LEN_CFG_DESC; - - AUDIO_Handle->class_desc.FeatureUnitNum = 0; - AUDIO_Handle->class_desc.InputTerminalNum = 0; - AUDIO_Handle->class_desc.OutputTerminalNum = 0; - AUDIO_Handle->class_desc.ASNum = 0; - - while(ptr < phost->device.CfgDesc.wTotalLength) - { - pdesc = USBH_GetNextDesc((void *)pdesc, &ptr); - - switch (pdesc->bDescriptorType) - { - - case USB_DESC_TYPE_INTERFACE: - itf_number = *((uint8_t *)pdesc + 2); - alt_setting = *((uint8_t *)pdesc + 3); - itf_index = USBH_FindInterfaceIndex (phost, itf_number, alt_setting); - break; - - case USB_DESC_TYPE_CS_INTERFACE: - if(itf_number <= phost->device.CfgDesc.bNumInterfaces) - { - - ParseCSDescriptors(&AUDIO_Handle->class_desc, - phost->device.CfgDesc.Itf_Desc[itf_index].bInterfaceSubClass, - (uint8_t *)pdesc); - } - break; - - default: - break; - } - } - return USBH_OK; -} - -/** - * @brief Parse AC interfaces - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef ParseCSDescriptors(AUDIO_ClassSpecificDescTypedef *class_desc, - uint8_t ac_subclass, - uint8_t *pdesc) -{ - if(ac_subclass == USB_SUBCLASS_AUDIOCONTROL) - { - switch(pdesc[2]) - { - case UAC_HEADER: - class_desc->cs_desc.HeaderDesc = (AUDIO_HeaderDescTypeDef *)pdesc; - break; - - case UAC_INPUT_TERMINAL: - class_desc->cs_desc.InputTerminalDesc[class_desc->InputTerminalNum++] = (AUDIO_ITDescTypeDef*) pdesc; - break; - - case UAC_OUTPUT_TERMINAL: - class_desc->cs_desc.OutputTerminalDesc[class_desc->OutputTerminalNum++] = (AUDIO_OTDescTypeDef*) pdesc; - break; - - case UAC_FEATURE_UNIT: - class_desc->cs_desc.FeatureUnitDesc[class_desc->FeatureUnitNum++] = (AUDIO_FeatureDescTypeDef*) pdesc; - break; - - case UAC_SELECTOR_UNIT: - class_desc->cs_desc.SelectorUnitDesc[class_desc->SelectorUnitNum++] = (AUDIO_SelectorDescTypeDef*) pdesc; - break; - - case UAC_MIXER_UNIT: - class_desc->cs_desc.MixerUnitDesc[class_desc->MixerUnitNum++] = (AUDIO_MixerDescTypeDef*) pdesc; - break; - - default: - break; - } - } - else if(ac_subclass == USB_SUBCLASS_AUDIOSTREAMING) - { - switch(pdesc[2]) - { - case UAC_AS_GENERAL: - class_desc->as_desc[class_desc->ASNum].GeneralDesc = (AUDIO_ASGeneralDescTypeDef*) pdesc; - break; - case UAC_FORMAT_TYPE: - class_desc->as_desc[class_desc->ASNum++].FormatTypeDesc = (AUDIO_ASFormatTypeDescTypeDef*) pdesc; - break; - default: - break; - } - } - - return USBH_OK; -} - - -/** - * @brief Link a Unit to next associated one - * @param phost: Host handle - * @param UnitID: Unit identifer - * @retval UnitID, Index and Type of the assicated Unit - */ -static int32_t USBH_AUDIO_FindLinkedUnit(USBH_HandleTypeDef *phost, uint8_t UnitID) -{ - uint8_t Index; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /* Find Feature Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.FeatureUnitNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[Index]->bSourceID == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_FEATURE_UNIT << 8) | Index); - } - } - - /* Find Mixer Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.MixerUnitNum; Index ++) - { - if((AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bSourceID0 == UnitID)|| - (AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bSourceID1 == UnitID)) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.MixerUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_MIXER_UNIT << 8) | Index); - } - } - - - /* Find Selector Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.SelectorUnitNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.SelectorUnitDesc[Index]->bSourceID0 == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.SelectorUnitDesc[Index]->bUnitID; - - return ((UnitID << 16) | (UAC_SELECTOR_UNIT << 8) | Index); - } - } - - - /* Find OT Unit */ - for(Index = 0; Index < AUDIO_Handle->class_desc.OutputTerminalNum; Index ++) - { - if(AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->bSourceID == UnitID) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->bTerminalID; - - return ((UnitID << 16) | (UAC_OUTPUT_TERMINAL << 8) | Index); - } - } - - /* No associated Unit found */ - return -1; -} - -/** - * @brief Build full path for Microphone device - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_BuildMicrophonePath(USBH_HandleTypeDef *phost) -{ - uint8_t UnitID = 0, Type, Index; - uint32_t value; - uint8_t terminalIndex; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /*Find microphone IT*/ - for(terminalIndex = 0; terminalIndex < AUDIO_Handle->class_desc.InputTerminalNum; terminalIndex++) - { - if(LE16(AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->wTerminalType) == 0x201) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bTerminalID; - AUDIO_Handle->microphone.asociated_channels = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bNrChannels; - break; - } - } - - do - { - value = USBH_AUDIO_FindLinkedUnit(phost, UnitID); - Index = value & 0xFF; - Type = (value >> 8) & 0xFF; - UnitID = (value >> 16) & 0xFF; - - switch (Type) - { - case UAC_FEATURE_UNIT: - AUDIO_Handle->microphone.asociated_feature = Index; - break; - - case UAC_MIXER_UNIT: - AUDIO_Handle->microphone.asociated_mixer = Index; - break; - - case UAC_SELECTOR_UNIT: - AUDIO_Handle->microphone.asociated_selector = Index; - break; - - case UAC_OUTPUT_TERMINAL: - AUDIO_Handle->microphone.asociated_terminal = Index; - break; - } - } - while ((Type != UAC_OUTPUT_TERMINAL) && (value > 0)); - - - - return USBH_OK; -} - -/** - * @brief Build full path for Headphone device - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_BuildHeadphonePath(USBH_HandleTypeDef *phost) -{ - uint8_t UnitID = 0, Type, Index; - uint32_t value; - uint8_t terminalIndex; - AUDIO_HandleTypeDef *AUDIO_Handle; - - AUDIO_Handle = phost->pActiveClass->pData; - - /*Find association betwen audio streaming and microphone*/ - for(terminalIndex = 0; terminalIndex < AUDIO_Handle->class_desc.InputTerminalNum; terminalIndex++) - { - if(LE16(AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->wTerminalType) == 0x101) - { - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bTerminalID; - AUDIO_Handle->headphone.asociated_channels = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[terminalIndex]->bNrChannels; - break; - } - } - - for(Index = 0; Index < AUDIO_Handle->class_desc.ASNum; Index++) - { - if(AUDIO_Handle->class_desc.as_desc[Index].GeneralDesc->bTerminalLink == UnitID) - { - AUDIO_Handle->headphone.asociated_as = Index; - break; - } - } - - do - { - value = USBH_AUDIO_FindLinkedUnit(phost, UnitID); - Index = value & 0xFF; - Type = (value >> 8) & 0xFF; - UnitID = (value >> 16) & 0xFF; - - switch (Type) - { - case UAC_FEATURE_UNIT: - AUDIO_Handle->headphone.asociated_feature = Index; - break; - - case UAC_MIXER_UNIT: - AUDIO_Handle->headphone.asociated_mixer = Index; - break; - - case UAC_SELECTOR_UNIT: - AUDIO_Handle->headphone.asociated_selector = Index; - break; - - case UAC_OUTPUT_TERMINAL: - AUDIO_Handle->headphone.asociated_terminal = Index; - if(LE16(AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[Index]->wTerminalType) != 0x103) - { - return USBH_OK; - } - break; - } - } - while ((Type != UAC_OUTPUT_TERMINAL) && (value > 0)); - - return USBH_FAIL; -} - - -/** - * @brief Handle Set Cur request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_SetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue,wIndex,wLength; - uint8_t UnitID,InterfaceNum; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - } - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_SET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Get Cur request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetCur(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0,wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - - -/** - * @brief Handle Get Max request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetMax(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_MAX; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - - - -/** - * @brief Handle Get Res request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetRes(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_RES; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Get Min request - * @param phost: Host handle - * @param subtype: subtype index - * @param feature: feature index - * @param controlSelector: control code - * @param channel: channel index - * @param length: Command length - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AC_GetMin(USBH_HandleTypeDef *phost, - uint8_t subtype, - uint8_t feature, - uint8_t controlSelector, - uint8_t channel, - uint16_t length) -{ - uint16_t wValue = 0, wIndex = 0, wLength = 0; - uint8_t UnitID = 0, InterfaceNum = 0; - AUDIO_HandleTypeDef *AUDIO_Handle; - AUDIO_Handle = phost->pActiveClass->pData; - - switch(subtype) - { - case UAC_INPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.InputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - AUDIO_Handle->mem[0] = 0x00; - - wLength = 1; - break; - case UAC_FEATURE_UNIT: - UnitID = AUDIO_Handle->class_desc.cs_desc.FeatureUnitDesc[feature]->bUnitID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - /*holds the CS(control selector ) and CN (channel number)*/ - wValue = (controlSelector << 8) | channel; - wLength = length; - break; - - case UAC_OUTPUT_TERMINAL: - UnitID = AUDIO_Handle->class_desc.cs_desc.OutputTerminalDesc[0]->bTerminalID; - InterfaceNum = 0; /*Always zero Control Interface */ - wIndex = ( UnitID << 8 ) | InterfaceNum ; - wValue = (COPY_PROTECT_CONTROL << 8 ) ; - wLength = 1; - break; - } - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_GET_MIN; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)(AUDIO_Handle->mem) , wLength )); - -} - -/** - * @brief Handle Set Endpoint Controls Request - * @param phost: Host handle - * @param Ep: Endpoint address - * @param buf: pointer to data - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SetEndpointControls(USBH_HandleTypeDef *phost, - uint8_t Ep, - uint8_t *buff) -{ - uint16_t wValue, wIndex, wLength; - - - wValue = SAMPLING_FREQ_CONTROL << 8; - wIndex = Ep; - wLength = 3; /*length of the frequency parameter*/ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_ENDPOINT | \ - USB_REQ_TYPE_CLASS; - - phost->Control.setup.b.bRequest = UAC_SET_CUR; - phost->Control.setup.b.wValue.w = wValue; - phost->Control.setup.b.wIndex.w = wIndex; - phost->Control.setup.b.wLength.w = wLength; - - return(USBH_CtlReq(phost, (uint8_t *)buff, wLength )); - -} - -/** - * @brief Handle Input stream process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_InputStream (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - - return status; -} - -/** - * @brief Handle HID Control process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Control (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - uint16_t attribute = 0; - - - switch(AUDIO_Handle->control_state) - { - case AUDIO_CONTROL_INIT: - if((phost->Timer & 1) == 0) - { - AUDIO_Handle->control.timer = phost->Timer; - USBH_InterruptReceiveData(phost, - (uint8_t *)(AUDIO_Handle->mem), - AUDIO_Handle->control.EpSize, - AUDIO_Handle->control.Pipe); - - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - - AUDIO_Handle->control_state = AUDIO_CONTROL_CHANGE ; - } - break; - case AUDIO_CONTROL_CHANGE: - if(USBH_LL_GetURBState(phost , AUDIO_Handle->control.Pipe) == USBH_URB_DONE) - { - attribute = LE16(&AUDIO_Handle->mem[0]); - if(USBH_AUDIO_SetControlAttribute (phost, attribute) == USBH_BUSY) - { - break; - } - } - - if(( phost->Timer - AUDIO_Handle->control.timer) >= AUDIO_Handle->control.Poll) - { - AUDIO_Handle->control.timer = phost->Timer; - - USBH_InterruptReceiveData(phost, - (uint8_t *)(AUDIO_Handle->mem), - AUDIO_Handle->control.EpSize, - AUDIO_Handle->control.Pipe); - - } - break; - - case AUDIO_CONTROL_VOLUME_UP: - if( USBH_AUDIO_SetControlAttribute (phost, 1) == USBH_OK) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - status = USBH_OK; - } - break; - - case AUDIO_CONTROL_VOLUME_DOWN: - if( USBH_AUDIO_SetControlAttribute (phost, 2) == USBH_OK) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - status = USBH_OK; - } - break; - - case AUDIO_CONTROL_IDLE: - default: - break; - } - - return status; -} - -/** - * @brief Handle Output stream process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_OutputStream (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - uint8_t *buff; - - - switch(AUDIO_Handle->play_state) - { - case AUDIO_PLAYBACK_INIT: - - if( AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bSamFreqType == 0) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP_FREQ; - } - else - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - break; - - case AUDIO_PLAYBACK_SET_EP_FREQ: - - buff = (uint8_t*)AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[0]; - - status = USBH_AUDIO_SetEndpointControls(phost, AUDIO_Handle->headphone.Ep, buff); - if(status == USBH_OK) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - } - break; - - case AUDIO_PLAYBACK_SET_EP: - buff = (uint8_t *)&AUDIO_Handle->headphone.frequency; - status = USBH_AUDIO_SetEndpointControls(phost,AUDIO_Handle->headphone.Ep, buff); - if(status == USBH_OK) - { - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - USBH_AUDIO_FrequencySet(phost); - } - break; - case AUDIO_PLAYBACK_IDLE: -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - status = USBH_OK; - break; - - case AUDIO_PLAYBACK_PLAY: - USBH_AUDIO_Transmit(phost); - status = USBH_OK; - break; - - default: - break; - } - - return status; -} - -/** - * @brief Handle Transmission process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_Transmit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - switch(AUDIO_Handle->processing_state) - { - case AUDIO_DATA_START_OUT: - /* Sync with start of Even Frame */ - if((phost->Timer & 1) == 0) - { - AUDIO_Handle->headphone.timer = phost->Timer; - AUDIO_Handle->processing_state = AUDIO_DATA_OUT; - USBH_IsocSendData(phost, - AUDIO_Handle->headphone.buf, - AUDIO_Handle->headphone.frame_length, - AUDIO_Handle->headphone.Pipe); - - AUDIO_Handle->headphone.partial_ptr = AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.global_ptr = AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.cbuf = AUDIO_Handle->headphone.buf; - - } - break; - - case AUDIO_DATA_OUT: - if((USBH_LL_GetURBState(phost , AUDIO_Handle->headphone.Pipe) == USBH_URB_DONE)&& - (( phost->Timer - AUDIO_Handle->headphone.timer) >= AUDIO_Handle->headphone.Poll)) - { - AUDIO_Handle->headphone.timer = phost->Timer; - - if(AUDIO_Handle->control.supported == 1) - { - USBH_AUDIO_Control (phost); - } - - if(AUDIO_Handle->headphone.global_ptr <= AUDIO_Handle->headphone.total_length) - { - USBH_IsocSendData(phost, - AUDIO_Handle->headphone.cbuf, - AUDIO_Handle->headphone.frame_length, - AUDIO_Handle->headphone.Pipe); - - AUDIO_Handle->headphone.cbuf += AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.partial_ptr += AUDIO_Handle->headphone.frame_length; - AUDIO_Handle->headphone.global_ptr += AUDIO_Handle->headphone.frame_length; - } - else - { - AUDIO_Handle->headphone.partial_ptr = 0xFFFFFFFF; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - } - } - break; - } - return status; -} - -/** - * @brief USBH_AUDIO_SetFrequency - * Set Audio sampling parameters - * @param phost: Host handle - * @param SampleRate: Sample Rate - * @param NbrChannels: Number of Channels - * @param BitPerSample: Bit Per Sample - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_SetFrequency (USBH_HandleTypeDef *phost, - uint16_t SampleRate, - uint8_t NbrChannels, - uint8_t BitPerSample) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - AUDIO_HandleTypeDef *AUDIO_Handle; - uint8_t index; - uint8_t change_freq = FALSE; - uint32_t freq_min, freq_max; - uint8_t num_supported_freq; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - - if(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bSamFreqType == 0) - { - freq_min = LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[0]); - freq_max = LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[1]); - - if(( SampleRate >= freq_min)&& (SampleRate <= freq_max)) - { - change_freq = TRUE; - } - } - else - { - - num_supported_freq = (AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->bLength - 8)/3; - - - for(index = 0; index < num_supported_freq; index++) - { - if(SampleRate == LE24(AUDIO_Handle->class_desc.as_desc[AUDIO_Handle->headphone.asociated_as].FormatTypeDesc->tSamFreq[index])) - { - change_freq = TRUE; - break; - } - } - } - - if(change_freq == TRUE) - { - AUDIO_Handle->headphone.frequency = SampleRate; - AUDIO_Handle->headphone.frame_length = (SampleRate * BitPerSample * NbrChannels) / 8000; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_SET_EP; - Status = USBH_OK; - - } - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_Play - * Start playback process - * @param phost: Host handle - * @param buf: pointer to raw audio data - * @param length: total length of the audio data - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Play (USBH_HandleTypeDef *phost, uint8_t *buf, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - AUDIO_Handle->headphone.buf = buf; - AUDIO_Handle->headphone.total_length = length; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_PLAY; - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - AUDIO_Handle->processing_state = AUDIO_DATA_START_OUT; - Status = USBH_OK; - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_Pause - * Stop the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Stop (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - Status = USBH_AUDIO_Suspend(phost); - return Status; -} - -/** - * @brief USBH_AUDIO_Suspend - * Suspend the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Suspend (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_IDLE; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_IDLE; - Status = USBH_OK; - } - } - return Status; -} -/** - * @brief USBH_AUDIO_Resume - * Resume the playback process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_Resume (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_IDLE) - { - AUDIO_Handle->control_state = AUDIO_CONTROL_INIT; - AUDIO_Handle->play_state = AUDIO_PLAYBACK_PLAY; - } - } - return Status; -} -/** - * @brief USBH_AUDIO_GetOutOffset - * return the current buffer pointer for OUT proces - * @param phost: Host handle - * @retval USBH Status - */ -int32_t USBH_AUDIO_GetOutOffset (USBH_HandleTypeDef *phost) -{ - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - return AUDIO_Handle->headphone.partial_ptr; - } - } - return -1; -} - -/** - * @brief USBH_AUDIO_ChangeOutBuffer - * Change audio data buffer address - * @param phost: Host handle - * @param buf: buffer address - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_ChangeOutBuffer (USBH_HandleTypeDef *phost, uint8_t *buf) -{ - USBH_StatusTypeDef Status = USBH_FAIL; - AUDIO_HandleTypeDef *AUDIO_Handle; - - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - if(AUDIO_Handle->headphone.buf <= buf) - { - AUDIO_Handle->headphone.cbuf = buf; - if ( AUDIO_Handle->headphone.buf == buf) - { - AUDIO_Handle->headphone.partial_ptr = 0; - } - Status = USBH_OK; - } - } - } - return Status; -} - -/** - * @brief USBH_AUDIO_SetControlAttribute - * Set Control Attribute - * @param phost: Host handle - * @param attrib: control attribute - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_AUDIO_SetControlAttribute (USBH_HandleTypeDef *phost, uint8_t attrib) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - - AUDIO_Handle = phost->pActiveClass->pData; - - switch (attrib) - { - case 0x01: - AUDIO_Handle->headphone.attribute.volume += AUDIO_Handle->headphone.attribute.resolution; - break; - - case 0x02: - AUDIO_Handle->headphone.attribute.volume -= AUDIO_Handle->headphone.attribute.resolution; - break; - - } - - if(AUDIO_Handle->headphone.attribute.volume > AUDIO_Handle->headphone.attribute.volumeMax) - { - AUDIO_Handle->headphone.attribute.volume =AUDIO_Handle->headphone.attribute.volumeMax; - } - - if(AUDIO_Handle->headphone.attribute.volume < AUDIO_Handle->headphone.attribute.volumeMin) - { - AUDIO_Handle->headphone.attribute.volume =AUDIO_Handle->headphone.attribute.volumeMin; - } - - if(AUDIO_SetVolume (phost, - AUDIO_Handle->temp_feature, - AUDIO_Handle->temp_channels, - AUDIO_Handle->headphone.attribute.volume) != USBH_BUSY) - { - - if(AUDIO_Handle->temp_channels == 1) - { - AUDIO_Handle->temp_feature = AUDIO_Handle->headphone.asociated_feature; - AUDIO_Handle->temp_channels = AUDIO_Handle->headphone.asociated_channels; - status = USBH_OK; - } - else - { - AUDIO_Handle->temp_channels--; - } - AUDIO_Handle->cs_req_state = AUDIO_REQ_GET_VOLUME; - } - - - return status; -} - - -/** - * @brief USBH_AUDIO_SetVolume - * Set Volume - * @param phost: Host handle - * @param volume: VOLUME_UP/ VOLUME_DOWN - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_AUDIO_SetVolume (USBH_HandleTypeDef *phost, AUDIO_VolumeCtrlTypeDef volume_ctl) -{ - AUDIO_HandleTypeDef *AUDIO_Handle = phost->pActiveClass->pData; - - if((volume_ctl == VOLUME_UP) || (volume_ctl == VOLUME_DOWN)) - { - if(phost->gState == HOST_CLASS) - { - AUDIO_Handle = phost->pActiveClass->pData; - if(AUDIO_Handle->play_state == AUDIO_PLAYBACK_PLAY) - { - AUDIO_Handle->control_state = (volume_ctl == VOLUME_UP)? AUDIO_CONTROL_VOLUME_UP : AUDIO_CONTROL_VOLUME_DOWN; - return USBH_OK; - } - } - } - return USBH_FAIL; -} -/** - * @brief AUDIO_SetVolume - * Set Volume - * @param phost: Host handle - * @param feature: feature Unit index - * @param channel: channel index - * @param volume: new volume - * @retval USBH Status - */ -static USBH_StatusTypeDef AUDIO_SetVolume (USBH_HandleTypeDef *phost, uint8_t feature, uint8_t channel, uint16_t volume) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - AUDIO_HandleTypeDef *AUDIO_Handle; - - - AUDIO_Handle = phost->pActiveClass->pData; - - AUDIO_Handle->mem[0] = volume; - - status = USBH_AC_SetCur(phost, - UAC_FEATURE_UNIT, - feature, - VOLUME_CONTROL, - channel, - 2); - - return status; -} - -/** - * @brief The function informs user that Settings have been changed - * @param pdev: Selected device - * @retval None - */ -__weak void USBH_AUDIO_FrequencySet(USBH_HandleTypeDef *phost) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h b/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h deleted file mode 100644 index df11bfddac416..0000000000000 --- a/ports/stm32/usbhost/Class/CDC/Inc/usbh_cdc.h +++ /dev/null @@ -1,449 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_cdc.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_cdc.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CDC_CORE_H -#define __USBH_CDC_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_CDC_CLASS -* @{ -*/ - -/** @defgroup USBH_CDC_CORE -* @brief This file is the Header file for USBH_CDC_CORE.c -* @{ -*/ - - - - -/*Communication Class codes*/ -#define USB_CDC_CLASS 0x02 -#define COMMUNICATION_INTERFACE_CLASS_CODE 0x02 - -/*Data Interface Class Codes*/ -#define DATA_INTERFACE_CLASS_CODE 0x0A - -/*Communcation sub class codes*/ -#define RESERVED 0x00 -#define DIRECT_LINE_CONTROL_MODEL 0x01 -#define ABSTRACT_CONTROL_MODEL 0x02 -#define TELEPHONE_CONTROL_MODEL 0x03 -#define MULTICHANNEL_CONTROL_MODEL 0x04 -#define CAPI_CONTROL_MODEL 0x05 -#define ETHERNET_NETWORKING_CONTROL_MODEL 0x06 -#define ATM_NETWORKING_CONTROL_MODEL 0x07 - - -/*Communication Interface Class Control Protocol Codes*/ -#define NO_CLASS_SPECIFIC_PROTOCOL_CODE 0x00 -#define COMMON_AT_COMMAND 0x01 -#define VENDOR_SPECIFIC 0xFF - - -#define CS_INTERFACE 0x24 -#define CDC_PAGE_SIZE_64 0x40 - -/*Class-Specific Request Codes*/ -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 - -#define CDC_SET_AUX_LINE_STATE 0x10 -#define CDC_SET_HOOK_STATE 0x11 -#define CDC_PULSE_SETUP 0x12 -#define CDC_SEND_PULSE 0x13 -#define CDC_SET_PULSE_TIME 0x14 -#define CDC_RING_AUX_JACK 0x15 - -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -#define CDC_SET_RINGER_PARMS 0x30 -#define CDC_GET_RINGER_PARMS 0x31 -#define CDC_SET_OPERATION_PARMS 0x32 -#define CDC_GET_OPERATION_PARMS 0x33 -#define CDC_SET_LINE_PARMS 0x34 -#define CDC_GET_LINE_PARMS 0x35 -#define CDC_DIAL_DIGITS 0x36 -#define CDC_SET_UNIT_PARAMETER 0x37 -#define CDC_GET_UNIT_PARAMETER 0x38 -#define CDC_CLEAR_UNIT_PARAMETER 0x39 -#define CDC_GET_PROFILE 0x3A - -#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40 -#define CDC_SET_ETHERNET_POWER_MANAGEMENT_PATTERN FILTER 0x41 -#define CDC_GET_ETHERNET_POWER_MANAGEMENT_PATTERN FILTER 0x42 -#define CDC_SET_ETHERNET_PACKET_FILTER 0x43 -#define CDC_GET_ETHERNET_STATISTIC 0x44 - -#define CDC_SET_ATM_DATA_FORMAT 0x50 -#define CDC_GET_ATM_DEVICE_STATISTICS 0x51 -#define CDC_SET_ATM_DEFAULT_VC 0x52 -#define CDC_GET_ATM_VC_STATISTICS 0x53 - - -/* wValue for SetControlLineState*/ -#define CDC_ACTIVATE_CARRIER_SIGNAL_RTS 0x0002 -#define CDC_DEACTIVATE_CARRIER_SIGNAL_RTS 0x0000 -#define CDC_ACTIVATE_SIGNAL_DTR 0x0001 -#define CDC_DEACTIVATE_SIGNAL_DTR 0x0000 - -#define LINE_CODING_STRUCTURE_SIZE 0x07 -/** - * @} - */ - -/** @defgroup USBH_CDC_CORE_Exported_Types -* @{ -*/ - -/* States for CDC State Machine */ -typedef enum -{ - CDC_IDLE= 0, - CDC_SEND_DATA, - CDC_SEND_DATA_WAIT, - CDC_RECEIVE_DATA, - CDC_RECEIVE_DATA_WAIT, -} -CDC_DataStateTypeDef; - -typedef enum -{ - CDC_IDLE_STATE= 0, - CDC_SET_LINE_CODING_STATE, - CDC_GET_LAST_LINE_CODING_STATE, - CDC_TRANSFER_DATA, - CDC_ERROR_STATE, -} -CDC_StateTypeDef; - - -/*Line coding structure*/ -typedef union _CDC_LineCodingStructure -{ - uint8_t Array[LINE_CODING_STRUCTURE_SIZE]; - - struct - { - - uint32_t dwDTERate; /*Data terminal rate, in bits per second*/ - uint8_t bCharFormat; /*Stop bits - 0 - 1 Stop bit - 1 - 1.5 Stop bits - 2 - 2 Stop bits*/ - uint8_t bParityType; /* Parity - 0 - None - 1 - Odd - 2 - Even - 3 - Mark - 4 - Space*/ - uint8_t bDataBits; /* Data bits (5, 6, 7, 8 or 16). */ - }b; -} -CDC_LineCodingTypeDef; - - - -/* Header Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Identifier (ID) of functional - | | | | descriptor. -3 | bcdCDC | 2 | | - | | | Number | USB Class Definitions for - | | | | Communication Devices Specification - | | | | release number in binary-coded - | | | | decimal -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _FunctionalDescriptorHeader -{ - uint8_t bLength; /*Size of this descriptor.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Header functional descriptor subtype as*/ - uint16_t bcdCDC; /* USB Class Definitions for Communication - Devices Specification release number in - binary-coded decimal. */ -} -CDC_HeaderFuncDesc_TypeDef; -/* Call Management Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Call Management functional - | | | | descriptor subtype. -3 | bmCapabilities | 1 | Bitmap | The capabilities that this configuration - | | | | supports: - | | | | D7..D2: RESERVED (Reset to zero) - | | | | D1: 0 - Device sends/receives call - | | | | management information only over - | | | | the Communication Class - | | | | interface. - | | | | 1 - Device can send/receive call - | \ | | management information over a - | | | | Data Class interface. - | | | | D0: 0 - Device does not handle call - | | | | management itself. - | | | | 1 - Device handles call - | | | | management itself. - | | | | The previous bits, in combination, identify - | | | | which call management scenario is used. If bit - | | | | D0 is reset to 0, then the value of bit D1 is - | | | | ignored. In this case, bit D1 is reset to zero for - | | | | future compatibility. -4 | bDataInterface | 1 | Number | Interface number of Data Class interface - | | | | optionally used for call management. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _CallMgmtFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Call Management functional descriptor subtype*/ - uint8_t bmCapabilities; /* bmCapabilities: D0+D1 */ - uint8_t bDataInterface; /*bDataInterface: 1*/ -} -CDC_CallMgmtFuncDesc_TypeDef; -/* Abstract Control Management Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of functional descriptor, in bytes. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Abstract Control Management - | | | | functional descriptor subtype. -3 | bmCapabilities | 1 | Bitmap | The capabilities that this configuration - | | | | supports ((A bit value of zero means that the - | | | | request is not supported.) ) - D7..D4: RESERVED (Reset to zero) - | | | | D3: 1 - Device supports the notification - | | | | Network_Connection. - | | | | D2: 1 - Device supports the request - | | | | Send_Break - | | | | D1: 1 - Device supports the request - | \ | | combination of Set_Line_Coding, - | | | | Set_Control_Line_State, Get_Line_Coding, and the - notification Serial_State. - | | | | D0: 1 - Device supports the request - | | | | combination of Set_Comm_Feature, - | | | | Clear_Comm_Feature, and Get_Comm_Feature. - | | | | The previous bits, in combination, identify - | | | | which requests/notifications are supported by - | | | | a Communication Class interface with the - | | | | SubClass code of Abstract Control Model. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _AbstractCntrlMgmtFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes.*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Abstract Control Management functional - descriptor subtype*/ - uint8_t bmCapabilities; /* The capabilities that this configuration supports */ -} -CDC_AbstCntrlMgmtFuncDesc_TypeDef; -/* Union Functional Descriptor --------------------------------------------------------------------------------- -Offset| field | Size | Value | Description -------|---------------------|-------|------------|------------------------------ -0 | bFunctionLength | 1 | number | Size of this descriptor. -1 | bDescriptorType | 1 | Constant | CS_INTERFACE (0x24) -2 | bDescriptorSubtype | 1 | Constant | Union functional - | | | | descriptor subtype. -3 | bMasterInterface | 1 | Constant | The interface number of the - | | | | Communication or Data Class interface -4 | bSlaveInterface0 | 1 | Number | nterface number of first slave or associated - | | | | interface in the union. -------|---------------------|-------|------------|------------------------------ -*/ -typedef struct _UnionFunctionalDescriptor -{ - uint8_t bLength; /*Size of this functional descriptor, in bytes*/ - uint8_t bDescriptorType; /*CS_INTERFACE (0x24)*/ - uint8_t bDescriptorSubType; /* Union functional descriptor SubType*/ - uint8_t bMasterInterface; /* The interface number of the Communication or - Data Class interface,*/ - uint8_t bSlaveInterface0; /*Interface number of first slave*/ -} -CDC_UnionFuncDesc_TypeDef; - -typedef struct _USBH_CDCInterfaceDesc -{ - CDC_HeaderFuncDesc_TypeDef CDC_HeaderFuncDesc; - CDC_CallMgmtFuncDesc_TypeDef CDC_CallMgmtFuncDesc; - CDC_AbstCntrlMgmtFuncDesc_TypeDef CDC_AbstCntrlMgmtFuncDesc; - CDC_UnionFuncDesc_TypeDef CDC_UnionFuncDesc; -} -CDC_InterfaceDesc_Typedef; - - -/* Structure for CDC process */ -typedef struct -{ - uint8_t NotifPipe; - uint8_t NotifEp; - uint8_t buff[8]; - uint16_t NotifEpSize; -} -CDC_CommItfTypedef ; - -typedef struct -{ - uint8_t InPipe; - uint8_t OutPipe; - uint8_t OutEp; - uint8_t InEp; - uint8_t buff[8]; - uint16_t OutEpSize; - uint16_t InEpSize; -} -CDC_DataItfTypedef ; - -/* Structure for CDC process */ -typedef struct _CDC_Process -{ - CDC_CommItfTypedef CommItf; - CDC_DataItfTypedef DataItf; - uint8_t *pTxData; - uint8_t *pRxData; - uint32_t TxDataLength; - uint32_t RxDataLength; - CDC_InterfaceDesc_Typedef CDC_Desc; - CDC_LineCodingTypeDef LineCoding; - CDC_LineCodingTypeDef *pUserLineCoding; - CDC_StateTypeDef state; - CDC_DataStateTypeDef data_tx_state; - CDC_DataStateTypeDef data_rx_state; - uint8_t Rx_Poll; -} -CDC_HandleTypeDef; - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef CDC_Class; -#define USBH_CDC_CLASS &CDC_Class - -/** -* @} -*/ - -/** @defgroup USBH_CDC_CORE_Exported_FunctionsPrototype -* @{ -*/ - -USBH_StatusTypeDef USBH_CDC_SetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -USBH_StatusTypeDef USBH_CDC_GetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -USBH_StatusTypeDef USBH_CDC_Transmit(USBH_HandleTypeDef *phost, - uint8_t *pbuff, - uint32_t length); - -USBH_StatusTypeDef USBH_CDC_Receive(USBH_HandleTypeDef *phost, - uint8_t *pbuff, - uint32_t length); - - -uint16_t USBH_CDC_GetLastReceivedDataSize(USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_CDC_Stop(USBH_HandleTypeDef *phost); - -void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost); - -void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost); - -void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost); - -/** -* @} -*/ - - -#endif /* __USBH_CDC_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c b/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c deleted file mode 100644 index 250e1fc7bf0c7..0000000000000 --- a/ports/stm32/usbhost/Class/CDC/Src/usbh_cdc.c +++ /dev/null @@ -1,755 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_cdc.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the CDC Layer Handlers for USB Host CDC class. - * - * @verbatim - * - * =================================================================== - * CDC Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (CDC) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_cdc.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_CDC_CLASS -* @{ -*/ - -/** @defgroup USBH_CDC_CORE -* @brief This file includes CDC Layer Handlers for USB Host CDC class. -* @{ -*/ - -/** @defgroup USBH_CDC_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Defines -* @{ -*/ -#define USBH_CDC_BUFFER_SIZE 1024 -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_CDC_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_SOFProcess(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_CDC_ClassRequest (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost, - CDC_LineCodingTypeDef *linecoding); - -static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost); - -static void CDC_ProcessReception(USBH_HandleTypeDef *phost); - -USBH_ClassTypeDef CDC_Class = -{ - "CDC", - USB_CDC_CLASS, - USBH_CDC_InterfaceInit, - USBH_CDC_InterfaceDeInit, - USBH_CDC_ClassRequest, - USBH_CDC_Process, - USBH_CDC_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_CDC_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_CDC_InterfaceInit - * The function init the CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_InterfaceInit (USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_FAIL ; - uint8_t interface; - CDC_HandleTypeDef *CDC_Handle; - - interface = USBH_FindInterface(phost, - COMMUNICATION_INTERFACE_CLASS_CODE, - ABSTRACT_CONTROL_MODEL, - COMMON_AT_COMMAND); - - if(interface == 0xFF) /* No Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for Communication Interface Class.", phost->pActiveClass->Name); - } - else - { - USBH_SelectInterface (phost, interface); - phost->pActiveClass->pData = (CDC_HandleTypeDef *)USBH_malloc (sizeof(CDC_HandleTypeDef)); - CDC_Handle = phost->pActiveClass->pData; - - /*Collect the notification endpoint address and length*/ - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - CDC_Handle->CommItf.NotifEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->CommItf.NotifEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - - /*Allocate the length for host channel number in*/ - CDC_Handle->CommItf.NotifPipe = USBH_AllocPipe(phost, CDC_Handle->CommItf.NotifEp); - - /* Open pipe for Notification endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->CommItf.NotifPipe, - CDC_Handle->CommItf.NotifEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - CDC_Handle->CommItf.NotifEpSize); - - USBH_LL_SetToggle (phost, CDC_Handle->CommItf.NotifPipe, 0); - - interface = USBH_FindInterface(phost, - DATA_INTERFACE_CLASS_CODE, - RESERVED, - NO_CLASS_SPECIFIC_PROTOCOL_CODE); - - if(interface == 0xFF) /* No Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for Data Interface Class.", phost->pActiveClass->Name); - } - else - { - /*Collect the class specific endpoint address and length*/ - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - else - { - CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress; - CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize; - } - - if(phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress & 0x80) - { - CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress; - CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize; - } - else - { - CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress; - CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize; - } - - /*Allocate the length for host channel number out*/ - CDC_Handle->DataItf.OutPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.OutEp); - - /*Allocate the length for host channel number in*/ - CDC_Handle->DataItf.InPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.InEp); - - /* Open channel for OUT endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->DataItf.OutPipe, - CDC_Handle->DataItf.OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - CDC_Handle->DataItf.OutEpSize); - /* Open channel for IN endpoint */ - USBH_OpenPipe (phost, - CDC_Handle->DataItf.InPipe, - CDC_Handle->DataItf.InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - CDC_Handle->DataItf.InEpSize); - - CDC_Handle->state = CDC_IDLE_STATE; - - USBH_LL_SetToggle (phost, CDC_Handle->DataItf.OutPipe,0); - USBH_LL_SetToggle (phost, CDC_Handle->DataItf.InPipe,0); - status = USBH_OK; - } - } - return status; -} - - - -/** - * @brief USBH_CDC_InterfaceDeInit - * The function DeInit the Pipes used for the CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CDC_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if ( CDC_Handle->CommItf.NotifPipe) - { - USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe); - USBH_FreePipe (phost, CDC_Handle->CommItf.NotifPipe); - CDC_Handle->CommItf.NotifPipe = 0; /* Reset the Channel as Free */ - } - - if ( CDC_Handle->DataItf.InPipe) - { - USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe); - USBH_FreePipe (phost, CDC_Handle->DataItf.InPipe); - CDC_Handle->DataItf.InPipe = 0; /* Reset the Channel as Free */ - } - - if ( CDC_Handle->DataItf.OutPipe) - { - USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe); - USBH_FreePipe (phost, CDC_Handle->DataItf.OutPipe); - CDC_Handle->DataItf.OutPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - - return USBH_OK; -} - -/** - * @brief USBH_CDC_ClassRequest - * The function is responsible for handling Standard requests - * for CDC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_ClassRequest (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_FAIL ; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - /*Issue the get line coding request*/ - status = GetLineCoding(phost, &CDC_Handle->LineCoding); - if(status == USBH_OK) - { - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - return status; -} - - -/** - * @brief USBH_CDC_Process - * The function is for managing state machine for CDC data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef req_status = USBH_OK; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - switch(CDC_Handle->state) - { - - case CDC_IDLE_STATE: - status = USBH_OK; - break; - - case CDC_SET_LINE_CODING_STATE: - req_status = SetLineCoding(phost, CDC_Handle->pUserLineCoding); - - if(req_status == USBH_OK) - { - CDC_Handle->state = CDC_GET_LAST_LINE_CODING_STATE; - } - - else if(req_status != USBH_BUSY) - { - CDC_Handle->state = CDC_ERROR_STATE; - } - break; - - - case CDC_GET_LAST_LINE_CODING_STATE: - req_status = GetLineCoding(phost, &(CDC_Handle->LineCoding)); - - if(req_status == USBH_OK) - { - CDC_Handle->state = CDC_IDLE_STATE; - - if((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) && - (CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) && - (CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) && - (CDC_Handle->LineCoding.b.dwDTERate == CDC_Handle->pUserLineCoding->b.dwDTERate)) - { - USBH_CDC_LineCodingChanged(phost); - } - } - - else if(req_status != USBH_BUSY) - { - CDC_Handle->state = CDC_ERROR_STATE; - } - - break; - - case CDC_TRANSFER_DATA: - CDC_ProcessTransmission(phost); - CDC_ProcessReception(phost); - break; - - case CDC_ERROR_STATE: - req_status = USBH_ClrFeature(phost, 0x00); - - if(req_status == USBH_OK ) - { - /*Change the state to waiting*/ - CDC_Handle->state = CDC_IDLE_STATE ; - } - break; - - default: - break; - - } - - return status; -} - -/** - * @brief USBH_CDC_SOFProcess - * The function is for managing SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_CDC_SOFProcess (USBH_HandleTypeDef *phost) -{ - return USBH_OK; -} - - - /** - * @brief USBH_CDC_Stop - * Stop current CDC Transmission - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CDC_Stop(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - CDC_Handle->state = CDC_IDLE_STATE; - - USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe); - USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe); - USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe); - } - return USBH_OK; -} -/** - * @brief This request allows the host to find out the currently - * configured line coding. - * @param pdev: Selected device - * @retval USBH_StatusTypeDef : USB ctl xfer status - */ -static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecoding) -{ - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = CDC_GET_LINE_CODING; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE; - - return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE); -} - - -/** - * @brief This request allows the host to specify typical asynchronous - * line-character formatting properties - * This request applies to asynchronous byte stream data class interfaces - * and endpoints - * @param pdev: Selected device - * @retval USBH_StatusTypeDef : USB ctl xfer status - */ -static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = CDC_SET_LINE_CODING; - phost->Control.setup.b.wValue.w = 0; - - phost->Control.setup.b.wIndex.w = 0; - - phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE; - - return USBH_CtlReq(phost, linecodin->Array , LINE_CODING_STRUCTURE_SIZE ); -} - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_SetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - if(phost->gState == HOST_CLASS) - { - CDC_Handle->state = CDC_SET_LINE_CODING_STATE; - CDC_Handle->pUserLineCoding = linecodin; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - } - return USBH_OK; -} - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecodin) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((phost->gState == HOST_CLASS) ||(phost->gState == HOST_CLASS_REQUEST)) - { - *linecodin = CDC_Handle->LineCoding; - return USBH_OK; - } - else - { - return USBH_FAIL; - } -} - -/** - * @brief This function return last recieved data size - * @param None - * @retval None - */ -uint16_t USBH_CDC_GetLastReceivedDataSize(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe);; - } - else - { - return 0; - } -} - -/** - * @brief This function prepares the state before issuing the class specific commands - * @param None - * @retval None - */ -USBH_StatusTypeDef USBH_CDC_Transmit(USBH_HandleTypeDef *phost, uint8_t *pbuff, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((CDC_Handle->state == CDC_IDLE_STATE) || (CDC_Handle->state == CDC_TRANSFER_DATA)) - { - CDC_Handle->pTxData = pbuff; - CDC_Handle->TxDataLength = length; - CDC_Handle->state = CDC_TRANSFER_DATA; - CDC_Handle->data_tx_state = CDC_SEND_DATA; - Status = USBH_OK; - } - return Status; -} - - -/** -* @brief This function prepares the state before issuing the class specific commands -* @param None -* @retval None -*/ -USBH_StatusTypeDef USBH_CDC_Receive(USBH_HandleTypeDef *phost, uint8_t *pbuff, uint32_t length) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - - if((CDC_Handle->state == CDC_IDLE_STATE) || (CDC_Handle->state == CDC_TRANSFER_DATA)) - { - CDC_Handle->pRxData = pbuff; - CDC_Handle->RxDataLength = length; - CDC_Handle->state = CDC_TRANSFER_DATA; - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA; - Status = USBH_OK; - } - return Status; -} - -/** -* @brief The function is responsible for sending data to the device -* @param pdev: Selected device -* @retval None -*/ -static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - - switch(CDC_Handle->data_tx_state) - { - - case CDC_SEND_DATA: - if(CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize) - { - USBH_BulkSendData (phost, - CDC_Handle->pTxData, - CDC_Handle->DataItf.OutEpSize, - CDC_Handle->DataItf.OutPipe, - 1); - } - else - { - USBH_BulkSendData (phost, - CDC_Handle->pTxData, - CDC_Handle->TxDataLength, - CDC_Handle->DataItf.OutPipe, - 1); - } - - CDC_Handle->data_tx_state = CDC_SEND_DATA_WAIT; - - break; - - case CDC_SEND_DATA_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.OutPipe); - - /*Check the status done for transmssion*/ - if(URB_Status == USBH_URB_DONE ) - { - if(CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize) - { - CDC_Handle->TxDataLength -= CDC_Handle->DataItf.OutEpSize ; - CDC_Handle->pTxData += CDC_Handle->DataItf.OutEpSize; - } - else - { - CDC_Handle->TxDataLength = 0; - } - - if( CDC_Handle->TxDataLength > 0) - { - CDC_Handle->data_tx_state = CDC_SEND_DATA; - } - else - { - CDC_Handle->data_tx_state = CDC_IDLE; - USBH_CDC_TransmitCallback(phost); - - } - } - else if( URB_Status == USBH_URB_NOTREADY ) - { - CDC_Handle->data_tx_state = CDC_SEND_DATA; - } - break; - default: - break; - } -} -/** -* @brief This function responsible for reception of data from the device -* @param pdev: Selected device -* @retval None -*/ - -static void CDC_ProcessReception(USBH_HandleTypeDef *phost) -{ - CDC_HandleTypeDef *CDC_Handle = phost->pActiveClass->pData; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - uint16_t length; - - switch(CDC_Handle->data_rx_state) - { - - case CDC_RECEIVE_DATA: - - USBH_BulkReceiveData (phost, - CDC_Handle->pRxData, - CDC_Handle->DataItf.InEpSize, - CDC_Handle->DataItf.InPipe); - - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA_WAIT; - - break; - - case CDC_RECEIVE_DATA_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.InPipe); - - /*Check the status done for reception*/ - if(URB_Status == USBH_URB_DONE ) - { - length = USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe); - - if(((CDC_Handle->RxDataLength - length) > 0) && (length > CDC_Handle->DataItf.InEpSize)) - { - CDC_Handle->RxDataLength -= length ; - CDC_Handle->pRxData += length; - CDC_Handle->data_rx_state = CDC_RECEIVE_DATA; - } - else - { - CDC_Handle->data_rx_state = CDC_IDLE; - USBH_CDC_ReceiveCallback(phost); - } - } - break; - - default: - break; - } -} - -/** -* @brief The function informs user that data have been received -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost) -{ - -} - - /** -* @brief The function informs user that data have been sent -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost) -{ - -} - - /** -* @brief The function informs user that Settings have been changed -* @param pdev: Selected device -* @retval None -*/ -__weak void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost) -{ - -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h deleted file mode 100644 index 38302ad0d44b1..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid.h +++ /dev/null @@ -1,341 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_HID_H -#define __USBH_HID_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_hid_mouse.h" -#include "usbh_hid_keybd.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_CORE - * @brief This file is the Header file for USBH_HID_CORE.c - * @{ - */ - - -/** @defgroup USBH_HID_CORE_Exported_Types - * @{ - */ - -#define HID_MIN_POLL 10 -#define HID_REPORT_SIZE 16 -#define HID_MAX_USAGE 10 -#define HID_MAX_NBR_REPORT_FMT 10 -#define HID_QUEUE_SIZE 10 - -#define HID_ITEM_LONG 0xFE - -#define HID_ITEM_TYPE_MAIN 0x00 -#define HID_ITEM_TYPE_GLOBAL 0x01 -#define HID_ITEM_TYPE_LOCAL 0x02 -#define HID_ITEM_TYPE_RESERVED 0x03 - - -#define HID_MAIN_ITEM_TAG_INPUT 0x08 -#define HID_MAIN_ITEM_TAG_OUTPUT 0x09 -#define HID_MAIN_ITEM_TAG_COLLECTION 0x0A -#define HID_MAIN_ITEM_TAG_FEATURE 0x0B -#define HID_MAIN_ITEM_TAG_ENDCOLLECTION 0x0C - - -#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0x00 -#define HID_GLOBAL_ITEM_TAG_LOG_MIN 0x01 -#define HID_GLOBAL_ITEM_TAG_LOG_MAX 0x02 -#define HID_GLOBAL_ITEM_TAG_PHY_MIN 0x03 -#define HID_GLOBAL_ITEM_TAG_PHY_MAX 0x04 -#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 0x05 -#define HID_GLOBAL_ITEM_TAG_UNIT 0x06 -#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 0x07 -#define HID_GLOBAL_ITEM_TAG_REPORT_ID 0x08 -#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 0x09 -#define HID_GLOBAL_ITEM_TAG_PUSH 0x0A -#define HID_GLOBAL_ITEM_TAG_POP 0x0B - - -#define HID_LOCAL_ITEM_TAG_USAGE 0x00 -#define HID_LOCAL_ITEM_TAG_USAGE_MIN 0x01 -#define HID_LOCAL_ITEM_TAG_USAGE_MAX 0x02 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 0x03 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MIN 0x04 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAX 0x05 -#define HID_LOCAL_ITEM_TAG_STRING_INDEX 0x07 -#define HID_LOCAL_ITEM_TAG_STRING_MIN 0x08 -#define HID_LOCAL_ITEM_TAG_STRING_MAX 0x09 -#define HID_LOCAL_ITEM_TAG_DELIMITER 0x0A - - -/* States for HID State Machine */ -typedef enum -{ - HID_INIT= 0, - HID_IDLE, - HID_SEND_DATA, - HID_BUSY, - HID_GET_DATA, - HID_SYNC, - HID_POLL, - HID_ERROR, -} -HID_StateTypeDef; - -typedef enum -{ - HID_REQ_INIT = 0, - HID_REQ_IDLE, - HID_REQ_GET_REPORT_DESC, - HID_REQ_GET_HID_DESC, - HID_REQ_SET_IDLE, - HID_REQ_SET_PROTOCOL, - HID_REQ_SET_REPORT, - -} -HID_CtlStateTypeDef; - -typedef enum -{ - HID_MOUSE = 0x01, - HID_KEYBOARD = 0x02, - HID_UNKNOWN = 0xFF, -} -HID_TypeTypeDef; - - -typedef struct _HID_ReportData -{ - uint8_t ReportID; - uint8_t ReportType; - uint16_t UsagePage; - uint32_t Usage[HID_MAX_USAGE]; - uint32_t NbrUsage; - uint32_t UsageMin; - uint32_t UsageMax; - int32_t LogMin; - int32_t LogMax; - int32_t PhyMin; - int32_t PhyMax; - int32_t UnitExp; - uint32_t Unit; - uint32_t ReportSize; - uint32_t ReportCnt; - uint32_t Flag; - uint32_t PhyUsage; - uint32_t AppUsage; - uint32_t LogUsage; -} -HID_ReportDataTypeDef; - -typedef struct _HID_ReportIDTypeDef { - uint8_t Size; /* Report size return by the device id */ - uint8_t ReportID; /* Report Id */ - uint8_t Type; /* Report Type (INPUT/OUTPUT/FEATURE) */ -} HID_ReportIDTypeDef; - -typedef struct _HID_CollectionTypeDef -{ - uint32_t Usage; - uint8_t Type; - struct _HID_CollectionTypeDef *NextPtr; -} HID_CollectionTypeDef; - - -typedef struct _HID_AppCollectionTypeDef { - uint32_t Usage; - uint8_t Type; - uint8_t NbrReportFmt; - HID_ReportDataTypeDef ReportData[HID_MAX_NBR_REPORT_FMT]; -} HID_AppCollectionTypeDef; - - -typedef struct _HIDDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdHID; /* indicates what endpoint this descriptor is describing */ - uint8_t bCountryCode; /* specifies the transfer type. */ - uint8_t bNumDescriptors; /* specifies the transfer type. */ - uint8_t bReportDescriptorType; /* Maximum Packet Size this endpoint is capable of sending or receiving */ - uint16_t wItemLength; /* is used to specify the polling interval of certain transfers. */ -} -HID_DescTypeDef; - - -typedef struct -{ - uint8_t *buf; - uint16_t head; - uint16_t tail; - uint16_t size; - uint8_t lock; -} FIFO_TypeDef; - - -/* Structure for HID process */ -typedef struct _HID_Process -{ - uint8_t OutPipe; - uint8_t InPipe; - HID_StateTypeDef state; - uint8_t OutEp; - uint8_t InEp; - HID_CtlStateTypeDef ctl_state; - FIFO_TypeDef fifo; - uint8_t *pData; - uint16_t length; - uint8_t ep_addr; - uint16_t poll; - uint16_t timer; - uint8_t DataReady; - HID_DescTypeDef HID_Desc; - USBH_StatusTypeDef ( * Init)(USBH_HandleTypeDef *phost); -} -HID_HandleTypeDef; - -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Defines - * @{ - */ - -#define USB_HID_GET_REPORT 0x01 -#define USB_HID_GET_IDLE 0x02 -#define USB_HID_GET_PROTOCOL 0x03 -#define USB_HID_SET_REPORT 0x09 -#define USB_HID_SET_IDLE 0x0A -#define USB_HID_SET_PROTOCOL 0x0B - - - - -/* HID Class Codes */ -#define USB_HID_CLASS 0x03 - -/* Interface Descriptor field values for HID Boot Protocol */ -#define HID_BOOT_CODE 0x01 -#define HID_KEYBRD_BOOT_CODE 0x01 -#define HID_MOUSE_BOOT_CODE 0x02 - - -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef HID_Class; -#define USBH_HID_CLASS &HID_Class -/** - * @} - */ - -/** @defgroup USBH_HID_CORE_Exported_FunctionsPrototype - * @{ - */ - -USBH_StatusTypeDef USBH_HID_SetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen); - -USBH_StatusTypeDef USBH_HID_GetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen); - -USBH_StatusTypeDef USBH_HID_GetHIDReportDescriptor (USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_HID_GetHIDDescriptor (USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_HID_SetIdle (USBH_HandleTypeDef *phost, - uint8_t duration, - uint8_t reportId); - -USBH_StatusTypeDef USBH_HID_SetProtocol (USBH_HandleTypeDef *phost, - uint8_t protocol); - -void USBH_HID_EventCallback(USBH_HandleTypeDef *phost); - -HID_TypeTypeDef USBH_HID_GetDeviceType(USBH_HandleTypeDef *phost); - -void fifo_init(FIFO_TypeDef * f, uint8_t * buf, uint16_t size); - -uint16_t fifo_read(FIFO_TypeDef * f, void * buf, uint16_t nbytes); - -uint16_t fifo_write(FIFO_TypeDef * f, const void * buf, uint16_t nbytes); - -/** - * @} - */ - - -#endif /* __USBH_HID_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h deleted file mode 100644 index dc72ebb26b8c6..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_keybd.h +++ /dev/null @@ -1,318 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid_keybd.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive -----------------------------------------------*/ -#ifndef __USBH_HID_KEYBD_H -#define __USBH_HID_KEYBD_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_keybd.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_KEYBD - * @brief This file is the Header file for USBH_HID_KEYBD.c - * @{ - */ - - -/** @defgroup USBH_HID_KEYBD_Exported_Types - * @{ - */ -#define KEY_NONE 0x00 -#define KEY_ERRORROLLOVER 0x01 -#define KEY_POSTFAIL 0x02 -#define KEY_ERRORUNDEFINED 0x03 -#define KEY_A 0x04 -#define KEY_B 0x05 -#define KEY_C 0x06 -#define KEY_D 0x07 -#define KEY_E 0x08 -#define KEY_F 0x09 -#define KEY_G 0x0A -#define KEY_H 0x0B -#define KEY_I 0x0C -#define KEY_J 0x0D -#define KEY_K 0x0E -#define KEY_L 0x0F -#define KEY_M 0x10 -#define KEY_N 0x11 -#define KEY_O 0x12 -#define KEY_P 0x13 -#define KEY_Q 0x14 -#define KEY_R 0x15 -#define KEY_S 0x16 -#define KEY_T 0x17 -#define KEY_U 0x18 -#define KEY_V 0x19 -#define KEY_W 0x1A -#define KEY_X 0x1B -#define KEY_Y 0x1C -#define KEY_Z 0x1D -#define KEY_1_EXCLAMATION_MARK 0x1E -#define KEY_2_AT 0x1F -#define KEY_3_NUMBER_SIGN 0x20 -#define KEY_4_DOLLAR 0x21 -#define KEY_5_PERCENT 0x22 -#define KEY_6_CARET 0x23 -#define KEY_7_AMPERSAND 0x24 -#define KEY_8_ASTERISK 0x25 -#define KEY_9_OPARENTHESIS 0x26 -#define KEY_0_CPARENTHESIS 0x27 -#define KEY_ENTER 0x28 -#define KEY_ESCAPE 0x29 -#define KEY_BACKSPACE 0x2A -#define KEY_TAB 0x2B -#define KEY_SPACEBAR 0x2C -#define KEY_MINUS_UNDERSCORE 0x2D -#define KEY_EQUAL_PLUS 0x2E -#define KEY_OBRACKET_AND_OBRACE 0x2F -#define KEY_CBRACKET_AND_CBRACE 0x30 -#define KEY_BACKSLASH_VERTICAL_BAR 0x31 -#define KEY_NONUS_NUMBER_SIGN_TILDE 0x32 -#define KEY_SEMICOLON_COLON 0x33 -#define KEY_SINGLE_AND_DOUBLE_QUOTE 0x34 -#define KEY_GRAVE ACCENT AND TILDE 0x35 -#define KEY_COMMA_AND_LESS 0x36 -#define KEY_DOT_GREATER 0x37 -#define KEY_SLASH_QUESTION 0x38 -#define KEY_CAPS LOCK 0x39 -#define KEY_F1 0x3A -#define KEY_F2 0x3B -#define KEY_F3 0x3C -#define KEY_F4 0x3D -#define KEY_F5 0x3E -#define KEY_F6 0x3F -#define KEY_F7 0x40 -#define KEY_F8 0x41 -#define KEY_F9 0x42 -#define KEY_F10 0x43 -#define KEY_F11 0x44 -#define KEY_F12 0x45 -#define KEY_PRINTSCREEN 0x46 -#define KEY_SCROLL LOCK 0x47 -#define KEY_PAUSE 0x48 -#define KEY_INSERT 0x49 -#define KEY_HOME 0x4A -#define KEY_PAGEUP 0x4B -#define KEY_DELETE 0x4C -#define KEY_END1 0x4D -#define KEY_PAGEDOWN 0x4E -#define KEY_RIGHTARROW 0x4F -#define KEY_LEFTARROW 0x50 -#define KEY_DOWNARROW 0x51 -#define KEY_UPARROW 0x52 -#define KEY_KEYPAD_NUM_LOCK_AND_CLEAR 0x53 -#define KEY_KEYPAD_SLASH 0x54 -#define KEY_KEYPAD_ASTERIKS 0x55 -#define KEY_KEYPAD_MINUS 0x56 -#define KEY_KEYPAD_PLUS 0x57 -#define KEY_KEYPAD_ENTER 0x58 -#define KEY_KEYPAD_1_END 0x59 -#define KEY_KEYPAD_2_DOWN_ARROW 0x5A -#define KEY_KEYPAD_3_PAGEDN 0x5B -#define KEY_KEYPAD_4_LEFT_ARROW 0x5C -#define KEY_KEYPAD_5 0x5D -#define KEY_KEYPAD_6_RIGHT_ARROW 0x5E -#define KEY_KEYPAD_7_HOME 0x5F -#define KEY_KEYPAD_8_UP_ARROW 0x60 -#define KEY_KEYPAD_9_PAGEUP 0x61 -#define KEY_KEYPAD_0_INSERT 0x62 -#define KEY_KEYPAD_DECIMAL_SEPARATOR_DELETE 0x63 -#define KEY_NONUS_BACK_SLASH_VERTICAL_BAR 0x64 -#define KEY_APPLICATION 0x65 -#define KEY_POWER 0x66 -#define KEY_KEYPAD_EQUAL 0x67 -#define KEY_F13 0x68 -#define KEY_F14 0x69 -#define KEY_F15 0x6A -#define KEY_F16 0x6B -#define KEY_F17 0x6C -#define KEY_F18 0x6D -#define KEY_F19 0x6E -#define KEY_F20 0x6F -#define KEY_F21 0x70 -#define KEY_F22 0x71 -#define KEY_F23 0x72 -#define KEY_F24 0x73 -#define KEY_EXECUTE 0x74 -#define KEY_HELP 0x75 -#define KEY_MENU 0x76 -#define KEY_SELECT 0x77 -#define KEY_STOP 0x78 -#define KEY_AGAIN 0x79 -#define KEY_UNDO 0x7A -#define KEY_CUT 0x7B -#define KEY_COPY 0x7C -#define KEY_PASTE 0x7D -#define KEY_FIND 0x7E -#define KEY_MUTE 0x7F -#define KEY_VOLUME_UP 0x80 -#define KEY_VOLUME_DOWN 0x81 -#define KEY_LOCKING_CAPS_LOCK 0x82 -#define KEY_LOCKING_NUM_LOCK 0x83 -#define KEY_LOCKING_SCROLL_LOCK 0x84 -#define KEY_KEYPAD_COMMA 0x85 -#define KEY_KEYPAD_EQUAL_SIGN 0x86 -#define KEY_INTERNATIONAL1 0x87 -#define KEY_INTERNATIONAL2 0x88 -#define KEY_INTERNATIONAL3 0x89 -#define KEY_INTERNATIONAL4 0x8A -#define KEY_INTERNATIONAL5 0x8B -#define KEY_INTERNATIONAL6 0x8C -#define KEY_INTERNATIONAL7 0x8D -#define KEY_INTERNATIONAL8 0x8E -#define KEY_INTERNATIONAL9 0x8F -#define KEY_LANG1 0x90 -#define KEY_LANG2 0x91 -#define KEY_LANG3 0x92 -#define KEY_LANG4 0x93 -#define KEY_LANG5 0x94 -#define KEY_LANG6 0x95 -#define KEY_LANG7 0x96 -#define KEY_LANG8 0x97 -#define KEY_LANG9 0x98 -#define KEY_ALTERNATE_ERASE 0x99 -#define KEY_SYSREQ 0x9A -#define KEY_CANCEL 0x9B -#define KEY_CLEAR 0x9C -#define KEY_PRIOR 0x9D -#define KEY_RETURN 0x9E -#define KEY_SEPARATOR 0x9F -#define KEY_OUT 0xA0 -#define KEY_OPER 0xA1 -#define KEY_CLEAR_AGAIN 0xA2 -#define KEY_CRSEL 0xA3 -#define KEY_EXSEL 0xA4 -#define KEY_KEYPAD_00 0xB0 -#define KEY_KEYPAD_000 0xB1 -#define KEY_THOUSANDS_SEPARATOR 0xB2 -#define KEY_DECIMAL_SEPARATOR 0xB3 -#define KEY_CURRENCY_UNIT 0xB4 -#define KEY_CURRENCY_SUB_UNIT 0xB5 -#define KEY_KEYPAD_OPARENTHESIS 0xB6 -#define KEY_KEYPAD_CPARENTHESIS 0xB7 -#define KEY_KEYPAD_OBRACE 0xB8 -#define KEY_KEYPAD_CBRACE 0xB9 -#define KEY_KEYPAD_TAB 0xBA -#define KEY_KEYPAD_BACKSPACE 0xBB -#define KEY_KEYPAD_A 0xBC -#define KEY_KEYPAD_B 0xBD -#define KEY_KEYPAD_C 0xBE -#define KEY_KEYPAD_D 0xBF -#define KEY_KEYPAD_E 0xC0 -#define KEY_KEYPAD_F 0xC1 -#define KEY_KEYPAD_XOR 0xC2 -#define KEY_KEYPAD_CARET 0xC3 -#define KEY_KEYPAD_PERCENT 0xC4 -#define KEY_KEYPAD_LESS 0xC5 -#define KEY_KEYPAD_GREATER 0xC6 -#define KEY_KEYPAD_AMPERSAND 0xC7 -#define KEY_KEYPAD_LOGICAL_AND 0xC8 -#define KEY_KEYPAD_VERTICAL_BAR 0xC9 -#define KEY_KEYPAD_LOGIACL_OR 0xCA -#define KEY_KEYPAD_COLON 0xCB -#define KEY_KEYPAD_NUMBER_SIGN 0xCC -#define KEY_KEYPAD_SPACE 0xCD -#define KEY_KEYPAD_AT 0xCE -#define KEY_KEYPAD_EXCLAMATION_MARK 0xCF -#define KEY_KEYPAD_MEMORY_STORE 0xD0 -#define KEY_KEYPAD_MEMORY_RECALL 0xD1 -#define KEY_KEYPAD_MEMORY_CLEAR 0xD2 -#define KEY_KEYPAD_MEMORY_ADD 0xD3 -#define KEY_KEYPAD_MEMORY_SUBTRACT 0xD4 -#define KEY_KEYPAD_MEMORY_MULTIPLY 0xD5 -#define KEY_KEYPAD_MEMORY_DIVIDE 0xD6 -#define KEY_KEYPAD_PLUSMINUS 0xD7 -#define KEY_KEYPAD_CLEAR 0xD8 -#define KEY_KEYPAD_CLEAR_ENTRY 0xD9 -#define KEY_KEYPAD_BINARY 0xDA -#define KEY_KEYPAD_OCTAL 0xDB -#define KEY_KEYPAD_DECIMAL 0xDC -#define KEY_KEYPAD_HEXADECIMAL 0xDD -#define KEY_LEFTCONTROL 0xE0 -#define KEY_LEFTSHIFT 0xE1 -#define KEY_LEFTALT 0xE2 -#define KEY_LEFT_GUI 0xE3 -#define KEY_RIGHTCONTROL 0xE4 -#define KEY_RIGHTSHIFT 0xE5 -#define KEY_RIGHTALT 0xE6 -#define KEY_RIGHT_GUI 0xE7 - -typedef struct -{ - uint8_t state; - uint8_t lctrl; - uint8_t lshift; - uint8_t lalt; - uint8_t lgui; - uint8_t rctrl; - uint8_t rshift; - uint8_t ralt; - uint8_t rgui; - uint8_t keys[6]; -} -HID_KEYBD_Info_TypeDef; - -USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost); -HID_KEYBD_Info_TypeDef *USBH_HID_GetKeybdInfo(USBH_HandleTypeDef *phost); -uint8_t USBH_HID_GetASCIICode(HID_KEYBD_Info_TypeDef *info); - -/** - * @} - */ - -#endif /* __USBH_HID_KEYBD_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h deleted file mode 100644 index 3a87d1a2db3df..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_mouse.h +++ /dev/null @@ -1,118 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_mouse.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_hid_mouse.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_HID_MOUSE_H -#define __USBH_HID_MOUSE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_MOUSE - * @brief This file is the Header file for USBH_HID_MOUSE.c - * @{ - */ - - -/** @defgroup USBH_HID_MOUSE_Exported_Types - * @{ - */ - -typedef struct _HID_MOUSE_Info -{ - uint8_t x; - uint8_t y; - uint8_t buttons[3]; -} -HID_MOUSE_Info_TypeDef; - -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost); -HID_MOUSE_Info_TypeDef *USBH_HID_GetMouseInfo(USBH_HandleTypeDef *phost); - -/** - * @} - */ - -#endif /* __USBH_HID_MOUSE_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h deleted file mode 100644 index 0bf5739afbaa1..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_parser.h +++ /dev/null @@ -1,96 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_parser.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the header file of the usbh_hid_parser.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -#ifndef _HID_PARSER_H_ -#define _HID_PARSER_H_ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_usage.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_PARSER - * @brief This file is the Header file for USBH_HID_PARSER.c - * @{ - */ - - -/** @defgroup USBH_HID_PARSER_Exported_Types - * @{ - */ -typedef struct -{ - uint8_t *data; - uint32_t size; - uint8_t shift; - uint8_t count; - uint8_t sign; - uint32_t logical_min; /*min value device can return*/ - uint32_t logical_max; /*max value device can return*/ - uint32_t physical_min; /*min vale read can report*/ - uint32_t physical_max; /*max value read can report*/ - uint32_t resolution; -} -HID_Report_ItemTypedef; - - -uint32_t HID_ReadItem (HID_Report_ItemTypedef *ri, uint8_t ndx); -uint32_t HID_WriteItem(HID_Report_ItemTypedef *ri, uint32_t value, uint8_t ndx); - - -/** - * @} - */ - -#endif /* _HID_PARSER_H_ */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h b/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h deleted file mode 100644 index e1f7762f32591..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Inc/usbh_hid_usage.h +++ /dev/null @@ -1,191 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contain the USAGE page codes - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -#ifndef _HID_USAGE_H_ -#define _HID_USAGE_H_ - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_USAGE - * @brief This file is the Header file for USBH_HID_USAGE.c - * @{ - */ - - -/** @defgroup USBH_HID_USAGE_Exported_Types - * @{ - */ - -/****************************************************/ -/* HID 1.11 usage pages */ -/****************************************************/ - -#define HID_USAGE_PAGE_UNDEFINED uint16_t (0x00) /* Undefined */ -/**** Top level pages */ -#define HID_USAGE_PAGE_GEN_DES uint16_t (0x01) /* Generic Desktop Controls*/ -#define HID_USAGE_PAGE_SIM_CTR uint16_t (0x02) /* Simulation Controls */ -#define HID_USAGE_PAGE_VR_CTR uint16_t (0x03) /* VR Controls */ -#define HID_USAGE_PAGE_SPORT_CTR uint16_t (0x04) /* Sport Controls */ -#define HID_USAGE_PAGE_GAME_CTR uint16_t (0x05) /* Game Controls */ -#define HID_USAGE_PAGE_GEN_DEV uint16_t (0x06) /* Generic Device Controls */ -#define HID_USAGE_PAGE_KEYB uint16_t (0x07) /* Keyboard/Keypad */ -#define HID_USAGE_PAGE_LED uint16_t (0x08) /* LEDs */ -#define HID_USAGE_PAGE_BUTTON uint16_t (0x09) /* Button */ -#define HID_USAGE_PAGE_ORDINAL uint16_t (0x0A) /* Ordinal */ -#define HID_USAGE_PAGE_PHONE uint16_t (0x0B) /* Telephony */ -#define HID_USAGE_PAGE_CONSUMER uint16_t (0x0C) /* Consumer */ -#define HID_USAGE_PAGE_DIGITIZER uint16_t (0x0D) /* Digitizer*/ -/* 0E Reserved */ -#define HID_USAGE_PAGE_PID uint16_t (0x0F) /* PID Page (force feedback and related devices) */ -#define HID_USAGE_PAGE_UNICODE uint16_t (0x10) /* Unicode */ -/* 11-13 Reserved */ -#define HID_USAGE_PAGE_ALNUM_DISP uint16_t (0x14) /* Alphanumeric Display */ -/* 15-1f Reserved */ -/**** END of top level pages */ -/* 25-3f Reserved */ -#define HID_USAGE_PAGE_MEDICAL uint16_t (0x40) /* Medical Instruments */ -/* 41-7F Reserved */ -/*80-83 Monitor pages USB Device Class Definition for Monitor Devices - 84-87 Power pages USB Device Class Definition for Power Devices */ -/* 88-8B Reserved */ -#define HID_USAGE_PAGE_BARCODE uint16_t (0x8C) /* Bar Code Scanner page */ -#define HID_USAGE_PAGE_SCALE uint16_t (0x8D) /* Scale page */ -#define HID_USAGE_PAGE_MSR uint16_t (0x8E) /* Magnetic Stripe Reading (MSR) Devices */ -#define HID_USAGE_PAGE_POS uint16_t (0x8F) /* Reserved Point of Sale pages */ -#define HID_USAGE_PAGE_CAMERA_CTR uint16_t (0x90) /* Camera Control Page */ -#define HID_USAGE_PAGE_ARCADE uint16_t (0x91) /* Arcade Page */ - -/****************************************************/ -/* Usage definitions for the "Generic Decktop" page */ -/****************************************************/ -#define HID_USAGE_UNDEFINED uint16_t (0x00) /* Undefined */ -#define HID_USAGE_POINTER uint16_t (0x01) /* Pointer (Physical Collection) */ -#define HID_USAGE_MOUSE uint16_t (0x02) /* Mouse (Application Collection) */ -/* 03 Reserved */ -#define HID_USAGE_JOYSTICK uint16_t (0x04) /* Joystick (Application Collection) */ -#define HID_USAGE_GAMEPAD uint16_t (0x05) /* Game Pad (Application Collection) */ -#define HID_USAGE_KBD uint16_t (0x06) /* Keyboard (Application Collection) */ -#define HID_USAGE_KEYPAD uint16_t (0x07) /* Keypad (Application Collection) */ -#define HID_USAGE_MAX_CTR uint16_t (0x08) /* Multi-axis Controller (Application Collection) */ -/* 09-2F Reserved */ -#define HID_USAGE_X uint16_t (0x30) /* X (Dynamic Value) */ -#define HID_USAGE_Y uint16_t (0x31) /* Y (Dynamic Value) */ -#define HID_USAGE_Z uint16_t (0x32) /* Z (Dynamic Value) */ -#define HID_USAGE_RX uint16_t (0x33) /* Rx (Dynamic Value) */ -#define HID_USAGE_RY uint16_t (0x34) /* Ry (Dynamic Value) */ -#define HID_USAGE_RZ uint16_t (0x35) /* Rz (Dynamic Value) */ -#define HID_USAGE_SLIDER uint16_t (0x36) /* Slider (Dynamic Value) */ -#define HID_USAGE_DIAL uint16_t (0x37) /* Dial (Dynamic Value) */ -#define HID_USAGE_WHEEL uint16_t (0x38) /* Wheel (Dynamic Value) */ -#define HID_USAGE_HATSW uint16_t (0x39) /* Hat switch (Dynamic Value) */ -#define HID_USAGE_COUNTEDBUF uint16_t (0x3A) /* Counted Buffer (Logical Collection) */ -#define HID_USAGE_BYTECOUNT uint16_t (0x3B) /* Byte Count (Dynamic Value) */ -#define HID_USAGE_MOTIONWAKE uint16_t (0x3C) /* Motion Wakeup (One Shot Control) */ -#define HID_USAGE_START uint16_t (0x3D) /* Start (On/Off Control) */ -#define HID_USAGE_SELECT uint16_t (0x3E) /* Select (On/Off Control) */ -/* 3F Reserved */ -#define HID_USAGE_VX uint16_t (0x40) /* Vx (Dynamic Value) */ -#define HID_USAGE_VY uint16_t (0x41) /* Vy (Dynamic Value) */ -#define HID_USAGE_VZ uint16_t (0x42) /* Vz (Dynamic Value) */ -#define HID_USAGE_VBRX uint16_t (0x43) /* Vbrx (Dynamic Value) */ -#define HID_USAGE_VBRY uint16_t (0x44) /* Vbry (Dynamic Value) */ -#define HID_USAGE_VBRZ uint16_t (0x45) /* Vbrz (Dynamic Value) */ -#define HID_USAGE_VNO uint16_t (0x46) /* Vno (Dynamic Value) */ -#define HID_USAGE_FEATNOTIF uint16_t (0x47) /* Feature Notification (Dynamic Value),(Dynamic Flag) */ -/* 48-7F Reserved */ -#define HID_USAGE_SYSCTL uint16_t (0x80) /* System Control (Application Collection) */ -#define HID_USAGE_PWDOWN uint16_t (0x81) /* System Power Down (One Shot Control) */ -#define HID_USAGE_SLEEP uint16_t (0x82) /* System Sleep (One Shot Control) */ -#define HID_USAGE_WAKEUP uint16_t (0x83) /* System Wake Up (One Shot Control) */ -#define HID_USAGE_CONTEXTM uint16_t (0x84) /* System Context Menu (One Shot Control) */ -#define HID_USAGE_MAINM uint16_t (0x85) /* System Main Menu (One Shot Control) */ -#define HID_USAGE_APPM uint16_t (0x86) /* System App Menu (One Shot Control) */ -#define HID_USAGE_MENUHELP uint16_t (0x87) /* System Menu Help (One Shot Control) */ -#define HID_USAGE_MENUEXIT uint16_t (0x88) /* System Menu Exit (One Shot Control) */ -#define HID_USAGE_MENUSELECT uint16_t (0x89) /* System Menu Select (One Shot Control) */ -#define HID_USAGE_SYSM_RIGHT uint16_t (0x8A) /* System Menu Right (Re-Trigger Control) */ -#define HID_USAGE_SYSM_LEFT uint16_t (0x8B) /* System Menu Left (Re-Trigger Control) */ -#define HID_USAGE_SYSM_UP uint16_t (0x8C) /* System Menu Up (Re-Trigger Control) */ -#define HID_USAGE_SYSM_DOWN uint16_t (0x8D) /* System Menu Down (Re-Trigger Control) */ -#define HID_USAGE_COLDRESET uint16_t (0x8E) /* System Cold Restart (One Shot Control) */ -#define HID_USAGE_WARMRESET uint16_t (0x8F) /* System Warm Restart (One Shot Control) */ -#define HID_USAGE_DUP uint16_t (0x90) /* D-pad Up (On/Off Control) */ -#define HID_USAGE_DDOWN uint16_t (0x91) /* D-pad Down (On/Off Control) */ -#define HID_USAGE_DRIGHT uint16_t (0x92) /* D-pad Right (On/Off Control) */ -#define HID_USAGE_DLEFT uint16_t (0x93) /* D-pad Left (On/Off Control) */ -/* 94-9F Reserved */ -#define HID_USAGE_SYS_DOCK uint16_t (0xA0) /* System Dock (One Shot Control) */ -#define HID_USAGE_SYS_UNDOCK uint16_t (0xA1) /* System Undock (One Shot Control) */ -#define HID_USAGE_SYS_SETUP uint16_t (0xA2) /* System Setup (One Shot Control) */ -#define HID_USAGE_SYS_BREAK uint16_t (0xA3) /* System Break (One Shot Control) */ -#define HID_USAGE_SYS_DBGBRK uint16_t (0xA4) /* System Debugger Break (One Shot Control) */ -#define HID_USAGE_APP_BRK uint16_t (0xA5) /* Application Break (One Shot Control) */ -#define HID_USAGE_APP_DBGBRK uint16_t (0xA6) /* Application Debugger Break (One Shot Control) */ -#define HID_USAGE_SYS_SPKMUTE uint16_t (0xA7) /* System Speaker Mute (One Shot Control) */ -#define HID_USAGE_SYS_HIBERN uint16_t (0xA8) /* System Hibernate (One Shot Control) */ -/* A9-AF Reserved */ -#define HID_USAGE_SYS_SIDPINV uint16_t (0xB0) /* System Display Invert (One Shot Control) */ -#define HID_USAGE_SYS_DISPINT uint16_t (0xB1) /* System Display Internal (One Shot Control) */ -#define HID_USAGE_SYS_DISPEXT uint16_t (0xB2) /* System Display External (One Shot Control) */ -#define HID_USAGE_SYS_DISPBOTH uint16_t (0xB3) /* System Display Both (One Shot Control) */ -#define HID_USAGE_SYS_DISPDUAL uint16_t (0xB4) /* System Display Dual (One Shot Control) */ -#define HID_USAGE_SYS_DISPTGLIE uint16_t (0xB5) /* System Display Toggle Int/Ext (One Shot Control) */ -#define HID_USAGE_SYS_DISP_SWAP uint16_t (0xB6) /* System Display Swap Primary/Secondary (One Shot Control) */ -#define HID_USAGE_SYS_DIPS_LCDA uint16_t (0xB7) /* System Display LCD Autoscale (One Shot Control) */ -/* B8-FFFF Reserved */ - -/** - * @} - */ - -#endif /* _HID_USAGE_H_ */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c deleted file mode 100644 index a56f45c5c7929..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid.c +++ /dev/null @@ -1,800 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the HID Layer Handlers for USB Host HID class. - * - * @verbatim - * - * =================================================================== - * HID Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (HID) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid.h" -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_HID_CLASS -* @{ -*/ - -/** @defgroup USBH_HID_CORE -* @brief This file includes HID Layer Handlers for USB Host HID class. -* @{ -*/ - -/** @defgroup USBH_HID_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_HID_InterfaceInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_InterfaceDeInit (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_ClassRequest(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_Process(USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef USBH_HID_SOFProcess(USBH_HandleTypeDef *phost); -static void USBH_HID_ParseHIDDesc (HID_DescTypeDef *desc, uint8_t *buf); - -extern USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost); -extern USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost); - -USBH_ClassTypeDef HID_Class = -{ - "HID", - USB_HID_CLASS, - USBH_HID_InterfaceInit, - USBH_HID_InterfaceDeInit, - USBH_HID_ClassRequest, - USBH_HID_Process, - USBH_HID_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_HID_CORE_Private_Functions -* @{ -*/ - - -/** - * @brief USBH_HID_InterfaceInit - * The function init the HID class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_InterfaceInit (USBH_HandleTypeDef *phost) -{ - uint8_t max_ep; - uint8_t num = 0; - uint8_t interface; - - USBH_StatusTypeDef status = USBH_FAIL ; - HID_HandleTypeDef *HID_Handle; - - interface = USBH_FindInterface(phost, phost->pActiveClass->ClassCode, HID_BOOT_CODE, 0xFF); - - if(interface == 0xFF) /* No Valid Interface */ - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - } - else - { - USBH_SelectInterface (phost, interface); - phost->pActiveClass->pData = (HID_HandleTypeDef *)USBH_malloc (sizeof(HID_HandleTypeDef)); - HID_Handle = phost->pActiveClass->pData; - HID_Handle->state = HID_ERROR; - - /*Decode Bootclass Protocl: Mouse or Keyboard*/ - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol == HID_KEYBRD_BOOT_CODE) - { - USBH_UsrLog ("KeyBoard device found!"); - HID_Handle->Init = USBH_HID_KeybdInit; - } - else if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol == HID_MOUSE_BOOT_CODE) - { - USBH_UsrLog ("Mouse device found!"); - HID_Handle->Init = USBH_HID_MouseInit; - } - else - { - USBH_UsrLog ("Protocol not supported."); - return USBH_FAIL; - } - - HID_Handle->state = HID_INIT; - HID_Handle->ctl_state = HID_REQ_INIT; - HID_Handle->ep_addr = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress; - HID_Handle->length = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - HID_Handle->poll = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bInterval ; - - if (HID_Handle->poll < HID_MIN_POLL) - { - HID_Handle->poll = HID_MIN_POLL; - } - - /* Check fo available number of endpoints */ - /* Find the number of EPs in the Interface Descriptor */ - /* Choose the lower number in order not to overrun the buffer allocated */ - max_ep = ( (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bNumEndpoints <= USBH_MAX_NUM_ENDPOINTS) ? - phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bNumEndpoints : - USBH_MAX_NUM_ENDPOINTS); - - - /* Decode endpoint IN and OUT address from interface descriptor */ - for ( ;num < max_ep; num++) - { - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress & 0x80) - { - HID_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress); - HID_Handle->InPipe =\ - USBH_AllocPipe(phost, HID_Handle->InEp); - - /* Open pipe for IN endpoint */ - USBH_OpenPipe (phost, - HID_Handle->InPipe, - HID_Handle->InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - HID_Handle->length); - - USBH_LL_SetToggle (phost, HID_Handle->InPipe, 0); - - } - else - { - HID_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[num].bEndpointAddress); - HID_Handle->OutPipe =\ - USBH_AllocPipe(phost, HID_Handle->OutEp); - - /* Open pipe for OUT endpoint */ - USBH_OpenPipe (phost, - HID_Handle->OutPipe, - HID_Handle->OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - HID_Handle->length); - - USBH_LL_SetToggle (phost, HID_Handle->OutPipe, 0); - } - - } - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_HID_InterfaceDeInit - * The function DeInit the Pipes used for the HID class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_InterfaceDeInit (USBH_HandleTypeDef *phost ) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->InPipe != 0x00) - { - USBH_ClosePipe (phost, HID_Handle->InPipe); - USBH_FreePipe (phost, HID_Handle->InPipe); - HID_Handle->InPipe = 0; /* Reset the pipe as Free */ - } - - if(HID_Handle->OutPipe != 0x00) - { - USBH_ClosePipe(phost, HID_Handle->OutPipe); - USBH_FreePipe (phost, HID_Handle->OutPipe); - HID_Handle->OutPipe = 0; /* Reset the pipe as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - } - - return USBH_OK; -} - -/** - * @brief USBH_HID_ClassRequest - * The function is responsible for handling Standard requests - * for HID class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_ClassRequest(USBH_HandleTypeDef *phost) -{ - - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef classReqStatus = USBH_BUSY; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - /* Switch HID state machine */ - switch (HID_Handle->ctl_state) - { - case HID_REQ_INIT: - case HID_REQ_GET_HID_DESC: - - /* Get HID Desc */ - if (USBH_HID_GetHIDDescriptor (phost, USB_HID_DESC_SIZE)== USBH_OK) - { - - USBH_HID_ParseHIDDesc(&HID_Handle->HID_Desc, phost->device.Data); - HID_Handle->ctl_state = HID_REQ_GET_REPORT_DESC; - } - - break; - case HID_REQ_GET_REPORT_DESC: - - - /* Get Report Desc */ - if (USBH_HID_GetHIDReportDescriptor(phost, HID_Handle->HID_Desc.wItemLength) == USBH_OK) - { - /* The decriptor is available in phost->device.Data */ - - HID_Handle->ctl_state = HID_REQ_SET_IDLE; - } - - break; - - case HID_REQ_SET_IDLE: - - classReqStatus = USBH_HID_SetIdle (phost, 0, 0); - - /* set Idle */ - if (classReqStatus == USBH_OK) - { - HID_Handle->ctl_state = HID_REQ_SET_PROTOCOL; - } - else if(classReqStatus == USBH_NOT_SUPPORTED) - { - HID_Handle->ctl_state = HID_REQ_SET_PROTOCOL; - } - break; - - case HID_REQ_SET_PROTOCOL: - /* set protocol */ - if (USBH_HID_SetProtocol (phost, 0) == USBH_OK) - { - HID_Handle->ctl_state = HID_REQ_IDLE; - - /* all requests performed*/ - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - status = USBH_OK; - } - break; - - case HID_REQ_IDLE: - default: - break; - } - - return status; -} - -/** - * @brief USBH_HID_Process - * The function is for managing state machine for HID data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_Process(USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - switch (HID_Handle->state) - { - case HID_INIT: - HID_Handle->Init(phost); - case HID_IDLE: - if(USBH_HID_GetReport (phost, - 0x01, - 0, - HID_Handle->pData, - HID_Handle->length) == USBH_OK) - { - - fifo_write(&HID_Handle->fifo, HID_Handle->pData, HID_Handle->length); - HID_Handle->state = HID_SYNC; - } - - break; - - case HID_SYNC: - - /* Sync with start of Even Frame */ - if(phost->Timer & 1) - { - HID_Handle->state = HID_GET_DATA; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - break; - - case HID_GET_DATA: - - USBH_InterruptReceiveData(phost, - HID_Handle->pData, - HID_Handle->length, - HID_Handle->InPipe); - - HID_Handle->state = HID_POLL; - HID_Handle->timer = phost->Timer; - HID_Handle->DataReady = 0; - break; - - case HID_POLL: - - if(USBH_LL_GetURBState(phost , HID_Handle->InPipe) == USBH_URB_DONE) - { - if(HID_Handle->DataReady == 0) - { - fifo_write(&HID_Handle->fifo, HID_Handle->pData, HID_Handle->length); - HID_Handle->DataReady = 1; - USBH_HID_EventCallback(phost); -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(USBH_LL_GetURBState(phost , HID_Handle->InPipe) == USBH_URB_STALL) /* IN Endpoint Stalled */ - { - - /* Issue Clear Feature on interrupt IN endpoint */ - if(USBH_ClrFeature(phost, - HID_Handle->ep_addr) == USBH_OK) - { - /* Change state to issue next IN token */ - HID_Handle->state = HID_GET_DATA; - } - } - - - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_HID_SOFProcess - * The function is for managing the SOF Process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_SOFProcess(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->state == HID_POLL) - { - if(( phost->Timer - HID_Handle->timer) >= HID_Handle->poll) - { - HID_Handle->state = HID_GET_DATA; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - return USBH_OK; -} - -/** -* @brief USBH_Get_HID_ReportDescriptor - * Issue report Descriptor command to the device. Once the response - * received, parse the report descriptor and update the status. - * @param phost: Host handle - * @param Length : HID Report Descriptor Length - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetHIDReportDescriptor (USBH_HandleTypeDef *phost, - uint16_t length) -{ - - USBH_StatusTypeDef status; - - status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD, - USB_DESC_HID_REPORT, - phost->device.Data, - length); - - /* HID report descriptor is available in phost->device.Data. - In case of USB Boot Mode devices for In report handling , - HID report descriptor parsing is not required. - In case, for supporting Non-Boot Protocol devices and output reports, - user may parse the report descriptor*/ - - - return status; -} - -/** - * @brief USBH_Get_HID_Descriptor - * Issue HID Descriptor command to the device. Once the response - * received, parse the report descriptor and update the status. - * @param phost: Host handle - * @param Length : HID Descriptor Length - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetHIDDescriptor (USBH_HandleTypeDef *phost, - uint16_t length) -{ - - USBH_StatusTypeDef status; - - status = USBH_GetDescriptor( phost, - USB_REQ_RECIPIENT_INTERFACE | USB_REQ_TYPE_STANDARD, - USB_DESC_HID, - phost->device.Data, - length); - - return status; -} - -/** - * @brief USBH_Set_Idle - * Set Idle State. - * @param phost: Host handle - * @param duration: Duration for HID Idle request - * @param reportId : Targetted report ID for Set Idle request - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetIdle (USBH_HandleTypeDef *phost, - uint8_t duration, - uint8_t reportId) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_IDLE; - phost->Control.setup.b.wValue.w = (duration << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); -} - - -/** - * @brief USBH_HID_Set_Report - * Issues Set Report - * @param phost: Host handle - * @param reportType : Report type to be sent - * @param reportId : Targetted report ID for Set Report request - * @param reportBuff : Report Buffer - * @param reportLen : Length of data report to be send - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_REPORT; - phost->Control.setup.b.wValue.w = (reportType << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = reportLen; - - return USBH_CtlReq(phost, reportBuff , reportLen ); -} - - -/** - * @brief USBH_HID_GetReport - * retreive Set Report - * @param phost: Host handle - * @param reportType : Report type to be sent - * @param reportId : Targetted report ID for Set Report request - * @param reportBuff : Report Buffer - * @param reportLen : Length of data report to be send - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_GetReport (USBH_HandleTypeDef *phost, - uint8_t reportType, - uint8_t reportId, - uint8_t* reportBuff, - uint8_t reportLen) -{ - - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_GET_REPORT; - phost->Control.setup.b.wValue.w = (reportType << 8 ) | reportId; - - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = reportLen; - - return USBH_CtlReq(phost, reportBuff , reportLen ); -} - -/** - * @brief USBH_Set_Protocol - * Set protocol State. - * @param phost: Host handle - * @param protocol : Set Protocol for HID : boot/report protocol - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_SetProtocol(USBH_HandleTypeDef *phost, - uint8_t protocol) -{ - - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE |\ - USB_REQ_TYPE_CLASS; - - - phost->Control.setup.b.bRequest = USB_HID_SET_PROTOCOL; - phost->Control.setup.b.wValue.w = protocol != 0 ? 0 : 1; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); - -} - -/** - * @brief USBH_ParseHIDDesc - * This function Parse the HID descriptor - * @param desc: HID Descriptor - * @param buf: Buffer where the source descriptor is available - * @retval None - */ -static void USBH_HID_ParseHIDDesc (HID_DescTypeDef *desc, uint8_t *buf) -{ - - desc->bLength = *(uint8_t *) (buf + 0); - desc->bDescriptorType = *(uint8_t *) (buf + 1); - desc->bcdHID = LE16 (buf + 2); - desc->bCountryCode = *(uint8_t *) (buf + 4); - desc->bNumDescriptors = *(uint8_t *) (buf + 5); - desc->bReportDescriptorType = *(uint8_t *) (buf + 6); - desc->wItemLength = LE16 (buf + 7); -} - -/** - * @brief USBH_HID_GetDeviceType - * Return Device function. - * @param phost: Host handle - * @retval HID function: HID_MOUSE / HID_KEYBOARD - */ -HID_TypeTypeDef USBH_HID_GetDeviceType(USBH_HandleTypeDef *phost) -{ - HID_TypeTypeDef type = HID_UNKNOWN; - - if(phost->gState == HOST_CLASS) - { - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol \ - == HID_KEYBRD_BOOT_CODE) - { - type = HID_KEYBOARD; - } - else if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].bInterfaceProtocol \ - == HID_MOUSE_BOOT_CODE) - { - type= HID_MOUSE; - } - } - return type; -} - -/** - * @brief fifo_init - * Initialize FIFO. - * @param f: Fifo address - * @param buf: Fifo buffer - * @param size: Fifo Size - * @retval none - */ -void fifo_init(FIFO_TypeDef * f, uint8_t * buf, uint16_t size) -{ - f->head = 0; - f->tail = 0; - f->lock = 0; - f->size = size; - f->buf = buf; -} - -/** - * @brief fifo_read - * Read from FIFO. - * @param f: Fifo address - * @param buf: read buffer - * @param nbytes: number of item to read - * @retval number of read items - */ -uint16_t fifo_read(FIFO_TypeDef * f, void * buf, uint16_t nbytes) -{ - uint16_t i; - uint8_t * p; - p = buf; - - if(f->lock == 0) - { - f->lock = 1; - for(i=0; i < nbytes; i++) - { - if( f->tail != f->head ) - { - *p++ = f->buf[f->tail]; - f->tail++; - if( f->tail == f->size ) - { - f->tail = 0; - } - } else - { - f->lock = 0; - return i; - } - } - } - f->lock = 0; - return nbytes; -} - -/** - * @brief fifo_write - * Read from FIFO. - * @param f: Fifo address - * @param buf: read buffer - * @param nbytes: number of item to write - * @retval number of written items - */ -uint16_t fifo_write(FIFO_TypeDef * f, const void * buf, uint16_t nbytes) -{ - uint16_t i; - const uint8_t * p; - p = buf; - if(f->lock == 0) - { - f->lock = 1; - for(i=0; i < nbytes; i++) - { - if( (f->head + 1 == f->tail) || - ( (f->head + 1 == f->size) && (f->tail == 0)) ) - { - f->lock = 0; - return i; - } - else - { - f->buf[f->head] = *p++; - f->head++; - if( f->head == f->size ) - { - f->head = 0; - } - } - } - } - f->lock = 0; - return nbytes; -} - - -/** -* @brief The function is a callback about HID Data events -* @param phost: Selected device -* @retval None -*/ -__weak void USBH_HID_EventCallback(USBH_HandleTypeDef *phost) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c deleted file mode 100644 index 79104767bf90d..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_keybd.c +++ /dev/null @@ -1,418 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_keybd.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the application layer for USB Host HID Keyboard handling - * QWERTY and AZERTY Keyboard are supported as per the selection in - * usbh_hid_keybd.h - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_keybd.h" -#include "usbh_hid_parser.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_HID_CLASS -* @{ -*/ - -/** @defgroup USBH_HID_KEYBD -* @brief This file includes HID Layer Handlers for USB Host HID class. -* @{ -*/ - -/** @defgroup USBH_HID_KEYBD_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_HID_KEYBD_Private_Defines -* @{ -*/ -/** -* @} -*/ -#ifndef AZERTY_KEYBOARD - #define QWERTY_KEYBOARD -#endif -#define KBD_LEFT_CTRL 0x01 -#define KBD_LEFT_SHIFT 0x02 -#define KBD_LEFT_ALT 0x04 -#define KBD_LEFT_GUI 0x08 -#define KBD_RIGHT_CTRL 0x10 -#define KBD_RIGHT_SHIFT 0x20 -#define KBD_RIGHT_ALT 0x40 -#define KBD_RIGHT_GUI 0x80 -#define KBR_MAX_NBR_PRESSED 6 - -/** @defgroup USBH_HID_KEYBD_Private_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_HID_KEYBD_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_HID_KeybdDecode(USBH_HandleTypeDef *phost); -/** -* @} -*/ - -/** @defgroup USBH_HID_KEYBD_Private_Variables -* @{ -*/ - -HID_KEYBD_Info_TypeDef keybd_info; -uint32_t keybd_report_data[2]; - -static const HID_Report_ItemTypedef imp_0_lctrl={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lshift={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 1, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lalt={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 2, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_lgui={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 3, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rctrl={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 4, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rshift={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 5, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_ralt={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 6, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; -static const HID_Report_ItemTypedef imp_0_rgui={ - (uint8_t*)keybd_report_data+0, /*data*/ - 1, /*size*/ - 7, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -static const HID_Report_ItemTypedef imp_0_key_array={ - (uint8_t*)keybd_report_data+2, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 6, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 101, /*max value read can return*/ - 0, /*min vale device can report*/ - 101, /*max value device can report*/ - 1 /*resolution*/ -}; - -#ifdef QWERTY_KEYBOARD -static const int8_t HID_KEYBRD_Key[] = { - '\0', '`', '1', '2', '3', '4', '5', '6', - '7', '8', '9', '0', '-', '=', '\0', '\r', - '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', - 'i', 'o', 'p', '[', ']', '\\', - '\0', 'a', 's', 'd', 'f', 'g', 'h', 'j', - 'k', 'l', ';', '\'', '\0', '\n', - '\0', '\0', 'z', 'x', 'c', 'v', 'b', 'n', - 'm', ',', '.', '/', '\0', '\0', - '\0', '\0', '\0', ' ', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '7', '4', '1', - '\0', '/', '8', '5', '2', - '0', '*', '9', '6', '3', - '.', '-', '+', '\0', '\n', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0' -}; - -static const int8_t HID_KEYBRD_ShiftKey[] = { - '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', - '_', '+', '\0', '\0', '\0', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', - 'I', 'O', 'P', '{', '}', '|', '\0', 'A', 'S', 'D', 'F', 'G', - 'H', 'J', 'K', 'L', ':', '"', '\0', '\n', '\0', '\0', 'Z', 'X', - 'C', 'V', 'B', 'N', 'M', '<', '>', '?', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; - -#else - -static const int8_t HID_KEYBRD_Key[] = { - '\0', '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', - '-', '=', '\0', '\r', '\t', 'a', 'z', 'e', 'r', 't', 'y', 'u', - 'i', 'o', 'p', '[', ']', '\\', '\0', 'q', 's', 'd', 'f', 'g', - 'h', 'j', 'k', 'l', 'm', '\0', '\0', '\n', '\0', '\0', 'w', 'x', - 'c', 'v', 'b', 'n', ',', ';', ':', '!', '\0', '\0', '\0', '\0', - '\0', ' ', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\r', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '7', '4', '1','\0', '/', - '8', '5', '2', '0', '*', '9', '6', '3', '.', '-', '+', '\0', - '\n', '\0', '\0', '\0', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; - -static const int8_t HID_KEYBRD_ShiftKey[] = { - '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', - '+', '\0', '\0', '\0', 'A', 'Z', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', - 'P', '{', '}', '*', '\0', 'Q', 'S', 'D', 'F', 'G', 'H', 'J', 'K', - 'L', 'M', '%', '\0', '\n', '\0', '\0', 'W', 'X', 'C', 'V', 'B', 'N', - '?', '.', '/', '\0', '\0', '\0','\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', - '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' -}; -#endif - -static const uint8_t HID_KEYBRD_Codes[] = { - 0, 0, 0, 0, 31, 50, 48, 33, - 19, 34, 35, 36, 24, 37, 38, 39, /* 0x00 - 0x0F */ - 52, 51, 25, 26, 17, 20, 32, 21, - 23, 49, 18, 47, 22, 46, 2, 3, /* 0x10 - 0x1F */ - 4, 5, 6, 7, 8, 9, 10, 11, - 43, 110, 15, 16, 61, 12, 13, 27, /* 0x20 - 0x2F */ - 28, 29, 42, 40, 41, 1, 53, 54, - 55, 30, 112, 113, 114, 115, 116, 117, /* 0x30 - 0x3F */ - 118, 119, 120, 121, 122, 123, 124, 125, - 126, 75, 80, 85, 76, 81, 86, 89, /* 0x40 - 0x4F */ - 79, 84, 83, 90, 95, 100, 105, 106, - 108, 93, 98, 103, 92, 97, 102, 91, /* 0x50 - 0x5F */ - 96, 101, 99, 104, 45, 129, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60 - 0x6F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70 - 0x7F */ - 0, 0, 0, 0, 0, 107, 0, 56, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80 - 0x8F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90 - 0x9F */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xA0 - 0xAF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xB0 - 0xBF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xC0 - 0xCF */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, /* 0xD0 - 0xDF */ - 58, 44, 60, 127, 64, 57, 62, 128 /* 0xE0 - 0xE7 */ -}; - -/** - * @brief USBH_HID_KeybdInit - * The function init the HID keyboard. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_KeybdInit(USBH_HandleTypeDef *phost) -{ - uint32_t x; - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - keybd_info.lctrl=keybd_info.lshift= 0; - keybd_info.lalt=keybd_info.lgui= 0; - keybd_info.rctrl=keybd_info.rshift= 0; - keybd_info.ralt=keybd_info.rgui=0; - - - for(x=0; x< (sizeof(keybd_report_data)/sizeof(uint32_t)); x++) - { - keybd_report_data[x]=0; - } - - if(HID_Handle->length > (sizeof(keybd_report_data)/sizeof(uint32_t))) - { - HID_Handle->length = (sizeof(keybd_report_data)/sizeof(uint32_t)); - } - HID_Handle->pData = (uint8_t*)keybd_report_data; - fifo_init(&HID_Handle->fifo, phost->device.Data, HID_QUEUE_SIZE * sizeof(keybd_report_data)); - - return USBH_OK; -} - -/** - * @brief USBH_HID_GetKeybdInfo - * The function return keyboard information. - * @param phost: Host handle - * @retval keyboard information - */ -HID_KEYBD_Info_TypeDef *USBH_HID_GetKeybdInfo(USBH_HandleTypeDef *phost) -{ - if(USBH_HID_KeybdDecode(phost) == USBH_OK) - { - return &keybd_info; - } - else - { - return NULL; - } -} - -/** - * @brief USBH_HID_KeybdDecode - * The function decode keyboard data. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_KeybdDecode(USBH_HandleTypeDef *phost) -{ - uint8_t x; - - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - if(HID_Handle->length == 0) - { - return USBH_FAIL; - } - /*Fill report */ - if(fifo_read(&HID_Handle->fifo, &keybd_report_data, HID_Handle->length) == HID_Handle->length) - { - - keybd_info.lctrl=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lctrl, 0); - keybd_info.lshift=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lshift, 0); - keybd_info.lalt=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lalt, 0); - keybd_info.lgui=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_lgui, 0); - keybd_info.rctrl=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rctrl, 0); - keybd_info.rshift=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rshift, 0); - keybd_info.ralt=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_ralt, 0); - keybd_info.rgui=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_rgui, 0); - - for(x=0; x < sizeof(keybd_info.keys); x++) - { - keybd_info.keys[x]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &imp_0_key_array, x); - } - - return USBH_OK; - } - return USBH_FAIL; -} - -/** - * @brief USBH_HID_GetASCIICode - * The function decode keyboard data into ASCII characters. - * @param phost: Host handle - * @param info: Keyboard information - * @retval ASCII code - */ -uint8_t USBH_HID_GetASCIICode(HID_KEYBD_Info_TypeDef *info) -{ - uint8_t output; - if((info->lshift == 1) || (info->rshift)) - { - output = HID_KEYBRD_ShiftKey[HID_KEYBRD_Codes[info->keys[0]]]; - } - else - { - output = HID_KEYBRD_Key[HID_KEYBRD_Codes[info->keys[0]]]; - } - return output; -} -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c deleted file mode 100644 index 0851714afe533..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_mouse.c +++ /dev/null @@ -1,267 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_mouse.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the application layer for USB Host HID Mouse Handling. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_mouse.h" -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_MOUSE - * @brief This file includes HID Layer Handlers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_HID_MOUSE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_MOUSE_Private_FunctionPrototypes - * @{ - */ -static USBH_StatusTypeDef USBH_HID_MouseDecode(USBH_HandleTypeDef *phost); - -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Variables - * @{ - */ -HID_MOUSE_Info_TypeDef mouse_info; -uint32_t mouse_report_data[1]; - -/* Structures defining how to access items in a HID mouse report */ -/* Access button 1 state. */ -static const HID_Report_ItemTypedef prop_b1={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min value device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access button 2 state. */ -static const HID_Report_ItemTypedef prop_b2={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 1, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min value device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access button 3 state. */ -static const HID_Report_ItemTypedef prop_b3={ - (uint8_t *)mouse_report_data+0, /*data*/ - 1, /*size*/ - 2, /*shift*/ - 0, /*count (only for array items)*/ - 0, /*signed?*/ - 0, /*min value read can return*/ - 1, /*max value read can return*/ - 0, /*min vale device can report*/ - 1, /*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access x coordinate change. */ -static const HID_Report_ItemTypedef prop_x={ - (uint8_t *)mouse_report_data+1, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 1, /*signed?*/ - 0, /*min value read can return*/ - 0xFFFF,/*max value read can return*/ - 0, /*min vale device can report*/ - 0xFFFF,/*max value device can report*/ - 1 /*resolution*/ -}; - -/* Access y coordinate change. */ -static const HID_Report_ItemTypedef prop_y={ - (uint8_t *)mouse_report_data+2, /*data*/ - 8, /*size*/ - 0, /*shift*/ - 0, /*count (only for array items)*/ - 1, /*signed?*/ - 0, /*min value read can return*/ - 0xFFFF,/*max value read can return*/ - 0, /*min vale device can report*/ - 0xFFFF,/*max value device can report*/ - 1 /*resolution*/ -}; - - -/** - * @} - */ - - -/** @defgroup USBH_HID_MOUSE_Private_Functions - * @{ - */ - -/** - * @brief USBH_HID_MouseInit - * The function init the HID mouse. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_HID_MouseInit(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - mouse_info.x=0; - mouse_info.y=0; - mouse_info.buttons[0]=0; - mouse_info.buttons[1]=0; - mouse_info.buttons[2]=0; - - mouse_report_data[0]=0; - - if(HID_Handle->length > sizeof(mouse_report_data)) - { - HID_Handle->length = sizeof(mouse_report_data); - } - HID_Handle->pData = (uint8_t *)mouse_report_data; - fifo_init(&HID_Handle->fifo, phost->device.Data, HID_QUEUE_SIZE * sizeof(mouse_report_data)); - - return USBH_OK; -} - -/** - * @brief USBH_HID_GetMouseInfo - * The function return mouse information. - * @param phost: Host handle - * @retval mouse information - */ -HID_MOUSE_Info_TypeDef *USBH_HID_GetMouseInfo(USBH_HandleTypeDef *phost) -{ - if(USBH_HID_MouseDecode(phost)== USBH_OK) - { - return &mouse_info; - } - else - { - return NULL; - } -} - -/** - * @brief USBH_HID_MouseDecode - * The function decode mouse data. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HID_MouseDecode(USBH_HandleTypeDef *phost) -{ - HID_HandleTypeDef *HID_Handle = phost->pActiveClass->pData; - - if(HID_Handle->length == 0) - { - return USBH_FAIL; - } - /*Fill report */ - if(fifo_read(&HID_Handle->fifo, &mouse_report_data, HID_Handle->length) == HID_Handle->length) - { - - /*Decode report */ - mouse_info.x = (int16_t )HID_ReadItem((HID_Report_ItemTypedef *) &prop_x, 0); - mouse_info.y = (int16_t )HID_ReadItem((HID_Report_ItemTypedef *) &prop_y, 0); - - mouse_info.buttons[0]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b1, 0); - mouse_info.buttons[1]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b2, 0); - mouse_info.buttons[2]=(uint8_t)HID_ReadItem((HID_Report_ItemTypedef *) &prop_b3, 0); - - return USBH_OK; - } - return USBH_FAIL; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c b/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c deleted file mode 100644 index a050f95e9716c..0000000000000 --- a/ports/stm32/usbhost/Class/HID/Src/usbh_hid_parser.c +++ /dev/null @@ -1,235 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_hid_parser.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the HID Layer Handlers for USB Host HID class. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "usbh_hid_parser.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_HID_CLASS - * @{ - */ - -/** @defgroup USBH_HID_PARSER - * @brief This file includes HID parsers for USB Host HID class. - * @{ - */ - -/** @defgroup USBH_HID_PARSER_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_HID_PARSER_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_HID_PARSER_Private_Functions - * @{ - */ - -/** - * @brief HID_ReadItem - * The function read a report item. - * @param ri: report item - * @param ndx: report index -* @retval status (0 : fail / otherwise: item value) - */ -uint32_t HID_ReadItem(HID_Report_ItemTypedef *ri, uint8_t ndx) -{ - uint32_t val=0; - uint32_t x=0; - uint32_t bofs; - uint8_t *data=ri->data; - uint8_t shift=ri->shift; - - /* get the logical value of the item */ - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0) - { - /* If app tries to read outside of the array. */ - if (ri->count <= ndx) - { - return(0); - } - - /* calculate bit offset */ - bofs = ndx*ri->size; - bofs += shift; - /* calculate byte offset + shift pair from bit offset. */ - data+=bofs/8; - shift=(uint8_t)(bofs%8); - } - /* read data bytes in little endian order */ - for(x=0; x < ((ri->size & 0x7) ? (ri->size/8)+1 : (ri->size/8)); x++) - { - val=(uint32_t)(*data << (x*8)); - } - val=(val >> shift) & ((1<size)-1); - - if (val < ri->logical_min || val > ri->logical_max) - { - return(0); - } - - /* convert logical value to physical value */ - /* See if the number is negative or not. */ - if ((ri->sign) && (val & (1<<(ri->size-1)))) - { - /* yes, so sign extend value to 32 bits. */ - int vs=(int)((-1 & ~((1<<(ri->size))-1)) | val); - - if(ri->resolution == 1) - { - return((uint32_t)vs); - } - return((uint32_t)(vs*ri->resolution)); - } - else - { - if(ri->resolution == 1) - { - return(val); - } - return(val*ri->resolution); - } -} - -/** - * @brief HID_WriteItem - * The function write a report item. - * @param ri: report item - * @param ndx: report index - * @retval status (1: fail/ 0 : Ok) - */ -uint32_t HID_WriteItem(HID_Report_ItemTypedef *ri, uint32_t value, uint8_t ndx) -{ - uint32_t x; - uint32_t mask; - uint32_t bofs; - uint8_t *data=ri->data; - uint8_t shift=ri->shift; - - if (value < ri->physical_min || value > ri->physical_max) - { - return(1); - } - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0) - { - /* If app tries to read outside of the array. */ - if (ri->count >= ndx) - { - return(0); - } - /* calculate bit offset */ - bofs = ndx*ri->size; - bofs += shift; - /* calculate byte offset + shift pair from bit offset. */ - data+=bofs/8; - shift=(uint8_t)(bofs%8); - - } - - /* Convert physical value to logical value. */ - if (ri->resolution != 1) - { - value=value/ri->resolution; - } - - /* Write logical value to report in little endian order. */ - mask=(uint32_t)((1<size)-1); - value = (value & mask) << shift; - - for(x=0; x < ((ri->size & 0x7) ? (ri->size/8)+1 : (ri->size/8)); x++) - { - *(ri->data+x)=(uint8_t)((*(ri->data+x) & ~(mask>>(x*8))) | ((value>>(x*8)) & (mask>>(x*8)))); - } - return(0); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h deleted file mode 100644 index ea173a7da8a2d..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc.h +++ /dev/null @@ -1,222 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_msc_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_H -#define __USBH_MSC_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_msc_bot.h" -#include "usbh_msc_scsi.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_CORE - * @brief This file is the Header file for usbh_msc_core.c - * @{ - */ - - -/** @defgroup USBH_MSC_CORE_Exported_Types - * @{ - */ - -typedef enum -{ - MSC_INIT = 0, - MSC_IDLE, - MSC_TEST_UNIT_READY, - MSC_READ_CAPACITY10, - MSC_READ_INQUIRY, - MSC_REQUEST_SENSE, - MSC_READ, - MSC_WRITE, - MSC_UNRECOVERED_ERROR, - MSC_PERIODIC_CHECK, -} -MSC_StateTypeDef; - -typedef enum -{ - MSC_OK, - MSC_NOT_READY, - MSC_ERROR, - -} -MSC_ErrorTypeDef; - -typedef enum -{ - MSC_REQ_IDLE = 0, - MSC_REQ_RESET, - MSC_REQ_GET_MAX_LUN, - MSC_REQ_ERROR, -} -MSC_ReqStateTypeDef; - -#define MAX_SUPPORTED_LUN 2 - -/* Structure for LUN */ -typedef struct -{ - MSC_StateTypeDef state; - MSC_ErrorTypeDef error; - USBH_StatusTypeDef prev_ready_state; - SCSI_CapacityTypeDef capacity; - SCSI_SenseTypeDef sense; - SCSI_StdInquiryDataTypeDef inquiry; - uint8_t state_changed; - -} -MSC_LUNTypeDef; - -/* Structure for MSC process */ -typedef struct _MSC_Process -{ - uint32_t max_lun; - uint8_t InPipe; - uint8_t OutPipe; - uint8_t OutEp; - uint8_t InEp; - uint16_t OutEpSize; - uint16_t InEpSize; - MSC_StateTypeDef state; - MSC_ErrorTypeDef error; - MSC_ReqStateTypeDef req_state; - MSC_ReqStateTypeDef prev_req_state; - BOT_HandleTypeDef hbot; - MSC_LUNTypeDef unit[MAX_SUPPORTED_LUN]; - uint16_t current_lun; - uint16_t rw_lun; - uint32_t timer; -} -MSC_HandleTypeDef; - - -/** - * @} - */ - - - -/** @defgroup USBH_MSC_CORE_Exported_Defines - * @{ - */ - -#define USB_REQ_BOT_RESET 0xFF -#define USB_REQ_GET_MAX_LUN 0xFE - - -/* MSC Class Codes */ -#define USB_MSC_CLASS 0x08 - -/* Interface Descriptor field values for HID Boot Protocol */ -#define MSC_BOT 0x50 -#define MSC_TRANSPARENT 0x06 -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_Variables - * @{ - */ -extern USBH_ClassTypeDef USBH_msc; -#define USBH_MSC_CLASS &USBH_msc - -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Exported_FunctionsPrototype - * @{ - */ - -/* Common APIs */ -uint8_t USBH_MSC_IsReady (USBH_HandleTypeDef *phost); - -/* APIs for LUN */ -int8_t USBH_MSC_GetMaxLUN (USBH_HandleTypeDef *phost); - -uint8_t USBH_MSC_UnitIsReady (USBH_HandleTypeDef *phost, uint8_t lun); - -USBH_StatusTypeDef USBH_MSC_GetLUNInfo(USBH_HandleTypeDef *phost, uint8_t lun, MSC_LUNTypeDef *info); - -USBH_StatusTypeDef USBH_MSC_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - -USBH_StatusTypeDef USBH_MSC_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); -/** - * @} - */ - -#endif /* __USBH_MSC_H */ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h deleted file mode 100644 index 5422c80eb707c..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_bot.h +++ /dev/null @@ -1,233 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_bot.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_msc_bot.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_BOT_H__ -#define __USBH_MSC_BOT_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" -#include "usbh_msc_bot.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_BOT - * @brief This file is the Header file for usbh_msc_core.c - * @{ - */ - - -/** @defgroup USBH_MSC_BOT_Exported_Types - * @{ - */ - -typedef enum { - BOT_OK = 0, - BOT_FAIL = 1, - BOT_PHASE_ERROR = 2, - BOT_BUSY = 3 -} -BOT_StatusTypeDef; - -typedef enum { - BOT_CMD_IDLE = 0, - BOT_CMD_SEND, - BOT_CMD_WAIT, -} -BOT_CMDStateTypeDef; - -/* CSW Status Definitions */ -typedef enum -{ - - BOT_CSW_CMD_PASSED = 0x00, - BOT_CSW_CMD_FAILED = 0x01, - BOT_CSW_PHASE_ERROR = 0x02, -} -BOT_CSWStatusTypeDef; - -typedef enum { - BOT_SEND_CBW = 1, - BOT_SEND_CBW_WAIT, - BOT_DATA_IN, - BOT_DATA_IN_WAIT, - BOT_DATA_OUT, - BOT_DATA_OUT_WAIT, - BOT_RECEIVE_CSW, - BOT_RECEIVE_CSW_WAIT, - BOT_ERROR_IN, - BOT_ERROR_OUT, - BOT_UNRECOVERED_ERROR -} -BOT_StateTypeDef; - -typedef union -{ - struct __CBW - { - uint32_t Signature; - uint32_t Tag; - uint32_t DataTransferLength; - uint8_t Flags; - uint8_t LUN; - uint8_t CBLength; - uint8_t CB[16]; - }field; - uint8_t data[31]; -} -BOT_CBWTypeDef; - -typedef union -{ - struct __CSW - { - uint32_t Signature; - uint32_t Tag; - uint32_t DataResidue; - uint8_t Status; - }field; - uint8_t data[13]; -} -BOT_CSWTypeDef; - -typedef struct -{ - uint32_t data[16]; - BOT_StateTypeDef state; - BOT_StateTypeDef prev_state; - BOT_CMDStateTypeDef cmd_state; - BOT_CBWTypeDef cbw; - uint8_t Reserved1; - BOT_CSWTypeDef csw; - uint8_t Reserved2[3]; - uint8_t *pbuf; -} -BOT_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBH_MSC_BOT_Exported_Defines - * @{ - */ -#define BOT_CBW_SIGNATURE 0x43425355 -#define BOT_CBW_TAG 0x20304050 -#define BOT_CSW_SIGNATURE 0x53425355 -#define BOT_CBW_LENGTH 31 -#define BOT_CSW_LENGTH 13 - - - -#define BOT_SEND_CSW_DISABLE 0 -#define BOT_SEND_CSW_ENABLE 1 - -#define BOT_DIR_IN 0 -#define BOT_DIR_OUT 1 -#define BOT_DIR_BOTH 2 - -#define BOT_PAGE_LENGTH 512 - - -#define BOT_CBW_CB_LENGTH 16 - - -#define USB_REQ_BOT_RESET 0xFF -#define USB_REQ_GET_MAX_LUN 0xFE - -#define MAX_BULK_STALL_COUNT_LIMIT 0x04 /* If STALL is seen on Bulk - Endpoint continously, this means - that device and Host has phase error - Hence a Reset is needed */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_BOT_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_Reset(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MSC_BOT_REQ_GetMaxLUN(USBH_HandleTypeDef *phost, uint8_t *Maxlun); - -USBH_StatusTypeDef USBH_MSC_BOT_Init(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun); -USBH_StatusTypeDef USBH_MSC_BOT_Error(USBH_HandleTypeDef *phost, uint8_t lun); - - - -/** - * @} - */ - -#endif //__USBH_MSC_BOT_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h b/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h deleted file mode 100644 index 76b51902a10ee..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Inc/usbh_msc_scsi.h +++ /dev/null @@ -1,218 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_scsi.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_msc_scsi.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MSC_SCSI_H__ -#define __USBH_MSC_SCSI_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_SCSI - * @brief This file is the Header file for usbh_msc_scsi.c - * @{ - */ - - -// Capacity data. -typedef struct -{ - uint32_t block_nbr; - uint16_t block_size; -} SCSI_CapacityTypeDef; - - -// Sense data. -typedef struct -{ - uint8_t key; - uint8_t asc; - uint8_t ascq; -} SCSI_SenseTypeDef; - -// INQUIRY data. -typedef struct -{ - uint8_t PeripheralQualifier; - uint8_t DeviceType; - uint8_t RemovableMedia; - uint8_t vendor_id[9]; - uint8_t product_id[17]; - uint8_t revision_id[5]; -}SCSI_StdInquiryDataTypeDef; - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define OPCODE_TEST_UNIT_READY 0x00 -#define OPCODE_READ_CAPACITY10 0x25 -#define OPCODE_READ10 0x28 -#define OPCODE_WRITE10 0x2A -#define OPCODE_REQUEST_SENSE 0x03 -#define OPCODE_INQUIRY 0x12 - -#define DATA_LEN_MODE_TEST_UNIT_READY 0 -#define DATA_LEN_READ_CAPACITY10 8 -#define DATA_LEN_INQUIRY 36 -#define DATA_LEN_REQUEST_SENSE 14 - -#define CBW_CB_LENGTH 16 -#define CBW_LENGTH 10 - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_SENSE_KEY_NO_SENSE 0x00 -#define SCSI_SENSE_KEY_RECOVERED_ERROR 0x01 -#define SCSI_SENSE_KEY_NOT_READY 0x02 -#define SCSI_SENSE_KEY_MEDIUM_ERROR 0x03 -#define SCSI_SENSE_KEY_HARDWARE_ERROR 0x04 -#define SCSI_SENSE_KEY_ILLEGAL_REQUEST 0x05 -#define SCSI_SENSE_KEY_UNIT_ATTENTION 0x06 -#define SCSI_SENSE_KEY_DATA_PROTECT 0x07 -#define SCSI_SENSE_KEY_BLANK_CHECK 0x08 -#define SCSI_SENSE_KEY_VENDOR_SPECIFIC 0x09 -#define SCSI_SENSE_KEY_COPY_ABORTED 0x0A -#define SCSI_SENSE_KEY_ABORTED_COMMAND 0x0B -#define SCSI_SENSE_KEY_VOLUME_OVERFLOW 0x0D -#define SCSI_SENSE_KEY_MISCOMPARE 0x0E -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_ASC_NO_ADDITIONAL_SENSE_INFORMATION 0x00 -#define SCSI_ASC_LOGICAL_UNIT_NOT_READY 0x04 -#define SCSI_ASC_INVALID_FIELD_IN_CDB 0x24 -#define SCSI_ASC_WRITE_PROTECTED 0x27 -#define SCSI_ASC_FORMAT_ERROR 0x31 -#define SCSI_ASC_INVALID_COMMAND_OPERATION_CODE 0x20 -#define SCSI_ASC_NOT_READY_TO_READY_CHANGE 0x28 -#define SCSI_ASC_MEDIUM_NOT_PRESENT 0x3A -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Defines - * @{ - */ -#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01 -#define SCSI_ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02 -#define SCSI_ASCQ_OPERATION_IN_PROGRESS 0x07 - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup _Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_MSC_SCSI_TestUnitReady (USBH_HandleTypeDef *phost, - uint8_t lun); - -USBH_StatusTypeDef USBH_MSC_SCSI_ReadCapacity (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_CapacityTypeDef *capacity); - -USBH_StatusTypeDef USBH_MSC_SCSI_Inquiry (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_StdInquiryDataTypeDef *inquiry); - -USBH_StatusTypeDef USBH_MSC_SCSI_RequestSense (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_SenseTypeDef *sense_data); - -USBH_StatusTypeDef USBH_MSC_SCSI_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - -USBH_StatusTypeDef USBH_MSC_SCSI_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length); - - -/** - * @} - */ - -#endif //__USBH_MSC_SCSI_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c deleted file mode 100644 index 53a2cd81df182..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc.c +++ /dev/null @@ -1,795 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the MSC class driver functions - * =================================================================== - * MSC Class Description - * =================================================================== - * This module manages the MSC class V1.0 following the "Universal - * Serial Bus Mass Storage Class (MSC) Bulk-Only Transport (BOT) Version 1.0 - * Sep. 31, 1999". - * This driver implements the following aspects of the specification: - * - Bulk-Only Transport protocol - * - Subclass : SCSI transparent command set (ref. SCSI Primary Commands - 3 (SPC-3)) - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_msc.h" -#include "usbh_msc_bot.h" -#include "usbh_msc_scsi.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_CORE - * @brief This file includes the mass storage related functions - * @{ - */ - - -/** @defgroup USBH_MSC_CORE_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_FunctionPrototypes - * @{ - */ - -static USBH_StatusTypeDef USBH_MSC_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_ClassRequest(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_SOFProcess(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MSC_RdWrProcess(USBH_HandleTypeDef *phost, uint8_t lun); - -USBH_ClassTypeDef USBH_msc = -{ - "MSC", - USB_MSC_CLASS, - USBH_MSC_InterfaceInit, - USBH_MSC_InterfaceDeInit, - USBH_MSC_ClassRequest, - USBH_MSC_Process, - USBH_MSC_SOFProcess, - NULL, -}; - - -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Exported_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_MSC_CORE_Private_Functions - * @{ - */ - - -/** - * @brief USBH_MSC_InterfaceInit - * The function init the MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_InterfaceInit (USBH_HandleTypeDef *phost) -{ - uint8_t interface = 0; - USBH_StatusTypeDef status = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle; - - interface = USBH_FindInterface(phost, phost->pActiveClass->ClassCode, MSC_TRANSPARENT, MSC_BOT); - - if(interface == 0xFF) /* Not Valid Interface */ - { - USBH_DbgLog ("Cannot Find the interface for %s class.", phost->pActiveClass->Name); - status = USBH_FAIL; - } - else - { - USBH_SelectInterface (phost, interface); - - phost->pActiveClass->pData = (MSC_HandleTypeDef *)USBH_malloc (sizeof(MSC_HandleTypeDef)); - MSC_Handle = phost->pActiveClass->pData; - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress & 0x80) - { - MSC_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress); - MSC_Handle->InEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - } - else - { - MSC_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].bEndpointAddress); - MSC_Handle->OutEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[0].wMaxPacketSize; - } - - if(phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress & 0x80) - { - MSC_Handle->InEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress); - MSC_Handle->InEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].wMaxPacketSize; - } - else - { - MSC_Handle->OutEp = (phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].bEndpointAddress); - MSC_Handle->OutEpSize = phost->device.CfgDesc.Itf_Desc[phost->device.current_interface].Ep_Desc[1].wMaxPacketSize; - } - - MSC_Handle->current_lun = 0; - MSC_Handle->rw_lun = 0; - MSC_Handle->state = MSC_INIT; - MSC_Handle->error = MSC_OK; - MSC_Handle->req_state = MSC_REQ_IDLE; - MSC_Handle->OutPipe = USBH_AllocPipe(phost, MSC_Handle->OutEp); - MSC_Handle->InPipe = USBH_AllocPipe(phost, MSC_Handle->InEp); - - USBH_MSC_BOT_Init(phost); - - /* De-Initialize LUNs information */ - USBH_memset(MSC_Handle->unit, 0, sizeof(MSC_Handle->unit)); - - /* Open the new channels */ - USBH_OpenPipe (phost, - MSC_Handle->OutPipe, - MSC_Handle->OutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MSC_Handle->OutEpSize); - - USBH_OpenPipe (phost, - MSC_Handle->InPipe, - MSC_Handle->InEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MSC_Handle->InEpSize); - - - USBH_LL_SetToggle (phost, MSC_Handle->InPipe,0); - USBH_LL_SetToggle (phost, MSC_Handle->OutPipe,0); - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_MSC_InterfaceDeInit - * The function DeInit the Pipes used for the MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ( MSC_Handle->OutPipe) - { - USBH_ClosePipe(phost, MSC_Handle->OutPipe); - USBH_FreePipe (phost, MSC_Handle->OutPipe); - MSC_Handle->OutPipe = 0; /* Reset the Channel as Free */ - } - - if ( MSC_Handle->InPipe) - { - USBH_ClosePipe(phost, MSC_Handle->InPipe); - USBH_FreePipe (phost, MSC_Handle->InPipe); - MSC_Handle->InPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - - return USBH_OK; -} - -/** - * @brief USBH_MSC_ClassRequest - * The function is responsible for handling Standard requests - * for MSC class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_ClassRequest(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef status = USBH_BUSY; - uint8_t i; - - /* Switch MSC REQ state machine */ - switch (MSC_Handle->req_state) - { - case MSC_REQ_IDLE: - case MSC_REQ_GET_MAX_LUN: - /* Issue GetMaxLUN request */ - if(USBH_MSC_BOT_REQ_GetMaxLUN(phost, (uint8_t *)&MSC_Handle->max_lun) == USBH_OK ) - { - MSC_Handle->max_lun = (uint8_t )(MSC_Handle->max_lun) + 1; - USBH_UsrLog ("Number of supported LUN: %lu", (int32_t)(MSC_Handle->max_lun)); - - for(i = 0; i < MSC_Handle->max_lun; i++) - { - MSC_Handle->unit[i].prev_ready_state = USBH_FAIL; - MSC_Handle->unit[i].state_changed = 0; - } - status = USBH_OK; - } - break; - - case MSC_REQ_ERROR : - /* a Clear Feature should be issued here */ - if(USBH_ClrFeature(phost, 0x00) == USBH_OK) - { - MSC_Handle->req_state = MSC_Handle->prev_req_state; - } - break; - - default: - break; - } - - return status; -} - -/** - * @brief USBH_MSC_Process - * The function is for managing state machine for MSC data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_Process(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef error = USBH_BUSY ; - USBH_StatusTypeDef scsi_status = USBH_BUSY ; - USBH_StatusTypeDef ready_status = USBH_BUSY ; - - switch (MSC_Handle->state) - { - case MSC_INIT: - - if(MSC_Handle->current_lun < MSC_Handle->max_lun) - { - - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; - /* Switch MSC REQ state machine */ - switch (MSC_Handle->unit[MSC_Handle->current_lun].state) - { - case MSC_INIT: - USBH_UsrLog ("LUN #%d: ", MSC_Handle->current_lun); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_READ_INQUIRY; - MSC_Handle->timer = phost->Timer + 10000; - - case MSC_READ_INQUIRY: - scsi_status = USBH_MSC_SCSI_Inquiry(phost, MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].inquiry); - - if( scsi_status == USBH_OK) - { - USBH_UsrLog ("Inquiry Vendor : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.vendor_id); - USBH_UsrLog ("Inquiry Product : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.product_id); - USBH_UsrLog ("Inquiry Version : %s", MSC_Handle->unit[MSC_Handle->current_lun].inquiry.revision_id); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_TEST_UNIT_READY; - } - if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_TEST_UNIT_READY: - ready_status = USBH_MSC_SCSI_TestUnitReady(phost, MSC_Handle->current_lun); - - if( ready_status == USBH_OK) - { - if( MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state != USBH_OK) - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 1; - USBH_UsrLog ("Mass Storage Device ready"); - } - else - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 0; - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_READ_CAPACITY10; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_OK; - MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_OK; - } - if( ready_status == USBH_FAIL) - { - /* Media not ready, so try to check again during 10s */ - if( MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state != USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 1; - USBH_UsrLog ("Mass Storage Device NOT ready"); - } - else - { - MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 0; - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; - MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_FAIL; - } - else if(ready_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_READ_CAPACITY10: - scsi_status = USBH_MSC_SCSI_ReadCapacity(phost,MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].capacity) ; - - if(scsi_status == USBH_OK) - { - if(MSC_Handle->unit[MSC_Handle->current_lun].state_changed == 1) - { - USBH_UsrLog ("Mass Storage Device capacity : %lu MB", \ - (int32_t)((MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_nbr * MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_size)/1024/1024)); - USBH_UsrLog ("Block number : %lu", (int32_t)(MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_nbr)); - USBH_UsrLog ("Block Size : %lu", (int32_t)(MSC_Handle->unit[MSC_Handle->current_lun].capacity.block_size)); - } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_OK; - MSC_Handle->current_lun++; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_REQUEST_SENSE: - scsi_status = USBH_MSC_SCSI_RequestSense(phost, MSC_Handle->current_lun, &MSC_Handle->unit[MSC_Handle->current_lun].sense); - - if( scsi_status == USBH_OK) - { - if((MSC_Handle->unit[MSC_Handle->current_lun].sense.key == SCSI_SENSE_KEY_UNIT_ATTENTION) || - (MSC_Handle->unit[MSC_Handle->current_lun].sense.key == SCSI_SENSE_KEY_NOT_READY) ) - { - - if(phost->Timer <= MSC_Handle->timer) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_TEST_UNIT_READY; - break; - } - } - - USBH_UsrLog ("Sense Key : %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.key); - USBH_UsrLog ("Additional Sense Code : %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.asc); - USBH_UsrLog ("Additional Sense Code Qualifier: %x", MSC_Handle->unit[MSC_Handle->current_lun].sense.ascq); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->current_lun++; - } - if( scsi_status == USBH_FAIL) - { - USBH_UsrLog ("Mass Storage Device NOT ready"); - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_UNRECOVERED_ERROR; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_IDLE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_ERROR; - } - break; - - case MSC_UNRECOVERED_ERROR: - MSC_Handle->current_lun++; - break; - - default: - break; - } - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - } - else - { - MSC_Handle->current_lun = 0; - MSC_Handle->state = MSC_IDLE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - break; - - case MSC_IDLE: - error = USBH_OK; - break; - - default: - break; - } - return error; -} - - -/** - * @brief USBH_MSC_SOFProcess - * The function is for SOF state - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_SOFProcess(USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} -/** - * @brief USBH_MSC_RdWrProcess - * The function is for managing state machine for MSC I/O Process - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_RdWrProcess(USBH_HandleTypeDef *phost, uint8_t lun) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - USBH_StatusTypeDef error = USBH_BUSY ; - USBH_StatusTypeDef scsi_status = USBH_BUSY ; - - /* Switch MSC REQ state machine */ - switch (MSC_Handle->unit[lun].state) - { - - case MSC_READ: - scsi_status = USBH_MSC_SCSI_Read(phost,lun, 0, NULL, 0) ; - - if(scsi_status == USBH_OK) - { - MSC_Handle->unit[lun].state = MSC_IDLE; - error = USBH_OK; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - case MSC_WRITE: - scsi_status = USBH_MSC_SCSI_Write(phost,lun, 0, NULL, 0) ; - - if(scsi_status == USBH_OK) - { - MSC_Handle->unit[lun].state = MSC_IDLE; - error = USBH_OK; - } - else if( scsi_status == USBH_FAIL) - { - MSC_Handle->unit[lun].state = MSC_REQUEST_SENSE; - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - case MSC_REQUEST_SENSE: - scsi_status = USBH_MSC_SCSI_RequestSense(phost, lun, &MSC_Handle->unit[lun].sense); - - if( scsi_status == USBH_OK) - { - USBH_UsrLog ("Sense Key : %x", MSC_Handle->unit[lun].sense.key); - USBH_UsrLog ("Additional Sense Code : %x", MSC_Handle->unit[lun].sense.asc); - USBH_UsrLog ("Additional Sense Code Qualifier: %x", MSC_Handle->unit[lun].sense.ascq); - MSC_Handle->unit[lun].state = MSC_IDLE; - MSC_Handle->unit[lun].error = MSC_ERROR; - - error = USBH_FAIL; - } - if( scsi_status == USBH_FAIL) - { - USBH_UsrLog ("Mass Storage Device NOT ready"); - } - else if(scsi_status == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->unit[lun].state = MSC_UNRECOVERED_ERROR; - error = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CLASS_EVENT, 0); -#endif - break; - - default: - break; - - } - return error; -} - -/** - * @brief USBH_MSC_IsReady - * The function check if the MSC function is ready - * @param phost: Host handle - * @retval USBH Status - */ -uint8_t USBH_MSC_IsReady (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return (MSC_Handle->state == MSC_IDLE); - } - else - { - return 0; - } -} - -/** - * @brief USBH_MSC_GetMaxLUN - * The function return the Max LUN supported - * @param phost: Host handle - * @retval logical Unit Number supported - */ -int8_t USBH_MSC_GetMaxLUN (USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->gState != HOST_CLASS) && (MSC_Handle->state == MSC_IDLE)) - { - return MSC_Handle->max_lun; - } - return 0xFF; -} - -/** - * @brief USBH_MSC_UnitIsReady - * The function check whether a LUN is ready - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval Lun status (0: not ready / 1: ready) - */ -uint8_t USBH_MSC_UnitIsReady (USBH_HandleTypeDef *phost, uint8_t lun) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if(phost->gState == HOST_CLASS) - { - return (MSC_Handle->unit[lun].error == MSC_OK); - } - else - { - return 0; - } -} - -/** - * @brief USBH_MSC_GetLUNInfo - * The function return a LUN information - * @param phost: Host handle - * @param lun: logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_GetLUNInfo(USBH_HandleTypeDef *phost, uint8_t lun, MSC_LUNTypeDef *info) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - if(phost->gState == HOST_CLASS) - { - USBH_memcpy(info,&MSC_Handle->unit[lun], sizeof(MSC_LUNTypeDef)); - return USBH_OK; - } - else - { - return USBH_FAIL; - } -} - -/** - * @brief USBH_MSC_Read - * The function performs a Read operation - * @param phost: Host handle - * @param lun: logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to read - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - uint32_t timeout; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->device.is_connected == 0) || - (phost->gState != HOST_CLASS) || - (MSC_Handle->unit[lun].state != MSC_IDLE)) - { - return USBH_FAIL; - } - MSC_Handle->state = MSC_READ; - MSC_Handle->unit[lun].state = MSC_READ; - MSC_Handle->rw_lun = lun; - USBH_MSC_SCSI_Read(phost, - lun, - address, - pbuf, - length); - - timeout = phost->Timer + (10000 * length); - while (USBH_MSC_RdWrProcess(phost, lun) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - MSC_Handle->state = MSC_IDLE; - return USBH_FAIL; - } - } - MSC_Handle->state = MSC_IDLE; - return USBH_OK; -} - -/** - * @brief USBH_MSC_Write - * The function performs a Write operation - * @param phost: Host handle - * @param lun: logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to write - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - uint32_t timeout; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - if ((phost->device.is_connected == 0) || - (phost->gState != HOST_CLASS) || - (MSC_Handle->unit[lun].state != MSC_IDLE)) - { - return USBH_FAIL; - } - MSC_Handle->state = MSC_WRITE; - MSC_Handle->unit[lun].state = MSC_WRITE; - MSC_Handle->rw_lun = lun; - USBH_MSC_SCSI_Write(phost, - lun, - address, - pbuf, - length); - - timeout = phost->Timer + (10000 * length); - while (USBH_MSC_RdWrProcess(phost, lun) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - MSC_Handle->state = MSC_IDLE; - return USBH_FAIL; - } - } - MSC_Handle->state = MSC_IDLE; - return USBH_OK; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c deleted file mode 100644 index 5489ce29780aa..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_bot.c +++ /dev/null @@ -1,633 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_bot.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file includes the BOT protocol related functions - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_msc_bot.h" -#include "usbh_msc.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MSC_CLASS -* @{ -*/ - -/** @defgroup USBH_MSC_BOT -* @brief This file includes the mass storage related functions -* @{ -*/ - - -/** @defgroup USBH_MSC_BOT_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MSC_BOT_Private_Defines -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MSC_BOT_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_MSC_BOT_Abort(USBH_HandleTypeDef *phost, uint8_t lun, uint8_t dir); -static BOT_CSWStatusTypeDef USBH_MSC_DecodeCSW(USBH_HandleTypeDef *phost); -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Exported_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MSC_BOT_Private_Functions -* @{ -*/ - -/** - * @brief USBH_MSC_BOT_REQ_Reset - * The function the MSC BOT Reset request. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_Reset(USBH_HandleTypeDef *phost) -{ - - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = USB_REQ_BOT_RESET; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_MSC_BOT_REQ_GetMaxLUN - * The function the MSC BOT GetMaxLUN request. - * @param phost: Host handle - * @param Maxlun: pointer to Maxlun variable - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_REQ_GetMaxLUN(USBH_HandleTypeDef *phost, uint8_t *Maxlun) -{ - phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \ - USB_REQ_RECIPIENT_INTERFACE; - - phost->Control.setup.b.bRequest = USB_REQ_GET_MAX_LUN; - phost->Control.setup.b.wValue.w = 0; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 1; - - return USBH_CtlReq(phost, Maxlun , 1 ); -} - - - -/** - * @brief USBH_MSC_BOT_Init - * The function Initializes the BOT protocol. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_Init(USBH_HandleTypeDef *phost) -{ - - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - MSC_Handle->hbot.cbw.field.Signature = BOT_CBW_SIGNATURE; - MSC_Handle->hbot.cbw.field.Tag = BOT_CBW_TAG; - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_SEND; - - return USBH_OK; -} - - - -/** - * @brief USBH_MSC_BOT_Process - * The function handle the BOT protocol. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_StatusTypeDef error = USBH_BUSY; - BOT_CSWStatusTypeDef CSW_Status = BOT_CSW_CMD_FAILED; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - uint8_t toggle = 0; - - switch (MSC_Handle->hbot.state) - { - case BOT_SEND_CBW: - MSC_Handle->hbot.cbw.field.LUN = lun; - MSC_Handle->hbot.state = BOT_SEND_CBW_WAIT; - USBH_BulkSendData (phost, - MSC_Handle->hbot.cbw.data, - BOT_CBW_LENGTH, - MSC_Handle->OutPipe, - 1); - - break; - - case BOT_SEND_CBW_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->OutPipe); - - if(URB_Status == USBH_URB_DONE) - { - if ( MSC_Handle->hbot.cbw.field.DataTransferLength != 0 ) - { - /* If there is Data Transfer Stage */ - if (((MSC_Handle->hbot.cbw.field.Flags) & USB_REQ_DIR_MASK) == USB_D2H) - { - /* Data Direction is IN */ - MSC_Handle->hbot.state = BOT_DATA_IN; - } - else - { - /* Data Direction is OUT */ - MSC_Handle->hbot.state = BOT_DATA_OUT; - } - } - - else - {/* If there is NO Data Transfer Stage */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - - } - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send CBW */ - MSC_Handle->hbot.state = BOT_SEND_CBW; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_DATA_IN: - /* Send first packet */ - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , - MSC_Handle->InPipe); - - MSC_Handle->hbot.state = BOT_DATA_IN_WAIT; - - break; - - case BOT_DATA_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->InPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > MSC_Handle->InEpSize) - { - MSC_Handle->hbot.pbuf += MSC_Handle->InEpSize; - MSC_Handle->hbot.cbw.field.DataTransferLength -= MSC_Handle->InEpSize; - } - else - { - MSC_Handle->hbot.cbw.field.DataTransferLength = 0; - } - - /* More Data To be Received */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > 0) - { - /* Send next packet */ - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , - MSC_Handle->InPipe); - - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(URB_Status == USBH_URB_STALL) - { - /* This is Data IN Stage STALL Condition */ - MSC_Handle->hbot.state = BOT_ERROR_IN; - - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - 6.7.2 Host expects to receive data from the device - 3. On a STALL condition receiving data, then: - The host shall accept the data received. - The host shall clear the Bulk-In pipe. - 4. The host shall attempt to receive a CSW.*/ - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_DATA_OUT: - - USBH_BulkSendData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , - MSC_Handle->OutPipe, - 1); - - - MSC_Handle->hbot.state = BOT_DATA_OUT_WAIT; - break; - - case BOT_DATA_OUT_WAIT: - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->OutPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > MSC_Handle->OutEpSize) - { - MSC_Handle->hbot.pbuf += MSC_Handle->OutEpSize; - MSC_Handle->hbot.cbw.field.DataTransferLength -= MSC_Handle->OutEpSize; - } - else - { - MSC_Handle->hbot.cbw.field.DataTransferLength = 0; - } - - /* More Data To be Sent */ - if(MSC_Handle->hbot.cbw.field.DataTransferLength > 0) - { - USBH_BulkSendData (phost, - MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , - MSC_Handle->OutPipe, - 1); - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send same data */ - MSC_Handle->hbot.state = BOT_DATA_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_OUT; - - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - 6.7.3 Ho - Host expects to send data to the device - 3. On a STALL condition sending data, then: - " The host shall clear the Bulk-Out pipe. - 4. The host shall attempt to receive a CSW. - */ -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_RECEIVE_CSW: - - USBH_BulkReceiveData (phost, - MSC_Handle->hbot.csw.data, - BOT_CSW_LENGTH , - MSC_Handle->InPipe); - - MSC_Handle->hbot.state = BOT_RECEIVE_CSW_WAIT; - break; - - case BOT_RECEIVE_CSW_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, MSC_Handle->InPipe); - - /* Decode CSW */ - if(URB_Status == USBH_URB_DONE) - { - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_SEND; - CSW_Status = USBH_MSC_DecodeCSW(phost); - - if(CSW_Status == BOT_CSW_CMD_PASSED) - { - status = USBH_OK; - } - else - { - status = USBH_FAIL; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MSC_Handle->hbot.state = BOT_ERROR_IN; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case BOT_ERROR_IN: - error = USBH_MSC_BOT_Abort(phost, lun, BOT_DIR_IN); - - if (error == USBH_OK) - { - MSC_Handle->hbot.state = BOT_RECEIVE_CSW; - } - else if (error == USBH_UNRECOVERED_ERROR) - { - /* This means that there is a STALL Error limit, Do Reset Recovery */ - MSC_Handle->hbot.state = BOT_UNRECOVERED_ERROR; - } - break; - - case BOT_ERROR_OUT: - error = USBH_MSC_BOT_Abort(phost, lun, BOT_DIR_OUT); - - if ( error == USBH_OK) - { - - toggle = USBH_LL_GetToggle(phost, MSC_Handle->OutPipe); - USBH_LL_SetToggle(phost, MSC_Handle->OutPipe, 1- toggle); - USBH_LL_SetToggle(phost, MSC_Handle->InPipe, 0); - MSC_Handle->hbot.state = BOT_ERROR_IN; - } - else if (error == USBH_UNRECOVERED_ERROR) - { - MSC_Handle->hbot.state = BOT_UNRECOVERED_ERROR; - } - break; - - - case BOT_UNRECOVERED_ERROR: - status = USBH_MSC_BOT_REQ_Reset(phost); - if ( status == USBH_OK) - { - MSC_Handle->hbot.state = BOT_SEND_CBW; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_MSC_BOT_Abort - * The function handle the BOT Abort process. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param dir: direction (0: out / 1 : in) - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MSC_BOT_Abort(USBH_HandleTypeDef *phost, uint8_t lun, uint8_t dir) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch (dir) - { - case BOT_DIR_IN : - /* send ClrFeture on Bulk IN endpoint */ - status = USBH_ClrFeature(phost, MSC_Handle->InEp); - - break; - - case BOT_DIR_OUT : - /*send ClrFeature on Bulk OUT endpoint */ - status = USBH_ClrFeature(phost, MSC_Handle->OutEp); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_MSC_BOT_DecodeCSW - * This function decodes the CSW received by the device and updates the - * same to upper layer. - * @param phost: Host handle - * @retval USBH Status - * @notes - * Refer to USB Mass-Storage Class : BOT (www.usb.org) - * 6.3.1 Valid CSW Conditions : - * The host shall consider the CSW valid when: - * 1. dCSWSignature is equal to 53425355h - * 2. the CSW is 13 (Dh) bytes in length, - * 3. dCSWTag matches the dCBWTag from the corresponding CBW. - */ - -static BOT_CSWStatusTypeDef USBH_MSC_DecodeCSW(USBH_HandleTypeDef *phost) -{ - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - BOT_CSWStatusTypeDef status = BOT_CSW_CMD_FAILED; - - /*Checking if the transfer length is diffrent than 13*/ - if(USBH_LL_GetLastXferSize(phost, MSC_Handle->InPipe) != BOT_CSW_LENGTH) - { - /*(4) Hi > Dn (Host expects to receive data from the device, - Device intends to transfer no data) - (5) Hi > Di (Host expects to receive data from the device, - Device intends to send data to the host) - (9) Ho > Dn (Host expects to send data to the device, - Device intends to transfer no data) - (11) Ho > Do (Host expects to send data to the device, - Device intends to receive data from the host)*/ - - - status = BOT_CSW_PHASE_ERROR; - } - else - { /* CSW length is Correct */ - - /* Check validity of the CSW Signature and CSWStatus */ - if(MSC_Handle->hbot.csw.field.Signature == BOT_CSW_SIGNATURE) - {/* Check Condition 1. dCSWSignature is equal to 53425355h */ - - if(MSC_Handle->hbot.csw.field.Tag == MSC_Handle->hbot.cbw.field.Tag) - { - /* Check Condition 3. dCSWTag matches the dCBWTag from the - corresponding CBW */ - - if(MSC_Handle->hbot.csw.field.Status == 0) - { - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - - Hn Host expects no data transfers - Hi Host expects to receive data from the device - Ho Host expects to send data to the device - - Dn Device intends to transfer no data - Di Device intends to send data to the host - Do Device intends to receive data from the host - - Section 6.7 - (1) Hn = Dn (Host expects no data transfers, - Device intends to transfer no data) - (6) Hi = Di (Host expects to receive data from the device, - Device intends to send data to the host) - (12) Ho = Do (Host expects to send data to the device, - Device intends to receive data from the host) - - */ - - status = BOT_CSW_CMD_PASSED; - } - else if(MSC_Handle->hbot.csw.field.Status == 1) - { - status = BOT_CSW_CMD_FAILED; - } - - else if(MSC_Handle->hbot.csw.field.Status == 2) - { - /* Refer to USB Mass-Storage Class : BOT (www.usb.org) - Section 6.7 - (2) Hn < Di ( Host expects no data transfers, - Device intends to send data to the host) - (3) Hn < Do ( Host expects no data transfers, - Device intends to receive data from the host) - (7) Hi < Di ( Host expects to receive data from the device, - Device intends to send data to the host) - (8) Hi <> Do ( Host expects to receive data from the device, - Device intends to receive data from the host) - (10) Ho <> Di (Host expects to send data to the device, - Di Device intends to send data to the host) - (13) Ho < Do (Host expects to send data to the device, - Device intends to receive data from the host) - */ - - status = BOT_CSW_PHASE_ERROR; - } - } /* CSW Tag Matching is Checked */ - } /* CSW Signature Correct Checking */ - else - { - /* If the CSW Signature is not valid, We sall return the Phase Error to - Upper Layers for Reset Recovery */ - - status = BOT_CSW_PHASE_ERROR; - } - } /* CSW Length Check*/ - - return status; -} - - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c b/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c deleted file mode 100644 index 5d069b40a8e61..0000000000000 --- a/ports/stm32/usbhost/Class/MSC/Src/usbh_msc_scsi.c +++ /dev/null @@ -1,458 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_msc_scsi.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the SCSI commands - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_msc.h" -#include "usbh_msc_scsi.h" -#include "usbh_msc_bot.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MSC_CLASS - * @{ - */ - -/** @defgroup USBH_MSC_SCSI - * @brief This file includes the mass storage related functions - * @{ - */ - - -/** @defgroup USBH_MSC_SCSI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MSC_SCSI_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Exported_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_MSC_SCSI_Private_Functions - * @{ - */ - - -/** - * @brief USBH_MSC_SCSI_TestUnitReady - * Issue TestUnitReady command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_TestUnitReady (USBH_HandleTypeDef *phost, - uint8_t lun) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_MODE_TEST_UNIT_READY; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_OUT; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_TEST_UNIT_READY; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_ReadCapacity - * Issue Read Capacity command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the capacity structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_ReadCapacity (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_CapacityTypeDef *capacity) -{ - USBH_StatusTypeDef error = USBH_BUSY ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_READ_CAPACITY10; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_READ_CAPACITY10; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - /*assign the capacity*/ - capacity->block_nbr = MSC_Handle->hbot.pbuf[3] | (MSC_Handle->hbot.pbuf[2] << 8) |\ - (MSC_Handle->hbot.pbuf[1] << 16) | (MSC_Handle->hbot.pbuf[0] << 24); - - /*assign the page length*/ - capacity->block_size = MSC_Handle->hbot.pbuf[7] | (MSC_Handle->hbot.pbuf[6] << 8); - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Inquiry - * Issue Inquiry command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the inquiry structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Inquiry (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_StdInquiryDataTypeDef *inquiry) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_INQUIRY; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_INQUIRY; - MSC_Handle->hbot.cbw.field.CB[1] = (lun << 5); - MSC_Handle->hbot.cbw.field.CB[2] = 0; - MSC_Handle->hbot.cbw.field.CB[3] = 0; - MSC_Handle->hbot.cbw.field.CB[4] = 0x24; - MSC_Handle->hbot.cbw.field.CB[5] = 0; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - USBH_memset(inquiry, 0, sizeof(SCSI_StdInquiryDataTypeDef)); - /*assign Inquiry Data */ - inquiry->DeviceType = MSC_Handle->hbot.pbuf[0] & 0x1F; - inquiry->PeripheralQualifier = MSC_Handle->hbot.pbuf[0] >> 5; - inquiry->RemovableMedia = (MSC_Handle->hbot.pbuf[1] & 0x80)== 0x80; - USBH_memcpy (inquiry->vendor_id, &MSC_Handle->hbot.pbuf[8], 8); - USBH_memcpy (inquiry->product_id, &MSC_Handle->hbot.pbuf[16], 16); - USBH_memcpy (inquiry->revision_id, &MSC_Handle->hbot.pbuf[32], 4); - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_RequestSense - * Issue RequestSense command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param capacity: pointer to the sense data structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_RequestSense (USBH_HandleTypeDef *phost, - uint8_t lun, - SCSI_SenseTypeDef *sense_data) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = DATA_LEN_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.CB[1] = (lun << 5); - MSC_Handle->hbot.cbw.field.CB[2] = 0; - MSC_Handle->hbot.cbw.field.CB[3] = 0; - MSC_Handle->hbot.cbw.field.CB[4] = DATA_LEN_REQUEST_SENSE; - MSC_Handle->hbot.cbw.field.CB[5] = 0; - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = (uint8_t *)MSC_Handle->hbot.data; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - - error = USBH_MSC_BOT_Process(phost, lun); - - if(error == USBH_OK) - { - sense_data->key = MSC_Handle->hbot.pbuf[2] & 0x0F; - sense_data->asc = MSC_Handle->hbot.pbuf[12]; - sense_data->ascq = MSC_Handle->hbot.pbuf[13]; - } - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Write - * Issue write10 command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to write - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Write(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = length * 512; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_OUT; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_WRITE10; - - /*logical block address*/ - MSC_Handle->hbot.cbw.field.CB[2] = (((uint8_t*)&address)[3]); - MSC_Handle->hbot.cbw.field.CB[3] = (((uint8_t*)&address)[2]); - MSC_Handle->hbot.cbw.field.CB[4] = (((uint8_t*)&address)[1]); - MSC_Handle->hbot.cbw.field.CB[5] = (((uint8_t*)&address)[0]); - - - /*Tranfer length */ - MSC_Handle->hbot.cbw.field.CB[7] = (((uint8_t *)&length)[1]) ; - MSC_Handle->hbot.cbw.field.CB[8] = (((uint8_t *)&length)[0]) ; - - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = pbuf; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - -/** - * @brief USBH_MSC_SCSI_Read - * Issue Read10 command. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @param address: sector address - * @param pbuf: pointer to data - * @param length: number of sector to read - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MSC_SCSI_Read(USBH_HandleTypeDef *phost, - uint8_t lun, - uint32_t address, - uint8_t *pbuf, - uint32_t length) -{ - USBH_StatusTypeDef error = USBH_FAIL ; - MSC_HandleTypeDef *MSC_Handle = phost->pActiveClass->pData; - - switch(MSC_Handle->hbot.cmd_state) - { - case BOT_CMD_SEND: - - /*Prepare the CBW and relevent field*/ - MSC_Handle->hbot.cbw.field.DataTransferLength = length * 512; - MSC_Handle->hbot.cbw.field.Flags = USB_EP_DIR_IN; - MSC_Handle->hbot.cbw.field.CBLength = CBW_LENGTH; - - USBH_memset(MSC_Handle->hbot.cbw.field.CB, 0, CBW_CB_LENGTH); - MSC_Handle->hbot.cbw.field.CB[0] = OPCODE_READ10; - - /*logical block address*/ - MSC_Handle->hbot.cbw.field.CB[2] = (((uint8_t*)&address)[3]); - MSC_Handle->hbot.cbw.field.CB[3] = (((uint8_t*)&address)[2]); - MSC_Handle->hbot.cbw.field.CB[4] = (((uint8_t*)&address)[1]); - MSC_Handle->hbot.cbw.field.CB[5] = (((uint8_t*)&address)[0]); - - - /*Tranfer length */ - MSC_Handle->hbot.cbw.field.CB[7] = (((uint8_t *)&length)[1]) ; - MSC_Handle->hbot.cbw.field.CB[8] = (((uint8_t *)&length)[0]) ; - - - MSC_Handle->hbot.state = BOT_SEND_CBW; - MSC_Handle->hbot.cmd_state = BOT_CMD_WAIT; - MSC_Handle->hbot.pbuf = pbuf; - error = USBH_BUSY; - break; - - case BOT_CMD_WAIT: - error = USBH_MSC_BOT_Process(phost, lun); - break; - - default: - break; - } - - return error; -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h b/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h deleted file mode 100644 index 704a410fdf31c..0000000000000 --- a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp.h +++ /dev/null @@ -1,263 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_mtp.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MTP_CORE_H -#define __USBH_MTP_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp_ptp.h" -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_CORE -* @brief This file is the Header file for USBH_MTP_CORE.c -* @{ -*/ - - - - -/*Communication Class codes*/ -#define USB_MTP_CLASS 0x06 /* Still Image Class)*/ -#define MTP_MAX_STORAGE_UNITS_NBR PTP_MAX_STORAGE_UNITS_NBR - -/** - * @} - */ - -/** @defgroup USBH_MTP_CORE_Exported_Types -* @{ -*/ -typedef enum -{ - MTP_IDLE = 0, - MTP_GETDEVICEINFO , - MTP_OPENSESSION , - MTP_CLOSESESSION , - MTP_GETSTORAGEIDS , - MTP_GETSTORAGEINFO , -} -MTP_StateTypeDef; - - -typedef enum -{ - MTP_EVENTS_INIT = 0, - MTP_EVENTS_GETDATA , -} -MTP_EventsStateTypeDef; - - -typedef struct -{ - MTP_EventsStateTypeDef state; - uint32_t timer; - uint16_t poll; - PTP_EventContainerTypedef container; -} -MTP_EventHandleTypedef; - -typedef struct -{ - - uint32_t CurrentStorageId; - uint32_t ObjectFormatCode; - uint32_t CurrentObjectHandler; - uint8_t ObjectHandlerNbr; - uint32_t Objdepth; -} -MTP_ParamsTypedef; - - -typedef struct -{ - PTP_DeviceInfoTypedef devinfo; - PTP_StorageIDsTypedef storids; - PTP_StorageInfoTypedef storinfo[MTP_MAX_STORAGE_UNITS_NBR]; - PTP_ObjectHandlesTypedef Handles; -} -MTP_InfoTypedef; - -/* Structure for MTP process */ -typedef struct _MTP_Process -{ - MTP_InfoTypedef info; - MTP_ParamsTypedef params; - - uint8_t DataInPipe; - uint8_t DataOutPipe; - uint8_t NotificationPipe; - - uint8_t DataOutEp; - uint8_t DataInEp; - uint8_t NotificationEp; - - uint16_t DataOutEpSize; - uint16_t DataInEpSize; - uint16_t NotificationEpSize; - MTP_StateTypeDef state; - MTP_EventHandleTypedef events; - PTP_HandleTypeDef ptp; - uint32_t current_storage_unit; - uint32_t is_ready; -} -MTP_HandleTypeDef; - -#define MTP_StorageInfoTypedef PTP_StorageInfoTypedef -#define MTP_ObjectHandlesTypedef PTP_ObjectHandlesTypedef -#define MTP_ObjectInfoTypedef PTP_ObjectInfoTypedef -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef MTP_Class; -#define USBH_MTP_CLASS &MTP_Class - -/** -* @} -*/ - -/** @defgroup USBH_MTP_CORE_Exported_FunctionsPrototype -* @{ -*/ -uint8_t USBH_MTP_IsReady (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_MTP_SelectStorage (USBH_HandleTypeDef *phost, uint8_t storage_idx); -USBH_StatusTypeDef USBH_MTP_GetNumStorage (USBH_HandleTypeDef *phost, uint8_t *storage_num); -USBH_StatusTypeDef USBH_MTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs); -USBH_StatusTypeDef USBH_MTP_GetStorageInfo (USBH_HandleTypeDef *phost, - uint8_t storage_idx, - MTP_StorageInfoTypedef *info); - -USBH_StatusTypeDef USBH_MTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles); - -USBH_StatusTypeDef USBH_MTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo); - -USBH_StatusTypeDef USBH_MTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode); - -USBH_StatusTypeDef USBH_MTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object); - -USBH_StatusTypeDef USBH_MTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd); - -USBH_StatusTypeDef USBH_MTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops); - -USBH_StatusTypeDef USBH_MTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size); - -USBH_StatusTypeDef USBH_MTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc); - -void USBH_MTP_EventsCallback(USBH_HandleTypeDef *phost, uint32_t event, uint32_t param); -/** -* @} -*/ - - -#endif /* __USBH_MTP_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h b/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h deleted file mode 100644 index 3fbddd87bff2a..0000000000000 --- a/ports/stm32/usbhost/Class/MTP/Inc/usbh_mtp_ptp.h +++ /dev/null @@ -1,1038 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp_ptp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_mtp_ptp.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_MTP_PTP_H__ -#define __USBH_MTP_PTP_H__ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_CLASS - * @{ - */ - -/** @addtogroup USBH_MTP_PTP_CLASS - * @{ - */ - -/** @defgroup USBH_MTP_PTP - * @brief This file is the Header file for usbh_mtp_ptp.c - * @{ - */ - - -/* Operation Codes */ - -/* PTP v1.0 operation codes */ -#define PTP_OC_Undefined 0x1000 -#define PTP_OC_GetDeviceInfo 0x1001 -#define PTP_OC_OpenSession 0x1002 -#define PTP_OC_CloseSession 0x1003 -#define PTP_OC_GetStorageIDs 0x1004 -#define PTP_OC_GetStorageInfo 0x1005 -#define PTP_OC_GetNumObjects 0x1006 -#define PTP_OC_GetObjectHandles 0x1007 -#define PTP_OC_GetObjectInfo 0x1008 -#define PTP_OC_GetObject 0x1009 -#define PTP_OC_GetThumb 0x100A -#define PTP_OC_DeleteObject 0x100B -#define PTP_OC_SendObjectInfo 0x100C -#define PTP_OC_SendObject 0x100D -#define PTP_OC_InitiateCapture 0x100E -#define PTP_OC_FormatStore 0x100F -#define PTP_OC_ResetDevice 0x1010 -#define PTP_OC_SelfTest 0x1011 -#define PTP_OC_SetObjectProtection 0x1012 -#define PTP_OC_PowerDown 0x1013 -#define PTP_OC_GetDevicePropDesc 0x1014 -#define PTP_OC_GetDevicePropValue 0x1015 -#define PTP_OC_SetDevicePropValue 0x1016 -#define PTP_OC_ResetDevicePropValue 0x1017 -#define PTP_OC_TerminateOpenCapture 0x1018 -#define PTP_OC_MoveObject 0x1019 -#define PTP_OC_CopyObject 0x101A -#define PTP_OC_GetPartialObject 0x101B -#define PTP_OC_InitiateOpenCapture 0x101C - -/* PTP v1.1 operation codes */ -#define PTP_OC_StartEnumHandles 0x101D -#define PTP_OC_EnumHandles 0x101E -#define PTP_OC_StopEnumHandles 0x101F -#define PTP_OC_GetVendorExtensionMaps 0x1020 -#define PTP_OC_GetVendorDeviceInfo 0x1021 -#define PTP_OC_GetResizedImageObject 0x1022 -#define PTP_OC_GetFilesystemManifest 0x1023 -#define PTP_OC_GetStreamInfo 0x1024 -#define PTP_OC_GetStream 0x1025 - - /* Microsoft / MTP extension codes */ -#define PTP_OC_GetObjectPropsSupported 0x9801 -#define PTP_OC_GetObjectPropDesc 0x9802 -#define PTP_OC_GetObjectPropValue 0x9803 -#define PTP_OC_SetObjectPropValue 0x9804 -#define PTP_OC_GetObjPropList 0x9805 -#define PTP_OC_SetObjPropList 0x9806 -#define PTP_OC_GetInterdependendPropdesc 0x9807 -#define PTP_OC_SendObjectPropList 0x9808 -#define PTP_OC_GetObjectReferences 0x9810 -#define PTP_OC_SetObjectReferences 0x9811 -#define PTP_OC_UpdateDeviceFirmware 0x9812 -#define PTP_OC_Skip 0x9820 - - -/* Response Codes */ - -/* PTP v1.0 response codes */ -#define PTP_RC_Undefined 0x2000 -#define PTP_RC_OK 0x2001 -#define PTP_RC_GeneralError 0x2002 -#define PTP_RC_SessionNotOpen 0x2003 -#define PTP_RC_InvalidTransactionID 0x2004 -#define PTP_RC_OperationNotSupported 0x2005 -#define PTP_RC_ParameterNotSupported 0x2006 -#define PTP_RC_IncompleteTransfer 0x2007 -#define PTP_RC_InvalidStorageId 0x2008 -#define PTP_RC_InvalidObjectHandle 0x2009 -#define PTP_RC_DevicePropNotSupported 0x200A -#define PTP_RC_InvalidObjectFormatCode 0x200B -#define PTP_RC_StoreFull 0x200C -#define PTP_RC_ObjectWriteProtected 0x200D -#define PTP_RC_StoreReadOnly 0x200E -#define PTP_RC_AccessDenied 0x200F -#define PTP_RC_NoThumbnailPresent 0x2010 -#define PTP_RC_SelfTestFailed 0x2011 -#define PTP_RC_PartialDeletion 0x2012 -#define PTP_RC_StoreNotAvailable 0x2013 -#define PTP_RC_SpecificationByFormatUnsupported 0x2014 -#define PTP_RC_NoValidObjectInfo 0x2015 -#define PTP_RC_InvalidCodeFormat 0x2016 -#define PTP_RC_UnknownVendorCode 0x2017 -#define PTP_RC_CaptureAlreadyTerminated 0x2018 -#define PTP_RC_DeviceBusy 0x2019 -#define PTP_RC_InvalidParentObject 0x201A -#define PTP_RC_InvalidDevicePropFormat 0x201B -#define PTP_RC_InvalidDevicePropValue 0x201C -#define PTP_RC_InvalidParameter 0x201D -#define PTP_RC_SessionAlreadyOpened 0x201E -#define PTP_RC_TransactionCanceled 0x201F -#define PTP_RC_SpecificationOfDestinationUnsupported 0x2020 -/* PTP v1.1 response codes */ -#define PTP_RC_InvalidEnumHandle 0x2021 -#define PTP_RC_NoStreamEnabled 0x2022 -#define PTP_RC_InvalidDataSet 0x2023 - -/* USB container types */ - -#define PTP_USB_CONTAINER_UNDEFINED 0x0000 -#define PTP_USB_CONTAINER_COMMAND 0x0001 -#define PTP_USB_CONTAINER_DATA 0x0002 -#define PTP_USB_CONTAINER_RESPONSE 0x0003 -#define PTP_USB_CONTAINER_EVENT 0x0004 - -/* PTP/IP definitions */ -#define PTPIP_INIT_COMMAND_REQUEST 1 -#define PTPIP_INIT_COMMAND_ACK 2 -#define PTPIP_INIT_EVENT_REQUEST 3 -#define PTPIP_INIT_EVENT_ACK 4 -#define PTPIP_INIT_FAIL 5 -#define PTPIP_CMD_REQUEST 6 -#define PTPIP_CMD_RESPONSE 7 -#define PTPIP_EVENT 8 -#define PTPIP_START_DATA_PACKET 9 -#define PTPIP_DATA_PACKET 10 -#define PTPIP_CANCEL_TRANSACTION 11 -#define PTPIP_END_DATA_PACKET 12 -#define PTPIP_PING 13 -#define PTPIP_PONG 14 - -/* Transaction data phase description */ -#define PTP_DP_NODATA 0x0000 /* no data phase */ -#define PTP_DP_SENDDATA 0x0001 /* sending data */ -#define PTP_DP_GETDATA 0x0002 /* receiving data */ -#define PTP_DP_DATA_MASK 0x00ff /* data phase mask */ - -/** @defgroup USBH_MTP_PTP_Exported_Types - * @{ - */ - -typedef enum -{ - PTP_REQ_IDLE = 0, - PTP_REQ_SEND = 1, - PTP_REQ_WAIT, - PTP_REQ_ERROR, -} -PTP_RequestStateTypeDef; - -typedef enum -{ - PTP_IDLE = 0, - PTP_OP_REQUEST_STATE, - PTP_OP_REQUEST_WAIT_STATE, - PTP_DATA_OUT_PHASE_STATE, - PTP_DATA_OUT_PHASE_WAIT_STATE, - PTP_DATA_IN_PHASE_STATE, - PTP_DATA_IN_PHASE_WAIT_STATE, - PTP_RESPONSE_STATE, - PTP_RESPONSE_WAIT_STATE, - PTP_ERROR, -} -PTP_ProcessStateTypeDef; - -/* PTP request/response/event general PTP container (transport independent) */ -typedef struct -{ - uint16_t Code; - uint32_t SessionID; - uint32_t Transaction_ID; - /* params may be of any type of size less or equal to uint32_t */ - uint32_t Param1; - uint32_t Param2; - uint32_t Param3; - /* events can only have three parameters */ - uint32_t Param4; - uint32_t Param5; - /* the number of meaningfull parameters */ - uint8_t Nparam; -} -PTP_ContainerTypedef; - -#define PTP_USB_BULK_HS_MAX_PACKET_LEN_WRITE 1024 -#define PTP_USB_BULK_HS_MAX_PACKET_LEN_READ 1024 -#define PTP_USB_BULK_HDR_LEN (2*sizeof(uint32_t)+2*sizeof(uint16_t)) -#define PTP_USB_BULK_PAYLOAD_LEN_WRITE (PTP_USB_BULK_HS_MAX_PACKET_LEN_WRITE-PTP_USB_BULK_HDR_LEN) -#define PTP_USB_BULK_PAYLOAD_LEN_READ (PTP_USB_BULK_HS_MAX_PACKET_LEN_READ-PTP_USB_BULK_HDR_LEN) -#define PTP_USB_BULK_REQ_LEN (PTP_USB_BULK_HDR_LEN+5*sizeof(uint32_t)) -#define PTP_USB_BULK_REQ_RESP_MAX_LEN 63 - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; -} -PTP_RespContainerTypedef; - - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; -} -PTP_OpContainerTypedef; - -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - union { - struct { - uint32_t param1; - uint32_t param2; - uint32_t param3; - uint32_t param4; - uint32_t param5; - } params; - uint8_t data[PTP_USB_BULK_PAYLOAD_LEN_READ]; - }payload; -} -PTP_DataContainerTypedef; - -/* PTP USB Asynchronous Event Interrupt Data Format */ -typedef struct -{ - uint32_t length; - uint16_t type; - uint16_t code; - uint32_t trans_id; - uint32_t param1; - uint32_t param2; - uint32_t param3; -} -PTP_EventContainerTypedef; - -/* Structure for PTP Transport process */ -typedef struct -{ - PTP_ProcessStateTypeDef state; - PTP_RequestStateTypeDef req_state; - PTP_OpContainerTypedef op_container; - PTP_DataContainerTypedef data_container; - PTP_RespContainerTypedef resp_container; - - /* ptp transaction ID */ - uint32_t transaction_id; - - /* ptp session ID */ - uint32_t session_id; - - /* device flags */ - uint32_t flags; - - /****** PTP transfer control *******/ - - /* Data pointer */ - uint8_t *data_ptr; - - /* Data length */ - int32_t data_length; - - /* Data length */ - uint32_t data_packet; - - /* Data length */ - uint32_t iteration; - - /* Packet Index */ - uint32_t data_packet_counter; - - /****** Object transfer control *******/ - - /* object pointer */ - uint8_t *object_ptr; - -} -PTP_HandleTypeDef; - -/* DeviceInfo data offset */ -#define PTP_di_StandardVersion 0 -#define PTP_di_VendorExtensionID 2 -#define PTP_di_VendorExtensionVersion 6 -#define PTP_di_VendorExtensionDesc 8 -#define PTP_di_FunctionalMode 8 -#define PTP_di_OperationsSupported 10 - -/* Max info items size */ -#define PTP_SUPPORTED_OPERATIONS_NBR 100 -#define PTP_SUPPORTED_EVENTS_NBR 100 -#define PTP_SUPPORTED_PROPRIETIES_NBR 100 -#define PTP_CAPTURE_FORMATS_NBR 100 -#define PTP_IMAGE_FORMATS_NBR 100 -#define PTP_MAX_STR_SIZE 255 -/* PTP device info structure */ -typedef struct -{ - uint16_t StandardVersion; - uint32_t VendorExtensionID; - uint16_t VendorExtensionVersion; - uint8_t VendorExtensionDesc[PTP_MAX_STR_SIZE]; - uint16_t FunctionalMode; - uint32_t OperationsSupported_len; - uint16_t OperationsSupported[PTP_SUPPORTED_OPERATIONS_NBR]; - uint32_t EventsSupported_len; - uint16_t EventsSupported[PTP_SUPPORTED_EVENTS_NBR]; - uint32_t DevicePropertiesSupported_len; - uint16_t DevicePropertiesSupported[PTP_SUPPORTED_PROPRIETIES_NBR]; - uint32_t CaptureFormats_len; - uint16_t CaptureFormats[PTP_CAPTURE_FORMATS_NBR]; - uint32_t ImageFormats_len; - uint16_t ImageFormats[PTP_IMAGE_FORMATS_NBR]; - uint8_t Manufacturer[PTP_MAX_STR_SIZE]; - uint8_t Model[PTP_MAX_STR_SIZE]; - uint8_t DeviceVersion[PTP_MAX_STR_SIZE]; - uint8_t SerialNumber[PTP_MAX_STR_SIZE]; -} -PTP_DeviceInfoTypedef; - -#define PTP_MAX_STORAGE_UNITS_NBR 5 -/* PTP storageIDs structute (returned by GetStorageIDs) */ -typedef struct -{ - uint32_t n; - uint32_t Storage [PTP_MAX_STORAGE_UNITS_NBR]; -} -PTP_StorageIDsTypedef; - -/* PTP StorageInfo structure (returned by GetStorageInfo) */ - -#define PTP_si_StorageType 0 -#define PTP_si_FilesystemType 2 -#define PTP_si_AccessCapability 4 -#define PTP_si_MaxCapability 6 -#define PTP_si_FreeSpaceInBytes 14 -#define PTP_si_FreeSpaceInImages 22 -#define PTP_si_StorageDescription 26 - - -/* PTP Storage Types */ - -#define PTP_ST_Undefined 0x0000 -#define PTP_ST_FixedROM 0x0001 -#define PTP_ST_RemovableROM 0x0002 -#define PTP_ST_FixedRAM 0x0003 -#define PTP_ST_RemovableRAM 0x0004 - -/* PTP FilesystemType Values */ - -#define PTP_FST_Undefined 0x0000 -#define PTP_FST_GenericFlat 0x0001 -#define PTP_FST_GenericHierarchical 0x0002 -#define PTP_FST_DCF 0x0003 - -/* PTP StorageInfo AccessCapability Values */ - -#define PTP_AC_ReadWrite 0x0000 -#define PTP_AC_ReadOnly 0x0001 -#define PTP_AC_ReadOnly_with_Object_Deletion 0x0002 - -typedef struct -{ - uint16_t StorageType; - uint16_t FilesystemType; - uint16_t AccessCapability; - uint64_t MaxCapability; - uint64_t FreeSpaceInBytes; - uint32_t FreeSpaceInImages; - uint8_t StorageDescription[PTP_MAX_STR_SIZE]; - uint8_t VolumeLabel[PTP_MAX_STR_SIZE]; -} -PTP_StorageInfoTypedef; - -/* PTP Object Format Codes */ - -/* ancillary formats */ -#define PTP_OFC_Undefined 0x3000 -#define PTP_OFC_Defined 0x3800 -#define PTP_OFC_Association 0x3001 -#define PTP_OFC_Script 0x3002 -#define PTP_OFC_Executable 0x3003 -#define PTP_OFC_Text 0x3004 -#define PTP_OFC_HTML 0x3005 -#define PTP_OFC_DPOF 0x3006 -#define PTP_OFC_AIFF 0x3007 -#define PTP_OFC_WAV 0x3008 -#define PTP_OFC_MP3 0x3009 -#define PTP_OFC_AVI 0x300A -#define PTP_OFC_MPEG 0x300B -#define PTP_OFC_ASF 0x300C -#define PTP_OFC_QT 0x300D /* guessing */ -/* image formats */ -#define PTP_OFC_EXIF_JPEG 0x3801 -#define PTP_OFC_TIFF_EP 0x3802 -#define PTP_OFC_FlashPix 0x3803 -#define PTP_OFC_BMP 0x3804 -#define PTP_OFC_CIFF 0x3805 -#define PTP_OFC_Undefined_0x3806 0x3806 -#define PTP_OFC_GIF 0x3807 -#define PTP_OFC_JFIF 0x3808 -#define PTP_OFC_PCD 0x3809 -#define PTP_OFC_PICT 0x380A -#define PTP_OFC_PNG 0x380B -#define PTP_OFC_Undefined_0x380C 0x380C -#define PTP_OFC_TIFF 0x380D -#define PTP_OFC_TIFF_IT 0x380E -#define PTP_OFC_JP2 0x380F -#define PTP_OFC_JPX 0x3810 -/* ptp v1.1 has only DNG new */ -#define PTP_OFC_DNG 0x3811 - -/* MTP extensions */ -#define PTP_OFC_MTP_MediaCard 0xb211 -#define PTP_OFC_MTP_MediaCardGroup 0xb212 -#define PTP_OFC_MTP_Encounter 0xb213 -#define PTP_OFC_MTP_EncounterBox 0xb214 -#define PTP_OFC_MTP_M4A 0xb215 -#define PTP_OFC_MTP_ZUNEUNDEFINED 0xb217 /* Unknown file type */ -#define PTP_OFC_MTP_Firmware 0xb802 -#define PTP_OFC_MTP_WindowsImageFormat 0xb881 -#define PTP_OFC_MTP_UndefinedAudio 0xb900 -#define PTP_OFC_MTP_WMA 0xb901 -#define PTP_OFC_MTP_OGG 0xb902 -#define PTP_OFC_MTP_AAC 0xb903 -#define PTP_OFC_MTP_AudibleCodec 0xb904 -#define PTP_OFC_MTP_FLAC 0xb906 -#define PTP_OFC_MTP_SamsungPlaylist 0xb909 -#define PTP_OFC_MTP_UndefinedVideo 0xb980 -#define PTP_OFC_MTP_WMV 0xb981 -#define PTP_OFC_MTP_MP4 0xb982 -#define PTP_OFC_MTP_MP2 0xb983 -#define PTP_OFC_MTP_3GP 0xb984 -#define PTP_OFC_MTP_UndefinedCollection 0xba00 -#define PTP_OFC_MTP_AbstractMultimediaAlbum 0xba01 -#define PTP_OFC_MTP_AbstractImageAlbum 0xba02 -#define PTP_OFC_MTP_AbstractAudioAlbum 0xba03 -#define PTP_OFC_MTP_AbstractVideoAlbum 0xba04 -#define PTP_OFC_MTP_AbstractAudioVideoPlaylist 0xba05 -#define PTP_OFC_MTP_AbstractContactGroup 0xba06 -#define PTP_OFC_MTP_AbstractMessageFolder 0xba07 -#define PTP_OFC_MTP_AbstractChapteredProduction 0xba08 -#define PTP_OFC_MTP_AbstractAudioPlaylist 0xba09 -#define PTP_OFC_MTP_AbstractVideoPlaylist 0xba0a -#define PTP_OFC_MTP_AbstractMediacast 0xba0b -#define PTP_OFC_MTP_WPLPlaylist 0xba10 -#define PTP_OFC_MTP_M3UPlaylist 0xba11 -#define PTP_OFC_MTP_MPLPlaylist 0xba12 -#define PTP_OFC_MTP_ASXPlaylist 0xba13 -#define PTP_OFC_MTP_PLSPlaylist 0xba14 -#define PTP_OFC_MTP_UndefinedDocument 0xba80 -#define PTP_OFC_MTP_AbstractDocument 0xba81 -#define PTP_OFC_MTP_XMLDocument 0xba82 -#define PTP_OFC_MTP_MSWordDocument 0xba83 -#define PTP_OFC_MTP_MHTCompiledHTMLDocument 0xba84 -#define PTP_OFC_MTP_MSExcelSpreadsheetXLS 0xba85 -#define PTP_OFC_MTP_MSPowerpointPresentationPPT 0xba86 -#define PTP_OFC_MTP_UndefinedMessage 0xbb00 -#define PTP_OFC_MTP_AbstractMessage 0xbb01 -#define PTP_OFC_MTP_UndefinedContact 0xbb80 -#define PTP_OFC_MTP_AbstractContact 0xbb81 -#define PTP_OFC_MTP_vCard2 0xbb82 -#define PTP_OFC_MTP_vCard3 0xbb83 -#define PTP_OFC_MTP_UndefinedCalendarItem 0xbe00 -#define PTP_OFC_MTP_AbstractCalendarItem 0xbe01 -#define PTP_OFC_MTP_vCalendar1 0xbe02 -#define PTP_OFC_MTP_vCalendar2 0xbe03 -#define PTP_OFC_MTP_UndefinedWindowsExecutable 0xbe80 -#define PTP_OFC_MTP_MediaCast 0xbe81 -#define PTP_OFC_MTP_Section 0xbe82 - -/* MTP specific Object Properties */ -#define PTP_OPC_StorageID 0xDC01 -#define PTP_OPC_ObjectFormat 0xDC02 -#define PTP_OPC_ProtectionStatus 0xDC03 -#define PTP_OPC_ObjectSize 0xDC04 -#define PTP_OPC_AssociationType 0xDC05 -#define PTP_OPC_AssociationDesc 0xDC06 -#define PTP_OPC_ObjectFileName 0xDC07 -#define PTP_OPC_DateCreated 0xDC08 -#define PTP_OPC_DateModified 0xDC09 -#define PTP_OPC_Keywords 0xDC0A -#define PTP_OPC_ParentObject 0xDC0B -#define PTP_OPC_AllowedFolderContents 0xDC0C -#define PTP_OPC_Hidden 0xDC0D -#define PTP_OPC_SystemObject 0xDC0E -#define PTP_OPC_PersistantUniqueObjectIdentifier 0xDC41 -#define PTP_OPC_SyncID 0xDC42 -#define PTP_OPC_PropertyBag 0xDC43 -#define PTP_OPC_Name 0xDC44 -#define PTP_OPC_CreatedBy 0xDC45 -#define PTP_OPC_Artist 0xDC46 -#define PTP_OPC_DateAuthored 0xDC47 -#define PTP_OPC_Description 0xDC48 -#define PTP_OPC_URLReference 0xDC49 -#define PTP_OPC_LanguageLocale 0xDC4A -#define PTP_OPC_CopyrightInformation 0xDC4B -#define PTP_OPC_Source 0xDC4C -#define PTP_OPC_OriginLocation 0xDC4D -#define PTP_OPC_DateAdded 0xDC4E -#define PTP_OPC_NonConsumable 0xDC4F -#define PTP_OPC_CorruptOrUnplayable 0xDC50 -#define PTP_OPC_ProducerSerialNumber 0xDC51 -#define PTP_OPC_RepresentativeSampleFormat 0xDC81 -#define PTP_OPC_RepresentativeSampleSize 0xDC82 -#define PTP_OPC_RepresentativeSampleHeight 0xDC83 -#define PTP_OPC_RepresentativeSampleWidth 0xDC84 -#define PTP_OPC_RepresentativeSampleDuration 0xDC85 -#define PTP_OPC_RepresentativeSampleData 0xDC86 -#define PTP_OPC_Width 0xDC87 -#define PTP_OPC_Height 0xDC88 -#define PTP_OPC_Duration 0xDC89 -#define PTP_OPC_Rating 0xDC8A -#define PTP_OPC_Track 0xDC8B -#define PTP_OPC_Genre 0xDC8C -#define PTP_OPC_Credits 0xDC8D -#define PTP_OPC_Lyrics 0xDC8E -#define PTP_OPC_SubscriptionContentID 0xDC8F -#define PTP_OPC_ProducedBy 0xDC90 -#define PTP_OPC_UseCount 0xDC91 -#define PTP_OPC_SkipCount 0xDC92 -#define PTP_OPC_LastAccessed 0xDC93 -#define PTP_OPC_ParentalRating 0xDC94 -#define PTP_OPC_MetaGenre 0xDC95 -#define PTP_OPC_Composer 0xDC96 -#define PTP_OPC_EffectiveRating 0xDC97 -#define PTP_OPC_Subtitle 0xDC98 -#define PTP_OPC_OriginalReleaseDate 0xDC99 -#define PTP_OPC_AlbumName 0xDC9A -#define PTP_OPC_AlbumArtist 0xDC9B -#define PTP_OPC_Mood 0xDC9C -#define PTP_OPC_DRMStatus 0xDC9D -#define PTP_OPC_SubDescription 0xDC9E -#define PTP_OPC_IsCropped 0xDCD1 -#define PTP_OPC_IsColorCorrected 0xDCD2 -#define PTP_OPC_ImageBitDepth 0xDCD3 -#define PTP_OPC_Fnumber 0xDCD4 -#define PTP_OPC_ExposureTime 0xDCD5 -#define PTP_OPC_ExposureIndex 0xDCD6 -#define PTP_OPC_DisplayName 0xDCE0 -#define PTP_OPC_BodyText 0xDCE1 -#define PTP_OPC_Subject 0xDCE2 -#define PTP_OPC_Priority 0xDCE3 -#define PTP_OPC_GivenName 0xDD00 -#define PTP_OPC_MiddleNames 0xDD01 -#define PTP_OPC_FamilyName 0xDD02 -#define PTP_OPC_Prefix 0xDD03 -#define PTP_OPC_Suffix 0xDD04 -#define PTP_OPC_PhoneticGivenName 0xDD05 -#define PTP_OPC_PhoneticFamilyName 0xDD06 -#define PTP_OPC_EmailPrimary 0xDD07 -#define PTP_OPC_EmailPersonal1 0xDD08 -#define PTP_OPC_EmailPersonal2 0xDD09 -#define PTP_OPC_EmailBusiness1 0xDD0A -#define PTP_OPC_EmailBusiness2 0xDD0B -#define PTP_OPC_EmailOthers 0xDD0C -#define PTP_OPC_PhoneNumberPrimary 0xDD0D -#define PTP_OPC_PhoneNumberPersonal 0xDD0E -#define PTP_OPC_PhoneNumberPersonal2 0xDD0F -#define PTP_OPC_PhoneNumberBusiness 0xDD10 -#define PTP_OPC_PhoneNumberBusiness2 0xDD11 -#define PTP_OPC_PhoneNumberMobile 0xDD12 -#define PTP_OPC_PhoneNumberMobile2 0xDD13 -#define PTP_OPC_FaxNumberPrimary 0xDD14 -#define PTP_OPC_FaxNumberPersonal 0xDD15 -#define PTP_OPC_FaxNumberBusiness 0xDD16 -#define PTP_OPC_PagerNumber 0xDD17 -#define PTP_OPC_PhoneNumberOthers 0xDD18 -#define PTP_OPC_PrimaryWebAddress 0xDD19 -#define PTP_OPC_PersonalWebAddress 0xDD1A -#define PTP_OPC_BusinessWebAddress 0xDD1B -#define PTP_OPC_InstantMessengerAddress 0xDD1C -#define PTP_OPC_InstantMessengerAddress2 0xDD1D -#define PTP_OPC_InstantMessengerAddress3 0xDD1E -#define PTP_OPC_PostalAddressPersonalFull 0xDD1F -#define PTP_OPC_PostalAddressPersonalFullLine1 0xDD20 -#define PTP_OPC_PostalAddressPersonalFullLine2 0xDD21 -#define PTP_OPC_PostalAddressPersonalFullCity 0xDD22 -#define PTP_OPC_PostalAddressPersonalFullRegion 0xDD23 -#define PTP_OPC_PostalAddressPersonalFullPostalCode 0xDD24 -#define PTP_OPC_PostalAddressPersonalFullCountry 0xDD25 -#define PTP_OPC_PostalAddressBusinessFull 0xDD26 -#define PTP_OPC_PostalAddressBusinessLine1 0xDD27 -#define PTP_OPC_PostalAddressBusinessLine2 0xDD28 -#define PTP_OPC_PostalAddressBusinessCity 0xDD29 -#define PTP_OPC_PostalAddressBusinessRegion 0xDD2A -#define PTP_OPC_PostalAddressBusinessPostalCode 0xDD2B -#define PTP_OPC_PostalAddressBusinessCountry 0xDD2C -#define PTP_OPC_PostalAddressOtherFull 0xDD2D -#define PTP_OPC_PostalAddressOtherLine1 0xDD2E -#define PTP_OPC_PostalAddressOtherLine2 0xDD2F -#define PTP_OPC_PostalAddressOtherCity 0xDD30 -#define PTP_OPC_PostalAddressOtherRegion 0xDD31 -#define PTP_OPC_PostalAddressOtherPostalCode 0xDD32 -#define PTP_OPC_PostalAddressOtherCountry 0xDD33 -#define PTP_OPC_OrganizationName 0xDD34 -#define PTP_OPC_PhoneticOrganizationName 0xDD35 -#define PTP_OPC_Role 0xDD36 -#define PTP_OPC_Birthdate 0xDD37 -#define PTP_OPC_MessageTo 0xDD40 -#define PTP_OPC_MessageCC 0xDD41 -#define PTP_OPC_MessageBCC 0xDD42 -#define PTP_OPC_MessageRead 0xDD43 -#define PTP_OPC_MessageReceivedTime 0xDD44 -#define PTP_OPC_MessageSender 0xDD45 -#define PTP_OPC_ActivityBeginTime 0xDD50 -#define PTP_OPC_ActivityEndTime 0xDD51 -#define PTP_OPC_ActivityLocation 0xDD52 -#define PTP_OPC_ActivityRequiredAttendees 0xDD54 -#define PTP_OPC_ActivityOptionalAttendees 0xDD55 -#define PTP_OPC_ActivityResources 0xDD56 -#define PTP_OPC_ActivityAccepted 0xDD57 -#define PTP_OPC_Owner 0xDD5D -#define PTP_OPC_Editor 0xDD5E -#define PTP_OPC_Webmaster 0xDD5F -#define PTP_OPC_URLSource 0xDD60 -#define PTP_OPC_URLDestination 0xDD61 -#define PTP_OPC_TimeBookmark 0xDD62 -#define PTP_OPC_ObjectBookmark 0xDD63 -#define PTP_OPC_ByteBookmark 0xDD64 -#define PTP_OPC_LastBuildDate 0xDD70 -#define PTP_OPC_TimetoLive 0xDD71 -#define PTP_OPC_MediaGUID 0xDD72 -#define PTP_OPC_TotalBitRate 0xDE91 -#define PTP_OPC_BitRateType 0xDE92 -#define PTP_OPC_SampleRate 0xDE93 -#define PTP_OPC_NumberOfChannels 0xDE94 -#define PTP_OPC_AudioBitDepth 0xDE95 -#define PTP_OPC_ScanDepth 0xDE97 -#define PTP_OPC_AudioWAVECodec 0xDE99 -#define PTP_OPC_AudioBitRate 0xDE9A -#define PTP_OPC_VideoFourCCCodec 0xDE9B -#define PTP_OPC_VideoBitRate 0xDE9C -#define PTP_OPC_FramesPerThousandSeconds 0xDE9D -#define PTP_OPC_KeyFrameDistance 0xDE9E -#define PTP_OPC_BufferSize 0xDE9F -#define PTP_OPC_EncodingQuality 0xDEA0 -#define PTP_OPC_EncodingProfile 0xDEA1 -#define PTP_OPC_BuyFlag 0xD901 - -/* WiFi Provisioning MTP Extension property codes */ -#define PTP_OPC_WirelessConfigurationFile 0xB104 - - -/* PTP Association Types */ -#define PTP_AT_Undefined 0x0000 -#define PTP_AT_GenericFolder 0x0001 -#define PTP_AT_Album 0x0002 -#define PTP_AT_TimeSequence 0x0003 -#define PTP_AT_HorizontalPanoramic 0x0004 -#define PTP_AT_VerticalPanoramic 0x0005 -#define PTP_AT_2DPanoramic 0x0006 -#define PTP_AT_AncillaryData 0x0007 - -#define PTP_MAX_HANDLER_NBR 0x255 -typedef struct -{ - uint32_t n; - uint32_t Handler[PTP_MAX_HANDLER_NBR]; -} -PTP_ObjectHandlesTypedef; - - -#define PTP_oi_StorageID 0 -#define PTP_oi_ObjectFormat 4 -#define PTP_oi_ProtectionStatus 6 -#define PTP_oi_ObjectCompressedSize 8 -#define PTP_oi_ThumbFormat 12 -#define PTP_oi_ThumbCompressedSize 14 -#define PTP_oi_ThumbPixWidth 18 -#define PTP_oi_ThumbPixHeight 22 -#define PTP_oi_ImagePixWidth 26 -#define PTP_oi_ImagePixHeight 30 -#define PTP_oi_ImageBitDepth 34 -#define PTP_oi_ParentObject 38 -#define PTP_oi_AssociationType 42 -#define PTP_oi_AssociationDesc 44 -#define PTP_oi_SequenceNumber 48 -#define PTP_oi_filenamelen 52 -#define PTP_oi_Filename 53 - -typedef struct -{ - uint32_t StorageID; - uint16_t ObjectFormat; - uint16_t ProtectionStatus; - /* In the regular objectinfo this is 32bit, but we keep the general object size here - that also arrives via other methods and so use 64bit */ - uint64_t ObjectCompressedSize; - uint16_t ThumbFormat; - uint32_t ThumbCompressedSize; - uint32_t ThumbPixWidth; - uint32_t ThumbPixHeight; - uint32_t ImagePixWidth; - uint32_t ImagePixHeight; - uint32_t ImageBitDepth; - uint32_t ParentObject; - uint16_t AssociationType; - uint32_t AssociationDesc; - uint32_t SequenceNumber; - uint8_t Filename[PTP_MAX_STR_SIZE]; - uint32_t CaptureDate; - uint32_t ModificationDate; - uint8_t Keywords[PTP_MAX_STR_SIZE]; -} -PTP_ObjectInfoTypedef; - -/* Object Property Describing Dataset (DevicePropDesc) */ - -typedef union _PTP_PropertyValueTypedef -{ - char str[PTP_MAX_STR_SIZE]; - uint8_t u8; - int8_t i8; - uint16_t u16; - int16_t i16; - uint32_t u32; - int32_t i32; - uint64_t u64; - int64_t i64; - - struct array { - uint32_t count; - union _PTP_PropertyValueTypedef *v; - } a; -}PTP_PropertyValueTypedef; - -typedef struct -{ - PTP_PropertyValueTypedef MinimumValue; - PTP_PropertyValueTypedef MaximumValue; - PTP_PropertyValueTypedef StepSize; -} -PTP_PropDescRangeFormTypedef; - -/* Property Describing Dataset, Enum Form */ - -typedef struct -{ - uint16_t NumberOfValues; - PTP_PropertyValueTypedef SupportedValue[PTP_SUPPORTED_PROPRIETIES_NBR]; -} -PTP_PropDescEnumFormTypedef; - -/* (MTP) Object Property pack/unpack */ -#define PTP_opd_ObjectPropertyCode 0 -#define PTP_opd_DataType 2 -#define PTP_opd_GetSet 4 -#define PTP_opd_FactoryDefaultValue 5 - -typedef struct -{ - uint16_t ObjectPropertyCode; - uint16_t DataType; - uint8_t GetSet; - PTP_PropertyValueTypedef FactoryDefaultValue; - uint32_t GroupCode; - uint8_t FormFlag; - union { - PTP_PropDescEnumFormTypedef Enum; - PTP_PropDescRangeFormTypedef Range; - } FORM; -} -PTP_ObjectPropDescTypeDef; - -/* Metadata lists for MTP operations */ -typedef struct -{ - uint16_t property; - uint16_t datatype; - uint32_t ObjectHandle; - PTP_PropertyValueTypedef propval; -} -MTP_PropertiesTypedef; - - -/* Device Property Form Flag */ - -#define PTP_DPFF_None 0x00 -#define PTP_DPFF_Range 0x01 -#define PTP_DPFF_Enumeration 0x02 - -/* Object Property Codes used by MTP (first 3 are same as DPFF codes) */ -#define PTP_OPFF_None 0x00 -#define PTP_OPFF_Range 0x01 -#define PTP_OPFF_Enumeration 0x02 -#define PTP_OPFF_DateTime 0x03 -#define PTP_OPFF_FixedLengthArray 0x04 -#define PTP_OPFF_RegularExpression 0x05 -#define PTP_OPFF_ByteArray 0x06 -#define PTP_OPFF_LongString 0xFF - -/* Device Property pack/unpack */ - -#define PTP_dpd_DevicePropertyCode 0 -#define PTP_dpd_DataType 2 -#define PTP_dpd_GetSet 4 -#define PTP_dpd_FactoryDefaultValue 5 - -/* Device Property Describing Dataset (DevicePropDesc) */ - -typedef struct -{ - uint16_t DevicePropertyCode; - uint16_t DataType; - uint8_t GetSet; - PTP_PropertyValueTypedef FactoryDefaultValue; - PTP_PropertyValueTypedef CurrentValue; - uint8_t FormFlag; - union { - PTP_PropDescEnumFormTypedef Enum; - PTP_PropDescRangeFormTypedef Range; - } FORM; -} -PTP_DevicePropDescTypdef; - -/* DataType Codes */ - -#define PTP_DTC_UNDEF 0x0000 -#define PTP_DTC_INT8 0x0001 -#define PTP_DTC_UINT8 0x0002 -#define PTP_DTC_INT16 0x0003 -#define PTP_DTC_UINT16 0x0004 -#define PTP_DTC_INT32 0x0005 -#define PTP_DTC_UINT32 0x0006 -#define PTP_DTC_INT64 0x0007 -#define PTP_DTC_UINT64 0x0008 -#define PTP_DTC_INT128 0x0009 -#define PTP_DTC_UINT128 0x000A - -#define PTP_DTC_ARRAY_MASK 0x4000 - -#define PTP_DTC_AINT8 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT8) -#define PTP_DTC_AUINT8 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT8) -#define PTP_DTC_AINT16 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT16) -#define PTP_DTC_AUINT16 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT16) -#define PTP_DTC_AINT32 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT32) -#define PTP_DTC_AUINT32 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT32) -#define PTP_DTC_AINT64 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT64) -#define PTP_DTC_AUINT64 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT64) -#define PTP_DTC_AINT128 (PTP_DTC_ARRAY_MASK | PTP_DTC_INT128) -#define PTP_DTC_AUINT128 (PTP_DTC_ARRAY_MASK | PTP_DTC_UINT128) - -#define PTP_DTC_STR 0xFFFF - -/* PTP Event Codes */ - -#define PTP_EC_Undefined 0x4000 -#define PTP_EC_CancelTransaction 0x4001 -#define PTP_EC_ObjectAdded 0x4002 -#define PTP_EC_ObjectRemoved 0x4003 -#define PTP_EC_StoreAdded 0x4004 -#define PTP_EC_StoreRemoved 0x4005 -#define PTP_EC_DevicePropChanged 0x4006 -#define PTP_EC_ObjectInfoChanged 0x4007 -#define PTP_EC_DeviceInfoChanged 0x4008 -#define PTP_EC_RequestObjectTransfer 0x4009 -#define PTP_EC_StoreFull 0x400A -#define PTP_EC_DeviceReset 0x400B -#define PTP_EC_StorageInfoChanged 0x400C -#define PTP_EC_CaptureComplete 0x400D -#define PTP_EC_UnreportedStatus 0x400E - - -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_MTP_PTP_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_PTP_Init(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_PTP_Process (USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_PTP_SendRequest (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req); -USBH_StatusTypeDef USBH_PTP_GetResponse (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req); - -USBH_StatusTypeDef USBH_PTP_OpenSession (USBH_HandleTypeDef *phost, uint32_t session); -USBH_StatusTypeDef USBH_PTP_GetDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -USBH_StatusTypeDef USBH_PTP_GetStorageIds (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *storage_ids); - -USBH_StatusTypeDef USBH_PTP_GetStorageInfo (USBH_HandleTypeDef *phost, - uint32_t storage_id, - PTP_StorageInfoTypedef *storage_info); - -USBH_StatusTypeDef USBH_PTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs); - -USBH_StatusTypeDef USBH_PTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles); - -USBH_StatusTypeDef USBH_PTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo); - -USBH_StatusTypeDef USBH_PTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode); - -USBH_StatusTypeDef USBH_PTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object); - -USBH_StatusTypeDef USBH_PTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, uint8_t *object, - uint32_t *len); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd); - -USBH_StatusTypeDef USBH_PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops); - -USBH_StatusTypeDef USBH_PTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size); - -USBH_StatusTypeDef USBH_PTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc); - -/** - * @} - */ - -#endif //__USBH_MTP_PTP_H__ - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c b/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c deleted file mode 100644 index d93aa4238c94c..0000000000000 --- a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp.c +++ /dev/null @@ -1,1065 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the MTP Layer Handlers for USB Host MTP class. - * - * @verbatim - * - * =================================================================== - * MTP Class Description - * =================================================================== - * This module manages the MSC class V1.11 following the "Device Class Definition - * for Human Interface Devices (MTP) Version 1.11 Jun 27, 2001". - * This driver implements the following aspects of the specification: - * - The Boot Interface Subclass - * - The Mouse and Keyboard protocols - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_CORE -* @brief This file includes MTP Layer Handlers for USB Host MTP class. -* @{ -*/ - -/** @defgroup USBH_MTP_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_MTP_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_ClassRequest (USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindCtlEndpoint(USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindDataOutEndpoint(USBH_HandleTypeDef *phost); - -static uint8_t MTP_FindDataInEndpoint(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_SOFProcess (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_MTP_Events (USBH_HandleTypeDef *phost); - -static void MTP_DecodeEvent (USBH_HandleTypeDef *phost) ; - -USBH_ClassTypeDef MTP_Class = -{ - "MTP", - USB_MTP_CLASS, - USBH_MTP_InterfaceInit, - USBH_MTP_InterfaceDeInit, - USBH_MTP_ClassRequest, - USBH_MTP_Process, - USBH_MTP_SOFProcess, - NULL, -}; -/** -* @} -*/ - - -/** @defgroup USBH_MTP_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_MTP_InterfaceInit - * The function init the MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_InterfaceInit (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK ; - uint8_t interface, endpoint; - - MTP_HandleTypeDef *MTP_Handle; - - interface = USBH_FindInterface(phost, - USB_MTP_CLASS, - 1, - 1); - - if(interface == 0xFF) /* No Valid Interface */ - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot Find the interface for Still Image Class."); - } - else - { - USBH_SelectInterface (phost, interface); - - endpoint = MTP_FindCtlEndpoint(phost); - - phost->pActiveClass->pData = (MTP_HandleTypeDef *)USBH_malloc (sizeof(MTP_HandleTypeDef)); - MTP_Handle = phost->pActiveClass->pData; - - if( MTP_Handle == NULL) - { - status = USBH_FAIL; - USBH_DbgLog ("Cannot allocate RAM for MTP Handle"); - } - - /*Collect the control endpoint address and length*/ - MTP_Handle->NotificationEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->NotificationEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->NotificationPipe = USBH_AllocPipe(phost, MTP_Handle->NotificationEp); - MTP_Handle->events.poll = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bInterval; - - /* Open pipe for Notification endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->NotificationPipe, - MTP_Handle->NotificationEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_INTR, - MTP_Handle->NotificationEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->NotificationPipe, 0); - - - endpoint = MTP_FindDataInEndpoint(phost); - - /*Collect the control endpoint address and length*/ - MTP_Handle->DataInEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->DataInEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->DataInPipe = USBH_AllocPipe(phost, MTP_Handle->DataInEp); - - /* Open pipe for DATA IN endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->DataInPipe, - MTP_Handle->DataInEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MTP_Handle->DataInEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->DataInPipe, 0); - - endpoint = MTP_FindDataOutEndpoint(phost); - - /*Collect the DATA OUT endpoint address and length*/ - MTP_Handle->DataOutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress; - MTP_Handle->DataOutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize; - MTP_Handle->DataOutPipe = USBH_AllocPipe(phost, MTP_Handle->DataOutEp); - - /* Open pipe for DATA OUT endpoint */ - USBH_OpenPipe (phost, - MTP_Handle->DataOutPipe, - MTP_Handle->DataOutEp, - phost->device.address, - phost->device.speed, - USB_EP_TYPE_BULK, - MTP_Handle->DataOutEpSize); - - USBH_LL_SetToggle (phost, MTP_Handle->DataOutPipe, 0); - - - MTP_Handle->state = MTP_OPENSESSION; - MTP_Handle->is_ready = 0; - MTP_Handle->events.state = MTP_EVENTS_INIT; - return USBH_PTP_Init(phost); - - } - return status; -} - -/** - * @brief Find MTP Ctl interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindCtlEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_INTERRUPT) == USBH_EP_INTERRUPT)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - - -/** - * @brief Find MTP DATA OUT interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindDataOutEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - - if(((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80) == 0)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_BULK) == USBH_EP_BULK)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - -/** - * @brief Find MTP DATA IN interface - * @param phost: Host handle - * @retval USBH Status - */ -static uint8_t MTP_FindDataInEndpoint(USBH_HandleTypeDef *phost) -{ - uint8_t interface, endpoint; - - for (interface = 0; interface < USBH_MAX_NUM_INTERFACES ; interface ++ ) - { - if(phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass == USB_MTP_CLASS) - { - for (endpoint = 0; endpoint < USBH_MAX_NUM_ENDPOINTS ; endpoint ++ ) - { - - if((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bEndpointAddress & 0x80)&& - (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].wMaxPacketSize > 0)&& - ((phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[endpoint].bmAttributes & USBH_EP_BULK) == USBH_EP_BULK)) - { - return endpoint; - } - } - } - } - - return 0xFF; /* Invalid Endpoint */ -} - - -/** - * @brief USBH_MTP_InterfaceDeInit - * The function DeInit the Pipes used for the MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if (MTP_Handle->DataOutPipe) - { - USBH_ClosePipe(phost, MTP_Handle->DataOutPipe); - USBH_FreePipe (phost, MTP_Handle->DataOutPipe); - MTP_Handle->DataOutPipe = 0; /* Reset the Channel as Free */ - } - - if (MTP_Handle->DataInPipe) - { - USBH_ClosePipe(phost, MTP_Handle->DataInPipe); - USBH_FreePipe (phost, MTP_Handle->DataInPipe); - MTP_Handle->DataInPipe = 0; /* Reset the Channel as Free */ - } - - if (MTP_Handle->NotificationPipe) - { - USBH_ClosePipe(phost, MTP_Handle->NotificationPipe); - USBH_FreePipe (phost, MTP_Handle->NotificationPipe); - MTP_Handle->NotificationPipe = 0; /* Reset the Channel as Free */ - } - - if(phost->pActiveClass->pData) - { - USBH_free (phost->pActiveClass->pData); - phost->pActiveClass->pData = 0; - } - return USBH_OK; -} - -/** - * @brief USBH_MTP_ClassRequest - * The function is responsible for handling Standard requests - * for MTP class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_ClassRequest (USBH_HandleTypeDef *phost) -{ - return USBH_OK;; -} - - -/** - * @brief USBH_MTP_Process - * The function is for managing state machine for MTP data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t idx = 0; - - switch(MTP_Handle->state) - { - case MTP_OPENSESSION: - - status = USBH_PTP_OpenSession (phost, 1); /* Session '0' is not valid */ - - if(status == USBH_OK) - { - USBH_UsrLog("MTP Session #0 Opened"); - MTP_Handle->state = MTP_GETDEVICEINFO; - } - break; - - case MTP_GETDEVICEINFO: - status = USBH_PTP_GetDeviceInfo (phost, &(MTP_Handle->info.devinfo)); - - if(status == USBH_OK) - { - USBH_DbgLog(">>>>> MTP Device Information"); - USBH_DbgLog("Standard version : %x", MTP_Handle->info.devinfo.StandardVersion); - USBH_DbgLog("Vendor ExtID : %s", (MTP_Handle->info.devinfo.VendorExtensionID == 6)?"MTP": "NOT SUPPORTED"); - USBH_DbgLog("Functional mode : %s", (MTP_Handle->info.devinfo.FunctionalMode == 0) ? "Standard" : "Vendor"); - USBH_DbgLog("Number of Supported Operation(s) : %d", MTP_Handle->info.devinfo.OperationsSupported_len); - USBH_DbgLog("Number of Supported Events(s) : %d", MTP_Handle->info.devinfo.EventsSupported_len); - USBH_DbgLog("Number of Supported Proprieties : %d", MTP_Handle->info.devinfo.DevicePropertiesSupported_len); - USBH_DbgLog("Manufacturer : %s", MTP_Handle->info.devinfo.Manufacturer); - USBH_DbgLog("Model : %s", MTP_Handle->info.devinfo.Model); - USBH_DbgLog("Device version : %s", MTP_Handle->info.devinfo.DeviceVersion); - USBH_DbgLog("Serial number : %s", MTP_Handle->info.devinfo.SerialNumber); - - MTP_Handle->state = MTP_GETSTORAGEIDS; - } - break; - - case MTP_GETSTORAGEIDS: - status = USBH_PTP_GetStorageIds (phost, &(MTP_Handle->info.storids)); - - if(status == USBH_OK) - { - USBH_DbgLog("Number of storage ID items : %d", MTP_Handle->info.storids.n); - for (idx = 0; idx < MTP_Handle->info.storids.n; idx ++) - { - USBH_DbgLog("storage#%d ID : %x", idx, MTP_Handle->info.storids.Storage[idx]); - } - - MTP_Handle->current_storage_unit = 0; - MTP_Handle->state = MTP_GETSTORAGEINFO; - } - break; - - case MTP_GETSTORAGEINFO: - status = USBH_PTP_GetStorageInfo (phost, - MTP_Handle->info.storids.Storage[MTP_Handle->current_storage_unit], - &((MTP_Handle->info.storinfo)[MTP_Handle->current_storage_unit])); - - if(status == USBH_OK) - { - USBH_UsrLog("Volume#%lu: %s [%s]", MTP_Handle->current_storage_unit, - MTP_Handle->info.storinfo[MTP_Handle->current_storage_unit].StorageDescription, - MTP_Handle->info.storinfo[MTP_Handle->current_storage_unit].VolumeLabel); - if(++MTP_Handle->current_storage_unit >= MTP_Handle->info.storids.n) - { - MTP_Handle->state = MTP_IDLE; - MTP_Handle->is_ready = 1; - MTP_Handle->current_storage_unit = 0; - MTP_Handle->params.CurrentStorageId = MTP_Handle->info.storids.Storage[0]; - - USBH_UsrLog( "MTP Class initialized."); - USBH_UsrLog("%s is default storage unit", MTP_Handle->info.storinfo[0].StorageDescription); - phost->pUser(phost, HOST_USER_CLASS_ACTIVE); - } - } - break; - - case MTP_IDLE: - USBH_MTP_Events(phost); - default: - status = USBH_OK; - break; - } - return status; -} - -/** - * @brief USBH_MTP_SOFProcess - * The function is for managing SOF callback - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_SOFProcess (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_OK; - - return status; -} - -/** - * @brief USBH_MTP_IsReady - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -uint8_t USBH_MTP_IsReady (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - return (MTP_Handle->is_ready); -} - -/** - * @brief USBH_MTP_GetNumStorage - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetNumStorage (USBH_HandleTypeDef *phost, uint8_t *storage_num) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if(MTP_Handle->is_ready > 0) - { - *storage_num = MTP_Handle->info.storids.n; - status = USBH_OK; - } - - return status; -} - -/** - * @brief USBH_MTP_SelectStorage - * Select the storage Unit to be used - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_SelectStorage (USBH_HandleTypeDef *phost, uint8_t storage_idx) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - MTP_Handle->params.CurrentStorageId = MTP_Handle->info.storids.Storage[storage_idx]; - status = USBH_OK; - } - - return status; -} - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint8_t storage_idx, MTP_StorageInfoTypedef *info) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - *info = MTP_Handle->info.storinfo[storage_idx]; - status = USBH_OK; - } - return status; -} - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_idx, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - while ((status = USBH_PTP_GetNumObjects (phost, - MTP_Handle->info.storids.Storage[storage_idx], - objectformatcode, - associationOH, - numobs)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - - -/** - * @brief USBH_MTP_GetStorageInfo - * Get the storage Unit info - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_idx, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if((storage_idx < MTP_Handle->info.storids.n) && (MTP_Handle->is_ready)) - { - while ((status = USBH_PTP_GetObjectHandles (phost, - MTP_Handle->info.storids.Storage[storage_idx], - objectformatcode, - associationOH, - objecthandles)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectInfo - * Gets objert info - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* objectinfo) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectInfo (phost, handle, objectinfo)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} -/** - * @brief USBH_MTP_DeleteObject - * Delete an object. - * @param phost: Host handle - * @param handle : Object Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_DeleteObject (phost, handle, objectformatcode)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObject (phost, handle, object)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetPartialObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetPartialObject(phost, - handle, - offset, - maxbytes, - object, - len)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropsSupported - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropsSupported (phost, - ofc, - propnum, - props)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropDesc (phost, - opc, - ofc, - opd)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_GetObjectPropList - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetObjectPropList (phost, - handle, - pprops, - nrofprops)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - -/** - * @brief USBH_MTP_SendObject - * Send an object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size) -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_SendObject (phost, handle, object, size)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} - - /** - * @brief Handle HID Control process - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_MTP_Events (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY ; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - - switch(MTP_Handle->events.state) - { - case MTP_EVENTS_INIT: - if((phost->Timer & 1) == 0) - { - MTP_Handle->events.timer = phost->Timer; - USBH_InterruptReceiveData(phost, - (uint8_t *)&(MTP_Handle->events.container), - MTP_Handle->NotificationEpSize, - MTP_Handle->NotificationPipe); - - - MTP_Handle->events.state = MTP_EVENTS_GETDATA ; - } - break; - case MTP_EVENTS_GETDATA: - if(USBH_LL_GetURBState(phost , MTP_Handle->NotificationPipe) == USBH_URB_DONE) - { - MTP_DecodeEvent(phost); - } - - if(( phost->Timer - MTP_Handle->events.timer) >= MTP_Handle->events.poll) - { - MTP_Handle->events.timer = phost->Timer; - - USBH_InterruptReceiveData(phost, - (uint8_t *)&(MTP_Handle->events.container), - MTP_Handle->NotificationEpSize, - MTP_Handle->NotificationPipe); - - } - break; - - default: - break; - } - - return status; -} - -/** - * @brief MTP_DecodeEvent - * Decode device event sent by responder - * @param phost: Host handle - * @retval None - */ -static void MTP_DecodeEvent (USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - uint16_t code; - uint32_t param1; - - /* Process the event */ - code = MTP_Handle->events.container.code; - param1 = MTP_Handle->events.container.param1; - - switch(code) - { - case PTP_EC_Undefined: - USBH_DbgLog("EVT: PTP_EC_Undefined in session %u", MTP_Handle->ptp.session_id); - break; - case PTP_EC_CancelTransaction: - USBH_DbgLog("EVT: PTP_EC_CancelTransaction in session %u", MTP_Handle->ptp.session_id); - break; - case PTP_EC_ObjectAdded: - USBH_DbgLog("EVT: PTP_EC_ObjectAdded in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_ObjectRemoved: - USBH_DbgLog("EVT: PTP_EC_ObjectRemoved in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreAdded: - USBH_DbgLog("EVT: PTP_EC_StoreAdded in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreRemoved: - USBH_DbgLog("EVT: PTP_EC_StoreRemoved in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DevicePropChanged: - USBH_DbgLog("EVT: PTP_EC_DevicePropChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_ObjectInfoChanged: - USBH_DbgLog("EVT: PTP_EC_ObjectInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DeviceInfoChanged: - USBH_DbgLog("EVT: PTP_EC_DeviceInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_RequestObjectTransfer: - USBH_DbgLog("EVT: PTP_EC_RequestObjectTransfer in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StoreFull: - USBH_DbgLog("EVT: PTP_EC_StoreFull in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_DeviceReset: - USBH_DbgLog("EVT: PTP_EC_DeviceReset in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_StorageInfoChanged : - USBH_DbgLog( "EVT: PTP_EC_StorageInfoChanged in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_CaptureComplete : - USBH_DbgLog( "EVT: PTP_EC_CaptureComplete in session %u", MTP_Handle->ptp.session_id); - break; - - case PTP_EC_UnreportedStatus : - USBH_DbgLog( "EVT: PTP_EC_UnreportedStatus in session %u", MTP_Handle->ptp.session_id); - break; - - default : - USBH_DbgLog( "Received unknown event in session %u", MTP_Handle->ptp.session_id); - break; - } - - USBH_MTP_EventsCallback(phost, code, param1); -} - -/** - * @brief USBH_MTP_GetDevicePropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_MTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc) - -{ - USBH_StatusTypeDef status = USBH_FAIL; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint32_t timeout = phost->Timer + 5000; - - if(MTP_Handle->is_ready) - { - while ((status = USBH_PTP_GetDevicePropDesc (phost, propcode, devicepropertydesc)) == USBH_BUSY) - { - if((phost->Timer > timeout) || (phost->device.is_connected == 0)) - { - return USBH_FAIL; - } - } - } - return status; -} -/** - * @brief The function informs that host has rceived an event - * @param pdev: Selected device - * @retval None - */ -__weak void USBH_MTP_EventsCallback(USBH_HandleTypeDef *phost, uint32_t event, uint32_t param) -{ - -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c b/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c deleted file mode 100644 index dd5a293e6c829..0000000000000 --- a/ports/stm32/usbhost/Class/MTP/Src/usbh_mtp_ptp.c +++ /dev/null @@ -1,1769 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp_ptp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file includes the PTP operations layer - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_mtp_ptp.h" -#include "usbh_mtp.h" -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_MTP_CLASS -* @{ -*/ - -/** @defgroup USBH_MTP_PTP -* @brief This file includes the mass storage related functions -* @{ -*/ - - -/** @defgroup USBH_MTP_PTP_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_PTP_Private_Defines -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_MTP_PTP_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_Variables -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_FunctionPrototypes -* @{ -*/ -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -static void PTP_GetStorageIDs (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *stor_ids); -static void PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *stor_info); -static void PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, PTP_ObjectPropDescTypeDef *opd, uint32_t opdlen); -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info); -static void PTP_GetDevicePropValue(USBH_HandleTypeDef *phost, - uint32_t *offset, - uint32_t total, - PTP_PropertyValueTypedef* value, - uint16_t datatype); - -static uint32_t PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - MTP_PropertiesTypedef *props, - uint32_t len); - - -static void PTP_BufferFullCallback(USBH_HandleTypeDef *phost); -static void PTP_GetString(uint8_t *str, uint8_t* data, uint16_t *len); -static uint32_t PTP_GetArray16 (uint16_t *array, uint8_t *data, uint32_t offset); -static uint32_t PTP_GetArray32 (uint32_t *array, uint8_t *data, uint32_t offset); -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Exported_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_MTP_PTP_Private_Functions -* @{ -*/ -/** - * @brief USBH_PTP_Init - * The function Initializes the BOT protocol. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_Init(USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* Set state to idle to be ready for operations */ - MTP_Handle->ptp.state = PTP_IDLE; - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - - return USBH_OK; -} - -/** - * @brief USBH_PTP_Process - * The function handle the BOT protocol. - * @param phost: Host handle - * @param lun: Logical Unit Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_Process (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef status = USBH_BUSY; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - uint32_t len; - - switch (MTP_Handle->ptp.state) - { - case PTP_IDLE: - /*Do Nothing */ - break; - - case PTP_OP_REQUEST_STATE: - USBH_BulkSendData (phost, - (uint8_t*)&(MTP_Handle->ptp.op_container), - MTP_Handle->ptp.op_container.length, - MTP_Handle->DataOutPipe, - 1); - MTP_Handle->ptp.state = PTP_OP_REQUEST_WAIT_STATE; - break; - - case PTP_OP_REQUEST_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataOutPipe); - - if(URB_Status == USBH_URB_DONE) - { - if(MTP_Handle->ptp.flags == PTP_DP_NODATA) - { - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; - } - else if(MTP_Handle->ptp.flags == PTP_DP_SENDDATA) - { - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_STATE; - } - else if(MTP_Handle->ptp.flags == PTP_DP_GETDATA) - { - MTP_Handle->ptp.state = PTP_DATA_IN_PHASE_STATE; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send Request */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_DATA_OUT_PHASE_STATE: - - USBH_BulkSendData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataOutEpSize , - MTP_Handle->DataOutPipe, - 1); - - - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_WAIT_STATE; - break; - - case PTP_DATA_OUT_PHASE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataOutPipe); - - if(URB_Status == USBH_URB_DONE) - { - /* Adjudt Data pointer and data length */ - if(MTP_Handle->ptp.data_length > MTP_Handle->DataOutEpSize) - { - MTP_Handle->ptp.data_ptr += MTP_Handle->DataOutEpSize; - MTP_Handle->ptp.data_length -= MTP_Handle->DataOutEpSize; - MTP_Handle->ptp.data_packet += MTP_Handle->DataOutEpSize; - - if(MTP_Handle->ptp.data_packet >= PTP_USB_BULK_PAYLOAD_LEN_READ) - { - PTP_BufferFullCallback (phost); - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration++; - } - - } - else - { - MTP_Handle->ptp.data_length = 0; - } - - /* More Data To be Sent */ - if(MTP_Handle->ptp.data_length > 0) - { - USBH_BulkSendData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataOutEpSize , - MTP_Handle->DataOutPipe, - 1); - } - else - { - /* If value was 0, and successful transfer, then change the state */ - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_NOTREADY) - { - /* Re-send same data */ - MTP_Handle->ptp.state = PTP_DATA_OUT_PHASE_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_DATA_IN_PHASE_STATE: - /* Send first packet */ - USBH_BulkReceiveData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataInEpSize, - MTP_Handle->DataInPipe); - - MTP_Handle->ptp.state = PTP_DATA_IN_PHASE_WAIT_STATE; - break; - - case PTP_DATA_IN_PHASE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataInPipe); - - if(URB_Status == USBH_URB_DONE) - { - len = USBH_LL_GetLastXferSize (phost, MTP_Handle->DataInPipe); - - if( MTP_Handle->ptp.data_packet_counter++ == 0) - { - /* This is the first packet; so retrieve exact data length from payload */ - MTP_Handle->ptp.data_length = *(uint32_t*)(MTP_Handle->ptp.data_ptr); - MTP_Handle->ptp.iteration = 0; - } - - if((len >= MTP_Handle->DataInEpSize) && (MTP_Handle->ptp.data_length > 0)) - { - MTP_Handle->ptp.data_ptr += len; - MTP_Handle->ptp.data_length -= len; - MTP_Handle->ptp.data_packet += len; - - if(MTP_Handle->ptp.data_packet >= PTP_USB_BULK_PAYLOAD_LEN_READ) - { - PTP_BufferFullCallback (phost); - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration++; - } - - /* Continue receiving data*/ - USBH_BulkReceiveData (phost, - MTP_Handle->ptp.data_ptr, - MTP_Handle->DataInEpSize, - MTP_Handle->DataInPipe); - } - else - { - MTP_Handle->ptp.data_length -= len; - MTP_Handle->ptp.state = PTP_RESPONSE_STATE; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_RESPONSE_STATE: - - USBH_BulkReceiveData (phost, - (uint8_t*)&(MTP_Handle->ptp.resp_container), - PTP_USB_BULK_REQ_RESP_MAX_LEN , - MTP_Handle->DataInPipe); - - MTP_Handle->ptp.state = PTP_RESPONSE_WAIT_STATE; - break; - - case PTP_RESPONSE_WAIT_STATE: - URB_Status = USBH_LL_GetURBState(phost, MTP_Handle->DataInPipe); - - if(URB_Status == USBH_URB_DONE) - { - USBH_PTP_GetResponse (phost, &ptp_container); - - if(ptp_container.Code == PTP_RC_OK) - { - status = USBH_OK; - } - else - { - status = USBH_FAIL; - } - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - } - else if(URB_Status == USBH_URB_STALL) - { - MTP_Handle->ptp.state = PTP_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); -#endif - } - break; - - case PTP_ERROR: - MTP_Handle->ptp.req_state = PTP_REQ_SEND; - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_SendRequest (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *req) -{ - USBH_StatusTypeDef status = USBH_OK; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* Clear PTP Data container*/ - USBH_memset(&(MTP_Handle->ptp.op_container), 0, sizeof(PTP_OpContainerTypedef)); - - /* build appropriate USB container */ - MTP_Handle->ptp.op_container.length = PTP_USB_BULK_REQ_LEN- (sizeof(uint32_t)*(5-req->Nparam)); - MTP_Handle->ptp.op_container.type = PTP_USB_CONTAINER_COMMAND; - MTP_Handle->ptp.op_container.code = req->Code; - MTP_Handle->ptp.op_container.trans_id = req->Transaction_ID; - MTP_Handle->ptp.op_container.param1 = req->Param1; - MTP_Handle->ptp.op_container.param2 = req->Param2; - MTP_Handle->ptp.op_container.param3 = req->Param3; - MTP_Handle->ptp.op_container.param4 = req->Param4; - MTP_Handle->ptp.op_container.param5 = req->Param5; - - return status; -} - -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetResponse (USBH_HandleTypeDef *phost, PTP_ContainerTypedef *resp) -{ - USBH_StatusTypeDef status = USBH_OK; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - /* build an appropriate PTPContainer */ - resp->Code = MTP_Handle->ptp.resp_container.code; - resp->SessionID = MTP_Handle->ptp.session_id; - resp->Transaction_ID = MTP_Handle->ptp.resp_container.trans_id; - resp->Param1 = MTP_Handle->ptp.resp_container.param1; - resp->Param2 = MTP_Handle->ptp.resp_container.param2; - resp->Param3 = MTP_Handle->ptp.resp_container.param3; - resp->Param4 = MTP_Handle->ptp.resp_container.param4; - resp->Param5 = MTP_Handle->ptp.resp_container.param5; - - return status; -} - -/** - * @brief The function informs user that data buffer is full - * @param phost: host handle - * @retval None - */ -void PTP_BufferFullCallback(USBH_HandleTypeDef *phost) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - - switch (MTP_Handle->ptp.data_container.code) - { - case PTP_OC_GetDeviceInfo: - PTP_DecodeDeviceInfo (phost, &(MTP_Handle->info.devinfo)); - break; - - case PTP_OC_GetPartialObject: - case PTP_OC_GetObject: - - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, PTP_USB_BULK_PAYLOAD_LEN_READ); - - /* next packet should be directly copied to object */ - MTP_Handle->ptp.data_ptr = (MTP_Handle->ptp.object_ptr + PTP_USB_BULK_PAYLOAD_LEN_READ); - } - break; - - case PTP_OC_SendObject: - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* next packet should be directly copied to object */ - MTP_Handle->ptp.data_ptr = (MTP_Handle->ptp.object_ptr + PTP_USB_BULK_PAYLOAD_LEN_READ); - } - break; - - default: - break; - - - } -} - -/** - * @brief PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval None - */ -static void PTP_DecodeDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t totallen; - uint16_t len; - - /* Max device info is PTP_USB_BULK_HS_MAX_PACKET_LEN_READ */ - USBH_DbgLog (" MTP device info size exceeds internal buffer size.\ - only available data are decoded."); - - if(MTP_Handle->ptp.iteration == 0) - { - dev_info->StandardVersion = LE16(&data[PTP_di_StandardVersion]); - dev_info->VendorExtensionID = LE32(&data[PTP_di_VendorExtensionID]); - dev_info->VendorExtensionVersion = LE16(&data[PTP_di_VendorExtensionVersion]); - PTP_GetString(dev_info->VendorExtensionDesc, &data[PTP_di_VendorExtensionDesc], &len); - - totallen=len*2+1; - dev_info->FunctionalMode = LE16(&data[PTP_di_FunctionalMode+totallen]); - dev_info->OperationsSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->OperationsSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->OperationsSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->EventsSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->EventsSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->EventsSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->DevicePropertiesSupported_len = PTP_GetArray16 ((uint16_t *)&dev_info->DevicePropertiesSupported, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->DevicePropertiesSupported_len*sizeof(uint16_t)+sizeof(uint32_t); - - dev_info->CaptureFormats_len = PTP_GetArray16 ((uint16_t *)&dev_info->CaptureFormats, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->CaptureFormats_len*sizeof(uint16_t)+sizeof(uint32_t); - dev_info->ImageFormats_len = PTP_GetArray16 ((uint16_t *)&dev_info->ImageFormats, - data, - PTP_di_OperationsSupported+totallen); - - totallen=totallen+dev_info->ImageFormats_len*sizeof(uint16_t)+sizeof(uint32_t); - PTP_GetString(dev_info->Manufacturer, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->Model, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->DeviceVersion, &data[PTP_di_OperationsSupported+totallen], &len); - - totallen+=len*2+1; - PTP_GetString(dev_info->SerialNumber, &data[PTP_di_OperationsSupported+totallen], &len); - } -} - -/** - * @brief PTP_GetStorageIDs - * Gets Storage Ids and fills stor_ids structure. - * @param phost: Host handle - * @param stor_ids: Storage IDsstructure - * @retval None - */ -static void PTP_GetStorageIDs (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *stor_ids) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - - stor_ids->n = PTP_GetArray32 (stor_ids->Storage, data, 0); -} - - -/** - * @brief PTP_GetStorageInfo - * Gets Storage Info and fills stor_info structure. - * @param phost: Host handle - * @param stor_ids: Storage IDsstructure - * @retval None - */ -static void PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *stor_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - - uint16_t len; - - stor_info->StorageType=LE16(&data[PTP_si_StorageType]); - stor_info->FilesystemType=LE16(&data[PTP_si_FilesystemType]); - stor_info->AccessCapability=LE16(&data[PTP_si_AccessCapability]); - stor_info->MaxCapability=LE64(&data[PTP_si_MaxCapability]); - stor_info->FreeSpaceInBytes=LE64(&data[PTP_si_FreeSpaceInBytes]); - stor_info->FreeSpaceInImages=LE32(&data[PTP_si_FreeSpaceInImages]); - - PTP_GetString(stor_info->StorageDescription, &data[PTP_si_StorageDescription], &len); - PTP_GetString(stor_info->VolumeLabel, &data[PTP_si_StorageDescription+len*2+1], &len); -} - -/** - * @brief PTP_GetObjectInfo - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param object_info: object info structure - * @retval None - */ -static void PTP_GetObjectInfo (USBH_HandleTypeDef *phost, PTP_ObjectInfoTypedef *object_info) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint16_t filenamelen; - - object_info->StorageID=LE32(&data[PTP_oi_StorageID]); - object_info->ObjectFormat=LE16(&data[PTP_oi_ObjectFormat]); - object_info->ProtectionStatus=LE16(&data[PTP_oi_ProtectionStatus]); - object_info->ObjectCompressedSize=LE32(&data[PTP_oi_ObjectCompressedSize]); - - /* For Samsung Galaxy */ - if ((data[PTP_oi_filenamelen] == 0) && (data[PTP_oi_filenamelen+4] != 0)) - { - data += 4; - } - object_info->ThumbFormat=LE16(&data[PTP_oi_ThumbFormat]); - object_info->ThumbCompressedSize=LE32(&data[PTP_oi_ThumbCompressedSize]); - object_info->ThumbPixWidth=LE32(&data[PTP_oi_ThumbPixWidth]); - object_info->ThumbPixHeight=LE32(&data[PTP_oi_ThumbPixHeight]); - object_info->ImagePixWidth=LE32(&data[PTP_oi_ImagePixWidth]); - object_info->ImagePixHeight=LE32(&data[PTP_oi_ImagePixHeight]); - object_info->ImageBitDepth=LE32(&data[PTP_oi_ImageBitDepth]); - object_info->ParentObject=LE32(&data[PTP_oi_ParentObject]); - object_info->AssociationType=LE16(&data[PTP_oi_AssociationType]); - object_info->AssociationDesc=LE32(&data[PTP_oi_AssociationDesc]); - object_info->SequenceNumber=LE32(&data[PTP_oi_SequenceNumber]); - PTP_GetString(object_info->Filename, &data[PTP_oi_filenamelen], &filenamelen); -} - - -/** - * @brief PTP_GetObjectPropDesc - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static void PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, PTP_ObjectPropDescTypeDef *opd, uint32_t opdlen) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t offset = 0, i; - - opd->ObjectPropertyCode=LE16(&data[PTP_opd_ObjectPropertyCode]); - opd->DataType=LE16(&data[PTP_opd_DataType]); - opd->GetSet=*(uint8_t *)(&data[PTP_opd_GetSet]); - - offset = PTP_opd_FactoryDefaultValue; - PTP_GetDevicePropValue (phost, &offset, opdlen, &opd->FactoryDefaultValue, opd->DataType); - - opd->GroupCode=LE32(&data[offset]); - offset+=sizeof(uint32_t); - - opd->FormFlag=*(uint8_t *)(&data[offset]); - offset+=sizeof(uint8_t); - - switch (opd->FormFlag) - { - case PTP_OPFF_Range: - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.MinimumValue, opd->DataType); - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.MaximumValue, opd->DataType); - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Range.StepSize, opd->DataType); - break; - - case PTP_OPFF_Enumeration: - - opd->FORM.Enum.NumberOfValues = LE16(&data[offset]); - offset+=sizeof(uint16_t); - - for (i=0 ; i < opd->FORM.Enum.NumberOfValues ; i++) - { - PTP_GetDevicePropValue(phost, &offset, opdlen, &opd->FORM.Enum.SupportedValue[i], opd->DataType); - } - break; - default: - break; - } -} - -/** - * @brief PTP_GetDevicePropValue - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static void PTP_GetDevicePropValue(USBH_HandleTypeDef *phost, - uint32_t *offset, - uint32_t total, - PTP_PropertyValueTypedef* value, - uint16_t datatype) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint16_t len; - switch (datatype) - { - case PTP_DTC_INT8: - value->i8 = *(uint8_t *)&(data[*offset]); - *offset += 1; - break; - case PTP_DTC_UINT8: - value->u8 = *(uint8_t *)&(data[*offset]); - *offset += 1; - break; - case PTP_DTC_INT16: - - value->i16 = LE16(&(data[*offset])); - *offset += 2; - break; - case PTP_DTC_UINT16: - value->u16 = LE16(&(data[*offset])); - *offset += 2; - break; - case PTP_DTC_INT32: - value->i32 = LE32(&(data[*offset])); - *offset += 4; - break; - case PTP_DTC_UINT32: - value->u32 = LE32(&(data[*offset])); - *offset += 4; - break; - case PTP_DTC_INT64: - value->i64 = LE64(&(data[*offset])); - *offset += 8; - break; - case PTP_DTC_UINT64: - value->u64 = LE64(&(data[*offset])); - *offset += 8; - break; - - case PTP_DTC_UINT128: - *offset += 16; - break; - case PTP_DTC_INT128: - *offset += 16; - break; - - case PTP_DTC_STR: - - PTP_GetString((uint8_t *)value->str, (uint8_t *)&(data[*offset]), &len); - *offset += len*2+1; - break; - default: - break; - } -} - - -/** - * @brief PTP_GetDevicePropValue - * Gets objectInfo and fills object_info structure. - * @param phost: Host handle - * @param opd: object prop descriptor structure - * @retval None - */ -static uint32_t PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - MTP_PropertiesTypedef *props, - uint32_t len) -{ - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - uint32_t prop_count; - uint32_t offset = 0, i; - - prop_count = LE32(data); - - - if (prop_count == 0) - { - return 0; - } - - data += sizeof(uint32_t); - len -= sizeof(uint32_t); - - for (i = 0; i < prop_count; i++) - { - if (len <= 0) - { - return 0; - } - - props[i].ObjectHandle = LE32(data); - data += sizeof(uint32_t); - len -= sizeof(uint32_t); - - props[i].property = LE16(data); - data += sizeof(uint16_t); - len -= sizeof(uint16_t); - - props[i].datatype = LE16(data); - data += sizeof(uint16_t); - len -= sizeof(uint16_t); - - offset = 0; - - PTP_GetDevicePropValue(phost, &offset, len, &props[i].propval, props[i].datatype); - - data += offset; - len -= offset; - } - - return prop_count; -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ -static void PTP_GetString (uint8_t *str, uint8_t* data, uint16_t *len) -{ - uint16_t strlength; - uint16_t idx; - - *len = data[0]; - strlength = 2 * data[0]; - data ++; /* Adjust the offset ignoring the String Len */ - - for (idx = 0; idx < strlength; idx+=2 ) - { - /* Copy Only the string and ignore the UNICODE ID, hence add the src */ - *str = data[idx]; - str++; - } - *str = 0; /* mark end of string */ -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ - -static uint32_t PTP_GetArray16 (uint16_t *array, uint8_t *data, uint32_t offset) -{ - uint32_t size, idx = 0; - - size=LE32(&data[offset]); - while (size > idx) - { - array[idx] = LE16(&data[offset+(sizeof(uint16_t)*(idx+2))]); - idx++; - } - return size; -} - -/** - * @brief PTP_GetString - * Gets SCII String from. - * @param str: ascii string - * @param data: Device info structure - * @retval None - */ - -static uint32_t PTP_GetArray32 (uint32_t *array, uint8_t *data, uint32_t offset) -{ - uint32_t size, idx = 0; - - size=LE32(&data[offset]); - while (size > idx) - { - array[idx] = LE32(&data[offset+(sizeof(uint32_t)*(idx+1))]); - idx++; - } - return size; -} - -/******************************************************************************* - - PTP Requests - -*******************************************************************************/ -/** - * @brief USBH_PTP_OpenSession - * Open a new session - * @param phost: Host handle - * @param session: Session ID (MUST BE > 0) - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_OpenSession (USBH_HandleTypeDef *phost, uint32_t session) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Init session params */ - MTP_Handle->ptp.transaction_id = 0x00000000; - MTP_Handle->ptp.session_id = session; - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_OpenSession; - ptp_container.SessionID = session; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = session; - ptp_container.Nparam = 1; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetDevicePropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetDevicePropDesc (USBH_HandleTypeDef *phost, - uint16_t propcode, - PTP_DevicePropDescTypdef* devicepropertydesc) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - uint8_t *data = MTP_Handle->ptp.data_container.payload.data; - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetDevicePropDesc; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = propcode; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - devicepropertydesc->DevicePropertyCode = LE16(&data[PTP_dpd_DevicePropertyCode]); - devicepropertydesc->DataType = LE16(&data[PTP_dpd_DataType]); - devicepropertydesc->GetSet = *(uint8_t *)(&data[PTP_dpd_GetSet]); - devicepropertydesc->FormFlag = PTP_DPFF_None; - } - break; - - default: - break; - } - return status; -} -/** - * @brief USBH_PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetDeviceInfo (USBH_HandleTypeDef *phost, PTP_DeviceInfoTypedef *dev_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetDeviceInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_DecodeDeviceInfo (phost, dev_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetStorageIds - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetStorageIds (USBH_HandleTypeDef *phost, PTP_StorageIDsTypedef *storage_ids) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetStorageIDs; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetStorageIDs (phost, storage_ids); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetDeviceInfo - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetStorageInfo (USBH_HandleTypeDef *phost, uint32_t storage_id, PTP_StorageInfoTypedef *storage_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetStorageInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Nparam = 1; - - /* convert request packet inti USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetStorageInfo (phost, storage_id, storage_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetNumObjects - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetNumObjects (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - uint32_t* numobs) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetNumObjects; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Param2 = objectformatcode; - ptp_container.Param3 = associationOH; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *numobs = MTP_Handle->ptp.resp_container.param1; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectHandles - * Gets device info dataset and fills deviceinfo structure. - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectHandles (USBH_HandleTypeDef *phost, - uint32_t storage_id, - uint32_t objectformatcode, - uint32_t associationOH, - PTP_ObjectHandlesTypedef* objecthandles) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectHandles; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = storage_id; - ptp_container.Param2 = objectformatcode; - ptp_container.Param3 = associationOH; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - objecthandles->n = PTP_GetArray32 (objecthandles->Handler, - MTP_Handle->ptp.data_container.payload.data, - 0); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectInfo - * Gets objert info - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectInfo (USBH_HandleTypeDef *phost, - uint32_t handle, - PTP_ObjectInfoTypedef* object_info) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectInfo; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectInfo (phost, object_info); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_DeleteObject - * Delete an object. - * @param phost: Host handle - * @param handle : Object Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_DeleteObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t objectformatcode) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_NODATA; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_DeleteObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = objectformatcode; - ptp_container.Nparam = 2; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObject - * Gets object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Nparam = 1; - - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, PTP_USB_BULK_PAYLOAD_LEN_READ); - } - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetPartialObject - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetPartialObject(USBH_HandleTypeDef *phost, - uint32_t handle, - uint32_t offset, - uint32_t maxbytes, - uint8_t *object, - uint32_t *len) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetPartialObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = offset; - ptp_container.Param3 = maxbytes; - ptp_container.Nparam = 3; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *len = MTP_Handle->ptp.resp_container.param1; - /* first packet is in the PTP data payload buffer */ - if(MTP_Handle->ptp.iteration == 0) - { - /* copy it to object */ - USBH_memcpy(MTP_Handle->ptp.object_ptr, MTP_Handle->ptp.data_container.payload.data, *len); - } - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropsSupported - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropsSupported (USBH_HandleTypeDef *phost, - uint16_t ofc, - uint32_t *propnum, - uint16_t *props) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectPropsSupported; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = ofc; - ptp_container.Nparam = 1; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - *propnum = PTP_GetArray16 (props, MTP_Handle->ptp.data_container.payload.data, 0); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropDesc - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropDesc (USBH_HandleTypeDef *phost, - uint16_t opc, - uint16_t ofc, - PTP_ObjectPropDescTypeDef *opd) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjectPropDesc; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = opc; - ptp_container.Param2 = ofc; - ptp_container.Nparam = 2; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectPropDesc(phost, opd, MTP_Handle->ptp.data_length); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_GetObjectPropList - * Gets object partially - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_GetObjectPropList (USBH_HandleTypeDef *phost, - uint32_t handle, - MTP_PropertiesTypedef *pprops, - uint32_t *nrofprops) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_GETDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_length = 0; - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - - /* copy first packet of the object into data container */ - USBH_memcpy(MTP_Handle->ptp.data_container.payload.data, MTP_Handle->ptp.object_ptr, PTP_USB_BULK_PAYLOAD_LEN_READ); - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_GetObjPropList; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Param1 = handle; - ptp_container.Param2 = 0x00000000U; /* 0x00000000U should be "all formats" */ - ptp_container.Param3 = 0xFFFFFFFFU; /* 0xFFFFFFFFU should be "all properties" */ - ptp_container.Param4 = 0x00000000U; - ptp_container.Param5 = 0xFFFFFFFFU; /* Return full tree below the Param1 handle */ - ptp_container.Nparam = 5; - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - - if(status == USBH_OK) - { - PTP_GetObjectPropList (phost, pprops, MTP_Handle->ptp.data_length); - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_PTP_SendObject - * Send an object - * @param phost: Host handle - * @param dev_info: Device info structure - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_PTP_SendObject (USBH_HandleTypeDef *phost, - uint32_t handle, - uint8_t *object, - uint32_t size) -{ - USBH_StatusTypeDef status = USBH_BUSY; - MTP_HandleTypeDef *MTP_Handle = phost->pActiveClass->pData; - PTP_ContainerTypedef ptp_container; - - switch(MTP_Handle->ptp.req_state) - { - case PTP_REQ_SEND: - - /* Set operation request type */ - MTP_Handle->ptp.flags = PTP_DP_SENDDATA; - MTP_Handle->ptp.data_ptr = (uint8_t *)&(MTP_Handle->ptp.data_container); - MTP_Handle->ptp.data_packet_counter = 0; - MTP_Handle->ptp.data_packet = 0; - MTP_Handle->ptp.iteration = 0; - - /* set object control params */ - MTP_Handle->ptp.object_ptr = object; - MTP_Handle->ptp.data_length = size; - - /* Fill operation request params */ - ptp_container.Code = PTP_OC_SendObject; - ptp_container.SessionID = MTP_Handle->ptp.session_id; - ptp_container.Transaction_ID = MTP_Handle->ptp.transaction_id ++; - ptp_container.Nparam = 0; - - - /* convert request packet into USB raw packet*/ - USBH_PTP_SendRequest (phost, &ptp_container); - - /* Setup State machine and start transfer */ - MTP_Handle->ptp.state = PTP_OP_REQUEST_STATE; - MTP_Handle->ptp.req_state = PTP_REQ_WAIT; - status = USBH_BUSY; - break; - - case PTP_REQ_WAIT: - status = USBH_PTP_Process(phost); - break; - - default: - break; - } - return status; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h b/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h deleted file mode 100644 index 728a36c86bdf6..0000000000000 --- a/ports/stm32/usbhost/Class/Template/Inc/usbh_template.h +++ /dev/null @@ -1,122 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file contains all the prototypes for the usbh_template.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_TEMPLATE_CORE_H -#define __USBH_TEMPLATE_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_TEMPLATE_CLASS -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE -* @brief This file is the Header file for USBH_TEMPLATE_CORE.c -* @{ -*/ - - -/** - * @} - */ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Types -* @{ -*/ - -/* States for TEMPLATE State Machine */ - - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Defines -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Macros -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_Variables -* @{ -*/ -extern USBH_ClassTypeDef TEMPLATE_Class; -#define USBH_TEMPLATE_CLASS &TEMPLATE_Class - -/** -* @} -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Exported_FunctionsPrototype -* @{ -*/ -USBH_StatusTypeDef USBH_TEMPLATE_IOProcess (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_TEMPLATE_Init (USBH_HandleTypeDef *phost); -/** -* @} -*/ - - -#endif /* __USBH_TEMPLATE_CORE_H */ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Class/Template/Src/usbh_template.c b/ports/stm32/usbhost/Class/Template/Src/usbh_template.c deleted file mode 100644 index 2ea14a89e2c90..0000000000000 --- a/ports/stm32/usbhost/Class/Template/Src/usbh_template.c +++ /dev/null @@ -1,240 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_mtp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file is the MTP Layer Handlers for USB Host MTP class. - * - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_template.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_CLASS -* @{ -*/ - -/** @addtogroup USBH_TEMPLATE_CLASS -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE -* @brief This file includes TEMPLATE Layer Handlers for USB Host TEMPLATE class. -* @{ -*/ - -/** @defgroup USBH_TEMPLATE_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Variables -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_FunctionPrototypes -* @{ -*/ - -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceDeInit (USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_Process(USBH_HandleTypeDef *phost); - -static USBH_StatusTypeDef USBH_TEMPLATE_ClassRequest (USBH_HandleTypeDef *phost); - - -USBH_ClassTypeDef TEMPLATE_Class = -{ - "TEMPLATE", - USB_TEMPLATE_CLASS, - USBH_TEMPLATE_InterfaceInit, - USBH_TEMPLATE_InterfaceDeInit, - USBH_TEMPLATE_ClassRequest, - USBH_TEMPLATE_Process -}; -/** -* @} -*/ - - -/** @defgroup USBH_TEMPLATE_CORE_Private_Functions -* @{ -*/ - -/** - * @brief USBH_TEMPLATE_InterfaceInit - * The function init the TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_InterfaceInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - - -/** - * @brief USBH_TEMPLATE_InterfaceDeInit - * The function DeInit the Pipes used for the TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_InterfaceDeInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_TEMPLATE_ClassRequest - * The function is responsible for handling Standard requests - * for TEMPLATE class. - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_ClassRequest (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - -/** - * @brief USBH_TEMPLATE_Process - * The function is for managing state machine for TEMPLATE data transfers - * @param phost: Host handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_TEMPLATE_Process (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - - -/** - * @brief USBH_TEMPLATE_Init - * The function Initialize the TEMPLATE function - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_Init (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_BUSY; -#if (USBH_USE_OS == 1) - osEvent event; - - event = osMessageGet( phost->class_ready_event, osWaitForever ); - - if( event.status == osEventMessage ) - { - if(event.value.v == USBH_CLASS_EVENT) - { -#else - - while ((Status == USBH_BUSY) || (Status == USBH_FAIL)) - { - /* Host background process */ - USBH_Process(phost); - if(phost->gState == HOST_CLASS) - { -#endif - Status = USBH_OK; - } - } - return Status; -} - -/** - * @brief USBH_TEMPLATE_IOProcess - * TEMPLATE TEMPLATE process - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_TEMPLATE_IOProcess (USBH_HandleTypeDef *phost) -{ - if (phost->device.is_connected == 1) - { - if(phost->gState == HOST_CLASS) - { - USBH_TEMPLATE_Process(phost); - } - } - - return USBH_OK; -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h b/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h deleted file mode 100644 index 8f85e13604e25..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_conf_template.h +++ /dev/null @@ -1,151 +0,0 @@ -/** - ****************************************************************************** - * @file USBH_conf.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief General low level driver configuration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBH_CONF__H__ -#define __USBH_CONF__H__ - -#include "stm32f4xx.h" -#include -#include -#include - -/* Includes ------------------------------------------------------------------*/ - -/** @addtogroup USBH_OTG_DRIVER - * @{ - */ - -/** @defgroup USBH_CONF - * @brief usb otg low level driver configuration file - * @{ - */ - -/** @defgroup USBH_CONF_Exported_Defines - * @{ - */ - -#define USBH_MAX_NUM_ENDPOINTS 2 -#define USBH_MAX_NUM_INTERFACES 2 -#define USBH_MAX_NUM_CONFIGURATION 1 -#define USBH_KEEP_CFG_DESCRIPTOR 1 -#define USBH_MAX_NUM_SUPPORTED_CLASS 1 -#define USBH_MAX_SIZE_CONFIGURATION 0x200 -#define USBH_MAX_DATA_BUFFER 0x200 -#define USBH_DEBUG_LEVEL 2 -#define USBH_USE_OS 1 - -/** @defgroup USBH_Exported_Macros - * @{ - */ - - /* Memory management macros */ -#define USBH_malloc malloc -#define USBH_free free -#define USBH_memset memset -#define USBH_memcpy memcpy - - /* DEBUG macros */ - - -#if (USBH_DEBUG_LEVEL > 0) -#define USBH_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_UsrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 1) - -#define USBH_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_ErrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 2) -#define USBH_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_DbgLog(...) -#endif - -/** - * @} - */ - -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_FunctionsPrototype - * @{ - */ -/** - * @} - */ - - -#endif //__USBH_CONF__H__ - - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_core.h b/ports/stm32/usbhost/Core/Inc/usbh_core.h deleted file mode 100644 index bc3da6d1fe906..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_core.h +++ /dev/null @@ -1,161 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_core.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_core.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CORE_H -#define __USBH_CORE_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_conf.h" -#include "usbh_def.h" -#include "usbh_ioreq.h" -#include "usbh_pipes.h" -#include "usbh_ctlreq.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CORE - * @brief This file is the Header file for usbh_core.c - * @{ - */ - - -/** @defgroup USBH_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ -#define HOST_USER_SELECT_CONFIGURATION 1 -#define HOST_USER_CLASS_ACTIVE 2 -#define HOST_USER_CLASS_SELECTED 3 -#define HOST_USER_CONNECTION 4 -#define HOST_USER_DISCONNECTION 5 - - - -/** - * @} - */ - - - -/** @defgroup USBH_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_CORE_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBH_CORE_Exported_FunctionsPrototype - * @{ - */ - - -USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost, void (*pUsrFunc)(USBH_HandleTypeDef *phost, uint8_t ), uint8_t id); -USBH_StatusTypeDef USBH_DeInit(USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass); -USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface); -uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, - uint8_t Class, - uint8_t SubClass, - uint8_t Protocol); -uint8_t USBH_GetActiveClass(USBH_HandleTypeDef *phost); - -uint8_t USBH_FindInterfaceIndex(USBH_HandleTypeDef *phost, - uint8_t interface_number, - uint8_t alt_settings); - -USBH_StatusTypeDef USBH_Start (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_Stop (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_Process (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_ReEnumerate (USBH_HandleTypeDef *phost); - -/* USBH Low Level Driver */ -USBH_StatusTypeDef USBH_LL_Init (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_DeInit (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Start (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Stop (USBH_HandleTypeDef *phost); - -USBH_StatusTypeDef USBH_LL_Connect (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_Disconnect (USBH_HandleTypeDef *phost); -USBH_SpeedTypeDef USBH_LL_GetSpeed (USBH_HandleTypeDef *phost); -USBH_StatusTypeDef USBH_LL_ResetPort (USBH_HandleTypeDef *phost); -uint32_t USBH_LL_GetLastXferSize (USBH_HandleTypeDef *phost, uint8_t ); -USBH_StatusTypeDef USBH_LL_DriverVBUS (USBH_HandleTypeDef *phost, uint8_t ); - -USBH_StatusTypeDef USBH_LL_OpenPipe (USBH_HandleTypeDef *phost, uint8_t, uint8_t, uint8_t, uint8_t , uint8_t, uint16_t ); -USBH_StatusTypeDef USBH_LL_ClosePipe (USBH_HandleTypeDef *phost, uint8_t ); -USBH_StatusTypeDef USBH_LL_SubmitURB (USBH_HandleTypeDef *phost, uint8_t, uint8_t,uint8_t, uint8_t, uint8_t*, uint16_t, uint8_t ); -USBH_URBStateTypeDef USBH_LL_GetURBState (USBH_HandleTypeDef *phost, uint8_t ); -#if (USBH_USE_OS == 1) -USBH_StatusTypeDef USBH_LL_NotifyURBChange (USBH_HandleTypeDef *phost); -#endif -USBH_StatusTypeDef USBH_LL_SetToggle (USBH_HandleTypeDef *phost, uint8_t , uint8_t ); -uint8_t USBH_LL_GetToggle (USBH_HandleTypeDef *phost, uint8_t ); - -/* USBH Time base */ -void USBH_Delay (uint32_t Delay); -void USBH_LL_SetTimer (USBH_HandleTypeDef *phost, uint32_t ); -void USBH_LL_IncTimer (USBH_HandleTypeDef *phost); -/** - * @} - */ - -#endif /* __CORE_H */ -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h b/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h deleted file mode 100644 index cd61755e3ed39..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_ctlreq.h +++ /dev/null @@ -1,147 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ctlreq.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_ctlreq.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_CTLREQ_H -#define __USBH_CTLREQ_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CTLREQ - * @brief This file is the - * @{ - */ - - -/** @defgroup USBH_CTLREQ_Exported_Defines - * @{ - */ -/*Standard Feature Selector for clear feature command*/ -#define FEATURE_SELECTOR_ENDPOINT 0X00 -#define FEATURE_SELECTOR_DEVICE 0X01 - - -#define INTERFACE_DESC_TYPE 0x04 -#define ENDPOINT_DESC_TYPE 0x05 -#define INTERFACE_DESC_SIZE 0x09 - -/** - * @} - */ - - -/** @defgroup USBH_CTLREQ_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CTLREQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CTLREQ_Exported_Variables - * @{ - */ -extern uint8_t USBH_CfgDesc[512]; -/** - * @} - */ - -/** @defgroup USBH_CTLREQ_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_CtlReq (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length); - -USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost, - uint8_t req_type, - uint16_t value_idx, - uint8_t* buff, - uint16_t length ); - -USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, - uint8_t length); - -USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost, - uint8_t string_index, - uint8_t *buff, - uint16_t length); - -USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, - uint16_t configuration_value); - -USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, - uint16_t length); - -USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost, - uint8_t DeviceAddress); - -USBH_StatusTypeDef USBH_SetInterface(USBH_HandleTypeDef *phost, - uint8_t ep_num, uint8_t altSetting); - -USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, - uint8_t ep_num); - -USBH_DescHeader_t *USBH_GetNextDesc (uint8_t *pbuf, - uint16_t *ptr); -/** - * @} - */ - -#endif /* __USBH_CTLREQ_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_def.h b/ports/stm32/usbhost/Core/Inc/usbh_def.h deleted file mode 100644 index cf24d69f3702c..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_def.h +++ /dev/null @@ -1,480 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_def.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Definitions used in the USB host library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_DEF - * @brief This file is includes USB descriptors - * @{ - */ - -#ifndef USBH_DEF_H -#define USBH_DEF_H - -#include "usbh_conf.h" - -#ifndef NULL -#define NULL ((void *)0) -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - - -#define ValBit(VAR,POS) (VAR & (1 << POS)) -#define SetBit(VAR,POS) (VAR |= (1 << POS)) -#define ClrBit(VAR,POS) (VAR &= ((1 << POS)^255)) - -#define LE16(addr) (((uint16_t)(*((uint8_t *)(addr))))\ - + (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LE16S(addr) (uint16_t)(LE16((addr))) - -#define LE32(addr) ((((uint32_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 1))) << 8) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 2))) << 16) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 3))) << 24))) - -#define LE64(addr) ((((uint64_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint64_t)(*(((uint8_t *)(addr)) + 1))) << 8) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 2))) << 16) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 3))) << 24) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 4))) << 32) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 5))) << 40) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 6))) << 48) +\ - (((uint64_t)(*(((uint8_t *)(addr)) + 7))) << 56))) - - -#define LE24(addr) ((((uint32_t)(*(((uint8_t *)(addr)) + 0))) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 1))) << 8) + \ - (((uint32_t)(*(((uint8_t *)(addr)) + 2))) << 16))) - - -#define LE32S(addr) (int32_t)(LE32((addr))) - - - -#define USB_LEN_DESC_HDR 0x02 -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_SETUP_PKT 0x08 - -/* bmRequestType :D7 Data Phase Transfer Direction */ -#define USB_REQ_DIR_MASK 0x80 -#define USB_H2D 0x00 -#define USB_D2H 0x80 - -/* bmRequestType D6..5 Type */ -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_RESERVED 0x60 - -/* bmRequestType D4..0 Recipient */ -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_OTHER 0x03 - -/* Table 9-4. Standard Request Codes */ -/* bRequest , Value */ -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -/* Table 9-5. Descriptor Types of USB Specifications */ -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 -#define USB_DESC_TYPE_INTERFACE_POWER 8 -#define USB_DESC_TYPE_HID 0x21 -#define USB_DESC_TYPE_HID_REPORT 0x22 - - -#define USB_DEVICE_DESC_SIZE 18 -#define USB_CONFIGURATION_DESC_SIZE 9 -#define USB_HID_DESC_SIZE 9 -#define USB_INTERFACE_DESC_SIZE 9 -#define USB_ENDPOINT_DESC_SIZE 7 - -/* Descriptor Type and Descriptor Index */ -/* Use the following values when calling the function USBH_GetDescriptor */ -#define USB_DESC_DEVICE ((USB_DESC_TYPE_DEVICE << 8) & 0xFF00) -#define USB_DESC_CONFIGURATION ((USB_DESC_TYPE_CONFIGURATION << 8) & 0xFF00) -#define USB_DESC_STRING ((USB_DESC_TYPE_STRING << 8) & 0xFF00) -#define USB_DESC_INTERFACE ((USB_DESC_TYPE_INTERFACE << 8) & 0xFF00) -#define USB_DESC_ENDPOINT ((USB_DESC_TYPE_INTERFACE << 8) & 0xFF00) -#define USB_DESC_DEVICE_QUALIFIER ((USB_DESC_TYPE_DEVICE_QUALIFIER << 8) & 0xFF00) -#define USB_DESC_OTHER_SPEED_CONFIGURATION ((USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION << 8) & 0xFF00) -#define USB_DESC_INTERFACE_POWER ((USB_DESC_TYPE_INTERFACE_POWER << 8) & 0xFF00) -#define USB_DESC_HID_REPORT ((USB_DESC_TYPE_HID_REPORT << 8) & 0xFF00) -#define USB_DESC_HID ((USB_DESC_TYPE_HID << 8) & 0xFF00) - - -#define USB_EP_TYPE_CTRL 0x00 -#define USB_EP_TYPE_ISOC 0x01 -#define USB_EP_TYPE_BULK 0x02 -#define USB_EP_TYPE_INTR 0x03 - -#define USB_EP_DIR_OUT 0x00 -#define USB_EP_DIR_IN 0x80 -#define USB_EP_DIR_MSK 0x80 - -#define USBH_MAX_PIPES_NBR 15 - - - -#define USBH_DEVICE_ADDRESS_DEFAULT 0 -#define USBH_MAX_ERROR_COUNT 2 -#define USBH_DEVICE_ADDRESS 1 - - -/** - * @} - */ - - -#define USBH_CONFIGURATION_DESCRIPTOR_SIZE (USB_CONFIGURATION_DESC_SIZE \ - + USB_INTERFACE_DESC_SIZE\ - + (USBH_MAX_NUM_ENDPOINTS * USB_ENDPOINT_DESC_SIZE)) - - -#define CONFIG_DESC_wTOTAL_LENGTH (ConfigurationDescriptorData.ConfigDescfield.\ - ConfigurationDescriptor.wTotalLength) - - -typedef union -{ - uint16_t w; - struct BW - { - uint8_t msb; - uint8_t lsb; - } - bw; -} -uint16_t_uint8_t; - - -typedef union _USB_Setup -{ - uint32_t d8[2]; - - struct _SetupPkt_Struc - { - uint8_t bmRequestType; - uint8_t bRequest; - uint16_t_uint8_t wValue; - uint16_t_uint8_t wIndex; - uint16_t_uint8_t wLength; - } b; -} -USB_Setup_TypeDef; - -typedef struct _DescHeader -{ - uint8_t bLength; - uint8_t bDescriptorType; -} -USBH_DescHeader_t; - -typedef struct _DeviceDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; /* USB Specification Number which device complies too */ - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - /* If equal to Zero, each interface specifies its own class - code if equal to 0xFF, the class code is vendor specified. - Otherwise field is valid Class Code.*/ - uint8_t bMaxPacketSize; - uint16_t idVendor; /* Vendor ID (Assigned by USB Org) */ - uint16_t idProduct; /* Product ID (Assigned by Manufacturer) */ - uint16_t bcdDevice; /* Device Release Number */ - uint8_t iManufacturer; /* Index of Manufacturer String Descriptor */ - uint8_t iProduct; /* Index of Product String Descriptor */ - uint8_t iSerialNumber; /* Index of Serial Number String Descriptor */ - uint8_t bNumConfigurations; /* Number of Possible Configurations */ -} -USBH_DevDescTypeDef; - -typedef struct _EndpointDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; /* indicates what endpoint this descriptor is describing */ - uint8_t bmAttributes; /* specifies the transfer type. */ - uint16_t wMaxPacketSize; /* Maximum Packet Size this endpoint is capable of sending or receiving */ - uint8_t bInterval; /* is used to specify the polling interval of certain transfers. */ -} -USBH_EpDescTypeDef; - -typedef struct _InterfaceDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; /* Value used to select alternative setting */ - uint8_t bNumEndpoints; /* Number of Endpoints used for this interface */ - uint8_t bInterfaceClass; /* Class Code (Assigned by USB Org) */ - uint8_t bInterfaceSubClass; /* Subclass Code (Assigned by USB Org) */ - uint8_t bInterfaceProtocol; /* Protocol Code */ - uint8_t iInterface; /* Index of String Descriptor Describing this interface */ - USBH_EpDescTypeDef Ep_Desc[USBH_MAX_NUM_ENDPOINTS]; -} -USBH_InterfaceDescTypeDef; - - -typedef struct _ConfigurationDescriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; /* Total Length of Data Returned */ - uint8_t bNumInterfaces; /* Number of Interfaces */ - uint8_t bConfigurationValue; /* Value to use as an argument to select this configuration*/ - uint8_t iConfiguration; /*Index of String Descriptor Describing this configuration */ - uint8_t bmAttributes; /* D7 Bus Powered , D6 Self Powered, D5 Remote Wakeup , D4..0 Reserved (0)*/ - uint8_t bMaxPower; /*Maximum Power Consumption */ - USBH_InterfaceDescTypeDef Itf_Desc[USBH_MAX_NUM_INTERFACES]; -} -USBH_CfgDescTypeDef; - - -/* Following USB Host status */ -typedef enum -{ - USBH_OK = 0, - USBH_BUSY, - USBH_FAIL, - USBH_NOT_SUPPORTED, - USBH_UNRECOVERED_ERROR, - USBH_ERROR_SPEED_UNKNOWN, -}USBH_StatusTypeDef; - - -/** @defgroup USBH_CORE_Exported_Types - * @{ - */ - -typedef enum -{ - USBH_SPEED_HIGH = 0, - USBH_SPEED_FULL = 1, - USBH_SPEED_LOW = 2, - -}USBH_SpeedTypeDef; - -/* Following states are used for gState */ -typedef enum -{ - HOST_IDLE =0, - HOST_DEV_WAIT_FOR_ATTACHMENT, - HOST_DEV_ATTACHED, - HOST_DEV_DISCONNECTED, - HOST_DETECT_DEVICE_SPEED, - HOST_ENUMERATION, - HOST_CLASS_REQUEST, - HOST_INPUT, - HOST_SET_CONFIGURATION, - HOST_CHECK_CLASS, - HOST_CLASS, - HOST_SUSPENDED, - HOST_ABORT_STATE, -}HOST_StateTypeDef; - -/* Following states are used for EnumerationState */ -typedef enum -{ - ENUM_IDLE = 0, - ENUM_GET_FULL_DEV_DESC, - ENUM_SET_ADDR, - ENUM_GET_CFG_DESC, - ENUM_GET_FULL_CFG_DESC, - ENUM_GET_MFC_STRING_DESC, - ENUM_GET_PRODUCT_STRING_DESC, - ENUM_GET_SERIALNUM_STRING_DESC, -} ENUM_StateTypeDef; - -/* Following states are used for CtrlXferStateMachine */ -typedef enum -{ - CTRL_IDLE =0, - CTRL_SETUP, - CTRL_SETUP_WAIT, - CTRL_DATA_IN, - CTRL_DATA_IN_WAIT, - CTRL_DATA_OUT, - CTRL_DATA_OUT_WAIT, - CTRL_STATUS_IN, - CTRL_STATUS_IN_WAIT, - CTRL_STATUS_OUT, - CTRL_STATUS_OUT_WAIT, - CTRL_ERROR, - CTRL_STALLED, - CTRL_COMPLETE -}CTRL_StateTypeDef; - - -/* Following states are used for RequestState */ -typedef enum -{ - CMD_IDLE =0, - CMD_SEND, - CMD_WAIT -} CMD_StateTypeDef; - -typedef enum { - USBH_URB_IDLE = 0, - USBH_URB_DONE, - USBH_URB_NOTREADY, - USBH_URB_NYET, - USBH_URB_ERROR, - USBH_URB_STALL -}USBH_URBStateTypeDef; - -typedef enum -{ - USBH_PORT_EVENT = 1, - USBH_URB_EVENT, - USBH_CONTROL_EVENT, - USBH_CLASS_EVENT, - USBH_STATE_CHANGED_EVENT, -} -USBH_OSEventTypeDef; - -/* Control request structure */ -typedef struct -{ - uint8_t pipe_in; - uint8_t pipe_out; - uint8_t pipe_size; - uint8_t *buff; - uint16_t length; - uint16_t timer; - USB_Setup_TypeDef setup; - CTRL_StateTypeDef state; - uint8_t errorcount; - -} USBH_CtrlTypeDef; - -/* Attached device structure */ -typedef struct -{ -#if (USBH_KEEP_CFG_DESCRIPTOR == 1) - uint8_t CfgDesc_Raw[USBH_MAX_SIZE_CONFIGURATION]; -#endif - uint8_t Data[USBH_MAX_DATA_BUFFER]; - uint8_t address; - uint8_t speed; - __IO uint8_t is_connected; - uint8_t current_interface; - USBH_DevDescTypeDef DevDesc; - USBH_CfgDescTypeDef CfgDesc; - -}USBH_DeviceTypeDef; - -struct _USBH_HandleTypeDef; - -/* USB Host Class structure */ -typedef struct -{ - const char *Name; - uint8_t ClassCode; - USBH_StatusTypeDef (*Init) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*DeInit) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*Requests) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*BgndProcess) (struct _USBH_HandleTypeDef *phost); - USBH_StatusTypeDef (*SOFProcess) (struct _USBH_HandleTypeDef *phost); - void* pData; -} USBH_ClassTypeDef; - -/* USB Host handle structure */ -typedef struct _USBH_HandleTypeDef -{ - __IO HOST_StateTypeDef gState; /* Host State Machine Value */ - ENUM_StateTypeDef EnumState; /* Enumeration state Machine */ - CMD_StateTypeDef RequestState; - USBH_CtrlTypeDef Control; - USBH_DeviceTypeDef device; - USBH_ClassTypeDef* pClass[USBH_MAX_NUM_SUPPORTED_CLASS]; - USBH_ClassTypeDef* pActiveClass; - uint32_t ClassNumber; - uint32_t Pipes[15]; - __IO uint32_t Timer; - uint8_t id; - void* pData; - void (* pUser )(struct _USBH_HandleTypeDef *pHandle, uint8_t id); - -#if (USBH_USE_OS == 1) - osMessageQId os_event; - osThreadId thread; -#endif - -} USBH_HandleTypeDef; - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - -#endif - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h b/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h deleted file mode 100644 index 463d4ea37b21b..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_ioreq.h +++ /dev/null @@ -1,159 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ioreq.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_ioreq.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_IOREQ_H -#define __USBH_IOREQ_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_conf.h" -#include "usbh_core.h" -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_IOREQ - * @brief This file is the header file for usbh_ioreq.c - * @{ - */ - - -/** @defgroup USBH_IOREQ_Exported_Defines - * @{ - */ - -#define USBH_PID_SETUP 0 -#define USBH_PID_DATA 1 - -#define USBH_EP_CONTROL 0 -#define USBH_EP_ISO 1 -#define USBH_EP_BULK 2 -#define USBH_EP_INTERRUPT 3 - -#define USBH_SETUP_PKT_SIZE 8 -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_IOREQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_IOREQ_Exported_FunctionsPrototype - * @{ - */ -USBH_StatusTypeDef USBH_CtlSendSetup (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_CtlSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num, - uint8_t do_ping ); - -USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_BulkSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t hc_num, - uint8_t do_ping ); - -USBH_StatusTypeDef USBH_InterruptReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t hc_num); - -USBH_StatusTypeDef USBH_InterruptSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t hc_num); - - -USBH_StatusTypeDef USBH_IsocReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t hc_num); - - -USBH_StatusTypeDef USBH_IsocSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t hc_num); -/** - * @} - */ - -#endif /* __USBH_IOREQ_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Inc/usbh_pipes.h b/ports/stm32/usbhost/Core/Inc/usbh_pipes.h deleted file mode 100644 index d72cd53870d22..0000000000000 --- a/ports/stm32/usbhost/Core/Inc/usbh_pipes.h +++ /dev/null @@ -1,124 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_PIPES.h - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief Header file for usbh_pipes.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive ----------------------------------------------*/ -#ifndef __USBH_PIPES_H -#define __USBH_PIPES_H - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_PIPES - * @brief This file is the header file for usbh_PIPES.c - * @{ - */ - -/** @defgroup USBH_PIPES_Exported_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Exported_FunctionsPrototype - * @{ - */ - -USBH_StatusTypeDef USBH_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps); - -USBH_StatusTypeDef USBH_ClosePipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num); - -uint8_t USBH_AllocPipe (USBH_HandleTypeDef *phost, - uint8_t ep_addr); - -USBH_StatusTypeDef USBH_FreePipe (USBH_HandleTypeDef *phost, - uint8_t idx); - - - - -/** - * @} - */ - - - -#endif /* __USBH_PIPES_H */ - - -/** - * @} - */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_conf_template.c b/ports/stm32/usbhost/Core/Src/usbh_conf_template.c deleted file mode 100644 index 1c25f7b2e7324..0000000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_conf_template.c +++ /dev/null @@ -1,270 +0,0 @@ -/** - ****************************************************************************** - * @file usb_bsp.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the board support package for the USB host library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_core.h" - -/** - * @brief USBH_LL_Init - * Initialize the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Init (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_DeInit - * De-Initialize the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_DeInit (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_Start - * Start the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Start(USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_Stop - * Stop the Low Level portion of the Host driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_Stop (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetSpeed - * Return the USB Host Speed from the Low Level Driver. - * @param phost: Host handle - * @retval USBH Speeds - */ -USBH_SpeedTypeDef USBH_LL_GetSpeed (USBH_HandleTypeDef *phost) -{ - USBH_SpeedTypeDef speed = 0; - - - return speed; -} - -/** - * @brief USBH_LL_ResetPort - * Reset the Host Port of the Low Level Driver. - * @param phost: Host handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_ResetPort (USBH_HandleTypeDef *phost) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetLastXferSize - * Return the last transfered packet size. - * @param phost: Host handle - * @param pipe: Pipe index - * @retval Packet Size - */ -uint32_t USBH_LL_GetLastXferSize (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} - -/** - * @brief USBH_LL_OpenPipe - * Open a pipe of the Low Level Driver. - * @param phost: Host handle - * @param pipe_num: Pipe index - * @param epnum: Endpoint Number - * @param dev_address: Device USB address - * @param speed: Device Speed - * @param ep_type: Endpoint Type - * @param mps: Endpoint Max Packet Size - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_ClosePipe - * Close a pipe of the Low Level Driver. - * @param phost: Host handle - * @param pipe_num: Pipe index - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_LL_ClosePipe (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} -/** - * @brief USBH_LL_SubmitURB - * Submit a new URB to the low level driver. - * @param phost: Host handle - * @param pipe: Pipe index - * This parameter can be a value from 1 to 15 - * @param direction : Channel number - * This parameter can be one of the these values: - * 0 : Output - * 1 : Input - * @param ep_type : Endpoint Type - * This parameter can be one of the these values: - * @arg EP_TYPE_CTRL: Control type - * @arg EP_TYPE_ISOC: Isochrounous type - * @arg EP_TYPE_BULK: Bulk type - * @arg EP_TYPE_INTR: Interrupt type - * @param token : Endpoint Type - * This parameter can be one of the these values: - * @arg 0: PID_SETUP - * @arg 1: PID_DATA - * @param pbuff : pointer to URB data - * @param length : Length of URB data - * @param do_ping : activate do ping protocol (for high speed only) - * This parameter can be one of the these values: - * 0 : do ping inactive - * 1 : do ping active - * @retval Status - */ - -USBH_StatusTypeDef USBH_LL_SubmitURB (USBH_HandleTypeDef *phost, - uint8_t pipe, - uint8_t direction , - uint8_t ep_type, - uint8_t token, - uint8_t* pbuff, - uint16_t length, - uint8_t do_ping ) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetURBState - * Get a URB state from the low level driver. - * @param phost: Host handle - * @param pipe: Pipe index - * This parameter can be a value from 1 to 15 - * @retval URB state - * This parameter can be one of the these values: - * @arg URB_IDLE - * @arg URB_DONE - * @arg URB_NOTREADY - * @arg URB_NYET - * @arg URB_ERROR - * @arg URB_STALL - */ -USBH_URBStateTypeDef USBH_LL_GetURBState (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - -} - -/** - * @brief USBH_LL_DriverVBUS - * Drive VBUS. - * @param phost: Host handle - * @param state : VBUS state - * This parameter can be one of the these values: - * 0 : VBUS Active - * 1 : VBUS Inactive - * @retval Status - */ - -USBH_StatusTypeDef USBH_LL_DriverVBUS (USBH_HandleTypeDef *phost, uint8_t state) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_SetToggle - * Set toggle for a pipe. - * @param phost: Host handle - * @param pipe: Pipe index - * @param pipe_num: Pipe index - * @param toggle: toggle (0/1) - * @retval Status - */ -USBH_StatusTypeDef USBH_LL_SetToggle (USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t toggle) -{ - - return USBH_OK; -} - -/** - * @brief USBH_LL_GetToggle - * Return the current toggle of a pipe. - * @param phost: Host handle - * @param pipe: Pipe index - * @retval toggle (0/1) - */ -uint8_t USBH_LL_GetToggle (USBH_HandleTypeDef *phost, uint8_t pipe) -{ - uint8_t toggle = 0; - - - return toggle; -} -/** - * @brief USBH_Delay - * Delay routine for the USB Host Library - * @param Delay: Delay in ms - * @retval None - */ -void USBH_Delay (uint32_t Delay) -{ - -} -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Src/usbh_core.c b/ports/stm32/usbhost/Core/Src/usbh_core.c deleted file mode 100644 index 9d2727a89f92a..0000000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_core.c +++ /dev/null @@ -1,936 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_core.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the functions for the core state machine process - * the enumeration and the control transfer process - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_core.h" - - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE - * @{ - */ - -/** @defgroup USBH_CORE - * @brief TThis file handles the basic enumaration when a device is connected - * to the host. - * @{ - */ - - -/** @defgroup USBH_CORE_Private_Defines - * @{ - */ -#define USBH_ADDRESS_DEFAULT 0 -#define USBH_ADDRESS_ASSIGNED 1 -#define USBH_MPS_DEFAULT 0x40 -/** - * @} - */ - -/** @defgroup USBH_CORE_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CORE_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CORE_Private_Functions - * @{ - */ -static USBH_StatusTypeDef USBH_HandleEnum (USBH_HandleTypeDef *phost); -static void USBH_HandleSof (USBH_HandleTypeDef *phost); -static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost); - -#if (USBH_USE_OS == 1) -static void USBH_Process_OS(void const * argument); -#endif - -/** - * @brief HCD_Init - * Initialize the HOST Core. - * @param phost: Host Handle - * @param pUsrFunc: User Callback - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost, void (*pUsrFunc)(USBH_HandleTypeDef *phost, uint8_t ), uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(phost == NULL) - { - USBH_ErrLog("Invalid Host handle"); - return USBH_FAIL; - } - - /* Set DRiver ID */ - phost->id = id; - - /* Unlink class*/ - phost->pActiveClass = NULL; - phost->ClassNumber = 0; - - /* Restore default states and prepare EP0 */ - DeInitStateMachine(phost); - - /* Assign User process */ - if(pUsrFunc != NULL) - { - phost->pUser = pUsrFunc; - } - -#if (USBH_USE_OS == 1) - - /* Create USB Host Queue */ - osMessageQDef(USBH_Queue, 10, uint16_t); - phost->os_event = osMessageCreate (osMessageQ(USBH_Queue), NULL); - - /*Create USB Host Task */ - osThreadDef(USBH_Thread, USBH_Process_OS, USBH_PROCESS_PRIO, 0, 8 * configMINIMAL_STACK_SIZE); - phost->thread = osThreadCreate (osThread(USBH_Thread), phost); -#endif - - /* Initialize low level driver */ - USBH_LL_Init(phost); - return USBH_OK; -} - -/** - * @brief HCD_Init - * De-Initialize the Host portion of the driver. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_DeInit(USBH_HandleTypeDef *phost) -{ - DeInitStateMachine(phost); - - if(phost->pData != NULL) - { - phost->pActiveClass->pData = NULL; - USBH_LL_Stop(phost); - } - - return USBH_OK; -} - -/** - * @brief DeInitStateMachine - * De-Initialize the Host state machine. - * @param phost: Host Handle - * @retval USBH Status - */ -static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost) -{ - uint32_t i = 0; - - /* Clear Pipes flags*/ - for ( ; i < USBH_MAX_PIPES_NBR; i++) - { - phost->Pipes[i] = 0; - } - - for(i = 0; i< USBH_MAX_DATA_BUFFER; i++) - { - phost->device.Data[i] = 0; - } - - phost->gState = HOST_IDLE; - phost->EnumState = ENUM_IDLE; - phost->RequestState = CMD_SEND; - phost->Timer = 0; - - phost->Control.state = CTRL_SETUP; - phost->Control.pipe_size = USBH_MPS_DEFAULT; - phost->Control.errorcount = 0; - - phost->device.address = USBH_ADDRESS_DEFAULT; - phost->device.speed = USBH_SPEED_FULL; - - return USBH_OK; -} - -/** - * @brief USBH_RegisterClass - * Link class driver to Host Core. - * @param phost : Host Handle - * @param pclass: Class handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass) -{ - USBH_StatusTypeDef status = USBH_OK; - - if(pclass != 0) - { - if(phost->ClassNumber < USBH_MAX_NUM_SUPPORTED_CLASS) - { - /* link the class tgo the USB Host handle */ - phost->pClass[phost->ClassNumber++] = pclass; - status = USBH_OK; - } - else - { - USBH_ErrLog("Max Class Number reached"); - status = USBH_FAIL; - } - } - else - { - USBH_ErrLog("Invalid Class handle"); - status = USBH_FAIL; - } - - return status; -} - -/** - * @brief USBH_SelectInterface - * Select current interface. - * @param phost: Host Handle - * @param interface: Interface number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface) -{ - USBH_StatusTypeDef status = USBH_OK; - - if(interface < phost->device.CfgDesc.bNumInterfaces) - { - phost->device.current_interface = interface; - USBH_UsrLog ("Switching to Interface (#%d)", interface); - USBH_UsrLog ("Class : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceClass ); - USBH_UsrLog ("SubClass : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceSubClass ); - USBH_UsrLog ("Protocol : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceProtocol ); - } - else - { - USBH_ErrLog ("Cannot Select This Interface."); - status = USBH_FAIL; - } - return status; -} - -/** - * @brief USBH_GetActiveClass - * Return Device Class. - * @param phost: Host Handle - * @param interface: Interface index - * @retval Class Code - */ -uint8_t USBH_GetActiveClass(USBH_HandleTypeDef *phost) -{ - return (phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass); -} -/** - * @brief USBH_FindInterface - * Find the interface index for a specific class. - * @param phost: Host Handle - * @param Class: Class code - * @param SubClass: SubClass code - * @param Protocol: Protocol code - * @retval interface index in the configuration structure - * @note : (1)interface index 0xFF means interface index not found - */ -uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, uint8_t Class, uint8_t SubClass, uint8_t Protocol) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_CfgDescTypeDef *pcfg ; - int8_t if_ix = 0; - - pif = (USBH_InterfaceDescTypeDef *)0; - pcfg = &phost->device.CfgDesc; - - if((pif->bInterfaceClass == 0xFF) &&(pif->bInterfaceSubClass == 0xFF) && (pif->bInterfaceProtocol == 0xFF)) - { - return 0xFF; - } - - while (if_ix < USBH_MAX_NUM_INTERFACES) - { - pif = &pcfg->Itf_Desc[if_ix]; - if(((pif->bInterfaceClass == Class) || (Class == 0xFF))&& - ((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFF))&& - ((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFF))) - { - return if_ix; - } - if_ix++; - } - return 0xFF; -} - -/** - * @brief USBH_FindInterfaceIndex - * Find the interface index for a specific class interface and alternate setting number. - * @param phost: Host Handle - * @param interface_number: interface number - * @param alt_settings : alaternate setting number - * @retval interface index in the configuration structure - * @note : (1)interface index 0xFF means interface index not found - */ -uint8_t USBH_FindInterfaceIndex(USBH_HandleTypeDef *phost, uint8_t interface_number, uint8_t alt_settings) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_CfgDescTypeDef *pcfg ; - int8_t if_ix = 0; - - pif = (USBH_InterfaceDescTypeDef *)0; - pcfg = &phost->device.CfgDesc; - - while (if_ix < USBH_MAX_NUM_INTERFACES) - { - pif = &pcfg->Itf_Desc[if_ix]; - if((pif->bInterfaceNumber == interface_number) && (pif->bAlternateSetting == alt_settings)) - { - return if_ix; - } - if_ix++; - } - return 0xFF; -} - -/** - * @brief USBH_Start - * Start the USB Host Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Start (USBH_HandleTypeDef *phost) -{ - /* Start the low level driver */ - USBH_LL_Start(phost); - - /* Activate VBUS on the port */ - USBH_LL_DriverVBUS (phost, TRUE); - - return USBH_OK; -} - -/** - * @brief USBH_Stop - * Stop the USB Host Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Stop (USBH_HandleTypeDef *phost) -{ - /* Stop and cleanup the low level driver */ - USBH_LL_Stop(phost); - - /* DeActivate VBUS on the port */ - USBH_LL_DriverVBUS (phost, FALSE); - - /* FRee Control Pipes */ - USBH_FreePipe (phost, phost->Control.pipe_in); - USBH_FreePipe (phost, phost->Control.pipe_out); - - return USBH_OK; -} - -/** - * @brief HCD_ReEnumerate - * Perform a new Enumeration phase. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ReEnumerate (USBH_HandleTypeDef *phost) -{ - /*Stop Host */ - USBH_Stop(phost); - - /*Device has disconnected, so wait for 200 ms */ - USBH_Delay(200); - - /* Set State machines in default state */ - DeInitStateMachine(phost); - - /* Start again the host */ - USBH_Start(phost); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - return USBH_OK; -} - -/** - * @brief USBH_Process - * Background process of the USB Core. - * @param phost: Host Handle - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Process(USBH_HandleTypeDef *phost) -{ - __IO USBH_StatusTypeDef status = USBH_FAIL; - uint8_t idx = 0; - - switch (phost->gState) - { - case HOST_IDLE : - - if (phost->device.is_connected) - { - /* Wait for 200 ms after connection */ - phost->gState = HOST_DEV_WAIT_FOR_ATTACHMENT; - USBH_Delay(200); - USBH_LL_ResetPort(phost); -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - } - break; - - case HOST_DEV_WAIT_FOR_ATTACHMENT: - break; - - case HOST_DEV_ATTACHED : - - USBH_UsrLog("USB Device Attached"); - - /* Wait for 100 ms after Reset */ - USBH_Delay(100); - - phost->device.speed = USBH_LL_GetSpeed(phost); - - phost->gState = HOST_ENUMERATION; - - phost->Control.pipe_out = USBH_AllocPipe (phost, 0x00); - phost->Control.pipe_in = USBH_AllocPipe (phost, 0x80); - - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - break; - - case HOST_ENUMERATION: - /* Check for enumeration status */ - if ( USBH_HandleEnum(phost) == USBH_OK) - { - /* The function shall return USBH_OK when full enumeration is complete */ - USBH_UsrLog ("Enumeration done."); - phost->device.current_interface = 0; - if(phost->device.DevDesc.bNumConfigurations == 1) - { - USBH_UsrLog ("This device has only 1 configuration."); - phost->gState = HOST_SET_CONFIGURATION; - - } - else - { - phost->gState = HOST_INPUT; - } - - } - break; - - case HOST_INPUT: - { - /* user callback for end of device basic enumeration */ - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_SELECT_CONFIGURATION); - phost->gState = HOST_SET_CONFIGURATION; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - } - break; - - case HOST_SET_CONFIGURATION: - /* set configuration */ - if (USBH_SetCfg(phost, phost->device.CfgDesc.bConfigurationValue) == USBH_OK) - { - phost->gState = HOST_CHECK_CLASS; - USBH_UsrLog ("Default configuration set."); - - } - - break; - - case HOST_CHECK_CLASS: - - if(phost->ClassNumber == 0) - { - USBH_UsrLog ("No Class has been registered."); - } - else - { - phost->pActiveClass = NULL; - - for (idx = 0; idx < USBH_MAX_NUM_SUPPORTED_CLASS ; idx ++) - { - if(phost->pClass[idx]->ClassCode == phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass) - { - phost->pActiveClass = phost->pClass[idx]; - } - } - - if(phost->pActiveClass != NULL) - { - if(phost->pActiveClass->Init(phost)== USBH_OK) - { - phost->gState = HOST_CLASS_REQUEST; - USBH_UsrLog ("%s class started.", phost->pActiveClass->Name); - - /* Inform user that a class has been activated */ - phost->pUser(phost, HOST_USER_CLASS_SELECTED); - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_UsrLog ("Device not supporting %s class.", phost->pActiveClass->Name); - } - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_UsrLog ("No registered class for this device."); - } - } - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - break; - - case HOST_CLASS_REQUEST: - /* process class standard contol requests state machine */ - - if(phost->pActiveClass != NULL) - { - status = phost->pActiveClass->Requests(phost); - - if(status == USBH_OK) - { - phost->gState = HOST_CLASS; - } - } - else - { - phost->gState = HOST_ABORT_STATE; - USBH_ErrLog ("Invalid Class Driver."); - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - - break; - case HOST_CLASS: - /* process class state machine */ - if(phost->pActiveClass != NULL) - { - phost->pActiveClass->BgndProcess(phost); - } - break; - - case HOST_DEV_DISCONNECTED : - - DeInitStateMachine(phost); - - /* Re-Initilaize Host for new Enumeration */ - if(phost->pActiveClass != NULL) - { - phost->pActiveClass->DeInit(phost); - phost->pActiveClass = NULL; - } - break; - - case HOST_ABORT_STATE: - default : - break; - } - return USBH_OK; -} - - -/** - * @brief USBH_HandleEnum - * This function includes the complete enumeration process - * @param phost: Host Handle - * @retval USBH_Status - */ -static USBH_StatusTypeDef USBH_HandleEnum (USBH_HandleTypeDef *phost) -{ - USBH_StatusTypeDef Status = USBH_BUSY; - - switch (phost->EnumState) - { - case ENUM_IDLE: - /* Get Device Desc for only 1st 8 bytes : To get EP0 MaxPacketSize */ - if ( USBH_Get_DevDesc(phost, 8) == USBH_OK) - { - phost->Control.pipe_size = phost->device.DevDesc.bMaxPacketSize; - - phost->EnumState = ENUM_GET_FULL_DEV_DESC; - - /* modify control channels configuration for MaxPacket size */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - } - break; - - case ENUM_GET_FULL_DEV_DESC: - /* Get FULL Device Desc */ - if ( USBH_Get_DevDesc(phost, USB_DEVICE_DESC_SIZE)== USBH_OK) - { - USBH_UsrLog("PID: %xh", phost->device.DevDesc.idProduct ); - USBH_UsrLog("VID: %xh", phost->device.DevDesc.idVendor ); - - phost->EnumState = ENUM_SET_ADDR; - - } - break; - - case ENUM_SET_ADDR: - /* set address */ - if ( USBH_SetAddress(phost, USBH_DEVICE_ADDRESS) == USBH_OK) - { - USBH_Delay(2); - phost->device.address = USBH_DEVICE_ADDRESS; - - /* user callback for device address assigned */ - USBH_UsrLog("Address (#%d) assigned.", phost->device.address); - phost->EnumState = ENUM_GET_CFG_DESC; - - /* modify control channels to update device address */ - USBH_OpenPipe (phost, - phost->Control.pipe_in, - 0x80, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - - /* Open Control pipes */ - USBH_OpenPipe (phost, - phost->Control.pipe_out, - 0x00, - phost->device.address, - phost->device.speed, - USBH_EP_CONTROL, - phost->Control.pipe_size); - } - break; - - case ENUM_GET_CFG_DESC: - /* get standard configuration descriptor */ - if ( USBH_Get_CfgDesc(phost, - USB_CONFIGURATION_DESC_SIZE) == USBH_OK) - { - phost->EnumState = ENUM_GET_FULL_CFG_DESC; - } - break; - - case ENUM_GET_FULL_CFG_DESC: - /* get FULL config descriptor (config, interface, endpoints) */ - if (USBH_Get_CfgDesc(phost, - phost->device.CfgDesc.wTotalLength) == USBH_OK) - { - phost->EnumState = ENUM_GET_MFC_STRING_DESC; - } - break; - - case ENUM_GET_MFC_STRING_DESC: - if (phost->device.DevDesc.iManufacturer != 0) - { /* Check that Manufacturer String is available */ - - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iManufacturer, - phost->device.Data , - 0xff) == USBH_OK) - { - /* User callback for Manufacturing string */ - USBH_UsrLog("Manufacturer : %s", (char *)phost->device.Data); - phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - } - else - { - USBH_UsrLog("Manufacturer : N/A"); - phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - case ENUM_GET_PRODUCT_STRING_DESC: - if (phost->device.DevDesc.iProduct != 0) - { /* Check that Product string is available */ - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iProduct, - phost->device.Data, - 0xff) == USBH_OK) - { - /* User callback for Product string */ - USBH_UsrLog("Product : %s", (char *)phost->device.Data); - phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC; - } - } - else - { - USBH_UsrLog("Product : N/A"); - phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - case ENUM_GET_SERIALNUM_STRING_DESC: - if (phost->device.DevDesc.iSerialNumber != 0) - { /* Check that Serial number string is available */ - if ( USBH_Get_StringDesc(phost, - phost->device.DevDesc.iSerialNumber, - phost->device.Data, - 0xff) == USBH_OK) - { - /* User callback for Serial number string */ - USBH_UsrLog("Serial Number : %s", (char *)phost->device.Data); - Status = USBH_OK; - } - } - else - { - USBH_UsrLog("Serial Number : N/A"); - Status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_STATE_CHANGED_EVENT, 0); -#endif - } - break; - - default: - break; - } - return Status; -} - -/** - * @brief USBH_LL_SetTimer - * Set the initial Host Timer tick - * @param phost: Host Handle - * @retval None - */ -void USBH_LL_SetTimer (USBH_HandleTypeDef *phost, uint32_t time) -{ - phost->Timer = time; -} -/** - * @brief USBH_LL_IncTimer - * Increment Host Timer tick - * @param phost: Host Handle - * @retval None - */ -void USBH_LL_IncTimer (USBH_HandleTypeDef *phost) -{ - phost->Timer ++; - USBH_HandleSof(phost); -} - -/** - * @brief USBH_HandleSof - * Call SOF process - * @param phost: Host Handle - * @retval None - */ -void USBH_HandleSof (USBH_HandleTypeDef *phost) -{ - if((phost->gState == HOST_CLASS)&&(phost->pActiveClass != NULL)) - { - phost->pActiveClass->SOFProcess(phost); - } -} -/** - * @brief USBH_LL_Connect - * Handle USB Host connexion event - * @param phost: Host Handle - * @retval USBH_Status - */ -USBH_StatusTypeDef USBH_LL_Connect (USBH_HandleTypeDef *phost) -{ - if(phost->gState == HOST_IDLE ) - { - phost->device.is_connected = 1; - phost->gState = HOST_IDLE ; - - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_CONNECTION); - } - } - else if(phost->gState == HOST_DEV_WAIT_FOR_ATTACHMENT ) - { - phost->gState = HOST_DEV_ATTACHED ; - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - return USBH_OK; -} - -/** - * @brief USBH_LL_Disconnect - * Handle USB Host disconnexion event - * @param phost: Host Handle - * @retval USBH_Status - */ -USBH_StatusTypeDef USBH_LL_Disconnect (USBH_HandleTypeDef *phost) -{ - /*Stop Host */ - USBH_LL_Stop(phost); - - /* FRee Control Pipes */ - USBH_FreePipe (phost, phost->Control.pipe_in); - USBH_FreePipe (phost, phost->Control.pipe_out); - - phost->device.is_connected = 0; - - if(phost->pUser != NULL) - { - phost->pUser(phost, HOST_USER_DISCONNECTION); - } - USBH_UsrLog("USB Device disconnected"); - - /* Start the low level driver */ - USBH_LL_Start(phost); - - phost->gState = HOST_DEV_DISCONNECTED; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_PORT_EVENT, 0); -#endif - - return USBH_OK; -} - - -#if (USBH_USE_OS == 1) -/** - * @brief USB Host Thread task - * @param pvParameters not used - * @retval None - */ -static void USBH_Process_OS(void const * argument) -{ - osEvent event; - - for(;;) - { - event = osMessageGet(((USBH_HandleTypeDef *)argument)->os_event, osWaitForever ); - - if( event.status == osEventMessage ) - { - USBH_Process((USBH_HandleTypeDef *)argument); - } - } -} - -/** -* @brief USBH_LL_NotifyURBChange -* Notify URB state Change -* @param phost: Host handle -* @retval USBH Status -*/ -USBH_StatusTypeDef USBH_LL_NotifyURBChange (USBH_HandleTypeDef *phost) -{ - osMessagePut ( phost->os_event, USBH_URB_EVENT, 0); - return USBH_OK; -} -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c b/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c deleted file mode 100644 index 58bc34d643503..0000000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_ctlreq.c +++ /dev/null @@ -1,881 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ctlreq.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements the control requests for device enumeration - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_ctlreq.h" - -/** @addtogroup USBH_LIB -* @{ -*/ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_CTLREQ -* @brief This file implements the standard requests for device enumeration -* @{ -*/ - - -/** @defgroup USBH_CTLREQ_Private_Defines -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - - -/** @defgroup USBH_CTLREQ_Private_Macros -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_Variables -* @{ -*/ -/** -* @} -*/ - -/** @defgroup USBH_CTLREQ_Private_FunctionPrototypes -* @{ -*/ -static USBH_StatusTypeDef USBH_HandleControl (USBH_HandleTypeDef *phost); - -static void USBH_ParseDevDesc (USBH_DevDescTypeDef* , uint8_t *buf, uint16_t length); - -static void USBH_ParseCfgDesc (USBH_CfgDescTypeDef* cfg_desc, - uint8_t *buf, - uint16_t length); - - -static void USBH_ParseEPDesc (USBH_EpDescTypeDef *ep_descriptor, uint8_t *buf); -static void USBH_ParseStringDesc (uint8_t* psrc, uint8_t* pdest, uint16_t length); -static void USBH_ParseInterfaceDesc (USBH_InterfaceDescTypeDef *if_descriptor, uint8_t *buf); - - -/** -* @} -*/ - - -/** @defgroup USBH_CTLREQ_Private_Functions -* @{ -*/ - - -/** - * @brief USBH_Get_DevDesc - * Issue Get Device Descriptor command to the device. Once the response - * received, it parses the device descriptor and updates the status. - * @param phost: Host Handle - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, uint8_t length) -{ - USBH_StatusTypeDef status; - - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_DEVICE, - phost->device.Data, - length)) == USBH_OK) - { - /* Commands successfully sent and Response Received */ - USBH_ParseDevDesc(&phost->device.DevDesc, phost->device.Data, length); - } - return status; -} - -/** - * @brief USBH_Get_CfgDesc - * Issues Configuration Descriptor to the device. Once the response - * received, it parses the configuartion descriptor and updates the - * status. - * @param phost: Host Handle - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, - uint16_t length) - -{ - USBH_StatusTypeDef status; - uint8_t *pData; -#if (USBH_KEEP_CFG_DESCRIPTOR == 1) - pData = phost->device.CfgDesc_Raw; -#else - pData = phost->device.Data; -#endif - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_CONFIGURATION, - pData, - length)) == USBH_OK) - { - - /* Commands successfully sent and Response Received */ - USBH_ParseCfgDesc (&phost->device.CfgDesc, - pData, - length); - - } - return status; -} - - -/** - * @brief USBH_Get_StringDesc - * Issues string Descriptor command to the device. Once the response - * received, it parses the string descriptor and updates the status. - * @param phost: Host Handle - * @param string_index: String index for the descriptor - * @param buff: Buffer address for the descriptor - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost, - uint8_t string_index, - uint8_t *buff, - uint16_t length) -{ - USBH_StatusTypeDef status; - if((status = USBH_GetDescriptor(phost, - USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, - USB_DESC_STRING | string_index, - phost->device.Data, - length)) == USBH_OK) - { - /* Commands successfully sent and Response Received */ - USBH_ParseStringDesc(phost->device.Data,buff, length); - } - return status; -} - -/** - * @brief USBH_GetDescriptor - * Issues Descriptor command to the device. Once the response received, - * it parses the descriptor and updates the status. - * @param phost: Host Handle - * @param req_type: Descriptor type - * @param value_idx: wValue for the GetDescriptr request - * @param buff: Buffer to store the descriptor - * @param length: Length of the descriptor - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost, - uint8_t req_type, - uint16_t value_idx, - uint8_t* buff, - uint16_t length ) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_D2H | req_type; - phost->Control.setup.b.bRequest = USB_REQ_GET_DESCRIPTOR; - phost->Control.setup.b.wValue.w = value_idx; - - if ((value_idx & 0xff00) == USB_DESC_STRING) - { - phost->Control.setup.b.wIndex.w = 0x0409; - } - else - { - phost->Control.setup.b.wIndex.w = 0; - } - phost->Control.setup.b.wLength.w = length; - } - return USBH_CtlReq(phost, buff , length ); -} - -/** - * @brief USBH_SetAddress - * This command sets the address to the connected device - * @param phost: Host Handle - * @param DeviceAddress: Device address to assign - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost, - uint8_t DeviceAddress) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE | \ - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_SET_ADDRESS; - - phost->Control.setup.b.wValue.w = (uint16_t)DeviceAddress; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_SetCfg - * The command sets the configuration value to the connected device - * @param phost: Host Handle - * @param cfg_idx: Configuration value - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, - uint16_t cfg_idx) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE |\ - USB_REQ_TYPE_STANDARD; - phost->Control.setup.b.bRequest = USB_REQ_SET_CONFIGURATION; - phost->Control.setup.b.wValue.w = cfg_idx; - phost->Control.setup.b.wIndex.w = 0; - phost->Control.setup.b.wLength.w = 0; - } - - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_SetInterface - * The command sets the Interface value to the connected device - * @param phost: Host Handle - * @param altSetting: Interface value - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_SetInterface(USBH_HandleTypeDef *phost, - uint8_t ep_num, uint8_t altSetting) -{ - - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_INTERFACE | \ - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_SET_INTERFACE; - phost->Control.setup.b.wValue.w = altSetting; - phost->Control.setup.b.wIndex.w = ep_num; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_ClrFeature - * This request is used to clear or disable a specific feature. - * @param phost: Host Handle - * @param ep_num: endpoint number - * @param hc_num: Host channel number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, - uint8_t ep_num) -{ - if(phost->RequestState == CMD_SEND) - { - phost->Control.setup.b.bmRequestType = USB_H2D | - USB_REQ_RECIPIENT_ENDPOINT | - USB_REQ_TYPE_STANDARD; - - phost->Control.setup.b.bRequest = USB_REQ_CLEAR_FEATURE; - phost->Control.setup.b.wValue.w = FEATURE_SELECTOR_ENDPOINT; - phost->Control.setup.b.wIndex.w = ep_num; - phost->Control.setup.b.wLength.w = 0; - } - return USBH_CtlReq(phost, 0 , 0 ); -} - -/** - * @brief USBH_ParseDevDesc - * This function Parses the device descriptor - * @param dev_desc: device_descriptor destinaton address - * @param buf: Buffer where the source descriptor is available - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseDevDesc (USBH_DevDescTypeDef* dev_desc, - uint8_t *buf, - uint16_t length) -{ - dev_desc->bLength = *(uint8_t *) (buf + 0); - dev_desc->bDescriptorType = *(uint8_t *) (buf + 1); - dev_desc->bcdUSB = LE16 (buf + 2); - dev_desc->bDeviceClass = *(uint8_t *) (buf + 4); - dev_desc->bDeviceSubClass = *(uint8_t *) (buf + 5); - dev_desc->bDeviceProtocol = *(uint8_t *) (buf + 6); - dev_desc->bMaxPacketSize = *(uint8_t *) (buf + 7); - - if (length > 8) - { /* For 1st time after device connection, Host may issue only 8 bytes for - Device Descriptor Length */ - dev_desc->idVendor = LE16 (buf + 8); - dev_desc->idProduct = LE16 (buf + 10); - dev_desc->bcdDevice = LE16 (buf + 12); - dev_desc->iManufacturer = *(uint8_t *) (buf + 14); - dev_desc->iProduct = *(uint8_t *) (buf + 15); - dev_desc->iSerialNumber = *(uint8_t *) (buf + 16); - dev_desc->bNumConfigurations = *(uint8_t *) (buf + 17); - } -} - -/** - * @brief USBH_ParseCfgDesc - * This function Parses the configuration descriptor - * @param cfg_desc: Configuration Descriptor address - * @param buf: Buffer where the source descriptor is available - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseCfgDesc (USBH_CfgDescTypeDef* cfg_desc, - uint8_t *buf, - uint16_t length) -{ - USBH_InterfaceDescTypeDef *pif ; - USBH_EpDescTypeDef *pep; - USBH_DescHeader_t *pdesc = (USBH_DescHeader_t *)buf; - uint16_t ptr; - int8_t if_ix = 0; - int8_t ep_ix = 0; - - pdesc = (USBH_DescHeader_t *)buf; - - /* Parse configuration descriptor */ - cfg_desc->bLength = *(uint8_t *) (buf + 0); - cfg_desc->bDescriptorType = *(uint8_t *) (buf + 1); - cfg_desc->wTotalLength = LE16 (buf + 2); - cfg_desc->bNumInterfaces = *(uint8_t *) (buf + 4); - cfg_desc->bConfigurationValue = *(uint8_t *) (buf + 5); - cfg_desc->iConfiguration = *(uint8_t *) (buf + 6); - cfg_desc->bmAttributes = *(uint8_t *) (buf + 7); - cfg_desc->bMaxPower = *(uint8_t *) (buf + 8); - - - if (length > USB_CONFIGURATION_DESC_SIZE) - { - ptr = USB_LEN_CFG_DESC; - pif = (USBH_InterfaceDescTypeDef *)0; - - - while ((if_ix < USBH_MAX_NUM_INTERFACES ) && (ptr < cfg_desc->wTotalLength)) - { - pdesc = USBH_GetNextDesc((uint8_t *)pdesc, &ptr); - if (pdesc->bDescriptorType == USB_DESC_TYPE_INTERFACE) - { - pif = &cfg_desc->Itf_Desc[if_ix]; - USBH_ParseInterfaceDesc (pif, (uint8_t *)pdesc); - - ep_ix = 0; - pep = (USBH_EpDescTypeDef *)0; - while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength)) - { - pdesc = USBH_GetNextDesc((void* )pdesc, &ptr); - if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT) - { - pep = &cfg_desc->Itf_Desc[if_ix].Ep_Desc[ep_ix]; - USBH_ParseEPDesc (pep, (uint8_t *)pdesc); - ep_ix++; - } - } - if_ix++; - } - } - } -} - - - -/** - * @brief USBH_ParseInterfaceDesc - * This function Parses the interface descriptor - * @param if_descriptor : Interface descriptor destination - * @param buf: Buffer where the descriptor data is available - * @retval None - */ -static void USBH_ParseInterfaceDesc (USBH_InterfaceDescTypeDef *if_descriptor, - uint8_t *buf) -{ - if_descriptor->bLength = *(uint8_t *) (buf + 0); - if_descriptor->bDescriptorType = *(uint8_t *) (buf + 1); - if_descriptor->bInterfaceNumber = *(uint8_t *) (buf + 2); - if_descriptor->bAlternateSetting = *(uint8_t *) (buf + 3); - if_descriptor->bNumEndpoints = *(uint8_t *) (buf + 4); - if_descriptor->bInterfaceClass = *(uint8_t *) (buf + 5); - if_descriptor->bInterfaceSubClass = *(uint8_t *) (buf + 6); - if_descriptor->bInterfaceProtocol = *(uint8_t *) (buf + 7); - if_descriptor->iInterface = *(uint8_t *) (buf + 8); -} - -/** - * @brief USBH_ParseEPDesc - * This function Parses the endpoint descriptor - * @param ep_descriptor: Endpoint descriptor destination address - * @param buf: Buffer where the parsed descriptor stored - * @retval None - */ -static void USBH_ParseEPDesc (USBH_EpDescTypeDef *ep_descriptor, - uint8_t *buf) -{ - - ep_descriptor->bLength = *(uint8_t *) (buf + 0); - ep_descriptor->bDescriptorType = *(uint8_t *) (buf + 1); - ep_descriptor->bEndpointAddress = *(uint8_t *) (buf + 2); - ep_descriptor->bmAttributes = *(uint8_t *) (buf + 3); - ep_descriptor->wMaxPacketSize = LE16 (buf + 4); - ep_descriptor->bInterval = *(uint8_t *) (buf + 6); -} - -/** - * @brief USBH_ParseStringDesc - * This function Parses the string descriptor - * @param psrc: Source pointer containing the descriptor data - * @param pdest: Destination address pointer - * @param length: Length of the descriptor - * @retval None - */ -static void USBH_ParseStringDesc (uint8_t* psrc, - uint8_t* pdest, - uint16_t length) -{ - uint16_t strlength; - uint16_t idx; - - /* The UNICODE string descriptor is not NULL-terminated. The string length is - computed by substracting two from the value of the first byte of the descriptor. - */ - - /* Check which is lower size, the Size of string or the length of bytes read - from the device */ - - if ( psrc[1] == USB_DESC_TYPE_STRING) - { /* Make sure the Descriptor is String Type */ - - /* psrc[0] contains Size of Descriptor, subtract 2 to get the length of string */ - strlength = ( ( (psrc[0]-2) <= length) ? (psrc[0]-2) :length); - psrc += 2; /* Adjust the offset ignoring the String Len and Descriptor type */ - - for (idx = 0; idx < strlength; idx+=2 ) - {/* Copy Only the string and ignore the UNICODE ID, hence add the src */ - *pdest = psrc[idx]; - pdest++; - } - *pdest = 0; /* mark end of string */ - } -} - -/** - * @brief USBH_GetNextDesc - * This function return the next descriptor header - * @param buf: Buffer where the cfg descriptor is available - * @param ptr: data popinter inside the cfg descriptor - * @retval next header - */ -USBH_DescHeader_t *USBH_GetNextDesc (uint8_t *pbuf, uint16_t *ptr) -{ - USBH_DescHeader_t *pnext; - - *ptr += ((USBH_DescHeader_t *)pbuf)->bLength; - pnext = (USBH_DescHeader_t *)((uint8_t *)pbuf + \ - ((USBH_DescHeader_t *)pbuf)->bLength); - - return(pnext); -} - - -/** - * @brief USBH_CtlReq - * USBH_CtlReq sends a control request and provide the status after - * completion of the request - * @param phost: Host Handle - * @param req: Setup Request Structure - * @param buff: data buffer address to store the response - * @param length: length of the response - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlReq (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length) -{ - USBH_StatusTypeDef status; - status = USBH_BUSY; - - switch (phost->RequestState) - { - case CMD_SEND: - /* Start a SETUP transfer */ - phost->Control.buff = buff; - phost->Control.length = length; - phost->Control.state = CTRL_SETUP; - phost->RequestState = CMD_WAIT; - status = USBH_BUSY; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - break; - - case CMD_WAIT: - status = USBH_HandleControl(phost); - if (status == USBH_OK) - { - /* Commands successfully sent and Response Received */ - phost->RequestState = CMD_SEND; - phost->Control.state =CTRL_IDLE; - status = USBH_OK; - } - else if (status == USBH_FAIL) - { - /* Failure Mode */ - phost->RequestState = CMD_SEND; - status = USBH_FAIL; - } - break; - - default: - break; - } - return status; -} - -/** - * @brief USBH_HandleControl - * Handles the USB control transfer state machine - * @param phost: Host Handle - * @retval USBH Status - */ -static USBH_StatusTypeDef USBH_HandleControl (USBH_HandleTypeDef *phost) -{ - uint8_t direction; - USBH_StatusTypeDef status = USBH_BUSY; - USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE; - - switch (phost->Control.state) - { - case CTRL_SETUP: - /* send a SETUP packet */ - USBH_CtlSendSetup (phost, - (uint8_t *)phost->Control.setup.d8 , - phost->Control.pipe_out); - - phost->Control.state = CTRL_SETUP_WAIT; - break; - - case CTRL_SETUP_WAIT: - - URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out); - /* case SETUP packet sent successfully */ - if(URB_Status == USBH_URB_DONE) - { - direction = (phost->Control.setup.b.bmRequestType & USB_REQ_DIR_MASK); - - /* check if there is a data stage */ - if (phost->Control.setup.b.wLength.w != 0 ) - { - if (direction == USB_D2H) - { - /* Data Direction is IN */ - phost->Control.state = CTRL_DATA_IN; - } - else - { - /* Data Direction is OUT */ - phost->Control.state = CTRL_DATA_OUT; - } - } - /* No DATA stage */ - else - { - /* If there is No Data Transfer Stage */ - if (direction == USB_D2H) - { - /* Data Direction is IN */ - phost->Control.state = CTRL_STATUS_OUT; - } - else - { - /* Data Direction is OUT */ - phost->Control.state = CTRL_STATUS_IN; - } - } -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_DATA_IN: - /* Issue an IN token */ - phost->Control.timer = phost->Timer; - USBH_CtlReceiveData(phost, - phost->Control.buff, - phost->Control.length, - phost->Control.pipe_in); - - phost->Control.state = CTRL_DATA_IN_WAIT; - break; - - case CTRL_DATA_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_in); - - /* check is DATA packet transfered successfully */ - if (URB_Status == USBH_URB_DONE) - { - phost->Control.state = CTRL_STATUS_OUT; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - /* manage error cases*/ - if (URB_Status == USBH_URB_STALL) - { - /* In stall case, return to previous machine state*/ - status = USBH_NOT_SUPPORTED; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - /* Device error */ - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_DATA_OUT: - - USBH_CtlSendData (phost, - phost->Control.buff, - phost->Control.length , - phost->Control.pipe_out, - 1); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_DATA_OUT_WAIT; - break; - - case CTRL_DATA_OUT_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_out); - - if (URB_Status == USBH_URB_DONE) - { /* If the Setup Pkt is sent successful, then change the state */ - phost->Control.state = CTRL_STATUS_IN; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - /* handle error cases */ - else if (URB_Status == USBH_URB_STALL) - { - /* In stall case, return to previous machine state*/ - phost->Control.state = CTRL_STALLED; - status = USBH_NOT_SUPPORTED; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_NOTREADY) - { - /* Nack received from device */ - phost->Control.state = CTRL_DATA_OUT; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - /* device error */ - phost->Control.state = CTRL_ERROR; - status = USBH_FAIL; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - - case CTRL_STATUS_IN: - /* Send 0 bytes out packet */ - USBH_CtlReceiveData (phost, - 0, - 0, - phost->Control.pipe_in); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_STATUS_IN_WAIT; - - break; - - case CTRL_STATUS_IN_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_in); - - if ( URB_Status == USBH_URB_DONE) - { /* Control transfers completed, Exit the State Machine */ - phost->Control.state = CTRL_COMPLETE; - status = USBH_OK; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - - else if (URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if(URB_Status == USBH_URB_STALL) - { - /* Control transfers completed, Exit the State Machine */ - status = USBH_NOT_SUPPORTED; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_STATUS_OUT: - USBH_CtlSendData (phost, - 0, - 0, - phost->Control.pipe_out, - 1); - phost->Control.timer = phost->Timer; - phost->Control.state = CTRL_STATUS_OUT_WAIT; - break; - - case CTRL_STATUS_OUT_WAIT: - - URB_Status = USBH_LL_GetURBState(phost , phost->Control.pipe_out); - if (URB_Status == USBH_URB_DONE) - { - status = USBH_OK; - phost->Control.state = CTRL_COMPLETE; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_NOTREADY) - { - phost->Control.state = CTRL_STATUS_OUT; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - else if (URB_Status == USBH_URB_ERROR) - { - phost->Control.state = CTRL_ERROR; - -#if (USBH_USE_OS == 1) - osMessagePut ( phost->os_event, USBH_CONTROL_EVENT, 0); -#endif - } - break; - - case CTRL_ERROR: - /* - After a halt condition is encountered or an error is detected by the - host, a control endpoint is allowed to recover by accepting the next Setup - PID; i.e., recovery actions via some other pipe are not required for control - endpoints. For the Default Control Pipe, a device reset will ultimately be - required to clear the halt or error condition if the next Setup PID is not - accepted. - */ - if (++ phost->Control.errorcount <= USBH_MAX_ERROR_COUNT) - { - /* try to recover control */ - USBH_LL_Stop(phost); - - /* Do the transmission again, starting from SETUP Packet */ - phost->Control.state = CTRL_SETUP; - phost->RequestState = CMD_SEND; - } - else - { - phost->Control.errorcount = 0; - USBH_ErrLog("Control error"); - status = USBH_FAIL; - - } - break; - - default: - break; - } - return status; -} - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_ioreq.c b/ports/stm32/usbhost/Core/Src/usbh_ioreq.c deleted file mode 100644 index 280020355d446..0000000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_ioreq.c +++ /dev/null @@ -1,358 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_ioreq.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file handles the issuing of the USB transactions - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ - -#include "usbh_ioreq.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_IOREQ - * @brief This file handles the standard protocol processing (USB v2.0) - * @{ - */ - - -/** @defgroup USBH_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBH_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_Variables - * @{ - */ -/** - * @} - */ -/** @defgroup USBH_IOREQ_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_IOREQ_Private_Functions - * @{ - */ - - - -/** - * @brief USBH_CtlSendSetup - * Sends the Setup Packet to the Device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be send to Device - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlSendSetup (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t pipe_num) -{ - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_SETUP, /* Type setup */ - buff, /* data buffer */ - USBH_SETUP_PKT_SIZE, /* data length */ - 0); - return USBH_OK; -} - - -/** - * @brief USBH_CtlSendData - * Sends a data Packet to the Device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be sent to Device - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_CtlSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num, - uint8_t do_ping ) -{ - if(phost->device.speed != USBH_SPEED_HIGH) - { - do_ping = 0; - } - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - do_ping); /* do ping (HS Only)*/ - - return USBH_OK; -} - - -/** - * @brief USBH_CtlReceiveData - * Receives the Device Response to the Setup Packet - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost, - uint8_t* buff, - uint16_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_CONTROL, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - return USBH_OK; - -} - - -/** - * @brief USBH_BulkSendData - * Sends the Bulk Packet to the device - * @param phost: Host Handle - * @param buff: Buffer pointer from which the Data will be sent to Device - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_BulkSendData (USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num, - uint8_t do_ping ) -{ - if(phost->device.speed != USBH_SPEED_HIGH) - { - do_ping = 0; - } - - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : IN */ - USBH_EP_BULK, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - do_ping); /* do ping (HS Only)*/ - return USBH_OK; -} - - -/** - * @brief USBH_BulkReceiveData - * Receives IN bulk packet from device - * @param phost: Host Handle - * @param buff: Buffer pointer in which the received data packet to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint16_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_BULK, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - return USBH_OK; -} - - -/** - * @brief USBH_InterruptReceiveData - * Receives the Device Response to the Interrupt IN token - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_InterruptReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_INTERRUPT, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} - -/** - * @brief USBH_InterruptSendData - * Sends the data on Interrupt OUT Endpoint - * @param phost: Host Handle - * @param buff: Buffer pointer from where the data needs to be copied - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_InterruptSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint8_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_INTERRUPT, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} - -/** - * @brief USBH_IsocReceiveData - * Receives the Device Response to the Isochronous IN token - * @param phost: Host Handle - * @param buff: Buffer pointer in which the response needs to be copied - * @param length: Length of the data to be received - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_IsocReceiveData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 1, /* Direction : IN */ - USBH_EP_ISO, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - - return USBH_OK; -} - -/** - * @brief USBH_IsocSendData - * Sends the data on Isochronous OUT Endpoint - * @param phost: Host Handle - * @param buff: Buffer pointer from where the data needs to be copied - * @param length: Length of the data to be sent - * @param pipe_num: Pipe Number - * @retval USBH Status. - */ -USBH_StatusTypeDef USBH_IsocSendData(USBH_HandleTypeDef *phost, - uint8_t *buff, - uint32_t length, - uint8_t pipe_num) -{ - USBH_LL_SubmitURB (phost, /* Driver handle */ - pipe_num, /* Pipe index */ - 0, /* Direction : OUT */ - USBH_EP_ISO, /* EP type */ - USBH_PID_DATA, /* Type Data */ - buff, /* data buffer */ - length, /* data length */ - 0); - - return USBH_OK; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/ports/stm32/usbhost/Core/Src/usbh_pipes.c b/ports/stm32/usbhost/Core/Src/usbh_pipes.c deleted file mode 100644 index 9dcc4c517b0f2..0000000000000 --- a/ports/stm32/usbhost/Core/Src/usbh_pipes.c +++ /dev/null @@ -1,204 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_pipes.c - * @author MCD Application Team - * @version V3.0.0 - * @date 18-February-2014 - * @brief This file implements functions for opening and closing Pipes - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbh_pipes.h" - -/** @addtogroup USBH_LIB - * @{ - */ - -/** @addtogroup USBH_LIB_CORE -* @{ -*/ - -/** @defgroup USBH_PIPES - * @brief This file includes opening and closing Pipes - * @{ - */ - -/** @defgroup USBH_PIPES_Private_Defines - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_PIPES_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBH_PIPES_Private_Functions - * @{ - */ -static uint16_t USBH_GetFreePipe (USBH_HandleTypeDef *phost); - - -/** - * @brief USBH_Open_Pipe - * Open a pipe - * @param phost: Host Handle - * @param pipe_num: Pipe Number - * @param dev_address: USB Device address allocated to attached device - * @param speed : USB device speed (Full/Low) - * @param ep_type: end point type (Bulk/int/ctl) - * @param mps: max pkt size - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_OpenPipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - USBH_LL_OpenPipe(phost, - pipe_num, - epnum, - dev_address, - speed, - ep_type, - mps); - - return USBH_OK; - -} - -/** - * @brief USBH_ClosePipe - * Close a pipe - * @param phost: Host Handle - * @param pipe_num: Pipe Number - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_ClosePipe (USBH_HandleTypeDef *phost, - uint8_t pipe_num) -{ - - USBH_LL_ClosePipe(phost, pipe_num); - - return USBH_OK; - -} - -/** - * @brief USBH_Alloc_Pipe - * Allocate a new Pipe - * @param phost: Host Handle - * @param ep_addr: End point for which the Pipe to be allocated - * @retval Pipe number - */ -uint8_t USBH_AllocPipe (USBH_HandleTypeDef *phost, uint8_t ep_addr) -{ - uint16_t pipe; - - pipe = USBH_GetFreePipe(phost); - - if (pipe != 0xFFFF) - { - phost->Pipes[pipe] = 0x8000 | ep_addr; - } - return pipe; -} - -/** - * @brief USBH_Free_Pipe - * Free the USB Pipe - * @param phost: Host Handle - * @param idx: Pipe number to be freed - * @retval USBH Status - */ -USBH_StatusTypeDef USBH_FreePipe (USBH_HandleTypeDef *phost, uint8_t idx) -{ - if(idx < 11) - { - phost->Pipes[idx] &= 0x7FFF; - } - return USBH_OK; -} - -/** - * @brief USBH_GetFreePipe - * @param phost: Host Handle - * Get a free Pipe number for allocation to a device endpoint - * @retval idx: Free Pipe number - */ -static uint16_t USBH_GetFreePipe (USBH_HandleTypeDef *phost) -{ - uint8_t idx = 0; - - for (idx = 0 ; idx < 11 ; idx++) - { - if ((phost->Pipes[idx] & 0x8000) == 0) - { - return idx; - } - } - return 0xFFFF; -} -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/ports/stm32/usbhost/Release_Notes.html b/ports/stm32/usbhost/Release_Notes.html deleted file mode 100644 index cbb723ee947ed..0000000000000 --- a/ports/stm32/usbhost/Release_Notes.html +++ /dev/null @@ -1,973 +0,0 @@ - - - - - - - - -Release Notes for STM32 USB Host Library - - - - - - - - -
- -

 

- -
- - - - - -
- - - - - - - -
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Back to Release page

-
-

Release Notes for STM32 USB Host Library

-

Copyright - 2014 STMicroelectronics

-

-
-

 

- - - - -
-

Update History

- -

V3.0.0 / 18-February-2014

- - - -

Main -Changes

- - - - - - - -
    -
  • Major update -based on STM32Cube specification: Library Core, Classes architecture and APIs -modified vs. V2.1.0, and thus the 2 versions are not compatible.
    -
    • -
  • This version has to be used only with STM32Cube based development
    • -
-

V2.1.0 / 19-March-2012

-

Main -Changes

- -
  • Official support of STM32F4xx devices
  • All source files: license disclaimer text update and add link to the License file on ST Internet
  • Add ISR structure to link the low level driver to the Host library
  • Change length parameter in the I/O operations to handle large amount of data
  • Enhance the configuration descriptor parsing method to take into account multi interface devices
  • HID class
    • Remove blocking even frame synchronization loop
  • MSC class
    • Handle correctly the BOT transfer with length < max length
    • Handle multi sector length data in the FAT FS interface
  • Miscellaneous bug fix

V2.0.0 / 22-July-2011

Main -Changes

-
  • Second official version supporting STM32F105/7 and STM32F2xx devices
  • Add support for STM32F2xx devices
  • Add multi interface feature
  • Add dynamic configuration parsing
  • Add -USBH_DeAllocate_AllChannel function in the Host channel management -layer to clean up channels allocation table when de-initializing the -library
  • Change the core layer to stop correctly the host core and free all allocated channels
  • Add usbh_conf.h file in the application layer to customize some user parameters

V1.0.0 - 11/29/2010

-
  • Created 

License

-

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at:


Unless -required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT -WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See -the License for the specific language governing permissions and -limitations under the License. -
-
-
-

For - complete documentation on STM32 - Microcontrollers visit www.st.com/STM32

-
-

-
- -
- -

 

- -
- - \ No newline at end of file diff --git a/ports/stm32/usrsw.c b/ports/stm32/usrsw.c deleted file mode 100644 index a7721ad779a10..0000000000000 --- a/ports/stm32/usrsw.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extint.h" -#include "pin.h" -#include "genhdr/pins.h" -#include "usrsw.h" - -#if MICROPY_HW_HAS_SWITCH - -/// \moduleref pyb -/// \class Switch - switch object -/// -/// A Switch object is used to control a push-button switch. -/// -/// Usage: -/// -/// sw = pyb.Switch() # create a switch object -/// sw() # get state (True if pressed, False otherwise) -/// sw.callback(f) # register a callback to be called when the -/// # switch is pressed down -/// sw.callback(None) # remove the callback -/// -/// Example: -/// -/// pyb.Switch().callback(lambda: pyb.LED(1).toggle()) - -// this function inits the switch GPIO so that it can be used -void switch_init0(void) { - mp_hal_pin_config(&MICROPY_HW_USRSW_PIN, MP_HAL_PIN_MODE_INPUT, MICROPY_HW_USRSW_PULL, 0); -} - -int switch_get(void) { - int val = ((MICROPY_HW_USRSW_PIN.gpio->IDR & MICROPY_HW_USRSW_PIN.pin_mask) != 0); - return val == MICROPY_HW_USRSW_PRESSED; -} - -/******************************************************************************/ -// MicroPython bindings - -typedef struct _pyb_switch_obj_t { - mp_obj_base_t base; -} pyb_switch_obj_t; - -STATIC const pyb_switch_obj_t pyb_switch_obj = {{&pyb_switch_type}}; - -void pyb_switch_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mp_print_str(print, "Switch()"); -} - -/// \classmethod \constructor() -/// Create and return a switch object. -STATIC mp_obj_t pyb_switch_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 0, 0, false); - - // No need to clear the callback member: if it's already been set and registered - // with extint then we don't want to reset that behaviour. If it hasn't been set, - // then no extint will be called until it is set via the callback method. - - // return static switch object - return (mp_obj_t)&pyb_switch_obj; -} - -/// \method \call() -/// Return the switch state: `True` if pressed down, `False` otherwise. -mp_obj_t pyb_switch_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // get switch state - mp_arg_check_num(n_args, n_kw, 0, 0, false); - return switch_get() ? mp_const_true : mp_const_false; -} - -mp_obj_t pyb_switch_value(mp_obj_t self_in) { - (void)self_in; - return mp_obj_new_bool(switch_get()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_switch_value_obj, pyb_switch_value); - -STATIC mp_obj_t switch_callback(mp_obj_t line) { - if (MP_STATE_PORT(pyb_switch_callback) != mp_const_none) { - mp_call_function_0(MP_STATE_PORT(pyb_switch_callback)); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(switch_callback_obj, switch_callback); - -/// \method callback(fun) -/// Register the given function to be called when the switch is pressed down. -/// If `fun` is `None`, then it disables the callback. -mp_obj_t pyb_switch_callback(mp_obj_t self_in, mp_obj_t callback) { - MP_STATE_PORT(pyb_switch_callback) = callback; - // Init the EXTI each time this function is called, since the EXTI - // may have been disabled by an exception in the interrupt, or the - // user disabling the line explicitly. - extint_register((mp_obj_t)&MICROPY_HW_USRSW_PIN, - MICROPY_HW_USRSW_EXTI_MODE, - MICROPY_HW_USRSW_PULL, - callback == mp_const_none ? mp_const_none : (mp_obj_t)&switch_callback_obj, - true); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_switch_callback_obj, pyb_switch_callback); - -STATIC const mp_rom_map_elem_t pyb_switch_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_switch_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_switch_callback_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_switch_locals_dict, pyb_switch_locals_dict_table); - -const mp_obj_type_t pyb_switch_type = { - { &mp_type_type }, - .name = MP_QSTR_Switch, - .print = pyb_switch_print, - .make_new = pyb_switch_make_new, - .call = pyb_switch_call, - .locals_dict = (mp_obj_dict_t*)&pyb_switch_locals_dict, -}; - -#endif // MICROPY_HW_HAS_SWITCH diff --git a/ports/stm32/usrsw.h b/ports/stm32/usrsw.h deleted file mode 100644 index d96e3c2813bf4..0000000000000 --- a/ports/stm32/usrsw.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_USRSW_H -#define MICROPY_INCLUDED_STMHAL_USRSW_H - -void switch_init0(void); -int switch_get(void); - -extern const mp_obj_type_t pyb_switch_type; - -#endif // MICROPY_INCLUDED_STMHAL_USRSW_H diff --git a/ports/stm32/wdt.c b/ports/stm32/wdt.c deleted file mode 100644 index 2b4967a434d98..0000000000000 --- a/ports/stm32/wdt.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "wdt.h" - -typedef struct _pyb_wdt_obj_t { - mp_obj_base_t base; -} pyb_wdt_obj_t; - -STATIC pyb_wdt_obj_t pyb_wdt = {{&pyb_wdt_type}}; - -STATIC mp_obj_t pyb_wdt_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { - // parse arguments - enum { ARG_id, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_timeout, MP_ARG_INT, {.u_int = 5000} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - mp_int_t id = args[ARG_id].u_int; - if (id != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "WDT(%d) doesn't exist", id)); - } - - // timeout is in milliseconds - mp_int_t timeout = args[ARG_timeout].u_int; - - // compute prescaler - uint32_t prescaler; - for (prescaler = 0; prescaler < 6 && timeout >= 512; ++prescaler, timeout /= 2) { - } - - // convert milliseconds to ticks - timeout *= 8; // 32kHz / 4 = 8 ticks per millisecond (approx) - if (timeout <= 0) { - mp_raise_ValueError("WDT timeout too short"); - } else if (timeout > 0xfff) { - mp_raise_ValueError("WDT timeout too long"); - } - timeout -= 1; - - // set the reload register - while (IWDG->SR & 2) { - } - IWDG->KR = 0x5555; - IWDG->RLR = timeout; - - // set the prescaler - while (IWDG->SR & 1) { - } - IWDG->KR = 0x5555; - IWDG->PR = prescaler; - - // start the watch dog - IWDG->KR = 0xcccc; - - return (mp_obj_t)&pyb_wdt; -} - -STATIC mp_obj_t pyb_wdt_feed(mp_obj_t self_in) { - (void)self_in; - IWDG->KR = 0xaaaa; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_wdt_feed_obj, pyb_wdt_feed); - -STATIC const mp_rom_map_elem_t pyb_wdt_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_feed), MP_ROM_PTR(&pyb_wdt_feed_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_wdt_locals_dict, pyb_wdt_locals_dict_table); - -const mp_obj_type_t pyb_wdt_type = { - { &mp_type_type }, - .name = MP_QSTR_WDT, - .make_new = pyb_wdt_make_new, - .locals_dict = (mp_obj_dict_t*)&pyb_wdt_locals_dict, -}; diff --git a/ports/stm32/wdt.h b/ports/stm32/wdt.h deleted file mode 100644 index 0a486f704dba1..0000000000000 --- a/ports/stm32/wdt.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STMHAL_WDT_H -#define MICROPY_INCLUDED_STMHAL_WDT_H - -extern const mp_obj_type_t pyb_wdt_type; - -#endif // MICROPY_INCLUDED_STMHAL_WDT_H diff --git a/ports/teensy/Makefile b/ports/teensy/Makefile deleted file mode 100644 index e6d848b65aa24..0000000000000 --- a/ports/teensy/Makefile +++ /dev/null @@ -1,236 +0,0 @@ -include ../../py/mkenv.mk - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h - -# include py core make definitions -include $(TOP)/py/py.mk - -# If you set USE_ARDUINO_TOOLCHAIN=1 then this makefile will attempt to use -# the toolchain that comes with Teensyduino -ifeq ($(USE_ARDUINO_TOOLCHAIN),) -USE_ARDUINO_TOOLCHAIN = 0 -endif - -ifeq ($(USE_ARDUINO_TOOLCHAIN),1) -ifeq ($(ARDUINO),) -$(error USE_ARDUINO_TOOLCHAIN requires that ARDUINO be set) -endif -endif - -ifeq ($(USE_ARDUINO_TOOLCHAIN),1) -$(info Using ARDUINO toolchain) -CROSS_COMPILE = $(ARDUINO)/hardware/tools/arm-none-eabi/bin/arm-none-eabi- -else -$(info Using toolchain from PATH) -CROSS_COMPILE = arm-none-eabi- -endif - -CFLAGS_TEENSY = -DF_CPU=96000000 -DUSB_SERIAL -D__MK20DX256__ -CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mcpu=cortex-m4 -msoft-float -mfloat-abi=soft -fsingle-precision-constant -Wdouble-promotion $(CFLAGS_TEENSY) - -INC += -I. -INC += -I$(TOP) -INC += -I$(TOP)/ports/stm32 -INC += -I$(BUILD) -INC += -Icore - -CFLAGS = $(INC) -Wall -Wpointer-arith -std=gnu99 -nostdlib $(CFLAGS_CORTEX_M4) -LDFLAGS = -nostdlib -T mk20dx256.ld -msoft-float -mfloat-abi=soft - -ifeq ($(USE_ARDUINO_TOOLCHAIN),1) - -LIBGCC_FILE_NAME = $(ARDUINO)/hardware/tools/arm-none-eabi/lib/gcc/arm-none-eabi/4.7.2/thumb2/libgcc.a -LIBM_FILE_NAME = $(ARDUINO)/hardware/tools/arm-none-eabi/arm-none-eabi/lib/thumb2/libm.a -LIBC_FILE_NAME = $(ARDUINO)/hardware/tools/arm-none-eabi/arm-none-eabi/lib/thumb2/libc.a - -else - -LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) -LIBM_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-file-name=libm.a) -LIBC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-file-name=libc.a) - -endif - -#$(info %%%%% LIBGCC_FILE_NAME = $(LIBGCC_FILE_NAME)) -#$(info %%%%% LIBM_FILE_NAME = $(LIBM_FILE_NAME)) -#$(info %%%%% LIBC_FILE_NAME = $(LIBC_FILE_NAME)) - -#$(info %%%%% dirname LIBGCC_FILE_NAME = $(dir $(LIBGCC_FILE_NAME))) -#$(info %%%%% dirname LIBM_FILE_NAME = $(dir $(LIBM_FILE_NAME))) -#$(info %%%%% dirname LIBC_FILE_NAME = $(dir $(LIBC_FILE_NAME))) - -LIBS = -L $(dir $(LIBM_FILE_NAME)) -lm -LIBS += -L $(dir $(LIBC_FILE_NAME)) -lc -LIBS += -L $(dir $(LIBGCC_FILE_NAME)) -lgcc - -#Debugging/Optimization -ifdef DEBUG -CFLAGS += -Og -ggdb -else -CFLAGS += -Os #-DNDEBUG -endif -CFLAGS += -fdata-sections -ffunction-sections -LDFLAGS += -Wl,--gc-sections - -USE_FROZEN = 1 -USE_MEMZIP = 0 - -SRC_C = \ - hal_ftm.c \ - hal_gpio.c \ - help.c \ - main.c \ - lcd.c \ - led.c \ - modpyb.c \ - pin_defs_teensy.c \ - reg.c \ - teensy_hal.c \ - timer.c \ - uart.c \ - usb.c \ - -STM_SRC_C = $(addprefix ports/stm32/,\ - gccollect.c \ - irq.c \ - pin.c \ - pin_named_pins.c \ - ) - -STM_SRC_S = $(addprefix ports/stm32/,\ - gchelper.s \ - ) - -LIB_SRC_C = $(addprefix lib/,\ - libc/string0.c \ - mp-readline/builtin_input.c \ - mp-readline/readline.c \ - utils/pyexec.c \ - utils/sys_stdio_mphal.c \ - ) - -SRC_TEENSY = $(addprefix core/,\ - mk20dx128.c \ - pins_teensy.c \ - analog.c \ - usb_desc.c \ - usb_dev.c \ - usb_mem.c \ - usb_serial.c \ - yield.c \ - ) - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o) $(STM_SRC_C:.c=.o) $(STM_SRC_S:.s=.o) $(SRC_TEENSY:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) -OBJ += $(BUILD)/pins_gen.o - -all: hex -hex: $(BUILD)/micropython.hex - -ifeq ($(USE_MEMZIP),1) -SRC_C += \ - lib/memzip/import.c \ - lib/memzip/lexermemzip.c \ - lib/memzip/memzip.c \ - -OBJ += $(BUILD)/memzip-files.o - -MAKE_MEMZIP = $(TOP)/lib/memzip/make-memzip.py -ifeq ($(MEMZIP_DIR),) -MEMZIP_DIR = memzip_files -endif - -$(BUILD)/memzip-files.o: $(BUILD)/memzip-files.c - $(call compile_c) - -$(BUILD)/memzip-files.c: $(shell find ${MEMZIP_DIR} -type f) - @$(ECHO) "Creating $@" - $(Q)$(PYTHON) $(MAKE_MEMZIP) --zip-file $(BUILD)/memzip-files.zip --c-file $@ $(MEMZIP_DIR) - -endif # USE_MEMZIP - -ifeq ($(USE_FROZEN),1) - -ifeq ($(FROZEN_DIR),) -FROZEN_DIR = memzip_files -endif - -CFLAGS += -DMICROPY_MODULE_FROZEN_STR - -SRC_C += \ - lexerfrozen.c \ - $(BUILD)/frozen.c - -endif # USE_FROZEN - -ifeq ($(ARDUINO),) -post_compile: $(BUILD)/micropython.hex - $(ECHO) "Please define ARDUINO (where TeensyDuino is installed)" - exit 1 - -reboot: - $(ECHO) "Please define ARDUINO (where TeensyDuino is installed)" - exit 1 - -else -TOOLS_PATH = $(ARDUINO)/hardware/tools - -post_compile: $(BUILD)/micropython.hex - $(ECHO) "Preparing $@ for upload" - $(Q)$(TOOLS_PATH)/teensy_post_compile -file="$(basename $( $(GEN_PINS_SRC) - -$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c - $(call compile_c) - -$(BUILD)/%.pp: $(BUILD)/%.c - $(ECHO) "PreProcess $<" - $(Q)$(CC) $(CFLAGS) -E -Wp,-C,-dD,-dI -o $@ $< - -include $(TOP)/py/mkrules.mk diff --git a/ports/teensy/README.md b/ports/teensy/README.md deleted file mode 100644 index c586853b52693..0000000000000 --- a/ports/teensy/README.md +++ /dev/null @@ -1,72 +0,0 @@ -# Build Instructions for Teensy 3.1 - -Currently the Teensy 3.1 port of MicroPython builds under Linux and not under Windows. - -The tool chain required for the build can be found at . - -Download the current Linux *.tar.bz2 file. Instructions regarding unpacking the file and moving it to the correct location -as well as adding the extracted folders to the enviroment variable can be found at - - -In order to download the firmware image to the teensy, you'll need to use the -downloader included with TeensyDuino. The following assumes that you have -TeensyDuino installed and set the ARDUINO environment variable pointing to the -where Arduino with TeensyDuino is installed. - -```bash -cd teensy -ARDUINO=~/arduino-1.0.5 make -``` - -To upload MicroPython to the Teensy 3.1. - -Press the Program button on the Teensy 3.1 -```bash -sudo ARDUINO=~/arduino-1.0.5/ make deploy -``` - -Currently, the Python prompt is through the USB serial interface, i.e. - -```bash -minicom -D /dev/ttyACM0 -``` - -## TIPS - -### Install 49-teensy.rules into /etc/udev/rules.d -If you install the 49-teensy.rules file from http://www.pjrc.com/teensy/49-teensy.rules -into your ```/etc/udev/rules.d``` folder then you won't need to use sudo: -```bash -sudo cp ~/Downloads/49-teensy.rules /etc/udev/rules.d -sudo udevadm control --reload-rules -``` -Unplug and replug the teensy board, and then you can use: ```ARDUINO=~/arduino-1.0.5/ make deploy``` - -### Create a GNUmakefile to hold your ARDUINO setting. -Create a file call GNUmakefile (note the lowercase m) in the teensy folder -with the following contents: -```make -$(info Executing GNUmakefile) - -ARDUINO=${HOME}/arduino-1.0.5 -$(info ARDUINO=${ARDUINO}) - -include Makefile -``` -GNUmakefile is not checked into the source code control system, so it will -retain your settings when updating your source tree. You can also add -additional Makefile customizations this way. - -### Tips for OSX - -Set the ARDUINO environment variable to the location where Arduino with TeensyDuino is installed. -```bash -export ARDUINO=~/Downloads/Arduino.app/Contents/Java/ -``` - -Search /dev/ for USB port name, which will be cu.usbmodem followed by a few numbers. The name of the port maybe different depending on the version of OSX. -To access the Python prompt type: - -```bash -screen 115200 -``` diff --git a/ports/teensy/add-memzip.sh b/ports/teensy/add-memzip.sh deleted file mode 100755 index a00489effd77c..0000000000000 --- a/ports/teensy/add-memzip.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/bash - -if [ "$#" != 3 ]; then - echo "Usage: add-memzip.sh input.hex output.hex file-directory" - exit 1 -fi - -#set -x - -input_hex=$1 -output_hex=$2 -memzip_src_dir=$3 - -input_bin=${input_hex}.bin -output_bin=${output_hex}.bin -zip_file=${output_hex}.zip -zip_base=$(basename ${zip_file}) -zip_dir=$(dirname ${zip_file}) -abs_zip_dir=$(realpath ${zip_dir}) - -rm -f ${zip_file} -(cd ${memzip_src_dir}; zip -0 -r -D ${abs_zip_dir}/${zip_base} .) -objcopy -I ihex -O binary ${input_hex} ${input_bin} -cat ${input_bin} ${zip_file} > ${output_bin} -objcopy -I binary -O ihex ${output_bin} ${output_hex} -echo "Added ${memzip_src_dir} to ${input_hex} creating ${output_hex}" - diff --git a/ports/teensy/core/Arduino.h b/ports/teensy/core/Arduino.h deleted file mode 100644 index 1b053f050734f..0000000000000 --- a/ports/teensy/core/Arduino.h +++ /dev/null @@ -1,3 +0,0 @@ -//#include "WProgram.h" -#include "core_pins.h" -#include "pins_arduino.h" diff --git a/ports/teensy/core/HardwareSerial.h b/ports/teensy/core/HardwareSerial.h deleted file mode 100644 index 439e0f7364f07..0000000000000 --- a/ports/teensy/core/HardwareSerial.h +++ /dev/null @@ -1,227 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef HardwareSerial_h -#define HardwareSerial_h - -#include "mk20dx128.h" -#include - -// uncomment to enable 9 bit formats -//#define SERIAL_9BIT_SUPPORT - - -#define SERIAL_7E1 0x02 -#define SERIAL_7O1 0x03 -#define SERIAL_8N1 0x00 -#define SERIAL_8N2 0x04 -#define SERIAL_8E1 0x06 -#define SERIAL_8O1 0x07 -#define SERIAL_7E1_RXINV 0x12 -#define SERIAL_7O1_RXINV 0x13 -#define SERIAL_8N1_RXINV 0x10 -#define SERIAL_8N2_RXINV 0x14 -#define SERIAL_8E1_RXINV 0x16 -#define SERIAL_8O1_RXINV 0x17 -#define SERIAL_7E1_TXINV 0x22 -#define SERIAL_7O1_TXINV 0x23 -#define SERIAL_8N1_TXINV 0x20 -#define SERIAL_8N2_TXINV 0x24 -#define SERIAL_8E1_TXINV 0x26 -#define SERIAL_8O1_TXINV 0x27 -#define SERIAL_7E1_RXINV_TXINV 0x32 -#define SERIAL_7O1_RXINV_TXINV 0x33 -#define SERIAL_8N1_RXINV_TXINV 0x30 -#define SERIAL_8N2_RXINV_TXINV 0x34 -#define SERIAL_8E1_RXINV_TXINV 0x36 -#define SERIAL_8O1_RXINV_TXINV 0x37 -#ifdef SERIAL_9BIT_SUPPORT -#define SERIAL_9N1 0x84 -#define SERIAL_9E1 0x8E -#define SERIAL_9O1 0x8F -#define SERIAL_9N1_RXINV 0x94 -#define SERIAL_9E1_RXINV 0x9E -#define SERIAL_9O1_RXINV 0x9F -#define SERIAL_9N1_TXINV 0xA4 -#define SERIAL_9E1_TXINV 0xAE -#define SERIAL_9O1_TXINV 0xAF -#define SERIAL_9N1_RXINV_TXINV 0xB4 -#define SERIAL_9E1_RXINV_TXINV 0xBE -#define SERIAL_9O1_RXINV_TXINV 0xBF -#endif -// bit0: parity, 0=even, 1=odd -// bit1: parity, 0=disable, 1=enable -// bit2: mode, 1=9bit, 0=8bit -// bit3: mode10: 1=10bit, 0=8bit -// bit4: rxinv, 0=normal, 1=inverted -// bit5: txinv, 0=normal, 1=inverted -// bit6: unused -// bit7: actual data goes into 9th bit - - -#define BAUD2DIV(baud) (((F_CPU * 2) + ((baud) >> 1)) / (baud)) -#define BAUD2DIV3(baud) (((F_BUS * 2) + ((baud) >> 1)) / (baud)) - -// C language implementation -// -#ifdef __cplusplus -extern "C" { -#endif -void serial_begin(uint32_t divisor); -void serial_format(uint32_t format); -void serial_end(void); -void serial_set_transmit_pin(uint8_t pin); -void serial_putchar(uint32_t c); -void serial_write(const void *buf, unsigned int count); -void serial_flush(void); -int serial_available(void); -int serial_getchar(void); -int serial_peek(void); -void serial_clear(void); -void serial_print(const char *p); -void serial_phex(uint32_t n); -void serial_phex16(uint32_t n); -void serial_phex32(uint32_t n); - -void serial2_begin(uint32_t divisor); -void serial2_format(uint32_t format); -void serial2_end(void); -void serial2_putchar(uint32_t c); -void serial2_write(const void *buf, unsigned int count); -void serial2_flush(void); -int serial2_available(void); -int serial2_getchar(void); -int serial2_peek(void); -void serial2_clear(void); - -void serial3_begin(uint32_t divisor); -void serial3_format(uint32_t format); -void serial3_end(void); -void serial3_putchar(uint32_t c); -void serial3_write(const void *buf, unsigned int count); -void serial3_flush(void); -int serial3_available(void); -int serial3_getchar(void); -int serial3_peek(void); -void serial3_clear(void); - -#ifdef __cplusplus -} -#endif - - -// C++ interface -// -#ifdef __cplusplus -#include "Stream.h" -class HardwareSerial : public Stream -{ -public: - virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial_begin(BAUD2DIV(baud)); - serial_format(format); } - virtual void end(void) { serial_end(); } - virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); } - virtual int available(void) { return serial_available(); } - virtual int peek(void) { return serial_peek(); } - virtual int read(void) { return serial_getchar(); } - virtual void flush(void) { serial_flush(); } - virtual void clear(void) { serial_clear(); } - virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial_putchar(c); return 1; } -}; -extern HardwareSerial Serial1; - -class HardwareSerial2 : public HardwareSerial -{ -public: - virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial2_begin(BAUD2DIV(baud)); - serial2_format(format); } - virtual void end(void) { serial2_end(); } - virtual int available(void) { return serial2_available(); } - virtual int peek(void) { return serial2_peek(); } - virtual int read(void) { return serial2_getchar(); } - virtual void flush(void) { serial2_flush(); } - virtual void clear(void) { serial2_clear(); } - virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial2_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial2_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial2_putchar(c); return 1; } -}; -extern HardwareSerial2 Serial2; - -class HardwareSerial3 : public HardwareSerial -{ -public: - virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); } - virtual void begin(uint32_t baud, uint32_t format) { - serial3_begin(BAUD2DIV3(baud)); - serial3_format(format); } - virtual void end(void) { serial3_end(); } - virtual int available(void) { return serial3_available(); } - virtual int peek(void) { return serial3_peek(); } - virtual int read(void) { return serial3_getchar(); } - virtual void flush(void) { serial3_flush(); } - virtual void clear(void) { serial3_clear(); } - virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } - virtual size_t write(unsigned long n) { return write((uint8_t)n); } - virtual size_t write(long n) { return write((uint8_t)n); } - virtual size_t write(unsigned int n) { return write((uint8_t)n); } - virtual size_t write(int n) { return write((uint8_t)n); } - virtual size_t write(const uint8_t *buffer, size_t size) - { serial3_write(buffer, size); return size; } - virtual size_t write(const char *str) { size_t len = strlen(str); - serial3_write((const uint8_t *)str, len); - return len; } - virtual size_t write9bit(uint32_t c) { serial3_putchar(c); return 1; } -}; -extern HardwareSerial3 Serial3; - -#endif -#endif diff --git a/ports/teensy/core/analog.c b/ports/teensy/core/analog.c deleted file mode 100644 index f408ec9f12c8e..0000000000000 --- a/ports/teensy/core/analog.c +++ /dev/null @@ -1,463 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "core_pins.h" -//#include "HardwareSerial.h" - -static uint8_t calibrating; -static uint8_t analog_right_shift = 0; -static uint8_t analog_config_bits = 10; -static uint8_t analog_num_average = 4; -static uint8_t analog_reference_internal = 0; - -// the alternate clock is connected to OSCERCLK (16 MHz). -// datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode -// datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode - -#if F_BUS == 60000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7.5 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15 MHz -#elif F_BUS == 56000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 14 MHz -#elif F_BUS == 48000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 12 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 24 MHz -#elif F_BUS == 40000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 10 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 20 MHz -#elif F_BUS == 36000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 9 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1) // 18 MHz -#elif F_BUS == 24000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0) // 12 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 24 MHz -#elif F_BUS == 16000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 16 MHz -#elif F_BUS == 8000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 8 MHz -#elif F_BUS == 4000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 4 MHz -#elif F_BUS == 2000000 - #define ADC_CFG1_16BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_12BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_10BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz - #define ADC_CFG1_8BIT ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0) // 2 MHz -#else -#error "F_BUS must be 60, 56, 48, 40, 36, 24, 4 or 2 MHz" -#endif - -void analog_init(void) -{ - uint32_t num; - - VREF_TRM = 0x60; - VREF_SC = 0xE1; // enable 1.2 volt ref - - if (analog_config_bits == 8) { - ADC0_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #endif - } else if (analog_config_bits == 10) { - ADC0_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); - #endif - } else if (analog_config_bits == 12) { - ADC0_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #endif - } else { - ADC0_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP; - ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #if defined(__MK20DX256__) - ADC1_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP; - ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); - #endif - } - - if (analog_reference_internal) { - ADC0_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref - #if defined(__MK20DX256__) - ADC1_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref - #endif - } else { - ADC0_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref - #if defined(__MK20DX256__) - ADC1_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref - #endif - } - - num = analog_num_average; - if (num <= 1) { - ADC0_SC3 = ADC_SC3_CAL; // begin cal - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL; // begin cal - #endif - } else if (num <= 4) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); - #endif - } else if (num <= 8) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); - #endif - } else if (num <= 16) { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); - #endif - } else { - ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); - #if defined(__MK20DX256__) - ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); - #endif - } - calibrating = 1; -} - -static void wait_for_cal(void) -{ - uint16_t sum; - - //serial_print("wait_for_cal\n"); -#if defined(__MK20DX128__) - while (ADC0_SC3 & ADC_SC3_CAL) { - // wait - } -#elif defined(__MK20DX256__) - while ((ADC0_SC3 & ADC_SC3_CAL) || (ADC1_SC3 & ADC_SC3_CAL)) { - // wait - } -#endif - __disable_irq(); - if (calibrating) { - //serial_print("\n"); - sum = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0; - sum = (sum / 2) | 0x8000; - ADC0_PG = sum; - //serial_print("ADC0_PG = "); - //serial_phex16(sum); - //serial_print("\n"); - sum = ADC0_CLMS + ADC0_CLM4 + ADC0_CLM3 + ADC0_CLM2 + ADC0_CLM1 + ADC0_CLM0; - sum = (sum / 2) | 0x8000; - ADC0_MG = sum; - //serial_print("ADC0_MG = "); - //serial_phex16(sum); - //serial_print("\n"); -#if defined(__MK20DX256__) - sum = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0; - sum = (sum / 2) | 0x8000; - ADC1_PG = sum; - sum = ADC1_CLMS + ADC1_CLM4 + ADC1_CLM3 + ADC1_CLM2 + ADC1_CLM1 + ADC1_CLM0; - sum = (sum / 2) | 0x8000; - ADC1_MG = sum; -#endif - calibrating = 0; - } - __enable_irq(); -} - -// ADCx_SC2[REFSEL] bit selects the voltage reference sources for ADC. -// VREFH/VREFL - connected as the primary reference option -// 1.2 V VREF_OUT - connected as the VALT reference option - - -#define DEFAULT 0 -#define INTERNAL 2 -#define INTERNAL1V2 2 -#define INTERNAL1V1 2 -#define EXTERNAL 0 - -void analogReference(uint8_t type) -{ - if (type) { - // internal reference requested - if (!analog_reference_internal) { - analog_reference_internal = 1; - if (calibrating) { - ADC0_SC3 = 0; // cancel cal -#if defined(__MK20DX256__) - ADC1_SC3 = 0; // cancel cal -#endif - } - analog_init(); - } - } else { - // vcc or external reference requested - if (analog_reference_internal) { - analog_reference_internal = 0; - if (calibrating) { - ADC0_SC3 = 0; // cancel cal -#if defined(__MK20DX256__) - ADC1_SC3 = 0; // cancel cal -#endif - } - analog_init(); - } - } -} - - -void analogReadRes(unsigned int bits) -{ - unsigned int config; - - if (bits >= 13) { - if (bits > 16) bits = 16; - config = 16; - } else if (bits >= 11) { - config = 12; - } else if (bits >= 9) { - config = 10; - } else { - config = 8; - } - analog_right_shift = config - bits; - if (config != analog_config_bits) { - analog_config_bits = config; - if (calibrating) ADC0_SC3 = 0; // cancel cal - analog_init(); - } -} - -void analogReadAveraging(unsigned int num) -{ - - if (calibrating) wait_for_cal(); - if (num <= 1) { - num = 0; - ADC0_SC3 = 0; - } else if (num <= 4) { - num = 4; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(0); - } else if (num <= 8) { - num = 8; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(1); - } else if (num <= 16) { - num = 16; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(2); - } else { - num = 32; - ADC0_SC3 = ADC_SC3_AVGE + ADC_SC3_AVGS(3); - } - analog_num_average = num; -} - -// The SC1A register is used for both software and hardware trigger modes of operation. - -#if defined(__MK20DX128__) -static const uint8_t channel2sc1a[] = { - 5, 14, 8, 9, 13, 12, 6, 7, 15, 4, - 0, 19, 3, 21, 26, 22, 23 -}; -#elif defined(__MK20DX256__) -static const uint8_t channel2sc1a[] = { - 5, 14, 8, 9, 13, 12, 6, 7, 15, 4, - 0, 19, 3, 19+128, 26, 18+128, 23, - 5+192, 5+128, 4+128, 6+128, 7+128, 4+192 -// A15 26 E1 ADC1_SE5a 5+64 -// A16 27 C9 ADC1_SE5b 5 -// A17 28 C8 ADC1_SE4b 4 -// A18 29 C10 ADC1_SE6b 6 -// A19 30 C11 ADC1_SE7b 7 -// A20 31 E0 ADC1_SE4a 4+64 -}; -#endif - - - -// TODO: perhaps this should store the NVIC priority, so it works recursively? -static volatile uint8_t analogReadBusyADC0 = 0; -#if defined(__MK20DX256__) -static volatile uint8_t analogReadBusyADC1 = 0; -#endif - -int analogRead(uint8_t pin) -{ - int result; - uint8_t index, channel; - - //serial_phex(pin); - //serial_print(" "); - - if (pin <= 13) { - index = pin; // 0-13 refer to A0-A13 - } else if (pin <= 23) { - index = pin - 14; // 14-23 are A0-A9 -#if defined(__MK20DX256__) - } else if (pin >= 26 && pin <= 31) { - index = pin - 9; // 26-31 are A15-A20 -#endif - } else if (pin >= 34 && pin <= 40) { - index = pin - 24; // 34-37 are A10-A13, 38 is temp sensor, - // 39 is vref, 40 is unused (A14 on Teensy 3.1) - } else { - return 0; // all others are invalid - } - - //serial_phex(index); - //serial_print(" "); - - channel = channel2sc1a[index]; - //serial_phex(channel); - //serial_print(" "); - - //serial_print("analogRead"); - //return 0; - if (calibrating) wait_for_cal(); - //pin = 5; // PTD1/SE5b, pin 14, analog 0 - -#if defined(__MK20DX256__) - if (channel & 0x80) goto beginADC1; -#endif - - __disable_irq(); -startADC0: - //serial_print("startADC0\n"); - ADC0_SC1A = channel; - analogReadBusyADC0 = 1; - __enable_irq(); - while (1) { - __disable_irq(); - if ((ADC0_SC1A & ADC_SC1_COCO)) { - result = ADC0_RA; - analogReadBusyADC0 = 0; - __enable_irq(); - result >>= analog_right_shift; - return result; - } - // detect if analogRead was used from an interrupt - // if so, our analogRead got canceled, so it must - // be restarted. - if (!analogReadBusyADC0) goto startADC0; - __enable_irq(); - yield(); - } - -#if defined(__MK20DX256__) -beginADC1: - __disable_irq(); -startADC1: - //serial_print("startADC0\n"); - // ADC1_CFG2[MUXSEL] bit selects between ADCx_SEn channels a and b. - if (channel & 0x40) { - ADC1_CFG2 &= ~ADC_CFG2_MUXSEL; - } else { - ADC1_CFG2 |= ADC_CFG2_MUXSEL; - } - ADC1_SC1A = channel & 0x3F; - analogReadBusyADC1 = 1; - __enable_irq(); - while (1) { - __disable_irq(); - if ((ADC1_SC1A & ADC_SC1_COCO)) { - result = ADC1_RA; - analogReadBusyADC1 = 0; - __enable_irq(); - result >>= analog_right_shift; - return result; - } - // detect if analogRead was used from an interrupt - // if so, our analogRead got canceled, so it must - // be restarted. - if (!analogReadBusyADC1) goto startADC1; - __enable_irq(); - yield(); - } -#endif -} - - - -void analogWriteDAC0(int val) -{ -#if defined(__MK20DX256__) - SIM_SCGC2 |= SIM_SCGC2_DAC0; - if (analog_reference_internal) { - DAC0_C0 = DAC_C0_DACEN; // 1.2V ref is DACREF_1 - } else { - DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2 - } - if (val < 0) val = 0; // TODO: saturate instruction? - else if (val > 4095) val = 4095; - *(int16_t *)&(DAC0_DAT0L) = val; -#endif -} - - - - - - - - - - - - - - - - - - - diff --git a/ports/teensy/core/avr_functions.h b/ports/teensy/core/avr_functions.h deleted file mode 100644 index fe99f26f3e538..0000000000000 --- a/ports/teensy/core/avr_functions.h +++ /dev/null @@ -1,107 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _avr_functions_h_ -#define _avr_functions_h_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -void eeprom_initialize(void); -uint8_t eeprom_read_byte(const uint8_t *addr) __attribute__ ((pure)); -uint16_t eeprom_read_word(const uint16_t *addr) __attribute__ ((pure)); -uint32_t eeprom_read_dword(const uint32_t *addr) __attribute__ ((pure)); -void eeprom_read_block(void *buf, const void *addr, uint32_t len); -void eeprom_write_byte(uint8_t *addr, uint8_t value); -void eeprom_write_word(uint16_t *addr, uint16_t value); -void eeprom_write_dword(uint32_t *addr, uint32_t value); -void eeprom_write_block(const void *buf, void *addr, uint32_t len); -int eeprom_is_ready(void); -#define eeprom_busy_wait() do {} while (!eeprom_is_ready()) - -static inline float eeprom_read_float(const float *addr) __attribute__((pure, always_inline, unused)); -static inline float eeprom_read_float(const float *addr) -{ - union {float f; uint32_t u32;} u; - u.u32 = eeprom_read_dword((const uint32_t *)addr); - return u.f; -} -static inline void eeprom_write_float(float *addr, float value) __attribute__((always_inline, unused)); -static inline void eeprom_write_float(float *addr, float value) -{ - union {float f; uint32_t u32;} u; - u.f = value; - eeprom_write_dword((uint32_t *)addr, u.u32); -} -static inline void eeprom_update_byte(uint8_t *addr, uint8_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_byte(uint8_t *addr, uint8_t value) -{ - eeprom_write_byte(addr, value); -} -static inline void eeprom_update_word(uint16_t *addr, uint16_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_word(uint16_t *addr, uint16_t value) -{ - eeprom_write_word(addr, value); -} -static inline void eeprom_update_dword(uint32_t *addr, uint32_t value) __attribute__((always_inline, unused)); -static inline void eeprom_update_dword(uint32_t *addr, uint32_t value) -{ - eeprom_write_dword(addr, value); -} -static inline void eeprom_update_float(float *addr, float value) __attribute__((always_inline, unused)); -static inline void eeprom_update_float(float *addr, float value) -{ - union {float f; uint32_t u32;} u; - u.f = value; - eeprom_write_dword((uint32_t *)addr, u.u32); -} -static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len) __attribute__((always_inline, unused)); -static inline void eeprom_update_block(const void *buf, void *addr, uint32_t len) -{ - eeprom_write_block(buf, addr, len); -} - - -char * ultoa(unsigned long val, char *buf, int radix); -char * ltoa(long val, char *buf, int radix); -static inline char * utoa(unsigned int val, char *buf, int radix) __attribute__((always_inline, unused)); -static inline char * utoa(unsigned int val, char *buf, int radix) { return ultoa(val, buf, radix); } -static inline char * itoa(int val, char *buf, int radix) __attribute__((always_inline, unused)); -static inline char * itoa(int val, char *buf, int radix) { return ltoa(val, buf, radix); } -char * dtostrf(float val, int width, unsigned int precision, char *buf); - - -#ifdef __cplusplus -} -#endif -#endif diff --git a/ports/teensy/core/core_pins.h b/ports/teensy/core/core_pins.h deleted file mode 100644 index 169bf3c160937..0000000000000 --- a/ports/teensy/core/core_pins.h +++ /dev/null @@ -1,841 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _core_pins_h_ -#define _core_pins_h_ - -#include "mk20dx128.h" -#include "pins_arduino.h" - - -#define HIGH 1 -#define LOW 0 -#define INPUT 0 -#define OUTPUT 1 -#define INPUT_PULLUP 2 -#define LSBFIRST 0 -#define MSBFIRST 1 -#define _BV(n) (1<<(n)) -#define CHANGE 4 -#define FALLING 2 -#define RISING 3 - -// Pin Arduino -// 0 B16 RXD -// 1 B17 TXD -// 2 D0 -// 3 A12 FTM1_CH0 -// 4 A13 FTM1_CH1 -// 5 D7 FTM0_CH7 OC0B/T1 -// 6 D4 FTM0_CH4 OC0A -// 7 D2 -// 8 D3 ICP1 -// 9 C3 FTM0_CH2 OC1A -// 10 C4 FTM0_CH3 SS/OC1B -// 11 C6 MOSI/OC2A -// 12 C7 MISO -// 13 C5 SCK -// 14 D1 -// 15 C0 -// 16 B0 (FTM1_CH0) -// 17 B1 (FTM1_CH1) -// 18 B3 SDA -// 19 B2 SCL -// 20 D5 FTM0_CH5 -// 21 D6 FTM0_CH6 -// 22 C1 FTM0_CH0 -// 23 C2 FTM0_CH1 -// 24 A5 (FTM0_CH2) -// 25 B19 -// 26 E1 -// 27 C9 -// 28 C8 -// 29 C10 -// 30 C11 -// 31 E0 -// 32 B18 -// 33 A4 (FTM0_CH1) -// (34) analog only -// (35) analog only -// (36) analog only -// (37) analog only - -// not available to user: -// A0 FTM0_CH5 SWD Clock -// A1 FTM0_CH6 USB ID -// A2 FTM0_CH7 SWD Trace -// A3 FTM0_CH0 SWD Data - -#define CORE_NUM_TOTAL_PINS 34 -#define CORE_NUM_DIGITAL 34 -#define CORE_NUM_INTERRUPT 34 -#if defined(__MK20DX128__) -#define CORE_NUM_ANALOG 14 -#define CORE_NUM_PWM 10 -#elif defined(__MK20DX256__) -#define CORE_NUM_ANALOG 21 -#define CORE_NUM_PWM 12 -#endif - -#define CORE_PIN0_BIT 16 -#define CORE_PIN1_BIT 17 -#define CORE_PIN2_BIT 0 -#define CORE_PIN3_BIT 12 -#define CORE_PIN4_BIT 13 -#define CORE_PIN5_BIT 7 -#define CORE_PIN6_BIT 4 -#define CORE_PIN7_BIT 2 -#define CORE_PIN8_BIT 3 -#define CORE_PIN9_BIT 3 -#define CORE_PIN10_BIT 4 -#define CORE_PIN11_BIT 6 -#define CORE_PIN12_BIT 7 -#define CORE_PIN13_BIT 5 -#define CORE_PIN14_BIT 1 -#define CORE_PIN15_BIT 0 -#define CORE_PIN16_BIT 0 -#define CORE_PIN17_BIT 1 -#define CORE_PIN18_BIT 3 -#define CORE_PIN19_BIT 2 -#define CORE_PIN20_BIT 5 -#define CORE_PIN21_BIT 6 -#define CORE_PIN22_BIT 1 -#define CORE_PIN23_BIT 2 -#define CORE_PIN24_BIT 5 -#define CORE_PIN25_BIT 19 -#define CORE_PIN26_BIT 1 -#define CORE_PIN27_BIT 9 -#define CORE_PIN28_BIT 8 -#define CORE_PIN29_BIT 10 -#define CORE_PIN30_BIT 11 -#define CORE_PIN31_BIT 0 -#define CORE_PIN32_BIT 18 -#define CORE_PIN33_BIT 4 - -#define CORE_PIN0_BITMASK (1<<(CORE_PIN0_BIT)) -#define CORE_PIN1_BITMASK (1<<(CORE_PIN1_BIT)) -#define CORE_PIN2_BITMASK (1<<(CORE_PIN2_BIT)) -#define CORE_PIN3_BITMASK (1<<(CORE_PIN3_BIT)) -#define CORE_PIN4_BITMASK (1<<(CORE_PIN4_BIT)) -#define CORE_PIN5_BITMASK (1<<(CORE_PIN5_BIT)) -#define CORE_PIN6_BITMASK (1<<(CORE_PIN6_BIT)) -#define CORE_PIN7_BITMASK (1<<(CORE_PIN7_BIT)) -#define CORE_PIN8_BITMASK (1<<(CORE_PIN8_BIT)) -#define CORE_PIN9_BITMASK (1<<(CORE_PIN9_BIT)) -#define CORE_PIN10_BITMASK (1<<(CORE_PIN10_BIT)) -#define CORE_PIN11_BITMASK (1<<(CORE_PIN11_BIT)) -#define CORE_PIN12_BITMASK (1<<(CORE_PIN12_BIT)) -#define CORE_PIN13_BITMASK (1<<(CORE_PIN13_BIT)) -#define CORE_PIN14_BITMASK (1<<(CORE_PIN14_BIT)) -#define CORE_PIN15_BITMASK (1<<(CORE_PIN15_BIT)) -#define CORE_PIN16_BITMASK (1<<(CORE_PIN16_BIT)) -#define CORE_PIN17_BITMASK (1<<(CORE_PIN17_BIT)) -#define CORE_PIN18_BITMASK (1<<(CORE_PIN18_BIT)) -#define CORE_PIN19_BITMASK (1<<(CORE_PIN19_BIT)) -#define CORE_PIN20_BITMASK (1<<(CORE_PIN20_BIT)) -#define CORE_PIN21_BITMASK (1<<(CORE_PIN21_BIT)) -#define CORE_PIN22_BITMASK (1<<(CORE_PIN22_BIT)) -#define CORE_PIN23_BITMASK (1<<(CORE_PIN23_BIT)) -#define CORE_PIN24_BITMASK (1<<(CORE_PIN24_BIT)) -#define CORE_PIN25_BITMASK (1<<(CORE_PIN25_BIT)) -#define CORE_PIN26_BITMASK (1<<(CORE_PIN26_BIT)) -#define CORE_PIN27_BITMASK (1<<(CORE_PIN27_BIT)) -#define CORE_PIN28_BITMASK (1<<(CORE_PIN28_BIT)) -#define CORE_PIN29_BITMASK (1<<(CORE_PIN29_BIT)) -#define CORE_PIN30_BITMASK (1<<(CORE_PIN30_BIT)) -#define CORE_PIN31_BITMASK (1<<(CORE_PIN31_BIT)) -#define CORE_PIN32_BITMASK (1<<(CORE_PIN32_BIT)) -#define CORE_PIN33_BITMASK (1<<(CORE_PIN33_BIT)) - -#define CORE_PIN0_PORTREG GPIOB_PDOR -#define CORE_PIN1_PORTREG GPIOB_PDOR -#define CORE_PIN2_PORTREG GPIOD_PDOR -#define CORE_PIN3_PORTREG GPIOA_PDOR -#define CORE_PIN4_PORTREG GPIOA_PDOR -#define CORE_PIN5_PORTREG GPIOD_PDOR -#define CORE_PIN6_PORTREG GPIOD_PDOR -#define CORE_PIN7_PORTREG GPIOD_PDOR -#define CORE_PIN8_PORTREG GPIOD_PDOR -#define CORE_PIN9_PORTREG GPIOC_PDOR -#define CORE_PIN10_PORTREG GPIOC_PDOR -#define CORE_PIN11_PORTREG GPIOC_PDOR -#define CORE_PIN12_PORTREG GPIOC_PDOR -#define CORE_PIN13_PORTREG GPIOC_PDOR -#define CORE_PIN14_PORTREG GPIOD_PDOR -#define CORE_PIN15_PORTREG GPIOC_PDOR -#define CORE_PIN16_PORTREG GPIOB_PDOR -#define CORE_PIN17_PORTREG GPIOB_PDOR -#define CORE_PIN18_PORTREG GPIOB_PDOR -#define CORE_PIN19_PORTREG GPIOB_PDOR -#define CORE_PIN20_PORTREG GPIOD_PDOR -#define CORE_PIN21_PORTREG GPIOD_PDOR -#define CORE_PIN22_PORTREG GPIOC_PDOR -#define CORE_PIN23_PORTREG GPIOC_PDOR -#define CORE_PIN24_PORTREG GPIOA_PDOR -#define CORE_PIN25_PORTREG GPIOB_PDOR -#define CORE_PIN26_PORTREG GPIOE_PDOR -#define CORE_PIN27_PORTREG GPIOC_PDOR -#define CORE_PIN28_PORTREG GPIOC_PDOR -#define CORE_PIN29_PORTREG GPIOC_PDOR -#define CORE_PIN30_PORTREG GPIOC_PDOR -#define CORE_PIN31_PORTREG GPIOE_PDOR -#define CORE_PIN32_PORTREG GPIOB_PDOR -#define CORE_PIN33_PORTREG GPIOA_PDOR - -#define CORE_PIN0_PORTSET GPIOB_PSOR -#define CORE_PIN1_PORTSET GPIOB_PSOR -#define CORE_PIN2_PORTSET GPIOD_PSOR -#define CORE_PIN3_PORTSET GPIOA_PSOR -#define CORE_PIN4_PORTSET GPIOA_PSOR -#define CORE_PIN5_PORTSET GPIOD_PSOR -#define CORE_PIN6_PORTSET GPIOD_PSOR -#define CORE_PIN7_PORTSET GPIOD_PSOR -#define CORE_PIN8_PORTSET GPIOD_PSOR -#define CORE_PIN9_PORTSET GPIOC_PSOR -#define CORE_PIN10_PORTSET GPIOC_PSOR -#define CORE_PIN11_PORTSET GPIOC_PSOR -#define CORE_PIN12_PORTSET GPIOC_PSOR -#define CORE_PIN13_PORTSET GPIOC_PSOR -#define CORE_PIN14_PORTSET GPIOD_PSOR -#define CORE_PIN15_PORTSET GPIOC_PSOR -#define CORE_PIN16_PORTSET GPIOB_PSOR -#define CORE_PIN17_PORTSET GPIOB_PSOR -#define CORE_PIN18_PORTSET GPIOB_PSOR -#define CORE_PIN19_PORTSET GPIOB_PSOR -#define CORE_PIN20_PORTSET GPIOD_PSOR -#define CORE_PIN21_PORTSET GPIOD_PSOR -#define CORE_PIN22_PORTSET GPIOC_PSOR -#define CORE_PIN23_PORTSET GPIOC_PSOR -#define CORE_PIN24_PORTSET GPIOA_PSOR -#define CORE_PIN25_PORTSET GPIOB_PSOR -#define CORE_PIN26_PORTSET GPIOE_PSOR -#define CORE_PIN27_PORTSET GPIOC_PSOR -#define CORE_PIN28_PORTSET GPIOC_PSOR -#define CORE_PIN29_PORTSET GPIOC_PSOR -#define CORE_PIN30_PORTSET GPIOC_PSOR -#define CORE_PIN31_PORTSET GPIOE_PSOR -#define CORE_PIN32_PORTSET GPIOB_PSOR -#define CORE_PIN33_PORTSET GPIOA_PSOR - -#define CORE_PIN0_PORTCLEAR GPIOB_PCOR -#define CORE_PIN1_PORTCLEAR GPIOB_PCOR -#define CORE_PIN2_PORTCLEAR GPIOD_PCOR -#define CORE_PIN3_PORTCLEAR GPIOA_PCOR -#define CORE_PIN4_PORTCLEAR GPIOA_PCOR -#define CORE_PIN5_PORTCLEAR GPIOD_PCOR -#define CORE_PIN6_PORTCLEAR GPIOD_PCOR -#define CORE_PIN7_PORTCLEAR GPIOD_PCOR -#define CORE_PIN8_PORTCLEAR GPIOD_PCOR -#define CORE_PIN9_PORTCLEAR GPIOC_PCOR -#define CORE_PIN10_PORTCLEAR GPIOC_PCOR -#define CORE_PIN11_PORTCLEAR GPIOC_PCOR -#define CORE_PIN12_PORTCLEAR GPIOC_PCOR -#define CORE_PIN13_PORTCLEAR GPIOC_PCOR -#define CORE_PIN14_PORTCLEAR GPIOD_PCOR -#define CORE_PIN15_PORTCLEAR GPIOC_PCOR -#define CORE_PIN16_PORTCLEAR GPIOB_PCOR -#define CORE_PIN17_PORTCLEAR GPIOB_PCOR -#define CORE_PIN18_PORTCLEAR GPIOB_PCOR -#define CORE_PIN19_PORTCLEAR GPIOB_PCOR -#define CORE_PIN20_PORTCLEAR GPIOD_PCOR -#define CORE_PIN21_PORTCLEAR GPIOD_PCOR -#define CORE_PIN22_PORTCLEAR GPIOC_PCOR -#define CORE_PIN23_PORTCLEAR GPIOC_PCOR -#define CORE_PIN24_PORTCLEAR GPIOA_PCOR -#define CORE_PIN25_PORTCLEAR GPIOB_PCOR -#define CORE_PIN26_PORTCLEAR GPIOE_PCOR -#define CORE_PIN27_PORTCLEAR GPIOC_PCOR -#define CORE_PIN28_PORTCLEAR GPIOC_PCOR -#define CORE_PIN29_PORTCLEAR GPIOC_PCOR -#define CORE_PIN30_PORTCLEAR GPIOC_PCOR -#define CORE_PIN31_PORTCLEAR GPIOE_PCOR -#define CORE_PIN32_PORTCLEAR GPIOB_PCOR -#define CORE_PIN33_PORTCLEAR GPIOA_PCOR - -#define CORE_PIN0_DDRREG GPIOB_PDDR -#define CORE_PIN1_DDRREG GPIOB_PDDR -#define CORE_PIN2_DDRREG GPIOD_PDDR -#define CORE_PIN3_DDRREG GPIOA_PDDR -#define CORE_PIN4_DDRREG GPIOA_PDDR -#define CORE_PIN5_DDRREG GPIOD_PDDR -#define CORE_PIN6_DDRREG GPIOD_PDDR -#define CORE_PIN7_DDRREG GPIOD_PDDR -#define CORE_PIN8_DDRREG GPIOD_PDDR -#define CORE_PIN9_DDRREG GPIOC_PDDR -#define CORE_PIN10_DDRREG GPIOC_PDDR -#define CORE_PIN11_DDRREG GPIOC_PDDR -#define CORE_PIN12_DDRREG GPIOC_PDDR -#define CORE_PIN13_DDRREG GPIOC_PDDR -#define CORE_PIN14_DDRREG GPIOD_PDDR -#define CORE_PIN15_DDRREG GPIOC_PDDR -#define CORE_PIN16_DDRREG GPIOB_PDDR -#define CORE_PIN17_DDRREG GPIOB_PDDR -#define CORE_PIN18_DDRREG GPIOB_PDDR -#define CORE_PIN19_DDRREG GPIOB_PDDR -#define CORE_PIN20_DDRREG GPIOD_PDDR -#define CORE_PIN21_DDRREG GPIOD_PDDR -#define CORE_PIN22_DDRREG GPIOC_PDDR -#define CORE_PIN23_DDRREG GPIOC_PDDR -#define CORE_PIN24_DDRREG GPIOA_PDDR -#define CORE_PIN25_DDRREG GPIOB_PDDR -#define CORE_PIN26_DDRREG GPIOE_PDDR -#define CORE_PIN27_DDRREG GPIOC_PDDR -#define CORE_PIN28_DDRREG GPIOC_PDDR -#define CORE_PIN29_DDRREG GPIOC_PDDR -#define CORE_PIN30_DDRREG GPIOC_PDDR -#define CORE_PIN31_DDRREG GPIOE_PDDR -#define CORE_PIN32_DDRREG GPIOB_PDDR -#define CORE_PIN33_DDRREG GPIOA_PDDR - -#define CORE_PIN0_PINREG GPIOB_PDIR -#define CORE_PIN1_PINREG GPIOB_PDIR -#define CORE_PIN2_PINREG GPIOD_PDIR -#define CORE_PIN3_PINREG GPIOA_PDIR -#define CORE_PIN4_PINREG GPIOA_PDIR -#define CORE_PIN5_PINREG GPIOD_PDIR -#define CORE_PIN6_PINREG GPIOD_PDIR -#define CORE_PIN7_PINREG GPIOD_PDIR -#define CORE_PIN8_PINREG GPIOD_PDIR -#define CORE_PIN9_PINREG GPIOC_PDIR -#define CORE_PIN10_PINREG GPIOC_PDIR -#define CORE_PIN11_PINREG GPIOC_PDIR -#define CORE_PIN12_PINREG GPIOC_PDIR -#define CORE_PIN13_PINREG GPIOC_PDIR -#define CORE_PIN14_PINREG GPIOD_PDIR -#define CORE_PIN15_PINREG GPIOC_PDIR -#define CORE_PIN16_PINREG GPIOB_PDIR -#define CORE_PIN17_PINREG GPIOB_PDIR -#define CORE_PIN18_PINREG GPIOB_PDIR -#define CORE_PIN19_PINREG GPIOB_PDIR -#define CORE_PIN20_PINREG GPIOD_PDIR -#define CORE_PIN21_PINREG GPIOD_PDIR -#define CORE_PIN22_PINREG GPIOC_PDIR -#define CORE_PIN23_PINREG GPIOC_PDIR -#define CORE_PIN24_PINREG GPIOA_PDIR -#define CORE_PIN25_PINREG GPIOB_PDIR -#define CORE_PIN26_PINREG GPIOE_PDIR -#define CORE_PIN27_PINREG GPIOC_PDIR -#define CORE_PIN28_PINREG GPIOC_PDIR -#define CORE_PIN29_PINREG GPIOC_PDIR -#define CORE_PIN30_PINREG GPIOC_PDIR -#define CORE_PIN31_PINREG GPIOE_PDIR -#define CORE_PIN32_PINREG GPIOB_PDIR -#define CORE_PIN33_PINREG GPIOA_PDIR - -#define CORE_PIN0_CONFIG PORTB_PCR16 -#define CORE_PIN1_CONFIG PORTB_PCR17 -#define CORE_PIN2_CONFIG PORTD_PCR0 -#define CORE_PIN3_CONFIG PORTA_PCR12 -#define CORE_PIN4_CONFIG PORTA_PCR13 -#define CORE_PIN5_CONFIG PORTD_PCR7 -#define CORE_PIN6_CONFIG PORTD_PCR4 -#define CORE_PIN7_CONFIG PORTD_PCR2 -#define CORE_PIN8_CONFIG PORTD_PCR3 -#define CORE_PIN9_CONFIG PORTC_PCR3 -#define CORE_PIN10_CONFIG PORTC_PCR4 -#define CORE_PIN11_CONFIG PORTC_PCR6 -#define CORE_PIN12_CONFIG PORTC_PCR7 -#define CORE_PIN13_CONFIG PORTC_PCR5 -#define CORE_PIN14_CONFIG PORTD_PCR1 -#define CORE_PIN15_CONFIG PORTC_PCR0 -#define CORE_PIN16_CONFIG PORTB_PCR0 -#define CORE_PIN17_CONFIG PORTB_PCR1 -#define CORE_PIN18_CONFIG PORTB_PCR3 -#define CORE_PIN19_CONFIG PORTB_PCR2 -#define CORE_PIN20_CONFIG PORTD_PCR5 -#define CORE_PIN21_CONFIG PORTD_PCR6 -#define CORE_PIN22_CONFIG PORTC_PCR1 -#define CORE_PIN23_CONFIG PORTC_PCR2 -#define CORE_PIN24_CONFIG PORTA_PCR5 -#define CORE_PIN25_CONFIG PORTB_PCR19 -#define CORE_PIN26_CONFIG PORTE_PCR1 -#define CORE_PIN27_CONFIG PORTC_PCR9 -#define CORE_PIN28_CONFIG PORTC_PCR8 -#define CORE_PIN29_CONFIG PORTC_PCR10 -#define CORE_PIN30_CONFIG PORTC_PCR11 -#define CORE_PIN31_CONFIG PORTE_PCR0 -#define CORE_PIN32_CONFIG PORTB_PCR18 -#define CORE_PIN33_CONFIG PORTA_PCR4 - -#define CORE_ADC0_PIN 14 -#define CORE_ADC1_PIN 15 -#define CORE_ADC2_PIN 16 -#define CORE_ADC3_PIN 17 -#define CORE_ADC4_PIN 18 -#define CORE_ADC5_PIN 19 -#define CORE_ADC6_PIN 20 -#define CORE_ADC7_PIN 21 -#define CORE_ADC8_PIN 22 -#define CORE_ADC9_PIN 23 -#define CORE_ADC10_PIN 34 -#define CORE_ADC11_PIN 35 -#define CORE_ADC12_PIN 36 -#define CORE_ADC13_PIN 37 - -#define CORE_RXD0_PIN 0 -#define CORE_TXD0_PIN 1 -#define CORE_RXD1_PIN 9 -#define CORE_TXD1_PIN 10 -#define CORE_RXD2_PIN 7 -#define CORE_TXD2_PIN 8 - -#define CORE_INT0_PIN 0 -#define CORE_INT1_PIN 1 -#define CORE_INT2_PIN 2 -#define CORE_INT3_PIN 3 -#define CORE_INT4_PIN 4 -#define CORE_INT5_PIN 5 -#define CORE_INT6_PIN 6 -#define CORE_INT7_PIN 7 -#define CORE_INT8_PIN 8 -#define CORE_INT9_PIN 9 -#define CORE_INT10_PIN 10 -#define CORE_INT11_PIN 11 -#define CORE_INT12_PIN 12 -#define CORE_INT13_PIN 13 -#define CORE_INT14_PIN 14 -#define CORE_INT15_PIN 15 -#define CORE_INT16_PIN 16 -#define CORE_INT17_PIN 17 -#define CORE_INT18_PIN 18 -#define CORE_INT19_PIN 19 -#define CORE_INT20_PIN 20 -#define CORE_INT21_PIN 21 -#define CORE_INT22_PIN 22 -#define CORE_INT23_PIN 23 -#define CORE_INT24_PIN 24 -#define CORE_INT25_PIN 25 -#define CORE_INT26_PIN 26 -#define CORE_INT27_PIN 27 -#define CORE_INT28_PIN 28 -#define CORE_INT29_PIN 29 -#define CORE_INT30_PIN 30 -#define CORE_INT31_PIN 31 -#define CORE_INT32_PIN 32 -#define CORE_INT33_PIN 33 -#define CORE_INT_EVERY_PIN 1 - - - - -#ifdef __cplusplus -extern "C" { -#endif - -void digitalWrite(uint8_t pin, uint8_t val); -static inline void digitalWriteFast(uint8_t pin, uint8_t val) __attribute__((always_inline, unused)); -static inline void digitalWriteFast(uint8_t pin, uint8_t val) -{ - if (__builtin_constant_p(pin)) { - if (val) { - if (pin == 0) { - CORE_PIN0_PORTSET = CORE_PIN0_BITMASK; - } else if (pin == 1) { - CORE_PIN1_PORTSET = CORE_PIN1_BITMASK; - } else if (pin == 2) { - CORE_PIN2_PORTSET = CORE_PIN2_BITMASK; - } else if (pin == 3) { - CORE_PIN3_PORTSET = CORE_PIN3_BITMASK; - } else if (pin == 4) { - CORE_PIN4_PORTSET = CORE_PIN4_BITMASK; - } else if (pin == 5) { - CORE_PIN5_PORTSET = CORE_PIN5_BITMASK; - } else if (pin == 6) { - CORE_PIN6_PORTSET = CORE_PIN6_BITMASK; - } else if (pin == 7) { - CORE_PIN7_PORTSET = CORE_PIN7_BITMASK; - } else if (pin == 8) { - CORE_PIN8_PORTSET = CORE_PIN8_BITMASK; - } else if (pin == 9) { - CORE_PIN9_PORTSET = CORE_PIN9_BITMASK; - } else if (pin == 10) { - CORE_PIN10_PORTSET = CORE_PIN10_BITMASK; - } else if (pin == 11) { - CORE_PIN11_PORTSET = CORE_PIN11_BITMASK; - } else if (pin == 12) { - CORE_PIN12_PORTSET = CORE_PIN12_BITMASK; - } else if (pin == 13) { - CORE_PIN13_PORTSET = CORE_PIN13_BITMASK; - } else if (pin == 14) { - CORE_PIN14_PORTSET = CORE_PIN14_BITMASK; - } else if (pin == 15) { - CORE_PIN15_PORTSET = CORE_PIN15_BITMASK; - } else if (pin == 16) { - CORE_PIN16_PORTSET = CORE_PIN16_BITMASK; - } else if (pin == 17) { - CORE_PIN17_PORTSET = CORE_PIN17_BITMASK; - } else if (pin == 18) { - CORE_PIN18_PORTSET = CORE_PIN18_BITMASK; - } else if (pin == 19) { - CORE_PIN19_PORTSET = CORE_PIN19_BITMASK; - } else if (pin == 20) { - CORE_PIN20_PORTSET = CORE_PIN20_BITMASK; - } else if (pin == 21) { - CORE_PIN21_PORTSET = CORE_PIN21_BITMASK; - } else if (pin == 22) { - CORE_PIN22_PORTSET = CORE_PIN22_BITMASK; - } else if (pin == 23) { - CORE_PIN23_PORTSET = CORE_PIN23_BITMASK; - } else if (pin == 24) { - CORE_PIN24_PORTSET = CORE_PIN24_BITMASK; - } else if (pin == 25) { - CORE_PIN25_PORTSET = CORE_PIN25_BITMASK; - } else if (pin == 26) { - CORE_PIN26_PORTSET = CORE_PIN26_BITMASK; - } else if (pin == 27) { - CORE_PIN27_PORTSET = CORE_PIN27_BITMASK; - } else if (pin == 28) { - CORE_PIN28_PORTSET = CORE_PIN28_BITMASK; - } else if (pin == 29) { - CORE_PIN29_PORTSET = CORE_PIN29_BITMASK; - } else if (pin == 30) { - CORE_PIN30_PORTSET = CORE_PIN30_BITMASK; - } else if (pin == 31) { - CORE_PIN31_PORTSET = CORE_PIN31_BITMASK; - } else if (pin == 32) { - CORE_PIN32_PORTSET = CORE_PIN32_BITMASK; - } else if (pin == 33) { - CORE_PIN33_PORTSET = CORE_PIN33_BITMASK; - } - } else { - if (pin == 0) { - CORE_PIN0_PORTCLEAR = CORE_PIN0_BITMASK; - } else if (pin == 1) { - CORE_PIN1_PORTCLEAR = CORE_PIN1_BITMASK; - } else if (pin == 2) { - CORE_PIN2_PORTCLEAR = CORE_PIN2_BITMASK; - } else if (pin == 3) { - CORE_PIN3_PORTCLEAR = CORE_PIN3_BITMASK; - } else if (pin == 4) { - CORE_PIN4_PORTCLEAR = CORE_PIN4_BITMASK; - } else if (pin == 5) { - CORE_PIN5_PORTCLEAR = CORE_PIN5_BITMASK; - } else if (pin == 6) { - CORE_PIN6_PORTCLEAR = CORE_PIN6_BITMASK; - } else if (pin == 7) { - CORE_PIN7_PORTCLEAR = CORE_PIN7_BITMASK; - } else if (pin == 8) { - CORE_PIN8_PORTCLEAR = CORE_PIN8_BITMASK; - } else if (pin == 9) { - CORE_PIN9_PORTCLEAR = CORE_PIN9_BITMASK; - } else if (pin == 10) { - CORE_PIN10_PORTCLEAR = CORE_PIN10_BITMASK; - } else if (pin == 11) { - CORE_PIN11_PORTCLEAR = CORE_PIN11_BITMASK; - } else if (pin == 12) { - CORE_PIN12_PORTCLEAR = CORE_PIN12_BITMASK; - } else if (pin == 13) { - CORE_PIN13_PORTCLEAR = CORE_PIN13_BITMASK; - } else if (pin == 14) { - CORE_PIN14_PORTCLEAR = CORE_PIN14_BITMASK; - } else if (pin == 15) { - CORE_PIN15_PORTCLEAR = CORE_PIN15_BITMASK; - } else if (pin == 16) { - CORE_PIN16_PORTCLEAR = CORE_PIN16_BITMASK; - } else if (pin == 17) { - CORE_PIN17_PORTCLEAR = CORE_PIN17_BITMASK; - } else if (pin == 18) { - CORE_PIN18_PORTCLEAR = CORE_PIN18_BITMASK; - } else if (pin == 19) { - CORE_PIN19_PORTCLEAR = CORE_PIN19_BITMASK; - } else if (pin == 20) { - CORE_PIN20_PORTCLEAR = CORE_PIN20_BITMASK; - } else if (pin == 21) { - CORE_PIN21_PORTCLEAR = CORE_PIN21_BITMASK; - } else if (pin == 22) { - CORE_PIN22_PORTCLEAR = CORE_PIN22_BITMASK; - } else if (pin == 23) { - CORE_PIN23_PORTCLEAR = CORE_PIN23_BITMASK; - } else if (pin == 24) { - CORE_PIN24_PORTCLEAR = CORE_PIN24_BITMASK; - } else if (pin == 25) { - CORE_PIN25_PORTCLEAR = CORE_PIN25_BITMASK; - } else if (pin == 26) { - CORE_PIN26_PORTCLEAR = CORE_PIN26_BITMASK; - } else if (pin == 27) { - CORE_PIN27_PORTCLEAR = CORE_PIN27_BITMASK; - } else if (pin == 28) { - CORE_PIN28_PORTCLEAR = CORE_PIN28_BITMASK; - } else if (pin == 29) { - CORE_PIN29_PORTCLEAR = CORE_PIN29_BITMASK; - } else if (pin == 30) { - CORE_PIN30_PORTCLEAR = CORE_PIN30_BITMASK; - } else if (pin == 31) { - CORE_PIN31_PORTCLEAR = CORE_PIN31_BITMASK; - } else if (pin == 32) { - CORE_PIN32_PORTCLEAR = CORE_PIN32_BITMASK; - } else if (pin == 33) { - CORE_PIN33_PORTCLEAR = CORE_PIN33_BITMASK; - } - } - } else { - if (val) { - *portSetRegister(pin) = 1; - } else { - *portClearRegister(pin) = 1; - } - } -} - -uint8_t digitalRead(uint8_t pin); -static inline uint8_t digitalReadFast(uint8_t pin) __attribute__((always_inline, unused)); -static inline uint8_t digitalReadFast(uint8_t pin) -{ - if (__builtin_constant_p(pin)) { - if (pin == 0) { - return (CORE_PIN0_PINREG & CORE_PIN0_BITMASK) ? 1 : 0; - } else if (pin == 1) { - return (CORE_PIN1_PINREG & CORE_PIN1_BITMASK) ? 1 : 0; - } else if (pin == 2) { - return (CORE_PIN2_PINREG & CORE_PIN2_BITMASK) ? 1 : 0; - } else if (pin == 3) { - return (CORE_PIN3_PINREG & CORE_PIN3_BITMASK) ? 1 : 0; - } else if (pin == 4) { - return (CORE_PIN4_PINREG & CORE_PIN4_BITMASK) ? 1 : 0; - } else if (pin == 5) { - return (CORE_PIN5_PINREG & CORE_PIN5_BITMASK) ? 1 : 0; - } else if (pin == 6) { - return (CORE_PIN6_PINREG & CORE_PIN6_BITMASK) ? 1 : 0; - } else if (pin == 7) { - return (CORE_PIN7_PINREG & CORE_PIN7_BITMASK) ? 1 : 0; - } else if (pin == 8) { - return (CORE_PIN8_PINREG & CORE_PIN8_BITMASK) ? 1 : 0; - } else if (pin == 9) { - return (CORE_PIN9_PINREG & CORE_PIN9_BITMASK) ? 1 : 0; - } else if (pin == 10) { - return (CORE_PIN10_PINREG & CORE_PIN10_BITMASK) ? 1 : 0; - } else if (pin == 11) { - return (CORE_PIN11_PINREG & CORE_PIN11_BITMASK) ? 1 : 0; - } else if (pin == 12) { - return (CORE_PIN12_PINREG & CORE_PIN12_BITMASK) ? 1 : 0; - } else if (pin == 13) { - return (CORE_PIN13_PINREG & CORE_PIN13_BITMASK) ? 1 : 0; - } else if (pin == 14) { - return (CORE_PIN14_PINREG & CORE_PIN14_BITMASK) ? 1 : 0; - } else if (pin == 15) { - return (CORE_PIN15_PINREG & CORE_PIN15_BITMASK) ? 1 : 0; - } else if (pin == 16) { - return (CORE_PIN16_PINREG & CORE_PIN16_BITMASK) ? 1 : 0; - } else if (pin == 17) { - return (CORE_PIN17_PINREG & CORE_PIN17_BITMASK) ? 1 : 0; - } else if (pin == 18) { - return (CORE_PIN18_PINREG & CORE_PIN18_BITMASK) ? 1 : 0; - } else if (pin == 19) { - return (CORE_PIN19_PINREG & CORE_PIN19_BITMASK) ? 1 : 0; - } else if (pin == 20) { - return (CORE_PIN20_PINREG & CORE_PIN20_BITMASK) ? 1 : 0; - } else if (pin == 21) { - return (CORE_PIN21_PINREG & CORE_PIN21_BITMASK) ? 1 : 0; - } else if (pin == 22) { - return (CORE_PIN22_PINREG & CORE_PIN22_BITMASK) ? 1 : 0; - } else if (pin == 23) { - return (CORE_PIN23_PINREG & CORE_PIN23_BITMASK) ? 1 : 0; - } else if (pin == 24) { - return (CORE_PIN24_PINREG & CORE_PIN24_BITMASK) ? 1 : 0; - } else if (pin == 25) { - return (CORE_PIN25_PINREG & CORE_PIN25_BITMASK) ? 1 : 0; - } else if (pin == 26) { - return (CORE_PIN26_PINREG & CORE_PIN26_BITMASK) ? 1 : 0; - } else if (pin == 27) { - return (CORE_PIN27_PINREG & CORE_PIN27_BITMASK) ? 1 : 0; - } else if (pin == 28) { - return (CORE_PIN28_PINREG & CORE_PIN28_BITMASK) ? 1 : 0; - } else if (pin == 29) { - return (CORE_PIN29_PINREG & CORE_PIN29_BITMASK) ? 1 : 0; - } else if (pin == 30) { - return (CORE_PIN30_PINREG & CORE_PIN30_BITMASK) ? 1 : 0; - } else if (pin == 31) { - return (CORE_PIN31_PINREG & CORE_PIN31_BITMASK) ? 1 : 0; - } else if (pin == 32) { - return (CORE_PIN32_PINREG & CORE_PIN32_BITMASK) ? 1 : 0; - } else if (pin == 33) { - return (CORE_PIN33_PINREG & CORE_PIN33_BITMASK) ? 1 : 0; - } else { - return 0; - } - } else { - return *portInputRegister(pin); - } -} - - -void pinMode(uint8_t pin, uint8_t mode); -void init_pins(void); -void analogWrite(uint8_t pin, int val); -void analogWriteRes(uint32_t bits); -static inline void analogWriteResolution(uint32_t bits) { analogWriteRes(bits); } -void analogWriteFrequency(uint8_t pin, uint32_t frequency); -void analogWriteDAC0(int val); -void attachInterrupt(uint8_t pin, void (*function)(void), int mode); -void detachInterrupt(uint8_t pin); -void _init_Teensyduino_internal_(void); - -int analogRead(uint8_t pin); -void analogReference(uint8_t type); -void analogReadRes(unsigned int bits); -static inline void analogReadResolution(unsigned int bits) { analogReadRes(bits); } -void analogReadAveraging(unsigned int num); -void analog_init(void); - -#define DEFAULT 0 -#define INTERNAL 2 -#define INTERNAL1V2 2 -#define INTERNAL1V1 2 -#define EXTERNAL 0 - -int touchRead(uint8_t pin); - - -static inline void shiftOut(uint8_t, uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused)); -extern void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) __attribute__((noinline)); -extern void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline)); -extern void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) __attribute__((noinline)); - -static inline void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) -{ - if (__builtin_constant_p(bitOrder)) { - if (bitOrder == LSBFIRST) { - shiftOut_lsbFirst(dataPin, clockPin, value); - } else { - shiftOut_msbFirst(dataPin, clockPin, value); - } - } else { - _shiftOut(dataPin, clockPin, bitOrder, value); - } -} - -static inline uint8_t shiftIn(uint8_t, uint8_t, uint8_t) __attribute__((always_inline, unused)); -extern uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) __attribute__((noinline)); -extern uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline)); -extern uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin) __attribute__((noinline)); - -static inline uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) -{ - if (__builtin_constant_p(bitOrder)) { - if (bitOrder == LSBFIRST) { - return shiftIn_lsbFirst(dataPin, clockPin); - } else { - return shiftIn_msbFirst(dataPin, clockPin); - } - } else { - return _shiftIn(dataPin, clockPin, bitOrder); - } -} - -void _reboot_Teensyduino_(void) __attribute__((noreturn)); -void _restart_Teensyduino_(void) __attribute__((noreturn)); - -void yield(void); - -void delay(uint32_t msec); - -extern volatile uint32_t systick_millis_count; - -static inline uint32_t millis(void) __attribute__((always_inline, unused)); -static inline uint32_t millis(void) -{ - volatile uint32_t ret = systick_millis_count; // single aligned 32 bit is atomic; - return ret; -} - -uint32_t micros(void); - -static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused)); -static inline void delayMicroseconds(uint32_t usec) -{ -#if F_CPU == 168000000 - uint32_t n = usec * 56; -#elif F_CPU == 144000000 - uint32_t n = usec * 48; -#elif F_CPU == 120000000 - uint32_t n = usec * 40; -#elif F_CPU == 96000000 - uint32_t n = usec << 5; -#elif F_CPU == 72000000 - uint32_t n = usec * 24; -#elif F_CPU == 48000000 - uint32_t n = usec << 4; -#elif F_CPU == 24000000 - uint32_t n = usec << 3; -#elif F_CPU == 16000000 - uint32_t n = usec << 2; -#elif F_CPU == 8000000 - uint32_t n = usec << 1; -#elif F_CPU == 4000000 - uint32_t n = usec; -#elif F_CPU == 2000000 - uint32_t n = usec >> 1; -#endif - // changed because a delay of 1 micro Sec @ 2MHz will be 0 - if (n == 0) return; - __asm__ volatile( - "L_%=_delayMicroseconds:" "\n\t" -#if F_CPU < 24000000 - "nop" "\n\t" -#endif - "subs %0, #1" "\n\t" - "bne L_%=_delayMicroseconds" "\n" - : "+r" (n) : - ); -} - -#ifdef __cplusplus -} -#endif - - - - - - - - -#ifdef __cplusplus -extern "C" { -#endif -unsigned long rtc_get(void); -void rtc_set(unsigned long t); -void rtc_compensate(int adjust); -#ifdef __cplusplus -} -class teensy3_clock_class -{ -public: - static unsigned long get(void) __attribute__((always_inline)) { return rtc_get(); } - static void set(unsigned long t) __attribute__((always_inline)) { rtc_set(t); } - static void compensate(int adj) __attribute__((always_inline)) { rtc_compensate(adj); } -}; -extern teensy3_clock_class Teensy3Clock; -#endif - - - - -#endif diff --git a/ports/teensy/core/mk20dx128.c b/ports/teensy/core/mk20dx128.c deleted file mode 100644 index 0f5f1e19e266f..0000000000000 --- a/ports/teensy/core/mk20dx128.c +++ /dev/null @@ -1,662 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "mk20dx128.h" - - -extern unsigned long _stext; -extern unsigned long _etext; -extern unsigned long _sdata; -extern unsigned long _edata; -extern unsigned long _sbss; -extern unsigned long _ebss; -extern unsigned long _estack; -//extern void __init_array_start(void); -//extern void __init_array_end(void); - - - -extern int main (void); -void ResetHandler(void); -void _init_Teensyduino_internal_(void); -void __libc_init_array(void); - - -void fault_isr(void) -{ - while (1) { - // keep polling some communication while in fault - // mode, so we don't completely die. - if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr(); - if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr(); - } -} - -void unused_isr(void) -{ - fault_isr(); -} - -extern volatile uint32_t systick_millis_count; -void systick_default_isr(void) -{ - systick_millis_count++; -} - -void nmi_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void hard_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void memmanage_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void bus_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usage_fault_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void svcall_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void debugmonitor_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pendablesrvreq_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void systick_isr(void) __attribute__ ((weak, alias("systick_default_isr"))); - -void dma_ch0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch4_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch5_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch6_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch7_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch8_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch9_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch10_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch11_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch12_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch13_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch14_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_ch15_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dma_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void mcm_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void flash_cmd_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void flash_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void low_voltage_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void wakeup_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void watchdog_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2c2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void spi2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void sdhc_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_message_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_bus_off_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_tx_warn_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_rx_warn_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void can0_wakeup_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2s0_tx_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void i2s0_rx_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_lon_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart0_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart1_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart1_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart2_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart2_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart3_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart3_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart4_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart4_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart5_status_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void uart5_error_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void adc0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void adc1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmp2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void ftm3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void cmt_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void rtc_alarm_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void rtc_seconds_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit2_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pit3_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void pdb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void usb_charge_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dac0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void dac1_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void tsi0_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void mcg_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void lptmr_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void porta_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portb_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portc_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void portd_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void porte_isr(void) __attribute__ ((weak, alias("unused_isr"))); -void software_isr(void) __attribute__ ((weak, alias("unused_isr"))); - - -// TODO: create AVR-stype ISR() macro, with default linkage to undefined handler -// -__attribute__ ((section(".vectors"), used)) -void (* const gVectors[])(void) = -{ - (void (*)(void))((unsigned long)&_estack), // 0 ARM: Initial Stack Pointer - ResetHandler, // 1 ARM: Initial Program Counter - nmi_isr, // 2 ARM: Non-maskable Interrupt (NMI) - hard_fault_isr, // 3 ARM: Hard Fault - memmanage_fault_isr, // 4 ARM: MemManage Fault - bus_fault_isr, // 5 ARM: Bus Fault - usage_fault_isr, // 6 ARM: Usage Fault - fault_isr, // 7 -- - fault_isr, // 8 -- - fault_isr, // 9 -- - fault_isr, // 10 -- - svcall_isr, // 11 ARM: Supervisor call (SVCall) - debugmonitor_isr, // 12 ARM: Debug Monitor - fault_isr, // 13 -- - pendablesrvreq_isr, // 14 ARM: Pendable req serv(PendableSrvReq) - systick_isr, // 15 ARM: System tick timer (SysTick) -#if defined(__MK20DX128__) - dma_ch0_isr, // 16 DMA channel 0 transfer complete - dma_ch1_isr, // 17 DMA channel 1 transfer complete - dma_ch2_isr, // 18 DMA channel 2 transfer complete - dma_ch3_isr, // 19 DMA channel 3 transfer complete - dma_error_isr, // 20 DMA error interrupt channel - unused_isr, // 21 DMA -- - flash_cmd_isr, // 22 Flash Memory Command complete - flash_error_isr, // 23 Flash Read collision - low_voltage_isr, // 24 Low-voltage detect/warning - wakeup_isr, // 25 Low Leakage Wakeup - watchdog_isr, // 26 Both EWM and WDOG interrupt - i2c0_isr, // 27 I2C0 - spi0_isr, // 28 SPI0 - i2s0_tx_isr, // 29 I2S0 Transmit - i2s0_rx_isr, // 30 I2S0 Receive - uart0_lon_isr, // 31 UART0 CEA709.1-B (LON) status - uart0_status_isr, // 32 UART0 status - uart0_error_isr, // 33 UART0 error - uart1_status_isr, // 34 UART1 status - uart1_error_isr, // 35 UART1 error - uart2_status_isr, // 36 UART2 status - uart2_error_isr, // 37 UART2 error - adc0_isr, // 38 ADC0 - cmp0_isr, // 39 CMP0 - cmp1_isr, // 40 CMP1 - ftm0_isr, // 41 FTM0 - ftm1_isr, // 42 FTM1 - cmt_isr, // 43 CMT - rtc_alarm_isr, // 44 RTC Alarm interrupt - rtc_seconds_isr, // 45 RTC Seconds interrupt - pit0_isr, // 46 PIT Channel 0 - pit1_isr, // 47 PIT Channel 1 - pit2_isr, // 48 PIT Channel 2 - pit3_isr, // 49 PIT Channel 3 - pdb_isr, // 50 PDB Programmable Delay Block - usb_isr, // 51 USB OTG - usb_charge_isr, // 52 USB Charger Detect - tsi0_isr, // 53 TSI0 - mcg_isr, // 54 MCG - lptmr_isr, // 55 Low Power Timer - porta_isr, // 56 Pin detect (Port A) - portb_isr, // 57 Pin detect (Port B) - portc_isr, // 58 Pin detect (Port C) - portd_isr, // 59 Pin detect (Port D) - porte_isr, // 60 Pin detect (Port E) - software_isr, // 61 Software interrupt -#elif defined(__MK20DX256__) - dma_ch0_isr, // 16 DMA channel 0 transfer complete - dma_ch1_isr, // 17 DMA channel 1 transfer complete - dma_ch2_isr, // 18 DMA channel 2 transfer complete - dma_ch3_isr, // 19 DMA channel 3 transfer complete - dma_ch4_isr, // 20 DMA channel 4 transfer complete - dma_ch5_isr, // 21 DMA channel 5 transfer complete - dma_ch6_isr, // 22 DMA channel 6 transfer complete - dma_ch7_isr, // 23 DMA channel 7 transfer complete - dma_ch8_isr, // 24 DMA channel 8 transfer complete - dma_ch9_isr, // 25 DMA channel 9 transfer complete - dma_ch10_isr, // 26 DMA channel 10 transfer complete - dma_ch11_isr, // 27 DMA channel 10 transfer complete - dma_ch12_isr, // 28 DMA channel 10 transfer complete - dma_ch13_isr, // 29 DMA channel 10 transfer complete - dma_ch14_isr, // 30 DMA channel 10 transfer complete - dma_ch15_isr, // 31 DMA channel 10 transfer complete - dma_error_isr, // 32 DMA error interrupt channel - unused_isr, // 33 -- - flash_cmd_isr, // 34 Flash Memory Command complete - flash_error_isr, // 35 Flash Read collision - low_voltage_isr, // 36 Low-voltage detect/warning - wakeup_isr, // 37 Low Leakage Wakeup - watchdog_isr, // 38 Both EWM and WDOG interrupt - unused_isr, // 39 -- - i2c0_isr, // 40 I2C0 - i2c1_isr, // 41 I2C1 - spi0_isr, // 42 SPI0 - spi1_isr, // 43 SPI1 - unused_isr, // 44 -- - can0_message_isr, // 45 CAN OR'ed Message buffer (0-15) - can0_bus_off_isr, // 46 CAN Bus Off - can0_error_isr, // 47 CAN Error - can0_tx_warn_isr, // 48 CAN Transmit Warning - can0_rx_warn_isr, // 49 CAN Receive Warning - can0_wakeup_isr, // 50 CAN Wake Up - i2s0_tx_isr, // 51 I2S0 Transmit - i2s0_rx_isr, // 52 I2S0 Receive - unused_isr, // 53 -- - unused_isr, // 54 -- - unused_isr, // 55 -- - unused_isr, // 56 -- - unused_isr, // 57 -- - unused_isr, // 58 -- - unused_isr, // 59 -- - uart0_lon_isr, // 60 UART0 CEA709.1-B (LON) status - uart0_status_isr, // 61 UART0 status - uart0_error_isr, // 62 UART0 error - uart1_status_isr, // 63 UART1 status - uart1_error_isr, // 64 UART1 error - uart2_status_isr, // 65 UART2 status - uart2_error_isr, // 66 UART2 error - unused_isr, // 67 -- - unused_isr, // 68 -- - unused_isr, // 69 -- - unused_isr, // 70 -- - unused_isr, // 71 -- - unused_isr, // 72 -- - adc0_isr, // 73 ADC0 - adc1_isr, // 74 ADC1 - cmp0_isr, // 75 CMP0 - cmp1_isr, // 76 CMP1 - cmp2_isr, // 77 CMP2 - ftm0_isr, // 78 FTM0 - ftm1_isr, // 79 FTM1 - ftm2_isr, // 80 FTM2 - cmt_isr, // 81 CMT - rtc_alarm_isr, // 82 RTC Alarm interrupt - rtc_seconds_isr, // 83 RTC Seconds interrupt - pit0_isr, // 84 PIT Channel 0 - pit1_isr, // 85 PIT Channel 1 - pit2_isr, // 86 PIT Channel 2 - pit3_isr, // 87 PIT Channel 3 - pdb_isr, // 88 PDB Programmable Delay Block - usb_isr, // 89 USB OTG - usb_charge_isr, // 90 USB Charger Detect - unused_isr, // 91 -- - unused_isr, // 92 -- - unused_isr, // 93 -- - unused_isr, // 94 -- - unused_isr, // 95 -- - unused_isr, // 96 -- - dac0_isr, // 97 DAC0 - unused_isr, // 98 -- - tsi0_isr, // 99 TSI0 - mcg_isr, // 100 MCG - lptmr_isr, // 101 Low Power Timer - unused_isr, // 102 -- - porta_isr, // 103 Pin detect (Port A) - portb_isr, // 104 Pin detect (Port B) - portc_isr, // 105 Pin detect (Port C) - portd_isr, // 106 Pin detect (Port D) - porte_isr, // 107 Pin detect (Port E) - unused_isr, // 108 -- - unused_isr, // 109 -- - software_isr, // 110 Software interrupt -#endif -}; - -//void usb_isr(void) -//{ -//} - -__attribute__ ((section(".flashconfig"), used)) -const uint8_t flashconfigbytes[16] = { - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF -}; - - -// Automatically initialize the RTC. When the build defines the compile -// time, and the user has added a crystal, the RTC will automatically -// begin at the time of the first upload. -#ifndef TIME_T -#define TIME_T 1349049600 // default 1 Oct 2012 (never used, Arduino sets this) -#endif -extern void rtc_set(unsigned long t); - - -static void startup_default_early_hook(void) { WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE; } -static void startup_default_late_hook(void) {} -void startup_early_hook(void) __attribute__ ((weak, alias("startup_default_early_hook"))); -void startup_late_hook(void) __attribute__ ((weak, alias("startup_default_late_hook"))); - -__attribute__ ((section(".startup"))) -void ResetHandler(void) -{ - uint32_t *src = &_etext; - uint32_t *dest = &_sdata; - unsigned int i; -#if F_CPU <= 2000000 - volatile int n; -#endif - - WDOG_UNLOCK = WDOG_UNLOCK_SEQ1; - WDOG_UNLOCK = WDOG_UNLOCK_SEQ2; - __asm__ volatile ("nop"); - __asm__ volatile ("nop"); - // programs using the watchdog timer or needing to initialize hardware as - // early as possible can implement startup_early_hook() - startup_early_hook(); - - // enable clocks to always-used peripherals -#if defined(__MK20DX128__) - SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL; -#elif defined(__MK20DX256__) - SIM_SCGC3 = SIM_SCGC3_ADC1 | SIM_SCGC3_FTM2; - SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL; -#endif - // if the RTC oscillator isn't enabled, get it started early - if (!(RTC_CR & RTC_CR_OSCE)) { - RTC_SR = 0; - RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE; - } - - // release I/O pins hold, if we woke up from VLLS mode - if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO; - - // since this is a write once register, make it visible to all F_CPU's - // so we can into other sleep modes in the future at any speed - SMC_PMPROT = SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS; - - // TODO: do this while the PLL is waiting to lock.... - while (dest < &_edata) *dest++ = *src++; - dest = &_sbss; - while (dest < &_ebss) *dest++ = 0; - SCB_VTOR = 0; // use vector table in flash - - // default all interrupts to medium priority level - for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128); - - // hardware always starts in FEI mode - // C1[CLKS] bits are written to 00 - // C1[IREFS] bit is written to 1 - // C6[PLLS] bit is written to 0 -// MCG_SC[FCDIV] defaults to divide by two for internal ref clock -// I tried changing MSG_SC to divide by 1, it didn't work for me -#if F_CPU <= 2000000 - // use the internal oscillator - MCG_C1 = MCG_C1_CLKS(1) | MCG_C1_IREFS; - // wait for MCGOUT to use oscillator - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(1)) ; - for (n=0; n<10; n++) ; // TODO: why do we get 2 mA extra without this delay? - MCG_C2 = MCG_C2_IRCS; - while (!(MCG_S & MCG_S_IRCST)) ; - // now in FBI mode: - // C1[CLKS] bits are written to 01 - // C1[IREFS] bit is written to 1 - // C6[PLLS] is written to 0 - // C2[LP] is written to 0 - MCG_C2 = MCG_C2_IRCS | MCG_C2_LP; - // now in BLPI mode: - // C1[CLKS] bits are written to 01 - // C1[IREFS] bit is written to 1 - // C6[PLLS] bit is written to 0 - // C2[LP] bit is written to 1 -#else - // enable capacitors for crystal - OSC0_CR = OSC_SC8P | OSC_SC2P; - // enable osc, 8-32 MHz range, low power mode - MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS; - // switch to crystal as clock source, FLL input = 16 MHz / 512 - MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4); - // wait for crystal oscillator to begin - while ((MCG_S & MCG_S_OSCINIT0) == 0) ; - // wait for FLL to use oscillator - while ((MCG_S & MCG_S_IREFST) != 0) ; - // wait for MCGOUT to use oscillator - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ; - // now in FBE mode - // C1[CLKS] bits are written to 10 - // C1[IREFS] bit is written to 0 - // C1[FRDIV] must be written to divide xtal to 31.25-39 kHz - // C6[PLLS] bit is written to 0 - // C2[LP] is written to 0 - #if F_CPU <= 16000000 - // if the crystal is fast enough, use it directly (no FLL or PLL) - MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS | MCG_C2_LP; - // BLPE mode: - // C1[CLKS] bits are written to 10 - // C1[IREFS] bit is written to 0 - // C2[LP] bit is written to 1 - #else - // if we need faster than the crystal, turn on the PLL - #if F_CPU == 72000000 - MCG_C5 = MCG_C5_PRDIV0(5); // config PLL input for 16 MHz Crystal / 6 = 2.667 Hz - #else - MCG_C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz - #endif - #if F_CPU == 168000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(18); // config PLL for 168 MHz output - #elif F_CPU == 144000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(12); // config PLL for 144 MHz output - #elif F_CPU == 120000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output - #elif F_CPU == 72000000 - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(3); // config PLL for 72 MHz output - #else - MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output - #endif - // wait for PLL to start using xtal as its input - while (!(MCG_S & MCG_S_PLLST)) ; - // wait for PLL to lock - while (!(MCG_S & MCG_S_LOCK0)) ; - // now we're in PBE mode - #endif -#endif - - // now program the clock dividers -#if F_CPU == 168000000 - // config divisors: 168 MHz core, 56 MHz bus, 33.6 MHz flash, USB = 168 * 2 / 7 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(6) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 144000000 - // config divisors: 144 MHz core, 48 MHz bus, 28.8 MHz flash, USB = 144 / 3 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(2) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2); -#elif F_CPU == 120000000 - // config divisors: 120 MHz core, 60 MHz bus, 24 MHz flash, USB = 128 * 2 / 5 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(4); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 96000000 - // config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 72000000 - // config divisors: 72 MHz core, 36 MHz bus, 24 MHz flash, USB = 72 * 2 / 3 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(2); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC; -#elif F_CPU == 48000000 - // config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 24000000 - // config divisors: 24 MHz core, 24 MHz bus, 24 MHz flash, USB = 96 / 2 - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3); - SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); -#elif F_CPU == 16000000 - // config divisors: 16 MHz core, 16 MHz bus, 16 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(0); -#elif F_CPU == 8000000 - // config divisors: 8 MHz core, 8 MHz bus, 8 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(1); -#elif F_CPU == 4000000 - // config divisors: 4 MHz core, 4 MHz bus, 2 MHz flash - // since we are running from external clock 16MHz - // fix outdiv too -> cpu 16/4, bus 16/4, flash 16/4 - // here we can go into vlpr? - // config divisors: 4 MHz core, 4 MHz bus, 4 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(3) | SIM_CLKDIV1_OUTDIV2(3) | SIM_CLKDIV1_OUTDIV4(3); -#elif F_CPU == 2000000 - // since we are running from the fast internal reference clock 4MHz - // but is divided down by 2 so we actually have a 2MHz, MCG_SC[FCDIV] default is 2 - // fix outdiv -> cpu 2/1, bus 2/1, flash 2/2 - // config divisors: 2 MHz core, 2 MHz bus, 1 MHz flash - SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(1); -#else -#error "Error, F_CPU must be 168, 144, 120, 96, 72, 48, 24, 16, 8, 4, or 2 MHz" -#endif - -#if F_CPU > 16000000 - // switch to PLL as clock source, FLL input = 16 MHz / 512 - MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4); - // wait for PLL clock to be used - while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ; - // now we're in PEE mode - // USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0 - SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6); -#else - SIM_SOPT2 = SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(3); -#endif - -#if F_CPU <= 2000000 - // since we are not going into "stop mode" i removed it - SMC_PMCTRL = SMC_PMCTRL_RUNM(2); // VLPR mode :-) -#endif - - // initialize the SysTick counter - SYST_RVR = (F_CPU / 1000) - 1; - SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE; - - //init_pins(); - __enable_irq(); - - _init_Teensyduino_internal_(); - if (RTC_SR & RTC_SR_TIF) { - // TODO: this should probably set the time more agressively, if - // we could reliably detect the first reboot after programming. - rtc_set(TIME_T); - } - - __libc_init_array(); - - startup_late_hook(); - main(); - while (1) ; -} - -char *__brkval = (char *)&_ebss; - -void * _sbrk(int incr) -{ - char *prev = __brkval; - __brkval += incr; - return prev; -} - -__attribute__((weak)) -int _read(int file, char *ptr, int len) -{ - return 0; -} - -__attribute__((weak)) -int _close(int fd) -{ - return -1; -} - -#include - -__attribute__((weak)) -int _fstat(int fd, struct stat *st) -{ - st->st_mode = S_IFCHR; - return 0; -} - -__attribute__((weak)) -int _isatty(int fd) -{ - return 1; -} - -__attribute__((weak)) -int _lseek(int fd, long long offset, int whence) -{ - return -1; -} - -__attribute__((weak)) -void _exit(int status) -{ - while (1); -} - -__attribute__((weak)) -void __cxa_pure_virtual() -{ - while (1); -} - -__attribute__((weak)) -int __cxa_guard_acquire (char *g) -{ - return !(*g); -} - -__attribute__((weak)) -void __cxa_guard_release(char *g) -{ - *g = 1; -} - -int nvic_execution_priority(void) -{ - int priority=256; - uint32_t primask, faultmask, basepri, ipsr; - - // full algorithm in ARM DDI0403D, page B1-639 - // this isn't quite complete, but hopefully good enough - __asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::); - if (faultmask) return -1; - __asm__ volatile("mrs %0, primask\n" : "=r" (primask)::); - if (primask) return 0; - __asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::); - if (ipsr) { - if (ipsr < 16) priority = 0; // could be non-zero - else priority = NVIC_GET_PRIORITY(ipsr - 16); - } - __asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::); - if (basepri > 0 && basepri < priority) priority = basepri; - return priority; -} - diff --git a/ports/teensy/core/mk20dx128.h b/ports/teensy/core/mk20dx128.h deleted file mode 100644 index ab13760508b15..0000000000000 --- a/ports/teensy/core/mk20dx128.h +++ /dev/null @@ -1,2385 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _mk20dx128_h_ -#define _mk20dx128_h_ - -//#ifdef F_CPU -//#undef F_CPU -//#endif -//#define F_CPU 168000000 -//#define F_CPU 144000000 -//#define F_CPU 120000000 -//#define F_CPU 96000000 -//#define F_CPU 72000000 -//#define F_CPU 48000000 -//#define F_CPU 24000000 - -#if (F_CPU == 168000000) - #define F_BUS 56000000 - #define F_MEM 33600000 -#elif (F_CPU == 144000000) - #define F_BUS 48000000 - #define F_MEM 28800000 -#elif (F_CPU == 120000000) - #define F_BUS 60000000 - #define F_MEM 24000000 -#elif (F_CPU == 96000000) - #define F_BUS 48000000 - #define F_MEM 24000000 -#elif (F_CPU == 72000000) - #define F_BUS 36000000 - #define F_MEM 24000000 -#elif (F_CPU == 48000000) - #define F_BUS 48000000 - #define F_MEM 24000000 -#elif (F_CPU == 24000000) - #define F_BUS 24000000 - #define F_MEM 24000000 -#elif (F_CPU == 16000000) - #define F_BUS 16000000 - #define F_MEM 16000000 -#elif (F_CPU == 8000000) - #define F_BUS 8000000 - #define F_MEM 8000000 -#elif (F_CPU == 4000000) - #define F_BUS 4000000 - #define F_MEM 4000000 -#elif (F_CPU == 2000000) - #define F_BUS 2000000 - #define F_MEM 1000000 -#endif - - -#ifndef NULL -#define NULL ((void *)0) -#endif - -#include -#ifdef __cplusplus -extern "C" { -#endif - -// chapter 11: Port control and interrupts (PORT) -#define PORTA_PCR0 *(volatile uint32_t *)0x40049000 // Pin Control Register n -#define PORT_PCR_ISF (uint32_t)0x01000000 // Interrupt Status Flag -#define PORT_PCR_IRQC(n) (uint32_t)(((n) & 15) << 16) // Interrupt Configuration -#define PORT_PCR_IRQC_MASK (uint32_t)0x000F0000 -#define PORT_PCR_LK (uint32_t)0x00008000 // Lock Register -#define PORT_PCR_MUX(n) (uint32_t)(((n) & 7) << 8) // Pin Mux Control -#define PORT_PCR_MUX_MASK (uint32_t)0x00000700 -#define PORT_PCR_DSE (uint32_t)0x00000040 // Drive Strength Enable -#define PORT_PCR_ODE (uint32_t)0x00000020 // Open Drain Enable -#define PORT_PCR_PFE (uint32_t)0x00000010 // Passive Filter Enable -#define PORT_PCR_SRE (uint32_t)0x00000004 // Slew Rate Enable -#define PORT_PCR_PE (uint32_t)0x00000002 // Pull Enable -#define PORT_PCR_PS (uint32_t)0x00000001 // Pull Select -#define PORTA_PCR1 *(volatile uint32_t *)0x40049004 // Pin Control Register n -#define PORTA_PCR2 *(volatile uint32_t *)0x40049008 // Pin Control Register n -#define PORTA_PCR3 *(volatile uint32_t *)0x4004900C // Pin Control Register n -#define PORTA_PCR4 *(volatile uint32_t *)0x40049010 // Pin Control Register n -#define PORTA_PCR5 *(volatile uint32_t *)0x40049014 // Pin Control Register n -#define PORTA_PCR6 *(volatile uint32_t *)0x40049018 // Pin Control Register n -#define PORTA_PCR7 *(volatile uint32_t *)0x4004901C // Pin Control Register n -#define PORTA_PCR8 *(volatile uint32_t *)0x40049020 // Pin Control Register n -#define PORTA_PCR9 *(volatile uint32_t *)0x40049024 // Pin Control Register n -#define PORTA_PCR10 *(volatile uint32_t *)0x40049028 // Pin Control Register n -#define PORTA_PCR11 *(volatile uint32_t *)0x4004902C // Pin Control Register n -#define PORTA_PCR12 *(volatile uint32_t *)0x40049030 // Pin Control Register n -#define PORTA_PCR13 *(volatile uint32_t *)0x40049034 // Pin Control Register n -#define PORTA_PCR14 *(volatile uint32_t *)0x40049038 // Pin Control Register n -#define PORTA_PCR15 *(volatile uint32_t *)0x4004903C // Pin Control Register n -#define PORTA_PCR16 *(volatile uint32_t *)0x40049040 // Pin Control Register n -#define PORTA_PCR17 *(volatile uint32_t *)0x40049044 // Pin Control Register n -#define PORTA_PCR18 *(volatile uint32_t *)0x40049048 // Pin Control Register n -#define PORTA_PCR19 *(volatile uint32_t *)0x4004904C // Pin Control Register n -#define PORTA_PCR20 *(volatile uint32_t *)0x40049050 // Pin Control Register n -#define PORTA_PCR21 *(volatile uint32_t *)0x40049054 // Pin Control Register n -#define PORTA_PCR22 *(volatile uint32_t *)0x40049058 // Pin Control Register n -#define PORTA_PCR23 *(volatile uint32_t *)0x4004905C // Pin Control Register n -#define PORTA_PCR24 *(volatile uint32_t *)0x40049060 // Pin Control Register n -#define PORTA_PCR25 *(volatile uint32_t *)0x40049064 // Pin Control Register n -#define PORTA_PCR26 *(volatile uint32_t *)0x40049068 // Pin Control Register n -#define PORTA_PCR27 *(volatile uint32_t *)0x4004906C // Pin Control Register n -#define PORTA_PCR28 *(volatile uint32_t *)0x40049070 // Pin Control Register n -#define PORTA_PCR29 *(volatile uint32_t *)0x40049074 // Pin Control Register n -#define PORTA_PCR30 *(volatile uint32_t *)0x40049078 // Pin Control Register n -#define PORTA_PCR31 *(volatile uint32_t *)0x4004907C // Pin Control Register n -#define PORTA_GPCLR *(volatile uint32_t *)0x40049080 // Global Pin Control Low Register -#define PORTA_GPCHR *(volatile uint32_t *)0x40049084 // Global Pin Control High Register -#define PORTA_ISFR *(volatile uint32_t *)0x400490A0 // Interrupt Status Flag Register -#define PORTB_PCR0 *(volatile uint32_t *)0x4004A000 // Pin Control Register n -#define PORTB_PCR1 *(volatile uint32_t *)0x4004A004 // Pin Control Register n -#define PORTB_PCR2 *(volatile uint32_t *)0x4004A008 // Pin Control Register n -#define PORTB_PCR3 *(volatile uint32_t *)0x4004A00C // Pin Control Register n -#define PORTB_PCR4 *(volatile uint32_t *)0x4004A010 // Pin Control Register n -#define PORTB_PCR5 *(volatile uint32_t *)0x4004A014 // Pin Control Register n -#define PORTB_PCR6 *(volatile uint32_t *)0x4004A018 // Pin Control Register n -#define PORTB_PCR7 *(volatile uint32_t *)0x4004A01C // Pin Control Register n -#define PORTB_PCR8 *(volatile uint32_t *)0x4004A020 // Pin Control Register n -#define PORTB_PCR9 *(volatile uint32_t *)0x4004A024 // Pin Control Register n -#define PORTB_PCR10 *(volatile uint32_t *)0x4004A028 // Pin Control Register n -#define PORTB_PCR11 *(volatile uint32_t *)0x4004A02C // Pin Control Register n -#define PORTB_PCR12 *(volatile uint32_t *)0x4004A030 // Pin Control Register n -#define PORTB_PCR13 *(volatile uint32_t *)0x4004A034 // Pin Control Register n -#define PORTB_PCR14 *(volatile uint32_t *)0x4004A038 // Pin Control Register n -#define PORTB_PCR15 *(volatile uint32_t *)0x4004A03C // Pin Control Register n -#define PORTB_PCR16 *(volatile uint32_t *)0x4004A040 // Pin Control Register n -#define PORTB_PCR17 *(volatile uint32_t *)0x4004A044 // Pin Control Register n -#define PORTB_PCR18 *(volatile uint32_t *)0x4004A048 // Pin Control Register n -#define PORTB_PCR19 *(volatile uint32_t *)0x4004A04C // Pin Control Register n -#define PORTB_PCR20 *(volatile uint32_t *)0x4004A050 // Pin Control Register n -#define PORTB_PCR21 *(volatile uint32_t *)0x4004A054 // Pin Control Register n -#define PORTB_PCR22 *(volatile uint32_t *)0x4004A058 // Pin Control Register n -#define PORTB_PCR23 *(volatile uint32_t *)0x4004A05C // Pin Control Register n -#define PORTB_PCR24 *(volatile uint32_t *)0x4004A060 // Pin Control Register n -#define PORTB_PCR25 *(volatile uint32_t *)0x4004A064 // Pin Control Register n -#define PORTB_PCR26 *(volatile uint32_t *)0x4004A068 // Pin Control Register n -#define PORTB_PCR27 *(volatile uint32_t *)0x4004A06C // Pin Control Register n -#define PORTB_PCR28 *(volatile uint32_t *)0x4004A070 // Pin Control Register n -#define PORTB_PCR29 *(volatile uint32_t *)0x4004A074 // Pin Control Register n -#define PORTB_PCR30 *(volatile uint32_t *)0x4004A078 // Pin Control Register n -#define PORTB_PCR31 *(volatile uint32_t *)0x4004A07C // Pin Control Register n -#define PORTB_GPCLR *(volatile uint32_t *)0x4004A080 // Global Pin Control Low Register -#define PORTB_GPCHR *(volatile uint32_t *)0x4004A084 // Global Pin Control High Register -#define PORTB_ISFR *(volatile uint32_t *)0x4004A0A0 // Interrupt Status Flag Register -#define PORTC_PCR0 *(volatile uint32_t *)0x4004B000 // Pin Control Register n -#define PORTC_PCR1 *(volatile uint32_t *)0x4004B004 // Pin Control Register n -#define PORTC_PCR2 *(volatile uint32_t *)0x4004B008 // Pin Control Register n -#define PORTC_PCR3 *(volatile uint32_t *)0x4004B00C // Pin Control Register n -#define PORTC_PCR4 *(volatile uint32_t *)0x4004B010 // Pin Control Register n -#define PORTC_PCR5 *(volatile uint32_t *)0x4004B014 // Pin Control Register n -#define PORTC_PCR6 *(volatile uint32_t *)0x4004B018 // Pin Control Register n -#define PORTC_PCR7 *(volatile uint32_t *)0x4004B01C // Pin Control Register n -#define PORTC_PCR8 *(volatile uint32_t *)0x4004B020 // Pin Control Register n -#define PORTC_PCR9 *(volatile uint32_t *)0x4004B024 // Pin Control Register n -#define PORTC_PCR10 *(volatile uint32_t *)0x4004B028 // Pin Control Register n -#define PORTC_PCR11 *(volatile uint32_t *)0x4004B02C // Pin Control Register n -#define PORTC_PCR12 *(volatile uint32_t *)0x4004B030 // Pin Control Register n -#define PORTC_PCR13 *(volatile uint32_t *)0x4004B034 // Pin Control Register n -#define PORTC_PCR14 *(volatile uint32_t *)0x4004B038 // Pin Control Register n -#define PORTC_PCR15 *(volatile uint32_t *)0x4004B03C // Pin Control Register n -#define PORTC_PCR16 *(volatile uint32_t *)0x4004B040 // Pin Control Register n -#define PORTC_PCR17 *(volatile uint32_t *)0x4004B044 // Pin Control Register n -#define PORTC_PCR18 *(volatile uint32_t *)0x4004B048 // Pin Control Register n -#define PORTC_PCR19 *(volatile uint32_t *)0x4004B04C // Pin Control Register n -#define PORTC_PCR20 *(volatile uint32_t *)0x4004B050 // Pin Control Register n -#define PORTC_PCR21 *(volatile uint32_t *)0x4004B054 // Pin Control Register n -#define PORTC_PCR22 *(volatile uint32_t *)0x4004B058 // Pin Control Register n -#define PORTC_PCR23 *(volatile uint32_t *)0x4004B05C // Pin Control Register n -#define PORTC_PCR24 *(volatile uint32_t *)0x4004B060 // Pin Control Register n -#define PORTC_PCR25 *(volatile uint32_t *)0x4004B064 // Pin Control Register n -#define PORTC_PCR26 *(volatile uint32_t *)0x4004B068 // Pin Control Register n -#define PORTC_PCR27 *(volatile uint32_t *)0x4004B06C // Pin Control Register n -#define PORTC_PCR28 *(volatile uint32_t *)0x4004B070 // Pin Control Register n -#define PORTC_PCR29 *(volatile uint32_t *)0x4004B074 // Pin Control Register n -#define PORTC_PCR30 *(volatile uint32_t *)0x4004B078 // Pin Control Register n -#define PORTC_PCR31 *(volatile uint32_t *)0x4004B07C // Pin Control Register n -#define PORTC_GPCLR *(volatile uint32_t *)0x4004B080 // Global Pin Control Low Register -#define PORTC_GPCHR *(volatile uint32_t *)0x4004B084 // Global Pin Control High Register -#define PORTC_ISFR *(volatile uint32_t *)0x4004B0A0 // Interrupt Status Flag Register -#define PORTD_PCR0 *(volatile uint32_t *)0x4004C000 // Pin Control Register n -#define PORTD_PCR1 *(volatile uint32_t *)0x4004C004 // Pin Control Register n -#define PORTD_PCR2 *(volatile uint32_t *)0x4004C008 // Pin Control Register n -#define PORTD_PCR3 *(volatile uint32_t *)0x4004C00C // Pin Control Register n -#define PORTD_PCR4 *(volatile uint32_t *)0x4004C010 // Pin Control Register n -#define PORTD_PCR5 *(volatile uint32_t *)0x4004C014 // Pin Control Register n -#define PORTD_PCR6 *(volatile uint32_t *)0x4004C018 // Pin Control Register n -#define PORTD_PCR7 *(volatile uint32_t *)0x4004C01C // Pin Control Register n -#define PORTD_PCR8 *(volatile uint32_t *)0x4004C020 // Pin Control Register n -#define PORTD_PCR9 *(volatile uint32_t *)0x4004C024 // Pin Control Register n -#define PORTD_PCR10 *(volatile uint32_t *)0x4004C028 // Pin Control Register n -#define PORTD_PCR11 *(volatile uint32_t *)0x4004C02C // Pin Control Register n -#define PORTD_PCR12 *(volatile uint32_t *)0x4004C030 // Pin Control Register n -#define PORTD_PCR13 *(volatile uint32_t *)0x4004C034 // Pin Control Register n -#define PORTD_PCR14 *(volatile uint32_t *)0x4004C038 // Pin Control Register n -#define PORTD_PCR15 *(volatile uint32_t *)0x4004C03C // Pin Control Register n -#define PORTD_PCR16 *(volatile uint32_t *)0x4004C040 // Pin Control Register n -#define PORTD_PCR17 *(volatile uint32_t *)0x4004C044 // Pin Control Register n -#define PORTD_PCR18 *(volatile uint32_t *)0x4004C048 // Pin Control Register n -#define PORTD_PCR19 *(volatile uint32_t *)0x4004C04C // Pin Control Register n -#define PORTD_PCR20 *(volatile uint32_t *)0x4004C050 // Pin Control Register n -#define PORTD_PCR21 *(volatile uint32_t *)0x4004C054 // Pin Control Register n -#define PORTD_PCR22 *(volatile uint32_t *)0x4004C058 // Pin Control Register n -#define PORTD_PCR23 *(volatile uint32_t *)0x4004C05C // Pin Control Register n -#define PORTD_PCR24 *(volatile uint32_t *)0x4004C060 // Pin Control Register n -#define PORTD_PCR25 *(volatile uint32_t *)0x4004C064 // Pin Control Register n -#define PORTD_PCR26 *(volatile uint32_t *)0x4004C068 // Pin Control Register n -#define PORTD_PCR27 *(volatile uint32_t *)0x4004C06C // Pin Control Register n -#define PORTD_PCR28 *(volatile uint32_t *)0x4004C070 // Pin Control Register n -#define PORTD_PCR29 *(volatile uint32_t *)0x4004C074 // Pin Control Register n -#define PORTD_PCR30 *(volatile uint32_t *)0x4004C078 // Pin Control Register n -#define PORTD_PCR31 *(volatile uint32_t *)0x4004C07C // Pin Control Register n -#define PORTD_GPCLR *(volatile uint32_t *)0x4004C080 // Global Pin Control Low Register -#define PORTD_GPCHR *(volatile uint32_t *)0x4004C084 // Global Pin Control High Register -#define PORTD_ISFR *(volatile uint32_t *)0x4004C0A0 // Interrupt Status Flag Register -#define PORTE_PCR0 *(volatile uint32_t *)0x4004D000 // Pin Control Register n -#define PORTE_PCR1 *(volatile uint32_t *)0x4004D004 // Pin Control Register n -#define PORTE_PCR2 *(volatile uint32_t *)0x4004D008 // Pin Control Register n -#define PORTE_PCR3 *(volatile uint32_t *)0x4004D00C // Pin Control Register n -#define PORTE_PCR4 *(volatile uint32_t *)0x4004D010 // Pin Control Register n -#define PORTE_PCR5 *(volatile uint32_t *)0x4004D014 // Pin Control Register n -#define PORTE_PCR6 *(volatile uint32_t *)0x4004D018 // Pin Control Register n -#define PORTE_PCR7 *(volatile uint32_t *)0x4004D01C // Pin Control Register n -#define PORTE_PCR8 *(volatile uint32_t *)0x4004D020 // Pin Control Register n -#define PORTE_PCR9 *(volatile uint32_t *)0x4004D024 // Pin Control Register n -#define PORTE_PCR10 *(volatile uint32_t *)0x4004D028 // Pin Control Register n -#define PORTE_PCR11 *(volatile uint32_t *)0x4004D02C // Pin Control Register n -#define PORTE_PCR12 *(volatile uint32_t *)0x4004D030 // Pin Control Register n -#define PORTE_PCR13 *(volatile uint32_t *)0x4004D034 // Pin Control Register n -#define PORTE_PCR14 *(volatile uint32_t *)0x4004D038 // Pin Control Register n -#define PORTE_PCR15 *(volatile uint32_t *)0x4004D03C // Pin Control Register n -#define PORTE_PCR16 *(volatile uint32_t *)0x4004D040 // Pin Control Register n -#define PORTE_PCR17 *(volatile uint32_t *)0x4004D044 // Pin Control Register n -#define PORTE_PCR18 *(volatile uint32_t *)0x4004D048 // Pin Control Register n -#define PORTE_PCR19 *(volatile uint32_t *)0x4004D04C // Pin Control Register n -#define PORTE_PCR20 *(volatile uint32_t *)0x4004D050 // Pin Control Register n -#define PORTE_PCR21 *(volatile uint32_t *)0x4004D054 // Pin Control Register n -#define PORTE_PCR22 *(volatile uint32_t *)0x4004D058 // Pin Control Register n -#define PORTE_PCR23 *(volatile uint32_t *)0x4004D05C // Pin Control Register n -#define PORTE_PCR24 *(volatile uint32_t *)0x4004D060 // Pin Control Register n -#define PORTE_PCR25 *(volatile uint32_t *)0x4004D064 // Pin Control Register n -#define PORTE_PCR26 *(volatile uint32_t *)0x4004D068 // Pin Control Register n -#define PORTE_PCR27 *(volatile uint32_t *)0x4004D06C // Pin Control Register n -#define PORTE_PCR28 *(volatile uint32_t *)0x4004D070 // Pin Control Register n -#define PORTE_PCR29 *(volatile uint32_t *)0x4004D074 // Pin Control Register n -#define PORTE_PCR30 *(volatile uint32_t *)0x4004D078 // Pin Control Register n -#define PORTE_PCR31 *(volatile uint32_t *)0x4004D07C // Pin Control Register n -#define PORTE_GPCLR *(volatile uint32_t *)0x4004D080 // Global Pin Control Low Register -#define PORTE_GPCHR *(volatile uint32_t *)0x4004D084 // Global Pin Control High Register -#define PORTE_ISFR *(volatile uint32_t *)0x4004D0A0 // Interrupt Status Flag Register - -// Chapter 12: System Integration Module (SIM) -#define SIM_SOPT1 *(volatile uint32_t *)0x40047000 // System Options Register 1 -#define SIM_SOPT1CFG *(volatile uint32_t *)0x40047004 // SOPT1 Configuration Register -#define SIM_SOPT2 *(volatile uint32_t *)0x40048004 // System Options Register 2 -#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL -#define SIM_SOPT2_PLLFLLSEL (uint32_t)0x00010000 // 0=FLL, 1=PLL -#define SIM_SOPT2_TRACECLKSEL (uint32_t)0x00001000 // 0=MCGOUTCLK, 1=CPU -#define SIM_SOPT2_PTD7PAD (uint32_t)0x00000800 // 0=normal, 1=double drive PTD7 -#define SIM_SOPT2_CLKOUTSEL(n) (uint32_t)(((n) & 7) << 5) // Selects the clock to output on the CLKOUT pin. -#define SIM_SOPT2_RTCCLKOUTSEL (uint32_t)0x00000010 // RTC clock out select -#define SIM_SOPT4 *(volatile uint32_t *)0x4004800C // System Options Register 4 -#define SIM_SOPT5 *(volatile uint32_t *)0x40048010 // System Options Register 5 -#define SIM_SOPT7 *(volatile uint32_t *)0x40048018 // System Options Register 7 -#define SIM_SDID *(const uint32_t *)0x40048024 // System Device Identification Register -#define SIM_SCGC2 *(volatile uint32_t *)0x4004802C // System Clock Gating Control Register 2 -#define SIM_SCGC2_DAC0 (uint32_t)0x00001000 // DAC0 Clock Gate Control -#define SIM_SCGC3 *(volatile uint32_t *)0x40048030 // System Clock Gating Control Register 3 -#define SIM_SCGC3_ADC1 (uint32_t)0x08000000 // ADC1 Clock Gate Control -#define SIM_SCGC3_FTM2 (uint32_t)0x01000000 // FTM2 Clock Gate Control -#define SIM_SCGC4 *(volatile uint32_t *)0x40048034 // System Clock Gating Control Register 4 -#define SIM_SCGC4_VREF (uint32_t)0x00100000 // VREF Clock Gate Control -#define SIM_SCGC4_CMP (uint32_t)0x00080000 // Comparator Clock Gate Control -#define SIM_SCGC4_USBOTG (uint32_t)0x00040000 // USB Clock Gate Control -#define SIM_SCGC4_UART2 (uint32_t)0x00001000 // UART2 Clock Gate Control -#define SIM_SCGC4_UART1 (uint32_t)0x00000800 // UART1 Clock Gate Control -#define SIM_SCGC4_UART0 (uint32_t)0x00000400 // UART0 Clock Gate Control -#define SIM_SCGC4_I2C1 (uint32_t)0x00000080 // I2C1 Clock Gate Control -#define SIM_SCGC4_I2C0 (uint32_t)0x00000040 // I2C0 Clock Gate Control -#define SIM_SCGC4_CMT (uint32_t)0x00000004 // CMT Clock Gate Control -#define SIM_SCGC4_EWM (uint32_t)0x00000002 // EWM Clock Gate Control -#define SIM_SCGC5 *(volatile uint32_t *)0x40048038 // System Clock Gating Control Register 5 -#define SIM_SCGC5_PORTE (uint32_t)0x00002000 // Port E Clock Gate Control -#define SIM_SCGC5_PORTD (uint32_t)0x00001000 // Port D Clock Gate Control -#define SIM_SCGC5_PORTC (uint32_t)0x00000800 // Port C Clock Gate Control -#define SIM_SCGC5_PORTB (uint32_t)0x00000400 // Port B Clock Gate Control -#define SIM_SCGC5_PORTA (uint32_t)0x00000200 // Port A Clock Gate Control -#define SIM_SCGC5_TSI (uint32_t)0x00000020 // Touch Sense Input TSI Clock Gate Control -#define SIM_SCGC5_LPTIMER (uint32_t)0x00000001 // Low Power Timer Access Control -#define SIM_SCGC6 *(volatile uint32_t *)0x4004803C // System Clock Gating Control Register 6 -#define SIM_SCGC6_RTC (uint32_t)0x20000000 // RTC Access -#define SIM_SCGC6_ADC0 (uint32_t)0x08000000 // ADC0 Clock Gate Control -#define SIM_SCGC6_FTM1 (uint32_t)0x02000000 // FTM1 Clock Gate Control -#define SIM_SCGC6_FTM0 (uint32_t)0x01000000 // FTM0 Clock Gate Control -#define SIM_SCGC6_PIT (uint32_t)0x00800000 // PIT Clock Gate Control -#define SIM_SCGC6_PDB (uint32_t)0x00400000 // PDB Clock Gate Control -#define SIM_SCGC6_USBDCD (uint32_t)0x00200000 // USB DCD Clock Gate Control -#define SIM_SCGC6_CRC (uint32_t)0x00040000 // CRC Clock Gate Control -#define SIM_SCGC6_I2S (uint32_t)0x00008000 // I2S Clock Gate Control -#define SIM_SCGC6_SPI1 (uint32_t)0x00002000 // SPI1 Clock Gate Control -#define SIM_SCGC6_SPI0 (uint32_t)0x00001000 // SPI0 Clock Gate Control -#define SIM_SCGC6_FLEXCAN0 (uint32_t)0x00000010 // FlexCAN0 Clock Gate Control -#define SIM_SCGC6_DMAMUX (uint32_t)0x00000002 // DMA Mux Clock Gate Control -#define SIM_SCGC6_FTFL (uint32_t)0x00000001 // Flash Memory Clock Gate Control -#define SIM_SCGC7 *(volatile uint32_t *)0x40048040 // System Clock Gating Control Register 7 -#define SIM_SCGC7_DMA (uint32_t)0x00000002 // DMA Clock Gate Control -#define SIM_CLKDIV1 *(volatile uint32_t *)0x40048044 // System Clock Divider Register 1 -#define SIM_CLKDIV1_OUTDIV1(n) (uint32_t)(((n) & 0x0F) << 28) // divide value for the core/system clock -#define SIM_CLKDIV1_OUTDIV2(n) (uint32_t)(((n) & 0x0F) << 24) // divide value for the peripheral clock -#define SIM_CLKDIV1_OUTDIV4(n) (uint32_t)(((n) & 0x0F) << 16) // divide value for the flash clock -#define SIM_CLKDIV2 *(volatile uint32_t *)0x40048048 // System Clock Divider Register 2 -#define SIM_CLKDIV2_USBDIV(n) (uint32_t)(((n) & 0x07) << 1) -#define SIM_CLKDIV2_USBFRAC (uint32_t)0x01 -#define SIM_FCFG1 *(const uint32_t *)0x4004804C // Flash Configuration Register 1 -#define SIM_FCFG2 *(const uint32_t *)0x40048050 // Flash Configuration Register 2 -#define SIM_UIDH *(const uint32_t *)0x40048054 // Unique Identification Register High -#define SIM_UIDMH *(const uint32_t *)0x40048058 // Unique Identification Register Mid-High -#define SIM_UIDML *(const uint32_t *)0x4004805C // Unique Identification Register Mid Low -#define SIM_UIDL *(const uint32_t *)0x40048060 // Unique Identification Register Low - -// Chapter 13: Reset Control Module (RCM) -#define RCM_SRS0 *(volatile uint8_t *)0x4007F000 // System Reset Status Register 0 -#define RCM_SRS1 *(volatile uint8_t *)0x4007F001 // System Reset Status Register 1 -#define RCM_RPFC *(volatile uint8_t *)0x4007F004 // Reset Pin Filter Control Register -#define RCM_RPFW *(volatile uint8_t *)0x4007F005 // Reset Pin Filter Width Register -#define RCM_MR *(volatile uint8_t *)0x4007F007 // Mode Register - -// Chapter 14: System Mode Controller -#define SMC_PMPROT *(volatile uint8_t *)0x4007E000 // Power Mode Protection Register -#define SMC_PMPROT_AVLP (uint8_t)0x20 // Allow very low power modes -#define SMC_PMPROT_ALLS (uint8_t)0x08 // Allow low leakage stop mode -#define SMC_PMPROT_AVLLS (uint8_t)0x02 // Allow very low leakage stop mode -#define SMC_PMCTRL *(volatile uint8_t *)0x4007E001 // Power Mode Control Register -#define SMC_PMCTRL_LPWUI (uint8_t)0x80 // Low Power Wake Up on Interrupt -#define SMC_PMCTRL_RUNM(n) (uint8_t)(((n) & 0x03) << 5) // Run Mode Control -#define SMC_PMCTRL_STOPA (uint8_t)0x08 // Stop Aborted -#define SMC_PMCTRL_STOPM(n) (uint8_t)((n) & 0x07) // Stop Mode Control -#define SMC_VLLSCTRL *(volatile uint8_t *)0x4007E002 // VLLS Control Register -#define SMC_VLLSCTRL_PORPO (uint8_t)0x20 // POR Power Option -#define SMC_VLLSCTRL_VLLSM(n) (uint8_t)((n) & 0x07) // VLLS Mode Control -#define SMC_PMSTAT *(volatile uint8_t *)0x4007E003 // Power Mode Status Register -#define SMC_PMSTAT_RUN (uint8_t)0x01 // Current power mode is RUN -#define SMC_PMSTAT_STOP (uint8_t)0x02 // Current power mode is STOP -#define SMC_PMSTAT_VLPR (uint8_t)0x04 // Current power mode is VLPR -#define SMC_PMSTAT_VLPW (uint8_t)0x08 // Current power mode is VLPW -#define SMC_PMSTAT_VLPS (uint8_t)0x10 // Current power mode is VLPS -#define SMC_PMSTAT_LLS (uint8_t)0x20 // Current power mode is LLS -#define SMC_PMSTAT_VLLS (uint8_t)0x40 // Current power mode is VLLS - -// Chapter 15: Power Management Controller -#define PMC_LVDSC1 *(volatile uint8_t *)0x4007D000 // Low Voltage Detect Status And Control 1 register -#define PMC_LVDSC1_LVDF (uint8_t)0x80 // Low-Voltage Detect Flag -#define PMC_LVDSC1_LVDACK (uint8_t)0x40 // Low-Voltage Detect Acknowledge -#define PMC_LVDSC1_LVDIE (uint8_t)0x20 // Low-Voltage Detect Interrupt Enable -#define PMC_LVDSC1_LVDRE (uint8_t)0x10 // Low-Voltage Detect Reset Enable -#define PMC_LVDSC1_LVDV(n) (uint8_t)((n) & 0x03) // Low-Voltage Detect Voltage Select -#define PMC_LVDSC2 *(volatile uint8_t *)0x4007D001 // Low Voltage Detect Status And Control 2 register -#define PMC_LVDSC2_LVWF (uint8_t)0x80 // Low-Voltage Warning Flag -#define PMC_LVDSC2_LVWACK (uint8_t)0x40 // Low-Voltage Warning Acknowledge -#define PMC_LVDSC2_LVWIE (uint8_t)0x20 // Low-Voltage Warning Interrupt Enable -#define PMC_LVDSC2_LVWV(n) (uint8_t)((n) & 0x03) // Low-Voltage Warning Voltage Select -#define PMC_REGSC *(volatile uint8_t *)0x4007D002 // Regulator Status And Control register -#define PMC_REGSC_BGEN (uint8_t)0x10 // Bandgap Enable In VLPx Operation -#define PMC_REGSC_ACKISO (uint8_t)0x08 // Acknowledge Isolation -#define PMC_REGSC_REGONS (uint8_t)0x04 // Regulator In Run Regulation Status -#define PMC_REGSC_BGBE (uint8_t)0x01 // Bandgap Buffer Enable - -// Chapter 16: Low-Leakage Wakeup Unit (LLWU) -#define LLWU_PE1 *(volatile uint8_t *)0x4007C000 // LLWU Pin Enable 1 register -#define LLWU_PE2 *(volatile uint8_t *)0x4007C001 // LLWU Pin Enable 2 register -#define LLWU_PE3 *(volatile uint8_t *)0x4007C002 // LLWU Pin Enable 3 register -#define LLWU_PE4 *(volatile uint8_t *)0x4007C003 // LLWU Pin Enable 4 register -#define LLWU_ME *(volatile uint8_t *)0x4007C004 // LLWU Module Enable register -#define LLWU_F1 *(volatile uint8_t *)0x4007C005 // LLWU Flag 1 register -#define LLWU_F2 *(volatile uint8_t *)0x4007C006 // LLWU Flag 2 register -#define LLWU_F3 *(volatile uint8_t *)0x4007C007 // LLWU Flag 3 register -#define LLWU_FILT1 *(volatile uint8_t *)0x4007C008 // LLWU Pin Filter 1 register -#define LLWU_FILT2 *(volatile uint8_t *)0x4007C009 // LLWU Pin Filter 2 register -#define LLWU_RST *(volatile uint8_t *)0x4007C00A // LLWU Reset Enable register - -// Chapter 17: Miscellaneous Control Module (MCM) -#define MCM_PLASC *(volatile uint16_t *)0xE0080008 // Crossbar Switch (AXBS) Slave Configuration -#define MCM_PLAMC *(volatile uint16_t *)0xE008000A // Crossbar Switch (AXBS) Master Configuration -#define MCM_PLACR *(volatile uint32_t *)0xE008000C // Crossbar Switch (AXBS) Control Register (MK20DX128) -#define MCM_PLACR_ARG (uint32_t)0x00000200 // Arbitration select, 0=fixed, 1=round-robin -#define MCM_CR *(volatile uint32_t *)0xE008000C // RAM arbitration control register (MK20DX256) -#define MCM_CR_SRAMLWP (uint32_t)0x40000000 // SRAM_L write protect -#define MCM_CR_SRAMLAP(n) (uint32_t)(((n) & 0x03) << 28) // SRAM_L priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA -#define MCM_CR_SRAMUWP (uint32_t)0x04000000 // SRAM_U write protect -#define MCM_CR_SRAMUAP(n) (uint32_t)(((n) & 0x03) << 24) // SRAM_U priority, 0=RR, 1=favor DMA, 2=CPU, 3=DMA - -// Crossbar Switch (AXBS) - only programmable on MK20DX256 -#define AXBS_PRS0 *(volatile uint32_t *)0x40004000 // Priority Registers Slave 0 -#define AXBS_CRS0 *(volatile uint32_t *)0x40004010 // Control Register 0 -#define AXBS_PRS1 *(volatile uint32_t *)0x40004100 // Priority Registers Slave 1 -#define AXBS_CRS1 *(volatile uint32_t *)0x40004110 // Control Register 1 -#define AXBS_PRS2 *(volatile uint32_t *)0x40004200 // Priority Registers Slave 2 -#define AXBS_CRS2 *(volatile uint32_t *)0x40004210 // Control Register 2 -#define AXBS_PRS3 *(volatile uint32_t *)0x40004300 // Priority Registers Slave 3 -#define AXBS_CRS3 *(volatile uint32_t *)0x40004310 // Control Register 3 -#define AXBS_PRS4 *(volatile uint32_t *)0x40004400 // Priority Registers Slave 4 -#define AXBS_CRS4 *(volatile uint32_t *)0x40004410 // Control Register 4 -#define AXBS_PRS5 *(volatile uint32_t *)0x40004500 // Priority Registers Slave 5 -#define AXBS_CRS5 *(volatile uint32_t *)0x40004510 // Control Register 5 -#define AXBS_PRS6 *(volatile uint32_t *)0x40004600 // Priority Registers Slave 6 -#define AXBS_CRS6 *(volatile uint32_t *)0x40004610 // Control Register 6 -#define AXBS_PRS7 *(volatile uint32_t *)0x40004700 // Priority Registers Slave 7 -#define AXBS_CRS7 *(volatile uint32_t *)0x40004710 // Control Register 7 -#define AXBS_MGPCR0 *(volatile uint32_t *)0x40004800 // Master 0 General Purpose Control Register -#define AXBS_MGPCR1 *(volatile uint32_t *)0x40004900 // Master 1 General Purpose Control Register -#define AXBS_MGPCR2 *(volatile uint32_t *)0x40004A00 // Master 2 General Purpose Control Register -#define AXBS_MGPCR3 *(volatile uint32_t *)0x40004B00 // Master 3 General Purpose Control Register -#define AXBS_MGPCR4 *(volatile uint32_t *)0x40004C00 // Master 4 General Purpose Control Register -#define AXBS_MGPCR5 *(volatile uint32_t *)0x40004D00 // Master 5 General Purpose Control Register -#define AXBS_MGPCR6 *(volatile uint32_t *)0x40004E00 // Master 6 General Purpose Control Register -#define AXBS_MGPCR7 *(volatile uint32_t *)0x40004F00 // Master 7 General Purpose Control Register -#define AXBS_CRS_READONLY (uint32_t)0x80000000 -#define AXBS_CRS_HALTLOWPRIORITY (uint32_t)0x40000000 -#define AXBS_CRS_ARB_FIXED (uint32_t)0x00000000 -#define AXBS_CRS_ARB_ROUNDROBIN (uint32_t)0x00010000 -#define AXBS_CRS_PARK_FIXED (uint32_t)0x00000000 -#define AXBS_CRS_PARK_PREVIOUS (uint32_t)0x00000010 -#define AXBS_CRS_PARK_NONE (uint32_t)0x00000020 -#define AXBS_CRS_PARK(n) (uint32_t)(((n) & 7) << 0) - - - -// Chapter 20: Direct Memory Access Multiplexer (DMAMUX) -#define DMAMUX0_CHCFG0 *(volatile uint8_t *)0x40021000 // Channel Configuration register -#define DMAMUX0_CHCFG1 *(volatile uint8_t *)0x40021001 // Channel Configuration register -#define DMAMUX0_CHCFG2 *(volatile uint8_t *)0x40021002 // Channel Configuration register -#define DMAMUX0_CHCFG3 *(volatile uint8_t *)0x40021003 // Channel Configuration register -#define DMAMUX0_CHCFG4 *(volatile uint8_t *)0x40021004 // Channel Configuration register -#define DMAMUX0_CHCFG5 *(volatile uint8_t *)0x40021005 // Channel Configuration register -#define DMAMUX0_CHCFG6 *(volatile uint8_t *)0x40021006 // Channel Configuration register -#define DMAMUX0_CHCFG7 *(volatile uint8_t *)0x40021007 // Channel Configuration register -#define DMAMUX0_CHCFG8 *(volatile uint8_t *)0x40021008 // Channel Configuration register -#define DMAMUX0_CHCFG9 *(volatile uint8_t *)0x40021009 // Channel Configuration register -#define DMAMUX0_CHCFG10 *(volatile uint8_t *)0x4002100A // Channel Configuration register -#define DMAMUX0_CHCFG11 *(volatile uint8_t *)0x4002100B // Channel Configuration register -#define DMAMUX0_CHCFG12 *(volatile uint8_t *)0x4002100C // Channel Configuration register -#define DMAMUX0_CHCFG13 *(volatile uint8_t *)0x4002100D // Channel Configuration register -#define DMAMUX0_CHCFG14 *(volatile uint8_t *)0x4002100E // Channel Configuration register -#define DMAMUX0_CHCFG15 *(volatile uint8_t *)0x4002100F // Channel Configuration register -#define DMAMUX_DISABLE 0 -#define DMAMUX_TRIG 64 -#define DMAMUX_ENABLE 128 -#define DMAMUX_SOURCE_UART0_RX 2 -#define DMAMUX_SOURCE_UART0_TX 3 -#define DMAMUX_SOURCE_UART1_RX 4 -#define DMAMUX_SOURCE_UART1_TX 5 -#define DMAMUX_SOURCE_UART2_RX 6 -#define DMAMUX_SOURCE_UART2_TX 7 -#define DMAMUX_SOURCE_I2S0_RX 14 -#define DMAMUX_SOURCE_I2S0_TX 15 -#define DMAMUX_SOURCE_SPI0_RX 16 -#define DMAMUX_SOURCE_SPI0_TX 17 -#define DMAMUX_SOURCE_I2C0 22 -#define DMAMUX_SOURCE_I2C1 23 -#define DMAMUX_SOURCE_FTM0_CH0 24 -#define DMAMUX_SOURCE_FTM0_CH1 25 -#define DMAMUX_SOURCE_FTM0_CH2 26 -#define DMAMUX_SOURCE_FTM0_CH3 27 -#define DMAMUX_SOURCE_FTM0_CH4 28 -#define DMAMUX_SOURCE_FTM0_CH5 29 -#define DMAMUX_SOURCE_FTM0_CH6 30 -#define DMAMUX_SOURCE_FTM0_CH7 31 -#define DMAMUX_SOURCE_FTM1_CH0 32 -#define DMAMUX_SOURCE_FTM1_CH1 33 -#define DMAMUX_SOURCE_FTM2_CH0 34 -#define DMAMUX_SOURCE_FTM2_CH1 35 -#define DMAMUX_SOURCE_ADC0 40 -#define DMAMUX_SOURCE_ADC1 41 -#define DMAMUX_SOURCE_CMP0 42 -#define DMAMUX_SOURCE_CMP1 43 -#define DMAMUX_SOURCE_CMP2 44 -#define DMAMUX_SOURCE_DAC0 45 -#define DMAMUX_SOURCE_CMT 47 -#define DMAMUX_SOURCE_PDB 48 -#define DMAMUX_SOURCE_PORTA 49 -#define DMAMUX_SOURCE_PORTB 50 -#define DMAMUX_SOURCE_PORTC 51 -#define DMAMUX_SOURCE_PORTD 52 -#define DMAMUX_SOURCE_PORTE 53 -#define DMAMUX_SOURCE_ALWAYS0 54 -#define DMAMUX_SOURCE_ALWAYS1 55 -#define DMAMUX_SOURCE_ALWAYS2 56 -#define DMAMUX_SOURCE_ALWAYS3 57 -#define DMAMUX_SOURCE_ALWAYS4 58 -#define DMAMUX_SOURCE_ALWAYS5 59 -#define DMAMUX_SOURCE_ALWAYS6 60 -#define DMAMUX_SOURCE_ALWAYS7 61 -#define DMAMUX_SOURCE_ALWAYS8 62 -#define DMAMUX_SOURCE_ALWAYS9 63 - -// Chapter 21: Direct Memory Access Controller (eDMA) -#define DMA_CR *(volatile uint32_t *)0x40008000 // Control Register -#define DMA_CR_CX ((uint32_t)(1<<17)) // Cancel Transfer -#define DMA_CR_ECX ((uint32_t)(1<<16)) // Error Cancel Transfer -#define DMA_CR_EMLM ((uint32_t)0x80) // Enable Minor Loop Mapping -#define DMA_CR_CLM ((uint32_t)0x40) // Continuous Link Mode -#define DMA_CR_HALT ((uint32_t)0x20) // Halt DMA Operations -#define DMA_CR_HOE ((uint32_t)0x10) // Halt On Error -#define DMA_CR_ERCA ((uint32_t)0x04) // Enable Round Robin Channel Arbitration -#define DMA_CR_EDBG ((uint32_t)0x02) // Enable Debug -#define DMA_ES *(volatile uint32_t *)0x40008004 // Error Status Register -#define DMA_ERQ *(volatile uint32_t *)0x4000800C // Enable Request Register -#define DMA_ERQ_ERQ0 ((uint32_t)1<<0) // Enable DMA Request 0 -#define DMA_ERQ_ERQ1 ((uint32_t)1<<1) // Enable DMA Request 1 -#define DMA_ERQ_ERQ2 ((uint32_t)1<<2) // Enable DMA Request 2 -#define DMA_ERQ_ERQ3 ((uint32_t)1<<3) // Enable DMA Request 3 -#define DMA_ERQ_ERQ4 ((uint32_t)1<<4) // Enable DMA Request 4 -#define DMA_ERQ_ERQ5 ((uint32_t)1<<5) // Enable DMA Request 5 -#define DMA_ERQ_ERQ6 ((uint32_t)1<<6) // Enable DMA Request 6 -#define DMA_ERQ_ERQ7 ((uint32_t)1<<7) // Enable DMA Request 7 -#define DMA_ERQ_ERQ8 ((uint32_t)1<<8) // Enable DMA Request 8 -#define DMA_ERQ_ERQ9 ((uint32_t)1<<9) // Enable DMA Request 9 -#define DMA_ERQ_ERQ10 ((uint32_t)1<<10) // Enable DMA Request 10 -#define DMA_ERQ_ERQ11 ((uint32_t)1<<11) // Enable DMA Request 11 -#define DMA_ERQ_ERQ12 ((uint32_t)1<<12) // Enable DMA Request 12 -#define DMA_ERQ_ERQ13 ((uint32_t)1<<13) // Enable DMA Request 13 -#define DMA_ERQ_ERQ14 ((uint32_t)1<<14) // Enable DMA Request 14 -#define DMA_ERQ_ERQ15 ((uint32_t)1<<15) // Enable DMA Request 15 -#define DMA_EEI *(volatile uint32_t *)0x40008014 // Enable Error Interrupt Register -#define DMA_EEI_EEI0 ((uint32_t)1<<0) // Enable Error Interrupt 0 -#define DMA_EEI_EEI1 ((uint32_t)1<<1) // Enable Error Interrupt 1 -#define DMA_EEI_EEI2 ((uint32_t)1<<2) // Enable Error Interrupt 2 -#define DMA_EEI_EEI3 ((uint32_t)1<<3) // Enable Error Interrupt 3 -#define DMA_EEI_EEI4 ((uint32_t)1<<4) // Enable Error Interrupt 4 -#define DMA_EEI_EEI5 ((uint32_t)1<<5) // Enable Error Interrupt 5 -#define DMA_EEI_EEI6 ((uint32_t)1<<6) // Enable Error Interrupt 6 -#define DMA_EEI_EEI7 ((uint32_t)1<<7) // Enable Error Interrupt 7 -#define DMA_EEI_EEI8 ((uint32_t)1<<8) // Enable Error Interrupt 8 -#define DMA_EEI_EEI9 ((uint32_t)1<<9) // Enable Error Interrupt 9 -#define DMA_EEI_EEI10 ((uint32_t)1<<10) // Enable Error Interrupt 10 -#define DMA_EEI_EEI11 ((uint32_t)1<<11) // Enable Error Interrupt 11 -#define DMA_EEI_EEI12 ((uint32_t)1<<12) // Enable Error Interrupt 12 -#define DMA_EEI_EEI13 ((uint32_t)1<<13) // Enable Error Interrupt 13 -#define DMA_EEI_EEI14 ((uint32_t)1<<14) // Enable Error Interrupt 14 -#define DMA_EEI_EEI15 ((uint32_t)1<<15) // Enable Error Interrupt 15 -#define DMA_CEEI *(volatile uint8_t *)0x40008018 // Clear Enable Error Interrupt Register -#define DMA_CEEI_CEEI(n) ((uint8_t)(n & 15)<<0) // Clear Enable Error Interrupt -#define DMA_CEEI_CAEE ((uint8_t)1<<6) // Clear All Enable Error Interrupts -#define DMA_CEEI_NOP ((uint8_t)1<<7) // NOP -#define DMA_SEEI *(volatile uint8_t *)0x40008019 // Set Enable Error Interrupt Register -#define DMA_SEEI_SEEI(n) ((uint8_t)(n & 15)<<0) // Set Enable Error Interrupt -#define DMA_SEEI_SAEE ((uint8_t)1<<6) // Set All Enable Error Interrupts -#define DMA_SEEI_NOP ((uint8_t)1<<7) // NOP -#define DMA_CERQ *(volatile uint8_t *)0x4000801A // Clear Enable Request Register -#define DMA_CERQ_CERQ(n) ((uint8_t)(n & 15)<<0) // Clear Enable Request -#define DMA_CERQ_CAER ((uint8_t)1<<6) // Clear All Enable Requests -#define DMA_CERQ_NOP ((uint8_t)1<<7) // NOP -#define DMA_SERQ *(volatile uint8_t *)0x4000801B // Set Enable Request Register -#define DMA_SERQ_SERQ(n) ((uint8_t)(n & 15)<<0) // Set Enable Request -#define DMA_SERQ_SAER ((uint8_t)1<<6) // Set All Enable Requests -#define DMA_SERQ_NOP ((uint8_t)1<<7) // NOP -#define DMA_CDNE *(volatile uint8_t *)0x4000801C // Clear DONE Status Bit Register -#define DMA_CDNE_CDNE(n) ((uint8_t)(n & 15)<<0) // Clear Done Bit -#define DMA_CDNE_CADN ((uint8_t)1<<6) // Clear All Done Bits -#define DMA_CDNE_NOP ((uint8_t)1<<7) // NOP -#define DMA_SSRT *(volatile uint8_t *)0x4000801D // Set START Bit Register -#define DMA_SSRT_SSRT(n) ((uint8_t)(n & 15)<<0) // Set Start Bit -#define DMA_SSRT_SAST ((uint8_t)1<<6) // Set All Start Bits -#define DMA_SSRT_NOP ((uint8_t)1<<7) // NOP -#define DMA_CERR *(volatile uint8_t *)0x4000801E // Clear Error Register -#define DMA_CERR_CERR(n) ((uint8_t)(n & 15)<<0) // Clear Error Indicator -#define DMA_CERR_CAEI ((uint8_t)1<<6) // Clear All Error Indicators -#define DMA_CERR_NOP ((uint8_t)1<<7) // NOP -#define DMA_CINT *(volatile uint8_t *)0x4000801F // Clear Interrupt Request Register -#define DMA_CINT_CINT(n) ((uint8_t)(n & 15)<<0) // Clear Interrupt Request -#define DMA_CINT_CAIR ((uint8_t)1<<6) // Clear All Interrupt Requests -#define DMA_CINT_NOP ((uint8_t)1<<7) // NOP -#define DMA_INT *(volatile uint32_t *)0x40008024 // Interrupt Request Register -#define DMA_INT_INT0 ((uint32_t)1<<0) // Interrupt Request 0 -#define DMA_INT_INT1 ((uint32_t)1<<1) // Interrupt Request 1 -#define DMA_INT_INT2 ((uint32_t)1<<2) // Interrupt Request 2 -#define DMA_INT_INT3 ((uint32_t)1<<3) // Interrupt Request 3 -#define DMA_INT_INT4 ((uint32_t)1<<4) // Interrupt Request 4 -#define DMA_INT_INT5 ((uint32_t)1<<5) // Interrupt Request 5 -#define DMA_INT_INT6 ((uint32_t)1<<6) // Interrupt Request 6 -#define DMA_INT_INT7 ((uint32_t)1<<7) // Interrupt Request 7 -#define DMA_INT_INT8 ((uint32_t)1<<8) // Interrupt Request 8 -#define DMA_INT_INT9 ((uint32_t)1<<9) // Interrupt Request 9 -#define DMA_INT_INT10 ((uint32_t)1<<10) // Interrupt Request 10 -#define DMA_INT_INT11 ((uint32_t)1<<11) // Interrupt Request 11 -#define DMA_INT_INT12 ((uint32_t)1<<12) // Interrupt Request 12 -#define DMA_INT_INT13 ((uint32_t)1<<13) // Interrupt Request 13 -#define DMA_INT_INT14 ((uint32_t)1<<14) // Interrupt Request 14 -#define DMA_INT_INT15 ((uint32_t)1<<15) // Interrupt Request 15 -#define DMA_ERR *(volatile uint32_t *)0x4000802C // Error Register -#define DMA_ERR_ERR0 ((uint32_t)1<<0) // Error in Channel 0 -#define DMA_ERR_ERR1 ((uint32_t)1<<1) // Error in Channel 1 -#define DMA_ERR_ERR2 ((uint32_t)1<<2) // Error in Channel 2 -#define DMA_ERR_ERR3 ((uint32_t)1<<3) // Error in Channel 3 -#define DMA_ERR_ERR4 ((uint32_t)1<<4) // Error in Channel 4 -#define DMA_ERR_ERR5 ((uint32_t)1<<5) // Error in Channel 5 -#define DMA_ERR_ERR6 ((uint32_t)1<<6) // Error in Channel 6 -#define DMA_ERR_ERR7 ((uint32_t)1<<7) // Error in Channel 7 -#define DMA_ERR_ERR8 ((uint32_t)1<<8) // Error in Channel 8 -#define DMA_ERR_ERR9 ((uint32_t)1<<9) // Error in Channel 9 -#define DMA_ERR_ERR10 ((uint32_t)1<<10) // Error in Channel 10 -#define DMA_ERR_ERR11 ((uint32_t)1<<11) // Error in Channel 11 -#define DMA_ERR_ERR12 ((uint32_t)1<<12) // Error in Channel 12 -#define DMA_ERR_ERR13 ((uint32_t)1<<13) // Error in Channel 13 -#define DMA_ERR_ERR14 ((uint32_t)1<<14) // Error in Channel 14 -#define DMA_ERR_ERR15 ((uint32_t)1<<15) // Error in Channel 15 -#define DMA_HRS *(volatile uint32_t *)0x40008034 // Hardware Request Status Register -#define DMA_HRS_HRS0 ((uint32_t)1<<0) // Hardware Request Status Channel 0 -#define DMA_HRS_HRS1 ((uint32_t)1<<1) // Hardware Request Status Channel 1 -#define DMA_HRS_HRS2 ((uint32_t)1<<2) // Hardware Request Status Channel 2 -#define DMA_HRS_HRS3 ((uint32_t)1<<3) // Hardware Request Status Channel 3 -#define DMA_HRS_HRS4 ((uint32_t)1<<4) // Hardware Request Status Channel 4 -#define DMA_HRS_HRS5 ((uint32_t)1<<5) // Hardware Request Status Channel 5 -#define DMA_HRS_HRS6 ((uint32_t)1<<6) // Hardware Request Status Channel 6 -#define DMA_HRS_HRS7 ((uint32_t)1<<7) // Hardware Request Status Channel 7 -#define DMA_HRS_HRS8 ((uint32_t)1<<8) // Hardware Request Status Channel 8 -#define DMA_HRS_HRS9 ((uint32_t)1<<9) // Hardware Request Status Channel 9 -#define DMA_HRS_HRS10 ((uint32_t)1<<10) // Hardware Request Status Channel 10 -#define DMA_HRS_HRS11 ((uint32_t)1<<11) // Hardware Request Status Channel 11 -#define DMA_HRS_HRS12 ((uint32_t)1<<12) // Hardware Request Status Channel 12 -#define DMA_HRS_HRS13 ((uint32_t)1<<13) // Hardware Request Status Channel 13 -#define DMA_HRS_HRS14 ((uint32_t)1<<14) // Hardware Request Status Channel 14 -#define DMA_HRS_HRS15 ((uint32_t)1<<15) // Hardware Request Status Channel 15 -#define DMA_DCHPRI3 *(volatile uint8_t *)0x40008100 // Channel n Priority Register -#define DMA_DCHPRI2 *(volatile uint8_t *)0x40008101 // Channel n Priority Register -#define DMA_DCHPRI1 *(volatile uint8_t *)0x40008102 // Channel n Priority Register -#define DMA_DCHPRI0 *(volatile uint8_t *)0x40008103 // Channel n Priority Register -#define DMA_DCHPRI_CHPRI(n) ((uint8_t)(n & 15)<<0) // Channel Arbitration Priority -#define DMA_DCHPRI_DPA ((uint8_t)1<<6) // Disable PreEmpt Ability -#define DMA_DCHPRI_ECP ((uint8_t)1<<7) // Enable PreEmption -#define DMA_DCHPRI7 *(volatile uint8_t *)0x40008104 // Channel n Priority Register -#define DMA_DCHPRI6 *(volatile uint8_t *)0x40008105 // Channel n Priority Register -#define DMA_DCHPRI5 *(volatile uint8_t *)0x40008106 // Channel n Priority Register -#define DMA_DCHPRI4 *(volatile uint8_t *)0x40008107 // Channel n Priority Register -#define DMA_DCHPRI11 *(volatile uint8_t *)0x40008108 // Channel n Priority Register -#define DMA_DCHPRI10 *(volatile uint8_t *)0x40008109 // Channel n Priority Register -#define DMA_DCHPRI9 *(volatile uint8_t *)0x4000810A // Channel n Priority Register -#define DMA_DCHPRI8 *(volatile uint8_t *)0x4000810B // Channel n Priority Register -#define DMA_DCHPRI15 *(volatile uint8_t *)0x4000810C // Channel n Priority Register -#define DMA_DCHPRI14 *(volatile uint8_t *)0x4000810D // Channel n Priority Register -#define DMA_DCHPRI13 *(volatile uint8_t *)0x4000810E // Channel n Priority Register -#define DMA_DCHPRI12 *(volatile uint8_t *)0x4000810F // Channel n Priority Register - - -#define DMA_TCD_ATTR_SMOD(n) (((n) & 0x1F) << 11) -#define DMA_TCD_ATTR_SSIZE(n) (((n) & 0x7) << 8) -#define DMA_TCD_ATTR_DMOD(n) (((n) & 0x1F) << 3) -#define DMA_TCD_ATTR_DSIZE(n) (((n) & 0x7) << 0) -#define DMA_TCD_ATTR_SIZE_8BIT 0 -#define DMA_TCD_ATTR_SIZE_16BIT 1 -#define DMA_TCD_ATTR_SIZE_32BIT 2 -#define DMA_TCD_ATTR_SIZE_16BYTE 4 -#define DMA_TCD_ATTR_SIZE_32BYTE 5 -#define DMA_TCD_CSR_BWC(n) (((n) & 0x3) << 14) -#define DMA_TCD_CSR_MAJORLINKCH(n) (((n) & 0x3) << 8) -#define DMA_TCD_CSR_DONE 0x0080 -#define DMA_TCD_CSR_ACTIVE 0x0040 -#define DMA_TCD_CSR_MAJORELINK 0x0020 -#define DMA_TCD_CSR_ESG 0x0010 -#define DMA_TCD_CSR_DREQ 0x0008 -#define DMA_TCD_CSR_INTHALF 0x0004 -#define DMA_TCD_CSR_INTMAJOR 0x0002 -#define DMA_TCD_CSR_START 0x0001 -#define DMA_TCD_CITER_MASK ((uint16_t)0x7FFF) // Loop count mask -#define DMA_TCD_CITER_ELINK ((uint16_t)1<<15) // Enable channel linking on minor-loop complete -#define DMA_TCD_BITER_MASK ((uint16_t)0x7FFF) // Loop count mask -#define DMA_TCD_BITER_ELINK ((uint16_t)1<<15) // Enable channel linking on minor-loop complete -#define DMA_TCD_NBYTES_SMLOE ((uint32_t)1<<31) // Source Minor Loop Offset Enable -#define DMA_TCD_NBYTES_DMLOE ((uint32_t)1<<30) // Destination Minor Loop Offset Enable -#define DMA_TCD_NBYTES_MLOFFNO_NBYTES(n) ((uint32_t)(n)) // NBytes transfer count when minor loop disabled -#define DMA_TCD_NBYTES_MLOFFYES_NBYTES(n) ((uint32_t)(n & 0x1F)) // NBytes transfer count when minor loop enabled -#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(n) ((uint32_t)(n & 0xFFFFF)<<10) // Offset - -#define DMA_TCD0_SADDR *(volatile const void * volatile *)0x40009000 // TCD Source Address -#define DMA_TCD0_SOFF *(volatile int16_t *)0x40009004 // TCD Signed Source Address Offset -#define DMA_TCD0_ATTR *(volatile uint16_t *)0x40009006 // TCD Transfer Attributes -#define DMA_TCD0_NBYTES_MLNO *(volatile uint32_t *)0x40009008 // TCD Minor Byte Count (Minor Loop Disabled) -#define DMA_TCD0_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop Enabled and Offset Disabled) -#define DMA_TCD0_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009008 // TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled) -#define DMA_TCD0_SLAST *(volatile int32_t *)0x4000900C // TCD Last Source Address Adjustment -#define DMA_TCD0_DADDR *(volatile void * volatile *)0x40009010 // TCD Destination Address -#define DMA_TCD0_DOFF *(volatile int16_t *)0x40009014 // TCD Signed Destination Address Offset -#define DMA_TCD0_CITER_ELINKYES *(volatile uint16_t *)0x40009016 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD0_CITER_ELINKNO *(volatile uint16_t *)0x40009016 // ?? -#define DMA_TCD0_DLASTSGA *(volatile int32_t *)0x40009018 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD0_CSR *(volatile uint16_t *)0x4000901C // TCD Control and Status -#define DMA_TCD0_BITER_ELINKYES *(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD0_BITER_ELINKNO *(volatile uint16_t *)0x4000901E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD1_SADDR *(volatile const void * volatile *)0x40009020 // TCD Source Address -#define DMA_TCD1_SOFF *(volatile int16_t *)0x40009024 // TCD Signed Source Address Offset -#define DMA_TCD1_ATTR *(volatile uint16_t *)0x40009026 // TCD Transfer Attributes -#define DMA_TCD1_NBYTES_MLNO *(volatile uint32_t *)0x40009028 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD1_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD1_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009028 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD1_SLAST *(volatile int32_t *)0x4000902C // TCD Last Source Address Adjustment -#define DMA_TCD1_DADDR *(volatile void * volatile *)0x40009030 // TCD Destination Address -#define DMA_TCD1_DOFF *(volatile int16_t *)0x40009034 // TCD Signed Destination Address Offset -#define DMA_TCD1_CITER_ELINKYES *(volatile uint16_t *)0x40009036 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD1_CITER_ELINKNO *(volatile uint16_t *)0x40009036 // ?? -#define DMA_TCD1_DLASTSGA *(volatile int32_t *)0x40009038 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD1_CSR *(volatile uint16_t *)0x4000903C // TCD Control and Status -#define DMA_TCD1_BITER_ELINKYES *(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count Channel Linking Enabled -#define DMA_TCD1_BITER_ELINKNO *(volatile uint16_t *)0x4000903E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD2_SADDR *(volatile const void * volatile *)0x40009040 // TCD Source Address -#define DMA_TCD2_SOFF *(volatile int16_t *)0x40009044 // TCD Signed Source Address Offset -#define DMA_TCD2_ATTR *(volatile uint16_t *)0x40009046 // TCD Transfer Attributes -#define DMA_TCD2_NBYTES_MLNO *(volatile uint32_t *)0x40009048 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD2_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD2_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009048 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD2_SLAST *(volatile int32_t *)0x4000904C // TCD Last Source Address Adjustment -#define DMA_TCD2_DADDR *(volatile void * volatile *)0x40009050 // TCD Destination Address -#define DMA_TCD2_DOFF *(volatile int16_t *)0x40009054 // TCD Signed Destination Address Offset -#define DMA_TCD2_CITER_ELINKYES *(volatile uint16_t *)0x40009056 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD2_CITER_ELINKNO *(volatile uint16_t *)0x40009056 // ?? -#define DMA_TCD2_DLASTSGA *(volatile int32_t *)0x40009058 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD2_CSR *(volatile uint16_t *)0x4000905C // TCD Control and Status -#define DMA_TCD2_BITER_ELINKYES *(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD2_BITER_ELINKNO *(volatile uint16_t *)0x4000905E // TCD Beginning Minor Loop Link, Major Loop Count, Channel Linking Disabled - -#define DMA_TCD3_SADDR *(volatile const void * volatile *)0x40009060 // TCD Source Address -#define DMA_TCD3_SOFF *(volatile int16_t *)0x40009064 // TCD Signed Source Address Offset -#define DMA_TCD3_ATTR *(volatile uint16_t *)0x40009066 // TCD Transfer Attributes -#define DMA_TCD3_NBYTES_MLNO *(volatile uint32_t *)0x40009068 // TCD Minor Byte Count, Minor Loop Disabled -#define DMA_TCD3_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop Enabled and Offset Disabled -#define DMA_TCD3_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009068 // TCD Signed Minor Loop Offset, Minor Loop and Offset Enabled -#define DMA_TCD3_SLAST *(volatile int32_t *)0x4000906C // TCD Last Source Address Adjustment -#define DMA_TCD3_DADDR *(volatile void * volatile *)0x40009070 // TCD Destination Address -#define DMA_TCD3_DOFF *(volatile int16_t *)0x40009074 // TCD Signed Destination Address Offset -#define DMA_TCD3_CITER_ELINKYES *(volatile uint16_t *)0x40009076 // TCD Current Minor Loop Link, Major Loop Count, Channel Linking Enabled -#define DMA_TCD3_CITER_ELINKNO *(volatile uint16_t *)0x40009076 // ?? -#define DMA_TCD3_DLASTSGA *(volatile int32_t *)0x40009078 // TCD Last Destination Address Adjustment/Scatter Gather Address -#define DMA_TCD3_CSR *(volatile uint16_t *)0x4000907C // TCD Control and Status -#define DMA_TCD3_BITER_ELINKYES *(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Enabled -#define DMA_TCD3_BITER_ELINKNO *(volatile uint16_t *)0x4000907E // TCD Beginning Minor Loop Link, Major Loop Count ,Channel Linking Disabled - -#define DMA_TCD4_SADDR *(volatile const void * volatile *)0x40009080 // TCD Source Addr -#define DMA_TCD4_SOFF *(volatile int16_t *)0x40009084 // TCD Signed Source Address Offset -#define DMA_TCD4_ATTR *(volatile uint16_t *)0x40009086 // TCD Transfer Attributes -#define DMA_TCD4_NBYTES_MLNO *(volatile uint32_t *)0x40009088 // TCD Minor Byte Count -#define DMA_TCD4_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset -#define DMA_TCD4_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009088 // TCD Signed Minor Loop Offset -#define DMA_TCD4_SLAST *(volatile int32_t *)0x4000908C // TCD Last Source Addr Adj. -#define DMA_TCD4_DADDR *(volatile void * volatile *)0x40009090 // TCD Destination Address -#define DMA_TCD4_DOFF *(volatile int16_t *)0x40009094 // TCD Signed Dest Address Offset -#define DMA_TCD4_CITER_ELINKYES *(volatile uint16_t *)0x40009096 // TCD Current Minor Loop Link -#define DMA_TCD4_CITER_ELINKNO *(volatile uint16_t *)0x40009096 // ?? -#define DMA_TCD4_DLASTSGA *(volatile int32_t *)0x40009098 // TCD Last Destination Addr Adj -#define DMA_TCD4_CSR *(volatile uint16_t *)0x4000909C // TCD Control and Status -#define DMA_TCD4_BITER_ELINKYES *(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link -#define DMA_TCD4_BITER_ELINKNO *(volatile uint16_t *)0x4000909E // TCD Beginning Minor Loop Link - -#define DMA_TCD5_SADDR *(volatile const void * volatile *)0x400090A0 // TCD Source Addr -#define DMA_TCD5_SOFF *(volatile int16_t *)0x400090A4 // TCD Signed Source Address Offset -#define DMA_TCD5_ATTR *(volatile uint16_t *)0x400090A6 // TCD Transfer Attributes -#define DMA_TCD5_NBYTES_MLNO *(volatile uint32_t *)0x400090A8 // TCD Minor Byte Count -#define DMA_TCD5_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset -#define DMA_TCD5_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090A8 // TCD Signed Minor Loop Offset -#define DMA_TCD5_SLAST *(volatile int32_t *)0x400090AC // TCD Last Source Addr Adj. -#define DMA_TCD5_DADDR *(volatile void * volatile *)0x400090B0 // TCD Destination Address -#define DMA_TCD5_DOFF *(volatile int16_t *)0x400090B4 // TCD Signed Dest Address Offset -#define DMA_TCD5_CITER_ELINKYES *(volatile uint16_t *)0x400090B6 // TCD Current Minor Loop Link -#define DMA_TCD5_CITER_ELINKNO *(volatile uint16_t *)0x400090B6 // ?? -#define DMA_TCD5_DLASTSGA *(volatile int32_t *)0x400090B8 // TCD Last Destination Addr Adj -#define DMA_TCD5_CSR *(volatile uint16_t *)0x400090BC // TCD Control and Status -#define DMA_TCD5_BITER_ELINKYES *(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link -#define DMA_TCD5_BITER_ELINKNO *(volatile uint16_t *)0x400090BE // TCD Beginning Minor Loop Link - -#define DMA_TCD6_SADDR *(volatile const void * volatile *)0x400090C0 // TCD Source Addr -#define DMA_TCD6_SOFF *(volatile int16_t *)0x400090C4 // TCD Signed Source Address Offset -#define DMA_TCD6_ATTR *(volatile uint16_t *)0x400090C6 // TCD Transfer Attributes -#define DMA_TCD6_NBYTES_MLNO *(volatile uint32_t *)0x400090C8 // TCD Minor Byte Count -#define DMA_TCD6_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset -#define DMA_TCD6_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090C8 // TCD Signed Minor Loop Offset -#define DMA_TCD6_SLAST *(volatile int32_t *)0x400090CC // TCD Last Source Addr Adj. -#define DMA_TCD6_DADDR *(volatile void * volatile *)0x400090D0 // TCD Destination Address -#define DMA_TCD6_DOFF *(volatile int16_t *)0x400090D4 // TCD Signed Dest Address Offset -#define DMA_TCD6_CITER_ELINKYES *(volatile uint16_t *)0x400090D6 // TCD Current Minor Loop Link -#define DMA_TCD6_CITER_ELINKNO *(volatile uint16_t *)0x400090D6 // ?? -#define DMA_TCD6_DLASTSGA *(volatile int32_t *)0x400090D8 // TCD Last Destination Addr Adj -#define DMA_TCD6_CSR *(volatile uint16_t *)0x400090DC // TCD Control and Status -#define DMA_TCD6_BITER_ELINKYES *(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link -#define DMA_TCD6_BITER_ELINKNO *(volatile uint16_t *)0x400090DE // TCD Beginning Minor Loop Link - -#define DMA_TCD7_SADDR *(volatile const void * volatile *)0x400090E0 // TCD Source Addr -#define DMA_TCD7_SOFF *(volatile int16_t *)0x400090E4 // TCD Signed Source Address Offset -#define DMA_TCD7_ATTR *(volatile uint16_t *)0x400090E6 // TCD Transfer Attributes -#define DMA_TCD7_NBYTES_MLNO *(volatile uint32_t *)0x400090E8 // TCD Minor Byte Count -#define DMA_TCD7_NBYTES_MLOFFNO *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset -#define DMA_TCD7_NBYTES_MLOFFYES *(volatile uint32_t *)0x400090E8 // TCD Signed Minor Loop Offset -#define DMA_TCD7_SLAST *(volatile int32_t *)0x400090EC // TCD Last Source Addr Adj. -#define DMA_TCD7_DADDR *(volatile void * volatile *)0x400090F0 // TCD Destination Address -#define DMA_TCD7_DOFF *(volatile int16_t *)0x400090F4 // TCD Signed Dest Address Offset -#define DMA_TCD7_CITER_ELINKYES *(volatile uint16_t *)0x400090F6 // TCD Current Minor Loop Link -#define DMA_TCD7_CITER_ELINKNO *(volatile uint16_t *)0x400090F6 // ?? -#define DMA_TCD7_DLASTSGA *(volatile int32_t *)0x400090F8 // TCD Last Destination Addr Adj -#define DMA_TCD7_CSR *(volatile uint16_t *)0x400090FC // TCD Control and Status -#define DMA_TCD7_BITER_ELINKYES *(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link -#define DMA_TCD7_BITER_ELINKNO *(volatile uint16_t *)0x400090FE // TCD Beginning Minor Loop Link - -#define DMA_TCD8_SADDR *(volatile const void * volatile *)0x40009100 // TCD Source Addr -#define DMA_TCD8_SOFF *(volatile int16_t *)0x40009104 // TCD Signed Source Address Offset -#define DMA_TCD8_ATTR *(volatile uint16_t *)0x40009106 // TCD Transfer Attributes -#define DMA_TCD8_NBYTES_MLNO *(volatile uint32_t *)0x40009108 // TCD Minor Byte Count -#define DMA_TCD8_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset -#define DMA_TCD8_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009108 // TCD Signed Minor Loop Offset -#define DMA_TCD8_SLAST *(volatile int32_t *)0x4000910C // TCD Last Source Addr Adj. -#define DMA_TCD8_DADDR *(volatile void * volatile *)0x40009110 // TCD Destination Address -#define DMA_TCD8_DOFF *(volatile int16_t *)0x40009114 // TCD Signed Dest Address Offset -#define DMA_TCD8_CITER_ELINKYES *(volatile uint16_t *)0x40009116 // TCD Current Minor Loop Link -#define DMA_TCD8_CITER_ELINKNO *(volatile uint16_t *)0x40009116 // ?? -#define DMA_TCD8_DLASTSGA *(volatile int32_t *)0x40009118 // TCD Last Destination Addr Adj -#define DMA_TCD8_CSR *(volatile uint16_t *)0x4000911C // TCD Control and Status -#define DMA_TCD8_BITER_ELINKYES *(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link -#define DMA_TCD8_BITER_ELINKNO *(volatile uint16_t *)0x4000911E // TCD Beginning Minor Loop Link - -#define DMA_TCD9_SADDR *(volatile const void * volatile *)0x40009120 // TCD Source Addr -#define DMA_TCD9_SOFF *(volatile int16_t *)0x40009124 // TCD Signed Source Address Offset -#define DMA_TCD9_ATTR *(volatile uint16_t *)0x40009126 // TCD Transfer Attributes -#define DMA_TCD9_NBYTES_MLNO *(volatile uint32_t *)0x40009128 // TCD Minor Byte Count -#define DMA_TCD9_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset -#define DMA_TCD9_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009128 // TCD Signed Minor Loop Offset -#define DMA_TCD9_SLAST *(volatile int32_t *)0x4000912C // TCD Last Source Addr Adj. -#define DMA_TCD9_DADDR *(volatile void * volatile *)0x40009130 // TCD Destination Address -#define DMA_TCD9_DOFF *(volatile int16_t *)0x40009134 // TCD Signed Dest Address Offset -#define DMA_TCD9_CITER_ELINKYES *(volatile uint16_t *)0x40009136 // TCD Current Minor Loop Link -#define DMA_TCD9_CITER_ELINKNO *(volatile uint16_t *)0x40009136 // ?? -#define DMA_TCD9_DLASTSGA *(volatile int32_t *)0x40009138 // TCD Last Destination Addr Adj -#define DMA_TCD9_CSR *(volatile uint16_t *)0x4000913C // TCD Control and Status -#define DMA_TCD9_BITER_ELINKYES *(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link -#define DMA_TCD9_BITER_ELINKNO *(volatile uint16_t *)0x4000913E // TCD Beginning Minor Loop Link - -#define DMA_TCD10_SADDR *(volatile const void * volatile *)0x40009140 // TCD Source Addr -#define DMA_TCD10_SOFF *(volatile int16_t *)0x40009144 // TCD Signed Source Address Offset -#define DMA_TCD10_ATTR *(volatile uint16_t *)0x40009146 // TCD Transfer Attributes -#define DMA_TCD10_NBYTES_MLNO *(volatile uint32_t *)0x40009148 // TCD Minor Byte Count -#define DMA_TCD10_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset -#define DMA_TCD10_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009148 // TCD Signed Minor Loop Offset -#define DMA_TCD10_SLAST *(volatile int32_t *)0x4000914C // TCD Last Source Addr Adj. -#define DMA_TCD10_DADDR *(volatile void * volatile *)0x40009150 // TCD Destination Address -#define DMA_TCD10_DOFF *(volatile int16_t *)0x40009154 // TCD Signed Dest Address Offset -#define DMA_TCD10_CITER_ELINKYES *(volatile uint16_t *)0x40009156 // TCD Current Minor Loop Link -#define DMA_TCD10_CITER_ELINKNO *(volatile uint16_t *)0x40009156 // ?? -#define DMA_TCD10_DLASTSGA *(volatile int32_t *)0x40009158 // TCD Last Destination Addr Adj -#define DMA_TCD10_CSR *(volatile uint16_t *)0x4000915C // TCD Control and Status -#define DMA_TCD10_BITER_ELINKYES *(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link -#define DMA_TCD10_BITER_ELINKNO *(volatile uint16_t *)0x4000915E // TCD Beginning Minor Loop Link - -#define DMA_TCD11_SADDR *(volatile const void * volatile *)0x40009160 // TCD Source Addr -#define DMA_TCD11_SOFF *(volatile int16_t *)0x40009164 // TCD Signed Source Address Offset -#define DMA_TCD11_ATTR *(volatile uint16_t *)0x40009166 // TCD Transfer Attributes -#define DMA_TCD11_NBYTES_MLNO *(volatile uint32_t *)0x40009168 // TCD Minor Byte Count -#define DMA_TCD11_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset -#define DMA_TCD11_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009168 // TCD Signed Minor Loop Offset -#define DMA_TCD11_SLAST *(volatile int32_t *)0x4000916C // TCD Last Source Addr Adj. -#define DMA_TCD11_DADDR *(volatile void * volatile *)0x40009170 // TCD Destination Address -#define DMA_TCD11_DOFF *(volatile int16_t *)0x40009174 // TCD Signed Dest Address Offset -#define DMA_TCD11_CITER_ELINKYES *(volatile uint16_t *)0x40009176 // TCD Current Minor Loop Link -#define DMA_TCD11_CITER_ELINKNO *(volatile uint16_t *)0x40009176 // ?? -#define DMA_TCD11_DLASTSGA *(volatile int32_t *)0x40009178 // TCD Last Destination Addr Adj -#define DMA_TCD11_CSR *(volatile uint16_t *)0x4000917C // TCD Control and Status -#define DMA_TCD11_BITER_ELINKYES *(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link -#define DMA_TCD11_BITER_ELINKNO *(volatile uint16_t *)0x4000917E // TCD Beginning Minor Loop Link - -#define DMA_TCD12_SADDR *(volatile const void * volatile *)0x40009180 // TCD Source Addr -#define DMA_TCD12_SOFF *(volatile int16_t *)0x40009184 // TCD Signed Source Address Offset -#define DMA_TCD12_ATTR *(volatile uint16_t *)0x40009186 // TCD Transfer Attributes -#define DMA_TCD12_NBYTES_MLNO *(volatile uint32_t *)0x40009188 // TCD Minor Byte Count -#define DMA_TCD12_NBYTES_MLOFFNO *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset -#define DMA_TCD12_NBYTES_MLOFFYES *(volatile uint32_t *)0x40009188 // TCD Signed Minor Loop Offset -#define DMA_TCD12_SLAST *(volatile int32_t *)0x4000918C // TCD Last Source Addr Adj. -#define DMA_TCD12_DADDR *(volatile void * volatile *)0x40009190 // TCD Destination Address -#define DMA_TCD12_DOFF *(volatile int16_t *)0x40009194 // TCD Signed Dest Address Offset -#define DMA_TCD12_CITER_ELINKYES *(volatile uint16_t *)0x40009196 // TCD Current Minor Loop Link -#define DMA_TCD12_CITER_ELINKNO *(volatile uint16_t *)0x40009196 // ?? -#define DMA_TCD12_DLASTSGA *(volatile int32_t *)0x40009198 // TCD Last Destination Addr Adj -#define DMA_TCD12_CSR *(volatile uint16_t *)0x4000919C // TCD Control and Status -#define DMA_TCD12_BITER_ELINKYES *(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link -#define DMA_TCD12_BITER_ELINKNO *(volatile uint16_t *)0x4000919E // TCD Beginning Minor Loop Link - -#define DMA_TCD13_SADDR *(volatile const void * volatile *)0x400091A0 // TCD Source Addr -#define DMA_TCD13_SOFF *(volatile int16_t *)0x400091A4 // TCD Signed Source Address Offset -#define DMA_TCD13_ATTR *(volatile uint16_t *)0x400091A6 // TCD Transfer Attributes -#define DMA_TCD13_NBYTES_MLNO *(volatile uint32_t *)0x400091A8 // TCD Minor Byte Count -#define DMA_TCD13_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset -#define DMA_TCD13_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091A8 // TCD Signed Minor Loop Offset -#define DMA_TCD13_SLAST *(volatile int32_t *)0x400091AC // TCD Last Source Addr Adj. -#define DMA_TCD13_DADDR *(volatile void * volatile *)0x400091B0 // TCD Destination Address -#define DMA_TCD13_DOFF *(volatile int16_t *)0x400091B4 // TCD Signed Dest Address Offset -#define DMA_TCD13_CITER_ELINKYES *(volatile uint16_t *)0x400091B6 // TCD Current Minor Loop Link -#define DMA_TCD13_CITER_ELINKNO *(volatile uint16_t *)0x400091B6 // ?? -#define DMA_TCD13_DLASTSGA *(volatile int32_t *)0x400091B8 // TCD Last Destination Addr Adj -#define DMA_TCD13_CSR *(volatile uint16_t *)0x400091BC // TCD Control and Status -#define DMA_TCD13_BITER_ELINKYES *(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link -#define DMA_TCD13_BITER_ELINKNO *(volatile uint16_t *)0x400091BE // TCD Beginning Minor Loop Link - -#define DMA_TCD14_SADDR *(volatile const void * volatile *)0x400091C0 // TCD Source Addr -#define DMA_TCD14_SOFF *(volatile int16_t *)0x400091C4 // TCD Signed Source Address Offset -#define DMA_TCD14_ATTR *(volatile uint16_t *)0x400091C6 // TCD Transfer Attributes -#define DMA_TCD14_NBYTES_MLNO *(volatile uint32_t *)0x400091C8 // TCD Minor Byte Count -#define DMA_TCD14_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset -#define DMA_TCD14_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091C8 // TCD Signed Minor Loop Offset -#define DMA_TCD14_SLAST *(volatile int32_t *)0x400091CC // TCD Last Source Addr Adj. -#define DMA_TCD14_DADDR *(volatile void * volatile *)0x400091D0 // TCD Destination Address -#define DMA_TCD14_DOFF *(volatile int16_t *)0x400091D4 // TCD Signed Dest Address Offset -#define DMA_TCD14_CITER_ELINKYES *(volatile uint16_t *)0x400091D6 // TCD Current Minor Loop Link -#define DMA_TCD14_CITER_ELINKNO *(volatile uint16_t *)0x400091D6 // ?? -#define DMA_TCD14_DLASTSGA *(volatile int32_t *)0x400091D8 // TCD Last Destination Addr Adj -#define DMA_TCD14_CSR *(volatile uint16_t *)0x400091DC // TCD Control and Status -#define DMA_TCD14_BITER_ELINKYES *(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link -#define DMA_TCD14_BITER_ELINKNO *(volatile uint16_t *)0x400091DE // TCD Beginning Minor Loop Link - -#define DMA_TCD15_SADDR *(volatile const void * volatile *)0x400091E0 // TCD Source Addr -#define DMA_TCD15_SOFF *(volatile int16_t *)0x400091E4 // TCD Signed Source Address Offset -#define DMA_TCD15_ATTR *(volatile uint16_t *)0x400091E6 // TCD Transfer Attributes -#define DMA_TCD15_NBYTES_MLNO *(volatile uint32_t *)0x400091E8 // TCD Minor Byte Count -#define DMA_TCD15_NBYTES_MLOFFNO *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset -#define DMA_TCD15_NBYTES_MLOFFYES *(volatile uint32_t *)0x400091E8 // TCD Signed Minor Loop Offset -#define DMA_TCD15_SLAST *(volatile int32_t *)0x400091EC // TCD Last Source Addr Adj. -#define DMA_TCD15_DADDR *(volatile void * volatile *)0x400091F0 // TCD Destination Address -#define DMA_TCD15_DOFF *(volatile int16_t *)0x400091F4 // TCD Signed Dest Address Offset -#define DMA_TCD15_CITER_ELINKYES *(volatile uint16_t *)0x400091F6 // TCD Current Minor Loop Link -#define DMA_TCD15_CITER_ELINKNO *(volatile uint16_t *)0x400091F6 // ?? -#define DMA_TCD15_DLASTSGA *(volatile int32_t *)0x400091F8 // TCD Last Destination Addr Adj -#define DMA_TCD15_CSR *(volatile uint16_t *)0x400091FC // TCD Control and Status -#define DMA_TCD15_BITER_ELINKYES *(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link -#define DMA_TCD15_BITER_ELINKNO *(volatile uint16_t *)0x400091FE // TCD Beginning Minor Loop Link - - -// Chapter 22: External Watchdog Monitor (EWM) -#define EWM_CTRL *(volatile uint8_t *)0x40061000 // Control Register -#define EWM_SERV *(volatile uint8_t *)0x40061001 // Service Register -#define EWM_CMPL *(volatile uint8_t *)0x40061002 // Compare Low Register -#define EWM_CMPH *(volatile uint8_t *)0x40061003 // Compare High Register - -// Chapter 23: Watchdog Timer (WDOG) -#define WDOG_STCTRLH *(volatile uint16_t *)0x40052000 // Watchdog Status and Control Register High -#define WDOG_STCTRLH_DISTESTWDOG (uint16_t)0x4000 // Allows the WDOG's functional test mode to be disabled permanently. -#define WDOG_STCTRLH_BYTESEL(n) (uint16_t)(((n) & 3) << 12) // selects the byte to be tested when the watchdog is in the byte test mode. -#define WDOG_STCTRLH_TESTSEL (uint16_t)0x0800 -#define WDOG_STCTRLH_TESTWDOG (uint16_t)0x0400 -#define WDOG_STCTRLH_WAITEN (uint16_t)0x0080 -#define WDOG_STCTRLH_STOPEN (uint16_t)0x0040 -#define WDOG_STCTRLH_DBGEN (uint16_t)0x0020 -#define WDOG_STCTRLH_ALLOWUPDATE (uint16_t)0x0010 -#define WDOG_STCTRLH_WINEN (uint16_t)0x0008 -#define WDOG_STCTRLH_IRQRSTEN (uint16_t)0x0004 -#define WDOG_STCTRLH_CLKSRC (uint16_t)0x0002 -#define WDOG_STCTRLH_WDOGEN (uint16_t)0x0001 -#define WDOG_STCTRLL *(volatile uint16_t *)0x40052002 // Watchdog Status and Control Register Low -#define WDOG_TOVALH *(volatile uint16_t *)0x40052004 // Watchdog Time-out Value Register High -#define WDOG_TOVALL *(volatile uint16_t *)0x40052006 // Watchdog Time-out Value Register Low -#define WDOG_WINH *(volatile uint16_t *)0x40052008 // Watchdog Window Register High -#define WDOG_WINL *(volatile uint16_t *)0x4005200A // Watchdog Window Register Low -#define WDOG_REFRESH *(volatile uint16_t *)0x4005200C // Watchdog Refresh register -#define WDOG_UNLOCK *(volatile uint16_t *)0x4005200E // Watchdog Unlock register -#define WDOG_UNLOCK_SEQ1 (uint16_t)0xC520 -#define WDOG_UNLOCK_SEQ2 (uint16_t)0xD928 -#define WDOG_TMROUTH *(volatile uint16_t *)0x40052010 // Watchdog Timer Output Register High -#define WDOG_TMROUTL *(volatile uint16_t *)0x40052012 // Watchdog Timer Output Register Low -#define WDOG_RSTCNT *(volatile uint16_t *)0x40052014 // Watchdog Reset Count register -#define WDOG_PRESC *(volatile uint16_t *)0x40052016 // Watchdog Prescaler register - -// Chapter 24: Multipurpose Clock Generator (MCG) -#define MCG_C1 *(volatile uint8_t *)0x40064000 // MCG Control 1 Register -#define MCG_C1_IREFSTEN (uint8_t)0x01 // Internal Reference Stop Enable, Controls whether or not the internal reference clock remains enabled when the MCG enters Stop mode. -#define MCG_C1_IRCLKEN (uint8_t)0x02 // Internal Reference Clock Enable, Enables the internal reference clock for use as MCGIRCLK. -#define MCG_C1_IREFS (uint8_t)0x04 // Internal Reference Select, Selects the reference clock source for the FLL. -#define MCG_C1_FRDIV(n) (uint8_t)(((n) & 0x07) << 3) // FLL External Reference Divider, Selects the amount to divide down the external reference clock for the FLL -#define MCG_C1_CLKS(n) (uint8_t)(((n) & 0x03) << 6) // Clock Source Select, Selects the clock source for MCGOUTCLK -#define MCG_C2 *(volatile uint8_t *)0x40064001 // MCG Control 2 Register -#define MCG_C2_IRCS (uint8_t)0x01 // Internal Reference Clock Select, Selects between the fast or slow internal reference clock source. -#define MCG_C2_LP (uint8_t)0x02 // Low Power Select, Controls whether the FLL or PLL is disabled in BLPI and BLPE modes. -#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock. -#define MCG_C2_HGO0 (uint8_t)0x08 // High Gain Oscillator Select, Controls the crystal oscillator mode of operation -#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator -#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 -#define MCG_C3 *(volatile uint8_t *)0x40064002 // MCG Control 3 Register -#define MCG_C3_SCTRIM(n) (uint8_t)(n) // Slow Internal Reference Clock Trim Setting -#define MCG_C4 *(volatile uint8_t *)0x40064003 // MCG Control 4 Register -#define MCG_C4_SCFTRIM (uint8_t)0x01 // Slow Internal Reference Clock Fine Trim -#define MCG_C4_FCTRIM(n) (uint8_t)(((n) & 0x0F) << 1) // Fast Internal Reference Clock Trim Setting -#define MCG_C4_DRST_DRS(n) (uint8_t)(((n) & 0x03) << 5) // DCO Range Select -#define MCG_C4_DMX32 (uint8_t)0x80 // DCO Maximum Frequency with 32.768 kHz Reference, controls whether the DCO frequency range is narrowed -#define MCG_C5 *(volatile uint8_t *)0x40064004 // MCG Control 5 Register -#define MCG_C5_PRDIV0(n) (uint8_t)((n) & 0x1F) // PLL External Reference Divider -#define MCG_C5_PLLSTEN0 (uint8_t)0x20 // PLL Stop Enable -#define MCG_C5_PLLCLKEN0 (uint8_t)0x40 // PLL Clock Enable -#define MCG_C6 *(volatile uint8_t *)0x40064005 // MCG Control 6 Register -#define MCG_C6_VDIV0(n) (uint8_t)((n) & 0x1F) // VCO 0 Divider -#define MCG_C6_CME0 (uint8_t)0x20 // Clock Monitor Enable -#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. -#define MCG_C6_LOLIE0 (uint8_t)0x80 // Loss of Lock Interrrupt Enable -#define MCG_S *(volatile uint8_t *)0x40064006 // MCG Status Register -#define MCG_S_IRCST (uint8_t)0x01 // Internal Reference Clock Status -#define MCG_S_OSCINIT0 (uint8_t)0x02 // OSC Initialization, resets to 0, is set to 1 after the initialization cycles of the crystal oscillator -#define MCG_S_CLKST(n) (uint8_t)(((n) & 0x03) << 2) // Clock Mode Status, 0=FLL is selected, 1= Internal ref, 2=External ref, 3=PLL -#define MCG_S_CLKST_MASK (uint8_t)0x0C -#define MCG_S_IREFST (uint8_t)0x10 // Internal Reference Status -#define MCG_S_PLLST (uint8_t)0x20 // PLL Select Status -#define MCG_S_LOCK0 (uint8_t)0x40 // Lock Status, 0=PLL Unlocked, 1=PLL Locked -#define MCG_S_LOLS0 (uint8_t)0x80 // Loss of Lock Status -#define MCG_SC *(volatile uint8_t *)0x40064008 // MCG Status and Control Register -#define MCG_SC_LOCS0 (uint8_t)0x01 // OSC0 Loss of Clock Status -#define MCG_SC_FCRDIV(n) (uint8_t)(((n) & 0x07) << 1) // Fast Clock Internal Reference Divider -#define MCG_SC_FLTPRSRV (uint8_t)0x10 // FLL Filter Preserve Enable -#define MCG_SC_ATMF (uint8_t)0x20 // Automatic Trim Machine Fail Flag -#define MCG_SC_ATMS (uint8_t)0x40 // Automatic Trim Machine Select -#define MCG_SC_ATME (uint8_t)0x80 // Automatic Trim Machine Enable -#define MCG_ATCVH *(volatile uint8_t *)0x4006400A // MCG Auto Trim Compare Value High Register -#define MCG_ATCVL *(volatile uint8_t *)0x4006400B // MCG Auto Trim Compare Value Low Register -#define MCG_C7 *(volatile uint8_t *)0x4006400C // MCG Control 7 Register -#define MCG_C8 *(volatile uint8_t *)0x4006400D // MCG Control 8 Register - -// Chapter 25: Oscillator (OSC) -#define OSC0_CR *(volatile uint8_t *)0x40065000 // OSC Control Register -#define OSC_SC16P (uint8_t)0x01 // Oscillator 16 pF Capacitor Load Configure -#define OSC_SC8P (uint8_t)0x02 // Oscillator 8 pF Capacitor Load Configure -#define OSC_SC4P (uint8_t)0x04 // Oscillator 4 pF Capacitor Load Configure -#define OSC_SC2P (uint8_t)0x08 // Oscillator 2 pF Capacitor Load Configure -#define OSC_EREFSTEN (uint8_t)0x20 // External Reference Stop Enable, Controls whether or not the external reference clock (OSCERCLK) remains enabled when MCU enters Stop mode. -#define OSC_ERCLKEN (uint8_t)0x80 // External Reference Enable, Enables external reference clock (OSCERCLK). - -// Chapter 27: Flash Memory Controller (FMC) -#define FMC_PFAPR *(volatile uint32_t *)0x4001F000 // Flash Access Protection -#define FMC_PFB0CR *(volatile uint32_t *)0x4001F004 // Flash Control -#define FMC_TAGVDW0S0 *(volatile uint32_t *)0x4001F100 // Cache Tag Storage -#define FMC_TAGVDW0S1 *(volatile uint32_t *)0x4001F104 // Cache Tag Storage -#define FMC_TAGVDW1S0 *(volatile uint32_t *)0x4001F108 // Cache Tag Storage -#define FMC_TAGVDW1S1 *(volatile uint32_t *)0x4001F10C // Cache Tag Storage -#define FMC_TAGVDW2S0 *(volatile uint32_t *)0x4001F110 // Cache Tag Storage -#define FMC_TAGVDW2S1 *(volatile uint32_t *)0x4001F114 // Cache Tag Storage -#define FMC_TAGVDW3S0 *(volatile uint32_t *)0x4001F118 // Cache Tag Storage -#define FMC_TAGVDW3S1 *(volatile uint32_t *)0x4001F11C // Cache Tag Storage -#define FMC_DATAW0S0 *(volatile uint32_t *)0x4001F200 // Cache Data Storage -#define FMC_DATAW0S1 *(volatile uint32_t *)0x4001F204 // Cache Data Storage -#define FMC_DATAW1S0 *(volatile uint32_t *)0x4001F208 // Cache Data Storage -#define FMC_DATAW1S1 *(volatile uint32_t *)0x4001F20C // Cache Data Storage -#define FMC_DATAW2S0 *(volatile uint32_t *)0x4001F210 // Cache Data Storage -#define FMC_DATAW2S1 *(volatile uint32_t *)0x4001F214 // Cache Data Storage -#define FMC_DATAW3S0 *(volatile uint32_t *)0x4001F218 // Cache Data Storage -#define FMC_DATAW3S1 *(volatile uint32_t *)0x4001F21C // Cache Data Storage - -// Chapter 28: Flash Memory Module (FTFL) -#define FTFL_FSTAT *(volatile uint8_t *)0x40020000 // Flash Status Register -#define FTFL_FSTAT_CCIF (uint8_t)0x80 // Command Complete Interrupt Flag -#define FTFL_FSTAT_RDCOLERR (uint8_t)0x40 // Flash Read Collision Error Flag -#define FTFL_FSTAT_ACCERR (uint8_t)0x20 // Flash Access Error Flag -#define FTFL_FSTAT_FPVIOL (uint8_t)0x10 // Flash Protection Violation Flag -#define FTFL_FSTAT_MGSTAT0 (uint8_t)0x01 // Memory Controller Command Completion Status Flag -#define FTFL_FCNFG *(volatile uint8_t *)0x40020001 // Flash Configuration Register -#define FTFL_FCNFG_CCIE (uint8_t)0x80 // Command Complete Interrupt Enable -#define FTFL_FCNFG_RDCOLLIE (uint8_t)0x40 // Read Collision Error Interrupt Enable -#define FTFL_FCNFG_ERSAREQ (uint8_t)0x20 // Erase All Request -#define FTFL_FCNFG_ERSSUSP (uint8_t)0x10 // Erase Suspend -#define FTFL_FCNFG_PFLSH (uint8_t)0x04 // Flash memory configuration -#define FTFL_FCNFG_RAMRDY (uint8_t)0x02 // RAM Ready -#define FTFL_FCNFG_EEERDY (uint8_t)0x01 // EEPROM Ready -#define FTFL_FSEC *(const uint8_t *)0x40020002 // Flash Security Register -#define FTFL_FOPT *(const uint8_t *)0x40020003 // Flash Option Register -#define FTFL_FCCOB3 *(volatile uint8_t *)0x40020004 // Flash Common Command Object Registers -#define FTFL_FCCOB2 *(volatile uint8_t *)0x40020005 -#define FTFL_FCCOB1 *(volatile uint8_t *)0x40020006 -#define FTFL_FCCOB0 *(volatile uint8_t *)0x40020007 -#define FTFL_FCCOB7 *(volatile uint8_t *)0x40020008 -#define FTFL_FCCOB6 *(volatile uint8_t *)0x40020009 -#define FTFL_FCCOB5 *(volatile uint8_t *)0x4002000A -#define FTFL_FCCOB4 *(volatile uint8_t *)0x4002000B -#define FTFL_FCCOBB *(volatile uint8_t *)0x4002000C -#define FTFL_FCCOBA *(volatile uint8_t *)0x4002000D -#define FTFL_FCCOB9 *(volatile uint8_t *)0x4002000E -#define FTFL_FCCOB8 *(volatile uint8_t *)0x4002000F -#define FTFL_FPROT3 *(volatile uint8_t *)0x40020010 // Program Flash Protection Registers -#define FTFL_FPROT2 *(volatile uint8_t *)0x40020011 // Program Flash Protection Registers -#define FTFL_FPROT1 *(volatile uint8_t *)0x40020012 // Program Flash Protection Registers -#define FTFL_FPROT0 *(volatile uint8_t *)0x40020013 // Program Flash Protection Registers -#define FTFL_FEPROT *(volatile uint8_t *)0x40020016 // EEPROM Protection Register -#define FTFL_FDPROT *(volatile uint8_t *)0x40020017 // Data Flash Protection Register - -// Chapter 30: Cyclic Redundancy Check (CRC) -#define CRC_CRC *(volatile uint32_t *)0x40032000 // CRC Data register -#define CRC_GPOLY *(volatile uint32_t *)0x40032004 // CRC Polynomial register -#define CRC_CTRL *(volatile uint32_t *)0x40032008 // CRC Control register - -// Chapter 31: Analog-to-Digital Converter (ADC) -#define ADC0_SC1A *(volatile uint32_t *)0x4003B000 // ADC status and control registers 1 -#define ADC0_SC1B *(volatile uint32_t *)0x4003B004 // ADC status and control registers 1 -#define ADC_SC1_COCO (uint32_t)0x80 // Conversion complete flag -#define ADC_SC1_AIEN (uint32_t)0x40 // Interrupt enable -#define ADC_SC1_DIFF (uint32_t)0x20 // Differential mode enable -#define ADC_SC1_ADCH(n) (uint32_t)((n) & 0x1F) // Input channel select -#define ADC0_CFG1 *(volatile uint32_t *)0x4003B008 // ADC configuration register 1 -#define ADC_CFG1_ADLPC (uint32_t)0x80 // Low-power configuration -#define ADC_CFG1_ADIV(n) (uint32_t)(((n) & 3) << 5) // Clock divide select, 0=direct, 1=div2, 2=div4, 3=div8 -#define ADC_CFG1_ADLSMP (uint32_t)0x10 // Sample time configuration, 0=Short, 1=Long -#define ADC_CFG1_MODE(n) (uint32_t)(((n) & 3) << 2) // Conversion mode, 0=8 bit, 1=12 bit, 2=10 bit, 3=16 bit -#define ADC_CFG1_ADICLK(n) (uint32_t)(((n) & 3) << 0) // Input clock, 0=bus, 1=bus/2, 2=OSCERCLK, 3=async -#define ADC0_CFG2 *(volatile uint32_t *)0x4003B00C // Configuration register 2 -#define ADC_CFG2_MUXSEL (uint32_t)0x10 // 0=a channels, 1=b channels -#define ADC_CFG2_ADACKEN (uint32_t)0x08 // async clock enable -#define ADC_CFG2_ADHSC (uint32_t)0x04 // High speed configuration -#define ADC_CFG2_ADLSTS(n) (uint32_t)(((n) & 3) << 0) // Sample time, 0=24 cycles, 1=12 cycles, 2=6 cycles, 3=2 cycles -#define ADC0_RA *(volatile uint32_t *)0x4003B010 // ADC data result register -#define ADC0_RB *(volatile uint32_t *)0x4003B014 // ADC data result register -#define ADC0_CV1 *(volatile uint32_t *)0x4003B018 // Compare value registers -#define ADC0_CV2 *(volatile uint32_t *)0x4003B01C // Compare value registers -#define ADC0_SC2 *(volatile uint32_t *)0x4003B020 // Status and control register 2 -#define ADC_SC2_ADACT (uint32_t)0x80 // Conversion active -#define ADC_SC2_ADTRG (uint32_t)0x40 // Conversion trigger select, 0=software, 1=hardware -#define ADC_SC2_ACFE (uint32_t)0x20 // Compare function enable -#define ADC_SC2_ACFGT (uint32_t)0x10 // Compare function greater than enable -#define ADC_SC2_ACREN (uint32_t)0x08 // Compare function range enable -#define ADC_SC2_DMAEN (uint32_t)0x04 // DMA enable -#define ADC_SC2_REFSEL(n) (uint32_t)(((n) & 3) << 0) // Voltage reference, 0=vcc/external, 1=1.2 volts -#define ADC0_SC3 *(volatile uint32_t *)0x4003B024 // Status and control register 3 -#define ADC_SC3_CAL (uint32_t)0x80 // Calibration, 1=begin, stays set while cal in progress -#define ADC_SC3_CALF (uint32_t)0x40 // Calibration failed flag -#define ADC_SC3_ADCO (uint32_t)0x08 // Continuous conversion enable -#define ADC_SC3_AVGE (uint32_t)0x04 // Hardware average enable -#define ADC_SC3_AVGS(n) (uint32_t)(((n) & 3) << 0) // avg select, 0=4 samples, 1=8 samples, 2=16 samples, 3=32 samples -#define ADC0_OFS *(volatile uint32_t *)0x4003B028 // ADC offset correction register -#define ADC0_PG *(volatile uint32_t *)0x4003B02C // ADC plus-side gain register -#define ADC0_MG *(volatile uint32_t *)0x4003B030 // ADC minus-side gain register -#define ADC0_CLPD *(volatile uint32_t *)0x4003B034 // ADC plus-side general calibration value register -#define ADC0_CLPS *(volatile uint32_t *)0x4003B038 // ADC plus-side general calibration value register -#define ADC0_CLP4 *(volatile uint32_t *)0x4003B03C // ADC plus-side general calibration value register -#define ADC0_CLP3 *(volatile uint32_t *)0x4003B040 // ADC plus-side general calibration value register -#define ADC0_CLP2 *(volatile uint32_t *)0x4003B044 // ADC plus-side general calibration value register -#define ADC0_CLP1 *(volatile uint32_t *)0x4003B048 // ADC plus-side general calibration value register -#define ADC0_CLP0 *(volatile uint32_t *)0x4003B04C // ADC plus-side general calibration value register -#define ADC0_PGA *(volatile uint32_t *)0x4003B050 // ADC Programmable Gain Amplifier -#define ADC_PGA_PGAEN (uint32_t)0x00800000 // Enable -#define ADC_PGA_PGALPB (uint32_t)0x00100000 // Low-Power Mode Control, 0=low power, 1=normal -#define ADC_PGA_PGAG(n) (uint32_t)(((n) & 15) << 16) // Gain, 0=1X, 1=2X, 2=4X, 3=8X, 4=16X, 5=32X, 6=64X -#define ADC0_CLMD *(volatile uint32_t *)0x4003B054 // ADC minus-side general calibration value register -#define ADC0_CLMS *(volatile uint32_t *)0x4003B058 // ADC minus-side general calibration value register -#define ADC0_CLM4 *(volatile uint32_t *)0x4003B05C // ADC minus-side general calibration value register -#define ADC0_CLM3 *(volatile uint32_t *)0x4003B060 // ADC minus-side general calibration value register -#define ADC0_CLM2 *(volatile uint32_t *)0x4003B064 // ADC minus-side general calibration value register -#define ADC0_CLM1 *(volatile uint32_t *)0x4003B068 // ADC minus-side general calibration value register -#define ADC0_CLM0 *(volatile uint32_t *)0x4003B06C // ADC minus-side general calibration value register - -#define ADC1_SC1A *(volatile uint32_t *)0x400BB000 // ADC status and control registers 1 -#define ADC1_SC1B *(volatile uint32_t *)0x400BB004 // ADC status and control registers 1 -#define ADC1_CFG1 *(volatile uint32_t *)0x400BB008 // ADC configuration register 1 -#define ADC1_CFG2 *(volatile uint32_t *)0x400BB00C // Configuration register 2 -#define ADC1_RA *(volatile uint32_t *)0x400BB010 // ADC data result register -#define ADC1_RB *(volatile uint32_t *)0x400BB014 // ADC data result register -#define ADC1_CV1 *(volatile uint32_t *)0x400BB018 // Compare value registers -#define ADC1_CV2 *(volatile uint32_t *)0x400BB01C // Compare value registers -#define ADC1_SC2 *(volatile uint32_t *)0x400BB020 // Status and control register 2 -#define ADC1_SC3 *(volatile uint32_t *)0x400BB024 // Status and control register 3 -#define ADC1_OFS *(volatile uint32_t *)0x400BB028 // ADC offset correction register -#define ADC1_PG *(volatile uint32_t *)0x400BB02C // ADC plus-side gain register -#define ADC1_MG *(volatile uint32_t *)0x400BB030 // ADC minus-side gain register -#define ADC1_CLPD *(volatile uint32_t *)0x400BB034 // ADC plus-side general calibration value register -#define ADC1_CLPS *(volatile uint32_t *)0x400BB038 // ADC plus-side general calibration value register -#define ADC1_CLP4 *(volatile uint32_t *)0x400BB03C // ADC plus-side general calibration value register -#define ADC1_CLP3 *(volatile uint32_t *)0x400BB040 // ADC plus-side general calibration value register -#define ADC1_CLP2 *(volatile uint32_t *)0x400BB044 // ADC plus-side general calibration value register -#define ADC1_CLP1 *(volatile uint32_t *)0x400BB048 // ADC plus-side general calibration value register -#define ADC1_CLP0 *(volatile uint32_t *)0x400BB04C // ADC plus-side general calibration value register -#define ADC1_PGA *(volatile uint32_t *)0x400BB050 // ADC Programmable Gain Amplifier -#define ADC1_CLMD *(volatile uint32_t *)0x400BB054 // ADC minus-side general calibration value register -#define ADC1_CLMS *(volatile uint32_t *)0x400BB058 // ADC minus-side general calibration value register -#define ADC1_CLM4 *(volatile uint32_t *)0x400BB05C // ADC minus-side general calibration value register -#define ADC1_CLM3 *(volatile uint32_t *)0x400BB060 // ADC minus-side general calibration value register -#define ADC1_CLM2 *(volatile uint32_t *)0x400BB064 // ADC minus-side general calibration value register -#define ADC1_CLM1 *(volatile uint32_t *)0x400BB068 // ADC minus-side general calibration value register -#define ADC1_CLM0 *(volatile uint32_t *)0x400BB06C // ADC minus-side general calibration value register - -#define DAC0_DAT0L *(volatile uint8_t *)0x400CC000 // DAC Data Low Register -#define DAC0_DATH *(volatile uint8_t *)0x400CC001 // DAC Data High Register -#define DAC0_DAT1L *(volatile uint8_t *)0x400CC002 // DAC Data Low Register -#define DAC0_DAT2L *(volatile uint8_t *)0x400CC004 // DAC Data Low Register -#define DAC0_DAT3L *(volatile uint8_t *)0x400CC006 // DAC Data Low Register -#define DAC0_DAT4L *(volatile uint8_t *)0x400CC008 // DAC Data Low Register -#define DAC0_DAT5L *(volatile uint8_t *)0x400CC00A // DAC Data Low Register -#define DAC0_DAT6L *(volatile uint8_t *)0x400CC00C // DAC Data Low Register -#define DAC0_DAT7L *(volatile uint8_t *)0x400CC00E // DAC Data Low Register -#define DAC0_DAT8L *(volatile uint8_t *)0x400CC010 // DAC Data Low Register -#define DAC0_DAT9L *(volatile uint8_t *)0x400CC012 // DAC Data Low Register -#define DAC0_DAT10L *(volatile uint8_t *)0x400CC014 // DAC Data Low Register -#define DAC0_DAT11L *(volatile uint8_t *)0x400CC016 // DAC Data Low Register -#define DAC0_DAT12L *(volatile uint8_t *)0x400CC018 // DAC Data Low Register -#define DAC0_DAT13L *(volatile uint8_t *)0x400CC01A // DAC Data Low Register -#define DAC0_DAT14L *(volatile uint8_t *)0x400CC01C // DAC Data Low Register -#define DAC0_DAT15L *(volatile uint8_t *)0x400CC01E // DAC Data Low Register -#define DAC0_SR *(volatile uint8_t *)0x400CC020 // DAC Status Register -#define DAC0_C0 *(volatile uint8_t *)0x400CC021 // DAC Control Register -#define DAC_C0_DACEN 0x80 // DAC Enable -#define DAC_C0_DACRFS 0x40 // DAC Reference Select -#define DAC_C0_DACTRGSEL 0x20 // DAC Trigger Select -#define DAC_C0_DACSWTRG 0x10 // DAC Software Trigger -#define DAC_C0_LPEN 0x08 // DAC Low Power Control -#define DAC_C0_DACBWIEN 0x04 // DAC Buffer Watermark Interrupt Enable -#define DAC_C0_DACBTIEN 0x02 // DAC Buffer Read Pointer Top Flag Interrupt Enable -#define DAC_C0_DACBBIEN 0x01 // DAC Buffer Read Pointer Bottom Flag Interrupt Enable -#define DAC0_C1 *(volatile uint8_t *)0x400CC022 // DAC Control Register 1 -#define DAC_C1_DMAEN 0x80 // DMA Enable Select -#define DAC_C1_DACBFWM(n) (((n) & 3) << 3) // DAC Buffer Watermark Select -#define DAC_C1_DACBFMD(n) (((n) & 3) << 0) // DAC Buffer Work Mode Select -#define DAC_C1_DACBFEN 0x00 // DAC Buffer Enable - -#define DAC0_C2 *(volatile uint8_t *)0x400CC023 // DAC Control Register 2 -#define DAC_C2_DACBFRP(n) (((n) & 15) << 4) // DAC Buffer Read Pointer -#define DAC_C2_DACBFUP(n) (((n) & 15) << 0) // DAC Buffer Upper Limit - - -//#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator -//#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0 - -// Chapter 32: Comparator (CMP) -#define CMP0_CR0 *(volatile uint8_t *)0x40073000 // CMP Control Register 0 -#define CMP0_CR1 *(volatile uint8_t *)0x40073001 // CMP Control Register 1 -#define CMP0_FPR *(volatile uint8_t *)0x40073002 // CMP Filter Period Register -#define CMP0_SCR *(volatile uint8_t *)0x40073003 // CMP Status and Control Register -#define CMP0_DACCR *(volatile uint8_t *)0x40073004 // DAC Control Register -#define CMP0_MUXCR *(volatile uint8_t *)0x40073005 // MUX Control Register -#define CMP1_CR0 *(volatile uint8_t *)0x40073008 // CMP Control Register 0 -#define CMP1_CR1 *(volatile uint8_t *)0x40073009 // CMP Control Register 1 -#define CMP1_FPR *(volatile uint8_t *)0x4007300A // CMP Filter Period Register -#define CMP1_SCR *(volatile uint8_t *)0x4007300B // CMP Status and Control Register -#define CMP1_DACCR *(volatile uint8_t *)0x4007300C // DAC Control Register -#define CMP1_MUXCR *(volatile uint8_t *)0x4007300D // MUX Control Register - -// Chapter 33: Voltage Reference (VREFV1) -#define VREF_TRM *(volatile uint8_t *)0x40074000 // VREF Trim Register -#define VREF_TRM_CHOPEN (uint8_t)0x40 // Chop oscillator enable -#define VREF_TRM_TRIM(n) ((n) & 0x3F) // Trim bits -#define VREF_SC *(volatile uint8_t *)0x40074001 // VREF Status and Control Register -#define VREF_SC_VREFEN (uint8_t)0x80 // Internal Voltage Reference enable -#define VREF_SC_REGEN (uint8_t)0x40 // Regulator enable -#define VREF_SC_ICOMPEN (uint8_t)0x20 // Second order curvature compensation enable -#define VREF_SC_VREFST (uint8_t)0x04 // Internal Voltage Reference stable flag -#define VREF_SC_MODE_LV(n) (uint8_t)(((n) & 3) << 0) // Buffer Mode selection: 0=Bandgap on only - // 1=High power buffer mode, - // 2=Low-power buffer mode - -// Chapter 34: Programmable Delay Block (PDB) -#define PDB0_SC *(volatile uint32_t *)0x40036000 // Status and Control Register -#define PDB_SC_LDMOD(n) (((n) & 3) << 18) // Load Mode Select -#define PDB_SC_PDBEIE 0x00020000 // Sequence Error Interrupt Enable -#define PDB_SC_SWTRIG 0x00010000 // Software Trigger -#define PDB_SC_DMAEN 0x00008000 // DMA Enable -#define PDB_SC_PRESCALER(n) (((n) & 7) << 12) // Prescaler Divider Select -#define PDB_SC_TRGSEL(n) (((n) & 15) << 8) // Trigger Input Source Select -#define PDB_SC_PDBEN 0x00000080 // PDB Enable -#define PDB_SC_PDBIF 0x00000040 // PDB Interrupt Flag -#define PDB_SC_PDBIE 0x00000020 // PDB Interrupt Enable. -#define PDB_SC_MULT(n) (((n) & 3) << 2) // Multiplication Factor -#define PDB_SC_CONT 0x00000002 // Continuous Mode Enable -#define PDB_SC_LDOK 0x00000001 // Load OK -#define PDB0_MOD *(volatile uint32_t *)0x40036004 // Modulus Register -#define PDB0_CNT *(volatile uint32_t *)0x40036008 // Counter Register -#define PDB0_IDLY *(volatile uint32_t *)0x4003600C // Interrupt Delay Register -#define PDB0_CH0C1 *(volatile uint32_t *)0x40036010 // Channel n Control Register 1 -#define PDB0_CH0S *(volatile uint32_t *)0x40036014 // Channel n Status Register -#define PDB0_CH0DLY0 *(volatile uint32_t *)0x40036018 // Channel n Delay 0 Register -#define PDB0_CH0DLY1 *(volatile uint32_t *)0x4003601C // Channel n Delay 1 Register -#define PDB0_POEN *(volatile uint32_t *)0x40036190 // Pulse-Out n Enable Register -#define PDB0_PO0DLY *(volatile uint32_t *)0x40036194 // Pulse-Out n Delay Register -#define PDB0_PO1DLY *(volatile uint32_t *)0x40036198 // Pulse-Out n Delay Register - -// Chapter 35: FlexTimer Module (FTM) -#define FTM0_SC *(volatile uint32_t *)0x40038000 // Status And Control -#define FTM_SC_TOF 0x80 // Timer Overflow Flag -#define FTM_SC_TOIE 0x40 // Timer Overflow Interrupt Enable -#define FTM_SC_CPWMS 0x20 // Center-Aligned PWM Select -#define FTM_SC_CLKS(n) (((n) & 3) << 3) // Clock Source Selection -#define FTM_SC_PS(n) (((n) & 7) << 0) // Prescale Factor Selection -#define FTM0_CNT *(volatile uint32_t *)0x40038004 // Counter -#define FTM0_MOD *(volatile uint32_t *)0x40038008 // Modulo -#define FTM0_C0SC *(volatile uint32_t *)0x4003800C // Channel 0 Status And Control -#define FTM0_C0V *(volatile uint32_t *)0x40038010 // Channel 0 Value -#define FTM0_C1SC *(volatile uint32_t *)0x40038014 // Channel 1 Status And Control -#define FTM0_C1V *(volatile uint32_t *)0x40038018 // Channel 1 Value -#define FTM0_C2SC *(volatile uint32_t *)0x4003801C // Channel 2 Status And Control -#define FTM0_C2V *(volatile uint32_t *)0x40038020 // Channel 2 Value -#define FTM0_C3SC *(volatile uint32_t *)0x40038024 // Channel 3 Status And Control -#define FTM0_C3V *(volatile uint32_t *)0x40038028 // Channel 3 Value -#define FTM0_C4SC *(volatile uint32_t *)0x4003802C // Channel 4 Status And Control -#define FTM0_C4V *(volatile uint32_t *)0x40038030 // Channel 4 Value -#define FTM0_C5SC *(volatile uint32_t *)0x40038034 // Channel 5 Status And Control -#define FTM0_C5V *(volatile uint32_t *)0x40038038 // Channel 5 Value -#define FTM0_C6SC *(volatile uint32_t *)0x4003803C // Channel 6 Status And Control -#define FTM0_C6V *(volatile uint32_t *)0x40038040 // Channel 6 Value -#define FTM0_C7SC *(volatile uint32_t *)0x40038044 // Channel 7 Status And Control -#define FTM0_C7V *(volatile uint32_t *)0x40038048 // Channel 7 Value -#define FTM0_CNTIN *(volatile uint32_t *)0x4003804C // Counter Initial Value -#define FTM0_STATUS *(volatile uint32_t *)0x40038050 // Capture And Compare Status -#define FTM0_MODE *(volatile uint32_t *)0x40038054 // Features Mode Selection -#define FTM_MODE_FAULTIE 0x80 // Fault Interrupt Enable -#define FTM_MODE_FAULTM(n) (((n) & 3) << 5) // Fault Control Mode -#define FTM_MODE_CAPTEST 0x10 // Capture Test Mode Enable -#define FTM_MODE_PWMSYNC 0x08 // PWM Synchronization Mode -#define FTM_MODE_WPDIS 0x04 // Write Protection Disable -#define FTM_MODE_INIT 0x02 // Initialize The Channels Output -#define FTM_MODE_FTMEN 0x01 // FTM Enable -#define FTM0_SYNC *(volatile uint32_t *)0x40038058 // Synchronization -#define FTM_SYNC_SWSYNC 0x80 // -#define FTM_SYNC_TRIG2 0x40 // -#define FTM_SYNC_TRIG1 0x20 // -#define FTM_SYNC_TRIG0 0x10 // -#define FTM_SYNC_SYNCHOM 0x08 // -#define FTM_SYNC_REINIT 0x04 // -#define FTM_SYNC_CNTMAX 0x02 // -#define FTM_SYNC_CNTMIN 0x01 // -#define FTM0_OUTINIT *(volatile uint32_t *)0x4003805C // Initial State For Channels Output -#define FTM0_OUTMASK *(volatile uint32_t *)0x40038060 // Output Mask -#define FTM0_COMBINE *(volatile uint32_t *)0x40038064 // Function For Linked Channels -#define FTM0_DEADTIME *(volatile uint32_t *)0x40038068 // Deadtime Insertion Control -#define FTM0_EXTTRIG *(volatile uint32_t *)0x4003806C // FTM External Trigger -#define FTM0_POL *(volatile uint32_t *)0x40038070 // Channels Polarity -#define FTM0_FMS *(volatile uint32_t *)0x40038074 // Fault Mode Status -#define FTM0_FILTER *(volatile uint32_t *)0x40038078 // Input Capture Filter Control -#define FTM0_FLTCTRL *(volatile uint32_t *)0x4003807C // Fault Control -#define FTM0_QDCTRL *(volatile uint32_t *)0x40038080 // Quadrature Decoder Control And Status -#define FTM0_CONF *(volatile uint32_t *)0x40038084 // Configuration -#define FTM0_FLTPOL *(volatile uint32_t *)0x40038088 // FTM Fault Input Polarity -#define FTM0_SYNCONF *(volatile uint32_t *)0x4003808C // Synchronization Configuration -#define FTM0_INVCTRL *(volatile uint32_t *)0x40038090 // FTM Inverting Control -#define FTM0_SWOCTRL *(volatile uint32_t *)0x40038094 // FTM Software Output Control -#define FTM0_PWMLOAD *(volatile uint32_t *)0x40038098 // FTM PWM Load -#define FTM1_SC *(volatile uint32_t *)0x40039000 // Status And Control -#define FTM1_CNT *(volatile uint32_t *)0x40039004 // Counter -#define FTM1_MOD *(volatile uint32_t *)0x40039008 // Modulo -#define FTM1_C0SC *(volatile uint32_t *)0x4003900C // Channel 0 Status And Control -#define FTM1_C0V *(volatile uint32_t *)0x40039010 // Channel 0 Value -#define FTM1_C1SC *(volatile uint32_t *)0x40039014 // Channel 1 Status And Control -#define FTM1_C1V *(volatile uint32_t *)0x40039018 // Channel 1 Value -#define FTM1_CNTIN *(volatile uint32_t *)0x4003904C // Counter Initial Value -#define FTM1_STATUS *(volatile uint32_t *)0x40039050 // Capture And Compare Status -#define FTM1_MODE *(volatile uint32_t *)0x40039054 // Features Mode Selection -#define FTM1_SYNC *(volatile uint32_t *)0x40039058 // Synchronization -#define FTM1_OUTINIT *(volatile uint32_t *)0x4003905C // Initial State For Channels Output -#define FTM1_OUTMASK *(volatile uint32_t *)0x40039060 // Output Mask -#define FTM1_COMBINE *(volatile uint32_t *)0x40039064 // Function For Linked Channels -#define FTM1_DEADTIME *(volatile uint32_t *)0x40039068 // Deadtime Insertion Control -#define FTM1_EXTTRIG *(volatile uint32_t *)0x4003906C // FTM External Trigger -#define FTM1_POL *(volatile uint32_t *)0x40039070 // Channels Polarity -#define FTM1_FMS *(volatile uint32_t *)0x40039074 // Fault Mode Status -#define FTM1_FILTER *(volatile uint32_t *)0x40039078 // Input Capture Filter Control -#define FTM1_FLTCTRL *(volatile uint32_t *)0x4003907C // Fault Control -#define FTM1_QDCTRL *(volatile uint32_t *)0x40039080 // Quadrature Decoder Control And Status -#define FTM1_CONF *(volatile uint32_t *)0x40039084 // Configuration -#define FTM1_FLTPOL *(volatile uint32_t *)0x40039088 // FTM Fault Input Polarity -#define FTM1_SYNCONF *(volatile uint32_t *)0x4003908C // Synchronization Configuration -#define FTM1_INVCTRL *(volatile uint32_t *)0x40039090 // FTM Inverting Control -#define FTM1_SWOCTRL *(volatile uint32_t *)0x40039094 // FTM Software Output Control -#define FTM1_PWMLOAD *(volatile uint32_t *)0x40039098 // FTM PWM Load -#define FTM2_SC *(volatile uint32_t *)0x400B8000 // Status And Control -#define FTM2_CNT *(volatile uint32_t *)0x400B8004 // Counter -#define FTM2_MOD *(volatile uint32_t *)0x400B8008 // Modulo -#define FTM2_C0SC *(volatile uint32_t *)0x400B800C // Channel 0 Status And Control -#define FTM2_C0V *(volatile uint32_t *)0x400B8010 // Channel 0 Value -#define FTM2_C1SC *(volatile uint32_t *)0x400B8014 // Channel 1 Status And Control -#define FTM2_C1V *(volatile uint32_t *)0x400B8018 // Channel 1 Value -#define FTM2_CNTIN *(volatile uint32_t *)0x400B804C // Counter Initial Value -#define FTM2_STATUS *(volatile uint32_t *)0x400B8050 // Capture And Compare Status -#define FTM2_MODE *(volatile uint32_t *)0x400B8054 // Features Mode Selection -#define FTM2_SYNC *(volatile uint32_t *)0x400B8058 // Synchronization -#define FTM2_OUTINIT *(volatile uint32_t *)0x400B805C // Initial State For Channels Output -#define FTM2_OUTMASK *(volatile uint32_t *)0x400B8060 // Output Mask -#define FTM2_COMBINE *(volatile uint32_t *)0x400B8064 // Function For Linked Channels -#define FTM2_DEADTIME *(volatile uint32_t *)0x400B8068 // Deadtime Insertion Control -#define FTM2_EXTTRIG *(volatile uint32_t *)0x400B806C // FTM External Trigger -#define FTM2_POL *(volatile uint32_t *)0x400B8070 // Channels Polarity -#define FTM2_FMS *(volatile uint32_t *)0x400B8074 // Fault Mode Status -#define FTM2_FILTER *(volatile uint32_t *)0x400B8078 // Input Capture Filter Control -#define FTM2_FLTCTRL *(volatile uint32_t *)0x400B807C // Fault Control -#define FTM2_QDCTRL *(volatile uint32_t *)0x400B8080 // Quadrature Decoder Control And Status -#define FTM2_CONF *(volatile uint32_t *)0x400B8084 // Configuration -#define FTM2_FLTPOL *(volatile uint32_t *)0x400B8088 // FTM Fault Input Polarity -#define FTM2_SYNCONF *(volatile uint32_t *)0x400B808C // Synchronization Configuration -#define FTM2_INVCTRL *(volatile uint32_t *)0x400B8090 // FTM Inverting Control -#define FTM2_SWOCTRL *(volatile uint32_t *)0x400B8094 // FTM Software Output Control -#define FTM2_PWMLOAD *(volatile uint32_t *)0x400B8098 // FTM PWM Load - -// Chapter 36: Periodic Interrupt Timer (PIT) -#define PIT_MCR *(volatile uint32_t *)0x40037000 // PIT Module Control Register -#define PIT_LDVAL0 *(volatile uint32_t *)0x40037100 // Timer Load Value Register -#define PIT_CVAL0 *(volatile uint32_t *)0x40037104 // Current Timer Value Register -#define PIT_TCTRL0 *(volatile uint32_t *)0x40037108 // Timer Control Register -#define PIT_TFLG0 *(volatile uint32_t *)0x4003710C // Timer Flag Register -#define PIT_LDVAL1 *(volatile uint32_t *)0x40037110 // Timer Load Value Register -#define PIT_CVAL1 *(volatile uint32_t *)0x40037114 // Current Timer Value Register -#define PIT_TCTRL1 *(volatile uint32_t *)0x40037118 // Timer Control Register -#define PIT_TFLG1 *(volatile uint32_t *)0x4003711C // Timer Flag Register -#define PIT_LDVAL2 *(volatile uint32_t *)0x40037120 // Timer Load Value Register -#define PIT_CVAL2 *(volatile uint32_t *)0x40037124 // Current Timer Value Register -#define PIT_TCTRL2 *(volatile uint32_t *)0x40037128 // Timer Control Register -#define PIT_TFLG2 *(volatile uint32_t *)0x4003712C // Timer Flag Register -#define PIT_LDVAL3 *(volatile uint32_t *)0x40037130 // Timer Load Value Register -#define PIT_CVAL3 *(volatile uint32_t *)0x40037134 // Current Timer Value Register -#define PIT_TCTRL3 *(volatile uint32_t *)0x40037138 // Timer Control Register -#define PIT_TFLG3 *(volatile uint32_t *)0x4003713C // Timer Flag Register - -// Chapter 37: Low-Power Timer (LPTMR) -#define LPTMR0_CSR *(volatile uint32_t *)0x40040000 // Low Power Timer Control Status Register -#define LPTMR0_PSR *(volatile uint32_t *)0x40040004 // Low Power Timer Prescale Register -#define LPTMR0_CMR *(volatile uint32_t *)0x40040008 // Low Power Timer Compare Register -#define LPTMR0_CNR *(volatile uint32_t *)0x4004000C // Low Power Timer Counter Register - -// Chapter 38: Carrier Modulator Transmitter (CMT) -#define CMT_CGH1 *(volatile uint8_t *)0x40062000 // CMT Carrier Generator High Data Register 1 -#define CMT_CGL1 *(volatile uint8_t *)0x40062001 // CMT Carrier Generator Low Data Register 1 -#define CMT_CGH2 *(volatile uint8_t *)0x40062002 // CMT Carrier Generator High Data Register 2 -#define CMT_CGL2 *(volatile uint8_t *)0x40062003 // CMT Carrier Generator Low Data Register 2 -#define CMT_OC *(volatile uint8_t *)0x40062004 // CMT Output Control Register -#define CMT_MSC *(volatile uint8_t *)0x40062005 // CMT Modulator Status and Control Register -#define CMT_CMD1 *(volatile uint8_t *)0x40062006 // CMT Modulator Data Register Mark High -#define CMT_CMD2 *(volatile uint8_t *)0x40062007 // CMT Modulator Data Register Mark Low -#define CMT_CMD3 *(volatile uint8_t *)0x40062008 // CMT Modulator Data Register Space High -#define CMT_CMD4 *(volatile uint8_t *)0x40062009 // CMT Modulator Data Register Space Low -#define CMT_PPS *(volatile uint8_t *)0x4006200A // CMT Primary Prescaler Register -#define CMT_DMA *(volatile uint8_t *)0x4006200B // CMT Direct Memory Access Register - -// Chapter 39: Real Time Clock (RTC) -#define RTC_TSR *(volatile uint32_t *)0x4003D000 // RTC Time Seconds Register -#define RTC_TPR *(volatile uint32_t *)0x4003D004 // RTC Time Prescaler Register -#define RTC_TAR *(volatile uint32_t *)0x4003D008 // RTC Time Alarm Register -#define RTC_TCR *(volatile uint32_t *)0x4003D00C // RTC Time Compensation Register -#define RTC_TCR_CIC(n) (((n) & 255) << 24) // Compensation Interval Counter -#define RTC_TCR_TCV(n) (((n) & 255) << 16) // Time Compensation Value -#define RTC_TCR_CIR(n) (((n) & 255) << 8) // Compensation Interval Register -#define RTC_TCR_TCR(n) (((n) & 255) << 0) // Time Compensation Register -#define RTC_CR *(volatile uint32_t *)0x4003D010 // RTC Control Register -#define RTC_CR_SC2P (uint32_t)0x00002000 // -#define RTC_CR_SC4P (uint32_t)0x00001000 // -#define RTC_CR_SC8P (uint32_t)0x00000800 // -#define RTC_CR_SC16P (uint32_t)0x00000400 // -#define RTC_CR_CLKO (uint32_t)0x00000200 // -#define RTC_CR_OSCE (uint32_t)0x00000100 // -#define RTC_CR_UM (uint32_t)0x00000008 // -#define RTC_CR_SUP (uint32_t)0x00000004 // -#define RTC_CR_WPE (uint32_t)0x00000002 // -#define RTC_CR_SWR (uint32_t)0x00000001 // -#define RTC_SR *(volatile uint32_t *)0x4003D014 // RTC Status Register -#define RTC_SR_TCE (uint32_t)0x00000010 // -#define RTC_SR_TAF (uint32_t)0x00000004 // -#define RTC_SR_TOF (uint32_t)0x00000002 // -#define RTC_SR_TIF (uint32_t)0x00000001 // -#define RTC_LR *(volatile uint32_t *)0x4003D018 // RTC Lock Register -#define RTC_IER *(volatile uint32_t *)0x4003D01C // RTC Interrupt Enable Register -#define RTC_WAR *(volatile uint32_t *)0x4003D800 // RTC Write Access Register -#define RTC_RAR *(volatile uint32_t *)0x4003D804 // RTC Read Access Register - -// Chapter 40: Universal Serial Bus OTG Controller (USBOTG) -#define USB0_PERID *(const uint8_t *)0x40072000 // Peripheral ID register -#define USB0_IDCOMP *(const uint8_t *)0x40072004 // Peripheral ID Complement register -#define USB0_REV *(const uint8_t *)0x40072008 // Peripheral Revision register -#define USB0_ADDINFO *(volatile uint8_t *)0x4007200C // Peripheral Additional Info register -#define USB0_OTGISTAT *(volatile uint8_t *)0x40072010 // OTG Interrupt Status register -#define USB_OTGISTAT_IDCHG (uint8_t)0x80 // -#define USB_OTGISTAT_ONEMSEC (uint8_t)0x40 // -#define USB_OTGISTAT_LINE_STATE_CHG (uint8_t)0x20 // -#define USB_OTGISTAT_SESSVLDCHG (uint8_t)0x08 // -#define USB_OTGISTAT_B_SESS_CHG (uint8_t)0x04 // -#define USB_OTGISTAT_AVBUSCHG (uint8_t)0x01 // -#define USB0_OTGICR *(volatile uint8_t *)0x40072014 // OTG Interrupt Control Register -#define USB_OTGICR_IDEN (uint8_t)0x80 // -#define USB_OTGICR_ONEMSECEN (uint8_t)0x40 // -#define USB_OTGICR_LINESTATEEN (uint8_t)0x20 // -#define USB_OTGICR_SESSVLDEN (uint8_t)0x08 // -#define USB_OTGICR_BSESSEN (uint8_t)0x04 // -#define USB_OTGICR_AVBUSEN (uint8_t)0x01 // -#define USB0_OTGSTAT *(volatile uint8_t *)0x40072018 // OTG Status register -#define USB_OTGSTAT_ID (uint8_t)0x80 // -#define USB_OTGSTAT_ONEMSECEN (uint8_t)0x40 // -#define USB_OTGSTAT_LINESTATESTABLE (uint8_t)0x20 // -#define USB_OTGSTAT_SESS_VLD (uint8_t)0x08 // -#define USB_OTGSTAT_BSESSEND (uint8_t)0x04 // -#define USB_OTGSTAT_AVBUSVLD (uint8_t)0x01 // -#define USB0_OTGCTL *(volatile uint8_t *)0x4007201C // OTG Control Register -#define USB_OTGCTL_DPHIGH (uint8_t)0x80 // -#define USB_OTGCTL_DPLOW (uint8_t)0x20 // -#define USB_OTGCTL_DMLOW (uint8_t)0x10 // -#define USB_OTGCTL_OTGEN (uint8_t)0x04 // -#define USB0_ISTAT *(volatile uint8_t *)0x40072080 // Interrupt Status Register -#define USB_ISTAT_STALL (uint8_t)0x80 // -#define USB_ISTAT_ATTACH (uint8_t)0x40 // -#define USB_ISTAT_RESUME (uint8_t)0x20 // -#define USB_ISTAT_SLEEP (uint8_t)0x10 // -#define USB_ISTAT_TOKDNE (uint8_t)0x08 // -#define USB_ISTAT_SOFTOK (uint8_t)0x04 // -#define USB_ISTAT_ERROR (uint8_t)0x02 // -#define USB_ISTAT_USBRST (uint8_t)0x01 // -#define USB0_INTEN *(volatile uint8_t *)0x40072084 // Interrupt Enable Register -#define USB_INTEN_STALLEN (uint8_t)0x80 // -#define USB_INTEN_ATTACHEN (uint8_t)0x40 // -#define USB_INTEN_RESUMEEN (uint8_t)0x20 // -#define USB_INTEN_SLEEPEN (uint8_t)0x10 // -#define USB_INTEN_TOKDNEEN (uint8_t)0x08 // -#define USB_INTEN_SOFTOKEN (uint8_t)0x04 // -#define USB_INTEN_ERROREN (uint8_t)0x02 // -#define USB_INTEN_USBRSTEN (uint8_t)0x01 // -#define USB0_ERRSTAT *(volatile uint8_t *)0x40072088 // Error Interrupt Status Register -#define USB_ERRSTAT_BTSERR (uint8_t)0x80 // -#define USB_ERRSTAT_DMAERR (uint8_t)0x20 // -#define USB_ERRSTAT_BTOERR (uint8_t)0x10 // -#define USB_ERRSTAT_DFN8 (uint8_t)0x08 // -#define USB_ERRSTAT_CRC16 (uint8_t)0x04 // -#define USB_ERRSTAT_CRC5EOF (uint8_t)0x02 // -#define USB_ERRSTAT_PIDERR (uint8_t)0x01 // -#define USB0_ERREN *(volatile uint8_t *)0x4007208C // Error Interrupt Enable Register -#define USB_ERREN_BTSERREN (uint8_t)0x80 // -#define USB_ERREN_DMAERREN (uint8_t)0x20 // -#define USB_ERREN_BTOERREN (uint8_t)0x10 // -#define USB_ERREN_DFN8EN (uint8_t)0x08 // -#define USB_ERREN_CRC16EN (uint8_t)0x04 // -#define USB_ERREN_CRC5EOFEN (uint8_t)0x02 // -#define USB_ERREN_PIDERREN (uint8_t)0x01 // -#define USB0_STAT *(volatile uint8_t *)0x40072090 // Status Register -#define USB_STAT_TX (uint8_t)0x08 // -#define USB_STAT_ODD (uint8_t)0x04 // -#define USB_STAT_ENDP(n) (uint8_t)((n) >> 4) // -#define USB0_CTL *(volatile uint8_t *)0x40072094 // Control Register -#define USB_CTL_JSTATE (uint8_t)0x80 // -#define USB_CTL_SE0 (uint8_t)0x40 // -#define USB_CTL_TXSUSPENDTOKENBUSY (uint8_t)0x20 // -#define USB_CTL_RESET (uint8_t)0x10 // -#define USB_CTL_HOSTMODEEN (uint8_t)0x08 // -#define USB_CTL_RESUME (uint8_t)0x04 // -#define USB_CTL_ODDRST (uint8_t)0x02 // -#define USB_CTL_USBENSOFEN (uint8_t)0x01 // -#define USB0_ADDR *(volatile uint8_t *)0x40072098 // Address Register -#define USB0_BDTPAGE1 *(volatile uint8_t *)0x4007209C // BDT Page Register 1 -#define USB0_FRMNUML *(volatile uint8_t *)0x400720A0 // Frame Number Register Low -#define USB0_FRMNUMH *(volatile uint8_t *)0x400720A4 // Frame Number Register High -#define USB0_TOKEN *(volatile uint8_t *)0x400720A8 // Token Register -#define USB0_SOFTHLD *(volatile uint8_t *)0x400720AC // SOF Threshold Register -#define USB0_BDTPAGE2 *(volatile uint8_t *)0x400720B0 // BDT Page Register 2 -#define USB0_BDTPAGE3 *(volatile uint8_t *)0x400720B4 // BDT Page Register 3 -#define USB0_ENDPT0 *(volatile uint8_t *)0x400720C0 // Endpoint Control Register -#define USB_ENDPT_HOSTWOHUB (uint8_t)0x80 // host only, enable low speed -#define USB_ENDPT_RETRYDIS (uint8_t)0x40 // host only, set to disable NAK retry -#define USB_ENDPT_EPCTLDIS (uint8_t)0x10 // 0=control, 1=bulk, interrupt, isync -#define USB_ENDPT_EPRXEN (uint8_t)0x08 // enables the endpoint for RX transfers. -#define USB_ENDPT_EPTXEN (uint8_t)0x04 // enables the endpoint for TX transfers. -#define USB_ENDPT_EPSTALL (uint8_t)0x02 // set to stall endpoint -#define USB_ENDPT_EPHSHK (uint8_t)0x01 // enable handshaking during a transaction, generally set unless Isochronous -#define USB0_ENDPT1 *(volatile uint8_t *)0x400720C4 // Endpoint Control Register -#define USB0_ENDPT2 *(volatile uint8_t *)0x400720C8 // Endpoint Control Register -#define USB0_ENDPT3 *(volatile uint8_t *)0x400720CC // Endpoint Control Register -#define USB0_ENDPT4 *(volatile uint8_t *)0x400720D0 // Endpoint Control Register -#define USB0_ENDPT5 *(volatile uint8_t *)0x400720D4 // Endpoint Control Register -#define USB0_ENDPT6 *(volatile uint8_t *)0x400720D8 // Endpoint Control Register -#define USB0_ENDPT7 *(volatile uint8_t *)0x400720DC // Endpoint Control Register -#define USB0_ENDPT8 *(volatile uint8_t *)0x400720E0 // Endpoint Control Register -#define USB0_ENDPT9 *(volatile uint8_t *)0x400720E4 // Endpoint Control Register -#define USB0_ENDPT10 *(volatile uint8_t *)0x400720E8 // Endpoint Control Register -#define USB0_ENDPT11 *(volatile uint8_t *)0x400720EC // Endpoint Control Register -#define USB0_ENDPT12 *(volatile uint8_t *)0x400720F0 // Endpoint Control Register -#define USB0_ENDPT13 *(volatile uint8_t *)0x400720F4 // Endpoint Control Register -#define USB0_ENDPT14 *(volatile uint8_t *)0x400720F8 // Endpoint Control Register -#define USB0_ENDPT15 *(volatile uint8_t *)0x400720FC // Endpoint Control Register -#define USB0_USBCTRL *(volatile uint8_t *)0x40072100 // USB Control Register -#define USB_USBCTRL_SUSP (uint8_t)0x80 // Places the USB transceiver into the suspend state. -#define USB_USBCTRL_PDE (uint8_t)0x40 // Enables the weak pulldowns on the USB transceiver. -#define USB0_OBSERVE *(volatile uint8_t *)0x40072104 // USB OTG Observe Register -#define USB_OBSERVE_DPPU (uint8_t)0x80 // -#define USB_OBSERVE_DPPD (uint8_t)0x40 // -#define USB_OBSERVE_DMPD (uint8_t)0x10 // -#define USB0_CONTROL *(volatile uint8_t *)0x40072108 // USB OTG Control Register -#define USB_CONTROL_DPPULLUPNONOTG (uint8_t)0x10 // Provides control of the DP PULLUP in the USB OTG module, if USB is configured in non-OTG device mode. -#define USB0_USBTRC0 *(volatile uint8_t *)0x4007210C // USB Transceiver Control Register 0 -#define USB_USBTRC_USBRESET (uint8_t)0x80 // -#define USB_USBTRC_USBRESMEN (uint8_t)0x20 // -#define USB_USBTRC_SYNC_DET (uint8_t)0x02 // -#define USB_USBTRC_USB_RESUME_INT (uint8_t)0x01 // -#define USB0_USBFRMADJUST *(volatile uint8_t *)0x40072114 // Frame Adjust Register - -// Chapter 41: USB Device Charger Detection Module (USBDCD) -#define USBDCD_CONTROL *(volatile uint32_t *)0x40035000 // Control register -#define USBDCD_CLOCK *(volatile uint32_t *)0x40035004 // Clock register -#define USBDCD_STATUS *(volatile uint32_t *)0x40035008 // Status register -#define USBDCD_TIMER0 *(volatile uint32_t *)0x40035010 // TIMER0 register -#define USBDCD_TIMER1 *(volatile uint32_t *)0x40035014 // TIMER1 register -#define USBDCD_TIMER2 *(volatile uint32_t *)0x40035018 // TIMER2 register - -// Chapter 43: SPI (DSPI) -#define SPI0_MCR *(volatile uint32_t *)0x4002C000 // DSPI Module Configuration Register -#define SPI_MCR_MSTR (uint32_t)0x80000000 // Master/Slave Mode Select -#define SPI_MCR_CONT_SCKE (uint32_t)0x40000000 // -#define SPI_MCR_DCONF(n) (((n) & 3) << 28) // -#define SPI_MCR_FRZ (uint32_t)0x08000000 // -#define SPI_MCR_MTFE (uint32_t)0x04000000 // -#define SPI_MCR_ROOE (uint32_t)0x01000000 // -#define SPI_MCR_PCSIS(n) (((n) & 0x1F) << 16) // -#define SPI_MCR_DOZE (uint32_t)0x00008000 // -#define SPI_MCR_MDIS (uint32_t)0x00004000 // -#define SPI_MCR_DIS_TXF (uint32_t)0x00002000 // -#define SPI_MCR_DIS_RXF (uint32_t)0x00001000 // -#define SPI_MCR_CLR_TXF (uint32_t)0x00000800 // -#define SPI_MCR_CLR_RXF (uint32_t)0x00000400 // -#define SPI_MCR_SMPL_PT(n) (((n) & 3) << 8) // -#define SPI_MCR_HALT (uint32_t)0x00000001 // -#define SPI0_TCR *(volatile uint32_t *)0x4002C008 // DSPI Transfer Count Register -#define SPI0_CTAR0 *(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Master Mode -#define SPI_CTAR_DBR (uint32_t)0x80000000 // Double Baud Rate -#define SPI_CTAR_FMSZ(n) (((n) & 15) << 27) // Frame Size (+1) -#define SPI_CTAR_CPOL (uint32_t)0x04000000 // Clock Polarity -#define SPI_CTAR_CPHA (uint32_t)0x02000000 // Clock Phase -#define SPI_CTAR_LSBFE (uint32_t)0x01000000 // LSB First -#define SPI_CTAR_PCSSCK(n) (((n) & 3) << 22) // PCS to SCK Delay Prescaler -#define SPI_CTAR_PASC(n) (((n) & 3) << 20) // After SCK Delay Prescaler -#define SPI_CTAR_PDT(n) (((n) & 3) << 18) // Delay after Transfer Prescaler -#define SPI_CTAR_PBR(n) (((n) & 3) << 16) // Baud Rate Prescaler -#define SPI_CTAR_CSSCK(n) (((n) & 15) << 12) // PCS to SCK Delay Scaler -#define SPI_CTAR_ASC(n) (((n) & 15) << 8) // After SCK Delay Scaler -#define SPI_CTAR_DT(n) (((n) & 15) << 4) // Delay After Transfer Scaler -#define SPI_CTAR_BR(n) (((n) & 15) << 0) // Baud Rate Scaler -#define SPI0_CTAR0_SLAVE *(volatile uint32_t *)0x4002C00C // DSPI Clock and Transfer Attributes Register, In Slave Mode -#define SPI0_CTAR1 *(volatile uint32_t *)0x4002C010 // DSPI Clock and Transfer Attributes Register, In Master Mode -#define SPI0_SR *(volatile uint32_t *)0x4002C02C // DSPI Status Register -#define SPI_SR_TCF (uint32_t)0x80000000 // Transfer Complete Flag -#define SPI_SR_TXRXS (uint32_t)0x40000000 // TX and RX Status -#define SPI_SR_EOQF (uint32_t)0x10000000 // End of Queue Flag -#define SPI_SR_TFUF (uint32_t)0x08000000 // Transmit FIFO Underflow Flag -#define SPI_SR_TFFF (uint32_t)0x02000000 // Transmit FIFO Fill Flag -#define SPI_SR_RFOF (uint32_t)0x00080000 // Receive FIFO Overflow Flag -#define SPI_SR_RFDF (uint32_t)0x00020000 // Receive FIFO Drain Flag -#define SPI0_RSER *(volatile uint32_t *)0x4002C030 // DSPI DMA/Interrupt Request Select and Enable Register -#define SPI_RSER_TCF_RE (uint32_t)0x80000000 // Transmission Complete Request Enable -#define SPI_RSER_EOQF_RE (uint32_t)0x10000000 // DSPI Finished Request Request Enable -#define SPI_RSER_TFUF_RE (uint32_t)0x08000000 // Transmit FIFO Underflow Request Enable -#define SPI_RSER_TFFF_RE (uint32_t)0x02000000 // Transmit FIFO Fill Request Enable -#define SPI_RSER_TFFF_DIRS (uint32_t)0x01000000 // Transmit FIFO FIll Dma or Interrupt Request Select -#define SPI_RSER_RFOF_RE (uint32_t)0x00080000 // Receive FIFO Overflow Request Enable -#define SPI_RSER_RFDF_RE (uint32_t)0x00020000 // Receive FIFO Drain Request Enable -#define SPI_RSER_RFDF_DIRS (uint32_t)0x00010000 // Receive FIFO Drain DMA or Interrupt Request Select -#define SPI0_PUSHR *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Master Mode -#define SPI_PUSHR_CONT (uint32_t)0x80000000 // -#define SPI_PUSHR_CTAS(n) (((n) & 7) << 28) // -#define SPI_PUSHR_EOQ (uint32_t)0x08000000 // -#define SPI_PUSHR_CTCNT (uint32_t)0x04000000 // -#define SPI_PUSHR_PCS(n) (((n) & 31) << 16) // -#define SPI0_PUSHR_SLAVE *(volatile uint32_t *)0x4002C034 // DSPI PUSH TX FIFO Register In Slave Mode -#define SPI0_POPR *(volatile uint32_t *)0x4002C038 // DSPI POP RX FIFO Register -#define SPI0_TXFR0 *(volatile uint32_t *)0x4002C03C // DSPI Transmit FIFO Registers -#define SPI0_TXFR1 *(volatile uint32_t *)0x4002C040 // DSPI Transmit FIFO Registers -#define SPI0_TXFR2 *(volatile uint32_t *)0x4002C044 // DSPI Transmit FIFO Registers -#define SPI0_TXFR3 *(volatile uint32_t *)0x4002C048 // DSPI Transmit FIFO Registers -#define SPI0_RXFR0 *(volatile uint32_t *)0x4002C07C // DSPI Receive FIFO Registers -#define SPI0_RXFR1 *(volatile uint32_t *)0x4002C080 // DSPI Receive FIFO Registers -#define SPI0_RXFR2 *(volatile uint32_t *)0x4002C084 // DSPI Receive FIFO Registers -#define SPI0_RXFR3 *(volatile uint32_t *)0x4002C088 // DSPI Receive FIFO Registers -typedef struct { - volatile uint32_t MCR; // 0 - volatile uint32_t unused1;// 4 - volatile uint32_t TCR; // 8 - volatile uint32_t CTAR0; // c - volatile uint32_t CTAR1; // 10 - volatile uint32_t CTAR2; // 14 - volatile uint32_t CTAR3; // 18 - volatile uint32_t CTAR4; // 1c - volatile uint32_t CTAR5; // 20 - volatile uint32_t CTAR6; // 24 - volatile uint32_t CTAR7; // 28 - volatile uint32_t SR; // 2c - volatile uint32_t RSER; // 30 - volatile uint32_t PUSHR; // 34 - volatile uint32_t POPR; // 38 - volatile uint32_t TXFR[16]; // 3c - volatile uint32_t RXFR[16]; // 7c -} SPI_t; -#define SPI0 (*(SPI_t *)0x4002C000) - -// Chapter 44: Inter-Integrated Circuit (I2C) -#define I2C0_A1 *(volatile uint8_t *)0x40066000 // I2C Address Register 1 -#define I2C0_F *(volatile uint8_t *)0x40066001 // I2C Frequency Divider register -#define I2C0_C1 *(volatile uint8_t *)0x40066002 // I2C Control Register 1 -#define I2C_C1_IICEN (uint8_t)0x80 // I2C Enable -#define I2C_C1_IICIE (uint8_t)0x40 // I2C Interrupt Enable -#define I2C_C1_MST (uint8_t)0x20 // Master Mode Select -#define I2C_C1_TX (uint8_t)0x10 // Transmit Mode Select -#define I2C_C1_TXAK (uint8_t)0x08 // Transmit Acknowledge Enable -#define I2C_C1_RSTA (uint8_t)0x04 // Repeat START -#define I2C_C1_WUEN (uint8_t)0x02 // Wakeup Enable -#define I2C_C1_DMAEN (uint8_t)0x01 // DMA Enable -#define I2C0_S *(volatile uint8_t *)0x40066003 // I2C Status register -#define I2C_S_TCF (uint8_t)0x80 // Transfer Complete Flag -#define I2C_S_IAAS (uint8_t)0x40 // Addressed As A Slave -#define I2C_S_BUSY (uint8_t)0x20 // Bus Busy -#define I2C_S_ARBL (uint8_t)0x10 // Arbitration Lost -#define I2C_S_RAM (uint8_t)0x08 // Range Address Match -#define I2C_S_SRW (uint8_t)0x04 // Slave Read/Write -#define I2C_S_IICIF (uint8_t)0x02 // Interrupt Flag -#define I2C_S_RXAK (uint8_t)0x01 // Receive Acknowledge -#define I2C0_D *(volatile uint8_t *)0x40066004 // I2C Data I/O register -#define I2C0_C2 *(volatile uint8_t *)0x40066005 // I2C Control Register 2 -#define I2C_C2_GCAEN (uint8_t)0x80 // General Call Address Enable -#define I2C_C2_ADEXT (uint8_t)0x40 // Address Extension -#define I2C_C2_HDRS (uint8_t)0x20 // High Drive Select -#define I2C_C2_SBRC (uint8_t)0x10 // Slave Baud Rate Control -#define I2C_C2_RMEN (uint8_t)0x08 // Range Address Matching Enable -#define I2C_C2_AD(n) ((n) & 7) // Slave Address, upper 3 bits -#define I2C0_FLT *(volatile uint8_t *)0x40066006 // I2C Programmable Input Glitch Filter register -#define I2C0_RA *(volatile uint8_t *)0x40066007 // I2C Range Address register -#define I2C0_SMB *(volatile uint8_t *)0x40066008 // I2C SMBus Control and Status register -#define I2C0_A2 *(volatile uint8_t *)0x40066009 // I2C Address Register 2 -#define I2C0_SLTH *(volatile uint8_t *)0x4006600A // I2C SCL Low Timeout Register High -#define I2C0_SLTL *(volatile uint8_t *)0x4006600B // I2C SCL Low Timeout Register Low - -#define I2C1_A1 *(volatile uint8_t *)0x40067000 // I2C Address Register 1 -#define I2C1_F *(volatile uint8_t *)0x40067001 // I2C Frequency Divider register -#define I2C1_C1 *(volatile uint8_t *)0x40067002 // I2C Control Register 1 -#define I2C1_S *(volatile uint8_t *)0x40067003 // I2C Status register -#define I2C1_D *(volatile uint8_t *)0x40067004 // I2C Data I/O register -#define I2C1_C2 *(volatile uint8_t *)0x40067005 // I2C Control Register 2 -#define I2C1_FLT *(volatile uint8_t *)0x40067006 // I2C Programmable Input Glitch Filter register -#define I2C1_RA *(volatile uint8_t *)0x40067007 // I2C Range Address register -#define I2C1_SMB *(volatile uint8_t *)0x40067008 // I2C SMBus Control and Status register -#define I2C1_A2 *(volatile uint8_t *)0x40067009 // I2C Address Register 2 -#define I2C1_SLTH *(volatile uint8_t *)0x4006700A // I2C SCL Low Timeout Register High -#define I2C1_SLTL *(volatile uint8_t *)0x4006700B // I2C SCL Low Timeout Register Low - -// Chapter 45: Universal Asynchronous Receiver/Transmitter (UART) -#define UART0_BDH *(volatile uint8_t *)0x4006A000 // UART Baud Rate Registers: High -#define UART0_BDL *(volatile uint8_t *)0x4006A001 // UART Baud Rate Registers: Low -#define UART0_C1 *(volatile uint8_t *)0x4006A002 // UART Control Register 1 -#define UART_C1_LOOPS (uint8_t)0x80 // When LOOPS is set, the RxD pin is disconnected from the UART and the transmitter output is internally connected to the receiver input -#define UART_C1_UARTSWAI (uint8_t)0x40 // UART Stops in Wait Mode -#define UART_C1_RSRC (uint8_t)0x20 // When LOOPS is set, the RSRC field determines the source for the receiver shift register input -#define UART_C1_M (uint8_t)0x10 // 9-bit or 8-bit Mode Select -#define UART_C1_WAKE (uint8_t)0x08 // Determines which condition wakes the UART -#define UART_C1_ILT (uint8_t)0x04 // Idle Line Type Select -#define UART_C1_PE (uint8_t)0x02 // Parity Enable -#define UART_C1_PT (uint8_t)0x01 // Parity Type, 0=even, 1=odd -#define UART0_C2 *(volatile uint8_t *)0x4006A003 // UART Control Register 2 -#define UART_C2_TIE (uint8_t)0x80 // Transmitter Interrupt or DMA Transfer Enable. -#define UART_C2_TCIE (uint8_t)0x40 // Transmission Complete Interrupt Enable -#define UART_C2_RIE (uint8_t)0x20 // Receiver Full Interrupt or DMA Transfer Enable -#define UART_C2_ILIE (uint8_t)0x10 // Idle Line Interrupt Enable -#define UART_C2_TE (uint8_t)0x08 // Transmitter Enable -#define UART_C2_RE (uint8_t)0x04 // Receiver Enable -#define UART_C2_RWU (uint8_t)0x02 // Receiver Wakeup Control -#define UART_C2_SBK (uint8_t)0x01 // Send Break -#define UART0_S1 *(volatile uint8_t *)0x4006A004 // UART Status Register 1 -#define UART_S1_TDRE (uint8_t)0x80 // Transmit Data Register Empty Flag -#define UART_S1_TC (uint8_t)0x40 // Transmit Complete Flag -#define UART_S1_RDRF (uint8_t)0x20 // Receive Data Register Full Flag -#define UART_S1_IDLE (uint8_t)0x10 // Idle Line Flag -#define UART_S1_OR (uint8_t)0x08 // Receiver Overrun Flag -#define UART_S1_NF (uint8_t)0x04 // Noise Flag -#define UART_S1_FE (uint8_t)0x02 // Framing Error Flag -#define UART_S1_PF (uint8_t)0x01 // Parity Error Flag -#define UART0_S2 *(volatile uint8_t *)0x4006A005 // UART Status Register 2 -#define UART0_C3 *(volatile uint8_t *)0x4006A006 // UART Control Register 3 -#define UART0_D *(volatile uint8_t *)0x4006A007 // UART Data Register -#define UART0_MA1 *(volatile uint8_t *)0x4006A008 // UART Match Address Registers 1 -#define UART0_MA2 *(volatile uint8_t *)0x4006A009 // UART Match Address Registers 2 -#define UART0_C4 *(volatile uint8_t *)0x4006A00A // UART Control Register 4 -#define UART0_C5 *(volatile uint8_t *)0x4006A00B // UART Control Register 5 -#define UART0_ED *(volatile uint8_t *)0x4006A00C // UART Extended Data Register -#define UART0_MODEM *(volatile uint8_t *)0x4006A00D // UART Modem Register -#define UART0_IR *(volatile uint8_t *)0x4006A00E // UART Infrared Register -#define UART0_PFIFO *(volatile uint8_t *)0x4006A010 // UART FIFO Parameters -#define UART_PFIFO_TXFE (uint8_t)0x80 -#define UART_PFIFO_RXFE (uint8_t)0x08 -#define UART0_CFIFO *(volatile uint8_t *)0x4006A011 // UART FIFO Control Register -#define UART_CFIFO_TXFLUSH (uint8_t)0x80 // -#define UART_CFIFO_RXFLUSH (uint8_t)0x40 // -#define UART_CFIFO_RXOFE (uint8_t)0x04 // -#define UART_CFIFO_TXOFE (uint8_t)0x02 // -#define UART_CFIFO_RXUFE (uint8_t)0x01 // -#define UART0_SFIFO *(volatile uint8_t *)0x4006A012 // UART FIFO Status Register -#define UART_SFIFO_TXEMPT (uint8_t)0x80 -#define UART_SFIFO_RXEMPT (uint8_t)0x40 -#define UART_SFIFO_RXOF (uint8_t)0x04 -#define UART_SFIFO_TXOF (uint8_t)0x02 -#define UART_SFIFO_RXUF (uint8_t)0x01 -#define UART0_TWFIFO *(volatile uint8_t *)0x4006A013 // UART FIFO Transmit Watermark -#define UART0_TCFIFO *(volatile uint8_t *)0x4006A014 // UART FIFO Transmit Count -#define UART0_RWFIFO *(volatile uint8_t *)0x4006A015 // UART FIFO Receive Watermark -#define UART0_RCFIFO *(volatile uint8_t *)0x4006A016 // UART FIFO Receive Count -#define UART0_C7816 *(volatile uint8_t *)0x4006A018 // UART 7816 Control Register -#define UART0_IE7816 *(volatile uint8_t *)0x4006A019 // UART 7816 Interrupt Enable Register -#define UART0_IS7816 *(volatile uint8_t *)0x4006A01A // UART 7816 Interrupt Status Register -#define UART0_WP7816T0 *(volatile uint8_t *)0x4006A01B // UART 7816 Wait Parameter Register -#define UART0_WP7816T1 *(volatile uint8_t *)0x4006A01B // UART 7816 Wait Parameter Register -#define UART0_WN7816 *(volatile uint8_t *)0x4006A01C // UART 7816 Wait N Register -#define UART0_WF7816 *(volatile uint8_t *)0x4006A01D // UART 7816 Wait FD Register -#define UART0_ET7816 *(volatile uint8_t *)0x4006A01E // UART 7816 Error Threshold Register -#define UART0_TL7816 *(volatile uint8_t *)0x4006A01F // UART 7816 Transmit Length Register -#define UART0_C6 *(volatile uint8_t *)0x4006A021 // UART CEA709.1-B Control Register 6 -#define UART0_PCTH *(volatile uint8_t *)0x4006A022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART0_PCTL *(volatile uint8_t *)0x4006A023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART0_B1T *(volatile uint8_t *)0x4006A024 // UART CEA709.1-B Beta1 Timer -#define UART0_SDTH *(volatile uint8_t *)0x4006A025 // UART CEA709.1-B Secondary Delay Timer High -#define UART0_SDTL *(volatile uint8_t *)0x4006A026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART0_PRE *(volatile uint8_t *)0x4006A027 // UART CEA709.1-B Preamble -#define UART0_TPL *(volatile uint8_t *)0x4006A028 // UART CEA709.1-B Transmit Packet Length -#define UART0_IE *(volatile uint8_t *)0x4006A029 // UART CEA709.1-B Interrupt Enable Register -#define UART0_WB *(volatile uint8_t *)0x4006A02A // UART CEA709.1-B WBASE -#define UART0_S3 *(volatile uint8_t *)0x4006A02B // UART CEA709.1-B Status Register -#define UART0_S4 *(volatile uint8_t *)0x4006A02C // UART CEA709.1-B Status Register -#define UART0_RPL *(volatile uint8_t *)0x4006A02D // UART CEA709.1-B Received Packet Length -#define UART0_RPREL *(volatile uint8_t *)0x4006A02E // UART CEA709.1-B Received Preamble Length -#define UART0_CPW *(volatile uint8_t *)0x4006A02F // UART CEA709.1-B Collision Pulse Width -#define UART0_RIDT *(volatile uint8_t *)0x4006A030 // UART CEA709.1-B Receive Indeterminate Time -#define UART0_TIDT *(volatile uint8_t *)0x4006A031 // UART CEA709.1-B Transmit Indeterminate Time -#define UART1_BDH *(volatile uint8_t *)0x4006B000 // UART Baud Rate Registers: High -#define UART1_BDL *(volatile uint8_t *)0x4006B001 // UART Baud Rate Registers: Low -#define UART1_C1 *(volatile uint8_t *)0x4006B002 // UART Control Register 1 -#define UART1_C2 *(volatile uint8_t *)0x4006B003 // UART Control Register 2 -#define UART1_S1 *(volatile uint8_t *)0x4006B004 // UART Status Register 1 -#define UART1_S2 *(volatile uint8_t *)0x4006B005 // UART Status Register 2 -#define UART1_C3 *(volatile uint8_t *)0x4006B006 // UART Control Register 3 -#define UART1_D *(volatile uint8_t *)0x4006B007 // UART Data Register -#define UART1_MA1 *(volatile uint8_t *)0x4006B008 // UART Match Address Registers 1 -#define UART1_MA2 *(volatile uint8_t *)0x4006B009 // UART Match Address Registers 2 -#define UART1_C4 *(volatile uint8_t *)0x4006B00A // UART Control Register 4 -#define UART1_C5 *(volatile uint8_t *)0x4006B00B // UART Control Register 5 -#define UART1_ED *(volatile uint8_t *)0x4006B00C // UART Extended Data Register -#define UART1_MODEM *(volatile uint8_t *)0x4006B00D // UART Modem Register -#define UART1_IR *(volatile uint8_t *)0x4006B00E // UART Infrared Register -#define UART1_PFIFO *(volatile uint8_t *)0x4006B010 // UART FIFO Parameters -#define UART1_CFIFO *(volatile uint8_t *)0x4006B011 // UART FIFO Control Register -#define UART1_SFIFO *(volatile uint8_t *)0x4006B012 // UART FIFO Status Register -#define UART1_TWFIFO *(volatile uint8_t *)0x4006B013 // UART FIFO Transmit Watermark -#define UART1_TCFIFO *(volatile uint8_t *)0x4006B014 // UART FIFO Transmit Count -#define UART1_RWFIFO *(volatile uint8_t *)0x4006B015 // UART FIFO Receive Watermark -#define UART1_RCFIFO *(volatile uint8_t *)0x4006B016 // UART FIFO Receive Count -#define UART1_C7816 *(volatile uint8_t *)0x4006B018 // UART 7816 Control Register -#define UART1_IE7816 *(volatile uint8_t *)0x4006B019 // UART 7816 Interrupt Enable Register -#define UART1_IS7816 *(volatile uint8_t *)0x4006B01A // UART 7816 Interrupt Status Register -#define UART1_WP7816T0 *(volatile uint8_t *)0x4006B01B // UART 7816 Wait Parameter Register -#define UART1_WP7816T1 *(volatile uint8_t *)0x4006B01B // UART 7816 Wait Parameter Register -#define UART1_WN7816 *(volatile uint8_t *)0x4006B01C // UART 7816 Wait N Register -#define UART1_WF7816 *(volatile uint8_t *)0x4006B01D // UART 7816 Wait FD Register -#define UART1_ET7816 *(volatile uint8_t *)0x4006B01E // UART 7816 Error Threshold Register -#define UART1_TL7816 *(volatile uint8_t *)0x4006B01F // UART 7816 Transmit Length Register -#define UART1_C6 *(volatile uint8_t *)0x4006B021 // UART CEA709.1-B Control Register 6 -#define UART1_PCTH *(volatile uint8_t *)0x4006B022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART1_PCTL *(volatile uint8_t *)0x4006B023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART1_B1T *(volatile uint8_t *)0x4006B024 // UART CEA709.1-B Beta1 Timer -#define UART1_SDTH *(volatile uint8_t *)0x4006B025 // UART CEA709.1-B Secondary Delay Timer High -#define UART1_SDTL *(volatile uint8_t *)0x4006B026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART1_PRE *(volatile uint8_t *)0x4006B027 // UART CEA709.1-B Preamble -#define UART1_TPL *(volatile uint8_t *)0x4006B028 // UART CEA709.1-B Transmit Packet Length -#define UART1_IE *(volatile uint8_t *)0x4006B029 // UART CEA709.1-B Interrupt Enable Register -#define UART1_WB *(volatile uint8_t *)0x4006B02A // UART CEA709.1-B WBASE -#define UART1_S3 *(volatile uint8_t *)0x4006B02B // UART CEA709.1-B Status Register -#define UART1_S4 *(volatile uint8_t *)0x4006B02C // UART CEA709.1-B Status Register -#define UART1_RPL *(volatile uint8_t *)0x4006B02D // UART CEA709.1-B Received Packet Length -#define UART1_RPREL *(volatile uint8_t *)0x4006B02E // UART CEA709.1-B Received Preamble Length -#define UART1_CPW *(volatile uint8_t *)0x4006B02F // UART CEA709.1-B Collision Pulse Width -#define UART1_RIDT *(volatile uint8_t *)0x4006B030 // UART CEA709.1-B Receive Indeterminate Time -#define UART1_TIDT *(volatile uint8_t *)0x4006B031 // UART CEA709.1-B Transmit Indeterminate Time -#define UART2_BDH *(volatile uint8_t *)0x4006C000 // UART Baud Rate Registers: High -#define UART2_BDL *(volatile uint8_t *)0x4006C001 // UART Baud Rate Registers: Low -#define UART2_C1 *(volatile uint8_t *)0x4006C002 // UART Control Register 1 -#define UART2_C2 *(volatile uint8_t *)0x4006C003 // UART Control Register 2 -#define UART2_S1 *(volatile uint8_t *)0x4006C004 // UART Status Register 1 -#define UART2_S2 *(volatile uint8_t *)0x4006C005 // UART Status Register 2 -#define UART2_C3 *(volatile uint8_t *)0x4006C006 // UART Control Register 3 -#define UART2_D *(volatile uint8_t *)0x4006C007 // UART Data Register -#define UART2_MA1 *(volatile uint8_t *)0x4006C008 // UART Match Address Registers 1 -#define UART2_MA2 *(volatile uint8_t *)0x4006C009 // UART Match Address Registers 2 -#define UART2_C4 *(volatile uint8_t *)0x4006C00A // UART Control Register 4 -#define UART2_C5 *(volatile uint8_t *)0x4006C00B // UART Control Register 5 -#define UART2_ED *(volatile uint8_t *)0x4006C00C // UART Extended Data Register -#define UART2_MODEM *(volatile uint8_t *)0x4006C00D // UART Modem Register -#define UART2_IR *(volatile uint8_t *)0x4006C00E // UART Infrared Register -#define UART2_PFIFO *(volatile uint8_t *)0x4006C010 // UART FIFO Parameters -#define UART2_CFIFO *(volatile uint8_t *)0x4006C011 // UART FIFO Control Register -#define UART2_SFIFO *(volatile uint8_t *)0x4006C012 // UART FIFO Status Register -#define UART2_TWFIFO *(volatile uint8_t *)0x4006C013 // UART FIFO Transmit Watermark -#define UART2_TCFIFO *(volatile uint8_t *)0x4006C014 // UART FIFO Transmit Count -#define UART2_RWFIFO *(volatile uint8_t *)0x4006C015 // UART FIFO Receive Watermark -#define UART2_RCFIFO *(volatile uint8_t *)0x4006C016 // UART FIFO Receive Count -#define UART2_C7816 *(volatile uint8_t *)0x4006C018 // UART 7816 Control Register -#define UART2_IE7816 *(volatile uint8_t *)0x4006C019 // UART 7816 Interrupt Enable Register -#define UART2_IS7816 *(volatile uint8_t *)0x4006C01A // UART 7816 Interrupt Status Register -#define UART2_WP7816T0 *(volatile uint8_t *)0x4006C01B // UART 7816 Wait Parameter Register -#define UART2_WP7816T1 *(volatile uint8_t *)0x4006C01B // UART 7816 Wait Parameter Register -#define UART2_WN7816 *(volatile uint8_t *)0x4006C01C // UART 7816 Wait N Register -#define UART2_WF7816 *(volatile uint8_t *)0x4006C01D // UART 7816 Wait FD Register -#define UART2_ET7816 *(volatile uint8_t *)0x4006C01E // UART 7816 Error Threshold Register -#define UART2_TL7816 *(volatile uint8_t *)0x4006C01F // UART 7816 Transmit Length Register -#define UART2_C6 *(volatile uint8_t *)0x4006C021 // UART CEA709.1-B Control Register 6 -#define UART2_PCTH *(volatile uint8_t *)0x4006C022 // UART CEA709.1-B Packet Cycle Time Counter High -#define UART2_PCTL *(volatile uint8_t *)0x4006C023 // UART CEA709.1-B Packet Cycle Time Counter Low -#define UART2_B1T *(volatile uint8_t *)0x4006C024 // UART CEA709.1-B Beta1 Timer -#define UART2_SDTH *(volatile uint8_t *)0x4006C025 // UART CEA709.1-B Secondary Delay Timer High -#define UART2_SDTL *(volatile uint8_t *)0x4006C026 // UART CEA709.1-B Secondary Delay Timer Low -#define UART2_PRE *(volatile uint8_t *)0x4006C027 // UART CEA709.1-B Preamble -#define UART2_TPL *(volatile uint8_t *)0x4006C028 // UART CEA709.1-B Transmit Packet Length -#define UART2_IE *(volatile uint8_t *)0x4006C029 // UART CEA709.1-B Interrupt Enable Register -#define UART2_WB *(volatile uint8_t *)0x4006C02A // UART CEA709.1-B WBASE -#define UART2_S3 *(volatile uint8_t *)0x4006C02B // UART CEA709.1-B Status Register -#define UART2_S4 *(volatile uint8_t *)0x4006C02C // UART CEA709.1-B Status Register -#define UART2_RPL *(volatile uint8_t *)0x4006C02D // UART CEA709.1-B Received Packet Length -#define UART2_RPREL *(volatile uint8_t *)0x4006C02E // UART CEA709.1-B Received Preamble Length -#define UART2_CPW *(volatile uint8_t *)0x4006C02F // UART CEA709.1-B Collision Pulse Width -#define UART2_RIDT *(volatile uint8_t *)0x4006C030 // UART CEA709.1-B Receive Indeterminate Time -#define UART2_TIDT *(volatile uint8_t *)0x4006C031 // UART CEA709.1-B Transmit Indeterminate Time - -// Chapter 46: Synchronous Audio Interface (SAI) -#define I2S0_TCSR *(volatile uint32_t *)0x4002F000 // SAI Transmit Control Register -#define I2S_TCSR_TE (uint32_t)0x80000000 // Transmitter Enable -#define I2S_TCSR_STOPE (uint32_t)0x40000000 // Transmitter Enable in Stop mode -#define I2S_TCSR_DBGE (uint32_t)0x20000000 // Transmitter Enable in Debug mode -#define I2S_TCSR_BCE (uint32_t)0x10000000 // Bit Clock Enable -#define I2S_TCSR_FR (uint32_t)0x02000000 // FIFO Reset -#define I2S_TCSR_SR (uint32_t)0x01000000 // Software Reset -#define I2S_TCSR_WSF (uint32_t)0x00100000 // Word Start Flag -#define I2S_TCSR_SEF (uint32_t)0x00080000 // Sync Error Flag -#define I2S_TCSR_FEF (uint32_t)0x00040000 // FIFO Error Flag (underrun) -#define I2S_TCSR_FWF (uint32_t)0x00020000 // FIFO Warning Flag (empty) -#define I2S_TCSR_FRF (uint32_t)0x00010000 // FIFO Request Flag (Data Ready) -#define I2S_TCSR_WSIE (uint32_t)0x00001000 // Word Start Interrupt Enable -#define I2S_TCSR_SEIE (uint32_t)0x00000800 // Sync Error Interrupt Enable -#define I2S_TCSR_FEIE (uint32_t)0x00000400 // FIFO Error Interrupt Enable -#define I2S_TCSR_FWIE (uint32_t)0x00000200 // FIFO Warning Interrupt Enable -#define I2S_TCSR_FRIE (uint32_t)0x00000100 // FIFO Request Interrupt Enable -#define I2S_TCSR_FWDE (uint32_t)0x00000002 // FIFO Warning DMA Enable -#define I2S_TCSR_FRDE (uint32_t)0x00000001 // FIFO Request DMA Enable -#define I2S0_TCR1 *(volatile uint32_t *)0x4002F004 // SAI Transmit Configuration 1 Register -#define I2S_TCR1_TFW(n) ((uint32_t)n & 0x03) // Transmit FIFO watermark -#define I2S0_TCR2 *(volatile uint32_t *)0x4002F008 // SAI Transmit Configuration 2 Register -#define I2S_TCR2_DIV(n) ((uint32_t)n & 0xff) // Bit clock divide by (DIV+1)*2 -#define I2S_TCR2_BCD ((uint32_t)1<<24) // Bit clock direction -#define I2S_TCR2_BCP ((uint32_t)1<<25) // Bit clock polarity -#define I2S_TCR2_MSEL(n) ((uint32_t)(n & 3)<<26) // MCLK select, 0=bus clock, 1=I2S0_MCLK -#define I2S_TCR2_BCI ((uint32_t)1<<28) // Bit clock input -#define I2S_TCR2_BCS ((uint32_t)1<<29) // Bit clock swap -#define I2S_TCR2_SYNC(n) ((uint32_t)(n & 3)<<30) // 0=async 1=sync with receiver -#define I2S0_TCR3 *(volatile uint32_t *)0x4002F00C // SAI Transmit Configuration 3 Register -#define I2S_TCR3_WDFL(n) ((uint32_t)n & 0x0f) // word flag configuration -#define I2S_TCR3_TCE ((uint32_t)0x10000) // transmit channel enable -#define I2S0_TCR4 *(volatile uint32_t *)0x4002F010 // SAI Transmit Configuration 4 Register -#define I2S_TCR4_FSD ((uint32_t)1) // Frame Sync Direction -#define I2S_TCR4_FSP ((uint32_t)2) // Frame Sync Polarity -#define I2S_TCR4_FSE ((uint32_t)8) // Frame Sync Early -#define I2S_TCR4_MF ((uint32_t)0x10) // MSB First -#define I2S_TCR4_SYWD(n) ((uint32_t)(n & 0x1f)<<8) // Sync Width -#define I2S_TCR4_FRSZ(n) ((uint32_t)(n & 0x0f)<<16) // Frame Size -#define I2S0_TCR5 *(volatile uint32_t *)0x4002F014 // SAI Transmit Configuration 5 Register -#define I2S_TCR5_FBT(n) ((uint32_t)(n & 0x1f)<<8) // First Bit Shifted -#define I2S_TCR5_W0W(n) ((uint32_t)(n & 0x1f)<<16) // Word 0 Width -#define I2S_TCR5_WNW(n) ((uint32_t)(n & 0x1f)<<24) // Word N Width -#define I2S0_TDR0 *(volatile uint32_t *)0x4002F020 // SAI Transmit Data Register -#define I2S0_TDR1 *(volatile uint32_t *)0x4002F024 // SAI Transmit Data Register -#define I2S0_TFR0 *(volatile uint32_t *)0x4002F040 // SAI Transmit FIFO Register -#define I2S0_TFR1 *(volatile uint32_t *)0x4002F044 // SAI Transmit FIFO Register -#define I2S_TFR_RFP(n) ((uint32_t)n & 7) // read FIFO pointer -#define I2S_TFR_WFP(n) ((uint32_t)(n & 7)<<16) // write FIFO pointer -#define I2S0_TMR *(volatile uint32_t *)0x4002F060 // SAI Transmit Mask Register -#define I2S_TMR_TWM(n) ((uint32_t)n & 0xFFFFFFFF) -#define I2S0_RCSR *(volatile uint32_t *)0x4002F080 // SAI Receive Control Register -#define I2S_RCSR_RE (uint32_t)0x80000000 // Receiver Enable -#define I2S_RCSR_STOPE (uint32_t)0x40000000 // Receiver Enable in Stop mode -#define I2S_RCSR_DBGE (uint32_t)0x20000000 // Receiver Enable in Debug mode -#define I2S_RCSR_BCE (uint32_t)0x10000000 // Bit Clock Enable -#define I2S_RCSR_FR (uint32_t)0x02000000 // FIFO Reset -#define I2S_RCSR_SR (uint32_t)0x01000000 // Software Reset -#define I2S_RCSR_WSF (uint32_t)0x00100000 // Word Start Flag -#define I2S_RCSR_SEF (uint32_t)0x00080000 // Sync Error Flag -#define I2S_RCSR_FEF (uint32_t)0x00040000 // FIFO Error Flag (underrun) -#define I2S_RCSR_FWF (uint32_t)0x00020000 // FIFO Warning Flag (empty) -#define I2S_RCSR_FRF (uint32_t)0x00010000 // FIFO Request Flag (Data Ready) -#define I2S_RCSR_WSIE (uint32_t)0x00001000 // Word Start Interrupt Enable -#define I2S_RCSR_SEIE (uint32_t)0x00000800 // Sync Error Interrupt Enable -#define I2S_RCSR_FEIE (uint32_t)0x00000400 // FIFO Error Interrupt Enable -#define I2S_RCSR_FWIE (uint32_t)0x00000200 // FIFO Warning Interrupt Enable -#define I2S_RCSR_FRIE (uint32_t)0x00000100 // FIFO Request Interrupt Enable -#define I2S_RCSR_FWDE (uint32_t)0x00000002 // FIFO Warning DMA Enable -#define I2S_RCSR_FRDE (uint32_t)0x00000001 // FIFO Request DMA Enable -#define I2S0_RCR1 *(volatile uint32_t *)0x4002F084 // SAI Receive Configuration 1 Register -#define I2S_RCR1_RFW(n) ((uint32_t)n & 0x03) // Receive FIFO watermark -#define I2S0_RCR2 *(volatile uint32_t *)0x4002F088 // SAI Receive Configuration 2 Register -#define I2S_RCR2_DIV(n) ((uint32_t)n & 0xff) // Bit clock divide by (DIV+1)*2 -#define I2S_RCR2_BCD ((uint32_t)1<<24) // Bit clock direction -#define I2S_RCR2_BCP ((uint32_t)1<<25) // Bit clock polarity -#define I2S_RCR2_MSEL(n) ((uint32_t)(n & 3)<<26) // MCLK select, 0=bus clock, 1=I2S0_MCLK -#define I2S_RCR2_BCI ((uint32_t)1<<28) // Bit clock input -#define I2S_RCR2_BCS ((uint32_t)1<<29) // Bit clock swap -#define I2S_RCR2_SYNC(n) ((uint32_t)(n & 3)<<30) // 0=async 1=sync with receiver -#define I2S0_RCR3 *(volatile uint32_t *)0x4002F08C // SAI Receive Configuration 3 Register -#define I2S_RCR3_WDFL(n) ((uint32_t)n & 0x0f) // word flag configuration -#define I2S_RCR3_RCE ((uint32_t)0x10000) // receive channel enable -#define I2S0_RCR4 *(volatile uint32_t *)0x4002F090 // SAI Receive Configuration 4 Register -#define I2S_RCR4_FSD ((uint32_t)1) // Frame Sync Direction -#define I2S_RCR4_FSP ((uint32_t)2) // Frame Sync Polarity -#define I2S_RCR4_FSE ((uint32_t)8) // Frame Sync Early -#define I2S_RCR4_MF ((uint32_t)0x10) // MSB First -#define I2S_RCR4_SYWD(n) ((uint32_t)(n & 0x1f)<<8) // Sync Width -#define I2S_RCR4_FRSZ(n) ((uint32_t)(n & 0x0f)<<16) // Frame Size -#define I2S0_RCR5 *(volatile uint32_t *)0x4002F094 // SAI Receive Configuration 5 Register -#define I2S_RCR5_FBT(n) ((uint32_t)(n & 0x1f)<<8) // First Bit Shifted -#define I2S_RCR5_W0W(n) ((uint32_t)(n & 0x1f)<<16) // Word 0 Width -#define I2S_RCR5_WNW(n) ((uint32_t)(n & 0x1f)<<24) // Word N Width -#define I2S0_RDR0 *(volatile uint32_t *)0x4002F0A0 // SAI Receive Data Register -#define I2S0_RDR1 *(volatile uint32_t *)0x4002F0A4 // SAI Receive Data Register -#define I2S0_RFR0 *(volatile uint32_t *)0x4002F0C0 // SAI Receive FIFO Register -#define I2S0_RFR1 *(volatile uint32_t *)0x4002F0C4 // SAI Receive FIFO Register -#define I2S_RFR_RFP(n) ((uint32_t)n & 7) // read FIFO pointer -#define I2S_RFR_WFP(n) ((uint32_t)(n & 7)<<16) // write FIFO pointer -#define I2S0_RMR *(volatile uint32_t *)0x4002F0E0 // SAI Receive Mask Register -#define I2S_RMR_RWM(n) ((uint32_t)n & 0xFFFFFFFF) -#define I2S0_MCR *(volatile uint32_t *)0x4002F100 // SAI MCLK Control Register -#define I2S_MCR_DUF ((uint32_t)1<<31) // Divider Update Flag -#define I2S_MCR_MOE ((uint32_t)1<<30) // MCLK Output Enable -#define I2S_MCR_MICS(n) ((uint32_t)(n & 3)<<24) // MCLK Input Clock Select -#define I2S0_MDR *(volatile uint32_t *)0x4002F104 // SAI MCLK Divide Register -#define I2S_MDR_FRACT(n) ((uint32_t)(n & 0xff)<<12) // MCLK Fraction -#define I2S_MDR_DIVIDE(n) ((uint32_t)(n & 0xfff)) // MCLK Divide - -// Chapter 47: General-Purpose Input/Output (GPIO) -#define GPIOA_PDOR *(volatile uint32_t *)0x400FF000 // Port Data Output Register -#define GPIOA_PSOR *(volatile uint32_t *)0x400FF004 // Port Set Output Register -#define GPIOA_PCOR *(volatile uint32_t *)0x400FF008 // Port Clear Output Register -#define GPIOA_PTOR *(volatile uint32_t *)0x400FF00C // Port Toggle Output Register -#define GPIOA_PDIR *(volatile uint32_t *)0x400FF010 // Port Data Input Register -#define GPIOA_PDDR *(volatile uint32_t *)0x400FF014 // Port Data Direction Register -#define GPIOB_PDOR *(volatile uint32_t *)0x400FF040 // Port Data Output Register -#define GPIOB_PSOR *(volatile uint32_t *)0x400FF044 // Port Set Output Register -#define GPIOB_PCOR *(volatile uint32_t *)0x400FF048 // Port Clear Output Register -#define GPIOB_PTOR *(volatile uint32_t *)0x400FF04C // Port Toggle Output Register -#define GPIOB_PDIR *(volatile uint32_t *)0x400FF050 // Port Data Input Register -#define GPIOB_PDDR *(volatile uint32_t *)0x400FF054 // Port Data Direction Register -#define GPIOC_PDOR *(volatile uint32_t *)0x400FF080 // Port Data Output Register -#define GPIOC_PSOR *(volatile uint32_t *)0x400FF084 // Port Set Output Register -#define GPIOC_PCOR *(volatile uint32_t *)0x400FF088 // Port Clear Output Register -#define GPIOC_PTOR *(volatile uint32_t *)0x400FF08C // Port Toggle Output Register -#define GPIOC_PDIR *(volatile uint32_t *)0x400FF090 // Port Data Input Register -#define GPIOC_PDDR *(volatile uint32_t *)0x400FF094 // Port Data Direction Register -#define GPIOD_PDOR *(volatile uint32_t *)0x400FF0C0 // Port Data Output Register -#define GPIOD_PSOR *(volatile uint32_t *)0x400FF0C4 // Port Set Output Register -#define GPIOD_PCOR *(volatile uint32_t *)0x400FF0C8 // Port Clear Output Register -#define GPIOD_PTOR *(volatile uint32_t *)0x400FF0CC // Port Toggle Output Register -#define GPIOD_PDIR *(volatile uint32_t *)0x400FF0D0 // Port Data Input Register -#define GPIOD_PDDR *(volatile uint32_t *)0x400FF0D4 // Port Data Direction Register -#define GPIOE_PDOR *(volatile uint32_t *)0x400FF100 // Port Data Output Register -#define GPIOE_PSOR *(volatile uint32_t *)0x400FF104 // Port Set Output Register -#define GPIOE_PCOR *(volatile uint32_t *)0x400FF108 // Port Clear Output Register -#define GPIOE_PTOR *(volatile uint32_t *)0x400FF10C // Port Toggle Output Register -#define GPIOE_PDIR *(volatile uint32_t *)0x400FF110 // Port Data Input Register -#define GPIOE_PDDR *(volatile uint32_t *)0x400FF114 // Port Data Direction Register - -// Chapter 48: Touch sense input (TSI) -#define TSI0_GENCS *(volatile uint32_t *)0x40045000 // General Control and Status Register -#define TSI_GENCS_LPCLKS (uint32_t)0x10000000 // -#define TSI_GENCS_LPSCNITV(n) (((n) & 15) << 24) // -#define TSI_GENCS_NSCN(n) (((n) & 31) << 19) // -#define TSI_GENCS_PS(n) (((n) & 7) << 16) // -#define TSI_GENCS_EOSF (uint32_t)0x00008000 // -#define TSI_GENCS_OUTRGF (uint32_t)0x00004000 // -#define TSI_GENCS_EXTERF (uint32_t)0x00002000 // -#define TSI_GENCS_OVRF (uint32_t)0x00001000 // -#define TSI_GENCS_SCNIP (uint32_t)0x00000200 // -#define TSI_GENCS_SWTS (uint32_t)0x00000100 // -#define TSI_GENCS_TSIEN (uint32_t)0x00000080 // -#define TSI_GENCS_TSIIE (uint32_t)0x00000040 // -#define TSI_GENCS_ERIE (uint32_t)0x00000020 // -#define TSI_GENCS_ESOR (uint32_t)0x00000010 // -#define TSI_GENCS_STM (uint32_t)0x00000002 // -#define TSI_GENCS_STPE (uint32_t)0x00000001 // -#define TSI0_SCANC *(volatile uint32_t *)0x40045004 // SCAN Control Register -#define TSI_SCANC_REFCHRG(n) (((n) & 15) << 24) // -#define TSI_SCANC_EXTCHRG(n) (((n) & 7) << 16) // -#define TSI_SCANC_SMOD(n) (((n) & 255) << 8) // -#define TSI_SCANC_AMCLKS(n) (((n) & 3) << 3) // -#define TSI_SCANC_AMPSC(n) (((n) & 7) << 0) // -#define TSI0_PEN *(volatile uint32_t *)0x40045008 // Pin Enable Register -#define TSI0_WUCNTR *(volatile uint32_t *)0x4004500C // Wake-Up Channel Counter Register -#define TSI0_CNTR1 *(volatile uint32_t *)0x40045100 // Counter Register -#define TSI0_CNTR3 *(volatile uint32_t *)0x40045104 // Counter Register -#define TSI0_CNTR5 *(volatile uint32_t *)0x40045108 // Counter Register -#define TSI0_CNTR7 *(volatile uint32_t *)0x4004510C // Counter Register -#define TSI0_CNTR9 *(volatile uint32_t *)0x40045110 // Counter Register -#define TSI0_CNTR11 *(volatile uint32_t *)0x40045114 // Counter Register -#define TSI0_CNTR13 *(volatile uint32_t *)0x40045118 // Counter Register -#define TSI0_CNTR15 *(volatile uint32_t *)0x4004511C // Counter Register -#define TSI0_THRESHOLD *(volatile uint32_t *)0x40045120 // Low Power Channel Threshold Register - -// Nested Vectored Interrupt Controller, Table 3-4 & ARMv7 ref, appendix B3.4 (page 750) -#define NVIC_ENABLE_IRQ(n) (*((volatile uint32_t *)0xE000E100 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_DISABLE_IRQ(n) (*((volatile uint32_t *)0xE000E180 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_SET_PENDING(n) (*((volatile uint32_t *)0xE000E200 + (n >> 5)) = (1 << (n & 31))) -#define NVIC_CLEAR_PENDING(n) (*((volatile uint32_t *)0xE000E280 + (n >> 5)) = (1 << (n & 31))) - -#define NVIC_ISER0 *(volatile uint32_t *)0xE000E100 -#define NVIC_ISER1 *(volatile uint32_t *)0xE000E104 -#define NVIC_ICER0 *(volatile uint32_t *)0xE000E180 -#define NVIC_ICER1 *(volatile uint32_t *)0xE000E184 - -// 0 = highest priority -// Cortex-M4: 0,16,32,48,64,80,96,112,128,144,160,176,192,208,224,240 -// Cortex-M0: 0,64,128,192 -#define NVIC_SET_PRIORITY(irqnum, priority) (*((volatile uint8_t *)0xE000E400 + (irqnum)) = (uint8_t)(priority)) -#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum))) - -#if defined(__MK20DX128__) -#define IRQ_DMA_CH0 0 -#define IRQ_DMA_CH1 1 -#define IRQ_DMA_CH2 2 -#define IRQ_DMA_CH3 3 -#define IRQ_DMA_ERROR 4 -#define IRQ_FTFL_COMPLETE 6 -#define IRQ_FTFL_COLLISION 7 -#define IRQ_LOW_VOLTAGE 8 -#define IRQ_LLWU 9 -#define IRQ_WDOG 10 -#define IRQ_I2C0 11 -#define IRQ_SPI0 12 -#define IRQ_I2S0_TX 13 -#define IRQ_I2S0_RX 14 -#define IRQ_UART0_LON 15 -#define IRQ_UART0_STATUS 16 -#define IRQ_UART0_ERROR 17 -#define IRQ_UART1_STATUS 18 -#define IRQ_UART1_ERROR 19 -#define IRQ_UART2_STATUS 20 -#define IRQ_UART2_ERROR 21 -#define IRQ_ADC0 22 -#define IRQ_CMP0 23 -#define IRQ_CMP1 24 -#define IRQ_FTM0 25 -#define IRQ_FTM1 26 -#define IRQ_CMT 27 -#define IRQ_RTC_ALARM 28 -#define IRQ_RTC_SECOND 29 -#define IRQ_PIT_CH0 30 -#define IRQ_PIT_CH1 31 -#define IRQ_PIT_CH2 32 -#define IRQ_PIT_CH3 33 -#define IRQ_PDB 34 -#define IRQ_USBOTG 35 -#define IRQ_USBDCD 36 -#define IRQ_TSI 37 -#define IRQ_MCG 38 -#define IRQ_LPTMR 39 -#define IRQ_PORTA 40 -#define IRQ_PORTB 41 -#define IRQ_PORTC 42 -#define IRQ_PORTD 43 -#define IRQ_PORTE 44 -#define IRQ_SOFTWARE 45 -#define NVIC_NUM_INTERRUPTS 46 - -#elif defined(__MK20DX256__) -#define IRQ_DMA_CH0 0 -#define IRQ_DMA_CH1 1 -#define IRQ_DMA_CH2 2 -#define IRQ_DMA_CH3 3 -#define IRQ_DMA_CH4 4 -#define IRQ_DMA_CH5 5 -#define IRQ_DMA_CH6 6 -#define IRQ_DMA_CH7 7 -#define IRQ_DMA_CH8 8 -#define IRQ_DMA_CH9 9 -#define IRQ_DMA_CH10 10 -#define IRQ_DMA_CH11 11 -#define IRQ_DMA_CH12 12 -#define IRQ_DMA_CH13 13 -#define IRQ_DMA_CH14 14 -#define IRQ_DMA_CH15 15 -#define IRQ_DMA_ERROR 16 -#define IRQ_FTFL_COMPLETE 18 -#define IRQ_FTFL_COLLISION 19 -#define IRQ_LOW_VOLTAGE 20 -#define IRQ_LLWU 21 -#define IRQ_WDOG 22 -#define IRQ_I2C0 24 -#define IRQ_I2C1 25 -#define IRQ_SPI0 26 -#define IRQ_SPI1 27 -#define IRQ_CAN_MESSAGE 29 -#define IRQ_CAN_BUS_OFF 30 -#define IRQ_CAN_ERROR 31 -#define IRQ_CAN_TX_WARN 32 -#define IRQ_CAN_RX_WARN 33 -#define IRQ_CAN_WAKEUP 34 -#define IRQ_I2S0_TX 35 -#define IRQ_I2S0_RX 36 -#define IRQ_UART0_LON 44 -#define IRQ_UART0_STATUS 45 -#define IRQ_UART0_ERROR 46 -#define IRQ_UART1_STATUS 47 -#define IRQ_UART1_ERROR 48 -#define IRQ_UART2_STATUS 49 -#define IRQ_UART2_ERROR 50 -#define IRQ_ADC0 57 -#define IRQ_ADC1 58 -#define IRQ_CMP0 59 -#define IRQ_CMP1 60 -#define IRQ_CMP2 61 -#define IRQ_FTM0 62 -#define IRQ_FTM1 63 -#define IRQ_FTM2 64 -#define IRQ_CMT 65 -#define IRQ_RTC_ALARM 66 -#define IRQ_RTC_SECOND 67 -#define IRQ_PIT_CH0 68 -#define IRQ_PIT_CH1 69 -#define IRQ_PIT_CH2 70 -#define IRQ_PIT_CH3 71 -#define IRQ_PDB 72 -#define IRQ_USBOTG 73 -#define IRQ_USBDCD 74 -#define IRQ_DAC0 81 -#define IRQ_TSI 83 -#define IRQ_MCG 84 -#define IRQ_LPTMR 85 -#define IRQ_PORTA 87 -#define IRQ_PORTB 88 -#define IRQ_PORTC 89 -#define IRQ_PORTD 90 -#define IRQ_PORTE 91 -#define IRQ_SOFTWARE 94 -#define NVIC_NUM_INTERRUPTS 95 - -#endif - - - - - -#define __disable_irq() __asm__ volatile("CPSID i"); -#define __enable_irq() __asm__ volatile("CPSIE i"); - -// System Control Space (SCS), ARMv7 ref manual, B3.2, page 708 -#define SCB_CPUID *(const uint32_t *)0xE000ED00 // CPUID Base Register -#define SCB_ICSR *(volatile uint32_t *)0xE000ED04 // Interrupt Control and State -#define SCB_ICSR_PENDSTSET (uint32_t)0x04000000 -#define SCB_VTOR *(volatile uint32_t *)0xE000ED08 // Vector Table Offset -#define SCB_AIRCR *(volatile uint32_t *)0xE000ED0C // Application Interrupt and Reset Control -#define SCB_SCR *(volatile uint32_t *)0xE000ED10 // System Control Register -#define SCB_CCR *(volatile uint32_t *)0xE000ED14 // Configuration and Control -#define SCB_SHPR1 *(volatile uint32_t *)0xE000ED18 // System Handler Priority Register 1 -#define SCB_SHPR2 *(volatile uint32_t *)0xE000ED1C // System Handler Priority Register 2 -#define SCB_SHPR3 *(volatile uint32_t *)0xE000ED20 // System Handler Priority Register 3 -#define SCB_SHCSR *(volatile uint32_t *)0xE000ED24 // System Handler Control and State -#define SCB_CFSR *(volatile uint32_t *)0xE000ED28 // Configurable Fault Status Register -#define SCB_HFSR *(volatile uint32_t *)0xE000ED2C // HardFault Status -#define SCB_DFSR *(volatile uint32_t *)0xE000ED30 // Debug Fault Status -#define SCB_MMFAR *(volatile uint32_t *)0xE000ED34 // MemManage Fault Address - -#define SYST_CSR *(volatile uint32_t *)0xE000E010 // SysTick Control and Status -#define SYST_CSR_COUNTFLAG (uint32_t)0x00010000 -#define SYST_CSR_CLKSOURCE (uint32_t)0x00000004 -#define SYST_CSR_TICKINT (uint32_t)0x00000002 -#define SYST_CSR_ENABLE (uint32_t)0x00000001 -#define SYST_RVR *(volatile uint32_t *)0xE000E014 // SysTick Reload Value Register -#define SYST_CVR *(volatile uint32_t *)0xE000E018 // SysTick Current Value Register -#define SYST_CALIB *(const uint32_t *)0xE000E01C // SysTick Calibration Value - - -#define ARM_DEMCR *(volatile uint32_t *)0xE000EDFC // Debug Exception and Monitor Control -#define ARM_DEMCR_TRCENA (1 << 24) // Enable debugging & monitoring blocks -#define ARM_DWT_CTRL *(volatile uint32_t *)0xE0001000 // DWT control register -#define ARM_DWT_CTRL_CYCCNTENA (1 << 0) // Enable cycle count -#define ARM_DWT_CYCCNT *(volatile uint32_t *)0xE0001004 // Cycle count register - -extern int nvic_execution_priority(void); - -extern void nmi_isr(void); -extern void hard_fault_isr(void); -extern void memmanage_fault_isr(void); -extern void bus_fault_isr(void); -extern void usage_fault_isr(void); -extern void svcall_isr(void); -extern void debugmonitor_isr(void); -extern void pendablesrvreq_isr(void); -extern void systick_isr(void); -extern void dma_ch0_isr(void); -extern void dma_ch1_isr(void); -extern void dma_ch2_isr(void); -extern void dma_ch3_isr(void); -extern void dma_ch4_isr(void); -extern void dma_ch5_isr(void); -extern void dma_ch6_isr(void); -extern void dma_ch7_isr(void); -extern void dma_ch8_isr(void); -extern void dma_ch9_isr(void); -extern void dma_ch10_isr(void); -extern void dma_ch11_isr(void); -extern void dma_ch12_isr(void); -extern void dma_ch13_isr(void); -extern void dma_ch14_isr(void); -extern void dma_ch15_isr(void); -extern void dma_error_isr(void); -extern void mcm_isr(void); -extern void flash_cmd_isr(void); -extern void flash_error_isr(void); -extern void low_voltage_isr(void); -extern void wakeup_isr(void); -extern void watchdog_isr(void); -extern void i2c0_isr(void); -extern void i2c1_isr(void); -extern void i2c2_isr(void); -extern void spi0_isr(void); -extern void spi1_isr(void); -extern void spi2_isr(void); -extern void sdhc_isr(void); -extern void can0_message_isr(void); -extern void can0_bus_off_isr(void); -extern void can0_error_isr(void); -extern void can0_tx_warn_isr(void); -extern void can0_rx_warn_isr(void); -extern void can0_wakeup_isr(void); -extern void i2s0_tx_isr(void); -extern void i2s0_rx_isr(void); -extern void uart0_lon_isr(void); -extern void uart0_status_isr(void); -extern void uart0_error_isr(void); -extern void uart1_status_isr(void); -extern void uart1_error_isr(void); -extern void uart2_status_isr(void); -extern void uart2_error_isr(void); -extern void uart3_status_isr(void); -extern void uart3_error_isr(void); -extern void uart4_status_isr(void); -extern void uart4_error_isr(void); -extern void uart5_status_isr(void); -extern void uart5_error_isr(void); -extern void adc0_isr(void); -extern void adc1_isr(void); -extern void cmp0_isr(void); -extern void cmp1_isr(void); -extern void cmp2_isr(void); -extern void ftm0_isr(void); -extern void ftm1_isr(void); -extern void ftm2_isr(void); -extern void ftm3_isr(void); -extern void cmt_isr(void); -extern void rtc_alarm_isr(void); -extern void rtc_seconds_isr(void); -extern void pit0_isr(void); -extern void pit1_isr(void); -extern void pit2_isr(void); -extern void pit3_isr(void); -extern void pdb_isr(void); -extern void usb_isr(void); -extern void usb_charge_isr(void); -extern void dac0_isr(void); -extern void dac1_isr(void); -extern void tsi0_isr(void); -extern void mcg_isr(void); -extern void lptmr_isr(void); -extern void porta_isr(void); -extern void portb_isr(void); -extern void portc_isr(void); -extern void portd_isr(void); -extern void porte_isr(void); -extern void software_isr(void); - - - -#ifdef __cplusplus -} -#endif -#endif diff --git a/ports/teensy/core/pins_arduino.h b/ports/teensy/core/pins_arduino.h deleted file mode 100644 index 03674933c2f35..0000000000000 --- a/ports/teensy/core/pins_arduino.h +++ /dev/null @@ -1,113 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef pins_macros_for_arduino_compatibility_h -#define pins_macros_for_arduino_compatibility_h - -#include - -const static uint8_t A0 = 14; -const static uint8_t A1 = 15; -const static uint8_t A2 = 16; -const static uint8_t A3 = 17; -const static uint8_t A4 = 18; -const static uint8_t A5 = 19; -const static uint8_t A6 = 20; -const static uint8_t A7 = 21; -const static uint8_t A8 = 22; -const static uint8_t A9 = 23; -const static uint8_t A10 = 34; -const static uint8_t A11 = 35; -const static uint8_t A12 = 36; -const static uint8_t A13 = 37; -const static uint8_t A14 = 40; - -const static uint8_t A15 = 26; -const static uint8_t A16 = 27; -const static uint8_t A17 = 28; -const static uint8_t A18 = 29; -const static uint8_t A19 = 30; -const static uint8_t A20 = 31; - -const static uint8_t SS = 10; -const static uint8_t MOSI = 11; -const static uint8_t MISO = 12; -const static uint8_t SCK = 13; -const static uint8_t LED_BUILTIN = 13; -const static uint8_t SDA = 18; -const static uint8_t SCL = 19; - - -#define NUM_DIGITAL_PINS 34 -#define NUM_ANALOG_INPUTS 14 - -#define analogInputToDigitalPin(p) (((p) < 10) ? (p) + 14 : -1) -#define digitalPinHasPWM(p) (((p) >= 3 && (p) <= 6) || (p) == 9 || (p) == 10 || ((p) >= 20 && (p) <= 23)) - -#define NOT_AN_INTERRUPT -1 -#define digitalPinToInterrupt(p) ((p) < NUM_DIGITAL_PINS ? (p) : -1) - - -struct digital_pin_bitband_and_config_table_struct { - volatile uint32_t *reg; - volatile uint32_t *config; -}; -extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[]; - -// compatibility macros -#define digitalPinToPort(pin) (pin) -#define digitalPinToBitMask(pin) (1) -#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0)) -#define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32)) -#define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64)) -#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96)) -#define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128)) -#define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160)) -#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config)) - - -#define digitalPinToPortReg(pin) (portOutputRegister(pin)) -#define digitalPinToBit(pin) (1) - - -#define NOT_ON_TIMER 0 -static inline uint8_t digitalPinToTimer(uint8_t) __attribute__((always_inline, unused)); -static inline uint8_t digitalPinToTimer(uint8_t pin) -{ - if (pin >= 3 && pin <= 6) return pin - 2; - if (pin >= 9 && pin <= 10) return pin - 4; - if (pin >= 20 && pin <= 23) return pin - 13; - return NOT_ON_TIMER; -} - - - - -#endif diff --git a/ports/teensy/core/pins_teensy.c b/ports/teensy/core/pins_teensy.c deleted file mode 100644 index b28f94a9ecb0c..0000000000000 --- a/ports/teensy/core/pins_teensy.c +++ /dev/null @@ -1,817 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "core_pins.h" -#include "pins_arduino.h" -#include "HardwareSerial.h" - -#if 0 -// moved to pins_arduino.h -struct digital_pin_bitband_and_config_table_struct { - volatile uint32_t *reg; - volatile uint32_t *config; -}; -const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[]; - -// compatibility macros -#define digitalPinToPort(pin) (pin) -#define digitalPinToBitMask(pin) (1) -#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0)) -#define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32)) -#define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64)) -#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96)) -#define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128)) -#define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160)) -#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config)) -#endif - -//#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) ) -//#define analogInPinToBit(P) (P) - -#define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000) -#define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit))) -//#define GPIO_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1) -//#define GPIO_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0) - -const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[] = { - {GPIO_BITBAND_PTR(CORE_PIN0_PORTREG, CORE_PIN0_BIT), &CORE_PIN0_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN1_PORTREG, CORE_PIN1_BIT), &CORE_PIN1_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN2_PORTREG, CORE_PIN2_BIT), &CORE_PIN2_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN3_PORTREG, CORE_PIN3_BIT), &CORE_PIN3_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN4_PORTREG, CORE_PIN4_BIT), &CORE_PIN4_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN5_PORTREG, CORE_PIN5_BIT), &CORE_PIN5_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN6_PORTREG, CORE_PIN6_BIT), &CORE_PIN6_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN7_PORTREG, CORE_PIN7_BIT), &CORE_PIN7_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN8_PORTREG, CORE_PIN8_BIT), &CORE_PIN8_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN9_PORTREG, CORE_PIN9_BIT), &CORE_PIN9_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN10_PORTREG, CORE_PIN10_BIT), &CORE_PIN10_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN11_PORTREG, CORE_PIN11_BIT), &CORE_PIN11_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN12_PORTREG, CORE_PIN12_BIT), &CORE_PIN12_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN13_PORTREG, CORE_PIN13_BIT), &CORE_PIN13_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN14_PORTREG, CORE_PIN14_BIT), &CORE_PIN14_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN15_PORTREG, CORE_PIN15_BIT), &CORE_PIN15_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN16_PORTREG, CORE_PIN16_BIT), &CORE_PIN16_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN17_PORTREG, CORE_PIN17_BIT), &CORE_PIN17_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN18_PORTREG, CORE_PIN18_BIT), &CORE_PIN18_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN19_PORTREG, CORE_PIN19_BIT), &CORE_PIN19_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN20_PORTREG, CORE_PIN20_BIT), &CORE_PIN20_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN21_PORTREG, CORE_PIN21_BIT), &CORE_PIN21_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN22_PORTREG, CORE_PIN22_BIT), &CORE_PIN22_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN23_PORTREG, CORE_PIN23_BIT), &CORE_PIN23_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN24_PORTREG, CORE_PIN24_BIT), &CORE_PIN24_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN25_PORTREG, CORE_PIN25_BIT), &CORE_PIN25_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN26_PORTREG, CORE_PIN26_BIT), &CORE_PIN26_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN27_PORTREG, CORE_PIN27_BIT), &CORE_PIN27_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN28_PORTREG, CORE_PIN28_BIT), &CORE_PIN28_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN29_PORTREG, CORE_PIN29_BIT), &CORE_PIN29_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN30_PORTREG, CORE_PIN30_BIT), &CORE_PIN30_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN31_PORTREG, CORE_PIN31_BIT), &CORE_PIN31_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN32_PORTREG, CORE_PIN32_BIT), &CORE_PIN32_CONFIG}, - {GPIO_BITBAND_PTR(CORE_PIN33_PORTREG, CORE_PIN33_BIT), &CORE_PIN33_CONFIG} -}; - - - - -typedef void (*voidFuncPtr)(void); -volatile static voidFuncPtr intFunc[CORE_NUM_DIGITAL]; - -void init_pin_interrupts(void) -{ - //SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO - NVIC_ENABLE_IRQ(IRQ_PORTA); - NVIC_ENABLE_IRQ(IRQ_PORTB); - NVIC_ENABLE_IRQ(IRQ_PORTC); - NVIC_ENABLE_IRQ(IRQ_PORTD); - NVIC_ENABLE_IRQ(IRQ_PORTE); - // TODO: maybe these should be set to a lower priority - // so if the user puts lots of slow code on attachInterrupt - // fast interrupts will still be serviced quickly? -} - -void attachInterrupt(uint8_t pin, void (*function)(void), int mode) -{ - volatile uint32_t *config; - uint32_t cfg, mask; - - if (pin >= CORE_NUM_DIGITAL) return; - switch (mode) { - case CHANGE: mask = 0x0B; break; - case RISING: mask = 0x09; break; - case FALLING: mask = 0x0A; break; - case LOW: mask = 0x08; break; - case HIGH: mask = 0x0C; break; - default: return; - } - mask = (mask << 16) | 0x01000000; - config = portConfigRegister(pin); - - __disable_irq(); - cfg = *config; - cfg &= ~0x000F0000; // disable any previous interrupt - *config = cfg; - intFunc[pin] = function; // set the function pointer - cfg |= mask; - *config = cfg; // enable the new interrupt - __enable_irq(); -} - -void detachInterrupt(uint8_t pin) -{ - volatile uint32_t *config; - - config = portConfigRegister(pin); - __disable_irq(); - *config = ((*config & ~0x000F0000) | 0x01000000); - intFunc[pin] = NULL; - __enable_irq(); -} - - -void porta_isr(void) -{ - uint32_t isfr = PORTA_ISFR; - PORTA_ISFR = isfr; - if ((isfr & CORE_PIN3_BITMASK) && intFunc[3]) intFunc[3](); - if ((isfr & CORE_PIN4_BITMASK) && intFunc[4]) intFunc[4](); - if ((isfr & CORE_PIN24_BITMASK) && intFunc[24]) intFunc[24](); - if ((isfr & CORE_PIN33_BITMASK) && intFunc[33]) intFunc[33](); -} - -void portb_isr(void) -{ - uint32_t isfr = PORTB_ISFR; - PORTB_ISFR = isfr; - if ((isfr & CORE_PIN0_BITMASK) && intFunc[0]) intFunc[0](); - if ((isfr & CORE_PIN1_BITMASK) && intFunc[1]) intFunc[1](); - if ((isfr & CORE_PIN16_BITMASK) && intFunc[16]) intFunc[16](); - if ((isfr & CORE_PIN17_BITMASK) && intFunc[17]) intFunc[17](); - if ((isfr & CORE_PIN18_BITMASK) && intFunc[18]) intFunc[18](); - if ((isfr & CORE_PIN19_BITMASK) && intFunc[19]) intFunc[19](); - if ((isfr & CORE_PIN25_BITMASK) && intFunc[25]) intFunc[25](); - if ((isfr & CORE_PIN32_BITMASK) && intFunc[32]) intFunc[32](); -} - -void portc_isr(void) -{ - // TODO: these are inefficent. Use CLZ somehow.... - uint32_t isfr = PORTC_ISFR; - PORTC_ISFR = isfr; - if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9](); - if ((isfr & CORE_PIN10_BITMASK) && intFunc[10]) intFunc[10](); - if ((isfr & CORE_PIN11_BITMASK) && intFunc[11]) intFunc[11](); - if ((isfr & CORE_PIN12_BITMASK) && intFunc[12]) intFunc[12](); - if ((isfr & CORE_PIN13_BITMASK) && intFunc[13]) intFunc[13](); - if ((isfr & CORE_PIN15_BITMASK) && intFunc[15]) intFunc[15](); - if ((isfr & CORE_PIN22_BITMASK) && intFunc[22]) intFunc[22](); - if ((isfr & CORE_PIN23_BITMASK) && intFunc[23]) intFunc[23](); - if ((isfr & CORE_PIN27_BITMASK) && intFunc[27]) intFunc[27](); - if ((isfr & CORE_PIN28_BITMASK) && intFunc[28]) intFunc[28](); - if ((isfr & CORE_PIN29_BITMASK) && intFunc[29]) intFunc[29](); - if ((isfr & CORE_PIN30_BITMASK) && intFunc[30]) intFunc[30](); -} - -void portd_isr(void) -{ - uint32_t isfr = PORTD_ISFR; - PORTD_ISFR = isfr; - if ((isfr & CORE_PIN2_BITMASK) && intFunc[2]) intFunc[2](); - if ((isfr & CORE_PIN5_BITMASK) && intFunc[5]) intFunc[5](); - if ((isfr & CORE_PIN6_BITMASK) && intFunc[6]) intFunc[6](); - if ((isfr & CORE_PIN7_BITMASK) && intFunc[7]) intFunc[7](); - if ((isfr & CORE_PIN8_BITMASK) && intFunc[8]) intFunc[8](); - if ((isfr & CORE_PIN14_BITMASK) && intFunc[14]) intFunc[14](); - if ((isfr & CORE_PIN20_BITMASK) && intFunc[20]) intFunc[20](); - if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21](); -} - -void porte_isr(void) -{ - uint32_t isfr = PORTE_ISFR; - PORTE_ISFR = isfr; - if ((isfr & CORE_PIN26_BITMASK) && intFunc[26]) intFunc[26](); - if ((isfr & CORE_PIN31_BITMASK) && intFunc[31]) intFunc[31](); -} - - - - -unsigned long rtc_get(void) -{ - return RTC_TSR; -} - -void rtc_set(unsigned long t) -{ - RTC_SR = 0; - RTC_TPR = 0; - RTC_TSR = t; - RTC_SR = RTC_SR_TCE; -} - - -// adjust is the amount of crystal error to compensate, 1 = 0.1192 ppm -// For example, adjust = -100 is slows the clock by 11.92 ppm -// -void rtc_compensate(int adjust) -{ - uint32_t comp, interval, tcr; - - // This simple approach tries to maximize the interval. - // Perhaps minimizing TCR would be better, so the - // compensation is distributed more evenly across - // many seconds, rather than saving it all up and then - // altering one second up to +/- 0.38% - if (adjust >= 0) { - comp = adjust; - interval = 256; - while (1) { - tcr = comp * interval; - if (tcr < 128*256) break; - if (--interval == 1) break; - } - tcr = tcr >> 8; - } else { - comp = -adjust; - interval = 256; - while (1) { - tcr = comp * interval; - if (tcr < 129*256) break; - if (--interval == 1) break; - } - tcr = tcr >> 8; - tcr = 256 - tcr; - } - RTC_TCR = ((interval - 1) << 8) | tcr; -} - -#if 0 -// TODO: build system should define this -// so RTC is automatically initialized to approx correct time -// at least when the program begins running right after upload -#ifndef TIME_T -#define TIME_T 1350160272 -#endif - -void init_rtc(void) -{ - serial_print("init_rtc\n"); - //SIM_SCGC6 |= SIM_SCGC6_RTC; - - // enable the RTC crystal oscillator, for approx 12pf crystal - if (!(RTC_CR & RTC_CR_OSCE)) { - serial_print("start RTC oscillator\n"); - RTC_SR = 0; - RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE; - } - // should wait for crystal to stabilize..... - - serial_print("SR="); - serial_phex32(RTC_SR); - serial_print("\n"); - serial_print("CR="); - serial_phex32(RTC_CR); - serial_print("\n"); - serial_print("TSR="); - serial_phex32(RTC_TSR); - serial_print("\n"); - serial_print("TCR="); - serial_phex32(RTC_TCR); - serial_print("\n"); - - if (RTC_SR & RTC_SR_TIF) { - // enable the RTC - RTC_SR = 0; - RTC_TPR = 0; - RTC_TSR = TIME_T; - RTC_SR = RTC_SR_TCE; - } -} -#endif - -extern void usb_init(void); - - -// create a default PWM at the same 488.28 Hz as Arduino Uno - -#if F_BUS == 60000000 -#define DEFAULT_FTM_MOD (61440 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 56000000 -#define DEFAULT_FTM_MOD (57344 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 48000000 -#define DEFAULT_FTM_MOD (49152 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 40000000 -#define DEFAULT_FTM_MOD (40960 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 36000000 -#define DEFAULT_FTM_MOD (36864 - 1) -#define DEFAULT_FTM_PRESCALE 1 -#elif F_BUS == 24000000 -#define DEFAULT_FTM_MOD (49152 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 16000000 -#define DEFAULT_FTM_MOD (32768 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 8000000 -#define DEFAULT_FTM_MOD (16384 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 4000000 -#define DEFAULT_FTM_MOD (8192 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#elif F_BUS == 2000000 -#define DEFAULT_FTM_MOD (4096 - 1) -#define DEFAULT_FTM_PRESCALE 0 -#endif - -//void init_pins(void) -void _init_Teensyduino_internal_(void) -{ - init_pin_interrupts(); - - //SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write - //SIM_SCGC6 |= SIM_SCGC6_FTM1; - FTM0_CNT = 0; - FTM0_MOD = DEFAULT_FTM_MOD; - FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10 - FTM0_C1SC = 0x28; - FTM0_C2SC = 0x28; - FTM0_C3SC = 0x28; - FTM0_C4SC = 0x28; - FTM0_C5SC = 0x28; - FTM0_C6SC = 0x28; - FTM0_C7SC = 0x28; - FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); - FTM1_CNT = 0; - FTM1_MOD = DEFAULT_FTM_MOD; - FTM1_C0SC = 0x28; - FTM1_C1SC = 0x28; - FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); -#if defined(__MK20DX256__) - FTM2_CNT = 0; - FTM2_MOD = DEFAULT_FTM_MOD; - FTM2_C0SC = 0x28; - FTM2_C1SC = 0x28; - FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); -#endif - - analog_init(); - //delay(100); // TODO: this is not necessary, right? - delay(4); - usb_init(); -} - - - -static uint8_t analog_write_res = 8; - -// SOPT4 is SIM select clocks? -// FTM is clocked by the bus clock, either 24 or 48 MHz -// input capture can be FTM1_CH0, CMP0 or CMP1 or USB start of frame -// 24 MHz with reload 49152 to match Arduino's speed = 488.28125 Hz - -void analogWrite(uint8_t pin, int val) -{ - uint32_t cval, max; - -#if defined(__MK20DX256__) - if (pin == A14) { - uint8_t res = analog_write_res; - if (res < 12) { - val <<= 12 - res; - } else if (res > 12) { - val >>= res - 12; - } - analogWriteDAC0(val); - return; - } -#endif - - max = 1 << analog_write_res; - if (val <= 0) { - digitalWrite(pin, LOW); - pinMode(pin, OUTPUT); // TODO: implement OUTPUT_LOW - return; - } else if (val >= max) { - digitalWrite(pin, HIGH); - pinMode(pin, OUTPUT); // TODO: implement OUTPUT_HIGH - return; - } - - //serial_print("analogWrite\n"); - //serial_print("val = "); - //serial_phex32(val); - //serial_print("\n"); - //serial_print("analog_write_res = "); - //serial_phex(analog_write_res); - //serial_print("\n"); - if (pin == 3 || pin == 4) { - cval = ((uint32_t)val * (uint32_t)(FTM1_MOD + 1)) >> analog_write_res; -#if defined(__MK20DX256__) - } else if (pin == 25 || pin == 32) { - cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res; -#endif - } else { - cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res; - } - //serial_print("cval = "); - //serial_phex32(cval); - //serial_print("\n"); - switch (pin) { - case 3: // PTA12, FTM1_CH0 - FTM1_C0V = cval; - CORE_PIN3_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 4: // PTA13, FTM1_CH1 - FTM1_C1V = cval; - CORE_PIN4_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 5: // PTD7, FTM0_CH7 - FTM0_C7V = cval; - CORE_PIN5_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 6: // PTD4, FTM0_CH4 - FTM0_C4V = cval; - CORE_PIN6_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 9: // PTC3, FTM0_CH2 - FTM0_C2V = cval; - CORE_PIN9_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 10: // PTC4, FTM0_CH3 - FTM0_C3V = cval; - CORE_PIN10_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 20: // PTD5, FTM0_CH5 - FTM0_C5V = cval; - CORE_PIN20_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 21: // PTD6, FTM0_CH6 - FTM0_C6V = cval; - CORE_PIN21_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 22: // PTC1, FTM0_CH0 - FTM0_C0V = cval; - CORE_PIN22_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 23: // PTC2, FTM0_CH1 - FTM0_C1V = cval; - CORE_PIN23_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE; - break; -#if defined(__MK20DX256__) - case 32: // PTB18, FTM2_CH0 - FTM2_C0V = cval; - CORE_PIN32_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; - case 25: // PTB19, FTM1_CH1 - FTM2_C1V = cval; - CORE_PIN25_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE; - break; -#endif - default: - digitalWrite(pin, (val > 127) ? HIGH : LOW); - pinMode(pin, OUTPUT); - } -} - -void analogWriteRes(uint32_t bits) -{ - if (bits < 1) { - bits = 1; - } else if (bits > 16) { - bits = 16; - } - analog_write_res = bits; -} - -void analogWriteFrequency(uint8_t pin, uint32_t frequency) -{ - uint32_t minfreq, prescale, mod; - - //serial_print("analogWriteFrequency: pin = "); - //serial_phex(pin); - //serial_print(", freq = "); - //serial_phex32(frequency); - //serial_print("\n"); - for (prescale = 0; prescale < 7; prescale++) { - minfreq = (F_BUS >> 16) >> prescale; - if (frequency > minfreq) break; - } - //serial_print("F_BUS = "); - //serial_phex32(F_BUS >> prescale); - //serial_print("\n"); - //serial_print("prescale = "); - //serial_phex(prescale); - //serial_print("\n"); - //mod = ((F_BUS >> prescale) / frequency) - 1; - mod = (((F_BUS >> prescale) + (frequency >> 1)) / frequency) - 1; - if (mod > 65535) mod = 65535; - //serial_print("mod = "); - //serial_phex32(mod); - //serial_print("\n"); - if (pin == 3 || pin == 4) { - FTM1_SC = 0; - FTM1_CNT = 0; - FTM1_MOD = mod; - FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale); - } else if (pin == 5 || pin == 6 || pin == 9 || pin == 10 || - (pin >= 20 && pin <= 23)) { - FTM0_SC = 0; - FTM0_CNT = 0; - FTM0_MOD = mod; - FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale); - } -} - - - - -// TODO: startup code needs to initialize all pins to GPIO mode, input by default - -void digitalWrite(uint8_t pin, uint8_t val) -{ - if (pin >= CORE_NUM_DIGITAL) return; - if (*portModeRegister(pin)) { - if (val) { - *portSetRegister(pin) = 1; - } else { - *portClearRegister(pin) = 1; - } - } else { - volatile uint32_t *config = portConfigRegister(pin); - if (val) { - // TODO use bitband for atomic read-mod-write - *config |= (PORT_PCR_PE | PORT_PCR_PS); - //*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; - } else { - // TODO use bitband for atomic read-mod-write - *config &= ~(PORT_PCR_PE); - //*config = PORT_PCR_MUX(1); - } - } - -} - -uint8_t digitalRead(uint8_t pin) -{ - if (pin >= CORE_NUM_DIGITAL) return 0; - return *portInputRegister(pin); -} - - - -void pinMode(uint8_t pin, uint8_t mode) -{ - volatile uint32_t *config; - - if (pin >= CORE_NUM_DIGITAL) return; - config = portConfigRegister(pin); - - if (mode == OUTPUT) { - *portModeRegister(pin) = 1; - *config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); - } else { - *portModeRegister(pin) = 0; - if (mode == INPUT) { - *config = PORT_PCR_MUX(1); - } else { - *config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup - } - } -} - - -void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value) -{ - if (bitOrder == LSBFIRST) { - shiftOut_lsbFirst(dataPin, clockPin, value); - } else { - shiftOut_msbFirst(dataPin, clockPin, value); - } -} - -void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) -{ - uint8_t mask; - for (mask=0x01; mask; mask <<= 1) { - digitalWrite(dataPin, value & mask); - digitalWrite(clockPin, HIGH); - digitalWrite(clockPin, LOW); - } -} - -void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value) -{ - uint8_t mask; - for (mask=0x80; mask; mask >>= 1) { - digitalWrite(dataPin, value & mask); - digitalWrite(clockPin, HIGH); - digitalWrite(clockPin, LOW); - } -} - -uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) -{ - if (bitOrder == LSBFIRST) { - return shiftIn_lsbFirst(dataPin, clockPin); - } else { - return shiftIn_msbFirst(dataPin, clockPin); - } -} - -uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin) -{ - uint8_t mask, value=0; - for (mask=0x01; mask; mask <<= 1) { - digitalWrite(clockPin, HIGH); - if (digitalRead(dataPin)) value |= mask; - digitalWrite(clockPin, LOW); - } - return value; -} - -uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin) -{ - uint8_t mask, value=0; - for (mask=0x80; mask; mask >>= 1) { - digitalWrite(clockPin, HIGH); - if (digitalRead(dataPin)) value |= mask; - digitalWrite(clockPin, LOW); - } - return value; -} - - - -// the systick interrupt is supposed to increment this at 1 kHz rate -volatile uint32_t systick_millis_count = 0; - -//uint32_t systick_current, systick_count, systick_istatus; // testing only - -uint32_t micros(void) -{ - uint32_t count, current, istatus; - - __disable_irq(); - current = SYST_CVR; - count = systick_millis_count; - istatus = SCB_ICSR; // bit 26 indicates if systick exception pending - __enable_irq(); - //systick_current = current; - //systick_count = count; - //systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0; - if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++; - current = ((F_CPU / 1000) - 1) - current; - return count * 1000 + current / (F_CPU / 1000000); -} - -void delay(uint32_t ms) -{ - uint32_t start = micros(); - - if (ms > 0) { - while (1) { - if ((micros() - start) >= 1000) { - ms--; - if (ms == 0) return; - start += 1000; - } - yield(); - } - } -} - -// TODO: verify these result in correct timeouts... -#if F_CPU == 168000000 -#define PULSEIN_LOOPS_PER_USEC 25 -#elif F_CPU == 144000000 -#define PULSEIN_LOOPS_PER_USEC 21 -#elif F_CPU == 120000000 -#define PULSEIN_LOOPS_PER_USEC 18 -#elif F_CPU == 96000000 -#define PULSEIN_LOOPS_PER_USEC 14 -#elif F_CPU == 72000000 -#define PULSEIN_LOOPS_PER_USEC 10 -#elif F_CPU == 48000000 -#define PULSEIN_LOOPS_PER_USEC 7 -#elif F_CPU == 24000000 -#define PULSEIN_LOOPS_PER_USEC 4 -#elif F_CPU == 16000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 8000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 4000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#elif F_CPU == 2000000 -#define PULSEIN_LOOPS_PER_USEC 1 -#endif - - -uint32_t pulseIn_high(volatile uint8_t *reg, uint32_t timeout) -{ - uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC; - uint32_t usec_start, usec_stop; - - // wait for any previous pulse to end - while (*reg) { - if (--timeout_count == 0) return 0; - } - // wait for the pulse to start - while (!*reg) { - if (--timeout_count == 0) return 0; - } - usec_start = micros(); - // wait for the pulse to stop - while (*reg) { - if (--timeout_count == 0) return 0; - } - usec_stop = micros(); - return usec_stop - usec_start; -} - -uint32_t pulseIn_low(volatile uint8_t *reg, uint32_t timeout) -{ - uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC; - uint32_t usec_start, usec_stop; - - // wait for any previous pulse to end - while (!*reg) { - if (--timeout_count == 0) return 0; - } - // wait for the pulse to start - while (*reg) { - if (--timeout_count == 0) return 0; - } - usec_start = micros(); - // wait for the pulse to stop - while (!*reg) { - if (--timeout_count == 0) return 0; - } - usec_stop = micros(); - return usec_stop - usec_start; -} - -// TODO: an inline version should handle the common case where state is const -uint32_t pulseIn(uint8_t pin, uint8_t state, uint32_t timeout) -{ - if (pin >= CORE_NUM_DIGITAL) return 0; - if (state) return pulseIn_high(portInputRegister(pin), timeout); - return pulseIn_low(portInputRegister(pin), timeout);; -} - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/ports/teensy/core/usb_desc.c b/ports/teensy/core/usb_desc.c deleted file mode 100644 index 828a61967fc2f..0000000000000 --- a/ports/teensy/core/usb_desc.c +++ /dev/null @@ -1,895 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "usb_desc.h" -#include "usb_names.h" -#include "mk20dx128.h" -#include "avr_functions.h" - -// USB Descriptors are binary data which the USB host reads to -// automatically detect a USB device's capabilities. The format -// and meaning of every field is documented in numerous USB -// standards. When working with USB descriptors, despite the -// complexity of the standards and poor writing quality in many -// of those documents, remember descriptors are nothing more -// than constant binary data that tells the USB host what the -// device can do. Computers will load drivers based on this data. -// Those drivers then communicate on the endpoints specified by -// the descriptors. - -// To configure a new combination of interfaces or make minor -// changes to existing configuration (eg, change the name or ID -// numbers), usually you would edit "usb_desc.h". This file -// is meant to be configured by the header, so generally it is -// only edited to add completely new USB interfaces or features. - - - -// ************************************************************** -// USB Device -// ************************************************************** - -#define LSB(n) ((n) & 255) -#define MSB(n) (((n) >> 8) & 255) - -// USB Device Descriptor. The USB host reads this first, to learn -// what type of device is connected. -static uint8_t device_descriptor[] = { - 18, // bLength - 1, // bDescriptorType - 0x00, 0x02, // bcdUSB -#ifdef DEVICE_CLASS - DEVICE_CLASS, // bDeviceClass -#else - 0, -#endif -#ifdef DEVICE_SUBCLASS - DEVICE_SUBCLASS, // bDeviceSubClass -#else - 0, -#endif -#ifdef DEVICE_PROTOCOL - DEVICE_PROTOCOL, // bDeviceProtocol -#else - 0, -#endif - EP0_SIZE, // bMaxPacketSize0 - LSB(VENDOR_ID), MSB(VENDOR_ID), // idVendor - LSB(PRODUCT_ID), MSB(PRODUCT_ID), // idProduct - 0x00, 0x01, // bcdDevice - 1, // iManufacturer - 2, // iProduct - 3, // iSerialNumber - 1 // bNumConfigurations -}; - -// These descriptors must NOT be "const", because the USB DMA -// has trouble accessing flash memory with enough bandwidth -// while the processor is executing from flash. - - - -// ************************************************************** -// HID Report Descriptors -// ************************************************************** - -// Each HID interface needs a special report descriptor that tells -// the meaning and format of the data. - -#ifdef KEYBOARD_INTERFACE -// Keyboard Protocol 1, HID 1.11 spec, Appendix B, page 59-60 -static uint8_t keyboard_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop), - 0x09, 0x06, // Usage (Keyboard), - 0xA1, 0x01, // Collection (Application), - 0x75, 0x01, // Report Size (1), - 0x95, 0x08, // Report Count (8), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0xE0, // Usage Minimum (224), - 0x29, 0xE7, // Usage Maximum (231), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Modifier byte - 0x95, 0x08, // Report Count (8), - 0x75, 0x01, // Report Size (1), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x01, // Logical Maximum (1), - 0x05, 0x0C, // Usage Page (Consumer), - 0x09, 0xE9, // Usage (Volume Increment), - 0x09, 0xEA, // Usage (Volume Decrement), - 0x09, 0xE2, // Usage (Mute), - 0x09, 0xCD, // Usage (Play/Pause), - 0x09, 0xB5, // Usage (Scan Next Track), - 0x09, 0xB6, // Usage (Scan Previous Track), - 0x09, 0xB7, // Usage (Stop), - 0x09, 0xB8, // Usage (Eject), - 0x81, 0x02, // Input (Data, Variable, Absolute), ;Media keys - 0x95, 0x05, // Report Count (5), - 0x75, 0x01, // Report Size (1), - 0x05, 0x08, // Usage Page (LEDs), - 0x19, 0x01, // Usage Minimum (1), - 0x29, 0x05, // Usage Maximum (5), - 0x91, 0x02, // Output (Data, Variable, Absolute), ;LED report - 0x95, 0x01, // Report Count (1), - 0x75, 0x03, // Report Size (3), - 0x91, 0x03, // Output (Constant), ;LED report padding - 0x95, 0x06, // Report Count (6), - 0x75, 0x08, // Report Size (8), - 0x15, 0x00, // Logical Minimum (0), - 0x25, 0x7F, // Logical Maximum(104), - 0x05, 0x07, // Usage Page (Key Codes), - 0x19, 0x00, // Usage Minimum (0), - 0x29, 0x7F, // Usage Maximum (104), - 0x81, 0x00, // Input (Data, Array), ;Normal keys - 0xc0 // End Collection -}; -#endif - -#ifdef MOUSE_INTERFACE -// Mouse Protocol 1, HID 1.11 spec, Appendix B, page 59-60, with wheel extension -static uint8_t mouse_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x02, // Usage (Mouse) - 0xA1, 0x01, // Collection (Application) - 0x85, 0x01, // REPORT_ID (1) - 0x05, 0x09, // Usage Page (Button) - 0x19, 0x01, // Usage Minimum (Button #1) - 0x29, 0x08, // Usage Maximum (Button #8) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x01, // Logical Maximum (1) - 0x95, 0x08, // Report Count (8) - 0x75, 0x01, // Report Size (1) - 0x81, 0x02, // Input (Data, Variable, Absolute) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x09, 0x38, // Usage (Wheel) - 0x15, 0x81, // Logical Minimum (-127) - 0x25, 0x7F, // Logical Maximum (127) - 0x75, 0x08, // Report Size (8), - 0x95, 0x03, // Report Count (3), - 0x81, 0x06, // Input (Data, Variable, Relative) - 0xC0, // End Collection - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x02, // Usage (Mouse) - 0xA1, 0x01, // Collection (Application) - 0x85, 0x02, // REPORT_ID (2) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x7F, // Logical Maximum (32767) - 0x75, 0x10, // Report Size (16), - 0x95, 0x02, // Report Count (2), - 0x81, 0x02, // Input (Data, Variable, Absolute) - 0xC0 // End Collection -}; -#endif - -#ifdef JOYSTICK_INTERFACE -static uint8_t joystick_report_desc[] = { - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x04, // Usage (Joystick) - 0xA1, 0x01, // Collection (Application) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x01, // Logical Maximum (1) - 0x75, 0x01, // Report Size (1) - 0x95, 0x20, // Report Count (32) - 0x05, 0x09, // Usage Page (Button) - 0x19, 0x01, // Usage Minimum (Button #1) - 0x29, 0x20, // Usage Maximum (Button #32) - 0x81, 0x02, // Input (variable,absolute) - 0x15, 0x00, // Logical Minimum (0) - 0x25, 0x07, // Logical Maximum (7) - 0x35, 0x00, // Physical Minimum (0) - 0x46, 0x3B, 0x01, // Physical Maximum (315) - 0x75, 0x04, // Report Size (4) - 0x95, 0x01, // Report Count (1) - 0x65, 0x14, // Unit (20) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x39, // Usage (Hat switch) - 0x81, 0x42, // Input (variable,absolute,null_state) - 0x05, 0x01, // Usage Page (Generic Desktop) - 0x09, 0x01, // Usage (Pointer) - 0xA1, 0x00, // Collection () - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x03, // Logical Maximum (1023) - 0x75, 0x0A, // Report Size (10) - 0x95, 0x04, // Report Count (4) - 0x09, 0x30, // Usage (X) - 0x09, 0x31, // Usage (Y) - 0x09, 0x32, // Usage (Z) - 0x09, 0x35, // Usage (Rz) - 0x81, 0x02, // Input (variable,absolute) - 0xC0, // End Collection - 0x15, 0x00, // Logical Minimum (0) - 0x26, 0xFF, 0x03, // Logical Maximum (1023) - 0x75, 0x0A, // Report Size (10) - 0x95, 0x02, // Report Count (2) - 0x09, 0x36, // Usage (Slider) - 0x09, 0x36, // Usage (Slider) - 0x81, 0x02, // Input (variable,absolute) - 0xC0 // End Collection -}; -#endif - -#ifdef SEREMU_INTERFACE -static uint8_t seremu_report_desc[] = { - 0x06, 0xC9, 0xFF, // Usage Page 0xFFC9 (vendor defined) - 0x09, 0x04, // Usage 0x04 - 0xA1, 0x5C, // Collection 0x5C - 0x75, 0x08, // report size = 8 bits (global) - 0x15, 0x00, // logical minimum = 0 (global) - 0x26, 0xFF, 0x00, // logical maximum = 255 (global) - 0x95, SEREMU_TX_SIZE, // report count (global) - 0x09, 0x75, // usage (local) - 0x81, 0x02, // Input - 0x95, SEREMU_RX_SIZE, // report count (global) - 0x09, 0x76, // usage (local) - 0x91, 0x02, // Output - 0x95, 0x04, // report count (global) - 0x09, 0x76, // usage (local) - 0xB1, 0x02, // Feature - 0xC0 // end collection -}; -#endif - -#ifdef RAWHID_INTERFACE -static uint8_t rawhid_report_desc[] = { - 0x06, LSB(RAWHID_USAGE_PAGE), MSB(RAWHID_USAGE_PAGE), - 0x0A, LSB(RAWHID_USAGE), MSB(RAWHID_USAGE), - 0xA1, 0x01, // Collection 0x01 - 0x75, 0x08, // report size = 8 bits - 0x15, 0x00, // logical minimum = 0 - 0x26, 0xFF, 0x00, // logical maximum = 255 - 0x95, RAWHID_TX_SIZE, // report count - 0x09, 0x01, // usage - 0x81, 0x02, // Input (array) - 0x95, RAWHID_RX_SIZE, // report count - 0x09, 0x02, // usage - 0x91, 0x02, // Output (array) - 0xC0 // end collection -}; -#endif - -#ifdef FLIGHTSIM_INTERFACE -static uint8_t flightsim_report_desc[] = { - 0x06, 0x1C, 0xFF, // Usage page = 0xFF1C - 0x0A, 0x39, 0xA7, // Usage = 0xA739 - 0xA1, 0x01, // Collection 0x01 - 0x75, 0x08, // report size = 8 bits - 0x15, 0x00, // logical minimum = 0 - 0x26, 0xFF, 0x00, // logical maximum = 255 - 0x95, FLIGHTSIM_TX_SIZE, // report count - 0x09, 0x01, // usage - 0x81, 0x02, // Input (array) - 0x95, FLIGHTSIM_RX_SIZE, // report count - 0x09, 0x02, // usage - 0x91, 0x02, // Output (array) - 0xC0 // end collection -}; -#endif - - - -// ************************************************************** -// USB Configuration -// ************************************************************** - -// USB Configuration Descriptor. This huge descriptor tells all -// of the devices capbilities. -static uint8_t config_descriptor[CONFIG_DESC_SIZE] = { - // configuration descriptor, USB spec 9.6.3, page 264-266, Table 9-10 - 9, // bLength; - 2, // bDescriptorType; - LSB(CONFIG_DESC_SIZE), // wTotalLength - MSB(CONFIG_DESC_SIZE), - NUM_INTERFACE, // bNumInterfaces - 1, // bConfigurationValue - 0, // iConfiguration - 0xC0, // bmAttributes - 50, // bMaxPower - -#ifdef CDC_IAD_DESCRIPTOR - // interface association descriptor, USB ECN, Table 9-Z - 8, // bLength - 11, // bDescriptorType - CDC_STATUS_INTERFACE, // bFirstInterface - 2, // bInterfaceCount - 0x02, // bFunctionClass - 0x02, // bFunctionSubClass - 0x01, // bFunctionProtocol - 4, // iFunction -#endif - -#ifdef CDC_DATA_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - CDC_STATUS_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x02, // bInterfaceClass - 0x02, // bInterfaceSubClass - 0x01, // bInterfaceProtocol - 0, // iInterface - // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x00, // bDescriptorSubtype - 0x10, 0x01, // bcdCDC - // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x01, // bDescriptorSubtype - 0x01, // bmCapabilities - 1, // bDataInterface - // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28 - 4, // bFunctionLength - 0x24, // bDescriptorType - 0x02, // bDescriptorSubtype - 0x06, // bmCapabilities - // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33 - 5, // bFunctionLength - 0x24, // bDescriptorType - 0x06, // bDescriptorSubtype - CDC_STATUS_INTERFACE, // bMasterInterface - CDC_DATA_INTERFACE, // bSlaveInterface0 - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_ACM_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - CDC_ACM_SIZE, 0, // wMaxPacketSize - 64, // bInterval - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - CDC_DATA_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x0A, // bInterfaceClass - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_RX_ENDPOINT, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - CDC_RX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - CDC_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - CDC_TX_SIZE, 0, // wMaxPacketSize - 0, // bInterval -#endif // CDC_DATA_INTERFACE - -#ifdef MIDI_INTERFACE - // Standard MS Interface Descriptor, - 9, // bLength - 4, // bDescriptorType - MIDI_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x01, // bInterfaceClass (0x01 = Audio) - 0x03, // bInterfaceSubClass (0x03 = MIDI) - 0x00, // bInterfaceProtocol (unused for MIDI) - 0, // iInterface - // MIDI MS Interface Header, USB MIDI 6.1.2.1, page 21, Table 6-2 - 7, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x01, // bDescriptorSubtype = MS_HEADER - 0x00, 0x01, // bcdMSC = revision 01.00 - 0x41, 0x00, // wTotalLength - // MIDI IN Jack Descriptor, B.4.3, Table B-7 (embedded), page 40 - 6, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x02, // bDescriptorSubtype = MIDI_IN_JACK - 0x01, // bJackType = EMBEDDED - 1, // bJackID, ID = 1 - 0, // iJack - // MIDI IN Jack Descriptor, B.4.3, Table B-8 (external), page 40 - 6, // bLength - 0x24, // bDescriptorType = CS_INTERFACE - 0x02, // bDescriptorSubtype = MIDI_IN_JACK - 0x02, // bJackType = EXTERNAL - 2, // bJackID, ID = 2 - 0, // iJack - // MIDI OUT Jack Descriptor, B.4.4, Table B-9, page 41 - 9, - 0x24, // bDescriptorType = CS_INTERFACE - 0x03, // bDescriptorSubtype = MIDI_OUT_JACK - 0x01, // bJackType = EMBEDDED - 3, // bJackID, ID = 3 - 1, // bNrInputPins = 1 pin - 2, // BaSourceID(1) = 2 - 1, // BaSourcePin(1) = first pin - 0, // iJack - // MIDI OUT Jack Descriptor, B.4.4, Table B-10, page 41 - 9, - 0x24, // bDescriptorType = CS_INTERFACE - 0x03, // bDescriptorSubtype = MIDI_OUT_JACK - 0x02, // bJackType = EXTERNAL - 4, // bJackID, ID = 4 - 1, // bNrInputPins = 1 pin - 1, // BaSourceID(1) = 1 - 1, // BaSourcePin(1) = first pin - 0, // iJack - // Standard Bulk OUT Endpoint Descriptor, B.5.1, Table B-11, pae 42 - 9, // bLength - 5, // bDescriptorType = ENDPOINT - MIDI_RX_ENDPOINT, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - MIDI_RX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - 0, // bRefresh - 0, // bSynchAddress - // Class-specific MS Bulk OUT Endpoint Descriptor, B.5.2, Table B-12, page 42 - 5, // bLength - 0x25, // bDescriptorSubtype = CS_ENDPOINT - 0x01, // bJackType = MS_GENERAL - 1, // bNumEmbMIDIJack = 1 jack - 1, // BaAssocJackID(1) = jack ID #1 - // Standard Bulk IN Endpoint Descriptor, B.5.1, Table B-11, pae 42 - 9, // bLength - 5, // bDescriptorType = ENDPOINT - MIDI_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x02, // bmAttributes (0x02=bulk) - MIDI_TX_SIZE, 0, // wMaxPacketSize - 0, // bInterval - 0, // bRefresh - 0, // bSynchAddress - // Class-specific MS Bulk IN Endpoint Descriptor, B.5.2, Table B-12, page 42 - 5, // bLength - 0x25, // bDescriptorSubtype = CS_ENDPOINT - 0x01, // bJackType = MS_GENERAL - 1, // bNumEmbMIDIJack = 1 jack - 3, // BaAssocJackID(1) = jack ID #3 -#endif // MIDI_INTERFACE - -#ifdef KEYBOARD_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - KEYBOARD_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x01, // bInterfaceSubClass (0x01 = Boot) - 0x01, // bInterfaceProtocol (0x01 = Keyboard) - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(keyboard_report_desc)), // wDescriptorLength - MSB(sizeof(keyboard_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - KEYBOARD_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - KEYBOARD_SIZE, 0, // wMaxPacketSize - KEYBOARD_INTERVAL, // bInterval -#endif // KEYBOARD_INTERFACE - -#ifdef MOUSE_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - MOUSE_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass (0x01 = Boot) - 0x00, // bInterfaceProtocol (0x02 = Mouse) - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(mouse_report_desc)), // wDescriptorLength - MSB(sizeof(mouse_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - MOUSE_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - MOUSE_SIZE, 0, // wMaxPacketSize - MOUSE_INTERVAL, // bInterval -#endif // MOUSE_INTERFACE - -#ifdef RAWHID_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - RAWHID_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(rawhid_report_desc)), // wDescriptorLength - MSB(sizeof(rawhid_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - RAWHID_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - RAWHID_TX_SIZE, 0, // wMaxPacketSize - RAWHID_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - RAWHID_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - RAWHID_RX_SIZE, 0, // wMaxPacketSize - RAWHID_RX_INTERVAL, // bInterval -#endif // RAWHID_INTERFACE - -#ifdef FLIGHTSIM_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - FLIGHTSIM_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(flightsim_report_desc)), // wDescriptorLength - MSB(sizeof(flightsim_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - FLIGHTSIM_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - FLIGHTSIM_TX_SIZE, 0, // wMaxPacketSize - FLIGHTSIM_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - FLIGHTSIM_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - FLIGHTSIM_RX_SIZE, 0, // wMaxPacketSize - FLIGHTSIM_RX_INTERVAL, // bInterval -#endif // FLIGHTSIM_INTERFACE - -#ifdef SEREMU_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - SEREMU_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 2, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(seremu_report_desc)), // wDescriptorLength - MSB(sizeof(seremu_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - SEREMU_TX_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - SEREMU_TX_SIZE, 0, // wMaxPacketSize - SEREMU_TX_INTERVAL, // bInterval - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - SEREMU_RX_ENDPOINT, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - SEREMU_RX_SIZE, 0, // wMaxPacketSize - SEREMU_RX_INTERVAL, // bInterval -#endif // SEREMU_INTERFACE - -#ifdef JOYSTICK_INTERFACE - // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - JOYSTICK_INTERFACE, // bInterfaceNumber - 0, // bAlternateSetting - 1, // bNumEndpoints - 0x03, // bInterfaceClass (0x03 = HID) - 0x00, // bInterfaceSubClass - 0x00, // bInterfaceProtocol - 0, // iInterface - // HID interface descriptor, HID 1.11 spec, section 6.2.1 - 9, // bLength - 0x21, // bDescriptorType - 0x11, 0x01, // bcdHID - 0, // bCountryCode - 1, // bNumDescriptors - 0x22, // bDescriptorType - LSB(sizeof(joystick_report_desc)), // wDescriptorLength - MSB(sizeof(joystick_report_desc)), - // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 - 7, // bLength - 5, // bDescriptorType - JOYSTICK_ENDPOINT | 0x80, // bEndpointAddress - 0x03, // bmAttributes (0x03=intr) - JOYSTICK_SIZE, 0, // wMaxPacketSize - JOYSTICK_INTERVAL, // bInterval -#endif // JOYSTICK_INTERFACE - -}; - - -// ************************************************************** -// String Descriptors -// ************************************************************** - -// The descriptors above can provide human readable strings, -// referenced by index numbers. These descriptors are the -// actual string data - -/* defined in usb_names.h -struct usb_string_descriptor_struct { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wString[]; -}; -*/ - -extern struct usb_string_descriptor_struct usb_string_manufacturer_name - __attribute__ ((weak, alias("usb_string_manufacturer_name_default"))); -extern struct usb_string_descriptor_struct usb_string_product_name - __attribute__ ((weak, alias("usb_string_product_name_default"))); -extern struct usb_string_descriptor_struct usb_string_serial_number - __attribute__ ((weak, alias("usb_string_serial_number_default"))); - -struct usb_string_descriptor_struct string0 = { - 4, - 3, - {0x0409} -}; - -struct usb_string_descriptor_struct usb_string_manufacturer_name_default = { - 2 + MANUFACTURER_NAME_LEN * 2, - 3, - MANUFACTURER_NAME -}; -struct usb_string_descriptor_struct usb_string_product_name_default = { - 2 + PRODUCT_NAME_LEN * 2, - 3, - PRODUCT_NAME -}; -struct usb_string_descriptor_struct usb_string_serial_number_default = { - 12, - 3, - {0,0,0,0,0,0,0,0,0,0} -}; - -void usb_init_serialnumber(void) -{ - char buf[11]; - uint32_t i, num; - - __disable_irq(); - FTFL_FSTAT = FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL; - FTFL_FCCOB0 = 0x41; - FTFL_FCCOB1 = 15; - FTFL_FSTAT = FTFL_FSTAT_CCIF; - while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait - num = *(uint32_t *)&FTFL_FCCOB7; - __enable_irq(); - // add extra zero to work around OS-X CDC-ACM driver bug - if (num < 10000000) num = num * 10; - ultoa(num, buf, 10); - for (i=0; i<10; i++) { - char c = buf[i]; - if (!c) break; - usb_string_serial_number_default.wString[i] = c; - } - usb_string_serial_number_default.bLength = i * 2 + 2; -} - - -// ************************************************************** -// Descriptors List -// ************************************************************** - -// This table provides access to all the descriptor data above. - -const usb_descriptor_list_t usb_descriptor_list[] = { - //wValue, wIndex, address, length - {0x0100, 0x0000, device_descriptor, sizeof(device_descriptor)}, - {0x0200, 0x0000, config_descriptor, sizeof(config_descriptor)}, -#ifdef SEREMU_INTERFACE - {0x2200, SEREMU_INTERFACE, seremu_report_desc, sizeof(seremu_report_desc)}, - {0x2100, SEREMU_INTERFACE, config_descriptor+SEREMU_DESC_OFFSET, 9}, -#endif -#ifdef KEYBOARD_INTERFACE - {0x2200, KEYBOARD_INTERFACE, keyboard_report_desc, sizeof(keyboard_report_desc)}, - {0x2100, KEYBOARD_INTERFACE, config_descriptor+KEYBOARD_DESC_OFFSET, 9}, -#endif -#ifdef MOUSE_INTERFACE - {0x2200, MOUSE_INTERFACE, mouse_report_desc, sizeof(mouse_report_desc)}, - {0x2100, MOUSE_INTERFACE, config_descriptor+MOUSE_DESC_OFFSET, 9}, -#endif -#ifdef JOYSTICK_INTERFACE - {0x2200, JOYSTICK_INTERFACE, joystick_report_desc, sizeof(joystick_report_desc)}, - {0x2100, JOYSTICK_INTERFACE, config_descriptor+JOYSTICK_DESC_OFFSET, 9}, -#endif -#ifdef RAWHID_INTERFACE - {0x2200, RAWHID_INTERFACE, rawhid_report_desc, sizeof(rawhid_report_desc)}, - {0x2100, RAWHID_INTERFACE, config_descriptor+RAWHID_DESC_OFFSET, 9}, -#endif -#ifdef FLIGHTSIM_INTERFACE - {0x2200, FLIGHTSIM_INTERFACE, flightsim_report_desc, sizeof(flightsim_report_desc)}, - {0x2100, FLIGHTSIM_INTERFACE, config_descriptor+FLIGHTSIM_DESC_OFFSET, 9}, -#endif - {0x0300, 0x0000, (const uint8_t *)&string0, 0}, - {0x0301, 0x0409, (const uint8_t *)&usb_string_manufacturer_name, 0}, - {0x0302, 0x0409, (const uint8_t *)&usb_string_product_name, 0}, - {0x0303, 0x0409, (const uint8_t *)&usb_string_serial_number, 0}, - //{0x0301, 0x0409, (const uint8_t *)&string1, 0}, - //{0x0302, 0x0409, (const uint8_t *)&string2, 0}, - //{0x0303, 0x0409, (const uint8_t *)&string3, 0}, - {0, 0, NULL, 0} -}; - - -// ************************************************************** -// Endpoint Configuration -// ************************************************************** - -#if 0 -// 0x00 = not used -// 0x19 = Recieve only -// 0x15 = Transmit only -// 0x1D = Transmit & Recieve -// -const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = -{ - 0x00, 0x15, 0x19, 0x15, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; -#endif - - -const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS] = -{ -#if (defined(ENDPOINT1_CONFIG) && NUM_ENDPOINTS >= 1) - ENDPOINT1_CONFIG, -#elif (NUM_ENDPOINTS >= 1) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT2_CONFIG) && NUM_ENDPOINTS >= 2) - ENDPOINT2_CONFIG, -#elif (NUM_ENDPOINTS >= 2) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT3_CONFIG) && NUM_ENDPOINTS >= 3) - ENDPOINT3_CONFIG, -#elif (NUM_ENDPOINTS >= 3) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT4_CONFIG) && NUM_ENDPOINTS >= 4) - ENDPOINT4_CONFIG, -#elif (NUM_ENDPOINTS >= 4) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT5_CONFIG) && NUM_ENDPOINTS >= 5) - ENDPOINT5_CONFIG, -#elif (NUM_ENDPOINTS >= 5) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT6_CONFIG) && NUM_ENDPOINTS >= 6) - ENDPOINT6_CONFIG, -#elif (NUM_ENDPOINTS >= 6) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT7_CONFIG) && NUM_ENDPOINTS >= 7) - ENDPOINT7_CONFIG, -#elif (NUM_ENDPOINTS >= 7) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT8_CONFIG) && NUM_ENDPOINTS >= 8) - ENDPOINT8_CONFIG, -#elif (NUM_ENDPOINTS >= 8) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT9_CONFIG) && NUM_ENDPOINTS >= 9) - ENDPOINT9_CONFIG, -#elif (NUM_ENDPOINTS >= 9) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT10_CONFIG) && NUM_ENDPOINTS >= 10) - ENDPOINT10_CONFIG, -#elif (NUM_ENDPOINTS >= 10) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT11_CONFIG) && NUM_ENDPOINTS >= 11) - ENDPOINT11_CONFIG, -#elif (NUM_ENDPOINTS >= 11) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT12_CONFIG) && NUM_ENDPOINTS >= 12) - ENDPOINT12_CONFIG, -#elif (NUM_ENDPOINTS >= 12) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT13_CONFIG) && NUM_ENDPOINTS >= 13) - ENDPOINT13_CONFIG, -#elif (NUM_ENDPOINTS >= 13) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT14_CONFIG) && NUM_ENDPOINTS >= 14) - ENDPOINT14_CONFIG, -#elif (NUM_ENDPOINTS >= 14) - ENDPOINT_UNUSED, -#endif -#if (defined(ENDPOINT15_CONFIG) && NUM_ENDPOINTS >= 15) - ENDPOINT15_CONFIG, -#elif (NUM_ENDPOINTS >= 15) - ENDPOINT_UNUSED, -#endif -}; - - - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_desc.h b/ports/teensy/core/usb_desc.h deleted file mode 100644 index a951e03f61238..0000000000000 --- a/ports/teensy/core/usb_desc.h +++ /dev/null @@ -1,313 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_desc_h_ -#define _usb_desc_h_ - -#if F_CPU >= 20000000 - -// This header is NOT meant to be included when compiling -// user sketches in Arduino. The low-level functions -// provided by usb_dev.c are meant to be called only by -// code which provides higher-level interfaces to the user. - -#include -#include - -#define ENDPOINT_UNUSED 0x00 -#define ENDPOINT_TRANSIMIT_ONLY 0x15 -#define ENDPOINT_RECEIVE_ONLY 0x19 -#define ENDPOINT_TRANSMIT_AND_RECEIVE 0x1D - -/* -To modify a USB Type to have different interfaces, start in this -file. Delete the XYZ_INTERFACE lines for any interfaces you -wish to remove, and copy them from another USB Type for any you -want to add. - -Give each interface a unique number, and edit NUM_INTERFACE to -reflect the number of interfaces. - -Within each interface, make sure it uses a unique set of endpoints. -Edit NUM_ENDPOINTS to be at least the largest endpoint number used. -Then edit the ENDPOINT*_CONFIG lines so each endpoint is configured -the proper way (transmit, receive, or both). - -The CONFIG_DESC_SIZE and any XYZ_DESC_OFFSET numbers must be -edited to the correct sizes. See usb_desc.c for the giant array -of bytes. Someday these may be done automatically..... (but how?) - -If you are using existing interfaces, the code in each file should -automatically adapt to the changes you specify. If you need to -create a new type of interface, you'll need to write the code which -sends and receives packets, and presents an API to the user. - -Finally, edit usb_inst.cpp, which creats instances of the C++ -objects for each combination. - -Some operating systems, especially Windows, may cache USB device -info. Changes to the device name may not update on the same -computer unless the vendor or product ID numbers change, or the -"bcdDevice" revision code is increased. - -If these instructions are missing steps or could be improved, please -let me know? http://forum.pjrc.com/forums/4-Suggestions-amp-Bug-Reports -*/ - - - -#if defined(USB_SERIAL) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0483 - #define DEVICE_CLASS 2 // 2 = Communication Class - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'U','S','B',' ','S','e','r','i','a','l'} - #define PRODUCT_NAME_LEN 10 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 12 - #define NUM_INTERFACE 2 - #define CDC_STATUS_INTERFACE 0 - #define CDC_DATA_INTERFACE 1 - #define CDC_ACM_ENDPOINT 2 - #define CDC_RX_ENDPOINT 3 - #define CDC_TX_ENDPOINT 4 - #define CDC_ACM_SIZE 16 - #define CDC_RX_SIZE 64 - #define CDC_TX_SIZE 64 - #define CONFIG_DESC_SIZE (9+9+5+5+4+5+7+9+7+7) - #define ENDPOINT2_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_HID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0482 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'} - #define PRODUCT_NAME_LEN 23 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 5 - #define NUM_USB_BUFFERS 24 - #define NUM_INTERFACE 4 - #define SEREMU_INTERFACE 2 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define KEYBOARD_INTERFACE 0 // Keyboard - #define KEYBOARD_ENDPOINT 3 - #define KEYBOARD_SIZE 8 - #define KEYBOARD_INTERVAL 1 - #define MOUSE_INTERFACE 1 // Mouse - #define MOUSE_ENDPOINT 5 - #define MOUSE_SIZE 8 - #define MOUSE_INTERVAL 1 - #define JOYSTICK_INTERFACE 3 // Joystick - #define JOYSTICK_ENDPOINT 4 - #define JOYSTICK_SIZE 16 - #define JOYSTICK_INTERVAL 2 - #define KEYBOARD_DESC_OFFSET (9 + 9) - #define MOUSE_DESC_OFFSET (9 + 9+9+7 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7 + 9+9+7 + 9) - #define JOYSTICK_DESC_OFFSET (9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7 + 9+9+7 + 9+9+7+7 + 9+9+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT5_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_SERIAL_HID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0487 - #define DEVICE_CLASS 0xEF - #define DEVICE_SUBCLASS 0x02 - #define DEVICE_PROTOCOL 0x01 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'S','e','r','i','a','l','/','K','e','y','b','o','a','r','d','/','M','o','u','s','e','/','J','o','y','s','t','i','c','k'} - #define PRODUCT_NAME_LEN 30 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 6 - #define NUM_USB_BUFFERS 30 - #define NUM_INTERFACE 5 - #define CDC_IAD_DESCRIPTOR 1 - #define CDC_STATUS_INTERFACE 0 - #define CDC_DATA_INTERFACE 1 // Serial - #define CDC_ACM_ENDPOINT 2 - #define CDC_RX_ENDPOINT 3 - #define CDC_TX_ENDPOINT 4 - #define CDC_ACM_SIZE 16 - #define CDC_RX_SIZE 64 - #define CDC_TX_SIZE 64 - #define KEYBOARD_INTERFACE 2 // Keyboard - #define KEYBOARD_ENDPOINT 1 - #define KEYBOARD_SIZE 8 - #define KEYBOARD_INTERVAL 1 - #define MOUSE_INTERFACE 3 // Mouse - #define MOUSE_ENDPOINT 5 - #define MOUSE_SIZE 8 - #define MOUSE_INTERVAL 2 - #define JOYSTICK_INTERFACE 4 // Joystick - #define JOYSTICK_ENDPOINT 6 - #define JOYSTICK_SIZE 16 - #define JOYSTICK_INTERVAL 1 - #define KEYBOARD_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9) - #define MOUSE_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9) - #define JOYSTICK_DESC_OFFSET (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9) - #define CONFIG_DESC_SIZE (9+8 + 9+5+5+4+5+7+9+7+7 + 9+9+7 + 9+9+7 + 9+9+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT5_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT6_CONFIG ENDPOINT_TRANSIMIT_ONLY - -#elif defined(USB_MIDI) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0485 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y',' ','M','I','D','I'} - #define PRODUCT_NAME_LEN 11 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 16 - #define NUM_INTERFACE 2 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define MIDI_INTERFACE 0 // MIDI - #define MIDI_TX_ENDPOINT 3 - #define MIDI_TX_SIZE 64 - #define MIDI_RX_ENDPOINT 4 - #define MIDI_RX_SIZE 64 - #define SEREMU_DESC_OFFSET (9 + 9+7+6+6+9+9+9+5+9+5 + 9) - #define CONFIG_DESC_SIZE (9 + 9+7+6+6+9+9+9+5+9+5 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#elif defined(USB_RAWHID) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0486 - #define RAWHID_USAGE_PAGE 0xFFAB // recommended: 0xFF00 to 0xFFFF - #define RAWHID_USAGE 0x0200 // recommended: 0x0100 to 0xFFFF - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y','d','u','i','n','o',' ','R','a','w','H','I','D'} - #define PRODUCT_NAME_LEN 18 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 6 - #define NUM_USB_BUFFERS 12 - #define NUM_INTERFACE 2 - #define RAWHID_INTERFACE 0 // RawHID - #define RAWHID_TX_ENDPOINT 3 - #define RAWHID_TX_SIZE 64 - #define RAWHID_TX_INTERVAL 1 - #define RAWHID_RX_ENDPOINT 4 - #define RAWHID_RX_SIZE 64 - #define RAWHID_RX_INTERVAL 1 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define RAWHID_DESC_OFFSET (9 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7+7 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#elif defined(USB_FLIGHTSIM) - #define VENDOR_ID 0x16C0 - #define PRODUCT_ID 0x0488 - #define MANUFACTURER_NAME {'T','e','e','n','s','y','d','u','i','n','o'} - #define MANUFACTURER_NAME_LEN 11 - #define PRODUCT_NAME {'T','e','e','n','s','y',' ','F','l','i','g','h','t',' ','S','i','m',' ','C','o','n','t','r','o','l','s'} - #define PRODUCT_NAME_LEN 26 - #define EP0_SIZE 64 - #define NUM_ENDPOINTS 4 - #define NUM_USB_BUFFERS 20 - #define NUM_INTERFACE 2 - #define FLIGHTSIM_INTERFACE 0 // Flight Sim Control - #define FLIGHTSIM_TX_ENDPOINT 3 - #define FLIGHTSIM_TX_SIZE 64 - #define FLIGHTSIM_TX_INTERVAL 1 - #define FLIGHTSIM_RX_ENDPOINT 4 - #define FLIGHTSIM_RX_SIZE 64 - #define FLIGHTSIM_RX_INTERVAL 1 - #define SEREMU_INTERFACE 1 // Serial emulation - #define SEREMU_TX_ENDPOINT 1 - #define SEREMU_TX_SIZE 64 - #define SEREMU_TX_INTERVAL 1 - #define SEREMU_RX_ENDPOINT 2 - #define SEREMU_RX_SIZE 32 - #define SEREMU_RX_INTERVAL 2 - #define FLIGHTSIM_DESC_OFFSET (9 + 9) - #define SEREMU_DESC_OFFSET (9 + 9+9+7+7 + 9) - #define CONFIG_DESC_SIZE (9 + 9+9+7+7 + 9+9+7+7) - #define ENDPOINT1_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT2_CONFIG ENDPOINT_RECEIVE_ONLY - #define ENDPOINT3_CONFIG ENDPOINT_TRANSIMIT_ONLY - #define ENDPOINT4_CONFIG ENDPOINT_RECEIVE_ONLY - -#endif - -// NUM_ENDPOINTS = number of non-zero endpoints (0 to 15) -extern const uint8_t usb_endpoint_config_table[NUM_ENDPOINTS]; - -typedef struct { - uint16_t wValue; - uint16_t wIndex; - const uint8_t *addr; - uint16_t length; -} usb_descriptor_list_t; - -extern const usb_descriptor_list_t usb_descriptor_list[]; - - -#endif // F_CPU >= 20 MHz - -#endif diff --git a/ports/teensy/core/usb_dev.c b/ports/teensy/core/usb_dev.c deleted file mode 100644 index 6cf85d3fd3984..0000000000000 --- a/ports/teensy/core/usb_dev.c +++ /dev/null @@ -1,980 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "mk20dx128.h" -//#include "HardwareSerial.h" -#include "usb_dev.h" -#include "usb_mem.h" - -// buffer descriptor table - -typedef struct { - uint32_t desc; - void * addr; -} bdt_t; - -__attribute__ ((section(".usbdescriptortable"), used)) -static bdt_t table[(NUM_ENDPOINTS+1)*4]; - -static usb_packet_t *rx_first[NUM_ENDPOINTS]; -static usb_packet_t *rx_last[NUM_ENDPOINTS]; -static usb_packet_t *tx_first[NUM_ENDPOINTS]; -static usb_packet_t *tx_last[NUM_ENDPOINTS]; -uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS]; - -static uint8_t tx_state[NUM_ENDPOINTS]; -#define TX_STATE_BOTH_FREE_EVEN_FIRST 0 -#define TX_STATE_BOTH_FREE_ODD_FIRST 1 -#define TX_STATE_EVEN_FREE 2 -#define TX_STATE_ODD_FREE 3 -#define TX_STATE_NONE_FREE_EVEN_FIRST 4 -#define TX_STATE_NONE_FREE_ODD_FIRST 5 - -#define BDT_OWN 0x80 -#define BDT_DATA1 0x40 -#define BDT_DATA0 0x00 -#define BDT_DTS 0x08 -#define BDT_STALL 0x04 -#define BDT_PID(n) (((n) >> 2) & 15) - -#define BDT_DESC(count, data) (BDT_OWN | BDT_DTS \ - | ((data) ? BDT_DATA1 : BDT_DATA0) \ - | ((count) << 16)) - -#define TX 1 -#define RX 0 -#define ODD 1 -#define EVEN 0 -#define DATA0 0 -#define DATA1 1 -#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) -#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - - -static union { - struct { - union { - struct { - uint8_t bmRequestType; - uint8_t bRequest; - }; - uint16_t wRequestAndType; - }; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; - }; - struct { - uint32_t word1; - uint32_t word2; - }; -} setup; - - -#define GET_STATUS 0 -#define CLEAR_FEATURE 1 -#define SET_FEATURE 3 -#define SET_ADDRESS 5 -#define GET_DESCRIPTOR 6 -#define SET_DESCRIPTOR 7 -#define GET_CONFIGURATION 8 -#define SET_CONFIGURATION 9 -#define GET_INTERFACE 10 -#define SET_INTERFACE 11 -#define SYNCH_FRAME 12 - -// SETUP always uses a DATA0 PID for the data field of the SETUP transaction. -// transactions in the data phase start with DATA1 and toggle (figure 8-12, USB1.1) -// Status stage uses a DATA1 PID. - -static uint8_t ep0_rx0_buf[EP0_SIZE] __attribute__ ((aligned (4))); -static uint8_t ep0_rx1_buf[EP0_SIZE] __attribute__ ((aligned (4))); -static const uint8_t *ep0_tx_ptr = NULL; -static uint16_t ep0_tx_len; -static uint8_t ep0_tx_bdt_bank = 0; -static uint8_t ep0_tx_data_toggle = 0; -uint8_t usb_rx_memory_needed = 0; - -volatile uint8_t usb_configuration = 0; -volatile uint8_t usb_reboot_timer = 0; - - -static void endpoint0_stall(void) -{ - USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; -} - - -static void endpoint0_transmit(const void *data, uint32_t len) -{ -#if 0 - serial_print("tx0:"); - serial_phex32((uint32_t)data); - serial_print(","); - serial_phex16(len); - serial_print(ep0_tx_bdt_bank ? ", odd" : ", even"); - serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n"); -#endif - table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data; - table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle); - ep0_tx_data_toggle ^= 1; - ep0_tx_bdt_bank ^= 1; -} - -static uint8_t reply_buffer[8]; - -static void usb_setup(void) -{ - const uint8_t *data = NULL; - uint32_t datalen = 0; - const usb_descriptor_list_t *list; - uint32_t size; - volatile uint8_t *reg; - uint8_t epconf; - const uint8_t *cfg; - int i; - - switch (setup.wRequestAndType) { - case 0x0500: // SET_ADDRESS - break; - case 0x0900: // SET_CONFIGURATION - //serial_print("configure\n"); - usb_configuration = setup.wValue; - reg = &USB0_ENDPT1; - cfg = usb_endpoint_config_table; - // clear all BDT entries, free any allocated memory... - for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) { - if (table[i].desc & BDT_OWN) { - usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8)); - } - } - // free all queued packets - for (i=0; i < NUM_ENDPOINTS; i++) { - usb_packet_t *p, *n; - p = rx_first[i]; - while (p) { - n = p->next; - usb_free(p); - p = n; - } - rx_first[i] = NULL; - rx_last[i] = NULL; - p = tx_first[i]; - while (p) { - n = p->next; - usb_free(p); - p = n; - } - tx_first[i] = NULL; - tx_last[i] = NULL; - usb_rx_byte_count_data[i] = 0; - switch (tx_state[i]) { - case TX_STATE_EVEN_FREE: - case TX_STATE_NONE_FREE_EVEN_FIRST: - tx_state[i] = TX_STATE_BOTH_FREE_EVEN_FIRST; - break; - case TX_STATE_ODD_FREE: - case TX_STATE_NONE_FREE_ODD_FIRST: - tx_state[i] = TX_STATE_BOTH_FREE_ODD_FIRST; - break; - default: - break; - } - } - usb_rx_memory_needed = 0; - for (i=1; i <= NUM_ENDPOINTS; i++) { - epconf = *cfg++; - *reg = epconf; - reg += 4; - if (epconf & USB_ENDPT_EPRXEN) { - usb_packet_t *p; - p = usb_malloc(); - if (p) { - table[index(i, RX, EVEN)].addr = p->buf; - table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); - } else { - table[index(i, RX, EVEN)].desc = 0; - usb_rx_memory_needed++; - } - p = usb_malloc(); - if (p) { - table[index(i, RX, ODD)].addr = p->buf; - table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); - } else { - table[index(i, RX, ODD)].desc = 0; - usb_rx_memory_needed++; - } - } - table[index(i, TX, EVEN)].desc = 0; - table[index(i, TX, ODD)].desc = 0; - } - break; - case 0x0880: // GET_CONFIGURATION - reply_buffer[0] = usb_configuration; - datalen = 1; - data = reply_buffer; - break; - case 0x0080: // GET_STATUS (device) - reply_buffer[0] = 0; - reply_buffer[1] = 0; - datalen = 2; - data = reply_buffer; - break; - case 0x0082: // GET_STATUS (endpoint) - if (setup.wIndex > NUM_ENDPOINTS) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - reply_buffer[0] = 0; - reply_buffer[1] = 0; - if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1; - data = reply_buffer; - datalen = 2; - break; - case 0x0102: // CLEAR_FEATURE (endpoint) - i = setup.wIndex & 0x7F; - if (i > NUM_ENDPOINTS || setup.wValue != 0) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) &= ~0x02; - // TODO: do we need to clear the data toggle here? - break; - case 0x0302: // SET_FEATURE (endpoint) - i = setup.wIndex & 0x7F; - if (i > NUM_ENDPOINTS || setup.wValue != 0) { - // TODO: do we need to handle IN vs OUT here? - endpoint0_stall(); - return; - } - (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4)) |= 0x02; - // TODO: do we need to clear the data toggle here? - break; - case 0x0680: // GET_DESCRIPTOR - case 0x0681: - //serial_print("desc:"); - //serial_phex16(setup.wValue); - //serial_print("\n"); - for (list = usb_descriptor_list; 1; list++) { - if (list->addr == NULL) break; - //if (setup.wValue == list->wValue && - //(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) { - if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) { - data = list->addr; - if ((setup.wValue >> 8) == 3) { - // for string descriptors, use the descriptor's - // length field, allowing runtime configured - // length. - datalen = *(list->addr); - } else { - datalen = list->length; - } -#if 0 - serial_print("Desc found, "); - serial_phex32((uint32_t)data); - serial_print(","); - serial_phex16(datalen); - serial_print(","); - serial_phex(data[0]); - serial_phex(data[1]); - serial_phex(data[2]); - serial_phex(data[3]); - serial_phex(data[4]); - serial_phex(data[5]); - serial_print("\n"); -#endif - goto send; - } - } - //serial_print("desc: not found\n"); - endpoint0_stall(); - return; -#if defined(CDC_STATUS_INTERFACE) - case 0x2221: // CDC_SET_CONTROL_LINE_STATE - usb_cdc_line_rtsdtr = setup.wValue; - //serial_print("set control line state\n"); - break; - case 0x2321: // CDC_SEND_BREAK - break; - case 0x2021: // CDC_SET_LINE_CODING - //serial_print("set coding, waiting...\n"); - return; -#endif - -// TODO: this does not work... why? -#if defined(SEREMU_INTERFACE) || defined(KEYBOARD_INTERFACE) - case 0x0921: // HID SET_REPORT - //serial_print(":)\n"); - return; - case 0x0A21: // HID SET_IDLE - break; - // case 0xC940: -#endif - default: - endpoint0_stall(); - return; - } - send: - //serial_print("setup send "); - //serial_phex32(data); - //serial_print(","); - //serial_phex16(datalen); - //serial_print("\n"); - - if (datalen > setup.wLength) datalen = setup.wLength; - size = datalen; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - datalen -= size; - if (datalen == 0 && size < EP0_SIZE) return; - - size = datalen; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - datalen -= size; - if (datalen == 0 && size < EP0_SIZE) return; - - ep0_tx_ptr = data; - ep0_tx_len = datalen; -} - - - -//A bulk endpoint's toggle sequence is initialized to DATA0 when the endpoint -//experiences any configuration event (configuration events are explained in -//Sections 9.1.1.5 and 9.4.5). - -//Configuring a device or changing an alternate setting causes all of the status -//and configuration values associated with endpoints in the affected interfaces -//to be set to their default values. This includes setting the data toggle of -//any endpoint using data toggles to the value DATA0. - -//For endpoints using data toggle, regardless of whether an endpoint has the -//Halt feature set, a ClearFeature(ENDPOINT_HALT) request always results in the -//data toggle being reinitialized to DATA0. - - - -// #define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - -static void usb_control(uint32_t stat) -{ - bdt_t *b; - uint32_t pid, size; - uint8_t *buf; - const uint8_t *data; - - b = stat2bufferdescriptor(stat); - pid = BDT_PID(b->desc); - //count = b->desc >> 16; - buf = b->addr; - //serial_print("pid:"); - //serial_phex(pid); - //serial_print(", count:"); - //serial_phex(count); - //serial_print("\n"); - - switch (pid) { - case 0x0D: // Setup received from host - //serial_print("PID=Setup\n"); - //if (count != 8) ; // panic? - // grab the 8 byte setup info - setup.word1 = *(uint32_t *)(buf); - setup.word2 = *(uint32_t *)(buf + 4); - - // give the buffer back - b->desc = BDT_DESC(EP0_SIZE, DATA1); - //table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1); - //table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1); - - // clear any leftover pending IN transactions - ep0_tx_ptr = NULL; - if (ep0_tx_data_toggle) { - } - //if (table[index(0, TX, EVEN)].desc & 0x80) { - //serial_print("leftover tx even\n"); - //} - //if (table[index(0, TX, ODD)].desc & 0x80) { - //serial_print("leftover tx odd\n"); - //} - table[index(0, TX, EVEN)].desc = 0; - table[index(0, TX, ODD)].desc = 0; - // first IN after Setup is always DATA1 - ep0_tx_data_toggle = 1; - -#if 0 - serial_print("bmRequestType:"); - serial_phex(setup.bmRequestType); - serial_print(", bRequest:"); - serial_phex(setup.bRequest); - serial_print(", wValue:"); - serial_phex16(setup.wValue); - serial_print(", wIndex:"); - serial_phex16(setup.wIndex); - serial_print(", len:"); - serial_phex16(setup.wLength); - serial_print("\n"); -#endif - // actually "do" the setup request - usb_setup(); - // unfreeze the USB, now that we're ready - USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit - break; - case 0x01: // OUT transaction received from host - case 0x02: - //serial_print("PID=OUT\n"); -#ifdef CDC_STATUS_INTERFACE - if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) { - int i; - uint8_t *dst = (uint8_t *)usb_cdc_line_coding; - //serial_print("set line coding "); - for (i=0; i<7; i++) { - //serial_phex(*buf); - *dst++ = *buf++; - } - //serial_phex32(usb_cdc_line_coding[0]); - //serial_print("\n"); - if (usb_cdc_line_coding[0] == 134) usb_reboot_timer = 15; - endpoint0_transmit(NULL, 0); - } -#endif -#ifdef KEYBOARD_INTERFACE - if (setup.word1 == 0x02000921 && setup.word2 == ((1<<16)|KEYBOARD_INTERFACE)) { - keyboard_leds = buf[0]; - endpoint0_transmit(NULL, 0); - } -#endif -#ifdef SEREMU_INTERFACE - if (setup.word1 == 0x03000921 && setup.word2 == ((4<<16)|SEREMU_INTERFACE) - && buf[0] == 0xA9 && buf[1] == 0x45 && buf[2] == 0xC2 && buf[3] == 0x6B) { - usb_reboot_timer = 5; - endpoint0_transmit(NULL, 0); - } -#endif - // give the buffer back - b->desc = BDT_DESC(EP0_SIZE, DATA1); - break; - - case 0x09: // IN transaction completed to host - //serial_print("PID=IN:"); - //serial_phex(stat); - //serial_print("\n"); - - // send remaining data, if any... - data = ep0_tx_ptr; - if (data) { - size = ep0_tx_len; - if (size > EP0_SIZE) size = EP0_SIZE; - endpoint0_transmit(data, size); - data += size; - ep0_tx_len -= size; - ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL; - } - - if (setup.bRequest == 5 && setup.bmRequestType == 0) { - setup.bRequest = 0; - //serial_print("set address: "); - //serial_phex16(setup.wValue); - //serial_print("\n"); - USB0_ADDR = setup.wValue; - } - - break; - //default: - //serial_print("PID=unknown:"); - //serial_phex(pid); - //serial_print("\n"); - } - USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit -} - - - - - - -usb_packet_t *usb_rx(uint32_t endpoint) -{ - usb_packet_t *ret; - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return NULL; - __disable_irq(); - ret = rx_first[endpoint]; - if (ret) { - rx_first[endpoint] = ret->next; - usb_rx_byte_count_data[endpoint] -= ret->len; - } - __enable_irq(); - //serial_print("rx, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32(ret); - //serial_print("\n"); - return ret; -} - -static uint32_t usb_queue_byte_count(const usb_packet_t *p) -{ - uint32_t count=0; - - __disable_irq(); - for ( ; p; p = p->next) { - count += p->len; - } - __enable_irq(); - return count; -} - -// TODO: make this an inline function... -/* -uint32_t usb_rx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_rx_byte_count_data[endpoint]; - //return usb_queue_byte_count(rx_first[endpoint]); -} -*/ - -uint32_t usb_tx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_queue_byte_count(tx_first[endpoint]); -} - -uint32_t usb_tx_packet_count(uint32_t endpoint) -{ - const usb_packet_t *p; - uint32_t count=0; - - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - __disable_irq(); - for (p = tx_first[endpoint]; p; p = p->next) count++; - __enable_irq(); - return count; -} - - -// Called from usb_free, but only when usb_rx_memory_needed > 0, indicating -// receive endpoints are starving for memory. The intention is to give -// endpoints needing receive memory priority over the user's code, which is -// likely calling usb_malloc to obtain memory for transmitting. When the -// user is creating data very quickly, their consumption could starve reception -// without this prioritization. The packet buffer (input) is assigned to the -// first endpoint needing memory. -// -void usb_rx_memory(usb_packet_t *packet) -{ - unsigned int i; - const uint8_t *cfg; - - cfg = usb_endpoint_config_table; - //serial_print("rx_mem:"); - __disable_irq(); - for (i=1; i <= NUM_ENDPOINTS; i++) { - if (*cfg++ & USB_ENDPT_EPRXEN) { - if (table[index(i, RX, EVEN)].desc == 0) { - table[index(i, RX, EVEN)].addr = packet->buf; - table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); - usb_rx_memory_needed--; - __enable_irq(); - //serial_phex(i); - //serial_print(",even\n"); - return; - } - if (table[index(i, RX, ODD)].desc == 0) { - table[index(i, RX, ODD)].addr = packet->buf; - table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); - usb_rx_memory_needed--; - __enable_irq(); - //serial_phex(i); - //serial_print(",odd\n"); - return; - } - } - } - __enable_irq(); - // we should never reach this point. If we get here, it means - // usb_rx_memory_needed was set greater than zero, but no memory - // was actually needed. - usb_rx_memory_needed = 0; - usb_free(packet); - return; -} - -//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) -//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) - -void usb_tx(uint32_t endpoint, usb_packet_t *packet) -{ - bdt_t *b = &table[index(endpoint, TX, EVEN)]; - uint8_t next; - - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return; - __disable_irq(); - //serial_print("txstate="); - //serial_phex(tx_state[endpoint]); - //serial_print("\n"); - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - next = TX_STATE_ODD_FREE; - break; - case TX_STATE_BOTH_FREE_ODD_FIRST: - b++; - next = TX_STATE_EVEN_FREE; - break; - case TX_STATE_EVEN_FREE: - next = TX_STATE_NONE_FREE_ODD_FIRST; - break; - case TX_STATE_ODD_FREE: - b++; - next = TX_STATE_NONE_FREE_EVEN_FIRST; - break; - default: - if (tx_first[endpoint] == NULL) { - tx_first[endpoint] = packet; - } else { - tx_last[endpoint]->next = packet; - } - tx_last[endpoint] = packet; - __enable_irq(); - return; - } - tx_state[endpoint] = next; - b->addr = packet->buf; - b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0); - __enable_irq(); -} - - - - - - -void _reboot_Teensyduino_(void) -{ - // TODO: initialize R0 with a code.... - __asm__ volatile("bkpt"); -} - - - -void usb_isr(void) -{ - uint8_t status, stat, t; - - //serial_print("isr"); - //status = USB0_ISTAT; - //serial_phex(status); - //serial_print("\n"); - restart: - status = USB0_ISTAT; - - if ((status & USB_INTEN_SOFTOKEN /* 04 */ )) { - if (usb_configuration) { - t = usb_reboot_timer; - if (t) { - usb_reboot_timer = --t; - if (!t) _reboot_Teensyduino_(); - } -#ifdef CDC_DATA_INTERFACE - t = usb_cdc_transmit_flush_timer; - if (t) { - usb_cdc_transmit_flush_timer = --t; - if (t == 0) usb_serial_flush_callback(); - } -#endif -#ifdef SEREMU_INTERFACE - t = usb_seremu_transmit_flush_timer; - if (t) { - usb_seremu_transmit_flush_timer = --t; - if (t == 0) usb_seremu_flush_callback(); - } -#endif -#ifdef MIDI_INTERFACE - usb_midi_flush_output(); -#endif -#ifdef FLIGHTSIM_INTERFACE - usb_flightsim_flush_callback(); -#endif - } - USB0_ISTAT = USB_INTEN_SOFTOKEN; - } - - if ((status & USB_ISTAT_TOKDNE /* 08 */ )) { - uint8_t endpoint; - stat = USB0_STAT; - //serial_print("token: ep="); - //serial_phex(stat >> 4); - //serial_print(stat & 0x08 ? ",tx" : ",rx"); - //serial_print(stat & 0x04 ? ",odd\n" : ",even\n"); - endpoint = stat >> 4; - if (endpoint == 0) { - usb_control(stat); - } else { - bdt_t *b = stat2bufferdescriptor(stat); - usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8); -#if 0 - serial_print("ep:"); - serial_phex(endpoint); - serial_print(", pid:"); - serial_phex(BDT_PID(b->desc)); - serial_print(((uint32_t)b & 8) ? ", odd" : ", even"); - serial_print(", count:"); - serial_phex(b->desc >> 16); - serial_print("\n"); -#endif - endpoint--; // endpoint is index to zero-based arrays - - if (stat & 0x08) { // transmit - usb_free(packet); - packet = tx_first[endpoint]; - if (packet) { - //serial_print("tx packet\n"); - tx_first[endpoint] = packet->next; - b->addr = packet->buf; - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - tx_state[endpoint] = TX_STATE_ODD_FREE; - break; - case TX_STATE_BOTH_FREE_ODD_FIRST: - tx_state[endpoint] = TX_STATE_EVEN_FREE; - break; - case TX_STATE_EVEN_FREE: - tx_state[endpoint] = TX_STATE_NONE_FREE_ODD_FIRST; - break; - case TX_STATE_ODD_FREE: - tx_state[endpoint] = TX_STATE_NONE_FREE_EVEN_FIRST; - break; - default: - break; - } - b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0); - } else { - //serial_print("tx no packet\n"); - switch (tx_state[endpoint]) { - case TX_STATE_BOTH_FREE_EVEN_FIRST: - case TX_STATE_BOTH_FREE_ODD_FIRST: - break; - case TX_STATE_EVEN_FREE: - tx_state[endpoint] = TX_STATE_BOTH_FREE_EVEN_FIRST; - break; - case TX_STATE_ODD_FREE: - tx_state[endpoint] = TX_STATE_BOTH_FREE_ODD_FIRST; - break; - default: - tx_state[endpoint] = ((uint32_t)b & 8) ? - TX_STATE_ODD_FREE : TX_STATE_EVEN_FREE; - break; - } - } - } else { // receive - packet->len = b->desc >> 16; - if (packet->len > 0) { - packet->index = 0; - packet->next = NULL; - if (rx_first[endpoint] == NULL) { - //serial_print("rx 1st, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32((uint32_t)packet); - //serial_print("\n"); - rx_first[endpoint] = packet; - } else { - //serial_print("rx Nth, epidx="); - //serial_phex(endpoint); - //serial_print(", packet="); - //serial_phex32((uint32_t)packet); - //serial_print("\n"); - rx_last[endpoint]->next = packet; - } - rx_last[endpoint] = packet; - usb_rx_byte_count_data[endpoint] += packet->len; - // TODO: implement a per-endpoint maximum # of allocated packets - // so a flood of incoming data on 1 endpoint doesn't starve - // the others if the user isn't reading it regularly - packet = usb_malloc(); - if (packet) { - b->addr = packet->buf; - b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0); - } else { - //serial_print("starving "); - //serial_phex(endpoint + 1); - //serial_print(((uint32_t)b & 8) ? ",odd\n" : ",even\n"); - b->desc = 0; - usb_rx_memory_needed++; - } - } else { - b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0); - } - } - - - - - } - USB0_ISTAT = USB_ISTAT_TOKDNE; - goto restart; - } - - - - if (status & USB_ISTAT_USBRST /* 01 */ ) { - //serial_print("reset\n"); - - // initialize BDT toggle bits - USB0_CTL = USB_CTL_ODDRST; - ep0_tx_bdt_bank = 0; - - // set up buffers to receive Setup and OUT packets - table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); - table[index(0, RX, EVEN)].addr = ep0_rx0_buf; - table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0); - table[index(0, RX, ODD)].addr = ep0_rx1_buf; - table[index(0, TX, EVEN)].desc = 0; - table[index(0, TX, ODD)].desc = 0; - - // activate endpoint 0 - USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; - - // clear all ending interrupts - USB0_ERRSTAT = 0xFF; - USB0_ISTAT = 0xFF; - - // set the address to zero during enumeration - USB0_ADDR = 0; - - // enable other interrupts - USB0_ERREN = 0xFF; - USB0_INTEN = USB_INTEN_TOKDNEEN | - USB_INTEN_SOFTOKEN | - USB_INTEN_STALLEN | - USB_INTEN_ERROREN | - USB_INTEN_USBRSTEN | - USB_INTEN_SLEEPEN; - - // is this necessary? - USB0_CTL = USB_CTL_USBENSOFEN; - return; - } - - - if ((status & USB_ISTAT_STALL /* 80 */ )) { - //serial_print("stall:\n"); - USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; - USB0_ISTAT = USB_ISTAT_STALL; - } - if ((status & USB_ISTAT_ERROR /* 02 */ )) { - uint8_t err = USB0_ERRSTAT; - USB0_ERRSTAT = err; - //serial_print("err:"); - //serial_phex(err); - //serial_print("\n"); - USB0_ISTAT = USB_ISTAT_ERROR; - } - - if ((status & USB_ISTAT_SLEEP /* 10 */ )) { - //serial_print("sleep\n"); - USB0_ISTAT = USB_ISTAT_SLEEP; - } - -} - - - -void usb_init(void) -{ - int i; - - //serial_begin(BAUD2DIV(115200)); - //serial_print("usb_init\n"); - - usb_init_serialnumber(); - - for (i=0; i <= NUM_ENDPOINTS*4; i++) { - table[i].desc = 0; - table[i].addr = 0; - } - - // this basically follows the flowchart in the Kinetis - // Quick Reference User Guide, Rev. 1, 03/2012, page 141 - - // assume 48 MHz clock already running - // SIM - enable clock - SIM_SCGC4 |= SIM_SCGC4_USBOTG; - - // reset USB module - USB0_USBTRC0 = USB_USBTRC_USBRESET; - while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end - - // set desc table base addr - USB0_BDTPAGE1 = ((uint32_t)table) >> 8; - USB0_BDTPAGE2 = ((uint32_t)table) >> 16; - USB0_BDTPAGE3 = ((uint32_t)table) >> 24; - - // clear all ISR flags - USB0_ISTAT = 0xFF; - USB0_ERRSTAT = 0xFF; - USB0_OTGISTAT = 0xFF; - - USB0_USBTRC0 |= 0x40; // undocumented bit - - // enable USB - USB0_CTL = USB_CTL_USBENSOFEN; - USB0_USBCTRL = 0; - - // enable reset interrupt - USB0_INTEN = USB_INTEN_USBRSTEN; - - // enable interrupt in NVIC... - NVIC_SET_PRIORITY(IRQ_USBOTG, 112); - NVIC_ENABLE_IRQ(IRQ_USBOTG); - - // enable d+ pullup - USB0_CONTROL = USB_CONTROL_DPPULLUPNONOTG; -} - - -#else // F_CPU < 20 MHz - -void usb_init(void) -{ -} - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_dev.h b/ports/teensy/core/usb_dev.h deleted file mode 100644 index 211cebec02e40..0000000000000 --- a/ports/teensy/core/usb_dev.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_dev_h_ -#define _usb_dev_h_ - -#if F_CPU >= 20000000 - -// This header is NOT meant to be included when compiling -// user sketches in Arduino. The low-level functions -// provided by usb_dev.c are meant to be called only by -// code which provides higher-level interfaces to the user. - -#include "usb_mem.h" -#include "usb_desc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -void usb_init(void); -void usb_init_serialnumber(void); -void usb_isr(void); -usb_packet_t *usb_rx(uint32_t endpoint); -uint32_t usb_tx_byte_count(uint32_t endpoint); -uint32_t usb_tx_packet_count(uint32_t endpoint); -void usb_tx(uint32_t endpoint, usb_packet_t *packet); -void usb_tx_isr(uint32_t endpoint, usb_packet_t *packet); - -extern volatile uint8_t usb_configuration; - -extern uint16_t usb_rx_byte_count_data[NUM_ENDPOINTS]; -static inline uint32_t usb_rx_byte_count(uint32_t endpoint) __attribute__((always_inline)); -static inline uint32_t usb_rx_byte_count(uint32_t endpoint) -{ - endpoint--; - if (endpoint >= NUM_ENDPOINTS) return 0; - return usb_rx_byte_count_data[endpoint]; -} - -#ifdef CDC_DATA_INTERFACE -extern uint32_t usb_cdc_line_coding[2]; -extern volatile uint8_t usb_cdc_line_rtsdtr; -extern volatile uint8_t usb_cdc_transmit_flush_timer; -extern void usb_serial_flush_callback(void); -#endif - -#ifdef SEREMU_INTERFACE -extern volatile uint8_t usb_seremu_transmit_flush_timer; -extern void usb_seremu_flush_callback(void); -#endif - -#ifdef KEYBOARD_INTERFACE -extern uint8_t keyboard_modifier_keys; -extern uint8_t keyboard_keys[6]; -extern uint8_t keyboard_protocol; -extern uint8_t keyboard_idle_config; -extern uint8_t keyboard_idle_count; -extern volatile uint8_t keyboard_leds; -#endif - -#ifdef MIDI_INTERFACE -extern void usb_midi_flush_output(void); -#endif - -#ifdef FLIGHTSIM_INTERFACE -extern void usb_flightsim_flush_callback(void); -#endif - - - - - -#ifdef __cplusplus -} -#endif - - -#endif // F_CPU >= 20 MHz - -#endif diff --git a/ports/teensy/core/usb_mem.c b/ports/teensy/core/usb_mem.c deleted file mode 100644 index 2424327d3c6de..0000000000000 --- a/ports/teensy/core/usb_mem.c +++ /dev/null @@ -1,109 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if F_CPU >= 20000000 - -#include "mk20dx128.h" -//#include "HardwareSerial.h" -#include "usb_dev.h" -#include "usb_mem.h" - -__attribute__ ((section(".usbbuffers"), used)) -unsigned char usb_buffer_memory[NUM_USB_BUFFERS * sizeof(usb_packet_t)]; - -static uint32_t usb_buffer_available = 0xFFFFFFFF; - -// use bitmask and CLZ instruction to implement fast free list -// http://www.archivum.info/gnu.gcc.help/2006-08/00148/Re-GCC-Inline-Assembly.html -// http://gcc.gnu.org/ml/gcc/2012-06/msg00015.html -// __builtin_clz() - -usb_packet_t * usb_malloc(void) -{ - unsigned int n, avail; - uint8_t *p; - - __disable_irq(); - avail = usb_buffer_available; - n = __builtin_clz(avail); // clz = count leading zeros - if (n >= NUM_USB_BUFFERS) { - __enable_irq(); - return NULL; - } - //serial_print("malloc:"); - //serial_phex(n); - //serial_print("\n"); - - usb_buffer_available = avail & ~(0x80000000 >> n); - __enable_irq(); - p = usb_buffer_memory + (n * sizeof(usb_packet_t)); - //serial_print("malloc:"); - //serial_phex32((int)p); - //serial_print("\n"); - *(uint32_t *)p = 0; - *(uint32_t *)(p + 4) = 0; - return (usb_packet_t *)p; -} - -// for the receive endpoints to request memory -extern uint8_t usb_rx_memory_needed; -extern void usb_rx_memory(usb_packet_t *packet); - -void usb_free(usb_packet_t *p) -{ - unsigned int n, mask; - - //serial_print("free:"); - n = ((uint8_t *)p - usb_buffer_memory) / sizeof(usb_packet_t); - if (n >= NUM_USB_BUFFERS) return; - //serial_phex(n); - //serial_print("\n"); - - // if any endpoints are starving for memory to receive - // packets, give this memory to them immediately! - if (usb_rx_memory_needed && usb_configuration) { - //serial_print("give to rx:"); - //serial_phex32((int)p); - //serial_print("\n"); - usb_rx_memory(p); - return; - } - - mask = (0x80000000 >> n); - __disable_irq(); - usb_buffer_available |= mask; - __enable_irq(); - - //serial_print("free:"); - //serial_phex32((int)p); - //serial_print("\n"); -} - -#endif // F_CPU >= 20 MHz diff --git a/ports/teensy/core/usb_mem.h b/ports/teensy/core/usb_mem.h deleted file mode 100644 index 94d1eb4d2ea03..0000000000000 --- a/ports/teensy/core/usb_mem.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_mem_h_ -#define _usb_mem_h_ - -#include - -typedef struct usb_packet_struct { - uint16_t len; - uint16_t index; - struct usb_packet_struct *next; - uint8_t buf[64]; -} usb_packet_t; - -#ifdef __cplusplus -extern "C" { -#endif - -usb_packet_t * usb_malloc(void); -void usb_free(usb_packet_t *p); - -#ifdef __cplusplus -} -#endif - - -#endif diff --git a/ports/teensy/core/usb_names.h b/ports/teensy/core/usb_names.h deleted file mode 100644 index 067cb95e9bf04..0000000000000 --- a/ports/teensy/core/usb_names.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _usb_names_h_ -#define _usb_names_h_ - -// These definitions are intended to allow users to override the default -// USB manufacturer, product and serial number strings. - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -struct usb_string_descriptor_struct { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wString[]; -}; - -extern struct usb_string_descriptor_struct usb_string_manufacturer_name; -extern struct usb_string_descriptor_struct usb_string_product_name; -extern struct usb_string_descriptor_struct usb_string_serial_number; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/ports/teensy/core/usb_serial.c b/ports/teensy/core/usb_serial.c deleted file mode 100644 index 3b38ec8b62144..0000000000000 --- a/ports/teensy/core/usb_serial.c +++ /dev/null @@ -1,273 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include "usb_dev.h" -#include "usb_serial.h" -#include "core_pins.h" // for yield() -//#include "HardwareSerial.h" -#include // for memcpy() - -// defined by usb_dev.h -> usb_desc.h -#if defined(CDC_STATUS_INTERFACE) && defined(CDC_DATA_INTERFACE) - -uint32_t usb_cdc_line_coding[2]; -volatile uint8_t usb_cdc_line_rtsdtr=0; -volatile uint8_t usb_cdc_transmit_flush_timer=0; - -static usb_packet_t *rx_packet=NULL; -static usb_packet_t *tx_packet=NULL; -static volatile uint8_t tx_noautoflush=0; - -#define TRANSMIT_FLUSH_TIMEOUT 5 /* in milliseconds */ - -// get the next character, or -1 if nothing received -int usb_serial_getchar(void) -{ - unsigned int i; - int c; - - if (!rx_packet) { - if (!usb_configuration) return -1; - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) return -1; - } - i = rx_packet->index; - c = rx_packet->buf[i++]; - if (i >= rx_packet->len) { - usb_free(rx_packet); - rx_packet = NULL; - } else { - rx_packet->index = i; - } - return c; -} - -// peek at the next character, or -1 if nothing received -int usb_serial_peekchar(void) -{ - if (!rx_packet) { - if (!usb_configuration) return -1; - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) return -1; - } - if (!rx_packet) return -1; - return rx_packet->buf[rx_packet->index]; -} - -// number of bytes available in the receive buffer -int usb_serial_available(void) -{ - int count; - count = usb_rx_byte_count(CDC_RX_ENDPOINT); - if (rx_packet) count += rx_packet->len - rx_packet->index; - return count; -} - -// read a block of bytes to a buffer -int usb_serial_read(void *buffer, uint32_t size) -{ - uint8_t *p = (uint8_t *)buffer; - uint32_t qty, count=0; - - while (size) { - if (!usb_configuration) break; - if (!rx_packet) { - rx: - rx_packet = usb_rx(CDC_RX_ENDPOINT); - if (!rx_packet) break; - if (rx_packet->len == 0) { - usb_free(rx_packet); - goto rx; - } - } - qty = rx_packet->len - rx_packet->index; - if (qty > size) qty = size; - memcpy(p, rx_packet->buf + rx_packet->index, qty); - p += qty; - count += qty; - size -= qty; - rx_packet->index += qty; - if (rx_packet->index >= rx_packet->len) { - usb_free(rx_packet); - rx_packet = NULL; - } - } - return count; -} - -// discard any buffered input -void usb_serial_flush_input(void) -{ - usb_packet_t *rx; - - if (!usb_configuration) return; - if (rx_packet) { - usb_free(rx_packet); - rx_packet = NULL; - } - while (1) { - rx = usb_rx(CDC_RX_ENDPOINT); - if (!rx) break; - usb_free(rx); - } -} - -// Maximum number of transmit packets to queue so we don't starve other endpoints for memory -#define TX_PACKET_LIMIT 8 - -// When the PC isn't listening, how long do we wait before discarding data? If this is -// too short, we risk losing data during the stalls that are common with ordinary desktop -// software. If it's too long, we stall the user's program when no software is running. -#define TX_TIMEOUT_MSEC 70 - -#if F_CPU == 168000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 1100) -#elif F_CPU == 144000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 932) -#elif F_CPU == 120000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 764) -#elif F_CPU == 96000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 596) -#elif F_CPU == 72000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 512) -#elif F_CPU == 48000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 428) -#elif F_CPU == 24000000 - #define TX_TIMEOUT (TX_TIMEOUT_MSEC * 262) -#endif - -// When we've suffered the transmit timeout, don't wait again until the computer -// begins accepting data. If no software is running to receive, we'll just discard -// data as rapidly as Serial.print() can generate it, until there's something to -// actually receive it. -static uint8_t transmit_previous_timeout=0; - - -// transmit a character. 0 returned on success, -1 on error -int usb_serial_putchar(uint8_t c) -{ - return usb_serial_write(&c, 1); -} - - -int usb_serial_write(const void *buffer, uint32_t size) -{ - uint32_t len; - uint32_t wait_count; - const uint8_t *src = (const uint8_t *)buffer; - uint8_t *dest; - - tx_noautoflush = 1; - while (size > 0) { - if (!tx_packet) { - wait_count = 0; - while (1) { - if (!usb_configuration) { - tx_noautoflush = 0; - return -1; - } - if (usb_tx_packet_count(CDC_TX_ENDPOINT) < TX_PACKET_LIMIT) { - tx_noautoflush = 1; - tx_packet = usb_malloc(); - if (tx_packet) break; - tx_noautoflush = 0; - } - if (++wait_count > TX_TIMEOUT || transmit_previous_timeout) { - transmit_previous_timeout = 1; - return -1; - } - yield(); - } - } - transmit_previous_timeout = 0; - len = CDC_TX_SIZE - tx_packet->index; - if (len > size) len = size; - dest = tx_packet->buf + tx_packet->index; - tx_packet->index += len; - size -= len; - while (len-- > 0) *dest++ = *src++; - if (tx_packet->index >= CDC_TX_SIZE) { - tx_packet->len = CDC_TX_SIZE; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } - usb_cdc_transmit_flush_timer = TRANSMIT_FLUSH_TIMEOUT; - } - tx_noautoflush = 0; - return 0; -} - -void usb_serial_flush_output(void) -{ - if (!usb_configuration) return; - tx_noautoflush = 1; - if (tx_packet) { - usb_cdc_transmit_flush_timer = 0; - tx_packet->len = tx_packet->index; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } else { - usb_packet_t *tx = usb_malloc(); - if (tx) { - usb_cdc_transmit_flush_timer = 0; - usb_tx(CDC_TX_ENDPOINT, tx); - } else { - usb_cdc_transmit_flush_timer = 1; - } - } - tx_noautoflush = 0; -} - -void usb_serial_flush_callback(void) -{ - if (tx_noautoflush) return; - if (tx_packet) { - tx_packet->len = tx_packet->index; - usb_tx(CDC_TX_ENDPOINT, tx_packet); - tx_packet = NULL; - } else { - usb_packet_t *tx = usb_malloc(); - if (tx) { - usb_tx(CDC_TX_ENDPOINT, tx); - } else { - usb_cdc_transmit_flush_timer = 1; - } - } -} - - - - - - - - - -#endif // CDC_STATUS_INTERFACE && CDC_DATA_INTERFACE diff --git a/ports/teensy/core/usb_serial.h b/ports/teensy/core/usb_serial.h deleted file mode 100644 index 9c0429d1982e8..0000000000000 --- a/ports/teensy/core/usb_serial.h +++ /dev/null @@ -1,144 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef USBserial_h_ -#define USBserial_h_ - -#if defined(USB_SERIAL) || defined(USB_SERIAL_HID) - -#include - -#if F_CPU >= 20000000 - -// C language implementation -#ifdef __cplusplus -extern "C" { -#endif -int usb_serial_getchar(void); -int usb_serial_peekchar(void); -int usb_serial_available(void); -int usb_serial_read(void *buffer, uint32_t size); -void usb_serial_flush_input(void); -int usb_serial_putchar(uint8_t c); -int usb_serial_write(const void *buffer, uint32_t size); -void usb_serial_flush_output(void); -extern uint32_t usb_cdc_line_coding[2]; -extern volatile uint8_t usb_cdc_line_rtsdtr; -extern volatile uint8_t usb_cdc_transmit_flush_timer; -extern volatile uint8_t usb_configuration; -#ifdef __cplusplus -} -#endif - -#define USB_SERIAL_DTR 0x01 -#define USB_SERIAL_RTS 0x02 - -// C++ interface -#ifdef __cplusplus -#include "Stream.h" -class usb_serial_class : public Stream -{ -public: - void begin(long) { /* TODO: call a function that tries to wait for enumeration */ }; - void end() { /* TODO: flush output and shut down USB port */ }; - virtual int available() { return usb_serial_available(); } - virtual int read() { return usb_serial_getchar(); } - virtual int peek() { return usb_serial_peekchar(); } - virtual void flush() { usb_serial_flush_output(); } // TODO: actually wait for data to leave USB... - virtual size_t write(uint8_t c) { return usb_serial_putchar(c); } - virtual size_t write(const uint8_t *buffer, size_t size) { return usb_serial_write(buffer, size); } - size_t write(unsigned long n) { return write((uint8_t)n); } - size_t write(long n) { return write((uint8_t)n); } - size_t write(unsigned int n) { return write((uint8_t)n); } - size_t write(int n) { return write((uint8_t)n); } - using Print::write; - void send_now(void) { usb_serial_flush_output(); } - uint32_t baud(void) { return usb_cdc_line_coding[0]; } - uint8_t stopbits(void) { uint8_t b = usb_cdc_line_coding[1]; if (!b) b = 1; return b; } - uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even - uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; } - uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; } - uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; } - operator bool() { return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)); } - size_t readBytes(char *buffer, size_t length) { - size_t count=0; - unsigned long startMillis = millis(); - do { - count += usb_serial_read(buffer + count, length - count); - if (count >= length) return count; - } while(millis() - startMillis < _timeout); - setReadError(); - return count; - } - -}; -extern usb_serial_class Serial; -#endif // __cplusplus - - -#else // F_CPU < 20 MHz - -// Allow Arduino programs using Serial to compile, but Serial will do nothing. -#ifdef __cplusplus -#include "Stream.h" -class usb_serial_class : public Stream -{ -public: - void begin(long) { }; - void end() { }; - virtual int available() { return 0; } - virtual int read() { return -1; } - virtual int peek() { return -1; } - virtual void flush() { } - virtual size_t write(uint8_t c) { return 1; } - virtual size_t write(const uint8_t *buffer, size_t size) { return size; } - size_t write(unsigned long n) { return 1; } - size_t write(long n) { return 1; } - size_t write(unsigned int n) { return 1; } - size_t write(int n) { return 1; } - using Print::write; - void send_now(void) { } - uint32_t baud(void) { return 0; } - uint8_t stopbits(void) { return 1; } - uint8_t paritytype(void) { return 0; } - uint8_t numbits(void) { return 8; } - uint8_t dtr(void) { return 1; } - uint8_t rts(void) { return 1; } - operator bool() { return true; } -}; - -extern usb_serial_class Serial; -#endif // __cplusplus - -#endif // F_CPU - -#endif // USB_SERIAL || USB_SERIAL_HID - -#endif // USBserial_h_ diff --git a/ports/teensy/core/yield.c b/ports/teensy/core/yield.c deleted file mode 100644 index 06c741a673080..0000000000000 --- a/ports/teensy/core/yield.c +++ /dev/null @@ -1,32 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -void yield(void) __attribute__ ((weak)); -void yield(void) {}; diff --git a/ports/teensy/hal_ftm.c b/ports/teensy/hal_ftm.c deleted file mode 100644 index 3c031bf6dd875..0000000000000 --- a/ports/teensy/hal_ftm.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include "teensy_hal.h" - -void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm) { - /* Check the parameters */ - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_PRESCALERSHIFT(hftm->Init.PrescalerShift)); - assert_param(IS_FTM_COUNTERMODE(hftm->Init.CounterMode)); - assert_param(IS_FTM_PERIOD(hftm->Init.Period)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->MODE = FTM_MODE_WPDIS; - FTMx->SC = 0; - FTMx->MOD = hftm->Init.Period; - uint32_t sc = FTM_SC_PS(hftm->Init.PrescalerShift); - if (hftm->Init.CounterMode == FTM_COUNTERMODE_CENTER) { - sc |= FTM_SC_CPWMS; - } - FTMx->SC = sc; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->CNT = 0; - FTMx->SC &= ~FTM_SC_CLKS(3); - FTMx->SC |= FTM_SC_CLKS(1); - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->CNT = 0; - FTMx->SC |= FTM_SC_CLKS(1) | FTM_SC_TOIE; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm) { - assert_param(IS_FTM_INSTANCE(hftm->Instance)); - - hftm->State = HAL_FTM_STATE_BUSY; - - __HAL_FTM_DISABLE_TOF_IT(hftm); - - hftm->State = HAL_FTM_STATE_RESET; -} - -void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_OC_MODE(sConfig->OCMode)); - assert_param(IS_FTM_OC_PULSE(sConfig->Pulse)); - assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->OCMode; - FTMx->channel[channel].CV = sConfig->Pulse; - if (sConfig->OCPolarity & 1) { - FTMx->POL |= (1 << channel); - } else { - FTMx->POL &= ~(1 << channel); - } - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - // Nothing else to do -} - -void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} - -void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_FTM_OC_PULSE(sConfig->Pulse)); - assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->OCMode; - FTMx->channel[channel].CV = sConfig->Pulse; - if (sConfig->OCPolarity & 1) { - FTMx->POL |= (1 << channel); - } else { - FTMx->POL &= ~(1 << channel); - } - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - // Nothing else to do -} - -void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} - -void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_Init(hftm); -} - -void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - assert_param(IS_FTM_CHANNEL(channel)); - assert_param(IS_FTM_IC_POLARITY(sConfig->ICPolarity)); - - hftm->State = HAL_FTM_STATE_BUSY; - - FTMx->channel[channel].CSC = sConfig->ICPolarity; - - hftm->State = HAL_FTM_STATE_READY; -} - -void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) { - //FTM_TypeDef *FTMx = hftm->Instance; - //assert_param(IS_FTM_INSTANCE(FTMx)); - - // Nothing else to do -} - -void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) { - FTM_TypeDef *FTMx = hftm->Instance; - assert_param(IS_FTM_INSTANCE(FTMx)); - - FTMx->channel[channel].CSC |= FTM_CSC_CHIE; -} - -void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm) { - HAL_FTM_Base_DeInit(hftm); -} diff --git a/ports/teensy/hal_ftm.h b/ports/teensy/hal_ftm.h deleted file mode 100644 index 84fae8312b9d9..0000000000000 --- a/ports/teensy/hal_ftm.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_TEENSY_HAL_FTM_H -#define MICROPY_INCLUDED_TEENSY_HAL_FTM_H - -#define FTM0 ((FTM_TypeDef *)&FTM0_SC) -#define FTM1 ((FTM_TypeDef *)&FTM1_SC) -#define FTM2 ((FTM_TypeDef *)&FTM2_SC) - -typedef struct { - volatile uint32_t CSC; // Channel x Status And Control - volatile uint32_t CV; // Channel x Value -} FTM_ChannelTypeDef; - -typedef struct { - volatile uint32_t SC; // Status And Control - volatile uint32_t CNT; // Counter - volatile uint32_t MOD; // Modulo - FTM_ChannelTypeDef channel[8]; - volatile uint32_t CNTIN; // Counter Initial Value - volatile uint32_t STATUS; // Capture And Compare Status - volatile uint32_t MODE; // Features Mode Selection - volatile uint32_t SYNC; // Synchronization - volatile uint32_t OUTINIT; // Initial State For Channels Output - volatile uint32_t OUTMASK; // Output Mask - volatile uint32_t COMBINE; // Function For Linked Channels - volatile uint32_t DEADTIME; // Deadtime Insertion Control - volatile uint32_t EXTTRIG; // FTM External Trigger - volatile uint32_t POL; // Channels Polarity - volatile uint32_t FMS; // Fault Mode Status - volatile uint32_t FILTER; // Input Capture Filter Control - volatile uint32_t FLTCTRL; // Fault Control - volatile uint32_t QDCTRL; // Quadrature Decoder Control And Status - volatile uint32_t CONF; // Configuration - volatile uint32_t FLTPOL; // FTM Fault Input Polarity - volatile uint32_t SYNCONF; // Synchronization Configuration - volatile uint32_t INVCTRL; // FTM Inverting Control - volatile uint32_t SWOCTRL; // FTM Software Output Control - volatile uint32_t PWMLOAD; // FTM PWM Load -} FTM_TypeDef; - -typedef struct { - uint32_t PrescalerShift; // Sets the prescaler to 1 << PrescalerShift - uint32_t CounterMode; // One of FTM_COUNTERMODE_xxx - uint32_t Period; // Specifies the Period for determining timer overflow -} FTM_Base_InitTypeDef; - -typedef struct { - uint32_t OCMode; // One of FTM_OCMODE_xxx - uint32_t Pulse; // Specifies initial pulse width (0-0xffff) - uint32_t OCPolarity; // One of FTM_OCPOLRITY_xxx -} FTM_OC_InitTypeDef; - -typedef struct { - uint32_t ICPolarity; // Specifies Rising/Falling/Both -} FTM_IC_InitTypeDef; - -#define IS_FTM_INSTANCE(INSTANCE) (((INSTANCE) == FTM0) || \ - ((INSTANCE) == FTM1) || \ - ((INSTANCE) == FTM2)) - -#define IS_FTM_PRESCALERSHIFT(PRESCALERSHIFT) (((PRESCALERSHIFT) & ~7) == 0) - -#define FTM_COUNTERMODE_UP (0) -#define FTM_COUNTERMODE_CENTER (FTM_SC_CPWMS) - -#define IS_FTM_COUNTERMODE(MODE) (((MODE) == FTM_COUNTERMODE_UP) ||\ - ((MODE) == FTM_COUNTERMODE_CENTER)) - -#define IS_FTM_PERIOD(PERIOD) (((PERIOD) & 0xFFFF0000) == 0) - -#define FTM_CSC_CHF 0x80 -#define FTM_CSC_CHIE 0x40 -#define FTM_CSC_MSB 0x20 -#define FTM_CSC_MSA 0x10 -#define FTM_CSC_ELSB 0x08 -#define FTM_CSC_ELSA 0x04 -#define FTM_CSC_DMA 0x01 - -#define FTM_OCMODE_TIMING (0) -#define FTM_OCMODE_ACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB | FTM_CSC_ELSA) -#define FTM_OCMODE_INACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB) -#define FTM_OCMODE_TOGGLE (FTM_CSC_MSA | FTM_CSC_ELSA) -#define FTM_OCMODE_PWM1 (FTM_CSC_MSB | FTM_CSC_ELSB) -#define FTM_OCMODE_PWM2 (FTM_CSC_MSB | FTM_CSC_ELSA) - -#define IS_FTM_OC_MODE(mode) ((mode) == FTM_OCMODE_TIMING || \ - (mode) == FTM_OCMODE_ACTIVE || \ - (mode) == FTM_OCMODE_INACTIVE || \ - (mode) == FTM_OCMODE_TOGGLE ) - -#define IS_FTM_PWM_MODE(mode) ((mode) == FTM_OCMODE_PWM1 || \ - (mode) == FTM_OCMODE_PWM2) - -#define IS_FTM_CHANNEL(channel) (((channel) & ~7) == 0) - -#define IS_FTM_PULSE(pulse) (((pulse) & ~0xffff) == 0) - -#define FTM_OCPOLARITY_HIGH (0) -#define FTM_OCPOLARITY_LOW (1) - -#define IS_FTM_OC_POLARITY(polarity) ((polarity) == FTM_OCPOLARITY_HIGH || \ - (polarity) == FTM_OCPOLARITY_LOW) - -#define FTM_ICPOLARITY_RISING (FTM_CSC_ELSA) -#define FTM_ICPOLARITY_FALLING (FTM_CSC_ELSB) -#define FTM_ICPOLARITY_BOTH (FTM_CSC_ELSA | FTM_CSC_ELSB) - -#define IS_FTM_IC_POLARITY(polarity) ((polarity) == FTM_ICPOLARITY_RISING || \ - (polarity) == FTM_ICPOLARITY_FALLING || \ - (polarity) == FTM_ICPOLARITY_BOTH) - -typedef enum { - HAL_FTM_STATE_RESET = 0x00, - HAL_FTM_STATE_READY = 0x01, - HAL_FTM_STATE_BUSY = 0x02, -} HAL_FTM_State; - -typedef struct { - FTM_TypeDef *Instance; - FTM_Base_InitTypeDef Init; - HAL_FTM_State State; - -} FTM_HandleTypeDef; - -#define __HAL_FTM_GET_TOF_FLAG(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOF) != 0) -#define __HAL_FTM_CLEAR_TOF_FLAG(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOF) - -#define __HAL_FTM_GET_TOF_IT(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOIE) != 0) -#define __HAL_FTM_ENABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC |= FTM_SC_TOIE) -#define __HAL_FTM_DISABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOIE) - -#define __HAL_FTM_GET_CH_FLAG(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHF) != 0) -#define __HAL_FTM_CLEAR_CH_FLAG(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHF) - -#define __HAL_FTM_GET_CH_IT(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHIE) != 0) -#define __HAL_FTM_ENABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC |= FTM_CSC_CHIE) -#define __HAL_FTM_DISABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHIE) - -void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm); -void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm); - -void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm); -void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel); -void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel); -void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm); - -#endif // MICROPY_INCLUDED_TEENSY_HAL_FTM_H diff --git a/ports/teensy/hal_gpio.c b/ports/teensy/hal_gpio.c deleted file mode 100644 index e65d03410ec50..0000000000000 --- a/ports/teensy/hal_gpio.c +++ /dev/null @@ -1,123 +0,0 @@ -#include -#include -#include "teensy_hal.h" - -#define GPIO_NUMBER 32 - -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Configure the port pins */ - for (uint32_t position = 0; position < GPIO_NUMBER; position++) { - uint32_t bitmask = 1 << position; - if ((GPIO_Init->Pin & bitmask) == 0) { - continue; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(GPIOx, position); - - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) { - /* Check the Alternate function parameter */ - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - } - else if (GPIO_Init->Mode == GPIO_MODE_ANALOG) { - GPIO_Init->Alternate = 0; - } - else { - GPIO_Init->Alternate = 1; - } - - /* Configure Alternate function mapped with the current IO */ - *port_pcr &= ~PORT_PCR_MUX_MASK; - *port_pcr |= PORT_PCR_MUX(GPIO_Init->Alternate); - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - if (GPIO_Init->Mode == GPIO_MODE_INPUT || GPIO_Init->Mode == GPIO_MODE_ANALOG) { - GPIOx->PDDR &= ~bitmask; - } else { - GPIOx->PDDR |= bitmask; - } - - /* In case of Output or Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - - *port_pcr |= PORT_PCR_DSE; - - /* Configure the IO Speed */ - if (GPIO_Init->Speed > GPIO_SPEED_MEDIUM) { - *port_pcr &= ~PORT_PCR_SRE; - } else { - *port_pcr |= PORT_PCR_SRE; - } - - /* Configure the IO Output Type */ - if (GPIO_Init->Mode & GPIO_OUTPUT_TYPE) { - *port_pcr |= PORT_PCR_ODE; // OD - } else { - *port_pcr &= ~PORT_PCR_ODE; // PP - } - } else { - *port_pcr &= ~PORT_PCR_DSE; - } - - /* Activate the Pull-up or Pull down resistor for the current IO */ - if (GPIO_Init->Pull == GPIO_NOPULL) { - *port_pcr &= ~PORT_PCR_PE; - } else { - *port_pcr |= PORT_PCR_PE; - if (GPIO_Init->Pull == GPIO_PULLDOWN) { - *port_pcr &= ~PORT_PCR_PS; - } else { - *port_pcr |= PORT_PCR_PS; - } - } - -#if 0 - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - { - /* Enable SYSCFG Clock */ - __SYSCFG_CLK_ENABLE(); - - temp = ((uint32_t)0x0F) << (4 * (position & 0x03)); - SYSCFG->EXTICR[position >> 2] &= ~temp; - SYSCFG->EXTICR[position >> 2] |= ((uint32_t)(__HAL_GET_GPIO_SOURCE(GPIOx)) << (4 * (position & 0x03))); - - /* Clear EXTI line configuration */ - EXTI->IMR &= ~((uint32_t)iocurrent); - EXTI->EMR &= ~((uint32_t)iocurrent); - - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - { - EXTI->IMR |= iocurrent; - } - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - { - EXTI->EMR |= iocurrent; - } - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR &= ~((uint32_t)iocurrent); - EXTI->FTSR &= ~((uint32_t)iocurrent); - - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - { - EXTI->RTSR |= iocurrent; - } - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - { - EXTI->FTSR |= iocurrent; - } - } -#endif - } -} diff --git a/ports/teensy/help.c b/ports/teensy/help.c deleted file mode 100644 index a2370c04d2cd7..0000000000000 --- a/ports/teensy/help.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char teensy_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"For online help please visit http://micropython.org/help/.\n" -"\n" -"Quick overview of commands for the board:\n" -" pyb.info() -- print some general information\n" -" pyb.gc() -- run the garbage collector\n" -" pyb.delay(n) -- wait for n milliseconds\n" -" pyb.Switch() -- create a switch object\n" -" Switch methods: (), callback(f)\n" -" pyb.LED(n) -- create an LED object for LED n (n=1,2,3,4)\n" -" LED methods: on(), off(), toggle(), intensity()\n" -" pyb.Pin(pin) -- get a pin, eg pyb.Pin('X1')\n" -" pyb.Pin(pin, m, [p]) -- get a pin and configure it for IO mode m, pull mode p\n" -" Pin methods: init(..), value([v]), high(), low()\n" -" pyb.ExtInt(pin, m, p, callback) -- create an external interrupt object\n" -" pyb.ADC(pin) -- make an analog object from a pin\n" -" ADC methods: read(), read_timed(buf, freq)\n" -" pyb.DAC(port) -- make a DAC object\n" -" DAC methods: triangle(freq), write(n), write_timed(buf, freq)\n" -" pyb.RTC() -- make an RTC object; methods: datetime([val])\n" -" pyb.rng() -- get a 30-bit hardware random number\n" -" pyb.Servo(n) -- create Servo object for servo n (n=1,2,3,4)\n" -" Servo methods: calibration(..), angle([x, [t]]), speed([x, [t]])\n" -" pyb.Accel() -- create an Accelerometer object\n" -" Accelerometer methods: x(), y(), z(), tilt(), filtered_xyz()\n" -"\n" -"Pins are numbered X1-X12, X17-X22, Y1-Y12, or by their MCU name\n" -"Pin IO modes are: pyb.Pin.IN, pyb.Pin.OUT_PP, pyb.Pin.OUT_OD\n" -"Pin pull modes are: pyb.Pin.PULL_NONE, pyb.Pin.PULL_UP, pyb.Pin.PULL_DOWN\n" -"Additional serial bus objects: pyb.I2C(n), pyb.SPI(n), pyb.UART(n)\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/teensy/lcd.c b/ports/teensy/lcd.c deleted file mode 100644 index e5d6115d7513c..0000000000000 --- a/ports/teensy/lcd.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "py/obj.h" -#include "../stm32/lcd.h" - -void lcd_init(void) { -} - -void lcd_print_str(const char *str) { - (void)str; -} - -void lcd_print_strn(const char *str, unsigned int len) { - (void)str; - (void)len; -} diff --git a/ports/teensy/led.c b/ports/teensy/led.c deleted file mode 100644 index add052fad2123..0000000000000 --- a/ports/teensy/led.c +++ /dev/null @@ -1,143 +0,0 @@ -#include - -#include "Arduino.h" - -#include "py/runtime.h" -#include "py/mphal.h" -#include "led.h" -#include "pin.h" -#include "genhdr/pins.h" - -typedef struct _pyb_led_obj_t { - mp_obj_base_t base; - mp_uint_t led_id; - const pin_obj_t *led_pin; -} pyb_led_obj_t; - -STATIC const pyb_led_obj_t pyb_led_obj[] = { - {{&pyb_led_type}, 1, &MICROPY_HW_LED1}, -#if defined(MICROPY_HW_LED2) - {{&pyb_led_type}, 2, &MICROPY_HW_LED2}, -#if defined(MICROPY_HW_LED3) - {{&pyb_led_type}, 3, &MICROPY_HW_LED3}, -#if defined(MICROPY_HW_LED4) - {{&pyb_led_type}, 4, &MICROPY_HW_LED4}, -#endif -#endif -#endif -}; -#define NUM_LEDS MP_ARRAY_SIZE(pyb_led_obj) - -void led_init(void) { - /* GPIO structure */ - GPIO_InitTypeDef GPIO_InitStructure; - - /* Configure I/O speed, mode, output type and pull */ - GPIO_InitStructure.Speed = GPIO_SPEED_LOW; - GPIO_InitStructure.Mode = MICROPY_HW_LED_OTYPE; - GPIO_InitStructure.Pull = GPIO_NOPULL; - - /* Turn off LEDs and initialize */ - for (int led = 0; led < NUM_LEDS; led++) { - const pin_obj_t *led_pin = pyb_led_obj[led].led_pin; - MICROPY_HW_LED_OFF(led_pin); - GPIO_InitStructure.Pin = led_pin->pin_mask; - HAL_GPIO_Init(led_pin->gpio, &GPIO_InitStructure); - } -} - -void led_state(pyb_led_t led, int state) { - if (led < 1 || led > NUM_LEDS) { - return; - } - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - //printf("led_state(%d,%d)\n", led, state); - if (state == 0) { - // turn LED off - MICROPY_HW_LED_OFF(led_pin); - } else { - // turn LED on - MICROPY_HW_LED_ON(led_pin); - } -} - -void led_toggle(pyb_led_t led) { - if (led < 1 || led > NUM_LEDS) { - return; - } - const pin_obj_t *led_pin = pyb_led_obj[led - 1].led_pin; - GPIO_TypeDef *gpio = led_pin->gpio; - - // We don't know if we're turning the LED on or off, but we don't really - // care. Just invert the state. - if (gpio->PDOR & led_pin->pin_mask) { - // pin is high, make it low - gpio->PCOR = led_pin->pin_mask; - } else { - // pin is low, make it high - gpio->PSOR = led_pin->pin_mask; - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -void led_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_led_obj_t *self = self_in; - (void)kind; - mp_printf(print, "", self->led_id); -} - -STATIC mp_obj_t led_obj_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); - - // get led number - mp_int_t led_id = mp_obj_get_int(args[0]); - - // check led number - if (!(1 <= led_id && led_id <= NUM_LEDS)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "LED %d does not exist", led_id)); - } - - // return static led object - return (mp_obj_t)&pyb_led_obj[led_id - 1]; -} - -mp_obj_t led_obj_on(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 1); - return mp_const_none; -} - -mp_obj_t led_obj_off(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_state(self->led_id, 0); - return mp_const_none; -} - -mp_obj_t led_obj_toggle(mp_obj_t self_in) { - pyb_led_obj_t *self = self_in; - led_toggle(self->led_id); - return mp_const_none; -} - -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_on_obj, led_obj_on); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_off_obj, led_obj_off); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(led_obj_toggle_obj, led_obj_toggle); - -STATIC const mp_rom_map_elem_t led_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&led_obj_on_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&led_obj_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&led_obj_toggle_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(led_locals_dict, led_locals_dict_table); - -const mp_obj_type_t pyb_led_type = { - { &mp_type_type }, - .name = MP_QSTR_LED, - .print = led_obj_print, - .make_new = led_obj_make_new, - .locals_dict = (mp_obj_t)&led_locals_dict, -}; diff --git a/ports/teensy/led.h b/ports/teensy/led.h deleted file mode 100644 index 5c45166ef25d4..0000000000000 --- a/ports/teensy/led.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_LED_H -#define MICROPY_INCLUDED_TEENSY_LED_H - -typedef enum { - PYB_LED_BUILTIN = 1, -} pyb_led_t; - -void led_init(void); -void led_state(pyb_led_t led, int state); -void led_toggle(pyb_led_t led); - -extern const mp_obj_type_t pyb_led_type; - -#endif // MICROPY_INCLUDED_TEENSY_LED_H diff --git a/ports/teensy/lexerfrozen.c b/ports/teensy/lexerfrozen.c deleted file mode 100644 index 21e978dc796f0..0000000000000 --- a/ports/teensy/lexerfrozen.c +++ /dev/null @@ -1,13 +0,0 @@ -#include - -#include "py/lexer.h" -#include "py/runtime.h" -#include "py/mperrno.h" - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(MP_ENOENT); -} diff --git a/ports/teensy/lexermemzip.h b/ports/teensy/lexermemzip.h deleted file mode 100644 index cd7326a435286..0000000000000 --- a/ports/teensy/lexermemzip.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H -#define MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H - -mp_lexer_t *mp_lexer_new_from_memzip_file(const char *filename); - -#endif // MICROPY_INCLUDED_TEENSY_LEXERMEMZIP_H diff --git a/ports/teensy/main.c b/ports/teensy/main.c deleted file mode 100644 index 3edaa28a06eca..0000000000000 --- a/ports/teensy/main.c +++ /dev/null @@ -1,381 +0,0 @@ -#include -#include -#include -#include - -#include "py/lexer.h" -#include "py/runtime.h" -#include "py/stackctrl.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "gccollect.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" -#include "lexermemzip.h" - -#include "Arduino.h" - -#include "servo.h" -#include "led.h" -#include "uart.h" -#include "pin.h" - -extern uint32_t _heap_start; - -void flash_error(int n) { - for (int i = 0; i < n; i++) { - led_state(PYB_LED_BUILTIN, 1); - delay(250); - led_state(PYB_LED_BUILTIN, 0); - delay(250); - } -} - -void NORETURN __fatal_error(const char *msg) { - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - led_state(1, 1); - led_state(2, 1); - led_state(3, 1); - led_state(4, 1); - mp_hal_stdout_tx_strn("\nFATAL ERROR:\n", 14); - mp_hal_stdout_tx_strn(msg, strlen(msg)); - for (uint i = 0;;) { - led_toggle(((i++) & 3) + 1); - for (volatile uint delay = 0; delay < 10000000; delay++) { - } - if (i >= 16) { - // to conserve power - __WFI(); - } - } -} - -void nlr_jump_fail(void *val) { - printf("FATAL: uncaught exception %p\n", val); - __fatal_error(""); -} - -void __assert_func(const char *file, int line, const char *func, const char *expr) { - - printf("Assertion failed: %s, file %s, line %d\n", expr, file, line); - __fatal_error(""); -} - -mp_obj_t pyb_analog_read(mp_obj_t pin_obj) { - uint pin = mp_obj_get_int(pin_obj); - int val = analogRead(pin); - return MP_OBJ_NEW_SMALL_INT(val); -} - -mp_obj_t pyb_analog_write(mp_obj_t pin_obj, mp_obj_t val_obj) { - uint pin = mp_obj_get_int(pin_obj); - int val = mp_obj_get_int(val_obj); - analogWrite(pin, val); - return mp_const_none; -} - -mp_obj_t pyb_analog_write_resolution(mp_obj_t res_obj) { - int res = mp_obj_get_int(res_obj); - analogWriteResolution(res); - return mp_const_none; -} - -mp_obj_t pyb_analog_write_frequency(mp_obj_t pin_obj, mp_obj_t freq_obj) { - uint pin = mp_obj_get_int(pin_obj); - int freq = mp_obj_get_int(freq_obj); - analogWriteFrequency(pin, freq); - return mp_const_none; -} - -#if 0 -// get lots of info about the board -static mp_obj_t pyb_info(void) { - // get and print unique id; 96 bits - { - byte *id = (byte*)0x40048058; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM); - - // to print info about memory - { - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_etext=%p\n", &_etext); - printf("_heap_start=%p\n", &_heap_start); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" %u total\n", info.total); - printf(" %u used %u free\n", info.used, info.free); - printf(" 1=%u 2=%u m=%u\n", info.num_1block, info.num_2block, info.max_block); - } - -#if 0 - // free space on flash - { - DWORD nclst; - FATFS *fatfs; - f_getfree("0:", &nclst, &fatfs); - printf("LFS free: %u bytes\n", (uint)(nclst * fatfs->csize * 512)); - } -#endif - - return mp_const_none; -} - -#endif - -#define RAM_START (0x1FFF8000) // fixed for chip -#define HEAP_END (0x20006000) // tunable -#define RAM_END (0x20008000) // fixed for chip - -#if 0 - -void gc_helper_get_regs_and_clean_stack(mp_uint_t *regs, mp_uint_t heap_end); - -mp_obj_t pyb_gc(void) { - gc_collect(); - return mp_const_none; -} - -mp_obj_t pyb_gpio(int n_args, mp_obj_t *args) { - //assert(1 <= n_args && n_args <= 2); - - uint pin = mp_obj_get_int(args[0]); - if (pin > CORE_NUM_DIGITAL) { - goto pin_error; - } - - if (n_args == 1) { - // get pin - pinMode(pin, INPUT); - return MP_OBJ_NEW_SMALL_INT(digitalRead(pin)); - } - - // set pin - pinMode(pin, OUTPUT); - digitalWrite(pin, mp_obj_is_true(args[1])); - return mp_const_none; - -pin_error: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %d does not exist", pin)); -} - -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_gpio_obj, 1, 2, pyb_gpio); - -#if 0 -mp_obj_t pyb_hid_send_report(mp_obj_t arg) { - mp_obj_t *items = mp_obj_get_array_fixed_n(arg, 4); - uint8_t data[4]; - data[0] = mp_obj_get_int(items[0]); - data[1] = mp_obj_get_int(items[1]); - data[2] = mp_obj_get_int(items[2]); - data[3] = mp_obj_get_int(items[3]); - usb_hid_send_report(data); - return mp_const_none; -} -#endif - -#endif // 0 - -STATIC mp_obj_t pyb_config_source_dir = MP_OBJ_NULL; -STATIC mp_obj_t pyb_config_main = MP_OBJ_NULL; -STATIC mp_obj_t pyb_config_usb_mode = MP_OBJ_NULL; - -mp_obj_t pyb_source_dir(mp_obj_t source_dir) { - if (MP_OBJ_IS_STR(source_dir)) { - pyb_config_source_dir = source_dir; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_source_dir_obj, pyb_source_dir); - -mp_obj_t pyb_main(mp_obj_t main) { - if (MP_OBJ_IS_STR(main)) { - pyb_config_main = main; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_main_obj, pyb_main); - -STATIC mp_obj_t pyb_usb_mode(mp_obj_t usb_mode) { - if (MP_OBJ_IS_STR(usb_mode)) { - pyb_config_usb_mode = usb_mode; - } - return mp_const_none; -} - -MP_DEFINE_CONST_FUN_OBJ_1(pyb_usb_mode_obj, pyb_usb_mode); - -#if 0 - -mp_obj_t pyb_delay(mp_obj_t count) { - delay(mp_obj_get_int(count)); - return mp_const_none; -} - -mp_obj_t pyb_led(mp_obj_t state) { - led_state(PYB_LED_BUILTIN, mp_obj_is_true(state)); - return state; -} - -#endif // 0 - -#if 0 -char *strdup(const char *str) { - uint32_t len = strlen(str); - char *s2 = m_new(char, len + 1); - memcpy(s2, str, len); - s2[len] = 0; - return s2; -} -#endif - -int main(void) { - // TODO: Put this in a more common initialization function. - // Turn on STKALIGN which keeps the stack 8-byte aligned for interrupts - // (per EABI) - #define SCB_CCR_STKALIGN (1 << 9) - SCB_CCR |= SCB_CCR_STKALIGN; - - mp_stack_ctrl_init(); - mp_stack_set_limit(10240); - - pinMode(LED_BUILTIN, OUTPUT); - led_init(); - -// int first_soft_reset = true; - -soft_reset: - - led_state(PYB_LED_BUILTIN, 1); - - // GC init - gc_init(&_heap_start, (void*)HEAP_END); - - // MicroPython init - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - readline_init0(); - - pin_init0(); - -#if 0 - // add some functions to the python namespace - { - mp_store_name(MP_QSTR_help, mp_make_function_n(0, pyb_help)); - mp_obj_t m = mp_obj_new_module(MP_QSTR_pyb); - mp_store_attr(m, MP_QSTR_info, mp_make_function_n(0, pyb_info)); - mp_store_attr(m, MP_QSTR_source_dir, mp_make_function_n(1, pyb_source_dir)); - mp_store_attr(m, MP_QSTR_main, mp_make_function_n(1, pyb_main)); - mp_store_attr(m, MP_QSTR_gc, mp_make_function_n(0, pyb_gc)); - mp_store_attr(m, MP_QSTR_delay, mp_make_function_n(1, pyb_delay)); - mp_store_attr(m, MP_QSTR_led, mp_make_function_n(1, pyb_led)); - mp_store_attr(m, MP_QSTR_LED, (mp_obj_t)&pyb_led_type); - mp_store_attr(m, MP_QSTR_analogRead, mp_make_function_n(1, pyb_analog_read)); - mp_store_attr(m, MP_QSTR_analogWrite, mp_make_function_n(2, pyb_analog_write)); - mp_store_attr(m, MP_QSTR_analogWriteResolution, mp_make_function_n(1, pyb_analog_write_resolution)); - mp_store_attr(m, MP_QSTR_analogWriteFrequency, mp_make_function_n(2, pyb_analog_write_frequency)); - - mp_store_attr(m, MP_QSTR_gpio, (mp_obj_t)&pyb_gpio_obj); - mp_store_attr(m, MP_QSTR_Servo, mp_make_function_n(0, pyb_Servo)); - mp_store_name(MP_QSTR_pyb, m); - } -#endif - -#if MICROPY_MODULE_FROZEN - pyexec_frozen_module("boot.py"); -#else - if (!pyexec_file("/boot.py")) { - flash_error(4); - } -#endif - - // Turn bootup LED off - led_state(PYB_LED_BUILTIN, 0); - - // run main script -#if MICROPY_MODULE_FROZEN - pyexec_frozen_module("main.py"); -#else - { - vstr_t *vstr = vstr_new(16); - vstr_add_str(vstr, "/"); - if (pyb_config_main == MP_OBJ_NULL) { - vstr_add_str(vstr, "main.py"); - } else { - vstr_add_str(vstr, mp_obj_str_get_str(pyb_config_main)); - } - if (!pyexec_file(vstr_null_terminated_str(vstr))) { - flash_error(3); - } - vstr_free(vstr); - } -#endif - - // enter REPL - // REPL mode can change, or it can request a soft reset - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("PYB: soft reboot\n"); - -// first_soft_reset = false; - goto soft_reset; -} - -// stub out __libc_init_array. It's called by mk20dx128.c and is used to call -// global C++ constructors. Since this is a C-only projects, we don't need to -// call constructors. -void __libc_init_array(void) { -} - -// ultoa is used by usb_init_serialnumber. Normally ultoa would be provided -// by nonstd.c from the teensy core, but it conflicts with some of the -// MicroPython functions in string0.c, so we provide ultoa here. -char * ultoa(unsigned long val, char *buf, int radix) -{ - unsigned digit; - int i=0, j; - char t; - - while (1) { - digit = val % radix; - buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10); - val /= radix; - if (val == 0) break; - i++; - } - buf[i + 1] = 0; - for (j=0; j < i; j++, i--) { - t = buf[j]; - buf[j] = buf[i]; - buf[i] = t; - } - return buf; -} diff --git a/ports/teensy/make-pins.py b/ports/teensy/make-pins.py deleted file mode 100755 index 0f6c5f28d4fef..0000000000000 --- a/ports/teensy/make-pins.py +++ /dev/null @@ -1,405 +0,0 @@ -#!/usr/bin/env python -"""Creates the pin file for the Teensy.""" - -from __future__ import print_function - -import argparse -import sys -import csv - -SUPPORTED_FN = { - 'FTM' : ['CH0', 'CH1', 'CH2', 'CH3', 'CH4', 'CH5', 'CH6', 'CH7', - 'QD_PHA', 'QD_PHB'], - 'I2C' : ['SDA', 'SCL'], - 'UART' : ['RX', 'TX', 'CTS', 'RTS'], - 'SPI' : ['NSS', 'SCK', 'MISO', 'MOSI'] -} - -def parse_port_pin(name_str): - """Parses a string and returns a (port-num, pin-num) tuple.""" - if len(name_str) < 4: - raise ValueError("Expecting pin name to be at least 4 charcters.") - if name_str[0:2] != 'PT': - raise ValueError("Expecting pin name to start with PT") - if name_str[2] not in ('A', 'B', 'C', 'D', 'E', 'Z'): - raise ValueError("Expecting pin port to be between A and E or Z") - port = ord(name_str[2]) - ord('A') - pin_str = name_str[3:].split('/')[0] - if not pin_str.isdigit(): - raise ValueError("Expecting numeric pin number.") - return (port, int(pin_str)) - -def split_name_num(name_num): - num = None - for num_idx in range(len(name_num) - 1, -1, -1): - if not name_num[num_idx].isdigit(): - name = name_num[0:num_idx + 1] - num_str = name_num[num_idx + 1:] - if len(num_str) > 0: - num = int(num_str) - break - return name, num - - -class AlternateFunction(object): - """Holds the information associated with a pins alternate function.""" - - def __init__(self, idx, af_str): - self.idx = idx - self.af_str = af_str - - self.func = '' - self.fn_num = None - self.pin_type = '' - self.supported = False - - af_words = af_str.split('_', 1) - self.func, self.fn_num = split_name_num(af_words[0]) - if len(af_words) > 1: - self.pin_type = af_words[1] - if self.func in SUPPORTED_FN: - pin_types = SUPPORTED_FN[self.func] - if self.pin_type in pin_types: - self.supported = True - - def is_supported(self): - return self.supported - - def ptr(self): - """Returns the numbered function (i.e. USART6) for this AF.""" - if self.fn_num is None: - return self.func - return '{:s}{:d}'.format(self.func, self.fn_num) - - def mux_name(self): - return 'AF{:d}_{:s}'.format(self.idx, self.ptr()) - - def print(self): - """Prints the C representation of this AF.""" - if self.supported: - print(' AF', end='') - else: - print(' //', end='') - fn_num = self.fn_num - if fn_num is None: - fn_num = 0 - print('({:2d}, {:8s}, {:2d}, {:10s}, {:8s}), // {:s}'.format(self.idx, - self.func, fn_num, self.pin_type, self.ptr(), self.af_str)) - - def qstr_list(self): - return [self.mux_name()] - - -class Pin(object): - """Holds the information associated with a pin.""" - - def __init__(self, port, pin): - self.port = port - self.pin = pin - self.alt_fn = [] - self.alt_fn_count = 0 - self.adc_num = 0 - self.adc_channel = 0 - self.board_pin = False - - def port_letter(self): - return chr(self.port + ord('A')) - - def cpu_pin_name(self): - return '{:s}{:d}'.format(self.port_letter(), self.pin) - - def is_board_pin(self): - return self.board_pin - - def set_is_board_pin(self): - self.board_pin = True - - def parse_adc(self, adc_str): - if (adc_str[:3] != 'ADC'): - return - (adc,channel) = adc_str.split('_') - for idx in range(3, len(adc)): - adc_num = int(adc[idx]) # 1, 2, or 3 - self.adc_num |= (1 << (adc_num - 1)) - self.adc_channel = int(channel[2:]) - - def parse_af(self, af_idx, af_strs_in): - if len(af_strs_in) == 0: - return - # If there is a slash, then the slash separates 2 aliases for the - # same alternate function. - af_strs = af_strs_in.split('/') - for af_str in af_strs: - alt_fn = AlternateFunction(af_idx, af_str) - self.alt_fn.append(alt_fn) - if alt_fn.is_supported(): - self.alt_fn_count += 1 - - def alt_fn_name(self, null_if_0=False): - if null_if_0 and self.alt_fn_count == 0: - return 'NULL' - return 'pin_{:s}_af'.format(self.cpu_pin_name()) - - def adc_num_str(self): - str = '' - for adc_num in range(1,4): - if self.adc_num & (1 << (adc_num - 1)): - if len(str) > 0: - str += ' | ' - str += 'PIN_ADC' - str += chr(ord('0') + adc_num) - if len(str) == 0: - str = '0' - return str - - def print(self): - if self.alt_fn_count == 0: - print("// ", end='') - print('const pin_af_obj_t {:s}[] = {{'.format(self.alt_fn_name())) - for alt_fn in self.alt_fn: - alt_fn.print() - if self.alt_fn_count == 0: - print("// ", end='') - print('};') - print('') - print('const pin_obj_t pin_{:s} = PIN({:s}, {:d}, {:d}, {:s}, {:s}, {:d});'.format( - self.cpu_pin_name(), self.port_letter(), self.pin, - self.alt_fn_count, self.alt_fn_name(null_if_0=True), - self.adc_num_str(), self.adc_channel)) - print('') - - def print_header(self, hdr_file): - hdr_file.write('extern const pin_obj_t pin_{:s};\n'. - format(self.cpu_pin_name())) - if self.alt_fn_count > 0: - hdr_file.write('extern const pin_af_obj_t pin_{:s}_af[];\n'. - format(self.cpu_pin_name())) - - def qstr_list(self): - result = [] - for alt_fn in self.alt_fn: - if alt_fn.is_supported(): - result += alt_fn.qstr_list() - return result - - -class NamedPin(object): - - def __init__(self, name, pin): - self._name = name - self._pin = pin - - def pin(self): - return self._pin - - def name(self): - return self._name - - -class Pins(object): - - def __init__(self): - self.cpu_pins = [] # list of NamedPin objects - self.board_pins = [] # list of NamedPin objects - - def find_pin(self, port_num, pin_num): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.port == port_num and pin.pin == pin_num: - return pin - - def parse_af_file(self, filename, pinname_col, af_col): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[pinname_col]) - except: - continue - pin = Pin(port_num, pin_num) - for af_idx in range(af_col, len(row)): - if af_idx >= af_col: - pin.parse_af(af_idx - af_col, row[af_idx]) - self.cpu_pins.append(NamedPin(pin.cpu_pin_name(), pin)) - - def parse_board_file(self, filename): - with open(filename, 'r') as csvfile: - rows = csv.reader(csvfile) - for row in rows: - try: - (port_num, pin_num) = parse_port_pin(row[1]) - except: - continue - pin = self.find_pin(port_num, pin_num) - if pin: - pin.set_is_board_pin() - self.board_pins.append(NamedPin(row[0], pin)) - - def print_named(self, label, named_pins): - print('STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{'.format(label)) - for named_pin in named_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - print(' {{ MP_ROM_QSTR(MP_QSTR_{:s}), MP_ROM_PTR(&pin_{:s}) }},'.format(named_pin.name(), pin.cpu_pin_name())) - print('};') - print('MP_DEFINE_CONST_DICT(pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);'.format(label, label)); - - def print(self): - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print() - self.print_named('cpu', self.cpu_pins) - print('') - self.print_named('board', self.board_pins) - - def print_adc(self, adc_num): - print(''); - print('const pin_obj_t * const pin_adc{:d}[] = {{'.format(adc_num)) - for channel in range(16): - adc_found = False - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if (pin.is_board_pin() and - (pin.adc_num & (1 << (adc_num - 1))) and (pin.adc_channel == channel)): - print(' &pin_{:s}, // {:d}'.format(pin.cpu_pin_name(), channel)) - adc_found = True - break - if not adc_found: - print(' NULL, // {:d}'.format(channel)) - print('};') - - - def print_header(self, hdr_filename): - with open(hdr_filename, 'wt') as hdr_file: - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - pin.print_header(hdr_file) - hdr_file.write('extern const pin_obj_t * const pin_adc1[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc2[];\n') - hdr_file.write('extern const pin_obj_t * const pin_adc3[];\n') - - def print_qstr(self, qstr_filename): - with open(qstr_filename, 'wt') as qstr_file: - qstr_set = set([]) - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - qstr_set |= set(pin.qstr_list()) - qstr_set |= set([named_pin.name()]) - for named_pin in self.board_pins: - qstr_set |= set([named_pin.name()]) - for qstr in sorted(qstr_set): - print('Q({})'.format(qstr), file=qstr_file) - - - def print_af_hdr(self, af_const_filename): - with open(af_const_filename, 'wt') as af_const_file: - af_hdr_set = set([]) - mux_name_width = 0 - for named_pin in self.cpu_pins: - pin = named_pin.pin() - if pin.is_board_pin(): - for af in pin.alt_fn: - if af.is_supported(): - mux_name = af.mux_name() - af_hdr_set |= set([mux_name]) - if len(mux_name) > mux_name_width: - mux_name_width = len(mux_name) - for mux_name in sorted(af_hdr_set): - key = 'MP_OBJ_NEW_QSTR(MP_QSTR_{}),'.format(mux_name) - val = 'MP_OBJ_NEW_SMALL_INT(GPIO_{})'.format(mux_name) - print(' { %-*s %s },' % (mux_name_width + 26, key, val), - file=af_const_file) - - def print_af_py(self, af_py_filename): - with open(af_py_filename, 'wt') as af_py_file: - print('PINS_AF = (', file=af_py_file); - for named_pin in self.board_pins: - print(" ('%s', " % named_pin.name(), end='', file=af_py_file) - for af in named_pin.pin().alt_fn: - if af.is_supported(): - print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file) - print('),', file=af_py_file) - print(')', file=af_py_file) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file" - ) - parser.add_argument( - "-a", "--af", - dest="af_filename", - help="Specifies the alternate function file for the chip", - default="mk20dx256_af.csv" - ) - parser.add_argument( - "--af-const", - dest="af_const_filename", - help="Specifies header file for alternate function constants.", - default="build/pins_af_const.h" - ) - parser.add_argument( - "--af-py", - dest="af_py_filename", - help="Specifies the filename for the python alternate function mappings.", - default="build/pins_af.py" - ) - parser.add_argument( - "-b", "--board", - dest="board_filename", - help="Specifies the board file", - ) - parser.add_argument( - "-p", "--prefix", - dest="prefix_filename", - help="Specifies beginning portion of generated pins file", - default="mk20dx256_prefix.c" - ) - parser.add_argument( - "-q", "--qstr", - dest="qstr_filename", - help="Specifies name of generated qstr header file", - default="build/pins_qstr.h" - ) - parser.add_argument( - "-r", "--hdr", - dest="hdr_filename", - help="Specifies name of generated pin header file", - default="build/pins.h" - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - print('// This file was automatically generated by make-pins.py') - print('//') - if args.af_filename: - print('// --af {:s}'.format(args.af_filename)) - pins.parse_af_file(args.af_filename, 4, 3) - - if args.board_filename: - print('// --board {:s}'.format(args.board_filename)) - pins.parse_board_file(args.board_filename) - - if args.prefix_filename: - print('// --prefix {:s}'.format(args.prefix_filename)) - print('') - with open(args.prefix_filename, 'r') as prefix_file: - print(prefix_file.read()) - pins.print() - pins.print_adc(1) - pins.print_adc(2) - pins.print_adc(3) - pins.print_header(args.hdr_filename) - pins.print_qstr(args.qstr_filename) - pins.print_af_hdr(args.af_const_filename) - pins.print_af_py(args.af_py_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/teensy/memzip_files/boot.py b/ports/teensy/memzip_files/boot.py deleted file mode 100644 index 6dd5516a97527..0000000000000 --- a/ports/teensy/memzip_files/boot.py +++ /dev/null @@ -1,12 +0,0 @@ -import pyb -print("Executing boot.py") - -def pins(): - for pin_name in dir(pyb.Pin.board): - pin = pyb.Pin(pin_name) - print('{:10s} {:s}'.format(pin_name, str(pin))) - -def af(): - for pin_name in dir(pyb.Pin.board): - pin = pyb.Pin(pin_name) - print('{:10s} {:s}'.format(pin_name, str(pin.af_list()))) diff --git a/ports/teensy/memzip_files/main.py b/ports/teensy/memzip_files/main.py deleted file mode 100644 index b652377f97de5..0000000000000 --- a/ports/teensy/memzip_files/main.py +++ /dev/null @@ -1,15 +0,0 @@ -import pyb - -print("Executing main.py") - -led = pyb.LED(1) - -led.on() -pyb.delay(100) -led.off() -pyb.delay(100) -led.on() -pyb.delay(100) -led.off() - - diff --git a/ports/teensy/mk20dx256.ld b/ports/teensy/mk20dx256.ld deleted file mode 100644 index bff0a8c4aa7b7..0000000000000 --- a/ports/teensy/mk20dx256.ld +++ /dev/null @@ -1,176 +0,0 @@ -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K - RAM (rwx) : ORIGIN = 0x1FFF8000, LENGTH = 64K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* INCLUDE common.ld */ - -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - - - -SECTIONS -{ - .text : { - . = 0; - KEEP(*(.vectors)) - *(.startup*) - /* TODO: does linker detect startup overflow onto flashconfig? */ - . = 0x400; - KEEP(*(.flashconfig*)) - *(.text*) - *(.rodata*) - . = ALIGN(4); - KEEP(*(.init)) - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - } > FLASH = 0xFF - - .ARM.exidx : { - __exidx_start = .; - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - __exidx_end = .; - } > FLASH - _etext = .; - - .usbdescriptortable (NOLOAD) : { - /* . = ORIGIN(RAM); */ - . = ALIGN(512); - *(.usbdescriptortable*) - } > RAM - - .dmabuffers (NOLOAD) : { - . = ALIGN(4); - *(.dmabuffers*) - } > RAM - - .usbbuffers (NOLOAD) : { - . = ALIGN(4); - *(.usbbuffers*) - } > RAM - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - .data : AT (_etext) { - . = ALIGN(4); - _sdata = .; - _ram_start = .; - *(.data*) - . = ALIGN(4); - _edata = .; - } > RAM - - /* - * _staticfs is the place in flash where the static filesystem which - * is concatenated to the .hex file will wind up. - */ - _staticfs = LOADADDR(.data) + SIZEOF(.data); - - .noinit (NOLOAD) : { - *(.noinit*) - } > RAM - - .bss : { - . = ALIGN(4); - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - __bss_end = .; - } > RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - _heap_start = .; /* define a global symbol at heap start */ - . = . + _minimum_heap_size; - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - _estack = ORIGIN(RAM) + LENGTH(RAM); - _ram_end = ORIGIN(RAM) + LENGTH(RAM); - _heap_end = ORIGIN(RAM) + 0xe000; -} - - - - diff --git a/ports/teensy/mk20dx256_af.csv b/ports/teensy/mk20dx256_af.csv deleted file mode 100644 index 571587de6b4e8..0000000000000 --- a/ports/teensy/mk20dx256_af.csv +++ /dev/null @@ -1,65 +0,0 @@ -Pin,Name,Default,ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,EzPort -1,PTE0,ADC1_SE4a,ADC1_SE4a,PTE0,SPI1_PCS1,UART1_TX,,,I2C1_SDA,RTC_CLKOUT, -2,PTE1/LLWU_P0,ADC1_SE5a,ADC1_SE5a,PTE1/LLWU_P0,SPI1_SOUT,UART1_RX,,,I2C1_SCL,SPI1_SIN, -3,VDD,VDD,VDD,,,,,,,, -4,VSS,VSS,VSS,,,,,,,, -5,USB0_DP,USB0_DP,USB0_DP,,,,,,,, -6,USB0_DM,USB0_DM,USB0_DM,,,,,,,, -7,VOUT33,VOUT33,VOUT33,,,,,,,, -8,VREGIN,VREGIN,VREGIN,,,,,,,, -9,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PGA0_DP/ADC0_DP0/ADC1_DP3,PTZ0,,,,,,, -10,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PGA0_DM/ADC0_DM0/ADC1_DM3,PTZ1,,,,,,, -11,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PGA1_DP/ADC1_DP0/ADC0_DP3,PTZ2,,,,,,, -12,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PGA1_DM/ADC1_DM0/ADC0_DM3,PTZ3,,,,,,, -13,VDDA,VDDA,VDDA,,,,,,,, -14,VREFH,VREFH,VREFH,,,,,,,, -15,VREFL,VREFL,VREFL,,,,,,,, -16,VSSA,VSSA,VSSA,,,,,,,, -17,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18,PTZ4,,,,,,, -18,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,DAC0_OUT/CMP1_IN3/ADC0_SE23,PTZ5,,,,,,, -19,XTAL32,XTAL32,XTAL32,,,,,,,, -20,EXTAL32,EXTAL32,EXTAL32,,,,,,,, -21,VBAT,VBAT,VBAT,,,,,,,, -22,PTA0,JTAG_TCLK/SWD_CLK/EZP_CLK,TSI0_CH1,PTA0,UART0_CTS_b/UART0_COL_b,FTM0_CH5,,,,JTAG_TCLK/SWD_CLK,EZP_CLK -23,PTA1,JTAG_TDI/EZP_DI,TSI0_CH2,PTA1,UART0_RX,FTM0_CH6,,,,JTAG_TDI,EZP_DI -24,PTA2,JTAG_TDO/TRACE_SWO/EZP_DO,TSI0_CH3,PTA2,UART0_TX,FTM0_CH7,,,,JTAG_TDO/TRACE_SWO,EZP_DO -25,PTA3,JTAG_TMS/SWD_DIO,TSI0_CH4,PTA3,UART0_RTS_b,FTM0_CH0,,,,JTAG_TMS/SWD_DIO, -26,PTA4/LLWU_P3,NMI_b/EZP_CS_b,TSI0_CH5,PTA4/LLWU_P3,,FTM0_CH1,,,NMI_b,EZP_CS_b, -27,PTA5,DISABLED,,PTA5,USB_CLKIN,FTM0_CH2,,CMP2_OUT,I2S0_TX_BCLK,JTAG_TRST_b, -28,PTA12,CMP2_IN0,CMP2_IN0,PTA12,CAN0_TX,FTM1_CH0,,,I2S0_TXD0,FTM1_QD_PHA, -29,PTA13/LLWU_P4,CMP2_IN1,CMP2_IN1,PTA13/LLWU_P4,CAN0_RX,FTM1_CH1,,,I2S0_TX_FS,FTM1_QD_PHB, -30,VDD,VDD,VDD,,,,,,,, -31,VSS,VSS,VSS,,,,,,,, -32,PTA18,EXTAL0,EXTAL0,PTA18,,FTM0_FLT2,FTM_CLKIN0,,,, -33,PTA19,XTAL0,XTAL0,PTA19,,FTM1_FLT0,FTM_CLKIN1,,LPTMR0_ALT1,, -34,RESET_b,RESET_b,RESET_b,,,,,,,, -35,PTB0/LLWU_P5,ADC0_SE8/ADC1_SE8/TSI0_CH0,ADC0_SE8/ADC1_SE8/TSI0_CH0,PTB0/LLWU_P5,I2C0_SCL,FTM1_CH0,,,FTM1_QD_PHA,, -36,PTB1,ADC0_SE9/ADC1_SE9/TSI0_CH6,ADC0_SE9/ADC1_SE9/TSI0_CH6,PTB1,I2C0_SDA,FTM1_CH1,,,FTM1_QD_PHB,, -37,PTB2,ADC0_SE12/TSI0_CH7,ADC0_SE12/TSI0_CH7,PTB2,I2C0_SCL,UART0_RTS_b,,,FTM0_FLT3,, -38,PTB3,ADC0_SE13/TSI0_CH8,ADC0_SE13/TSI0_CH8,PTB3,I2C0_SDA,UART0_CTS_b/UART0_COL_b,,,FTM0_FLT0,, -39,PTB16,TSI0_CH9,TSI0_CH9,PTB16,SPI1_SOUT,UART0_RX,,FB_AD17,EWM_IN,, -40,PTB17,TSI0_CH10,TSI0_CH10,PTB17,SPI1_SIN,UART0_TX,,FB_AD16,EWM_OUT_b,, -41,PTB18,TSI0_CH11,TSI0_CH11,PTB18,CAN0_TX,FTM2_CH0,I2S0_TX_BCLK,FB_AD15,FTM2_QD_PHA,, -42,PTB19,TSI0_CH12,TSI0_CH12,PTB19,CAN0_RX,FTM2_CH1,I2S0_TX_FS,FB_OE_b,FTM2_QD_PHB,, -43,PTC0,ADC0_SE14/TSI0_CH13,ADC0_SE14/TSI0_CH13,PTC0,SPI0_PCS4,PDB0_EXTRG,,FB_AD14,I2S0_TXD1,, -44,PTC1/LLWU_P6,ADC0_SE15/TSI0_CH14,ADC0_SE15/TSI0_CH14,PTC1/LLWU_P6,SPI0_PCS3,UART1_RTS_b,FTM0_CH0,FB_AD13,I2S0_TXD0,, -45,PTC2,ADC0_SE4b/CMP1_IN0/TSI0_CH15,ADC0_SE4b/CMP1_IN0/TSI0_CH15,PTC2,SPI0_PCS2,UART1_CTS_b,FTM0_CH1,FB_AD12,I2S0_TX_FS,, -46,PTC3/LLWU_P7,CMP1_IN1,CMP1_IN1,PTC3/LLWU_P7,SPI0_PCS1,UART1_RX,FTM0_CH2,CLKOUT,I2S0_TX_BCLK,, -47,VSS,VSS,VSS,,,,,,,, -48,VDD,VDD,VDD,,,,,,,, -49,PTC4/LLWU_P8,DISABLED,,PTC4/LLWU_P8,SPI0_PCS0,UART1_TX,FTM0_CH3,FB_AD11,CMP1_OUT,, -50,PTC5/LLWU_P9,DISABLED,,PTC5/LLWU_P9,SPI0_SCK,LPTMR0_ALT2,I2S0_RXD0,FB_AD10,CMP0_OUT,, -51,PTC6/LLWU_P10,CMP0_IN0,CMP0_IN0,PTC6/LLWU_P10,SPI0_SOUT,PDB0_EXTRG,I2S0_RX_BCLK,FB_AD9,I2S0_MCLK,, -52,PTC7,CMP0_IN1,CMP0_IN1,PTC7,SPI0_SIN,USB_SOF_OUT,I2S0_RX_FS,FB_AD8,,, -53,PTC8,ADC1_SE4b/CMP0_IN2,ADC1_SE4b/CMP0_IN2,PTC8,,,I2S0_MCLK,FB_AD7,,, -54,PTC9,ADC1_SE5b/CMP0_IN3,ADC1_SE5b/CMP0_IN3,PTC9,,,I2S0_RX_BCLK,FB_AD6,FTM2_FLT0,, -55,PTC10,ADC1_SE6b,ADC1_SE6b,PTC10,I2C1_SCL,,I2S0_RX_FS,FB_AD5,,, -56,PTC11/LLWU_P11,ADC1_SE7b,ADC1_SE7b,PTC11/LLWU_P11,I2C1_SDA,,I2S0_RXD1,FB_RW_b,,, -57,PTD0/LLWU_P12,DISABLED,,PTD0/LLWU_P12,SPI0_PCS0,UART2_RTS_b,,FB_ALE/FB_CS1_b/FB_TS_b,,, -58,PTD1,ADC0_SE5b,ADC0_SE5b,PTD1,SPI0_SCK,UART2_CTS_b,,FB_CS0_b,,, -59,PTD2/LLWU_P13,DISABLED,,PTD2/LLWU_P13,SPI0_SOUT,UART2_RX,,FB_AD4,,, -60,PTD3,DISABLED,,PTD3,SPI0_SIN,UART2_TX,,FB_AD3,,, -61,PTD4/LLWU_P14,DISABLED,,PTD4/LLWU_P14,SPI0_PCS1,UART0_RTS_b,FTM0_CH4,FB_AD2,EWM_IN,, -62,PTD5,ADC0_SE6b,ADC0_SE6b,PTD5,SPI0_PCS2,UART0_CTS_b/UART0_COL_b,FTM0_CH5,FB_AD1,EWM_OUT_b,, -63,PTD6/LLWU_P15,ADC0_SE7b,ADC0_SE7b,PTD6/LLWU_P15,SPI0_PCS3,UART0_RX,FTM0_CH6,FB_AD0,FTM0_FLT0f,, -64,PTD7,DISABLED,,PTD7,CMT_IRO,UART0_TX,FTM0_CH7,,FTM0_FLT1,, diff --git a/ports/teensy/mk20dx256_prefix.c b/ports/teensy/mk20dx256_prefix.c deleted file mode 100644 index d8e7480b5891e..0000000000000 --- a/ports/teensy/mk20dx256_prefix.c +++ /dev/null @@ -1,33 +0,0 @@ -// stm32fxx-prefix.c becomes the initial portion of the generated pins file. - -#include -#include - -#include "py/obj.h" -#include "teensy_hal.h" -#include "pin.h" - -#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \ -{ \ - { &pin_af_type }, \ - .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \ - .idx = (af_idx), \ - .fn = AF_FN_ ## af_fn, \ - .unit = (af_unit), \ - .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \ - .af_fn = (af_ptr) \ -} - -#define PIN(p_port, p_pin, p_num_af, p_af, p_adc_num, p_adc_channel) \ -{ \ - { &pin_type }, \ - .name = MP_QSTR_ ## p_port ## p_pin, \ - .port = PORT_ ## p_port, \ - .pin = (p_pin), \ - .num_af = (p_num_af), \ - .pin_mask = (1 << (p_pin)), \ - .gpio = GPIO ## p_port, \ - .af = p_af, \ - .adc_num = p_adc_num, \ - .adc_channel = p_adc_channel, \ -} diff --git a/ports/teensy/modpyb.c b/ports/teensy/modpyb.c deleted file mode 100644 index e4c399fc84326..0000000000000 --- a/ports/teensy/modpyb.c +++ /dev/null @@ -1,358 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include "Arduino.h" - -#include "py/obj.h" -#include "py/gc.h" -#include "py/mphal.h" - -#include "lib/utils/pyexec.h" - -#include "gccollect.h" -#include "irq.h" -#include "systick.h" -#include "led.h" -#include "pin.h" -#include "timer.h" -#include "extint.h" -#include "usrsw.h" -#include "rng.h" -//#include "rtc.h" -//#include "i2c.h" -//#include "spi.h" -#include "uart.h" -#include "adc.h" -#include "storage.h" -#include "sdcard.h" -#include "accel.h" -#include "servo.h" -#include "dac.h" -#include "usb.h" -#include "portmodules.h" - -/// \module pyb - functions related to the pyboard -/// -/// The `pyb` module contains specific functions related to the pyboard. - -/// \function bootloader() -/// Activate the bootloader without BOOT* pins. -STATIC mp_obj_t pyb_bootloader(void) { - printf("bootloader command not current supported\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_bootloader_obj, pyb_bootloader); - -/// \function info([dump_alloc_table]) -/// Print out lots of information about the board. -STATIC mp_obj_t pyb_info(uint n_args, const mp_obj_t *args) { - // get and print unique id; 96 bits - { - byte *id = (byte*)0x40048058; - printf("ID=%02x%02x%02x%02x:%02x%02x%02x%02x:%02x%02x%02x%02x\n", id[0], id[1], id[2], id[3], id[4], id[5], id[6], id[7], id[8], id[9], id[10], id[11]); - } - - // get and print clock speeds - printf("CPU=%u\nBUS=%u\nMEM=%u\n", F_CPU, F_BUS, F_MEM); - - // to print info about memory - { - printf("_etext=%p\n", &_etext); - printf("_sidata=%p\n", &_sidata); - printf("_sdata=%p\n", &_sdata); - printf("_edata=%p\n", &_edata); - printf("_sbss=%p\n", &_sbss); - printf("_ebss=%p\n", &_ebss); - printf("_estack=%p\n", &_estack); - printf("_ram_start=%p\n", &_ram_start); - printf("_heap_start=%p\n", &_heap_start); - printf("_heap_end=%p\n", &_heap_end); - printf("_ram_end=%p\n", &_ram_end); - } - - // qstr info - { - uint n_pool, n_qstr, n_str_data_bytes, n_total_bytes; - qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes); - printf("qstr:\n n_pool=%u\n n_qstr=%u\n n_str_data_bytes=%u\n n_total_bytes=%u\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes); - } - - // GC info - { - gc_info_t info; - gc_info(&info); - printf("GC:\n"); - printf(" " UINT_FMT " total\n", info.total); - printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free); - printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block); - } - - if (n_args == 1) { - // arg given means dump gc allocation table - gc_dump_alloc_table(); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info); - -/// \function unique_id() -/// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU. -STATIC mp_obj_t pyb_unique_id(void) { - byte *id = (byte*)0x40048058; - return mp_obj_new_bytes(id, 12); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_unique_id_obj, pyb_unique_id); - -/// \function freq() -/// Return a tuple of clock frequencies: (SYSCLK, HCLK, PCLK1, PCLK2). -// TODO should also be able to set frequency via this function -STATIC mp_obj_t pyb_freq(void) { - mp_obj_t tuple[3] = { - mp_obj_new_int(F_CPU), - mp_obj_new_int(F_BUS), - mp_obj_new_int(F_MEM), - }; - return mp_obj_new_tuple(3, tuple); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_freq_obj, pyb_freq); - -/// \function sync() -/// Sync all file systems. -STATIC mp_obj_t pyb_sync(void) { - printf("sync not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_sync_obj, pyb_sync); - -/// \function millis() -/// Returns the number of milliseconds since the board was last reset. -/// -/// The result is always a MicroPython smallint (31-bit signed number), so -/// after 2^30 milliseconds (about 12.4 days) this will start to return -/// negative numbers. -STATIC mp_obj_t pyb_millis(void) { - // We want to "cast" the 32 bit unsigned into a small-int. This means - // copying the MSB down 1 bit (extending the sign down), which is - // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro. - return MP_OBJ_NEW_SMALL_INT(mp_hal_ticks_ms()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis); - -/// \function elapsed_millis(start) -/// Returns the number of milliseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 12.4 days. -/// -/// Example: -/// start = pyb.millis() -/// while pyb.elapsed_millis(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) { - uint32_t startMillis = mp_obj_get_int(start); - uint32_t currMillis = mp_hal_ticks_ms(); - return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis); - -/// \function micros() -/// Returns the number of microseconds since the board was last reset. -/// -/// The result is always a MicroPython smallint (31-bit signed number), so -/// after 2^30 microseconds (about 17.8 minutes) this will start to return -/// negative numbers. -STATIC mp_obj_t pyb_micros(void) { - // We want to "cast" the 32 bit unsigned into a small-int. This means - // copying the MSB down 1 bit (extending the sign down), which is - // equivalent to just using the MP_OBJ_NEW_SMALL_INT macro. - return MP_OBJ_NEW_SMALL_INT(micros()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_micros_obj, pyb_micros); - -/// \function elapsed_micros(start) -/// Returns the number of microseconds which have elapsed since `start`. -/// -/// This function takes care of counter wrap, and always returns a positive -/// number. This means it can be used to measure periods upto about 17.8 minutes. -/// -/// Example: -/// start = pyb.micros() -/// while pyb.elapsed_micros(start) < 1000: -/// # Perform some operation -STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) { - uint32_t startMicros = mp_obj_get_int(start); - uint32_t currMicros = micros(); - return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros); - -/// \function delay(ms) -/// Delay for the given number of milliseconds. -STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) { - mp_int_t ms = mp_obj_get_int(ms_in); - if (ms >= 0) { - mp_hal_delay_ms(ms); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay); - -/// \function udelay(us) -/// Delay for the given number of microseconds. -STATIC mp_obj_t pyb_udelay(mp_obj_t usec_in) { - mp_int_t usec = mp_obj_get_int(usec_in); - delayMicroseconds(usec); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_udelay_obj, pyb_udelay); - -STATIC mp_obj_t pyb_stop(void) { - printf("stop not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_stop_obj, pyb_stop); - -STATIC mp_obj_t pyb_standby(void) { - printf("standby not currently implemented\n"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_standby_obj, pyb_standby); - -/// \function have_cdc() -/// Return True if USB is connected as a serial device, False otherwise. -STATIC mp_obj_t pyb_have_cdc(void ) { - return mp_obj_new_bool(usb_vcp_is_connected()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_have_cdc_obj, pyb_have_cdc); - -/// \function hid((buttons, x, y, z)) -/// Takes a 4-tuple (or list) and sends it to the USB host (the PC) to -/// signal a HID mouse-motion event. -STATIC mp_obj_t pyb_hid_send_report(mp_obj_t arg) { -#if 1 - printf("hid_send_report not currently implemented\n"); -#else - mp_obj_t *items; - mp_obj_get_array_fixed_n(arg, 4, &items); - uint8_t data[4]; - data[0] = mp_obj_get_int(items[0]); - data[1] = mp_obj_get_int(items[1]); - data[2] = mp_obj_get_int(items[2]); - data[3] = mp_obj_get_int(items[3]); - usb_hid_send_report(data); -#endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_hid_send_report_obj, pyb_hid_send_report); - -MP_DECLARE_CONST_FUN_OBJ_1(pyb_source_dir_obj); // defined in main.c -MP_DECLARE_CONST_FUN_OBJ_1(pyb_main_obj); // defined in main.c -MP_DECLARE_CONST_FUN_OBJ_1(pyb_usb_mode_obj); // defined in main.c - -STATIC const mp_rom_map_elem_t pyb_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_pyb) }, - - { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&pyb_bootloader_obj) }, - { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&pyb_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&pyb_unique_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&pyb_freq_obj) }, - { MP_ROM_QSTR(MP_QSTR_repl_info), MP_ROM_PTR(&pyb_set_repl_info_obj) }, - - { MP_ROM_QSTR(MP_QSTR_wfi), MP_ROM_PTR(&pyb_wfi_obj) }, - { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&pyb_disable_irq_obj) }, - { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&pyb_enable_irq_obj) }, - - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&pyb_stop_obj) }, - { MP_ROM_QSTR(MP_QSTR_standby), MP_ROM_PTR(&pyb_standby_obj) }, - { MP_ROM_QSTR(MP_QSTR_source_dir), MP_ROM_PTR(&pyb_source_dir_obj) }, - { MP_ROM_QSTR(MP_QSTR_main), MP_ROM_PTR(&pyb_main_obj) }, - { MP_ROM_QSTR(MP_QSTR_usb_mode), MP_ROM_PTR(&pyb_usb_mode_obj) }, - - { MP_ROM_QSTR(MP_QSTR_have_cdc), MP_ROM_PTR(&pyb_have_cdc_obj) }, - { MP_ROM_QSTR(MP_QSTR_hid), MP_ROM_PTR(&pyb_hid_send_report_obj) }, - - { MP_ROM_QSTR(MP_QSTR_millis), MP_ROM_PTR(&pyb_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_millis), MP_ROM_PTR(&pyb_elapsed_millis_obj) }, - { MP_ROM_QSTR(MP_QSTR_micros), MP_ROM_PTR(&pyb_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_elapsed_micros), MP_ROM_PTR(&pyb_elapsed_micros_obj) }, - { MP_ROM_QSTR(MP_QSTR_delay), MP_ROM_PTR(&pyb_delay_obj) }, - { MP_ROM_QSTR(MP_QSTR_udelay), MP_ROM_PTR(&pyb_udelay_obj) }, - { MP_ROM_QSTR(MP_QSTR_sync), MP_ROM_PTR(&pyb_sync_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&pyb_timer_type) }, - -//#if MICROPY_HW_ENABLE_RNG -// { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) }, -//#endif - -//#if MICROPY_HW_ENABLE_RTC -// { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) }, -//#endif - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) }, -// { MP_ROM_QSTR(MP_QSTR_ExtInt), MP_ROM_PTR(&extint_type) }, - -#if MICROPY_HW_ENABLE_SERVO - { MP_ROM_QSTR(MP_QSTR_pwm), MP_ROM_PTR(&pyb_pwm_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_servo), MP_ROM_PTR(&pyb_servo_set_obj) }, - { MP_ROM_QSTR(MP_QSTR_Servo), MP_ROM_PTR(&pyb_servo_type) }, -#endif - -#if MICROPY_HW_HAS_SWITCH - { MP_ROM_QSTR(MP_QSTR_Switch), MP_ROM_PTR(&pyb_switch_type) }, -#endif - -//#if MICROPY_HW_HAS_SDCARD -// { MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sdcard_obj) }, -//#endif - - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pyb_led_type) }, -// { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&pyb_i2c_type) }, -// { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&pyb_spi_type) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) }, - -// { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&pyb_adc_type) }, -// { MP_ROM_QSTR(MP_QSTR_ADCAll), MP_ROM_PTR(&pyb_adc_all_type) }, - -//#if MICROPY_HW_ENABLE_DAC -// { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pyb_dac_type) }, -//#endif - -//#if MICROPY_HW_HAS_MMA7660 -// { MP_ROM_QSTR(MP_QSTR_Accel), MP_ROM_PTR(&pyb_accel_type) }, -//#endif -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_module_globals, pyb_module_globals_table); - -const mp_obj_module_t pyb_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&pyb_module_globals, -}; diff --git a/ports/teensy/mpconfigport.h b/ports/teensy/mpconfigport.h deleted file mode 100644 index b45b5ad4e3c5a..0000000000000 --- a/ports/teensy/mpconfigport.h +++ /dev/null @@ -1,139 +0,0 @@ -#include - -// options to control how MicroPython is built - -#define MICROPY_ALLOC_PATH_MAX (128) -#define MICROPY_EMIT_THUMB (1) -#define MICROPY_EMIT_INLINE_THUMB (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_OPT_COMPUTED_GOTO (1) - -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT teensy_help_text - -#define MICROPY_PY_IO (0) -#define MICROPY_PY_FROZENSET (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_CMATH (1) - -#define MICROPY_TIMER_REG (0) -#define MICROPY_REG (MICROPY_TIMER_REG) - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0) - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - -// extra built in modules to add to the list of known ones -extern const struct _mp_obj_module_t os_module; -extern const struct _mp_obj_module_t pyb_module; -extern const struct _mp_obj_module_t time_module; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -// extra constants -#define MICROPY_PORT_CONSTANTS \ - { MP_ROM_QSTR(MP_QSTR_pyb), MP_ROM_PTR(&pyb_module) }, \ - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; \ - mp_obj_t pin_class_mapper; \ - mp_obj_t pin_class_map_dict; \ - struct _pyb_uart_obj_t *pyb_stdio_uart; \ - -// type definitions for the specific machine - -#define UINT_FMT "%u" -#define INT_FMT "%d" - -typedef int32_t mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) - -// We have inlined IRQ functions for efficiency (they are generally -// 1 machine instruction). -// -// Note on IRQ state: you should not need to know the specific -// value of the state variable, but rather just pass the return -// value from disable_irq back to enable_irq. If you really need -// to know the machine-specific values, see irq.h. - -#ifndef __disable_irq -#define __disable_irq() __asm__ volatile("CPSID i"); -#endif - -__attribute__(( always_inline )) static inline uint32_t __get_PRIMASK(void) { - uint32_t result; - __asm volatile ("MRS %0, primask" : "=r" (result)); - return(result); -} - -__attribute__(( always_inline )) static inline void __set_PRIMASK(uint32_t priMask) { - __asm volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - -__attribute__(( always_inline )) static inline void enable_irq(mp_uint_t state) { - __set_PRIMASK(state); -} - -__attribute__(( always_inline )) static inline mp_uint_t disable_irq(void) { - mp_uint_t state = __get_PRIMASK(); - __disable_irq(); - return state; -} - -#define MICROPY_BEGIN_ATOMIC_SECTION() disable_irq() -#define MICROPY_END_ATOMIC_SECTION(state) enable_irq(state) - -// We need to provide a declaration/definition of alloca() -#include - -// The following would be from a board specific file, if one existed - -#define MICROPY_HW_BOARD_NAME "Teensy-3.1" -#define MICROPY_HW_MCU_NAME "MK20DX256" - -#define MICROPY_HW_HAS_SWITCH (0) -#define MICROPY_HW_HAS_SDCARD (0) -#define MICROPY_HW_HAS_MMA7660 (0) -#define MICROPY_HW_HAS_LIS3DSH (0) -#define MICROPY_HW_HAS_LCD (0) -#define MICROPY_HW_ENABLE_RNG (0) -#define MICROPY_HW_ENABLE_RTC (0) -#define MICROPY_HW_ENABLE_TIMER (0) -#define MICROPY_HW_ENABLE_SERVO (0) -#define MICROPY_HW_ENABLE_DAC (0) -#define MICROPY_HW_ENABLE_I2C1 (0) -#define MICROPY_HW_ENABLE_SPI1 (0) -#define MICROPY_HW_ENABLE_SPI3 (0) -#define MICROPY_HW_ENABLE_CC3K (0) - -#define MICROPY_HW_LED1 (pin_C5) -#define MICROPY_HW_LED_OTYPE (GPIO_MODE_OUTPUT_PP) -#define MICROPY_HW_LED_ON(pin) (pin->gpio->PSOR = pin->pin_mask) -#define MICROPY_HW_LED_OFF(pin) (pin->gpio->PCOR = pin->pin_mask) - -#if 0 -// SD card detect switch -#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8) -#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) -#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) -#endif - -#define MICROPY_MATH_SQRT_ASM (1) - -#define MICROPY_MPHALPORT_H "teensy_hal.h" -#define MICROPY_PIN_DEFS_PORT_H "pin_defs_teensy.h" diff --git a/ports/teensy/pin_defs_teensy.c b/ports/teensy/pin_defs_teensy.c deleted file mode 100644 index e7af1e9697b1f..0000000000000 --- a/ports/teensy/pin_defs_teensy.c +++ /dev/null @@ -1,71 +0,0 @@ -#include -#include -#include "py/runtime.h" -#include "py/mphal.h" -#include "pin.h" - -// Returns the pin mode. This value returned by this macro should be one of: -// GPIO_MODE_INPUT, GPIO_MODE_OUTPUT_PP, GPIO_MODE_OUTPUT_OD, -// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG. - -uint32_t pin_get_mode(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return GPIO_MODE_ANALOG; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - uint32_t pcr = *port_pcr; - uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8; - if (af == 0) { - return GPIO_MODE_ANALOG; - } - if (af == 1) { - if (pin->gpio->PDDR & (1 << pin->pin)) { - if (pcr & PORT_PCR_ODE) { - return GPIO_MODE_OUTPUT_OD; - } - return GPIO_MODE_OUTPUT_PP; - } - return GPIO_MODE_INPUT; - } - - if (pcr & PORT_PCR_ODE) { - return GPIO_MODE_AF_OD; - } - return GPIO_MODE_AF_PP; -} - -// Returns the pin pullup/pulldown. The value returned by this macro should -// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN. - -uint32_t pin_get_pull(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return GPIO_NOPULL; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - - uint32_t pcr = *port_pcr; - uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8; - - // pull is only valid for digital modes (hence the af > 0 test) - - if (af > 0 && (pcr & PORT_PCR_PE) != 0) { - if (pcr & PORT_PCR_PS) { - return GPIO_PULLUP; - } - return GPIO_PULLDOWN; - } - return GPIO_NOPULL; -} - -// Returns the af (alternate function) index currently set for a pin. - -uint32_t pin_get_af(const pin_obj_t *pin) { - if (pin->gpio == NULL) { - // Analog only pin - return 0; - } - volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin); - return (*port_pcr & PORT_PCR_MUX_MASK) >> 8; -} diff --git a/ports/teensy/pin_defs_teensy.h b/ports/teensy/pin_defs_teensy.h deleted file mode 100644 index 54a6055f1a81f..0000000000000 --- a/ports/teensy/pin_defs_teensy.h +++ /dev/null @@ -1,49 +0,0 @@ -enum { - PORT_A, - PORT_B, - PORT_C, - PORT_D, - PORT_E, - PORT_Z, -}; - -enum { - AF_FN_FTM, - AF_FN_I2C, - AF_FN_UART, - AF_FN_SPI -}; - -enum { - AF_PIN_TYPE_FTM_CH0 = 0, - AF_PIN_TYPE_FTM_CH1, - AF_PIN_TYPE_FTM_CH2, - AF_PIN_TYPE_FTM_CH3, - AF_PIN_TYPE_FTM_CH4, - AF_PIN_TYPE_FTM_CH5, - AF_PIN_TYPE_FTM_CH6, - AF_PIN_TYPE_FTM_CH7, - AF_PIN_TYPE_FTM_QD_PHA, - AF_PIN_TYPE_FTM_QD_PHB, - - AF_PIN_TYPE_I2C_SDA = 0, - AF_PIN_TYPE_I2C_SCL, - - AF_PIN_TYPE_SPI_MOSI = 0, - AF_PIN_TYPE_SPI_MISO, - AF_PIN_TYPE_SPI_SCK, - AF_PIN_TYPE_SPI_NSS, - - AF_PIN_TYPE_UART_TX = 0, - AF_PIN_TYPE_UART_RX, - AF_PIN_TYPE_UART_CTS, - AF_PIN_TYPE_UART_RTS, -}; - -#define PIN_DEFS_PORT_AF_UNION \ - FTM_TypeDef *FTM; \ - I2C_TypeDef *I2C; \ - UART_TypeDef *UART; \ - SPI_TypeDef *SPI; - -typedef GPIO_TypeDef pin_gpio_t; diff --git a/ports/teensy/qstrdefsport.h b/ports/teensy/qstrdefsport.h deleted file mode 100644 index 3ba897069bf73..0000000000000 --- a/ports/teensy/qstrdefsport.h +++ /dev/null @@ -1 +0,0 @@ -// qstrs specific to this port diff --git a/ports/teensy/reg.c b/ports/teensy/reg.c deleted file mode 100644 index cbc427d876d40..0000000000000 --- a/ports/teensy/reg.c +++ /dev/null @@ -1,47 +0,0 @@ -#include -#include -#include "py/runtime.h" -#include "reg.h" - -#if MICROPY_REG - -mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_regs, uint n_args, const mp_obj_t *args) { - if (n_args == 0) { - // dump all regs - - for (mp_uint_t reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) { - printf(" %-8s @0x%08x = 0x%08lx\n", - reg->name, (mp_uint_t)base + reg->offset, *(uint32_t *)((uint8_t *)base + reg->offset)); - } - return mp_const_none; - } - - mp_uint_t addr = 0; - - if (MP_OBJ_IS_STR(args[0])) { - const char *name = mp_obj_str_get_str(args[0]); - mp_uint_t reg_idx; - for (reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) { - if (strcmp(name, reg->name) == 0) { - break; - } - } - if (reg_idx >= num_regs) { - printf("Unknown register: '%s'\n", name); - return mp_const_none; - } - addr = (mp_uint_t)base + reg->offset; - } else { - addr = (mp_uint_t)base + mp_obj_get_int(args[0]); - } - - if (n_args < 2) { - // get - printf("0x%08lx\n", *(uint32_t *)addr); - } else { - *(uint32_t *)addr = mp_obj_get_int(args[1]); - } - return mp_const_none; -} - -#endif diff --git a/ports/teensy/reg.h b/ports/teensy/reg.h deleted file mode 100644 index 0da6378ee7add..0000000000000 --- a/ports/teensy/reg.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_REG_H -#define MICROPY_INCLUDED_TEENSY_REG_H - -typedef struct { - const char *name; - mp_uint_t offset; -} reg_t; - -#define REG_ENTRY(st, name) { #name, offsetof(st, name) } - -mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_reg, uint n_args, const mp_obj_t *args); - -#endif // MICROPY_INCLUDED_TEENSY_REG_H diff --git a/ports/teensy/servo.c b/ports/teensy/servo.c deleted file mode 100644 index 262daaeb66fa6..0000000000000 --- a/ports/teensy/servo.c +++ /dev/null @@ -1,265 +0,0 @@ -#include -#include "misc.h" -#include "mpconfig.h" -#include "qstr.h" -#include "nlr.h" -#include "obj.h" -#include "servo.h" - -#include "Arduino.h" - -#define MAX_SERVOS 12 -#define INVALID_SERVO -1 - -#define MIN_PULSE_WIDTH 544 // the shortest pulse sent to a servo -#define MAX_PULSE_WIDTH 2400 // the longest pulse sent to a servo -#define DEFAULT_PULSE_WIDTH 1500 // default pulse width when servo is attached -#define REFRESH_INTERVAL 20000 // minumim time to refresh servos in microseconds - -#define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \ - | PDB_SC_CONT | PDB_SC_PRESCALER(2) | PDB_SC_MULT(0)) -#define PDB_PRESCALE 4 -#define usToTicks(us) ((us) * (F_BUS / 1000) / PDB_PRESCALE / 1000) -#define ticksToUs(ticks) ((ticks) * PDB_PRESCALE * 1000 / (F_BUS / 1000)) - -static uint16_t servo_active_mask = 0; -static uint16_t servo_allocated_mask = 0; -static uint8_t servo_pin[MAX_SERVOS]; -static uint16_t servo_ticks[MAX_SERVOS]; - -typedef struct _pyb_servo_obj_t { - mp_obj_base_t base; - uint servo_id; - uint min_usecs; - uint max_usecs; -} pyb_servo_obj_t; - -#define clamp(v, min_val, max_val) ((v) < (min_val) ? (min_val) : (v) > (max_val) ? (max_val) : (v)) - -static float map_uint_to_float(uint x, uint in_min, uint in_max, float out_min, float out_max) -{ - return (float)(x - in_min) * (out_max - out_min) / (float)(in_max - in_min) + (float)out_min; -} - -static uint map_float_to_uint(float x, float in_min, float in_max, uint out_min, uint out_max) -{ - return (int)((x - in_min) * (float)(out_max - out_min) / (in_max - in_min) + (float)out_min); -} - -static mp_obj_t servo_obj_attach(mp_obj_t self_in, mp_obj_t pin_obj) { - pyb_servo_obj_t *self = self_in; - uint pin = mp_obj_get_int(pin_obj); - if (pin > CORE_NUM_DIGITAL) { - goto pin_error; - } - - pinMode(pin, OUTPUT); - servo_pin[self->servo_id] = pin; - servo_active_mask |= (1 << self->servo_id); - if (!(SIM_SCGC6 & SIM_SCGC6_PDB)) { - SIM_SCGC6 |= SIM_SCGC6_PDB; // TODO: use bitband for atomic bitset - PDB0_MOD = 0xFFFF; - PDB0_CNT = 0; - PDB0_IDLY = 0; - PDB0_SC = PDB_CONFIG; - // TODO: maybe this should be a higher priority than most - // other interrupts (init all to some default?) - PDB0_SC = PDB_CONFIG | PDB_SC_SWTRIG; - } - NVIC_ENABLE_IRQ(IRQ_PDB); - return mp_const_none; - -pin_error: - nlr_raise(mp_obj_new_exception_msg_varg(MP_QSTR_ValueError, "pin %d does not exist", pin)); -} - -static mp_obj_t servo_obj_detach(mp_obj_t self_in) { - //pyb_servo_obj_t *self = self_in; - return mp_const_none; -} - -static mp_obj_t servo_obj_pin(mp_obj_t self_in) { - pyb_servo_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(servo_pin[self->servo_id]); -} - -static mp_obj_t servo_obj_min_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get min - return MP_OBJ_NEW_SMALL_INT(self->min_usecs); - } - // Set min - self->min_usecs = mp_obj_get_int(args[1]); - return mp_const_none; -} - -static mp_obj_t servo_obj_max_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get max - return MP_OBJ_NEW_SMALL_INT(self->max_usecs); - } - // Set max - self->max_usecs = mp_obj_get_int(args[1]); - return mp_const_none; -} - -static mp_obj_t servo_obj_angle(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - if (n_args == 1) { - // get - float angle = map_uint_to_float(servo_ticks[self->servo_id], - usToTicks(self->min_usecs), - usToTicks(self->max_usecs), - 0.0, 180.0); - return mp_obj_new_float(angle); - } - // Set - float angle = mp_obj_get_float(args[1]); - if (angle < 0.0F) { - angle = 0.0F; - } - if (angle > 180.0F) { - angle = 180.0F; - } - servo_ticks[self->servo_id] = map_float_to_uint(angle, - 0.0F, 180.0F, - usToTicks(self->min_usecs), - usToTicks(self->max_usecs)); - return mp_const_none; -} - -static mp_obj_t servo_obj_usecs(int n_args, const mp_obj_t *args) { - pyb_servo_obj_t *self = args[0]; - uint usecs; - if (n_args == 1) { - // get - return MP_OBJ_NEW_SMALL_INT(ticksToUs(servo_ticks[self->servo_id])); - } - // Set - usecs = mp_obj_get_int(args[1]); - - if (self->min_usecs < self->max_usecs) { - usecs = clamp(usecs, self->min_usecs, self->max_usecs); - } else { - usecs = clamp(usecs, self->max_usecs, self->min_usecs); - } - servo_ticks[self->servo_id] = usToTicks(usecs); - return mp_const_none; -} - -static mp_obj_t servo_obj_attached(mp_obj_t self_in) { - pyb_servo_obj_t *self = self_in; - uint attached = (servo_active_mask & (1 << self->servo_id)) != 0; - return MP_OBJ_NEW_SMALL_INT(attached); -} - -static void servo_obj_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_servo_obj_t *self = self_in; - (void)kind; - print(env, "", self->servo_id); -} - -static MP_DEFINE_CONST_FUN_OBJ_2(servo_obj_attach_obj, servo_obj_attach); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_detach_obj, servo_obj_detach); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_pin_obj, servo_obj_pin); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_min_usecs_obj, 1, 2, servo_obj_min_usecs); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_max_usecs_obj, 1, 2, servo_obj_max_usecs); -static MP_DEFINE_CONST_FUN_OBJ_1(servo_obj_attached_obj, servo_obj_attached); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_angle_obj, 1, 2, servo_obj_angle); -static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(servo_obj_usecs_obj, 1, 2, servo_obj_usecs); - -static const mp_method_t servo_methods[] = { - { "attach", &servo_obj_attach_obj }, - { "detach", &servo_obj_detach_obj }, - { "pin", &servo_obj_pin_obj }, - { "min_usecs", &servo_obj_min_usecs_obj }, - { "max_usecs", &servo_obj_max_usecs_obj }, - { "attached", &servo_obj_attached_obj }, - { "angle", &servo_obj_angle_obj }, - { "usecs", &servo_obj_usecs_obj }, - { NULL, NULL }, -}; - -/* - * Notes: - * - * ISR needs to know pin #, ticks - */ - -static const mp_obj_type_t servo_obj_type = { - { &mp_type_type }, - .name = MP_QSTR_Servo, - .print = servo_obj_print, - .methods = servo_methods, -}; - -/* servo = pyb.Servo(pin, [min_uecs, [max_usecs]]) */ - -mp_obj_t pyb_Servo(void) { - uint16_t mask; - pyb_servo_obj_t *self = m_new_obj(pyb_servo_obj_t); - self->base.type = &servo_obj_type; - self->min_usecs = MIN_PULSE_WIDTH; - self->max_usecs = MAX_PULSE_WIDTH; - - /* Find an unallocated servo id */ - - self->servo_id = 0; - for (mask=1; mask < (1<servo_id] = usToTicks(DEFAULT_PULSE_WIDTH); - return self; - } - self->servo_id++; - } - m_del_obj(pyb_servo_obj_t, self); - mp_raise_ValueError("No available servo ids"); - return mp_const_none; -} - -void pdb_isr(void) -{ - static int8_t channel = 0, channel_high = MAX_SERVOS; - static uint32_t tick_accum = 0; - uint32_t ticks; - int32_t wait_ticks; - - // first, if any channel was left high from the previous - // run, now is the time to shut it off - if (servo_active_mask & (1 << channel_high)) { - digitalWrite(servo_pin[channel_high], LOW); - channel_high = MAX_SERVOS; - } - // search for the next channel to turn on - while (channel < MAX_SERVOS) { - if (servo_active_mask & (1 << channel)) { - digitalWrite(servo_pin[channel], HIGH); - channel_high = channel; - ticks = servo_ticks[channel]; - tick_accum += ticks; - PDB0_IDLY += ticks; - PDB0_SC = PDB_CONFIG | PDB_SC_LDOK; - channel++; - return; - } - channel++; - } - // when all channels have output, wait for the - // minimum refresh interval - wait_ticks = usToTicks(REFRESH_INTERVAL) - tick_accum; - if (wait_ticks < usToTicks(100)) wait_ticks = usToTicks(100); - else if (wait_ticks > 60000) wait_ticks = 60000; - tick_accum += wait_ticks; - PDB0_IDLY += wait_ticks; - PDB0_SC = PDB_CONFIG | PDB_SC_LDOK; - // if this wait is enough to satisfy the refresh - // interval, next time begin again at channel zero - if (tick_accum >= usToTicks(REFRESH_INTERVAL)) { - tick_accum = 0; - channel = 0; - } -} diff --git a/ports/teensy/servo.h b/ports/teensy/servo.h deleted file mode 100644 index 1ad34353d9a01..0000000000000 --- a/ports/teensy/servo.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_SERVO_H -#define MICROPY_INCLUDED_TEENSY_SERVO_H - -void servo_init(void); - -extern const mp_obj_type_t pyb_servo_type; - -MP_DECLARE_CONST_FUN_OBJ_2(pyb_servo_set_obj); -MP_DECLARE_CONST_FUN_OBJ_2(pyb_pwm_set_obj); - -#endif // MICROPY_INCLUDED_TEENSY_SERVO_H diff --git a/ports/teensy/std.h b/ports/teensy/std.h deleted file mode 100644 index ef55d22ddc182..0000000000000 --- a/ports/teensy/std.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_STD_H -#define MICROPY_INCLUDED_TEENSY_STD_H - -typedef unsigned int size_t; - -void __assert_func(void); - -void *malloc(size_t n); -void free(void *ptr); -void *realloc(void *ptr, size_t n); - -void *memcpy(void *dest, const void *src, size_t n); -void *memmove(void *dest, const void *src, size_t n); -void *memset(void *s, int c, size_t n); - -size_t strlen(const char *str); -int strcmp(const char *s1, const char *s2); -int strncmp(const char *s1, const char *s2, size_t n); -char *strcpy(char *dest, const char *src); -char *strcat(char *dest, const char *src); - -int printf(const char *fmt, ...); -int snprintf(char *str, size_t size, const char *fmt, ...); - -#endif // MICROPY_INCLUDED_TEENSY_STD_H diff --git a/ports/teensy/teensy_hal.c b/ports/teensy/teensy_hal.c deleted file mode 100644 index 7ce82f1d2a778..0000000000000 --- a/ports/teensy/teensy_hal.c +++ /dev/null @@ -1,65 +0,0 @@ -#include -#include - -#include "py/runtime.h" -#include "py/mphal.h" -#include "usb.h" -#include "uart.h" -#include "Arduino.h" - -mp_uint_t mp_hal_ticks_ms(void) { - return millis(); -} - -void mp_hal_delay_ms(mp_uint_t ms) { - delay(ms); -} - -void mp_hal_set_interrupt_char(int c) { - // The teensy 3.1 usb stack doesn't currently have the notion of generating - // an exception when a certain character is received. That just means that - // you can't press Control-C and get your python script to stop. -} - -int mp_hal_stdin_rx_chr(void) { - for (;;) { - byte c; - if (usb_vcp_recv_byte(&c) != 0) { - return c; - } else if (MP_STATE_PORT(pyb_stdio_uart) != NULL && uart_rx_any(MP_STATE_PORT(pyb_stdio_uart))) { - return uart_rx_char(MP_STATE_PORT(pyb_stdio_uart)); - } - __WFI(); - } -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - uart_tx_strn(MP_STATE_PORT(pyb_stdio_uart), str, len); - } - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn(str, len); - } -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - // send stdout to UART and USB CDC VCP - if (MP_STATE_PORT(pyb_stdio_uart) != NULL) { - void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len); - uart_tx_strn_cooked(MP_STATE_PORT(pyb_stdio_uart), str, len); - } - if (usb_vcp_is_enabled()) { - usb_vcp_send_strn_cooked(str, len); - } -} - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) { -} - -void extint_register_pin(const void *pin, uint32_t mode, int hard_irq, mp_obj_t callback_obj) { - mp_raise_NotImplementedError(NULL); -} diff --git a/ports/teensy/teensy_hal.h b/ports/teensy/teensy_hal.h deleted file mode 100644 index 162effa85ce64..0000000000000 --- a/ports/teensy/teensy_hal.h +++ /dev/null @@ -1,128 +0,0 @@ -#include -#include "hal_ftm.h" - -#ifdef USE_FULL_ASSERT - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#define HAL_NVIC_EnableIRQ(irq) NVIC_ENABLE_IRQ(irq) - -#define GPIOA ((GPIO_TypeDef *)&GPIOA_PDOR) -#define GPIOB ((GPIO_TypeDef *)&GPIOB_PDOR) -#define GPIOC ((GPIO_TypeDef *)&GPIOC_PDOR) -#define GPIOD ((GPIO_TypeDef *)&GPIOD_PDOR) -#define GPIOE ((GPIO_TypeDef *)&GPIOE_PDOR) -#define GPIOZ ((GPIO_TypeDef *)NULL) - -#define I2C0 ((I2C_TypeDef *)0x40066000) -#define I2C1 ((I2C_TypeDef *)0x40067000) - -#undef SPI0 -#define SPI0 ((SPI_TypeDef *)0x4002C000) -#define SPI1 ((SPI_TypeDef *)0x4002D000) - -#define UART0 ((UART_TypeDef *)&UART0_BDH) -#define UART1 ((UART_TypeDef *)&UART1_BDH) -#define UART2 ((UART_TypeDef *)&UART2_BDH) - -typedef struct { - uint32_t dummy; -} I2C_TypeDef; - -typedef struct { - uint32_t dummy; -} UART_TypeDef; - -typedef struct { - uint32_t dummy; -} SPI_TypeDef; - -typedef struct { - volatile uint32_t PDOR; // Output register - volatile uint32_t PSOR; // Set output register - volatile uint32_t PCOR; // Clear output register - volatile uint32_t PTOR; // Toggle output register - volatile uint32_t PDIR; // Data Input register - volatile uint32_t PDDR; // Data Direction register -} GPIO_TypeDef; - -#define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) // Indicates OD - -#define GPIO_MODE_INPUT ((uint32_t)0x00000000) -#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) -#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) -#define GPIO_MODE_AF_PP ((uint32_t)0x00000002) -#define GPIO_MODE_AF_OD ((uint32_t)0x00000012) -#define GPIO_MODE_ANALOG ((uint32_t)0x00000003) -#define GPIO_MODE_IT_RISING ((uint32_t)1) -#define GPIO_MODE_IT_FALLING ((uint32_t)2) - -#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ - ((MODE) == GPIO_MODE_OUTPUT_PP) ||\ - ((MODE) == GPIO_MODE_OUTPUT_OD) ||\ - ((MODE) == GPIO_MODE_AF_PP) ||\ - ((MODE) == GPIO_MODE_AF_OD) ||\ - ((MODE) == GPIO_MODE_ANALOG)) - -#define GPIO_NOPULL ((uint32_t)0) -#define GPIO_PULLUP ((uint32_t)1) -#define GPIO_PULLDOWN ((uint32_t)2) - -#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ - ((PULL) == GPIO_PULLDOWN)) - -#define GPIO_SPEED_LOW ((uint32_t)0) -#define GPIO_SPEED_MEDIUM ((uint32_t)1) -#define GPIO_SPEED_FAST ((uint32_t)2) -#define GPIO_SPEED_HIGH ((uint32_t)3) - -#define IS_GPIO_AF(af) ((af) >= 0 && (af) <= 7) - -typedef struct { - uint32_t Pin; - uint32_t Mode; - uint32_t Pull; - uint32_t Speed; - uint32_t Alternate; -} GPIO_InitTypeDef; - -#define GPIO_PORT_TO_PORT_NUM(GPIOx) \ - ((&GPIOx->PDOR - &GPIOA_PDOR) / (&GPIOB_PDOR - &GPIOA_PDOR)) - -#define GPIO_PIN_TO_PORT_PCR(GPIOx, pin) \ - (&PORTA_PCR0 + (GPIO_PORT_TO_PORT_NUM(GPIOx) * 0x400) + (pin)) - -#define GPIO_AF2_I2C0 2 -#define GPIO_AF2_I2C1 2 -#define GPIO_AF2_SPI0 2 -#define GPIO_AF3_FTM0 3 -#define GPIO_AF3_FTM1 3 -#define GPIO_AF3_FTM2 3 -#define GPIO_AF3_UART0 3 -#define GPIO_AF3_UART1 3 -#define GPIO_AF3_UART2 3 -#define GPIO_AF4_FTM0 4 -#define GPIO_AF6_FTM1 6 -#define GPIO_AF6_FTM2 6 -#define GPIO_AF6_I2C1 6 -#define GPIO_AF7_FTM1 7 - -__attribute__(( always_inline )) static inline void __WFI(void) { - __asm volatile ("wfi"); -} - -void mp_hal_set_interrupt_char(int c); - -void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio); - -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *init); - -struct _pin_obj_t; -#define mp_hal_pin_obj_t const struct _pin_obj_t* -#define mp_hal_pin_high(p) (((p)->gpio->PSOR) = (p)->pin_mask) -#define mp_hal_pin_low(p) (((p)->gpio->PCOR) = (p)->pin_mask) -#define mp_hal_pin_read(p) (((p)->gpio->PDIR >> (p)->pin) & 1) -#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) diff --git a/ports/teensy/teensy_pins.csv b/ports/teensy/teensy_pins.csv deleted file mode 100644 index 10887e212014e..0000000000000 --- a/ports/teensy/teensy_pins.csv +++ /dev/null @@ -1,56 +0,0 @@ -D0,PTB16 -D1,PTB17 -D2,PTD0 -D3,PTA12 -D4,PTA13 -D5,PTD7 -D6,PTD4 -D7,PTD2 -D8,PTD3 -D9,PTC3 -D10,PTC4 -D11,PTC6 -D12,PTC7 -D13,PTC5 -D14,PTD1 -D15,PTC0 -D16,PTB0 -D17,PTB1 -D18,PTB3 -D19,PTB2 -D20,PTD5 -D21,PTD6 -D22,PTC1 -D23,PTC2 -D24,PTA5 -D25,PTB19 -D26,PTE1 -D27,PTC9 -D28,PTC8 -D29,PTC10 -D30,PTC11 -D31,PTE0 -D32,PTB18 -D33,PTA4 -A0,PTD1 -A1,PTC0 -A2,PTB0 -A3,PTB1 -A4,PTB3 -A5,PTB2 -A6,PTD5 -A7,PTD6 -A8,PTC1 -A9,PTC2 -A10,PTZ0 -A11,PTZ1 -A12,PTZ2 -A13,PTZ3 -A14,PTZ5 -A15,PTE1 -A16,PTC9 -A17,PTC8 -A18,PTC10 -A19,PTC11 -A20,PTE0 -LED,PTC5 diff --git a/ports/teensy/timer.c b/ports/teensy/timer.c deleted file mode 100644 index b823e6c3b9c95..0000000000000 --- a/ports/teensy/timer.c +++ /dev/null @@ -1,991 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "pin.h" -#include "reg.h" -#include "timer.h" - -typedef enum { - CHANNEL_MODE_PWM_NORMAL, - CHANNEL_MODE_PWM_INVERTED, - CHANNEL_MODE_OC_TIMING, - CHANNEL_MODE_OC_ACTIVE, - CHANNEL_MODE_OC_INACTIVE, - CHANNEL_MODE_OC_TOGGLE, -// CHANNEL_MODE_OC_FORCED_ACTIVE, -// CHANNEL_MODE_OC_FORCED_INACTIVE, - CHANNEL_MODE_IC, -} pyb_channel_mode; - -STATIC const struct { - qstr name; - uint32_t oc_mode; -} channel_mode_info[] = { - { MP_QSTR_PWM, FTM_OCMODE_PWM1 }, - { MP_QSTR_PWM_INVERTED, FTM_OCMODE_PWM2 }, - { MP_QSTR_OC_TIMING, FTM_OCMODE_TIMING }, - { MP_QSTR_OC_ACTIVE, FTM_OCMODE_ACTIVE }, - { MP_QSTR_OC_INACTIVE, FTM_OCMODE_INACTIVE }, - { MP_QSTR_OC_TOGGLE, FTM_OCMODE_TOGGLE }, -// { MP_QSTR_OC_FORCED_ACTIVE, FTM_OCMODE_FORCED_ACTIVE }, -// { MP_QSTR_OC_FORCED_INACTIVE, FTM_OCMODE_FORCED_INACTIVE }, - { MP_QSTR_IC, 0 }, -}; - -struct _pyb_timer_obj_t; - -typedef struct _pyb_timer_channel_obj_t { - mp_obj_base_t base; - struct _pyb_timer_obj_t *timer; - uint8_t channel; - uint8_t mode; - mp_obj_t callback; - struct _pyb_timer_channel_obj_t *next; -} pyb_timer_channel_obj_t; - -typedef struct _pyb_timer_obj_t { - mp_obj_base_t base; - uint8_t tim_id; - uint8_t irqn; - mp_obj_t callback; - FTM_HandleTypeDef ftm; - pyb_timer_channel_obj_t *channel; -} pyb_timer_obj_t; - -// Used to do callbacks to Python code on interrupt -STATIC pyb_timer_obj_t *pyb_timer_obj_all[3]; -#define PYB_TIMER_OBJ_ALL_NUM MP_ARRAY_SIZE(pyb_timer_obj_all) - -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in); -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback); -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback); - -void timer_init0(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_all[i] = NULL; - } -} - -// unregister all interrupt sources -void timer_deinit(void) { - for (uint i = 0; i < PYB_TIMER_OBJ_ALL_NUM; i++) { - pyb_timer_obj_t *tim = pyb_timer_obj_all[i]; - if (tim != NULL) { - pyb_timer_deinit(tim); - } - } -} - -mp_uint_t get_prescaler_shift(mp_int_t prescaler) { - mp_uint_t prescaler_shift; - for (prescaler_shift = 0; prescaler_shift < 8; prescaler_shift++) { - if (prescaler == (1 << prescaler_shift)) { - return prescaler_shift; - } - } - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "prescaler must be a power of 2 between 1 and 128, not %d", prescaler)); -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC const mp_obj_type_t pyb_timer_channel_type; - -// Helper function for determining the period used for calculating percent -STATIC uint32_t compute_period(pyb_timer_obj_t *self) { - // In center mode, compare == period corresponds to 100% - // In edge mode, compare == (period + 1) corresponds to 100% - FTM_TypeDef *FTMx = self->ftm.Instance; - uint32_t period = (FTMx->MOD & 0xffff); - if ((FTMx->SC & FTM_SC_CPWMS) == 0) { - // Edge mode - period++; - } - return period; -} - -// Helper function to compute PWM value from timer period and percent value. -// 'val' can be an int or a float between 0 and 100 (out of range values are -// clamped). -STATIC uint32_t compute_pwm_value_from_percent(uint32_t period, mp_obj_t percent_in) { - uint32_t cmp; - if (0) { - #if MICROPY_PY_BUILTINS_FLOAT - } else if (MP_OBJ_IS_TYPE(percent_in, &mp_type_float)) { - float percent = mp_obj_get_float(percent_in); - if (percent <= 0.0) { - cmp = 0; - } else if (percent >= 100.0) { - cmp = period; - } else { - cmp = percent / 100.0 * ((float)period); - } - #endif - } else { - mp_int_t percent = mp_obj_get_int(percent_in); - if (percent <= 0) { - cmp = 0; - } else if (percent >= 100) { - cmp = period; - } else { - cmp = ((uint32_t)percent * period) / 100; - } - } - return cmp; -} - -// Helper function to compute percentage from timer perion and PWM value. -STATIC mp_obj_t compute_percent_from_pwm_value(uint32_t period, uint32_t cmp) { - #if MICROPY_PY_BUILTINS_FLOAT - float percent = (float)cmp * 100.0 / (float)period; - if (cmp >= period) { - percent = 100.0; - } else { - percent = (float)cmp * 100.0 / (float)period; - } - return mp_obj_new_float(percent); - #else - mp_int_t percent; - if (cmp >= period) { - percent = 100; - } else { - percent = cmp * 100 / period; - } - return mp_obj_new_int(percent); - #endif -} - -STATIC void pyb_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_obj_t *self = self_in; - - if (self->ftm.State == HAL_FTM_STATE_RESET) { - mp_printf(print, "Timer(%u)", self->tim_id); - } else { - mp_printf(print, "Timer(%u, prescaler=%u, period=%u, mode=%s)", - self->tim_id, - 1 << (self->ftm.Instance->SC & 7), - self->ftm.Instance->MOD & 0xffff, - self->ftm.Init.CounterMode == FTM_COUNTERMODE_UP ? "UP" : "CENTER"); - } -} - -/// \method init(*, freq, prescaler, period) -/// Initialise the timer. Initialisation must be either by frequency (in Hz) -/// or by prescaler and period: -/// -/// tim.init(freq=100) # set the timer to trigger at 100Hz -/// tim.init(prescaler=83, period=999) # set the prescaler and period directly -/// -/// Keyword arguments: -/// -/// - `freq` - specifies the periodic frequency of the timer. You migh also -/// view this as the frequency with which the timer goes through -/// one complete cycle. -/// -/// - `prescaler` 1, 2, 4, 8 16 32, 64 or 128 - specifies the value to be loaded into the -/// timer's prescaler. The timer clock source is divided by -/// (`prescaler`) to arrive at the timer clock. -/// -/// - `period` [0-0xffff] - Specifies the value to be loaded into the timer's -/// Modulo Register (MOD). This determines the period of the timer (i.e. -/// when the counter cycles). The timer counter will roll-over after -/// `period` timer clock cycles. In center mode, a compare register > 0x7fff -/// doesn't seem to work properly, so keep this in mind. -/// -/// - `mode` can be one of: -/// - `Timer.UP` - configures the timer to count from 0 to MOD (default) -/// - `Timer.CENTER` - confgures the timer to count from 0 to MOD and -/// then back down to 0. -/// -/// - `callback` - as per Timer.callback() -/// -/// You must either specify freq or both of period and prescaler. -STATIC const mp_arg_t pyb_timer_init_args[] = { - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, - { MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = FTM_COUNTERMODE_UP} }, - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; -#define PYB_TIMER_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_init_args) - -STATIC mp_obj_t pyb_timer_init_helper(pyb_timer_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t vals[PYB_TIMER_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, args, kw_args, PYB_TIMER_INIT_NUM_ARGS, pyb_timer_init_args, vals); - - FTM_HandleTypeDef *ftm = &self->ftm; - - // set the TIM configuration values - FTM_Base_InitTypeDef *init = &ftm->Init; - - if (vals[0].u_int != 0xffffffff) { - // set prescaler and period from frequency - - if (vals[0].u_int == 0) { - mp_raise_ValueError("can't have 0 frequency"); - } - - uint32_t period = MAX(1, F_BUS / vals[0].u_int); - uint32_t prescaler_shift = 0; - while (period > 0xffff && prescaler_shift < 7) { - period >>= 1; - prescaler_shift++; - } - if (period > 0xffff) { - period = 0xffff; - } - init->PrescalerShift = prescaler_shift; - init->Period = period; - } else if (vals[1].u_int != 0xffffffff && vals[2].u_int != 0xffffffff) { - // set prescaler and period directly - init->PrescalerShift = get_prescaler_shift(vals[1].u_int); - init->Period = vals[2].u_int; - if (!IS_FTM_PERIOD(init->Period)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "period must be between 0 and 65535, not %d", init->Period)); - } - } else { - mp_raise_TypeError("must specify either freq, or prescaler and period"); - } - - init->CounterMode = vals[3].u_int; - if (!IS_FTM_COUNTERMODE(init->CounterMode)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "invalid counter mode: %d", init->CounterMode)); - } - - // Currently core/mk20dx128.c sets SIM_SCGC6_FTM0, SIM_SCGC6_FTM1, SIM_SCGC3_FTM2 - // so we don't need to do it here. - - NVIC_SET_PRIORITY(self->irqn, 0xe); // next-to lowest priority - - HAL_FTM_Base_Init(ftm); - if (vals[4].u_obj == mp_const_none) { - HAL_FTM_Base_Start(ftm); - } else { - pyb_timer_callback(self, vals[4].u_obj); - } - - return mp_const_none; -} - -/// \classmethod \constructor(id, ...) -/// Construct a new timer object of the given id. If additional -/// arguments are given, then the timer is initialised by `init(...)`. -/// `id` can be 1 to 14, excluding 3. -STATIC mp_obj_t pyb_timer_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create new Timer object - pyb_timer_obj_t *tim = m_new_obj(pyb_timer_obj_t); - memset(tim, 0, sizeof(*tim)); - - tim->base.type = &pyb_timer_type; - tim->callback = mp_const_none; - tim->channel = NULL; - - // get FTM number - tim->tim_id = mp_obj_get_int(args[0]); - - switch (tim->tim_id) { - case 0: tim->ftm.Instance = FTM0; tim->irqn = IRQ_FTM0; break; - case 1: tim->ftm.Instance = FTM1; tim->irqn = IRQ_FTM1; break; - case 2: tim->ftm.Instance = FTM2; tim->irqn = IRQ_FTM2; break; - default: nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Timer %d does not exist", tim->tim_id)); - } - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_timer_init_helper(tim, n_args - 1, args + 1, &kw_args); - } - - // set the global variable for interrupt callbacks - if (tim->tim_id < PYB_TIMER_OBJ_ALL_NUM) { - pyb_timer_obj_all[tim->tim_id] = tim; - } - - return (mp_obj_t)tim; -} - -STATIC mp_obj_t pyb_timer_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_timer_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_init_obj, 1, pyb_timer_init); - -/// \method deinit() -/// Deinitialises the timer. -/// -/// Disables the callback (and the associated irq). -/// Disables any channel callbacks (and the associated irq). -/// Stops the timer, and disables the timer peripheral. -STATIC mp_obj_t pyb_timer_deinit(mp_obj_t self_in) { - pyb_timer_obj_t *self = self_in; - - // Disable the base interrupt - pyb_timer_callback(self_in, mp_const_none); - - pyb_timer_channel_obj_t *chan = self->channel; - self->channel = NULL; - - // Disable the channel interrupts - while (chan != NULL) { - pyb_timer_channel_callback(chan, mp_const_none); - pyb_timer_channel_obj_t *prev_chan = chan; - chan = chan->next; - prev_chan->next = NULL; - } - - HAL_FTM_Base_DeInit(&self->ftm); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_timer_deinit_obj, pyb_timer_deinit); - -/// \method channel(channel, mode, ...) -/// -/// If only a channel number is passed, then a previously initialized channel -/// object is returned (or `None` if there is no previous channel). -/// -/// Othwerwise, a TimerChannel object is initialized and returned. -/// -/// Each channel can be configured to perform pwm, output compare, or -/// input capture. All channels share the same underlying timer, which means -/// that they share the same timer clock. -/// -/// Keyword arguments: -/// -/// - `mode` can be one of: -/// - `Timer.PWM` - configure the timer in PWM mode (active high). -/// - `Timer.PWM_INVERTED` - configure the timer in PWM mode (active low). -/// - `Timer.OC_TIMING` - indicates that no pin is driven. -/// - `Timer.OC_ACTIVE` - the pin will be made active when a compare -/// match occurs (active is determined by polarity) -/// - `Timer.OC_INACTIVE` - the pin will be made inactive when a compare -/// match occurs. -/// - `Timer.OC_TOGGLE` - the pin will be toggled when an compare match occurs. -/// - `Timer.IC` - configure the timer in Input Capture mode. -/// -/// - `callback` - as per TimerChannel.callback() -/// -/// - `pin` None (the default) or a Pin object. If specified (and not None) -/// this will cause the alternate function of the the indicated pin -/// to be configured for this timer channel. An error will be raised if -/// the pin doesn't support any alternate functions for this timer channel. -/// -/// Keyword arguments for Timer.PWM modes: -/// -/// - `pulse_width` - determines the initial pulse width value to use. -/// - `pulse_width_percent` - determines the initial pulse width percentage to use. -/// -/// Keyword arguments for Timer.OC modes: -/// -/// - `compare` - determines the initial value of the compare register. -/// -/// - `polarity` can be one of: -/// - `Timer.HIGH` - output is active high -/// - `Timer.LOW` - output is acive low -/// -/// Optional keyword arguments for Timer.IC modes: -/// -/// - `polarity` can be one of: -/// - `Timer.RISING` - captures on rising edge. -/// - `Timer.FALLING` - captures on falling edge. -/// - `Timer.BOTH` - captures on both edges. -/// -/// PWM Example: -/// -/// timer = pyb.Timer(0, prescaler=128, period=37500, counter_mode=pyb.Timer.COUNTER_MODE_CENTER) -/// ch0 = t0.channel(0, pyb.Timer.PWM, pin=pyb.Pin.board.D22, pulse_width=(t0.period() + 1) // 4) -/// ch1 = t0.channel(1, pyb.Timer.PWM, pin=pyb.Pin.board.D23, pulse_width=(t0.period() + 1) // 2) -STATIC const mp_arg_t pyb_timer_channel_args[] = { - { MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pin, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_pulse_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_pulse_width_percent, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_compare, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} }, -}; -#define PYB_TIMER_CHANNEL_NUM_ARGS MP_ARRAY_SIZE(pyb_timer_channel_args) - -STATIC mp_obj_t pyb_timer_channel(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - pyb_timer_obj_t *self = args[0]; - mp_int_t channel = mp_obj_get_int(args[1]); - - if (channel < 0 || channel > 7) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid channel (%d)", channel)); - } - - pyb_timer_channel_obj_t *chan = self->channel; - pyb_timer_channel_obj_t *prev_chan = NULL; - - while (chan != NULL) { - if (chan->channel == channel) { - break; - } - prev_chan = chan; - chan = chan->next; - } - - // If only the channel number is given return the previously allocated - // channel (or None if no previous channel). - if (n_args == 2) { - if (chan) { - return chan; - } - return mp_const_none; - } - - // If there was already a channel, then remove it from the list. Note that - // the order we do things here is important so as to appear atomic to - // the IRQ handler. - if (chan) { - // Turn off any IRQ associated with the channel. - pyb_timer_channel_callback(chan, mp_const_none); - - // Unlink the channel from the list. - if (prev_chan) { - prev_chan->next = chan->next; - } - self->channel = chan->next; - chan->next = NULL; - } - - // Allocate and initialize a new channel - mp_arg_val_t vals[PYB_TIMER_CHANNEL_NUM_ARGS]; - mp_arg_parse_all(n_args - 3, args + 3, kw_args, PYB_TIMER_CHANNEL_NUM_ARGS, pyb_timer_channel_args, vals); - - chan = m_new_obj(pyb_timer_channel_obj_t); - memset(chan, 0, sizeof(*chan)); - chan->base.type = &pyb_timer_channel_type; - chan->timer = self; - chan->channel = channel; - chan->mode = mp_obj_get_int(args[2]); - chan->callback = vals[0].u_obj; - - mp_obj_t pin_obj = vals[1].u_obj; - if (pin_obj != mp_const_none) { - if (!MP_OBJ_IS_TYPE(pin_obj, &pin_type)) { - mp_raise_ValueError("pin argument needs to be be a Pin type"); - } - const pin_obj_t *pin = pin_obj; - const pin_af_obj_t *af = pin_find_af(pin, AF_FN_FTM, self->tim_id); - if (af == NULL) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %s doesn't have an af for TIM%d", qstr_str(pin->name), self->tim_id)); - } - // pin.init(mode=AF_PP, af=idx) - const mp_obj_t args[6] = { - (mp_obj_t)&pin_init_obj, - pin_obj, - MP_OBJ_NEW_QSTR(MP_QSTR_mode), MP_OBJ_NEW_SMALL_INT(GPIO_MODE_AF_PP), - MP_OBJ_NEW_QSTR(MP_QSTR_af), MP_OBJ_NEW_SMALL_INT(af->idx) - }; - mp_call_method_n_kw(0, 2, args); - } - - // Link the channel to the timer before we turn the channel on. - // Note that this needs to appear atomic to the IRQ handler (the write - // to self->channel is atomic, so we're good, but I thought I'd mention - // in case this was ever changed in the future). - chan->next = self->channel; - self->channel = chan; - - switch (chan->mode) { - - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: { - FTM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - if (vals[3].u_obj != mp_const_none) { - // pulse width ratio given - uint32_t period = compute_period(self); - oc_config.Pulse = compute_pwm_value_from_percent(period, vals[3].u_obj); - } else { - // use absolute pulse width value (defaults to 0 if nothing given) - oc_config.Pulse = vals[2].u_int; - } - oc_config.OCPolarity = FTM_OCPOLARITY_HIGH; - - HAL_FTM_PWM_ConfigChannel(&self->ftm, &oc_config, channel); - if (chan->callback == mp_const_none) { - HAL_FTM_PWM_Start(&self->ftm, channel); - } else { - HAL_FTM_PWM_Start_IT(&self->ftm, channel); - } - break; - } - - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: { - FTM_OC_InitTypeDef oc_config; - oc_config.OCMode = channel_mode_info[chan->mode].oc_mode; - oc_config.Pulse = vals[4].u_int; - oc_config.OCPolarity = vals[5].u_int; - if (oc_config.OCPolarity == 0xffffffff) { - oc_config.OCPolarity = FTM_OCPOLARITY_HIGH; - } - - if (!IS_FTM_OC_POLARITY(oc_config.OCPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid polarity (%d)", oc_config.OCPolarity)); - } - HAL_FTM_OC_ConfigChannel(&self->ftm, &oc_config, channel); - if (chan->callback == mp_const_none) { - HAL_FTM_OC_Start(&self->ftm, channel); - } else { - HAL_FTM_OC_Start_IT(&self->ftm, channel); - } - break; - } - - case CHANNEL_MODE_IC: { - FTM_IC_InitTypeDef ic_config; - - ic_config.ICPolarity = vals[5].u_int; - if (ic_config.ICPolarity == 0xffffffff) { - ic_config.ICPolarity = FTM_ICPOLARITY_RISING; - } - - if (!IS_FTM_IC_POLARITY(ic_config.ICPolarity)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid polarity (%d)", ic_config.ICPolarity)); - } - HAL_FTM_IC_ConfigChannel(&self->ftm, &ic_config, chan->channel); - if (chan->callback == mp_const_none) { - HAL_FTM_IC_Start(&self->ftm, channel); - } else { - HAL_FTM_IC_Start_IT(&self->ftm, channel); - } - break; - } - - default: - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Invalid mode (%d)", chan->mode)); - } - - return chan; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_timer_channel_obj, 2, pyb_timer_channel); - -/// \method counter([value]) -/// Get or set the timer counter. -STATIC mp_obj_t pyb_timer_counter(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->ftm.Instance->CNT); - } - // set - In order to write to CNT we need to set CNTIN - self->ftm.Instance->CNTIN = mp_obj_get_int(args[1]); - self->ftm.Instance->CNT = 0; // write any value to load CNTIN into CNT - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_counter_obj, 1, 2, pyb_timer_counter); - -/// \method prescaler([value]) -/// Get or set the prescaler for the timer. -STATIC mp_obj_t pyb_timer_prescaler(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(1 << (self->ftm.Instance->SC & 7)); - } - - // set - mp_uint_t prescaler_shift = get_prescaler_shift(mp_obj_get_int(args[1])); - - mp_uint_t sc = self->ftm.Instance->SC; - sc &= ~7; - sc |= FTM_SC_PS(prescaler_shift); - self->ftm.Instance->SC = sc; - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_prescaler_obj, 1, 2, pyb_timer_prescaler); - -/// \method period([value]) -/// Get or set the period of the timer. -STATIC mp_obj_t pyb_timer_period(size_t n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - if (n_args == 1) { - // get - return mp_obj_new_int(self->ftm.Instance->MOD & 0xffff); - } - - // set - mp_int_t period = mp_obj_get_int(args[1]) & 0xffff; - self->ftm.Instance->CNT = 0; - self->ftm.Instance->MOD = period; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_period_obj, 1, 2, pyb_timer_period); - -/// \method callback(fun) -/// Set the function to be called when the timer triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_FTM_DISABLE_TOF_IT(&self->ftm); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - HAL_NVIC_EnableIRQ(self->irqn); - // start timer, so that it interrupts on overflow - HAL_FTM_Base_Start_IT(&self->ftm); - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_callback_obj, pyb_timer_callback); - -#if MICROPY_TIMER_REG -reg_t timer_reg[] = { - REG_ENTRY(FTM_TypeDef, SC), - REG_ENTRY(FTM_TypeDef, CNT), - REG_ENTRY(FTM_TypeDef, MOD), - REG_ENTRY(FTM_TypeDef, CNTIN), - REG_ENTRY(FTM_TypeDef, STATUS), - REG_ENTRY(FTM_TypeDef, MODE), - REG_ENTRY(FTM_TypeDef, SYNC), - REG_ENTRY(FTM_TypeDef, OUTINIT), - REG_ENTRY(FTM_TypeDef, OUTMASK), - REG_ENTRY(FTM_TypeDef, COMBINE), - REG_ENTRY(FTM_TypeDef, DEADTIME), - REG_ENTRY(FTM_TypeDef, EXTTRIG), - REG_ENTRY(FTM_TypeDef, POL), - REG_ENTRY(FTM_TypeDef, FMS), - REG_ENTRY(FTM_TypeDef, FILTER), - REG_ENTRY(FTM_TypeDef, FLTCTRL), - REG_ENTRY(FTM_TypeDef, QDCTRL), - REG_ENTRY(FTM_TypeDef, CONF), - REG_ENTRY(FTM_TypeDef, FLTPOL), - REG_ENTRY(FTM_TypeDef, SYNCONF), - REG_ENTRY(FTM_TypeDef, INVCTRL), - REG_ENTRY(FTM_TypeDef, SWOCTRL), - REG_ENTRY(FTM_TypeDef, PWMLOAD), -}; - -mp_obj_t pyb_timer_reg(uint n_args, const mp_obj_t *args) { - pyb_timer_obj_t *self = args[0]; - return reg_cmd(self->ftm.Instance, timer_reg, MP_ARRAY_SIZE(timer_reg), n_args - 1, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_reg_obj, 1, 3, pyb_timer_reg); -#endif // MICROPY_TIMER_REG - -STATIC const mp_rom_map_elem_t pyb_timer_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_timer_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_timer_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&pyb_timer_channel_obj) }, - { MP_ROM_QSTR(MP_QSTR_counter), MP_ROM_PTR(&pyb_timer_counter_obj) }, - { MP_ROM_QSTR(MP_QSTR_prescaler), MP_ROM_PTR(&pyb_timer_prescaler_obj) }, - { MP_ROM_QSTR(MP_QSTR_period), MP_ROM_PTR(&pyb_timer_period_obj) }, - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_callback_obj) }, -#if MICROPY_TIMER_REG - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_reg_obj) }, -#endif - { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_INT(FTM_COUNTERMODE_UP) }, - { MP_ROM_QSTR(MP_QSTR_CENTER), MP_ROM_INT(FTM_COUNTERMODE_CENTER) }, - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_INT(CHANNEL_MODE_PWM_NORMAL) }, - { MP_ROM_QSTR(MP_QSTR_PWM_INVERTED), MP_ROM_INT(CHANNEL_MODE_PWM_INVERTED) }, - { MP_ROM_QSTR(MP_QSTR_OC_TIMING), MP_ROM_INT(CHANNEL_MODE_OC_TIMING) }, - { MP_ROM_QSTR(MP_QSTR_OC_ACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_ACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_INACTIVE), MP_ROM_INT(CHANNEL_MODE_OC_INACTIVE) }, - { MP_ROM_QSTR(MP_QSTR_OC_TOGGLE), MP_ROM_INT(CHANNEL_MODE_OC_TOGGLE) }, - { MP_ROM_QSTR(MP_QSTR_IC), MP_ROM_INT(CHANNEL_MODE_IC) }, - { MP_ROM_QSTR(MP_QSTR_HIGH), MP_ROM_INT(FTM_OCPOLARITY_HIGH) }, - { MP_ROM_QSTR(MP_QSTR_LOW), MP_ROM_INT(FTM_OCPOLARITY_LOW) }, - { MP_ROM_QSTR(MP_QSTR_RISING), MP_ROM_INT(FTM_ICPOLARITY_RISING) }, - { MP_ROM_QSTR(MP_QSTR_FALLING), MP_ROM_INT(FTM_ICPOLARITY_FALLING) }, - { MP_ROM_QSTR(MP_QSTR_BOTH), MP_ROM_INT(FTM_ICPOLARITY_BOTH) }, -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_locals_dict, pyb_timer_locals_dict_table); - -const mp_obj_type_t pyb_timer_type = { - { &mp_type_type }, - .name = MP_QSTR_Timer, - .print = pyb_timer_print, - .make_new = pyb_timer_make_new, - .locals_dict = (mp_obj_t)&pyb_timer_locals_dict, -}; - -/// \moduleref pyb -/// \class TimerChannel - setup a channel for a timer. -/// -/// Timer channels are used to generate/capture a signal using a timer. -/// -/// TimerChannel objects are created using the Timer.channel() method. -STATIC void pyb_timer_channel_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_timer_channel_obj_t *self = self_in; - - mp_printf(print, "TimerChannel(timer=%u, channel=%u, mode=%s)", - self->timer->tim_id, - self->channel, - qstr_str(channel_mode_info[self->mode].name)); -} - -/// \method capture([value]) -/// Get or set the capture value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// capture is the logical name to use when the channel is in input capture mode. - -/// \method compare([value]) -/// Get or set the compare value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// compare is the logical name to use when the channel is in output compare mode. - -/// \method pulse_width([value]) -/// Get or set the pulse width value associated with a channel. -/// capture, compare, and pulse_width are all aliases for the same function. -/// pulse_width is the logical name to use when the channel is in PWM mode. -/// -/// In edge aligned mode, a pulse_width of `period + 1` corresponds to a duty cycle of 100% -/// In center aligned mode, a pulse width of `period` corresponds to a duty cycle of 100% -STATIC mp_obj_t pyb_timer_channel_capture_compare(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - FTM_TypeDef *FTMx = self->timer->ftm.Instance; - if (n_args == 1) { - // get - return mp_obj_new_int(FTMx->channel[self->channel].CV & 0xffff); - } - - mp_int_t pw = mp_obj_get_int(args[1]); - - // set - FTMx->channel[self->channel].CV = pw & 0xffff; - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_capture_compare_obj, 1, 2, pyb_timer_channel_capture_compare); - -/// \method pulse_width_percent([value]) -/// Get or set the pulse width percentage associated with a channel. The value -/// is a number between 0 and 100 and sets the percentage of the timer period -/// for which the pulse is active. The value can be an integer or -/// floating-point number for more accuracy. For example, a value of 25 gives -/// a duty cycle of 25%. -STATIC mp_obj_t pyb_timer_channel_pulse_width_percent(size_t n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - FTM_TypeDef *FTMx = self->timer->ftm.Instance; - uint32_t period = compute_period(self->timer); - if (n_args == 1) { - // get - uint32_t cmp = FTMx->channel[self->channel].CV & 0xffff; - return compute_percent_from_pwm_value(period, cmp); - } else { - // set - uint32_t cmp = compute_pwm_value_from_percent(period, args[1]); - FTMx->channel[self->channel].CV = cmp & 0xffff; - return mp_const_none; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_pulse_width_percent_obj, 1, 2, pyb_timer_channel_pulse_width_percent); - -/// \method callback(fun) -/// Set the function to be called when the timer channel triggers. -/// `fun` is passed 1 argument, the timer object. -/// If `fun` is `None` then the callback will be disabled. -STATIC mp_obj_t pyb_timer_channel_callback(mp_obj_t self_in, mp_obj_t callback) { - pyb_timer_channel_obj_t *self = self_in; - if (callback == mp_const_none) { - // stop interrupt (but not timer) - __HAL_FTM_DISABLE_CH_IT(&self->timer->ftm, self->channel); - self->callback = mp_const_none; - } else if (mp_obj_is_callable(callback)) { - self->callback = callback; - HAL_NVIC_EnableIRQ(self->timer->irqn); - // start timer, so that it interrupts on overflow - switch (self->mode) { - case CHANNEL_MODE_PWM_NORMAL: - case CHANNEL_MODE_PWM_INVERTED: - HAL_FTM_PWM_Start_IT(&self->timer->ftm, self->channel); - break; - case CHANNEL_MODE_OC_TIMING: - case CHANNEL_MODE_OC_ACTIVE: - case CHANNEL_MODE_OC_INACTIVE: - case CHANNEL_MODE_OC_TOGGLE: - HAL_FTM_OC_Start_IT(&self->timer->ftm, self->channel); - break; - case CHANNEL_MODE_IC: - HAL_FTM_IC_Start_IT(&self->timer->ftm, self->channel); - break; - } - } else { - mp_raise_ValueError("callback must be None or a callable object"); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_timer_channel_callback_obj, pyb_timer_channel_callback); - -#if MICROPY_TIMER_REG -reg_t timer_channel_reg[] = { - REG_ENTRY(FTM_ChannelTypeDef, CSC), - REG_ENTRY(FTM_ChannelTypeDef, CV), -}; - -mp_obj_t pyb_timer_channel_reg(uint n_args, const mp_obj_t *args) { - pyb_timer_channel_obj_t *self = args[0]; - return reg_cmd(&self->timer->ftm.Instance->channel[self->channel], - timer_channel_reg, MP_ARRAY_SIZE(timer_channel_reg), - n_args - 1, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_timer_channel_reg_obj, 1, 3, pyb_timer_channel_reg); -#endif - -STATIC const mp_rom_map_elem_t pyb_timer_channel_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_callback), MP_ROM_PTR(&pyb_timer_channel_callback_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_pulse_width_percent), MP_ROM_PTR(&pyb_timer_channel_pulse_width_percent_obj) }, - { MP_ROM_QSTR(MP_QSTR_capture), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, - { MP_ROM_QSTR(MP_QSTR_compare), MP_ROM_PTR(&pyb_timer_channel_capture_compare_obj) }, -#if MICROPY_TIMER_REG - { MP_ROM_QSTR(MP_QSTR_reg), MP_ROM_PTR(&pyb_timer_channel_reg_obj) }, -#endif -}; -STATIC MP_DEFINE_CONST_DICT(pyb_timer_channel_locals_dict, pyb_timer_channel_locals_dict_table); - -STATIC const mp_obj_type_t pyb_timer_channel_type = { - { &mp_type_type }, - .name = MP_QSTR_TimerChannel, - .print = pyb_timer_channel_print, - .locals_dict = (mp_obj_t)&pyb_timer_channel_locals_dict, -}; - -STATIC bool ftm_handle_irq_callback(pyb_timer_obj_t *self, mp_uint_t channel, mp_obj_t callback) { - // execute callback if it's set - if (callback == mp_const_none) { - return false; - } - bool handled = false; - - // When executing code within a handler we must lock the GC to prevent - // any memory allocations. We must also catch any exceptions. - gc_lock(); - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_call_function_1(callback, self); - nlr_pop(); - handled = true; - } else { - // Uncaught exception; disable the callback so it doesn't run again. - self->callback = mp_const_none; - if (channel == 0xffffffff) { - printf("Uncaught exception in Timer(" UINT_FMT - ") interrupt handler\n", self->tim_id); - } else { - printf("Uncaught exception in Timer(" UINT_FMT ") channel " - UINT_FMT " interrupt handler\n", self->tim_id, channel); - } - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } - gc_unlock(); - return handled; -} - -STATIC void ftm_irq_handler(uint tim_id) { - if (tim_id >= PYB_TIMER_OBJ_ALL_NUM) { - return; - } - // get the timer object - pyb_timer_obj_t *self = pyb_timer_obj_all[tim_id]; - if (self == NULL) { - // timer object has not been set, so we can't do anything - printf("No timer object for id=%d\n", tim_id); - return; - } - FTM_HandleTypeDef *hftm = &self->ftm; - - bool handled = false; - - // Check for timer (versus timer channel) interrupt. - if (__HAL_FTM_GET_TOF_IT(hftm) && __HAL_FTM_GET_TOF_FLAG(hftm)) { - __HAL_FTM_CLEAR_TOF_FLAG(hftm); - if (ftm_handle_irq_callback(self, 0xffffffff, self->callback)) { - handled = true; - } else { - __HAL_FTM_DISABLE_TOF_IT(&self->ftm); - printf("No callback for Timer %d TOF (now disabled)\n", tim_id); - } - } - - uint32_t processed = 0; - - // Check to see if a timer channel interrupt is pending - pyb_timer_channel_obj_t *chan = self->channel; - while (chan != NULL) { - processed |= (1 << chan->channel); - if (__HAL_FTM_GET_CH_IT(&self->ftm, chan->channel) && __HAL_FTM_GET_CH_FLAG(&self->ftm, chan->channel)) { - __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, chan->channel); - if (ftm_handle_irq_callback(self, chan->channel, chan->callback)) { - handled = true; - } else { - __HAL_FTM_DISABLE_CH_IT(&self->ftm, chan->channel); - printf("No callback for Timer %d channel %u (now disabled)\n", - self->tim_id, chan->channel); - } - } - chan = chan->next; - } - - if (!handled) { - // An interrupt occurred for a channel we didn't process. Find it and - // turn it off. - for (mp_uint_t channel = 0; channel < 8; channel++) { - if ((processed & (1 << channel)) == 0) { - if (__HAL_FTM_GET_CH_FLAG(&self->ftm, channel) != 0) { - __HAL_FTM_CLEAR_CH_FLAG(&self->ftm, channel); - __HAL_FTM_DISABLE_CH_IT(&self->ftm, channel); - printf("Unhandled interrupt Timer %d channel %u (now disabled)\n", - tim_id, channel); - } - } - } - } -} - -void ftm0_isr(void) { - ftm_irq_handler(0); -} - -void ftm1_isr(void) { - ftm_irq_handler(1); -} - -void ftm2_isr(void) { - ftm_irq_handler(2); -} diff --git a/ports/teensy/timer.h b/ports/teensy/timer.h deleted file mode 100644 index 75c2e654e2c57..0000000000000 --- a/ports/teensy/timer.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_TEENSY_TIMER_H -#define MICROPY_INCLUDED_TEENSY_TIMER_H - -extern const mp_obj_type_t pyb_timer_type; - -void timer_init0(void); -void timer_deinit(void); - -#endif // MICROPY_INCLUDED_TEENSY_TIMER_H diff --git a/ports/teensy/uart.c b/ports/teensy/uart.c deleted file mode 100644 index a8cfd63eac666..0000000000000 --- a/ports/teensy/uart.c +++ /dev/null @@ -1,489 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/runtime.h" -#include "bufhelper.h" -#include "uart.h" - -/// \moduleref pyb -/// \class UART - duplex serial communication bus -/// -/// UART implements the standard UART/USART duplex serial communications protocol. At -/// the physical level it consists of 2 lines: RX and TX. -/// -/// See usage model of I2C. UART is very similar. Main difference is -/// parameters to init the UART bus: -/// -/// from pyb import UART -/// -/// uart = UART(1, 9600) # init with given baudrate -/// uart.init(9600, bits=8, stop=1, parity=None) # init with given parameters -/// -/// Bits can be 8 or 9, stop can be 1 or 2, parity can be None, 0 (even), 1 (odd). -/// -/// Extra method: -/// -/// uart.any() # returns True if any characters waiting - -struct _pyb_uart_obj_t { - mp_obj_base_t base; - pyb_uart_t uart_id; - bool is_enabled; -// UART_HandleTypeDef uart; -}; - -pyb_uart_obj_t *pyb_uart_global_debug = NULL; - -// assumes Init parameters have been set up correctly -bool uart_init2(pyb_uart_obj_t *uart_obj) { -#if 0 - USART_TypeDef *UARTx = NULL; - - uint32_t GPIO_Pin = 0; - uint8_t GPIO_AF_UARTx = 0; - GPIO_TypeDef* GPIO_Port = NULL; - - switch (uart_obj->uart_id) { - // USART1 is on PA9/PA10 (CK on PA8), PB6/PB7 - case PYB_UART_1: - UARTx = USART1; - GPIO_AF_UARTx = GPIO_AF7_USART1; - -#if defined (PYBV4) || defined(PYBV10) - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7; -#else - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_9 | GPIO_PIN_10; -#endif - - __USART1_CLK_ENABLE(); - break; - - // USART2 is on PA2/PA3 (CK on PA4), PD5/PD6 (CK on PD7) - case PYB_UART_2: - UARTx = USART2; - GPIO_AF_UARTx = GPIO_AF7_USART2; - - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_2 | GPIO_PIN_3; - - __USART2_CLK_ENABLE(); - break; - - // USART3 is on PB10/PB11 (CK on PB12), PC10/PC11 (CK on PC12), PD8/PD9 (CK on PD10) - case PYB_UART_3: - UARTx = USART3; - GPIO_AF_UARTx = GPIO_AF7_USART3; - -#if defined(PYBV3) || defined(PYBV4) | defined(PYBV10) - GPIO_Port = GPIOB; - GPIO_Pin = GPIO_PIN_10 | GPIO_PIN_11; -#else - GPIO_Port = GPIOD; - GPIO_Pin = GPIO_PIN_8 | GPIO_PIN_9; -#endif - __USART3_CLK_ENABLE(); - break; - - // UART4 is on PA0/PA1, PC10/PC11 - case PYB_UART_4: - UARTx = UART4; - GPIO_AF_UARTx = GPIO_AF8_UART4; - - GPIO_Port = GPIOA; - GPIO_Pin = GPIO_PIN_0 | GPIO_PIN_1; - - __UART4_CLK_ENABLE(); - break; - - // USART6 is on PC6/PC7 (CK on PC8) - case PYB_UART_6: - UARTx = USART6; - GPIO_AF_UARTx = GPIO_AF8_USART6; - - GPIO_Port = GPIOC; - GPIO_Pin = GPIO_PIN_6 | GPIO_PIN_7; - - __USART6_CLK_ENABLE(); - break; - - default: - return false; - } - - // init GPIO - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.Pin = GPIO_Pin; - GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; - GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; - GPIO_InitStructure.Pull = GPIO_PULLUP; - GPIO_InitStructure.Alternate = GPIO_AF_UARTx; - HAL_GPIO_Init(GPIO_Port, &GPIO_InitStructure); - - // init UARTx - uart_obj->uart.Instance = UARTx; - HAL_UART_Init(&uart_obj->uart); - - uart_obj->is_enabled = true; -#endif - return true; -} - -bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) { -#if 0 - UART_HandleTypeDef *uh = &uart_obj->uart; - memset(uh, 0, sizeof(*uh)); - uh->Init.BaudRate = baudrate; - uh->Init.WordLength = UART_WORDLENGTH_8B; - uh->Init.StopBits = UART_STOPBITS_1; - uh->Init.Parity = UART_PARITY_NONE; - uh->Init.Mode = UART_MODE_TX_RX; - uh->Init.HwFlowCtl = UART_HWCONTROL_NONE; - uh->Init.OverSampling = UART_OVERSAMPLING_16; -#endif - return uart_init2(uart_obj); -} - -mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj) { -#if 0 - return __HAL_UART_GET_FLAG(&uart_obj->uart, UART_FLAG_RXNE); -#else - return 0; -#endif -} - -int uart_rx_char(pyb_uart_obj_t *uart_obj) { - uint8_t ch; -#if 0 - if (HAL_UART_Receive(&uart_obj->uart, &ch, 1, 0) != HAL_OK) { - ch = 0; - } -#else - ch = 'A'; -#endif - return ch; -} - -void uart_tx_char(pyb_uart_obj_t *uart_obj, int c) { -#if 0 - uint8_t ch = c; - HAL_UART_Transmit(&uart_obj->uart, &ch, 1, 100000); -#endif -} - -void uart_tx_str(pyb_uart_obj_t *uart_obj, const char *str) { -#if 0 - HAL_UART_Transmit(&uart_obj->uart, (uint8_t*)str, strlen(str), 100000); -#endif -} - -void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) { -#if 0 - HAL_UART_Transmit(&uart_obj->uart, (uint8_t*)str, len, 100000); -#endif -} - -void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len) { - for (const char *top = str + len; str < top; str++) { - if (*str == '\n') { - uart_tx_char(uart_obj, '\r'); - } - uart_tx_char(uart_obj, *str); - } -} - -/******************************************************************************/ -/* MicroPython bindings */ - -STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - pyb_uart_obj_t *self = self_in; - if (!self->is_enabled) { - mp_printf(print, "UART(%lu)", self->uart_id); - } else { -#if 0 - mp_printf(print, "UART(%lu, baudrate=%u, bits=%u, stop=%u", - self->uart_id, self->uart.Init.BaudRate, - self->uart.Init.WordLength == UART_WORDLENGTH_8B ? 8 : 9, - self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2); - if (self->uart.Init.Parity == UART_PARITY_NONE) { - mp_print_str(print, ", parity=None)"); - } else { - mp_printf(print, ", parity=%u)", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1); - } -#endif - } -} - -/// \method init(baudrate, *, bits=8, stop=1, parity=None) -/// -/// Initialise the SPI bus with the given parameters: -/// -/// - `baudrate` is the clock rate. -/// - `bits` is the number of bits per byte, 8 or 9. -/// - `stop` is the number of stop bits, 1 or 2. -/// - `parity` is the parity, `None`, 0 (even) or 1 (odd). -STATIC const mp_arg_t pyb_uart_init_args[] = { - { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_parity, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, -}; -#define PYB_UART_INIT_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_init_args) - -STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // parse args - mp_arg_val_t vals[PYB_UART_INIT_NUM_ARGS]; - mp_arg_parse_all(n_args, args, kw_args, PYB_UART_INIT_NUM_ARGS, pyb_uart_init_args, vals); -#if 0 - // set the UART configuration values - memset(&self->uart, 0, sizeof(self->uart)); - UART_InitTypeDef *init = &self->uart.Init; - init->BaudRate = vals[0].u_int; - init->WordLength = vals[1].u_int == 8 ? UART_WORDLENGTH_8B : UART_WORDLENGTH_9B; - switch (vals[2].u_int) { - case 1: init->StopBits = UART_STOPBITS_1; break; - default: init->StopBits = UART_STOPBITS_2; break; - } - if (vals[3].u_obj == mp_const_none) { - init->Parity = UART_PARITY_NONE; - } else { - mp_int_t parity = mp_obj_get_int(vals[3].u_obj); - init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN; - } - init->Mode = UART_MODE_TX_RX; - init->HwFlowCtl = UART_HWCONTROL_NONE; - init->OverSampling = UART_OVERSAMPLING_16; - - // init UART (if it fails, it's because the port doesn't exist) - if (!uart_init2(self)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART port %d does not exist", self->uart_id)); - } -#endif - - return mp_const_none; -} - -/// \classmethod \constructor(bus, ...) -/// -/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'. -/// With no additional parameters, the UART object is created but not -/// initialised (it has the settings from the last initialisation of -/// the bus, if any). If extra arguments are given, the bus is initialised. -/// See `init` for parameters of initialisation. -/// -/// The physical pins of the UART busses are: -/// -/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)` -/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)` -/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)` -/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)` -/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)` -STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, uint n_args, uint n_kw, const mp_obj_t *args) { - // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // create object - pyb_uart_obj_t *o = m_new_obj(pyb_uart_obj_t); - o->base.type = &pyb_uart_type; - - // work out port - o->uart_id = 0; -#if 0 - if (MP_OBJ_IS_STR(args[0])) { - const char *port = mp_obj_str_get_str(args[0]); - if (0) { -#if defined(PYBV10) - } else if (strcmp(port, "XA") == 0) { - o->uart_id = PYB_UART_XA; - } else if (strcmp(port, "XB") == 0) { - o->uart_id = PYB_UART_XB; - } else if (strcmp(port, "YA") == 0) { - o->uart_id = PYB_UART_YA; - } else if (strcmp(port, "YB") == 0) { - o->uart_id = PYB_UART_YB; -#endif - } else { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART port %s does not exist", port)); - } - } else { - o->uart_id = mp_obj_get_int(args[0]); - } -#endif - - if (n_args > 1 || n_kw > 0) { - // start the peripheral - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - pyb_uart_init_helper(o, n_args - 1, args + 1, &kw_args); - } - - return o; -} - -STATIC mp_obj_t pyb_uart_init(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); - -/// \method deinit() -/// Turn off the UART bus. -STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { - //pyb_uart_obj_t *self = self_in; - // TODO - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); - -/// \method any() -/// Return `True` if any characters waiting, else `False`. -STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { - pyb_uart_obj_t *self = self_in; - if (uart_rx_any(self)) { - return mp_const_true; - } else { - return mp_const_false; - } -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); - -/// \method send(send, *, timeout=5000) -/// Send data on the bus: -/// -/// - `send` is the data to send (an integer to send, or a buffer object). -/// - `timeout` is the timeout in milliseconds to wait for the send. -/// -/// Return value: `None`. -STATIC const mp_arg_t pyb_uart_send_args[] = { - { MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_UART_SEND_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_send_args) - -STATIC mp_obj_t pyb_uart_send(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - pyb_uart_obj_t *self = args[0]; - - // parse args - mp_arg_val_t vals[PYB_UART_SEND_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_SEND_NUM_ARGS, pyb_uart_send_args, vals); - -#if 0 - // get the buffer to send from - mp_buffer_info_t bufinfo; - uint8_t data[1]; - pyb_buf_get_for_send(vals[0].u_obj, &bufinfo, data); - - // send the data - HAL_StatusTypeDef status = HAL_UART_Transmit(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int); - - if (status != HAL_OK) { - // TODO really need a HardwareError object, or something - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "HAL_UART_Transmit failed with code %d", status)); - } -#else - (void)self; -#endif - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_send_obj, 1, pyb_uart_send); - -/// \method recv(recv, *, timeout=5000) -/// -/// Receive data on the bus: -/// -/// - `recv` can be an integer, which is the number of bytes to receive, -/// or a mutable buffer, which will be filled with received bytes. -/// - `timeout` is the timeout in milliseconds to wait for the receive. -/// -/// Return value: if `recv` is an integer then a new buffer of the bytes received, -/// otherwise the same buffer that was passed in to `recv`. -#if 0 -STATIC const mp_arg_t pyb_uart_recv_args[] = { - { MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} }, -}; -#define PYB_UART_RECV_NUM_ARGS MP_ARRAY_SIZE(pyb_uart_recv_args) -#endif - -STATIC mp_obj_t pyb_uart_recv(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // TODO assumes transmission size is 8-bits wide - - pyb_uart_obj_t *self = args[0]; - -#if 0 - // parse args - mp_arg_val_t vals[PYB_UART_RECV_NUM_ARGS]; - mp_arg_parse_all(n_args - 1, args + 1, kw_args, PYB_UART_RECV_NUM_ARGS, pyb_uart_recv_args, vals); - - // get the buffer to receive into - mp_buffer_info_t bufinfo; - mp_obj_t o_ret = pyb_buf_get_for_recv(vals[0].u_obj, &bufinfo); - - // receive the data - HAL_StatusTypeDef status = HAL_UART_Receive(&self->uart, bufinfo.buf, bufinfo.len, vals[1].u_int); - - if (status != HAL_OK) { - // TODO really need a HardwareError object, or something - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_Exception, "HAL_UART_Receive failed with code %d", status)); - } - - // return the received data - if (o_ret == MP_OBJ_NULL) { - return vals[0].u_obj; - } else { - return mp_obj_str_builder_end(o_ret); - } -#else - (void)self; - return mp_const_none; -#endif -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_recv_obj, 1, pyb_uart_recv); - -STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_uart_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_uart_recv_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); - -const mp_obj_type_t pyb_uart_type = { - { &mp_type_type }, - .name = MP_QSTR_UART, - .print = pyb_uart_print, - .make_new = pyb_uart_make_new, - .locals_dict = (mp_obj_t)&pyb_uart_locals_dict, -}; diff --git a/ports/teensy/usb.c b/ports/teensy/usb.c deleted file mode 100644 index ed96826b350f9..0000000000000 --- a/ports/teensy/usb.c +++ /dev/null @@ -1,52 +0,0 @@ -#include - -#include "py/runtime.h" - -#include "Arduino.h" - -#include "usb.h" -#include "usb_serial.h" - -bool usb_vcp_is_connected(void) -{ - return usb_configuration && (usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)); -} - -bool usb_vcp_is_enabled(void) -{ - return true; -} - -int usb_vcp_rx_num(void) { - return usb_serial_available(); -} - -int usb_vcp_recv_byte(uint8_t *ptr) -{ - int ch = usb_serial_getchar(); - if (ch < 0) { - return 0; - } - *ptr = ch; - return 1; -} - -void usb_vcp_send_str(const char* str) -{ - usb_vcp_send_strn(str, strlen(str)); -} - -void usb_vcp_send_strn(const char* str, int len) -{ - usb_serial_write(str, len); -} - -void usb_vcp_send_strn_cooked(const char *str, int len) -{ - for (const char *top = str + len; str < top; str++) { - if (*str == '\n') { - usb_serial_putchar('\r'); - } - usb_serial_putchar(*str); - } -} diff --git a/ports/teensy/usb.h b/ports/teensy/usb.h deleted file mode 100644 index 50fb3ff90d628..0000000000000 --- a/ports/teensy/usb.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef MICROPY_INCLUDED_TEENSY_USB_H -#define MICROPY_INCLUDED_TEENSY_USB_H - -bool usb_vcp_is_connected(void); -bool usb_vcp_is_enabled(void); -int usb_vcp_rx_num(void); -int usb_vcp_recv_byte(uint8_t *ptr); -void usb_vcp_send_str(const char* str); -void usb_vcp_send_strn(const char* str, int len); -void usb_vcp_send_strn_cooked(const char *str, int len); - -#endif // MICROPY_INCLUDED_TEENSY_USB_H diff --git a/ports/unix/Makefile b/ports/unix/Makefile index 5bdcf4e1a56c9..63c4980c31786 100644 --- a/ports/unix/Makefile +++ b/ports/unix/Makefile @@ -74,7 +74,7 @@ else # Use gcc syntax for map file LDFLAGS_ARCH = -Wl,-Map=$@.map,--cref -Wl,--gc-sections endif -LDFLAGS = $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA) +LDFLAGS = -Lbuild $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA) ifeq ($(MICROPY_FORCE_32BIT),1) # Note: you may need to install i386 versions of dependency packages, @@ -149,8 +149,21 @@ SRC_C = \ alloc.c \ coverage.c \ fatfs_port.c \ + supervisor/stub/filesystem.c \ + supervisor/stub/safe_mode.c \ + supervisor/stub/serial.c \ + supervisor/stub/stack.c \ + supervisor/shared/translate.c \ $(SRC_MOD) +PY_EXTMOD_O_BASENAME += \ + extmod/machine_mem.o \ + extmod/machine_pinbase.o \ + extmod/machine_signal.o \ + extmod/machine_pulse.o \ + extmod/machine_i2c.o \ + extmod/machine_spi.o + LIB_SRC_C = $(addprefix lib/,\ $(LIB_SRC_C_EXTRA) \ timeutils/timeutils.c \ @@ -165,7 +178,6 @@ LIB_SRC_C += $(addprefix lib/,\ OBJ = $(PY_O) OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(STMHAL_SRC_C:.c=.o)) # List of sources for qstr extraction SRC_QSTR += $(SRC_C) $(LIB_SRC_C) @@ -189,7 +201,7 @@ include $(TOP)/py/mkrules.mk test: $(PROG) $(TOP)/tests/run-tests $(eval DIRNAME=ports/$(notdir $(CURDIR))) - cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/$(PROG) ./run-tests + cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/$(PROG) ./run-tests --auto-jobs # install micropython in /usr/local/bin TARGET = micropython @@ -242,10 +254,10 @@ freedos: # build an interpreter for coverage testing and do the testing coverage: - $(MAKE) V=2 \ - COPT="-O0" CFLAGS_EXTRA='-DMP_CONFIGFILE="\"mpconfigport_coverage.h\"" \ + $(MAKE) \ + COPT="-O0" CFLAGS_EXTRA='$(CFLAGS_EXTRA) -DMP_CONFIGFILE="" \ -fprofile-arcs -ftest-coverage \ - -Wdouble-promotion -Wformat -Wmissing-declarations -Wmissing-prototypes -Wsign-compare \ + -Wformat -Wmissing-declarations -Wmissing-prototypes -Wsign-compare \ -Wold-style-definition -Wpointer-arith -Wshadow -Wuninitialized -Wunused-parameter \ -DMICROPY_UNIX_COVERAGE' \ LDFLAGS_EXTRA='-fprofile-arcs -ftest-coverage' \ @@ -254,13 +266,29 @@ coverage: coverage_test: coverage $(eval DIRNAME=ports/$(notdir $(CURDIR))) - cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests - cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests -d thread - cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests --emit native - cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests --via-mpy -d basics float + cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests --auto-jobs + cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests --auto-jobs -d thread + cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests --auto-jobs --emit native + cd $(TOP)/tests && MICROPY_MICROPYTHON=../$(DIRNAME)/micropython_coverage ./run-tests -j1 --via-mpy -d basics float + cat $(TOP)/tests/basics/0prelim.py | ./micropython_coverage | grep -q 'abc' gcov -o build-coverage/py $(TOP)/py/*.c gcov -o build-coverage/extmod $(TOP)/extmod/*.c +coverage_clean: + $(MAKE) V=2 BUILD=build-coverage PROG=micropython_coverage clean + +# build an interpreter for fuzzing +fuzz: + $(MAKE) \ + CC=afl-clang-fast DEBUG=1 \ + CFLAGS_EXTRA='$(CFLAGS_EXTRA) -ffunction-sections' \ + LDFLAGS_EXTRA='$(LDFLAGS_EXTRA)' \ + BUILD=build-fuzz PROG=micropython_fuzz + +fuzz_clean: + $(MAKE) V=2 BUILD=build-fuzz PROG=micropython_fuzz clean + + # Value of configure's --host= option (required for cross-compilation). # Deduce it from CROSS_COMPILE by default, but can be overridden. ifneq ($(CROSS_COMPILE),) diff --git a/ports/unix/coverage.c b/ports/unix/coverage.c index 651db0a9434c7..849820fffde9b 100644 --- a/ports/unix/coverage.c +++ b/ports/unix/coverage.c @@ -4,6 +4,7 @@ #include "py/obj.h" #include "py/objstr.h" #include "py/runtime.h" +#include "py/gc.h" #include "py/repl.h" #include "py/mpz.h" #include "py/builtin.h" @@ -11,6 +12,7 @@ #include "py/formatfloat.h" #include "py/stream.h" #include "py/binary.h" +#include "py/bc.h" #if defined(MICROPY_UNIX_COVERAGE) @@ -94,6 +96,7 @@ STATIC const mp_rom_map_elem_t rawfile_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(rawfile_locals_dict, rawfile_locals_dict_table); STATIC const mp_stream_p_t fileio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stest_read, .write = stest_write, .ioctl = stest_ioctl, @@ -116,12 +119,12 @@ STATIC mp_uint_t stest_read2(mp_obj_t o_in, void *buf, mp_uint_t size, int *errc STATIC const mp_rom_map_elem_t rawfile_locals_dict_table2[] = { { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, }; STATIC MP_DEFINE_CONST_DICT(rawfile_locals_dict2, rawfile_locals_dict_table2); STATIC const mp_stream_p_t textio_stream_p2 = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stest_read2, .write = NULL, .is_text = true, @@ -145,11 +148,16 @@ STATIC mp_obj_t extra_coverage(void) { mp_printf(&mp_plat_print, "%d %+d % d\n", -123, 123, 123); // sign mp_printf(&mp_plat_print, "%05d\n", -123); // negative number with zero padding mp_printf(&mp_plat_print, "%ld\n", 123); // long + mp_printf(&mp_plat_print, "%lx\n", 0x123); // long hex mp_printf(&mp_plat_print, "%X\n", 0x1abcdef); // capital hex mp_printf(&mp_plat_print, "%.2s %.3s\n", "abc", "abc"); // fixed string precision mp_printf(&mp_plat_print, "%.*s\n", -1, "abc"); // negative string precision mp_printf(&mp_plat_print, "%b %b\n", 0, 1); // bools + #ifndef NDEBUG mp_printf(&mp_plat_print, "%s\n", NULL); // null string + #else + mp_printf(&mp_plat_print, "(null)\n"); // without debugging mp_printf won't check for null + #endif mp_printf(&mp_plat_print, "%d\n", 0x80000000); // should print signed mp_printf(&mp_plat_print, "%u\n", 0x80000000); // should print unsigned mp_printf(&mp_plat_print, "%x\n", 0x80000000); // should print unsigned @@ -157,6 +165,23 @@ STATIC mp_obj_t extra_coverage(void) { mp_printf(&mp_plat_print, "abc\n%"); // string ends in middle of format specifier } + // GC + { + mp_printf(&mp_plat_print, "# GC\n"); + + // calling gc_free while GC is locked + gc_lock(); + gc_free(NULL); + gc_unlock(); + + // using gc_realloc to resize to 0, which means free the memory + void *p = gc_alloc(4, false, false); + mp_printf(&mp_plat_print, "%p\n", gc_realloc(p, 0, false)); + + // calling gc_nbytes with a non-heap pointer + mp_printf(&mp_plat_print, "%p\n", gc_nbytes(NULL)); + } + // vstr { mp_printf(&mp_plat_print, "# vstr\n"); @@ -227,7 +252,17 @@ STATIC mp_obj_t extra_coverage(void) { mp_printf(&mp_plat_print, "# str\n"); // intern string - mp_printf(&mp_plat_print, "%d\n", MP_OBJ_IS_QSTR(mp_obj_str_intern(mp_obj_new_str("intern me", 9, false)))); + mp_printf(&mp_plat_print, "%d\n", MP_OBJ_IS_QSTR(mp_obj_str_intern(mp_obj_new_str("intern me", 9)))); + } + + // bytearray + { + mp_printf(&mp_plat_print, "# bytearray\n"); + + // create a bytearray via mp_obj_new_bytearray + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(mp_obj_new_bytearray(4, "data"), &bufinfo, MP_BUFFER_RW); + mp_printf(&mp_plat_print, "%.*s\n", bufinfo.len, bufinfo.buf); } // mpz @@ -251,6 +286,39 @@ STATIC mp_obj_t extra_coverage(void) { mpz_set_from_int(&mpz, 1); mpz_shl_inpl(&mpz, &mpz, 70); mp_printf(&mp_plat_print, "%d\n", mpz_as_uint_checked(&mpz, &value)); + + // mpz_set_from_float with inf as argument + mpz_set_from_float(&mpz, 1.0 / 0.0); + mpz_as_uint_checked(&mpz, &value); + mp_printf(&mp_plat_print, "%d\n", (int)value); + + // mpz_set_from_float with 0 as argument + mpz_set_from_float(&mpz, 0); + mpz_as_uint_checked(&mpz, &value); + mp_printf(&mp_plat_print, "%d\n", (int)value); + + // mpz_set_from_float with 0fun_bc = &fun_bc; + code_state->ip = (const byte*)"\x00"; // just needed for an invalid opcode + code_state->sp = &code_state->state[0]; + code_state->exc_sp = NULL; + code_state->old_globals = NULL; + mp_vm_return_kind_t ret = mp_execute_bytecode(code_state, MP_OBJ_NULL); + mp_printf(&mp_plat_print, "%d %d\n", ret, mp_obj_get_type(code_state->state[0]) == &mp_type_NotImplementedError); + } + // scheduler { mp_printf(&mp_plat_print, "# scheduler\n"); diff --git a/ports/unix/file.c b/ports/unix/file.c index 84e9180821ce9..e5c73d26c201c 100644 --- a/ports/unix/file.c +++ b/ports/unix/file.c @@ -35,9 +35,10 @@ #include "py/stream.h" #include "py/builtin.h" #include "py/mphal.h" +#include "supervisor/shared/translate.h" #include "fdfile.h" -#if MICROPY_PY_IO +#if MICROPY_PY_IO && !MICROPY_VFS #ifdef _WIN32 #define fsync _commit @@ -46,7 +47,7 @@ #ifdef MICROPY_CPYTHON_COMPAT STATIC void check_fd_is_open(const mp_obj_fdfile_t *o) { if (o->fd < 0) { - mp_raise_ValueError("I/O operation on closed file"); + mp_raise_ValueError(translate("I/O operation on closed file")); } } #else @@ -118,25 +119,21 @@ STATIC mp_uint_t fdfile_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, i return MP_STREAM_ERROR; } return 0; + case MP_STREAM_CLOSE: + close(o->fd); + #ifdef MICROPY_CPYTHON_COMPAT + o->fd = -1; + #endif + return 0; default: *errcode = EINVAL; return MP_STREAM_ERROR; } } -STATIC mp_obj_t fdfile_close(mp_obj_t self_in) { - mp_obj_fdfile_t *self = MP_OBJ_TO_PTR(self_in); - close(self->fd); -#ifdef MICROPY_CPYTHON_COMPAT - self->fd = -1; -#endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(fdfile_close_obj, fdfile_close); - STATIC mp_obj_t fdfile___exit__(size_t n_args, const mp_obj_t *args) { (void)n_args; - return fdfile_close(args[0]); + return mp_stream_close(args[0]); } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(fdfile___exit___obj, 4, 4, fdfile___exit__); @@ -208,9 +205,9 @@ STATIC mp_obj_t fdfile_open(const mp_obj_type_t *type, mp_arg_val_t *args) { return MP_OBJ_FROM_PTR(o); } -STATIC mp_obj_t fdfile_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t fdfile_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_arg_val_t arg_vals[FILE_OPEN_NUM_ARGS]; - mp_arg_parse_all_kw_array(n_args, n_kw, args, FILE_OPEN_NUM_ARGS, file_open_args, arg_vals); + mp_arg_parse_all(n_args, args, kw_args, FILE_OPEN_NUM_ARGS, file_open_args, arg_vals); return fdfile_open(type, arg_vals); } @@ -224,7 +221,7 @@ STATIC const mp_rom_map_elem_t rawfile_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_seek), MP_ROM_PTR(&mp_stream_seek_obj) }, { MP_ROM_QSTR(MP_QSTR_tell), MP_ROM_PTR(&mp_stream_tell_obj) }, { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&fdfile_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&fdfile___exit___obj) }, }; @@ -233,6 +230,7 @@ STATIC MP_DEFINE_CONST_DICT(rawfile_locals_dict, rawfile_locals_dict_table); #if MICROPY_PY_IO_FILEIO STATIC const mp_stream_p_t fileio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = fdfile_read, .write = fdfile_write, .ioctl = fdfile_ioctl, @@ -251,6 +249,7 @@ const mp_obj_type_t mp_type_fileio = { #endif STATIC const mp_stream_p_t textio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = fdfile_read, .write = fdfile_write, .ioctl = fdfile_ioctl, @@ -281,4 +280,4 @@ const mp_obj_fdfile_t mp_sys_stdin_obj = { .base = {&mp_type_textio}, .fd = STD const mp_obj_fdfile_t mp_sys_stdout_obj = { .base = {&mp_type_textio}, .fd = STDOUT_FILENO }; const mp_obj_fdfile_t mp_sys_stderr_obj = { .base = {&mp_type_textio}, .fd = STDERR_FILENO }; -#endif // MICROPY_PY_IO +#endif // MICROPY_PY_IO && !MICROPY_VFS diff --git a/ports/unix/main.c b/ports/unix/main.c index 629e36b8b3836..d1187ae905f72 100644 --- a/ports/unix/main.c +++ b/ports/unix/main.c @@ -47,6 +47,8 @@ #include "py/mphal.h" #include "py/mpthread.h" #include "extmod/misc.h" +#include "extmod/vfs.h" +#include "extmod/vfs_posix.h" #include "genhdr/mpversion.h" #include "input.h" @@ -441,8 +443,25 @@ MP_NOINLINE int main_(int argc, char **argv) { gc_init(heap, heap + heap_size); #endif + #if MICROPY_ENABLE_PYSTACK + static mp_obj_t pystack[1024]; + mp_pystack_init(pystack, &pystack[MP_ARRAY_SIZE(pystack)]); + #endif + mp_init(); + #if MICROPY_VFS_POSIX + { + // Mount the host FS at the root of our internal VFS + mp_obj_t args[2] = { + mp_type_vfs_posix.make_new(&mp_type_vfs_posix, 0, 0, NULL), + MP_OBJ_NEW_QSTR(MP_QSTR__slash_), + }; + mp_vfs_mount(2, args, (mp_map_t*)&mp_const_empty_map); + MP_STATE_VM(vfs_cur) = MP_STATE_VM(vfs_mount_table); + } + #endif + char *home = getenv("HOME"); char *path = getenv("MICROPYPATH"); if (path == NULL) { @@ -486,7 +505,7 @@ MP_NOINLINE int main_(int argc, char **argv) { vstr_add_strn(&vstr, p + 1, p1 - p - 1); path_items[i] = mp_obj_new_str_from_vstr(&mp_type_str, &vstr); } else { - path_items[i] = MP_OBJ_NEW_QSTR(qstr_from_strn(p, p1 - p)); + path_items[i] = mp_obj_new_str_via_qstr(p, p1 - p); } p = p1 + 1; } @@ -545,7 +564,7 @@ MP_NOINLINE int main_(int argc, char **argv) { return usage(argv); } mp_obj_t import_args[4]; - import_args[0] = mp_obj_new_str(argv[a + 1], strlen(argv[a + 1]), false); + import_args[0] = mp_obj_new_str(argv[a + 1], strlen(argv[a + 1])); import_args[1] = import_args[2] = mp_const_none; // Ask __import__ to handle imported module specially - set its __name__ // to __main__, and also return this leaf module, not top-level package @@ -611,7 +630,7 @@ MP_NOINLINE int main_(int argc, char **argv) { // Set base dir of the script as first entry in sys.path char *p = strrchr(basedir, '/'); - path_items[0] = MP_OBJ_NEW_QSTR(qstr_from_strn(basedir, p - basedir)); + path_items[0] = mp_obj_new_str_via_qstr(basedir, p - basedir); free(pathbuf); set_sys_argv(argv, argc, a); @@ -636,6 +655,10 @@ MP_NOINLINE int main_(int argc, char **argv) { } #endif + #if defined(MICROPY_UNIX_COVERAGE) + gc_sweep_all(); + #endif + mp_deinit(); #if MICROPY_ENABLE_GC && !defined(NDEBUG) @@ -648,6 +671,7 @@ MP_NOINLINE int main_(int argc, char **argv) { return ret & 0xff; } +#if !MICROPY_VFS uint mp_import_stat(const char *path) { struct stat st; if (stat(path, &st) == 0) { @@ -659,6 +683,7 @@ uint mp_import_stat(const char *path) { } return MP_IMPORT_STAT_NO_EXIST; } +#endif void nlr_jump_fail(void *val) { printf("FATAL: uncaught NLR %p\n", val); diff --git a/ports/unix/modffi.c b/ports/unix/modffi.c index 1c04c4deff5fd..03dc9e4ec6977 100644 --- a/ports/unix/modffi.c +++ b/ports/unix/modffi.c @@ -36,6 +36,8 @@ #include "py/binary.h" #include "py/mperrno.h" +#include "supervisor/shared/translate.h" + /* * modffi uses character codes to encode a value type, based on "struct" * module type codes, with some extensions and overridings. @@ -133,7 +135,7 @@ STATIC ffi_type *get_ffi_type(mp_obj_t o_in) } // TODO: Support actual libffi type objects - mp_raise_TypeError("Unknown type"); + mp_raise_TypeError(translate("Unknown type")); } STATIC mp_obj_t return_ffi_value(ffi_arg val, char type) @@ -144,7 +146,7 @@ STATIC mp_obj_t return_ffi_value(ffi_arg val, char type) if (!s) { return mp_const_none; } - return mp_obj_new_str(s, strlen(s), false); + return mp_obj_new_str(s, strlen(s)); } case 'v': return mp_const_none; @@ -202,7 +204,7 @@ STATIC mp_obj_t make_func(mp_obj_t rettype_in, void *func, mp_obj_t argtypes_in) int res = ffi_prep_cif(&o->cif, FFI_DEFAULT_ABI, nparams, char2ffi_type(*rettype), o->params); if (res != FFI_OK) { - mp_raise_ValueError("Error in ffi_prep_cif"); + mp_raise_ValueError(translate("Error in ffi_prep_cif")); } return MP_OBJ_FROM_PTR(o); @@ -260,12 +262,12 @@ STATIC mp_obj_t mod_ffi_callback(mp_obj_t rettype_in, mp_obj_t func_in, mp_obj_t int res = ffi_prep_cif(&o->cif, FFI_DEFAULT_ABI, nparams, char2ffi_type(*rettype), o->params); if (res != FFI_OK) { - mp_raise_ValueError("Error in ffi_prep_cif"); + mp_raise_ValueError(translate("Error in ffi_prep_cif")); } res = ffi_prep_closure_loc(o->clo, &o->cif, call_py_func, MP_OBJ_TO_PTR(func_in), o->func); if (res != FFI_OK) { - mp_raise_ValueError("ffi_prep_closure_loc"); + mp_raise_ValueError(translate("ffi_prep_closure_loc")); } return MP_OBJ_FROM_PTR(o); @@ -302,9 +304,9 @@ STATIC mp_obj_t ffimod_addr(mp_obj_t self_in, mp_obj_t symname_in) { } MP_DEFINE_CONST_FUN_OBJ_2(ffimod_addr_obj, ffimod_addr); -STATIC mp_obj_t ffimod_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t ffimod_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)n_args; - (void)n_kw; + (void)kw_args; const char *fname = NULL; if (args[0] != mp_const_none) { @@ -408,7 +410,7 @@ STATIC mp_obj_t ffifunc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const } error: - mp_raise_TypeError("Don't know how to pass object to native function"); + mp_raise_TypeError(translate("Don't know how to pass object to native function")); } STATIC const mp_obj_type_t ffifunc_type = { @@ -479,7 +481,7 @@ STATIC const mp_obj_type_t opaque_type = { */ STATIC mp_obj_t mod_ffi_open(size_t n_args, const mp_obj_t *args) { - return ffimod_make_new(&ffimod_type, n_args, 0, args); + return ffimod_make_new(&ffimod_type, n_args, args, NULL); } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_ffi_open_obj, 1, 2, mod_ffi_open); diff --git a/ports/unix/modjni.c b/ports/unix/modjni.c index f29c095cf5a83..8ec5ae54d939b 100644 --- a/ports/unix/modjni.c +++ b/ports/unix/modjni.c @@ -337,7 +337,7 @@ STATIC mp_obj_t new_jobject(jobject jo) { return mp_const_none; } else if (JJ(IsInstanceOf, jo, String_class)) { const char *s = JJ(GetStringUTFChars, jo, NULL); - mp_obj_t ret = mp_obj_new_str(s, strlen(s), false); + mp_obj_t ret = mp_obj_new_str(s, strlen(s)); JJ(ReleaseStringUTFChars, jo, s); return ret; } else if (JJ(IsInstanceOf, jo, Class_class)) { diff --git a/ports/unix/modmachine.c b/ports/unix/modmachine.c index 48dddec0ae72d..b2bca12063a2e 100644 --- a/ports/unix/modmachine.c +++ b/ports/unix/modmachine.c @@ -35,6 +35,8 @@ #include "extmod/machine_signal.h" #include "extmod/machine_pulse.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PLAT_DEV_MEM #include #include @@ -48,7 +50,7 @@ uintptr_t mod_machine_mem_get_addr(mp_obj_t addr_o, uint align) { uintptr_t addr = mp_obj_int_get_truncated(addr_o); if ((addr & (align - 1)) != 0) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "address %08x is not aligned to %d bytes", addr, align)); + nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, translate("address %08x is not aligned to %d bytes"), addr, align)); } #if MICROPY_PLAT_DEV_MEM { diff --git a/ports/unix/modos.c b/ports/unix/modos.c index 327116a0a6c5b..d99d0d62c9a03 100644 --- a/ports/unix/modos.c +++ b/ports/unix/modos.c @@ -126,16 +126,16 @@ STATIC mp_obj_t mod_os_system(mp_obj_t cmd_in) { return MP_OBJ_NEW_SMALL_INT(r); } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_os_system_obj, mod_os_system); +MP_DEFINE_CONST_FUN_OBJ_1(mod_os_system_obj, mod_os_system); STATIC mp_obj_t mod_os_getenv(mp_obj_t var_in) { const char *s = getenv(mp_obj_str_get_str(var_in)); if (s == NULL) { return mp_const_none; } - return mp_obj_new_str(s, strlen(s), false); + return mp_obj_new_str(s, strlen(s)); } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(mod_os_getenv_obj, mod_os_getenv); +MP_DEFINE_CONST_FUN_OBJ_1(mod_os_getenv_obj, mod_os_getenv); STATIC mp_obj_t mod_os_mkdir(mp_obj_t path_in) { // TODO: Accept mode param @@ -171,7 +171,7 @@ STATIC mp_obj_t listdir_next(mp_obj_t self_in) { } mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(3, NULL)); - t->items[0] = mp_obj_new_str(dirent->d_name, strlen(dirent->d_name), false); + t->items[0] = mp_obj_new_str(dirent->d_name, strlen(dirent->d_name)); #ifdef _DIRENT_HAVE_D_TYPE t->items[1] = MP_OBJ_NEW_SMALL_INT(dirent->d_type); #else @@ -207,7 +207,7 @@ STATIC mp_obj_t mod_os_errno(size_t n_args, const mp_obj_t *args) { errno = mp_obj_get_int(args[0]); return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_errno_obj, 0, 1, mod_os_errno); +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_errno_obj, 0, 1, mod_os_errno); STATIC const mp_rom_map_elem_t mp_module_os_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos) }, diff --git a/ports/unix/moduos_vfs.c b/ports/unix/moduos_vfs.c index 96defa5544e23..e9ac8e1f88244 100644 --- a/ports/unix/moduos_vfs.c +++ b/ports/unix/moduos_vfs.c @@ -28,17 +28,26 @@ #include #include "extmod/vfs.h" +#include "extmod/vfs_posix.h" #include "extmod/vfs_fat.h" #if MICROPY_VFS +// These are defined in modos.c +MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mod_os_errno_obj); +MP_DECLARE_CONST_FUN_OBJ_1(mod_os_getenv_obj); +MP_DECLARE_CONST_FUN_OBJ_1(mod_os_system_obj); + STATIC const mp_rom_map_elem_t uos_vfs_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uos_vfs) }, { MP_ROM_QSTR(MP_QSTR_sep), MP_ROM_QSTR(MP_QSTR__slash_) }, + { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mod_os_errno_obj) }, + { MP_ROM_QSTR(MP_QSTR_getenv), MP_ROM_PTR(&mod_os_getenv_obj) }, + { MP_ROM_QSTR(MP_QSTR_system), MP_ROM_PTR(&mod_os_system_obj) }, + { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&mp_vfs_mount_obj) }, { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&mp_vfs_umount_obj) }, - { MP_ROM_QSTR(MP_QSTR_vfs_open), MP_ROM_PTR(&mp_vfs_open_obj) }, { MP_ROM_QSTR(MP_QSTR_chdir), MP_ROM_PTR(&mp_vfs_chdir_obj) }, { MP_ROM_QSTR(MP_QSTR_getcwd), MP_ROM_PTR(&mp_vfs_getcwd_obj) }, @@ -52,6 +61,13 @@ STATIC const mp_rom_map_elem_t uos_vfs_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_statvfs), MP_ROM_PTR(&mp_vfs_statvfs_obj) }, { MP_ROM_QSTR(MP_QSTR_unlink), MP_ROM_PTR(&mp_vfs_remove_obj) }, // unlink aliases to remove + #if MICROPY_PY_OS_DUPTERM + { MP_ROM_QSTR(MP_QSTR_dupterm), MP_ROM_PTR(&mp_uos_dupterm_obj) }, + #endif + + #if MICROPY_VFS_POSIX + { MP_ROM_QSTR(MP_QSTR_VfsPosix), MP_ROM_PTR(&mp_type_vfs_posix) }, + #endif #if MICROPY_VFS_FAT { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, #endif diff --git a/ports/unix/moduselect.c b/ports/unix/moduselect.c index ba1c195ef4b70..1ea7dc19a5c68 100644 --- a/ports/unix/moduselect.c +++ b/ports/unix/moduselect.c @@ -40,6 +40,8 @@ #include "py/mphal.h" #include "fdfile.h" +#define DEBUG 0 + #if MICROPY_PY_SOCKET extern const mp_obj_type_t mp_type_socket; #endif @@ -277,12 +279,34 @@ STATIC mp_obj_t poll_iternext(mp_obj_t self_in) { return MP_OBJ_STOP_ITERATION; } +#if DEBUG +STATIC mp_obj_t poll_dump(mp_obj_t self_in) { + mp_obj_poll_t *self = MP_OBJ_TO_PTR(self_in); + + struct pollfd *entries = self->entries; + for (int i = self->len - 1; i >= 0; i--) { + printf("fd: %d ev: %x rev: %x", entries->fd, entries->events, entries->revents); + if (self->obj_map) { + printf(" obj: %p", self->obj_map[entries - self->entries]); + } + printf("\n"); + entries++; + } + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(poll_dump_obj, poll_dump); +#endif + STATIC const mp_rom_map_elem_t poll_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_register), MP_ROM_PTR(&poll_register_obj) }, { MP_ROM_QSTR(MP_QSTR_unregister), MP_ROM_PTR(&poll_unregister_obj) }, { MP_ROM_QSTR(MP_QSTR_modify), MP_ROM_PTR(&poll_modify_obj) }, { MP_ROM_QSTR(MP_QSTR_poll), MP_ROM_PTR(&poll_poll_obj) }, { MP_ROM_QSTR(MP_QSTR_ipoll), MP_ROM_PTR(&poll_ipoll_obj) }, + #if DEBUG + { MP_ROM_QSTR(MP_QSTR_dump), MP_ROM_PTR(&poll_dump_obj) }, + #endif }; STATIC MP_DEFINE_CONST_DICT(poll_locals_dict, poll_locals_dict_table); diff --git a/ports/unix/modusocket.c b/ports/unix/modusocket.c index cfb6a9f5ec468..95da276ed96fc 100644 --- a/ports/unix/modusocket.c +++ b/ports/unix/modusocket.c @@ -45,6 +45,8 @@ #include "py/builtin.h" #include "py/mphal.h" +#include "supervisor/shared/translate.h" + /* The idea of this module is to implement reasonable minimum of socket-related functions to write typical clients and servers. @@ -108,19 +110,26 @@ STATIC mp_uint_t socket_write(mp_obj_t o_in, const void *buf, mp_uint_t size, in return r; } -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - mp_obj_socket_t *self = MP_OBJ_TO_PTR(self_in); - // There's a POSIX drama regarding return value of close in general, - // and EINTR error in particular. See e.g. - // http://lwn.net/Articles/576478/ - // http://austingroupbugs.net/view.php?id=529 - // The rationale MicroPython follows is that close() just releases - // file descriptor. If you're interested to catch I/O errors before - // closing fd, fsync() it. - close(self->fd); - return mp_const_none; +STATIC mp_uint_t socket_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_socket_t *self = MP_OBJ_TO_PTR(o_in); + (void)arg; + switch (request) { + case MP_STREAM_CLOSE: + // There's a POSIX drama regarding return value of close in general, + // and EINTR error in particular. See e.g. + // http://lwn.net/Articles/576478/ + // http://austingroupbugs.net/view.php?id=529 + // The rationale MicroPython follows is that close() just releases + // file descriptor. If you're interested to catch I/O errors before + // closing fd, fsync() it. + close(self->fd); + return 0; + + default: + *errcode = MP_EINVAL; + return MP_STREAM_ERROR; + } } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); STATIC mp_obj_t socket_fileno(mp_obj_t self_in) { mp_obj_socket_t *self = MP_OBJ_TO_PTR(self_in); @@ -316,9 +325,9 @@ STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 3, socket_makefile); -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - (void)n_kw; + (void)kw_args; int family = AF_INET; int type = SOCK_STREAM; @@ -359,14 +368,16 @@ STATIC const mp_rom_map_elem_t usocket_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, }; STATIC MP_DEFINE_CONST_DICT(usocket_locals_dict, usocket_locals_dict_table); STATIC const mp_stream_p_t usocket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = socket_read, .write = socket_write, + .ioctl = socket_ioctl, }; const mp_obj_type_t mp_type_socket = { @@ -461,7 +472,7 @@ STATIC mp_obj_t mod_socket_getaddrinfo(size_t n_args, const mp_obj_t *args) { if (res != 0) { // CPython: socket.gaierror - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, "[addrinfo error %d]", res)); + nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError, translate("[addrinfo error %d]"), res)); } assert(addr_list); diff --git a/ports/unix/mpconfigport.h b/ports/unix/mpconfigport.h index db382e0a71a64..3ac7ceaf21a03 100644 --- a/ports/unix/mpconfigport.h +++ b/ports/unix/mpconfigport.h @@ -83,6 +83,7 @@ #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) #define MICROPY_PY_BUILTINS_INPUT (1) #define MICROPY_PY_BUILTINS_POW3 (1) +#define MICROPY_PY_BUILTINS_ROUND_INT (1) #define MICROPY_PY_MICROPYTHON_MEM_INFO (1) #define MICROPY_PY_ALL_SPECIAL_METHODS (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) @@ -97,18 +98,21 @@ #define MICROPY_PY_SYS_MAXSIZE (1) #define MICROPY_PY_SYS_STDFILES (1) #define MICROPY_PY_SYS_EXC_INFO (1) +#define MICROPY_PY_COLLECTIONS_DEQUE (1) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #ifndef MICROPY_PY_MATH_SPECIAL_FUNCTIONS #define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) #endif #define MICROPY_PY_CMATH (1) +#define MICROPY_PY_IO_IOBASE (1) #define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_IO_RESOURCE_STREAM (1) #define MICROPY_PY_GC_COLLECT_RETVAL (1) #define MICROPY_MODULE_FROZEN_STR (1) +#ifndef MICROPY_STACKLESS #define MICROPY_STACKLESS (0) #define MICROPY_STACKLESS_STRICT (0) +#endif #define MICROPY_PY_OS_STATVFS (1) #define MICROPY_PY_UTIME (1) @@ -121,7 +125,7 @@ #define MICROPY_PY_UHEAPQ (1) #define MICROPY_PY_UTIMEQ (1) #define MICROPY_PY_UHASHLIB (1) -#if MICROPY_PY_USSL && MICROPY_SSL_AXTLS +#if MICROPY_PY_USSL #define MICROPY_PY_UHASHLIB_SHA1 (1) #endif #define MICROPY_PY_UBINASCII (1) @@ -177,9 +181,9 @@ extern const struct _mp_obj_module_t mp_module_ffi; extern const struct _mp_obj_module_t mp_module_jni; #if MICROPY_PY_UOS_VFS -#define MICROPY_PY_UOS_VFS_DEF { MP_ROM_QSTR(MP_QSTR_uos_vfs), MP_ROM_PTR(&mp_module_uos_vfs) }, +#define MICROPY_PY_UOS_DEF { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos_vfs) }, #else -#define MICROPY_PY_UOS_VFS_DEF +#define MICROPY_PY_UOS_DEF { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_os) }, #endif #if MICROPY_PY_FFI #define MICROPY_PY_FFI_DEF { MP_ROM_QSTR(MP_QSTR_ffi), MP_ROM_PTR(&mp_module_ffi) }, @@ -218,8 +222,7 @@ extern const struct _mp_obj_module_t mp_module_jni; MICROPY_PY_UTIME_DEF \ MICROPY_PY_SOCKET_DEF \ { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_os) }, \ - MICROPY_PY_UOS_VFS_DEF \ + MICROPY_PY_UOS_DEF \ MICROPY_PY_USELECT_DEF \ MICROPY_PY_TERMIOS_DEF \ @@ -320,3 +323,6 @@ void mp_unix_mark_exec(void); // For debugging purposes, make printf() available to any source file. #include #endif + +#define MICROPY_PY_BUILTINS_HELP (1) +#define MICROPY_PY_BUILTINS_HELP_MODULES (1) diff --git a/ports/unix/mpconfigport.mk b/ports/unix/mpconfigport.mk index f0aa955c0c5b1..6bb1c9693fe38 100644 --- a/ports/unix/mpconfigport.mk +++ b/ports/unix/mpconfigport.mk @@ -40,3 +40,5 @@ MICROPY_PY_JNI = 0 # Avoid using system libraries, use copies bundled with MicroPython # as submodules (currently affects only libffi). MICROPY_STANDALONE = 0 + +CIRCUITPY_ULAB = 1 diff --git a/ports/unix/mpconfigport_coverage.h b/ports/unix/mpconfigport_coverage.h index 367b4853af25c..97c05cfee4fc3 100644 --- a/ports/unix/mpconfigport_coverage.h +++ b/ports/unix/mpconfigport_coverage.h @@ -34,13 +34,28 @@ #define MICROPY_FLOAT_HIGH_QUALITY_HASH (1) #define MICROPY_ENABLE_SCHEDULER (1) +#define MICROPY_READER_VFS (1) #define MICROPY_PY_DELATTR_SETATTR (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) +#define MICROPY_PY_BUILTINS_RANGE_BINOP (1) #define MICROPY_PY_BUILTINS_HELP (1) #define MICROPY_PY_BUILTINS_HELP_MODULES (1) #define MICROPY_PY_SYS_GETSIZEOF (1) #define MICROPY_PY_URANDOM_EXTRA_FUNCS (1) #define MICROPY_PY_IO_BUFFEREDWRITER (1) +#define MICROPY_PY_IO_RESOURCE_STREAM (1) +#define MICROPY_VFS_POSIX (1) #undef MICROPY_VFS_FAT #define MICROPY_VFS_FAT (1) +#define MICROPY_FATFS_USE_LABEL (1) #define MICROPY_PY_FRAMEBUF (1) +#define MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT (1) + +// TODO these should be generic, not bound to fatfs +#define mp_type_fileio mp_type_vfs_posix_fileio +#define mp_type_textio mp_type_vfs_posix_textio + +// use vfs's functions for import stat and builtin open +#define mp_import_stat mp_vfs_import_stat +#define mp_builtin_open mp_vfs_open +#define mp_builtin_open_obj mp_vfs_open_obj diff --git a/ports/unix/mpthreadport.c b/ports/unix/mpthreadport.c index 8c636a4457c10..baca0a2b1e642 100644 --- a/ports/unix/mpthreadport.c +++ b/ports/unix/mpthreadport.c @@ -66,6 +66,10 @@ STATIC void mp_thread_gc(int signo, siginfo_t *info, void *context) { // that we don't need the extra information, enough is captured by the // gc_collect_regs_and_stack function above //gc_collect_root((void**)context, sizeof(ucontext_t) / sizeof(uintptr_t)); + #if MICROPY_ENABLE_PYSTACK + void **ptrs = (void**)(void*)MP_STATE_THREAD(pystack_start); + gc_collect_root(ptrs, (MP_STATE_THREAD(pystack_cur) - MP_STATE_THREAD(pystack_start)) / sizeof(void*)); + #endif thread_signal_done = 1; } } diff --git a/ports/windows/.appveyor.yml b/ports/windows/.appveyor.yml deleted file mode 100644 index a82cf5adc963a..0000000000000 --- a/ports/windows/.appveyor.yml +++ /dev/null @@ -1,32 +0,0 @@ -environment: - # Python version used - MICROPY_CPYTHON3: c:/python34/python.exe - -init: - # Set build version number to commit to be travis-like -- ps: Update-AppveyorBuild -Version $env:appveyor_repo_commit.substring(0,8) - -configuration: -- Debug -- Release - -platform: -- x86 -- x64 - -build: - project: ports/windows/micropython.vcxproj - verbosity: normal - -test_script: -- cmd: >- - cd tests - - %MICROPY_CPYTHON3% run-tests - -skip_tags: true - -deploy: off - -nuget: - disable_publish_on_pr: true diff --git a/ports/windows/.gitignore b/ports/windows/.gitignore deleted file mode 100644 index 12235e7c9e227..0000000000000 --- a/ports/windows/.gitignore +++ /dev/null @@ -1,11 +0,0 @@ -*.user -*.*sdf -*.suo -*.sln -*.exe -*.pdb -*.ilk -*.filters -/build/* -.vs/* -*.VC.*db diff --git a/ports/windows/Makefile b/ports/windows/Makefile deleted file mode 100644 index b6433300fe2be..0000000000000 --- a/ports/windows/Makefile +++ /dev/null @@ -1,65 +0,0 @@ -include ../../py/mkenv.mk --include mpconfigport.mk - -# define main target -PROG = micropython.exe - -# qstr definitions (must come before including py.mk) -QSTR_DEFS = ../unix/qstrdefsport.h - -# include py core make definitions -include $(TOP)/py/py.mk - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) - -# compiler settings -CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -DUNIX -D__USE_MINGW_ANSI_STDIO=1 $(CFLAGS_MOD) $(COPT) -LDFLAGS = $(LDFLAGS_MOD) -lm - -# Debugging/Optimization -ifdef DEBUG -CFLAGS += -g -COPT = -O0 -else -COPT = -Os #-DNDEBUG -endif - -# source files -SRC_C = \ - ports/unix/main.c \ - ports/unix/file.c \ - ports/unix/input.c \ - ports/unix/modos.c \ - ports/unix/modmachine.c \ - ports/unix/modtime.c \ - ports/unix/gccollect.c \ - windows_mphal.c \ - realpath.c \ - init.c \ - sleep.c \ - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -ifeq ($(MICROPY_USE_READLINE),1) -CFLAGS_MOD += -DMICROPY_USE_READLINE=1 -SRC_C += lib/mp-readline/readline.c -else ifeq ($(MICROPY_USE_READLINE),2) -CFLAGS_MOD += -DMICROPY_USE_READLINE=2 -LDFLAGS_MOD += -lreadline -endif - -ifeq ($(CROSS_COMPILE),x86_64-w64-mingw32-) -CFLAGS_MOD += -DMICROPY_NLR_SETJMP=1 -endif - -LIB += -lws2_32 - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) -# Append any auto-generated sources that are needed by sources listed in -# SRC_QSTR -SRC_QSTR_AUTO_DEPS += - -include $(TOP)/py/mkrules.mk diff --git a/ports/windows/README.md b/ports/windows/README.md deleted file mode 100644 index f1bd405513b99..0000000000000 --- a/ports/windows/README.md +++ /dev/null @@ -1,74 +0,0 @@ -This is the experimental, community-supported Windows port of MicroPython. -It is based on Unix port, and expected to remain so. -The port requires additional testing, debugging, and patches. Please -consider to contribute. - - -Building on Debian/Ubuntu Linux system ---------------------------------------- - - sudo apt-get install gcc-mingw-w64 - make CROSS_COMPILE=i686-w64-mingw32- - -If for some reason the mingw-w64 crosscompiler is not available, you can try -mingw32 instead, but it comes with a really old gcc which may produce some -spurious errors (you may need to disable -Werror): - - sudo apt-get install mingw32 mingw32-binutils mingw32-runtime - make CROSS_COMPILE=i586-mingw32msvc- - - -Building under Cygwin ---------------------- - -Install following packages using cygwin's setup.exe: - -* mingw64-i686-gcc-core -* mingw64-x86_64-gcc-core -* make - -Build using: - - make CROSS_COMPILE=i686-w64-mingw32- - -Or for 64bit: - - make CROSS_COMPILE=x86_64-w64-mingw32- - - -Building using MS Visual Studio 2013 (or higher) ------------------------------------------------- - -In the IDE, open `micropython.vcxproj` and build. - -To build from the command line: - - msbuild micropython.vcxproj - -__Stack usage__ - -The msvc compiler is quite stack-hungry which might result in a "maximum recursion depth exceeded" -RuntimeError for code with lots of nested function calls. -There are several ways to deal with this: -- increase the threshold used for detection by altering the argument to `mp_stack_set_limit` in `ports/unix/main.c` -- disable detection all together by setting `MICROPY_STACK_CHECK` to "0" in `ports/windows/mpconfigport.h` -- disable the /GL compiler flag by setting `WholeProgramOptimization` to "false" - -See [issue 2927](https://github.com/micropython/micropython/issues/2927) for more information. - - -Running on Linux using Wine ---------------------------- - -The default build (MICROPY_USE_READLINE=1) uses extended Windows console -functions and thus should be ran using the `wineconsole` tool. Depending -on the Wine build configuration, you may also want to select the curses -backend which has the look&feel of a standard Unix console: - - wineconsole --backend=curses ./micropython.exe - -For more info, see https://www.winehq.org/docs/wineusr-guide/cui-programs . - -If built without line editing and history capabilities -(MICROPY_USE_READLINE=0), the resulting binary can be run using the standard -`wine` tool. diff --git a/ports/windows/init.c b/ports/windows/init.c deleted file mode 100644 index 09fa10417bbe3..0000000000000 --- a/ports/windows/init.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include -#ifdef _MSC_VER -#include -#endif -#include "sleep.h" - -extern BOOL WINAPI console_sighandler(DWORD evt); - -#ifdef _MSC_VER -void invalid_param_handler(const wchar_t *expr, const wchar_t *fun, const wchar_t *file, unsigned int line, uintptr_t p) { -} -#endif - -void init() { -#ifdef _MSC_VER - // Disable the 'Debug Error!' dialog for assertions failures and the likes, - // instead write messages to the debugger output and terminate. - _CrtSetReportMode(_CRT_ASSERT, _CRTDBG_MODE_DEBUG); - _CrtSetReportMode(_CRT_WARN, _CRTDBG_MODE_DEBUG); - _CrtSetReportMode(_CRT_ERROR, _CRTDBG_MODE_DEBUG); - - // Disable 'invalid parameter handling' which is for instance invoked when - // passing invalid file descriptors to functions like lseek() and make the - // functions called behave properly by setting errno to EBADF/EINVAL/.. - _set_invalid_parameter_handler(invalid_param_handler); -#endif - SetConsoleCtrlHandler(console_sighandler, TRUE); - init_sleep(); -#ifdef __MINGW32__ - putenv("PRINTF_EXPONENT_DIGITS=2"); -#elif _MSC_VER < 1900 - // This is only necessary for Visual Studio versions 2013 and below: - // https://msdn.microsoft.com/en-us/library/bb531344(v=vs.140).aspx - _set_output_format(_TWO_DIGIT_EXPONENT); -#endif -} - -void deinit() { - SetConsoleCtrlHandler(console_sighandler, FALSE); - deinit_sleep(); -} diff --git a/ports/windows/init.h b/ports/windows/init.h deleted file mode 100644 index c6fddb257ee6c..0000000000000 --- a/ports/windows/init.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_INIT_H -#define MICROPY_INCLUDED_WINDOWS_INIT_H - -void init(void); -void deinit(void); - -#endif // MICROPY_INCLUDED_WINDOWS_INIT_H diff --git a/ports/windows/micropython.vcxproj b/ports/windows/micropython.vcxproj deleted file mode 100644 index ee0b98abba871..0000000000000 --- a/ports/windows/micropython.vcxproj +++ /dev/null @@ -1,104 +0,0 @@ - - - - - Debug - Win32 - - - Release - Win32 - - - Debug - x64 - - - Release - x64 - - - - {740F3C30-EB6C-4B59-9C50-AE4D5A4A9D12} - micropython - - - - Application - true - $(DefaultPlatformToolset) - MultiByte - - - Application - false - $(DefaultPlatformToolset) - true - MultiByte - - - Application - true - $(DefaultPlatformToolset) - MultiByte - - - Application - false - $(DefaultPlatformToolset) - true - MultiByte - - - - - - - - - - - - - - - - - - - - - - - - - - msvc/user.props - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/ports/windows/mpconfigport.h b/ports/windows/mpconfigport.h deleted file mode 100644 index abad352825045..0000000000000 --- a/ports/windows/mpconfigport.h +++ /dev/null @@ -1,251 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -// options to control how MicroPython is built - -// Linking with GNU readline (MICROPY_USE_READLINE == 2) causes binary to be licensed under GPL -#ifndef MICROPY_USE_READLINE -#define MICROPY_USE_READLINE (1) -#endif - -#define MICROPY_ALLOC_PATH_MAX (260) //see minwindef.h for msvc or limits.h for mingw -#define MICROPY_PERSISTENT_CODE_LOAD (1) -#define MICROPY_EMIT_X64 (0) -#define MICROPY_EMIT_THUMB (0) -#define MICROPY_EMIT_INLINE_THUMB (0) -#define MICROPY_COMP_MODULE_CONST (1) -#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (1) -#define MICROPY_COMP_RETURN_IF_EXPR (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_ENABLE_FINALISER (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_MALLOC_USES_ALLOCATED_SIZE (1) -#define MICROPY_MEM_STATS (1) -#define MICROPY_DEBUG_PRINTERS (1) -#define MICROPY_DEBUG_PRINTER_DEST mp_stderr_print -#define MICROPY_READER_POSIX (1) -#define MICROPY_USE_READLINE_HISTORY (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_EMACS_KEYS (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_HELPER_LEXER_UNIX (1) -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_DOUBLE) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) -#define MICROPY_STREAMS_NON_BLOCK (1) -#define MICROPY_OPT_COMPUTED_GOTO (0) -#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (1) -#define MICROPY_CAN_OVERRIDE_BUILTINS (1) -#define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_DESCRIPTORS (1) -#define MICROPY_PY_BUILTINS_STR_UNICODE (1) -#define MICROPY_PY_BUILTINS_STR_CENTER (1) -#define MICROPY_PY_BUILTINS_STR_PARTITION (1) -#define MICROPY_PY_BUILTINS_STR_SPLITLINES (1) -#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) -#define MICROPY_PY_BUILTINS_FROZENSET (1) -#define MICROPY_PY_BUILTINS_COMPILE (1) -#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) -#define MICROPY_PY_BUILTINS_INPUT (1) -#define MICROPY_PY_BUILTINS_POW3 (1) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_ALL_SPECIAL_METHODS (1) -#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) -#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) -#define MICROPY_PY_SYS_EXIT (1) -#define MICROPY_PY_SYS_PLATFORM "win32" -#define MICROPY_PY_SYS_MAXSIZE (1) -#define MICROPY_PY_SYS_STDFILES (1) -#define MICROPY_PY_SYS_EXC_INFO (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -#define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) -#define MICROPY_PY_CMATH (1) -#define MICROPY_PY_IO_FILEIO (1) -#define MICROPY_PY_GC_COLLECT_RETVAL (1) -#define MICROPY_MODULE_FROZEN_STR (0) - -#define MICROPY_STACKLESS (0) -#define MICROPY_STACKLESS_STRICT (0) - -#define MICROPY_PY_UTIME (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_UCTYPES (1) -#define MICROPY_PY_UZLIB (1) -#define MICROPY_PY_UJSON (1) -#define MICROPY_PY_URE (1) -#define MICROPY_PY_UHEAPQ (1) -#define MICROPY_PY_UTIMEQ (1) -#define MICROPY_PY_UHASHLIB (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UBINASCII_CRC32 (1) -#define MICROPY_PY_URANDOM (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PULSE (1) -#define MICROPY_MACHINE_MEM_GET_READ_ADDR mod_machine_mem_get_addr -#define MICROPY_MACHINE_MEM_GET_WRITE_ADDR mod_machine_mem_get_addr - -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_DETAILED) -#define MICROPY_WARNINGS (1) -#define MICROPY_PY_STR_BYTES_CMP_WARN (1) - -#ifdef _MSC_VER -#define MICROPY_GCREGS_SETJMP (1) -#endif - -#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1) -#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (256) -#define MICROPY_KBD_EXCEPTION (1) - -#define MICROPY_PORT_INIT_FUNC init() -#define MICROPY_PORT_DEINIT_FUNC deinit() - -// type definitions for the specific machine - -#if defined( __MINGW32__ ) && defined( __LP64__ ) -typedef long mp_int_t; // must be pointer size -typedef unsigned long mp_uint_t; // must be pointer size -#elif defined ( __MINGW32__ ) && defined( _WIN64 ) -#include -typedef __int64 mp_int_t; -typedef unsigned __int64 mp_uint_t; -#define MP_SSIZE_MAX __INT64_MAX__ -#elif defined ( _MSC_VER ) && defined( _WIN64 ) -typedef __int64 mp_int_t; -typedef unsigned __int64 mp_uint_t; -#else -// These are definitions for machines where sizeof(int) == sizeof(void*), -// regardless for actual size. -typedef int mp_int_t; // must be pointer size -typedef unsigned int mp_uint_t; // must be pointer size -#endif - -// Just assume Windows is little-endian - mingw32 gcc doesn't -// define standard endianness macros. -#define MP_ENDIANNESS_LITTLE (1) - -// Cannot include , as it may lead to symbol name clashes -#if _FILE_OFFSET_BITS == 64 && !defined(__LP64__) -typedef long long mp_off_t; -#else -typedef long mp_off_t; -#endif - -#if MICROPY_PY_OS_DUPTERM -#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) -void mp_hal_dupterm_tx_strn(const char *str, size_t len); -#else -#include -#define MP_PLAT_PRINT_STRN(str, len) do { int ret = write(1, str, len); (void)ret; } while (0) -#define mp_hal_dupterm_tx_strn(s, l) -#endif - -#define MICROPY_PORT_BUILTINS \ - { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, - -extern const struct _mp_obj_module_t mp_module_os; -extern const struct _mp_obj_module_t mp_module_time; -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_time) }, \ - { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) }, \ - { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_os) }, \ - -#if MICROPY_USE_READLINE == 1 -#define MICROPY_PORT_ROOT_POINTERS \ - char *readline_hist[50]; -#endif - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_MPHALPORT_H "windows_mphal.h" - -// We need to provide a declaration/definition of alloca() -#include - -#include "realpath.h" -#include "init.h" -#include "sleep.h" - -#ifdef __GNUC__ -#define MP_NOINLINE __attribute__((noinline)) -#endif - -// MSVC specifics -#ifdef _MSC_VER - -// Sanity check - -#if ( _MSC_VER < 1800 ) - #error Can only build with Visual Studio 2013 toolset -#endif - - -// CL specific overrides from mpconfig - -#define NORETURN __declspec(noreturn) -#define MP_NOINLINE __declspec(noinline) -#define MP_LIKELY(x) (x) -#define MP_UNLIKELY(x) (x) -#define MICROPY_PORT_CONSTANTS { "dummy", 0 } //can't have zero-sized array -#ifdef _WIN64 -#define MP_SSIZE_MAX _I64_MAX -#else -#define MP_SSIZE_MAX _I32_MAX -#endif - - -// CL specific definitions - -#define restrict -#define inline __inline -#define alignof(t) __alignof(t) -#define PATH_MAX MICROPY_ALLOC_PATH_MAX -#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) -#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR) -#ifdef _WIN64 -#define SSIZE_MAX _I64_MAX -typedef __int64 ssize_t; -#else -#define SSIZE_MAX _I32_MAX -typedef int ssize_t; -#endif - - -// Put static/global variables in sections with a known name -// This used to be required for GC, not the case anymore but keep it as it makes the map file easier to inspect -// For this to work this header must be included by all sources, which is the case normally -#define MICROPY_PORT_DATASECTION "upydata" -#define MICROPY_PORT_BSSSECTION "upybss" -#pragma data_seg(MICROPY_PORT_DATASECTION) -#pragma bss_seg(MICROPY_PORT_BSSSECTION) - - -// System headers (needed e.g. for nlr.h) - -#include //for NULL -#include //for assert - -#endif diff --git a/ports/windows/mpconfigport.mk b/ports/windows/mpconfigport.mk deleted file mode 100644 index 87001d464f2e3..0000000000000 --- a/ports/windows/mpconfigport.mk +++ /dev/null @@ -1,10 +0,0 @@ -# Enable/disable modules and 3rd-party libs to be included in interpreter - -# Build 32-bit binaries on a 64-bit host -MICROPY_FORCE_32BIT = 0 - -# Linking with GNU readline causes binary to be licensed under GPL -MICROPY_USE_READLINE = 1 - -# ffi module requires libffi (libffi-dev Debian package) -MICROPY_PY_FFI = 0 diff --git a/ports/windows/msvc/common.props b/ports/windows/msvc/common.props deleted file mode 100644 index 26ea78e7e5111..0000000000000 --- a/ports/windows/msvc/common.props +++ /dev/null @@ -1,47 +0,0 @@ - - - - - - - - $(PyOutDir) - $(PyIntDir) - $(PyBuildDir)copycookie$(Configuration)$(Platform) - - - - $(PyIncDirs);%(AdditionalIncludeDirectories) - _USE_MATH_DEFINES;_CRT_SECURE_NO_WARNINGS;_MBCS;%(PreprocessorDefinitions) - false - Level1 - false - true - false - - - true - true - - - - - $(PyWinDir)%(FileName)%(Extension) - - - - - - - - - - - - diff --git a/ports/windows/msvc/debug.props b/ports/windows/msvc/debug.props deleted file mode 100644 index fa1ca4fcbc998..0000000000000 --- a/ports/windows/msvc/debug.props +++ /dev/null @@ -1,9 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/ports/windows/msvc/dirent.c b/ports/windows/msvc/dirent.c deleted file mode 100644 index e050432a1707d..0000000000000 --- a/ports/windows/msvc/dirent.c +++ /dev/null @@ -1,103 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2015 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ - -#include "dirent.h" -#include -#include - -typedef struct DIR { - HANDLE findHandle; - WIN32_FIND_DATA findData; - struct dirent result; -} DIR; - -DIR *opendir(const char *name) { - if (!name || !*name) { - errno = ENOENT; - return NULL; - } - - DIR *dir = malloc(sizeof(DIR)); - if (!dir) { - errno = ENOMEM; - return NULL; - } - dir->result.d_ino = 0; - dir->result.d_name = NULL; - dir->findHandle = INVALID_HANDLE_VALUE; - - const size_t nameLen = strlen(name); - char *path = malloc(nameLen + 3); // allocate enough for adding "/*" - if (!path) { - free(dir); - errno = ENOMEM; - return NULL; - } - strcpy(path, name); - - // assure path ends with wildcard - const char lastChar = path[nameLen - 1]; - if (lastChar != '*') { - const char *appendWC = (lastChar != '/' && lastChar != '\\') ? "/*" : "*"; - strcat(path, appendWC); - } - - // init - dir->findHandle = FindFirstFile(path, &dir->findData); - free(path); - if (dir->findHandle == INVALID_HANDLE_VALUE) { - free(dir); - errno = ENOENT; - return NULL; - } - return dir; -} - -int closedir(DIR *dir) { - if (dir) { - FindClose(dir->findHandle); - free(dir); - return 0; - } else { - errno = EBADF; - return -1; - } -} - -struct dirent *readdir(DIR *dir) { - if (!dir) { - errno = EBADF; - return NULL; - } - - // first pass d_name is NULL so use result from FindFirstFile in opendir, else use FindNextFile - if (!dir->result.d_name || FindNextFile(dir->findHandle, &dir->findData)) { - dir->result.d_name = dir->findData.cFileName; - return &dir->result; - } - - return NULL; -} diff --git a/ports/windows/msvc/dirent.h b/ports/windows/msvc/dirent.h deleted file mode 100644 index fca06785a66ff..0000000000000 --- a/ports/windows/msvc/dirent.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2015 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H - -// dirent.h implementation for msvc - -// for ino_t -#include - -// opaque DIR structure -typedef struct DIR DIR; - -// the dirent structure -// d_ino is always 0 - if ever needed use GetFileInformationByHandle -typedef struct dirent { - ino_t d_ino; - char *d_name; -} dirent; - -DIR *opendir(const char *name); -int closedir(DIR *dir); -struct dirent *readdir(DIR *dir); - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_DIRENT_H diff --git a/ports/windows/msvc/genhdr.targets b/ports/windows/msvc/genhdr.targets deleted file mode 100644 index ee030c90631eb..0000000000000 --- a/ports/windows/msvc/genhdr.targets +++ /dev/null @@ -1,117 +0,0 @@ - - - - - - - - - - - $(PyBuildDir)genhdr\ - $(PyBaseDir)py\ - $(PyBaseDir)ports\unix\qstrdefsport.h - $(PySrcDir)qstrdefs.h - $(DestDir)qstrdefscollected.h - $(DestDir)qstrdefs.generated.h - python - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $([System.String]::new('%(FullPath)').Replace('$(PyBaseDir)', '$(DestDir)qstr\')) - - - $([System.IO.Path]::ChangeExtension('%(OutFile)', '.pp')) - $([System.IO.Path]::GetDirectoryName('%(OutFile)')) - - - True - - - True - - - - @(QstrDependencies->AnyHaveMetadataValue('Changed', 'True')) - @(PyQstrSourceFiles->AnyHaveMetadataValue('Changed', 'True')) - - - - - - - - - - - - $(QstrGen).tmp - - - - - - - - - $(DestDir)mpversion.h - $(DestFile).tmp - - - - - - - - - - - - - - - - - - diff --git a/ports/windows/msvc/gettimeofday.c b/ports/windows/msvc/gettimeofday.c deleted file mode 100644 index 5f816df7097d0..0000000000000 --- a/ports/windows/msvc/gettimeofday.c +++ /dev/null @@ -1,58 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ - -#include - -typedef union { - unsigned __int64 tm; // time in 100 nanoseconds interval - FILETIME ft; -} FT; - -int gettimeofday(struct timeval *tp, struct timezone *tz) { - if (tp == NULL) { - return 0; - } - - // UTC time - FT ft; - ZeroMemory(&ft, sizeof(ft)); - GetSystemTimeAsFileTime(&ft.ft); - - // to microseconds - ft.tm /= 10; - - // convert to unix format - // number of microseconds intervals between the 1st january 1601 and the 1st january 1970 (369 years + 89 leap days) - const unsigned __int64 deltaEpoch = 11644473600000000ull; - const unsigned __int64 microSecondsToSeconds = 1000000ull; - tp->tv_usec = ft.tm % microSecondsToSeconds; - tp->tv_sec = (ft.tm - deltaEpoch) / microSecondsToSeconds; - - // see man gettimeofday: timezone is deprecated and expected to be NULL - (void)tz; - - return 0; -} diff --git a/ports/windows/msvc/paths.props b/ports/windows/msvc/paths.props deleted file mode 100644 index db3af4c0faaa3..0000000000000 --- a/ports/windows/msvc/paths.props +++ /dev/null @@ -1,45 +0,0 @@ - - - - True - - - - - $([System.IO.Path]::GetFullPath(`$(MSBuildThisFileDirectory)..\..\..`))\ - $(PyBaseDir)ports\windows\ - $(PyWinDir)build\ - - - $(PyBaseDir);$(PyWinDir);$(PyBuildDir);$(PyWinDir)msvc - - - $(Platform) - $(Configuration) - - - $(PyBuildDir)$(PyConfiguration)$(PyPlatform)\ - $(PyOutDir)obj\ - - diff --git a/ports/windows/msvc/release.props b/ports/windows/msvc/release.props deleted file mode 100644 index ea0bf433d3a18..0000000000000 --- a/ports/windows/msvc/release.props +++ /dev/null @@ -1,16 +0,0 @@ - - - - - - - - true - true - - - true - - - - diff --git a/ports/windows/msvc/sources.props b/ports/windows/msvc/sources.props deleted file mode 100644 index b85295ebc09c2..0000000000000 --- a/ports/windows/msvc/sources.props +++ /dev/null @@ -1,37 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/ports/windows/msvc/sys/time.h b/ports/windows/msvc/sys/time.h deleted file mode 100644 index 7c95d409e4373..0000000000000 --- a/ports/windows/msvc/sys/time.h +++ /dev/null @@ -1,32 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H - -// Get the definitions for timeval etc -#include - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_SYS_TIME_H diff --git a/ports/windows/msvc/unistd.h b/ports/windows/msvc/unistd.h deleted file mode 100644 index 1a1629be4ff16..0000000000000 --- a/ports/windows/msvc/unistd.h +++ /dev/null @@ -1,44 +0,0 @@ -/* -* This file is part of the MicroPython project, http://micropython.org/ -* -* The MIT License (MIT) -* -* Copyright (c) 2013, 2014 Damien P. George -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -* THE SOFTWARE. -*/ -#ifndef MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H -#define MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H - -// There's no unistd.h, but this is the equivalent -#include - -#define F_OK 0 -#define W_OK 2 -#define R_OK 4 - -#define STDIN_FILENO 0 -#define STDOUT_FILENO 1 -#define STDERR_FILENO 2 - -#define SEEK_CUR 1 -#define SEEK_END 2 -#define SEEK_SET 0 - -#endif // MICROPY_INCLUDED_WINDOWS_MSVC_UNISTD_H diff --git a/ports/windows/realpath.c b/ports/windows/realpath.c deleted file mode 100644 index ac9adf81253f4..0000000000000 --- a/ports/windows/realpath.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -// Make sure a path only has forward slashes. -char *to_unix_path(char *p) { - if (p != NULL) { - char *pp = p; - while (*pp != 0) { - if (*pp == '\\') - *pp = '/'; - ++pp; - } - } - return p; -} - -// Implement realpath() using _fullpath and make it use the same error codes as realpath() on unix. -// Also have it return a path with forward slashes only as some code relies on this, -// but _fullpath() returns backward slashes no matter what. -char *realpath(const char *path, char *resolved_path) { - char *ret = NULL; - if (path == NULL) { - errno = EINVAL; - } else if (access(path, R_OK) == 0) { - ret = resolved_path; - if (ret == NULL) - ret = malloc(_MAX_PATH); - if (ret == NULL) { - errno = ENOMEM; - } else { - ret = _fullpath(ret, path, _MAX_PATH); - if (ret == NULL) - errno = EIO; - } - } - return to_unix_path(ret); -} diff --git a/ports/windows/realpath.h b/ports/windows/realpath.h deleted file mode 100644 index 869fe80fae89d..0000000000000 --- a/ports/windows/realpath.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_REALPATH_H -#define MICROPY_INCLUDED_WINDOWS_REALPATH_H - -extern char *realpath(const char *path, char *resolved_path); - -#endif // MICROPY_INCLUDED_WINDOWS_REALPATH_H diff --git a/ports/windows/sleep.c b/ports/windows/sleep.c deleted file mode 100644 index 6043ec7b7b0ca..0000000000000 --- a/ports/windows/sleep.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -HANDLE waitTimer = NULL; - -void init_sleep(void) { - waitTimer = CreateWaitableTimer(NULL, TRUE, NULL); -} - -void deinit_sleep(void) { - if (waitTimer != NULL) { - CloseHandle(waitTimer); - waitTimer = NULL; - } -} - -int usleep_impl(__int64 usec) { - if (waitTimer == NULL) { - errno = EAGAIN; - return -1; - } - if (usec < 0 || usec > LLONG_MAX / 10) { - errno = EINVAL; - return -1; - } - - LARGE_INTEGER ft; - ft.QuadPart = -10 * usec; // 100 nanosecond interval, negative value = relative time - if (SetWaitableTimer(waitTimer, &ft, 0, NULL, NULL, 0) == 0) { - errno = EINVAL; - return -1; - } - if (WaitForSingleObject(waitTimer, INFINITE) != WAIT_OBJECT_0) { - errno = EAGAIN; - return -1; - } - return 0; -} - -#ifdef _MSC_VER // mingw and the likes provide their own usleep() -int usleep(__int64 usec) { - return usleep_impl(usec); -} -#endif - -void msec_sleep(double msec) { - const double usec = msec * 1000.0; - usleep_impl(usec > (double)LLONG_MAX ? LLONG_MAX : (__int64)usec); -} diff --git a/ports/windows/sleep.h b/ports/windows/sleep.h deleted file mode 100644 index 430ec3a436de0..0000000000000 --- a/ports/windows/sleep.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_WINDOWS_SLEEP_H -#define MICROPY_INCLUDED_WINDOWS_SLEEP_H - -void init_sleep(void); -void deinit_sleep(void); -void msec_sleep(double msec); -#ifdef _MSC_VER -int usleep(__int64 usec); -#endif - -#endif // MICROPY_INCLUDED_WINDOWS_SLEEP_H diff --git a/ports/windows/windows_mphal.c b/ports/windows/windows_mphal.c deleted file mode 100644 index 153b044235434..0000000000000 --- a/ports/windows/windows_mphal.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - - -#include "py/mpstate.h" -#include "py/mphal.h" - -#include -#include -#include - -HANDLE std_in = NULL; -HANDLE con_out = NULL; -DWORD orig_mode = 0; - -STATIC void assure_stdin_handle() { - if (!std_in) { - std_in = GetStdHandle(STD_INPUT_HANDLE); - assert(std_in != INVALID_HANDLE_VALUE); - } -} - -STATIC void assure_conout_handle() { - if (!con_out) { - con_out = CreateFile("CONOUT$", GENERIC_READ | GENERIC_WRITE, - FILE_SHARE_READ | FILE_SHARE_WRITE, - NULL, OPEN_EXISTING, 0, 0); - assert(con_out != INVALID_HANDLE_VALUE); - } -} - -void mp_hal_stdio_mode_raw(void) { - assure_stdin_handle(); - GetConsoleMode(std_in, &orig_mode); - DWORD mode = orig_mode; - mode &= ~ENABLE_ECHO_INPUT; - mode &= ~ENABLE_LINE_INPUT; - mode &= ~ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); -} - -void mp_hal_stdio_mode_orig(void) { - assure_stdin_handle(); - SetConsoleMode(std_in, orig_mode); -} - -// Handler to be installed by SetConsoleCtrlHandler, currently used only to handle Ctrl-C. -// This handler has to be installed just once (this has to be done elswhere in init code). -// Previous versions of the mp_hal code would install a handler whenever Ctrl-C input is -// allowed and remove the handler again when it is not. That is not necessary though (1), -// and it might introduce problems (2) because console notifications are delivered to the -// application in a separate thread. -// (1) mp_hal_set_interrupt_char effectively enables/disables processing of Ctrl-C via the -// ENABLE_PROCESSED_INPUT flag so in raw mode console_sighandler won't be called. -// (2) if mp_hal_set_interrupt_char would remove the handler while Ctrl-C was issued earlier, -// the thread created for handling it might not be running yet so we'd miss the notification. -BOOL WINAPI console_sighandler(DWORD evt) { - if (evt == CTRL_C_EVENT) { - if (MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))) { - // this is the second time we are called, so die straight away - exit(1); - } - mp_obj_exception_clear_traceback(MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))); - MP_STATE_VM(mp_pending_exception) = MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)); - return TRUE; - } - return FALSE; -} - -void mp_hal_set_interrupt_char(char c) { - assure_stdin_handle(); - if (c == CHAR_CTRL_C) { - DWORD mode; - GetConsoleMode(std_in, &mode); - mode |= ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); - } else { - DWORD mode; - GetConsoleMode(std_in, &mode); - mode &= ~ENABLE_PROCESSED_INPUT; - SetConsoleMode(std_in, mode); - } -} - -void mp_hal_move_cursor_back(uint pos) { - assure_conout_handle(); - CONSOLE_SCREEN_BUFFER_INFO info; - GetConsoleScreenBufferInfo(con_out, &info); - info.dwCursorPosition.X -= (short)pos; - if (info.dwCursorPosition.X < 0) { - info.dwCursorPosition.X = 0; - } - SetConsoleCursorPosition(con_out, info.dwCursorPosition); -} - -void mp_hal_erase_line_from_cursor(uint n_chars_to_erase) { - assure_conout_handle(); - CONSOLE_SCREEN_BUFFER_INFO info; - GetConsoleScreenBufferInfo(con_out, &info); - DWORD written; - FillConsoleOutputCharacter(con_out, ' ', n_chars_to_erase, info.dwCursorPosition, &written); - FillConsoleOutputAttribute(con_out, info.wAttributes, n_chars_to_erase, info.dwCursorPosition, &written); -} - -typedef struct item_t { - WORD vkey; - const char *seq; -} item_t; - -// map virtual key codes to VT100 escape sequences -STATIC item_t keyCodeMap[] = { - {VK_UP, "[A"}, - {VK_DOWN, "[B"}, - {VK_RIGHT, "[C"}, - {VK_LEFT, "[D"}, - {VK_HOME, "[H"}, - {VK_END, "[F"}, - {VK_DELETE, "[3~"}, - {0, ""} //sentinel -}; - -STATIC const char *cur_esc_seq = NULL; - -STATIC int esc_seq_process_vk(int vk) { - for (item_t *p = keyCodeMap; p->vkey != 0; ++p) { - if (p->vkey == vk) { - cur_esc_seq = p->seq; - return 27; // ESC, start of escape sequence - } - } - return 0; // nothing found -} - -STATIC int esc_seq_chr() { - if (cur_esc_seq) { - const char c = *cur_esc_seq++; - if (c) { - return c; - } - cur_esc_seq = NULL; - } - return 0; -} - -int mp_hal_stdin_rx_chr(void) { - // currently processing escape seq? - const int ret = esc_seq_chr(); - if (ret) { - return ret; - } - - // poll until key which we handle is pressed - assure_stdin_handle(); - DWORD num_read; - INPUT_RECORD rec; - for (;;) { - if (!ReadConsoleInput(std_in, &rec, 1, &num_read) || !num_read) { - return CHAR_CTRL_C; // EOF, ctrl-D - } - if (rec.EventType != KEY_EVENT || !rec.Event.KeyEvent.bKeyDown) { // only want key down events - continue; - } - const char c = rec.Event.KeyEvent.uChar.AsciiChar; - if (c) { // plain ascii char, return it - return c; - } - const int ret = esc_seq_process_vk(rec.Event.KeyEvent.wVirtualKeyCode); - if (ret) { - return ret; - } - } -} - -void mp_hal_stdout_tx_strn(const char *str, size_t len) { - write(1, str, len); -} - -void mp_hal_stdout_tx_strn_cooked(const char *str, size_t len) { - mp_hal_stdout_tx_strn(str, len); -} - -void mp_hal_stdout_tx_str(const char *str) { - mp_hal_stdout_tx_strn(str, strlen(str)); -} - -mp_uint_t mp_hal_ticks_ms(void) { - struct timeval tv; - gettimeofday(&tv, NULL); - return tv.tv_sec * 1000 + tv.tv_usec / 1000; -} - -mp_uint_t mp_hal_ticks_us(void) { - struct timeval tv; - gettimeofday(&tv, NULL); - return tv.tv_sec * 1000000 + tv.tv_usec; -} - -mp_uint_t mp_hal_ticks_cpu(void) { - LARGE_INTEGER value; - QueryPerformanceCounter(&value); -#ifdef _WIN64 - return value.QuadPart; -#else - return value.LowPart; -#endif -} diff --git a/ports/windows/windows_mphal.h b/ports/windows/windows_mphal.h deleted file mode 100644 index 2b7aab44a0fd4..0000000000000 --- a/ports/windows/windows_mphal.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "sleep.h" -#include "ports/unix/mphalport.h" - -#define MICROPY_HAL_HAS_VT100 (0) - -void mp_hal_move_cursor_back(unsigned int pos); -void mp_hal_erase_line_from_cursor(unsigned int n_chars_to_erase); - -#undef mp_hal_ticks_cpu -mp_uint_t mp_hal_ticks_cpu(void); diff --git a/ports/zephyr/.gitignore b/ports/zephyr/.gitignore deleted file mode 100644 index 00ca089d1598e..0000000000000 --- a/ports/zephyr/.gitignore +++ /dev/null @@ -1 +0,0 @@ -outdir/ diff --git a/ports/zephyr/Kbuild b/ports/zephyr/Kbuild deleted file mode 100644 index 9e656d5f48a9b..0000000000000 --- a/ports/zephyr/Kbuild +++ /dev/null @@ -1,3 +0,0 @@ -#subdir-ccflags-y += -I$(SOURCE_DIR)/../mylib/include - -obj-y += src/ diff --git a/ports/zephyr/Makefile b/ports/zephyr/Makefile deleted file mode 100644 index 2e6cb41b9823f..0000000000000 --- a/ports/zephyr/Makefile +++ /dev/null @@ -1,105 +0,0 @@ -# -# This is the main Makefile, which uses MicroPython build system, -# but Zephyr arch-specific toolchain and target-specific flags. -# This Makefile builds MicroPython as a library, and then calls -# recursively Makefile.zephyr to build complete application binary -# using Zephyr build system. -# -# To build a "minimal" configuration, use "make-minimal" wrapper. - -BOARD ?= qemu_x86 -CONF_FILE = prj_$(BOARD)_merged.conf -OUTDIR_PREFIX = $(BOARD) - -# Default heap size is 16KB, which is on conservative side, to let -# it build for smaller boards, but it won't be enough for larger -# applications, and will need to be increased. -MICROPY_HEAP_SIZE = 16384 -FROZEN_DIR = scripts - -# Default target -all: - -# Zephyr (generated) config files - must be defined before include below -Z_EXPORTS = outdir/$(OUTDIR_PREFIX)/Makefile.export -ifneq ($(MAKECMDGOALS), clean) -include $(Z_EXPORTS) -endif - -include ../../py/mkenv.mk -include $(TOP)/py/py.mk - -INC += -I. -INC += -I$(TOP) -INC += -I$(BUILD) -INC += -I$(ZEPHYR_BASE)/net/ip -INC += -I$(ZEPHYR_BASE)/net/ip/contiki -INC += -I$(ZEPHYR_BASE)/net/ip/contiki/os - -SRC_C = main.c \ - help.c \ - modusocket.c \ - modutime.c \ - modzephyr.c \ - modmachine.c \ - machine_pin.c \ - uart_core.c \ - lib/utils/stdout_helpers.c \ - lib/utils/printf.c \ - lib/utils/pyexec.c \ - lib/utils/interrupt_char.c \ - lib/mp-readline/readline.c \ - $(SRC_MOD) - -# List of sources for qstr extraction -SRC_QSTR += $(SRC_C) - -OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) - -CFLAGS = $(KBUILD_CFLAGS) $(NOSTDINC_FLAGS) $(ZEPHYRINCLUDE) \ - -std=gnu99 -fomit-frame-pointer -DNDEBUG -DMICROPY_HEAP_SIZE=$(MICROPY_HEAP_SIZE) $(CFLAGS_EXTRA) $(INC) - -include $(TOP)/py/mkrules.mk - -# We use single target here ($(Z_EXPORTS)) for simplicity, but actually -# number of things get generated here: 'initconfig' generates C header for -# Kconfig configuration, 'outputexports' generates make environment with CC, -# etc., and 'lib' generates other headers which may be included by zephyr.h, -# e.g. DTS-related. -$(Z_EXPORTS): $(CONF_FILE) - $(MAKE) -f Makefile.zephyr BOARD=$(BOARD) CONF_FILE=$(CONF_FILE) initconfig outputexports lib - -GENERIC_TARGETS = all zephyr run qemu qemugdb flash debug debugserver -KCONFIG_TARGETS = \ - initconfig config nconfig menuconfig xconfig gconfig \ - oldconfig silentoldconfig defconfig savedefconfig \ - allnoconfig allyesconfig alldefconfig randconfig \ - listnewconfig olddefconfig -CLEAN_TARGETS = pristine mrproper - -$(GENERIC_TARGETS): $(LIBMICROPYTHON) -$(CLEAN_TARGETS): clean - -$(GENERIC_TARGETS) $(KCONFIG_TARGETS) $(CLEAN_TARGETS): - $(MAKE) -f Makefile.zephyr BOARD=$(BOARD) CONF_FILE=$(CONF_FILE) $@ - -$(LIBMICROPYTHON): | $(Z_EXPORTS) -build/genhdr/qstr.i.last: | $(Z_EXPORTS) - -# If we recreate libmicropython, also cause zephyr.bin relink -LIBMICROPYTHON_EXTRA_CMD = -$(RM) -f outdir/$(OUTDIR_PREFIX)/zephyr.lnk - -# MicroPython's global clean cleans everything, fast -CLEAN_EXTRA = outdir - -# Clean Zephyr things in Zephyr way -z_clean: - $(MAKE) -f Makefile.zephyr BOARD=$(BOARD) clean - -# This rule is for prj_$(BOARD)_merged.conf, not $(CONF_FILE), which -# can be overriden -prj_$(BOARD)_merged.conf: prj_base.conf prj_$(BOARD).conf - $(PYTHON) makeprj.py prj_base.conf prj_$(BOARD).conf $@ - -test: - cd $(TOP)/tests && ./run-tests --target minimal --device "execpty:make -C ../ports/zephyr run BOARD=$(BOARD) QEMU_PTY=1" diff --git a/ports/zephyr/Makefile.zephyr b/ports/zephyr/Makefile.zephyr deleted file mode 100644 index 16f0a9452f02b..0000000000000 --- a/ports/zephyr/Makefile.zephyr +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (c) 2016 Intel Corporation -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -KERNEL_TYPE = micro -# BOARD must be passed on command line from main Makefile -#BOARD = -CONF_FILE = prj.conf -QEMU_NET = 1 - -#export SOURCE_DIR = $(ZEPHYR_BASE)/samples/static_lib/hello_world -export LDFLAGS_zephyr += -L$(CURDIR) -export ALL_LIBS += micropython - -include ${ZEPHYR_BASE}/Makefile.inc -ifeq ($(QEMU_NET), 1) -include ${ZEPHYR_BASE}/samples/net/common/Makefile.ipstack -endif diff --git a/ports/zephyr/README.md b/ports/zephyr/README.md deleted file mode 100644 index 018b4ce71528b..0000000000000 --- a/ports/zephyr/README.md +++ /dev/null @@ -1,113 +0,0 @@ -MicroPython port to Zephyr RTOS -=============================== - -This is an work-in-progress port of MicroPython to Zephyr RTOS -(http://zephyrproject.org). - -This port requires Zephyr version 1.8 or higher. All boards supported -by Zephyr (with standard level of features support, like UART console) -should work with MicroPython (but not all were tested). - -Features supported at this time: - -* REPL (interactive prompt) over Zephyr UART console. -* `utime` module for time measurements and delays. -* `machine.Pin` class for GPIO control. -* `usocket` module for networking (IPv4/IPv6). -* "Frozen modules" support to allow to bundle Python modules together - with firmware. Including complete applications, including with - run-on-boot capability. - -Over time, bindings for various Zephyr subsystems may be added. - - -Building --------- - -Follow to Zephyr web site for Getting Started instruction of installing -Zephyr SDK, getting Zephyr source code, and setting up development -environment. (Direct link: -https://www.zephyrproject.org/doc/getting_started/getting_started.html). -You may want to build Zephyr's own sample applications to make sure your -setup is correct. - -To build MicroPython port, in the port subdirectory (zephyr/), run: - - make BOARD= - -If you don't specify BOARD, the default is `qemu_x86` (x86 target running -in QEMU emulator). Consult Zephyr documentation above for the list of -supported boards. - - -Running -------- - -To run the resulting firmware in QEMU (for BOARDs like qemu_x86, -qemu_cortex_m3): - - make qemu - -With the default configuration, networking is now enabled, so you need to -follow instructions in https://wiki.zephyrproject.org/view/Networking-with-Qemu -to setup host side of TAP/SLIP networking. If you get error like: - - could not connect serial device to character backend 'unix:/tmp/slip.sock' - -it's a sign that you didn't followed instructions above. If you would like -to just run it quickly without extra setup, see "minimal" build below. - -For deploying/flashing a firmware on a real board, follow Zephyr -documentation for a given board, including known issues for that board -(if any). (Mind again that networking is enabled for the default build, -so you should know if there're any special requirements in that regard, -cf. for example QEMU networking requirements above; real hardware boards -generally should not have any special requirements, unless there're known -issues). - - -Quick example -------------- - -To blink an LED: - - import time - from machine import Pin - - LED = Pin(("GPIO_1", 21), Pin.OUT) - while True: - LED.value(1) - time.sleep(0.5) - LED.value(0) - time.sleep(0.5) - -The above code uses an LED location for a FRDM-K64F board (port B, pin 21; -following Zephyr conventions port are identified by "GPIO_x", where *x* -starts from 0). You will need to adjust it for another board (using board's -reference materials). To execute the above sample, copy it to clipboard, in -MicroPython REPL enter "paste mode" using Ctrl+E, paste clipboard, press -Ctrl+D to finish paste mode and start execution. - - -Minimal build -------------- - -MicroPython is committed to maintain minimal binary size for Zephyr port -below 128KB, as long as Zephyr project is committed to maintain stable -minimal size of their kernel (which they appear to be). Note that at such -size, there is no support for any Zephyr features beyond REPL over UART, -and only very minimal set of builtin Python modules is available. Thus, -this build is more suitable for code size control and quick demonstrations -on smaller systems. It's also suitable for careful enabling of features -one by one to achieve needed functionality and code size. This is in the -contrast to the "default" build, which may get more and more features -enabled over time. - -To make a minimal build: - - ./make-minimal BOARD= - -To run a minimal build in QEMU without requiring TAP networking setup -run the following after you built image with the previous command: - - ./make-minimal BOARD= qemu diff --git a/ports/zephyr/help.c b/ports/zephyr/help.c deleted file mode 100644 index becc203f6f80d..0000000000000 --- a/ports/zephyr/help.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/builtin.h" - -const char zephyr_help_text[] = -"Welcome to MicroPython!\n" -"\n" -"Control commands:\n" -" CTRL-A -- on a blank line, enter raw REPL mode\n" -" CTRL-B -- on a blank line, enter normal REPL mode\n" -" CTRL-C -- interrupt a running program\n" -" CTRL-D -- on a blank line, do a soft reset of the board\n" -" CTRL-E -- on a blank line, enter paste mode\n" -"\n" -"For further help on a specific object, type help(obj)\n" -; diff --git a/ports/zephyr/machine_pin.c b/ports/zephyr/machine_pin.c deleted file mode 100644 index 4dcd956cf88ce..0000000000000 --- a/ports/zephyr/machine_pin.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014, 2015 Damien P. George - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include -#include - -#include "py/runtime.h" -#include "py/gc.h" -#include "py/mphal.h" -#include "modmachine.h" - -const mp_obj_base_t machine_pin_obj_template = {&machine_pin_type}; - -STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_pin_obj_t *self = self_in; - mp_printf(print, "", self->port, self->pin); -} - -// pin.init(mode, pull=None, *, value) -STATIC mp_obj_t machine_pin_obj_init_helper(machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_mode, ARG_pull, ARG_value }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}}, - { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, - }; - - // parse args - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // get io mode - uint mode = args[ARG_mode].u_int; - - // get pull mode - uint pull = GPIO_PUD_NORMAL; - if (args[ARG_pull].u_obj != mp_const_none) { - pull = mp_obj_get_int(args[ARG_pull].u_obj); - } - - int ret = gpio_pin_configure(self->port, self->pin, mode | pull); - if (ret) { - mp_raise_ValueError("invalid pin"); - } - - // get initial value - if (args[ARG_value].u_obj != MP_OBJ_NULL) { - (void)gpio_pin_write(self->port, self->pin, mp_obj_is_true(args[ARG_value].u_obj)); - } - - return mp_const_none; -} - -// constructor(drv_name, pin, ...) -mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted port - if (!MP_OBJ_IS_TYPE(args[0], &mp_type_tuple)) { - mp_raise_ValueError("Pin id must be tuple of (\"GPIO_x\", pin#)"); - } - mp_obj_t *items; - mp_obj_get_array_fixed_n(args[0], 2, &items); - const char *drv_name = mp_obj_str_get_str(items[0]); - int wanted_pin = mp_obj_get_int(items[1]); - struct device *wanted_port = device_get_binding(drv_name); - if (!wanted_port) { - mp_raise_ValueError("invalid port"); - } - - machine_pin_obj_t *pin = m_new_obj(machine_pin_obj_t); - pin->base = machine_pin_obj_template; - pin->port = wanted_port; - pin->pin = wanted_pin; - - if (n_args > 1 || n_kw > 0) { - // pin mode given, so configure this GPIO - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - machine_pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args); - } - - return (mp_obj_t)pin; -} - -// fast method for getting/setting pin value -STATIC mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); - machine_pin_obj_t *self = self_in; - if (n_args == 0) { - u32_t pin_val; - (void)gpio_pin_read(self->port, self->pin, &pin_val); - return MP_OBJ_NEW_SMALL_INT(pin_val); - } else { - (void)gpio_pin_write(self->port, self->pin, mp_obj_is_true(args[0])); - return mp_const_none; - } -} - -// pin.init(mode, pull) -STATIC mp_obj_t machine_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - return machine_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_init_obj, 1, machine_pin_obj_init); - -// pin.value([value]) -STATIC mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) { - return machine_pin_call(args[0], n_args - 1, 0, args + 1); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_pin_value); - -STATIC mp_obj_t machine_pin_off(mp_obj_t self_in) { - machine_pin_obj_t *self = self_in; - (void)gpio_pin_write(self->port, self->pin, 0); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_off_obj, machine_pin_off); - -STATIC mp_obj_t machine_pin_on(mp_obj_t self_in) { - machine_pin_obj_t *self = self_in; - (void)gpio_pin_write(self->port, self->pin, 1); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on); - -STATIC mp_uint_t machine_pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { - (void)errcode; - machine_pin_obj_t *self = self_in; - - switch (request) { - case MP_PIN_READ: { - u32_t pin_val; - gpio_pin_read(self->port, self->pin, &pin_val); - return pin_val; - } - case MP_PIN_WRITE: { - gpio_pin_write(self->port, self->pin, arg); - return 0; - } - } - return -1; -} - -STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) }, - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_off_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_on_obj) }, - - // class constants - { MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_DIR_IN) }, - { MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_DIR_OUT) }, - { MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PUD_PULL_UP) }, - { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PUD_PULL_DOWN) }, -}; - -STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table); - -STATIC const mp_pin_p_t machine_pin_pin_p = { - .ioctl = machine_pin_ioctl, -}; - -const mp_obj_type_t machine_pin_type = { - { &mp_type_type }, - .name = MP_QSTR_Pin, - .print = machine_pin_print, - .make_new = mp_pin_make_new, - .call = machine_pin_call, - .protocol = &machine_pin_pin_p, - .locals_dict = (mp_obj_t)&machine_pin_locals_dict, -}; diff --git a/ports/zephyr/main.c b/ports/zephyr/main.c deleted file mode 100644 index 7eb9da3e1210d..0000000000000 --- a/ports/zephyr/main.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include -#include - -#include -#ifdef CONFIG_NETWORKING -#include -#endif - -#include "py/compile.h" -#include "py/runtime.h" -#include "py/repl.h" -#include "py/gc.h" -#include "py/stackctrl.h" -#include "lib/utils/pyexec.h" -#include "lib/mp-readline/readline.h" - -void do_str(const char *src, mp_parse_input_kind_t input_kind) { - nlr_buf_t nlr; - if (nlr_push(&nlr) == 0) { - mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); - qstr source_name = lex->source_name; - mp_parse_tree_t parse_tree = mp_parse(lex, input_kind); - mp_obj_t module_fun = mp_compile(&parse_tree, source_name, MP_EMIT_OPT_NONE, true); - mp_call_function_0(module_fun); - nlr_pop(); - } else { - // uncaught exception - mp_obj_print_exception(&mp_plat_print, (mp_obj_t)nlr.ret_val); - } -} - -static char *stack_top; -static char heap[MICROPY_HEAP_SIZE]; - -void init_zephyr(void) { - // We now rely on CONFIG_NET_APP_SETTINGS to set up bootstrap - // network addresses. -#if 0 - #ifdef CONFIG_NETWORKING - if (net_if_get_default() == NULL) { - // If there's no default networking interface, - // there's nothing to configure. - return; - } - #endif - #ifdef CONFIG_NET_IPV4 - static struct in_addr in4addr_my = {{{192, 0, 2, 1}}}; - net_if_ipv4_addr_add(net_if_get_default(), &in4addr_my, NET_ADDR_MANUAL, 0); - static struct in_addr in4netmask_my = {{{255, 255, 255, 0}}}; - net_if_ipv4_set_netmask(net_if_get_default(), &in4netmask_my); - static struct in_addr in4gw_my = {{{192, 0, 2, 2}}}; - net_if_ipv4_set_gw(net_if_get_default(), &in4gw_my); - #endif - #ifdef CONFIG_NET_IPV6 - // 2001:db8::1 - static struct in6_addr in6addr_my = {{{0x20, 0x01, 0x0d, 0xb8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1}}}; - net_if_ipv6_addr_add(net_if_get_default(), &in6addr_my, NET_ADDR_MANUAL, 0); - #endif -#endif -} - -int real_main(void) { - int stack_dummy; - stack_top = (char*)&stack_dummy; - mp_stack_set_top(stack_top); - // Make MicroPython's stack limit somewhat smaller than full stack available - mp_stack_set_limit(CONFIG_MAIN_STACK_SIZE - 512); - - init_zephyr(); - -soft_reset: - #if MICROPY_ENABLE_GC - gc_init(heap, heap + sizeof(heap)); - #endif - mp_init(); - mp_obj_list_init(mp_sys_path, 0); - mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR_)); // current dir (or base dir of the script) - mp_obj_list_init(mp_sys_argv, 0); - - #if MICROPY_MODULE_FROZEN - pyexec_frozen_module("main.py"); - #endif - - for (;;) { - if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) { - if (pyexec_raw_repl() != 0) { - break; - } - } else { - if (pyexec_friendly_repl() != 0) { - break; - } - } - } - - printf("soft reboot\n"); - goto soft_reset; - - return 0; -} - -void gc_collect(void) { - // WARNING: This gc_collect implementation doesn't try to get root - // pointers from CPU registers, and thus may function incorrectly. - void *dummy; - gc_collect_start(); - gc_collect_root(&dummy, ((mp_uint_t)stack_top - (mp_uint_t)&dummy) / sizeof(mp_uint_t)); - gc_collect_end(); - //gc_dump_info(); -} - -mp_lexer_t *mp_lexer_new_from_file(const char *filename) { - mp_raise_OSError(ENOENT); -} - -mp_import_stat_t mp_import_stat(const char *path) { - return MP_IMPORT_STAT_NO_EXIST; -} - -mp_obj_t mp_builtin_open(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open); - -NORETURN void nlr_jump_fail(void *val) { - while (1); -} - -#ifndef NDEBUG -void MP_WEAK __assert_func(const char *file, int line, const char *func, const char *expr) { - printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line); - __fatal_error("Assertion failed"); -} -#endif diff --git a/ports/zephyr/make-minimal b/ports/zephyr/make-minimal deleted file mode 100755 index 1fc143e4d6af0..0000000000000 --- a/ports/zephyr/make-minimal +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh -# -# This is a wrapper for make to build a "minimal" Zephyr port. -# It should be run just like make (i.e. extra vars can be passed on the -# command line, etc.), e.g.: -# -# ./make-minimal BOARD=qemu_cortex_m3 -# ./make-minimal BOARD=qemu_cortex_m3 run -# - -make \ - CONF_FILE=prj_minimal.conf \ - CFLAGS_EXTRA='-DMP_CONFIGFILE=""' \ - FROZEN_DIR= \ - QEMU_NET=0 \ - "$@" diff --git a/ports/zephyr/makeprj.py b/ports/zephyr/makeprj.py deleted file mode 100644 index 239c877cd6f9c..0000000000000 --- a/ports/zephyr/makeprj.py +++ /dev/null @@ -1,29 +0,0 @@ -#!/usr/bin/env python3 -import sys -import os -import hashlib - - -def hash_file(fname): - if not os.path.exists(fname): - return b"" - hasher = hashlib.md5() - with open(fname, "rb") as f: - hasher.update(f.read()) - return hasher.digest() - - -old_digest = hash_file(sys.argv[3]) - -with open(sys.argv[3] + ".tmp", "wb") as f: - f.write(open(sys.argv[1], "rb").read()) - if os.path.exists(sys.argv[2]): - f.write(open(sys.argv[2], "rb").read()) - -new_digest = hash_file(sys.argv[3] + ".tmp") - -if new_digest != old_digest: - print("Replacing") - os.rename(sys.argv[3] + ".tmp", sys.argv[3]) -else: - os.remove(sys.argv[3] + ".tmp") diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c deleted file mode 100644 index 5909c37d6f692..0000000000000 --- a/ports/zephyr/modmachine.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013-2015 Damien P. George - * Copyright (c) 2016 Paul Sokolovsky - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" -#include "extmod/machine_mem.h" -#include "extmod/machine_signal.h" -#include "extmod/machine_pulse.h" -#include "extmod/machine_i2c.h" -#include "modmachine.h" - -#if MICROPY_PY_MACHINE - -STATIC mp_obj_t machine_reset(void) { - sys_reboot(SYS_REBOOT_COLD); - // Won't get here, Zephyr has infiniloop on its side - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); - -STATIC mp_obj_t machine_reset_cause(void) { - printf("Warning: %s is not implemented\n", __func__); - return MP_OBJ_NEW_SMALL_INT(42); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); - -STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, - #ifdef CONFIG_REBOOT - { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, - #endif - { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, - - { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, - { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, - - // reset causes - /*{ MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(REASON_DEFAULT_RST) },*/ -}; - -STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); - -const mp_obj_module_t mp_module_machine = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&machine_module_globals, -}; - -#endif // MICROPY_PY_MACHINE diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h deleted file mode 100644 index 84e4d10a885ae..0000000000000 --- a/ports/zephyr/modmachine.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H -#define MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H - -#include "py/obj.h" - -extern const mp_obj_type_t machine_pin_type; - -MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj); - -typedef struct _machine_pin_obj_t { - mp_obj_base_t base; - struct device *port; - uint32_t pin; -} machine_pin_obj_t; - -#endif // MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H diff --git a/ports/zephyr/modusocket.c b/ports/zephyr/modusocket.c deleted file mode 100644 index e021c3a44f4d0..0000000000000 --- a/ports/zephyr/modusocket.c +++ /dev/null @@ -1,457 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#ifdef MICROPY_PY_USOCKET - -#include "py/runtime.h" -#include "py/stream.h" - -#include -#include -// Zephyr's generated version header -#include -#include -#include -#include -#ifdef CONFIG_NET_SOCKETS -#include -#endif - -#define DEBUG_PRINT 0 -#if DEBUG_PRINT // print debugging info -#define DEBUG_printf printf -#else // don't print debugging info -#define DEBUG_printf(...) (void)0 -#endif - -typedef struct _socket_obj_t { - mp_obj_base_t base; - int ctx; - - #define STATE_NEW 0 - #define STATE_CONNECTING 1 - #define STATE_CONNECTED 2 - #define STATE_PEER_CLOSED 3 - int8_t state; -} socket_obj_t; - -STATIC const mp_obj_type_t socket_type; - -// Helper functions - -#define RAISE_ERRNO(x) { int _err = x; if (_err < 0) mp_raise_OSError(-_err); } -#define RAISE_SOCK_ERRNO(x) { if ((int)(x) == -1) mp_raise_OSError(errno); } - -STATIC void socket_check_closed(socket_obj_t *socket) { - if (socket->ctx == -1) { - // already closed - mp_raise_OSError(EBADF); - } -} - -STATIC void parse_inet_addr(socket_obj_t *socket, mp_obj_t addr_in, struct sockaddr *sockaddr) { - // We employ the fact that port and address offsets are the same for IPv4 & IPv6 - struct sockaddr_in *sockaddr_in = (struct sockaddr_in*)sockaddr; - - mp_obj_t *addr_items; - mp_obj_get_array_fixed_n(addr_in, 2, &addr_items); - sockaddr_in->sin_family = net_context_get_family((void*)socket->ctx); - RAISE_ERRNO(net_addr_pton(sockaddr_in->sin_family, mp_obj_str_get_str(addr_items[0]), &sockaddr_in->sin_addr)); - sockaddr_in->sin_port = htons(mp_obj_get_int(addr_items[1])); -} - -STATIC mp_obj_t format_inet_addr(struct sockaddr *addr, mp_obj_t port) { - // We employ the fact that port and address offsets are the same for IPv4 & IPv6 - struct sockaddr_in6 *sockaddr_in6 = (struct sockaddr_in6*)addr; - char buf[40]; - net_addr_ntop(addr->sa_family, &sockaddr_in6->sin6_addr, buf, sizeof(buf)); - mp_obj_tuple_t *tuple = mp_obj_new_tuple(addr->sa_family == AF_INET ? 2 : 4, NULL); - - tuple->items[0] = mp_obj_new_str(buf, strlen(buf), false); - // We employ the fact that port offset is the same for IPv4 & IPv6 - // not filled in - //tuple->items[1] = mp_obj_new_int(ntohs(((struct sockaddr_in*)addr)->sin_port)); - tuple->items[1] = port; - - if (addr->sa_family == AF_INET6) { - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); // flow_info - tuple->items[3] = MP_OBJ_NEW_SMALL_INT(sockaddr_in6->sin6_scope_id); - } - - return MP_OBJ_FROM_PTR(tuple); -} - -socket_obj_t *socket_new(void) { - socket_obj_t *socket = m_new_obj_with_finaliser(socket_obj_t); - socket->base.type = (mp_obj_t)&socket_type; - socket->state = STATE_NEW; - return socket; -} - -// Methods - -STATIC void socket_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - socket_obj_t *self = self_in; - if (self->ctx == -1) { - mp_printf(print, ""); - } else { - struct net_context *ctx = (void*)self->ctx; - mp_printf(print, "", ctx, net_context_get_type(ctx)); - } -} - -STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 4, false); - - socket_obj_t *socket = socket_new(); - - int family = AF_INET; - int socktype = SOCK_STREAM; - int proto = -1; - - if (n_args >= 1) { - family = mp_obj_get_int(args[0]); - if (n_args >= 2) { - socktype = mp_obj_get_int(args[1]); - if (n_args >= 3) { - proto = mp_obj_get_int(args[2]); - } - } - } - - if (proto == -1) { - proto = IPPROTO_TCP; - if (socktype != SOCK_STREAM) { - proto = IPPROTO_UDP; - } - } - - socket->ctx = zsock_socket(family, socktype, proto); - RAISE_SOCK_ERRNO(socket->ctx); - - return MP_OBJ_FROM_PTR(socket); -} - -STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - parse_inet_addr(socket, addr_in, &sockaddr); - - int res = zsock_bind(socket->ctx, &sockaddr, sizeof(sockaddr)); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); - -STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - parse_inet_addr(socket, addr_in, &sockaddr); - - int res = zsock_connect(socket->ctx, &sockaddr, sizeof(sockaddr)); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); - -STATIC mp_obj_t socket_listen(mp_obj_t self_in, mp_obj_t backlog_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - mp_int_t backlog = mp_obj_get_int(backlog_in); - int res = zsock_listen(socket->ctx, backlog); - RAISE_SOCK_ERRNO(res); - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); - -STATIC mp_obj_t socket_accept(mp_obj_t self_in) { - socket_obj_t *socket = self_in; - socket_check_closed(socket); - - struct sockaddr sockaddr; - socklen_t addrlen = sizeof(sockaddr); - int ctx = zsock_accept(socket->ctx, &sockaddr, &addrlen); - - socket_obj_t *socket2 = socket_new(); - socket2->ctx = ctx; - - mp_obj_tuple_t *client = mp_obj_new_tuple(2, NULL); - client->items[0] = MP_OBJ_FROM_PTR(socket2); - // TODO - client->items[1] = mp_const_none; - - return MP_OBJ_FROM_PTR(client); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); - -STATIC mp_uint_t sock_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) { - socket_obj_t *socket = self_in; - if (socket->ctx == -1) { - // already closed - *errcode = EBADF; - return MP_STREAM_ERROR; - } - - ssize_t len = zsock_send(socket->ctx, buf, size, 0); - if (len == -1) { - *errcode = errno; - return MP_STREAM_ERROR; - } - - return len; -} - -STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - int err = 0; - mp_uint_t len = sock_write(self_in, bufinfo.buf, bufinfo.len, &err); - if (len == MP_STREAM_ERROR) { - mp_raise_OSError(err); - } - return mp_obj_new_int_from_uint(len); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); - -STATIC mp_uint_t sock_read(mp_obj_t self_in, void *buf, mp_uint_t max_len, int *errcode) { - socket_obj_t *socket = self_in; - if (socket->ctx == -1) { - // already closed - *errcode = EBADF; - return MP_STREAM_ERROR; - } - - ssize_t recv_len = zsock_recv(socket->ctx, buf, max_len, 0); - if (recv_len == -1) { - *errcode = errno; - return MP_STREAM_ERROR; - } - - return recv_len; -} - -STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { - mp_int_t max_len = mp_obj_get_int(len_in); - vstr_t vstr; - // +1 to accommodate for trailing \0 - vstr_init_len(&vstr, max_len + 1); - - int err; - mp_uint_t len = sock_read(self_in, vstr.buf, max_len, &err); - - if (len == MP_STREAM_ERROR) { - vstr_clear(&vstr); - mp_raise_OSError(err); - } - - if (len == 0) { - vstr_clear(&vstr); - return mp_const_empty_bytes; - } - - vstr.len = len; - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); - -STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { - (void)n_args; // always 4 - mp_warning("setsockopt() not implemented"); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); - -STATIC mp_obj_t socket_makefile(size_t n_args, const mp_obj_t *args) { - (void)n_args; - return args[0]; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_makefile_obj, 1, 3, socket_makefile); - -STATIC mp_obj_t socket_close(mp_obj_t self_in) { - socket_obj_t *socket = self_in; - if (socket->ctx != -1) { - int res = zsock_close(socket->ctx); - RAISE_SOCK_ERRNO(res); - socket->ctx = -1; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_close_obj, socket_close); - -STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&socket_close_obj) }, - { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, - { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, - - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_makefile), MP_ROM_PTR(&socket_makefile_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); - -STATIC const mp_stream_p_t socket_stream_p = { - .read = sock_read, - .write = sock_write, - //.ioctl = sock_ioctl, -}; - -STATIC const mp_obj_type_t socket_type = { - { &mp_type_type }, - .name = MP_QSTR_socket, - .print = socket_print, - .make_new = socket_make_new, - .protocol = &socket_stream_p, - .locals_dict = (mp_obj_t)&socket_locals_dict, -}; - -// -// getaddrinfo() implementation -// - -typedef struct _getaddrinfo_state_t { - mp_obj_t result; - struct k_sem sem; - mp_obj_t port; - int status; -} getaddrinfo_state_t; - -void dns_resolve_cb(enum dns_resolve_status status, struct dns_addrinfo *info, void *user_data) { - getaddrinfo_state_t *state = user_data; - DEBUG_printf("dns status: %d\n", status); - - if (info == NULL) { - if (status == DNS_EAI_ALLDONE) { - status = 0; - } - state->status = status; - k_sem_give(&state->sem); - return; - } - - mp_obj_tuple_t *tuple = mp_obj_new_tuple(5, NULL); - tuple->items[0] = MP_OBJ_NEW_SMALL_INT(info->ai_family); - // info->ai_socktype not filled - tuple->items[1] = MP_OBJ_NEW_SMALL_INT(SOCK_STREAM); - // info->ai_protocol not filled - tuple->items[2] = MP_OBJ_NEW_SMALL_INT(IPPROTO_TCP); - tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); - tuple->items[4] = format_inet_addr(&info->ai_addr, state->port); - mp_obj_list_append(state->result, MP_OBJ_FROM_PTR(tuple)); -} - -STATIC mp_obj_t mod_getaddrinfo(size_t n_args, const mp_obj_t *args) { - mp_obj_t host_in = args[0], port_in = args[1]; - const char *host = mp_obj_str_get_str(host_in); - mp_int_t family = 0; - if (n_args > 2) { - family = mp_obj_get_int(args[2]); - } - - getaddrinfo_state_t state; - // Just validate that it's int - (void)mp_obj_get_int(port_in); - state.port = port_in; - state.result = mp_obj_new_list(0, NULL); - k_sem_init(&state.sem, 0, UINT_MAX); - - for (int i = 2; i--;) { - int type = (family != AF_INET6 ? DNS_QUERY_TYPE_A : DNS_QUERY_TYPE_AAAA); - RAISE_ERRNO(dns_get_addr_info(host, type, NULL, dns_resolve_cb, &state, 3000)); - k_sem_take(&state.sem, K_FOREVER); - if (family != 0) { - break; - } - family = AF_INET6; - } - - // Raise error only if there's nothing to return, otherwise - // it may be IPv4 vs IPv6 differences. - mp_int_t len = MP_OBJ_SMALL_INT_VALUE(mp_obj_len(state.result)); - if (state.status != 0 && len == 0) { - mp_raise_OSError(state.status); - } - - return state.result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_getaddrinfo_obj, 2, 3, mod_getaddrinfo); - - -STATIC mp_obj_t pkt_get_info(void) { - struct k_mem_slab *rx, *tx; - struct net_buf_pool *rx_data, *tx_data; - net_pkt_get_info(&rx, &tx, &rx_data, &tx_data); - mp_obj_tuple_t *t = MP_OBJ_TO_PTR(mp_obj_new_tuple(4, NULL)); - t->items[0] = MP_OBJ_NEW_SMALL_INT(k_mem_slab_num_free_get(rx)); - t->items[1] = MP_OBJ_NEW_SMALL_INT(k_mem_slab_num_free_get(tx)); - t->items[2] = MP_OBJ_NEW_SMALL_INT(rx_data->avail_count); - t->items[3] = MP_OBJ_NEW_SMALL_INT(tx_data->avail_count); - return MP_OBJ_FROM_PTR(t); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(pkt_get_info_obj, pkt_get_info); - -STATIC const mp_rom_map_elem_t mp_module_usocket_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, - // objects - { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, - // class constants - { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(AF_INET) }, - { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(AF_INET6) }, - - { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(SOCK_STREAM) }, - { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(SOCK_DGRAM) }, - - { MP_ROM_QSTR(MP_QSTR_SOL_SOCKET), MP_ROM_INT(1) }, - { MP_ROM_QSTR(MP_QSTR_SO_REUSEADDR), MP_ROM_INT(2) }, - - { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&mod_getaddrinfo_obj) }, - { MP_ROM_QSTR(MP_QSTR_pkt_get_info), MP_ROM_PTR(&pkt_get_info_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_usocket_globals, mp_module_usocket_globals_table); - -const mp_obj_module_t mp_module_usocket = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_usocket_globals, -}; - -#endif // MICROPY_PY_USOCKET diff --git a/ports/zephyr/modutime.c b/ports/zephyr/modutime.c deleted file mode 100644 index a5d32fe66589d..0000000000000 --- a/ports/zephyr/modutime.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#if MICROPY_PY_UTIME - -#include - -#include "py/runtime.h" -#include "py/smallint.h" -#include "py/mphal.h" -#include "extmod/utime_mphal.h" - -STATIC mp_obj_t mod_time_time(void) { - /* The absence of FP support is deliberate. The Zephyr port uses - * single precision floats so the fraction component will start to - * lose precision on devices with a long uptime. - */ - return mp_obj_new_int(k_uptime_get() / 1000); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_time_time_obj, mod_time_time); - -STATIC const mp_rom_map_elem_t mp_module_time_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_utime) }, - { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&mp_utime_sleep_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_ms), MP_ROM_PTR(&mp_utime_sleep_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_sleep_us), MP_ROM_PTR(&mp_utime_sleep_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mod_time_time_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_ms), MP_ROM_PTR(&mp_utime_ticks_ms_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_us), MP_ROM_PTR(&mp_utime_ticks_us_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_cpu), MP_ROM_PTR(&mp_utime_ticks_cpu_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_add), MP_ROM_PTR(&mp_utime_ticks_add_obj) }, - { MP_ROM_QSTR(MP_QSTR_ticks_diff), MP_ROM_PTR(&mp_utime_ticks_diff_obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_time_globals, mp_module_time_globals_table); - -const mp_obj_module_t mp_module_time = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_time_globals, -}; - -#endif // MICROPY_PY_UTIME diff --git a/ports/zephyr/modzephyr.c b/ports/zephyr/modzephyr.c deleted file mode 100644 index 265fc882dceab..0000000000000 --- a/ports/zephyr/modzephyr.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#if MICROPY_PY_ZEPHYR - -#include -#include - -#include "py/runtime.h" - -STATIC mp_obj_t mod_is_preempt_thread(void) { - return mp_obj_new_bool(k_is_preempt_thread()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_is_preempt_thread_obj, mod_is_preempt_thread); - -STATIC mp_obj_t mod_current_tid(void) { - return MP_OBJ_NEW_SMALL_INT(k_current_get()); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_current_tid_obj, mod_current_tid); - -STATIC mp_obj_t mod_stacks_analyze(void) { - k_call_stacks_analyze(); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_stacks_analyze_obj, mod_stacks_analyze); - -#ifdef CONFIG_NET_SHELL - -//int net_shell_cmd_iface(int argc, char *argv[]); - -STATIC mp_obj_t mod_shell_net_iface(void) { - net_shell_cmd_iface(0, NULL); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_0(mod_shell_net_iface_obj, mod_shell_net_iface); - -#endif // CONFIG_NET_SHELL - -STATIC const mp_rom_map_elem_t mp_module_time_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_zephyr) }, - { MP_ROM_QSTR(MP_QSTR_is_preempt_thread), MP_ROM_PTR(&mod_is_preempt_thread_obj) }, - { MP_ROM_QSTR(MP_QSTR_current_tid), MP_ROM_PTR(&mod_current_tid_obj) }, - { MP_ROM_QSTR(MP_QSTR_stacks_analyze), MP_ROM_PTR(&mod_stacks_analyze_obj) }, - - #ifdef CONFIG_NET_SHELL - { MP_ROM_QSTR(MP_QSTR_shell_net_iface), MP_ROM_PTR(&mod_shell_net_iface_obj) }, - #endif -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_time_globals, mp_module_time_globals_table); - -const mp_obj_module_t mp_module_zephyr = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_time_globals, -}; - -#endif // MICROPY_PY_ZEPHYR diff --git a/ports/zephyr/mpconfigport.h b/ports/zephyr/mpconfigport.h deleted file mode 100644 index 7ff05f45a8884..0000000000000 --- a/ports/zephyr/mpconfigport.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include - -// Include Zephyr's autoconf.h, which should be made first by Zephyr makefiles -#include "autoconf.h" -// Included here to get basic Zephyr environment (macros, etc.) -#include - -// Usually passed from Makefile -#ifndef MICROPY_HEAP_SIZE -#define MICROPY_HEAP_SIZE (16 * 1024) -#endif - -#define MICROPY_ENABLE_SOURCE_LINE (1) -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_RANGE_ATTRS (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_HELP (1) -#define MICROPY_PY_BUILTINS_HELP_TEXT zephyr_help_text -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_MICROPYTHON_MEM_INFO (1) -#define MICROPY_PY_MACHINE (1) -#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new -#define MICROPY_MODULE_WEAK_LINKS (1) -#define MICROPY_PY_STRUCT (0) -#ifdef CONFIG_NETWORKING -// If we have networking, we likely want errno comfort -#define MICROPY_PY_UERRNO (1) -#define MICROPY_PY_USOCKET (1) -#endif -#define MICROPY_PY_UTIME (1) -#define MICROPY_PY_UTIME_MP_HAL (1) -#define MICROPY_PY_ZEPHYR (1) -#define MICROPY_PY_SYS_MODULES (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_PY_BUILTINS_COMPLEX (0) - -// Saving extra crumbs to make sure binary fits in 128K -#define MICROPY_COMP_CONST_FOLDING (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) - -#define MICROPY_PY_SYS_PLATFORM "zephyr" - -#ifdef CONFIG_BOARD -#define MICROPY_HW_BOARD_NAME "zephyr-" CONFIG_BOARD -#else -#define MICROPY_HW_BOARD_NAME "zephyr-generic" -#endif - -#ifdef CONFIG_SOC -#define MICROPY_HW_MCU_NAME CONFIG_SOC -#else -#define MICROPY_HW_MCU_NAME "unknown-cpu" -#endif - -#define MICROPY_MODULE_FROZEN_STR (1) - -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; - -extern const struct _mp_obj_module_t mp_module_machine; -extern const struct _mp_obj_module_t mp_module_time; -extern const struct _mp_obj_module_t mp_module_usocket; -extern const struct _mp_obj_module_t mp_module_zephyr; - -#if MICROPY_PY_USOCKET -#define MICROPY_PY_USOCKET_DEF { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) }, -#define MICROPY_PY_USOCKET_WEAK_DEF { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&mp_module_usocket) }, -#else -#define MICROPY_PY_USOCKET_DEF -#define MICROPY_PY_USOCKET_WEAK_DEF -#endif - -#if MICROPY_PY_UTIME -#define MICROPY_PY_UTIME_DEF { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_time) }, -#else -#define MICROPY_PY_UTIME_DEF -#endif - -#if MICROPY_PY_ZEPHYR -#define MICROPY_PY_ZEPHYR_DEF { MP_ROM_QSTR(MP_QSTR_zephyr), MP_ROM_PTR(&mp_module_zephyr) }, -#else -#define MICROPY_PY_ZEPHYR_DEF -#endif - -#define MICROPY_PORT_BUILTIN_MODULES \ - { MP_ROM_QSTR(MP_QSTR_machine), MP_ROM_PTR(&mp_module_machine) }, \ - MICROPY_PY_USOCKET_DEF \ - MICROPY_PY_UTIME_DEF \ - MICROPY_PY_ZEPHYR_DEF \ - -#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ - { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&mp_module_time) }, \ - MICROPY_PY_USOCKET_WEAK_DEF \ - -// extra built in names to add to the global namespace -#define MICROPY_PORT_BUILTINS \ - diff --git a/ports/zephyr/mpconfigport_minimal.h b/ports/zephyr/mpconfigport_minimal.h deleted file mode 100644 index f0e57d7566382..0000000000000 --- a/ports/zephyr/mpconfigport_minimal.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include - -// Include Zephyr's autoconf.h, which should be made first by Zephyr makefiles -#include "autoconf.h" -// Included here to get basic Zephyr environment (macros, etc.) -#include - -// Usually passed from Makefile -#ifndef MICROPY_HEAP_SIZE -#define MICROPY_HEAP_SIZE (16 * 1024) -#endif - -#define MICROPY_STACK_CHECK (1) -#define MICROPY_ENABLE_GC (1) -#define MICROPY_HELPER_REPL (1) -#define MICROPY_REPL_AUTO_INDENT (1) -#define MICROPY_KBD_EXCEPTION (1) -#define MICROPY_CPYTHON_COMPAT (0) -#define MICROPY_PY_ASYNC_AWAIT (0) -#define MICROPY_PY_ATTRTUPLE (0) -#define MICROPY_PY_BUILTINS_ENUMERATE (0) -#define MICROPY_PY_BUILTINS_FILTER (0) -#define MICROPY_PY_BUILTINS_MIN_MAX (0) -#define MICROPY_PY_BUILTINS_PROPERTY (0) -#define MICROPY_PY_BUILTINS_RANGE_ATTRS (0) -#define MICROPY_PY_BUILTINS_REVERSED (0) -#define MICROPY_PY_BUILTINS_SET (0) -#define MICROPY_PY_BUILTINS_SLICE (0) -#define MICROPY_PY_ARRAY (0) -#define MICROPY_PY_COLLECTIONS (0) -#define MICROPY_PY_CMATH (0) -#define MICROPY_PY_IO (0) -#define MICROPY_PY_STRUCT (0) -#define MICROPY_PY_SYS_MODULES (0) -#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG) -#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) -#define MICROPY_PY_BUILTINS_COMPLEX (0) - -// Saving extra crumbs to make sure binary fits in 128K -#define MICROPY_COMP_CONST_FOLDING (0) -#define MICROPY_COMP_CONST (0) -#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (0) - -#ifdef CONFIG_BOARD -#define MICROPY_HW_BOARD_NAME "zephyr-" CONFIG_BOARD -#else -#define MICROPY_HW_BOARD_NAME "zephyr-generic" -#endif - -#ifdef CONFIG_SOC -#define MICROPY_HW_MCU_NAME CONFIG_SOC -#else -#define MICROPY_HW_MCU_NAME "unknown-cpu" -#endif - -typedef int mp_int_t; // must be pointer size -typedef unsigned mp_uint_t; // must be pointer size -typedef long mp_off_t; - -#define MP_STATE_PORT MP_STATE_VM - -#define MICROPY_PORT_ROOT_POINTERS \ - const char *readline_hist[8]; diff --git a/ports/zephyr/mphalport.h b/ports/zephyr/mphalport.h deleted file mode 100644 index e3cca8d37def7..0000000000000 --- a/ports/zephyr/mphalport.h +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include "lib/utils/interrupt_char.h" - -static inline mp_uint_t mp_hal_ticks_us(void) { - return SYS_CLOCK_HW_CYCLES_TO_NS(k_cycle_get_32()) / 1000; -} - -static inline mp_uint_t mp_hal_ticks_ms(void) { - return k_uptime_get(); -} - -static inline mp_uint_t mp_hal_ticks_cpu(void) { - // ticks_cpu() is defined as using the highest-resolution timing source - // in the system. This is usually a CPU clock, but doesn't have to be, - // here we just use Zephyr hi-res timer. - return k_cycle_get_32(); -} - -static inline void mp_hal_delay_us(mp_uint_t delay) { - k_busy_wait(delay); -} - -static inline void mp_hal_delay_ms(mp_uint_t delay) { - k_sleep(delay); -} diff --git a/ports/zephyr/prj_96b_carbon.conf b/ports/zephyr/prj_96b_carbon.conf deleted file mode 100644 index 40b57e69c97f5..0000000000000 --- a/ports/zephyr/prj_96b_carbon.conf +++ /dev/null @@ -1,2 +0,0 @@ -# TODO: Enable networking -CONFIG_NETWORKING=y diff --git a/ports/zephyr/prj_base.conf b/ports/zephyr/prj_base.conf deleted file mode 100644 index fbcedf2600a5b..0000000000000 --- a/ports/zephyr/prj_base.conf +++ /dev/null @@ -1,56 +0,0 @@ -CONFIG_LEGACY_KERNEL=n -CONFIG_REBOOT=y - -CONFIG_STDOUT_CONSOLE=y -CONFIG_CONSOLE_HANDLER=y -CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS=y - -CONFIG_CONSOLE_PULL=y -CONFIG_CONSOLE_GETCHAR=y -CONFIG_CONSOLE_GETCHAR_BUFSIZE=128 -CONFIG_CONSOLE_PUTCHAR_BUFSIZE=128 - -CONFIG_NEWLIB_LIBC=y -CONFIG_FLOAT=y -CONFIG_MAIN_STACK_SIZE=4096 - -# Networking config -CONFIG_NETWORKING=y -CONFIG_NET_IPV4=y -CONFIG_NET_IPV6=y -CONFIG_NET_UDP=y -CONFIG_NET_TCP=y -CONFIG_NET_SOCKETS=y -CONFIG_TEST_RANDOM_GENERATOR=y -CONFIG_NET_NBUF_RX_COUNT=5 - -CONFIG_NET_APP_SETTINGS=y -CONFIG_NET_APP_INIT_TIMEOUT=3 -CONFIG_NET_APP_NEED_IPV6=y -CONFIG_NET_APP_NEED_IPV4=y -CONFIG_NET_APP_MY_IPV6_ADDR="2001:db8::1" -CONFIG_NET_APP_MY_IPV4_ADDR="192.0.2.1" -CONFIG_NET_APP_MY_IPV4_GW="192.0.2.2" - -# DNS -CONFIG_DNS_RESOLVER=y -CONFIG_DNS_RESOLVER_ADDITIONAL_QUERIES=2 -CONFIG_DNS_SERVER_IP_ADDRESSES=y -CONFIG_DNS_SERVER1="192.0.2.2" - -# Diagnostics and debugging - -# Required for zephyr.stack_analyze() -CONFIG_INIT_STACKS=y - -# Required for usocket.pkt_get_info() -CONFIG_NET_BUF_POOL_USAGE=y - -# Required for usocket.shell_*() -#CONFIG_NET_SHELL=y - -# Uncomment to enable "INFO" level net_buf logging -#CONFIG_NET_LOG=y -#CONFIG_NET_DEBUG_NET_BUF=y -# Change to 4 for "DEBUG" level -#CONFIG_SYS_LOG_NET_LEVEL=3 diff --git a/ports/zephyr/prj_frdm_k64f.conf b/ports/zephyr/prj_frdm_k64f.conf deleted file mode 100644 index 611d6bc0a4f15..0000000000000 --- a/ports/zephyr/prj_frdm_k64f.conf +++ /dev/null @@ -1,2 +0,0 @@ -# Networking drivers -CONFIG_NET_L2_ETHERNET=y diff --git a/ports/zephyr/prj_minimal.conf b/ports/zephyr/prj_minimal.conf deleted file mode 100644 index 5d6b353ba3f26..0000000000000 --- a/ports/zephyr/prj_minimal.conf +++ /dev/null @@ -1,6 +0,0 @@ -CONFIG_STDOUT_CONSOLE=y -CONFIG_CONSOLE_HANDLER=y -CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS=y -CONFIG_NEWLIB_LIBC=y -CONFIG_FLOAT=y -CONFIG_MAIN_STACK_SIZE=4096 diff --git a/ports/zephyr/prj_qemu_cortex_m3.conf b/ports/zephyr/prj_qemu_cortex_m3.conf deleted file mode 100644 index 1ade981e21538..0000000000000 --- a/ports/zephyr/prj_qemu_cortex_m3.conf +++ /dev/null @@ -1,7 +0,0 @@ -# Interrupt-driven UART console has emulation artifacts under QEMU, -# disable it -CONFIG_CONSOLE_PULL=n - -# Networking drivers -# SLIP driver for QEMU -CONFIG_NET_SLIP_TAP=y diff --git a/ports/zephyr/prj_qemu_x86.conf b/ports/zephyr/prj_qemu_x86.conf deleted file mode 100644 index 9bc81259a25ab..0000000000000 --- a/ports/zephyr/prj_qemu_x86.conf +++ /dev/null @@ -1,10 +0,0 @@ -# Interrupt-driven UART console has emulation artifacts under QEMU, -# disable it -CONFIG_CONSOLE_PULL=n - -# Networking drivers -# SLIP driver for QEMU -CONFIG_NET_SLIP_TAP=y - -# Default RAM easily overflows with uPy and networking -CONFIG_RAM_SIZE=320 diff --git a/ports/zephyr/src/Makefile b/ports/zephyr/src/Makefile deleted file mode 100644 index 36dd8c64efe6a..0000000000000 --- a/ports/zephyr/src/Makefile +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2016 Intel Corporation -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -obj-y += zephyr_start.o zephyr_getchar.o diff --git a/ports/zephyr/src/zephyr_getchar.c b/ports/zephyr/src/zephyr_getchar.c deleted file mode 100644 index 52b3394d0384a..0000000000000 --- a/ports/zephyr/src/zephyr_getchar.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (c) 2016 Linaro - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include -#include -#include "zephyr_getchar.h" - -extern int mp_interrupt_char; -void mp_keyboard_interrupt(void); - -static struct k_sem uart_sem; -#define UART_BUFSIZE 256 -static uint8_t uart_ringbuf[UART_BUFSIZE]; -static uint8_t i_get, i_put; - -static int console_irq_input_hook(uint8_t ch) -{ - int i_next = (i_put + 1) & (UART_BUFSIZE - 1); - if (i_next == i_get) { - printk("UART buffer overflow - char dropped\n"); - return 1; - } - if (ch == mp_interrupt_char) { - mp_keyboard_interrupt(); - return 1; - } else { - uart_ringbuf[i_put] = ch; - i_put = i_next; - } - //printk("%x\n", ch); - k_sem_give(&uart_sem); - k_yield(); - return 1; -} - -uint8_t zephyr_getchar(void) { - k_sem_take(&uart_sem, K_FOREVER); - unsigned int key = irq_lock(); - uint8_t c = uart_ringbuf[i_get++]; - i_get &= UART_BUFSIZE - 1; - irq_unlock(key); - return c; -} - -void zephyr_getchar_init(void) { - k_sem_init(&uart_sem, 0, UINT_MAX); - uart_console_in_debug_hook_install(console_irq_input_hook); - // All NULLs because we're interested only in the callback above - uart_register_input(NULL, NULL, NULL); -} diff --git a/ports/zephyr/src/zephyr_getchar.h b/ports/zephyr/src/zephyr_getchar.h deleted file mode 100644 index fb5f19a7b4195..0000000000000 --- a/ports/zephyr/src/zephyr_getchar.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2016 Linaro - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include - -void zephyr_getchar_init(void); -uint8_t zephyr_getchar(void); diff --git a/ports/zephyr/src/zephyr_start.c b/ports/zephyr/src/zephyr_start.c deleted file mode 100644 index 452e304cadddd..0000000000000 --- a/ports/zephyr/src/zephyr_start.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include -#include "zephyr_getchar.h" - -int real_main(void); - -void main(void) { -#ifdef CONFIG_CONSOLE_PULL - console_init(); -#else - zephyr_getchar_init(); -#endif - real_main(); -} diff --git a/ports/zephyr/uart_core.c b/ports/zephyr/uart_core.c deleted file mode 100644 index e41fb9acceacc..0000000000000 --- a/ports/zephyr/uart_core.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Linaro Limited - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#include -#include "py/mpconfig.h" -#include "src/zephyr_getchar.h" -// Zephyr headers -#include -#include - -/* - * Core UART functions to implement for a port - */ - -// Receive single character -int mp_hal_stdin_rx_chr(void) { -#ifdef CONFIG_CONSOLE_PULL - return console_getchar(); -#else - return zephyr_getchar(); -#endif -} - -// Send string of given length -void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) { -#ifdef CONFIG_CONSOLE_PULL - while (len--) { - char c = *str++; - while (console_putchar(c) == -1) { - k_sleep(1); - } - } -#else - static struct device *uart_console_dev; - if (uart_console_dev == NULL) { - uart_console_dev = device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME); - } - - while (len--) { - uart_poll_out(uart_console_dev, *str++); - } -#endif -} diff --git a/ports/zephyr/z_config.mk b/ports/zephyr/z_config.mk deleted file mode 100644 index 28addd8f29fc7..0000000000000 --- a/ports/zephyr/z_config.mk +++ /dev/null @@ -1,17 +0,0 @@ -srctree = $(ZEPHYR_BASE) - -include $(Z_DOTCONFIG) -override ARCH = $(subst $(DQUOTE),,$(CONFIG_ARCH)) -SOC_NAME = $(subst $(DQUOTE),,$(CONFIG_SOC)) -SOC_SERIES = $(subst $(DQUOTE),,$(CONFIG_SOC_SERIES)) -SOC_FAMILY = $(subst $(DQUOTE),,$(CONFIG_SOC_FAMILY)) -ifeq ($(SOC_SERIES),) -SOC_PATH = $(SOC_NAME) -else -SOC_PATH = $(SOC_FAMILY)/$(SOC_SERIES) -endif - -KBUILD_CFLAGS := -c -include $(ZEPHYR_BASE)/scripts/Kbuild.include - -include $(ZEPHYR_BASE)/arch/$(ARCH)/Makefile diff --git a/py/argcheck.c b/py/argcheck.c index 2a606d613aa67..a8df206e280e1 100644 --- a/py/argcheck.c +++ b/py/argcheck.c @@ -29,17 +29,28 @@ #include "py/runtime.h" -void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_args_max, bool takes_kw) { +#include "supervisor/shared/translate.h" + + +void mp_arg_check_num(size_t n_args, mp_map_t *kw_args, size_t n_args_min, size_t n_args_max, bool takes_kw) { + size_t n_kw = 0; + if (kw_args != NULL) { + n_kw = kw_args->used; + } + mp_arg_check_num_kw_array(n_args, n_kw, n_args_min, n_args_max, takes_kw); +} + +void mp_arg_check_num_kw_array(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_args_max, bool takes_kw) { // NOTE(tannewt): This prevents this function from being optimized away. // Without it, functions can crash when reading invalid args. __asm volatile (""); // TODO maybe take the function name as an argument so we can print nicer error messages - if (n_kw && !takes_kw) { + if (n_kw > 0 && !takes_kw) { #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE mp_arg_error_terse_mismatch(); #else - mp_raise_TypeError("function does not take keyword arguments"); + mp_raise_TypeError(translate("function does not take keyword arguments")); #endif } @@ -49,7 +60,7 @@ void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_ar mp_arg_error_terse_mismatch(); #else mp_raise_TypeError_varg( - "function takes %d positional arguments but %d were given", + translate("function takes %d positional arguments but %d were given"), n_args_min, n_args); #endif } @@ -59,7 +70,7 @@ void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_ar mp_arg_error_terse_mismatch(); #else mp_raise_TypeError_varg( - "function missing %d required positional arguments", + translate("function missing %d required positional arguments"), n_args_min - n_args); #endif } else if (n_args > n_args_max) { @@ -67,7 +78,7 @@ void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_ar mp_arg_error_terse_mismatch(); #else mp_raise_TypeError_varg( - "function expected at most %d arguments, got %d", + translate("function expected at most %d arguments, got %d"), n_args_max, n_args); #endif } @@ -92,7 +103,7 @@ void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n mp_arg_error_terse_mismatch(); } else { mp_raise_TypeError_varg( - "'%q' argument required", allowed[i].qst); + translate("'%q' argument required"), allowed[i].qst); } } out_vals[i] = allowed[i].defval; @@ -117,7 +128,7 @@ void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n mp_arg_error_terse_mismatch(); } else { // TODO better error message - mp_raise_TypeError("extra positional arguments given"); + mp_raise_TypeError(translate("extra positional arguments given")); } } if (kws_found < kws->used) { @@ -125,7 +136,7 @@ void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n mp_arg_error_terse_mismatch(); } else { // TODO better error message - mp_raise_TypeError("extra keyword arguments given"); + mp_raise_TypeError(translate("extra keyword arguments given")); } } } @@ -137,11 +148,11 @@ void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args, } NORETURN void mp_arg_error_terse_mismatch(void) { - mp_raise_TypeError("argument num/types mismatch"); + mp_raise_TypeError(translate("argument num/types mismatch")); } #if MICROPY_CPYTHON_COMPAT NORETURN void mp_arg_error_unimpl_kw(void) { - mp_raise_NotImplementedError("keyword argument(s) not yet implemented - use normal args instead"); + mp_raise_NotImplementedError(translate("keyword argument(s) not yet implemented - use normal args instead")); } #endif diff --git a/py/asmarm.c b/py/asmarm.c index 552fdfb344325..1a8923bc23c8e 100644 --- a/py/asmarm.c +++ b/py/asmarm.c @@ -150,10 +150,7 @@ void asm_arm_bkpt(asm_arm_t *as) { // | low address | high address in RAM void asm_arm_entry(asm_arm_t *as, int num_locals) { - - if (num_locals < 0) { - num_locals = 0; - } + assert(num_locals >= 0); as->stack_adjust = 0; as->push_reglist = 1 << ASM_ARM_REG_R1 diff --git a/py/asmarm.h b/py/asmarm.h index 9392a0fae6a99..5603030912353 100644 --- a/py/asmarm.h +++ b/py/asmarm.h @@ -122,7 +122,7 @@ void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label); void asm_arm_b_label(asm_arm_t *as, uint label); void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp); -#ifdef GENERIC_ASM_API +#if defined(GENERIC_ASM_API) && GENERIC_ASM_API // The following macros provide a (mostly) arch-independent API to // generate native code, and are used by the native emitter. @@ -167,17 +167,12 @@ void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp); } while (0) #define ASM_CALL_IND(as, ptr, idx) asm_arm_bl_ind(as, ptr, idx, ASM_ARM_REG_R3) -#define ASM_MOV_REG_TO_LOCAL(as, reg, local_num) asm_arm_mov_local_reg(as, (local_num), (reg)) -#define ASM_MOV_IMM_TO_REG(as, imm, reg) asm_arm_mov_reg_i32(as, (reg), (imm)) -#define ASM_MOV_ALIGNED_IMM_TO_REG(as, imm, reg) asm_arm_mov_reg_i32(as, (reg), (imm)) -#define ASM_MOV_IMM_TO_LOCAL_USING(as, imm, local_num, reg_temp) \ - do { \ - asm_arm_mov_reg_i32(as, (reg_temp), (imm)); \ - asm_arm_mov_local_reg(as, (local_num), (reg_temp)); \ - } while (false) -#define ASM_MOV_LOCAL_TO_REG(as, local_num, reg) asm_arm_mov_reg_local(as, (reg), (local_num)) +#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_arm_mov_local_reg((as), (local_num), (reg_src)) +#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm)) +#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_arm_mov_reg_i32((as), (reg_dest), (imm)) +#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_arm_mov_reg_local((as), (reg_dest), (local_num)) #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_arm_mov_reg_reg((as), (reg_dest), (reg_src)) -#define ASM_MOV_LOCAL_ADDR_TO_REG(as, local_num, reg) asm_arm_mov_reg_local_addr(as, (reg), (local_num)) +#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_arm_mov_reg_local_addr((as), (reg_dest), (local_num)) #define ASM_LSL_REG_REG(as, reg_dest, reg_shift) asm_arm_lsl_reg_reg((as), (reg_dest), (reg_shift)) #define ASM_ASR_REG_REG(as, reg_dest, reg_shift) asm_arm_asr_reg_reg((as), (reg_dest), (reg_shift)) diff --git a/py/asmbase.c b/py/asmbase.c index c941e917b73f5..4c84c3b255d1d 100644 --- a/py/asmbase.c +++ b/py/asmbase.c @@ -46,10 +46,10 @@ void mp_asm_base_deinit(mp_asm_base_t *as, bool free_code) { } void mp_asm_base_start_pass(mp_asm_base_t *as, int pass) { - if (pass == MP_ASM_PASS_COMPUTE) { - // reset all labels + if (pass < MP_ASM_PASS_EMIT) { + // Reset labels so we can detect backwards jumps (and verify unique assignment) memset(as->label_offsets, -1, as->max_num_labels * sizeof(size_t)); - } else if (pass == MP_ASM_PASS_EMIT) { + } else { // allocating executable RAM is platform specific MP_PLAT_ALLOC_EXEC(as->code_offset, (void**)&as->code_base, &as->code_size); assert(as->code_base != NULL); diff --git a/py/asmthumb.c b/py/asmthumb.c index 5316a7efb2336..c5b45f2f51555 100644 --- a/py/asmthumb.c +++ b/py/asmthumb.c @@ -104,6 +104,8 @@ STATIC void asm_thumb_write_word32(asm_thumb_t *as, int w32) { // | low address | high address in RAM void asm_thumb_entry(asm_thumb_t *as, int num_locals) { + assert(num_locals >= 0); + // work out what to push and how many extra spaces to reserve on stack // so that we have enough for all locals and it's aligned an 8-byte boundary // we push extra regs (r1, r2, r3) to help do the stack adjustment @@ -111,9 +113,6 @@ void asm_thumb_entry(asm_thumb_t *as, int num_locals) { // for push rlist, lowest numbered register at the lowest address uint reglist; uint stack_adjust; - if (num_locals < 0) { - num_locals = 0; - } // don't pop r0 because it's used for return value switch (num_locals) { case 0: diff --git a/py/asmthumb.h b/py/asmthumb.h index a19c11b2c2bc3..b7e2acc0480d3 100644 --- a/py/asmthumb.h +++ b/py/asmthumb.h @@ -26,6 +26,7 @@ #ifndef MICROPY_INCLUDED_PY_ASMTHUMB_H #define MICROPY_INCLUDED_PY_ASMTHUMB_H +#include #include "py/misc.h" #include "py/asmbase.h" @@ -237,7 +238,7 @@ void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narro void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp); // convenience -#ifdef GENERIC_ASM_API +#if defined(GENERIC_ASM_API) && GENERIC_ASM_API // The following macros provide a (mostly) arch-independent API to // generate native code, and are used by the native emitter. @@ -283,17 +284,12 @@ void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp } while (0) #define ASM_CALL_IND(as, ptr, idx) asm_thumb_bl_ind(as, ptr, idx, ASM_THUMB_REG_R3) -#define ASM_MOV_REG_TO_LOCAL(as, reg, local_num) asm_thumb_mov_local_reg(as, (local_num), (reg)) -#define ASM_MOV_IMM_TO_REG(as, imm, reg) asm_thumb_mov_reg_i32_optimised(as, (reg), (imm)) -#define ASM_MOV_ALIGNED_IMM_TO_REG(as, imm, reg) asm_thumb_mov_reg_i32_aligned(as, (reg), (imm)) -#define ASM_MOV_IMM_TO_LOCAL_USING(as, imm, local_num, reg_temp) \ - do { \ - asm_thumb_mov_reg_i32_optimised(as, (reg_temp), (imm)); \ - asm_thumb_mov_local_reg(as, (local_num), (reg_temp)); \ - } while (false) -#define ASM_MOV_LOCAL_TO_REG(as, local_num, reg) asm_thumb_mov_reg_local(as, (reg), (local_num)) +#define ASM_MOV_LOCAL_REG(as, local_num, reg) asm_thumb_mov_local_reg((as), (local_num), (reg)) +#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_thumb_mov_reg_i32_optimised((as), (reg_dest), (imm)) +#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_thumb_mov_reg_i32_aligned((as), (reg_dest), (imm)) +#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_thumb_mov_reg_local((as), (reg_dest), (local_num)) #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_thumb_mov_reg_reg((as), (reg_dest), (reg_src)) -#define ASM_MOV_LOCAL_ADDR_TO_REG(as, local_num, reg) asm_thumb_mov_reg_local_addr(as, (reg), (local_num)) +#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_thumb_mov_reg_local_addr((as), (reg_dest), (local_num)) #define ASM_LSL_REG_REG(as, reg_dest, reg_shift) asm_thumb_format_4((as), ASM_THUMB_FORMAT_4_LSL, (reg_dest), (reg_shift)) #define ASM_ASR_REG_REG(as, reg_dest, reg_shift) asm_thumb_format_4((as), ASM_THUMB_FORMAT_4_ASR, (reg_dest), (reg_shift)) diff --git a/py/asmx64.c b/py/asmx64.c index aa2a8ec7cc1da..c900a08d1fcba 100644 --- a/py/asmx64.c +++ b/py/asmx64.c @@ -526,11 +526,9 @@ void asm_x64_jcc_label(asm_x64_t *as, int jcc_type, mp_uint_t label) { } void asm_x64_entry(asm_x64_t *as, int num_locals) { + assert(num_locals >= 0); asm_x64_push_r64(as, ASM_X64_REG_RBP); asm_x64_mov_r64_r64(as, ASM_X64_REG_RBP, ASM_X64_REG_RSP); - if (num_locals < 0) { - num_locals = 0; - } num_locals |= 1; // make it odd so stack is aligned on 16 byte boundary asm_x64_sub_r64_i32(as, ASM_X64_REG_RSP, num_locals * WORD_SIZE); asm_x64_push_r64(as, ASM_X64_REG_RBX); diff --git a/py/asmx64.h b/py/asmx64.h index bf8bbd16248d8..ed0b785fb2302 100644 --- a/py/asmx64.h +++ b/py/asmx64.h @@ -114,7 +114,7 @@ void asm_x64_mov_r64_to_local(asm_x64_t* as, int src_r64, int dest_local_num); void asm_x64_mov_local_addr_to_r64(asm_x64_t* as, int local_num, int dest_r64); void asm_x64_call_ind(asm_x64_t* as, void* ptr, int temp_r32); -#ifdef GENERIC_ASM_API +#if defined(GENERIC_ASM_API) && GENERIC_ASM_API // The following macros provide a (mostly) arch-independent API to // generate native code, and are used by the native emitter. @@ -162,17 +162,12 @@ void asm_x64_call_ind(asm_x64_t* as, void* ptr, int temp_r32); } while (0) #define ASM_CALL_IND(as, ptr, idx) asm_x64_call_ind(as, ptr, ASM_X64_REG_RAX) -#define ASM_MOV_REG_TO_LOCAL asm_x64_mov_r64_to_local -#define ASM_MOV_IMM_TO_REG asm_x64_mov_i64_to_r64_optimised -#define ASM_MOV_ALIGNED_IMM_TO_REG asm_x64_mov_i64_to_r64_aligned -#define ASM_MOV_IMM_TO_LOCAL_USING(as, imm, local_num, reg_temp) \ - do { \ - asm_x64_mov_i64_to_r64_optimised(as, (imm), (reg_temp)); \ - asm_x64_mov_r64_to_local(as, (reg_temp), (local_num)); \ - } while (false) -#define ASM_MOV_LOCAL_TO_REG asm_x64_mov_local_to_r64 +#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_x64_mov_r64_to_local((as), (reg_src), (local_num)) +#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_x64_mov_i64_to_r64_optimised((as), (imm), (reg_dest)) +#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_x64_mov_i64_to_r64_aligned((as), (imm), (reg_dest)) +#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_x64_mov_local_to_r64((as), (local_num), (reg_dest)) #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_x64_mov_r64_r64((as), (reg_dest), (reg_src)) -#define ASM_MOV_LOCAL_ADDR_TO_REG asm_x64_mov_local_addr_to_r64 +#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_x64_mov_local_addr_to_r64((as), (local_num), (reg_dest)) #define ASM_LSL_REG(as, reg) asm_x64_shl_r64_cl((as), (reg)) #define ASM_ASR_REG(as, reg) asm_x64_sar_r64_cl((as), (reg)) diff --git a/py/asmx86.c b/py/asmx86.c index 6a78fbd5ea4ef..3938baaacb00f 100644 --- a/py/asmx86.c +++ b/py/asmx86.c @@ -387,7 +387,8 @@ void asm_x86_jcc_label(asm_x86_t *as, mp_uint_t jcc_type, mp_uint_t label) { } } -void asm_x86_entry(asm_x86_t *as, mp_uint_t num_locals) { +void asm_x86_entry(asm_x86_t *as, int num_locals) { + assert(num_locals >= 0); asm_x86_push_r32(as, ASM_X86_REG_EBP); asm_x86_mov_r32_r32(as, ASM_X86_REG_EBP, ASM_X86_REG_ESP); if (num_locals > 0) { diff --git a/py/asmx86.h b/py/asmx86.h index a5902987c33bc..0908b8c7111f8 100644 --- a/py/asmx86.h +++ b/py/asmx86.h @@ -104,7 +104,7 @@ void asm_x86_test_r8_with_r8(asm_x86_t* as, int src_r32_a, int src_r32_b); void asm_x86_setcc_r8(asm_x86_t* as, mp_uint_t jcc_type, int dest_r8); void asm_x86_jmp_label(asm_x86_t* as, mp_uint_t label); void asm_x86_jcc_label(asm_x86_t* as, mp_uint_t jcc_type, mp_uint_t label); -void asm_x86_entry(asm_x86_t* as, mp_uint_t num_locals); +void asm_x86_entry(asm_x86_t* as, int num_locals); void asm_x86_exit(asm_x86_t* as); void asm_x86_mov_arg_to_r32(asm_x86_t *as, int src_arg_num, int dest_r32); void asm_x86_mov_local_to_r32(asm_x86_t* as, int src_local_num, int dest_r32); @@ -112,7 +112,7 @@ void asm_x86_mov_r32_to_local(asm_x86_t* as, int src_r32, int dest_local_num); void asm_x86_mov_local_addr_to_r32(asm_x86_t* as, int local_num, int dest_r32); void asm_x86_call_ind(asm_x86_t* as, void* ptr, mp_uint_t n_args, int temp_r32); -#ifdef GENERIC_ASM_API +#if defined(GENERIC_ASM_API) && GENERIC_ASM_API // The following macros provide a (mostly) arch-independent API to // generate native code, and are used by the native emitter. @@ -160,17 +160,12 @@ void asm_x86_call_ind(asm_x86_t* as, void* ptr, mp_uint_t n_args, int temp_r32); } while (0) #define ASM_CALL_IND(as, ptr, idx) asm_x86_call_ind(as, ptr, mp_f_n_args[idx], ASM_X86_REG_EAX) -#define ASM_MOV_REG_TO_LOCAL asm_x86_mov_r32_to_local -#define ASM_MOV_IMM_TO_REG asm_x86_mov_i32_to_r32 -#define ASM_MOV_ALIGNED_IMM_TO_REG asm_x86_mov_i32_to_r32_aligned -#define ASM_MOV_IMM_TO_LOCAL_USING(as, imm, local_num, reg_temp) \ - do { \ - asm_x86_mov_i32_to_r32(as, (imm), (reg_temp)); \ - asm_x86_mov_r32_to_local(as, (reg_temp), (local_num)); \ - } while (false) -#define ASM_MOV_LOCAL_TO_REG asm_x86_mov_local_to_r32 +#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_x86_mov_r32_to_local((as), (reg_src), (local_num)) +#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_x86_mov_i32_to_r32((as), (imm), (reg_dest)) +#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_x86_mov_i32_to_r32_aligned((as), (imm), (reg_dest)) +#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_x86_mov_local_to_r32((as), (local_num), (reg_dest)) #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_x86_mov_r32_r32((as), (reg_dest), (reg_src)) -#define ASM_MOV_LOCAL_ADDR_TO_REG asm_x86_mov_local_addr_to_r32 +#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_x86_mov_local_addr_to_r32((as), (local_num), (reg_dest)) #define ASM_LSL_REG(as, reg) asm_x86_shl_r32_cl((as), (reg)) #define ASM_ASR_REG(as, reg) asm_x86_sar_r32_cl((as), (reg)) diff --git a/py/asmxtensa.h b/py/asmxtensa.h index 69de24b81280d..ef80f700a3bbb 100644 --- a/py/asmxtensa.h +++ b/py/asmxtensa.h @@ -239,7 +239,7 @@ void asm_xtensa_mov_local_reg(asm_xtensa_t *as, int local_num, uint reg_src); void asm_xtensa_mov_reg_local(asm_xtensa_t *as, uint reg_dest, int local_num); void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_num); -#ifdef GENERIC_ASM_API +#if defined(GENERIC_ASM_API) && GENERIC_ASM_API // The following macros provide a (mostly) arch-independent API to // generate native code, and are used by the native emitter. @@ -280,17 +280,12 @@ void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_nu asm_xtensa_op_callx0(as, ASM_XTENSA_REG_A0); \ } while (0) -#define ASM_MOV_REG_TO_LOCAL(as, reg, local_num) asm_xtensa_mov_local_reg(as, (local_num), (reg)) -#define ASM_MOV_IMM_TO_REG(as, imm, reg) asm_xtensa_mov_reg_i32(as, (reg), (imm)) -#define ASM_MOV_ALIGNED_IMM_TO_REG(as, imm, reg) asm_xtensa_mov_reg_i32(as, (reg), (imm)) -#define ASM_MOV_IMM_TO_LOCAL_USING(as, imm, local_num, reg_temp) \ - do { \ - asm_xtensa_mov_reg_i32(as, (reg_temp), (imm)); \ - asm_xtensa_mov_local_reg(as, (local_num), (reg_temp)); \ - } while (0) -#define ASM_MOV_LOCAL_TO_REG(as, local_num, reg) asm_xtensa_mov_reg_local(as, (reg), (local_num)) +#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_xtensa_mov_local_reg((as), (local_num), (reg_src)) +#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_xtensa_mov_reg_i32((as), (reg_dest), (imm)) +#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_xtensa_mov_reg_i32((as), (reg_dest), (imm)) +#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_xtensa_mov_reg_local((as), (reg_dest), (local_num)) #define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_mov_n((as), (reg_dest), (reg_src)) -#define ASM_MOV_LOCAL_ADDR_TO_REG(as, local_num, reg) asm_xtensa_mov_reg_local_addr(as, (reg), (local_num)) +#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_xtensa_mov_reg_local_addr((as), (reg_dest), (local_num)) #define ASM_LSL_REG_REG(as, reg_dest, reg_shift) \ do { \ diff --git a/py/bc.c b/py/bc.c index 381daa24dd110..69b4cb238b50e 100644 --- a/py/bc.c +++ b/py/bc.c @@ -33,6 +33,8 @@ #include "py/bc0.h" #include "py/bc.h" +#include "supervisor/shared/translate.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #else // don't print debugging info @@ -80,10 +82,10 @@ STATIC NORETURN void fun_pos_args_mismatch(mp_obj_fun_bc_t *f, size_t expected, #elif MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NORMAL (void)f; mp_raise_TypeError_varg( - "function takes %d positional arguments but %d were given", expected, given); + translate("function takes %d positional arguments but %d were given"), expected, given); #elif MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_DETAILED mp_raise_TypeError_varg( - "%q() takes %d positional arguments but %d were given", + translate("%q() takes %d positional arguments but %d were given"), mp_obj_fun_get_name(MP_OBJ_FROM_PTR(f)), expected, given); #endif } @@ -190,11 +192,18 @@ void mp_setup_code_state(mp_code_state_t *code_state, size_t n_args, size_t n_kw for (size_t i = 0; i < n_kw; i++) { // the keys in kwargs are expected to be qstr objects mp_obj_t wanted_arg_name = kwargs[2 * i]; + if(MP_UNLIKELY(!MP_OBJ_IS_QSTR(wanted_arg_name))) { + #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE + mp_raise_TypeError(translate("unexpected keyword argument")); + #else + mp_raise_TypeError(translate("keywords must be strings")); + #endif + } for (size_t j = 0; j < n_pos_args + n_kwonly_args; j++) { if (wanted_arg_name == arg_names[j]) { if (code_state->state[n_state - 1 - j] != MP_OBJ_NULL) { mp_raise_TypeError_varg( - "function got multiple values for argument '%q'", MP_OBJ_QSTR_VALUE(wanted_arg_name)); + translate("function got multiple values for argument '%q'"), MP_OBJ_QSTR_VALUE(wanted_arg_name)); } code_state->state[n_state - 1 - j] = kwargs[2 * i + 1]; goto continue2; @@ -203,10 +212,10 @@ void mp_setup_code_state(mp_code_state_t *code_state, size_t n_args, size_t n_kw // Didn't find name match with positional args if ((scope_flags & MP_SCOPE_FLAG_VARKEYWORDS) == 0) { #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE - mp_raise_TypeError("unexpected keyword argument"); + mp_raise_TypeError(translate("unexpected keyword argument")); #else nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, - "unexpected keyword argument '%q'", MP_OBJ_QSTR_VALUE(wanted_arg_name))); + translate("unexpected keyword argument '%q'"), MP_OBJ_QSTR_VALUE(wanted_arg_name))); #endif } mp_obj_dict_store(dict, kwargs[2 * i], kwargs[2 * i + 1]); @@ -232,7 +241,7 @@ continue2:; while (d < &code_state->state[n_state]) { if (*d++ == MP_OBJ_NULL) { mp_raise_TypeError_varg( - "function missing required positional argument #%d", &code_state->state[n_state] - d); + translate("function missing required positional argument #%d"), &code_state->state[n_state] - d); } } @@ -248,7 +257,7 @@ continue2:; code_state->state[n_state - 1 - n_pos_args - i] = elem->value; } else { mp_raise_TypeError_varg( - "function missing required keyword argument '%q'", + translate("function missing required keyword argument '%q'"), MP_OBJ_QSTR_VALUE(arg_names[n_pos_args + i])); } } @@ -257,7 +266,7 @@ continue2:; } else { // no keyword arguments given if (n_kwonly_args != 0) { - mp_raise_TypeError("function missing keyword-only argument"); + mp_raise_TypeError(translate("function missing keyword-only argument")); } if ((scope_flags & MP_SCOPE_FLAG_VARKEYWORDS) != 0) { *var_pos_kw_args = mp_obj_new_dict(0); diff --git a/py/binary.c b/py/binary.c index bb334ed3db983..2ec12fa931ea4 100644 --- a/py/binary.c +++ b/py/binary.c @@ -35,6 +35,8 @@ #include "py/objint.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + // Helpers to work with binary-encoded data #ifndef alignof @@ -47,7 +49,7 @@ size_t mp_binary_get_size(char struct_type, char val_type, mp_uint_t *palign) { switch (struct_type) { case '<': case '>': switch (val_type) { - case 'b': case 'B': + case 'b': case 'B': case 'x': size = 1; break; case 'h': case 'H': size = 2; break; @@ -77,7 +79,7 @@ size_t mp_binary_get_size(char struct_type, char val_type, mp_uint_t *palign) { // particular (or any) ABI. switch (val_type) { case BYTEARRAY_TYPECODE: - case 'b': case 'B': + case 'b': case 'B': case 'x': align = size = 1; break; case 'h': case 'H': align = alignof(short); @@ -107,7 +109,7 @@ size_t mp_binary_get_size(char struct_type, char val_type, mp_uint_t *palign) { } if (size == 0) { - mp_raise_ValueError("bad typecode"); + mp_raise_ValueError(translate("bad typecode")); } if (palign != NULL) { @@ -124,6 +126,7 @@ mp_obj_t mp_binary_get_val_array(char typecode, void *p, mp_uint_t index) { break; case BYTEARRAY_TYPECODE: case 'B': + case 'x': // value will be discarded val = ((unsigned char*)p)[index]; break; case 'h': @@ -148,7 +151,7 @@ mp_obj_t mp_binary_get_val_array(char typecode, void *p, mp_uint_t index) { #endif #if MICROPY_PY_BUILTINS_FLOAT case 'f': - return mp_obj_new_float((mp_float_t)((float*)p)[index]); + return mp_obj_new_float(((float*)p)[index]); case 'd': return mp_obj_new_float(((double*)p)[index]); #endif @@ -181,7 +184,7 @@ long long mp_binary_get_int(mp_uint_t size, bool is_signed, bool big_endian, con val = -1; } for (uint i = 0; i < size; i++) { - val <<= 8; + val *= 256; val |= *src; src += delta; } @@ -213,7 +216,7 @@ mp_obj_t mp_binary_get_val(char struct_type, char val_type, byte **ptr) { #if MICROPY_NONSTANDARD_TYPECODES } else if (val_type == 'S') { const char *s_val = (const char*)(uintptr_t)(mp_uint_t)val; - return mp_obj_new_str(s_val, strlen(s_val), false); + return mp_obj_new_str(s_val, strlen(s_val)); #endif #if MICROPY_PY_BUILTINS_FLOAT } else if (val_type == 'f') { @@ -301,15 +304,20 @@ void mp_binary_set_val(char struct_type, char val_type, mp_obj_t val_in, byte ** break; } #endif - default: + default: { + bool signed_type = is_signed(val_type); #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE if (MP_OBJ_IS_TYPE(val_in, &mp_type_int)) { + // It's a longint. + mp_obj_int_buffer_overflow_check(val_in, size, signed_type); mp_obj_int_to_bytes_impl(val_in, struct_type == '>', size, p); return; } else #endif { val = mp_obj_get_int(val_in); + // Small int checking is separate, to be fast. + mp_small_int_buffer_overflow_check(val, size, signed_type); // zero/sign extend if needed if (BYTES_PER_WORD < 8 && size > sizeof(val)) { int c = (is_signed(val_type) && (mp_int_t)val < 0) ? 0xff : 0x00; @@ -319,6 +327,7 @@ void mp_binary_set_val(char struct_type, char val_type, mp_obj_t val_in, byte ** } } } + } } mp_binary_set_int(MIN((size_t)size, sizeof(val)), struct_type == '>', p, val); @@ -340,16 +349,24 @@ void mp_binary_set_val_array(char typecode, void *p, mp_uint_t index, mp_obj_t v ((mp_obj_t*)p)[index] = val_in; break; #endif - default: + default: { + size_t size = mp_binary_get_size('@', typecode, NULL); + bool signed_type = is_signed(typecode); + #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE if (MP_OBJ_IS_TYPE(val_in, &mp_type_int)) { - size_t size = mp_binary_get_size('@', typecode, NULL); + // It's a long int. + mp_obj_int_buffer_overflow_check(val_in, size, signed_type); mp_obj_int_to_bytes_impl(val_in, MP_ENDIANNESS_BIG, size, (uint8_t*)p + index * size); return; } #endif - mp_binary_set_val_array_from_int(typecode, p, index, mp_obj_get_int(val_in)); + mp_int_t val = mp_obj_get_int(val_in); + // Small int checking is separate, to be fast. + mp_small_int_buffer_overflow_check(val, size, signed_type); + mp_binary_set_val_array_from_int(typecode, p, index, val); + } } } @@ -362,6 +379,8 @@ void mp_binary_set_val_array_from_int(char typecode, void *p, mp_uint_t index, m case 'B': ((unsigned char*)p)[index] = val; break; + case 'x': + ((unsigned char*)p)[index] = 0; case 'h': ((short*)p)[index] = val; break; diff --git a/py/builtin.h b/py/builtin.h index 84b99a8a4f2ea..6e0d5d9bef3b8 100644 --- a/py/builtin.h +++ b/py/builtin.h @@ -117,6 +117,13 @@ extern const mp_obj_module_t mp_module_websocket; extern const mp_obj_module_t mp_module_webrepl; extern const mp_obj_module_t mp_module_framebuf; extern const mp_obj_module_t mp_module_btree; +extern const mp_obj_module_t ulab_user_cmodule; +extern mp_obj_module_t ulab_fft_module; +extern mp_obj_module_t ulab_filter_module; +extern mp_obj_module_t ulab_linalg_module; +extern mp_obj_module_t ulab_numerical_module; +extern mp_obj_module_t ulab_poly_module; + extern const char MICROPY_PY_BUILTINS_HELP_TEXT[]; diff --git a/py/builtinevex.c b/py/builtinevex.c index 846603f46b4df..cb046b4076447 100644 --- a/py/builtinevex.c +++ b/py/builtinevex.c @@ -31,6 +31,8 @@ #include "py/runtime.h" #include "py/builtin.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_COMPILE typedef struct _mp_obj_code_t { @@ -94,7 +96,7 @@ STATIC mp_obj_t mp_builtin_compile(size_t n_args, const mp_obj_t *args) { case MP_QSTR_exec: parse_input_kind = MP_PARSE_FILE_INPUT; break; case MP_QSTR_eval: parse_input_kind = MP_PARSE_EVAL_INPUT; break; default: - mp_raise_ValueError("bad compile mode"); + mp_raise_ValueError(translate("bad compile mode")); } mp_obj_code_t *code = m_new_obj(mp_obj_code_t); diff --git a/py/builtinhelp.c b/py/builtinhelp.c index 1cea8caac25d6..9a3407a16fc03 100644 --- a/py/builtinhelp.c +++ b/py/builtinhelp.c @@ -27,6 +27,7 @@ #include #include +#include "genhdr/mpversion.h" #include "py/builtin.h" #include "py/mpconfig.h" #include "py/objmodule.h" @@ -70,7 +71,7 @@ STATIC void mp_help_add_from_names(mp_obj_t list, const char *name) { while (*name) { size_t l = strlen(name); // name should end in '.py' and we strip it off - mp_obj_list_append(list, mp_obj_new_str(name, l - 3, false)); + mp_obj_list_append(list, mp_obj_new_str(name, l - 3)); name += l + 1; } } @@ -109,7 +110,7 @@ STATIC void mp_help_print_modules(void) { // print the list of modules in a column-first order #define NUM_COLUMNS (4) #define COLUMN_WIDTH (18) - mp_uint_t len; + size_t len; mp_obj_t *items; mp_obj_list_get(list, &len, &items); unsigned int num_rows = (len + NUM_COLUMNS - 1) / NUM_COLUMNS; @@ -133,7 +134,10 @@ STATIC void mp_help_print_modules(void) { } // let the user know there may be other modules available from the filesystem - mp_print_str(MP_PYTHON_PRINTER, "Plus any modules on the filesystem\n"); + const compressed_string_t* compressed = translate("Plus any modules on the filesystem\n"); + char decompressed[compressed->length]; + decompress(compressed, decompressed); + mp_print_str(MP_PYTHON_PRINTER, decompressed); } #endif @@ -174,8 +178,12 @@ STATIC void mp_help_print_obj(const mp_obj_t obj) { STATIC mp_obj_t mp_builtin_help(size_t n_args, const mp_obj_t *args) { if (n_args == 0) { - // print a general help message - mp_print_str(MP_PYTHON_PRINTER, MICROPY_PY_BUILTINS_HELP_TEXT); + // print a general help message. Translate only works on single strings on one line. + const compressed_string_t* compressed = + translate("Welcome to Adafruit CircuitPython %s!\n\nPlease visit learn.adafruit.com/category/circuitpython for project guides.\n\nTo list built-in modules please do `help(\"modules\")`.\n"); + char decompressed[compressed->length]; + decompress(compressed, decompressed); + mp_printf(MP_PYTHON_PRINTER, decompressed, MICROPY_GIT_TAG); } else { // try to print something sensible about the given object mp_help_print_obj(args[0]); diff --git a/py/builtinimport.c b/py/builtinimport.c index 9f7d34dcaea95..2be779c6c0c29 100644 --- a/py/builtinimport.c +++ b/py/builtinimport.c @@ -31,12 +31,15 @@ #include "py/compile.h" #include "py/gc_long_lived.h" +#include "py/gc.h" #include "py/objmodule.h" #include "py/persistentcode.h" #include "py/runtime.h" #include "py/builtin.h" #include "py/frozenmod.h" +#include "supervisor/shared/translate.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #define DEBUG_printf DEBUG_printf @@ -45,6 +48,8 @@ #define DEBUG_printf(...) (void)0 #endif +#if MICROPY_ENABLE_EXTERNAL_IMPORT + #define PATH_SEP_CHAR '/' bool mp_obj_is_package(mp_obj_t module) { @@ -150,11 +155,9 @@ STATIC void do_load_from_lexer(mp_obj_t module_obj, mp_lexer_t *lex) { #endif #if MICROPY_PERSISTENT_CODE_LOAD || MICROPY_MODULE_FROZEN_MPY -STATIC void do_execute_raw_code(mp_obj_t module_obj, mp_raw_code_t *raw_code) { +STATIC void do_execute_raw_code(mp_obj_t module_obj, mp_raw_code_t *raw_code, const char *filename) { #if MICROPY_PY___FILE__ - // TODO - //qstr source_name = lex->source_name; - //mp_store_attr(module_obj, MP_QSTR___file__, MP_OBJ_NEW_QSTR(source_name)); + mp_store_attr(module_obj, MP_QSTR___file__, MP_OBJ_NEW_QSTR(qstr_from_str(filename))); #endif // execute the module in its context @@ -217,7 +220,7 @@ STATIC void do_load(mp_obj_t module_obj, vstr_t *file) { // its data) in the list of frozen files, execute it. #if MICROPY_MODULE_FROZEN_MPY if (frozen_type == MP_FROZEN_MPY) { - do_execute_raw_code(module_obj, modref); + do_execute_raw_code(module_obj, modref, file_str); return; } #endif @@ -230,7 +233,7 @@ STATIC void do_load(mp_obj_t module_obj, vstr_t *file) { #if MICROPY_PERSISTENT_CODE_LOAD if (file_str[file->len - 3] == 'm') { mp_raw_code_t *raw_code = mp_raw_code_load_file(file_str); - do_execute_raw_code(module_obj, raw_code); + do_execute_raw_code(module_obj, raw_code, file_str); return; } #endif @@ -245,7 +248,7 @@ STATIC void do_load(mp_obj_t module_obj, vstr_t *file) { #else // If we get here then the file was not frozen and we can't compile scripts. - mp_raise_ImportError("script compilation not supported"); + mp_raise_ImportError(translate("script compilation not supported")); #endif } @@ -330,11 +333,11 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { // We must have some component left over to import from if (p == this_name) { - mp_raise_ValueError("cannot perform relative import"); + mp_raise_ValueError(translate("cannot perform relative import")); } uint new_mod_l = (mod_len == 0 ? (size_t)(p - this_name) : (size_t)(p - this_name) + 1 + mod_len); - char *new_mod = alloca(new_mod_l); + char *new_mod = mp_local_alloc(new_mod_l); memcpy(new_mod, this_name, p - this_name); if (mod_len != 0) { new_mod[p - this_name] = '.'; @@ -342,9 +345,10 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { } qstr new_mod_q = qstr_from_strn(new_mod, new_mod_l); + mp_local_free(new_mod); DEBUG_printf("Resolved base name for relative import: '%s'\n", qstr_str(new_mod_q)); module_name = MP_OBJ_NEW_QSTR(new_mod_q); - mod_str = new_mod; + mod_str = qstr_str(new_mod_q); mod_len = new_mod_l; } @@ -396,26 +400,37 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { DEBUG_printf("Current path: %.*s\n", vstr_len(&path), vstr_str(&path)); if (stat == MP_IMPORT_STAT_NO_EXIST) { - #if MICROPY_MODULE_WEAK_LINKS - // check if there is a weak link to this module - if (i == mod_len) { - mp_map_elem_t *el = mp_map_lookup((mp_map_t*)&mp_builtin_module_weak_links_map, MP_OBJ_NEW_QSTR(mod_name), MP_MAP_LOOKUP); + // This is just the module name after the previous . + qstr current_module_name = qstr_from_strn(mod_str + last, i - last); + mp_map_elem_t *el = NULL; + if (outer_module_obj == MP_OBJ_NULL) { + el = mp_map_lookup((mp_map_t*)&mp_builtin_module_map, + MP_OBJ_NEW_QSTR(current_module_name), + MP_MAP_LOOKUP); + #if MICROPY_MODULE_WEAK_LINKS + // check if there is a weak link to this module if (el == NULL) { - goto no_exist; + el = mp_map_lookup((mp_map_t*)&mp_builtin_module_weak_links_map, + MP_OBJ_NEW_QSTR(current_module_name), + MP_MAP_LOOKUP); } - // found weak linked module + #endif + } else { + el = mp_map_lookup(&((mp_obj_module_t*) outer_module_obj)->globals->map, + MP_OBJ_NEW_QSTR(current_module_name), + MP_MAP_LOOKUP); + } + + if (el != NULL && MP_OBJ_IS_TYPE(el->value, &mp_type_module)) { module_obj = el->value; + mp_module_call_init(mod_name, module_obj); } else { - no_exist: - #else - { - #endif // couldn't find the file, so fail if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_ImportError("module not found"); + mp_raise_ImportError(translate("module not found")); } else { mp_raise_msg_varg(&mp_type_ImportError, - "no module named '%q'", mod_name); + translate("no module named '%q'"), mod_name); } } } else { @@ -451,7 +466,7 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { DEBUG_printf("%.*s is dir\n", vstr_len(&path), vstr_str(&path)); // https://docs.python.org/3/reference/import.html // "Specifically, any module that contains a __path__ attribute is considered a package." - mp_store_attr(module_obj, MP_QSTR___path__, mp_obj_new_str(vstr_str(&path), vstr_len(&path), false)); + mp_store_attr(module_obj, MP_QSTR___path__, mp_obj_new_str(vstr_str(&path), vstr_len(&path))); size_t orig_path_len = path.len; vstr_add_char(&path, PATH_SEP_CHAR); vstr_add_str(&path, "__init__.py"); @@ -468,6 +483,10 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { // (the module that was just loaded) is not a package. This will be caught // on the next iteration because the file will not exist. } + + // Loading a module thrashes the heap significantly so we explicitly clean up + // afterwards. + gc_collect(); } if (outer_module_obj != MP_OBJ_NULL) { qstr s = qstr_from_strn(mod_str + last, i - last); @@ -492,4 +511,41 @@ mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { // Otherwise, we need to return top-level package return top_module_obj; } + +#else // MICROPY_ENABLE_EXTERNAL_IMPORT + +mp_obj_t mp_builtin___import__(size_t n_args, const mp_obj_t *args) { + // Check that it's not a relative import + if (n_args >= 5 && MP_OBJ_SMALL_INT_VALUE(args[4]) != 0) { + mp_raise_NotImplementedError(translate("relative import")); + } + + // Check if module already exists, and return it if it does + qstr module_name_qstr = mp_obj_str_get_qstr(args[0]); + mp_obj_t module_obj = mp_module_get(module_name_qstr); + if (module_obj != MP_OBJ_NULL) { + return module_obj; + } + + #if MICROPY_MODULE_WEAK_LINKS + // Check if there is a weak link to this module + mp_map_elem_t *el = mp_map_lookup((mp_map_t*)&mp_builtin_module_weak_links_map, MP_OBJ_NEW_QSTR(module_name_qstr), MP_MAP_LOOKUP); + if (el != NULL) { + // Found weak-linked module + mp_module_call_init(module_name_qstr, el->value); + return el->value; + } + #endif + + // Couldn't find the module, so fail + if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { + mp_raise_msg(&mp_type_ImportError, translate("module not found")); + } else { + nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ImportError, + translate("no module named '%q'"), module_name_qstr)); + } +} + +#endif // MICROPY_ENABLE_EXTERNAL_IMPORT + MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_builtin___import___obj, 1, 5, mp_builtin___import__); diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk new file mode 100644 index 0000000000000..f84d0b5b1d619 --- /dev/null +++ b/py/circuitpy_defns.mk @@ -0,0 +1,464 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Common Makefile definitions that can be shared across CircuitPython ports. + +### +# Common compile warnings. + +BASE_CFLAGS = \ + -fsingle-precision-constant \ + -fno-strict-aliasing \ + -Wdouble-promotion \ + -Wno-endif-labels \ + -Wstrict-prototypes \ + -Werror-implicit-function-declaration \ + -Wfloat-equal \ + -Wundef \ + -Wshadow \ + -Wwrite-strings \ + -Wsign-compare \ + -Wmissing-format-attribute \ + -Wno-deprecated-declarations \ + -Wnested-externs \ + -Wunreachable-code \ + -Wcast-align \ + -Wno-error=lto-type-mismatch \ + -D__$(CHIP_VARIANT)__ \ + -ffunction-sections \ + -fdata-sections \ + -fshort-enums \ + -DCIRCUITPY_SOFTWARE_SAFE_MODE=0x0ADABEEF \ + -DCIRCUITPY_CANARY_WORD=0xADAF00 \ + -DCIRCUITPY_SAFE_RESTART_WORD=0xDEADBEEF \ + --param max-inline-insns-single=500 + +# Use these flags to debug build times and header includes. +# -ftime-report +# -H + + +### +# Handle frozen modules. + +ifneq ($(FROZEN_DIR),) +# To use frozen source modules, put your .py files in a subdirectory (eg scripts/) +# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch). +CFLAGS += -DMICROPY_MODULE_FROZEN_STR +CFLAGS += -Wno-error=lto-type-mismatch +endif + +# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and +# then invoke make with FROZEN_MPY_DIR=frozen or FROZEN_MPY_DIRS="dir1 dir2" +# (be sure to build from scratch). + +ifneq ($(FROZEN_MPY_DIRS),) +CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool +CFLAGS += -DMICROPY_MODULE_FROZEN_MPY +CFLAGS += -Wno-error=lto-type-mismatch +endif + + +### +# Propagate longint choice from .mk to C. There's no easy string comparison +# in cpp conditionals, so we #define separate names for each. +ifeq ($(LONGINT_IMPL),NONE) +CFLAGS += -DLONGINT_IMPL_NONE +endif + +ifeq ($(LONGINT_IMPL),MPZ) +CFLAGS += -DLONGINT_IMPL_MPZ +endif + +ifeq ($(LONGINT_IMPL),LONGLONG) +CFLAGS += -DLONGINT_IMPL_LONGLONG +endif + + +### +# Select which builtin modules to compile and include. + +ifeq ($(CIRCUITPY_ANALOGIO),1) +SRC_PATTERNS += analogio/% +endif +ifeq ($(CIRCUITPY_AUDIOBUSIO),1) +SRC_PATTERNS += audiobusio/% +endif +ifeq ($(CIRCUITPY_AUDIOIO),1) +SRC_PATTERNS += audioio/% +endif +ifeq ($(CIRCUITPY_AUDIOPWMIO),1) +SRC_PATTERNS += audiopwmio/% +endif +ifeq ($(CIRCUITPY_AUDIOCORE),1) +SRC_PATTERNS += audiocore/% +endif +ifeq ($(CIRCUITPY_AUDIOMIXER),1) +SRC_PATTERNS += audiomixer/% +endif +ifeq ($(CIRCUITPY_AUDIOMP3),1) +SRC_PATTERNS += audiomp3/% +endif +ifeq ($(CIRCUITPY_BITBANGIO),1) +SRC_PATTERNS += bitbangio/% +endif +# Some builds need bitbang SPI for the dotstar but don't make bitbangio available so include it separately. +ifeq ($(CIRCUITPY_BITBANG_APA102),1) +SRC_PATTERNS += bitbangio/SPI% +endif +ifeq ($(CIRCUITPY_BLEIO),1) +SRC_PATTERNS += _bleio/% +endif +ifeq ($(CIRCUITPY_BOARD),1) +SRC_PATTERNS += board/% +endif +ifeq ($(CIRCUITPY_BUSIO),1) +SRC_PATTERNS += busio/% bitbangio/OneWire.% +endif +ifeq ($(CIRCUITPY_DIGITALIO),1) +SRC_PATTERNS += digitalio/% +endif +ifeq ($(CIRCUITPY_DISPLAYIO),1) +SRC_PATTERNS += displayio/% terminalio/% fontio/% +endif +ifeq ($(CIRCUITPY_FREQUENCYIO),1) +SRC_PATTERNS += frequencyio/% +endif +ifeq ($(CIRCUITPY_GAMEPAD),1) +SRC_PATTERNS += gamepad/% +endif +ifeq ($(CIRCUITPY_GAMEPADSHIFT),1) +SRC_PATTERNS += gamepadshift/% +endif +ifeq ($(CIRCUITPY_I2CSLAVE),1) +SRC_PATTERNS += i2cslave/% +endif +ifeq ($(CIRCUITPY_MATH),1) +SRC_PATTERNS += math/% +endif +ifeq ($(CIRCUITPY__EVE),1) +SRC_PATTERNS += _eve/% +endif +ifeq ($(CIRCUITPY_MICROCONTROLLER),1) +SRC_PATTERNS += microcontroller/% +endif +ifeq ($(CIRCUITPY_NEOPIXEL_WRITE),1) +SRC_PATTERNS += neopixel_write/% +endif +ifeq ($(CIRCUITPY_NETWORK),1) +SRC_PATTERNS += network/% socket/% +endif +ifeq ($(CIRCUITPY_NVM),1) +SRC_PATTERNS += nvm/% +endif +ifeq ($(CIRCUITPY_OS),1) +SRC_PATTERNS += os/% +endif +ifeq ($(CIRCUITPY_PIXELBUF),1) +SRC_PATTERNS += _pixelbuf/% +endif +ifeq ($(CIRCUITPY_PULSEIO),1) +SRC_PATTERNS += pulseio/% +endif +ifeq ($(CIRCUITPY_PS2IO),1) +SRC_PATTERNS += ps2io/% +endif +ifeq ($(CIRCUITPY_RANDOM),1) +SRC_PATTERNS += random/% +endif +ifeq ($(CIRCUITPY_ROTARYIO),1) +SRC_PATTERNS += rotaryio/% +endif +ifeq ($(CIRCUITPY_RTC),1) +SRC_PATTERNS += rtc/% +endif +ifeq ($(CIRCUITPY_SAMD),1) +SRC_PATTERNS += samd/% +endif +ifeq ($(CIRCUITPY_STAGE),1) +SRC_PATTERNS += _stage/% +endif +ifeq ($(CIRCUITPY_STORAGE),1) +SRC_PATTERNS += storage/% +endif +ifeq ($(CIRCUITPY_STRUCT),1) +SRC_PATTERNS += struct/% +endif +ifeq ($(CIRCUITPY_SUPERVISOR),1) +SRC_PATTERNS += supervisor/% +endif +ifeq ($(CIRCUITPY_TIME),1) +SRC_PATTERNS += time/% +endif +ifeq ($(CIRCUITPY_TOUCHIO),1) +SRC_PATTERNS += touchio/% +endif +ifeq ($(CIRCUITPY_UHEAP),1) +SRC_PATTERNS += uheap/% +endif +ifeq ($(CIRCUITPY_USB_HID),1) +SRC_PATTERNS += usb_hid/% +endif +ifeq ($(CIRCUITPY_USB_MIDI),1) +SRC_PATTERNS += usb_midi/% +endif +ifeq ($(CIRCUITPY_USTACK),1) +SRC_PATTERNS += ustack/% +endif +ifeq ($(CIRCUITPY_PEW),1) +SRC_PATTERNS += _pew/% +endif + +# All possible sources are listed here, and are filtered by SRC_PATTERNS in SRC_COMMON_HAL +SRC_COMMON_HAL_ALL = \ + _bleio/__init__.c \ + _bleio/Adapter.c \ + _bleio/Attribute.c \ + _bleio/Characteristic.c \ + _bleio/CharacteristicBuffer.c \ + _bleio/Connection.c \ + _bleio/Descriptor.c \ + _bleio/PacketBuffer.c \ + _bleio/Service.c \ + _bleio/UUID.c \ + analogio/AnalogIn.c \ + analogio/AnalogOut.c \ + analogio/__init__.c \ + audiobusio/__init__.c \ + audiobusio/I2SOut.c \ + audiobusio/PDMIn.c \ + audiopwmio/__init__.c \ + audiopwmio/PWMAudioOut.c \ + audioio/__init__.c \ + audioio/AudioOut.c \ + board/__init__.c \ + busio/I2C.c \ + busio/SPI.c \ + busio/UART.c \ + busio/__init__.c \ + digitalio/DigitalInOut.c \ + digitalio/__init__.c \ + displayio/ParallelBus.c \ + frequencyio/__init__.c \ + frequencyio/FrequencyIn.c \ + i2cslave/I2CSlave.c \ + i2cslave/__init__.c \ + microcontroller/Pin.c \ + microcontroller/Processor.c \ + microcontroller/__init__.c \ + neopixel_write/__init__.c \ + nvm/ByteArray.c \ + nvm/__init__.c \ + os/__init__.c \ + pulseio/PWMOut.c \ + pulseio/PulseIn.c \ + pulseio/PulseOut.c \ + pulseio/__init__.c \ + ps2io/Ps2.c \ + ps2io/__init__.c \ + rotaryio/IncrementalEncoder.c \ + rotaryio/__init__.c \ + rtc/RTC.c \ + rtc/__init__.c \ + supervisor/Runtime.c \ + supervisor/__init__.c \ + time/__init__.c + +SRC_COMMON_HAL = $(filter $(SRC_PATTERNS), $(SRC_COMMON_HAL_ALL)) + +# These don't have corresponding files in each port but are still located in +# shared-bindings to make it clear what the contents of the modules are. +# All possible sources are listed here, and are filtered by SRC_PATTERNS. +SRC_BINDINGS_ENUMS = \ +$(filter $(SRC_PATTERNS), \ + _bleio/Address.c \ + _bleio/Attribute.c \ + _bleio/ScanEntry.c \ + digitalio/Direction.c \ + digitalio/DriveMode.c \ + digitalio/Pull.c \ + fontio/Glyph.c \ + microcontroller/RunMode.c \ + math/__init__.c \ + _eve/__init__.c \ +) + +SRC_BINDINGS_ENUMS += \ + help.c \ + util.c + +SRC_SHARED_MODULE_ALL = \ + _bleio/Address.c \ + _bleio/Attribute.c \ + _bleio/ScanEntry.c \ + _bleio/ScanResults.c \ + _pixelbuf/PixelBuf.c \ + _pixelbuf/__init__.c \ + _stage/Layer.c \ + _stage/Text.c \ + _stage/__init__.c \ + audiopwmio/__init__.c \ + audioio/__init__.c \ + audiocore/__init__.c \ + audiocore/RawSample.c \ + audiocore/WaveFile.c \ + audiomixer/__init__.c \ + audiomixer/Mixer.c \ + audiomixer/MixerVoice.c \ + audiomp3/__init__.c \ + audiomp3/MP3Decoder.c \ + bitbangio/I2C.c \ + bitbangio/OneWire.c \ + bitbangio/SPI.c \ + bitbangio/__init__.c \ + board/__init__.c \ + busio/OneWire.c \ + displayio/Bitmap.c \ + displayio/ColorConverter.c \ + displayio/Display.c \ + displayio/EPaperDisplay.c \ + displayio/FourWire.c \ + displayio/Group.c \ + displayio/I2CDisplay.c \ + displayio/OnDiskBitmap.c \ + displayio/Palette.c \ + displayio/Shape.c \ + displayio/TileGrid.c \ + displayio/__init__.c \ + fontio/BuiltinFont.c \ + fontio/__init__.c \ + gamepad/GamePad.c \ + gamepad/__init__.c \ + gamepadshift/GamePadShift.c \ + gamepadshift/__init__.c \ + os/__init__.c \ + random/__init__.c \ + socket/__init__.c \ + network/__init__.c \ + storage/__init__.c \ + struct/__init__.c \ + terminalio/Terminal.c \ + terminalio/__init__.c \ + uheap/__init__.c \ + ustack/__init__.c \ + _pew/__init__.c \ + _pew/PewPew.c \ + _eve/__init__.c + +# All possible sources are listed here, and are filtered by SRC_PATTERNS. +SRC_SHARED_MODULE = $(filter $(SRC_PATTERNS), $(SRC_SHARED_MODULE_ALL)) + +# Use the native touchio if requested. This flag is set conditionally in, say, mpconfigport.h. +# The presence of common-hal/touchio/* # does not imply it's available for all chips in a port, +# so there is an explicit flag. For example, SAMD21 touchio is native, but SAMD51 is not. +ifeq ($(CIRCUITPY_TOUCHIO_USE_NATIVE),1) +SRC_COMMON_HAL_ALL += \ + touchio/TouchIn.c \ + touchio/__init__.c +else +SRC_SHARED_MODULE_ALL += \ + touchio/TouchIn.c \ + touchio/__init__.c +endif +ifeq ($(CIRCUITPY_AUDIOMP3),1) +SRC_MOD += $(addprefix lib/mp3/src/, \ + bitstream.c \ + buffers.c \ + dct32.c \ + dequant.c \ + dqchan.c \ + huffman.c \ + hufftabs.c \ + imdct.c \ + mp3dec.c \ + mp3tabs.c \ + polyphase.c \ + scalfact.c \ + stproc.c \ + subband.c \ + trigtabs.c \ +) +$(BUILD)/lib/mp3/src/buffers.o: CFLAGS += -include "py/misc.h" -D'MPDEC_ALLOCATOR(x)=m_malloc(x,0)' -D'MPDEC_FREE(x)=m_free(x)' +endif + +# All possible sources are listed here, and are filtered by SRC_PATTERNS. +SRC_SHARED_MODULE_INTERNAL = \ +$(filter $(SRC_PATTERNS), \ + displayio/display_core.c \ +) + +ifeq ($(INTERNAL_LIBM),1) +SRC_LIBM = \ +$(addprefix lib/,\ + libm/math.c \ + libm/roundf.c \ + libm/fmodf.c \ + libm/nearbyintf.c \ + libm/ef_sqrt.c \ + libm/kf_rem_pio2.c \ + libm/kf_sin.c \ + libm/kf_cos.c \ + libm/kf_tan.c \ + libm/ef_rem_pio2.c \ + libm/sf_sin.c \ + libm/sf_cos.c \ + libm/sf_tan.c \ + libm/sf_frexp.c \ + libm/sf_modf.c \ + libm/sf_ldexp.c \ + libm/asinfacosf.c \ + libm/atanf.c \ + libm/atan2f.c \ + ) +ifeq ($(CIRCUITPY_ULAB),1) +SRC_LIBM += \ +$(addprefix lib/,\ + libm/acoshf.c \ + libm/asinhf.c \ + libm/atanhf.c \ + libm/erf_lgamma.c \ + libm/log1pf.c \ + libm/sf_erf.c \ + libm/wf_lgamma.c \ + libm/wf_tgamma.c \ + ) +endif +endif + +ifdef LD_TEMPLATE_FILE +# Generate a linker script (.ld file) from a template, for those builds that use it. +GENERATED_LD_FILE = $(BUILD)/$(notdir $(patsubst %.template.ld,%.ld,$(LD_TEMPLATE_FILE))) +# +# ld_defines.pp is generated from ld_defines.c. See py/mkrules.mk. +# Run gen_ld_files.py over ALL *.template.ld files, not just LD_TEMPLATE_FILE, +# because it may include other template files. +$(GENERATED_LD_FILE): $(BUILD)/ld_defines.pp boards/*.template.ld + $(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(TOP)/tools/gen_ld_files.py --defines $< --out_dir $(BUILD) boards/*.template.ld +endif + +.PHONY: check-release-needs-clean-build + +check-release-needs-clean-build: + @echo "RELEASE_NEEDS_CLEAN_BUILD = $(RELEASE_NEEDS_CLEAN_BUILD)" diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h new file mode 100644 index 0000000000000..04e19126430f1 --- /dev/null +++ b/py/circuitpy_mpconfig.h @@ -0,0 +1,715 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file contains settings that are common across CircuitPython ports, to make +// sure that the same feature set and settings are used, such as in atmel-samd +// and nrf. + +#ifndef __INCLUDED_MPCONFIG_CIRCUITPY_H +#define __INCLUDED_MPCONFIG_CIRCUITPY_H + +#include +#include + +// This is CircuitPython. +#define CIRCUITPY 1 + +// REPR_C encodes qstrs, 31-bit ints, and 30-bit floats in a single 32-bit word. +#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_C) + +// options to control how MicroPython is built +// TODO(tannewt): Reduce this number if we want the REPL to function under 512 +// free bytes. +// #define MICROPY_ALLOC_PARSE_RULE_INIT (64) + +// Sorted alphabetically for easy finding. +// +// default is 128; consider raising to reduce fragmentation. +#define MICROPY_ALLOC_PARSE_CHUNK_INIT (16) +// default is 512. +#define MICROPY_ALLOC_PATH_MAX (256) +#define MICROPY_CAN_OVERRIDE_BUILTINS (1) +#define MICROPY_COMP_CONST (1) +#define MICROPY_COMP_DOUBLE_TUPLE_ASSIGN (1) +#define MICROPY_COMP_MODULE_CONST (1) +#define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) +#define MICROPY_DEBUG_PRINTERS (0) +#define MICROPY_EMIT_INLINE_THUMB (CIRCUITPY_ENABLE_MPY_NATIVE) +#define MICROPY_EMIT_THUMB (CIRCUITPY_ENABLE_MPY_NATIVE) +#define MICROPY_EMIT_X64 (0) +#define MICROPY_ENABLE_DOC_STRING (0) +#define MICROPY_ENABLE_FINALISER (1) +#define MICROPY_ENABLE_GC (1) +#define MICROPY_ENABLE_SOURCE_LINE (1) +#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) +#define MICROPY_FLOAT_HIGH_QUALITY_HASH (0) +#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) +#define MICROPY_GC_ALLOC_THRESHOLD (0) +#define MICROPY_HELPER_LEXER_UNIX (0) +#define MICROPY_HELPER_REPL (1) +#define MICROPY_KBD_EXCEPTION (1) +#define MICROPY_MEM_STATS (0) +#define MICROPY_MODULE_BUILTIN_INIT (1) +#define MICROPY_NONSTANDARD_TYPECODES (0) +#define MICROPY_OPT_COMPUTED_GOTO (1) +#define MICROPY_PERSISTENT_CODE_LOAD (1) + +#define MICROPY_PY_ARRAY (1) +#define MICROPY_PY_ARRAY_SLICE_ASSIGN (1) +#define MICROPY_PY_ASYNC_AWAIT (0) +#define MICROPY_PY_ATTRTUPLE (1) + +#define MICROPY_PY_BUILTINS_BYTEARRAY (1) +#define MICROPY_PY_BUILTINS_ENUMERATE (1) +#define MICROPY_PY_BUILTINS_FILTER (1) +#define MICROPY_PY_BUILTINS_HELP (1) +#define MICROPY_PY_BUILTINS_HELP_MODULES (1) +#define MICROPY_PY_BUILTINS_INPUT (1) +#define MICROPY_PY_BUILTINS_MEMORYVIEW (1) +#define MICROPY_PY_BUILTINS_MIN_MAX (1) +#define MICROPY_PY_BUILTINS_PROPERTY (1) +#define MICROPY_PY_BUILTINS_REVERSED (1) +#define MICROPY_PY_BUILTINS_ROUND_INT (1) +#define MICROPY_PY_BUILTINS_SET (1) +#define MICROPY_PY_BUILTINS_SLICE (1) +#define MICROPY_PY_BUILTINS_SLICE_ATTRS (1) +#define MICROPY_PY_BUILTINS_STR_UNICODE (1) + +#define MICROPY_PY_CMATH (0) +#define MICROPY_PY_COLLECTIONS (1) +#define MICROPY_PY_DESCRIPTORS (1) +#define MICROPY_PY_IO_FILEIO (1) +#define MICROPY_PY_GC (1) +// Supplanted by shared-bindings/math +#define MICROPY_PY_MATH (0) +#define MICROPY_PY_MICROPYTHON_MEM_INFO (0) +// Supplanted by shared-bindings/struct +#define MICROPY_PY_STRUCT (0) +#define MICROPY_PY_SYS (1) +#define MICROPY_PY_SYS_MAXSIZE (1) +#define MICROPY_PY_SYS_STDFILES (1) +// Supplanted by shared-bindings/random +#define MICROPY_PY_URANDOM (0) +#define MICROPY_PY_URANDOM_EXTRA_FUNCS (0) +#define MICROPY_PY___FILE__ (1) + +#define MICROPY_QSTR_BYTES_IN_HASH (1) +#define MICROPY_REPL_AUTO_INDENT (1) +#define MICROPY_REPL_EVENT_DRIVEN (0) +#define MICROPY_STACK_CHECK (1) +#define MICROPY_STREAMS_NON_BLOCK (1) +#define MICROPY_USE_INTERNAL_PRINTF (1) + +// fatfs configuration used in ffconf.h +// +// 1 = SFN/ANSI 437=LFN/U.S.(OEM) +#define MICROPY_FATFS_ENABLE_LFN (1) +#define MICROPY_FATFS_LFN_CODE_PAGE (437) +#define MICROPY_FATFS_USE_LABEL (1) +#define MICROPY_FATFS_RPATH (2) +#define MICROPY_FATFS_MULTI_PARTITION (1) + +// Only enable this if you really need it. It allocates a byte cache of this size. +// #define MICROPY_FATFS_MAX_SS (4096) + +#define FILESYSTEM_BLOCK_SIZE (512) + +#define MICROPY_VFS (1) +#define MICROPY_VFS_FAT (MICROPY_VFS) +#define MICROPY_READER_VFS (MICROPY_VFS) + +// type definitions for the specific machine + +#define BYTES_PER_WORD (4) + +#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1)) + +// Track stack usage. Expose results via ustack module. +#define MICROPY_MAX_STACK_USAGE (0) + +// This port is intended to be 32-bit, but unfortunately, int32_t for +// different targets may be defined in different ways - either as int +// or as long. This requires different printf formatting specifiers +// to print such value. So, we avoid int32_t and use int directly. +#define UINT_FMT "%u" +#define INT_FMT "%d" +typedef int mp_int_t; // must be pointer size +typedef unsigned mp_uint_t; // must be pointer size +typedef long mp_off_t; + +#define MP_PLAT_PRINT_STRN(str, len) mp_hal_stdout_tx_strn_cooked(str, len) + +#define mp_type_fileio mp_type_vfs_fat_fileio +#define mp_type_textio mp_type_vfs_fat_textio + +#define mp_import_stat mp_vfs_import_stat +#define mp_builtin_open_obj mp_vfs_open_obj + + +// extra built in names to add to the global namespace +#define MICROPY_PORT_BUILTINS \ + { MP_OBJ_NEW_QSTR(MP_QSTR_help), (mp_obj_t)&mp_builtin_help_obj }, \ + { MP_OBJ_NEW_QSTR(MP_QSTR_input), (mp_obj_t)&mp_builtin_input_obj }, \ + { MP_OBJ_NEW_QSTR(MP_QSTR_open), (mp_obj_t)&mp_builtin_open_obj }, + +////////////////////////////////////////////////////////////////////////////////////////////////// +// board-specific definitions, which control and may override definitions below. +#include "mpconfigboard.h" + +// CIRCUITPY_FULL_BUILD is defined in a *.mk file. + +// Remove some lesser-used functionality to make small builds fit. +#define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD) +//TODO: replace this with a rework of the FULL_BUILD system +#if !defined(MICROPY_CPYTHON_COMPAT) + #define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) +#endif +#if !defined(MICROPY_COMP_FSTRING_LITERAL) +#define MICROPY_COMP_FSTRING_LITERAL (MICROPY_CPYTHON_COMPAT) +#endif +#define MICROPY_MODULE_WEAK_LINKS (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_ALL_SPECIAL_METHODS (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_COMPLEX (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_FROZENSET (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_STR_CENTER (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_STR_PARTITION (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_STR_SPLITLINES (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_UERRNO (CIRCUITPY_FULL_BUILD) +// Opposite setting is deliberate. +#define MICROPY_PY_UERRNO_ERRORCODE (!CIRCUITPY_FULL_BUILD) +#ifndef MICROPY_PY_URE +#define MICROPY_PY_URE (CIRCUITPY_FULL_BUILD) +#endif +#define MICROPY_PY_URE_MATCH_GROUPS (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_URE_MATCH_SPAN_START_END (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_URE_SUB (CIRCUITPY_FULL_BUILD) + +// LONGINT_IMPL_xxx are defined in the Makefile. +// +#ifdef LONGINT_IMPL_NONE +#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_NONE) +#endif + +#ifdef LONGINT_IMPL_MPZ +#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ) +#define MP_SSIZE_MAX (0x7fffffff) +#endif + +#ifdef LONGINT_IMPL_LONGLONG +#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG) +#define MP_SSIZE_MAX (0x7fffffff) +#endif + +#if INTERNAL_FLASH_FILESYSTEM == 0 && QSPI_FLASH_FILESYSTEM == 0 && SPI_FLASH_FILESYSTEM == 0 && !CIRCUITPY_MINIMAL_BUILD +#error No *_FLASH_FILESYSTEM set! +#endif + +// These CIRCUITPY_xxx values should all be defined in the *.mk files as being on or off. +// So if any are not defined in *.mk, they'll throw an error here. + +#if CIRCUITPY_ANALOGIO +#define ANALOGIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module }, +extern const struct _mp_obj_module_t analogio_module; +#else +#define ANALOGIO_MODULE +#endif + +#if CIRCUITPY_AUDIOBUSIO +#define AUDIOBUSIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audiobusio), (mp_obj_t)&audiobusio_module }, +extern const struct _mp_obj_module_t audiobusio_module; +#else +#define AUDIOBUSIO_MODULE +#endif + +#if CIRCUITPY_AUDIOCORE +#define AUDIOCORE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audiocore), (mp_obj_t)&audiocore_module }, +extern const struct _mp_obj_module_t audiocore_module; +#else +#define AUDIOCORE_MODULE +#endif + +#if CIRCUITPY_AUDIOIO +#define AUDIOIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audioio), (mp_obj_t)&audioio_module }, +extern const struct _mp_obj_module_t audioio_module; +#else +#define AUDIOIO_MODULE +#endif + +#if CIRCUITPY_AUDIOMIXER +#define AUDIOMIXER_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audiomixer), (mp_obj_t)&audiomixer_module }, +extern const struct _mp_obj_module_t audiomixer_module; +#else +#define AUDIOMIXER_MODULE +#endif + +#if CIRCUITPY_AUDIOMP3 +#define AUDIOMP3_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audiomp3), (mp_obj_t)&audiomp3_module }, +extern const struct _mp_obj_module_t audiomp3_module; +#else +#define AUDIOMP3_MODULE +#endif + +#if CIRCUITPY_AUDIOPWMIO +#define AUDIOPWMIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_audiopwmio), (mp_obj_t)&audiopwmio_module }, +extern const struct _mp_obj_module_t audiopwmio_module; +#else +#define AUDIOPWMIO_MODULE +#endif + +#if CIRCUITPY_BITBANGIO +#define BITBANGIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }, +extern const struct _mp_obj_module_t bitbangio_module; +#else +#define BITBANGIO_MODULE +#endif + +#if CIRCUITPY_BLEIO +#define BLEIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__bleio), (mp_obj_t)&bleio_module }, +extern const struct _mp_obj_module_t bleio_module; +#else +#define BLEIO_MODULE +#endif + +#if CIRCUITPY_BOARD +#define BOARD_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, +extern const struct _mp_obj_module_t board_module; + +#define BOARD_I2C (defined(DEFAULT_I2C_BUS_SDA) && defined(DEFAULT_I2C_BUS_SCL)) +#define BOARD_SPI (defined(DEFAULT_SPI_BUS_SCK) && defined(DEFAULT_SPI_BUS_MISO) && defined(DEFAULT_SPI_BUS_MOSI)) +#define BOARD_UART (defined(DEFAULT_UART_BUS_RX) && defined(DEFAULT_UART_BUS_TX)) + +// I2C and SPI are always allocated off the heap. + +#if BOARD_UART +#define BOARD_UART_ROOT_POINTER mp_obj_t shared_uart_bus; +#else +#define BOARD_UART_ROOT_POINTER +#endif + +#else +#define BOARD_MODULE +#define BOARD_UART_ROOT_POINTER +#endif + +#if CIRCUITPY_BUSIO +extern const struct _mp_obj_module_t busio_module; +#define BUSIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module }, +#else +#define BUSIO_MODULE +#endif + +#if CIRCUITPY_DIGITALIO +extern const struct _mp_obj_module_t digitalio_module; +#define DIGITALIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, +#else +#define DIGITALIO_MODULE +#endif + +#if CIRCUITPY_DISPLAYIO +extern const struct _mp_obj_module_t displayio_module; +extern const struct _mp_obj_module_t fontio_module; +extern const struct _mp_obj_module_t terminalio_module; +#define DISPLAYIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_displayio), (mp_obj_t)&displayio_module }, +#define FONTIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_fontio), (mp_obj_t)&fontio_module }, +#define TERMINALIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_terminalio), (mp_obj_t)&terminalio_module }, +#ifndef CIRCUITPY_DISPLAY_LIMIT +#define CIRCUITPY_DISPLAY_LIMIT (1) +#endif +#else +#define DISPLAYIO_MODULE +#define FONTIO_MODULE +#define TERMINALIO_MODULE +#define CIRCUITPY_DISPLAY_LIMIT (0) +#endif + +#if CIRCUITPY_FREQUENCYIO +extern const struct _mp_obj_module_t frequencyio_module; +#define FREQUENCYIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_frequencyio), (mp_obj_t)&frequencyio_module }, +#else +#define FREQUENCYIO_MODULE +#endif + +#if CIRCUITPY_GAMEPAD +extern const struct _mp_obj_module_t gamepad_module; +#define GAMEPAD_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_gamepad),(mp_obj_t)&gamepad_module }, +#else +#define GAMEPAD_MODULE +#endif + +#if CIRCUITPY_GAMEPADSHIFT +extern const struct _mp_obj_module_t gamepadshift_module; +#define GAMEPADSHIFT_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_gamepadshift),(mp_obj_t)&gamepadshift_module }, +#else +#define GAMEPADSHIFT_MODULE +#endif + +#if CIRCUITPY_GAMEPAD || CIRCUITPY_GAMEPADSHIFT +// Scan gamepad every 32ms +#define CIRCUITPY_GAMEPAD_TICKS 0x1f +#define GAMEPAD_ROOT_POINTERS mp_obj_t gamepad_singleton; +#else +#define GAMEPAD_ROOT_POINTERS +#endif + +#if CIRCUITPY_I2CSLAVE +extern const struct _mp_obj_module_t i2cslave_module; +#define I2CSLAVE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_i2cslave), (mp_obj_t)&i2cslave_module }, +#else +#define I2CSLAVE_MODULE +#endif + +#if CIRCUITPY_MATH +extern const struct _mp_obj_module_t math_module; +#define MATH_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_math), (mp_obj_t)&math_module }, +#else +#define MATH_MODULE +#endif + +#if CIRCUITPY__EVE +extern const struct _mp_obj_module_t _eve_module; +#define _EVE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__eve), (mp_obj_t)&_eve_module }, +#else +#define _EVE_MODULE +#endif + +#if CIRCUITPY_MICROCONTROLLER +extern const struct _mp_obj_module_t microcontroller_module; +#define MICROCONTROLLER_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, +#else +#define MICROCONTROLLER_MODULE +#endif + +#if CIRCUITPY_NEOPIXEL_WRITE +extern const struct _mp_obj_module_t neopixel_write_module; +#define NEOPIXEL_WRITE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, +#else +#define NEOPIXEL_WRITE_MODULE +#endif + +#if CIRCUITPY_NETWORK +extern const struct _mp_obj_module_t network_module; +extern const struct _mp_obj_module_t socket_module; +#define NETWORK_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_network), (mp_obj_t)&network_module }, +#define SOCKET_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_socket), (mp_obj_t)&socket_module }, +#define NETWORK_ROOT_POINTERS mp_obj_list_t mod_network_nic_list; +#if MICROPY_PY_WIZNET5K + extern const struct _mp_obj_module_t wiznet_module; + #define WIZNET_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_wiznet), (mp_obj_t)&wiznet_module }, +#endif +#else +#define NETWORK_MODULE +#define SOCKET_MODULE +#define WIZNET_MODULE +#define NETWORK_ROOT_POINTERS +#endif + +// This is not a top-level module; it's microcontroller.nvm. +#if CIRCUITPY_NVM +extern const struct _mp_obj_module_t nvm_module; +#endif + +#if CIRCUITPY_OS +extern const struct _mp_obj_module_t os_module; +#define OS_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&os_module }, +#define OS_MODULE_ALT_NAME { MP_OBJ_NEW_QSTR(MP_QSTR__os), (mp_obj_t)&os_module }, +#else +#define OS_MODULE +#define OS_MODULE_ALT_NAME +#endif + +#if CIRCUITPY_PEW +extern const struct _mp_obj_module_t pew_module; +#define PEW_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__pew),(mp_obj_t)&pew_module }, +#else +#define PEW_MODULE +#endif + +#if CIRCUITPY_PIXELBUF +extern const struct _mp_obj_module_t pixelbuf_module; +#define PIXELBUF_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__pixelbuf),(mp_obj_t)&pixelbuf_module }, +#else +#define PIXELBUF_MODULE +#endif + +#if CIRCUITPY_PULSEIO +extern const struct _mp_obj_module_t pulseio_module; +#define PULSEIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, +#else +#define PULSEIO_MODULE +#endif + +#if CIRCUITPY_PS2IO +extern const struct _mp_obj_module_t ps2io_module; +#define PS2IO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_ps2io), (mp_obj_t)&ps2io_module }, +#else +#define PS2IO_MODULE +#endif + +#if CIRCUITPY_RANDOM +extern const struct _mp_obj_module_t random_module; +#define RANDOM_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&random_module }, +#else +#define RANDOM_MODULE +#endif + +#if CIRCUITPY_ROTARYIO +extern const struct _mp_obj_module_t rotaryio_module; +#define ROTARYIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_rotaryio), (mp_obj_t)&rotaryio_module }, +#else +#define ROTARYIO_MODULE +#endif + +#if CIRCUITPY_RTC +extern const struct _mp_obj_module_t rtc_module; +#define RTC_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_rtc), (mp_obj_t)&rtc_module }, +#else +#define RTC_MODULE +#endif + +#if CIRCUITPY_SAMD +extern const struct _mp_obj_module_t samd_module; +#define SAMD_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_samd),(mp_obj_t)&samd_module }, +#else +#define SAMD_MODULE +#endif + +#if CIRCUITPY_STAGE +extern const struct _mp_obj_module_t stage_module; +#define STAGE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__stage), (mp_obj_t)&stage_module }, +#else +#define STAGE_MODULE +#endif + +#if CIRCUITPY_STORAGE +extern const struct _mp_obj_module_t storage_module; +#define STORAGE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module }, +#else +#define STORAGE_MODULE +#endif + +#if CIRCUITPY_STRUCT +extern const struct _mp_obj_module_t struct_module; +#define STRUCT_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&struct_module }, +#else +#define STRUCT_MODULE +#endif + +#if CIRCUITPY_SUPERVISOR +extern const struct _mp_obj_module_t supervisor_module; +#define SUPERVISOR_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_supervisor), (mp_obj_t)&supervisor_module }, +#else +#define SUPERVISOR_MODULE +#endif + +#if CIRCUITPY_TIME +extern const struct _mp_obj_module_t time_module; +#define TIME_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_time), (mp_obj_t)&time_module }, +#define TIME_MODULE_ALT_NAME { MP_OBJ_NEW_QSTR(MP_QSTR__time), (mp_obj_t)&time_module }, +#else +#define TIME_MODULE +#define TIME_MODULE_ALT_NAME +#endif + +#if CIRCUITPY_TOUCHIO +extern const struct _mp_obj_module_t touchio_module; +#define TOUCHIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_touchio), (mp_obj_t)&touchio_module }, +#else +#define TOUCHIO_MODULE +#endif + +#if CIRCUITPY_UHEAP +extern const struct _mp_obj_module_t uheap_module; +#define UHEAP_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_uheap),(mp_obj_t)&uheap_module }, +#else +#define UHEAP_MODULE +#endif + +#if CIRCUITPY_USB_HID +extern const struct _mp_obj_module_t usb_hid_module; +#define USB_HID_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_usb_hid),(mp_obj_t)&usb_hid_module }, +#else +#define USB_HID_MODULE +#endif + +#if CIRCUITPY_USB_MIDI +extern const struct _mp_obj_module_t usb_midi_module; +#define USB_MIDI_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_usb_midi),(mp_obj_t)&usb_midi_module }, +#else +#define USB_MIDI_MODULE +#endif + +#if CIRCUITPY_USTACK +extern const struct _mp_obj_module_t ustack_module; +#define USTACK_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_ustack),(mp_obj_t)&ustack_module }, +#else +#define USTACK_MODULE +#endif + +// These modules are not yet in shared-bindings, but we prefer the non-uxxx names. +#if MICROPY_PY_UERRNO +#define ERRNO_MODULE { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, +#else +#define ERRNO_MODULE +#endif + +#if MICROPY_PY_UJSON +#define JSON_MODULE { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, +#else +#define JSON_MODULE +#endif + +#if defined(CIRCUITPY_ULAB) && CIRCUITPY_ULAB +#define ULAB_MODULE \ + { MP_ROM_QSTR(MP_QSTR_ulab), MP_ROM_PTR(&ulab_user_cmodule) }, +#else +#define ULAB_MODULE +#endif +#if MICROPY_PY_URE +#define RE_MODULE { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, +#else +#define RE_MODULE +#endif + +// Define certain native modules with weak links so they can be replaced with Python +// implementations. This list may grow over time. +#define MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS \ + OS_MODULE \ + TIME_MODULE \ + +// Native modules that are weak links can be accessed directly +// by prepending their name with an underscore. This list should correspond to +// MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS, assuming you want the native modules +// to be accessible when overriden. +#define MICROPY_PORT_BUILTIN_MODULE_ALT_NAMES \ + OS_MODULE_ALT_NAME \ + TIME_MODULE_ALT_NAME \ + +// This is an inclusive list that should correspond to the CIRCUITPY_XXX list above, +// including dependencies such as TERMINALIO depending on DISPLAYIO (shown by indentation). +// Some of these definitions will be blank depending on what is turned on and off. +// Some are omitted because they're in MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS above. +#define MICROPY_PORT_BUILTIN_MODULES_STRONG_LINKS \ + ANALOGIO_MODULE \ + AUDIOBUSIO_MODULE \ + AUDIOCORE_MODULE \ + AUDIOIO_MODULE \ + AUDIOMIXER_MODULE \ + AUDIOMP3_MODULE \ + AUDIOPWMIO_MODULE \ + BITBANGIO_MODULE \ + BLEIO_MODULE \ + BOARD_MODULE \ + BUSIO_MODULE \ + DIGITALIO_MODULE \ + DISPLAYIO_MODULE \ + FONTIO_MODULE \ + TERMINALIO_MODULE \ + ERRNO_MODULE \ + FREQUENCYIO_MODULE \ + GAMEPAD_MODULE \ + GAMEPADSHIFT_MODULE \ + I2CSLAVE_MODULE \ + JSON_MODULE \ + MATH_MODULE \ + _EVE_MODULE \ + MICROCONTROLLER_MODULE \ + NEOPIXEL_WRITE_MODULE \ + NETWORK_MODULE \ + SOCKET_MODULE \ + WIZNET_MODULE \ + PEW_MODULE \ + PIXELBUF_MODULE \ + PS2IO_MODULE \ + PULSEIO_MODULE \ + RANDOM_MODULE \ + RE_MODULE \ + ROTARYIO_MODULE \ + RTC_MODULE \ + SAMD_MODULE \ + STAGE_MODULE \ + STORAGE_MODULE \ + STRUCT_MODULE \ + SUPERVISOR_MODULE \ + TOUCHIO_MODULE \ + UHEAP_MODULE \ + USB_HID_MODULE \ + USB_MIDI_MODULE \ + USTACK_MODULE \ + +// If weak links are enabled, just include strong links in the main list of modules, +// and also include the underscore alternate names. +#if MICROPY_MODULE_WEAK_LINKS +#define MICROPY_PORT_BUILTIN_MODULES \ + MICROPY_PORT_BUILTIN_MODULES_STRONG_LINKS \ + MICROPY_PORT_BUILTIN_MODULE_ALT_NAMES +#else +// If weak links are disabled, included both strong and potentially weak lines +#define MICROPY_PORT_BUILTIN_MODULES \ + MICROPY_PORT_BUILTIN_MODULES_STRONG_LINKS \ + MICROPY_PORT_BUILTIN_MODULE_WEAK_LINKS +#endif + +// We need to provide a declaration/definition of alloca() +#include + +#define MP_STATE_PORT MP_STATE_VM + +#include "supervisor/flash_root_pointers.h" + +#define CIRCUITPY_COMMON_ROOT_POINTERS \ + const char *readline_hist[8]; \ + vstr_t *repl_line; \ + mp_obj_t rtc_time_source; \ + GAMEPAD_ROOT_POINTERS \ + mp_obj_t pew_singleton; \ + mp_obj_t terminal_tilegrid_tiles; \ + BOARD_UART_ROOT_POINTER \ + FLASH_ROOT_POINTERS \ + NETWORK_ROOT_POINTERS \ + +void supervisor_run_background_tasks_if_tick(void); +#define RUN_BACKGROUND_TASKS (supervisor_run_background_tasks_if_tick()) + +// TODO: Used in wiznet5k driver, but may not be needed in the long run. +#define MICROPY_THREAD_YIELD() + +#define MICROPY_VM_HOOK_LOOP RUN_BACKGROUND_TASKS; +#define MICROPY_VM_HOOK_RETURN RUN_BACKGROUND_TASKS; + +// CIRCUITPY_AUTORELOAD_DELAY_MS = 0 will completely disable autoreload. +#ifndef CIRCUITPY_AUTORELOAD_DELAY_MS +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 +#endif + +#ifndef CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS +#define CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS 1000 +#endif + +#define CIRCUITPY_BOOT_OUTPUT_FILE "/boot_out.txt" + +#define CIRCUITPY_VERBOSE_BLE 0 + +#endif // __INCLUDED_MPCONFIG_CIRCUITPY_H diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk new file mode 100644 index 0000000000000..1a375efc6538a --- /dev/null +++ b/py/circuitpy_mpconfig.mk @@ -0,0 +1,351 @@ +# +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# mpconfigboard.mk files can specify: +# CIRCUITPY_FULL_BUILD = 1 (which is the default) +# or +# CIRCUITPY_SMALL_BUILD = 1 +# which is the same as: +# CIRCUITPY_FULL_BUILD = 0 + +ifndef CIRCUITPY_FULL_BUILD + ifeq ($(CIRCUITPY_SMALL_BUILD),1) + CIRCUITPY_FULL_BUILD = 0 + else + CIRCUITPY_FULL_BUILD = 1 + endif +endif +CFLAGS += -DCIRCUITPY_FULL_BUILD=$(CIRCUITPY_FULL_BUILD) + +# Setting CIRCUITPY_MINIMAL_BUILD = 1 will disable all features +# Use for for early stage or highly restricted ports +ifndef CIRCUITPY_MINIMAL_BUILD +CIRCUITPY_MINIMAL_BUILD = 0 +endif +CFLAGS += -DCIRCUITPY_MINIMAL_BUILD=$(CIRCUITPY_MINIMAL_BUILD) + +ifndef CIRCUITPY_DEFAULT_BUILD + ifeq ($(CIRCUITPY_MINIMAL_BUILD),1) + CIRCUITPY_FULL_BUILD = 0 + CIRCUITPY_DEFAULT_BUILD = 0 + else + CIRCUITPY_DEFAULT_BUILD = 1 + endif +endif +CFLAGS += -DCIRCUITPY_DEFAULT_BUILD=$(CIRCUITPY_DEFAULT_BUILD) + +# Some features have no unique HAL component, and thus there's never +# a reason to not include them. +ifndef CIRCUITPY_ALWAYS_BUILD + CIRCUITPY_ALWAYS_BUILD = 1 +endif +CFLAGS += -DCIRCUITPY_ALWAYS_BUILD=$(CIRCUITPY_ALWAYS_BUILD) + + +# All builtin modules are listed below, with default values (0 for off, 1 for on) +# Some are always on, some are always off, and some depend on CIRCUITPY_FULL_BUILD. +# +# *** You can override any of the defaults by defining them in your mpconfigboard.mk. + +ifndef CIRCUITPY_ANALOGIO +CIRCUITPY_ANALOGIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_ANALOGIO=$(CIRCUITPY_ANALOGIO) + +ifndef CIRCUITPY_AUDIOBUSIO +CIRCUITPY_AUDIOBUSIO = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_AUDIOBUSIO=$(CIRCUITPY_AUDIOBUSIO) + +ifndef CIRCUITPY_AUDIOIO +CIRCUITPY_AUDIOIO = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_AUDIOIO=$(CIRCUITPY_AUDIOIO) + +ifndef CIRCUITPY_AUDIOIO_COMPAT +CIRCUITPY_AUDIOIO_COMPAT = $(CIRCUITPY_AUDIOIO) +endif +CFLAGS += -DCIRCUITPY_AUDIOIO_COMPAT=$(CIRCUITPY_AUDIOIO_COMPAT) + + +ifndef CIRCUITPY_AUDIOPWMIO +CIRCUITPY_AUDIOPWMIO = 0 +endif +CFLAGS += -DCIRCUITPY_AUDIOPWMIO=$(CIRCUITPY_AUDIOPWMIO) + +ifndef CIRCUITPY_AUDIOCORE +ifeq ($(CIRCUITPY_AUDIOPWMIO),1) +CIRCUITPY_AUDIOCORE = $(CIRCUITPY_AUDIOPWMIO) +else +CIRCUITPY_AUDIOCORE = $(CIRCUITPY_AUDIOIO) +endif +endif +CFLAGS += -DCIRCUITPY_AUDIOCORE=$(CIRCUITPY_AUDIOCORE) + +ifndef CIRCUITPY_AUDIOMIXER +CIRCUITPY_AUDIOMIXER = $(CIRCUITPY_AUDIOIO) +endif +CFLAGS += -DCIRCUITPY_AUDIOMIXER=$(CIRCUITPY_AUDIOMIXER) + +ifndef CIRCUITPY_AUDIOMP3 +ifeq ($(CIRCUITPY_FULL_BUILD),1) +CIRCUITPY_AUDIOMP3 = $(CIRCUITPY_AUDIOCORE) +else +CIRCUITPY_AUDIOMP3 = 0 +endif +endif +CFLAGS += -DCIRCUITPY_AUDIOMP3=$(CIRCUITPY_AUDIOMP3) + +ifndef CIRCUITPY_BITBANGIO +CIRCUITPY_BITBANGIO = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_BITBANGIO=$(CIRCUITPY_BITBANGIO) + +# Explicitly enabled for boards that support _bleio. +ifndef CIRCUITPY_BLEIO +CIRCUITPY_BLEIO = 0 +endif +CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO) + +ifndef CIRCUITPY_BOARD +CIRCUITPY_BOARD = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_BOARD=$(CIRCUITPY_BOARD) + +ifndef CIRCUITPY_BUSIO +CIRCUITPY_BUSIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO) + +ifndef CIRCUITPY_DIGITALIO +CIRCUITPY_DIGITALIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_DIGITALIO=$(CIRCUITPY_DIGITALIO) + +ifndef CIRCUITPY_DISPLAYIO +CIRCUITPY_DISPLAYIO = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_DISPLAYIO=$(CIRCUITPY_DISPLAYIO) + +ifndef CIRCUITPY_FREQUENCYIO +CIRCUITPY_FREQUENCYIO = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_FREQUENCYIO=$(CIRCUITPY_FREQUENCYIO) + +ifndef CIRCUITPY_GAMEPAD +CIRCUITPY_GAMEPAD = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_GAMEPAD=$(CIRCUITPY_GAMEPAD) + +ifndef CIRCUITPY_GAMEPADSHIFT +CIRCUITPY_GAMEPADSHIFT = 0 +endif +CFLAGS += -DCIRCUITPY_GAMEPADSHIFT=$(CIRCUITPY_GAMEPADSHIFT) + +ifndef CIRCUITPY_I2CSLAVE +CIRCUITPY_I2CSLAVE = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_I2CSLAVE=$(CIRCUITPY_I2CSLAVE) + +ifndef CIRCUITPY_MATH +CIRCUITPY_MATH = $(CIRCUITPY_ALWAYS_BUILD) +endif +CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) + +ifndef CIRCUITPY__EVE +CIRCUITPY__EVE = 0 +endif +CFLAGS += -DCIRCUITPY__EVE=$(CIRCUITPY__EVE) + +ifndef CIRCUITPY_MICROCONTROLLER +CIRCUITPY_MICROCONTROLLER = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_MICROCONTROLLER=$(CIRCUITPY_MICROCONTROLLER) + +ifndef CIRCUITPY_NEOPIXEL_WRITE +CIRCUITPY_NEOPIXEL_WRITE = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_NEOPIXEL_WRITE=$(CIRCUITPY_NEOPIXEL_WRITE) + +# Enabled on SAMD51. Won't fit on SAMD21 builds. Not tested on nRF or STM32F4 builds. +ifndef CIRCUITPY_NETWORK +CIRCUITPY_NETWORK = 0 +endif +CFLAGS += -DCIRCUITPY_NETWORK=$(CIRCUITPY_NETWORK) + +ifndef CIRCUITPY_NVM +CIRCUITPY_NVM = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_NVM=$(CIRCUITPY_NVM) + +ifndef CIRCUITPY_OS +CIRCUITPY_OS = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_OS=$(CIRCUITPY_OS) + +ifndef CIRCUITPY_PIXELBUF +CIRCUITPY_PIXELBUF = $(CIRCUITPY_FULL_BUILD) +endif +CFLAGS += -DCIRCUITPY_PIXELBUF=$(CIRCUITPY_PIXELBUF) + +ifndef CIRCUITPY_PULSEIO +CIRCUITPY_PULSEIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_PULSEIO=$(CIRCUITPY_PULSEIO) + +# Only for SAMD boards for the moment +ifndef CIRCUITPY_PS2IO +CIRCUITPY_PS2IO = 0 +endif +CFLAGS += -DCIRCUITPY_PS2IO=$(CIRCUITPY_PS2IO) + +ifndef CIRCUITPY_RANDOM +CIRCUITPY_RANDOM = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_RANDOM=$(CIRCUITPY_RANDOM) + +ifndef CIRCUITPY_ROTARYIO +CIRCUITPY_ROTARYIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_ROTARYIO=$(CIRCUITPY_ROTARYIO) + +ifndef CIRCUITPY_RTC +CIRCUITPY_RTC = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_RTC=$(CIRCUITPY_RTC) + +# CIRCUITPY_SAMD is handled in the atmel-samd tree. +# Only for SAMD chips. +# Assume not a SAMD build. +ifndef CIRCUITPY_SAMD +CIRCUITPY_SAMD = 0 +endif +CFLAGS += -DCIRCUITPY_SAMD=$(CIRCUITPY_SAMD) + +# Currently always off. +ifndef CIRCUITPY_STAGE +CIRCUITPY_STAGE = 0 +endif +CFLAGS += -DCIRCUITPY_STAGE=$(CIRCUITPY_STAGE) + +ifndef CIRCUITPY_STORAGE +CIRCUITPY_STORAGE = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_STORAGE=$(CIRCUITPY_STORAGE) + +ifndef CIRCUITPY_STRUCT +CIRCUITPY_STRUCT = $(CIRCUITPY_ALWAYS_BUILD) +endif +CFLAGS += -DCIRCUITPY_STRUCT=$(CIRCUITPY_STRUCT) + +ifndef CIRCUITPY_SUPERVISOR +CIRCUITPY_SUPERVISOR = $(CIRCUITPY_ALWAYS_BUILD) +endif +CFLAGS += -DCIRCUITPY_SUPERVISOR=$(CIRCUITPY_SUPERVISOR) + +ifndef CIRCUITPY_TIME +CIRCUITPY_TIME = $(CIRCUITPY_ALWAYS_BUILD) +endif +CFLAGS += -DCIRCUITPY_TIME=$(CIRCUITPY_TIME) + +# touchio might be native or generic. See circuitpy_defns.mk. +ifndef CIRCUITPY_TOUCHIO_USE_NATIVE +CIRCUITPY_TOUCHIO_USE_NATIVE = 0 +endif +CFLAGS += -DCIRCUITPY_TOUCHIO_USE_NATIVE=$(CIRCUITPY_TOUCHIO_USE_NATIVE) + +ifndef CIRCUITPY_TOUCHIO +CIRCUITPY_TOUCHIO = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_TOUCHIO=$(CIRCUITPY_TOUCHIO) + +# For debugging. +ifndef CIRCUITPY_UHEAP +CIRCUITPY_UHEAP = 0 +endif +CFLAGS += -DCIRCUITPY_UHEAP=$(CIRCUITPY_UHEAP) + +ifndef CIRCUITPY_USB_HID +CIRCUITPY_USB_HID = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_USB_HID=$(CIRCUITPY_USB_HID) + +ifndef CIRCUITPY_USB_MIDI +CIRCUITPY_USB_MIDI = $(CIRCUITPY_DEFAULT_BUILD) +endif +CFLAGS += -DCIRCUITPY_USB_MIDI=$(CIRCUITPY_USB_MIDI) + +ifndef CIRCUITPY_PEW +CIRCUITPY_PEW = 0 +endif +CFLAGS += -DCIRCUITPY_PEW=$(CIRCUITPY_PEW) + +# For debugging. +ifndef CIRCUITPY_USTACK +CIRCUITPY_USTACK = 0 +endif +CFLAGS += -DCIRCUITPY_USTACK=$(CIRCUITPY_USTACK) + +# Non-module conditionals + +ifndef CIRCUITPY_BITBANG_APA102 +CIRCUITPY_BITBANG_APA102 = 0 +endif +CFLAGS += -DCIRCUITPY_BITBANG_APA102=$(CIRCUITPY_BITBANG_APA102) + +# Should busio.I2C() check for pullups? +# Some boards in combination with certain peripherals may not want this. +ifndef CIRCUITPY_REQUIRE_I2C_PULLUPS +CIRCUITPY_REQUIRE_I2C_PULLUPS = 1 +endif +CFLAGS += -DCIRCUITPY_REQUIRE_I2C_PULLUPS=$(CIRCUITPY_REQUIRE_I2C_PULLUPS) + +# REPL over BLE +ifndef CIRCUITPY_SERIAL_BLE +CIRCUITPY_SERIAL_BLE = 0 +endif +CFLAGS += -DCIRCUITPY_SERIAL_BLE=$(CIRCUITPY_SERIAL_BLE) + +ifndef CIRCUITPY_BLE_FILE_SERVICE +CIRCUITPY_BLE_FILE_SERVICE = 0 +endif +CFLAGS += -DCIRCUITPY_BLE_FILE_SERVICE=$(CIRCUITPY_BLE_FILE_SERVICE) + +# REPL over UART +ifndef CIRCUITPY_SERIAL_UART +CIRCUITPY_SERIAL_UART = 0 +endif +CFLAGS += -DCIRCUITPY_SERIAL_UART=$(CIRCUITPY_SERIAL_UART) + +# ulab numerics library +ifndef CIRCUITPY_ULAB +CIRCUITPY_ULAB = $(CIRCUITPY_FULL_BUILD) +endif + +# Enabled micropython.native decorator (experimental) +ifndef CIRCUITPY_ENABLE_MPY_NATIVE +CIRCUITPY_ENABLE_MPY_NATIVE = 0 +endif +CFLAGS += -DCIRCUITPY_ENABLE_MPY_NATIVE=$(CIRCUITPY_ENABLE_MPY_NATIVE) diff --git a/py/compile.c b/py/compile.c index 4e704abfbbadd..d5fae02994c98 100644 --- a/py/compile.c +++ b/py/compile.c @@ -36,6 +36,8 @@ #include "py/runtime.h" #include "py/asmbase.h" +#include "supervisor/shared/translate.h" + #if MICROPY_ENABLE_COMPILER // TODO need to mangle __attr names @@ -65,16 +67,16 @@ typedef enum { // we need a method table to do the lookup for the emitter functions #define EMIT(fun) (comp->emit_method_table->fun(comp->emit)) #define EMIT_ARG(fun, ...) (comp->emit_method_table->fun(comp->emit, __VA_ARGS__)) -#define EMIT_LOAD_FAST(qst, local_num) (comp->emit_method_table->load_id.fast(comp->emit, qst, local_num)) -#define EMIT_LOAD_GLOBAL(qst) (comp->emit_method_table->load_id.global(comp->emit, qst)) +#define EMIT_LOAD_FAST(qst, local_num) (comp->emit_method_table->load_id.local(comp->emit, qst, local_num, MP_EMIT_IDOP_LOCAL_FAST)) +#define EMIT_LOAD_GLOBAL(qst) (comp->emit_method_table->load_id.global(comp->emit, qst, MP_EMIT_IDOP_GLOBAL_GLOBAL)) #else // if we only have the bytecode emitter enabled then we can do a direct call to the functions #define EMIT(fun) (mp_emit_bc_##fun(comp->emit)) #define EMIT_ARG(fun, ...) (mp_emit_bc_##fun(comp->emit, __VA_ARGS__)) -#define EMIT_LOAD_FAST(qst, local_num) (mp_emit_bc_load_fast(comp->emit, qst, local_num)) -#define EMIT_LOAD_GLOBAL(qst) (mp_emit_bc_load_global(comp->emit, qst)) +#define EMIT_LOAD_FAST(qst, local_num) (mp_emit_bc_load_local(comp->emit, qst, local_num, MP_EMIT_IDOP_LOCAL_FAST)) +#define EMIT_LOAD_GLOBAL(qst) (mp_emit_bc_load_global(comp->emit, qst, MP_EMIT_IDOP_GLOBAL_GLOBAL)) #endif @@ -154,7 +156,7 @@ STATIC void compile_error_set_line(compiler_t *comp, mp_parse_node_t pn) { } } -STATIC void compile_syntax_error(compiler_t *comp, mp_parse_node_t pn, const char *msg) { +STATIC void compile_syntax_error(compiler_t *comp, mp_parse_node_t pn, const compressed_string_t *msg) { // only register the error if there has been no other error if (comp->compile_error == MP_OBJ_NULL) { comp->compile_error = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg); @@ -273,7 +275,7 @@ STATIC void c_tuple(compiler_t *comp, mp_parse_node_t pn, mp_parse_node_struct_t } total += n; } - EMIT_ARG(build_tuple, total); + EMIT_ARG(build, total, MP_EMIT_BUILD_TUPLE); } STATIC void compile_generic_tuple(compiler_t *comp, mp_parse_node_struct_t *pns) { @@ -366,38 +368,33 @@ STATIC void c_assign_atom_expr(compiler_t *comp, mp_parse_node_struct_t *pns, as if (MP_PARSE_NODE_STRUCT_KIND(pns1) == PN_trailer_bracket) { if (assign_kind == ASSIGN_AUG_STORE) { EMIT(rot_three); - EMIT(store_subscr); + EMIT_ARG(subscr, MP_EMIT_SUBSCR_STORE); } else { compile_node(comp, pns1->nodes[0]); if (assign_kind == ASSIGN_AUG_LOAD) { EMIT(dup_top_two); - EMIT(load_subscr); + EMIT_ARG(subscr, MP_EMIT_SUBSCR_LOAD); } else { - EMIT(store_subscr); + EMIT_ARG(subscr, MP_EMIT_SUBSCR_STORE); } } + return; } else if (MP_PARSE_NODE_STRUCT_KIND(pns1) == PN_trailer_period) { assert(MP_PARSE_NODE_IS_ID(pns1->nodes[0])); if (assign_kind == ASSIGN_AUG_LOAD) { EMIT(dup_top); - EMIT_ARG(load_attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0])); + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0]), MP_EMIT_ATTR_LOAD); } else { if (assign_kind == ASSIGN_AUG_STORE) { EMIT(rot_two); } - EMIT_ARG(store_attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0])); + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0]), MP_EMIT_ATTR_STORE); } - } else { - goto cannot_assign; + return; } - } else { - goto cannot_assign; } - return; - -cannot_assign: - compile_syntax_error(comp, (mp_parse_node_t)pns, "can't assign to expression"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("can't assign to expression")); } // we need to allow for a caller passing in 1 initial node (node_head) followed by an array of nodes (nodes_tail) @@ -416,7 +413,7 @@ STATIC void c_assign_tuple(compiler_t *comp, mp_parse_node_t node_head, uint num EMIT_ARG(unpack_ex, num_head + i, num_tail - i - 1); have_star_index = num_head + i; } else { - compile_syntax_error(comp, nodes_tail[i], "multiple *x in assignment"); + compile_syntax_error(comp, nodes_tail[i], translate("multiple *x in assignment")); return; } } @@ -542,7 +539,7 @@ STATIC void c_assign(compiler_t *comp, mp_parse_node_t pn, assign_kind_t assign_ return; cannot_assign: - compile_syntax_error(comp, pn, "can't assign to expression"); + compile_syntax_error(comp, pn, translate("can't assign to expression")); } // stuff for lambda and comprehensions and generators: @@ -642,7 +639,7 @@ STATIC void compile_funcdef_lambdef_param(compiler_t *comp, mp_parse_node_t pn) // check for non-default parameters given after default parameters (allowed by parser, but not syntactically valid) if (!comp->have_star && comp->num_default_params != 0) { - compile_syntax_error(comp, pn, "non-default argument follows default argument"); + compile_syntax_error(comp, pn, translate("non-default argument follows default argument")); return; } @@ -657,12 +654,12 @@ STATIC void compile_funcdef_lambdef_param(compiler_t *comp, mp_parse_node_t pn) // in MicroPython we put the default positional parameters into a tuple using the bytecode // we need to do this here before we start building the map for the default keywords if (comp->num_default_params > 0) { - EMIT_ARG(build_tuple, comp->num_default_params); + EMIT_ARG(build, comp->num_default_params, MP_EMIT_BUILD_TUPLE); } else { EMIT(load_null); // sentinel indicating empty default positional args } // first default dict param, so make the map - EMIT_ARG(build_map, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_MAP); } // compile value then key, then store it to the dict @@ -698,7 +695,7 @@ STATIC void compile_funcdef_lambdef(compiler_t *comp, scope_t *scope, mp_parse_n // in MicroPython we put the default positional parameters into a tuple using the bytecode // the default keywords args may have already made the tuple; if not, do it now if (comp->num_default_params > 0 && comp->num_dict_params == 0) { - EMIT_ARG(build_tuple, comp->num_default_params); + EMIT_ARG(build, comp->num_default_params, MP_EMIT_BUILD_TUPLE); EMIT(load_null); // sentinel indicating empty default keyword args } @@ -771,25 +768,34 @@ STATIC bool compile_built_in_decorator(compiler_t *comp, int name_len, mp_parse_ } if (name_len != 2) { - compile_syntax_error(comp, name_nodes[0], "invalid micropython decorator"); + compile_syntax_error(comp, name_nodes[0], translate("invalid micropython decorator")); return true; } qstr attr = MP_PARSE_NODE_LEAF_ARG(name_nodes[1]); if (attr == MP_QSTR_bytecode) { *emit_options = MP_EMIT_OPT_BYTECODE; -#if MICROPY_EMIT_NATIVE + // @micropython.native decorator. } else if (attr == MP_QSTR_native) { + // Different from MicroPython: native doesn't raise SyntaxError if native support isn't + // compiled, it just passes through the function unmodified. + #if MICROPY_EMIT_NATIVE *emit_options = MP_EMIT_OPT_NATIVE_PYTHON; + #else + return true; + #endif + #if MICROPY_EMIT_NATIVE + // @micropython.viper decorator. } else if (attr == MP_QSTR_viper) { *emit_options = MP_EMIT_OPT_VIPER; -#endif + #endif #if MICROPY_EMIT_INLINE_ASM + // @micropython.asm_thumb decorator. } else if (attr == ASM_DECORATOR_QSTR) { *emit_options = MP_EMIT_OPT_ASM; #endif } else { - compile_syntax_error(comp, name_nodes[1], "invalid micropython decorator"); + compile_syntax_error(comp, name_nodes[1], translate("invalid micropython decorator")); } return true; @@ -825,7 +831,7 @@ STATIC void compile_decorated(compiler_t *comp, mp_parse_node_struct_t *pns) { compile_node(comp, name_nodes[0]); for (int j = 1; j < name_len; j++) { assert(MP_PARSE_NODE_IS_ID(name_nodes[j])); // should be - EMIT_ARG(load_attr, MP_PARSE_NODE_LEAF_ARG(name_nodes[j])); + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(name_nodes[j]), MP_EMIT_ATTR_LOAD); } // nodes[1] contains arguments to the decorator function, if any @@ -889,10 +895,10 @@ STATIC void c_del_stmt(compiler_t *comp, mp_parse_node_t pn) { } if (MP_PARSE_NODE_STRUCT_KIND(pns1) == PN_trailer_bracket) { compile_node(comp, pns1->nodes[0]); - EMIT(delete_subscr); + EMIT_ARG(subscr, MP_EMIT_SUBSCR_DELETE); } else if (MP_PARSE_NODE_STRUCT_KIND(pns1) == PN_trailer_period) { assert(MP_PARSE_NODE_IS_ID(pns1->nodes[0])); - EMIT_ARG(delete_attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0])); + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(pns1->nodes[0]), MP_EMIT_ATTR_DELETE); } else { goto cannot_delete; } @@ -943,32 +949,33 @@ STATIC void c_del_stmt(compiler_t *comp, mp_parse_node_t pn) { return; cannot_delete: - compile_syntax_error(comp, (mp_parse_node_t)pn, "can't delete expression"); + compile_syntax_error(comp, (mp_parse_node_t)pn, translate("can't delete expression")); } STATIC void compile_del_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { apply_to_single_or_list(comp, pns->nodes[0], PN_exprlist, c_del_stmt); } -STATIC void compile_break_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { - if (comp->break_label == INVALID_LABEL) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "'break' outside loop"); +STATIC void compile_break_cont_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { + uint16_t label; + const compressed_string_t *error_msg; + if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_break_stmt) { + label = comp->break_label; + error_msg = translate("'break' outside loop"); + } else { + label = comp->continue_label; + error_msg = translate("'continue' outside loop"); } - assert(comp->cur_except_level >= comp->break_continue_except_level); - EMIT_ARG(break_loop, comp->break_label, comp->cur_except_level - comp->break_continue_except_level); -} - -STATIC void compile_continue_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { - if (comp->continue_label == INVALID_LABEL) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "'continue' outside loop"); + if (label == INVALID_LABEL) { + compile_syntax_error(comp, (mp_parse_node_t)pns, error_msg); } assert(comp->cur_except_level >= comp->break_continue_except_level); - EMIT_ARG(continue_loop, comp->continue_label, comp->cur_except_level - comp->break_continue_except_level); + EMIT_ARG(unwind_jump, label, comp->cur_except_level - comp->break_continue_except_level); } STATIC void compile_return_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { if (comp->scope_cur->kind != SCOPE_FUNCTION) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "'return' outside function"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("'return' outside function")); return; } if (MP_PARSE_NODE_IS_NULL(pns->nodes[0])) { @@ -1029,14 +1036,14 @@ STATIC void do_import_name(compiler_t *comp, mp_parse_node_t pn, qstr *q_base) { if (MP_PARSE_NODE_IS_NULL(pn)) { // empty name (eg, from . import x) *q_base = MP_QSTR_; - EMIT_ARG(import_name, MP_QSTR_); // import the empty string + EMIT_ARG(import, MP_QSTR_, MP_EMIT_IMPORT_NAME); // import the empty string } else if (MP_PARSE_NODE_IS_ID(pn)) { // just a simple name qstr q_full = MP_PARSE_NODE_LEAF_ARG(pn); if (!is_as) { *q_base = q_full; } - EMIT_ARG(import_name, q_full); + EMIT_ARG(import, q_full, MP_EMIT_IMPORT_NAME); } else { assert(MP_PARSE_NODE_IS_STRUCT_KIND(pn, PN_dotted_name)); // should be mp_parse_node_struct_t *pns = (mp_parse_node_struct_t*)pn; @@ -1050,8 +1057,8 @@ STATIC void do_import_name(compiler_t *comp, mp_parse_node_t pn, qstr *q_base) { for (int i = 0; i < n; i++) { len += qstr_len(MP_PARSE_NODE_LEAF_ARG(pns->nodes[i])); } - byte *q_ptr; - byte *str_dest = qstr_build_start(len, &q_ptr); + char *q_ptr = mp_local_alloc(len); + char *str_dest = q_ptr; for (int i = 0; i < n; i++) { if (i > 0) { *str_dest++ = '.'; @@ -1061,11 +1068,12 @@ STATIC void do_import_name(compiler_t *comp, mp_parse_node_t pn, qstr *q_base) { memcpy(str_dest, str_src, str_src_len); str_dest += str_src_len; } - qstr q_full = qstr_build_end(q_ptr); - EMIT_ARG(import_name, q_full); + qstr q_full = qstr_from_strn(q_ptr, len); + mp_local_free(q_ptr); + EMIT_ARG(import, q_full, MP_EMIT_IMPORT_NAME); if (is_as) { for (int i = 1; i < n; i++) { - EMIT_ARG(load_attr, MP_PARSE_NODE_LEAF_ARG(pns->nodes[i])); + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(pns->nodes[i]), MP_EMIT_ATTR_LOAD); } } } @@ -1126,12 +1134,12 @@ STATIC void compile_import_from(compiler_t *comp, mp_parse_node_struct_t *pns) { // build the "fromlist" tuple EMIT_ARG(load_const_str, MP_QSTR__star_); - EMIT_ARG(build_tuple, 1); + EMIT_ARG(build, 1, MP_EMIT_BUILD_TUPLE); // do the import qstr dummy_q; do_import_name(comp, pn_import_source, &dummy_q); - EMIT(import_star); + EMIT_ARG(import, MP_QSTR_NULL, MP_EMIT_IMPORT_STAR); } else { EMIT_ARG(load_const_small_int, import_level); @@ -1145,7 +1153,7 @@ STATIC void compile_import_from(compiler_t *comp, mp_parse_node_struct_t *pns) { qstr id2 = MP_PARSE_NODE_LEAF_ARG(pns3->nodes[0]); // should be id EMIT_ARG(load_const_str, id2); } - EMIT_ARG(build_tuple, n); + EMIT_ARG(build, n, MP_EMIT_BUILD_TUPLE); // do the import qstr dummy_q; @@ -1154,7 +1162,7 @@ STATIC void compile_import_from(compiler_t *comp, mp_parse_node_struct_t *pns) { assert(MP_PARSE_NODE_IS_STRUCT_KIND(pn_nodes[i], PN_import_as_name)); mp_parse_node_struct_t *pns3 = (mp_parse_node_struct_t*)pn_nodes[i]; qstr id2 = MP_PARSE_NODE_LEAF_ARG(pns3->nodes[0]); // should be id - EMIT_ARG(import_from, id2); + EMIT_ARG(import, id2, MP_EMIT_IMPORT_FROM); if (MP_PARSE_NODE_IS_NULL(pns3->nodes[1])) { compile_store_id(comp, id2); } else { @@ -1165,11 +1173,9 @@ STATIC void compile_import_from(compiler_t *comp, mp_parse_node_struct_t *pns) { } } -STATIC void compile_declare_global(compiler_t *comp, mp_parse_node_t pn, qstr qst) { - bool added; - id_info_t *id_info = scope_find_or_add_id(comp->scope_cur, qst, &added); +STATIC void compile_declare_global(compiler_t *comp, mp_parse_node_t pn, qstr qst, bool added, id_info_t *id_info) { if (!added && id_info->kind != ID_INFO_KIND_GLOBAL_EXPLICIT) { - compile_syntax_error(comp, pn, "identifier redefined as global"); + compile_syntax_error(comp, pn, translate("identifier redefined as global")); return; } id_info->kind = ID_INFO_KIND_GLOBAL_EXPLICIT; @@ -1181,39 +1187,37 @@ STATIC void compile_declare_global(compiler_t *comp, mp_parse_node_t pn, qstr qs } } -STATIC void compile_global_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { - if (comp->pass == MP_PASS_SCOPE) { - mp_parse_node_t *nodes; - int n = mp_parse_node_extract_list(&pns->nodes[0], PN_name_list, &nodes); - for (int i = 0; i < n; i++) { - compile_declare_global(comp, (mp_parse_node_t)pns, MP_PARSE_NODE_LEAF_ARG(nodes[i])); - } - } -} - -STATIC void compile_declare_nonlocal(compiler_t *comp, mp_parse_node_t pn, qstr qst) { - bool added; - id_info_t *id_info = scope_find_or_add_id(comp->scope_cur, qst, &added); +STATIC void compile_declare_nonlocal(compiler_t *comp, mp_parse_node_t pn, qstr qst, bool added, id_info_t *id_info) { if (added) { scope_find_local_and_close_over(comp->scope_cur, id_info, qst); if (id_info->kind == ID_INFO_KIND_GLOBAL_IMPLICIT) { - compile_syntax_error(comp, pn, "no binding for nonlocal found"); + compile_syntax_error(comp, pn, translate("no binding for nonlocal found")); } } else if (id_info->kind != ID_INFO_KIND_FREE) { - compile_syntax_error(comp, pn, "identifier redefined as nonlocal"); + compile_syntax_error(comp, pn, translate("identifier redefined as nonlocal")); } } -STATIC void compile_nonlocal_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { +STATIC void compile_global_nonlocal_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { if (comp->pass == MP_PASS_SCOPE) { - if (comp->scope_cur->kind == SCOPE_MODULE) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "can't declare nonlocal in outer code"); + bool is_global = MP_PARSE_NODE_STRUCT_KIND(pns) == PN_global_stmt; + + if (!is_global && comp->scope_cur->kind == SCOPE_MODULE) { + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("can't declare nonlocal in outer code")); return; } + mp_parse_node_t *nodes; int n = mp_parse_node_extract_list(&pns->nodes[0], PN_name_list, &nodes); for (int i = 0; i < n; i++) { - compile_declare_nonlocal(comp, (mp_parse_node_t)pns, MP_PARSE_NODE_LEAF_ARG(nodes[i])); + qstr qst = MP_PARSE_NODE_LEAF_ARG(nodes[i]); + bool added; + id_info_t *id_info = scope_find_or_add_id(comp->scope_cur, qst, &added); + if (is_global) { + compile_declare_global(comp, (mp_parse_node_t)pns, qst, added, id_info); + } else { + compile_declare_nonlocal(comp, (mp_parse_node_t)pns, qst, added, id_info); + } } } } @@ -1520,7 +1524,7 @@ STATIC void compile_try_except(compiler_t *comp, mp_parse_node_t pn_body, int n_ uint l1 = comp_next_label(comp); uint success_label = comp_next_label(comp); - EMIT_ARG(setup_except, l1); + EMIT_ARG(setup_block, l1, MP_EMIT_SETUP_BLOCK_EXCEPT); compile_increase_except_level(comp); compile_node(comp, pn_body); // body @@ -1544,7 +1548,7 @@ STATIC void compile_try_except(compiler_t *comp, mp_parse_node_t pn_body, int n_ if (MP_PARSE_NODE_IS_NULL(pns_except->nodes[0])) { // this is a catch all exception handler if (i + 1 != n_except) { - compile_syntax_error(comp, pn_excepts[i], "default 'except' must be last"); + compile_syntax_error(comp, pn_excepts[i], translate("default 'except' must be last")); compile_decrease_except_level(comp); return; } @@ -1575,7 +1579,7 @@ STATIC void compile_try_except(compiler_t *comp, mp_parse_node_t pn_body, int n_ uint l3 = 0; if (qstr_exception_local != 0) { l3 = comp_next_label(comp); - EMIT_ARG(setup_finally, l3); + EMIT_ARG(setup_block, l3, MP_EMIT_SETUP_BLOCK_FINALLY); compile_increase_except_level(comp); } compile_node(comp, pns_except->nodes[1]); @@ -1610,7 +1614,7 @@ STATIC void compile_try_except(compiler_t *comp, mp_parse_node_t pn_body, int n_ STATIC void compile_try_finally(compiler_t *comp, mp_parse_node_t pn_body, int n_except, mp_parse_node_t *pn_except, mp_parse_node_t pn_else, mp_parse_node_t pn_finally) { uint l_finally_block = comp_next_label(comp); - EMIT_ARG(setup_finally, l_finally_block); + EMIT_ARG(setup_block, l_finally_block, MP_EMIT_SETUP_BLOCK_FINALLY); compile_increase_except_level(comp); if (n_except == 0) { @@ -1672,12 +1676,12 @@ STATIC void compile_with_stmt_helper(compiler_t *comp, int n, mp_parse_node_t *n // this pre-bit is of the form "a as b" mp_parse_node_struct_t *pns = (mp_parse_node_struct_t*)nodes[0]; compile_node(comp, pns->nodes[0]); - EMIT_ARG(setup_with, l_end); + EMIT_ARG(setup_block, l_end, MP_EMIT_SETUP_BLOCK_WITH); c_assign(comp, pns->nodes[1], ASSIGN_STORE); } else { // this pre-bit is just an expression compile_node(comp, nodes[0]); - EMIT_ARG(setup_with, l_end); + EMIT_ARG(setup_block, l_end, MP_EMIT_SETUP_BLOCK_WITH); EMIT(pop_top); } compile_increase_except_level(comp); @@ -1703,10 +1707,20 @@ STATIC void compile_with_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { STATIC void compile_yield_from(compiler_t *comp) { EMIT_ARG(get_iter, false); EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE); - EMIT(yield_from); + EMIT_ARG(yield, MP_EMIT_YIELD_FROM); } #if MICROPY_PY_ASYNC_AWAIT +STATIC bool compile_require_async_context(compiler_t *comp, mp_parse_node_struct_t *pns) { + int scope_flags = comp->scope_cur->scope_flags; + if(scope_flags & MP_SCOPE_FLAG_GENERATOR) { + return true; + } + compile_syntax_error(comp, (mp_parse_node_t)pns, + translate("'async for' or 'async with' outside async function")); + return false; +} + STATIC void compile_await_object_method(compiler_t *comp, qstr method) { EMIT_ARG(load_method, method, false); EMIT_ARG(call_method, 0, 0, 0); @@ -1716,6 +1730,10 @@ STATIC void compile_await_object_method(compiler_t *comp, qstr method) { STATIC void compile_async_for_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { // comp->break_label |= MP_EMIT_BREAK_FROM_FOR; + if(!compile_require_async_context(comp, pns)) { + return; + } + qstr context = MP_PARSE_NODE_LEAF_ARG(pns->nodes[1]); uint while_else_label = comp_next_label(comp); uint try_exception_label = comp_next_label(comp); @@ -1730,7 +1748,7 @@ STATIC void compile_async_for_stmt(compiler_t *comp, mp_parse_node_struct_t *pns EMIT_ARG(label_assign, continue_label); - EMIT_ARG(setup_except, try_exception_label); + EMIT_ARG(setup_block, try_exception_label, MP_EMIT_SETUP_BLOCK_EXCEPT); compile_increase_except_level(comp); compile_load_id(comp, context); @@ -1801,7 +1819,7 @@ STATIC void compile_async_with_stmt_helper(compiler_t *comp, int n, mp_parse_nod compile_load_id(comp, context); EMIT_ARG(load_method, MP_QSTR___aexit__, false); - EMIT_ARG(setup_except, try_exception_label); + EMIT_ARG(setup_block, try_exception_label, MP_EMIT_SETUP_BLOCK_EXCEPT); compile_increase_except_level(comp); // compile additional pre-bits and the body compile_async_with_stmt_helper(comp, n - 1, nodes + 1, body); @@ -1815,7 +1833,7 @@ STATIC void compile_async_with_stmt_helper(compiler_t *comp, int n, mp_parse_nod // at this point the stack contains: ..., __aexit__, self, exc EMIT(dup_top); #if MICROPY_CPYTHON_COMPAT - EMIT_ARG(load_attr, MP_QSTR___class__); // get type(exc) + EMIT_ARG(attr, MP_QSTR___class__, MP_EMIT_ATTR_LOAD); // get type(exc) #else compile_load_id(comp, MP_QSTR_type); EMIT(rot_two); @@ -1853,6 +1871,9 @@ STATIC void compile_async_with_stmt_helper(compiler_t *comp, int n, mp_parse_nod } STATIC void compile_async_with_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { + if(!compile_require_async_context(comp, pns)) { + return; + } // get the nodes for the pre-bit of the with (the a as b, c as d, ... bit) mp_parse_node_t *nodes; int n = mp_parse_node_extract_list(&pns->nodes[0], PN_with_stmt_list, &nodes); @@ -1940,66 +1961,58 @@ STATIC void compile_expr_stmt(compiler_t *comp, mp_parse_node_struct_t *pns) { } } else { plain_assign: - if (MICROPY_COMP_DOUBLE_TUPLE_ASSIGN - && MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[1], PN_testlist_star_expr) - && MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_testlist_star_expr) - && MP_PARSE_NODE_STRUCT_NUM_NODES((mp_parse_node_struct_t*)pns->nodes[1]) == 2 - && MP_PARSE_NODE_STRUCT_NUM_NODES((mp_parse_node_struct_t*)pns->nodes[0]) == 2) { - // optimisation for a, b = c, d - mp_parse_node_struct_t *pns10 = (mp_parse_node_struct_t*)pns->nodes[1]; + #if MICROPY_COMP_DOUBLE_TUPLE_ASSIGN + if (MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[1], PN_testlist_star_expr) + && MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_testlist_star_expr)) { mp_parse_node_struct_t *pns0 = (mp_parse_node_struct_t*)pns->nodes[0]; - if (MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[0], PN_star_expr) - || MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[1], PN_star_expr)) { - // can't optimise when it's a star expression on the lhs - goto no_optimisation; - } - compile_node(comp, pns10->nodes[0]); // rhs - compile_node(comp, pns10->nodes[1]); // rhs - EMIT(rot_two); - c_assign(comp, pns0->nodes[0], ASSIGN_STORE); // lhs store - c_assign(comp, pns0->nodes[1], ASSIGN_STORE); // lhs store - } else if (MICROPY_COMP_TRIPLE_TUPLE_ASSIGN - && MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[1], PN_testlist_star_expr) - && MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_testlist_star_expr) - && MP_PARSE_NODE_STRUCT_NUM_NODES((mp_parse_node_struct_t*)pns->nodes[1]) == 3 - && MP_PARSE_NODE_STRUCT_NUM_NODES((mp_parse_node_struct_t*)pns->nodes[0]) == 3) { - // optimisation for a, b, c = d, e, f - mp_parse_node_struct_t *pns10 = (mp_parse_node_struct_t*)pns->nodes[1]; - mp_parse_node_struct_t *pns0 = (mp_parse_node_struct_t*)pns->nodes[0]; - if (MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[0], PN_star_expr) - || MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[1], PN_star_expr) - || MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[2], PN_star_expr)) { - // can't optimise when it's a star expression on the lhs - goto no_optimisation; + pns1 = (mp_parse_node_struct_t*)pns->nodes[1]; + uint32_t n_pns0 = MP_PARSE_NODE_STRUCT_NUM_NODES(pns0); + // Can only optimise a tuple-to-tuple assignment when all of the following hold: + // - equal number of items in LHS and RHS tuples + // - 2 or 3 items in the tuples + // - there are no star expressions in the LHS tuple + if (n_pns0 == MP_PARSE_NODE_STRUCT_NUM_NODES(pns1) + && (n_pns0 == 2 + #if MICROPY_COMP_TRIPLE_TUPLE_ASSIGN + || n_pns0 == 3 + #endif + ) + && !MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[0], PN_star_expr) + && !MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[1], PN_star_expr) + #if MICROPY_COMP_TRIPLE_TUPLE_ASSIGN + && (n_pns0 == 2 || !MP_PARSE_NODE_IS_STRUCT_KIND(pns0->nodes[2], PN_star_expr)) + #endif + ) { + // Optimisation for a, b = c, d or a, b, c = d, e, f + compile_node(comp, pns1->nodes[0]); // rhs + compile_node(comp, pns1->nodes[1]); // rhs + #if MICROPY_COMP_TRIPLE_TUPLE_ASSIGN + if (n_pns0 == 3) { + compile_node(comp, pns1->nodes[2]); // rhs + EMIT(rot_three); + } + #endif + EMIT(rot_two); + c_assign(comp, pns0->nodes[0], ASSIGN_STORE); // lhs store + c_assign(comp, pns0->nodes[1], ASSIGN_STORE); // lhs store + #if MICROPY_COMP_TRIPLE_TUPLE_ASSIGN + if (n_pns0 == 3) { + c_assign(comp, pns0->nodes[2], ASSIGN_STORE); // lhs store + } + #endif + return; } - compile_node(comp, pns10->nodes[0]); // rhs - compile_node(comp, pns10->nodes[1]); // rhs - compile_node(comp, pns10->nodes[2]); // rhs - EMIT(rot_three); - EMIT(rot_two); - c_assign(comp, pns0->nodes[0], ASSIGN_STORE); // lhs store - c_assign(comp, pns0->nodes[1], ASSIGN_STORE); // lhs store - c_assign(comp, pns0->nodes[2], ASSIGN_STORE); // lhs store - } else { - no_optimisation: - compile_node(comp, pns->nodes[1]); // rhs - c_assign(comp, pns->nodes[0], ASSIGN_STORE); // lhs store } + #endif + + compile_node(comp, pns->nodes[1]); // rhs + c_assign(comp, pns->nodes[0], ASSIGN_STORE); // lhs store } } else { goto plain_assign; } } -STATIC void c_binary_op(compiler_t *comp, mp_parse_node_struct_t *pns, mp_binary_op_t binary_op) { - int num_nodes = MP_PARSE_NODE_STRUCT_NUM_NODES(pns); - compile_node(comp, pns->nodes[0]); - for (int i = 1; i < num_nodes; i += 1) { - compile_node(comp, pns->nodes[i]); - EMIT_ARG(binary_op, binary_op); - } -} - STATIC void compile_test_if_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { assert(MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[1], PN_test_if_else)); mp_parse_node_struct_t *pns_test_if_else = (mp_parse_node_struct_t*)pns->nodes[1]; @@ -2030,7 +2043,8 @@ STATIC void compile_lambdef(compiler_t *comp, mp_parse_node_struct_t *pns) { compile_funcdef_lambdef(comp, this_scope, pns->nodes[0], PN_varargslist); } -STATIC void compile_or_and_test(compiler_t *comp, mp_parse_node_struct_t *pns, bool cond) { +STATIC void compile_or_and_test(compiler_t *comp, mp_parse_node_struct_t *pns) { + bool cond = MP_PARSE_NODE_STRUCT_KIND(pns) == PN_or_test; uint l_end = comp_next_label(comp); int n = MP_PARSE_NODE_STRUCT_NUM_NODES(pns); for (int i = 0; i < n; i += 1) { @@ -2042,14 +2056,6 @@ STATIC void compile_or_and_test(compiler_t *comp, mp_parse_node_struct_t *pns, b EMIT_ARG(label_assign, l_end); } -STATIC void compile_or_test(compiler_t *comp, mp_parse_node_struct_t *pns) { - compile_or_and_test(comp, pns, true); -} - -STATIC void compile_and_test(compiler_t *comp, mp_parse_node_struct_t *pns) { - compile_or_and_test(comp, pns, false); -} - STATIC void compile_not_test_2(compiler_t *comp, mp_parse_node_struct_t *pns) { compile_node(comp, pns->nodes[0]); EMIT_ARG(unary_op, MP_UNARY_OP_NOT); @@ -2112,19 +2118,19 @@ STATIC void compile_comparison(compiler_t *comp, mp_parse_node_struct_t *pns) { } STATIC void compile_star_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "*x must be assignment target"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("*x must be assignment target")); } -STATIC void compile_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { - c_binary_op(comp, pns, MP_BINARY_OP_OR); -} - -STATIC void compile_xor_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { - c_binary_op(comp, pns, MP_BINARY_OP_XOR); -} - -STATIC void compile_and_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { - c_binary_op(comp, pns, MP_BINARY_OP_AND); +STATIC void compile_binary_op(compiler_t *comp, mp_parse_node_struct_t *pns) { + MP_STATIC_ASSERT(MP_BINARY_OP_OR + PN_xor_expr - PN_expr == MP_BINARY_OP_XOR); + MP_STATIC_ASSERT(MP_BINARY_OP_OR + PN_and_expr - PN_expr == MP_BINARY_OP_AND); + mp_binary_op_t binary_op = MP_BINARY_OP_OR + MP_PARSE_NODE_STRUCT_KIND(pns) - PN_expr; + int num_nodes = MP_PARSE_NODE_STRUCT_NUM_NODES(pns); + compile_node(comp, pns->nodes[0]); + for (int i = 1; i < num_nodes; ++i) { + compile_node(comp, pns->nodes[i]); + EMIT_ARG(binary_op, binary_op); + } } STATIC void compile_term(compiler_t *comp, mp_parse_node_struct_t *pns) { @@ -2210,7 +2216,7 @@ STATIC void compile_atom_expr_normal(compiler_t *comp, mp_parse_node_struct_t *p } if (!found) { compile_syntax_error(comp, (mp_parse_node_t)pns_trail[0], - "super() can't find self"); // really a TypeError + translate("super() can't find self")); // really a TypeError return; } @@ -2273,14 +2279,14 @@ STATIC void compile_trailer_paren_helper(compiler_t *comp, mp_parse_node_t pn_ar mp_parse_node_struct_t *pns_arg = (mp_parse_node_struct_t*)args[i]; if (MP_PARSE_NODE_STRUCT_KIND(pns_arg) == PN_arglist_star) { if (star_flags & MP_EMIT_STAR_FLAG_SINGLE) { - compile_syntax_error(comp, (mp_parse_node_t)pns_arg, "can't have multiple *x"); + compile_syntax_error(comp, (mp_parse_node_t)pns_arg, translate("can't have multiple *x")); return; } star_flags |= MP_EMIT_STAR_FLAG_SINGLE; star_args_node = pns_arg; } else if (MP_PARSE_NODE_STRUCT_KIND(pns_arg) == PN_arglist_dbl_star) { if (star_flags & MP_EMIT_STAR_FLAG_DOUBLE) { - compile_syntax_error(comp, (mp_parse_node_t)pns_arg, "can't have multiple **x"); + compile_syntax_error(comp, (mp_parse_node_t)pns_arg, translate("can't have multiple **x")); return; } star_flags |= MP_EMIT_STAR_FLAG_DOUBLE; @@ -2288,7 +2294,7 @@ STATIC void compile_trailer_paren_helper(compiler_t *comp, mp_parse_node_t pn_ar } else if (MP_PARSE_NODE_STRUCT_KIND(pns_arg) == PN_argument) { if (!MP_PARSE_NODE_IS_STRUCT_KIND(pns_arg->nodes[1], PN_comp_for)) { if (!MP_PARSE_NODE_IS_ID(pns_arg->nodes[0])) { - compile_syntax_error(comp, (mp_parse_node_t)pns_arg, "LHS of keyword arg must be an id"); + compile_syntax_error(comp, (mp_parse_node_t)pns_arg, translate("LHS of keyword arg must be an id")); return; } EMIT_ARG(load_const_str, MP_PARSE_NODE_LEAF_ARG(pns_arg->nodes[0])); @@ -2304,11 +2310,11 @@ STATIC void compile_trailer_paren_helper(compiler_t *comp, mp_parse_node_t pn_ar } else { normal_argument: if (star_flags) { - compile_syntax_error(comp, args[i], "non-keyword arg after */**"); + compile_syntax_error(comp, args[i], translate("non-keyword arg after */**")); return; } if (n_keyword > 0) { - compile_syntax_error(comp, args[i], "non-keyword arg after keyword arg"); + compile_syntax_error(comp, args[i], translate("non-keyword arg after keyword arg")); return; } compile_node(comp, args[i]); @@ -2400,7 +2406,7 @@ STATIC void compile_atom_paren(compiler_t *comp, mp_parse_node_struct_t *pns) { STATIC void compile_atom_bracket(compiler_t *comp, mp_parse_node_struct_t *pns) { if (MP_PARSE_NODE_IS_NULL(pns->nodes[0])) { // empty list - EMIT_ARG(build_list, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_LIST); } else if (MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_testlist_comp)) { mp_parse_node_struct_t *pns2 = (mp_parse_node_struct_t*)pns->nodes[0]; if (MP_PARSE_NODE_IS_STRUCT(pns2->nodes[1])) { @@ -2409,12 +2415,12 @@ STATIC void compile_atom_bracket(compiler_t *comp, mp_parse_node_struct_t *pns) // list of one item, with trailing comma assert(MP_PARSE_NODE_IS_NULL(pns3->nodes[0])); compile_node(comp, pns2->nodes[0]); - EMIT_ARG(build_list, 1); + EMIT_ARG(build, 1, MP_EMIT_BUILD_LIST); } else if (MP_PARSE_NODE_STRUCT_KIND(pns3) == PN_testlist_comp_3c) { // list of many items compile_node(comp, pns2->nodes[0]); compile_generic_all_nodes(comp, pns3); - EMIT_ARG(build_list, 1 + MP_PARSE_NODE_STRUCT_NUM_NODES(pns3)); + EMIT_ARG(build, 1 + MP_PARSE_NODE_STRUCT_NUM_NODES(pns3), MP_EMIT_BUILD_LIST); } else if (MP_PARSE_NODE_STRUCT_KIND(pns3) == PN_comp_for) { // list comprehension compile_comprehension(comp, pns2, SCOPE_LIST_COMP); @@ -2427,12 +2433,12 @@ STATIC void compile_atom_bracket(compiler_t *comp, mp_parse_node_struct_t *pns) list_with_2_items: compile_node(comp, pns2->nodes[0]); compile_node(comp, pns2->nodes[1]); - EMIT_ARG(build_list, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_LIST); } } else { // list with 1 item compile_node(comp, pns->nodes[0]); - EMIT_ARG(build_list, 1); + EMIT_ARG(build, 1, MP_EMIT_BUILD_LIST); } } @@ -2440,12 +2446,12 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { mp_parse_node_t pn = pns->nodes[0]; if (MP_PARSE_NODE_IS_NULL(pn)) { // empty dict - EMIT_ARG(build_map, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_MAP); } else if (MP_PARSE_NODE_IS_STRUCT(pn)) { pns = (mp_parse_node_struct_t*)pn; if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_dictorsetmaker_item) { // dict with one element - EMIT_ARG(build_map, 1); + EMIT_ARG(build, 1, MP_EMIT_BUILD_MAP); compile_node(comp, pn); EMIT(store_map); } else if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_dictorsetmaker) { @@ -2462,7 +2468,7 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { bool is_dict; if (!MICROPY_PY_BUILTINS_SET || MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_dictorsetmaker_item)) { // a dictionary - EMIT_ARG(build_map, 1 + n); + EMIT_ARG(build, 1 + n, MP_EMIT_BUILD_MAP); compile_node(comp, pns->nodes[0]); EMIT(store_map); is_dict = true; @@ -2480,9 +2486,9 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { if (is_dict) { if (!is_key_value) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "invalid syntax"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("invalid syntax")); } else { - compile_syntax_error(comp, (mp_parse_node_t)pns, "expecting key:value for dict"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("expecting key:value for dict")); } return; } @@ -2490,9 +2496,9 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { } else { if (is_key_value) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "invalid syntax"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("invalid syntax")); } else { - compile_syntax_error(comp, (mp_parse_node_t)pns, "expecting just a value for set"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("expecting just a value for set")); } return; } @@ -2502,7 +2508,7 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { #if MICROPY_PY_BUILTINS_SET // if it's a set, build it if (!is_dict) { - EMIT_ARG(build_set, 1 + n); + EMIT_ARG(build, 1 + n, MP_EMIT_BUILD_SET); } #endif } else { @@ -2525,7 +2531,7 @@ STATIC void compile_atom_brace(compiler_t *comp, mp_parse_node_struct_t *pns) { set_with_one_element: #if MICROPY_PY_BUILTINS_SET compile_node(comp, pn); - EMIT_ARG(build_set, 1); + EMIT_ARG(build, 1, MP_EMIT_BUILD_SET); #else assert(0); #endif @@ -2539,22 +2545,31 @@ STATIC void compile_trailer_paren(compiler_t *comp, mp_parse_node_struct_t *pns) STATIC void compile_trailer_bracket(compiler_t *comp, mp_parse_node_struct_t *pns) { // object who's index we want is on top of stack compile_node(comp, pns->nodes[0]); // the index - EMIT(load_subscr); + EMIT_ARG(subscr, MP_EMIT_SUBSCR_LOAD); } STATIC void compile_trailer_period(compiler_t *comp, mp_parse_node_struct_t *pns) { // object who's attribute we want is on top of stack - EMIT_ARG(load_attr, MP_PARSE_NODE_LEAF_ARG(pns->nodes[0])); // attribute to get + EMIT_ARG(attr, MP_PARSE_NODE_LEAF_ARG(pns->nodes[0]), MP_EMIT_ATTR_LOAD); // attribute to get } #if MICROPY_PY_BUILTINS_SLICE -STATIC void compile_subscript_3_helper(compiler_t *comp, mp_parse_node_struct_t *pns) { +STATIC void compile_subscript(compiler_t *comp, mp_parse_node_struct_t *pns) { + if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_subscript_2) { + compile_node(comp, pns->nodes[0]); // start of slice + assert(MP_PARSE_NODE_IS_STRUCT(pns->nodes[1])); // should always be + pns = (mp_parse_node_struct_t*)pns->nodes[1]; + } else { + // pns is a PN_subscript_3, load None for start of slice + EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE); + } + assert(MP_PARSE_NODE_STRUCT_KIND(pns) == PN_subscript_3); // should always be mp_parse_node_t pn = pns->nodes[0]; if (MP_PARSE_NODE_IS_NULL(pn)) { // [?:] EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE); - EMIT_ARG(build_slice, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_SLICE); } else if (MP_PARSE_NODE_IS_STRUCT(pn)) { pns = (mp_parse_node_struct_t*)pn; if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_subscript_3c) { @@ -2562,11 +2577,11 @@ STATIC void compile_subscript_3_helper(compiler_t *comp, mp_parse_node_struct_t pn = pns->nodes[0]; if (MP_PARSE_NODE_IS_NULL(pn)) { // [?::] - EMIT_ARG(build_slice, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_SLICE); } else { // [?::x] compile_node(comp, pn); - EMIT_ARG(build_slice, 3); + EMIT_ARG(build, 3, MP_EMIT_BUILD_SLICE); } } else if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_subscript_3d) { compile_node(comp, pns->nodes[0]); @@ -2575,34 +2590,23 @@ STATIC void compile_subscript_3_helper(compiler_t *comp, mp_parse_node_struct_t assert(MP_PARSE_NODE_STRUCT_KIND(pns) == PN_sliceop); // should always be if (MP_PARSE_NODE_IS_NULL(pns->nodes[0])) { // [?:x:] - EMIT_ARG(build_slice, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_SLICE); } else { // [?:x:x] compile_node(comp, pns->nodes[0]); - EMIT_ARG(build_slice, 3); + EMIT_ARG(build, 3, MP_EMIT_BUILD_SLICE); } } else { // [?:x] compile_node(comp, pn); - EMIT_ARG(build_slice, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_SLICE); } } else { // [?:x] compile_node(comp, pn); - EMIT_ARG(build_slice, 2); + EMIT_ARG(build, 2, MP_EMIT_BUILD_SLICE); } } - -STATIC void compile_subscript_2(compiler_t *comp, mp_parse_node_struct_t *pns) { - compile_node(comp, pns->nodes[0]); // start of slice - assert(MP_PARSE_NODE_IS_STRUCT(pns->nodes[1])); // should always be - compile_subscript_3_helper(comp, (mp_parse_node_struct_t*)pns->nodes[1]); -} - -STATIC void compile_subscript_3(compiler_t *comp, mp_parse_node_struct_t *pns) { - EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE); - compile_subscript_3_helper(comp, pns); -} #endif // MICROPY_PY_BUILTINS_SLICE STATIC void compile_dictorsetmaker_item(compiler_t *comp, mp_parse_node_struct_t *pns) { @@ -2619,26 +2623,26 @@ STATIC void compile_classdef(compiler_t *comp, mp_parse_node_struct_t *pns) { STATIC void compile_yield_expr(compiler_t *comp, mp_parse_node_struct_t *pns) { if (comp->scope_cur->kind != SCOPE_FUNCTION && comp->scope_cur->kind != SCOPE_LAMBDA) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "'yield' outside function"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("'yield' outside function")); return; } if (MP_PARSE_NODE_IS_NULL(pns->nodes[0])) { EMIT_ARG(load_const_tok, MP_TOKEN_KW_NONE); - EMIT(yield_value); + EMIT_ARG(yield, MP_EMIT_YIELD_VALUE); } else if (MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_yield_arg_from)) { pns = (mp_parse_node_struct_t*)pns->nodes[0]; compile_node(comp, pns->nodes[0]); compile_yield_from(comp); } else { compile_node(comp, pns->nodes[0]); - EMIT(yield_value); + EMIT_ARG(yield, MP_EMIT_YIELD_VALUE); } } #if MICROPY_PY_ASYNC_AWAIT STATIC void compile_atom_expr_await(compiler_t *comp, mp_parse_node_struct_t *pns) { if (comp->scope_cur->kind != SCOPE_FUNCTION && comp->scope_cur->kind != SCOPE_LAMBDA) { - compile_syntax_error(comp, (mp_parse_node_t)pns, "'await' outside function"); + compile_syntax_error(comp, (mp_parse_node_t)pns, translate("'await' outside function")); return; } compile_atom_expr_normal(comp, pns); @@ -2731,7 +2735,7 @@ STATIC void compile_node(compiler_t *comp, mp_parse_node_t pn) { STATIC void compile_scope_func_lambda_param(compiler_t *comp, mp_parse_node_t pn, pn_kind_t pn_name, pn_kind_t pn_star, pn_kind_t pn_dbl_star) { // check that **kw is last if ((comp->scope_cur->scope_flags & MP_SCOPE_FLAG_VARKEYWORDS) != 0) { - compile_syntax_error(comp, pn, "invalid syntax"); + compile_syntax_error(comp, pn, translate("invalid syntax")); return; } @@ -2761,7 +2765,7 @@ STATIC void compile_scope_func_lambda_param(compiler_t *comp, mp_parse_node_t pn } else if (MP_PARSE_NODE_STRUCT_KIND(pns) == pn_star) { if (comp->have_star) { // more than one star - compile_syntax_error(comp, pn, "invalid syntax"); + compile_syntax_error(comp, pn, translate("invalid syntax")); return; } comp->have_star = true; @@ -2793,7 +2797,7 @@ STATIC void compile_scope_func_lambda_param(compiler_t *comp, mp_parse_node_t pn bool added; id_info_t *id_info = scope_find_or_add_id(comp->scope_cur, param_name, &added); if (!added) { - compile_syntax_error(comp, pn, "name reused for argument"); + compile_syntax_error(comp, pn, translate("name reused for argument")); return; } id_info->kind = ID_INFO_KIND_LOCAL; @@ -2846,7 +2850,7 @@ STATIC void compile_scope_func_annotations(compiler_t *comp, mp_parse_node_t pn) qstr arg_type = MP_PARSE_NODE_LEAF_ARG(pn_annotation); EMIT_ARG(set_native_type, MP_EMIT_NATIVE_TYPE_ARG, id_info->local_num, arg_type); } else { - compile_syntax_error(comp, pn_annotation, "parameter annotation must be an identifier"); + compile_syntax_error(comp, pn_annotation, translate("parameter annotation must be an identifier")); } } } @@ -2865,7 +2869,7 @@ STATIC void compile_scope_comp_iter(compiler_t *comp, mp_parse_node_struct_t *pn // no more nested if/for; compile inner expression compile_node(comp, pn_inner_expr); if (comp->scope_cur->kind == SCOPE_GEN_EXPR) { - EMIT(yield_value); + EMIT_ARG(yield, MP_EMIT_YIELD_VALUE); EMIT(pop_top); } else { EMIT_ARG(store_comp, comp->scope_cur->kind, 4 * for_depth + 5); @@ -2988,7 +2992,7 @@ STATIC void compile_scope(compiler_t *comp, scope_t *scope, pass_kind_t pass) { qstr ret_type = MP_PARSE_NODE_LEAF_ARG(pn_annotation); EMIT_ARG(set_native_type, MP_EMIT_NATIVE_TYPE_RETURN, 0, ret_type); } else { - compile_syntax_error(comp, pn_annotation, "return annotation must be an identifier"); + compile_syntax_error(comp, pn_annotation, translate("return annotation must be an identifier")); } } } @@ -3043,19 +3047,19 @@ STATIC void compile_scope(compiler_t *comp, scope_t *scope, pass_kind_t pass) { } if (scope->kind == SCOPE_LIST_COMP) { - EMIT_ARG(build_list, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_LIST); } else if (scope->kind == SCOPE_DICT_COMP) { - EMIT_ARG(build_map, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_MAP); #if MICROPY_PY_BUILTINS_SET } else if (scope->kind == SCOPE_SET_COMP) { - EMIT_ARG(build_set, 0); + EMIT_ARG(build, 0, MP_EMIT_BUILD_SET); #endif } // There are 4 slots on the stack for the iterator, and the first one is // NULL to indicate that the second one points to the iterator object. if (scope->kind == SCOPE_GEN_EXPR) { - // TODO static assert that MP_OBJ_ITER_BUF_NSLOTS == 4 + MP_STATIC_ASSERT(MP_OBJ_ITER_BUF_NSLOTS == 4); EMIT(load_null); compile_load_id(comp, qstr_arg); EMIT(load_null); @@ -3116,7 +3120,7 @@ STATIC void compile_scope_inline_asm(compiler_t *comp, scope_t *scope, pass_kind comp->next_label = 0; if (scope->kind != SCOPE_FUNCTION) { - compile_syntax_error(comp, MP_PARSE_NODE_NULL, "inline assembler must be a function"); + compile_syntax_error(comp, MP_PARSE_NODE_NULL, translate("inline assembler must be a function")); return; } @@ -3153,10 +3157,10 @@ STATIC void compile_scope_inline_asm(compiler_t *comp, scope_t *scope, pass_kind case MP_QSTR_bool: type_sig = MP_NATIVE_TYPE_BOOL; break; case MP_QSTR_int: type_sig = MP_NATIVE_TYPE_INT; break; case MP_QSTR_uint: type_sig = MP_NATIVE_TYPE_UINT; break; - default: compile_syntax_error(comp, pn_annotation, "unknown type"); return; + default: compile_syntax_error(comp, pn_annotation, translate("unknown type")); return; } } else { - compile_syntax_error(comp, pn_annotation, "return annotation must be an identifier"); + compile_syntax_error(comp, pn_annotation, translate("return annotation must be an identifier")); } } @@ -3173,7 +3177,7 @@ STATIC void compile_scope_inline_asm(compiler_t *comp, scope_t *scope, pass_kind } else if (MP_PARSE_NODE_STRUCT_KIND(pns2) != PN_expr_stmt) { // not an instruction; error not_an_instruction: - compile_syntax_error(comp, nodes[i], "expecting an assembler instruction"); + compile_syntax_error(comp, nodes[i], translate("expecting an assembler instruction")); return; } @@ -3203,19 +3207,19 @@ STATIC void compile_scope_inline_asm(compiler_t *comp, scope_t *scope, pass_kind // emit instructions if (op == MP_QSTR_label) { if (!(n_args == 1 && MP_PARSE_NODE_IS_ID(pn_arg[0]))) { - compile_syntax_error(comp, nodes[i], "'label' requires 1 argument"); + compile_syntax_error(comp, nodes[i], translate("'label' requires 1 argument")); return; } uint lab = comp_next_label(comp); if (pass > MP_PASS_SCOPE) { if (!EMIT_INLINE_ASM_ARG(label, lab, MP_PARSE_NODE_LEAF_ARG(pn_arg[0]))) { - compile_syntax_error(comp, nodes[i], "label redefined"); + compile_syntax_error(comp, nodes[i], translate("label redefined")); return; } } } else if (op == MP_QSTR_align) { if (!(n_args == 1 && MP_PARSE_NODE_IS_SMALL_INT(pn_arg[0]))) { - compile_syntax_error(comp, nodes[i], "'align' requires 1 argument"); + compile_syntax_error(comp, nodes[i], translate("'align' requires 1 argument")); return; } if (pass > MP_PASS_SCOPE) { @@ -3224,14 +3228,14 @@ STATIC void compile_scope_inline_asm(compiler_t *comp, scope_t *scope, pass_kind } } else if (op == MP_QSTR_data) { if (!(n_args >= 2 && MP_PARSE_NODE_IS_SMALL_INT(pn_arg[0]))) { - compile_syntax_error(comp, nodes[i], "'data' requires at least 2 arguments"); + compile_syntax_error(comp, nodes[i], translate("'data' requires at least 2 arguments")); return; } if (pass > MP_PASS_SCOPE) { mp_int_t bytesize = MP_PARSE_NODE_LEAF_SMALL_INT(pn_arg[0]); - for (uint j = 1; j < n_args; j++) { + for (int j = 1; j < n_args; j++) { if (!MP_PARSE_NODE_IS_SMALL_INT(pn_arg[j])) { - compile_syntax_error(comp, nodes[i], "'data' requires integer arguments"); + compile_syntax_error(comp, nodes[i], translate("'data' requires integer arguments")); return; } mp_asm_base_data((mp_asm_base_t*)comp->emit_inline_asm, diff --git a/py/emit.h b/py/emit.h index 270a40633c8a9..aa98efa774398 100644 --- a/py/emit.h +++ b/py/emit.h @@ -55,13 +55,50 @@ typedef enum { #define MP_EMIT_NATIVE_TYPE_RETURN (1) #define MP_EMIT_NATIVE_TYPE_ARG (2) +// Kind for emit_id_ops->local() +#define MP_EMIT_IDOP_LOCAL_FAST (0) +#define MP_EMIT_IDOP_LOCAL_DEREF (1) + +// Kind for emit_id_ops->global() +#define MP_EMIT_IDOP_GLOBAL_NAME (0) +#define MP_EMIT_IDOP_GLOBAL_GLOBAL (1) + +// Kind for emit->import() +#define MP_EMIT_IMPORT_NAME (0) +#define MP_EMIT_IMPORT_FROM (1) +#define MP_EMIT_IMPORT_STAR (2) + +// Kind for emit->subscr() +#define MP_EMIT_SUBSCR_LOAD (0) +#define MP_EMIT_SUBSCR_STORE (1) +#define MP_EMIT_SUBSCR_DELETE (2) + +// Kind for emit->attr() +#define MP_EMIT_ATTR_LOAD (0) +#define MP_EMIT_ATTR_STORE (1) +#define MP_EMIT_ATTR_DELETE (2) + +// Kind for emit->setup_block() +#define MP_EMIT_SETUP_BLOCK_WITH (0) +#define MP_EMIT_SETUP_BLOCK_EXCEPT (2) +#define MP_EMIT_SETUP_BLOCK_FINALLY (3) + +// Kind for emit->build() +#define MP_EMIT_BUILD_TUPLE (0) +#define MP_EMIT_BUILD_LIST (1) +#define MP_EMIT_BUILD_MAP (3) +#define MP_EMIT_BUILD_SET (6) +#define MP_EMIT_BUILD_SLICE (8) + +// Kind for emit->yield() +#define MP_EMIT_YIELD_VALUE (0) +#define MP_EMIT_YIELD_FROM (1) + typedef struct _emit_t emit_t; typedef struct _mp_emit_method_table_id_ops_t { - void (*fast)(emit_t *emit, qstr qst, mp_uint_t local_num); - void (*deref)(emit_t *emit, qstr qst, mp_uint_t local_num); - void (*name)(emit_t *emit, qstr qst); - void (*global)(emit_t *emit, qstr qst); + void (*local)(emit_t *emit, qstr qst, mp_uint_t local_num, int kind); + void (*global)(emit_t *emit, qstr qst, int kind); } mp_emit_method_table_id_ops_t; typedef struct _emit_method_table_t { @@ -77,22 +114,16 @@ typedef struct _emit_method_table_t { mp_emit_method_table_id_ops_t delete_id; void (*label_assign)(emit_t *emit, mp_uint_t l); - void (*import_name)(emit_t *emit, qstr qst); - void (*import_from)(emit_t *emit, qstr qst); - void (*import_star)(emit_t *emit); + void (*import)(emit_t *emit, qstr qst, int kind); void (*load_const_tok)(emit_t *emit, mp_token_kind_t tok); void (*load_const_small_int)(emit_t *emit, mp_int_t arg); void (*load_const_str)(emit_t *emit, qstr qst); void (*load_const_obj)(emit_t *emit, mp_obj_t obj); void (*load_null)(emit_t *emit); - void (*load_attr)(emit_t *emit, qstr qst); void (*load_method)(emit_t *emit, qstr qst, bool is_super); void (*load_build_class)(emit_t *emit); - void (*load_subscr)(emit_t *emit); - void (*store_attr)(emit_t *emit, qstr qst); - void (*store_subscr)(emit_t *emit); - void (*delete_attr)(emit_t *emit, qstr qst); - void (*delete_subscr)(emit_t *emit); + void (*subscr)(emit_t *emit, int kind); + void (*attr)(emit_t *emit, qstr qst, int kind); void (*dup_top)(emit_t *emit); void (*dup_top_two)(emit_t *emit); void (*pop_top)(emit_t *emit); @@ -101,12 +132,9 @@ typedef struct _emit_method_table_t { void (*jump)(emit_t *emit, mp_uint_t label); void (*pop_jump_if)(emit_t *emit, bool cond, mp_uint_t label); void (*jump_if_or_pop)(emit_t *emit, bool cond, mp_uint_t label); - void (*break_loop)(emit_t *emit, mp_uint_t label, mp_uint_t except_depth); - void (*continue_loop)(emit_t *emit, mp_uint_t label, mp_uint_t except_depth); - void (*setup_with)(emit_t *emit, mp_uint_t label); + void (*unwind_jump)(emit_t *emit, mp_uint_t label, mp_uint_t except_depth); + void (*setup_block)(emit_t *emit, mp_uint_t label, int kind); void (*with_cleanup)(emit_t *emit, mp_uint_t label); - void (*setup_except)(emit_t *emit, mp_uint_t label); - void (*setup_finally)(emit_t *emit, mp_uint_t label); void (*end_finally)(emit_t *emit); void (*get_iter)(emit_t *emit, bool use_stack); void (*for_iter)(emit_t *emit, mp_uint_t label); @@ -115,16 +143,8 @@ typedef struct _emit_method_table_t { void (*pop_except)(emit_t *emit); void (*unary_op)(emit_t *emit, mp_unary_op_t op); void (*binary_op)(emit_t *emit, mp_binary_op_t op); - void (*build_tuple)(emit_t *emit, mp_uint_t n_args); - void (*build_list)(emit_t *emit, mp_uint_t n_args); - void (*build_map)(emit_t *emit, mp_uint_t n_args); + void (*build)(emit_t *emit, mp_uint_t n_args, int kind); void (*store_map)(emit_t *emit); - #if MICROPY_PY_BUILTINS_SET - void (*build_set)(emit_t *emit, mp_uint_t n_args); - #endif - #if MICROPY_PY_BUILTINS_SLICE - void (*build_slice)(emit_t *emit, mp_uint_t n_args); - #endif void (*store_comp)(emit_t *emit, scope_kind_t kind, mp_uint_t set_stack_index); void (*unpack_sequence)(emit_t *emit, mp_uint_t n_args); void (*unpack_ex)(emit_t *emit, mp_uint_t n_left, mp_uint_t n_right); @@ -134,8 +154,7 @@ typedef struct _emit_method_table_t { void (*call_method)(emit_t *emit, mp_uint_t n_positional, mp_uint_t n_keyword, mp_uint_t star_flags); void (*return_value)(emit_t *emit); void (*raise_varargs)(emit_t *emit, mp_uint_t n_args); - void (*yield_value)(emit_t *emit); - void (*yield_from)(emit_t *emit); + void (*yield)(emit_t *emit, int kind); // these methods are used to control entry to/exit from an exception handler // they may or may not emit code @@ -180,36 +199,24 @@ bool mp_emit_bc_last_emit_was_return_value(emit_t *emit); void mp_emit_bc_adjust_stack_size(emit_t *emit, mp_int_t delta); void mp_emit_bc_set_source_line(emit_t *emit, mp_uint_t line); -void mp_emit_bc_load_fast(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_load_deref(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_load_name(emit_t *emit, qstr qst); -void mp_emit_bc_load_global(emit_t *emit, qstr qst); -void mp_emit_bc_store_fast(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_store_deref(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_store_name(emit_t *emit, qstr qst); -void mp_emit_bc_store_global(emit_t *emit, qstr qst); -void mp_emit_bc_delete_fast(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_delete_deref(emit_t *emit, qstr qst, mp_uint_t local_num); -void mp_emit_bc_delete_name(emit_t *emit, qstr qst); -void mp_emit_bc_delete_global(emit_t *emit, qstr qst); +void mp_emit_bc_load_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind); +void mp_emit_bc_load_global(emit_t *emit, qstr qst, int kind); +void mp_emit_bc_store_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind); +void mp_emit_bc_store_global(emit_t *emit, qstr qst, int kind); +void mp_emit_bc_delete_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind); +void mp_emit_bc_delete_global(emit_t *emit, qstr qst, int kind); void mp_emit_bc_label_assign(emit_t *emit, mp_uint_t l); -void mp_emit_bc_import_name(emit_t *emit, qstr qst); -void mp_emit_bc_import_from(emit_t *emit, qstr qst); -void mp_emit_bc_import_star(emit_t *emit); +void mp_emit_bc_import(emit_t *emit, qstr qst, int kind); void mp_emit_bc_load_const_tok(emit_t *emit, mp_token_kind_t tok); void mp_emit_bc_load_const_small_int(emit_t *emit, mp_int_t arg); void mp_emit_bc_load_const_str(emit_t *emit, qstr qst); void mp_emit_bc_load_const_obj(emit_t *emit, mp_obj_t obj); void mp_emit_bc_load_null(emit_t *emit); -void mp_emit_bc_load_attr(emit_t *emit, qstr qst); void mp_emit_bc_load_method(emit_t *emit, qstr qst, bool is_super); void mp_emit_bc_load_build_class(emit_t *emit); -void mp_emit_bc_load_subscr(emit_t *emit); -void mp_emit_bc_store_attr(emit_t *emit, qstr qst); -void mp_emit_bc_store_subscr(emit_t *emit); -void mp_emit_bc_delete_attr(emit_t *emit, qstr qst); -void mp_emit_bc_delete_subscr(emit_t *emit); +void mp_emit_bc_subscr(emit_t *emit, int kind); +void mp_emit_bc_attr(emit_t *emit, qstr qst, int kind); void mp_emit_bc_dup_top(emit_t *emit); void mp_emit_bc_dup_top_two(emit_t *emit); void mp_emit_bc_pop_top(emit_t *emit); @@ -219,12 +226,8 @@ void mp_emit_bc_jump(emit_t *emit, mp_uint_t label); void mp_emit_bc_pop_jump_if(emit_t *emit, bool cond, mp_uint_t label); void mp_emit_bc_jump_if_or_pop(emit_t *emit, bool cond, mp_uint_t label); void mp_emit_bc_unwind_jump(emit_t *emit, mp_uint_t label, mp_uint_t except_depth); -#define mp_emit_bc_break_loop mp_emit_bc_unwind_jump -#define mp_emit_bc_continue_loop mp_emit_bc_unwind_jump -void mp_emit_bc_setup_with(emit_t *emit, mp_uint_t label); +void mp_emit_bc_setup_block(emit_t *emit, mp_uint_t label, int kind); void mp_emit_bc_with_cleanup(emit_t *emit, mp_uint_t label); -void mp_emit_bc_setup_except(emit_t *emit, mp_uint_t label); -void mp_emit_bc_setup_finally(emit_t *emit, mp_uint_t label); void mp_emit_bc_end_finally(emit_t *emit); void mp_emit_bc_get_iter(emit_t *emit, bool use_stack); void mp_emit_bc_for_iter(emit_t *emit, mp_uint_t label); @@ -233,16 +236,8 @@ void mp_emit_bc_pop_block(emit_t *emit); void mp_emit_bc_pop_except(emit_t *emit); void mp_emit_bc_unary_op(emit_t *emit, mp_unary_op_t op); void mp_emit_bc_binary_op(emit_t *emit, mp_binary_op_t op); -void mp_emit_bc_build_tuple(emit_t *emit, mp_uint_t n_args); -void mp_emit_bc_build_list(emit_t *emit, mp_uint_t n_args); -void mp_emit_bc_build_map(emit_t *emit, mp_uint_t n_args); +void mp_emit_bc_build(emit_t *emit, mp_uint_t n_args, int kind); void mp_emit_bc_store_map(emit_t *emit); -#if MICROPY_PY_BUILTINS_SET -void mp_emit_bc_build_set(emit_t *emit, mp_uint_t n_args); -#endif -#if MICROPY_PY_BUILTINS_SLICE -void mp_emit_bc_build_slice(emit_t *emit, mp_uint_t n_args); -#endif void mp_emit_bc_store_comp(emit_t *emit, scope_kind_t kind, mp_uint_t list_stack_index); void mp_emit_bc_unpack_sequence(emit_t *emit, mp_uint_t n_args); void mp_emit_bc_unpack_ex(emit_t *emit, mp_uint_t n_left, mp_uint_t n_right); @@ -252,8 +247,7 @@ void mp_emit_bc_call_function(emit_t *emit, mp_uint_t n_positional, mp_uint_t n_ void mp_emit_bc_call_method(emit_t *emit, mp_uint_t n_positional, mp_uint_t n_keyword, mp_uint_t star_flags); void mp_emit_bc_return_value(emit_t *emit); void mp_emit_bc_raise_varargs(emit_t *emit, mp_uint_t n_args); -void mp_emit_bc_yield_value(emit_t *emit); -void mp_emit_bc_yield_from(emit_t *emit); +void mp_emit_bc_yield(emit_t *emit, int kind); void mp_emit_bc_start_except_handler(emit_t *emit); void mp_emit_bc_end_except_handler(emit_t *emit); diff --git a/py/emitbc.c b/py/emitbc.c index 3f4dfc1786160..f3951e9cb509f 100644 --- a/py/emitbc.c +++ b/py/emitbc.c @@ -313,9 +313,12 @@ void mp_emit_bc_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scope) { emit->scope = scope; emit->last_source_line_offset = 0; emit->last_source_line = 1; - if (pass < MP_PASS_EMIT) { + #ifndef NDEBUG + // With debugging enabled labels are checked for unique assignment + if (pass < MP_PASS_EMIT && emit->label_offsets != NULL) { memset(emit->label_offsets, -1, emit->max_num_labels * sizeof(mp_uint_t)); } + #endif emit->bytecode_offset = 0; emit->code_info_offset = 0; @@ -434,7 +437,9 @@ void mp_emit_bc_end_pass(emit_t *emit) { } else if (emit->pass == MP_PASS_EMIT) { mp_emit_glue_assign_bytecode(emit->scope->raw_code, emit->code_base, + #if MICROPY_PERSISTENT_CODE_SAVE || MICROPY_DEBUG_PRINTERS emit->code_info_size + emit->bytecode_size, + #endif emit->const_table, #if MICROPY_PERSISTENT_CODE_SAVE emit->ct_cur_obj, emit->ct_cur_raw_code, @@ -495,24 +500,23 @@ void mp_emit_bc_label_assign(emit_t *emit, mp_uint_t l) { emit->label_offsets[l] = emit->bytecode_offset; } else { // ensure label offset has not changed from MP_PASS_CODE_SIZE to MP_PASS_EMIT - //printf("l%d: (at %d vs %d)\n", l, emit->bytecode_offset, emit->label_offsets[l]); assert(emit->label_offsets[l] == emit->bytecode_offset); } } -void mp_emit_bc_import_name(emit_t *emit, qstr qst) { - emit_bc_pre(emit, -1); - emit_write_bytecode_byte_qstr(emit, MP_BC_IMPORT_NAME, qst); -} - -void mp_emit_bc_import_from(emit_t *emit, qstr qst) { - emit_bc_pre(emit, 1); - emit_write_bytecode_byte_qstr(emit, MP_BC_IMPORT_FROM, qst); -} - -void mp_emit_bc_import_star(emit_t *emit) { - emit_bc_pre(emit, -1); - emit_write_bytecode_byte(emit, MP_BC_IMPORT_STAR); +void mp_emit_bc_import(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_BC_IMPORT_NAME + MP_EMIT_IMPORT_NAME == MP_BC_IMPORT_NAME); + MP_STATIC_ASSERT(MP_BC_IMPORT_NAME + MP_EMIT_IMPORT_FROM == MP_BC_IMPORT_FROM); + if (kind == MP_EMIT_IMPORT_FROM) { + emit_bc_pre(emit, 1); + } else { + emit_bc_pre(emit, -1); + } + if (kind == MP_EMIT_IMPORT_STAR) { + emit_write_bytecode_byte(emit, MP_BC_IMPORT_STAR); + } else { + emit_write_bytecode_byte_qstr(emit, MP_BC_IMPORT_NAME + kind, qst); + } } void mp_emit_bc_load_const_tok(emit_t *emit, mp_token_kind_t tok) { @@ -552,43 +556,24 @@ void mp_emit_bc_load_null(emit_t *emit) { emit_write_bytecode_byte(emit, MP_BC_LOAD_NULL); } -void mp_emit_bc_load_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { +void mp_emit_bc_load_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + MP_STATIC_ASSERT(MP_BC_LOAD_FAST_N + MP_EMIT_IDOP_LOCAL_FAST == MP_BC_LOAD_FAST_N); + MP_STATIC_ASSERT(MP_BC_LOAD_FAST_N + MP_EMIT_IDOP_LOCAL_DEREF == MP_BC_LOAD_DEREF); (void)qst; emit_bc_pre(emit, 1); - if (local_num <= 15) { + if (kind == MP_EMIT_IDOP_LOCAL_FAST && local_num <= 15) { emit_write_bytecode_byte(emit, MP_BC_LOAD_FAST_MULTI + local_num); } else { - emit_write_bytecode_byte_uint(emit, MP_BC_LOAD_FAST_N, local_num); - } -} - -void mp_emit_bc_load_deref(emit_t *emit, qstr qst, mp_uint_t local_num) { - (void)qst; - emit_bc_pre(emit, 1); - emit_write_bytecode_byte_uint(emit, MP_BC_LOAD_DEREF, local_num); -} - -void mp_emit_bc_load_name(emit_t *emit, qstr qst) { - (void)qst; - emit_bc_pre(emit, 1); - emit_write_bytecode_byte_qstr(emit, MP_BC_LOAD_NAME, qst); - if (MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE_DYNAMIC) { - emit_write_bytecode_byte(emit, 0); + emit_write_bytecode_byte_uint(emit, MP_BC_LOAD_FAST_N + kind, local_num); } } -void mp_emit_bc_load_global(emit_t *emit, qstr qst) { +void mp_emit_bc_load_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_BC_LOAD_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_BC_LOAD_NAME); + MP_STATIC_ASSERT(MP_BC_LOAD_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_BC_LOAD_GLOBAL); (void)qst; emit_bc_pre(emit, 1); - emit_write_bytecode_byte_qstr(emit, MP_BC_LOAD_GLOBAL, qst); - if (MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE_DYNAMIC) { - emit_write_bytecode_byte(emit, 0); - } -} - -void mp_emit_bc_load_attr(emit_t *emit, qstr qst) { - emit_bc_pre(emit, 0); - emit_write_bytecode_byte_qstr(emit, MP_BC_LOAD_ATTR, qst); + emit_write_bytecode_byte_qstr(emit, MP_BC_LOAD_NAME + kind, qst); if (MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE_DYNAMIC) { emit_write_bytecode_byte(emit, 0); } @@ -604,80 +589,68 @@ void mp_emit_bc_load_build_class(emit_t *emit) { emit_write_bytecode_byte(emit, MP_BC_LOAD_BUILD_CLASS); } -void mp_emit_bc_load_subscr(emit_t *emit) { - emit_bc_pre(emit, -1); - emit_write_bytecode_byte(emit, MP_BC_LOAD_SUBSCR); -} - -void mp_emit_bc_store_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { - (void)qst; - emit_bc_pre(emit, -1); - if (local_num <= 15) { - emit_write_bytecode_byte(emit, MP_BC_STORE_FAST_MULTI + local_num); +void mp_emit_bc_subscr(emit_t *emit, int kind) { + if (kind == MP_EMIT_SUBSCR_LOAD) { + emit_bc_pre(emit, -1); + emit_write_bytecode_byte(emit, MP_BC_LOAD_SUBSCR); } else { - emit_write_bytecode_byte_uint(emit, MP_BC_STORE_FAST_N, local_num); + if (kind == MP_EMIT_SUBSCR_DELETE) { + mp_emit_bc_load_null(emit); + mp_emit_bc_rot_three(emit); + } + emit_bc_pre(emit, -3); + emit_write_bytecode_byte(emit, MP_BC_STORE_SUBSCR); } } -void mp_emit_bc_store_deref(emit_t *emit, qstr qst, mp_uint_t local_num) { - (void)qst; - emit_bc_pre(emit, -1); - emit_write_bytecode_byte_uint(emit, MP_BC_STORE_DEREF, local_num); -} - -void mp_emit_bc_store_name(emit_t *emit, qstr qst) { - emit_bc_pre(emit, -1); - emit_write_bytecode_byte_qstr(emit, MP_BC_STORE_NAME, qst); -} - -void mp_emit_bc_store_global(emit_t *emit, qstr qst) { - emit_bc_pre(emit, -1); - emit_write_bytecode_byte_qstr(emit, MP_BC_STORE_GLOBAL, qst); -} - -void mp_emit_bc_store_attr(emit_t *emit, qstr qst) { - emit_bc_pre(emit, -2); - emit_write_bytecode_byte_qstr(emit, MP_BC_STORE_ATTR, qst); +void mp_emit_bc_attr(emit_t *emit, qstr qst, int kind) { + if (kind == MP_EMIT_ATTR_LOAD) { + emit_bc_pre(emit, 0); + emit_write_bytecode_byte_qstr(emit, MP_BC_LOAD_ATTR, qst); + } else { + if (kind == MP_EMIT_ATTR_DELETE) { + mp_emit_bc_load_null(emit); + mp_emit_bc_rot_two(emit); + } + emit_bc_pre(emit, -2); + emit_write_bytecode_byte_qstr(emit, MP_BC_STORE_ATTR, qst); + } if (MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE_DYNAMIC) { emit_write_bytecode_byte(emit, 0); } } -void mp_emit_bc_store_subscr(emit_t *emit) { - emit_bc_pre(emit, -3); - emit_write_bytecode_byte(emit, MP_BC_STORE_SUBSCR); -} - -void mp_emit_bc_delete_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { +void mp_emit_bc_store_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + MP_STATIC_ASSERT(MP_BC_STORE_FAST_N + MP_EMIT_IDOP_LOCAL_FAST == MP_BC_STORE_FAST_N); + MP_STATIC_ASSERT(MP_BC_STORE_FAST_N + MP_EMIT_IDOP_LOCAL_DEREF == MP_BC_STORE_DEREF); (void)qst; - emit_write_bytecode_byte_uint(emit, MP_BC_DELETE_FAST, local_num); + emit_bc_pre(emit, -1); + if (kind == MP_EMIT_IDOP_LOCAL_FAST && local_num <= 15) { + emit_write_bytecode_byte(emit, MP_BC_STORE_FAST_MULTI + local_num); + } else { + emit_write_bytecode_byte_uint(emit, MP_BC_STORE_FAST_N + kind, local_num); + } } -void mp_emit_bc_delete_deref(emit_t *emit, qstr qst, mp_uint_t local_num) { - (void)qst; - emit_write_bytecode_byte_uint(emit, MP_BC_DELETE_DEREF, local_num); +void mp_emit_bc_store_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_BC_STORE_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_BC_STORE_NAME); + MP_STATIC_ASSERT(MP_BC_STORE_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_BC_STORE_GLOBAL); + emit_bc_pre(emit, -1); + emit_write_bytecode_byte_qstr(emit, MP_BC_STORE_NAME + kind, qst); } -void mp_emit_bc_delete_name(emit_t *emit, qstr qst) { - emit_bc_pre(emit, 0); - emit_write_bytecode_byte_qstr(emit, MP_BC_DELETE_NAME, qst); +void mp_emit_bc_delete_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + MP_STATIC_ASSERT(MP_BC_DELETE_FAST + MP_EMIT_IDOP_LOCAL_FAST == MP_BC_DELETE_FAST); + MP_STATIC_ASSERT(MP_BC_DELETE_FAST + MP_EMIT_IDOP_LOCAL_DEREF == MP_BC_DELETE_DEREF); + (void)qst; + emit_write_bytecode_byte_uint(emit, MP_BC_DELETE_FAST + kind, local_num); } -void mp_emit_bc_delete_global(emit_t *emit, qstr qst) { +void mp_emit_bc_delete_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_BC_DELETE_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_BC_DELETE_NAME); + MP_STATIC_ASSERT(MP_BC_DELETE_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_BC_DELETE_GLOBAL); emit_bc_pre(emit, 0); - emit_write_bytecode_byte_qstr(emit, MP_BC_DELETE_GLOBAL, qst); -} - -void mp_emit_bc_delete_attr(emit_t *emit, qstr qst) { - mp_emit_bc_load_null(emit); - mp_emit_bc_rot_two(emit); - mp_emit_bc_store_attr(emit, qst); -} - -void mp_emit_bc_delete_subscr(emit_t *emit) { - mp_emit_bc_load_null(emit); - mp_emit_bc_rot_three(emit); - mp_emit_bc_store_subscr(emit); + emit_write_bytecode_byte_qstr(emit, MP_BC_DELETE_NAME + kind, qst); } void mp_emit_bc_dup_top(emit_t *emit) { @@ -746,11 +719,18 @@ void mp_emit_bc_unwind_jump(emit_t *emit, mp_uint_t label, mp_uint_t except_dept } } -void mp_emit_bc_setup_with(emit_t *emit, mp_uint_t label) { +void mp_emit_bc_setup_block(emit_t *emit, mp_uint_t label, int kind) { + MP_STATIC_ASSERT(MP_BC_SETUP_WITH + MP_EMIT_SETUP_BLOCK_WITH == MP_BC_SETUP_WITH); + MP_STATIC_ASSERT(MP_BC_SETUP_WITH + MP_EMIT_SETUP_BLOCK_EXCEPT == MP_BC_SETUP_EXCEPT); + MP_STATIC_ASSERT(MP_BC_SETUP_WITH + MP_EMIT_SETUP_BLOCK_FINALLY == MP_BC_SETUP_FINALLY); + if (kind == MP_EMIT_SETUP_BLOCK_WITH) { // The SETUP_WITH opcode pops ctx_mgr from the top of the stack // and then pushes 3 entries: __exit__, ctx_mgr, as_value. - emit_bc_pre(emit, 2); - emit_write_bytecode_byte_unsigned_label(emit, MP_BC_SETUP_WITH, label); + emit_bc_pre(emit, 2); + } else { + emit_bc_pre(emit, 0); + } + emit_write_bytecode_byte_unsigned_label(emit, MP_BC_SETUP_WITH + kind, label); } void mp_emit_bc_with_cleanup(emit_t *emit, mp_uint_t label) { @@ -759,17 +739,7 @@ void mp_emit_bc_with_cleanup(emit_t *emit, mp_uint_t label) { mp_emit_bc_label_assign(emit, label); emit_bc_pre(emit, 2); // ensure we have enough stack space to call the __exit__ method emit_write_bytecode_byte(emit, MP_BC_WITH_CLEANUP); - emit_bc_pre(emit, -4); // cancel the 2 above, plus the 2 from mp_emit_bc_setup_with -} - -void mp_emit_bc_setup_except(emit_t *emit, mp_uint_t label) { - emit_bc_pre(emit, 0); - emit_write_bytecode_byte_unsigned_label(emit, MP_BC_SETUP_EXCEPT, label); -} - -void mp_emit_bc_setup_finally(emit_t *emit, mp_uint_t label) { - emit_bc_pre(emit, 0); - emit_write_bytecode_byte_unsigned_label(emit, MP_BC_SETUP_FINALLY, label); + emit_bc_pre(emit, -4); // cancel the 2 above, plus the 2 from mp_emit_bc_setup_block(MP_EMIT_SETUP_BLOCK_WITH) } void mp_emit_bc_end_finally(emit_t *emit) { @@ -823,19 +793,18 @@ void mp_emit_bc_binary_op(emit_t *emit, mp_binary_op_t op) { } } -void mp_emit_bc_build_tuple(emit_t *emit, mp_uint_t n_args) { - emit_bc_pre(emit, 1 - n_args); - emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_TUPLE, n_args); -} - -void mp_emit_bc_build_list(emit_t *emit, mp_uint_t n_args) { - emit_bc_pre(emit, 1 - n_args); - emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_LIST, n_args); -} - -void mp_emit_bc_build_map(emit_t *emit, mp_uint_t n_args) { - emit_bc_pre(emit, 1); - emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_MAP, n_args); +void mp_emit_bc_build(emit_t *emit, mp_uint_t n_args, int kind) { + MP_STATIC_ASSERT(MP_BC_BUILD_TUPLE + MP_EMIT_BUILD_TUPLE == MP_BC_BUILD_TUPLE); + MP_STATIC_ASSERT(MP_BC_BUILD_TUPLE + MP_EMIT_BUILD_LIST == MP_BC_BUILD_LIST); + MP_STATIC_ASSERT(MP_BC_BUILD_TUPLE + MP_EMIT_BUILD_MAP == MP_BC_BUILD_MAP); + MP_STATIC_ASSERT(MP_BC_BUILD_TUPLE + MP_EMIT_BUILD_SET == MP_BC_BUILD_SET); + MP_STATIC_ASSERT(MP_BC_BUILD_TUPLE + MP_EMIT_BUILD_SLICE == MP_BC_BUILD_SLICE); + if (kind == MP_EMIT_BUILD_MAP) { + emit_bc_pre(emit, 1); + } else { + emit_bc_pre(emit, 1 - n_args); + } + emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_TUPLE + kind, n_args); } void mp_emit_bc_store_map(emit_t *emit) { @@ -843,20 +812,6 @@ void mp_emit_bc_store_map(emit_t *emit) { emit_write_bytecode_byte(emit, MP_BC_STORE_MAP); } -#if MICROPY_PY_BUILTINS_SET -void mp_emit_bc_build_set(emit_t *emit, mp_uint_t n_args) { - emit_bc_pre(emit, 1 - n_args); - emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_SET, n_args); -} -#endif - -#if MICROPY_PY_BUILTINS_SLICE -void mp_emit_bc_build_slice(emit_t *emit, mp_uint_t n_args) { - emit_bc_pre(emit, 1 - n_args); - emit_write_bytecode_byte_uint(emit, MP_BC_BUILD_SLICE, n_args); -} -#endif - void mp_emit_bc_store_comp(emit_t *emit, scope_kind_t kind, mp_uint_t collection_stack_index) { int t; int n; @@ -938,16 +893,11 @@ void mp_emit_bc_raise_varargs(emit_t *emit, mp_uint_t n_args) { emit_write_bytecode_byte_byte(emit, MP_BC_RAISE_VARARGS, n_args); } -void mp_emit_bc_yield_value(emit_t *emit) { - emit_bc_pre(emit, 0); - emit->scope->scope_flags |= MP_SCOPE_FLAG_GENERATOR; - emit_write_bytecode_byte(emit, MP_BC_YIELD_VALUE); -} - -void mp_emit_bc_yield_from(emit_t *emit) { - emit_bc_pre(emit, -1); +void mp_emit_bc_yield(emit_t *emit, int kind) { + MP_STATIC_ASSERT(MP_BC_YIELD_VALUE + 1 == MP_BC_YIELD_FROM); + emit_bc_pre(emit, -kind); emit->scope->scope_flags |= MP_SCOPE_FLAG_GENERATOR; - emit_write_bytecode_byte(emit, MP_BC_YIELD_FROM); + emit_write_bytecode_byte(emit, MP_BC_YIELD_VALUE + kind); } void mp_emit_bc_start_except_handler(emit_t *emit) { @@ -968,41 +918,29 @@ const emit_method_table_t emit_bc_method_table = { mp_emit_bc_set_source_line, { - mp_emit_bc_load_fast, - mp_emit_bc_load_deref, - mp_emit_bc_load_name, + mp_emit_bc_load_local, mp_emit_bc_load_global, }, { - mp_emit_bc_store_fast, - mp_emit_bc_store_deref, - mp_emit_bc_store_name, + mp_emit_bc_store_local, mp_emit_bc_store_global, }, { - mp_emit_bc_delete_fast, - mp_emit_bc_delete_deref, - mp_emit_bc_delete_name, + mp_emit_bc_delete_local, mp_emit_bc_delete_global, }, mp_emit_bc_label_assign, - mp_emit_bc_import_name, - mp_emit_bc_import_from, - mp_emit_bc_import_star, + mp_emit_bc_import, mp_emit_bc_load_const_tok, mp_emit_bc_load_const_small_int, mp_emit_bc_load_const_str, mp_emit_bc_load_const_obj, mp_emit_bc_load_null, - mp_emit_bc_load_attr, mp_emit_bc_load_method, mp_emit_bc_load_build_class, - mp_emit_bc_load_subscr, - mp_emit_bc_store_attr, - mp_emit_bc_store_subscr, - mp_emit_bc_delete_attr, - mp_emit_bc_delete_subscr, + mp_emit_bc_subscr, + mp_emit_bc_attr, mp_emit_bc_dup_top, mp_emit_bc_dup_top_two, mp_emit_bc_pop_top, @@ -1012,11 +950,8 @@ const emit_method_table_t emit_bc_method_table = { mp_emit_bc_pop_jump_if, mp_emit_bc_jump_if_or_pop, mp_emit_bc_unwind_jump, - mp_emit_bc_unwind_jump, - mp_emit_bc_setup_with, + mp_emit_bc_setup_block, mp_emit_bc_with_cleanup, - mp_emit_bc_setup_except, - mp_emit_bc_setup_finally, mp_emit_bc_end_finally, mp_emit_bc_get_iter, mp_emit_bc_for_iter, @@ -1025,16 +960,8 @@ const emit_method_table_t emit_bc_method_table = { mp_emit_bc_pop_except, mp_emit_bc_unary_op, mp_emit_bc_binary_op, - mp_emit_bc_build_tuple, - mp_emit_bc_build_list, - mp_emit_bc_build_map, + mp_emit_bc_build, mp_emit_bc_store_map, - #if MICROPY_PY_BUILTINS_SET - mp_emit_bc_build_set, - #endif - #if MICROPY_PY_BUILTINS_SLICE - mp_emit_bc_build_slice, - #endif mp_emit_bc_store_comp, mp_emit_bc_unpack_sequence, mp_emit_bc_unpack_ex, @@ -1044,31 +971,24 @@ const emit_method_table_t emit_bc_method_table = { mp_emit_bc_call_method, mp_emit_bc_return_value, mp_emit_bc_raise_varargs, - mp_emit_bc_yield_value, - mp_emit_bc_yield_from, + mp_emit_bc_yield, mp_emit_bc_start_except_handler, mp_emit_bc_end_except_handler, }; #else const mp_emit_method_table_id_ops_t mp_emit_bc_method_table_load_id_ops = { - mp_emit_bc_load_fast, - mp_emit_bc_load_deref, - mp_emit_bc_load_name, + mp_emit_bc_load_local, mp_emit_bc_load_global, }; const mp_emit_method_table_id_ops_t mp_emit_bc_method_table_store_id_ops = { - mp_emit_bc_store_fast, - mp_emit_bc_store_deref, - mp_emit_bc_store_name, + mp_emit_bc_store_local, mp_emit_bc_store_global, }; const mp_emit_method_table_id_ops_t mp_emit_bc_method_table_delete_id_ops = { - mp_emit_bc_delete_fast, - mp_emit_bc_delete_deref, - mp_emit_bc_delete_name, + mp_emit_bc_delete_local, mp_emit_bc_delete_global, }; #endif diff --git a/py/emitcommon.c b/py/emitcommon.c index 07b1dbb4ce02f..89cc2c959790e 100644 --- a/py/emitcommon.c +++ b/py/emitcommon.c @@ -63,14 +63,14 @@ void mp_emit_common_id_op(emit_t *emit, const mp_emit_method_table_id_ops_t *emi // call the emit backend with the correct code if (id->kind == ID_INFO_KIND_GLOBAL_IMPLICIT) { - emit_method_table->name(emit, qst); + emit_method_table->global(emit, qst, MP_EMIT_IDOP_GLOBAL_NAME); } else if (id->kind == ID_INFO_KIND_GLOBAL_EXPLICIT) { - emit_method_table->global(emit, qst); + emit_method_table->global(emit, qst, MP_EMIT_IDOP_GLOBAL_GLOBAL); } else if (id->kind == ID_INFO_KIND_LOCAL) { - emit_method_table->fast(emit, qst, id->local_num); + emit_method_table->local(emit, qst, id->local_num, MP_EMIT_IDOP_LOCAL_FAST); } else { assert(id->kind == ID_INFO_KIND_CELL || id->kind == ID_INFO_KIND_FREE); - emit_method_table->deref(emit, qst, id->local_num); + emit_method_table->local(emit, qst, id->local_num, MP_EMIT_IDOP_LOCAL_DEREF); } } diff --git a/py/emitglue.c b/py/emitglue.c index d2add988f22ab..7708689dd4599 100644 --- a/py/emitglue.c +++ b/py/emitglue.c @@ -55,7 +55,10 @@ mp_raw_code_t *mp_emit_glue_new_raw_code(void) { return rc; } -void mp_emit_glue_assign_bytecode(mp_raw_code_t *rc, const byte *code, mp_uint_t len, +void mp_emit_glue_assign_bytecode(mp_raw_code_t *rc, const byte *code, + #if MICROPY_PERSISTENT_CODE_SAVE || MICROPY_DEBUG_PRINTERS + size_t len, + #endif const mp_uint_t *const_table, #if MICROPY_PERSISTENT_CODE_SAVE uint16_t n_obj, uint16_t n_raw_code, @@ -139,11 +142,12 @@ mp_obj_t mp_make_function_from_raw_code(const mp_raw_code_t *rc, mp_obj_t def_ar fun = mp_obj_new_fun_asm(rc->n_pos_args, rc->data.u_native.fun_data, rc->data.u_native.type_sig); break; #endif - default: - // rc->kind should always be set and BYTECODE is the only remaining case - assert(rc->kind == MP_CODE_BYTECODE); + case MP_CODE_BYTECODE: fun = mp_obj_new_fun_bc(def_args, def_kw_args, rc->data.u_byte.bytecode, rc->data.u_byte.const_table); break; + default: + // All other kinds are invalid. + mp_raise_RuntimeError(translate("Corrupt raw code")); } // check for generator functions and if so wrap in generator object diff --git a/py/emitglue.h b/py/emitglue.h index 43930333d64ac..0830a0d5c8dc2 100644 --- a/py/emitglue.h +++ b/py/emitglue.h @@ -40,7 +40,7 @@ typedef enum { } mp_raw_code_kind_t; typedef struct _mp_raw_code_t { - mp_raw_code_kind_t kind : 3; + mp_uint_t kind : 3; // of type mp_raw_code_kind_t mp_uint_t scope_flags : 7; mp_uint_t n_pos_args : 11; union { @@ -63,7 +63,10 @@ typedef struct _mp_raw_code_t { mp_raw_code_t *mp_emit_glue_new_raw_code(void); -void mp_emit_glue_assign_bytecode(mp_raw_code_t *rc, const byte *code, mp_uint_t len, +void mp_emit_glue_assign_bytecode(mp_raw_code_t *rc, const byte *code, + #if MICROPY_PERSISTENT_CODE_SAVE || MICROPY_DEBUG_PRINTERS + size_t len, + #endif const mp_uint_t *const_table, #if MICROPY_PERSISTENT_CODE_SAVE uint16_t n_obj, uint16_t n_raw_code, diff --git a/py/emitinlinethumb.c b/py/emitinlinethumb.c index 577f65672077e..7f0ec66590d86 100644 --- a/py/emitinlinethumb.c +++ b/py/emitinlinethumb.c @@ -59,7 +59,7 @@ struct _emit_inline_asm_t { qstr *label_lookup; }; -STATIC void emit_inline_thumb_error_msg(emit_inline_asm_t *emit, const char *msg) { +STATIC void emit_inline_thumb_error_msg(emit_inline_asm_t *emit, const compressed_string_t *msg) { *emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg); } @@ -99,17 +99,17 @@ STATIC void emit_inline_thumb_end_pass(emit_inline_asm_t *emit, mp_uint_t type_s STATIC mp_uint_t emit_inline_thumb_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) { if (n_params > 4) { - emit_inline_thumb_error_msg(emit, "can only have up to 4 parameters to Thumb assembly"); + emit_inline_thumb_error_msg(emit, translate("can only have up to 4 parameters to Thumb assembly")); return 0; } for (mp_uint_t i = 0; i < n_params; i++) { if (!MP_PARSE_NODE_IS_ID(pn_params[i])) { - emit_inline_thumb_error_msg(emit, "parameters must be registers in sequence r0 to r3"); + emit_inline_thumb_error_msg(emit, translate("parameters must be registers in sequence r0 to r3")); return 0; } const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i])); if (!(strlen(p) == 2 && p[0] == 'r' && p[1] == '0' + i)) { - emit_inline_thumb_error_msg(emit, "parameters must be registers in sequence r0 to r3"); + emit_inline_thumb_error_msg(emit, translate("parameters must be registers in sequence r0 to r3")); return 0; } } @@ -185,7 +185,7 @@ STATIC mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_n if (r->reg > max_reg) { emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects at most r%d", op, max_reg)); + translate("'%s' expects at most r%d"), op, max_reg)); return 0; } else { return r->reg; @@ -194,7 +194,7 @@ STATIC mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_n } emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects a register", op)); + translate("'%s' expects a register"), op)); return 0; } @@ -208,7 +208,7 @@ STATIC mp_uint_t get_arg_special_reg(emit_inline_asm_t *emit, const char *op, mp } emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects a special register", op)); + translate("'%s' expects a special register"), op)); return 0; } @@ -227,7 +227,7 @@ STATIC mp_uint_t get_arg_vfpreg(emit_inline_asm_t *emit, const char *op, mp_pars if (regno > 31) { emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects at most r%d", op, 31)); + translate("'%s' expects at most r%d"), op, 31)); return 0; } else { return regno; @@ -236,7 +236,7 @@ STATIC mp_uint_t get_arg_vfpreg(emit_inline_asm_t *emit, const char *op, mp_pars malformed: emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects an FPU register", op)); + translate("'%s' expects an FPU register"), op)); return 0; } #endif @@ -289,19 +289,19 @@ STATIC mp_uint_t get_arg_reglist(emit_inline_asm_t *emit, const char *op, mp_par return reglist; bad_arg: - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects {r0, r1, ...}", op)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects {r0, r1, ...}"), op)); return 0; } STATIC uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, uint32_t fit_mask) { mp_obj_t o; if (!mp_parse_node_get_int_maybe(pn, &o)) { - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects an integer", op)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects an integer"), op)); return 0; } uint32_t i = mp_obj_get_int_truncated(o); if ((i & (~fit_mask)) != 0) { - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' integer 0x%x does not fit in mask 0x%x", op, i, fit_mask)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' integer 0x%x does not fit in mask 0x%x"), op, i, fit_mask)); return 0; } return i; @@ -325,13 +325,13 @@ STATIC bool get_arg_addr(emit_inline_asm_t *emit, const char *op, mp_parse_node_ return true; bad_arg: - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects an address of the form [a, b]", op)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects an address of the form [a, b]"), op)); return false; } STATIC int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) { if (!MP_PARSE_NODE_IS_ID(pn)) { - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects a label", op)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects a label"), op)); return 0; } qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn); @@ -342,7 +342,7 @@ STATIC int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_ } // only need to have the labels on the last pass if (emit->pass == MP_PASS_EMIT) { - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "label '%q' not defined", label_qstr)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("label '%q' not defined"), label_qstr)); } return 0; } @@ -803,11 +803,11 @@ STATIC void emit_inline_thumb_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_a return; unknown_op: - emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "unsupported Thumb instruction '%s' with %d arguments", op_str, n_args)); + emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("unsupported Thumb instruction '%s' with %d arguments"), op_str, n_args)); return; branch_not_in_range: - emit_inline_thumb_error_msg(emit, "branch not in range"); + emit_inline_thumb_error_msg(emit, translate("branch not in range")); return; } diff --git a/py/emitinlinextensa.c b/py/emitinlinextensa.c index 3d3217f5bb679..9cd65824beecd 100644 --- a/py/emitinlinextensa.c +++ b/py/emitinlinextensa.c @@ -43,7 +43,7 @@ struct _emit_inline_asm_t { qstr *label_lookup; }; -STATIC void emit_inline_xtensa_error_msg(emit_inline_asm_t *emit, const char *msg) { +STATIC void emit_inline_xtensa_error_msg(emit_inline_asm_t *emit, const compressed_string_t *msg) { *emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg); } @@ -83,17 +83,17 @@ STATIC void emit_inline_xtensa_end_pass(emit_inline_asm_t *emit, mp_uint_t type_ STATIC mp_uint_t emit_inline_xtensa_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) { if (n_params > 4) { - emit_inline_xtensa_error_msg(emit, "can only have up to 4 parameters to Xtensa assembly"); + emit_inline_xtensa_error_msg(emit, translate("can only have up to 4 parameters to Xtensa assembly")); return 0; } for (mp_uint_t i = 0; i < n_params; i++) { if (!MP_PARSE_NODE_IS_ID(pn_params[i])) { - emit_inline_xtensa_error_msg(emit, "parameters must be registers in sequence a2 to a5"); + emit_inline_xtensa_error_msg(emit, translate("parameters must be registers in sequence a2 to a5")); return 0; } const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i])); if (!(strlen(p) == 2 && p[0] == 'a' && p[1] == '2' + i)) { - emit_inline_xtensa_error_msg(emit, "parameters must be registers in sequence a2 to a5"); + emit_inline_xtensa_error_msg(emit, translate("parameters must be registers in sequence a2 to a5")); return 0; } } @@ -159,19 +159,19 @@ STATIC mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_n } emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, - "'%s' expects a register", op)); + translate("'%s' expects a register"), op)); return 0; } STATIC uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, int min, int max) { mp_obj_t o; if (!mp_parse_node_get_int_maybe(pn, &o)) { - emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects an integer", op)); + emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects an integer"), op)); return 0; } uint32_t i = mp_obj_get_int_truncated(o); if (min != max && ((int)i < min || (int)i > max)) { - emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' integer %d is not within range %d..%d", op, i, min, max)); + emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' integer %d is not within range %d..%d"), op, i, min, max)); return 0; } return i; @@ -179,7 +179,7 @@ STATIC uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node STATIC int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) { if (!MP_PARSE_NODE_IS_ID(pn)) { - emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "'%s' expects a label", op)); + emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("'%s' expects a label"), op)); return 0; } qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn); @@ -190,7 +190,7 @@ STATIC int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_ } // only need to have the labels on the last pass if (emit->pass == MP_PASS_EMIT) { - emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "label '%q' not defined", label_qstr)); + emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("label '%q' not defined"), label_qstr)); } return 0; } @@ -324,12 +324,12 @@ STATIC void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_ return; unknown_op: - emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, "unsupported Xtensa instruction '%s' with %d arguments", op_str, n_args)); + emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, translate("unsupported Xtensa instruction '%s' with %d arguments"), op_str, n_args)); return; /* branch_not_in_range: - emit_inline_xtensa_error_msg(emit, "branch not in range"); + emit_inline_xtensa_error_msg(emit, translate("branch not in range")); return; */ } diff --git a/py/emitnarm.c b/py/emitnarm.c new file mode 100644 index 0000000000000..1b585f821b4a6 --- /dev/null +++ b/py/emitnarm.c @@ -0,0 +1,15 @@ +// ARM specific stuff + +#include "py/mpconfig.h" + +#if MICROPY_EMIT_ARM + +// This is defined so that the assembler exports generic assembler API macros +#define GENERIC_ASM_API (1) +#include "py/asmarm.h" + +#define N_ARM (1) +#define EXPORT_FUN(name) emit_native_arm_##name +#include "py/emitnative.c" + +#endif diff --git a/py/emitnative.c b/py/emitnative.c index 8e97dda119eb5..60f31d15f574c 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -49,6 +49,8 @@ #include "py/emit.h" #include "py/bc.h" +#include "supervisor/shared/translate.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #define DEBUG_printf DEBUG_printf @@ -56,103 +58,31 @@ #define DEBUG_printf(...) (void)0 #endif -// wrapper around everything in this file -#if (MICROPY_EMIT_X64 && N_X64) \ - || (MICROPY_EMIT_X86 && N_X86) \ - || (MICROPY_EMIT_THUMB && N_THUMB) \ - || (MICROPY_EMIT_ARM && N_ARM) \ - || (MICROPY_EMIT_XTENSA && N_XTENSA) \ - -// this is defined so that the assembler exports generic assembler API macros -#define GENERIC_ASM_API (1) - -#if N_X64 - -// x64 specific stuff -#include "py/asmx64.h" -#define EXPORT_FUN(name) emit_native_x64_##name - -#elif N_X86 - -// x86 specific stuff - -STATIC byte mp_f_n_args[MP_F_NUMBER_OF] = { - [MP_F_CONVERT_OBJ_TO_NATIVE] = 2, - [MP_F_CONVERT_NATIVE_TO_OBJ] = 2, - [MP_F_LOAD_NAME] = 1, - [MP_F_LOAD_GLOBAL] = 1, - [MP_F_LOAD_BUILD_CLASS] = 0, - [MP_F_LOAD_ATTR] = 2, - [MP_F_LOAD_METHOD] = 3, - [MP_F_LOAD_SUPER_METHOD] = 2, - [MP_F_STORE_NAME] = 2, - [MP_F_STORE_GLOBAL] = 2, - [MP_F_STORE_ATTR] = 3, - [MP_F_OBJ_SUBSCR] = 3, - [MP_F_OBJ_IS_TRUE] = 1, - [MP_F_UNARY_OP] = 2, - [MP_F_BINARY_OP] = 3, - [MP_F_BUILD_TUPLE] = 2, - [MP_F_BUILD_LIST] = 2, - [MP_F_LIST_APPEND] = 2, - [MP_F_BUILD_MAP] = 1, - [MP_F_STORE_MAP] = 3, -#if MICROPY_PY_BUILTINS_SET - [MP_F_BUILD_SET] = 2, - [MP_F_STORE_SET] = 2, +#ifndef N_X64 + #define N_X64 (0) #endif - [MP_F_MAKE_FUNCTION_FROM_RAW_CODE] = 3, - [MP_F_NATIVE_CALL_FUNCTION_N_KW] = 3, - [MP_F_CALL_METHOD_N_KW] = 3, - [MP_F_CALL_METHOD_N_KW_VAR] = 3, - [MP_F_NATIVE_GETITER] = 2, - [MP_F_NATIVE_ITERNEXT] = 1, - [MP_F_NLR_PUSH] = 1, - [MP_F_NLR_POP] = 0, - [MP_F_NATIVE_RAISE] = 1, - [MP_F_IMPORT_NAME] = 3, - [MP_F_IMPORT_FROM] = 2, - [MP_F_IMPORT_ALL] = 1, -#if MICROPY_PY_BUILTINS_SLICE - [MP_F_NEW_SLICE] = 3, +#ifndef N_X86 + #define N_X86 (0) +#endif +#ifndef N_THUMB + #define N_THUMB (0) +#endif +#ifndef N_ARM + #define N_ARM (0) +#endif +#ifndef N_XTENSA + #define N_XTENSA (0) #endif - [MP_F_UNPACK_SEQUENCE] = 3, - [MP_F_UNPACK_EX] = 3, - [MP_F_DELETE_NAME] = 1, - [MP_F_DELETE_GLOBAL] = 1, - [MP_F_NEW_CELL] = 1, - [MP_F_MAKE_CLOSURE_FROM_RAW_CODE] = 3, - [MP_F_SETUP_CODE_STATE] = 5, - [MP_F_SMALL_INT_FLOOR_DIVIDE] = 2, - [MP_F_SMALL_INT_MODULO] = 2, -}; - -#include "py/asmx86.h" -#define EXPORT_FUN(name) emit_native_x86_##name - -#elif N_THUMB - -// thumb specific stuff -#include "py/asmthumb.h" -#define EXPORT_FUN(name) emit_native_thumb_##name - -#elif N_ARM - -// ARM specific stuff -#include "py/asmarm.h" -#define EXPORT_FUN(name) emit_native_arm_##name - -#elif N_XTENSA - -// Xtensa specific stuff -#include "py/asmxtensa.h" -#define EXPORT_FUN(name) emit_native_xtensa_##name - -#else -#error unknown native emitter +// wrapper around everything in this file +#if N_X64 || N_X86 || N_THUMB || N_ARM || N_XTENSA -#endif +// define additional generic helper macros +#define ASM_MOV_LOCAL_IMM_VIA(as, local_num, imm, reg_temp) \ + do { \ + ASM_MOV_REG_IMM((as), (reg_temp), (imm)); \ + ASM_MOV_LOCAL_REG((as), (local_num), (reg_temp)); \ + } while (false) #define EMIT_NATIVE_VIPER_TYPE_ERROR(emit, ...) do { \ *emit->error_slot = mp_obj_new_exception_msg_varg(&mp_type_ViperTypeError, __VA_ARGS__); \ @@ -266,7 +196,7 @@ STATIC void emit_native_set_native_type(emit_t *emit, mp_uint_t op, mp_uint_t ar case MP_QSTR_ptr8: type = VTYPE_PTR8; break; case MP_QSTR_ptr16: type = VTYPE_PTR16; break; case MP_QSTR_ptr32: type = VTYPE_PTR32; break; - default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, "unknown type '%q'", arg2); return; + default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, translate("unknown type '%q'"), arg2); return; } if (op == MP_EMIT_NATIVE_TYPE_RETURN) { emit->return_vtype = type; @@ -343,7 +273,7 @@ STATIC void emit_native_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scop // right now we have a restriction of maximum of 4 arguments if (scope->num_pos_args >= 5) { - EMIT_NATIVE_VIPER_TYPE_ERROR(emit, "Viper functions don't currently support more than 4 arguments"); + EMIT_NATIVE_VIPER_TYPE_ERROR(emit, translate("Viper functions don't currently support more than 4 arguments")); return; } @@ -389,7 +319,7 @@ STATIC void emit_native_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scop ASM_MOV_REG_REG(emit->as, REG_LOCAL_3, REG_ARG_3); } else { assert(i == 3); // should be true; max 4 args is checked above - ASM_MOV_REG_TO_LOCAL(emit->as, REG_ARG_4, i - REG_LOCAL_NUM); + ASM_MOV_LOCAL_REG(emit->as, i - REG_LOCAL_NUM, REG_ARG_4); } } #endif @@ -418,14 +348,14 @@ STATIC void emit_native_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scop #endif // set code_state.fun_bc - ASM_MOV_REG_TO_LOCAL(emit->as, REG_ARG_1, offsetof(mp_code_state_t, fun_bc) / sizeof(uintptr_t)); + ASM_MOV_LOCAL_REG(emit->as, offsetof(mp_code_state_t, fun_bc) / sizeof(uintptr_t), REG_ARG_1); // set code_state.ip (offset from start of this function to prelude info) // XXX this encoding may change size - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, emit->prelude_offset, offsetof(mp_code_state_t, ip) / sizeof(uintptr_t), REG_ARG_1); + ASM_MOV_LOCAL_IMM_VIA(emit->as, offsetof(mp_code_state_t, ip) / sizeof(uintptr_t), emit->prelude_offset, REG_ARG_1); // put address of code_state into first arg - ASM_MOV_LOCAL_ADDR_TO_REG(emit->as, 0, REG_ARG_1); + ASM_MOV_REG_LOCAL_ADDR(emit->as, REG_ARG_1, 0); // call mp_setup_code_state to prepare code_state structure #if N_THUMB @@ -438,11 +368,11 @@ STATIC void emit_native_start_pass(emit_t *emit, pass_kind_t pass, scope_t *scop // cache some locals in registers if (scope->num_locals > 0) { - ASM_MOV_LOCAL_TO_REG(emit->as, STATE_START + emit->n_state - 1 - 0, REG_LOCAL_1); + ASM_MOV_REG_LOCAL(emit->as, REG_LOCAL_1, STATE_START + emit->n_state - 1 - 0); if (scope->num_locals > 1) { - ASM_MOV_LOCAL_TO_REG(emit->as, STATE_START + emit->n_state - 1 - 1, REG_LOCAL_2); + ASM_MOV_REG_LOCAL(emit->as, REG_LOCAL_2, STATE_START + emit->n_state - 1 - 1); if (scope->num_locals > 2) { - ASM_MOV_LOCAL_TO_REG(emit->as, STATE_START + emit->n_state - 1 - 2, REG_LOCAL_3); + ASM_MOV_REG_LOCAL(emit->as, REG_LOCAL_3, STATE_START + emit->n_state - 1 - 2); } } } @@ -529,10 +459,13 @@ STATIC void emit_native_end_pass(emit_t *emit) { type_sig |= (emit->local_vtype[i] & 0xf) << (i * 4 + 4); } + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" mp_emit_glue_assign_native(emit->scope->raw_code, emit->do_viper_types ? MP_CODE_NATIVE_VIPER : MP_CODE_NATIVE_PY, f, f_len, (mp_uint_t*)((byte*)f + emit->const_table_offset), emit->scope->num_pos_args, emit->scope->scope_flags, type_sig); + #pragma GCC diagnostic pop } } @@ -606,7 +539,7 @@ STATIC void need_reg_single(emit_t *emit, int reg_needed, int skip_stack_pos) { stack_info_t *si = &emit->stack_info[i]; if (si->kind == STACK_REG && si->data.u_reg == reg_needed) { si->kind = STACK_VALUE; - ASM_MOV_REG_TO_LOCAL(emit->as, si->data.u_reg, emit->stack_start + i); + ASM_MOV_LOCAL_REG(emit->as, emit->stack_start + i, si->data.u_reg); } } } @@ -617,7 +550,7 @@ STATIC void need_reg_all(emit_t *emit) { stack_info_t *si = &emit->stack_info[i]; if (si->kind == STACK_REG) { si->kind = STACK_VALUE; - ASM_MOV_REG_TO_LOCAL(emit->as, si->data.u_reg, emit->stack_start + i); + ASM_MOV_LOCAL_REG(emit->as, emit->stack_start + i, si->data.u_reg); } } } @@ -629,7 +562,7 @@ STATIC void need_stack_settled(emit_t *emit) { if (si->kind == STACK_REG) { DEBUG_printf(" reg(%u) to local(%u)\n", si->data.u_reg, emit->stack_start + i); si->kind = STACK_VALUE; - ASM_MOV_REG_TO_LOCAL(emit->as, si->data.u_reg, emit->stack_start + i); + ASM_MOV_LOCAL_REG(emit->as, emit->stack_start + i, si->data.u_reg); } } for (int i = 0; i < emit->stack_size; i++) { @@ -637,7 +570,7 @@ STATIC void need_stack_settled(emit_t *emit) { if (si->kind == STACK_IMM) { DEBUG_printf(" imm(" INT_FMT ") to local(%u)\n", si->data.u_imm, emit->stack_start + i); si->kind = STACK_VALUE; - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, si->data.u_imm, emit->stack_start + i, REG_TEMP0); + ASM_MOV_LOCAL_IMM_VIA(emit->as, emit->stack_start + i, si->data.u_imm, REG_TEMP0); } } } @@ -649,7 +582,7 @@ STATIC void emit_access_stack(emit_t *emit, int pos, vtype_kind_t *vtype, int re *vtype = si->vtype; switch (si->kind) { case STACK_VALUE: - ASM_MOV_LOCAL_TO_REG(emit->as, emit->stack_start + emit->stack_size - pos, reg_dest); + ASM_MOV_REG_LOCAL(emit->as, reg_dest, emit->stack_start + emit->stack_size - pos); break; case STACK_REG: @@ -659,7 +592,7 @@ STATIC void emit_access_stack(emit_t *emit, int pos, vtype_kind_t *vtype, int re break; case STACK_IMM: - ASM_MOV_IMM_TO_REG(emit->as, si->data.u_imm, reg_dest); + ASM_MOV_REG_IMM(emit->as, reg_dest, si->data.u_imm); break; } } @@ -671,7 +604,7 @@ STATIC void emit_fold_stack_top(emit_t *emit, int reg_dest) { si[0] = si[1]; if (si->kind == STACK_VALUE) { // if folded element was on the stack we need to put it in a register - ASM_MOV_LOCAL_TO_REG(emit->as, emit->stack_start + emit->stack_size - 1, reg_dest); + ASM_MOV_REG_LOCAL(emit->as, reg_dest, emit->stack_start + emit->stack_size - 1); si->kind = STACK_REG; si->data.u_reg = reg_dest; } @@ -765,30 +698,30 @@ STATIC void emit_call(emit_t *emit, mp_fun_kind_t fun_kind) { STATIC void emit_call_with_imm_arg(emit_t *emit, mp_fun_kind_t fun_kind, mp_int_t arg_val, int arg_reg) { need_reg_all(emit); - ASM_MOV_IMM_TO_REG(emit->as, arg_val, arg_reg); + ASM_MOV_REG_IMM(emit->as, arg_reg, arg_val); ASM_CALL_IND(emit->as, mp_fun_table[fun_kind], fun_kind); } // the first arg is stored in the code aligned on a mp_uint_t boundary STATIC void emit_call_with_imm_arg_aligned(emit_t *emit, mp_fun_kind_t fun_kind, mp_int_t arg_val, int arg_reg) { need_reg_all(emit); - ASM_MOV_ALIGNED_IMM_TO_REG(emit->as, arg_val, arg_reg); + ASM_MOV_REG_ALIGNED_IMM(emit->as, arg_reg, arg_val); ASM_CALL_IND(emit->as, mp_fun_table[fun_kind], fun_kind); } STATIC void emit_call_with_2_imm_args(emit_t *emit, mp_fun_kind_t fun_kind, mp_int_t arg_val1, int arg_reg1, mp_int_t arg_val2, int arg_reg2) { need_reg_all(emit); - ASM_MOV_IMM_TO_REG(emit->as, arg_val1, arg_reg1); - ASM_MOV_IMM_TO_REG(emit->as, arg_val2, arg_reg2); + ASM_MOV_REG_IMM(emit->as, arg_reg1, arg_val1); + ASM_MOV_REG_IMM(emit->as, arg_reg2, arg_val2); ASM_CALL_IND(emit->as, mp_fun_table[fun_kind], fun_kind); } // the first arg is stored in the code aligned on a mp_uint_t boundary STATIC void emit_call_with_3_imm_args_and_first_aligned(emit_t *emit, mp_fun_kind_t fun_kind, mp_int_t arg_val1, int arg_reg1, mp_int_t arg_val2, int arg_reg2, mp_int_t arg_val3, int arg_reg3) { need_reg_all(emit); - ASM_MOV_ALIGNED_IMM_TO_REG(emit->as, arg_val1, arg_reg1); - ASM_MOV_IMM_TO_REG(emit->as, arg_val2, arg_reg2); - ASM_MOV_IMM_TO_REG(emit->as, arg_val3, arg_reg3); + ASM_MOV_REG_ALIGNED_IMM(emit->as, arg_reg1, arg_val1); + ASM_MOV_REG_IMM(emit->as, arg_reg2, arg_val2); + ASM_MOV_REG_IMM(emit->as, arg_reg3, arg_val3); ASM_CALL_IND(emit->as, mp_fun_table[fun_kind], fun_kind); } @@ -808,24 +741,24 @@ STATIC void emit_get_stack_pointer_to_reg_for_pop(emit_t *emit, mp_uint_t reg_de si->kind = STACK_VALUE; switch (si->vtype) { case VTYPE_PYOBJ: - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, si->data.u_imm, emit->stack_start + emit->stack_size - 1 - i, reg_dest); + ASM_MOV_LOCAL_IMM_VIA(emit->as, emit->stack_start + emit->stack_size - 1 - i, si->data.u_imm, reg_dest); break; case VTYPE_BOOL: if (si->data.u_imm == 0) { - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, (mp_uint_t)mp_const_false, emit->stack_start + emit->stack_size - 1 - i, reg_dest); + ASM_MOV_LOCAL_IMM_VIA(emit->as, emit->stack_start + emit->stack_size - 1 - i, (mp_uint_t)mp_const_false, reg_dest); } else { - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, (mp_uint_t)mp_const_true, emit->stack_start + emit->stack_size - 1 - i, reg_dest); + ASM_MOV_LOCAL_IMM_VIA(emit->as, emit->stack_start + emit->stack_size - 1 - i, (mp_uint_t)mp_const_true, reg_dest); } si->vtype = VTYPE_PYOBJ; break; case VTYPE_INT: case VTYPE_UINT: - ASM_MOV_IMM_TO_LOCAL_USING(emit->as, (uintptr_t)MP_OBJ_NEW_SMALL_INT(si->data.u_imm), emit->stack_start + emit->stack_size - 1 - i, reg_dest); + ASM_MOV_LOCAL_IMM_VIA(emit->as, emit->stack_start + emit->stack_size - 1 - i, (uintptr_t)MP_OBJ_NEW_SMALL_INT(si->data.u_imm), reg_dest); si->vtype = VTYPE_PYOBJ; break; default: // not handled - mp_raise_NotImplementedError("conversion to object"); + mp_raise_NotImplementedError(translate("conversion to object")); } } @@ -838,9 +771,9 @@ STATIC void emit_get_stack_pointer_to_reg_for_pop(emit_t *emit, mp_uint_t reg_de stack_info_t *si = &emit->stack_info[emit->stack_size - 1 - i]; if (si->vtype != VTYPE_PYOBJ) { mp_uint_t local_num = emit->stack_start + emit->stack_size - 1 - i; - ASM_MOV_LOCAL_TO_REG(emit->as, local_num, REG_ARG_1); + ASM_MOV_REG_LOCAL(emit->as, REG_ARG_1, local_num); emit_call_with_imm_arg(emit, MP_F_CONVERT_NATIVE_TO_OBJ, si->vtype, REG_ARG_2); // arg2 = type - ASM_MOV_REG_TO_LOCAL(emit->as, REG_RET, local_num); + ASM_MOV_LOCAL_REG(emit->as, local_num, REG_RET); si->vtype = VTYPE_PYOBJ; DEBUG_printf(" convert_native_to_obj(local_num=" UINT_FMT ")\n", local_num); } @@ -848,7 +781,7 @@ STATIC void emit_get_stack_pointer_to_reg_for_pop(emit_t *emit, mp_uint_t reg_de // Adujust the stack for a pop of n_pop items, and load the stack pointer into reg_dest. adjust_stack(emit, -n_pop); - ASM_MOV_LOCAL_ADDR_TO_REG(emit->as, emit->stack_start + emit->stack_size, reg_dest); + ASM_MOV_REG_LOCAL_ADDR(emit->as, reg_dest, emit->stack_start + emit->stack_size); } // vtype of all n_push objects is VTYPE_PYOBJ @@ -858,7 +791,7 @@ STATIC void emit_get_stack_pointer_to_reg_for_push(emit_t *emit, mp_uint_t reg_d emit->stack_info[emit->stack_size + i].kind = STACK_VALUE; emit->stack_info[emit->stack_size + i].vtype = VTYPE_PYOBJ; } - ASM_MOV_LOCAL_ADDR_TO_REG(emit->as, emit->stack_start + emit->stack_size, reg_dest); + ASM_MOV_REG_LOCAL_ADDR(emit->as, reg_dest, emit->stack_start + emit->stack_size); adjust_stack(emit, n_push); } @@ -881,7 +814,7 @@ STATIC void emit_native_import_name(emit_t *emit, qstr qst) { stack_info_t *top = peek_stack(emit, 0); if (top->vtype == VTYPE_PTR_NONE) { emit_pre_pop_discard(emit); - ASM_MOV_IMM_TO_REG(emit->as, (mp_uint_t)mp_const_none, REG_ARG_2); + ASM_MOV_REG_IMM(emit->as, REG_ARG_2, (mp_uint_t)mp_const_none); } else { vtype_kind_t vtype_fromlist; emit_pre_pop_reg(emit, &vtype_fromlist, REG_ARG_2); @@ -891,7 +824,7 @@ STATIC void emit_native_import_name(emit_t *emit, qstr qst) { // level argument should be an immediate integer top = peek_stack(emit, 0); assert(top->vtype == VTYPE_INT && top->kind == STACK_IMM); - ASM_MOV_IMM_TO_REG(emit->as, (mp_uint_t)MP_OBJ_NEW_SMALL_INT(top->data.u_imm), REG_ARG_3); + ASM_MOV_REG_IMM(emit->as, REG_ARG_3, (mp_uint_t)MP_OBJ_NEW_SMALL_INT(top->data.u_imm)); emit_pre_pop_discard(emit); } else { @@ -925,6 +858,16 @@ STATIC void emit_native_import_star(emit_t *emit) { emit_post(emit); } +STATIC void emit_native_import(emit_t *emit, qstr qst, int kind) { + if (kind == MP_EMIT_IMPORT_NAME) { + emit_native_import_name(emit, qst); + } else if (kind == MP_EMIT_IMPORT_FROM) { + emit_native_import_from(emit, qst); + } else { + emit_native_import_star(emit); + } +} + STATIC void emit_native_load_const_tok(emit_t *emit, mp_token_kind_t tok) { DEBUG_printf("load_const_tok(tok=%u)\n", tok); emit_native_pre(emit); @@ -981,7 +924,7 @@ STATIC void emit_native_load_const_str(emit_t *emit, qstr qst) { STATIC void emit_native_load_const_obj(emit_t *emit, mp_obj_t obj) { emit_native_pre(emit); need_reg_single(emit, REG_RET, 0); - ASM_MOV_ALIGNED_IMM_TO_REG(emit->as, (mp_uint_t)obj, REG_RET); + ASM_MOV_REG_ALIGNED_IMM(emit->as, REG_RET, (mp_uint_t)obj); emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } @@ -994,7 +937,7 @@ STATIC void emit_native_load_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { DEBUG_printf("load_fast(%s, " UINT_FMT ")\n", qstr_str(qst), local_num); vtype_kind_t vtype = emit->local_vtype[local_num]; if (vtype == VTYPE_UNBOUND) { - EMIT_NATIVE_VIPER_TYPE_ERROR(emit, "local '%q' used before type known", qst); + EMIT_NATIVE_VIPER_TYPE_ERROR(emit, translate("local '%q' used before type known"), qst); } emit_native_pre(emit); if (local_num == 0) { @@ -1006,9 +949,9 @@ STATIC void emit_native_load_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { } else { need_reg_single(emit, REG_TEMP0, 0); if (emit->do_viper_types) { - ASM_MOV_LOCAL_TO_REG(emit->as, local_num - REG_LOCAL_NUM, REG_TEMP0); + ASM_MOV_REG_LOCAL(emit->as, REG_TEMP0, local_num - REG_LOCAL_NUM); } else { - ASM_MOV_LOCAL_TO_REG(emit->as, STATE_START + emit->n_state - 1 - local_num, REG_TEMP0); + ASM_MOV_REG_LOCAL(emit->as, REG_TEMP0, STATE_START + emit->n_state - 1 - local_num); } emit_post_push_reg(emit, vtype, REG_TEMP0); } @@ -1026,33 +969,47 @@ STATIC void emit_native_load_deref(emit_t *emit, qstr qst, mp_uint_t local_num) emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } -STATIC void emit_native_load_name(emit_t *emit, qstr qst) { - DEBUG_printf("load_name(%s)\n", qstr_str(qst)); - emit_native_pre(emit); - emit_call_with_imm_arg(emit, MP_F_LOAD_NAME, qst, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); +STATIC void emit_native_load_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + if (kind == MP_EMIT_IDOP_LOCAL_FAST) { + emit_native_load_fast(emit, qst, local_num); + } else { + emit_native_load_deref(emit, qst, local_num); + } } -STATIC void emit_native_load_global(emit_t *emit, qstr qst) { - DEBUG_printf("load_global(%s)\n", qstr_str(qst)); +STATIC void emit_native_load_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_F_LOAD_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_F_LOAD_NAME); + MP_STATIC_ASSERT(MP_F_LOAD_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_F_LOAD_GLOBAL); emit_native_pre(emit); - // check for builtin casting operators - if (emit->do_viper_types && qst == MP_QSTR_int) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_INT); - } else if (emit->do_viper_types && qst == MP_QSTR_uint) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_UINT); - } else if (emit->do_viper_types && qst == MP_QSTR_ptr) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR); - } else if (emit->do_viper_types && qst == MP_QSTR_ptr8) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR8); - } else if (emit->do_viper_types && qst == MP_QSTR_ptr16) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR16); - } else if (emit->do_viper_types && qst == MP_QSTR_ptr32) { - emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR32); + if (kind == MP_EMIT_IDOP_GLOBAL_NAME) { + DEBUG_printf("load_name(%s)\n", qstr_str(qst)); } else { - emit_call_with_imm_arg(emit, MP_F_LOAD_GLOBAL, qst, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); + DEBUG_printf("load_global(%s)\n", qstr_str(qst)); + if (emit->do_viper_types) { + // check for builtin casting operators + if (qst == MP_QSTR_int) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_INT); + return; + } else if (qst == MP_QSTR_uint) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_UINT); + return; + } else if (qst == MP_QSTR_ptr) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR); + return; + } else if (qst == MP_QSTR_ptr8) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR8); + return; + } else if (qst == MP_QSTR_ptr16) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR16); + return; + } else if (qst == MP_QSTR_ptr32) { + emit_post_push_imm(emit, VTYPE_BUILTIN_CAST, VTYPE_PTR32); + return; + } + } } + emit_call_with_imm_arg(emit, MP_F_LOAD_NAME + kind, qst, REG_ARG_1); + emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } STATIC void emit_native_load_attr(emit_t *emit, qstr qst) { @@ -1134,7 +1091,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add index to base reg_base = reg_index; } @@ -1151,7 +1108,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value << 1, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 2*index to base reg_base = reg_index; } @@ -1168,7 +1125,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value << 2, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2); ASM_ADD_REG_REG(emit->as, reg_index, reg_base); // add 4*index to base reg_base = reg_index; } @@ -1177,7 +1134,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { } default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't load from '%q'", vtype_to_qstr(vtype_base)); + translate("can't load from '%q'"), vtype_to_qstr(vtype_base)); } } else { // index is not an immediate @@ -1187,7 +1144,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { emit_pre_pop_reg(emit, &vtype_base, REG_ARG_1); if (vtype_index != VTYPE_INT && vtype_index != VTYPE_UINT) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't load with '%q' index", vtype_to_qstr(vtype_index)); + translate("can't load with '%q' index"), vtype_to_qstr(vtype_index)); } switch (vtype_base) { case VTYPE_PTR8: { @@ -1215,7 +1172,7 @@ STATIC void emit_native_load_subscr(emit_t *emit) { } default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't load from '%q'", vtype_to_qstr(vtype_base)); + translate("can't load from '%q'"), vtype_to_qstr(vtype_base)); } } emit_post_push_reg(emit, VTYPE_INT, REG_RET); @@ -1233,9 +1190,9 @@ STATIC void emit_native_store_fast(emit_t *emit, qstr qst, mp_uint_t local_num) } else { emit_pre_pop_reg(emit, &vtype, REG_TEMP0); if (emit->do_viper_types) { - ASM_MOV_REG_TO_LOCAL(emit->as, REG_TEMP0, local_num - REG_LOCAL_NUM); + ASM_MOV_LOCAL_REG(emit->as, local_num - REG_LOCAL_NUM, REG_TEMP0); } else { - ASM_MOV_REG_TO_LOCAL(emit->as, REG_TEMP0, STATE_START + emit->n_state - 1 - local_num); + ASM_MOV_LOCAL_REG(emit->as, STATE_START + emit->n_state - 1 - local_num, REG_TEMP0); } } emit_post(emit); @@ -1247,7 +1204,7 @@ STATIC void emit_native_store_fast(emit_t *emit, qstr qst, mp_uint_t local_num) } else if (emit->local_vtype[local_num] != vtype) { // type of local is not the same as object stored in it EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "local '%q' has type '%q' but source is '%q'", + translate("local '%q' has type '%q' but source is '%q'"), qst, vtype_to_qstr(emit->local_vtype[local_num]), vtype_to_qstr(vtype)); } } @@ -1266,25 +1223,33 @@ STATIC void emit_native_store_deref(emit_t *emit, qstr qst, mp_uint_t local_num) emit_post(emit); } -STATIC void emit_native_store_name(emit_t *emit, qstr qst) { - // mp_store_name, but needs conversion of object (maybe have mp_viper_store_name(obj, type)) - vtype_kind_t vtype; - emit_pre_pop_reg(emit, &vtype, REG_ARG_2); - assert(vtype == VTYPE_PYOBJ); - emit_call_with_imm_arg(emit, MP_F_STORE_NAME, qst, REG_ARG_1); // arg1 = name - emit_post(emit); +STATIC void emit_native_store_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + if (kind == MP_EMIT_IDOP_LOCAL_FAST) { + emit_native_store_fast(emit, qst, local_num); + } else { + emit_native_store_deref(emit, qst, local_num); + } } -STATIC void emit_native_store_global(emit_t *emit, qstr qst) { - vtype_kind_t vtype = peek_vtype(emit, 0); - if (vtype == VTYPE_PYOBJ) { +STATIC void emit_native_store_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_F_STORE_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_F_STORE_NAME); + MP_STATIC_ASSERT(MP_F_STORE_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_F_STORE_GLOBAL); + if (kind == MP_EMIT_IDOP_GLOBAL_NAME) { + // mp_store_name, but needs conversion of object (maybe have mp_viper_store_name(obj, type)) + vtype_kind_t vtype; emit_pre_pop_reg(emit, &vtype, REG_ARG_2); + assert(vtype == VTYPE_PYOBJ); } else { - emit_pre_pop_reg(emit, &vtype, REG_ARG_1); - emit_call_with_imm_arg(emit, MP_F_CONVERT_NATIVE_TO_OBJ, vtype, REG_ARG_2); // arg2 = type - ASM_MOV_REG_REG(emit->as, REG_ARG_2, REG_RET); + vtype_kind_t vtype = peek_vtype(emit, 0); + if (vtype == VTYPE_PYOBJ) { + emit_pre_pop_reg(emit, &vtype, REG_ARG_2); + } else { + emit_pre_pop_reg(emit, &vtype, REG_ARG_1); + emit_call_with_imm_arg(emit, MP_F_CONVERT_NATIVE_TO_OBJ, vtype, REG_ARG_2); // arg2 = type + ASM_MOV_REG_REG(emit->as, REG_ARG_2, REG_RET); + } } - emit_call_with_imm_arg(emit, MP_F_STORE_GLOBAL, qst, REG_ARG_1); // arg1 = name + emit_call_with_imm_arg(emit, MP_F_STORE_NAME + kind, qst, REG_ARG_1); // arg1 = name emit_post(emit); } @@ -1340,7 +1305,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { #endif if (vtype_value != VTYPE_BOOL && vtype_value != VTYPE_INT && vtype_value != VTYPE_UINT) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't store '%q'", vtype_to_qstr(vtype_value)); + translate("can't store '%q'"), vtype_to_qstr(vtype_value)); } switch (vtype_base) { case VTYPE_PTR8: { @@ -1354,7 +1319,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value); #if N_ARM asm_arm_strb_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); return; @@ -1375,7 +1340,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value << 1, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1); #if N_ARM asm_arm_strh_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); return; @@ -1396,7 +1361,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { break; } #endif - ASM_MOV_IMM_TO_REG(emit->as, index_value << 2, reg_index); + ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 2); #if N_ARM asm_arm_str_reg_reg_reg(emit->as, reg_value, reg_base, reg_index); return; @@ -1409,7 +1374,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { } default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't store to '%q'", vtype_to_qstr(vtype_base)); + translate("can't store to '%q'"), vtype_to_qstr(vtype_base)); } } else { // index is not an immediate @@ -1420,7 +1385,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { emit_pre_pop_reg(emit, &vtype_base, REG_ARG_1); if (vtype_index != VTYPE_INT && vtype_index != VTYPE_UINT) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't store with '%q' index", vtype_to_qstr(vtype_index)); + translate("can't store with '%q' index"), vtype_to_qstr(vtype_index)); } #if N_X86 // special case: x86 needs byte stores to be from lower 4 regs (REG_ARG_3 is EDX) @@ -1430,7 +1395,7 @@ STATIC void emit_native_store_subscr(emit_t *emit) { #endif if (vtype_value != VTYPE_BOOL && vtype_value != VTYPE_INT && vtype_value != VTYPE_UINT) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't store '%q'", vtype_to_qstr(vtype_value)); + translate("can't store '%q'"), vtype_to_qstr(vtype_value)); } switch (vtype_base) { case VTYPE_PTR8: { @@ -1470,37 +1435,30 @@ STATIC void emit_native_store_subscr(emit_t *emit) { } default: EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't store to '%q'", vtype_to_qstr(vtype_base)); + translate("can't store to '%q'"), vtype_to_qstr(vtype_base)); } } } } -STATIC void emit_native_delete_fast(emit_t *emit, qstr qst, mp_uint_t local_num) { - // TODO: This is not compliant implementation. We could use MP_OBJ_SENTINEL - // to mark deleted vars but then every var would need to be checked on - // each access. Very inefficient, so just set value to None to enable GC. - emit_native_load_const_tok(emit, MP_TOKEN_KW_NONE); - emit_native_store_fast(emit, qst, local_num); -} - -STATIC void emit_native_delete_deref(emit_t *emit, qstr qst, mp_uint_t local_num) { - // TODO implement me! - (void)emit; - (void)qst; - (void)local_num; -} - -STATIC void emit_native_delete_name(emit_t *emit, qstr qst) { - emit_native_pre(emit); - emit_call_with_imm_arg(emit, MP_F_DELETE_NAME, qst, REG_ARG_1); - emit_post(emit); +STATIC void emit_native_delete_local(emit_t *emit, qstr qst, mp_uint_t local_num, int kind) { + if (kind == MP_EMIT_IDOP_LOCAL_FAST) { + // TODO: This is not compliant implementation. We could use MP_OBJ_SENTINEL + // to mark deleted vars but then every var would need to be checked on + // each access. Very inefficient, so just set value to None to enable GC. + emit_native_load_const_tok(emit, MP_TOKEN_KW_NONE); + emit_native_store_fast(emit, qst, local_num); + } else { + // TODO implement me! + } } -STATIC void emit_native_delete_global(emit_t *emit, qstr qst) { +STATIC void emit_native_delete_global(emit_t *emit, qstr qst, int kind) { + MP_STATIC_ASSERT(MP_F_DELETE_NAME + MP_EMIT_IDOP_GLOBAL_NAME == MP_F_DELETE_NAME); + MP_STATIC_ASSERT(MP_F_DELETE_NAME + MP_EMIT_IDOP_GLOBAL_GLOBAL == MP_F_DELETE_GLOBAL); emit_native_pre(emit); - emit_call_with_imm_arg(emit, MP_F_DELETE_GLOBAL, qst, REG_ARG_1); + emit_call_with_imm_arg(emit, MP_F_DELETE_NAME + kind, qst, REG_ARG_1); emit_post(emit); } @@ -1520,6 +1478,26 @@ STATIC void emit_native_delete_subscr(emit_t *emit) { emit_call_with_imm_arg(emit, MP_F_OBJ_SUBSCR, (mp_uint_t)MP_OBJ_NULL, REG_ARG_3); } +STATIC void emit_native_subscr(emit_t *emit, int kind) { + if (kind == MP_EMIT_SUBSCR_LOAD) { + emit_native_load_subscr(emit); + } else if (kind == MP_EMIT_SUBSCR_STORE) { + emit_native_store_subscr(emit); + } else { + emit_native_delete_subscr(emit); + } +} + +STATIC void emit_native_attr(emit_t *emit, qstr qst, int kind) { + if (kind == MP_EMIT_ATTR_LOAD) { + emit_native_load_attr(emit, qst); + } else if (kind == MP_EMIT_ATTR_STORE) { + emit_native_store_attr(emit, qst); + } else { + emit_native_delete_attr(emit, qst); + } +} + STATIC void emit_native_dup_top(emit_t *emit) { DEBUG_printf("dup_top\n"); vtype_kind_t vtype; @@ -1578,7 +1556,7 @@ STATIC void emit_native_jump_helper(emit_t *emit, bool pop) { } if (!(vtype == VTYPE_BOOL || vtype == VTYPE_INT || vtype == VTYPE_UINT)) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't implicitly convert '%q' to 'bool'", vtype_to_qstr(vtype)); + translate("can't implicitly convert '%q' to 'bool'"), vtype_to_qstr(vtype)); } } // For non-pop need to save the vtype so that emit_native_adjust_stack_size @@ -1613,16 +1591,11 @@ STATIC void emit_native_jump_if_or_pop(emit_t *emit, bool cond, mp_uint_t label) emit_post(emit); } -STATIC void emit_native_break_loop(emit_t *emit, mp_uint_t label, mp_uint_t except_depth) { +STATIC void emit_native_unwind_jump(emit_t *emit, mp_uint_t label, mp_uint_t except_depth) { (void)except_depth; emit_native_jump(emit, label & ~MP_EMIT_BREAK_FROM_FOR); // TODO properly } -STATIC void emit_native_continue_loop(emit_t *emit, mp_uint_t label, mp_uint_t except_depth) { - (void)except_depth; - emit_native_jump(emit, label); // TODO properly -} - STATIC void emit_native_setup_with(emit_t *emit, mp_uint_t label) { // the context manager is on the top of the stack // stack: (..., ctx_mgr) @@ -1665,6 +1638,21 @@ STATIC void emit_native_setup_with(emit_t *emit, mp_uint_t label) { // stack: (..., __exit__, self, as_value, nlr_buf, as_value) } +STATIC void emit_native_setup_block(emit_t *emit, mp_uint_t label, int kind) { + if (kind == MP_EMIT_SETUP_BLOCK_WITH) { + emit_native_setup_with(emit, label); + } else { + // Set up except and finally + emit_native_pre(emit); + // need to commit stack because we may jump elsewhere + need_stack_settled(emit); + emit_get_stack_pointer_to_reg_for_push(emit, REG_ARG_1, sizeof(nlr_buf_t) / sizeof(mp_uint_t)); // arg1 = pointer to nlr buf + emit_call(emit, MP_F_NLR_PUSH); + ASM_JUMP_IF_REG_NONZERO(emit->as, REG_RET, label); + emit_post(emit); + } +} + STATIC void emit_native_with_cleanup(emit_t *emit, mp_uint_t label) { // note: label+1 is available as an auxiliary label @@ -1734,20 +1722,6 @@ STATIC void emit_native_with_cleanup(emit_t *emit, mp_uint_t label) { emit_native_label_assign(emit, label + 1); } -STATIC void emit_native_setup_except(emit_t *emit, mp_uint_t label) { - emit_native_pre(emit); - // need to commit stack because we may jump elsewhere - need_stack_settled(emit); - emit_get_stack_pointer_to_reg_for_push(emit, REG_ARG_1, sizeof(nlr_buf_t) / sizeof(mp_uint_t)); // arg1 = pointer to nlr buf - emit_call(emit, MP_F_NLR_PUSH); - ASM_JUMP_IF_REG_NONZERO(emit->as, REG_RET, label); - emit_post(emit); -} - -STATIC void emit_native_setup_finally(emit_t *emit, mp_uint_t label) { - emit_native_setup_except(emit, label); -} - STATIC void emit_native_end_finally(emit_t *emit) { // logic: // exc = pop_stack @@ -1773,7 +1747,7 @@ STATIC void emit_native_get_iter(emit_t *emit, bool use_stack) { emit_call(emit, MP_F_NATIVE_GETITER); } else { // mp_getiter will allocate the iter_buf on the heap - ASM_MOV_IMM_TO_REG(emit->as, 0, REG_ARG_2); + ASM_MOV_REG_IMM(emit->as, REG_ARG_2, 0); emit_call(emit, MP_F_NATIVE_GETITER); emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } @@ -1784,7 +1758,7 @@ STATIC void emit_native_for_iter(emit_t *emit, mp_uint_t label) { emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_1, MP_OBJ_ITER_BUF_NSLOTS); adjust_stack(emit, MP_OBJ_ITER_BUF_NSLOTS); emit_call(emit, MP_F_NATIVE_ITERNEXT); - ASM_MOV_IMM_TO_REG(emit->as, (mp_uint_t)MP_OBJ_STOP_ITERATION, REG_TEMP1); + ASM_MOV_REG_IMM(emit->as, REG_TEMP1, (mp_uint_t)MP_OBJ_STOP_ITERATION); ASM_JUMP_IF_REG_EQ(emit->as, REG_RET, REG_TEMP1, label); emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } @@ -1816,7 +1790,7 @@ STATIC void emit_native_unary_op(emit_t *emit, mp_unary_op_t op) { } else { adjust_stack(emit, 1); EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "unary op %q not implemented", mp_unary_op_method_name[op]); + translate("unary op %q not implemented"), mp_unary_op_method_name[op]); } } @@ -1972,7 +1946,7 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) { // TODO other ops not yet implemented adjust_stack(emit, 1); EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "binary op %q not implemented", mp_binary_op_method_name[op]); + translate("binary op %q not implemented"), mp_binary_op_method_name[op]); } } else if (vtype_lhs == VTYPE_PYOBJ && vtype_rhs == VTYPE_PYOBJ) { emit_pre_pop_reg_reg(emit, &vtype_rhs, REG_ARG_3, &vtype_lhs, REG_ARG_2); @@ -1993,31 +1967,34 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) { } else { adjust_stack(emit, -1); EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "can't do binary op between '%q' and '%q'", + translate("can't do binary op between '%q' and '%q'"), vtype_to_qstr(vtype_lhs), vtype_to_qstr(vtype_rhs)); } } -STATIC void emit_native_build_tuple(emit_t *emit, mp_uint_t n_args) { +#if MICROPY_PY_BUILTINS_SLICE +STATIC void emit_native_build_slice(emit_t *emit, mp_uint_t n_args); +#endif + +STATIC void emit_native_build(emit_t *emit, mp_uint_t n_args, int kind) { // for viper: call runtime, with types of args // if wrapped in byte_array, or something, allocates memory and fills it + MP_STATIC_ASSERT(MP_F_BUILD_TUPLE + MP_EMIT_BUILD_TUPLE == MP_F_BUILD_TUPLE); + MP_STATIC_ASSERT(MP_F_BUILD_TUPLE + MP_EMIT_BUILD_LIST == MP_F_BUILD_LIST); + MP_STATIC_ASSERT(MP_F_BUILD_TUPLE + MP_EMIT_BUILD_MAP == MP_F_BUILD_MAP); + MP_STATIC_ASSERT(MP_F_BUILD_TUPLE + MP_EMIT_BUILD_SET == MP_F_BUILD_SET); + #if MICROPY_PY_BUILTINS_SLICE + if (kind == MP_EMIT_BUILD_SLICE) { + emit_native_build_slice(emit, n_args); + return; + } + #endif emit_native_pre(emit); - emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_2, n_args); // pointer to items - emit_call_with_imm_arg(emit, MP_F_BUILD_TUPLE, n_args, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // new tuple -} - -STATIC void emit_native_build_list(emit_t *emit, mp_uint_t n_args) { - emit_native_pre(emit); - emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_2, n_args); // pointer to items - emit_call_with_imm_arg(emit, MP_F_BUILD_LIST, n_args, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // new list -} - -STATIC void emit_native_build_map(emit_t *emit, mp_uint_t n_args) { - emit_native_pre(emit); - emit_call_with_imm_arg(emit, MP_F_BUILD_MAP, n_args, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // new map + if (kind == MP_EMIT_BUILD_TUPLE || kind == MP_EMIT_BUILD_LIST || kind == MP_EMIT_BUILD_SET) { + emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_2, n_args); // pointer to items + } + emit_call_with_imm_arg(emit, MP_F_BUILD_TUPLE + kind, n_args, REG_ARG_1); + emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // new tuple/list/map/set } STATIC void emit_native_store_map(emit_t *emit) { @@ -2030,15 +2007,6 @@ STATIC void emit_native_store_map(emit_t *emit) { emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // map } -#if MICROPY_PY_BUILTINS_SET -STATIC void emit_native_build_set(emit_t *emit, mp_uint_t n_args) { - emit_native_pre(emit); - emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_2, n_args); // pointer to items - emit_call_with_imm_arg(emit, MP_F_BUILD_SET, n_args, REG_ARG_1); - emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); // new set -} -#endif - #if MICROPY_PY_BUILTINS_SLICE STATIC void emit_native_build_slice(emit_t *emit, mp_uint_t n_args) { DEBUG_printf("build_slice %d\n", n_args); @@ -2128,12 +2096,12 @@ STATIC void emit_native_make_closure(emit_t *emit, scope_t *scope, mp_uint_t n_c emit_native_pre(emit); if (n_pos_defaults == 0 && n_kw_defaults == 0) { emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_3, n_closed_over); - ASM_MOV_IMM_TO_REG(emit->as, n_closed_over, REG_ARG_2); + ASM_MOV_REG_IMM(emit->as, REG_ARG_2, n_closed_over); } else { emit_get_stack_pointer_to_reg_for_pop(emit, REG_ARG_3, n_closed_over + 2); - ASM_MOV_IMM_TO_REG(emit->as, 0x100 | n_closed_over, REG_ARG_2); + ASM_MOV_REG_IMM(emit->as, REG_ARG_2, 0x100 | n_closed_over); } - ASM_MOV_ALIGNED_IMM_TO_REG(emit->as, (mp_uint_t)scope->raw_code, REG_ARG_1); + ASM_MOV_REG_ALIGNED_IMM(emit->as, REG_ARG_1, (mp_uint_t)scope->raw_code); ASM_CALL_IND(emit->as, mp_fun_table[MP_F_MAKE_CLOSURE_FROM_RAW_CODE], MP_F_MAKE_CLOSURE_FROM_RAW_CODE); emit_post_push_reg(emit, VTYPE_PYOBJ, REG_RET); } @@ -2174,7 +2142,7 @@ STATIC void emit_native_call_function(emit_t *emit, mp_uint_t n_positional, mp_u break; default: // this can happen when casting a cast: int(int) - mp_raise_NotImplementedError("casting"); + mp_raise_NotImplementedError(translate("casting")); } } else { assert(vtype_fun == VTYPE_PYOBJ); @@ -2212,16 +2180,16 @@ STATIC void emit_native_return_value(emit_t *emit) { if (peek_vtype(emit, 0) == VTYPE_PTR_NONE) { emit_pre_pop_discard(emit); if (emit->return_vtype == VTYPE_PYOBJ) { - ASM_MOV_IMM_TO_REG(emit->as, (mp_uint_t)mp_const_none, REG_RET); + ASM_MOV_REG_IMM(emit->as, REG_RET, (mp_uint_t)mp_const_none); } else { - ASM_MOV_IMM_TO_REG(emit->as, 0, REG_RET); + ASM_MOV_REG_IMM(emit->as, REG_RET, 0); } } else { vtype_kind_t vtype; emit_pre_pop_reg(emit, &vtype, REG_RET); if (vtype != emit->return_vtype) { EMIT_NATIVE_VIPER_TYPE_ERROR(emit, - "return expected '%q' but got '%q'", + translate("return expected '%q' but got '%q'"), vtype_to_qstr(emit->return_vtype), vtype_to_qstr(vtype)); } } @@ -2239,21 +2207,17 @@ STATIC void emit_native_raise_varargs(emit_t *emit, mp_uint_t n_args) { vtype_kind_t vtype_exc; emit_pre_pop_reg(emit, &vtype_exc, REG_ARG_1); // arg1 = object to raise if (vtype_exc != VTYPE_PYOBJ) { - EMIT_NATIVE_VIPER_TYPE_ERROR(emit, "must raise an object"); + EMIT_NATIVE_VIPER_TYPE_ERROR(emit, translate("must raise an object")); } // TODO probably make this 1 call to the runtime (which could even call convert, native_raise(obj, type)) emit_call(emit, MP_F_NATIVE_RAISE); } -STATIC void emit_native_yield_value(emit_t *emit) { +STATIC void emit_native_yield(emit_t *emit, int kind) { // not supported (for now) (void)emit; - mp_raise_NotImplementedError("native yield"); -} -STATIC void emit_native_yield_from(emit_t *emit) { - // not supported (for now) - (void)emit; - mp_raise_NotImplementedError("native yield from"); + (void)kind; + mp_raise_NotImplementedError(translate("native yield")); } STATIC void emit_native_start_except_handler(emit_t *emit) { @@ -2280,41 +2244,29 @@ const emit_method_table_t EXPORT_FUN(method_table) = { emit_native_set_source_line, { - emit_native_load_fast, - emit_native_load_deref, - emit_native_load_name, + emit_native_load_local, emit_native_load_global, }, { - emit_native_store_fast, - emit_native_store_deref, - emit_native_store_name, + emit_native_store_local, emit_native_store_global, }, { - emit_native_delete_fast, - emit_native_delete_deref, - emit_native_delete_name, + emit_native_delete_local, emit_native_delete_global, }, emit_native_label_assign, - emit_native_import_name, - emit_native_import_from, - emit_native_import_star, + emit_native_import, emit_native_load_const_tok, emit_native_load_const_small_int, emit_native_load_const_str, emit_native_load_const_obj, emit_native_load_null, - emit_native_load_attr, emit_native_load_method, emit_native_load_build_class, - emit_native_load_subscr, - emit_native_store_attr, - emit_native_store_subscr, - emit_native_delete_attr, - emit_native_delete_subscr, + emit_native_subscr, + emit_native_attr, emit_native_dup_top, emit_native_dup_top_two, emit_native_pop_top, @@ -2323,12 +2275,9 @@ const emit_method_table_t EXPORT_FUN(method_table) = { emit_native_jump, emit_native_pop_jump_if, emit_native_jump_if_or_pop, - emit_native_break_loop, - emit_native_continue_loop, - emit_native_setup_with, + emit_native_unwind_jump, + emit_native_setup_block, emit_native_with_cleanup, - emit_native_setup_except, - emit_native_setup_finally, emit_native_end_finally, emit_native_get_iter, emit_native_for_iter, @@ -2337,16 +2286,8 @@ const emit_method_table_t EXPORT_FUN(method_table) = { emit_native_pop_except, emit_native_unary_op, emit_native_binary_op, - emit_native_build_tuple, - emit_native_build_list, - emit_native_build_map, + emit_native_build, emit_native_store_map, - #if MICROPY_PY_BUILTINS_SET - emit_native_build_set, - #endif - #if MICROPY_PY_BUILTINS_SLICE - emit_native_build_slice, - #endif emit_native_store_comp, emit_native_unpack_sequence, emit_native_unpack_ex, @@ -2356,8 +2297,7 @@ const emit_method_table_t EXPORT_FUN(method_table) = { emit_native_call_method, emit_native_return_value, emit_native_raise_varargs, - emit_native_yield_value, - emit_native_yield_from, + emit_native_yield, emit_native_start_except_handler, emit_native_end_except_handler, diff --git a/py/emitnthumb.c b/py/emitnthumb.c new file mode 100644 index 0000000000000..2b68ca3a13f71 --- /dev/null +++ b/py/emitnthumb.c @@ -0,0 +1,15 @@ +// thumb specific stuff + +#include "py/mpconfig.h" + +#if MICROPY_EMIT_THUMB + +// this is defined so that the assembler exports generic assembler API macros +#define GENERIC_ASM_API (1) +#include "py/asmthumb.h" + +#define N_THUMB (1) +#define EXPORT_FUN(name) emit_native_thumb_##name +#include "py/emitnative.c" + +#endif diff --git a/py/emitnx64.c b/py/emitnx64.c new file mode 100644 index 0000000000000..b9800f636e087 --- /dev/null +++ b/py/emitnx64.c @@ -0,0 +1,15 @@ +// x64 specific stuff + +#include "py/mpconfig.h" + +#if MICROPY_EMIT_X64 + +// This is defined so that the assembler exports generic assembler API macros +#define GENERIC_ASM_API (1) +#include "py/asmx64.h" + +#define N_X64 (1) +#define EXPORT_FUN(name) emit_native_x64_##name +#include "py/emitnative.c" + +#endif diff --git a/py/emitnx86.c b/py/emitnx86.c new file mode 100644 index 0000000000000..5d2bbb267a166 --- /dev/null +++ b/py/emitnx86.c @@ -0,0 +1,68 @@ +// x86 specific stuff + +#include "py/mpconfig.h" +#include "py/runtime0.h" + +#if MICROPY_EMIT_X86 + +// This is defined so that the assembler exports generic assembler API macros +#define GENERIC_ASM_API (1) +#include "py/asmx86.h" + +// x86 needs a table to know how many args a given function has +STATIC byte mp_f_n_args[MP_F_NUMBER_OF] = { + [MP_F_CONVERT_OBJ_TO_NATIVE] = 2, + [MP_F_CONVERT_NATIVE_TO_OBJ] = 2, + [MP_F_LOAD_NAME] = 1, + [MP_F_LOAD_GLOBAL] = 1, + [MP_F_LOAD_BUILD_CLASS] = 0, + [MP_F_LOAD_ATTR] = 2, + [MP_F_LOAD_METHOD] = 3, + [MP_F_LOAD_SUPER_METHOD] = 2, + [MP_F_STORE_NAME] = 2, + [MP_F_STORE_GLOBAL] = 2, + [MP_F_STORE_ATTR] = 3, + [MP_F_OBJ_SUBSCR] = 3, + [MP_F_OBJ_IS_TRUE] = 1, + [MP_F_UNARY_OP] = 2, + [MP_F_BINARY_OP] = 3, + [MP_F_BUILD_TUPLE] = 2, + [MP_F_BUILD_LIST] = 2, + [MP_F_LIST_APPEND] = 2, + [MP_F_BUILD_MAP] = 1, + [MP_F_STORE_MAP] = 3, + #if MICROPY_PY_BUILTINS_SET + [MP_F_BUILD_SET] = 2, + [MP_F_STORE_SET] = 2, + #endif + [MP_F_MAKE_FUNCTION_FROM_RAW_CODE] = 3, + [MP_F_NATIVE_CALL_FUNCTION_N_KW] = 3, + [MP_F_CALL_METHOD_N_KW] = 3, + [MP_F_CALL_METHOD_N_KW_VAR] = 3, + [MP_F_NATIVE_GETITER] = 2, + [MP_F_NATIVE_ITERNEXT] = 1, + [MP_F_NLR_PUSH] = 1, + [MP_F_NLR_POP] = 0, + [MP_F_NATIVE_RAISE] = 1, + [MP_F_IMPORT_NAME] = 3, + [MP_F_IMPORT_FROM] = 2, + [MP_F_IMPORT_ALL] = 1, + #if MICROPY_PY_BUILTINS_SLICE + [MP_F_NEW_SLICE] = 3, + #endif + [MP_F_UNPACK_SEQUENCE] = 3, + [MP_F_UNPACK_EX] = 3, + [MP_F_DELETE_NAME] = 1, + [MP_F_DELETE_GLOBAL] = 1, + [MP_F_NEW_CELL] = 1, + [MP_F_MAKE_CLOSURE_FROM_RAW_CODE] = 3, + [MP_F_SETUP_CODE_STATE] = 5, + [MP_F_SMALL_INT_FLOOR_DIVIDE] = 2, + [MP_F_SMALL_INT_MODULO] = 2, +}; + +#define N_X86 (1) +#define EXPORT_FUN(name) emit_native_x86_##name +#include "py/emitnative.c" + +#endif diff --git a/py/emitnxtensa.c b/py/emitnxtensa.c new file mode 100644 index 0000000000000..1a423e21eba3e --- /dev/null +++ b/py/emitnxtensa.c @@ -0,0 +1,15 @@ +// Xtensa specific stuff + +#include "py/mpconfig.h" + +#if MICROPY_EMIT_XTENSA + +// this is defined so that the assembler exports generic assembler API macros +#define GENERIC_ASM_API (1) +#include "py/asmxtensa.h" + +#define N_XTENSA (1) +#define EXPORT_FUN(name) emit_native_xtensa_##name +#include "py/emitnative.c" + +#endif diff --git a/py/formatfloat.c b/py/formatfloat.c index 4228f99ff5c1b..dc7fc1d1fd769 100644 --- a/py/formatfloat.c +++ b/py/formatfloat.c @@ -258,7 +258,7 @@ int mp_format_float(FPTYPE f, char *buf, size_t buf_size, char fmt, int prec, ch } // It can be that f was right on the edge of an entry in pos_pow needs to be reduced - if (f >= FPCONST(10.0)) { + if ((int)f >= 10) { e += 1; f *= FPCONST(0.1); } @@ -330,7 +330,11 @@ int mp_format_float(FPTYPE f, char *buf, size_t buf_size, char fmt, int prec, ch // Print the digits of the mantissa for (int i = 0; i < num_digits; ++i, --dec) { int32_t d = (int32_t)f; - *s++ = '0' + d; + if (d < 0) { + *s++ = '0'; + } else { + *s++ = '0' + d; + } if (dec == 0 && prec > 0) { *s++ = '.'; } @@ -341,7 +345,7 @@ int mp_format_float(FPTYPE f, char *buf, size_t buf_size, char fmt, int prec, ch // Round // If we print non-exponential format (i.e. 'f'), but a digit we're going // to round by (e) is too far away, then there's nothing to round. - if ((org_fmt != 'f' || e <= 1) && f >= FPCONST(5.0)) { + if ((org_fmt != 'f' || e <= num_digits) && f >= FPCONST(5.0)) { char *rs = s; rs--; while (1) { diff --git a/py/frozenmod.c b/py/frozenmod.c index 5464d0af901ca..a9143b582a615 100644 --- a/py/frozenmod.c +++ b/py/frozenmod.c @@ -43,8 +43,14 @@ extern const char mp_frozen_str_names[]; extern const uint32_t mp_frozen_str_sizes[]; extern const char mp_frozen_str_content[]; -// On input, *len contains size of name, on output - size of content +// str_len is length of str. *len is set on on output to size of content const char *mp_find_frozen_str(const char *str, size_t str_len, size_t *len) { + // If the frozen module pseudo dir (e.g., ".frozen/") is a prefix of str, remove it. + if (strncmp(str, MP_FROZEN_FAKE_DIR_SLASH, MP_FROZEN_FAKE_DIR_SLASH_LENGTH) == 0) { + str = str + MP_FROZEN_FAKE_DIR_SLASH_LENGTH; + str_len = str_len - MP_FROZEN_FAKE_DIR_SLASH_LENGTH; + } + const char *name = mp_frozen_str_names; size_t offset = 0; diff --git a/py/gc.c b/py/gc.c old mode 100644 new mode 100755 index 2c2354e4c0705..271bc94624d00 --- a/py/gc.c +++ b/py/gc.c @@ -31,6 +31,8 @@ #include "py/gc.h" #include "py/runtime.h" +#include "supervisor/shared/safe_mode.h" + #if MICROPY_ENABLE_GC #if MICROPY_DEBUG_VERBOSE // print debugging info @@ -47,8 +49,9 @@ // make this 1 to dump the heap each time it changes #define EXTENSIVE_HEAP_PROFILING (0) -#define WORDS_PER_BLOCK ((MICROPY_BYTES_PER_GC_BLOCK) / BYTES_PER_WORD) -#define BYTES_PER_BLOCK (MICROPY_BYTES_PER_GC_BLOCK) +// make this 1 to zero out swept memory to more eagerly +// detect untraced object still in use +#define CLEAR_ON_SWEEP (0) // ATB = allocation table byte // 0b00 = FREE -- free block @@ -147,9 +150,13 @@ void gc_init(void *start, void *end) { #endif // Set first free ATB index to the start of the heap. - MP_STATE_MEM(gc_first_free_atb_index) = 0; + for (size_t i = 0; i < MICROPY_ATB_INDICES; i++) { + MP_STATE_MEM(gc_first_free_atb_index)[i] = 0; + } + // Set last free ATB index to the end of the heap. MP_STATE_MEM(gc_last_free_atb_index) = MP_STATE_MEM(gc_alloc_table_byte_len) - 1; + // Set the lowest long lived ptr to the end of the heap to start. This will be lowered as long // lived objects are allocated. MP_STATE_MEM(gc_lowest_long_lived_ptr) = (void*) PTR_FROM_BLOCK(MP_STATE_MEM(gc_alloc_table_byte_len * BLOCKS_PER_ATB)); @@ -170,6 +177,8 @@ void gc_init(void *start, void *end) { mp_thread_mutex_init(&MP_STATE_MEM(gc_mutex)); #endif + MP_STATE_MEM(permanent_pointers) = NULL; + DEBUG_printf("GC layout:\n"); DEBUG_printf(" alloc table at %p, length " UINT_FMT " bytes, " UINT_FMT " blocks\n", MP_STATE_MEM(gc_alloc_table_start), MP_STATE_MEM(gc_alloc_table_byte_len), MP_STATE_MEM(gc_alloc_table_byte_len) * BLOCKS_PER_ATB); #if MICROPY_ENABLE_FINALISER @@ -178,6 +187,13 @@ void gc_init(void *start, void *end) { DEBUG_printf(" pool at %p, length " UINT_FMT " bytes, " UINT_FMT " blocks\n", MP_STATE_MEM(gc_pool_start), gc_pool_block_len * BYTES_PER_BLOCK, gc_pool_block_len); } +void gc_deinit(void) { + // Run any finalizers before we stop using the heap. + gc_sweep_all(); + + MP_STATE_MEM(gc_pool_start) = 0; +} + void gc_lock(void) { GC_ENTER(); MP_STATE_MEM(gc_lock_depth)++; @@ -194,36 +210,22 @@ bool gc_is_locked(void) { return MP_STATE_MEM(gc_lock_depth) != 0; } -// ptr should be of type void* -#define VERIFY_PTR(ptr) ( \ - ((uintptr_t)(ptr) & (BYTES_PER_BLOCK - 1)) == 0 /* must be aligned on a block */ \ - && ptr >= (void*)MP_STATE_MEM(gc_pool_start) /* must be above start of pool */ \ - && ptr < (void*)MP_STATE_MEM(gc_pool_end) /* must be below end of pool */ \ - ) - -// ptr should be of type void* -#define VERIFY_MARK_AND_PUSH(ptr) \ - do { \ - if (VERIFY_PTR(ptr)) { \ - size_t _block = BLOCK_FROM_PTR(ptr); \ - if (ATB_GET_KIND(_block) == AT_HEAD) { \ - /* an unmarked head, mark it, and push it on gc stack */ \ - DEBUG_printf("gc_mark(%p)\n", ptr); \ - ATB_HEAD_TO_MARK(_block); \ - if (MP_STATE_MEM(gc_sp) < &MP_STATE_MEM(gc_stack)[MICROPY_ALLOC_GC_STACK_SIZE]) { \ - *MP_STATE_MEM(gc_sp)++ = _block; \ - } else { \ - MP_STATE_MEM(gc_stack_overflow) = 1; \ - } \ - } \ - } \ - } while (0) - -STATIC void gc_drain_stack(void) { - while (MP_STATE_MEM(gc_sp) > MP_STATE_MEM(gc_stack)) { - // pop the next block off the stack - size_t block = *--MP_STATE_MEM(gc_sp); +#ifndef TRACE_MARK +#if DEBUG_PRINT +#define TRACE_MARK(block, ptr) DEBUG_printf("gc_mark(%p)\n", ptr) +#else +#define TRACE_MARK(block, ptr) +#endif +#endif +// Take the given block as the topmost block on the stack. Check all it's +// children: mark the unmarked child blocks and put those newly marked +// blocks on the stack. When all children have been checked, pop off the +// topmost block on the stack and repeat with that one. +STATIC void gc_mark_subtree(size_t block) { + // Start with the block passed in the argument. + size_t sp = 0; + for (;;) { // work out number of consecutive blocks in the chain starting with this one size_t n_blocks = 0; do { @@ -234,22 +236,41 @@ STATIC void gc_drain_stack(void) { void **ptrs = (void**)PTR_FROM_BLOCK(block); for (size_t i = n_blocks * BYTES_PER_BLOCK / sizeof(void*); i > 0; i--, ptrs++) { void *ptr = *ptrs; - VERIFY_MARK_AND_PUSH(ptr); + if (VERIFY_PTR(ptr)) { + // Mark and push this pointer + size_t childblock = BLOCK_FROM_PTR(ptr); + if (ATB_GET_KIND(childblock) == AT_HEAD) { + // an unmarked head, mark it, and push it on gc stack + TRACE_MARK(childblock, ptr); + ATB_HEAD_TO_MARK(childblock); + if (sp < MICROPY_ALLOC_GC_STACK_SIZE) { + MP_STATE_MEM(gc_stack)[sp++] = childblock; + } else { + MP_STATE_MEM(gc_stack_overflow) = 1; + } + } + } } + + // Are there any blocks on the stack? + if (sp == 0) { + break; // No, stack is empty, we're done. + } + + // pop the next block off the stack + block = MP_STATE_MEM(gc_stack)[--sp]; } } STATIC void gc_deal_with_stack_overflow(void) { while (MP_STATE_MEM(gc_stack_overflow)) { MP_STATE_MEM(gc_stack_overflow) = 0; - MP_STATE_MEM(gc_sp) = MP_STATE_MEM(gc_stack); // scan entire memory looking for blocks which have been marked but not their children for (size_t block = 0; block < MP_STATE_MEM(gc_alloc_table_byte_len) * BLOCKS_PER_ATB; block++) { // trace (again) if mark bit set if (ATB_GET_KIND(block) == AT_MARK) { - *MP_STATE_MEM(gc_sp)++ = block; - gc_drain_stack(); + gc_mark_subtree(block); } } } @@ -288,6 +309,9 @@ STATIC void gc_sweep(void) { #endif free_tail = 1; ATB_ANY_TO_FREE(block); + #if CLEAR_ON_SWEEP + memset((void*)PTR_FROM_BLOCK(block), 0, BYTES_PER_BLOCK); + #endif DEBUG_printf("gc_sweep(%x)\n", PTR_FROM_BLOCK(block)); #ifdef LOG_HEAP_ACTIVITY @@ -301,6 +325,9 @@ STATIC void gc_sweep(void) { case AT_TAIL: if (free_tail) { ATB_ANY_TO_FREE(block); + #if CLEAR_ON_SWEEP + memset((void*)PTR_FROM_BLOCK(block), 0, BYTES_PER_BLOCK); + #endif } break; @@ -312,6 +339,19 @@ STATIC void gc_sweep(void) { } } +// Mark can handle NULL pointers because it verifies the pointer is within the heap bounds. +STATIC void gc_mark(void* ptr) { + if (VERIFY_PTR(ptr)) { + size_t block = BLOCK_FROM_PTR(ptr); + if (ATB_GET_KIND(block) == AT_HEAD) { + // An unmarked head: mark it, and mark all its children + TRACE_MARK(block, ptr); + ATB_HEAD_TO_MARK(block); + gc_mark_subtree(block); + } + } +} + void gc_collect_start(void) { GC_ENTER(); MP_STATE_MEM(gc_lock_depth)++; @@ -319,31 +359,53 @@ void gc_collect_start(void) { MP_STATE_MEM(gc_alloc_amount) = 0; #endif MP_STATE_MEM(gc_stack_overflow) = 0; - MP_STATE_MEM(gc_sp) = MP_STATE_MEM(gc_stack); + // Trace root pointers. This relies on the root pointers being organised // correctly in the mp_state_ctx structure. We scan nlr_top, dict_locals, // dict_globals, then the root pointer section of mp_state_vm. void **ptrs = (void**)(void*)&mp_state_ctx; - gc_collect_root(ptrs, offsetof(mp_state_ctx_t, vm.qstr_last_chunk) / sizeof(void*)); + size_t root_start = offsetof(mp_state_ctx_t, thread.dict_locals); + size_t root_end = offsetof(mp_state_ctx_t, vm.qstr_last_chunk); + gc_collect_root(ptrs + root_start / sizeof(void*), (root_end - root_start) / sizeof(void*)); + + gc_mark(MP_STATE_MEM(permanent_pointers)); + + #if MICROPY_ENABLE_PYSTACK + // Trace root pointers from the Python stack. + ptrs = (void**)(void*)MP_STATE_THREAD(pystack_start); + gc_collect_root(ptrs, (MP_STATE_THREAD(pystack_cur) - MP_STATE_THREAD(pystack_start)) / sizeof(void*)); + #endif +} + +void gc_collect_ptr(void *ptr) { + gc_mark(ptr); } void gc_collect_root(void **ptrs, size_t len) { for (size_t i = 0; i < len; i++) { void *ptr = ptrs[i]; - VERIFY_MARK_AND_PUSH(ptr); - gc_drain_stack(); + gc_mark(ptr); } } void gc_collect_end(void) { gc_deal_with_stack_overflow(); gc_sweep(); - MP_STATE_MEM(gc_first_free_atb_index) = 0; + for (size_t i = 0; i < MICROPY_ATB_INDICES; i++) { + MP_STATE_MEM(gc_first_free_atb_index)[i] = 0; + } MP_STATE_MEM(gc_last_free_atb_index) = MP_STATE_MEM(gc_alloc_table_byte_len) - 1; MP_STATE_MEM(gc_lock_depth)--; GC_EXIT(); } +void gc_sweep_all(void) { + GC_ENTER(); + MP_STATE_MEM(gc_lock_depth)++; + MP_STATE_MEM(gc_stack_overflow) = 0; + gc_collect_end(); +} + void gc_info(gc_info_t *info) { GC_ENTER(); info->total = MP_STATE_MEM(gc_pool_end) - MP_STATE_MEM(gc_pool_start); @@ -408,6 +470,10 @@ void gc_info(gc_info_t *info) { GC_EXIT(); } +bool gc_alloc_possible(void) { + return MP_STATE_MEM(gc_pool_start) != 0; +} + // We place long lived objects at the end of the heap rather than the start. This reduces // fragmentation by localizing the heap churn to one portion of memory (the start of the heap.) void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { @@ -419,6 +485,10 @@ void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { return NULL; } + if (MP_STATE_MEM(gc_pool_start) == 0) { + reset_into_safe_mode(GC_ALLOC_OUTSIDE_VM); + } + GC_ENTER(); // check if GC is locked @@ -437,8 +507,8 @@ void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { if (!collected && MP_STATE_MEM(gc_alloc_amount) >= MP_STATE_MEM(gc_alloc_threshold)) { GC_EXIT(); gc_collect(); + collected = 1; GC_ENTER(); - collected = true; } #endif @@ -449,14 +519,16 @@ void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { size_t crossover_block = BLOCK_FROM_PTR(MP_STATE_MEM(gc_lowest_long_lived_ptr)); while (keep_looking) { int8_t direction = 1; - size_t start = MP_STATE_MEM(gc_first_free_atb_index); + size_t bucket = MIN(n_blocks, MICROPY_ATB_INDICES) - 1; + size_t first_free = MP_STATE_MEM(gc_first_free_atb_index)[bucket]; + size_t start = first_free; if (long_lived) { direction = -1; start = MP_STATE_MEM(gc_last_free_atb_index); } n_free = 0; // look for a run of n_blocks available blocks - for (size_t i = start; keep_looking && MP_STATE_MEM(gc_first_free_atb_index) <= i && i <= MP_STATE_MEM(gc_last_free_atb_index); i += direction) { + for (size_t i = start; keep_looking && first_free <= i && i <= MP_STATE_MEM(gc_last_free_atb_index); i += direction) { byte a = MP_STATE_MEM(gc_alloc_table_start)[i]; // Four ATB states are packed into a single byte. int j = 0; @@ -501,22 +573,24 @@ void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { // Found free space ending at found_block inclusive. // Also, set last free ATB index to block after last block we found, for start of - // next scan. To reduce fragmentation, we only do this if we were looking - // for a single free block, which guarantees that there are no free blocks - // before this one. Also, whenever we free or shrink a block we must check - // if this index needs adjusting (see gc_realloc and gc_free). + // next scan. Also, whenever we free or shrink a block we must check if this index needs + // adjusting (see gc_realloc and gc_free). if (!long_lived) { end_block = found_block; start_block = found_block - n_free + 1; - if (n_blocks == 1) { - MP_STATE_MEM(gc_first_free_atb_index) = (found_block + 1) / BLOCKS_PER_ATB; + if (n_blocks < MICROPY_ATB_INDICES) { + size_t next_free_atb = (found_block + n_blocks) / BLOCKS_PER_ATB; + // Update all atb indices for larger blocks too. + for (size_t i = n_blocks - 1; i < MICROPY_ATB_INDICES; i++) { + MP_STATE_MEM(gc_first_free_atb_index)[i] = next_free_atb; + } } } else { start_block = found_block; end_block = found_block + n_free - 1; - if (n_blocks == 1) { - MP_STATE_MEM(gc_last_free_atb_index) = (found_block - 1) / BLOCKS_PER_ATB; - } + // Always update the bounds of the long lived area because we assume it is contiguous. (It + // can still be reset by a sweep.) + MP_STATE_MEM(gc_last_free_atb_index) = (found_block - 1) / BLOCKS_PER_ATB; } #ifdef LOG_HEAP_ACTIVITY @@ -607,32 +681,42 @@ void gc_free(void *ptr) { if (ptr == NULL) { GC_EXIT(); } else { + if (MP_STATE_MEM(gc_pool_start) == 0) { + reset_into_safe_mode(GC_ALLOC_OUTSIDE_VM); + } // get the GC block number corresponding to this pointer assert(VERIFY_PTR(ptr)); - size_t block = BLOCK_FROM_PTR(ptr); - assert(ATB_GET_KIND(block) == AT_HEAD); + size_t start_block = BLOCK_FROM_PTR(ptr); + assert(ATB_GET_KIND(start_block) == AT_HEAD); #if MICROPY_ENABLE_FINALISER - FTB_CLEAR(block); + FTB_CLEAR(start_block); #endif - // set the last_free pointer to this block if it's earlier in the heap - if (block / BLOCKS_PER_ATB < MP_STATE_MEM(gc_first_free_atb_index)) { - MP_STATE_MEM(gc_first_free_atb_index) = block / BLOCKS_PER_ATB; - } - if (block / BLOCKS_PER_ATB > MP_STATE_MEM(gc_last_free_atb_index)) { - MP_STATE_MEM(gc_last_free_atb_index) = block / BLOCKS_PER_ATB; - } - // free head and all of its tail blocks - #ifdef LOG_HEAP_ACTIVITY - gc_log_change(block, 0); - #endif + #ifdef LOG_HEAP_ACTIVITY + gc_log_change(start_block, 0); + #endif + size_t block = start_block; do { ATB_ANY_TO_FREE(block); block += 1; } while (ATB_GET_KIND(block) == AT_TAIL); + // Update the first free pointer for our size only. Not much calls gc_free directly so there + // is decent chance we'll want to allocate this size again. By only updating the specific + // size we don't risk something smaller fitting in. + size_t n_blocks = block - start_block; + size_t bucket = MIN(n_blocks, MICROPY_ATB_INDICES) - 1; + size_t new_free_atb = start_block / BLOCKS_PER_ATB; + if (new_free_atb < MP_STATE_MEM(gc_first_free_atb_index)[bucket]) { + MP_STATE_MEM(gc_first_free_atb_index)[bucket] = new_free_atb; + } + // set the last_free pointer to this block if it's earlier in the heap + if (new_free_atb > MP_STATE_MEM(gc_last_free_atb_index)) { + MP_STATE_MEM(gc_last_free_atb_index) = new_free_atb; + } + GC_EXIT(); #if EXTENSIVE_HEAP_PROFILING @@ -748,27 +832,18 @@ void *gc_realloc(void *ptr_in, size_t n_bytes, bool allow_move) { void *ptr = ptr_in; - // sanity check the ptr - if (!VERIFY_PTR(ptr)) { - return NULL; - } - - // get first block - size_t block = BLOCK_FROM_PTR(ptr); - GC_ENTER(); - // sanity check the ptr is pointing to the head of a block - if (ATB_GET_KIND(block) != AT_HEAD) { - GC_EXIT(); - return NULL; - } - if (MP_STATE_MEM(gc_lock_depth) > 0) { GC_EXIT(); return NULL; } + // get the GC block number corresponding to this pointer + assert(VERIFY_PTR(ptr)); + size_t block = BLOCK_FROM_PTR(ptr); + assert(ATB_GET_KIND(block) == AT_HEAD); + // compute number of new blocks that are requested size_t new_blocks = (n_bytes + BYTES_PER_BLOCK - 1) / BYTES_PER_BLOCK; @@ -812,11 +887,13 @@ void *gc_realloc(void *ptr_in, size_t n_bytes, bool allow_move) { } // set the last_free pointer to end of this block if it's earlier in the heap - if ((block + new_blocks) / BLOCKS_PER_ATB < MP_STATE_MEM(gc_first_free_atb_index)) { - MP_STATE_MEM(gc_first_free_atb_index) = (block + new_blocks) / BLOCKS_PER_ATB; + size_t new_free_atb = (block + new_blocks) / BLOCKS_PER_ATB; + size_t bucket = MIN(n_blocks - new_blocks, MICROPY_ATB_INDICES) - 1; + if (new_free_atb < MP_STATE_MEM(gc_first_free_atb_index)[bucket]) { + MP_STATE_MEM(gc_first_free_atb_index)[bucket] = new_free_atb; } - if ((block + new_blocks) / BLOCKS_PER_ATB > MP_STATE_MEM(gc_last_free_atb_index)) { - MP_STATE_MEM(gc_last_free_atb_index) = (block + new_blocks) / BLOCKS_PER_ATB; + if (new_free_atb > MP_STATE_MEM(gc_last_free_atb_index)) { + MP_STATE_MEM(gc_last_free_atb_index) = new_free_atb; } GC_EXIT(); @@ -889,6 +966,36 @@ void *gc_realloc(void *ptr_in, size_t n_bytes, bool allow_move) { } #endif // Alternative gc_realloc impl +bool gc_never_free(void *ptr) { + // Check to make sure the pointer is on the heap in the first place. + if (gc_nbytes(ptr) == 0) { + return false; + } + // Pointers are stored in a linked list where each block is BYTES_PER_BLOCK long and the first + // pointer is the next block of pointers. + void ** current_reference_block = MP_STATE_MEM(permanent_pointers); + while (current_reference_block != NULL) { + for (size_t i = 1; i < BYTES_PER_BLOCK / sizeof(void*); i++) { + if (current_reference_block[i] == NULL) { + current_reference_block[i] = ptr; + return true; + } + } + current_reference_block = current_reference_block[0]; + } + void** next_block = gc_alloc(BYTES_PER_BLOCK, false, true); + if (next_block == NULL) { + return false; + } + if (MP_STATE_MEM(permanent_pointers) == NULL) { + MP_STATE_MEM(permanent_pointers) = next_block; + } else { + current_reference_block[0] = next_block; + } + next_block[1] = ptr; + return true; +} + void gc_dump_info(void) { gc_info_t info; gc_info(&info); diff --git a/py/gc.h b/py/gc.h index e5878e1eed117..2a0811f4edabf 100644 --- a/py/gc.h +++ b/py/gc.h @@ -29,9 +29,21 @@ #include #include "py/mpconfig.h" +#include "py/mpstate.h" #include "py/misc.h" +#define WORDS_PER_BLOCK ((MICROPY_BYTES_PER_GC_BLOCK) / BYTES_PER_WORD) +#define BYTES_PER_BLOCK (MICROPY_BYTES_PER_GC_BLOCK) + +// ptr should be of type void* +#define VERIFY_PTR(ptr) ( \ + ((uintptr_t)(ptr) & (BYTES_PER_BLOCK - 1)) == 0 /* must be aligned on a block */ \ + && ptr >= (void*)MP_STATE_MEM(gc_pool_start) /* must be above start of pool */ \ + && ptr < (void*)MP_STATE_MEM(gc_pool_end) /* must be below end of pool */ \ + ) + void gc_init(void *start, void *end); +void gc_deinit(void); // These lock/unlock functions can be nested. // They can be used to prevent the GC from allocating/freeing. @@ -42,16 +54,27 @@ bool gc_is_locked(void); // A given port must implement gc_collect by using the other collect functions. void gc_collect(void); void gc_collect_start(void); +void gc_collect_ptr(void *ptr); void gc_collect_root(void **ptrs, size_t len); void gc_collect_end(void); +// Is the gc heap available? +bool gc_alloc_possible(void); void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived); + +// Use this function to sweep the whole heap and run all finalisers +void gc_sweep_all(void); + void gc_free(void *ptr); // does not call finaliser size_t gc_nbytes(const void *ptr); bool gc_has_finaliser(const void *ptr); void *gc_make_long_lived(void *old_ptr); void *gc_realloc(void *ptr, size_t n_bytes, bool allow_move); +// Prevents a pointer from ever being freed because it establishes a permanent reference to it. Use +// very sparingly because it can leak memory. +bool gc_never_free(void *ptr); + typedef struct _gc_info_t { size_t total; size_t used; diff --git a/py/gc_long_lived.c b/py/gc_long_lived.c old mode 100644 new mode 100755 index d34fde5d9bcd1..0e94390e9dfed --- a/py/gc_long_lived.c +++ b/py/gc_long_lived.c @@ -27,6 +27,7 @@ #include "py/emitglue.h" #include "py/gc_long_lived.h" #include "py/gc.h" +#include "py/mpstate.h" mp_obj_fun_bc_t *make_fun_bc_long_lived(mp_obj_fun_bc_t *fun_bc, uint8_t max_depth) { #ifndef MICROPY_ENABLE_GC @@ -88,9 +89,16 @@ mp_obj_dict_t *make_dict_long_lived(mp_obj_dict_t *dict, uint8_t max_depth) { #ifndef MICROPY_ENABLE_GC return dict; #endif - if (dict == NULL || max_depth == 0) { + if (dict == NULL || max_depth == 0 || dict == &MP_STATE_VM(dict_main) || dict->map.is_fixed) { return dict; } + // Don't recurse unnecessarily. Return immediately if we've already seen this dict. + if (dict->map.scanning) { + return dict; + } + // Mark that we're processing this dict. + dict->map.scanning = 1; + // Update all of the references first so that we reduce the chance of references to the old // copies. dict->map.table = gc_make_long_lived(dict->map.table); @@ -100,7 +108,10 @@ mp_obj_dict_t *make_dict_long_lived(mp_obj_dict_t *dict, uint8_t max_depth) { dict->map.table[i].value = make_obj_long_lived(value, max_depth - 1); } } - return gc_make_long_lived(dict); + dict = gc_make_long_lived(dict); + // Done recursing through this dict. + dict->map.scanning = 0; + return dict; } mp_obj_str_t *make_str_long_lived(mp_obj_str_t *str) { @@ -115,13 +126,18 @@ mp_obj_t make_obj_long_lived(mp_obj_t obj, uint8_t max_depth){ if (obj == NULL) { return obj; } + // If not in the GC pool, do nothing. This can happen (at least) when + // there are frozen mp_type_bytes objects in ROM. + if (!VERIFY_PTR((void *)obj)) { + return obj; + } if (MP_OBJ_IS_TYPE(obj, &mp_type_fun_bc)) { mp_obj_fun_bc_t *fun_bc = MP_OBJ_TO_PTR(obj); return MP_OBJ_FROM_PTR(make_fun_bc_long_lived(fun_bc, max_depth)); } else if (MP_OBJ_IS_TYPE(obj, &mp_type_property)) { mp_obj_property_t *prop = MP_OBJ_TO_PTR(obj); return MP_OBJ_FROM_PTR(make_property_long_lived(prop, max_depth)); - } else if (MP_OBJ_IS_TYPE(obj, &mp_type_str)) { + } else if (MP_OBJ_IS_TYPE(obj, &mp_type_str) || MP_OBJ_IS_TYPE(obj, &mp_type_bytes)) { mp_obj_str_t *str = MP_OBJ_TO_PTR(obj); return MP_OBJ_FROM_PTR(make_str_long_lived(str)); } else if (MP_OBJ_IS_TYPE(obj, &mp_type_type)) { diff --git a/py/grammar.h b/py/grammar.h index 6abb1de8c033c..5a5b682acc934 100644 --- a/py/grammar.h +++ b/py/grammar.h @@ -122,8 +122,8 @@ DEF_RULE_NC(augassign, or(12), tok(DEL_PLUS_EQUAL), tok(DEL_MINUS_EQUAL), tok(DE DEF_RULE(del_stmt, c(del_stmt), and(2), tok(KW_DEL), rule(exprlist)) DEF_RULE(pass_stmt, c(generic_all_nodes), and(1), tok(KW_PASS)) DEF_RULE_NC(flow_stmt, or(5), rule(break_stmt), rule(continue_stmt), rule(return_stmt), rule(raise_stmt), rule(yield_stmt)) -DEF_RULE(break_stmt, c(break_stmt), and(1), tok(KW_BREAK)) -DEF_RULE(continue_stmt, c(continue_stmt), and(1), tok(KW_CONTINUE)) +DEF_RULE(break_stmt, c(break_cont_stmt), and(1), tok(KW_BREAK)) +DEF_RULE(continue_stmt, c(break_cont_stmt), and(1), tok(KW_CONTINUE)) DEF_RULE(return_stmt, c(return_stmt), and(2), tok(KW_RETURN), opt_rule(testlist)) DEF_RULE(yield_stmt, c(yield_stmt), and(1), rule(yield_expr)) DEF_RULE(raise_stmt, c(raise_stmt), and(2), tok(KW_RAISE), opt_rule(raise_stmt_arg)) @@ -157,8 +157,8 @@ DEF_RULE_NC(as_name, and_ident(2), tok(KW_AS), tok(NAME)) DEF_RULE_NC(import_as_names, list_with_end, rule(import_as_name), tok(DEL_COMMA)) DEF_RULE_NC(dotted_as_names, list, rule(dotted_as_name), tok(DEL_COMMA)) DEF_RULE_NC(dotted_name, list, tok(NAME), tok(DEL_PERIOD)) -DEF_RULE(global_stmt, c(global_stmt), and(2), tok(KW_GLOBAL), rule(name_list)) -DEF_RULE(nonlocal_stmt, c(nonlocal_stmt), and(2), tok(KW_NONLOCAL), rule(name_list)) +DEF_RULE(global_stmt, c(global_nonlocal_stmt), and(2), tok(KW_GLOBAL), rule(name_list)) +DEF_RULE(nonlocal_stmt, c(global_nonlocal_stmt), and(2), tok(KW_NONLOCAL), rule(name_list)) DEF_RULE_NC(name_list, list, tok(NAME), tok(DEL_COMMA)) DEF_RULE(assert_stmt, c(assert_stmt), and(3), tok(KW_ASSERT), rule(test), opt_rule(assert_stmt_extra)) DEF_RULE_NC(assert_stmt_extra, and_ident(2), tok(DEL_COMMA), rule(test)) @@ -231,8 +231,8 @@ DEF_RULE(lambdef_nocond, c(lambdef), and_blank(4), tok(KW_LAMBDA), opt_rule(vara // power: atom_expr ['**' factor] // atom_expr: 'await' atom trailer* | atom trailer* -DEF_RULE(or_test, c(or_test), list, rule(and_test), tok(KW_OR)) -DEF_RULE(and_test, c(and_test), list, rule(not_test), tok(KW_AND)) +DEF_RULE(or_test, c(or_and_test), list, rule(and_test), tok(KW_OR)) +DEF_RULE(and_test, c(or_and_test), list, rule(not_test), tok(KW_AND)) DEF_RULE_NC(not_test, or(2), rule(not_test_2), rule(comparison)) DEF_RULE(not_test_2, c(not_test_2), and(2), tok(KW_NOT), rule(not_test)) DEF_RULE(comparison, c(comparison), list, rule(expr), rule(comp_op)) @@ -241,9 +241,9 @@ DEF_RULE_NC(comp_op_not_in, and(2), tok(KW_NOT), tok(KW_IN)) DEF_RULE_NC(comp_op_is, and(2), tok(KW_IS), opt_rule(comp_op_is_not)) DEF_RULE_NC(comp_op_is_not, and(1), tok(KW_NOT)) DEF_RULE(star_expr, c(star_expr), and(2), tok(OP_STAR), rule(expr)) -DEF_RULE(expr, c(expr), list, rule(xor_expr), tok(OP_PIPE)) -DEF_RULE(xor_expr, c(xor_expr), list, rule(and_expr), tok(OP_CARET)) -DEF_RULE(and_expr, c(and_expr), list, rule(shift_expr), tok(OP_AMPERSAND)) +DEF_RULE(expr, c(binary_op), list, rule(xor_expr), tok(OP_PIPE)) +DEF_RULE(xor_expr, c(binary_op), list, rule(and_expr), tok(OP_CARET)) +DEF_RULE(and_expr, c(binary_op), list, rule(shift_expr), tok(OP_AMPERSAND)) DEF_RULE(shift_expr, c(term), list, rule(arith_expr), rule(shift_op)) DEF_RULE_NC(shift_op, or(2), tok(OP_DBL_LESS), tok(OP_DBL_MORE)) DEF_RULE(arith_expr, c(term), list, rule(term), rule(arith_op)) @@ -290,8 +290,8 @@ DEF_RULE(trailer_period, c(trailer_period), and(2), tok(DEL_PERIOD), tok(NAME)) #if MICROPY_PY_BUILTINS_SLICE DEF_RULE(subscriptlist, c(generic_tuple), list_with_end, rule(subscript), tok(DEL_COMMA)) DEF_RULE_NC(subscript, or(2), rule(subscript_3), rule(subscript_2)) -DEF_RULE(subscript_2, c(subscript_2), and_ident(2), rule(test), opt_rule(subscript_3)) -DEF_RULE(subscript_3, c(subscript_3), and(2), tok(DEL_COLON), opt_rule(subscript_3b)) +DEF_RULE(subscript_2, c(subscript), and_ident(2), rule(test), opt_rule(subscript_3)) +DEF_RULE(subscript_3, c(subscript), and(2), tok(DEL_COLON), opt_rule(subscript_3b)) DEF_RULE_NC(subscript_3b, or(2), rule(subscript_3c), rule(subscript_3d)) DEF_RULE_NC(subscript_3c, and(2), tok(DEL_COLON), opt_rule(test)) DEF_RULE_NC(subscript_3d, and_ident(2), rule(test), opt_rule(sliceop)) diff --git a/py/lexer.c b/py/lexer.c index 6017d69d6dc64..00cd59bcae684 100644 --- a/py/lexer.c +++ b/py/lexer.c @@ -32,6 +32,8 @@ #include "py/lexer.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_ENABLE_COMPILER #define TAB_SIZE (8) @@ -62,6 +64,12 @@ STATIC bool is_char_or3(mp_lexer_t *lex, byte c1, byte c2, byte c3) { return lex->chr0 == c1 || lex->chr0 == c2 || lex->chr0 == c3; } +#if MICROPY_COMP_FSTRING_LITERAL +STATIC bool is_char_or4(mp_lexer_t *lex, byte c1, byte c2, byte c3, byte c4) { + return lex->chr0 == c1 || lex->chr0 == c2 || lex->chr0 == c3 || lex->chr0 == c4; +} +#endif + STATIC bool is_char_following(mp_lexer_t *lex, byte c) { return lex->chr1 == c; } @@ -105,7 +113,13 @@ STATIC bool is_following_odigit(mp_lexer_t *lex) { STATIC bool is_string_or_bytes(mp_lexer_t *lex) { return is_char_or(lex, '\'', '\"') +#if MICROPY_COMP_FSTRING_LITERAL + || (is_char_or4(lex, 'r', 'u', 'b', 'f') && is_char_following_or(lex, '\'', '\"')) + || ((is_char_and(lex, 'r', 'f') || is_char_and(lex, 'f', 'r')) + && is_char_following_following_or(lex, '\'', '\"')) +#else || (is_char_or3(lex, 'r', 'u', 'b') && is_char_following_or(lex, '\'', '\"')) +#endif || ((is_char_and(lex, 'r', 'b') || is_char_and(lex, 'b', 'r')) && is_char_following_following_or(lex, '\'', '\"')); } @@ -119,6 +133,31 @@ STATIC bool is_tail_of_identifier(mp_lexer_t *lex) { return is_head_of_identifier(lex) || is_digit(lex); } +#if MICROPY_COMP_FSTRING_LITERAL +STATIC void swap_char_banks(mp_lexer_t *lex) { + if (lex->vstr_postfix_processing) { + lex->chr3 = lex->chr0; + lex->chr4 = lex->chr1; + lex->chr5 = lex->chr2; + lex->chr0 = lex->vstr_postfix.buf[0]; + lex->chr1 = lex->vstr_postfix.buf[1]; + lex->chr2 = lex->vstr_postfix.buf[2]; + + lex->vstr_postfix_idx = 3; + } else { + // blindly reset to the "backup" bank when done postfix processing + // this restores control to the mp_reader + lex->chr0 = lex->chr3; + lex->chr1 = lex->chr4; + lex->chr2 = lex->chr5; + // willfully ignoring setting chr3-5 here - WARNING consider those garbage data now + + vstr_reset(&lex->vstr_postfix); + lex->vstr_postfix_idx = 0; + } +} +#endif + STATIC void next_char(mp_lexer_t *lex) { if (lex->chr0 == '\n') { // a new line @@ -134,7 +173,19 @@ STATIC void next_char(mp_lexer_t *lex) { lex->chr0 = lex->chr1; lex->chr1 = lex->chr2; - lex->chr2 = lex->reader.readbyte(lex->reader.data); + +#if MICROPY_COMP_FSTRING_LITERAL + if (lex->vstr_postfix_processing) { + if (lex->vstr_postfix_idx == lex->vstr_postfix.len) { + lex->chr2 = '\0'; + } else { + lex->chr2 = lex->vstr_postfix.buf[lex->vstr_postfix_idx++]; + } + } else +#endif + { + lex->chr2 = lex->reader.readbyte(lex->reader.data); + } if (lex->chr1 == '\r') { // CR is a new line, converted to LF @@ -149,6 +200,13 @@ STATIC void next_char(mp_lexer_t *lex) { if (lex->chr2 == MP_LEXER_EOF && lex->chr1 != MP_LEXER_EOF && lex->chr1 != '\n') { lex->chr2 = '\n'; } + +#if MICROPY_COMP_FSTRING_LITERAL + if (lex->vstr_postfix_processing && lex->chr0 == '\0') { + lex->vstr_postfix_processing = false; + swap_char_banks(lex); + } +#endif } STATIC void indent_push(mp_lexer_t *lex, size_t indent) { @@ -268,7 +326,7 @@ STATIC bool get_hex(mp_lexer_t *lex, size_t num_digits, mp_uint_t *result) { return true; } -STATIC void parse_string_literal(mp_lexer_t *lex, bool is_raw) { +STATIC void parse_string_literal(mp_lexer_t *lex, bool is_raw, bool is_fstring) { // get first quoting character char quote_char = '\''; if (is_char(lex, '\"')) { @@ -289,15 +347,71 @@ STATIC void parse_string_literal(mp_lexer_t *lex, bool is_raw) { } size_t n_closing = 0; +#if MICROPY_COMP_FSTRING_LITERAL + bool in_expression = false; + bool expression_eat = true; +#endif + while (!is_end(lex) && (num_quotes > 1 || !is_char(lex, '\n')) && n_closing < num_quotes) { if (is_char(lex, quote_char)) { n_closing += 1; vstr_add_char(&lex->vstr, CUR_CHAR(lex)); } else { n_closing = 0; +#if MICROPY_COMP_FSTRING_LITERAL + if (is_fstring && is_char(lex, '{')) { + vstr_add_char(&lex->vstr, CUR_CHAR(lex)); + in_expression = !in_expression; + expression_eat = in_expression; + + if (lex->vstr_postfix.len == 0) { + vstr_add_str(&lex->vstr_postfix, ".format("); + } + + next_char(lex); + continue; + } + + if (is_fstring && is_char(lex, '}')) { + vstr_add_char(&lex->vstr, CUR_CHAR(lex)); + + if (in_expression) { + in_expression = false; + vstr_add_char(&lex->vstr_postfix, ','); + } + + next_char(lex); + continue; + } + + if (in_expression) { + // throw errors for illegal chars inside f-string expressions + if (is_char(lex, '#')) { + lex->tok_kind = MP_TOKEN_FSTRING_COMMENT; + return; + } else if (is_char(lex, '\\')) { + lex->tok_kind = MP_TOKEN_FSTRING_BACKSLASH; + return; + } else if (is_char(lex, ':')) { + expression_eat = false; + } + + unichar c = CUR_CHAR(lex); + if (expression_eat) { + vstr_add_char(&lex->vstr_postfix, c); + } else { + vstr_add_char(&lex->vstr, c); + } + + next_char(lex); + continue; + } +#endif + if (is_char(lex, '\\')) { next_char(lex); unichar c = CUR_CHAR(lex); + if (is_raw) { // raw strings allow escaping of quotes, but the backslash is also emitted vstr_add_char(&lex->vstr, '\\'); @@ -340,7 +454,7 @@ STATIC void parse_string_literal(mp_lexer_t *lex, bool is_raw) { // 3MB of text; even gzip-compressed and with minimal structure, it'll take // roughly half a meg of storage. This form of Unicode escape may be added // later on, but it's definitely not a priority right now. -- CJA 20140607 - mp_raise_NotImplementedError("unicode name escapes"); + mp_raise_NotImplementedError(translate("unicode name escapes")); break; default: if (c >= '0' && c <= '7') { @@ -428,6 +542,15 @@ STATIC bool skip_whitespace(mp_lexer_t *lex, bool stop_at_newline) { } void mp_lexer_to_next(mp_lexer_t *lex) { +#if MICROPY_COMP_FSTRING_LITERAL + if (lex->vstr_postfix.len && !lex->vstr_postfix_processing) { + // end format call injection + vstr_add_char(&lex->vstr_postfix, ')'); + lex->vstr_postfix_processing = true; + swap_char_banks(lex); + } +#endif + // start new token text vstr_reset(&lex->vstr); @@ -479,10 +602,19 @@ void mp_lexer_to_next(mp_lexer_t *lex) { // MP_TOKEN_END is used to indicate that this is the first string token lex->tok_kind = MP_TOKEN_END; +#if MICROPY_COMP_FSTRING_LITERAL + bool saw_normal = false, saw_fstring = false; +#endif + // Loop to accumulate string/bytes literals do { // parse type codes bool is_raw = false; +#if MICROPY_COMP_FSTRING_LITERAL + bool is_fstring = false; +#else + const bool is_fstring = false; +#endif mp_token_kind_t kind = MP_TOKEN_STRING; int n_char = 0; if (is_char(lex, 'u')) { @@ -501,8 +633,34 @@ void mp_lexer_to_next(mp_lexer_t *lex) { kind = MP_TOKEN_BYTES; n_char = 2; } +#if MICROPY_COMP_FSTRING_LITERAL + if (is_char_following(lex, 'f')) { + lex->tok_kind = MP_TOKEN_FSTRING_RAW; + break; + } + } else if (is_char(lex, 'f')) { + if (is_char_following(lex, 'r')) { + lex->tok_kind = MP_TOKEN_FSTRING_RAW; + break; + } + n_char = 1; + is_fstring = true; +#endif } +#if MICROPY_COMP_FSTRING_LITERAL + if (is_fstring) { + saw_fstring = true; + } else { + saw_normal = true; + } + + if (saw_fstring && saw_normal) { + // Can't concatenate f-string with normal string + break; + } +#endif + // Set or check token kind if (lex->tok_kind == MP_TOKEN_END) { lex->tok_kind = kind; @@ -520,13 +678,12 @@ void mp_lexer_to_next(mp_lexer_t *lex) { } // Parse the literal - parse_string_literal(lex, is_raw); + parse_string_literal(lex, is_raw, is_fstring); // Skip whitespace so we can check if there's another string following skip_whitespace(lex, true); } while (is_string_or_bytes(lex)); - } else if (is_head_of_identifier(lex)) { lex->tok_kind = MP_TOKEN_NAME; @@ -590,6 +747,8 @@ void mp_lexer_to_next(mp_lexer_t *lex) { } vstr_add_char(&lex->vstr, CUR_CHAR(lex)); next_char(lex); + } else if (is_char(lex, '_')) { + next_char(lex); } else { break; } @@ -678,6 +837,9 @@ mp_lexer_t *mp_lexer_new(qstr src_name, mp_reader_t reader) { lex->num_indent_level = 1; lex->indent_level = m_new(uint16_t, lex->alloc_indent_level); vstr_init(&lex->vstr, 32); +#if MICROPY_COMP_FSTRING_LITERAL + vstr_init(&lex->vstr_postfix, 0); +#endif // store sentinel for first indentation level lex->indent_level[0] = 0; diff --git a/py/lexer.h b/py/lexer.h index a29709107d939..a3eaa2a7e616e 100644 --- a/py/lexer.h +++ b/py/lexer.h @@ -44,6 +44,14 @@ typedef enum _mp_token_kind_t { MP_TOKEN_INVALID, MP_TOKEN_DEDENT_MISMATCH, MP_TOKEN_LONELY_STRING_OPEN, +#if MICROPY_COMP_FSTRING_LITERAL + MP_TOKEN_FSTRING_BACKSLASH, + MP_TOKEN_FSTRING_COMMENT, + MP_TOKEN_FSTRING_UNCLOSED, + MP_TOKEN_FSTRING_UNOPENED, + MP_TOKEN_FSTRING_EMPTY_EXP, + MP_TOKEN_FSTRING_RAW, +#endif MP_TOKEN_NEWLINE, MP_TOKEN_INDENT, @@ -150,6 +158,9 @@ typedef struct _mp_lexer_t { mp_reader_t reader; // stream source unichar chr0, chr1, chr2; // current cached characters from source +#if MICROPY_COMP_FSTRING_LITERAL + unichar chr3, chr4, chr5; // current cached characters from alt source +#endif size_t line; // current source line size_t column; // current source column @@ -165,6 +176,11 @@ typedef struct _mp_lexer_t { size_t tok_column; // token source column mp_token_kind_t tok_kind; // token kind vstr_t vstr; // token data +#if MICROPY_COMP_FSTRING_LITERAL + vstr_t vstr_postfix; // postfix to apply to string + bool vstr_postfix_processing; + uint16_t vstr_postfix_idx; +#endif } mp_lexer_t; mp_lexer_t *mp_lexer_new(qstr src_name, mp_reader_t reader); diff --git a/py/makemoduledefs.py b/py/makemoduledefs.py new file mode 100644 index 0000000000000..18d327f002971 --- /dev/null +++ b/py/makemoduledefs.py @@ -0,0 +1,107 @@ +#!/usr/bin/env python + +# This pre-processor parses provided objects' c files for +# MP_REGISTER_MODULE(module_name, obj_module, enabled_define) +# These are used to generate a header with the required entries for +# "mp_rom_map_elem_t mp_builtin_module_table[]" in py/objmodule.c + +from __future__ import print_function + +import re +import os +import argparse + + +pattern = re.compile( + r"[\n;]\s*MP_REGISTER_MODULE\((.*?),\s*(.*?),\s*(.*?)\);", + flags=re.DOTALL +) + + +def find_c_file(obj_file, vpath): + """ Search vpaths for the c file that matches the provided object_file. + + :param str obj_file: object file to find the matching c file for + :param List[str] vpath: List of base paths, similar to gcc vpath + :return: str path to c file or None + """ + c_file = None + relative_c_file = os.path.splitext(obj_file)[0] + ".c" + relative_c_file = relative_c_file.lstrip('/\\') + for p in vpath: + possible_c_file = os.path.join(p, relative_c_file) + if os.path.exists(possible_c_file): + c_file = possible_c_file + break + + return c_file + + +def find_module_registrations(c_file): + """ Find any MP_REGISTER_MODULE definitions in the provided c file. + + :param str c_file: path to c file to check + :return: List[(module_name, obj_module, enabled_define)] + """ + global pattern + + if c_file is None: + # No c file to match the object file, skip + return set() + + with open(c_file) as c_file_obj: + return set(re.findall(pattern, c_file_obj.read())) + + +def generate_module_table_header(modules): + """ Generate header with module table entries for builtin modules. + + :param List[(module_name, obj_module, enabled_define)] modules: module defs + :return: None + """ + + # Print header file for all external modules. + mod_defs = [] + print("// Automatically generated by makemoduledefs.py.\n") + for module_name, obj_module, enabled_define in modules: + mod_def = "MODULE_DEF_{}".format(module_name.upper()) + mod_defs.append(mod_def) + print(( + "#if ({enabled_define})\n" + " extern const struct _mp_obj_module_t {obj_module};\n" + " #define {mod_def} {{ MP_ROM_QSTR({module_name}), MP_ROM_PTR(&{obj_module}) }},\n" + "#else\n" + " #define {mod_def}\n" + "#endif\n" + ).format(module_name=module_name, obj_module=obj_module, + enabled_define=enabled_define, mod_def=mod_def) + ) + + print("\n#define MICROPY_REGISTERED_MODULES \\") + + for mod_def in mod_defs: + print(" {mod_def} \\".format(mod_def=mod_def)) + + print("// MICROPY_REGISTERED_MODULES") + + +def main(): + parser = argparse.ArgumentParser() + parser.add_argument("--vpath", default=".", + help="comma separated list of folders to search for c files in") + parser.add_argument("files", nargs="*", + help="list of c files to search") + args = parser.parse_args() + + vpath = [p.strip() for p in args.vpath.split(',')] + + modules = set() + for obj_file in args.files: + c_file = find_c_file(obj_file, vpath) + modules |= find_module_registrations(c_file) + + generate_module_table_header(sorted(modules)) + + +if __name__ == '__main__': + main() diff --git a/py/makeqstrdata.py b/py/makeqstrdata.py index 38fde1a9c64bd..0d667959d9e03 100644 --- a/py/makeqstrdata.py +++ b/py/makeqstrdata.py @@ -9,6 +9,17 @@ import re import sys +import collections +import gettext +import os.path + +py = os.path.dirname(sys.argv[0]) +top = os.path.dirname(py) + +sys.path.append(os.path.join(top, "tools/huffman")) + +import huffman + # Python 2/3 compatibility: # - iterating through bytes is different # - codepoint2name lives in a different module @@ -51,6 +62,18 @@ codepoint2name[ord('|')] = 'pipe' codepoint2name[ord('~')] = 'tilde' +C_ESCAPES = { + "\a": "\\a", + "\b": "\\b", + "\f": "\\f", + "\n": "\\n", + "\r": "\\r", + "\t": "\\t", + "\v": "\\v", + "\'": "\\'", + "\"": "\\\"" +} + # this must match the equivalent function in qstr.c def compute_hash(qstr, bytes_hash): hash = 5381 @@ -59,6 +82,152 @@ def compute_hash(qstr, bytes_hash): # Make sure that valid hash is never zero, zero means "hash not computed" return (hash & ((1 << (8 * bytes_hash)) - 1)) or 1 +def translate(translation_file, i18ns): + with open(translation_file, "rb") as f: + table = gettext.GNUTranslations(f) + + translations = [] + for original in i18ns: + unescaped = original + for s in C_ESCAPES: + unescaped = unescaped.replace(C_ESCAPES[s], s) + translation = table.gettext(unescaped) + # Add in carriage returns to work in terminals + translation = translation.replace("\n", "\r\n") + translations.append((original, translation)) + return translations + +def compute_huffman_coding(translations, qstrs, compression_filename): + all_strings = [x[1] for x in translations] + + # go through each qstr and print it out + for _, _, qstr in qstrs.values(): + all_strings.append(qstr) + all_strings_concat = "".join(all_strings) + counts = collections.Counter(all_strings_concat) + cb = huffman.codebook(counts.items()) + values = [] + length_count = {} + renumbered = 0 + last_l = None + canonical = {} + for ch, code in sorted(cb.items(), key=lambda x: (len(x[1]), x[0])): + values.append(ch) + l = len(code) + if l not in length_count: + length_count[l] = 0 + length_count[l] += 1 + if last_l: + renumbered <<= (l - last_l) + canonical[ch] = '{0:0{width}b}'.format(renumbered, width=l) + s = C_ESCAPES.get(ch, ch) + print("//", ord(ch), s, counts[ch], canonical[ch], renumbered) + renumbered += 1 + last_l = l + lengths = bytearray() + print("// length count", length_count) + for i in range(1, max(length_count) + 2): + lengths.append(length_count.get(i, 0)) + print("// values", values, "lengths", len(lengths), lengths) + print("// estimated total memory size", len(lengths) + 2*len(values) + sum(len(cb[u]) for u in all_strings_concat)) + print("//", values, lengths) + values_type = "uint16_t" if max(ord(u) for u in values) > 255 else "uint8_t" + with open(compression_filename, "w") as f: + f.write("const uint8_t lengths[] = {{ {} }};\n".format(", ".join(map(str, lengths)))) + f.write("const {} values[] = {{ {} }};\n".format(values_type, ", ".join(str(ord(u)) for u in values))) + return values, lengths + +def decompress(encoding_table, length, encoded): + values, lengths = encoding_table + #print(l, encoded) + dec = [] + this_byte = 0 + this_bit = 7 + b = encoded[this_byte] + for i in range(length): + bits = 0 + bit_length = 0 + max_code = lengths[0] + searched_length = lengths[0] + while True: + bits <<= 1 + if 0x80 & b: + bits |= 1 + + b <<= 1 + bit_length += 1 + if this_bit == 0: + this_bit = 7 + this_byte += 1 + if this_byte < len(encoded): + b = encoded[this_byte] + else: + this_bit -= 1 + if max_code > 0 and bits < max_code: + #print('{0:0{width}b}'.format(bits, width=bit_length)) + break + max_code = (max_code << 1) + lengths[bit_length] + searched_length += lengths[bit_length] + + v = values[searched_length + bits - max_code] + dec.append(v) + return ''.join(dec) + +def compress(encoding_table, decompressed): + if not isinstance(decompressed, str): + raise TypeError() + values, lengths = encoding_table + enc = bytearray(len(decompressed) * 3) + #print(decompressed) + #print(lengths) + current_bit = 7 + current_byte = 0 + for c in decompressed: + #print() + #print("char", c, values.index(c)) + start = 0 + end = lengths[0] + bits = 1 + compressed = None + code = 0 + while compressed is None: + s = start + e = end + #print("{0:0{width}b}".format(code, width=bits)) + # Binary search! + while e > s: + midpoint = (s + e) // 2 + #print(s, e, midpoint) + if values[midpoint] == c: + compressed = code + (midpoint - start) + #print("found {0:0{width}b}".format(compressed, width=bits)) + break + elif c < values[midpoint]: + e = midpoint + else: + s = midpoint + 1 + code += end - start + code <<= 1 + start = end + end += lengths[bits] + bits += 1 + #print("next bit", bits) + + for i in range(bits - 1, 0, -1): + if compressed & (1 << (i - 1)): + enc[current_byte] |= 1 << current_bit + if current_bit == 0: + current_bit = 7 + #print("packed {0:0{width}b}".format(enc[current_byte], width=8)) + current_byte += 1 + else: + current_bit -= 1 + if current_bit != 7: + current_byte += 1 + if current_byte > len(decompressed): + print("Note: compression increased length", repr(decompressed), len(decompressed), current_byte, file=sys.stderr) + return enc[:current_byte] + def qstr_escape(qst): def esc_char(m): c = ord(m.group(0)) @@ -73,6 +242,7 @@ def parse_input_headers(infiles): # read the qstrs in from the input files qcfgs = {} qstrs = {} + i18ns = set() for infile in infiles: with open(infile, 'rt') as f: for line in f: @@ -88,6 +258,12 @@ def parse_input_headers(infiles): qcfgs[match.group(1)] = value continue + + match = re.match(r'^TRANSLATE\("(.*)"\)$', line) + if match: + i18ns.add(match.group(1)) + continue + # is this a QSTR line? match = re.match(r'^Q\((.*)\)$', line) if not match: @@ -114,15 +290,18 @@ def parse_input_headers(infiles): if ident == "": # Sort empty qstr above all still order = -200000 + elif ident == "__dir__": + # Put __dir__ after empty qstr for builtin dir() to work + order = -190000 elif ident.startswith("__"): order -= 100000 qstrs[ident] = (order, ident, qstr) - if not qcfgs: + if not qcfgs and qstrs: sys.stderr.write("ERROR: Empty preprocessor output - check for errors above\n") sys.exit(1) - return qcfgs, qstrs + return qcfgs, qstrs, i18ns def make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr): qbytes = bytes_cons(qstr, 'utf8') @@ -141,7 +320,7 @@ def make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr): qhash_str = ('\\x%02x' * cfg_bytes_hash) % tuple(((qhash >> (8 * i)) & 0xff) for i in range(cfg_bytes_hash)) return '(const byte*)"%s%s" "%s"' % (qhash_str, qlen_str, qdata) -def print_qstr_data(qcfgs, qstrs): +def print_qstr_data(encoding_table, qcfgs, qstrs, i18ns): # get config variables cfg_bytes_len = int(qcfgs['BYTES_IN_LEN']) cfg_bytes_hash = int(qcfgs['BYTES_IN_HASH']) @@ -153,14 +332,61 @@ def print_qstr_data(qcfgs, qstrs): # add NULL qstr with no hash or data print('QDEF(MP_QSTR_NULL, (const byte*)"%s%s" "")' % ('\\x00' * cfg_bytes_hash, '\\x00' * cfg_bytes_len)) + total_qstr_size = 0 + total_qstr_compressed_size = 0 # go through each qstr and print it out for order, ident, qstr in sorted(qstrs.values(), key=lambda x: x[0]): qbytes = make_bytes(cfg_bytes_len, cfg_bytes_hash, qstr) print('QDEF(MP_QSTR_%s, %s)' % (ident, qbytes)) + total_qstr_size += len(qstr) + + total_text_size = 0 + total_text_compressed_size = 0 + for original, translation in i18ns: + translation_encoded = translation.encode("utf-8") + compressed = compress(encoding_table, translation) + total_text_compressed_size += len(compressed) + decompressed = decompress(encoding_table, len(translation_encoded), compressed) + for c in C_ESCAPES: + decompressed = decompressed.replace(c, C_ESCAPES[c]) + print("TRANSLATION(\"{}\", {}, {{ {} }}) // {}".format(original, len(translation_encoded)+1, ", ".join(["0x{:02x}".format(x) for x in compressed]), decompressed)) + total_text_size += len(translation.encode("utf-8")) + + print() + print("// {} bytes worth of qstr".format(total_qstr_size)) + print("// {} bytes worth of translations".format(total_text_size)) + print("// {} bytes worth of translations compressed".format(total_text_compressed_size)) + print("// {} bytes saved".format(total_text_size - total_text_compressed_size)) + +def print_qstr_enums(qstrs): + # print out the starter of the generated C header file + print('// This file was automatically generated by makeqstrdata.py') + print('') -def do_work(infiles): - qcfgs, qstrs = parse_input_headers(infiles) - print_qstr_data(qcfgs, qstrs) + # add NULL qstr with no hash or data + print('QENUM(MP_QSTR_NULL)') + + # go through each qstr and print it out + for order, ident, qstr in sorted(qstrs.values(), key=lambda x: x[0]): + print('QENUM(MP_QSTR_%s)' % (ident,)) if __name__ == "__main__": - do_work(sys.argv[1:]) + import argparse + + parser = argparse.ArgumentParser(description='Process QSTR definitions into headers for compilation') + parser.add_argument('infiles', metavar='N', type=str, nargs='+', + help='an integer for the accumulator') + parser.add_argument('--translation', default=None, type=str, + help='translations for i18n() items') + parser.add_argument('--compression_filename', default=None, type=str, + help='header for compression info') + + args = parser.parse_args() + + qcfgs, qstrs, i18ns = parse_input_headers(args.infiles) + if args.translation: + translations = translate(args.translation, i18ns) + encoding_table = compute_huffman_coding(translations, qstrs, args.compression_filename) + print_qstr_data(encoding_table, qcfgs, qstrs, translations) + else: + print_qstr_enums(qstrs) diff --git a/py/makeqstrdefs.py b/py/makeqstrdefs.py index 0a45c585a6da3..cb27ced356040 100644 --- a/py/makeqstrdefs.py +++ b/py/makeqstrdefs.py @@ -73,14 +73,22 @@ def qstr_unescape(qstr): return qstr def process_file(f): + re_line = re.compile(r"#[line]*\s(\d+)\s\"([^\"]+)\"") + re_qstr = re.compile(r'MP_QSTR_[_a-zA-Z0-9]+') + re_translate = re.compile(r'translate\(\"((?:(?=(\\?))\2.)*?)\"\)') output = [] last_fname = None + lineno = 0 for line in f: + if line.isspace(): + continue # match gcc-like output (# n "file") and msvc-like output (#line n "file") - if line and (line[0:2] == "# " or line[0:5] == "#line"): - m = re.match(r"#[line]*\s\d+\s\"([^\"]+)\"", line) + if line.startswith(('# ', '#line')): + m = re_line.match(line) assert m is not None - fname = m.group(1) + #print(m.groups()) + lineno = int(m.group(1)) + fname = m.group(2) if not fname.endswith(".c"): continue if fname != last_fname: @@ -88,10 +96,13 @@ def process_file(f): output = [] last_fname = fname continue - for match in re.findall(r'MP_QSTR_[_a-zA-Z0-9]+', line): + for match in re_qstr.findall(line): name = match.replace('MP_QSTR_', '') if name not in QSTRING_BLACK_LIST: output.append('Q(' + qstr_unescape(name) + ')') + for match in re_translate.findall(line): + output.append('TRANSLATE("' + match[0] + '")') + lineno += 1 write_out(last_fname, output) return "" diff --git a/py/makeversionhdr.py b/py/makeversionhdr.py index ebd887445b7f6..7ceeaeaddedf7 100644 --- a/py/makeversionhdr.py +++ b/py/makeversionhdr.py @@ -52,7 +52,7 @@ def get_version_info_from_git(): return git_tag, git_hash, ver def get_version_info_from_docs_conf(): - with open(os.path.join(os.path.dirname(sys.argv[0]), "..", "docs", "conf.py")) as f: + with open(os.path.join(os.path.dirname(sys.argv[0]), "..", "conf.py")) as f: for line in f: if line.startswith("version = release = '"): ver = line.strip().split(" = ")[2].strip("'") @@ -100,7 +100,6 @@ def make_version_header(filename): # Only write the file if we need to if write_file: - print("Generating %s" % filename) with open(filename, 'w') as f: f.write(file_data) diff --git a/py/malloc.c b/py/malloc.c index d6983ffdfcef7..f190582ab27d6 100644 --- a/py/malloc.c +++ b/py/malloc.c @@ -39,6 +39,9 @@ #endif #if MICROPY_MEM_STATS +#if !MICROPY_MALLOC_USES_ALLOCATED_SIZE +#error MICROPY_MEM_STATS requires MICROPY_MALLOC_USES_ALLOCATED_SIZE +#endif #define UPDATE_PEAK() { if (MP_STATE_MEM(current_bytes_allocated) > MP_STATE_MEM(peak_bytes_allocated)) MP_STATE_MEM(peak_bytes_allocated) = MP_STATE_MEM(current_bytes_allocated); } #endif @@ -117,9 +120,6 @@ void *m_malloc_with_finaliser(size_t num_bytes) { void *m_malloc0(size_t num_bytes, bool long_lived) { void *ptr = m_malloc(num_bytes, long_lived); - if (ptr == NULL && num_bytes != 0) { - m_malloc_fail(num_bytes); - } // If this config is set then the GC clears all memory, so we don't need to. #if !MICROPY_GC_CONSERVATIVE_CLEAR memset(ptr, 0, num_bytes); @@ -147,7 +147,11 @@ void *m_realloc(void *ptr, size_t new_num_bytes) { MP_STATE_MEM(current_bytes_allocated) += diff; UPDATE_PEAK(); #endif + #if MICROPY_MALLOC_USES_ALLOCATED_SIZE DEBUG_printf("realloc %p, %d, %d : %p\n", ptr, old_num_bytes, new_num_bytes, new_ptr); + #else + DEBUG_printf("realloc %p, %d : %p\n", ptr, new_num_bytes, new_ptr); + #endif return new_ptr; } @@ -171,7 +175,11 @@ void *m_realloc_maybe(void *ptr, size_t new_num_bytes, bool allow_move) { UPDATE_PEAK(); } #endif + #if MICROPY_MALLOC_USES_ALLOCATED_SIZE DEBUG_printf("realloc %p, %d, %d : %p\n", ptr, old_num_bytes, new_num_bytes, new_ptr); + #else + DEBUG_printf("realloc %p, %d, %d : %p\n", ptr, new_num_bytes, new_ptr); + #endif return new_ptr; } @@ -184,7 +192,11 @@ void m_free(void *ptr) { #if MICROPY_MEM_STATS MP_STATE_MEM(current_bytes_allocated) -= num_bytes; #endif + #if MICROPY_MALLOC_USES_ALLOCATED_SIZE DEBUG_printf("free %p, %d\n", ptr, num_bytes); + #else + DEBUG_printf("free %p\n", ptr); + #endif } #if MICROPY_MEM_STATS diff --git a/py/map.c b/py/map.c index 4f76b9b16c689..57c11dbc9761b 100644 --- a/py/map.c +++ b/py/map.c @@ -33,6 +33,15 @@ #include "py/misc.h" #include "py/runtime.h" +#include "supervisor/linker.h" + +#if MICROPY_DEBUG_VERBOSE // print debugging info +#define DEBUG_PRINT (1) +#else // don't print debugging info +#define DEBUG_PRINT (0) +#define DEBUG_printf(...) (void)0 +#endif + // Fixed empty map. Useful when need to call kw-receiving functions // without any keywords from C, etc. const mp_map_t mp_const_empty_map = { @@ -114,6 +123,7 @@ void mp_map_clear(mp_map_t *map) { STATIC void mp_map_rehash(mp_map_t *map) { size_t old_alloc = map->alloc; size_t new_alloc = get_hash_alloc_greater_or_equal_to(map->alloc + 1); + DEBUG_printf("mp_map_rehash(%p): " UINT_FMT " -> " UINT_FMT "\n", map, old_alloc, new_alloc); mp_map_elem_t *old_table = map->table; mp_map_elem_t *new_table = m_new0(mp_map_elem_t, new_alloc); // If we reach this point, table resizing succeeded, now we can edit the old map. @@ -135,7 +145,7 @@ STATIC void mp_map_rehash(mp_map_t *map) { // - returns slot, with key non-null and value=MP_OBJ_NULL if it was added // MP_MAP_LOOKUP_REMOVE_IF_FOUND behaviour: // - returns NULL if not found, else the slot if was found in with key null and value non-null -mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) { +mp_map_elem_t *PLACE_IN_ITCM(mp_map_lookup)(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) { // If the map is a fixed array then we must only be called for a lookup assert(!map->is_fixed || lookup_kind == MP_MAP_LOOKUP); @@ -162,6 +172,7 @@ mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t if (map->is_ordered) { for (mp_map_elem_t *elem = &map->table[0], *top = &map->table[map->used]; elem < top; elem++) { if (elem->key == index || (!compare_only_ptrs && mp_obj_equal(elem->key, index))) { + #if MICROPY_PY_COLLECTIONS_ORDEREDDICT if (MP_UNLIKELY(lookup_kind == MP_MAP_LOOKUP_REMOVE_IF_FOUND)) { // remove the found element by moving the rest of the array down mp_obj_t value = elem->value; @@ -172,9 +183,11 @@ mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t elem->key = MP_OBJ_NULL; elem->value = value; } + #endif return elem; } } + #if MICROPY_PY_COLLECTIONS_ORDEREDDICT if (MP_LIKELY(lookup_kind != MP_MAP_LOOKUP_ADD_IF_NOT_FOUND)) { return NULL; } @@ -190,6 +203,9 @@ mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t map->all_keys_are_qstrs = 0; } return elem; + #else + return NULL; + #endif } // map is a hash table (not an ordered array), so do a hash lookup diff --git a/py/misc.h b/py/misc.h index d9a8efe7f85b6..673568f2266e2 100644 --- a/py/misc.h +++ b/py/misc.h @@ -52,6 +52,9 @@ typedef unsigned int uint; #define _MP_STRINGIFY(x) #x #define MP_STRINGIFY(x) _MP_STRINGIFY(x) +// Static assertion macro +#define MP_STATIC_ASSERT(cond) ((void)sizeof(char[1 - 2 * !(cond)])) + /** memory allocation ******************************************/ // TODO make a lazy m_renew that can increase by a smaller amount than requested (but by at least 1 more element) @@ -70,8 +73,10 @@ typedef unsigned int uint; #define m_new_ll_obj_var_maybe(obj_type, var_type, var_num) ((obj_type*)m_malloc_maybe(sizeof(obj_type) + sizeof(var_type) * (var_num), true)) #if MICROPY_ENABLE_FINALISER #define m_new_obj_with_finaliser(type) ((type*)(m_malloc_with_finaliser(sizeof(type)))) +#define m_new_obj_var_with_finaliser(type, var_type, var_num) ((type*)m_malloc_with_finaliser(sizeof(type) + sizeof(var_type) * (var_num))) #else #define m_new_obj_with_finaliser(type) m_new_obj(type) +#define m_new_obj_var_with_finaliser(type, var_type, var_num) m_new_obj_var(type, var_type, var_num) #endif #if MICROPY_MALLOC_USES_ALLOCATED_SIZE #define m_renew(type, ptr, old_num, new_num) ((type*)(m_realloc((ptr), sizeof(type) * (old_num), sizeof(type) * (new_num)))) @@ -126,8 +131,15 @@ typedef uint32_t unichar; typedef uint unichar; #endif +#if MICROPY_PY_BUILTINS_STR_UNICODE unichar utf8_get_char(const byte *s); const byte *utf8_next_char(const byte *s); +size_t utf8_charlen(const byte *str, size_t len); +#else +static inline unichar utf8_get_char(const byte *s) { return *s; } +static inline const byte *utf8_next_char(const byte *s) { return s + 1; } +static inline size_t utf8_charlen(const byte *str, size_t len) { (void)str; return len; } +#endif bool unichar_isspace(unichar c); bool unichar_isalpha(unichar c); @@ -140,7 +152,6 @@ bool unichar_islower(unichar c); unichar unichar_tolower(unichar c); unichar unichar_toupper(unichar c); mp_uint_t unichar_xdigit_value(unichar c); -mp_uint_t unichar_charlen(const char *str, mp_uint_t len); #define UTF8_IS_NONASCII(ch) ((ch) & 0x80) #define UTF8_IS_CONT(ch) (((ch) & 0xC0) == 0x80) @@ -203,20 +214,6 @@ int DEBUG_printf(const char *fmt, ...); extern mp_uint_t mp_verbose_flag; -// This is useful for unicode handling. Some CPU archs has -// special instructions for efficient implementation of this -// function (e.g. CLZ on ARM). -// NOTE: this function is unused at the moment -#ifndef count_lead_ones -static inline mp_uint_t count_lead_ones(byte val) { - mp_uint_t c = 0; - for (byte mask = 0x80; val & mask; mask >>= 1) { - c++; - } - return c; -} -#endif - /** float internals *************/ #if MICROPY_PY_BUILTINS_FLOAT diff --git a/py/mkenv.mk b/py/mkenv.mk index 5f8cd902bf295..b76dd60f8566d 100644 --- a/py/mkenv.mk +++ b/py/mkenv.mk @@ -49,6 +49,9 @@ CP = cp FIND = find MKDIR = mkdir PYTHON = python +# Set default python interpreters +PYTHON2 ?= $(which python2 || which python2.7) +PYTHON3 ?= python3 RM = rm RSYNC = rsync SED = sed @@ -67,9 +70,9 @@ CXX += -m32 LD += -m32 endif -MAKE_FROZEN = $(TOP)/tools/make-frozen.py +MAKE_FROZEN = $(PYTHON) $(TOP)/tools/make-frozen.py MPY_CROSS = $(TOP)/mpy-cross/mpy-cross -MPY_TOOL = $(TOP)/tools/mpy-tool.py +MPY_TOOL = $(PYTHON3) $(TOP)/tools/mpy-tool.py PREPROCESS_FROZEN_MODULES = PYTHONPATH=$(TOP)/tools/python-semver $(TOP)/tools/preprocess_frozen_modules.py all: diff --git a/py/mkrules.mk b/py/mkrules.mk index 7385ad57ac2a6..292d257465152 100644 --- a/py/mkrules.mk +++ b/py/mkrules.mk @@ -20,12 +20,12 @@ endif # can be located. By following this scheme, it allows a single build rule # to be used to compile all .c files. -vpath %.S . $(TOP) +vpath %.S . $(TOP) $(USER_C_MODULES) $(BUILD)/%.o: %.S $(STEPECHO) "CC $<" $(Q)$(CC) $(CFLAGS) -c -o $@ $< -vpath %.s . $(TOP) +vpath %.s . $(TOP) $(USER_C_MODULES) $(BUILD)/%.o: %.s $(STEPECHO) "AS $<" $(Q)$(AS) -o $@ $< @@ -42,23 +42,21 @@ $(Q)$(CC) $(CFLAGS) -c -MD -o $@ $< $(RM) -f $(@:.o=.d) endef -vpath %.c . $(TOP) +vpath %.c . $(TOP) $(USER_C_MODULES) $(BUILD)/%.o: %.c $(call compile_c) +QSTR_GEN_EXTRA_CFLAGS += -DNO_QSTR + # frozen.c and frozen_mpy.c are created in $(BUILD), so use our rule # for those as well. vpath %.c . $(BUILD) $(BUILD)/%.o: %.c $(call compile_c) -# List all native flags since the current build system doesn't have -# the MicroPython configuration available. However, these flags are -# needed to extract all qstrings -QSTR_GEN_EXTRA_CFLAGS += -DNO_QSTR -DN_X64 -DN_X86 -DN_THUMB -DN_ARM -DN_XTENSA QSTR_GEN_EXTRA_CFLAGS += -I$(BUILD)/tmp -vpath %.c . $(TOP) +vpath %.c . $(TOP) $(USER_C_MODULES) $(BUILD)/%.pp: %.c $(STEPECHO) "PreProcess $<" @@ -73,20 +71,24 @@ $(BUILD)/%.pp: %.c # the right .o's to get recompiled if the generated.h file changes. Adding # an order-only dependency to all of the .o's will cause the generated .h # to get built before we try to compile any of them. -$(OBJ): | $(HEADER_BUILD)/qstrdefs.generated.h $(HEADER_BUILD)/mpversion.h +$(OBJ): | $(HEADER_BUILD)/qstrdefs.enum.h $(HEADER_BUILD)/mpversion.h -$(HEADER_BUILD)/qstr.i.last: $(SRC_QSTR) | $(HEADER_BUILD)/mpversion.h - $(ECHO) "GEN $@" - $(Q)$(CPP) $(QSTR_GEN_EXTRA_CFLAGS) $(CFLAGS) $(if $?,$?,$^) >$(HEADER_BUILD)/qstr.i.last; +# The logic for qstr regeneration is: +# - if anything in QSTR_GLOBAL_DEPENDENCIES is newer, then process all source files ($^) +# - else, if list of newer prerequisites ($?) is not empty, then process just these ($?) +# - else, process all source files ($^) [this covers "make -B" which can set $? to empty] +$(HEADER_BUILD)/qstr.i.last: $(SRC_QSTR) $(SRC_QSTR_PREPROCESSOR) $(QSTR_GLOBAL_DEPENDENCIES) | $(HEADER_BUILD)/mpversion.h + $(STEPECHO) "GEN $@" + $(Q)grep -lE "(MP_QSTR|translate)" $(if $(filter $?,$(QSTR_GLOBAL_DEPENDENCIES)),$^,$(if $?,$?,$^)) | xargs $(CPP) $(QSTR_GEN_EXTRA_CFLAGS) $(CFLAGS) $(SRC_QSTR_PREPROCESSOR) >$(HEADER_BUILD)/qstr.i.last; -$(HEADER_BUILD)/qstr.split: $(HEADER_BUILD)/qstr.i.last +$(HEADER_BUILD)/qstr.split: $(HEADER_BUILD)/qstr.i.last $(PY_SRC)/makeqstrdefs.py $(STEPECHO) "GEN $@" - $(Q)$(PYTHON) $(PY_SRC)/makeqstrdefs.py split $(HEADER_BUILD)/qstr.i.last $(HEADER_BUILD)/qstr $(QSTR_DEFS_COLLECTED) + $(Q)$(PYTHON3) $(PY_SRC)/makeqstrdefs.py split $(HEADER_BUILD)/qstr.i.last $(HEADER_BUILD)/qstr $(QSTR_DEFS_COLLECTED) $(Q)touch $@ -$(QSTR_DEFS_COLLECTED): $(HEADER_BUILD)/qstr.split +$(QSTR_DEFS_COLLECTED): $(HEADER_BUILD)/qstr.split $(PY_SRC)/makeqstrdefs.py $(STEPECHO) "GEN $@" - $(Q)$(PYTHON) $(PY_SRC)/makeqstrdefs.py cat $(HEADER_BUILD)/qstr.i.last $(HEADER_BUILD)/qstr $(QSTR_DEFS_COLLECTED) + $(Q)$(PYTHON3) $(PY_SRC)/makeqstrdefs.py cat $(HEADER_BUILD)/qstr.i.last $(HEADER_BUILD)/qstr $(QSTR_DEFS_COLLECTED) # $(sort $(var)) removes duplicates # @@ -123,14 +125,14 @@ $(BUILD)/frozen_mpy: $(FROZEN_MPY_DIRS) $(Q)$(PREPROCESS_FROZEN_MODULES) -o $@ $(FROZEN_MPY_DIRS) $(Q)$(CD) $@ && \ $(FIND) -L . -type f -name '*.py' | sed 's=^\./==' | \ -xargs -n1 $(abspath $(MPY_CROSS)) $(MPY_CROSS_FLAGS) +xargs -n1 "$(abspath $(MPY_CROSS))" $(MPY_CROSS_FLAGS) # to build frozen_mpy.c from all .mpy files # You need to define MPY_TOOL_LONGINT_IMPL in mpconfigport.mk # if the default will not work (mpz is the default). -$(BUILD)/frozen_mpy.c: $(BUILD)/frozen_mpy $(BUILD)/genhdr/qstrdefs.generated.h +$(BUILD)/frozen_mpy.c: $(BUILD)/frozen_mpy $(BUILD)/genhdr/qstrdefs.generated.h $(TOP)/tools/mpy-tool.py $(STEPECHO) "Creating $@" - $(Q)$(PYTHON) $(MPY_TOOL) $(MPY_TOOL_LONGINT_IMPL) -f -q $(BUILD)/genhdr/qstrdefs.preprocessed.h $(shell $(FIND) -L $(BUILD)/frozen_mpy -type f -name '*.mpy') > $@ + $(Q)$(MPY_TOOL) $(MPY_TOOL_LONGINT_IMPL) -f -q $(BUILD)/genhdr/qstrdefs.preprocessed.h $(shell $(FIND) -L $(BUILD)/frozen_mpy -type f -name '*.mpy') > $@ endif ifneq ($(PROG),) @@ -171,6 +173,27 @@ clean: $(RM) -rf $(BUILD) $(CLEAN_EXTRA) .PHONY: clean +# Clean every non-git file from FROZEN_DIR/FROZEN_MPY_DIR, but making a backup. +# We run rmdir below to avoid empty backup dir (it will silently fail if backup +# is non-empty). +clean-frozen: + if [ -n "$(FROZEN_MPY_DIR)" ]; then \ + backup_dir=$(FROZEN_MPY_DIR).$$(date +%Y%m%dT%H%M%S); mkdir $$backup_dir; \ + cd $(FROZEN_MPY_DIR); git status --ignored -u all -s . | awk ' {print $$2}' \ + | xargs --no-run-if-empty cp --parents -t ../$$backup_dir; \ + rmdir ../$$backup_dir 2>/dev/null || true; \ + git clean -d -f .; \ + fi + + if [ -n "$(FROZEN_DIR)" ]; then \ + backup_dir=$(FROZEN_DIR).$$(date +%Y%m%dT%H%M%S); mkdir $$backup_dir; \ + cd $(FROZEN_DIR); git status --ignored -u all -s . | awk ' {print $$2}' \ + | xargs --no-run-if-empty cp --parents -t ../$$backup_dir; \ + rmdir ../$$backup_dir 2>/dev/null || true; \ + git clean -d -f .; \ + fi +.PHONY: clean-frozen + print-cfg: $(ECHO) "PY_SRC = $(PY_SRC)" $(ECHO) "BUILD = $(BUILD)" @@ -187,4 +210,3 @@ tags: ctags -e -R $(TOP) -include $(OBJ:.o=.P) - diff --git a/py/modbuiltins.c b/py/modbuiltins.c index 5e11b8d18cdcf..e764f1987eff1 100644 --- a/py/modbuiltins.c +++ b/py/modbuiltins.c @@ -35,6 +35,8 @@ #include "py/builtin.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include #endif @@ -137,7 +139,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_callable_obj, mp_builtin_callable); STATIC mp_obj_t mp_builtin_chr(mp_obj_t o_in) { #if MICROPY_PY_BUILTINS_STR_UNICODE mp_uint_t c = mp_obj_get_int(o_in); - char str[4]; + uint8_t str[4]; int len = 0; if (c < 0x80) { *str = c; len = 1; @@ -157,62 +159,47 @@ STATIC mp_obj_t mp_builtin_chr(mp_obj_t o_in) { str[3] = (c & 0x3F) | 0x80; len = 4; } else { - mp_raise_ValueError("chr() arg not in range(0x110000)"); + mp_raise_ValueError(translate("chr() arg not in range(0x110000)")); } - return mp_obj_new_str(str, len, true); + return mp_obj_new_str_via_qstr((char*)str, len); #else mp_int_t ord = mp_obj_get_int(o_in); if (0 <= ord && ord <= 0xff) { - char str[1] = {ord}; - return mp_obj_new_str(str, 1, true); + uint8_t str[1] = {ord}; + return mp_obj_new_str_via_qstr((char*)str, 1); } else { - mp_raise_ValueError("chr() arg not in range(256)"); + mp_raise_ValueError(translate("chr() arg not in range(256)")); } #endif } MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_chr_obj, mp_builtin_chr); STATIC mp_obj_t mp_builtin_dir(size_t n_args, const mp_obj_t *args) { - // TODO make this function more general and less of a hack - - mp_obj_dict_t *dict = NULL; - mp_map_t *members = NULL; - if (n_args == 0) { - // make a list of names in the local name space - dict = mp_locals_get(); - } else { // n_args == 1 - // make a list of names in the given object - if (MP_OBJ_IS_TYPE(args[0], &mp_type_module)) { - dict = mp_obj_module_get_globals(args[0]); - } else { - mp_obj_type_t *type; - if (MP_OBJ_IS_TYPE(args[0], &mp_type_type)) { - type = MP_OBJ_TO_PTR(args[0]); - } else { - type = mp_obj_get_type(args[0]); - } - if (type->locals_dict != NULL && type->locals_dict->base.type == &mp_type_dict) { - dict = type->locals_dict; - } - } - if (mp_obj_is_instance_type(mp_obj_get_type(args[0]))) { - mp_obj_instance_t *inst = MP_OBJ_TO_PTR(args[0]); - members = &inst->members; - } - } - mp_obj_t dir = mp_obj_new_list(0, NULL); - if (dict != NULL) { + if (n_args == 0) { + // Make a list of names in the local namespace + mp_obj_dict_t *dict = mp_locals_get(); for (size_t i = 0; i < dict->map.alloc; i++) { if (MP_MAP_SLOT_IS_FILLED(&dict->map, i)) { mp_obj_list_append(dir, dict->map.table[i].key); } } - } - if (members != NULL) { - for (size_t i = 0; i < members->alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(members, i)) { - mp_obj_list_append(dir, members->table[i].key); + } else { // n_args == 1 + // Make a list of names in the given object + // Implemented by probing all possible qstrs with mp_load_method_maybe + size_t nqstr = QSTR_TOTAL(); + for (size_t i = MP_QSTR_ + 1; i < nqstr; ++i) { + mp_obj_t dest[2]; + mp_load_method_protected(args[0], i, dest, false); + if (dest[0] != MP_OBJ_NULL) { + #if MICROPY_PY_ALL_SPECIAL_METHODS + // Support for __dir__: see if we can dispatch to this special method + // This relies on MP_QSTR__dir__ being first after MP_QSTR_ + if (i == MP_QSTR___dir__ && dest[1] != MP_OBJ_NULL) { + return mp_call_method_n_kw(0, 0, dest); + } + #endif + mp_obj_list_append(dir, MP_OBJ_NEW_QSTR(i)); } } } @@ -295,7 +282,7 @@ STATIC mp_obj_t mp_builtin_min_max(size_t n_args, const mp_obj_t *args, mp_map_t if (default_elem != NULL) { best_obj = default_elem->value; } else { - mp_raise_ValueError("arg is an empty sequence"); + mp_raise_ValueError(translate("arg is an empty sequence")); } } return best_obj; @@ -329,7 +316,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_min_obj, 1, mp_builtin_min); STATIC mp_obj_t mp_builtin_next(mp_obj_t o) { mp_obj_t ret = mp_iternext_allow_raise(o); if (ret == MP_OBJ_STOP_ITERATION) { - mp_raise_msg(&mp_type_StopIteration, ""); + mp_raise_msg(&mp_type_StopIteration, NULL); } else { return ret; } @@ -343,27 +330,27 @@ MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_oct_obj, mp_builtin_oct); STATIC mp_obj_t mp_builtin_ord(mp_obj_t o_in) { size_t len; - const char *str = mp_obj_str_get_data(o_in, &len); + const byte *str = (const byte*)mp_obj_str_get_data(o_in, &len); #if MICROPY_PY_BUILTINS_STR_UNICODE if (MP_OBJ_IS_STR(o_in)) { - len = unichar_charlen(str, len); + len = utf8_charlen(str, len); if (len == 1) { - return mp_obj_new_int(utf8_get_char((const byte*)str)); + return mp_obj_new_int(utf8_get_char(str)); } } else #endif { // a bytes object, or a str without unicode support (don't sign extend the char) if (len == 1) { - return MP_OBJ_NEW_SMALL_INT(((const byte*)str)[0]); + return MP_OBJ_NEW_SMALL_INT(str[0]); } } if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("ord expects a character"); + mp_raise_TypeError(translate("ord expects a character")); } else { mp_raise_TypeError_varg( - "ord() expected a character, but string of length %d found", (int)len); + translate("ord() expected a character, but string of length %d found"), (int)len); } } MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_ord_obj, mp_builtin_ord); @@ -373,7 +360,7 @@ STATIC mp_obj_t mp_builtin_pow(size_t n_args, const mp_obj_t *args) { case 2: return mp_binary_op(MP_BINARY_OP_POWER, args[0], args[1]); default: #if !MICROPY_PY_BUILTINS_POW3 - mp_raise_msg(&mp_type_NotImplementedError, "3-arg pow() not supported"); + mp_raise_msg(&mp_type_NotImplementedError, translate("3-arg pow() not supported")); #elif MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_MPZ return mp_binary_op(MP_BINARY_OP_MODULO, mp_binary_op(MP_BINARY_OP_POWER, args[0], args[1]), args[2]); #else @@ -383,46 +370,56 @@ STATIC mp_obj_t mp_builtin_pow(size_t n_args, const mp_obj_t *args) { } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_builtin_pow_obj, 2, 3, mp_builtin_pow); -STATIC mp_obj_t mp_builtin_print(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { - mp_map_elem_t *sep_elem = mp_map_lookup(kwargs, MP_OBJ_NEW_QSTR(MP_QSTR_sep), MP_MAP_LOOKUP); - mp_map_elem_t *end_elem = mp_map_lookup(kwargs, MP_OBJ_NEW_QSTR(MP_QSTR_end), MP_MAP_LOOKUP); - const char *sep_data = " "; - size_t sep_len = 1; - const char *end_data = "\n"; - size_t end_len = 1; - if (sep_elem != NULL && sep_elem->value != mp_const_none) { - sep_data = mp_obj_str_get_data(sep_elem->value, &sep_len); - } - if (end_elem != NULL && end_elem->value != mp_const_none) { - end_data = mp_obj_str_get_data(end_elem->value, &end_len); - } - #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES - void *stream_obj = &mp_sys_stdout_obj; - mp_map_elem_t *file_elem = mp_map_lookup(kwargs, MP_OBJ_NEW_QSTR(MP_QSTR_file), MP_MAP_LOOKUP); - if (file_elem != NULL && file_elem->value != mp_const_none) { - stream_obj = MP_OBJ_TO_PTR(file_elem->value); // XXX may not be a concrete object - } +STATIC mp_obj_t mp_builtin_print(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_sep, ARG_end, ARG_flush, ARG_file }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_sep, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_QSTR(MP_QSTR__space_)} }, + { MP_QSTR_end, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_QSTR(MP_QSTR__0x0a_)} }, + { MP_QSTR_flush, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES + { MP_QSTR_file, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_sys_stdout_obj)} }, + #endif + }; + + // parse args (a union is used to reduce the amount of C stack that is needed) + union { + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + size_t len[2]; + } u; + mp_arg_parse_all(0, NULL, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, u.args); - mp_print_t print = {stream_obj, mp_stream_write_adaptor}; + #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES + mp_get_stream_raise(u.args[ARG_file].u_obj, MP_STREAM_OP_WRITE); + mp_print_t print = {MP_OBJ_TO_PTR(u.args[ARG_file].u_obj), mp_stream_write_adaptor}; #endif + + // extract the objects first because we are going to use the other part of the union + mp_obj_t sep = u.args[ARG_sep].u_obj; + mp_obj_t end = u.args[ARG_end].u_obj; + const char *sep_data = mp_obj_str_get_data(sep, &u.len[0]); + const char *end_data = mp_obj_str_get_data(end, &u.len[1]); + for (size_t i = 0; i < n_args; i++) { if (i > 0) { #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES - mp_stream_write_adaptor(stream_obj, sep_data, sep_len); + mp_stream_write_adaptor(print.data, sep_data, u.len[0]); #else - mp_print_strn(&mp_plat_print, sep_data, sep_len, 0, 0, 0); + mp_print_strn(&mp_plat_print, sep_data, u.len[0], 0, 0, 0); #endif } #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES - mp_obj_print_helper(&print, args[i], PRINT_STR); + mp_obj_print_helper(&print, pos_args[i], PRINT_STR); #else - mp_obj_print_helper(&mp_plat_print, args[i], PRINT_STR); + mp_obj_print_helper(&mp_plat_print, pos_args[i], PRINT_STR); #endif } #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES - mp_stream_write_adaptor(stream_obj, end_data, end_len); + mp_stream_write_adaptor(print.data, end_data, u.len[1]); + if (u.args[ARG_flush].u_bool) { + mp_stream_flush(MP_OBJ_FROM_PTR(print.data)); + } #else - mp_print_strn(&mp_plat_print, end_data, end_len, 0, 0, 0); + mp_print_strn(&mp_plat_print, end_data, u.len[1], 0, 0, 0); #endif return mp_const_none; } @@ -454,19 +451,46 @@ MP_DEFINE_CONST_FUN_OBJ_1(mp_builtin_repr_obj, mp_builtin_repr); STATIC mp_obj_t mp_builtin_round(size_t n_args, const mp_obj_t *args) { mp_obj_t o_in = args[0]; if (MP_OBJ_IS_INT(o_in)) { - return o_in; + if (n_args <= 1) { + return o_in; + } + + mp_int_t num_dig = mp_obj_get_int(args[1]); + if (num_dig >= 0) { + return o_in; + } + #if !MICROPY_PY_BUILTINS_ROUND_INT + mp_raise_NotImplementedError(NULL); + #else + + mp_obj_t mult = mp_binary_op(MP_BINARY_OP_POWER, MP_OBJ_NEW_SMALL_INT(10), MP_OBJ_NEW_SMALL_INT(-num_dig)); + mp_obj_t half_mult = mp_binary_op(MP_BINARY_OP_FLOOR_DIVIDE, mult, MP_OBJ_NEW_SMALL_INT(2)); + mp_obj_t modulo = mp_binary_op(MP_BINARY_OP_MODULO, o_in, mult); + mp_obj_t rounded = mp_binary_op(MP_BINARY_OP_SUBTRACT, o_in, modulo); + if (mp_obj_is_true(mp_binary_op(MP_BINARY_OP_MORE, half_mult, modulo))) { + return rounded; + } else if (mp_obj_is_true(mp_binary_op(MP_BINARY_OP_MORE, modulo, half_mult))) { + return mp_binary_op(MP_BINARY_OP_ADD, rounded, mult); + } else { + // round to even number + mp_obj_t floor = mp_binary_op(MP_BINARY_OP_FLOOR_DIVIDE, o_in, mult); + if (mp_obj_is_true(mp_binary_op(MP_BINARY_OP_AND, floor, MP_OBJ_NEW_SMALL_INT(1)))) { + return mp_binary_op(MP_BINARY_OP_ADD, rounded, mult); + } else { + return rounded; + } + } + #endif } #if MICROPY_PY_BUILTINS_FLOAT - mp_int_t num_dig = 0; + mp_float_t val = mp_obj_get_float(o_in); if (n_args > 1) { - num_dig = mp_obj_get_int(args[1]); - mp_float_t val = mp_obj_get_float(o_in); + mp_int_t num_dig = mp_obj_get_int(args[1]); mp_float_t mult = MICROPY_FLOAT_C_FUN(pow)(10, num_dig); // TODO may lead to overflow mp_float_t rounded = MICROPY_FLOAT_C_FUN(nearbyint)(val * mult) / mult; return mp_obj_new_float(rounded); } - mp_float_t val = mp_obj_get_float(o_in); mp_float_t rounded = MICROPY_FLOAT_C_FUN(nearbyint)(val); return mp_obj_new_int_from_float(rounded); #else @@ -494,9 +518,9 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_builtin_sum_obj, 1, 2, mp_builtin_sum); STATIC mp_obj_t mp_builtin_sorted(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { if (n_args > 1) { - mp_raise_TypeError("must use keyword argument for key function"); + mp_raise_TypeError(translate("must use keyword argument for key function")); } - mp_obj_t self = mp_type_list.make_new(&mp_type_list, 1, 0, args); + mp_obj_t self = mp_type_list.make_new(&mp_type_list, 1, args, NULL); mp_obj_list_sort(1, &self, kwargs); return self; @@ -543,14 +567,8 @@ MP_DEFINE_CONST_FUN_OBJ_2(mp_builtin_delattr_obj, mp_builtin_delattr); STATIC mp_obj_t mp_builtin_hasattr(mp_obj_t object_in, mp_obj_t attr_in) { qstr attr = mp_obj_str_get_qstr(attr_in); - mp_obj_t dest[2]; - // TODO: https://docs.python.org/3/library/functions.html?highlight=hasattr#hasattr - // explicitly says "This is implemented by calling getattr(object, name) and seeing - // whether it raises an AttributeError or not.", so we should explicitly wrap this - // in nlr_push and handle exception. - mp_load_method_maybe(object_in, attr, dest); - + mp_load_method_protected(object_in, attr, dest, false); return mp_obj_new_bool(dest[0] != MP_OBJ_NULL); } MP_DEFINE_CONST_FUN_OBJ_2(mp_builtin_hasattr_obj, mp_builtin_hasattr); @@ -700,9 +718,11 @@ STATIC const mp_rom_map_elem_t mp_module_builtins_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_IndentationError), MP_ROM_PTR(&mp_type_IndentationError) }, { MP_ROM_QSTR(MP_QSTR_IndexError), MP_ROM_PTR(&mp_type_IndexError) }, { MP_ROM_QSTR(MP_QSTR_KeyboardInterrupt), MP_ROM_PTR(&mp_type_KeyboardInterrupt) }, + { MP_ROM_QSTR(MP_QSTR_ReloadException), MP_ROM_PTR(&mp_type_ReloadException) }, { MP_ROM_QSTR(MP_QSTR_KeyError), MP_ROM_PTR(&mp_type_KeyError) }, { MP_ROM_QSTR(MP_QSTR_LookupError), MP_ROM_PTR(&mp_type_LookupError) }, { MP_ROM_QSTR(MP_QSTR_MemoryError), MP_ROM_PTR(&mp_type_MemoryError) }, + { MP_ROM_QSTR(MP_QSTR_MpyError), MP_ROM_PTR(&mp_type_MpyError) }, { MP_ROM_QSTR(MP_QSTR_NameError), MP_ROM_PTR(&mp_type_NameError) }, { MP_ROM_QSTR(MP_QSTR_NotImplementedError), MP_ROM_PTR(&mp_type_NotImplementedError) }, { MP_ROM_QSTR(MP_QSTR_OSError), MP_ROM_PTR(&mp_type_OSError) }, diff --git a/py/modcollections.c b/py/modcollections.c index 1a1560387ad2e..91e7355281f39 100644 --- a/py/modcollections.c +++ b/py/modcollections.c @@ -29,7 +29,10 @@ #if MICROPY_PY_COLLECTIONS STATIC const mp_rom_map_elem_t mp_module_collections_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ucollections) }, + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_collections) }, + #if MICROPY_PY_COLLECTIONS_DEQUE + { MP_ROM_QSTR(MP_QSTR_deque), MP_ROM_PTR(&mp_type_deque) }, + #endif { MP_ROM_QSTR(MP_QSTR_namedtuple), MP_ROM_PTR(&mp_namedtuple_obj) }, #if MICROPY_PY_COLLECTIONS_ORDEREDDICT { MP_ROM_QSTR(MP_QSTR_OrderedDict), MP_ROM_PTR(&mp_type_ordereddict) }, diff --git a/py/modio.c b/py/modio.c index 9263b5949b39b..17840a6d87d9e 100644 --- a/py/modio.c +++ b/py/modio.c @@ -30,6 +30,8 @@ #include "py/runtime.h" #include "py/builtin.h" #include "py/stream.h" +#include "py/binary.h" +#include "py/objarray.h" #include "py/objstringio.h" #include "py/frozenmod.h" @@ -38,6 +40,71 @@ extern const mp_obj_type_t mp_type_fileio; extern const mp_obj_type_t mp_type_textio; +#if MICROPY_PY_IO_IOBASE + +STATIC const mp_obj_type_t mp_type_iobase; + +STATIC mp_obj_base_t iobase_singleton = {&mp_type_iobase}; + +STATIC mp_obj_t iobase_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + (void)type; + (void)n_args; + (void)args; + (void)kw_args; + return MP_OBJ_FROM_PTR(&iobase_singleton); +} + +STATIC mp_uint_t iobase_read_write(mp_obj_t obj, void *buf, mp_uint_t size, int *errcode, qstr qst) { + mp_obj_t dest[3]; + mp_load_method(obj, qst, dest); + mp_obj_array_t ar = {{&mp_type_bytearray}, BYTEARRAY_TYPECODE, 0, size, buf}; + dest[2] = MP_OBJ_FROM_PTR(&ar); + mp_obj_t ret = mp_call_method_n_kw(1, 0, dest); + if (ret == mp_const_none) { + *errcode = MP_EAGAIN; + return MP_STREAM_ERROR; + } else { + return mp_obj_get_int(ret); + } +} +STATIC mp_uint_t iobase_read(mp_obj_t obj, void *buf, mp_uint_t size, int *errcode) { + return iobase_read_write(obj, buf, size, errcode, MP_QSTR_readinto); +} + +STATIC mp_uint_t iobase_write(mp_obj_t obj, const void *buf, mp_uint_t size, int *errcode) { + return iobase_read_write(obj, (void*)buf, size, errcode, MP_QSTR_write); +} + +STATIC mp_uint_t iobase_ioctl(mp_obj_t obj, mp_uint_t request, uintptr_t arg, int *errcode) { + mp_obj_t dest[4]; + mp_load_method(obj, MP_QSTR_ioctl, dest); + dest[2] = mp_obj_new_int_from_uint(request); + dest[3] = mp_obj_new_int_from_uint(arg); + mp_int_t ret = mp_obj_get_int(mp_call_method_n_kw(2, 0, dest)); + if (ret >= 0) { + return ret; + } else { + *errcode = -ret; + return MP_STREAM_ERROR; + } +} + +STATIC const mp_stream_p_t iobase_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = iobase_read, + .write = iobase_write, + .ioctl = iobase_ioctl, +}; + +STATIC const mp_obj_type_t mp_type_iobase = { + { &mp_type_type }, + .name = MP_QSTR_IOBase, + .make_new = iobase_make_new, + .protocol = &iobase_p, +}; + +#endif // MICROPY_PY_IO_IOBASE + #if MICROPY_PY_IO_BUFFEREDWRITER typedef struct _mp_obj_bufwriter_t { mp_obj_base_t base; @@ -47,8 +114,8 @@ typedef struct _mp_obj_bufwriter_t { byte buf[0]; } mp_obj_bufwriter_t; -STATIC mp_obj_t bufwriter_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 2, 2, false); +STATIC mp_obj_t bufwriter_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 2, 2, false); size_t alloc = mp_obj_get_int(args[1]); mp_obj_bufwriter_t *o = m_new_obj_var(mp_obj_bufwriter_t, byte, alloc); o->base.type = type; @@ -119,6 +186,7 @@ STATIC const mp_rom_map_elem_t bufwriter_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(bufwriter_locals_dict, bufwriter_locals_dict_table); STATIC const mp_stream_p_t bufwriter_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .write = bufwriter_write, }; @@ -131,7 +199,7 @@ STATIC const mp_obj_type_t bufwriter_type = { }; #endif // MICROPY_PY_IO_BUFFEREDWRITER -#if MICROPY_MODULE_FROZEN_STR +#if MICROPY_PY_IO_RESOURCE_STREAM STATIC mp_obj_t resource_stream(mp_obj_t package_in, mp_obj_t path_in) { VSTR_FIXED(path_buf, MICROPY_ALLOC_PATH_MAX); size_t len; @@ -176,10 +244,10 @@ STATIC mp_obj_t resource_stream(mp_obj_t package_in, mp_obj_t path_in) { return MP_OBJ_FROM_PTR(o); } - mp_obj_t path_out = mp_obj_new_str(path_buf.buf, path_buf.len, false); + mp_obj_t path_out = mp_obj_new_str(path_buf.buf, path_buf.len); return mp_builtin_open(1, &path_out, (mp_map_t*)&mp_const_empty_map); } -MP_DEFINE_CONST_FUN_OBJ_2(resource_stream_obj, resource_stream); +STATIC MP_DEFINE_CONST_FUN_OBJ_2(resource_stream_obj, resource_stream); #endif STATIC const mp_rom_map_elem_t mp_module_io_globals_table[] = { @@ -187,6 +255,9 @@ STATIC const mp_rom_map_elem_t mp_module_io_globals_table[] = { // Note: mp_builtin_open_obj should be defined by port, it's not // part of the core. { MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) }, + #if MICROPY_PY_IO_IOBASE + { MP_ROM_QSTR(MP_QSTR_IOBase), MP_ROM_PTR(&mp_type_iobase) }, + #endif #if MICROPY_PY_IO_RESOURCE_STREAM { MP_ROM_QSTR(MP_QSTR_resource_stream), MP_ROM_PTR(&resource_stream_obj) }, #endif diff --git a/py/modmath.c b/py/modmath.c index 56ceb14bd1234..9d75ea2d528d1 100644 --- a/py/modmath.c +++ b/py/modmath.c @@ -26,7 +26,8 @@ #include "py/builtin.h" #include "py/runtime.h" -#include "py/runtime.h" + +#include "supervisor/shared/translate.h" #if MICROPY_PY_BUILTINS_FLOAT && MICROPY_PY_MATH @@ -37,7 +38,7 @@ #define MP_PI MICROPY_FLOAT_CONST(3.14159265358979323846) STATIC NORETURN void math_error(void) { - mp_raise_ValueError("math domain error"); + mp_raise_ValueError(translate("math domain error")); } STATIC mp_obj_t math_generic_1(mp_obj_t x_obj, mp_float_t (*f)(mp_float_t)) { @@ -192,7 +193,7 @@ STATIC mp_obj_t mp_math_log(size_t n_args, const mp_obj_t *args) { #pragma GCC diagnostic ignored "-Wfloat-equal" } else if (base == (mp_float_t)1.0) { #pragma GCC diagnostic pop - mp_raise_msg(&mp_type_ZeroDivisionError, "division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } return mp_obj_new_float(l / MICROPY_FLOAT_C_FUN(log)(base)); } diff --git a/py/modmicropython.c b/py/modmicropython.c index 2aac53adc79d7..a45d44653a56e 100644 --- a/py/modmicropython.c +++ b/py/modmicropython.c @@ -32,9 +32,12 @@ #include "py/gc.h" #include "py/mphal.h" +#include "supervisor/shared/translate.h" + // Various builtins specific to MicroPython runtime, // living in micropython module +#if MICROPY_ENABLE_COMPILER STATIC mp_obj_t mp_micropython_opt_level(size_t n_args, const mp_obj_t *args) { if (n_args == 0) { return MP_OBJ_NEW_SMALL_INT(MP_STATE_VM(mp_optimise_value)); @@ -44,6 +47,7 @@ STATIC mp_obj_t mp_micropython_opt_level(size_t n_args, const mp_obj_t *args) { } } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_micropython_opt_level_obj, 0, 1, mp_micropython_opt_level); +#endif #if MICROPY_PY_MICROPYTHON_MEM_INFO @@ -103,14 +107,21 @@ STATIC mp_obj_t mp_micropython_qstr_info(size_t n_args, const mp_obj_t *args) { } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_micropython_qstr_info_obj, 0, 1, mp_micropython_qstr_info); -#if MICROPY_STACK_CHECK +#endif // MICROPY_PY_MICROPYTHON_MEM_INFO + +#if MICROPY_PY_MICROPYTHON_STACK_USE STATIC mp_obj_t mp_micropython_stack_use(void) { return MP_OBJ_NEW_SMALL_INT(mp_stack_usage()); } STATIC MP_DEFINE_CONST_FUN_OBJ_0(mp_micropython_stack_use_obj, mp_micropython_stack_use); #endif -#endif // MICROPY_PY_MICROPYTHON_MEM_INFO +#if MICROPY_ENABLE_PYSTACK +STATIC mp_obj_t mp_micropython_pystack_use(void) { + return MP_OBJ_NEW_SMALL_INT(mp_pystack_usage()); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_0(mp_micropython_pystack_use_obj, mp_micropython_pystack_use); +#endif #if MICROPY_ENABLE_GC STATIC mp_obj_t mp_micropython_heap_lock(void) { @@ -141,7 +152,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_micropython_kbd_intr_obj, mp_micropython_kbd #if MICROPY_ENABLE_SCHEDULER STATIC mp_obj_t mp_micropython_schedule(mp_obj_t function, mp_obj_t arg) { if (!mp_sched_schedule(function, arg)) { - mp_raise_msg(&mp_type_RuntimeError, "schedule stack full"); + mp_raise_msg(&mp_type_RuntimeError, translate("schedule stack full")); } return mp_const_none; } @@ -151,7 +162,9 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(mp_micropython_schedule_obj, mp_micropython_sch STATIC const mp_rom_map_elem_t mp_module_micropython_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_micropython) }, { MP_ROM_QSTR(MP_QSTR_const), MP_ROM_PTR(&mp_identity_obj) }, + #if MICROPY_ENABLE_COMPILER { MP_ROM_QSTR(MP_QSTR_opt_level), MP_ROM_PTR(&mp_micropython_opt_level_obj) }, + #endif #if MICROPY_PY_MICROPYTHON_MEM_INFO #if MICROPY_MEM_STATS { MP_ROM_QSTR(MP_QSTR_mem_total), MP_ROM_PTR(&mp_micropython_mem_total_obj) }, @@ -160,13 +173,16 @@ STATIC const mp_rom_map_elem_t mp_module_micropython_globals_table[] = { #endif { MP_ROM_QSTR(MP_QSTR_mem_info), MP_ROM_PTR(&mp_micropython_mem_info_obj) }, { MP_ROM_QSTR(MP_QSTR_qstr_info), MP_ROM_PTR(&mp_micropython_qstr_info_obj) }, - #if MICROPY_STACK_CHECK +#endif + #if MICROPY_PY_MICROPYTHON_STACK_USE { MP_ROM_QSTR(MP_QSTR_stack_use), MP_ROM_PTR(&mp_micropython_stack_use_obj) }, #endif -#endif #if MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF && (MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE == 0) { MP_ROM_QSTR(MP_QSTR_alloc_emergency_exception_buf), MP_ROM_PTR(&mp_alloc_emergency_exception_buf_obj) }, #endif + #if MICROPY_ENABLE_PYSTACK + { MP_ROM_QSTR(MP_QSTR_pystack_use), MP_ROM_PTR(&mp_micropython_pystack_use_obj) }, + #endif #if MICROPY_ENABLE_GC { MP_ROM_QSTR(MP_QSTR_heap_lock), MP_ROM_PTR(&mp_micropython_heap_lock_obj) }, { MP_ROM_QSTR(MP_QSTR_heap_unlock), MP_ROM_PTR(&mp_micropython_heap_unlock_obj) }, diff --git a/py/modstruct.c b/py/modstruct.c index 8617a8e0d3e0d..a238d3935a2d2 100644 --- a/py/modstruct.c +++ b/py/modstruct.c @@ -33,6 +33,7 @@ #include "py/objtuple.h" #include "py/binary.h" #include "py/parsenum.h" +#include "supervisor/shared/translate.h" #if MICROPY_PY_STRUCT @@ -96,7 +97,10 @@ STATIC size_t calc_size_items(const char *fmt, size_t *total_sz) { total_cnt += 1; size += cnt; } else { - total_cnt += cnt; + // Pad bytes are skipped and don't get included in the item count. + if (*fmt != 'x') { + total_cnt += cnt; + } mp_uint_t align; size_t sz = mp_binary_get_size(fmt_type, *fmt, &align); while (cnt--) { @@ -141,7 +145,7 @@ STATIC mp_obj_t struct_unpack_from(size_t n_args, const mp_obj_t *args) { // negative offsets are relative to the end of the buffer offset = bufinfo.len + offset; if (offset < 0) { - mp_raise_ValueError("buffer too small"); + mp_raise_ValueError(translate("buffer too small")); } } p += offset; @@ -149,7 +153,7 @@ STATIC mp_obj_t struct_unpack_from(size_t n_args, const mp_obj_t *args) { // Check that the input buffer is big enough to unpack all the values if (p + total_sz > end_p) { - mp_raise_ValueError("buffer too small"); + mp_raise_ValueError(translate("buffer too small")); } for (size_t i = 0; i < num_items;) { @@ -165,7 +169,10 @@ STATIC mp_obj_t struct_unpack_from(size_t n_args, const mp_obj_t *args) { } else { while (cnt--) { item = mp_binary_get_val(fmt_type, *fmt, &p); - res->items[i++] = item; + // Pad bytes ('x') are just skipped. + if (*fmt != 'x') { + res->items[i++] = item; + } } } fmt++; @@ -203,7 +210,11 @@ STATIC void struct_pack_into_internal(mp_obj_t fmt_in, byte *p, size_t n_args, c } else { // If we run out of args then we just finish; CPython would raise struct.error while (cnt-- && i < n_args) { - mp_binary_set_val(fmt_type, *fmt, args[i++], &p); + mp_binary_set_val(fmt_type, *fmt, args[i], &p); + // Pad bytes don't have a corresponding argument. + if (*fmt != 'x') { + i++; + } } } fmt++; @@ -230,7 +241,7 @@ STATIC mp_obj_t struct_pack_into(size_t n_args, const mp_obj_t *args) { // negative offsets are relative to the end of the buffer offset = (mp_int_t)bufinfo.len + offset; if (offset < 0) { - mp_raise_ValueError("buffer too small"); + mp_raise_ValueError(translate("buffer too small")); } } byte *p = (byte *)bufinfo.buf; @@ -240,7 +251,7 @@ STATIC mp_obj_t struct_pack_into(size_t n_args, const mp_obj_t *args) { // Check that the output buffer is big enough to hold all the values mp_int_t sz = MP_OBJ_SMALL_INT_VALUE(struct_calcsize(args[0])); if (p + sz > end_p) { - mp_raise_ValueError("buffer too small"); + mp_raise_ValueError(translate("buffer too small")); } struct_pack_into_internal(args[0], p, n_args - 3, &args[3]); diff --git a/py/modsys.c b/py/modsys.c index de3cb7e1fff8c..68e048d91d7b9 100644 --- a/py/modsys.c +++ b/py/modsys.c @@ -106,7 +106,8 @@ STATIC mp_obj_t mp_sys_print_exception(size_t n_args, const mp_obj_t *args) { #if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES void *stream_obj = &mp_sys_stdout_obj; if (n_args > 1) { - stream_obj = MP_OBJ_TO_PTR(args[1]); // XXX may fail + mp_get_stream_raise(args[1], MP_STREAM_OP_WRITE); + stream_obj = MP_OBJ_TO_PTR(args[1]); } mp_print_t print = {stream_obj, mp_stream_write_adaptor}; @@ -134,16 +135,18 @@ STATIC mp_obj_t mp_sys_exc_info(void) { t->items[0] = MP_OBJ_FROM_PTR(mp_obj_get_type(cur_exc)); t->items[1] = cur_exc; - t->items[2] = mp_const_none; + t->items[2] = mp_obj_exception_get_traceback_obj(cur_exc); return MP_OBJ_FROM_PTR(t); } MP_DEFINE_CONST_FUN_OBJ_0(mp_sys_exc_info_obj, mp_sys_exc_info); #endif +#if MICROPY_PY_SYS_GETSIZEOF STATIC mp_obj_t mp_sys_getsizeof(mp_obj_t obj) { return mp_unary_op(MP_UNARY_OP_SIZEOF, obj); } -MP_DEFINE_CONST_FUN_OBJ_1(mp_sys_getsizeof_obj, mp_sys_getsizeof); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(mp_sys_getsizeof_obj, mp_sys_getsizeof); +#endif STATIC const mp_rom_map_elem_t mp_module_sys_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_sys) }, diff --git a/py/modthread.c b/py/modthread.c index cb071d0f86fae..1c00f6397edc7 100644 --- a/py/modthread.c +++ b/py/modthread.c @@ -30,6 +30,8 @@ #include "py/runtime.h" #include "py/stackctrl.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_THREAD #include "py/mpthread.h" @@ -165,6 +167,12 @@ STATIC void *thread_entry(void *args_in) { mp_stack_set_top(&ts + 1); // need to include ts in root-pointer scan mp_stack_set_limit(args->stack_size); + #if MICROPY_ENABLE_PYSTACK + // TODO threading and pystack is not fully supported, for now just make a small stack + mp_obj_t mini_pystack[128]; + mp_pystack_init(mini_pystack, &mini_pystack[128]); + #endif + // set locals and globals from the calling context mp_locals_set(args->dict_locals); mp_globals_set(args->dict_globals); @@ -229,7 +237,7 @@ STATIC mp_obj_t mod_thread_start_new_thread(size_t n_args, const mp_obj_t *args) } else { // positional and keyword arguments if (mp_obj_get_type(args[2]) != &mp_type_dict) { - mp_raise_TypeError("expecting a dict for keyword args"); + mp_raise_TypeError(translate("expecting a dict for keyword args")); } mp_map_t *map = &((mp_obj_dict_t*)MP_OBJ_TO_PTR(args[2]))->map; th_args = m_new_obj_var(thread_entry_args_t, mp_obj_t, pos_args_len + 2 * map->used); diff --git a/py/moduerrno.c b/py/moduerrno.c index de66c941b0e6e..7915603e4e64a 100644 --- a/py/moduerrno.c +++ b/py/moduerrno.c @@ -30,7 +30,7 @@ #include "py/obj.h" #include "py/mperrno.h" -#if MICROPY_PY_UERRNO +#include "supervisor/shared/translate.h" // This list can be defined per port in mpconfigport.h to tailor it to a // specific port's needs. If it's not defined then we provide a default. @@ -61,6 +61,8 @@ #endif +#if MICROPY_PY_UERRNO + #if MICROPY_PY_UERRNO_ERRORCODE STATIC const mp_rom_map_elem_t errorcode_table[] = { #define X(e) { MP_ROM_INT(MP_ ## e), MP_ROM_QSTR(MP_QSTR_## e) }, @@ -82,7 +84,11 @@ STATIC const mp_obj_dict_t errorcode_dict = { #endif STATIC const mp_rom_map_elem_t mp_module_uerrno_globals_table[] = { +#if CIRCUITPY + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_errno) }, +#else { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_uerrno) }, +#endif #if MICROPY_PY_UERRNO_ERRORCODE { MP_ROM_QSTR(MP_QSTR_errorcode), MP_ROM_PTR(&errorcode_dict) }, #endif @@ -99,24 +105,64 @@ const mp_obj_module_t mp_module_uerrno = { .globals = (mp_obj_dict_t*)&mp_module_uerrno_globals, }; -qstr mp_errno_to_str(mp_obj_t errno_val) { +const char* mp_errno_to_str(mp_obj_t errno_val) { + // Otherwise, return the Exxxx string for that error code #if MICROPY_PY_UERRNO_ERRORCODE // We have the errorcode dict so can do a lookup using the hash map mp_map_elem_t *elem = mp_map_lookup((mp_map_t*)&errorcode_dict.map, errno_val, MP_MAP_LOOKUP); if (elem == NULL) { - return MP_QSTR_NULL; + return ""; } else { - return MP_OBJ_QSTR_VALUE(elem->value); + return qstr_str(MP_OBJ_QSTR_VALUE(elem->value)); } #else // We don't have the errorcode dict so do a simple search in the modules dict for (size_t i = 0; i < MP_ARRAY_SIZE(mp_module_uerrno_globals_table); ++i) { if (errno_val == mp_module_uerrno_globals_table[i].value) { - return MP_OBJ_QSTR_VALUE(mp_module_uerrno_globals_table[i].key); + return qstr_str(MP_OBJ_QSTR_VALUE(mp_module_uerrno_globals_table[i].key)); } } - return MP_QSTR_NULL; + return ""; #endif } +#else //MICROPY_PY_UERRNO + +const char* mp_errno_to_str(mp_obj_t errno_val) { + int v = MP_OBJ_SMALL_INT_VALUE(errno_val); + #define X(e) if (v == e) return qstr_str(MP_QSTR_ ## e); + MICROPY_PY_UERRNO_LIST + #undef X + + return ""; +} + #endif //MICROPY_PY_UERRNO + + +// For commonly encountered errors, return human readable strings, otherwise try errno name +const char *mp_common_errno_to_str(mp_obj_t errno_val, char *buf, size_t len) { + if (!MP_OBJ_IS_SMALL_INT(errno_val)) { + return NULL; + } + + const compressed_string_t* desc = NULL; + switch (MP_OBJ_SMALL_INT_VALUE(errno_val)) { + case EPERM: desc = translate("Permission denied"); break; + case ENOENT: desc = translate("No such file/directory"); break; + case EIO: desc = translate("Input/output error"); break; + case EACCES: desc = translate("Permission denied"); break; + case EEXIST: desc = translate("File exists"); break; + case ENODEV: desc = translate("Unsupported operation"); break; + case EINVAL: desc = translate("Invalid argument"); break; + case ENOSPC: desc = translate("No space left on device"); break; + case EROFS: desc = translate("Read-only filesystem"); break; + } + if (desc != NULL && desc->length <= len) { + decompress(desc, buf); + return buf; + } + + const char *msg = mp_errno_to_str(errno_val); + return msg[0] != '\0' ? msg : NULL; +} diff --git a/py/mpconfig.h b/py/mpconfig.h old mode 100644 new mode 100755 index 765ae1e8f0f6a..513f04f6efdda --- a/py/mpconfig.h +++ b/py/mpconfig.h @@ -45,6 +45,11 @@ #include #endif +// Is this a CircuitPython build? +#ifndef CIRCUITPY +#define CIRCUITPY 0 +#endif + // Any options not explicitly set in mpconfigport.h will get default // values below. @@ -79,7 +84,7 @@ // - seeeeeee eeeeffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff 64-bit fp, e != 0x7ff // - s1111111 11110000 00000000 00000000 00000000 00000000 00000000 00000000 +/- inf // - 01111111 11111000 00000000 00000000 00000000 00000000 00000000 00000000 normalised nan -// - 01111111 11111101 00000000 00000000 iiiiiiii iiiiiiii iiiiiiii iiiiiii1 small int +// - 01111111 11111101 iiiiiiii iiiiiiii iiiiiiii iiiiiiii iiiiiiii iiiiiii1 small int // - 01111111 11111110 00000000 00000000 qqqqqqqq qqqqqqqq qqqqqqqq qqqqqqq1 str // - 01111111 11111100 00000000 00000000 pppppppp pppppppp pppppppp pppppp00 ptr (4 byte alignment) // Stored as O = R + 0x8004000000000000, retrieved as R = O - 0x8004000000000000. @@ -130,6 +135,12 @@ #define MICROPY_ALLOC_QSTR_CHUNK_INIT (128) #endif +// Max number of entries in newly allocated QSTR pools. Smaller numbers may make QSTR lookups +// slightly slower but reduce the waste of unused spots. +#ifndef MICROPY_QSTR_POOL_MAX_ENTRIES +#define MICROPY_QSTR_POOL_MAX_ENTRIES (64) +#endif + // Initial amount for lexer indentation level #ifndef MICROPY_ALLOC_LEXER_INDENT_INIT #define MICROPY_ALLOC_LEXER_INDENT_INIT (10) @@ -233,6 +244,14 @@ #define alloca(x) m_malloc(x) #endif +// Number of atb indices to cache. Allocations of fewer blocks will be faster +// because the search will be accelerated by the index cache. This only applies +// to short lived allocations because we assume the long lived allocations are +// contiguous. +#ifndef MICROPY_ATB_INDICES +#define MICROPY_ATB_INDICES (8) +#endif + /*****************************************************************************/ /* MicroPython emitters */ @@ -347,7 +366,7 @@ #endif // Whether to enable optimisation of: a, b, c = d, e, f -// Cost 156 bytes (Thumb2) +// Requires MICROPY_COMP_DOUBLE_TUPLE_ASSIGN and costs 68 bytes (Thumb2) #ifndef MICROPY_COMP_TRIPLE_TUPLE_ASSIGN #define MICROPY_COMP_TRIPLE_TUPLE_ASSIGN (0) #endif @@ -358,6 +377,11 @@ #define MICROPY_COMP_RETURN_IF_EXPR (0) #endif +// Whether to include parsing of f-string literals +#ifndef MICROPY_COMP_FSTRING_LITERAL +#define MICROPY_COMP_FSTRING_LITERAL (1) +#endif + /*****************************************************************************/ /* Internal debugging stuff */ @@ -405,6 +429,13 @@ /*****************************************************************************/ /* Python internal features */ +// Whether to enable import of external modules +// When disabled, only importing of built-in modules is supported +// When enabled, a port must implement mp_import_stat (among other things) +#ifndef MICROPY_ENABLE_EXTERNAL_IMPORT +#define MICROPY_ENABLE_EXTERNAL_IMPORT (1) +#endif + // Whether to use the POSIX reader for importing files #ifndef MICROPY_READER_POSIX #define MICROPY_READER_POSIX (0) @@ -446,6 +477,17 @@ #define MICROPY_ENABLE_FINALISER (0) #endif +// Whether to enable a separate allocator for the Python stack. +// If enabled then the code must call mp_pystack_init before mp_init. +#ifndef MICROPY_ENABLE_PYSTACK +#define MICROPY_ENABLE_PYSTACK (0) +#endif + +// Number of bytes that memory returned by mp_pystack_alloc will be aligned by. +#ifndef MICROPY_PYSTACK_ALIGN +#define MICROPY_PYSTACK_ALIGN (8) +#endif + // Whether to check C stack usage. C stack used for calling Python functions, // etc. Not checking means segfault on overflow. #ifndef MICROPY_STACK_CHECK @@ -673,22 +715,41 @@ typedef double mp_float_t; #define MICROPY_VFS (0) #endif +// Support for VFS POSIX component, to mount a POSIX filesystem within VFS +#ifndef MICROPY_VFS +#define MICROPY_VFS_POSIX (0) +#endif + +// Support for VFS FAT component, to mount a FAT filesystem within VFS +#ifndef MICROPY_VFS +#define MICROPY_VFS_FAT (0) +#endif + /*****************************************************************************/ /* Fine control over Python builtins, classes, modules, etc */ +// Whether to support multiple inheritance of Python classes. Multiple +// inheritance makes some C functions inherently recursive, and adds a bit of +// code overhead. +#ifndef MICROPY_MULTIPLE_INHERITANCE +#define MICROPY_MULTIPLE_INHERITANCE (1) +#endif + // Whether to implement attributes on functions #ifndef MICROPY_PY_FUNCTION_ATTRS #define MICROPY_PY_FUNCTION_ATTRS (0) #endif -// Whether to support descriptors (__get__ and __set__) -// This costs some code size and makes all load attrs and store attrs slow +// Whether to support the descriptors __get__, __set__, __delete__ +// This costs some code size and makes load/store/delete of instance +// attributes slower for the classes that use this feature #ifndef MICROPY_PY_DESCRIPTORS #define MICROPY_PY_DESCRIPTORS (0) #endif // Whether to support class __delattr__ and __setattr__ methods -// This costs some code size and makes all del attrs and store attrs slow +// This costs some code size and makes store/delete of instance +// attributes slower for the classes that use this feature #ifndef MICROPY_PY_DELATTR_SETATTR #define MICROPY_PY_DELATTR_SETATTR (0) #endif @@ -698,6 +759,15 @@ typedef double mp_float_t; #define MICROPY_PY_ASYNC_AWAIT (1) #endif +// Non-standard .pend_throw() method for generators, allowing for +// Future-like behavior with respect to exception handling: an +// exception set with .pend_throw() will activate on the next call +// to generator's .send() or .__next__(). (This is useful to implement +// async schedulers.) +#ifndef MICROPY_PY_GENERATOR_PEND_THROW +#define MICROPY_PY_GENERATOR_PEND_THROW (1) +#endif + // Issue a warning when comparing str and bytes objects #ifndef MICROPY_PY_STR_BYTES_CMP_WARN #define MICROPY_PY_STR_BYTES_CMP_WARN (0) @@ -770,6 +840,19 @@ typedef double mp_float_t; #define MICROPY_PY_BUILTINS_RANGE_ATTRS (1) #endif +// Whether to support binary ops [only (in)equality is defined] between range +// objects. With this option disabled all range objects that are not exactly +// the same object will compare as not-equal. With it enabled the semantics +// match CPython and ranges are equal if they yield the same sequence of items. +#ifndef MICROPY_PY_BUILTINS_RANGE_BINOP +#define MICROPY_PY_BUILTINS_RANGE_BINOP (0) +#endif + +// Whether to support rounding of integers (incl bignum); eg round(123,-1)=120 +#ifndef MICROPY_PY_BUILTINS_ROUND_INT +#define MICROPY_PY_BUILTINS_ROUND_INT (0) +#endif + // Whether to support timeout exceptions (like socket.timeout) #ifndef MICROPY_PY_BUILTINS_TIMEOUTERROR #define MICROPY_PY_BUILTINS_TIMEOUTERROR (0) @@ -875,6 +958,11 @@ typedef double mp_float_t; #define MICROPY_PY_MICROPYTHON_MEM_INFO (0) #endif +// Whether to provide "micropython.stack_use" function +#ifndef MICROPY_PY_MICROPYTHON_STACK_USE +#define MICROPY_PY_MICROPYTHON_STACK_USE (MICROPY_PY_MICROPYTHON_MEM_INFO) +#endif + // Whether to provide "array" module. Note that large chunk of the // underlying code is shared with "bytearray" builtin type, so to // get real savings, it should be disabled too. @@ -905,11 +993,21 @@ typedef double mp_float_t; #define MICROPY_PY_COLLECTIONS (1) #endif +// Whether to provide "ucollections.deque" type +#ifndef MICROPY_PY_COLLECTIONS_DEQUE +#define MICROPY_PY_COLLECTIONS_DEQUE (0) +#endif + // Whether to provide "collections.OrderedDict" type #ifndef MICROPY_PY_COLLECTIONS_ORDEREDDICT #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #endif +// Whether to provide the _asdict function for namedtuple +#ifndef MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT +#define MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT (0) +#endif + // Whether to provide "math" module #ifndef MICROPY_PY_MATH #define MICROPY_PY_MATH (1) @@ -940,9 +1038,18 @@ typedef double mp_float_t; #define MICROPY_PY_IO (1) #endif +// Whether to provide "io.IOBase" class to support user streams +#ifndef MICROPY_PY_IO_IOBASE +#define MICROPY_PY_IO_IOBASE (0) +#endif + // Whether to provide "uio.resource_stream()" function with // the semantics of CPython's pkg_resources.resource_stream() -// (allows to access resources in frozen packages). +// (allows to access binary resources in frozen source packages). +// Note that the same functionality can be achieved in "pure +// Python" by prepocessing binary resources into Python source +// and bytecode-freezing it (with a simple helper module available +// e.g. in micropython-lib). #ifndef MICROPY_PY_IO_RESOURCE_STREAM #define MICROPY_PY_IO_RESOURCE_STREAM (0) #endif @@ -1071,10 +1178,26 @@ typedef double mp_float_t; #define MICROPY_PY_UJSON (0) #endif +#ifndef CIRCUITPY_ULAB +#define CIRCUITPY_ULAB (0) +#endif + #ifndef MICROPY_PY_URE #define MICROPY_PY_URE (0) #endif +#ifndef MICROPY_PY_URE_MATCH_GROUPS +#define MICROPY_PY_URE_MATCH_GROUPS (0) +#endif + +#ifndef MICROPY_PY_URE_MATCH_SPAN_START_END +#define MICROPY_PY_URE_MATCH_SPAN_START_END (0) +#endif + +#ifndef MICROPY_PY_URE_SUB +#define MICROPY_PY_URE_SUB (0) +#endif + #ifndef MICROPY_PY_UHEAPQ #define MICROPY_PY_UHEAPQ (0) #endif @@ -1088,6 +1211,14 @@ typedef double mp_float_t; #define MICROPY_PY_UHASHLIB (0) #endif +#ifndef MICROPY_PY_UHASHLIB_SHA1 +#define MICROPY_PY_UHASHLIB_SHA1 (0) +#endif + +#ifndef MICROPY_PY_UHASHLIB_SHA256 +#define MICROPY_PY_UHASHLIB_SHA256 (1) +#endif + #ifndef MICROPY_PY_UBINASCII #define MICROPY_PY_UBINASCII (0) #endif @@ -1141,6 +1272,26 @@ typedef double mp_float_t; #define MICROPY_PY_BTREE (0) #endif +#ifndef MICROPY_PY_OS_DUPTERM +#define MICROPY_PY_OS_DUPTERM (0) +#endif + +#ifndef MICROPY_PY_LWIP +#define MICROPY_PY_LWIP (0) +#endif + +#ifndef MICROPY_PY_LWIP_SLIP +#define MICROPY_PY_LWIP_SLIP (0) +#endif + +#ifndef MICROPY_HW_ENABLE_USB +#define MICROPY_HW_ENABLE_USB (0) +#endif + +#ifndef MICROPY_PY_WEBREPL +#define MICROPY_PY_WEBREPL (0) +#endif + /*****************************************************************************/ /* Hooks for a port to add builtins */ @@ -1211,29 +1362,26 @@ typedef double mp_float_t; #elif defined(MP_ENDIANNESS_BIG) #define MP_ENDIANNESS_LITTLE (!MP_ENDIANNESS_BIG) #else - // Endiannes not defined by port so try to autodetect it. + // Endianness not defined by port so try to autodetect it. #if defined(__BYTE_ORDER__) #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define MP_ENDIANNESS_LITTLE (1) - #else + #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ #define MP_ENDIANNESS_LITTLE (0) #endif - #elif defined(__LITTLE_ENDIAN__) || defined(__LITTLE_ENDIAN) || defined (_LITTLE_ENDIAN) - #define MP_ENDIANNESS_LITTLE (1) - #elif defined(__BIG_ENDIAN__) || defined(__BIG_ENDIAN) || defined (_BIG_ENDIAN) - #define MP_ENDIANNESS_LITTLE (0) #else #include #if defined(__BYTE_ORDER) #if __BYTE_ORDER == __LITTLE_ENDIAN #define MP_ENDIANNESS_LITTLE (1) - #else + #elif __BYTE_ORDER == __BIG_ENDIAN #define MP_ENDIANNESS_LITTLE (0) #endif - #else - #error endianness not defined and cannot detect it #endif #endif + #ifndef MP_ENDIANNESS_LITTLE + #error endianness not defined and cannot detect it + #endif #define MP_ENDIANNESS_BIG (!MP_ENDIANNESS_LITTLE) #endif @@ -1309,4 +1457,33 @@ typedef double mp_float_t; #define MP_UNLIKELY(x) __builtin_expect((x), 0) #endif +// To annotate that code is unreachable +#ifndef MP_UNREACHABLE +#if defined(__GNUC__) +#define MP_UNREACHABLE __builtin_unreachable(); +#else +#define MP_UNREACHABLE for (;;); +#endif +#endif + +#ifndef MP_HTOBE16 +#if MP_ENDIANNESS_LITTLE +# define MP_HTOBE16(x) ((uint16_t)( (((x) & 0xff) << 8) | (((x) >> 8) & 0xff) )) +# define MP_BE16TOH(x) MP_HTOBE16(x) +#else +# define MP_HTOBE16(x) (x) +# define MP_BE16TOH(x) (x) +#endif +#endif + +#ifndef MP_HTOBE32 +#if MP_ENDIANNESS_LITTLE +# define MP_HTOBE32(x) ((uint32_t)( (((x) & 0xff) << 24) | (((x) & 0xff00) << 8) | (((x) >> 8) & 0xff00) | (((x) >> 24) & 0xff) )) +# define MP_BE32TOH(x) MP_HTOBE32(x) +#else +# define MP_HTOBE32(x) (x) +# define MP_BE32TOH(x) (x) +#endif +#endif + #endif // MICROPY_INCLUDED_PY_MPCONFIG_H diff --git a/py/mperrno.h b/py/mperrno.h index caac116ab6edc..911a9b41317ee 100644 --- a/py/mperrno.h +++ b/py/mperrno.h @@ -26,8 +26,6 @@ #ifndef MICROPY_INCLUDED_PY_MPERRNO_H #define MICROPY_INCLUDED_PY_MPERRNO_H -#include "py/mpconfig.h" - #include "py/mpconfig.h" #include "py/obj.h" @@ -125,7 +123,7 @@ #define MP_EPIPE EPIPE #define MP_EDOM EDOM #define MP_ERANGE ERANGE -#define MP_EWOULDBLOCK EAGAIN +#define MP_EWOULDBLOCK EWOULDBLOCK #define MP_EOPNOTSUPP EOPNOTSUPP #define MP_EAFNOSUPPORT EAFNOSUPPORT #define MP_EADDRINUSE EADDRINUSE @@ -142,12 +140,7 @@ #endif -#if MICROPY_PY_UERRNO - -#include "py/obj.h" - -qstr mp_errno_to_str(mp_obj_t errno_val); - -#endif +const char* mp_errno_to_str(mp_obj_t errno_val); +const char *mp_common_errno_to_str(mp_obj_t errno_val, char *buf, size_t len); #endif // MICROPY_INCLUDED_PY_MPERRNO_H diff --git a/py/mpprint.c b/py/mpprint.c index a569ef7931f9f..c2e65301c9d7d 100644 --- a/py/mpprint.c +++ b/py/mpprint.c @@ -446,11 +446,16 @@ int mp_vprintf(const mp_print_t *print, const char *fmt, va_list args) { } } - // parse long specifiers (current not used) - //bool long_arg = false; + // parse long specifiers (only for LP64 model where they make a difference) + #ifndef __LP64__ + const + #endif + bool long_arg = false; if (*fmt == 'l') { ++fmt; - //long_arg = true; + #ifdef __LP64__ + long_arg = true; + #endif } if (*fmt == '\0') { @@ -505,14 +510,21 @@ int mp_vprintf(const mp_print_t *print, const char *fmt, va_list args) { chrs += mp_print_int(print, va_arg(args, int), 1, 10, 'a', flags, fill, width); break; case 'x': - chrs += mp_print_int(print, va_arg(args, unsigned int), 0, 16, 'a', flags, fill, width); - break; - case 'X': - chrs += mp_print_int(print, va_arg(args, unsigned int), 0, 16, 'A', flags, fill, width); + case 'X': { + char fmt_c = *fmt - 'X' + 'A'; + mp_uint_t val; + if (long_arg) { + val = va_arg(args, unsigned long int); + } else { + val = va_arg(args, unsigned int); + } + chrs += mp_print_int(print, val, 0, 16, fmt_c, flags, fill, width); break; + } case 'p': case 'P': // don't bother to handle upcase for 'P' - chrs += mp_print_int(print, va_arg(args, unsigned int), 0, 16, 'a', flags, fill, width); + // Use unsigned long int to work on both ILP32 and LP64 systems + chrs += mp_print_int(print, va_arg(args, unsigned long int), 0, 16, 'a', flags, fill, width); break; #if MICROPY_PY_BUILTINS_FLOAT case 'e': diff --git a/py/mpstate.c b/py/mpstate.c index 6ce64adfd1fe0..32f1d60a598e2 100644 --- a/py/mpstate.c +++ b/py/mpstate.c @@ -25,9 +25,10 @@ */ #include "py/mpstate.h" +#include "supervisor/linker.h" #if MICROPY_DYNAMIC_COMPILER mp_dynamic_compiler_t mp_dynamic_compiler = {0}; #endif -mp_state_ctx_t mp_state_ctx; +mp_state_ctx_t PLACE_IN_DTCM_BSS(mp_state_ctx); diff --git a/py/mpstate.h b/py/mpstate.h index 19a5d711edf67..a5815776a4d6a 100644 --- a/py/mpstate.h +++ b/py/mpstate.h @@ -80,7 +80,6 @@ typedef struct _mp_state_mem_t { int gc_stack_overflow; size_t gc_stack[MICROPY_ALLOC_GC_STACK_SIZE]; - size_t *gc_sp; uint16_t gc_lock_depth; // This variable controls auto garbage collection. If set to false then the @@ -93,7 +92,7 @@ typedef struct _mp_state_mem_t { size_t gc_alloc_threshold; #endif - size_t gc_first_free_atb_index; + size_t gc_first_free_atb_index[MICROPY_ATB_INDICES]; size_t gc_last_free_atb_index; #if MICROPY_PY_GC_COLLECT_RETVAL @@ -104,15 +103,18 @@ typedef struct _mp_state_mem_t { // This is a global mutex used to make the GC thread-safe. mp_thread_mutex_t gc_mutex; #endif + + void** permanent_pointers; } mp_state_mem_t; // This structure hold runtime and VM information. It includes a section // which contains root pointers that must be scanned by the GC. typedef struct _mp_state_vm_t { - //////////////////////////////////////////////////////////// - // START ROOT POINTER SECTION - // everything that needs GC scanning must go here - // this must start at the start of this structure + // + // CONTINUE ROOT POINTER SECTION + // This must start at the start of this structure and follows + // the state in the mp_state_thread_t structure, continuing + // the root pointer section from there. // qstr_pool_t *last_pool; @@ -136,6 +138,9 @@ typedef struct _mp_state_vm_t { mp_obj_exception_t mp_kbd_exception; #endif + // exception object of type ReloadException + mp_obj_exception_t mp_reload_exception; + // dictionary with loaded modules (may be exposed as sys.modules) mp_obj_dict_t mp_loaded_modules_dict; @@ -143,8 +148,6 @@ typedef struct _mp_state_vm_t { volatile mp_obj_t mp_pending_exception; #if MICROPY_ENABLE_SCHEDULER - volatile int16_t sched_state; - uint16_t sched_sp; mp_sched_item_t sched_stack[MICROPY_SCHEDULER_DEPTH]; #endif @@ -170,12 +173,16 @@ typedef struct _mp_state_vm_t { // root pointers for extmod - #ifdef MICROPY_PY_OS_DUPTERM + #if MICROPY_REPL_EVENT_DRIVEN + vstr_t *repl_line; + #endif + + #if MICROPY_PY_OS_DUPTERM mp_obj_t dupterm_objs[MICROPY_PY_OS_DUPTERM]; mp_obj_t dupterm_arr_obj; #endif - #ifdef MICROPY_PY_LWIP_SLIP + #if MICROPY_PY_LWIP_SLIP mp_obj_t lwip_slip_stream; #endif @@ -199,13 +206,20 @@ typedef struct _mp_state_vm_t { mp_thread_mutex_t qstr_mutex; #endif + #if MICROPY_ENABLE_COMPILER mp_uint_t mp_optimise_value; + #endif // size of the emergency exception buf, if it's dynamically allocated #if MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF && MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE == 0 mp_int_t mp_emergency_exception_buf_size; #endif + #if MICROPY_ENABLE_SCHEDULER + volatile int16_t sched_state; + uint16_t sched_sp; + #endif + #if MICROPY_PY_THREAD_GIL // This is a global mutex used to make the VM/runtime thread-safe. mp_thread_mutex_t gil_mutex; @@ -215,12 +229,6 @@ typedef struct _mp_state_vm_t { // This structure holds state that is specific to a given thread. // Everything in this structure is scanned for root pointers. typedef struct _mp_state_thread_t { - mp_obj_dict_t *dict_locals; - mp_obj_dict_t *dict_globals; - - // Note: nlr asm code has the offset of this hard-coded - nlr_buf_t *nlr_top; // ROOT POINTER - // Stack top at the start of program char *stack_top; @@ -231,12 +239,27 @@ typedef struct _mp_state_thread_t { #if MICROPY_STACK_CHECK size_t stack_limit; #endif + + #if MICROPY_ENABLE_PYSTACK + uint8_t *pystack_start; + uint8_t *pystack_end; + uint8_t *pystack_cur; + #endif + + //////////////////////////////////////////////////////////// + // START ROOT POINTER SECTION + // Everything that needs GC scanning must start here, and + // is followed by state in the mp_state_vm_t structure. + // + + mp_obj_dict_t *dict_locals; + mp_obj_dict_t *dict_globals; + + nlr_buf_t *nlr_top; } mp_state_thread_t; // This structure combines the above 3 structures. // The order of the entries are important for root pointer scanning in the GC to work. -// Note: if this structure changes then revisit all nlr asm code since they -// have the offset of nlr_top hard-coded. typedef struct _mp_state_ctx_t { mp_state_thread_t thread; mp_state_vm_t vm; diff --git a/py/mpz.c b/py/mpz.c index d300a8e5db6a2..8687092d02128 100644 --- a/py/mpz.c +++ b/py/mpz.c @@ -537,83 +537,57 @@ STATIC void mpn_div(mpz_dig_t *num_dig, size_t *num_len, const mpz_dig_t *den_di // not to overflow the borrow variable. And the shifting of // borrow needs some special logic (it's a shift right with // round up). - - if (DIG_SIZE < 8 * sizeof(mpz_dbl_dig_t) / 2) { - const mpz_dig_t *d = den_dig; - mpz_dbl_dig_t d_norm = 0; - mpz_dbl_dig_signed_t borrow = 0; - - for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { - d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); - borrow += (mpz_dbl_dig_t)*n - (mpz_dbl_dig_t)quo * (d_norm & DIG_MASK); // will overflow if DIG_SIZE >= 8*sizeof(mpz_dbl_dig_t)/2 - *n = borrow & DIG_MASK; - borrow >>= DIG_SIZE; - } - borrow += *num_dig; // will overflow if DIG_SIZE >= 8*sizeof(mpz_dbl_dig_t)/2 - *num_dig = borrow & DIG_MASK; - borrow >>= DIG_SIZE; - - // adjust quotient if it is too big - for (; borrow != 0; --quo) { - d = den_dig; - d_norm = 0; - mpz_dbl_dig_t carry = 0; - for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { - d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); - carry += (mpz_dbl_dig_t)*n + (d_norm & DIG_MASK); - *n = carry & DIG_MASK; - carry >>= DIG_SIZE; - } - carry += *num_dig; - *num_dig = carry & DIG_MASK; - carry >>= DIG_SIZE; - - borrow += carry; - } - } else { // DIG_SIZE == 8 * sizeof(mpz_dbl_dig_t) / 2 - const mpz_dig_t *d = den_dig; - mpz_dbl_dig_t d_norm = 0; - mpz_dbl_dig_t borrow = 0; - - for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { - d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); - mpz_dbl_dig_t x = (mpz_dbl_dig_t)quo * (d_norm & DIG_MASK); - if (x >= *n || *n - x <= borrow) { - borrow += (mpz_dbl_dig_t)x - (mpz_dbl_dig_t)*n; - *n = (-borrow) & DIG_MASK; - borrow = (borrow >> DIG_SIZE) + ((borrow & DIG_MASK) == 0 ? 0 : 1); // shift-right with round-up - } else { - *n = ((mpz_dbl_dig_t)*n - (mpz_dbl_dig_t)x - (mpz_dbl_dig_t)borrow) & DIG_MASK; - borrow = 0; - } - } - if (borrow >= *num_dig) { - borrow -= (mpz_dbl_dig_t)*num_dig; - *num_dig = (-borrow) & DIG_MASK; + // + const mpz_dig_t *d = den_dig; + mpz_dbl_dig_t d_norm = 0; + mpz_dbl_dig_t borrow = 0; + for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { + d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); + mpz_dbl_dig_t x = (mpz_dbl_dig_t)quo * (d_norm & DIG_MASK); + #if DIG_SIZE < MPZ_DBL_DIG_SIZE / 2 + borrow += (mpz_dbl_dig_t)*n - x; // will overflow if DIG_SIZE >= MPZ_DBL_DIG_SIZE/2 + *n = borrow & DIG_MASK; + borrow = (mpz_dbl_dig_signed_t)borrow >> DIG_SIZE; + #else // DIG_SIZE == MPZ_DBL_DIG_SIZE / 2 + if (x >= *n || *n - x <= borrow) { + borrow += x - (mpz_dbl_dig_t)*n; + *n = (-borrow) & DIG_MASK; borrow = (borrow >> DIG_SIZE) + ((borrow & DIG_MASK) == 0 ? 0 : 1); // shift-right with round-up } else { - *num_dig = (*num_dig - borrow) & DIG_MASK; + *n = ((mpz_dbl_dig_t)*n - x - borrow) & DIG_MASK; borrow = 0; } + #endif + } - // adjust quotient if it is too big - for (; borrow != 0; --quo) { - d = den_dig; - d_norm = 0; - mpz_dbl_dig_t carry = 0; - for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { - d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); - carry += (mpz_dbl_dig_t)*n + (d_norm & DIG_MASK); - *n = carry & DIG_MASK; - carry >>= DIG_SIZE; - } - carry += (mpz_dbl_dig_t)*num_dig; - *num_dig = carry & DIG_MASK; - carry >>= DIG_SIZE; + #if DIG_SIZE < MPZ_DBL_DIG_SIZE / 2 + // Borrow was negative in the above for-loop, make it positive for next if-block. + borrow = -borrow; + #endif - //assert(borrow >= carry); // enable this to check the logic - borrow -= carry; + // At this point we have either: + // + // 1. quo was the correct value and the most-sig-digit of num is exactly + // cancelled by borrow (borrow == *num_dig). In this case there is + // nothing more to do. + // + // 2. quo was too large, we subtracted too many den from num, and the + // most-sig-digit of num is 1 less than borrow (borrow == *num_dig + 1). + // In this case we must reduce quo and add back den to num until the + // carry from this operation cancels out the borrow. + // + borrow -= *num_dig; + for (; borrow != 0; --quo) { + d = den_dig; + d_norm = 0; + mpz_dbl_dig_t carry = 0; + for (mpz_dig_t *n = num_dig - den_len; n < num_dig; ++n, ++d) { + d_norm = ((mpz_dbl_dig_t)*d << norm_shift) | (d_norm >> DIG_SIZE); + carry += (mpz_dbl_dig_t)*n + (d_norm & DIG_MASK); + *n = carry & DIG_MASK; + carry >>= DIG_SIZE; } + borrow -= carry; } // store this digit of the quotient @@ -731,17 +705,14 @@ STATIC void mpz_need_dig(mpz_t *z, size_t need) { } STATIC mpz_t *mpz_clone(const mpz_t *src) { + assert(src->alloc != 0); mpz_t *z = m_new_obj(mpz_t); z->neg = src->neg; z->fixed_dig = 0; z->alloc = src->alloc; z->len = src->len; - if (src->dig == NULL) { - z->dig = NULL; - } else { - z->dig = m_new(mpz_dig_t, z->alloc); - memcpy(z->dig, src->dig, src->alloc * sizeof(mpz_dig_t)); - } + z->dig = m_new(mpz_dig_t, z->alloc); + memcpy(z->dig, src->dig, src->alloc * sizeof(mpz_dig_t)); return z; } @@ -1009,6 +980,7 @@ these functions are unused /* returns abs(z) */ mpz_t *mpz_abs(const mpz_t *z) { + // TODO: handle case of z->alloc=0 mpz_t *z2 = mpz_clone(z); z2->neg = 0; return z2; @@ -1017,6 +989,7 @@ mpz_t *mpz_abs(const mpz_t *z) { /* returns -z */ mpz_t *mpz_neg(const mpz_t *z) { + // TODO: handle case of z->alloc=0 mpz_t *z2 = mpz_clone(z); z2->neg = 1 - z2->neg; return z2; @@ -1390,13 +1363,14 @@ void mpz_pow_inpl(mpz_t *dest, const mpz_t *lhs, const mpz_t *rhs) { can have dest, lhs, rhs the same; mod can't be the same as dest */ void mpz_pow3_inpl(mpz_t *dest, const mpz_t *lhs, const mpz_t *rhs, const mpz_t *mod) { - if (lhs->len == 0 || rhs->neg != 0) { + if (lhs->len == 0 || rhs->neg != 0 || (mod->len == 1 && mod->dig[0] == 1)) { mpz_set_from_int(dest, 0); return; } + mpz_set_from_int(dest, 1); + if (rhs->len == 0) { - mpz_set_from_int(dest, 1); return; } @@ -1404,8 +1378,6 @@ void mpz_pow3_inpl(mpz_t *dest, const mpz_t *lhs, const mpz_t *rhs, const mpz_t mpz_t *n = mpz_clone(rhs); mpz_t quo; mpz_init_zero(&quo); - mpz_set_from_int(dest, 1); - while (n->len > 0) { if ((n->dig[0] & 1) != 0) { mpz_mul_inpl(dest, dest, x); @@ -1435,6 +1407,7 @@ these functions are unused */ mpz_t *mpz_gcd(const mpz_t *z1, const mpz_t *z2) { if (z1->len == 0) { + // TODO: handle case of z2->alloc=0 mpz_t *a = mpz_clone(z2); a->neg = 0; return a; @@ -1559,7 +1532,7 @@ mpz_t *mpz_mod(const mpz_t *lhs, const mpz_t *rhs) { // must return actual int value if it fits in mp_int_t mp_int_t mpz_hash(const mpz_t *z) { - mp_int_t val = 0; + mp_uint_t val = 0; mpz_dig_t *d = z->dig + z->len; while (d-- > z->dig) { @@ -1674,16 +1647,12 @@ char *mpz_as_str(const mpz_t *i, unsigned int base) { } #endif -// assumes enough space as calculated by mp_int_format_size +// assumes enough space in str as calculated by mp_int_format_size +// base must be between 2 and 32 inclusive // returns length of string, not including null byte size_t mpz_as_str_inpl(const mpz_t *i, unsigned int base, const char *prefix, char base_char, char comma, char *str) { - if (str == NULL) { - return 0; - } - if (base < 2 || base > 32) { - str[0] = 0; - return 0; - } + assert(str != NULL); + assert(2 <= base && base <= 32); size_t ilen = i->len; diff --git a/py/mpz.h b/py/mpz.h index e2d0c30aac32a..3c36cac66baa4 100644 --- a/py/mpz.h +++ b/py/mpz.h @@ -55,18 +55,22 @@ #endif #if MPZ_DIG_SIZE > 16 +#define MPZ_DBL_DIG_SIZE (64) typedef uint32_t mpz_dig_t; typedef uint64_t mpz_dbl_dig_t; typedef int64_t mpz_dbl_dig_signed_t; #elif MPZ_DIG_SIZE > 8 +#define MPZ_DBL_DIG_SIZE (32) typedef uint16_t mpz_dig_t; typedef uint32_t mpz_dbl_dig_t; typedef int32_t mpz_dbl_dig_signed_t; #elif MPZ_DIG_SIZE > 4 +#define MPZ_DBL_DIG_SIZE (16) typedef uint8_t mpz_dig_t; typedef uint16_t mpz_dbl_dig_t; typedef int16_t mpz_dbl_dig_signed_t; #else +#define MPZ_DBL_DIG_SIZE (8) typedef uint8_t mpz_dig_t; typedef uint8_t mpz_dbl_dig_t; typedef int8_t mpz_dbl_dig_signed_t; diff --git a/py/nativeglue.c b/py/nativeglue.c index e63c2fcda6834..b87da6931e391 100644 --- a/py/nativeglue.c +++ b/py/nativeglue.c @@ -146,8 +146,8 @@ void *const mp_fun_table[MP_F_NUMBER_OF] = { mp_obj_new_dict, mp_obj_dict_store, #if MICROPY_PY_BUILTINS_SET - mp_obj_new_set, mp_obj_set_store, + mp_obj_new_set, #endif mp_make_function_from_raw_code, mp_native_call_function_n_kw, diff --git a/py/nlr.c b/py/nlr.c new file mode 100644 index 0000000000000..1bfd9c19b034d --- /dev/null +++ b/py/nlr.c @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013-2017 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpstate.h" + +#if !MICROPY_NLR_SETJMP +// When not using setjmp, nlr_push_tail is called from inline asm so needs special care +#if defined(MICROPY_NLR_X86) && MICROPY_NLR_X86 && defined(MICROPY_NLR_OS_WINDOWS) && MICROPY_NLR_OS_WINDOWS +// On these 32-bit platforms make sure nlr_push_tail doesn't have a leading underscore +unsigned int nlr_push_tail(nlr_buf_t *nlr) asm("nlr_push_tail"); +#else +// LTO can't see inside inline asm functions so explicitly mark nlr_push_tail as used +__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr); +#endif +#endif + +unsigned int nlr_push_tail(nlr_buf_t *nlr) { + nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); + nlr->prev = *top; + MP_NLR_SAVE_PYSTACK(nlr); + *top = nlr; + return 0; // normal return +} + +void nlr_pop(void) { + nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); + *top = (*top)->prev; +} diff --git a/py/nlr.h b/py/nlr.h index 8fa6eb950d58f..1b95002d3b81d 100644 --- a/py/nlr.h +++ b/py/nlr.h @@ -30,55 +30,106 @@ // exception handling, basically a stack of setjmp/longjmp buffers #include -#include #include #include "py/mpconfig.h" -typedef struct _nlr_buf_t nlr_buf_t; -struct _nlr_buf_t { - // the entries here must all be machine word size - nlr_buf_t *prev; - void *ret_val; // always a concrete object (an exception instance) +// If MICROPY_NLR_SETJMP is not enabled then auto-detect the machine arch #if !defined(MICROPY_NLR_SETJMP) || !MICROPY_NLR_SETJMP -#define MICROPY_NLR_SETJMP (0) -#if defined(__i386__) - void *regs[6]; -#elif defined(__x86_64__) - #if defined(__CYGWIN__) - void *regs[12]; - #else - void *regs[8]; - #endif -#elif defined(__thumb2__) || defined(__thumb__) || defined(__arm__) - void *regs[10]; -#elif defined(__xtensa__) - void *regs[10]; -#else - #define MICROPY_NLR_SETJMP (1) +// A lot of nlr-related things need different treatment on Windows + #if defined(_WIN32) || defined(__CYGWIN__) + #define MICROPY_NLR_OS_WINDOWS 1 + #else + #define MICROPY_NLR_OS_WINDOWS 0 + #endif + #if defined(__i386__) + #define MICROPY_NLR_X86 (1) + #define MICROPY_NLR_NUM_REGS (6) + #elif defined(__x86_64__) + #define MICROPY_NLR_X64 (1) + #if MICROPY_NLR_OS_WINDOWS + #define MICROPY_NLR_NUM_REGS (10) + #else + #define MICROPY_NLR_NUM_REGS (8) + #endif + #elif defined(__thumb2__) || defined(__thumb__) || defined(__arm__) + #define MICROPY_NLR_THUMB (1) + #if defined(__SOFTFP__) + #define MICROPY_NLR_NUM_REGS (10) + #else + // With hardware FP registers s16-s31 are callee save so in principle + // should be saved and restored by the NLR code. gcc only uses s16-s21 + // so only save/restore those as an optimisation. + #define MICROPY_NLR_NUM_REGS (10 + 6) + #endif + #elif defined(__xtensa__) + #define MICROPY_NLR_XTENSA (1) + #define MICROPY_NLR_NUM_REGS (10) + #else + #define MICROPY_NLR_SETJMP (1) //#warning "No native NLR support for this arch, using setjmp implementation" + #endif #endif + +// If MICROPY_NLR_SETJMP is not defined above - define/disable it here + +#if !defined(MICROPY_NLR_SETJMP) + #define MICROPY_NLR_SETJMP (0) #endif #if MICROPY_NLR_SETJMP - jmp_buf jmpbuf; +#include #endif + +typedef struct _nlr_buf_t nlr_buf_t; +struct _nlr_buf_t { + // the entries here must all be machine word size + nlr_buf_t *prev; + void *ret_val; // always a concrete object (an exception instance) + + #if MICROPY_NLR_SETJMP + jmp_buf jmpbuf; + #else + void *regs[MICROPY_NLR_NUM_REGS]; + #endif + + #if MICROPY_ENABLE_PYSTACK + void *pystack; + #endif }; -#if MICROPY_NLR_SETJMP -#include "py/mpstate.h" +// Helper macros to save/restore the pystack state +#if MICROPY_ENABLE_PYSTACK +#define MP_NLR_SAVE_PYSTACK(nlr_buf) (nlr_buf)->pystack = MP_STATE_THREAD(pystack_cur) +#define MP_NLR_RESTORE_PYSTACK(nlr_buf) MP_STATE_THREAD(pystack_cur) = (nlr_buf)->pystack +#else +#define MP_NLR_SAVE_PYSTACK(nlr_buf) (void)nlr_buf +#define MP_NLR_RESTORE_PYSTACK(nlr_buf) (void)nlr_buf +#endif + +// Helper macro to use at the start of a specific nlr_jump implementation +#define MP_NLR_JUMP_HEAD(val, top) \ + nlr_buf_t **_top_ptr = &MP_STATE_THREAD(nlr_top); \ + nlr_buf_t *top = *_top_ptr; \ + if (top == NULL) { \ + nlr_jump_fail(val); \ + } \ + top->ret_val = val; \ + MP_NLR_RESTORE_PYSTACK(top); \ + *_top_ptr = top->prev; \ -NORETURN void nlr_setjmp_jump(void *val); +#if MICROPY_NLR_SETJMP // nlr_push() must be defined as a macro, because "The stack context will be // invalidated if the function which called setjmp() returns." -#define nlr_push(buf) ((buf)->prev = MP_STATE_THREAD(nlr_top), MP_STATE_THREAD(nlr_top) = (buf), setjmp((buf)->jmpbuf)) -#define nlr_pop() { MP_STATE_THREAD(nlr_top) = MP_STATE_THREAD(nlr_top)->prev; } -#define nlr_jump(val) nlr_setjmp_jump(val) +// For this case it is safe to call nlr_push_tail() first. +#define nlr_push(buf) (nlr_push_tail(buf), setjmp((buf)->jmpbuf)) #else unsigned int nlr_push(nlr_buf_t *); +#endif + +unsigned int nlr_push_tail(nlr_buf_t *top); void nlr_pop(void); NORETURN void nlr_jump(void *val); -#endif // This must be implemented by a port. It's called by nlr_jump // if no nlr buf has been pushed. It must not return, but rather @@ -107,7 +158,6 @@ NORETURN void nlr_jump_fail(void *val); /* #define nlr_push(val) \ printf("nlr_push: before: nlr_top=%p, val=%p\n", MP_STATE_THREAD(nlr_top), val),assert(MP_STATE_THREAD(nlr_top) != val),nlr_push(val) -#endif */ #endif diff --git a/py/nlrsetjmp.c b/py/nlrsetjmp.c index 1fb45944034fa..960dd86f52e54 100644 --- a/py/nlrsetjmp.c +++ b/py/nlrsetjmp.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2013-2017 Damien P. George * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,17 +24,18 @@ * THE SOFTWARE. */ -#include "py/nlr.h" +#include "py/mpstate.h" #if MICROPY_NLR_SETJMP -void nlr_setjmp_jump(void *val) { +void nlr_jump(void *val) { nlr_buf_t **top_ptr = &MP_STATE_THREAD(nlr_top); nlr_buf_t *top = *top_ptr; if (top == NULL) { nlr_jump_fail(val); } top->ret_val = val; + MP_NLR_RESTORE_PYSTACK(top); *top_ptr = top->prev; longjmp(top->jmpbuf, 1); } diff --git a/py/nlrthumb.c b/py/nlrthumb.c index 0616e59b02bf8..056aa358e770e 100644 --- a/py/nlrthumb.c +++ b/py/nlrthumb.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013-2016 Damien P. George + * Copyright (c) 2013-2017 Damien P. George * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -26,7 +26,7 @@ #include "py/mpstate.h" -#if (!defined(MICROPY_NLR_SETJMP) || !MICROPY_NLR_SETJMP) && (defined(__thumb2__) || defined(__thumb__) || defined(__arm__)) +#if MICROPY_NLR_THUMB #undef nlr_push @@ -63,6 +63,11 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) { "str r10, [r0, #36] \n" // store r10 into nlr_buf "str r11, [r0, #40] \n" // store r11 into nlr_buf "str r13, [r0, #44] \n" // store r13=sp into nlr_buf + #if MICROPY_NLR_NUM_REGS == 16 + "vstr d8, [r0, #48] \n" // store s16-s17 into nlr_buf + "vstr d9, [r0, #56] \n" // store s18-s19 into nlr_buf + "vstr d10, [r0, #64] \n" // store s20-s21 into nlr_buf + #endif "str lr, [r0, #8] \n" // store lr into nlr_buf #endif @@ -82,30 +87,15 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) { : "r1", "r2", "r3" // clobbers ); - return 0; // needed to silence compiler warning + #if !defined(__clang__) && defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)) + // Older versions of gcc give an error when naked functions don't return a value + // Additionally exclude Clang as it also defines __GNUC__ but doesn't need this statement + return 0; + #endif } -__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - nlr->prev = *top; - *top = nlr; - return 0; // normal return -} - -void nlr_pop(void) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - *top = (*top)->prev; -} - -NORETURN __attribute__((naked)) void nlr_jump(void *val) { - nlr_buf_t **top_ptr = &MP_STATE_THREAD(nlr_top); - nlr_buf_t *top = *top_ptr; - if (top == NULL) { - nlr_jump_fail(val); - } - - top->ret_val = val; - *top_ptr = top->prev; +NORETURN void nlr_jump(void *val) { + MP_NLR_JUMP_HEAD(val, top) __asm volatile ( "mov r0, %0 \n" // r0 points to nlr_buf @@ -133,6 +123,11 @@ NORETURN __attribute__((naked)) void nlr_jump(void *val) { "ldr r10, [r0, #36] \n" // load r10 from nlr_buf "ldr r11, [r0, #40] \n" // load r11 from nlr_buf "ldr r13, [r0, #44] \n" // load r13=sp from nlr_buf + #if MICROPY_NLR_NUM_REGS == 16 + "vldr d8, [r0, #48] \n" // load s16-s17 from nlr_buf + "vldr d9, [r0, #56] \n" // load s18-s19 from nlr_buf + "vldr d10, [r0, #64] \n" // load s20-s21 from nlr_buf + #endif "ldr lr, [r0, #8] \n" // load lr from nlr_buf #endif "movs r0, #1 \n" // return 1, non-local return @@ -142,7 +137,7 @@ NORETURN __attribute__((naked)) void nlr_jump(void *val) { : // clobbered registers ); - for (;;); // needed to silence compiler warning + MP_UNREACHABLE } -#endif // (!defined(MICROPY_NLR_SETJMP) || !MICROPY_NLR_SETJMP) && (defined(__thumb2__) || defined(__thumb__) || defined(__arm__)) +#endif // MICROPY_NLR_THUMB diff --git a/py/nlrx64.c b/py/nlrx64.c index 847d10398e75f..569ad84fb037a 100644 --- a/py/nlrx64.c +++ b/py/nlrx64.c @@ -26,25 +26,19 @@ #include "py/mpstate.h" -#if !MICROPY_NLR_SETJMP && defined(__x86_64__) +#if defined(MICROPY_NLR_X64) && MICROPY_NLR_X64 #undef nlr_push // x86-64 callee-save registers are: // rbx, rbp, rsp, r12, r13, r14, r15 -#if defined(_WIN32) || defined(__CYGWIN__) -#define NLR_OS_WINDOWS 1 -#else -#define NLR_OS_WINDOWS 0 -#endif - __attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr); unsigned int nlr_push(nlr_buf_t *nlr) { (void)nlr; - #if NLR_OS_WINDOWS + #if MICROPY_NLR_OS_WINDOWS __asm volatile ( "movq (%rsp), %rax \n" // load return %rip @@ -88,31 +82,12 @@ unsigned int nlr_push(nlr_buf_t *nlr) { return 0; // needed to silence compiler warning } -__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - nlr->prev = *top; - *top = nlr; - return 0; // normal return -} - -void nlr_pop(void) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - *top = (*top)->prev; -} - NORETURN void nlr_jump(void *val) { - nlr_buf_t **top_ptr = &MP_STATE_THREAD(nlr_top); - nlr_buf_t *top = *top_ptr; - if (top == NULL) { - nlr_jump_fail(val); - } - - top->ret_val = val; - *top_ptr = top->prev; + MP_NLR_JUMP_HEAD(val, top) __asm volatile ( "movq %0, %%rcx \n" // %rcx points to nlr_buf - #if NLR_OS_WINDOWS + #if MICROPY_NLR_OS_WINDOWS "movq 88(%%rcx), %%rsi \n" // load saved %rsi "movq 80(%%rcx), %%rdi \n" // load saved %rdr #endif @@ -133,7 +108,7 @@ NORETURN void nlr_jump(void *val) { : // clobbered registers ); - for (;;); // needed to silence compiler warning + MP_UNREACHABLE } -#endif // !MICROPY_NLR_SETJMP && defined(__x86_64__) +#endif // MICROPY_NLR_X64 diff --git a/py/nlrx86.c b/py/nlrx86.c index 094dea3cc8c51..6fbbe443271b3 100644 --- a/py/nlrx86.c +++ b/py/nlrx86.c @@ -26,34 +26,42 @@ #include "py/mpstate.h" -#if !MICROPY_NLR_SETJMP && defined(__i386__) +#if defined(MICROPY_NLR_X86) && MICROPY_NLR_X86 #undef nlr_push // For reference, x86 callee save regs are: // ebx, esi, edi, ebp, esp, eip -#if defined(_WIN32) || defined(__CYGWIN__) -#define NLR_OS_WINDOWS 1 +#if defined(MICROPY_NLR_OS_WINDOWS) && MICROPY_NLR_OS_WINDOWS +unsigned int nlr_push_tail(nlr_buf_t *nlr) asm("nlr_push_tail"); #else -#define NLR_OS_WINDOWS 0 +__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr); #endif -#if NLR_OS_WINDOWS -unsigned int nlr_push_tail(nlr_buf_t *nlr) asm("nlr_push_tail"); +#if !defined(__clang__) && defined(__GNUC__) && __GNUC__ >= 8 +// Since gcc 8.0 the naked attribute is supported +#define USE_NAKED (1) +#define UNDO_PRELUDE (0) +#elif defined(__ZEPHYR__) || defined(__ANDROID__) +// Zephyr and Android use a different calling convention by default +#define USE_NAKED (0) +#define UNDO_PRELUDE (0) #else -__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr); +#define USE_NAKED (0) +#define UNDO_PRELUDE (1) #endif +#if USE_NAKED +__attribute__((naked)) +#endif unsigned int nlr_push(nlr_buf_t *nlr) { + #if !USE_NAKED (void)nlr; + #endif __asm volatile ( - // Check for Zephyr, which uses a different calling convention - // by default. - // TODE: Better support for various x86 calling conventions - // (unfortunately, __attribute__((naked)) is not supported on x86). - #if !(defined(__ZEPHYR__) || defined(__ANDROID__)) + #if UNDO_PRELUDE "pop %ebp \n" // undo function's prelude #endif "mov 4(%esp), %edx \n" // load nlr_buf @@ -67,30 +75,13 @@ unsigned int nlr_push(nlr_buf_t *nlr) { "jmp nlr_push_tail \n" // do the rest in C ); + #if !USE_NAKED return 0; // needed to silence compiler warning -} - -__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - nlr->prev = *top; - *top = nlr; - return 0; // normal return -} - -void nlr_pop(void) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - *top = (*top)->prev; + #endif } NORETURN void nlr_jump(void *val) { - nlr_buf_t **top_ptr = &MP_STATE_THREAD(nlr_top); - nlr_buf_t *top = *top_ptr; - if (top == NULL) { - nlr_jump_fail(val); - } - - top->ret_val = val; - *top_ptr = top->prev; + MP_NLR_JUMP_HEAD(val, top) __asm volatile ( "mov %0, %%edx \n" // %edx points to nlr_buf @@ -109,7 +100,7 @@ NORETURN void nlr_jump(void *val) { : // clobbered registers ); - for (;;); // needed to silence compiler warning + MP_UNREACHABLE } -#endif // !MICROPY_NLR_SETJMP && defined(__i386__) +#endif // MICROPY_NLR_X86 diff --git a/py/nlrxtensa.c b/py/nlrxtensa.c index 4520e7e7ac620..5640350043b6c 100644 --- a/py/nlrxtensa.c +++ b/py/nlrxtensa.c @@ -26,7 +26,7 @@ #include "py/mpstate.h" -#if !MICROPY_NLR_SETJMP && defined(__xtensa__) +#if defined(MICROPY_NLR_XTENSA) && MICROPY_NLR_XTENSA #undef nlr_push @@ -55,27 +55,8 @@ unsigned int nlr_push(nlr_buf_t *nlr) { return 0; // needed to silence compiler warning } -__attribute__((used)) unsigned int nlr_push_tail(nlr_buf_t *nlr) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - nlr->prev = *top; - *top = nlr; - return 0; // normal return -} - -void nlr_pop(void) { - nlr_buf_t **top = &MP_STATE_THREAD(nlr_top); - *top = (*top)->prev; -} - NORETURN void nlr_jump(void *val) { - nlr_buf_t **top_ptr = &MP_STATE_THREAD(nlr_top); - nlr_buf_t *top = *top_ptr; - if (top == NULL) { - nlr_jump_fail(val); - } - - top->ret_val = val; - *top_ptr = top->prev; + MP_NLR_JUMP_HEAD(val, top) __asm volatile ( "mov.n a2, %0 \n" // a2 points to nlr_buf @@ -96,7 +77,7 @@ NORETURN void nlr_jump(void *val) { : // clobbered registers ); - for (;;); // needed to silence compiler warning + MP_UNREACHABLE } -#endif // !MICROPY_NLR_SETJMP && defined(__xtensa__) +#endif // MICROPY_NLR_XTENSA diff --git a/py/obj.c b/py/obj.c index 4eb1716266122..f1e00de1a4e58 100644 --- a/py/obj.c +++ b/py/obj.c @@ -33,10 +33,15 @@ #include "py/objtype.h" #include "py/objint.h" #include "py/objstr.h" +#include "py/qstr.h" #include "py/runtime.h" #include "py/stackctrl.h" #include "py/stream.h" // for mp_obj_print +#include "supervisor/linker.h" +#include "supervisor/shared/stack.h" +#include "supervisor/shared/translate.h" + mp_obj_type_t *mp_obj_get_type(mp_const_obj_t o_in) { if (MP_OBJ_IS_SMALL_INT(o_in)) { return (mp_obj_type_t*)&mp_type_int; @@ -59,6 +64,9 @@ const char *mp_obj_get_type_str(mp_const_obj_t o_in) { void mp_obj_print_helper(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind) { // There can be data structures nested too deep, or just recursive MP_STACK_CHECK(); + #ifdef RUN_BACKGROUND_TASKS + RUN_BACKGROUND_TASKS; + #endif #ifndef NDEBUG if (o_in == MP_OBJ_NULL) { mp_print_str(print, "(nil)"); @@ -79,24 +87,40 @@ void mp_obj_print(mp_obj_t o_in, mp_print_kind_t kind) { // helper function to print an exception with traceback void mp_obj_print_exception(const mp_print_t *print, mp_obj_t exc) { - if (mp_obj_is_exception_instance(exc)) { + if (mp_obj_is_exception_instance(exc) && stack_ok()) { size_t n, *values; mp_obj_exception_get_traceback(exc, &n, &values); if (n > 0) { assert(n % 3 == 0); - mp_print_str(print, "Traceback (most recent call last):\n"); + // Decompress the format strings + const compressed_string_t* traceback = translate("Traceback (most recent call last):\n"); + char decompressed[traceback->length]; + decompress(traceback, decompressed); +#if MICROPY_ENABLE_SOURCE_LINE + const compressed_string_t* frame = translate(" File \"%q\", line %d"); +#else + const compressed_string_t* frame = translate(" File \"%q\""); +#endif + char decompressed_frame[frame->length]; + decompress(frame, decompressed_frame); + const compressed_string_t* block_fmt = translate(", in %q\n"); + char decompressed_block[block_fmt->length]; + decompress(block_fmt, decompressed_block); + + // Print the traceback + mp_print_str(print, decompressed); for (int i = n - 3; i >= 0; i -= 3) { #if MICROPY_ENABLE_SOURCE_LINE - mp_printf(print, " File \"%q\", line %d", values[i], (int)values[i + 1]); + mp_printf(print, decompressed_frame, values[i], (int)values[i + 1]); #else - mp_printf(print, " File \"%q\"", values[i]); + mp_printf(print, decompressed_frame, values[i]); #endif // the block name can be NULL if it's unknown qstr block = values[i + 2]; if (block == MP_QSTR_NULL) { mp_print_str(print, "\n"); } else { - mp_printf(print, ", in %q\n", block); + mp_printf(print, decompressed_block, block); } } } @@ -105,7 +129,7 @@ void mp_obj_print_exception(const mp_print_t *print, mp_obj_t exc) { mp_print_str(print, "\n"); } -bool mp_obj_is_true(mp_obj_t arg) { +bool PLACE_IN_ITCM(mp_obj_is_true)(mp_obj_t arg) { if (arg == mp_const_false) { return 0; } else if (arg == mp_const_true) { @@ -236,10 +260,10 @@ mp_int_t mp_obj_get_int(mp_const_obj_t arg) { return mp_obj_int_get_checked(arg); } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("can't convert to int"); + mp_raise_TypeError(translate("can't convert to int")); } else { mp_raise_TypeError_varg( - "can't convert %s to int", mp_obj_get_type_str(arg)); + translate("can't convert %s to int"), mp_obj_get_type_str(arg)); } } } @@ -299,10 +323,10 @@ mp_float_t mp_obj_get_float(mp_obj_t arg) { if (!mp_obj_get_float_maybe(arg, &val)) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("can't convert to float"); + mp_raise_TypeError(translate("can't convert to float")); } else { mp_raise_TypeError_varg( - "can't convert %s to float", mp_obj_get_type_str(arg)); + translate("can't convert %s to float"), mp_obj_get_type_str(arg)); } } @@ -332,10 +356,10 @@ void mp_obj_get_complex(mp_obj_t arg, mp_float_t *real, mp_float_t *imag) { mp_obj_complex_get(arg, real, imag); } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("can't convert to complex"); + mp_raise_TypeError(translate("can't convert to complex")); } else { mp_raise_TypeError_varg( - "can't convert %s to complex", mp_obj_get_type_str(arg)); + translate("can't convert %s to complex"), mp_obj_get_type_str(arg)); } } } @@ -350,10 +374,10 @@ void mp_obj_get_array(mp_obj_t o, size_t *len, mp_obj_t **items) { mp_obj_list_get(o, len, items); } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("expected tuple/list"); + mp_raise_TypeError(translate("expected tuple/list")); } else { mp_raise_TypeError_varg( - "object '%s' is not a tuple or list", mp_obj_get_type_str(o)); + translate("object '%s' is not a tuple or list"), mp_obj_get_type_str(o)); } } } @@ -364,9 +388,9 @@ void mp_obj_get_array_fixed_n(mp_obj_t o, size_t len, mp_obj_t **items) { mp_obj_get_array(o, &seq_len, items); if (seq_len != len) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_ValueError("tuple/list has wrong length"); + mp_raise_ValueError(translate("tuple/list has wrong length")); } else { - mp_raise_ValueError_varg("requested length %d but object has length %d", + mp_raise_ValueError_varg(translate("requested length %d but object has length %d"), (int)len, (int)seq_len); } } @@ -379,10 +403,10 @@ size_t mp_get_index(const mp_obj_type_t *type, size_t len, mp_obj_t index, bool i = MP_OBJ_SMALL_INT_VALUE(index); } else if (!mp_obj_get_int_maybe(index, &i)) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("indices must be integers"); + mp_raise_TypeError(translate("indices must be integers")); } else { mp_raise_TypeError_varg( - "%q indices must be integers, not %s", + translate("%q indices must be integers, not %s"), type->name, mp_obj_get_type_str(index)); } } @@ -399,10 +423,10 @@ size_t mp_get_index(const mp_obj_type_t *type, size_t len, mp_obj_t index, bool } else { if (i < 0 || (mp_uint_t)i >= len) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_IndexError("index out of range"); + mp_raise_IndexError(translate("index out of range")); } else { mp_raise_msg_varg(&mp_type_IndexError, - "%q index out of range", type->name); + translate("%q index out of range"), type->name); } } } @@ -434,10 +458,10 @@ mp_obj_t mp_obj_len(mp_obj_t o_in) { mp_obj_t len = mp_obj_len_maybe(o_in); if (len == MP_OBJ_NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object has no len"); + mp_raise_TypeError(translate("object has no len")); } else { mp_raise_TypeError_varg( - "object of type '%s' has no len()", mp_obj_get_type_str(o_in)); + translate("object of type '%s' has no len()"), mp_obj_get_type_str(o_in)); } } else { return len; @@ -466,33 +490,35 @@ mp_obj_t mp_obj_len_maybe(mp_obj_t o_in) { mp_obj_t mp_obj_subscr(mp_obj_t base, mp_obj_t index, mp_obj_t value) { mp_obj_type_t *type = mp_obj_get_type(base); + if (type->subscr != NULL) { mp_obj_t ret = type->subscr(base, index, value); + // May have called port specific C code. Make sure it didn't mess up the heap. + assert_heap_ok(); if (ret != MP_OBJ_NULL) { return ret; } - // TODO: call base classes here? } if (value == MP_OBJ_NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object does not support item deletion"); + mp_raise_TypeError(translate("object does not support item deletion")); } else { mp_raise_TypeError_varg( - "'%s' object does not support item deletion", mp_obj_get_type_str(base)); + translate("'%s' object does not support item deletion"), mp_obj_get_type_str(base)); } } else if (value == MP_OBJ_SENTINEL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object is not subscriptable"); + mp_raise_TypeError(translate("object is not subscriptable")); } else { mp_raise_TypeError_varg( - "'%s' object is not subscriptable", mp_obj_get_type_str(base)); + translate("'%s' object is not subscriptable"), mp_obj_get_type_str(base)); } } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object does not support item assignment"); + mp_raise_TypeError(translate("object does not support item assignment")); } else { mp_raise_TypeError_varg( - "'%s' object does not support item assignment", mp_obj_get_type_str(base)); + translate("'%s' object does not support item assignment"), mp_obj_get_type_str(base)); } } } @@ -509,6 +535,36 @@ mp_obj_t mp_identity_getiter(mp_obj_t self, mp_obj_iter_buf_t *iter_buf) { return self; } +typedef struct { + mp_obj_base_t base; + mp_fun_1_t iternext; + mp_obj_t obj; + mp_int_t cur; +} mp_obj_generic_it_t; + +STATIC mp_obj_t generic_it_iternext(mp_obj_t self_in) { + mp_obj_generic_it_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_type_t *type = mp_obj_get_type(self->obj); + mp_obj_t current_length = type->unary_op(MP_UNARY_OP_LEN, self->obj); + if (self->cur < MP_OBJ_SMALL_INT_VALUE(current_length)) { + mp_obj_t o_out = type->subscr(self->obj, MP_OBJ_NEW_SMALL_INT(self->cur), MP_OBJ_SENTINEL); + self->cur += 1; + return o_out; + } else { + return MP_OBJ_STOP_ITERATION; + } +} + +mp_obj_t mp_obj_new_generic_iterator(mp_obj_t obj, mp_obj_iter_buf_t *iter_buf) { + assert(sizeof(mp_obj_generic_it_t) <= sizeof(mp_obj_iter_buf_t)); + mp_obj_generic_it_t *o = (mp_obj_generic_it_t*)iter_buf; + o->base.type = &mp_type_polymorph_iter; + o->iternext = generic_it_iternext; + o->obj = obj; + o->cur = 0; + return MP_OBJ_FROM_PTR(o); +} + bool mp_get_buffer(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) { mp_obj_type_t *type = mp_obj_get_type(obj); if (type->buffer_p.get_buffer == NULL) { @@ -523,7 +579,7 @@ bool mp_get_buffer(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) { void mp_get_buffer_raise(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags) { if (!mp_get_buffer(obj, bufinfo, flags)) { - mp_raise_TypeError("object with buffer protocol required"); + mp_raise_TypeError(translate("object with buffer protocol required")); } } diff --git a/py/obj.h b/py/obj.h index e4d950b97ca29..fa315d12f7d9b 100644 --- a/py/obj.h +++ b/py/obj.h @@ -34,6 +34,8 @@ #include "py/mpprint.h" #include "py/runtime0.h" +#include "supervisor/shared/translate.h" + // This is the definition of the opaque MicroPython object type. // All concrete objects have an encoding within this type and the // particular encoding is specified by MICROPY_OBJ_REPR. @@ -172,8 +174,8 @@ static inline bool MP_OBJ_IS_OBJ(mp_const_obj_t o) static inline bool MP_OBJ_IS_SMALL_INT(mp_const_obj_t o) { return ((((mp_int_t)(o)) & 0xffff000000000000) == 0x0001000000000000); } -#define MP_OBJ_SMALL_INT_VALUE(o) (((intptr_t)(o)) >> 1) -#define MP_OBJ_NEW_SMALL_INT(small_int) ((mp_obj_t)(((uintptr_t)(small_int)) << 1) | 0x0001000000000001) +#define MP_OBJ_SMALL_INT_VALUE(o) (((mp_int_t)((o) << 16)) >> 17) +#define MP_OBJ_NEW_SMALL_INT(small_int) (((((uint64_t)(small_int)) & 0x7fffffffffff) << 1) | 0x0001000000000001) static inline bool MP_OBJ_IS_QSTR(mp_const_obj_t o) { return ((((mp_int_t)(o)) & 0xffff000000000000) == 0x0002000000000000); } @@ -181,7 +183,7 @@ static inline bool MP_OBJ_IS_QSTR(mp_const_obj_t o) #define MP_OBJ_NEW_QSTR(qst) ((mp_obj_t)((((mp_uint_t)(qst)) << 1) | 0x0002000000000001)) #if MICROPY_PY_BUILTINS_FLOAT -#define mp_const_float_e {((mp_obj_t)((uint64_t)0x4005bf0a8b125769 + 0x8004000000000000))} +#define mp_const_float_e {((mp_obj_t)((uint64_t)0x4005bf0a8b145769 + 0x8004000000000000))} #define mp_const_float_pi {((mp_obj_t)((uint64_t)0x400921fb54442d18 + 0x8004000000000000))} static inline bool mp_obj_is_float(mp_const_obj_t o) { @@ -252,6 +254,8 @@ typedef struct _mp_rom_obj_t { mp_const_obj_t o; } mp_rom_obj_t; // The macros below are derived from the ones above and are used to // check for more specific object types. +// Note: these are kept as macros because inline functions sometimes use much +// more code space than the equivalent macros, depending on the compiler. #define MP_OBJ_IS_TYPE(o, t) (MP_OBJ_IS_OBJ(o) && (((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type == (t))) // this does not work for checking int, str or fun; use below macros for that #define MP_OBJ_IS_INT(o) (MP_OBJ_IS_SMALL_INT(o) || MP_OBJ_IS_TYPE(o, &mp_type_int)) @@ -259,17 +263,6 @@ typedef struct _mp_rom_obj_t { mp_const_obj_t o; } mp_rom_obj_t; #define MP_OBJ_IS_STR_OR_BYTES(o) (MP_OBJ_IS_QSTR(o) || (MP_OBJ_IS_OBJ(o) && ((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type->binary_op == mp_obj_str_binary_op)) #define MP_OBJ_IS_FUN(o) (MP_OBJ_IS_OBJ(o) && (((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type->name == MP_QSTR_function)) -// Note: inline functions sometimes use much more code space than the -// equivalent macros, depending on the compiler. -//static inline bool MP_OBJ_IS_TYPE(mp_const_obj_t o, const mp_obj_type_t *t) { return (MP_OBJ_IS_OBJ(o) && (((mp_obj_base_t*)(o))->type == (t))); } // this does not work for checking a string, use below macro for that -//static inline bool MP_OBJ_IS_INT(mp_const_obj_t o) { return (MP_OBJ_IS_SMALL_INT(o) || MP_OBJ_IS_TYPE(o, &mp_type_int)); } // returns true if o is a small int or long int -// Need to forward declare these for the inline function to compile. -extern const mp_obj_type_t mp_type_int; -extern const mp_obj_type_t mp_type_bool; -static inline bool mp_obj_is_integer(mp_const_obj_t o) { return MP_OBJ_IS_INT(o) || MP_OBJ_IS_TYPE(o, &mp_type_bool); } // returns true if o is bool, small int or long int -//static inline bool MP_OBJ_IS_STR(mp_const_obj_t o) { return (MP_OBJ_IS_QSTR(o) || MP_OBJ_IS_TYPE(o, &mp_type_str)); } - - // These macros are used to declare and define constant function objects // You can put "static" in front of the definitions to make them local @@ -302,6 +295,13 @@ static inline bool mp_obj_is_integer(mp_const_obj_t o) { return MP_OBJ_IS_INT(o) #define MP_DEFINE_CONST_FUN_OBJ_KW(obj_name, n_args_min, fun_name) \ const mp_obj_fun_builtin_var_t obj_name = \ {{&mp_type_fun_builtin_var}, true, n_args_min, MP_OBJ_FUN_ARGS_MAX, .fun.kw = fun_name} +#define MP_DEFINE_CONST_PROP_GET(obj_name, fun_name) \ + const mp_obj_fun_builtin_fixed_t fun_name##_obj = {{&mp_type_fun_builtin_1}, .fun._1 = fun_name}; \ + const mp_obj_property_t obj_name = { \ + .base.type = &mp_type_property, \ + .proxy = {(mp_obj_t)&fun_name##_obj, \ + (mp_obj_t)&mp_const_none_obj, \ + (mp_obj_t)&mp_const_none_obj}, } // These macros are used to define constant map/dict objects // You can put "static" in front of the definition to make it local @@ -338,6 +338,13 @@ static inline bool mp_obj_is_integer(mp_const_obj_t o) { return MP_OBJ_IS_INT(o) #define MP_DEFINE_CONST_STATICMETHOD_OBJ(obj_name, fun_name) const mp_rom_obj_static_class_method_t obj_name = {{&mp_type_staticmethod}, fun_name} #define MP_DEFINE_CONST_CLASSMETHOD_OBJ(obj_name, fun_name) const mp_rom_obj_static_class_method_t obj_name = {{&mp_type_classmethod}, fun_name} +// Declare a module as a builtin, processed by makemoduledefs.py +// param module_name: MP_QSTR_ +// param obj_module: mp_obj_module_t instance +// prarm enabled_define: used as `#if (enabled_define) around entry` + +#define MP_REGISTER_MODULE(module_name, obj_module, enabled_define) + // Underlying map/hash table implementation (not dict object or map function) typedef struct _mp_map_elem_t { @@ -359,7 +366,9 @@ typedef struct _mp_map_t { size_t all_keys_are_qstrs : 1; size_t is_fixed : 1; // a fixed array that can't be modified; must also be ordered size_t is_ordered : 1; // an ordered array - size_t used : (8 * sizeof(size_t) - 3); + size_t scanning : 1; // true if we're in the middle of scanning linked dictionaries, + // e.g., make_dict_long_lived() + size_t used : (8 * sizeof(size_t) - 4); size_t alloc; mp_map_elem_t *table; } mp_map_t; @@ -430,7 +439,7 @@ typedef struct _mp_obj_iter_buf_t { #define MP_OBJ_ITER_BUF_NSLOTS ((sizeof(mp_obj_iter_buf_t) + sizeof(mp_obj_t) - 1) / sizeof(mp_obj_t)) typedef void (*mp_print_fun_t)(const mp_print_t *print, mp_obj_t o, mp_print_kind_t kind); -typedef mp_obj_t (*mp_make_new_fun_t)(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args); +typedef mp_obj_t (*mp_make_new_fun_t)(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); typedef mp_obj_t (*mp_call_fun_t)(mp_obj_t fun, size_t n_args, size_t n_kw, const mp_obj_t *args); typedef mp_obj_t (*mp_unary_op_fun_t)(mp_unary_op_t op, mp_obj_t); typedef mp_obj_t (*mp_binary_op_fun_t)(mp_binary_op_t op, mp_obj_t, mp_obj_t); @@ -462,22 +471,15 @@ typedef struct _mp_buffer_p_t { bool mp_get_buffer(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags); void mp_get_buffer_raise(mp_obj_t obj, mp_buffer_info_t *bufinfo, mp_uint_t flags); -// Stream protocol -typedef struct _mp_stream_p_t { - // On error, functions should return MP_STREAM_ERROR and fill in *errcode (values - // are implementation-dependent, but will be exposed to user, e.g. via exception). - mp_uint_t (*read)(mp_obj_t obj, void *buf, mp_uint_t size, int *errcode); - mp_uint_t (*write)(mp_obj_t obj, const void *buf, mp_uint_t size, int *errcode); - mp_uint_t (*ioctl)(mp_obj_t obj, mp_uint_t request, uintptr_t arg, int *errcode); - mp_uint_t is_text : 1; // default is bytes, set this for text stream -} mp_stream_p_t; - struct _mp_obj_type_t { // A type is an object so must start with this entry, which points to mp_type_type. mp_obj_base_t base; - // The name of this type. - qstr name; + // Flags associated with this type. + uint16_t flags; + + // The name of this type, a qstr. + uint16_t name; // Corresponds to __repr__ and __str__ special methods. mp_print_fun_t print; @@ -542,6 +544,8 @@ struct _mp_obj_type_t { extern const mp_obj_type_t mp_type_type; extern const mp_obj_type_t mp_type_object; extern const mp_obj_type_t mp_type_NoneType; +extern const mp_obj_type_t mp_type_bool; +extern const mp_obj_type_t mp_type_int; extern const mp_obj_type_t mp_type_str; extern const mp_obj_type_t mp_type_bytes; extern const mp_obj_type_t mp_type_bytearray; @@ -553,6 +557,7 @@ extern const mp_obj_type_t mp_type_list; extern const mp_obj_type_t mp_type_map; // map (the python builtin, not the dict implementation detail) extern const mp_obj_type_t mp_type_enumerate; extern const mp_obj_type_t mp_type_filter; +extern const mp_obj_type_t mp_type_deque; extern const mp_obj_type_t mp_type_dict; extern const mp_obj_type_t mp_type_ordereddict; extern const mp_obj_type_t mp_type_range; @@ -590,9 +595,11 @@ extern const mp_obj_type_t mp_type_ImportError; extern const mp_obj_type_t mp_type_IndentationError; extern const mp_obj_type_t mp_type_IndexError; extern const mp_obj_type_t mp_type_KeyboardInterrupt; +extern const mp_obj_type_t mp_type_ReloadException; extern const mp_obj_type_t mp_type_KeyError; extern const mp_obj_type_t mp_type_LookupError; extern const mp_obj_type_t mp_type_MemoryError; +extern const mp_obj_type_t mp_type_MpyError; extern const mp_obj_type_t mp_type_NameError; extern const mp_obj_type_t mp_type_NotImplementedError; extern const mp_obj_type_t mp_type_OSError; @@ -624,7 +631,6 @@ extern const struct _mp_obj_str_t mp_const_empty_bytes_obj; extern const struct _mp_obj_tuple_t mp_const_empty_tuple_obj; extern const struct _mp_obj_singleton_t mp_const_ellipsis_obj; extern const struct _mp_obj_singleton_t mp_const_notimplemented_obj; -extern const struct _mp_obj_exception_t mp_const_MemoryError_obj; extern const struct _mp_obj_exception_t mp_const_GeneratorExit_obj; // General API for objects @@ -637,10 +643,13 @@ mp_obj_t mp_obj_new_int_from_uint(mp_uint_t value); mp_obj_t mp_obj_new_int_from_str_len(const char **str, size_t len, bool neg, unsigned int base); mp_obj_t mp_obj_new_int_from_ll(long long val); // this must return a multi-precision integer object (or raise an overflow exception) mp_obj_t mp_obj_new_int_from_ull(unsigned long long val); // this must return a multi-precision integer object (or raise an overflow exception) -mp_obj_t mp_obj_new_str(const char* data, size_t len, bool make_qstr_if_not_already); +mp_obj_t mp_obj_new_str(const char* data, size_t len); +mp_obj_t mp_obj_new_str_via_qstr(const char* data, size_t len); mp_obj_t mp_obj_new_str_from_vstr(const mp_obj_type_t *type, vstr_t *vstr); mp_obj_t mp_obj_new_bytes(const byte* data, size_t len); +mp_obj_t mp_obj_new_bytes_of_zeros(size_t len); mp_obj_t mp_obj_new_bytearray(size_t n, void *items); +mp_obj_t mp_obj_new_bytearray_of_zeros(size_t n); mp_obj_t mp_obj_new_bytearray_by_ref(size_t n, void *items); #if MICROPY_PY_BUILTINS_FLOAT mp_obj_t mp_obj_new_int_from_float(mp_float_t val); @@ -649,9 +658,9 @@ mp_obj_t mp_obj_new_complex(mp_float_t real, mp_float_t imag); mp_obj_t mp_obj_new_exception(const mp_obj_type_t *exc_type); mp_obj_t mp_obj_new_exception_arg1(const mp_obj_type_t *exc_type, mp_obj_t arg); mp_obj_t mp_obj_new_exception_args(const mp_obj_type_t *exc_type, size_t n_args, const mp_obj_t *args); -mp_obj_t mp_obj_new_exception_msg(const mp_obj_type_t *exc_type, const char *msg); -mp_obj_t mp_obj_new_exception_msg_varg(const mp_obj_type_t *exc_type, const char *fmt, ...); // counts args by number of % symbols in fmt, excluding %%; can only handle void* sizes (ie no float/double!) -mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const char *fmt, va_list ap); // counts args by number of % symbols in fmt, excluding %%; can only handle void* sizes (ie no float/double!) +mp_obj_t mp_obj_new_exception_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg); +mp_obj_t mp_obj_new_exception_msg_varg(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, ...); // counts args by number of % symbols in fmt, excluding %%; can only handle void* sizes (ie no float/double!) +mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, va_list ap); // counts args by number of % symbols in fmt, excluding %%; can only handle void* sizes (ie no float/double!) mp_obj_t mp_obj_new_fun_bc(mp_obj_t def_args, mp_obj_t def_kw_args, const byte *code, const mp_uint_t *const_table); mp_obj_t mp_obj_new_fun_native(mp_obj_t def_args_in, mp_obj_t def_kw_args, const void *fun_data, const mp_uint_t *const_table); mp_obj_t mp_obj_new_fun_viper(size_t n_args, void *fun_data, mp_uint_t type_sig); @@ -660,6 +669,7 @@ mp_obj_t mp_obj_new_gen_wrap(mp_obj_t fun); mp_obj_t mp_obj_new_closure(mp_obj_t fun, size_t n_closed, const mp_obj_t *closed); mp_obj_t mp_obj_new_tuple(size_t n, const mp_obj_t *items); mp_obj_t mp_obj_new_list(size_t n, mp_obj_t *items); +mp_obj_t mp_obj_new_list_from_iter(mp_obj_t iterable); mp_obj_t mp_obj_new_dict(size_t n_args); mp_obj_t mp_obj_new_set(size_t n_args, mp_obj_t *items); mp_obj_t mp_obj_new_slice(mp_obj_t start, mp_obj_t stop, mp_obj_t step); @@ -671,7 +681,7 @@ mp_obj_t mp_obj_new_memoryview(byte typecode, size_t nitems, void *items); mp_obj_type_t *mp_obj_get_type(mp_const_obj_t o_in); const char *mp_obj_get_type_str(mp_const_obj_t o_in); bool mp_obj_is_subclass_fast(mp_const_obj_t object, mp_const_obj_t classinfo); // arguments should be type objects -mp_obj_t mp_instance_cast_to_native_base(mp_const_obj_t self_in, mp_const_obj_t native_type); +mp_obj_t mp_instance_cast_to_native_base(mp_obj_t self_in, mp_const_obj_t native_type); void mp_obj_print_helper(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind); void mp_obj_print(mp_obj_t o, mp_print_kind_t kind); @@ -681,6 +691,7 @@ bool mp_obj_is_true(mp_obj_t arg); bool mp_obj_is_callable(mp_obj_t o_in); bool mp_obj_equal(mp_obj_t o1, mp_obj_t o2); +static inline bool mp_obj_is_integer(mp_const_obj_t o) { return MP_OBJ_IS_INT(o) || MP_OBJ_IS_TYPE(o, &mp_type_bool); } // returns true if o is bool, small int or long int mp_int_t mp_obj_get_int(mp_const_obj_t arg); mp_int_t mp_obj_get_int_truncated(mp_const_obj_t arg); bool mp_obj_get_int_maybe(mp_const_obj_t arg, mp_int_t *value); @@ -717,8 +728,9 @@ bool mp_obj_exception_match(mp_obj_t exc, mp_const_obj_t exc_type); void mp_obj_exception_clear_traceback(mp_obj_t self_in); void mp_obj_exception_add_traceback(mp_obj_t self_in, qstr file, size_t line, qstr block); void mp_obj_exception_get_traceback(mp_obj_t self_in, size_t *n, size_t **values); +mp_obj_t mp_obj_exception_get_traceback_obj(mp_obj_t self_in); mp_obj_t mp_obj_exception_get_value(mp_obj_t self_in); -mp_obj_t mp_obj_exception_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args); +mp_obj_t mp_obj_exception_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); mp_obj_t mp_alloc_emergency_exception_buf(mp_obj_t size_in); void mp_init_emergency_exception_buf(void); @@ -728,6 +740,7 @@ qstr mp_obj_str_get_qstr(mp_obj_t self_in); // use this if you will anyway conve const char *mp_obj_str_get_str(mp_obj_t self_in); // use this only if you need the string to be null terminated const char *mp_obj_str_get_data(mp_obj_t self_in, size_t *len); mp_obj_t mp_obj_str_intern(mp_obj_t str); +mp_obj_t mp_obj_str_intern_checked(mp_obj_t obj); void mp_str_print_quoted(const mp_print_t *print, const byte *str_data, size_t str_len, bool is_bytes); #if MICROPY_PY_BUILTINS_FLOAT @@ -752,8 +765,7 @@ void mp_obj_tuple_del(mp_obj_t self_in); mp_int_t mp_obj_tuple_hash(mp_obj_t self_in); // list -struct _mp_obj_list_t; -void mp_obj_list_init(struct _mp_obj_list_t *o, size_t n); +mp_obj_t mp_obj_list_clear(mp_obj_t self_in); mp_obj_t mp_obj_list_append(mp_obj_t self_in, mp_obj_t arg); mp_obj_t mp_obj_list_remove(mp_obj_t self_in, mp_obj_t value); void mp_obj_list_get(mp_obj_t self_in, size_t *len, mp_obj_t **items); @@ -810,6 +822,10 @@ mp_obj_t mp_identity(mp_obj_t self); MP_DECLARE_CONST_FUN_OBJ_1(mp_identity_obj); mp_obj_t mp_identity_getiter(mp_obj_t self, mp_obj_iter_buf_t *iter_buf); +// Generic iterator that uses unary op and subscr to iterate over a native type. It will be slower +// than a custom iterator but applies broadly. +mp_obj_t mp_obj_new_generic_iterator(mp_obj_t self, mp_obj_iter_buf_t *iter_buf); + // module typedef struct _mp_obj_module_t { mp_obj_base_t base; @@ -842,7 +858,10 @@ typedef struct { mp_uint_t stop; mp_int_t step; } mp_bound_slice_t; +void mp_obj_slice_indices(mp_obj_t self_in, mp_int_t length, mp_bound_slice_t *result); +// Compute the new length of a sequence and ensure an exception is thrown on overflow. +size_t mp_seq_multiply_len(size_t item_sz, size_t len); void mp_seq_multiply(const void *items, size_t item_sz, size_t len, size_t times, void *dest); #if MICROPY_PY_BUILTINS_SLICE bool mp_seq_get_fast_slice_indexes(mp_uint_t len, mp_obj_t slice, mp_bound_slice_t *indexes); diff --git a/py/objarray.c b/py/objarray.c index c4c547e19f3df..9114a63c5a397 100644 --- a/py/objarray.c +++ b/py/objarray.c @@ -34,6 +34,8 @@ #include "py/objstr.h" #include "py/objarray.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_ARRAY || MICROPY_PY_BUILTINS_BYTEARRAY || MICROPY_PY_BUILTINS_MEMORYVIEW // About memoryview object: We want to reuse as much code as possible from @@ -155,9 +157,9 @@ STATIC mp_obj_t array_construct(char typecode, mp_obj_t initializer) { #endif #if MICROPY_PY_ARRAY -STATIC mp_obj_t array_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t array_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 1, 2, false); + mp_arg_check_num(n_args, kw_args, 1, 2, false); // get typecode const char *typecode = mp_obj_str_get_str(args[0]); @@ -173,9 +175,9 @@ STATIC mp_obj_t array_make_new(const mp_obj_type_t *type_in, size_t n_args, size #endif #if MICROPY_PY_BUILTINS_BYTEARRAY -STATIC mp_obj_t bytearray_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t bytearray_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num(n_args, kw_args, 0, 1, false); if (n_args == 0) { // no args: construct an empty bytearray @@ -205,13 +207,13 @@ mp_obj_t mp_obj_new_memoryview(byte typecode, size_t nitems, void *items) { return MP_OBJ_FROM_PTR(self); } -STATIC mp_obj_t memoryview_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t memoryview_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; // TODO possibly allow memoryview constructor to take start/stop so that one // can do memoryview(b, 4, 8) instead of memoryview(b)[4:8] (uses less RAM) - mp_arg_check_num(n_args, n_kw, 1, 1, false); + mp_arg_check_num(n_args, kw_args, 1, 1, false); mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[0], &bufinfo, MP_BUFFER_READ); @@ -222,7 +224,7 @@ STATIC mp_obj_t memoryview_make_new(const mp_obj_type_t *type_in, size_t n_args, // test if the object can be written to if (mp_get_buffer(args[0], &bufinfo, MP_BUFFER_RW)) { - self->typecode |= 0x80; // used to indicate writable buffer + self->typecode |= MP_OBJ_ARRAY_TYPECODE_FLAG_RW; // indicate writable buffer } return MP_OBJ_FROM_PTR(self); @@ -302,8 +304,7 @@ STATIC mp_obj_t array_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs return lhs_in; } - case MP_BINARY_OP_IN: { - /* NOTE `a in b` is `b.__contains__(a)` */ + case MP_BINARY_OP_CONTAINS: { mp_buffer_info_t lhs_bufinfo; mp_buffer_info_t rhs_bufinfo; @@ -409,7 +410,7 @@ STATIC mp_obj_t array_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value } else if (MP_OBJ_IS_TYPE(index_in, &mp_type_slice)) { mp_bound_slice_t slice; if (!mp_seq_get_fast_slice_indexes(o->len, index_in, &slice)) { - mp_raise_NotImplementedError("only slices with step=1 (aka None) are supported"); + mp_raise_NotImplementedError(translate("only slices with step=1 (aka None) are supported")); } if (value != MP_OBJ_SENTINEL) { #if MICROPY_PY_ARRAY_SLICE_ASSIGN @@ -422,7 +423,7 @@ STATIC mp_obj_t array_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value mp_obj_array_t *src_slice = MP_OBJ_TO_PTR(value); if (item_sz != mp_binary_get_size('@', src_slice->typecode & TYPECODE_MASK, NULL)) { compat_error: - mp_raise_ValueError("lhs and rhs should be compatible"); + mp_raise_ValueError(translate("lhs and rhs should be compatible")); } src_len = src_slice->len; src_items = src_slice->items; @@ -440,7 +441,7 @@ STATIC mp_obj_t array_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value src_len = bufinfo.len; src_items = bufinfo.buf; } else { - mp_raise_NotImplementedError("array/bytes required on right side"); + mp_raise_NotImplementedError(translate("array/bytes required on right side")); } // TODO: check src/dst compat @@ -448,7 +449,7 @@ STATIC mp_obj_t array_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value uint8_t* dest_items = o->items; #if MICROPY_PY_BUILTINS_MEMORYVIEW if (o->base.type == &mp_type_memoryview) { - if ((o->typecode & 0x80) == 0) { + if (!(o->typecode & MP_OBJ_ARRAY_TYPECODE_FLAG_RW)) { // store to read-only memoryview not allowed return MP_OBJ_NULL; } @@ -507,7 +508,7 @@ STATIC mp_obj_t array_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value #if MICROPY_PY_BUILTINS_MEMORYVIEW if (o->base.type == &mp_type_memoryview) { index += o->free; - if (value != MP_OBJ_SENTINEL && (o->typecode & 0x80) == 0) { + if (value != MP_OBJ_SENTINEL && !(o->typecode & MP_OBJ_ARRAY_TYPECODE_FLAG_RW)) { // store to read-only memoryview return MP_OBJ_NULL; } @@ -533,7 +534,7 @@ STATIC mp_int_t array_get_buffer(mp_obj_t o_in, mp_buffer_info_t *bufinfo, mp_ui bufinfo->typecode = o->typecode & TYPECODE_MASK; #if MICROPY_PY_BUILTINS_MEMORYVIEW if (o->base.type == &mp_type_memoryview) { - if ((o->typecode & 0x80) == 0 && (flags & MP_BUFFER_WRITE)) { + if (!(o->typecode & MP_OBJ_ARRAY_TYPECODE_FLAG_RW) && (flags & MP_BUFFER_WRITE)) { // read-only memoryview return 1; } @@ -610,6 +611,12 @@ mp_obj_t mp_obj_new_bytearray(size_t n, void *items) { return MP_OBJ_FROM_PTR(o); } +mp_obj_t mp_obj_new_bytearray_of_zeros(size_t n) { + mp_obj_array_t *o = array_new(BYTEARRAY_TYPECODE, n); + memset(o->items, 0, n); + return MP_OBJ_FROM_PTR(o); +} + // Create bytearray which references specified memory area mp_obj_t mp_obj_new_bytearray_by_ref(size_t n, void *items) { mp_obj_array_t *o = m_new_obj(mp_obj_array_t); diff --git a/py/objarray.h b/py/objarray.h index 0389668458854..0dad70571186b 100644 --- a/py/objarray.h +++ b/py/objarray.h @@ -29,6 +29,9 @@ #include "py/obj.h" +// Used only for memoryview types, set in "typecode" to indicate a writable memoryview +#define MP_OBJ_ARRAY_TYPECODE_FLAG_RW (0x80) + typedef struct _mp_obj_array_t { mp_obj_base_t base; size_t typecode : 8; diff --git a/py/objbool.c b/py/objbool.c index 5755b188e98cd..cd7d7100c9c68 100644 --- a/py/objbool.c +++ b/py/objbool.c @@ -50,9 +50,9 @@ STATIC void bool_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_ } } -STATIC mp_obj_t bool_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t bool_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num(n_args, kw_args, 0, 1, false); if (n_args == 0) { return mp_const_false; diff --git a/py/objboundmeth.c b/py/objboundmeth.c index 890f8b15b68ca..a05680d410320 100644 --- a/py/objboundmeth.c +++ b/py/objboundmeth.c @@ -51,6 +51,9 @@ mp_obj_t mp_call_method_self_n_kw(mp_obj_t meth, mp_obj_t self, size_t n_args, s // need to insert self before all other args and then call meth size_t n_total = n_args + 2 * n_kw; mp_obj_t *args2 = NULL; + #if MICROPY_ENABLE_PYSTACK + args2 = mp_pystack_alloc(sizeof(mp_obj_t) * (1 + n_total)); + #else mp_obj_t *free_args2 = NULL; if (n_total > 4) { // try to use heap to allocate temporary args array @@ -61,12 +64,17 @@ mp_obj_t mp_call_method_self_n_kw(mp_obj_t meth, mp_obj_t self, size_t n_args, s // (fallback to) use stack to allocate temporary args array args2 = alloca(sizeof(mp_obj_t) * (1 + n_total)); } + #endif args2[0] = self; memcpy(args2 + 1, args, n_total * sizeof(mp_obj_t)); mp_obj_t res = mp_call_function_n_kw(meth, n_args + 1, n_kw, args2); + #if MICROPY_ENABLE_PYSTACK + mp_pystack_free(args2); + #else if (free_args2 != NULL) { m_del(mp_obj_t, free_args2, 1 + n_total); } + #endif return res; } @@ -84,6 +92,9 @@ STATIC void bound_meth_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { if (attr == MP_QSTR___name__) { mp_obj_bound_meth_t *o = MP_OBJ_TO_PTR(self_in); dest[0] = MP_OBJ_NEW_QSTR(mp_obj_fun_get_name(o->meth)); + } else if (attr == MP_QSTR___func__) { + mp_obj_bound_meth_t *o = MP_OBJ_TO_PTR(self_in); + dest[0] = o->meth; } } #endif diff --git a/py/objcomplex.c b/py/objcomplex.c index 261c2b1f0f4d6..b38e2c5fa6268 100644 --- a/py/objcomplex.c +++ b/py/objcomplex.c @@ -31,6 +31,8 @@ #include "py/parsenum.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_COMPLEX #include @@ -73,9 +75,9 @@ STATIC void complex_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_ } } -STATIC mp_obj_t complex_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t complex_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 2, false); + mp_arg_check_num(n_args, kw_args, 0, 2, false); switch (n_args) { case 0: @@ -198,13 +200,13 @@ mp_obj_t mp_obj_complex_binary_op(mp_binary_op_t op, mp_float_t lhs_real, mp_flo } case MP_BINARY_OP_FLOOR_DIVIDE: case MP_BINARY_OP_INPLACE_FLOOR_DIVIDE: - mp_raise_TypeError("can't do truncated division of a complex number"); + mp_raise_TypeError(translate("can't do truncated division of a complex number")); case MP_BINARY_OP_TRUE_DIVIDE: case MP_BINARY_OP_INPLACE_TRUE_DIVIDE: if (rhs_imag == 0) { if (rhs_real == 0) { - mp_raise_msg(&mp_type_ZeroDivisionError, "complex division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("complex division by zero")); } lhs_real /= rhs_real; lhs_imag /= rhs_real; @@ -232,7 +234,7 @@ mp_obj_t mp_obj_complex_binary_op(mp_binary_op_t op, mp_float_t lhs_real, mp_flo if (rhs_imag == 0 && rhs_real >= 0) { lhs_real = (rhs_real == 0); } else { - mp_raise_msg(&mp_type_ZeroDivisionError, "0.0 to a complex power"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("0.0 to a complex power")); } } else { mp_float_t ln1 = MICROPY_FLOAT_C_FUN(log)(abs1); diff --git a/py/objdeque.c b/py/objdeque.c new file mode 100644 index 0000000000000..b2785b5b60f98 --- /dev/null +++ b/py/objdeque.c @@ -0,0 +1,169 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Paul Sokolovsky + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include // for ssize_t +#include + +#include "py/mpconfig.h" +#include "supervisor/shared/translate.h" + +#if MICROPY_PY_COLLECTIONS_DEQUE + +#include "py/runtime.h" + +typedef struct _mp_obj_deque_t { + mp_obj_base_t base; + size_t alloc; + size_t i_get; + size_t i_put; + mp_obj_t *items; + uint32_t flags; + #define FLAG_CHECK_OVERFLOW 1 +} mp_obj_deque_t; + +STATIC mp_obj_t deque_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 2, 3, false); + + /* Initialization from existing sequence is not supported, so an empty + tuple must be passed as such. */ + if (args[0] != mp_const_empty_tuple) { + mp_raise_ValueError(NULL); + } + + // Protect against -1 leading to zero-length allocation and bad array access + mp_int_t maxlen = mp_obj_get_int(args[1]); + if (maxlen < 0) { + mp_raise_ValueError(NULL); + } + + mp_obj_deque_t *o = m_new_obj(mp_obj_deque_t); + o->base.type = type; + o->alloc = maxlen + 1; + o->i_get = o->i_put = 0; + o->items = m_new0(mp_obj_t, o->alloc); + + if (n_args > 2) { + o->flags = mp_obj_get_int(args[2]); + } + + return MP_OBJ_FROM_PTR(o); +} + +STATIC mp_obj_t deque_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + mp_obj_deque_t *self = MP_OBJ_TO_PTR(self_in); + switch (op) { + case MP_UNARY_OP_BOOL: + return mp_obj_new_bool(self->i_get != self->i_put); + case MP_UNARY_OP_LEN: { + ssize_t len = self->i_put - self->i_get; + if (len < 0) { + len += self->alloc; + } + return MP_OBJ_NEW_SMALL_INT(len); + } + #if MICROPY_PY_SYS_GETSIZEOF + case MP_UNARY_OP_SIZEOF: { + size_t sz = sizeof(*self) + sizeof(mp_obj_t) * self->alloc; + return MP_OBJ_NEW_SMALL_INT(sz); + } + #endif + default: + return MP_OBJ_NULL; // op not supported + } +} + +STATIC mp_obj_t mp_obj_deque_append(mp_obj_t self_in, mp_obj_t arg) { + mp_obj_deque_t *self = MP_OBJ_TO_PTR(self_in); + + size_t new_i_put = self->i_put + 1; + if (new_i_put == self->alloc) { + new_i_put = 0; + } + + if (self->flags & FLAG_CHECK_OVERFLOW && new_i_put == self->i_get) { + mp_raise_msg(&mp_type_IndexError, translate("full")); + } + + self->items[self->i_put] = arg; + self->i_put = new_i_put; + + if (self->i_get == new_i_put) { + if (++self->i_get == self->alloc) { + self->i_get = 0; + } + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(deque_append_obj, mp_obj_deque_append); + +STATIC mp_obj_t deque_popleft(mp_obj_t self_in) { + mp_obj_deque_t *self = MP_OBJ_TO_PTR(self_in); + + if (self->i_get == self->i_put) { + mp_raise_msg(&mp_type_IndexError, translate("empty")); + } + + mp_obj_t ret = self->items[self->i_get]; + self->items[self->i_get] = MP_OBJ_NULL; + + if (++self->i_get == self->alloc) { + self->i_get = 0; + } + + return ret; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(deque_popleft_obj, deque_popleft); + +#if 0 +STATIC mp_obj_t deque_clear(mp_obj_t self_in) { + mp_obj_deque_t *self = MP_OBJ_TO_PTR(self_in); + self->i_get = self->i_put = 0; + mp_seq_clear(self->items, 0, self->alloc, sizeof(*self->items)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(deque_clear_obj, deque_clear); +#endif + +STATIC const mp_rom_map_elem_t deque_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_append), MP_ROM_PTR(&deque_append_obj) }, + #if 0 + { MP_ROM_QSTR(MP_QSTR_clear), MP_ROM_PTR(&deque_clear_obj) }, + #endif + { MP_ROM_QSTR(MP_QSTR_popleft), MP_ROM_PTR(&deque_popleft_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(deque_locals_dict, deque_locals_dict_table); + +const mp_obj_type_t mp_type_deque = { + { &mp_type_type }, + .name = MP_QSTR_deque, + .make_new = deque_make_new, + .unary_op = deque_unary_op, + .locals_dict = (mp_obj_dict_t*)&deque_locals_dict, +}; + +#endif // MICROPY_PY_COLLECTIONS_DEQUE diff --git a/py/objdict.c b/py/objdict.c index 1553a83b46039..3ec3cbe80aca0 100644 --- a/py/objdict.c +++ b/py/objdict.c @@ -31,6 +31,9 @@ #include "py/builtin.h" #include "py/objtype.h" +#include "supervisor/linker.h" +#include "supervisor/shared/translate.h" + #define MP_OBJ_IS_DICT_TYPE(o) (MP_OBJ_IS_OBJ(o) && ((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type->make_new == dict_make_new) STATIC mp_obj_t dict_update(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs); @@ -79,7 +82,7 @@ STATIC void dict_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_ } } -STATIC mp_obj_t dict_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t dict_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_obj_t dict_out = mp_obj_new_dict(0); mp_obj_dict_t *dict = MP_OBJ_TO_PTR(dict_out); dict->base.type = type; @@ -88,11 +91,12 @@ STATIC mp_obj_t dict_make_new(const mp_obj_type_t *type, size_t n_args, size_t n dict->map.is_ordered = 1; } #endif - if (n_args > 0 || n_kw > 0) { - mp_obj_t args2[2] = {dict_out, args[0]}; // args[0] is always valid, even if it's not a positional arg - mp_map_t kwargs; - mp_map_init_fixed_table(&kwargs, n_kw, args + n_args); - dict_update(n_args + 1, args2, &kwargs); // dict_update will check that n_args + 1 == 1 or 2 + if (n_args > 0 || kw_args != NULL) { + mp_obj_t args2[2] = {dict_out, NULL}; // args[0] is always valid, even if it's not a positional arg + if (n_args > 0) { + args2[1] = args[0]; + } + dict_update(n_args + 1, args2, kw_args); // dict_update will check that n_args + 1 == 1 or 2 } return dict_out; } @@ -115,7 +119,7 @@ STATIC mp_obj_t dict_unary_op(mp_unary_op_t op, mp_obj_t self_in) { STATIC mp_obj_t dict_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { mp_obj_dict_t *o = MP_OBJ_TO_PTR(lhs_in); switch (op) { - case MP_BINARY_OP_IN: { + case MP_BINARY_OP_CONTAINS: { mp_map_elem_t *elem = mp_map_lookup(&o->map, rhs_in, MP_MAP_LOOKUP); return mp_obj_new_bool(elem != NULL); } @@ -193,42 +197,18 @@ STATIC mp_obj_t dict_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { } /******************************************************************************/ -/* dict iterator */ - -typedef struct _mp_obj_dict_it_t { - mp_obj_base_t base; - mp_fun_1_t iternext; - mp_obj_t dict; - size_t cur; -} mp_obj_dict_it_t; - -STATIC mp_obj_t dict_it_iternext(mp_obj_t self_in) { - mp_obj_dict_it_t *self = MP_OBJ_TO_PTR(self_in); - mp_map_elem_t *next = dict_iter_next(MP_OBJ_TO_PTR(self->dict), &self->cur); +/* dict methods */ - if (next == NULL) { - return MP_OBJ_STOP_ITERATION; - } else { - return next->key; +STATIC void mp_ensure_not_fixed(const mp_obj_dict_t *dict) { + if (dict->map.is_fixed) { + mp_raise_TypeError(NULL); } } -STATIC mp_obj_t dict_getiter(mp_obj_t self_in, mp_obj_iter_buf_t *iter_buf) { - assert(sizeof(mp_obj_dict_it_t) <= sizeof(mp_obj_iter_buf_t)); - mp_obj_dict_it_t *o = (mp_obj_dict_it_t*)iter_buf; - o->base.type = &mp_type_polymorph_iter; - o->iternext = dict_it_iternext; - o->dict = self_in; - o->cur = 0; - return MP_OBJ_FROM_PTR(o); -} - -/******************************************************************************/ -/* dict methods */ - STATIC mp_obj_t dict_clear(mp_obj_t self_in) { mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in)); mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); + mp_ensure_not_fixed(self); mp_map_clear(&self->map); @@ -284,6 +264,9 @@ STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(dict_fromkeys_obj, MP_ROM_PTR(&dict_fromk STATIC mp_obj_t dict_get_helper(size_t n_args, const mp_obj_t *args, mp_map_lookup_kind_t lookup_kind) { mp_check_self(MP_OBJ_IS_DICT_TYPE(args[0])); mp_obj_dict_t *self = MP_OBJ_TO_PTR(args[0]); + if (lookup_kind != MP_MAP_LOOKUP) { + mp_ensure_not_fixed(self); + } mp_map_elem_t *elem = mp_map_lookup(&self->map, args[1], lookup_kind); mp_obj_t value; if (elem == NULL || elem->value == MP_OBJ_NULL) { @@ -326,10 +309,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(dict_setdefault_obj, 2, 3, dict_setde STATIC mp_obj_t dict_popitem(mp_obj_t self_in) { mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in)); mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); + mp_ensure_not_fixed(self); size_t cur = 0; mp_map_elem_t *next = dict_iter_next(self, &cur); if (next == NULL) { - mp_raise_msg(&mp_type_KeyError, "popitem(): dictionary is empty"); + mp_raise_msg(&mp_type_KeyError, translate("popitem(): dictionary is empty")); } self->map.used--; mp_obj_t items[] = {next->key, next->value}; @@ -341,11 +325,12 @@ STATIC mp_obj_t dict_popitem(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(dict_popitem_obj, dict_popitem); -STATIC mp_obj_t dict_update(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { +STATIC mp_obj_t PLACE_IN_ITCM(dict_update)(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { mp_check_self(MP_OBJ_IS_DICT_TYPE(args[0])); mp_obj_dict_t *self = MP_OBJ_TO_PTR(args[0]); + mp_ensure_not_fixed(self); - mp_arg_check_num(n_args, kwargs->used, 1, 2, true); + mp_arg_check_num(n_args, kwargs, 1, 2, true); if (n_args == 2) { // given a positional argument @@ -371,7 +356,7 @@ STATIC mp_obj_t dict_update(size_t n_args, const mp_obj_t *args, mp_map_t *kwarg if (key == MP_OBJ_STOP_ITERATION || value == MP_OBJ_STOP_ITERATION || stop != MP_OBJ_STOP_ITERATION) { - mp_raise_ValueError("dict update sequence has wrong length"); + mp_raise_ValueError(translate("dict update sequence has wrong length")); } else { mp_map_lookup(&self->map, key, MP_MAP_LOOKUP_ADD_IF_NOT_FOUND)->value = value; } @@ -485,7 +470,7 @@ STATIC mp_obj_t dict_view_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t if (o->kind != MP_DICT_VIEW_KEYS) { return MP_OBJ_NULL; // op not supported } - if (op != MP_BINARY_OP_IN) { + if (op != MP_BINARY_OP_CONTAINS) { return MP_OBJ_NULL; // op not supported } return dict_binary_op(op, o->dict, rhs_in); @@ -527,6 +512,20 @@ STATIC mp_obj_t dict_values(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(dict_values_obj, dict_values); +/******************************************************************************/ +/* dict iterator */ + +STATIC mp_obj_t dict_getiter(mp_obj_t self_in, mp_obj_iter_buf_t *iter_buf) { + assert(sizeof(mp_obj_dict_view_it_t) <= sizeof(mp_obj_iter_buf_t)); + mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in)); + mp_obj_dict_view_it_t *o = (mp_obj_dict_view_it_t*)iter_buf; + o->base.type = &dict_view_it_type; + o->kind = MP_DICT_VIEW_KEYS; + o->dict = self_in; + o->cur = 0; + return MP_OBJ_FROM_PTR(o); +} + /******************************************************************************/ /* dict constructors & public C API */ @@ -592,9 +591,10 @@ size_t mp_obj_dict_len(mp_obj_t self_in) { return self->map.used; } -mp_obj_t mp_obj_dict_store(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) { +mp_obj_t PLACE_IN_ITCM(mp_obj_dict_store)(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) { mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in)); mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); + mp_ensure_not_fixed(self); mp_map_lookup(&self->map, key, MP_MAP_LOOKUP_ADD_IF_NOT_FOUND)->value = value; return self_in; } diff --git a/py/objenumerate.c b/py/objenumerate.c index 1a9d30f8368fd..818725d856c9f 100644 --- a/py/objenumerate.c +++ b/py/objenumerate.c @@ -39,7 +39,7 @@ typedef struct _mp_obj_enumerate_t { STATIC mp_obj_t enumerate_iternext(mp_obj_t self_in); -STATIC mp_obj_t enumerate_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t enumerate_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { #if MICROPY_CPYTHON_COMPAT static const mp_arg_t allowed_args[] = { { MP_QSTR_iterable, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, @@ -50,7 +50,7 @@ STATIC mp_obj_t enumerate_make_new(const mp_obj_type_t *type, size_t n_args, siz struct { mp_arg_val_t iterable, start; } arg_vals; - mp_arg_parse_all_kw_array(n_args, n_kw, args, + mp_arg_parse_all(n_args, args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&arg_vals); // create enumerate object @@ -59,7 +59,7 @@ STATIC mp_obj_t enumerate_make_new(const mp_obj_type_t *type, size_t n_args, siz o->iter = mp_getiter(arg_vals.iterable.u_obj, NULL); o->cur = arg_vals.start.u_int; #else - (void)n_kw; + (void)kw_args; mp_obj_enumerate_t *o = m_new_obj(mp_obj_enumerate_t); o->base.type = type; o->iter = mp_getiter(args[0], NULL); diff --git a/py/objexcept.c b/py/objexcept.c index 4844c7f92dec5..b7a536c5e355f 100644 --- a/py/objexcept.c +++ b/py/objexcept.c @@ -30,6 +30,7 @@ #include #include "py/objlist.h" +#include "py/objnamedtuple.h" #include "py/objstr.h" #include "py/objtuple.h" #include "py/objtype.h" @@ -37,15 +38,14 @@ #include "py/gc.h" #include "py/mperrno.h" +#include "supervisor/shared/translate.h" + // Number of items per traceback entry (file, line, block) #define TRACEBACK_ENTRY_LEN (3) // Number of traceback entries to reserve in the emergency exception buffer #define EMG_TRACEBACK_ALLOC (2 * TRACEBACK_ENTRY_LEN) -// Instance of MemoryError exception - needed by mp_malloc_fail -const mp_obj_exception_t mp_const_MemoryError_obj = {{&mp_type_MemoryError}, 0, 0, NULL, (mp_obj_tuple_t*)&mp_const_empty_tuple_obj}; - // Optionally allocated buffer for storing the first argument of an exception // allocated when the heap is locked. #if MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF @@ -96,7 +96,7 @@ mp_obj_t mp_alloc_emergency_exception_buf(mp_obj_t size_in) { // definition module-private so far, have it here. const mp_obj_exception_t mp_const_GeneratorExit_obj = {{&mp_type_GeneratorExit}, 0, 0, NULL, (mp_obj_tuple_t*)&mp_const_empty_tuple_obj}; -STATIC void mp_obj_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind) { +void mp_obj_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind) { mp_obj_exception_t *o = MP_OBJ_TO_PTR(o_in); mp_print_kind_t k = kind & ~PRINT_EXC_SUBCLASS; bool is_subclass = kind & PRINT_EXC_SUBCLASS; @@ -112,17 +112,23 @@ STATIC void mp_obj_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_pr if (o->args == NULL || o->args->len == 0) { mp_print_str(print, ""); return; - } else if (o->args->len == 1) { - #if MICROPY_PY_UERRNO + } + if (MP_OBJ_IS_SMALL_INT(o->args->items[0]) && + mp_obj_is_subclass_fast(MP_OBJ_FROM_PTR(o->base.type), MP_OBJ_FROM_PTR(&mp_type_OSError)) && + o->args->len <= 2) { // try to provide a nice OSError error message - if (o->base.type == &mp_type_OSError && MP_OBJ_IS_SMALL_INT(o->args->items[0])) { - qstr qst = mp_errno_to_str(o->args->items[0]); - if (qst != MP_QSTR_NULL) { - mp_printf(print, "[Errno %d] %q", MP_OBJ_SMALL_INT_VALUE(o->args->items[0]), qst); - return; + char decompressed[50]; + const char *msg = mp_common_errno_to_str(o->args->items[0], decompressed, sizeof(decompressed)); + if (msg != NULL) { + mp_printf(print, "[Errno " INT_FMT "] %s", MP_OBJ_SMALL_INT_VALUE(o->args->items[0]), msg); + // if second arg exists, it is filename. + if (o->args->len == 2) { + mp_printf(print, ": '%s'", mp_obj_str_get_str(o->args->items[1])); } + return; } - #endif + } + if (o->args->len == 1) { mp_obj_print_helper(print, o->args->items[0], PRINT_STR); return; } @@ -130,8 +136,8 @@ STATIC void mp_obj_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_pr mp_obj_tuple_print(print, MP_OBJ_FROM_PTR(o->args), kind); } -mp_obj_t mp_obj_exception_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, false); +mp_obj_t mp_obj_exception_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, MP_OBJ_FUN_ARGS_MAX, false); // Try to allocate memory for the exception, with fallback to emergency exception object mp_obj_exception_t *o_exc = m_new_obj_maybe(mp_obj_exception_t); @@ -189,7 +195,7 @@ mp_obj_t mp_obj_exception_get_value(mp_obj_t self_in) { } } -STATIC void exception_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { +void mp_obj_exception_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { mp_obj_exception_t *self = MP_OBJ_TO_PTR(self_in); if (dest[0] != MP_OBJ_NULL) { // store/delete attribute @@ -209,46 +215,47 @@ STATIC void exception_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { dest[0] = MP_OBJ_FROM_PTR(self->args); } else if (self->base.type == &mp_type_StopIteration && attr == MP_QSTR_value) { dest[0] = mp_obj_exception_get_value(self_in); + #if MICROPY_CPYTHON_COMPAT + } else if (mp_obj_is_subclass_fast(MP_OBJ_FROM_PTR(self->base.type), MP_OBJ_FROM_PTR(&mp_type_OSError))) { + if (attr == MP_QSTR_errno) { + dest[0] = mp_obj_exception_get_value(self_in); + } else if (attr == MP_QSTR_strerror) { + if (self->args->len > 1) { + dest[0] = self->args->items[1]; + } else if (self->args->len > 0) { + char decompressed[50]; + const char *msg = mp_common_errno_to_str(self->args->items[0], decompressed, sizeof(decompressed)); + if (msg != NULL) { + dest[0] = mp_obj_new_str(msg, strlen(msg)); + } else { + dest[0] = mp_const_none; + } + } else { + dest[0] = mp_const_none; + } + } else if (attr == MP_QSTR_filename) { + dest[0] = self->args->len > 2 ? self->args->items[2] : mp_const_none; + // skip winerror + } else if (attr == MP_QSTR_filename2) { + dest[0] = self->args->len > 4 ? self->args->items[4] : mp_const_none; + } + #endif } } -STATIC mp_obj_t exc___init__(size_t n_args, const mp_obj_t *args) { - mp_obj_exception_t *self = MP_OBJ_TO_PTR(args[0]); - mp_obj_t argst = mp_obj_new_tuple(n_args - 1, args + 1); - self->args = MP_OBJ_TO_PTR(argst); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(exc___init___obj, 1, MP_OBJ_FUN_ARGS_MAX, exc___init__); - -STATIC const mp_rom_map_elem_t exc_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___init__), MP_ROM_PTR(&exc___init___obj) }, -}; - -STATIC MP_DEFINE_CONST_DICT(exc_locals_dict, exc_locals_dict_table); - const mp_obj_type_t mp_type_BaseException = { { &mp_type_type }, .name = MP_QSTR_BaseException, .print = mp_obj_exception_print, .make_new = mp_obj_exception_make_new, - .attr = exception_attr, - .locals_dict = (mp_obj_dict_t*)&exc_locals_dict, -}; - -#define MP_DEFINE_EXCEPTION(exc_name, base_name) \ -const mp_obj_type_t mp_type_ ## exc_name = { \ - { &mp_type_type }, \ - .name = MP_QSTR_ ## exc_name, \ - .print = mp_obj_exception_print, \ - .make_new = mp_obj_exception_make_new, \ - .attr = exception_attr, \ - .parent = &mp_type_ ## base_name, \ + .attr = mp_obj_exception_attr, }; // List of all exceptions, arranged as in the table at: // http://docs.python.org/3/library/exceptions.html MP_DEFINE_EXCEPTION(SystemExit, BaseException) MP_DEFINE_EXCEPTION(KeyboardInterrupt, BaseException) +MP_DEFINE_EXCEPTION(ReloadException, BaseException) MP_DEFINE_EXCEPTION(GeneratorExit, BaseException) MP_DEFINE_EXCEPTION(Exception, BaseException) #if MICROPY_PY_ASYNC_AWAIT @@ -275,9 +282,7 @@ MP_DEFINE_EXCEPTION(Exception, BaseException) MP_DEFINE_EXCEPTION(UnboundLocalError, NameError) */ MP_DEFINE_EXCEPTION(OSError, Exception) -#if MICROPY_PY_BUILTINS_TIMEOUTERROR - MP_DEFINE_EXCEPTION(TimeoutError, OSError) -#endif + MP_DEFINE_EXCEPTION(TimeoutError, OSError) /* MP_DEFINE_EXCEPTION(BlockingIOError, OSError) MP_DEFINE_EXCEPTION(ChildProcessError, OSError) @@ -312,6 +317,7 @@ MP_DEFINE_EXCEPTION(Exception, BaseException) MP_DEFINE_EXCEPTION(UnicodeError, ValueError) //TODO: Implement more UnicodeError subclasses which take arguments #endif + MP_DEFINE_EXCEPTION(MpyError, ValueError) /* MP_DEFINE_EXCEPTION(Warning, Exception) MP_DEFINE_EXCEPTION(DeprecationWarning, Warning) @@ -337,10 +343,10 @@ mp_obj_t mp_obj_new_exception_arg1(const mp_obj_type_t *exc_type, mp_obj_t arg) mp_obj_t mp_obj_new_exception_args(const mp_obj_type_t *exc_type, size_t n_args, const mp_obj_t *args) { assert(exc_type->make_new == mp_obj_exception_make_new); - return exc_type->make_new(exc_type, n_args, 0, args); + return exc_type->make_new(exc_type, n_args, args, NULL); } -mp_obj_t mp_obj_new_exception_msg(const mp_obj_type_t *exc_type, const char *msg) { +mp_obj_t mp_obj_new_exception_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg) { return mp_obj_new_exception_msg_varg(exc_type, msg); } @@ -378,7 +384,7 @@ STATIC void exc_add_strn(void *data, const char *str, size_t len) { } -mp_obj_t mp_obj_new_exception_msg_varg(const mp_obj_type_t *exc_type, const char *fmt, ...) { +mp_obj_t mp_obj_new_exception_msg_varg(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, ...) { va_list ap; va_start(ap, fmt); mp_obj_t exception = mp_obj_new_exception_msg_vlist(exc_type, fmt, ap); @@ -386,7 +392,7 @@ mp_obj_t mp_obj_new_exception_msg_varg(const mp_obj_type_t *exc_type, const char return exception; } -mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const char *fmt, va_list ap) { +mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, va_list ap) { assert(fmt != NULL); // Check that the given type is an exception type @@ -394,7 +400,7 @@ mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const cha // Try to allocate memory for the message mp_obj_str_t *o_str = m_new_obj_maybe(mp_obj_str_t); - size_t o_str_alloc = strlen(fmt) + 1; + size_t o_str_alloc = fmt->length + 1; byte *o_str_buf = m_new_maybe(byte, o_str_alloc); bool used_emg_buf = false; @@ -420,15 +426,16 @@ mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const cha } if (o_str_buf == NULL) { - // No memory for the string buffer: assume that the fmt string is in ROM - // and use that data as the data of the string - o_str->len = o_str_alloc - 1; // will be equal to strlen(fmt) - o_str->data = (const byte*)fmt; + // No memory for the string buffer: the string is compressed so don't add it. + o_str->len = 0; + o_str->data = NULL; } else { // We have some memory to format the string struct _exc_printer_t exc_pr = {!used_emg_buf, o_str_alloc, 0, o_str_buf}; mp_print_t print = {&exc_pr, exc_add_strn}; - mp_vprintf(&print, fmt, ap); + char fmt_decompressed[fmt->length]; + decompress(fmt, fmt_decompressed); + mp_vprintf(&print, fmt_decompressed, ap); exc_pr.buf[exc_pr.len] = '\0'; o_str->len = exc_pr.len; o_str->data = exc_pr.buf; @@ -438,7 +445,7 @@ mp_obj_t mp_obj_new_exception_msg_vlist(const mp_obj_type_t *exc_type, const cha o_str->base.type = &mp_type_str; o_str->hash = qstr_compute_hash(o_str->data, o_str->len); mp_obj_t arg = MP_OBJ_FROM_PTR(o_str); - return mp_obj_exception_make_new(exc_type, 1, 0, &arg); + return mp_obj_exception_make_new(exc_type, 1, &arg, NULL); } // return true if the given object is an exception type @@ -551,3 +558,164 @@ void mp_obj_exception_get_traceback(mp_obj_t self_in, size_t *n, size_t **values *values = self->traceback_data; } } + +#if MICROPY_PY_SYS_EXC_INFO +STATIC const mp_obj_namedtuple_type_t code_type_obj = { + .base = { + .base = { + .type = &mp_type_type + }, + .name = MP_QSTR_code, + .print = namedtuple_print, + .make_new = namedtuple_make_new, + .unary_op = mp_obj_tuple_unary_op, + .binary_op = mp_obj_tuple_binary_op, + .attr = namedtuple_attr, + .subscr = mp_obj_tuple_subscr, + .getiter = mp_obj_tuple_getiter, + .parent = &mp_type_tuple, + }, + .n_fields = 15, + .fields = { + MP_QSTR_co_argcount, + MP_QSTR_co_kwonlyargcount, + MP_QSTR_co_nlocals, + MP_QSTR_co_stacksize, + MP_QSTR_co_flags, + MP_QSTR_co_code, + MP_QSTR_co_consts, + MP_QSTR_co_names, + MP_QSTR_co_varnames, + MP_QSTR_co_freevars, + MP_QSTR_co_cellvars, + MP_QSTR_co_filename, + MP_QSTR_co_name, + MP_QSTR_co_firstlineno, + MP_QSTR_co_lnotab, + }, +}; + +STATIC mp_obj_t code_make_new(qstr file, qstr block) { + mp_obj_t elems[15] = { + mp_obj_new_int(0), // co_argcount + mp_obj_new_int(0), // co_kwonlyargcount + mp_obj_new_int(0), // co_nlocals + mp_obj_new_int(0), // co_stacksize + mp_obj_new_int(0), // co_flags + mp_obj_new_bytearray(0, NULL), // co_code + mp_obj_new_tuple(0, NULL), // co_consts + mp_obj_new_tuple(0, NULL), // co_names + mp_obj_new_tuple(0, NULL), // co_varnames + mp_obj_new_tuple(0, NULL), // co_freevars + mp_obj_new_tuple(0, NULL), // co_cellvars + MP_OBJ_NEW_QSTR(file), // co_filename + MP_OBJ_NEW_QSTR(block), // co_name + mp_obj_new_int(1), // co_firstlineno + mp_obj_new_bytearray(0, NULL), // co_lnotab + }; + + return namedtuple_make_new((const mp_obj_type_t*)&code_type_obj, 15, elems, NULL); +} + +STATIC const mp_obj_namedtuple_type_t frame_type_obj = { + .base = { + .base = { + .type = &mp_type_type + }, + .name = MP_QSTR_frame, + .print = namedtuple_print, + .make_new = namedtuple_make_new, + .unary_op = mp_obj_tuple_unary_op, + .binary_op = mp_obj_tuple_binary_op, + .attr = namedtuple_attr, + .subscr = mp_obj_tuple_subscr, + .getiter = mp_obj_tuple_getiter, + .parent = &mp_type_tuple, + }, + .n_fields = 8, + .fields = { + MP_QSTR_f_back, + MP_QSTR_f_builtins, + MP_QSTR_f_code, + MP_QSTR_f_globals, + MP_QSTR_f_lasti, + MP_QSTR_f_lineno, + MP_QSTR_f_locals, + MP_QSTR_f_trace, + }, +}; + +STATIC mp_obj_t frame_make_new(mp_obj_t f_code, int f_lineno) { + mp_obj_t elems[8] = { + mp_const_none, // f_back + mp_obj_new_dict(0), // f_builtins + f_code, // f_code + mp_obj_new_dict(0), // f_globals + mp_obj_new_int(0), // f_lasti + mp_obj_new_int(f_lineno), // f_lineno + mp_obj_new_dict(0), // f_locals + mp_const_none, // f_trace + }; + + return namedtuple_make_new((const mp_obj_type_t*)&frame_type_obj, 8, elems, NULL); +} + +STATIC const mp_obj_namedtuple_type_t traceback_type_obj = { + .base = { + .base = { + .type = &mp_type_type + }, + .name = MP_QSTR_traceback, + .print = namedtuple_print, + .make_new = namedtuple_make_new, + .unary_op = mp_obj_tuple_unary_op, + .binary_op = mp_obj_tuple_binary_op, + .attr = namedtuple_attr, + .subscr = mp_obj_tuple_subscr, + .getiter = mp_obj_tuple_getiter, + .parent = &mp_type_tuple, + }, + .n_fields = 4, + .fields = { + MP_QSTR_tb_frame, + MP_QSTR_tb_lasti, + MP_QSTR_tb_lineno, + MP_QSTR_tb_next, + }, +}; + +STATIC mp_obj_t traceback_from_values(size_t *values, mp_obj_t tb_next) { + int lineno = values[1]; + + mp_obj_t elems[4] = { + frame_make_new(code_make_new(values[0], values[2]), lineno), + mp_obj_new_int(0), + mp_obj_new_int(lineno), + tb_next, + }; + + return namedtuple_make_new((const mp_obj_type_t*)&traceback_type_obj, 4, elems, NULL); +}; + +mp_obj_t mp_obj_exception_get_traceback_obj(mp_obj_t self_in) { + mp_obj_exception_t *self = MP_OBJ_TO_PTR(self_in); + + if (!mp_obj_is_exception_instance(self)) { + return mp_const_none; + } + + size_t n, *values; + mp_obj_exception_get_traceback(self, &n, &values); + if (n == 0) { + return mp_const_none; + } + + mp_obj_t tb_next = mp_const_none; + + for (size_t i = 0; i < n; i += 3) { + tb_next = traceback_from_values(&values[i], tb_next); + } + + return tb_next; +} +#endif diff --git a/py/objexcept.h b/py/objexcept.h index f67651a7eb1e2..7c307622487ea 100644 --- a/py/objexcept.h +++ b/py/objexcept.h @@ -37,4 +37,17 @@ typedef struct _mp_obj_exception_t { mp_obj_tuple_t *args; } mp_obj_exception_t; +void mp_obj_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind); +void mp_obj_exception_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest); + +#define MP_DEFINE_EXCEPTION(exc_name, base_name) \ +const mp_obj_type_t mp_type_ ## exc_name = { \ + { &mp_type_type }, \ + .name = MP_QSTR_ ## exc_name, \ + .print = mp_obj_exception_print, \ + .make_new = mp_obj_exception_make_new, \ + .attr = mp_obj_exception_attr, \ + .parent = &mp_type_ ## base_name, \ +}; + #endif // MICROPY_INCLUDED_PY_OBJEXCEPT_H diff --git a/py/objfilter.c b/py/objfilter.c index cb965d8c32350..af95326e6097c 100644 --- a/py/objfilter.c +++ b/py/objfilter.c @@ -34,8 +34,8 @@ typedef struct _mp_obj_filter_t { mp_obj_t iter; } mp_obj_filter_t; -STATIC mp_obj_t filter_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 2, 2, false); +STATIC mp_obj_t filter_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 2, 2, false); mp_obj_filter_t *o = m_new_obj(mp_obj_filter_t); o->base.type = type; o->fun = args[0]; diff --git a/py/objfloat.c b/py/objfloat.c index fde2224ad44c8..f544ade0530f8 100644 --- a/py/objfloat.c +++ b/py/objfloat.c @@ -32,6 +32,8 @@ #include "py/parsenum.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include @@ -91,7 +93,7 @@ typedef uint32_t mp_float_uint_t; if (adj_exp <= MP_FLOAT_FRAC_BITS) { // number may have a fraction; xor the integer part with the fractional part val = (frc >> (MP_FLOAT_FRAC_BITS - adj_exp)) - ^ (frc & ((1 << (MP_FLOAT_FRAC_BITS - adj_exp)) - 1)); + ^ (frc & (((mp_float_uint_t)1 << (MP_FLOAT_FRAC_BITS - adj_exp)) - 1)); } else if ((unsigned int)adj_exp < BITS_PER_BYTE * sizeof(mp_int_t) - 1) { // the number is a (big) whole integer and will fit in val's signed-width val = (mp_int_t)frc << (adj_exp - MP_FLOAT_FRAC_BITS); @@ -102,7 +104,7 @@ typedef uint32_t mp_float_uint_t; } if (u.p.sgn) { - val = -val; + val = -(mp_uint_t)val; } return val; @@ -131,21 +133,20 @@ STATIC void float_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t } } -STATIC mp_obj_t float_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t float_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num(n_args, kw_args, 0, 1, false); switch (n_args) { case 0: return mp_obj_new_float(0); case 1: - default: - if (MP_OBJ_IS_STR(args[0])) { - // a string, parse it - size_t l; - const char *s = mp_obj_str_get_data(args[0], &l); - return mp_parse_num_decimal(s, l, false, false, NULL); + default: { + mp_buffer_info_t bufinfo; + if (mp_get_buffer(args[0], &bufinfo, MP_BUFFER_READ)) { + // a textual representation, parse it + return mp_parse_num_decimal(bufinfo.buf, bufinfo.len, false, false, NULL); } else if (mp_obj_is_float(args[0])) { // a float, just return it return args[0]; @@ -153,6 +154,7 @@ STATIC mp_obj_t float_make_new(const mp_obj_type_t *type_in, size_t n_args, size // something else, try to cast it to a float return mp_obj_new_float(mp_obj_get_float(args[0])); } + } } } @@ -265,7 +267,7 @@ mp_obj_t mp_obj_float_binary_op(mp_binary_op_t op, mp_float_t lhs_val, mp_obj_t case MP_BINARY_OP_INPLACE_FLOOR_DIVIDE: if (rhs_val == 0) { zero_division_error: - mp_raise_msg(&mp_type_ZeroDivisionError, "division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } // Python specs require that x == (x//y)*y + (x%y) so we must // call divmod to compute the correct floor division, which @@ -296,14 +298,14 @@ mp_obj_t mp_obj_float_binary_op(mp_binary_op_t op, mp_float_t lhs_val, mp_obj_t break; case MP_BINARY_OP_POWER: case MP_BINARY_OP_INPLACE_POWER: - if (lhs_val == 0 && rhs_val < 0) { + if (lhs_val == 0 && rhs_val < 0 && !isinf(rhs_val)) { goto zero_division_error; } if (lhs_val < 0 && rhs_val != MICROPY_FLOAT_C_FUN(floor)(rhs_val)) { #if MICROPY_PY_BUILTINS_COMPLEX return mp_obj_complex_binary_op(MP_BINARY_OP_POWER, lhs_val, 0, rhs_in); #else - mp_raise_ValueError("complex values not supported"); + mp_raise_ValueError(translate("complex values not supported")); #endif } lhs_val = MICROPY_FLOAT_C_FUN(pow)(lhs_val, rhs_val); diff --git a/py/objfun.c b/py/objfun.c index 030b3f7cb043e..c586a290ac4ea 100644 --- a/py/objfun.c +++ b/py/objfun.c @@ -34,6 +34,8 @@ #include "py/bc.h" #include "py/stackctrl.h" +#include "supervisor/linker.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #else // don't print debugging info @@ -52,7 +54,7 @@ STATIC mp_obj_t fun_builtin_0_call(mp_obj_t self_in, size_t n_args, size_t n_kw, (void)args; assert(MP_OBJ_IS_TYPE(self_in, &mp_type_fun_builtin_0)); mp_obj_fun_builtin_fixed_t *self = MP_OBJ_TO_PTR(self_in); - mp_arg_check_num(n_args, n_kw, 0, 0, false); + mp_arg_check_num_kw_array(n_args, n_kw, 0, 0, false); return self->fun._0(); } @@ -66,7 +68,7 @@ const mp_obj_type_t mp_type_fun_builtin_0 = { STATIC mp_obj_t fun_builtin_1_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { assert(MP_OBJ_IS_TYPE(self_in, &mp_type_fun_builtin_1)); mp_obj_fun_builtin_fixed_t *self = MP_OBJ_TO_PTR(self_in); - mp_arg_check_num(n_args, n_kw, 1, 1, false); + mp_arg_check_num_kw_array(n_args, n_kw, 1, 1, false); return self->fun._1(args[0]); } @@ -80,7 +82,7 @@ const mp_obj_type_t mp_type_fun_builtin_1 = { STATIC mp_obj_t fun_builtin_2_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { assert(MP_OBJ_IS_TYPE(self_in, &mp_type_fun_builtin_2)); mp_obj_fun_builtin_fixed_t *self = MP_OBJ_TO_PTR(self_in); - mp_arg_check_num(n_args, n_kw, 2, 2, false); + mp_arg_check_num_kw_array(n_args, n_kw, 2, 2, false); return self->fun._2(args[0], args[1]); } @@ -94,7 +96,7 @@ const mp_obj_type_t mp_type_fun_builtin_2 = { STATIC mp_obj_t fun_builtin_3_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { assert(MP_OBJ_IS_TYPE(self_in, &mp_type_fun_builtin_3)); mp_obj_fun_builtin_fixed_t *self = MP_OBJ_TO_PTR(self_in); - mp_arg_check_num(n_args, n_kw, 3, 3, false); + mp_arg_check_num_kw_array(n_args, n_kw, 3, 3, false); return self->fun._3(args[0], args[1], args[2]); } @@ -110,7 +112,7 @@ STATIC mp_obj_t fun_builtin_var_call(mp_obj_t self_in, size_t n_args, size_t n_k mp_obj_fun_builtin_var_t *self = MP_OBJ_TO_PTR(self_in); // check number of arguments - mp_arg_check_num(n_args, n_kw, self->n_args_min, self->n_args_max, self->is_kw); + mp_arg_check_num_kw_array(n_args, n_kw, self->n_args_min, self->n_args_max, self->is_kw); if (self->is_kw) { // function allows keywords @@ -195,39 +197,61 @@ STATIC void dump_args(const mp_obj_t *a, size_t sz) { // than this will try to use the heap, with fallback to stack allocation. #define VM_MAX_STATE_ON_STACK (11 * sizeof(mp_uint_t)) -// Set this to enable a simple stack overflow check. +// Set this to 1 to enable a simple stack overflow check. #define VM_DETECT_STACK_OVERFLOW (0) +#define DECODE_CODESTATE_SIZE(bytecode, n_state_out_var, state_size_out_var) \ + { \ + /* bytecode prelude: state size and exception stack size */ \ + n_state_out_var = mp_decode_uint_value(bytecode); \ + size_t n_exc_stack = mp_decode_uint_value(mp_decode_uint_skip(bytecode)); \ + \ + n_state_out_var += VM_DETECT_STACK_OVERFLOW; \ + \ + /* state size in bytes */ \ + state_size_out_var = n_state_out_var * sizeof(mp_obj_t) \ + + n_exc_stack * sizeof(mp_exc_stack_t); \ + } + +#define INIT_CODESTATE(code_state, _fun_bc, n_args, n_kw, args) \ + code_state->fun_bc = _fun_bc; \ + code_state->ip = 0; \ + mp_setup_code_state(code_state, n_args, n_kw, args); \ + code_state->old_globals = mp_globals_get(); + #if MICROPY_STACKLESS mp_code_state_t *mp_obj_fun_bc_prepare_codestate(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { MP_STACK_CHECK(); mp_obj_fun_bc_t *self = MP_OBJ_TO_PTR(self_in); - // bytecode prelude: state size and exception stack size - size_t n_state = mp_decode_uint_value(self->bytecode); - size_t n_exc_stack = mp_decode_uint_value(mp_decode_uint_skip(self->bytecode)); + size_t n_state, state_size; + DECODE_CODESTATE_SIZE(self->bytecode, n_state, state_size); - // allocate state for locals and stack - size_t state_size = n_state * sizeof(mp_obj_t) + n_exc_stack * sizeof(mp_exc_stack_t); mp_code_state_t *code_state; + #if MICROPY_ENABLE_PYSTACK + code_state = mp_pystack_alloc(sizeof(mp_code_state_t) + state_size); + #else + // If we use m_new_obj_var(), then on no memory, MemoryError will be + // raised. But this is not correct exception for a function call, + // RuntimeError should be raised instead. So, we use m_new_obj_var_maybe(), + // return NULL, then vm.c takes the needed action (either raise + // RuntimeError or fallback to stack allocation). code_state = m_new_obj_var_maybe(mp_code_state_t, byte, state_size); if (!code_state) { return NULL; } + #endif - code_state->fun_bc = self; - code_state->ip = 0; - mp_setup_code_state(code_state, n_args, n_kw, args); + INIT_CODESTATE(code_state, self, n_args, n_kw, args); // execute the byte code with the correct globals context - code_state->old_globals = mp_globals_get(); mp_globals_set(self->globals); return code_state; } #endif -STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t PLACE_IN_ITCM(fun_bc_call)(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { MP_STACK_CHECK(); DEBUG_printf("Input n_args: " UINT_FMT ", n_kw: " UINT_FMT "\n", n_args, n_kw); @@ -238,17 +262,14 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_fun_bc_t *self = MP_OBJ_TO_PTR(self_in); DEBUG_printf("Func n_def_args: %d\n", self->n_def_args); - // bytecode prelude: state size and exception stack size - size_t n_state = mp_decode_uint_value(self->bytecode); - size_t n_exc_stack = mp_decode_uint_value(mp_decode_uint_skip(self->bytecode)); - -#if VM_DETECT_STACK_OVERFLOW - n_state += 1; -#endif + size_t n_state, state_size; + DECODE_CODESTATE_SIZE(self->bytecode, n_state, state_size); // allocate state for locals and stack - size_t state_size = n_state * sizeof(mp_obj_t) + n_exc_stack * sizeof(mp_exc_stack_t); mp_code_state_t *code_state = NULL; + #if MICROPY_ENABLE_PYSTACK + code_state = mp_pystack_alloc(sizeof(mp_code_state_t) + state_size); + #else if (state_size > VM_MAX_STATE_ON_STACK) { code_state = m_new_obj_var_maybe(mp_code_state_t, byte, state_size); } @@ -256,13 +277,11 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const code_state = alloca(sizeof(mp_code_state_t) + state_size); state_size = 0; // indicate that we allocated using alloca } + #endif - code_state->fun_bc = self; - code_state->ip = 0; - mp_setup_code_state(code_state, n_args, n_kw, args); + INIT_CODESTATE(code_state, self, n_args, n_kw, args); // execute the byte code with the correct globals context - code_state->old_globals = mp_globals_get(); mp_globals_set(self->globals); mp_vm_return_kind_t vm_return_kind = mp_execute_bytecode(code_state, MP_OBJ_NULL); mp_globals_set(code_state->old_globals); @@ -304,10 +323,14 @@ STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const result = code_state->state[n_state - 1]; } + #if MICROPY_ENABLE_PYSTACK + mp_pystack_free(code_state); + #else // free the state if it was allocated on the heap if (state_size != 0) { m_del_var(mp_code_state_t, byte, state_size, code_state); } + #endif if (vm_return_kind == MP_VM_RETURN_NORMAL) { return result; @@ -415,7 +438,7 @@ typedef mp_uint_t (*viper_fun_4_t)(mp_uint_t, mp_uint_t, mp_uint_t, mp_uint_t); STATIC mp_obj_t fun_viper_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { mp_obj_fun_viper_t *self = self_in; - mp_arg_check_num(n_args, n_kw, self->n_args, self->n_args, false); + mp_arg_check_num_kw_array(n_args, n_kw, self->n_args, self->n_args, false); void *fun = MICROPY_MAKE_POINTER_CALLABLE(self->fun_data); @@ -525,7 +548,7 @@ STATIC mp_uint_t convert_obj_for_inline_asm(mp_obj_t obj) { STATIC mp_obj_t fun_asm_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { mp_obj_fun_asm_t *self = self_in; - mp_arg_check_num(n_args, n_kw, self->n_args, self->n_args, false); + mp_arg_check_num_kw_array(n_args, n_kw, self->n_args, self->n_args, false); void *fun = MICROPY_MAKE_POINTER_CALLABLE(self->fun_data); diff --git a/py/objgenerator.c b/py/objgenerator.c index 1394524421d8c..01d42ba94fa27 100644 --- a/py/objgenerator.c +++ b/py/objgenerator.c @@ -4,7 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2013, 2014 Damien P. George - * Copyright (c) 2014 Paul Sokolovsky + * Copyright (c) 2014-2017 Paul Sokolovsky * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -32,6 +32,9 @@ #include "py/bc.h" #include "py/objgenerator.h" #include "py/objfun.h" +#include "py/stackctrl.h" + +#include "supervisor/shared/translate.h" /******************************************************************************/ /* generator wrapper */ @@ -92,6 +95,7 @@ STATIC void gen_instance_print(const mp_print_t *print, mp_obj_t self_in, mp_pri } mp_vm_return_kind_t mp_obj_gen_resume(mp_obj_t self_in, mp_obj_t send_value, mp_obj_t throw_value, mp_obj_t *ret_val) { + MP_STACK_CHECK(); mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_gen_instance)); mp_obj_gen_instance_t *self = MP_OBJ_TO_PTR(self_in); if (self->code_state.ip == 0) { @@ -101,15 +105,34 @@ mp_vm_return_kind_t mp_obj_gen_resume(mp_obj_t self_in, mp_obj_t send_value, mp_ } if (self->code_state.sp == self->code_state.state - 1) { if (send_value != mp_const_none) { - mp_raise_TypeError("can't send non-None value to a just-started generator"); + mp_raise_TypeError(translate("can't send non-None value to a just-started generator")); } } else { - *self->code_state.sp = send_value; + #if MICROPY_PY_GENERATOR_PEND_THROW + // If exception is pending (set using .pend_throw()), process it now. + if (*self->code_state.sp != mp_const_none) { + throw_value = *self->code_state.sp; + *self->code_state.sp = MP_OBJ_NULL; + } else + #endif + { + *self->code_state.sp = send_value; + } + } + + // We set self->globals=NULL while executing, for a sentinel to ensure the generator + // cannot be reentered during execution + if (self->globals == NULL) { + mp_raise_ValueError(translate("generator already executing")); } - mp_obj_dict_t *old_globals = mp_globals_get(); + + // Set up the correct globals context for the generator and execute it + self->code_state.old_globals = mp_globals_get(); mp_globals_set(self->globals); + self->globals = NULL; mp_vm_return_kind_t ret_kind = mp_execute_bytecode(&self->code_state, throw_value); - mp_globals_set(old_globals); + self->globals = mp_globals_get(); + mp_globals_set(self->code_state.old_globals); switch (ret_kind) { case MP_VM_RETURN_NORMAL: @@ -125,9 +148,9 @@ mp_vm_return_kind_t mp_obj_gen_resume(mp_obj_t self_in, mp_obj_t send_value, mp_ case MP_VM_RETURN_YIELD: *ret_val = *self->code_state.sp; - if (*ret_val == MP_OBJ_STOP_ITERATION) { - self->code_state.ip = 0; - } + #if MICROPY_PY_GENERATOR_PEND_THROW + *self->code_state.sp = mp_const_none; + #endif break; case MP_VM_RETURN_EXCEPTION: { @@ -203,7 +226,7 @@ STATIC mp_obj_t gen_instance_close(mp_obj_t self_in) { mp_obj_t ret; switch (mp_obj_gen_resume(self_in, mp_const_none, MP_OBJ_FROM_PTR(&mp_const_GeneratorExit_obj), &ret)) { case MP_VM_RETURN_YIELD: - mp_raise_RuntimeError("generator ignored GeneratorExit"); + mp_raise_RuntimeError(translate("generator ignored GeneratorExit")); // Swallow StopIteration & GeneratorExit (== successful close), and re-raise any other case MP_VM_RETURN_EXCEPTION: @@ -222,10 +245,24 @@ STATIC mp_obj_t gen_instance_close(mp_obj_t self_in) { STATIC MP_DEFINE_CONST_FUN_OBJ_1(gen_instance_close_obj, gen_instance_close); +STATIC mp_obj_t gen_instance_pend_throw(mp_obj_t self_in, mp_obj_t exc_in) { + mp_obj_gen_instance_t *self = MP_OBJ_TO_PTR(self_in); + if (self->code_state.sp == self->code_state.state - 1) { + mp_raise_TypeError(translate("can't pend throw to just-started generator")); + } + mp_obj_t prev = *self->code_state.sp; + *self->code_state.sp = exc_in; + return prev; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(gen_instance_pend_throw_obj, gen_instance_pend_throw); + STATIC const mp_rom_map_elem_t gen_instance_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&gen_instance_close_obj) }, { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&gen_instance_send_obj) }, { MP_ROM_QSTR(MP_QSTR_throw), MP_ROM_PTR(&gen_instance_throw_obj) }, + #if MICROPY_PY_GENERATOR_PEND_THROW + { MP_ROM_QSTR(MP_QSTR_pend_throw), MP_ROM_PTR(&gen_instance_pend_throw_obj) }, + #endif }; STATIC MP_DEFINE_CONST_DICT(gen_instance_locals_dict, gen_instance_locals_dict_table); diff --git a/py/objint.c b/py/objint.c index 4f2e610a50730..b78c9f25b14f0 100644 --- a/py/objint.c +++ b/py/objint.c @@ -35,14 +35,16 @@ #include "py/runtime.h" #include "py/binary.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include #endif // This dispatcher function is expected to be independent of the implementation of long int -STATIC mp_obj_t mp_obj_int_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t mp_obj_int_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 2, false); + mp_arg_check_num(n_args, kw_args, 0, 2, false); switch (n_args) { case 0: @@ -139,9 +141,9 @@ STATIC mp_fp_as_int_class_t mp_classify_fp_as_int(mp_float_t val) { mp_obj_t mp_obj_new_int_from_float(mp_float_t val) { int cl = fpclassify(val); if (cl == FP_INFINITE) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_OverflowError, "can't convert inf to int")); + nlr_raise(mp_obj_new_exception_msg(&mp_type_OverflowError, translate("can't convert inf to int"))); } else if (cl == FP_NAN) { - mp_raise_ValueError("can't convert NaN to int"); + mp_raise_ValueError(translate("can't convert NaN to int")); } else { mp_fp_as_int_class_t icl = mp_classify_fp_as_int(val); if (icl == MP_FP_CLASS_FIT_SMALLINT) { @@ -158,7 +160,7 @@ mp_obj_t mp_obj_new_int_from_float(mp_float_t val) { return mp_obj_new_int_from_ll((long long)val); #endif } else { - mp_raise_ValueError("float too big"); + mp_raise_ValueError(translate("float too big")); } #endif } @@ -222,27 +224,26 @@ size_t mp_int_format_size(size_t num_bits, int base, const char *prefix, char co char *mp_obj_int_formatted(char **buf, size_t *buf_size, size_t *fmt_size, mp_const_obj_t self_in, int base, const char *prefix, char base_char, char comma) { fmt_int_t num; + #if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_NONE + // Only have small ints; get the integer value to format. + num = MP_OBJ_SMALL_INT_VALUE(self_in); + #else if (MP_OBJ_IS_SMALL_INT(self_in)) { // A small int; get the integer value to format. num = MP_OBJ_SMALL_INT_VALUE(self_in); -#if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE - } else if (MP_OBJ_IS_TYPE(self_in, &mp_type_int)) { + } else { + assert(MP_OBJ_IS_TYPE(self_in, &mp_type_int)); // Not a small int. -#if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_LONGLONG + #if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_LONGLONG const mp_obj_int_t *self = self_in; // Get the value to format; mp_obj_get_int truncates to mp_int_t. num = self->val; -#else + #else // Delegate to the implementation for the long int. return mp_obj_int_formatted_impl(buf, buf_size, fmt_size, self_in, base, prefix, base_char, comma); -#endif -#endif - } else { - // Not an int. - **buf = '\0'; - *fmt_size = 0; - return *buf; + #endif } + #endif char sign = '\0'; if (num < 0) { @@ -299,6 +300,76 @@ char *mp_obj_int_formatted(char **buf, size_t *buf_size, size_t *fmt_size, mp_co return b; } +#if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE + +void mp_obj_int_buffer_overflow_check(mp_obj_t self_in, size_t nbytes, bool is_signed) +{ + if (is_signed) { + // self must be < 2**(bits - 1) + mp_obj_t edge = mp_binary_op(MP_BINARY_OP_INPLACE_LSHIFT, + mp_obj_new_int(1), + mp_obj_new_int(nbytes * 8 - 1)); + + if (mp_binary_op(MP_BINARY_OP_LESS, self_in, edge) == mp_const_true) { + // and >= -2**(bits - 1) + edge = mp_unary_op(MP_UNARY_OP_NEGATIVE, edge); + if (mp_binary_op(MP_BINARY_OP_MORE_EQUAL, self_in, edge) == mp_const_true) { + return; + } + } + } else { + // self must be >= 0 + if (mp_obj_int_sign(self_in) >= 0) { + // and < 2**(bits) + mp_obj_t edge = mp_binary_op(MP_BINARY_OP_INPLACE_LSHIFT, + mp_obj_new_int(1), + mp_obj_new_int(nbytes * 8)); + + if (mp_binary_op(MP_BINARY_OP_LESS, self_in, edge) == mp_const_true) { + return; + } + } + } + + mp_raise_OverflowError_varg(translate("value must fit in %d byte(s)"), nbytes); +} + +#endif // MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE + +void mp_small_int_buffer_overflow_check(mp_int_t val, size_t nbytes, bool is_signed) { + // Fast path for zero. + if (val == 0) { + return; + } + + // Trying to store negative values in unsigned bytes falls through to failure. + if (is_signed || val >= 0) { + + if (nbytes >= sizeof(val)) { + // All non-negative N bit signed integers fit in an unsigned N bit integer. + // This case prevents shifting too far below. + return; + } + + if (is_signed) { + mp_int_t edge = ((mp_int_t)1 << (nbytes * 8 - 1)); + if (-edge <= val && val < edge) { + return; + } + // Out of range, fall through to failure. + } else { + // Unsigned. We already know val >= 0. + mp_int_t edge = ((mp_int_t)1 << (nbytes * 8)); + if (val < edge) { + return; + } + } + // Fall through to failure. + } + + mp_raise_OverflowError_varg(translate("value must fit in %d byte(s)"), nbytes); +} + #if MICROPY_LONGINT_IMPL == MICROPY_LONGINT_IMPL_NONE int mp_obj_int_sign(mp_obj_t self_in) { @@ -324,19 +395,19 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i // This is called only with strings whose value doesn't fit in SMALL_INT mp_obj_t mp_obj_new_int_from_str_len(const char **str, size_t len, bool neg, unsigned int base) { - mp_raise_msg(&mp_type_OverflowError, "long int not supported in this build"); + mp_raise_msg(&mp_type_OverflowError, translate("long int not supported in this build")); return mp_const_none; } // This is called when an integer larger than a SMALL_INT is needed (although val might still fit in a SMALL_INT) mp_obj_t mp_obj_new_int_from_ll(long long val) { - mp_raise_msg(&mp_type_OverflowError, "small int overflow"); + mp_raise_msg(&mp_type_OverflowError, translate("small int overflow")); return mp_const_none; } // This is called when an integer larger than a SMALL_INT is needed (although val might still fit in a SMALL_INT) mp_obj_t mp_obj_new_int_from_ull(unsigned long long val) { - mp_raise_msg(&mp_type_OverflowError, "small int overflow"); + mp_raise_msg(&mp_type_OverflowError, translate("small int overflow")); return mp_const_none; } @@ -346,7 +417,7 @@ mp_obj_t mp_obj_new_int_from_uint(mp_uint_t value) { if ((value & ~MP_SMALL_INT_POSITIVE_MASK) == 0) { return MP_OBJ_NEW_SMALL_INT(value); } - mp_raise_msg(&mp_type_OverflowError, "small int overflow"); + mp_raise_msg(&mp_type_OverflowError, translate("small int overflow")); return mp_const_none; } @@ -354,7 +425,7 @@ mp_obj_t mp_obj_new_int(mp_int_t value) { if (MP_SMALL_INT_FITS(value)) { return MP_OBJ_NEW_SMALL_INT(value); } - mp_raise_msg(&mp_type_OverflowError, "small int overflow"); + mp_raise_msg(&mp_type_OverflowError, translate("small int overflow")); return mp_const_none; } @@ -378,7 +449,7 @@ mp_obj_t mp_obj_int_binary_op_extra_cases(mp_binary_op_t op, mp_obj_t lhs_in, mp // true acts as 0 return mp_binary_op(op, lhs_in, MP_OBJ_NEW_SMALL_INT(1)); } else if (op == MP_BINARY_OP_MULTIPLY) { - if (MP_OBJ_IS_STR(rhs_in) || MP_OBJ_IS_TYPE(rhs_in, &mp_type_bytes) || MP_OBJ_IS_TYPE(rhs_in, &mp_type_tuple) || MP_OBJ_IS_TYPE(rhs_in, &mp_type_list)) { + if (MP_OBJ_IS_STR_OR_BYTES(rhs_in) || MP_OBJ_IS_TYPE(rhs_in, &mp_type_tuple) || MP_OBJ_IS_TYPE(rhs_in, &mp_type_list)) { // multiply is commutative for these types, so delegate to them return mp_binary_op(op, rhs_in, lhs_in); } @@ -419,15 +490,24 @@ STATIC mp_obj_t int_from_bytes(size_t n_args, const mp_obj_t *args) { STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(int_from_bytes_fun_obj, 3, 4, int_from_bytes); STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(int_from_bytes_obj, MP_ROM_PTR(&int_from_bytes_fun_obj)); -STATIC mp_obj_t int_to_bytes(size_t n_args, const mp_obj_t *args) { - // TODO: Support signed param (assumes signed=False) - (void)n_args; - - mp_int_t len = mp_obj_get_int(args[1]); +STATIC mp_obj_t int_to_bytes(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_length, ARG_byteorder, ARG_signed }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_length, MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_byteorder, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_signed, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t len = args[ARG_length].u_int; if (len < 0) { mp_raise_ValueError(NULL); } - bool big_endian = args[2] != MP_OBJ_NEW_QSTR(MP_QSTR_little); + + mp_obj_t self = pos_args[0]; + bool big_endian = args[ARG_byteorder].u_obj != MP_OBJ_NEW_QSTR(MP_QSTR_little); + bool signed_ = args[ARG_signed].u_bool; vstr_t vstr; vstr_init_len(&vstr, len); @@ -435,19 +515,26 @@ STATIC mp_obj_t int_to_bytes(size_t n_args, const mp_obj_t *args) { memset(data, 0, len); #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE - if (!MP_OBJ_IS_SMALL_INT(args[0])) { - mp_obj_int_to_bytes_impl(args[0], big_endian, len, data); + if (!MP_OBJ_IS_SMALL_INT(self)) { + mp_obj_int_buffer_overflow_check(self, len, signed_); + mp_obj_int_to_bytes_impl(self, big_endian, len, data); } else #endif { - mp_int_t val = MP_OBJ_SMALL_INT_VALUE(args[0]); + mp_int_t val = MP_OBJ_SMALL_INT_VALUE(self); + // Small int checking is separate, to be fast. + mp_small_int_buffer_overflow_check(val, len, signed_); size_t l = MIN((size_t)len, sizeof(val)); + if (val < 0) { + // Sign extend negative numbers. + memset(data, -1, len); + } mp_binary_set_int(l, big_endian, data + (big_endian ? (len - l) : 0), val); } return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); } -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(int_to_bytes_obj, 3, 4, int_to_bytes); +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(int_to_bytes_obj, 3, int_to_bytes); STATIC const mp_rom_map_elem_t int_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_from_bytes), MP_ROM_PTR(&int_from_bytes_obj) }, diff --git a/py/objint.h b/py/objint.h index 4b95acde9f831..e8c9bc3e0632d 100644 --- a/py/objint.h +++ b/py/objint.h @@ -53,6 +53,12 @@ char *mp_obj_int_formatted(char **buf, size_t *buf_size, size_t *fmt_size, mp_co int base, const char *prefix, char base_char, char comma); char *mp_obj_int_formatted_impl(char **buf, size_t *buf_size, size_t *fmt_size, mp_const_obj_t self_in, int base, const char *prefix, char base_char, char comma); +#if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE +void mp_obj_int_buffer_overflow_check(mp_obj_t self_in, size_t nbytes, bool is_signed); +#endif + +void mp_small_int_buffer_overflow_check(mp_int_t val, size_t nbytes, bool is_signed); + mp_int_t mp_obj_int_hash(mp_obj_t self_in); mp_obj_t mp_obj_int_from_bytes_impl(bool big_endian, size_t len, const byte *buf); void mp_obj_int_to_bytes_impl(mp_obj_t self_in, bool big_endian, size_t len, byte *buf); diff --git a/py/objint_longlong.c b/py/objint_longlong.c index 2e567c572143f..ce02fa1755f72 100644 --- a/py/objint_longlong.c +++ b/py/objint_longlong.c @@ -32,6 +32,8 @@ #include "py/objint.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include #endif @@ -124,10 +126,9 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i if (MP_OBJ_IS_SMALL_INT(lhs_in)) { lhs_val = MP_OBJ_SMALL_INT_VALUE(lhs_in); - } else if (MP_OBJ_IS_TYPE(lhs_in, &mp_type_int)) { - lhs_val = ((mp_obj_int_t*)lhs_in)->val; } else { - return MP_OBJ_NULL; // op not supported + assert(MP_OBJ_IS_TYPE(lhs_in, &mp_type_int)); + lhs_val = ((mp_obj_int_t*)lhs_in)->val; } if (MP_OBJ_IS_SMALL_INT(rhs_in)) { @@ -151,9 +152,15 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i return mp_obj_new_int_from_ll(lhs_val * rhs_val); case MP_BINARY_OP_FLOOR_DIVIDE: case MP_BINARY_OP_INPLACE_FLOOR_DIVIDE: + if (rhs_val == 0) { + goto zero_division; + } return mp_obj_new_int_from_ll(lhs_val / rhs_val); case MP_BINARY_OP_MODULO: case MP_BINARY_OP_INPLACE_MODULO: + if (rhs_val == 0) { + goto zero_division; + } return mp_obj_new_int_from_ll(lhs_val % rhs_val); case MP_BINARY_OP_AND: @@ -179,7 +186,7 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i #if MICROPY_PY_BUILTINS_FLOAT return mp_obj_float_binary_op(op, lhs_val, rhs_in); #else - mp_raise_ValueError("negative power with no float support"); + mp_raise_ValueError(translate("negative power with no float support")); #endif } long long ans = 1; @@ -210,6 +217,9 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i default: return MP_OBJ_NULL; // op not supported } + +zero_division: + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } mp_obj_t mp_obj_new_int(mp_int_t value) { @@ -238,7 +248,7 @@ mp_obj_t mp_obj_new_int_from_ll(long long val) { mp_obj_t mp_obj_new_int_from_ull(unsigned long long val) { // TODO raise an exception if the unsigned long long won't fit if (val >> (sizeof(unsigned long long) * 8 - 1) != 0) { - mp_raise_msg(&mp_type_OverflowError, "ulonglong too large"); + mp_raise_msg(&mp_type_OverflowError, translate("ulonglong too large")); } mp_obj_int_t *o = m_new_obj(mp_obj_int_t); o->base.type = &mp_type_int; diff --git a/py/objint_mpz.c b/py/objint_mpz.c index 7b5cb0b9d4d84..95e4d7e176871 100644 --- a/py/objint_mpz.c +++ b/py/objint_mpz.c @@ -33,6 +33,8 @@ #include "py/objint.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include #endif @@ -170,11 +172,9 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i if (MP_OBJ_IS_SMALL_INT(lhs_in)) { mpz_init_fixed_from_int(&z_int, z_int_dig, MPZ_NUM_DIG_FOR_INT, MP_OBJ_SMALL_INT_VALUE(lhs_in)); zlhs = &z_int; - } else if (MP_OBJ_IS_TYPE(lhs_in, &mp_type_int)) { - zlhs = &((mp_obj_int_t*)MP_OBJ_TO_PTR(lhs_in))->mpz; } else { - // unsupported type - return MP_OBJ_NULL; + assert(MP_OBJ_IS_TYPE(lhs_in, &mp_type_int)); + zlhs = &((mp_obj_int_t*)MP_OBJ_TO_PTR(lhs_in))->mpz; } // if rhs is small int, then lhs was not (otherwise mp_binary_op handles it) @@ -207,7 +207,7 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i return mp_obj_new_float(flhs / frhs); #endif - } else if (op >= MP_BINARY_OP_INPLACE_OR) { + } else if (op >= MP_BINARY_OP_INPLACE_OR && op < MP_BINARY_OP_CONTAINS) { mp_obj_int_t *res = mp_obj_int_new_mpz(); switch (op) { @@ -227,7 +227,7 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i case MP_BINARY_OP_INPLACE_FLOOR_DIVIDE: { if (mpz_is_zero(zrhs)) { zero_division_error: - mp_raise_msg(&mp_type_ZeroDivisionError, "division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } mpz_t rem; mpz_init_zero(&rem); mpz_divmod_inpl(&res->mpz, &rem, zlhs, zrhs); @@ -264,7 +264,7 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i case MP_BINARY_OP_INPLACE_RSHIFT: { mp_int_t irhs = mp_obj_int_get_checked(rhs_in); if (irhs < 0) { - mp_raise_ValueError("negative shift count"); + mp_raise_ValueError(translate("negative shift count")); } if (op == MP_BINARY_OP_LSHIFT || op == MP_BINARY_OP_INPLACE_LSHIFT) { mpz_shl_inpl(&res->mpz, zlhs, irhs); @@ -280,7 +280,7 @@ mp_obj_t mp_obj_int_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i #if MICROPY_PY_BUILTINS_FLOAT return mp_obj_float_binary_op(op, mpz_as_float(zlhs), rhs_in); #else - mp_raise_ValueError("negative power with no float support"); + mp_raise_ValueError(translate("negative power with no float support")); #endif } mpz_pow_inpl(&res->mpz, zlhs, zrhs); @@ -333,7 +333,7 @@ STATIC mpz_t *mp_mpz_for_int(mp_obj_t arg, mpz_t *temp) { mp_obj_t mp_obj_int_pow3(mp_obj_t base, mp_obj_t exponent, mp_obj_t modulus) { if (!MP_OBJ_IS_INT(base) || !MP_OBJ_IS_INT(exponent) || !MP_OBJ_IS_INT(modulus)) { - mp_raise_TypeError("pow() with 3 arguments requires integers"); + mp_raise_TypeError(translate("pow() with 3 arguments requires integers")); } else { mp_obj_t result = mp_obj_new_int_from_ull(0); // Use the _from_ull version as this forces an mpz int mp_obj_int_t *res_p = (mp_obj_int_t *) MP_OBJ_TO_PTR(result); @@ -343,6 +343,10 @@ mp_obj_t mp_obj_int_pow3(mp_obj_t base, mp_obj_t exponent, mp_obj_t modulus) { mpz_t *rhs = mp_mpz_for_int(exponent, &r_temp); mpz_t *mod = mp_mpz_for_int(modulus, &m_temp); + if (mpz_is_zero(mod)) { + mp_raise_msg(&mp_type_ValueError, translate("pow() 3rd argument cannot be 0")); + } + mpz_pow3_inpl(&(res_p->mpz), lhs, rhs, mod); if (lhs == &l_temp) { mpz_deinit(lhs); } @@ -408,7 +412,7 @@ mp_int_t mp_obj_int_get_checked(mp_const_obj_t self_in) { return value; } else { // overflow - mp_raise_msg(&mp_type_OverflowError, "overflow converting long int to machine word"); + mp_raise_msg(&mp_type_OverflowError, translate("overflow converting long int to machine word")); } } } diff --git a/py/objlist.c b/py/objlist.c index 0cbf68c2f2642..608ea9f6caf70 100644 --- a/py/objlist.c +++ b/py/objlist.c @@ -31,6 +31,8 @@ #include "py/runtime.h" #include "py/stackctrl.h" +#include "supervisor/shared/translate.h" + STATIC mp_obj_t mp_obj_new_list_iterator(mp_obj_t list, size_t cur, mp_obj_iter_buf_t *iter_buf); STATIC mp_obj_list_t *list_new(size_t n); STATIC mp_obj_t list_extend(mp_obj_t self_in, mp_obj_t arg_in); @@ -66,9 +68,14 @@ STATIC mp_obj_t list_extend_from_iter(mp_obj_t list, mp_obj_t iterable) { return list; } -STATIC mp_obj_t list_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +mp_obj_t mp_obj_new_list_from_iter(mp_obj_t iterable) { + mp_obj_t list = mp_obj_new_list(0, NULL); + return list_extend_from_iter(list, iterable); +} + +STATIC mp_obj_t list_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num(n_args, kw_args, 0, 1, false); switch (n_args) { case 0: @@ -86,7 +93,7 @@ STATIC mp_obj_t list_make_new(const mp_obj_type_t *type_in, size_t n_args, size_ } STATIC mp_obj_t list_unary_op(mp_unary_op_t op, mp_obj_t self_in) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); switch (op) { case MP_UNARY_OP_BOOL: return mp_obj_new_bool(self->len != 0); case MP_UNARY_OP_LEN: return MP_OBJ_NEW_SMALL_INT(self->len); @@ -101,7 +108,7 @@ STATIC mp_obj_t list_unary_op(mp_unary_op_t op, mp_obj_t self_in) { } STATIC mp_obj_t list_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { - mp_obj_list_t *o = MP_OBJ_TO_PTR(lhs); + mp_obj_list_t *o = mp_instance_cast_to_native_base(lhs, &mp_type_list); switch (op) { case MP_BINARY_OP_ADD: { if (!MP_OBJ_IS_TYPE(rhs, &mp_type_list)) { @@ -124,7 +131,8 @@ STATIC mp_obj_t list_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { if (n < 0) { n = 0; } - mp_obj_list_t *s = list_new(o->len * n); + size_t new_len = mp_seq_multiply_len(o->len, n); + mp_obj_list_t *s = list_new(new_len); mp_seq_multiply(o->items, sizeof(*o->items), o->len, n, s->items); return MP_OBJ_FROM_PTR(s); } @@ -151,11 +159,11 @@ STATIC mp_obj_t list_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { } STATIC mp_obj_t list_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); if (value == MP_OBJ_NULL) { // delete #if MICROPY_PY_BUILTINS_SLICE if (MP_OBJ_IS_TYPE(index, &mp_type_slice)) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); mp_bound_slice_t slice; if (!mp_seq_get_fast_slice_indexes(self->len, index, &slice)) { mp_raise_NotImplementedError(NULL); @@ -171,12 +179,11 @@ STATIC mp_obj_t list_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { return mp_const_none; } #endif - mp_obj_t args[2] = {self_in, index}; + mp_obj_t args[2] = {self, index}; list_pop(2, args); return mp_const_none; } else if (value == MP_OBJ_SENTINEL) { // load - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); #if MICROPY_PY_BUILTINS_SLICE if (MP_OBJ_IS_TYPE(index, &mp_type_slice)) { mp_bound_slice_t slice; @@ -193,7 +200,6 @@ STATIC mp_obj_t list_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { } else { #if MICROPY_PY_BUILTINS_SLICE if (MP_OBJ_IS_TYPE(index, &mp_type_slice)) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); size_t value_len; mp_obj_t *value_items; mp_obj_get_array(value, &value_len, &value_items); mp_bound_slice_t slice_out; @@ -222,7 +228,7 @@ STATIC mp_obj_t list_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { return mp_const_none; } #endif - mp_obj_list_store(self_in, index, value); + mp_obj_list_store(self, index, value); return mp_const_none; } } @@ -233,7 +239,7 @@ STATIC mp_obj_t list_getiter(mp_obj_t o_in, mp_obj_iter_buf_t *iter_buf) { mp_obj_t mp_obj_list_append(mp_obj_t self_in, mp_obj_t arg) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); if (self->len >= self->alloc) { self->items = m_renew(mp_obj_t, self->items, self->alloc, self->alloc * 2); self->alloc *= 2; @@ -246,8 +252,8 @@ mp_obj_t mp_obj_list_append(mp_obj_t self_in, mp_obj_t arg) { STATIC mp_obj_t list_extend(mp_obj_t self_in, mp_obj_t arg_in) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); if (MP_OBJ_IS_TYPE(arg_in, &mp_type_list)) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); - mp_obj_list_t *arg = MP_OBJ_TO_PTR(arg_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); + mp_obj_list_t *arg = mp_instance_cast_to_native_base(arg_in, &mp_type_list); if (self->len + arg->len > self->alloc) { // TODO: use alloc policy for "4" @@ -266,9 +272,9 @@ STATIC mp_obj_t list_extend(mp_obj_t self_in, mp_obj_t arg_in) { STATIC mp_obj_t list_pop(size_t n_args, const mp_obj_t *args) { mp_check_self(MP_OBJ_IS_TYPE(args[0], &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_list_t *self = mp_instance_cast_to_native_base(args[0], &mp_type_list); if (self->len == 0) { - mp_raise_IndexError("pop from empty list"); + mp_raise_IndexError(translate("pop from empty list")); } size_t index = mp_get_index(self->base.type, self->len, n_args == 1 ? MP_OBJ_NEW_SMALL_INT(-1) : args[1], false); mp_obj_t ret = self->items[index]; @@ -326,7 +332,7 @@ mp_obj_t mp_obj_list_sort(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args); mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_obj_list_t *self = mp_instance_cast_to_native_base(pos_args[0], &mp_type_list); if (self->len > 1) { mp_quicksort(self->items, self->items + self->len - 1, @@ -337,9 +343,9 @@ mp_obj_t mp_obj_list_sort(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_ return mp_const_none; } -STATIC mp_obj_t list_clear(mp_obj_t self_in) { +mp_obj_t mp_obj_list_clear(mp_obj_t self_in) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); self->len = 0; self->items = m_renew(mp_obj_t, self->items, self->alloc, LIST_MIN_ALLOC); self->alloc = LIST_MIN_ALLOC; @@ -349,25 +355,25 @@ STATIC mp_obj_t list_clear(mp_obj_t self_in) { STATIC mp_obj_t list_copy(mp_obj_t self_in) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); return mp_obj_new_list(self->len, self->items); } STATIC mp_obj_t list_count(mp_obj_t self_in, mp_obj_t value) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); return mp_seq_count_obj(self->items, self->len, value); } STATIC mp_obj_t list_index(size_t n_args, const mp_obj_t *args) { mp_check_self(MP_OBJ_IS_TYPE(args[0], &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(args[0]); + mp_obj_list_t *self = mp_instance_cast_to_native_base(args[0], &mp_type_list); return mp_seq_index_obj(self->items, self->len, n_args, args); } STATIC mp_obj_t list_insert(mp_obj_t self_in, mp_obj_t idx, mp_obj_t obj) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); // insert has its own strange index logic mp_int_t index = MP_OBJ_SMALL_INT_VALUE(idx); if (index < 0) { @@ -401,7 +407,7 @@ mp_obj_t mp_obj_list_remove(mp_obj_t self_in, mp_obj_t value) { STATIC mp_obj_t list_reverse(mp_obj_t self_in) { mp_check_self(MP_OBJ_IS_TYPE(self_in, &mp_type_list)); - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); mp_int_t len = self->len; for (mp_int_t i = 0; i < len/2; i++) { @@ -415,7 +421,7 @@ STATIC mp_obj_t list_reverse(mp_obj_t self_in) { STATIC MP_DEFINE_CONST_FUN_OBJ_2(list_append_obj, mp_obj_list_append); STATIC MP_DEFINE_CONST_FUN_OBJ_2(list_extend_obj, list_extend); -STATIC MP_DEFINE_CONST_FUN_OBJ_1(list_clear_obj, list_clear); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(list_clear_obj, mp_obj_list_clear); STATIC MP_DEFINE_CONST_FUN_OBJ_1(list_copy_obj, list_copy); STATIC MP_DEFINE_CONST_FUN_OBJ_2(list_count_obj, list_count); STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(list_index_obj, 2, 4, list_index); @@ -478,7 +484,7 @@ mp_obj_t mp_obj_new_list(size_t n, mp_obj_t *items) { } void mp_obj_list_get(mp_obj_t self_in, size_t *len, mp_obj_t **items) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); *len = self->len; *items = self->items; } @@ -491,7 +497,7 @@ void mp_obj_list_set_len(mp_obj_t self_in, size_t len) { } void mp_obj_list_store(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { - mp_obj_list_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_list_t *self = mp_instance_cast_to_native_base(self_in, &mp_type_list); size_t i = mp_get_index(self->base.type, self->len, index, false); self->items[i] = value; } diff --git a/py/objlist.h b/py/objlist.h index 28b5495a92129..a43663db76f8d 100644 --- a/py/objlist.h +++ b/py/objlist.h @@ -35,4 +35,6 @@ typedef struct _mp_obj_list_t { mp_obj_t *items; } mp_obj_list_t; +void mp_obj_list_init(mp_obj_list_t *o, size_t n); + #endif // MICROPY_INCLUDED_PY_OBJLIST_H diff --git a/py/objmap.c b/py/objmap.c index 908c61507e77e..cf71f99eeb07d 100644 --- a/py/objmap.c +++ b/py/objmap.c @@ -36,8 +36,8 @@ typedef struct _mp_obj_map_t { mp_obj_t iters[]; } mp_obj_map_t; -STATIC mp_obj_t map_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 2, MP_OBJ_FUN_ARGS_MAX, false); +STATIC mp_obj_t map_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 2, MP_OBJ_FUN_ARGS_MAX, false); mp_obj_map_t *o = m_new_obj_var(mp_obj_map_t, mp_obj_t, n_args - 1); o->base.type = type; o->n_iters = n_args - 1; diff --git a/py/objmodule.c b/py/objmodule.c index 86e37850efeb3..b6a8a084e9f81 100644 --- a/py/objmodule.c +++ b/py/objmodule.c @@ -32,6 +32,8 @@ #include "py/runtime.h" #include "py/builtin.h" +#include "genhdr/moduledefs.h" + STATIC void module_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { (void)kind; mp_obj_module_t *self = MP_OBJ_TO_PTR(self_in); @@ -67,6 +69,13 @@ STATIC void module_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { // delete/store attribute mp_obj_dict_t *dict = self->globals; if (dict->map.is_fixed) { + mp_map_elem_t *elem = mp_map_lookup(&dict->map, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP); + // Return success if the given value is already in the dictionary. This is the case for + // native packages with native submodules. + if (elem != NULL && elem->value == dest[1]) { + dest[0] = MP_OBJ_NULL; // indicate success + return; + } else #if MICROPY_CAN_OVERRIDE_BUILTINS if (dict == &mp_module_builtins_globals) { if (MP_STATE_VM(mp_module_builtins_override_dict) == NULL) { @@ -148,11 +157,16 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { { MP_ROM_QSTR(MP_QSTR_array), MP_ROM_PTR(&mp_module_array) }, #endif #if MICROPY_PY_IO +#if CIRCUITPY + { MP_ROM_QSTR(MP_QSTR_io), MP_ROM_PTR(&mp_module_io) }, +#else { MP_ROM_QSTR(MP_QSTR_uio), MP_ROM_PTR(&mp_module_io) }, #endif +#endif #if MICROPY_PY_COLLECTIONS - { MP_ROM_QSTR(MP_QSTR_ucollections), MP_ROM_PTR(&mp_module_collections) }, + { MP_ROM_QSTR(MP_QSTR_collections), MP_ROM_PTR(&mp_module_collections) }, #endif +// CircuitPython: Now in shared-bindings/, so not defined here. #if MICROPY_PY_STRUCT { MP_ROM_QSTR(MP_QSTR_ustruct), MP_ROM_PTR(&mp_module_ustruct) }, #endif @@ -178,8 +192,13 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { // extmod modules #if MICROPY_PY_UERRNO +#if CIRCUITPY +// CircuitPython: Defined in MICROPY_PORT_BUILTIN_MODULES, so not defined here. +// TODO: move to shared-bindings/ +#else { MP_ROM_QSTR(MP_QSTR_uerrno), MP_ROM_PTR(&mp_module_uerrno) }, #endif +#endif #if MICROPY_PY_UCTYPES { MP_ROM_QSTR(MP_QSTR_uctypes), MP_ROM_PTR(&mp_module_uctypes) }, #endif @@ -187,11 +206,29 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { { MP_ROM_QSTR(MP_QSTR_uzlib), MP_ROM_PTR(&mp_module_uzlib) }, #endif #if MICROPY_PY_UJSON +#if CIRCUITPY +// CircuitPython: Defined in MICROPY_PORT_BUILTIN_MODULES, so not defined here. +// TODO: move to shared-bindings/ +#else { MP_ROM_QSTR(MP_QSTR_ujson), MP_ROM_PTR(&mp_module_ujson) }, #endif +#endif +#if CIRCUITPY_ULAB +#if CIRCUITPY +// CircuitPython: Defined in MICROPY_PORT_BUILTIN_MODULES, so not defined here. +// TODO: move to shared-bindings/ +#else + { MP_ROM_QSTR(MP_QSTR_ulab), MP_ROM_PTR(&ulab_user_cmodule) }, +#endif +#endif #if MICROPY_PY_URE +#if CIRCUITPY +// CircuitPython: Defined in MICROPY_PORT_BUILTIN_MODULES, so not defined here. +// TODO: move to shared-bindings/ +#else { MP_ROM_QSTR(MP_QSTR_ure), MP_ROM_PTR(&mp_module_ure) }, #endif +#endif #if MICROPY_PY_UHEAPQ { MP_ROM_QSTR(MP_QSTR_uheapq), MP_ROM_PTR(&mp_module_uheapq) }, #endif @@ -199,10 +236,10 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { { MP_ROM_QSTR(MP_QSTR_utimeq), MP_ROM_PTR(&mp_module_utimeq) }, #endif #if MICROPY_PY_UHASHLIB - { MP_ROM_QSTR(MP_QSTR_uhashlib), MP_ROM_PTR(&mp_module_uhashlib) }, + { MP_ROM_QSTR(MP_QSTR_hashlib), MP_ROM_PTR(&mp_module_uhashlib) }, #endif #if MICROPY_PY_UBINASCII - { MP_ROM_QSTR(MP_QSTR_ubinascii), MP_ROM_PTR(&mp_module_ubinascii) }, + { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, #endif #if MICROPY_PY_URANDOM { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&mp_module_urandom) }, @@ -213,13 +250,13 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { #if MICROPY_PY_USSL { MP_ROM_QSTR(MP_QSTR_ussl), MP_ROM_PTR(&mp_module_ussl) }, #endif -#ifdef MICROPY_PY_LWIP +#if MICROPY_PY_LWIP { MP_ROM_QSTR(MP_QSTR_lwip), MP_ROM_PTR(&mp_module_lwip) }, #endif #if MICROPY_PY_WEBSOCKET { MP_ROM_QSTR(MP_QSTR_websocket), MP_ROM_PTR(&mp_module_websocket) }, #endif -#ifdef MICROPY_PY_WEBREPL +#if MICROPY_PY_WEBREPL { MP_ROM_QSTR(MP_QSTR__webrepl), MP_ROM_PTR(&mp_module_webrepl) }, #endif #if MICROPY_PY_FRAMEBUF @@ -232,6 +269,11 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { // extra builtin modules as defined by a port MICROPY_PORT_BUILTIN_MODULES + #ifdef MICROPY_REGISTERED_MODULES + // builtin modules declared with MP_REGISTER_MODULE() + MICROPY_REGISTERED_MODULES + #endif + #if defined(MICROPY_DEBUG_MODULES) && defined(MICROPY_PORT_BUILTIN_DEBUG_MODULES) , MICROPY_PORT_BUILTIN_DEBUG_MODULES #endif @@ -259,17 +301,7 @@ mp_obj_t mp_module_get(qstr module_name) { if (el == NULL) { return MP_OBJ_NULL; } - - if (MICROPY_MODULE_BUILTIN_INIT) { - // look for __init__ and call it if it exists - mp_obj_t dest[2]; - mp_load_method_maybe(el->value, MP_QSTR___init__, dest); - if (dest[0] != MP_OBJ_NULL) { - mp_call_method_n_kw(0, 0, dest); - // register module so __init__ is not called again - mp_module_register(module_name, el->value); - } - } + mp_module_call_init(module_name, el->value); } // module found, return it @@ -280,3 +312,19 @@ void mp_module_register(qstr qst, mp_obj_t module) { mp_map_t *mp_loaded_modules_map = &MP_STATE_VM(mp_loaded_modules_dict).map; mp_map_lookup(mp_loaded_modules_map, MP_OBJ_NEW_QSTR(qst), MP_MAP_LOOKUP_ADD_IF_NOT_FOUND)->value = module; } + +#if MICROPY_MODULE_BUILTIN_INIT +void mp_module_call_init(qstr module_name, mp_obj_t module_obj) { + // Look for __init__ and call it if it exists + mp_obj_t dest[2]; + mp_load_method_maybe(module_obj, MP_QSTR___init__, dest); + if (dest[0] != MP_OBJ_NULL) { + mp_call_method_n_kw(0, 0, dest); + // Register module so __init__ is not called again. + // If a module can be referenced by more than one name (eg due to weak links) + // then __init__ will still be called for each distinct import, and it's then + // up to the particular module to make sure it's __init__ code only runs once. + mp_module_register(module_name, module_obj); + } +} +#endif diff --git a/py/objmodule.h b/py/objmodule.h index b5c07dc333e67..b7702ec50b686 100644 --- a/py/objmodule.h +++ b/py/objmodule.h @@ -34,4 +34,13 @@ extern const mp_map_t mp_builtin_module_weak_links_map; mp_obj_t mp_module_get(qstr module_name); void mp_module_register(qstr qstr, mp_obj_t module); +#if MICROPY_MODULE_BUILTIN_INIT +void mp_module_call_init(qstr module_name, mp_obj_t module_obj); +#else +static inline void mp_module_call_init(qstr module_name, mp_obj_t module_obj) { + (void)module_name; + (void)module_obj; +} +#endif + #endif // MICROPY_INCLUDED_PY_OBJMODULE_H diff --git a/py/objnamedtuple.c b/py/objnamedtuple.c index 2288fa7b67a6a..84dcf79097974 100644 --- a/py/objnamedtuple.c +++ b/py/objnamedtuple.c @@ -27,15 +27,17 @@ #include -#include "py/nlr.h" -#include "py/objnamedtuple.h" #include "py/objtuple.h" #include "py/runtime.h" #include "py/objstr.h" +#include "py/objnamedtuple.h" +#include "py/objtype.h" + +#include "supervisor/shared/translate.h" #if MICROPY_PY_COLLECTIONS -STATIC size_t namedtuple_find_field(const mp_obj_namedtuple_type_t *type, qstr name) { +size_t mp_obj_namedtuple_find_field(const mp_obj_namedtuple_type_t *type, qstr name) { for (size_t i = 0; i < type->n_fields; i++) { if (type->fields[i] == name) { return i; @@ -44,6 +46,23 @@ STATIC size_t namedtuple_find_field(const mp_obj_namedtuple_type_t *type, qstr n return (size_t)-1; } +#if MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT +STATIC mp_obj_t namedtuple_asdict(mp_obj_t self_in) { + mp_obj_namedtuple_t *self = MP_OBJ_TO_PTR(self_in); + const qstr *fields = ((mp_obj_namedtuple_type_t*)self->tuple.base.type)->fields; + mp_obj_t dict = mp_obj_new_dict(self->tuple.len); + //make it an OrderedDict + mp_obj_dict_t *dictObj = MP_OBJ_TO_PTR(dict); + dictObj->base.type = &mp_type_ordereddict; + dictObj->map.is_ordered = 1; + for (size_t i = 0; i < self->tuple.len; ++i) { + mp_obj_dict_store(dict, MP_OBJ_NEW_QSTR(fields[i]), self->tuple.items[i]); + } + return dict; +} +MP_DEFINE_CONST_FUN_OBJ_1(namedtuple_asdict_obj, namedtuple_asdict); +#endif + void namedtuple_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind) { (void)kind; mp_obj_namedtuple_t *o = MP_OBJ_TO_PTR(o_in); @@ -56,7 +75,14 @@ void namedtuple_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { if (dest[0] == MP_OBJ_NULL) { // load attribute mp_obj_namedtuple_t *self = MP_OBJ_TO_PTR(self_in); - size_t id = namedtuple_find_field((mp_obj_namedtuple_type_t*)self->tuple.base.type, attr); + #if MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT + if (attr == MP_QSTR__asdict) { + dest[0] = MP_OBJ_FROM_PTR(&namedtuple_asdict_obj); + dest[1] = self_in; + return; + } + #endif + size_t id = mp_obj_namedtuple_find_field((mp_obj_namedtuple_type_t*)self->tuple.base.type, attr); if (id == (size_t)-1) { return; } @@ -64,23 +90,27 @@ void namedtuple_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { } else { // delete/store attribute // provide more detailed error message than we'd get by just returning - mp_raise_AttributeError("can't set attribute"); + mp_raise_AttributeError(translate("can't set attribute")); } } -mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { const mp_obj_namedtuple_type_t *type = (const mp_obj_namedtuple_type_t*)type_in; size_t num_fields = type->n_fields; + size_t n_kw = 0; + if (kw_args != NULL) { + n_kw = kw_args->used; + } if (n_args + n_kw != num_fields) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { mp_arg_error_terse_mismatch(); } else if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NORMAL) { mp_raise_TypeError_varg( - "function takes %d positional arguments but %d were given", + translate("function takes %d positional arguments but %d were given"), num_fields, n_args + n_kw); } else if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_DETAILED) { mp_raise_TypeError_varg( - "%q() takes %d positional arguments but %d were given", + translate("%q() takes %d positional arguments but %d were given"), type->base.name, num_fields, n_args + n_kw); } } @@ -94,15 +124,15 @@ mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t // Fill in the remaining slots with the keyword args memset(&tuple->items[n_args], 0, sizeof(mp_obj_t) * n_kw); - for (size_t i = n_args; i < n_args + 2 * n_kw; i += 2) { - qstr kw = mp_obj_str_get_qstr(args[i]); - size_t id = namedtuple_find_field(type, kw); + for (size_t i = 0; i < n_kw; i++) { + qstr kw = mp_obj_str_get_qstr(kw_args->table[i].key); + size_t id = mp_obj_namedtuple_find_field(type, kw); if (id == (size_t)-1) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { mp_arg_error_terse_mismatch(); } else { mp_raise_TypeError_varg( - "unexpected keyword argument '%q'", kw); + translate("unexpected keyword argument '%q'"), kw); } } if (tuple->items[id] != MP_OBJ_NULL) { @@ -110,18 +140,27 @@ mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t mp_arg_error_terse_mismatch(); } else { mp_raise_TypeError_varg( - "function got multiple values for argument '%q'", kw); + translate("function got multiple values for argument '%q'"), kw); } } - tuple->items[id] = args[i + 1]; + tuple->items[id] = kw_args->table[i].value; } return MP_OBJ_FROM_PTR(tuple); } -STATIC mp_obj_t mp_obj_new_namedtuple_type(qstr name, size_t n_fields, mp_obj_t *fields) { +mp_obj_namedtuple_type_t *mp_obj_new_namedtuple_base(size_t n_fields, mp_obj_t *fields) { mp_obj_namedtuple_type_t *o = m_new_obj_var(mp_obj_namedtuple_type_t, qstr, n_fields); memset(&o->base, 0, sizeof(o->base)); + o->n_fields = n_fields; + for (size_t i = 0; i < n_fields; i++) { + o->fields[i] = mp_obj_str_get_qstr(fields[i]); + } + return o; +} + +STATIC mp_obj_t mp_obj_new_namedtuple_type(qstr name, size_t n_fields, mp_obj_t *fields) { + mp_obj_namedtuple_type_t *o = mp_obj_new_namedtuple_base(n_fields, fields); o->base.base.type = &mp_type_type; o->base.name = name; o->base.print = namedtuple_print; @@ -132,10 +171,6 @@ STATIC mp_obj_t mp_obj_new_namedtuple_type(qstr name, size_t n_fields, mp_obj_t o->base.subscr = mp_obj_tuple_subscr; o->base.getiter = mp_obj_tuple_getiter; o->base.parent = &mp_type_tuple; - o->n_fields = n_fields; - for (size_t i = 0; i < n_fields; i++) { - o->fields[i] = mp_obj_str_get_qstr(fields[i]); - } return MP_OBJ_FROM_PTR(o); } diff --git a/py/objnamedtuple.h b/py/objnamedtuple.h index a36404b8d4b7d..0ea0d28622d80 100644 --- a/py/objnamedtuple.h +++ b/py/objnamedtuple.h @@ -39,7 +39,7 @@ typedef struct _mp_obj_namedtuple_type_t { mp_obj_type_t base; - mp_uint_t n_fields; + size_t n_fields; qstr fields[]; } mp_obj_namedtuple_type_t; @@ -48,10 +48,10 @@ typedef struct _mp_obj_namedtuple_t { } mp_obj_namedtuple_t; void namedtuple_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind); - +size_t mp_obj_namedtuple_find_field(const mp_obj_namedtuple_type_t *type, qstr name); void namedtuple_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest); - -mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args); +mp_obj_namedtuple_type_t *mp_obj_new_namedtuple_base(size_t n_fields, mp_obj_t *fields); +mp_obj_t namedtuple_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); #endif // MICROPY_PY_COLLECTIONS diff --git a/py/objobject.c b/py/objobject.c index 49d2ec62ee94d..a42edde3c6cd4 100644 --- a/py/objobject.c +++ b/py/objobject.c @@ -29,13 +29,15 @@ #include "py/objtype.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + typedef struct _mp_obj_object_t { mp_obj_base_t base; } mp_obj_object_t; -STATIC mp_obj_t object_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t object_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)args; - mp_arg_check_num(n_args, n_kw, 0, 0, false); + mp_arg_check_num(n_args, kw_args, 0, 0, false); mp_obj_object_t *o = m_new_obj(mp_obj_object_t); o->base.type = type; return MP_OBJ_FROM_PTR(o); @@ -50,11 +52,14 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(object___init___obj, object___init__); STATIC mp_obj_t object___new__(mp_obj_t cls) { if (!MP_OBJ_IS_TYPE(cls, &mp_type_type) || !mp_obj_is_instance_type((mp_obj_type_t*)MP_OBJ_TO_PTR(cls))) { - mp_raise_TypeError("__new__ arg must be a user-type"); + mp_raise_TypeError(translate("__new__ arg must be a user-type")); } - mp_obj_t o = MP_OBJ_SENTINEL; - mp_obj_t res = mp_obj_instance_make_new(MP_OBJ_TO_PTR(cls), 1, 0, &o); - return res; + // This executes only "__new__" part of instance creation. + // TODO: This won't work well for classes with native bases. + // TODO: This is a hack, should be resolved along the lines of + // https://github.com/micropython/micropython/issues/606#issuecomment-43685883 + const mp_obj_type_t *native_base; + return MP_OBJ_FROM_PTR(mp_obj_new_instance(MP_OBJ_TO_PTR(cls), &native_base)); } STATIC MP_DEFINE_CONST_FUN_OBJ_1(object___new___fun_obj, object___new__); STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(object___new___obj, MP_ROM_PTR(&object___new___fun_obj)); diff --git a/py/objproperty.c b/py/objproperty.c index 4aba6c7a12b65..ddf484af2b9c7 100644 --- a/py/objproperty.c +++ b/py/objproperty.c @@ -33,7 +33,7 @@ #if MICROPY_PY_BUILTINS_PROPERTY -STATIC mp_obj_t property_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t property_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { enum { ARG_fget, ARG_fset, ARG_fdel, ARG_doc }; static const mp_arg_t allowed_args[] = { { MP_QSTR_, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} }, @@ -42,7 +42,7 @@ STATIC mp_obj_t property_make_new(const mp_obj_type_t *type, size_t n_args, size { MP_QSTR_doc, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} }, }; mp_arg_val_t vals[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all_kw_array(n_args, n_kw, args, MP_ARRAY_SIZE(allowed_args), allowed_args, vals); + mp_arg_parse_all(n_args, args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, vals); mp_obj_property_t *o = m_new_obj(mp_obj_property_t); o->base.type = type; diff --git a/py/objrange.c b/py/objrange.c index 3874adb11c2d3..30d55c56cdd26 100644 --- a/py/objrange.c +++ b/py/objrange.c @@ -28,6 +28,8 @@ #include "py/runtime.h" +#include "supervisor/shared/translate.h" + /******************************************************************************/ /* range iterator */ @@ -89,8 +91,8 @@ STATIC void range_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind } } -STATIC mp_obj_t range_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 3, false); +STATIC mp_obj_t range_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 3, false); mp_obj_range_t *o = m_new_obj(mp_obj_range_t); o->base.type = type; @@ -105,7 +107,7 @@ STATIC mp_obj_t range_make_new(const mp_obj_type_t *type, size_t n_args, size_t if (n_args == 3) { o->step = mp_obj_get_int(args[2]); if (o->step == 0) { - mp_raise_ValueError("zero step"); + mp_raise_ValueError(translate("zero step")); } } } @@ -138,6 +140,24 @@ STATIC mp_obj_t range_unary_op(mp_unary_op_t op, mp_obj_t self_in) { } } +#if MICROPY_PY_BUILTINS_RANGE_BINOP +STATIC mp_obj_t range_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { + if (!MP_OBJ_IS_TYPE(rhs_in, &mp_type_range) || op != MP_BINARY_OP_EQUAL) { + return MP_OBJ_NULL; // op not supported + } + mp_obj_range_t *lhs = MP_OBJ_TO_PTR(lhs_in); + mp_obj_range_t *rhs = MP_OBJ_TO_PTR(rhs_in); + mp_int_t lhs_len = range_len(lhs); + mp_int_t rhs_len = range_len(rhs); + return mp_obj_new_bool( + lhs_len == rhs_len + && (lhs_len == 0 + || (lhs->start == rhs->start + && (lhs_len == 1 || lhs->step == rhs->step))) + ); +} +#endif + STATIC mp_obj_t range_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { if (value == MP_OBJ_SENTINEL) { // load @@ -195,6 +215,9 @@ const mp_obj_type_t mp_type_range = { .print = range_print, .make_new = range_make_new, .unary_op = range_unary_op, + #if MICROPY_PY_BUILTINS_RANGE_BINOP + .binary_op = range_binary_op, + #endif .subscr = range_subscr, .getiter = range_getiter, #if MICROPY_PY_BUILTINS_RANGE_ATTRS diff --git a/py/objreversed.c b/py/objreversed.c index e498b553de8f4..4937d0818963e 100644 --- a/py/objreversed.c +++ b/py/objreversed.c @@ -37,8 +37,8 @@ typedef struct _mp_obj_reversed_t { mp_uint_t cur_index; // current index, plus 1; 0=no more, 1=last one (index 0) } mp_obj_reversed_t; -STATIC mp_obj_t reversed_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, false); +STATIC mp_obj_t reversed_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); // check if __reversed__ exists, and if so delegate to it mp_obj_t dest[2]; diff --git a/py/objset.c b/py/objset.c index 6ed15c791481b..5d1608c7ea9e6 100644 --- a/py/objset.c +++ b/py/objset.c @@ -31,6 +31,8 @@ #include "py/runtime.h" #include "py/builtin.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_SET typedef struct _mp_obj_set_t { @@ -101,8 +103,8 @@ STATIC void set_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t #endif } -STATIC mp_obj_t set_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, 1, false); +STATIC mp_obj_t set_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 1, false); switch (n_args) { case 0: { @@ -297,7 +299,7 @@ STATIC mp_obj_t set_issubset_internal(mp_obj_t self_in, mp_obj_t other_in, bool if (is_set_or_frozenset(self_in)) { self = MP_OBJ_TO_PTR(self_in); } else { - self = MP_OBJ_TO_PTR(set_make_new(&mp_type_set, 1, 0, &self_in)); + self = MP_OBJ_TO_PTR(set_make_new(&mp_type_set, 1, &self_in, NULL)); cleanup_self = true; } @@ -306,7 +308,7 @@ STATIC mp_obj_t set_issubset_internal(mp_obj_t self_in, mp_obj_t other_in, bool if (is_set_or_frozenset(other_in)) { other = MP_OBJ_TO_PTR(other_in); } else { - other = MP_OBJ_TO_PTR(set_make_new(&mp_type_set, 1, 0, &other_in)); + other = MP_OBJ_TO_PTR(set_make_new(&mp_type_set, 1, &other_in, NULL)); cleanup_other = true; } mp_obj_t out = mp_const_true; @@ -351,11 +353,9 @@ STATIC mp_obj_t set_issuperset_proper(mp_obj_t self_in, mp_obj_t other_in) { } STATIC mp_obj_t set_equal(mp_obj_t self_in, mp_obj_t other_in) { + assert(is_set_or_frozenset(other_in)); check_set_or_frozenset(self_in); mp_obj_set_t *self = MP_OBJ_TO_PTR(self_in); - if (!is_set_or_frozenset(other_in)) { - return mp_const_false; - } mp_obj_set_t *other = MP_OBJ_TO_PTR(other_in); if (self->set.used != other->set.used) { return mp_const_false; @@ -368,7 +368,7 @@ STATIC mp_obj_t set_pop(mp_obj_t self_in) { mp_obj_set_t *self = MP_OBJ_TO_PTR(self_in); mp_obj_t obj = mp_set_remove_first(&self->set); if (obj == MP_OBJ_NULL) { - mp_raise_msg(&mp_type_KeyError, "pop from an empty set"); + mp_raise_msg(&mp_type_KeyError, translate("pop from an empty set")); } return obj; } @@ -461,7 +461,7 @@ STATIC mp_obj_t set_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { #else bool update = true; #endif - if (op != MP_BINARY_OP_IN && !is_set_or_frozenset(rhs)) { + if (op != MP_BINARY_OP_CONTAINS && !is_set_or_frozenset(rhs)) { // For all ops except containment the RHS must be a set/frozenset return MP_OBJ_NULL; } @@ -507,7 +507,7 @@ STATIC mp_obj_t set_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { return set_issubset(lhs, rhs); case MP_BINARY_OP_MORE_EQUAL: return set_issuperset(lhs, rhs); - case MP_BINARY_OP_IN: { + case MP_BINARY_OP_CONTAINS: { mp_obj_set_t *o = MP_OBJ_TO_PTR(lhs); mp_obj_t elem = mp_set_lookup(&o->set, rhs, MP_MAP_LOOKUP); return mp_obj_new_bool(elem != MP_OBJ_NULL); diff --git a/py/objslice.c b/py/objslice.c index dc8d72a6a09bc..cbbee326e9830 100644 --- a/py/objslice.c +++ b/py/objslice.c @@ -31,6 +31,8 @@ #include "py/runtime.h" #include "py/runtime0.h" +#include "supervisor/shared/translate.h" + /******************************************************************************/ /* slice object */ @@ -61,12 +63,12 @@ STATIC void slice_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t STATIC mp_obj_t slice_indices(mp_obj_t self_in, mp_obj_t length_obj) { mp_obj_slice_t *self = MP_OBJ_TO_PTR(self_in); if (!MP_OBJ_IS_SMALL_INT(length_obj)) { - mp_raise_TypeError("Length must be an int"); + mp_raise_TypeError(translate("Length must be an int")); } int length = MP_OBJ_SMALL_INT_VALUE(length_obj); if (length < 0) { - mp_raise_ValueError("Length must be non-negative"); + mp_raise_ValueError(translate("Length must be non-negative")); } mp_obj_t indices[3] = {MP_OBJ_NEW_SMALL_INT(0), length_obj, MP_OBJ_NEW_SMALL_INT(1)}; @@ -81,7 +83,7 @@ STATIC mp_obj_t slice_indices(mp_obj_t self_in, mp_obj_t length_obj) { indices[1] = MP_OBJ_NEW_SMALL_INT(-1); } if (step == 0) { - mp_raise_ValueError("slice step cannot be zero"); + mp_raise_ValueError(translate("slice step cannot be zero")); } } for (int i = 0; i < 2; i++) { @@ -128,7 +130,7 @@ STATIC void slice_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { } STATIC mp_obj_t slice_make_new(const mp_obj_type_t *type, - size_t n_args, size_t n_kw, const mp_obj_t *args); + size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); #endif const mp_obj_type_t mp_type_slice = { @@ -150,14 +152,79 @@ mp_obj_t mp_obj_new_slice(mp_obj_t ostart, mp_obj_t ostop, mp_obj_t ostep) { return MP_OBJ_FROM_PTR(o); } +// Return the real index and step values for a slice when applied to a sequence of +// the given length, resolving missing components, negative values and values off +// the end of the sequence. +void mp_obj_slice_indices(mp_obj_t self_in, mp_int_t length, mp_bound_slice_t *result) { + mp_obj_slice_t *self = MP_OBJ_TO_PTR(self_in); + mp_int_t start, stop, step; + + if (self->step == mp_const_none) { + step = 1; + } else { + step = mp_obj_get_int(self->step); + if (step == 0) { + mp_raise_ValueError(translate("slice step cannot be zero")); + } + } + + if (step > 0) { + // Positive step + if (self->start == mp_const_none) { + start = 0; + } else { + start = mp_obj_get_int(self->start); + if (start < 0) { + start += length; + } + start = MIN(length, MAX(start, 0)); + } + + if (self->stop == mp_const_none) { + stop = length; + } else { + stop = mp_obj_get_int(self->stop); + if (stop < 0) { + stop += length; + } + stop = MIN(length, MAX(stop, 0)); + } + } else { + // Negative step + if (self->start == mp_const_none) { + start = length - 1; + } else { + start = mp_obj_get_int(self->start); + if (start < 0) { + start += length; + } + start = MIN(length - 1, MAX(start, -1)); + } + + if (self->stop == mp_const_none) { + stop = -1; + } else { + stop = mp_obj_get_int(self->stop); + if (stop < 0) { + stop += length; + } + stop = MIN(length - 1, MAX(stop, -1)); + } + } + + result->start = start; + result->stop = stop; + result->step = step; +} + #if MICROPY_PY_BUILTINS_SLICE_ATTRS STATIC mp_obj_t slice_make_new(const mp_obj_type_t *type, - size_t n_args, size_t n_kw, const mp_obj_t *args) { + size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { if (type != &mp_type_slice) { - mp_raise_NotImplementedError("Cannot subclass slice"); + mp_raise_NotImplementedError(translate("Cannot subclass slice")); } // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 3, false); + mp_arg_check_num(n_args, kw_args, 1, 3, false); // 1st argument is the pin mp_obj_t start = mp_const_none; diff --git a/py/objstr.c b/py/objstr.c index 64306f54f8248..a60f507e99069 100644 --- a/py/objstr.c +++ b/py/objstr.c @@ -31,14 +31,23 @@ #include "py/unicode.h" #include "py/objstr.h" #include "py/objlist.h" +#include "py/objtype.h" #include "py/runtime.h" #include "py/stackctrl.h" +#include "supervisor/shared/translate.h" + STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_t *args, mp_obj_t dict); STATIC mp_obj_t mp_obj_new_bytes_iterator(mp_obj_t str, mp_obj_iter_buf_t *iter_buf); STATIC NORETURN void bad_implicit_conversion(mp_obj_t self_in); +const char nibble_to_hex_upper[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', + 'A', 'B', 'C', 'D', 'E', 'F'}; + +const char nibble_to_hex_lower[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', + 'a', 'b', 'c', 'd', 'e', 'f'}; + /******************************************************************************/ /* str */ @@ -130,14 +139,14 @@ STATIC void str_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t } } -mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { +mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { #if MICROPY_CPYTHON_COMPAT - if (n_kw != 0) { + if (kw_args != NULL && kw_args->used != 0) { mp_arg_error_unimpl_kw(); } #endif - mp_arg_check_num(n_args, n_kw, 0, 3, false); + mp_arg_check_num(n_args, kw_args, 0, 3, false); switch (n_args) { case 0: @@ -164,7 +173,14 @@ mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_ mp_raise_msg(&mp_type_UnicodeError, NULL); } #endif - mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_str_of_type(type, NULL, str_len)); + + // Check if a qstr with this data already exists + qstr q = qstr_find_strn((const char*)str_data, str_len); + if (q != MP_QSTR_NULL) { + return MP_OBJ_NEW_QSTR(q); + } + + mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_str_copy(type, NULL, str_len)); o->data = str_data; o->hash = str_hash; return MP_OBJ_FROM_PTR(o); @@ -176,20 +192,20 @@ mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_ mp_raise_msg(&mp_type_UnicodeError, NULL); } #endif - return mp_obj_new_str(bufinfo.buf, bufinfo.len, false); + return mp_obj_new_str(bufinfo.buf, bufinfo.len); } } } -STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; #if MICROPY_CPYTHON_COMPAT - if (n_kw != 0) { + if (kw_args != NULL && kw_args->used != 0) { mp_arg_error_unimpl_kw(); } #else - (void)n_kw; + (void)kw_args; #endif if (n_args == 0) { @@ -205,28 +221,38 @@ STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, size if (str_hash == 0) { str_hash = qstr_compute_hash(str_data, str_len); } - mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_str_of_type(&mp_type_bytes, NULL, str_len)); + mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_str_copy(&mp_type_bytes, NULL, str_len)); o->data = str_data; o->hash = str_hash; return MP_OBJ_FROM_PTR(o); } - if (n_args > 1) { - goto wrong_args; - } - if (MP_OBJ_IS_SMALL_INT(args[0])) { - uint len = MP_OBJ_SMALL_INT_VALUE(args[0]); + mp_int_t len = MP_OBJ_SMALL_INT_VALUE(args[0]); + if (len < 0) { + mp_raise_ValueError(NULL); + } vstr_t vstr; vstr_init_len(&vstr, len); memset(vstr.buf, 0, len); return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); } + if (n_args > 1) { + goto wrong_args; + } + + // check if __bytes__ exists, and if so delegate to it + mp_obj_t dest[2]; + mp_load_method_maybe(args[0], MP_QSTR___bytes__, dest); + if (dest[0] != MP_OBJ_NULL) { + return mp_call_method_n_kw(0, 0, dest); + } + // check if argument has the buffer protocol mp_buffer_info_t bufinfo; if (mp_get_buffer(args[0], &bufinfo, MP_BUFFER_READ)) { - return mp_obj_new_str_of_type(&mp_type_bytes, bufinfo.buf, bufinfo.len); + return mp_obj_new_bytes(bufinfo.buf, bufinfo.len); } vstr_t vstr; @@ -246,7 +272,7 @@ STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, size mp_int_t val = mp_obj_get_int(item); #if MICROPY_FULL_CHECKS if (val < 0 || val > 255) { - mp_raise_ValueError("bytes value out of range"); + mp_raise_ValueError(translate("bytes value out of range")); } #endif vstr_add_byte(&vstr, val); @@ -255,7 +281,7 @@ STATIC mp_obj_t bytes_make_new(const mp_obj_type_t *type_in, size_t n_args, size return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); wrong_args: - mp_raise_TypeError("wrong number of arguments"); + mp_raise_TypeError(translate("wrong number of arguments")); } // like strstr but with specified length and allows \0 bytes @@ -320,8 +346,9 @@ mp_obj_t mp_obj_str_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i return mp_const_empty_bytes; } } + size_t new_len = mp_seq_multiply_len(lhs_len, n); vstr_t vstr; - vstr_init_len(&vstr, lhs_len * n); + vstr_init_len(&vstr, new_len); mp_seq_multiply(lhs_data, sizeof(*lhs_data), lhs_len, n, vstr.buf); return mp_obj_new_str_from_vstr(lhs_type, &vstr); } @@ -377,8 +404,7 @@ mp_obj_t mp_obj_str_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i return mp_obj_new_str_from_vstr(lhs_type, &vstr); } - case MP_BINARY_OP_IN: - /* NOTE `a in b` is `b.__contains__(a)` */ + case MP_BINARY_OP_CONTAINS: return mp_obj_new_bool(find_subbytes(lhs_data, lhs_len, rhs_data, rhs_len, 1) != NULL); //case MP_BINARY_OP_NOT_EQUAL: // This is never passed here @@ -396,6 +422,15 @@ mp_obj_t mp_obj_str_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_i #if !MICROPY_PY_BUILTINS_STR_UNICODE // objstrunicode defines own version +size_t str_offset_to_index(const mp_obj_type_t *type, const byte *self_data, size_t self_len, + size_t offset) { + if (offset > self_len) { + mp_raise_ValueError(translate("offset out of bounds")); + } + + return offset; +} + const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, size_t self_len, mp_obj_t index, bool is_slice) { size_t index_val = mp_get_index(type, self_len, index, is_slice); @@ -413,7 +448,7 @@ STATIC mp_obj_t bytes_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { if (MP_OBJ_IS_TYPE(index, &mp_type_slice)) { mp_bound_slice_t slice; if (!mp_seq_get_fast_slice_indexes(self_len, index, &slice)) { - mp_raise_NotImplementedError("only slices with step=1 (aka None) are supported"); + mp_raise_NotImplementedError(translate("only slices with step=1 (aka None) are supported")); } return mp_obj_new_str_of_type(type, self_data + slice.start, slice.stop - slice.start); } @@ -423,7 +458,7 @@ STATIC mp_obj_t bytes_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { if (MICROPY_PY_BUILTINS_STR_UNICODE || type == &mp_type_bytes) { return MP_OBJ_NEW_SMALL_INT(self_data[index_val]); } else { - return mp_obj_new_str((char*)&self_data[index_val], 1, true); + return mp_obj_new_str_via_qstr((char*)&self_data[index_val], 1); } } else { return MP_OBJ_NULL; // op not supported @@ -444,7 +479,7 @@ STATIC mp_obj_t str_join(mp_obj_t self_in, mp_obj_t arg) { if (!MP_OBJ_IS_TYPE(arg, &mp_type_list) && !MP_OBJ_IS_TYPE(arg, &mp_type_tuple)) { // arg is not a list nor a tuple, try to convert it to a list // TODO: Try to optimize? - arg = mp_type_list.make_new(&mp_type_list, 1, 0, &arg); + arg = mp_type_list.make_new(&mp_type_list, 1, &arg, NULL); } mp_obj_get_array(arg, &seq_len, &seq_items); @@ -453,7 +488,7 @@ STATIC mp_obj_t str_join(mp_obj_t self_in, mp_obj_t arg) { for (size_t i = 0; i < seq_len; i++) { if (mp_obj_get_type(seq_items[i]) != self_type) { mp_raise_TypeError( - "join expects a list of str/bytes objects consistent with self object"); + translate("join expects a list of str/bytes objects consistent with self object")); } if (i > 0) { required_len += sep_len; @@ -528,7 +563,7 @@ mp_obj_t mp_obj_str_split(size_t n_args, const mp_obj_t *args) { const char *sep_str = mp_obj_str_get_data(sep, &sep_len); if (sep_len == 0) { - mp_raise_ValueError("empty separator"); + mp_raise_ValueError(translate("empty separator")); } for (;;) { @@ -627,13 +662,13 @@ STATIC mp_obj_t str_rsplit(size_t n_args, const mp_obj_t *args) { mp_int_t idx = splits; if (sep == mp_const_none) { - mp_raise_NotImplementedError("rsplit(None,n)"); + mp_raise_NotImplementedError(translate("rsplit(None,n)")); } else { size_t sep_len; const char *sep_str = mp_obj_str_get_data(sep, &sep_len); if (sep_len == 0) { - mp_raise_ValueError("empty separator"); + mp_raise_ValueError(translate("empty separator")); } const byte *beg = s; @@ -654,9 +689,7 @@ STATIC mp_obj_t str_rsplit(size_t n_args, const mp_obj_t *args) { } res->items[idx--] = mp_obj_new_str_of_type(self_type, s + sep_len, last - s - sep_len); last = s; - if (splits > 0) { - splits--; - } + splits--; } if (idx != 0) { // We split less parts than split limit, now go cleanup surplus @@ -692,11 +725,16 @@ STATIC mp_obj_t str_finder(size_t n_args, const mp_obj_t *args, int direction, b end = str_index_to_ptr(self_type, haystack, haystack_len, args[3], true); } + if (end < start) { + goto out_error; + } + const byte *p = find_subbytes(start, end - start, needle, needle_len, direction); if (p == NULL) { + out_error: // not found if (is_index) { - mp_raise_ValueError("substring not found"); + mp_raise_ValueError(translate("substring not found")); } else { return MP_OBJ_NEW_SMALL_INT(-1); } @@ -753,7 +791,7 @@ STATIC mp_obj_t str_endswith(size_t n_args, const mp_obj_t *args) { size_t suffix_len; const char *suffix = mp_obj_str_get_data(args[1], &suffix_len); if (n_args > 2) { - mp_raise_NotImplementedError("start/end indices"); + mp_raise_NotImplementedError(translate("start/end indices")); } if (suffix_len > str_len) { @@ -914,7 +952,7 @@ STATIC mp_obj_t arg_as_int(mp_obj_t arg) { #if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE STATIC NORETURN void terse_str_format_value_error(void) { - mp_raise_ValueError("bad format string"); + mp_raise_ValueError(translate("bad format string")); } #else // define to nothing to improve coverage @@ -936,7 +974,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("single '}' encountered in format string"); + mp_raise_ValueError(translate("single '}' encountered in format string")); } } if (*str != '{') { @@ -975,13 +1013,13 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NORMAL) { - mp_raise_ValueError("bad conversion specifier"); + mp_raise_ValueError(translate("bad conversion specifier")); } else { if (str >= top) { mp_raise_ValueError( - "end of format while looking for conversion specifier"); + translate("end of format while looking for conversion specifier")); } else { - mp_raise_ValueError_varg("unknown conversion specifier %c", *str); + mp_raise_ValueError_varg(translate("unknown conversion specifier %c"), *str); } } } @@ -1012,14 +1050,14 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("unmatched '{' in format"); + mp_raise_ValueError(translate("unmatched '{' in format")); } } if (*str != '}') { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("expected ':' after format specifier"); + mp_raise_ValueError(translate("expected ':' after format specifier")); } } @@ -1033,19 +1071,19 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError( - "can't switch from automatic field numbering to manual field specification"); + translate("can't switch from automatic field numbering to manual field specification")); } } field_name = str_to_int(field_name, field_name_top, &index); if ((uint)index >= n_args - 1) { - mp_raise_IndexError("tuple index out of range"); + mp_raise_IndexError(translate("tuple index out of range")); } arg = args[index + 1]; *arg_i = -1; } else { const char *lookup; for (lookup = field_name; lookup < field_name_top && *lookup != '.' && *lookup != '['; lookup++); - mp_obj_t field_q = mp_obj_new_str(field_name, lookup - field_name, true/*?*/); + mp_obj_t field_q = mp_obj_new_str_via_qstr(field_name, lookup - field_name); // should it be via qstr? field_name = lookup; mp_map_elem_t *key_elem = mp_map_lookup(kwargs, field_q, MP_MAP_LOOKUP); if (key_elem == NULL) { @@ -1054,7 +1092,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar arg = key_elem->value; } if (field_name < field_name_top) { - mp_raise_NotImplementedError("attributes not supported yet"); + mp_raise_NotImplementedError(translate("attributes not supported yet")); } } else { if (*arg_i < 0) { @@ -1062,11 +1100,11 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError( - "can't switch from manual field specification to automatic field numbering"); + translate("can't switch from manual field specification to automatic field numbering")); } } if ((uint)*arg_i >= n_args - 1) { - mp_raise_IndexError("tuple index out of range"); + mp_raise_IndexError(translate("tuple index out of range")); } arg = args[(*arg_i) + 1]; (*arg_i)++; @@ -1154,7 +1192,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("invalid format specifier"); + mp_raise_ValueError(translate("invalid format specifier")); } } vstr_clear(&format_spec_vstr); @@ -1175,7 +1213,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("sign not allowed in string format specifier"); + mp_raise_ValueError(translate("sign not allowed in string format specifier")); } } if (type == 'c') { @@ -1183,7 +1221,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError( - "sign not allowed with integer format specifier 'c'"); + translate("sign not allowed with integer format specifier 'c'")); } } } @@ -1242,7 +1280,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - "unknown format code '%c' for object of type '%s'", + translate("unknown format code '%c' for object of type '%s'"), type, mp_obj_get_type_str(arg)); } } @@ -1314,7 +1352,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - "unknown format code '%c' for object of type 'float'", + translate("unknown format code '%c' for object of type '%s'"), type, mp_obj_get_type_str(arg)); } } @@ -1326,7 +1364,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError( - "'=' alignment not allowed in string format specifier"); + translate("'=' alignment not allowed in string format specifier")); } } @@ -1350,7 +1388,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - "unknown format code '%c' for object of type 'str'", + translate("unknown format code '%c' for object of type '%s'"), type, mp_obj_get_type_str(arg)); } } @@ -1398,7 +1436,7 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ // Dictionary value lookup if (*str == '(') { if (dict == MP_OBJ_NULL) { - mp_raise_TypeError("format requires a dict"); + mp_raise_TypeError(translate("format requires a dict")); } arg_i = 1; // we used up the single dict argument const byte *key = ++str; @@ -1407,12 +1445,12 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("incomplete format key"); + mp_raise_ValueError(translate("incomplete format key")); } } ++str; } - mp_obj_t k_obj = mp_obj_new_str((const char*)key, str - key, true); + mp_obj_t k_obj = mp_obj_new_str_via_qstr((const char*)key, str - key); arg = mp_obj_dict_get(dict, k_obj); str++; } @@ -1465,7 +1503,7 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { terse_str_format_value_error(); } else { - mp_raise_ValueError("incomplete format"); + mp_raise_ValueError(translate("incomplete format")); } } @@ -1473,7 +1511,7 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ if (arg == MP_OBJ_NULL) { if (arg_i >= n_args) { not_enough_args: - mp_raise_TypeError("not enough arguments for format string"); + mp_raise_TypeError(translate("not enough arguments for format string")); } arg = args[arg_i++]; } @@ -1483,14 +1521,14 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ size_t slen; const char *s = mp_obj_str_get_data(arg, &slen); if (slen != 1) { - mp_raise_TypeError("%%c requires int or char"); + mp_raise_TypeError(translate("%%c requires int or char")); } mp_print_strn(&print, s, 1, flags, ' ', width); } else if (arg_looks_integer(arg)) { char ch = mp_obj_get_int(arg); mp_print_strn(&print, &ch, 1, flags, ' ', width); } else { - mp_raise_TypeError("integer required"); + mp_raise_TypeError(translate("integer required")); } break; @@ -1553,14 +1591,14 @@ STATIC mp_obj_t str_modulo_format(mp_obj_t pattern, size_t n_args, const mp_obj_ terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - "unsupported format character '%c' (0x%x) at index %d", + translate("unsupported format character '%c' (0x%x) at index %d"), *str, *str, str - start_str); } } } if (arg_i != n_args) { - mp_raise_TypeError("not all arguments converted during string formatting"); + mp_raise_TypeError(translate("not all arguments converted during string formatting")); } return mp_obj_new_str_from_vstr(is_bytes ? &mp_type_bytes : &mp_type_str, &vstr); @@ -1697,7 +1735,7 @@ STATIC mp_obj_t str_count(size_t n_args, const mp_obj_t *args) { // if needle_len is zero then we count each gap between characters as an occurrence if (needle_len == 0) { - return MP_OBJ_NEW_SMALL_INT(unichar_charlen((const char*)start, end - start) + 1); + return MP_OBJ_NEW_SMALL_INT(utf8_charlen(start, end - start) + 1); } // count the occurrences @@ -1727,7 +1765,7 @@ STATIC mp_obj_t str_partitioner(mp_obj_t self_in, mp_obj_t arg, int direction) { GET_STR_DATA_LEN(arg, sep, sep_len); if (sep_len == 0) { - mp_raise_ValueError("empty separator"); + mp_raise_ValueError(translate("empty separator")); } mp_obj_t result[3]; @@ -1861,7 +1899,7 @@ STATIC mp_obj_t bytes_decode(size_t n_args, const mp_obj_t *args) { args = new_args; n_args++; } - return mp_obj_str_make_new(&mp_type_str, n_args, 0, args); + return mp_obj_str_make_new(&mp_type_str, n_args, args, NULL); } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bytes_decode_obj, 1, 3, bytes_decode); @@ -1874,7 +1912,7 @@ STATIC mp_obj_t str_encode(size_t n_args, const mp_obj_t *args) { args = new_args; n_args++; } - return bytes_make_new(NULL, n_args, 0, args); + return bytes_make_new(NULL, n_args, args, NULL); } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(str_encode_obj, 1, 3, str_encode); #endif @@ -1976,8 +2014,9 @@ const mp_obj_type_t mp_type_bytes = { const mp_obj_str_t mp_const_empty_bytes_obj = {{&mp_type_bytes}, 0, 0, (const byte*)""}; // Create a str/bytes object using the given data. New memory is allocated and -// the data is copied across. -mp_obj_t mp_obj_new_str_of_type(const mp_obj_type_t *type, const byte* data, size_t len) { +// the data is copied across. This function should only be used if the type is bytes, +// or if the type is str and the string data is known to be not interned. +mp_obj_t mp_obj_new_str_copy(const mp_obj_type_t *type, const byte* data, size_t len) { mp_obj_str_t *o = m_new_obj(mp_obj_str_t); o->base.type = type; o->len = len; @@ -1991,6 +2030,22 @@ mp_obj_t mp_obj_new_str_of_type(const mp_obj_type_t *type, const byte* data, siz return MP_OBJ_FROM_PTR(o); } +// Create a str/bytes object using the given data. If the type is str and the string +// data is already interned, then a qstr object is returned. Otherwise new memory is +// allocated for the object and the data is copied across. +mp_obj_t mp_obj_new_str_of_type(const mp_obj_type_t *type, const byte* data, size_t len) { + if (type == &mp_type_str) { + return mp_obj_new_str((const char*)data, len); + } else { + return mp_obj_new_bytes(data, len); + } +} + +// Create a str using a qstr to store the data; may use existing or new qstr. +mp_obj_t mp_obj_new_str_via_qstr(const char* data, size_t len) { + return MP_OBJ_NEW_QSTR(qstr_from_strn(data, len)); +} + // Create a str/bytes object from the given vstr. The vstr buffer is resized to // the exact length required and then reused for the str/bytes object. The vstr // is cleared and can safely be passed to vstr_free if it was heap allocated. @@ -2021,31 +2076,40 @@ mp_obj_t mp_obj_new_str_from_vstr(const mp_obj_type_t *type, vstr_t *vstr) { return MP_OBJ_FROM_PTR(o); } -mp_obj_t mp_obj_new_str(const char* data, size_t len, bool make_qstr_if_not_already) { - if (make_qstr_if_not_already) { - // use existing, or make a new qstr - return MP_OBJ_NEW_QSTR(qstr_from_strn(data, len)); +mp_obj_t mp_obj_new_str(const char* data, size_t len) { + qstr q = qstr_find_strn(data, len); + if (q != MP_QSTR_NULL) { + // qstr with this data already exists + return MP_OBJ_NEW_QSTR(q); } else { - qstr q = qstr_find_strn(data, len); - if (q != MP_QSTR_NULL) { - // qstr with this data already exists - return MP_OBJ_NEW_QSTR(q); - } else { - // no existing qstr, don't make one - return mp_obj_new_str_of_type(&mp_type_str, (const byte*)data, len); - } + // no existing qstr, don't make one + return mp_obj_new_str_copy(&mp_type_str, (const byte*)data, len); } } mp_obj_t mp_obj_str_intern(mp_obj_t str) { GET_STR_DATA_LEN(str, data, len); - return MP_OBJ_NEW_QSTR(qstr_from_strn((const char*)data, len)); + return mp_obj_new_str_via_qstr((const char*)data, len); +} + +mp_obj_t mp_obj_str_intern_checked(mp_obj_t obj) { + size_t len; + const char *data = mp_obj_str_get_data(obj, &len); + return mp_obj_new_str_via_qstr((const char*)data, len); } mp_obj_t mp_obj_new_bytes(const byte* data, size_t len) { - return mp_obj_new_str_of_type(&mp_type_bytes, data, len); + return mp_obj_new_str_copy(&mp_type_bytes, data, len); } +mp_obj_t mp_obj_new_bytes_of_zeros(size_t len) { + vstr_t vstr; + vstr_init_len(&vstr, len); + memset(vstr.buf, 0, len); + return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); +} + + bool mp_obj_str_equal(mp_obj_t s1, mp_obj_t s2) { if (MP_OBJ_IS_QSTR(s1) && MP_OBJ_IS_QSTR(s2)) { return s1 == s2; @@ -2065,13 +2129,13 @@ bool mp_obj_str_equal(mp_obj_t s1, mp_obj_t s2) { } } -STATIC void bad_implicit_conversion(mp_obj_t self_in) { +STATIC NORETURN void bad_implicit_conversion(mp_obj_t self_in) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("can't convert to str implicitly"); + mp_raise_TypeError(translate("can't convert to str implicitly")); } else { const qstr src_name = mp_obj_get_type(self_in)->name; nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, - "can't convert '%q' object to %q implicitly", + translate("can't convert '%q' object to %q implicitly"), src_name, src_name == MP_QSTR_str ? MP_QSTR_bytes : MP_QSTR_str)); } } @@ -2137,7 +2201,7 @@ STATIC mp_obj_t str_it_iternext(mp_obj_t self_in) { mp_obj_str8_it_t *self = MP_OBJ_TO_PTR(self_in); GET_STR_DATA_LEN(self->str, str, len); if (self->cur < len) { - mp_obj_t o_out = mp_obj_new_str((const char*)str + self->cur, 1, true); + mp_obj_t o_out = mp_obj_new_str_via_qstr((const char*)str + self->cur, 1); self->cur += 1; return o_out; } else { diff --git a/py/objstr.h b/py/objstr.h index 82501a763e2ec..61a11d0bd6fb3 100644 --- a/py/objstr.h +++ b/py/objstr.h @@ -61,19 +61,25 @@ const byte *mp_obj_str_get_data_no_check(mp_obj_t self_in, size_t *len); else { str_len = ((mp_obj_str_t*)MP_OBJ_TO_PTR(str_obj_in))->len; str_data = ((mp_obj_str_t*)MP_OBJ_TO_PTR(str_obj_in))->data; } #endif -mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args); +mp_obj_t mp_obj_str_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); void mp_str_print_json(const mp_print_t *print, const byte *str_data, size_t str_len); mp_obj_t mp_obj_str_format(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs); mp_obj_t mp_obj_str_split(size_t n_args, const mp_obj_t *args); +mp_obj_t mp_obj_new_str_copy(const mp_obj_type_t *type, const byte* data, size_t len); mp_obj_t mp_obj_new_str_of_type(const mp_obj_type_t *type, const byte* data, size_t len); mp_obj_t mp_obj_str_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in); mp_int_t mp_obj_str_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags); +size_t str_offset_to_index(const mp_obj_type_t *type, const byte *self_data, size_t self_len, + size_t offset); const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, size_t self_len, mp_obj_t index, bool is_slice); const byte *find_subbytes(const byte *haystack, size_t hlen, const byte *needle, size_t nlen, int direction); +const char nibble_to_hex_upper[16]; +const char nibble_to_hex_lower[16]; + MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(str_encode_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(str_find_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(str_rfind_obj); diff --git a/py/objstringio.c b/py/objstringio.c index 5c50aa31742ae..178e6446ccb8a 100644 --- a/py/objstringio.c +++ b/py/objstringio.c @@ -33,12 +33,14 @@ #include "py/runtime.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_IO #if MICROPY_CPYTHON_COMPAT STATIC void check_stringio_is_open(const mp_obj_stringio_t *o) { if (o->vstr == NULL) { - mp_raise_ValueError("I/O operation on closed file"); + mp_raise_ValueError(translate("I/O operation on closed file")); } } #else @@ -143,6 +145,17 @@ STATIC mp_uint_t stringio_ioctl(mp_obj_t o_in, mp_uint_t request, uintptr_t arg, } case MP_STREAM_FLUSH: return 0; + case MP_STREAM_CLOSE: + #if MICROPY_CPYTHON_COMPAT + vstr_free(o->vstr); + o->vstr = NULL; + #else + vstr_clear(o->vstr); + o->vstr->alloc = 0; + o->vstr->len = 0; + o->pos = 0; + #endif + return 0; default: *errcode = MP_EINVAL; return MP_STREAM_ERROR; @@ -159,24 +172,9 @@ STATIC mp_obj_t stringio_getvalue(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(stringio_getvalue_obj, stringio_getvalue); -STATIC mp_obj_t stringio_close(mp_obj_t self_in) { - mp_obj_stringio_t *self = MP_OBJ_TO_PTR(self_in); -#if MICROPY_CPYTHON_COMPAT - vstr_free(self->vstr); - self->vstr = NULL; -#else - vstr_clear(self->vstr); - self->vstr->alloc = 0; - self->vstr->len = 0; - self->pos = 0; -#endif - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(stringio_close_obj, stringio_close); - STATIC mp_obj_t stringio___exit__(size_t n_args, const mp_obj_t *args) { (void)n_args; - return stringio_close(args[0]); + return mp_stream_close(args[0]); } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stringio___exit___obj, 4, 4, stringio___exit__); @@ -188,8 +186,8 @@ STATIC mp_obj_stringio_t *stringio_new(const mp_obj_type_t *type) { return o; } -STATIC mp_obj_t stringio_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { - (void)n_kw; // TODO check n_kw==0 +STATIC mp_obj_t stringio_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + (void)kw_args; // TODO check kw_args->used == 0 mp_uint_t sz = 16; bool initdata = false; @@ -233,7 +231,7 @@ STATIC const mp_rom_map_elem_t stringio_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, { MP_ROM_QSTR(MP_QSTR_seek), MP_ROM_PTR(&mp_stream_seek_obj) }, { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&stringio_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, { MP_ROM_QSTR(MP_QSTR_getvalue), MP_ROM_PTR(&stringio_getvalue_obj) }, { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&mp_identity_obj) }, { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&stringio___exit___obj) }, @@ -242,6 +240,7 @@ STATIC const mp_rom_map_elem_t stringio_locals_dict_table[] = { STATIC MP_DEFINE_CONST_DICT(stringio_locals_dict, stringio_locals_dict_table); STATIC const mp_stream_p_t stringio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stringio_read, .write = stringio_write, .ioctl = stringio_ioctl, @@ -249,6 +248,7 @@ STATIC const mp_stream_p_t stringio_stream_p = { }; STATIC const mp_stream_p_t bytesio_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = stringio_read, .write = stringio_write, .ioctl = stringio_ioctl, diff --git a/py/objstrunicode.c b/py/objstrunicode.c index a243022a7292f..30000a51e775a 100644 --- a/py/objstrunicode.c +++ b/py/objstrunicode.c @@ -32,6 +32,8 @@ #include "py/objlist.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_STR_UNICODE STATIC mp_obj_t mp_obj_new_str_iterator(mp_obj_t str, mp_obj_iter_buf_t *iter_buf); @@ -104,12 +106,32 @@ STATIC mp_obj_t uni_unary_op(mp_unary_op_t op, mp_obj_t self_in) { case MP_UNARY_OP_BOOL: return mp_obj_new_bool(str_len != 0); case MP_UNARY_OP_LEN: - return MP_OBJ_NEW_SMALL_INT(unichar_charlen((const char *)str_data, str_len)); + return MP_OBJ_NEW_SMALL_INT(utf8_charlen(str_data, str_len)); default: return MP_OBJ_NULL; // op not supported } } +size_t str_offset_to_index(const mp_obj_type_t *type, const byte *self_data, size_t self_len, + size_t offset) { + if (offset > self_len) { + mp_raise_ValueError(translate("offset out of bounds")); + } + + if (type == &mp_type_bytes) { + return offset; + } + + size_t index_val = 0; + const byte *s = self_data; + for (size_t i = 0; i < offset; i++, s++) { + if (!UTF8_IS_CONT(*s)) { + ++index_val; + } + } + return index_val; +} + // Convert an index into a pointer to its lead byte. Out of bounds indexing will raise IndexError or // be capped to the first/last character of the string, depending on is_slice. const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, size_t self_len, @@ -129,7 +151,7 @@ const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, s if (MP_OBJ_IS_SMALL_INT(index)) { i = MP_OBJ_SMALL_INT_VALUE(index); } else if (!mp_obj_get_int_maybe(index, &i)) { - mp_raise_TypeError_varg("string indices must be integers, not %s", mp_obj_get_type_str(index)); + mp_raise_TypeError_varg(translate("string indices must be integers, not %s"), mp_obj_get_type_str(index)); } const byte *s, *top = self_data + self_len; if (i < 0) @@ -140,7 +162,7 @@ const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, s if (is_slice) { return self_data; } - mp_raise_IndexError("string index out of range"); + mp_raise_IndexError(translate("string index out of range")); } if (!UTF8_IS_CONT(*s)) { ++i; @@ -159,7 +181,7 @@ const byte *str_index_to_ptr(const mp_obj_type_t *type, const byte *self_data, s if (is_slice) { return top; } - mp_raise_IndexError("string index out of range"); + mp_raise_IndexError(translate("string index out of range")); } // Then check completion if (i-- == 0) { @@ -186,7 +208,7 @@ STATIC mp_obj_t str_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { mp_obj_t ostart, ostop, ostep; mp_obj_slice_get(index, &ostart, &ostop, &ostep); if (ostep != mp_const_none && ostep != MP_OBJ_NEW_SMALL_INT(1)) { - mp_raise_NotImplementedError("only slices with step=1 (aka None) are supported"); + mp_raise_NotImplementedError(translate("only slices with step=1 (aka None) are supported")); } const byte *pstart, *pstop; @@ -216,7 +238,7 @@ STATIC mp_obj_t str_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { ++len; } } - return mp_obj_new_str((const char*)s, len, true); // This will create a one-character string + return mp_obj_new_str_via_qstr((const char*)s, len); // This will create a one-character string } else { return MP_OBJ_NULL; // op not supported } @@ -291,7 +313,7 @@ STATIC mp_obj_t str_it_iternext(mp_obj_t self_in) { if (self->cur < len) { const byte *cur = str + self->cur; const byte *end = utf8_next_char(str + self->cur); - mp_obj_t o_out = mp_obj_new_str((const char*)cur, end - cur, true); + mp_obj_t o_out = mp_obj_new_str_via_qstr((const char*)cur, end - cur); self->cur += end - cur; return o_out; } else { diff --git a/py/objtuple.c b/py/objtuple.c index 34b7664ebb51d..0a2ed6f4c32e0 100644 --- a/py/objtuple.c +++ b/py/objtuple.c @@ -29,6 +29,9 @@ #include "py/objtuple.h" #include "py/runtime.h" +#include "py/objtype.h" + +#include "supervisor/shared/translate.h" /******************************************************************************/ /* tuple */ @@ -57,10 +60,10 @@ void mp_obj_tuple_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t } } -STATIC mp_obj_t mp_obj_tuple_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t mp_obj_tuple_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 0, 1, false); + mp_arg_check_num(n_args, kw_args, 0, 1, false); switch (n_args) { case 0: @@ -158,7 +161,8 @@ mp_obj_t mp_obj_tuple_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { if (n <= 0) { return mp_const_empty_tuple; } - mp_obj_tuple_t *s = MP_OBJ_TO_PTR(mp_obj_new_tuple(o->len * n, NULL)); + size_t new_len = mp_seq_multiply_len(o->len, n); + mp_obj_tuple_t *s = MP_OBJ_TO_PTR(mp_obj_new_tuple(new_len, NULL)); mp_seq_multiply(o->items, sizeof(*o->items), o->len, n, s->items); return MP_OBJ_FROM_PTR(s); } @@ -178,11 +182,16 @@ mp_obj_t mp_obj_tuple_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { if (value == MP_OBJ_SENTINEL) { // load mp_obj_tuple_t *self = MP_OBJ_TO_PTR(self_in); + // when called with a native type (eg namedtuple) using mp_obj_tuple_subscr, get the native self + if (self->base.type->subscr != &mp_obj_tuple_subscr) { + self = mp_instance_cast_to_native_base(self_in, &mp_type_tuple); + } + #if MICROPY_PY_BUILTINS_SLICE if (MP_OBJ_IS_TYPE(index, &mp_type_slice)) { mp_bound_slice_t slice; if (!mp_seq_get_fast_slice_indexes(self->len, index, &slice)) { - mp_raise_NotImplementedError("only slices with step=1 (aka None) are supported"); + mp_raise_NotImplementedError(translate("only slices with step=1 (aka None) are supported")); } mp_obj_tuple_t *res = MP_OBJ_TO_PTR(mp_obj_new_tuple(slice.stop - slice.start, NULL)); mp_seq_copy(res->items, self->items + slice.start, res->len, mp_obj_t); @@ -248,7 +257,8 @@ mp_obj_t mp_obj_new_tuple(size_t n, const mp_obj_t *items) { } void mp_obj_tuple_get(mp_obj_t self_in, size_t *len, mp_obj_t **items) { - assert(MP_OBJ_IS_TYPE(self_in, &mp_type_tuple)); + // type check is done on getiter method to allow tuple, namedtuple, attrtuple + mp_check_self(mp_obj_get_type(self_in)->getiter == mp_obj_tuple_getiter); mp_obj_tuple_t *self = MP_OBJ_TO_PTR(self_in); *len = self->len; *items = &self->items[0]; diff --git a/py/objtuple.h b/py/objtuple.h index bcf0c9ed4facd..7f20ab7b6f883 100644 --- a/py/objtuple.h +++ b/py/objtuple.h @@ -34,13 +34,6 @@ typedef struct _mp_obj_tuple_t { mp_obj_t items[]; } mp_obj_tuple_t; -// TODO(tannewt): Remove this when we no longer hard code the usb hid tuple. -typedef struct _mp_obj_tuple2_t { - mp_obj_base_t base; - size_t len; - mp_obj_t items[2]; -} mp_obj_tuple2_t; - typedef struct _mp_rom_obj_tuple_t { mp_obj_base_t base; size_t len; diff --git a/py/objtype.c b/py/objtype.c index 7262892bd8709..ad68b85d2aae8 100644 --- a/py/objtype.c +++ b/py/objtype.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2013-2018 Damien P. George * Copyright (c) 2014-2016 Paul Sokolovsky * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -34,6 +34,9 @@ #include "py/objtype.h" #include "py/runtime.h" +#include "supervisor/shared/stack.h" +#include "supervisor/shared/translate.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #define DEBUG_printf DEBUG_printf @@ -42,19 +45,17 @@ #define DEBUG_printf(...) (void)0 #endif -STATIC mp_obj_t static_class_method_make_new(const mp_obj_type_t *self_in, size_t n_args, size_t n_kw, const mp_obj_t *args); +#define ENABLE_SPECIAL_ACCESSORS \ + (MICROPY_PY_DESCRIPTORS || MICROPY_PY_DELATTR_SETATTR || MICROPY_PY_BUILTINS_PROPERTY) + +#define TYPE_FLAG_IS_SUBCLASSED (0x0001) +#define TYPE_FLAG_HAS_SPECIAL_ACCESSORS (0x0002) + +STATIC mp_obj_t static_class_method_make_new(const mp_obj_type_t *self_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); /******************************************************************************/ // instance object -STATIC mp_obj_t mp_obj_new_instance(const mp_obj_type_t *class, size_t subobjs) { - mp_obj_instance_t *o = m_new_obj_var(mp_obj_instance_t, mp_obj_t, subobjs); - o->base.type = class; - mp_map_init(&o->members, 0); - mp_seq_clear(o->subobj, 0, subobjs, sizeof(*o->subobj)); - return MP_OBJ_FROM_PTR(o); -} - STATIC int instance_count_native_bases(const mp_obj_type_t *type, const mp_obj_type_t **last_native_base) { int count = 0; for (;;) { @@ -68,6 +69,7 @@ STATIC int instance_count_native_bases(const mp_obj_type_t *type, const mp_obj_t } else if (type->parent == NULL) { // No parents so end search here. return count; + #if MICROPY_MULTIPLE_INHERITANCE } else if (((mp_obj_base_t*)type->parent)->type == &mp_type_tuple) { // Multiple parents, search through them all recursively. const mp_obj_tuple_t *parent_tuple = type->parent; @@ -79,6 +81,7 @@ STATIC int instance_count_native_bases(const mp_obj_type_t *type, const mp_obj_t count += instance_count_native_bases(bt, last_native_base); } return count; + #endif } else { // A single parent, use iteration to continue the search. type = type->parent; @@ -86,6 +89,45 @@ STATIC int instance_count_native_bases(const mp_obj_type_t *type, const mp_obj_t } } +// This wrapper function is allows a subclass of a native type to call the +// __init__() method (corresponding to type->make_new) of the native type. +STATIC mp_obj_t native_base_init_wrapper(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_obj_instance_t *self = MP_OBJ_TO_PTR(pos_args[0]); + const mp_obj_type_t *native_base = NULL; + instance_count_native_bases(self->base.type, &native_base); + self->subobj[0] = native_base->make_new(native_base, n_args - 1, pos_args + 1, kw_args); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(native_base_init_wrapper_obj, 1, native_base_init_wrapper); + +#if !MICROPY_CPYTHON_COMPAT +STATIC +#endif +mp_obj_instance_t *mp_obj_new_instance(const mp_obj_type_t *class, const mp_obj_type_t **native_base) { + size_t num_native_bases = instance_count_native_bases(class, native_base); + assert(num_native_bases < 2); + mp_obj_instance_t *o = m_new_obj_var(mp_obj_instance_t, mp_obj_t, num_native_bases); + o->base.type = class; + mp_map_init(&o->members, 0); + // Initialise the native base-class slot (should be 1 at most) with a valid + // object. It doesn't matter which object, so long as it can be uniquely + // distinguished from a native class that is initialised. + if (num_native_bases != 0) { + o->subobj[0] = MP_OBJ_FROM_PTR(&native_base_init_wrapper_obj); + } + return o; +} + +// When instances are first created they have the base_init wrapper as their native parent's +// instance because make_new combines __new__ and __init__. This object is invalid for the native +// code so it must call this method to ensure that the given object has been __init__'d and is +// valid. +void mp_obj_assert_native_inited(mp_obj_t native_object) { + if (native_object == MP_OBJ_FROM_PTR(&native_base_init_wrapper_obj)) { + mp_raise_NotImplementedError(translate("Call super().__init__() before accessing native object.")); + } +} + // TODO // This implements depth-first left-to-right MRO, which is not compliant with Python3 MRO // http://python-history.blogspot.com/2010/06/method-resolution-order.html @@ -140,16 +182,12 @@ STATIC void mp_obj_class_lookup(struct class_lookup_data *lookup, const mp_obj_ // do a lookup, not a (base) type in which we found the class method. const mp_obj_type_t *org_type = (const mp_obj_type_t*)lookup->obj; mp_convert_member_lookup(MP_OBJ_NULL, org_type, elem->value, lookup->dest); + } else if (MP_OBJ_IS_TYPE(elem->value, &mp_type_property)) { + lookup->dest[0] = elem->value; + return; } else { mp_obj_instance_t *obj = lookup->obj; - mp_obj_t obj_obj; - if (obj != NULL && mp_obj_is_native_type(type) && type != &mp_type_object /* object is not a real type */) { - // If we're dealing with native base class, then it applies to native sub-object - obj_obj = obj->subobj[0]; - } else { - obj_obj = MP_OBJ_FROM_PTR(obj); - } - mp_convert_member_lookup(obj_obj, type, elem->value, lookup->dest); + mp_convert_member_lookup(MP_OBJ_FROM_PTR(obj), type, elem->value, lookup->dest); } #if DEBUG_PRINT printf("mp_obj_class_lookup: Returning: "); @@ -176,6 +214,7 @@ STATIC void mp_obj_class_lookup(struct class_lookup_data *lookup, const mp_obj_ if (type->parent == NULL) { DEBUG_printf("mp_obj_class_lookup: No more parents\n"); return; + #if MICROPY_MULTIPLE_INHERITANCE } else if (((mp_obj_base_t*)type->parent)->type == &mp_type_tuple) { const mp_obj_tuple_t *parent_tuple = type->parent; const mp_obj_t *item = parent_tuple->items; @@ -196,6 +235,7 @@ STATIC void mp_obj_class_lookup(struct class_lookup_data *lookup, const mp_obj_ // search last base (simple tail recursion elimination) assert(MP_OBJ_IS_TYPE(*item, &mp_type_type)); type = (mp_obj_type_t*)MP_OBJ_TO_PTR(*item); + #endif } else { type = type->parent; } @@ -248,23 +288,9 @@ STATIC void instance_print(const mp_print_t *print, mp_obj_t self_in, mp_print_k mp_printf(print, "<%s object at %p>", mp_obj_get_type_str(self_in), self); } -mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self, size_t n_args, size_t n_kw, const mp_obj_t *args) { +mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { assert(mp_obj_is_instance_type(self)); - const mp_obj_type_t *native_base; - size_t num_native_bases = instance_count_native_bases(self, &native_base); - assert(num_native_bases < 2); - - mp_obj_instance_t *o = MP_OBJ_TO_PTR(mp_obj_new_instance(self, num_native_bases)); - - // This executes only "__new__" part of instance creation. - // TODO: This won't work well for classes with native bases. - // TODO: This is a hack, should be resolved along the lines of - // https://github.com/micropython/micropython/issues/606#issuecomment-43685883 - if (n_args == 1 && *args == MP_OBJ_SENTINEL) { - return MP_OBJ_FROM_PTR(o); - } - // look for __new__ function mp_obj_t init_fn[2] = {MP_OBJ_NULL}; struct class_lookup_data lookup = { @@ -276,35 +302,56 @@ mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self, size_t n_args, size }; mp_obj_class_lookup(&lookup, self); - mp_obj_t new_ret = MP_OBJ_FROM_PTR(o); - if (init_fn[0] == MP_OBJ_SENTINEL) { - // Native type's constructor is what wins - it gets all our arguments, - // and none Python classes are initialized at all. - o->subobj[0] = native_base->make_new(native_base, n_args, n_kw, args); - } else if (init_fn[0] != MP_OBJ_NULL) { - // now call Python class __new__ function with all args + const mp_obj_type_t *native_base = NULL; + mp_obj_instance_t *o; + size_t n_kw = 0; + if (kw_args != 0) { + n_kw = kw_args->used; + } + if (init_fn[0] == MP_OBJ_NULL || init_fn[0] == MP_OBJ_SENTINEL) { + // Either there is no __new__() method defined or there is a native + // constructor. In both cases create a blank instance. + o = mp_obj_new_instance(self, &native_base); + + // Since type->make_new() implements both __new__() and __init__() in + // one go, of which the latter may be overridden by the Python subclass, + // we defer (see the end of this function) the call of the native + // constructor to give a chance for the Python __init__() method to call + // said native constructor. + + } else { + // Call Python class __new__ function with all args to create an instance + mp_obj_t new_ret; if (n_args == 0 && n_kw == 0) { mp_obj_t args2[1] = {MP_OBJ_FROM_PTR(self)}; new_ret = mp_call_function_n_kw(init_fn[0], 1, 0, args2); } else { + // TODO(tannewt): Could this be on the stack? It's deleted below. mp_obj_t *args2 = m_new(mp_obj_t, 1 + n_args + 2 * n_kw); args2[0] = MP_OBJ_FROM_PTR(self); - memcpy(args2 + 1, args, (n_args + 2 * n_kw) * sizeof(mp_obj_t)); + memcpy(args2 + 1, args, n_args * sizeof(mp_obj_t)); + if (kw_args) { + // copy in kwargs + memcpy(args2 + 1 + n_args, kw_args->table, 2 * n_kw * sizeof(mp_obj_t)); + } new_ret = mp_call_function_n_kw(init_fn[0], n_args + 1, n_kw, args2); m_del(mp_obj_t, args2, 1 + n_args + 2 * n_kw); } - } + // https://docs.python.org/3.4/reference/datamodel.html#object.__new__ + // "If __new__() does not return an instance of cls, then the new + // instance's __init__() method will not be invoked." + if (mp_obj_get_type(new_ret) != self) { + return new_ret; + } - // https://docs.python.org/3.4/reference/datamodel.html#object.__new__ - // "If __new__() does not return an instance of cls, then the new instance's __init__() method will not be invoked." - if (mp_obj_get_type(new_ret) != self) { - return new_ret; + // The instance returned by __new__() becomes the new object + o = MP_OBJ_TO_PTR(new_ret); } - o = MP_OBJ_TO_PTR(new_ret); - // now call Python class __init__ function with all args + // This method has a chance to call super().__init__() to construct a + // possible native base class. init_fn[0] = init_fn[1] = MP_OBJ_NULL; lookup.obj = o; lookup.attr = MP_QSTR___init__; @@ -312,27 +359,36 @@ mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self, size_t n_args, size mp_obj_class_lookup(&lookup, self); if (init_fn[0] != MP_OBJ_NULL) { mp_obj_t init_ret; - if (n_args == 0 && n_kw == 0) { + if (n_args == 0 && kw_args == NULL) { init_ret = mp_call_method_n_kw(0, 0, init_fn); } else { + // TODO(tannewt): Could this be on the stack? It's deleted below. mp_obj_t *args2 = m_new(mp_obj_t, 2 + n_args + 2 * n_kw); args2[0] = init_fn[0]; args2[1] = init_fn[1]; - memcpy(args2 + 2, args, (n_args + 2 * n_kw) * sizeof(mp_obj_t)); + // copy in kwargs + memcpy(args2 + 2, args, n_args * sizeof(mp_obj_t)); + memcpy(args2 + 2 + n_args, kw_args->table, 2 * n_kw * sizeof(mp_obj_t)); init_ret = mp_call_method_n_kw(n_args, n_kw, args2); m_del(mp_obj_t, args2, 2 + n_args + 2 * n_kw); } if (init_ret != mp_const_none) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("__init__() should return None"); + mp_raise_TypeError(translate("__init__() should return None")); } else { - mp_raise_TypeError_varg("__init__() should return None, not '%s'", + mp_raise_TypeError_varg(translate("__init__() should return None, not '%s'"), mp_obj_get_type_str(init_ret)); } } } + // If the type had a native base that was not explicitly initialised + // (constructed) by the Python __init__() method then construct it now. + if (native_base != NULL && o->subobj[0] == MP_OBJ_FROM_PTR(&native_base_init_wrapper_obj)) { + o->subobj[0] = native_base->make_new(native_base, n_args, args, kw_args); + } + return MP_OBJ_FROM_PTR(o); } @@ -424,7 +480,7 @@ const byte mp_binary_op_method_name[MP_BINARY_OP_NUM_RUNTIME] = { [MP_BINARY_OP_LESS_EQUAL] = MP_QSTR___le__, [MP_BINARY_OP_MORE_EQUAL] = MP_QSTR___ge__, // MP_BINARY_OP_NOT_EQUAL, // a != b calls a == b and inverts result - [MP_BINARY_OP_IN] = MP_QSTR___contains__, + [MP_BINARY_OP_CONTAINS] = MP_QSTR___contains__, // All inplace methods are optional, and normal methods will be used // as a fallback. @@ -537,7 +593,6 @@ STATIC void mp_obj_instance_load_attr(mp_obj_t self_in, qstr attr, mp_obj_t *des mp_map_elem_t *elem = mp_map_lookup(&self->members, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP); if (elem != NULL) { // object member, always treated as a value - // TODO should we check for properties? dest[0] = elem->value; return; } @@ -568,6 +623,11 @@ STATIC void mp_obj_instance_load_attr(mp_obj_t self_in, qstr attr, mp_obj_t *des mp_obj_t member = dest[0]; if (member != MP_OBJ_NULL) { // changes here may may require changes to super_attr, below + if (!(self->base.type->flags & TYPE_FLAG_HAS_SPECIAL_ACCESSORS)) { + // Class doesn't have any special accessors to check so return straightaway + return; + } + #if MICROPY_PY_BUILTINS_PROPERTY if (MP_OBJ_IS_TYPE(member, &mp_type_property)) { // object member is a property; delegate the load to the property @@ -579,7 +639,7 @@ STATIC void mp_obj_instance_load_attr(mp_obj_t self_in, qstr attr, mp_obj_t *des // the code. const mp_obj_t *proxy = mp_obj_property_get(member); if (proxy[0] == mp_const_none) { - mp_raise_AttributeError("unreadable attribute"); + mp_raise_AttributeError(translate("unreadable attribute")); } else { dest[0] = mp_call_function_n_kw(proxy[0], 1, 0, &self_in); } @@ -629,11 +689,15 @@ STATIC void mp_obj_instance_load_attr(mp_obj_t self_in, qstr attr, mp_obj_t *des STATIC bool mp_obj_instance_store_attr(mp_obj_t self_in, qstr attr, mp_obj_t value) { mp_obj_instance_t *self = MP_OBJ_TO_PTR(self_in); + if (!(self->base.type->flags & TYPE_FLAG_HAS_SPECIAL_ACCESSORS)) { + // Class doesn't have any special accessors so skip their checks + goto skip_special_accessors; + } + #if MICROPY_PY_BUILTINS_PROPERTY || MICROPY_PY_DESCRIPTORS // With property and/or descriptors enabled we need to do a lookup // first in the class dict for the attribute to see if the store should // be delegated. - // Note: this makes all stores slow... how to fix? mp_obj_t member[2] = {MP_OBJ_NULL}; struct class_lookup_data lookup = { .obj = self, @@ -705,9 +769,9 @@ STATIC bool mp_obj_instance_store_attr(mp_obj_t self_in, qstr attr, mp_obj_t val } #endif + #if MICROPY_PY_DELATTR_SETATTR if (value == MP_OBJ_NULL) { // delete attribute - #if MICROPY_PY_DELATTR_SETATTR // try __delattr__ first mp_obj_t attr_delattr_method[3]; mp_load_method_maybe(self_in, MP_QSTR___delattr__, attr_delattr_method); @@ -717,13 +781,8 @@ STATIC bool mp_obj_instance_store_attr(mp_obj_t self_in, qstr attr, mp_obj_t val mp_call_method_n_kw(1, 0, attr_delattr_method); return true; } - #endif - - mp_map_elem_t *elem = mp_map_lookup(&self->members, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP_REMOVE_IF_FOUND); - return elem != NULL; } else { // store attribute - #if MICROPY_PY_DELATTR_SETATTR // try __setattr__ first mp_obj_t attr_setattr_method[4]; mp_load_method_maybe(self_in, MP_QSTR___setattr__, attr_setattr_method); @@ -734,14 +793,23 @@ STATIC bool mp_obj_instance_store_attr(mp_obj_t self_in, qstr attr, mp_obj_t val mp_call_method_n_kw(2, 0, attr_setattr_method); return true; } - #endif + } + #endif +skip_special_accessors: + + if (value == MP_OBJ_NULL) { + // delete attribute + mp_map_elem_t *elem = mp_map_lookup(&self->members, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP_REMOVE_IF_FOUND); + return elem != NULL; + } else { + // store attribute mp_map_lookup(&self->members, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP_ADD_IF_NOT_FOUND)->value = value; return true; } } -void mp_obj_instance_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { +STATIC void mp_obj_instance_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { if (dest[0] == MP_OBJ_NULL) { mp_obj_instance_load_attr(self_in, attr, dest); } else { @@ -777,8 +845,13 @@ STATIC mp_obj_t instance_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value mp_obj_class_lookup(&lookup, self->base.type); meth_args = 3; } - if (member[0] == MP_OBJ_SENTINEL) { - return mp_obj_subscr(self->subobj[0], index, value); + if (member[0] == MP_OBJ_SENTINEL) { // native base subscr exists + mp_obj_type_t *subobj_type = mp_obj_get_type(self->subobj[0]); + // return mp_obj_subscr(self->subobj[0], index, value, instance); + mp_obj_t ret = subobj_type->subscr(self_in, index, value); + // May have called port specific C code. Make sure it didn't mess up the heap. + assert_heap_ok(); + return ret; } else if (member[0] != MP_OBJ_NULL) { mp_obj_t args[3] = {self_in, index, value}; // TODO probably need to call mp_convert_member_lookup, and use mp_call_method_n_kw @@ -816,9 +889,9 @@ mp_obj_t mp_obj_instance_call(mp_obj_t self_in, size_t n_args, size_t n_kw, cons mp_obj_t call = mp_obj_instance_get_call(self_in, member); if (call == MP_OBJ_NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not callable"); + mp_raise_TypeError(translate("object not callable")); } else { - mp_raise_TypeError_varg("'%s' object is not callable", + mp_raise_TypeError_varg(translate("'%s' object is not callable"), mp_obj_get_type_str(self_in)); } } @@ -876,16 +949,59 @@ STATIC mp_int_t instance_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, // - there is a constant mp_obj_type_t (called mp_type_type) for the 'type' object // - creating a new class (a new type) creates a new mp_obj_type_t +#if ENABLE_SPECIAL_ACCESSORS +STATIC bool check_for_special_accessors(mp_obj_t key, mp_obj_t value) { + #if MICROPY_PY_DELATTR_SETATTR + if (key == MP_OBJ_NEW_QSTR(MP_QSTR___setattr__) || key == MP_OBJ_NEW_QSTR(MP_QSTR___delattr__)) { + return true; + } + #endif + #if MICROPY_PY_BUILTINS_PROPERTY + if (MP_OBJ_IS_TYPE(value, &mp_type_property)) { + return true; + } + #endif + #if MICROPY_PY_DESCRIPTORS + static const uint8_t to_check[] = { + MP_QSTR___get__, MP_QSTR___set__, MP_QSTR___delete__, + }; + for (size_t i = 0; i < MP_ARRAY_SIZE(to_check); ++i) { + mp_obj_t dest_temp[2]; + mp_load_method_protected(value, to_check[i], dest_temp, true); + if (dest_temp[0] != MP_OBJ_NULL) { + return true; + } + } + #endif + return false; +} + +STATIC bool map_has_special_accessors(const mp_map_t *map) { + if (map == NULL) { + return false; + } + for (size_t i = 0; i < map->alloc; i++) { + if (MP_MAP_SLOT_IS_FILLED(map, i)) { + const mp_map_elem_t *elem = &map->table[i]; + if (check_for_special_accessors(elem->key, elem->value)) { + return true; + } + } + } + return false; +} +#endif + STATIC void type_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { (void)kind; mp_obj_type_t *self = MP_OBJ_TO_PTR(self_in); mp_printf(print, "", self->name); } -STATIC mp_obj_t type_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t type_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; - mp_arg_check_num(n_args, n_kw, 1, 3, false); + mp_arg_check_num(n_args, kw_args, 1, 3, false); switch (n_args) { case 1: @@ -898,7 +1014,7 @@ STATIC mp_obj_t type_make_new(const mp_obj_type_t *type_in, size_t n_args, size_ return mp_obj_new_type(mp_obj_str_get_qstr(args[0]), args[1], args[2]); default: - mp_raise_TypeError("type takes 1 or 3 arguments"); + mp_raise_TypeError(translate("type takes 1 or 3 arguments")); } } @@ -909,14 +1025,16 @@ STATIC mp_obj_t type_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp if (self->make_new == NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("cannot create instance"); + mp_raise_TypeError(translate("cannot create instance")); } else { - mp_raise_TypeError_varg("cannot create '%q' instances", self->name); + mp_raise_TypeError_varg(translate("cannot create '%q' instances"), self->name); } } - // make new instance - mp_obj_t o = self->make_new(self, n_args, n_kw, args); + // create a map directly from the given args array and make a new instance + mp_map_t kw_args; + mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); + mp_obj_t o = self->make_new(self, n_args, args, &kw_args); // return new instance return o; @@ -950,21 +1068,34 @@ STATIC void type_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { if (self->locals_dict != NULL) { assert(self->locals_dict->base.type == &mp_type_dict); // MicroPython restriction, for now mp_map_t *locals_map = &self->locals_dict->map; + if (locals_map->is_fixed) { + // can't apply delete/store to a fixed map + return; + } if (dest[1] == MP_OBJ_NULL) { // delete attribute mp_map_elem_t *elem = mp_map_lookup(locals_map, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP_REMOVE_IF_FOUND); - // note that locals_map may be in ROM, so remove will fail in that case if (elem != NULL) { dest[0] = MP_OBJ_NULL; // indicate success } } else { + #if ENABLE_SPECIAL_ACCESSORS + // Check if we add any special accessor methods with this store + if (!(self->flags & TYPE_FLAG_HAS_SPECIAL_ACCESSORS)) { + if (check_for_special_accessors(MP_OBJ_NEW_QSTR(attr), dest[1])) { + if (self->flags & TYPE_FLAG_IS_SUBCLASSED) { + // This class is already subclassed so can't have special accessors added + mp_raise_msg(&mp_type_AttributeError, translate("can't add special method to already-subclassed class")); + } + self->flags |= TYPE_FLAG_HAS_SPECIAL_ACCESSORS; + } + } + #endif + // store attribute mp_map_elem_t *elem = mp_map_lookup(locals_map, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP_ADD_IF_NOT_FOUND); - // note that locals_map may be in ROM, so add will fail in that case - if (elem != NULL) { - elem->value = make_obj_long_lived(dest[1], 10); - dest[0] = MP_OBJ_NULL; // indicate success - } + elem->value = dest[1]; + dest[0] = MP_OBJ_NULL; // indicate success } } } @@ -981,31 +1112,46 @@ const mp_obj_type_t mp_type_type = { }; mp_obj_t mp_obj_new_type(qstr name, mp_obj_t bases_tuple, mp_obj_t locals_dict) { - assert(MP_OBJ_IS_TYPE(bases_tuple, &mp_type_tuple)); // MicroPython restriction, for now - assert(MP_OBJ_IS_TYPE(locals_dict, &mp_type_dict)); // MicroPython restriction, for now + // Verify input objects have expected type + if (!MP_OBJ_IS_TYPE(bases_tuple, &mp_type_tuple)) { + mp_raise_TypeError(NULL); + } + if (!MP_OBJ_IS_TYPE(locals_dict, &mp_type_dict)) { + mp_raise_TypeError(NULL); + } // TODO might need to make a copy of locals_dict; at least that's how CPython does it // Basic validation of base classes - size_t len; - mp_obj_t *items; - mp_obj_tuple_get(bases_tuple, &len, &items); - for (size_t i = 0; i < len; i++) { - assert(MP_OBJ_IS_TYPE(items[i], &mp_type_type)); - mp_obj_type_t *t = MP_OBJ_TO_PTR(items[i]); + uint16_t base_flags = 0; + size_t bases_len; + mp_obj_t *bases_items; + mp_obj_tuple_get(bases_tuple, &bases_len, &bases_items); + for (size_t i = 0; i < bases_len; i++) { + if (!MP_OBJ_IS_TYPE(bases_items[i], &mp_type_type)) { + mp_raise_TypeError(translate("type is not an acceptable base type")); + } + mp_obj_type_t *t = MP_OBJ_TO_PTR(bases_items[i]); // TODO: Verify with CPy, tested on function type if (t->make_new == NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("type is not an acceptable base type"); + mp_raise_TypeError(translate("type is not an acceptable base type")); } else { mp_raise_TypeError_varg( - "type '%q' is not an acceptable base type", t->name); + translate("type '%q' is not an acceptable base type"), t->name); } } + #if ENABLE_SPECIAL_ACCESSORS + if (mp_obj_is_instance_type(t)) { + t->flags |= TYPE_FLAG_IS_SUBCLASSED; + base_flags |= t->flags & TYPE_FLAG_HAS_SPECIAL_ACCESSORS; + } + #endif } mp_obj_type_t *o = m_new0_ll(mp_obj_type_t, 1); o->base.type = &mp_type_type; + o->flags = base_flags; o->name = name; o->print = instance_print; o->make_new = mp_obj_instance_make_new; @@ -1018,35 +1164,51 @@ mp_obj_t mp_obj_new_type(qstr name, mp_obj_t bases_tuple, mp_obj_t locals_dict) //o->iternext = ; not implemented o->buffer_p.get_buffer = instance_get_buffer; - if (len > 0) { + if (bases_len > 0) { // Inherit protocol from a base class. This allows to define an // abstract base class which would translate C-level protocol to // Python method calls, and any subclass inheriting from it will // support this feature. - o->protocol = ((mp_obj_type_t*)MP_OBJ_TO_PTR(items[0]))->protocol; + o->protocol = ((mp_obj_type_t*)MP_OBJ_TO_PTR(bases_items[0]))->protocol; - if (len >= 2) { + if (bases_len >= 2) { + #if MICROPY_MULTIPLE_INHERITANCE o->parent = MP_OBJ_TO_PTR(bases_tuple); + #else + mp_raise_NotImplementedError(translate("multiple inheritance not supported")); + #endif } else { - o->parent = MP_OBJ_TO_PTR(items[0]); + o->parent = MP_OBJ_TO_PTR(bases_items[0]); } } o->locals_dict = make_dict_long_lived(locals_dict, 10); + const mp_obj_type_t *native_base; size_t num_native_bases = instance_count_native_bases(o, &native_base); if (num_native_bases > 1) { - mp_raise_TypeError("multiple bases have instance lay-out conflict"); + mp_raise_TypeError(translate("multiple bases have instance lay-out conflict")); } mp_map_t *locals_map = &o->locals_dict->map; + #if ENABLE_SPECIAL_ACCESSORS + // Check if the class has any special accessor methods + if (!(o->flags & TYPE_FLAG_HAS_SPECIAL_ACCESSORS) && + (map_has_special_accessors(locals_map) || + (num_native_bases == 1 && + native_base->locals_dict != NULL && + map_has_special_accessors(&native_base->locals_dict->map)))) { + o->flags |= TYPE_FLAG_HAS_SPECIAL_ACCESSORS; + } + #endif + mp_map_elem_t *elem = mp_map_lookup(locals_map, MP_OBJ_NEW_QSTR(MP_QSTR___new__), MP_MAP_LOOKUP); if (elem != NULL) { // __new__ slot exists; check if it is a function if (MP_OBJ_IS_FUN(elem->value)) { // __new__ is a function, wrap it in a staticmethod decorator - elem->value = static_class_method_make_new(&mp_type_staticmethod, 1, 0, &elem->value); + elem->value = static_class_method_make_new(&mp_type_staticmethod, 1, &elem->value, NULL); } } @@ -1072,11 +1234,14 @@ STATIC void super_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind mp_print_str(print, ">"); } -STATIC mp_obj_t super_make_new(const mp_obj_type_t *type_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t super_make_new(const mp_obj_type_t *type_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { (void)type_in; // 0 arguments are turned into 2 in the compiler // 1 argument is not yet implemented - mp_arg_check_num(n_args, n_kw, 2, 2, false); + mp_arg_check_num(n_args, kw_args, 2, 2, false); + if(!MP_OBJ_IS_TYPE(args[0], &mp_type_type)) { + mp_raise_TypeError(translate("first argument to super() must be type")); + } mp_obj_super_t *o = m_new_obj(mp_obj_super_t); *o = (mp_obj_super_t){{type_in}, args[0], args[1]}; return MP_OBJ_FROM_PTR(o); @@ -1103,49 +1268,71 @@ STATIC void super_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { .is_type = false, }; + // Allow a call super().__init__() to reach any native base classes + if (attr == MP_QSTR___init__) { + lookup.meth_offset = offsetof(mp_obj_type_t, make_new); + } + if (type->parent == NULL) { // no parents, do nothing + #if MICROPY_MULTIPLE_INHERITANCE } else if (((mp_obj_base_t*)type->parent)->type == &mp_type_tuple) { const mp_obj_tuple_t *parent_tuple = type->parent; size_t len = parent_tuple->len; const mp_obj_t *items = parent_tuple->items; for (size_t i = 0; i < len; i++) { assert(MP_OBJ_IS_TYPE(items[i], &mp_type_type)); + if (MP_OBJ_TO_PTR(items[i]) == &mp_type_object) { + // The "object" type will be searched at the end of this function, + // and we don't want to lookup native methods in object. + continue; + } mp_obj_class_lookup(&lookup, (mp_obj_type_t*)MP_OBJ_TO_PTR(items[i])); if (dest[0] != MP_OBJ_NULL) { break; } } - } else { + #endif + } else if (type->parent != &mp_type_object) { mp_obj_class_lookup(&lookup, type->parent); } if (dest[0] != MP_OBJ_NULL) { - mp_obj_t member = dest[0]; - // changes to mp_obj_instance_load_attr may require changes - // here... - #if MICROPY_PY_BUILTINS_PROPERTY - if (MP_OBJ_IS_TYPE(member, &mp_type_property)) { - const mp_obj_t *proxy = mp_obj_property_get(member); - if (proxy[0] == mp_const_none) { - mp_raise_AttributeError("unreadable attribute"); - } else { - dest[0] = mp_call_function_n_kw(proxy[0], 1, 0, &self_in); + if (dest[0] == MP_OBJ_SENTINEL) { + // Looked up native __init__ so defer to it + dest[0] = MP_OBJ_FROM_PTR(&native_base_init_wrapper_obj); + dest[1] = self->obj; + } else { + mp_obj_t member = dest[0]; + // changes to mp_obj_instance_load_attr may require changes + // here... + #if MICROPY_PY_BUILTINS_PROPERTY + if (MP_OBJ_IS_TYPE(member, &mp_type_property)) { + const mp_obj_t *proxy = mp_obj_property_get(member); + if (proxy[0] == mp_const_none) { + mp_raise_AttributeError(translate("unreadable attribute")); + } else { + dest[0] = mp_call_function_n_kw(proxy[0], 1, 0, &self_in); + } } + #endif + #if MICROPY_PY_DESCRIPTORS + mp_obj_t attr_get_method[4]; + mp_load_method_maybe(member, MP_QSTR___get__, attr_get_method); + if (attr_get_method[0] != MP_OBJ_NULL) { + attr_get_method[2] = self_in; + attr_get_method[3] = MP_OBJ_FROM_PTR(mp_obj_get_type(self_in)); + dest[0] = mp_call_method_n_kw(2, 0, attr_get_method); + } + #endif } - #endif - #if MICROPY_PY_DESCRIPTORS - mp_obj_t attr_get_method[4]; - mp_load_method_maybe(member, MP_QSTR___get__, attr_get_method); - if (attr_get_method[0] != MP_OBJ_NULL) { - attr_get_method[2] = self_in; - attr_get_method[3] = MP_OBJ_FROM_PTR(mp_obj_get_type(self_in)); - dest[0] = mp_call_method_n_kw(2, 0, attr_get_method); - } - #endif return; } + // Reset meth_offset so we don't look up any native methods in object, + // because object never takes up the native base-class slot. + lookup.meth_offset = 0; + mp_obj_class_lookup(&lookup, &mp_type_object); } @@ -1185,6 +1372,7 @@ bool mp_obj_is_subclass_fast(mp_const_obj_t object, mp_const_obj_t classinfo) { if (self->parent == NULL) { // type has no parents return false; + #if MICROPY_MULTIPLE_INHERITANCE } else if (((mp_obj_base_t*)self->parent)->type == &mp_type_tuple) { // get the base objects (they should be type objects) const mp_obj_tuple_t *parent_tuple = self->parent; @@ -1200,6 +1388,7 @@ bool mp_obj_is_subclass_fast(mp_const_obj_t object, mp_const_obj_t classinfo) { // search last base (simple tail recursion elimination) object = *item; + #endif } else { // type has 1 parent object = MP_OBJ_FROM_PTR(self->parent); @@ -1216,7 +1405,7 @@ STATIC mp_obj_t mp_obj_is_subclass(mp_obj_t object, mp_obj_t classinfo) { } else if (MP_OBJ_IS_TYPE(classinfo, &mp_type_tuple)) { mp_obj_tuple_get(classinfo, &len, &items); } else { - mp_raise_TypeError("issubclass() arg 2 must be a class or a tuple of classes"); + mp_raise_TypeError(translate("issubclass() arg 2 must be a class or a tuple of classes")); } for (size_t i = 0; i < len; i++) { @@ -1230,7 +1419,7 @@ STATIC mp_obj_t mp_obj_is_subclass(mp_obj_t object, mp_obj_t classinfo) { STATIC mp_obj_t mp_builtin_issubclass(mp_obj_t object, mp_obj_t classinfo) { if (!MP_OBJ_IS_TYPE(object, &mp_type_type)) { - mp_raise_TypeError("issubclass() arg 1 must be a class"); + mp_raise_TypeError(translate("issubclass() arg 1 must be a class")); } return mp_obj_is_subclass(object, classinfo); } @@ -1243,11 +1432,14 @@ STATIC mp_obj_t mp_builtin_isinstance(mp_obj_t object, mp_obj_t classinfo) { MP_DEFINE_CONST_FUN_OBJ_2(mp_builtin_isinstance_obj, mp_builtin_isinstance); -mp_obj_t mp_instance_cast_to_native_base(mp_const_obj_t self_in, mp_const_obj_t native_type) { +mp_obj_t mp_instance_cast_to_native_base(mp_obj_t self_in, mp_const_obj_t native_type) { mp_obj_type_t *self_type = mp_obj_get_type(self_in); if (!mp_obj_is_subclass_fast(MP_OBJ_FROM_PTR(self_type), native_type)) { return MP_OBJ_NULL; } + if (MP_OBJ_FROM_PTR(self_type) == native_type) { + return self_in; + } mp_obj_instance_t *self = (mp_obj_instance_t*)MP_OBJ_TO_PTR(self_in); return self->subobj[0]; } @@ -1255,10 +1447,10 @@ mp_obj_t mp_instance_cast_to_native_base(mp_const_obj_t self_in, mp_const_obj_t /******************************************************************************/ // staticmethod and classmethod types (probably should go in a different file) -STATIC mp_obj_t static_class_method_make_new(const mp_obj_type_t *self, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t static_class_method_make_new(const mp_obj_type_t *self, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { assert(self == &mp_type_staticmethod || self == &mp_type_classmethod); - mp_arg_check_num(n_args, n_kw, 1, 1, false); + mp_arg_check_num(n_args, kw_args, 1, 1, false); mp_obj_static_class_method_t *o = m_new_obj(mp_obj_static_class_method_t); *o = (mp_obj_static_class_method_t){{self}, args[0]}; diff --git a/py/objtype.h b/py/objtype.h index 52419f3cdc8cc..a32c8749673bd 100644 --- a/py/objtype.h +++ b/py/objtype.h @@ -37,8 +37,12 @@ typedef struct _mp_obj_instance_t { // TODO maybe cache __getattr__ and __setattr__ for efficient lookup of them } mp_obj_instance_t; -// this needs to be exposed for MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE to work -void mp_obj_instance_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest); +void mp_obj_assert_native_inited(mp_obj_t native_object); + +#if MICROPY_CPYTHON_COMPAT +// this is needed for object.__new__ +mp_obj_instance_t *mp_obj_new_instance(const mp_obj_type_t *cls, const mp_obj_type_t **native_base); +#endif // these need to be exposed so mp_obj_is_callable can work correctly bool mp_obj_instance_is_callable(mp_obj_t self_in); @@ -47,6 +51,6 @@ mp_obj_t mp_obj_instance_call(mp_obj_t self_in, size_t n_args, size_t n_kw, cons #define mp_obj_is_instance_type(type) ((type)->make_new == mp_obj_instance_make_new) #define mp_obj_is_native_type(type) ((type)->make_new != mp_obj_instance_make_new) // this needs to be exposed for the above macros to work correctly -mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self_in, size_t n_args, size_t n_kw, const mp_obj_t *args); +mp_obj_t mp_obj_instance_make_new(const mp_obj_type_t *self_in, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args); #endif // MICROPY_INCLUDED_PY_OBJTYPE_H diff --git a/py/objzip.c b/py/objzip.c index 0183925e3c523..ce9afd55dec44 100644 --- a/py/objzip.c +++ b/py/objzip.c @@ -36,8 +36,8 @@ typedef struct _mp_obj_zip_t { mp_obj_t iters[]; } mp_obj_zip_t; -STATIC mp_obj_t zip_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, false); +STATIC mp_obj_t zip_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, MP_OBJ_FUN_ARGS_MAX, false); mp_obj_zip_t *o = m_new_obj_var(mp_obj_zip_t, mp_obj_t, n_args); o->base.type = type; diff --git a/py/opmethods.c b/py/opmethods.c index 1200ba39efdf9..247fa5bbc8f8b 100644 --- a/py/opmethods.c +++ b/py/opmethods.c @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -#include "py/runtime0.h" +#include "py/obj.h" #include "py/builtin.h" STATIC mp_obj_t op_getitem(mp_obj_t self_in, mp_obj_t key_in) { @@ -47,6 +47,6 @@ MP_DEFINE_CONST_FUN_OBJ_2(mp_op_delitem_obj, op_delitem); STATIC mp_obj_t op_contains(mp_obj_t lhs_in, mp_obj_t rhs_in) { mp_obj_type_t *type = mp_obj_get_type(lhs_in); - return type->binary_op(MP_BINARY_OP_IN, lhs_in, rhs_in); + return type->binary_op(MP_BINARY_OP_CONTAINS, lhs_in, rhs_in); } MP_DEFINE_CONST_FUN_OBJ_2(mp_op_contains_obj, op_contains); diff --git a/py/parse.c b/py/parse.c index 08a4034012f0f..b8cfda2cb5b24 100644 --- a/py/parse.c +++ b/py/parse.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013-2015 Damien P. George + * Copyright (c) 2013-2017 Damien P. George * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -39,6 +39,8 @@ #include "py/objstr.h" #include "py/builtin.h" +#include "supervisor/shared/translate.h" + #if MICROPY_ENABLE_COMPILER #define RULE_ACT_ARG_MASK (0x0f) @@ -58,15 +60,6 @@ // (un)comment to use rule names; for debugging //#define USE_RULE_NAME (1) -typedef struct _rule_t { - byte rule_id; - byte act; -#ifdef USE_RULE_NAME - const char *rule_name; -#endif - uint16_t arg[]; -} rule_t; - enum { // define rules with a compile function #define DEF_RULE(rule, comp, kind, ...) RULE_##rule, @@ -84,6 +77,8 @@ enum { #undef DEF_RULE_NC }; +// Define an array of actions corresponding to each rule +STATIC const uint8_t rule_act_table[] = { #define or(n) (RULE_ACT_OR | n) #define and(n) (RULE_ACT_AND | n) #define and_ident(n) (RULE_ACT_AND | n | RULE_ACT_ALLOW_IDENT) @@ -91,44 +86,128 @@ enum { #define one_or_more (RULE_ACT_LIST | 2) #define list (RULE_ACT_LIST | 1) #define list_with_end (RULE_ACT_LIST | 3) -#define tok(t) (RULE_ARG_TOK | MP_TOKEN_##t) -#define rule(r) (RULE_ARG_RULE | RULE_##r) -#define opt_rule(r) (RULE_ARG_OPT_RULE | RULE_##r) -#ifdef USE_RULE_NAME -#define DEF_RULE(rule, comp, kind, ...) static const rule_t rule_##rule = { RULE_##rule, kind, #rule, { __VA_ARGS__ } }; -#define DEF_RULE_NC(rule, kind, ...) static const rule_t rule_##rule = { RULE_##rule, kind, #rule, { __VA_ARGS__ } }; -#else -#define DEF_RULE(rule, comp, kind, ...) static const rule_t rule_##rule = { RULE_##rule, kind, { __VA_ARGS__ } }; -#define DEF_RULE_NC(rule, kind, ...) static const rule_t rule_##rule = { RULE_##rule, kind, { __VA_ARGS__ } }; -#endif + +#define DEF_RULE(rule, comp, kind, ...) kind, +#define DEF_RULE_NC(rule, kind, ...) #include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC + + 0, // RULE_const_object + +#define DEF_RULE(rule, comp, kind, ...) +#define DEF_RULE_NC(rule, kind, ...) kind, +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC + #undef or #undef and +#undef and_ident +#undef and_blank +#undef one_or_more #undef list #undef list_with_end +}; + +// Define the argument data for each rule, as a combined array +STATIC const uint16_t rule_arg_combined_table[] = { +#define tok(t) (RULE_ARG_TOK | MP_TOKEN_##t) +#define rule(r) (RULE_ARG_RULE | RULE_##r) +#define opt_rule(r) (RULE_ARG_OPT_RULE | RULE_##r) + +#define DEF_RULE(rule, comp, kind, ...) __VA_ARGS__, +#define DEF_RULE_NC(rule, kind, ...) +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC + +#define DEF_RULE(rule, comp, kind, ...) +#define DEF_RULE_NC(rule, kind, ...) __VA_ARGS__, +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC + #undef tok #undef rule #undef opt_rule -#undef one_or_more +}; + +// Macro to create a list of N identifiers where N is the number of variable arguments to the macro +#define RULE_EXPAND(x) x +#define RULE_PADDING(rule, ...) RULE_PADDING2(rule, __VA_ARGS__, RULE_PADDING_IDS(rule)) +#define RULE_PADDING2(rule, ...) RULE_EXPAND(RULE_PADDING3(rule, __VA_ARGS__)) +#define RULE_PADDING3(rule, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, ...) __VA_ARGS__ +#define RULE_PADDING_IDS(r) PAD12_##r, PAD11_##r, PAD10_##r, PAD9_##r, PAD8_##r, PAD7_##r, PAD6_##r, PAD5_##r, PAD4_##r, PAD3_##r, PAD2_##r, PAD1_##r, + +// Use an enum to create constants specifying how much room a rule takes in rule_arg_combined_table +enum { +#define DEF_RULE(rule, comp, kind, ...) RULE_PADDING(rule, __VA_ARGS__) +#define DEF_RULE_NC(rule, kind, ...) +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC +#define DEF_RULE(rule, comp, kind, ...) +#define DEF_RULE_NC(rule, kind, ...) RULE_PADDING(rule, __VA_ARGS__) +#include "py/grammar.h" #undef DEF_RULE #undef DEF_RULE_NC +}; -STATIC const rule_t *const rules[] = { -// define rules with a compile function -#define DEF_RULE(rule, comp, kind, ...) &rule_##rule, +// Macro to compute the start of a rule in rule_arg_combined_table +#define RULE_ARG_OFFSET(rule, ...) RULE_ARG_OFFSET2(rule, __VA_ARGS__, RULE_ARG_OFFSET_IDS(rule)) +#define RULE_ARG_OFFSET2(rule, ...) RULE_EXPAND(RULE_ARG_OFFSET3(rule, __VA_ARGS__)) +#define RULE_ARG_OFFSET3(rule, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, ...) _13 +#define RULE_ARG_OFFSET_IDS(r) PAD12_##r, PAD11_##r, PAD10_##r, PAD9_##r, PAD8_##r, PAD7_##r, PAD6_##r, PAD5_##r, PAD4_##r, PAD3_##r, PAD2_##r, PAD1_##r, PAD0_##r, + +// Use the above enum values to create a table of offsets for each rule's arg +// data, which indexes rule_arg_combined_table. The offsets require 9 bits of +// storage but only the lower 8 bits are stored here. The 9th bit is computed +// in get_rule_arg using the FIRST_RULE_WITH_OFFSET_ABOVE_255 constant. +STATIC const uint8_t rule_arg_offset_table[] = { +#define DEF_RULE(rule, comp, kind, ...) RULE_ARG_OFFSET(rule, __VA_ARGS__) & 0xff, #define DEF_RULE_NC(rule, kind, ...) #include "py/grammar.h" #undef DEF_RULE #undef DEF_RULE_NC - NULL, // RULE_const_object + 0, // RULE_const_object +#define DEF_RULE(rule, comp, kind, ...) +#define DEF_RULE_NC(rule, kind, ...) RULE_ARG_OFFSET(rule, __VA_ARGS__) & 0xff, +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC +}; -// define rules without a compile function +// Define a constant that's used to determine the 9th bit of the values in rule_arg_offset_table +static const size_t FIRST_RULE_WITH_OFFSET_ABOVE_255 = +#define DEF_RULE(rule, comp, kind, ...) RULE_ARG_OFFSET(rule, __VA_ARGS__) >= 0x100 ? RULE_##rule : +#define DEF_RULE_NC(rule, kind, ...) +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC #define DEF_RULE(rule, comp, kind, ...) -#define DEF_RULE_NC(rule, kind, ...) &rule_##rule, +#define DEF_RULE_NC(rule, kind, ...) RULE_ARG_OFFSET(rule, __VA_ARGS__) >= 0x100 ? RULE_##rule : +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC +0; + +#if defined(USE_RULE_NAME) && USE_RULE_NAME +// Define an array of rule names corresponding to each rule +STATIC const char *const rule_name_table[] = { +#define DEF_RULE(rule, comp, kind, ...) #rule, +#define DEF_RULE_NC(rule, kind, ...) +#include "py/grammar.h" +#undef DEF_RULE +#undef DEF_RULE_NC + "", // RULE_const_object +#define DEF_RULE(rule, comp, kind, ...) +#define DEF_RULE_NC(rule, kind, ...) #rule, #include "py/grammar.h" #undef DEF_RULE #undef DEF_RULE_NC }; +#endif typedef struct _rule_stack_t { size_t src_line : 8 * sizeof(size_t) - 8; // maximum bits storing source line number @@ -164,8 +243,17 @@ typedef struct _parser_t { #endif } parser_t; +STATIC const uint16_t *get_rule_arg(uint8_t r_id) { + size_t off = rule_arg_offset_table[r_id]; + if (r_id >= FIRST_RULE_WITH_OFFSET_ABOVE_255) { + off |= 0x100; + } + return &rule_arg_combined_table[off]; +} + #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wcast-align" + STATIC void *parser_alloc(parser_t *parser, size_t num_bytes) { // use a custom memory allocator to store parse nodes sequentially in large chunks @@ -208,7 +296,7 @@ STATIC void *parser_alloc(parser_t *parser, size_t num_bytes) { } #pragma GCC diagnostic pop -STATIC void push_rule(parser_t *parser, size_t src_line, const rule_t *rule, size_t arg_i) { +STATIC void push_rule(parser_t *parser, size_t src_line, uint8_t rule_id, size_t arg_i) { if (parser->rule_stack_top >= parser->rule_stack_alloc) { rule_stack_t *rs = m_renew(rule_stack_t, parser->rule_stack, parser->rule_stack_alloc, parser->rule_stack_alloc + MICROPY_ALLOC_PARSE_RULE_INC); parser->rule_stack = rs; @@ -216,21 +304,22 @@ STATIC void push_rule(parser_t *parser, size_t src_line, const rule_t *rule, siz } rule_stack_t *rs = &parser->rule_stack[parser->rule_stack_top++]; rs->src_line = src_line; - rs->rule_id = rule->rule_id; + rs->rule_id = rule_id; rs->arg_i = arg_i; } STATIC void push_rule_from_arg(parser_t *parser, size_t arg) { assert((arg & RULE_ARG_KIND_MASK) == RULE_ARG_RULE || (arg & RULE_ARG_KIND_MASK) == RULE_ARG_OPT_RULE); size_t rule_id = arg & RULE_ARG_ARG_MASK; - push_rule(parser, parser->lexer->tok_line, rules[rule_id], 0); + push_rule(parser, parser->lexer->tok_line, rule_id, 0); } -STATIC void pop_rule(parser_t *parser, const rule_t **rule, size_t *arg_i, size_t *src_line) { +STATIC uint8_t pop_rule(parser_t *parser, size_t *arg_i, size_t *src_line) { parser->rule_stack_top -= 1; - *rule = rules[parser->rule_stack[parser->rule_stack_top].rule_id]; + uint8_t rule_id = parser->rule_stack[parser->rule_stack_top].rule_id; *arg_i = parser->rule_stack[parser->rule_stack_top].arg_i; *src_line = parser->rule_stack[parser->rule_stack_top].src_line; + return rule_id; } bool mp_parse_node_is_const_false(mp_parse_node_t pn) { @@ -316,11 +405,11 @@ void mp_parse_node_print(mp_parse_node_t pn, size_t indent) { #endif } else { size_t n = MP_PARSE_NODE_STRUCT_NUM_NODES(pns); -#ifdef USE_RULE_NAME - printf("%s(%u) (n=%u)\n", rules[MP_PARSE_NODE_STRUCT_KIND(pns)]->rule_name, (uint)MP_PARSE_NODE_STRUCT_KIND(pns), (uint)n); -#else + #if defined(USE_RULE_NAME) && USE_RULE_NAME + printf("%s(%u) (n=%u)\n", rule_name_table[MP_PARSE_NODE_STRUCT_KIND(pns)], (uint)MP_PARSE_NODE_STRUCT_KIND(pns), (uint)n); + #else printf("rule(%u) (n=%u)\n", (uint)MP_PARSE_NODE_STRUCT_KIND(pns), (uint)n); -#endif + #endif for (size_t i = 0; i < n; i++) { mp_parse_node_print(pns->nodes[i], indent + 2); } @@ -372,18 +461,33 @@ STATIC mp_parse_node_t make_node_const_object(parser_t *parser, size_t src_line, return (mp_parse_node_t)pn; } -STATIC void push_result_token(parser_t *parser, const rule_t *rule) { +STATIC mp_parse_node_t mp_parse_node_new_small_int_checked(parser_t *parser, mp_obj_t o_val) { + (void)parser; + mp_int_t val = MP_OBJ_SMALL_INT_VALUE(o_val); + #if MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_D + // A parse node is only 32-bits and the small-int value must fit in 31-bits + if (((val ^ (val << 1)) & 0xffffffff80000000) != 0) { + return make_node_const_object(parser, 0, o_val); + } + #endif + return mp_parse_node_new_small_int(val); +} + +STATIC void push_result_token(parser_t *parser, uint8_t rule_id) { mp_parse_node_t pn; mp_lexer_t *lex = parser->lexer; if (lex->tok_kind == MP_TOKEN_NAME) { + if(lex->vstr.len >= (1 << (8 * MICROPY_QSTR_BYTES_IN_LEN))) { + mp_raise_msg(&mp_type_SyntaxError, translate("Name too long")); + } qstr id = qstr_from_strn(lex->vstr.buf, lex->vstr.len); #if MICROPY_COMP_CONST // if name is a standalone identifier, look it up in the table of dynamic constants mp_map_elem_t *elem; - if (rule->rule_id == RULE_atom + if (rule_id == RULE_atom && (elem = mp_map_lookup(&parser->consts, MP_OBJ_NEW_QSTR(id), MP_MAP_LOOKUP)) != NULL) { if (MP_OBJ_IS_SMALL_INT(elem->value)) { - pn = mp_parse_node_new_small_int(MP_OBJ_SMALL_INT_VALUE(elem->value)); + pn = mp_parse_node_new_small_int_checked(parser, elem->value); } else { pn = make_node_const_object(parser, lex->tok_line, elem->value); } @@ -391,13 +495,13 @@ STATIC void push_result_token(parser_t *parser, const rule_t *rule) { pn = mp_parse_node_new_leaf(MP_PARSE_NODE_ID, id); } #else - (void)rule; + (void)rule_id; pn = mp_parse_node_new_leaf(MP_PARSE_NODE_ID, id); #endif } else if (lex->tok_kind == MP_TOKEN_INTEGER) { mp_obj_t o = mp_parse_num_integer(lex->vstr.buf, lex->vstr.len, 0, lex); if (MP_OBJ_IS_SMALL_INT(o)) { - pn = mp_parse_node_new_small_int(MP_OBJ_SMALL_INT_VALUE(o)); + pn = mp_parse_node_new_small_int_checked(parser, o); } else { pn = make_node_const_object(parser, lex->tok_line, o); } @@ -420,7 +524,7 @@ STATIC void push_result_token(parser_t *parser, const rule_t *rule) { pn = mp_parse_node_new_leaf(lex->tok_kind == MP_TOKEN_STRING ? MP_PARSE_NODE_STRING : MP_PARSE_NODE_BYTES, qst); } else { // not interned, make a node holding a pointer to the string/bytes object - mp_obj_t o = mp_obj_new_str_of_type( + mp_obj_t o = mp_obj_new_str_copy( lex->tok_kind == MP_TOKEN_STRING ? &mp_type_str : &mp_type_bytes, (const byte*)lex->vstr.buf, lex->vstr.len); pn = make_node_const_object(parser, lex->tok_line, o); @@ -445,12 +549,12 @@ STATIC const mp_rom_map_elem_t mp_constants_table[] = { STATIC MP_DEFINE_CONST_MAP(mp_constants_map, mp_constants_table); #endif -STATIC void push_result_rule(parser_t *parser, size_t src_line, const rule_t *rule, size_t num_args); +STATIC void push_result_rule(parser_t *parser, size_t src_line, uint8_t rule_id, size_t num_args); #if MICROPY_COMP_CONST_FOLDING -STATIC bool fold_logical_constants(parser_t *parser, const rule_t *rule, size_t *num_args) { - if (rule->rule_id == RULE_or_test - || rule->rule_id == RULE_and_test) { +STATIC bool fold_logical_constants(parser_t *parser, uint8_t rule_id, size_t *num_args) { + if (rule_id == RULE_or_test + || rule_id == RULE_and_test) { // folding for binary logical ops: or and size_t copy_to = *num_args; for (size_t i = copy_to; i > 0;) { @@ -460,7 +564,7 @@ STATIC bool fold_logical_constants(parser_t *parser, const rule_t *rule, size_t // always need to keep the last value break; } - if (rule->rule_id == RULE_or_test) { + if (rule_id == RULE_or_test) { if (mp_parse_node_is_const_true(pn)) { // break; @@ -487,7 +591,7 @@ STATIC bool fold_logical_constants(parser_t *parser, const rule_t *rule, size_t // we did a complete folding if there's only 1 arg left return *num_args == 1; - } else if (rule->rule_id == RULE_not_test_2) { + } else if (rule_id == RULE_not_test_2) { // folding for unary logical op: not mp_parse_node_t pn = peek_result(parser, 0); if (mp_parse_node_is_const_false(pn)) { @@ -505,23 +609,23 @@ STATIC bool fold_logical_constants(parser_t *parser, const rule_t *rule, size_t return false; } -STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args) { +STATIC bool fold_constants(parser_t *parser, uint8_t rule_id, size_t num_args) { // this code does folding of arbitrary integer expressions, eg 1 + 2 * 3 + 4 // it does not do partial folding, eg 1 + 2 + x -> 3 + x mp_obj_t arg0; - if (rule->rule_id == RULE_expr - || rule->rule_id == RULE_xor_expr - || rule->rule_id == RULE_and_expr) { + if (rule_id == RULE_expr + || rule_id == RULE_xor_expr + || rule_id == RULE_and_expr) { // folding for binary ops: | ^ & mp_parse_node_t pn = peek_result(parser, num_args - 1); if (!mp_parse_node_get_int_maybe(pn, &arg0)) { return false; } mp_binary_op_t op; - if (rule->rule_id == RULE_expr) { + if (rule_id == RULE_expr) { op = MP_BINARY_OP_OR; - } else if (rule->rule_id == RULE_xor_expr) { + } else if (rule_id == RULE_xor_expr) { op = MP_BINARY_OP_XOR; } else { op = MP_BINARY_OP_AND; @@ -534,9 +638,9 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args } arg0 = mp_binary_op(op, arg0, arg1); } - } else if (rule->rule_id == RULE_shift_expr - || rule->rule_id == RULE_arith_expr - || rule->rule_id == RULE_term) { + } else if (rule_id == RULE_shift_expr + || rule_id == RULE_arith_expr + || rule_id == RULE_term) { // folding for binary ops: << >> + - * / % // mp_parse_node_t pn = peek_result(parser, num_args - 1); if (!mp_parse_node_get_int_maybe(pn, &arg0)) { @@ -580,7 +684,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args } arg0 = mp_binary_op(op, arg0, arg1); } - } else if (rule->rule_id == RULE_factor_2) { + } else if (rule_id == RULE_factor_2) { // folding for unary ops: + - ~ mp_parse_node_t pn = peek_result(parser, 0); if (!mp_parse_node_get_int_maybe(pn, &arg0)) { @@ -599,7 +703,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args arg0 = mp_unary_op(op, arg0); #if MICROPY_COMP_CONST - } else if (rule->rule_id == RULE_expr_stmt) { + } else if (rule_id == RULE_expr_stmt) { mp_parse_node_t pn1 = peek_result(parser, 0); if (!MP_PARSE_NODE_IS_NULL(pn1) && !(MP_PARSE_NODE_IS_STRUCT_KIND(pn1, RULE_expr_stmt_augassign) @@ -622,7 +726,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args mp_obj_t value; if (!mp_parse_node_get_int_maybe(pn_value, &value)) { mp_obj_t exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, - "constant must be an integer"); + translate("constant must be an integer")); mp_obj_exception_add_traceback(exc, parser->lexer->source_name, ((mp_parse_node_struct_t*)pn1)->source_line, MP_QSTR_NULL); nlr_raise(exc); @@ -638,7 +742,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args if (qstr_str(id)[0] == '_') { pop_result(parser); // pop const(value) pop_result(parser); // pop id - push_result_rule(parser, 0, rules[RULE_pass_stmt], 0); // replace with "pass" + push_result_rule(parser, 0, RULE_pass_stmt, 0); // replace with "pass" return true; } @@ -654,7 +758,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args #endif #if MICROPY_COMP_MODULE_CONST - } else if (rule->rule_id == RULE_atom_expr_normal) { + } else if (rule_id == RULE_atom_expr_normal) { mp_parse_node_t pn0 = peek_result(parser, 1); mp_parse_node_t pn1 = peek_result(parser, 0); if (!(MP_PARSE_NODE_IS_ID(pn0) @@ -689,7 +793,7 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args pop_result(parser); } if (MP_OBJ_IS_SMALL_INT(arg0)) { - push_result_node(parser, mp_parse_node_new_small_int(MP_OBJ_SMALL_INT_VALUE(arg0))); + push_result_node(parser, mp_parse_node_new_small_int_checked(parser, arg0)); } else { // TODO reuse memory for parse node struct? push_result_node(parser, make_node_const_object(parser, 0, arg0)); @@ -699,9 +803,9 @@ STATIC bool fold_constants(parser_t *parser, const rule_t *rule, size_t num_args } #endif -STATIC void push_result_rule(parser_t *parser, size_t src_line, const rule_t *rule, size_t num_args) { +STATIC void push_result_rule(parser_t *parser, size_t src_line, uint8_t rule_id, size_t num_args) { // optimise away parenthesis around an expression if possible - if (rule->rule_id == RULE_atom_paren) { + if (rule_id == RULE_atom_paren) { // there should be just 1 arg for this rule mp_parse_node_t pn = peek_result(parser, 0); if (MP_PARSE_NODE_IS_NULL(pn)) { @@ -715,11 +819,11 @@ STATIC void push_result_rule(parser_t *parser, size_t src_line, const rule_t *ru } #if MICROPY_COMP_CONST_FOLDING - if (fold_logical_constants(parser, rule, &num_args)) { + if (fold_logical_constants(parser, rule_id, &num_args)) { // we folded this rule so return straight away return; } - if (fold_constants(parser, rule, num_args)) { + if (fold_constants(parser, rule_id, num_args)) { // we folded this rule so return straight away return; } @@ -727,7 +831,7 @@ STATIC void push_result_rule(parser_t *parser, size_t src_line, const rule_t *ru mp_parse_node_struct_t *pn = parser_alloc(parser, sizeof(mp_parse_node_struct_t) + sizeof(mp_parse_node_t) * num_args); pn->source_line = src_line; - pn->kind_num_nodes = (rule->rule_id & 0xff) | (num_args << 8); + pn->kind_num_nodes = (rule_id & 0xff) | (num_args << 8); for (size_t i = num_args; i > 0; i--) { pn->nodes[i - 1] = pop_result(parser); } @@ -764,7 +868,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } } if (parser.rule_stack == NULL || parser.result_stack == NULL) { - mp_raise_msg(&mp_type_MemoryError, "Unable to init parser"); + mp_raise_msg(&mp_type_MemoryError, translate("Unable to init parser")); } parser.lexer = lex; @@ -783,14 +887,11 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { case MP_PARSE_EVAL_INPUT: top_level_rule = RULE_eval_input; break; default: top_level_rule = RULE_file_input; } - push_rule(&parser, lex->tok_line, rules[top_level_rule], 0); + push_rule(&parser, lex->tok_line, top_level_rule, 0); // parse! - size_t n, i; // state for the current rule - size_t rule_src_line; // source line for the first token matched by the current rule bool backtrack = false; - const rule_t *rule = NULL; for (;;) { next_rule: @@ -798,19 +899,24 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { break; } - pop_rule(&parser, &rule, &i, &rule_src_line); - n = rule->act & RULE_ACT_ARG_MASK; + // Pop the next rule to process it + size_t i; // state for the current rule + size_t rule_src_line; // source line for the first token matched by the current rule + uint8_t rule_id = pop_rule(&parser, &i, &rule_src_line); + uint8_t rule_act = rule_act_table[rule_id]; + const uint16_t *rule_arg = get_rule_arg(rule_id); + size_t n = rule_act & RULE_ACT_ARG_MASK; - /* + #if 0 // debugging - printf("depth=%d ", parser.rule_stack_top); + printf("depth=" UINT_FMT " ", parser.rule_stack_top); for (int j = 0; j < parser.rule_stack_top; ++j) { printf(" "); } - printf("%s n=%d i=%d bt=%d\n", rule->rule_name, n, i, backtrack); - */ + printf("%s n=" UINT_FMT " i=" UINT_FMT " bt=%d\n", rule_name_table[rule_id], n, i, backtrack); + #endif - switch (rule->act & RULE_ACT_KIND_MASK) { + switch (rule_act & RULE_ACT_KIND_MASK) { case RULE_ACT_OR: if (i > 0 && !backtrack) { goto next_rule; @@ -818,19 +924,20 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { backtrack = false; } for (; i < n; ++i) { - uint16_t kind = rule->arg[i] & RULE_ARG_KIND_MASK; + //printf("--> inside for @L924\n"); + uint16_t kind = rule_arg[i] & RULE_ARG_KIND_MASK; if (kind == RULE_ARG_TOK) { - if (lex->tok_kind == (rule->arg[i] & RULE_ARG_ARG_MASK)) { - push_result_token(&parser, rule); + if (lex->tok_kind == (rule_arg[i] & RULE_ARG_ARG_MASK)) { + push_result_token(&parser, rule_id); mp_lexer_to_next(lex); goto next_rule; } } else { assert(kind == RULE_ARG_RULE); if (i + 1 < n) { - push_rule(&parser, rule_src_line, rule, i + 1); // save this or-rule + push_rule(&parser, rule_src_line, rule_id, i + 1); // save this or-rule } - push_rule_from_arg(&parser, rule->arg[i]); // push child of or-rule + push_rule_from_arg(&parser, rule_arg[i]); // push child of or-rule goto next_rule; } } @@ -842,7 +949,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { // failed, backtrack if we can, else syntax error if (backtrack) { assert(i > 0); - if ((rule->arg[i - 1] & RULE_ARG_KIND_MASK) == RULE_ARG_OPT_RULE) { + if ((rule_arg[i - 1] & RULE_ARG_KIND_MASK) == RULE_ARG_OPT_RULE) { // an optional rule that failed, so continue with next arg push_result_node(&parser, MP_PARSE_NODE_NULL); backtrack = false; @@ -859,13 +966,13 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { // progress through the rule for (; i < n; ++i) { - if ((rule->arg[i] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { + if ((rule_arg[i] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { // need to match a token - mp_token_kind_t tok_kind = rule->arg[i] & RULE_ARG_ARG_MASK; + mp_token_kind_t tok_kind = rule_arg[i] & RULE_ARG_ARG_MASK; if (lex->tok_kind == tok_kind) { // matched token if (tok_kind == MP_TOKEN_NAME) { - push_result_token(&parser, rule); + push_result_token(&parser, rule_id); } mp_lexer_to_next(lex); } else { @@ -880,8 +987,8 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } } } else { - push_rule(&parser, rule_src_line, rule, i + 1); // save this and-rule - push_rule_from_arg(&parser, rule->arg[i]); // push child of and-rule + push_rule(&parser, rule_src_line, rule_id, i + 1); // save this and-rule + push_rule_from_arg(&parser, rule_arg[i]); // push child of and-rule goto next_rule; } } @@ -892,7 +999,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { #if !MICROPY_ENABLE_DOC_STRING // this code discards lonely statements, such as doc strings - if (input_kind != MP_PARSE_SINGLE_INPUT && rule->rule_id == RULE_expr_stmt && peek_result(&parser, 0) == MP_PARSE_NODE_NULL) { + if (input_kind != MP_PARSE_SINGLE_INPUT && rule_id == RULE_expr_stmt && peek_result(&parser, 0) == MP_PARSE_NODE_NULL) { mp_parse_node_t p = peek_result(&parser, 1); if ((MP_PARSE_NODE_IS_LEAF(p) && !MP_PARSE_NODE_IS_ID(p)) || MP_PARSE_NODE_IS_STRUCT_KIND(p, RULE_const_object)) { @@ -901,7 +1008,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { // Pushing the "pass" rule here will overwrite any RULE_const_object // entry that was on the result stack, allowing the GC to reclaim // the memory from the const object when needed. - push_result_rule(&parser, rule_src_line, rules[RULE_pass_stmt], 0); + push_result_rule(&parser, rule_src_line, RULE_pass_stmt, 0); break; } } @@ -912,8 +1019,8 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { size_t num_not_nil = 0; for (size_t x = n; x > 0;) { --x; - if ((rule->arg[x] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { - mp_token_kind_t tok_kind = rule->arg[x] & RULE_ARG_ARG_MASK; + if ((rule_arg[x] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { + mp_token_kind_t tok_kind = rule_arg[x] & RULE_ARG_ARG_MASK; if (tok_kind == MP_TOKEN_NAME) { // only tokens which were names are pushed to stack i += 1; @@ -928,7 +1035,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } } - if (num_not_nil == 1 && (rule->act & RULE_ACT_ALLOW_IDENT)) { + if (num_not_nil == 1 && (rule_act & RULE_ACT_ALLOW_IDENT)) { // this rule has only 1 argument and should not be emitted mp_parse_node_t pn = MP_PARSE_NODE_NULL; for (size_t x = 0; x < i; ++x) { @@ -941,19 +1048,19 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } else { // this rule must be emitted - if (rule->act & RULE_ACT_ADD_BLANK) { + if (rule_act & RULE_ACT_ADD_BLANK) { // and add an extra blank node at the end (used by the compiler to store data) push_result_node(&parser, MP_PARSE_NODE_NULL); i += 1; } - push_result_rule(&parser, rule_src_line, rule, i); + push_result_rule(&parser, rule_src_line, rule_id, i); } break; } default: { - assert((rule->act & RULE_ACT_KIND_MASK) == RULE_ACT_LIST); + assert((rule_act & RULE_ACT_KIND_MASK) == RULE_ACT_LIST); // n=2 is: item item* // n=1 is: item (sep item)* @@ -991,13 +1098,13 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } } else { for (;;) { - size_t arg = rule->arg[i & 1 & n]; + size_t arg = rule_arg[i & 1 & n]; if ((arg & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { if (lex->tok_kind == (arg & RULE_ARG_ARG_MASK)) { if (i & 1 & n) { // separators which are tokens are not pushed to result stack } else { - push_result_token(&parser, rule); + push_result_token(&parser, rule_id); } mp_lexer_to_next(lex); // got element of list, so continue parsing list @@ -1010,7 +1117,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { } } else { assert((arg & RULE_ARG_KIND_MASK) == RULE_ARG_RULE); - push_rule(&parser, rule_src_line, rule, i + 1); // save this list-rule + push_rule(&parser, rule_src_line, rule_id, i + 1); // save this list-rule push_rule_from_arg(&parser, arg); // push child of list-rule goto next_rule; } @@ -1020,7 +1127,7 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { // compute number of elements in list, result in i i -= 1; - if ((n & 1) && (rule->arg[1] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { + if ((n & 1) && (rule_arg[1] & RULE_ARG_KIND_MASK) == RULE_ARG_TOK) { // don't count separators when they are tokens i = (i + 1) / 2; } @@ -1029,12 +1136,12 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { // list matched single item if (had_trailing_sep) { // if there was a trailing separator, make a list of a single item - push_result_rule(&parser, rule_src_line, rule, i); + push_result_rule(&parser, rule_src_line, rule_id, i); } else { // just leave single item on stack (ie don't wrap in a list) } } else { - push_result_rule(&parser, rule_src_line, rule, i); + push_result_rule(&parser, rule_src_line, rule_id, i); } break; } @@ -1062,15 +1169,57 @@ mp_parse_tree_t mp_parse(mp_lexer_t *lex, mp_parse_input_kind_t input_kind) { ) { syntax_error:; mp_obj_t exc; - if (lex->tok_kind == MP_TOKEN_INDENT) { - exc = mp_obj_new_exception_msg(&mp_type_IndentationError, - "unexpected indent"); - } else if (lex->tok_kind == MP_TOKEN_DEDENT_MISMATCH) { - exc = mp_obj_new_exception_msg(&mp_type_IndentationError, - "unindent does not match any outer indentation level"); - } else { - exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, - "invalid syntax"); + switch(lex->tok_kind) { + case MP_TOKEN_INDENT: + exc = mp_obj_new_exception_msg(&mp_type_IndentationError, + translate("unexpected indent")); + break; + case MP_TOKEN_DEDENT_MISMATCH: + exc = mp_obj_new_exception_msg(&mp_type_IndentationError, + translate("unindent does not match any outer indentation level")); + break; +#if MICROPY_COMP_FSTRING_LITERAL +#if MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_DETAILED + case MP_TOKEN_FSTRING_BACKSLASH: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("f-string expression part cannot include a backslash")); + break; + case MP_TOKEN_FSTRING_COMMENT: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("f-string expression part cannot include a '#'")); + break; + case MP_TOKEN_FSTRING_UNCLOSED: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("f-string: expecting '}'")); + break; + case MP_TOKEN_FSTRING_UNOPENED: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("f-string: single '}' is not allowed")); + break; + case MP_TOKEN_FSTRING_EMPTY_EXP: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("f-string: empty expression not allowed")); + break; + case MP_TOKEN_FSTRING_RAW: + exc = mp_obj_new_exception_msg(&mp_type_NotImplementedError, + translate("raw f-strings are not implemented")); + break; +#else + case MP_TOKEN_FSTRING_BACKSLASH: + case MP_TOKEN_FSTRING_COMMENT: + case MP_TOKEN_FSTRING_UNCLOSED: + case MP_TOKEN_FSTRING_UNOPENED: + case MP_TOKEN_FSTRING_EMPTY_EXP: + case MP_TOKEN_FSTRING_RAW: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("malformed f-string")); + break; +#endif +#endif + default: + exc = mp_obj_new_exception_msg(&mp_type_SyntaxError, + translate("invalid syntax")); + break; } // add traceback to give info about file name and location // we don't have a 'block' name, so just pass the NULL qstr to indicate this diff --git a/py/parsenum.c b/py/parsenum.c index bacf4f442c765..6ef309b475fa5 100644 --- a/py/parsenum.c +++ b/py/parsenum.c @@ -32,6 +32,8 @@ #include "py/parsenum.h" #include "py/smallint.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PY_BUILTINS_FLOAT #include #endif @@ -55,7 +57,7 @@ mp_obj_t mp_parse_num_integer(const char *restrict str_, size_t len, int base, m // check radix base if ((base != 0 && base < 2) || base > 36) { // this won't be reached if lex!=NULL - mp_raise_ValueError("int() arg 2 must be >= 2 and <= 36"); + mp_raise_ValueError(translate("int() arg 2 must be >= 2 and <= 36")); } // skip leading space @@ -83,6 +85,8 @@ mp_obj_t mp_parse_num_integer(const char *restrict str_, size_t len, int base, m mp_uint_t dig = *str; if ('0' <= dig && dig <= '9') { dig -= '0'; + } else if (dig == '_') { + continue; } else { dig |= 0x20; // make digit lower-case if ('a' <= dig && dig <= 'z') { @@ -144,11 +148,11 @@ mp_obj_t mp_parse_num_integer(const char *restrict str_, size_t len, int base, m value_error: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { mp_obj_t exc = mp_obj_new_exception_msg(&mp_type_ValueError, - "invalid syntax for integer"); + translate("invalid syntax for integer")); raise_exc(exc, lex); } else if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_NORMAL) { mp_obj_t exc = mp_obj_new_exception_msg_varg(&mp_type_ValueError, - "invalid syntax for integer with base %d", base); + translate("invalid syntax for integer with base %d"), base); raise_exc(exc, lex); } else { vstr_t vstr; @@ -170,6 +174,19 @@ typedef enum { mp_obj_t mp_parse_num_decimal(const char *str, size_t len, bool allow_imag, bool force_complex, mp_lexer_t *lex) { #if MICROPY_PY_BUILTINS_FLOAT + +// DEC_VAL_MAX only needs to be rough and is used to retain precision while not overflowing +// SMALL_NORMAL_VAL is the smallest power of 10 that is still a normal float +#if MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_FLOAT +#define DEC_VAL_MAX 1e20F +#define SMALL_NORMAL_VAL (1e-37F) +#define SMALL_NORMAL_EXP (-37) +#elif MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_DOUBLE +#define DEC_VAL_MAX 1e200 +#define SMALL_NORMAL_VAL (1e-307) +#define SMALL_NORMAL_EXP (-307) +#endif + const char *top = str + len; mp_float_t dec_val = 0; bool dec_neg = false; @@ -214,20 +231,32 @@ mp_obj_t mp_parse_num_decimal(const char *str, size_t len, bool allow_imag, bool // string should be a decimal number parse_dec_in_t in = PARSE_DEC_IN_INTG; bool exp_neg = false; - mp_float_t frac_mult = 0.1; - mp_int_t exp_val = 0; + int exp_val = 0; + int exp_extra = 0; while (str < top) { - mp_uint_t dig = *str++; + unsigned int dig = *str++; if ('0' <= dig && dig <= '9') { dig -= '0'; if (in == PARSE_DEC_IN_EXP) { - exp_val = 10 * exp_val + dig; + // don't overflow exp_val when adding next digit, instead just truncate + // it and the resulting float will still be correct, either inf or 0.0 + // (use INT_MAX/2 to allow adding exp_extra at the end without overflow) + if (exp_val < (INT_MAX / 2 - 9) / 10) { + exp_val = 10 * exp_val + dig; + } } else { - if (in == PARSE_DEC_IN_FRAC) { - dec_val += dig * frac_mult; - frac_mult *= MICROPY_FLOAT_CONST(0.1); - } else { + if (dec_val < DEC_VAL_MAX) { + // dec_val won't overflow so keep accumulating dec_val = 10 * dec_val + dig; + if (in == PARSE_DEC_IN_FRAC) { + --exp_extra; + } + } else { + // dec_val might overflow and we anyway can't represent more digits + // of precision, so ignore the digit and just adjust the exponent + if (in == PARSE_DEC_IN_INTG) { + ++exp_extra; + } } } } else if (in == PARSE_DEC_IN_INTG && dig == '.') { @@ -248,6 +277,8 @@ mp_obj_t mp_parse_num_decimal(const char *str, size_t len, bool allow_imag, bool } else if (allow_imag && (dig | 0x20) == 'j') { imag = true; break; + } else if (dig == '_') { + continue; } else { // unknown character str--; @@ -260,7 +291,12 @@ mp_obj_t mp_parse_num_decimal(const char *str, size_t len, bool allow_imag, bool exp_val = -exp_val; } - // apply the exponent + // apply the exponent, making sure it's not a subnormal value + exp_val += exp_extra; + if (exp_val < SMALL_NORMAL_EXP) { + exp_val -= SMALL_NORMAL_EXP; + dec_val *= SMALL_NORMAL_VAL; + } dec_val *= MICROPY_FLOAT_C_FUN(pow)(10, exp_val); } @@ -289,18 +325,20 @@ mp_obj_t mp_parse_num_decimal(const char *str, size_t len, bool allow_imag, bool return mp_obj_new_complex(0, dec_val); } else if (force_complex) { return mp_obj_new_complex(dec_val, 0); + } #else if (imag || force_complex) { - raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, "complex values not supported"), lex); + raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, translate("complex values not supported")), lex); + } #endif - } else { + else { return mp_obj_new_float(dec_val); } value_error: - raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, "invalid syntax for number"), lex); + raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, translate("invalid syntax for number")), lex); #else - raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, "decimal numbers not supported"), lex); + raise_exc(mp_obj_new_exception_msg(&mp_type_ValueError, translate("decimal numbers not supported")), lex); #endif } diff --git a/py/persistentcode.c b/py/persistentcode.c index ba126a3fb254c..eb69bd40799cd 100644 --- a/py/persistentcode.c +++ b/py/persistentcode.c @@ -34,6 +34,8 @@ #include "py/persistentcode.h" #include "py/bc.h" +#include "supervisor/shared/translate.h" + #if MICROPY_PERSISTENT_CODE_LOAD || MICROPY_PERSISTENT_CODE_SAVE #include "py/smallint.h" @@ -100,20 +102,35 @@ STATIC void extract_prelude(const byte **ip, const byte **ip2, bytecode_prelude_ #include "py/parsenum.h" +STATIC void raise_corrupt_mpy(void) { + mp_raise_RuntimeError(translate("Corrupt .mpy file")); +} + STATIC int read_byte(mp_reader_t *reader) { - return reader->readbyte(reader->data); + mp_uint_t b = reader->readbyte(reader->data); + if (b == MP_READER_EOF) { + raise_corrupt_mpy(); + } + return b; } STATIC void read_bytes(mp_reader_t *reader, byte *buf, size_t len) { while (len-- > 0) { - *buf++ = reader->readbyte(reader->data); + mp_uint_t b =reader->readbyte(reader->data); + if (b == MP_READER_EOF) { + raise_corrupt_mpy(); + } + *buf++ = b; } } STATIC size_t read_uint(mp_reader_t *reader) { size_t unum = 0; for (;;) { - byte b = reader->readbyte(reader->data); + mp_uint_t b = reader->readbyte(reader->data); + if (b == MP_READER_EOF) { + raise_corrupt_mpy(); + } unum = (unum << 7) | (b & 0x7f); if ((b & 0x80) == 0) { break; @@ -143,11 +160,12 @@ STATIC mp_obj_t load_obj(mp_reader_t *reader) { return mp_obj_new_str_from_vstr(obj_type == 's' ? &mp_type_str : &mp_type_bytes, &vstr); } else if (obj_type == 'i') { return mp_parse_num_integer(vstr.buf, vstr.len, 10, NULL); - } else { - assert(obj_type == 'f' || obj_type == 'c'); + } else if (obj_type == 'f' || obj_type == 'c') { return mp_parse_num_decimal(vstr.buf, vstr.len, obj_type == 'c', false, NULL); } } + raise_corrupt_mpy(); + return MP_OBJ_FROM_PTR(&mp_const_none_obj); } STATIC void load_bytecode_qstrs(mp_reader_t *reader, byte *ip, byte *ip_top) { @@ -199,7 +217,11 @@ STATIC mp_raw_code_t *load_raw_code(mp_reader_t *reader) { // create raw_code and return it mp_raw_code_t *rc = mp_emit_glue_new_raw_code(); - mp_emit_glue_assign_bytecode(rc, bytecode, bc_len, const_table, + mp_emit_glue_assign_bytecode(rc, bytecode, + #if MICROPY_PERSISTENT_CODE_SAVE || MICROPY_DEBUG_PRINTERS + bc_len, + #endif + const_table, #if MICROPY_PERSISTENT_CODE_SAVE n_obj, n_raw_code, #endif @@ -214,9 +236,7 @@ mp_raw_code_t *mp_raw_code_load(mp_reader_t *reader) { || header[1] != MPY_VERSION || header[2] != MPY_FEATURE_FLAGS || header[3] > mp_small_int_bits()) { - // TODO(tannewt): Restore the generic error after we move folks to 2.0.0. - // mp_raise_ValueError("incompatible .mpy file"); - mp_raise_ValueError("Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/mpy-update for more info."); + mp_raise_MpyError(translate("Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/mpy-update for more info.")); } mp_raw_code_t *rc = load_raw_code(reader); reader->close(reader->data); @@ -319,7 +339,7 @@ STATIC void save_bytecode_qstrs(mp_print_t *print, const byte *ip, const byte *i STATIC void save_raw_code(mp_print_t *print, mp_raw_code_t *rc) { if (rc->kind != MP_CODE_BYTECODE) { - mp_raise_ValueError("can only save bytecode"); + mp_raise_ValueError(translate("can only save bytecode")); } // save bytecode diff --git a/py/proto.c b/py/proto.c new file mode 100644 index 0000000000000..e5053130b8a95 --- /dev/null +++ b/py/proto.c @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/proto.h" +#include "py/runtime.h" + +#ifndef MICROPY_UNSAFE_PROTO +const void *mp_proto_get(uint16_t name, mp_const_obj_t obj) { + mp_obj_type_t *type = mp_obj_get_type(obj); + if (!type->protocol) return NULL; + uint16_t proto_name = *(const uint16_t*) type->protocol; + if (proto_name == name) { + return type->protocol; + } + return NULL; +} +#endif + +const void *mp_proto_get_or_throw(uint16_t name, mp_const_obj_t obj) { + const void *proto = mp_proto_get(name, obj); + if (proto) { + return proto; + } + mp_raise_TypeError_varg(translate("'%s' object does not support '%q'"), + mp_obj_get_type_str(obj), name); +} diff --git a/py/proto.h b/py/proto.h new file mode 100644 index 0000000000000..2d4f805659873 --- /dev/null +++ b/py/proto.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_PY_PROTO_H +#define MICROPY_INCLUDED_PY_PROTO_H + +#ifdef MICROPY_UNSAFE_PROTO +#define MP_PROTOCOL_HEAD /* NOTHING */ +#define MP_PROTO_IMPLEMENT(name) /* NOTHING */ +static inline void *mp_proto_get(uint16_t name, mp_const_obj_type_t obj) { return mp_obj_get_type(obj)->protocol; } +#else +#define MP_PROTOCOL_HEAD \ + uint16_t name; // The name of this protocol, a qstr +#define MP_PROTO_IMPLEMENT(n) .name = n, +const void *mp_proto_get(uint16_t name, mp_const_obj_t obj); +const void *mp_proto_get_or_throw(uint16_t name, mp_const_obj_t obj); +#endif + +#endif + diff --git a/py/py.mk b/py/py.mk index 21f81c35d58bb..bac237b7dd793 100644 --- a/py/py.mk +++ b/py/py.mk @@ -7,12 +7,17 @@ HEADER_BUILD = $(BUILD)/genhdr # file containing qstr defs for the core Python bit PY_QSTR_DEFS = $(PY_SRC)/qstrdefs.h +TRANSLATION := en_US + # If qstr autogeneration is not disabled we specify the output header # for all collected qstrings. ifneq ($(QSTR_AUTOGEN_DISABLE),1) QSTR_DEFS_COLLECTED = $(HEADER_BUILD)/qstrdefs.collected.h endif +# Any files listed by this variable will cause a full regeneration of qstrs +QSTR_GLOBAL_DEPENDENCIES += $(PY_SRC)/mpconfig.h mpconfigport.h + # some code is performance bottleneck and compiled with other optimization options CSUPEROPT = -O3 @@ -23,7 +28,7 @@ ifeq ($(MICROPY_PY_USSL),1) CFLAGS_MOD += -DMICROPY_PY_USSL=1 ifeq ($(MICROPY_SSL_AXTLS),1) CFLAGS_MOD += -DMICROPY_SSL_AXTLS=1 -I$(TOP)/lib/axtls/ssl -I$(TOP)/lib/axtls/crypto -I$(TOP)/lib/axtls/config -LDFLAGS_MOD += -Lbuild -laxtls +LDFLAGS_MOD += -L$(BUILD) -laxtls else ifeq ($(MICROPY_SSL_MBEDTLS),1) # Can be overridden by ports which have "builtin" mbedTLS MICROPY_SSL_MBEDTLS_INCLUDE ?= $(TOP)/lib/mbedtls/include @@ -100,9 +105,45 @@ $(BUILD)/$(BTREE_DIR)/%.o: CFLAGS += -Wno-old-style-definition -Wno-sign-compare $(BUILD)/extmod/modbtree.o: CFLAGS += $(BTREE_DEFS) endif +ifeq ($(CIRCUITPY_ULAB),1) +SRC_MOD += $(addprefix extmod/ulab/code/, \ +create.c \ +extras.c \ +fft.c \ +filter.c \ +linalg.c \ +ndarray.c \ +numerical.c \ +poly.c \ +ulab.c \ +vectorise.c \ + ) +CFLAGS_MOD += -DCIRCUITPY_ULAB=1 -DMODULE_ULAB_ENABLED=1 +$(BUILD)/extmod/ulab/code/%.o: CFLAGS += -Wno-sign-compare -Wno-missing-prototypes -Wno-unused-parameter -Wno-missing-declarations -Wno-error -Wno-shadow -Wno-maybe-uninitialized -DCIRCUITPY +endif + +# External modules written in C. +ifneq ($(USER_C_MODULES),) +# pre-define USERMOD variables as expanded so that variables are immediate +# expanded as they're added to them +SRC_USERMOD := +CFLAGS_USERMOD := +LDFLAGS_USERMOD := +$(foreach module, $(wildcard $(USER_C_MODULES)/*/micropython.mk), \ + $(eval USERMOD_DIR = $(patsubst %/,%,$(dir $(module))))\ + $(info Including User C Module from $(USERMOD_DIR))\ + $(eval include $(module))\ +) + +SRC_MOD += $(patsubst $(USER_C_MODULES)/%.c,%.c,$(SRC_USERMOD)) +CFLAGS_MOD += $(CFLAGS_USERMOD) +LDFLAGS_MOD += $(LDFLAGS_USERMOD) +endif + # py object files -PY_O_BASENAME = \ +PY_CORE_O_BASENAME = $(addprefix py/,\ mpstate.o \ + nlr.o \ nlrx86.o \ nlrx64.o \ nlrthumb.o \ @@ -111,6 +152,7 @@ PY_O_BASENAME = \ malloc.o \ gc.o \ gc_long_lived.o \ + pystack.o \ qstr.o \ vstr.o \ mpprint.o \ @@ -157,6 +199,7 @@ PY_O_BASENAME = \ objcell.o \ objclosure.o \ objcomplex.o \ + objdeque.o \ objdict.o \ objenumerate.o \ objexcept.o \ @@ -188,6 +231,8 @@ PY_O_BASENAME = \ objtype.o \ objzip.o \ opmethods.o \ + proto.o \ + reload.o \ sequence.o \ stream.o \ binary.o \ @@ -212,41 +257,43 @@ PY_O_BASENAME = \ repl.o \ smallint.o \ frozenmod.o \ - ../extmod/moductypes.o \ - ../extmod/modujson.o \ - ../extmod/modure.o \ - ../extmod/moduzlib.o \ - ../extmod/moduheapq.o \ - ../extmod/modutimeq.o \ - ../extmod/moduhashlib.o \ - ../extmod/modubinascii.o \ - ../extmod/virtpin.o \ - ../extmod/machine_mem.o \ - ../extmod/machine_pinbase.o \ - ../extmod/machine_signal.o \ - ../extmod/machine_pulse.o \ - ../extmod/machine_i2c.o \ - ../extmod/machine_spi.o \ - ../extmod/modussl_axtls.o \ - ../extmod/modussl_mbedtls.o \ - ../extmod/modurandom.o \ - ../extmod/moduselect.o \ - ../extmod/modwebsocket.o \ - ../extmod/modwebrepl.o \ - ../extmod/modframebuf.o \ - ../extmod/vfs.o \ - ../extmod/vfs_reader.o \ - ../extmod/vfs_fat.o \ - ../extmod/vfs_fat_diskio.o \ - ../extmod/vfs_fat_file.o \ - ../extmod/vfs_fat_misc.o \ - ../extmod/utime_mphal.o \ - ../extmod/uos_dupterm.o \ - ../lib/embed/abort_.o \ - ../lib/utils/printf.o \ + ) + +PY_EXTMOD_O_BASENAME = \ + extmod/moductypes.o \ + extmod/modujson.o \ + extmod/modure.o \ + extmod/moduzlib.o \ + extmod/moduheapq.o \ + extmod/modutimeq.o \ + extmod/moduhashlib.o \ + extmod/modubinascii.o \ + extmod/virtpin.o \ + extmod/modussl_axtls.o \ + extmod/modussl_mbedtls.o \ + extmod/modurandom.o \ + extmod/moduselect.o \ + extmod/modwebsocket.o \ + extmod/modwebrepl.o \ + extmod/modframebuf.o \ + extmod/vfs.o \ + extmod/vfs_reader.o \ + extmod/vfs_posix.o \ + extmod/vfs_posix_file.o \ + extmod/vfs_fat.o \ + extmod/vfs_fat_diskio.o \ + extmod/vfs_fat_file.o \ + extmod/utime_mphal.o \ + extmod/uos_dupterm.o \ + lib/embed/abort_.o \ + lib/utils/printf.o \ # prepend the build destination prefix to the py object files -PY_O = $(addprefix $(PY_BUILD)/, $(PY_O_BASENAME)) +PY_CORE_O = $(addprefix $(BUILD)/, $(PY_CORE_O_BASENAME)) +PY_EXTMOD_O = $(addprefix $(BUILD)/, $(PY_EXTMOD_O_BASENAME)) + +# this is a convenience variable for ports that want core, extmod and frozen code +PY_O = $(PY_CORE_O) $(PY_EXTMOD_O) # object file for frozen files ifneq ($(FROZEN_DIR),) @@ -262,61 +309,75 @@ PY_O += $(BUILD)/frozen_mpy.o endif # Sources that may contain qstrings -SRC_QSTR_IGNORE = nlr% emitnx86% emitnx64% emitnthumb% emitnarm% emitnxtensa% -SRC_QSTR = $(SRC_MOD) $(addprefix py/,$(filter-out $(SRC_QSTR_IGNORE),$(PY_O_BASENAME:.o=.c)) emitnative.c) +SRC_QSTR_IGNORE = py/nlr% +SRC_QSTR_EMITNATIVE = py/emitn% +SRC_QSTR = $(SRC_MOD) $(filter-out $(SRC_QSTR_IGNORE),$(PY_CORE_O_BASENAME:.o=.c)) $(PY_EXTMOD_O_BASENAME:.o=.c) +# Sources that only hold QSTRs after pre-processing. +SRC_QSTR_PREPROCESSOR = $(addprefix $(TOP)/, $(filter $(SRC_QSTR_EMITNATIVE),$(PY_CORE_O_BASENAME:.o=.c))) # Anything that depends on FORCE will be considered out-of-date FORCE: .PHONY: FORCE $(HEADER_BUILD)/mpversion.h: FORCE | $(HEADER_BUILD) - $(Q)$(PYTHON) $(PY_SRC)/makeversionhdr.py $@ + $(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(PY_SRC)/makeversionhdr.py $@ + +# build a list of registered modules for py/objmodule.c. +$(HEADER_BUILD)/moduledefs.h: $(SRC_QSTR) $(QSTR_GLOBAL_DEPENDENCIES) | $(HEADER_BUILD)/mpversion.h + @$(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(PY_SRC)/makemoduledefs.py --vpath="., $(TOP), $(USER_C_MODULES)" $(SRC_QSTR) > $@ + +SRC_QSTR += $(HEADER_BUILD)/moduledefs.h # mpconfigport.mk is optional, but changes to it may drastically change # overall config, so they need to be caught MPCONFIGPORT_MK = $(wildcard mpconfigport.mk) +$(HEADER_BUILD)/$(TRANSLATION).mo: $(TOP)/locale/$(TRANSLATION).po | $(HEADER_BUILD) + $(Q)msgfmt -o $@ $^ + +$(HEADER_BUILD)/qstrdefs.preprocessed.h: $(PY_QSTR_DEFS) $(QSTR_DEFS) $(QSTR_DEFS_COLLECTED) mpconfigport.h $(MPCONFIGPORT_MK) $(PY_SRC)/mpconfig.h | $(HEADER_BUILD) + $(STEPECHO) "GEN $@" + $(Q)cat $(PY_QSTR_DEFS) $(QSTR_DEFS) $(QSTR_DEFS_COLLECTED) | $(SED) 's/^Q(.*)/"&"/' | $(CPP) $(CFLAGS) - | $(SED) 's/^"\(Q(.*)\)"/\1/' > $@ + # qstr data +$(HEADER_BUILD)/qstrdefs.enum.h: $(PY_SRC)/makeqstrdata.py $(HEADER_BUILD)/qstrdefs.preprocessed.h + $(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(PY_SRC)/makeqstrdata.py $(HEADER_BUILD)/qstrdefs.preprocessed.h > $@ + # Adding an order only dependency on $(HEADER_BUILD) causes $(HEADER_BUILD) to get # created before we run the script to generate the .h # Note: we need to protect the qstr names from the preprocessor, so we wrap # the lines in "" and then unwrap after the preprocessor is finished. -$(HEADER_BUILD)/qstrdefs.generated.h: $(PY_QSTR_DEFS) $(QSTR_DEFS) $(QSTR_DEFS_COLLECTED) $(PY_SRC)/makeqstrdata.py mpconfigport.h $(MPCONFIGPORT_MK) $(PY_SRC)/mpconfig.h | $(HEADER_BUILD) - $(ECHO) "GEN $@" - $(Q)cat $(PY_QSTR_DEFS) $(QSTR_DEFS) $(QSTR_DEFS_COLLECTED) | $(SED) 's/^Q(.*)/"&"/' | $(CPP) $(CFLAGS) - | $(SED) 's/^"\(Q(.*)\)"/\1/' > $(HEADER_BUILD)/qstrdefs.preprocessed.h - $(Q)$(PYTHON) $(PY_SRC)/makeqstrdata.py $(HEADER_BUILD)/qstrdefs.preprocessed.h > $@ +$(HEADER_BUILD)/qstrdefs.generated.h: $(PY_SRC)/makeqstrdata.py $(HEADER_BUILD)/$(TRANSLATION).mo $(HEADER_BUILD)/qstrdefs.preprocessed.h + $(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(PY_SRC)/makeqstrdata.py --compression_filename $(HEADER_BUILD)/compression.generated.h --translation $(HEADER_BUILD)/$(TRANSLATION).mo $(HEADER_BUILD)/qstrdefs.preprocessed.h > $@ + +$(PY_BUILD)/qstr.o: $(HEADER_BUILD)/qstrdefs.generated.h # Force nlr code to always be compiled with space-saving optimisation so # that the function preludes are of a minimal and predictable form. $(PY_BUILD)/nlr%.o: CFLAGS += -Os -# emitters - -$(PY_BUILD)/emitnx64.o: CFLAGS += -DN_X64 -$(PY_BUILD)/emitnx64.o: py/emitnative.c - $(call compile_c) - -$(PY_BUILD)/emitnx86.o: CFLAGS += -DN_X86 -$(PY_BUILD)/emitnx86.o: py/emitnative.c - $(call compile_c) - -$(PY_BUILD)/emitnthumb.o: CFLAGS += -DN_THUMB -$(PY_BUILD)/emitnthumb.o: py/emitnative.c - $(call compile_c) - -$(PY_BUILD)/emitnarm.o: CFLAGS += -DN_ARM -$(PY_BUILD)/emitnarm.o: py/emitnative.c - $(call compile_c) - -$(PY_BUILD)/emitnxtensa.o: CFLAGS += -DN_XTENSA -$(PY_BUILD)/emitnxtensa.o: py/emitnative.c - $(call compile_c) - # optimising gc for speed; 5ms down to 4ms on pybv2 +ifndef SUPEROPT_GC + SUPEROPT_GC = 1 +endif + +ifeq ($(SUPEROPT_GC),1) $(PY_BUILD)/gc.o: CFLAGS += $(CSUPEROPT) +endif # optimising vm for speed, adds only a small amount to code size but makes a huge difference to speed (20% faster) +ifndef SUPEROPT_VM + SUPEROPT_VM = 1 +endif + +ifeq ($(SUPEROPT_VM),1) $(PY_BUILD)/vm.o: CFLAGS += $(CSUPEROPT) +endif + # Optimizing vm.o for modern deeply pipelined CPUs with branch predictors # may require disabling tail jump optimization. This will make sure that # each opcode has its own dispatching jump which will improve branch diff --git a/py/pystack.c b/py/pystack.c new file mode 100644 index 0000000000000..552e59d537445 --- /dev/null +++ b/py/pystack.c @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" + +#if MICROPY_ENABLE_PYSTACK + +void mp_pystack_init(void *start, void *end) { + MP_STATE_THREAD(pystack_start) = start; + MP_STATE_THREAD(pystack_end) = end; + MP_STATE_THREAD(pystack_cur) = start; +} + +void *mp_pystack_alloc(size_t n_bytes) { + n_bytes = (n_bytes + (MICROPY_PYSTACK_ALIGN - 1)) & ~(MICROPY_PYSTACK_ALIGN - 1); + #if MP_PYSTACK_DEBUG + n_bytes += MICROPY_PYSTACK_ALIGN; + #endif + if (MP_STATE_THREAD(pystack_cur) + n_bytes > MP_STATE_THREAD(pystack_end)) { + // out of memory in the pystack + nlr_raise(mp_obj_new_exception_arg1(&mp_type_RuntimeError, + MP_OBJ_NEW_QSTR(MP_QSTR_pystack_space_exhausted))); + } + void *ptr = MP_STATE_THREAD(pystack_cur); + MP_STATE_THREAD(pystack_cur) += n_bytes; + #if MP_PYSTACK_DEBUG + *(size_t*)(MP_STATE_THREAD(pystack_cur) - MICROPY_PYSTACK_ALIGN) = n_bytes; + #endif + return ptr; +} + +#endif diff --git a/py/pystack.h b/py/pystack.h new file mode 100644 index 0000000000000..82ac3743d1c65 --- /dev/null +++ b/py/pystack.h @@ -0,0 +1,123 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_PY_PYSTACK_H +#define MICROPY_INCLUDED_PY_PYSTACK_H + +#include "py/mpstate.h" + +// Enable this debugging option to check that the amount of memory freed is +// consistent with amounts that were previously allocated. +#define MP_PYSTACK_DEBUG (0) + +#if MICROPY_ENABLE_PYSTACK + +void mp_pystack_init(void *start, void *end); +void *mp_pystack_alloc(size_t n_bytes); + +// This function can free multiple continuous blocks at once: just pass the +// pointer to the block that was allocated first and it and all subsequently +// allocated blocks will be freed. +static inline void mp_pystack_free(void *ptr) { + assert((uint8_t*)ptr >= MP_STATE_THREAD(pystack_start)); + assert((uint8_t*)ptr <= MP_STATE_THREAD(pystack_cur)); + #if MP_PYSTACK_DEBUG + size_t n_bytes_to_free = MP_STATE_THREAD(pystack_cur) - (uint8_t*)ptr; + size_t n_bytes = *(size_t*)(MP_STATE_THREAD(pystack_cur) - MICROPY_PYSTACK_ALIGN); + while (n_bytes < n_bytes_to_free) { + n_bytes += *(size_t*)(MP_STATE_THREAD(pystack_cur) - n_bytes - MICROPY_PYSTACK_ALIGN); + } + if (n_bytes != n_bytes_to_free) { + mp_printf(&mp_plat_print, "mp_pystack_free() failed: %u != %u\n", (uint)n_bytes_to_free, + (uint)*(size_t*)(MP_STATE_THREAD(pystack_cur) - MICROPY_PYSTACK_ALIGN)); + assert(0); + } + #endif + MP_STATE_THREAD(pystack_cur) = (uint8_t*)ptr; +} + +static inline void mp_pystack_realloc(void *ptr, size_t n_bytes) { + mp_pystack_free(ptr); + mp_pystack_alloc(n_bytes); +} + +static inline size_t mp_pystack_usage(void) { + return MP_STATE_THREAD(pystack_cur) - MP_STATE_THREAD(pystack_start); +} + +static inline size_t mp_pystack_limit(void) { + return MP_STATE_THREAD(pystack_end) - MP_STATE_THREAD(pystack_start); +} + +#endif + +#if !MICROPY_ENABLE_PYSTACK + +#define mp_local_alloc(n_bytes) alloca(n_bytes) + +static inline void mp_local_free(void *ptr) { + (void)ptr; +} + +static inline void *mp_nonlocal_alloc(size_t n_bytes) { + return m_new(uint8_t, n_bytes); +} + +static inline void *mp_nonlocal_realloc(void *ptr, size_t old_n_bytes, size_t new_n_bytes) { + return m_renew(uint8_t, ptr, old_n_bytes, new_n_bytes); +} + +static inline void mp_nonlocal_free(void *ptr, size_t n_bytes) { + m_del(uint8_t, ptr, n_bytes); +} + +#else + +static inline void *mp_local_alloc(size_t n_bytes) { + return mp_pystack_alloc(n_bytes); +} + +static inline void mp_local_free(void *ptr) { + mp_pystack_free(ptr); +} + +static inline void *mp_nonlocal_alloc(size_t n_bytes) { + return mp_pystack_alloc(n_bytes); +} + +static inline void *mp_nonlocal_realloc(void *ptr, size_t old_n_bytes, size_t new_n_bytes) { + (void)old_n_bytes; + mp_pystack_realloc(ptr, new_n_bytes); + return ptr; +} + +static inline void mp_nonlocal_free(void *ptr, size_t n_bytes) { + (void)n_bytes; + mp_pystack_free(ptr); +} + +#endif + +#endif // MICROPY_INCLUDED_PY_PYSTACK_H diff --git a/py/qstr.c b/py/qstr.c old mode 100644 new mode 100755 index 49b2d9daaa83c..bb80244355331 --- a/py/qstr.c +++ b/py/qstr.c @@ -33,6 +33,8 @@ #include "py/qstr.h" #include "py/gc.h" +#include "supervisor/linker.h" + // NOTE: we are using linear arrays to store and search for qstr's (unique strings, interned strings) // ultimately we will replace this with a static hash table of some kind // also probably need to include the length in the string data, to allow null bytes in the string @@ -104,7 +106,9 @@ const qstr_pool_t mp_qstr_const_pool = { { #ifndef NO_QSTR #define QDEF(id, str) str, +#define TRANSLATION(id, length, compressed...) #include "genhdr/qstrdefs.generated.h" +#undef TRANSLATION #undef QDEF #endif }, @@ -128,14 +132,12 @@ void qstr_init(void) { STATIC const byte *find_qstr(qstr q) { // search pool for this qstr - for (qstr_pool_t *pool = MP_STATE_VM(last_pool); pool != NULL; pool = pool->prev) { - if (q >= pool->total_prev_len) { - return pool->qstrs[q - pool->total_prev_len]; - } + // total_prev_len==0 in the final pool, so the loop will always terminate + qstr_pool_t *pool = MP_STATE_VM(last_pool); + while (q < pool->total_prev_len) { + pool = pool->prev; } - - // not found - return 0; + return pool->qstrs[q - pool->total_prev_len]; } // qstr_mutex must be taken while in this function @@ -144,14 +146,18 @@ STATIC qstr qstr_add(const byte *q_ptr) { // make sure we have room in the pool for a new qstr if (MP_STATE_VM(last_pool)->len >= MP_STATE_VM(last_pool)->alloc) { - qstr_pool_t *pool = m_new_ll_obj_var_maybe(qstr_pool_t, const char*, MP_STATE_VM(last_pool)->alloc * 2); + uint32_t new_pool_length = MP_STATE_VM(last_pool)->alloc * 2; + if (new_pool_length > MICROPY_QSTR_POOL_MAX_ENTRIES) { + new_pool_length = MICROPY_QSTR_POOL_MAX_ENTRIES; + } + qstr_pool_t *pool = m_new_ll_obj_var_maybe(qstr_pool_t, const char*, new_pool_length); if (pool == NULL) { QSTR_EXIT(); - m_malloc_fail(MP_STATE_VM(last_pool)->alloc * 2); + m_malloc_fail(new_pool_length); } pool->prev = MP_STATE_VM(last_pool); pool->total_prev_len = MP_STATE_VM(last_pool)->total_prev_len + MP_STATE_VM(last_pool)->len; - pool->alloc = MP_STATE_VM(last_pool)->alloc * 2; + pool->alloc = new_pool_length; pool->len = 0; MP_STATE_VM(last_pool) = pool; DEBUG_printf("QSTR: allocate new pool of size %d\n", MP_STATE_VM(last_pool)->alloc); @@ -244,30 +250,7 @@ qstr qstr_from_strn(const char *str, size_t len) { return q; } -byte *qstr_build_start(size_t len, byte **q_ptr) { - assert(len < (1 << (8 * MICROPY_QSTR_BYTES_IN_LEN))); - *q_ptr = m_new(byte, MICROPY_QSTR_BYTES_IN_HASH + MICROPY_QSTR_BYTES_IN_LEN + len + 1); - Q_SET_LENGTH(*q_ptr, len); - return Q_GET_DATA(*q_ptr); -} - -qstr qstr_build_end(byte *q_ptr) { - QSTR_ENTER(); - qstr q = qstr_find_strn((const char*)Q_GET_DATA(q_ptr), Q_GET_LENGTH(q_ptr)); - if (q == 0) { - size_t len = Q_GET_LENGTH(q_ptr); - mp_uint_t hash = qstr_compute_hash(Q_GET_DATA(q_ptr), len); - Q_SET_HASH(q_ptr, hash); - q_ptr[MICROPY_QSTR_BYTES_IN_HASH + MICROPY_QSTR_BYTES_IN_LEN + len] = '\0'; - q = qstr_add(gc_make_long_lived(q_ptr)); - } else { - m_del(byte, q_ptr, Q_GET_ALLOC(q_ptr)); - } - QSTR_EXIT(); - return q; -} - -mp_uint_t qstr_hash(qstr q) { +mp_uint_t PLACE_IN_ITCM(qstr_hash)(qstr q) { return Q_GET_HASH(find_qstr(q)); } diff --git a/py/qstr.h b/py/qstr.h index e2bdcc351e238..39b904fb18aec 100644 --- a/py/qstr.h +++ b/py/qstr.h @@ -38,9 +38,9 @@ // first entry in enum will be MP_QSTR_NULL=0, which indicates invalid/no qstr enum { #ifndef NO_QSTR -#define QDEF(id, str) id, -#include "genhdr/qstrdefs.generated.h" -#undef QDEF +#define QENUM(id) id, +#include "genhdr/qstrdefs.enum.h" +#undef QENUM #endif MP_QSTRnumber_of, // no underscore so it can't clash with any of the above }; @@ -56,6 +56,7 @@ typedef struct _qstr_pool_t { } qstr_pool_t; #define QSTR_FROM_STR_STATIC(s) (qstr_from_strn((s), strlen(s))) +#define QSTR_TOTAL() (MP_STATE_VM(last_pool)->total_prev_len + MP_STATE_VM(last_pool)->len) void qstr_init(void); @@ -65,9 +66,6 @@ qstr qstr_find_strn(const char *str, size_t str_len); // returns MP_QSTR_NULL if qstr qstr_from_str(const char *str); qstr qstr_from_strn(const char *str, size_t len); -byte *qstr_build_start(size_t len, byte **q_ptr); -qstr qstr_build_end(byte *q_ptr); - mp_uint_t qstr_hash(qstr q); const char *qstr_str(qstr q); size_t qstr_len(qstr q); diff --git a/py/qstrdefs.h b/py/qstrdefs.h index 4ded5be084129..a609058120d7a 100644 --- a/py/qstrdefs.h +++ b/py/qstrdefs.h @@ -40,6 +40,7 @@ Q(/) Q(%#o) Q(%#x) Q({:#b}) +Q( ) Q(\n) Q(maximum recursion depth exceeded) Q() @@ -51,3 +52,7 @@ Q() Q() Q() Q(utf-8) + +#if MICROPY_ENABLE_PYSTACK +Q(pystack exhausted) +#endif diff --git a/py/reader.c b/py/reader.c index c4d18d53dcee8..80364104bb12b 100644 --- a/py/reader.c +++ b/py/reader.c @@ -124,6 +124,8 @@ void mp_reader_new_file_from_fd(mp_reader_t *reader, int fd, bool close_fd) { reader->close = mp_reader_posix_close; } +#if !MICROPY_VFS_POSIX +// If MICROPY_VFS_POSIX is defined then this function is provided by the VFS layer void mp_reader_new_file(mp_reader_t *reader, const char *filename) { int fd = open(filename, O_RDONLY, 0644); if (fd < 0) { @@ -131,5 +133,6 @@ void mp_reader_new_file(mp_reader_t *reader, const char *filename) { } mp_reader_new_file_from_fd(reader, fd, true); } +#endif #endif diff --git a/py/reload.c b/py/reload.c new file mode 100644 index 0000000000000..95305f2c9cfd4 --- /dev/null +++ b/py/reload.c @@ -0,0 +1,16 @@ +// +// Created by Roy Hooper on 2018-05-14. +// + +#include "reload.h" +#include "py/mpstate.h" + +void mp_raise_reload_exception(void) { + MP_STATE_VM(mp_pending_exception) = MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception)); +#if MICROPY_ENABLE_SCHEDULER + if (MP_STATE_VM(sched_state) == MP_SCHED_IDLE) { + MP_STATE_VM(sched_state) = MP_SCHED_PENDING; + } +#endif + +} diff --git a/py/reload.h b/py/reload.h new file mode 100644 index 0000000000000..72e84e5ca64fe --- /dev/null +++ b/py/reload.h @@ -0,0 +1,10 @@ +// +// Created by Roy Hooper on 2018-05-14. +// + +#ifndef CIRCUITPYTHON_RELOAD_H +#define CIRCUITPYTHON_RELOAD_H + +void mp_raise_reload_exception(void); + +#endif //CIRCUITPYTHON_RELOAD_H diff --git a/py/repl.c b/py/repl.c index 7e8922e19ac69..aa91c3f12e0c3 100644 --- a/py/repl.c +++ b/py/repl.c @@ -27,6 +27,7 @@ #include #include "py/obj.h" #include "py/runtime.h" +#include "py/builtin.h" #include "py/repl.h" #if MICROPY_HELPER_REPL @@ -105,8 +106,13 @@ bool mp_repl_continue_with_input(const char *input) { } } - // continue if unmatched brackets or quotes - if (n_paren > 0 || n_brack > 0 || n_brace > 0 || in_quote == Q_3_SINGLE || in_quote == Q_3_DOUBLE) { + // continue if unmatched 3-quotes + if (in_quote == Q_3_SINGLE || in_quote == Q_3_DOUBLE) { + return true; + } + + // continue if unmatched brackets, but only if not in a 1-quote + if ((n_paren > 0 || n_brack > 0 || n_brace > 0) && in_quote == Q_NONE) { return true; } @@ -136,8 +142,11 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print } } - // begin search in locals dict - mp_obj_dict_t *dict = mp_locals_get(); + size_t nqstr = QSTR_TOTAL(); + + // begin search in outer global dict which is accessed from __main__ + mp_obj_t obj = MP_OBJ_FROM_PTR(&mp_module___main__); + mp_obj_t dest[2]; for (;;) { // get next word in string to complete @@ -148,43 +157,20 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print size_t s_len = str - s_start; if (str < top) { - // a complete word, lookup in current dict - - mp_obj_t obj = MP_OBJ_NULL; - for (size_t i = 0; i < dict->map.alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(&dict->map, i)) { - size_t d_len; - const char *d_str = mp_obj_str_get_data(dict->map.table[i].key, &d_len); - if (s_len == d_len && strncmp(s_start, d_str, d_len) == 0) { - obj = dict->map.table[i].value; - break; - } - } + // a complete word, lookup in current object + qstr q = qstr_find_strn(s_start, s_len); + if (q == MP_QSTR_NULL) { + // lookup will fail + return 0; } + mp_load_method_protected(obj, q, dest, true); + obj = dest[0]; // attribute, method, or MP_OBJ_NULL if nothing found if (obj == MP_OBJ_NULL) { // lookup failed return 0; } - // found an object of this name; try to get its dict - if (MP_OBJ_IS_TYPE(obj, &mp_type_module)) { - dict = mp_obj_module_get_globals(obj); - } else { - mp_obj_type_t *type; - if (MP_OBJ_IS_TYPE(obj, &mp_type_type)) { - type = MP_OBJ_TO_PTR(obj); - } else { - type = mp_obj_get_type(obj); - } - if (type->locals_dict != NULL && type->locals_dict->base.type == &mp_type_dict) { - dict = type->locals_dict; - } else { - // obj has no dict - return 0; - } - } - // skip '.' to move to next word ++str; @@ -192,14 +178,20 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print // end of string, do completion on this partial name // look for matches - int n_found = 0; const char *match_str = NULL; size_t match_len = 0; - for (size_t i = 0; i < dict->map.alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(&dict->map, i)) { - size_t d_len; - const char *d_str = mp_obj_str_get_data(dict->map.table[i].key, &d_len); - if (s_len <= d_len && strncmp(s_start, d_str, s_len) == 0) { + qstr q_first = 0, q_last = 0; + for (qstr q = MP_QSTR_ + 1; q < nqstr; ++q) { + size_t d_len; + const char *d_str = (const char*)qstr_data(q, &d_len); + if (s_len <= d_len && strncmp(s_start, d_str, s_len) == 0) { + mp_load_method_protected(obj, q, dest, true); + if (dest[0] != MP_OBJ_NULL) { + // special case; filter out words that begin with underscore + // unless there's already a partial match + if (s_len == 0 && d_str[0] == '_') { + continue; + } if (match_str == NULL) { match_str = d_str; match_len = d_len; @@ -213,13 +205,20 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print } } } - ++n_found; + if (q_first == 0) { + q_first = q; + } + q_last = q; } } } // nothing found - if (n_found == 0) { + if (q_first == 0) { + if (s_len == 0) { + *compl_str = " "; + return 4; + } // If there're no better alternatives, and if it's first word // in the line, try to complete "import". if (s_start == org_str) { @@ -234,7 +233,7 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print } // 1 match found, or multiple matches with a common prefix - if (n_found == 1 || match_len > s_len) { + if (q_first == q_last || match_len > s_len) { *compl_str = match_str + s_len; return match_len - s_len; } @@ -245,11 +244,12 @@ size_t mp_repl_autocomplete(const char *str, size_t len, const mp_print_t *print #define MAX_LINE_LEN (4 * WORD_SLOT_LEN) int line_len = MAX_LINE_LEN; // force a newline for first word - for (size_t i = 0; i < dict->map.alloc; i++) { - if (MP_MAP_SLOT_IS_FILLED(&dict->map, i)) { - size_t d_len; - const char *d_str = mp_obj_str_get_data(dict->map.table[i].key, &d_len); - if (s_len <= d_len && strncmp(s_start, d_str, s_len) == 0) { + for (qstr q = q_first; q <= q_last; ++q) { + size_t d_len; + const char *d_str = (const char*)qstr_data(q, &d_len); + if (s_len <= d_len && strncmp(s_start, d_str, s_len) == 0) { + mp_load_method_protected(obj, q, dest, true); + if (dest[0] != MP_OBJ_NULL) { int gap = (line_len + WORD_SLOT_LEN - 1) / WORD_SLOT_LEN * WORD_SLOT_LEN - line_len; if (gap < 2) { gap += WORD_SLOT_LEN; diff --git a/py/ringbuf.h b/py/ringbuf.h index c62e20e1dbde4..7fc35d2661846 100644 --- a/py/ringbuf.h +++ b/py/ringbuf.h @@ -26,6 +26,8 @@ #ifndef MICROPY_INCLUDED_PY_RINGBUF_H #define MICROPY_INCLUDED_PY_RINGBUF_H +#include "py/gc.h" + #include typedef struct _ringbuf_t { @@ -40,9 +42,9 @@ typedef struct _ringbuf_t { // ringbuf_t buf = {buf_array, sizeof(buf_array)}; // Dynamic initialization. This creates root pointer! -#define ringbuf_alloc(r, sz) \ +#define ringbuf_alloc(r, sz, long_lived) \ { \ - (r)->buf = m_new(uint8_t, sz); \ + (r)->buf = gc_alloc(sz, false, long_lived); \ (r)->size = sz; \ (r)->iget = (r)->iput = 0; \ } @@ -71,4 +73,37 @@ static inline int ringbuf_put(ringbuf_t *r, uint8_t v) { return 0; } +static inline uint16_t ringbuf_count(ringbuf_t *r) +{ + volatile int count = r->iput - r->iget; + if ( count < 0 ) { + count += r->size; + } + + return (uint16_t) count; +} + +static inline void ringbuf_clear(ringbuf_t *r) +{ + r->iput = r->iget = 0; +} + +// will overwrite old data +static inline void ringbuf_put_n(ringbuf_t* r, uint8_t* buf, uint8_t bufsize) +{ + for(uint8_t i=0; i < bufsize; i++) { + if ( ringbuf_put(r, buf[i]) < 0 ) { + // if full overwrite old data + (void) ringbuf_get(r); + ringbuf_put(r, buf[i]); + } + } +} + +static inline void ringbuf_get_n(ringbuf_t* r, uint8_t* buf, uint8_t bufsize) +{ + for(uint8_t i=0; i < bufsize; i++) { + buf[i] = ringbuf_get(r); + } +} #endif // MICROPY_INCLUDED_PY_RINGBUF_H diff --git a/py/runtime.c b/py/runtime.c index cbec82f17c7a6..59dcbc7a1c8c8 100644 --- a/py/runtime.c +++ b/py/runtime.c @@ -29,12 +29,12 @@ #include #include + #include "extmod/vfs.h" -// #include "py/mpstate.h" -// #include "py/nlr.h" #include "py/parsenum.h" #include "py/compile.h" +#include "py/mperrno.h" #include "py/objstr.h" #include "py/objtuple.h" #include "py/objtype.h" @@ -47,6 +47,8 @@ #include "py/stackctrl.h" #include "py/gc.h" +#include "supervisor/shared/translate.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #define DEBUG_printf DEBUG_printf @@ -84,13 +86,21 @@ void mp_init(void) { MP_STATE_VM(mp_kbd_exception).args = (mp_obj_tuple_t*)&mp_const_empty_tuple_obj; #endif + MP_STATE_VM(mp_reload_exception).base.type = &mp_type_ReloadException; + MP_STATE_VM(mp_reload_exception).traceback_alloc = 0; + MP_STATE_VM(mp_reload_exception).traceback_len = 0; + MP_STATE_VM(mp_reload_exception).traceback_data = NULL; + MP_STATE_VM(mp_reload_exception).args = (mp_obj_tuple_t*)&mp_const_empty_tuple_obj; + // call port specific initialization if any #ifdef MICROPY_PORT_INIT_FUNC MICROPY_PORT_INIT_FUNC; #endif + #if MICROPY_ENABLE_COMPILER // optimization disabled by default MP_STATE_VM(mp_optimise_value) = 0; + #endif // init global module dict mp_obj_dict_init(&MP_STATE_VM(mp_loaded_modules_dict), 3); @@ -108,7 +118,7 @@ void mp_init(void) { MP_STATE_VM(mp_module_builtins_override_dict) = NULL; #endif - #ifdef MICROPY_PY_OS_DUPTERM + #if MICROPY_PY_OS_DUPTERM for (size_t i = 0; i < MICROPY_PY_OS_DUPTERM; ++i) { MP_STATE_VM(dupterm_objs[i]) = MP_OBJ_NULL; } @@ -121,31 +131,6 @@ void mp_init(void) { sizeof(MP_STATE_VM(fs_user_mount)) - MICROPY_FATFS_NUM_PERSISTENT); #endif - #if MICROPY_VFS - #if MICROPY_FATFS_NUM_PERSISTENT > 0 - // We preserve the last MICROPY_FATFS_NUM_PERSISTENT mounts because newer - // mounts are put at the front of the list. - mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); - // Count how many mounts we have. - uint8_t count = 0; - while (vfs != NULL) { - vfs = vfs->next; - count++; - } - // Find the vfs MICROPY_FATFS_NUM_PERSISTENT mounts from the end. - vfs = MP_STATE_VM(vfs_mount_table); - for (uint8_t j = 0; j < count - MICROPY_FATFS_NUM_PERSISTENT; j++) { - vfs = vfs->next; - } - MP_STATE_VM(vfs_mount_table) = vfs; - MP_STATE_VM(vfs_cur) = vfs; - #else - // initialise the VFS sub-system - MP_STATE_VM(vfs_cur) = NULL; - MP_STATE_VM(vfs_mount_table) = NULL; - #endif - #endif - #if MICROPY_PY_THREAD_GIL mp_thread_mutex_init(&MP_STATE_VM(gil_mutex)); #endif @@ -193,10 +178,10 @@ mp_obj_t mp_load_global(qstr qst) { elem = mp_map_lookup((mp_map_t*)&mp_module_builtins_globals.map, MP_OBJ_NEW_QSTR(qst), MP_MAP_LOOKUP); if (elem == NULL) { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_msg(&mp_type_NameError, "name not defined"); + mp_raise_msg(&mp_type_NameError, translate("name not defined")); } else { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_NameError, - "name '%q' is not defined", qst)); + translate("name '%q' is not defined"), qst)); } } } @@ -217,7 +202,7 @@ mp_obj_t mp_load_build_class(void) { return MP_OBJ_FROM_PTR(&mp_builtin___build_class___obj); } -void mp_store_name(qstr qst, mp_obj_t obj) { +void PLACE_IN_ITCM(mp_store_name)(qstr qst, mp_obj_t obj) { DEBUG_OP_printf("store name %s <- %p\n", qstr_str(qst), obj); mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst), obj); } @@ -228,7 +213,7 @@ void mp_delete_name(qstr qst) { mp_obj_dict_delete(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst)); } -void mp_store_global(qstr qst, mp_obj_t obj) { +void PLACE_IN_ITCM(mp_store_global)(qstr qst, mp_obj_t obj) { DEBUG_OP_printf("store global %s <- %p\n", qstr_str(qst), obj); mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_globals_get()), MP_OBJ_NEW_QSTR(qst), obj); } @@ -240,7 +225,7 @@ void mp_delete_global(qstr qst) { } mp_obj_t mp_unary_op(mp_unary_op_t op, mp_obj_t arg) { - DEBUG_OP_printf("unary " UINT_FMT " %p\n", op, arg); + DEBUG_OP_printf("unary " UINT_FMT " %q %p\n", op, mp_unary_op_method_name[op], arg); if (op == MP_UNARY_OP_NOT) { // "not x" is the negative of whether "x" is true per Python semantics @@ -291,17 +276,17 @@ mp_obj_t mp_unary_op(mp_unary_op_t op, mp_obj_t arg) { } } if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("unsupported type for operator"); + mp_raise_TypeError(translate("unsupported type for operator")); } else { mp_raise_TypeError_varg( - "unsupported type for %q: '%s'", + translate("unsupported type for %q: '%s'"), mp_unary_op_method_name[op], mp_obj_get_type_str(arg)); } } } -mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { - DEBUG_OP_printf("binary " UINT_FMT " %p %p\n", op, lhs, rhs); +mp_obj_t PLACE_IN_ITCM(mp_binary_op)(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { + DEBUG_OP_printf("binary " UINT_FMT " %q %p %p\n", op, mp_binary_op_method_name[op], lhs, rhs); // TODO correctly distinguish inplace operators for mutable objects // lookup logic that CPython uses for +=: @@ -383,7 +368,7 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { case MP_BINARY_OP_INPLACE_LSHIFT: { if (rhs_val < 0) { // negative shift not allowed - mp_raise_ValueError("negative shift count"); + mp_raise_ValueError(translate("negative shift count")); } else if (rhs_val >= (mp_int_t)BITS_PER_WORD || lhs_val > (MP_SMALL_INT_MAX >> rhs_val) || lhs_val < (MP_SMALL_INT_MIN >> rhs_val)) { // left-shift will overflow, so use higher precision integer lhs = mp_obj_new_int_from_ll(lhs_val); @@ -398,7 +383,7 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { case MP_BINARY_OP_INPLACE_RSHIFT: if (rhs_val < 0) { // negative shift not allowed - mp_raise_ValueError("negative shift count"); + mp_raise_ValueError(translate("negative shift count")); } else { // standard precision is enough for right-shift if (rhs_val >= (mp_int_t)BITS_PER_WORD) { @@ -439,7 +424,6 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { // use standard precision return MP_OBJ_NEW_SMALL_INT(lhs_val * rhs_val); } - break; } case MP_BINARY_OP_FLOOR_DIVIDE: case MP_BINARY_OP_INPLACE_FLOOR_DIVIDE: @@ -474,7 +458,7 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { lhs = mp_obj_new_float(lhs_val); goto generic_binary_op; #else - mp_raise_ValueError("negative power with no float support"); + mp_raise_ValueError(translate("negative power with no float support")); #endif } else { mp_int_t ans = 1; @@ -514,10 +498,10 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { return MP_OBJ_FROM_PTR(tuple); } - case MP_BINARY_OP_LESS: return mp_obj_new_bool(lhs_val < rhs_val); break; - case MP_BINARY_OP_MORE: return mp_obj_new_bool(lhs_val > rhs_val); break; - case MP_BINARY_OP_LESS_EQUAL: return mp_obj_new_bool(lhs_val <= rhs_val); break; - case MP_BINARY_OP_MORE_EQUAL: return mp_obj_new_bool(lhs_val >= rhs_val); break; + case MP_BINARY_OP_LESS: return mp_obj_new_bool(lhs_val < rhs_val); + case MP_BINARY_OP_MORE: return mp_obj_new_bool(lhs_val > rhs_val); + case MP_BINARY_OP_LESS_EQUAL: return mp_obj_new_bool(lhs_val <= rhs_val); + case MP_BINARY_OP_MORE_EQUAL: return mp_obj_new_bool(lhs_val >= rhs_val); default: goto unsupported_op; @@ -549,38 +533,12 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { } } - /* deal with `in` - * - * NOTE `a in b` is `b.__contains__(a)`, hence why the generic dispatch - * needs to go below with swapped arguments - */ + // Convert MP_BINARY_OP_IN to MP_BINARY_OP_CONTAINS with swapped args. if (op == MP_BINARY_OP_IN) { - mp_obj_type_t *type = mp_obj_get_type(rhs); - if (type->binary_op != NULL) { - mp_obj_t res = type->binary_op(op, rhs, lhs); - if (res != MP_OBJ_NULL) { - return res; - } - } - if (type->getiter != NULL) { - /* second attempt, walk the iterator */ - mp_obj_iter_buf_t iter_buf; - mp_obj_t iter = mp_getiter(rhs, &iter_buf); - mp_obj_t next; - while ((next = mp_iternext(iter)) != MP_OBJ_STOP_ITERATION) { - if (mp_obj_equal(next, lhs)) { - return mp_const_true; - } - } - return mp_const_false; - } - - if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not iterable"); - } else { - mp_raise_TypeError_varg( - "'%s' object is not iterable", mp_obj_get_type_str(rhs)); - } + op = MP_BINARY_OP_CONTAINS; + mp_obj_t temp = lhs; + lhs = rhs; + rhs = temp; } // generic binary_op supplied by type @@ -609,17 +567,31 @@ mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { } #endif + if (op == MP_BINARY_OP_CONTAINS) { + // If type didn't support containment then explicitly walk the iterator. + // mp_getiter will raise the appropriate exception if lhs is not iterable. + mp_obj_iter_buf_t iter_buf; + mp_obj_t iter = mp_getiter(lhs, &iter_buf); + mp_obj_t next; + while ((next = mp_iternext(iter)) != MP_OBJ_STOP_ITERATION) { + if (mp_obj_equal(next, rhs)) { + return mp_const_true; + } + } + return mp_const_false; + } + unsupported_op: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("unsupported type for operator"); + mp_raise_TypeError(translate("unsupported type for operator")); } else { mp_raise_TypeError_varg( - "unsupported types for %q: '%s', '%s'", + translate("unsupported types for %q: '%s', '%s'"), mp_binary_op_method_name[op], mp_obj_get_type_str(lhs), mp_obj_get_type_str(rhs)); } zero_division: - mp_raise_msg(&mp_type_ZeroDivisionError, "division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } mp_obj_t mp_call_function_0(mp_obj_t fun) { @@ -653,9 +625,9 @@ mp_obj_t mp_call_function_n_kw(mp_obj_t fun_in, size_t n_args, size_t n_kw, cons } if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not callable"); + mp_raise_TypeError(translate("object not callable")); } else { - mp_raise_TypeError_varg("'%s' object is not callable", mp_obj_get_type_str(fun_in)); + mp_raise_TypeError_varg(translate("'%s' object is not callable"), mp_obj_get_type_str(fun_in)); } } @@ -671,7 +643,7 @@ mp_obj_t mp_call_method_n_kw(size_t n_args, size_t n_kw, const mp_obj_t *args) { #if !MICROPY_STACKLESS STATIC #endif -void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) { +void PLACE_IN_ITCM(mp_call_prepare_args_n_kw_var)(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) { mp_obj_t fun = *args++; mp_obj_t self = MP_OBJ_NULL; if (have_self) { @@ -706,7 +678,7 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ // allocate memory for the new array of args args2_alloc = 1 + n_args + 2 * (n_kw + kw_dict_len); - args2 = m_new(mp_obj_t, args2_alloc); + args2 = mp_nonlocal_alloc(args2_alloc * sizeof(mp_obj_t)); // copy the self if (self != MP_OBJ_NULL) { @@ -727,7 +699,7 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ // allocate memory for the new array of args args2_alloc = 1 + n_args + len + 2 * (n_kw + kw_dict_len); - args2 = m_new(mp_obj_t, args2_alloc); + args2 = mp_nonlocal_alloc(args2_alloc * sizeof(mp_obj_t)); // copy the self if (self != MP_OBJ_NULL) { @@ -743,7 +715,7 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ // allocate memory for the new array of args args2_alloc = 1 + n_args + 2 * (n_kw + kw_dict_len) + 3; - args2 = m_new(mp_obj_t, args2_alloc); + args2 = mp_nonlocal_alloc(args2_alloc * sizeof(mp_obj_t)); // copy the self if (self != MP_OBJ_NULL) { @@ -760,7 +732,7 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ mp_obj_t item; while ((item = mp_iternext(iterable)) != MP_OBJ_STOP_ITERATION) { if (args2_len >= args2_alloc) { - args2 = m_renew(mp_obj_t, args2, args2_alloc, args2_alloc * 2); + args2 = mp_nonlocal_realloc(args2, args2_alloc * sizeof(mp_obj_t), args2_alloc * 2 * sizeof(mp_obj_t)); args2_alloc *= 2; } args2[args2_len++] = item; @@ -786,8 +758,8 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ if (MP_MAP_SLOT_IS_FILLED(map, i)) { // the key must be a qstr, so intern it if it's a string mp_obj_t key = map->table[i].key; - if (MP_OBJ_IS_TYPE(key, &mp_type_str)) { - key = mp_obj_str_intern(key); + if (!MP_OBJ_IS_QSTR(key)) { + key = mp_obj_str_intern_checked(key); } args2[args2_len++] = key; args2[args2_len++] = map->table[i].value; @@ -811,13 +783,13 @@ void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ if (new_alloc < 4) { new_alloc = 4; } - args2 = m_renew(mp_obj_t, args2, args2_alloc, new_alloc); + args2 = mp_nonlocal_realloc(args2, args2_alloc * sizeof(mp_obj_t), new_alloc * sizeof(mp_obj_t)); args2_alloc = new_alloc; } // the key must be a qstr, so intern it if it's a string - if (MP_OBJ_IS_TYPE(key, &mp_type_str)) { - key = mp_obj_str_intern(key); + if (!MP_OBJ_IS_QSTR(key)) { + key = mp_obj_str_intern_checked(key); } // get the value corresponding to the key @@ -843,7 +815,7 @@ mp_obj_t mp_call_method_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_ob mp_call_prepare_args_n_kw_var(have_self, n_args_n_kw, args, &out_args); mp_obj_t res = mp_call_function_n_kw(out_args.fun, out_args.n_args, out_args.n_kw, out_args.args); - m_del(mp_obj_t, out_args.args, out_args.n_alloc); + mp_nonlocal_free(out_args.args, out_args.n_alloc * sizeof(mp_obj_t)); return res; } @@ -881,16 +853,16 @@ void mp_unpack_sequence(mp_obj_t seq_in, size_t num, mp_obj_t *items) { too_short: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_ValueError("wrong number of values to unpack"); + mp_raise_ValueError(translate("wrong number of values to unpack")); } else { - mp_raise_ValueError_varg("need more than %d values to unpack", + mp_raise_ValueError_varg(translate("need more than %d values to unpack"), (int)seq_len); } too_long: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_ValueError("wrong number of values to unpack"); + mp_raise_ValueError(translate("wrong number of values to unpack")); } else { - mp_raise_ValueError_varg("too many values to unpack (expected %d)", + mp_raise_ValueError_varg(translate("too many values to unpack (expected %d)"), (int)num); } } @@ -945,9 +917,9 @@ void mp_unpack_ex(mp_obj_t seq_in, size_t num_in, mp_obj_t *items) { too_short: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_ValueError("wrong number of values to unpack"); + mp_raise_ValueError(translate("wrong number of values to unpack")); } else { - mp_raise_ValueError_varg("need more than %d values to unpack", + mp_raise_ValueError_varg(translate("need more than %d values to unpack"), (int)seq_len); } } @@ -984,9 +956,9 @@ STATIC mp_obj_t checked_fun_call(mp_obj_t self_in, size_t n_args, size_t n_kw, c const mp_obj_type_t *arg0_type = mp_obj_get_type(args[0]); if (arg0_type != self->type) { if (MICROPY_ERROR_REPORTING != MICROPY_ERROR_REPORTING_DETAILED) { - mp_raise_TypeError("argument has wrong type"); + mp_raise_TypeError(translate("argument has wrong type")); } else { - mp_raise_TypeError_varg("argument should be a '%q' not a '%q'", + mp_raise_TypeError_varg(translate("argument should be a '%q' not a '%q'"), self->type->name, arg0_type->name); } } @@ -1054,7 +1026,8 @@ void mp_convert_member_lookup(mp_obj_t self, const mp_obj_type_t *type, mp_obj_t dest[1] = self; } #if MICROPY_PY_BUILTINS_PROPERTY - } else if (MP_OBJ_IS_TYPE(member, &mp_type_property) && mp_obj_is_native_type(type)) { + // If self is MP_OBJ_NULL, we looking at the class itself, not an instance. + } else if (MP_OBJ_IS_TYPE(member, &mp_type_property) && mp_obj_is_native_type(type) && self != MP_OBJ_NULL) { // object member is a property; delegate the load to the property // Note: This is an optimisation for code size and execution time. // The proper way to do it is have the functionality just below @@ -1064,7 +1037,7 @@ void mp_convert_member_lookup(mp_obj_t self, const mp_obj_type_t *type, mp_obj_t // the code. const mp_obj_t *proxy = mp_obj_property_get(member); if (proxy[0] == mp_const_none) { - mp_raise_AttributeError("unreadable attribute"); + mp_raise_AttributeError(translate("unreadable attribute")); } else { dest[0] = mp_call_function_n_kw(proxy[0], 1, 0, &self); } @@ -1122,22 +1095,38 @@ void mp_load_method(mp_obj_t base, qstr attr, mp_obj_t *dest) { if (dest[0] == MP_OBJ_NULL) { // no attribute/method called attr if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_AttributeError("no such attribute"); + mp_raise_AttributeError(translate("no such attribute")); } else { // following CPython, we give a more detailed error message for type objects if (MP_OBJ_IS_TYPE(base, &mp_type_type)) { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_AttributeError, - "type object '%q' has no attribute '%q'", + translate("type object '%q' has no attribute '%q'"), ((mp_obj_type_t*)MP_OBJ_TO_PTR(base))->name, attr)); } else { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_AttributeError, - "'%s' object has no attribute '%q'", + translate("'%s' object has no attribute '%q'"), mp_obj_get_type_str(base), attr)); } } } } +// Acts like mp_load_method_maybe but catches AttributeError, and all other exceptions if requested +void mp_load_method_protected(mp_obj_t obj, qstr attr, mp_obj_t *dest, bool catch_all_exc) { + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + mp_load_method_maybe(obj, attr, dest); + nlr_pop(); + } else { + if (!catch_all_exc + && !mp_obj_is_subclass_fast(MP_OBJ_FROM_PTR(((mp_obj_base_t*)nlr.ret_val)->type), + MP_OBJ_FROM_PTR(&mp_type_AttributeError))) { + // Re-raise the exception + nlr_raise(MP_OBJ_FROM_PTR(nlr.ret_val)); + } + } +} + void mp_store_attr(mp_obj_t base, qstr attr, mp_obj_t value) { DEBUG_OP_printf("store attr %p.%s <- %p\n", base, qstr_str(attr), value); mp_obj_type_t *type = mp_obj_get_type(base); @@ -1155,7 +1144,8 @@ void mp_store_attr(mp_obj_t base, qstr attr, mp_obj_t value) { assert(type->locals_dict->base.type == &mp_type_dict); // Micro Python restriction, for now mp_map_t *locals_map = &type->locals_dict->map; mp_map_elem_t *elem = mp_map_lookup(locals_map, MP_OBJ_NEW_QSTR(attr), MP_MAP_LOOKUP); - if (elem != NULL && MP_OBJ_IS_TYPE(elem->value, &mp_type_property)) { + // If base is MP_OBJ_NULL, we looking at the class itself, not an instance. + if (elem != NULL && MP_OBJ_IS_TYPE(elem->value, &mp_type_property) && base != MP_OBJ_NULL) { // attribute exists and is a property; delegate the store/delete // Note: This is an optimisation for code size and execution time. // The proper way to do it is have the functionality just below in @@ -1179,10 +1169,10 @@ void mp_store_attr(mp_obj_t base, qstr attr, mp_obj_t value) { #endif } if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_AttributeError("no such attribute"); + mp_raise_AttributeError(translate("no such attribute")); } else { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_AttributeError, - "'%s' object has no attribute '%q'", + translate("'%s' object cannot assign attribute '%q'"), mp_obj_get_type_str(base), attr)); } } @@ -1220,10 +1210,10 @@ mp_obj_t mp_getiter(mp_obj_t o_in, mp_obj_iter_buf_t *iter_buf) { // object not iterable if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not iterable"); + mp_raise_TypeError(translate("object not iterable")); } else { mp_raise_TypeError_varg( - "'%s' object is not iterable", mp_obj_get_type_str(o_in)); + translate("'%s' object is not iterable"), mp_obj_get_type_str(o_in)); } } @@ -1242,9 +1232,9 @@ mp_obj_t mp_iternext_allow_raise(mp_obj_t o_in) { return mp_call_method_n_kw(0, 0, dest); } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not an iterator"); + mp_raise_TypeError(translate("object not an iterator")); } else { - mp_raise_TypeError_varg("'%s' object is not an iterator", + mp_raise_TypeError_varg(translate("'%s' object is not an iterator"), mp_obj_get_type_str(o_in)); } } @@ -1278,9 +1268,9 @@ mp_obj_t mp_iternext(mp_obj_t o_in) { } } else { if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { - mp_raise_TypeError("object not an iterator"); + mp_raise_TypeError(translate("object not an iterator")); } else { - mp_raise_TypeError_varg("'%s' object is not an iterator", + mp_raise_TypeError_varg(translate("'%s' object is not an iterator"), mp_obj_get_type_str(o_in)); } } @@ -1298,13 +1288,12 @@ mp_vm_return_kind_t mp_resume(mp_obj_t self_in, mp_obj_t send_value, mp_obj_t th if (type->iternext != NULL && send_value == mp_const_none) { mp_obj_t ret = type->iternext(self_in); + *ret_val = ret; if (ret != MP_OBJ_STOP_ITERATION) { - *ret_val = ret; return MP_VM_RETURN_YIELD; } else { // Emulate raise StopIteration() // Special case, handled in vm.c - *ret_val = MP_OBJ_NULL; return MP_VM_RETURN_NORMAL; } } @@ -1366,7 +1355,7 @@ mp_vm_return_kind_t mp_resume(mp_obj_t self_in, mp_obj_t send_value, mp_obj_t th // will be propagated up. This behavior is approved by test_pep380.py // test_delegation_of_close_to_non_generator(), // test_delegating_throw_to_non_generator() - *ret_val = throw_value; + *ret_val = mp_make_raise_obj(throw_value); return MP_VM_RETURN_EXCEPTION; } } @@ -1384,7 +1373,7 @@ mp_obj_t mp_make_raise_obj(mp_obj_t o) { return o; } else { // o cannot be used as an exception, so return a type error (which will be raised by the caller) - return mp_obj_new_exception_msg(&mp_type_TypeError, "exceptions must derive from BaseException"); + return mp_obj_new_exception_msg(&mp_type_TypeError, translate("exceptions must derive from BaseException")); } } @@ -1413,13 +1402,15 @@ mp_obj_t mp_import_from(mp_obj_t module, qstr name) { if (dest[1] != MP_OBJ_NULL) { // Hopefully we can't import bound method from an object import_error: - mp_raise_msg_varg(&mp_type_ImportError, "cannot import name %q", name); + mp_raise_msg_varg(&mp_type_ImportError, translate("cannot import name %q"), name); } if (dest[0] != MP_OBJ_NULL) { return dest[0]; } + #if MICROPY_ENABLE_EXTERNAL_IMPORT + // See if it's a package, then can try FS import if (!mp_obj_is_package(module)) { goto import_error; @@ -1430,11 +1421,12 @@ mp_obj_t mp_import_from(mp_obj_t module, qstr name) { const char *pkg_name = mp_obj_str_get_data(dest[0], &pkg_name_len); const uint dot_name_len = pkg_name_len + 1 + qstr_len(name); - char *dot_name = alloca(dot_name_len); + char *dot_name = mp_local_alloc(dot_name_len); memcpy(dot_name, pkg_name, pkg_name_len); dot_name[pkg_name_len] = '.'; memcpy(dot_name + pkg_name_len + 1, qstr_str(name), qstr_len(name)); qstr dot_name_q = qstr_from_strn(dot_name, dot_name_len); + mp_local_free(dot_name); mp_obj_t args[5]; args[0] = MP_OBJ_NEW_QSTR(dot_name_q); @@ -1445,6 +1437,13 @@ mp_obj_t mp_import_from(mp_obj_t module, qstr name) { // TODO lookup __import__ and call that instead of going straight to builtin implementation return mp_builtin___import__(5, args); + + #else + + // Package import not supported with external imports disabled + goto import_error; + + #endif } void mp_import_all(mp_obj_t module) { @@ -1508,14 +1507,14 @@ NORETURN void m_malloc_fail(size_t num_bytes) { DEBUG_printf("memory allocation failed, allocating %u bytes\n", (uint)num_bytes); #if MICROPY_ENABLE_GC if (gc_is_locked()) { - mp_raise_msg(&mp_type_MemoryError, "memory allocation failed, heap is locked"); + mp_raise_msg(&mp_type_MemoryError, translate("memory allocation failed, heap is locked")); } #endif mp_raise_msg_varg(&mp_type_MemoryError, - "memory allocation failed, allocating %u bytes", (uint)num_bytes); + translate("memory allocation failed, allocating %u bytes"), (uint)num_bytes); } -NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const char *msg) { +NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg) { if (msg == NULL) { nlr_raise(mp_obj_new_exception(exc_type)); } else { @@ -1523,7 +1522,7 @@ NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const char *msg) { } } -NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const char *fmt, ...) { +NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, ...) { va_list argptr; va_start(argptr,fmt); mp_obj_t exception = mp_obj_new_exception_msg_vlist(exc_type, fmt, argptr); @@ -1531,27 +1530,27 @@ NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const char *fmt, nlr_raise(exception); } -NORETURN void mp_raise_AttributeError(const char *msg) { +NORETURN void mp_raise_AttributeError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_AttributeError, msg); } -NORETURN void mp_raise_RuntimeError(const char *msg) { +NORETURN void mp_raise_RuntimeError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_RuntimeError, msg); } -NORETURN void mp_raise_ImportError(const char *msg) { +NORETURN void mp_raise_ImportError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_ImportError, msg); } -NORETURN void mp_raise_IndexError(const char *msg) { +NORETURN void mp_raise_IndexError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_IndexError, msg); } -NORETURN void mp_raise_ValueError(const char *msg) { +NORETURN void mp_raise_ValueError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_ValueError, msg); } -NORETURN void mp_raise_ValueError_varg(const char *fmt, ...) { +NORETURN void mp_raise_ValueError_varg(const compressed_string_t *fmt, ...) { va_list argptr; va_start(argptr,fmt); mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_ValueError, fmt, argptr); @@ -1559,11 +1558,11 @@ NORETURN void mp_raise_ValueError_varg(const char *fmt, ...) { nlr_raise(exception); } -NORETURN void mp_raise_TypeError(const char *msg) { +NORETURN void mp_raise_TypeError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_TypeError, msg); } -NORETURN void mp_raise_TypeError_varg(const char *fmt, ...) { +NORETURN void mp_raise_TypeError_varg(const compressed_string_t *fmt, ...) { va_list argptr; va_start(argptr,fmt); mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_TypeError, fmt, argptr); @@ -1575,7 +1574,52 @@ NORETURN void mp_raise_OSError(int errno_) { nlr_raise(mp_obj_new_exception_arg1(&mp_type_OSError, MP_OBJ_NEW_SMALL_INT(errno_))); } +NORETURN void mp_raise_OSError_msg(const compressed_string_t *msg) { + mp_raise_msg(&mp_type_OSError, msg); +} + +NORETURN void mp_raise_OSError_errno_str(int errno_, mp_obj_t str) { + mp_obj_t args[2] = { + MP_OBJ_NEW_SMALL_INT(errno_), + str, + }; + nlr_raise(mp_obj_new_exception_args(&mp_type_OSError, 2, args)); +} + +NORETURN void mp_raise_OSError_msg_varg(const compressed_string_t *fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_OSError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} -NORETURN void mp_raise_NotImplementedError(const char *msg) { +NORETURN void mp_raise_NotImplementedError(const compressed_string_t *msg) { mp_raise_msg(&mp_type_NotImplementedError, msg); } + +NORETURN void mp_raise_NotImplementedError_varg(const compressed_string_t *fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_NotImplementedError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} + +NORETURN void mp_raise_OverflowError_varg(const compressed_string_t *fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_OverflowError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} + +NORETURN void mp_raise_MpyError(const compressed_string_t *msg) { + mp_raise_msg(&mp_type_MpyError, msg); +} + +#if MICROPY_STACK_CHECK || MICROPY_ENABLE_PYSTACK +NORETURN void mp_raise_recursion_depth(void) { + mp_raise_RuntimeError(translate("maximum recursion depth exceeded")); +} +#endif diff --git a/py/runtime.h b/py/runtime.h index a8b6312ffeea3..f8110355712f1 100644 --- a/py/runtime.h +++ b/py/runtime.h @@ -27,6 +27,9 @@ #define MICROPY_INCLUDED_PY_RUNTIME_H #include "py/mpstate.h" +#include "py/pystack.h" + +#include "supervisor/linker.h" typedef enum { MP_VM_RETURN_NORMAL, @@ -76,16 +79,17 @@ bool mp_sched_schedule(mp_obj_t function, mp_obj_t arg); // extra printing method specifically for mp_obj_t's which are integral type int mp_print_mp_int(const mp_print_t *print, mp_obj_t x, int base, int base_char, int flags, char fill, int width, int prec); -void mp_arg_check_num(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_args_max, bool takes_kw); +void mp_arg_check_num(size_t n_args, mp_map_t *kw_args, size_t n_args_min, size_t n_args_max, bool takes_kw); void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n_allowed, const mp_arg_t *allowed, mp_arg_val_t *out_vals); +void mp_arg_check_num_kw_array(size_t n_args, size_t n_kw, size_t n_args_min, size_t n_args_max, bool takes_kw); void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args, size_t n_allowed, const mp_arg_t *allowed, mp_arg_val_t *out_vals); NORETURN void mp_arg_error_terse_mismatch(void); NORETURN void mp_arg_error_unimpl_kw(void); -static inline mp_obj_dict_t *mp_locals_get(void) { return MP_STATE_THREAD(dict_locals); } -static inline void mp_locals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; } -static inline mp_obj_dict_t *mp_globals_get(void) { return MP_STATE_THREAD(dict_globals); } -static inline void mp_globals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; } +static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_locals_get)(void) { return MP_STATE_THREAD(dict_locals); } +static inline void PLACE_IN_ITCM(mp_locals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; } +static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_globals_get)(void) { return MP_STATE_THREAD(dict_globals); } +static inline void PLACE_IN_ITCM(mp_globals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; } mp_obj_t mp_load_name(qstr qst); mp_obj_t mp_load_global(qstr qst); @@ -106,8 +110,9 @@ mp_obj_t mp_call_method_n_kw(size_t n_args, size_t n_kw, const mp_obj_t *args); mp_obj_t mp_call_method_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_obj_t *args); mp_obj_t mp_call_method_self_n_kw(mp_obj_t meth, mp_obj_t self, size_t n_args, size_t n_kw, const mp_obj_t *args); // Call function and catch/dump exception - for Python callbacks from C code -void mp_call_function_1_protected(mp_obj_t fun, mp_obj_t arg); -void mp_call_function_2_protected(mp_obj_t fun, mp_obj_t arg1, mp_obj_t arg2); +// (return MP_OBJ_NULL in case of exception). +mp_obj_t mp_call_function_1_protected(mp_obj_t fun, mp_obj_t arg); +mp_obj_t mp_call_function_2_protected(mp_obj_t fun, mp_obj_t arg1, mp_obj_t arg2); typedef struct _mp_call_args_t { mp_obj_t fun; @@ -130,6 +135,7 @@ mp_obj_t mp_load_attr(mp_obj_t base, qstr attr); void mp_convert_member_lookup(mp_obj_t obj, const mp_obj_type_t *type, mp_obj_t member, mp_obj_t *dest); void mp_load_method(mp_obj_t base, qstr attr, mp_obj_t *dest); void mp_load_method_maybe(mp_obj_t base, qstr attr, mp_obj_t *dest); +void mp_load_method_protected(mp_obj_t obj, qstr attr, mp_obj_t *dest, bool catch_all_exc); void mp_load_super_method(qstr attr, mp_obj_t *dest); void mp_store_attr(mp_obj_t base, qstr attr, mp_obj_t val); @@ -144,19 +150,25 @@ mp_obj_t mp_import_name(qstr name, mp_obj_t fromlist, mp_obj_t level); mp_obj_t mp_import_from(mp_obj_t module, qstr name); void mp_import_all(mp_obj_t module); -NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const char *msg); -NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const char *fmt, ...); -NORETURN void mp_raise_ValueError(const char *msg); -NORETURN void mp_raise_ValueError_varg(const char *fmt, ...); -NORETURN void mp_raise_TypeError(const char *msg); -NORETURN void mp_raise_TypeError_varg(const char *fmt, ...); -NORETURN void mp_raise_AttributeError(const char *msg); -NORETURN void mp_raise_RuntimeError(const char *msg); -NORETURN void mp_raise_ImportError(const char *msg); -NORETURN void mp_raise_IndexError(const char *msg); +NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg); +NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, ...); +NORETURN void mp_raise_ValueError(const compressed_string_t *msg); +NORETURN void mp_raise_ValueError_varg(const compressed_string_t *fmt, ...); +NORETURN void mp_raise_TypeError(const compressed_string_t *msg); +NORETURN void mp_raise_TypeError_varg(const compressed_string_t *fmt, ...); +NORETURN void mp_raise_AttributeError(const compressed_string_t *msg); +NORETURN void mp_raise_RuntimeError(const compressed_string_t *msg); +NORETURN void mp_raise_ImportError(const compressed_string_t *msg); +NORETURN void mp_raise_IndexError(const compressed_string_t *msg); NORETURN void mp_raise_OSError(int errno_); -NORETURN void mp_raise_NotImplementedError(const char *msg); -NORETURN void mp_exc_recursion_depth(void); +NORETURN void mp_raise_OSError_errno_str(int errno_, mp_obj_t str); +NORETURN void mp_raise_OSError_msg(const compressed_string_t *msg); +NORETURN void mp_raise_OSError_msg_varg(const compressed_string_t *fmt, ...); +NORETURN void mp_raise_NotImplementedError(const compressed_string_t *msg); +NORETURN void mp_raise_NotImplementedError_varg(const compressed_string_t *fmt, ...); +NORETURN void mp_raise_OverflowError_varg(const compressed_string_t *fmt, ...); +NORETURN void mp_raise_MpyError(const compressed_string_t *msg); +NORETURN void mp_raise_recursion_depth(void); #if MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG #undef mp_check_self diff --git a/py/runtime0.h b/py/runtime0.h index 4709430fb4089..16434b315a757 100644 --- a/py/runtime0.h +++ b/py/runtime0.h @@ -133,6 +133,10 @@ typedef enum { #endif , + // The runtime will convert MP_BINARY_OP_IN to this operator with swapped args. + // A type should implement this containment operator instead of MP_BINARY_OP_IN. + MP_BINARY_OP_CONTAINS, + MP_BINARY_OP_NUM_RUNTIME, // These 2 are not supported by the runtime and must be synthesised by the emitter @@ -162,8 +166,8 @@ typedef enum { MP_F_BUILD_MAP, MP_F_STORE_MAP, #if MICROPY_PY_BUILTINS_SET - MP_F_BUILD_SET, MP_F_STORE_SET, + MP_F_BUILD_SET, #endif MP_F_MAKE_FUNCTION_FROM_RAW_CODE, MP_F_NATIVE_CALL_FUNCTION_N_KW, diff --git a/py/runtime_utils.c b/py/runtime_utils.c index bcf3cbf7b676a..fd3f071113843 100644 --- a/py/runtime_utils.c +++ b/py/runtime_utils.c @@ -28,22 +28,26 @@ #include "py/mpconfig.h" #include "py/runtime.h" -MP_NOINLINE void mp_call_function_1_protected(mp_obj_t fun, mp_obj_t arg) { +MP_NOINLINE mp_obj_t mp_call_function_1_protected(mp_obj_t fun, mp_obj_t arg) { nlr_buf_t nlr; if (nlr_push(&nlr) == 0) { - mp_call_function_1(fun, arg); + mp_obj_t ret = mp_call_function_1(fun, arg); nlr_pop(); + return ret; } else { mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val)); + return MP_OBJ_NULL; } } -void mp_call_function_2_protected(mp_obj_t fun, mp_obj_t arg1, mp_obj_t arg2) { +mp_obj_t mp_call_function_2_protected(mp_obj_t fun, mp_obj_t arg1, mp_obj_t arg2) { nlr_buf_t nlr; if (nlr_push(&nlr) == 0) { - mp_call_function_2(fun, arg1, arg2); + mp_obj_t ret = mp_call_function_2(fun, arg1, arg2); nlr_pop(); + return ret; } else { mp_obj_print_exception(&mp_plat_print, MP_OBJ_FROM_PTR(nlr.ret_val)); + return MP_OBJ_NULL; } } diff --git a/py/sequence.c b/py/sequence.c index c66fde98f64c8..0e668ea2a1187 100644 --- a/py/sequence.c +++ b/py/sequence.c @@ -28,11 +28,26 @@ #include #include "py/runtime.h" +#include "supervisor/shared/translate.h" // Helpers for sequence types #define SWAP(type, var1, var2) { type t = var2; var2 = var1; var1 = t; } +#if __GNUC__ < 5 +// n.b. does not actually detect overflow! +#define __builtin_mul_overflow(a, b, x) (*(x) = (a) * (b), false) +#endif + +// Detect when a multiply causes an overflow. +size_t mp_seq_multiply_len(size_t item_sz, size_t len) { + size_t new_len; + if (__builtin_mul_overflow(item_sz, len, &new_len)) { + mp_raise_msg(&mp_type_OverflowError, translate("small int overflow")); + } + return new_len; +} + // Implements backend of sequence * integer operation. Assumes elements are // memory-adjacent in sequence. void mp_seq_multiply(const void *items, size_t item_sz, size_t len, size_t times, void *dest) { @@ -53,7 +68,7 @@ bool mp_seq_get_fast_slice_indexes(mp_uint_t len, mp_obj_t slice, mp_bound_slice if (ostep != mp_const_none && ostep != MP_OBJ_NEW_SMALL_INT(1)) { indexes->step = mp_obj_get_int(ostep); if (indexes->step == 0) { - mp_raise_ValueError("slice step cannot be zero"); + mp_raise_ValueError(translate("slice step cannot be zero")); } } else { indexes->step = 1; @@ -260,7 +275,7 @@ mp_obj_t mp_seq_index_obj(const mp_obj_t *items, size_t len, size_t n_args, cons } } - mp_raise_ValueError("object not in sequence"); + mp_raise_ValueError(translate("object not in sequence")); } mp_obj_t mp_seq_count_obj(const mp_obj_t *items, size_t len, mp_obj_t value) { diff --git a/py/showbc.c b/py/showbc.c index 3deb18cd31dcf..e71d8a2536c27 100644 --- a/py/showbc.c +++ b/py/showbc.c @@ -185,7 +185,7 @@ const byte *mp_bytecode_print_str(const byte *ip) { num--; } do { - num = (num << 7) | (*ip & 0x7f); + num = (num * 128) | (*ip & 0x7f); } while ((*ip++ & 0x80) != 0); printf("LOAD_CONST_SMALL_INT " INT_FMT, num); break; diff --git a/py/smallint.h b/py/smallint.h index 42679a78fb203..6a3c75236c3ff 100644 --- a/py/smallint.h +++ b/py/smallint.h @@ -50,10 +50,10 @@ #elif MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_D -#define MP_SMALL_INT_MIN ((mp_int_t)(((mp_int_t)0xffffffff80000000) >> 1)) -#define MP_SMALL_INT_FITS(n) ((((n) ^ ((n) << 1)) & 0xffffffff80000000) == 0) +#define MP_SMALL_INT_MIN ((mp_int_t)(((mp_int_t)0xffff800000000000) >> 1)) +#define MP_SMALL_INT_FITS(n) ((((n) ^ ((n) << 1)) & 0xffff800000000000) == 0) // Mask to truncate mp_int_t to positive value -#define MP_SMALL_INT_POSITIVE_MASK ~(0xffffffff80000000 | (0xffffffff80000000 >> 1)) +#define MP_SMALL_INT_POSITIVE_MASK ~(0xffff800000000000 | (0xffff800000000000 >> 1)) #endif diff --git a/py/stackctrl.c b/py/stackctrl.c index b4ec15b0da1a3..46cbefc8c17eb 100644 --- a/py/stackctrl.c +++ b/py/stackctrl.c @@ -52,13 +52,9 @@ void mp_stack_set_limit(mp_uint_t limit) { MP_STATE_THREAD(stack_limit) = limit; } -void mp_exc_recursion_depth(void) { - mp_raise_RuntimeError("maximum recursion depth exceeded"); -} - void mp_stack_check(void) { if (mp_stack_usage() >= MP_STATE_THREAD(stack_limit)) { - mp_exc_recursion_depth(); + mp_raise_recursion_depth(); } } diff --git a/py/stream.c b/py/stream.c index 453dee769fe8a..2ff2b76a619c5 100644 --- a/py/stream.c +++ b/py/stream.c @@ -31,13 +31,7 @@ #include "py/objstr.h" #include "py/stream.h" #include "py/runtime.h" - -#if MICROPY_STREAMS_NON_BLOCK -#include -#if defined(__MINGW32__) && !defined(__MINGW64_VERSION_MAJOR) -#define EWOULDBLOCK 140 -#endif -#endif +#include "supervisor/shared/translate.h" // This file defines generic Python stream read/write methods which // dispatch to the underlying stream interface of an object. @@ -54,10 +48,9 @@ STATIC mp_obj_t stream_readall(mp_obj_t self_in); // be equal to input size). mp_uint_t mp_stream_rw(mp_obj_t stream, void *buf_, mp_uint_t size, int *errcode, byte flags) { byte *buf = buf_; - mp_obj_base_t* s = (mp_obj_base_t*)MP_OBJ_TO_PTR(stream); typedef mp_uint_t (*io_func_t)(mp_obj_t obj, void *buf, mp_uint_t size, int *errcode); io_func_t io_func; - const mp_stream_p_t *stream_p = s->type->protocol; + const mp_stream_p_t *stream_p = mp_get_stream(stream); if (flags & MP_STREAM_RW_WRITE) { io_func = (io_func_t)stream_p->write; } else { @@ -93,36 +86,28 @@ mp_uint_t mp_stream_rw(mp_obj_t stream, void *buf_, mp_uint_t size, int *errcode } const mp_stream_p_t *mp_get_stream_raise(mp_obj_t self_in, int flags) { - mp_obj_type_t *type = mp_obj_get_type(self_in); - const mp_stream_p_t *stream_p = type->protocol; + const mp_stream_p_t *stream_p = mp_proto_get(MP_QSTR_protocol_stream, self_in); if (stream_p == NULL || ((flags & MP_STREAM_OP_READ) && stream_p->read == NULL) || ((flags & MP_STREAM_OP_WRITE) && stream_p->write == NULL) || ((flags & MP_STREAM_OP_IOCTL) && stream_p->ioctl == NULL)) { // CPython: io.UnsupportedOperation, OSError subclass - mp_raise_msg(&mp_type_OSError, "stream operation not supported"); + mp_raise_msg(&mp_type_OSError, translate("stream operation not supported")); } return stream_p; } -mp_obj_t mp_stream_close(mp_obj_t stream) { - // TODO: Still consider using ioctl for close - mp_obj_t dest[2]; - mp_load_method(stream, MP_QSTR_close, dest); - return mp_call_method_n_kw(0, 0, dest); -} - STATIC mp_obj_t stream_read_generic(size_t n_args, const mp_obj_t *args, byte flags) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(args[0], MP_STREAM_OP_READ); - // What to do if sz < -1? Python docs don't specify this case. // CPython does a readall, but here we silently let negatives through, // and they will cause a MemoryError. mp_int_t sz; - if (n_args == 1 || ((sz = mp_obj_get_int(args[1])) == -1)) { + if (n_args == 1 || args[1] == mp_const_none || ((sz = mp_obj_get_int(args[1])) == -1)) { return stream_readall(args[0]); } + const mp_stream_p_t *stream_p = mp_get_stream(args[0]); + #if MICROPY_PY_BUILTINS_STR_UNICODE if (stream_p->is_text) { // We need to read sz number of unicode characters. Because we don't have any @@ -241,8 +226,6 @@ STATIC mp_obj_t stream_read1(size_t n_args, const mp_obj_t *args) { MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_read1_obj, 1, 2, stream_read1); mp_obj_t mp_stream_write(mp_obj_t self_in, const void *buf, size_t len, byte flags) { - mp_get_stream_raise(self_in, MP_STREAM_OP_WRITE); - int error; mp_uint_t out_sz = mp_stream_rw(self_in, (void*)buf, len, &error, flags); if (error != 0) { @@ -258,7 +241,7 @@ mp_obj_t mp_stream_write(mp_obj_t self_in, const void *buf, size_t len, byte fla } } -// XXX hack +// This is used to adapt a stream object to an mp_print_t interface void mp_stream_write_adaptor(void *self, const char *buf, size_t len) { mp_stream_write(MP_OBJ_FROM_PTR(self), buf, len, MP_STREAM_RW_WRITE); } @@ -266,6 +249,9 @@ void mp_stream_write_adaptor(void *self, const char *buf, size_t len) { STATIC mp_obj_t stream_write_method(size_t n_args, const mp_obj_t *args) { mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); + if (!mp_get_stream(args[0])->is_text && MP_OBJ_IS_STR(args[1])) { + mp_raise_ValueError(translate("string not supported; use bytes or bytearray")); + } size_t max_len = (size_t)-1; size_t off = 0; if (n_args == 3) { @@ -290,7 +276,6 @@ STATIC mp_obj_t stream_write1_method(mp_obj_t self_in, mp_obj_t arg) { MP_DEFINE_CONST_FUN_OBJ_2(mp_stream_write1_obj, stream_write1_method); STATIC mp_obj_t stream_readinto(size_t n_args, const mp_obj_t *args) { - mp_get_stream_raise(args[0], MP_STREAM_OP_READ); mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); @@ -299,6 +284,9 @@ STATIC mp_obj_t stream_readinto(size_t n_args, const mp_obj_t *args) { // https://docs.python.org/3/library/socket.html#socket.socket.recv_into mp_uint_t len = bufinfo.len; if (n_args > 2) { + if (mp_get_stream(args[0])->pyserial_compatibility) { + mp_raise_ValueError(translate("length argument not allowed for this type")); + } len = mp_obj_get_int(args[2]); if (len > bufinfo.len) { len = bufinfo.len; @@ -319,7 +307,7 @@ STATIC mp_obj_t stream_readinto(size_t n_args, const mp_obj_t *args) { MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_readinto_obj, 2, 3, stream_readinto); STATIC mp_obj_t stream_readall(mp_obj_t self_in) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(self_in, MP_STREAM_OP_READ); + const mp_stream_p_t *stream_p = mp_get_stream(self_in); mp_uint_t total_size = 0; vstr_t vstr; @@ -352,6 +340,9 @@ STATIC mp_obj_t stream_readall(mp_obj_t self_in) { p = vstr_extend(&vstr, DEFAULT_BUFFER_SIZE); current_read = DEFAULT_BUFFER_SIZE; } + #ifdef RUN_BACKGROUND_TASKS + RUN_BACKGROUND_TASKS; + #endif } vstr.len = total_size; @@ -360,7 +351,7 @@ STATIC mp_obj_t stream_readall(mp_obj_t self_in) { // Unbuffered, inefficient implementation of readline() for raw I/O files. STATIC mp_obj_t stream_unbuffered_readline(size_t n_args, const mp_obj_t *args) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(args[0], MP_STREAM_OP_READ); + const mp_stream_p_t *stream_p = mp_get_stream(args[0]); mp_int_t max_size = -1; if (n_args > 1) { @@ -434,9 +425,18 @@ mp_obj_t mp_stream_unbuffered_iter(mp_obj_t self) { return MP_OBJ_STOP_ITERATION; } -STATIC mp_obj_t stream_seek(size_t n_args, const mp_obj_t *args) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(args[0], MP_STREAM_OP_IOCTL); +mp_obj_t mp_stream_close(mp_obj_t stream) { + const mp_stream_p_t *stream_p = mp_get_stream(stream); + int error; + mp_uint_t res = stream_p->ioctl(stream, MP_STREAM_CLOSE, 0, &error); + if (res == MP_STREAM_ERROR) { + mp_raise_OSError(error); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(mp_stream_close_obj, mp_stream_close); +STATIC mp_obj_t stream_seek(size_t n_args, const mp_obj_t *args) { struct mp_stream_seek_t seek_s; // TODO: Could be uint64 seek_s.offset = mp_obj_get_int(args[1]); @@ -450,6 +450,7 @@ STATIC mp_obj_t stream_seek(size_t n_args, const mp_obj_t *args) { mp_raise_OSError(MP_EINVAL); } + const mp_stream_p_t *stream_p = mp_get_stream(args[0]); int error; mp_uint_t res = stream_p->ioctl(args[0], MP_STREAM_SEEK, (mp_uint_t)(uintptr_t)&seek_s, &error); if (res == MP_STREAM_ERROR) { @@ -469,20 +470,21 @@ STATIC mp_obj_t stream_tell(mp_obj_t self) { } MP_DEFINE_CONST_FUN_OBJ_1(mp_stream_tell_obj, stream_tell); -STATIC mp_obj_t stream_flush(mp_obj_t self) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(self, MP_STREAM_OP_IOCTL); +mp_obj_t mp_stream_flush(mp_obj_t self) { + const mp_stream_p_t *stream_p = mp_get_stream(self); int error; + if (stream_p->ioctl == NULL) { + mp_raise_OSError(MP_EINVAL); + } mp_uint_t res = stream_p->ioctl(self, MP_STREAM_FLUSH, 0, &error); if (res == MP_STREAM_ERROR) { mp_raise_OSError(error); } return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_1(mp_stream_flush_obj, stream_flush); +MP_DEFINE_CONST_FUN_OBJ_1(mp_stream_flush_obj, mp_stream_flush); STATIC mp_obj_t stream_ioctl(size_t n_args, const mp_obj_t *args) { - const mp_stream_p_t *stream_p = mp_get_stream_raise(args[0], MP_STREAM_OP_IOCTL); - mp_buffer_info_t bufinfo; uintptr_t val = 0; if (n_args > 2) { @@ -493,6 +495,7 @@ STATIC mp_obj_t stream_ioctl(size_t n_args, const mp_obj_t *args) { } } + const mp_stream_p_t *stream_p = mp_get_stream(args[0]); int error; mp_uint_t res = stream_p->ioctl(args[0], mp_obj_get_int(args[1]), val, &error); if (res == MP_STREAM_ERROR) { @@ -518,7 +521,7 @@ int mp_stream_errno; ssize_t mp_stream_posix_write(mp_obj_t stream, const void *buf, size_t len) { mp_obj_base_t* o = (mp_obj_base_t*)MP_OBJ_TO_PTR(stream); - const mp_stream_p_t *stream_p = o->type->protocol; + const mp_stream_p_t *stream_p = mp_get_stream(o); mp_uint_t out_sz = stream_p->write(stream, buf, len, &mp_stream_errno); if (out_sz == MP_STREAM_ERROR) { return -1; @@ -529,7 +532,7 @@ ssize_t mp_stream_posix_write(mp_obj_t stream, const void *buf, size_t len) { ssize_t mp_stream_posix_read(mp_obj_t stream, void *buf, size_t len) { mp_obj_base_t* o = (mp_obj_base_t*)MP_OBJ_TO_PTR(stream); - const mp_stream_p_t *stream_p = o->type->protocol; + const mp_stream_p_t *stream_p = mp_get_stream(o); mp_uint_t out_sz = stream_p->read(stream, buf, len, &mp_stream_errno); if (out_sz == MP_STREAM_ERROR) { return -1; @@ -540,7 +543,7 @@ ssize_t mp_stream_posix_read(mp_obj_t stream, void *buf, size_t len) { off_t mp_stream_posix_lseek(mp_obj_t stream, off_t offset, int whence) { const mp_obj_base_t* o = (mp_obj_base_t*)MP_OBJ_TO_PTR(stream); - const mp_stream_p_t *stream_p = o->type->protocol; + const mp_stream_p_t *stream_p = mp_get_stream(o); struct mp_stream_seek_t seek_s; seek_s.offset = offset; seek_s.whence = whence; @@ -553,7 +556,7 @@ off_t mp_stream_posix_lseek(mp_obj_t stream, off_t offset, int whence) { int mp_stream_posix_fsync(mp_obj_t stream) { mp_obj_base_t* o = (mp_obj_base_t*)MP_OBJ_TO_PTR(stream); - const mp_stream_p_t *stream_p = o->type->protocol; + const mp_stream_p_t *stream_p = mp_get_stream(o); mp_uint_t res = stream_p->ioctl(stream, MP_STREAM_FLUSH, 0, &mp_stream_errno); if (res == MP_STREAM_ERROR) { return -1; diff --git a/py/stream.h b/py/stream.h index fbe3d7d859296..543fe8c82a21e 100644 --- a/py/stream.h +++ b/py/stream.h @@ -27,6 +27,7 @@ #define MICROPY_INCLUDED_PY_STREAM_H #include "py/obj.h" +#include "py/proto.h" #include "py/mperrno.h" #define MP_STREAM_ERROR ((mp_uint_t)-1) @@ -35,7 +36,7 @@ #define MP_STREAM_FLUSH (1) #define MP_STREAM_SEEK (2) #define MP_STREAM_POLL (3) -//#define MP_STREAM_CLOSE (4) // Not yet implemented +#define MP_STREAM_CLOSE (4) #define MP_STREAM_TIMEOUT (5) // Get/set timeout (single op) #define MP_STREAM_GET_OPTS (6) // Get stream options #define MP_STREAM_SET_OPTS (7) // Set stream options @@ -62,6 +63,18 @@ struct mp_stream_seek_t { #define MP_SEEK_CUR (1) #define MP_SEEK_END (2) +// Stream protocol +typedef struct _mp_stream_p_t { + MP_PROTOCOL_HEAD + // On error, functions should return MP_STREAM_ERROR and fill in *errcode (values + // are implementation-dependent, but will be exposed to user, e.g. via exception). + mp_uint_t (*read)(mp_obj_t obj, void *buf, mp_uint_t size, int *errcode); + mp_uint_t (*write)(mp_obj_t obj, const void *buf, mp_uint_t size, int *errcode); + mp_uint_t (*ioctl)(mp_obj_t obj, mp_uint_t request, uintptr_t arg, int *errcode); + mp_uint_t is_text : 1; // default is bytes, set this for text stream + bool pyserial_compatibility: 1; // adjust API to match pyserial more closely +} mp_stream_p_t; + MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_read_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_read1_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_readinto_obj); @@ -69,6 +82,7 @@ MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_unbuffered_readline_obj); MP_DECLARE_CONST_FUN_OBJ_1(mp_stream_unbuffered_readlines_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_write_obj); MP_DECLARE_CONST_FUN_OBJ_2(mp_stream_write1_obj); +MP_DECLARE_CONST_FUN_OBJ_1(mp_stream_close_obj); MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_seek_obj); MP_DECLARE_CONST_FUN_OBJ_1(mp_stream_tell_obj); MP_DECLARE_CONST_FUN_OBJ_1(mp_stream_flush_obj); @@ -79,6 +93,11 @@ MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_stream_ioctl_obj); #define MP_STREAM_OP_WRITE (2) #define MP_STREAM_OP_IOCTL (4) +// Object is assumed to have a non-NULL stream protocol with valid r/w/ioctl methods +static inline const mp_stream_p_t *mp_get_stream(mp_const_obj_t self) { + return mp_proto_get(MP_QSTR_protocol_stream, self); +} + const mp_stream_p_t *mp_get_stream_raise(mp_obj_t self_in, int flags); mp_obj_t mp_stream_close(mp_obj_t stream); @@ -96,6 +115,7 @@ mp_uint_t mp_stream_rw(mp_obj_t stream, void *buf, mp_uint_t size, int *errcode, #define mp_stream_read_exactly(stream, buf, size, err) mp_stream_rw(stream, buf, size, err, MP_STREAM_RW_READ) void mp_stream_write_adaptor(void *self, const char *buf, size_t len); +mp_obj_t mp_stream_flush(mp_obj_t self); #if MICROPY_STREAMS_POSIX_API // Functions with POSIX-compatible signatures @@ -106,7 +126,7 @@ int mp_stream_posix_fsync(mp_obj_t stream); #endif #if MICROPY_STREAMS_NON_BLOCK -#define mp_is_nonblocking_error(errno) ((errno) == EAGAIN || (errno) == EWOULDBLOCK) +#define mp_is_nonblocking_error(errno) ((errno) == MP_EAGAIN || (errno) == MP_EWOULDBLOCK) #else #define mp_is_nonblocking_error(errno) (0) #endif diff --git a/py/unicode.c b/py/unicode.c index 140b7ba7128a1..935dc9012eb24 100644 --- a/py/unicode.c +++ b/py/unicode.c @@ -67,9 +67,9 @@ STATIC const uint8_t attr[] = { AT_LO, AT_LO, AT_LO, AT_PR, AT_PR, AT_PR, AT_PR, 0 }; -// TODO: Rename to str_get_char -unichar utf8_get_char(const byte *s) { #if MICROPY_PY_BUILTINS_STR_UNICODE + +unichar utf8_get_char(const byte *s) { unichar ord = *s++; if (!UTF8_IS_NONASCII(ord)) return ord; ord &= 0x7F; @@ -80,22 +80,14 @@ unichar utf8_get_char(const byte *s) { ord = (ord << 6) | (*s++ & 0x3F); } return ord; -#else - return *s; -#endif } -// TODO: Rename to str_next_char const byte *utf8_next_char(const byte *s) { -#if MICROPY_PY_BUILTINS_STR_UNICODE ++s; while (UTF8_IS_CONT(*s)) { ++s; } return s; -#else - return s + 1; -#endif } mp_uint_t utf8_ptr_to_index(const byte *s, const byte *ptr) { @@ -109,21 +101,18 @@ mp_uint_t utf8_ptr_to_index(const byte *s, const byte *ptr) { return i; } -// TODO: Rename to str_charlen -mp_uint_t unichar_charlen(const char *str, mp_uint_t len) { -#if MICROPY_PY_BUILTINS_STR_UNICODE - mp_uint_t charlen = 0; - for (const char *top = str + len; str < top; ++str) { +size_t utf8_charlen(const byte *str, size_t len) { + size_t charlen = 0; + for (const byte *top = str + len; str < top; ++str) { if (!UTF8_IS_CONT(*str)) { ++charlen; } } return charlen; -#else - return len; -#endif } +#endif + // Be aware: These unichar_is* functions are actually ASCII-only! bool unichar_isspace(unichar c) { return c < 128 && (attr[c] & FL_SPACE) != 0; @@ -183,6 +172,8 @@ mp_uint_t unichar_xdigit_value(unichar c) { return n; } +#if MICROPY_PY_BUILTINS_STR_UNICODE + bool utf8_check(const byte *p, size_t len) { uint8_t need = 0; const byte *end = p + len; @@ -210,3 +201,5 @@ bool utf8_check(const byte *p, size_t len) { } return need == 0; // no pending fragments allowed } + +#endif diff --git a/py/vm.c b/py/vm.c index 564200037a117..4f0340681e08f 100644 --- a/py/vm.c +++ b/py/vm.c @@ -35,6 +35,8 @@ #include "py/bc0.h" #include "py/bc.h" +#include "supervisor/linker.h" + #if 0 #define TRACE(ip) printf("sp=%d ", (int)(sp - &code_state->state[0] + 1)); mp_bytecode_print2(ip, 1, code_state->fun_bc->const_table); #else @@ -48,14 +50,6 @@ // top element. // Exception stack also grows up, top element is also pointed at. -// Exception stack unwind reasons (WHY_* in CPython-speak) -// TODO perhaps compress this to RETURN=0, JUMP>0, with number of unwinds -// left to do encoded in the JUMP number -typedef enum { - UNWIND_RETURN = 1, - UNWIND_JUMP, -} mp_unwind_reason_t; - #define DECODE_UINT \ mp_uint_t unum = 0; \ do { \ @@ -124,7 +118,7 @@ typedef enum { // MP_VM_RETURN_NORMAL, sp valid, return value in *sp // MP_VM_RETURN_YIELD, ip, sp valid, yielded value in *sp // MP_VM_RETURN_EXCEPTION, exception in fastn[0] -mp_vm_return_kind_t mp_execute_bytecode(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) { +mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) { #define SELECTIVE_EXC_IP (0) #if SELECTIVE_EXC_IP #define MARK_EXC_IP_SELECTIVE() { code_state->ip = ip; } /* stores ip 1 byte past last opcode */ @@ -260,7 +254,7 @@ run_code_state: ; if (obj_shared == MP_OBJ_NULL) { local_name_error: { MARK_EXC_IP_SELECTIVE(); - mp_obj_t obj = mp_obj_new_exception_msg(&mp_type_NameError, "local variable referenced before assignment"); + mp_obj_t obj = mp_obj_new_exception_msg(&mp_type_NameError, translate("local variable referenced before assignment")); RAISE(obj); } } @@ -344,7 +338,7 @@ run_code_state: ; MARK_EXC_IP_SELECTIVE(); DECODE_QSTR; mp_obj_t top = TOP(); - if (mp_obj_get_type(top)->attr == mp_obj_instance_attr) { + if (mp_obj_is_instance_type(mp_obj_get_type(top))) { mp_obj_instance_t *self = MP_OBJ_TO_PTR(top); mp_uint_t x = *ip; mp_obj_t key = MP_OBJ_NEW_QSTR(qst); @@ -442,7 +436,7 @@ run_code_state: ; MARK_EXC_IP_SELECTIVE(); DECODE_QSTR; mp_obj_t top = TOP(); - if (mp_obj_get_type(top)->attr == mp_obj_instance_attr && sp[-1] != MP_OBJ_NULL) { + if (mp_obj_is_instance_type(mp_obj_get_type(top)) && sp[-1] != MP_OBJ_NULL) { mp_obj_instance_t *self = MP_OBJ_TO_PTR(top); mp_uint_t x = *ip; mp_obj_t key = MP_OBJ_NEW_QSTR(qst); @@ -613,29 +607,18 @@ run_code_state: ; mp_call_method_n_kw(3, 0, sp); SET_TOP(mp_const_none); } else if (MP_OBJ_IS_SMALL_INT(TOP())) { - mp_int_t cause_val = MP_OBJ_SMALL_INT_VALUE(TOP()); - if (cause_val == UNWIND_RETURN) { - // stack: (..., __exit__, ctx_mgr, ret_val, UNWIND_RETURN) - mp_obj_t ret_val = sp[-1]; - sp[-1] = mp_const_none; - sp[0] = mp_const_none; - sp[1] = mp_const_none; - mp_call_method_n_kw(3, 0, sp - 3); - sp[-3] = ret_val; - sp[-2] = MP_OBJ_NEW_SMALL_INT(UNWIND_RETURN); - } else { - assert(cause_val == UNWIND_JUMP); - // stack: (..., __exit__, ctx_mgr, dest_ip, num_exc, UNWIND_JUMP) - mp_obj_t dest_ip = sp[-2]; - mp_obj_t num_exc = sp[-1]; - sp[-2] = mp_const_none; - sp[-1] = mp_const_none; - sp[0] = mp_const_none; - mp_call_method_n_kw(3, 0, sp - 4); - sp[-4] = dest_ip; - sp[-3] = num_exc; - sp[-2] = MP_OBJ_NEW_SMALL_INT(UNWIND_JUMP); - } + // Getting here there are two distinct cases: + // - unwind return, stack: (..., __exit__, ctx_mgr, ret_val, SMALL_INT(-1)) + // - unwind jump, stack: (..., __exit__, ctx_mgr, dest_ip, SMALL_INT(num_exc)) + // For both cases we do exactly the same thing. + mp_obj_t data = sp[-1]; + mp_obj_t cause = sp[0]; + sp[-1] = mp_const_none; + sp[0] = mp_const_none; + sp[1] = mp_const_none; + mp_call_method_n_kw(3, 0, sp - 3); + sp[-3] = data; + sp[-2] = cause; sp -= 2; // we removed (__exit__, ctx_mgr) } else { assert(mp_obj_is_exception_instance(TOP())); @@ -680,10 +663,11 @@ unwind_jump:; // of a "with" block contains the context manager info. // We're going to run "finally" code as a coroutine // (not calling it recursively). Set up a sentinel - // on a stack so it can return back to us when it is + // on the stack so it can return back to us when it is // done (when WITH_CLEANUP or END_FINALLY reached). - PUSH((mp_obj_t)unum); // push number of exception handlers left to unwind - PUSH(MP_OBJ_NEW_SMALL_INT(UNWIND_JUMP)); // push sentinel + // The sentinel is the number of exception handlers left to + // unwind, which is a non-negative integer. + PUSH(MP_OBJ_NEW_SMALL_INT(unum)); ip = exc_sp->handler; // get exception handler byte code address exc_sp--; // pop exception handler goto dispatch_loop; // run the exception handler @@ -720,11 +704,14 @@ unwind_jump:; } else if (MP_OBJ_IS_SMALL_INT(TOP())) { // We finished "finally" coroutine and now dispatch back // to our caller, based on TOS value - mp_unwind_reason_t reason = MP_OBJ_SMALL_INT_VALUE(POP()); - if (reason == UNWIND_RETURN) { + mp_int_t cause = MP_OBJ_SMALL_INT_VALUE(POP()); + if (cause < 0) { + // A negative cause indicates unwind return goto unwind_return; } else { - assert(reason == UNWIND_JUMP); + // Otherwise it's an unwind jump and we must push as a raw + // number the number of exception handlers to unwind + PUSH((mp_obj_t)cause); goto unwind_jump; } } else { @@ -773,7 +760,7 @@ unwind_jump:; } else { PUSH(value); // push the next iteration value } - DISPATCH(); + DISPATCH_WITH_PEND_EXC_CHECK(); } // matched against: SETUP_EXCEPT, SETUP_FINALLY, SETUP_WITH @@ -926,18 +913,22 @@ unwind_jump:; code_state->sp = sp; code_state->exc_sp = MP_TAGPTR_MAKE(exc_sp, currently_in_except_block); mp_code_state_t *new_state = mp_obj_fun_bc_prepare_codestate(*sp, unum & 0xff, (unum >> 8) & 0xff, sp + 1); - if (new_state) { + #if !MICROPY_ENABLE_PYSTACK + if (new_state == NULL) { + // Couldn't allocate codestate on heap: in the strict case raise + // an exception, otherwise just fall through to stack allocation. + #if MICROPY_STACKLESS_STRICT + deep_recursion_error: + mp_raise_recursion_depth(); + #endif + } else + #endif + { new_state->prev = code_state; code_state = new_state; nlr_pop(); goto run_code_state; } - #if MICROPY_STACKLESS_STRICT - else { - deep_recursion_error: - mp_exc_recursion_depth(); - } - #endif } #endif SET_TOP(mp_call_function_n_kw(*sp, unum & 0xff, (unum >> 8) & 0xff, sp + 1)); @@ -963,18 +954,26 @@ unwind_jump:; mp_code_state_t *new_state = mp_obj_fun_bc_prepare_codestate(out_args.fun, out_args.n_args, out_args.n_kw, out_args.args); - m_del(mp_obj_t, out_args.args, out_args.n_alloc); - if (new_state) { + #if !MICROPY_ENABLE_PYSTACK + // Freeing args at this point does not follow a LIFO order so only do it if + // pystack is not enabled. For pystack, they are freed when code_state is. + mp_nonlocal_free(out_args.args, out_args.n_alloc * sizeof(mp_obj_t)); + #endif + #if !MICROPY_ENABLE_PYSTACK + if (new_state == NULL) { + // Couldn't allocate codestate on heap: in the strict case raise + // an exception, otherwise just fall through to stack allocation. + #if MICROPY_STACKLESS_STRICT + goto deep_recursion_error; + #endif + } else + #endif + { new_state->prev = code_state; code_state = new_state; nlr_pop(); goto run_code_state; } - #if MICROPY_STACKLESS_STRICT - else { - goto deep_recursion_error; - } - #endif } #endif SET_TOP(mp_call_method_n_kw_var(false, unum, sp)); @@ -998,17 +997,21 @@ unwind_jump:; int adjust = (sp[1] == MP_OBJ_NULL) ? 0 : 1; mp_code_state_t *new_state = mp_obj_fun_bc_prepare_codestate(*sp, n_args + adjust, n_kw, sp + 2 - adjust); - if (new_state) { + #if !MICROPY_ENABLE_PYSTACK + if (new_state == NULL) { + // Couldn't allocate codestate on heap: in the strict case raise + // an exception, otherwise just fall through to stack allocation. + #if MICROPY_STACKLESS_STRICT + goto deep_recursion_error; + #endif + } else + #endif + { new_state->prev = code_state; code_state = new_state; nlr_pop(); goto run_code_state; } - #if MICROPY_STACKLESS_STRICT - else { - goto deep_recursion_error; - } - #endif } #endif SET_TOP(mp_call_method_n_kw(unum & 0xff, (unum >> 8) & 0xff, sp)); @@ -1034,18 +1037,26 @@ unwind_jump:; mp_code_state_t *new_state = mp_obj_fun_bc_prepare_codestate(out_args.fun, out_args.n_args, out_args.n_kw, out_args.args); - m_del(mp_obj_t, out_args.args, out_args.n_alloc); - if (new_state) { + #if !MICROPY_ENABLE_PYSTACK + // Freeing args at this point does not follow a LIFO order so only do it if + // pystack is not enabled. For pystack, they are freed when code_state is. + mp_nonlocal_free(out_args.args, out_args.n_alloc * sizeof(mp_obj_t)); + #endif + #if !MICROPY_ENABLE_PYSTACK + if (new_state == NULL) { + // Couldn't allocate codestate on heap: in the strict case raise + // an exception, otherwise just fall through to stack allocation. + #if MICROPY_STACKLESS_STRICT + goto deep_recursion_error; + #endif + } else + #endif + { new_state->prev = code_state; code_state = new_state; nlr_pop(); goto run_code_state; } - #if MICROPY_STACKLESS_STRICT - else { - goto deep_recursion_error; - } - #endif } #endif SET_TOP(mp_call_method_n_kw_var(true, unum, sp)); @@ -1081,7 +1092,7 @@ unwind_jump:; // (not calling it recursively). Set up a sentinel // on a stack so it can return back to us when it is // done (when WITH_CLEANUP or END_FINALLY reached). - PUSH(MP_OBJ_NEW_SMALL_INT(UNWIND_RETURN)); + PUSH(MP_OBJ_NEW_SMALL_INT(-1)); ip = exc_sp->handler; exc_sp--; goto dispatch_loop; @@ -1096,7 +1107,15 @@ unwind_jump:; if (code_state->prev != NULL) { mp_obj_t res = *sp; mp_globals_set(code_state->old_globals); - code_state = code_state->prev; + mp_code_state_t *new_code_state = code_state->prev; + #if MICROPY_ENABLE_PYSTACK + // Free code_state, and args allocated by mp_call_prepare_args_n_kw_var + // (The latter is implicitly freed when using pystack due to its LIFO nature.) + // The sizeof in the following statement does not include the size of the variable + // part of the struct. This arg is anyway not used if pystack is enabled. + mp_nonlocal_free(code_state, sizeof(mp_code_state_t)); + #endif + code_state = new_code_state; *code_state->sp = res; goto run_code_state; } @@ -1105,7 +1124,7 @@ unwind_jump:; ENTRY(MP_BC_RAISE_VARARGS): { MARK_EXC_IP_SELECTIVE(); - mp_uint_t unum = *ip++; + mp_uint_t unum = *ip; mp_obj_t obj; if (unum == 2) { mp_warning("exception chaining not supported"); @@ -1122,11 +1141,11 @@ unwind_jump:; } } if (obj == MP_OBJ_NULL) { - obj = mp_obj_new_exception_msg(&mp_type_RuntimeError, "no active exception to reraise"); + obj = mp_obj_new_exception_msg(&mp_type_RuntimeError, translate("no active exception to reraise")); RAISE(obj); } } else { - obj = POP(); + obj = TOP(); } obj = mp_make_raise_obj(obj); RAISE(obj); @@ -1149,6 +1168,7 @@ unwind_jump:; mp_obj_t send_value = POP(); mp_obj_t t_exc = MP_OBJ_NULL; mp_obj_t ret_value; + code_state->sp = sp; // Save sp because it's needed if mp_resume raises StopIteration if (inject_exc != MP_OBJ_NULL) { t_exc = inject_exc; inject_exc = MP_OBJ_NULL; @@ -1164,8 +1184,7 @@ unwind_jump:; } else if (ret_kind == MP_VM_RETURN_NORMAL) { // Pop exhausted gen sp--; - // TODO: When ret_value can be MP_OBJ_NULL here?? - if (ret_value == MP_OBJ_NULL || ret_value == MP_OBJ_STOP_ITERATION) { + if (ret_value == MP_OBJ_STOP_ITERATION) { // Optimize StopIteration // TODO: get StopIteration's value PUSH(mp_const_none); @@ -1253,10 +1272,10 @@ unwind_jump:; } else if (ip[-1] < MP_BC_STORE_FAST_MULTI + 16) { fastn[MP_BC_STORE_FAST_MULTI - (mp_int_t)ip[-1]] = POP(); DISPATCH(); - } else if (ip[-1] < MP_BC_UNARY_OP_MULTI + 7) { + } else if (ip[-1] < MP_BC_UNARY_OP_MULTI + MP_UNARY_OP_NUM_BYTECODE) { SET_TOP(mp_unary_op(ip[-1] - MP_BC_UNARY_OP_MULTI, TOP())); DISPATCH(); - } else if (ip[-1] < MP_BC_BINARY_OP_MULTI + 36) { + } else if (ip[-1] < MP_BC_BINARY_OP_MULTI + MP_BINARY_OP_NUM_BYTECODE) { mp_obj_t rhs = POP(); mp_obj_t lhs = TOP(); SET_TOP(mp_binary_op(ip[-1] - MP_BC_BINARY_OP_MULTI, lhs, rhs)); @@ -1264,7 +1283,7 @@ unwind_jump:; } else #endif { - mp_obj_t obj = mp_obj_new_exception_msg(&mp_type_NotImplementedError, "byte code not implemented"); + mp_obj_t obj = mp_obj_new_exception_msg(&mp_type_NotImplementedError, translate("byte code not implemented")); nlr_pop(); fastn[0] = obj; return MP_VM_RETURN_EXCEPTION; @@ -1305,11 +1324,12 @@ unwind_jump:; #if MICROPY_PY_THREAD_GIL #if MICROPY_PY_THREAD_GIL_VM_DIVISOR - if (--gil_divisor == 0) { - gil_divisor = MICROPY_PY_THREAD_GIL_VM_DIVISOR; - #else - { + if (--gil_divisor == 0) #endif + { + #if MICROPY_PY_THREAD_GIL_VM_DIVISOR + gil_divisor = MICROPY_PY_THREAD_GIL_VM_DIVISOR; + #endif #if MICROPY_ENABLE_SCHEDULER // can only switch threads if the scheduler is unlocked if (MP_STATE_VM(sched_state) == MP_SCHED_IDLE) @@ -1348,7 +1368,8 @@ unwind_jump:; } else if (*code_state->ip == MP_BC_YIELD_FROM) { // StopIteration inside yield from call means return a value of // yield from, so inject exception's value as yield from's result - *++code_state->sp = mp_obj_exception_get_value(MP_OBJ_FROM_PTR(nlr.ret_val)); + // (Instead of stack pop then push we just replace exhausted gen with value) + *code_state->sp = mp_obj_exception_get_value(MP_OBJ_FROM_PTR(nlr.ret_val)); code_state->ip++; // yield from is over, move to next instruction goto outer_dispatch_loop; // continue with dispatch loop } @@ -1361,8 +1382,7 @@ unwind_jump:; // set file and line number that the exception occurred at // TODO: don't set traceback for exceptions re-raised by END_FINALLY. // But consider how to handle nested exceptions. - // TODO need a better way of not adding traceback to constant objects (right now, just GeneratorExit_obj and MemoryError_obj) - if (nlr.ret_val != &mp_const_GeneratorExit_obj && nlr.ret_val != &mp_const_MemoryError_obj) { + if (nlr.ret_val != &mp_const_GeneratorExit_obj) { const byte *ip = code_state->fun_bc->bytecode; ip = mp_decode_uint_skip(ip); // skip n_state ip = mp_decode_uint_skip(ip); // skip n_exc_stack @@ -1438,7 +1458,15 @@ unwind_jump:; #if MICROPY_STACKLESS } else if (code_state->prev != NULL) { mp_globals_set(code_state->old_globals); - code_state = code_state->prev; + mp_code_state_t *new_code_state = code_state->prev; + #if MICROPY_ENABLE_PYSTACK + // Free code_state, and args allocated by mp_call_prepare_args_n_kw_var + // (The latter is implicitly freed when using pystack due to its LIFO nature.) + // The sizeof in the following statement does not include the size of the variable + // part of the struct. This arg is anyway not used if pystack is enabled. + mp_nonlocal_free(code_state, sizeof(mp_code_state_t)); + #endif + code_state = new_code_state; size_t n_state = mp_decode_uint_value(code_state->fun_bc->bytecode); fastn = &code_state->state[n_state - 1]; exc_stack = (mp_exc_stack_t*)(code_state->state + n_state); diff --git a/py/vmentrytable.h b/py/vmentrytable.h index 615f4e2ce439e..31a96dbec4552 100644 --- a/py/vmentrytable.h +++ b/py/vmentrytable.h @@ -24,12 +24,14 @@ * THE SOFTWARE. */ -#if __clang__ +#ifdef __clang__ #pragma clang diagnostic push #pragma clang diagnostic ignored "-Winitializer-overrides" #endif // __clang__ -static const void *const entry_table[256] = { +#include "supervisor/linker.h" + +static const void *const PLACE_IN_DTCM_DATA(entry_table[256]) = { [0 ... 255] = &&entry_default, [MP_BC_LOAD_CONST_FALSE] = &&entry_MP_BC_LOAD_CONST_FALSE, [MP_BC_LOAD_CONST_NONE] = &&entry_MP_BC_LOAD_CONST_NONE, @@ -113,6 +115,6 @@ static const void *const entry_table[256] = { [MP_BC_BINARY_OP_MULTI ... MP_BC_BINARY_OP_MULTI + MP_BINARY_OP_NUM_BYTECODE - 1] = &&entry_MP_BC_BINARY_OP_MULTI, }; -#if __clang__ +#ifdef __clang__ #pragma clang diagnostic pop #endif // __clang__ diff --git a/py/vstr.c b/py/vstr.c index 869b27805737a..91cd7f584fced 100644 --- a/py/vstr.c +++ b/py/vstr.c @@ -50,6 +50,9 @@ void vstr_init(vstr_t *vstr, size_t alloc) { // Init the vstr so it allocs exactly enough ram to hold a null-terminated // string of the given length, and set the length. void vstr_init_len(vstr_t *vstr, size_t len) { + if(len == SIZE_MAX) { + m_malloc_fail(len); + } vstr_init(vstr, len + 1); vstr->len = len; } diff --git a/requirements-dev.txt b/requirements-dev.txt new file mode 100644 index 0000000000000..7cd491adefa4d --- /dev/null +++ b/requirements-dev.txt @@ -0,0 +1 @@ +rst2pyi>=0.3.0 diff --git a/setup.py b/setup.py new file mode 100644 index 0000000000000..1e0d81da36903 --- /dev/null +++ b/setup.py @@ -0,0 +1,22 @@ +from datetime import datetime +from setuptools import setup +from pathlib import Path + +stub_root = Path("circuitpython-stubs") +stubs = [p.relative_to(stub_root).as_posix() for p in stub_root.glob("*.pyi")] + +now = datetime.utcnow() +version = now.strftime("%Y.%m.%d") + +setup( + name="circuitpython-stubs", + description="PEP 561 type stubs for CircuitPython", + url="https://github.com/adafruit/circuitpython", + maintainer="CircuitPythonistas", + author_email="circuitpython@adafruit.com", + version=version, + license="MIT", + package_data={"circuitpython-stubs": stubs}, + packages=["circuitpython-stubs"], + setup_requires=["setuptools>=38.6.0"], +) diff --git a/shared-bindings/_bleio/Adapter.c b/shared-bindings/_bleio/Adapter.c new file mode 100644 index 0000000000000..921667f0fb45b --- /dev/null +++ b/shared-bindings/_bleio/Adapter.c @@ -0,0 +1,400 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/Adapter.h" + +#define ADV_INTERVAL_MIN (0.0020f) +#define ADV_INTERVAL_MIN_STRING "0.0020" +#define ADV_INTERVAL_MAX (10.24f) +#define ADV_INTERVAL_MAX_STRING "10.24" +// 20ms is recommended by Apple +#define ADV_INTERVAL_DEFAULT (0.1f) + +#define INTERVAL_DEFAULT (0.1f) +#define INTERVAL_MIN (0.0025f) +#define INTERVAL_MIN_STRING "0.0025" +#define INTERVAL_MAX (40.959375f) +#define INTERVAL_MAX_STRING "40.959375" +#define WINDOW_DEFAULT (0.1f) + +//| .. currentmodule:: _bleio +//| +//| :class:`Adapter` --- BLE adapter +//| ---------------------------------------------------- +//| +//| The Adapter manages the discovery and connection to other nearby Bluetooth Low Energy devices. +//| This part of the Bluetooth Low Energy Specification is known as Generic Access Profile (GAP). +//| +//| Discovery of other devices happens during a scanning process that listens for small packets of +//| information, known as advertisements, that are broadcast unencrypted. The advertising packets +//| have two different uses. The first is to broadcast a small piece of data to anyone who cares and +//| and nothing more. These are known as Beacons. The second class of advertisement is to promote +//| additional functionality available after the devices establish a connection. For example, a +//| BLE keyboard may advertise that it can provide key information, but not what the key info is. +//| +//| The built-in BLE adapter can do both parts of this process: it can scan for other device +//| advertisements and it can advertise its own data. Furthermore, Adapters can accept incoming +//| connections and also initiate connections. +//| + +//| .. class:: Adapter() +//| +//| You cannot create an instance of `_bleio.Adapter`. +//| Use `_bleio.adapter` to access the sole instance available. +//| + +//| .. attribute:: enabled +//| +//| State of the BLE adapter. +//| +STATIC mp_obj_t bleio_adapter_get_enabled(mp_obj_t self) { + return mp_obj_new_bool(common_hal_bleio_adapter_get_enabled(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_enabled_obj, bleio_adapter_get_enabled); + +static mp_obj_t bleio_adapter_set_enabled(mp_obj_t self, mp_obj_t value) { + const bool enabled = mp_obj_is_true(value); + + common_hal_bleio_adapter_set_enabled(self, enabled); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_adapter_set_enabled_obj, bleio_adapter_set_enabled); + +const mp_obj_property_t bleio_adapter_enabled_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_enabled_obj, + (mp_obj_t)&bleio_adapter_set_enabled_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: address +//| +//| MAC address of the BLE adapter. (read-only) +//| +STATIC mp_obj_t bleio_adapter_get_address(mp_obj_t self) { + return MP_OBJ_FROM_PTR(common_hal_bleio_adapter_get_address(self)); + +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_address_obj, bleio_adapter_get_address); + +const mp_obj_property_t bleio_adapter_address_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_address_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: name +//| +//| name of the BLE adapter used once connected. +//| The name is "CIRCUITPY" + the last four hex digits of ``adapter.address``, +//| to make it easy to distinguish multiple CircuitPython boards. +//| +STATIC mp_obj_t bleio_adapter_get_name(mp_obj_t self) { + return MP_OBJ_FROM_PTR(common_hal_bleio_adapter_get_name(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_name_obj, bleio_adapter_get_name); + + +STATIC mp_obj_t bleio_adapter_set_name(mp_obj_t self, mp_obj_t new_name) { + common_hal_bleio_adapter_set_name(self, mp_obj_str_get_str(new_name)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(bleio_adapter_set_name_obj, bleio_adapter_set_name); + +const mp_obj_property_t bleio_adapter_name_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_name_obj, + (mp_obj_t)&bleio_adapter_set_name_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. method:: start_advertising(data, *, scan_response=None, connectable=True, interval=0.1) +//| +//| Starts advertising until `stop_advertising` is called or if connectable, another device +//| connects to us. +//| +//| .. warning: If data is longer than 31 bytes, then this will automatically advertise as an +//| extended advertisement that older BLE 4.x clients won't be able to scan for. +//| +//| :param buf data: advertising data packet bytes +//| :param buf scan_response: scan response data packet bytes. ``None`` if no scan response is needed. +//| :param bool connectable: If `True` then other devices are allowed to connect to this peripheral. +//| :param float interval: advertising interval, in seconds +//| +STATIC mp_obj_t bleio_adapter_start_advertising(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_data, ARG_scan_response, ARG_connectable, ARG_interval }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_scan_response, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_connectable, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, + { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_buffer_info_t data_bufinfo; + mp_get_buffer_raise(args[ARG_data].u_obj, &data_bufinfo, MP_BUFFER_READ); + + // Pass an empty buffer if scan_response not provided. + mp_buffer_info_t scan_response_bufinfo = { 0 }; + if (args[ARG_scan_response].u_obj != mp_const_none) { + mp_get_buffer_raise(args[ARG_scan_response].u_obj, &scan_response_bufinfo, MP_BUFFER_READ); + } + + if (args[ARG_interval].u_obj == MP_OBJ_NULL) { + args[ARG_interval].u_obj = mp_obj_new_float(ADV_INTERVAL_DEFAULT); + } + + const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); + if (interval < ADV_INTERVAL_MIN || interval > ADV_INTERVAL_MAX) { + mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), + ADV_INTERVAL_MIN_STRING, ADV_INTERVAL_MAX_STRING); + } + + bool connectable = args[ARG_connectable].u_bool; + if (data_bufinfo.len > 31 && connectable && scan_response_bufinfo.len > 0) { + mp_raise_bleio_BluetoothError(translate("Cannot have scan responses for extended, connectable advertisements.")); + } + + common_hal_bleio_adapter_start_advertising(self, connectable, interval, + &data_bufinfo, &scan_response_bufinfo); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_start_advertising_obj, 2, bleio_adapter_start_advertising); + +//| .. method:: stop_advertising() +//| +//| Stop sending advertising packets. +STATIC mp_obj_t bleio_adapter_stop_advertising(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_stop_advertising(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_stop_advertising_obj, bleio_adapter_stop_advertising); + +//| .. method:: start_scan(prefixes=b"", \*, buffer_size=512, extended=False, timeout=None, interval=0.1, window=0.1, minimum_rssi=-80, active=True) +//| +//| Starts a BLE scan and returns an iterator of results. Advertisements and scan responses are +//| filtered and returned separately. +//| +//| :param sequence prefixes: Sequence of byte string prefixes to filter advertising packets +//| with. A packet without an advertising structure that matches one of the prefixes is +//| ignored. Format is one byte for length (n) and n bytes of prefix and can be repeated. +//| :param int buffer_size: the maximum number of advertising bytes to buffer. +//| :param bool extended: When True, support extended advertising packets. Increasing buffer_size is recommended when this is set. +//| :param float timeout: the scan timeout in seconds. If None, will scan until `stop_scan` is called. +//| :param float interval: the interval (in seconds) between the start of two consecutive scan windows +//| Must be in the range 0.0025 - 40.959375 seconds. +//| :param float window: the duration (in seconds) to scan a single BLE channel. +//| window must be <= interval. +//| :param int minimum_rssi: the minimum rssi of entries to return. +//| :param bool active: retrieve scan responses for scannable advertisements. +//| :returns: an iterable of `_bleio.ScanEntry` objects +//| :rtype: iterable +//| +STATIC mp_obj_t bleio_adapter_start_scan(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_prefixes, ARG_buffer_size, ARG_extended, ARG_timeout, ARG_interval, ARG_window, ARG_minimum_rssi, ARG_active }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_prefixes, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 512} }, + { MP_QSTR_extended, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_interval, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_window, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_minimum_rssi, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -80} }, + { MP_QSTR_active, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, + }; + + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_float_t timeout = 0; + if (args[ARG_timeout].u_obj != mp_const_none) { + timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + } + + if (args[ARG_interval].u_obj == MP_OBJ_NULL) { + args[ARG_interval].u_obj = mp_obj_new_float(INTERVAL_DEFAULT); + } + + if (args[ARG_window].u_obj == MP_OBJ_NULL) { + args[ARG_window].u_obj = mp_obj_new_float(WINDOW_DEFAULT); + } + + const mp_float_t interval = mp_obj_float_get(args[ARG_interval].u_obj); + if (interval < INTERVAL_MIN || interval > INTERVAL_MAX) { + mp_raise_ValueError_varg(translate("interval must be in range %s-%s"), INTERVAL_MIN_STRING, INTERVAL_MAX_STRING); + } + + const mp_float_t window = mp_obj_float_get(args[ARG_window].u_obj); + if (window > interval) { + mp_raise_ValueError(translate("window must be <= interval")); + } + + mp_buffer_info_t prefix_bufinfo; + prefix_bufinfo.len = 0; + if (args[ARG_prefixes].u_obj != MP_OBJ_NULL) { + mp_get_buffer_raise(args[ARG_prefixes].u_obj, &prefix_bufinfo, MP_BUFFER_READ); + if (gc_nbytes(prefix_bufinfo.buf) == 0) { + mp_raise_ValueError(translate("Prefix buffer must be on the heap")); + } + } + + return common_hal_bleio_adapter_start_scan(self, prefix_bufinfo.buf, prefix_bufinfo.len, args[ARG_extended].u_bool, args[ARG_buffer_size].u_int, timeout, interval, window, args[ARG_minimum_rssi].u_int, args[ARG_active].u_bool); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_start_scan_obj, 1, bleio_adapter_start_scan); + +//| .. method:: stop_scan() +//| +//| Stop the current scan. +STATIC mp_obj_t bleio_adapter_stop_scan(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_stop_scan(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_stop_scan_obj, bleio_adapter_stop_scan); + +//| .. attribute:: connected +//| +//| True when the adapter is connected to another device regardless of who initiated the +//| connection. (read-only) +//| +STATIC mp_obj_t bleio_adapter_get_connected(mp_obj_t self) { + return mp_obj_new_bool(common_hal_bleio_adapter_get_connected(self)); + +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_connected_obj, bleio_adapter_get_connected); + +const mp_obj_property_t bleio_adapter_connected_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_connected_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: connections +//| +//| Tuple of active connections including those initiated through +//| :py:meth:`_bleio.Adapter.connect`. (read-only) +//| +STATIC mp_obj_t bleio_adapter_get_connections(mp_obj_t self) { + return common_hal_bleio_adapter_get_connections(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_get_connections_obj, bleio_adapter_get_connections); + +const mp_obj_property_t bleio_adapter_connections_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_adapter_get_connections_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. method:: connect(address, *, timeout) +//| +//| Attempts a connection to the device with the given address. +//| +//| :param Address address: The address of the peripheral to connect to +//| :param float/int timeout: Try to connect for timeout seconds. +//| +STATIC mp_obj_t bleio_adapter_connect(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_address, ARG_timeout }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + if (!MP_OBJ_IS_TYPE(args[ARG_address].u_obj, &bleio_address_type)) { + mp_raise_TypeError(translate("Expected an Address")); + } + + bleio_address_obj_t *address = MP_OBJ_TO_PTR(args[ARG_address].u_obj); + mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + + return common_hal_bleio_adapter_connect(self, address, timeout); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_connect_obj, 2, bleio_adapter_connect); + +//| .. method:: erase_bonding() +//| +//| Erase all bonding information stored in flash memory. +STATIC mp_obj_t bleio_adapter_erase_bonding(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_erase_bonding(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_erase_bonding_obj, bleio_adapter_erase_bonding); + +STATIC const mp_rom_map_elem_t bleio_adapter_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&bleio_adapter_enabled_obj) }, + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&bleio_adapter_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&bleio_adapter_name_obj) }, + + { MP_ROM_QSTR(MP_QSTR_start_advertising), MP_ROM_PTR(&bleio_adapter_start_advertising_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_advertising), MP_ROM_PTR(&bleio_adapter_stop_advertising_obj) }, + + { MP_ROM_QSTR(MP_QSTR_start_scan), MP_ROM_PTR(&bleio_adapter_start_scan_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_scan), MP_ROM_PTR(&bleio_adapter_stop_scan_obj) }, + + { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&bleio_adapter_connect_obj) }, + + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_adapter_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_connections), MP_ROM_PTR(&bleio_adapter_connections_obj) }, + + { MP_ROM_QSTR(MP_QSTR_erase_bonding), MP_ROM_PTR(&bleio_adapter_erase_bonding_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_adapter_locals_dict, bleio_adapter_locals_dict_table); + +const mp_obj_type_t bleio_adapter_type = { + .base = { &mp_type_type }, + .name = MP_QSTR_Adapter, + .locals_dict = (mp_obj_t)&bleio_adapter_locals_dict, +}; diff --git a/shared-bindings/_bleio/Adapter.h b/shared-bindings/_bleio/Adapter.h new file mode 100644 index 0000000000000..9b20a461a81a1 --- /dev/null +++ b/shared-bindings/_bleio/Adapter.h @@ -0,0 +1,62 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H + +#include + +#include "common-hal/_bleio/Adapter.h" + +#include "py/objstr.h" +#include "shared-module/_bleio/Address.h" + +const mp_obj_type_t bleio_adapter_type; + +extern bool common_hal_bleio_adapter_get_enabled(bleio_adapter_obj_t *self); +extern void common_hal_bleio_adapter_set_enabled(bleio_adapter_obj_t *self, bool enabled); +extern bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); +extern bleio_address_obj_t *common_hal_bleio_adapter_get_address(bleio_adapter_obj_t *self); + +extern mp_obj_str_t* common_hal_bleio_adapter_get_name(bleio_adapter_obj_t *self); +extern void common_hal_bleio_adapter_set_name(bleio_adapter_obj_t *self, const char* name); + +extern uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, float interval, uint8_t *advertising_data, uint16_t advertising_data_len, uint8_t *scan_response_data, uint16_t scan_response_data_len); + +extern void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo); +extern void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self); + +extern mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active); +extern void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self); + +extern bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); +extern mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self); +extern mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout); + +extern void common_hal_bleio_adapter_erase_bonding(bleio_adapter_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H diff --git a/shared-bindings/_bleio/Address.c b/shared-bindings/_bleio/Address.c new file mode 100644 index 0000000000000..c31eb604b15d8 --- /dev/null +++ b/shared-bindings/_bleio/Address.c @@ -0,0 +1,234 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/objproperty.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-module/_bleio/Address.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Address` -- BLE address +//| ========================================================= +//| +//| Encapsulates the address of a BLE device. +//| + +//| .. class:: Address(address, address_type) +//| +//| Create a new Address object encapsulating the address value. +//| The value itself can be one of: +//| +//| :param buf address: The address value to encapsulate. A buffer object (bytearray, bytes) of 6 bytes. +//| :param int address_type: one of the integer values: `PUBLIC`, `RANDOM_STATIC`, +//| `RANDOM_PRIVATE_RESOLVABLE`, or `RANDOM_PRIVATE_NON_RESOLVABLE`. +//| +STATIC mp_obj_t bleio_address_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_address, ARG_address_type }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_address_type, MP_ARG_INT, {.u_int = BLEIO_ADDRESS_TYPE_PUBLIC } }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bleio_address_obj_t *self = m_new_obj(bleio_address_obj_t); + self->base.type = &bleio_address_type; + + const mp_obj_t address = args[ARG_address].u_obj; + mp_buffer_info_t buf_info; + mp_get_buffer_raise(address, &buf_info, MP_BUFFER_READ); + if (buf_info.len != NUM_BLEIO_ADDRESS_BYTES) { + mp_raise_ValueError_varg(translate("Address must be %d bytes long"), NUM_BLEIO_ADDRESS_BYTES); + } + + const mp_int_t address_type = args[ARG_address_type].u_int; + if (address_type < BLEIO_ADDRESS_TYPE_MIN || address_type > BLEIO_ADDRESS_TYPE_MAX) { + mp_raise_ValueError(translate("Address type out of range")); + } + + common_hal_bleio_address_construct(self, buf_info.buf, address_type); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. attribute:: address_bytes +//| +//| The bytes that make up the device address (read-only). +//| +//| Note that the ``bytes`` object returned is in little-endian order: +//| The least significant byte is ``address_bytes[0]``. So the address will +//| appear to be reversed if you print the raw ``bytes`` object. If you print +//| or use `str()` on the :py:class:`~_bleio.Attribute` object itself, the address will be printed +//| in the expected order. For example: +//| +//| .. code-block:: pycon +//| +//| >>> import _bleio +//| >>> _bleio.adapter.address +//|
+//| >>> _bleio.adapter.address.address_bytes +//| b'5\xa8\xed\xf5\x1d\xc8' +//| +STATIC mp_obj_t bleio_address_get_address_bytes(mp_obj_t self_in) { + bleio_address_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return common_hal_bleio_address_get_address_bytes(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_address_get_address_bytes_obj, bleio_address_get_address_bytes); + +const mp_obj_property_t bleio_address_address_bytes_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_address_get_address_bytes_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: type +//| +//| The address type (read-only). +//| +//| One of the integer values: `PUBLIC`, `RANDOM_STATIC`, `RANDOM_PRIVATE_RESOLVABLE`, +//| or `RANDOM_PRIVATE_NON_RESOLVABLE`. +//| +STATIC mp_obj_t bleio_address_get_type(mp_obj_t self_in) { + bleio_address_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_address_get_type(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_address_get_type_obj, bleio_address_get_type); + +const mp_obj_property_t bleio_address_type_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_address_get_type_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: __eq__(other) +//| +//| Two Address objects are equal if their addresses and address types are equal. +//| +STATIC mp_obj_t bleio_address_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { + switch (op) { + // Two Addresses are equal if their address bytes and address_type are equal + case MP_BINARY_OP_EQUAL: + if (MP_OBJ_IS_TYPE(rhs_in, &bleio_address_type)) { + bleio_address_obj_t *lhs = MP_OBJ_TO_PTR(lhs_in); + bleio_address_obj_t *rhs = MP_OBJ_TO_PTR(rhs_in); + return mp_obj_new_bool( + mp_obj_equal(common_hal_bleio_address_get_address_bytes(lhs), + common_hal_bleio_address_get_address_bytes(rhs)) && + common_hal_bleio_address_get_type(lhs) == + common_hal_bleio_address_get_type(rhs)); + + } else { + return mp_const_false; + } + + default: + return MP_OBJ_NULL; // op not supported + } +} + +//| .. method:: __hash__() +//| +//| Returns a hash for the Address data. +//| +STATIC mp_obj_t bleio_address_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + switch (op) { + // Two Addresses are equal if their address bytes and address_type are equal + case MP_UNARY_OP_HASH: { + mp_obj_t bytes = common_hal_bleio_address_get_address_bytes(MP_OBJ_TO_PTR(self_in)); + GET_STR_HASH(bytes, h); + if (h == 0) { + GET_STR_DATA_LEN(bytes, data, len); + h = qstr_compute_hash(data, len); + } + h ^= common_hal_bleio_address_get_type(MP_OBJ_TO_PTR(self_in)); + return MP_OBJ_NEW_SMALL_INT(h); + } + default: + return MP_OBJ_NULL; // op not supported + } +} + +STATIC void bleio_address_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + bleio_address_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_buffer_info_t buf_info; + mp_obj_t address_bytes = common_hal_bleio_address_get_address_bytes(self); + mp_get_buffer_raise(address_bytes, &buf_info, MP_BUFFER_READ); + + const uint8_t *buf = (uint8_t *) buf_info.buf; + mp_printf(print, "
", + buf[5], buf[4], buf[3], buf[2], buf[1], buf[0]); +} + +//| .. data:: PUBLIC +//| +//| A publicly known address, with a company ID (high 24 bits)and company-assigned part (low 24 bits). +//| +//| .. data:: RANDOM_STATIC +//| +//| A randomly generated address that does not change often. It may never change or may change after +//| a power cycle. +//| +//| .. data:: RANDOM_PRIVATE_RESOLVABLE +//| +//| An address that is usable when the peer knows the other device's secret Identity Resolving Key (IRK). +//| +//| .. data:: RANDOM_PRIVATE_NON_RESOLVABLE +//| +//| A randomly generated address that changes on every connection. +//| +STATIC const mp_rom_map_elem_t bleio_address_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_address_bytes), MP_ROM_PTR(&bleio_address_address_bytes_obj) }, + { MP_ROM_QSTR(MP_QSTR_type), MP_ROM_PTR(&bleio_address_type_obj) }, + // These match the BLE_GAP_ADDR_TYPES values used by the nRF library. + { MP_ROM_QSTR(MP_QSTR_PUBLIC), MP_ROM_INT(0) }, + { MP_ROM_QSTR(MP_QSTR_RANDOM_STATIC), MP_ROM_INT(1) }, + { MP_ROM_QSTR(MP_QSTR_RANDOM_PRIVATE_RESOLVABLE), MP_ROM_INT(2) }, + { MP_ROM_QSTR(MP_QSTR_RANDOM_PRIVATE_NON_RESOLVABLE), MP_ROM_INT(3) }, + +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_address_locals_dict, bleio_address_locals_dict_table); + +const mp_obj_type_t bleio_address_type = { + { &mp_type_type }, + .name = MP_QSTR_Address, + .make_new = bleio_address_make_new, + .print = bleio_address_print, + .unary_op = bleio_address_unary_op, + .binary_op = bleio_address_binary_op, + .locals_dict = (mp_obj_dict_t*)&bleio_address_locals_dict +}; diff --git a/shared-bindings/_bleio/Address.h b/shared-bindings/_bleio/Address.h new file mode 100644 index 0000000000000..98b6f80e0e18b --- /dev/null +++ b/shared-bindings/_bleio/Address.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADDRESS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADDRESS_H + +#include "py/objtype.h" +#include "shared-module/_bleio/Address.h" + +#define BLEIO_ADDRESS_TYPE_PUBLIC (0) +#define BLEIO_ADDRESS_TYPE_RANDOM_STATIC (1) +#define BLEIO_ADDRESS_TYPE_RANDOM_PRIVATE_RESOLVABLE (2) +#define BLEIO_ADDRESS_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE (3) + +#define BLEIO_ADDRESS_TYPE_MIN BLEIO_ADDRESS_TYPE_PUBLIC +#define BLEIO_ADDRESS_TYPE_MAX BLEIO_ADDRESS_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE + +extern const mp_obj_type_t bleio_address_type; + +extern void common_hal_bleio_address_construct(bleio_address_obj_t *self, uint8_t *bytes, uint8_t address_type); +extern mp_obj_t common_hal_bleio_address_get_address_bytes(bleio_address_obj_t *self); +extern uint8_t common_hal_bleio_address_get_type(bleio_address_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADDRESS_H diff --git a/shared-bindings/_bleio/Attribute.c b/shared-bindings/_bleio/Attribute.c new file mode 100644 index 0000000000000..2d8b15b9f48f1 --- /dev/null +++ b/shared-bindings/_bleio/Attribute.c @@ -0,0 +1,94 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/UUID.h" + +// + +//| .. currentmodule:: _bleio +//| +//| :class:`Attribute` -- BLE Attribute +//| ========================================================= +//| +//| Definitions associated with all BLE attributes: characteristics, descriptors, etc. +//| :py:class:`~_bleio.Attribute` is, notionally, a superclass of +//| :py:class:`~Characteristic` and :py:class:`~Descriptor`, +//| but is not defined as a Python superclass of those classes. +//| +//| .. class:: Attribute() +//| +//| You cannot create an instance of :py:class:`~_bleio.Attribute`. +//| + +STATIC const mp_rom_map_elem_t bleio_attribute_locals_dict_table[] = { + +//| .. data:: NO_ACCESS +//| +//| security mode: access not allowed +//| +//| .. data:: OPEN +//| +//| security_mode: no security (link is not encrypted) +//| +//| .. data:: ENCRYPT_NO_MITM +//| +//| security_mode: unauthenticated encryption, without man-in-the-middle protection +//| +//| .. data:: ENCRYPT_WITH_MITM +//| +//| security_mode: authenticated encryption, with man-in-the-middle protection +//| +//| .. data:: LESC_ENCRYPT_WITH_MITM +//| +//| security_mode: LESC encryption, with man-in-the-middle protection +//| +//| .. data:: SIGNED_NO_MITM +//| +//| security_mode: unauthenticated data signing, without man-in-the-middle protection +//| +//| .. data:: SIGNED_WITH_MITM +//| +//| security_mode: authenticated data signing, without man-in-the-middle protection +//| + { MP_ROM_QSTR(MP_QSTR_NO_ACCESS), MP_ROM_INT(SECURITY_MODE_NO_ACCESS) }, + { MP_ROM_QSTR(MP_QSTR_OPEN), MP_ROM_INT(SECURITY_MODE_OPEN) }, + { MP_ROM_QSTR(MP_QSTR_ENCRYPT_NO_MITM), MP_ROM_INT(SECURITY_MODE_ENC_NO_MITM) }, + { MP_ROM_QSTR(MP_QSTR_ENCRYPT_WITH_MITM), MP_ROM_INT(SECURITY_MODE_ENC_WITH_MITM) }, + { MP_ROM_QSTR(MP_QSTR_LESC_ENCRYPT_WITH_MITM), MP_ROM_INT(SECURITY_MODE_LESC_ENC_WITH_MITM) }, + { MP_ROM_QSTR(MP_QSTR_SIGNED_NO_MITM), MP_ROM_INT(SECURITY_MODE_SIGNED_NO_MITM) }, + { MP_ROM_QSTR(MP_QSTR_SIGNED_WITH_MITM), MP_ROM_INT(SECURITY_MODE_SIGNED_WITH_MITM) }, + +}; +STATIC MP_DEFINE_CONST_DICT(bleio_attribute_locals_dict, bleio_attribute_locals_dict_table); + +const mp_obj_type_t bleio_attribute_type = { + { &mp_type_type }, + .name = MP_QSTR_Attribute, + .locals_dict = (mp_obj_dict_t*)&bleio_attribute_locals_dict, +}; diff --git a/shared-bindings/_bleio/Attribute.h b/shared-bindings/_bleio/Attribute.h new file mode 100644 index 0000000000000..a0ce045003ac9 --- /dev/null +++ b/shared-bindings/_bleio/Attribute.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ATTRIBUTE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ATTRIBUTE_H + +#include "py/obj.h" + +#include "common-hal/_bleio/Attribute.h" +#include "shared-module/_bleio/Attribute.h" + +extern const mp_obj_type_t bleio_attribute_type; + +extern void common_hal_bleio_attribute_security_mode_check_valid(bleio_attribute_security_mode_t security_mode); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ATTRIBUTE_H diff --git a/shared-bindings/_bleio/Characteristic.c b/shared-bindings/_bleio/Characteristic.c new file mode 100644 index 0000000000000..e55191f7ce6b5 --- /dev/null +++ b/shared-bindings/_bleio/Characteristic.c @@ -0,0 +1,353 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Characteristic` -- BLE service characteristic +//| ========================================================= +//| +//| Stores information about a BLE service characteristic and allows reading +//| and writing of the characteristic's value. +//| +//| .. class:: Characteristic +//| +//| There is no regular constructor for a Characteristic. A new local Characteristic can be created +//| and attached to a Service by calling `add_to_service()`. +//| Remote Characteristic objects are created by `Connection.discover_remote_services()` +//| as part of remote Services. +//| + +//| .. method:: add_to_service(service, uuid, *, properties=0, read_perm=Attribute.OPEN, write_perm=Attribute.OPEN, max_length=20, fixed_length=False, initial_value=None) +//| +//| Create a new Characteristic object, and add it to this Service. +//| +//| :param Service service: The service that will provide this characteristic +//| :param UUID uuid: The uuid of the characteristic +//| :param int properties: The properties of the characteristic, +//| specified as a bitmask of these values bitwise-or'd together: +//| `BROADCAST`, `INDICATE`, `NOTIFY`, `READ`, `WRITE`, `WRITE_NO_RESPONSE`. +//| :param int read_perm: Specifies whether the characteristic can be read by a client, and if so, which +//| security mode is required. Must be one of the integer values `Attribute.NO_ACCESS`, `Attribute.OPEN`, +//| `Attribute.ENCRYPT_NO_MITM`, `Attribute.ENCRYPT_WITH_MITM`, `Attribute.LESC_ENCRYPT_WITH_MITM`, +//| `Attribute.SIGNED_NO_MITM`, or `Attribute.SIGNED_WITH_MITM`. +//| :param int write_perm: Specifies whether the characteristic can be written by a client, and if so, which +//| security mode is required. Values allowed are the same as ``read_perm``. +//| :param int max_length: Maximum length in bytes of the characteristic value. The maximum allowed is +//| is 512, or possibly 510 if ``fixed_length`` is False. The default, 20, is the maximum +//| number of data bytes that fit in a single BLE 4.x ATT packet. +//| :param bool fixed_length: True if the characteristic value is of fixed length. +//| :param buf initial_value: The initial value for this characteristic. If not given, will be +//| filled with zeros. +//| +//| :return: the new Characteristic. +//| +STATIC mp_obj_t bleio_characteristic_add_to_service(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + // class is arg[0], which we can ignore. + + enum { ARG_service, ARG_uuid, ARG_properties, ARG_read_perm, ARG_write_perm, + ARG_max_length, ARG_fixed_length, ARG_initial_value }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_service, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_uuid, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_properties, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_read_perm, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = SECURITY_MODE_OPEN} }, + { MP_QSTR_write_perm, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = SECURITY_MODE_OPEN} }, + { MP_QSTR_max_length, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = 20} }, + { MP_QSTR_fixed_length, MP_ARG_KW_ONLY| MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_initial_value, MP_ARG_KW_ONLY| MP_ARG_OBJ, {.u_obj = mp_const_none} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t service_obj = args[ARG_service].u_obj; + if (!MP_OBJ_IS_TYPE(service_obj, &bleio_service_type)) { + mp_raise_TypeError(translate("Expected a Service")); + } + + const mp_obj_t uuid_obj = args[ARG_uuid].u_obj; + if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { + mp_raise_TypeError(translate("Expected a UUID")); + } + + const bleio_characteristic_properties_t properties = args[ARG_properties].u_int; + if (properties & ~CHAR_PROP_ALL) { + mp_raise_ValueError(translate("Invalid properties")); + } + + const bleio_attribute_security_mode_t read_perm = args[ARG_read_perm].u_int; + common_hal_bleio_attribute_security_mode_check_valid(read_perm); + + const bleio_attribute_security_mode_t write_perm = args[ARG_write_perm].u_int; + common_hal_bleio_attribute_security_mode_check_valid(write_perm); + + const mp_int_t max_length = args[ARG_max_length].u_int; + const bool fixed_length = args[ARG_fixed_length].u_bool; + mp_obj_t initial_value = args[ARG_initial_value].u_obj; + + // Length will be validated in common_hal. + mp_buffer_info_t initial_value_bufinfo; + if (initial_value == mp_const_none) { + if (fixed_length && max_length > 0) { + initial_value = mp_obj_new_bytes_of_zeros(max_length); + } else { + initial_value = mp_const_empty_bytes; + } + } + mp_get_buffer_raise(initial_value, &initial_value_bufinfo, MP_BUFFER_READ); + + bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); + characteristic->base.type = &bleio_characteristic_type; + + // Range checking on max_length arg is done by the common_hal layer, because + // it may vary depending on underlying BLE implementation. + common_hal_bleio_characteristic_construct( + characteristic, MP_OBJ_TO_PTR(service_obj), 0, MP_OBJ_TO_PTR(uuid_obj), + properties, read_perm, write_perm, + max_length, fixed_length, &initial_value_bufinfo); + + return MP_OBJ_FROM_PTR(characteristic); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_add_to_service_fun_obj, 3, bleio_characteristic_add_to_service); +STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(bleio_characteristic_add_to_service_obj, MP_ROM_PTR(&bleio_characteristic_add_to_service_fun_obj)); + + + +//| .. attribute:: properties +//| +//| An int bitmask representing which properties are set, specified as bitwise or'ing of +//| of these possible values. +//| `BROADCAST`, `INDICATE`, `NOTIFY`, `READ`, `WRITE`, `WRITE_NO_RESPONSE`. +//| +STATIC mp_obj_t bleio_characteristic_get_properties(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_characteristic_get_properties(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_properties_obj, bleio_characteristic_get_properties); + +const mp_obj_property_t bleio_characteristic_properties_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_characteristic_get_properties_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: uuid +//| +//| The UUID of this characteristic. (read-only) +//| +//| Will be ``None`` if the 128-bit UUID for this characteristic is not known. +//| +STATIC mp_obj_t bleio_characteristic_get_uuid(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + + bleio_uuid_obj_t *uuid = common_hal_bleio_characteristic_get_uuid(self); + return uuid ? MP_OBJ_FROM_PTR(uuid) : mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_uuid_obj, bleio_characteristic_get_uuid); + +const mp_obj_property_t bleio_characteristic_uuid_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_characteristic_get_uuid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: value +//| +//| The value of this characteristic. +//| +STATIC mp_obj_t bleio_characteristic_get_value(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + + uint8_t temp[512]; + size_t actual_len = common_hal_bleio_characteristic_get_value(self, temp, sizeof(temp)); + return mp_obj_new_bytearray(actual_len, temp); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_value_obj, bleio_characteristic_get_value); + +STATIC mp_obj_t bleio_characteristic_set_value(mp_obj_t self_in, mp_obj_t value_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(value_in, &bufinfo, MP_BUFFER_READ); + + common_hal_bleio_characteristic_set_value(self, &bufinfo); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_characteristic_set_value_obj, bleio_characteristic_set_value); + +const mp_obj_property_t bleio_characteristic_value_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_characteristic_get_value_obj, + (mp_obj_t)&bleio_characteristic_set_value_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: descriptors +//| +//| A tuple of :py:class:`Descriptor` that describe this characteristic. (read-only) +//| +STATIC mp_obj_t bleio_characteristic_get_descriptors(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + // Return list as a tuple so user won't be able to change it. + bleio_descriptor_obj_t *descriptors = common_hal_bleio_characteristic_get_descriptor_list(self); + bleio_descriptor_obj_t *head = descriptors; + size_t len = 0; + while (head != NULL) { + len++; + head = head->next; + } + mp_obj_tuple_t * t = MP_OBJ_TO_PTR(mp_obj_new_tuple(len, NULL)); + head = descriptors; + for (size_t i = len - 1; i >= 0; i--) { + t->items[i] = MP_OBJ_FROM_PTR(head); + head = head->next; + } + return MP_OBJ_FROM_PTR(t); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_descriptors_obj, bleio_characteristic_get_descriptors); + +const mp_obj_property_t bleio_characteristic_descriptors_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_characteristic_get_descriptors_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: service (read-only) +//| +//| The Service this Characteristic is a part of. +//| +STATIC mp_obj_t bleio_characteristic_get_service(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return common_hal_bleio_characteristic_get_service(self); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_get_service_obj, bleio_characteristic_get_service); + +const mp_obj_property_t bleio_characteristic_service_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_characteristic_get_service_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. method:: set_cccd(*, notify=False, indicate=False) +//| +//| Set the remote characteristic's CCCD to enable or disable notification and indication. +//| +//| :param bool notify: True if Characteristic should receive notifications of remote writes +//| :param float indicate: True if Characteristic should receive indications of remote writes +//| +STATIC mp_obj_t bleio_characteristic_set_cccd(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_notify, ARG_indicate }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_notify, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_indicate, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + common_hal_bleio_characteristic_set_cccd(self, args[ARG_notify].u_bool, args[ARG_indicate].u_bool); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_set_cccd_obj, 1, bleio_characteristic_set_cccd); + +STATIC const mp_rom_map_elem_t bleio_characteristic_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_add_to_service), MP_ROM_PTR(&bleio_characteristic_add_to_service_obj) }, + { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&bleio_characteristic_properties_obj) }, + { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_characteristic_uuid_obj) }, + { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&bleio_characteristic_value_obj) }, + { MP_ROM_QSTR(MP_QSTR_set_cccd), MP_ROM_PTR(&bleio_characteristic_set_cccd_obj) }, + + // Bitmask constants to represent properties +//| .. data:: BROADCAST +//| +//| property: allowed in advertising packets +//| +//| .. data:: INDICATE +//| +//| property: server will indicate to the client when the value is set and wait for a response +//| +//| .. data:: NOTIFY +//| +//| property: server will notify the client when the value is set +//| +//| .. data:: READ +//| +//| property: clients may read this characteristic +//| +//| .. data:: WRITE +//| +//| property: clients may write this characteristic; a response will be sent back +//| +//| .. data:: WRITE_NO_RESPONSE +//| +//| property: clients may write this characteristic; no response will be sent back +//| + { MP_ROM_QSTR(MP_QSTR_BROADCAST), MP_ROM_INT(CHAR_PROP_BROADCAST) }, + { MP_ROM_QSTR(MP_QSTR_INDICATE), MP_ROM_INT(CHAR_PROP_INDICATE) }, + { MP_ROM_QSTR(MP_QSTR_NOTIFY), MP_ROM_INT(CHAR_PROP_NOTIFY) }, + { MP_ROM_QSTR(MP_QSTR_READ), MP_ROM_INT(CHAR_PROP_READ) }, + { MP_ROM_QSTR(MP_QSTR_WRITE), MP_ROM_INT(CHAR_PROP_WRITE) }, + { MP_ROM_QSTR(MP_QSTR_WRITE_NO_RESPONSE), MP_ROM_INT(CHAR_PROP_WRITE_NO_RESPONSE) }, + +}; +STATIC MP_DEFINE_CONST_DICT(bleio_characteristic_locals_dict, bleio_characteristic_locals_dict_table); + +STATIC void bleio_characteristic_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->uuid) { + mp_printf(print, "Characteristic("); + bleio_uuid_print(print, MP_OBJ_FROM_PTR(self->uuid), kind); + mp_printf(print, ")"); + } else { + mp_printf(print, ""); + } +} + +const mp_obj_type_t bleio_characteristic_type = { + { &mp_type_type }, + .name = MP_QSTR_Characteristic, + .print = bleio_characteristic_print, + .locals_dict = (mp_obj_dict_t*)&bleio_characteristic_locals_dict, +}; diff --git a/shared-bindings/_bleio/Characteristic.h b/shared-bindings/_bleio/Characteristic.h new file mode 100644 index 0000000000000..c4356fd4b978c --- /dev/null +++ b/shared-bindings/_bleio/Characteristic.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTIC_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTIC_H + +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-module/_bleio/Characteristic.h" +#include "common-hal/_bleio/Characteristic.h" +#include "common-hal/_bleio/Service.h" + +extern const mp_obj_type_t bleio_characteristic_type; + +extern void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo); +extern size_t common_hal_bleio_characteristic_get_value(bleio_characteristic_obj_t *self, uint8_t* buf, size_t len); +extern void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, mp_buffer_info_t *bufinfo); +extern bleio_characteristic_properties_t common_hal_bleio_characteristic_get_properties(bleio_characteristic_obj_t *self); +extern bleio_uuid_obj_t *common_hal_bleio_characteristic_get_uuid(bleio_characteristic_obj_t *self); +extern bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self); +extern bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_characteristic_obj_t *self); +extern void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t *self, bleio_descriptor_obj_t *descriptor); +extern void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTIC_H diff --git a/shared-bindings/_bleio/CharacteristicBuffer.c b/shared-bindings/_bleio/CharacteristicBuffer.c new file mode 100644 index 0000000000000..fc95d0d503bca --- /dev/null +++ b/shared-bindings/_bleio/CharacteristicBuffer.c @@ -0,0 +1,251 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mperrno.h" +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/CharacteristicBuffer.h" +#include "shared-bindings/_bleio/UUID.h" +#include "shared-bindings/util.h" + +STATIC void raise_error_if_not_connected(bleio_characteristic_buffer_obj_t *self) { + if (!common_hal_bleio_characteristic_buffer_connected(self)) { + mp_raise_bleio_ConnectionError(translate("Not connected")); + } +} + +//| .. currentmodule:: _bleio +//| +//| :class:`CharacteristicBuffer` -- BLE Service incoming values buffer. +//| ===================================================================== +//| +//| Accumulates a Characteristic's incoming values in a FIFO buffer. +//| +//| .. class:: CharacteristicBuffer(characteristic, *, timeout=1, buffer_size=64) +//| +//| Monitor the given Characteristic. Each time a new value is written to the Characteristic +//| add the newly-written bytes to a FIFO buffer. +//| +//| :param Characteristic characteristic: The Characteristic to monitor. +//| It may be a local Characteristic provided by a Peripheral Service, or a remote Characteristic +//| in a remote Service that a Central has connected to. +//| :param int timeout: the timeout in seconds to wait for the first character and between subsequent characters. +//| :param int buffer_size: Size of ring buffer that stores incoming data coming from client. +//| Must be >= 1. +//| +STATIC mp_obj_t bleio_characteristic_buffer_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_characteristic, ARG_timeout, ARG_buffer_size, }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_characteristic, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(1)} }, + { MP_QSTR_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t characteristic = args[ARG_characteristic].u_obj; + + mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + if (timeout < 0.0f) { + mp_raise_ValueError(translate("timeout must be >= 0.0")); + } + + const int buffer_size = args[ARG_buffer_size].u_int; + if (buffer_size < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_buffer_size); + } + + if (!MP_OBJ_IS_TYPE(characteristic, &bleio_characteristic_type)) { + mp_raise_TypeError(translate("Expected a Characteristic")); + } + + bleio_characteristic_buffer_obj_t *self = m_new_obj(bleio_characteristic_buffer_obj_t); + self->base.type = &bleio_characteristic_buffer_type; + + common_hal_bleio_characteristic_buffer_construct(self, MP_OBJ_TO_PTR(characteristic), timeout, buffer_size); + + return MP_OBJ_FROM_PTR(self); +} + +STATIC void check_for_deinit(bleio_characteristic_buffer_obj_t *self) { + if (common_hal_bleio_characteristic_buffer_deinited(self)) { + raise_deinited_error(); + } +} + +// These are standard stream methods. Code is in py/stream.c. +// +//| .. method:: read(nbytes=None) +//| +//| Read characters. If ``nbytes`` is specified then read at most that many +//| bytes. Otherwise, read everything that arrives until the connection +//| times out. Providing the number of bytes expected is highly recommended +//| because it will be faster. +//| +//| :return: Data read +//| :rtype: bytes or None +//| +//| .. method:: readinto(buf) +//| +//| Read bytes into the ``buf``. Read at most ``len(buf)`` bytes. +//| +//| :return: number of bytes read and stored into ``buf`` +//| :rtype: int or None (on a non-blocking error) +//| +//| .. method:: readline() +//| +//| Read a line, ending in a newline character. +//| +//| :return: the line read +//| :rtype: int or None +//| + +// These three methods are used by the shared stream methods. +STATIC mp_uint_t bleio_characteristic_buffer_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { + bleio_characteristic_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + raise_error_if_not_connected(self); + byte *buf = buf_in; + + // make sure we want at least 1 char + if (size == 0) { + return 0; + } + + return common_hal_bleio_characteristic_buffer_read(self, buf, size, errcode); +} + +STATIC mp_uint_t bleio_characteristic_buffer_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { + mp_raise_NotImplementedError(translate("CharacteristicBuffer writing not provided")); + return 0; +} + +STATIC mp_uint_t bleio_characteristic_buffer_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { + bleio_characteristic_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + raise_error_if_not_connected(self); + mp_uint_t ret; + if (request == MP_IOCTL_POLL) { + mp_uint_t flags = arg; + ret = 0; + if ((flags & MP_IOCTL_POLL_RD) && common_hal_bleio_characteristic_buffer_rx_characters_available(self) > 0) { + ret |= MP_IOCTL_POLL_RD; + } +// No writing provided. +// if ((flags & MP_IOCTL_POLL_WR) && common_hal_busio_uart_ready_to_tx(self)) { +// ret |= MP_IOCTL_POLL_WR; +// } + } else { + *errcode = MP_EINVAL; + ret = MP_STREAM_ERROR; + } + return ret; +} + +//| .. attribute:: in_waiting +//| +//| The number of bytes in the input buffer, available to be read +//| +STATIC mp_obj_t bleio_characteristic_buffer_obj_get_in_waiting(mp_obj_t self_in) { + bleio_characteristic_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_characteristic_buffer_rx_characters_available(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_buffer_get_in_waiting_obj, bleio_characteristic_buffer_obj_get_in_waiting); + +const mp_obj_property_t bleio_characteristic_buffer_in_waiting_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_characteristic_buffer_get_in_waiting_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: reset_input_buffer() +//| +//| Discard any unread characters in the input buffer. +//| +STATIC mp_obj_t bleio_characteristic_buffer_obj_reset_input_buffer(mp_obj_t self_in) { + bleio_characteristic_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_bleio_characteristic_buffer_clear_rx_buffer(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_buffer_reset_input_buffer_obj, bleio_characteristic_buffer_obj_reset_input_buffer); + +//| .. method:: deinit() +//| +//| Disable permanently. +//| +STATIC mp_obj_t bleio_characteristic_buffer_deinit(mp_obj_t self_in) { + bleio_characteristic_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_bleio_characteristic_buffer_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_buffer_deinit_obj, bleio_characteristic_buffer_deinit); + +STATIC const mp_rom_map_elem_t bleio_characteristic_buffer_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bleio_characteristic_buffer_deinit_obj) }, + + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)}, + { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, + // CharacteristicBuffer is currently read-only. + // { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_reset_input_buffer), MP_ROM_PTR(&bleio_characteristic_buffer_reset_input_buffer_obj) }, + // Properties + { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&bleio_characteristic_buffer_in_waiting_obj) }, + +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_characteristic_buffer_locals_dict, bleio_characteristic_buffer_locals_dict_table); + +STATIC const mp_stream_p_t characteristic_buffer_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = bleio_characteristic_buffer_read, + .write = bleio_characteristic_buffer_write, + .ioctl = bleio_characteristic_buffer_ioctl, + .is_text = false, + // Match PySerial when possible, such as disallowing optional length argument for .readinto() + .pyserial_compatibility = true, +}; + + +const mp_obj_type_t bleio_characteristic_buffer_type = { + { &mp_type_type }, + .name = MP_QSTR_CharacteristicBuffer, + .make_new = bleio_characteristic_buffer_make_new, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &characteristic_buffer_stream_p, + .locals_dict = (mp_obj_dict_t*)&bleio_characteristic_buffer_locals_dict +}; diff --git a/shared-bindings/_bleio/CharacteristicBuffer.h b/shared-bindings/_bleio/CharacteristicBuffer.h new file mode 100644 index 0000000000000..83e6fef02f726 --- /dev/null +++ b/shared-bindings/_bleio/CharacteristicBuffer.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTICBUFFER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTICBUFFER_H + +#include "common-hal/_bleio/CharacteristicBuffer.h" + +extern const mp_obj_type_t bleio_characteristic_buffer_type; + +extern void common_hal_bleio_characteristic_buffer_construct(bleio_characteristic_buffer_obj_t *self, bleio_characteristic_obj_t *characteristic, mp_float_t timeout, size_t buffer_size); +int common_hal_bleio_characteristic_buffer_read(bleio_characteristic_buffer_obj_t *self, uint8_t *data, size_t len, int *errcode); +uint32_t common_hal_bleio_characteristic_buffer_rx_characters_available(bleio_characteristic_buffer_obj_t *self); +void common_hal_bleio_characteristic_buffer_clear_rx_buffer(bleio_characteristic_buffer_obj_t *self); +bool common_hal_bleio_characteristic_buffer_deinited(bleio_characteristic_buffer_obj_t *self); +int common_hal_bleio_characteristic_buffer_deinit(bleio_characteristic_buffer_obj_t *self); +bool common_hal_bleio_characteristic_buffer_connected(bleio_characteristic_buffer_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTICBUFFER_H diff --git a/shared-bindings/_bleio/Connection.c b/shared-bindings/_bleio/Connection.c new file mode 100644 index 0000000000000..c157af3652a00 --- /dev/null +++ b/shared-bindings/_bleio/Connection.c @@ -0,0 +1,256 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_bleio/Connection.h" + +#include +#include + +#include "ble_drv.h" +#include "py/objarray.h" +#include "py/objproperty.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Connection` -- A BLE connection +//| ========================================================= +//| +//| A BLE connection to another device. Used to discover and interact with services on the other +//| device. +//| +//| Usage:: +//| +//| import _bleio +//| +//| my_entry = None +//| for entry in _bleio.adapter.scan(2.5): +//| if entry.name is not None and entry.name == 'InterestingPeripheral': +//| my_entry = entry +//| break +//| +//| if not my_entry: +//| raise Exception("'InterestingPeripheral' not found") +//| +//| connection = _bleio.adapter.connect(my_entry.address, timeout=10) +//| + +void bleio_connection_ensure_connected(bleio_connection_obj_t *self) { + if (!common_hal_bleio_connection_get_connected(self)) { + mp_raise_bleio_ConnectionError(translate("Connection has been disconnected and can no longer be used. Create a new connection.")); + } +} + +//| .. class:: Connection() +//| +//| Connections cannot be made directly. Instead, to initiate a connection use `Adapter.connect`. +//| Connections may also be made when another device initiates a connection. To use a Connection +//| created by a peer, read the `Adapter.connections` property. +//| +//| .. method:: disconnect() +//| +//| Disconnects from the remote peripheral. Does nothing if already disconnected. +//| +STATIC mp_obj_t bleio_connection_disconnect(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + // common_hal_bleio_connection_disconnect() does nothing if already disconnected. + common_hal_bleio_connection_disconnect(self->connection); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_disconnect_obj, bleio_connection_disconnect); + + +//| .. method:: pair(*, bond=True) +//| +//| Pair to the peer to improve security. +//| +STATIC mp_obj_t bleio_connection_pair(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_bond }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_bond, MP_ARG_BOOL, {.u_bool = true} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bleio_connection_ensure_connected(self); + + common_hal_bleio_connection_pair(self->connection, args[ARG_bond].u_bool); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_connection_pair_obj, 1, bleio_connection_pair); + +//| .. method:: discover_remote_services(service_uuids_whitelist=None) +//| +//| Do BLE discovery for all services or for the given service UUIDS, +//| to find their handles and characteristics, and return the discovered services. +//| `Connection.connected` must be True. +//| +//| :param iterable service_uuids_whitelist: +//| +//| an iterable of :py:class:~`UUID` objects for the services provided by the peripheral +//| that you want to use. +//| +//| The peripheral may provide more services, but services not listed are ignored +//| and will not be returned. +//| +//| If service_uuids_whitelist is None, then all services will undergo discovery, which can be +//| slow. +//| +//| If the service UUID is 128-bit, or its characteristic UUID's are 128-bit, you +//| you must have already created a :py:class:~`UUID` object for that UUID in order for the +//| service or characteristic to be discovered. Creating the UUID causes the UUID to be +//| registered for use. (This restriction may be lifted in the future.) +//| +//| :return: A tuple of `_bleio.Service` objects provided by the remote peripheral. +//| +STATIC mp_obj_t bleio_connection_discover_remote_services(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_service_uuids_whitelist }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_service_uuids_whitelist, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bleio_connection_ensure_connected(self); + + return MP_OBJ_FROM_PTR(common_hal_bleio_connection_discover_remote_services( + self, + args[ARG_service_uuids_whitelist].u_obj)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_connection_discover_remote_services_obj, 1, bleio_connection_discover_remote_services); + +//| .. attribute:: connected +//| +//| True if connected to the remote peer. +//| +STATIC mp_obj_t bleio_connection_get_connected(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_connection_get_connected(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_get_connected_obj, bleio_connection_get_connected); + +const mp_obj_property_t bleio_connection_connected_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_connection_get_connected_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + + +//| .. attribute:: paired +//| +//| True if paired to the remote peer. +//| +STATIC mp_obj_t bleio_connection_get_paired(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_connection_get_paired(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_get_paired_obj, bleio_connection_get_paired); + +const mp_obj_property_t bleio_connection_paired_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_connection_get_paired_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + + +//| .. attribute:: connection_interval +//| +//| Time between transmissions in milliseconds. Will be multiple of 1.25ms. Lower numbers +//| increase speed and decrease latency but increase power consumption. +//| +//| When setting connection_interval, the peer may reject the new interval and +//| `connection_interval` will then remain the same. +//| +//| Apple has additional guidelines that dictate should be a multiple of 15ms except if HID is +//| available. When HID is available Apple devices may accept 11.25ms intervals. +//| +//| +STATIC mp_obj_t bleio_connection_get_connection_interval(mp_obj_t self_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + + bleio_connection_ensure_connected(self); + return mp_obj_new_float(common_hal_bleio_connection_get_connection_interval(self->connection)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_connection_get_connection_interval_obj, bleio_connection_get_connection_interval); + +STATIC mp_obj_t bleio_connection_set_connection_interval(mp_obj_t self_in, mp_obj_t interval_in) { + bleio_connection_obj_t *self = MP_OBJ_TO_PTR(self_in); + + mp_float_t interval = mp_obj_get_float(interval_in); + + bleio_connection_ensure_connected(self); + common_hal_bleio_connection_set_connection_interval(self->connection, interval); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_connection_set_connection_interval_obj, bleio_connection_set_connection_interval); + +const mp_obj_property_t bleio_connection_connection_interval_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_connection_get_connection_interval_obj, + (mp_obj_t)&bleio_connection_set_connection_interval_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_connection_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_pair), MP_ROM_PTR(&bleio_connection_pair_obj) }, + { MP_ROM_QSTR(MP_QSTR_disconnect), MP_ROM_PTR(&bleio_connection_disconnect_obj) }, + { MP_ROM_QSTR(MP_QSTR_discover_remote_services), MP_ROM_PTR(&bleio_connection_discover_remote_services_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_connection_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_paired), MP_ROM_PTR(&bleio_connection_paired_obj) }, + { MP_ROM_QSTR(MP_QSTR_connection_interval), MP_ROM_PTR(&bleio_connection_connection_interval_obj) }, + +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_connection_locals_dict, bleio_connection_locals_dict_table); + +const mp_obj_type_t bleio_connection_type = { + { &mp_type_type }, + .name = MP_QSTR_Connection, + .locals_dict = (mp_obj_dict_t*)&bleio_connection_locals_dict, + .unary_op = mp_generic_unary_op, +}; diff --git a/shared-bindings/_bleio/Connection.h b/shared-bindings/_bleio/Connection.h new file mode 100644 index 0000000000000..c6f260160804d --- /dev/null +++ b/shared-bindings/_bleio/Connection.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H + +#include "py/objtuple.h" +#include "common-hal/_bleio/Connection.h" +#include "common-hal/_bleio/Service.h" + +extern const mp_obj_type_t bleio_connection_type; + +extern void common_hal_bleio_connection_pair(bleio_connection_internal_t *self, bool bond); +extern void common_hal_bleio_connection_disconnect(bleio_connection_internal_t *self); +extern bool common_hal_bleio_connection_get_connected(bleio_connection_obj_t *self); +extern bool common_hal_bleio_connection_get_paired(bleio_connection_obj_t *self); +extern mp_obj_tuple_t *common_hal_bleio_connection_discover_remote_services(bleio_connection_obj_t *self, mp_obj_t service_uuids_whitelist); + +mp_float_t common_hal_bleio_connection_get_connection_interval(bleio_connection_internal_t *self); +void common_hal_bleio_connection_set_connection_interval(bleio_connection_internal_t *self, mp_float_t new_interval); + +void bleio_connection_ensure_connected(bleio_connection_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CONNECTION_H diff --git a/shared-bindings/_bleio/Descriptor.c b/shared-bindings/_bleio/Descriptor.c new file mode 100644 index 0000000000000..f7b6b5bbf16b8 --- /dev/null +++ b/shared-bindings/_bleio/Descriptor.c @@ -0,0 +1,232 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/UUID.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Descriptor` -- BLE descriptor +//| ========================================================= +//| +//| Stores information about a BLE descriptor. +//| Descriptors are attached to BLE characteristics and provide contextual +//| information about the characteristic. +//| +//| .. class:: Descriptor +//| +//| There is no regular constructor for a Descriptor. A new local Descriptor can be created +//| and attached to a Characteristic by calling `add_to_characteristic()`. +//| Remote Descriptor objects are created by `Connection.discover_remote_services()` +//| as part of remote Characteristics in the remote Services that are discovered. +//| +//| .. classmethod:: add_to_characteristic(characteristic, uuid, *, read_perm=`Attribute.OPEN`, write_perm=`Attribute.OPEN`, max_length=20, fixed_length=False, initial_value=b'') +//| +//| Create a new Descriptor object, and add it to this Service. +//| +//| :param Characteristic characteristic: The characteristic that will hold this descriptor +//| :param UUID uuid: The uuid of the descriptor +//| :param int read_perm: Specifies whether the descriptor can be read by a client, and if so, which +//| security mode is required. Must be one of the integer values `Attribute.NO_ACCESS`, `Attribute.OPEN`, +//| `Attribute.ENCRYPT_NO_MITM`, `Attribute.ENCRYPT_WITH_MITM`, `Attribute.LESC_ENCRYPT_WITH_MITM`, +//| `Attribute.SIGNED_NO_MITM`, or `Attribute.SIGNED_WITH_MITM`. +//| :param int write_perm: Specifies whether the descriptor can be written by a client, and if so, which +//| security mode is required. Values allowed are the same as ``read_perm``. +//| :param int max_length: Maximum length in bytes of the descriptor value. The maximum allowed is +//| is 512, or possibly 510 if ``fixed_length`` is False. The default, 20, is the maximum +//| number of data bytes that fit in a single BLE 4.x ATT packet. +//| :param bool fixed_length: True if the descriptor value is of fixed length. +//| :param buf initial_value: The initial value for this descriptor. +//| +//| :return: the new Descriptor. +//| +STATIC mp_obj_t bleio_descriptor_add_to_characteristic(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + // class is arg[0], which we can ignore. + + enum { ARG_characteristic, ARG_uuid, ARG_read_perm, ARG_write_perm, + ARG_max_length, ARG_fixed_length, ARG_initial_value }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_characteristic, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_uuid, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_read_perm, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = SECURITY_MODE_OPEN} }, + { MP_QSTR_write_perm, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = SECURITY_MODE_OPEN} }, + { MP_QSTR_max_length, MP_ARG_KW_ONLY| MP_ARG_INT, {.u_int = 20} }, + { MP_QSTR_fixed_length, MP_ARG_KW_ONLY| MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_initial_value, MP_ARG_KW_ONLY| MP_ARG_OBJ, {.u_obj = mp_const_empty_bytes} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t characteristic_obj = args[ARG_characteristic].u_obj; + if (!MP_OBJ_IS_TYPE(characteristic_obj, &bleio_characteristic_type)) { + mp_raise_TypeError(translate("Expected a Characteristic")); + } + + const mp_obj_t uuid_obj = args[ARG_uuid].u_obj; + if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { + mp_raise_TypeError(translate("Expected a UUID")); + } + + const bleio_attribute_security_mode_t read_perm = args[ARG_read_perm].u_int; + common_hal_bleio_attribute_security_mode_check_valid(read_perm); + + const bleio_attribute_security_mode_t write_perm = args[ARG_write_perm].u_int; + common_hal_bleio_attribute_security_mode_check_valid(write_perm); + + const mp_int_t max_length = args[ARG_max_length].u_int; + const bool fixed_length = args[ARG_fixed_length].u_bool; + mp_obj_t initial_value = args[ARG_initial_value].u_obj; + + // Length will be validated in common_hal. + mp_buffer_info_t initial_value_bufinfo; + if (initial_value == mp_const_none) { + if (fixed_length && max_length > 0) { + initial_value = mp_obj_new_bytes_of_zeros(max_length); + } else { + initial_value = mp_const_empty_bytes; + } + } + mp_get_buffer_raise(initial_value, &initial_value_bufinfo, MP_BUFFER_READ); + + bleio_descriptor_obj_t *descriptor = m_new_obj(bleio_descriptor_obj_t); + descriptor->base.type = &bleio_descriptor_type; + + // Range checking on max_length arg is done by the common_hal layer, because + // it may vary depending on underlying BLE implementation. + common_hal_bleio_descriptor_construct( + descriptor, MP_OBJ_TO_PTR(characteristic_obj), MP_OBJ_TO_PTR(uuid_obj), + read_perm, write_perm, + max_length, fixed_length, &initial_value_bufinfo); + + common_hal_bleio_characteristic_add_descriptor(characteristic_obj, descriptor); + + return MP_OBJ_FROM_PTR(descriptor); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_descriptor_add_to_characteristic_fun_obj, 3, bleio_descriptor_add_to_characteristic); +STATIC MP_DEFINE_CONST_CLASSMETHOD_OBJ(bleio_descriptor_add_to_characteristic_obj, MP_ROM_PTR(&bleio_descriptor_add_to_characteristic_fun_obj)); + +//| .. attribute:: uuid +//| +//| The descriptor uuid. (read-only) +//| +STATIC mp_obj_t bleio_descriptor_get_uuid(mp_obj_t self_in) { + bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); + + bleio_uuid_obj_t *uuid = common_hal_bleio_descriptor_get_uuid(self); + return uuid ? MP_OBJ_FROM_PTR(uuid) : mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(bleio_descriptor_get_uuid_obj, bleio_descriptor_get_uuid); + +const mp_obj_property_t bleio_descriptor_uuid_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_descriptor_get_uuid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: characteristic (read-only) +//| +//| The Characteristic this Descriptor is a part of. +//| +STATIC mp_obj_t bleio_descriptor_get_characteristic(mp_obj_t self_in) { + bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return common_hal_bleio_descriptor_get_characteristic(self); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_descriptor_get_characteristic_obj, bleio_descriptor_get_characteristic); + +const mp_obj_property_t bleio_descriptor_characteristic_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_descriptor_get_characteristic_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: value +//| +//| The value of this descriptor. +//| +STATIC mp_obj_t bleio_descriptor_get_value(mp_obj_t self_in) { + bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); + + uint8_t temp[512]; + size_t actual_len = common_hal_bleio_descriptor_get_value(self, temp, sizeof(temp)); + return mp_obj_new_bytearray(actual_len, temp); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_descriptor_get_value_obj, bleio_descriptor_get_value); + +STATIC mp_obj_t bleio_descriptor_set_value(mp_obj_t self_in, mp_obj_t value_in) { + bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(value_in, &bufinfo, MP_BUFFER_READ); + + common_hal_bleio_descriptor_set_value(self, &bufinfo); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_descriptor_set_value_obj, bleio_descriptor_set_value); + +const mp_obj_property_t bleio_descriptor_value_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_descriptor_get_value_obj, + (mp_obj_t)&bleio_descriptor_set_value_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_descriptor_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_add_to_characteristic), MP_ROM_PTR(&bleio_descriptor_add_to_characteristic_obj) }, + { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_descriptor_uuid_obj) }, + { MP_ROM_QSTR(MP_QSTR_characteristic), MP_ROM_PTR(&bleio_descriptor_characteristic_obj) }, + { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&bleio_descriptor_value_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_descriptor_locals_dict, bleio_descriptor_locals_dict_table); + +STATIC void bleio_descriptor_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + bleio_descriptor_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->uuid) { + mp_printf(print, "Descriptor("); + bleio_uuid_print(print, MP_OBJ_FROM_PTR(self->uuid), kind); + mp_printf(print, ")"); + } else { + mp_printf(print, ""); + } +} + +const mp_obj_type_t bleio_descriptor_type = { + { &mp_type_type }, + .name = MP_QSTR_Descriptor, + .print = bleio_descriptor_print, + .locals_dict = (mp_obj_dict_t*)&bleio_descriptor_locals_dict +}; diff --git a/shared-bindings/_bleio/Descriptor.h b/shared-bindings/_bleio/Descriptor.h new file mode 100644 index 0000000000000..273cb1c1e3e3e --- /dev/null +++ b/shared-bindings/_bleio/Descriptor.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_DESCRIPTOR_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_DESCRIPTOR_H + +#include "shared-module/_bleio/Attribute.h" +#include "common-hal/_bleio/Characteristic.h" +#include "common-hal/_bleio/Descriptor.h" +#include "common-hal/_bleio/UUID.h" + +extern const mp_obj_type_t bleio_descriptor_type; + +extern void common_hal_bleio_descriptor_construct(bleio_descriptor_obj_t *self, bleio_characteristic_obj_t *characteristic, bleio_uuid_obj_t *uuid, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo); +extern bleio_uuid_obj_t *common_hal_bleio_descriptor_get_uuid(bleio_descriptor_obj_t *self); +extern bleio_characteristic_obj_t *common_hal_bleio_descriptor_get_characteristic(bleio_descriptor_obj_t *self); +extern size_t common_hal_bleio_descriptor_get_value(bleio_descriptor_obj_t *self, uint8_t* buf, size_t len); +extern void common_hal_bleio_descriptor_set_value(bleio_descriptor_obj_t *self, mp_buffer_info_t *bufinfo); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_DESCRIPTOR_H diff --git a/shared-bindings/_bleio/PacketBuffer.c b/shared-bindings/_bleio/PacketBuffer.c new file mode 100644 index 0000000000000..9e3666044abd1 --- /dev/null +++ b/shared-bindings/_bleio/PacketBuffer.c @@ -0,0 +1,206 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mperrno.h" +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/PacketBuffer.h" +#include "shared-bindings/_bleio/UUID.h" +#include "shared-bindings/util.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`PacketBuffer` -- Packet-oriented characteristic usage. +//| ===================================================================== +//| +//| Accumulates a Characteristic's incoming packets in a FIFO buffer and facilitates packet aware +//| outgoing writes. A packet's size is either the characteristic length or the maximum transmission +//| unit (MTU), whichever is smaller. The MTU can change so check `packet_size` before creating a +//| buffer to store data. +//| +//| When we're the server, we ignore all connections besides the first to subscribe to +//| notifications. +//| +//| .. class:: PacketBuffer(characteristic, *, buffer_size) +//| +//| Monitor the given Characteristic. Each time a new value is written to the Characteristic +//| add the newly-written bytes to a FIFO buffer. +//| +//| :param Characteristic characteristic: The Characteristic to monitor. +//| It may be a local Characteristic provided by a Peripheral Service, or a remote Characteristic +//| in a remote Service that a Central has connected to. +//| :param int buffer_size: Size of ring buffer (in packets of the Characteristic's maximum +//| length) that stores incoming packets coming from the peer. +//| +STATIC mp_obj_t bleio_packet_buffer_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_characteristic, ARG_buffer_size }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_characteristic, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_buffer_size, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t characteristic = args[ARG_characteristic].u_obj; + + const int buffer_size = args[ARG_buffer_size].u_int; + if (buffer_size < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_buffer_size); + } + + if (!MP_OBJ_IS_TYPE(characteristic, &bleio_characteristic_type)) { + mp_raise_TypeError(translate("Expected a Characteristic")); + } + + bleio_packet_buffer_obj_t *self = m_new_obj(bleio_packet_buffer_obj_t); + self->base.type = &bleio_packet_buffer_type; + + common_hal_bleio_packet_buffer_construct(self, MP_OBJ_TO_PTR(characteristic), buffer_size); + + return MP_OBJ_FROM_PTR(self); +} + +STATIC void check_for_deinit(bleio_packet_buffer_obj_t *self) { + if (common_hal_bleio_packet_buffer_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: readinto(buf) +//| +//| Reads a single BLE packet into the ``buf``. Raises an exception if the next packet is longer +//| than the given buffer. Use `packet_size` to read the maximum length of a single packet. +//| +//| :return: number of bytes read and stored into ``buf`` +//| :rtype: int +//| +STATIC mp_obj_t bleio_packet_buffer_readinto(mp_obj_t self_in, mp_obj_t buffer_obj) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer_obj, &bufinfo, MP_BUFFER_WRITE); + + int size = common_hal_bleio_packet_buffer_readinto(self, bufinfo.buf, bufinfo.len); + if (size < 0) { + mp_raise_ValueError_varg(translate("Buffer too short by %d bytes"), size * -1); + } + + return MP_OBJ_NEW_SMALL_INT(size); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_packet_buffer_readinto_obj, bleio_packet_buffer_readinto); + +//| .. method:: write(data, *, header=None) +//| +//| Writes all bytes from data into the same outgoing packet. The bytes from header are included +//| before data when the pending packet is currently empty. +//| +//| This does not block until the data is sent. It only blocks until the data is pending. +//| +// TODO: Add a kwarg `merge=False` to dictate whether subsequent writes are merged into a pending +// one. +STATIC mp_obj_t bleio_packet_buffer_write(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_data, ARG_header }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_header, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + + mp_buffer_info_t data_bufinfo; + mp_get_buffer_raise(args[ARG_data].u_obj, &data_bufinfo, MP_BUFFER_READ); + + mp_buffer_info_t header_bufinfo; + header_bufinfo.len = 0; + if (args[ARG_header].u_obj != MP_OBJ_NULL) { + mp_get_buffer_raise(args[ARG_header].u_obj, &header_bufinfo, MP_BUFFER_READ); + } + + common_hal_bleio_packet_buffer_write(self, data_bufinfo.buf, data_bufinfo.len, + header_bufinfo.buf, header_bufinfo.len); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_packet_buffer_write_obj, 1, bleio_packet_buffer_write); + +//| .. method:: deinit() +//| +//| Disable permanently. +//| +STATIC mp_obj_t bleio_packet_buffer_deinit(mp_obj_t self_in) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_bleio_packet_buffer_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_deinit_obj, bleio_packet_buffer_deinit); + +//| .. attribute:: packet_size +//| +//| Maximum size of each packet in bytes. This is the minimum of the Characteristic length and +//| the negotiated Maximum Transfer Unit (MTU). +//| +STATIC mp_obj_t bleio_packet_buffer_get_packet_size(mp_obj_t self_in) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_packet_buffer_get_packet_size(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_get_packet_size_obj, bleio_packet_buffer_get_packet_size); + +const mp_obj_property_t bleio_packet_buffer_packet_size_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_packet_buffer_get_packet_size_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_packet_buffer_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bleio_packet_buffer_deinit_obj) }, + + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&bleio_packet_buffer_readinto_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&bleio_packet_buffer_write_obj) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_packet_size), MP_ROM_PTR(&bleio_packet_buffer_packet_size_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_packet_buffer_locals_dict, bleio_packet_buffer_locals_dict_table); + + +const mp_obj_type_t bleio_packet_buffer_type = { + { &mp_type_type }, + .name = MP_QSTR_PacketBuffer, + .make_new = bleio_packet_buffer_make_new, + .locals_dict = (mp_obj_dict_t*)&bleio_packet_buffer_locals_dict +}; diff --git a/shared-bindings/_bleio/PacketBuffer.h b/shared-bindings/_bleio/PacketBuffer.h new file mode 100644 index 0000000000000..990a2f8bb08f2 --- /dev/null +++ b/shared-bindings/_bleio/PacketBuffer.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H + +#include "common-hal/_bleio/PacketBuffer.h" + +extern const mp_obj_type_t bleio_packet_buffer_type; + +extern void common_hal_bleio_packet_buffer_construct( + bleio_packet_buffer_obj_t *self, bleio_characteristic_obj_t *characteristic, + size_t buffer_size); +void common_hal_bleio_packet_buffer_write(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len, uint8_t* header, size_t header_len); +int common_hal_bleio_packet_buffer_readinto(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len); +uint16_t common_hal_bleio_packet_buffer_get_packet_size(bleio_packet_buffer_obj_t *self); +bool common_hal_bleio_packet_buffer_deinited(bleio_packet_buffer_obj_t *self); +void common_hal_bleio_packet_buffer_deinit(bleio_packet_buffer_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H diff --git a/shared-bindings/_bleio/ScanEntry.c b/shared-bindings/_bleio/ScanEntry.c new file mode 100644 index 0000000000000..d03cd6fb55355 --- /dev/null +++ b/shared-bindings/_bleio/ScanEntry.c @@ -0,0 +1,177 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/_bleio/UUID.h" +#include "shared-module/_bleio/ScanEntry.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`ScanEntry` -- BLE scan data +//| ========================================================= +//| +//| Encapsulates information about a device that was received during scanning. It can be +//| advertisement or scan response data. This object may only be created by a `_bleio.ScanResults`: +//| it has no user-visible constructor. +//| + +//| .. class:: ScanEntry() +//| +//| Cannot be instantiated directly. Use `_bleio.Adapter.start_scan`. +//| +//| .. method:: matches(prefixes, *, all=True) +//| +//| Returns True if the ScanEntry matches all prefixes when ``all`` is True. This is stricter +//| than the scan filtering which accepts any advertisements that match any of the prefixes +//| where all is False. +//| +STATIC mp_obj_t bleio_scanentry_matches(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_prefixes, ARG_all }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_prefixes, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_all, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_prefixes].u_obj, &bufinfo, MP_BUFFER_READ); + return mp_obj_new_bool(common_hal_bleio_scanentry_matches(self, bufinfo.buf, bufinfo.len, args[ARG_all].u_bool)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_scanentry_matches_obj, 2, bleio_scanentry_matches); + +//| .. attribute:: address +//| +//| The address of the device (read-only), of type `_bleio.Address`. +//| +STATIC mp_obj_t bleio_scanentry_get_address(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return common_hal_bleio_scanentry_get_address(self); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_address_obj, bleio_scanentry_get_address); + +const mp_obj_property_t bleio_scanentry_address_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_address_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: advertisement_bytes +//| +//| All the advertisement data present in the packet, returned as a ``bytes`` object. (read-only) +//| +STATIC mp_obj_t scanentry_get_advertisement_bytes(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return common_hal_bleio_scanentry_get_advertisement_bytes(self); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_advertisement_bytes_obj, scanentry_get_advertisement_bytes); + +const mp_obj_property_t bleio_scanentry_advertisement_bytes_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_advertisement_bytes_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: rssi +//| +//| The signal strength of the device at the time of the scan, in integer dBm. (read-only) +//| +STATIC mp_obj_t scanentry_get_rssi(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_int(common_hal_bleio_scanentry_get_rssi(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_rssi_obj, scanentry_get_rssi); + +const mp_obj_property_t bleio_scanentry_rssi_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_rssi_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: connectable +//| +//| True if the device can be connected to. (read-only) +//| +STATIC mp_obj_t scanentry_get_connectable(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(common_hal_bleio_scanentry_get_connectable(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_connectable_obj, scanentry_get_connectable); + +const mp_obj_property_t bleio_scanentry_connectable_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_connectable_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: scan_response +//| +//| True if the entry was a scan response. (read-only) +//| +STATIC mp_obj_t scanentry_get_scan_response(mp_obj_t self_in) { + bleio_scanentry_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(common_hal_bleio_scanentry_get_scan_response(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_scanentry_get_scan_response_obj, scanentry_get_scan_response); + +const mp_obj_property_t bleio_scanentry_scan_response_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_scanentry_get_scan_response_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_scanentry_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&bleio_scanentry_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_advertisement_bytes), MP_ROM_PTR(&bleio_scanentry_advertisement_bytes_obj) }, + { MP_ROM_QSTR(MP_QSTR_rssi), MP_ROM_PTR(&bleio_scanentry_rssi_obj) }, + { MP_ROM_QSTR(MP_QSTR_connectable), MP_ROM_PTR(&bleio_scanentry_connectable_obj) }, + { MP_ROM_QSTR(MP_QSTR_scan_response), MP_ROM_PTR(&bleio_scanentry_scan_response_obj) }, + { MP_ROM_QSTR(MP_QSTR_matches), MP_ROM_PTR(&bleio_scanentry_matches_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_scanentry_locals_dict, bleio_scanentry_locals_dict_table); + +const mp_obj_type_t bleio_scanentry_type = { + { &mp_type_type }, + .name = MP_QSTR_ScanEntry, + .locals_dict = (mp_obj_dict_t*)&bleio_scanentry_locals_dict +}; diff --git a/shared-bindings/_bleio/ScanEntry.h b/shared-bindings/_bleio/ScanEntry.h new file mode 100644 index 0000000000000..9aeaf20d331c1 --- /dev/null +++ b/shared-bindings/_bleio/ScanEntry.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANENTRY_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANENTRY_H + +#include "py/obj.h" +#include "shared-module/_bleio/ScanEntry.h" + +extern const mp_obj_type_t bleio_scanentry_type; + +mp_obj_t common_hal_bleio_scanentry_get_address(bleio_scanentry_obj_t *self); +mp_obj_t common_hal_bleio_scanentry_get_advertisement_bytes(bleio_scanentry_obj_t *self); +mp_int_t common_hal_bleio_scanentry_get_rssi(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_get_connectable(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_get_scan_response(bleio_scanentry_obj_t *self); +bool common_hal_bleio_scanentry_matches(bleio_scanentry_obj_t *self, uint8_t* prefixes, size_t prefixes_len, bool all); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANENTRY_H diff --git a/shared-bindings/_bleio/ScanResults.c b/shared-bindings/_bleio/ScanResults.c new file mode 100644 index 0000000000000..dcece3d5d4f95 --- /dev/null +++ b/shared-bindings/_bleio/ScanResults.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/ScanResults.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`ScanResults` -- An Iterator over BLE scanning results +//| =============================================================== +//| +//| Iterates over advertising data received while scanning. This object is always created +//| by a `_bleio.Adapter`: it has no user-visible constructor. +//| +STATIC mp_obj_t scanresults_iternext(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &bleio_scanresults_type)); + bleio_scanresults_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_t scan_entry = common_hal_bleio_scanresults_next(self); + if (scan_entry != mp_const_none) { + return scan_entry; + } + return MP_OBJ_STOP_ITERATION; +} + +//| .. class:: ScanResults() +//| +//| Cannot be instantiated directly. Use `_bleio.Adapter.start_scan`. +//| +//| .. method:: __iter__() +//| +//| Returns itself since it is the iterator. +//| +//| .. method:: __next__() +//| +//| Returns the next `_bleio.ScanEntry`. Blocks if none have been received and scanning is still +//| active. Raises `StopIteration` if scanning is finished and no other results are available. +//| + +const mp_obj_type_t bleio_scanresults_type = { + { &mp_type_type }, + .name = MP_QSTR_ScanResults, + .getiter = mp_identity_getiter, + .iternext = scanresults_iternext, +}; diff --git a/shared-bindings/_bleio/ScanResults.h b/shared-bindings/_bleio/ScanResults.h new file mode 100644 index 0000000000000..a8c88c215dc99 --- /dev/null +++ b/shared-bindings/_bleio/ScanResults.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H + +#include "py/obj.h" +#include "shared-module/_bleio/ScanResults.h" + +extern const mp_obj_type_t bleio_scanresults_type; + +mp_obj_t common_hal_bleio_scanresults_next(bleio_scanresults_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SCANRESULTS_H diff --git a/shared-bindings/_bleio/Service.c b/shared-bindings/_bleio/Service.c new file mode 100644 index 0000000000000..bc242bc364e7f --- /dev/null +++ b/shared-bindings/_bleio/Service.c @@ -0,0 +1,201 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`Service` -- BLE GATT Service +//| ========================================================= +//| +//| Stores information about a BLE service and its characteristics. +//| +//| .. class:: Service(uuid, *, secondary=False) +//| +//| Create a new Service identified by the specified UUID. It can be accessed by all +//| connections. This is known as a Service server. Client Service objects are created via +//| `Connection.discover_remote_services`. +//| +//| To mark the Service as secondary, pass `True` as :py:data:`secondary`. +//| +//| :param UUID uuid: The uuid of the service +//| :param bool secondary: If the service is a secondary one +// +//| :return: the new Service +//| +STATIC mp_obj_t bleio_service_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_uuid, ARG_secondary }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_uuid, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_secondary, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t uuid_obj = args[ARG_uuid].u_obj; + if (!MP_OBJ_IS_TYPE(uuid_obj, &bleio_uuid_type)) { + mp_raise_TypeError(translate("Expected a UUID")); + } + + const bool is_secondary = args[ARG_secondary].u_bool; + + bleio_service_obj_t *service = m_new_obj(bleio_service_obj_t); + service->base.type = &bleio_service_type; + + common_hal_bleio_service_construct(service, MP_OBJ_TO_PTR(uuid_obj), is_secondary); + + return MP_OBJ_FROM_PTR(service); +} + +//| .. attribute:: characteristics +//| +//| A tuple of :py:class:`Characteristic` designating the characteristics that are offered by +//| this service. (read-only) +//| +STATIC mp_obj_t bleio_service_get_characteristics(mp_obj_t self_in) { + bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); + // Return list as a tuple so user won't be able to change it. + mp_obj_list_t *char_list = common_hal_bleio_service_get_characteristic_list(self); + return mp_obj_new_tuple(char_list->len, char_list->items); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_service_get_characteristics_obj, bleio_service_get_characteristics); + +const mp_obj_property_t bleio_service_characteristics_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_service_get_characteristics_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: remote +//| +//| True if this is a service provided by a remote device. (read-only) +//| +STATIC mp_obj_t bleio_service_get_remote(mp_obj_t self_in) { + bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_service_get_is_remote(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_service_get_remote_obj, bleio_service_get_remote); + +const mp_obj_property_t bleio_service_remote_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_service_get_remote_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: secondary +//| +//| True if this is a secondary service. (read-only) +//| +STATIC mp_obj_t bleio_service_get_secondary(mp_obj_t self_in) { + bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_service_get_is_secondary(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_service_get_secondary_obj, bleio_service_get_secondary); + +const mp_obj_property_t bleio_service_secondary_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_service_get_secondary_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| .. attribute:: uuid +//| +//| The UUID of this service. (read-only) +//| +//| Will be ``None`` if the 128-bit UUID for this service is not known. +//| +STATIC mp_obj_t bleio_service_get_uuid(mp_obj_t self_in) { + bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); + + bleio_uuid_obj_t *uuid = common_hal_bleio_service_get_uuid(self); + return uuid ? MP_OBJ_FROM_PTR(uuid) : mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_service_get_uuid_obj, bleio_service_get_uuid); + +const mp_obj_property_t bleio_service_uuid_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_service_get_uuid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + + +STATIC const mp_rom_map_elem_t bleio_service_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_characteristics), MP_ROM_PTR(&bleio_service_characteristics_obj) }, + { MP_ROM_QSTR(MP_QSTR_secondary), MP_ROM_PTR(&bleio_service_secondary_obj) }, + { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_service_uuid_obj) }, + { MP_ROM_QSTR(MP_QSTR_remote), MP_ROM_PTR(&bleio_service_remote_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(bleio_service_locals_dict, bleio_service_locals_dict_table); + +STATIC void bleio_service_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + bleio_service_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->uuid) { + mp_printf(print, "Service("); + bleio_uuid_print(print, MP_OBJ_FROM_PTR(self->uuid), kind); + mp_printf(print, ")"); + } else { + mp_printf(print, ""); + } +} + +const mp_obj_type_t bleio_service_type = { + { &mp_type_type }, + .name = MP_QSTR_Service, + .make_new = bleio_service_make_new, + .print = bleio_service_print, + .locals_dict = (mp_obj_dict_t*)&bleio_service_locals_dict +}; + +// Helper for classes that store lists of services. +mp_obj_tuple_t* service_linked_list_to_tuple(bleio_service_obj_t * services) { + // Return list as a tuple so user won't be able to change it. + bleio_service_obj_t *head = services; + size_t len = 0; + while (head != NULL) { + len++; + head = head->next; + } + mp_obj_tuple_t * t = MP_OBJ_TO_PTR(mp_obj_new_tuple(len, NULL)); + head = services; + for (int32_t i = len - 1; i >= 0; i--) { + t->items[i] = MP_OBJ_FROM_PTR(head); + head = head->next; + } + return t; +} diff --git a/shared-bindings/_bleio/Service.h b/shared-bindings/_bleio/Service.h new file mode 100644 index 0000000000000..273c6bd989697 --- /dev/null +++ b/shared-bindings/_bleio/Service.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H + +#include "common-hal/_bleio/Characteristic.h" +#include "common-hal/_bleio/Connection.h" +#include "common-hal/_bleio/Service.h" + +#include "py/objtuple.h" + +const mp_obj_type_t bleio_service_type; + +// Private version that doesn't allocate on the heap +extern uint32_t _common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary, mp_obj_list_t * characteristic_list); +extern void common_hal_bleio_service_construct(bleio_service_obj_t *self, bleio_uuid_obj_t *uuid, bool is_secondary); +extern void common_hal_bleio_service_from_remote_service(bleio_service_obj_t *self, bleio_connection_obj_t* connection, bleio_uuid_obj_t *uuid, bool is_secondary); +extern bleio_uuid_obj_t *common_hal_bleio_service_get_uuid(bleio_service_obj_t *self); +extern mp_obj_list_t *common_hal_bleio_service_get_characteristic_list(bleio_service_obj_t *self); +extern bool common_hal_bleio_service_get_is_remote(bleio_service_obj_t *self); +extern bool common_hal_bleio_service_get_is_secondary(bleio_service_obj_t *self); +extern void common_hal_bleio_service_add_characteristic(bleio_service_obj_t *self, bleio_characteristic_obj_t *characteristic, mp_buffer_info_t *initial_value_bufinfo); + +mp_obj_tuple_t* service_linked_list_to_tuple(bleio_service_obj_t * services); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_SERVICE_H diff --git a/shared-bindings/_bleio/UUID.c b/shared-bindings/_bleio/UUID.c new file mode 100644 index 0000000000000..dd34159022dfd --- /dev/null +++ b/shared-bindings/_bleio/UUID.c @@ -0,0 +1,319 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objproperty.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/UUID.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`UUID` -- BLE UUID +//| ========================================================= +//| +//| A 16-bit or 128-bit UUID. Can be used for services, characteristics, descriptors and more. +//| + +//| .. class:: UUID(value) +//| +//| Create a new UUID or UUID object encapsulating the uuid value. +//| The value can be one of: +//| +//| - an `int` value in range 0 to 0xFFFF (Bluetooth SIG 16-bit UUID) +//| - a buffer object (bytearray, bytes) of 16 bytes in little-endian order (128-bit UUID) +//| - a string of hex digits of the form 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx' +//| +//| Creating a 128-bit UUID registers the UUID with the onboard BLE software, and provides a +//| temporary 16-bit UUID that can be used in place of the full 128-bit UUID. +//| +//| :param value: The uuid value to encapsulate +//| :type value: int or typing.ByteString +//| +STATIC mp_obj_t bleio_uuid_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); + + bleio_uuid_obj_t *self = m_new_obj(bleio_uuid_obj_t); + self->base.type = type; + + const mp_obj_t value = pos_args[0]; + uint8_t uuid128[16]; + + if (MP_OBJ_IS_INT(value)) { + mp_int_t uuid16 = mp_obj_get_int(value); + if (uuid16 < 0 || uuid16 > 0xffff) { + mp_raise_ValueError(translate("UUID integer value must be 0-0xffff")); + } + + // NULL means no 128-bit value. + common_hal_bleio_uuid_construct(self, uuid16, NULL); + + } else { + if (MP_OBJ_IS_STR(value)) { + // 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx' + GET_STR_DATA_LEN(value, chars, len); + char hex[32]; + // Validate length, hyphens, and hex digits. + bool good_uuid = + len == 36 && chars[8] == '-' && chars[13] == '-' && chars[18] == '-' && chars[23] == '-'; + if (good_uuid) { + size_t hex_idx = 0; + for (size_t i = 0; i < len; i++) { + if (unichar_isxdigit(chars[i])) { + hex[hex_idx] = chars[i]; + hex_idx++; + } + } + good_uuid = hex_idx == 32; + } + if (!good_uuid) { + mp_raise_ValueError(translate("UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'")); + } + + size_t hex_idx = 0; + for (int i = 15; i >= 0; i--) { + uuid128[i] = (unichar_xdigit_value(hex[hex_idx]) << 4) | unichar_xdigit_value(hex[hex_idx + 1]); + hex_idx += 2; + } + } else { + // Last possibility is that it's a buf. + mp_buffer_info_t bufinfo; + if (!mp_get_buffer(value, &bufinfo, MP_BUFFER_READ)) { + mp_raise_ValueError(translate("UUID value is not str, int or byte buffer")); + } + + if (bufinfo.len != 16) { + mp_raise_ValueError(translate("Byte buffer must be 16 bytes.")); + } + + memcpy(uuid128, bufinfo.buf, 16); + } + + // Str and bytes both get constructed the same way here. + uint32_t uuid16 = (uuid128[13] << 8) | uuid128[12]; + uuid128[12] = 0; + uuid128[13] = 0; + common_hal_bleio_uuid_construct(self, uuid16, uuid128); + } + + return MP_OBJ_FROM_PTR(self); +} + +//| .. attribute:: uuid16 +//| +//| The 16-bit part of the UUID. (read-only) +//| +//| :type: int +//| +STATIC mp_obj_t bleio_uuid_get_uuid16(mp_obj_t self_in) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_uuid_get_uuid16(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(bleio_uuid_get_uuid16_obj, bleio_uuid_get_uuid16); + +const mp_obj_property_t bleio_uuid_uuid16_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_uuid_get_uuid16_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: uuid128 +//| +//| The 128-bit value of the UUID +//| Raises AttributeError if this is a 16-bit UUID. (read-only) +//| +//| :type: bytes +//| +STATIC mp_obj_t bleio_uuid_get_uuid128(mp_obj_t self_in) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); + + uint8_t uuid128[16]; + if (common_hal_bleio_uuid_get_size(self) != 128) { + mp_raise_AttributeError(translate("not a 128-bit UUID")); + } + common_hal_bleio_uuid_get_uuid128(self, uuid128); + return mp_obj_new_bytes(uuid128, 16); +} + +MP_DEFINE_CONST_FUN_OBJ_1(bleio_uuid_get_uuid128_obj, bleio_uuid_get_uuid128); + +const mp_obj_property_t bleio_uuid_uuid128_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_uuid_get_uuid128_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: size +//| +//| 128 if this UUID represents a 128-bit vendor-specific UUID. 16 if this UUID represents a +//| 16-bit Bluetooth SIG assigned UUID. (read-only) 32-bit UUIDs are not currently supported. +//| +//| :type: int +//| +STATIC mp_obj_t bleio_uuid_get_size(mp_obj_t self_in) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_uuid_get_size(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(bleio_uuid_get_size_obj, bleio_uuid_get_size); + +const mp_obj_property_t bleio_uuid_size_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&bleio_uuid_get_size_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| .. method:: pack_into(buffer, offset=0) +//| +//| Packs the UUID into the given buffer at the given offset. +//| +STATIC mp_obj_t bleio_uuid_pack_into(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + + enum { ARG_buffer, ARG_offset }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_offset, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); + + size_t offset = args[ARG_offset].u_int; + if (offset + common_hal_bleio_uuid_get_size(self) / 8 > bufinfo.len) { + mp_raise_ValueError(translate("Buffer + offset too small %d %d %d")); + } + + common_hal_bleio_uuid_pack_into(self, bufinfo.buf + offset); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_uuid_pack_into_obj, 2, bleio_uuid_pack_into); + +STATIC const mp_rom_map_elem_t bleio_uuid_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_uuid16), MP_ROM_PTR(&bleio_uuid_uuid16_obj) }, + { MP_ROM_QSTR(MP_QSTR_uuid128), MP_ROM_PTR(&bleio_uuid_uuid128_obj) }, + { MP_ROM_QSTR(MP_QSTR_size), MP_ROM_PTR(&bleio_uuid_size_obj) }, + { MP_ROM_QSTR(MP_QSTR_pack_into), MP_ROM_PTR(&bleio_uuid_pack_into_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_uuid_locals_dict, bleio_uuid_locals_dict_table); + +STATIC mp_obj_t bleio_uuid_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); + switch (op) { + case MP_UNARY_OP_HASH: + if (common_hal_bleio_uuid_get_size(self) == 16) { + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_uuid_get_uuid16(self)); + } else { + union { + uint8_t uuid128_bytes[16]; + uint16_t uuid128_uint16[8]; + } uuid128; + common_hal_bleio_uuid_get_uuid128(self, uuid128.uuid128_bytes); + int hash = 0; + for (size_t i = 0; i < MP_ARRAY_SIZE(uuid128.uuid128_uint16); i++) { + hash += uuid128.uuid128_uint16[i]; + } + return MP_OBJ_NEW_SMALL_INT(hash); + } + default: + return MP_OBJ_NULL; // op not supported + } +} + +//| + +//| .. method:: __eq__(other) +//| +//| Two UUID objects are equal if their values match and they are both 128-bit or both 16-bit. +//| +STATIC mp_obj_t bleio_uuid_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_in) { + switch (op) { + // Two UUID's are equal if their uuid16 values match or their uuid128 values match. + case MP_BINARY_OP_EQUAL: + if (MP_OBJ_IS_TYPE(rhs_in, &bleio_uuid_type)) { + if (common_hal_bleio_uuid_get_size(lhs_in) == 16 && + common_hal_bleio_uuid_get_size(rhs_in) == 16) { + return mp_obj_new_bool(common_hal_bleio_uuid_get_uuid16(lhs_in) == + common_hal_bleio_uuid_get_uuid16(rhs_in)); + } + uint8_t lhs[16]; + uint8_t rhs[16]; + common_hal_bleio_uuid_get_uuid128(lhs_in, lhs); + common_hal_bleio_uuid_get_uuid128(rhs_in, rhs); + return mp_obj_new_bool(memcmp(lhs, rhs, sizeof(lhs)) == 0); + } else { + return mp_const_false; + } + + default: + return MP_OBJ_NULL; // op not supported + } +} + +void bleio_uuid_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + bleio_uuid_obj_t *self = MP_OBJ_TO_PTR(self_in); + uint32_t size = common_hal_bleio_uuid_get_size(self); + if (size == 16) { + mp_printf(print, "UUID(0x%04x)", common_hal_bleio_uuid_get_uuid16(self)); + } else { + uint8_t uuid128[16]; + (void) common_hal_bleio_uuid_get_uuid128(self, uuid128); + mp_printf(print, "UUID('" + "%02x%02x%02x%02x-" + "%02x%02x-" + "%02x%02x-" + "%02x%02x-" + "%02x%02x%02x%02x%02x%02x')", + uuid128[15], uuid128[14], uuid128[13], uuid128[12], + uuid128[11], uuid128[10], + uuid128[9], uuid128[8], + uuid128[7], uuid128[6], + uuid128[5], uuid128[4], uuid128[3], uuid128[2], uuid128[1], uuid128[0]); + } +} + +const mp_obj_type_t bleio_uuid_type = { + { &mp_type_type }, + .name = MP_QSTR_UUID, + .print = bleio_uuid_print, + .make_new = bleio_uuid_make_new, + .unary_op = bleio_uuid_unary_op, + .binary_op = bleio_uuid_binary_op, + .locals_dict = (mp_obj_dict_t*)&bleio_uuid_locals_dict, +}; diff --git a/shared-bindings/_bleio/UUID.h b/shared-bindings/_bleio/UUID.h new file mode 100644 index 0000000000000..1490737a71a48 --- /dev/null +++ b/shared-bindings/_bleio/UUID.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_UUID_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_UUID_H + +#include "common-hal/_bleio/UUID.h" + +void bleio_uuid_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind); + +extern const mp_obj_type_t bleio_uuid_type; + +extern void common_hal_bleio_uuid_construct(bleio_uuid_obj_t *self, mp_int_t uuid16, const uint8_t uuid128[]); +extern uint32_t common_hal_bleio_uuid_get_uuid16(bleio_uuid_obj_t *self); +extern bool common_hal_bleio_uuid_get_uuid128(bleio_uuid_obj_t *self, uint8_t uuid128[16]); +extern uint32_t common_hal_bleio_uuid_get_size(bleio_uuid_obj_t *self); + +void common_hal_bleio_uuid_pack_into(bleio_uuid_obj_t *self, uint8_t* buf); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_UUID_H diff --git a/shared-bindings/_bleio/__init__.c b/shared-bindings/_bleio/__init__.c new file mode 100644 index 0000000000000..dd401398c5611 --- /dev/null +++ b/shared-bindings/_bleio/__init__.c @@ -0,0 +1,188 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/objexcept.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-bindings/_bleio/Attribute.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/CharacteristicBuffer.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/PacketBuffer.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/_bleio/ScanResults.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +//| :mod:`_bleio` --- Bluetooth Low Energy (BLE) communication +//| ================================================================ +//| +//| .. module:: _bleio +//| :synopsis: Bluetooth Low Energy functionality +//| :platform: nRF +//| +//| The `_bleio` module provides necessary low-level functionality for communicating +//| using Bluetooth Low Energy (BLE). The '_' prefix indicates this module is meant +//| for internal use by libraries but not by the end user. Its API may change incompatibly +//| between minor versions of CircuitPython. +//| Please use the +//| `adafruit_ble `_ +//| CircuitPython library instead, which builds on `_bleio`, and +//| provides higher-level convenience functionality, including predefined beacons, clients, +//| servers. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Address +//| Adapter +//| Attribute +//| Characteristic +//| CharacteristicBuffer +//| Connection +//| Descriptor +//| PacketBuffer +//| ScanEntry +//| ScanResults +//| Service +//| UUID +//| +//| .. attribute:: adapter +//| +//| BLE Adapter used to manage device discovery and connections. +//| This object is the sole instance of `_bleio.Adapter`. +//| + +//| .. class:: BluetoothError(Exception) +//| +//| Catch all exception for Bluetooth related errors. +//| +MP_DEFINE_BLEIO_EXCEPTION(BluetoothError, Exception) + +NORETURN void mp_raise_bleio_BluetoothError(const compressed_string_t* fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_bleio_BluetoothError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} + +//| .. class:: ConnectionError(BluetoothError) +//| +//| Raised when a connection is unavailable. +//| +MP_DEFINE_BLEIO_EXCEPTION(ConnectionError, bleio_BluetoothError) +NORETURN void mp_raise_bleio_ConnectionError(const compressed_string_t* fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_bleio_ConnectionError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} + +//| .. class:: RoleError(BluetoothError) +//| +//| Raised when a resource is used as the mismatched role. For example, if a local CCCD is +//| attempted to be set but they can only be set when remote. +//| +MP_DEFINE_BLEIO_EXCEPTION(RoleError, bleio_BluetoothError) +NORETURN void mp_raise_bleio_RoleError(const compressed_string_t* msg) { + mp_raise_msg(&mp_type_bleio_RoleError, msg); +} + +//| .. class:: SecurityError(BluetoothError) +//| +//| Raised when a security related error occurs. +//| +MP_DEFINE_BLEIO_EXCEPTION(SecurityError, bleio_BluetoothError) +NORETURN void mp_raise_bleio_SecurityError(const compressed_string_t* fmt, ...) { + va_list argptr; + va_start(argptr,fmt); + mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_bleio_SecurityError, fmt, argptr); + va_end(argptr); + nlr_raise(exception); +} + +// Called when _bleio is imported. +STATIC mp_obj_t bleio___init__(void) { + common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, true); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_0(bleio___init___obj, bleio___init__); + + +STATIC const mp_rom_map_elem_t bleio_module_globals_table[] = { + // Name must be the first entry so that the exception printing below is correct. + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__bleio) }, + { MP_ROM_QSTR(MP_QSTR_Adapter), MP_ROM_PTR(&bleio_adapter_type) }, + { MP_ROM_QSTR(MP_QSTR_Address), MP_ROM_PTR(&bleio_address_type) }, + { MP_ROM_QSTR(MP_QSTR_Attribute), MP_ROM_PTR(&bleio_attribute_type) }, + { MP_ROM_QSTR(MP_QSTR_Connection), MP_ROM_PTR(&bleio_connection_type) }, + { MP_ROM_QSTR(MP_QSTR_Characteristic), MP_ROM_PTR(&bleio_characteristic_type) }, + { MP_ROM_QSTR(MP_QSTR_CharacteristicBuffer), MP_ROM_PTR(&bleio_characteristic_buffer_type) }, + { MP_ROM_QSTR(MP_QSTR_Descriptor), MP_ROM_PTR(&bleio_descriptor_type) }, + { MP_ROM_QSTR(MP_QSTR_PacketBuffer), MP_ROM_PTR(&bleio_packet_buffer_type) }, + { MP_ROM_QSTR(MP_QSTR_ScanEntry), MP_ROM_PTR(&bleio_scanentry_type) }, + { MP_ROM_QSTR(MP_QSTR_ScanResults), MP_ROM_PTR(&bleio_scanresults_type) }, + { MP_ROM_QSTR(MP_QSTR_Service), MP_ROM_PTR(&bleio_service_type) }, + { MP_ROM_QSTR(MP_QSTR_UUID), MP_ROM_PTR(&bleio_uuid_type) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_adapter), MP_ROM_PTR(&common_hal_bleio_adapter_obj) }, + + // Errors + { MP_ROM_QSTR(MP_QSTR_BluetoothError), MP_ROM_PTR(&mp_type_bleio_BluetoothError) }, + { MP_ROM_QSTR(MP_QSTR_ConnectionError), MP_ROM_PTR(&mp_type_bleio_ConnectionError) }, + { MP_ROM_QSTR(MP_QSTR_RoleError), MP_ROM_PTR(&mp_type_bleio_RoleError) }, + { MP_ROM_QSTR(MP_QSTR_SecurityError), MP_ROM_PTR(&mp_type_bleio_SecurityError) }, + + // Initialization + { MP_ROM_QSTR(MP_QSTR___init__), MP_ROM_PTR(&bleio___init___obj) }, + +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_module_globals, bleio_module_globals_table); + +void bleio_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind) { + mp_print_kind_t k = kind & ~PRINT_EXC_SUBCLASS; + bool is_subclass = kind & PRINT_EXC_SUBCLASS; + if (!is_subclass && (k == PRINT_EXC)) { + mp_print_str(print, qstr_str(MP_OBJ_QSTR_VALUE(bleio_module_globals_table[0].value))); + mp_print_str(print, "."); + } + mp_obj_exception_print(print, o_in, kind); +} + +const mp_obj_module_t bleio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&bleio_module_globals, +}; diff --git a/shared-bindings/_bleio/__init__.h b/shared-bindings/_bleio/__init__.h new file mode 100644 index 0000000000000..5256bdaa0ee75 --- /dev/null +++ b/shared-bindings/_bleio/__init__.h @@ -0,0 +1,76 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO___INIT___H + +#include "py/objlist.h" + +#include "shared-bindings/_bleio/Adapter.h" + +#include "common-hal/_bleio/__init__.h" +#include "common-hal/_bleio/Adapter.h" + +extern bleio_adapter_obj_t common_hal_bleio_adapter_obj; + +void bleio_exception_print(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t kind); + +#define MP_DEFINE_BLEIO_EXCEPTION(exc_name, base_name) \ +const mp_obj_type_t mp_type_bleio_ ## exc_name = { \ + { &mp_type_type }, \ + .name = MP_QSTR_ ## exc_name, \ + .print = bleio_exception_print, \ + .make_new = mp_obj_exception_make_new, \ + .attr = mp_obj_exception_attr, \ + .parent = &mp_type_ ## base_name, \ +}; + +extern const mp_obj_type_t mp_type_bleio_BluetoothError; +extern const mp_obj_type_t mp_type_bleio_ConnectionError; +extern const mp_obj_type_t mp_type_bleio_RoleError; +extern const mp_obj_type_t mp_type_bleio_SecurityError; + +NORETURN void mp_raise_bleio_BluetoothError(const compressed_string_t* msg, ...); +NORETURN void mp_raise_bleio_ConnectionError(const compressed_string_t* msg, ...); +NORETURN void mp_raise_bleio_RoleError(const compressed_string_t* msg); +NORETURN void mp_raise_bleio_SecurityError(const compressed_string_t* msg, ...); + +void common_hal_bleio_check_connected(uint16_t conn_handle); + +uint16_t common_hal_bleio_device_get_conn_handle(mp_obj_t device); +mp_obj_list_t *common_hal_bleio_device_get_remote_service_list(mp_obj_t device); +void common_hal_bleio_device_discover_remote_services(mp_obj_t device, mp_obj_t service_uuids_whitelist); + +size_t common_hal_bleio_gatts_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len); +void common_hal_bleio_gatts_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo); +size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_t* buf, size_t len); +void common_hal_bleio_gattc_write(uint16_t handle, uint16_t conn_handle, mp_buffer_info_t *bufinfo, bool write_no_response); + +void common_hal_bleio_gc_collect(void); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO___INIT___H diff --git a/shared-bindings/_eve/__init__.c b/shared-bindings/_eve/__init__.c new file mode 100644 index 0000000000000..9bc790f5d1fd7 --- /dev/null +++ b/shared-bindings/_eve/__init__.c @@ -0,0 +1,1105 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 James Bowman for Excamera Labs + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/binary.h" + +#include "shared-module/_eve/__init__.h" +#include "shared-bindings/_eve/__init__.h" + +//| :mod:`_eve` --- low-level BridgeTek EVE bindings +//| ================================================ +//| +//| .. module:: _eve +//| :synopsis: low-level BridgeTek EVE bindings +//| :platform: SAMD21/SAMD51 +//| +//| The `_eve` module provides a class _EVE which +//| contains methods for constructing EVE command +//| buffers and appending basic graphics commands. +//| + +typedef struct _mp_obj__EVE_t { + mp_obj_base_t base; + common_hal__eve_t _eve; +} mp_obj__EVE_t; + +STATIC const mp_obj_type_t _EVE_type; + +#define EVEHAL(s) \ + (&((mp_obj__EVE_t*)mp_instance_cast_to_native_base((s), &_EVE_type))->_eve) + +STATIC mp_obj_t _register(mp_obj_t self, mp_obj_t o) { + common_hal__eve_t *eve = EVEHAL(self); + mp_load_method(o, MP_QSTR_write, eve->dest); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(register_obj, _register); + +//| .. method:: flush() +//| +//| Send any queued drawing commands directly to the hardware. +//| +//| :param int width: The width of the grid in tiles, or 1 for sprites. +//| +STATIC mp_obj_t _flush(mp_obj_t self) { + common_hal__eve_flush(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(flush_obj, _flush); + +//| .. method:: cc(b) +//| +//| Append bytes to the command FIFO. +//| +//| :param bytes b: The bytes to add +//| +STATIC mp_obj_t _cc(mp_obj_t self, mp_obj_t b) { + mp_buffer_info_t buffer_info; + mp_get_buffer_raise(b, &buffer_info, MP_BUFFER_READ); + common_hal__eve_add(EVEHAL(self), buffer_info.len, buffer_info.buf); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc_obj, _cc); + +//{ + +//| .. method:: AlphaFunc(func, ref) +//| +//| Set the alpha test function +//| +//| :param int func: specifies the test function, one of ``NEVER``, ``LESS``, ``LEQUAL``, ``GREATER``, ``GEQUAL``, ``EQUAL``, ``NOTEQUAL``, or ``ALWAYS``. Range 0-7. The initial value is ALWAYS(7) +//| :param int ref: specifies the reference value for the alpha test. Range 0-255. The initial value is 0 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _alphafunc(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t func = mp_obj_get_int_truncated(a0); + uint32_t ref = mp_obj_get_int_truncated(a1); + common_hal__eve_AlphaFunc(EVEHAL(self), func, ref); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(alphafunc_obj, _alphafunc); + +//| .. method:: Begin(prim) +//| +//| Begin drawing a graphics primitive +//| +//| :param int prim: graphics primitive. +//| +//| Valid primitives are ``BITMAPS``, ``POINTS``, ``LINES``, ``LINE_STRIP``, ``EDGE_STRIP_R``, ``EDGE_STRIP_L``, ``EDGE_STRIP_A``, ``EDGE_STRIP_B`` and ``RECTS``. +//| + +STATIC mp_obj_t _begin(mp_obj_t self, mp_obj_t a0) { + uint32_t prim = mp_obj_get_int_truncated(a0); + common_hal__eve_Begin(EVEHAL(self), prim); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(begin_obj, _begin); + +//| .. method:: BitmapExtFormat(format) +//| +//| Set the bitmap format +//| +//| :param int format: bitmap pixel format. +//| + +STATIC mp_obj_t _bitmapextformat(mp_obj_t self, mp_obj_t a0) { + uint32_t fmt = mp_obj_get_int_truncated(a0); + common_hal__eve_BitmapExtFormat(EVEHAL(self), fmt); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapextformat_obj, _bitmapextformat); + +//| .. method:: BitmapHandle(handle) +//| +//| Set the bitmap handle +//| +//| :param int handle: bitmap handle. Range 0-31. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaphandle(mp_obj_t self, mp_obj_t a0) { + uint32_t handle = mp_obj_get_int_truncated(a0); + common_hal__eve_BitmapHandle(EVEHAL(self), handle); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaphandle_obj, _bitmaphandle); + +//| .. method:: BitmapLayoutH(linestride, height) +//| +//| Set the source bitmap memory format and layout for the current handle. high bits for large bitmaps +//| +//| :param int linestride: high part of bitmap line stride, in bytes. Range 0-7 +//| :param int height: high part of bitmap height, in lines. Range 0-3 +//| + +STATIC mp_obj_t _bitmaplayouth(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t linestride = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapLayoutH(EVEHAL(self), linestride, height); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaplayouth_obj, _bitmaplayouth); + +//| .. method:: BitmapLayout(format, linestride, height) +//| +//| Set the source bitmap memory format and layout for the current handle +//| +//| :param int format: bitmap pixel format, or GLFORMAT to use BITMAP_EXT_FORMAT instead. Range 0-31 +//| :param int linestride: bitmap line stride, in bytes. Range 0-1023 +//| :param int height: bitmap height, in lines. Range 0-511 +//| + +STATIC mp_obj_t _bitmaplayout(size_t n_args, const mp_obj_t *args) { + uint32_t format = mp_obj_get_int_truncated(args[1]); + uint32_t linestride = mp_obj_get_int_truncated(args[2]); + uint32_t height = mp_obj_get_int_truncated(args[3]); + common_hal__eve_BitmapLayout(EVEHAL(args[0]), format, linestride, height); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmaplayout_obj, 4, 4, _bitmaplayout); + +//| .. method:: BitmapSizeH(width, height) +//| +//| Set the screen drawing of bitmaps for the current handle. high bits for large bitmaps +//| +//| :param int width: high part of drawn bitmap width, in pixels. Range 0-3 +//| :param int height: high part of drawn bitmap height, in pixels. Range 0-3 +//| + +STATIC mp_obj_t _bitmapsizeh(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapSizeH(EVEHAL(self), width, height); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmapsizeh_obj, _bitmapsizeh); + +//| .. method:: BitmapSize(filter, wrapx, wrapy, width, height) +//| +//| Set the screen drawing of bitmaps for the current handle +//| +//| :param int filter: bitmap filtering mode, one of ``NEAREST`` or ``BILINEAR``. Range 0-1 +//| :param int wrapx: bitmap :math:`x` wrap mode, one of ``REPEAT`` or ``BORDER``. Range 0-1 +//| :param int wrapy: bitmap :math:`y` wrap mode, one of ``REPEAT`` or ``BORDER``. Range 0-1 +//| :param int width: drawn bitmap width, in pixels. Range 0-511 +//| :param int height: drawn bitmap height, in pixels. Range 0-511 +//| + +STATIC mp_obj_t _bitmapsize(size_t n_args, const mp_obj_t *args) { + uint32_t filter = mp_obj_get_int_truncated(args[1]); + uint32_t wrapx = mp_obj_get_int_truncated(args[2]); + uint32_t wrapy = mp_obj_get_int_truncated(args[3]); + uint32_t width = mp_obj_get_int_truncated(args[4]); + uint32_t height = mp_obj_get_int_truncated(args[5]); + common_hal__eve_BitmapSize(EVEHAL(args[0]), filter, wrapx, wrapy, width, height); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapsize_obj, 6, 6, _bitmapsize); + +//| .. method:: BitmapSource(addr) +//| +//| Set the source address for bitmap graphics +//| +//| :param int addr: Bitmap start address, pixel-aligned. May be in SRAM or flash. Range 0-16777215 +//| + +STATIC mp_obj_t _bitmapsource(mp_obj_t self, mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + common_hal__eve_BitmapSource(EVEHAL(self), addr); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapsource_obj, _bitmapsource); + +//| .. method:: BitmapSwizzle(r, g, b, a) +//| +//| Set the source for the r,g,b and a channels of a bitmap +//| +//| :param int r: red component source channel. Range 0-7 +//| :param int g: green component source channel. Range 0-7 +//| :param int b: blue component source channel. Range 0-7 +//| :param int a: alpha component source channel. Range 0-7 +//| + +STATIC mp_obj_t _bitmapswizzle(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + common_hal__eve_BitmapSwizzle(EVEHAL(args[0]), r, g, b, a); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapswizzle_obj, 5, 5, _bitmapswizzle); + +//| .. method:: BitmapTransformA(p, v) +//| +//| Set the :math:`a` component of the bitmap transform matrix +//| +//| :param int p: precision control: 0 is 8.8, 1 is 1.15. Range 0-1. The initial value is 0 +//| :param int v: The :math:`a` component of the bitmap transform matrix, in signed 8.8 or 1.15 bit fixed-point form. Range 0-131071. The initial value is 256 +//| +//| The initial value is **p** = 0, **v** = 256. This represents the value 1.0. +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransforma(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t p = mp_obj_get_int_truncated(a0); + uint32_t v = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapTransformA(EVEHAL(self), p, v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforma_obj, _bitmaptransforma); + +//| .. method:: BitmapTransformB(p, v) +//| +//| Set the :math:`b` component of the bitmap transform matrix +//| +//| :param int p: precision control: 0 is 8.8, 1 is 1.15. Range 0-1. The initial value is 0 +//| :param int v: The :math:`b` component of the bitmap transform matrix, in signed 8.8 or 1.15 bit fixed-point form. Range 0-131071. The initial value is 0 +//| +//| The initial value is **p** = 0, **v** = 0. This represents the value 0.0. +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransformb(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t p = mp_obj_get_int_truncated(a0); + uint32_t v = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapTransformB(EVEHAL(self), p, v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformb_obj, _bitmaptransformb); + +//| .. method:: BitmapTransformC(v) +//| +//| Set the :math:`c` component of the bitmap transform matrix +//| +//| :param int v: The :math:`c` component of the bitmap transform matrix, in signed 15.8 bit fixed-point form. Range 0-16777215. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransformc(mp_obj_t self, mp_obj_t a0) { + uint32_t v = mp_obj_get_int_truncated(a0); + common_hal__eve_BitmapTransformC(EVEHAL(self), v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaptransformc_obj, _bitmaptransformc); + +//| .. method:: BitmapTransformD(p, v) +//| +//| Set the :math:`d` component of the bitmap transform matrix +//| +//| :param int p: precision control: 0 is 8.8, 1 is 1.15. Range 0-1. The initial value is 0 +//| :param int v: The :math:`d` component of the bitmap transform matrix, in signed 8.8 or 1.15 bit fixed-point form. Range 0-131071. The initial value is 0 +//| +//| The initial value is **p** = 0, **v** = 0. This represents the value 0.0. +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransformd(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t p = mp_obj_get_int_truncated(a0); + uint32_t v = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapTransformD(EVEHAL(self), p, v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformd_obj, _bitmaptransformd); + +//| .. method:: BitmapTransformE(p, v) +//| +//| Set the :math:`e` component of the bitmap transform matrix +//| +//| :param int p: precision control: 0 is 8.8, 1 is 1.15. Range 0-1. The initial value is 0 +//| :param int v: The :math:`e` component of the bitmap transform matrix, in signed 8.8 or 1.15 bit fixed-point form. Range 0-131071. The initial value is 256 +//| +//| The initial value is **p** = 0, **v** = 256. This represents the value 1.0. +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransforme(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t p = mp_obj_get_int_truncated(a0); + uint32_t v = mp_obj_get_int_truncated(a1); + common_hal__eve_BitmapTransformE(EVEHAL(self), p, v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforme_obj, _bitmaptransforme); + +//| .. method:: BitmapTransformF(v) +//| +//| Set the :math:`f` component of the bitmap transform matrix +//| +//| :param int v: The :math:`f` component of the bitmap transform matrix, in signed 15.8 bit fixed-point form. Range 0-16777215. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _bitmaptransformf(mp_obj_t self, mp_obj_t a0) { + uint32_t v = mp_obj_get_int_truncated(a0); + common_hal__eve_BitmapTransformF(EVEHAL(self), v); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaptransformf_obj, _bitmaptransformf); + +//| .. method:: BlendFunc(src, dst) +//| +//| Set pixel arithmetic +//| +//| :param int src: specifies how the source blending factor is computed. One of ``ZERO``, ``ONE``, ``SRC_ALPHA``, ``DST_ALPHA``, ``ONE_MINUS_SRC_ALPHA`` or ``ONE_MINUS_DST_ALPHA``. Range 0-7. The initial value is SRC_ALPHA(2) +//| :param int dst: specifies how the destination blending factor is computed, one of the same constants as **src**. Range 0-7. The initial value is ONE_MINUS_SRC_ALPHA(4) +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _blendfunc(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t src = mp_obj_get_int_truncated(a0); + uint32_t dst = mp_obj_get_int_truncated(a1); + common_hal__eve_BlendFunc(EVEHAL(self), src, dst); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(blendfunc_obj, _blendfunc); + +//| .. method:: Call(dest) +//| +//| Execute a sequence of commands at another location in the display list +//| +//| :param int dest: display list address. Range 0-65535 +//| + +STATIC mp_obj_t _call(mp_obj_t self, mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + common_hal__eve_Call(EVEHAL(self), dest); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(call_obj, _call); + +//| .. method:: Cell(cell) +//| +//| Set the bitmap cell number for the vertex2f command +//| +//| :param int cell: bitmap cell number. Range 0-127. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _cell(mp_obj_t self, mp_obj_t a0) { + uint32_t cell = mp_obj_get_int_truncated(a0); + common_hal__eve_Cell(EVEHAL(self), cell); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cell_obj, _cell); + +//| .. method:: ClearColorA(alpha) +//| +//| Set clear value for the alpha channel +//| +//| :param int alpha: alpha value used when the color buffer is cleared. Range 0-255. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _clearcolora(mp_obj_t self, mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + common_hal__eve_ClearColorA(EVEHAL(self), alpha); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearcolora_obj, _clearcolora); + +//| .. method:: ClearColorRGB(red, green, blue) +//| +//| Set clear values for red, green and blue channels +//| +//| :param int red: red value used when the color buffer is cleared. Range 0-255. The initial value is 0 +//| :param int green: green value used when the color buffer is cleared. Range 0-255. The initial value is 0 +//| :param int blue: blue value used when the color buffer is cleared. Range 0-255. The initial value is 0 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _clearcolorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + common_hal__eve_ClearColorRGB(EVEHAL(args[0]), red, green, blue); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clearcolorrgb_obj, 4, 4, _clearcolorrgb); + +//| .. method:: Clear(c, s, t) +//| +//| Clear buffers to preset values +//| +//| :param int c: clear color buffer. Range 0-1 +//| :param int s: clear stencil buffer. Range 0-1 +//| :param int t: clear tag buffer. Range 0-1 +//| + +STATIC mp_obj_t _clear(size_t n_args, const mp_obj_t *args) { + uint32_t c = (n_args > 1) ? mp_obj_get_int_truncated(args[1]) : 1; + uint32_t s = (n_args > 2) ? mp_obj_get_int_truncated(args[2]) : 1; + uint32_t t = (n_args > 3) ? mp_obj_get_int_truncated(args[3]) : 1; + common_hal__eve_Clear(EVEHAL(args[0]), c, s, t); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clear_obj, 1, 4, _clear); + +//| .. method:: ClearStencil(s) +//| +//| Set clear value for the stencil buffer +//| +//| :param int s: value used when the stencil buffer is cleared. Range 0-255. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _clearstencil(mp_obj_t self, mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + common_hal__eve_ClearStencil(EVEHAL(self), s); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearstencil_obj, _clearstencil); + +//| .. method:: ClearTag(s) +//| +//| Set clear value for the tag buffer +//| +//| :param int s: value used when the tag buffer is cleared. Range 0-255. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _cleartag(mp_obj_t self, mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + common_hal__eve_ClearTag(EVEHAL(self), s); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cleartag_obj, _cleartag); + +//| .. method:: ColorA(alpha) +//| +//| Set the current color alpha +//| +//| :param int alpha: alpha for the current color. Range 0-255. The initial value is 255 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _colora(mp_obj_t self, mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + common_hal__eve_ColorA(EVEHAL(self), alpha); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(colora_obj, _colora); + +//| .. method:: ColorMask(r, g, b, a) +//| +//| Enable and disable writing of frame buffer color components +//| +//| :param int r: allow updates to the frame buffer red component. Range 0-1. The initial value is 1 +//| :param int g: allow updates to the frame buffer green component. Range 0-1. The initial value is 1 +//| :param int b: allow updates to the frame buffer blue component. Range 0-1. The initial value is 1 +//| :param int a: allow updates to the frame buffer alpha component. Range 0-1. The initial value is 1 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _colormask(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + common_hal__eve_ColorMask(EVEHAL(args[0]), r, g, b, a); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colormask_obj, 5, 5, _colormask); + +//| .. method:: ColorRGB(red, green, blue) +//| +//| Set the drawing color +//| +//| :param int red: red value for the current color. Range 0-255. The initial value is 255 +//| :param int green: green for the current color. Range 0-255. The initial value is 255 +//| :param int blue: blue for the current color. Range 0-255. The initial value is 255 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _colorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + common_hal__eve_ColorRGB(EVEHAL(args[0]), red, green, blue); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colorrgb_obj, 4, 4, _colorrgb); + +//| .. method:: Display() +//| +//| End the display list +//| + +STATIC mp_obj_t _display(mp_obj_t self) { + + common_hal__eve_Display(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(display_obj, _display); + +//| .. method:: End() +//| +//| End drawing a graphics primitive +//| +//| :meth:`Vertex2ii` and :meth:`Vertex2f` calls are ignored until the next :meth:`Begin`. +//| + +STATIC mp_obj_t _end(mp_obj_t self) { + + common_hal__eve_End(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(end_obj, _end); + +//| .. method:: Jump(dest) +//| +//| Execute commands at another location in the display list +//| +//| :param int dest: display list address. Range 0-65535 +//| + +STATIC mp_obj_t _jump(mp_obj_t self, mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + common_hal__eve_Jump(EVEHAL(self), dest); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(jump_obj, _jump); + +//| .. method:: LineWidth(width) +//| +//| Set the width of rasterized lines +//| +//| :param int width: line width in :math:`1/16` pixel. Range 0-4095. The initial value is 16 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _linewidth(mp_obj_t self, mp_obj_t a0) { + uint32_t width = mp_obj_get_int_truncated(a0); + common_hal__eve_LineWidth(EVEHAL(self), width); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(linewidth_obj, _linewidth); + +//| .. method:: Macro(m) +//| +//| Execute a single command from a macro register +//| +//| :param int m: macro register to read. Range 0-1 +//| + +STATIC mp_obj_t _macro(mp_obj_t self, mp_obj_t a0) { + uint32_t m = mp_obj_get_int_truncated(a0); + common_hal__eve_Macro(EVEHAL(self), m); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(macro_obj, _macro); + +//| .. method:: Nop() +//| +//| No operation +//| + +STATIC mp_obj_t _nop(mp_obj_t self) { + + common_hal__eve_Nop(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(nop_obj, _nop); + +//| .. method:: PaletteSource(addr) +//| +//| Set the base address of the palette +//| +//| :param int addr: Address in graphics SRAM, 2-byte aligned. Range 0-4194303. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _palettesource(mp_obj_t self, mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + common_hal__eve_PaletteSource(EVEHAL(self), addr); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(palettesource_obj, _palettesource); + +//| .. method:: PointSize(size) +//| +//| Set the radius of rasterized points +//| +//| :param int size: point radius in :math:`1/16` pixel. Range 0-8191. The initial value is 16 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _pointsize(mp_obj_t self, mp_obj_t a0) { + uint32_t size = mp_obj_get_int_truncated(a0); + common_hal__eve_PointSize(EVEHAL(self), size); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(pointsize_obj, _pointsize); + +//| .. method:: RestoreContext() +//| +//| Restore the current graphics context from the context stack +//| + +STATIC mp_obj_t _restorecontext(mp_obj_t self) { + + common_hal__eve_RestoreContext(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(restorecontext_obj, _restorecontext); + +//| .. method:: Return() +//| +//| Return from a previous call command +//| + +STATIC mp_obj_t _return(mp_obj_t self) { + + common_hal__eve_Return(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(return_obj, _return); + +//| .. method:: SaveContext() +//| +//| Push the current graphics context on the context stack +//| + +STATIC mp_obj_t _savecontext(mp_obj_t self) { + + common_hal__eve_SaveContext(EVEHAL(self)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(savecontext_obj, _savecontext); + +//| .. method:: ScissorSize(width, height) +//| +//| Set the size of the scissor clip rectangle +//| +//| :param int width: The width of the scissor clip rectangle, in pixels. Range 0-4095. The initial value is hsize +//| :param int height: The height of the scissor clip rectangle, in pixels. Range 0-4095. The initial value is 2048 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _scissorsize(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + common_hal__eve_ScissorSize(EVEHAL(self), width, height); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorsize_obj, _scissorsize); + +//| .. method:: ScissorXY(x, y) +//| +//| Set the top left corner of the scissor clip rectangle +//| +//| :param int x: The :math:`x` coordinate of the scissor clip rectangle, in pixels. Range 0-2047. The initial value is 0 +//| :param int y: The :math:`y` coordinate of the scissor clip rectangle, in pixels. Range 0-2047. The initial value is 0 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _scissorxy(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t x = mp_obj_get_int_truncated(a0); + uint32_t y = mp_obj_get_int_truncated(a1); + common_hal__eve_ScissorXY(EVEHAL(self), x, y); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorxy_obj, _scissorxy); + +//| .. method:: StencilFunc(func, ref, mask) +//| +//| Set function and reference value for stencil testing +//| +//| :param int func: specifies the test function, one of ``NEVER``, ``LESS``, ``LEQUAL``, ``GREATER``, ``GEQUAL``, ``EQUAL``, ``NOTEQUAL``, or ``ALWAYS``. Range 0-7. The initial value is ALWAYS(7) +//| :param int ref: specifies the reference value for the stencil test. Range 0-255. The initial value is 0 +//| :param int mask: specifies a mask that is ANDed with the reference value and the stored stencil value. Range 0-255. The initial value is 255 +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _stencilfunc(size_t n_args, const mp_obj_t *args) { + uint32_t func = mp_obj_get_int_truncated(args[1]); + uint32_t ref = mp_obj_get_int_truncated(args[2]); + uint32_t mask = mp_obj_get_int_truncated(args[3]); + common_hal__eve_StencilFunc(EVEHAL(args[0]), func, ref, mask); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stencilfunc_obj, 4, 4, _stencilfunc); + +//| .. method:: StencilMask(mask) +//| +//| Control the writing of individual bits in the stencil planes +//| +//| :param int mask: the mask used to enable writing stencil bits. Range 0-255. The initial value is 255 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _stencilmask(mp_obj_t self, mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + common_hal__eve_StencilMask(EVEHAL(self), mask); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(stencilmask_obj, _stencilmask); + +//| .. method:: StencilOp(sfail, spass) +//| +//| Set stencil test actions +//| +//| :param int sfail: specifies the action to take when the stencil test fails, one of ``KEEP``, ``ZERO``, ``REPLACE``, ``INCR``, ``INCR_WRAP``, ``DECR``, ``DECR_WRAP``, and ``INVERT``. Range 0-7. The initial value is KEEP(1) +//| :param int spass: specifies the action to take when the stencil test passes, one of the same constants as **sfail**. Range 0-7. The initial value is KEEP(1) +//| +//| These values are part of the graphics context and are saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _stencilop(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + uint32_t sfail = mp_obj_get_int_truncated(a0); + uint32_t spass = mp_obj_get_int_truncated(a1); + common_hal__eve_StencilOp(EVEHAL(self), sfail, spass); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(stencilop_obj, _stencilop); + +//| .. method:: TagMask(mask) +//| +//| Control the writing of the tag buffer +//| +//| :param int mask: allow updates to the tag buffer. Range 0-1. The initial value is 1 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _tagmask(mp_obj_t self, mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + common_hal__eve_TagMask(EVEHAL(self), mask); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tagmask_obj, _tagmask); + +//| .. method:: Tag(s) +//| +//| Set the current tag value +//| +//| :param int s: tag value. Range 0-255. The initial value is 255 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _tag(mp_obj_t self, mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + common_hal__eve_Tag(EVEHAL(self), s); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tag_obj, _tag); + +//| .. method:: VertexTranslateX(x) +//| +//| Set the vertex transformation's x translation component +//| +//| :param int x: signed x-coordinate in :math:`1/16` pixel. Range 0-131071. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _vertextranslatex(mp_obj_t self, mp_obj_t a0) { + uint32_t x = mp_obj_get_int_truncated(a0); + common_hal__eve_VertexTranslateX(EVEHAL(self), x); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatex_obj, _vertextranslatex); + +//| .. method:: VertexTranslateY(y) +//| +//| Set the vertex transformation's y translation component +//| +//| :param int y: signed y-coordinate in :math:`1/16` pixel. Range 0-131071. The initial value is 0 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + + +STATIC mp_obj_t _vertextranslatey(mp_obj_t self, mp_obj_t a0) { + uint32_t y = mp_obj_get_int_truncated(a0); + common_hal__eve_VertexTranslateY(EVEHAL(self), y); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatey_obj, _vertextranslatey); + +//| .. method:: VertexFormat(frac) +//| +//| Set the precision of vertex2f coordinates +//| +//| :param int frac: Number of fractional bits in X,Y coordinates, 0-4. Range 0-7. The initial value is 4 +//| +//| This value is part of the graphics context and is saved and restored by :meth:`SaveContext` and :meth:`RestoreContext`. +//| + +STATIC mp_obj_t _vertexformat(mp_obj_t self, mp_obj_t a0) { + uint32_t frac = mp_obj_get_int_truncated(a0); + common_hal__eve_VertexFormat(EVEHAL(self), frac); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertexformat_obj, _vertexformat); + +//| .. method:: Vertex2ii(x, y, handle, cell) +//| +//| :param int x: x-coordinate in pixels. Range 0-511 +//| :param int y: y-coordinate in pixels. Range 0-511 +//| :param int handle: bitmap handle. Range 0-31 +//| :param int cell: cell number. Range 0-127 +//| +//| This method is an alternative to :meth:`Vertex2f`. +//| + +STATIC mp_obj_t _vertex2ii(size_t n_args, const mp_obj_t *args) { + uint32_t x = mp_obj_get_int_truncated(args[1]); + uint32_t y = mp_obj_get_int_truncated(args[2]); + uint32_t handle = (n_args > 3) ? mp_obj_get_int_truncated(args[3]) : 0; + uint32_t cell = (n_args > 4) ? mp_obj_get_int_truncated(args[4]) : 0; + common_hal__eve_Vertex2ii(EVEHAL(args[0]), x, y, handle, cell); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(vertex2ii_obj, 3, 5, _vertex2ii); + +#define ROM_DECLS \ + { MP_ROM_QSTR(MP_QSTR_AlphaFunc), MP_ROM_PTR(&alphafunc_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Begin), MP_ROM_PTR(&begin_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapExtFormat), MP_ROM_PTR(&bitmapextformat_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapHandle), MP_ROM_PTR(&bitmaphandle_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapLayoutH), MP_ROM_PTR(&bitmaplayouth_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapLayout), MP_ROM_PTR(&bitmaplayout_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapSizeH), MP_ROM_PTR(&bitmapsizeh_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapSize), MP_ROM_PTR(&bitmapsize_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapSource), MP_ROM_PTR(&bitmapsource_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapSwizzle), MP_ROM_PTR(&bitmapswizzle_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformA), MP_ROM_PTR(&bitmaptransforma_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformB), MP_ROM_PTR(&bitmaptransformb_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformC), MP_ROM_PTR(&bitmaptransformc_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformD), MP_ROM_PTR(&bitmaptransformd_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformE), MP_ROM_PTR(&bitmaptransforme_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BitmapTransformF), MP_ROM_PTR(&bitmaptransformf_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_BlendFunc), MP_ROM_PTR(&blendfunc_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Call), MP_ROM_PTR(&call_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Cell), MP_ROM_PTR(&cell_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ClearColorA), MP_ROM_PTR(&clearcolora_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ClearColorRGB), MP_ROM_PTR(&clearcolorrgb_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Clear), MP_ROM_PTR(&clear_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ClearStencil), MP_ROM_PTR(&clearstencil_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ClearTag), MP_ROM_PTR(&cleartag_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ColorA), MP_ROM_PTR(&colora_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ColorMask), MP_ROM_PTR(&colormask_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ColorRGB), MP_ROM_PTR(&colorrgb_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Display), MP_ROM_PTR(&display_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_End), MP_ROM_PTR(&end_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Jump), MP_ROM_PTR(&jump_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_LineWidth), MP_ROM_PTR(&linewidth_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Macro), MP_ROM_PTR(¯o_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Nop), MP_ROM_PTR(&nop_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_PaletteSource), MP_ROM_PTR(&palettesource_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_PointSize), MP_ROM_PTR(&pointsize_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_RestoreContext), MP_ROM_PTR(&restorecontext_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Return), MP_ROM_PTR(&return_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_SaveContext), MP_ROM_PTR(&savecontext_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ScissorSize), MP_ROM_PTR(&scissorsize_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_ScissorXY), MP_ROM_PTR(&scissorxy_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_StencilFunc), MP_ROM_PTR(&stencilfunc_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_StencilMask), MP_ROM_PTR(&stencilmask_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_StencilOp), MP_ROM_PTR(&stencilop_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_TagMask), MP_ROM_PTR(&tagmask_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Tag), MP_ROM_PTR(&tag_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_VertexTranslateX), MP_ROM_PTR(&vertextranslatex_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_VertexTranslateY), MP_ROM_PTR(&vertextranslatey_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_VertexFormat), MP_ROM_PTR(&vertexformat_obj) }, \ + { MP_ROM_QSTR(MP_QSTR_Vertex2ii), MP_ROM_PTR(&vertex2ii_obj) } + +//} + +// Hand-written functions { + +//| .. method:: Vertex2f(b) +//| +//| Draw a point. +//| +//| :param float x: pixel x-coordinate +//| :param float y: pixel y-coordinate +//| +STATIC mp_obj_t _vertex2f(mp_obj_t self, mp_obj_t a0, mp_obj_t a1) { + mp_float_t x = mp_obj_get_float(a0); + mp_float_t y = mp_obj_get_float(a1); + common_hal__eve_Vertex2f(EVEHAL(self), x, y); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vertex2f_obj, _vertex2f); + +// Append an object x to the FIFO +#define ADD_X(self, x) \ + common_hal__eve_add(EVEHAL(self), sizeof(x), &(x)); + +//| .. method:: cmd0(n) +//| +//| Append the command word n to the FIFO +//| +//| :param int n: The command code +//| +//| This method is used by the ``eve`` module to efficiently add +//| commands to the FIFO. +//| + +STATIC mp_obj_t _cmd0(mp_obj_t self, mp_obj_t n) { + uint32_t code = 0xffffff00 | mp_obj_get_int_truncated(n); + ADD_X(self, code); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cmd0_obj, _cmd0); + +//| .. method:: cmd(n, fmt, args) +//| +//| Append a command packet to the FIFO. +//| +//| :param int n: The command code +//| :param str fmt: The command format `struct` layout +//| :param tuple args: The command's arguments +//| +//| Supported format codes: h, H, i, I. +//| +//| This method is used by the ``eve`` module to efficiently add +//| commands to the FIFO. +//| +STATIC mp_obj_t _cmd(size_t n_args, const mp_obj_t *args) { + mp_obj_t self = args[0]; + mp_obj_t num = args[1]; + mp_buffer_info_t fmt; + mp_get_buffer_raise(args[2], &fmt, MP_BUFFER_READ); + size_t len; + mp_obj_t *items; + mp_obj_tuple_get(args[3], &len, &items); + + // Count how many 32-bit words required + size_t n = 0; + for (size_t i = 0; i < fmt.len; n++) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + i += 1; + break; + case 'H': + case 'h': + i += 2; + break; + default: + break; + } + } + + uint32_t buf[16]; + uint32_t *p = buf; + *p++ = 0xffffff00 | mp_obj_get_int_truncated(num); + mp_obj_t *a = items; + uint32_t lo; + + for (size_t i = 0; i < fmt.len; ) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + *p++ = mp_obj_get_int_truncated(*a++); + i += 1; + break; + case 'H': + case 'h': + lo = mp_obj_get_int_truncated(*a++) & 0xffff; + *p++ = lo | (mp_obj_get_int_truncated(*a++) << 16); + i += 2; + break; + default: + break; + } + } + + common_hal__eve_add(EVEHAL(self), sizeof(uint32_t) * (1 + n), buf); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(cmd_obj, 4, 4, _cmd); + +STATIC const mp_rom_map_elem_t _EVE_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_register), MP_ROM_PTR(®ister_obj) }, + { MP_ROM_QSTR(MP_QSTR_cc), MP_ROM_PTR(&cc_obj) }, + { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&flush_obj) }, + { MP_ROM_QSTR(MP_QSTR_Vertex2f), MP_ROM_PTR(&vertex2f_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd), MP_ROM_PTR(&cmd_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd0), MP_ROM_PTR(&cmd0_obj) }, + ROM_DECLS +}; +STATIC MP_DEFINE_CONST_DICT(_EVE_locals_dict, _EVE_locals_dict_table); + +STATIC mp_obj_t _EVE_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + // mp_arg_check_num(n_args, kw_args, 1, 1, false); + mp_obj__EVE_t *o = m_new_obj(mp_obj__EVE_t); + o->base.type = &_EVE_type; + o->_eve.n = 0; + o->_eve.vscale = 16; + return MP_OBJ_FROM_PTR(o); +} + +STATIC const mp_obj_type_t _EVE_type = { + { &mp_type_type }, + .name = MP_QSTR__EVE, + .make_new = _EVE_make_new, + .locals_dict = (void*)&_EVE_locals_dict, +}; + +STATIC const mp_rom_map_elem_t mp_module__eve_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__eve) }, + { MP_ROM_QSTR(MP_QSTR__EVE), MP_OBJ_FROM_PTR(&_EVE_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(mp_module__eve_globals, mp_module__eve_globals_table); + +const mp_obj_module_t _eve_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&mp_module__eve_globals, +}; diff --git a/shared-bindings/_eve/__init__.h b/shared-bindings/_eve/__init__.h new file mode 100644 index 0000000000000..759a629bbddbb --- /dev/null +++ b/shared-bindings/_eve/__init__.h @@ -0,0 +1,84 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 James Bowman for Excamera Labs + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS__EVE___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS__EVE___INIT___H + +void common_hal__eve_flush(common_hal__eve_t *eve); +void common_hal__eve_add(common_hal__eve_t *eve, size_t len, void *buf); +void common_hal__eve_Vertex2f(common_hal__eve_t *eve, mp_float_t x, mp_float_t y); + +void common_hal__eve_AlphaFunc(common_hal__eve_t *eve, uint32_t func, uint32_t ref); +void common_hal__eve_Begin(common_hal__eve_t *eve, uint32_t prim); +void common_hal__eve_BitmapExtFormat(common_hal__eve_t *eve, uint32_t fmt); +void common_hal__eve_BitmapHandle(common_hal__eve_t *eve, uint32_t handle); +void common_hal__eve_BitmapLayoutH(common_hal__eve_t *eve, uint32_t linestride, uint32_t height); +void common_hal__eve_BitmapLayout(common_hal__eve_t *eve, uint32_t format, uint32_t linestride, uint32_t height); +void common_hal__eve_BitmapSizeH(common_hal__eve_t *eve, uint32_t width, uint32_t height); +void common_hal__eve_BitmapSize(common_hal__eve_t *eve, uint32_t filter, uint32_t wrapx, uint32_t wrapy, uint32_t width, uint32_t height); +void common_hal__eve_BitmapSource(common_hal__eve_t *eve, uint32_t addr); +void common_hal__eve_BitmapSwizzle(common_hal__eve_t *eve, uint32_t r, uint32_t g, uint32_t b, uint32_t a); +void common_hal__eve_BitmapTransformA(common_hal__eve_t *eve, uint32_t p, uint32_t v); +void common_hal__eve_BitmapTransformB(common_hal__eve_t *eve, uint32_t p, uint32_t v); +void common_hal__eve_BitmapTransformC(common_hal__eve_t *eve, uint32_t v); +void common_hal__eve_BitmapTransformD(common_hal__eve_t *eve, uint32_t p, uint32_t v); +void common_hal__eve_BitmapTransformE(common_hal__eve_t *eve, uint32_t p, uint32_t v); +void common_hal__eve_BitmapTransformF(common_hal__eve_t *eve, uint32_t v); +void common_hal__eve_BlendFunc(common_hal__eve_t *eve, uint32_t src, uint32_t dst); +void common_hal__eve_Call(common_hal__eve_t *eve, uint32_t dest); +void common_hal__eve_Cell(common_hal__eve_t *eve, uint32_t cell); +void common_hal__eve_ClearColorA(common_hal__eve_t *eve, uint32_t alpha); +void common_hal__eve_ClearColorRGB(common_hal__eve_t *eve, uint32_t red, uint32_t green, uint32_t blue); +void common_hal__eve_Clear(common_hal__eve_t *eve, uint32_t c, uint32_t s, uint32_t t); +void common_hal__eve_ClearStencil(common_hal__eve_t *eve, uint32_t s); +void common_hal__eve_ClearTag(common_hal__eve_t *eve, uint32_t s); +void common_hal__eve_ColorA(common_hal__eve_t *eve, uint32_t alpha); +void common_hal__eve_ColorMask(common_hal__eve_t *eve, uint32_t r, uint32_t g, uint32_t b, uint32_t a); +void common_hal__eve_ColorRGB(common_hal__eve_t *eve, uint32_t red, uint32_t green, uint32_t blue); +void common_hal__eve_Display(common_hal__eve_t *eve); +void common_hal__eve_End(common_hal__eve_t *eve); +void common_hal__eve_Jump(common_hal__eve_t *eve, uint32_t dest); +void common_hal__eve_LineWidth(common_hal__eve_t *eve, uint32_t width); +void common_hal__eve_Macro(common_hal__eve_t *eve, uint32_t m); +void common_hal__eve_Nop(common_hal__eve_t *eve); +void common_hal__eve_PaletteSource(common_hal__eve_t *eve, uint32_t addr); +void common_hal__eve_PointSize(common_hal__eve_t *eve, uint32_t size); +void common_hal__eve_RestoreContext(common_hal__eve_t *eve); +void common_hal__eve_Return(common_hal__eve_t *eve); +void common_hal__eve_SaveContext(common_hal__eve_t *eve); +void common_hal__eve_ScissorSize(common_hal__eve_t *eve, uint32_t width, uint32_t height); +void common_hal__eve_ScissorXY(common_hal__eve_t *eve, uint32_t x, uint32_t y); +void common_hal__eve_StencilFunc(common_hal__eve_t *eve, uint32_t func, uint32_t ref, uint32_t mask); +void common_hal__eve_StencilMask(common_hal__eve_t *eve, uint32_t mask); +void common_hal__eve_StencilOp(common_hal__eve_t *eve, uint32_t sfail, uint32_t spass); +void common_hal__eve_TagMask(common_hal__eve_t *eve, uint32_t mask); +void common_hal__eve_Tag(common_hal__eve_t *eve, uint32_t s); +void common_hal__eve_VertexTranslateX(common_hal__eve_t *eve, uint32_t x); +void common_hal__eve_VertexTranslateY(common_hal__eve_t *eve, uint32_t y); +void common_hal__eve_VertexFormat(common_hal__eve_t *eve, uint32_t frac); +void common_hal__eve_Vertex2ii(common_hal__eve_t *eve, uint32_t x, uint32_t y, uint32_t handle, uint32_t cell); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS__EVE___INIT___H diff --git a/shared-bindings/_pew/PewPew.c b/shared-bindings/_pew/PewPew.c new file mode 100644 index 0000000000000..3ff2087614e91 --- /dev/null +++ b/shared-bindings/_pew/PewPew.c @@ -0,0 +1,153 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "py/gc.h" +#include "py/mpstate.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/util.h" +#include "PewPew.h" +#include "shared-module/_pew/PewPew.h" +#include "supervisor/shared/translate.h" + + +//| .. currentmodule:: _pew +//| +//| :class:`PewPew` -- LED matrix and button driver +//| =============================================== +//| +//| This is an internal module to be used by the ``pew.py`` library from +//| https://github.com/pewpew-game/pew-pewpew-standalone-10.x to handle the +//| LED matrix display and buttons on the ``pewpew10`` board. +//| +//| Usage:: +//| +//| This singleton class is instantiated by the ``pew`` library, and +//| used internally by it. All user-visible interactions are done through +//| that library. +//| + +//| .. class:: PewPew(buffer, rows, cols, buttons) +//| +//| Initializes matrix scanning routines. +//| +//| The ``buffer`` is a 64 byte long ``bytearray`` that stores what should +//| be displayed on the matrix. ``rows`` and ``cols`` are both lists of +//| eight ``DigitalInputOutput`` objects that are connected to the matrix +//| rows and columns. ``buttons`` is a ``DigitalInputOutput`` object that +//| is connected to the common side of all buttons (the other sides of the +//| buttons are connected to rows of the matrix). +//| +STATIC mp_obj_t pewpew_make_new(const mp_obj_type_t *type, size_t n_args, + const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 4, 4, true); + enum { ARG_buffer, ARG_rows, ARG_cols, ARG_buttons }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_rows, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_cols, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_buttons, MP_ARG_OBJ | MP_ARG_REQUIRED }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), + allowed_args, args); + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ); + + size_t rows_size = 0; + mp_obj_t *rows; + mp_obj_get_array(args[ARG_rows].u_obj, &rows_size, &rows); + + size_t cols_size = 0; + mp_obj_t *cols; + mp_obj_get_array(args[ARG_cols].u_obj, &cols_size, &cols); + + if (bufinfo.len != rows_size * cols_size) { + mp_raise_ValueError(translate("Incorrect buffer size")); + } + + for (size_t i = 0; i < rows_size; ++i) { + if (!MP_OBJ_IS_TYPE(rows[i], &digitalio_digitalinout_type)) { + mp_raise_TypeError(translate("Row entry must be digitalio.DigitalInOut")); + } + digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(rows[i]); + if (common_hal_digitalio_digitalinout_deinited(pin)) { + raise_deinited_error(); + } + } + + for (size_t i = 0; i < cols_size; ++i) { + if (!MP_OBJ_IS_TYPE(cols[i], &digitalio_digitalinout_type)) { + mp_raise_TypeError(translate("Column entry must be digitalio.DigitalInOut")); + } + digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(cols[i]); + if (common_hal_digitalio_digitalinout_deinited(pin)) { + raise_deinited_error(); + } + } + + if (!MP_OBJ_IS_TYPE(args[ARG_buttons].u_obj, + &digitalio_digitalinout_type)) { + mp_raise_TypeError(translate("buttons must be digitalio.DigitalInOut")); + } + digitalio_digitalinout_obj_t *buttons = MP_OBJ_TO_PTR( + args[ARG_buttons].u_obj); + if (common_hal_digitalio_digitalinout_deinited(buttons)) { + raise_deinited_error(); + } + + pew_obj_t *pew = MP_STATE_VM(pew_singleton); + if (!pew) { + pew = m_new_obj(pew_obj_t); + pew->base.type = &pewpew_type; + pew = gc_make_long_lived(pew); + MP_STATE_VM(pew_singleton) = pew; + } + + pew->buffer = bufinfo.buf; + pew->rows = rows; + pew->rows_size = rows_size; + pew->cols = cols; + pew->cols_size = cols_size; + pew->buttons = buttons; + pew->pressed = 0; + pew_init(); + + return MP_OBJ_FROM_PTR(pew); +} + + +STATIC const mp_rom_map_elem_t pewpew_locals_dict_table[] = { +}; +STATIC MP_DEFINE_CONST_DICT(pewpew_locals_dict, pewpew_locals_dict_table); +const mp_obj_type_t pewpew_type = { + { &mp_type_type }, + .name = MP_QSTR_PewPew, + .make_new = pewpew_make_new, + .locals_dict = (mp_obj_dict_t*)&pewpew_locals_dict, +}; diff --git a/shared-bindings/_pew/PewPew.h b/shared-bindings/_pew/PewPew.h new file mode 100644 index 0000000000000..f763847577fdd --- /dev/null +++ b/shared-bindings/_pew/PewPew.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_PEW_PEWPEW_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_PEW_PEWPEW_H + +extern const mp_obj_type_t pewpew_type; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_PEW_PEWPEW_H diff --git a/shared-bindings/_pew/__init__.c b/shared-bindings/_pew/__init__.c new file mode 100644 index 0000000000000..6c5520ac58603 --- /dev/null +++ b/shared-bindings/_pew/__init__.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "PewPew.h" +#include "shared-module/_pew/PewPew.h" + +STATIC mp_obj_t get_pressed(void) { + pew_obj_t *pew = MP_STATE_VM(pew_singleton); + if (!pew) { + return mp_const_none; + } + uint8_t pressed = pew->pressed; + pew->pressed = 0; + return mp_obj_new_int(pressed); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_0(get_pressed_obj, get_pressed); + + +//| :mod:`_pew` --- LED matrix driver +//| ================================== +//| +//| .. module:: _pew +//| :synopsis: LED matrix driver +//| :platform: SAMD21 +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| PewPew +//| +STATIC const mp_rom_map_elem_t pew_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__pew) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PewPew), MP_ROM_PTR(&pewpew_type)}, + { MP_OBJ_NEW_QSTR(MP_QSTR_get_pressed), MP_ROM_PTR(&get_pressed_obj)}, +}; +STATIC MP_DEFINE_CONST_DICT(pew_module_globals, + pew_module_globals_table); + +const mp_obj_module_t pew_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&pew_module_globals, +}; diff --git a/shared-bindings/_pixelbuf/PixelBuf.c b/shared-bindings/_pixelbuf/PixelBuf.c new file mode 100644 index 0000000000000..61b4c9ae09dfb --- /dev/null +++ b/shared-bindings/_pixelbuf/PixelBuf.c @@ -0,0 +1,389 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/objarray.h" +#include "py/objtype.h" +#include "py/mphal.h" +#include "py/runtime.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/gc.h" + +#include + +#include "shared-bindings/_pixelbuf/PixelBuf.h" +#include "shared-module/_pixelbuf/PixelBuf.h" +#include "shared-bindings/digitalio/DigitalInOut.h" + +extern const int32_t colorwheel(float pos); + +static void parse_byteorder(mp_obj_t byteorder_obj, pixelbuf_byteorder_details_t* parsed); + +//| .. currentmodule:: pixelbuf +//| +//| :class:`PixelBuf` -- A fast RGB[W] pixel buffer for LED and similar devices +//| =========================================================================== +//| +//| :class:`~_pixelbuf.PixelBuf` implements an RGB[W] bytearray abstraction. +//| +//| .. class:: PixelBuf(size, *, byteorder="BGR", brightness=0, auto_write=False, header=b"", trailer=b"") +//| +//| Create a PixelBuf object of the specified size, byteorder, and bits per pixel. +//| +//| When brightness is less than 1.0, a second buffer will be used to store the color values +//| before they are adjusted for brightness. +//| +//| When ``P`` (pwm duration) is present as the 4th character of the byteorder +//| string, the 4th value in the tuple/list for a pixel is the individual pixel +//| brightness (0.0-1.0) and will enable a Dotstar compatible 1st byte in the +//| output buffer (``buf``). +//| +//| :param ~int size: Number of pixelsx +//| :param ~str byteorder: Byte order string (such as "BGR" or "PBGR") +//| :param ~float brightness: Brightness (0 to 1.0, default 1.0) +//| :param ~bool auto_write: Whether to automatically write pixels (Default False) +//| :param bytes header: Sequence of bytes to always send before pixel values. +//| :param bytes trailer: Sequence of bytes to always send after pixel values. +//| +STATIC mp_obj_t pixelbuf_pixelbuf_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, MP_OBJ_FUN_ARGS_MAX, true); + enum { ARG_size, ARG_byteorder, ARG_brightness, ARG_auto_write, ARG_header, ARG_trailer }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_size, MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_byteorder, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NEW_QSTR(MP_QSTR_BGR) } }, + { MP_QSTR_brightness, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = mp_const_none } }, + { MP_QSTR_auto_write, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_header, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = mp_const_none } }, + { MP_QSTR_trailer, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = mp_const_none } }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + pixelbuf_byteorder_details_t byteorder_details; + + parse_byteorder(args[ARG_byteorder].u_obj, &byteorder_details); + + mp_buffer_info_t header_bufinfo; + mp_buffer_info_t trailer_bufinfo; + + if (!mp_get_buffer(args[ARG_header].u_obj, &header_bufinfo, MP_BUFFER_READ)) { + header_bufinfo.buf = NULL; + header_bufinfo.len = 0; + } + if (!mp_get_buffer(args[ARG_trailer].u_obj, &trailer_bufinfo, MP_BUFFER_READ)) { + trailer_bufinfo.buf = NULL; + trailer_bufinfo.len = 0; + } + + float brightness = 1.0; + if (args[ARG_brightness].u_obj != mp_const_none) { + brightness = mp_obj_get_float(args[ARG_brightness].u_obj); + if (brightness < 0) { + brightness = 0; + } else if (brightness > 1) { + brightness = 1; + } + } + + // Validation complete, allocate and populate object. + pixelbuf_pixelbuf_obj_t *self = m_new_obj(pixelbuf_pixelbuf_obj_t); + self->base.type = &pixelbuf_pixelbuf_type; + common_hal__pixelbuf_pixelbuf_construct(self, args[ARG_size].u_int, + &byteorder_details, brightness, args[ARG_auto_write].u_bool, header_bufinfo.buf, + header_bufinfo.len, trailer_bufinfo.buf, trailer_bufinfo.len); + + return MP_OBJ_FROM_PTR(self); +} + +static void parse_byteorder(mp_obj_t byteorder_obj, pixelbuf_byteorder_details_t* parsed) { + if (!MP_OBJ_IS_STR(byteorder_obj)) { + mp_raise_TypeError(translate("byteorder is not a string")); + } + + size_t bo_len; + const char *byteorder = mp_obj_str_get_data(byteorder_obj, &bo_len); + if (bo_len < 3 || bo_len > 4) { + mp_raise_ValueError(translate("Invalid byteorder string")); + } + parsed->order_string = byteorder_obj; + + parsed->bpp = bo_len; + char *dotstar = strchr(byteorder, 'P'); + char *r = strchr(byteorder, 'R'); + char *g = strchr(byteorder, 'G'); + char *b = strchr(byteorder, 'B'); + char *w = strchr(byteorder, 'W'); + int num_chars = (dotstar ? 1 : 0) + (w ? 1 : 0) + (r ? 1 : 0) + (g ? 1 : 0) + (b ? 1 : 0); + if ((num_chars < parsed->bpp) || !(r && b && g)) { + mp_raise_ValueError(translate("Invalid byteorder string")); + } + parsed->is_dotstar = dotstar ? true : false; + parsed->has_white = w ? true : false; + parsed->byteorder.r = r - byteorder; + parsed->byteorder.g = g - byteorder; + parsed->byteorder.b = b - byteorder; + parsed->byteorder.w = w ? w - byteorder : 0; + // The dotstar brightness byte is always first (as it goes with the pixel start bits) + if (dotstar && byteorder[0] != 'P') { + mp_raise_ValueError(translate("Invalid byteorder string")); + } + if (parsed->has_white && parsed->is_dotstar) { + mp_raise_ValueError(translate("Invalid byteorder string")); + } +} + +//| .. attribute:: bpp +//| +//| The number of bytes per pixel in the buffer (read-only) +//| +STATIC mp_obj_t pixelbuf_pixelbuf_obj_get_bpp(mp_obj_t self_in) { + return MP_OBJ_NEW_SMALL_INT(common_hal__pixelbuf_pixelbuf_get_bpp(self_in)); +} +MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_get_bpp_obj, pixelbuf_pixelbuf_obj_get_bpp); + +const mp_obj_property_t pixelbuf_pixelbuf_bpp_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&pixelbuf_pixelbuf_get_bpp_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| .. attribute:: brightness +//| +//| Float value between 0 and 1. Output brightness. +//| +//| When brightness is less than 1.0, a second buffer will be used to store the color values +//| before they are adjusted for brightness. +//| +STATIC mp_obj_t pixelbuf_pixelbuf_obj_get_brightness(mp_obj_t self_in) { + return mp_obj_new_float(common_hal__pixelbuf_pixelbuf_get_brightness(self_in)); +} +MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_get_brightness_obj, pixelbuf_pixelbuf_obj_get_brightness); + + +STATIC mp_obj_t pixelbuf_pixelbuf_obj_set_brightness(mp_obj_t self_in, mp_obj_t value) { + mp_float_t brightness = mp_obj_float_get(value); + if (brightness > 1) { + brightness = 1; + } else if (brightness < 0) { + brightness = 0; + } + common_hal__pixelbuf_pixelbuf_set_brightness(self_in, brightness); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(pixelbuf_pixelbuf_set_brightness_obj, pixelbuf_pixelbuf_obj_set_brightness); + +const mp_obj_property_t pixelbuf_pixelbuf_brightness_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&pixelbuf_pixelbuf_get_brightness_obj, + (mp_obj_t)&pixelbuf_pixelbuf_set_brightness_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: auto_write +//| +//| Whether to automatically write the pixels after each update. +//| +STATIC mp_obj_t pixelbuf_pixelbuf_obj_get_auto_write(mp_obj_t self_in) { + return mp_obj_new_bool(common_hal__pixelbuf_pixelbuf_get_auto_write(self_in)); +} +MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_get_auto_write_obj, pixelbuf_pixelbuf_obj_get_auto_write); + + +STATIC mp_obj_t pixelbuf_pixelbuf_obj_set_auto_write(mp_obj_t self_in, mp_obj_t value) { + common_hal__pixelbuf_pixelbuf_set_auto_write(self_in, mp_obj_is_true(value)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(pixelbuf_pixelbuf_set_auto_write_obj, pixelbuf_pixelbuf_obj_set_auto_write); + +const mp_obj_property_t pixelbuf_pixelbuf_auto_write_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&pixelbuf_pixelbuf_get_auto_write_obj, + (mp_obj_t)&pixelbuf_pixelbuf_set_auto_write_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: byteorder +//| +//| byteorder string for the buffer (read-only) +//| +STATIC mp_obj_t pixelbuf_pixelbuf_obj_get_byteorder(mp_obj_t self_in) { + return common_hal__pixelbuf_pixelbuf_get_byteorder_string(self_in); +} +MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_get_byteorder_str, pixelbuf_pixelbuf_obj_get_byteorder); + +const mp_obj_property_t pixelbuf_pixelbuf_byteorder_str = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&pixelbuf_pixelbuf_get_byteorder_str, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC mp_obj_t pixelbuf_pixelbuf_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + switch (op) { + case MP_UNARY_OP_BOOL: return mp_const_true; + case MP_UNARY_OP_LEN: + return MP_OBJ_NEW_SMALL_INT(common_hal__pixelbuf_pixelbuf_get_len(self_in)); + default: return MP_OBJ_NULL; // op not supported + } +} + +//| .. method:: show() +//| +//| Transmits the color data to the pixels so that they are shown. This is done automatically +//| when `auto_write` is True. +//| + +STATIC mp_obj_t pixelbuf_pixelbuf_show(mp_obj_t self_in) { + common_hal__pixelbuf_pixelbuf_show(self_in); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_pixelbuf_show_obj, pixelbuf_pixelbuf_show); + +//| .. function:: fill(color) +//| +//| Fills the given pixelbuf with the given color. +//| + +STATIC mp_obj_t pixelbuf_pixelbuf_fill(mp_obj_t self_in, mp_obj_t value) { + common_hal__pixelbuf_pixelbuf_fill(self_in, value); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(pixelbuf_pixelbuf_fill_obj, pixelbuf_pixelbuf_fill); + + +//| .. method:: __getitem__(index) +//| +//| Returns the pixel value at the given index as a tuple of (Red, Green, Blue[, White]) values +//| between 0 and 255. +//| +//| .. method:: __setitem__(index, value) +//| +//| Sets the pixel value at the given index. Value can either be a tuple of (Red, Green, Blue +//| [, White]) values between 0 and 255 or an integer where the red, green and blue values are +//| packed into the lower three bytes (0xRRGGBB). +//| +STATIC mp_obj_t pixelbuf_pixelbuf_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value) { + if (value == MP_OBJ_NULL) { + // delete item + // slice deletion + return MP_OBJ_NULL; // op not supported + } + + if (0) { +#if MICROPY_PY_BUILTINS_SLICE + } else if (MP_OBJ_IS_TYPE(index_in, &mp_type_slice)) { + mp_bound_slice_t slice; + + size_t length = common_hal__pixelbuf_pixelbuf_get_len(self_in); + mp_seq_get_fast_slice_indexes(length, index_in, &slice); + + if (slice.step < 0) { + mp_raise_IndexError(translate("Negative step not supported")); + } + + if (value == MP_OBJ_SENTINEL) { // Get + size_t len = slice.stop - slice.start; + if (slice.step > 1) { + len = (len / slice.step) + (len % slice.step ? 1 : 0); + } + mp_obj_tuple_t* t = MP_OBJ_TO_PTR(mp_obj_new_tuple(len, NULL)); + for (uint i = 0; i < len; i++) { + t->items[i] = common_hal__pixelbuf_pixelbuf_get_pixel(self_in, i * slice.step); + } + return MP_OBJ_FROM_PTR(t); + } else { // Set + #if MICROPY_PY_ARRAY_SLICE_ASSIGN + + if (!(MP_OBJ_IS_TYPE(value, &mp_type_list) || MP_OBJ_IS_TYPE(value, &mp_type_tuple))) { + mp_raise_ValueError(translate("tuple/list required on RHS")); + } + + size_t dst_len = (slice.stop - slice.start); + if (slice.step > 1) { + dst_len = (dst_len / slice.step) + (dst_len % slice.step ? 1 : 0); + } + mp_obj_t *src_objs; + size_t num_items; + if (MP_OBJ_IS_TYPE(value, &mp_type_list)) { + mp_obj_list_t *t = MP_OBJ_TO_PTR(value); + num_items = t->len; + src_objs = t->items; + } else { + mp_obj_tuple_t *l = MP_OBJ_TO_PTR(value); + num_items = l->len; + src_objs = l->items; + } + if (num_items != dst_len) { + mp_raise_ValueError_varg(translate("Unmatched number of items on RHS (expected %d, got %d)."), + dst_len, num_items); + } + + common_hal__pixelbuf_pixelbuf_set_pixels(self_in, slice.start, slice.stop, slice.step, src_objs); + return mp_const_none; + #else + return MP_OBJ_NULL; // op not supported + #endif + } +#endif + } else { // Single index rather than slice. + size_t length = common_hal__pixelbuf_pixelbuf_get_len(self_in); + size_t index = mp_get_index(mp_obj_get_type(self_in), length, index_in, false); + + if (value == MP_OBJ_SENTINEL) { // Get + return common_hal__pixelbuf_pixelbuf_get_pixel(self_in, index); + } else { // Store + common_hal__pixelbuf_pixelbuf_set_pixel(self_in, index, value); + return mp_const_none; + } + } +} + +STATIC const mp_rom_map_elem_t pixelbuf_pixelbuf_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_auto_write), MP_ROM_PTR(&pixelbuf_pixelbuf_auto_write_obj)}, + { MP_ROM_QSTR(MP_QSTR_bpp), MP_ROM_PTR(&pixelbuf_pixelbuf_bpp_obj)}, + { MP_ROM_QSTR(MP_QSTR_brightness), MP_ROM_PTR(&pixelbuf_pixelbuf_brightness_obj)}, + { MP_ROM_QSTR(MP_QSTR_byteorder), MP_ROM_PTR(&pixelbuf_pixelbuf_byteorder_str)}, + { MP_ROM_QSTR(MP_QSTR_show), MP_ROM_PTR(&pixelbuf_pixelbuf_show_obj)}, + { MP_ROM_QSTR(MP_QSTR_fill), MP_ROM_PTR(&pixelbuf_pixelbuf_fill_obj)}, +}; + +STATIC MP_DEFINE_CONST_DICT(pixelbuf_pixelbuf_locals_dict, pixelbuf_pixelbuf_locals_dict_table); + + +const mp_obj_type_t pixelbuf_pixelbuf_type = { + { &mp_type_type }, + .name = MP_QSTR_PixelBuf, + .subscr = pixelbuf_pixelbuf_subscr, + .make_new = pixelbuf_pixelbuf_make_new, + .unary_op = pixelbuf_pixelbuf_unary_op, + .getiter = mp_obj_new_generic_iterator, + .print = NULL, + .locals_dict = (mp_obj_t)&pixelbuf_pixelbuf_locals_dict, +}; diff --git a/shared-bindings/_pixelbuf/PixelBuf.h b/shared-bindings/_pixelbuf/PixelBuf.h new file mode 100644 index 0000000000000..68d6d4eefcce7 --- /dev/null +++ b/shared-bindings/_pixelbuf/PixelBuf.h @@ -0,0 +1,52 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef CP_SHARED_BINDINGS_PIXELBUF_PIXELBUF_H +#define CP_SHARED_BINDINGS_PIXELBUF_PIXELBUF_H + +#include "shared-module/_pixelbuf/PixelBuf.h" + +const mp_obj_type_t pixelbuf_pixelbuf_type; + +void common_hal__pixelbuf_pixelbuf_construct(pixelbuf_pixelbuf_obj_t *self, size_t n, + pixelbuf_byteorder_details_t* byteorder, mp_float_t brightness, bool auto_write, uint8_t* header, + size_t header_len, uint8_t* trailer, size_t trailer_len); + +// These take mp_obj_t because they are called on subclasses of PixelBuf. +uint8_t common_hal__pixelbuf_pixelbuf_get_bpp(mp_obj_t self); +mp_float_t common_hal__pixelbuf_pixelbuf_get_brightness(mp_obj_t self); +void common_hal__pixelbuf_pixelbuf_set_brightness(mp_obj_t self, mp_float_t brightness); +bool common_hal__pixelbuf_pixelbuf_get_auto_write(mp_obj_t self); +void common_hal__pixelbuf_pixelbuf_set_auto_write(mp_obj_t self, bool auto_write); +size_t common_hal__pixelbuf_pixelbuf_get_len(mp_obj_t self_in); +mp_obj_t common_hal__pixelbuf_pixelbuf_get_byteorder_string(mp_obj_t self); +void common_hal__pixelbuf_pixelbuf_fill(mp_obj_t self, mp_obj_t item); +void common_hal__pixelbuf_pixelbuf_show(mp_obj_t self); +mp_obj_t common_hal__pixelbuf_pixelbuf_get_pixel(mp_obj_t self, size_t index); +void common_hal__pixelbuf_pixelbuf_set_pixel(mp_obj_t self, size_t index, mp_obj_t item); +void common_hal__pixelbuf_pixelbuf_set_pixels(mp_obj_t self_in, size_t start, size_t stop, size_t step, mp_obj_t* values); + +#endif // CP_SHARED_BINDINGS_PIXELBUF_PIXELBUF_H diff --git a/shared-bindings/_pixelbuf/__init__.c b/shared-bindings/_pixelbuf/__init__.c new file mode 100644 index 0000000000000..424ed23e4cc09 --- /dev/null +++ b/shared-bindings/_pixelbuf/__init__.c @@ -0,0 +1,93 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "py/runtime.h" +#include "py/objproperty.h" + +#include "shared-bindings/_pixelbuf/__init__.h" +#include "shared-bindings/_pixelbuf/PixelBuf.h" + + +//| :mod:`_pixelbuf` --- Fast RGB(W) pixel buffer and helpers +//| =========================================================== + +//| .. module:: _pixelbuf +//| :synopsis: A fast RGB(W) pixel buffer library for like NeoPixel and DotStar. +//| +//| The `_pixelbuf` module provides the :py:class:`PixelBuf` class to accelerate +//| RGB(W) strip/matrix manipulation, such as DotStar and Neopixel. +//| +//| Byteorders are configured with strings, such as "RGB" or "RGBD". +//| TODO: Pull in docs from pypixelbuf. + +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| PixelBuf + + +//| .. function:: wheel(n) +//| +//| C implementation of the common wheel() function found in many examples. +//| Returns the colorwheel RGB value as an integer value for n (usable in :py:class:`PixelBuf`, neopixel, and dotstar). +//| + +STATIC mp_obj_t pixelbuf_wheel(mp_obj_t n) { + return MP_OBJ_NEW_SMALL_INT(colorwheel(MP_OBJ_IS_SMALL_INT(n) ? MP_OBJ_SMALL_INT_VALUE(n) : mp_obj_float_get(n))); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(pixelbuf_wheel_obj, pixelbuf_wheel); + +const int32_t colorwheel(float pos) { + if (pos > 255) { + pos = pos - ((uint32_t)(pos / 256) * 256); + } + if (pos < 85) + return (uint8_t)(pos * 3) << 16 | (uint8_t)(255 - (pos * 3)) << 8; + else if (pos < 170) { + pos -= 85; + return (uint8_t)(255 - (pos * 3)) << 16 | (uint8_t)(pos * 3); + } else { + pos -= 170; + return (uint8_t)(pos * 3) << 8 | (uint8_t)(255 - pos * 3); + } +} + +STATIC const mp_rom_map_elem_t pixelbuf_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__pixelbuf) }, + { MP_ROM_QSTR(MP_QSTR_PixelBuf), MP_ROM_PTR(&pixelbuf_pixelbuf_type) }, + { MP_ROM_QSTR(MP_QSTR_wheel), MP_ROM_PTR(&pixelbuf_wheel_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(pixelbuf_module_globals, pixelbuf_module_globals_table); + +const mp_obj_module_t pixelbuf_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&pixelbuf_module_globals, +}; diff --git a/shared-bindings/_pixelbuf/__init__.h b/shared-bindings/_pixelbuf/__init__.h new file mode 100644 index 0000000000000..0e8c4a37f9eb2 --- /dev/null +++ b/shared-bindings/_pixelbuf/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef CP_SHARED_BINDINGS_PIXELBUF_INIT_H +#define CP_SHARED_BINDINGS_PIXELBUF_INIT_H + +#include "common-hal/digitalio/DigitalInOut.h" + +const int32_t colorwheel(float pos); + +#endif //CP_SHARED_BINDINGS_PIXELBUF_INIT_H diff --git a/shared-bindings/_stage/Layer.c b/shared-bindings/_stage/Layer.c index 3e615c497735f..12028b131976a 100644 --- a/shared-bindings/_stage/Layer.c +++ b/shared-bindings/_stage/Layer.c @@ -28,6 +28,7 @@ #include "__init__.h" #include "Layer.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: _stage //| @@ -50,8 +51,8 @@ //| it shouldn't be used on its own. //| STATIC mp_obj_t layer_make_new(const mp_obj_type_t *type, size_t n_args, - size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 4, 5, false); + const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 4, 5, false); layer_obj_t *self = m_new_obj(layer_obj_t); self->base.type = type; @@ -67,20 +68,20 @@ STATIC mp_obj_t layer_make_new(const mp_obj_type_t *type, size_t n_args, mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ); self->graphic = bufinfo.buf; if (bufinfo.len != 2048) { - mp_raise_ValueError("graphic must be 2048 bytes long"); + mp_raise_ValueError(translate("graphic must be 2048 bytes long")); } mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); self->palette = bufinfo.buf; if (bufinfo.len != 32) { - mp_raise_ValueError("palette must be 32 bytes long"); + mp_raise_ValueError(translate("palette must be 32 bytes long")); } if (n_args > 4) { mp_get_buffer_raise(args[4], &bufinfo, MP_BUFFER_READ); self->map = bufinfo.buf; if (bufinfo.len < (self->width * self->height) / 2) { - mp_raise_ValueError("map buffer too small"); + mp_raise_ValueError(translate("map buffer too small")); } } else { self-> map = NULL; diff --git a/shared-bindings/_stage/Text.c b/shared-bindings/_stage/Text.c index c62d22afeec87..49c1d00ca8a48 100644 --- a/shared-bindings/_stage/Text.c +++ b/shared-bindings/_stage/Text.c @@ -28,6 +28,7 @@ #include "__init__.h" #include "Text.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: _stage //| @@ -50,8 +51,8 @@ //| it shouldn't be used on its own. //| STATIC mp_obj_t text_make_new(const mp_obj_type_t *type, size_t n_args, - size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 5, 5, false); + const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 5, 5, false); text_obj_t *self = m_new_obj(text_obj_t); self->base.type = type; @@ -65,19 +66,19 @@ STATIC mp_obj_t text_make_new(const mp_obj_type_t *type, size_t n_args, mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ); self->font = bufinfo.buf; if (bufinfo.len != 2048) { - mp_raise_ValueError("font must be 2048 bytes long"); + mp_raise_ValueError(translate("font must be 2048 bytes long")); } mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); self->palette = bufinfo.buf; if (bufinfo.len != 32) { - mp_raise_ValueError("palette must be 32 bytes long"); + mp_raise_ValueError(translate("palette must be 32 bytes long")); } mp_get_buffer_raise(args[4], &bufinfo, MP_BUFFER_READ); self->chars = bufinfo.buf; if (bufinfo.len < self->width * self->height) { - mp_raise_ValueError("chars buffer too small"); + mp_raise_ValueError(translate("chars buffer too small")); } return MP_OBJ_FROM_PTR(self); diff --git a/shared-bindings/_stage/__init__.c b/shared-bindings/_stage/__init__.c index 24a3596645a92..4bac280bf2405 100644 --- a/shared-bindings/_stage/__init__.c +++ b/shared-bindings/_stage/__init__.c @@ -28,7 +28,9 @@ #include "py/mperrno.h" #include "py/runtime.h" #include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/Display.h" #include "shared-module/_stage/__init__.h" +#include "shared-module/displayio/display_core.h" #include "Layer.h" #include "Text.h" @@ -49,7 +51,7 @@ //| Layer //| Text //| -//| .. function:: render(x0, y0, x1, y1, layers, buffer, spi) +//| .. function:: render(x0, y0, x1, y1, layers, buffer, display[, scale[, background]]) //| //| Render and send to the display a fragment of the screen. //| @@ -59,11 +61,10 @@ //| :param int y1: Bottom edge of the fragment. //| :param list layers: A list of the :py:class:`~_stage.Layer` objects. //| :param bytearray buffer: A buffer to use for rendering. -//| :param ~busio.SPI spi: The SPI bus to use. +//| :param ~displayio.Display display: The display to use. +//| :param int scale: How many times should the image be scaled up. +//| :param int background: What color to display when nothing is there. //| -//| Note that this function only sends the raw pixel data. Setting up -//| the display for receiving it and handling the chip-select and -//| data-command pins has to be done outside of it. //| There are also no sanity checks, outside of the basic overflow //| checking. The caller is responsible for making the passed parameters //| valid. @@ -85,16 +86,27 @@ STATIC mp_obj_t stage_render(size_t n_args, const mp_obj_t *args) { uint16_t *buffer = bufinfo.buf; size_t buffer_size = bufinfo.len / 2; // 16-bit indexing - busio_spi_obj_t *spi = MP_OBJ_TO_PTR(args[6]); - - if (!render_stage(x0, y0, x1, y1, layers, layers_size, - buffer, buffer_size, spi)) { - mp_raise_OSError(MP_EIO); + mp_obj_t native_display = mp_instance_cast_to_native_base(args[6], + &displayio_display_type); + if (!MP_OBJ_IS_TYPE(native_display, &displayio_display_type)) { + mp_raise_TypeError(translate("argument num/types mismatch")); + } + displayio_display_obj_t *display = MP_OBJ_TO_PTR(native_display); + uint8_t scale = 1; + if (n_args > 7) { + scale = mp_obj_get_int(args[7]); } + uint16_t background = 0; + if (n_args > 8) { + background = mp_obj_get_int(args[8]); + } + + render_stage(x0, y0, x1, y1, layers, layers_size, buffer, buffer_size, + display, scale, background); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stage_render_obj, 7, 7, stage_render); +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stage_render_obj, 7, 8, stage_render); STATIC const mp_rom_map_elem_t stage_module_globals_table[] = { diff --git a/shared-bindings/analogio/AnalogIn.c b/shared-bindings/analogio/AnalogIn.c index b5f9d7a4eab96..b4eeb2af1b4f1 100644 --- a/shared-bindings/analogio/AnalogIn.c +++ b/shared-bindings/analogio/AnalogIn.c @@ -58,21 +58,18 @@ //| :param ~microcontroller.Pin pin: the pin to read from //| STATIC mp_obj_t analogio_analogin_make_new(const mp_obj_type_t *type, - mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { + mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); + mp_arg_check_num(n_args, kw_args, 1, 1, false); // 1st argument is the pin - mp_obj_t pin_obj = args[0]; - assert_pin(pin_obj, false); + const mcu_pin_obj_t *pin = validate_obj_is_free_pin(args[0]); analogio_analogin_obj_t *self = m_new_obj(analogio_analogin_obj_t); self->base.type = &analogio_analogin_type; - const mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj); - assert_pin_free(pin); common_hal_analogio_analogin_construct(self, pin); - return (mp_obj_t) self; + return MP_OBJ_FROM_PTR(self); } //| .. method:: deinit() @@ -86,6 +83,11 @@ STATIC mp_obj_t analogio_analogin_deinit(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(analogio_analogin_deinit_obj, analogio_analogin_deinit); +STATIC void check_for_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + raise_deinited_error(); + } +} //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -113,7 +115,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(analogio_analogin___exit___obj, 4, 4, //| STATIC mp_obj_t analogio_analogin_obj_get_value(mp_obj_t self_in) { analogio_analogin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_analogio_analogin_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_analogio_analogin_get_value(self)); } MP_DEFINE_CONST_FUN_OBJ_1(analogio_analogin_get_value_obj, analogio_analogin_obj_get_value); @@ -132,8 +134,14 @@ const mp_obj_property_t analogio_analogin_value_obj = { //| STATIC mp_obj_t analogio_analogin_obj_get_reference_voltage(mp_obj_t self_in) { analogio_analogin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_analogio_analogin_deinited(self)); - return mp_obj_new_float(common_hal_analogio_analogin_get_reference_voltage(self)); + check_for_deinit(self); + + float reference_voltage = common_hal_analogio_analogin_get_reference_voltage(self); + if (reference_voltage <= 0.0f) { + return mp_const_none; + } else { + return mp_obj_new_float(reference_voltage); + } } MP_DEFINE_CONST_FUN_OBJ_1(analogio_analogin_get_reference_voltage_obj, analogio_analogin_obj_get_reference_voltage); diff --git a/shared-bindings/analogio/AnalogOut.c b/shared-bindings/analogio/AnalogOut.c index 721448fa4a75a..89cf147b267c9 100644 --- a/shared-bindings/analogio/AnalogOut.c +++ b/shared-bindings/analogio/AnalogOut.c @@ -34,6 +34,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/analogio/AnalogOut.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: analogio //| @@ -57,19 +58,17 @@ //| //| :param ~microcontroller.Pin pin: the pin to output to //| -STATIC mp_obj_t analogio_analogout_make_new(const mp_obj_type_t *type, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t analogio_analogout_make_new(const mp_obj_type_t *type, mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { // check arguments - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); + mp_arg_check_num(n_args, kw_args, 1, 1, false); - assert_pin(args[0], false); - const mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(args[0]); + const mcu_pin_obj_t *pin = validate_obj_is_free_pin(args[0]); analogio_analogout_obj_t *self = m_new_obj(analogio_analogout_obj_t); self->base.type = &analogio_analogout_type; - assert_pin_free(pin); common_hal_analogio_analogout_construct(self, pin); - return self; + return MP_OBJ_FROM_PTR(self); } //| .. method:: deinit() @@ -111,10 +110,12 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(analogio_analogout___exit___obj, 4, 4 //| resolution, the value is 16-bit. STATIC mp_obj_t analogio_analogout_obj_set_value(mp_obj_t self_in, mp_obj_t value) { analogio_analogout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_analogio_analogout_deinited(self)); + if (common_hal_analogio_analogout_deinited(self)) { + raise_deinited_error(); + } uint32_t v = mp_obj_get_int(value); if (v >= (1 << 16)) { - mp_raise_ValueError("AnalogOut is only 16 bits. Value must be less than 65536."); + mp_raise_ValueError(translate("AnalogOut is only 16 bits. Value must be less than 65536.")); } common_hal_analogio_analogout_set_value(self, v); return mp_const_none; diff --git a/shared-bindings/audiobusio/I2SOut.c b/shared-bindings/audiobusio/I2SOut.c new file mode 100644 index 0000000000000..cd662acb56c97 --- /dev/null +++ b/shared-bindings/audiobusio/I2SOut.c @@ -0,0 +1,283 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiobusio/I2SOut.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiobusio +//| +//| :class:`I2SOut` -- Output an I2S audio signal +//| ======================================================== +//| +//| I2S is used to output an audio signal on an I2S bus. +//| +//| .. class:: I2SOut(bit_clock, word_select, data, *, left_justified) +//| +//| Create a I2SOut object associated with the given pins. +//| +//| :param ~microcontroller.Pin bit_clock: The bit clock (or serial clock) pin +//| :param ~microcontroller.Pin word_select: The word select (or left/right clock) pin +//| :param ~microcontroller.Pin data: The data pin +//| :param bool left_justified: True when data bits are aligned with the word select clock. False +//| when they are shifted by one to match classic I2S protocol. +//| +//| Simple 8ksps 440 Hz sine wave on `Metro M0 Express `_ +//| using `UDA1334 Breakout `_:: +//| +//| import audiobusio +//| import audiocore +//| import board +//| import array +//| import time +//| import math +//| +//| # Generate one period of sine wave. +//| length = 8000 // 440 +//| sine_wave = array.array("H", [0] * length) +//| for i in range(length): +//| sine_wave[i] = int(math.sin(math.pi * 2 * i / 18) * (2 ** 15) + 2 ** 15) +//| +//| sine_wave = audiocore.RawSample(sine_wave, sample_rate=8000) +//| i2s = audiobusio.I2SOut(board.D1, board.D0, board.D9) +//| i2s.play(sine_wave, loop=True) +//| time.sleep(1) +//| i2s.stop() +//| +//| Playing a wave file from flash:: +//| +//| import board +//| import audioio +//| import audiocore +//| import audiobusio +//| import digitalio +//| +//| +//| f = open("cplay-5.1-16bit-16khz.wav", "rb") +//| wav = audiocore.WaveFile(f) +//| +//| a = audiobusio.I2SOut(board.D1, board.D0, board.D9) +//| +//| print("playing") +//| a.play(wav) +//| while a.playing: +//| pass +//| print("stopped") +//| +STATIC mp_obj_t audiobusio_i2sout_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_bit_clock, ARG_word_select, ARG_data, ARG_left_justified }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_bit_clock, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_word_select, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_data, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_left_justified, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t *bit_clock = validate_obj_is_free_pin(args[ARG_bit_clock].u_obj); + const mcu_pin_obj_t *word_select = validate_obj_is_free_pin(args[ARG_word_select].u_obj); + const mcu_pin_obj_t *data = validate_obj_is_free_pin(args[ARG_data].u_obj); + + audiobusio_i2sout_obj_t *self = m_new_obj_with_finaliser(audiobusio_i2sout_obj_t); + self->base.type = &audiobusio_i2sout_type; + common_hal_audiobusio_i2sout_construct(self, bit_clock, word_select, data, args[ARG_left_justified].u_bool); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the I2SOut and releases any hardware resources for reuse. +//| +STATIC mp_obj_t audiobusio_i2sout_deinit(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audiobusio_i2sout_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_deinit_obj, audiobusio_i2sout_deinit); + +STATIC void check_for_deinit(audiobusio_i2sout_obj_t *self) { + if (common_hal_audiobusio_i2sout_deinited(self)) { + raise_deinited_error(); + } +} +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audiobusio_i2sout_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audiobusio_i2sout_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiobusio_i2sout___exit___obj, 4, 4, audiobusio_i2sout_obj___exit__); + + +//| .. method:: play(sample, *, loop=False) +//| +//| Plays the sample once when loop=False and continuously when loop=True. +//| Does not block. Use `playing` to block. +//| +//| Sample must be an `audiocore.WaveFile`, `audiocore.RawSample`, or `audiomixer.Mixer`. +//| +//| The sample itself should consist of 8 bit or 16 bit samples. +//| +STATIC mp_obj_t audiobusio_i2sout_obj_play(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_sample, ARG_loop }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_sample, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_loop, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t sample = args[ARG_sample].u_obj; + common_hal_audiobusio_i2sout_play(self, sample, args[ARG_loop].u_bool); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiobusio_i2sout_play_obj, 1, audiobusio_i2sout_obj_play); + +//| .. method:: stop() +//| +//| Stops playback. +//| +STATIC mp_obj_t audiobusio_i2sout_obj_stop(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_audiobusio_i2sout_stop(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_stop_obj, audiobusio_i2sout_obj_stop); + +//| .. attribute:: playing +//| +//| True when the audio sample is being output. (read-only) +//| +STATIC mp_obj_t audiobusio_i2sout_obj_get_playing(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audiobusio_i2sout_get_playing(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_get_playing_obj, audiobusio_i2sout_obj_get_playing); + +const mp_obj_property_t audiobusio_i2sout_playing_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiobusio_i2sout_get_playing_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: pause() +//| +//| Stops playback temporarily while remembering the position. Use `resume` to resume playback. +//| +STATIC mp_obj_t audiobusio_i2sout_obj_pause(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + if (!common_hal_audiobusio_i2sout_get_playing(self)) { + mp_raise_RuntimeError(translate("Not playing")); + } + common_hal_audiobusio_i2sout_pause(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_pause_obj, audiobusio_i2sout_obj_pause); + +//| .. method:: resume() +//| +//| Resumes sample playback after :py:func:`pause`. +//| +STATIC mp_obj_t audiobusio_i2sout_obj_resume(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + if (common_hal_audiobusio_i2sout_get_paused(self)) { + common_hal_audiobusio_i2sout_resume(self); + } + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_resume_obj, audiobusio_i2sout_obj_resume); + +//| .. attribute:: paused +//| +//| True when playback is paused. (read-only) +//| +STATIC mp_obj_t audiobusio_i2sout_obj_get_paused(mp_obj_t self_in) { + audiobusio_i2sout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audiobusio_i2sout_get_paused(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_i2sout_get_paused_obj, audiobusio_i2sout_obj_get_paused); + +const mp_obj_property_t audiobusio_i2sout_paused_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiobusio_i2sout_get_paused_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t audiobusio_i2sout_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&audiobusio_i2sout_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audiobusio_i2sout_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiobusio_i2sout___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&audiobusio_i2sout_play_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&audiobusio_i2sout_stop_obj) }, + { MP_ROM_QSTR(MP_QSTR_pause), MP_ROM_PTR(&audiobusio_i2sout_pause_obj) }, + { MP_ROM_QSTR(MP_QSTR_resume), MP_ROM_PTR(&audiobusio_i2sout_resume_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_playing), MP_ROM_PTR(&audiobusio_i2sout_playing_obj) }, + { MP_ROM_QSTR(MP_QSTR_paused), MP_ROM_PTR(&audiobusio_i2sout_paused_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audiobusio_i2sout_locals_dict, audiobusio_i2sout_locals_dict_table); + +const mp_obj_type_t audiobusio_i2sout_type = { + { &mp_type_type }, + .name = MP_QSTR_I2SOut, + .make_new = audiobusio_i2sout_make_new, + .locals_dict = (mp_obj_dict_t*)&audiobusio_i2sout_locals_dict, +}; diff --git a/shared-bindings/audiobusio/I2SOut.h b/shared-bindings/audiobusio/I2SOut.h new file mode 100644 index 0000000000000..edf4ecfa0bacf --- /dev/null +++ b/shared-bindings/audiobusio/I2SOut.h @@ -0,0 +1,48 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_I2SOUT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_I2SOUT_H + +#include "common-hal/audiobusio/I2SOut.h" +#include "common-hal/microcontroller/Pin.h" + +extern const mp_obj_type_t audiobusio_i2sout_type; + +void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t* self, + const mcu_pin_obj_t* bit_clock, const mcu_pin_obj_t* word_select, const mcu_pin_obj_t* data, + bool left_justified); + +void common_hal_audiobusio_i2sout_deinit(audiobusio_i2sout_obj_t* self); +bool common_hal_audiobusio_i2sout_deinited(audiobusio_i2sout_obj_t* self); +void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, mp_obj_t sample, bool loop); +void common_hal_audiobusio_i2sout_stop(audiobusio_i2sout_obj_t* self); +bool common_hal_audiobusio_i2sout_get_playing(audiobusio_i2sout_obj_t* self); +void common_hal_audiobusio_i2sout_pause(audiobusio_i2sout_obj_t* self); +void common_hal_audiobusio_i2sout_resume(audiobusio_i2sout_obj_t* self); +bool common_hal_audiobusio_i2sout_get_paused(audiobusio_i2sout_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_I2SOUT_H diff --git a/shared-bindings/audiobusio/PDMIn.c b/shared-bindings/audiobusio/PDMIn.c index 6f0a130e8341c..fce6cf7a2eb09 100644 --- a/shared-bindings/audiobusio/PDMIn.c +++ b/shared-bindings/audiobusio/PDMIn.c @@ -34,6 +34,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/audiobusio/PDMIn.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: audiobusio //| @@ -42,18 +43,18 @@ //| //| PDMIn can be used to record an input audio signal on a given set of pins. //| -//| .. class:: PDMIn(clock_pin, data_pin, \*, frequency=16000, bit_depth=8, mono=True, oversample=64, startup_delay=0.11) +//| .. class:: PDMIn(clock_pin, data_pin, *, sample_rate=16000, bit_depth=8, mono=True, oversample=64, startup_delay=0.11) //| //| Create a PDMIn object associated with the given pins. This allows you to //| record audio signals from the given pins. Individual ports may put further -//| restrictions on the recording parameters. The overall frequency is -//| determined by `frequency` x ``oversample``, and the total must be 1MHz or -//| higher, so `frequency` must be a minimum of 16000. +//| restrictions on the recording parameters. The overall sample rate is +//| determined by `sample_rate` x ``oversample``, and the total must be 1MHz or +//| higher, so `sample_rate` must be a minimum of 16000. //| //| :param ~microcontroller.Pin clock_pin: The pin to output the clock to //| :param ~microcontroller.Pin data_pin: The pin to read the data from -//| :param int frequency: Target frequency of the resulting samples. Check `frequency` for actual value. -//| Minimum frequency is about 16000 Hz. +//| :param int sample_rate: Target sample_rate of the resulting samples. Check `sample_rate` for actual value. +//| Minimum sample_rate is about 16000 Hz. //| :param int bit_depth: Final number of bits per sample. Must be divisible by 8 //| :param bool mono: True when capturing a single channel of audio, captures two channels otherwise //| :param int oversample: Number of single bit samples to decimate into a final sample. Must be divisible by 8 @@ -69,7 +70,7 @@ //| //| # Prep a buffer to record into //| b = bytearray(200) -//| with audiobusio.PDMIn(board.MICROPHONE_CLOCK, board.MICROPHONE_DATA, frequency=16000) as mic: +//| with audiobusio.PDMIn(board.MICROPHONE_CLOCK, board.MICROPHONE_DATA, sample_rate=16000) as mic: //| mic.record(b, len(b)) //| //| Record 16-bit unsigned samples to buffer:: @@ -83,15 +84,15 @@ //| b = array.array("H") //| for i in range(200): //| b.append(0) -//| with audiobusio.PDMIn(board.MICROPHONE_CLOCK, board.MICROPHONE_DATA, frequency=16000, bit_depth=16) as mic: +//| with audiobusio.PDMIn(board.MICROPHONE_CLOCK, board.MICROPHONE_DATA, sample_rate=16000, bit_depth=16) as mic: //| mic.record(b, len(b)) //| -STATIC mp_obj_t audiobusio_pdmin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - enum { ARG_frequency, ARG_bit_depth, ARG_mono, ARG_oversample, ARG_startup_delay }; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); +STATIC mp_obj_t audiobusio_pdmin_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_clock_pin, ARG_data_pin, ARG_sample_rate, ARG_bit_depth, ARG_mono, ARG_oversample, ARG_startup_delay }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_frequency, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 16000} }, + { MP_QSTR_clock_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_data_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_sample_rate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 16000} }, { MP_QSTR_bit_depth, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, { MP_QSTR_mono, MP_ARG_KW_ONLY | MP_ARG_BOOL,{.u_bool = true} }, { MP_QSTR_oversample, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, @@ -101,41 +102,34 @@ STATIC mp_obj_t audiobusio_pdmin_make_new(const mp_obj_type_t *type, size_t n_ar static const float STARTUP_DELAY_DEFAULT = 0.110F; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 2, pos_args + 2, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - mp_obj_t clock_pin_obj = pos_args[0]; - assert_pin(clock_pin_obj, false); - const mcu_pin_obj_t *clock_pin = MP_OBJ_TO_PTR(clock_pin_obj); - assert_pin_free(clock_pin); - - mp_obj_t data_pin_obj = pos_args[1]; - assert_pin(data_pin_obj, false); - const mcu_pin_obj_t *data_pin = MP_OBJ_TO_PTR(data_pin_obj); - assert_pin_free(data_pin); + const mcu_pin_obj_t *clock_pin = validate_obj_is_free_pin(args[ARG_clock_pin].u_obj); + const mcu_pin_obj_t *data_pin = validate_obj_is_free_pin(args[ARG_data_pin].u_obj); // create PDMIn object from the given pin audiobusio_pdmin_obj_t *self = m_new_obj(audiobusio_pdmin_obj_t); self->base.type = &audiobusio_pdmin_type; - uint32_t frequency = args[ARG_frequency].u_int; + uint32_t sample_rate = args[ARG_sample_rate].u_int; uint8_t bit_depth = args[ARG_bit_depth].u_int; if (bit_depth % 8 != 0) { - mp_raise_ValueError("Bit depth must be multiple of 8."); + mp_raise_ValueError(translate("Bit depth must be multiple of 8.")); } uint8_t oversample = args[ARG_oversample].u_int; if (oversample % 8 != 0) { - mp_raise_ValueError("Oversample must be multiple of 8."); + mp_raise_ValueError(translate("Oversample must be multiple of 8.")); } bool mono = args[ARG_mono].u_bool; - float startup_delay = (args[ARG_startup_delay].u_obj == MP_OBJ_NULL) - ? STARTUP_DELAY_DEFAULT + mp_float_t startup_delay = (args[ARG_startup_delay].u_obj == MP_OBJ_NULL) + ? (mp_float_t)STARTUP_DELAY_DEFAULT : mp_obj_get_float(args[ARG_startup_delay].u_obj); if (startup_delay < 0.0 || startup_delay > 1.0) { - mp_raise_ValueError("Microphone startup delay must be in range 0.0 to 1.0"); + mp_raise_ValueError(translate("Microphone startup delay must be in range 0.0 to 1.0")); } - common_hal_audiobusio_pdmin_construct(self, clock_pin, data_pin, frequency, + common_hal_audiobusio_pdmin_construct(self, clock_pin, data_pin, sample_rate, bit_depth, mono, oversample); // Wait for the microphone to start up. Some start in 10 msecs; some take as much as 100 msecs. @@ -155,6 +149,11 @@ STATIC mp_obj_t audiobusio_pdmin_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_pdmin_deinit_obj, audiobusio_pdmin_deinit); +STATIC void check_for_deinit(audiobusio_pdmin_obj_t *self) { + if (common_hal_audiobusio_pdmin_deinited(self)) { + raise_deinited_error(); + } +} //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -187,24 +186,24 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiobusio_pdmin___exit___obj, 4, 4, //| STATIC mp_obj_t audiobusio_pdmin_obj_record(mp_obj_t self_obj, mp_obj_t destination, mp_obj_t destination_length) { audiobusio_pdmin_obj_t *self = MP_OBJ_TO_PTR(self_obj); - raise_error_if_deinited(common_hal_audiobusio_pdmin_deinited(self)); + check_for_deinit(self); if (!MP_OBJ_IS_SMALL_INT(destination_length) || MP_OBJ_SMALL_INT_VALUE(destination_length) < 0) { - mp_raise_TypeError("destination_length must be an int >= 0"); + mp_raise_TypeError(translate("destination_length must be an int >= 0")); } uint32_t length = MP_OBJ_SMALL_INT_VALUE(destination_length); mp_buffer_info_t bufinfo; - if (MP_OBJ_IS_TYPE(destination, &fatfs_type_fileio)) { - mp_raise_NotImplementedError(""); + if (MP_OBJ_IS_TYPE(destination, &mp_type_fileio)) { + mp_raise_NotImplementedError(translate("Cannot record to a file")); } else if (mp_get_buffer(destination, &bufinfo, MP_BUFFER_WRITE)) { if (bufinfo.len / mp_binary_get_size('@', bufinfo.typecode, NULL) < length) { - mp_raise_ValueError("Destination capacity is smaller than destination_length."); + mp_raise_ValueError(translate("Destination capacity is smaller than destination_length.")); } uint8_t bit_depth = common_hal_audiobusio_pdmin_get_bit_depth(self); if (bufinfo.typecode != 'H' && bit_depth == 16) { - mp_raise_ValueError("destination buffer must be an array of type 'H' for bit_depth = 16"); + mp_raise_ValueError(translate("destination buffer must be an array of type 'H' for bit_depth = 16")); } else if (bufinfo.typecode != 'B' && bufinfo.typecode != BYTEARRAY_TYPECODE && bit_depth == 8) { - mp_raise_ValueError("destination buffer must be a bytearray or array of type 'B' for bit_depth = 8"); + mp_raise_ValueError(translate("destination buffer must be a bytearray or array of type 'B' for bit_depth = 8")); } // length is the buffer length in slots, not bytes. uint32_t length_written = @@ -215,21 +214,21 @@ STATIC mp_obj_t audiobusio_pdmin_obj_record(mp_obj_t self_obj, mp_obj_t destinat } MP_DEFINE_CONST_FUN_OBJ_3(audiobusio_pdmin_record_obj, audiobusio_pdmin_obj_record); -//| .. attribute:: frequency +//| .. attribute:: sample_rate //| -//| The actual frequency of the recording. This may not match the constructed -//| frequency due to internal clock limitations. +//| The actual sample_rate of the recording. This may not match the constructed +//| sample rate due to internal clock limitations. //| -STATIC mp_obj_t audiobusio_pdmin_obj_get_frequency(mp_obj_t self_in) { +STATIC mp_obj_t audiobusio_pdmin_obj_get_sample_rate(mp_obj_t self_in) { audiobusio_pdmin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_audiobusio_pdmin_deinited(self)); - return MP_OBJ_NEW_SMALL_INT(common_hal_audiobusio_pdmin_get_frequency(self)); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audiobusio_pdmin_get_sample_rate(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_pdmin_get_frequency_obj, audiobusio_pdmin_obj_get_frequency); +MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_pdmin_get_sample_rate_obj, audiobusio_pdmin_obj_get_sample_rate); -const mp_obj_property_t audiobusio_pdmin_frequency_obj = { +const mp_obj_property_t audiobusio_pdmin_sample_rate_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&audiobusio_pdmin_get_frequency_obj, + .proxy = {(mp_obj_t)&audiobusio_pdmin_get_sample_rate_obj, (mp_obj_t)&mp_const_none_obj, (mp_obj_t)&mp_const_none_obj}, }; @@ -240,7 +239,7 @@ STATIC const mp_rom_map_elem_t audiobusio_pdmin_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiobusio_pdmin___exit___obj) }, { MP_ROM_QSTR(MP_QSTR_record), MP_ROM_PTR(&audiobusio_pdmin_record_obj) }, - { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&audiobusio_pdmin_frequency_obj) } + { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audiobusio_pdmin_sample_rate_obj) } }; STATIC MP_DEFINE_CONST_DICT(audiobusio_pdmin_locals_dict, audiobusio_pdmin_locals_dict_table); diff --git a/shared-bindings/audiobusio/PDMIn.h b/shared-bindings/audiobusio/PDMIn.h index a0702c9788958..c2a8bab2f8e83 100644 --- a/shared-bindings/audiobusio/PDMIn.h +++ b/shared-bindings/audiobusio/PDMIn.h @@ -29,19 +29,19 @@ #include "common-hal/audiobusio/PDMIn.h" #include "common-hal/microcontroller/Pin.h" -#include "extmod/vfs_fat_file.h" +#include "extmod/vfs_fat.h" extern const mp_obj_type_t audiobusio_pdmin_type; void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, const mcu_pin_obj_t* clock_pin, const mcu_pin_obj_t* data_pin, - uint32_t frequency, uint8_t bit_depth, bool mono, uint8_t oversample); + uint32_t sample_rate, uint8_t bit_depth, bool mono, uint8_t oversample); void common_hal_audiobusio_pdmin_deinit(audiobusio_pdmin_obj_t* self); bool common_hal_audiobusio_pdmin_deinited(audiobusio_pdmin_obj_t* self); uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* self, uint16_t* buffer, uint32_t length); uint8_t common_hal_audiobusio_pdmin_get_bit_depth(audiobusio_pdmin_obj_t* self); -uint32_t common_hal_audiobusio_pdmin_get_frequency(audiobusio_pdmin_obj_t* self); +uint32_t common_hal_audiobusio_pdmin_get_sample_rate(audiobusio_pdmin_obj_t* self); // TODO(tannewt): Add record to file #endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_AUDIOOUT_H diff --git a/shared-bindings/audiobusio/__init__.c b/shared-bindings/audiobusio/__init__.c index bdd999b044d3f..f7e3a07668e11 100644 --- a/shared-bindings/audiobusio/__init__.c +++ b/shared-bindings/audiobusio/__init__.c @@ -31,6 +31,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/audiobusio/__init__.h" +#include "shared-bindings/audiobusio/I2SOut.h" #include "shared-bindings/audiobusio/PDMIn.h" //| :mod:`audiobusio` --- Support for audio input and output over digital bus @@ -50,6 +51,7 @@ //| .. toctree:: //| :maxdepth: 3 //| +//| I2SOut //| PDMIn //| //| All libraries change hardware state and should be deinitialized when they @@ -59,6 +61,7 @@ STATIC const mp_rom_map_elem_t audiobusio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiobusio) }, + { MP_ROM_QSTR(MP_QSTR_I2SOut), MP_ROM_PTR(&audiobusio_i2sout_type) }, { MP_ROM_QSTR(MP_QSTR_PDMIn), MP_ROM_PTR(&audiobusio_pdmin_type) }, }; diff --git a/shared-bindings/audiocore/RawSample.c b/shared-bindings/audiocore/RawSample.c new file mode 100644 index 0000000000000..96af58a4f3758 --- /dev/null +++ b/shared-bindings/audiocore/RawSample.c @@ -0,0 +1,199 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiocore +//| +//| :class:`RawSample` -- A raw audio sample buffer +//| ======================================================== +//| +//| An in-memory sound sample +//| +//| .. class:: RawSample(buffer, *, channel_count=1, sample_rate=8000) +//| +//| Create a RawSample based on the given buffer of signed values. If channel_count is more than +//| 1 then each channel's samples should alternate. In other words, for a two channel buffer, the +//| first sample will be for channel 1, the second sample will be for channel two, the third for +//| channel 1 and so on. +//| +//| :param array.array buffer: An `array.array` with samples +//| :param int channel_count: The number of channels in the buffer +//| :param int sample_rate: The desired playback sample rate +//| +//| Simple 8ksps 440 Hz sin wave:: +//| +//| import audiocore +//| import audioio +//| import board +//| import array +//| import time +//| import math +//| +//| # Generate one period of sine wav. +//| length = 8000 // 440 +//| sine_wave = array.array("h", [0] * length) +//| for i in range(length): +//| sine_wave[i] = int(math.sin(math.pi * 2 * i / 18) * (2 ** 15)) +//| +//| dac = audioio.AudioOut(board.SPEAKER) +//| sine_wave = audiocore.RawSample(sine_wave) +//| dac.play(sine_wave, loop=True) +//| time.sleep(1) +//| dac.stop() +//| +STATIC mp_obj_t audioio_rawsample_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_buffer, ARG_channel_count, ARG_sample_rate }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_channel_count, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1 } }, + { MP_QSTR_sample_rate, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 8000} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + audioio_rawsample_obj_t *self = m_new_obj(audioio_rawsample_obj_t); + self->base.type = &audioio_rawsample_type; + mp_buffer_info_t bufinfo; + if (mp_get_buffer(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ)) { + uint8_t bytes_per_sample = 1; + bool signed_samples = bufinfo.typecode == 'b' || bufinfo.typecode == 'h'; + if (bufinfo.typecode == 'h' || bufinfo.typecode == 'H') { + bytes_per_sample = 2; + } else if (bufinfo.typecode != 'b' && bufinfo.typecode != 'B' && bufinfo.typecode != BYTEARRAY_TYPECODE) { + mp_raise_ValueError(translate("sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or 'B'")); + } + common_hal_audioio_rawsample_construct(self, ((uint8_t*)bufinfo.buf), bufinfo.len, + bytes_per_sample, signed_samples, args[ARG_channel_count].u_int, + args[ARG_sample_rate].u_int); + } else { + mp_raise_TypeError(translate("buffer must be a bytes-like object")); + } + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the AudioOut and releases any hardware resources for reuse. +//| +STATIC mp_obj_t audioio_rawsample_deinit(mp_obj_t self_in) { + audioio_rawsample_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audioio_rawsample_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audioio_rawsample_deinit_obj, audioio_rawsample_deinit); + +STATIC void check_for_deinit(audioio_rawsample_obj_t *self) { + if (common_hal_audioio_rawsample_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audioio_rawsample_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audioio_rawsample_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audioio_rawsample___exit___obj, 4, 4, audioio_rawsample_obj___exit__); + +//| .. attribute:: sample_rate +//| +//| 32 bit value that dictates how quickly samples are played in Hertz (cycles per second). +//| When the sample is looped, this can change the pitch output without changing the underlying +//| sample. This will not change the sample rate of any active playback. Call ``play`` again to +//| change it. +//| +STATIC mp_obj_t audioio_rawsample_obj_get_sample_rate(mp_obj_t self_in) { + audioio_rawsample_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audioio_rawsample_get_sample_rate(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audioio_rawsample_get_sample_rate_obj, audioio_rawsample_obj_get_sample_rate); + +STATIC mp_obj_t audioio_rawsample_obj_set_sample_rate(mp_obj_t self_in, mp_obj_t sample_rate) { + audioio_rawsample_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_audioio_rawsample_set_sample_rate(self, mp_obj_get_int(sample_rate)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(audioio_rawsample_set_sample_rate_obj, audioio_rawsample_obj_set_sample_rate); + +const mp_obj_property_t audioio_rawsample_sample_rate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audioio_rawsample_get_sample_rate_obj, + (mp_obj_t)&audioio_rawsample_set_sample_rate_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t audioio_rawsample_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audioio_rawsample_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audioio_rawsample___exit___obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audioio_rawsample_sample_rate_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audioio_rawsample_locals_dict, audioio_rawsample_locals_dict_table); + +STATIC const audiosample_p_t audioio_rawsample_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_audiosample) + .sample_rate = (audiosample_sample_rate_fun)common_hal_audioio_rawsample_get_sample_rate, + .bits_per_sample = (audiosample_bits_per_sample_fun)common_hal_audioio_rawsample_get_bits_per_sample, + .channel_count = (audiosample_channel_count_fun)common_hal_audioio_rawsample_get_channel_count, + .reset_buffer = (audiosample_reset_buffer_fun)audioio_rawsample_reset_buffer, + .get_buffer = (audiosample_get_buffer_fun)audioio_rawsample_get_buffer, + .get_buffer_structure = (audiosample_get_buffer_structure_fun)audioio_rawsample_get_buffer_structure, +}; + +const mp_obj_type_t audioio_rawsample_type = { + { &mp_type_type }, + .name = MP_QSTR_RawSample, + .make_new = audioio_rawsample_make_new, + .locals_dict = (mp_obj_dict_t*)&audioio_rawsample_locals_dict, + .protocol = &audioio_rawsample_proto, +}; diff --git a/shared-bindings/audiocore/RawSample.h b/shared-bindings/audiocore/RawSample.h new file mode 100644 index 0000000000000..61f61a0662a59 --- /dev/null +++ b/shared-bindings/audiocore/RawSample.h @@ -0,0 +1,46 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_RAWSAMPLE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_RAWSAMPLE_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-module/audiocore/RawSample.h" + +extern const mp_obj_type_t audioio_rawsample_type; + +void common_hal_audioio_rawsample_construct(audioio_rawsample_obj_t* self, + uint8_t* buffer, uint32_t len, uint8_t bytes_per_sample, bool samples_signed, + uint8_t channel_count, uint32_t sample_rate); + +void common_hal_audioio_rawsample_deinit(audioio_rawsample_obj_t* self); +bool common_hal_audioio_rawsample_deinited(audioio_rawsample_obj_t* self); +uint32_t common_hal_audioio_rawsample_get_sample_rate(audioio_rawsample_obj_t* self); +uint8_t common_hal_audioio_rawsample_get_bits_per_sample(audioio_rawsample_obj_t* self); +uint8_t common_hal_audioio_rawsample_get_channel_count(audioio_rawsample_obj_t* self); +void common_hal_audioio_rawsample_set_sample_rate(audioio_rawsample_obj_t* self, uint32_t sample_rate); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_RAWSAMPLE_H diff --git a/shared-bindings/audiocore/WaveFile.c b/shared-bindings/audiocore/WaveFile.c new file mode 100644 index 0000000000000..178d2a13933a0 --- /dev/null +++ b/shared-bindings/audiocore/WaveFile.c @@ -0,0 +1,226 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/audiocore/WaveFile.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiocore +//| +//| :class:`WaveFile` -- Load a wave file for audio playback +//| ======================================================== +//| +//| A .wav file prepped for audio playback. Only mono and stereo files are supported. Samples must +//| be 8 bit unsigned or 16 bit signed. If a buffer is provided, it will be used instead of allocating +//| an internal buffer. +//| +//| .. class:: WaveFile(file[, buffer]) +//| +//| Load a .wav file for playback with `audioio.AudioOut` or `audiobusio.I2SOut`. +//| +//| :param typing.BinaryIO file: Already opened wave file +//| :param bytearray buffer: Optional pre-allocated buffer, that will be split in half and used for double-buffering of the data. If not provided, two 512 byte buffers are allocated internally. +//| +//| +//| Playing a wave file from flash:: +//| +//| import board +//| import audiocore +//| import audioio +//| import digitalio +//| +//| # Required for CircuitPlayground Express +//| speaker_enable = digitalio.DigitalInOut(board.SPEAKER_ENABLE) +//| speaker_enable.switch_to_output(value=True) +//| +//| data = open("cplay-5.1-16bit-16khz.wav", "rb") +//| wav = audiocore.WaveFile(data) +//| a = audioio.AudioOut(board.A0) +//| +//| print("playing") +//| a.play(wav) +//| while a.playing: +//| pass +//| print("stopped") +//| +STATIC mp_obj_t audioio_wavefile_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 2, false); + + audioio_wavefile_obj_t *self = m_new_obj(audioio_wavefile_obj_t); + self->base.type = &audioio_wavefile_type; + if (!MP_OBJ_IS_TYPE(args[0], &mp_type_fileio)) { + mp_raise_TypeError(translate("file must be a file opened in byte mode")); + } + uint8_t *buffer = NULL; + size_t buffer_size = 0; + if (n_args >= 2) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); + buffer = bufinfo.buf; + buffer_size = bufinfo.len; + } + common_hal_audioio_wavefile_construct(self, MP_OBJ_TO_PTR(args[0]), + buffer, buffer_size); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the WaveFile and releases all memory resources for reuse. +//| +STATIC mp_obj_t audioio_wavefile_deinit(mp_obj_t self_in) { + audioio_wavefile_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audioio_wavefile_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audioio_wavefile_deinit_obj, audioio_wavefile_deinit); + +STATIC void check_for_deinit(audioio_wavefile_obj_t *self) { + if (common_hal_audioio_wavefile_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audioio_wavefile_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audioio_wavefile_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audioio_wavefile___exit___obj, 4, 4, audioio_wavefile_obj___exit__); + +//| .. attribute:: sample_rate +//| +//| 32 bit value that dictates how quickly samples are loaded into the DAC +//| in Hertz (cycles per second). When the sample is looped, this can change +//| the pitch output without changing the underlying sample. +//| +STATIC mp_obj_t audioio_wavefile_obj_get_sample_rate(mp_obj_t self_in) { + audioio_wavefile_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audioio_wavefile_get_sample_rate(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audioio_wavefile_get_sample_rate_obj, audioio_wavefile_obj_get_sample_rate); + +STATIC mp_obj_t audioio_wavefile_obj_set_sample_rate(mp_obj_t self_in, mp_obj_t sample_rate) { + audioio_wavefile_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_audioio_wavefile_set_sample_rate(self, mp_obj_get_int(sample_rate)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(audioio_wavefile_set_sample_rate_obj, audioio_wavefile_obj_set_sample_rate); + +const mp_obj_property_t audioio_wavefile_sample_rate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audioio_wavefile_get_sample_rate_obj, + (mp_obj_t)&audioio_wavefile_set_sample_rate_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: bits_per_sample +//| +//| Bits per sample. (read only) +//| +STATIC mp_obj_t audioio_wavefile_obj_get_bits_per_sample(mp_obj_t self_in) { + audioio_wavefile_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audioio_wavefile_get_bits_per_sample(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audioio_wavefile_get_bits_per_sample_obj, audioio_wavefile_obj_get_bits_per_sample); + +const mp_obj_property_t audioio_wavefile_bits_per_sample_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audioio_wavefile_get_bits_per_sample_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: channel_count +//| +//| Number of audio channels. (read only) +//| +STATIC mp_obj_t audioio_wavefile_obj_get_channel_count(mp_obj_t self_in) { + audioio_wavefile_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audioio_wavefile_get_channel_count(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audioio_wavefile_get_channel_count_obj, audioio_wavefile_obj_get_channel_count); + +const mp_obj_property_t audioio_wavefile_channel_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audioio_wavefile_get_channel_count_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t audioio_wavefile_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audioio_wavefile_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audioio_wavefile___exit___obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audioio_wavefile_sample_rate_obj) }, + { MP_ROM_QSTR(MP_QSTR_bits_per_sample), MP_ROM_PTR(&audioio_wavefile_bits_per_sample_obj) }, + { MP_ROM_QSTR(MP_QSTR_channel_count), MP_ROM_PTR(&audioio_wavefile_channel_count_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audioio_wavefile_locals_dict, audioio_wavefile_locals_dict_table); + +STATIC const audiosample_p_t audioio_wavefile_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_audiosample) + .sample_rate = (audiosample_sample_rate_fun)common_hal_audioio_wavefile_get_sample_rate, + .bits_per_sample = (audiosample_bits_per_sample_fun)common_hal_audioio_wavefile_get_bits_per_sample, + .channel_count = (audiosample_channel_count_fun)common_hal_audioio_wavefile_get_channel_count, + .reset_buffer = (audiosample_reset_buffer_fun)audioio_wavefile_reset_buffer, + .get_buffer = (audiosample_get_buffer_fun)audioio_wavefile_get_buffer, + .get_buffer_structure = (audiosample_get_buffer_structure_fun)audioio_wavefile_get_buffer_structure, +}; + + +const mp_obj_type_t audioio_wavefile_type = { + { &mp_type_type }, + .name = MP_QSTR_WaveFile, + .make_new = audioio_wavefile_make_new, + .locals_dict = (mp_obj_dict_t*)&audioio_wavefile_locals_dict, + .protocol = &audioio_wavefile_proto, +}; diff --git a/shared-bindings/audiocore/WaveFile.h b/shared-bindings/audiocore/WaveFile.h new file mode 100644 index 0000000000000..f4a17231928b9 --- /dev/null +++ b/shared-bindings/audiocore/WaveFile.h @@ -0,0 +1,47 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_WAVEFILE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_WAVEFILE_H + +#include "py/obj.h" +#include "extmod/vfs_fat.h" + +#include "shared-module/audiocore/WaveFile.h" + +extern const mp_obj_type_t audioio_wavefile_type; + +void common_hal_audioio_wavefile_construct(audioio_wavefile_obj_t* self, + pyb_file_obj_t* file, uint8_t *buffer, size_t buffer_size); + +void common_hal_audioio_wavefile_deinit(audioio_wavefile_obj_t* self); +bool common_hal_audioio_wavefile_deinited(audioio_wavefile_obj_t* self); +uint32_t common_hal_audioio_wavefile_get_sample_rate(audioio_wavefile_obj_t* self); +void common_hal_audioio_wavefile_set_sample_rate(audioio_wavefile_obj_t* self, uint32_t sample_rate); +uint8_t common_hal_audioio_wavefile_get_bits_per_sample(audioio_wavefile_obj_t* self); +uint8_t common_hal_audioio_wavefile_get_channel_count(audioio_wavefile_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_WAVEFILE_H diff --git a/shared-bindings/audiocore/__init__.c b/shared-bindings/audiocore/__init__.c new file mode 100644 index 0000000000000..cf05112cb7481 --- /dev/null +++ b/shared-bindings/audiocore/__init__.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiocore/__init__.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/audiocore/WaveFile.h" +//#include "shared-bindings/audiomixer/Mixer.h" + +//| :mod:`audiocore` --- Support for audio samples and mixer +//| ======================================================== +//| +//| .. module:: audiocore +//| :synopsis: Support for audio samples and mixer +//| :platform: SAMD21 +//| +//| The `audiocore` module contains core classes for audio IO +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| RawSample +//| WaveFile +//| + +STATIC const mp_rom_map_elem_t audiocore_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiocore) }, + { MP_ROM_QSTR(MP_QSTR_RawSample), MP_ROM_PTR(&audioio_rawsample_type) }, + { MP_ROM_QSTR(MP_QSTR_WaveFile), MP_ROM_PTR(&audioio_wavefile_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(audiocore_module_globals, audiocore_module_globals_table); + +const mp_obj_module_t audiocore_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&audiocore_module_globals, +}; diff --git a/shared-bindings/audiocore/__init__.h b/shared-bindings/audiocore/__init__.h new file mode 100644 index 0000000000000..02437cd1356c7 --- /dev/null +++ b/shared-bindings/audiocore/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOCORE___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOCORE___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOCORE___INIT___H diff --git a/shared-bindings/audioio/AudioOut.c b/shared-bindings/audioio/AudioOut.c index 5bfd7e2a3f764..ea1efcdffb162 100644 --- a/shared-bindings/audioio/AudioOut.c +++ b/shared-bindings/audioio/AudioOut.c @@ -32,7 +32,9 @@ #include "py/runtime.h" #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/audioio/AudioOut.h" +#include "shared-bindings/audiocore/RawSample.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: audioio //| @@ -41,21 +43,19 @@ //| //| AudioOut can be used to output an analog audio signal on a given pin. //| -//| .. class:: AudioOut(pin, sample_source) +//| .. class:: AudioOut(left_channel, *, right_channel=None, quiescent_value=0x8000) //| -//| Create a AudioOut object associated with the given pin. This allows you to -//| play audio signals out on the given pin. Sample_source must be a `bytes-like object `_. +//| Create a AudioOut object associated with the given pin(s). This allows you to +//| play audio signals out on the given pin(s). //| -//| The sample itself should consist of 16 bit samples and be mono. -//| Microcontrollers with a lower output resolution will use the highest order -//| bits to output. For example, the SAMD21 has a 10 bit DAC that ignores the -//| lowest 6 bits when playing 16 bit samples. -//| -//| :param ~microcontroller.Pin pin: The pin to output to -//| :param bytes-like sample_source: The source of the sample +//| :param ~microcontroller.Pin left_channel: The pin to output the left channel to +//| :param ~microcontroller.Pin right_channel: The pin to output the right channel to +//| :param int quiescent_value: The output value when no signal is present. Samples should start +//| and end with this value to prevent audible popping. //| //| Simple 8ksps 440 Hz sin wave:: //| +//| import audiocore //| import audioio //| import board //| import array @@ -68,10 +68,11 @@ //| for i in range(length): //| sine_wave[i] = int(math.sin(math.pi * 2 * i / 18) * (2 ** 15) + 2 ** 15) //| -//| sample = audioio.AudioOut(board.SPEAKER, sine_wave) -//| sample.play(loop=True) +//| dac = audioio.AudioOut(board.SPEAKER) +//| sine_wave = audiocore.RawSample(sine_wave, sample_rate=8000) +//| dac.play(sine_wave, loop=True) //| time.sleep(1) -//| sample.stop() +//| dac.stop() //| //| Playing a wave file from flash:: //| @@ -83,41 +84,33 @@ //| speaker_enable = digitalio.DigitalInOut(board.SPEAKER_ENABLE) //| speaker_enable.switch_to_output(value=True) //| -//| f = open("cplay-5.1-16bit-16khz.wav", "rb") -// -//| a = audioio.AudioOut(board.A0, f) +//| data = open("cplay-5.1-16bit-16khz.wav", "rb") +//| wav = audiocore.WaveFile(data) +//| a = audioio.AudioOut(board.A0) //| //| print("playing") -//| a.play() +//| a.play(wav) //| while a.playing: //| pass //| print("stopped") //| -STATIC mp_obj_t audioio_audioout_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 2, 2, true); - mp_obj_t pin_obj = args[0]; - assert_pin(pin_obj, false); - const mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj); - // We explicitly don't check whether the pin is free because multiple - // AudioOuts may share it. +STATIC mp_obj_t audioio_audioout_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_left_channel, ARG_right_channel, ARG_quiescent_value }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_left_channel, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_right_channel, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_rom_obj = mp_const_none} }, + { MP_QSTR_quiescent_value, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x8000} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t *left_channel_pin = validate_obj_is_free_pin(args[ARG_left_channel].u_obj); + const mcu_pin_obj_t *right_channel_pin = validate_obj_is_free_pin_or_none(args[ARG_right_channel].u_obj); // create AudioOut object from the given pin audioio_audioout_obj_t *self = m_new_obj(audioio_audioout_obj_t); self->base.type = &audioio_audioout_type; - mp_buffer_info_t bufinfo; - if (MP_OBJ_IS_TYPE(args[1], &fatfs_type_fileio)) { - common_hal_audioio_audioout_construct_from_file(self, pin, MP_OBJ_TO_PTR(args[1])); - } else if (mp_get_buffer(args[1], &bufinfo, MP_BUFFER_READ)) { - uint8_t bytes_per_sample = 1; - if (bufinfo.typecode == 'H') { - bytes_per_sample = 2; - } else if (bufinfo.typecode != 'B' && bufinfo.typecode != BYTEARRAY_TYPECODE) { - mp_raise_ValueError("sample_source buffer must be a bytearray or array of type 'H' or 'B'"); - } - common_hal_audioio_audioout_construct_from_buffer(self, pin, ((uint16_t*)bufinfo.buf), bufinfo.len, bytes_per_sample); - } else { - mp_raise_TypeError("sample_source must be a file or bytes-like object"); - } + common_hal_audioio_audioout_construct(self, left_channel_pin, right_channel_pin, args[ARG_quiescent_value].u_int); return MP_OBJ_FROM_PTR(self); } @@ -133,6 +126,11 @@ STATIC mp_obj_t audioio_audioout_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_deinit_obj, audioio_audioout_deinit); +STATIC void check_for_deinit(audioio_audioout_obj_t *self) { + if (common_hal_audioio_audioout_deinited(self)) { + raise_deinited_error(); + } +} //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -152,34 +150,42 @@ STATIC mp_obj_t audioio_audioout_obj___exit__(size_t n_args, const mp_obj_t *arg STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audioio_audioout___exit___obj, 4, 4, audioio_audioout_obj___exit__); -//| .. method:: play(loop=False) +//| .. method:: play(sample, *, loop=False) //| //| Plays the sample once when loop=False and continuously when loop=True. //| Does not block. Use `playing` to block. //| +//| Sample must be an `audiocore.WaveFile`, `audiocore.RawSample`, or `audiomixer.Mixer`. +//| +//| The sample itself should consist of 16 bit samples. Microcontrollers with a lower output +//| resolution will use the highest order bits to output. For example, the SAMD21 has a 10 bit +//| DAC that ignores the lowest 6 bits when playing 16 bit samples. +//| STATIC mp_obj_t audioio_audioout_obj_play(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_loop }; + enum { ARG_sample, ARG_loop }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_loop, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_sample, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_loop, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, }; audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_audioio_audioout_deinited(self)); + check_for_deinit(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - common_hal_audioio_audioout_play(self, args[ARG_loop].u_bool); + mp_obj_t sample = args[ARG_sample].u_obj; + common_hal_audioio_audioout_play(self, sample, args[ARG_loop].u_bool); + return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_KW(audioio_audioout_play_obj, 1, audioio_audioout_obj_play); //| .. method:: stop() //| -//| Stops playback of this sample. If another sample is playing instead, it -//| won't be stopped. +//| Stops playback and resets to the start of the sample. //| STATIC mp_obj_t audioio_audioout_obj_stop(mp_obj_t self_in) { audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_audioio_audioout_deinited(self)); + check_for_deinit(self); common_hal_audioio_audioout_stop(self); return mp_const_none; } @@ -187,11 +193,11 @@ MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_stop_obj, audioio_audioout_obj_stop); //| .. attribute:: playing //| -//| True when the audio sample is being output. (read-only) +//| True when an audio sample is being output even if `paused`. (read-only) //| STATIC mp_obj_t audioio_audioout_obj_get_playing(mp_obj_t self_in) { audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_audioio_audioout_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(common_hal_audioio_audioout_get_playing(self)); } MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_get_playing_obj, audioio_audioout_obj_get_playing); @@ -203,31 +209,53 @@ const mp_obj_property_t audioio_audioout_playing_obj = { (mp_obj_t)&mp_const_none_obj}, }; -//| .. attribute:: frequency +//| .. method:: pause() //| -//| 32 bit value that dictates how quickly samples are loaded into the DAC -//| in Hertz (cycles per second). When the sample is looped, this can change -//| the pitch output without changing the underlying sample. +//| Stops playback temporarily while remembering the position. Use `resume` to resume playback. //| -STATIC mp_obj_t audioio_audioout_obj_get_frequency(mp_obj_t self_in) { +STATIC mp_obj_t audioio_audioout_obj_pause(mp_obj_t self_in) { audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_audioio_audioout_deinited(self)); - return MP_OBJ_NEW_SMALL_INT(common_hal_audioio_audioout_get_frequency(self)); + check_for_deinit(self); + + if (!common_hal_audioio_audioout_get_playing(self)) { + mp_raise_RuntimeError(translate("Not playing")); + } + common_hal_audioio_audioout_pause(self); + return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_get_frequency_obj, audioio_audioout_obj_get_frequency); +MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_pause_obj, audioio_audioout_obj_pause); -STATIC mp_obj_t audioio_audioout_obj_set_frequency(mp_obj_t self_in, mp_obj_t frequency) { +//| .. method:: resume() +//| +//| Resumes sample playback after :py:func:`pause`. +//| +STATIC mp_obj_t audioio_audioout_obj_resume(mp_obj_t self_in) { audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_audioio_audioout_deinited(self)); - common_hal_audioio_audioout_set_frequency(self, mp_obj_get_int(frequency)); + check_for_deinit(self); + + if (common_hal_audioio_audioout_get_paused(self)) { + common_hal_audioio_audioout_resume(self); + } + return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_2(audioio_audioout_set_frequency_obj, audioio_audioout_obj_set_frequency); +MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_resume_obj, audioio_audioout_obj_resume); -const mp_obj_property_t audioio_audioout_frequency_obj = { +//| .. attribute:: paused +//| +//| True when playback is paused. (read-only) +//| +STATIC mp_obj_t audioio_audioout_obj_get_paused(mp_obj_t self_in) { + audioio_audioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audioio_audioout_get_paused(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audioio_audioout_get_paused_obj, audioio_audioout_obj_get_paused); + +const mp_obj_property_t audioio_audioout_paused_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&audioio_audioout_get_frequency_obj, - (mp_obj_t)&audioio_audioout_set_frequency_obj, + .proxy = {(mp_obj_t)&audioio_audioout_get_paused_obj, + (mp_obj_t)&mp_const_none_obj, (mp_obj_t)&mp_const_none_obj}, }; @@ -238,10 +266,12 @@ STATIC const mp_rom_map_elem_t audioio_audioout_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audioio_audioout___exit___obj) }, { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&audioio_audioout_play_obj) }, { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&audioio_audioout_stop_obj) }, + { MP_ROM_QSTR(MP_QSTR_pause), MP_ROM_PTR(&audioio_audioout_pause_obj) }, + { MP_ROM_QSTR(MP_QSTR_resume), MP_ROM_PTR(&audioio_audioout_resume_obj) }, // Properties { MP_ROM_QSTR(MP_QSTR_playing), MP_ROM_PTR(&audioio_audioout_playing_obj) }, - { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&audioio_audioout_frequency_obj) }, + { MP_ROM_QSTR(MP_QSTR_paused), MP_ROM_PTR(&audioio_audioout_paused_obj) }, }; STATIC MP_DEFINE_CONST_DICT(audioio_audioout_locals_dict, audioio_audioout_locals_dict_table); diff --git a/shared-bindings/audioio/AudioOut.h b/shared-bindings/audioio/AudioOut.h index befd4d35e62a6..1076ac5ccc1ae 100644 --- a/shared-bindings/audioio/AudioOut.h +++ b/shared-bindings/audioio/AudioOut.h @@ -29,21 +29,21 @@ #include "common-hal/audioio/AudioOut.h" #include "common-hal/microcontroller/Pin.h" -#include "extmod/vfs_fat_file.h" +#include "shared-bindings/audiocore/RawSample.h" extern const mp_obj_type_t audioio_audioout_type; -void common_hal_audioio_audioout_construct_from_buffer(audioio_audioout_obj_t* self, - const mcu_pin_obj_t* pin, uint16_t* buffer, uint32_t len, uint8_t bytes_per_sample); -void common_hal_audioio_audioout_construct_from_file(audioio_audioout_obj_t* self, - const mcu_pin_obj_t* pin, pyb_file_obj_t* file); +// left_channel will always be non-NULL but right_channel may be for mono output. +void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, + const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t default_value); void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self); bool common_hal_audioio_audioout_deinited(audioio_audioout_obj_t* self); -void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, bool loop); +void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, mp_obj_t sample, bool loop); void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self); bool common_hal_audioio_audioout_get_playing(audioio_audioout_obj_t* self); -uint32_t common_hal_audioio_audioout_get_frequency(audioio_audioout_obj_t* self); -void common_hal_audioio_audioout_set_frequency(audioio_audioout_obj_t* self, uint32_t frequency); +void common_hal_audioio_audioout_pause(audioio_audioout_obj_t* self); +void common_hal_audioio_audioout_resume(audioio_audioout_obj_t* self); +bool common_hal_audioio_audioout_get_paused(audioio_audioout_obj_t* self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_AUDIOOUT_H diff --git a/shared-bindings/audioio/__init__.c b/shared-bindings/audioio/__init__.c index 07305a45af8b4..02a5fe1eee39c 100644 --- a/shared-bindings/audioio/__init__.c +++ b/shared-bindings/audioio/__init__.c @@ -33,6 +33,15 @@ #include "shared-bindings/audioio/__init__.h" #include "shared-bindings/audioio/AudioOut.h" +#if CIRCUITPY_AUDIOIO_COMPAT +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/audiocore/WaveFile.h" +#endif +#if CIRCUITPY_AUDIOMIXER +#include "shared-bindings/audiomixer/Mixer.h" +#endif + //| :mod:`audioio` --- Support for audio input and output //| ====================================================== //| @@ -54,10 +63,24 @@ //| call :py:meth:`!deinit` or use a context manager. See //| :ref:`lifetime-and-contextmanagers` for more info. //| +//| Since CircuitPython 5, `RawSample` and `WaveFile` are moved +//| to :mod:`audiocore`, and `Mixer` is moved to :mod:`audiomixer`. +//| +//| For compatibility with CircuitPython 4.x, some builds allow the items in +//| `audiocore` to be imported from `audioio`. This will be removed for all +//| boards in a future build of CircuitPython. +//| STATIC const mp_rom_map_elem_t audioio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audioio) }, { MP_ROM_QSTR(MP_QSTR_AudioOut), MP_ROM_PTR(&audioio_audioout_type) }, +#if CIRCUITPY_AUDIOIO_COMPAT + #if CIRCUITPY_AUDIOMIXER + { MP_ROM_QSTR(MP_QSTR_Mixer), MP_ROM_PTR(&audiomixer_mixer_type) }, + #endif + { MP_ROM_QSTR(MP_QSTR_RawSample), MP_ROM_PTR(&audioio_rawsample_type) }, + { MP_ROM_QSTR(MP_QSTR_WaveFile), MP_ROM_PTR(&audioio_wavefile_type) }, +#endif }; STATIC MP_DEFINE_CONST_DICT(audioio_module_globals, audioio_module_globals_table); diff --git a/shared-bindings/audiomixer/Mixer.c b/shared-bindings/audiomixer/Mixer.c new file mode 100644 index 0000000000000..03ffb9373bec5 --- /dev/null +++ b/shared-bindings/audiomixer/Mixer.c @@ -0,0 +1,310 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-bindings/audiomixer/MixerVoice.h" +#include "shared-module/audiomixer/MixerVoice.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiomixer +//| +//| :class:`Mixer` -- Mixes one or more audio samples together +//| =========================================================== +//| +//| Mixer mixes multiple samples into one sample. +//| +//| .. class:: Mixer(voice_count=2, buffer_size=1024, channel_count=2, bits_per_sample=16, samples_signed=True, sample_rate=8000) +//| +//| Create a Mixer object that can mix multiple channels with the same sample rate. +//| Samples are accessed and controlled with the mixer's `audiomixer.MixerVoice` objects. +//| +//| :param int voice_count: The maximum number of voices to mix +//| :param int buffer_size: The total size in bytes of the buffers to mix into +//| :param int channel_count: The number of channels the source samples contain. 1 = mono; 2 = stereo. +//| :param int bits_per_sample: The bits per sample of the samples being played +//| :param bool samples_signed: Samples are signed (True) or unsigned (False) +//| :param int sample_rate: The sample rate to be used for all samples +//| +//| Playing a wave file from flash:: +//| +//| import board +//| import audioio +//| import audiocore +//| import audiomixer +//| import digitalio +//| +//| a = audioio.AudioOut(board.A0) +//| music = audiocore.WaveFile(open("cplay-5.1-16bit-16khz.wav", "rb")) +//| drum = audiocore.WaveFile(open("drum.wav", "rb")) +//| mixer = audiomixer.Mixer(voice_count=2, sample_rate=16000, channel_count=1, +//| bits_per_sample=16, samples_signed=True) +//| +//| print("playing") +//| # Have AudioOut play our Mixer source +//| a.play(mixer) +//| # Play the first sample voice +//| mixer.voice[0].play(music) +//| while mixer.playing: +//| # Play the second sample voice +//| mixer.voice[1].play(drum) +//| time.sleep(1) +//| print("stopped") +//| +STATIC mp_obj_t audiomixer_mixer_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_voice_count, ARG_buffer_size, ARG_channel_count, ARG_bits_per_sample, ARG_samples_signed, ARG_sample_rate }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_voice_count, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 2} }, + { MP_QSTR_buffer_size, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1024} }, + { MP_QSTR_channel_count, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 2} }, + { MP_QSTR_bits_per_sample, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 16} }, + { MP_QSTR_samples_signed, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + { MP_QSTR_sample_rate, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 8000} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t voice_count = args[ARG_voice_count].u_int; + if (voice_count < 1 || voice_count > 255) { + mp_raise_ValueError(translate("Invalid voice count")); + } + + mp_int_t channel_count = args[ARG_channel_count].u_int; + if (channel_count < 1 || channel_count > 2) { + mp_raise_ValueError(translate("Invalid channel count")); + } + mp_int_t sample_rate = args[ARG_sample_rate].u_int; + if (sample_rate < 1) { + mp_raise_ValueError(translate("Sample rate must be positive")); + } + mp_int_t bits_per_sample = args[ARG_bits_per_sample].u_int; + if (bits_per_sample != 8 && bits_per_sample != 16) { + mp_raise_ValueError(translate("bits_per_sample must be 8 or 16")); + } + audiomixer_mixer_obj_t *self = m_new_obj_var(audiomixer_mixer_obj_t, mp_obj_t, voice_count); + self->base.type = &audiomixer_mixer_type; + common_hal_audiomixer_mixer_construct(self, voice_count, args[ARG_buffer_size].u_int, bits_per_sample, args[ARG_samples_signed].u_bool, channel_count, sample_rate); + + for(int v=0; vvoice[v] = audiomixer_mixervoice_type.make_new(&audiomixer_mixervoice_type, 0, 0, NULL); + common_hal_audiomixer_mixervoice_set_parent(self->voice[v], self); + } + self->voice_tuple = mp_obj_new_tuple(self->voice_count, self->voice); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the Mixer and releases any hardware resources for reuse. +//| +STATIC mp_obj_t audiomixer_mixer_deinit(mp_obj_t self_in) { + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audiomixer_mixer_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixer_deinit_obj, audiomixer_mixer_deinit); + +STATIC void check_for_deinit(audiomixer_mixer_obj_t *self) { + if (common_hal_audiomixer_mixer_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audiomixer_mixer_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audiomixer_mixer_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiomixer_mixer___exit___obj, 4, 4, audiomixer_mixer_obj___exit__); + +//| .. attribute:: playing +//| +//| True when any voice is being output. (read-only) +//| +STATIC mp_obj_t audiomixer_mixer_obj_get_playing(mp_obj_t self_in) { + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audiomixer_mixer_get_playing(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixer_get_playing_obj, audiomixer_mixer_obj_get_playing); + +const mp_obj_property_t audiomixer_mixer_playing_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomixer_mixer_get_playing_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: sample_rate +//| +//| 32 bit value that dictates how quickly samples are played in Hertz (cycles per second). +//| +STATIC mp_obj_t audiomixer_mixer_obj_get_sample_rate(mp_obj_t self_in) { + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audiomixer_mixer_get_sample_rate(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixer_get_sample_rate_obj, audiomixer_mixer_obj_get_sample_rate); + +const mp_obj_property_t audiomixer_mixer_sample_rate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomixer_mixer_get_sample_rate_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: voice +//| +//| A tuple of the mixer's `audiomixer.MixerVoice` object(s). +//| +//| .. code-block:: python +//| +//| >>> mixer.voice +//| (,) +STATIC mp_obj_t audiomixer_mixer_obj_get_voice(mp_obj_t self_in) { + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return self->voice_tuple; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixer_get_voice_obj, audiomixer_mixer_obj_get_voice); + +const mp_obj_property_t audiomixer_mixer_voice_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomixer_mixer_get_voice_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: play(sample, *, voice=0, loop=False) +//| +//| Plays the sample once when loop=False and continuously when loop=True. +//| Does not block. Use `playing` to block. +//| +//| Sample must be an `audiocore.WaveFile`, `audiocore.RawSample`, or `audiomixer.Mixer`. +//| +//| The sample must match the Mixer's encoding settings given in the constructor. +//| +STATIC mp_obj_t audiomixer_mixer_obj_play(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_sample, ARG_voice, ARG_loop }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_sample, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_voice, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_loop, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + uint8_t v = args[ARG_voice].u_int; + if (v > (self->voice_count - 1)) { + mp_raise_ValueError(translate("Invalid voice")); + } + audiomixer_mixervoice_obj_t *voice = MP_OBJ_TO_PTR(self->voice[v]); + mp_obj_t sample = args[ARG_sample].u_obj; + common_hal_audiomixer_mixervoice_play(voice, sample, args[ARG_loop].u_bool); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiomixer_mixer_play_obj, 1, audiomixer_mixer_obj_play); + +//| .. method:: stop_voice(voice=0) +//| +//| Stops playback of the sample on the given voice. +//| +STATIC mp_obj_t audiomixer_mixer_obj_stop_voice(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_voice }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_voice, MP_ARG_INT, {.u_int = 0} }, + }; + audiomixer_mixer_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + uint8_t v = args[ARG_voice].u_int; + if (v > (self->voice_count - 1)) { + mp_raise_ValueError(translate("Invalid voice")); + } + audiomixer_mixervoice_obj_t *voice = MP_OBJ_TO_PTR(self->voice[v]); + common_hal_audiomixer_mixervoice_stop(voice); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiomixer_mixer_stop_voice_obj, 1, audiomixer_mixer_obj_stop_voice); + + +STATIC const mp_rom_map_elem_t audiomixer_mixer_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audiomixer_mixer_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiomixer_mixer___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&audiomixer_mixer_play_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_voice), MP_ROM_PTR(&audiomixer_mixer_stop_voice_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_playing), MP_ROM_PTR(&audiomixer_mixer_playing_obj) }, + { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audiomixer_mixer_sample_rate_obj) }, + { MP_ROM_QSTR(MP_QSTR_voice), MP_ROM_PTR(&audiomixer_mixer_voice_obj) } +}; +STATIC MP_DEFINE_CONST_DICT(audiomixer_mixer_locals_dict, audiomixer_mixer_locals_dict_table); + +STATIC const audiosample_p_t audiomixer_mixer_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_audiosample) + .sample_rate = (audiosample_sample_rate_fun)common_hal_audiomixer_mixer_get_sample_rate, + .bits_per_sample = (audiosample_bits_per_sample_fun)common_hal_audiomixer_mixer_get_bits_per_sample, + .channel_count = (audiosample_channel_count_fun)common_hal_audiomixer_mixer_get_channel_count, + .reset_buffer = (audiosample_reset_buffer_fun)audiomixer_mixer_reset_buffer, + .get_buffer = (audiosample_get_buffer_fun)audiomixer_mixer_get_buffer, + .get_buffer_structure = (audiosample_get_buffer_structure_fun)audiomixer_mixer_get_buffer_structure, +}; + +const mp_obj_type_t audiomixer_mixer_type = { + { &mp_type_type }, + .name = MP_QSTR_Mixer, + .make_new = audiomixer_mixer_make_new, + .locals_dict = (mp_obj_dict_t*)&audiomixer_mixer_locals_dict, + .protocol = &audiomixer_mixer_proto, +}; diff --git a/shared-bindings/audiomixer/Mixer.h b/shared-bindings/audiomixer/Mixer.h new file mode 100644 index 0000000000000..a99e1bf62a904 --- /dev/null +++ b/shared-bindings/audiomixer/Mixer.h @@ -0,0 +1,53 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER_MIXER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER_MIXER_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-module/audiomixer/Mixer.h" +#include "shared-bindings/audiocore/RawSample.h" + +extern const mp_obj_type_t audiomixer_mixer_type; +extern const mp_obj_type_t audiomixer_mixervoice_type; + +void common_hal_audiomixer_mixer_construct(audiomixer_mixer_obj_t* self, + uint8_t voice_count, + uint32_t buffer_size, + uint8_t bits_per_sample, + bool samples_signed, + uint8_t channel_count, + uint32_t sample_rate); + +void common_hal_audiomixer_mixer_deinit(audiomixer_mixer_obj_t* self); +bool common_hal_audiomixer_mixer_deinited(audiomixer_mixer_obj_t* self); + +bool common_hal_audiomixer_mixer_get_playing(audiomixer_mixer_obj_t* self); +uint32_t common_hal_audiomixer_mixer_get_sample_rate(audiomixer_mixer_obj_t* self); +uint8_t common_hal_audiomixer_mixer_get_channel_count(audiomixer_mixer_obj_t* self); +uint8_t common_hal_audiomixer_mixer_get_bits_per_sample(audiomixer_mixer_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER_MIXER_H diff --git a/shared-bindings/audiomixer/MixerVoice.c b/shared-bindings/audiomixer/MixerVoice.c new file mode 100644 index 0000000000000..188f76f579d0e --- /dev/null +++ b/shared-bindings/audiomixer/MixerVoice.c @@ -0,0 +1,178 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 DeanM for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-bindings/audiomixer/MixerVoice.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiomixer +//| +//| :class:`MixerVoice` -- Voice objects used with Mixer +//| ===================================================== +//| +//| Used to access and control samples with `audiomixer.Mixer`. +//| +//| .. class:: MixerVoice() +//| +//| MixerVoice instance object(s) created by `audiomixer.Mixer`. +//| +// TODO: support mono or stereo voices +STATIC mp_obj_t audiomixer_mixervoice_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + audiomixer_mixervoice_obj_t *self = m_new_obj(audiomixer_mixervoice_obj_t); + self->base.type = &audiomixer_mixervoice_type; + + common_hal_audiomixer_mixervoice_construct(self); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: play(sample, *, loop=False) +//| +//| Plays the sample once when ``loop=False``, and continuously when ``loop=True``. +//| Does not block. Use `playing` to block. +//| +//| Sample must be an `audiocore.WaveFile`, `audiomixer.Mixer` or `audiocore.RawSample`. +//| +//| The sample must match the `audiomixer.Mixer`'s encoding settings given in the constructor. +//| +STATIC mp_obj_t audiomixer_mixervoice_obj_play(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_sample, ARG_loop }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_sample, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_loop, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + audiomixer_mixervoice_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t sample = args[ARG_sample].u_obj; + common_hal_audiomixer_mixervoice_play(self, sample, args[ARG_loop].u_bool); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiomixer_mixervoice_play_obj, 1, audiomixer_mixervoice_obj_play); + +//| .. method:: stop() +//| +//| Stops playback of the sample on this voice. +//| +STATIC mp_obj_t audiomixer_mixervoice_obj_stop(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_voice }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_voice, MP_ARG_INT, {.u_int = 0} }, + }; + audiomixer_mixervoice_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + common_hal_audiomixer_mixervoice_stop(self); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiomixer_mixervoice_stop_obj, 1, audiomixer_mixervoice_obj_stop); + +//| .. attribute:: level() +//| +//| The volume level of a voice, as a floating point number between 0 and 1. +//| +STATIC mp_obj_t audiomixer_mixervoice_obj_get_level(mp_obj_t self_in) { + return mp_obj_new_float(common_hal_audiomixer_mixervoice_get_level(self_in)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixervoice_get_level_obj, audiomixer_mixervoice_obj_get_level); + +STATIC mp_obj_t audiomixer_mixervoice_obj_set_level(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_level }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_level, MP_ARG_OBJ | MP_ARG_REQUIRED }, + }; + audiomixer_mixervoice_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + float level = mp_obj_get_float(args[ARG_level].u_obj); + + if (level > 1 || level < 0) { + mp_raise_ValueError(translate("level must be between 0 and 1")); + } + + common_hal_audiomixer_mixervoice_set_level(self, level); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiomixer_mixervoice_set_level_obj, 1, audiomixer_mixervoice_obj_set_level); + +const mp_obj_property_t audiomixer_mixervoice_level_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomixer_mixervoice_get_level_obj, + (mp_obj_t)&audiomixer_mixervoice_set_level_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: playing +//| +//| True when this voice is being output. (read-only) +//| + +STATIC mp_obj_t audiomixer_mixervoice_obj_get_playing(mp_obj_t self_in) { + audiomixer_mixervoice_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_audiomixer_mixervoice_get_playing(self)); + +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomixer_mixervoice_get_playing_obj, audiomixer_mixervoice_obj_get_playing); + +const mp_obj_property_t audiomixer_mixervoice_playing_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomixer_mixervoice_get_playing_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t audiomixer_mixervoice_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&audiomixer_mixervoice_play_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&audiomixer_mixervoice_stop_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_playing), MP_ROM_PTR(&audiomixer_mixervoice_playing_obj) }, + { MP_ROM_QSTR(MP_QSTR_level), MP_ROM_PTR(&audiomixer_mixervoice_level_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audiomixer_mixervoice_locals_dict, audiomixer_mixervoice_locals_dict_table); + +const mp_obj_type_t audiomixer_mixervoice_type = { + { &mp_type_type }, + .name = MP_QSTR_MixerVoice, + .make_new = audiomixer_mixervoice_make_new, + .locals_dict = (mp_obj_dict_t*)&audiomixer_mixervoice_locals_dict, +}; diff --git a/shared-bindings/audiomixer/MixerVoice.h b/shared-bindings/audiomixer/MixerVoice.h new file mode 100644 index 0000000000000..83098bc9dd17b --- /dev/null +++ b/shared-bindings/audiomixer/MixerVoice.h @@ -0,0 +1,47 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 DeanM for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef SHARED_BINDINGS_AUDIOMIXER_MIXERVOICE_H_ +#define SHARED_BINDINGS_AUDIOMIXER_MIXERVOICE_H_ + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/audiocore/RawSample.h" + +#include "shared-module/audiomixer/MixerVoice.h" +#include "shared-module/audiomixer/Mixer.h" + +extern const mp_obj_type_t audiomixer_mixer_type; +extern const mp_obj_type_t audiomixer_mixervoice_type; + +void common_hal_audiomixer_mixervoice_construct(audiomixer_mixervoice_obj_t *self); +void common_hal_audiomixer_mixervoice_set_parent(audiomixer_mixervoice_obj_t* self, audiomixer_mixer_obj_t *parent); +void common_hal_audiomixer_mixervoice_play(audiomixer_mixervoice_obj_t* self, mp_obj_t sample, bool loop); +void common_hal_audiomixer_mixervoice_stop(audiomixer_mixervoice_obj_t* self); +float common_hal_audiomixer_mixervoice_get_level(audiomixer_mixervoice_obj_t* self); +void common_hal_audiomixer_mixervoice_set_level(audiomixer_mixervoice_obj_t* self, float gain); + +bool common_hal_audiomixer_mixervoice_get_playing(audiomixer_mixervoice_obj_t* self); + +#endif /* SHARED_BINDINGS_AUDIOMIXER_MIXERVOICE_H_ */ diff --git a/shared-bindings/audiomixer/__init__.c b/shared-bindings/audiomixer/__init__.c new file mode 100644 index 0000000000000..79bab440e5467 --- /dev/null +++ b/shared-bindings/audiomixer/__init__.c @@ -0,0 +1,62 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiomixer/Mixer.h" + +//| :mod:`audiomixer` --- Support for audio mixer +//| ======================================================== +//| +//| .. module:: audiomixer +//| :synopsis: Support for audio mixer +//| +//| The `audiomixer` module contains core classes for mixing audio sources +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Mixer +//| MixerVoice +//| + +STATIC const mp_rom_map_elem_t audiomixer_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiomixer) }, + { MP_ROM_QSTR(MP_QSTR_Mixer), MP_ROM_PTR(&audiomixer_mixer_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(audiomixer_module_globals, audiomixer_module_globals_table); + +const mp_obj_module_t audiomixer_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&audiomixer_module_globals, +}; diff --git a/shared-bindings/audiomixer/__init__.h b/shared-bindings/audiomixer/__init__.h new file mode 100644 index 0000000000000..35a90441c467b --- /dev/null +++ b/shared-bindings/audiomixer/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMIXER___INIT___H diff --git a/shared-bindings/audiomp3/MP3Decoder.c b/shared-bindings/audiomp3/MP3Decoder.c new file mode 100644 index 0000000000000..2240422127d1f --- /dev/null +++ b/shared-bindings/audiomp3/MP3Decoder.c @@ -0,0 +1,275 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/audiomp3/MP3Decoder.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiomp3 +//| +//| :class:`MP3Decoder` -- Load a mp3 file for audio playback +//| ========================================================= +//| +//| An object that decodes MP3 files for playback on an audio device. +//| +//| .. class:: MP3(file[, buffer]) +//| +//| Load a .mp3 file for playback with `audioio.AudioOut` or `audiobusio.I2SOut`. +//| +//| :param typing.BinaryIO file: Already opened mp3 file +//| :param bytearray buffer: Optional pre-allocated buffer, that will be split in half and used for double-buffering of the data. If not provided, two buffers are allocated internally. The specific buffer size required depends on the mp3 file. +//| +//| +//| Playing a mp3 file from flash:: +//| +//| import board +//| import audiomp3 +//| import audioio +//| import digitalio +//| +//| # Required for CircuitPlayground Express +//| speaker_enable = digitalio.DigitalInOut(board.SPEAKER_ENABLE) +//| speaker_enable.switch_to_output(value=True) +//| +//| data = open("cplay-16bit-16khz-64kbps.mp3", "rb") +//| mp3 = audiomp3.MP3Decoder(data) +//| a = audioio.AudioOut(board.A0) +//| +//| print("playing") +//| a.play(mp3) +//| while a.playing: +//| pass +//| print("stopped") +//| +STATIC mp_obj_t audiomp3_mp3file_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 2, false); + + audiomp3_mp3file_obj_t *self = m_new_obj(audiomp3_mp3file_obj_t); + self->base.type = &audiomp3_mp3file_type; + if (!MP_OBJ_IS_TYPE(args[0], &mp_type_fileio)) { + mp_raise_TypeError(translate("file must be a file opened in byte mode")); + } + uint8_t *buffer = NULL; + size_t buffer_size = 0; + if (n_args >= 2) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); + buffer = bufinfo.buf; + buffer_size = bufinfo.len; + } + common_hal_audiomp3_mp3file_construct(self, MP_OBJ_TO_PTR(args[0]), + buffer, buffer_size); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the MP3 and releases all memory resources for reuse. +//| +STATIC mp_obj_t audiomp3_mp3file_deinit(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audiomp3_mp3file_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_deinit_obj, audiomp3_mp3file_deinit); + +STATIC void check_for_deinit(audiomp3_mp3file_obj_t *self) { + if (common_hal_audiomp3_mp3file_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audiomp3_mp3file_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audiomp3_mp3file_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiomp3_mp3file___exit___obj, 4, 4, audiomp3_mp3file_obj___exit__); + +//| .. attribute:: file +//| +//| File to play back. +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_file(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return self->file; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_file_obj, audiomp3_mp3file_obj_get_file); + +STATIC mp_obj_t audiomp3_mp3file_obj_set_file(mp_obj_t self_in, mp_obj_t file) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + if (!MP_OBJ_IS_TYPE(file, &mp_type_fileio)) { + mp_raise_TypeError(translate("file must be a file opened in byte mode")); + } + common_hal_audiomp3_mp3file_set_file(self, file); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(audiomp3_mp3file_set_file_obj, audiomp3_mp3file_obj_set_file); + +const mp_obj_property_t audiomp3_mp3file_file_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_file_obj, + (mp_obj_t)&audiomp3_mp3file_set_file_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + + +//| .. attribute:: sample_rate +//| +//| 32 bit value that dictates how quickly samples are loaded into the DAC +//| in Hertz (cycles per second). When the sample is looped, this can change +//| the pitch output without changing the underlying sample. +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_sample_rate(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audiomp3_mp3file_get_sample_rate(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_sample_rate_obj, audiomp3_mp3file_obj_get_sample_rate); + +STATIC mp_obj_t audiomp3_mp3file_obj_set_sample_rate(mp_obj_t self_in, mp_obj_t sample_rate) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_audiomp3_mp3file_set_sample_rate(self, mp_obj_get_int(sample_rate)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(audiomp3_mp3file_set_sample_rate_obj, audiomp3_mp3file_obj_set_sample_rate); + +const mp_obj_property_t audiomp3_mp3file_sample_rate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_sample_rate_obj, + (mp_obj_t)&audiomp3_mp3file_set_sample_rate_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: bits_per_sample +//| +//| Bits per sample. (read only) +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_bits_per_sample(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audiomp3_mp3file_get_bits_per_sample(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_bits_per_sample_obj, audiomp3_mp3file_obj_get_bits_per_sample); + +const mp_obj_property_t audiomp3_mp3file_bits_per_sample_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_bits_per_sample_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: channel_count +//| +//| Number of audio channels. (read only) +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_channel_count(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_audiomp3_mp3file_get_channel_count(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_channel_count_obj, audiomp3_mp3file_obj_get_channel_count); + +const mp_obj_property_t audiomp3_mp3file_channel_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_channel_count_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: rms_level +//| +//| The RMS audio level of a recently played moment of audio. (read only) +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_rms_level(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_audiomp3_mp3file_get_rms_level(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_rms_level_obj, audiomp3_mp3file_obj_get_rms_level); + +const mp_obj_property_t audiomp3_mp3file_rms_level_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_rms_level_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t audiomp3_mp3file_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audiomp3_mp3file_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiomp3_mp3file___exit___obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_file), MP_ROM_PTR(&audiomp3_mp3file_file_obj) }, + { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audiomp3_mp3file_sample_rate_obj) }, + { MP_ROM_QSTR(MP_QSTR_bits_per_sample), MP_ROM_PTR(&audiomp3_mp3file_bits_per_sample_obj) }, + { MP_ROM_QSTR(MP_QSTR_channel_count), MP_ROM_PTR(&audiomp3_mp3file_channel_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_rms_level), MP_ROM_PTR(&audiomp3_mp3file_rms_level_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audiomp3_mp3file_locals_dict, audiomp3_mp3file_locals_dict_table); + +STATIC const audiosample_p_t audiomp3_mp3file_proto = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_audiosample) + .sample_rate = (audiosample_sample_rate_fun)common_hal_audiomp3_mp3file_get_sample_rate, + .bits_per_sample = (audiosample_bits_per_sample_fun)common_hal_audiomp3_mp3file_get_bits_per_sample, + .channel_count = (audiosample_channel_count_fun)common_hal_audiomp3_mp3file_get_channel_count, + .reset_buffer = (audiosample_reset_buffer_fun)audiomp3_mp3file_reset_buffer, + .get_buffer = (audiosample_get_buffer_fun)audiomp3_mp3file_get_buffer, + .get_buffer_structure = (audiosample_get_buffer_structure_fun)audiomp3_mp3file_get_buffer_structure, +}; + +const mp_obj_type_t audiomp3_mp3file_type = { + { &mp_type_type }, + .name = MP_QSTR_MP3Decoder, + .make_new = audiomp3_mp3file_make_new, + .locals_dict = (mp_obj_dict_t*)&audiomp3_mp3file_locals_dict, + .protocol = &audiomp3_mp3file_proto, +}; diff --git a/shared-bindings/audiomp3/MP3Decoder.h b/shared-bindings/audiomp3/MP3Decoder.h new file mode 100644 index 0000000000000..36d525e938106 --- /dev/null +++ b/shared-bindings/audiomp3/MP3Decoder.h @@ -0,0 +1,50 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_MP3FILE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_MP3FILE_H + +#include "py/obj.h" +#include "extmod/vfs_fat.h" + +#include "shared-module/audiomp3/MP3Decoder.h" + +extern const mp_obj_type_t audiomp3_mp3file_type; + +void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, + pyb_file_obj_t* file, uint8_t *buffer, size_t buffer_size); + +void common_hal_audiomp3_mp3file_set_file(audiomp3_mp3file_obj_t* self, pyb_file_obj_t* file); +void common_hal_audiomp3_mp3file_deinit(audiomp3_mp3file_obj_t* self); +bool common_hal_audiomp3_mp3file_deinited(audiomp3_mp3file_obj_t* self); +uint32_t common_hal_audiomp3_mp3file_get_sample_rate(audiomp3_mp3file_obj_t* self); +void common_hal_audiomp3_mp3file_set_sample_rate(audiomp3_mp3file_obj_t* self, uint32_t sample_rate); +uint8_t common_hal_audiomp3_mp3file_get_bits_per_sample(audiomp3_mp3file_obj_t* self); +uint8_t common_hal_audiomp3_mp3file_get_channel_count(audiomp3_mp3file_obj_t* self); +float common_hal_audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_MP3FILE_H diff --git a/shared-bindings/audiomp3/__init__.c b/shared-bindings/audiomp3/__init__.c new file mode 100644 index 0000000000000..fb2187669cd36 --- /dev/null +++ b/shared-bindings/audiomp3/__init__.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/audiomp3/MP3Decoder.h" + +//| :mod:`audiomp3` --- Support for MP3-compressed audio files +//| ========================================================== +//| +//| .. module:: audiomp3 +//| :synopsis: Support for mp3 files +//| +//| The `audiomp3` module contains an mp3 decoder +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| MP3Decoder +//| + +STATIC const mp_rom_map_elem_t audiomp3_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiomp3) }, + { MP_ROM_QSTR(MP_QSTR_MP3Decoder), MP_ROM_PTR(&audiomp3_mp3file_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(audiomp3_module_globals, audiomp3_module_globals_table); + +const mp_obj_module_t audiomp3_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&audiomp3_module_globals, +}; diff --git a/shared-bindings/audiomp3/__init__.h b/shared-bindings/audiomp3/__init__.h new file mode 100644 index 0000000000000..9026af636892b --- /dev/null +++ b/shared-bindings/audiomp3/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMP3___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMP3___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOMP3___INIT___H diff --git a/shared-bindings/audiopwmio/PWMAudioOut.c b/shared-bindings/audiopwmio/PWMAudioOut.c new file mode 100644 index 0000000000000..9fa2b1578e301 --- /dev/null +++ b/shared-bindings/audiopwmio/PWMAudioOut.c @@ -0,0 +1,286 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiopwmio/PWMAudioOut.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: audiopwmio +//| +//| :class:`PWMAudioOut` -- Output an analog audio signal +//| ======================================================== +//| +//| AudioOut can be used to output an analog audio signal on a given pin. +//| +//| .. class:: PWMAudioOut(left_channel, *, right_channel=None, quiescent_value=0x8000) +//| +//| Create a PWMAudioOut object associated with the given pin(s). This allows you to +//| play audio signals out on the given pin(s). In contrast to mod:`audioio`, +//| the pin(s) specified are digital pins, and are driven with a device-dependent PWM +//| signal. +//| +//| :param ~microcontroller.Pin left_channel: The pin to output the left channel to +//| :param ~microcontroller.Pin right_channel: The pin to output the right channel to +//| :param int quiescent_value: The output value when no signal is present. Samples should start +//| and end with this value to prevent audible popping. +//| +//| Simple 8ksps 440 Hz sin wave:: +//| +//| import audiocore +//| import audiopwmio +//| import board +//| import array +//| import time +//| import math +//| +//| # Generate one period of sine wav. +//| length = 8000 // 440 +//| sine_wave = array.array("H", [0] * length) +//| for i in range(length): +//| sine_wave[i] = int(math.sin(math.pi * 2 * i / 18) * (2 ** 15) + 2 ** 15) +//| +//| dac = audiopwmio.PWMAudioOut(board.SPEAKER) +//| sine_wave = audiocore.RawSample(sine_wave, sample_rate=8000) +//| dac.play(sine_wave, loop=True) +//| time.sleep(1) +//| dac.stop() +//| +//| Playing a wave file from flash:: +//| +//| import board +//| import audiocore +//| import audiopwmio +//| import digitalio +//| +//| # Required for CircuitPlayground Express +//| speaker_enable = digitalio.DigitalInOut(board.SPEAKER_ENABLE) +//| speaker_enable.switch_to_output(value=True) +//| +//| data = open("cplay-5.1-16bit-16khz.wav", "rb") +//| wav = audiocore.WaveFile(data) +//| a = audiopwmio.PWMAudioOut(board.SPEAKER) +//| +//| print("playing") +//| a.play(wav) +//| while a.playing: +//| pass +//| print("stopped") +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_left_channel, ARG_right_channel, ARG_quiescent_value }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_left_channel, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_right_channel, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_rom_obj = mp_const_none} }, + { MP_QSTR_quiescent_value, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x8000} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t *left_channel_pin = validate_obj_is_free_pin(args[ARG_left_channel].u_obj); + const mcu_pin_obj_t *right_channel_pin = validate_obj_is_free_pin_or_none(args[ARG_right_channel].u_obj); + + // create AudioOut object from the given pin + audiopwmio_pwmaudioout_obj_t *self = m_new_obj(audiopwmio_pwmaudioout_obj_t); + self->base.type = &audiopwmio_pwmaudioout_type; + common_hal_audiopwmio_pwmaudioout_construct(self, left_channel_pin, right_channel_pin, args[ARG_quiescent_value].u_int); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the PWMAudioOut and releases any hardware resources for reuse. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_deinit(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_audiopwmio_pwmaudioout_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_deinit_obj, audiopwmio_pwmaudioout_deinit); + +STATIC void check_for_deinit(audiopwmio_pwmaudioout_obj_t *self) { + if (common_hal_audiopwmio_pwmaudioout_deinited(self)) { + raise_deinited_error(); + } +} +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_audiopwmio_pwmaudioout_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiopwmio_pwmaudioout___exit___obj, 4, 4, audiopwmio_pwmaudioout_obj___exit__); + + +//| .. method:: play(sample, *, loop=False) +//| +//| Plays the sample once when loop=False and continuously when loop=True. +//| Does not block. Use `playing` to block. +//| +//| Sample must be an `audiocore.WaveFile`, `audiocore.RawSample`, or `audiomixer.Mixer`. +//| +//| The sample itself should consist of 16 bit samples. Microcontrollers with a lower output +//| resolution will use the highest order bits to output. For example, the SAMD21 has a 10 bit +//| DAC that ignores the lowest 6 bits when playing 16 bit samples. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_play(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_sample, ARG_loop }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_sample, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_loop, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t sample = args[ARG_sample].u_obj; + common_hal_audiopwmio_pwmaudioout_play(self, sample, args[ARG_loop].u_bool); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(audiopwmio_pwmaudioout_play_obj, 1, audiopwmio_pwmaudioout_obj_play); + +//| .. method:: stop() +//| +//| Stops playback and resets to the start of the sample. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_stop(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_audiopwmio_pwmaudioout_stop(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_stop_obj, audiopwmio_pwmaudioout_obj_stop); + +//| .. attribute:: playing +//| +//| True when an audio sample is being output even if `paused`. (read-only) +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_get_playing(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audiopwmio_pwmaudioout_get_playing(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_get_playing_obj, audiopwmio_pwmaudioout_obj_get_playing); + +const mp_obj_property_t audiopwmio_pwmaudioout_playing_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiopwmio_pwmaudioout_get_playing_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: pause() +//| +//| Stops playback temporarily while remembering the position. Use `resume` to resume playback. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_pause(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + if (!common_hal_audiopwmio_pwmaudioout_get_playing(self)) { + mp_raise_RuntimeError(translate("Not playing")); + } + common_hal_audiopwmio_pwmaudioout_pause(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_pause_obj, audiopwmio_pwmaudioout_obj_pause); + +//| .. method:: resume() +//| +//| Resumes sample playback after :py:func:`pause`. +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_resume(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + if (common_hal_audiopwmio_pwmaudioout_get_paused(self)) { + common_hal_audiopwmio_pwmaudioout_resume(self); + } + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_resume_obj, audiopwmio_pwmaudioout_obj_resume); + +//| .. attribute:: paused +//| +//| True when playback is paused. (read-only) +//| +STATIC mp_obj_t audiopwmio_pwmaudioout_obj_get_paused(mp_obj_t self_in) { + audiopwmio_pwmaudioout_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_bool(common_hal_audiopwmio_pwmaudioout_get_paused(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiopwmio_pwmaudioout_get_paused_obj, audiopwmio_pwmaudioout_obj_get_paused); + +const mp_obj_property_t audiopwmio_pwmaudioout_paused_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiopwmio_pwmaudioout_get_paused_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t audiopwmio_pwmaudioout_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audiopwmio_pwmaudioout_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiopwmio_pwmaudioout___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&audiopwmio_pwmaudioout_play_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&audiopwmio_pwmaudioout_stop_obj) }, + { MP_ROM_QSTR(MP_QSTR_pause), MP_ROM_PTR(&audiopwmio_pwmaudioout_pause_obj) }, + { MP_ROM_QSTR(MP_QSTR_resume), MP_ROM_PTR(&audiopwmio_pwmaudioout_resume_obj) }, + + // Properties + { MP_ROM_QSTR(MP_QSTR_playing), MP_ROM_PTR(&audiopwmio_pwmaudioout_playing_obj) }, + { MP_ROM_QSTR(MP_QSTR_paused), MP_ROM_PTR(&audiopwmio_pwmaudioout_paused_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(audiopwmio_pwmaudioout_locals_dict, audiopwmio_pwmaudioout_locals_dict_table); + +const mp_obj_type_t audiopwmio_pwmaudioout_type = { + { &mp_type_type }, + .name = MP_QSTR_PWMAudioOut, + .make_new = audiopwmio_pwmaudioout_make_new, + .locals_dict = (mp_obj_dict_t*)&audiopwmio_pwmaudioout_locals_dict, +}; diff --git a/shared-bindings/audiopwmio/PWMAudioOut.h b/shared-bindings/audiopwmio/PWMAudioOut.h new file mode 100644 index 0000000000000..22afc70d38d94 --- /dev/null +++ b/shared-bindings/audiopwmio/PWMAudioOut.h @@ -0,0 +1,49 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOPWMIO_AUDIOOUT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOPWMIO_AUDIOOUT_H + +#include "common-hal/audiopwmio/PWMAudioOut.h" +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/audiocore/RawSample.h" + +extern const mp_obj_type_t audiopwmio_pwmaudioout_type; + +// left_channel will always be non-NULL but right_channel may be for mono output. +void common_hal_audiopwmio_pwmaudioout_construct(audiopwmio_pwmaudioout_obj_t* self, + const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t default_value); + +void common_hal_audiopwmio_pwmaudioout_deinit(audiopwmio_pwmaudioout_obj_t* self); +bool common_hal_audiopwmio_pwmaudioout_deinited(audiopwmio_pwmaudioout_obj_t* self); +void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t* self, mp_obj_t sample, bool loop); +void common_hal_audiopwmio_pwmaudioout_stop(audiopwmio_pwmaudioout_obj_t* self); +bool common_hal_audiopwmio_pwmaudioout_get_playing(audiopwmio_pwmaudioout_obj_t* self); +void common_hal_audiopwmio_pwmaudioout_pause(audiopwmio_pwmaudioout_obj_t* self); +void common_hal_audiopwmio_pwmaudioout_resume(audiopwmio_pwmaudioout_obj_t* self); +bool common_hal_audiopwmio_pwmaudioout_get_paused(audiopwmio_pwmaudioout_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOPWMIO_AUDIOOUT_H diff --git a/shared-bindings/audiopwmio/__init__.c b/shared-bindings/audiopwmio/__init__.c new file mode 100644 index 0000000000000..8a2b202b36169 --- /dev/null +++ b/shared-bindings/audiopwmio/__init__.c @@ -0,0 +1,71 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/audiopwmio/__init__.h" +#include "shared-bindings/audiopwmio/PWMAudioOut.h" + +//| :mod:`audiopwmio` --- Support for audio input and output +//| ======================================================== +//| +//| .. module:: audiopwmio +//| :synopsis: Support for audio output via digital PWM +//| :platform: NRF52 +//| +//| The `audiopwmio` module contains classes to provide access to audio IO. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| PWMAudioOut +//| +//| All classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +//| Since CircuitPython 5, `Mixer`, `RawSample` and `WaveFile` are moved +//| to :mod:`audiocore`. +//| + +STATIC const mp_rom_map_elem_t audiopwmio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiopwmio) }, + { MP_ROM_QSTR(MP_QSTR_PWMAudioOut), MP_ROM_PTR(&audiopwmio_pwmaudioout_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(audiopwmio_module_globals, audiopwmio_module_globals_table); + +const mp_obj_module_t audiopwmio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&audiopwmio_module_globals, +}; diff --git a/shared-bindings/audiopwmio/__init__.h b/shared-bindings/audiopwmio/__init__.h new file mode 100644 index 0000000000000..e4b7067d118e2 --- /dev/null +++ b/shared-bindings/audiopwmio/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO___INIT___H diff --git a/shared-bindings/bitbangio/I2C.c b/shared-bindings/bitbangio/I2C.c index f8f60210e623f..3c4f1377717a5 100644 --- a/shared-bindings/bitbangio/I2C.c +++ b/shared-bindings/bitbangio/I2C.c @@ -35,12 +35,14 @@ #include "lib/utils/context_manager_helpers.h" #include "py/mperrno.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + //| .. currentmodule:: bitbangio //| //| :class:`I2C` --- Two wire serial protocol //| ------------------------------------------ //| -//| .. class:: I2C(scl, sda, \*, frequency=400000) +//| .. class:: I2C(scl, sda, *, frequency=400000, timeout) //| //| I2C is a two-wire protocol for communicating between devices. At the //| physical level it consists of 2 wires: SCL and SDA, the clock and data @@ -49,31 +51,29 @@ //| :param ~microcontroller.Pin scl: The clock pin //| :param ~microcontroller.Pin sda: The data pin //| :param int frequency: The clock frequency of the bus +//| :param int timeout: The maximum clock stretching timeout in microseconds //| -STATIC mp_obj_t bitbangio_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true); - bitbangio_i2c_obj_t *self = m_new_obj(bitbangio_i2c_obj_t); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); - self->base.type = &bitbangio_i2c_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); - enum { ARG_scl, ARG_sda, ARG_frequency }; +STATIC mp_obj_t bitbangio_i2c_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_scl, ARG_sda, ARG_frequency, ARG_timeout }; static const mp_arg_t allowed_args[] = { { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_sda, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_frequency, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 255} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_scl].u_obj, false); - assert_pin(args[ARG_sda].u_obj, false); - const mcu_pin_obj_t* scl = MP_OBJ_TO_PTR(args[ARG_scl].u_obj); - const mcu_pin_obj_t* sda = MP_OBJ_TO_PTR(args[ARG_sda].u_obj); - shared_module_bitbangio_i2c_construct(self, scl, sda, args[ARG_frequency].u_int); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* scl = validate_obj_is_free_pin(args[ARG_scl].u_obj); + const mcu_pin_obj_t* sda = validate_obj_is_free_pin(args[ARG_sda].u_obj); + + bitbangio_i2c_obj_t *self = m_new_obj(bitbangio_i2c_obj_t); + self->base.type = &bitbangio_i2c_type; + shared_module_bitbangio_i2c_construct(self, scl, sda, args[ARG_frequency].u_int, args[ARG_timeout].u_int); return (mp_obj_t)self; } -//| .. method:: I2C.deinit() +//| .. method:: deinit() //| //| Releases control of the underlying hardware so other classes can use it. //| @@ -84,13 +84,19 @@ STATIC mp_obj_t bitbangio_i2c_obj_deinit(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_deinit_obj, bitbangio_i2c_obj_deinit); -//| .. method:: I2C.__enter__() +STATIC void check_for_deinit(bitbangio_i2c_obj_t *self) { + if (shared_module_bitbangio_i2c_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() //| //| No-op used in Context Managers. //| // Provided by context manager helper. -//| .. method:: I2C.__exit__() +//| .. method:: __exit__() //| //| Automatically deinitializes the hardware on context exit. See //| :ref:`lifetime-and-contextmanagers` for more info. @@ -104,11 +110,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_i2c_obj___exit___obj, 4, 4, static void check_lock(bitbangio_i2c_obj_t *self) { if (!shared_module_bitbangio_i2c_has_lock(self)) { - mp_raise_RuntimeError("Function requires lock"); + mp_raise_RuntimeError(translate("Function requires lock")); } } -//| .. method:: I2C.scan() +//| .. method:: scan() //| //| Scan all I2C addresses between 0x08 and 0x77 inclusive and return a list of //| those that respond. A device responds if it pulls the SDA line low after @@ -116,7 +122,7 @@ static void check_lock(bitbangio_i2c_obj_t *self) { //| STATIC mp_obj_t bitbangio_i2c_scan(mp_obj_t self_in) { bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); + check_for_deinit(self); check_lock(self); mp_obj_t list = mp_obj_new_list(0, NULL); // 7-bit addresses 0b0000xxx and 0b1111xxx are reserved @@ -130,30 +136,30 @@ STATIC mp_obj_t bitbangio_i2c_scan(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_scan_obj, bitbangio_i2c_scan); -//| .. method:: I2C.try_lock() +//| .. method:: try_lock() //| //| Attempts to grab the I2C lock. Returns True on success. //| STATIC mp_obj_t bitbangio_i2c_obj_try_lock(mp_obj_t self_in) { bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(shared_module_bitbangio_i2c_try_lock(self)); } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_try_lock_obj, bitbangio_i2c_obj_try_lock); -//| .. method:: I2C.unlock() +//| .. method:: unlock() //| //| Releases the I2C lock. //| STATIC mp_obj_t bitbangio_i2c_obj_unlock(mp_obj_t self_in) { bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); + check_for_deinit(self); shared_module_bitbangio_i2c_unlock(self); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_unlock_obj, bitbangio_i2c_obj_unlock); -//| .. method:: I2C.readfrom_into(address, buffer, \*, start=0, end=len(buffer)) +//| .. method:: readfrom_into(address, buffer, *, start=0, end=None) //| //| Read into ``buffer`` from the slave specified by ``address``. //| The number of bytes read will be the length of ``buffer``. @@ -168,6 +174,23 @@ MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_unlock_obj, bitbangio_i2c_obj_unlock); //| :param int start: Index to start writing at //| :param int end: Index to write up to but not include //| +// Shared arg parsing for readfrom_into and writeto_then_readfrom. +STATIC void readfrom(bitbangio_i2c_obj_t *self, mp_int_t address, mp_obj_t buffer, int32_t start, mp_int_t end) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer, &bufinfo, MP_BUFFER_WRITE); + + size_t length = bufinfo.len; + normalize_buffer_bounds(&start, end, &length); + if (length == 0) { + mp_raise_ValueError(translate("Buffer must be at least length 1")); + } + + uint8_t status = shared_module_bitbangio_i2c_read(self, address, ((uint8_t*)bufinfo.buf) + start, length); + if (status != 0) { + mp_raise_OSError(status); + } +} + STATIC mp_obj_t bitbangio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_address, ARG_buffer, ARG_start, ARG_end }; static const mp_arg_t allowed_args[] = { @@ -177,34 +200,22 @@ STATIC mp_obj_t bitbangio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_a { MP_QSTR_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, }; bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); + check_for_deinit(self); + check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - check_lock(self); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); - int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; - normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); - if (length == 0) { - mp_raise_ValueError("Buffer must be at least length 1"); - } - uint8_t status = shared_module_bitbangio_i2c_read(self, - args[ARG_address].u_int, - ((uint8_t*)bufinfo.buf) + start, - length); - if (status != 0) { - mp_raise_OSError(status); - } + readfrom(self, args[ARG_address].u_int, args[ARG_buffer].u_obj, args[ARG_start].u_int, + args[ARG_end].u_int); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_readfrom_into_obj, 3, bitbangio_i2c_readfrom_into); -//| .. method:: I2C.writeto(address, buffer, \*, start=0, end=len(buffer), stop=True) +//| .. method:: writeto(address, buffer, *, start=0, end=None, stop=True) //| -//| Write the bytes from ``buffer`` to the slave specified by ``address``. -//| Transmits a stop bit if ``stop`` is set. +//| Write the bytes from ``buffer`` to the slave specified by ``address`` and then transmits a +//| stop bit. Use `writeto_then_readfrom` when needing a write, no stop and repeated start +//| before a read. //| //| If ``start`` or ``end`` is provided, then the buffer will be sliced //| as if ``buffer[start:end]``. This will not cause an allocation like @@ -217,9 +228,27 @@ MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_readfrom_into_obj, 3, bitbangio_i2c_rea //| :param bytearray buffer: buffer containing the bytes to write //| :param int start: Index to start writing from //| :param int end: Index to read up to but not include -//| :param bool stop: If true, output an I2C stop condition after the -//| buffer is written +//| :param bool stop: If true, output an I2C stop condition after the buffer is written. +//| Deprecated. Will be removed in 6.x and act as stop=True. //| +// Shared arg parsing for writeto and writeto_then_readfrom. +STATIC void writeto(bitbangio_i2c_obj_t *self, mp_int_t address, mp_obj_t buffer, int32_t start, mp_int_t end, bool stop) { + // get the buffer to write the data from + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer, &bufinfo, MP_BUFFER_READ); + + size_t length = bufinfo.len; + normalize_buffer_bounds(&start, end, &length); + + // do the transfer + uint8_t status = shared_module_bitbangio_i2c_write(self, address, + ((uint8_t*) bufinfo.buf) + start, length, + stop); + if (status != 0) { + mp_raise_OSError(status); + } +} + STATIC mp_obj_t bitbangio_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_address, ARG_buffer, ARG_start, ARG_end, ARG_stop }; static const mp_arg_t allowed_args[] = { @@ -230,28 +259,61 @@ STATIC mp_obj_t bitbangio_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, m { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, }; bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(shared_module_bitbangio_i2c_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - // get the buffer to write the data from - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ); + writeto(self, args[ARG_address].u_int, args[ARG_buffer].u_obj, args[ARG_start].u_int, + args[ARG_end].u_int, args[ARG_stop].u_bool); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_writeto_obj, 1, bitbangio_i2c_writeto); - int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; - normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); - // do the transfer - uint8_t status = shared_module_bitbangio_i2c_write(self, args[ARG_address].u_int, - ((uint8_t*) bufinfo.buf) + start, length, args[ARG_stop].u_bool); - if (status != 0) { - mp_raise_OSError(status); - } +//| .. method:: writeto_then_readfrom(address, out_buffer, in_buffer, *, out_start=0, out_end=None, in_start=0, in_end=None) +//| +//| Write the bytes from ``out_buffer`` to the slave specified by ``address``, generate no stop +//| bit, generate a repeated start and read into ``in_buffer``. ``out_buffer`` and +//| ``in_buffer`` can be the same buffer because they are used sequentially. +//| +//| If ``start`` or ``end`` is provided, then the corresponding buffer will be sliced +//| as if ``buffer[start:end]``. This will not cause an allocation like ``buf[start:end]`` +//| will so it saves memory. +//| +//| :param int address: 7-bit device address +//| :param bytearray out_buffer: buffer containing the bytes to write +//| :param bytearray in_buffer: buffer to write into +//| :param int out_start: Index to start writing from +//| :param int out_end: Index to read up to but not include. Defaults to ``len(buffer)`` +//| :param int in_start: Index to start writing at +//| :param int in_end: Index to write up to but not include. Defaults to ``len(buffer)`` +//| +STATIC mp_obj_t bitbangio_i2c_writeto_then_readfrom(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_address, ARG_out_buffer, ARG_in_buffer, ARG_out_start, ARG_out_end, ARG_in_start, ARG_in_end }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_out_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_in_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_out_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_out_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + { MP_QSTR_in_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_in_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + }; + bitbangio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + check_lock(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + writeto(self, args[ARG_address].u_int, args[ARG_out_buffer].u_obj, args[ARG_out_start].u_int, + args[ARG_out_end].u_int, false); + readfrom(self, args[ARG_address].u_int, args[ARG_in_buffer].u_obj, args[ARG_in_start].u_int, + args[ARG_in_end].u_int); + return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_writeto_obj, 1, bitbangio_i2c_writeto); +MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_writeto_then_readfrom_obj, 3, bitbangio_i2c_writeto_then_readfrom); STATIC const mp_rom_map_elem_t bitbangio_i2c_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bitbangio_i2c_deinit_obj) }, @@ -264,6 +326,7 @@ STATIC const mp_rom_map_elem_t bitbangio_i2c_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_writeto), MP_ROM_PTR(&bitbangio_i2c_writeto_obj) }, { MP_ROM_QSTR(MP_QSTR_readfrom_into), MP_ROM_PTR(&bitbangio_i2c_readfrom_into_obj) }, + { MP_ROM_QSTR(MP_QSTR_writeto_then_readfrom), MP_ROM_PTR(&bitbangio_i2c_writeto_then_readfrom_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bitbangio_i2c_locals_dict, bitbangio_i2c_locals_dict_table); diff --git a/shared-bindings/bitbangio/I2C.h b/shared-bindings/bitbangio/I2C.h index 9d393ee12456a..1ce4d21e9183c 100644 --- a/shared-bindings/bitbangio/I2C.h +++ b/shared-bindings/bitbangio/I2C.h @@ -39,7 +39,8 @@ extern const mp_obj_type_t bitbangio_i2c_type; extern void shared_module_bitbangio_i2c_construct(bitbangio_i2c_obj_t *self, const mcu_pin_obj_t * scl, const mcu_pin_obj_t * sda, - uint32_t frequency); + uint32_t frequency, + uint32_t us_timeout); extern void shared_module_bitbangio_i2c_deinit(bitbangio_i2c_obj_t *self); extern bool shared_module_bitbangio_i2c_deinited(bitbangio_i2c_obj_t *self); diff --git a/shared-bindings/bitbangio/OneWire.c b/shared-bindings/bitbangio/OneWire.c index 608c98100b09e..95bbd0679c8d0 100644 --- a/shared-bindings/bitbangio/OneWire.c +++ b/shared-bindings/bitbangio/OneWire.c @@ -62,19 +62,15 @@ //| onewire.write_bit(False) //| print(onewire.read_bit()) //| -STATIC mp_obj_t bitbangio_onewire_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); +STATIC mp_obj_t bitbangio_onewire_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_pin }; static const mp_arg_t allowed_args[] = { { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_pin].u_obj, false); - const mcu_pin_obj_t* pin = MP_OBJ_TO_PTR(args[ARG_pin].u_obj); - assert_pin_free(pin); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* pin = validate_obj_is_free_pin(args[ARG_pin].u_obj); bitbangio_onewire_obj_t *self = m_new_obj(bitbangio_onewire_obj_t); self->base.type = &bitbangio_onewire_type; @@ -94,6 +90,12 @@ STATIC mp_obj_t bitbangio_onewire_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_onewire_deinit_obj, bitbangio_onewire_deinit); +STATIC void check_for_deinit(bitbangio_onewire_obj_t *self) { + if (shared_module_bitbangio_onewire_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -118,7 +120,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_onewire___exit___obj, 4, 4, //| STATIC mp_obj_t bitbangio_onewire_obj_reset(mp_obj_t self_in) { bitbangio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_onewire_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(shared_module_bitbangio_onewire_reset(self)); } @@ -133,7 +135,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_onewire_reset_obj, bitbangio_onewire_obj_res //| STATIC mp_obj_t bitbangio_onewire_obj_read_bit(mp_obj_t self_in) { bitbangio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_onewire_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(shared_module_bitbangio_onewire_read_bit(self)); } @@ -145,7 +147,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_onewire_read_bit_obj, bitbangio_onewire_obj_ //| STATIC mp_obj_t bitbangio_onewire_obj_write_bit(mp_obj_t self_in, mp_obj_t bool_obj) { bitbangio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_onewire_deinited(self)); + check_for_deinit(self); shared_module_bitbangio_onewire_write_bit(self, mp_obj_is_true(bool_obj)); return mp_const_none; diff --git a/shared-bindings/bitbangio/SPI.c b/shared-bindings/bitbangio/SPI.c index 53d6fec0574c5..b1a94c1841a49 100644 --- a/shared-bindings/bitbangio/SPI.c +++ b/shared-bindings/bitbangio/SPI.c @@ -33,9 +33,11 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/util.h" +#include "lib/utils/buffer_helper.h" #include "lib/utils/context_manager_helpers.h" #include "py/mperrno.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: bitbangio //| @@ -60,12 +62,7 @@ //| // TODO(tannewt): Support LSB SPI. -STATIC mp_obj_t bitbangio_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true); - bitbangio_spi_obj_t *self = m_new_obj(bitbangio_spi_obj_t); - self->base.type = &bitbangio_spi_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); +STATIC mp_obj_t bitbangio_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_clock, ARG_MOSI, ARG_MISO, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit }; static const mp_arg_t allowed_args[] = { { MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -73,18 +70,19 @@ STATIC mp_obj_t bitbangio_spi_make_new(const mp_obj_type_t *type, size_t n_args, { MP_QSTR_MISO, MP_ARG_OBJ, {.u_obj = mp_const_none} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_clock].u_obj, false); - assert_pin(args[ARG_MOSI].u_obj, true); - assert_pin(args[ARG_MISO].u_obj, true); - const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(args[ARG_clock].u_obj); - const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(args[ARG_MOSI].u_obj); - const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(args[ARG_MISO].u_obj); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* clock = validate_obj_is_free_pin(args[ARG_clock].u_obj); + const mcu_pin_obj_t* mosi = validate_obj_is_free_pin_or_none(args[ARG_MOSI].u_obj); + const mcu_pin_obj_t* miso = validate_obj_is_free_pin_or_none(args[ARG_MISO].u_obj); + + bitbangio_spi_obj_t *self = m_new_obj(bitbangio_spi_obj_t); + self->base.type = &bitbangio_spi_type; shared_module_bitbangio_spi_construct(self, clock, mosi, miso); return (mp_obj_t)self; } -//| .. method:: SPI.deinit() +//| .. method:: deinit() //| //| Turn off the SPI bus. //| @@ -95,13 +93,19 @@ STATIC mp_obj_t bitbangio_spi_obj_deinit(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_deinit_obj, bitbangio_spi_obj_deinit); -//| .. method:: SPI.__enter__() +STATIC void check_for_deinit(bitbangio_spi_obj_t *self) { + if (shared_module_bitbangio_spi_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() //| //| No-op used by Context Managers. //| // Provided by context manager helper. -//| .. method:: SPI.__exit__() +//| .. method:: __exit__() //| //| Automatically deinitializes the hardware when exiting a context. See //| :ref:`lifetime-and-contextmanagers` for more info. @@ -116,11 +120,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_spi_obj___exit___obj, 4, 4, static void check_lock(bitbangio_spi_obj_t *self) { if (!shared_module_bitbangio_spi_has_lock(self)) { - mp_raise_RuntimeError("Function requires lock"); + mp_raise_RuntimeError(translate("Function requires lock")); } } -//| .. method:: SPI.configure(\*, baudrate=100000, polarity=0, phase=0, bits=8) +//| .. method:: configure(*, baudrate=100000, polarity=0, phase=0, bits=8) //| //| Configures the SPI bus. Only valid when locked. //| @@ -139,22 +143,22 @@ STATIC mp_obj_t bitbangio_spi_configure(size_t n_args, const mp_obj_t *pos_args, { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, }; bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); uint8_t polarity = args[ARG_polarity].u_int; if (polarity != 0 && polarity != 1) { - mp_raise_ValueError("Invalid polarity"); + mp_raise_ValueError(translate("Invalid polarity")); } uint8_t phase = args[ARG_phase].u_int; if (phase != 0 && phase != 1) { - mp_raise_ValueError("Invalid phase"); + mp_raise_ValueError(translate("Invalid phase")); } uint8_t bits = args[ARG_bits].u_int; if (bits != 8 && bits != 9) { - mp_raise_ValueError("Invalid number of bits"); + mp_raise_ValueError(translate("Invalid number of bits")); } shared_module_bitbangio_spi_configure(self, args[ARG_baudrate].u_int, polarity, phase, bits); @@ -162,7 +166,7 @@ STATIC mp_obj_t bitbangio_spi_configure(size_t n_args, const mp_obj_t *pos_args, } MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_spi_configure_obj, 1, bitbangio_spi_configure); -//| .. method:: SPI.try_lock() +//| .. method:: try_lock() //| //| Attempts to grab the SPI lock. Returns True on success. //| @@ -171,24 +175,24 @@ MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_spi_configure_obj, 1, bitbangio_spi_configu //| STATIC mp_obj_t bitbangio_spi_obj_try_lock(mp_obj_t self_in) { bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(shared_module_bitbangio_spi_try_lock(self)); } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_try_lock_obj, bitbangio_spi_obj_try_lock); -//| .. method:: SPI.unlock() +//| .. method:: unlock() //| //| Releases the SPI lock. //| STATIC mp_obj_t bitbangio_spi_obj_unlock(mp_obj_t self_in) { bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); + check_for_deinit(self); shared_module_bitbangio_spi_unlock(self); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_unlock_obj, bitbangio_spi_obj_unlock); -//| .. method:: SPI.write(buf) +//| .. method:: write(buf) //| //| Write the data contained in ``buf``. Requires the SPI being locked. //| If the buffer is empty, nothing happens. @@ -196,7 +200,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_unlock_obj, bitbangio_spi_obj_unlock); // TODO(tannewt): Add support for start and end kwargs. STATIC mp_obj_t bitbangio_spi_write(mp_obj_t self_in, mp_obj_t wr_buf) { bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); + check_for_deinit(self); mp_buffer_info_t src; mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ); if (src.len == 0) { @@ -212,7 +216,7 @@ STATIC mp_obj_t bitbangio_spi_write(mp_obj_t self_in, mp_obj_t wr_buf) { MP_DEFINE_CONST_FUN_OBJ_2(bitbangio_spi_write_obj, bitbangio_spi_write); -//| .. method:: SPI.readinto(buf) +//| .. method:: readinto(buf) //| //| Read into the buffer specified by ``buf`` while writing zeroes. //| Requires the SPI being locked. @@ -221,7 +225,7 @@ MP_DEFINE_CONST_FUN_OBJ_2(bitbangio_spi_write_obj, bitbangio_spi_write); // TODO(tannewt): Add support for start and end kwargs. STATIC mp_obj_t bitbangio_spi_readinto(size_t n_args, const mp_obj_t *args) { bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(args[0]); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); + check_for_deinit(self); mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); if (bufinfo.len == 0) { @@ -236,37 +240,66 @@ STATIC mp_obj_t bitbangio_spi_readinto(size_t n_args, const mp_obj_t *args) { } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_spi_readinto_obj, 2, 2, bitbangio_spi_readinto); -//| .. method:: SPI.write_readinto(buffer_out, buffer_in) +//| .. method:: write_readinto(buffer_out, buffer_in, *, out_start=0, out_end=None, in_start=0, in_end=None) //| //| Write out the data in ``buffer_out`` while simultaneously reading data into ``buffer_in``. -STATIC mp_obj_t bitbangio_spi_write_readinto(size_t n_args, const mp_obj_t *args) { - bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(args[0]); - raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); +//| The lengths of the slices defined by ``buffer_out[out_start:out_end]`` and ``buffer_in[in_start:in_end]`` +//| must be equal. +//| If buffer slice lengths are both 0, nothing happens. +//| +//| :param bytearray buffer_out: Write out the data in this buffer +//| :param bytearray buffer_in: Read data into this buffer +//| :param int out_start: Start of the slice of buffer_out to write out: ``buffer_out[out_start:out_end]`` +//| :param int out_end: End of the slice; this index is not included. Defaults to ``len(buffer_out)`` +//| :param int in_start: Start of the slice of ``buffer_in`` to read into: ``buffer_in[in_start:in_end]`` +//| :param int in_end: End of the slice; this index is not included. Defaults to ``len(buffer_in)`` +//| +STATIC mp_obj_t bitbangio_spi_write_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_buffer_out, ARG_buffer_in, ARG_out_start, ARG_out_end, ARG_in_start, ARG_in_end }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer_out, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_buffer_in, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_out_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_out_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + { MP_QSTR_in_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_in_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + }; + bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); - mp_buffer_info_t bufinfoin; - mp_get_buffer_raise(args[2], &bufinfoin, MP_BUFFER_WRITE); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - if (bufinfoin.len == 0) { - return mp_const_none; - } + mp_buffer_info_t buf_out_info; + mp_get_buffer_raise(args[ARG_buffer_out].u_obj, &buf_out_info, MP_BUFFER_READ); + int32_t out_start = args[ARG_out_start].u_int; + size_t out_length = buf_out_info.len; + normalize_buffer_bounds(&out_start, args[ARG_out_end].u_int, &out_length); - mp_buffer_info_t bufinfoout; - mp_get_buffer_raise(args[1], &bufinfoout, MP_BUFFER_READ); + mp_buffer_info_t buf_in_info; + mp_get_buffer_raise(args[ARG_buffer_in].u_obj, &buf_in_info, MP_BUFFER_WRITE); + int32_t in_start = args[ARG_in_start].u_int; + size_t in_length = buf_in_info.len; + normalize_buffer_bounds(&in_start, args[ARG_in_end].u_int, &in_length); - if (bufinfoout.len != bufinfoin.len) { - mp_raise_ValueError("buffers must be of equal length"); + if (out_length != in_length) { + mp_raise_ValueError(translate("buffer slices must be of equal length")); + } + + if (out_length == 0) { + return mp_const_none; } bool ok = shared_module_bitbangio_spi_transfer(self, - ((uint8_t*)bufinfoout.buf), - ((uint8_t*)bufinfoin.buf), - bufinfoin.len); + ((uint8_t*)buf_out_info.buf) + out_start, + ((uint8_t*)buf_in_info.buf) + in_start, + out_length); if (!ok) { mp_raise_OSError(MP_EIO); } return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_spi_write_readinto_obj, 3, 3, bitbangio_spi_write_readinto); +MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_spi_write_readinto_obj, 2, bitbangio_spi_write_readinto); STATIC const mp_rom_map_elem_t bitbangio_spi_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bitbangio_spi_deinit_obj) }, diff --git a/shared-bindings/board/__init__.c b/shared-bindings/board/__init__.c index 06c2f218fb334..3dda59fb8ef28 100644 --- a/shared-bindings/board/__init__.c +++ b/shared-bindings/board/__init__.c @@ -25,6 +25,7 @@ */ #include "py/obj.h" +#include "py/runtime.h" #include "shared-bindings/board/__init__.h" @@ -33,10 +34,90 @@ //| //| .. module:: board //| :synopsis: Board specific pin names -//| :platform: SAMD21 //| //| Common container for board base pin names. These will vary from board to //| board so don't expect portability when using this module. +//| +//| .. warning:: The board module varies by board. The APIs documented here may or may not be +//| available on a specific board. + +//| .. function:: I2C() +//| +//| Returns the `busio.I2C` object for the board designated SDA and SCL pins. It is a singleton. +//| + +#if BOARD_I2C +mp_obj_t board_i2c(void) { + mp_obj_t singleton = common_hal_board_get_i2c(); + if (singleton != NULL) { + return singleton; + } + assert_pin_free(DEFAULT_I2C_BUS_SDA); + assert_pin_free(DEFAULT_I2C_BUS_SCL); + return common_hal_board_create_i2c(); +} +#else +mp_obj_t board_i2c(void) { + mp_raise_NotImplementedError_varg(translate("No default %q bus"), MP_QSTR_I2C); + return NULL; +} +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_i2c_obj, board_i2c); + + +//| .. function:: SPI() +//| +//| Returns the `busio.SPI` object for the board designated SCK, MOSI and MISO pins. It is a +//| singleton. +//| +#if BOARD_SPI +mp_obj_t board_spi(void) { + mp_obj_t singleton = common_hal_board_get_spi(); + if (singleton != NULL) { + return singleton; + } + assert_pin_free(DEFAULT_SPI_BUS_SCK); + assert_pin_free(DEFAULT_SPI_BUS_MOSI); + assert_pin_free(DEFAULT_SPI_BUS_MISO); + return common_hal_board_create_spi(); +} +#else +mp_obj_t board_spi(void) { + mp_raise_NotImplementedError_varg(translate("No default %q bus"), MP_QSTR_SPI); + return NULL; +} +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_spi_obj, board_spi); + +//| .. function:: UART() +//| +//| Returns the `busio.UART` object for the board designated TX and RX pins. It is a singleton. +//| +//| The object created uses the default parameter values for `busio.UART`. If you need to set +//| parameters that are not changeable after creation, such as ``receiver_buffer_size``, +//| do not use `board.UART()`; instead create a `busio.UART` object explicitly with the +//| desired parameters. +//| +//| +#if BOARD_UART +mp_obj_t board_uart(void) { + mp_obj_t singleton = common_hal_board_get_uart(); + if (singleton != NULL) { + return singleton; + } + + assert_pin_free(DEFAULT_UART_BUS_RX); + assert_pin_free(DEFAULT_UART_BUS_TX); + + return common_hal_board_create_uart(); +} +#else +mp_obj_t board_uart(void) { + mp_raise_NotImplementedError_varg(translate("No default %q bus"), MP_QSTR_SPI); + return NULL; +} +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_uart_obj, board_uart); const mp_obj_module_t board_module = { .base = { &mp_type_module }, diff --git a/shared-bindings/board/__init__.h b/shared-bindings/board/__init__.h index 720239f2807dc..a9b652ba8dfaf 100644 --- a/shared-bindings/board/__init__.h +++ b/shared-bindings/board/__init__.h @@ -29,6 +29,20 @@ #include "py/obj.h" +#include "shared-bindings/microcontroller/Pin.h" // for the pin definitions + extern const mp_obj_dict_t board_module_globals; +mp_obj_t common_hal_board_get_i2c(void); +mp_obj_t common_hal_board_create_i2c(void); +MP_DECLARE_CONST_FUN_OBJ_0(board_i2c_obj); + +mp_obj_t common_hal_board_get_spi(void); +mp_obj_t common_hal_board_create_spi(void); +MP_DECLARE_CONST_FUN_OBJ_0(board_spi_obj); + +mp_obj_t common_hal_board_get_uart(void); +mp_obj_t common_hal_board_create_uart(void); +MP_DECLARE_CONST_FUN_OBJ_0(board_uart_obj); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BOARD___INIT___H diff --git a/shared-bindings/busio/I2C.c b/shared-bindings/busio/I2C.c index b0954d6c8a9c4..c89215acdbda6 100644 --- a/shared-bindings/busio/I2C.c +++ b/shared-bindings/busio/I2C.c @@ -34,12 +34,14 @@ #include "lib/utils/buffer_helper.h" #include "lib/utils/context_manager_helpers.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" + //| .. currentmodule:: busio //| //| :class:`I2C` --- Two wire serial protocol //| ------------------------------------------ //| -//| .. class:: I2C(scl, sda, \*, frequency=400000) +//| .. class:: I2C(scl, sda, *, frequency=400000, timeout=255) //| //| I2C is a two-wire protocol for communicating between devices. At the //| physical level it consists of 2 wires: SCL and SDA, the clock and data @@ -56,32 +58,33 @@ //| :param ~microcontroller.Pin scl: The clock pin //| :param ~microcontroller.Pin sda: The data pin //| :param int frequency: The clock frequency in Hertz +//| :param int timeout: The maximum clock stretching timeut - (used only for bitbangio.I2C; ignored for busio.I2C) +//| +//| .. note:: On the nRF52840, only one I2C object may be created, +//| except on the Circuit Playground Bluefruit, which allows two, +//| one for the onboard accelerometer, and one for offboard use. //| -STATIC mp_obj_t busio_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true); +STATIC mp_obj_t busio_i2c_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { busio_i2c_obj_t *self = m_new_obj(busio_i2c_obj_t); self->base.type = &busio_i2c_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); - enum { ARG_scl, ARG_sda, ARG_frequency }; + enum { ARG_scl, ARG_sda, ARG_frequency, ARG_timeout }; static const mp_arg_t allowed_args[] = { { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_sda, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_frequency, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 255} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_scl].u_obj, false); - assert_pin(args[ARG_sda].u_obj, false); - const mcu_pin_obj_t* scl = MP_OBJ_TO_PTR(args[ARG_scl].u_obj); - assert_pin_free(scl); - const mcu_pin_obj_t* sda = MP_OBJ_TO_PTR(args[ARG_sda].u_obj); - assert_pin_free(sda); - common_hal_busio_i2c_construct(self, scl, sda, args[ARG_frequency].u_int); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* scl = validate_obj_is_free_pin(args[ARG_scl].u_obj); + const mcu_pin_obj_t* sda = validate_obj_is_free_pin(args[ARG_sda].u_obj); + + common_hal_busio_i2c_construct(self, scl, sda, args[ARG_frequency].u_int, args[ARG_timeout].u_int); return (mp_obj_t)self; } -//| .. method:: I2C.deinit() +//| .. method:: deinit() //| //| Releases control of the underlying hardware so other classes can use it. //| @@ -92,13 +95,19 @@ STATIC mp_obj_t busio_i2c_obj_deinit(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_deinit_obj, busio_i2c_obj_deinit); -//| .. method:: I2C.__enter__() +STATIC void check_for_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() //| //| No-op used in Context Managers. //| // Provided by context manager helper. -//| .. method:: I2C.__exit__() +//| .. method:: __exit__() //| //| Automatically deinitializes the hardware on context exit. See //| :ref:`lifetime-and-contextmanagers` for more info. @@ -113,11 +122,11 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_i2c___exit___obj, 4, 4, busio_i static void check_lock(busio_i2c_obj_t *self) { asm(""); if (!common_hal_busio_i2c_has_lock(self)) { - mp_raise_RuntimeError("Function requires lock."); + mp_raise_RuntimeError(translate("Function requires lock")); } } -//| .. method:: I2C.scan() +//| .. method:: scan() //| //| Scan all I2C addresses between 0x08 and 0x77 inclusive and return a //| list of those that respond. @@ -127,7 +136,7 @@ static void check_lock(busio_i2c_obj_t *self) { //| STATIC mp_obj_t busio_i2c_scan(mp_obj_t self_in) { busio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_i2c_deinited(self)); + check_for_deinit(self); check_lock(self); mp_obj_t list = mp_obj_new_list(0, NULL); // 7-bit addresses 0b0000xxx and 0b1111xxx are reserved @@ -141,7 +150,7 @@ STATIC mp_obj_t busio_i2c_scan(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_scan_obj, busio_i2c_scan); -//| .. method:: I2C.try_lock() +//| .. method:: try_lock() //| //| Attempts to grab the I2C lock. Returns True on success. //| @@ -150,24 +159,24 @@ MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_scan_obj, busio_i2c_scan); //| STATIC mp_obj_t busio_i2c_obj_try_lock(mp_obj_t self_in) { busio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_i2c_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(common_hal_busio_i2c_try_lock(self)); } MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_try_lock_obj, busio_i2c_obj_try_lock); -//| .. method:: I2C.unlock() +//| .. method:: unlock() //| //| Releases the I2C lock. //| STATIC mp_obj_t busio_i2c_obj_unlock(mp_obj_t self_in) { busio_i2c_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_i2c_deinited(self)); + check_for_deinit(self); common_hal_busio_i2c_unlock(self); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_unlock_obj, busio_i2c_obj_unlock); -//| .. method:: I2C.readfrom_into(address, buffer, \*, start=0, end=len(buffer)) +//| .. method:: readfrom_into(address, buffer, *, start=0, end=None) //| //| Read into ``buffer`` from the slave specified by ``address``. //| The number of bytes read will be the length of ``buffer``. @@ -180,8 +189,25 @@ MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_unlock_obj, busio_i2c_obj_unlock); //| :param int address: 7-bit device address //| :param bytearray buffer: buffer to write into //| :param int start: Index to start writing at -//| :param int end: Index to write up to but not include +//| :param int end: Index to write up to but not include. Defaults to ``len(buffer)`` //| +// Shared arg parsing for readfrom_into and writeto_then_readfrom. +STATIC void readfrom(busio_i2c_obj_t *self, mp_int_t address, mp_obj_t buffer, int32_t start, mp_int_t end) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer, &bufinfo, MP_BUFFER_WRITE); + + size_t length = bufinfo.len; + normalize_buffer_bounds(&start, end, &length); + if (length == 0) { + mp_raise_ValueError(translate("Buffer must be at least length 1")); + } + + uint8_t status = common_hal_busio_i2c_read(self, address, ((uint8_t*)bufinfo.buf) + start, length); + if (status != 0) { + mp_raise_OSError(status); + } +} + STATIC mp_obj_t busio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_address, ARG_buffer, ARG_start, ARG_end }; static const mp_arg_t allowed_args[] = { @@ -191,34 +217,23 @@ STATIC mp_obj_t busio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, { MP_QSTR_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, }; busio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_i2c_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); - - int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; - normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); - if (length == 0) { - mp_raise_ValueError("Buffer must be at least length 1"); - } - - uint8_t status = common_hal_busio_i2c_read(self, args[ARG_address].u_int, ((uint8_t*)bufinfo.buf) + start, length); - if (status != 0) { - mp_raise_OSError(status); - } - + readfrom(self, args[ARG_address].u_int, args[ARG_buffer].u_obj, args[ARG_start].u_int, + args[ARG_end].u_int); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_readfrom_into_obj, 3, busio_i2c_readfrom_into); -//| .. method:: I2C.writeto(address, buffer, \*, start=0, end=len(buffer), stop=True) +//| .. method:: writeto(address, buffer, *, start=0, end=None, stop=True) //| //| Write the bytes from ``buffer`` to the slave specified by ``address``. -//| Transmits a stop bit if ``stop`` is set. +//| Transmits a stop bit when stop is True. Setting stop=False is deprecated and stop will be +//| removed in CircuitPython 6.x. Use `writeto_then_readfrom` when needing a write, no stop and +//| repeated start before a read. //| //| If ``start`` or ``end`` is provided, then the buffer will be sliced //| as if ``buffer[start:end]``. This will not cause an allocation like @@ -230,10 +245,27 @@ MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_readfrom_into_obj, 3, busio_i2c_readfrom_in //| :param int address: 7-bit device address //| :param bytearray buffer: buffer containing the bytes to write //| :param int start: Index to start writing from -//| :param int end: Index to read up to but not include -//| :param bool stop: If true, output an I2C stop condition after the -//| buffer is written +//| :param int end: Index to read up to but not include. Defaults to ``len(buffer)`` +//| :param bool stop: If true, output an I2C stop condition after the buffer is written. +//| Deprecated. Will be removed in 6.x and act as stop=True. //| +// Shared arg parsing for writeto and writeto_then_readfrom. +STATIC void writeto(busio_i2c_obj_t *self, mp_int_t address, mp_obj_t buffer, int32_t start, mp_int_t end, bool stop) { + // get the buffer to write the data from + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer, &bufinfo, MP_BUFFER_READ); + + size_t length = bufinfo.len; + normalize_buffer_bounds(&start, end, &length); + + // do the transfer + uint8_t status = common_hal_busio_i2c_write(self, address, ((uint8_t*) bufinfo.buf) + start, + length, stop); + if (status != 0) { + mp_raise_OSError(status); + } +} + STATIC mp_obj_t busio_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_address, ARG_buffer, ARG_start, ARG_end, ARG_stop }; static const mp_arg_t allowed_args[] = { @@ -244,29 +276,60 @@ STATIC mp_obj_t busio_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_ma { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, }; busio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_i2c_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - // get the buffer to write the data from - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ); + writeto(self, args[ARG_address].u_int, args[ARG_buffer].u_obj, args[ARG_start].u_int, + args[ARG_end].u_int, args[ARG_stop].u_bool); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_writeto_obj, 1, busio_i2c_writeto); +//| .. method:: writeto_then_readfrom(address, out_buffer, in_buffer, *, out_start=0, out_end=None, in_start=0, in_end=None) +//| +//| Write the bytes from ``out_buffer`` to the slave specified by ``address``, generate no stop +//| bit, generate a repeated start and read into ``in_buffer``. ``out_buffer`` and +//| ``in_buffer`` can be the same buffer because they are used sequentially. +//| +//| If ``start`` or ``end`` is provided, then the corresponding buffer will be sliced +//| as if ``buffer[start:end]``. This will not cause an allocation like ``buf[start:end]`` +//| will so it saves memory. +//| +//| :param int address: 7-bit device address +//| :param bytearray out_buffer: buffer containing the bytes to write +//| :param bytearray in_buffer: buffer to write into +//| :param int out_start: Index to start writing from +//| :param int out_end: Index to read up to but not include. Defaults to ``len(buffer)`` +//| :param int in_start: Index to start writing at +//| :param int in_end: Index to write up to but not include. Defaults to ``len(buffer)`` +//| +STATIC mp_obj_t busio_i2c_writeto_then_readfrom(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_address, ARG_out_buffer, ARG_in_buffer, ARG_out_start, ARG_out_end, ARG_in_start, ARG_in_end }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_out_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_in_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, + { MP_QSTR_out_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_out_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + { MP_QSTR_in_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_in_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, + }; + busio_i2c_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + check_lock(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; - normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); + writeto(self, args[ARG_address].u_int, args[ARG_out_buffer].u_obj, args[ARG_out_start].u_int, + args[ARG_out_end].u_int, false); + readfrom(self, args[ARG_address].u_int, args[ARG_in_buffer].u_obj, args[ARG_in_start].u_int, + args[ARG_in_end].u_int); - // do the transfer - uint8_t status = common_hal_busio_i2c_write(self, args[ARG_address].u_int, - ((uint8_t*) bufinfo.buf) + start, length, args[ARG_stop].u_bool); - if (status != 0) { - mp_raise_OSError(status); - } return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_writeto_obj, 1, busio_i2c_writeto); +MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_writeto_then_readfrom_obj, 3, busio_i2c_writeto_then_readfrom); STATIC const mp_rom_map_elem_t busio_i2c_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&busio_i2c_deinit_obj) }, @@ -279,6 +342,7 @@ STATIC const mp_rom_map_elem_t busio_i2c_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_readfrom_into), MP_ROM_PTR(&busio_i2c_readfrom_into_obj) }, { MP_ROM_QSTR(MP_QSTR_writeto), MP_ROM_PTR(&busio_i2c_writeto_obj) }, + { MP_ROM_QSTR(MP_QSTR_writeto_then_readfrom), MP_ROM_PTR(&busio_i2c_writeto_then_readfrom_obj) }, }; STATIC MP_DEFINE_CONST_DICT(busio_i2c_locals_dict, busio_i2c_locals_dict_table); diff --git a/shared-bindings/busio/I2C.h b/shared-bindings/busio/I2C.h index 7185d6075c969..a2d5dbf5073e0 100644 --- a/shared-bindings/busio/I2C.h +++ b/shared-bindings/busio/I2C.h @@ -46,7 +46,8 @@ extern const mp_obj_type_t busio_i2c_type; extern void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * scl, const mcu_pin_obj_t * sda, - uint32_t frequency); + uint32_t frequency, + uint32_t timeout); extern void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self); extern bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self); @@ -68,4 +69,7 @@ extern uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addres extern uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t address, uint8_t * data, size_t len); +// This is used by the supervisor to claim I2C devices indefinitely. +extern void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_I2C_H diff --git a/shared-bindings/busio/OneWire.c b/shared-bindings/busio/OneWire.c index 95fce68f3200a..022d6afcf4ed7 100644 --- a/shared-bindings/busio/OneWire.c +++ b/shared-bindings/busio/OneWire.c @@ -62,19 +62,14 @@ //| onewire.write_bit(False) //| print(onewire.read_bit()) //| -STATIC mp_obj_t busio_onewire_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); +STATIC mp_obj_t busio_onewire_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_pin }; static const mp_arg_t allowed_args[] = { { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_pin].u_obj, false); - const mcu_pin_obj_t* pin = MP_OBJ_TO_PTR(args[ARG_pin].u_obj); - assert_pin_free(pin); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + const mcu_pin_obj_t* pin = validate_obj_is_free_pin(args[ARG_pin].u_obj); busio_onewire_obj_t *self = m_new_obj(busio_onewire_obj_t); self->base.type = &busio_onewire_type; @@ -94,6 +89,12 @@ STATIC mp_obj_t busio_onewire_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(busio_onewire_deinit_obj, busio_onewire_deinit); +STATIC void check_for_deinit(busio_onewire_obj_t *self) { + if (common_hal_busio_onewire_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -121,7 +122,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_onewire___exit___obj, 4, 4, bus //| STATIC mp_obj_t busio_onewire_obj_reset(mp_obj_t self_in) { busio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_onewire_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(common_hal_busio_onewire_reset(self)); } @@ -136,7 +137,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(busio_onewire_reset_obj, busio_onewire_obj_reset); //| STATIC mp_obj_t busio_onewire_obj_read_bit(mp_obj_t self_in) { busio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_onewire_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(common_hal_busio_onewire_read_bit(self)); } @@ -148,7 +149,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(busio_onewire_read_bit_obj, busio_onewire_obj_read_bit //| STATIC mp_obj_t busio_onewire_obj_write_bit(mp_obj_t self_in, mp_obj_t bool_obj) { busio_onewire_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_onewire_deinited(self)); + check_for_deinit(self); common_hal_busio_onewire_write_bit(self, mp_obj_is_true(bool_obj)); return mp_const_none; diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c index 52c145d6de28e..043c1089d5863 100644 --- a/shared-bindings/busio/SPI.c +++ b/shared-bindings/busio/SPI.c @@ -38,6 +38,7 @@ #include "py/mperrno.h" #include "py/objproperty.h" #include "py/runtime.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: busio //| @@ -56,6 +57,13 @@ //| //| Construct an SPI object on the given pins. //| +//| ..note:: The SPI peripherals allocated in order of desirability, if possible, +//| such as highest speed and not shared use first. For instance, on the nRF52840, +//| there is a single 32MHz SPI peripheral, and multiple 8MHz peripherals, +//| some of which may also be used for I2C. The 32MHz SPI peripheral is returned +//| first, then the exclusive 8MHz SPI peripheral, and finally the shared 8MHz +//| peripherals. +//| //| .. seealso:: Using this class directly requires careful lock management. //| Instead, use :class:`~adafruit_bus_device.spi_device.SPIDevice` to //| manage locks. @@ -70,12 +78,9 @@ //| // TODO(tannewt): Support LSB SPI. -STATIC mp_obj_t busio_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true); +STATIC mp_obj_t busio_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { busio_spi_obj_t *self = m_new_obj(busio_spi_obj_t); self->base.type = &busio_spi_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); enum { ARG_clock, ARG_MOSI, ARG_MISO }; static const mp_arg_t allowed_args[] = { { MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -83,21 +88,17 @@ STATIC mp_obj_t busio_spi_make_new(const mp_obj_type_t *type, size_t n_args, siz { MP_QSTR_MISO, MP_ARG_OBJ, {.u_obj = mp_const_none} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_clock].u_obj, false); - assert_pin(args[ARG_MOSI].u_obj, true); - assert_pin(args[ARG_MISO].u_obj, true); - const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(args[ARG_clock].u_obj); - assert_pin_free(clock); - const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(args[ARG_MOSI].u_obj); - assert_pin_free(mosi); - const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(args[ARG_MISO].u_obj); - assert_pin_free(miso); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* clock = validate_obj_is_free_pin(args[ARG_clock].u_obj); + const mcu_pin_obj_t* mosi = validate_obj_is_free_pin_or_none(args[ARG_MOSI].u_obj); + const mcu_pin_obj_t* miso = validate_obj_is_free_pin_or_none(args[ARG_MISO].u_obj); + common_hal_busio_spi_construct(self, clock, mosi, miso); - return (mp_obj_t)self; + return MP_OBJ_FROM_PTR(self); } -//| .. method:: SPI.deinit() +//| .. method:: deinit() //| //| Turn off the SPI bus. //| @@ -108,13 +109,13 @@ STATIC mp_obj_t busio_spi_obj_deinit(mp_obj_t self_in) { } MP_DEFINE_CONST_FUN_OBJ_1(busio_spi_deinit_obj, busio_spi_obj_deinit); -//| .. method:: SPI.__enter__() +//| .. method:: __enter__() //| //| No-op used by Context Managers. //| // Provided by context manager helper. -//| .. method:: SPI.__exit__() +//| .. method:: __exit__() //| //| Automatically deinitializes the hardware when exiting a context. See //| :ref:`lifetime-and-contextmanagers` for more info. @@ -126,28 +127,42 @@ STATIC mp_obj_t busio_spi_obj___exit__(size_t n_args, const mp_obj_t *args) { } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_spi_obj___exit___obj, 4, 4, busio_spi_obj___exit__); -static void check_lock(busio_spi_obj_t *self) { +STATIC void check_lock(busio_spi_obj_t *self) { asm(""); if (!common_hal_busio_spi_has_lock(self)) { - mp_raise_RuntimeError("Function requires lock"); + mp_raise_RuntimeError(translate("Function requires lock")); + } +} + +STATIC void check_for_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + raise_deinited_error(); } } -//| .. method:: SPI.configure(\*, baudrate=100000, polarity=0, phase=0, bits=8) +//| .. method:: configure(*, baudrate=100000, polarity=0, phase=0, bits=8) //| -//| Configures the SPI bus. Only valid when locked. +//| Configures the SPI bus. The SPI object must be locked. //| //| :param int baudrate: the desired clock rate in Hertz. The actual clock rate may be higher or lower //| due to the granularity of available clock settings. //| Check the `frequency` attribute for the actual clock rate. -//| **Note:** on the SAMD21, it is possible to set the baud rate to 24 MHz, but that -//| speed is not guaranteed to work. 12 MHz is the next available lower speed, and is -//| within spec for the SAMD21. //| :param int polarity: the base state of the clock line (0 or 1) //| :param int phase: the edge of the clock that data is captured. First (0) //| or second (1). Rising or falling depends on clock polarity. //| :param int bits: the number of bits per word //| +//| .. note:: On the SAMD21, it is possible to set the baudrate to 24 MHz, but that +//| speed is not guaranteed to work. 12 MHz is the next available lower speed, and is +//| within spec for the SAMD21. +//| +//| .. note:: On the nRF52840, these baudrates are available: 125kHz, 250kHz, 1MHz, 2MHz, 4MHz, +//| and 8MHz. +//| If you pick a a baudrate other than one of these, the nearest lower +//| baudrate will be chosen, with a minimum of 125kHz. +//| Two SPI objects may be created, except on the Circuit Playground Bluefruit, +//| which allows only one (to allow for an additional I2C object). +//| STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits }; static const mp_arg_t allowed_args[] = { @@ -157,22 +172,22 @@ STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_ { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, }; busio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); uint8_t polarity = args[ARG_polarity].u_int; if (polarity != 0 && polarity != 1) { - mp_raise_ValueError("Invalid polarity"); + mp_raise_ValueError(translate("Invalid polarity")); } uint8_t phase = args[ARG_phase].u_int; if (phase != 0 && phase != 1) { - mp_raise_ValueError("Invalid phase"); + mp_raise_ValueError(translate("Invalid phase")); } uint8_t bits = args[ARG_bits].u_int; if (bits != 8 && bits != 9) { - mp_raise_ValueError("Invalid number of bits"); + mp_raise_ValueError(translate("Invalid number of bits")); } if (!common_hal_busio_spi_configure(self, args[ARG_baudrate].u_int, @@ -183,7 +198,7 @@ STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_ } MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_configure_obj, 1, busio_spi_configure); -//| .. method:: SPI.try_lock() +//| .. method:: try_lock() //| //| Attempts to grab the SPI lock. Returns True on success. //| @@ -192,31 +207,30 @@ MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_configure_obj, 1, busio_spi_configure); //| STATIC mp_obj_t busio_spi_obj_try_lock(mp_obj_t self_in) { busio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); return mp_obj_new_bool(common_hal_busio_spi_try_lock(self)); } MP_DEFINE_CONST_FUN_OBJ_1(busio_spi_try_lock_obj, busio_spi_obj_try_lock); -//| .. method:: SPI.unlock() +//| .. method:: unlock() //| //| Releases the SPI lock. //| STATIC mp_obj_t busio_spi_obj_unlock(mp_obj_t self_in) { busio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); common_hal_busio_spi_unlock(self); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(busio_spi_unlock_obj, busio_spi_obj_unlock); -//| .. method:: SPI.write(buffer, \*, start=0, end=len(buffer)) +//| .. method:: write(buffer, *, start=0, end=None) //| //| Write the data contained in ``buffer``. The SPI object must be locked. //| If the buffer is empty, nothing happens. //| //| :param bytearray buffer: Write out the data in this buffer //| :param int start: Start of the slice of ``buffer`` to write out: ``buffer[start:end]`` -//| :param int end: End of the slice; this index is not included +//| :param int end: End of the slice; this index is not included. Defaults to ``len(buffer)`` //| STATIC mp_obj_t busio_spi_write(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_buffer, ARG_start, ARG_end }; @@ -226,7 +240,7 @@ STATIC mp_obj_t busio_spi_write(size_t n_args, const mp_obj_t *pos_args, mp_map_ { MP_QSTR_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, }; busio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -234,7 +248,7 @@ STATIC mp_obj_t busio_spi_write(size_t n_args, const mp_obj_t *pos_args, mp_map_ mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ); int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; + size_t length = bufinfo.len; normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); if (length == 0) { @@ -250,7 +264,7 @@ STATIC mp_obj_t busio_spi_write(size_t n_args, const mp_obj_t *pos_args, mp_map_ MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_write_obj, 2, busio_spi_write); -//| .. method:: SPI.readinto(buffer, \*, start=0, end=len(buffer), write_value=0) +//| .. method:: readinto(buffer, *, start=0, end=None, write_value=0) //| //| Read into ``buffer`` while writing ``write_value`` for each byte read. //| The SPI object must be locked. @@ -258,7 +272,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_write_obj, 2, busio_spi_write); //| //| :param bytearray buffer: Read data into this buffer //| :param int start: Start of the slice of ``buffer`` to read into: ``buffer[start:end]`` -//| :param int end: End of the slice; this index is not included +//| :param int end: End of the slice; this index is not included. Defaults to ``len(buffer)`` //| :param int write_value: Value to write while reading. (Usually ignored.) //| STATIC mp_obj_t busio_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { @@ -270,7 +284,7 @@ STATIC mp_obj_t busio_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_m { MP_QSTR_write_value,MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, }; busio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -278,7 +292,7 @@ STATIC mp_obj_t busio_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_m mp_buffer_info_t bufinfo; mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); int32_t start = args[ARG_start].u_int; - uint32_t length = bufinfo.len; + size_t length = bufinfo.len; normalize_buffer_bounds(&start, args[ARG_end].u_int, &length); if (length == 0) { @@ -293,7 +307,7 @@ STATIC mp_obj_t busio_spi_readinto(size_t n_args, const mp_obj_t *pos_args, mp_m } MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_readinto_obj, 2, busio_spi_readinto); -//| .. method:: SPI.write_readinto(buffer_out, buffer_in, \*, out_start=0, out_end=len(buffer_out), in_start=0, in_end=len(buffer_in)) +//| .. method:: write_readinto(buffer_out, buffer_in, *, out_start=0, out_end=None, in_start=0, in_end=None) //| //| Write out the data in ``buffer_out`` while simultaneously reading data into ``buffer_in``. //| The SPI object must be locked. @@ -304,9 +318,9 @@ MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_readinto_obj, 2, busio_spi_readinto); //| :param bytearray buffer_out: Write out the data in this buffer //| :param bytearray buffer_in: Read data into this buffer //| :param int out_start: Start of the slice of buffer_out to write out: ``buffer_out[out_start:out_end]`` -//| :param int out_end: End of the slice; this index is not included +//| :param int out_end: End of the slice; this index is not included. Defaults to ``len(buffer_out)`` //| :param int in_start: Start of the slice of ``buffer_in`` to read into: ``buffer_in[in_start:in_end]`` -//| :param int in_end: End of the slice; this index is not included +//| :param int in_end: End of the slice; this index is not included. Defaults to ``len(buffer_in)`` //| STATIC mp_obj_t busio_spi_write_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_buffer_out, ARG_buffer_in, ARG_out_start, ARG_out_end, ARG_in_start, ARG_in_end }; @@ -319,7 +333,7 @@ STATIC mp_obj_t busio_spi_write_readinto(size_t n_args, const mp_obj_t *pos_args { MP_QSTR_in_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} }, }; busio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); check_lock(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -327,17 +341,17 @@ STATIC mp_obj_t busio_spi_write_readinto(size_t n_args, const mp_obj_t *pos_args mp_buffer_info_t buf_out_info; mp_get_buffer_raise(args[ARG_buffer_out].u_obj, &buf_out_info, MP_BUFFER_READ); int32_t out_start = args[ARG_out_start].u_int; - uint32_t out_length = buf_out_info.len; + size_t out_length = buf_out_info.len; normalize_buffer_bounds(&out_start, args[ARG_out_end].u_int, &out_length); mp_buffer_info_t buf_in_info; mp_get_buffer_raise(args[ARG_buffer_in].u_obj, &buf_in_info, MP_BUFFER_WRITE); int32_t in_start = args[ARG_in_start].u_int; - uint32_t in_length = buf_in_info.len; + size_t in_length = buf_in_info.len; normalize_buffer_bounds(&in_start, args[ARG_in_end].u_int, &in_length); if (out_length != in_length) { - mp_raise_ValueError("buffer slices must be of equal length"); + mp_raise_ValueError(translate("buffer slices must be of equal length")); } if (out_length == 0) { @@ -362,7 +376,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(busio_spi_write_readinto_obj, 2, busio_spi_write_read //| STATIC mp_obj_t busio_spi_obj_get_frequency(mp_obj_t self_in) { busio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_spi_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_busio_spi_get_frequency(self)); } MP_DEFINE_CONST_FUN_OBJ_1(busio_spi_get_frequency_obj, busio_spi_obj_get_frequency); diff --git a/shared-bindings/busio/SPI.h b/shared-bindings/busio/SPI.h index 555f32c928555..b7b0715d13605 100644 --- a/shared-bindings/busio/SPI.h +++ b/shared-bindings/busio/SPI.h @@ -61,4 +61,13 @@ extern bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_o // Return actual SPI bus frequency. uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self); +// Return SPI bus phase. +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self); + +// Return SPI bus polarity. +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self); + +// This is used by the supervisor to claim SPI devices indefinitely. +extern void common_hal_busio_spi_never_reset(busio_spi_obj_t *self); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_SPI_H diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c index 1b63d8d0e0c11..f231924d50150 100644 --- a/shared-bindings/busio/UART.c +++ b/shared-bindings/busio/UART.c @@ -31,11 +31,13 @@ #include "shared-bindings/util.h" #include "lib/utils/context_manager_helpers.h" +#include "lib/utils/interrupt_char.h" #include "py/ioctl.h" #include "py/objproperty.h" #include "py/runtime.h" #include "py/stream.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: busio @@ -44,19 +46,26 @@ //| ================================================= //| //| -//| .. class:: UART(tx, rx, \*, baudrate=9600, bits=8, parity=None, stop=1, timeout=1000, receiver_buffer_size=64) +//| .. class:: UART(tx, rx, *, baudrate=9600, bits=8, parity=None, stop=1, timeout=1, receiver_buffer_size=64) //| //| A common bidirectional serial protocol that uses an an agreed upon speed //| rather than a shared clock line. //| //| :param ~microcontroller.Pin tx: the pin to transmit with, or ``None`` if this ``UART`` is receive-only. //| :param ~microcontroller.Pin rx: the pin to receive on, or ``None`` if this ``UART`` is transmit-only. +//| :param ~microcontroller.Pin rts: the pin for rts, or ``None`` if rts not in use. +//| :param ~microcontroller.Pin cts: the pin for cts, or ``None`` if cts not in use. +//| :param ~microcontroller.Pin rs485_dir: the pin for rs485 direction setting, or ``None`` if rs485 not in use. +//| :param bool rs485_invert: set to invert the sense of the rs485_dir pin. //| :param int baudrate: the transmit and receive speed. -/// :param int bits: the number of bits per byte, 7, 8 or 9. -/// :param Parity parity: the parity used for error checking. -/// :param int stop: the number of stop bits, 1 or 2. -/// :param int timeout: the timeout in milliseconds to wait for the first character and between subsequent characters. -/// :param int receiver_buffer_size: the character length of the read buffer (0 to disable). (When a character is 9 bits the buffer will be 2 * receiver_buffer_size bytes.) +//| :param int bits: the number of bits per byte, 7, 8 or 9. +//| :param Parity parity: the parity used for error checking. +//| :param int stop: the number of stop bits, 1 or 2. +//| :param float timeout: the timeout in seconds to wait for the first character and between subsequent characters when reading. Raises ``ValueError`` if timeout >100 seconds. +//| :param int receiver_buffer_size: the character length of the read buffer (0 to disable). (When a character is 9 bits the buffer will be 2 * receiver_buffer_size bytes.) +//| +//| *New in CircuitPython 4.0:* ``timeout`` has incompatibly changed units from milliseconds to seconds. +//| The new upper limit on ``timeout`` is meant to catch mistaken use of milliseconds. //| typedef struct { mp_obj_base_t base; @@ -64,13 +73,21 @@ typedef struct { extern const busio_uart_parity_obj_t busio_uart_parity_even_obj; extern const busio_uart_parity_obj_t busio_uart_parity_odd_obj; -STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 0, MP_OBJ_FUN_ARGS_MAX, true); - busio_uart_obj_t *self = m_new_obj(busio_uart_obj_t); +STATIC void validate_timeout(mp_float_t timeout) { + if (timeout < (mp_float_t) 0.0f || timeout > (mp_float_t) 100.0f) { + mp_raise_ValueError(translate("timeout must be 0.0-100.0 seconds")); + } +} + +STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + // Always initially allocate the UART object within the long-lived heap. + // This is needed to avoid crashes with certain UART implementations which + // cannot accomodate being moved after creation. (See + // https://github.com/adafruit/circuitpython/issues/1056) + busio_uart_obj_t *self = m_new_ll_obj(busio_uart_obj_t); self->base.type = &busio_uart_type; - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); - enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size}; + enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size, + ARG_rts, ARG_cts, ARG_rs485_dir,ARG_rs485_invert}; static const mp_arg_t allowed_args[] = { { MP_QSTR_tx, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_rx, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -78,23 +95,26 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, si { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, { MP_QSTR_parity, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} }, + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(1)} }, { MP_QSTR_receiver_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, + { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_rs485_dir, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none } }, + { MP_QSTR_rs485_invert, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false } }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_rx].u_obj, true); - const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(args[ARG_rx].u_obj); - assert_pin_free(rx); + const mcu_pin_obj_t* rx = validate_obj_is_free_pin_or_none(args[ARG_rx].u_obj); + const mcu_pin_obj_t* tx = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); - assert_pin(args[ARG_tx].u_obj, true); - const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(args[ARG_tx].u_obj); - assert_pin_free(tx); + if ( (tx == NULL) && (rx == NULL) ) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } uint8_t bits = args[ARG_bits].u_int; if (bits < 7 || bits > 9) { - mp_raise_ValueError("bits must be 7, 8 or 9"); + mp_raise_ValueError(translate("bits must be 7, 8 or 9")); } uart_parity_t parity = PARITY_NONE; @@ -106,12 +126,21 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, si uint8_t stop = args[ARG_stop].u_int; if (stop != 1 && stop != 2) { - mp_raise_ValueError("stop must be 1 or 2"); + mp_raise_ValueError(translate("stop must be 1 or 2")); } - common_hal_busio_uart_construct(self, tx, rx, - args[ARG_baudrate].u_int, bits, parity, stop, args[ARG_timeout].u_int, - args[ARG_receiver_buffer_size].u_int); + mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); + validate_timeout(timeout); + + const mcu_pin_obj_t* rts = validate_obj_is_free_pin_or_none(args[ARG_rts].u_obj); + const mcu_pin_obj_t* cts = validate_obj_is_free_pin_or_none(args[ARG_cts].u_obj); + const mcu_pin_obj_t* rs485_dir = validate_obj_is_free_pin_or_none(args[ARG_rs485_dir].u_obj); + + const bool rs485_invert = args[ARG_rs485_invert].u_bool; + + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert, + args[ARG_baudrate].u_int, bits, parity, stop, timeout, + args[ARG_receiver_buffer_size].u_int); return (mp_obj_t)self; } @@ -126,6 +155,12 @@ STATIC mp_obj_t busio_uart_obj_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_deinit_obj, busio_uart_obj_deinit); +STATIC void check_for_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -156,14 +191,15 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_uart___exit___obj, 4, 4, busio_ //| :return: Data read //| :rtype: bytes or None //| -//| .. method:: readinto(buf, nbytes=None) +//| .. method:: readinto(buf) //| -//| Read bytes into the ``buf``. If ``nbytes`` is specified then read at most -//| that many bytes. Otherwise, read at most ``len(buf)`` bytes. +//| Read bytes into the ``buf``. Read at most ``len(buf)`` bytes. //| //| :return: number of bytes read and stored into ``buf`` -//| :rtype: bytes or None +//| :rtype: int or None (on a non-blocking error) //| +//| *New in CircuitPython 4.0:* No length parameter is permitted. + //| .. method:: readline() //| //| Read a line, ending in a newline character. @@ -175,6 +211,8 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_uart___exit___obj, 4, 4, busio_ //| //| Write the buffer of bytes to the bus. //| +//| *New in CircuitPython 4.0:* ``buf`` must be bytes, not a string. +//| //| :return: the number of bytes written //| :rtype: int or None //| @@ -182,7 +220,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(busio_uart___exit___obj, 4, 4, busio_ // These three methods are used by the shared stream methods. STATIC mp_uint_t busio_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_uart_deinited(self)); + check_for_deinit(self); byte *buf = buf_in; // make sure we want at least 1 char @@ -195,7 +233,7 @@ STATIC mp_uint_t busio_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, STATIC mp_uint_t busio_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_uart_deinited(self)); + check_for_deinit(self); const byte *buf = buf_in; return common_hal_busio_uart_write(self, buf, size, errcode); @@ -203,7 +241,7 @@ STATIC mp_uint_t busio_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_ STATIC mp_uint_t busio_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_uart_deinited(self)); + check_for_deinit(self); mp_uint_t ret; if (request == MP_IOCTL_POLL) { mp_uint_t flags = arg; @@ -227,14 +265,14 @@ STATIC mp_uint_t busio_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t //| STATIC mp_obj_t busio_uart_obj_get_baudrate(mp_obj_t self_in) { busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_uart_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_busio_uart_get_baudrate(self)); } MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_get_baudrate_obj, busio_uart_obj_get_baudrate); STATIC mp_obj_t busio_uart_obj_set_baudrate(mp_obj_t self_in, mp_obj_t baudrate) { busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_busio_uart_deinited(self)); + check_for_deinit(self); common_hal_busio_uart_set_baudrate(self, mp_obj_get_int(baudrate)); return mp_const_none; } @@ -248,7 +286,66 @@ const mp_obj_property_t busio_uart_baudrate_obj = { (mp_obj_t)&mp_const_none_obj}, }; -//| .. class:: busio.UART.Parity +//| .. attribute:: in_waiting +//| +//| The number of bytes in the input buffer, available to be read +//| +STATIC mp_obj_t busio_uart_obj_get_in_waiting(mp_obj_t self_in) { + busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_busio_uart_rx_characters_available(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_get_in_waiting_obj, busio_uart_obj_get_in_waiting); + +const mp_obj_property_t busio_uart_in_waiting_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&busio_uart_get_in_waiting_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: timeout +//| +//| The current timeout, in seconds (float). +//| +STATIC mp_obj_t busio_uart_obj_get_timeout(mp_obj_t self_in) { + busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_busio_uart_get_timeout(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_get_timeout_obj, busio_uart_obj_get_timeout); + +STATIC mp_obj_t busio_uart_obj_set_timeout(mp_obj_t self_in, mp_obj_t timeout) { + busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + mp_float_t timeout_float = mp_obj_get_float(timeout); + validate_timeout(timeout_float); + common_hal_busio_uart_set_timeout(self, timeout_float); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(busio_uart_set_timeout_obj, busio_uart_obj_set_timeout); + + +const mp_obj_property_t busio_uart_timeout_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&busio_uart_get_timeout_obj, + (mp_obj_t)&busio_uart_set_timeout_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: reset_input_buffer() +//| +//| Discard any unread characters in the input buffer. +//| +STATIC mp_obj_t busio_uart_obj_reset_input_buffer(mp_obj_t self_in) { + busio_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + common_hal_busio_uart_clear_rx_buffer(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(busio_uart_reset_input_buffer_obj, busio_uart_obj_reset_input_buffer); + +//| .. class:: busio.UART.Parity() //| //| Enum-like class to define the parity used to verify correct data transfer. //| @@ -302,19 +399,26 @@ STATIC const mp_rom_map_elem_t busio_uart_locals_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_reset_input_buffer), MP_ROM_PTR(&busio_uart_reset_input_buffer_obj) }, + // Properties - { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&busio_uart_baudrate_obj) }, - + { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&busio_uart_baudrate_obj) }, + { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&busio_uart_in_waiting_obj) }, + { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&busio_uart_timeout_obj) }, + // Nested Enum-like Classes. { MP_ROM_QSTR(MP_QSTR_Parity), MP_ROM_PTR(&busio_uart_parity_type) }, }; STATIC MP_DEFINE_CONST_DICT(busio_uart_locals_dict, busio_uart_locals_dict_table); STATIC const mp_stream_p_t uart_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) .read = busio_uart_read, .write = busio_uart_write, .ioctl = busio_uart_ioctl, .is_text = false, + // Match PySerial when possible, such as disallowing optional length argument for .readinto() + .pyserial_compatibility = true, }; const mp_obj_type_t busio_uart_type = { diff --git a/shared-bindings/busio/UART.h b/shared-bindings/busio/UART.h index fa39d8ad5f3ee..fe71e866891c1 100644 --- a/shared-bindings/busio/UART.h +++ b/shared-bindings/busio/UART.h @@ -40,9 +40,11 @@ typedef enum { // Construct an underlying UART object. extern void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, uint32_t timeout, - uint8_t receiver_buffer_size); + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size); extern void common_hal_busio_uart_deinit(busio_uart_obj_t *self); extern bool common_hal_busio_uart_deinited(busio_uart_obj_t *self); @@ -57,9 +59,11 @@ extern size_t common_hal_busio_uart_write(busio_uart_obj_t *self, extern uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self); extern void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate); - +extern mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self); +extern void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout); extern uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self); +extern void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self); extern bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_UART_H diff --git a/shared-bindings/busio/__init__.c b/shared-bindings/busio/__init__.c index 958ee062afec2..ff2933dc6dd3e 100644 --- a/shared-bindings/busio/__init__.c +++ b/shared-bindings/busio/__init__.c @@ -35,7 +35,6 @@ #include "shared-bindings/busio/OneWire.h" #include "shared-bindings/busio/SPI.h" #include "shared-bindings/busio/UART.h" -#include "shared-bindings/busio/__init__.h" #include "py/runtime.h" diff --git a/shared-bindings/digitalio/DigitalInOut.c b/shared-bindings/digitalio/DigitalInOut.c index 1270f84e4092f..39da00cf71290 100644 --- a/shared-bindings/digitalio/DigitalInOut.c +++ b/shared-bindings/digitalio/DigitalInOut.c @@ -41,6 +41,7 @@ #include "shared-bindings/digitalio/DriveMode.h" #include "shared-bindings/digitalio/Pull.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: digitalio //| @@ -48,8 +49,8 @@ //| ========================================================= //| //| A DigitalInOut is used to digitally control I/O pins. For analog control of -//| a pin, see the :py:class:`~digitalio.AnalogIn` and -//| :py:class:`~digitalio.AnalogOut` classes. +//| a pin, see the :py:class:`analogio.AnalogIn` and +//| :py:class:`analogio.AnalogOut` classes. //| //| .. class:: DigitalInOut(pin) @@ -61,18 +62,16 @@ //| :param ~microcontroller.Pin pin: The pin to control //| STATIC mp_obj_t digitalio_digitalinout_make_new(const mp_obj_type_t *type, - mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, true); + mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); digitalio_digitalinout_obj_t *self = m_new_obj(digitalio_digitalinout_obj_t); self->base.type = &digitalio_digitalinout_type; - assert_pin(args[0], false); - mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(args[0]); - assert_pin_free(pin); + mcu_pin_obj_t *pin = validate_obj_is_free_pin(args[0]); common_hal_digitalio_digitalinout_construct(self, pin); - return (mp_obj_t)self; + return MP_OBJ_FROM_PTR(self); } //| .. method:: deinit() @@ -104,6 +103,12 @@ STATIC mp_obj_t digitalio_digitalinout_obj___exit__(size_t n_args, const mp_obj_ } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(digitalio_digitalinout_obj___exit___obj, 4, 4, digitalio_digitalinout_obj___exit__); +STATIC void check_for_deinit(digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + raise_deinited_error(); + } +} + //| //| .. method:: switch_to_output(value=False, drive_mode=digitalio.DriveMode.PUSH_PULL) //| @@ -120,7 +125,7 @@ STATIC mp_obj_t digitalio_digitalinout_switch_to_output(size_t n_args, const mp_ { MP_QSTR_drive_mode, MP_ARG_OBJ, {.u_rom_obj = &digitalio_drive_mode_push_pull_obj} }, }; digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -157,7 +162,7 @@ STATIC mp_obj_t digitalio_digitalinout_switch_to_input(size_t n_args, const mp_o { MP_QSTR_pull, MP_ARG_OBJ, {.u_rom_obj = mp_const_none} }, }; digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -190,7 +195,7 @@ extern const digitalio_digitalio_direction_obj_t digitalio_digitalio_direction_o STATIC mp_obj_t digitalio_digitalinout_obj_get_direction(mp_obj_t self_in) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); digitalio_direction_t direction = common_hal_digitalio_digitalinout_get_direction(self); if (direction == DIRECTION_INPUT) { return (mp_obj_t)&digitalio_direction_input_obj; @@ -201,13 +206,13 @@ MP_DEFINE_CONST_FUN_OBJ_1(digitalio_digitalinout_get_direction_obj, digitalio_di STATIC mp_obj_t digitalio_digitalinout_obj_set_direction(mp_obj_t self_in, mp_obj_t value) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (value == &digitalio_direction_input_obj) { common_hal_digitalio_digitalinout_switch_to_input(self, PULL_NONE); } else if (value == &digitalio_direction_output_obj) { common_hal_digitalio_digitalinout_switch_to_output(self, false, DRIVE_MODE_PUSH_PULL); } else { - mp_raise_ValueError("Invalid direction."); + mp_raise_ValueError(translate("Invalid direction.")); } return mp_const_none; } @@ -226,7 +231,7 @@ const mp_obj_property_t digitalio_digitalio_direction_obj = { //| STATIC mp_obj_t digitalio_digitalinout_obj_get_value(mp_obj_t self_in) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); bool value = common_hal_digitalio_digitalinout_get_value(self); return mp_obj_new_bool(value); } @@ -234,9 +239,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(digitalio_digitalinout_get_value_obj, digitalio_digita STATIC mp_obj_t digitalio_digitalinout_obj_set_value(mp_obj_t self_in, mp_obj_t value) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_INPUT) { - mp_raise_AttributeError("Cannot set value when direction is input."); + mp_raise_AttributeError(translate("Cannot set value when direction is input.")); return mp_const_none; } common_hal_digitalio_digitalinout_set_value(self, mp_obj_is_true(value)); @@ -260,9 +265,9 @@ const mp_obj_property_t digitalio_digitalinout_value_obj = { //| STATIC mp_obj_t digitalio_digitalinout_obj_get_drive_mode(mp_obj_t self_in) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_INPUT) { - mp_raise_AttributeError("Drive mode not used when direction is input."); + mp_raise_AttributeError(translate("Drive mode not used when direction is input.")); return mp_const_none; } digitalio_drive_mode_t drive_mode = common_hal_digitalio_digitalinout_get_drive_mode(self); @@ -275,9 +280,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(digitalio_digitalinout_get_drive_mode_obj, digitalio_d STATIC mp_obj_t digitalio_digitalinout_obj_set_drive_mode(mp_obj_t self_in, mp_obj_t drive_mode) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_INPUT) { - mp_raise_AttributeError("Drive mode not used when direction is input."); + mp_raise_AttributeError(translate("Drive mode not used when direction is input.")); return mp_const_none; } digitalio_drive_mode_t c_drive_mode = DRIVE_MODE_PUSH_PULL; @@ -308,9 +313,9 @@ const mp_obj_property_t digitalio_digitalio_drive_mode_obj = { //| STATIC mp_obj_t digitalio_digitalinout_obj_get_pull(mp_obj_t self_in) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT) { - mp_raise_AttributeError("Pull not used when direction is output."); + mp_raise_AttributeError(translate("Pull not used when direction is output.")); return mp_const_none; } digitalio_pull_t pull = common_hal_digitalio_digitalinout_get_pull(self); @@ -325,9 +330,9 @@ MP_DEFINE_CONST_FUN_OBJ_1(digitalio_digitalinout_get_pull_obj, digitalio_digital STATIC mp_obj_t digitalio_digitalinout_obj_set_pull(mp_obj_t self_in, mp_obj_t pull_obj) { digitalio_digitalinout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_digitalio_digitalinout_deinited(self)); + check_for_deinit(self); if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT) { - mp_raise_AttributeError("Pull not used when direction is output."); + mp_raise_AttributeError(translate("Pull not used when direction is output.")); return mp_const_none; } digitalio_pull_t pull = PULL_NONE; @@ -336,7 +341,7 @@ STATIC mp_obj_t digitalio_digitalinout_obj_set_pull(mp_obj_t self_in, mp_obj_t p } else if (pull_obj == &digitalio_pull_down_obj) { pull = PULL_DOWN; } else if (pull_obj != mp_const_none) { - mp_raise_ValueError("Unsupported pull value."); + mp_raise_ValueError(translate("Unsupported pull value.")); } common_hal_digitalio_digitalinout_set_pull(self, pull); return mp_const_none; @@ -373,3 +378,13 @@ const mp_obj_type_t digitalio_digitalinout_type = { .make_new = digitalio_digitalinout_make_new, .locals_dict = (mp_obj_t)&digitalio_digitalinout_locals_dict, }; + +// Helper for validating digitalio.DigitalInOut arguments +digitalio_digitalinout_obj_t *assert_digitalinout(mp_obj_t obj) { + if (!MP_OBJ_IS_TYPE(obj, &digitalio_digitalinout_type)) { + mp_raise_TypeError(translate("argument num/types mismatch")); + } + digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(obj); + check_for_deinit(pin); + return pin; +} diff --git a/shared-bindings/digitalio/DigitalInOut.h b/shared-bindings/digitalio/DigitalInOut.h index 2aaa31b7f401b..eee0d580122bd 100644 --- a/shared-bindings/digitalio/DigitalInOut.h +++ b/shared-bindings/digitalio/DigitalInOut.h @@ -52,5 +52,7 @@ void common_hal_digitalio_digitalinout_set_drive_mode(digitalio_digitalinout_obj digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode(digitalio_digitalinout_obj_t* self); void common_hal_digitalio_digitalinout_set_pull(digitalio_digitalinout_obj_t* self, digitalio_pull_t pull); digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(digitalio_digitalinout_obj_t* self); +void common_hal_digitalio_digitalinout_never_reset(digitalio_digitalinout_obj_t *self); +digitalio_digitalinout_obj_t *assert_digitalinout(mp_obj_t obj); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_DIGITALIO_DIGITALINOUT_H diff --git a/shared-bindings/digitalio/Direction.c b/shared-bindings/digitalio/Direction.c index a3433d4b07fe5..c8188fc89947f 100644 --- a/shared-bindings/digitalio/Direction.c +++ b/shared-bindings/digitalio/Direction.c @@ -43,7 +43,7 @@ //| :class:`Direction` -- defines the direction of a digital pin //| ============================================================= //| -//| .. class:: digitalio.DigitalInOut.Direction +//| .. class:: Direction //| //| Enum-like class to define which direction the digital values are //| going. diff --git a/shared-bindings/digitalio/DriveMode.c b/shared-bindings/digitalio/DriveMode.c index 477cd904c4b17..51e1e2ee5008d 100644 --- a/shared-bindings/digitalio/DriveMode.c +++ b/shared-bindings/digitalio/DriveMode.c @@ -31,7 +31,7 @@ //| :class:`DriveMode` -- defines the drive mode of a digital pin //| ============================================================= //| -//| .. class:: digitalio.DriveMode +//| .. class:: DriveMode //| //| Enum-like class to define the drive mode used when outputting //| digital values. diff --git a/shared-bindings/digitalio/Pull.c b/shared-bindings/digitalio/Pull.c index 8d03f6c051e9f..813268db7833a 100644 --- a/shared-bindings/digitalio/Pull.c +++ b/shared-bindings/digitalio/Pull.c @@ -31,7 +31,7 @@ //| :class:`Pull` -- defines the pull of a digital input pin //| ============================================================= //| -//| .. class:: digitalio.Pull +//| .. class:: Pull //| //| Enum-like class to define the pull value, if any, used while reading //| digital values in. diff --git a/shared-bindings/displayio/Bitmap.c b/shared-bindings/displayio/Bitmap.c new file mode 100644 index 0000000000000..91c17f2d13421 --- /dev/null +++ b/shared-bindings/displayio/Bitmap.c @@ -0,0 +1,193 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Bitmap.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`Bitmap` -- Stores values in a 2D array +//| ========================================================================== +//| +//| Stores values of a certain size in a 2D array +//| +//| .. class:: Bitmap(width, height, value_count) +//| +//| Create a Bitmap object with the given fixed size. Each pixel stores a value that is used to +//| index into a corresponding palette. This enables differently colored sprites to share the +//| underlying Bitmap. value_count is used to minimize the memory used to store the Bitmap. +//| +//| :param int width: The number of values wide +//| :param int height: The number of values high +//| :param int value_count: The number of possible pixel values. +//| +STATIC mp_obj_t displayio_bitmap_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 3, 3, false); + uint32_t width = mp_obj_get_int(pos_args[0]); + uint32_t height = mp_obj_get_int(pos_args[1]); + uint32_t value_count = mp_obj_get_int(pos_args[2]); + uint32_t bits = 1; + + if (value_count == 0) { + mp_raise_ValueError(translate("value_count must be > 0")); + } + while ((value_count - 1) >> bits) { + if (bits < 8) { + bits <<= 1; + } else { + bits += 8; + } + } + + displayio_bitmap_t *self = m_new_obj(displayio_bitmap_t); + self->base.type = &displayio_bitmap_type; + common_hal_displayio_bitmap_construct(self, width, height, bits); + + return MP_OBJ_FROM_PTR(self); +} +//| .. attribute:: width +//| +//| Width of the bitmap. (read only) +//| +STATIC mp_obj_t displayio_bitmap_obj_get_width(mp_obj_t self_in) { + displayio_bitmap_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_bitmap_get_width(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(displayio_bitmap_get_width_obj, displayio_bitmap_obj_get_width); + +const mp_obj_property_t displayio_bitmap_width_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_bitmap_get_width_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: height +//| +//| Height of the bitmap. (read only) +//| +STATIC mp_obj_t displayio_bitmap_obj_get_height(mp_obj_t self_in) { + displayio_bitmap_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_bitmap_get_height(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(displayio_bitmap_get_height_obj, displayio_bitmap_obj_get_height); + +const mp_obj_property_t displayio_bitmap_height_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_bitmap_get_height_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: __getitem__(index) +//| +//| Returns the value at the given index. The index can either be an x,y tuple or an int equal +//| to ``y * width + x``. +//| +//| This allows you to:: +//| +//| print(bitmap[0,1]) +//| +//| .. method:: __setitem__(index, value) +//| +//| Sets the value at the given index. The index can either be an x,y tuple or an int equal +//| to ``y * width + x``. +//| +//| This allows you to:: +//| +//| bitmap[0,1] = 3 +//| +STATIC mp_obj_t bitmap_subscr(mp_obj_t self_in, mp_obj_t index_obj, mp_obj_t value_obj) { + if (value_obj == mp_const_none) { + // delete item + mp_raise_AttributeError(translate("Cannot delete values")); + return mp_const_none; + } + + displayio_bitmap_t *self = MP_OBJ_TO_PTR(self_in); + + if (MP_OBJ_IS_TYPE(index_obj, &mp_type_slice)) { + // TODO(tannewt): Implement subscr after slices support start, stop and step tuples. + mp_raise_NotImplementedError(translate("Slices not supported")); + return mp_const_none; + } + + uint16_t x = 0; + uint16_t y = 0; + if (MP_OBJ_IS_SMALL_INT(index_obj)) { + mp_int_t i = MP_OBJ_SMALL_INT_VALUE(index_obj); + uint16_t width = common_hal_displayio_bitmap_get_width(self); + x = i % width; + y = i / width; + } else { + mp_obj_t* items; + mp_obj_get_array_fixed_n(index_obj, 2, &items); + x = mp_obj_get_int(items[0]); + y = mp_obj_get_int(items[1]); + if (x >= common_hal_displayio_bitmap_get_width(self) || y >= common_hal_displayio_bitmap_get_height(self)) { + mp_raise_IndexError(translate("pixel coordinates out of bounds")); + } + } + + if (value_obj == MP_OBJ_SENTINEL) { + // load + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_bitmap_get_pixel(self, x, y)); + } else { + mp_int_t value = mp_obj_get_int(value_obj); + if (value >= 1 << common_hal_displayio_bitmap_get_bits_per_value(self)) { + mp_raise_ValueError(translate("pixel value requires too many bits")); + } + common_hal_displayio_bitmap_set_pixel(self, x, y, value); + } + return mp_const_none; +} + +STATIC const mp_rom_map_elem_t displayio_bitmap_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&displayio_bitmap_height_obj) }, + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&displayio_bitmap_width_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_bitmap_locals_dict, displayio_bitmap_locals_dict_table); + +const mp_obj_type_t displayio_bitmap_type = { + { &mp_type_type }, + .name = MP_QSTR_Bitmap, + .make_new = displayio_bitmap_make_new, + .subscr = bitmap_subscr, + .locals_dict = (mp_obj_dict_t*)&displayio_bitmap_locals_dict, +}; diff --git a/shared-bindings/displayio/Bitmap.h b/shared-bindings/displayio/Bitmap.h new file mode 100644 index 0000000000000..90694951fa4bc --- /dev/null +++ b/shared-bindings/displayio/Bitmap.h @@ -0,0 +1,45 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_BITMAP_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_BITMAP_H + +#include "shared-module/displayio/Bitmap.h" + +extern const mp_obj_type_t displayio_bitmap_type; + +void common_hal_displayio_bitmap_construct(displayio_bitmap_t *self, uint32_t width, + uint32_t height, uint32_t bits_per_value); + +void common_hal_displayio_bitmap_load_row(displayio_bitmap_t *self, uint16_t y, uint8_t* data, + uint16_t len); +uint16_t common_hal_displayio_bitmap_get_height(displayio_bitmap_t *self); +uint16_t common_hal_displayio_bitmap_get_width(displayio_bitmap_t *self); +uint32_t common_hal_displayio_bitmap_get_bits_per_value(displayio_bitmap_t *self); +void common_hal_displayio_bitmap_set_pixel(displayio_bitmap_t *bitmap, int16_t x, int16_t y, uint32_t value); +uint32_t common_hal_displayio_bitmap_get_pixel(displayio_bitmap_t *bitmap, int16_t x, int16_t y); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_BITMAP_H diff --git a/shared-bindings/displayio/ColorConverter.c b/shared-bindings/displayio/ColorConverter.c new file mode 100644 index 0000000000000..db2d1b6e2902c --- /dev/null +++ b/shared-bindings/displayio/ColorConverter.c @@ -0,0 +1,129 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ColorConverter.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`ColorConverter` -- Converts one color format to another +//| ========================================================================================= +//| +//| Converts one color format to another. +//| +//| .. class:: ColorConverter(*, dither=False) +//| +//| Create a ColorConverter object to convert color formats. Only supports RGB888 to RGB565 +//| currently. +//| :param bool dither: Adds random noise to dither the output image + +// TODO(tannewt): Add support for other color formats. +//| +STATIC mp_obj_t displayio_colorconverter_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_dither}; + + static const mp_arg_t allowed_args[] = { + { MP_QSTR_dither, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + displayio_colorconverter_t *self = m_new_obj(displayio_colorconverter_t); + self->base.type = &displayio_colorconverter_type; + + common_hal_displayio_colorconverter_construct(self, args[ARG_dither].u_bool); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: convert(color) +//| +//| Converts the given RGB888 color to RGB565 +//| +STATIC mp_obj_t displayio_colorconverter_obj_convert(mp_obj_t self_in, mp_obj_t color_obj) { + displayio_colorconverter_t *self = MP_OBJ_TO_PTR(self_in); + + mp_int_t color; + if (!mp_obj_get_int_maybe(color_obj, &color)) { + mp_raise_ValueError(translate("color should be an int")); + } + _displayio_colorspace_t colorspace; + colorspace.depth = 16; + uint32_t output_color; + common_hal_displayio_colorconverter_convert(self, &colorspace, color, &output_color); + return MP_OBJ_NEW_SMALL_INT(output_color); +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_colorconverter_convert_obj, displayio_colorconverter_obj_convert); + +//| .. attribute:: dither +//| +//| When true the color converter dithers the output by adding random noise when +//| truncating to display bitdepth +//| +STATIC mp_obj_t displayio_colorconverter_obj_get_dither(mp_obj_t self_in) { + displayio_colorconverter_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(common_hal_displayio_colorconverter_get_dither(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_colorconverter_get_dither_obj, displayio_colorconverter_obj_get_dither); + +STATIC mp_obj_t displayio_colorconverter_obj_set_dither(mp_obj_t self_in, mp_obj_t dither) { + displayio_colorconverter_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_displayio_colorconverter_set_dither(self, mp_obj_is_true(dither)); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_colorconverter_set_dither_obj, displayio_colorconverter_obj_set_dither); + +const mp_obj_property_t displayio_colorconverter_dither_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_colorconverter_get_dither_obj, + (mp_obj_t)&displayio_colorconverter_set_dither_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t displayio_colorconverter_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_convert), MP_ROM_PTR(&displayio_colorconverter_convert_obj) }, + { MP_ROM_QSTR(MP_QSTR_dither), MP_ROM_PTR(&displayio_colorconverter_dither_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_colorconverter_locals_dict, displayio_colorconverter_locals_dict_table); + +const mp_obj_type_t displayio_colorconverter_type = { + { &mp_type_type }, + .name = MP_QSTR_ColorConverter, + .make_new = displayio_colorconverter_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_colorconverter_locals_dict, +}; + diff --git a/shared-bindings/displayio/ColorConverter.h b/shared-bindings/displayio/ColorConverter.h new file mode 100644 index 0000000000000..d550d81be5658 --- /dev/null +++ b/shared-bindings/displayio/ColorConverter.h @@ -0,0 +1,42 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_COLORCONVERTER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_COLORCONVERTER_H + +#include "shared-module/displayio/ColorConverter.h" + +#include "shared-module/displayio/Palette.h" + +extern const mp_obj_type_t displayio_colorconverter_type; + +void common_hal_displayio_colorconverter_construct(displayio_colorconverter_t* self, bool dither); +void common_hal_displayio_colorconverter_convert(displayio_colorconverter_t *colorconverter, const _displayio_colorspace_t* colorspace, uint32_t input_color, uint32_t* output_color); + +void common_hal_displayio_colorconverter_set_dither(displayio_colorconverter_t* self, bool dither); +bool common_hal_displayio_colorconverter_get_dither(displayio_colorconverter_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_COLORCONVERTER_H diff --git a/shared-bindings/displayio/Display.c b/shared-bindings/displayio/Display.c new file mode 100644 index 0000000000000..3ef7e74e9e7c9 --- /dev/null +++ b/shared-bindings/displayio/Display.c @@ -0,0 +1,510 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Display.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/objtype.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`Display` -- Manage updating a display over a display bus +//| ========================================================================== +//| +//| This initializes a display and connects it into CircuitPython. Unlike other +//| objects in CircuitPython, Display objects live until `displayio.release_displays()` +//| is called. This is done so that CircuitPython can use the display itself. +//| +//| Most people should not use this class directly. Use a specific display driver instead that will +//| contain the initialization sequence at minimum. +//| +//| .. class:: Display(display_bus, init_sequence, *, width, height, colstart=0, rowstart=0, rotation=0, color_depth=16, grayscale=False, pixels_in_byte_share_row=True, bytes_per_cell=1, reverse_pixels_in_byte=False, set_column_command=0x2a, set_row_command=0x2b, write_ram_command=0x2c, set_vertical_scroll=0, backlight_pin=None, brightness_command=None, brightness=1.0, auto_brightness=False, single_byte_bounds=False, data_as_commands=False, auto_refresh=True, native_frames_per_second=60) +//| +//| Create a Display object on the given display bus (`displayio.FourWire` or `displayio.ParallelBus`). +//| +//| The ``init_sequence`` is bitpacked to minimize the ram impact. Every command begins with a +//| command byte followed by a byte to determine the parameter count and if a delay is need after. +//| When the top bit of the second byte is 1, the next byte will be the delay time in milliseconds. +//| The remaining 7 bits are the parameter count excluding any delay byte. The third through final +//| bytes are the remaining command parameters. The next byte will begin a new command definition. +//| Here is a portion of ILI9341 init code: +//| +//| .. code-block:: python +//| +//| init_sequence = (b"\xe1\x0f\x00\x0E\x14\x03\x11\x07\x31\xC1\x48\x08\x0F\x0C\x31\x36\x0F" # Set Gamma +//| b"\x11\x80\x78"# Exit Sleep then delay 0x78 (120ms) +//| b"\x29\x80\x78"# Display on then delay 0x78 (120ms) +//| ) +//| display = displayio.Display(display_bus, init_sequence, width=320, height=240) +//| +//| The first command is 0xe1 with 15 (0xf) parameters following. The second and third are 0x11 and +//| 0x29 respectively with delays (0x80) of 120ms (0x78) and no parameters. Multiple byte literals +//| (b"") are merged together on load. The parens are needed to allow byte literals on subsequent +//| lines. +//| +//| The initialization sequence should always leave the display memory access inline with the scan +//| of the display to minimize tearing artifacts. +//| +//| :param display_bus: The bus that the display is connected to +//| :type display_bus: displayio.FourWire or displayio.ParallelBus +//| :param buffer init_sequence: Byte-packed initialization sequence. +//| :param int width: Width in pixels +//| :param int height: Height in pixels +//| :param int colstart: The index if the first visible column +//| :param int rowstart: The index if the first visible row +//| :param int rotation: The rotation of the display in degrees clockwise. Must be in 90 degree increments (0, 90, 180, 270) +//| :param int color_depth: The number of bits of color per pixel transmitted. (Some displays +//| support 18 bit but 16 is easier to transmit. The last bit is extrapolated.) +//| :param bool grayscale: True if the display only shows a single color. +//| :param bool pixels_in_byte_share_row: True when pixels are less than a byte and a byte includes pixels from the same row of the display. When False, pixels share a column. +//| :param int bytes_per_cell: Number of bytes per addressable memory location when color_depth < 8. When greater than one, bytes share a row or column according to pixels_in_byte_share_row. +//| :param bool reverse_pixels_in_byte: Reverses the pixel order within each byte when color_depth < 8. Does not apply across multiple bytes even if there is more than one byte per cell (bytes_per_cell.) +//| :param int set_column_command: Command used to set the start and end columns to update +//| :param int set_row_command: Command used so set the start and end rows to update +//| :param int write_ram_command: Command used to write pixels values into the update region. Ignored if data_as_commands is set. +//| :param int set_vertical_scroll: Command used to set the first row to show +//| :param microcontroller.Pin backlight_pin: Pin connected to the display's backlight +//| :param int brightness_command: Command to set display brightness. Usually available in OLED controllers. +//| :param bool brightness: Initial display brightness. This value is ignored if auto_brightness is True. +//| :param bool auto_brightness: If True, brightness is controlled via an ambient light sensor or other mechanism. +//| :param bool single_byte_bounds: Display column and row commands use single bytes +//| :param bool data_as_commands: Treat all init and boundary data as SPI commands. Certain displays require this. +//| :param bool auto_refresh: Automatically refresh the screen +//| :param int native_frames_per_second: Number of display refreshes per second that occur with the given init_sequence. +//| :param bool backlight_on_high: If True, pulling the backlight pin high turns the backlight on. +//| +STATIC mp_obj_t displayio_display_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_display_bus, ARG_init_sequence, ARG_width, ARG_height, ARG_colstart, ARG_rowstart, ARG_rotation, ARG_color_depth, ARG_grayscale, ARG_pixels_in_byte_share_row, ARG_bytes_per_cell, ARG_reverse_pixels_in_byte, ARG_set_column_command, ARG_set_row_command, ARG_write_ram_command, ARG_set_vertical_scroll, ARG_backlight_pin, ARG_brightness_command, ARG_brightness, ARG_auto_brightness, ARG_single_byte_bounds, ARG_data_as_commands, ARG_auto_refresh, ARG_native_frames_per_second, ARG_backlight_on_high }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_display_bus, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_init_sequence, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_width, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_height, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_colstart, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_rowstart, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_rotation, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_color_depth, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 16} }, + { MP_QSTR_grayscale, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_pixels_in_byte_share_row, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + { MP_QSTR_bytes_per_cell, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1} }, + { MP_QSTR_reverse_pixels_in_byte, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_set_column_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x2a} }, + { MP_QSTR_set_row_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x2b} }, + { MP_QSTR_write_ram_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x2c} }, + { MP_QSTR_set_vertical_scroll, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x0} }, + { MP_QSTR_backlight_pin, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = mp_const_none} }, + { MP_QSTR_brightness_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = NO_BRIGHTNESS_COMMAND} }, + { MP_QSTR_brightness, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_OBJ_NEW_SMALL_INT(1)} }, + { MP_QSTR_auto_brightness, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_single_byte_bounds, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_data_as_commands, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_auto_refresh, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + { MP_QSTR_native_frames_per_second, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 60} }, + { MP_QSTR_backlight_on_high, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t display_bus = args[ARG_display_bus].u_obj; + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_init_sequence].u_obj, &bufinfo, MP_BUFFER_READ); + + const mcu_pin_obj_t* backlight_pin = validate_obj_is_free_pin_or_none(args[ARG_backlight_pin].u_obj); + + mp_float_t brightness = mp_obj_get_float(args[ARG_brightness].u_obj); + + mp_int_t rotation = args[ARG_rotation].u_int; + if (rotation % 90 != 0) { + mp_raise_ValueError(translate("Display rotation must be in 90 degree increments")); + } + + displayio_display_obj_t *self = NULL; + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].display.base.type == NULL || + displays[i].display.base.type == &mp_type_NoneType) { + self = &displays[i].display; + break; + } + } + if (self == NULL) { + mp_raise_RuntimeError(translate("Too many displays")); + } + self->base.type = &displayio_display_type; + common_hal_displayio_display_construct( + self, + display_bus, args[ARG_width].u_int, args[ARG_height].u_int, args[ARG_colstart].u_int, args[ARG_rowstart].u_int, rotation, + args[ARG_color_depth].u_int, args[ARG_grayscale].u_bool, + args[ARG_pixels_in_byte_share_row].u_bool, args[ARG_bytes_per_cell].u_bool, args[ARG_reverse_pixels_in_byte].u_bool, + args[ARG_set_column_command].u_int, args[ARG_set_row_command].u_int, + args[ARG_write_ram_command].u_int, + args[ARG_set_vertical_scroll].u_int, + bufinfo.buf, bufinfo.len, + MP_OBJ_TO_PTR(backlight_pin), + args[ARG_brightness_command].u_int, + brightness, + args[ARG_auto_brightness].u_bool, + args[ARG_single_byte_bounds].u_bool, + args[ARG_data_as_commands].u_bool, + args[ARG_auto_refresh].u_bool, + args[ARG_native_frames_per_second].u_int, + args[ARG_backlight_on_high].u_bool + ); + + return self; +} + +// Helper to ensure we have the native super class instead of a subclass. +static displayio_display_obj_t* native_display(mp_obj_t display_obj) { + mp_obj_t native_display = mp_instance_cast_to_native_base(display_obj, &displayio_display_type); + mp_obj_assert_native_inited(native_display); + return MP_OBJ_TO_PTR(native_display); +} + +//| .. method:: show(group) +//| +//| Switches to displaying the given group of layers. When group is None, the default +//| CircuitPython terminal will be shown. +//| +//| :param Group group: The group to show. +STATIC mp_obj_t displayio_display_obj_show(mp_obj_t self_in, mp_obj_t group_in) { + displayio_display_obj_t *self = native_display(self_in); + displayio_group_t* group = NULL; + if (group_in != mp_const_none) { + group = MP_OBJ_TO_PTR(native_group(group_in)); + } + + bool ok = common_hal_displayio_display_show(self, group); + if (!ok) { + mp_raise_ValueError(translate("Group already used")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_display_show_obj, displayio_display_obj_show); + +//| .. method:: refresh(*, target_frames_per_second=60, minimum_frames_per_second=1) +//| +//| When auto refresh is off, waits for the target frame rate and then refreshes the display, +//| returning True. If the call has taken too long since the last refresh call for the given +//| target frame rate, then the refresh returns False immediately without updating the screen to +//| hopefully help getting caught up. +//| +//| If the time since the last successful refresh is below the minimum frame rate, then an +//| exception will be raised. Set minimum_frames_per_second to 0 to disable. +//| +//| When auto refresh is on, updates the display immediately. (The display will also update +//| without calls to this.) +//| +//| :param int target_frames_per_second: How many times a second `refresh` should be called and the screen updated. +//| :param int minimum_frames_per_second: The minimum number of times the screen should be updated per second. +//| +STATIC mp_obj_t displayio_display_obj_refresh(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_target_frames_per_second, ARG_minimum_frames_per_second }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_target_frames_per_second, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 60} }, + { MP_QSTR_minimum_frames_per_second, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + displayio_display_obj_t *self = native_display(pos_args[0]); + uint32_t maximum_ms_per_real_frame = 0xffffffff; + mp_int_t minimum_frames_per_second = args[ARG_minimum_frames_per_second].u_int; + if (minimum_frames_per_second > 0) { + maximum_ms_per_real_frame = 1000 / minimum_frames_per_second; + } + return mp_obj_new_bool(common_hal_displayio_display_refresh(self, 1000 / args[ARG_target_frames_per_second].u_int, maximum_ms_per_real_frame)); +} +MP_DEFINE_CONST_FUN_OBJ_KW(displayio_display_refresh_obj, 1, displayio_display_obj_refresh); + +//| .. attribute:: auto_refresh +//| +//| True when the display is refreshed automatically. +//| +STATIC mp_obj_t displayio_display_obj_get_auto_refresh(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return mp_obj_new_bool(common_hal_displayio_display_get_auto_refresh(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_auto_refresh_obj, displayio_display_obj_get_auto_refresh); + +STATIC mp_obj_t displayio_display_obj_set_auto_refresh(mp_obj_t self_in, mp_obj_t auto_refresh) { + displayio_display_obj_t *self = native_display(self_in); + + common_hal_displayio_display_set_auto_refresh(self, mp_obj_is_true(auto_refresh)); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_display_set_auto_refresh_obj, displayio_display_obj_set_auto_refresh); + +const mp_obj_property_t displayio_display_auto_refresh_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_auto_refresh_obj, + (mp_obj_t)&displayio_display_set_auto_refresh_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: brightness +//| +//| The brightness of the display as a float. 0.0 is off and 1.0 is full brightness. When +//| `auto_brightness` is True, the value of `brightness` will change automatically. +//| If `brightness` is set, `auto_brightness` will be disabled and will be set to False. +//| +STATIC mp_obj_t displayio_display_obj_get_brightness(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + mp_float_t brightness = common_hal_displayio_display_get_brightness(self); + if (brightness < 0) { + mp_raise_RuntimeError(translate("Brightness not adjustable")); + } + return mp_obj_new_float(brightness); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_brightness_obj, displayio_display_obj_get_brightness); + +STATIC mp_obj_t displayio_display_obj_set_brightness(mp_obj_t self_in, mp_obj_t brightness_obj) { + displayio_display_obj_t *self = native_display(self_in); + common_hal_displayio_display_set_auto_brightness(self, false); + mp_float_t brightness = mp_obj_get_float(brightness_obj); + if (brightness < 0 || brightness > 1.0) { + mp_raise_ValueError(translate("Brightness must be 0-1.0")); + } + bool ok = common_hal_displayio_display_set_brightness(self, brightness); + if (!ok) { + mp_raise_RuntimeError(translate("Brightness not adjustable")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_display_set_brightness_obj, displayio_display_obj_set_brightness); + +const mp_obj_property_t displayio_display_brightness_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_brightness_obj, + (mp_obj_t)&displayio_display_set_brightness_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: auto_brightness +//| +//| True when the display brightness is adjusted automatically, based on an ambient +//| light sensor or other method. Note that some displays may have this set to True by default, +//| but not actually implement automatic brightness adjustment. `auto_brightness` is set to False +//| if `brightness` is set manually. +//| +STATIC mp_obj_t displayio_display_obj_get_auto_brightness(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return mp_obj_new_bool(common_hal_displayio_display_get_auto_brightness(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_auto_brightness_obj, displayio_display_obj_get_auto_brightness); + +STATIC mp_obj_t displayio_display_obj_set_auto_brightness(mp_obj_t self_in, mp_obj_t auto_brightness) { + displayio_display_obj_t *self = native_display(self_in); + + common_hal_displayio_display_set_auto_brightness(self, mp_obj_is_true(auto_brightness)); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_display_set_auto_brightness_obj, displayio_display_obj_set_auto_brightness); + +const mp_obj_property_t displayio_display_auto_brightness_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_auto_brightness_obj, + (mp_obj_t)&displayio_display_set_auto_brightness_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + + + +//| .. attribute:: width +//| +//| Gets the width of the board +//| +//| +STATIC mp_obj_t displayio_display_obj_get_width(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_display_get_width(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_width_obj, displayio_display_obj_get_width); + +const mp_obj_property_t displayio_display_width_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_width_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: height +//| +//| Gets the height of the board +//| +//| +STATIC mp_obj_t displayio_display_obj_get_height(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_display_get_height(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_height_obj, displayio_display_obj_get_height); + +const mp_obj_property_t displayio_display_height_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_height_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: rotation +//| +//| The rotation of the display as an int in degrees. +//| +STATIC mp_obj_t displayio_display_obj_get_rotation(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_display_get_rotation(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_rotation_obj, displayio_display_obj_get_rotation); +STATIC mp_obj_t displayio_display_obj_set_rotation(mp_obj_t self_in, mp_obj_t value) { + displayio_display_obj_t *self = native_display(self_in); + common_hal_displayio_display_set_rotation(self, mp_obj_get_int(value)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_display_set_rotation_obj, displayio_display_obj_set_rotation); + + +const mp_obj_property_t displayio_display_rotation_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_rotation_obj, + (mp_obj_t)&displayio_display_set_rotation_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: bus +//| +//| The bus being used by the display +//| +//| +STATIC mp_obj_t displayio_display_obj_get_bus(mp_obj_t self_in) { + displayio_display_obj_t *self = native_display(self_in); + return common_hal_displayio_display_get_bus(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_display_get_bus_obj, displayio_display_obj_get_bus); + +const mp_obj_property_t displayio_display_bus_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_display_get_bus_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| .. method:: fill_row(y, buffer) +//| +//| Extract the pixels from a single row +//| +//| :param int y: The top edge of the area +//| :param bytearray buffer: The buffer in which to place the pixel data +STATIC mp_obj_t displayio_display_obj_fill_row(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_y, ARG_buffer }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_y, MP_ARG_INT | MP_ARG_REQUIRED, {.u_int = -1} }, + { MP_QSTR_buffer, MP_ARG_OBJ | MP_ARG_REQUIRED, {} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + displayio_display_obj_t *self = native_display(pos_args[0]); + mp_int_t y = args[ARG_y].u_int; + mp_obj_t *result = args[ARG_buffer].u_obj; + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(result, &bufinfo, MP_BUFFER_WRITE); + + if (bufinfo.typecode != BYTEARRAY_TYPECODE) { + mp_raise_ValueError(translate("Buffer is not a bytearray.")); + } + if (self->core.colorspace.depth != 16) { + mp_raise_ValueError(translate("Display must have a 16 bit colorspace.")); + } + + displayio_area_t area = { + .x1 = 0, + .y1 = y, + .x2 = self->core.width, + .y2 = y + 1 + }; + uint8_t pixels_per_word = (sizeof(uint32_t) * 8) / self->core.colorspace.depth; + uint16_t buffer_size = self->core.width / pixels_per_word; + uint16_t pixels_per_buffer = displayio_area_size(&area); + if (pixels_per_buffer % pixels_per_word) { + buffer_size += 1; + } + + uint32_t *result_buffer = bufinfo.buf; + size_t result_buffer_size = bufinfo.len; + + if (result_buffer_size >= (buffer_size * 4)) { + volatile uint32_t mask_length = (pixels_per_buffer / 32) + 1; + uint32_t mask[mask_length]; + + for (uint16_t k = 0; k < mask_length; k++) { + mask[k] = 0x00000000; + } + + displayio_display_core_fill_area(&self->core, &area, mask, result_buffer); + return result; + } else { + mp_raise_ValueError(translate("Buffer is too small")); + } +} +MP_DEFINE_CONST_FUN_OBJ_KW(displayio_display_fill_row_obj, 1, displayio_display_obj_fill_row); + +STATIC const mp_rom_map_elem_t displayio_display_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_show), MP_ROM_PTR(&displayio_display_show_obj) }, + { MP_ROM_QSTR(MP_QSTR_refresh), MP_ROM_PTR(&displayio_display_refresh_obj) }, + { MP_ROM_QSTR(MP_QSTR_fill_row), MP_ROM_PTR(&displayio_display_fill_row_obj) }, + + { MP_ROM_QSTR(MP_QSTR_auto_refresh), MP_ROM_PTR(&displayio_display_auto_refresh_obj) }, + + { MP_ROM_QSTR(MP_QSTR_brightness), MP_ROM_PTR(&displayio_display_brightness_obj) }, + { MP_ROM_QSTR(MP_QSTR_auto_brightness), MP_ROM_PTR(&displayio_display_auto_brightness_obj) }, + + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&displayio_display_width_obj) }, + { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&displayio_display_height_obj) }, + { MP_ROM_QSTR(MP_QSTR_rotation), MP_ROM_PTR(&displayio_display_rotation_obj) }, + { MP_ROM_QSTR(MP_QSTR_bus), MP_ROM_PTR(&displayio_display_bus_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_display_locals_dict, displayio_display_locals_dict_table); + +const mp_obj_type_t displayio_display_type = { + { &mp_type_type }, + .name = MP_QSTR_Display, + .make_new = displayio_display_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_display_locals_dict, +}; diff --git a/shared-bindings/displayio/Display.h b/shared-bindings/displayio/Display.h new file mode 100644 index 0000000000000..8c2e20262b4c8 --- /dev/null +++ b/shared-bindings/displayio/Display.h @@ -0,0 +1,75 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_DISPLAY_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_DISPLAY_H + +#include "common-hal/microcontroller/Pin.h" + +#include "shared-module/displayio/Display.h" +#include "shared-module/displayio/Group.h" + +extern const mp_obj_type_t displayio_display_type; + +#define DELAY 0x80 + +#define NO_BRIGHTNESS_COMMAND 0x100 + +void common_hal_displayio_display_construct(displayio_display_obj_t* self, + mp_obj_t bus, uint16_t width, uint16_t height, + int16_t colstart, int16_t rowstart, uint16_t rotation, uint16_t color_depth, bool grayscale, + bool pixels_in_byte_share_row, uint8_t bytes_per_cell, bool reverse_pixels_in_byte, + uint8_t set_column_command, uint8_t set_row_command, uint8_t write_ram_command, uint8_t set_vertical_scroll, + uint8_t* init_sequence, uint16_t init_sequence_len, const mcu_pin_obj_t* backlight_pin, uint16_t brightness_command, + mp_float_t brightness, bool auto_brightness, + bool single_byte_bounds, bool data_as_commands, bool auto_refresh, uint16_t native_frames_per_second, bool backlight_on_high); + +bool common_hal_displayio_display_show(displayio_display_obj_t* self, + displayio_group_t* root_group); + +bool common_hal_displayio_display_refresh(displayio_display_obj_t* self, uint32_t target_ms_per_frame, uint32_t maximum_ms_per_real_frame); + +bool common_hal_displayio_display_get_auto_refresh(displayio_display_obj_t* self); +void common_hal_displayio_display_set_auto_refresh(displayio_display_obj_t* self, bool auto_refresh); + +uint16_t common_hal_displayio_display_get_width(displayio_display_obj_t* self); +uint16_t common_hal_displayio_display_get_height(displayio_display_obj_t* self); +uint16_t common_hal_displayio_display_get_rotation(displayio_display_obj_t* self); +void common_hal_displayio_display_set_rotation(displayio_display_obj_t* self, int rotation); + +bool common_hal_displayio_display_get_auto_brightness(displayio_display_obj_t* self); +void common_hal_displayio_display_set_auto_brightness(displayio_display_obj_t* self, bool auto_brightness); + +bool common_hal_displayio_display_get_dither(displayio_display_obj_t* self); +void common_hal_displayio_display_set_dither(displayio_display_obj_t* self, bool dither); + +mp_float_t common_hal_displayio_display_get_brightness(displayio_display_obj_t* self); +bool common_hal_displayio_display_set_brightness(displayio_display_obj_t* self, mp_float_t brightness); + +mp_obj_t common_hal_displayio_display_get_bus(displayio_display_obj_t* self); + + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_DISPLAY_H diff --git a/shared-bindings/displayio/EPaperDisplay.c b/shared-bindings/displayio/EPaperDisplay.c new file mode 100644 index 0000000000000..25a4a41e922ea --- /dev/null +++ b/shared-bindings/displayio/EPaperDisplay.c @@ -0,0 +1,307 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/EPaperDisplay.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/objtype.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`EPaperDisplay` -- Manage updating an epaper display over a display bus +//| ============================================================================== +//| +//| This initializes an epaper display and connects it into CircuitPython. Unlike other +//| objects in CircuitPython, EPaperDisplay objects live until `displayio.release_displays()` +//| is called. This is done so that CircuitPython can use the display itself. +//| +//| Most people should not use this class directly. Use a specific display driver instead that will +//| contain the startup and shutdown sequences at minimum. +//| +//| .. class:: EPaperDisplay(display_bus, start_sequence, stop_sequence, *, width, height, ram_width, ram_height, colstart=0, rowstart=0, rotation=0, set_column_window_command=None, set_row_window_command=None, single_byte_bounds=False, write_black_ram_command, black_bits_inverted=False, write_color_ram_command=None, color_bits_inverted=False, highlight_color=0x000000, refresh_display_command, refresh_time=40, busy_pin=None, busy_state=True, seconds_per_frame=180, always_toggle_chip_select=False) +//| +//| Create a EPaperDisplay object on the given display bus (`displayio.FourWire` or `displayio.ParallelBus`). +//| +//| The ``start_sequence`` and ``stop_sequence`` are bitpacked to minimize the ram impact. Every +//| command begins with a command byte followed by a byte to determine the parameter count and if +//| a delay is need after. When the top bit of the second byte is 1, the next byte will be the +//| delay time in milliseconds. The remaining 7 bits are the parameter count excluding any delay +//| byte. The third through final bytes are the remaining command parameters. The next byte will +//| begin a new command definition. +//| +//| :param display_bus: The bus that the display is connected to +//| :type display_bus: displayio.FourWire or displayio.ParallelBus +//| :param buffer start_sequence: Byte-packed initialization sequence. +//| :param buffer stop_sequence: Byte-packed initialization sequence. +//| :param int width: Width in pixels +//| :param int height: Height in pixels +//| :param int ram_width: RAM width in pixels +//| :param int ram_height: RAM height in pixels +//| :param int colstart: The index if the first visible column +//| :param int rowstart: The index if the first visible row +//| :param int rotation: The rotation of the display in degrees clockwise. Must be in 90 degree increments (0, 90, 180, 270) +//| :param int set_column_window_command: Command used to set the start and end columns to update +//| :param int set_row_window_command: Command used so set the start and end rows to update +//| :param int set_current_column_command: Command used to set the current column location +//| :param int set_current_row_command: Command used to set the current row location +//| :param int write_black_ram_command: Command used to write pixels values into the update region +//| :param bool black_bits_inverted: True if 0 bits are used to show black pixels. Otherwise, 1 means to show black. +//| :param int write_color_ram_command: Command used to write pixels values into the update region +//| :param bool color_bits_inverted: True if 0 bits are used to show the color. Otherwise, 1 means to show color. +//| :param int highlight_color: RGB888 of source color to highlight with third ePaper color. +//| :param int refresh_display_command: Command used to start a display refresh +//| :param float refresh_time: Time it takes to refresh the display before the stop_sequence should be sent. Ignored when busy_pin is provided. +//| :param microcontroller.Pin busy_pin: Pin used to signify the display is busy +//| :param bool busy_state: State of the busy pin when the display is busy +//| :param float seconds_per_frame: Minimum number of seconds between screen refreshes +//| :param bool always_toggle_chip_select: When True, chip select is toggled every byte +//| +STATIC mp_obj_t displayio_epaperdisplay_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_display_bus, ARG_start_sequence, ARG_stop_sequence, ARG_width, ARG_height, ARG_ram_width, ARG_ram_height, ARG_colstart, ARG_rowstart, ARG_rotation, ARG_set_column_window_command, ARG_set_row_window_command, ARG_set_current_column_command, ARG_set_current_row_command, ARG_write_black_ram_command, ARG_black_bits_inverted, ARG_write_color_ram_command, ARG_color_bits_inverted, ARG_highlight_color, ARG_refresh_display_command, ARG_refresh_time, ARG_busy_pin, ARG_busy_state, ARG_seconds_per_frame, ARG_always_toggle_chip_select }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_display_bus, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_start_sequence, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_stop_sequence, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_width, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_height, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_ram_width, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_ram_height, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED, }, + { MP_QSTR_colstart, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_rowstart, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_rotation, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_set_column_window_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = NO_COMMAND} }, + { MP_QSTR_set_row_window_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = NO_COMMAND} }, + { MP_QSTR_set_current_column_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = NO_COMMAND} }, + { MP_QSTR_set_current_row_command, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = NO_COMMAND} }, + { MP_QSTR_write_black_ram_command, MP_ARG_INT | MP_ARG_REQUIRED }, + { MP_QSTR_black_bits_inverted, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_write_color_ram_command, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = mp_const_none} }, + { MP_QSTR_color_bits_inverted, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_highlight_color, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0x000000} }, + { MP_QSTR_refresh_display_command, MP_ARG_INT | MP_ARG_REQUIRED }, + { MP_QSTR_refresh_time, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_OBJ_NEW_SMALL_INT(40)} }, + { MP_QSTR_busy_pin, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = mp_const_none} }, + { MP_QSTR_busy_state, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = true} }, + { MP_QSTR_seconds_per_frame, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_OBJ_NEW_SMALL_INT(180)} }, + { MP_QSTR_always_toggle_chip_select, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t display_bus = args[ARG_display_bus].u_obj; + + mp_buffer_info_t start_bufinfo; + mp_get_buffer_raise(args[ARG_start_sequence].u_obj, &start_bufinfo, MP_BUFFER_READ); + mp_buffer_info_t stop_bufinfo; + mp_get_buffer_raise(args[ARG_stop_sequence].u_obj, &stop_bufinfo, MP_BUFFER_READ); + + + const mcu_pin_obj_t* busy_pin = validate_obj_is_free_pin_or_none(args[ARG_busy_pin].u_obj); + + mp_int_t rotation = args[ARG_rotation].u_int; + if (rotation % 90 != 0) { + mp_raise_ValueError(translate("Display rotation must be in 90 degree increments")); + } + + displayio_epaperdisplay_obj_t *self = NULL; + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].display.base.type == NULL || + displays[i].display.base.type == &mp_type_NoneType) { + self = &displays[i].epaper_display; + break; + } + } + if (self == NULL) { + mp_raise_RuntimeError(translate("Too many displays")); + } + + mp_float_t refresh_time = mp_obj_get_float(args[ARG_refresh_time].u_obj); + mp_float_t seconds_per_frame = mp_obj_get_float(args[ARG_seconds_per_frame].u_obj); + + mp_int_t write_color_ram_command = NO_COMMAND; + mp_int_t highlight_color = args[ARG_highlight_color].u_int; + if (args[ARG_write_color_ram_command].u_obj != mp_const_none) { + write_color_ram_command = mp_obj_get_int(args[ARG_write_color_ram_command].u_obj); + } + + self->base.type = &displayio_epaperdisplay_type; + common_hal_displayio_epaperdisplay_construct( + self, + display_bus, + start_bufinfo.buf, start_bufinfo.len, stop_bufinfo.buf, stop_bufinfo.len, + args[ARG_width].u_int, args[ARG_height].u_int, args[ARG_ram_width].u_int, args[ARG_ram_height].u_int, args[ARG_colstart].u_int, args[ARG_rowstart].u_int, rotation, + args[ARG_set_column_window_command].u_int, args[ARG_set_row_window_command].u_int, + args[ARG_set_current_column_command].u_int, args[ARG_set_current_row_command].u_int, + args[ARG_write_black_ram_command].u_int, args[ARG_black_bits_inverted].u_bool, write_color_ram_command, args[ARG_color_bits_inverted].u_bool, highlight_color, args[ARG_refresh_display_command].u_int, refresh_time, + busy_pin, args[ARG_busy_state].u_bool, seconds_per_frame, args[ARG_always_toggle_chip_select].u_bool + ); + + return self; +} + +// Helper to ensure we have the native super class instead of a subclass. +static displayio_epaperdisplay_obj_t* native_display(mp_obj_t display_obj) { + mp_obj_t native_display = mp_instance_cast_to_native_base(display_obj, &displayio_epaperdisplay_type); + mp_obj_assert_native_inited(native_display); + return MP_OBJ_TO_PTR(native_display); +} + +//| .. method:: show(group) +//| +//| Switches to displaying the given group of layers. When group is None, the default +//| CircuitPython terminal will be shown. +//| +//| :param Group group: The group to show. +STATIC mp_obj_t displayio_epaperdisplay_obj_show(mp_obj_t self_in, mp_obj_t group_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + displayio_group_t* group = NULL; + if (group_in != mp_const_none) { + group = MP_OBJ_TO_PTR(native_group(group_in)); + } + + bool ok = common_hal_displayio_epaperdisplay_show(self, group); + if (!ok) { + mp_raise_ValueError(translate("Group already used")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_epaperdisplay_show_obj, displayio_epaperdisplay_obj_show); + +//| .. method:: refresh() +//| +//| Refreshes the display immediately or raises an exception if too soon. Use +//| ``time.sleep(display.time_to_refresh)`` to sleep until a refresh can occur. +//| +STATIC mp_obj_t displayio_epaperdisplay_obj_refresh(mp_obj_t self_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + bool ok = common_hal_displayio_epaperdisplay_refresh(self); + if (!ok) { + mp_raise_RuntimeError(translate("Refresh too soon")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_epaperdisplay_refresh_obj, displayio_epaperdisplay_obj_refresh); + +//| .. attribute:: time_to_refresh +//| +//| Time, in fractional seconds, until the ePaper display can be refreshed. +//| +//| +STATIC mp_obj_t displayio_epaperdisplay_obj_get_time_to_refresh(mp_obj_t self_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + return mp_obj_new_float(common_hal_displayio_epaperdisplay_get_time_to_refresh(self) / 1000.0); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_epaperdisplay_get_time_to_refresh_obj, displayio_epaperdisplay_obj_get_time_to_refresh); + +const mp_obj_property_t displayio_epaperdisplay_time_to_refresh_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_epaperdisplay_get_time_to_refresh_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: width +//| +//| Gets the width of the display in pixels +//| +//| +STATIC mp_obj_t displayio_epaperdisplay_obj_get_width(mp_obj_t self_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_epaperdisplay_get_width(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_epaperdisplay_get_width_obj, displayio_epaperdisplay_obj_get_width); + +const mp_obj_property_t displayio_epaperdisplay_width_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_epaperdisplay_get_width_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: height +//| +//| Gets the height of the display in pixels +//| +//| +STATIC mp_obj_t displayio_epaperdisplay_obj_get_height(mp_obj_t self_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_epaperdisplay_get_height(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_epaperdisplay_get_height_obj, displayio_epaperdisplay_obj_get_height); + +const mp_obj_property_t displayio_epaperdisplay_height_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_epaperdisplay_get_height_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: bus +//| +//| The bus being used by the display +//| +//| +STATIC mp_obj_t displayio_epaperdisplay_obj_get_bus(mp_obj_t self_in) { + displayio_epaperdisplay_obj_t *self = native_display(self_in); + return common_hal_displayio_epaperdisplay_get_bus(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_epaperdisplay_get_bus_obj, displayio_epaperdisplay_obj_get_bus); + +const mp_obj_property_t displayio_epaperdisplay_bus_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_epaperdisplay_get_bus_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t displayio_epaperdisplay_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_show), MP_ROM_PTR(&displayio_epaperdisplay_show_obj) }, + { MP_ROM_QSTR(MP_QSTR_refresh), MP_ROM_PTR(&displayio_epaperdisplay_refresh_obj) }, + + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&displayio_epaperdisplay_width_obj) }, + { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&displayio_epaperdisplay_height_obj) }, + { MP_ROM_QSTR(MP_QSTR_bus), MP_ROM_PTR(&displayio_epaperdisplay_bus_obj) }, + { MP_ROM_QSTR(MP_QSTR_time_to_refresh), MP_ROM_PTR(&displayio_epaperdisplay_time_to_refresh_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_epaperdisplay_locals_dict, displayio_epaperdisplay_locals_dict_table); + +const mp_obj_type_t displayio_epaperdisplay_type = { + { &mp_type_type }, + .name = MP_QSTR_EPaperDisplay, + .make_new = displayio_epaperdisplay_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_epaperdisplay_locals_dict, +}; diff --git a/shared-bindings/displayio/EPaperDisplay.h b/shared-bindings/displayio/EPaperDisplay.h new file mode 100644 index 0000000000000..e4b81c8838e08 --- /dev/null +++ b/shared-bindings/displayio/EPaperDisplay.h @@ -0,0 +1,61 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_EPAPERDISPLAY_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_EPAPERDISPLAY_H + +#include "common-hal/microcontroller/Pin.h" + +#include "shared-module/displayio/EPaperDisplay.h" +#include "shared-module/displayio/Group.h" + +extern const mp_obj_type_t displayio_epaperdisplay_type; + +#define DELAY 0x80 + +#define NO_COMMAND 0x100 + +void common_hal_displayio_epaperdisplay_construct(displayio_epaperdisplay_obj_t* self, + mp_obj_t bus, uint8_t* start_sequence, uint16_t start_sequence_len, uint8_t* stop_sequence, uint16_t stop_sequence_len, + uint16_t width, uint16_t height, uint16_t ram_width, uint16_t ram_height, int16_t colstart, int16_t rowstart, uint16_t rotation, + uint16_t set_column_window_command, uint16_t set_row_window_command, + uint16_t set_current_column_command, uint16_t set_current_row_command, + uint16_t write_black_ram_command, bool black_bits_inverted, uint16_t write_color_ram_command, bool color_bits_inverted, uint32_t highlight_color, uint16_t refresh_display_command, mp_float_t refresh_time, + const mcu_pin_obj_t* busy_pin, bool busy_state, mp_float_t seconds_per_frame, bool always_toggle_chip_select); + +bool common_hal_displayio_epaperdisplay_refresh(displayio_epaperdisplay_obj_t* self); + +bool common_hal_displayio_epaperdisplay_show(displayio_epaperdisplay_obj_t* self, displayio_group_t* root_group); + +// Returns time in milliseconds. +uint32_t common_hal_displayio_epaperdisplay_get_time_to_refresh(displayio_epaperdisplay_obj_t* self); + +uint16_t common_hal_displayio_epaperdisplay_get_width(displayio_epaperdisplay_obj_t* self); +uint16_t common_hal_displayio_epaperdisplay_get_height(displayio_epaperdisplay_obj_t* self); + +mp_obj_t common_hal_displayio_epaperdisplay_get_bus(displayio_epaperdisplay_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_EPAPERDISPLAY_H diff --git a/shared-bindings/displayio/FourWire.c b/shared-bindings/displayio/FourWire.c new file mode 100644 index 0000000000000..77329578a43b8 --- /dev/null +++ b/shared-bindings/displayio/FourWire.c @@ -0,0 +1,179 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018-2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/FourWire.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`FourWire` -- Manage updating a display over SPI four wire protocol +//| ========================================================================== +//| +//| Manage updating a display over SPI four wire protocol in the background while Python code runs. +//| It doesn't handle display initialization. +//| +//| .. class:: FourWire(spi_bus, *, command, chip_select, reset=None, baudrate=24000000, polarity=0, phase=0) +//| +//| Create a FourWire object associated with the given pins. +//| +//| The SPI bus and pins are then in use by the display until `displayio.release_displays()` is +//| called even after a reload. (It does this so CircuitPython can use the display after your code +//| is done.) So, the first time you initialize a display bus in code.py you should call +//| :py:func`displayio.release_displays` first, otherwise it will error after the first code.py run. +//| +//| :param busio.SPI spi_bus: The SPI bus that make up the clock and data lines +//| :param microcontroller.Pin command: Data or command pin +//| :param microcontroller.Pin chip_select: Chip select pin +//| :param microcontroller.Pin reset: Reset pin. When None only software reset can be used +//| :param int baudrate: Maximum baudrate in Hz for the display on the bus +//| :param int polarity: the base state of the clock line (0 or 1) +//| :param int phase: the edge of the clock that data is captured. First (0) +//| or second (1). Rising or falling depends on clock polarity. +//| +STATIC mp_obj_t displayio_fourwire_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_spi_bus, ARG_command, ARG_chip_select, ARG_reset, ARG_baudrate, ARG_polarity, ARG_phase }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_spi_bus, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_command, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_chip_select, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_reset, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = mp_const_none} }, + { MP_QSTR_baudrate, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 24000000} }, + { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mcu_pin_obj_t *command = validate_obj_is_free_pin(args[ARG_command].u_obj); + mcu_pin_obj_t *chip_select = validate_obj_is_free_pin(args[ARG_chip_select].u_obj); + mcu_pin_obj_t *reset = validate_obj_is_free_pin_or_none(args[ARG_reset].u_obj); + + displayio_fourwire_obj_t* self = NULL; + mp_obj_t spi = args[ARG_spi_bus].u_obj; + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].fourwire_bus.base.type == NULL || + displays[i].fourwire_bus.base.type == &mp_type_NoneType) { + self = &displays[i].fourwire_bus; + self->base.type = &displayio_fourwire_type; + break; + } + } + if (self == NULL) { + mp_raise_RuntimeError(translate("Too many display busses")); + } + + uint8_t polarity = args[ARG_polarity].u_int; + if (polarity != 0 && polarity != 1) { + mp_raise_ValueError(translate("Invalid polarity")); + } + uint8_t phase = args[ARG_phase].u_int; + if (phase != 0 && phase != 1) { + mp_raise_ValueError(translate("Invalid phase")); + } + + common_hal_displayio_fourwire_construct(self, + MP_OBJ_TO_PTR(spi), command, chip_select, reset, args[ARG_baudrate].u_int, polarity, phase); + return self; +} + +//| .. method:: reset() +//| +//| Performs a hardware reset via the reset pin. Raises an exception if called when no reset pin +//| is available. +//| +STATIC mp_obj_t displayio_fourwire_obj_reset(mp_obj_t self_in) { + displayio_fourwire_obj_t *self = self_in; + + if (!common_hal_displayio_fourwire_reset(self)) { + mp_raise_RuntimeError(translate("no reset pin available")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_fourwire_reset_obj, displayio_fourwire_obj_reset); + +//| .. method:: send(command, data, *, toggle_every_byte=False) +//| +//| Sends the given command value followed by the full set of data. Display state, such as +//| vertical scroll, set via ``send`` may or may not be reset once the code is done. +//| +STATIC mp_obj_t displayio_fourwire_obj_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_command, ARG_data, ARG_toggle_every_byte }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_command, MP_ARG_INT | MP_ARG_REQUIRED }, + { MP_QSTR_data, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_toggle_every_byte, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t command_int = args[ARG_command].u_int; + if (command_int > 255 || command_int < 0) { + mp_raise_ValueError(translate("Command must be an int between 0 and 255")); + } + displayio_fourwire_obj_t *self = pos_args[0]; + uint8_t command = command_int; + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_data].u_obj, &bufinfo, MP_BUFFER_READ); + + // Wait for display bus to be available. + while (!common_hal_displayio_fourwire_begin_transaction(self)) { + RUN_BACKGROUND_TASKS; + } + display_chip_select_behavior_t chip_select = CHIP_SELECT_UNTOUCHED; + if (args[ARG_toggle_every_byte].u_bool) { + chip_select = CHIP_SELECT_TOGGLE_EVERY_BYTE; + } + common_hal_displayio_fourwire_send(self, DISPLAY_COMMAND, chip_select, &command, 1); + common_hal_displayio_fourwire_send(self, DISPLAY_DATA, chip_select, ((uint8_t*) bufinfo.buf), bufinfo.len); + common_hal_displayio_fourwire_end_transaction(self); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(displayio_fourwire_send_obj, 3, displayio_fourwire_obj_send); + +STATIC const mp_rom_map_elem_t displayio_fourwire_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&displayio_fourwire_reset_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&displayio_fourwire_send_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_fourwire_locals_dict, displayio_fourwire_locals_dict_table); + +const mp_obj_type_t displayio_fourwire_type = { + { &mp_type_type }, + .name = MP_QSTR_FourWire, + .make_new = displayio_fourwire_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_fourwire_locals_dict, +}; diff --git a/shared-bindings/displayio/FourWire.h b/shared-bindings/displayio/FourWire.h new file mode 100644 index 0000000000000..ac186d2c3ee76 --- /dev/null +++ b/shared-bindings/displayio/FourWire.h @@ -0,0 +1,55 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_FOURWIRE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_FOURWIRE_H + +#include "shared-module/displayio/FourWire.h" + +#include "shared-bindings/displayio/__init__.h" +#include "common-hal/microcontroller/Pin.h" + +#include "shared-module/displayio/Group.h" + +extern const mp_obj_type_t displayio_fourwire_type; + +void common_hal_displayio_fourwire_construct(displayio_fourwire_obj_t* self, + busio_spi_obj_t* spi, const mcu_pin_obj_t* command, + const mcu_pin_obj_t* chip_select, const mcu_pin_obj_t* reset, uint32_t baudrate, + uint8_t polarity, uint8_t phase); + +void common_hal_displayio_fourwire_deinit(displayio_fourwire_obj_t* self); + +bool common_hal_displayio_fourwire_reset(mp_obj_t self); +bool common_hal_displayio_fourwire_bus_free(mp_obj_t self); + +bool common_hal_displayio_fourwire_begin_transaction(mp_obj_t self); + +void common_hal_displayio_fourwire_send(mp_obj_t self, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length); + +void common_hal_displayio_fourwire_end_transaction(mp_obj_t self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_FOURWIRE_H diff --git a/shared-bindings/displayio/Group.c b/shared-bindings/displayio/Group.c new file mode 100644 index 0000000000000..dd7600eb9c8a1 --- /dev/null +++ b/shared-bindings/displayio/Group.c @@ -0,0 +1,354 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Group.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/objtype.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`Group` -- Group together sprites and subgroups +//| ========================================================================== +//| +//| Manage a group of sprites and groups and how they are inter-related. +//| +//| .. class:: Group(*, max_size=4, scale=1, x=0, y=0) +//| +//| Create a Group of a given size and scale. Scale is in one dimension. For example, scale=2 +//| leads to a layer's pixel being 2x2 pixels when in the group. +//| +//| :param int max_size: The maximum group size. +//| :param int scale: Scale of layer pixels in one dimension. +//| :param int x: Initial x position within the parent. +//| :param int y: Initial y position within the parent. +//| +STATIC mp_obj_t displayio_group_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_max_size, ARG_scale, ARG_x, ARG_y }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_max_size, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 4} }, + { MP_QSTR_scale, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1} }, + { MP_QSTR_x, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_y, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t max_size = args[ARG_max_size].u_int; + if (max_size < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_max_size); + } + + mp_int_t scale = args[ARG_scale].u_int; + if (scale < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_scale); + } + + displayio_group_t *self = m_new_obj(displayio_group_t); + self->base.type = &displayio_group_type; + common_hal_displayio_group_construct(self, max_size, scale, args[ARG_x].u_int, args[ARG_y].u_int); + + return MP_OBJ_FROM_PTR(self); +} + +// Helper to ensure we have the native super class instead of a subclass. +displayio_group_t* native_group(mp_obj_t group_obj) { + mp_obj_t native_group = mp_instance_cast_to_native_base(group_obj, &displayio_group_type); + if (native_group == MP_OBJ_NULL) { + mp_raise_ValueError_varg(translate("Must be a %q subclass."), MP_QSTR_Group); + } + mp_obj_assert_native_inited(native_group); + return MP_OBJ_TO_PTR(native_group); +} + +//| .. attribute:: hidden +//| +//| True when the Group and all of it's layers are not visible. When False, the Group's layers +//| are visible if they haven't been hidden. +//| +STATIC mp_obj_t displayio_group_obj_get_hidden(mp_obj_t self_in) { + displayio_group_t *self = native_group(self_in); + return mp_obj_new_bool(common_hal_displayio_group_get_hidden(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_group_get_hidden_obj, displayio_group_obj_get_hidden); + +STATIC mp_obj_t displayio_group_obj_set_hidden(mp_obj_t self_in, mp_obj_t hidden_obj) { + displayio_group_t *self = native_group(self_in); + + common_hal_displayio_group_set_hidden(self, mp_obj_is_true(hidden_obj)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_set_hidden_obj, displayio_group_obj_set_hidden); + +const mp_obj_property_t displayio_group_hidden_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_group_get_hidden_obj, + (mp_obj_t)&displayio_group_set_hidden_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: scale +//| +//| Scales each pixel within the Group in both directions. For example, when scale=2 each pixel +//| will be represented by 2x2 pixels. +//| +STATIC mp_obj_t displayio_group_obj_get_scale(mp_obj_t self_in) { + displayio_group_t *self = native_group(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_group_get_scale(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_group_get_scale_obj, displayio_group_obj_get_scale); + +STATIC mp_obj_t displayio_group_obj_set_scale(mp_obj_t self_in, mp_obj_t scale_obj) { + displayio_group_t *self = native_group(self_in); + + mp_int_t scale = mp_obj_get_int(scale_obj); + if (scale < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_scale); + } + common_hal_displayio_group_set_scale(self, scale); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_set_scale_obj, displayio_group_obj_set_scale); + +const mp_obj_property_t displayio_group_scale_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_group_get_scale_obj, + (mp_obj_t)&displayio_group_set_scale_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: x +//| +//| X position of the Group in the parent. +//| +STATIC mp_obj_t displayio_group_obj_get_x(mp_obj_t self_in) { + displayio_group_t *self = native_group(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_group_get_x(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_group_get_x_obj, displayio_group_obj_get_x); + +STATIC mp_obj_t displayio_group_obj_set_x(mp_obj_t self_in, mp_obj_t x_obj) { + displayio_group_t *self = native_group(self_in); + + mp_int_t x = mp_obj_get_int(x_obj); + common_hal_displayio_group_set_x(self, x); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_set_x_obj, displayio_group_obj_set_x); + +const mp_obj_property_t displayio_group_x_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_group_get_x_obj, + (mp_obj_t)&displayio_group_set_x_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: y +//| +//| Y position of the Group in the parent. +//| +STATIC mp_obj_t displayio_group_obj_get_y(mp_obj_t self_in) { + displayio_group_t *self = native_group(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_group_get_y(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_group_get_y_obj, displayio_group_obj_get_y); + +STATIC mp_obj_t displayio_group_obj_set_y(mp_obj_t self_in, mp_obj_t y_obj) { + displayio_group_t *self = native_group(self_in); + + mp_int_t y = mp_obj_get_int(y_obj); + common_hal_displayio_group_set_y(self, y); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_set_y_obj, displayio_group_obj_set_y); + +const mp_obj_property_t displayio_group_y_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_group_get_y_obj, + (mp_obj_t)&displayio_group_set_y_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: append(layer) +//| +//| Append a layer to the group. It will be drawn above other layers. +//| +STATIC mp_obj_t displayio_group_obj_append(mp_obj_t self_in, mp_obj_t layer) { + displayio_group_t *self = native_group(self_in); + common_hal_displayio_group_insert(self, common_hal_displayio_group_get_len(self), layer); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_append_obj, displayio_group_obj_append); + +//| .. method:: insert(index, layer) +//| +//| Insert a layer into the group. +//| +STATIC mp_obj_t displayio_group_obj_insert(mp_obj_t self_in, mp_obj_t index_obj, mp_obj_t layer) { + displayio_group_t *self = native_group(self_in); + size_t index = mp_get_index(&displayio_group_type, common_hal_displayio_group_get_len(self), index_obj, false); + common_hal_displayio_group_insert(self, index, layer); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_3(displayio_group_insert_obj, displayio_group_obj_insert); + + +//| .. method:: index(layer) +//| +//| Returns the index of the first copy of layer. Raises ValueError if not found. +//| +STATIC mp_obj_t displayio_group_obj_index(mp_obj_t self_in, mp_obj_t layer) { + displayio_group_t *self = native_group(self_in); + mp_int_t index = common_hal_displayio_group_index(self, layer); + if (index < 0) { + mp_raise_ValueError(translate("object not in sequence")); + } + return MP_OBJ_NEW_SMALL_INT(index); +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_index_obj, displayio_group_obj_index); + +//| .. method:: pop(i=-1) +//| +//| Remove the ith item and return it. +//| +STATIC mp_obj_t displayio_group_obj_pop(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_i }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_i, MP_ARG_INT, {.u_int = -1} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + displayio_group_t *self = native_group(pos_args[0]); + + size_t index = mp_get_index(&displayio_group_type, + common_hal_displayio_group_get_len(self), + MP_OBJ_NEW_SMALL_INT(args[ARG_i].u_int), + false); + return common_hal_displayio_group_pop(self, index); +} +MP_DEFINE_CONST_FUN_OBJ_KW(displayio_group_pop_obj, 1, displayio_group_obj_pop); + + +//| .. method:: remove(layer) +//| +//| Remove the first copy of layer. Raises ValueError if it is not present. +//| +STATIC mp_obj_t displayio_group_obj_remove(mp_obj_t self_in, mp_obj_t layer) { + mp_obj_t index = displayio_group_obj_index(self_in, layer); + displayio_group_t *self = native_group(self_in); + + common_hal_displayio_group_pop(self, MP_OBJ_SMALL_INT_VALUE(index)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_group_remove_obj, displayio_group_obj_remove); + +//| .. method:: __len__() +//| +//| Returns the number of layers in a Group +//| +STATIC mp_obj_t group_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + displayio_group_t *self = native_group(self_in); + uint16_t len = common_hal_displayio_group_get_len(self); + switch (op) { + case MP_UNARY_OP_BOOL: return mp_obj_new_bool(len != 0); + case MP_UNARY_OP_LEN: return MP_OBJ_NEW_SMALL_INT(len); + default: return MP_OBJ_NULL; // op not supported + } +} + +//| .. method:: __getitem__(index) +//| +//| Returns the value at the given index. +//| +//| This allows you to:: +//| +//| print(group[0]) +//| +//| .. method:: __setitem__(index, value) +//| +//| Sets the value at the given index. +//| +//| This allows you to:: +//| +//| group[0] = sprite +//| +//| .. method:: __delitem__(index) +//| +//| Deletes the value at the given index. +//| +//| This allows you to:: +//| +//| del group[0] +//| +STATIC mp_obj_t group_subscr(mp_obj_t self_in, mp_obj_t index_obj, mp_obj_t value) { + displayio_group_t *self = native_group(self_in); + + if (MP_OBJ_IS_TYPE(index_obj, &mp_type_slice)) { + mp_raise_NotImplementedError(translate("Slices not supported")); + } else { + size_t index = mp_get_index(&displayio_group_type, common_hal_displayio_group_get_len(self), index_obj, false); + + if (value == MP_OBJ_SENTINEL) { + // load + return common_hal_displayio_group_get(self, index); + } else if (value == MP_OBJ_NULL) { + common_hal_displayio_group_pop(self, index); + } else { + common_hal_displayio_group_set(self, index, value); + } + } + return mp_const_none; +} + +STATIC const mp_rom_map_elem_t displayio_group_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_hidden), MP_ROM_PTR(&displayio_group_hidden_obj) }, + { MP_ROM_QSTR(MP_QSTR_scale), MP_ROM_PTR(&displayio_group_scale_obj) }, + { MP_ROM_QSTR(MP_QSTR_x), MP_ROM_PTR(&displayio_group_x_obj) }, + { MP_ROM_QSTR(MP_QSTR_y), MP_ROM_PTR(&displayio_group_y_obj) }, + { MP_ROM_QSTR(MP_QSTR_append), MP_ROM_PTR(&displayio_group_append_obj) }, + { MP_ROM_QSTR(MP_QSTR_insert), MP_ROM_PTR(&displayio_group_insert_obj) }, + { MP_ROM_QSTR(MP_QSTR_index), MP_ROM_PTR(&displayio_group_index_obj) }, + { MP_ROM_QSTR(MP_QSTR_pop), MP_ROM_PTR(&displayio_group_pop_obj) }, + { MP_ROM_QSTR(MP_QSTR_remove), MP_ROM_PTR(&displayio_group_remove_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_group_locals_dict, displayio_group_locals_dict_table); + +const mp_obj_type_t displayio_group_type = { + { &mp_type_type }, + .name = MP_QSTR_Group, + .make_new = displayio_group_make_new, + .subscr = group_subscr, + .unary_op = group_unary_op, + .getiter = mp_obj_new_generic_iterator, + .locals_dict = (mp_obj_dict_t*)&displayio_group_locals_dict, +}; diff --git a/shared-bindings/displayio/Group.h b/shared-bindings/displayio/Group.h new file mode 100644 index 0000000000000..942a207f2d15b --- /dev/null +++ b/shared-bindings/displayio/Group.h @@ -0,0 +1,53 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_GROUP_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_GROUP_H + +#include "shared-module/displayio/Group.h" + +extern const mp_obj_type_t displayio_group_type; + +displayio_group_t* native_group(mp_obj_t group_obj); + +void common_hal_displayio_group_construct(displayio_group_t* self, uint32_t max_size, uint32_t scale, mp_int_t x, mp_int_t y); +uint32_t common_hal_displayio_group_get_scale(displayio_group_t* self); +void common_hal_displayio_group_set_scale(displayio_group_t* self, uint32_t scale); +bool common_hal_displayio_group_get_hidden(displayio_group_t* self); +void common_hal_displayio_group_set_hidden(displayio_group_t* self, bool hidden); +mp_int_t common_hal_displayio_group_get_x(displayio_group_t* self); +void common_hal_displayio_group_set_x(displayio_group_t* self, mp_int_t x); +mp_int_t common_hal_displayio_group_get_y(displayio_group_t* self); +void common_hal_displayio_group_set_y(displayio_group_t* self, mp_int_t y); +void common_hal_displayio_group_append(displayio_group_t* self, mp_obj_t layer); +void common_hal_displayio_group_insert(displayio_group_t* self, size_t index, mp_obj_t layer); +size_t common_hal_displayio_group_get_len(displayio_group_t* self); +mp_obj_t common_hal_displayio_group_pop(displayio_group_t* self, size_t index); +mp_int_t common_hal_displayio_group_index(displayio_group_t* self, mp_obj_t layer); +mp_obj_t common_hal_displayio_group_get(displayio_group_t* self, size_t index); +void common_hal_displayio_group_set(displayio_group_t* self, size_t index, mp_obj_t layer); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_GROUP_H diff --git a/shared-bindings/displayio/I2CDisplay.c b/shared-bindings/displayio/I2CDisplay.c new file mode 100644 index 0000000000000..2e312aa14ec25 --- /dev/null +++ b/shared-bindings/displayio/I2CDisplay.c @@ -0,0 +1,147 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/I2CDisplay.h" + +#include +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`I2CDisplay` -- Manage updating a display over I2C +//| ========================================================================== +//| +//| Manage updating a display over I2C in the background while Python code runs. +//| It doesn't handle display initialization. +//| +//| .. class:: I2CDisplay(i2c_bus, *, device_address, reset=None) +//| +//| Create a I2CDisplay object associated with the given I2C bus and reset pin. +//| +//| The I2C bus and pins are then in use by the display until `displayio.release_displays()` is +//| called even after a reload. (It does this so CircuitPython can use the display after your code +//| is done.) So, the first time you initialize a display bus in code.py you should call +//| :py:func`displayio.release_displays` first, otherwise it will error after the first code.py run. +//| +//| :param busio.I2C i2c_bus: The I2C bus that make up the clock and data lines +//| :param int device_address: The I2C address of the device +//| :param microcontroller.Pin reset: Reset pin. When None only software reset can be used +//| +STATIC mp_obj_t displayio_i2cdisplay_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_i2c_bus, ARG_device_address, ARG_reset }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_i2c_bus, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_device_address, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_reset, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = mp_const_none} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mcu_pin_obj_t *reset = validate_obj_is_free_pin_or_none(args[ARG_reset].u_obj); + + displayio_i2cdisplay_obj_t* self = NULL; + mp_obj_t i2c = args[ARG_i2c_bus].u_obj; + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].i2cdisplay_bus.base.type == NULL || + displays[i].i2cdisplay_bus.base.type == &mp_type_NoneType) { + self = &displays[i].i2cdisplay_bus; + self->base.type = &displayio_i2cdisplay_type; + break; + } + } + if (self == NULL) { + mp_raise_RuntimeError(translate("Too many display busses")); + } + + common_hal_displayio_i2cdisplay_construct(self, + MP_OBJ_TO_PTR(i2c), args[ARG_device_address].u_int, reset); + return self; +} + +//| .. method:: reset() +//| +//| Performs a hardware reset via the reset pin. Raises an exception if called when no reset pin +//| is available. +//| +STATIC mp_obj_t displayio_i2cdisplay_obj_reset(mp_obj_t self_in) { + displayio_i2cdisplay_obj_t *self = self_in; + + if (!common_hal_displayio_i2cdisplay_reset(self)) { + mp_raise_RuntimeError(translate("no reset pin available")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_i2cdisplay_reset_obj, displayio_i2cdisplay_obj_reset); + +//| .. method:: send(command, data) +//| +//| Sends the given command value followed by the full set of data. Display state, such as +//| vertical scroll, set via ``send`` may or may not be reset once the code is done. +//| +STATIC mp_obj_t displayio_i2cdisplay_obj_send(mp_obj_t self, mp_obj_t command_obj, mp_obj_t data_obj) { + mp_int_t command_int = MP_OBJ_SMALL_INT_VALUE(command_obj); + if (!MP_OBJ_IS_SMALL_INT(command_obj) || command_int > 255 || command_int < 0) { + mp_raise_ValueError(translate("Command must be an int between 0 and 255")); + } + uint8_t command = command_int; + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(data_obj, &bufinfo, MP_BUFFER_READ); + + // Wait for display bus to be available. + while (!common_hal_displayio_i2cdisplay_begin_transaction(self)) { + RUN_BACKGROUND_TASKS; + } + uint8_t full_command[bufinfo.len + 1]; + full_command[0] = command; + memcpy(full_command + 1, ((uint8_t*) bufinfo.buf), bufinfo.len); + common_hal_displayio_i2cdisplay_send(self, DISPLAY_COMMAND, CHIP_SELECT_UNTOUCHED, full_command, bufinfo.len + 1); + common_hal_displayio_i2cdisplay_end_transaction(self); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_3(displayio_i2cdisplay_send_obj, displayio_i2cdisplay_obj_send); + +STATIC const mp_rom_map_elem_t displayio_i2cdisplay_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&displayio_i2cdisplay_reset_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&displayio_i2cdisplay_send_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_i2cdisplay_locals_dict, displayio_i2cdisplay_locals_dict_table); + +const mp_obj_type_t displayio_i2cdisplay_type = { + { &mp_type_type }, + .name = MP_QSTR_I2CDisplay, + .make_new = displayio_i2cdisplay_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_i2cdisplay_locals_dict, +}; diff --git a/shared-bindings/displayio/I2CDisplay.h b/shared-bindings/displayio/I2CDisplay.h new file mode 100644 index 0000000000000..bae53c4914d63 --- /dev/null +++ b/shared-bindings/displayio/I2CDisplay.h @@ -0,0 +1,51 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_I2CDISPLAY_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_I2CDISPLAY_H + +#include "shared-module/displayio/I2CDisplay.h" + +#include "shared-bindings/displayio/__init__.h" +#include "common-hal/microcontroller/Pin.h" + +extern const mp_obj_type_t displayio_i2cdisplay_type; + +void common_hal_displayio_i2cdisplay_construct(displayio_i2cdisplay_obj_t* self, + busio_i2c_obj_t* i2c, uint16_t device_address, const mcu_pin_obj_t* reset); + +void common_hal_displayio_i2cdisplay_deinit(displayio_i2cdisplay_obj_t* self); + +bool common_hal_displayio_i2cdisplay_reset(mp_obj_t self); +bool common_hal_displayio_i2cdisplay_bus_free(mp_obj_t self); + +bool common_hal_displayio_i2cdisplay_begin_transaction(mp_obj_t self); + +void common_hal_displayio_i2cdisplay_send(mp_obj_t self, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length); + +void common_hal_displayio_i2cdisplay_end_transaction(mp_obj_t self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_I2CDISPLAY_H diff --git a/shared-bindings/displayio/OnDiskBitmap.c b/shared-bindings/displayio/OnDiskBitmap.c new file mode 100644 index 0000000000000..57179947edf2e --- /dev/null +++ b/shared-bindings/displayio/OnDiskBitmap.c @@ -0,0 +1,147 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/OnDiskBitmap.h" + +#include + +#include "py/runtime.h" +#include "py/objproperty.h" +#include "supervisor/shared/translate.h" +#include "shared-bindings/displayio/OnDiskBitmap.h" + +//| .. currentmodule:: displayio +//| +//| :class:`OnDiskBitmap` -- Loads pixels straight from disk +//| ========================================================================== +//| +//| Loads values straight from disk. This minimizes memory use but can lead to +//| much slower pixel load times. These load times may result in frame tearing where only part of +//| the image is visible. +//| +//| It's easiest to use on a board with a built in display such as the `Hallowing M0 Express +//| `_. +//| +//| .. code-block:: Python +//| +//| import board +//| import displayio +//| import time +//| import pulseio +//| +//| board.DISPLAY.auto_brightness = False +//| board.DISPLAY.brightness = 0 +//| splash = displayio.Group() +//| board.DISPLAY.show(splash) +//| +//| with open("/sample.bmp", "rb") as f: +//| odb = displayio.OnDiskBitmap(f) +//| face = displayio.TileGrid(odb, pixel_shader=displayio.ColorConverter()) +//| splash.append(face) +//| # Wait for the image to load. +//| board.DISPLAY.refresh(target_frames_per_second=60) +//| +//| # Fade up the backlight +//| for i in range(100): +//| board.DISPLAY.brightness = 0.01 * i +//| time.sleep(0.05) +//| +//| # Wait forever +//| while True: +//| pass +//| +//| .. class:: OnDiskBitmap(file) +//| +//| Create an OnDiskBitmap object with the given file. +//| +//| :param file file: The open bitmap file +//| +STATIC mp_obj_t displayio_ondiskbitmap_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); + + if (!MP_OBJ_IS_TYPE(pos_args[0], &mp_type_fileio)) { + mp_raise_TypeError(translate("file must be a file opened in byte mode")); + } + + displayio_ondiskbitmap_t *self = m_new_obj(displayio_ondiskbitmap_t); + self->base.type = &displayio_ondiskbitmap_type; + common_hal_displayio_ondiskbitmap_construct(self, MP_OBJ_TO_PTR(pos_args[0])); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. attribute:: width +//| +//| Width of the bitmap. (read only) +//| +STATIC mp_obj_t displayio_ondiskbitmap_obj_get_width(mp_obj_t self_in) { + displayio_ondiskbitmap_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_ondiskbitmap_get_width(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(displayio_ondiskbitmap_get_width_obj, displayio_ondiskbitmap_obj_get_width); + +const mp_obj_property_t displayio_ondiskbitmap_width_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_ondiskbitmap_get_width_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, + +}; + +//| .. attribute:: height +//| +//| Height of the bitmap. (read only) +//| +STATIC mp_obj_t displayio_ondiskbitmap_obj_get_height(mp_obj_t self_in) { + displayio_ondiskbitmap_t *self = MP_OBJ_TO_PTR(self_in); + + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_ondiskbitmap_get_height(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(displayio_ondiskbitmap_get_height_obj, displayio_ondiskbitmap_obj_get_height); + +const mp_obj_property_t displayio_ondiskbitmap_height_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_ondiskbitmap_get_height_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, + +}; + +STATIC const mp_rom_map_elem_t displayio_ondiskbitmap_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&displayio_ondiskbitmap_height_obj) }, + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&displayio_ondiskbitmap_width_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_ondiskbitmap_locals_dict, displayio_ondiskbitmap_locals_dict_table); + +const mp_obj_type_t displayio_ondiskbitmap_type = { + { &mp_type_type }, + .name = MP_QSTR_OnDiskBitmap, + .make_new = displayio_ondiskbitmap_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_ondiskbitmap_locals_dict, +}; diff --git a/shared-bindings/displayio/OnDiskBitmap.h b/shared-bindings/displayio/OnDiskBitmap.h new file mode 100644 index 0000000000000..9a6c81f8f1fd4 --- /dev/null +++ b/shared-bindings/displayio/OnDiskBitmap.h @@ -0,0 +1,43 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_ONDISKBITMAP_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_ONDISKBITMAP_H + +#include "shared-module/displayio/OnDiskBitmap.h" +#include "extmod/vfs_fat.h" + +extern const mp_obj_type_t displayio_ondiskbitmap_type; + +void common_hal_displayio_ondiskbitmap_construct(displayio_ondiskbitmap_t *self, pyb_file_obj_t* file); + +uint32_t common_hal_displayio_ondiskbitmap_get_pixel(displayio_ondiskbitmap_t *bitmap, + int16_t x, int16_t y); + +uint16_t common_hal_displayio_ondiskbitmap_get_height(displayio_ondiskbitmap_t *self); + +uint16_t common_hal_displayio_ondiskbitmap_get_width(displayio_ondiskbitmap_t *self); +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_ONDISKBITMAP_H diff --git a/shared-bindings/displayio/Palette.c b/shared-bindings/displayio/Palette.c new file mode 100644 index 0000000000000..67a7db85b8618 --- /dev/null +++ b/shared-bindings/displayio/Palette.c @@ -0,0 +1,189 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Palette.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`Palette` -- Stores a mapping from bitmap pixel palette_indexes to display colors +//| ========================================================================================= +//| +//| Map a pixel palette_index to a full color. Colors are transformed to the display's format internally to +//| save memory. +//| +//| .. class:: Palette(color_count) +//| +//| Create a Palette object to store a set number of colors. +//| +//| :param int color_count: The number of colors in the Palette +// TODO(tannewt): Add support for other color formats. +// TODO(tannewt): Add support for 8-bit alpha blending. +//| +STATIC mp_obj_t displayio_palette_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_color_count }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_color_count, MP_ARG_REQUIRED | MP_ARG_INT }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + displayio_palette_t *self = m_new_obj(displayio_palette_t); + self->base.type = &displayio_palette_type; + common_hal_displayio_palette_construct(self, args[ARG_color_count].u_int); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: __len__() +//| +//| Returns the number of colors in a Palette +//| +STATIC mp_obj_t group_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + displayio_palette_t *self = MP_OBJ_TO_PTR(self_in); + switch (op) { + case MP_UNARY_OP_BOOL: return mp_const_true; + case MP_UNARY_OP_LEN: + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_palette_get_len(self)); + default: return MP_OBJ_NULL; // op not supported + } +} + +//| .. method:: __setitem__(index, value) +//| +//| Sets the pixel color at the given index. The index should be an integer in the range 0 to color_count-1. +//| +//| The value argument represents a color, and can be from 0x000000 to 0xFFFFFF (to represent an RGB value). +//| Value can be an int, bytes (3 bytes (RGB) or 4 bytes (RGB + pad byte)), bytearray, +//| or a tuple or list of 3 integers. +//| +//| This allows you to:: +//| +//| palette[0] = 0xFFFFFF # set using an integer +//| palette[1] = b'\xff\xff\x00' # set using 3 bytes +//| palette[2] = b'\xff\xff\x00\x00' # set using 4 bytes +//| palette[3] = bytearray(b'\x00\x00\xFF') # set using a bytearay of 3 or 4 bytes +//| palette[4] = (10, 20, 30) # set using a tuple of 3 integers +//| +STATIC mp_obj_t palette_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value) { + if (value == MP_OBJ_NULL) { + // delete item + return MP_OBJ_NULL; // op not supported + } + // Slicing not supported. Use a duplicate Palette to swap multiple colors atomically. + if (MP_OBJ_IS_TYPE(index_in, &mp_type_slice)) { + return MP_OBJ_NULL; + } + displayio_palette_t *self = MP_OBJ_TO_PTR(self_in); + size_t index = mp_get_index(&displayio_palette_type, self->color_count, index_in, false); + // index read + if (value == MP_OBJ_SENTINEL) { + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_palette_get_color(self, index)); + } + + // Convert a tuple or list to a bytearray. + if (MP_OBJ_IS_TYPE(value, &mp_type_tuple) || + MP_OBJ_IS_TYPE(value, &mp_type_list)) { + value = mp_type_bytes.make_new(&mp_type_bytes, 1, &value, NULL); + } + + uint32_t color; + mp_int_t int_value; + mp_buffer_info_t bufinfo; + if (mp_get_buffer(value, &bufinfo, MP_BUFFER_READ)) { + if (bufinfo.typecode != 'b' && bufinfo.typecode != 'B' && bufinfo.typecode != BYTEARRAY_TYPECODE) { + mp_raise_ValueError(translate("color buffer must be a bytearray or array of type 'b' or 'B'")); + } + uint8_t* buf = bufinfo.buf; + if (bufinfo.len == 3 || bufinfo.len == 4) { + color = buf[0] << 16 | buf[1] << 8 | buf[2]; + } else { + mp_raise_ValueError(translate("color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)")); + } + } else if (mp_obj_get_int_maybe(value, &int_value)) { + if (int_value < 0 || int_value > 0xffffff) { + mp_raise_TypeError(translate("color must be between 0x000000 and 0xffffff")); + } + color = int_value; + } else { + mp_raise_TypeError(translate("color buffer must be a buffer, tuple, list, or int")); + } + common_hal_displayio_palette_set_color(self, index, color); + return mp_const_none; +} + +//| .. method:: make_transparent(palette_index) +//| +STATIC mp_obj_t displayio_palette_obj_make_transparent(mp_obj_t self_in, mp_obj_t palette_index_obj) { + displayio_palette_t *self = MP_OBJ_TO_PTR(self_in); + + mp_int_t palette_index; + if (!mp_obj_get_int_maybe(palette_index_obj, &palette_index)) { + mp_raise_ValueError(translate("palette_index should be an int")); + } + common_hal_displayio_palette_make_transparent(self, palette_index); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_palette_make_transparent_obj, displayio_palette_obj_make_transparent); + +//| .. method:: make_opaque(palette_index) +//| +STATIC mp_obj_t displayio_palette_obj_make_opaque(mp_obj_t self_in, mp_obj_t palette_index_obj) { + displayio_palette_t *self = MP_OBJ_TO_PTR(self_in); + + mp_int_t palette_index; + if (!mp_obj_get_int_maybe(palette_index_obj, &palette_index)) { + mp_raise_ValueError(translate("palette_index should be an int")); + } + common_hal_displayio_palette_make_opaque(self, palette_index); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_palette_make_opaque_obj, displayio_palette_obj_make_opaque); + +STATIC const mp_rom_map_elem_t displayio_palette_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_make_transparent), MP_ROM_PTR(&displayio_palette_make_transparent_obj) }, + { MP_ROM_QSTR(MP_QSTR_make_opaque), MP_ROM_PTR(&displayio_palette_make_opaque_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_palette_locals_dict, displayio_palette_locals_dict_table); + +const mp_obj_type_t displayio_palette_type = { + { &mp_type_type }, + .name = MP_QSTR_Palette, + .make_new = displayio_palette_make_new, + .subscr = palette_subscr, + .unary_op = group_unary_op, + .getiter = mp_obj_new_generic_iterator, + .locals_dict = (mp_obj_dict_t*)&displayio_palette_locals_dict, +}; diff --git a/shared-bindings/displayio/Palette.h b/shared-bindings/displayio/Palette.h new file mode 100644 index 0000000000000..8c9fe11e38112 --- /dev/null +++ b/shared-bindings/displayio/Palette.h @@ -0,0 +1,42 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_PALETTE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_PALETTE_H + +#include "shared-module/displayio/Palette.h" + +extern const mp_obj_type_t displayio_palette_type; + +void common_hal_displayio_palette_construct(displayio_palette_t* self, uint16_t color_count); +void common_hal_displayio_palette_set_color(displayio_palette_t* self, uint32_t palette_index, uint32_t color); +uint32_t common_hal_displayio_palette_get_color(displayio_palette_t* self, uint32_t palette_index); +uint32_t common_hal_displayio_palette_get_len(displayio_palette_t* self); + +void common_hal_displayio_palette_make_opaque(displayio_palette_t* self, uint32_t palette_index); +void common_hal_displayio_palette_make_transparent(displayio_palette_t* self, uint32_t palette_index); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_PALETTE_H diff --git a/shared-bindings/displayio/ParallelBus.c b/shared-bindings/displayio/ParallelBus.c new file mode 100644 index 0000000000000..b3a876f903361 --- /dev/null +++ b/shared-bindings/displayio/ParallelBus.c @@ -0,0 +1,155 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`ParallelBus` -- Manage updating a display over 8-bit parallel bus +//| ============================================================================== +//| +//| Manage updating a display over 8-bit parallel bus in the background while Python code runs. This +//| protocol may be refered to as 8080-I Series Parallel Interface in datasheets. It doesn't handle +//| display initialization. +//| +//| .. class:: ParallelBus(*, data0, command, chip_select, write, read, reset) +//| +//| Create a ParallelBus object associated with the given pins. The bus is inferred from data0 +//| by implying the next 7 additional pins on a given GPIO port. +//| +//| The parallel bus and pins are then in use by the display until `displayio.release_displays()` +//| is called even after a reload. (It does this so CircuitPython can use the display after your +//| code is done.) So, the first time you initialize a display bus in code.py you should call +//| :py:func`displayio.release_displays` first, otherwise it will error after the first code.py run. +//| +//| :param microcontroller.Pin data0: The first data pin. The rest are implied +//| :param microcontroller.Pin command: Data or command pin +//| :param microcontroller.Pin chip_select: Chip select pin +//| :param microcontroller.Pin write: Write pin +//| :param microcontroller.Pin read: Read pin +//| :param microcontroller.Pin reset: Reset pin +//| +STATIC mp_obj_t displayio_parallelbus_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_data0, ARG_command, ARG_chip_select, ARG_write, ARG_read, ARG_reset }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_data0, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_command, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_chip_select, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_write, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_read, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_reset, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mcu_pin_obj_t *data0 = validate_obj_is_free_pin(args[ARG_data0].u_obj); + mcu_pin_obj_t *command = validate_obj_is_free_pin(args[ARG_command].u_obj); + mcu_pin_obj_t *chip_select = validate_obj_is_free_pin(args[ARG_chip_select].u_obj); + mcu_pin_obj_t *write = validate_obj_is_free_pin(args[ARG_write].u_obj); + mcu_pin_obj_t *read = validate_obj_is_free_pin(args[ARG_read].u_obj); + mcu_pin_obj_t *reset = validate_obj_is_free_pin(args[ARG_reset].u_obj); + + displayio_parallelbus_obj_t* self = NULL; + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].parallel_bus.base.type== NULL || + displays[i].parallel_bus.base.type == &mp_type_NoneType) { + self = &displays[i].parallel_bus; + self->base.type = &displayio_parallelbus_type; + break; + } + } + if (self == NULL) { + mp_raise_RuntimeError(translate("Too many display busses")); + } + + common_hal_displayio_parallelbus_construct(self, data0, command, chip_select, write, read, reset); + return self; +} + +//| .. method:: reset() +//| +//| Performs a hardware reset via the reset pin. Raises an exception if called when no reset pin +//| is available. +//| +STATIC mp_obj_t displayio_parallelbus_obj_reset(mp_obj_t self_in) { + displayio_parallelbus_obj_t *self = self_in; + + if (!common_hal_displayio_parallelbus_reset(self)) { + mp_raise_RuntimeError(translate("no reset pin available")); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_parallelbus_reset_obj, displayio_parallelbus_obj_reset); + +//| .. method:: send(command, data) +//| +//| Sends the given command value followed by the full set of data. Display state, such as +//| vertical scroll, set via ``send`` may or may not be reset once the code is done. +//| +STATIC mp_obj_t displayio_parallelbus_obj_send(mp_obj_t self, mp_obj_t command_obj, mp_obj_t data_obj) { + mp_int_t command_int = MP_OBJ_SMALL_INT_VALUE(command_obj); + if (!MP_OBJ_IS_SMALL_INT(command_obj) || command_int > 255 || command_int < 0) { + mp_raise_ValueError(translate("Command must be an int between 0 and 255")); + } + uint8_t command = command_int; + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(data_obj, &bufinfo, MP_BUFFER_READ); + + // Wait for display bus to be available. + while (!common_hal_displayio_parallelbus_begin_transaction(self)) { + RUN_BACKGROUND_TASKS; + } + common_hal_displayio_parallelbus_send(self, DISPLAY_COMMAND, CHIP_SELECT_UNTOUCHED, &command, 1); + common_hal_displayio_parallelbus_send(self, DISPLAY_DATA, CHIP_SELECT_UNTOUCHED, ((uint8_t*) bufinfo.buf), bufinfo.len); + common_hal_displayio_parallelbus_end_transaction(self); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_3(displayio_parallelbus_send_obj, displayio_parallelbus_obj_send); + +STATIC const mp_rom_map_elem_t displayio_parallelbus_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&displayio_parallelbus_reset_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&displayio_parallelbus_send_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_parallelbus_locals_dict, displayio_parallelbus_locals_dict_table); + +const mp_obj_type_t displayio_parallelbus_type = { + { &mp_type_type }, + .name = MP_QSTR_ParallelBus, + .make_new = displayio_parallelbus_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_parallelbus_locals_dict, +}; diff --git a/shared-bindings/displayio/ParallelBus.h b/shared-bindings/displayio/ParallelBus.h new file mode 100644 index 0000000000000..be2aef7d44af3 --- /dev/null +++ b/shared-bindings/displayio/ParallelBus.h @@ -0,0 +1,53 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_PARALLELBUS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_PARALLELBUS_H + +#include "common-hal/displayio/ParallelBus.h" + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/displayio/__init__.h" +#include "shared-module/displayio/Group.h" + +extern const mp_obj_type_t displayio_parallelbus_type; + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset); + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self); + +bool common_hal_displayio_parallelbus_reset(mp_obj_t self); +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t self); + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t self); + +void common_hal_displayio_parallelbus_send(mp_obj_t self, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length); + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYBUSIO_PARALLELBUS_H diff --git a/shared-bindings/displayio/Shape.c b/shared-bindings/displayio/Shape.c new file mode 100644 index 0000000000000..7c7b1050153fc --- /dev/null +++ b/shared-bindings/displayio/Shape.c @@ -0,0 +1,121 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Shape.h" + +#include + +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`Shape` -- Represents a shape by defining its bounds on each row +//| ========================================================================== +//| +//| Represents any shape made by defining boundaries that may be mirrored. +//| +//| .. class:: Shape(width, height, *, mirror_x=False, mirror_y=False) +//| +//| Create a Shape object with the given fixed size. Each pixel is one bit and is stored by the +//| column boundaries of the shape on each row. Each row's boundary defaults to the full row. +//| +//| :param int width: The number of pixels wide +//| :param int height: The number of pixels high +//| :param bool mirror_x: When true the left boundary is mirrored to the right. +//| :param bool mirror_y: When true the top boundary is mirrored to the bottom. +//| +STATIC mp_obj_t displayio_shape_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_width, ARG_height, ARG_mirror_x, ARG_mirror_y }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_width, MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_height, MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_mirror_x, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + { MP_QSTR_mirror_y, MP_ARG_BOOL | MP_ARG_KW_ONLY, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t width = args[ARG_width].u_int; + if (width < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_width); + } + mp_int_t height = args[ARG_height].u_int; + if (height < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_height); + } + + displayio_shape_t *self = m_new_obj(displayio_shape_t); + self->base.type = &displayio_shape_type; + common_hal_displayio_shape_construct(self, + width, + height, + args[ARG_mirror_x].u_bool, + args[ARG_mirror_y].u_bool); + + return MP_OBJ_FROM_PTR(self); +} + + +//| .. method:: set_boundary(y, start_x, end_x) +//| +//| Loads pre-packed data into the given row. +//| +STATIC mp_obj_t displayio_shape_obj_set_boundary(size_t n_args, const mp_obj_t *args) { + (void) n_args; + displayio_shape_t *self = MP_OBJ_TO_PTR(args[0]); + mp_int_t y; + if (!mp_obj_get_int_maybe(args[1], &y)) { + mp_raise_ValueError(translate("y should be an int")); + } + mp_int_t start_x; + if (!mp_obj_get_int_maybe(args[2], &start_x)) { + mp_raise_ValueError(translate("start_x should be an int")); + } + mp_int_t end_x; + if (!mp_obj_get_int_maybe(args[3], &end_x)) { + mp_raise_ValueError(translate("end_x should be an int")); + } + common_hal_displayio_shape_set_boundary(self, y, start_x, end_x); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(displayio_shape_set_boundary_obj, 4, 4, displayio_shape_obj_set_boundary); + +STATIC const mp_rom_map_elem_t displayio_shape_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_set_boundary), MP_ROM_PTR(&displayio_shape_set_boundary_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_shape_locals_dict, displayio_shape_locals_dict_table); + +const mp_obj_type_t displayio_shape_type = { + { &mp_type_type }, + .name = MP_QSTR_Shape, + .make_new = displayio_shape_make_new, + .locals_dict = (mp_obj_dict_t*)&displayio_shape_locals_dict, +}; diff --git a/shared-bindings/displayio/Shape.h b/shared-bindings/displayio/Shape.h new file mode 100644 index 0000000000000..d08a38782295a --- /dev/null +++ b/shared-bindings/displayio/Shape.h @@ -0,0 +1,41 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_SHAPE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_SHAPE_H + +#include "shared-module/displayio/Shape.h" + +extern const mp_obj_type_t displayio_shape_type; + +void common_hal_displayio_shape_construct(displayio_shape_t *self, uint32_t width, + uint32_t height, bool mirror_x, bool mirror_y); + +void common_hal_displayio_shape_set_boundary(displayio_shape_t *self, uint16_t y, uint16_t start_x, + uint16_t end_x); +uint32_t common_hal_displayio_shape_get_pixel(void *shape, int16_t x, int16_t y); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_SHAPE_H diff --git a/shared-bindings/displayio/TileGrid.c b/shared-bindings/displayio/TileGrid.c new file mode 100644 index 0000000000000..288eb4b236930 --- /dev/null +++ b/shared-bindings/displayio/TileGrid.c @@ -0,0 +1,411 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/TileGrid.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/objtype.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/Bitmap.h" +#include "shared-bindings/displayio/ColorConverter.h" +#include "shared-bindings/displayio/OnDiskBitmap.h" +#include "shared-bindings/displayio/Palette.h" +#include "shared-bindings/displayio/Shape.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: displayio +//| +//| :class:`TileGrid` -- A grid of tiles sourced out of one bitmap +//| ========================================================================== +//| +//| Position a grid of tiles sourced from a bitmap and pixel_shader combination. Multiple grids +//| can share bitmaps and pixel shaders. +//| +//| A single tile grid is also known as a Sprite. +//| +//| .. class:: TileGrid(bitmap, *, pixel_shader, width=1, height=1, tile_width=None, tile_height=None, default_tile=0, x=0, y=0) +//| +//| Create a TileGrid object. The bitmap is source for 2d pixels. The pixel_shader is used to +//| convert the value and its location to a display native pixel color. This may be a simple color +//| palette lookup, a gradient, a pattern or a color transformer. +//| +//| tile_width and tile_height match the height of the bitmap by default. +//| +//| :param displayio.Bitmap bitmap: The bitmap storing one or more tiles. +//| :param displayio.Palette pixel_shader: The pixel shader that produces colors from values +//| :param int width: Width of the grid in tiles. +//| :param int height: Height of the grid in tiles. +//| :param int tile_width: Width of a single tile in pixels. Defaults to the full Bitmap and must evenly divide into the Bitmap's dimensions. +//| :param int tile_height: Height of a single tile in pixels. Defaults to the full Bitmap and must evenly divide into the Bitmap's dimensions. +//| :param int default_tile: Default tile index to show. +//| :param int x: Initial x position of the left edge within the parent. +//| :param int y: Initial y position of the top edge within the parent. +//| +STATIC mp_obj_t displayio_tilegrid_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_bitmap, ARG_pixel_shader, ARG_width, ARG_height, ARG_tile_width, ARG_tile_height, ARG_default_tile, ARG_x, ARG_y }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_bitmap, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_pixel_shader, MP_ARG_OBJ | MP_ARG_KW_ONLY | MP_ARG_REQUIRED }, + { MP_QSTR_width, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1} }, + { MP_QSTR_height, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 1} }, + { MP_QSTR_tile_width, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_tile_height, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_default_tile, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_x, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + { MP_QSTR_y, MP_ARG_INT | MP_ARG_KW_ONLY, {.u_int = 0} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t bitmap = args[ARG_bitmap].u_obj; + + uint16_t bitmap_width; + uint16_t bitmap_height; + mp_obj_t native = mp_instance_cast_to_native_base(bitmap, &displayio_shape_type); + if (native != MP_OBJ_NULL) { + displayio_shape_t* bmp = MP_OBJ_TO_PTR(native); + bitmap_width = bmp->width; + bitmap_height = bmp->height; + } else if (MP_OBJ_IS_TYPE(bitmap, &displayio_bitmap_type)) { + displayio_bitmap_t* bmp = MP_OBJ_TO_PTR(bitmap); + native = bitmap; + bitmap_width = bmp->width; + bitmap_height = bmp->height; + } else if (MP_OBJ_IS_TYPE(bitmap, &displayio_ondiskbitmap_type)) { + displayio_ondiskbitmap_t* bmp = MP_OBJ_TO_PTR(bitmap); + native = bitmap; + bitmap_width = bmp->width; + bitmap_height = bmp->height; + } else { + mp_raise_TypeError_varg(translate("unsupported %q type"), MP_QSTR_bitmap); + } + mp_obj_t pixel_shader = args[ARG_pixel_shader].u_obj; + if (!MP_OBJ_IS_TYPE(pixel_shader, &displayio_colorconverter_type) && + !MP_OBJ_IS_TYPE(pixel_shader, &displayio_palette_type)) { + mp_raise_TypeError_varg(translate("unsupported %q type"), MP_QSTR_pixel_shader); + } + uint16_t tile_width = args[ARG_tile_width].u_int; + if (tile_width == 0) { + tile_width = bitmap_width; + } + uint16_t tile_height = args[ARG_tile_height].u_int; + if (tile_height == 0) { + tile_height = bitmap_height; + } + if (bitmap_width % tile_width != 0) { + mp_raise_ValueError(translate("Tile width must exactly divide bitmap width")); + } + if (bitmap_height % tile_height != 0) { + mp_raise_ValueError(translate("Tile height must exactly divide bitmap height")); + } + + int16_t x = args[ARG_x].u_int; + int16_t y = args[ARG_y].u_int; + + displayio_tilegrid_t *self = m_new_obj(displayio_tilegrid_t); + self->base.type = &displayio_tilegrid_type; + common_hal_displayio_tilegrid_construct(self, native, + bitmap_width / tile_width, bitmap_height / tile_height, + pixel_shader, args[ARG_width].u_int, args[ARG_height].u_int, + tile_width, tile_height, x, y, args[ARG_default_tile].u_int); + return MP_OBJ_FROM_PTR(self); +} + +// Helper to ensure we have the native super class instead of a subclass. +static displayio_tilegrid_t* native_tilegrid(mp_obj_t tilegrid_obj) { + mp_obj_t native_tilegrid = mp_instance_cast_to_native_base(tilegrid_obj, &displayio_tilegrid_type); + mp_obj_assert_native_inited(native_tilegrid); + return MP_OBJ_TO_PTR(native_tilegrid); +} +//| .. attribute:: hidden +//| +//| True when the TileGrid is hidden. This may be False even when a part of a hidden Group. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_hidden(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return mp_obj_new_bool(common_hal_displayio_tilegrid_get_hidden(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_hidden_obj, displayio_tilegrid_obj_get_hidden); + +STATIC mp_obj_t displayio_tilegrid_obj_set_hidden(mp_obj_t self_in, mp_obj_t hidden_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + common_hal_displayio_tilegrid_set_hidden(self, mp_obj_is_true(hidden_obj)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_hidden_obj, displayio_tilegrid_obj_set_hidden); + +const mp_obj_property_t displayio_tilegrid_hidden_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_hidden_obj, + (mp_obj_t)&displayio_tilegrid_set_hidden_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: x +//| +//| X position of the left edge in the parent. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_x(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_tilegrid_get_x(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_x_obj, displayio_tilegrid_obj_get_x); + +STATIC mp_obj_t displayio_tilegrid_obj_set_x(mp_obj_t self_in, mp_obj_t x_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + mp_int_t x = mp_obj_get_int(x_obj); + common_hal_displayio_tilegrid_set_x(self, x); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_x_obj, displayio_tilegrid_obj_set_x); + +const mp_obj_property_t displayio_tilegrid_x_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_x_obj, + (mp_obj_t)&displayio_tilegrid_set_x_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: y +//| +//| Y position of the top edge in the parent. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_y(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_tilegrid_get_y(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_y_obj, displayio_tilegrid_obj_get_y); + +STATIC mp_obj_t displayio_tilegrid_obj_set_y(mp_obj_t self_in, mp_obj_t y_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + mp_int_t y = mp_obj_get_int(y_obj); + common_hal_displayio_tilegrid_set_y(self, y); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_y_obj, displayio_tilegrid_obj_set_y); + +const mp_obj_property_t displayio_tilegrid_y_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_y_obj, + (mp_obj_t)&displayio_tilegrid_set_y_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: flip_x +//| +//| If true, the left edge rendered will be the right edge of the right-most tile. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_flip_x(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return mp_obj_new_bool(common_hal_displayio_tilegrid_get_flip_x(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_flip_x_obj, displayio_tilegrid_obj_get_flip_x); + +STATIC mp_obj_t displayio_tilegrid_obj_set_flip_x(mp_obj_t self_in, mp_obj_t flip_x_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + common_hal_displayio_tilegrid_set_flip_x(self, mp_obj_is_true(flip_x_obj)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_flip_x_obj, displayio_tilegrid_obj_set_flip_x); + +const mp_obj_property_t displayio_tilegrid_flip_x_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_flip_x_obj, + (mp_obj_t)&displayio_tilegrid_set_flip_x_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: flip_y +//| +//| If true, the top edge rendered will be the bottom edge of the bottom-most tile. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_flip_y(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return mp_obj_new_bool(common_hal_displayio_tilegrid_get_flip_y(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_flip_y_obj, displayio_tilegrid_obj_get_flip_y); + +STATIC mp_obj_t displayio_tilegrid_obj_set_flip_y(mp_obj_t self_in, mp_obj_t flip_y_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + common_hal_displayio_tilegrid_set_flip_y(self, mp_obj_is_true(flip_y_obj)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_flip_y_obj, displayio_tilegrid_obj_set_flip_y); + +const mp_obj_property_t displayio_tilegrid_flip_y_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_flip_y_obj, + (mp_obj_t)&displayio_tilegrid_set_flip_y_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| .. attribute:: transpose_xy +//| +//| If true, the TileGrid's axis will be swapped. When combined with mirroring, any 90 degree +//| rotation can be achieved along with the corresponding mirrored version. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_transpose_xy(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return mp_obj_new_bool(common_hal_displayio_tilegrid_get_transpose_xy(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_transpose_xy_obj, displayio_tilegrid_obj_get_transpose_xy); + +STATIC mp_obj_t displayio_tilegrid_obj_set_transpose_xy(mp_obj_t self_in, mp_obj_t transpose_xy_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + common_hal_displayio_tilegrid_set_transpose_xy(self, mp_obj_is_true(transpose_xy_obj)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_transpose_xy_obj, displayio_tilegrid_obj_set_transpose_xy); + +const mp_obj_property_t displayio_tilegrid_transpose_xy_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_transpose_xy_obj, + (mp_obj_t)&displayio_tilegrid_set_transpose_xy_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: pixel_shader +//| +//| The pixel shader of the tilegrid. +//| +STATIC mp_obj_t displayio_tilegrid_obj_get_pixel_shader(mp_obj_t self_in) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + return common_hal_displayio_tilegrid_get_pixel_shader(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(displayio_tilegrid_get_pixel_shader_obj, displayio_tilegrid_obj_get_pixel_shader); + +STATIC mp_obj_t displayio_tilegrid_obj_set_pixel_shader(mp_obj_t self_in, mp_obj_t pixel_shader) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + if (!MP_OBJ_IS_TYPE(pixel_shader, &displayio_palette_type) && !MP_OBJ_IS_TYPE(pixel_shader, &displayio_colorconverter_type)) { + mp_raise_TypeError(translate("pixel_shader must be displayio.Palette or displayio.ColorConverter")); + } + + common_hal_displayio_tilegrid_set_pixel_shader(self, pixel_shader); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(displayio_tilegrid_set_pixel_shader_obj, displayio_tilegrid_obj_set_pixel_shader); + +const mp_obj_property_t displayio_tilegrid_pixel_shader_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&displayio_tilegrid_get_pixel_shader_obj, + (mp_obj_t)&displayio_tilegrid_set_pixel_shader_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: __getitem__(index) +//| +//| Returns the tile index at the given index. The index can either be an x,y tuple or an int equal +//| to ``y * width + x``. +//| +//| This allows you to:: +//| +//| print(grid[0]) +//| +//| .. method:: __setitem__(index, tile_index) +//| +//| Sets the tile index at the given index. The index can either be an x,y tuple or an int equal +//| to ``y * width + x``. +//| +//| This allows you to:: +//| +//| grid[0] = 10 +//| +//| or:: +//| +//| grid[0,0] = 10 +//| +STATIC mp_obj_t tilegrid_subscr(mp_obj_t self_in, mp_obj_t index_obj, mp_obj_t value_obj) { + displayio_tilegrid_t *self = native_tilegrid(self_in); + + + if (MP_OBJ_IS_TYPE(index_obj, &mp_type_slice)) { + mp_raise_NotImplementedError(translate("Slices not supported")); + } else { + uint16_t x = 0; + uint16_t y = 0; + if (MP_OBJ_IS_SMALL_INT(index_obj)) { + mp_int_t i = MP_OBJ_SMALL_INT_VALUE(index_obj); + uint16_t width = common_hal_displayio_tilegrid_get_width(self); + x = i % width; + y = i / width; + } else { + mp_obj_t* items; + mp_obj_get_array_fixed_n(index_obj, 2, &items); + x = mp_obj_get_int(items[0]); + y = mp_obj_get_int(items[1]); + } + if (x >= common_hal_displayio_tilegrid_get_width(self) || + y >= common_hal_displayio_tilegrid_get_height(self)) { + mp_raise_IndexError(translate("Tile index out of bounds")); + } + + if (value_obj == MP_OBJ_SENTINEL) { + // load + return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_tilegrid_get_tile(self, x, y)); + } else if (value_obj == mp_const_none) { + return MP_OBJ_NULL; // op not supported + } else { + mp_int_t value = mp_obj_get_int(value_obj); + if (value < 0 || value > 255) { + mp_raise_ValueError(translate("Tile value out of bounds")); + } + common_hal_displayio_tilegrid_set_tile(self, x, y, value); + } + } + return mp_const_none; +} + +STATIC const mp_rom_map_elem_t displayio_tilegrid_locals_dict_table[] = { + // Properties + { MP_ROM_QSTR(MP_QSTR_hidden), MP_ROM_PTR(&displayio_tilegrid_hidden_obj) }, + { MP_ROM_QSTR(MP_QSTR_x), MP_ROM_PTR(&displayio_tilegrid_x_obj) }, + { MP_ROM_QSTR(MP_QSTR_y), MP_ROM_PTR(&displayio_tilegrid_y_obj) }, + { MP_ROM_QSTR(MP_QSTR_flip_x), MP_ROM_PTR(&displayio_tilegrid_flip_x_obj) }, + { MP_ROM_QSTR(MP_QSTR_flip_y), MP_ROM_PTR(&displayio_tilegrid_flip_y_obj) }, + { MP_ROM_QSTR(MP_QSTR_transpose_xy), MP_ROM_PTR(&displayio_tilegrid_transpose_xy_obj) }, + { MP_ROM_QSTR(MP_QSTR_pixel_shader), MP_ROM_PTR(&displayio_tilegrid_pixel_shader_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(displayio_tilegrid_locals_dict, displayio_tilegrid_locals_dict_table); + +const mp_obj_type_t displayio_tilegrid_type = { + { &mp_type_type }, + .name = MP_QSTR_TileGrid, + .make_new = displayio_tilegrid_make_new, + .subscr = tilegrid_subscr, + .locals_dict = (mp_obj_dict_t*)&displayio_tilegrid_locals_dict, +}; diff --git a/shared-bindings/displayio/TileGrid.h b/shared-bindings/displayio/TileGrid.h new file mode 100644 index 0000000000000..0ee1c788360e9 --- /dev/null +++ b/shared-bindings/displayio/TileGrid.h @@ -0,0 +1,65 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_TILEGRID_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_TILEGRID_H + +#include "shared-module/displayio/TileGrid.h" + +extern const mp_obj_type_t displayio_tilegrid_type; + +void common_hal_displayio_tilegrid_construct(displayio_tilegrid_t *self, mp_obj_t bitmap, + uint16_t bitmap_width_in_tiles, uint16_t bitmap_height_in_tiles, + mp_obj_t pixel_shader, uint16_t width, uint16_t height, + uint16_t tile_width, uint16_t tile_height, uint16_t x, uint16_t y, uint8_t default_tile); + +bool common_hal_displayio_tilegrid_get_hidden(displayio_tilegrid_t* self); +void common_hal_displayio_tilegrid_set_hidden(displayio_tilegrid_t* self, bool hidden); +mp_int_t common_hal_displayio_tilegrid_get_x(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_x(displayio_tilegrid_t *self, mp_int_t x); +mp_int_t common_hal_displayio_tilegrid_get_y(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_y(displayio_tilegrid_t *self, mp_int_t y); +mp_obj_t common_hal_displayio_tilegrid_get_pixel_shader(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_pixel_shader(displayio_tilegrid_t *self, mp_obj_t pixel_shader); + + +bool common_hal_displayio_tilegrid_get_flip_x(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_flip_x(displayio_tilegrid_t *self, bool flip_x); +bool common_hal_displayio_tilegrid_get_flip_y(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_flip_y(displayio_tilegrid_t *self, bool flip_y); +bool common_hal_displayio_tilegrid_get_transpose_xy(displayio_tilegrid_t *self); +void common_hal_displayio_tilegrid_set_transpose_xy(displayio_tilegrid_t *self, bool transpose_xy); + +uint16_t common_hal_displayio_tilegrid_get_width(displayio_tilegrid_t *self); +uint16_t common_hal_displayio_tilegrid_get_height(displayio_tilegrid_t *self); + +uint8_t common_hal_displayio_tilegrid_get_tile(displayio_tilegrid_t *self, uint16_t x, uint16_t y); +void common_hal_displayio_tilegrid_set_tile(displayio_tilegrid_t *self, uint16_t x, uint16_t y, uint8_t tile_index); + +// Private API for scrolling the TileGrid. +void common_hal_displayio_tilegrid_set_top_left(displayio_tilegrid_t *self, uint16_t x, uint16_t y); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_TILEGRID_H diff --git a/shared-bindings/displayio/__init__.c b/shared-bindings/displayio/__init__.c new file mode 100644 index 0000000000000..f7832559307c5 --- /dev/null +++ b/shared-bindings/displayio/__init__.c @@ -0,0 +1,115 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/displayio/__init__.h" +#include "shared-bindings/displayio/Bitmap.h" +#include "shared-bindings/displayio/ColorConverter.h" +#include "shared-bindings/displayio/Display.h" +#include "shared-bindings/displayio/EPaperDisplay.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/displayio/I2CDisplay.h" +#include "shared-bindings/displayio/OnDiskBitmap.h" +#include "shared-bindings/displayio/Palette.h" +#include "shared-bindings/displayio/ParallelBus.h" +#include "shared-bindings/displayio/Shape.h" +#include "shared-bindings/displayio/TileGrid.h" + +//| :mod:`displayio` --- Native display driving +//| ========================================================================= +//| +//| .. module:: displayio +//| :synopsis: Native helpers for driving displays +//| :platform: SAMD21, SAMD51, nRF52 +//| +//| The `displayio` module contains classes to manage display output +//| including synchronizing with refresh rates and partial updating. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Bitmap +//| ColorConverter +//| Display +//| EPaperDisplay +//| FourWire +//| Group +//| I2CDisplay +//| OnDiskBitmap +//| Palette +//| ParallelBus +//| Shape +//| TileGrid +//| + + +//| .. function:: release_displays() +//| +//| Releases any actively used displays so their busses and pins can be used again. This will also +//| release the builtin display on boards that have one. You will need to reinitialize it yourself +//| afterwards. This may take seconds to complete if an active EPaperDisplay is refreshing. +//| +//| Use this once in your code.py if you initialize a display. Place it right before the +//| initialization so the display is active as long as possible. +//| +STATIC mp_obj_t displayio_release_displays(void) { + common_hal_displayio_release_displays(); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_0(displayio_release_displays_obj, displayio_release_displays); + +STATIC const mp_rom_map_elem_t displayio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_displayio) }, + { MP_ROM_QSTR(MP_QSTR_Bitmap), MP_ROM_PTR(&displayio_bitmap_type) }, + { MP_ROM_QSTR(MP_QSTR_ColorConverter), MP_ROM_PTR(&displayio_colorconverter_type) }, + { MP_ROM_QSTR(MP_QSTR_Display), MP_ROM_PTR(&displayio_display_type) }, + { MP_ROM_QSTR(MP_QSTR_EPaperDisplay), MP_ROM_PTR(&displayio_epaperdisplay_type) }, + { MP_ROM_QSTR(MP_QSTR_Group), MP_ROM_PTR(&displayio_group_type) }, + { MP_ROM_QSTR(MP_QSTR_OnDiskBitmap), MP_ROM_PTR(&displayio_ondiskbitmap_type) }, + { MP_ROM_QSTR(MP_QSTR_Palette), MP_ROM_PTR(&displayio_palette_type) }, + { MP_ROM_QSTR(MP_QSTR_Shape), MP_ROM_PTR(&displayio_shape_type) }, + { MP_ROM_QSTR(MP_QSTR_TileGrid), MP_ROM_PTR(&displayio_tilegrid_type) }, + + { MP_ROM_QSTR(MP_QSTR_FourWire), MP_ROM_PTR(&displayio_fourwire_type) }, + { MP_ROM_QSTR(MP_QSTR_I2CDisplay), MP_ROM_PTR(&displayio_i2cdisplay_type) }, + { MP_ROM_QSTR(MP_QSTR_ParallelBus), MP_ROM_PTR(&displayio_parallelbus_type) }, + + { MP_ROM_QSTR(MP_QSTR_release_displays), MP_ROM_PTR(&displayio_release_displays_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(displayio_module_globals, displayio_module_globals_table); + +const mp_obj_module_t displayio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&displayio_module_globals, +}; diff --git a/shared-bindings/displayio/__init__.h b/shared-bindings/displayio/__init__.h new file mode 100644 index 0000000000000..a7748d029a534 --- /dev/null +++ b/shared-bindings/displayio/__init__.h @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO___INIT___H + +#include "py/obj.h" + +typedef enum { + DISPLAY_COMMAND, + DISPLAY_DATA +} display_byte_type_t; + +typedef enum { + CHIP_SELECT_UNTOUCHED, + CHIP_SELECT_TOGGLE_EVERY_BYTE +} display_chip_select_behavior_t; + +typedef bool (*display_bus_bus_reset)(mp_obj_t bus); +typedef bool (*display_bus_bus_free)(mp_obj_t bus); +typedef bool (*display_bus_begin_transaction)(mp_obj_t bus); +typedef void (*display_bus_send)(mp_obj_t bus, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length); +typedef void (*display_bus_end_transaction)(mp_obj_t bus); + +void common_hal_displayio_release_displays(void); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO___INIT___H diff --git a/shared-bindings/fontio/BuiltinFont.c b/shared-bindings/fontio/BuiltinFont.c new file mode 100644 index 0000000000000..74bc4d29ea222 --- /dev/null +++ b/shared-bindings/fontio/BuiltinFont.c @@ -0,0 +1,110 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/fontio/BuiltinFont.h" + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/binary.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: fontio +//| +//| :class:`BuiltinFont` -- A font built into CircuitPython +//| ========================================================================================= +//| +//| A font built into CircuitPython. +//| +//| .. class:: BuiltinFont() +//| +//| Creation not supported. Available fonts are defined when CircuitPython is built. See the +//| `Adafruit_CircuitPython_Bitmap_Font `_ +//| library for dynamically loaded fonts. +//| + +//| .. attribute:: bitmap +//| +//| Bitmap containing all font glyphs starting with ASCII and followed by unicode. Use +//| `get_glyph` in most cases. This is useful for use with `displayio.TileGrid` and +//| `terminalio.Terminal`. +//| +STATIC mp_obj_t fontio_builtinfont_obj_get_bitmap(mp_obj_t self_in) { + fontio_builtinfont_t *self = MP_OBJ_TO_PTR(self_in); + return common_hal_fontio_builtinfont_get_bitmap(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(fontio_builtinfont_get_bitmap_obj, fontio_builtinfont_obj_get_bitmap); + +const mp_obj_property_t fontio_builtinfont_bitmap_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&fontio_builtinfont_get_bitmap_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: get_bounding_box() +//| +//| Returns the maximum bounds of all glyphs in the font in a tuple of two values: width, height. +//| +STATIC mp_obj_t fontio_builtinfont_obj_get_bounding_box(mp_obj_t self_in) { + fontio_builtinfont_t *self = MP_OBJ_TO_PTR(self_in); + + return common_hal_fontio_builtinfont_get_bounding_box(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(fontio_builtinfont_get_bounding_box_obj, fontio_builtinfont_obj_get_bounding_box); + + +//| .. method:: get_glyph(codepoint) +//| +//| Returns a `fontio.Glyph` for the given codepoint or None if no glyph is available. +//| +STATIC mp_obj_t fontio_builtinfont_obj_get_glyph(mp_obj_t self_in, mp_obj_t codepoint_obj) { + fontio_builtinfont_t *self = MP_OBJ_TO_PTR(self_in); + + mp_int_t codepoint; + if (!mp_obj_get_int_maybe(codepoint_obj, &codepoint)) { + mp_raise_ValueError_varg(translate("%q should be an int"), MP_QSTR_codepoint); + } + return common_hal_fontio_builtinfont_get_glyph(self, codepoint); +} +MP_DEFINE_CONST_FUN_OBJ_2(fontio_builtinfont_get_glyph_obj, fontio_builtinfont_obj_get_glyph); + +STATIC const mp_rom_map_elem_t fontio_builtinfont_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_bitmap), MP_ROM_PTR(&fontio_builtinfont_bitmap_obj) }, + { MP_ROM_QSTR(MP_QSTR_get_bounding_box), MP_ROM_PTR(&fontio_builtinfont_get_bounding_box_obj) }, + { MP_ROM_QSTR(MP_QSTR_get_glyph), MP_ROM_PTR(&fontio_builtinfont_get_glyph_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(fontio_builtinfont_locals_dict, fontio_builtinfont_locals_dict_table); + +const mp_obj_type_t fontio_builtinfont_type = { + { &mp_type_type }, + .name = MP_QSTR_BuiltinFont, + .locals_dict = (mp_obj_dict_t*)&fontio_builtinfont_locals_dict, +}; diff --git a/shared-bindings/fontio/BuiltinFont.h b/shared-bindings/fontio/BuiltinFont.h new file mode 100644 index 0000000000000..e87445e6b2cac --- /dev/null +++ b/shared-bindings/fontio/BuiltinFont.h @@ -0,0 +1,38 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_BUILTINFONT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_BUILTINFONT_H + +#include "shared-module/fontio/BuiltinFont.h" + +extern const mp_obj_type_t fontio_builtinfont_type; + +mp_obj_t common_hal_fontio_builtinfont_get_bitmap(const fontio_builtinfont_t *self); +mp_obj_t common_hal_fontio_builtinfont_get_bounding_box(const fontio_builtinfont_t *self); +mp_obj_t common_hal_fontio_builtinfont_get_glyph(const fontio_builtinfont_t *self, mp_uint_t codepoint); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_BUILTINFONT_H diff --git a/shared-bindings/fontio/Glyph.c b/shared-bindings/fontio/Glyph.c new file mode 100644 index 0000000000000..a2328415217c0 --- /dev/null +++ b/shared-bindings/fontio/Glyph.c @@ -0,0 +1,75 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/fontio/Glyph.h" + +#include + +//| .. currentmodule:: fontio +//| +//| :class:`Glyph` -- Storage of glyph info +//| ========================================================================== +//| +//| .. class:: Glyph(bitmap, tile_index, width, height, dx, dy, shift_x, shift_y) +//| +//| Named tuple used to capture a single glyph and its attributes. +//| +//| :param displayio.Bitmap bitmap: the bitmap including the glyph +//| :param int tile_index: the tile index within the bitmap +//| :param int width: the width of the glyph's bitmap +//| :param int height: the height of the glyph's bitmap +//| :param int dx: x adjustment to the bitmap's position +//| :param int dy: y adjustment to the bitmap's position +//| :param int shift_x: the x difference to the next glyph +//| :param int shift_y: the y difference to the next glyph +//| +const mp_obj_namedtuple_type_t fontio_glyph_type = { + .base = { + .base = { + .type = &mp_type_type + }, + .name = MP_QSTR_Glyph, + .print = namedtuple_print, + .make_new = namedtuple_make_new, + .unary_op = mp_obj_tuple_unary_op, + .binary_op = mp_obj_tuple_binary_op, + .attr = namedtuple_attr, + .subscr = mp_obj_tuple_subscr, + .getiter = mp_obj_tuple_getiter, + .parent = &mp_type_tuple, + }, + .n_fields = 8, + .fields = { + MP_QSTR_bitmap, + MP_QSTR_tile_index, + MP_QSTR_width, + MP_QSTR_height, + MP_QSTR_dx, + MP_QSTR_dy, + MP_QSTR_shift_x, + MP_QSTR_shift_y + }, +}; diff --git a/shared-bindings/fontio/Glyph.h b/shared-bindings/fontio/Glyph.h new file mode 100644 index 0000000000000..c58d812dd87de --- /dev/null +++ b/shared-bindings/fontio/Glyph.h @@ -0,0 +1,34 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_GLYPH_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_GLYPH_H + +#include "py/objnamedtuple.h" + +extern const mp_obj_namedtuple_type_t fontio_glyph_type; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO_GLYPH_H diff --git a/shared-bindings/fontio/__init__.c b/shared-bindings/fontio/__init__.c new file mode 100644 index 0000000000000..cd0f5ab0f8261 --- /dev/null +++ b/shared-bindings/fontio/__init__.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/fontio/__init__.h" +#include "shared-bindings/fontio/BuiltinFont.h" +#include "shared-bindings/fontio/Glyph.h" + +//| :mod:`fontio` --- Core font related data structures +//| ========================================================================= +//| +//| .. module:: fontio +//| :synopsis: Core font related data structures +//| :platform: SAMD21, SAMD51, nRF52 +//| +//| The `fontio` module contains classes to store font related information. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| BuiltinFont +//| Glyph +//| + +STATIC const mp_rom_map_elem_t fontio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_fontio) }, + { MP_ROM_QSTR(MP_QSTR_BuiltinFont), MP_ROM_PTR(&fontio_builtinfont_type) }, + { MP_ROM_QSTR(MP_QSTR_Glyph), MP_ROM_PTR(&fontio_glyph_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(fontio_module_globals, fontio_module_globals_table); + +const mp_obj_module_t fontio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&fontio_module_globals, +}; diff --git a/shared-bindings/fontio/__init__.h b/shared-bindings/fontio/__init__.h new file mode 100644 index 0000000000000..209919777db8f --- /dev/null +++ b/shared-bindings/fontio/__init__.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO___INIT___H + + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_FONTIO___INIT___H diff --git a/shared-bindings/frequencyio/FrequencyIn.c b/shared-bindings/frequencyio/FrequencyIn.c new file mode 100644 index 0000000000000..6743f8706316c --- /dev/null +++ b/shared-bindings/frequencyio/FrequencyIn.c @@ -0,0 +1,245 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/runtime0.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/frequencyio/FrequencyIn.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: frequencyio +//| +//| :class:`FrequencyIn` -- Read a frequency signal +//| ======================================================== +//| +//| FrequencyIn is used to measure the frequency, in hertz, of a digital signal +//| on an incoming pin. Accuracy has shown to be within 10%, if not better. It +//| is recommended to utilize an average of multiple samples to smooth out readings. +//| +//| Frequencies below 1KHz are not currently detectable. +//| +//| FrequencyIn will not determine pulse width (use ``PulseIn``). +//| +//| .. class:: FrequencyIn(pin, capture_period=10) +//| +//| Create a FrequencyIn object associated with the given pin. +//| +//| :param ~microcontroller.Pin pin: Pin to read frequency from. +//| :param int capture_period: Keyword argument to set the measurement period, in +//| milliseconds. Default is 10ms; range is 1ms - 500ms. +//| +//| Read the incoming frequency from a pin:: +//| +//| import frequencyio +//| import board +//| +//| frequency = frequencyio.FrequencyIn(board.D11) +//| +//| # Loop while printing the detected frequency +//| while True: +//| print(frequency.value) +//| +//| # Optional clear() will reset the value +//| # to zero. Without this, if the incoming +//| # signal stops, the last reading will remain +//| # as the value. +//| frequency.clear() +//| +STATIC mp_obj_t frequencyio_frequencyin_make_new(const mp_obj_type_t *type, size_t n_args, + const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, true); + + frequencyio_frequencyin_obj_t *self = m_new_obj(frequencyio_frequencyin_obj_t); + self->base.type = &frequencyio_frequencyin_type; + enum { ARG_pin, ARG_capture_period }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_capture_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 10} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mcu_pin_obj_t* pin = validate_obj_is_free_pin(args[ARG_pin].u_obj); + + const uint16_t capture_period = args[ARG_capture_period].u_int; + + common_hal_frequencyio_frequencyin_construct(self, pin, capture_period); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the FrequencyIn and releases any hardware resources for reuse. +//| +STATIC mp_obj_t frequencyio_frequencyin_deinit(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_frequencyio_frequencyin_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequencyin_deinit_obj, frequencyio_frequencyin_deinit); + +STATIC void check_for_deinit(frequencyio_frequencyin_obj_t *self) { + if (common_hal_frequencyio_frequencyin_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t frequencyio_frequencyin_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_frequencyio_frequencyin_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(frequencyio_frequencyin___exit___obj, 4, 4, frequencyio_frequencyin_obj___exit__); + +//| .. method:: pause() +//| +//| Pause frequency capture. +//| +STATIC mp_obj_t frequencyio_frequencyin_obj_pause(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_frequencyio_frequencyin_pause(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequencyin_pause_obj, frequencyio_frequencyin_obj_pause); + +//| .. method:: resume() +//| +//| Resumes frequency capture. +//| +STATIC mp_obj_t frequencyio_frequencyin_obj_resume(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_frequencyio_frequencyin_resume(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequencyin_resume_obj, frequencyio_frequencyin_obj_resume); + +//| .. method:: clear() +//| +//| Clears the last detected frequency capture value. +//| + +STATIC mp_obj_t frequencyio_frequencyin_obj_clear(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_frequencyio_frequencyin_clear(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequencyin_clear_obj, frequencyio_frequencyin_obj_clear); + +//| .. attribute:: capture_period +//| +//| The capture measurement period. Lower incoming frequencies will be measured +//| more accurately with longer capture periods. Higher frequencies are more +//| accurate with shorter capture periods. +//| +//| .. note:: When setting a new ``capture_period``, all previous capture information is +//| cleared with a call to ``clear()``. +//| +STATIC mp_obj_t frequencyio_frequencyin_obj_get_capture_period(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + return MP_OBJ_NEW_SMALL_INT(common_hal_frequencyio_frequencyin_get_capture_period(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequency_get_capture_period_obj, frequencyio_frequencyin_obj_get_capture_period); + +STATIC mp_obj_t frequencyio_frequencyin_obj_set_capture_period(mp_obj_t self_in, mp_obj_t capture_period) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_frequencyio_frequencyin_set_capture_period(self, mp_obj_get_int(capture_period)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(frequencyio_frequency_set_capture_period_obj, frequencyio_frequencyin_obj_set_capture_period); + +const mp_obj_property_t frequencyio_frequencyin_capture_period_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&frequencyio_frequency_get_capture_period_obj, + (mp_obj_t)&frequencyio_frequency_set_capture_period_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: __get__(index) +//| +//| Returns the value of the last frequency captured. +//| +STATIC mp_obj_t frequencyio_frequencyin_obj_get_value(mp_obj_t self_in) { + frequencyio_frequencyin_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + //return MP_OBJ_NEW_SMALL_INT(common_hal_frequencyio_frequencyin_get_item(self)); + return mp_obj_new_int_from_float(common_hal_frequencyio_frequencyin_get_item(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(frequencyio_frequencyin_get_value_obj, frequencyio_frequencyin_obj_get_value); + +const mp_obj_property_t frequencyio_frequencyin_value_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&frequencyio_frequencyin_get_value_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t frequencyio_frequencyin_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&frequencyio_frequencyin_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&frequencyio_frequencyin___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&frequencyio_frequencyin_value_obj) }, + { MP_ROM_QSTR(MP_QSTR_pause), MP_ROM_PTR(&frequencyio_frequencyin_pause_obj) }, + { MP_ROM_QSTR(MP_QSTR_resume), MP_ROM_PTR(&frequencyio_frequencyin_resume_obj) }, + { MP_ROM_QSTR(MP_QSTR_clear), MP_ROM_PTR(&frequencyio_frequencyin_clear_obj) }, + { MP_ROM_QSTR(MP_QSTR_capture_period), MP_ROM_PTR(&frequencyio_frequencyin_capture_period_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(frequencyio_frequencyin_locals_dict, frequencyio_frequencyin_locals_dict_table); + +const mp_obj_type_t frequencyio_frequencyin_type = { + { &mp_type_type }, + .name = MP_QSTR_frequencyin, + .make_new = frequencyio_frequencyin_make_new, + .locals_dict = (mp_obj_dict_t*)&frequencyio_frequencyin_locals_dict, +}; diff --git a/shared-bindings/frequencyio/FrequencyIn.h b/shared-bindings/frequencyio/FrequencyIn.h new file mode 100644 index 0000000000000..dba6c3a661280 --- /dev/null +++ b/shared-bindings/frequencyio/FrequencyIn.h @@ -0,0 +1,46 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO_FREQUENCYIN_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO_FREQUENCYIN_H + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/frequencyio/FrequencyIn.h" + +extern const mp_obj_type_t frequencyio_frequencyin_type; + +extern void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t *self, + const mcu_pin_obj_t *pin, uint16_t capture_period); +extern void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t *self); +extern bool common_hal_frequencyio_frequencyin_deinited(frequencyio_frequencyin_obj_t *self); +extern void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t *self); +extern void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t *self); +extern void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t *self); +extern uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t *self); +extern uint16_t common_hal_frequencyio_frequencyin_get_capture_period(frequencyio_frequencyin_obj_t *self); +extern void common_hal_frequencyio_frequencyin_set_capture_period(frequencyio_frequencyin_obj_t *self, uint16_t capture_period); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO_FREQUENCYIN_H diff --git a/shared-bindings/frequencyio/__init__.c b/shared-bindings/frequencyio/__init__.c new file mode 100644 index 0000000000000..48a0268249268 --- /dev/null +++ b/shared-bindings/frequencyio/__init__.c @@ -0,0 +1,89 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/frequencyio/__init__.h" +#include "shared-bindings/frequencyio/FrequencyIn.h" + +//| :mod:`frequencyio` --- Support for frequency based protocols +//| ============================================================= +//| +//| .. module:: frequencyio +//| :synopsis: Support for frequency based protocols +//| :platform: SAMD51 +//| +//| The `frequencyio` module contains classes to provide access to basic frequency IO. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| FrequencyIn +//| + +//| .. warning:: This module is not available in SAMD21 builds. See the +//| :ref:`module-support-matrix` for more info. +//| + +//| All classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +//| For example:: +//| +//| import frequencyio +//| import time +//| from board import * +//| +//| frequency = frequencyio.FrequencyIn(D13) +//| frequency.capture_period = 15 +//| time.sleep(0.1) +//| +//| This example will initialize the the device, set +//| :py:data:`~frequencyio.FrequencyIn.capture_period`, and then sleep 0.1 seconds. +//| CircuitPython will automatically turn off FrequencyIn capture when it resets all +//| hardware after program completion. Use ``deinit()`` or a ``with`` statement +//| to do it yourself. +//| + +STATIC const mp_rom_map_elem_t frequencyio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_frequencyio) }, + { MP_ROM_QSTR(MP_QSTR_FrequencyIn), MP_ROM_PTR(&frequencyio_frequencyin_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(frequencyio_module_globals, frequencyio_module_globals_table); + +const mp_obj_module_t frequencyio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&frequencyio_module_globals, +}; diff --git a/shared-bindings/frequencyio/__init__.h b/shared-bindings/frequencyio/__init__.h new file mode 100644 index 0000000000000..39157659440fb --- /dev/null +++ b/shared-bindings/frequencyio/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_FREQUENCYIO___INIT___H diff --git a/shared-bindings/gamepad/GamePad.c b/shared-bindings/gamepad/GamePad.c index a03b9318d84e7..d3c29019a5f9f 100644 --- a/shared-bindings/gamepad/GamePad.c +++ b/shared-bindings/gamepad/GamePad.c @@ -23,14 +23,17 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include "shared-bindings/gamepad/GamePad.h" + #include "py/obj.h" #include "py/runtime.h" #include "py/mphal.h" -#include "shared-module/gamepad/GamePad.h" -#include "GamePad.h" - +#include "py/gc.h" +#include "py/mpstate.h" +#include "shared-bindings/gamepad/__init__.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/translate.h" -gamepad_obj_t* gamepad_singleton = NULL; //| .. currentmodule:: gamepad //| @@ -74,7 +77,8 @@ gamepad_obj_t* gamepad_singleton = NULL; //| Initializes button scanning routines. //| //| The ``b1``-``b8`` parameters are ``DigitalInOut`` objects, which -//| immediately get switched to input with a pull-up, and then scanned +//| immediately get switched to input with a pull-up, (unless they already +//| were set to pull-down, in which case they remain so), and then scanned //| regularly for button presses. The order is the same as the order of //| bits returned by the ``get_pressed`` function. You can re-initialize //| it with different keys, then the new object will replace the previous @@ -91,16 +95,25 @@ gamepad_obj_t* gamepad_singleton = NULL; //| button presses start to be recorded. //| STATIC mp_obj_t gamepad_make_new(const mp_obj_type_t *type, size_t n_args, - size_t n_kw, const mp_obj_t *args) { - if (!gamepad_singleton) { + const mp_obj_t *args, mp_map_t *kw_args) { + if (n_args > 8 || n_args == 0) { + mp_raise_TypeError(translate("argument num/types mismatch")); + } + for (size_t i = 0; i < n_args; ++i) { + assert_digitalinout(args[i]); + } + gamepad_obj_t* gamepad_singleton = MP_STATE_VM(gamepad_singleton); + if (!gamepad_singleton || + !MP_OBJ_IS_TYPE(MP_OBJ_FROM_PTR(gamepad_singleton), &gamepad_type)) { gamepad_singleton = m_new_obj(gamepad_obj_t); gamepad_singleton->base.type = &gamepad_type; + gamepad_singleton = gc_make_long_lived(gamepad_singleton); + MP_STATE_VM(gamepad_singleton) = gamepad_singleton; } - gamepad_init(n_args, args); + common_hal_gamepad_gamepad_init(gamepad_singleton, args, n_args); return MP_OBJ_FROM_PTR(gamepad_singleton); } - //| .. method:: get_pressed() //| //| Get the status of buttons pressed since the last call and clear it. @@ -112,10 +125,10 @@ STATIC mp_obj_t gamepad_make_new(const mp_obj_type_t *type, size_t n_args, //| held down) can be recorded for the next call. //| STATIC mp_obj_t gamepad_get_pressed(mp_obj_t self_in) { - gamepad_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_obj_t gamepad = MP_OBJ_NEW_SMALL_INT(self->pressed); - self->pressed = 0; - return gamepad; + gamepad_obj_t* gamepad_singleton = MP_STATE_VM(gamepad_singleton); + mp_obj_t pressed = MP_OBJ_NEW_SMALL_INT(gamepad_singleton->pressed); + gamepad_singleton->pressed = gamepad_singleton->last; + return pressed; } MP_DEFINE_CONST_FUN_OBJ_1(gamepad_get_pressed_obj, gamepad_get_pressed); @@ -125,14 +138,12 @@ MP_DEFINE_CONST_FUN_OBJ_1(gamepad_get_pressed_obj, gamepad_get_pressed); //| Disable button scanning. //| STATIC mp_obj_t gamepad_deinit(mp_obj_t self_in) { - gamepad_singleton = NULL; + common_hal_gamepad_gamepad_deinit(self_in); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(gamepad_deinit_obj, gamepad_deinit); -STATIC mp_obj_t gamepad_make_new(const mp_obj_type_t *type, size_t n_args, - size_t n_kw, const mp_obj_t *args); STATIC const mp_rom_map_elem_t gamepad_locals_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_get_pressed), MP_ROM_PTR(&gamepad_get_pressed_obj)}, { MP_OBJ_NEW_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&gamepad_deinit_obj)}, @@ -144,4 +155,3 @@ const mp_obj_type_t gamepad_type = { .make_new = gamepad_make_new, .locals_dict = (mp_obj_dict_t*)&gamepad_locals_dict, }; - diff --git a/shared-bindings/gamepad/GamePad.h b/shared-bindings/gamepad/GamePad.h index 172c95ace85ff..3bbad4c97b325 100644 --- a/shared-bindings/gamepad/GamePad.h +++ b/shared-bindings/gamepad/GamePad.h @@ -28,6 +28,11 @@ #ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD_GAMEPAD_H #define MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD_GAMEPAD_H +#include "shared-module/gamepad/GamePad.h" + extern const mp_obj_type_t gamepad_type; +void common_hal_gamepad_gamepad_init(gamepad_obj_t *gamepad, const mp_obj_t pins[], size_t n_pins); +void common_hal_gamepad_gamepad_deinit(gamepad_obj_t *gamepad); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD_GAMEPAD_H diff --git a/shared-bindings/gamepad/__init__.c b/shared-bindings/gamepad/__init__.c index 0c99d0d52bea8..cea0b4ee9620d 100644 --- a/shared-bindings/gamepad/__init__.c +++ b/shared-bindings/gamepad/__init__.c @@ -26,8 +26,8 @@ #include "py/obj.h" #include "py/runtime.h" #include "py/mphal.h" -#include "GamePad.h" - +#include "shared-bindings/gamepad/GamePad.h" +#include "shared-bindings/util.h" //| :mod:`gamepad` --- Button handling //| ================================== diff --git a/shared-bindings/gamepad/__init__.h b/shared-bindings/gamepad/__init__.h new file mode 100644 index 0000000000000..2ae5efb3a0352 --- /dev/null +++ b/shared-bindings/gamepad/__init__.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD___INIT___H + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPAD___INIT___H diff --git a/shared-bindings/gamepadshift/GamePadShift.c b/shared-bindings/gamepadshift/GamePadShift.c new file mode 100644 index 0000000000000..91203ad20db45 --- /dev/null +++ b/shared-bindings/gamepadshift/GamePadShift.c @@ -0,0 +1,123 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "py/gc.h" +#include "py/mpstate.h" +#include "shared-bindings/gamepadshift/GamePadShift.h" +#include "shared-bindings/gamepadshift/__init__.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: gamepadshift +//| +//| :class:`GamePadShift` -- Scan buttons for presses through a shift register +//| =========================================================================== +//| +//| .. class:: GamePadShift(clock, data, latch) +//| +//| Initializes button scanning routines. +//| +//| The ``clock``, ``data`` and ``latch`` parameters are ``DigitalInOut`` +//| objects connected to the shift register controlling the buttons. +//| +//| They button presses are accumulated, until the ``get_pressed`` method +//| is called, at which point the button state is cleared, and the new +//| button presses start to be recorded. +//| +//| Only one gamepad (`gamepad.GamePad` or `gamepadshift.GamePadShift`) +//| may be used at a time. +//| +STATIC mp_obj_t gamepadshift_make_new(const mp_obj_type_t *type, size_t n_args, + const mp_obj_t *pos_args, mp_map_t *kw_args) { + + enum { ARG_clock, ARG_data, ARG_latch }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ}, + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_latch, MP_ARG_REQUIRED | MP_ARG_OBJ}, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), + allowed_args, args); + + digitalio_digitalinout_obj_t *clock_pin = assert_digitalinout(args[ARG_clock].u_obj); + digitalio_digitalinout_obj_t *data_pin = assert_digitalinout(args[ARG_data].u_obj); + digitalio_digitalinout_obj_t *latch_pin = assert_digitalinout(args[ARG_latch].u_obj); + + gamepadshift_obj_t* gamepad_singleton = MP_STATE_VM(gamepad_singleton); + if (!gamepad_singleton || + !MP_OBJ_IS_TYPE(MP_OBJ_FROM_PTR(gamepad_singleton), + &gamepadshift_type)) { + gamepad_singleton = m_new_obj(gamepadshift_obj_t); + gamepad_singleton->base.type = &gamepadshift_type; + gamepad_singleton = gc_make_long_lived(gamepad_singleton); + MP_STATE_VM(gamepad_singleton) = gamepad_singleton; + } + common_hal_gamepadshift_gamepadshift_init(gamepad_singleton, clock_pin, data_pin, latch_pin); + return MP_OBJ_FROM_PTR(gamepad_singleton); +} + +//| .. method:: get_pressed() +//| +//| Get the status of buttons pressed since the last call and clear it. +//| +//| Returns an 8-bit number, with bits that correspond to buttons, +//| which have been pressed (or held down) since the last call to this +//| function set to 1, and the remaining bits set to 0. Then it clears +//| the button state, so that new button presses (or buttons that are +//| held down) can be recorded for the next call. +//| +STATIC mp_obj_t gamepadshift_get_pressed(mp_obj_t self_in) { + gamepadshift_obj_t* gamepad_singleton = MP_STATE_VM(gamepad_singleton); + mp_obj_t pressed = MP_OBJ_NEW_SMALL_INT(gamepad_singleton->pressed); + gamepad_singleton->pressed = gamepad_singleton->last; + return pressed; +} +MP_DEFINE_CONST_FUN_OBJ_1(gamepadshift_get_pressed_obj, gamepadshift_get_pressed); + +//| .. method:: deinit() +//| +//| Disable button scanning. +//| +STATIC mp_obj_t gamepadshift_deinit(mp_obj_t self_in) { + common_hal_gamepadshift_gamepadshift_deinit(self_in); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(gamepadshift_deinit_obj, gamepadshift_deinit); + + +STATIC const mp_rom_map_elem_t gamepadshift_locals_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_get_pressed), MP_ROM_PTR(&gamepadshift_get_pressed_obj)}, + { MP_OBJ_NEW_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&gamepadshift_deinit_obj)}, +}; +STATIC MP_DEFINE_CONST_DICT(gamepadshift_locals_dict, gamepadshift_locals_dict_table); +const mp_obj_type_t gamepadshift_type = { + { &mp_type_type }, + .name = MP_QSTR_GamePadShift, + .make_new = gamepadshift_make_new, + .locals_dict = (mp_obj_dict_t*)&gamepadshift_locals_dict, +}; diff --git a/shared-bindings/gamepadshift/GamePadShift.h b/shared-bindings/gamepadshift/GamePadShift.h new file mode 100644 index 0000000000000..3e8ea9693d5d4 --- /dev/null +++ b/shared-bindings/gamepadshift/GamePadShift.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT_GAMEPADSHIFT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT_GAMEPADSHIFT_H + +#include "shared-module/gamepadshift/GamePadShift.h" + +extern const mp_obj_type_t gamepadshift_type; + +void common_hal_gamepadshift_gamepadshift_init(gamepadshift_obj_t *gamepadshift, + digitalio_digitalinout_obj_t *clock_pin, + digitalio_digitalinout_obj_t *data_pin, + digitalio_digitalinout_obj_t *latch_pin); + +void common_hal_gamepadshift_gamepadshift_deinit(gamepadshift_obj_t *gamepadshift); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT_GAMEPADSHIFT_H diff --git a/shared-bindings/gamepadshift/__init__.c b/shared-bindings/gamepadshift/__init__.c new file mode 100644 index 0000000000000..2d36677260392 --- /dev/null +++ b/shared-bindings/gamepadshift/__init__.c @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "shared-bindings/gamepadshift/GamePadShift.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/util.h" + +//| :mod:`gamepadshift` --- Tracks button presses read through a shift register +//| =========================================================================== +//| +//| .. module:: gamepadshift +//| :synopsis: Tracks button presses read through a shift register +//| :platform: SAMD21, SAMD51 +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| GamePadShift +//| +STATIC const mp_rom_map_elem_t gamepadshift_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_gamepadshift) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GamePadShift), MP_ROM_PTR(&gamepadshift_type)}, +}; +STATIC MP_DEFINE_CONST_DICT(gamepadshift_module_globals, gamepadshift_module_globals_table); + +const mp_obj_module_t gamepadshift_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&gamepadshift_module_globals, +}; diff --git a/shared-bindings/gamepadshift/__init__.h b/shared-bindings/gamepadshift/__init__.h new file mode 100644 index 0000000000000..4b4be756a6533 --- /dev/null +++ b/shared-bindings/gamepadshift/__init__.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT___INIT___H + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GAMEPADSHIFT___INIT___H diff --git a/shared-bindings/help.c b/shared-bindings/help.c index d8ffc13dd079e..4e7c3a78bbadd 100644 --- a/shared-bindings/help.c +++ b/shared-bindings/help.c @@ -24,21 +24,11 @@ * THE SOFTWARE. */ -#include "genhdr/mpversion.h" - //| :func:`help` - Built-in method to provide helpful information //| ============================================================== //| -//| .. method:: help(object=None) +//| .. function:: help(object=None) //| //| Prints a help method about the given object. When ``object`` is none, //| prints general port information. //| - -const char circuitpython_help_text[] = - "Welcome to Adafruit CircuitPython " MICROPY_GIT_TAG "!\r\n" - "\r\n" - "Please visit learn.adafruit.com/category/circuitpython for project guides.\r\n" - "\r\n" - "To list built-in modules please do `help(\"modules\")`.\r\n"; -; diff --git a/shared-bindings/i2cslave/I2CSlave.c b/shared-bindings/i2cslave/I2CSlave.c new file mode 100644 index 0000000000000..e28eb3f253b1a --- /dev/null +++ b/shared-bindings/i2cslave/I2CSlave.c @@ -0,0 +1,445 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/i2cslave/I2CSlave.h" +#include "shared-bindings/time/__init__.h" +#include "shared-bindings/util.h" + +#include "lib/utils/buffer_helper.h" +#include "lib/utils/context_manager_helpers.h" +#include "lib/utils/interrupt_char.h" + +#include "py/mperrno.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" + +STATIC mp_obj_t mp_obj_new_i2cslave_i2c_slave_request(i2cslave_i2c_slave_obj_t *slave, uint8_t address, bool is_read, bool is_restart) { + i2cslave_i2c_slave_request_obj_t *self = m_new_obj(i2cslave_i2c_slave_request_obj_t); + self->base.type = &i2cslave_i2c_slave_request_type; + self->slave = slave; + self->address = address; + self->is_read = is_read; + self->is_restart = is_restart; + return (mp_obj_t)self; +} + +//| .. currentmodule:: i2cslave +//| +//| :class:`I2CSlave` --- Two wire serial protocol slave +//| ---------------------------------------------------- +//| +//| .. class:: I2CSlave(scl, sda, addresses, smbus=False) +//| +//| I2C is a two-wire protocol for communicating between devices. +//| This implements the slave side. +//| +//| :param ~microcontroller.Pin scl: The clock pin +//| :param ~microcontroller.Pin sda: The data pin +//| :param tuple addresses: The I2C addresses to respond to (how many is hw dependent). +//| :param bool smbus: Use SMBUS timings if the hardware supports it +//| +STATIC mp_obj_t i2cslave_i2c_slave_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + i2cslave_i2c_slave_obj_t *self = m_new_obj(i2cslave_i2c_slave_obj_t); + self->base.type = &i2cslave_i2c_slave_type; + enum { ARG_scl, ARG_sda, ARG_addresses, ARG_smbus }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_sda, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_addresses, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_smbus, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* scl = validate_obj_is_free_pin(args[ARG_scl].u_obj); + const mcu_pin_obj_t* sda = validate_obj_is_free_pin(args[ARG_sda].u_obj); + + mp_obj_iter_buf_t iter_buf; + mp_obj_t iterable = mp_getiter(args[ARG_addresses].u_obj, &iter_buf); + mp_obj_t item; + uint8_t *addresses = NULL; + unsigned int i = 0; + while ((item = mp_iternext(iterable)) != MP_OBJ_STOP_ITERATION) { + mp_int_t value; + if (!mp_obj_get_int_maybe(item, &value)) { + mp_raise_TypeError(translate("can't convert address to int")); + } + if (value < 0x00 || value > 0x7f) { + mp_raise_ValueError(translate("address out of bounds")); + } + addresses = m_renew(uint8_t, addresses, i, i + 1); + addresses[i++] = value; + } + if (i == 0) { + mp_raise_ValueError(translate("addresses is empty")); + } + + common_hal_i2cslave_i2c_slave_construct(self, scl, sda, addresses, i, args[ARG_smbus].u_bool); + return (mp_obj_t)self; +} + +//| .. method:: deinit() +//| +//| Releases control of the underlying hardware so other classes can use it. +//| +STATIC mp_obj_t i2cslave_i2c_slave_obj_deinit(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_type)); + i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_i2cslave_i2c_slave_deinit(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(i2cslave_i2c_slave_deinit_obj, i2cslave_i2c_slave_obj_deinit); + +//| .. method:: __enter__() +//| +//| No-op used in Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware on context exit. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t i2cslave_i2c_slave_obj___exit__(size_t n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_type)); + i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_i2cslave_i2c_slave_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave___exit___obj, 4, 4, i2cslave_i2c_slave_obj___exit__); + +//| .. method:: request(timeout=-1) +//| +//| Wait for an I2C request from a master. +//| +//| :param float timeout: Timeout in seconds. Zero means wait forever, a negative value means check once +//| :return: I2C Slave Request or None if timeout=-1 and there's no request +//| :rtype: ~i2cslave.I2CSlaveRequest +//| +STATIC mp_obj_t i2cslave_i2c_slave_request(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cslave_i2c_slave_type)); + i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + if(common_hal_i2cslave_i2c_slave_deinited(self)) { + raise_deinited_error(); + } + enum { ARG_timeout }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + #if MICROPY_PY_BUILTINS_FLOAT + float f = mp_obj_get_float(args[ARG_timeout].u_obj) * 1000; + int timeout_ms = (int)f; + #else + int timeout_ms = mp_obj_get_int(args[ARG_timeout].u_obj) * 1000; + #endif + + bool forever = false; + uint64_t timeout_end = 0; + if (timeout_ms == 0) { + forever = true; + } else if (timeout_ms > 0) { + timeout_end = common_hal_time_monotonic() + timeout_ms; + } + + int last_error = 0; + + do { + uint8_t address; + bool is_read; + bool is_restart; + + RUN_BACKGROUND_TASKS; + if (mp_hal_is_interrupted()) { + return mp_const_none; + } + + int status = common_hal_i2cslave_i2c_slave_is_addressed(self, &address, &is_read, &is_restart); + if (status < 0) { + // On error try one more time before bailing out + if (last_error) { + mp_raise_OSError(last_error); + } + last_error = -status; + mp_hal_delay_ms(10); + continue; + } + + last_error = 0; + + if (status == 0) { + mp_hal_delay_us(10); + continue; + } + + return mp_obj_new_i2cslave_i2c_slave_request(self, address, is_read, is_restart); + } while (forever || common_hal_time_monotonic() < timeout_end); + + if (timeout_ms > 0) { + mp_raise_OSError(MP_ETIMEDOUT); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(i2cslave_i2c_slave_request_obj, 1, i2cslave_i2c_slave_request); + +STATIC const mp_rom_map_elem_t i2cslave_i2c_slave_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&i2cslave_i2c_slave_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cslave_i2c_slave___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_request), MP_ROM_PTR(&i2cslave_i2c_slave_request_obj) }, + +}; + +STATIC MP_DEFINE_CONST_DICT(i2cslave_i2c_slave_locals_dict, i2cslave_i2c_slave_locals_dict_table); + +const mp_obj_type_t i2cslave_i2c_slave_type = { + { &mp_type_type }, + .name = MP_QSTR_I2CSlave, + .make_new = i2cslave_i2c_slave_make_new, + .locals_dict = (mp_obj_dict_t*)&i2cslave_i2c_slave_locals_dict, +}; + + +//| :class:`I2CSlaveRequest` --- I2C Slave Request +//| ---------------------------------------------- +//| +//| .. class:: I2CSlaveRequest(slave, address, is_read, is_restart) +//| +//| I2C transfer request from a master. +//| This cannot be instantiated directly, but is returned by :py:meth:`I2CSlave.request`. +//| +//| :param ~i2cslave.I2CSlave slave: The I2C Slave receiving this request +//| :param int address: I2C address +//| :param bool is_read: I2C Master read request +//| :param bool is_restart: Repeated Start Condition +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 4, 4, false); + return mp_obj_new_i2cslave_i2c_slave_request(args[0], mp_obj_get_int(args[1]), mp_obj_is_true(args[2]), mp_obj_is_true(args[3])); +} + +//| .. method:: __enter__() +//| +//| No-op used in Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Close the request. +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_obj___exit__(size_t n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_i2cslave_i2c_slave_close(self->slave); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave_request___exit___obj, 4, 4, i2cslave_i2c_slave_request_obj___exit__); + +//| .. attribute:: address +//| +//| The I2C address of the request. +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_get_address(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_int(self->address); +} +MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_address_obj, i2cslave_i2c_slave_request_get_address); + +//| .. attribute:: is_read +//| +//| The I2C master is reading from the device. +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_get_is_read(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(self->is_read); +} +MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_is_read_obj, i2cslave_i2c_slave_request_get_is_read); + +//| .. attribute:: is_restart +//| +//| Is Repeated Start Condition. +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_get_is_restart(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); + return mp_obj_new_bool(self->is_restart); +} +MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_is_restart_obj, i2cslave_i2c_slave_request_get_is_restart); + +//| .. method:: read(n=-1, ack=True) +//| +//| Read data. +//| If ack=False, the caller is responsible for calling :py:meth:`I2CSlaveRequest.ack`. +//| +//| :param int n: Number of bytes to read (negative means all) +//| :param bool ack: Whether or not to send an ACK after the n'th byte +//| :return: Bytes read +//| :rtype: bytearray +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + enum { ARG_n, ARG_ack }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_n, MP_ARG_INT, {.u_int = -1} }, + { MP_QSTR_ack, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = true} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + if (self->is_read) { + mp_raise_OSError(MP_EACCES); + } + + int n = args[ARG_n].u_int; + if (n == 0) { + return mp_obj_new_bytearray(0, NULL); + } + bool ack = args[ARG_ack].u_bool; + + int i = 0; + uint8_t *buffer = NULL; + uint64_t timeout_end = common_hal_time_monotonic() + 10 * 1000; + while (common_hal_time_monotonic() < timeout_end) { + RUN_BACKGROUND_TASKS; + if (mp_hal_is_interrupted()) { + break; + } + + uint8_t data; + int num = common_hal_i2cslave_i2c_slave_read_byte(self->slave, &data); + if (num == 0) { + break; + } + + buffer = m_renew(uint8_t, buffer, i, i + 1); + buffer[i++] = data; + if (i == n) { + if (ack) { + common_hal_i2cslave_i2c_slave_ack(self->slave, true); + } + break; + } + common_hal_i2cslave_i2c_slave_ack(self->slave, true); + } + + return mp_obj_new_bytearray(i, buffer); +} +MP_DEFINE_CONST_FUN_OBJ_KW(i2cslave_i2c_slave_request_read_obj, 1, i2cslave_i2c_slave_request_read); + +//| .. method:: write(buffer) +//| +//| Write the data contained in buffer. +//| +//| :param bytearray buffer: Write out the data in this buffer +//| :return: Number of bytes written +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_write(mp_obj_t self_in, mp_obj_t buf_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); + + if (!self->is_read) { + mp_raise_OSError(MP_EACCES); + } + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); + + for (size_t i = 0; i < bufinfo.len; i++) { + RUN_BACKGROUND_TASKS; + if (mp_hal_is_interrupted()) { + break; + } + + int num = common_hal_i2cslave_i2c_slave_write_byte(self->slave, ((uint8_t *)(bufinfo.buf))[i]); + if (num == 0) { + return mp_obj_new_int(i); + } + } + + return mp_obj_new_int(bufinfo.len); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(i2cslave_i2c_slave_request_write_obj, i2cslave_i2c_slave_request_write); + +//| .. method:: ack(ack=True) +//| +//| Acknowledge or Not Acknowledge last byte received. +//| Use together with :py:meth:`I2CSlaveRequest.read` ack=False. +//| +//| :param bool ack: Whether to send an ACK or NACK +//| +STATIC mp_obj_t i2cslave_i2c_slave_request_ack(uint n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); + bool ack = (n_args == 1) ? true : mp_obj_is_true(args[1]); + + if (self->is_read) { + mp_raise_OSError(MP_EACCES); + } + + common_hal_i2cslave_i2c_slave_ack(self->slave, ack); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave_request_ack_obj, 1, 2, i2cslave_i2c_slave_request_ack); + +STATIC mp_obj_t i2cslave_i2c_slave_request_close(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); + i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_i2cslave_i2c_slave_close(self->slave); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(i2cslave_i2c_slave_request_close_obj, i2cslave_i2c_slave_request_close); + +STATIC const mp_rom_map_elem_t i2cslave_i2c_slave_request_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cslave_i2c_slave_request___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&i2cslave_i2c_slave_request_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_is_read), MP_ROM_PTR(&i2cslave_i2c_slave_request_is_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_is_restart), MP_ROM_PTR(&i2cslave_i2c_slave_request_is_restart_obj) }, + { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&i2cslave_i2c_slave_request_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&i2cslave_i2c_slave_request_write_obj) }, + { MP_ROM_QSTR(MP_QSTR_ack), MP_ROM_PTR(&i2cslave_i2c_slave_request_ack_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&i2cslave_i2c_slave_request_close_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(i2cslave_i2c_slave_request_locals_dict, i2cslave_i2c_slave_request_locals_dict_table); + +const mp_obj_type_t i2cslave_i2c_slave_request_type = { + { &mp_type_type }, + .name = MP_QSTR_I2CSlaveRequest, + .make_new = i2cslave_i2c_slave_request_make_new, + .locals_dict = (mp_obj_dict_t*)&i2cslave_i2c_slave_request_locals_dict, +}; diff --git a/shared-bindings/i2cslave/I2CSlave.h b/shared-bindings/i2cslave/I2CSlave.h new file mode 100644 index 0000000000000..abb7614168663 --- /dev/null +++ b/shared-bindings/i2cslave/I2CSlave.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_I2C_SLAVE_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_I2C_SLAVE_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/i2cslave/I2CSlave.h" + +typedef struct { + mp_obj_base_t base; + i2cslave_i2c_slave_obj_t *slave; + uint16_t address; + bool is_read; + bool is_restart; +} i2cslave_i2c_slave_request_obj_t; + +extern const mp_obj_type_t i2cslave_i2c_slave_request_type; + +extern const mp_obj_type_t i2cslave_i2c_slave_type; + +extern void common_hal_i2cslave_i2c_slave_construct(i2cslave_i2c_slave_obj_t *self, + const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, + uint8_t *addresses, unsigned int num_addresses, bool smbus); +extern void common_hal_i2cslave_i2c_slave_deinit(i2cslave_i2c_slave_obj_t *self); +extern bool common_hal_i2cslave_i2c_slave_deinited(i2cslave_i2c_slave_obj_t *self); + +extern int common_hal_i2cslave_i2c_slave_is_addressed(i2cslave_i2c_slave_obj_t *self, + uint8_t *address, bool *is_read, bool *is_restart); +extern int common_hal_i2cslave_i2c_slave_read_byte(i2cslave_i2c_slave_obj_t *self, uint8_t *data); +extern int common_hal_i2cslave_i2c_slave_write_byte(i2cslave_i2c_slave_obj_t *self, uint8_t data); +extern void common_hal_i2cslave_i2c_slave_ack(i2cslave_i2c_slave_obj_t *self, bool ack); +extern void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_I2C_SLAVE_H diff --git a/shared-bindings/i2cslave/__init__.c b/shared-bindings/i2cslave/__init__.c new file mode 100644 index 0000000000000..1c692e54e7905 --- /dev/null +++ b/shared-bindings/i2cslave/__init__.c @@ -0,0 +1,117 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +//#include "shared-bindings/i2cslave/__init__.h" +#include "shared-bindings/i2cslave/I2CSlave.h" + +#include "py/runtime.h" + +//| :mod:`i2cslave` --- Two wire serial protocol slave +//| ================================================== +//| +//| .. module:: i2cslave +//| :synopsis: Two wire serial protocol slave +//| :platform: SAMD21, SAMD51 +//| +//| The `i2cslave` module contains classes to support a I2C slave. +//| +//| Classes +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| I2CSlave +//| +//| Example emulating 2 devices:: +//| +//| import board +//| from i2cslave import I2CSlave +//| +//| regs = [0] * 16 +//| index = 0 +//| +//| with I2CSlave(board.SCL, board.SDA, (0x40, 0x41)) as slave: +//| while True: +//| r = slave.request() +//| if not r: +//| # Maybe do some housekeeping +//| continue +//| with r: # Closes the transfer if necessary by sending a NACK or feeding the master dummy bytes +//| if r.address == 0x40: +//| if not r.is_read: # Master write which is Slave read +//| b = r.read(1) +//| if not b or b[0] > 15: +//| break +//| index = b[0] +//| b = r.read(1) +//| if b: +//| regs[index] = b[0] +//| elif r.is_restart: # Combined transfer: This is the Master read message +//| n = r.write(bytes([regs[index]])) +//| #else: +//| # A read transfer is not supported in this example +//| # If the Master tries, it will get 0xff byte(s) by the ctx manager (r.close()) +//| elif r.address == 0x41: +//| if not r.is_read: +//| b = r.read(1) +//| if b and b[0] == 0xde: +//| # do something +//| pass +//| +//| This example sets up an I2C slave that can be accessed from Linux like this:: +//| +//| $ i2cget -y 1 0x40 0x01 +//| 0x00 +//| $ i2cset -y 1 0x40 0x01 0xaa +//| $ i2cget -y 1 0x40 0x01 +//| 0xaa +//| +//| .. warning:: +//| I2CSlave makes use of clock stretching in order to slow down the master. +//| Make sure the I2C master supports this. +//| +//| Raspberry Pi in particular does not support this with its I2C hw block. +//| This can be worked around by using the ``i2c-gpio`` bit banging driver. +//| Since the RPi firmware uses the hw i2c, it's not possible to emulate a HAT eeprom. +//| + +STATIC const mp_rom_map_elem_t i2cslave_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_i2cslave) }, + { MP_ROM_QSTR(MP_QSTR_I2CSlave), MP_ROM_PTR(&i2cslave_i2c_slave_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(i2cslave_module_globals, i2cslave_module_globals_table); + +const mp_obj_module_t i2cslave_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&i2cslave_module_globals, +}; diff --git a/shared-bindings/index.rst b/shared-bindings/index.rst index a43270e15043d..cbffdb6140893 100644 --- a/shared-bindings/index.rst +++ b/shared-bindings/index.rst @@ -1,49 +1,11 @@ Core Modules ======================================== -These core modules are intended on being consistent across ports. Currently -they are only implemented in the SAMD21 and ESP8266 ports. A module may not exist -in a port if no underlying hardware support is present or if flash space is -limited. For example, a microcontroller without analog features will not have -`analogio`. - -.. _module-support-matrix: - -Support Matrix ---------------- -NOTE 1: **All Supported** means the following ports are supported: SAMD21, SAMD21 Express, -SAMD51, SAMD51 Express, and ESP8266. - -NOTE 2: **SAMD** and/or **SAMD Express** without additional numbers, means both SAMD21 & SAMD51 versions -are supported. - -================= ============================== -Module Supported Ports -================= ============================== -`analogio` **All Supported** -`audiobusio` **SAMD/SAMD Express** -`audioio` **SAMD Express** -`bitbangio` **SAMD Express, ESP8266** -`board` **All Supported** -`busio` **All Supported** -`digitalio` **All Supported** -`gamepad` **SAMD Express, nRF** -`math` **All Supported** -`microcontroller` **All Supported** -`multiterminal` **ESP8266** -`neopixel_write` **All Supported** -`nvm` **SAMD Express** -`os` **All Supported** -`pulseio` **SAMD/SAMD Express** -`random` **All Supported** -`storage` **All Supported** -`struct` **All Supported** -`supervisor` **SAMD/SAMD Express** -`time` **All Supported** -`touchio` **SAMD/SAMD Express** -`uheap` **Debug (All)** -`usb_hid` **SAMD/SAMD Express** -================= ============================== +These core modules are intended on being consistent across ports and boards. +A module may not exist on a port/board if no underlying hardware support is +present or if flash space is limited. For example, a microcontroller without +analog features will not have `analogio`. See the `support_matrix` page for +a list of modules supported on each board. Modules --------- @@ -52,5 +14,6 @@ Modules :glob: :maxdepth: 3 + support_matrix */__init__ help diff --git a/shared-bindings/math/__init__.c b/shared-bindings/math/__init__.c index 84827842f868b..0bf8047c989d7 100644 --- a/shared-bindings/math/__init__.c +++ b/shared-bindings/math/__init__.c @@ -27,7 +27,7 @@ #include "py/builtin.h" #include "py/runtime.h" -#include "py/runtime.h" +#include "supervisor/shared/translate.h" #if MICROPY_PY_BUILTINS_FLOAT @@ -50,7 +50,7 @@ //| STATIC NORETURN void math_error(void) { - mp_raise_ValueError("math domain error"); + mp_raise_ValueError(translate("math domain error")); } #define MATH_FUN_1(py_name, c_name) \ @@ -343,7 +343,7 @@ STATIC mp_obj_t mp_math_log(size_t n_args, const mp_obj_t *args) { #pragma GCC diagnostic ignored "-Wfloat-equal" } else if (base == (mp_float_t)1.0) { #pragma GCC diagnostic pop - mp_raise_msg(&mp_type_ZeroDivisionError, "division by zero"); + mp_raise_msg(&mp_type_ZeroDivisionError, translate("division by zero")); } return mp_obj_new_float(l / MICROPY_FLOAT_C_FUN(log)(base)); } diff --git a/shared-bindings/microcontroller/Pin.c b/shared-bindings/microcontroller/Pin.c index fd5285192ce24..67aecaf66e58b 100644 --- a/shared-bindings/microcontroller/Pin.c +++ b/shared-bindings/microcontroller/Pin.c @@ -30,6 +30,8 @@ #include "py/nlr.h" #include "py/obj.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: microcontroller //| @@ -38,48 +40,88 @@ //| //| Identifies an IO pin on the microcontroller. //| -//| .. class:: Pin +//| .. class:: Pin() //| //| Identifies an IO pin on the microcontroller. They are fixed by the //| hardware so they cannot be constructed on demand. Instead, use //| `board` or `microcontroller.pin` to reference the desired pin. //| -STATIC void mcu_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mcu_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - // If the pin is in board, print its version there. +static void get_pin_name(const mcu_pin_obj_t *self, qstr* package, qstr* module, qstr* name) { const mp_map_t* board_map = &board_module_globals.map; for (uint8_t i = 0; i < board_map->alloc; i++) { if (board_map->table[i].value == self) { - mp_printf(print, "%q.%q", MP_QSTR_board, - MP_OBJ_QSTR_VALUE(board_map->table[i].key)); + *package = 0; + *module = MP_QSTR_board; + *name = MP_OBJ_QSTR_VALUE(board_map->table[i].key); return; } } const mp_map_t* mcu_map = &mcu_pin_globals.map; for (uint8_t i = 0; i < mcu_map->alloc; i++) { if (mcu_map->table[i].value == self) { - mp_printf(print, "%q.%q.%q", MP_QSTR_microcontroller, MP_QSTR_pin, - MP_OBJ_QSTR_VALUE(mcu_map->table[i].key)); + *package = MP_QSTR_microcontroller; + *module = MP_QSTR_pin; + *name = MP_OBJ_QSTR_VALUE(mcu_map->table[i].key); return; } } } +STATIC void mcu_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + mcu_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); + qstr package; + qstr module; + qstr name; + + get_pin_name(self, &package, &module, &name); + mp_printf(print, "%q.%q.%q", MP_QSTR_microcontroller, MP_QSTR_pin, name); +} + const mp_obj_type_t mcu_pin_type = { { &mp_type_type }, .name = MP_QSTR_Pin, .print = mcu_pin_print }; -void assert_pin(mp_obj_t obj, bool none_ok) { - if ((obj != mp_const_none || !none_ok) && !MP_OBJ_IS_TYPE(obj, &mcu_pin_type)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "Expected a %q", mcu_pin_type.name)); +mcu_pin_obj_t *validate_obj_is_pin(mp_obj_t obj) { + if (!MP_OBJ_IS_TYPE(obj, &mcu_pin_type)) { + mp_raise_TypeError_varg(translate("Expected a %q"), mcu_pin_type.name); + } + return MP_OBJ_TO_PTR(obj); +} + +// Validate that the obj is a pin or None. Return an mcu_pin_obj_t* or NULL, correspondingly. +mcu_pin_obj_t *validate_obj_is_pin_or_none(mp_obj_t obj) { + if (obj == mp_const_none) { + return NULL; + } + return validate_obj_is_pin(obj); +} + +mcu_pin_obj_t *validate_obj_is_free_pin(mp_obj_t obj) { + mcu_pin_obj_t *pin = validate_obj_is_pin(obj); + assert_pin_free(pin); + return pin; +} + +// Validate that the obj is a free pin or None. Return an mcu_pin_obj_t* or NULL, correspondingly. +mcu_pin_obj_t *validate_obj_is_free_pin_or_none(mp_obj_t obj) { + if (obj == mp_const_none) { + return NULL; } + mcu_pin_obj_t *pin = validate_obj_is_pin(obj); + assert_pin_free(pin); + return pin; } void assert_pin_free(const mcu_pin_obj_t* pin) { if (pin != NULL && pin != MP_OBJ_TO_PTR(mp_const_none) && !common_hal_mcu_pin_is_free(pin)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin %q in use", pin->name)); + qstr package; + qstr module; + qstr name; + + get_pin_name(pin, &package, &module, &name); + mp_raise_ValueError_varg(translate("%q in use"), name); } } diff --git a/shared-bindings/microcontroller/Pin.h b/shared-bindings/microcontroller/Pin.h index ed831b2589678..4f29322a0644e 100644 --- a/shared-bindings/microcontroller/Pin.h +++ b/shared-bindings/microcontroller/Pin.h @@ -33,9 +33,15 @@ // Type object used in Python. Should be shared between ports. extern const mp_obj_type_t mcu_pin_type; -void assert_pin(mp_obj_t obj, bool none_ok); +mcu_pin_obj_t *validate_obj_is_pin(mp_obj_t obj); +mcu_pin_obj_t *validate_obj_is_pin_or_none(mp_obj_t obj); +mcu_pin_obj_t *validate_obj_is_free_pin(mp_obj_t obj); +mcu_pin_obj_t *validate_obj_is_free_pin_or_none(mp_obj_t obj); + void assert_pin_free(const mcu_pin_obj_t* pin); bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin); +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin); +void common_hal_reset_pin(const mcu_pin_obj_t* pin); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_MICROCONTROLLER_PIN_H diff --git a/shared-bindings/microcontroller/Processor.c b/shared-bindings/microcontroller/Processor.c index be685b0a82427..023f063e02ecd 100644 --- a/shared-bindings/microcontroller/Processor.c +++ b/shared-bindings/microcontroller/Processor.c @@ -113,10 +113,32 @@ const mp_obj_property_t mcu_processor_uid_obj = { }, }; +//| .. attribute:: voltage +//| +//| The input voltage to the microcontroller, as a float. (read-only) +//| +//| Is `None` if the voltage is not available. +//| +STATIC mp_obj_t mcu_processor_get_voltage(mp_obj_t self) { + float voltage = common_hal_mcu_processor_get_voltage(); + return isnan(voltage) ? mp_const_none : mp_obj_new_float(voltage); +} + +MP_DEFINE_CONST_FUN_OBJ_1(mcu_processor_get_voltage_obj, mcu_processor_get_voltage); + +const mp_obj_property_t mcu_processor_voltage_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&mcu_processor_get_voltage_obj, // getter + (mp_obj_t)&mp_const_none_obj, // no setter + (mp_obj_t)&mp_const_none_obj, // no deleter + }, +}; + STATIC const mp_rom_map_elem_t mcu_processor_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&mcu_processor_frequency_obj) }, { MP_ROM_QSTR(MP_QSTR_temperature), MP_ROM_PTR(&mcu_processor_temperature_obj) }, { MP_ROM_QSTR(MP_QSTR_uid), MP_ROM_PTR(&mcu_processor_uid_obj) }, + { MP_ROM_QSTR(MP_QSTR_voltage), MP_ROM_PTR(&mcu_processor_voltage_obj) }, }; STATIC MP_DEFINE_CONST_DICT(mcu_processor_locals_dict, mcu_processor_locals_dict_table); diff --git a/shared-bindings/microcontroller/Processor.h b/shared-bindings/microcontroller/Processor.h index 28f0544205c4c..1088112f43c58 100644 --- a/shared-bindings/microcontroller/Processor.h +++ b/shared-bindings/microcontroller/Processor.h @@ -36,5 +36,6 @@ const mp_obj_type_t mcu_processor_type; uint32_t common_hal_mcu_processor_get_frequency(void); float common_hal_mcu_processor_get_temperature(void); void common_hal_mcu_processor_get_uid(uint8_t raw_id[]); +float common_hal_mcu_processor_get_voltage(void); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_MICROCONTROLLER_PROCESSOR_H diff --git a/shared-bindings/microcontroller/RunMode.c b/shared-bindings/microcontroller/RunMode.c index b27a3c090945a..913242ad26746 100644 --- a/shared-bindings/microcontroller/RunMode.c +++ b/shared-bindings/microcontroller/RunMode.c @@ -31,24 +31,30 @@ //| :class:`RunMode` -- run state of the microcontroller //| ============================================================= //| -//| .. class:: microcontroller.RunMode +//| .. class:: RunMode() //| //| Enum-like class to define the run mode of the microcontroller and //| CircuitPython. //| -//| .. data:: NORMAL +//| .. attribute:: NORMAL //| //| Run CircuitPython as normal. //| -//| .. data:: SAFE_MODE +//| :type microcontroller.RunMode: +//| +//| .. attribute:: SAFE_MODE //| //| Run CircuitPython in safe mode. User code will not be run and the //| file system will be writeable over USB. //| -//| .. data:: BOOTLOADER +//| :type microcontroller.RunMode: +//| +//| .. attribute:: BOOTLOADER //| //| Run the bootloader. //| +//| :type microcontroller.RunMode: +//| const mp_obj_type_t mcu_runmode_type; const mcu_runmode_obj_t mcu_runmode_normal_obj = { @@ -76,7 +82,7 @@ STATIC void mcu_runmode_print(const mp_print_t *print, mp_obj_t self_in, mp_prin runmode = MP_QSTR_SAFE_MODE; } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&mcu_runmode_bootloader_obj)) { - runmode = MP_QSTR_SAFE_MODE; + runmode = MP_QSTR_BOOTLOADER; } mp_printf(print, "%q.%q.%q", MP_QSTR_microcontroller, MP_QSTR_RunMode, runmode); diff --git a/shared-bindings/microcontroller/__init__.c b/shared-bindings/microcontroller/__init__.c index 0c627cdf9ec76..090c4564dac77 100644 --- a/shared-bindings/microcontroller/__init__.c +++ b/shared-bindings/microcontroller/__init__.c @@ -39,8 +39,8 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Processor.h" - #include "py/runtime.h" +#include "supervisor/shared/translate.h" //| :mod:`microcontroller` --- Pin references and cpu functionality //| ================================================================ @@ -62,14 +62,14 @@ //| RunMode //| -//| .. attribute:: cpu +//| .. data:: cpu //| //| CPU information and control, such as ``cpu.temperature`` and ``cpu.frequency`` //| (clock frequency). //| This object is the sole instance of `microcontroller.Processor`. //| -//| .. method:: delay_us(delay) +//| .. function:: delay_us(delay) //| //| Dedicated delay method used for very short delays. **Do not** do long delays //| because this stops all other functions from completing. Think of this as an empty @@ -87,7 +87,7 @@ STATIC mp_obj_t mcu_delay_us(mp_obj_t delay_obj) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(mcu_delay_us_obj, mcu_delay_us); -//| .. method:: disable_interrupts() +//| .. function:: disable_interrupts() //| //| Disable all interrupts. Be very careful, this can stall everything. //| @@ -97,7 +97,7 @@ STATIC mp_obj_t mcu_disable_interrupts(void) { } STATIC MP_DEFINE_CONST_FUN_OBJ_0(mcu_disable_interrupts_obj, mcu_disable_interrupts); -//| .. method:: enable_interrupts() +//| .. function:: enable_interrupts() //| //| Enable the interrupts that were enabled at the last disable. //| @@ -107,7 +107,7 @@ STATIC mp_obj_t mcu_enable_interrupts(void) { } STATIC MP_DEFINE_CONST_FUN_OBJ_0(mcu_enable_interrupts_obj, mcu_enable_interrupts); -//| .. method:: on_next_reset(run_mode) +//| .. function:: on_next_reset(run_mode) //| //| Configure the run mode used the next time the microcontroller is reset but //| not powered down. @@ -123,7 +123,7 @@ STATIC mp_obj_t mcu_on_next_reset(mp_obj_t run_mode_obj) { } else if (run_mode_obj == &mcu_runmode_bootloader_obj) { run_mode = RUNMODE_BOOTLOADER; } else { - mp_raise_ValueError("Invalid run mode."); + mp_raise_ValueError(translate("Invalid run mode.")); } common_hal_mcu_on_next_reset(run_mode); @@ -132,7 +132,7 @@ STATIC mp_obj_t mcu_on_next_reset(mp_obj_t run_mode_obj) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(mcu_on_next_reset_obj, mcu_on_next_reset); -//| .. method:: reset() +//| .. function:: reset() //| //| Reset the microcontroller. After reset, the microcontroller will enter the //| run mode last set by `on_next_reset`. @@ -148,11 +148,13 @@ STATIC mp_obj_t mcu_reset(void) { } STATIC MP_DEFINE_CONST_FUN_OBJ_0(mcu_reset_obj, mcu_reset); -//| .. attribute:: nvm +//| .. data:: nvm //| //| Available non-volatile memory. //| This object is the sole instance of `nvm.ByteArray` when available or ``None`` otherwise. //| +//| :type: nvm.ByteArray or None +//| //| :mod:`microcontroller.pin` --- Microcontroller pin names //| -------------------------------------------------------- diff --git a/shared-bindings/multiterminal/__init__.c b/shared-bindings/multiterminal/__init__.c index 32dcdd75d64fa..8de3c50d7b334 100644 --- a/shared-bindings/multiterminal/__init__.c +++ b/shared-bindings/multiterminal/__init__.c @@ -23,12 +23,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include "shared-bindings/multiterminal/__init__.h" #include "py/obj.h" #include "py/mphal.h" #include "py/runtime.h" - -#include "shared-bindings/multiterminal/__init__.h" +#include "supervisor/shared/translate.h" //| :mod:`multiterminal` --- Manage additional terminal sources //| =========================================================== @@ -65,7 +65,7 @@ STATIC mp_obj_t multiterminal_obj_set_secondary_terminal(mp_obj_t secondary_term mp_obj_t readinto_m[3]; mp_load_method_maybe(secondary_terminal, MP_QSTR_readinto, readinto_m); if (write_m[0] == MP_OBJ_NULL || readinto_m[0] == MP_OBJ_NULL) { - mp_raise_ValueError("Stream missing readinto() or write() method."); + mp_raise_ValueError(translate("Stream missing readinto() or write() method.")); return mp_const_none; } common_hal_multiterminal_set_secondary_terminal(secondary_terminal); diff --git a/shared-bindings/multiterminal/__init__.h b/shared-bindings/multiterminal/__init__.h index 91099a5dfe231..7c28842630686 100644 --- a/shared-bindings/multiterminal/__init__.h +++ b/shared-bindings/multiterminal/__init__.h @@ -27,6 +27,8 @@ #ifndef SHARED_BINDINGS_MULTITERMINAL___INIT___H #define SHARED_BINDINGS_MULTITERMINAL___INIT___H +#include "py/obj.h" + void common_hal_multiterminal_schedule_secondary_terminal_read(mp_obj_t socket); mp_obj_t common_hal_multiterminal_get_secondary_terminal(); void common_hal_multiterminal_set_secondary_terminal(mp_obj_t secondary_terminal); diff --git a/shared-bindings/neopixel_write/__init__.c b/shared-bindings/neopixel_write/__init__.c index d6b578a4a89ee..1ee66337bb024 100644 --- a/shared-bindings/neopixel_write/__init__.c +++ b/shared-bindings/neopixel_write/__init__.c @@ -23,13 +23,13 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include "shared-bindings/neopixel_write/__init__.h" #include "py/obj.h" #include "py/mphal.h" #include "py/runtime.h" - #include "shared-bindings/digitalio/DigitalInOut.h" -#include "shared-bindings/neopixel_write/__init__.h" +#include "supervisor/shared/translate.h" //| :mod:`neopixel_write` --- Low-level neopixel implementation //| =========================================================== @@ -55,16 +55,16 @@ //| pixel_off = bytearray([0, 0, 0]) //| neopixel_write.neopixel_write(pin, pixel_off) //| -//| .. method:: neopixel_write.neopixel_write(digitalinout, buf) +//| .. function:: neopixel_write(digitalinout, buf) //| //| Write buf out on the given DigitalInOut. //| -//| :param ~digitalio.DigitalInOut gpio: the DigitalInOut to output with +//| :param ~digitalio.DigitalInOut digitalinout: the DigitalInOut to output with //| :param bytearray buf: The bytes to clock out. No assumption is made about color order //| STATIC mp_obj_t neopixel_write_neopixel_write_(mp_obj_t digitalinout_obj, mp_obj_t buf) { if (!MP_OBJ_IS_TYPE(digitalinout_obj, &digitalio_digitalinout_type)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "Expected a %q", digitalio_digitalinout_type.name)); + mp_raise_TypeError_varg(translate("Expected a %q"), digitalio_digitalinout_type.name); } // Convert parameters into expected types. const digitalio_digitalinout_obj_t *digitalinout = MP_OBJ_TO_PTR(digitalinout_obj); diff --git a/shared-bindings/network/__init__.c b/shared-bindings/network/__init__.c new file mode 100644 index 0000000000000..01763a73c5f25 --- /dev/null +++ b/shared-bindings/network/__init__.c @@ -0,0 +1,74 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/objlist.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "py/mperrno.h" +#include "lib/netutils/netutils.h" + +#include "shared-bindings/network/__init__.h" + +#if CIRCUITPY_NETWORK + +//| :mod:`network` --- Network Interface Management +//| =============================================== +//| +//| .. module:: network +//| :synopsis: Network Interface Management +//| :platform: SAMD +//| +//| This module provides a registry of configured NICs. +//| It is used by the 'socket' module to look up a suitable +//| NIC when a socket is created. +//| +//| .. function:: route() +//| +//| Returns a list of all configured NICs. +//| + +STATIC mp_obj_t network_route(void) { + return MP_OBJ_FROM_PTR(&MP_STATE_PORT(mod_network_nic_list)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_0(network_route_obj, network_route); + +STATIC const mp_rom_map_elem_t mp_module_network_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_network) }, + { MP_ROM_QSTR(MP_QSTR_route), MP_ROM_PTR(&network_route_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(mp_module_network_globals, mp_module_network_globals_table); + +const mp_obj_module_t network_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&mp_module_network_globals, +}; + +#endif // CIRCUITPY_NETWORK diff --git a/shared-bindings/network/__init__.h b/shared-bindings/network/__init__.h new file mode 100644 index 0000000000000..4fe5e75a37ba5 --- /dev/null +++ b/shared-bindings/network/__init__.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_NETWORK___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_NETWORK___INIT___H + +// nothing + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_NETWORK___INIT___H diff --git a/shared-bindings/nvm/ByteArray.c b/shared-bindings/nvm/ByteArray.c index f4e0463781f2d..31bedeacc0c85 100644 --- a/shared-bindings/nvm/ByteArray.c +++ b/shared-bindings/nvm/ByteArray.c @@ -29,6 +29,7 @@ #include "py/runtime.h" #include "py/runtime0.h" #include "shared-bindings/nvm/ByteArray.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: nvm //| @@ -36,12 +37,13 @@ //| ================================================================================ //| //| Non-volatile memory is available as a byte array that persists over reloads -//| and power cycles. +//| and power cycles. Each assignment causes an erase and write cycle so its recommended to assign +//| all values to change at once. //| //| Usage:: //| //| import microcontroller -//| microcontroller.nvm[0] = 0xcc +//| microcontroller.nvm[0:3] = b"\xcc\x10\x00" //| //| .. class:: ByteArray() @@ -80,7 +82,7 @@ STATIC mp_obj_t nvm_bytearray_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj } else if (MP_OBJ_IS_TYPE(index_in, &mp_type_slice)) { mp_bound_slice_t slice; if (!mp_seq_get_fast_slice_indexes(common_hal_nvm_bytearray_get_length(self), index_in, &slice)) { - mp_raise_NotImplementedError("only slices with step=1 (aka None) are supported"); + mp_raise_NotImplementedError(translate("only slices with step=1 (aka None) are supported")); } if (value != MP_OBJ_SENTINEL) { #if MICROPY_PY_ARRAY_SLICE_ASSIGN @@ -94,19 +96,19 @@ STATIC mp_obj_t nvm_bytearray_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj mp_buffer_info_t bufinfo; mp_get_buffer_raise(value, &bufinfo, MP_BUFFER_READ); if (bufinfo.len != src_len) { - mp_raise_ValueError("Slice and value different lengths."); + mp_raise_ValueError(translate("Slice and value different lengths.")); } src_len = bufinfo.len; src_items = bufinfo.buf; if (1 != mp_binary_get_size('@', bufinfo.typecode, NULL)) { - mp_raise_ValueError("Array values should be single bytes."); + mp_raise_ValueError(translate("Array values should be single bytes.")); } } else { - mp_raise_NotImplementedError("array/bytes required on right side"); + mp_raise_NotImplementedError(translate("array/bytes required on right side")); } if (!common_hal_nvm_bytearray_set_bytes(self, slice.start, src_items, src_len)) { - mp_raise_RuntimeError("Unable to write to nvm."); + mp_raise_RuntimeError(translate("Unable to write to nvm.")); } return mp_const_none; #else @@ -122,7 +124,8 @@ STATIC mp_obj_t nvm_bytearray_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj #endif } else { // Single index rather than slice. - size_t index = mp_get_index(self->base.type, self->len, index_in, false); + size_t index = mp_get_index(self->base.type, common_hal_nvm_bytearray_get_length(self), + index_in, false); if (value == MP_OBJ_SENTINEL) { // load uint8_t value_out; @@ -132,11 +135,11 @@ STATIC mp_obj_t nvm_bytearray_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj // store mp_int_t byte_value = mp_obj_get_int(value); if (byte_value > 0xff || byte_value < 0) { - mp_raise_ValueError("Bytes must be between 0 and 255."); + mp_raise_ValueError(translate("Bytes must be between 0 and 255.")); } uint8_t short_value = byte_value; if (!common_hal_nvm_bytearray_set_bytes(self, index, &short_value, 1)) { - mp_raise_RuntimeError("Unable to write to nvm."); + mp_raise_RuntimeError(translate("Unable to write to nvm.")); } return mp_const_none; } diff --git a/shared-bindings/nvm/__init__.c b/shared-bindings/nvm/__init__.c index ef5c7ccb3e63c..811855c093359 100644 --- a/shared-bindings/nvm/__init__.c +++ b/shared-bindings/nvm/__init__.c @@ -55,8 +55,7 @@ STATIC const mp_rom_map_elem_t nvm_module_globals_table[] = { STATIC MP_DEFINE_CONST_DICT(nvm_module_globals, nvm_module_globals_table); -// cpy prefix is used to prevent collision with nvm_module global in ASF. -const mp_obj_module_t cpy_nvm_module = { +const mp_obj_module_t nvm_module = { .base = { &mp_type_module }, .globals = (mp_obj_dict_t*)&nvm_module_globals, }; diff --git a/shared-bindings/os/__init__.c b/shared-bindings/os/__init__.c index 159f5448a0f08..f3b745aefe526 100644 --- a/shared-bindings/os/__init__.c +++ b/shared-bindings/os/__init__.c @@ -33,6 +33,7 @@ #include "lib/oofatfs/diskio.h" #include "py/mpstate.h" #include "py/obj.h" +#include "py/objstr.h" #include "py/runtime.h" #include "shared-bindings/os/__init__.h" @@ -87,7 +88,7 @@ mp_obj_t os_listdir(size_t n_args, const mp_obj_t *args) { if (n_args == 1) { path = mp_obj_str_get_str(args[0]); } else { - path = ""; + path = mp_obj_str_get_str(common_hal_os_getcwd()); } return common_hal_os_listdir(path); } @@ -142,6 +143,11 @@ MP_DEFINE_CONST_FUN_OBJ_1(os_rmdir_obj, os_rmdir); //| //| Get the status of a file or directory. //| +//| .. note:: On builds without long integers, the number of seconds +//| for contemporary dates will not fit in a small integer. +//| So the time fields return 946684800, +//| which is the number of seconds corresponding to 1999-12-31. +//| mp_obj_t os_stat(mp_obj_t path_in) { const char *path = mp_obj_str_get_str(path_in); return common_hal_os_stat(path); @@ -195,11 +201,11 @@ MP_DEFINE_CONST_FUN_OBJ_0(os_sync_obj, os_sync); //| STATIC mp_obj_t os_urandom(mp_obj_t size_in) { mp_int_t size = mp_obj_get_int(size_in); - uint8_t tmp[size]; - if (!common_hal_os_urandom(tmp, size)) { - mp_raise_NotImplementedError(""); + mp_obj_str_t *result = MP_OBJ_TO_PTR(mp_obj_new_bytes_of_zeros(size)); + if (!common_hal_os_urandom((uint8_t*) result->data, size)) { + mp_raise_NotImplementedError(translate("No hardware random available")); } - return mp_obj_new_bytes(tmp, size); + return result; } MP_DEFINE_CONST_FUN_OBJ_1(os_urandom_obj, os_urandom); diff --git a/shared-bindings/ps2io/Ps2.c b/shared-bindings/ps2io/Ps2.c new file mode 100644 index 0000000000000..89ed0a76ce9bc --- /dev/null +++ b/shared-bindings/ps2io/Ps2.c @@ -0,0 +1,240 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/runtime0.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/ps2io/Ps2.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" + +//| .. currentmodule:: ps2io +//| +//| :class:`Ps2` -- Communicate with a PS/2 keyboard or mouse +//| ========================================================= +//| +//| Ps2 implements the PS/2 keyboard/mouse serial protocol, used in +//| legacy devices. It is similar to UART but there are only two +//| lines (Data and Clock). PS/2 devices are 5V, so bidirectional +//| level converters must be used to connect the I/O lines to pins +//| of 3.3V boards. +//| +//| .. class:: Ps2(data_pin, clock_pin) +//| +//| Create a Ps2 object associated with the given pins. +//| +//| :param ~microcontroller.Pin data_pin: Pin tied to data wire. +//| :param ~microcontroller.Pin clock_pin: Pin tied to clock wire. +//| This pin must support interrupts. +//| +//| Read one byte from PS/2 keyboard and turn on Scroll Lock LED:: +//| +//| import ps2io +//| import board +//| +//| kbd = ps2io.Ps2(board.D10, board.D11) +//| +//| while len(kbd) == 0: +//| pass +//| +//| print(kbd.popleft()) +//| print(kbd.sendcmd(0xed)) +//| print(kbd.sendcmd(0x01)) +//| +STATIC mp_obj_t ps2io_ps2_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_datapin, ARG_clkpin }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_datapin, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_clkpin, MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* clkpin = validate_obj_is_free_pin(args[ARG_clkpin].u_obj); + const mcu_pin_obj_t* datapin = validate_obj_is_free_pin(args[ARG_datapin].u_obj); + + ps2io_ps2_obj_t *self = m_new_obj(ps2io_ps2_obj_t); + self->base.type = &ps2io_ps2_type; + + common_hal_ps2io_ps2_construct(self, datapin, clkpin); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitialises the Ps2 and releases any hardware resources for reuse. +//| +STATIC mp_obj_t ps2io_ps2_deinit(mp_obj_t self_in) { + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_ps2io_ps2_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(ps2io_ps2_deinit_obj, ps2io_ps2_deinit); + +STATIC void check_for_deinit(ps2io_ps2_obj_t *self) { + if (common_hal_ps2io_ps2_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t ps2io_ps2_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_ps2io_ps2_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(ps2io_ps2___exit___obj, 4, 4, ps2io_ps2_obj___exit__); + +//| .. method:: popleft() +//| +//| Removes and returns the oldest received byte. When buffer +//| is empty, raises an IndexError exception. +//| +STATIC mp_obj_t ps2io_ps2_obj_popleft(mp_obj_t self_in) { + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + int b = common_hal_ps2io_ps2_popleft(self); + if (b < 0) { + mp_raise_IndexError(translate("Pop from an empty Ps2 buffer")); + } + return MP_OBJ_NEW_SMALL_INT(b); +} +MP_DEFINE_CONST_FUN_OBJ_1(ps2io_ps2_popleft_obj, ps2io_ps2_obj_popleft); + +//| .. method:: sendcmd(byte) +//| +//| Sends a command byte to PS/2. Returns the response byte, typically +//| the general ack value (0xFA). Some commands return additional data +//| which is available through :py:func:`popleft()`. +//| +//| Raises a RuntimeError in case of failure. The root cause can be found +//| by calling :py:func:`clear_errors()`. It is advisable to call +//| :py:func:`clear_errors()` before :py:func:`sendcmd()` to flush any +//| previous errors. +//| +//| :param int byte: byte value of the command +//| +STATIC mp_obj_t ps2io_ps2_obj_sendcmd(mp_obj_t self_in, mp_obj_t ob) { + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + mp_int_t cmd = mp_obj_get_int(ob) & 0xff; + int resp = common_hal_ps2io_ps2_sendcmd(self, cmd); + if (resp < 0) { + mp_raise_RuntimeError(translate("Failed sending command.")); + } + return MP_OBJ_NEW_SMALL_INT(resp); +} +MP_DEFINE_CONST_FUN_OBJ_2(ps2io_ps2_sendcmd_obj, ps2io_ps2_obj_sendcmd); + +//| .. method:: clear_errors() +//| +//| Returns and clears a bitmap with latest recorded communication errors. +//| +//| Reception errors (arise asynchronously, as data is received): +//| +//| 0x01: start bit not 0 +//| +//| 0x02: timeout +//| +//| 0x04: parity bit error +//| +//| 0x08: stop bit not 1 +//| +//| 0x10: buffer overflow, newest data discarded +//| +//| Transmission errors (can only arise in the course of sendcmd()): +//| +//| 0x100: clock pin didn't go to LO in time +//| +//| 0x200: clock pin didn't go to HI in time +//| +//| 0x400: data pin didn't ACK +//| +//| 0x800: clock pin didn't ACK +//| +//| 0x1000: device didn't respond to RTS +//| +//| 0x2000: device didn't send a response byte in time +//| +STATIC mp_obj_t ps2io_ps2_obj_clear_errors(mp_obj_t self_in) { + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + return MP_OBJ_NEW_SMALL_INT(common_hal_ps2io_ps2_clear_errors(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(ps2io_ps2_clear_errors_obj, ps2io_ps2_obj_clear_errors); + +//| .. method:: __len__() +//| +//| Returns the number of received bytes in buffer, available +//| to :py:func:`popleft()`. +//| +STATIC mp_obj_t ps2_unary_op(mp_unary_op_t op, mp_obj_t self_in) { + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + uint16_t len = common_hal_ps2io_ps2_get_len(self); + switch (op) { + case MP_UNARY_OP_BOOL: return mp_obj_new_bool(len != 0); + case MP_UNARY_OP_LEN: return MP_OBJ_NEW_SMALL_INT(len); + default: return MP_OBJ_NULL; // op not supported + } +} + +STATIC const mp_rom_map_elem_t ps2io_ps2_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&ps2io_ps2_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&ps2io_ps2___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_popleft), MP_ROM_PTR(&ps2io_ps2_popleft_obj) }, + { MP_ROM_QSTR(MP_QSTR_sendcmd), MP_ROM_PTR(&ps2io_ps2_sendcmd_obj) }, + { MP_ROM_QSTR(MP_QSTR_clear_errors), MP_ROM_PTR(&ps2io_ps2_clear_errors_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(ps2io_ps2_locals_dict, ps2io_ps2_locals_dict_table); + +const mp_obj_type_t ps2io_ps2_type = { + { &mp_type_type }, + .name = MP_QSTR_Ps2, + .make_new = ps2io_ps2_make_new, + .unary_op = ps2_unary_op, + .locals_dict = (mp_obj_dict_t*)&ps2io_ps2_locals_dict, +}; diff --git a/shared-bindings/ps2io/Ps2.h b/shared-bindings/ps2io/Ps2.h new file mode 100644 index 0000000000000..523869d55bf4b --- /dev/null +++ b/shared-bindings/ps2io/Ps2.h @@ -0,0 +1,45 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO_PS2_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO_PS2_H + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/ps2io/Ps2.h" + +extern const mp_obj_type_t ps2io_ps2_type; + +extern void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, + const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin); +extern void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self); +extern bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self); +extern uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self); +extern int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self); +extern int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b); +extern uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO_PS2_H diff --git a/shared-bindings/ps2io/__init__.c b/shared-bindings/ps2io/__init__.c new file mode 100644 index 0000000000000..ec7c43e51fb65 --- /dev/null +++ b/shared-bindings/ps2io/__init__.c @@ -0,0 +1,73 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/ps2io/Ps2.h" + +//| :mod:`ps2io` --- Support for PS/2 protocol +//| ===================================================== +//| +//| .. module:: ps2io +//| :synopsis: Support for PS/2 based devices +//| :platform: SAMD21 +//| +//| The `ps2io` module contains classes to provide PS/2 communication. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Ps2 +//| + +//| .. warning:: This module is not available in some SAMD21 builds. See the +//| :ref:`module-support-matrix` for more info. +//| + +//| All classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| + +STATIC const mp_rom_map_elem_t ps2io_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_ps2io) }, + { MP_ROM_QSTR(MP_QSTR_Ps2), MP_ROM_PTR(&ps2io_ps2_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(ps2io_module_globals, ps2io_module_globals_table); + +const mp_obj_module_t ps2io_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&ps2io_module_globals, +}; diff --git a/shared-bindings/ps2io/__init__.h b/shared-bindings/ps2io/__init__.h new file mode 100644 index 0000000000000..1ff3d97b5cca9 --- /dev/null +++ b/shared-bindings/ps2io/__init__.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Elvis Pfutzenreuter + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_PS2IO___INIT___H diff --git a/shared-bindings/pulseio/PWMOut.c b/shared-bindings/pulseio/PWMOut.c index 8f6c76680867c..2491a5c3f1697 100644 --- a/shared-bindings/pulseio/PWMOut.c +++ b/shared-bindings/pulseio/PWMOut.c @@ -33,6 +33,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/pulseio/PWMOut.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: pulseio //| @@ -41,7 +42,7 @@ //| //| PWMOut can be used to output a PWM signal on a given pin. //| -//| .. class:: PWMOut(pin, \*, duty_cycle=0, frequency=500, variable_frequency=False) +//| .. class:: PWMOut(pin, *, duty_cycle=0, frequency=500, variable_frequency=False) //| //| Create a PWM object associated with the given pin. This allows you to //| write PWM signals out on the given pin. Frequency is fixed after init @@ -84,32 +85,36 @@ //| pwm.frequency = 880 //| time.sleep(0.1) //| -STATIC mp_obj_t pulseio_pwmout_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - mp_obj_t pin_obj = args[0]; - assert_pin(pin_obj, false); - const mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj); - assert_pin_free(pin); - - // create PWM object from the given pin - pulseio_pwmout_obj_t *self = m_new_obj(pulseio_pwmout_obj_t); - self->base.type = &pulseio_pwmout_type; - - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); - enum { ARG_duty_cycle, ARG_frequency, ARG_variable_frequency }; +STATIC mp_obj_t pulseio_pwmout_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + enum { ARG_pin, ARG_duty_cycle, ARG_frequency, ARG_variable_frequency }; static const mp_arg_t allowed_args[] = { + { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ, }, { MP_QSTR_duty_cycle, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, { MP_QSTR_frequency, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 500} }, { MP_QSTR_variable_frequency, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, }; mp_arg_val_t parsed_args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args - 1, args + 1, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, parsed_args); + mp_arg_parse_all(n_args, args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, parsed_args); + + const mcu_pin_obj_t *pin = validate_obj_is_free_pin(parsed_args[ARG_pin].u_obj); + uint16_t duty_cycle = parsed_args[ARG_duty_cycle].u_int; uint32_t frequency = parsed_args[ARG_frequency].u_int; - bool variable_frequency = parsed_args[ARG_variable_frequency].u_int; + bool variable_frequency = parsed_args[ARG_variable_frequency].u_bool; - common_hal_pulseio_pwmout_construct(self, pin, duty_cycle, frequency, variable_frequency); + // create PWM object from the given pin + pulseio_pwmout_obj_t *self = m_new_obj(pulseio_pwmout_obj_t); + self->base.type = &pulseio_pwmout_type; + pwmout_result_t result = common_hal_pulseio_pwmout_construct(self, pin, duty_cycle, frequency, variable_frequency); + if (result == PWMOUT_INVALID_PIN) { + mp_raise_ValueError(translate("Invalid pin")); + } else if (result == PWMOUT_INVALID_FREQUENCY) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } else if (result == PWMOUT_ALL_TIMERS_ON_PIN_IN_USE) { + mp_raise_ValueError(translate("All timers for this pin are in use")); + } else if (result == PWMOUT_ALL_TIMERS_IN_USE) { + mp_raise_RuntimeError(translate("All timers in use")); + } return MP_OBJ_FROM_PTR(self); } @@ -125,6 +130,12 @@ STATIC mp_obj_t pulseio_pwmout_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pwmout_deinit_obj, pulseio_pwmout_deinit); +STATIC void check_for_deinit(pulseio_pwmout_obj_t *self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -148,19 +159,24 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pulseio_pwmout___exit___obj, 4, 4, pu //| 16 bit value that dictates how much of one cycle is high (1) versus low //| (0). 0xffff will always be high, 0 will always be low and 0x7fff will //| be half high and then half low. +//| +//| Depending on how PWM is implemented on a specific board, the internal +//| representation for duty cycle might have less than 16 bits of resolution. +//| Reading this property will return the value from the internal representation, +//| so it may differ from the value set. STATIC mp_obj_t pulseio_pwmout_obj_get_duty_cycle(mp_obj_t self_in) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pwmout_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_pulseio_pwmout_get_duty_cycle(self)); } MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pwmout_get_duty_cycle_obj, pulseio_pwmout_obj_get_duty_cycle); STATIC mp_obj_t pulseio_pwmout_obj_set_duty_cycle(mp_obj_t self_in, mp_obj_t duty_cycle) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pwmout_deinited(self)); + check_for_deinit(self); mp_int_t duty = mp_obj_get_int(duty_cycle); if (duty < 0 || duty > 0xffff) { - mp_raise_ValueError("PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)"); + mp_raise_ValueError(translate("PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)")); } common_hal_pulseio_pwmout_set_duty_cycle(self, duty); return mp_const_none; @@ -179,20 +195,26 @@ const mp_obj_property_t pulseio_pwmout_duty_cycle_obj = { //| 32 bit value that dictates the PWM frequency in Hertz (cycles per //| second). Only writeable when constructed with ``variable_frequency=True``. //| +//| Depending on how PWM is implemented on a specific board, the internal value +//| for the PWM's duty cycle may need to be recalculated when the frequency +//| changes. In these cases, the duty cycle is automatically recalculated +//| from the original duty cycle value. This should happen without any need +//| to manually re-set the duty cycle. +//| STATIC mp_obj_t pulseio_pwmout_obj_get_frequency(mp_obj_t self_in) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pwmout_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_pulseio_pwmout_get_frequency(self)); } MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pwmout_get_frequency_obj, pulseio_pwmout_obj_get_frequency); STATIC mp_obj_t pulseio_pwmout_obj_set_frequency(mp_obj_t self_in, mp_obj_t frequency) { pulseio_pwmout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pwmout_deinited(self)); + check_for_deinit(self); if (!common_hal_pulseio_pwmout_get_variable_frequency(self)) { - mp_raise_AttributeError( - "PWM frequency not writeable when variable_frequency is False on " - "construction."); + mp_raise_AttributeError(translate( + "PWM frequency not writable when variable_frequency is False on " + "construction.")); } common_hal_pulseio_pwmout_set_frequency(self, mp_obj_get_int(frequency)); return mp_const_none; diff --git a/shared-bindings/pulseio/PWMOut.h b/shared-bindings/pulseio/PWMOut.h index 0b630816b985f..c01e0c9261b36 100644 --- a/shared-bindings/pulseio/PWMOut.h +++ b/shared-bindings/pulseio/PWMOut.h @@ -32,7 +32,15 @@ extern const mp_obj_type_t pulseio_pwmout_type; -extern void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, +typedef enum { + PWMOUT_OK, + PWMOUT_INVALID_PIN, + PWMOUT_INVALID_FREQUENCY, + PWMOUT_ALL_TIMERS_ON_PIN_IN_USE, + PWMOUT_ALL_TIMERS_IN_USE +} pwmout_result_t; + +extern pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, const mcu_pin_obj_t* pin, uint16_t duty, uint32_t frequency, bool variable_frequency); extern void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self); @@ -43,4 +51,8 @@ extern void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, extern uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self); extern bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self); +// This is used by the supervisor to claim PWMOut devices indefinitely. +extern void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self); +extern void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_PULSEIO_PWMOUT_H diff --git a/shared-bindings/pulseio/PulseIn.c b/shared-bindings/pulseio/PulseIn.c index 736441c741b01..6c01a4c178bee 100644 --- a/shared-bindings/pulseio/PulseIn.c +++ b/shared-bindings/pulseio/PulseIn.c @@ -33,6 +33,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/pulseio/PulseIn.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: pulseio //| @@ -44,7 +45,7 @@ //| The pulsed signal consists of timed active and idle periods. Unlike PWM, //| there is no set duration for active and idle pairs. //| -//| .. class:: PulseIn(pin, maxlen=2, \*, idle_state=False) +//| .. class:: PulseIn(pin, maxlen=2, *, idle_state=False) //| //| Create a PulseIn object associated with the given pin. The object acts as //| a read-only sequence of pulse lengths with a given max length. When it is @@ -80,10 +81,7 @@ //| # Resume with an 80 microsecond active pulse //| pulses.resume(80) //| -STATIC mp_obj_t pulseio_pulsein_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - mp_map_t kw_args; - mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args); +STATIC mp_obj_t pulseio_pulsein_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_pin, ARG_maxlen, ARG_idle_state }; static const mp_arg_t allowed_args[] = { { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -91,10 +89,8 @@ STATIC mp_obj_t pulseio_pulsein_make_new(const mp_obj_type_t *type, size_t n_arg { MP_QSTR_idle_state, MP_ARG_BOOL, {.u_bool = false} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - assert_pin(args[ARG_pin].u_obj, false); - const mcu_pin_obj_t* pin = MP_OBJ_TO_PTR(args[ARG_pin].u_obj); - assert_pin_free(pin); + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + const mcu_pin_obj_t* pin = validate_obj_is_free_pin(args[ARG_pin].u_obj); pulseio_pulsein_obj_t *self = m_new_obj(pulseio_pulsein_obj_t); self->base.type = &pulseio_pulsein_type; @@ -116,6 +112,12 @@ STATIC mp_obj_t pulseio_pulsein_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pulsein_deinit_obj, pulseio_pulsein_deinit); +STATIC void check_for_deinit(pulseio_pulsein_obj_t *self) { + if (common_hal_pulseio_pulsein_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -140,7 +142,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pulseio_pulsein___exit___obj, 4, 4, p //| STATIC mp_obj_t pulseio_pulsein_obj_pause(mp_obj_t self_in) { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); common_hal_pulseio_pulsein_pause(self); return mp_const_none; @@ -164,7 +166,7 @@ STATIC mp_obj_t pulseio_pulsein_obj_resume(size_t n_args, const mp_obj_t *pos_ar { MP_QSTR_trigger_duration, MP_ARG_INT, {.u_int = 0} }, }; pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -180,7 +182,7 @@ MP_DEFINE_CONST_FUN_OBJ_KW(pulseio_pulsein_resume_obj, 1, pulseio_pulsein_obj_re //| STATIC mp_obj_t pulseio_pulsein_obj_clear(mp_obj_t self_in) { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); common_hal_pulseio_pulsein_clear(self); return mp_const_none; @@ -193,7 +195,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pulsein_clear_obj, pulseio_pulsein_obj_clear); //| STATIC mp_obj_t pulseio_pulsein_obj_popleft(mp_obj_t self_in) { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_pulseio_pulsein_popleft(self)); } @@ -206,7 +208,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pulsein_popleft_obj, pulseio_pulsein_obj_pople //| STATIC mp_obj_t pulseio_pulsein_obj_get_maxlen(mp_obj_t self_in) { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_pulseio_pulsein_get_maxlen(self)); } @@ -219,6 +221,26 @@ const mp_obj_property_t pulseio_pulsein_maxlen_obj = { (mp_obj_t)&mp_const_none_obj}, }; +//| .. attribute:: paused +//| +//| True when pulse capture is paused as a result of :py:func:`pause` or an error during capture +//| such as a signal that is too fast. +//| +STATIC mp_obj_t pulseio_pulsein_obj_get_paused(mp_obj_t self_in) { + pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + return mp_obj_new_bool(common_hal_pulseio_pulsein_get_paused(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(pulseio_pulsein_get_paused_obj, pulseio_pulsein_obj_get_paused); + +const mp_obj_property_t pulseio_pulsein_paused_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&pulseio_pulsein_get_paused_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + //| .. method:: __len__() //| //| Returns the current pulse length @@ -230,7 +252,7 @@ const mp_obj_property_t pulseio_pulsein_maxlen_obj = { //| STATIC mp_obj_t pulsein_unary_op(mp_unary_op_t op, mp_obj_t self_in) { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); uint16_t len = common_hal_pulseio_pulsein_get_len(self); switch (op) { case MP_UNARY_OP_BOOL: return mp_obj_new_bool(len != 0); @@ -239,7 +261,7 @@ STATIC mp_obj_t pulsein_unary_op(mp_unary_op_t op, mp_obj_t self_in) { } } -//| .. method:: __get__(index) +//| .. method:: __getitem__(index) //| //| Returns the value at the given index or values in slice. //| @@ -251,25 +273,20 @@ STATIC mp_obj_t pulsein_unary_op(mp_unary_op_t op, mp_obj_t self_in) { STATIC mp_obj_t pulsein_subscr(mp_obj_t self_in, mp_obj_t index_obj, mp_obj_t value) { if (value == mp_const_none) { // delete item - mp_raise_AttributeError("Cannot delete values"); + mp_raise_AttributeError(translate("Cannot delete values")); } else { pulseio_pulsein_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulsein_deinited(self)); + check_for_deinit(self); if (MP_OBJ_IS_TYPE(index_obj, &mp_type_slice)) { - mp_raise_NotImplementedError("Slices not supported"); + mp_raise_NotImplementedError(translate("Slices not supported")); } else { - uint16_t index = 0; - if (MP_OBJ_IS_SMALL_INT(index_obj)) { - index = MP_OBJ_SMALL_INT_VALUE(index_obj); - } else { - mp_raise_TypeError("index must be int"); - } + size_t index = mp_get_index(&pulseio_pulsein_type, common_hal_pulseio_pulsein_get_len(self), index_obj, false); if (value == MP_OBJ_SENTINEL) { // load return MP_OBJ_NEW_SMALL_INT(common_hal_pulseio_pulsein_get_item(self, index)); } else { - mp_raise_AttributeError("Read-only"); + mp_raise_AttributeError(translate("Read-only")); } } } @@ -285,7 +302,10 @@ STATIC const mp_rom_map_elem_t pulseio_pulsein_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_resume), MP_ROM_PTR(&pulseio_pulsein_resume_obj) }, { MP_ROM_QSTR(MP_QSTR_clear), MP_ROM_PTR(&pulseio_pulsein_clear_obj) }, { MP_ROM_QSTR(MP_QSTR_popleft), MP_ROM_PTR(&pulseio_pulsein_popleft_obj) }, + + // Properties { MP_ROM_QSTR(MP_QSTR_maxlen), MP_ROM_PTR(&pulseio_pulsein_maxlen_obj) }, + { MP_ROM_QSTR(MP_QSTR_paused), MP_ROM_PTR(&pulseio_pulsein_paused_obj) }, }; STATIC MP_DEFINE_CONST_DICT(pulseio_pulsein_locals_dict, pulseio_pulsein_locals_dict_table); diff --git a/shared-bindings/pulseio/PulseIn.h b/shared-bindings/pulseio/PulseIn.h index 88b6f356ed976..e28a3c2df4b90 100644 --- a/shared-bindings/pulseio/PulseIn.h +++ b/shared-bindings/pulseio/PulseIn.h @@ -41,6 +41,7 @@ extern void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, uint1 extern void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self); extern uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self); extern uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self); +extern bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self); extern uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self); extern uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, int16_t index); diff --git a/shared-bindings/pulseio/PulseOut.c b/shared-bindings/pulseio/PulseOut.c index a44e28d5d98bf..172459e5df043 100644 --- a/shared-bindings/pulseio/PulseOut.c +++ b/shared-bindings/pulseio/PulseOut.c @@ -34,6 +34,7 @@ #include "shared-bindings/pulseio/PulseOut.h" #include "shared-bindings/pulseio/PWMOut.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: pulseio //| @@ -46,7 +47,7 @@ //| //| .. class:: PulseOut(carrier) //| -//| Create a PulseOut object associated with the given PWM out experience. +//| Create a PulseOut object associated with the given PWMout object. //| //| :param ~pulseio.PWMOut carrier: PWMOut that is set to output on the desired pin. //| @@ -56,9 +57,10 @@ //| import pulseio //| import board //| -//| pwm = pulseio.PWMOut(board.D13, duty_cycle=2 ** 15) +//| # 50% duty cycle at 38kHz. +//| pwm = pulseio.PWMOut(board.D13, frequency=38000, duty_cycle=32768) //| pulse = pulseio.PulseOut(pwm) -//| # on off on off on +//| # on off on off on //| pulses = array.array('H', [65000, 1000, 65000, 65000, 1000]) //| pulse.send(pulses) //| @@ -66,12 +68,12 @@ //| pulses[0] = 200 //| pulse.send(pulses) //| -STATIC mp_obj_t pulseio_pulseout_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, 1, true); +STATIC mp_obj_t pulseio_pulseout_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 1, 1, false); mp_obj_t carrier_obj = args[0]; if (!MP_OBJ_IS_TYPE(carrier_obj, &pulseio_pwmout_type)) { - nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_TypeError, "Expected a %q", pulseio_pwmout_type.name)); + mp_raise_TypeError_varg(translate("Expected a %q"), pulseio_pwmout_type.name); } // create Pulse object from the given pin @@ -125,12 +127,14 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pulseio_pulseout___exit___obj, 4, 4, //| STATIC mp_obj_t pulseio_pulseout_obj_send(mp_obj_t self_in, mp_obj_t pulses) { pulseio_pulseout_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_pulseio_pulseout_deinited(self)); + if (common_hal_pulseio_pulseout_deinited(self)) { + raise_deinited_error(); + } mp_buffer_info_t bufinfo; mp_get_buffer_raise(pulses, &bufinfo, MP_BUFFER_READ); if (bufinfo.typecode != 'H') { - mp_raise_TypeError("Array must contain halfwords (type 'H')"); + mp_raise_TypeError(translate("Array must contain halfwords (type 'H')")); } common_hal_pulseio_pulseout_send(self, (uint16_t *)bufinfo.buf, bufinfo.len / 2); return mp_const_none; diff --git a/shared-bindings/pulseio/__init__.c b/shared-bindings/pulseio/__init__.c index 1114b604b254a..a3cec3dca5fd2 100644 --- a/shared-bindings/pulseio/__init__.c +++ b/shared-bindings/pulseio/__init__.c @@ -54,10 +54,6 @@ //| PWMOut //| -//| .. warning:: This module is not available in some SAMD21 builds. See the -//| :ref:`module-support-matrix` for more info. -//| - //| All classes change hardware state and should be deinitialized when they //| are no longer needed if the program continues after use. To do so, either //| call :py:meth:`!deinit` or use a context manager. See diff --git a/shared-bindings/random/__init__.c b/shared-bindings/random/__init__.c index cea437e98d55c..de4c90910df64 100644 --- a/shared-bindings/random/__init__.c +++ b/shared-bindings/random/__init__.c @@ -31,12 +31,13 @@ #include "py/obj.h" #include "py/runtime.h" #include "shared-bindings/random/__init__.h" +#include "supervisor/shared/translate.h" -//| :mod:`random` --- psuedo-random numbers and choices +//| :mod:`random` --- pseudo-random numbers and choices //| ======================================================== //| //| .. module:: random -//| :synopsis: psuedo-random numbers and choices +//| :synopsis: pseudo-random numbers and choices //| :platform: SAMD21, ESP8266 //| //| The `random` module is a strict subset of the CPython `cpython:random` @@ -88,7 +89,7 @@ STATIC mp_obj_t random_randrange(size_t n_args, const mp_obj_t *args) { if (n_args == 1) { // range(stop) if (stop <= 0) { - mp_raise_ValueError("stop not reachable from start"); + mp_raise_ValueError(translate("stop not reachable from start")); } } else { start = stop; @@ -96,7 +97,7 @@ STATIC mp_obj_t random_randrange(size_t n_args, const mp_obj_t *args) { if (n_args == 2) { // range(start, stop) if (start >= stop) { - mp_raise_ValueError("stop not reachable from start"); + mp_raise_ValueError(translate("stop not reachable from start")); } } else { // range(start, stop, step) @@ -107,10 +108,10 @@ STATIC mp_obj_t random_randrange(size_t n_args, const mp_obj_t *args) { } else if (step < 0) { n = (stop - start + step + 1) / step; } else { - mp_raise_ValueError("step must be non-zero"); + mp_raise_ValueError(translate("step must be non-zero")); } if (n <= 0) { - mp_raise_ValueError("invalid step"); + mp_raise_ValueError(translate("invalid step")); } } } @@ -142,7 +143,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_2(random_randint_obj, random_randint); STATIC mp_obj_t random_choice(mp_obj_t seq) { mp_int_t len = mp_obj_get_int(mp_obj_len(seq)); if (len == 0) { - mp_raise_IndexError("empty sequence"); + mp_raise_IndexError(translate("empty sequence")); } return mp_obj_subscr(seq, mp_obj_new_int(shared_modules_random_randrange(0, len, 1)), MP_OBJ_SENTINEL); } diff --git a/shared-bindings/rotaryio/IncrementalEncoder.c b/shared-bindings/rotaryio/IncrementalEncoder.c new file mode 100644 index 0000000000000..058241d24af58 --- /dev/null +++ b/shared-bindings/rotaryio/IncrementalEncoder.c @@ -0,0 +1,166 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/context_manager_helpers.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/runtime0.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/rotaryio/IncrementalEncoder.h" +#include "shared-bindings/util.h" + +//| .. currentmodule:: rotaryio +//| +//| :class:`IncrementalEncoder` -- Track the relative position of an incremental encoder +//| ==================================================================================== +//| +//| IncrementalEncoder determines the relative rotational position based on two series of pulses. +//| +//| .. class:: IncrementalEncoder(pin_a, pin_b) +//| +//| Create an IncrementalEncoder object associated with the given pins. It tracks the positional +//| state of an incremental rotary encoder (also known as a quadrature encoder.) Position is +//| relative to the position when the object is contructed. +//| +//| :param ~microcontroller.Pin pin_a: First pin to read pulses from. +//| :param ~microcontroller.Pin pin_b: Second pin to read pulses from. +//| +//| For example:: +//| +//| import rotaryio +//| import time +//| from board import * +//| +//| enc = rotaryio.IncrementalEncoder(D1, D2) +//| last_position = None +//| while True: +//| position = enc.position +//| if last_position == None or position != last_position: +//| print(position) +//| last_position = position +//| +STATIC mp_obj_t rotaryio_incrementalencoder_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_pin_a, ARG_pin_b }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_pin_a, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_pin_b, MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* pin_a = validate_obj_is_free_pin(args[ARG_pin_a].u_obj); + const mcu_pin_obj_t* pin_b = validate_obj_is_free_pin(args[ARG_pin_b].u_obj); + + rotaryio_incrementalencoder_obj_t *self = m_new_obj(rotaryio_incrementalencoder_obj_t); + self->base.type = &rotaryio_incrementalencoder_type; + + common_hal_rotaryio_incrementalencoder_construct(self, pin_a, pin_b); + + return MP_OBJ_FROM_PTR(self); +} + +//| .. method:: deinit() +//| +//| Deinitializes the IncrementalEncoder and releases any hardware resources for reuse. +//| +STATIC mp_obj_t rotaryio_incrementalencoder_deinit(mp_obj_t self_in) { + rotaryio_incrementalencoder_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_rotaryio_incrementalencoder_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(rotaryio_incrementalencoder_deinit_obj, rotaryio_incrementalencoder_deinit); + +STATIC void check_for_deinit(rotaryio_incrementalencoder_obj_t *self) { + if (common_hal_rotaryio_incrementalencoder_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: __enter__() +//| +//| No-op used by Context Managers. +//| +// Provided by context manager helper. + +//| .. method:: __exit__() +//| +//| Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +STATIC mp_obj_t rotaryio_incrementalencoder_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_rotaryio_incrementalencoder_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(rotaryio_incrementalencoder___exit___obj, 4, 4, rotaryio_incrementalencoder_obj___exit__); + + +//| .. attribute:: position +//| +//| The current position in terms of pulses. The number of pulses per rotation is defined by the +//| specific hardware. +//| +STATIC mp_obj_t rotaryio_incrementalencoder_obj_get_position(mp_obj_t self_in) { + rotaryio_incrementalencoder_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + return mp_obj_new_int(common_hal_rotaryio_incrementalencoder_get_position(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(rotaryio_incrementalencoder_get_position_obj, rotaryio_incrementalencoder_obj_get_position); + +STATIC mp_obj_t rotaryio_incrementalencoder_obj_set_position(mp_obj_t self_in, mp_obj_t new_position) { + rotaryio_incrementalencoder_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_rotaryio_incrementalencoder_set_position(self, mp_obj_get_int(new_position)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(rotaryio_incrementalencoder_set_position_obj, rotaryio_incrementalencoder_obj_set_position); + +const mp_obj_property_t rotaryio_incrementalencoder_position_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&rotaryio_incrementalencoder_get_position_obj, + (mp_obj_t)&rotaryio_incrementalencoder_set_position_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t rotaryio_incrementalencoder_locals_dict_table[] = { + // Methods + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&rotaryio_incrementalencoder_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&rotaryio_incrementalencoder___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_position), MP_ROM_PTR(&rotaryio_incrementalencoder_position_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(rotaryio_incrementalencoder_locals_dict, rotaryio_incrementalencoder_locals_dict_table); + +const mp_obj_type_t rotaryio_incrementalencoder_type = { + { &mp_type_type }, + .name = MP_QSTR_IncrementalEncoder, + .make_new = rotaryio_incrementalencoder_make_new, + .locals_dict = (mp_obj_dict_t*)&rotaryio_incrementalencoder_locals_dict, +}; diff --git a/shared-bindings/rotaryio/IncrementalEncoder.h b/shared-bindings/rotaryio/IncrementalEncoder.h new file mode 100644 index 0000000000000..f70632aefbe62 --- /dev/null +++ b/shared-bindings/rotaryio/IncrementalEncoder.h @@ -0,0 +1,43 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO_INCREMENTALENCODER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO_INCREMENTALENCODER_H + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/rotaryio/IncrementalEncoder.h" + +extern const mp_obj_type_t rotaryio_incrementalencoder_type; + +extern void common_hal_rotaryio_incrementalencoder_construct(rotaryio_incrementalencoder_obj_t* self, + const mcu_pin_obj_t* pin_a, const mcu_pin_obj_t* pin_b); +extern void common_hal_rotaryio_incrementalencoder_deinit(rotaryio_incrementalencoder_obj_t* self); +extern bool common_hal_rotaryio_incrementalencoder_deinited(rotaryio_incrementalencoder_obj_t* self); +extern mp_int_t common_hal_rotaryio_incrementalencoder_get_position(rotaryio_incrementalencoder_obj_t* self); +extern void common_hal_rotaryio_incrementalencoder_set_position(rotaryio_incrementalencoder_obj_t* self, + mp_int_t new_position); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO_INCREMENTALENCODER_H diff --git a/shared-bindings/rotaryio/__init__.c b/shared-bindings/rotaryio/__init__.c new file mode 100644 index 0000000000000..a0166771abe20 --- /dev/null +++ b/shared-bindings/rotaryio/__init__.c @@ -0,0 +1,75 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/rotaryio/__init__.h" +#include "shared-bindings/rotaryio/IncrementalEncoder.h" + +//| :mod:`rotaryio` --- Support for reading rotation sensors +//| ======================================================== +//| +//| .. module:: rotaryio +//| :synopsis: Support for reading rotation sensors +//| :platform: SAMD +//| +//| The `rotaryio` module contains classes to read different rotation encoding schemes. See +//| `Wikipedia's Rotary Encoder page `_ for more +//| background. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| IncrementalEncoder +//| + +//| .. warning:: This module is not available in some SAMD21 (aka M0) builds. See the +//| :ref:`module-support-matrix` for more info. +//| + +//| All classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| + +STATIC const mp_rom_map_elem_t rotaryio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_rotaryio) }, + { MP_ROM_QSTR(MP_QSTR_IncrementalEncoder), MP_ROM_PTR(&rotaryio_incrementalencoder_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(rotaryio_module_globals, rotaryio_module_globals_table); + +const mp_obj_module_t rotaryio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&rotaryio_module_globals, +}; diff --git a/shared-bindings/rotaryio/__init__.h b/shared-bindings/rotaryio/__init__.h new file mode 100644 index 0000000000000..5d051d5a1aea3 --- /dev/null +++ b/shared-bindings/rotaryio/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO___INIT___H + +#include "py/obj.h" + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_ROTARYIO___INIT___H diff --git a/shared-bindings/rtc/RTC.c b/shared-bindings/rtc/RTC.c new file mode 100644 index 0000000000000..3ff09a4ec5b29 --- /dev/null +++ b/shared-bindings/rtc/RTC.c @@ -0,0 +1,137 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "shared-bindings/rtc/RTC.h" +#include "shared-bindings/time/__init__.h" +#include "supervisor/shared/translate.h" + +const rtc_rtc_obj_t rtc_rtc_obj = {{&rtc_rtc_type}}; + +//| .. currentmodule:: rtc +//| +//| :class:`RTC` --- Real Time Clock +//| -------------------------------- +//| +//| .. class:: RTC() +//| +//| This class represents the onboard Real Time Clock. It is a singleton and will always return the same instance. +//| +STATIC mp_obj_t rtc_rtc_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + // No arguments + mp_arg_check_num(n_args, kw_args, 0, 0, false); + + // return constant object + return (mp_obj_t)&rtc_rtc_obj; +} + +//| .. attribute:: datetime +//| +//| The current date and time of the RTC as a `time.struct_time`. +//| +//| This must be set to the current date and time whenever the board loses power:: +//| +//| import rtc +//| import time +//| +//| r = rtc.RTC() +//| r.datetime = rtctime.struct_time((2019, 5, 29, 15, 14, 15, 0, -1, -1)) +//| +//| +//| Once set, the RTC will automatically update this value as time passes. You can read this +//| property to get a snapshot of the current time:: +//| +//| current_time = r.datetime +//| print(current_time) +//| # struct_time(tm_year=2019, tm_month=5, ...) +//| +STATIC mp_obj_t rtc_rtc_obj_get_datetime(mp_obj_t self_in) { + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return struct_time_from_tm(&tm); +} +MP_DEFINE_CONST_FUN_OBJ_1(rtc_rtc_get_datetime_obj, rtc_rtc_obj_get_datetime); + +STATIC mp_obj_t rtc_rtc_obj_set_datetime(mp_obj_t self_in, mp_obj_t datetime) { + timeutils_struct_time_t tm; + struct_time_to_tm(datetime, &tm); + common_hal_rtc_set_time(&tm); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(rtc_rtc_set_datetime_obj, rtc_rtc_obj_set_datetime); + +const mp_obj_property_t rtc_rtc_datetime_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&rtc_rtc_get_datetime_obj, + (mp_obj_t)&rtc_rtc_set_datetime_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: calibration +//| +//| The RTC calibration value as an `int`. +//| +//| A positive value speeds up the clock and a negative value slows it down. +//| Range and value is hardware specific, but one step is often approximately 1 ppm. +//| +STATIC mp_obj_t rtc_rtc_obj_get_calibration(mp_obj_t self_in) { + int calibration = common_hal_rtc_get_calibration(); + return mp_obj_new_int(calibration); +} +MP_DEFINE_CONST_FUN_OBJ_1(rtc_rtc_get_calibration_obj, rtc_rtc_obj_get_calibration); + +STATIC mp_obj_t rtc_rtc_obj_set_calibration(mp_obj_t self_in, mp_obj_t calibration) { + common_hal_rtc_set_calibration(mp_obj_get_int(calibration)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(rtc_rtc_set_calibration_obj, rtc_rtc_obj_set_calibration); + +const mp_obj_property_t rtc_rtc_calibration_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&rtc_rtc_get_calibration_obj, + (mp_obj_t)&rtc_rtc_set_calibration_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t rtc_rtc_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&rtc_rtc_datetime_obj) }, + { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&rtc_rtc_calibration_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(rtc_rtc_locals_dict, rtc_rtc_locals_dict_table); + +const mp_obj_type_t rtc_rtc_type = { + { &mp_type_type }, + .name = MP_QSTR_RTC, + .make_new = rtc_rtc_make_new, + .locals_dict = (mp_obj_dict_t*)&rtc_rtc_locals_dict, +}; diff --git a/shared-bindings/rtc/RTC.h b/shared-bindings/rtc/RTC.h new file mode 100644 index 0000000000000..76510bd729f11 --- /dev/null +++ b/shared-bindings/rtc/RTC.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_RTC_RTC_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_RTC_RTC_H + +#include +#include + +#include "lib/timeutils/timeutils.h" + +extern void common_hal_rtc_get_time(timeutils_struct_time_t *tm); +extern void common_hal_rtc_set_time(timeutils_struct_time_t *tm); + +extern int common_hal_rtc_get_calibration(void); +extern void common_hal_rtc_set_calibration(int calibration); + +extern const mp_obj_type_t rtc_rtc_type; + +typedef struct _rtc_rtc_obj_t { + mp_obj_base_t base; +} rtc_rtc_obj_t; + +extern const rtc_rtc_obj_t rtc_rtc_obj; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_RTC_RTC_H diff --git a/shared-bindings/rtc/__init__.c b/shared-bindings/rtc/__init__.c new file mode 100644 index 0000000000000..22eda9b663279 --- /dev/null +++ b/shared-bindings/rtc/__init__.c @@ -0,0 +1,100 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/runtime.h" +#include "shared-bindings/rtc/__init__.h" +#include "shared-bindings/rtc/RTC.h" +#include "shared-bindings/time/__init__.h" + +//| :mod:`rtc` --- Real Time Clock +//| ======================================================== +//| +//| .. module:: rtc +//| :synopsis: Real Time Clock +//| :platform: SAMD21, SAMD51, nRF52 +//| +//| The `rtc` module provides support for a Real Time Clock. You can access and manage the +//| RTC using :class:`rtc.RTC`. It also backs the :func:`time.time` and :func:`time.localtime` +//| functions using the onboard RTC if present. +//| +//| Classes +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| RTC +//| + +void rtc_reset(void) { + MP_STATE_VM(rtc_time_source) = (mp_obj_t)&rtc_rtc_obj; +} + +mp_obj_t rtc_get_time_source_time(void) { + mp_obj_t datetime = mp_load_attr(MP_STATE_VM(rtc_time_source), MP_QSTR_datetime); + timeutils_struct_time_t tm; + struct_time_to_tm(datetime, &tm); + // This sets tm_wday and tm_yday + return struct_time_from_tm(&tm); +} + +//| .. function:: set_time_source(rtc) +//| +//| Sets the RTC time source used by :func:`time.localtime`. +//| The default is :class:`rtc.RTC`, but it's useful to use this to override the +//| time source for testing purposes. For example:: +//| +//| import rtc +//| import time +//| +//| class RTC(object): +//| @property +//| def datetime(self): +//| return time.struct_time((2018, 3, 17, 21, 1, 47, 0, 0, 0)) +//| +//| r = RTC() +//| rtc.set_time_source(r) +//| +STATIC mp_obj_t rtc_set_time_source(mp_obj_t time_source) { + MP_STATE_VM(rtc_time_source) = time_source; + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(rtc_set_time_source_obj, rtc_set_time_source); + +STATIC const mp_rom_map_elem_t rtc_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_rtc) }, + { MP_ROM_QSTR(MP_QSTR_set_time_source), MP_ROM_PTR(&rtc_set_time_source_obj) }, + { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&rtc_rtc_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(rtc_module_globals, rtc_module_globals_table); + +const mp_obj_module_t rtc_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&rtc_module_globals, +}; diff --git a/shared-bindings/rtc/__init__.h b/shared-bindings/rtc/__init__.h new file mode 100644 index 0000000000000..0ee51fba5e4da --- /dev/null +++ b/shared-bindings/rtc/__init__.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_RTC___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_RTC___INIT___H + +extern void rtc_reset(void); +extern mp_obj_t rtc_get_time_source_time(void); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_RTC___INIT___H diff --git a/shared-bindings/socket/__init__.c b/shared-bindings/socket/__init__.c new file mode 100644 index 0000000000000..2d6c16e90f3ad --- /dev/null +++ b/shared-bindings/socket/__init__.c @@ -0,0 +1,604 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * 2018 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/objtuple.h" +#include "py/objlist.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "py/mperrno.h" +#include "lib/netutils/netutils.h" + +#include "shared-module/network/__init__.h" + +//| :mod:`socket` --- TCP, UDP and RAW socket support +//| ================================================= +//| +//| .. module:: socket +//| :synopsis: TCP, UDP and RAW sockets +//| :platform: SAMD21, SAMD51 +//| +//| Create TCP, UDP and RAW sockets for communicating over the Internet. +//| + +STATIC const mp_obj_type_t socket_type; + +//| .. currentmodule:: socket +//| +//| .. class:: socket(family, type, proto) +//| +//| Create a new socket +//| +//| :param ~int family: AF_INET or AF_INET6 +//| :param ~int type: SOCK_STREAM, SOCK_DGRAM or SOCK_RAW +//| :param ~int proto: IPPROTO_TCP, IPPROTO_UDP or IPPROTO_RAW (ignored) +//| + +STATIC mp_obj_t socket_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + mp_arg_check_num(n_args, kw_args, 0, 4, false); + + // create socket object (not bound to any NIC yet) + mod_network_socket_obj_t *s = m_new_obj_with_finaliser(mod_network_socket_obj_t); + s->base.type = &socket_type; + s->nic = MP_OBJ_NULL; + s->nic_type = NULL; + s->u_param.domain = MOD_NETWORK_AF_INET; + s->u_param.type = MOD_NETWORK_SOCK_STREAM; + s->u_param.fileno = -1; + if (n_args >= 1) { + s->u_param.domain = mp_obj_get_int(args[0]); + if (n_args >= 2) { + s->u_param.type = mp_obj_get_int(args[1]); + if (n_args >= 4) { + s->u_param.fileno = mp_obj_get_int(args[3]); + } + } + } + + return MP_OBJ_FROM_PTR(s); +} + +STATIC void socket_select_nic(mod_network_socket_obj_t *self, const byte *ip) { + if (self->nic == MP_OBJ_NULL) { + // select NIC based on IP + self->nic = network_module_find_nic(ip); + self->nic_type = (mod_network_nic_type_t*)mp_obj_get_type(self->nic); + + // call the NIC to open the socket + int _errno; + if (self->nic_type->socket(self, &_errno) != 0) { + mp_raise_OSError(_errno); + } + } +} + +//| .. method:: bind(address) +//| +//| Bind a socket to an address +//| +//| :param ~tuple address: tuple of (remote_address, remote_port) +//| + +STATIC mp_obj_t socket_bind(mp_obj_t self_in, mp_obj_t addr_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + + // get address + uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; + mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); + + // check if we need to select a NIC + socket_select_nic(self, ip); + + // call the NIC to bind the socket + int _errno; + if (self->nic_type->bind(self, ip, port, &_errno) != 0) { + mp_raise_OSError(_errno); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_bind_obj, socket_bind); + +//| .. method:: listen(backlog) +//| +//| Set socket to listen for incoming connections +//| +//| :param ~int backlog: length of backlog queue for waiting connetions +//| + +STATIC mp_obj_t socket_listen(mp_obj_t self_in, mp_obj_t backlog) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + + if (self->nic == MP_OBJ_NULL) { + // not connected + // TODO I think we can listen even if not bound... + mp_raise_OSError(MP_ENOTCONN); + } + + int _errno; + if (self->nic_type->listen(self, mp_obj_get_int(backlog), &_errno) != 0) { + mp_raise_OSError(_errno); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_listen_obj, socket_listen); + +//| .. method:: accept() +//| +//| Accept a connection on a listening socket of type SOCK_STREAM, +//| creating a new socket of type SOCK_STREAM. +//| Returns a tuple of (new_socket, remote_address) +//| + +STATIC mp_obj_t socket_accept(mp_obj_t self_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + + // create new socket object + // starts with empty NIC so that finaliser doesn't run close() method if accept() fails + mod_network_socket_obj_t *socket2 = m_new_obj_with_finaliser(mod_network_socket_obj_t); + socket2->base.type = &socket_type; + socket2->nic = MP_OBJ_NULL; + socket2->nic_type = NULL; + + // accept incoming connection + uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; + mp_uint_t port; + int _errno; + if (self->nic_type->accept(self, socket2, ip, &port, &_errno) != 0) { + mp_raise_OSError(_errno); + } + + // new socket has valid state, so set the NIC to the same as parent + socket2->nic = self->nic; + socket2->nic_type = self->nic_type; + + // make the return value + mp_obj_tuple_t *client = MP_OBJ_TO_PTR(mp_obj_new_tuple(2, NULL)); + client->items[0] = MP_OBJ_FROM_PTR(socket2); + client->items[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); + + return MP_OBJ_FROM_PTR(client); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(socket_accept_obj, socket_accept); + +//| .. method:: connect(address) +//| +//| Connect a socket to a remote address +//| +//| :param ~tuple address: tuple of (remote_address, remote_port) +//| + +STATIC mp_obj_t socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + + // get address + uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; + mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); + + // check if we need to select a NIC + socket_select_nic(self, ip); + + // call the NIC to connect the socket + int _errno; + if (self->nic_type->connect(self, ip, port, &_errno) != 0) { + mp_raise_OSError(_errno); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_connect_obj, socket_connect); + +//| .. method:: send(bytes) +//| +//| Send some bytes to the connected remote address. +//| Suits sockets of type SOCK_STREAM +//| +//| :param ~bytes bytes: some bytes to send +//| + +STATIC mp_obj_t socket_send(mp_obj_t self_in, mp_obj_t buf_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->nic == MP_OBJ_NULL) { + // not connected + mp_raise_OSError(MP_EPIPE); + } + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); + int _errno; + mp_int_t ret = self->nic_type->send(self, bufinfo.buf, bufinfo.len, &_errno); + if (ret == -1) { + mp_raise_OSError(_errno); + } + return mp_obj_new_int_from_uint(ret); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_send_obj, socket_send); + + +// helper function for socket_recv and socket_recv_into to handle common operations of both +STATIC mp_int_t _socket_recv_into(mod_network_socket_obj_t *sock, byte *buf, mp_int_t len) { + int _errno; + mp_int_t ret = sock->nic_type->recv(sock, buf, len, &_errno); + if (ret == -1) { + mp_raise_OSError(_errno); + } + return ret; +} + + +//| .. method:: recv_into(buffer[, bufsize]) +//| +//| Reads some bytes from the connected remote address, writing +//| into the provided buffer. If bufsize <= len(buffer) is given, +//| a maximum of bufsize bytes will be read into the buffer. If no +//| valid value is given for bufsize, the default is the length of +//| the given buffer. +//| +//| Suits sockets of type SOCK_STREAM +//| Returns an int of number of bytes read. +//| +//| :param bytearray buffer: buffer to receive into +//| :param int bufsize: optionally, a maximum number of bytes to read. + +STATIC mp_obj_t socket_recv_into(size_t n_args, const mp_obj_t *args) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(args[0]); + if (self->nic == MP_OBJ_NULL) { + // not connected + mp_raise_OSError(MP_ENOTCONN); + } + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); + mp_int_t len = bufinfo.len; + if (n_args == 3) { + mp_int_t given_len = mp_obj_get_int(args[2]); + if (given_len < len) { + len = given_len; + } + } + + mp_int_t ret = _socket_recv_into(self, (byte*)bufinfo.buf, len); + return mp_obj_new_int_from_uint(ret); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_recv_into_obj, 2, 3, socket_recv_into); + +//| .. method:: recv(bufsize) +//| +//| Reads some bytes from the connected remote address. +//| Suits sockets of type SOCK_STREAM +//| Returns a bytes() of length <= bufsize +//| +//| :param ~int bufsize: maximum number of bytes to receive + +STATIC mp_obj_t socket_recv(mp_obj_t self_in, mp_obj_t len_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->nic == MP_OBJ_NULL) { + // not connected + mp_raise_OSError(MP_ENOTCONN); + } + mp_int_t len = mp_obj_get_int(len_in); + vstr_t vstr; + vstr_init_len(&vstr, len); + mp_int_t ret = _socket_recv_into(self, (byte*)vstr.buf, len); + if (ret == 0) { + return mp_const_empty_bytes; + } + vstr.len = ret; + return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recv_obj, socket_recv); + +//| .. method:: sendto(bytes, address) +//| +//| Send some bytes to a specific address. +//| Suits sockets of type SOCK_DGRAM +//| +//| :param ~bytes bytes: some bytes to send +//| :param ~tuple address: tuple of (remote_address, remote_port) +//| + +STATIC mp_obj_t socket_sendto(mp_obj_t self_in, mp_obj_t data_in, mp_obj_t addr_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + + // get the data + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(data_in, &bufinfo, MP_BUFFER_READ); + + // get address + uint8_t ip[MOD_NETWORK_IPADDR_BUF_SIZE]; + mp_uint_t port = netutils_parse_inet_addr(addr_in, ip, NETUTILS_BIG); + + // check if we need to select a NIC + socket_select_nic(self, ip); + + // call the NIC to sendto + int _errno; + mp_int_t ret = self->nic_type->sendto(self, bufinfo.buf, bufinfo.len, ip, port, &_errno); + if (ret == -1) { + mp_raise_OSError(_errno); + } + + return mp_obj_new_int(ret); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(socket_sendto_obj, socket_sendto); + +//| .. method:: recvfrom(bufsize) +//| +//| Reads some bytes from the connected remote address. +//| Suits sockets of type SOCK_STREAM +//| +//| Returns a tuple containing +//| * a bytes() of length <= bufsize +//| * a remote_address, which is a tuple of ip address and port number +//| +//| :param ~int bufsize: maximum number of bytes to receive +//| + +STATIC mp_obj_t socket_recvfrom(mp_obj_t self_in, mp_obj_t len_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->nic == MP_OBJ_NULL) { + // not connected + mp_raise_OSError(MP_ENOTCONN); + } + vstr_t vstr; + vstr_init_len(&vstr, mp_obj_get_int(len_in)); + byte ip[4]; + mp_uint_t port; + int _errno; + mp_int_t ret = self->nic_type->recvfrom(self, (byte*)vstr.buf, vstr.len, ip, &port, &_errno); + if (ret == -1) { + mp_raise_OSError(_errno); + } + mp_obj_t tuple[2]; + if (ret == 0) { + tuple[0] = mp_const_empty_bytes; + } else { + vstr.len = ret; + tuple[0] = mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); + } + tuple[1] = netutils_format_inet_addr(ip, port, NETUTILS_BIG); + return mp_obj_new_tuple(2, tuple); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_recvfrom_obj, socket_recvfrom); + +//| .. method:: setsockopt(level, optname, value) +//| +//| Sets socket options +//| + +STATIC mp_obj_t socket_setsockopt(size_t n_args, const mp_obj_t *args) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(args[0]); + + mp_int_t level = mp_obj_get_int(args[1]); + mp_int_t opt = mp_obj_get_int(args[2]); + + const void *optval; + mp_uint_t optlen; + mp_int_t val; + if (mp_obj_is_integer(args[3])) { + val = mp_obj_get_int_truncated(args[3]); + optval = &val; + optlen = sizeof(val); + } else { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[3], &bufinfo, MP_BUFFER_READ); + optval = bufinfo.buf; + optlen = bufinfo.len; + } + + int _errno; + if (self->nic_type->setsockopt(self, level, opt, optval, optlen, &_errno) != 0) { + mp_raise_OSError(_errno); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(socket_setsockopt_obj, 4, 4, socket_setsockopt); + +//| .. method:: settimeout(value) +//| +//| Set the timeout value for this socket. +//| +//| :param ~int value: timeout in seconds. 0 means non-blocking. None means block indefinitely. +//| + +STATIC mp_obj_t socket_settimeout(mp_obj_t self_in, mp_obj_t timeout_in) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (self->nic == MP_OBJ_NULL) { + // not connected + mp_raise_OSError(MP_ENOTCONN); + } + mp_uint_t timeout; + if (timeout_in == mp_const_none) { + timeout = -1; + } else { + #if MICROPY_PY_BUILTINS_FLOAT + timeout = 1000 * mp_obj_get_float(timeout_in); + #else + timeout = 1000 * mp_obj_get_int(timeout_in); + #endif + } + int _errno; + if (self->nic_type->settimeout(self, timeout, &_errno) != 0) { + mp_raise_OSError(_errno); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_settimeout_obj, socket_settimeout); + +//| .. method:: setblocking(flag) +//| +//| Set the blocking behaviour of this socket. +//| +//| :param ~bool flag: False means non-blocking, True means block indefinitely. +//| + +// method socket.setblocking(flag) +STATIC mp_obj_t socket_setblocking(mp_obj_t self_in, mp_obj_t blocking) { + if (mp_obj_is_true(blocking)) { + return socket_settimeout(self_in, mp_const_none); + } else { + return socket_settimeout(self_in, MP_OBJ_NEW_SMALL_INT(0)); + } +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_setblocking_obj, socket_setblocking); + +STATIC const mp_rom_map_elem_t socket_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&mp_stream_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&mp_stream_close_obj) }, + { MP_ROM_QSTR(MP_QSTR_bind), MP_ROM_PTR(&socket_bind_obj) }, + { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&socket_listen_obj) }, + { MP_ROM_QSTR(MP_QSTR_accept), MP_ROM_PTR(&socket_accept_obj) }, + { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&socket_connect_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&socket_send_obj) }, + { MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&socket_recv_obj) }, + { MP_ROM_QSTR(MP_QSTR_sendto), MP_ROM_PTR(&socket_sendto_obj) }, + { MP_ROM_QSTR(MP_QSTR_recvfrom), MP_ROM_PTR(&socket_recvfrom_obj) }, + { MP_ROM_QSTR(MP_QSTR_recv_into), MP_ROM_PTR(&socket_recv_into_obj) }, + { MP_ROM_QSTR(MP_QSTR_setsockopt), MP_ROM_PTR(&socket_setsockopt_obj) }, + { MP_ROM_QSTR(MP_QSTR_settimeout), MP_ROM_PTR(&socket_settimeout_obj) }, + { MP_ROM_QSTR(MP_QSTR_setblocking), MP_ROM_PTR(&socket_setblocking_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(socket_locals_dict, socket_locals_dict_table); + +mp_uint_t socket_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) { + mod_network_socket_obj_t *self = MP_OBJ_TO_PTR(self_in); + if (request == MP_STREAM_CLOSE) { + if (self->nic != MP_OBJ_NULL) { + self->nic_type->close(self); + self->nic = MP_OBJ_NULL; + } + return 0; + } + return self->nic_type->ioctl(self, request, arg, errcode); +} + +STATIC const mp_stream_p_t socket_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .ioctl = socket_ioctl, + .is_text = false, +}; + +STATIC const mp_obj_type_t socket_type = { + { &mp_type_type }, + .name = MP_QSTR_socket, + .make_new = socket_make_new, + .protocol = &socket_stream_p, + .locals_dict = (mp_obj_dict_t*)&socket_locals_dict, +}; + +//| .. function:: getaddrinfo(host, port) +//| +//| Gets the address information for a hostname and port +//| +//| Returns the appropriate family, socket type, socket protocol and +//| address information to call socket.socket() and socket.connect() with, +//| as a tuple. +//| + +STATIC mp_obj_t socket_getaddrinfo(mp_obj_t host_in, mp_obj_t port_in) { + size_t hlen; + const char *host = mp_obj_str_get_data(host_in, &hlen); + mp_int_t port = mp_obj_get_int(port_in); + uint8_t out_ip[MOD_NETWORK_IPADDR_BUF_SIZE]; + bool have_ip = false; + + if (hlen > 0) { + // check if host is already in IP form + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + netutils_parse_ipv4_addr(host_in, out_ip, NETUTILS_BIG); + have_ip = true; + nlr_pop(); + } else { + // swallow exception: host was not in IP form so need to do DNS lookup + } + } + + if (!have_ip) { + // find a NIC that can do a name lookup + for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { + mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; + mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); + if (nic_type->gethostbyname != NULL) { + int ret = nic_type->gethostbyname(nic, host, hlen, out_ip); + if (ret != 0) { + mp_raise_OSError(ret); + } + have_ip = true; + break; + } + } + } + + if (!have_ip) { + nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, translate("no available NIC"))); + } + + mp_obj_tuple_t *tuple = MP_OBJ_TO_PTR(mp_obj_new_tuple(5, NULL)); + tuple->items[0] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_AF_INET); + tuple->items[1] = MP_OBJ_NEW_SMALL_INT(MOD_NETWORK_SOCK_STREAM); + tuple->items[2] = MP_OBJ_NEW_SMALL_INT(0); + tuple->items[3] = MP_OBJ_NEW_QSTR(MP_QSTR_); + tuple->items[4] = netutils_format_inet_addr(out_ip, port, NETUTILS_BIG); + return mp_obj_new_list(1, (mp_obj_t*)&tuple); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(socket_getaddrinfo_obj, socket_getaddrinfo); + +STATIC const mp_rom_map_elem_t socket_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usocket) }, + + { MP_ROM_QSTR(MP_QSTR_socket), MP_ROM_PTR(&socket_type) }, + { MP_ROM_QSTR(MP_QSTR_getaddrinfo), MP_ROM_PTR(&socket_getaddrinfo_obj) }, + + // class constants + { MP_ROM_QSTR(MP_QSTR_AF_INET), MP_ROM_INT(MOD_NETWORK_AF_INET) }, + { MP_ROM_QSTR(MP_QSTR_AF_INET6), MP_ROM_INT(MOD_NETWORK_AF_INET6) }, + + { MP_ROM_QSTR(MP_QSTR_SOCK_STREAM), MP_ROM_INT(MOD_NETWORK_SOCK_STREAM) }, + { MP_ROM_QSTR(MP_QSTR_SOCK_DGRAM), MP_ROM_INT(MOD_NETWORK_SOCK_DGRAM) }, + { MP_ROM_QSTR(MP_QSTR_SOCK_RAW), MP_ROM_INT(MOD_NETWORK_SOCK_RAW) }, + + /* + { MP_ROM_QSTR(MP_QSTR_IPPROTO_IP), MP_ROM_INT(MOD_NETWORK_IPPROTO_IP) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_ICMP), MP_ROM_INT(MOD_NETWORK_IPPROTO_ICMP) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV4), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV4) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_TCP), MP_ROM_INT(MOD_NETWORK_IPPROTO_TCP) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_UDP), MP_ROM_INT(MOD_NETWORK_IPPROTO_UDP) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_IPV6), MP_ROM_INT(MOD_NETWORK_IPPROTO_IPV6) }, + { MP_ROM_QSTR(MP_QSTR_IPPROTO_RAW), MP_ROM_INT(MOD_NETWORK_IPPROTO_RAW) }, + */ +}; + +STATIC MP_DEFINE_CONST_DICT(socket_globals, socket_globals_table); + +const mp_obj_module_t socket_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&socket_globals, +}; diff --git a/shared-bindings/storage/__init__.c b/shared-bindings/storage/__init__.c index 6f6a30da6de11..ba439b951c49c 100644 --- a/shared-bindings/storage/__init__.c +++ b/shared-bindings/storage/__init__.c @@ -31,7 +31,9 @@ #include "extmod/vfs_fat.h" #include "py/obj.h" #include "py/objnamedtuple.h" +#include "py/runtime.h" #include "shared-bindings/storage/__init__.h" +#include "supervisor/shared/translate.h" //| :mod:`storage` --- storage management //| ======================================================== @@ -46,16 +48,18 @@ //| directly. //| -//| .. function:: mount(filesystem, mount_path, \*, readonly=False) +//| .. function:: mount(filesystem, mount_path, *, readonly=False) //| //| Mounts the given filesystem object at the given path. //| //| This is the CircuitPython analog to the UNIX ``mount`` command. //| +//| :param bool readonly: True when the filesystem should be readonly to CircuitPython. +//| mp_obj_t storage_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_readonly }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_readonly, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_false} }, + { MP_QSTR_readonly, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, }; // parse args @@ -72,10 +76,10 @@ mp_obj_t storage_mount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_arg mp_obj_t dest[2]; mp_load_method_maybe(vfs_obj, MP_QSTR_mount, dest); if (dest[0] == MP_OBJ_NULL) { - mp_raise_ValueError("filesystem must provide mount method"); + mp_raise_ValueError(translate("filesystem must provide mount method")); } - common_hal_storage_mount(vfs_obj, mnt_str, mp_obj_is_true(args[ARG_readonly].u_obj)); + common_hal_storage_mount(vfs_obj, mnt_str, args[ARG_readonly].u_bool); return mp_const_none; } @@ -99,14 +103,21 @@ mp_obj_t storage_umount(mp_obj_t mnt_in) { } MP_DEFINE_CONST_FUN_OBJ_1(storage_umount_obj, storage_umount); -//| .. function:: remount(mount_path, readonly=False) +//| .. function:: remount(mount_path, readonly=False, *, disable_concurrent_write_protection=False) //| //| Remounts the given path with new parameters. //| +//| :param bool readonly: True when the filesystem should be readonly to CircuitPython. +//| :param bool disable_concurrent_write_protection: When True, the check that makes sure the +//| underlying filesystem data is written by one computer is disabled. Disabling the protection +//| allows CircuitPython and a host to write to the same filesystem with the risk that the +//| filesystem will be corrupted. +//| mp_obj_t storage_remount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_readonly }; + enum { ARG_readonly, ARG_disable_concurrent_write_protection }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_readonly, MP_ARG_BOOL | MP_ARG_REQUIRED, {.u_bool = false} }, + { MP_QSTR_readonly, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_disable_concurrent_write_protection, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} }, }; // get the mount point @@ -116,18 +127,49 @@ mp_obj_t storage_remount(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_a mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - common_hal_storage_remount(mnt_str, args[ARG_readonly].u_bool); + common_hal_storage_remount(mnt_str, args[ARG_readonly].u_bool, args[ARG_disable_concurrent_write_protection].u_bool); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_KW(storage_remount_obj, 1, storage_remount); +//| .. function:: getmount(mount_path) +//| +//| Retrieves the mount object associated with the mount path +//| +mp_obj_t storage_getmount(const mp_obj_t mnt_in) { + return common_hal_storage_getmount(mp_obj_str_get_str(mnt_in)); +} +MP_DEFINE_CONST_FUN_OBJ_1(storage_getmount_obj, storage_getmount); + +//| .. function:: erase_filesystem() +//| +//| Erase and re-create the ``CIRCUITPY`` filesystem. +//| +//| On boards that present USB-visible ``CIRCUITPY`` drive (e.g., SAMD21 and SAMD51), +//| then call `microcontroller.reset()` to restart CircuitPython and have the +//| host computer remount CIRCUITPY. +//| +//| This function can be called from the REPL when ``CIRCUITPY`` +//| has become corrupted. +//| +//| .. warning:: All the data on ``CIRCUITPY`` will be lost, and +//| CircuitPython will restart on certain boards. + +mp_obj_t storage_erase_filesystem(void) { + common_hal_storage_erase_filesystem(); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_0(storage_erase_filesystem_obj, storage_erase_filesystem); + STATIC const mp_rom_map_elem_t storage_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_storage) }, { MP_ROM_QSTR(MP_QSTR_mount), MP_ROM_PTR(&storage_mount_obj) }, { MP_ROM_QSTR(MP_QSTR_umount), MP_ROM_PTR(&storage_umount_obj) }, { MP_ROM_QSTR(MP_QSTR_remount), MP_ROM_PTR(&storage_remount_obj) }, + { MP_ROM_QSTR(MP_QSTR_getmount), MP_ROM_PTR(&storage_getmount_obj) }, + { MP_ROM_QSTR(MP_QSTR_erase_filesystem), MP_ROM_PTR(&storage_erase_filesystem_obj) }, //| .. class:: VfsFat(block_device) //| @@ -135,6 +177,49 @@ STATIC const mp_rom_map_elem_t storage_module_globals_table[] = { //| //| :param block_device: Block device the the filesystem lives on //| + //| .. attribute:: label + //| + //| The filesystem label, up to 11 case-insensitive bytes. Note that + //| this property can only be set when the device is writable by the + //| microcontroller. + //| + //| .. method:: mkfs() + //| + //| Format the block device, deleting any data that may have been there + //| + //| .. method:: open(path, mode) + //| + //| Like builtin ``open()`` + //| + //| .. method:: ilistdir([path]) + //| + //| Return an iterator whose values describe files and folders within + //| ``path`` + //| + //| .. method:: mkdir(path) + //| + //| Like `os.mkdir` + //| + //| .. method:: rmdir(path) + //| + //| Like `os.rmdir` + //| + //| .. method:: stat(path) + //| + //| Like `os.stat` + //| + //| .. method:: statvfs(path) + //| + //| Like `os.statvfs` + //| + //| .. method:: mount(readonly, mkfs) + //| + //| Don't call this directly, call `storage.mount`. + //| + //| .. method:: umount() + //| + //| Don't call this directly, call `storage.umount`. + //| { MP_ROM_QSTR(MP_QSTR_VfsFat), MP_ROM_PTR(&mp_fat_vfs_type) }, }; diff --git a/shared-bindings/storage/__init__.h b/shared-bindings/storage/__init__.h index 574b5ff8dd309..7851b9e292b3e 100644 --- a/shared-bindings/storage/__init__.h +++ b/shared-bindings/storage/__init__.h @@ -33,6 +33,8 @@ void common_hal_storage_mount(mp_obj_t vfs_obj, const char* path, bool readonly); void common_hal_storage_umount_path(const char* path); void common_hal_storage_umount_object(mp_obj_t vfs_obj); -void common_hal_storage_remount(const char* path, bool readonly); +void common_hal_storage_remount(const char* path, bool readonly, bool disable_concurrent_write_protection); +mp_obj_t common_hal_storage_getmount(const char* path); +void common_hal_storage_erase_filesystem(void); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_STORAGE___INIT___H diff --git a/shared-bindings/struct/__init__.c b/shared-bindings/struct/__init__.c index 5be2559718f0a..ea14b376371d0 100644 --- a/shared-bindings/struct/__init__.c +++ b/shared-bindings/struct/__init__.c @@ -36,6 +36,7 @@ #include "py/parsenum.h" #include "shared-bindings/struct/__init__.h" #include "shared-module/struct/__init__.h" +#include "supervisor/shared/translate.h" //| :mod:`struct` --- manipulation of c-style data //| ======================================================== @@ -50,7 +51,7 @@ //| //| Supported size/byte order prefixes: *@*, *<*, *>*, *!*. //| -//| Supported format codes: *b*, *B*, *h*, *H*, *i*, *I*, *l*, *L*, *q*, *Q*, +//| Supported format codes: *b*, *B*, *x*, *h*, *H*, *i*, *I*, *l*, *L*, *q*, *Q*, //| *s*, *P*, *f*, *d* (the latter 2 depending on the floating-point support). //| @@ -66,14 +67,13 @@ STATIC mp_obj_t struct_calcsize(mp_obj_t fmt_in) { } MP_DEFINE_CONST_FUN_OBJ_1(struct_calcsize_obj, struct_calcsize); -//| .. function:: pack(fmt, v1, v2, ...) +//| .. function:: pack(fmt, *values) //| -//| Pack the values v1, v2, ... according to the format string fmt. +//| Pack the values according to the format string fmt. //| The return value is a bytes object encoding the values. //| STATIC mp_obj_t struct_pack(size_t n_args, const mp_obj_t *args) { - // TODO: "The arguments must match the values required by the format exactly." mp_int_t size = MP_OBJ_SMALL_INT_VALUE(struct_calcsize(args[0])); vstr_t vstr; vstr_init_len(&vstr, size); @@ -85,10 +85,9 @@ STATIC mp_obj_t struct_pack(size_t n_args, const mp_obj_t *args) { } MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(struct_pack_obj, 1, MP_OBJ_FUN_ARGS_MAX, struct_pack); - -//| .. function:: pack_into(fmt, buffer, offset, v1, v2, ...) +//| .. function:: pack_into(fmt, buffer, offset, *values) //| -//| Pack the values v1, v2, ... according to the format string fmt into a buffer +//| Pack the values according to the format string fmt into a buffer //| starting at offset. offset may be negative to count from the end of buffer. //| @@ -100,7 +99,7 @@ STATIC mp_obj_t struct_pack_into(size_t n_args, const mp_obj_t *args) { // negative offsets are relative to the end of the buffer offset = (mp_int_t)bufinfo.len + offset; if (offset < 0) { - mp_raise_RuntimeError("buffer too small"); + mp_raise_RuntimeError(translate("buffer too small")); } } byte *p = (byte *)bufinfo.buf; @@ -115,49 +114,67 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(struct_pack_into_obj, 3, MP_OBJ_FUN_ARGS_MAX //| .. function:: unpack(fmt, data) //| //| Unpack from the data according to the format string fmt. The return value -//| is a tuple of the unpacked values. +//| is a tuple of the unpacked values. The buffer size must match the size +//| required by the format. //| -//| .. function:: unpack_from(fmt, data, offset) +STATIC mp_obj_t struct_unpack(size_t n_args, const mp_obj_t *args) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); + byte *p = bufinfo.buf; + byte *end_p = &p[bufinfo.len]; + + // true means check the size must be exactly right. + return MP_OBJ_FROM_PTR(shared_modules_struct_unpack_from(args[0] , p, end_p, true)); +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(struct_unpack_obj, 2, 3, struct_unpack); + +//| .. function:: unpack_from(fmt, data, offset=0) //| //| Unpack from the data starting at offset according to the format string fmt. //| offset may be negative to count from the end of buffer. The return value is -//| a tuple of the unpacked values. +//| a tuple of the unpacked values. The buffer size must be at least as big +//| as the size required by the form. //| -STATIC mp_obj_t struct_unpack_from(size_t n_args, const mp_obj_t *args) { - // unpack requires that the buffer be exactly the right size. - // unpack_from requires that the buffer be "big enough". - // Since we implement unpack and unpack_from using the same function - // we relax the "exact" requirement, and only implement "big enough". +STATIC mp_obj_t struct_unpack_from(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_format, ARG_buffer, ARG_offset }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_format, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_offset, MP_ARG_INT, {.u_int = 0} }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_READ); + mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_READ); byte *p = bufinfo.buf; byte *end_p = &p[bufinfo.len]; - if (n_args > 2) { - mp_int_t offset = mp_obj_get_int(args[2]); - // offset arg provided + mp_int_t offset = args[ARG_offset].u_int; + if (offset < 0) { + // negative offsets are relative to the end of the buffer + offset = bufinfo.len + offset; if (offset < 0) { - // negative offsets are relative to the end of the buffer - offset = bufinfo.len + offset; - if (offset < 0) { - mp_raise_RuntimeError("buffer too small"); - } + mp_raise_RuntimeError(translate("buffer too small")); } - p += offset; } + p += offset; - return MP_OBJ_FROM_PTR(shared_modules_struct_unpack_from(args[0] , p, end_p)); + // false means the size doesn't have to be exact. struct.unpack_from() only requires + // that be buffer be big enough. + return MP_OBJ_FROM_PTR(shared_modules_struct_unpack_from(args[ARG_format].u_obj, p, end_p, false)); } -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(struct_unpack_from_obj, 2, 3, struct_unpack_from); +MP_DEFINE_CONST_FUN_OBJ_KW(struct_unpack_from_obj, 0, struct_unpack_from); STATIC const mp_rom_map_elem_t mp_module_struct_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_struct) }, { MP_ROM_QSTR(MP_QSTR_calcsize), MP_ROM_PTR(&struct_calcsize_obj) }, { MP_ROM_QSTR(MP_QSTR_pack), MP_ROM_PTR(&struct_pack_obj) }, { MP_ROM_QSTR(MP_QSTR_pack_into), MP_ROM_PTR(&struct_pack_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_unpack), MP_ROM_PTR(&struct_unpack_from_obj) }, + { MP_ROM_QSTR(MP_QSTR_unpack), MP_ROM_PTR(&struct_unpack_obj) }, { MP_ROM_QSTR(MP_QSTR_unpack_from), MP_ROM_PTR(&struct_unpack_from_obj) }, }; diff --git a/shared-bindings/struct/__init__.h b/shared-bindings/struct/__init__.h index c4e867aaaf3a6..a7e72b11c7577 100644 --- a/shared-bindings/struct/__init__.h +++ b/shared-bindings/struct/__init__.h @@ -29,6 +29,6 @@ void shared_modules_struct_pack_into(mp_obj_t fmt_in, byte *p, byte* end_p, size_t n_args, const mp_obj_t *args); mp_uint_t shared_modules_struct_calcsize(mp_obj_t fmt_in); -mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byte *end_p); +mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byte *end_p, bool exact_size); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_RANDOM___INIT___H diff --git a/shared-bindings/supervisor/Runtime.c b/shared-bindings/supervisor/Runtime.c new file mode 100755 index 0000000000000..746dfe5ee78af --- /dev/null +++ b/shared-bindings/supervisor/Runtime.c @@ -0,0 +1,116 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "py/objproperty.h" +#include "shared-bindings/supervisor/Runtime.h" + +//TODO: add USB, REPL to description once they're operational +//| .. currentmodule:: supervisor +//| +//| :class:`Runtime` --- Supervisor Runtime information +//| ---------------------------------------------------- +//| +//| Get current status of runtime objects. +//| +//| Usage:: +//| +//| import supervisor +//| if supervisor.runtime.serial_connected: +//| print("Hello World!") +//| + +//| .. class:: Runtime() +//| +//| You cannot create an instance of `supervisor.Runtime`. +//| Use `supervisor.runtime` to access the sole instance available. +//| + +//| .. attribute:: runtime.serial_connected +//| +//| Returns the USB serial communication status (read-only). +//| +//| .. note:: +//| +//| SAMD: Will return ``True`` if the USB serial connection +//| has been established at any point. Will not reset if +//| USB is disconnected but power remains (e.g. battery connected) +//| + +STATIC mp_obj_t supervisor_get_serial_connected(mp_obj_t self){ + if (!common_hal_get_serial_connected()) { + return mp_const_false; + } + else { + return mp_const_true; + } +} +MP_DEFINE_CONST_FUN_OBJ_1(supervisor_get_serial_connected_obj, supervisor_get_serial_connected); + +const mp_obj_property_t supervisor_serial_connected_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&supervisor_get_serial_connected_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| .. attribute:: runtime.serial_bytes_available +//| +//| Returns the whether any bytes are available to read +//| on the USB serial input. Allows for polling to see whether +//| to call the built-in input() or wait. (read-only) +//| +STATIC mp_obj_t supervisor_get_serial_bytes_available(mp_obj_t self){ + if (!common_hal_get_serial_bytes_available()) { + return mp_const_false; + } + else { + return mp_const_true; + } +} +MP_DEFINE_CONST_FUN_OBJ_1(supervisor_get_serial_bytes_available_obj, supervisor_get_serial_bytes_available); + +const mp_obj_property_t supervisor_serial_bytes_available_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&supervisor_get_serial_bytes_available_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t supervisor_runtime_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_serial_connected), MP_ROM_PTR(&supervisor_serial_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_serial_bytes_available), MP_ROM_PTR(&supervisor_serial_bytes_available_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(supervisor_runtime_locals_dict, supervisor_runtime_locals_dict_table); + +const mp_obj_type_t supervisor_runtime_type = { + .base = { &mp_type_type }, + .name = MP_QSTR_Runtime, + .locals_dict = (mp_obj_t)&supervisor_runtime_locals_dict, +}; diff --git a/shared-bindings/supervisor/Runtime.h b/shared-bindings/supervisor/Runtime.h new file mode 100755 index 0000000000000..864b070cdbb94 --- /dev/null +++ b/shared-bindings/supervisor/Runtime.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_RUNTIME_STATUS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_RUNTIME_STATUS_H + +#include +#include "py/obj.h" + + +const mp_obj_type_t supervisor_runtime_type; + +bool common_hal_get_serial_connected(void); + +bool common_hal_get_serial_bytes_available(void); + +//TODO: placeholders for future functions +//bool common_hal_get_repl_active(void); +//bool common_hal_get_usb_enumerated(void); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_SUPERVISOR_RUNTIME_H diff --git a/shared-bindings/supervisor/__init__.c b/shared-bindings/supervisor/__init__.c index cbb138beb2186..2705c8e581e5d 100644 --- a/shared-bindings/supervisor/__init__.c +++ b/shared-bindings/supervisor/__init__.c @@ -23,17 +23,41 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ - #include "py/obj.h" - #include "py/runtime.h" - #include "supervisor/shared/autoreload.h" - #include "supervisor/shared/rgb_led_status.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "py/reload.h" + +#include "lib/utils/interrupt_char.h" +#include "supervisor/shared/autoreload.h" +#include "supervisor/shared/rgb_led_status.h" +#include "supervisor/shared/stack.h" +#include "supervisor/shared/translate.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" //| :mod:`supervisor` --- Supervisor settings //| ================================================= //| //| .. module:: supervisor //| :synopsis: Supervisor settings -//| :platform: SAMD21 +//| :platform: SAMD21/51 (All), nRF (Runtime only) +//| +//| The `supervisor` module. (TODO: expand description) +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Runtime +//| + +//| .. attribute:: runtime +//| +//| Runtime information, such as `runtime.serial_connected` +//| (USB serial connection status). +//| This object is the sole instance of `supervisor.Runtime`. //| //| .. method:: enable_autoreload() @@ -66,18 +90,49 @@ STATIC mp_obj_t supervisor_set_rgb_status_brightness(mp_obj_t lvl){ // This must be int. If cast to uint8_t first, will never raise a ValueError. int brightness_int = mp_obj_get_int(lvl); if(brightness_int < 0 || brightness_int > 255){ - mp_raise_ValueError("Brightness must be between 0 and 255"); + mp_raise_ValueError(translate("Brightness must be between 0 and 255")); } set_rgb_status_brightness((uint8_t)brightness_int); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(supervisor_set_rgb_status_brightness_obj, supervisor_set_rgb_status_brightness); +//| .. method:: reload() +//| +//| Reload the main Python code and run it (equivalent to hitting Ctrl-D at the REPL). +//| +STATIC mp_obj_t supervisor_reload(void) { + reload_requested = true; + mp_raise_reload_exception(); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_0(supervisor_reload_obj, supervisor_reload); + +//| .. method:: set_next_stack_limit(size) +//| +//| Set the size of the stack for the next vm run. If its too large, the default will be used. +//| +STATIC mp_obj_t supervisor_set_next_stack_limit(mp_obj_t size_obj) { + mp_int_t size = mp_obj_get_int(size_obj); + + if (size < 256) { + mp_raise_ValueError(translate("Stack size must be at least 256")); + } + set_next_stack_size(size); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(supervisor_set_next_stack_limit_obj, supervisor_set_next_stack_limit); + STATIC const mp_rom_map_elem_t supervisor_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_supervisor) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_enable_autoreload), MP_ROM_PTR(&supervisor_enable_autoreload_obj)}, - { MP_OBJ_NEW_QSTR(MP_QSTR_disable_autoreload), MP_ROM_PTR(&supervisor_disable_autoreload_obj)}, - { MP_OBJ_NEW_QSTR(MP_QSTR_set_rgb_status_brightness), MP_ROM_PTR(&supervisor_set_rgb_status_brightness_obj)}, + { MP_OBJ_NEW_QSTR(MP_QSTR_enable_autoreload), MP_ROM_PTR(&supervisor_enable_autoreload_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_disable_autoreload), MP_ROM_PTR(&supervisor_disable_autoreload_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_set_rgb_status_brightness), MP_ROM_PTR(&supervisor_set_rgb_status_brightness_obj) }, + { MP_ROM_QSTR(MP_QSTR_runtime), MP_ROM_PTR(&common_hal_supervisor_runtime_obj) }, + { MP_ROM_QSTR(MP_QSTR_reload), MP_ROM_PTR(&supervisor_reload_obj) }, + { MP_ROM_QSTR(MP_QSTR_set_next_stack_limit), MP_ROM_PTR(&supervisor_set_next_stack_limit_obj) }, + }; STATIC MP_DEFINE_CONST_DICT(supervisor_module_globals, supervisor_module_globals_table); diff --git a/shared-bindings/supervisor/__init__.h b/shared-bindings/supervisor/__init__.h new file mode 100755 index 0000000000000..d2e5689452dca --- /dev/null +++ b/shared-bindings/supervisor/__init__.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_SUPERVISOR___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_SUPERVISOR___INIT___H + +//#include "py/mpconfig.h" +#include "py/obj.h" + +#include "common-hal/supervisor/Runtime.h" + +extern const super_runtime_obj_t common_hal_supervisor_runtime_obj; + + + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_SUPERVISOR___INIT___H \ No newline at end of file diff --git a/shared-bindings/support_matrix.rst b/shared-bindings/support_matrix.rst new file mode 100644 index 0000000000000..124f3a810453c --- /dev/null +++ b/shared-bindings/support_matrix.rst @@ -0,0 +1,16 @@ +.. _module-support-matrix: + +Support Matrix +=============== + +The following table lists the available built-in modules for each CircuitPython +capable board. + +.. csv-table:: + :header-rows: 1 + :widths: 7, 50 + + "Board", "Modules Available" + {% for key, value in support_matrix|dictsort -%} + "{{ key }}", "{{ '`' ~ value|join("`, `") ~ '`' }}" + {% endfor -%} diff --git a/shared-bindings/terminalio/Terminal.c b/shared-bindings/terminalio/Terminal.c new file mode 100644 index 0000000000000..9c01fba20bd2f --- /dev/null +++ b/shared-bindings/terminalio/Terminal.c @@ -0,0 +1,130 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/terminalio/Terminal.h" +#include "shared-bindings/util.h" + +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "shared-bindings/fontio/BuiltinFont.h" +#include "supervisor/shared/translate.h" + + +//| .. currentmodule:: terminalio +//| +//| :class:`Terminal` -- display a character stream with a TileGrid +//| ================================================================ +//| +//| .. class:: Terminal(tilegrid, font) +//| +//| Terminal manages tile indices and cursor position based on VT100 commands. The font should be +//| a `fontio.BuiltinFont` and the TileGrid's bitmap should match the font's bitmap. +//| + +STATIC mp_obj_t terminalio_terminal_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_tilegrid, ARG_font }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_tilegrid, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_font, MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_obj_t tilegrid = args[ARG_tilegrid].u_obj; + if (!MP_OBJ_IS_TYPE(tilegrid, &displayio_tilegrid_type)) { + mp_raise_TypeError_varg(translate("Expected a %q"), displayio_tilegrid_type.name); + } + + mp_obj_t font = args[ARG_font].u_obj; + if (!MP_OBJ_IS_TYPE(font, &fontio_builtinfont_type)) { + mp_raise_TypeError_varg(translate("Expected a %q"), fontio_builtinfont_type.name); + } + terminalio_terminal_obj_t *self = m_new_obj(terminalio_terminal_obj_t); + self->base.type = &terminalio_terminal_type; + common_hal_terminalio_terminal_construct(self, MP_OBJ_TO_PTR(tilegrid), MP_OBJ_TO_PTR(font)); + return MP_OBJ_FROM_PTR(self); +} + +// These are standard stream methods. Code is in py/stream.c. +// +//| .. method:: write(buf) +//| +//| Write the buffer of bytes to the bus. +//| +//| :return: the number of bytes written +//| :rtype: int or None +//| +STATIC mp_uint_t terminalio_terminal_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { + terminalio_terminal_obj_t *self = MP_OBJ_TO_PTR(self_in); + const byte *buf = buf_in; + + return common_hal_terminalio_terminal_write(self, buf, size, errcode); +} + +STATIC mp_uint_t terminalio_terminal_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { + terminalio_terminal_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_uint_t ret; + if (request == MP_IOCTL_POLL) { + mp_uint_t flags = arg; + ret = 0; + if ((flags & MP_IOCTL_POLL_WR) && common_hal_terminalio_terminal_ready_to_tx(self)) { + ret |= MP_IOCTL_POLL_WR; + } + } else { + *errcode = MP_EINVAL; + ret = MP_STREAM_ERROR; + } + return ret; +} + +STATIC const mp_rom_map_elem_t terminalio_terminal_locals_dict_table[] = { + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(terminalio_terminal_locals_dict, terminalio_terminal_locals_dict_table); + +STATIC const mp_stream_p_t terminalio_terminal_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = NULL, + .write = terminalio_terminal_write, + .ioctl = terminalio_terminal_ioctl, + .is_text = true, +}; + +const mp_obj_type_t terminalio_terminal_type = { + { &mp_type_type }, + .name = MP_QSTR_Terminal, + .make_new = terminalio_terminal_make_new, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &terminalio_terminal_stream_p, + .locals_dict = (mp_obj_dict_t*)&terminalio_terminal_locals_dict, +}; diff --git a/shared-bindings/terminalio/Terminal.h b/shared-bindings/terminalio/Terminal.h new file mode 100644 index 0000000000000..7ae0bf1b032f7 --- /dev/null +++ b/shared-bindings/terminalio/Terminal.h @@ -0,0 +1,45 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO_TERMINAL_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO_TERMINAL_H + +#include "shared-module/terminalio/Terminal.h" + +#include "shared-bindings/displayio/TileGrid.h" + +extern const mp_obj_type_t terminalio_terminal_type; + +extern void common_hal_terminalio_terminal_construct(terminalio_terminal_obj_t *self, + displayio_tilegrid_t* tilegrid, const fontio_builtinfont_t* font); + +// Write characters. len is in characters NOT bytes! +extern size_t common_hal_terminalio_terminal_write(terminalio_terminal_obj_t *self, + const uint8_t *data, size_t len, int *errcode); + +extern bool common_hal_terminalio_terminal_ready_to_tx(terminalio_terminal_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO_TERMINAL_H diff --git a/shared-bindings/terminalio/__init__.c b/shared-bindings/terminalio/__init__.c new file mode 100644 index 0000000000000..a9fe20f30b323 --- /dev/null +++ b/shared-bindings/terminalio/__init__.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/terminalio/__init__.h" +#include "shared-bindings/terminalio/Terminal.h" +#include "supervisor/shared/display.h" + +#include "py/runtime.h" + +//| :mod:`terminalio` --- Displays text in a TileGrid +//| ================================================= +//| +//| .. module:: terminalio +//| :synopsis: Displays text in a TileGrid +//| +//| The `terminalio` module contains classes to display a character stream on a display. The built +//| in font is available as ``terminalio.FONT``. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| Terminal +//| +//| +STATIC const mp_rom_map_elem_t terminalio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_terminalio) }, + { MP_ROM_QSTR(MP_QSTR_Terminal), MP_OBJ_FROM_PTR(&terminalio_terminal_type) }, + { MP_ROM_QSTR(MP_QSTR_FONT), MP_ROM_PTR(&supervisor_terminal_font) }, +}; + + +STATIC MP_DEFINE_CONST_DICT(terminalio_module_globals, terminalio_module_globals_table); + +const mp_obj_module_t terminalio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&terminalio_module_globals, +}; diff --git a/shared-bindings/terminalio/__init__.h b/shared-bindings/terminalio/__init__.h new file mode 100644 index 0000000000000..4be14dfc64601 --- /dev/null +++ b/shared-bindings/terminalio/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO___INIT___H + +// Nothing now. + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_TERMINALIO___INIT___H diff --git a/shared-bindings/time/__init__.c b/shared-bindings/time/__init__.c index 6956cc4e65a28..8d7f2f3fd28cd 100644 --- a/shared-bindings/time/__init__.c +++ b/shared-bindings/time/__init__.c @@ -30,7 +30,11 @@ #include "py/obj.h" #include "py/objnamedtuple.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" #include "shared-bindings/time/__init__.h" +#include "supervisor/shared/translate.h" //| :mod:`time` --- time and timing related functions //| ======================================================== @@ -43,7 +47,7 @@ //| written in MicroPython will work in CPython but not necessarily the other //| way around. //| -//| .. method:: monotonic() +//| .. function:: monotonic() //| //| Returns an always increasing value of time with an unknown reference //| point. Only use it to compare against other values from `monotonic`. @@ -58,7 +62,7 @@ STATIC mp_obj_t time_monotonic(void) { } MP_DEFINE_CONST_FUN_OBJ_0(time_monotonic_obj, time_monotonic); -//| .. method:: sleep(seconds) +//| .. function:: sleep(seconds) //| //| Sleep for a given number of seconds. //| @@ -66,44 +70,48 @@ MP_DEFINE_CONST_FUN_OBJ_0(time_monotonic_obj, time_monotonic); //| STATIC mp_obj_t time_sleep(mp_obj_t seconds_o) { #if MICROPY_PY_BUILTINS_FLOAT - float seconds = mp_obj_get_float(seconds_o); + mp_float_t seconds = mp_obj_get_float(seconds_o); + mp_float_t msecs = 1000.0f * seconds + 0.5f; #else - int seconds = mp_obj_get_int(seconds_o); + mp_int_t seconds = mp_obj_get_int(seconds_o); + mp_int_t msecs = 1000 * seconds; #endif if (seconds < 0) { - mp_raise_ValueError("sleep length must be non-negative"); + mp_raise_ValueError(translate("sleep length must be non-negative")); } - common_hal_time_delay_ms(1000 * seconds); + common_hal_time_delay_ms(msecs); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_1(time_sleep_obj, time_sleep); #if MICROPY_PY_COLLECTIONS -mp_obj_t struct_time_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - if (n_args != 1) { - mp_raise_TypeError("time.struct_time() takes exactly 1 argument"); +mp_obj_t struct_time_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + if (n_args != 1 || (kw_args != NULL && kw_args->used > 0)) { + return namedtuple_make_new(type, n_args, args, kw_args); } - if (!MP_OBJ_IS_TYPE(args[0], &mp_type_tuple) || ((mp_obj_tuple_t*) MP_OBJ_TO_PTR(args[0]))->len != 9) { - mp_raise_TypeError("time.struct_time() takes a 9-sequence"); + if (mp_obj_get_type(args[0])->getiter != mp_obj_tuple_getiter || ((mp_obj_tuple_t*) MP_OBJ_TO_PTR(args[0]))->len != 9) { + mp_raise_TypeError(translate("time.struct_time() takes a 9-sequence")); } mp_obj_tuple_t* tuple = MP_OBJ_TO_PTR(args[0]); - return namedtuple_make_new(type, 9, 0, tuple->items); + return namedtuple_make_new(type, 9, tuple->items, NULL); } -//| .. class:: struct_time((tm_year, tm_mon, tm_mday, tm_hour, tm_min, tm_sec, tm_wday, tm_yday, tm_isdst)) +//| .. class:: struct_time(time_tuple) //| //| Structure used to capture a date and time. Note that it takes a tuple! //| -//| :param int tm_year: the year, 2017 for example -//| :param int tm_mon: the month, range [1, 12] -//| :param int tm_mday: the day of the month, range [1, 31] -//| :param int tm_hour: the hour, range [0, 23] -//| :param int tm_min: the minute, range [0, 59] -//| :param int tm_sec: the second, range [0, 61] -//| :param int tm_wday: the day of the week, range [0, 6], Monday is 0 -//| :param int tm_yday: the day of the year, range [1, 366], -1 indicates not known -//| :param int tm_isdst: 1 when in daylight savings, 0 when not, -1 if unknown. +//| :param tuple time_tuple: Tuple of time info: ``(tm_year, tm_mon, tm_mday, tm_hour, tm_min, tm_sec, tm_wday, tm_yday, tm_isdst)`` +//| +//| * ``tm_year``: the year, 2017 for example +//| * ``tm_month``: the month, range [1, 12] +//| * ``tm_mday``: the day of the month, range [1, 31] +//| * ``tm_hour``: the hour, range [0, 23] +//| * ``tm_minute``: the minute, range [0, 59] +//| * ``tm_sec``: the second, range [0, 61] +//| * ``tm_wday``: the day of the week, range [0, 6], Monday is 0 +//| * ``tm_yday``: the day of the year, range [1, 366], -1 indicates not known +//| * ``tm_isdst``: 1 when in daylight savings, 0 when not, -1 if unknown. //| const mp_obj_namedtuple_type_t struct_time_type_obj = { .base = { @@ -133,7 +141,155 @@ const mp_obj_namedtuple_type_t struct_time_type_obj = { MP_QSTR_tm_isdst }, }; -#endif + +mp_obj_t struct_time_from_tm(timeutils_struct_time_t *tm) { + timeutils_struct_time_t tmp; + mp_uint_t secs = timeutils_seconds_since_epoch(tm->tm_year, tm->tm_mon, tm->tm_mday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + timeutils_seconds_since_epoch_to_struct_time(secs, &tmp); + tm->tm_wday = tmp.tm_wday; + tm->tm_yday = tmp.tm_yday; + + mp_obj_t elems[9] = { + mp_obj_new_int(tm->tm_year), + mp_obj_new_int(tm->tm_mon), + mp_obj_new_int(tm->tm_mday), + mp_obj_new_int(tm->tm_hour), + mp_obj_new_int(tm->tm_min), + mp_obj_new_int(tm->tm_sec), + mp_obj_new_int(tm->tm_wday), + mp_obj_new_int(tm->tm_yday), + mp_obj_new_int(-1), // tm_isdst is not supported + }; + + return namedtuple_make_new((const mp_obj_type_t*)&struct_time_type_obj, 9, elems, NULL); +}; + +void struct_time_to_tm(mp_obj_t t, timeutils_struct_time_t *tm) { + mp_obj_t *elems; + size_t len; + + if (!MP_OBJ_IS_TYPE(t, &mp_type_tuple) && !MP_OBJ_IS_TYPE(t, MP_OBJ_FROM_PTR(&struct_time_type_obj))) { + mp_raise_TypeError(translate("Tuple or struct_time argument required")); + } + + mp_obj_tuple_get(t, &len, &elems); + if (len != 9) { + mp_raise_TypeError(translate("function takes exactly 9 arguments")); + } + + tm->tm_year = mp_obj_get_int(elems[0]); + tm->tm_mon = mp_obj_get_int(elems[1]); + tm->tm_mday = mp_obj_get_int(elems[2]); + tm->tm_hour = mp_obj_get_int(elems[3]); + tm->tm_min = mp_obj_get_int(elems[4]); + tm->tm_sec = mp_obj_get_int(elems[5]); + tm->tm_wday = mp_obj_get_int(elems[6]); + tm->tm_yday = mp_obj_get_int(elems[7]); + // elems[8] tm_isdst is not supported +} + +#if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE +mp_obj_t MP_WEAK rtc_get_time_source_time(void) { + mp_raise_RuntimeError(translate("RTC is not supported on this board")); +} + +//| .. function:: time() +//| +//| Return the current time in seconds since since Jan 1, 1970. +//| +//| :return: the current time +//| :rtype: int +//| +STATIC mp_obj_t time_time(void) { + timeutils_struct_time_t tm; + struct_time_to_tm(rtc_get_time_source_time(), &tm); + mp_uint_t secs = timeutils_seconds_since_epoch(tm.tm_year, tm.tm_mon, tm.tm_mday, + tm.tm_hour, tm.tm_min, tm.tm_sec); + return mp_obj_new_int_from_uint(secs); +} +MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); + +//| .. function:: monotonic_ns() +//| +//| Return the time of the specified clock clk_id in nanoseconds. +//| +//| :return: the current time +//| :rtype: int +//| +STATIC mp_obj_t time_monotonic_ns(void) { + uint64_t time64 = common_hal_time_monotonic_ns(); + return mp_obj_new_int_from_ll((long long) time64); +} +MP_DEFINE_CONST_FUN_OBJ_0(time_monotonic_ns_obj, time_monotonic_ns); + +//| .. function:: localtime([secs]) +//| +//| Convert a time expressed in seconds since Jan 1, 1970 to a struct_time in +//| local time. If secs is not provided or None, the current time as returned +//| by time() is used. +//| The earliest date for which it can generate a time is Jan 1, 2000. +//| +//| :return: the current time +//| :rtype: time.struct_time +//| +STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { + if (n_args == 0 || args[0] == mp_const_none) { + return rtc_get_time_source_time(); + } + + mp_obj_t arg = args[0]; + if (mp_obj_is_float(arg)) { + arg = mp_obj_new_int_from_float(mp_obj_get_float(arg)); + } + + mp_int_t secs = mp_obj_get_int(arg); + + if (secs < EPOCH1970_EPOCH2000_DIFF_SECS) { + mp_raise_msg(&mp_type_OverflowError, translate("timestamp out of range for platform time_t")); + } + + timeutils_struct_time_t tm; + timeutils_seconds_since_epoch_to_struct_time(secs, &tm); + + return struct_time_from_tm(&tm); +} +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(time_localtime_obj, 0, 1, time_localtime); + +//| .. function:: mktime(t) +//| +//| This is the inverse function of localtime(). Its argument is the +//| struct_time or full 9-tuple (since the dst flag is needed; use -1 as the +//| dst flag if it is unknown) which expresses the time in local time, not UTC. +//| The earliest date for which it can generate a time is Jan 1, 2000. +//| +//| :return: seconds +//| :rtype: int +//| +STATIC mp_obj_t time_mktime(mp_obj_t t) { + mp_obj_t *elem; + size_t len; + + if (!MP_OBJ_IS_TYPE(t, &mp_type_tuple) && !MP_OBJ_IS_TYPE(t, MP_OBJ_FROM_PTR(&struct_time_type_obj))) { + mp_raise_TypeError(translate("Tuple or struct_time argument required")); + } + + mp_obj_tuple_get(t, &len, &elem); + if (len != 9) { + mp_raise_TypeError(translate("function takes exactly 9 arguments")); + } + + if (mp_obj_get_int(elem[0]) < 2000) { + mp_raise_msg(&mp_type_OverflowError, translate("timestamp out of range for platform time_t")); + } + + mp_uint_t secs = timeutils_mktime(mp_obj_get_int(elem[0]), mp_obj_get_int(elem[1]), mp_obj_get_int(elem[2]), + mp_obj_get_int(elem[3]), mp_obj_get_int(elem[4]), mp_obj_get_int(elem[5])); + return mp_obj_new_int_from_uint(secs); +} +MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); +#endif // MICROPY_LONGINT_IMPL +#endif // MICROPY_PY_COLLECTIONS STATIC const mp_rom_map_elem_t time_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_time) }, @@ -142,6 +298,14 @@ STATIC const mp_rom_map_elem_t time_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&time_sleep_obj) }, #if MICROPY_PY_COLLECTIONS { MP_ROM_QSTR(MP_QSTR_struct_time), MP_ROM_PTR(&struct_time_type_obj) }, + #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE + { MP_ROM_QSTR(MP_QSTR_localtime), MP_ROM_PTR(&time_localtime_obj) }, + { MP_ROM_QSTR(MP_QSTR_mktime), MP_ROM_PTR(&time_mktime_obj) }, + #endif // MICROPY_LONGINT_IMPL + #endif // MICROPY_PY_COLLECTIONS + #if MICROPY_LONGINT_IMPL != MICROPY_LONGINT_IMPL_NONE + { MP_ROM_QSTR(MP_QSTR_time), MP_ROM_PTR(&time_time_obj) }, + { MP_ROM_QSTR(MP_QSTR_monotonic_ns), MP_ROM_PTR(&time_monotonic_ns_obj) }, #endif }; diff --git a/shared-bindings/time/__init__.h b/shared-bindings/time/__init__.h index f6ecb5989cf25..ec96aea24f479 100644 --- a/shared-bindings/time/__init__.h +++ b/shared-bindings/time/__init__.h @@ -30,7 +30,13 @@ #include #include +#include "lib/timeutils/timeutils.h" + +extern mp_obj_t struct_time_from_tm(timeutils_struct_time_t *tm); +extern void struct_time_to_tm(mp_obj_t t, timeutils_struct_time_t *tm); + extern uint64_t common_hal_time_monotonic(void); +extern uint64_t common_hal_time_monotonic_ns(void); extern void common_hal_time_delay_ms(uint32_t); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_TIME___INIT___H diff --git a/shared-bindings/touchio/TouchIn.c b/shared-bindings/touchio/TouchIn.c index 710260faf31ea..db53ec1bc8abc 100644 --- a/shared-bindings/touchio/TouchIn.c +++ b/shared-bindings/touchio/TouchIn.c @@ -36,6 +36,7 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/touchio/TouchIn.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" //| .. currentmodule:: touchio //| @@ -60,17 +61,15 @@ //| :param ~microcontroller.Pin pin: the pin to read from //| STATIC mp_obj_t touchio_touchin_make_new(const mp_obj_type_t *type, - mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { + mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { // check number of arguments - mp_arg_check_num(n_args, n_kw, 1, 1, false); + mp_arg_check_num(n_args, kw_args, 1, 1, false); // 1st argument is the pin - mp_obj_t pin_obj = args[0]; - assert_pin(pin_obj, false); + const mcu_pin_obj_t *pin = validate_obj_is_free_pin(args[0]); touchio_touchin_obj_t *self = m_new_obj(touchio_touchin_obj_t); self->base.type = &touchio_touchin_type; - const mcu_pin_obj_t *pin = MP_OBJ_TO_PTR(pin_obj); common_hal_touchio_touchin_construct(self, pin); return (mp_obj_t) self; @@ -87,6 +86,12 @@ STATIC mp_obj_t touchio_touchin_deinit(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(touchio_touchin_deinit_obj, touchio_touchin_deinit); +STATIC void check_for_deinit(touchio_touchin_obj_t *self) { + if (common_hal_touchio_touchin_deinited(self)) { + raise_deinited_error(); + } +} + //| .. method:: __enter__() //| //| No-op used by Context Managers. @@ -113,7 +118,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(touchio_touchin___exit___obj, 4, 4, t //| STATIC mp_obj_t touchio_touchin_obj_get_value(mp_obj_t self_in) { touchio_touchin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_touchio_touchin_deinited(self)); + check_for_deinit(self); return mp_obj_new_bool(common_hal_touchio_touchin_get_value(self)); } MP_DEFINE_CONST_FUN_OBJ_1(touchio_touchin_get_value_obj, touchio_touchin_obj_get_value); @@ -132,7 +137,7 @@ const mp_obj_property_t touchio_touchin_value_obj = { //| STATIC mp_obj_t touchio_touchin_obj_get_raw_value(mp_obj_t self_in) { touchio_touchin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_touchio_touchin_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_touchio_touchin_get_raw_value(self)); } @@ -157,7 +162,7 @@ const mp_obj_property_t touchio_touchin_raw_value_obj = { //| STATIC mp_obj_t touchio_touchin_obj_get_threshold(mp_obj_t self_in) { touchio_touchin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_touchio_touchin_deinited(self)); + check_for_deinit(self); return MP_OBJ_NEW_SMALL_INT(common_hal_touchio_touchin_get_threshold(self)); } @@ -165,11 +170,11 @@ MP_DEFINE_CONST_FUN_OBJ_1(touchio_touchin_get_threshold_obj, touchio_touchin_obj STATIC mp_obj_t touchio_touchin_obj_set_threshold(mp_obj_t self_in, mp_obj_t threshold_obj) { touchio_touchin_obj_t *self = MP_OBJ_TO_PTR(self_in); - raise_error_if_deinited(common_hal_touchio_touchin_deinited(self)); + check_for_deinit(self); uint32_t new_threshold = mp_obj_get_int(threshold_obj); if (new_threshold < 0 || new_threshold > UINT16_MAX) { // I would use MP_STRINGIFY(UINT16_MAX), but that prints "0xffff" instead of 65536. - mp_raise_ValueError("threshold must be in the range 0-65536"); + mp_raise_ValueError(translate("threshold must be in the range 0-65536")); } common_hal_touchio_touchin_set_threshold(self, new_threshold); return mp_const_none; diff --git a/shared-bindings/touchio/TouchIn.h b/shared-bindings/touchio/TouchIn.h index 2e5c516079cca..e04e79c0b64d9 100644 --- a/shared-bindings/touchio/TouchIn.h +++ b/shared-bindings/touchio/TouchIn.h @@ -28,7 +28,12 @@ #define MICROPY_INCLUDED_SHARED_BINDINGS_TOUCHIO_TOUCHIN_H #include "common-hal/microcontroller/Pin.h" + +#if CIRCUITPY_TOUCHIO_USE_NATIVE #include "common-hal/touchio/TouchIn.h" +#else +#include "shared-module/touchio/TouchIn.h" +#endif extern const mp_obj_type_t touchio_touchin_type; diff --git a/shared-bindings/uheap/__init__.c b/shared-bindings/uheap/__init__.c index df18237accca1..0d699cd282649 100644 --- a/shared-bindings/uheap/__init__.c +++ b/shared-bindings/uheap/__init__.c @@ -38,7 +38,7 @@ //| :synopsis: Heap size analysis //| -//| .. method:: info(object) +//| .. function:: info(object) //| //| Prints memory debugging info for the given object and returns the //| estimated size. diff --git a/shared-bindings/ulab/__init__.rst b/shared-bindings/ulab/__init__.rst new file mode 100644 index 0000000000000..d8c10dcc8638b --- /dev/null +++ b/shared-bindings/ulab/__init__.rst @@ -0,0 +1,481 @@ + +:mod:`ulab` --- Manipulate numeric data similar to numpy +======================================================== + +.. module:: ulab + :synopsis: Manipulate numeric data similar to numpy + +`ulab` is a numpy-like module for micropython, meant to simplify and +speed up common mathematical operations on arrays. The primary goal was to +implement a small subset of numpy that might be useful in the context of a +microcontroller. This means low-level data processing of linear (array) and +two-dimensional (matrix) data. + +`ulab` is adapted from micropython-ulab, and the original project's +documentation can be found at +https://micropython-ulab.readthedocs.io/en/latest/ + +`ulab` is modeled after numpy, and aims to be a compatible subset where +possible. Numpy's documentation can be found at +https://docs.scipy.org/doc/numpy/index.html + +.. contents:: + +.. attribute:: __version__ + +The closest corresponding version of micropython-ulab + +ulab.array -- 1- and 2- dimensional array +----------------------------------------- + +.. class:: ulab.array(values, \*, dtype=float) + + :param sequence values: Sequence giving the initial content of the array. + :param dtype: The type of array values, ``int8``, ``uint8``, ``int16``, ``uint16``, or ``float`` + + The `values` sequence can either be another ~ulab.array, sequence of numbers + (in which case a 1-dimensional array is created), or a sequence where each + subsequence has the same length (in which case a 2-dimensional array is + created). + + Passing a ~ulab.array and a different dtype can be used to convert an array + from one dtype to another. + + In many cases, it is more convenient to create an array from a function + like `zeros` or `linspace`. + + `ulab.array` implements the buffer protocol, so it can be used in many + places an `array.array` can be used. + + .. attribute:: shape + + The size of the array, a tuple of length 1 or 2 + + .. attribute:: size + + The number of elements in the array + + .. attribute:: itemsize + + The number of elements in the array + + .. method:: flatten(\*, order='C') + + :param order: Whether to flatten by rows ('C') or columns ('F') + + Returns a new `ulab.array` object which is always 1 dimensional. + If order is 'C' (the default", then the data is ordered in rows; + If it is 'F', then the data is ordered in columns. "C" and "F" refer + to the typical storage organization of the C and Fortran languages. + + .. method:: sort(\*, axis=1) + + :param axis: Whether to sort elements within rows (0), columns (1), or elements (None) + + .. method:: transpose() + + Swap the rows and columns of a 2-dimensional array + + .. method:: __add__() + + Adds corresponding elements of the two arrays, or adds a number to all + elements of the array. A number must be on the right hand side. If + both arguments are arrays, their sizes must match. + + .. method:: __sub__() + + Subtracts corresponding elements of the two arrays, or subtracts a + number from all elements of the array. A number must be on the right + hand side. If both arguments are arrays, their sizes must match. + + .. method:: __mul__() + + Multiplies corresponding elements of the two arrays, or multiplies + all elements of the array by a number. A number must be on the right + hand side. If both arguments are arrays, their sizes must match. + + .. method:: __div__() + + Multiplies corresponding elements of the two arrays, or divides + all elements of the array by a number. A number must be on the right + hand side. If both arguments are arrays, their sizes must match. + + .. method:: __getitem__() + + Retrieve an element of the array. + + .. method:: __setitem__() + + Set an element of the array. + +Array type codes +---------------- +.. attribute:: int8 + + Type code for signed integers in the range -128 .. 127 inclusive, like the 'b' typecode of `array.array` + +.. attribute:: int16 + + Type code for signed integers in the range -32768 .. 32767 inclusive, like the 'h' typecode of `array.array` + +.. attribute:: float + + Type code for floating point values, like the 'f' typecode of `array.array` + +.. attribute:: uint8 + + Type code for unsigned integers in the range 0 .. 255 inclusive, like the 'H' typecode of `array.array` + +.. attribute:: uint16 + + Type code for unsigned integers in the range 0 .. 65535 inclusive, like the 'h' typecode of `array.array` + + +Basic Array defining functions +------------------------------ + +.. method:: ones(shape, \*, dtype=float) + + .. param: shape + Shape of the array, either an integer (for a 1-D array) or a tuple of 2 integers (for a 2-D array) + + .. param: dtype + Type of values in the array + + Return a new array of the given shape with all elements set to 1. + +.. method:: zeros + + .. param: shape + Shape of the array, either an integer (for a 1-D array) or a tuple of 2 integers (for a 2-D array) + + .. param: dtype + Type of values in the array + + Return a new array of the given shape with all elements set to 0. + + +.. method:: eye(size, \*, dtype=float) + + Return a new square array of size, with the diagonal elements set to 1 + and the other elements set to 0. + +.. method:: linspace(start, stop, \*, dtype=float, num=50, endpoint=True) + + .. param: start + + First value in the array + + .. param: stop + + Final value in the array + + .. param int: num + + Count of values in the array + + .. param: dtype + + Type of values in the array + + .. param bool: endpoint + + Whether the ``stop`` value is included. Note that even when + endpoint=True, the exact ``stop`` value may not be included due to the + inaccuracy of floating point arithmetic. + + Return a new 1-D array with ``num`` elements ranging from ``start`` to ``stop`` linearly. + + + +:mod:`ulab.vector` --- Element-by-element functions +=================================================== + +.. module:: ulab.vector + +These functions can operate on numbers, 1-D arrays, or 2-D arrays by +applying the function to every element in the array. This is typically +much more efficient than expressing the same operation as a Python loop. + +.. method:: acos + + Computes the inverse cosine function + +.. method:: acosh + + Computes the inverse hyperbolic cosine function + +.. method:: asin + + Computes the inverse sine function + +.. method:: asinh + + Computes the inverse hyperbolic sine function + +.. method:: around(a, \*, decimals) + + Returns a new float array in which each element is rounded to + ``decimals`` places. + +.. method:: atan + + Computes the inverse tangent function; the return values are in the + range [-pi/2,pi/2]. + +.. method:: atan2(y,x) + + Computes the inverse tangent function of y/x; the return values are in + the range [-pi, pi]. + +.. method:: atanh + + Computes the inverse hyperbolic tangent function + +.. method:: ceil + + Rounds numbers up to the next whole number + +.. method:: cos + + Computes the cosine function + +.. method:: erf + + Computes the error function, which has applications in statistics + +.. method:: erfc + + Computes the complementary error function, which has applications in statistics + +.. method:: exp + + Computes the exponent function. + +.. method:: expm1 + + Computes $e^x-1$. In certain applications, using this function preserves numeric accuracy better than the `exp` function. + +.. method:: floor + + Rounds numbers up to the next whole number + +.. method:: gamma + + Computes the gamma function + +.. method:: lgamma + + Computes the natural log of the gamma function + +.. method:: log + + Computes the natural log + +.. method:: log10 + + Computes the log base 10 + +.. method:: log2 + + Computes the log base 2 + +.. method:: sin + + Computes the sine + +.. method:: sinh + + Computes the hyperbolic sine + +.. method:: sqrt + + Computes the square root + +.. method:: tan + + Computes the tangent + +.. method:: tanh + + Computes the hyperbolic tangent + +:mod:`ulab.linalg` - Linear algebra functions +============================================= + +.. module:: ulab.linalg + +.. method:: cholesky(A) + + :param ~ulab.array A: a positive definite, symmetric square matrix + :return ~ulab.array L: a square root matrix in the lower triangular form + :raises ValueError: If the input does not fulfill the necessary conditions + + The returned matrix satisfies the equation m=LL* + +.. method:: det + + :param: m, a square matrix + :return float: The determinant of the matrix + + Computes the eigenvalues and eigenvectors of a square matrix + +.. method:: dot(m1, m2) + + :param ~ulab.array m1: a matrix + :param ~ulab.array m2: a matrix + + Computes the matrix product of two matrices + + **WARNING:** Unlike ``numpy``, this function cannot be used to compute the dot product of two vectors + +.. method:: eig(m) + + :param m: a square matrix + :return tuple (eigenvectors, eigenvalues): + + Computes the eigenvalues and eigenvectors of a square matrix + +.. method:: inv(m) + + :param ~ulab.array m: a square matrix + :return: The inverse of the matrix, if it exists + :raises ValueError: if the matrix is not invertible + + Computes the inverse of a square matrix + +.. method:: size(array) + + Return the total number of elements in the array, as an integer. + +:mod:`ulab.filter` --- Filtering functions +========================================== + +.. module:: ulab.filter + +.. method:: convolve(r, c=None) + + :param ulab.array a: + :param ulab.array v: + + Returns the discrete, linear convolution of two one-dimensional sequences. + The result is always an array of float. Only the ``full`` mode is supported, + and the ``mode`` named parameter of numpy is not accepted. Note that all other + modes can be had by slicing a ``full`` result. + + Convolution filters can implement high pass, low pass, band pass, etc., + filtering operations. Convolution filters are typically constructed ahead + of time. This can be done using desktop python with scipy, or on web pages + such as https://fiiir.com/ + + Convolution is most time-efficient when both inputs are of float type. + +:mod:`ulab.fft` --- Frequency-domain functions +============================================== + +.. module:: ulab.fft + +.. method:: fft(r, c=None) + + :param ulab.array r: A 1-dimension array of values whose size is a power of 2 + :param ulab.array c: An optional 1-dimension array of values whose size is a power of 2, giving the complex part of the value + :return tuple (r, c): The real and complex parts of the FFT + + Perform a Fast Fourier Transform from the time domain into the frequency domain + + See also ~ulab.extras.spectrum, which computes the magnitude of the fft, + rather than separately returning its real and imaginary parts. + +.. method:: ifft(r, c=None) + + :param ulab.array r: A 1-dimension array of values whose size is a power of 2 + :param ulab.array c: An optional 1-dimension array of values whose size is a power of 2, giving the complex part of the value + :return tuple (r, c): The real and complex parts of the inverse FFT + + Perform an Inverse Fast Fourier Transform from the frequeny domain into the time domain + +:mod:`ulab.numerical` --- Numerical and Statistical functions +============================================================= + +.. module:: ulab.numerical + +Most of these functions take an "axis" argument, which indicates whether to +operate over the flattened array (None), rows (0), or columns (1). + +.. method:: argmax(array, \*, axis=None) + + Return the index of the maximum element of the 1D array, as an array with 1 element + +.. method:: argmin(array, \*, axis=None) + + Return the index of the minimum element of the 1D array, as an array with 1 element + +.. method:: argsort(array, \*, axis=None) + + Returns an array which gives indices into the input array from least to greatest. + +.. method:: diff(array, \*, axis=1) + + Return the numerical derivative of successive elements of the array, as + an array. axis=None is not supported. + +.. method:: flip(array, \*, axis=None) + + Returns a new array that reverses the order of the elements along the + given axis, or along all axes if axis is None. + +.. method:: max(array, \*, axis=None) + + Return the maximum element of the 1D array, as an array with 1 element + +.. method:: mean(array, \*, axis=None) + + Return the mean element of the 1D array, as a number if axis is None, otherwise as an array. + +.. method:: min(array, \*, axis=None) + + Return the minimum element of the 1D array, as an array with 1 element + +.. method:: roll(array, distance, \*, axis=None) + + Shift the content of a vector by the positions given as the second + argument. If the ``axis`` keyword is supplied, the shift is applied to + the given axis. The array is modified in place. + +.. method:: std(array, \*, axis=None) + + Return the standard deviation of the array, as a number if axis is None, otherwise as an array. + +.. method:: sum(array, \*, axis=None) + + Return the sum of the array, as a number if axis is None, otherwise as an array. + +.. method:: sort(array, \*, axis=0) + + Sort the array along the given axis, or along all axes if axis is None. + The array is modified in place. + +:mod:`ulab.poly` --- Polynomial functions +========================================= + +.. module:: ulab.poly + +.. method:: polyfit([x, ] y, degree) + + Return a polynomial of given degree that approximates the function + f(x)=y. If x is not supplied, it is the range(len(y)). + +.. method:: polyval(p, x) + + Evaluate the polynomial p at the points x. x must be an array. + +:mod:`ulab.extras` --- Additional functions not in numpy +======================================================== + +.. method:: spectrum(r): + + :param ulab.array r: A 1-dimension array of values whose size is a power of 2 + + Computes the spectrum of the input signal. This is the absolute value of the (complex-valued) fft of the signal. + + This function is similar to scipy's ``scipy.signal.spectrogram``. diff --git a/shared-bindings/usb_hid/Device.c b/shared-bindings/usb_hid/Device.c index 21dbc7a2cb509..b1097fb24b6ac 100644 --- a/shared-bindings/usb_hid/Device.c +++ b/shared-bindings/usb_hid/Device.c @@ -45,11 +45,6 @@ //| //| Not currently dynamically supported. //| -STATIC mp_obj_t usb_hid_device_make_new(const mp_obj_type_t *type, - mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) { - return mp_const_none; -} - //| .. method:: send_report(buf) //| //| Send a HID report. @@ -114,6 +109,5 @@ STATIC MP_DEFINE_CONST_DICT(usb_hid_device_locals_dict, usb_hid_device_locals_di const mp_obj_type_t usb_hid_device_type = { { &mp_type_type }, .name = MP_QSTR_Device, - .make_new = usb_hid_device_make_new, .locals_dict = (mp_obj_t)&usb_hid_device_locals_dict, }; diff --git a/shared-bindings/usb_hid/Device.h b/shared-bindings/usb_hid/Device.h index 33b9f1c994272..cb9a64b5ea018 100644 --- a/shared-bindings/usb_hid/Device.h +++ b/shared-bindings/usb_hid/Device.h @@ -27,7 +27,7 @@ #ifndef MICROPY_INCLUDED_SHARED_BINDINGS_USB_HID_DEVICE_H #define MICROPY_INCLUDED_SHARED_BINDINGS_USB_HID_DEVICE_H -#include "common-hal/usb_hid/types.h" +#include "shared-module/usb_hid/Device.h" const mp_obj_type_t usb_hid_device_type; diff --git a/shared-bindings/usb_hid/__init__.h b/shared-bindings/usb_hid/__init__.h index ff478d08362d6..3d56fbfd024a7 100644 --- a/shared-bindings/usb_hid/__init__.h +++ b/shared-bindings/usb_hid/__init__.h @@ -30,8 +30,6 @@ #include #include -// TODO(tannewt): Make this a mp_obj_tuple_t when it is dynamically allocated. -// until then we hard code it to two entries so LTO is happy. -extern mp_obj_tuple2_t common_hal_usb_hid_devices; +extern mp_obj_tuple_t common_hal_usb_hid_devices; #endif // SHARED_BINDINGS_USB_HID_H diff --git a/shared-bindings/usb_midi/PortIn.c b/shared-bindings/usb_midi/PortIn.c new file mode 100644 index 0000000000000..e2df56e954830 --- /dev/null +++ b/shared-bindings/usb_midi/PortIn.c @@ -0,0 +1,124 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/usb_midi/PortIn.h" +#include "shared-bindings/util.h" + +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "supervisor/shared/translate.h" + + +//| .. currentmodule:: usb_midi +//| +//| :class:`PortIn` -- receives midi commands over USB +//| =================================================== +//| +//| .. class:: PortIn() +//| +//| You cannot create an instance of `usb_midi.PortIn`. +//| +//| PortIn objects are constructed for every corresponding entry in the USB +//| descriptor and added to the ``usb_midi.ports`` tuple. +//| + +// These are standard stream methods. Code is in py/stream.c. +// +//| .. method:: read(nbytes=None) +//| +//| Read characters. If ``nbytes`` is specified then read at most that many +//| bytes. Otherwise, read everything that arrives until the connection +//| times out. Providing the number of bytes expected is highly recommended +//| because it will be faster. +//| +//| :return: Data read +//| :rtype: bytes or None +//| +//| .. method:: readinto(buf, nbytes=None) +//| +//| Read bytes into the ``buf``. If ``nbytes`` is specified then read at most +//| that many bytes. Otherwise, read at most ``len(buf)`` bytes. +//| +//| :return: number of bytes read and stored into ``buf`` +//| :rtype: bytes or None +//| + +// These three methods are used by the shared stream methods. +STATIC mp_uint_t usb_midi_portin_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { + usb_midi_portin_obj_t *self = MP_OBJ_TO_PTR(self_in); + byte *buf = buf_in; + + // make sure we want at least 1 char + if (size == 0) { + return 0; + } + + return common_hal_usb_midi_portin_read(self, buf, size, errcode); +} + +STATIC mp_uint_t usb_midi_portin_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { + usb_midi_portin_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_uint_t ret; + if (request == MP_IOCTL_POLL) { + mp_uint_t flags = arg; + ret = 0; + if ((flags & MP_IOCTL_POLL_RD) && common_hal_usb_midi_portin_bytes_available(self) > 0) { + ret |= MP_IOCTL_POLL_RD; + } + } else { + *errcode = MP_EINVAL; + ret = MP_STREAM_ERROR; + } + return ret; +} + +STATIC const mp_rom_map_elem_t usb_midi_portin_locals_dict_table[] = { + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(usb_midi_portin_locals_dict, usb_midi_portin_locals_dict_table); + +STATIC const mp_stream_p_t usb_midi_portin_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = usb_midi_portin_read, + .write = NULL, + .ioctl = usb_midi_portin_ioctl, + .is_text = false, +}; + +const mp_obj_type_t usb_midi_portin_type = { + { &mp_type_type }, + .name = MP_QSTR_PortIn, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &usb_midi_portin_stream_p, + .locals_dict = (mp_obj_dict_t*)&usb_midi_portin_locals_dict, +}; diff --git a/shared-bindings/usb_midi/PortIn.h b/shared-bindings/usb_midi/PortIn.h new file mode 100644 index 0000000000000..58d017fa026a5 --- /dev/null +++ b/shared-bindings/usb_midi/PortIn.h @@ -0,0 +1,41 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTIN_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTIN_H + +#include "shared-module/usb_midi/PortIn.h" + +extern const mp_obj_type_t usb_midi_portin_type; + +// Read characters. +extern size_t common_hal_usb_midi_portin_read(usb_midi_portin_obj_t *self, + uint8_t *data, size_t len, int *errcode); + +extern uint32_t common_hal_usb_midi_portin_bytes_available(usb_midi_portin_obj_t *self); +extern void common_hal_usb_midi_portin_clear_buffer(usb_midi_portin_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTIN_H diff --git a/shared-bindings/usb_midi/PortOut.c b/shared-bindings/usb_midi/PortOut.c new file mode 100644 index 0000000000000..e3eddfaf57c33 --- /dev/null +++ b/shared-bindings/usb_midi/PortOut.c @@ -0,0 +1,106 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/usb_midi/PortOut.h" +#include "shared-bindings/util.h" + +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "supervisor/shared/translate.h" + + +//| .. currentmodule:: usb_midi +//| +//| :class:`PortOut` -- sends midi messages to a computer over USB +//| ============================================================== +//| +//| .. class:: PortOut() +//| +//| You cannot create an instance of `usb_midi.PortOut`. +//| +//| PortOut objects are constructed for every corresponding entry in the USB +//| descriptor and added to the ``usb_midi.ports`` tuple. +//| + +// These are standard stream methods. Code is in py/stream.c. +// +//| .. method:: write(buf) +//| +//| Write the buffer of bytes to the bus. +//| +//| :return: the number of bytes written +//| :rtype: int or None +//| + +STATIC mp_uint_t usb_midi_portout_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { + usb_midi_portout_obj_t *self = MP_OBJ_TO_PTR(self_in); + const byte *buf = buf_in; + + return common_hal_usb_midi_portout_write(self, buf, size, errcode); +} + +STATIC mp_uint_t usb_midi_portout_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { + usb_midi_portout_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_uint_t ret; + if (request == MP_IOCTL_POLL) { + mp_uint_t flags = arg; + ret = 0; + if ((flags & MP_IOCTL_POLL_WR) && common_hal_usb_midi_portout_ready_to_tx(self)) { + ret |= MP_IOCTL_POLL_WR; + } + } else { + *errcode = MP_EINVAL; + ret = MP_STREAM_ERROR; + } + return ret; +} + +STATIC const mp_rom_map_elem_t usb_midi_portout_locals_dict_table[] = { + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(usb_midi_portout_locals_dict, usb_midi_portout_locals_dict_table); + +STATIC const mp_stream_p_t usb_midi_portout_stream_p = { + MP_PROTO_IMPLEMENT(MP_QSTR_protocol_stream) + .read = NULL, + .write = usb_midi_portout_write, + .ioctl = usb_midi_portout_ioctl, + .is_text = false, +}; + +const mp_obj_type_t usb_midi_portout_type = { + { &mp_type_type }, + .name = MP_QSTR_PortOut, + .getiter = mp_identity_getiter, + .iternext = mp_stream_unbuffered_iter, + .protocol = &usb_midi_portout_stream_p, + .locals_dict = (mp_obj_dict_t*)&usb_midi_portout_locals_dict, +}; diff --git a/shared-bindings/usb_midi/PortOut.h b/shared-bindings/usb_midi/PortOut.h new file mode 100644 index 0000000000000..1eac2fa985dcb --- /dev/null +++ b/shared-bindings/usb_midi/PortOut.h @@ -0,0 +1,40 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTOUT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTOUT_H + +#include "shared-module/usb_midi/PortOut.h" + +extern const mp_obj_type_t usb_midi_portout_type; + +// Write characters. len is in characters NOT bytes! +extern size_t common_hal_usb_midi_portout_write(usb_midi_portout_obj_t *self, + const uint8_t *data, size_t len, int *errcode); + +extern bool common_hal_usb_midi_portout_ready_to_tx(usb_midi_portout_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI_PORTOUT_H diff --git a/shared-bindings/usb_midi/__init__.c b/shared-bindings/usb_midi/__init__.c new file mode 100644 index 0000000000000..f57d3631bc4e5 --- /dev/null +++ b/shared-bindings/usb_midi/__init__.c @@ -0,0 +1,78 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/usb_midi/__init__.h" +#include "shared-bindings/usb_midi/PortIn.h" +#include "shared-bindings/usb_midi/PortOut.h" + +#include "py/runtime.h" + +//| :mod:`usb_midi` --- MIDI over USB +//| ================================================= +//| +//| .. module:: usb_midi +//| :synopsis: MIDI over USB +//| +//| The `usb_midi` module contains classes to transmit and receive MIDI messages over USB +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| PortIn +//| PortOut +//| +//| +mp_map_elem_t usb_midi_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_usb_midi) }, + { MP_ROM_QSTR(MP_QSTR_ports), mp_const_empty_tuple }, + { MP_ROM_QSTR(MP_QSTR_PortIn), MP_OBJ_FROM_PTR(&usb_midi_portin_type) }, + { MP_ROM_QSTR(MP_QSTR_PortOut), MP_OBJ_FROM_PTR(&usb_midi_portout_type) }, +}; + +// This isn't const so we can set ports dynamically. +mp_obj_dict_t usb_midi_module_globals = { + .base = {&mp_type_dict}, + .map = { + .all_keys_are_qstrs = 1, + .is_fixed = 1, + .is_ordered = 1, + .used = MP_ARRAY_SIZE(usb_midi_module_globals_table), + .alloc = MP_ARRAY_SIZE(usb_midi_module_globals_table), + .table = usb_midi_module_globals_table, + }, +}; + +const mp_obj_module_t usb_midi_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&usb_midi_module_globals, +}; diff --git a/shared-bindings/usb_midi/__init__.h b/shared-bindings/usb_midi/__init__.h new file mode 100644 index 0000000000000..e81818e04cb7a --- /dev/null +++ b/shared-bindings/usb_midi/__init__.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI___INIT___H +#define MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI___INIT___H + +#include "py/obj.h" + +extern mp_obj_dict_t usb_midi_module_globals; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_USB_MIDI___INIT___H diff --git a/shared-bindings/ustack/__init__.c b/shared-bindings/ustack/__init__.c index c4391c1323370..08b772e41eb6f 100644 --- a/shared-bindings/ustack/__init__.c +++ b/shared-bindings/ustack/__init__.c @@ -39,7 +39,7 @@ //| #if MICROPY_MAX_STACK_USAGE -//| .. method:: max_stack_usage() +//| .. function:: max_stack_usage() //| //| Return the maximum excursion of the stack so far. //| @@ -50,7 +50,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_0(max_stack_usage_obj, max_stack_usage); #endif // MICROPY_MAX_STACK_USAGE -//| .. method:: stack_size() +//| .. function:: stack_size() //| //| Return the size of the entire stack. //| Same as in micropython.mem_info(), but returns a value instead @@ -61,7 +61,7 @@ STATIC mp_obj_t stack_size(void) { } STATIC MP_DEFINE_CONST_FUN_OBJ_0(stack_size_obj, stack_size); -//| .. method:: stack_usage() +//| .. function:: stack_usage() //| //| Return how much stack is currently in use. //| Same as micropython.stack_use(); duplicated here for convenience. diff --git a/shared-bindings/util.c b/shared-bindings/util.c index 3dadc4c189f7c..c1ca01e0ad4f6 100644 --- a/shared-bindings/util.c +++ b/shared-bindings/util.c @@ -30,12 +30,11 @@ #include "py/runtime.h" #include "shared-bindings/util.h" +#include "supervisor/shared/translate.h" -// Check if pin is None. If so, deinit() has already been called on the object, so complain. -void raise_error_if_deinited(bool deinited) { - if (deinited) { - mp_raise_ValueError("Object has been deinitialized and can no longer be used. Create a new object."); - } +// If so, deinit() has already been called on the object, so complain. +void raise_deinited_error(void) { + mp_raise_ValueError(translate("Object has been deinitialized and can no longer be used. Create a new object.")); } diff --git a/shared-bindings/util.h b/shared-bindings/util.h index b26ed7e9370a4..33454f10ef7d9 100644 --- a/shared-bindings/util.h +++ b/shared-bindings/util.h @@ -27,7 +27,7 @@ #ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_UTIL_H #define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_UTIL_H -void raise_error_if_deinited(bool deinited); +void raise_deinited_error(void); #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_UTIL_H diff --git a/shared-bindings/wiznet/__init__.c b/shared-bindings/wiznet/__init__.c new file mode 100644 index 0000000000000..e230deeccc2d8 --- /dev/null +++ b/shared-bindings/wiznet/__init__.c @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/objlist.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/mphal.h" + +#include "shared-module/network/__init__.h" + +//| :mod:`wiznet` --- Support for WizNet hardware +//| ============================================= +//| +//| .. module:: wiznet +//| :synopsis: Support for WizNet hardware +//| :platform: SAMD +//| +//| Support for WizNet hardware, including the WizNet 5500 Ethernet adaptor. +//| +//| Libraries +//| +//| .. toctree:: +//| :maxdepth: 3 +//| +//| wiznet5k +//| + +extern const mod_network_nic_type_t mod_network_nic_type_wiznet5k; + +STATIC const mp_rom_map_elem_t mp_module_wiznet_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_wiznet) }, +#ifdef MICROPY_PY_WIZNET5K + { MP_ROM_QSTR(MP_QSTR_WIZNET5K), MP_ROM_PTR(&mod_network_nic_type_wiznet5k) }, +#endif // MICROPY_PY_WIZNET5K +}; +STATIC MP_DEFINE_CONST_DICT(mp_module_wiznet_globals, mp_module_wiznet_globals_table); + +const mp_obj_module_t wiznet_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&mp_module_wiznet_globals, +}; + diff --git a/shared-bindings/wiznet/wiznet5k.c b/shared-bindings/wiznet/wiznet5k.c new file mode 100644 index 0000000000000..786978bfe80ec --- /dev/null +++ b/shared-bindings/wiznet/wiznet5k.c @@ -0,0 +1,210 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/objlist.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "py/mperrno.h" +#include "py/mphal.h" +#include "lib/netutils/netutils.h" + +#if MICROPY_PY_WIZNET5K + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/DriveMode.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/microcontroller/Pin.h" + +#include "shared-module/network/__init__.h" +#include "shared-module/wiznet/wiznet5k.h" + +//| .. currentmodule:: wiznet +//| +//| :class:`WIZNET5K` -- wrapper for Wiznet 5500 Ethernet interface +//| =============================================================== +//| +//| .. class:: WIZNET5K(spi, cs, rst, dhcp=True) +//| +//| Create a new WIZNET5500 interface using the specified pins +//| +//| :param ~busio.SPI spi: spi bus to use +//| :param ~microcontroller.Pin cs: pin to use for Chip Select +//| :param ~microcontroller.Pin rst: pin to use for Reset (optional) +//| :param bool dhcp: boolean flag, whether to start DHCP automatically (optional, keyword only, default True) +//| +//| * The reset pin is optional: if supplied it is used to reset the +//| wiznet board before initialization. +//| * The SPI bus will be initialized appropriately by this library. +//| * At present, the WIZNET5K object is a singleton, so only one WizNet +//| interface is supported at a time. +//| + +STATIC mp_obj_t wiznet5k_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_spi, ARG_cs, ARG_rst, ARG_dhcp }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_spi, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_cs, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_rst, MP_ARG_OBJ, { .u_obj = mp_const_none } }, + { MP_QSTR_dhcp, MP_ARG_KW_ONLY | MP_ARG_BOOL, { .u_bool = true } }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + // TODO check type of ARG_spi? + const mcu_pin_obj_t *cs = validate_obj_is_free_pin(args[ARG_cs].u_obj); + const mcu_pin_obj_t *rst = validate_obj_is_free_pin_or_none(args[ARG_rst].u_obj); + + mp_obj_t ret = wiznet5k_create(args[ARG_spi].u_obj, cs, rst); + if (args[ARG_dhcp].u_bool) wiznet5k_start_dhcp(); + return ret; +} + +//| .. attribute:: connected +//| +//| (boolean, readonly) is this device physically connected? +//| + +STATIC mp_obj_t wiznet5k_connected_get_value(mp_obj_t self_in) { + (void)self_in; + return mp_obj_new_bool(wizphy_getphylink() == PHY_LINK_ON); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_connected_get_value_obj, wiznet5k_connected_get_value); + +const mp_obj_property_t wiznet5k_connected_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&wiznet5k_connected_get_value_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. attribute:: dhcp +//| +//| (boolean, readwrite) is DHCP active on this device? +//| +//| * set to True to activate DHCP, False to turn it off +//| + +STATIC mp_obj_t wiznet5k_dhcp_get_value(mp_obj_t self_in) { + (void)self_in; + return mp_obj_new_bool(wiznet5k_check_dhcp()); +} + +STATIC MP_DEFINE_CONST_FUN_OBJ_1(wiznet5k_dhcp_get_value_obj, wiznet5k_dhcp_get_value); + +STATIC mp_obj_t wiznet5k_dhcp_set_value(mp_obj_t self_in, mp_obj_t value) { + (void)self_in; + if (mp_obj_is_true(value)) { + int ret = wiznet5k_start_dhcp(); + if (ret) mp_raise_OSError(ret); + } else { + int ret = wiznet5k_stop_dhcp(); + if (ret) mp_raise_OSError(ret); + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(wiznet5k_dhcp_set_value_obj, wiznet5k_dhcp_set_value); + +const mp_obj_property_t wiznet5k_dhcp_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&wiznet5k_dhcp_get_value_obj, + (mp_obj_t)&wiznet5k_dhcp_set_value_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| .. method:: ifconfig(params=None) +//| +//| Called without parameters, returns a tuple of +//| (ip_address, subnet_mask, gateway_address, dns_server) +//| +//| Or can be called with the same tuple to set those parameters. +//| Setting ifconfig parameters turns DHCP off, if it was on. +//| + +STATIC mp_obj_t wiznet5k_ifconfig(size_t n_args, const mp_obj_t *args) { + wiz_NetInfo netinfo; + ctlnetwork(CN_GET_NETINFO, &netinfo); + if (n_args == 1) { + // get + mp_obj_t tuple[4] = { + netutils_format_ipv4_addr(netinfo.ip, NETUTILS_BIG), + netutils_format_ipv4_addr(netinfo.sn, NETUTILS_BIG), + netutils_format_ipv4_addr(netinfo.gw, NETUTILS_BIG), + netutils_format_ipv4_addr(netinfo.dns, NETUTILS_BIG), + }; + return mp_obj_new_tuple(4, tuple); + } else { + // set + wiznet5k_stop_dhcp(); + mp_obj_t *items; + mp_obj_get_array_fixed_n(args[1], 4, &items); + netutils_parse_ipv4_addr(items[0], netinfo.ip, NETUTILS_BIG); + netutils_parse_ipv4_addr(items[1], netinfo.sn, NETUTILS_BIG); + netutils_parse_ipv4_addr(items[2], netinfo.gw, NETUTILS_BIG); + netutils_parse_ipv4_addr(items[3], netinfo.dns, NETUTILS_BIG); + ctlnetwork(CN_SET_NETINFO, &netinfo); + return mp_const_none; + } +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(wiznet5k_ifconfig_obj, 1, 2, wiznet5k_ifconfig); + +STATIC const mp_rom_map_elem_t wiznet5k_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_ifconfig), MP_ROM_PTR(&wiznet5k_ifconfig_obj) }, + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&wiznet5k_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_dhcp), MP_ROM_PTR(&wiznet5k_dhcp_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(wiznet5k_locals_dict, wiznet5k_locals_dict_table); + +const mod_network_nic_type_t mod_network_nic_type_wiznet5k = { + .base = { + { &mp_type_type }, + .name = MP_QSTR_WIZNET5K, + .make_new = wiznet5k_make_new, + .locals_dict = (mp_obj_dict_t*)&wiznet5k_locals_dict, + }, + .gethostbyname = wiznet5k_gethostbyname, + .socket = wiznet5k_socket_socket, + .close = wiznet5k_socket_close, + .bind = wiznet5k_socket_bind, + .listen = wiznet5k_socket_listen, + .accept = wiznet5k_socket_accept, + .connect = wiznet5k_socket_connect, + .send = wiznet5k_socket_send, + .recv = wiznet5k_socket_recv, + .sendto = wiznet5k_socket_sendto, + .recvfrom = wiznet5k_socket_recvfrom, + .setsockopt = wiznet5k_socket_setsockopt, + .settimeout = wiznet5k_socket_settimeout, + .ioctl = wiznet5k_socket_ioctl, + .timer_tick = wiznet5k_socket_timer_tick, + .deinit = wiznet5k_socket_deinit, +}; + +#endif // MICROPY_PY_WIZNET5K diff --git a/shared-module/_bleio/Address.c b/shared-module/_bleio/Address.c new file mode 100644 index 0000000000000..8c8b043fec9fa --- /dev/null +++ b/shared-module/_bleio/Address.c @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objstr.h" +#include "shared-bindings/_bleio/Address.h" +#include "shared-module/_bleio/Address.h" + +void common_hal_bleio_address_construct(bleio_address_obj_t *self, uint8_t *bytes, uint8_t address_type) { + self->bytes = mp_obj_new_bytes(bytes, NUM_BLEIO_ADDRESS_BYTES); + self->type = address_type; +} + +mp_obj_t common_hal_bleio_address_get_address_bytes(bleio_address_obj_t *self) { + return self->bytes; +} + +uint8_t common_hal_bleio_address_get_type(bleio_address_obj_t *self) { + return self->type; +} diff --git a/shared-module/_bleio/Address.h b/shared-module/_bleio/Address.h new file mode 100644 index 0000000000000..39789842f7b6b --- /dev/null +++ b/shared-module/_bleio/Address.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ADDRESS_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ADDRESS_H + +#include "py/obj.h" + +#define NUM_BLEIO_ADDRESS_BYTES 6 + +typedef struct { + mp_obj_base_t base; + uint8_t type; + mp_obj_t bytes; // a bytes() object +} bleio_address_obj_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ADDRESS_H diff --git a/shared-module/_bleio/Attribute.c b/shared-module/_bleio/Attribute.c new file mode 100644 index 0000000000000..3acfcf1f53ece --- /dev/null +++ b/shared-module/_bleio/Attribute.c @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "shared-bindings/_bleio/Attribute.h" + +void common_hal_bleio_attribute_security_mode_check_valid(bleio_attribute_security_mode_t security_mode) { + switch (security_mode) { + case SECURITY_MODE_NO_ACCESS: + case SECURITY_MODE_OPEN: + case SECURITY_MODE_ENC_NO_MITM: + case SECURITY_MODE_ENC_WITH_MITM: + case SECURITY_MODE_LESC_ENC_WITH_MITM: + case SECURITY_MODE_SIGNED_NO_MITM: + case SECURITY_MODE_SIGNED_WITH_MITM: + break; + default: + mp_raise_ValueError(translate("Invalid security_mode")); + break; + } +} diff --git a/shared-module/_bleio/Attribute.h b/shared-module/_bleio/Attribute.h new file mode 100644 index 0000000000000..a498a14a51c40 --- /dev/null +++ b/shared-module/_bleio/Attribute.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ATTRIBUTE_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ATTRIBUTE_H + +// BLE security modes: 0x +typedef enum { + SECURITY_MODE_NO_ACCESS = 0x00, + SECURITY_MODE_OPEN = 0x11, + SECURITY_MODE_ENC_NO_MITM = 0x21, + SECURITY_MODE_ENC_WITH_MITM = 0x31, + SECURITY_MODE_LESC_ENC_WITH_MITM = 0x41, + SECURITY_MODE_SIGNED_NO_MITM = 0x12, + SECURITY_MODE_SIGNED_WITH_MITM = 0x22, +} bleio_attribute_security_mode_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_ATTRIBUTE_H diff --git a/shared-module/_bleio/Characteristic.h b/shared-module/_bleio/Characteristic.h new file mode 100644 index 0000000000000..409a57c76e16c --- /dev/null +++ b/shared-module/_bleio/Characteristic.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CHARACTERISTIC_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CHARACTERISTIC_H + +typedef enum { + CHAR_PROP_NONE = 0, + CHAR_PROP_BROADCAST = 1u << 0, + CHAR_PROP_INDICATE = 1u << 1, + CHAR_PROP_NOTIFY = 1u << 2, + CHAR_PROP_READ = 1u << 3, + CHAR_PROP_WRITE = 1u << 4, + CHAR_PROP_WRITE_NO_RESPONSE = 1u << 5, + CHAR_PROP_ALL = (CHAR_PROP_BROADCAST | CHAR_PROP_INDICATE | CHAR_PROP_NOTIFY | + CHAR_PROP_READ | CHAR_PROP_WRITE | CHAR_PROP_WRITE_NO_RESPONSE) +} bleio_characteristic_properties_enum_t; +typedef uint8_t bleio_characteristic_properties_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_CHARACTERISTIC_H diff --git a/shared-module/_bleio/ScanEntry.c b/shared-module/_bleio/ScanEntry.c new file mode 100644 index 0000000000000..785209c4ab5c0 --- /dev/null +++ b/shared-module/_bleio/ScanEntry.c @@ -0,0 +1,86 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/_bleio/Address.h" +#include "shared-module/_bleio/Address.h" +#include "shared-module/_bleio/ScanEntry.h" + +mp_obj_t common_hal_bleio_scanentry_get_address(bleio_scanentry_obj_t *self) { + return MP_OBJ_FROM_PTR(self->address); +} + +mp_obj_t common_hal_bleio_scanentry_get_advertisement_bytes(bleio_scanentry_obj_t *self) { + return MP_OBJ_FROM_PTR(self->data); +} + +mp_int_t common_hal_bleio_scanentry_get_rssi(bleio_scanentry_obj_t *self) { + return self->rssi; +} + +bool common_hal_bleio_scanentry_get_connectable(bleio_scanentry_obj_t *self) { + return self->connectable; +} + +bool common_hal_bleio_scanentry_get_scan_response(bleio_scanentry_obj_t *self) { + return self->scan_response; +} + +bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t* prefixes, size_t prefixes_length, bool any) { + if (prefixes_length == 0) { + return true; + } + size_t i = 0; + while(i < prefixes_length) { + uint8_t prefix_length = prefixes[i]; + i += 1; + size_t j = 0; + while (j < len) { + uint8_t structure_length = data[j]; + j += 1; + if (structure_length == 0) { + break; + } + if (structure_length >= prefix_length && memcmp(data + j, prefixes + i, prefix_length) == 0) { + if (any) { + return true; + } + } else if (!any) { + return false; + } + j += structure_length; + } + i += prefix_length; + } + return !any; +} + +bool common_hal_bleio_scanentry_matches(bleio_scanentry_obj_t *self, const uint8_t* prefixes, size_t prefixes_len, bool all) { + return bleio_scanentry_data_matches(self->data->data, self->data->len, prefixes, prefixes_len, !all); +} diff --git a/shared-module/_bleio/ScanEntry.h b/shared-module/_bleio/ScanEntry.h new file mode 100644 index 0000000000000..94361a397dd7e --- /dev/null +++ b/shared-module/_bleio/ScanEntry.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANENTRY_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANENTRY_H + +#include "py/obj.h" +#include "py/objstr.h" +#include "shared-bindings/_bleio/Address.h" + +typedef struct { + mp_obj_base_t base; + bool connectable; + bool scan_response; + int8_t rssi; + bleio_address_obj_t *address; + mp_obj_str_t *data; + uint64_t time_received; +} bleio_scanentry_obj_t; + +bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t* prefixes, size_t prefix_length, bool any); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANENTRY_H diff --git a/shared-module/_bleio/ScanResults.c b/shared-module/_bleio/ScanResults.c new file mode 100644 index 0000000000000..7ea0c165f4d0e --- /dev/null +++ b/shared-module/_bleio/ScanResults.c @@ -0,0 +1,139 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * Copyright (c) 2017 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "lib/utils/interrupt_char.h" +#include "py/objstr.h" +#include "py/runtime.h" +#include "shared-bindings/_bleio/ScanEntry.h" +#include "shared-bindings/_bleio/ScanResults.h" + +bleio_scanresults_obj_t* shared_module_bleio_new_scanresults(size_t buffer_size, uint8_t* prefixes, size_t prefixes_len, mp_int_t minimum_rssi) { + bleio_scanresults_obj_t* self = m_new_obj(bleio_scanresults_obj_t); + self->base.type = &bleio_scanresults_type; + ringbuf_alloc(&self->buf, buffer_size, false); + self->prefixes = prefixes; + self->prefix_length = prefixes_len; + self->minimum_rssi = minimum_rssi; + return self; +} + +mp_obj_t common_hal_bleio_scanresults_next(bleio_scanresults_obj_t *self) { + while (ringbuf_count(&self->buf) == 0 && !self->done && !mp_hal_is_interrupted()) { + RUN_BACKGROUND_TASKS; + } + if (ringbuf_count(&self->buf) == 0 || mp_hal_is_interrupted()) { + return mp_const_none; + } + + // Create a ScanEntry out of the data on the buffer. + uint8_t type = ringbuf_get(&self->buf); + bool connectable = (type & (1 << 0)) != 0; + bool scan_response = (type & (1 << 1)) != 0; + uint64_t ticks_ms; + ringbuf_get_n(&self->buf, (uint8_t*) &ticks_ms, sizeof(ticks_ms)); + uint8_t rssi = ringbuf_get(&self->buf); + uint8_t peer_addr[NUM_BLEIO_ADDRESS_BYTES]; + ringbuf_get_n(&self->buf, peer_addr, sizeof(peer_addr)); + uint8_t addr_type = ringbuf_get(&self->buf); + uint16_t len; + ringbuf_get_n(&self->buf, (uint8_t*) &len, sizeof(len)); + + mp_obj_str_t *o = MP_OBJ_TO_PTR(mp_obj_new_bytes_of_zeros(len)); + ringbuf_get_n(&self->buf, (uint8_t*) o->data, len); + + bleio_scanentry_obj_t *entry = m_new_obj(bleio_scanentry_obj_t); + entry->base.type = &bleio_scanentry_type; + entry->rssi = rssi; + + bleio_address_obj_t *address = m_new_obj(bleio_address_obj_t); + address->base.type = &bleio_address_type; + common_hal_bleio_address_construct(MP_OBJ_TO_PTR(address), peer_addr, addr_type); + entry->address = address; + + entry->data = o; + entry->time_received = ticks_ms; + entry->connectable = connectable; + entry->scan_response = scan_response; + + return MP_OBJ_FROM_PTR(entry); +} + + +void shared_module_bleio_scanresults_append(bleio_scanresults_obj_t* self, + uint64_t ticks_ms, + bool connectable, + bool scan_response, + int8_t rssi, + uint8_t *peer_addr, + uint8_t addr_type, + uint8_t *data, + uint16_t len) { + int32_t packet_size = sizeof(uint8_t) + sizeof(ticks_ms) + sizeof(rssi) + NUM_BLEIO_ADDRESS_BYTES + + sizeof(addr_type) + sizeof(len) + len; + int32_t empty_space = self->buf.size - ringbuf_count(&self->buf); + if (packet_size >= empty_space) { + // We can't fit the packet so skip it. + return; + } + // Filter the packet. + if (rssi < self->minimum_rssi) { + return; + } + + // If any prefixes are provided, then only include packets that include at least one of them. + if (!bleio_scanentry_data_matches(data, len, self->prefixes, self->prefix_length, true)) { + return; + } + uint8_t type = 0; + if (connectable) { + type |= 1 << 0; + } + if (scan_response) { + type |= 1 << 1; + } + + // Add the packet to the buffer. + ringbuf_put(&self->buf, type); + ringbuf_put_n(&self->buf, (uint8_t*) &ticks_ms, sizeof(ticks_ms)); + ringbuf_put(&self->buf, rssi); + ringbuf_put_n(&self->buf, peer_addr, NUM_BLEIO_ADDRESS_BYTES); + ringbuf_put(&self->buf, addr_type); + ringbuf_put_n(&self->buf, (uint8_t*) &len, sizeof(len)); + ringbuf_put_n(&self->buf, data, len); +} + +bool shared_module_bleio_scanresults_get_done(bleio_scanresults_obj_t* self) { + return self->done; +} + +void shared_module_bleio_scanresults_set_done(bleio_scanresults_obj_t* self, bool done) { + self->done = done; + self->common_hal_data = NULL; +} diff --git a/shared-module/_bleio/ScanResults.h b/shared-module/_bleio/ScanResults.h new file mode 100644 index 0000000000000..8912357a977e0 --- /dev/null +++ b/shared-module/_bleio/ScanResults.h @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2018 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H +#define MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H + +#include + +#include "py/obj.h" +#include "py/ringbuf.h" + +typedef struct { + mp_obj_base_t base; + // Pointers that needs to live until the scan is done. + void* common_hal_data; + ringbuf_t buf; + // Prefixes is a length encoded array of prefixes. + uint8_t* prefixes; + size_t prefix_length; + mp_int_t minimum_rssi; + bool active; + bool done; +} bleio_scanresults_obj_t; + +bleio_scanresults_obj_t* shared_module_bleio_new_scanresults(size_t buffer_size, uint8_t* prefixes, size_t prefixes_len, mp_int_t minimum_rssi); + +bool shared_module_bleio_scanresults_get_done(bleio_scanresults_obj_t* self); +void shared_module_bleio_scanresults_set_done(bleio_scanresults_obj_t* self, bool done); + +void shared_module_bleio_scanresults_append(bleio_scanresults_obj_t* self, + uint64_t ticks_ms, + bool connectable, + bool scan_result, + int8_t rssi, + uint8_t *peer_addr, + uint8_t addr_type, + uint8_t* data, + uint16_t len); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BLEIO_SCANRESULTS_H diff --git a/shared-module/_eve/__init__.c b/shared-module/_eve/__init__.c new file mode 100644 index 0000000000000..2c93eb69f7034 --- /dev/null +++ b/shared-module/_eve/__init__.c @@ -0,0 +1,317 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 James Bowman for Excamera Labs + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include "py/runtime.h" +#include "shared-module/_eve/__init__.h" + +STATIC void write(common_hal__eve_t *eve, size_t len, void *buf) { + eve->dest[2] = mp_obj_new_bytearray_by_ref(len, buf); + mp_call_method_n_kw(1, 0, eve->dest); +} + +void common_hal__eve_flush(common_hal__eve_t *eve) { + if (eve->n != 0) { + write(eve, eve->n, eve->buf); + eve->n = 0; + } +} + +static void *append(common_hal__eve_t *eve, size_t m) { + if ((eve->n + m) > sizeof(eve->buf)) + common_hal__eve_flush(eve); + uint8_t *r = eve->buf + eve->n; + eve->n += m; + return (void*)r; +} + +void common_hal__eve_add(common_hal__eve_t *eve, size_t len, void *buf) { + if (len <= sizeof(eve->buf)) { + uint8_t *p = (uint8_t*)append(eve, len); + // memcpy(p, buffer_info.buf, buffer_info.len); + uint8_t *s = buf; for (size_t i = 0; i < len; i++) *p++ = *s++; + } else { + common_hal__eve_flush(eve); + write(eve, len, buf); + } +} + +#define C4(eve, u) (*(uint32_t*)append((eve), sizeof(uint32_t)) = (u)) + +void common_hal__eve_Vertex2f(common_hal__eve_t *eve, mp_float_t x, mp_float_t y) { + int16_t ix = (int)(eve->vscale * x); + int16_t iy = (int)(eve->vscale * y); + C4(eve, (1 << 30) | ((ix & 32767) << 15) | (iy & 32767)); +} + +void common_hal__eve_VertexFormat(common_hal__eve_t *eve, uint32_t frac) +{ + C4(eve, ((27 << 24) | ((frac & 7)))); + eve->vscale = 1 << eve->vscale; +} + + + +void common_hal__eve_AlphaFunc(common_hal__eve_t *eve, uint32_t func, uint32_t ref) { + C4(eve, ((9 << 24) | ((func & 7) << 8) | ((ref & 255)))); +} + + +void common_hal__eve_Begin(common_hal__eve_t *eve, uint32_t prim) { + C4(eve, ((31 << 24) | ((prim & 15)))); +} + + +void common_hal__eve_BitmapExtFormat(common_hal__eve_t *eve, uint32_t fmt) { + C4(eve, ((46 << 24) | (fmt & 65535))); +} + + +void common_hal__eve_BitmapHandle(common_hal__eve_t *eve, uint32_t handle) { + C4(eve, ((5 << 24) | ((handle & 31)))); +} + + +void common_hal__eve_BitmapLayoutH(common_hal__eve_t *eve, uint32_t linestride, uint32_t height) { + C4(eve, ((40 << 24) | (((linestride) & 3) << 2) | (((height) & 3)))); +} + + +void common_hal__eve_BitmapLayout(common_hal__eve_t *eve, uint32_t format, uint32_t linestride, uint32_t height) { + C4(eve, ((7 << 24) | ((format & 31) << 19) | ((linestride & 1023) << 9) | ((height & 511)))); +} + + +void common_hal__eve_BitmapSizeH(common_hal__eve_t *eve, uint32_t width, uint32_t height) { + C4(eve, ((41 << 24) | (((width) & 3) << 2) | (((height) & 3)))); +} + + +void common_hal__eve_BitmapSize(common_hal__eve_t *eve, uint32_t filter, uint32_t wrapx, uint32_t wrapy, uint32_t width, uint32_t height) { + C4(eve, ((8 << 24) | ((filter & 1) << 20) | ((wrapx & 1) << 19) | ((wrapy & 1) << 18) | ((width & 511) << 9) | ((height & 511)))); +} + + +void common_hal__eve_BitmapSource(common_hal__eve_t *eve, uint32_t addr) { + C4(eve, ((1 << 24) | ((addr & 0xffffff)))); +} + + +void common_hal__eve_BitmapSwizzle(common_hal__eve_t *eve, uint32_t r, uint32_t g, uint32_t b, uint32_t a) { + C4(eve, ((47 << 24) | ((r & 7) << 9) | ((g & 7) << 6) | ((b & 7) << 3) | ((a & 7)))); +} + + +void common_hal__eve_BitmapTransformA(common_hal__eve_t *eve, uint32_t p, uint32_t v) { + C4(eve, ((21 << 24) | ((p & 1) << 17) | ((v & 131071)))); +} + + +void common_hal__eve_BitmapTransformB(common_hal__eve_t *eve, uint32_t p, uint32_t v) { + C4(eve, ((22 << 24) | ((p & 1) << 17) | ((v & 131071)))); +} + + +void common_hal__eve_BitmapTransformC(common_hal__eve_t *eve, uint32_t v) { + C4(eve, ((23 << 24) | ((v & 16777215)))); +} + + +void common_hal__eve_BitmapTransformD(common_hal__eve_t *eve, uint32_t p, uint32_t v) { + C4(eve, ((24 << 24) | ((p & 1) << 17) | ((v & 131071)))); +} + + +void common_hal__eve_BitmapTransformE(common_hal__eve_t *eve, uint32_t p, uint32_t v) { + C4(eve, ((25 << 24) | ((p & 1) << 17) | ((v & 131071)))); +} + + +void common_hal__eve_BitmapTransformF(common_hal__eve_t *eve, uint32_t v) { + C4(eve, ((26 << 24) | ((v & 16777215)))); +} + + +void common_hal__eve_BlendFunc(common_hal__eve_t *eve, uint32_t src, uint32_t dst) { + C4(eve, ((11 << 24) | ((src & 7) << 3) | ((dst & 7)))); +} + + +void common_hal__eve_Call(common_hal__eve_t *eve, uint32_t dest) { + C4(eve, ((29 << 24) | ((dest & 65535)))); +} + + +void common_hal__eve_Cell(common_hal__eve_t *eve, uint32_t cell) { + C4(eve, ((6 << 24) | ((cell & 127)))); +} + + +void common_hal__eve_ClearColorA(common_hal__eve_t *eve, uint32_t alpha) { + C4(eve, ((15 << 24) | ((alpha & 255)))); +} + + +void common_hal__eve_ClearColorRGB(common_hal__eve_t *eve, uint32_t red, uint32_t green, uint32_t blue) { + C4(eve, ((2 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255)))); +} + + +void common_hal__eve_Clear(common_hal__eve_t *eve, uint32_t c, uint32_t s, uint32_t t) { + C4(eve, ((38 << 24) | ((c & 1) << 2) | ((s & 1) << 1) | ((t & 1)))); +} + + +void common_hal__eve_ClearStencil(common_hal__eve_t *eve, uint32_t s) { + C4(eve, ((17 << 24) | ((s & 255)))); +} + + +void common_hal__eve_ClearTag(common_hal__eve_t *eve, uint32_t s) { + C4(eve, ((18 << 24) | ((s & 255)))); +} + + +void common_hal__eve_ColorA(common_hal__eve_t *eve, uint32_t alpha) { + C4(eve, ((16 << 24) | ((alpha & 255)))); +} + + +void common_hal__eve_ColorMask(common_hal__eve_t *eve, uint32_t r, uint32_t g, uint32_t b, uint32_t a) { + C4(eve, ((32 << 24) | ((r & 1) << 3) | ((g & 1) << 2) | ((b & 1) << 1) | ((a & 1)))); +} + + +void common_hal__eve_ColorRGB(common_hal__eve_t *eve, uint32_t red, uint32_t green, uint32_t blue) { + C4(eve, ((4 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255)))); +} + + +void common_hal__eve_Display(common_hal__eve_t *eve) { + C4(eve, ((0 << 24))); +} + + +void common_hal__eve_End(common_hal__eve_t *eve) { + C4(eve, ((33 << 24))); +} + + +void common_hal__eve_Jump(common_hal__eve_t *eve, uint32_t dest) { + C4(eve, ((30 << 24) | ((dest & 65535)))); +} + + +void common_hal__eve_LineWidth(common_hal__eve_t *eve, uint32_t width) { + C4(eve, ((14 << 24) | ((width & 4095)))); +} + + +void common_hal__eve_Macro(common_hal__eve_t *eve, uint32_t m) { + C4(eve, ((37 << 24) | ((m & 1)))); +} + + +void common_hal__eve_Nop(common_hal__eve_t *eve) { + C4(eve, ((45 << 24))); +} + + +void common_hal__eve_PaletteSource(common_hal__eve_t *eve, uint32_t addr) { + C4(eve, ((42 << 24) | (((addr) & 4194303)))); +} + + +void common_hal__eve_PointSize(common_hal__eve_t *eve, uint32_t size) { + C4(eve, ((13 << 24) | ((size & 8191)))); +} + + +void common_hal__eve_RestoreContext(common_hal__eve_t *eve) { + C4(eve, ((35 << 24))); +} + + +void common_hal__eve_Return(common_hal__eve_t *eve) { + C4(eve, ((36 << 24))); +} + + +void common_hal__eve_SaveContext(common_hal__eve_t *eve) { + C4(eve, ((34 << 24))); +} + + +void common_hal__eve_ScissorSize(common_hal__eve_t *eve, uint32_t width, uint32_t height) { + C4(eve, ((28 << 24) | ((width & 4095) << 12) | ((height & 4095)))); +} + + +void common_hal__eve_ScissorXY(common_hal__eve_t *eve, uint32_t x, uint32_t y) { + C4(eve, ((27 << 24) | ((x & 2047) << 11) | ((y & 2047)))); +} + + +void common_hal__eve_StencilFunc(common_hal__eve_t *eve, uint32_t func, uint32_t ref, uint32_t mask) { + C4(eve, ((10 << 24) | ((func & 7) << 16) | ((ref & 255) << 8) | ((mask & 255)))); +} + + +void common_hal__eve_StencilMask(common_hal__eve_t *eve, uint32_t mask) { + C4(eve, ((19 << 24) | ((mask & 255)))); +} + + +void common_hal__eve_StencilOp(common_hal__eve_t *eve, uint32_t sfail, uint32_t spass) { + C4(eve, ((12 << 24) | ((sfail & 7) << 3) | ((spass & 7)))); +} + + +void common_hal__eve_TagMask(common_hal__eve_t *eve, uint32_t mask) { + C4(eve, ((20 << 24) | ((mask & 1)))); +} + + +void common_hal__eve_Tag(common_hal__eve_t *eve, uint32_t s) { + C4(eve, ((3 << 24) | ((s & 255)))); +} + + +void common_hal__eve_VertexTranslateX(common_hal__eve_t *eve, uint32_t x) { + C4(eve, ((43 << 24) | (((x) & 131071)))); +} + + +void common_hal__eve_VertexTranslateY(common_hal__eve_t *eve, uint32_t y) { + C4(eve, ((44 << 24) | (((y) & 131071)))); +} + + +void common_hal__eve_Vertex2ii(common_hal__eve_t *eve, uint32_t x, uint32_t y, uint32_t handle, uint32_t cell) { + C4(eve, ((2 << 30) | (((x) & 511) << 21) | (((y) & 511) << 12) | (((handle) & 31) << 7) | (((cell) & 127) << 0))); +} + diff --git a/shared-module/_eve/__init__.h b/shared-module/_eve/__init__.h new file mode 100644 index 0000000000000..5217d860ab29a --- /dev/null +++ b/shared-module/_eve/__init__.h @@ -0,0 +1,37 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 James Bowman for Excamera Labs + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE__EVE___INIT___H +#define MICROPY_INCLUDED_SHARED_MODULE__EVE___INIT___H + +typedef struct _common_hal__eve_t { + mp_obj_t dest[3]; // Own 'write' method, plus argument + int vscale; // fixed-point scaling used for Vertex2f + size_t n; // Current size of command buffer + uint8_t buf[512]; // Command buffer +} common_hal__eve_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE__EVE___INIT___H diff --git a/shared-module/_pew/PewPew.c b/shared-module/_pew/PewPew.c new file mode 100644 index 0000000000000..568dc6425f602 --- /dev/null +++ b/shared-module/_pew/PewPew.c @@ -0,0 +1,125 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mpstate.h" +#include "py/runtime.h" +#include "__init__.h" +#include "PewPew.h" + +#include "shared-bindings/digitalio/Pull.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/util.h" +#include "samd/timers.h" +#include "supervisor/shared/translate.h" +#include "timer_handler.h" + + +static uint8_t pewpew_tc_index = 0xff; + + +void pewpew_interrupt_handler(uint8_t index) { + if (index != pewpew_tc_index) { + return; + } + Tc* tc = tc_insts[index]; + if (!tc->COUNT16.INTFLAG.bit.MC0) { + return; + } + + pew_tick(); + + // Clear the interrupt bit. + tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +} + +void pew_init() { + pew_obj_t* pew = MP_STATE_VM(pew_singleton); + + common_hal_digitalio_digitalinout_switch_to_input(pew->buttons, PULL_UP); + + for (size_t i = 0; i < pew->rows_size; ++i) { + digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(pew->rows[i]); + common_hal_digitalio_digitalinout_switch_to_output(pin, false, + DRIVE_MODE_PUSH_PULL); + } + for (size_t i = 0; i < pew->cols_size; ++i) { + digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(pew->cols[i]); + common_hal_digitalio_digitalinout_switch_to_output(pin, true, + DRIVE_MODE_OPEN_DRAIN); + } + if (pewpew_tc_index == 0xff) { + // Find a spare timer. + uint8_t index = find_free_timer(); + if (index == 0xff) { + mp_raise_RuntimeError(translate("All timers in use")); + } + Tc *tc = tc_insts[index]; + + pewpew_tc_index = index; + set_timer_handler(true, index, TC_HANDLER_PEW); + + // We use GCLK0 for SAMD21 and GCLK1 for SAMD51 because they both run + // at 48mhz making our math the same across the boards. + #ifdef SAMD21 + turn_on_clocks(true, index, 0); + #endif + #ifdef SAMD51 + turn_on_clocks(true, index, 1); + #endif + + + #ifdef SAMD21 + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | + TC_CTRLA_PRESCALER_DIV64 | + TC_CTRLA_WAVEGEN_MFRQ; + #endif + #ifdef SAMD51 + tc_reset(tc); + tc_set_enable(tc, false); + tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 + | TC_CTRLA_PRESCALER_DIV64; + tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; + #endif + + tc_set_enable(tc, true); + tc->COUNT16.CC[0].reg = 64; + + // Clear our interrupt in case it was set earlier + tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; + tc->COUNT16.INTENSET.reg = TC_INTENSET_MC0; + tc_enable_interrupts(pewpew_tc_index); + } +} + +void pew_reset(void) { + if (pewpew_tc_index != 0xff) { + tc_reset(tc_insts[pewpew_tc_index]); + pewpew_tc_index = 0xff; + } + MP_STATE_VM(pew_singleton) = NULL; +} diff --git a/shared-module/_pew/PewPew.h b/shared-module/_pew/PewPew.h new file mode 100644 index 0000000000000..da1cae0a2cca9 --- /dev/null +++ b/shared-module/_pew/PewPew.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_PEW_PEWPEW_H +#define MICROPY_INCLUDED_PEW_PEWPEW_H + +#include +#include "shared-bindings/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* buffer; + mp_obj_t* rows; + mp_obj_t* cols; + digitalio_digitalinout_obj_t *buttons; + uint8_t rows_size; + uint8_t cols_size; + uint8_t pressed; +} pew_obj_t; + +void pew_init(void); +void pewpew_interrupt_handler(uint8_t index); +void pew_reset(void); + +#endif // MICROPY_INCLUDED_PEW_PEWPEW_H diff --git a/shared-module/_pew/__init__.c b/shared-module/_pew/__init__.c new file mode 100644 index 0000000000000..f3b23c606c036 --- /dev/null +++ b/shared-module/_pew/__init__.c @@ -0,0 +1,87 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mpstate.h" +#include "__init__.h" +#include "PewPew.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" + + +void pew_tick(void) { + static uint8_t col = 0; + static uint8_t turn = 0; + static uint8_t pressed = 0; + static uint8_t last_pressed = 0; + digitalio_digitalinout_obj_t *pin; + + pew_obj_t* pew = MP_STATE_VM(pew_singleton); + if (!pew) { return; } + + pin = MP_OBJ_TO_PTR(pew->cols[col]); + ++col; + if (col >= pew->cols_size) { + pew->pressed |= last_pressed & pressed; + last_pressed = pressed; + pressed = 0; + col = 0; + ++turn; + if (turn > 11) { + turn = 0; + } + } + if (!common_hal_digitalio_digitalinout_get_value(pew->buttons)) { + pressed |= 1 << col; + } + common_hal_digitalio_digitalinout_set_value(pin, true); + for (size_t x = 0; x < pew->rows_size; ++x) { + pin = MP_OBJ_TO_PTR(pew->rows[x]); + uint8_t color = pew->buffer[col * (pew->rows_size) + x]; + bool value = false; + switch (color & 0x03) { + case 3: + value = true; + break; + case 2: + if (turn == 2 || turn == 5 || turn == 8 || turn == 11) { + value = true; + } + break; + case 1: + if (turn == 0) { + value = true; + } + break; + case 0: + break; + } + common_hal_digitalio_digitalinout_set_value(pin, value); + } + pin = MP_OBJ_TO_PTR(pew->cols[col]); + common_hal_digitalio_digitalinout_set_value(pin, false); +} diff --git a/shared-module/_pew/__init__.h b/shared-module/_pew/__init__.h new file mode 100644 index 0000000000000..4f953c61064df --- /dev/null +++ b/shared-module/_pew/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Radomir Dopieralski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_PEW_H +#define MICROPY_INCLUDED_PEW_H + +void pew_tick(void); + +#endif // MICROPY_INCLUDED_PEW_H diff --git a/shared-module/_pixelbuf/PixelBuf.c b/shared-module/_pixelbuf/PixelBuf.c new file mode 100644 index 0000000000000..31350b875cfcd --- /dev/null +++ b/shared-module/_pixelbuf/PixelBuf.c @@ -0,0 +1,289 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" +#include "py/objstr.h" +#include "py/objtype.h" +#include "py/runtime.h" +#include "shared-bindings/_pixelbuf/PixelBuf.h" +#include + +// Helper to ensure we have the native super class instead of a subclass. +static pixelbuf_pixelbuf_obj_t* native_pixelbuf(mp_obj_t pixelbuf_obj) { + mp_obj_t native_pixelbuf = mp_instance_cast_to_native_base(pixelbuf_obj, &pixelbuf_pixelbuf_type); + mp_obj_assert_native_inited(native_pixelbuf); + return MP_OBJ_TO_PTR(native_pixelbuf); +} + +void common_hal__pixelbuf_pixelbuf_construct(pixelbuf_pixelbuf_obj_t *self, size_t n, + pixelbuf_byteorder_details_t* byteorder, mp_float_t brightness, bool auto_write, + uint8_t* header, size_t header_len, uint8_t* trailer, size_t trailer_len) { + + self->pixel_count = n; + self->byteorder = *byteorder; // Copied because we modify for dotstar + self->bytes_per_pixel = byteorder->is_dotstar ? 4 : byteorder->bpp; + self->auto_write = false; + + size_t pixel_len = self->pixel_count * self->bytes_per_pixel; + self->transmit_buffer_obj = mp_obj_new_bytes_of_zeros(header_len + pixel_len + trailer_len); + mp_obj_str_t *o = MP_OBJ_TO_PTR(self->transmit_buffer_obj); + + // Abuse the bytes object a bit by mutating it's data by dropping the const. If the user's + // Python code holds onto it, they'll find out that it changes. At least this way it isn't + // mutable by the code itself. + uint8_t* transmit_buffer = (uint8_t*) o->data; + memcpy(transmit_buffer, header, header_len); + memcpy(transmit_buffer + header_len + pixel_len, trailer, trailer_len); + self->post_brightness_buffer = transmit_buffer + header_len; + + if (self->byteorder.is_dotstar) { + // Initialize the buffer with the dotstar start bytes. + // Note: Header and end must be setup by caller + for (uint i = 0; i < self->pixel_count * 4; i += 4) { + self->post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT; + } + } + // Call set_brightness so that it can allocate a second buffer if needed. + self->brightness = 1.0; + common_hal__pixelbuf_pixelbuf_set_brightness(MP_OBJ_FROM_PTR(self), brightness); + + // Turn on auto_write. We don't want to do it with the above brightness call. + self->auto_write = auto_write; +} + +size_t common_hal__pixelbuf_pixelbuf_get_len(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + return self->pixel_count; +} + +uint8_t common_hal__pixelbuf_pixelbuf_get_bpp(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + return self->byteorder.bpp; +} + +mp_obj_t common_hal__pixelbuf_pixelbuf_get_byteorder_string(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + return self->byteorder.order_string; +} + +bool common_hal__pixelbuf_pixelbuf_get_auto_write(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + return self->auto_write; +} + +void common_hal__pixelbuf_pixelbuf_set_auto_write(mp_obj_t self_in, bool auto_write) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + self->auto_write = auto_write; +} + +mp_float_t common_hal__pixelbuf_pixelbuf_get_brightness(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + return self->brightness; +} + +void common_hal__pixelbuf_pixelbuf_set_brightness(mp_obj_t self_in, mp_float_t brightness) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + // Skip out if the brightness is already set. The default of self->brightness is 1.0. So, this + // also prevents the pre_brightness_buffer allocation when brightness is set to 1.0 again. + mp_float_t change = brightness - self->brightness; + if (-0.001 < change && change < 0.001) { + return; + } + self->brightness = brightness; + size_t pixel_len = self->pixel_count * self->bytes_per_pixel; + if (self->pre_brightness_buffer == NULL) { + self->pre_brightness_buffer = m_malloc(pixel_len, false); + memcpy(self->pre_brightness_buffer, self->post_brightness_buffer, pixel_len); + } + for (size_t i = 0; i < pixel_len; i++) { + // Don't adjust per-pixel luminance bytes in dotstar mode + if (self->byteorder.is_dotstar && i % 4 == 0) { + continue; + } + self->post_brightness_buffer[i] = self->pre_brightness_buffer[i] * self->brightness; + } + + if (self->auto_write) { + common_hal__pixelbuf_pixelbuf_show(self_in); + } +} + +void _pixelbuf_parse_color(pixelbuf_pixelbuf_obj_t* self, mp_obj_t color, uint8_t* r, uint8_t* g, uint8_t* b, uint8_t* w) { + pixelbuf_byteorder_details_t *byteorder = &self->byteorder; + // w is shared between white in NeoPixels and brightness in dotstars (so that DotStars can have + // per-pixel brightness). Set the defaults here in case it isn't set below. + if (byteorder->is_dotstar) { + *w = 255; + } else { + *w = 0; + } + + if (MP_OBJ_IS_INT(color)) { + mp_int_t value = mp_obj_get_int_truncated(color); + *r = value >> 16 & 0xff; + *g = (value >> 8) & 0xff; + *b = value & 0xff; + // Int colors can't set white directly so convert to white when all components are equal. + if (!byteorder->is_dotstar && byteorder->bpp == 4 && byteorder->has_white && *r == *g && *r == *b) { + *w = *r; + *r = 0; + *g = 0; + *b = 0; + } + } else { + mp_obj_t *items; + size_t len; + mp_obj_get_array(color, &len, &items); + if (len != byteorder->bpp && !byteorder->is_dotstar) { + mp_raise_ValueError_varg(translate("Expected tuple of length %d, got %d"), byteorder->bpp, len); + } + + *r = mp_obj_get_int_truncated(items[PIXEL_R]); + *g = mp_obj_get_int_truncated(items[PIXEL_G]); + *b = mp_obj_get_int_truncated(items[PIXEL_B]); + if (len > 3) { + if (mp_obj_is_float(items[PIXEL_W])) { + *w = 255 * mp_obj_get_float(items[PIXEL_W]); + } else { + *w = mp_obj_get_int_truncated(items[PIXEL_W]); + } + } + } +} + +void _pixelbuf_set_pixel_color(pixelbuf_pixelbuf_obj_t* self, size_t index, uint8_t r, uint8_t g, uint8_t b, uint8_t w) { + // DotStars don't have white, instead they have 5 bit brightness so pack it into w. Shift right + // by three to leave the top five bits. + if (self->bytes_per_pixel == 4 && self->byteorder.is_dotstar) { + w = DOTSTAR_LED_START | w >> 3; + } + pixelbuf_rgbw_t *rgbw_order = &self->byteorder.byteorder; + size_t offset = index * self->bytes_per_pixel; + if (self->pre_brightness_buffer != NULL) { + uint8_t* pre_brightness_buffer = self->pre_brightness_buffer + offset; + if (self->bytes_per_pixel == 4) { + pre_brightness_buffer[rgbw_order->w] = w; + } + + pre_brightness_buffer[rgbw_order->r] = r; + pre_brightness_buffer[rgbw_order->g] = g; + pre_brightness_buffer[rgbw_order->b] = b; + } + + uint8_t* post_brightness_buffer = self->post_brightness_buffer + offset; + if (self->bytes_per_pixel == 4) { + // Only apply brightness if w is actually white (aka not DotStar.) + if (!self->byteorder.is_dotstar) { + w *= self->brightness; + } + post_brightness_buffer[rgbw_order->w] = w; + } + post_brightness_buffer[rgbw_order->r] = r * self->brightness; + post_brightness_buffer[rgbw_order->g] = g * self->brightness; + post_brightness_buffer[rgbw_order->b] = b * self->brightness; +} + +void _pixelbuf_set_pixel(pixelbuf_pixelbuf_obj_t* self, size_t index, mp_obj_t value) { + uint8_t r; + uint8_t g; + uint8_t b; + uint8_t w; + _pixelbuf_parse_color(self, value, &r, &g, &b, &w); + _pixelbuf_set_pixel_color(self, index, r, g, b, w); +} + +void common_hal__pixelbuf_pixelbuf_set_pixels(mp_obj_t self_in, size_t start, size_t stop, size_t step, mp_obj_t* values) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + size_t source_i = 0; + for (size_t target_i = start; target_i < stop; target_i += step) { + _pixelbuf_set_pixel(self, target_i, values[source_i]); + source_i++; + } + if (self->auto_write) { + common_hal__pixelbuf_pixelbuf_show(self_in); + } +} + +void common_hal__pixelbuf_pixelbuf_set_pixel(mp_obj_t self_in, size_t index, mp_obj_t value) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + _pixelbuf_set_pixel(self, index, value); + if (self->auto_write) { + common_hal__pixelbuf_pixelbuf_show(self_in); + } +} + +mp_obj_t common_hal__pixelbuf_pixelbuf_get_pixel(mp_obj_t self_in, size_t index) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + mp_obj_t elems[self->byteorder.bpp]; + uint8_t* pixel_buffer = self->post_brightness_buffer; + if (self->pre_brightness_buffer != NULL) { + pixel_buffer = self->pre_brightness_buffer; + } + pixel_buffer += self->byteorder.bpp * index; + + pixelbuf_rgbw_t *rgbw_order = &self->byteorder.byteorder; + elems[0] = MP_OBJ_NEW_SMALL_INT(pixel_buffer[rgbw_order->r]); + elems[1] = MP_OBJ_NEW_SMALL_INT(pixel_buffer[rgbw_order->g]); + elems[2] = MP_OBJ_NEW_SMALL_INT(pixel_buffer[rgbw_order->b]); + if (self->byteorder.bpp > 3) { + uint8_t w = pixel_buffer[rgbw_order->w]; + if (self->byteorder.is_dotstar) { + elems[3] = mp_obj_new_float((w & 0b00011111) / 31.0); + } else { + elems[3] = MP_OBJ_NEW_SMALL_INT(w); + } + } + + return mp_obj_new_tuple(self->byteorder.bpp, elems); +} + +void common_hal__pixelbuf_pixelbuf_show(mp_obj_t self_in) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + mp_obj_t dest[2 + 1]; + mp_load_method(self_in, MP_QSTR__transmit, dest); + + dest[2] = self->transmit_buffer_obj; + + mp_call_method_n_kw(1, 0, dest); +} + +void common_hal__pixelbuf_pixelbuf_fill(mp_obj_t self_in, mp_obj_t fill_color) { + pixelbuf_pixelbuf_obj_t* self = native_pixelbuf(self_in); + + uint8_t r; + uint8_t g; + uint8_t b; + uint8_t w; + _pixelbuf_parse_color(self, fill_color, &r, &g, &b, &w); + + for (size_t i = 0; i < self->pixel_count; i++) { + _pixelbuf_set_pixel_color(self, i, r, g, b, w); + } + if (self->auto_write) { + common_hal__pixelbuf_pixelbuf_show(self_in); + } +} diff --git a/shared-module/_pixelbuf/PixelBuf.h b/shared-module/_pixelbuf/PixelBuf.h new file mode 100644 index 0000000000000..a9fbed366fee0 --- /dev/null +++ b/shared-module/_pixelbuf/PixelBuf.h @@ -0,0 +1,71 @@ +/* + * This file is part of the Circuit Python project, https://github.com/adafruit/circuitpython + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Roy Hooper + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" +#include "py/objarray.h" + +#ifndef PIXELBUF_SHARED_MODULE_H +#define PIXELBUF_SHARED_MODULE_H + +typedef struct { + uint8_t r; + uint8_t g; + uint8_t b; + uint8_t w; +} pixelbuf_rgbw_t; + +typedef struct { + uint8_t bpp; + pixelbuf_rgbw_t byteorder; + bool has_white; + bool is_dotstar; + mp_obj_t order_string; +} pixelbuf_byteorder_details_t; + +typedef struct { + mp_obj_base_t base; + size_t pixel_count; + size_t bytes_per_pixel; + pixelbuf_byteorder_details_t byteorder; + mp_float_t brightness; + mp_obj_t transmit_buffer_obj; + // The post_brightness_buffer is offset into the buffer allocated in transmit_buffer_obj to + // account for any header. + uint8_t *post_brightness_buffer; + uint8_t *pre_brightness_buffer; + bool auto_write; +} pixelbuf_pixelbuf_obj_t; + +#define PIXEL_R 0 +#define PIXEL_G 1 +#define PIXEL_B 2 +#define PIXEL_W 3 + +#define DOTSTAR_LED_START 0b11100000 +#define DOTSTAR_LED_START_FULL_BRIGHT 0xFF + +#endif diff --git a/shared-module/_pixelbuf/__init__.c b/shared-module/_pixelbuf/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/_stage/__init__.c b/shared-module/_stage/__init__.c index 86f5ee7957c3c..0323c32cb9823 100644 --- a/shared-module/_stage/__init__.c +++ b/shared-module/_stage/__init__.c @@ -31,43 +31,67 @@ #include "shared-bindings/_stage/Text.h" -bool render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1, +void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1, mp_obj_t *layers, size_t layers_size, uint16_t *buffer, size_t buffer_size, - busio_spi_obj_t *spi) { + displayio_display_obj_t *display, + uint8_t scale, uint16_t background) { + + displayio_area_t area; + area.x1 = x0; + area.y1 = y0; + area.x2 = x1; + area.y2 = y1; + displayio_display_core_set_region_to_update( + &display->core, display->set_column_command, display->set_row_command, + NO_COMMAND, NO_COMMAND, display->data_as_commands, false, &area); + + while (!displayio_display_core_begin_transaction(&display->core)) { + RUN_BACKGROUND_TASKS; + } + display->core.send(display->core.bus, DISPLAY_COMMAND, + CHIP_SELECT_TOGGLE_EVERY_BYTE, + &display->write_ram_command, 1); size_t index = 0; for (uint16_t y = y0; y < y1; ++y) { - for (uint16_t x = x0; x < x1; ++x) { - for (size_t layer = 0; layer < layers_size; ++layer) { + for (uint8_t yscale = 0; yscale < scale; ++yscale) { + for (uint16_t x = x0; x < x1; ++x) { uint16_t c = TRANSPARENT; - layer_obj_t *obj = MP_OBJ_TO_PTR(layers[layer]); - if (obj->base.type == &mp_type_layer) { - c = get_layer_pixel(obj, x, y); - } else if (obj->base.type == &mp_type_text) { - c = get_text_pixel((text_obj_t *)obj, x, y); + for (size_t layer = 0; layer < layers_size; ++layer) { + layer_obj_t *obj = MP_OBJ_TO_PTR(layers[layer]); + if (obj->base.type == &mp_type_layer) { + c = get_layer_pixel(obj, x, y); + } else if (obj->base.type == &mp_type_text) { + c = get_text_pixel((text_obj_t *)obj, x, y); + } + if (c != TRANSPARENT) { + break; + } } - if (c != TRANSPARENT) { - buffer[index] = c; - break; + if (c == TRANSPARENT) { + c = background; } - } - index += 1; - // The buffer is full, send it. - if (index >= buffer_size) { - if (!common_hal_busio_spi_write(spi, - ((uint8_t*)buffer), buffer_size * 2)) { - return false; + for (uint8_t xscale = 0; xscale < scale; ++xscale) { + buffer[index] = c; + index += 1; + // The buffer is full, send it. + if (index >= buffer_size) { + display->core.send(display->core.bus, DISPLAY_DATA, + CHIP_SELECT_UNTOUCHED, + ((uint8_t*)buffer), buffer_size * 2); + index = 0; + } } - index = 0; } } } // Send the remaining data. if (index) { - if (!common_hal_busio_spi_write(spi, ((uint8_t*)buffer), index * 2)) { - return false; - } + display->core.send(display->core.bus, DISPLAY_DATA, + CHIP_SELECT_UNTOUCHED, + ((uint8_t*)buffer), index * 2); } - return true; + + displayio_display_core_end_transaction(&display->core); } diff --git a/shared-module/_stage/__init__.h b/shared-module/_stage/__init__.h index d56a26940f2e2..7a1826200e81b 100644 --- a/shared-module/_stage/__init__.h +++ b/shared-module/_stage/__init__.h @@ -27,16 +27,17 @@ #ifndef MICROPY_INCLUDED_SHARED_MODULE__STAGE_H #define MICROPY_INCLUDED_SHARED_MODULE__STAGE_H -#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/Display.h" #include #include #include "py/obj.h" #define TRANSPARENT (0x1ff8) -bool render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1, +void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1, mp_obj_t *layers, size_t layers_size, uint16_t *buffer, size_t buffer_size, - busio_spi_obj_t *spi); + displayio_display_obj_t *display, + uint8_t scale, uint16_t background); #endif // MICROPY_INCLUDED_SHARED_MODULE__STAGE diff --git a/shared-module/audiocore/RawSample.c b/shared-module/audiocore/RawSample.c new file mode 100644 index 0000000000000..a69ddeb65038a --- /dev/null +++ b/shared-module/audiocore/RawSample.c @@ -0,0 +1,100 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/audiocore/RawSample.h" + +#include + +#include "shared-module/audiocore/RawSample.h" + +void common_hal_audioio_rawsample_construct(audioio_rawsample_obj_t* self, + uint8_t* buffer, + uint32_t len, + uint8_t bytes_per_sample, + bool samples_signed, + uint8_t channel_count, + uint32_t sample_rate) { + self->buffer = buffer; + self->bits_per_sample = bytes_per_sample * 8; + self->samples_signed = samples_signed; + self->len = len; + self->channel_count = channel_count; + self->sample_rate = sample_rate; + self->buffer_read = false; +} + +void common_hal_audioio_rawsample_deinit(audioio_rawsample_obj_t* self) { + self->buffer = NULL; +} +bool common_hal_audioio_rawsample_deinited(audioio_rawsample_obj_t* self) { + return self->buffer == NULL; +} + +uint32_t common_hal_audioio_rawsample_get_sample_rate(audioio_rawsample_obj_t* self) { + return self->sample_rate; +} +void common_hal_audioio_rawsample_set_sample_rate(audioio_rawsample_obj_t* self, + uint32_t sample_rate) { + self->sample_rate = sample_rate; +} +uint8_t common_hal_audioio_rawsample_get_bits_per_sample(audioio_rawsample_obj_t* self) { + return self->bits_per_sample; +} +uint8_t common_hal_audioio_rawsample_get_channel_count(audioio_rawsample_obj_t* self) { + return self->channel_count; +} + +void audioio_rawsample_reset_buffer(audioio_rawsample_obj_t* self, + bool single_channel, + uint8_t channel) { +} + +audioio_get_buffer_result_t audioio_rawsample_get_buffer(audioio_rawsample_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length) { + *buffer_length = self->len; + if (single_channel) { + *buffer = self->buffer + (channel % self->channel_count) * (self->bits_per_sample / 8); + } else { + *buffer = self->buffer; + } + return GET_BUFFER_DONE; +} + +void audioio_rawsample_get_buffer_structure(audioio_rawsample_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing) { + *single_buffer = true; + *samples_signed = self->samples_signed; + *max_buffer_length = self->len; + if (single_channel) { + *spacing = self->channel_count; + } else { + *spacing = 1; + } +} diff --git a/shared-module/audiocore/RawSample.h b/shared-module/audiocore/RawSample.h new file mode 100644 index 0000000000000..6c2c19c9bfc0c --- /dev/null +++ b/shared-module/audiocore/RawSample.h @@ -0,0 +1,59 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_RAWSAMPLE_H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_RAWSAMPLE_H + +#include "py/obj.h" + +#include "shared-module/audiocore/__init__.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* buffer; + uint32_t len; + uint8_t bits_per_sample; + bool samples_signed; + uint8_t channel_count; + uint32_t sample_rate; + bool buffer_read; +} audioio_rawsample_obj_t; + + +// These are not available from Python because it may be called in an interrupt. +void audioio_rawsample_reset_buffer(audioio_rawsample_obj_t* self, + bool single_channel, + uint8_t channel); +audioio_get_buffer_result_t audioio_rawsample_get_buffer(audioio_rawsample_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length); // length in bytes +void audioio_rawsample_get_buffer_structure(audioio_rawsample_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_RAWSAMPLE_H diff --git a/shared-module/audiocore/WaveFile.c b/shared-module/audiocore/WaveFile.c new file mode 100644 index 0000000000000..0248d42e221c2 --- /dev/null +++ b/shared-module/audiocore/WaveFile.c @@ -0,0 +1,279 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/audiocore/WaveFile.h" + +#include +#include + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "shared-module/audiocore/WaveFile.h" +#include "supervisor/shared/translate.h" + +struct wave_format_chunk { + uint16_t audio_format; + uint16_t num_channels; + uint32_t sample_rate; + uint32_t byte_rate; + uint16_t block_align; + uint16_t bits_per_sample; + uint16_t extra_params; // Assumed to be zero below. +}; + +void common_hal_audioio_wavefile_construct(audioio_wavefile_obj_t* self, + pyb_file_obj_t* file, + uint8_t *buffer, + size_t buffer_size) { + // Load the wave + self->file = file; + uint8_t chunk_header[16]; + f_rewind(&self->file->fp); + UINT bytes_read; + if (f_read(&self->file->fp, chunk_header, 16, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != 16 || + memcmp(chunk_header, "RIFF", 4) != 0 || + memcmp(chunk_header + 8, "WAVEfmt ", 8) != 0) { + mp_raise_ValueError(translate("Invalid wave file")); + } + uint32_t format_size; + if (f_read(&self->file->fp, &format_size, 4, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != 4 || + format_size > sizeof(struct wave_format_chunk)) { + mp_raise_ValueError(translate("Invalid format chunk size")); + } + struct wave_format_chunk format; + if (f_read(&self->file->fp, &format, format_size, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != format_size) { + } + + if (format.audio_format != 1 || + format.num_channels > 2 || + format.bits_per_sample > 16 || + (format_size == 18 && + format.extra_params != 0)) { + mp_raise_ValueError(translate("Unsupported format")); + } + // Get the sample_rate + self->sample_rate = format.sample_rate; + self->channel_count = format.num_channels; + self->bits_per_sample = format.bits_per_sample; + + // TODO(tannewt): Skip any extra chunks that occur before the data section. + + uint8_t data_tag[4]; + if (f_read(&self->file->fp, &data_tag, 4, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != 4 || + memcmp((uint8_t *) data_tag, "data", 4) != 0) { + mp_raise_ValueError(translate("Data chunk must follow fmt chunk")); + } + + uint32_t data_length; + if (f_read(&self->file->fp, &data_length, 4, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != 4) { + mp_raise_ValueError(translate("Invalid file")); + } + self->file_length = data_length; + self->data_start = self->file->fp.fptr; + + // Try to allocate two buffers, one will be loaded from file and the other + // DMAed to DAC. + if (buffer_size) { + self->len = buffer_size / 2; + self->buffer = buffer; + self->second_buffer = buffer + self->len; + } else { + self->len = 256; + self->buffer = m_malloc(self->len, false); + if (self->buffer == NULL) { + common_hal_audioio_wavefile_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate first buffer")); + } + + self->second_buffer = m_malloc(self->len, false); + if (self->second_buffer == NULL) { + common_hal_audioio_wavefile_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate second buffer")); + } + } +} + +void common_hal_audioio_wavefile_deinit(audioio_wavefile_obj_t* self) { + self->buffer = NULL; + self->second_buffer = NULL; +} + +bool common_hal_audioio_wavefile_deinited(audioio_wavefile_obj_t* self) { + return self->buffer == NULL; +} + +uint32_t common_hal_audioio_wavefile_get_sample_rate(audioio_wavefile_obj_t* self) { + return self->sample_rate; +} + +void common_hal_audioio_wavefile_set_sample_rate(audioio_wavefile_obj_t* self, + uint32_t sample_rate) { + self->sample_rate = sample_rate; +} + +uint8_t common_hal_audioio_wavefile_get_bits_per_sample(audioio_wavefile_obj_t* self) { + return self->bits_per_sample; +} + +uint8_t common_hal_audioio_wavefile_get_channel_count(audioio_wavefile_obj_t* self) { + return self->channel_count; +} + +bool audioio_wavefile_samples_signed(audioio_wavefile_obj_t* self) { + return self->bits_per_sample > 8; +} + +uint32_t audioio_wavefile_max_buffer_length(audioio_wavefile_obj_t* self) { + return 512; +} + +void audioio_wavefile_reset_buffer(audioio_wavefile_obj_t* self, + bool single_channel, + uint8_t channel) { + if (single_channel && channel == 1) { + return; + } + // We don't reset the buffer index in case we're looping and we have an odd number of buffer + // loads + self->bytes_remaining = self->file_length; + f_lseek(&self->file->fp, self->data_start); + self->read_count = 0; + self->left_read_count = 0; + self->right_read_count = 0; +} + +audioio_get_buffer_result_t audioio_wavefile_get_buffer(audioio_wavefile_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length) { + if (!single_channel) { + channel = 0; + } + + uint32_t channel_read_count = self->left_read_count; + if (channel == 1) { + channel_read_count = self->right_read_count; + } + + bool need_more_data = self->read_count == channel_read_count; + + if (self->bytes_remaining == 0 && need_more_data) { + *buffer = NULL; + *buffer_length = 0; + return GET_BUFFER_DONE; + } + + if (need_more_data) { + uint16_t num_bytes_to_load = self->len; + if (num_bytes_to_load > self->bytes_remaining) { + num_bytes_to_load = self->bytes_remaining; + } + UINT length_read; + if (self->buffer_index % 2 == 1) { + *buffer = self->second_buffer; + } else { + *buffer = self->buffer; + } + if (f_read(&self->file->fp, *buffer, num_bytes_to_load, &length_read) != FR_OK || length_read != num_bytes_to_load) { + return GET_BUFFER_ERROR; + } + self->bytes_remaining -= length_read; + // Pad the last buffer to word align it. + if (self->bytes_remaining == 0 && length_read % sizeof(uint32_t) != 0) { + uint32_t pad = length_read % sizeof(uint32_t); + length_read += pad; + if (self->bits_per_sample == 8) { + for (uint32_t i = 0; i < pad; i++) { + ((uint8_t*) (*buffer))[length_read / sizeof(uint8_t) - i - 1] = 0x80; + } + } else if (self->bits_per_sample == 16) { + // We know the buffer is aligned because we allocated it onto the heap ourselves. + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" + ((int16_t*) (*buffer))[length_read / sizeof(int16_t) - 1] = 0; + #pragma GCC diagnostic pop + } + } + *buffer_length = length_read; + if (self->buffer_index % 2 == 1) { + self->second_buffer_length = length_read; + } else { + self->buffer_length = length_read; + } + self->buffer_index += 1; + self->read_count += 1; + } + + uint32_t buffers_back = self->read_count - 1 - channel_read_count; + if ((self->buffer_index - buffers_back) % 2 == 0) { + *buffer = self->second_buffer; + *buffer_length = self->second_buffer_length; + } else { + *buffer = self->buffer; + *buffer_length = self->buffer_length; + } + + if (channel == 0) { + self->left_read_count += 1; + } else if (channel == 1) { + self->right_read_count += 1; + *buffer = *buffer + self->bits_per_sample / 8; + } + + return self->bytes_remaining == 0 ? GET_BUFFER_DONE : GET_BUFFER_MORE_DATA; +} + +void audioio_wavefile_get_buffer_structure(audioio_wavefile_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing) { + *single_buffer = false; + *samples_signed = self->bits_per_sample > 8; + *max_buffer_length = 512; + if (single_channel) { + *spacing = self->channel_count; + } else { + *spacing = 1; + } +} diff --git a/shared-module/audiocore/WaveFile.h b/shared-module/audiocore/WaveFile.h new file mode 100644 index 0000000000000..3eecbf15ce36a --- /dev/null +++ b/shared-module/audiocore/WaveFile.h @@ -0,0 +1,71 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_WAVEFILE_H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_WAVEFILE_H + +#include "extmod/vfs_fat.h" +#include "py/obj.h" + +#include "shared-module/audiocore/__init__.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* buffer; + uint32_t buffer_length; + uint8_t* second_buffer; + uint32_t second_buffer_length; + uint32_t file_length; // In bytes + uint16_t data_start; // Where the data values start + uint8_t bits_per_sample; + uint16_t buffer_index; + uint32_t bytes_remaining; + + uint8_t channel_count; + uint32_t sample_rate; + + uint32_t len; + pyb_file_obj_t* file; + + uint32_t read_count; + uint32_t left_read_count; + uint32_t right_read_count; +} audioio_wavefile_obj_t; + +// These are not available from Python because it may be called in an interrupt. +void audioio_wavefile_reset_buffer(audioio_wavefile_obj_t* self, + bool single_channel, + uint8_t channel); +audioio_get_buffer_result_t audioio_wavefile_get_buffer(audioio_wavefile_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length); // length in bytes +void audioio_wavefile_get_buffer_structure(audioio_wavefile_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_WAVEFILE_H diff --git a/shared-module/audiocore/__init__.c b/shared-module/audiocore/__init__.c new file mode 100644 index 0000000000000..ac9d41b60a755 --- /dev/null +++ b/shared-module/audiocore/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/audioio/__init__.h" + +#include "py/obj.h" +#include "shared-bindings/audiocore/RawSample.h" +#include "shared-bindings/audiocore/WaveFile.h" +#include "shared-module/audiocore/RawSample.h" +#include "shared-module/audiocore/WaveFile.h" + +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-module/audiomixer/Mixer.h" + +uint32_t audiosample_sample_rate(mp_obj_t sample_obj) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + return proto->sample_rate(MP_OBJ_TO_PTR(sample_obj)); +} + +uint8_t audiosample_bits_per_sample(mp_obj_t sample_obj) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + return proto->bits_per_sample(MP_OBJ_TO_PTR(sample_obj)); +} + +uint8_t audiosample_channel_count(mp_obj_t sample_obj) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + return proto->channel_count(MP_OBJ_TO_PTR(sample_obj)); +} + +void audiosample_reset_buffer(mp_obj_t sample_obj, bool single_channel, uint8_t audio_channel) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + proto->reset_buffer(MP_OBJ_TO_PTR(sample_obj), single_channel, audio_channel); +} + +audioio_get_buffer_result_t audiosample_get_buffer(mp_obj_t sample_obj, + bool single_channel, + uint8_t channel, + uint8_t** buffer, uint32_t* buffer_length) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + return proto->get_buffer(MP_OBJ_TO_PTR(sample_obj), single_channel, channel, buffer, buffer_length); +} + +void audiosample_get_buffer_structure(mp_obj_t sample_obj, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing) { + const audiosample_p_t *proto = mp_proto_get_or_throw(MP_QSTR_protocol_audiosample, sample_obj); + proto->get_buffer_structure(MP_OBJ_TO_PTR(sample_obj), single_channel, single_buffer, + samples_signed, max_buffer_length, spacing); +} diff --git a/shared-module/audiocore/__init__.h b/shared-module/audiocore/__init__.h new file mode 100644 index 0000000000000..7a56454b8a4aa --- /dev/null +++ b/shared-module/audiocore/__init__.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOCORE__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOCORE__INIT__H + +#include +#include + +#include "py/obj.h" +#include "py/proto.h" + +typedef enum { + GET_BUFFER_DONE, // No more data to read + GET_BUFFER_MORE_DATA, // More data to read. + GET_BUFFER_ERROR, // Error while reading data. +} audioio_get_buffer_result_t; + +typedef uint32_t (*audiosample_sample_rate_fun)(mp_obj_t); +typedef uint8_t (*audiosample_bits_per_sample_fun)(mp_obj_t); +typedef uint8_t (*audiosample_channel_count_fun)(mp_obj_t); +typedef void (*audiosample_reset_buffer_fun)(mp_obj_t, + bool single_channel, uint8_t audio_channel); +typedef audioio_get_buffer_result_t (*audiosample_get_buffer_fun)(mp_obj_t, + bool single_channel, uint8_t channel, uint8_t** buffer, + uint32_t* buffer_length); +typedef void (*audiosample_get_buffer_structure_fun)(mp_obj_t, + bool single_channel, bool* single_buffer, + bool* samples_signed, uint32_t *max_buffer_length, + uint8_t* spacing); + +typedef struct _audiosample_p_t { + MP_PROTOCOL_HEAD // MP_QSTR_protocol_audiosample + audiosample_sample_rate_fun sample_rate; + audiosample_bits_per_sample_fun bits_per_sample; + audiosample_channel_count_fun channel_count; + audiosample_reset_buffer_fun reset_buffer; + audiosample_get_buffer_fun get_buffer; + audiosample_get_buffer_structure_fun get_buffer_structure; +} audiosample_p_t; + +uint32_t audiosample_sample_rate(mp_obj_t sample_obj); +uint8_t audiosample_bits_per_sample(mp_obj_t sample_obj); +uint8_t audiosample_channel_count(mp_obj_t sample_obj); +void audiosample_reset_buffer(mp_obj_t sample_obj, bool single_channel, uint8_t audio_channel); +audioio_get_buffer_result_t audiosample_get_buffer(mp_obj_t sample_obj, + bool single_channel, + uint8_t channel, + uint8_t** buffer, uint32_t* buffer_length); +void audiosample_get_buffer_structure(mp_obj_t sample_obj, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOCORE__INIT__H diff --git a/shared-module/audioio/__init__.c b/shared-module/audioio/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/audioio/__init__.h b/shared-module/audioio/__init__.h new file mode 100644 index 0000000000000..53b2d4a161b8d --- /dev/null +++ b/shared-module/audioio/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO__INIT__H + +#include "shared-module/audiocore/__init__.h" + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO__INIT__H diff --git a/shared-module/audiomixer/Mixer.c b/shared-module/audiomixer/Mixer.c new file mode 100644 index 0000000000000..4a72dab28dbb3 --- /dev/null +++ b/shared-module/audiomixer/Mixer.c @@ -0,0 +1,317 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * 2018 DeanM for Adafruit Industries + * 2019 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-bindings/audiomixer/MixerVoice.h" + +#include + +#include "py/runtime.h" +#include "shared-module/audiocore/__init__.h" +#include "shared-module/audiocore/RawSample.h" + +void common_hal_audiomixer_mixer_construct(audiomixer_mixer_obj_t* self, + uint8_t voice_count, + uint32_t buffer_size, + uint8_t bits_per_sample, + bool samples_signed, + uint8_t channel_count, + uint32_t sample_rate) { + self->len = buffer_size / 2 / sizeof(uint32_t) * sizeof(uint32_t); + + self->first_buffer = m_malloc(self->len, false); + if (self->first_buffer == NULL) { + common_hal_audiomixer_mixer_deinit(self); + mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate first buffer")); + } + + self->second_buffer = m_malloc(self->len, false); + if (self->second_buffer == NULL) { + common_hal_audiomixer_mixer_deinit(self); + mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate second buffer")); + } + + self->bits_per_sample = bits_per_sample; + self->samples_signed = samples_signed; + self->channel_count = channel_count; + self->sample_rate = sample_rate; + self->voice_count = voice_count; +} + +void common_hal_audiomixer_mixer_deinit(audiomixer_mixer_obj_t* self) { + self->first_buffer = NULL; + self->second_buffer = NULL; +} + +bool common_hal_audiomixer_mixer_deinited(audiomixer_mixer_obj_t* self) { + return self->first_buffer == NULL; +} + +uint32_t common_hal_audiomixer_mixer_get_sample_rate(audiomixer_mixer_obj_t* self) { + return self->sample_rate; +} + +uint8_t common_hal_audiomixer_mixer_get_channel_count(audiomixer_mixer_obj_t* self) { + return self->channel_count; +} + +uint8_t common_hal_audiomixer_mixer_get_bits_per_sample(audiomixer_mixer_obj_t* self) { + return self->bits_per_sample; +} + +bool common_hal_audiomixer_mixer_get_playing(audiomixer_mixer_obj_t* self) { + for (uint8_t v = 0; v < self->voice_count; v++) { + if (common_hal_audiomixer_mixervoice_get_playing(MP_OBJ_TO_PTR(self->voice[v]))) { + return true; + } + } + return false; +} + +void audiomixer_mixer_reset_buffer(audiomixer_mixer_obj_t* self, + bool single_channel, + uint8_t channel) { + for (uint8_t i = 0; i < self->voice_count; i++) { + common_hal_audiomixer_mixervoice_stop(self->voice[i]); + } +} + +__attribute__((always_inline)) +static inline uint32_t add16signed(uint32_t a, uint32_t b) { + return __QADD16(a, b); +} + +__attribute__((always_inline)) +static inline uint32_t mult16signed(uint32_t val, int32_t mul) { + mul <<= 16; + int32_t hi, lo; + enum { bits = 16 }; // saturate to 16 bits + enum { shift = 15 }; // shift is done automatically + asm volatile("smulwb %0, %1, %2" : "=r" (lo) : "r" (mul), "r" (val)); + asm volatile("smulwt %0, %1, %2" : "=r" (hi) : "r" (mul), "r" (val)); + asm volatile("ssat %0, %1, %2, asr %3" : "=r" (lo) : "I" (bits), "r" (lo), "I" (shift)); + asm volatile("ssat %0, %1, %2, asr %3" : "=r" (hi) : "I" (bits), "r" (hi), "I" (shift)); + asm volatile("pkhbt %0, %1, %2, lsl #16" : "=r" (val) : "r" (lo), "r" (hi)); // pack + return val; +} + +static inline uint32_t tounsigned8(uint32_t val) { + return __UADD8(val, 0x80808080); +} + +static inline uint32_t tounsigned16(uint32_t val) { + return __UADD16(val, 0x80008000); +} + +static inline uint32_t tosigned16(uint32_t val) { + return __UADD16(val, 0x80008000); +} + +static inline uint32_t unpack8(uint16_t val) { + return ((val & 0xff00) << 16) | ((val & 0x00ff) << 8); +} + +static inline uint32_t pack8(uint32_t val) { + return ((val & 0xff000000) >> 16) | ((val & 0xff00) >> 8); +} + +static void mix_down_one_voice(audiomixer_mixer_obj_t* self, + audiomixer_mixervoice_obj_t* voice, bool voices_active, + uint32_t* word_buffer, uint32_t length) { + bool voice_done = voice->sample == NULL; + while (!voice_done && length != 0) { + if (voice->buffer_length == 0) { + if (!voice->more_data) { + if (voice->loop) { + audiosample_reset_buffer(voice->sample, false, 0); + } else { + voice->sample = NULL; + voice_done = true; + break; + } + } + if (!voice_done) { + // Load another buffer + audioio_get_buffer_result_t result = audiosample_get_buffer(voice->sample, false, 0, (uint8_t**) &voice->remaining_buffer, &voice->buffer_length); + // Track length in terms of words. + voice->buffer_length /= sizeof(uint32_t); + voice->more_data = result == GET_BUFFER_MORE_DATA; + } + } + + uint32_t n = MIN(voice->buffer_length, length); + uint32_t *src = voice->remaining_buffer; + uint16_t level = voice->level; + + // First active voice gets copied over verbatim. + if (!voices_active) { + if (MP_LIKELY(self->bits_per_sample == 16)) { + if (MP_LIKELY(self->samples_signed)) { + for (uint32_t i = 0; isamples_signed)) { + word = tosigned16(word); + } + word = mult16signed(word, level); + hword_buffer[i] = pack8(word); + } + } + } else { + if (MP_LIKELY(self->bits_per_sample == 16)) { + if (MP_LIKELY(self->samples_signed)) { + for (uint32_t i = 0; isamples_signed)) { + word = tosigned16(word); + } + word = mult16signed(word, level); + word = add16signed(word, unpack8(hword_buffer[i])); + hword_buffer[i] = pack8(word); + } + } + } + length -= n; + word_buffer += n; + voice->remaining_buffer += n; + voice->buffer_length -= n; + } + + if (length && !voices_active) { + uint32_t sample_value = self->bits_per_sample == 8 + ? 0x80808080 : 0x80008000; + for (uint32_t i = 0; ileft_read_count; + if (channel == 1) { + channel_read_count = self->right_read_count; + } + *buffer_length = self->len; + + bool need_more_data = self->read_count == channel_read_count; + if (need_more_data) { + uint32_t* word_buffer; + if (self->use_first_buffer) { + *buffer = (uint8_t*) self->first_buffer; + word_buffer = self->first_buffer; + } else { + *buffer = (uint8_t*) self->second_buffer; + word_buffer = self->second_buffer; + } + self->use_first_buffer = !self->use_first_buffer; + bool voices_active = false; + uint32_t length = self->len / sizeof(uint32_t); + + for (int32_t v = 0; v < self->voice_count; v++) { + audiomixer_mixervoice_obj_t* voice = MP_OBJ_TO_PTR(self->voice[v]); + + mix_down_one_voice(self, voice, voices_active, word_buffer, length); + voices_active = true; + } + + if (!self->samples_signed) { + if (self->bits_per_sample == 16) { + for (uint32_t i = 0; i < length; i++) { + word_buffer[i] = tounsigned16(word_buffer[i]); + } + } else { + for (uint32_t i = 0; i < length; i++) { + word_buffer[i] = tounsigned8(word_buffer[i]); + } + } + } + + self->read_count += 1; + } else if (!self->use_first_buffer) { + *buffer = (uint8_t*) self->first_buffer; + } else { + *buffer = (uint8_t*) self->second_buffer; + } + + + if (channel == 0) { + self->left_read_count += 1; + } else if (channel == 1) { + self->right_read_count += 1; + *buffer = *buffer + self->bits_per_sample / 8; + } + return GET_BUFFER_MORE_DATA; +} + +void audiomixer_mixer_get_buffer_structure(audiomixer_mixer_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing) { + *single_buffer = false; + *samples_signed = self->samples_signed; + *max_buffer_length = self->len; + if (single_channel) { + *spacing = self->channel_count; + } else { + *spacing = 1; + } +} diff --git a/shared-module/audiomixer/Mixer.h b/shared-module/audiomixer/Mixer.h new file mode 100644 index 0000000000000..ab4780efc6ca7 --- /dev/null +++ b/shared-module/audiomixer/Mixer.h @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER_MIXER_H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER_MIXER_H + +#include "py/obj.h" +#include "py/objtuple.h" + +#include "shared-module/audiocore/__init__.h" + +typedef struct { + mp_obj_base_t base; + uint32_t* first_buffer; + uint32_t* second_buffer; + uint32_t len; // in words + uint8_t bits_per_sample; + bool use_first_buffer; + bool samples_signed; + uint8_t channel_count; + uint32_t sample_rate; + + uint32_t read_count; + uint32_t left_read_count; + uint32_t right_read_count; + + uint8_t voice_count; + mp_obj_tuple_t *voice_tuple; + mp_obj_t voice[]; +} audiomixer_mixer_obj_t; + + +// These are not available from Python because it may be called in an interrupt. +void audiomixer_mixer_reset_buffer(audiomixer_mixer_obj_t* self, + bool single_channel, + uint8_t channel); +audioio_get_buffer_result_t audiomixer_mixer_get_buffer(audiomixer_mixer_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length); // length in bytes +void audiomixer_mixer_get_buffer_structure(audiomixer_mixer_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER_MIXER_H diff --git a/shared-module/audiomixer/MixerVoice.c b/shared-module/audiomixer/MixerVoice.c new file mode 100644 index 0000000000000..9be104afcff5a --- /dev/null +++ b/shared-module/audiomixer/MixerVoice.c @@ -0,0 +1,87 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 DeanM for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "shared-bindings/audiomixer/Mixer.h" +#include "shared-module/audiomixer/MixerVoice.h" + +#include + +#include "py/runtime.h" +#include "shared-module/audiomixer/__init__.h" +#include "shared-module/audiocore/RawSample.h" + +void common_hal_audiomixer_mixervoice_construct(audiomixer_mixervoice_obj_t *self) { + self->sample = NULL; + self->level = 1 << 15; +} + +void common_hal_audiomixer_mixervoice_set_parent(audiomixer_mixervoice_obj_t* self, audiomixer_mixer_obj_t *parent) { + self->parent = parent; +} + +float common_hal_audiomixer_mixervoice_get_level(audiomixer_mixervoice_obj_t* self) { + return ((float) self->level / (1 << 15)); +} + +void common_hal_audiomixer_mixervoice_set_level(audiomixer_mixervoice_obj_t* self, float level) { + self->level = level * (1 << 15); +} + +void common_hal_audiomixer_mixervoice_play(audiomixer_mixervoice_obj_t* self, mp_obj_t sample, bool loop) { + if (audiosample_sample_rate(sample) != self->parent->sample_rate) { + mp_raise_ValueError(translate("The sample's sample rate does not match the mixer's")); + } + if (audiosample_channel_count(sample) != self->parent->channel_count) { + mp_raise_ValueError(translate("The sample's channel count does not match the mixer's")); + } + if (audiosample_bits_per_sample(sample) != self->parent->bits_per_sample) { + mp_raise_ValueError(translate("The sample's bits_per_sample does not match the mixer's")); + } + bool single_buffer; + bool samples_signed; + uint32_t max_buffer_length; + uint8_t spacing; + audiosample_get_buffer_structure(sample, false, &single_buffer, &samples_signed, + &max_buffer_length, &spacing); + if (samples_signed != self->parent->samples_signed) { + mp_raise_ValueError(translate("The sample's signedness does not match the mixer's")); + } + self->sample = sample; + self->loop = loop; + + audiosample_reset_buffer(sample, false, 0); + audioio_get_buffer_result_t result = audiosample_get_buffer(sample, false, 0, (uint8_t**) &self->remaining_buffer, &self->buffer_length); + // Track length in terms of words. + self->buffer_length /= sizeof(uint32_t); + self->more_data = result == GET_BUFFER_MORE_DATA; +} + +bool common_hal_audiomixer_mixervoice_get_playing(audiomixer_mixervoice_obj_t* self) { + return self->sample != NULL; +} + +void common_hal_audiomixer_mixervoice_stop(audiomixer_mixervoice_obj_t* self) { + self->sample = NULL; +} diff --git a/shared-module/audiomixer/MixerVoice.h b/shared-module/audiomixer/MixerVoice.h new file mode 100644 index 0000000000000..a85316e3d0058 --- /dev/null +++ b/shared-module/audiomixer/MixerVoice.h @@ -0,0 +1,46 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 DeanM for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef SHARED_MODULE_AUDIOMIXER_MIXERVOICE_H_ +#define SHARED_MODULE_AUDIOMIXER_MIXERVOICE_H_ + +#include "py/obj.h" + +#include "shared-module/audiomixer/__init__.h" +#include "shared-module/audiomixer/Mixer.h" + +typedef struct { + mp_obj_base_t base; + audiomixer_mixer_obj_t *parent; + mp_obj_t sample; + bool loop; + bool more_data; + uint32_t* remaining_buffer; + uint32_t buffer_length; + uint16_t level; +} audiomixer_mixervoice_obj_t; + + +#endif /* SHARED_MODULE_AUDIOMIXER_MIXERVOICE_H_ */ diff --git a/shared-module/audiomixer/__init__.c b/shared-module/audiomixer/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/audiomixer/__init__.h b/shared-module/audiomixer/__init__.h new file mode 100644 index 0000000000000..35b73155881f3 --- /dev/null +++ b/shared-module/audiomixer/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER__INIT__H + +#include "shared-module/audiocore/__init__.h" + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOMIXER__INIT__H diff --git a/shared-module/audiomp3/MP3Decoder.c b/shared-module/audiomp3/MP3Decoder.c new file mode 100644 index 0000000000000..30357c6161e55 --- /dev/null +++ b/shared-module/audiomp3/MP3Decoder.c @@ -0,0 +1,352 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/audiomp3/MP3Decoder.h" + +#include +#include +#include + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "shared-module/audiomp3/MP3Decoder.h" +#include "supervisor/shared/translate.h" +#include "lib/mp3/src/mp3common.h" + +#define MAX_BUFFER_LEN (MAX_NSAMP * MAX_NGRAN * MAX_NCHAN * sizeof(int16_t)) + +/** Fill the input buffer if it is less than half full. + * + * Returns true if the input buffer contains any useful data, + * false otherwise. (The input buffer will be padded to the end with + * 0 bytes, which do not interfere with MP3 decoding) + * + * Raises OSError if f_read fails. + * + * Sets self->eof if any read of the file returns 0 bytes + */ +STATIC bool mp3file_update_inbuf(audiomp3_mp3file_obj_t* self) { + // If buffer is over half full, do nothing + if (self->inbuf_offset < self->inbuf_length/2) return true; + + // If we didn't previously reach the end of file, we can try reading now + if (!self->eof) { + + // Move the unconsumed portion of the buffer to the start + uint8_t *end_of_buffer = self->inbuf + self->inbuf_length; + uint8_t *new_end_of_data = self->inbuf + self->inbuf_length - self->inbuf_offset; + memmove(self->inbuf, self->inbuf + self->inbuf_offset, + self->inbuf_length - self->inbuf_offset); + self->inbuf_offset = 0; + + UINT to_read = end_of_buffer - new_end_of_data; + UINT bytes_read = 0; + memset(new_end_of_data, 0, to_read); + if (f_read(&self->file->fp, new_end_of_data, to_read, &bytes_read) != FR_OK) { + self->eof = true; + mp_raise_OSError(MP_EIO); + } + + if (bytes_read == 0) { + self->eof = true; + } + + if (to_read != bytes_read) { + new_end_of_data += bytes_read; + memset(new_end_of_data, 0, end_of_buffer - new_end_of_data); + } + + } + + // Return true iff there are at least some useful bytes in the buffer + return self->inbuf_offset < self->inbuf_length; +} + +#define READ_PTR(self) (self->inbuf + self->inbuf_offset) +#define BYTES_LEFT(self) (self->inbuf_length - self->inbuf_offset) +#define CONSUME(self, n) (self->inbuf_offset += n) + +// http://id3.org/d3v2.3.0 +// http://id3.org/id3v2.3.0 +STATIC void mp3file_skip_id3v2(audiomp3_mp3file_obj_t* self) { + mp3file_update_inbuf(self); + if (BYTES_LEFT(self) < 10) { + return; + } + uint8_t *data = READ_PTR(self); + if (!( + data[0] == 'I' && + data[1] == 'D' && + data[2] == '3' && + data[3] != 0xff && + data[4] != 0xff && + (data[5] & 0x1f) == 0 && + (data[6] & 0x80) == 0 && + (data[7] & 0x80) == 0 && + (data[8] & 0x80) == 0 && + (data[9] & 0x80) == 0)) { + return; + } + uint32_t size = (data[6] << 21) | (data[7] << 14) | (data[8] << 7) | (data[9]); + size += 10; // size excludes the "header" (but not the "extended header") + // First, deduct from size whatever is left in buffer + uint32_t to_consume = MIN(size, BYTES_LEFT(self)); + CONSUME(self, to_consume); + size -= to_consume; + + // Next, seek in the file after the header + f_lseek(&self->file->fp, f_tell(&self->file->fp) + size); + return; +} + +/* If a sync word can be found, advance to it and return true. Otherwise, + * return false. + */ +STATIC bool mp3file_find_sync_word(audiomp3_mp3file_obj_t* self) { + do { + mp3file_update_inbuf(self); + int offset = MP3FindSyncWord(READ_PTR(self), BYTES_LEFT(self)); + if (offset >= 0) { + CONSUME(self, offset); + mp3file_update_inbuf(self); + return true; + } + CONSUME(self, MAX(0, BYTES_LEFT(self) - 16)); + } while (!self->eof); + return false; +} + +STATIC bool mp3file_get_next_frame_info(audiomp3_mp3file_obj_t* self, MP3FrameInfo* fi) { + int err; + do { + err = MP3GetNextFrameInfo(self->decoder, fi, READ_PTR(self)); + if (err == ERR_MP3_NONE) { + break; + } + CONSUME(self, 1); + mp3file_find_sync_word(self); + } while (!self->eof); + return err == ERR_MP3_NONE; +} + +void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, + pyb_file_obj_t* file, + uint8_t *buffer, + size_t buffer_size) { + // XXX Adafruit_MP3 uses a 2kB input buffer and two 4kB output buffers. + // for a whopping total of 10kB buffers (+mp3 decoder state and frame buffer) + // At 44kHz, that's 23ms of output audio data. + // + // We will choose a slightly different allocation strategy for the output: + // Make sure the buffers are sized exactly to match (a multiple of) the + // frame size; this is typically 2304 * 2 bytes, so a little bit bigger + // than the two 4kB output buffers, except that the alignment allows to + // never allocate that extra frame buffer. + + self->inbuf_length = 2048; + self->inbuf_offset = self->inbuf_length; + self->inbuf = m_malloc(self->inbuf_length, false); + if (self->inbuf == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate input buffer")); + } + self->decoder = MP3InitDecoder(); + if (self->decoder == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate decoder")); + } + + if ((intptr_t)buffer & 1) { + buffer += 1; buffer_size -= 1; + } + if (buffer_size >= 2 * MAX_BUFFER_LEN) { + self->buffers[0] = (int16_t*)(void*)buffer; + self->buffers[1] = (int16_t*)(void*)(buffer + MAX_BUFFER_LEN); + } else { + self->buffers[0] = m_malloc(MAX_BUFFER_LEN, false); + if (self->buffers[0] == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate first buffer")); + } + + self->buffers[1] = m_malloc(MAX_BUFFER_LEN, false); + if (self->buffers[1] == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate second buffer")); + } + } + + common_hal_audiomp3_mp3file_set_file(self, file); +} + +void common_hal_audiomp3_mp3file_set_file(audiomp3_mp3file_obj_t* self, pyb_file_obj_t* file) { + self->file = file; + f_lseek(&self->file->fp, 0); + self->inbuf_offset = self->inbuf_length; + self->eof = 0; + self->other_channel = -1; + mp3file_update_inbuf(self); + mp3file_find_sync_word(self); + // It **SHOULD** not be necessary to do this; the buffer should be filled + // with fresh content before it is returned by get_buffer(). The fact that + // this is necessary to avoid a glitch at the start of playback of a second + // track using the same decoder object means there's still a bug in + // get_buffer() that I didn't understand. + memset(self->buffers[0], 0, MAX_BUFFER_LEN); + memset(self->buffers[1], 0, MAX_BUFFER_LEN); + MP3FrameInfo fi; + if(!mp3file_get_next_frame_info(self, &fi)) { + mp_raise_msg(&mp_type_RuntimeError, + translate("Failed to parse MP3 file")); + } + + self->sample_rate = fi.samprate; + self->channel_count = fi.nChans; + self->frame_buffer_size = fi.outputSamps*sizeof(int16_t); + self->len = 2 * self->frame_buffer_size; +} + +void common_hal_audiomp3_mp3file_deinit(audiomp3_mp3file_obj_t* self) { + MP3FreeDecoder(self->decoder); + self->decoder = NULL; + self->inbuf = NULL; + self->buffers[0] = NULL; + self->buffers[1] = NULL; + self->file = NULL; +} + +bool common_hal_audiomp3_mp3file_deinited(audiomp3_mp3file_obj_t* self) { + return self->buffers[0] == NULL; +} + +uint32_t common_hal_audiomp3_mp3file_get_sample_rate(audiomp3_mp3file_obj_t* self) { + return self->sample_rate; +} + +void common_hal_audiomp3_mp3file_set_sample_rate(audiomp3_mp3file_obj_t* self, + uint32_t sample_rate) { + self->sample_rate = sample_rate; +} + +uint8_t common_hal_audiomp3_mp3file_get_bits_per_sample(audiomp3_mp3file_obj_t* self) { + return 16; +} + +uint8_t common_hal_audiomp3_mp3file_get_channel_count(audiomp3_mp3file_obj_t* self) { + return self->channel_count; +} + +bool audiomp3_mp3file_samples_signed(audiomp3_mp3file_obj_t* self) { + return true; +} + +void audiomp3_mp3file_reset_buffer(audiomp3_mp3file_obj_t* self, + bool single_channel, + uint8_t channel) { + if (single_channel && channel == 1) { + return; + } + // We don't reset the buffer index in case we're looping and we have an odd number of buffer + // loads + f_lseek(&self->file->fp, 0); + self->inbuf_offset = self->inbuf_length; + self->eof = 0; + self->other_channel = -1; + mp3file_update_inbuf(self); + mp3file_skip_id3v2(self); + mp3file_find_sync_word(self); +} + +audioio_get_buffer_result_t audiomp3_mp3file_get_buffer(audiomp3_mp3file_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** bufptr, + uint32_t* buffer_length) { + if (!self->inbuf) { + return GET_BUFFER_ERROR; + } + if (!single_channel) { + channel = 0; + } + + *buffer_length = self->frame_buffer_size; + + if (channel == self->other_channel) { + *bufptr = (uint8_t*)(self->buffers[self->other_buffer_index] + channel); + self->other_channel = -1; + return GET_BUFFER_MORE_DATA; + } + + + self->buffer_index = !self->buffer_index; + self->other_channel = 1-channel; + self->other_buffer_index = self->buffer_index; + int16_t *buffer = (int16_t *)(void *)self->buffers[self->buffer_index]; + *bufptr = (uint8_t*)buffer; + + mp3file_skip_id3v2(self); + if (!mp3file_find_sync_word(self)) { + return self->eof ? GET_BUFFER_DONE : GET_BUFFER_ERROR; + } + int bytes_left = BYTES_LEFT(self); + uint8_t *inbuf = READ_PTR(self); + int err = MP3Decode(self->decoder, &inbuf, &bytes_left, buffer, 0); + CONSUME(self, BYTES_LEFT(self) - bytes_left); + if (err) { + return GET_BUFFER_DONE; + } + + return GET_BUFFER_MORE_DATA; +} + +void audiomp3_mp3file_get_buffer_structure(audiomp3_mp3file_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing) { + *single_buffer = false; + *samples_signed = true; + *max_buffer_length = self->frame_buffer_size; + if (single_channel) { + *spacing = self->channel_count; + } else { + *spacing = 1; + } +} + +float common_hal_audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self) { + float sumsq = 0.f; + // Assumes no DC component to the audio. Is that a safe assumption? + int16_t *buffer = (int16_t *)(void *)self->buffers[self->buffer_index]; + for(size_t i=0; iframe_buffer_size / sizeof(int16_t); i++) { + sumsq += (float)buffer[i] * buffer[i]; + } + return sqrtf(sumsq) / (self->frame_buffer_size / sizeof(int16_t)); +} diff --git a/shared-module/audiomp3/MP3Decoder.h b/shared-module/audiomp3/MP3Decoder.h new file mode 100644 index 0000000000000..9ee1d0949bbe4 --- /dev/null +++ b/shared-module/audiomp3/MP3Decoder.h @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_MP3FILE_H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_MP3FILE_H + +#include "extmod/vfs_fat.h" +#include "py/obj.h" + +#include "shared-module/audiocore/__init__.h" + +typedef struct { + mp_obj_base_t base; + struct _MP3DecInfo *decoder; + uint8_t* inbuf; + uint32_t inbuf_length; + uint32_t inbuf_offset; + int16_t* buffers[2]; + uint32_t len; + uint32_t frame_buffer_size; + + uint32_t sample_rate; + pyb_file_obj_t* file; + + uint8_t buffer_index; + uint8_t channel_count; + bool eof; + + int8_t other_channel; + int8_t other_buffer_index; +} audiomp3_mp3file_obj_t; + +// These are not available from Python because it may be called in an interrupt. +void audiomp3_mp3file_reset_buffer(audiomp3_mp3file_obj_t* self, + bool single_channel, + uint8_t channel); +audioio_get_buffer_result_t audiomp3_mp3file_get_buffer(audiomp3_mp3file_obj_t* self, + bool single_channel, + uint8_t channel, + uint8_t** buffer, + uint32_t* buffer_length); // length in bytes +void audiomp3_mp3file_get_buffer_structure(audiomp3_mp3file_obj_t* self, bool single_channel, + bool* single_buffer, bool* samples_signed, + uint32_t* max_buffer_length, uint8_t* spacing); + +float audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_MP3FILE_H diff --git a/shared-module/audiomp3/__init__.c b/shared-module/audiomp3/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/audiomp3/__init__.h b/shared-module/audiomp3/__init__.h new file mode 100644 index 0000000000000..e7b1f3aab5347 --- /dev/null +++ b/shared-module/audiomp3/__init__.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOMP3__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOMP3__INIT__H + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOMP3__INIT__H diff --git a/shared-module/audiopwmio/__init__.c b/shared-module/audiopwmio/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/audiopwmio/__init__.h b/shared-module/audiopwmio/__init__.h new file mode 100644 index 0000000000000..964e4aafe2bc2 --- /dev/null +++ b/shared-module/audiopwmio/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_AUDIOPWMIO__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_AUDIOPWMIO__INIT__H + +#include "shared-module/audiocore/__init__.h" + +#endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOPWMIO__INIT__H diff --git a/shared-module/bitbangio/I2C.c b/shared-module/bitbangio/I2C.c index 7eeda0e00e9d6..5a9ac9a991788 100644 --- a/shared-module/bitbangio/I2C.c +++ b/shared-module/bitbangio/I2C.c @@ -25,16 +25,15 @@ */ #include "shared-bindings/bitbangio/I2C.h" - #include "py/mperrno.h" #include "py/obj.h" +#include "py/runtime.h" #include "common-hal/microcontroller/Pin.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-module/bitbangio/types.h" - -#define I2C_STRETCH_LIMIT 255 +#include "supervisor/shared/translate.h" STATIC void delay(bitbangio_i2c_obj_t *self) { // We need to use an accurate delay to get acceptable I2C @@ -48,11 +47,16 @@ STATIC void scl_low(bitbangio_i2c_obj_t *self) { STATIC void scl_release(bitbangio_i2c_obj_t *self) { common_hal_digitalio_digitalinout_set_value(&self->scl, true); + uint32_t count = self->us_timeout; delay(self); // For clock stretching, wait for the SCL pin to be released, with timeout. - for (int count = I2C_STRETCH_LIMIT; !common_hal_digitalio_digitalinout_get_value(&self->scl) && count; --count) { + for (; !common_hal_digitalio_digitalinout_get_value(&self->scl) && count; --count) { common_hal_mcu_delay_us(1); } + // raise exception on timeout + if (count == 0) { + mp_raise_msg(&mp_type_TimeoutError, translate("Clock stretch too long")); + } } STATIC void sda_low(bitbangio_i2c_obj_t *self) { @@ -142,7 +146,10 @@ STATIC bool read_byte(bitbangio_i2c_obj_t *self, uint8_t *val, bool ack) { void shared_module_bitbangio_i2c_construct(bitbangio_i2c_obj_t *self, const mcu_pin_obj_t * scl, const mcu_pin_obj_t * sda, - uint32_t frequency) { + uint32_t frequency, + uint32_t us_timeout) { + + self->us_timeout = us_timeout; self->us_delay = 500000 / frequency; if (self->us_delay == 0) { self->us_delay = 1; diff --git a/shared-module/bitbangio/OneWire.c b/shared-module/bitbangio/OneWire.c index e77bdb3b2961f..f5f4790876fbc 100644 --- a/shared-module/bitbangio/OneWire.c +++ b/shared-module/bitbangio/OneWire.c @@ -49,6 +49,9 @@ void shared_module_bitbangio_onewire_deinit(bitbangio_onewire_obj_t* self) { common_hal_digitalio_digitalinout_deinit(&self->pin); } +// We use common_hal_mcu_delay_us(). It should not be dependent on interrupts +// to do accurate timekeeping, since we disable interrupts during the delays below. + bool shared_module_bitbangio_onewire_reset(bitbangio_onewire_obj_t* self) { common_hal_mcu_disable_interrupts(); common_hal_digitalio_digitalinout_switch_to_output(&self->pin, false, DRIVE_MODE_OPEN_DRAIN); diff --git a/shared-module/bitbangio/SPI.c b/shared-module/bitbangio/SPI.c index e572d4aab1795..e0ff1184fedf7 100644 --- a/shared-module/bitbangio/SPI.c +++ b/shared-module/bitbangio/SPI.c @@ -24,15 +24,15 @@ * THE SOFTWARE. */ -#include "mpconfigport.h" - -#include "py/nlr.h" +#include "py/mpconfig.h" #include "py/obj.h" +#include "py/runtime.h" #include "common-hal/microcontroller/Pin.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-module/bitbangio/types.h" +#include "supervisor/shared/translate.h" #define MAX_BAUDRATE (common_hal_mcu_get_clock_frequency() / 48) @@ -41,27 +41,29 @@ void shared_module_bitbangio_spi_construct(bitbangio_spi_obj_t *self, const mcu_pin_obj_t * miso) { digitalinout_result_t result = common_hal_digitalio_digitalinout_construct(&self->clock, clock); if (result != DIGITALINOUT_OK) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "Clock pin init failed.")); + mp_raise_ValueError(translate("Clock pin init failed.")); } - if (mosi != mp_const_none) { + common_hal_digitalio_digitalinout_switch_to_output(&self->clock, self->polarity == 1, DRIVE_MODE_PUSH_PULL); + + if (mosi != NULL) { result = common_hal_digitalio_digitalinout_construct(&self->mosi, mosi); if (result != DIGITALINOUT_OK) { common_hal_digitalio_digitalinout_deinit(&self->clock); - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "MOSI pin init failed.")); + mp_raise_ValueError(translate("MOSI pin init failed.")); } self->has_mosi = true; + common_hal_digitalio_digitalinout_switch_to_output(&self->mosi, false, DRIVE_MODE_PUSH_PULL); } - if (miso != mp_const_none) { + + if (miso != NULL) { + // Starts out as input by default, no need to change. result = common_hal_digitalio_digitalinout_construct(&self->miso, miso); if (result != DIGITALINOUT_OK) { common_hal_digitalio_digitalinout_deinit(&self->clock); - if (mosi != mp_const_none) { + if (mosi != NULL) { common_hal_digitalio_digitalinout_deinit(&self->mosi); } - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "MISO pin init failed.")); + mp_raise_ValueError(translate("MISO pin init failed.")); } self->has_miso = true; } @@ -121,8 +123,7 @@ void shared_module_bitbangio_spi_unlock(bitbangio_spi_obj_t *self) { // Writes out the given data. bool shared_module_bitbangio_spi_write(bitbangio_spi_obj_t *self, const uint8_t *data, size_t len) { if (len > 0 && !self->has_mosi) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "Cannot write without MOSI pin.")); + mp_raise_ValueError(translate("Cannot write without MOSI pin.")); } uint32_t delay_half = self->delay_half; @@ -177,8 +178,7 @@ bool shared_module_bitbangio_spi_write(bitbangio_spi_obj_t *self, const uint8_t // Reads in len bytes while outputting zeroes. bool shared_module_bitbangio_spi_read(bitbangio_spi_obj_t *self, uint8_t *data, size_t len) { if (len > 0 && !self->has_miso) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "Cannot read without MISO pin.")); + mp_raise_ValueError(translate("Cannot read without MISO pin.")); } uint32_t delay_half = self->delay_half; @@ -242,8 +242,7 @@ bool shared_module_bitbangio_spi_read(bitbangio_spi_obj_t *self, uint8_t *data, // transfer bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self, const uint8_t *dout, uint8_t *din, size_t len) { if (len > 0 && (!self->has_mosi || !self->has_miso) ) { - nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, - "Cannot transfer without MOSI and MISO pins.")); + mp_raise_ValueError(translate("Cannot transfer without MOSI and MISO pins.")); } uint32_t delay_half = self->delay_half; diff --git a/shared-module/bitbangio/types.h b/shared-module/bitbangio/types.h index dfe50f049954c..6d17234741808 100644 --- a/shared-module/bitbangio/types.h +++ b/shared-module/bitbangio/types.h @@ -36,6 +36,7 @@ typedef struct { digitalio_digitalinout_obj_t scl; digitalio_digitalinout_obj_t sda; uint32_t us_delay; + uint32_t us_timeout; volatile bool locked; } bitbangio_i2c_obj_t; diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c new file mode 100644 index 0000000000000..789318a053a84 --- /dev/null +++ b/shared-module/board/__init__.c @@ -0,0 +1,164 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" +#include "mpconfigboard.h" +#include "py/runtime.h" + +#if CIRCUITPY_BUSIO +#include "shared-bindings/busio/I2C.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/busio/UART.h" +#endif + +#if CIRCUITPY_DISPLAYIO +#include "shared-module/displayio/__init__.h" +#endif + +#if BOARD_I2C +// Statically allocate the I2C object so it can live past the end of the heap and into the next VM. +// That way it can be used by built-in I2CDisplay displays and be accessible through board.I2C(). +STATIC busio_i2c_obj_t i2c_obj; +STATIC mp_obj_t i2c_singleton = NULL; + +mp_obj_t common_hal_board_get_i2c(void) { + return i2c_singleton; +} + +mp_obj_t common_hal_board_create_i2c(void) { + if (i2c_singleton != NULL) { + return i2c_singleton; + } + busio_i2c_obj_t *self = &i2c_obj; + self->base.type = &busio_i2c_type; + + common_hal_busio_i2c_construct(self, DEFAULT_I2C_BUS_SCL, DEFAULT_I2C_BUS_SDA, 400000, 0); + i2c_singleton = (mp_obj_t)self; + return i2c_singleton; +} +#endif + + +#if BOARD_SPI +// Statically allocate the SPI object so it can live past the end of the heap and into the next VM. +// That way it can be used by built-in FourWire displays and be accessible through board.SPI(). +STATIC busio_spi_obj_t spi_obj; +STATIC mp_obj_t spi_singleton = NULL; + +mp_obj_t common_hal_board_get_spi(void) { + return spi_singleton; +} + +mp_obj_t common_hal_board_create_spi(void) { + if (spi_singleton != NULL) { + return spi_singleton; + } + busio_spi_obj_t *self = &spi_obj; + self->base.type = &busio_spi_type; + + const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_SCK); + const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MOSI); + const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MISO); + common_hal_busio_spi_construct(self, clock, mosi, miso); + spi_singleton = (mp_obj_t)self; + return spi_singleton; +} +#endif + +#if BOARD_UART +mp_obj_t common_hal_board_get_uart(void) { + return MP_STATE_VM(shared_uart_bus); +} + +mp_obj_t common_hal_board_create_uart(void) { + busio_uart_obj_t *self = m_new_ll_obj(busio_uart_obj_t); + self->base.type = &busio_uart_type; + + const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RX); + const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_TX); +#ifdef DEFAULT_UART_BUS_RTS + const mcu_pin_obj_t* rts = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RTS); +#else + const mcu_pin_obj_t* rts = NULL; +#endif +#ifdef DEFAULT_UART_BUS_CTS + const mcu_pin_obj_t* cts = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_CTS); +#else + const mcu_pin_obj_t* cts = NULL; +#endif +#ifdef DEFAULT_UART_IS_RS485 + const mcu_pin_obj_t* rs485_dir = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RS485DIR); +#ifdef DEFAULT_UART_RS485_INVERT + const bool rs485_invert = true; +#else + const bool rs485_invert = false; +#endif +#else + const mcu_pin_obj_t* rs485_dir = NULL; + const bool rs485_invert = false; +#endif + + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert, + 9600, 8, PARITY_NONE, 1, 1.0f, 64); + MP_STATE_VM(shared_uart_bus) = MP_OBJ_FROM_PTR(self); + return MP_STATE_VM(shared_uart_bus); +} +#endif + +void reset_board_busses(void) { +#if BOARD_I2C + bool display_using_i2c = false; + #if CIRCUITPY_DISPLAYIO + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].i2cdisplay_bus.bus == i2c_singleton) { + display_using_i2c = true; + break; + } + } + #endif + if (!display_using_i2c) { + i2c_singleton = NULL; + } +#endif +#if BOARD_SPI + bool display_using_spi = false; + #if CIRCUITPY_DISPLAYIO + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].fourwire_bus.bus == spi_singleton) { + display_using_spi = true; + break; + } + } + #endif + if (!display_using_spi) { + spi_singleton = NULL; + } +#endif +#if BOARD_UART + MP_STATE_VM(shared_uart_bus) = NULL; +#endif +} diff --git a/shared-module/board/__init__.h b/shared-module/board/__init__.h new file mode 100644 index 0000000000000..f7eecd4170276 --- /dev/null +++ b/shared-module/board/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_BOARD__INIT__H +#define MICROPY_INCLUDED_SHARED_MODULE_BOARD__INIT__H + +void reset_board_busses(void); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_BOARD__INIT__H diff --git a/shared-module/busio/I2C.c b/shared-module/busio/I2C.c index 68d6ea22ab3ff..06e1af10a1cbc 100644 --- a/shared-module/busio/I2C.c +++ b/shared-module/busio/I2C.c @@ -30,8 +30,8 @@ #include "py/nlr.h" void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, - const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t freq) { - shared_module_bitbangio_i2c_construct(&self->bitbang, scl, sda, freq); + const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t freq, uint32_t timeout) { + shared_module_bitbangio_i2c_construct(&self->bitbang, scl, sda, freq, timeout); } bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { diff --git a/shared-module/displayio/Bitmap.c b/shared-module/displayio/Bitmap.c new file mode 100644 index 0000000000000..59971d25cc876 --- /dev/null +++ b/shared-module/displayio/Bitmap.c @@ -0,0 +1,164 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Bitmap.h" + +#include + +#include "py/runtime.h" + +void common_hal_displayio_bitmap_construct(displayio_bitmap_t *self, uint32_t width, + uint32_t height, uint32_t bits_per_value) { + uint32_t row_width = width * bits_per_value; + // align to size_t + uint8_t align_bits = 8 * sizeof(size_t); + if (row_width % align_bits != 0) { + self->stride = (row_width / align_bits + 1); + } else { + self->stride = row_width / align_bits; + } + self->width = width; + self->height = height; + self->data = m_malloc(self->stride * height * sizeof(size_t), false); + self->read_only = false; + self->bits_per_value = bits_per_value; + + if (bits_per_value > 8 && bits_per_value != 16 && bits_per_value != 32) { + mp_raise_NotImplementedError(translate("Invalid bits per value")); + } + + // Division and modulus can be slow because it has to handle any integer. We know bits_per_value + // is a power of two. We divide and mod by bits_per_value to compute the offset into the byte + // array. So, we can the offset computation to simplify to a shift for division and mask for mod. + + self->x_shift = 0; // Used to divide the index by the number of pixels per word. Its used in a + // shift which effectively divides by 2 ** x_shift. + uint32_t power_of_two = 1; + while (power_of_two < align_bits / bits_per_value ) { + self->x_shift++; + power_of_two <<= 1; + } + self->x_mask = (1 << self->x_shift) - 1; // Used as a modulus on the x value + self->bitmask = (1 << bits_per_value) - 1; + + self->dirty_area.x1 = 0; + self->dirty_area.x2 = width; + self->dirty_area.y1 = 0; + self->dirty_area.y2 = height; +} + +uint16_t common_hal_displayio_bitmap_get_height(displayio_bitmap_t *self) { + return self->height; +} + +uint16_t common_hal_displayio_bitmap_get_width(displayio_bitmap_t *self) { + return self->width; +} + +uint32_t common_hal_displayio_bitmap_get_bits_per_value(displayio_bitmap_t *self) { + return self->bits_per_value; +} + +uint32_t common_hal_displayio_bitmap_get_pixel(displayio_bitmap_t *self, int16_t x, int16_t y) { + if (x >= self->width || x < 0 || y >= self->height || y < 0) { + return 0; + } + int32_t row_start = y * self->stride; + uint32_t bytes_per_value = self->bits_per_value / 8; + if (bytes_per_value < 1) { + size_t word = self->data[row_start + (x >> self->x_shift)]; + + return (word >> (sizeof(size_t) * 8 - ((x & self->x_mask) + 1) * self->bits_per_value)) & self->bitmask; + } else { + size_t* row = self->data + row_start; + if (bytes_per_value == 1) { + return ((uint8_t*) row)[x]; + } else if (bytes_per_value == 2) { + return ((uint16_t*) row)[x]; + } else if (bytes_per_value == 4) { + return ((uint32_t*) row)[x]; + } + } + return 0; +} + +void common_hal_displayio_bitmap_set_pixel(displayio_bitmap_t *self, int16_t x, int16_t y, uint32_t value) { + if (self->read_only) { + mp_raise_RuntimeError(translate("Read-only object")); + } + // Update the dirty area. + if (self->dirty_area.x1 == self->dirty_area.x2) { + self->dirty_area.x1 = x; + self->dirty_area.x2 = x + 1; + self->dirty_area.y1 = y; + self->dirty_area.y2 = y + 1; + } else { + if (x < self->dirty_area.x1) { + self->dirty_area.x1 = x; + } else if (x >= self->dirty_area.x2) { + self->dirty_area.x2 = x + 1; + } + if (y < self->dirty_area.y1) { + self->dirty_area.y1 = y; + } else if (y >= self->dirty_area.y2) { + self->dirty_area.y2 = y + 1; + } + } + + // Update our data + int32_t row_start = y * self->stride; + uint32_t bytes_per_value = self->bits_per_value / 8; + if (bytes_per_value < 1) { + uint32_t bit_position = (sizeof(size_t) * 8 - ((x & self->x_mask) + 1) * self->bits_per_value); + uint32_t index = row_start + (x >> self->x_shift); + uint32_t word = self->data[index]; + word &= ~(self->bitmask << bit_position); + word |= (value & self->bitmask) << bit_position; + self->data[index] = word; + } else { + size_t* row = self->data + row_start; + if (bytes_per_value == 1) { + ((uint8_t*) row)[x] = value; + } else if (bytes_per_value == 2) { + ((uint16_t*) row)[x] = value; + } else if (bytes_per_value == 4) { + ((uint32_t*) row)[x] = value; + } + } +} + +displayio_area_t* displayio_bitmap_get_refresh_areas(displayio_bitmap_t *self, displayio_area_t* tail) { + if (self->dirty_area.x1 == self->dirty_area.x2) { + return tail; + } + self->dirty_area.next = tail; + return &self->dirty_area; +} + +void displayio_bitmap_finish_refresh(displayio_bitmap_t *self) { + self->dirty_area.x1 = 0; + self->dirty_area.x2 = 0; +} diff --git a/shared-module/displayio/Bitmap.h b/shared-module/displayio/Bitmap.h new file mode 100644 index 0000000000000..f4bd7ce4d328a --- /dev/null +++ b/shared-module/displayio/Bitmap.h @@ -0,0 +1,53 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_BITMAP_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_BITMAP_H + +#include +#include + +#include "py/obj.h" +#include "shared-module/displayio/area.h" + +typedef struct { + mp_obj_base_t base; + uint16_t width; + uint16_t height; + size_t* data; + uint16_t stride; // size_t's + uint8_t bits_per_value; + uint8_t x_shift; + size_t x_mask; + displayio_area_t dirty_area; + uint16_t bitmask; + bool read_only; +} displayio_bitmap_t; + +void displayio_bitmap_finish_refresh(displayio_bitmap_t *self); +displayio_area_t* displayio_bitmap_get_refresh_areas(displayio_bitmap_t *self, displayio_area_t* tail); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_BITMAP_H diff --git a/shared-module/displayio/ColorConverter.c b/shared-module/displayio/ColorConverter.c new file mode 100644 index 0000000000000..a5d7f0b051b61 --- /dev/null +++ b/shared-module/displayio/ColorConverter.c @@ -0,0 +1,193 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ColorConverter.h" + +#include "py/misc.h" + +uint32_t displayio_colorconverter_dither_noise_1 (uint32_t n) +{ + n = (n >> 13) ^ n; + int nn = (n * (n * n * 60493 + 19990303) + 1376312589) & 0x7fffffff; + return (uint32_t) (((float)nn / (1073741824.0f*2)) * 255); +} + +uint32_t displayio_colorconverter_dither_noise_2(uint32_t x, uint32_t y) { + return displayio_colorconverter_dither_noise_1(x + y * 0xFFFF); +} + +void common_hal_displayio_colorconverter_construct(displayio_colorconverter_t* self, bool dither) { + self->dither = dither; +} + +uint16_t displayio_colorconverter_compute_rgb565(uint32_t color_rgb888) { + uint32_t r5 = (color_rgb888 >> 19); + uint32_t g6 = (color_rgb888 >> 10) & 0x3f; + uint32_t b5 = (color_rgb888 >> 3) & 0x1f; + uint32_t packed = r5 << 11 | g6 << 5 | b5; + // swap bytes + return __builtin_bswap16(packed); +} + +uint8_t displayio_colorconverter_compute_luma(uint32_t color_rgb888) { + uint32_t r8 = (color_rgb888 >> 16); + uint32_t g8 = (color_rgb888 >> 8) & 0xff; + uint32_t b8 = color_rgb888 & 0xff; + return (r8 * 19) / 255 + (g8 * 182) / 255 + (b8 + 54) / 255; +} + +uint8_t displayio_colorconverter_compute_chroma(uint32_t color_rgb888) { + uint32_t r8 = (color_rgb888 >> 16); + uint32_t g8 = (color_rgb888 >> 8) & 0xff; + uint32_t b8 = color_rgb888 & 0xff; + uint8_t max = MAX(r8, MAX(g8, b8)); + uint8_t min = MIN(r8, MIN(g8, b8)); + return max - min; +} + +uint8_t displayio_colorconverter_compute_hue(uint32_t color_rgb888) { + uint32_t r8 = (color_rgb888 >> 16); + uint32_t g8 = (color_rgb888 >> 8) & 0xff; + uint32_t b8 = color_rgb888 & 0xff; + uint8_t max = MAX(r8, MAX(g8, b8)); + uint8_t min = MIN(r8, MIN(g8, b8)); + uint8_t c = max - min; + if (c == 0) { + return 0; + } + + int32_t hue = 0; + if (max == r8) { + hue = (((int32_t) (g8 - b8) * 40) / c) % 240; + } else if (max == g8) { + hue = (((int32_t) (b8 - r8) + (2 * c)) * 40) / c; + } else if (max == b8) { + hue = (((int32_t) (r8 - g8) + (4 * c)) * 40) / c; + } + if (hue < 0) { + hue += 240; + } + + return hue; +} + +void displayio_colorconverter_compute_tricolor(const _displayio_colorspace_t* colorspace, uint8_t pixel_hue, uint8_t pixel_luma, uint32_t* color) { + + int16_t hue_diff = colorspace->tricolor_hue - pixel_hue; + if ((-10 <= hue_diff && hue_diff <= 10) || hue_diff <= -220 || hue_diff >= 220) { + if (colorspace->grayscale) { + *color = 0; + } else { + *color = 1; + } + } else if (!colorspace->grayscale) { + *color = 0; + } +} + +void common_hal_displayio_colorconverter_convert(displayio_colorconverter_t *self, const _displayio_colorspace_t* colorspace, uint32_t input_color, uint32_t* output_color) { + displayio_input_pixel_t input_pixel; + input_pixel.pixel = input_color; + input_pixel.x = input_pixel.y = input_pixel.tile = input_pixel.tile_x = input_pixel.tile_y = 0; + + displayio_output_pixel_t output_pixel; + output_pixel.pixel = 0; + output_pixel.opaque = false; + + displayio_colorconverter_convert(self, colorspace, &input_pixel, &output_pixel); + + (*output_color) = output_pixel.pixel; +} + +void common_hal_displayio_colorconverter_set_dither(displayio_colorconverter_t* self, bool dither) { + self->dither = dither; +} + +bool common_hal_displayio_colorconverter_get_dither(displayio_colorconverter_t* self) { + return self->dither; +} + +void displayio_colorconverter_convert(displayio_colorconverter_t *self, const _displayio_colorspace_t* colorspace, const displayio_input_pixel_t *input_pixel, displayio_output_pixel_t *output_color) { + uint32_t pixel = input_pixel->pixel; + + if (self->dither){ + uint8_t randr = (displayio_colorconverter_dither_noise_2(input_pixel->tile_x,input_pixel->tile_y)); + uint8_t randg = (displayio_colorconverter_dither_noise_2(input_pixel->tile_x+33,input_pixel->tile_y)); + uint8_t randb = (displayio_colorconverter_dither_noise_2(input_pixel->tile_x,input_pixel->tile_y+33)); + + uint32_t r8 = (pixel >> 16); + uint32_t g8 = (pixel >> 8) & 0xff; + uint32_t b8 = pixel & 0xff; + + if (colorspace->depth == 16) { + b8 = MIN(255,b8 + (randb&0x07)); + r8 = MIN(255,r8 + (randr&0x07)); + g8 = MIN(255,g8 + (randg&0x03)); + } else { + int bitmask = 0xFF >> colorspace->depth; + b8 = MIN(255,b8 + (randb&bitmask)); + r8 = MIN(255,r8 + (randr&bitmask)); + g8 = MIN(255,g8 + (randg&bitmask)); + } + pixel = r8 << 16 | g8 << 8 | b8; + } + + if (colorspace->depth == 16) { + output_color->pixel = displayio_colorconverter_compute_rgb565(pixel); + output_color->opaque = true; + return; + } else if (colorspace->tricolor) { + uint8_t luma = displayio_colorconverter_compute_luma(pixel); + output_color->pixel = luma >> (8 - colorspace->depth); + if (displayio_colorconverter_compute_chroma(pixel) <= 16) { + if (!colorspace->grayscale) { + output_color->pixel = 0; + } + output_color->opaque = true; + return; + } + uint8_t pixel_hue = displayio_colorconverter_compute_hue(pixel); + displayio_colorconverter_compute_tricolor(colorspace, pixel_hue, luma, &output_color->pixel); + return; + } else if (colorspace->grayscale && colorspace->depth <= 8) { + uint8_t luma = displayio_colorconverter_compute_luma(pixel); + output_color->pixel = luma >> (8 - colorspace->depth); + output_color->opaque = true; + return; + } + output_color->opaque = false; +} + + + +// Currently no refresh logic is needed for a ColorConverter. +bool displayio_colorconverter_needs_refresh(displayio_colorconverter_t *self) { + return false; +} + +void displayio_colorconverter_finish_refresh(displayio_colorconverter_t *self) { +} + diff --git a/shared-module/displayio/ColorConverter.h b/shared-module/displayio/ColorConverter.h new file mode 100644 index 0000000000000..10b1604a4968a --- /dev/null +++ b/shared-module/displayio/ColorConverter.h @@ -0,0 +1,54 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_COLORCONVERTER_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_COLORCONVERTER_H + +#include +#include + +#include "py/obj.h" +#include "shared-module/displayio/Palette.h" + +typedef struct { + mp_obj_base_t base; + bool dither; +} displayio_colorconverter_t; + +bool displayio_colorconverter_needs_refresh(displayio_colorconverter_t *self); +void displayio_colorconverter_finish_refresh(displayio_colorconverter_t *self); +void displayio_colorconverter_convert(displayio_colorconverter_t *self, const _displayio_colorspace_t* colorspace, const displayio_input_pixel_t *input_pixel, displayio_output_pixel_t *output_color); + +uint32_t displayio_colorconverter_dither_noise_1 (uint32_t n); +uint32_t displayio_colorconverter_dither_noise_2(uint32_t x, uint32_t y); + +uint16_t displayio_colorconverter_compute_rgb565(uint32_t color_rgb888); +uint8_t displayio_colorconverter_compute_luma(uint32_t color_rgb888); +uint8_t displayio_colorconverter_compute_chroma(uint32_t color_rgb888); +uint8_t displayio_colorconverter_compute_hue(uint32_t color_rgb888); +void displayio_colorconverter_compute_tricolor(const _displayio_colorspace_t* colorspace, uint8_t pixel_hue, uint8_t pixel_luma, uint32_t* color); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_COLORCONVERTER_H diff --git a/shared-module/displayio/Display.c b/shared-module/displayio/Display.c new file mode 100644 index 0000000000000..2edded92780cd --- /dev/null +++ b/shared-module/displayio/Display.c @@ -0,0 +1,411 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Display.h" + +#include "py/runtime.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/displayio/I2CDisplay.h" +#include "shared-bindings/displayio/ParallelBus.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/display_core.h" +#include "supervisor/shared/display.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include +#include + +#include "tick.h" + +void common_hal_displayio_display_construct(displayio_display_obj_t* self, + mp_obj_t bus, uint16_t width, uint16_t height, int16_t colstart, int16_t rowstart, + uint16_t rotation, uint16_t color_depth, bool grayscale, bool pixels_in_byte_share_row, + uint8_t bytes_per_cell, bool reverse_pixels_in_byte, uint8_t set_column_command, + uint8_t set_row_command, uint8_t write_ram_command, uint8_t set_vertical_scroll, + uint8_t* init_sequence, uint16_t init_sequence_len, const mcu_pin_obj_t* backlight_pin, + uint16_t brightness_command, mp_float_t brightness, bool auto_brightness, + bool single_byte_bounds, bool data_as_commands, bool auto_refresh, uint16_t native_frames_per_second, bool backlight_on_high) { + // Turn off auto-refresh as we init. + self->auto_refresh = false; + uint16_t ram_width = 0x100; + uint16_t ram_height = 0x100; + if (single_byte_bounds) { + ram_width = 0xff; + ram_height = 0xff; + } + displayio_display_core_construct(&self->core, bus, width, height, ram_width, ram_height, colstart, rowstart, rotation, + color_depth, grayscale, pixels_in_byte_share_row, bytes_per_cell, reverse_pixels_in_byte); + + self->set_column_command = set_column_command; + self->set_row_command = set_row_command; + self->write_ram_command = write_ram_command; + self->brightness_command = brightness_command; + self->auto_brightness = auto_brightness; + self->first_manual_refresh = !auto_refresh; + self->data_as_commands = data_as_commands; + self->backlight_on_high = backlight_on_high; + + self->native_frames_per_second = native_frames_per_second; + self->native_ms_per_frame = 1000 / native_frames_per_second; + + uint32_t i = 0; + while (i < init_sequence_len) { + uint8_t *cmd = init_sequence + i; + uint8_t data_size = *(cmd + 1); + bool delay = (data_size & DELAY) != 0; + data_size &= ~DELAY; + uint8_t *data = cmd + 2; + while (!displayio_display_core_begin_transaction(&self->core)) { + RUN_BACKGROUND_TASKS; + } + if (self->data_as_commands) { + uint8_t full_command[data_size + 1]; + full_command[0] = cmd[0]; + memcpy(full_command + 1, data, data_size); + self->core.send(self->core.bus, DISPLAY_COMMAND, CHIP_SELECT_TOGGLE_EVERY_BYTE, full_command, data_size + 1); + } else { + self->core.send(self->core.bus, DISPLAY_COMMAND, CHIP_SELECT_TOGGLE_EVERY_BYTE, cmd, 1); + self->core.send(self->core.bus, DISPLAY_DATA, CHIP_SELECT_UNTOUCHED, data, data_size); + } + displayio_display_core_end_transaction(&self->core); + uint16_t delay_length_ms = 10; + if (delay) { + data_size++; + delay_length_ms = *(cmd + 1 + data_size); + if (delay_length_ms == 255) { + delay_length_ms = 500; + } + } + common_hal_time_delay_ms(delay_length_ms); + i += 2 + data_size; + } + + supervisor_start_terminal(width, height); + + // Always set the backlight type in case we're reusing memory. + self->backlight_inout.base.type = &mp_type_NoneType; + if (backlight_pin != NULL && common_hal_mcu_pin_is_free(backlight_pin)) { + pwmout_result_t result = common_hal_pulseio_pwmout_construct(&self->backlight_pwm, backlight_pin, 0, 50000, false); + if (result != PWMOUT_OK) { + self->backlight_inout.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->backlight_inout, backlight_pin); + common_hal_never_reset_pin(backlight_pin); + } else { + self->backlight_pwm.base.type = &pulseio_pwmout_type; + common_hal_pulseio_pwmout_never_reset(&self->backlight_pwm); + } + } + if (!self->auto_brightness && (self->backlight_inout.base.type != &mp_type_NoneType || + brightness_command != NO_BRIGHTNESS_COMMAND)) { + common_hal_displayio_display_set_brightness(self, brightness); + } else { + self->current_brightness = -1.0; + } + + // Set the group after initialization otherwise we may send pixels while we delay in + // initialization. + common_hal_displayio_display_show(self, &circuitpython_splash); + self->auto_refresh = auto_refresh; +} + +bool common_hal_displayio_display_show(displayio_display_obj_t* self, displayio_group_t* root_group) { + return displayio_display_core_show(&self->core, root_group); +} + +uint16_t common_hal_displayio_display_get_width(displayio_display_obj_t* self){ + return displayio_display_core_get_width(&self->core); +} + +uint16_t common_hal_displayio_display_get_height(displayio_display_obj_t* self){ + return displayio_display_core_get_height(&self->core); +} + +bool common_hal_displayio_display_get_auto_brightness(displayio_display_obj_t* self) { + return self->auto_brightness; +} + +void common_hal_displayio_display_set_auto_brightness(displayio_display_obj_t* self, bool auto_brightness) { + self->auto_brightness = auto_brightness; +} + +mp_float_t common_hal_displayio_display_get_brightness(displayio_display_obj_t* self) { + return self->current_brightness; +} + +bool common_hal_displayio_display_set_brightness(displayio_display_obj_t* self, mp_float_t brightness) { + self->updating_backlight = true; + if (!self->backlight_on_high){ + brightness = 1.0-brightness; + } + bool ok = false; + if (self->backlight_pwm.base.type == &pulseio_pwmout_type) { + common_hal_pulseio_pwmout_set_duty_cycle(&self->backlight_pwm, (uint16_t) (0xffff * brightness)); + ok = true; + } else if (self->backlight_inout.base.type == &digitalio_digitalinout_type) { + common_hal_digitalio_digitalinout_set_value(&self->backlight_inout, brightness > 0.99); + ok = true; + } else if (self->brightness_command != NO_BRIGHTNESS_COMMAND) { + ok = displayio_display_core_begin_transaction(&self->core); + if (ok) { + if (self->data_as_commands) { + uint8_t set_brightness[2] = {self->brightness_command, (uint8_t) (0xff * brightness)}; + self->core.send(self->core.bus, DISPLAY_COMMAND, CHIP_SELECT_TOGGLE_EVERY_BYTE, set_brightness, 2); + } else { + uint8_t command = self->brightness_command; + uint8_t hex_brightness = 0xff * brightness; + self->core.send(self->core.bus, DISPLAY_COMMAND, CHIP_SELECT_TOGGLE_EVERY_BYTE, &command, 1); + self->core.send(self->core.bus, DISPLAY_DATA, CHIP_SELECT_UNTOUCHED, &hex_brightness, 1); + } + displayio_display_core_end_transaction(&self->core); + } + + } + self->updating_backlight = false; + if (ok) { + self->current_brightness = brightness; + } + return ok; +} + +mp_obj_t common_hal_displayio_display_get_bus(displayio_display_obj_t* self) { + return self->core.bus; +} + +STATIC const displayio_area_t* _get_refresh_areas(displayio_display_obj_t *self) { + if (self->core.full_refresh) { + self->core.area.next = NULL; + return &self->core.area; + } else if (self->core.current_group != NULL) { + return displayio_group_get_refresh_areas(self->core.current_group, NULL); + } + return NULL; +} + +STATIC void _send_pixels(displayio_display_obj_t* self, uint8_t* pixels, uint32_t length) { + if (!self->data_as_commands) { + self->core.send(self->core.bus, DISPLAY_COMMAND, CHIP_SELECT_TOGGLE_EVERY_BYTE, &self->write_ram_command, 1); + } + self->core.send(self->core.bus, DISPLAY_DATA, CHIP_SELECT_UNTOUCHED, pixels, length); +} + +STATIC bool _refresh_area(displayio_display_obj_t* self, const displayio_area_t* area) { + uint16_t buffer_size = 128; // In uint32_ts + + displayio_area_t clipped; + // Clip the area to the display by overlapping the areas. If there is no overlap then we're done. + if (!displayio_display_core_clip_area(&self->core, area, &clipped)) { + return true; + } + uint16_t subrectangles = 1; + uint16_t rows_per_buffer = displayio_area_height(&clipped); + uint8_t pixels_per_word = (sizeof(uint32_t) * 8) / self->core.colorspace.depth; + uint16_t pixels_per_buffer = displayio_area_size(&clipped); + if (displayio_area_size(&clipped) > buffer_size * pixels_per_word) { + rows_per_buffer = buffer_size * pixels_per_word / displayio_area_width(&clipped); + if (rows_per_buffer == 0) { + rows_per_buffer = 1; + } + // If pixels are packed by column then ensure rows_per_buffer is on a byte boundary. + if (self->core.colorspace.depth < 8 && !self->core.colorspace.pixels_in_byte_share_row) { + uint8_t pixels_per_byte = 8 / self->core.colorspace.depth; + if (rows_per_buffer % pixels_per_byte != 0) { + rows_per_buffer -= rows_per_buffer % pixels_per_byte; + } + } + subrectangles = displayio_area_height(&clipped) / rows_per_buffer; + if (displayio_area_height(&clipped) % rows_per_buffer != 0) { + subrectangles++; + } + pixels_per_buffer = rows_per_buffer * displayio_area_width(&clipped); + buffer_size = pixels_per_buffer / pixels_per_word; + if (pixels_per_buffer % pixels_per_word) { + buffer_size += 1; + } + } + + // Allocated and shared as a uint32_t array so the compiler knows the + // alignment everywhere. + uint32_t buffer[buffer_size]; + uint32_t mask_length = (pixels_per_buffer / 32) + 1; + uint32_t mask[mask_length]; + uint16_t remaining_rows = displayio_area_height(&clipped); + + for (uint16_t j = 0; j < subrectangles; j++) { + displayio_area_t subrectangle = { + .x1 = clipped.x1, + .y1 = clipped.y1 + rows_per_buffer * j, + .x2 = clipped.x2, + .y2 = clipped.y1 + rows_per_buffer * (j + 1) + }; + if (remaining_rows < rows_per_buffer) { + subrectangle.y2 = subrectangle.y1 + remaining_rows; + } + remaining_rows -= rows_per_buffer; + + displayio_display_core_set_region_to_update(&self->core, self->set_column_command, self->set_row_command, NO_COMMAND, NO_COMMAND, self->data_as_commands, false, &subrectangle); + + uint16_t subrectangle_size_bytes; + if (self->core.colorspace.depth >= 8) { + subrectangle_size_bytes = displayio_area_size(&subrectangle) * (self->core.colorspace.depth / 8); + } else { + subrectangle_size_bytes = displayio_area_size(&subrectangle) / (8 / self->core.colorspace.depth); + } + + memset(mask, 0, mask_length * sizeof(mask[0])); + memset(buffer, 0, buffer_size * sizeof(buffer[0])); + + displayio_display_core_fill_area(&self->core, &subrectangle, mask, buffer); + + // Can't acquire display bus; skip the rest of the data. + if (!displayio_display_core_bus_free(&self->core)) { + return false; + } + + displayio_display_core_begin_transaction(&self->core); + _send_pixels(self, (uint8_t*) buffer, subrectangle_size_bytes); + displayio_display_core_end_transaction(&self->core); + + // TODO(tannewt): Make refresh displays faster so we don't starve other + // background tasks. + usb_background(); + } + return true; +} + +STATIC void _refresh_display(displayio_display_obj_t* self) { + if (!displayio_display_core_bus_free(&self->core)) { + // Can't acquire display bus; skip updating this display. Try next display. + return; + } + displayio_display_core_start_refresh(&self->core); + const displayio_area_t* current_area = _get_refresh_areas(self); + while (current_area != NULL) { + _refresh_area(self, current_area); + current_area = current_area->next; + } + displayio_display_core_finish_refresh(&self->core); +} + +void common_hal_displayio_display_set_rotation(displayio_display_obj_t* self, int rotation){ + bool transposed = (self->core.rotation == 90 || self->core.rotation == 270); + bool will_transposed = (rotation == 90 || rotation == 270); + if(transposed != will_transposed) { + int tmp = self->core.width; + self->core.width = self->core.height; + self->core.height = tmp; + } + displayio_display_core_set_rotation(&self->core, rotation); + supervisor_stop_terminal(); + supervisor_start_terminal(self->core.width, self->core.height); + if (self->core.current_group != NULL) { + displayio_group_update_transform(self->core.current_group, &self->core.transform); + } +} + +uint16_t common_hal_displayio_display_get_rotation(displayio_display_obj_t* self){ + return self->core.rotation; +} + + +bool common_hal_displayio_display_refresh(displayio_display_obj_t* self, uint32_t target_ms_per_frame, uint32_t maximum_ms_per_real_frame) { + if (!self->auto_refresh && !self->first_manual_refresh) { + uint64_t current_time = supervisor_ticks_ms64(); + uint32_t current_ms_since_real_refresh = current_time - self->core.last_refresh; + // Test to see if the real frame time is below our minimum. + if (current_ms_since_real_refresh > maximum_ms_per_real_frame) { + mp_raise_RuntimeError(translate("Below minimum frame rate")); + } + uint32_t current_ms_since_last_call = current_time - self->last_refresh_call; + self->last_refresh_call = current_time; + // Skip the actual refresh to help catch up. + if (current_ms_since_last_call > target_ms_per_frame) { + return false; + } + uint32_t remaining_time = target_ms_per_frame - (current_ms_since_real_refresh % target_ms_per_frame); + // We're ahead of the game so wait until we align with the frame rate. + while (supervisor_ticks_ms64() - self->last_refresh_call < remaining_time) { + RUN_BACKGROUND_TASKS; + } + } + self->first_manual_refresh = false; + _refresh_display(self); + return true; +} + +bool common_hal_displayio_display_get_auto_refresh(displayio_display_obj_t* self) { + return self->auto_refresh; +} + +void common_hal_displayio_display_set_auto_refresh(displayio_display_obj_t* self, + bool auto_refresh) { + self->first_manual_refresh = !auto_refresh; + self->auto_refresh = auto_refresh; +} + +STATIC void _update_backlight(displayio_display_obj_t* self) { + if (!self->auto_brightness || self->updating_backlight) { + return; + } + if (supervisor_ticks_ms64() - self->last_backlight_refresh < 100) { + return; + } + // TODO(tannewt): Fade the backlight based on it's existing value and a target value. The target + // should account for ambient light when possible. + common_hal_displayio_display_set_brightness(self, 1.0); + + self->last_backlight_refresh = supervisor_ticks_ms64(); +} + +void displayio_display_background(displayio_display_obj_t* self) { + _update_backlight(self); + + if (self->auto_refresh && (supervisor_ticks_ms64() - self->core.last_refresh) > self->native_ms_per_frame) { + _refresh_display(self); + } +} + +void release_display(displayio_display_obj_t* self) { + release_display_core(&self->core); + if (self->backlight_pwm.base.type == &pulseio_pwmout_type) { + common_hal_pulseio_pwmout_reset_ok(&self->backlight_pwm); + common_hal_pulseio_pwmout_deinit(&self->backlight_pwm); + } else if (self->backlight_inout.base.type == &digitalio_digitalinout_type) { + common_hal_digitalio_digitalinout_deinit(&self->backlight_inout); + } +} + +void reset_display(displayio_display_obj_t* self) { + self->auto_refresh = true; + self->auto_brightness = true; + common_hal_displayio_display_show(self, NULL); +} + +void displayio_display_collect_ptrs(displayio_display_obj_t* self) { + displayio_display_core_collect_ptrs(&self->core); +} diff --git a/shared-module/displayio/Display.h b/shared-module/displayio/Display.h new file mode 100644 index 0000000000000..8adaf597f91fb --- /dev/null +++ b/shared-module/displayio/Display.h @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_H + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/pulseio/PWMOut.h" + +#include "shared-module/displayio/area.h" +#include "shared-module/displayio/display_core.h" + +typedef struct { + mp_obj_base_t base; + displayio_display_core_t core; + union { + digitalio_digitalinout_obj_t backlight_inout; + pulseio_pwmout_obj_t backlight_pwm; + }; + uint64_t last_backlight_refresh; + uint64_t last_refresh_call; + mp_float_t current_brightness; + uint16_t brightness_command; + uint16_t native_frames_per_second; + uint16_t native_ms_per_frame; + uint8_t set_column_command; + uint8_t set_row_command; + uint8_t write_ram_command; + bool auto_refresh; + bool first_manual_refresh; + bool data_as_commands; + bool auto_brightness; + bool updating_backlight; + bool backlight_on_high; +} displayio_display_obj_t; + +void displayio_display_background(displayio_display_obj_t* self); +void release_display(displayio_display_obj_t* self); +void reset_display(displayio_display_obj_t* self); + +void displayio_display_collect_ptrs(displayio_display_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_H diff --git a/shared-module/displayio/EPaperDisplay.c b/shared-module/displayio/EPaperDisplay.c new file mode 100644 index 0000000000000..91d4bb7f9f251 --- /dev/null +++ b/shared-module/displayio/EPaperDisplay.c @@ -0,0 +1,389 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/EPaperDisplay.h" + +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/ColorConverter.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/displayio/I2CDisplay.h" +#include "shared-bindings/displayio/ParallelBus.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/display.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include +#include + +#include "tick.h" + +void common_hal_displayio_epaperdisplay_construct(displayio_epaperdisplay_obj_t* self, + mp_obj_t bus, uint8_t* start_sequence, uint16_t start_sequence_len, uint8_t* stop_sequence, uint16_t stop_sequence_len, + uint16_t width, uint16_t height, uint16_t ram_width, uint16_t ram_height, + int16_t colstart, int16_t rowstart, uint16_t rotation, + uint16_t set_column_window_command, uint16_t set_row_window_command, + uint16_t set_current_column_command, uint16_t set_current_row_command, + uint16_t write_black_ram_command, bool black_bits_inverted, uint16_t write_color_ram_command, bool color_bits_inverted, uint32_t highlight_color, uint16_t refresh_display_command, mp_float_t refresh_time, + const mcu_pin_obj_t* busy_pin, bool busy_state, mp_float_t seconds_per_frame, bool chip_select) { + if (highlight_color != 0x000000) { + self->core.colorspace.tricolor = true; + self->core.colorspace.tricolor_hue = displayio_colorconverter_compute_hue(highlight_color); + self->core.colorspace.tricolor_luma = displayio_colorconverter_compute_luma(highlight_color); + } + + displayio_display_core_construct(&self->core, bus, width, height, ram_width, ram_height, colstart, rowstart, rotation, 1, true, true, 1, true); + + self->set_column_window_command = set_column_window_command; + self->set_row_window_command = set_row_window_command; + self->set_current_column_command = set_current_column_command; + self->set_current_row_command = set_current_row_command; + self->write_black_ram_command = write_black_ram_command; + self->black_bits_inverted = black_bits_inverted; + self->write_color_ram_command = write_color_ram_command; + self->color_bits_inverted = color_bits_inverted; + self->refresh_display_command = refresh_display_command; + self->refresh_time = refresh_time * 1000; + self->busy_state = busy_state; + self->refreshing = false; + self->milliseconds_per_frame = seconds_per_frame * 1000; + self->chip_select = chip_select ? CHIP_SELECT_TOGGLE_EVERY_BYTE : CHIP_SELECT_UNTOUCHED; + + self->start_sequence = start_sequence; + self->start_sequence_len = start_sequence_len; + self->stop_sequence = stop_sequence; + self->stop_sequence_len = stop_sequence_len; + + self->busy.base.type = &mp_type_NoneType; + if (busy_pin != NULL) { + self->busy.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->busy, busy_pin); + common_hal_never_reset_pin(busy_pin); + } + + // Clear the color memory if it isn't in use. + if (highlight_color == 0x00 && write_color_ram_command != NO_COMMAND) { + // TODO: Clear + } + + supervisor_start_terminal(width, height); + + // Set the group after initialization otherwise we may send pixels while we delay in + // initialization. + common_hal_displayio_epaperdisplay_show(self, &circuitpython_splash); +} + +bool common_hal_displayio_epaperdisplay_show(displayio_epaperdisplay_obj_t* self, displayio_group_t* root_group) { + return displayio_display_core_show(&self->core, root_group); +} + +const displayio_area_t* displayio_epaperdisplay_get_refresh_areas(displayio_epaperdisplay_obj_t *self) { + if (self->core.full_refresh) { + self->core.area.next = NULL; + return &self->core.area; + } + const displayio_area_t* first_area = NULL; + if (self->core.current_group != NULL) { + first_area = displayio_group_get_refresh_areas(self->core.current_group, NULL); + } + if (first_area != NULL && self->set_row_window_command == NO_COMMAND) { + self->core.area.next = NULL; + return &self->core.area; + } + return first_area; +} + +uint16_t common_hal_displayio_epaperdisplay_get_width(displayio_epaperdisplay_obj_t* self){ + return displayio_display_core_get_width(&self->core); +} + +uint16_t common_hal_displayio_epaperdisplay_get_height(displayio_epaperdisplay_obj_t* self){ + return displayio_display_core_get_height(&self->core); +} + +STATIC void wait_for_busy(displayio_epaperdisplay_obj_t* self) { + if (self->busy.base.type == &mp_type_NoneType) { + return; + } + while (common_hal_digitalio_digitalinout_get_value(&self->busy) == self->busy_state) { + RUN_BACKGROUND_TASKS; + } +} + +STATIC void send_command_sequence(displayio_epaperdisplay_obj_t* self, bool should_wait_for_busy, uint8_t* sequence, uint32_t sequence_len) { + uint32_t i = 0; + while (i < sequence_len) { + uint8_t *cmd = sequence + i; + uint8_t data_size = *(cmd + 1); + bool delay = (data_size & DELAY) != 0; + data_size &= ~DELAY; + uint8_t *data = cmd + 2; + displayio_display_core_begin_transaction(&self->core); + self->core.send(self->core.bus, DISPLAY_COMMAND, self->chip_select, cmd, 1); + self->core.send(self->core.bus, DISPLAY_DATA, self->chip_select, data, data_size); + displayio_display_core_end_transaction(&self->core); + uint16_t delay_length_ms = 0; + if (delay) { + data_size++; + delay_length_ms = *(cmd + 1 + data_size); + if (delay_length_ms == 255) { + delay_length_ms = 500; + } + } + common_hal_time_delay_ms(delay_length_ms); + if (should_wait_for_busy) { + wait_for_busy(self); + } + i += 2 + data_size; + } +} + +void displayio_epaperdisplay_start_refresh(displayio_epaperdisplay_obj_t* self) { + // run start sequence + self->core.bus_reset(self->core.bus); + + send_command_sequence(self, true, self->start_sequence, self->start_sequence_len); + displayio_display_core_start_refresh(&self->core); +} + +uint32_t common_hal_displayio_epaperdisplay_get_time_to_refresh(displayio_epaperdisplay_obj_t* self) { + if (self->core.last_refresh == 0) { + return 0; + } + // Refresh at seconds per frame rate. + uint32_t elapsed_time = supervisor_ticks_ms64() - self->core.last_refresh; + if (elapsed_time > self->milliseconds_per_frame) { + return 0; + } + return self->milliseconds_per_frame - elapsed_time; +} + +void displayio_epaperdisplay_finish_refresh(displayio_epaperdisplay_obj_t* self) { + // Actually refresh the display now that all pixel RAM has been updated. + displayio_display_core_begin_transaction(&self->core); + self->core.send(self->core.bus, DISPLAY_COMMAND, self->chip_select, &self->refresh_display_command, 1); + displayio_display_core_end_transaction(&self->core); + self->refreshing = true; + + displayio_display_core_finish_refresh(&self->core); +} + +mp_obj_t common_hal_displayio_epaperdisplay_get_bus(displayio_epaperdisplay_obj_t* self) { + return self->core.bus; +} + +bool displayio_epaperdisplay_refresh_area(displayio_epaperdisplay_obj_t* self, const displayio_area_t* area) { + uint16_t buffer_size = 128; // In uint32_ts + + displayio_area_t clipped; + // Clip the area to the display by overlapping the areas. If there is no overlap then we're done. + if (!displayio_display_core_clip_area(&self->core, area, &clipped)) { + return true; + } + uint16_t subrectangles = 1; + uint16_t rows_per_buffer = displayio_area_height(&clipped); + uint8_t pixels_per_word = (sizeof(uint32_t) * 8) / self->core.colorspace.depth; + uint16_t pixels_per_buffer = displayio_area_size(&clipped); + if (displayio_area_size(&clipped) > buffer_size * pixels_per_word) { + rows_per_buffer = buffer_size * pixels_per_word / displayio_area_width(&clipped); + if (rows_per_buffer == 0) { + rows_per_buffer = 1; + } + subrectangles = displayio_area_height(&clipped) / rows_per_buffer; + if (displayio_area_height(&clipped) % rows_per_buffer != 0) { + subrectangles++; + } + pixels_per_buffer = rows_per_buffer * displayio_area_width(&clipped); + buffer_size = pixels_per_buffer / pixels_per_word; + if (pixels_per_buffer % pixels_per_word) { + buffer_size += 1; + } + } + + // Allocated and shared as a uint32_t array so the compiler knows the + // alignment everywhere. + uint32_t buffer[buffer_size]; + volatile uint32_t mask_length = (pixels_per_buffer / 32) + 1; + uint32_t mask[mask_length]; + + uint8_t passes = 1; + if (self->core.colorspace.tricolor) { + passes = 2; + } + for (uint8_t pass = 0; pass < passes; pass++) { + uint16_t remaining_rows = displayio_area_height(&clipped); + + if (self->set_row_window_command != NO_COMMAND) { + displayio_display_core_set_region_to_update(&self->core, self->set_column_window_command, self->set_row_window_command, self->set_current_column_command, self->set_current_row_command, false, self->chip_select, &clipped); + } + + uint8_t write_command = self->write_black_ram_command; + if (pass == 1) { + write_command = self->write_color_ram_command; + } + displayio_display_core_begin_transaction(&self->core); + self->core.send(self->core.bus, DISPLAY_COMMAND, self->chip_select, &write_command, 1); + displayio_display_core_end_transaction(&self->core); + + for (uint16_t j = 0; j < subrectangles; j++) { + displayio_area_t subrectangle = { + .x1 = clipped.x1, + .y1 = clipped.y1 + rows_per_buffer * j, + .x2 = clipped.x2, + .y2 = clipped.y1 + rows_per_buffer * (j + 1) + }; + if (remaining_rows < rows_per_buffer) { + subrectangle.y2 = subrectangle.y1 + remaining_rows; + } + remaining_rows -= rows_per_buffer; + + + uint16_t subrectangle_size_bytes = displayio_area_size(&subrectangle) / (8 / self->core.colorspace.depth); + + memset(mask, 0, mask_length * sizeof(mask[0])); + memset(buffer, 0, buffer_size * sizeof(buffer[0])); + + self->core.colorspace.grayscale = true; + if (pass == 1) { + self->core.colorspace.grayscale = false; + } + displayio_display_core_fill_area(&self->core, &subrectangle, mask, buffer); + + // Invert it all. + if ((pass == 1 && self->color_bits_inverted) || + (pass == 0 && self->black_bits_inverted)) { + for (uint16_t k = 0; k < buffer_size; k++) { + buffer[k] = ~buffer[k]; + } + } + + if (!displayio_display_core_begin_transaction(&self->core)) { + // Can't acquire display bus; skip the rest of the data. Try next display. + return false; + } + self->core.send(self->core.bus, DISPLAY_DATA, self->chip_select, (uint8_t*) buffer, subrectangle_size_bytes); + displayio_display_core_end_transaction(&self->core); + + // TODO(tannewt): Make refresh displays faster so we don't starve other + // background tasks. + usb_background(); + } + } + + return true; +} + +bool common_hal_displayio_epaperdisplay_refresh(displayio_epaperdisplay_obj_t* self) { + + if (self->refreshing && self->busy.base.type == &digitalio_digitalinout_type) { + if (common_hal_digitalio_digitalinout_get_value(&self->busy) != self->busy_state) { + self->refreshing = false; + // Run stop sequence but don't wait for busy because busy is set when sleeping. + send_command_sequence(self, false, self->stop_sequence, self->stop_sequence_len); + } else { + return false; + } + } + if (self->core.current_group == NULL) { + return true; + } + // Refresh at seconds per frame rate. + if (common_hal_displayio_epaperdisplay_get_time_to_refresh(self) > 0) { + return false; + } + if (!displayio_display_core_bus_free(&self->core)) { + // Can't acquire display bus; skip updating this display. Try next display. + return false; + } + const displayio_area_t* current_area = displayio_epaperdisplay_get_refresh_areas(self); + if (current_area == NULL) { + return true; + } + displayio_epaperdisplay_start_refresh(self); + while (current_area != NULL) { + displayio_epaperdisplay_refresh_area(self, current_area); + current_area = current_area->next; + } + displayio_epaperdisplay_finish_refresh(self); + return true; +} + +void displayio_epaperdisplay_background(displayio_epaperdisplay_obj_t* self) { + if (self->refreshing) { + bool refresh_done = false; + if (self->busy.base.type == &digitalio_digitalinout_type) { + bool busy = common_hal_digitalio_digitalinout_get_value(&self->busy); + refresh_done = busy != self->busy_state; + } else { + refresh_done = supervisor_ticks_ms64() - self->core.last_refresh > self->refresh_time; + } + if (refresh_done) { + self->refreshing = false; + // Run stop sequence but don't wait for busy because busy is set when sleeping. + send_command_sequence(self, false, self->stop_sequence, self->stop_sequence_len); + } + } +} + +void release_epaperdisplay(displayio_epaperdisplay_obj_t* self) { + if (self->refreshing) { + wait_for_busy(self); + self->refreshing = false; + // Run stop sequence but don't wait for busy because busy is set when sleeping. + send_command_sequence(self, false, self->stop_sequence, self->stop_sequence_len); + } + + release_display_core(&self->core); + if (self->busy.base.type == &digitalio_digitalinout_type) { + common_hal_digitalio_digitalinout_deinit(&self->busy); + } +} + +void displayio_epaperdisplay_collect_ptrs(displayio_epaperdisplay_obj_t* self) { + displayio_display_core_collect_ptrs(&self->core); + gc_collect_ptr(self->start_sequence); + gc_collect_ptr(self->stop_sequence); +} + +bool maybe_refresh_epaperdisplay(void) { + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].epaper_display.base.type != &displayio_epaperdisplay_type || + displays[i].epaper_display.core.current_group != &circuitpython_splash) { + // Skip regular displays and those not showing the splash. + continue; + } + displayio_epaperdisplay_obj_t* display = &displays[i].epaper_display; + if (common_hal_displayio_epaperdisplay_get_time_to_refresh(display) != 0) { + return false; + } + return common_hal_displayio_epaperdisplay_refresh(display); + } + // Return true if no ePaper displays are available to pretend it was updated. + return true; +} diff --git a/shared-module/displayio/EPaperDisplay.h b/shared-module/displayio/EPaperDisplay.h new file mode 100644 index 0000000000000..d08bed5462643 --- /dev/null +++ b/shared-module/displayio/EPaperDisplay.h @@ -0,0 +1,68 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_EPAPERDISPLAY_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_EPAPERDISPLAY_H + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/pulseio/PWMOut.h" + +#include "shared-module/displayio/area.h" +#include "shared-module/displayio/display_core.h" + +typedef struct { + mp_obj_base_t base; + displayio_display_core_t core; + digitalio_digitalinout_obj_t busy; + uint32_t milliseconds_per_frame; + uint8_t* start_sequence; + uint32_t start_sequence_len; + uint8_t* stop_sequence; + uint32_t stop_sequence_len; + uint16_t refresh_time; + uint16_t set_column_window_command; + uint16_t set_row_window_command; + uint16_t set_current_column_command; + uint16_t set_current_row_command; + uint16_t write_black_ram_command; + uint16_t write_color_ram_command; + uint8_t refresh_display_command; + uint8_t hue; + bool busy_state; + bool black_bits_inverted; + bool color_bits_inverted; + bool refreshing; + display_chip_select_behavior_t chip_select; +} displayio_epaperdisplay_obj_t; + +void displayio_epaperdisplay_background(displayio_epaperdisplay_obj_t* self); +void release_epaperdisplay(displayio_epaperdisplay_obj_t* self); +bool maybe_refresh_epaperdisplay(void); + +void displayio_epaperdisplay_collect_ptrs(displayio_epaperdisplay_obj_t* self); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_EPAPERDISPLAY_H diff --git a/shared-module/displayio/FourWire.c b/shared-module/displayio/FourWire.c new file mode 100644 index 0000000000000..fe7234aa7a401 --- /dev/null +++ b/shared-module/displayio/FourWire.c @@ -0,0 +1,137 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/FourWire.h" + +#include + +#include "py/gc.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/display_core.h" + +#include "tick.h" + +void common_hal_displayio_fourwire_construct(displayio_fourwire_obj_t* self, + busio_spi_obj_t* spi, const mcu_pin_obj_t* command, + const mcu_pin_obj_t* chip_select, const mcu_pin_obj_t* reset, uint32_t baudrate, + uint8_t polarity, uint8_t phase) { + + self->bus = spi; + common_hal_busio_spi_never_reset(self->bus); + // Our object is statically allocated off the heap so make sure the bus object lives to the end + // of the heap as well. + gc_never_free(self->bus); + + self->frequency = baudrate; + self->polarity = polarity; + self->phase = phase; + + common_hal_digitalio_digitalinout_construct(&self->command, command); + common_hal_digitalio_digitalinout_switch_to_output(&self->command, true, DRIVE_MODE_PUSH_PULL); + common_hal_digitalio_digitalinout_construct(&self->chip_select, chip_select); + common_hal_digitalio_digitalinout_switch_to_output(&self->chip_select, true, DRIVE_MODE_PUSH_PULL); + + self->reset.base.type = &mp_type_NoneType; + if (reset != NULL) { + self->reset.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->reset, reset); + common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL); + common_hal_never_reset_pin(reset); + common_hal_displayio_fourwire_reset(self); + } + + common_hal_never_reset_pin(command); + common_hal_never_reset_pin(chip_select); +} + +void common_hal_displayio_fourwire_deinit(displayio_fourwire_obj_t* self) { + if (self->bus == &self->inline_bus) { + common_hal_busio_spi_deinit(self->bus); + } + + common_hal_reset_pin(self->command.pin); + common_hal_reset_pin(self->chip_select.pin); + common_hal_reset_pin(self->reset.pin); +} + +bool common_hal_displayio_fourwire_reset(mp_obj_t obj) { + displayio_fourwire_obj_t* self = MP_OBJ_TO_PTR(obj); + if (self->reset.base.type == &mp_type_NoneType) { + return false; + } + common_hal_digitalio_digitalinout_set_value(&self->reset, false); + common_hal_time_delay_ms(1); + common_hal_digitalio_digitalinout_set_value(&self->reset, true); + common_hal_time_delay_ms(1); + return true; +} + +bool common_hal_displayio_fourwire_bus_free(mp_obj_t obj) { + displayio_fourwire_obj_t* self = MP_OBJ_TO_PTR(obj); + if (!common_hal_busio_spi_try_lock(self->bus)) { + return false; + } + common_hal_busio_spi_unlock(self->bus); + return true; +} + +bool common_hal_displayio_fourwire_begin_transaction(mp_obj_t obj) { + displayio_fourwire_obj_t* self = MP_OBJ_TO_PTR(obj); + if (!common_hal_busio_spi_try_lock(self->bus)) { + return false; + } + common_hal_busio_spi_configure(self->bus, self->frequency, self->polarity, + self->phase, 8); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, false); + return true; +} + +void common_hal_displayio_fourwire_send(mp_obj_t obj, display_byte_type_t data_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + displayio_fourwire_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->command, data_type == DISPLAY_DATA); + if (chip_select == CHIP_SELECT_TOGGLE_EVERY_BYTE) { + // Toggle chip select after each command byte in case the display driver + // IC latches commands based on it. + for (size_t i = 0; i < data_length; i++) { + common_hal_busio_spi_write(self->bus, &data[i], 1); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, true); + common_hal_mcu_delay_us(1); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, false); + } + } else { + common_hal_busio_spi_write(self->bus, data, data_length); + } +} + +void common_hal_displayio_fourwire_end_transaction(mp_obj_t obj) { + displayio_fourwire_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, true); + common_hal_busio_spi_unlock(self->bus); +} diff --git a/shared-module/displayio/FourWire.h b/shared-module/displayio/FourWire.h new file mode 100644 index 0000000000000..a4260a3ac50ca --- /dev/null +++ b/shared-module/displayio/FourWire.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_FOURWIRE_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_FOURWIRE_H + +#include "common-hal/busio/SPI.h" +#include "common-hal/digitalio/DigitalInOut.h" +#include "shared-module/displayio/Group.h" + +typedef struct { + mp_obj_base_t base; + busio_spi_obj_t* bus; + busio_spi_obj_t inline_bus; + digitalio_digitalinout_obj_t command; + digitalio_digitalinout_obj_t chip_select; + digitalio_digitalinout_obj_t reset; + uint32_t frequency; + uint8_t polarity; + uint8_t phase; +} displayio_fourwire_obj_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_FOURWIRE_H diff --git a/shared-module/displayio/Group.c b/shared-module/displayio/Group.c new file mode 100644 index 0000000000000..d69e9f58593ec --- /dev/null +++ b/shared-module/displayio/Group.c @@ -0,0 +1,363 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Group.h" + +#include "py/runtime.h" +#include "shared-bindings/displayio/TileGrid.h" + +void common_hal_displayio_group_construct(displayio_group_t* self, uint32_t max_size, uint32_t scale, mp_int_t x, mp_int_t y) { + displayio_group_child_t* children = m_new(displayio_group_child_t, max_size); + displayio_group_construct(self, children, max_size, scale, x, y); +} + +bool common_hal_displayio_group_get_hidden(displayio_group_t* self) { + return self->hidden; +} + +void common_hal_displayio_group_set_hidden(displayio_group_t* self, bool hidden) { + if (self->hidden == hidden) { + return; + } + self->hidden = hidden; + if (self->hidden_by_parent) { + return; + } + for (size_t i = 0; i < self->size; i++) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + displayio_tilegrid_set_hidden_by_parent(layer, hidden); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + displayio_group_set_hidden_by_parent(layer, hidden); + } + } +} + +void displayio_group_set_hidden_by_parent(displayio_group_t *self, bool hidden) { + if (self->hidden_by_parent == hidden) { + return; + } + self->hidden_by_parent = hidden; + // If we're already hidden, then we're done. + if (self->hidden) { + return; + } + for (size_t i = 0; i < self->size; i++) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + displayio_tilegrid_set_hidden_by_parent(layer, hidden); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + displayio_group_set_hidden_by_parent(layer, hidden); + } + } +} + +uint32_t common_hal_displayio_group_get_scale(displayio_group_t* self) { + return self->scale; +} + +bool displayio_group_get_previous_area(displayio_group_t *self, displayio_area_t* area) { + bool first = true; + for (size_t i = 0; i < self->size; i++) { + mp_obj_t layer = self->children[i].native; + displayio_area_t layer_area; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + if (!displayio_tilegrid_get_previous_area(layer, &layer_area)) { + continue; + } + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + if (!displayio_group_get_previous_area(layer, &layer_area)) { + continue; + } + } + if (first) { + displayio_area_copy(&layer_area, area); + first = false; + } else { + displayio_area_expand(area, &layer_area); + } + } + if (self->item_removed) { + if (first) { + displayio_area_copy(&self->dirty_area, area); + first = false; + } else { + displayio_area_expand(area, &self->dirty_area); + } + } + return !first; +} + +static void _update_child_transforms(displayio_group_t* self) { + if (!self->in_group) { + return; + } + for (size_t i = 0; i < self->size; i++) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + displayio_tilegrid_update_transform(layer, &self->absolute_transform); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + displayio_group_update_transform(layer, &self->absolute_transform); + } + } +} + +void displayio_group_update_transform(displayio_group_t *self, + const displayio_buffer_transform_t* parent_transform) { + self->in_group = parent_transform != NULL; + if (self->in_group) { + int16_t x = self->x; + int16_t y = self->y; + if (parent_transform->transpose_xy) { + x = y; + y = self->x; + } + self->absolute_transform.x = parent_transform->x + parent_transform->dx * x; + self->absolute_transform.y = parent_transform->y + parent_transform->dy * y; + self->absolute_transform.dx = parent_transform->dx * self->scale; + self->absolute_transform.dy = parent_transform->dy * self->scale; + self->absolute_transform.transpose_xy = parent_transform->transpose_xy; + self->absolute_transform.mirror_x = parent_transform->mirror_x; + self->absolute_transform.mirror_y = parent_transform->mirror_y; + + self->absolute_transform.scale = parent_transform->scale * self->scale; + } + _update_child_transforms(self); +} + +void common_hal_displayio_group_set_scale(displayio_group_t* self, uint32_t scale) { + if (self->scale == scale) { + return; + } + uint8_t parent_scale = self->absolute_transform.scale / self->scale; + self->absolute_transform.dx = self->absolute_transform.dx / self->scale * scale; + self->absolute_transform.dy = self->absolute_transform.dy / self->scale * scale; + self->absolute_transform.scale = parent_scale * scale; + self->scale = scale; + _update_child_transforms(self); +} + +mp_int_t common_hal_displayio_group_get_x(displayio_group_t* self) { + return self->x; +} + +void common_hal_displayio_group_set_x(displayio_group_t* self, mp_int_t x) { + if (self->x == x) { + return; + } + if (self->absolute_transform.transpose_xy) { + int16_t dy = self->absolute_transform.dy / self->scale; + self->absolute_transform.y += dy * (x - self->x); + } else { + int16_t dx = self->absolute_transform.dx / self->scale; + self->absolute_transform.x += dx * (x - self->x); + } + + self->x = x; + _update_child_transforms(self); +} + +mp_int_t common_hal_displayio_group_get_y(displayio_group_t* self) { + return self->y; +} + +void common_hal_displayio_group_set_y(displayio_group_t* self, mp_int_t y) { + if (self->y == y) { + return; + } + if (self->absolute_transform.transpose_xy) { + int8_t dx = self->absolute_transform.dx / self->scale; + self->absolute_transform.x += dx * (y - self->y); + } else { + int8_t dy = self->absolute_transform.dy / self->scale; + self->absolute_transform.y += dy * (y - self->y); + } + self->y = y; + _update_child_transforms(self); +} + +static mp_obj_t _add_layer(displayio_group_t* self, mp_obj_t layer) { + mp_obj_t native_layer = mp_instance_cast_to_native_base(layer, &displayio_group_type); + if (native_layer == MP_OBJ_NULL) { + native_layer = mp_instance_cast_to_native_base(layer, &displayio_tilegrid_type); + if (native_layer == MP_OBJ_NULL) { + mp_raise_ValueError(translate("Layer must be a Group or TileGrid subclass.")); + } + displayio_tilegrid_t* tilegrid = native_layer; + if (tilegrid->in_group) { + mp_raise_ValueError(translate("Layer already in a group.")); + } else { + tilegrid->in_group = true; + } + displayio_tilegrid_update_transform(tilegrid, &self->absolute_transform); + } else { + displayio_group_t* group = native_layer; + if (group->in_group) { + mp_raise_ValueError(translate("Layer already in a group.")); + } else { + group->in_group = true; + } + displayio_group_update_transform(group, &self->absolute_transform); + } + return native_layer; +} + +static void _remove_layer(displayio_group_t* self, size_t index) { + mp_obj_t layer = self->children[index].native; + displayio_area_t layer_area; + bool rendered_last_frame = false; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + displayio_tilegrid_t* tilegrid = layer; + rendered_last_frame = displayio_tilegrid_get_previous_area(tilegrid, &layer_area); + displayio_tilegrid_update_transform(tilegrid, NULL); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + displayio_group_t* group = layer; + rendered_last_frame = displayio_group_get_previous_area(group, &layer_area); + displayio_group_update_transform(group, NULL); + } + if (!rendered_last_frame) { + return; + } + if (!self->item_removed) { + displayio_area_copy(&layer_area, &self->dirty_area); + } else { + displayio_area_expand(&self->dirty_area, &layer_area); + } + self->item_removed = true; +} + +void common_hal_displayio_group_insert(displayio_group_t* self, size_t index, mp_obj_t layer) { + if (self->size == self->max_size) { + mp_raise_RuntimeError(translate("Group full")); + } + mp_obj_t native_layer = _add_layer(self, layer); + // Shift everything right. + for (size_t i = self->size; i > index; i--) { + self->children[i] = self->children[i - 1]; + } + self->children[index].native = native_layer; + self->children[index].original = layer; + self->size++; +} + +mp_obj_t common_hal_displayio_group_pop(displayio_group_t* self, size_t index) { + self->size--; + mp_obj_t item = self->children[index].original; + _remove_layer(self, index); + + // Shift everything left. + for (size_t i = index; i < self->size; i++) { + self->children[i] = self->children[i + 1]; + } + self->children[self->size].native = NULL; + self->children[self->size].original = NULL; + return item; +} + +mp_int_t common_hal_displayio_group_index(displayio_group_t* self, mp_obj_t layer) { + for (size_t i = 0; i < self->size; i++) { + if (self->children[i].original == layer) { + return i; + } + } + return -1; +} + +size_t common_hal_displayio_group_get_len(displayio_group_t* self) { + return self->size; +} + +mp_obj_t common_hal_displayio_group_get(displayio_group_t* self, size_t index) { + return self->children[index].original; +} + +void common_hal_displayio_group_set(displayio_group_t* self, size_t index, mp_obj_t layer) { + mp_obj_t native_layer = _add_layer(self, layer); + _remove_layer(self, index); + self->children[index].native = native_layer; + self->children[index].original = layer; +} + +void displayio_group_construct(displayio_group_t* self, displayio_group_child_t* child_array, uint32_t max_size, uint32_t scale, mp_int_t x, mp_int_t y) { + self->x = x; + self->y = y; + self->children = child_array; + self->max_size = max_size; + self->item_removed = false; + self->scale = scale; + self->in_group = false; +} + +bool displayio_group_fill_area(displayio_group_t *self, const _displayio_colorspace_t* colorspace, const displayio_area_t* area, uint32_t* mask, uint32_t* buffer) { + // Track if any of the layers finishes filling in the given area. We can ignore any remaining + // layers at that point. + bool full_coverage = false; + for (int32_t i = self->size - 1; i >= 0 ; i--) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + if (displayio_tilegrid_fill_area(layer, colorspace, area, mask, buffer)) { + full_coverage = true; + break; + } + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + if (displayio_group_fill_area(layer, colorspace, area, mask, buffer)) { + full_coverage = true; + break; + } + } + } + return full_coverage; +} + +void displayio_group_finish_refresh(displayio_group_t *self) { + self->item_removed = false; + for (int32_t i = self->size - 1; i >= 0 ; i--) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + displayio_tilegrid_finish_refresh(layer); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + displayio_group_finish_refresh(layer); + } + } +} + +displayio_area_t* displayio_group_get_refresh_areas(displayio_group_t *self, displayio_area_t* tail) { + if (self->item_removed) { + self->dirty_area.next = tail; + tail = &self->dirty_area; + } + + for (int32_t i = self->size - 1; i >= 0 ; i--) { + mp_obj_t layer = self->children[i].native; + if (MP_OBJ_IS_TYPE(layer, &displayio_tilegrid_type)) { + tail = displayio_tilegrid_get_refresh_areas(layer, tail); + } else if (MP_OBJ_IS_TYPE(layer, &displayio_group_type)) { + tail = displayio_group_get_refresh_areas(layer, tail); + } + } + + return tail; +} diff --git a/shared-module/displayio/Group.h b/shared-module/displayio/Group.h new file mode 100644 index 0000000000000..5afaac1bae168 --- /dev/null +++ b/shared-module/displayio/Group.h @@ -0,0 +1,67 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_GROUP_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_GROUP_H + +#include +#include + +#include "py/obj.h" +#include "shared-module/displayio/area.h" +#include "shared-module/displayio/Palette.h" + +typedef struct { + mp_obj_t native; + mp_obj_t original; +} displayio_group_child_t; + +typedef struct { + mp_obj_base_t base; + displayio_group_child_t* children; + displayio_buffer_transform_t absolute_transform; + displayio_area_t dirty_area; // Catch all for changed area + int16_t x; + int16_t y; + uint16_t scale; + uint16_t size; + uint16_t max_size; + bool item_removed :1; + bool in_group :1; + bool hidden :1; + bool hidden_by_parent :1; + uint8_t padding :4; +} displayio_group_t; + +void displayio_group_construct(displayio_group_t* self, displayio_group_child_t* child_array, uint32_t max_size, uint32_t scale, mp_int_t x, mp_int_t y); +void displayio_group_set_hidden_by_parent(displayio_group_t *self, bool hidden); +bool displayio_group_get_previous_area(displayio_group_t *group, displayio_area_t* area); +bool displayio_group_fill_area(displayio_group_t *group, const _displayio_colorspace_t* colorspace, const displayio_area_t* area, uint32_t* mask, uint32_t *buffer); +void displayio_group_update_transform(displayio_group_t *group, const displayio_buffer_transform_t* parent_transform); +void displayio_group_finish_refresh(displayio_group_t *self); +displayio_area_t* displayio_group_get_refresh_areas(displayio_group_t *self, displayio_area_t* tail); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_GROUP_H diff --git a/shared-module/displayio/I2CDisplay.c b/shared-module/displayio/I2CDisplay.c new file mode 100644 index 0000000000000..280476f19517a --- /dev/null +++ b/shared-module/displayio/I2CDisplay.c @@ -0,0 +1,125 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/I2CDisplay.h" + +#include +#include + +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/busio/I2C.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/display_core.h" + +#include "tick.h" + +void common_hal_displayio_i2cdisplay_construct(displayio_i2cdisplay_obj_t* self, + busio_i2c_obj_t* i2c, uint16_t device_address, const mcu_pin_obj_t* reset) { + + // Reset the display before probing + self->reset.base.type = &mp_type_NoneType; + if (reset != NULL) { + self->reset.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->reset, reset); + common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL); + common_hal_never_reset_pin(reset); + common_hal_displayio_i2cdisplay_reset(self); + } + + // Probe the bus to see if a device acknowledges the given address. + if (!common_hal_busio_i2c_probe(i2c, device_address)) { + mp_raise_ValueError_varg(translate("Unable to find I2C Display at %x"), device_address); + } + + // Write to the device and return 0 on success or an appropriate error code from mperrno.h + self->bus = i2c; + common_hal_busio_i2c_never_reset(self->bus); + // Our object is statically allocated off the heap so make sure the bus object lives to the end + // of the heap as well. + gc_never_free(self->bus); + + self->address = device_address; +} + +void common_hal_displayio_i2cdisplay_deinit(displayio_i2cdisplay_obj_t* self) { + if (self->bus == &self->inline_bus) { + common_hal_busio_i2c_deinit(self->bus); + } + + common_hal_reset_pin(self->reset.pin); +} + +bool common_hal_displayio_i2cdisplay_reset(mp_obj_t obj) { + displayio_i2cdisplay_obj_t* self = MP_OBJ_TO_PTR(obj); + if (self->reset.base.type == &mp_type_NoneType) { + return false; + } + + common_hal_digitalio_digitalinout_set_value(&self->reset, false); + common_hal_mcu_delay_us(4); + common_hal_digitalio_digitalinout_set_value(&self->reset, true); + return true; +} + +bool common_hal_displayio_i2cdisplay_bus_free(mp_obj_t obj) { + displayio_i2cdisplay_obj_t* self = MP_OBJ_TO_PTR(obj); + if (!common_hal_busio_i2c_try_lock(self->bus)) { + return false; + } + common_hal_busio_i2c_unlock(self->bus); + return true; +} + +bool common_hal_displayio_i2cdisplay_begin_transaction(mp_obj_t obj) { + displayio_i2cdisplay_obj_t* self = MP_OBJ_TO_PTR(obj); + return common_hal_busio_i2c_try_lock(self->bus); +} + +void common_hal_displayio_i2cdisplay_send(mp_obj_t obj, display_byte_type_t data_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + displayio_i2cdisplay_obj_t* self = MP_OBJ_TO_PTR(obj); + if (data_type == DISPLAY_COMMAND) { + uint8_t command_bytes[2 * data_length]; + for (uint32_t i = 0; i < data_length; i++) { + command_bytes[2 * i] = 0x80; + command_bytes[2 * i + 1] = data[i]; + } + common_hal_busio_i2c_write(self->bus, self->address, command_bytes, 2 * data_length, true); + } else { + uint8_t data_bytes[data_length + 1]; + data_bytes[0] = 0x40; + memcpy(data_bytes + 1, data, data_length); + common_hal_busio_i2c_write(self->bus, self->address, data_bytes, data_length + 1, true); + } +} + +void common_hal_displayio_i2cdisplay_end_transaction(mp_obj_t obj) { + displayio_i2cdisplay_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_busio_i2c_unlock(self->bus); +} diff --git a/shared-module/displayio/I2CDisplay.h b/shared-module/displayio/I2CDisplay.h new file mode 100644 index 0000000000000..4636c3f73a41d --- /dev/null +++ b/shared-module/displayio/I2CDisplay.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_I2CDISPLAY_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_I2CDISPLAY_H + +#include "common-hal/busio/I2C.h" +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + busio_i2c_obj_t* bus; + busio_i2c_obj_t inline_bus; + digitalio_digitalinout_obj_t reset; + uint16_t address; +} displayio_i2cdisplay_obj_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_I2CDISPLAY_H diff --git a/shared-module/displayio/OnDiskBitmap.c b/shared-module/displayio/OnDiskBitmap.c new file mode 100644 index 0000000000000..993fc03de62ec --- /dev/null +++ b/shared-module/displayio/OnDiskBitmap.c @@ -0,0 +1,184 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/OnDiskBitmap.h" + +#include + +#include "py/mperrno.h" +#include "py/runtime.h" + +static uint32_t read_word(uint16_t* bmp_header, uint16_t index) { + return bmp_header[index] | bmp_header[index + 1] << 16; +} + +void common_hal_displayio_ondiskbitmap_construct(displayio_ondiskbitmap_t *self, pyb_file_obj_t* file) { + // Load the wave + self->file = file; + uint16_t bmp_header[69]; + f_rewind(&self->file->fp); + UINT bytes_read; + if (f_read(&self->file->fp, bmp_header, 138, &bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (bytes_read != 138 || + memcmp(bmp_header, "BM", 2) != 0) { + mp_raise_ValueError(translate("Invalid BMP file")); + } + + // We can't cast because we're not aligned. + self->data_offset = read_word(bmp_header, 5); + + uint32_t header_size = read_word(bmp_header, 7); + uint16_t bits_per_pixel = bmp_header[14]; + uint32_t compression = read_word(bmp_header, 15); + uint32_t number_of_colors = read_word(bmp_header, 23); + + bool indexed = ((bits_per_pixel <= 8) && (number_of_colors != 0)); + self->bitfield_compressed = (compression == 3); + self->bits_per_pixel = bits_per_pixel; + self->width = read_word(bmp_header, 9); + self->height = read_word(bmp_header, 11); + + if (bits_per_pixel == 16){ + if (((header_size >= 56)) || (self->bitfield_compressed)) { + self->r_bitmask = read_word(bmp_header, 27); + self->g_bitmask = read_word(bmp_header, 29); + self->b_bitmask = read_word(bmp_header, 31); + + } else { // no compression or short header means 5:5:5 + self->r_bitmask = 0x7c00; + self->g_bitmask = 0x3e0; + self->b_bitmask = 0x1f; + } + } else if (indexed && self->bits_per_pixel != 1) { + uint16_t palette_size = number_of_colors * sizeof(uint32_t); + uint16_t palette_offset = 0xe + header_size; + + self->palette_data = m_malloc(palette_size, false); + + f_rewind(&self->file->fp); + f_lseek(&self->file->fp, palette_offset); + + UINT palette_bytes_read; + if (f_read(&self->file->fp, self->palette_data, palette_size, &palette_bytes_read) != FR_OK) { + mp_raise_OSError(MP_EIO); + } + if (palette_bytes_read != palette_size) { + mp_raise_ValueError(translate("Unable to read color palette data")); + } + } else if (!(header_size == 12 || header_size == 40 || header_size == 108 || header_size == 124)) { + mp_raise_ValueError_varg(translate("Only Windows format, uncompressed BMP supported: given header size is %d"), header_size); + } + + if (bits_per_pixel == 8 && number_of_colors == 0) { + mp_raise_ValueError_varg(translate("Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: %d bpp given"), bits_per_pixel); + } + + uint8_t bytes_per_pixel = (self->bits_per_pixel / 8) ? (self->bits_per_pixel /8) : 1; + uint8_t pixels_per_byte = 8 / self->bits_per_pixel; + if (pixels_per_byte == 0){ + self->stride = (self->width * bytes_per_pixel); + // Rows are word aligned. + if (self->stride % 4 != 0) { + self->stride += 4 - self->stride % 4; + } + } else { + uint32_t bit_stride = self->width * self->bits_per_pixel; + if (bit_stride % 32 != 0) { + bit_stride += 32 - bit_stride % 32; + } + self->stride = (bit_stride / 8); + } + +} + + +uint32_t common_hal_displayio_ondiskbitmap_get_pixel(displayio_ondiskbitmap_t *self, + int16_t x, int16_t y) { + if (x < 0 || x >= self->width || y < 0 || y >= self->height) { + return 0; + } + + uint32_t location; + uint8_t bytes_per_pixel = (self->bits_per_pixel / 8) ? (self->bits_per_pixel /8) : 1; + uint8_t pixels_per_byte = 8 / self->bits_per_pixel; + if (pixels_per_byte == 0){ + location = self->data_offset + (self->height - y - 1) * self->stride + x * bytes_per_pixel; + } else { + location = self->data_offset + (self->height - y - 1) * self->stride + x / pixels_per_byte; + } + // We don't cache here because the underlying FS caches sectors. + f_lseek(&self->file->fp, location); + UINT bytes_read; + uint32_t pixel_data = 0; + uint32_t result = f_read(&self->file->fp, &pixel_data, bytes_per_pixel, &bytes_read); + if (result == FR_OK) { + uint32_t tmp = 0; + uint8_t red; + uint8_t green; + uint8_t blue; + if (bytes_per_pixel == 1) { + uint8_t offset = (x % pixels_per_byte) * self->bits_per_pixel; + uint8_t mask = (1 << self->bits_per_pixel) - 1; + + uint8_t index = (pixel_data >> ((8 - self->bits_per_pixel) - offset)) & mask; + if (self->bits_per_pixel == 1) { + if (index == 1) { + return 0xFFFFFF; + } else { + return 0x000000; + } + } + return self->palette_data[index]; + } else if (bytes_per_pixel == 2) { + if (self->g_bitmask == 0x07e0) { // 565 + red =((pixel_data & self->r_bitmask) >>11); + green = ((pixel_data & self->g_bitmask) >>5); + blue = ((pixel_data & self->b_bitmask) >> 0); + } else { // 555 + red =((pixel_data & self->r_bitmask) >>10); + green = ((pixel_data & self->g_bitmask) >>4); + blue = ((pixel_data & self->b_bitmask) >> 0); + } + tmp = (red << 19 | green << 10 | blue << 3); + return tmp; + } else if ((bytes_per_pixel == 4) && (self->bitfield_compressed)) { + return pixel_data & 0x00FFFFFF; + } else { + return pixel_data; + } + } + return 0; +} + +uint16_t common_hal_displayio_ondiskbitmap_get_height(displayio_ondiskbitmap_t *self) { + return self->height; +} + +uint16_t common_hal_displayio_ondiskbitmap_get_width(displayio_ondiskbitmap_t *self) { + return self->width; +} diff --git a/shared-module/displayio/OnDiskBitmap.h b/shared-module/displayio/OnDiskBitmap.h new file mode 100644 index 0000000000000..28426f11b8744 --- /dev/null +++ b/shared-module/displayio/OnDiskBitmap.h @@ -0,0 +1,52 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_ONDISKBITMAP_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_ONDISKBITMAP_H + +#include +#include + +#include "py/obj.h" + +#include "extmod/vfs_fat.h" + +typedef struct { + mp_obj_base_t base; + uint16_t width; + uint16_t height; + uint16_t data_offset; + uint16_t stride; + uint32_t r_bitmask; + uint32_t g_bitmask; + uint32_t b_bitmask; + bool bitfield_compressed; + pyb_file_obj_t* file; + uint8_t bits_per_pixel; + uint32_t* palette_data; +} displayio_ondiskbitmap_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_ONDISKBITMAP_H diff --git a/shared-module/displayio/Palette.c b/shared-module/displayio/Palette.c new file mode 100644 index 0000000000000..3bce86f4843b9 --- /dev/null +++ b/shared-module/displayio/Palette.c @@ -0,0 +1,98 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Palette.h" + +#include "shared-module/displayio/ColorConverter.h" + +void common_hal_displayio_palette_construct(displayio_palette_t* self, uint16_t color_count) { + self->color_count = color_count; + self->colors = (_displayio_color_t *) m_malloc(color_count * sizeof(_displayio_color_t), false); +} + +void common_hal_displayio_palette_make_opaque(displayio_palette_t* self, uint32_t palette_index) { + self->colors[palette_index].transparent = false; +} + +void common_hal_displayio_palette_make_transparent(displayio_palette_t* self, uint32_t palette_index) { + self->colors[palette_index].transparent = true; +} + +uint32_t common_hal_displayio_palette_get_len(displayio_palette_t* self) { + return self->color_count; +} + +void common_hal_displayio_palette_set_color(displayio_palette_t* self, uint32_t palette_index, uint32_t color) { + if (self->colors[palette_index].rgb888 == color) { + return; + } + self->colors[palette_index].rgb888 = color; + self->colors[palette_index].luma = displayio_colorconverter_compute_luma(color); + self->colors[palette_index].rgb565 = displayio_colorconverter_compute_rgb565(color); + + uint8_t chroma = displayio_colorconverter_compute_chroma(color); + self->colors[palette_index].chroma = chroma; + self->colors[palette_index].hue = displayio_colorconverter_compute_hue(color); + self->needs_refresh = true; +} + +uint32_t common_hal_displayio_palette_get_color(displayio_palette_t* self, uint32_t palette_index) { + return self->colors[palette_index].rgb888; +} + +bool displayio_palette_get_color(displayio_palette_t *self, const _displayio_colorspace_t* colorspace, uint32_t palette_index, uint32_t* color) { + if (palette_index > self->color_count || self->colors[palette_index].transparent) { + return false; // returns opaque + } + + if (colorspace->tricolor) { + uint8_t luma = self->colors[palette_index].luma; + *color = luma >> (8 - colorspace->depth); + // Chroma 0 means the color is a gray and has no hue so never color based on it. + if (self->colors[palette_index].chroma <= 16) { + if (!colorspace->grayscale) { + *color = 0; + } + return true; + } + uint8_t pixel_hue = self->colors[palette_index].hue; + displayio_colorconverter_compute_tricolor(colorspace, pixel_hue, luma, color); + } else if (colorspace->grayscale) { + *color = self->colors[palette_index].luma >> (8 - colorspace->depth); + } else { + *color = self->colors[palette_index].rgb565; + } + + return true; +} + +bool displayio_palette_needs_refresh(displayio_palette_t *self) { + return self->needs_refresh; +} + +void displayio_palette_finish_refresh(displayio_palette_t *self) { + self->needs_refresh = false; +} diff --git a/shared-module/displayio/Palette.h b/shared-module/displayio/Palette.h new file mode 100644 index 0000000000000..758fd43fc152c --- /dev/null +++ b/shared-module/displayio/Palette.h @@ -0,0 +1,83 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_PALETTE_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_PALETTE_H + +#include +#include + +#include "py/obj.h" + +typedef struct { + uint8_t depth; + uint8_t bytes_per_cell; + uint8_t tricolor_hue; + uint8_t tricolor_luma; + bool grayscale; + bool tricolor; + bool pixels_in_byte_share_row; + bool reverse_pixels_in_byte; + bool dither; +} _displayio_colorspace_t; + +typedef struct { + uint32_t rgb888; + uint16_t rgb565; + uint8_t luma; + uint8_t hue; + uint8_t chroma; + bool transparent; // This may have additional bits added later for blending. +} _displayio_color_t; + +typedef struct { + uint32_t pixel; + uint16_t x; + uint16_t y; + uint8_t tile; + uint16_t tile_x; + uint16_t tile_y; +} displayio_input_pixel_t; + +typedef struct { + uint32_t pixel; + bool opaque; +} displayio_output_pixel_t; + +typedef struct { + mp_obj_base_t base; + _displayio_color_t* colors; + uint32_t color_count; + bool needs_refresh; +} displayio_palette_t; + +// Returns false if color fetch did not succeed (out of range or transparent). +// Returns true if color is opaque, and sets color. +bool displayio_palette_get_color(displayio_palette_t *palette, const _displayio_colorspace_t* colorspace, uint32_t palette_index, uint32_t* color); +bool displayio_palette_needs_refresh(displayio_palette_t *self); +void displayio_palette_finish_refresh(displayio_palette_t *self); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_PALLETE_H diff --git a/shared-module/displayio/Shape.c b/shared-module/displayio/Shape.c new file mode 100644 index 0000000000000..ab9ca735bc47b --- /dev/null +++ b/shared-module/displayio/Shape.c @@ -0,0 +1,90 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Shape.h" + +#include + +#include "py/runtime.h" + +void common_hal_displayio_shape_construct(displayio_shape_t *self, uint32_t width, + uint32_t height, bool mirror_x, bool mirror_y) { + self->mirror_x = mirror_x; + self->mirror_y = mirror_y; + self->width = width; + if (self->mirror_x) { + width /= 2; + width += self->width % 2 - 1; + } + self->half_width = width; + + self->height = height; + if (self->mirror_y) { + height /= 2; + height += self->height % 2 - 1; + } + self->half_height = height; + + self->data = m_malloc(height * sizeof(uint32_t), false); + for (uint16_t i = 0; i <= height; i++) { + self->data[2 * i] = 0; + self->data[2 * i + 1] = width; + } +} + +void common_hal_displayio_shape_set_boundary(displayio_shape_t *self, uint16_t y, uint16_t start_x, uint16_t end_x) { + if (y < 0 || y >= self->height || (self->mirror_y && y > self->half_height)) { + mp_raise_ValueError(translate("y value out of bounds")); + } + if (start_x < 0 || start_x > self->width || end_x < 0 || end_x > self->width) { + mp_raise_ValueError(translate("x value out of bounds")); + } + uint16_t half_width = self->width / 2 - 1 + self->width % 2; + if (self->mirror_x && (start_x > half_width || end_x > half_width)) { + mp_raise_ValueError_varg(translate("Maximum x value when mirrored is %d"), half_width); + } + self->data[2 * y] = start_x; + self->data[2 * y + 1] = end_x; +} + +uint32_t common_hal_displayio_shape_get_pixel(void *obj, int16_t x, int16_t y) { + displayio_shape_t *self = obj; + if (x >= self->width || x < 0 || y >= self->height || y < 0) { + return 0; + } + if (self->mirror_x && x > self->half_width) { + x = self->width - 1 - x; + } + if (self->mirror_y && y > self->half_height) { + y = self->height - y - 1; + } + uint16_t start_x = self->data[2 * y]; + uint16_t end_x = self->data[2 * y + 1]; + if (x < start_x || x > end_x) { + return 0; + } + return 1; +} diff --git a/shared-module/displayio/Shape.h b/shared-module/displayio/Shape.h new file mode 100644 index 0000000000000..ca054fe0085e4 --- /dev/null +++ b/shared-module/displayio/Shape.h @@ -0,0 +1,46 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_SHAPE_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_SHAPE_H + +#include +#include + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint16_t width; + uint16_t height; + uint16_t half_width; + uint16_t half_height; + uint16_t* data; + bool mirror_x; + bool mirror_y; +} displayio_shape_t; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_SHAPE_H diff --git a/shared-module/displayio/TileGrid.c b/shared-module/displayio/TileGrid.c new file mode 100644 index 0000000000000..c4855c33315ea --- /dev/null +++ b/shared-module/displayio/TileGrid.c @@ -0,0 +1,587 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/TileGrid.h" + +#include "py/runtime.h" +#include "shared-bindings/displayio/Bitmap.h" +#include "shared-bindings/displayio/ColorConverter.h" +#include "shared-bindings/displayio/OnDiskBitmap.h" +#include "shared-bindings/displayio/Palette.h" +#include "shared-bindings/displayio/Shape.h" + +void common_hal_displayio_tilegrid_construct(displayio_tilegrid_t *self, mp_obj_t bitmap, + uint16_t bitmap_width_in_tiles, uint16_t bitmap_height_in_tiles, + mp_obj_t pixel_shader, uint16_t width, uint16_t height, + uint16_t tile_width, uint16_t tile_height, uint16_t x, uint16_t y, uint8_t default_tile) { + uint32_t total_tiles = width * height; + // Sprites will only have one tile so save a little memory by inlining values in the pointer. + uint8_t inline_tiles = sizeof(uint8_t*); + if (total_tiles <= inline_tiles) { + self->tiles = 0; + // Pack values into the pointer since there are only a few. + for (uint32_t i = 0; i < inline_tiles; i++) { + ((uint8_t*) &self->tiles)[i] = default_tile; + } + self->inline_tiles = true; + } else { + self->tiles = (uint8_t*) m_malloc(total_tiles, false); + for (uint32_t i = 0; i < total_tiles; i++) { + self->tiles[i] = default_tile; + } + self->inline_tiles = false; + } + self->bitmap_width_in_tiles = bitmap_width_in_tiles; + self->tiles_in_bitmap = bitmap_width_in_tiles * bitmap_height_in_tiles; + self->width_in_tiles = width; + self->height_in_tiles = height; + self->x = x; + self->y = y; + self->pixel_width = width * tile_width; + self->pixel_height = height * tile_height; + self->tile_width = tile_width; + self->tile_height = tile_height; + self->bitmap = bitmap; + self->pixel_shader = pixel_shader; + self->in_group = false; + self->hidden = false; + self->hidden_by_parent = false; + self->previous_area.x1 = 0xffff; + self->previous_area.x2 = self->previous_area.x1; + self->flip_x = false; + self->flip_y = false; + self->transpose_xy = false; +} + + +bool common_hal_displayio_tilegrid_get_hidden(displayio_tilegrid_t* self) { + return self->hidden; +} + +void common_hal_displayio_tilegrid_set_hidden(displayio_tilegrid_t* self, bool hidden) { + self->hidden = hidden; +} + +void displayio_tilegrid_set_hidden_by_parent(displayio_tilegrid_t *self, bool hidden) { + self->hidden_by_parent = hidden; +} + +bool displayio_tilegrid_get_previous_area(displayio_tilegrid_t *self, displayio_area_t* area) { + if (self->previous_area.x1 == self->previous_area.x2) { + return false; + } + displayio_area_copy(&self->previous_area, area); + return true; +} + +void _update_current_x(displayio_tilegrid_t *self) { + int16_t width; + if (self->transpose_xy) { + width = self->pixel_height; + } else { + width = self->pixel_width; + } + if (self->absolute_transform->transpose_xy) { + self->current_area.y1 = self->absolute_transform->y + self->absolute_transform->dy * self->x; + self->current_area.y2 = self->absolute_transform->y + self->absolute_transform->dy * (self->x + width); + if (self->current_area.y2 < self->current_area.y1) { + int16_t temp = self->current_area.y2; + self->current_area.y2 = self->current_area.y1; + self->current_area.y1 = temp; + } + } else { + self->current_area.x1 = self->absolute_transform->x + self->absolute_transform->dx * self->x; + self->current_area.x2 = self->absolute_transform->x + self->absolute_transform->dx * (self->x + width); + if (self->current_area.x2 < self->current_area.x1) { + int16_t temp = self->current_area.x2; + self->current_area.x2 = self->current_area.x1; + self->current_area.x1 = temp; + } + } +} + +void _update_current_y(displayio_tilegrid_t *self) { + int16_t height; + if (self->transpose_xy) { + height = self->pixel_width; + } else { + height = self->pixel_height; + } + if (self->absolute_transform->transpose_xy) { + self->current_area.x1 = self->absolute_transform->x + self->absolute_transform->dx * self->y; + self->current_area.x2 = self->absolute_transform->x + self->absolute_transform->dx * (self->y + height); + if (self->current_area.x2 < self->current_area.x1) { + int16_t temp = self->current_area.x2; + self->current_area.x2 = self->current_area.x1; + self->current_area.x1 = temp; + } + } else { + self->current_area.y1 = self->absolute_transform->y + self->absolute_transform->dy * self->y; + self->current_area.y2 = self->absolute_transform->y + self->absolute_transform->dy * (self->y + height); + if (self->current_area.y2 < self->current_area.y1) { + int16_t temp = self->current_area.y2; + self->current_area.y2 = self->current_area.y1; + self->current_area.y1 = temp; + } + } +} + +void displayio_tilegrid_update_transform(displayio_tilegrid_t *self, + const displayio_buffer_transform_t* absolute_transform) { + self->in_group = absolute_transform != NULL; + self->absolute_transform = absolute_transform; + if (absolute_transform != NULL) { + self->moved = true; + + _update_current_x(self); + _update_current_y(self); + } +} + +mp_int_t common_hal_displayio_tilegrid_get_x(displayio_tilegrid_t *self) { + return self->x; +} +void common_hal_displayio_tilegrid_set_x(displayio_tilegrid_t *self, mp_int_t x) { + if (self->x == x) { + return; + } + + self->moved = true; + + self->x = x; + if (self->absolute_transform != NULL) { + _update_current_x(self); + } +} +mp_int_t common_hal_displayio_tilegrid_get_y(displayio_tilegrid_t *self) { + return self->y; +} + +void common_hal_displayio_tilegrid_set_y(displayio_tilegrid_t *self, mp_int_t y) { + if (self->y == y) { + return; + } + self->moved = true; + self->y = y; + if (self->absolute_transform != NULL) { + _update_current_y(self); + } +} + +mp_obj_t common_hal_displayio_tilegrid_get_pixel_shader(displayio_tilegrid_t *self) { + return self->pixel_shader; +} + +void common_hal_displayio_tilegrid_set_pixel_shader(displayio_tilegrid_t *self, mp_obj_t pixel_shader) { + self->pixel_shader = pixel_shader; + self->full_change = true; +} + +uint16_t common_hal_displayio_tilegrid_get_width(displayio_tilegrid_t *self) { + return self->width_in_tiles; +} + +uint16_t common_hal_displayio_tilegrid_get_height(displayio_tilegrid_t *self) { + return self->height_in_tiles; +} + +uint8_t common_hal_displayio_tilegrid_get_tile(displayio_tilegrid_t *self, uint16_t x, uint16_t y) { + uint8_t* tiles = self->tiles; + if (self->inline_tiles) { + tiles = (uint8_t*) &self->tiles; + } + if (tiles == NULL) { + return 0; + } + return tiles[y * self->width_in_tiles + x]; +} + +void common_hal_displayio_tilegrid_set_tile(displayio_tilegrid_t *self, uint16_t x, uint16_t y, uint8_t tile_index) { + if (tile_index >= self->tiles_in_bitmap) { + mp_raise_ValueError(translate("Tile index out of bounds")); + } + uint8_t* tiles = self->tiles; + if (self->inline_tiles) { + tiles = (uint8_t*) &self->tiles; + } + if (tiles == NULL) { + return; + } + tiles[y * self->width_in_tiles + x] = tile_index; + displayio_area_t temp_area; + displayio_area_t* tile_area; + if (!self->partial_change) { + tile_area = &self->dirty_area; + } else { + tile_area = &temp_area; + } + int16_t tx = (x - self->top_left_x) % self->width_in_tiles; + if (tx < 0) { + tx += self->width_in_tiles; + } + tile_area->x1 = tx * self->tile_width; + tile_area->x2 = tile_area->x1 + self->tile_width; + int16_t ty = (y - self->top_left_y) % self->height_in_tiles; + if (ty < 0) { + ty += self->height_in_tiles; + } + tile_area->y1 = ty * self->tile_height; + tile_area->y2 = tile_area->y1 + self->tile_height; + + if (self->partial_change) { + displayio_area_expand(&self->dirty_area, &temp_area); + } + + self->partial_change = true; +} + +bool common_hal_displayio_tilegrid_get_flip_x(displayio_tilegrid_t *self) { + return self->flip_x; +} + +void common_hal_displayio_tilegrid_set_flip_x(displayio_tilegrid_t *self, bool flip_x) { + if (self->flip_x == flip_x) { + return; + } + self->flip_x = flip_x; + self->full_change = true; +} + +bool common_hal_displayio_tilegrid_get_flip_y(displayio_tilegrid_t *self) { + return self->flip_y; +} + +void common_hal_displayio_tilegrid_set_flip_y(displayio_tilegrid_t *self, bool flip_y) { + if (self->flip_y == flip_y) { + return; + } + self->flip_y = flip_y; + self->full_change = true; +} + +bool common_hal_displayio_tilegrid_get_transpose_xy(displayio_tilegrid_t *self) { + return self->transpose_xy; +} + +void common_hal_displayio_tilegrid_set_transpose_xy(displayio_tilegrid_t *self, bool transpose_xy) { + if (self->transpose_xy == transpose_xy) { + return; + } + self->transpose_xy = transpose_xy; + + // Square TileGrids do not change dimensions when transposed. + if (self->pixel_width == self->pixel_height) { + self->full_change = true; + return; + } + + _update_current_x(self); + _update_current_y(self); + + self->moved = true; +} + +void common_hal_displayio_tilegrid_set_top_left(displayio_tilegrid_t *self, uint16_t x, uint16_t y) { + self->top_left_x = x; + self->top_left_y = y; + self->full_change = true; +} + +bool displayio_tilegrid_fill_area(displayio_tilegrid_t *self, const _displayio_colorspace_t* colorspace, const displayio_area_t* area, uint32_t* mask, uint32_t *buffer) { + // If no tiles are present we have no impact. + uint8_t* tiles = self->tiles; + if (self->inline_tiles) { + tiles = (uint8_t*) &self->tiles; + } + if (tiles == NULL) { + return false; + } + + bool hidden = self->hidden || self->hidden_by_parent; + if (hidden) { + return false; + } + + displayio_area_t overlap; + if (!displayio_area_compute_overlap(area, &self->current_area, &overlap)) { + return false; + } + + int16_t x_stride = 1; + int16_t y_stride = displayio_area_width(area); + + bool flip_x = self->flip_x; + bool flip_y = self->flip_y; + if (self->transpose_xy != self->absolute_transform->transpose_xy) { + bool temp_flip = flip_x; + flip_x = flip_y; + flip_y = temp_flip; + } + + // How many pixels are outside of our area between us and the start of the row. + uint16_t start = 0; + if ((self->absolute_transform->dx < 0) != flip_x) { + start += (area->x2 - area->x1 - 1) * x_stride; + x_stride *= -1; + } + if ((self->absolute_transform->dy < 0) != flip_y) { + start += (area->y2 - area->y1 - 1) * y_stride; + y_stride *= -1; + } + + // Track if this layer finishes filling in the given area. We can ignore any remaining + // layers at that point. + bool full_coverage = displayio_area_equal(area, &overlap); + + // TODO(tannewt): Skip coverage tracking if all pixels outside the overlap have already been + // set and our palette is all opaque. + + // TODO(tannewt): Check to see if the pixel_shader has any transparency. If it doesn't then we + // can either return full coverage or bulk update the mask. + displayio_area_t transformed; + displayio_area_transform_within(flip_x != (self->absolute_transform->dx < 0), flip_y != (self->absolute_transform->dy < 0), self->transpose_xy != self->absolute_transform->transpose_xy, + &overlap, + &self->current_area, + &transformed); + + int16_t start_x = (transformed.x1 - self->current_area.x1); + int16_t end_x = (transformed.x2 - self->current_area.x1); + int16_t start_y = (transformed.y1 - self->current_area.y1); + int16_t end_y = (transformed.y2 - self->current_area.y1); + + int16_t y_shift = 0; + int16_t x_shift = 0; + if ((self->absolute_transform->dx < 0) != flip_x) { + x_shift = area->x2 - overlap.x2; + } else { + x_shift = overlap.x1 - area->x1; + } + if ((self->absolute_transform->dy < 0) != flip_y) { + y_shift = area->y2 - overlap.y2; + } else { + y_shift = overlap.y1 - area->y1; + } + + // This untransposes x and y so it aligns with bitmap rows. + if (self->transpose_xy != self->absolute_transform->transpose_xy) { + int16_t temp_stride = x_stride; + x_stride = y_stride; + y_stride = temp_stride; + int16_t temp_shift = x_shift; + x_shift = y_shift; + y_shift = temp_shift; + } + + uint8_t pixels_per_byte = 8 / colorspace->depth; + + displayio_input_pixel_t input_pixel; + displayio_output_pixel_t output_pixel; + + for (input_pixel.y = start_y; input_pixel.y < end_y; ++input_pixel.y) { + int16_t row_start = start + (input_pixel.y - start_y + y_shift) * y_stride; // in pixels + int16_t local_y = input_pixel.y / self->absolute_transform->scale; + for (input_pixel.x = start_x; input_pixel.x < end_x; ++input_pixel.x) { + // Compute the destination pixel in the buffer and mask based on the transformations. + int16_t offset = row_start + (input_pixel.x - start_x + x_shift) * x_stride; // in pixels + + // This is super useful for debugging out of range accesses. Uncomment to use. + // if (offset < 0 || offset >= (int32_t) displayio_area_size(area)) { + // asm("bkpt"); + // } + + // Check the mask first to see if the pixel has already been set. + if ((mask[offset / 32] & (1 << (offset % 32))) != 0) { + continue; + } + int16_t local_x = input_pixel.x / self->absolute_transform->scale; + uint16_t tile_location = ((local_y / self->tile_height + self->top_left_y) % self->height_in_tiles) * self->width_in_tiles + (local_x / self->tile_width + self->top_left_x) % self->width_in_tiles; + input_pixel.tile = tiles[tile_location]; + input_pixel.tile_x = (input_pixel.tile % self->bitmap_width_in_tiles) * self->tile_width + local_x % self->tile_width; + input_pixel.tile_y = (input_pixel.tile / self->bitmap_width_in_tiles) * self->tile_height + local_y % self->tile_height; + + //uint32_t value = 0; + output_pixel.pixel = 0; + input_pixel.pixel = 0; + + // We always want to read bitmap pixels by row first and then transpose into the destination + // buffer because most bitmaps are row associated. + if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_bitmap_type)) { + input_pixel.pixel = common_hal_displayio_bitmap_get_pixel(self->bitmap, input_pixel.tile_x, input_pixel.tile_y); + } else if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_shape_type)) { + input_pixel.pixel = common_hal_displayio_shape_get_pixel(self->bitmap, input_pixel.tile_x, input_pixel.tile_y); + } else if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_ondiskbitmap_type)) { + input_pixel.pixel = common_hal_displayio_ondiskbitmap_get_pixel(self->bitmap, input_pixel.tile_x, input_pixel.tile_y); + } + + output_pixel.opaque = true; + if (self->pixel_shader == mp_const_none) { + output_pixel.pixel = input_pixel.pixel; + } else if (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_palette_type)) { + output_pixel.opaque = displayio_palette_get_color(self->pixel_shader, colorspace, input_pixel.pixel, &output_pixel.pixel); + } else if (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_colorconverter_type)) { + displayio_colorconverter_convert(self->pixel_shader, colorspace, &input_pixel, &output_pixel); + } + if (!output_pixel.opaque) { + // A pixel is transparent so we haven't fully covered the area ourselves. + full_coverage = false; + } else { + mask[offset / 32] |= 1 << (offset % 32); + if (colorspace->depth == 16) { + *(((uint16_t*) buffer) + offset) = output_pixel.pixel; + } else if (colorspace->depth == 8) { + *(((uint8_t*) buffer) + offset) = output_pixel.pixel; + } else if (colorspace->depth < 8) { + // Reorder the offsets to pack multiple rows into a byte (meaning they share a column). + if (!colorspace->pixels_in_byte_share_row) { + uint16_t width = displayio_area_width(area); + uint16_t row = offset / width; + uint16_t col = offset % width; + // Dividing by pixels_per_byte does truncated division even if we multiply it back out. + offset = col * pixels_per_byte + (row / pixels_per_byte) * pixels_per_byte * width + row % pixels_per_byte; + // Also useful for validating that the bitpacking worked correctly. + // if (offset > displayio_area_size(area)) { + // asm("bkpt"); + // } + } + uint8_t shift = (offset % pixels_per_byte) * colorspace->depth; + if (colorspace->reverse_pixels_in_byte) { + // Reverse the shift by subtracting it from the leftmost shift. + shift = (pixels_per_byte - 1) * colorspace->depth - shift; + } + ((uint8_t*)buffer)[offset / pixels_per_byte] |= output_pixel.pixel << shift; + } + } + } + } + return full_coverage; +} + +void displayio_tilegrid_finish_refresh(displayio_tilegrid_t *self) { + bool first_draw = self->previous_area.x1 == self->previous_area.x2; + bool hidden = self->hidden || self->hidden_by_parent; + if (!first_draw && hidden) { + self->previous_area.x2 = self->previous_area.x1; + } else if (self->moved || first_draw) { + displayio_area_copy(&self->current_area, &self->previous_area); + } + + self->moved = false; + self->full_change = false; + self->partial_change = false; + if (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_palette_type)) { + displayio_palette_finish_refresh(self->pixel_shader); + } else if (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_colorconverter_type)) { + displayio_colorconverter_finish_refresh(self->pixel_shader); + } + if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_bitmap_type)) { + displayio_bitmap_finish_refresh(self->bitmap); + } else if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_shape_type)) { + // TODO: Support shape changes. + } else if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_ondiskbitmap_type)) { + // OnDiskBitmap changes will trigger a complete reload so no need to + // track changes. + } + // TODO(tannewt): We could double buffer changes to position and move them over here. + // That way they won't change during a refresh and tear. +} + +displayio_area_t* displayio_tilegrid_get_refresh_areas(displayio_tilegrid_t *self, displayio_area_t* tail) { + bool first_draw = self->previous_area.x1 == self->previous_area.x2; + bool hidden = self->hidden || self->hidden_by_parent; + // Check hidden first because it trumps all other changes. + if (hidden) { + if (!first_draw) { + self->previous_area.next = tail; + return &self->previous_area; + } else { + return tail; + } + } else if (self->moved && !first_draw) { + displayio_area_union(&self->previous_area, &self->current_area, &self->dirty_area); + if (displayio_area_size(&self->dirty_area) <= 2U * self->pixel_width * self->pixel_height) { + self->dirty_area.next = tail; + return &self->dirty_area; + } + self->previous_area.next = tail; + self->current_area.next = &self->previous_area; + return &self->current_area; + } + + // If we have an in-memory bitmap, then check it for modifications. + if (MP_OBJ_IS_TYPE(self->bitmap, &displayio_bitmap_type)) { + displayio_area_t* refresh_area = displayio_bitmap_get_refresh_areas(self->bitmap, tail); + if (refresh_area != tail) { + // Special case a TileGrid that shows a full bitmap and use its + // dirty area. Copy it to ours so we can transform it. + if (self->tiles_in_bitmap == 1) { + displayio_area_copy(refresh_area, &self->dirty_area); + self->partial_change = true; + } else { + self->full_change = true; + } + } + } + + self->full_change = self->full_change || + (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_palette_type) && + displayio_palette_needs_refresh(self->pixel_shader)) || + (MP_OBJ_IS_TYPE(self->pixel_shader, &displayio_colorconverter_type) && + displayio_colorconverter_needs_refresh(self->pixel_shader)); + if (self->full_change || first_draw) { + self->current_area.next = tail; + return &self->current_area; + } + + if (self->partial_change) { + if (self->absolute_transform->transpose_xy) { + int16_t x1 = self->dirty_area.x1; + self->dirty_area.x1 = self->absolute_transform->x + self->absolute_transform->dx * (self->y + self->dirty_area.y1); + self->dirty_area.y1 = self->absolute_transform->y + self->absolute_transform->dy * (self->x + x1); + int16_t x2 = self->dirty_area.x2; + self->dirty_area.x2 = self->absolute_transform->x + self->absolute_transform->dx * (self->y + self->dirty_area.y2); + self->dirty_area.y2 = self->absolute_transform->y + self->absolute_transform->dy * (self->x + x2); + } else { + self->dirty_area.x1 = self->absolute_transform->x + self->absolute_transform->dx * (self->x + self->dirty_area.x1); + self->dirty_area.y1 = self->absolute_transform->y + self->absolute_transform->dy * (self->y + self->dirty_area.y1); + self->dirty_area.x2 = self->absolute_transform->x + self->absolute_transform->dx * (self->x + self->dirty_area.x2); + self->dirty_area.y2 = self->absolute_transform->y + self->absolute_transform->dy * (self->y + self->dirty_area.y2); + } + if (self->dirty_area.y2 < self->dirty_area.y1) { + int16_t temp = self->dirty_area.y2; + self->dirty_area.y2 = self->dirty_area.y1; + self->dirty_area.y1 = temp; + } + if (self->dirty_area.x2 < self->dirty_area.x1) { + int16_t temp = self->dirty_area.x2; + self->dirty_area.x2 = self->dirty_area.x1; + self->dirty_area.x1 = temp; + } + + self->dirty_area.next = tail; + return &self->dirty_area; + } + return tail; +} diff --git a/shared-module/displayio/TileGrid.h b/shared-module/displayio/TileGrid.h new file mode 100644 index 0000000000000..e97d3dfd47ddb --- /dev/null +++ b/shared-module/displayio/TileGrid.h @@ -0,0 +1,88 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_TILEGRID_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_TILEGRID_H + +#include +#include + +#include "py/obj.h" +#include "shared-module/displayio/area.h" +#include "shared-module/displayio/Palette.h" + +typedef struct { + mp_obj_base_t base; + mp_obj_t bitmap; + mp_obj_t pixel_shader; + int16_t x; + int16_t y; + uint16_t pixel_width; + uint16_t pixel_height; + uint16_t bitmap_width_in_tiles;; + uint16_t tiles_in_bitmap; + uint16_t width_in_tiles; + uint16_t height_in_tiles; + uint16_t tile_width; + uint16_t tile_height; + uint16_t top_left_x; + uint16_t top_left_y; + uint8_t* tiles; + const displayio_buffer_transform_t* absolute_transform; + displayio_area_t dirty_area; // Stored as a relative area until the refresh area is fetched. + displayio_area_t previous_area; // Stored as an absolute area. + displayio_area_t current_area; // Stored as an absolute area so it applies across frames. + bool partial_change :1; + bool full_change :1; + bool moved :1; + bool inline_tiles :1; + bool in_group :1; + bool flip_x :1; + bool flip_y :1; + bool transpose_xy :1; + bool hidden :1; + bool hidden_by_parent :1; + uint8_t padding :6; +} displayio_tilegrid_t; + +void displayio_tilegrid_set_hidden_by_parent(displayio_tilegrid_t *self, bool hidden); + +// Updating the screen is a three stage process. + +// The first stage is used to determine i +displayio_area_t* displayio_tilegrid_get_refresh_areas(displayio_tilegrid_t *self, displayio_area_t* tail); + +// Area is always in absolute screen coordinates. Update transform is used to inform TileGrids how +// they relate to it. +bool displayio_tilegrid_fill_area(displayio_tilegrid_t *self, const _displayio_colorspace_t* colorspace, const displayio_area_t* area, uint32_t* mask, uint32_t *buffer); +void displayio_tilegrid_update_transform(displayio_tilegrid_t *group, const displayio_buffer_transform_t* parent_transform); + +// Fills in area with the maximum bounds of all related pixels in the last rendered frame. Returns +// false if the tilegrid wasn't rendered in the last frame. +bool displayio_tilegrid_get_previous_area(displayio_tilegrid_t *self, displayio_area_t* area); +void displayio_tilegrid_finish_refresh(displayio_tilegrid_t *self); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_TILEGRID_H diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c new file mode 100644 index 0000000000000..efa61265e6d7b --- /dev/null +++ b/shared-module/displayio/__init__.c @@ -0,0 +1,310 @@ + +#include + +#include "shared-module/displayio/__init__.h" + +#include "lib/utils/interrupt_char.h" +#include "py/reload.h" +#include "py/runtime.h" +#include "shared-bindings/board/__init__.h" +#include "shared-bindings/displayio/Bitmap.h" +#include "shared-bindings/displayio/Display.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/displayio/Palette.h" +#include "shared-module/displayio/area.h" +#include "supervisor/shared/autoreload.h" +#include "supervisor/shared/display.h" +#include "supervisor/memory.h" + +#include "supervisor/spi_flash_api.h" +#include "py/mpconfig.h" + +primary_display_t displays[CIRCUITPY_DISPLAY_LIMIT]; + +// Check for recursive calls to displayio_background. +bool displayio_background_in_progress = false; + +void displayio_background(void) { + if (mp_hal_is_interrupted()) { + return; + } + if (reload_requested) { + // Reload is about to happen, so don't redisplay. + return; + } + + if (displayio_background_in_progress) { + // Don't allow recursive calls to this routine. + return; + } + + displayio_background_in_progress = true; + + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].display.base.type == NULL || displays[i].display.base.type == &mp_type_NoneType) { + // Skip null display. + continue; + } + if (displays[i].display.base.type == &displayio_display_type) { + displayio_display_background(&displays[i].display); + } else if (displays[i].epaper_display.base.type == &displayio_epaperdisplay_type) { + displayio_epaperdisplay_background(&displays[i].epaper_display); + } + } + + // All done. + displayio_background_in_progress = false; +} + +void common_hal_displayio_release_displays(void) { + // Release displays before busses so that they can send any final commands to turn the display + // off properly. + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + mp_const_obj_t display_type = displays[i].display.base.type; + if (display_type == NULL || display_type == &mp_type_NoneType) { + continue; + } else if (display_type == &displayio_display_type) { + release_display(&displays[i].display); + } else if (display_type == &displayio_epaperdisplay_type) { + release_epaperdisplay(&displays[i].epaper_display); + } + displays[i].display.base.type = &mp_type_NoneType; + } + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + mp_const_obj_t bus_type = displays[i].fourwire_bus.base.type; + if (bus_type == NULL || bus_type == &mp_type_NoneType) { + continue; + } else if (bus_type == &displayio_fourwire_type) { + common_hal_displayio_fourwire_deinit(&displays[i].fourwire_bus); + } else if (bus_type == &displayio_i2cdisplay_type) { + common_hal_displayio_i2cdisplay_deinit(&displays[i].i2cdisplay_bus); + } else if (bus_type == &displayio_parallelbus_type) { + common_hal_displayio_parallelbus_deinit(&displays[i].parallel_bus); + } + displays[i].fourwire_bus.base.type = &mp_type_NoneType; + } + + supervisor_stop_terminal(); +} + +void reset_displays(void) { + // The SPI buses used by FourWires may be allocated on the heap so we need to move them inline. + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].fourwire_bus.base.type == &displayio_fourwire_type) { + displayio_fourwire_obj_t* fourwire = &displays[i].fourwire_bus; + if (((uint32_t) fourwire->bus) < ((uint32_t) &displays) || + ((uint32_t) fourwire->bus) > ((uint32_t) &displays + CIRCUITPY_DISPLAY_LIMIT)) { + busio_spi_obj_t* original_spi = fourwire->bus; + #if BOARD_SPI + // We don't need to move original_spi if it is the board.SPI object because it is + // statically allocated already. (Doing so would also make it impossible to reference in + // a subsequent VM run.) + if (original_spi == common_hal_board_get_spi()) { + continue; + } + #endif + #ifdef BOARD_USE_INTERNAL_SPI + if (original_spi == (mp_obj_t)(&supervisor_flash_spi_bus)) { + continue; + } + #endif + memcpy(&fourwire->inline_bus, original_spi, sizeof(busio_spi_obj_t)); + fourwire->bus = &fourwire->inline_bus; + // Check for other displays that use the same spi bus and swap them too. + for (uint8_t j = i + 1; j < CIRCUITPY_DISPLAY_LIMIT; j++) { + if (displays[i].fourwire_bus.base.type == &displayio_fourwire_type && + displays[i].fourwire_bus.bus == original_spi) { + displays[i].fourwire_bus.bus = &fourwire->inline_bus; + } + } + } + } else if (displays[i].i2cdisplay_bus.base.type == &displayio_i2cdisplay_type) { + displayio_i2cdisplay_obj_t* i2c = &displays[i].i2cdisplay_bus; + if (((uint32_t) i2c->bus) < ((uint32_t) &displays) || + ((uint32_t) i2c->bus) > ((uint32_t) &displays + CIRCUITPY_DISPLAY_LIMIT)) { + busio_i2c_obj_t* original_i2c = i2c->bus; + #if BOARD_I2C + // We don't need to move original_i2c if it is the board.I2C object because it is + // statically allocated already. (Doing so would also make it impossible to reference in + // a subsequent VM run.) + if (original_i2c == common_hal_board_get_i2c()) { + continue; + } + #endif + memcpy(&i2c->inline_bus, original_i2c, sizeof(busio_i2c_obj_t)); + i2c->bus = &i2c->inline_bus; + // Check for other displays that use the same i2c bus and swap them too. + for (uint8_t j = i + 1; j < CIRCUITPY_DISPLAY_LIMIT; j++) { + if (displays[i].i2cdisplay_bus.base.type == &displayio_i2cdisplay_type && + displays[i].i2cdisplay_bus.bus == original_i2c) { + displays[i].i2cdisplay_bus.bus = &i2c->inline_bus; + } + } + } + } else { + // Not an active display bus. + continue; + } + } + + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + // Reset the displayed group. Only the first will get the terminal but + // that's ok. + if (displays[i].display.base.type == &displayio_display_type) { + reset_display(&displays[i].display); + } else if (displays[i].epaper_display.base.type == &displayio_epaperdisplay_type) { + displayio_epaperdisplay_obj_t* display = &displays[i].epaper_display; + common_hal_displayio_epaperdisplay_show(display, NULL); + } + } +} + +void displayio_gc_collect(void) { + for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { + if (displays[i].display.base.type == NULL) { + continue; + } + + // Alternatively, we could use gc_collect_root over the whole object, + // but this is more precise, and is the only field that needs marking. + if (displays[i].display.base.type == &displayio_display_type) { + displayio_display_collect_ptrs(&displays[i].display); + } else if (displays[i].epaper_display.base.type == &displayio_epaperdisplay_type) { + displayio_epaperdisplay_collect_ptrs(&displays[i].epaper_display); + } + } +} + +void displayio_area_expand(displayio_area_t* original, const displayio_area_t* addition) { + if (addition->x1 < original->x1) { + original->x1 = addition->x1; + } + if (addition->y1 < original->y1) { + original->y1 = addition->y1; + } + if (addition->x2 > original->x2) { + original->x2 = addition->x2; + } + if (addition->y2 > original->y2) { + original->y2 = addition->y2; + } +} + +void displayio_area_copy(const displayio_area_t* src, displayio_area_t* dst) { + dst->x1 = src->x1; + dst->y1 = src->y1; + dst->x2 = src->x2; + dst->y2 = src->y2; +} + +void displayio_area_scale(displayio_area_t* area, uint16_t scale) { + area->x1 *= scale; + area->y1 *= scale; + area->x2 *= scale; + area->y2 *= scale; +} + +void displayio_area_shift(displayio_area_t* area, int16_t dx, int16_t dy) { + area->x1 += dx; + area->y1 += dy; + area->x2 += dx; + area->y2 += dy; +} + +bool displayio_area_compute_overlap(const displayio_area_t* a, + const displayio_area_t* b, + displayio_area_t* overlap) { + overlap->x1 = a->x1; + if (b->x1 > overlap->x1) { + overlap->x1 = b->x1; + } + overlap->x2 = a->x2; + if (b->x2 < overlap->x2) { + overlap->x2 = b->x2; + } + if (overlap->x1 >= overlap->x2) { + return false; + } + overlap->y1 = a->y1; + if (b->y1 > overlap->y1) { + overlap->y1 = b->y1; + } + overlap->y2 = a->y2; + if (b->y2 < overlap->y2) { + overlap->y2 = b->y2; + } + if (overlap->y1 >= overlap->y2) { + return false; + } + return true; +} + +void displayio_area_union(const displayio_area_t* a, + const displayio_area_t* b, + displayio_area_t* u) { + u->x1 = a->x1; + if (b->x1 < u->x1) { + u->x1 = b->x1; + } + u->x2 = a->x2; + if (b->x2 > u->x2) { + u->x2 = b->x2; + } + + u->y1 = a->y1; + if (b->y1 < u->y1) { + u->y1 = b->y1; + } + u->y2 = a->y2; + if (b->y2 > u->y2) { + u->y2 = b->y2; + } +} + +uint16_t displayio_area_width(const displayio_area_t* area) { + return area->x2 - area->x1; +} + +uint16_t displayio_area_height(const displayio_area_t* area) { + return area->y2 - area->y1; +} + +uint32_t displayio_area_size(const displayio_area_t* area) { + return displayio_area_width(area) * displayio_area_height(area); +} + +bool displayio_area_equal(const displayio_area_t* a, const displayio_area_t* b) { + return a->x1 == b->x1 && + a->y1 == b->y1 && + a->x2 == b->x2 && + a->y2 == b->y2; +} + +// Original and whole must be in the same coordinate space. +void displayio_area_transform_within(bool mirror_x, bool mirror_y, bool transpose_xy, + const displayio_area_t* original, + const displayio_area_t* whole, + displayio_area_t* transformed) { + if (mirror_x) { + transformed->x1 = whole->x1 + (whole->x2 - original->x2); + transformed->x2 = whole->x2 - (original->x1 - whole->x1); + } else { + transformed->x1 = original->x1; + transformed->x2 = original->x2; + } + if (mirror_y) { + transformed->y1 = whole->y1 + (whole->y2 - original->y2); + transformed->y2 = whole->y2 - (original->y1 - whole->y1); + } else { + transformed->y1 = original->y1; + transformed->y2 = original->y2; + } + if (transpose_xy) { + int16_t y1 = transformed->y1; + int16_t y2 = transformed->y2; + transformed->y1 = whole->y1 + (transformed->x1 - whole->x1); + transformed->y2 = whole->y1 + (transformed->x2 - whole->x1); + transformed->x2 = whole->x1 + (y2 - whole->y1); + transformed->x1 = whole->x1 + (y1 - whole->y1); + } +} diff --git a/shared-module/displayio/__init__.h b/shared-module/displayio/__init__.h new file mode 100644 index 0000000000000..e78bc61ce407c --- /dev/null +++ b/shared-module/displayio/__init__.h @@ -0,0 +1,57 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO___INIT___H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO___INIT___H + +#include "shared-bindings/displayio/Display.h" +#include "shared-bindings/displayio/EPaperDisplay.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/displayio/I2CDisplay.h" +#include "shared-bindings/displayio/ParallelBus.h" + +typedef struct { + union { + displayio_fourwire_obj_t fourwire_bus; + displayio_i2cdisplay_obj_t i2cdisplay_bus; + displayio_parallelbus_obj_t parallel_bus; + }; + union { + displayio_display_obj_t display; + displayio_epaperdisplay_obj_t epaper_display; + }; +} primary_display_t; + +extern primary_display_t displays[CIRCUITPY_DISPLAY_LIMIT]; + +extern displayio_group_t circuitpython_splash; + +void displayio_background(void); +void reset_displays(void); +void displayio_gc_collect(void); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO___INIT___H diff --git a/shared-module/displayio/area.h b/shared-module/displayio/area.h new file mode 100644 index 0000000000000..ec7c389b4b55a --- /dev/null +++ b/shared-module/displayio/area.h @@ -0,0 +1,73 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_AREA_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_AREA_H + +// Implementations are in __init__.c +typedef struct _displayio_area_t displayio_area_t; + +struct _displayio_area_t { + int16_t x1; + int16_t y1; + int16_t x2; // Second point is exclusive. + int16_t y2; + const displayio_area_t* next; // Next area in the linked list. +}; + +typedef struct { + uint16_t x; + uint16_t y; + int8_t dx; + int8_t dy; + uint8_t scale; + uint16_t width; + uint16_t height; + bool mirror_x; + bool mirror_y; + bool transpose_xy; +} displayio_buffer_transform_t; + +void displayio_area_union(const displayio_area_t* a, + const displayio_area_t* b, + displayio_area_t* u); +void displayio_area_expand(displayio_area_t* original, const displayio_area_t* addition); +void displayio_area_copy(const displayio_area_t* src, displayio_area_t* dst); +void displayio_area_scale(displayio_area_t* area, uint16_t scale); +void displayio_area_shift(displayio_area_t* area, int16_t dx, int16_t dy); +bool displayio_area_compute_overlap(const displayio_area_t* a, + const displayio_area_t* b, + displayio_area_t* overlap); +uint16_t displayio_area_width(const displayio_area_t* area); +uint16_t displayio_area_height(const displayio_area_t* area); +uint32_t displayio_area_size(const displayio_area_t* area); +bool displayio_area_equal(const displayio_area_t* a, const displayio_area_t* b); +void displayio_area_transform_within(bool mirror_x, bool mirror_y, bool transpose_xy, + const displayio_area_t* original, + const displayio_area_t* whole, + displayio_area_t* transformed); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_AREA_H diff --git a/shared-module/displayio/display_core.c b/shared-module/displayio/display_core.c new file mode 100644 index 0000000000000..120b70f76ad01 --- /dev/null +++ b/shared-module/displayio/display_core.c @@ -0,0 +1,345 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/Display.h" + +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/displayio/I2CDisplay.h" +#include "shared-bindings/displayio/ParallelBus.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/__init__.h" +#include "supervisor/shared/display.h" +#include "supervisor/shared/tick.h" + +#include +#include + +#include "tick.h" + +void displayio_display_core_construct(displayio_display_core_t* self, + mp_obj_t bus, uint16_t width, uint16_t height, uint16_t ram_width, uint16_t ram_height, int16_t colstart, int16_t rowstart, uint16_t rotation, + uint16_t color_depth, bool grayscale, bool pixels_in_byte_share_row, uint8_t bytes_per_cell, bool reverse_pixels_in_byte) { + self->colorspace.depth = color_depth; + self->colorspace.grayscale = grayscale; + self->colorspace.pixels_in_byte_share_row = pixels_in_byte_share_row; + self->colorspace.bytes_per_cell = bytes_per_cell; + self->colorspace.reverse_pixels_in_byte = reverse_pixels_in_byte; + self->colorspace.dither = false; + self->current_group = NULL; + self->colstart = colstart; + self->rowstart = rowstart; + self->last_refresh = 0; + + if (MP_OBJ_IS_TYPE(bus, &displayio_parallelbus_type)) { + self->bus_reset = common_hal_displayio_parallelbus_reset; + self->bus_free = common_hal_displayio_parallelbus_bus_free; + self->begin_transaction = common_hal_displayio_parallelbus_begin_transaction; + self->send = common_hal_displayio_parallelbus_send; + self->end_transaction = common_hal_displayio_parallelbus_end_transaction; + } else if (MP_OBJ_IS_TYPE(bus, &displayio_fourwire_type)) { + self->bus_reset = common_hal_displayio_fourwire_reset; + self->bus_free = common_hal_displayio_fourwire_bus_free; + self->begin_transaction = common_hal_displayio_fourwire_begin_transaction; + self->send = common_hal_displayio_fourwire_send; + self->end_transaction = common_hal_displayio_fourwire_end_transaction; + } else if (MP_OBJ_IS_TYPE(bus, &displayio_i2cdisplay_type)) { + self->bus_reset = common_hal_displayio_i2cdisplay_reset; + self->bus_free = common_hal_displayio_i2cdisplay_bus_free; + self->begin_transaction = common_hal_displayio_i2cdisplay_begin_transaction; + self->send = common_hal_displayio_i2cdisplay_send; + self->end_transaction = common_hal_displayio_i2cdisplay_end_transaction; + } else { + mp_raise_ValueError(translate("Unsupported display bus type")); + } + self->bus = bus; + + + supervisor_start_terminal(width, height); + + self->width = width; + self->height = height; + self->ram_width = ram_width; + self->ram_height = ram_height; + + displayio_display_core_set_rotation(self, rotation); +} + +void displayio_display_core_set_rotation( displayio_display_core_t* self, + int rotation) { + int height = self->height; + int width = self->width; + + rotation = rotation % 360; + self->rotation = rotation; + self->transform.x = 0; + self->transform.y = 0; + self->transform.scale = 1; + self->transform.mirror_x = false; + self->transform.mirror_y = false; + self->transform.transpose_xy = false; + if (rotation == 0 || rotation == 180) { + if (rotation == 180) { + self->transform.mirror_x = true; + self->transform.mirror_y = true; + } + } else { + self->transform.transpose_xy = true; + if (rotation == 270) { + self->transform.mirror_y = true; + } else { + self->transform.mirror_x = true; + } + } + + self->area.x1 = 0; + self->area.y1 = 0; + self->area.next = NULL; + + self->transform.dx = 1; + self->transform.dy = 1; + if (self->transform.transpose_xy) { + self->area.x2 = height; + self->area.y2 = width; + if (self->transform.mirror_x) { + self->transform.x = height; + self->transform.dx = -1; + } + if (self->transform.mirror_y) { + self->transform.y = width; + self->transform.dy = -1; + } + } else { + self->area.x2 = width; + self->area.y2 = height; + if (self->transform.mirror_x) { + self->transform.x = width; + self->transform.dx = -1; + } + if (self->transform.mirror_y) { + self->transform.y = height; + self->transform.dy = -1; + } + } +} + +bool displayio_display_core_show(displayio_display_core_t* self, displayio_group_t* root_group) { + if (root_group == NULL) { + if (!circuitpython_splash.in_group) { + root_group = &circuitpython_splash; + } else if (self->current_group == &circuitpython_splash) { + return true; + } + } + if (root_group == self->current_group) { + return true; + } + if (root_group != NULL && root_group->in_group) { + return false; + } + if (self->current_group != NULL) { + self->current_group->in_group = false; + } + + if (root_group != NULL) { + displayio_group_update_transform(root_group, &self->transform); + root_group->in_group = true; + } + self->current_group = root_group; + self->full_refresh = true; + return true; +} + +uint16_t displayio_display_core_get_width(displayio_display_core_t* self){ + return self->width; +} + +uint16_t displayio_display_core_get_height(displayio_display_core_t* self){ + return self->height; +} + +void displayio_display_core_set_dither(displayio_display_core_t* self, bool dither){ + self->colorspace.dither = dither; +} + +bool displayio_display_core_get_dither(displayio_display_core_t* self){ + return self->colorspace.dither; +} + +bool displayio_display_core_bus_free(displayio_display_core_t *self) { + return self->bus_free(self->bus); +} + +bool displayio_display_core_begin_transaction(displayio_display_core_t* self) { + return self->begin_transaction(self->bus); +} + +void displayio_display_core_end_transaction(displayio_display_core_t* self) { + self->end_transaction(self->bus); +} + +void displayio_display_core_set_region_to_update(displayio_display_core_t* self, uint8_t column_command, uint8_t row_command, uint16_t set_current_column_command, uint16_t set_current_row_command, bool data_as_commands, bool always_toggle_chip_select, displayio_area_t* area) { + uint16_t x1 = area->x1; + uint16_t x2 = area->x2; + uint16_t y1 = area->y1; + uint16_t y2 = area->y2; + // Collapse down the dimension where multiple pixels are in a byte. + if (self->colorspace.depth < 8) { + uint8_t pixels_per_byte = 8 / self->colorspace.depth; + if (self->colorspace.pixels_in_byte_share_row) { + x1 /= pixels_per_byte * self->colorspace.bytes_per_cell; + x2 /= pixels_per_byte * self->colorspace.bytes_per_cell; + } else { + y1 /= pixels_per_byte * self->colorspace.bytes_per_cell; + y2 /= pixels_per_byte * self->colorspace.bytes_per_cell; + } + } + + display_chip_select_behavior_t chip_select = CHIP_SELECT_UNTOUCHED; + if (always_toggle_chip_select || data_as_commands) { + chip_select = CHIP_SELECT_TOGGLE_EVERY_BYTE; + } + + // Set column. + displayio_display_core_begin_transaction(self); + uint8_t data[5]; + data[0] = column_command; + uint8_t data_length = 1; + display_byte_type_t data_type = DISPLAY_DATA; + if (!data_as_commands) { + self->send(self->bus, DISPLAY_COMMAND, CHIP_SELECT_UNTOUCHED, data, 1); + data_length = 0; + } else { + data_type = DISPLAY_COMMAND; + } + if (self->ram_width < 0x100) { + data[data_length++] = x1 + self->colstart; + data[data_length++] = x2 - 1 + self->colstart; + } else { + x1 += self->colstart; + x2 += self->colstart - 1; + data[data_length++] = x1 >> 8; + data[data_length++] = x1 & 0xff; + data[data_length++] = x2 >> 8; + data[data_length++] = x2 & 0xff; + } + self->send(self->bus, data_type, chip_select, data, data_length); + displayio_display_core_end_transaction(self); + if (set_current_column_command != NO_COMMAND) { + uint8_t command = set_current_column_command; + displayio_display_core_begin_transaction(self); + self->send(self->bus, DISPLAY_COMMAND, chip_select, &command, 1); + self->send(self->bus, DISPLAY_DATA, chip_select, data, data_length / 2); + displayio_display_core_end_transaction(self); + } + + + // Set row. + displayio_display_core_begin_transaction(self); + data[0] = row_command; + data_length = 1; + if (!data_as_commands) { + self->send(self->bus, DISPLAY_COMMAND, CHIP_SELECT_UNTOUCHED, data, 1); + data_length = 0; + } + if (self->ram_height < 0x100) { + data[data_length++] = y1 + self->rowstart; + data[data_length++] = y2 - 1 + self->rowstart; + } else { + y1 += self->rowstart; + y2 += self->rowstart - 1; + data[data_length++] = y1 >> 8; + data[data_length++] = y1 & 0xff; + data[data_length++] = y2 >> 8; + data[data_length++] = y2 & 0xff; + } + self->send(self->bus, data_type, chip_select, data, data_length); + displayio_display_core_end_transaction(self); + + if (set_current_row_command != NO_COMMAND) { + uint8_t command = set_current_row_command; + displayio_display_core_begin_transaction(self); + self->send(self->bus, DISPLAY_COMMAND, chip_select, &command, 1); + self->send(self->bus, DISPLAY_DATA, chip_select, data, data_length / 2); + displayio_display_core_end_transaction(self); + } +} + +void displayio_display_core_start_refresh(displayio_display_core_t* self) { + self->last_refresh = supervisor_ticks_ms64(); +} + +void displayio_display_core_finish_refresh(displayio_display_core_t* self) { + if (self->current_group != NULL) { + displayio_group_finish_refresh(self->current_group); + } + self->full_refresh = false; + self->last_refresh = supervisor_ticks_ms64(); +} + +void release_display_core(displayio_display_core_t* self) { + if (self->current_group != NULL) { + self->current_group->in_group = false; + } +} + +void displayio_display_core_collect_ptrs(displayio_display_core_t* self) { + gc_collect_ptr(self->current_group); +} + +bool displayio_display_core_fill_area(displayio_display_core_t *self, displayio_area_t* area, uint32_t* mask, uint32_t *buffer) { + return displayio_group_fill_area(self->current_group, &self->colorspace, area, mask, buffer); +} + +bool displayio_display_core_clip_area(displayio_display_core_t *self, const displayio_area_t* area, displayio_area_t* clipped) { + bool overlaps = displayio_area_compute_overlap(&self->area, area, clipped); + if (!overlaps) { + return false; + } + // Expand the area if we have multiple pixels per byte and we need to byte + // align the bounds. + if (self->colorspace.depth < 8) { + uint8_t pixels_per_byte = 8 / self->colorspace.depth * self->colorspace.bytes_per_cell; + if (self->colorspace.pixels_in_byte_share_row) { + if (clipped->x1 % pixels_per_byte != 0) { + clipped->x1 -= clipped->x1 % pixels_per_byte; + } + if (clipped->x2 % pixels_per_byte != 0) { + clipped->x2 += pixels_per_byte - clipped->x2 % pixels_per_byte; + } + } else { + if (clipped->y1 % pixels_per_byte != 0) { + clipped->y1 -= clipped->y1 % pixels_per_byte; + } + if (clipped->y2 % pixels_per_byte != 0) { + clipped->y2 += pixels_per_byte - clipped->y2 % pixels_per_byte; + } + } + } + return true; +} diff --git a/shared-module/displayio/display_core.h b/shared-module/displayio/display_core.h new file mode 100644 index 0000000000000..1c3d0f09c6139 --- /dev/null +++ b/shared-module/displayio/display_core.h @@ -0,0 +1,90 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_CORE_H +#define MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_CORE_H + +#include "shared-bindings/displayio/__init__.h" +#include "shared-bindings/displayio/Group.h" + +#include "shared-module/displayio/area.h" + +#define NO_COMMAND 0x100 + +typedef struct { + mp_obj_t bus; + displayio_group_t *current_group; + uint64_t last_refresh; + display_bus_bus_reset bus_reset; + display_bus_bus_free bus_free; + display_bus_begin_transaction begin_transaction; + display_bus_send send; + display_bus_end_transaction end_transaction; + displayio_buffer_transform_t transform; + displayio_area_t area; + uint16_t width; + uint16_t height; + uint16_t rotation; + uint16_t ram_width; + uint16_t ram_height; + _displayio_colorspace_t colorspace; + int16_t colstart; + int16_t rowstart; + bool full_refresh; // New group means we need to refresh the whole display. +} displayio_display_core_t; + +void displayio_display_core_construct(displayio_display_core_t* self, + mp_obj_t bus, uint16_t width, uint16_t height, uint16_t ram_width, uint16_t ram_height, int16_t colstart, int16_t rowstart, uint16_t rotation, + uint16_t color_depth, bool grayscale, bool pixels_in_byte_share_row, uint8_t bytes_per_cell, bool reverse_pixels_in_byte); + +bool displayio_display_core_show(displayio_display_core_t* self, displayio_group_t* root_group); + +uint16_t displayio_display_core_get_width(displayio_display_core_t* self); +uint16_t displayio_display_core_get_height(displayio_display_core_t* self); + +void displayio_display_core_set_dither(displayio_display_core_t* self, bool dither); +bool displayio_display_core_get_dither(displayio_display_core_t* self); + +void displayio_display_core_set_rotation(displayio_display_core_t* self, int rotation); + +bool displayio_display_core_bus_free(displayio_display_core_t *self); +bool displayio_display_core_begin_transaction(displayio_display_core_t* self); +void displayio_display_core_end_transaction(displayio_display_core_t* self); + +void displayio_display_core_set_region_to_update(displayio_display_core_t* self, uint8_t column_command, uint8_t row_command, uint16_t set_current_column_command, uint16_t set_current_row_command, bool data_as_commands, bool always_toggle_chip_select, displayio_area_t* area); + +void release_display_core(displayio_display_core_t* self); + +void displayio_display_core_start_refresh(displayio_display_core_t* self); +void displayio_display_core_finish_refresh(displayio_display_core_t* self); + +void displayio_display_core_collect_ptrs(displayio_display_core_t* self); + +bool displayio_display_core_fill_area(displayio_display_core_t *self, displayio_area_t* area, uint32_t* mask, uint32_t *buffer); + +bool displayio_display_core_clip_area(displayio_display_core_t *self, const displayio_area_t* area, displayio_area_t* clipped); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_DISPLAYIO_DISPLAY_CORE_H diff --git a/shared-module/displayio/mipi_constants.h b/shared-module/displayio/mipi_constants.h new file mode 100644 index 0000000000000..3cb7e4292fa42 --- /dev/null +++ b/shared-module/displayio/mipi_constants.h @@ -0,0 +1,37 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_MIPI_CONSTANTS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_MIPI_CONSTANTS_H + +// More info here: https://www.tonylabs.com/wp-content/uploads/MIPI_DCS_specification_v1.02.00.pdf +enum mipi_command { + MIPI_COMMAND_SET_COLUMN_ADDRESS = 0x2a, + MIPI_COMMAND_SET_PAGE_ADDRESS = 0x2b, + MIPI_COMMAND_WRITE_MEMORY_START = 0x2c, +}; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_DISPLAYIO_MIPI_CONSTANTS_H diff --git a/shared-module/fontio/BuiltinFont.c b/shared-module/fontio/BuiltinFont.c new file mode 100644 index 0000000000000..58820d5240212 --- /dev/null +++ b/shared-module/fontio/BuiltinFont.c @@ -0,0 +1,79 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/fontio/BuiltinFont.h" + + +#include "shared-bindings/fontio/Glyph.h" + +#include "py/objnamedtuple.h" + +mp_obj_t common_hal_fontio_builtinfont_get_bitmap(const fontio_builtinfont_t *self) { + return MP_OBJ_FROM_PTR(self->bitmap); +} + +mp_obj_t common_hal_fontio_builtinfont_get_bounding_box(const fontio_builtinfont_t *self) { + mp_obj_t *items = m_new(mp_obj_t, 2); + items[0] = MP_OBJ_NEW_SMALL_INT(self->width); + items[1] = MP_OBJ_NEW_SMALL_INT(self->height); + return mp_obj_new_tuple(2, items); +} + +uint8_t fontio_builtinfont_get_glyph_index(const fontio_builtinfont_t *self, mp_uint_t codepoint) { + if (codepoint >= 0x20 && codepoint <= 0x7e) { + return codepoint - 0x20; + } + // Do a linear search of the mapping for unicode. + const byte* j = self->unicode_characters; + uint8_t k = 0; + while (j < self->unicode_characters + self->unicode_characters_len) { + unichar potential_c = utf8_get_char(j); + j = utf8_next_char(j); + if (codepoint == potential_c) { + return 0x7f - 0x20 + k; + } + k++; + } + return 0xff; +} + +mp_obj_t common_hal_fontio_builtinfont_get_glyph(const fontio_builtinfont_t *self, mp_uint_t codepoint) { + uint8_t glyph_index = fontio_builtinfont_get_glyph_index(self, codepoint); + if (glyph_index == 0xff) { + return mp_const_none; + } + mp_obj_t field_values[8] = { + MP_OBJ_FROM_PTR(self->bitmap), + MP_OBJ_NEW_SMALL_INT(glyph_index), + MP_OBJ_NEW_SMALL_INT(self->width), + MP_OBJ_NEW_SMALL_INT(self->height), + MP_OBJ_NEW_SMALL_INT(0), + MP_OBJ_NEW_SMALL_INT(0), + MP_OBJ_NEW_SMALL_INT(self->width), + MP_OBJ_NEW_SMALL_INT(0) + }; + return namedtuple_make_new((const mp_obj_type_t*) &fontio_glyph_type, 8, field_values, NULL); +} diff --git a/shared-module/fontio/BuiltinFont.h b/shared-module/fontio/BuiltinFont.h new file mode 100644 index 0000000000000..30b4ade8c6a8d --- /dev/null +++ b/shared-module/fontio/BuiltinFont.h @@ -0,0 +1,47 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_FONTIO_BUILTINFONT_H +#define MICROPY_INCLUDED_SHARED_MODULE_FONTIO_BUILTINFONT_H + +#include +#include + +#include "py/obj.h" +#include "shared-bindings/displayio/Bitmap.h" + +typedef struct { + mp_obj_base_t base; + const displayio_bitmap_t* bitmap; + uint8_t width; + uint8_t height; + const byte* unicode_characters; + uint16_t unicode_characters_len; +} fontio_builtinfont_t; + +uint8_t fontio_builtinfont_get_glyph_index(const fontio_builtinfont_t *self, mp_uint_t codepoint); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_FONTIO_BUILTINFONT_H diff --git a/shared-module/fontio/__init__.c b/shared-module/fontio/__init__.c new file mode 100644 index 0000000000000..674343c5333d5 --- /dev/null +++ b/shared-module/fontio/__init__.c @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Nothing now. diff --git a/shared-module/gamepad/GamePad.c b/shared-module/gamepad/GamePad.c index 3a2b8a3fe9264..fdce0caab413f 100644 --- a/shared-module/gamepad/GamePad.c +++ b/shared-module/gamepad/GamePad.c @@ -24,23 +24,34 @@ * THE SOFTWARE. */ -#include - -#include "__init__.h" -#include "GamePad.h" - -#include "shared-bindings/digitalio/Pull.h" +#include "py/mpstate.h" #include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/gamepad/GamePad.h" - -void gamepad_init(size_t n_pins, const mp_obj_t* pins) { - for (size_t i=0; i<8; ++i) { - gamepad_singleton->pins[i] = NULL; +void common_hal_gamepad_gamepad_init(gamepad_obj_t *gamepad, + const mp_obj_t pins[], size_t n_pins) { + for (size_t i = 0; i < 8; ++i) { + gamepad->pins[i] = NULL; } - for (size_t i=0; ipulls = 0; + for (size_t i = 0; i < n_pins; ++i) { digitalio_digitalinout_obj_t *pin = MP_OBJ_TO_PTR(pins[i]); - gamepad_singleton->pins[i] = pin; - common_hal_digitalio_digitalinout_switch_to_input(pin, PULL_UP); + if (common_hal_digitalio_digitalinout_get_direction(pin) != + DIRECTION_INPUT) { + common_hal_digitalio_digitalinout_switch_to_input(pin, PULL_UP); + } + digitalio_pull_t pull = common_hal_digitalio_digitalinout_get_pull(pin); + if (pull == PULL_NONE) { + common_hal_digitalio_digitalinout_set_pull(pin, PULL_UP); + } + if (pull != PULL_DOWN) { + gamepad->pulls |= 1 << i; + } + gamepad->pins[i] = pin; } - gamepad_singleton->last = 0; + gamepad->last = 0; +} + +void common_hal_gamepad_gamepad_deinit(gamepad_obj_t *self) { + MP_STATE_VM(gamepad_singleton) = NULL; } diff --git a/shared-module/gamepad/GamePad.h b/shared-module/gamepad/GamePad.h index e5f709134de1d..048fbcd2b22f5 100644 --- a/shared-module/gamepad/GamePad.h +++ b/shared-module/gamepad/GamePad.h @@ -36,10 +36,7 @@ typedef struct { digitalio_digitalinout_obj_t* pins[8]; volatile uint8_t last; volatile uint8_t pressed; + uint8_t pulls; } gamepad_obj_t; -extern gamepad_obj_t* gamepad_singleton; - -void gamepad_init(size_t n_pins, const mp_obj_t* pins); - #endif // MICROPY_INCLUDED_GAMEPAD_GAMEPAD_H diff --git a/shared-module/gamepad/__init__.c b/shared-module/gamepad/__init__.c index b6c8be2157dbc..3e17a0fb5bd38 100644 --- a/shared-module/gamepad/__init__.c +++ b/shared-module/gamepad/__init__.c @@ -26,30 +26,38 @@ #include -#include "__init__.h" -#include "GamePad.h" +#include "py/mpstate.h" +#include "shared-bindings/gamepad/__init__.h" +#include "shared-bindings/gamepad/GamePad.h" #include "shared-bindings/digitalio/DigitalInOut.h" void gamepad_tick(void) { - if (!gamepad_singleton) { + uint8_t current = 0; + uint8_t bit = 1; + + void* singleton = MP_STATE_VM(gamepad_singleton); + if (singleton == NULL || !MP_OBJ_IS_TYPE(MP_OBJ_FROM_PTR(singleton), &gamepad_type)) { return; } - uint8_t gamepad_current = 0; - for (int i=0; i<8; ++i) { - digitalio_digitalinout_obj_t* pin = gamepad_singleton->pins[i]; + + gamepad_obj_t *self = MP_OBJ_TO_PTR(singleton); + for (int i = 0; i < 8; ++i) { + digitalio_digitalinout_obj_t* pin = self->pins[i]; if (!pin) { break; } - if (!common_hal_digitalio_digitalinout_get_value(pin)) { - gamepad_current |= 1<pressed |= gamepad_singleton->last & gamepad_current; - gamepad_singleton->last = gamepad_current; + current ^= self->pulls; + self->pressed |= self->last & current; + self->last = current; } void gamepad_reset(void) { - gamepad_singleton = NULL; + MP_STATE_VM(gamepad_singleton) = NULL; } diff --git a/shared-module/gamepadshift/GamePadShift.c b/shared-module/gamepadshift/GamePadShift.c new file mode 100644 index 0000000000000..b8fb4d3f4480c --- /dev/null +++ b/shared-module/gamepadshift/GamePadShift.c @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpstate.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-module/gamepadshift/GamePadShift.h" + +void common_hal_gamepadshift_gamepadshift_init(gamepadshift_obj_t *gamepadshift, + digitalio_digitalinout_obj_t *clock_pin, + digitalio_digitalinout_obj_t *data_pin, + digitalio_digitalinout_obj_t *latch_pin) { + common_hal_digitalio_digitalinout_switch_to_input(data_pin, PULL_NONE); + gamepadshift->data_pin = data_pin; + common_hal_digitalio_digitalinout_switch_to_output(clock_pin, 0, + DRIVE_MODE_PUSH_PULL); + gamepadshift->clock_pin = clock_pin; + common_hal_digitalio_digitalinout_switch_to_output(latch_pin, 1, + DRIVE_MODE_PUSH_PULL); + gamepadshift->latch_pin = latch_pin; + + gamepadshift->last = 0; +} + +void common_hal_gamepadshift_gamepadshift_deinit(gamepadshift_obj_t *gamepadshift) { + MP_STATE_VM(gamepad_singleton) = NULL; +} diff --git a/shared-module/gamepadshift/GamePadShift.h b/shared-module/gamepadshift/GamePadShift.h new file mode 100644 index 0000000000000..b4b26b7a98d77 --- /dev/null +++ b/shared-module/gamepadshift/GamePadShift.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Radomir Dopieralski for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_GAMEPADSHIFT_GAMEPADSHIFT_H +#define MICROPY_INCLUDED_GAMEPADSHIFT_GAMEPADSHIFT_H + +#include + +#include "shared-bindings/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + digitalio_digitalinout_obj_t* data_pin; + digitalio_digitalinout_obj_t* clock_pin; + digitalio_digitalinout_obj_t* latch_pin; + volatile uint8_t pressed; + volatile uint8_t last; +} gamepadshift_obj_t; + +#endif // MICROPY_INCLUDED_GAMEPADSHIFT_GAMEPADSHIFT_H diff --git a/shared-module/gamepadshift/__init__.c b/shared-module/gamepadshift/__init__.c new file mode 100644 index 0000000000000..47a008c503276 --- /dev/null +++ b/shared-module/gamepadshift/__init__.c @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/gamepadshift/__init__.h" + +#include "py/mpstate.h" +#include "shared-bindings/gamepadshift/GamePadShift.h" + +void gamepadshift_tick(void) { + void* singleton = MP_STATE_VM(gamepad_singleton); + if (singleton == NULL || !MP_OBJ_IS_TYPE(MP_OBJ_FROM_PTR(singleton), &gamepadshift_type)) { + return; + } + + gamepadshift_obj_t *self = MP_OBJ_TO_PTR(singleton); + uint8_t current = 0; + uint8_t bit = 1; + common_hal_digitalio_digitalinout_set_value(self->latch_pin, 1); + for (int i = 0; i < 8; ++i) { + common_hal_digitalio_digitalinout_set_value(self->clock_pin, 0); + if (common_hal_digitalio_digitalinout_get_value(self->data_pin)) { + current |= bit; + } + common_hal_digitalio_digitalinout_set_value(self->clock_pin, 1); + bit <<= 1; + } + common_hal_digitalio_digitalinout_set_value(self->latch_pin, 0); + self->pressed |= self->last & current; + self->last = current; +} + +void gamepadshift_reset(void) { + MP_STATE_VM(gamepad_singleton) = NULL; +} diff --git a/shared-module/gamepadshift/__init__.h b/shared-module/gamepadshift/__init__.h new file mode 100644 index 0000000000000..225db73361a2b --- /dev/null +++ b/shared-module/gamepadshift/__init__.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_GAMEPADSHIFT___INIT___H +#define MICROPY_INCLUDED_GAMEPADSHIFT___INIT___H + +void gamepadshift_tick(void); +void gamepadshift_reset(void); + +#endif // MICROPY_INCLUDED_GAMEPADSHIFT___INIT___H diff --git a/shared-module/network/__init__.c b/shared-module/network/__init__.c new file mode 100644 index 0000000000000..925e9a2a3039b --- /dev/null +++ b/shared-module/network/__init__.c @@ -0,0 +1,107 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Nick Moore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/objlist.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "py/mperrno.h" + +#include "supervisor/shared/tick.h" + +#include "shared-bindings/random/__init__.h" + +#include "shared-module/network/__init__.h" + +// mod_network_nic_list needs to be declared in mpconfigport.h + + +void network_module_init(void) { + mp_obj_list_init(&MP_STATE_PORT(mod_network_nic_list), 0); +} + +void network_module_deinit(void) { + for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { + mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; + mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); + if (nic_type->deinit != NULL) nic_type->deinit(nic); + } + mp_obj_list_set_len(&MP_STATE_PORT(mod_network_nic_list), 0); +} + +void network_module_background(void) { + static uint32_t next_tick = 0; + uint32_t this_tick = supervisor_ticks_ms32(); + if (this_tick < next_tick) return; + next_tick = this_tick + 1000; + + for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { + mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; + mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); + if (nic_type->timer_tick != NULL) nic_type->timer_tick(nic); + } +} + +void network_module_register_nic(mp_obj_t nic) { + for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { + if (MP_STATE_PORT(mod_network_nic_list).items[i] == nic) { + // nic already registered + return; + } + } + // nic not registered so add to list + mp_obj_list_append(MP_OBJ_FROM_PTR(&MP_STATE_PORT(mod_network_nic_list)), nic); +} + +mp_obj_t network_module_find_nic(const uint8_t *ip) { + // find a NIC that is suited to given IP address + for (mp_uint_t i = 0; i < MP_STATE_PORT(mod_network_nic_list).len; i++) { + mp_obj_t nic = MP_STATE_PORT(mod_network_nic_list).items[i]; + // TODO check IP suitability here + //mod_network_nic_type_t *nic_type = (mod_network_nic_type_t*)mp_obj_get_type(nic); + return nic; + } + + nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, translate("no available NIC"))); +} + +void network_module_create_random_mac_address(uint8_t *mac) { + uint32_t rb1 = shared_modules_random_getrandbits(24); + uint32_t rb2 = shared_modules_random_getrandbits(24); + // first octet has multicast bit (0) cleared and local bit (1) set + // everything else is just set randomly + mac[0] = ((uint8_t)(rb1 >> 16) & 0xfe) | 0x02; + mac[1] = (uint8_t)(rb1 >> 8); + mac[2] = (uint8_t)(rb1); + mac[3] = (uint8_t)(rb2 >> 16); + mac[4] = (uint8_t)(rb2 >> 8); + mac[5] = (uint8_t)(rb2); +} + +uint16_t network_module_create_random_source_tcp_port(void) { + return 0xc000 | shared_modules_random_getrandbits(14); +} diff --git a/shared-module/network/__init__.h b/shared-module/network/__init__.h new file mode 100644 index 0000000000000..f4eb05bb5108c --- /dev/null +++ b/shared-module/network/__init__.h @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2018 Nick Moore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_NETWORK___INIT___H +#define MICROPY_INCLUDED_SHARED_MODULE_NETWORK___INIT___H + +void network_module_create_random_mac_address(uint8_t *mac); +uint16_t network_module_create_random_source_tcp_port(void); + +#define MOD_NETWORK_IPADDR_BUF_SIZE (4) + +#define MOD_NETWORK_AF_INET (2) +#define MOD_NETWORK_AF_INET6 (10) + +#define MOD_NETWORK_SOCK_STREAM (1) +#define MOD_NETWORK_SOCK_DGRAM (2) +#define MOD_NETWORK_SOCK_RAW (3) + +struct _mod_network_socket_obj_t; + +typedef struct _mod_network_nic_type_t { + mp_obj_type_t base; + + // API for non-socket operations + int (*gethostbyname)(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *ip_out); + + // API for socket operations; return -1 on error + int (*socket)(struct _mod_network_socket_obj_t *socket, int *_errno); + void (*close)(struct _mod_network_socket_obj_t *socket); + int (*bind)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); + int (*listen)(struct _mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno); + int (*accept)(struct _mod_network_socket_obj_t *socket, struct _mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno); + int (*connect)(struct _mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); + mp_uint_t (*send)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno); + mp_uint_t (*recv)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno); + mp_uint_t (*sendto)(struct _mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno); + mp_uint_t (*recvfrom)(struct _mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno); + int (*setsockopt)(struct _mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno); + int (*settimeout)(struct _mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno); + int (*ioctl)(struct _mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); + void (*timer_tick)(struct _mod_network_socket_obj_t *socket); + void (*deinit)(struct _mod_network_socket_obj_t *socket); +} mod_network_nic_type_t; + +typedef struct _mod_network_socket_obj_t { + mp_obj_base_t base; + mp_obj_t nic; + mod_network_nic_type_t *nic_type; + union { + struct { + uint8_t domain; + uint8_t type; + int8_t fileno; + } u_param; + mp_uint_t u_state; + }; +} mod_network_socket_obj_t; + +extern const mod_network_nic_type_t mod_network_nic_type_wiznet5k; +extern const mod_network_nic_type_t mod_network_nic_type_cc3k; + +void network_module_init(void); +void network_module_deinit(void); +void network_module_background(void); +void network_module_register_nic(mp_obj_t nic); +mp_obj_t network_module_find_nic(const uint8_t *ip); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_NETWORK___INIT___H diff --git a/shared-module/os/__init__.c b/shared-module/os/__init__.c index 9eb04e2818cfb..8060eec4f33c4 100644 --- a/shared-module/os/__init__.c +++ b/shared-module/os/__init__.c @@ -50,6 +50,20 @@ STATIC mp_vfs_mount_t *lookup_path(const char* path, mp_obj_t *path_out) { return vfs; } +// Strip off trailing slashes to please underlying libraries +STATIC mp_vfs_mount_t *lookup_dir_path(const char* path, mp_obj_t *path_out) { + const char *p_out; + mp_vfs_mount_t *vfs = mp_vfs_lookup_path(path, &p_out); + if (vfs != MP_VFS_NONE && vfs != MP_VFS_ROOT) { + size_t len = strlen(p_out); + while (len > 1 && p_out[len - 1] == '/') { + len--; + } + *path_out = mp_obj_new_str_of_type(&mp_type_str, (const byte*)p_out, len); + } + return vfs; +} + STATIC mp_obj_t mp_vfs_proxy_call(mp_vfs_mount_t *vfs, qstr meth_name, size_t n_args, const mp_obj_t *args) { if (vfs == MP_VFS_NONE) { // mount point not found @@ -69,7 +83,7 @@ STATIC mp_obj_t mp_vfs_proxy_call(mp_vfs_mount_t *vfs, qstr meth_name, size_t n_ void common_hal_os_chdir(const char* path) { mp_obj_t path_out; - mp_vfs_mount_t *vfs = lookup_path(path, &path_out); + mp_vfs_mount_t *vfs = lookup_dir_path(path, &path_out); MP_STATE_VM(vfs_cur) = vfs; if (vfs == MP_VFS_ROOT) { // If we change to the root dir and a VFS is mounted at the root then @@ -77,7 +91,7 @@ void common_hal_os_chdir(const char* path) { // subsequent relative paths begin at the root of that VFS. for (vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) { if (vfs->len == 1) { - mp_obj_t root = mp_obj_new_str("/", 1, false); + mp_obj_t root = mp_obj_new_str("/", 1); mp_vfs_proxy_call(vfs, MP_QSTR_chdir, 1, &root); break; } @@ -93,7 +107,7 @@ mp_obj_t common_hal_os_getcwd(void) { mp_obj_t common_hal_os_listdir(const char* path) { mp_obj_t path_out; - mp_vfs_mount_t *vfs = lookup_path(path, &path_out); + mp_vfs_mount_t *vfs = lookup_dir_path(path, &path_out); mp_vfs_ilistdir_it_t iter; mp_obj_t iter_obj = MP_OBJ_FROM_PTR(&iter); @@ -103,7 +117,7 @@ mp_obj_t common_hal_os_listdir(const char* path) { iter.base.type = &mp_type_polymorph_iter; iter.iternext = mp_vfs_ilistdir_it_iternext; iter.cur.vfs = MP_STATE_VM(vfs_mount_table); - iter.is_str = mp_obj_get_type(path) == &mp_type_str; + iter.is_str = true; iter.is_iter = false; } else { iter_obj = mp_vfs_proxy_call(vfs, MP_QSTR_ilistdir, 1, &path_out); @@ -112,16 +126,16 @@ mp_obj_t common_hal_os_listdir(const char* path) { mp_obj_t dir_list = mp_obj_new_list(0, NULL); mp_obj_t next; while ((next = mp_iternext(iter_obj)) != MP_OBJ_STOP_ITERATION) { - mp_obj_t *items; - mp_obj_get_array_fixed_n(next, 3, &items); - mp_obj_list_append(dir_list, items[0]); + // next[0] is the filename. + mp_obj_list_append(dir_list, mp_obj_subscr(next, MP_OBJ_NEW_SMALL_INT(0), MP_OBJ_SENTINEL)); + RUN_BACKGROUND_TASKS; } return dir_list; } void common_hal_os_mkdir(const char* path) { mp_obj_t path_out; - mp_vfs_mount_t *vfs = lookup_path(path, &path_out); + mp_vfs_mount_t *vfs = lookup_dir_path(path, &path_out); if (vfs == MP_VFS_ROOT || (vfs != MP_VFS_NONE && !strcmp(mp_obj_str_get_str(path_out), "/"))) { mp_raise_OSError(MP_EEXIST); } @@ -147,7 +161,7 @@ void common_hal_os_rename(const char* old_path, const char* new_path) { void common_hal_os_rmdir(const char* path) { mp_obj_t path_out; - mp_vfs_mount_t *vfs = lookup_path(path, &path_out); + mp_vfs_mount_t *vfs = lookup_dir_path(path, &path_out); mp_vfs_proxy_call(vfs, MP_QSTR_rmdir, 1, &path_out); } diff --git a/shared-module/socket/__init__.c b/shared-module/socket/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/storage/__init__.c b/shared-module/storage/__init__.c index 97a049bac6860..c3d4b50c8edaa 100644 --- a/shared-module/storage/__init__.c +++ b/shared-module/storage/__init__.c @@ -32,7 +32,12 @@ #include "py/mperrno.h" #include "py/obj.h" #include "py/runtime.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/os/__init__.h" #include "shared-bindings/storage/__init__.h" +#include "supervisor/filesystem.h" +#include "supervisor/flash.h" +#include "supervisor/usb.h" STATIC mp_obj_t mp_vfs_proxy_call(mp_vfs_mount_t *vfs, qstr meth_name, size_t n_args, const mp_obj_t *args) { if (vfs == MP_VFS_NONE) { @@ -63,8 +68,17 @@ void common_hal_storage_mount(mp_obj_t vfs_obj, const char* mount_path, bool rea args[0] = readonly ? mp_const_true : mp_const_false; args[1] = mp_const_false; // Don't make the file system automatically when mounting. - // call the underlying object to do any mounting operation - mp_vfs_proxy_call(vfs, MP_QSTR_mount, 2, (mp_obj_t*)&args); + // Check that there's no file or directory with the same name as the mount point. + // But it's ok to mount '/' in any case. + if (strcmp(vfs->str, "/") != 0) { + nlr_buf_t nlr; + if (nlr_push(&nlr) == 0) { + common_hal_os_stat(mount_path); + nlr_pop(); + // Something with the same name exists. + mp_raise_OSError(MP_EEXIST); + } + } // check that the destination mount point is unused const char *path_out; @@ -78,6 +92,9 @@ void common_hal_storage_mount(mp_obj_t vfs_obj, const char* mount_path, bool rea } } + // call the underlying object to do any mounting operation + mp_vfs_proxy_call(vfs, MP_QSTR_mount, 2, (mp_obj_t*)&args); + // Insert the vfs into the mount table by pushing it onto the front of the // mount table. mp_vfs_mount_t **vfsp = &MP_STATE_VM(vfs_mount_table); @@ -109,19 +126,40 @@ void common_hal_storage_umount_object(mp_obj_t vfs_obj) { mp_vfs_proxy_call(vfs, MP_QSTR_umount, 0, NULL); } -void common_hal_storage_umount_path(const char* mount_path) { - // remove vfs from the mount table - mp_obj_t *vfs_obj = NULL; +STATIC mp_obj_t storage_object_from_path(const char* mount_path) { for (mp_vfs_mount_t **vfsp = &MP_STATE_VM(vfs_mount_table); *vfsp != NULL; vfsp = &(*vfsp)->next) { if (strcmp(mount_path, (*vfsp)->str) == 0) { - vfs_obj = (*vfsp)->obj; - break; + return (*vfsp)->obj; } } + mp_raise_OSError(MP_EINVAL); +} + +void common_hal_storage_umount_path(const char* mount_path) { + common_hal_storage_umount_object(storage_object_from_path(mount_path)); +} + +mp_obj_t common_hal_storage_getmount(const char *mount_path) { + return storage_object_from_path(mount_path); +} - if (vfs_obj == NULL) { +void common_hal_storage_remount(const char *mount_path, bool readonly, bool disable_concurrent_write_protection) { + if (strcmp(mount_path, "/") != 0) { mp_raise_OSError(MP_EINVAL); } - common_hal_storage_umount_object(vfs_obj); + #ifdef USB_AVAILABLE + if (!usb_msc_ejected()) { + mp_raise_RuntimeError(translate("Cannot remount '/' when USB is active.")); + } + #endif + + filesystem_set_internal_writable_by_usb(readonly); + filesystem_set_internal_concurrent_write_protection(!disable_concurrent_write_protection); +} + +void common_hal_storage_erase_filesystem(void) { + filesystem_init(false, true); // Force a re-format. + common_hal_mcu_reset(); + // We won't actually get here, since we're resetting. } diff --git a/shared-module/struct/__init__.c b/shared-module/struct/__init__.c index eac41c9c31a33..245dbbda97ca8 100644 --- a/shared-module/struct/__init__.c +++ b/shared-module/struct/__init__.c @@ -31,11 +31,12 @@ #include "py/runtime.h" #include "py/binary.h" #include "py/parsenum.h" +#include "supervisor/shared/translate.h" void struct_validate_format(char fmt) { #if MICROPY_NONSTANDARD_TYPECODES if( fmt == 'S' || fmt == 'O') { - mp_raise_RuntimeError("'S' and 'O' are not supported format types"); + mp_raise_RuntimeError(translate("'S' and 'O' are not supported format types")); } #endif } @@ -70,46 +71,6 @@ mp_uint_t get_fmt_num(const char **p) { return val; } - -void shared_modules_struct_pack_into(mp_obj_t fmt_in, byte *p, byte* end_p, size_t n_args, const mp_obj_t *args) { - const char *fmt = mp_obj_str_get_str(fmt_in); - char fmt_type = get_fmt_type(&fmt); - - size_t i; - for (i = 0; i < n_args;) { - mp_uint_t sz = 1; - if (*fmt == '\0') { - // more arguments given than used by format string; CPython raises struct.error here - mp_raise_RuntimeError("too many arguments provided with the given format"); - } - struct_validate_format(*fmt); - - if (unichar_isdigit(*fmt)) { - sz = get_fmt_num(&fmt); - } - if (p + sz > end_p) { - mp_raise_RuntimeError("buffer too small"); - } - - if (*fmt == 's') { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[i++], &bufinfo, MP_BUFFER_READ); - mp_uint_t to_copy = sz; - if (bufinfo.len < to_copy) { - to_copy = bufinfo.len; - } - memcpy(p, bufinfo.buf, to_copy); - memset(p + to_copy, 0, sz - to_copy); - p += sz; - } else { - while (sz--) { - mp_binary_set_val(fmt_type, *fmt, args[i++], &p); - } - } - fmt++; - } -} - mp_uint_t calcsize_items(const char *fmt) { mp_uint_t cnt = 0; while (*fmt) { @@ -120,7 +81,10 @@ mp_uint_t calcsize_items(const char *fmt) { num = 1; } } - cnt += num; + // Pad bytes are skipped and don't get included in the item count. + if (*fmt != 'x') { + cnt += num; + } fmt++; } return cnt; @@ -155,14 +119,71 @@ mp_uint_t shared_modules_struct_calcsize(mp_obj_t fmt_in) { return size; } +void shared_modules_struct_pack_into(mp_obj_t fmt_in, byte *p, byte* end_p, size_t n_args, const mp_obj_t *args) { + const char *fmt = mp_obj_str_get_str(fmt_in); + char fmt_type = get_fmt_type(&fmt); + const mp_uint_t total_sz = shared_modules_struct_calcsize(fmt_in); + + if (p + total_sz > end_p) { + mp_raise_RuntimeError(translate("buffer too small")); + } + + size_t i; + for (i = 0; i < n_args;) { + mp_uint_t sz = 1; + if (*fmt == '\0') { + // more arguments given than used by format string; CPython raises struct.error here + mp_raise_RuntimeError(translate("too many arguments provided with the given format")); + } + struct_validate_format(*fmt); + + if (unichar_isdigit(*fmt)) { + sz = get_fmt_num(&fmt); + } + + if (*fmt == 's') { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[i++], &bufinfo, MP_BUFFER_READ); + mp_uint_t to_copy = sz; + if (bufinfo.len < to_copy) { + to_copy = bufinfo.len; + } + memcpy(p, bufinfo.buf, to_copy); + memset(p + to_copy, 0, sz - to_copy); + p += sz; + } else { + while (sz--) { + mp_binary_set_val(fmt_type, *fmt, args[i], &p); + // Pad bytes don't have a corresponding argument. + if (*fmt != 'x') { + i++; + } + } + } + fmt++; + } +} -mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byte *end_p) { +mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byte *end_p, bool exact_size) { const char *fmt = mp_obj_str_get_str(fmt_in); char fmt_type = get_fmt_type(&fmt); - mp_uint_t num_items = calcsize_items(fmt); + const mp_uint_t num_items = calcsize_items(fmt); + const mp_uint_t total_sz = shared_modules_struct_calcsize(fmt_in); mp_obj_tuple_t *res = MP_OBJ_TO_PTR(mp_obj_new_tuple(num_items, NULL)); + // If exact_size, make sure the buffer is exactly the right size. + // Otherwise just make sure it's big enough. + if (exact_size) { + if (p + total_sz != end_p) { + mp_raise_RuntimeError(translate("buffer size must match format")); + } + } else { + if (p + total_sz > end_p) { + mp_raise_RuntimeError(translate("buffer too small")); + } + } + for (uint i = 0; i < num_items;) { mp_uint_t sz = 1; @@ -171,9 +192,6 @@ mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byt if (unichar_isdigit(*fmt)) { sz = get_fmt_num(&fmt); } - if (p + sz > end_p) { - mp_raise_RuntimeError("buffer too small"); - } mp_obj_t item; if (*fmt == 's') { item = mp_obj_new_bytes(p, sz); @@ -182,7 +200,10 @@ mp_obj_tuple_t * shared_modules_struct_unpack_from(mp_obj_t fmt_in, byte *p, byt } else { while (sz--) { item = mp_binary_get_val(fmt_type, *fmt, &p); - res->items[i++] = item; + // Pad bytes are not stored. + if (*fmt != 'x') { + res->items[i++] = item; + } } } fmt++; diff --git a/shared-module/terminalio/Terminal.c b/shared-module/terminalio/Terminal.c new file mode 100644 index 0000000000000..df92a5dc48688 --- /dev/null +++ b/shared-module/terminalio/Terminal.c @@ -0,0 +1,130 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/terminalio/Terminal.h" + +#include "shared-module/fontio/BuiltinFont.h" +#include "shared-bindings/displayio/TileGrid.h" + +void common_hal_terminalio_terminal_construct(terminalio_terminal_obj_t *self, displayio_tilegrid_t* tilegrid, const fontio_builtinfont_t* font) { + self->cursor_x = 0; + self->cursor_y = 0; + self->font = font; + self->tilegrid = tilegrid; + self->first_row = 0; + + for (uint16_t x = 0; x < self->tilegrid->width_in_tiles; x++) { + for (uint16_t y = 0; y < self->tilegrid->height_in_tiles; y++) { + common_hal_displayio_tilegrid_set_tile(self->tilegrid, x, y, 0); + } + } + + common_hal_displayio_tilegrid_set_top_left(self->tilegrid, 0, 1); +} + +size_t common_hal_terminalio_terminal_write(terminalio_terminal_obj_t *self, const byte *data, size_t len, int *errcode) { + const byte* i = data; + uint16_t start_y = self->cursor_y; + while (i < data + len) { + unichar c = utf8_get_char(i); + i = utf8_next_char(i); + // Always handle ASCII. + if (c < 128) { + if (c >= 0x20 && c <= 0x7e) { + uint8_t tile_index = fontio_builtinfont_get_glyph_index(self->font, c); + common_hal_displayio_tilegrid_set_tile(self->tilegrid, self->cursor_x, self->cursor_y, tile_index); + self->cursor_x++; + } else if (c == '\r') { + self->cursor_x = 0; + } else if (c == '\n') { + self->cursor_y++; + // Commands below are used by MicroPython in the REPL + } else if (c == '\b') { + if (self->cursor_x > 0) { + self->cursor_x--; + } + } else if (c == 0x1b) { + if (i[0] == '[') { + if (i[1] == 'K') { + // Clear the rest of the line. + for (uint16_t j = self->cursor_x; j < self->tilegrid->width_in_tiles; j++) { + common_hal_displayio_tilegrid_set_tile(self->tilegrid, j, self->cursor_y, 0); + } + i += 2; + } else { + // Handle commands of the form \x1b[####D + uint16_t n = 0; + uint8_t j = 1; + for (; j < 6; j++) { + if ('0' <= i[j] && i[j] <= '9') { + n = n * 10 + (i[j] - '0'); + } else { + c = i[j]; + break; + } + } + if (c == 'D') { + if (n > self->cursor_x) { + self->cursor_x = 0; + } else { + self->cursor_x -= n; + } + } + i += j + 1; + continue; + } + } + } + } else { + uint8_t tile_index = fontio_builtinfont_get_glyph_index(self->font, c); + if (tile_index != 0xff) { + common_hal_displayio_tilegrid_set_tile(self->tilegrid, self->cursor_x, self->cursor_y, tile_index); + self->cursor_x++; + + } + } + if (self->cursor_x >= self->tilegrid->width_in_tiles) { + self->cursor_y++; + self->cursor_x %= self->tilegrid->width_in_tiles; + } + if (self->cursor_y >= self->tilegrid->height_in_tiles) { + self->cursor_y %= self->tilegrid->height_in_tiles; + } + if (self->cursor_y != start_y) { + // clear the new row + for (uint16_t j = 0; j < self->tilegrid->width_in_tiles; j++) { + common_hal_displayio_tilegrid_set_tile(self->tilegrid, j, self->cursor_y, 0); + start_y = self->cursor_y; + } + common_hal_displayio_tilegrid_set_top_left(self->tilegrid, 0, (start_y + self->tilegrid->height_in_tiles + 1) % self->tilegrid->height_in_tiles); + } + } + return i - data; +} + +bool common_hal_terminalio_terminal_ready_to_tx(terminalio_terminal_obj_t *self) { + return true; +} diff --git a/shared-module/terminalio/Terminal.h b/shared-module/terminalio/Terminal.h new file mode 100644 index 0000000000000..c31392cc4ff4d --- /dev/null +++ b/shared-module/terminalio/Terminal.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_TERMINALIO_TERMINAL_H +#define SHARED_MODULE_TERMINALIO_TERMINAL_H + +#include +#include + +#include "py/obj.h" +#include "shared-module/fontio/BuiltinFont.h" +#include "shared-module/displayio/TileGrid.h" + +typedef struct { + mp_obj_base_t base; + const fontio_builtinfont_t* font; + uint16_t cursor_x; + uint16_t cursor_y; + displayio_tilegrid_t* tilegrid; + uint16_t first_row; +} terminalio_terminal_obj_t; + +#endif /* SHARED_MODULE_TERMINALIO_TERMINAL_H */ diff --git a/shared-module/terminalio/__init__.c b/shared-module/terminalio/__init__.c new file mode 100644 index 0000000000000..3f61f482344e1 --- /dev/null +++ b/shared-module/terminalio/__init__.c @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/terminalio/__init__.h" diff --git a/shared-module/terminalio/__init__.h b/shared-module/terminalio/__init__.h new file mode 100644 index 0000000000000..e925dd429a94f --- /dev/null +++ b/shared-module/terminalio/__init__.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_TERMINALIO___INIT___H +#define SHARED_MODULE_TERMINALIO___INIT___H + +#endif /* SHARED_MODULE_TERMINALIO___INIT___H */ diff --git a/shared-module/touchio/TouchIn.c b/shared-module/touchio/TouchIn.c new file mode 100644 index 0000000000000..88d12b8b811fe --- /dev/null +++ b/shared-module/touchio/TouchIn.c @@ -0,0 +1,115 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2018 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/runtime.h" +#include "py/mphal.h" +#include "shared-bindings/touchio/TouchIn.h" + +// This is a capacitive touch sensing routine using a single digital +// pin. The pin should be connected to the sensing pad, and to ground +// via a 1Mohm or thereabout drain resistor. When a reading is taken, +// the pin's capacitance is charged by setting it to a digital output +// 'high' for a few microseconds, and then it is changed to a high +// impedance input. We measure how long it takes to discharge through +// the resistor (around 50us), using a busy-waiting loop, and average +// over N_SAMPLES cycles to reduce the effects of noise. + +#define N_SAMPLES 10 +#define TIMEOUT_TICKS 10000 + +static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { + + uint16_t ticks = 0; + + for (uint16_t i = 0; i < N_SAMPLES; i++) { + // set pad to digital output high for 10us to charge it + + common_hal_digitalio_digitalinout_switch_to_output(self->digitalinout, true, DRIVE_MODE_PUSH_PULL); + mp_hal_delay_us(10); + + // set pad back to an input and take some samples + + common_hal_digitalio_digitalinout_switch_to_input(self->digitalinout, PULL_NONE); + + while(common_hal_digitalio_digitalinout_get_value(self->digitalinout)) { + if (ticks >= TIMEOUT_TICKS) return TIMEOUT_TICKS; + ticks++; + } + } + return ticks; +} + +void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, const mcu_pin_obj_t *pin) { + claim_pin(pin); + self->digitalinout = m_new_obj(digitalio_digitalinout_obj_t); + self->digitalinout->base.type = &digitalio_digitalinout_type; + + common_hal_digitalio_digitalinout_construct(self->digitalinout, pin); + + uint16_t raw_reading = get_raw_reading(self); + if (raw_reading == TIMEOUT_TICKS) { + mp_raise_ValueError(translate("No pulldown on pin; 1Mohm recommended")); + } + self->threshold = raw_reading * 1.05 + 100; +} + +bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) { + return self->digitalinout == MP_OBJ_NULL; +} + +void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { + if (common_hal_touchio_touchin_deinited(self)) { + return; + } + + common_hal_digitalio_digitalinout_deinit(self->digitalinout); + self->digitalinout = MP_OBJ_NULL; +} + +void touchin_reset() { +} + +bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) { + uint16_t reading = get_raw_reading(self); + return reading > self->threshold; +} + +uint16_t common_hal_touchio_touchin_get_raw_value(touchio_touchin_obj_t *self) { + return get_raw_reading(self); +} + +uint16_t common_hal_touchio_touchin_get_threshold(touchio_touchin_obj_t *self) { + return self->threshold; +} + +void common_hal_touchio_touchin_set_threshold(touchio_touchin_obj_t *self, + uint16_t new_threshold) { + self->threshold = new_threshold; +} diff --git a/shared-module/touchio/TouchIn.h b/shared-module/touchio/TouchIn.h new file mode 100644 index 0000000000000..8ff6fda8f4d57 --- /dev/null +++ b/shared-module/touchio/TouchIn.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2018 Nick Moore for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_TOUCHIO_TOUCHIN_H +#define MICROPY_INCLUDED_SHARED_MODULE_TOUCHIO_TOUCHIN_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + digitalio_digitalinout_obj_t *digitalinout; + uint16_t threshold; +} touchio_touchin_obj_t; + +void touchin_reset(void); + +#endif // MICROPY_INCLUDED_SHARED_MODULE_TOUCHIO_TOUCHIN_H diff --git a/shared-module/touchio/__init__.c b/shared-module/touchio/__init__.c new file mode 100644 index 0000000000000..d2290447c95e7 --- /dev/null +++ b/shared-module/touchio/__init__.c @@ -0,0 +1 @@ +// No touchio module functions. diff --git a/shared-module/usb_hid/Device.c b/shared-module/usb_hid/Device.c new file mode 100644 index 0000000000000..8744f2ed312dd --- /dev/null +++ b/shared-module/usb_hid/Device.c @@ -0,0 +1,97 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "tick.h" +#include "py/runtime.h" +#include "shared-bindings/usb_hid/Device.h" +#include "shared-module/usb_hid/Device.h" +#include "supervisor/shared/translate.h" +#include "supervisor/shared/tick.h" +#include "tusb.h" + +uint8_t common_hal_usb_hid_device_get_usage_page(usb_hid_device_obj_t *self) { + return self->usage_page; +} + +uint8_t common_hal_usb_hid_device_get_usage(usb_hid_device_obj_t *self) { + return self->usage; +} + +void common_hal_usb_hid_device_send_report(usb_hid_device_obj_t *self, uint8_t* report, uint8_t len) { + if (len != self->report_length) { + mp_raise_ValueError_varg(translate("Buffer incorrect size. Should be %d bytes."), self->report_length); + } + + // Wait until interface is ready, timeout = 2 seconds + uint64_t end_ticks = supervisor_ticks_ms64() + 2000; + while ( (supervisor_ticks_ms64() < end_ticks) && !tud_hid_ready() ) { + RUN_BACKGROUND_TASKS; + } + + if ( !tud_hid_ready() ) { + mp_raise_msg(&mp_type_OSError, translate("USB Busy")); + } + + memcpy(self->report_buffer, report, len); + + if ( !tud_hid_report(self->report_id, self->report_buffer, len) ) { + mp_raise_msg(&mp_type_OSError, translate("USB Error")); + } +} + +static usb_hid_device_obj_t* get_hid_device(uint8_t report_id) { + for (uint8_t i = 0; i < USB_HID_NUM_DEVICES; i++) { + if (usb_hid_devices[i].report_id == report_id) { + return &usb_hid_devices[i]; + } + } + return NULL; +} + +// Callbacks invoked when receive Get_Report request through control endpoint +uint16_t tud_hid_get_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen) { + // only support Input Report + if ( report_type != HID_REPORT_TYPE_INPUT ) return 0; + + // fill buffer with current report + memcpy(buffer, get_hid_device(report_id)->report_buffer, reqlen); + return reqlen; +} + +// Callbacks invoked when receive Set_Report request through control endpoint +void tud_hid_set_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize) { + usb_hid_device_obj_t* hid_device = get_hid_device(report_id); + + if ( report_type == HID_REPORT_TYPE_OUTPUT ) { + // Check if it is Keyboard device + if (hid_device->usage_page == HID_USAGE_PAGE_DESKTOP && + hid_device->usage == HID_USAGE_DESKTOP_KEYBOARD) { + // This is LED indicator (CapsLock, NumLock) + // TODO Light up some LED here + } + } +} diff --git a/shared-module/usb_hid/Device.h b/shared-module/usb_hid/Device.h new file mode 100644 index 0000000000000..10f2ee897dfc9 --- /dev/null +++ b/shared-module/usb_hid/Device.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_USB_HID_DEVICE_H +#define SHARED_MODULE_USB_HID_DEVICE_H + +#include +#include + +#include "py/obj.h" + +#ifdef __cplusplus + extern "C" { +#endif + +typedef struct { + mp_obj_base_t base; + uint8_t* report_buffer; + uint8_t report_id; + uint8_t report_length; + uint8_t usage_page; + uint8_t usage; +} usb_hid_device_obj_t; + + +extern usb_hid_device_obj_t usb_hid_devices[]; + +#ifdef __cplusplus + } +#endif + +#endif /* SHARED_MODULE_USB_HID_DEVICE_H */ diff --git a/shared-module/usb_hid/__init__.c b/shared-module/usb_hid/__init__.c new file mode 100644 index 0000000000000..d88f9787acf14 --- /dev/null +++ b/shared-module/usb_hid/__init__.c @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Nothing needed here. Tables of HID devices are generated in autogen_usb_descriptor.c at compile-time. diff --git a/shared-module/usb_midi/PortIn.c b/shared-module/usb_midi/PortIn.c new file mode 100644 index 0000000000000..31e320baab753 --- /dev/null +++ b/shared-module/usb_midi/PortIn.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/usb_midi/PortIn.h" +#include "supervisor/shared/translate.h" +#include "tusb.h" + +size_t common_hal_usb_midi_portin_read(usb_midi_portin_obj_t *self, uint8_t *data, size_t len, int *errcode) { + return tud_midi_read(data, len); +} + +uint32_t common_hal_usb_midi_portin_bytes_available(usb_midi_portin_obj_t *self) { + return tud_midi_available(); +} diff --git a/shared-module/usb_midi/PortIn.h b/shared-module/usb_midi/PortIn.h new file mode 100644 index 0000000000000..2f72aa4c211a6 --- /dev/null +++ b/shared-module/usb_midi/PortIn.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_USB_MIDI_PORTIN_H +#define SHARED_MODULE_USB_MIDI_PORTIN_H + +#include +#include + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} usb_midi_portin_obj_t; + +#endif /* SHARED_MODULE_USB_MIDI_PORTIN_H */ diff --git a/shared-module/usb_midi/PortOut.c b/shared-module/usb_midi/PortOut.c new file mode 100644 index 0000000000000..0b37dcfd41b72 --- /dev/null +++ b/shared-module/usb_midi/PortOut.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/usb_midi/PortOut.h" +#include "supervisor/shared/translate.h" +#include "tusb.h" + +size_t common_hal_usb_midi_portout_write(usb_midi_portout_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + return tud_midi_write(0, data, len); +} + +bool common_hal_usb_midi_portout_ready_to_tx(usb_midi_portout_obj_t *self) { + return tud_midi_mounted(); +} diff --git a/shared-module/usb_midi/PortOut.h b/shared-module/usb_midi/PortOut.h new file mode 100644 index 0000000000000..6b1b8846474bb --- /dev/null +++ b/shared-module/usb_midi/PortOut.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_USB_MIDI_PORTOUT_H +#define SHARED_MODULE_USB_MIDI_PORTOUT_H + +#include +#include + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} usb_midi_portout_obj_t; + +#endif /* SHARED_MODULE_USB_MIDI_PORTOUT_H */ diff --git a/shared-module/usb_midi/__init__.c b/shared-module/usb_midi/__init__.c new file mode 100644 index 0000000000000..73a314b9972a3 --- /dev/null +++ b/shared-module/usb_midi/__init__.c @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/usb_midi/__init__.h" + +#include "genhdr/autogen_usb_descriptor.h" +#include "py/obj.h" +#include "py/mphal.h" +#include "py/runtime.h" +#include "py/objtuple.h" +#include "shared-bindings/usb_midi/PortIn.h" +#include "shared-bindings/usb_midi/PortOut.h" +#include "supervisor/memory.h" +#include "tusb.h" + +supervisor_allocation* usb_midi_allocation; + +void usb_midi_init(void) { + // TODO(tannewt): Make this dynamic. + uint16_t tuple_size = align32_size(sizeof(mp_obj_tuple_t) + sizeof(mp_obj_t*) * 2); + uint16_t portin_size = align32_size(sizeof(usb_midi_portin_obj_t)); + uint16_t portout_size = align32_size(sizeof(usb_midi_portout_obj_t)); + + // For each embedded MIDI Jack in the descriptor we create a Port + usb_midi_allocation = allocate_memory(tuple_size + portin_size + portout_size, false); + + mp_obj_tuple_t *ports = (mp_obj_tuple_t *) usb_midi_allocation->ptr; + ports->base.type = &mp_type_tuple; + ports->len = 2; + + usb_midi_portin_obj_t* in = (usb_midi_portin_obj_t *) (usb_midi_allocation->ptr + tuple_size / 4); + in->base.type = &usb_midi_portin_type; + ports->items[0] = MP_OBJ_FROM_PTR(in); + + usb_midi_portout_obj_t* out = (usb_midi_portout_obj_t *) (usb_midi_allocation->ptr + tuple_size / 4 + portin_size / 4); + out->base.type = &usb_midi_portout_type; + ports->items[1] = MP_OBJ_FROM_PTR(out); + + mp_map_lookup(&usb_midi_module_globals.map, MP_ROM_QSTR(MP_QSTR_ports), MP_MAP_LOOKUP)->value = MP_OBJ_FROM_PTR(ports); +} diff --git a/shared-module/usb_midi/__init__.h b/shared-module/usb_midi/__init__.h new file mode 100644 index 0000000000000..e1ad1fbafbdfa --- /dev/null +++ b/shared-module/usb_midi/__init__.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef SHARED_MODULE_USB_MIDI___INIT___H +#define SHARED_MODULE_USB_MIDI___INIT___H + +void usb_midi_init(void); + +#endif /* SHARED_MODULE_USB_MIDI___INIT___H */ diff --git a/shared-module/wiznet/__init__.c b/shared-module/wiznet/__init__.c new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/shared-module/wiznet/wiznet5k.c b/shared-module/wiznet/wiznet5k.c new file mode 100644 index 0000000000000..a603a55937d2f --- /dev/null +++ b/shared-module/wiznet/wiznet5k.c @@ -0,0 +1,432 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/objlist.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "py/mperrno.h" +#include "py/mphal.h" +#include "lib/netutils/netutils.h" + +#if MICROPY_PY_WIZNET5K + +#include "shared-module/network/__init__.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/DriveMode.h" +#include "shared-bindings/busio/SPI.h" + +#include "shared-module/network/__init__.h" + +#include "ethernet/wizchip_conf.h" +#include "ethernet/socket.h" +#include "internet/dns/dns.h" +#include "internet/dhcp/dhcp.h" + +#include "shared-module/wiznet/wiznet5k.h" + +STATIC wiznet5k_obj_t wiznet5k_obj; + +STATIC void wiz_cris_enter(void) { + wiznet5k_obj.cris_state = MICROPY_BEGIN_ATOMIC_SECTION(); +} + +STATIC void wiz_cris_exit(void) { + MICROPY_END_ATOMIC_SECTION(wiznet5k_obj.cris_state); +} + +STATIC void wiz_cs_select(void) { + common_hal_digitalio_digitalinout_set_value(&wiznet5k_obj.cs, 0); +} + +STATIC void wiz_cs_deselect(void) { + common_hal_digitalio_digitalinout_set_value(&wiznet5k_obj.cs, 1); +} + +STATIC void wiz_spi_read(uint8_t *buf, uint32_t len) { + (void)common_hal_busio_spi_read(wiznet5k_obj.spi, buf, len, 0); +} + +STATIC void wiz_spi_write(const uint8_t *buf, uint32_t len) { + (void)common_hal_busio_spi_write(wiznet5k_obj.spi, buf, len); +} + +int wiznet5k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip) { + uint8_t dns_ip[MOD_NETWORK_IPADDR_BUF_SIZE] = {8, 8, 8, 8}; + uint8_t *buf = m_new(uint8_t, MAX_DNS_BUF_SIZE); + DNS_init(0, buf); + mp_int_t ret = DNS_run(dns_ip, (uint8_t*)name, out_ip); + m_del(uint8_t, buf, MAX_DNS_BUF_SIZE); + if (ret == 1) { + // success + return 0; + } else { + // failure + return -2; + } +} + +int get_available_socket(wiznet5k_obj_t *wiz) { + for (uint8_t sn = 0; sn < _WIZCHIP_SOCK_NUM_; sn++) { + if ((wiz->socket_used & (1 << sn)) == 0) { + wiz->socket_used |= (1 << sn); + return sn; + } + } + return -1; +} + +int wiznet5k_socket_socket(mod_network_socket_obj_t *socket, int *_errno) { + if (socket->u_param.domain != MOD_NETWORK_AF_INET) { + *_errno = MP_EAFNOSUPPORT; + return -1; + } + + switch (socket->u_param.type) { + case MOD_NETWORK_SOCK_STREAM: socket->u_param.type = Sn_MR_TCP; break; + case MOD_NETWORK_SOCK_DGRAM: socket->u_param.type = Sn_MR_UDP; break; + default: *_errno = MP_EINVAL; return -1; + } + + if (socket->u_param.fileno == -1) { + // get first unused socket number + socket->u_param.fileno = get_available_socket(&wiznet5k_obj); + if (socket->u_param.fileno == -1) { + // too many open sockets + *_errno = MP_EMFILE; + return -1; + } + } + + // WIZNET does not have a concept of pure "open socket". You need to know + // if it's a server or client at the time of creation of the socket. + // So, we defer the open until we know what kind of socket we want. + + // use "domain" to indicate that this socket has not yet been opened + socket->u_param.domain = 0; + + return 0; +} + +void wiznet5k_socket_close(mod_network_socket_obj_t *socket) { + uint8_t sn = (uint8_t)socket->u_param.fileno; + if (sn < _WIZCHIP_SOCK_NUM_) { + wiznet5k_obj.socket_used &= ~(1 << sn); + WIZCHIP_EXPORT(close)(sn); + } +} + +int wiznet5k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { + // open the socket in server mode (if port != 0) + mp_int_t ret = WIZCHIP_EXPORT(socket)(socket->u_param.fileno, socket->u_param.type, port, 0); + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + + // indicate that this socket has been opened + socket->u_param.domain = 1; + + // success + return 0; +} + +int wiznet5k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno) { + mp_int_t ret = WIZCHIP_EXPORT(listen)(socket->u_param.fileno); + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + return 0; +} + +int wiznet5k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno) { + for (;;) { + int sr = getSn_SR((uint8_t)socket->u_param.fileno); + if (sr == SOCK_ESTABLISHED) { + socket2->u_param = socket->u_param; + getSn_DIPR((uint8_t)socket2->u_param.fileno, ip); + *port = getSn_PORT(socket2->u_param.fileno); + + // WIZnet turns the listening socket into the client socket, so we + // need to re-bind and re-listen on another socket for the server. + // TODO handle errors, especially no-more-sockets error + socket->u_param.domain = MOD_NETWORK_AF_INET; + socket->u_param.fileno = -1; + int _errno2; + if (wiznet5k_socket_socket(socket, &_errno2) != 0) { + //printf("(bad resocket %d)\n", _errno2); + } else if (wiznet5k_socket_bind(socket, NULL, *port, &_errno2) != 0) { + //printf("(bad rebind %d)\n", _errno2); + } else if (wiznet5k_socket_listen(socket, 0, &_errno2) != 0) { + //printf("(bad relisten %d)\n", _errno2); + } + + return 0; + } + if (sr == SOCK_CLOSED || sr == SOCK_CLOSE_WAIT) { + wiznet5k_socket_close(socket); + *_errno = MP_ENOTCONN; // ?? + return -1; + } + mp_hal_delay_ms(1); + } +} + +int wiznet5k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno) { + uint16_t src_port = network_module_create_random_source_tcp_port(); + // make sure same outgoing port number can't be in use by two different sockets. + src_port = (src_port & ~(_WIZCHIP_SOCK_NUM_ - 1)) | socket->u_param.fileno; + + // use "bind" function to open the socket in client mode + if (wiznet5k_socket_bind(socket, NULL, src_port, _errno) != 0) { + return -1; + } + + // now connect + MP_THREAD_GIL_EXIT(); + mp_int_t ret = WIZCHIP_EXPORT(connect)(socket->u_param.fileno, ip, port); + MP_THREAD_GIL_ENTER(); + + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + + // success + return 0; +} + +mp_uint_t wiznet5k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno) { + MP_THREAD_GIL_EXIT(); + mp_int_t ret = WIZCHIP_EXPORT(send)(socket->u_param.fileno, (byte*)buf, len); + MP_THREAD_GIL_ENTER(); + + // TODO convert Wiz errno's to POSIX ones + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + return ret; +} + +mp_uint_t wiznet5k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno) { + MP_THREAD_GIL_EXIT(); + mp_int_t ret = WIZCHIP_EXPORT(recv)(socket->u_param.fileno, buf, len); + MP_THREAD_GIL_ENTER(); + + // TODO convert Wiz errno's to POSIX ones + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + return ret; +} + +mp_uint_t wiznet5k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno) { + if (socket->u_param.domain == 0) { + // socket not opened; use "bind" function to open the socket in client mode + if (wiznet5k_socket_bind(socket, ip, 0, _errno) != 0) { + return -1; + } + } + + MP_THREAD_GIL_EXIT(); + mp_int_t ret = WIZCHIP_EXPORT(sendto)(socket->u_param.fileno, (byte*)buf, len, ip, port); + MP_THREAD_GIL_ENTER(); + + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + return ret; +} + +mp_uint_t wiznet5k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno) { + uint16_t port2; + MP_THREAD_GIL_EXIT(); + mp_int_t ret = WIZCHIP_EXPORT(recvfrom)(socket->u_param.fileno, buf, len, ip, &port2); + MP_THREAD_GIL_ENTER(); + *port = port2; + if (ret < 0) { + wiznet5k_socket_close(socket); + *_errno = -ret; + return -1; + } + return ret; +} + +int wiznet5k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno) { + // TODO + *_errno = MP_EINVAL; + return -1; +} + +int wiznet5k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno) { + // TODO + *_errno = MP_EINVAL; + return -1; + + /* + if (timeout_ms == 0) { + // set non-blocking mode + uint8_t arg = SOCK_IO_NONBLOCK; + WIZCHIP_EXPORT(ctlsocket)(socket->u_param.fileno, CS_SET_IOMODE, &arg); + } + */ +} + +int wiznet5k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno) { + if (request == MP_STREAM_POLL) { + int ret = 0; + if (arg & MP_STREAM_POLL_RD && getSn_RX_RSR(socket->u_param.fileno) != 0) { + ret |= MP_STREAM_POLL_RD; + } + if (arg & MP_STREAM_POLL_WR && getSn_TX_FSR(socket->u_param.fileno) != 0) { + ret |= MP_STREAM_POLL_WR; + } + return ret; + } else { + *_errno = MP_EINVAL; + return MP_STREAM_ERROR; + } +} + +void wiznet5k_socket_timer_tick(mod_network_socket_obj_t *socket) { + if (wiznet5k_obj.dhcp_socket >= 0) { + DHCP_time_handler(); + DHCP_run(); + } +} + +int wiznet5k_start_dhcp(void) { + // XXX this should throw an error if DHCP fails + static DHCP_INIT_BUFFER_TYPE dhcp_buf[DHCP_INIT_BUFFER_SIZE]; + + if (wiznet5k_obj.dhcp_socket < 0) { + // Set up the socket to listen on UDP 68 before calling DHCP_init + wiznet5k_obj.dhcp_socket = get_available_socket(&wiznet5k_obj); + if (wiznet5k_obj.dhcp_socket < 0) return MP_EMFILE; + + WIZCHIP_EXPORT(socket)(wiznet5k_obj.dhcp_socket, MOD_NETWORK_SOCK_DGRAM, DHCP_CLIENT_PORT, 0); + DHCP_init(wiznet5k_obj.dhcp_socket, dhcp_buf); + } + return 0; +} + +int wiznet5k_stop_dhcp(void) { + if (wiznet5k_obj.dhcp_socket >= 0) { + DHCP_stop(); + WIZCHIP_EXPORT(close)(wiznet5k_obj.dhcp_socket); + wiznet5k_obj.socket_used &= ~(1 << wiznet5k_obj.dhcp_socket); + wiznet5k_obj.dhcp_socket = -1; + } + return 0; +} + +bool wiznet5k_check_dhcp(void) { + return wiznet5k_obj.dhcp_socket >= 0; +} + +void wiznet5k_reset(void) { + if (wiznet5k_obj.rst.pin) { + // hardware reset if using RST pin + common_hal_digitalio_digitalinout_set_value(&wiznet5k_obj.rst, 0); + mp_hal_delay_us(10); // datasheet says 2us + common_hal_digitalio_digitalinout_set_value(&wiznet5k_obj.rst, 1); + mp_hal_delay_ms(150); // datasheet says 150ms + } else { + // otherwise, software reset + wizchip_sw_reset(); + } +} + +void wiznet5k_socket_deinit(mod_network_socket_obj_t *socket) { + wiznet5k_reset(); +} + +/// Create and return a WIZNET5K object. +mp_obj_t wiznet5k_create(busio_spi_obj_t *spi_in, const mcu_pin_obj_t *cs_in, const mcu_pin_obj_t *rst_in) { + + // init the wiznet5k object + wiznet5k_obj.base.type = (mp_obj_type_t*)&mod_network_nic_type_wiznet5k; + wiznet5k_obj.cris_state = 0; + wiznet5k_obj.spi = spi_in; + wiznet5k_obj.socket_used = 0; + wiznet5k_obj.dhcp_socket = -1; + + /*!< SPI configuration */ + // XXX probably should check if the provided SPI is already configured, and + // if so skip configuration? + + common_hal_busio_spi_configure(wiznet5k_obj.spi, + 10000000, // BAUDRATE 10MHz + 1, // HIGH POLARITY + 1, // SECOND PHASE TRANSITION + 8 // 8 BITS + ); + + common_hal_digitalio_digitalinout_construct(&wiznet5k_obj.cs, cs_in); + common_hal_digitalio_digitalinout_switch_to_output(&wiznet5k_obj.cs, 1, DRIVE_MODE_PUSH_PULL); + + if (rst_in) common_hal_digitalio_digitalinout_construct(&wiznet5k_obj.rst, rst_in); + wiznet5k_reset(); + + reg_wizchip_cris_cbfunc(wiz_cris_enter, wiz_cris_exit); + reg_wizchip_cs_cbfunc(wiz_cs_select, wiz_cs_deselect); + reg_wizchip_spi_cbfunc(wiz_spi_read, wiz_spi_write); + + // 2k buffer for each socket + uint8_t sn_size[16] = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}; + ctlwizchip(CW_INIT_WIZCHIP, sn_size); + + wiz_NetInfo netinfo = { + .dhcp = NETINFO_DHCP, + }; + network_module_create_random_mac_address(netinfo.mac); + ctlnetwork(CN_SET_NETINFO, (void*)&netinfo); + + // seems we need a small delay after init + mp_hal_delay_ms(250); + + // register with network module + network_module_register_nic(&wiznet5k_obj); + + // return wiznet5k object + return &wiznet5k_obj; +} + +#endif // MICROPY_PY_WIZNET5K diff --git a/shared-module/wiznet/wiznet5k.h b/shared-module/wiznet/wiznet5k.h new file mode 100644 index 0000000000000..19823ae550999 --- /dev/null +++ b/shared-module/wiznet/wiznet5k.h @@ -0,0 +1,70 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_MODULE_WIZNET_WIZNET5K_H +#define MICROPY_INCLUDED_SHARED_MODULE_WIZNET_WIZNET5K_H + +#include "ethernet/wizchip_conf.h" +#include "ethernet/socket.h" +#include "internet/dns/dns.h" +#include "internet/dhcp/dhcp.h" + +typedef struct _wiznet5k_obj_t { + mp_obj_base_t base; + mp_uint_t cris_state; + busio_spi_obj_t *spi; + digitalio_digitalinout_obj_t cs; + digitalio_digitalinout_obj_t rst; + uint8_t socket_used; + int8_t dhcp_socket; // -1 for DHCP not in use +} wiznet5k_obj_t; + +int wiznet5k_gethostbyname(mp_obj_t nic, const char *name, mp_uint_t len, uint8_t *out_ip); +int wiznet5k_socket_socket(mod_network_socket_obj_t *socket, int *_errno); +void wiznet5k_socket_close(mod_network_socket_obj_t *socket); +int wiznet5k_socket_bind(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); +int wiznet5k_socket_listen(mod_network_socket_obj_t *socket, mp_int_t backlog, int *_errno); +int wiznet5k_socket_accept(mod_network_socket_obj_t *socket, mod_network_socket_obj_t *socket2, byte *ip, mp_uint_t *port, int *_errno); +int wiznet5k_socket_connect(mod_network_socket_obj_t *socket, byte *ip, mp_uint_t port, int *_errno); +mp_uint_t wiznet5k_socket_send(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, int *_errno); +mp_uint_t wiznet5k_socket_recv(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, int *_errno); +mp_uint_t wiznet5k_socket_sendto(mod_network_socket_obj_t *socket, const byte *buf, mp_uint_t len, byte *ip, mp_uint_t port, int *_errno); +mp_uint_t wiznet5k_socket_recvfrom(mod_network_socket_obj_t *socket, byte *buf, mp_uint_t len, byte *ip, mp_uint_t *port, int *_errno); +int wiznet5k_socket_setsockopt(mod_network_socket_obj_t *socket, mp_uint_t level, mp_uint_t opt, const void *optval, mp_uint_t optlen, int *_errno); +int wiznet5k_socket_settimeout(mod_network_socket_obj_t *socket, mp_uint_t timeout_ms, int *_errno); +int wiznet5k_socket_ioctl(mod_network_socket_obj_t *socket, mp_uint_t request, mp_uint_t arg, int *_errno); +void wiznet5k_socket_timer_tick(mod_network_socket_obj_t *socket); +void wiznet5k_socket_deinit(mod_network_socket_obj_t *socket); +mp_obj_t wiznet5k_socket_disconnect(mp_obj_t self_in); +mp_obj_t wiznet5k_create(busio_spi_obj_t *spi_in, const mcu_pin_obj_t *cs_in, const mcu_pin_obj_t *rst_in); + +int wiznet5k_start_dhcp(void); +int wiznet5k_stop_dhcp(void); +bool wiznet5k_check_dhcp(void); + +extern const mod_network_nic_type_t mod_network_nic_type_wiznet5k; + +#endif // MICROPY_INCLUDED_SHARED_MODULE_WIZNET_WIZNET5K_H diff --git a/supervisor/cpu.h b/supervisor/cpu.h new file mode 100755 index 0000000000000..c4f81316c7456 --- /dev/null +++ b/supervisor/cpu.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_CPU_H +#define MICROPY_INCLUDED_SUPERVISOR_CPU_H + +// Adds up to 10 pointers from the CPUs registers to regs. This is used to make sure no actively +// used heap memory is freed. Its usually implemented in assembly. +mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs); + +#endif // MICROPY_INCLUDED_SUPERVISOR_CPU_H diff --git a/supervisor/filesystem.h b/supervisor/filesystem.h index cfd1ed0273c5b..c7c951a5e6e65 100644 --- a/supervisor/filesystem.h +++ b/supervisor/filesystem.h @@ -29,9 +29,20 @@ #include -void filesystem_init(bool create_allowed); +#include "extmod/vfs_fat.h" + +extern volatile bool filesystem_flush_requested; + +void filesystem_background(void); +void filesystem_tick(void); +void filesystem_init(bool create_allowed, bool force_create); void filesystem_flush(void); -void filesystem_writable_by_python(bool writable); bool filesystem_present(void); +void filesystem_set_internal_writable_by_usb(bool usb_writable); +void filesystem_set_internal_concurrent_write_protection(bool concurrent_write_protection); +void filesystem_set_writable_by_usb(fs_user_mount_t *vfs, bool usb_writable); +void filesystem_set_concurrent_write_protection(fs_user_mount_t *vfs, bool concurrent_write_protection); +bool filesystem_is_writable_by_python(fs_user_mount_t *vfs); +bool filesystem_is_writable_by_usb(fs_user_mount_t *vfs); #endif // MICROPY_INCLUDED_SUPERVISOR_FILESYSTEM_H diff --git a/supervisor/flash.h b/supervisor/flash.h new file mode 100644 index 0000000000000..0a124353e6c24 --- /dev/null +++ b/supervisor/flash.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_FLASH_H +#define MICROPY_INCLUDED_SUPERVISOR_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#ifdef EXTERNAL_FLASH_DEVICE_COUNT +#include "supervisor/shared/external_flash/external_flash.h" +#else +#include "supervisor/internal_flash.h" +#endif + +void supervisor_flash_init(void); +uint32_t supervisor_flash_get_block_size(void); +uint32_t supervisor_flash_get_block_count(void); + +// these return 0 on success, non-zero on error +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); + +struct _fs_user_mount_t; +void supervisor_flash_init_vfs(struct _fs_user_mount_t *vfs); +void supervisor_flash_flush(void); +void supervisor_flash_release_cache(void); + +#endif // MICROPY_INCLUDED_SUPERVISOR_FLASH_H diff --git a/supervisor/flash_root_pointers.h b/supervisor/flash_root_pointers.h new file mode 100644 index 0000000000000..634ae58d3fbba --- /dev/null +++ b/supervisor/flash_root_pointers.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_SUPERVISOR_FLASH_ROOT_POINTERS_H + +#ifdef EXTERNAL_FLASH_DEVICE_COUNT +#include "supervisor/shared/external_flash/external_flash_root_pointers.h" +#else +#include "supervisor/internal_flash_root_pointers.h" +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_FLASH_ROOT_POINTERS_H diff --git a/supervisor/linker.h b/supervisor/linker.h new file mode 100755 index 0000000000000..d68be24373fac --- /dev/null +++ b/supervisor/linker.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// These macros are used to place code and data into different linking sections. + +#ifndef MICROPY_INCLUDED_SUPERVISOR_LINKER_H +#define MICROPY_INCLUDED_SUPERVISOR_LINKER_H + +#if defined(IMXRT10XX) || defined(FOMU) +#define PLACE_IN_DTCM_DATA(name) name __attribute__((section(".dtcm_data." #name ))) +#define PLACE_IN_DTCM_BSS(name) name __attribute__((section(".dtcm_bss." #name ))) +#define PLACE_IN_ITCM(name) __attribute__((section(".itcm." #name ))) name +#else +#define PLACE_IN_DTCM_DATA(name) name +#define PLACE_IN_DTCM_BSS(name) name +#define PLACE_IN_ITCM(name) name +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_LINKER_H diff --git a/supervisor/memory.h b/supervisor/memory.h new file mode 100755 index 0000000000000..f557744ae5ebe --- /dev/null +++ b/supervisor/memory.h @@ -0,0 +1,63 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Basic allocations outside them for areas such as the VM heap and stack. +// supervisor/shared/memory.c has a basic implementation for a continuous chunk of memory. Add it +// to a SRC_ in a Makefile to use it. + +#ifndef MICROPY_INCLUDED_SUPERVISOR_MEMORY_H +#define MICROPY_INCLUDED_SUPERVISOR_MEMORY_H + +#include +#include + +typedef struct { + uint32_t* ptr; + uint32_t length; // in bytes +} supervisor_allocation; + + + +void memory_init(void); +void free_memory(supervisor_allocation* allocation); +supervisor_allocation* allocate_remaining_memory(void); + +// Allocate a piece of a given length in bytes. If high_address is true then it should be allocated +// at a lower address from the top of the stack. Otherwise, addresses will increase starting after +// statically allocated memory. +supervisor_allocation* allocate_memory(uint32_t length, bool high_address); + +static inline uint16_t align32_size(uint16_t size) { + if (size % 4 != 0) { + return (size & 0xfffc) + 0x4; + } + return size; +} + +// Called after the heap is freed in case the supervisor wants to save some values. +void supervisor_move_memory(void); + +#endif // MICROPY_INCLUDED_SUPERVISOR_MEMORY_H diff --git a/supervisor/messages/en-US.h b/supervisor/messages/en-US.h deleted file mode 100644 index d31e3b67ae1ac..0000000000000 --- a/supervisor/messages/en-US.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_SUPERVISOR_MESSAGES_EN_US_H -#define MICROPY_SUPERVISOR_MESSAGES_EN_US_H - -// Place override messages here. - -// Leave this at the bottom. -#include "supervisor/messages/default.h" - -#endif // MICROPY_SUPERVISOR_MESSAGES_EN_US_H diff --git a/supervisor/port.h b/supervisor/port.h index f30d87b47b47c..b289583dd67ff 100644 --- a/supervisor/port.h +++ b/supervisor/port.h @@ -29,16 +29,7 @@ #include "py/mpconfig.h" -#ifndef PORT_HEAP_SIZE -#error "Please define PORT_HEAP_SIZE to specify heap size in bytes." -#endif - -typedef enum { - NO_SAFE_MODE = 0, - BROWNOUT, - HARD_CRASH, - USER_SAFE_MODE, -} safe_mode_t; +#include "supervisor/shared/safe_mode.h" // Provided by the linker; extern uint32_t _ezero; @@ -51,14 +42,32 @@ extern uint32_t _ebss; safe_mode_t port_init(void); -// Reset the microcontroller. +// Reset the microcontroller completely. +void reset_cpu(void); + +// Reset the microcontroller state. void reset_port(void); // Reset the rest of the board. void reset_board(void); -#ifdef NRF52_SERIES -void HardFault_Handler(void); -#endif +// Reset to the bootloader +void reset_to_bootloader(void); + +// Get stack limit address +uint32_t *port_stack_get_limit(void); + +// Get stack top address +uint32_t *port_stack_get_top(void); + +// Get heap bottom address +uint32_t *port_heap_get_bottom(void); + +// Get heap top address +uint32_t *port_heap_get_top(void); + +// Save and retrieve a word from memory that is preserved over reset. Used for safe mode. +void port_set_saved_word(uint32_t); +uint32_t port_get_saved_word(void); #endif // MICROPY_INCLUDED_SUPERVISOR_PORT_H diff --git a/supervisor/serial.h b/supervisor/serial.h index 9446ee71cf25c..84b3062a3b7f0 100644 --- a/supervisor/serial.h +++ b/supervisor/serial.h @@ -30,8 +30,18 @@ #include #include +#include "py/mpconfig.h" + +#ifdef CIRCUITPY_BOOT_OUTPUT_FILE +#include "lib/oofatfs/ff.h" + +FIL* boot_output_file; +#endif + void serial_init(void); void serial_write(const char* text); +// Only writes up to given length. Does not check for null termination at all. +void serial_write_substring(const char* text, uint32_t length); char serial_read(void); bool serial_bytes_available(void); bool serial_connected(void); diff --git a/supervisor/shared/autoreload.c b/supervisor/shared/autoreload.c index 39c33c05ea0ba..a6212c1a9bf0b 100644 --- a/supervisor/shared/autoreload.c +++ b/supervisor/shared/autoreload.c @@ -26,29 +26,30 @@ #include "autoreload.h" -#include "lib/utils/interrupt_char.h" #include "py/mphal.h" +#include "py/reload.h" -volatile uint32_t autoreload_delay_ms = 0; -bool autoreload_enabled = false; +static volatile uint32_t autoreload_delay_ms = 0; +static bool autoreload_enabled = false; static bool autoreload_suspended = false; -volatile bool reload_next_character = false; + +volatile bool reload_requested = false; inline void autoreload_tick() { if (autoreload_delay_ms == 0) { return; } if (autoreload_delay_ms == 1 && autoreload_enabled && - !autoreload_suspended && !reload_next_character) { - mp_keyboard_interrupt(); - reload_next_character = true; + !autoreload_suspended && !reload_requested) { + mp_raise_reload_exception(); + reload_requested = true; } autoreload_delay_ms--; } void autoreload_enable() { autoreload_enabled = true; - reload_next_character = false; + reload_requested = false; } void autoreload_disable() { @@ -73,5 +74,13 @@ void autoreload_start() { void autoreload_stop() { autoreload_delay_ms = 0; - reload_next_character = false; + reload_requested = false; +} + +void autoreload_now() { + if (!autoreload_enabled || autoreload_suspended || reload_requested) { + return; + } + mp_raise_reload_exception(); + reload_requested = true; } diff --git a/supervisor/shared/autoreload.h b/supervisor/shared/autoreload.h index 62f9fe0738639..fbd482c19acfa 100644 --- a/supervisor/shared/autoreload.h +++ b/supervisor/shared/autoreload.h @@ -29,7 +29,7 @@ #include -extern volatile bool reload_next_character; +extern volatile bool reload_requested; void autoreload_tick(void); @@ -43,4 +43,6 @@ bool autoreload_is_enabled(void); void autoreload_suspend(void); void autoreload_resume(void); +void autoreload_now(void); + #endif // MICROPY_INCLUDED_SUPERVISOR_AUTORELOAD_H diff --git a/supervisor/shared/bluetooth.c b/supervisor/shared/bluetooth.c new file mode 100644 index 0000000000000..b463160cf5e7f --- /dev/null +++ b/supervisor/shared/bluetooth.c @@ -0,0 +1,357 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/_bleio/Characteristic.h" +#include "shared-bindings/_bleio/Service.h" +#include "shared-bindings/_bleio/UUID.h" + +#include "common-hal/_bleio/__init__.h" + +#include "supervisor/shared/autoreload.h" + +#include "py/mpstate.h" + +bleio_service_obj_t supervisor_ble_service; +bleio_uuid_obj_t supervisor_ble_service_uuid; +bleio_characteristic_obj_t supervisor_ble_version_characteristic; +bleio_uuid_obj_t supervisor_ble_version_uuid; +bleio_characteristic_obj_t supervisor_ble_filename_characteristic; +bleio_uuid_obj_t supervisor_ble_filename_uuid; +bleio_characteristic_obj_t supervisor_ble_length_characteristic; +bleio_uuid_obj_t supervisor_ble_length_uuid; +bleio_characteristic_obj_t supervisor_ble_contents_characteristic; +bleio_uuid_obj_t supervisor_ble_contents_uuid; + +// This is the base UUID for CircuitPython services and characteristics. +const uint8_t circuitpython_base_uuid[16] = {0x6e, 0x68, 0x74, 0x79, 0x50, 0x74, 0x69, 0x75, 0x63, 0x72, 0x69, 0x43, 0x00, 0x00, 0xaf, 0xad }; +// This standard advertisement advertises the CircuitPython editing service and a CIRCUITPY short name. +uint8_t circuitpython_advertising_data[] = { 0x02, 0x01, 0x06, 0x02, 0x0a, 0x00, 0x11, 0x07, 0x6e, 0x68, 0x74, 0x79, 0x50, 0x74, 0x69, 0x75, 0x63, 0x72, 0x69, 0x43, 0x00, 0x01, 0xaf, 0xad, 0x06, 0x08, 0x43, 0x49, 0x52, 0x43, 0x55 }; +// This scan response advertises the full CIRCUITPYXXXX device name. +uint8_t circuitpython_scan_response_data[15] = {0x0e, 0x09, 0x43, 0x49, 0x52, 0x43, 0x55, 0x49, 0x54, 0x50, 0x59, 0x00, 0x00, 0x00, 0x00}; +mp_obj_list_t service_list; +mp_obj_t service_list_items[1]; +mp_obj_list_t characteristic_list; +mp_obj_t characteristic_list_items[4]; + +void supervisor_bluetooth_start_advertising(void) { + #if !CIRCUITPY_BLE_FILE_SERVICE + return; + #endif + bool is_connected = common_hal_bleio_adapter_get_connected(&common_hal_bleio_adapter_obj); + if (is_connected) { + return; + } + // TODO: switch to Adafruit short UUID for the advertisement and add manufacturing data to distinguish ourselves from arduino. + _common_hal_bleio_adapter_start_advertising(&common_hal_bleio_adapter_obj, + true, + 1.0, + circuitpython_advertising_data, + sizeof(circuitpython_advertising_data), + circuitpython_scan_response_data, + sizeof(circuitpython_scan_response_data)); +} + +void supervisor_start_bluetooth(void) { + #if !CIRCUITPY_BLE_FILE_SERVICE + return; + #endif + + common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, true); + + supervisor_ble_service_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_service_uuid, 0x0100, circuitpython_base_uuid); + + // We know we'll only be 1 characteristic so we can statically allocate it. + characteristic_list.base.type = &mp_type_list; + characteristic_list.alloc = sizeof(characteristic_list_items) / sizeof(characteristic_list_items[0]); + characteristic_list.len = 0; + characteristic_list.items = characteristic_list_items; + mp_seq_clear(characteristic_list.items, 0, characteristic_list.alloc, sizeof(*characteristic_list.items)); + + _common_hal_bleio_service_construct(&supervisor_ble_service, &supervisor_ble_service_uuid, false /* is secondary */, &characteristic_list); + + // File length + supervisor_ble_version_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_version_uuid, 0x0203, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_version_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_version_uuid, + CHAR_PROP_READ, + SECURITY_MODE_OPEN, + SECURITY_MODE_NO_ACCESS, + 4, // max length + true, // fixed length + NULL); // no initial value + + uint32_t version = 1; + mp_buffer_info_t bufinfo; + bufinfo.buf = &version; + bufinfo.len = sizeof(version); + common_hal_bleio_characteristic_set_value(&supervisor_ble_version_characteristic, &bufinfo); + + // Active filename. + supervisor_ble_filename_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_filename_uuid, 0x0200, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_filename_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_filename_uuid, + CHAR_PROP_READ | CHAR_PROP_WRITE, + SECURITY_MODE_OPEN, + SECURITY_MODE_OPEN, + 500, // max length + false, // fixed length + NULL); // no initial value + + char code_py[] = "/code.py"; + bufinfo.buf = code_py; + bufinfo.len = sizeof(code_py); + common_hal_bleio_characteristic_set_value(&supervisor_ble_filename_characteristic, &bufinfo); + + // File length + supervisor_ble_length_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_length_uuid, 0x0202, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_length_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_length_uuid, + CHAR_PROP_NOTIFY | CHAR_PROP_READ, + SECURITY_MODE_OPEN, + SECURITY_MODE_NO_ACCESS, + 4, // max length + true, // fixed length + NULL); // no initial value + + // File actions + supervisor_ble_contents_uuid.base.type = &bleio_uuid_type; + common_hal_bleio_uuid_construct(&supervisor_ble_contents_uuid, 0x0201, circuitpython_base_uuid); + common_hal_bleio_characteristic_construct(&supervisor_ble_contents_characteristic, + &supervisor_ble_service, + 0, // handle (for remote only) + &supervisor_ble_contents_uuid, + CHAR_PROP_NOTIFY | CHAR_PROP_WRITE_NO_RESPONSE | CHAR_PROP_WRITE, + SECURITY_MODE_OPEN, + SECURITY_MODE_OPEN, + 500, // max length + false, // fixed length + NULL); // no initial value + + supervisor_bluetooth_start_advertising(); + vm_used_ble = false; +} + +FIL active_file; +volatile bool new_filename; +volatile bool run_ble_background; +bool was_connected; + +void update_file_length(void) { + int32_t file_length = -1; + mp_buffer_info_t bufinfo; + bufinfo.buf = &file_length; + bufinfo.len = sizeof(file_length); + if (active_file.obj.fs != 0) { + file_length = (int32_t) f_size(&active_file); + } + common_hal_bleio_characteristic_set_value(&supervisor_ble_length_characteristic, &bufinfo); +} + +void open_current_file(void) { + if (active_file.obj.fs != 0) { + return; + } + uint16_t max_len = supervisor_ble_filename_characteristic.max_length; + uint8_t path[max_len]; + size_t length = common_hal_bleio_characteristic_get_value(&supervisor_ble_filename_characteristic, path, max_len - 1); + path[length] = '\0'; + + FATFS *fs = &((fs_user_mount_t *) MP_STATE_VM(vfs_mount_table)->obj)->fatfs; + f_open(fs, &active_file, (char*) path, FA_READ | FA_WRITE); + + update_file_length(); +} + +void close_current_file(void) { + f_close(&active_file); +} + +uint32_t current_command[1024 / sizeof(uint32_t)]; +volatile size_t current_offset; + +void supervisor_bluetooth_background(void) { + #if !CIRCUITPY_BLE_FILE_SERVICE + return; + #endif + if (!run_ble_background) { + return; + } + bool is_connected = common_hal_bleio_adapter_get_connected(&common_hal_bleio_adapter_obj); + if (!was_connected && is_connected) { + open_current_file(); + } else if (was_connected && !is_connected) { + close_current_file(); + new_filename = false; + } + was_connected = is_connected; + run_ble_background = false; + if (!is_connected) { + supervisor_bluetooth_start_advertising(); + return; + } + if (new_filename) { + close_current_file(); + open_current_file(); + + new_filename = false; + // get length and set the characteristic for it + } + uint16_t current_length = ((uint16_t*) current_command)[0]; + if (current_length > 0 && current_length == current_offset) { + uint16_t command = ((uint16_t *) current_command)[1]; + + if (command == 1) { + uint16_t max_len = 20; //supervisor_ble_contents_characteristic.max_length; + uint8_t buf[max_len]; + mp_buffer_info_t bufinfo; + bufinfo.buf = buf; + f_lseek(&active_file, 0); + while (f_read(&active_file, buf, max_len, &bufinfo.len) == FR_OK) { + if (bufinfo.len == 0) { + break; + } + common_hal_bleio_characteristic_set_value(&supervisor_ble_contents_characteristic, &bufinfo); + } + } else if (command == 2) { // patch + uint32_t offset = current_command[1]; + uint32_t remove_length = current_command[2]; + uint32_t insert_length = current_command[3]; + uint32_t file_length = (int32_t) f_size(&active_file); + //uint32_t data_shift_length = fileLength - offset - remove_length; + int32_t data_shift = insert_length - remove_length; + uint32_t new_length = file_length + data_shift; + + // TODO: Make these loops smarter to read and write on sector boundaries. + if (data_shift < 0) { + for (uint32_t shift_offset = offset + insert_length; shift_offset < new_length; shift_offset++) { + uint8_t data; + UINT actual; + f_lseek(&active_file, shift_offset - data_shift); + f_read(&active_file, &data, 1, &actual); + f_lseek(&active_file, shift_offset); + f_write(&active_file, &data, 1, &actual); + } + f_truncate(&active_file); + } else if (data_shift > 0) { + f_lseek(&active_file, file_length); + // Fill end with 0xff so we don't need to erase. + uint8_t data = 0xff; + for (size_t i = 0; i < (size_t) data_shift; i++) { + UINT actual; + f_write(&active_file, &data, 1, &actual); + } + for (uint32_t shift_offset = new_length - 1; shift_offset >= offset + insert_length ; shift_offset--) { + UINT actual; + f_lseek(&active_file, shift_offset - data_shift); + f_read(&active_file, &data, 1, &actual); + f_lseek(&active_file, shift_offset); + f_write(&active_file, &data, 1, &actual); + } + } + + f_lseek(&active_file, offset); + uint8_t* data = (uint8_t *) (current_command + 4); + UINT written; + f_write(&active_file, data, insert_length, &written); + f_sync(&active_file); + // Notify the new file length. + update_file_length(); + + // Trigger an autoreload + autoreload_now(); + } + current_offset = 0; + } +} + +// This happens in an interrupt so we need to be quick. +bool supervisor_bluetooth_hook(ble_evt_t *ble_evt) { + #if !CIRCUITPY_BLE_FILE_SERVICE + return false; + #endif + // Catch writes to filename or contents. Length is read-only. + + bool done = false; + switch (ble_evt->header.evt_id) { + case BLE_GAP_EVT_CONNECTED: + // We run our background task even if it wasn't us connected to because we may want to + // advertise if the user code stopped advertising. + run_ble_background = true; + break; + case BLE_GAP_EVT_DISCONNECTED: + run_ble_background = true; + break; + case BLE_GATTS_EVT_WRITE: { + // A client wrote to a characteristic. + + ble_gatts_evt_write_t *evt_write = &ble_evt->evt.gatts_evt.params.write; + // Event handle must match the handle for my characteristic. + if (evt_write->handle == supervisor_ble_contents_characteristic.handle) { + // Handle events + //write_to_ringbuf(self, evt_write->data, evt_write->len); + // First packet includes a uint16_t le for length at the start. + uint16_t current_length = ((uint16_t*) current_command)[0]; + memcpy(((uint8_t*) current_command) + current_offset, evt_write->data, evt_write->len); + current_offset += evt_write->len; + current_length = ((uint16_t*) current_command)[0]; + if (current_offset == current_length) { + run_ble_background = true; + done = true; + } + } else if (evt_write->handle == supervisor_ble_filename_characteristic.handle) { + new_filename = true; + run_ble_background = true; + done = true; + } else { + return done; + } + break; + } + + default: + // For debugging. + // mp_printf(&mp_plat_print, "Unhandled peripheral event: 0x%04x\n", ble_evt->header.evt_id); + break; + } + return done; +} diff --git a/supervisor/shared/bluetooth.h b/supervisor/shared/bluetooth.h new file mode 100644 index 0000000000000..7ebcb953f00aa --- /dev/null +++ b/supervisor/shared/bluetooth.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_BLUETOOTH_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_BLUETOOTH_H + +void supervisor_start_bluetooth(void); +bool supervisor_bluetooth_hook(ble_evt_t *ble_evt); +void supervisor_bluetooth_background(void); + +#endif \ No newline at end of file diff --git a/supervisor/shared/board.c b/supervisor/shared/board.c new file mode 100644 index 0000000000000..e3eb8fd0d7aa1 --- /dev/null +++ b/supervisor/shared/board.c @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/board.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#ifdef USER_NEOPIXELS_PIN + +// The maximum number of user neopixels right now is 10, on Circuit Playgrounds. +// PyBadge and PyGamer have max 5 +#define USER_NEOPIXELS_MAX_COUNT 10 + +void board_reset_user_neopixels(void) { + // Turn off on-board NeoPixel string + uint8_t empty[USER_NEOPIXELS_MAX_COUNT * 3] = { 0 }; + digitalio_digitalinout_obj_t neopixel_pin; + common_hal_digitalio_digitalinout_construct(&neopixel_pin, USER_NEOPIXELS_PIN); + common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, + DRIVE_MODE_PUSH_PULL); + common_hal_neopixel_write(&neopixel_pin, empty, USER_NEOPIXELS_MAX_COUNT * 3); + common_hal_digitalio_digitalinout_deinit(&neopixel_pin); +} + +#endif diff --git a/supervisor/shared/board.h b/supervisor/shared/board.h new file mode 100644 index 0000000000000..0e4d73455d115 --- /dev/null +++ b/supervisor/shared/board.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_BOARD_H +#define MICROPY_INCLUDED_SUPERVISOR_BOARD_H + +#include "py/mpconfig.h" + +#ifdef USER_NEOPIXELS_PIN + +void board_reset_user_neopixels(void); + +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_BOARD_H diff --git a/supervisor/shared/display.c b/supervisor/shared/display.c new file mode 100644 index 0000000000000..855432d645d58 --- /dev/null +++ b/supervisor/shared/display.c @@ -0,0 +1,250 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/display.h" + +#include + +#include "py/mpstate.h" +#include "shared-bindings/displayio/Group.h" +#include "shared-bindings/displayio/Palette.h" +#include "shared-bindings/displayio/TileGrid.h" +#include "supervisor/memory.h" + +extern size_t blinka_bitmap_data[]; +extern displayio_bitmap_t blinka_bitmap; +extern displayio_group_t circuitpython_splash; + +static supervisor_allocation* tilegrid_tiles = NULL; + +void supervisor_start_terminal(uint16_t width_px, uint16_t height_px) { + displayio_tilegrid_t* grid = &supervisor_terminal_text_grid; + uint16_t width_in_tiles = (width_px - blinka_bitmap.width) / grid->tile_width; + // determine scale based on h + uint8_t scale = 1; + if (width_in_tiles > 80) { + scale = 2; + } + width_in_tiles = (width_px - blinka_bitmap.width * scale) / (grid->tile_width * scale); + uint16_t height_in_tiles = height_px / (grid->tile_height * scale); + uint16_t remaining_pixels = height_px % (grid->tile_height * scale); + if (remaining_pixels > 0) { + height_in_tiles += 1; + } + circuitpython_splash.scale = scale; + + uint16_t total_tiles = width_in_tiles * height_in_tiles; + + // First try to allocate outside the heap. This will fail when the VM is running. + tilegrid_tiles = allocate_memory(align32_size(total_tiles), false); + uint8_t* tiles; + if (tilegrid_tiles == NULL) { + tiles = m_malloc(total_tiles, true); + MP_STATE_VM(terminal_tilegrid_tiles) = tiles; + } else { + tiles = (uint8_t*) tilegrid_tiles->ptr; + } + + if (tiles == NULL) { + return; + } + grid->y = 0; + grid->top_left_y = 0; + if (remaining_pixels > 0) { + grid->y -= (grid->tile_height - remaining_pixels); + } + grid->width_in_tiles = width_in_tiles; + grid->height_in_tiles = height_in_tiles; + grid->pixel_width = width_in_tiles * grid->tile_width; + grid->pixel_height = height_in_tiles * grid->tile_height; + grid->tiles = tiles; + grid->full_change = true; + + common_hal_terminalio_terminal_construct(&supervisor_terminal, grid, &supervisor_terminal_font); +} + +void supervisor_stop_terminal(void) { + if (tilegrid_tiles != NULL) { + free_memory(tilegrid_tiles); + tilegrid_tiles = NULL; + supervisor_terminal_text_grid.inline_tiles = false; + supervisor_terminal_text_grid.tiles = NULL; + } +} + +void supervisor_display_move_memory(void) { + #if CIRCUITPY_DISPLAYIO + displayio_tilegrid_t* grid = &supervisor_terminal_text_grid; + if (MP_STATE_VM(terminal_tilegrid_tiles) == NULL || grid->tiles != MP_STATE_VM(terminal_tilegrid_tiles)) { + return; + } + uint16_t total_tiles = grid->width_in_tiles * grid->height_in_tiles; + + tilegrid_tiles = allocate_memory(align32_size(total_tiles), false); + if (tilegrid_tiles != NULL) { + memcpy(tilegrid_tiles->ptr, grid->tiles, total_tiles); + grid->tiles = (uint8_t*) tilegrid_tiles->ptr; + } else { + grid->tiles = NULL; + grid->inline_tiles = false; + } + MP_STATE_VM(terminal_tilegrid_tiles) = NULL; + #endif +} + +size_t blinka_bitmap_data[32] = { + 0x00000011, 0x11000000, + 0x00000111, 0x53100000, + 0x00000111, 0x56110000, + 0x00000111, 0x11140000, + 0x00000111, 0x20002000, + 0x00000011, 0x13000000, + 0x00000001, 0x11200000, + 0x00000000, 0x11330000, + 0x00000000, 0x01122000, + 0x00001111, 0x44133000, + 0x00032323, 0x24112200, + 0x00111114, 0x44113300, + 0x00323232, 0x34112200, + 0x11111144, 0x44443300, + 0x11111111, 0x11144401, + 0x23232323, 0x21111110 +}; + +displayio_bitmap_t blinka_bitmap = { + .base = {.type = &displayio_bitmap_type }, + .width = 16, + .height = 16, + .data = blinka_bitmap_data, + .stride = 2, + .bits_per_value = 4, + .x_shift = 3, + .x_mask = 0x7, + .bitmask = 0xf, + .read_only = true +}; + +_displayio_color_t blinka_colors[7] = { + { + .rgb888 = 0x000000, + .rgb565 = 0x0000, + .luma = 0x00, + .chroma = 0, + .transparent = true + }, + { + .rgb888 = 0x8428bc, + .rgb565 = 0x7889, + .luma = 0xff, // We cheat the luma here. It is actually 0x60 + .hue = 184, + .chroma = 148 + }, + { + .rgb888 = 0xff89bc, + .rgb565 = 0xB8FC, + .luma = 0xb5, + .hue = 222, + .chroma = 118 + }, + { + .rgb888 = 0x7beffe, + .rgb565 = 0x9F86, + .luma = 0xe0, + .hue = 124, + .chroma = 131 + }, + { + .rgb888 = 0x51395f, + .rgb565 = 0x0D5A, + .luma = 0x47, + .hue = 185, + .chroma = 38 + }, + { + .rgb888 = 0xffffff, + .rgb565 = 0xffff, + .luma = 0xff, + .chroma = 0 + }, + { + .rgb888 = 0x0736a0, + .rgb565 = 0xf501, + .luma = 0x44, + .hue = 147, + .chroma = 153 + }, +}; + +displayio_palette_t blinka_palette = { + .base = {.type = &displayio_palette_type }, + .colors = blinka_colors, + .color_count = 7, + .needs_refresh = false +}; + +displayio_tilegrid_t blinka_sprite = { + .base = {.type = &displayio_tilegrid_type }, + .bitmap = &blinka_bitmap, + .pixel_shader = &blinka_palette, + .x = 0, + .y = 0, + .pixel_width = 16, + .pixel_height = 16, + .bitmap_width_in_tiles = 1, + .width_in_tiles = 1, + .height_in_tiles = 1, + .tile_width = 16, + .tile_height = 16, + .top_left_x = 16, + .top_left_y = 16, + .tiles = 0, + .partial_change = false, + .full_change = false, + .hidden = false, + .hidden_by_parent = false, + .moved = false, + .inline_tiles = true, + .in_group = true +}; + +displayio_group_child_t splash_children[2] = { + {&blinka_sprite, &blinka_sprite}, + {&supervisor_terminal_text_grid, &supervisor_terminal_text_grid} +}; + +displayio_group_t circuitpython_splash = { + .base = {.type = &displayio_group_type }, + .x = 0, + .y = 0, + .scale = 2, + .size = 2, + .max_size = 2, + .children = splash_children, + .item_removed = false, + .in_group = false, + .hidden = false, + .hidden_by_parent = false +}; diff --git a/supervisor/shared/display.h b/supervisor/shared/display.h new file mode 100644 index 0000000000000..2a2ccf46df901 --- /dev/null +++ b/supervisor/shared/display.h @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_DISPLAY_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_DISPLAY_H + +#include "shared-bindings/displayio/Bitmap.h" +#include "shared-bindings/displayio/TileGrid.h" +#include "shared-bindings/fontio/BuiltinFont.h" +#include "shared-bindings/terminalio/Terminal.h" + +// These are autogenerated resources. + +// This is fixed so it doesn't need to be in RAM. +extern const fontio_builtinfont_t supervisor_terminal_font; + +// These will change so they must live in RAM. +extern displayio_bitmap_t supervisor_terminal_font_bitmap; +extern displayio_tilegrid_t supervisor_terminal_text_grid; +extern terminalio_terminal_obj_t supervisor_terminal; + +void supervisor_start_terminal(uint16_t width_px, uint16_t height_px); +void supervisor_stop_terminal(void); + +void supervisor_display_move_memory(void); + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_DISPLAY_H diff --git a/ports/atmel-samd/external_flash/common_commands.h b/supervisor/shared/external_flash/common_commands.h similarity index 96% rename from ports/atmel-samd/external_flash/common_commands.h rename to supervisor/shared/external_flash/common_commands.h index bb2060708cd9a..cc0da217599dc 100644 --- a/ports/atmel-samd/external_flash/common_commands.h +++ b/supervisor/shared/external_flash/common_commands.h @@ -28,6 +28,7 @@ #define CMD_READ_JEDEC_ID 0x9f #define CMD_READ_DATA 0x03 +#define CMD_FAST_READ_DATA 0x0B #define CMD_SECTOR_ERASE 0x20 // #define CMD_SECTOR_ERASE CMD_READ_JEDEC_ID #define CMD_DISABLE_WRITE 0x04 @@ -37,6 +38,7 @@ #define CMD_READ_STATUS 0x05 #define CMD_READ_STATUS2 0x35 #define CMD_WRITE_STATUS_BYTE1 0x01 +#define CMD_WRITE_STATUS_BYTE2 0x31 #define CMD_DUAL_READ 0x3b #define CMD_QUAD_READ 0x6b #define CMD_ENABLE_RESET 0x66 diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h new file mode 100644 index 0000000000000..fd9224f561b6f --- /dev/null +++ b/supervisor/shared/external_flash/devices.h @@ -0,0 +1,554 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H +#define MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H + +#include +#include + +typedef struct { + uint32_t total_size; + uint16_t start_up_time_us; + + // Three response bytes to 0x9f JEDEC ID command. + uint8_t manufacturer_id; + uint8_t memory_type; + uint8_t capacity; + + // Max clock speed for all operations and the fastest read mode. + uint8_t max_clock_speed_mhz; + + // Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the + // status register. + uint8_t quad_enable_bit_mask; + + bool has_sector_protection : 1; + + // Supports the 0x0b fast read command with 8 dummy cycles. + bool supports_fast_read : 1; + + // Supports the fast read, quad output command 0x6b with 8 dummy cycles. + bool supports_qspi : 1; + + // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only + // uses all four lines for data. + bool supports_qspi_writes: 1; + + // Requires a separate command 0x31 to write to the second byte of the status register. + // Otherwise two byte are written via 0x01. + bool write_status_register_split: 1; + + // True when the status register is a single byte. This implies the Quad Enable bit is in the + // first byte and the Read Status Register 2 command (0x35) is unsupported. + bool single_status_byte: 1; +} external_flash_device; + +// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21 +// Xplained board. +// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf +#define AT25DF081A {\ + .total_size = (1 << 20), /* 1 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x1f, \ + .memory_type = 0x45, \ + .capacity = 0x01, \ + .max_clock_speed_mhz = 85, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = true, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Adesto Tech AT25SF161-SSHD-T 2MiB SPI flash +// for the StringCar M0 (SAMD21) Express board. +// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF161-SDHD-T/1265-1230-1-ND/ +// Datasheet: https://www.adestotech.com/wpo-content/uploads/jDS-AT25SF161_046.pdf +#define AT25SF161 {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x1f, \ + .memory_type = 0x86, \ + .capacity = 0x01, \ + .max_clock_speed_mhz = 85, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = true, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Adesto Tech AT25SF041 1MiB SPI flash. It's on the SparkFun +// SAMD51 Thing Plus board +// Datasheet: https://www.adestotech.com/wp-content/uploads/DS-AT25SF041_044.pdf +#define AT25SF041A {\ + .total_size = (1 << 19), /* 512 KiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x1f, \ + .memory_type = 0x84, \ + .capacity = 0x01, \ + .max_clock_speed_mhz = 85, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Gigadevice GD25Q16C 2MiB SPI flash. +// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/ +#define GD25Q16C {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc8, \ + .memory_type = 0x40, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Gigadevice GD25Q32C 4MiB SPI flash. +// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q32/gd25q32.pdf +#define GD25Q32C {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc8, \ + .memory_type = 0x40, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = true, \ + .single_status_byte = false, \ +} + +// Settings for the Gigadevice GD25Q64C 8MiB SPI flash. +// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf +#define GD25Q64C {\ + .total_size = (1 << 23), /* 8 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc8, \ + .memory_type = 0x40, \ + .capacity = 0x17, \ + .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = true, \ + .single_status_byte = false, \ +} + +// Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash. +// Datasheet: http://www.cypress.com/file/316661/download +#define S25FL064L {\ + .total_size = (1 << 23), /* 8 MiB */ \ + .start_up_time_us = 300, \ + .manufacturer_id = 0x01, \ + .memory_type = 0x60, \ + .capacity = 0x17, \ + .max_clock_speed_mhz = 108, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Cypress (was Spansion) S25FL116K 2MiB SPI flash. +// Datasheet: http://www.cypress.com/file/196886/download +#define S25FL116K {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x01, \ + .memory_type = 0x40, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 108, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Cypress (was Spansion) S25FL216K 2MiB SPI flash. +// Datasheet: http://www.cypress.com/file/197346/download +#define S25FL216K {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x01, \ + .memory_type = 0x40, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 65, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q16FW 2MiB SPI flash. +// Datasheet: https://www.winbond.com/resource-files/w25q16fw%20revj%2005182017%20sfdp.pdf +#define W25Q16FW {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x60, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q16JV-IQ 2MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) +// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf +#define W25Q16JV_IQ {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q16JV-IM 2MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40) +// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf +#define W25Q16JV_IM {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x70, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ +} + +// Settings for the Winbond W25Q32BV 4MiB SPI flash. +// Datasheet: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf +#define W25Q32BV {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x60, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 104, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} +// Settings for the Winbond W25Q32JV-IM 4MiB SPI flash. +// Datasheet: https://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf +#define W25Q32JV_IM {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x70, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ +} + +// Settings for the Winbond W25Q32JV-IQ 4MiB SPI flash. +// Datasheet: https://www.mouser.com/datasheet/2/949/w25q32jv_revg_03272018_plus-1489806.pdf +#define W25Q32JV_IQ {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ +} + +// Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40) +// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf +#define W25Q64JV_IM {\ + .total_size = (1 << 23), /* 8 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x70, \ + .capacity = 0x17, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q64JV-IQ 8MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) +// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf +#define W25Q64JV_IQ {\ + .total_size = (1 << 23), /* 8 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x17, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q80DL 1MiB SPI flash. +// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf +#define W25Q80DL {\ + .total_size = (1 << 20), /* 1 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x60, \ + .capacity = 0x14, \ + .max_clock_speed_mhz = 104, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q80DV 1MiB SPI flash.. Note that W25Q80DL has a different memory type (0x60) +// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf +#define W25Q80DV {\ + .total_size = (1 << 20), /* 1 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x14, \ + .max_clock_speed_mhz = 104, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Winbond W25Q128JV-SQ 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) +// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf +#define W25Q128JV_SQ {\ + .total_size = (1 << 24), /* 16 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x18, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the Macronix MX25L1606 2MiB SPI flash. +// Datasheet: +#define MX25L1606 {\ + .total_size = (1 << 21), /* 2 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc2, \ + .memory_type = 0x20, \ + .capacity = 0x15, \ + .max_clock_speed_mhz = 8, \ + .quad_enable_bit_mask = 0x40, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} + +// Settings for the Macronix MX25L3233F 4MiB SPI flash. +// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7426/MX25L3233F,%203V,%2032Mb,%20v1.6.pdf +#define MX25L3233F {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc2, \ + .memory_type = 0x20, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x40, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} + +// Settings for the Macronix MX25R6435F 8MiB SPI flash. +// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7428/MX25R6435F,%20Wide%20Range,%2064Mb,%20v1.4.pdf +// By default its in lower power mode which can only do 8mhz. In high power mode it can do 80mhz. +#define MX25R6435F {\ + .total_size = (1 << 23), /* 8 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc2, \ + .memory_type = 0x28, \ + .capacity = 0x17, \ + .max_clock_speed_mhz = 8, \ + .quad_enable_bit_mask = 0x40, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} + +// Settings for the Macronix MX25L51245G 64MiB SPI flash. +// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7437/MX25L51245G,%203V,%20512Mb,%20v1.6.pdf +#define MX25L51245G {\ + .total_size = (1 << 26), /* 64 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xc2, \ + .memory_type = 0x20, \ + .capacity = 0x1a, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x40, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} + +// Settings for the Winbond W25Q128JV-PM 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) +// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf +#define W25Q128JV_PM {\ + .total_size = (1 << 24), /* 16 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x70, \ + .capacity = 0x18, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ +} + +// Settings for the Winbond W25Q32FV 4MiB SPI flash. +// Datasheet:http://www.winbond.com/resource-files/w25q32fv%20revj%2006032016.pdf?__locale=en +#define W25Q32FV {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 5000, \ + .manufacturer_id = 0xef, \ + .memory_type = 0x40, \ + .capacity = 0x16, \ + .max_clock_speed_mhz = 104, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = false, \ +} + +// Settings for the ISSI IS25LP128F 16MiB SPI flash. +// Datasheet: http://www.issi.com/WW/pdf/25LP-WP128F.pdf +#define IS25LP128F {\ + .total_size = (1 << 24), /* 16 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x9d, \ + .memory_type = 0x60, \ + .capacity = 0x18, \ + .max_clock_speed_mhz = 133, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = true, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} +#endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H diff --git a/supervisor/shared/external_flash/external_flash.c b/supervisor/shared/external_flash/external_flash.c new file mode 100644 index 0000000000000..9d38c07d8992e --- /dev/null +++ b/supervisor/shared/external_flash/external_flash.c @@ -0,0 +1,563 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "external_flash.h" + +#include +#include + +#include "supervisor/spi_flash_api.h" +#include "supervisor/shared/external_flash/common_commands.h" +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/misc.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/memory.h" +#include "supervisor/shared/rgb_led_status.h" + +#define NO_SECTOR_LOADED 0xFFFFFFFF + +// The currently cached sector in the cache, ram or flash based. +static uint32_t current_sector; + +const external_flash_device possible_devices[EXTERNAL_FLASH_DEVICE_COUNT] = {EXTERNAL_FLASH_DEVICES}; + +static const external_flash_device* flash_device = NULL; + +// Track which blocks (up to 32) in the current sector currently live in the +// cache. +static uint32_t dirty_mask; + +static supervisor_allocation* supervisor_cache = NULL; + +// Wait until both the write enable and write in progress bits have cleared. +static bool wait_for_flash_ready(void) { + uint8_t read_status_response[1] = {0x00}; + bool ok = true; + // Both the write enable and write in progress bits should be low. + do { + ok = spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); + } while (ok && (read_status_response[0] & 0x3) != 0); + return ok; +} + +// Turn on the write enable bit so we can program and erase the flash. +static bool write_enable(void) { + return spi_flash_command(CMD_ENABLE_WRITE); +} + +// Read data_length's worth of bytes starting at address into data. +static bool read_flash(uint32_t address, uint8_t* data, uint32_t data_length) { + if (flash_device == NULL) { + return false; + } + if (!wait_for_flash_ready()) { + return false; + } + return spi_flash_read_data(address, data, data_length); +} + +// Writes data_length's worth of bytes starting at address from data. Assumes +// that the sector that address resides in has already been erased. So make sure +// to run erase_sector. +static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_length) { + if (flash_device == NULL) { + return false; + } + // Don't bother writing if the data is all 1s. Thats equivalent to the flash + // state after an erase. + bool all_ones = true; + for (uint16_t i = 0; i < data_length; i++) { + if (data[i] != 0xff) { + all_ones = false; + break; + } + } + if (all_ones) { + return true; + } + + for (uint32_t bytes_written = 0; + bytes_written < data_length; + bytes_written += SPI_FLASH_PAGE_SIZE) { + if (!wait_for_flash_ready() || !write_enable()) { + return false; + } + + if (!spi_flash_write_data(address + bytes_written, (uint8_t*) data + bytes_written, + SPI_FLASH_PAGE_SIZE)) { + return false; + } + } + return true; +} + +static bool page_erased(uint32_t sector_address) { + // Check the first few bytes to catch the common case where there is data + // without using a bunch of memory. + uint8_t short_buffer[4]; + if (read_flash(sector_address, short_buffer, 4)) { + for (uint16_t i = 0; i < 4; i++) { + if (short_buffer[i] != 0xff) { + return false; + } + } + } else { + return false; + } + + // Now check the full length. + uint8_t full_buffer[FILESYSTEM_BLOCK_SIZE]; + if (read_flash(sector_address, full_buffer, FILESYSTEM_BLOCK_SIZE)) { + for (uint16_t i = 0; i < FILESYSTEM_BLOCK_SIZE; i++) { + if (short_buffer[i] != 0xff) { + return false; + } + } + } else { + return false; + } + return true; +} + +// Erases the given sector. Make sure you copied all of the data out of it you +// need! Also note, sector_address is really 24 bits. +static bool erase_sector(uint32_t sector_address) { + // Before we erase the sector we need to wait for any writes to finish and + // and then enable the write again. + if (!wait_for_flash_ready() || !write_enable()) { + return false; + } + + spi_flash_sector_command(CMD_SECTOR_ERASE, sector_address); + return true; +} + +// Sector is really 24 bits. +static bool copy_block(uint32_t src_address, uint32_t dest_address) { + // Copy page by page to minimize RAM buffer. + uint16_t page_size = SPI_FLASH_PAGE_SIZE; + uint8_t buffer[page_size]; + for (uint32_t i = 0; i < FILESYSTEM_BLOCK_SIZE / page_size; i++) { + if (!read_flash(src_address + i * page_size, buffer, page_size)) { + return false; + } + if (!write_flash(dest_address + i * page_size, buffer, page_size)) { + return false; + } + } + return true; +} + +void supervisor_flash_init(void) { + if (flash_device != NULL) { + return; + } + + // Delay to give the SPI Flash time to get going. + // TODO(tannewt): Only do this when we know power was applied vs a reset. + uint16_t max_start_up_delay_us = 0; + for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { + if (possible_devices[i].start_up_time_us > max_start_up_delay_us) { + max_start_up_delay_us = possible_devices[i].start_up_time_us; + } + } + common_hal_mcu_delay_us(max_start_up_delay_us); + + spi_flash_init(); + + // The response will be 0xff if the flash needs more time to start up. + uint8_t jedec_id_response[3] = {0xff, 0xff, 0xff}; + while (jedec_id_response[0] == 0xff) { + spi_flash_read_command(CMD_READ_JEDEC_ID, jedec_id_response, 3); + } + + for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { + const external_flash_device* possible_device = &possible_devices[i]; + if (jedec_id_response[0] == possible_device->manufacturer_id && + jedec_id_response[1] == possible_device->memory_type && + jedec_id_response[2] == possible_device->capacity) { + flash_device = possible_device; + break; + } + } + + if (flash_device == NULL) { + return; + } + + // We don't know what state the flash is in so wait for any remaining writes and then reset. + uint8_t read_status_response[1] = {0x00}; + // The write in progress bit should be low. + do { + spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); + } while ((read_status_response[0] & 0x1) != 0); + // The suspended write/erase bit should be low. + do { + spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1); + } while ((read_status_response[0] & 0x80) != 0); + + + spi_flash_command(CMD_ENABLE_RESET); + spi_flash_command(CMD_RESET); + + // Wait 30us for the reset + common_hal_mcu_delay_us(30); + + spi_flash_init_device(flash_device); + + // Activity LED for flash writes. +#ifdef MICROPY_HW_LED_MSC + gpio_set_pin_function(SPI_FLASH_CS_PIN, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(MICROPY_HW_LED_MSC, GPIO_DIRECTION_OUT); + // There's already a pull-up on the board. + gpio_set_pin_level(MICROPY_HW_LED_MSC, false); +#endif + + if (flash_device->has_sector_protection) { + write_enable(); + + // Turn off sector protection + uint8_t data[1] = {0x00}; + spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, data, 1); + } + + // Turn off writes in case this is a microcontroller only reset. + spi_flash_command(CMD_DISABLE_WRITE); + + wait_for_flash_ready(); + + current_sector = NO_SECTOR_LOADED; + dirty_mask = 0; + MP_STATE_VM(flash_ram_cache) = NULL; +} + +// The size of each individual block. +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +// The total number of available blocks. +uint32_t supervisor_flash_get_block_count(void) { + // We subtract one erase sector size because we may use it as a staging area + // for writes. + return (flash_device->total_size - SPI_FLASH_ERASE_SIZE) / FILESYSTEM_BLOCK_SIZE; +} + +// Flush the cache that was written to the scratch portion of flash. Only used +// when ram is tight. +static bool flush_scratch_flash(void) { + if (current_sector == NO_SECTOR_LOADED) { + return true; + } + // First, copy out any blocks that we haven't touched from the sector we've + // cached. + bool copy_to_scratch_ok = true; + uint32_t scratch_sector = flash_device->total_size - SPI_FLASH_ERASE_SIZE; + for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { + if ((dirty_mask & (1 << i)) == 0) { + copy_to_scratch_ok = copy_to_scratch_ok && + copy_block(current_sector + i * FILESYSTEM_BLOCK_SIZE, + scratch_sector + i * FILESYSTEM_BLOCK_SIZE); + } + } + if (!copy_to_scratch_ok) { + // TODO(tannewt): Do more here. We opted to not erase and copy bad data + // in. We still risk losing the data written to the scratch sector. + return false; + } + // Second, erase the current sector. + erase_sector(current_sector); + // Finally, copy the new version into it. + for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { + copy_block(scratch_sector + i * FILESYSTEM_BLOCK_SIZE, + current_sector + i * FILESYSTEM_BLOCK_SIZE); + } + return true; +} + +// Attempts to allocate a new set of page buffers for caching a full sector in +// ram. Each page is allocated separately so that the GC doesn't need to provide +// one huge block. We can free it as we write if we want to also. +static bool allocate_ram_cache(void) { + uint8_t blocks_per_sector = SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; + uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; + + uint32_t table_size = blocks_per_sector * pages_per_block * sizeof(uint32_t); + // Attempt to allocate outside the heap first. + supervisor_cache = allocate_memory(table_size + SPI_FLASH_ERASE_SIZE, false); + if (supervisor_cache != NULL) { + MP_STATE_VM(flash_ram_cache) = (uint8_t **) supervisor_cache->ptr; + uint8_t* page_start = (uint8_t *) supervisor_cache->ptr + table_size; + + for (uint8_t i = 0; i < blocks_per_sector; i++) { + for (uint8_t j = 0; j < pages_per_block; j++) { + uint32_t offset = i * pages_per_block + j; + MP_STATE_VM(flash_ram_cache)[offset] = page_start + offset * SPI_FLASH_PAGE_SIZE; + } + } + return true; + } + + if (MP_STATE_MEM(gc_pool_start) == 0) { + return false; + } + + MP_STATE_VM(flash_ram_cache) = m_malloc_maybe(blocks_per_sector * pages_per_block * sizeof(uint32_t), false); + if (MP_STATE_VM(flash_ram_cache) == NULL) { + return false; + } + // Declare i and j outside the loops in case we fail to allocate everything + // we need. In that case we'll give it back. + uint8_t i = 0; + uint8_t j = 0; + bool success = true; + for (i = 0; i < blocks_per_sector; i++) { + for (j = 0; j < pages_per_block; j++) { + uint8_t *page_cache = m_malloc_maybe(SPI_FLASH_PAGE_SIZE, false); + if (page_cache == NULL) { + success = false; + break; + } + MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j] = page_cache; + } + if (!success) { + break; + } + } + // We couldn't allocate enough so give back what we got. + if (!success) { + // We add 1 so that we delete 0 when i is 1. Going to zero (i >= 0) + // would never stop because i is unsigned. + i++; + for (; i > 0; i--) { + for (; j > 0; j--) { + m_free(MP_STATE_VM(flash_ram_cache)[(i - 1) * pages_per_block + (j - 1)]); + } + j = pages_per_block; + } + m_free(MP_STATE_VM(flash_ram_cache)); + MP_STATE_VM(flash_ram_cache) = NULL; + } + return success; +} + +static void release_ram_cache(void) { + if (supervisor_cache != NULL) { + free_memory(supervisor_cache); + supervisor_cache = NULL; + } else if (MP_STATE_MEM(gc_pool_start)) { + m_free(MP_STATE_VM(flash_ram_cache)); + } + MP_STATE_VM(flash_ram_cache) = NULL; +} + +// Flush the cached sector from ram onto the flash. We'll free the cache unless +// keep_cache is true. +static bool flush_ram_cache(bool keep_cache) { + if (current_sector == NO_SECTOR_LOADED) { + if (!keep_cache) { + release_ram_cache(); + } + return true; + } + // First, copy out any blocks that we haven't touched from the sector + // we've cached. If we don't do this we'll erase the data during the sector + // erase below. + bool copy_to_ram_ok = true; + uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; + for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { + if ((dirty_mask & (1 << i)) == 0) { + for (uint8_t j = 0; j < pages_per_block; j++) { + copy_to_ram_ok = read_flash( + current_sector + (i * pages_per_block + j) * SPI_FLASH_PAGE_SIZE, + MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j], + SPI_FLASH_PAGE_SIZE); + if (!copy_to_ram_ok) { + break; + } + } + } + if (!copy_to_ram_ok) { + break; + } + } + + if (!copy_to_ram_ok) { + return false; + } + // Second, erase the current sector. + erase_sector(current_sector); + // Lastly, write all the data in ram that we've cached. + for (uint8_t i = 0; i < SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE; i++) { + for (uint8_t j = 0; j < pages_per_block; j++) { + write_flash(current_sector + (i * pages_per_block + j) * SPI_FLASH_PAGE_SIZE, + MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j], + SPI_FLASH_PAGE_SIZE); + if (!keep_cache && supervisor_cache == NULL && MP_STATE_MEM(gc_pool_start)) { + m_free(MP_STATE_VM(flash_ram_cache)[i * pages_per_block + j]); + } + } + } + // We're done with the cache for now so give it back. + if (!keep_cache) { + release_ram_cache(); + } + return true; +} + +// Delegates to the correct flash flush method depending on the existing cache. +// TODO Don't blink the status indicator if we don't actually do any writing (hard to tell right now). +static void spi_flash_flush_keep_cache(bool keep_cache) { + #ifdef MICROPY_HW_LED_MSC + port_pin_set_output_level(MICROPY_HW_LED_MSC, true); + #endif + temp_status_color(ACTIVE_WRITE); + // If we've cached to the flash itself flush from there. + if (MP_STATE_VM(flash_ram_cache) == NULL) { + flush_scratch_flash(); + } else { + flush_ram_cache(keep_cache); + } + current_sector = NO_SECTOR_LOADED; + clear_temp_status(); + #ifdef MICROPY_HW_LED_MSC + port_pin_set_output_level(MICROPY_HW_LED_MSC, false); + #endif +} + +void supervisor_flash_flush(void) { + spi_flash_flush_keep_cache(true); +} + +void supervisor_flash_release_cache(void) { + spi_flash_flush_keep_cache(false); +} + +static int32_t convert_block_to_flash_addr(uint32_t block) { + if (0 <= block && block < supervisor_flash_get_block_count()) { + // a block in partition 1 + return block * FILESYSTEM_BLOCK_SIZE; + } + // bad block + return -1; +} + +bool external_flash_read_block(uint8_t *dest, uint32_t block) { + int32_t address = convert_block_to_flash_addr(block); + if (address == -1) { + // bad block number + return false; + } + + // Mask out the lower bits that designate the address within the sector. + uint32_t this_sector = address & (~(SPI_FLASH_ERASE_SIZE - 1)); + uint8_t block_index = (address / FILESYSTEM_BLOCK_SIZE) % (SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE); + uint8_t mask = 1 << (block_index); + // We're reading from the currently cached sector. + if (current_sector == this_sector && (mask & dirty_mask) > 0) { + if (MP_STATE_VM(flash_ram_cache) != NULL) { + uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; + for (int i = 0; i < pages_per_block; i++) { + memcpy(dest + i * SPI_FLASH_PAGE_SIZE, + MP_STATE_VM(flash_ram_cache)[block_index * pages_per_block + i], + SPI_FLASH_PAGE_SIZE); + } + return true; + } else { + uint32_t scratch_address = flash_device->total_size - SPI_FLASH_ERASE_SIZE + block_index * FILESYSTEM_BLOCK_SIZE; + return read_flash(scratch_address, dest, FILESYSTEM_BLOCK_SIZE); + } + } + return read_flash(address, dest, FILESYSTEM_BLOCK_SIZE); +} + +bool external_flash_write_block(const uint8_t *data, uint32_t block) { + // Non-MBR block, copy to cache + int32_t address = convert_block_to_flash_addr(block); + if (address == -1) { + // bad block number + return false; + } + // Wait for any previous writes to finish. + wait_for_flash_ready(); + // Mask out the lower bits that designate the address within the sector. + uint32_t this_sector = address & (~(SPI_FLASH_ERASE_SIZE - 1)); + uint8_t block_index = (address / FILESYSTEM_BLOCK_SIZE) % (SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE); + uint8_t mask = 1 << (block_index); + // Flush the cache if we're moving onto a sector or we're writing the + // same block again. + if (current_sector != this_sector || (mask & dirty_mask) > 0) { + // Check to see if we'd write to an erased page. In that case we + // can write directly. + if (page_erased(address)) { + return write_flash(address, data, FILESYSTEM_BLOCK_SIZE); + } + if (current_sector != NO_SECTOR_LOADED) { + supervisor_flash_flush(); + } + if (MP_STATE_VM(flash_ram_cache) == NULL && !allocate_ram_cache()) { + erase_sector(flash_device->total_size - SPI_FLASH_ERASE_SIZE); + wait_for_flash_ready(); + } + current_sector = this_sector; + dirty_mask = 0; + } + dirty_mask |= mask; + // Copy the block to the appropriate cache. + if (MP_STATE_VM(flash_ram_cache) != NULL) { + uint8_t pages_per_block = FILESYSTEM_BLOCK_SIZE / SPI_FLASH_PAGE_SIZE; + for (int i = 0; i < pages_per_block; i++) { + memcpy(MP_STATE_VM(flash_ram_cache)[block_index * pages_per_block + i], + data + i * SPI_FLASH_PAGE_SIZE, + SPI_FLASH_PAGE_SIZE); + } + return true; + } else { + uint32_t scratch_address = flash_device->total_size - SPI_FLASH_ERASE_SIZE + block_index * FILESYSTEM_BLOCK_SIZE; + return write_flash(scratch_address, data, FILESYSTEM_BLOCK_SIZE); + } +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { + for (size_t i = 0; i < num_blocks; i++) { + if (!external_flash_read_block(dest + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { + return 1; // error + } + } + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + for (size_t i = 0; i < num_blocks; i++) { + if (!external_flash_write_block(src + i * FILESYSTEM_BLOCK_SIZE, block_num + i)) { + return 1; // error + } + } + return 0; // success +} diff --git a/supervisor/shared/external_flash/external_flash.h b/supervisor/shared/external_flash/external_flash.h new file mode 100644 index 0000000000000..72b619a2a8b0b --- /dev/null +++ b/supervisor/shared/external_flash/external_flash.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +// Erase sector size. +#define SPI_FLASH_SECTOR_SIZE (0x1000 - 100) + +// These are common across all NOR Flash. +#define SPI_FLASH_ERASE_SIZE (1 << 12) +#define SPI_FLASH_PAGE_SIZE (256) + +#define SPI_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define SPI_FLASH_IDLE_TICK(tick) (((tick) & SPI_FLASH_SYSTICK_MASK) == 2) + +#ifndef SPI_FLASH_MAX_BAUDRATE +#define SPI_FLASH_MAX_BAUDRATE 8000000 +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_H diff --git a/supervisor/shared/external_flash/external_flash_root_pointers.h b/supervisor/shared/external_flash/external_flash_root_pointers.h new file mode 100644 index 0000000000000..cb1b86d1935ed --- /dev/null +++ b/supervisor/shared/external_flash/external_flash_root_pointers.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_ROOT_POINTERS_H + +#include + +// We use this when we can allocate the whole cache in RAM. +#define FLASH_ROOT_POINTERS \ + uint8_t** flash_ram_cache; \ + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_EXTERNAL_FLASH_ROOT_POINTERS_H diff --git a/supervisor/shared/external_flash/qspi_flash.c b/supervisor/shared/external_flash/qspi_flash.c new file mode 100644 index 0000000000000..48266540c425c --- /dev/null +++ b/supervisor/shared/external_flash/qspi_flash.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016, 2017, 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/spi_flash_api.h" + +#include "supervisor/shared/external_flash/common_commands.h" + +void check_quad_enable(const external_flash_device* device) { + if (device->quad_enable_bit_mask == 0x00) { + return; + } + + // Verify that QSPI mode is enabled. + uint8_t status; + if (device->single_status_byte) { + spi_flash_read_command(CMD_READ_STATUS, &status, 1); + } else { + spi_flash_read_command(CMD_READ_STATUS2, &status, 1); + } + + // Check the quad enable bit. + if ((status & device->quad_enable_bit_mask) == 0) { + uint8_t full_status[2] = {0x00, device->quad_enable_bit_mask}; + spi_flash_command(CMD_ENABLE_WRITE); + if (device->write_status_register_split) { + spi_flash_write_command(CMD_WRITE_STATUS_BYTE2, full_status + 1, 1); + } else if (device->single_status_byte) { + spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, full_status + 1, 1); + } else { + spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, full_status, 2); + } + } +} diff --git a/supervisor/shared/external_flash/qspi_flash.h b/supervisor/shared/external_flash/qspi_flash.h new file mode 100644 index 0000000000000..b72e37b268cfb --- /dev/null +++ b/supervisor/shared/external_flash/qspi_flash.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_QSPI_FLASH_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_QSPI_FLASH_H + +void check_quad_enable(const external_flash_device* device); + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_QSPI_FLASH_H diff --git a/supervisor/shared/external_flash/spi_flash.c b/supervisor/shared/external_flash/spi_flash.c new file mode 100644 index 0000000000000..67e64c970ec29 --- /dev/null +++ b/supervisor/shared/external_flash/spi_flash.c @@ -0,0 +1,154 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016, 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/spi_flash_api.h" + +#include +#include + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/external_flash/common_commands.h" +#include "supervisor/shared/external_flash/external_flash.h" +#include "py/mpconfig.h" + +digitalio_digitalinout_obj_t cs_pin; +busio_spi_obj_t supervisor_flash_spi_bus; + +const external_flash_device* flash_device; +uint32_t spi_flash_baudrate; + +// Enable the flash over SPI. +static void flash_enable(void) { + while (!common_hal_busio_spi_try_lock(&supervisor_flash_spi_bus)) {} + common_hal_digitalio_digitalinout_set_value(&cs_pin, false); +} + +// Disable the flash over SPI. +static void flash_disable(void) { + common_hal_digitalio_digitalinout_set_value(&cs_pin, true); + common_hal_busio_spi_unlock(&supervisor_flash_spi_bus); +} + +static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { + flash_enable(); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, command, command_length); + if (status) { + if (data_in != NULL && data_out != NULL) { + status = common_hal_busio_spi_transfer(&supervisor_flash_spi_bus, data_out, data_in, data_length); + } else if (data_out != NULL) { + status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data_out, data_length, 0xff); + } else if (data_in != NULL) { + status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data_in, data_length); + } + } + flash_disable(); + return status; +} + +static bool transfer_command(uint8_t command, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { + return transfer(&command, 1, data_in, data_out, data_length); +} + +bool spi_flash_command(uint8_t command) { + return transfer_command(command, NULL, NULL, 0); +} + +bool spi_flash_read_command(uint8_t command, uint8_t* data, uint32_t data_length) { + return transfer_command(command, NULL, data, data_length); +} + +bool spi_flash_write_command(uint8_t command, uint8_t* data, uint32_t data_length) { + return transfer_command(command, data, NULL, data_length); +} + +// Pack the low 24 bits of the address into a uint8_t array. +static void address_to_bytes(uint32_t address, uint8_t* bytes) { + bytes[0] = (address >> 16) & 0xff; + bytes[1] = (address >> 8) & 0xff; + bytes[2] = address & 0xff; +} + +bool spi_flash_sector_command(uint8_t command, uint32_t address) { + uint8_t request[4] = {command, 0x00, 0x00, 0x00}; + address_to_bytes(address, request + 1); + return transfer(request, 4, NULL, NULL, 0); +} + +bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t data_length) { + uint8_t request[4] = {CMD_PAGE_PROGRAM, 0x00, 0x00, 0x00}; + // Write the SPI flash write address into the bytes following the command byte. + address_to_bytes(address, request + 1); + flash_enable(); + common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, 4); + if (status) { + status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data, data_length); + } + flash_disable(); + return status; +} + +bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t data_length) { + uint8_t request[5] = {CMD_READ_DATA, 0x00, 0x00, 0x00}; + uint8_t command_length = 4; + if (flash_device->supports_fast_read) { + request[0] = CMD_FAST_READ_DATA; + command_length = 5; + } + // Write the SPI flash write address into the bytes following the command byte. + address_to_bytes(address, request + 1); + flash_enable(); + common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, command_length); + if (status) { + status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data, data_length, 0xff); + } + flash_disable(); + return status; +} + +void spi_flash_init(void) { + cs_pin.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&cs_pin, SPI_FLASH_CS_PIN); + + + // Set CS high (disabled). + common_hal_digitalio_digitalinout_switch_to_output(&cs_pin, true, DRIVE_MODE_PUSH_PULL); + common_hal_digitalio_digitalinout_never_reset(&cs_pin); + + supervisor_flash_spi_bus.base.type = &busio_spi_type; + common_hal_busio_spi_construct(&supervisor_flash_spi_bus, SPI_FLASH_SCK_PIN, SPI_FLASH_MOSI_PIN, SPI_FLASH_MISO_PIN); + common_hal_busio_spi_never_reset(&supervisor_flash_spi_bus); +} + +void spi_flash_init_device(const external_flash_device* device) { + flash_device = device; + spi_flash_baudrate = device->max_clock_speed_mhz * 1000000; + if (spi_flash_baudrate > SPI_FLASH_MAX_BAUDRATE) { + spi_flash_baudrate = SPI_FLASH_MAX_BAUDRATE; + } +} diff --git a/supervisor/shared/filesystem.c b/supervisor/shared/filesystem.c new file mode 100644 index 0000000000000..f6b94e38b57b2 --- /dev/null +++ b/supervisor/shared/filesystem.c @@ -0,0 +1,187 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/filesystem.h" + +#include "extmod/vfs_fat.h" +#include "lib/oofatfs/ff.h" +#include "lib/oofatfs/diskio.h" + +#include "py/mpstate.h" + +#include "supervisor/flash.h" + +static mp_vfs_mount_t _mp_vfs; +static fs_user_mount_t _internal_vfs; + +static volatile uint32_t filesystem_flush_interval_ms = CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS; +volatile bool filesystem_flush_requested = false; + +void filesystem_background(void) { + if (filesystem_flush_requested) { + filesystem_flush_interval_ms = CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS; + // Flush but keep caches + supervisor_flash_flush(); + filesystem_flush_requested = false; + } +} + +inline void filesystem_tick(void) { + if (filesystem_flush_interval_ms == 0) { + // 0 means not turned on. + return; + } + if (filesystem_flush_interval_ms == 1) { + filesystem_flush_requested = true; + filesystem_flush_interval_ms = CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS; + } else { + filesystem_flush_interval_ms--; + } +} + + +static void make_empty_file(FATFS *fatfs, const char *path) { + FIL fp; + f_open(fatfs, &fp, path, FA_WRITE | FA_CREATE_ALWAYS); + f_close(&fp); +} + + +static void make_sample_code_file(FATFS *fatfs) { + #if CIRCUITPY_FULL_BUILD + FIL fs; + UINT char_written = 0; + const byte buffer[] = "print('Hello World!')\n"; + //Create or modify existing code.py file + f_open(fatfs, &fs, "/code.py", FA_WRITE | FA_CREATE_ALWAYS); + f_write(&fs, buffer, sizeof(buffer) - 1, &char_written); + f_close(&fs); + #endif +} + +// we don't make this function static because it needs a lot of stack and we +// want it to be executed without using stack within main() function +void filesystem_init(bool create_allowed, bool force_create) { + // init the vfs object + fs_user_mount_t *vfs_fat = &_internal_vfs; + vfs_fat->flags = 0; + supervisor_flash_init_vfs(vfs_fat); + + // try to mount the flash + FRESULT res = f_mount(&vfs_fat->fatfs); + + if ((res == FR_NO_FILESYSTEM && create_allowed) || force_create) { + // No filesystem so create a fresh one, or reformat has been requested. + uint8_t working_buf[_MAX_SS]; + res = f_mkfs(&vfs_fat->fatfs, FM_FAT, 0, working_buf, sizeof(working_buf)); + // Flush the new file system to make sure it's repaired immediately. + supervisor_flash_flush(); + if (res != FR_OK) { + return; + } + + // set label +#ifdef CIRCUITPY_DRIVE_LABEL + f_setlabel(&vfs_fat->fatfs, CIRCUITPY_DRIVE_LABEL); +#else + f_setlabel(&vfs_fat->fatfs, "CIRCUITPY"); +#endif + + // inhibit file indexing on MacOS + f_mkdir(&vfs_fat->fatfs, "/.fseventsd"); + make_empty_file(&vfs_fat->fatfs, "/.metadata_never_index"); + make_empty_file(&vfs_fat->fatfs, "/.Trashes"); + make_empty_file(&vfs_fat->fatfs, "/.fseventsd/no_log"); + // make a sample code.py file + make_sample_code_file(&vfs_fat->fatfs); + + // create empty lib directory + f_mkdir(&vfs_fat->fatfs, "/lib"); + + // and ensure everything is flushed + supervisor_flash_flush(); + } else if (res != FR_OK) { + return; + } + mp_vfs_mount_t *vfs = &_mp_vfs; + vfs->str = "/"; + vfs->len = 1; + vfs->obj = MP_OBJ_FROM_PTR(vfs_fat); + vfs->next = NULL; + MP_STATE_VM(vfs_mount_table) = vfs; + + // The current directory is used as the boot up directory. + // It is set to the internal flash filesystem by default. + MP_STATE_PORT(vfs_cur) = vfs; +} + +void filesystem_flush(void) { + // Reset interval before next flush. + filesystem_flush_interval_ms = CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS; + supervisor_flash_flush(); + // Don't keep caches because this is called when starting or stopping the VM. + supervisor_flash_release_cache(); +} + +void filesystem_set_internal_writable_by_usb(bool writable) { + fs_user_mount_t *vfs = &_internal_vfs; + + filesystem_set_writable_by_usb(vfs, writable); +} + +void filesystem_set_writable_by_usb(fs_user_mount_t *vfs, bool usb_writable) { + if (usb_writable) { + vfs->flags |= FSUSER_USB_WRITABLE; + } else { + vfs->flags &= ~FSUSER_USB_WRITABLE; + } +} + +bool filesystem_is_writable_by_python(fs_user_mount_t *vfs) { + return (vfs->flags & FSUSER_CONCURRENT_WRITE_PROTECTED) == 0 || + (vfs->flags & FSUSER_USB_WRITABLE) == 0; +} + +bool filesystem_is_writable_by_usb(fs_user_mount_t *vfs) { + return (vfs->flags & FSUSER_CONCURRENT_WRITE_PROTECTED) == 0 || + (vfs->flags & FSUSER_USB_WRITABLE) != 0; +} + +void filesystem_set_internal_concurrent_write_protection(bool concurrent_write_protection) { + filesystem_set_concurrent_write_protection(&_internal_vfs, concurrent_write_protection); +} + +void filesystem_set_concurrent_write_protection(fs_user_mount_t *vfs, bool concurrent_write_protection) { + if (concurrent_write_protection) { + vfs->flags |= FSUSER_CONCURRENT_WRITE_PROTECTED; + } else { + vfs->flags &= ~FSUSER_CONCURRENT_WRITE_PROTECTED; + } +} + +bool filesystem_present(void) { + return true; +} diff --git a/supervisor/shared/flash.c b/supervisor/shared/flash.c new file mode 100644 index 0000000000000..6b1f24b4bcc11 --- /dev/null +++ b/supervisor/shared/flash.c @@ -0,0 +1,182 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/flash.h" + +#include "extmod/vfs_fat.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#define VFS_INDEX 0 + +#define PART1_START_BLOCK (0x1) + +// there is a singleton Flash object +const mp_obj_type_t supervisor_flash_type; +STATIC const mp_obj_base_t supervisor_flash_obj = {&supervisor_flash_type}; + +STATIC mp_obj_t supervisor_flash_obj_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + // check arguments + mp_arg_check_num(n_args, kw_args, 0, 0, false); + + // return singleton object + return (mp_obj_t)&supervisor_flash_obj; +} + +uint32_t flash_get_block_count(void) { + return PART1_START_BLOCK + supervisor_flash_get_block_count(); +} + +static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { + buf[0] = boot; + + if (num_blocks == 0) { + buf[1] = 0; + buf[2] = 0; + buf[3] = 0; + } else { + buf[1] = 0xff; + buf[2] = 0xff; + buf[3] = 0xff; + } + + buf[4] = type; + + if (num_blocks == 0) { + buf[5] = 0; + buf[6] = 0; + buf[7] = 0; + } else { + buf[5] = 0xff; + buf[6] = 0xff; + buf[7] = 0xff; + } + + buf[8] = start_block; + buf[9] = start_block >> 8; + buf[10] = start_block >> 16; + buf[11] = start_block >> 24; + + buf[12] = num_blocks; + buf[13] = num_blocks >> 8; + buf[14] = num_blocks >> 16; + buf[15] = num_blocks >> 24; +} + +mp_uint_t flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { + if (block_num == 0) { + if (block_num > 1) { + return 1; // error + } + // fake the MBR so we can decide on our own partition table + + for (int i = 0; i < 446; i++) { + dest[i] = 0; + } + + build_partition(dest + 446, 0, 0x01 /* FAT12 */, PART1_START_BLOCK, supervisor_flash_get_block_count()); + build_partition(dest + 462, 0, 0, 0, 0); + build_partition(dest + 478, 0, 0, 0, 0); + build_partition(dest + 494, 0, 0, 0, 0); + + dest[510] = 0x55; + dest[511] = 0xaa; + + return 0; // ok + + } + return supervisor_flash_read_blocks(dest, block_num - PART1_START_BLOCK, num_blocks); +} + +mp_uint_t flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + if (block_num == 0) { + if (num_blocks > 1) { + return 1; // error + } + // can't write MBR, but pretend we did + return 0; + } else { + return supervisor_flash_write_blocks(src, block_num - PART1_START_BLOCK, num_blocks); + } +} + +STATIC mp_obj_t supervisor_flash_obj_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE); + mp_uint_t ret = flash_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); + return MP_OBJ_NEW_SMALL_INT(ret); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(supervisor_flash_obj_readblocks_obj, supervisor_flash_obj_readblocks); + +STATIC mp_obj_t supervisor_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) { + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ); + mp_uint_t ret = flash_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FILESYSTEM_BLOCK_SIZE); + return MP_OBJ_NEW_SMALL_INT(ret); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(supervisor_flash_obj_writeblocks_obj, supervisor_flash_obj_writeblocks); + +STATIC mp_obj_t supervisor_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { + mp_int_t cmd = mp_obj_get_int(cmd_in); + switch (cmd) { + case BP_IOCTL_INIT: supervisor_flash_init(); return MP_OBJ_NEW_SMALL_INT(0); + case BP_IOCTL_DEINIT: supervisor_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly + case BP_IOCTL_SYNC: supervisor_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); + case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(flash_get_block_count()); + case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(supervisor_flash_get_block_size()); + default: return mp_const_none; + } +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(supervisor_flash_obj_ioctl_obj, supervisor_flash_obj_ioctl); + +STATIC const mp_rom_map_elem_t supervisor_flash_obj_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&supervisor_flash_obj_readblocks_obj) }, + { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&supervisor_flash_obj_writeblocks_obj) }, + { MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&supervisor_flash_obj_ioctl_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(supervisor_flash_obj_locals_dict, supervisor_flash_obj_locals_dict_table); + +const mp_obj_type_t supervisor_flash_type = { + { &mp_type_type }, + .name = MP_QSTR_Flash, + .make_new = supervisor_flash_obj_make_new, + .locals_dict = (mp_obj_t)&supervisor_flash_obj_locals_dict, +}; + +void supervisor_flash_init_vfs(fs_user_mount_t *vfs) { + vfs->base.type = &mp_fat_vfs_type; + vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL; + vfs->fatfs.drv = vfs; + vfs->fatfs.part = 1; // flash filesystem lives on first partition + vfs->readblocks[0] = (mp_obj_t)&supervisor_flash_obj_readblocks_obj; + vfs->readblocks[1] = (mp_obj_t)&supervisor_flash_obj; + vfs->readblocks[2] = (mp_obj_t)flash_read_blocks; // native version + vfs->writeblocks[0] = (mp_obj_t)&supervisor_flash_obj_writeblocks_obj; + vfs->writeblocks[1] = (mp_obj_t)&supervisor_flash_obj; + vfs->writeblocks[2] = (mp_obj_t)flash_write_blocks; // native version + vfs->u.ioctl[0] = (mp_obj_t)&supervisor_flash_obj_ioctl_obj; + vfs->u.ioctl[1] = (mp_obj_t)&supervisor_flash_obj; +} diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c new file mode 100755 index 0000000000000..14c3b4979b829 --- /dev/null +++ b/supervisor/shared/memory.c @@ -0,0 +1,124 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/memory.h" +#include "supervisor/port.h" + +#include + +#include "supervisor/shared/display.h" + +#define CIRCUITPY_SUPERVISOR_ALLOC_COUNT 8 + +static supervisor_allocation allocations[CIRCUITPY_SUPERVISOR_ALLOC_COUNT]; +// We use uint32_t* to ensure word (4 byte) alignment. +uint32_t* low_address; +uint32_t* high_address; + +void memory_init(void) { + low_address = port_heap_get_bottom(); + high_address = port_heap_get_top(); +} + +void free_memory(supervisor_allocation* allocation) { + if (allocation == NULL) { + return; + } + int32_t index = 0; + bool found = false; + for (index = 0; index < CIRCUITPY_SUPERVISOR_ALLOC_COUNT; index++) { + found = allocation == &allocations[index]; + if (found) { + break; + } + } + if (!found) { + // Bad! + // TODO(tannewt): Add a way to escape into safe mode on error. + } + if (allocation->ptr == high_address) { + high_address += allocation->length / 4; + for (index++; index < CIRCUITPY_SUPERVISOR_ALLOC_COUNT; index++) { + if (allocations[index].ptr != NULL) { + break; + } + high_address += allocations[index].length / 4; + } + } else if (allocation->ptr + allocation->length / 4 == low_address) { + low_address = allocation->ptr; + for (index--; index >= 0; index--) { + if (allocations[index].ptr != NULL) { + break; + } + low_address -= allocations[index].length / 4; + } + } else { + // Freed memory isn't in the middle so skip updating bounds. The memory will be added to the + // middle when the memory to the inside is freed. + } + allocation->ptr = NULL; +} + +supervisor_allocation* allocate_remaining_memory(void) { + if (low_address == high_address) { + return NULL; + } + return allocate_memory((high_address - low_address) * 4, false); +} + +supervisor_allocation* allocate_memory(uint32_t length, bool high) { + if ((high_address - low_address) * 4 < (int32_t) length || length % 4 != 0) { + return NULL; + } + uint8_t index = 0; + int8_t direction = 1; + if (high) { + index = CIRCUITPY_SUPERVISOR_ALLOC_COUNT - 1; + direction = -1; + } + for (; index < CIRCUITPY_SUPERVISOR_ALLOC_COUNT; index += direction) { + if (allocations[index].ptr == NULL) { + break; + } + } + if (index >= CIRCUITPY_SUPERVISOR_ALLOC_COUNT) { + return NULL; + } + supervisor_allocation* alloc = &allocations[index]; + if (high) { + high_address -= length / 4; + alloc->ptr = high_address; + } else { + alloc->ptr = low_address; + low_address += length / 4; + } + alloc->length = length; + return alloc; +} + +void supervisor_move_memory(void) { + supervisor_display_move_memory(); +} diff --git a/supervisor/shared/micropython.c b/supervisor/shared/micropython.c new file mode 100644 index 0000000000000..245db11d4213f --- /dev/null +++ b/supervisor/shared/micropython.c @@ -0,0 +1,58 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "supervisor/serial.h" +#include "lib/oofatfs/ff.h" +#include "py/mpconfig.h" + +#include "supervisor/shared/status_leds.h" + +int mp_hal_stdin_rx_chr(void) { + for (;;) { + #ifdef MICROPY_VM_HOOK_LOOP + MICROPY_VM_HOOK_LOOP + #endif + if (serial_bytes_available()) { + toggle_rx_led(); + return serial_read(); + } + } +} + +void mp_hal_stdout_tx_strn(const char *str, size_t len) { + toggle_tx_led(); + + #ifdef CIRCUITPY_BOOT_OUTPUT_FILE + if (boot_output_file != NULL) { + UINT bytes_written = 0; + f_write(boot_output_file, str, len, &bytes_written); + } + #endif + + serial_write_substring(str, len); +} diff --git a/supervisor/shared/rgb_led_colors.h b/supervisor/shared/rgb_led_colors.h index cab7029811f3b..c723fbab36580 100644 --- a/supervisor/shared/rgb_led_colors.h +++ b/supervisor/shared/rgb_led_colors.h @@ -1,12 +1,18 @@ -#define BLACK 0x000000 -#define GREEN 0x003000 -#define BLUE 0x000030 -#define CYAN 0x003030 -#define RED 0x300000 -#define ORANGE 0x302000 -#define YELLOW 0x303000 -#define PURPLE 0x300030 -#define WHITE 0x303030 + +#define COLOR(r, g, b) (((r) << 16) | ((g) << 8) | (b)) +// For brightness == 255 (full). This will be adjusted downward for various different RGB indicators, +// which vary in brightness. +#define INTENSITY (0x30) + +#define BLACK COLOR(0, 0, 0) +#define GREEN COLOR(0, INTENSITY, 0) +#define BLUE COLOR(0, 0, INTENSITY) +#define CYAN COLOR(0, INTENSITY, INTENSITY) +#define RED COLOR(INTENSITY, 0, 0) +#define ORANGE COLOR(INTENSITY, INTENSITY*2/3, 0) +#define YELLOW COLOR(INTENSITY, INTENSITY, 0) +#define PURPLE COLOR(INTENSITY, 0, INTENSITY) +#define WHITE COLOR(INTENSITY, INTENSITY, INTENSITY) #define BOOT_RUNNING BLUE #define MAIN_RUNNING GREEN @@ -31,4 +37,5 @@ #define NAME_ERROR WHITE #define OS_ERROR ORANGE #define VALUE_ERROR PURPLE +#define MPY_ERROR BLUE #define OTHER_ERROR YELLOW diff --git a/supervisor/shared/rgb_led_status.c b/supervisor/shared/rgb_led_status.c index 5b55c1ba2d56a..f3c2106471f43 100644 --- a/supervisor/shared/rgb_led_status.c +++ b/supervisor/shared/rgb_led_status.c @@ -25,9 +25,9 @@ */ #include "mphalport.h" -#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Pin.h" #include "rgb_led_status.h" -#include "pins.h" +#include "supervisor/shared/tick.h" #ifdef MICROPY_HW_NEOPIXEL uint8_t rgb_status_brightness = 63; @@ -39,23 +39,70 @@ static digitalio_digitalinout_obj_t status_neopixel; #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) -uint8_t rgb_status_brightness = 255; -static uint8_t status_apa102_color[12] = {0, 0, 0, 0, 0xff, 0, 0, 0}; -#ifdef CIRCUITPY_BITBANG_APA102 +uint8_t rgb_status_brightness = 50; + +#define APA102_BUFFER_LENGTH 12 +static uint8_t status_apa102_color[APA102_BUFFER_LENGTH] = {0, 0, 0, 0, 0xff, 0, 0, 0, 0xff, 0xff, 0xff, 0xff}; + +#if CIRCUITPY_BITBANG_APA102 #include "shared-bindings/bitbangio/SPI.h" #include "shared-module/bitbangio/types.h" -static bitbangio_spi_obj_t status_apa102; +static bitbangio_spi_obj_t status_apa102 = { + .base = { + .type = &bitbangio_spi_type, + }, +}; #else #include "shared-bindings/busio/SPI.h" -busio_spi_obj_t status_apa102; +busio_spi_obj_t status_apa102 = { + .base = { + .type = &busio_spi_type, + }, +}; #endif #endif -#if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) +#if defined(CP_RGB_STATUS_R) || defined(CP_RGB_STATUS_G) || defined(CP_RGB_STATUS_B) +#define CP_RGB_STATUS_LED + +#include "shared-bindings/pulseio/PWMOut.h" +#include "shared-bindings/microcontroller/Pin.h" + +pulseio_pwmout_obj_t rgb_status_r = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; +pulseio_pwmout_obj_t rgb_status_g = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; +pulseio_pwmout_obj_t rgb_status_b = { + .base = { + .type = &pulseio_pwmout_type, + }, +}; + +uint8_t rgb_status_brightness = 0xFF; + +uint16_t status_rgb_color[3] = { + 0 /* red */, 0 /* green */, 0 /* blue */ +}; +#endif + +#if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) static uint32_t current_status_color = 0; #endif +static bool rgb_led_status_init_in_progress = false; void rgb_led_status_init() { + if (rgb_led_status_init_in_progress) { + // Avoid recursion. + return; + } + rgb_led_status_init_in_progress = true; + #ifdef MICROPY_HW_NEOPIXEL common_hal_digitalio_digitalinout_construct(&status_neopixel, MICROPY_HW_NEOPIXEL); // Pretend we aren't using the pins. digitalio.DigitalInOut @@ -64,61 +111,95 @@ void rgb_led_status_init() { common_hal_digitalio_digitalinout_switch_to_output(&status_neopixel, false, DRIVE_MODE_PUSH_PULL); #endif #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) - #ifdef CIRCUITPY_BITBANG_APA102 + #if CIRCUITPY_BITBANG_APA102 shared_module_bitbangio_spi_construct(&status_apa102, MICROPY_HW_APA102_SCK, MICROPY_HW_APA102_MOSI, - mp_const_none); + NULL); #else if (!common_hal_busio_spi_deinited(&status_apa102)) { - // Don't use spi_deinit because that leads to infinite - // recursion because reset_pin may call - // rgb_led_status_init. - spi_m_sync_disable(&status_apa102.spi_desc); + // This may call us recursively if common_hal_reset_pin() is called, + // The rgb_led_status_init_in_progress guard will prevent further recursion. + common_hal_busio_spi_deinit(&status_apa102); } common_hal_busio_spi_construct(&status_apa102, MICROPY_HW_APA102_SCK, MICROPY_HW_APA102_MOSI, - mp_const_none); + NULL); + common_hal_busio_spi_never_reset(&status_apa102); #endif // Pretend we aren't using the pins. bitbangio.SPI will // mark them as used. apa102_mosi_in_use = false; apa102_sck_in_use = false; - #ifdef CIRCUITPY_BITBANG_APA102 + #if CIRCUITPY_BITBANG_APA102 shared_module_bitbangio_spi_try_lock(&status_apa102); - shared_module_bitbangio_spi_configure(&status_apa102, 100000, 0, 1, 8); + // Use 1MHz for clock rate. Some APA102's are spec'd 800kHz-1200kHz, + // though many can run much faster. bitbang will probably run slower. + shared_module_bitbangio_spi_configure(&status_apa102, 1000000, 0, 0, 8); #else common_hal_busio_spi_try_lock(&status_apa102); - common_hal_busio_spi_configure(&status_apa102, 100000, 0, 1, 8); + common_hal_busio_spi_configure(&status_apa102, 1000000, 0, 0, 8); #endif #endif - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + + #if defined(CP_RGB_STATUS_LED) + if (common_hal_mcu_pin_is_free(CP_RGB_STATUS_R)) { + pwmout_result_t red_result = common_hal_pulseio_pwmout_construct(&rgb_status_r, CP_RGB_STATUS_R, 0, 50000, false); + + if (PWMOUT_OK == red_result) { + common_hal_pulseio_pwmout_never_reset(&rgb_status_r); + } + } + + if (common_hal_mcu_pin_is_free(CP_RGB_STATUS_G)) { + pwmout_result_t green_result = common_hal_pulseio_pwmout_construct(&rgb_status_g, CP_RGB_STATUS_G, 0, 50000, false); + + if (PWMOUT_OK == green_result) { + common_hal_pulseio_pwmout_never_reset(&rgb_status_g); + } + } + + if (common_hal_mcu_pin_is_free(CP_RGB_STATUS_B)) { + pwmout_result_t blue_result = common_hal_pulseio_pwmout_construct(&rgb_status_b, CP_RGB_STATUS_B, 0, 50000, false); + + if (PWMOUT_OK == blue_result) { + common_hal_pulseio_pwmout_never_reset(&rgb_status_b); + } + } + #endif + + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) // Force a write of the current status color. uint32_t rgb = current_status_color; - current_status_color = 0; + current_status_color = 0x1000000; // Not a valid color new_status_color(rgb); #endif + + rgb_led_status_init_in_progress = false; } void reset_status_led() { #ifdef MICROPY_HW_NEOPIXEL - reset_pin(MICROPY_HW_NEOPIXEL->pin); + common_hal_reset_pin(MICROPY_HW_NEOPIXEL); #endif #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) - reset_pin(MICROPY_HW_APA102_MOSI->pin); - reset_pin(MICROPY_HW_APA102_SCK->pin); + common_hal_reset_pin(MICROPY_HW_APA102_MOSI); + common_hal_reset_pin(MICROPY_HW_APA102_SCK); + #endif + #if defined(CP_RGB_STATUS_LED) + // TODO: Support sharing status LED with user. #endif } void new_status_color(uint32_t rgb) { - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) if (current_status_color == rgb) { return; } uint32_t rgb_adjusted = color_brightness(rgb, rgb_status_brightness); - current_status_color = rgb_adjusted; + current_status_color = rgb; #endif #ifdef MICROPY_HW_NEOPIXEL @@ -138,16 +219,36 @@ void new_status_color(uint32_t rgb) { status_apa102_color[6] = (rgb_adjusted >> 8) & 0xff; status_apa102_color[7] = (rgb_adjusted >> 16) & 0xff; - #ifdef CIRCUITPY_BITBANG_APA102 - shared_module_bitbangio_spi_write(&status_apa102, status_apa102_color, 8); + #if CIRCUITPY_BITBANG_APA102 + shared_module_bitbangio_spi_write(&status_apa102, status_apa102_color, APA102_BUFFER_LENGTH); #else - common_hal_busio_spi_write(&status_apa102, status_apa102_color, 8); + common_hal_busio_spi_write(&status_apa102, status_apa102_color, APA102_BUFFER_LENGTH); #endif #endif + + #if defined(CP_RGB_STATUS_LED) + uint8_t red_u8 = (rgb_adjusted >> 16) & 0xFF; + uint8_t green_u8 = (rgb_adjusted >> 8) & 0xFF; + uint8_t blue_u8 = rgb_adjusted & 0xFF; + + #if defined(CP_RGB_STATUS_INVERTED_PWM) + status_rgb_color[0] = (1 << 16) - 1 - ((uint16_t) (red_u8 << 8) + red_u8); + status_rgb_color[1] = (1 << 16) - 1 - ((uint16_t) (green_u8 << 8) + green_u8); + status_rgb_color[2] = (1 << 16) - 1 - ((uint16_t) (blue_u8 << 8) + blue_u8); + #else + status_rgb_color[0] = (uint16_t) (red_u8 << 8) + red_u8; + status_rgb_color[1] = (uint16_t) (green_u8 << 8) + green_u8; + status_rgb_color[2] = (uint16_t) (blue_u8 << 8) + blue_u8; + #endif + + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_r, status_rgb_color[0]); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_g, status_rgb_color[1]); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_b, status_rgb_color[2]); + #endif } void temp_status_color(uint32_t rgb) { - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) uint32_t rgb_adjusted = rgb; rgb_adjusted = color_brightness(rgb, rgb_status_brightness); #endif @@ -162,30 +263,77 @@ void temp_status_color(uint32_t rgb) { if (apa102_mosi_in_use || apa102_sck_in_use) { return; } - uint8_t colors[12] = {0, 0, 0, 0, 0xff, rgb_adjusted & 0xff, (rgb_adjusted >> 8) & 0xff, (rgb_adjusted >> 16) & 0xff, 0x0, 0x0, 0x0, 0x0}; - #ifdef CIRCUITPY_BITBANG_APA102 - shared_module_bitbangio_spi_write(&status_apa102, colors, 12); + uint8_t colors[APA102_BUFFER_LENGTH] = {0, 0, 0, 0, 0xff, rgb_adjusted & 0xff, (rgb_adjusted >> 8) & 0xff, (rgb_adjusted >> 16) & 0xff, 0xff, 0xff, 0xff, 0xff}; + #if CIRCUITPY_BITBANG_APA102 + shared_module_bitbangio_spi_write(&status_apa102, colors, APA102_BUFFER_LENGTH); #else - common_hal_busio_spi_write(&status_apa102, colors, 12); + common_hal_busio_spi_write(&status_apa102, colors, APA102_BUFFER_LENGTH); #endif #endif + #if defined(CP_RGB_STATUS_LED) + uint8_t red_u8 = (rgb_adjusted >> 16) & 0xFF; + uint8_t green_u8 = (rgb_adjusted >> 8) & 0xFF; + uint8_t blue_u8 = rgb_adjusted & 0xFF; + + uint16_t temp_status_color_rgb[3] = {0}; + + #if defined(CP_RGB_STATUS_INVERTED_PWM) + temp_status_color_rgb[0] = (1 << 16) - 1 - ((uint16_t) (red_u8 << 8) + red_u8); + temp_status_color_rgb[1] = (1 << 16) - 1 - ((uint16_t) (green_u8 << 8) + green_u8); + temp_status_color_rgb[2] = (1 << 16) - 1 - ((uint16_t) (blue_u8 << 8) + blue_u8); + #else + temp_status_color_rgb[0] = (uint16_t) (red_u8 << 8) + red_u8; + temp_status_color_rgb[1] = (uint16_t) (green_u8 << 8) + green_u8; + temp_status_color_rgb[2] = (uint16_t) (blue_u8 << 8) + blue_u8; + #endif + + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_r, temp_status_color_rgb[0]); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_g, temp_status_color_rgb[1]); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_b, temp_status_color_rgb[2]); + #endif } void clear_temp_status() { #ifdef MICROPY_HW_NEOPIXEL + if (neopixel_in_use) { + return; + } common_hal_neopixel_write(&status_neopixel, status_neopixel_color, 3); #endif #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) - #ifdef CIRCUITPY_BITBANG_APA102 - shared_module_bitbangio_spi_write(&status_apa102, status_apa102_color, 8); + if (apa102_mosi_in_use || apa102_sck_in_use) { + return; + } + #if CIRCUITPY_BITBANG_APA102 + shared_module_bitbangio_spi_write(&status_apa102, status_apa102_color, APA102_BUFFER_LENGTH); #else - common_hal_busio_spi_write(&status_apa102, status_apa102_color, 8); + common_hal_busio_spi_write(&status_apa102, status_apa102_color, APA102_BUFFER_LENGTH); #endif #endif + #if defined(CP_RGB_STATUS_LED) + + uint16_t red = 0; + uint16_t green = 0; + uint16_t blue = 0; + + #if defined(CP_RGB_STATUS_INVERTED_PWM) + red = (1 << 16) - 1 - status_rgb_color[0]; + green = (1 << 16) - 1 - status_rgb_color[1]; + blue = (1 << 16) - 1 - status_rgb_color[2]; + #else + red = status_rgb_color[0]; + green = status_rgb_color[1]; + blue = status_rgb_color[2]; + #endif + + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_r, red); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_g, green); + common_hal_pulseio_pwmout_set_duty_cycle(&rgb_status_b, blue); + #endif } uint32_t color_brightness(uint32_t color, uint8_t brightness) { - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) uint32_t result = ((color & 0xff0000) * brightness / 255) & 0xff0000; result += ((color & 0xff00) * brightness / 255) & 0xff00; result += ((color & 0xff) * brightness / 255) & 0xff; @@ -196,8 +344,14 @@ uint32_t color_brightness(uint32_t color, uint8_t brightness) { } void set_rgb_status_brightness(uint8_t level){ - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) rgb_status_brightness = level; + uint32_t current_color = current_status_color; + // Temporarily change the current color global to force the new_status_color call to update the + // LED. Usually duplicate calls of the same color are ignored without regard to brightness + // changes. + current_status_color = 0; + new_status_color(current_color); #endif } @@ -205,9 +359,9 @@ void prep_rgb_status_animation(const pyexec_result_t* result, bool found_main, safe_mode_t safe_mode, rgb_status_animation_t* status) { - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) new_status_color(ALL_DONE); - status->pattern_start = ticks_ms; + status->pattern_start = supervisor_ticks_ms32(); status->safe_mode = safe_mode; status->found_main = found_main; status->total_exception_cycle = 0; @@ -242,6 +396,8 @@ void prep_rgb_status_animation(const pyexec_result_t* result, status->exception_color = OS_ERROR; } else if (mp_obj_is_subclass_fast(result->exception_type, &mp_type_ValueError)) { status->exception_color = VALUE_ERROR; + } else if (mp_obj_is_subclass_fast(result->exception_type, &mp_type_MpyError)) { + status->exception_color = MPY_ERROR; } else { status->exception_color = OTHER_ERROR; } @@ -249,12 +405,12 @@ void prep_rgb_status_animation(const pyexec_result_t* result, } void tick_rgb_status_animation(rgb_status_animation_t* status) { - #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) - uint32_t tick_diff = ticks_ms - status->pattern_start; + #if defined(MICROPY_HW_NEOPIXEL) || (defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK)) || (defined(CP_RGB_STATUS_LED)) + uint32_t tick_diff = supervisor_ticks_ms32() - status->pattern_start; if (status->ok) { // All is good. Ramp ALL_DONE up and down. if (tick_diff > ALL_GOOD_CYCLE_MS) { - status->pattern_start = ticks_ms; + status->pattern_start = supervisor_ticks_ms32(); tick_diff = 0; } @@ -269,7 +425,7 @@ void tick_rgb_status_animation(rgb_status_animation_t* status) { } } else { if (tick_diff > status->total_exception_cycle) { - status->pattern_start = ticks_ms; + status->pattern_start = supervisor_ticks_ms32(); tick_diff = 0; } // First flash the file color. diff --git a/supervisor/shared/rgb_led_status.h b/supervisor/shared/rgb_led_status.h index 24e071aac1f39..e4e1981a21ff4 100644 --- a/supervisor/shared/rgb_led_status.h +++ b/supervisor/shared/rgb_led_status.h @@ -33,16 +33,18 @@ #include "lib/utils/pyexec.h" #include "supervisor/port.h" -#include "mpconfigport.h" +#include "py/mpconfig.h" #include "rgb_led_colors.h" +#include "supervisor/shared/safe_mode.h" + // Overall, the time module must be implemented. // To work with a DotStar, one must have MICROPY_HW_APA102_SCK and // MICROPY_HW_APA102_MOSI defined and bitbangio.SPI or busio.SPI implemented. // To work with a NeoPixel, one must have MICROPY_HW_NEOPIXEL defined and // neopixel_write implemented. -#if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) && !defined(CIRCUITPY_BITBANG_APA102) +#if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) && !CIRCUITPY_BITBANG_APA102 #include "common-hal/busio/SPI.h" extern busio_spi_obj_t status_apa102; #endif diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c new file mode 100644 index 0000000000000..c957aee5344ac --- /dev/null +++ b/supervisor/shared/safe_mode.c @@ -0,0 +1,168 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/safe_mode.h" + +#include "mphalport.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" + +#include "supervisor/serial.h" +#include "supervisor/shared/rgb_led_colors.h" +#include "supervisor/shared/rgb_led_status.h" +#include "supervisor/shared/translate.h" +#include "supervisor/shared/tick.h" + +#define SAFE_MODE_DATA_GUARD 0xad0000af +#define SAFE_MODE_DATA_GUARD_MASK 0xff0000ff + +static safe_mode_t current_safe_mode; + +safe_mode_t wait_for_safe_mode_reset(void) { + uint32_t reset_state = port_get_saved_word(); + safe_mode_t safe_mode = NO_SAFE_MODE; + if ((reset_state & SAFE_MODE_DATA_GUARD_MASK) == SAFE_MODE_DATA_GUARD) { + safe_mode = (reset_state & ~SAFE_MODE_DATA_GUARD_MASK) >> 8; + } + if (safe_mode != NO_SAFE_MODE) { + port_set_saved_word(SAFE_MODE_DATA_GUARD); + current_safe_mode = safe_mode; + return safe_mode; + } + port_set_saved_word(SAFE_MODE_DATA_GUARD | (MANUAL_SAFE_MODE << 8)); + // Wait for a while to allow for reset. + temp_status_color(SAFE_MODE); + #ifdef MICROPY_HW_LED_STATUS + digitalio_digitalinout_obj_t status_led; + common_hal_digitalio_digitalinout_construct(&status_led, MICROPY_HW_LED_STATUS); + common_hal_digitalio_digitalinout_switch_to_output(&status_led, true, DRIVE_MODE_PUSH_PULL); + #endif + uint64_t start_ticks = supervisor_ticks_ms64(); + uint64_t diff = 0; + while (diff < 700) { + #ifdef MICROPY_HW_LED_STATUS + // Blink on for 100, off for 100, on for 100, off for 100 and on for 200 + common_hal_digitalio_digitalinout_set_value(&status_led, diff > 100 && diff / 100 != 2 && diff / 100 != 4); + #endif + diff = supervisor_ticks_ms64() - start_ticks; + } + #ifdef MICROPY_HW_LED_STATUS + common_hal_digitalio_digitalinout_deinit(&status_led); + #endif + clear_temp_status(); + port_set_saved_word(SAFE_MODE_DATA_GUARD); + return NO_SAFE_MODE; +} + +void safe_mode_on_next_reset(safe_mode_t reason) { + port_set_saved_word(SAFE_MODE_DATA_GUARD | (reason << 8)); +} + +// Don't inline this so it's easy to break on it from GDB. +void __attribute__((noinline,)) reset_into_safe_mode(safe_mode_t reason) { + if (current_safe_mode > BROWNOUT && reason > BROWNOUT) { + while (true) { + // This very bad because it means running in safe mode didn't save us. Only ignore brownout + // because it may be due to a switch bouncing. + } + } + + safe_mode_on_next_reset(reason); + reset_cpu(); +} + + + +#define FILE_AN_ISSUE translate("\nPlease file an issue with the contents of your CIRCUITPY drive at \nhttps://github.com/adafruit/circuitpython/issues\n") + +void print_safe_mode_message(safe_mode_t reason) { + if (reason == NO_SAFE_MODE) { + return; + } + serial_write("\n"); + // Output a user safe mode string if it's set. + #ifdef BOARD_USER_SAFE_MODE + if (reason == USER_SAFE_MODE) { + serial_write_compressed(translate("You requested starting safe mode by ")); + serial_write(BOARD_USER_SAFE_MODE_ACTION); + serial_write_compressed(translate("\nTo exit, please reset the board without ")); + serial_write(BOARD_USER_SAFE_MODE_ACTION); + serial_write("\n"); + } else + #endif + switch (reason) { + case MANUAL_SAFE_MODE: + serial_write_compressed(translate("CircuitPython is in safe mode because you pressed the reset button during boot. Press again to exit safe mode.\n")); + return; + case PROGRAMMATIC_SAFE_MODE: + serial_write_compressed(translate("The `microcontroller` module was used to boot into safe mode. Press reset to exit safe mode.\n")); + return; + default: + break; + } + + serial_write_compressed(translate("You are in safe mode: something unanticipated happened.\n")); + switch (reason) { + case BROWNOUT: + serial_write_compressed(translate("The microcontroller's power dipped. Make sure your power supply provides\nenough power for the whole circuit and press reset (after ejecting CIRCUITPY).\n")); + return; + case HEAP_OVERWRITTEN: + serial_write_compressed(translate("The CircuitPython heap was corrupted because the stack was too small.\nPlease increase the stack size if you know how, or if not:")); + serial_write_compressed(FILE_AN_ISSUE); + return; + default: + break; + } + + serial_write_compressed(translate("CircuitPython core code crashed hard. Whoops!\n")); + switch (reason) { + case HARD_CRASH: + serial_write_compressed(translate("Crash into the HardFault_Handler.")); + return; + case MICROPY_NLR_JUMP_FAIL: + serial_write_compressed(translate("MicroPython NLR jump failed. Likely memory corruption.")); + return; + case MICROPY_FATAL_ERROR: + serial_write_compressed(translate("MicroPython fatal error.")); + break; + case GC_ALLOC_OUTSIDE_VM: + serial_write_compressed(translate("Attempted heap allocation when MicroPython VM not running.")); + break; + case NORDIC_SOFT_DEVICE_ASSERT: + serial_write_compressed(translate("Nordic Soft Device failure assertion.")); + break; + case FLASH_WRITE_FAIL: + serial_write_compressed(translate("Failed to write internal flash.")); + break; + case MEM_MANAGE: + serial_write_compressed(translate("Invalid memory access.")); + break; + default: + serial_write_compressed(translate("Unknown reason.")); + break; + } + serial_write_compressed(FILE_AN_ISSUE); +} diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h new file mode 100644 index 0000000000000..5b09c4b54320e --- /dev/null +++ b/supervisor/shared/safe_mode.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H +#define MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H + +typedef enum { + NO_SAFE_MODE = 0, + BROWNOUT, + HARD_CRASH, + USER_SAFE_MODE, + HEAP_OVERWRITTEN, + MANUAL_SAFE_MODE, + MICROPY_NLR_JUMP_FAIL, + MICROPY_FATAL_ERROR, + GC_ALLOC_OUTSIDE_VM, + PROGRAMMATIC_SAFE_MODE, + NORDIC_SOFT_DEVICE_ASSERT, + FLASH_WRITE_FAIL, + MEM_MANAGE, +} safe_mode_t; + +safe_mode_t wait_for_safe_mode_reset(void); + +void safe_mode_on_next_reset(safe_mode_t reason); +void reset_into_safe_mode(safe_mode_t reason); + +void print_safe_mode_message(safe_mode_t reason); + +#endif // MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H diff --git a/supervisor/shared/serial.c b/supervisor/shared/serial.c new file mode 100644 index 0000000000000..a61899576f57e --- /dev/null +++ b/supervisor/shared/serial.c @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/mpconfig.h" + +#include "supervisor/shared/display.h" +#include "shared-bindings/terminalio/Terminal.h" +#include "supervisor/serial.h" +#include "supervisor/usb.h" + +#include "tusb.h" + +void serial_init(void) { + usb_init(); +} + +bool serial_connected(void) { + return tud_cdc_connected(); +} + +char serial_read(void) { + return (char) tud_cdc_read_char(); +} + +bool serial_bytes_available(void) { + return tud_cdc_available() > 0; +} + +void serial_write_substring(const char* text, uint32_t length) { +#if CIRCUITPY_DISPLAYIO + int errcode; + common_hal_terminalio_terminal_write(&supervisor_terminal, (const uint8_t*) text, length, &errcode); +#endif + + uint32_t count = 0; + while (count < length && tud_cdc_connected()) { + count += tud_cdc_write(text + count, length - count); + usb_background(); + } +} + +void serial_write(const char* text) { + serial_write_substring(text, strlen(text)); +} diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c new file mode 100755 index 0000000000000..2b7b1c03a48d9 --- /dev/null +++ b/supervisor/shared/stack.c @@ -0,0 +1,96 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stack.h" + +#include "py/mpconfig.h" +#include "py/runtime.h" +#include "supervisor/cpu.h" +#include "supervisor/port.h" +#include "supervisor/shared/safe_mode.h" + +extern uint32_t _estack; + +static uint32_t next_stack_size = CIRCUITPY_DEFAULT_STACK_SIZE; +static uint32_t current_stack_size = 0; +supervisor_allocation* stack_alloc = NULL; + +#define EXCEPTION_STACK_SIZE 1024 + +void allocate_stack(void) { + mp_uint_t regs[10]; + mp_uint_t sp = cpu_get_regs_and_sp(regs); + + mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp; + + if (port_stack_get_top() != port_heap_get_top()) { + return; + } + + stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true); + if (stack_alloc == NULL) { + stack_alloc = allocate_memory(c_size + CIRCUITPY_DEFAULT_STACK_SIZE + EXCEPTION_STACK_SIZE, true); + current_stack_size = CIRCUITPY_DEFAULT_STACK_SIZE; + } else { + current_stack_size = next_stack_size; + } + *stack_alloc->ptr = STACK_CANARY_VALUE; +} + +inline bool stack_ok(void) { + return stack_alloc == NULL || *stack_alloc->ptr == STACK_CANARY_VALUE; +} + +inline void assert_heap_ok(void) { + if (!stack_ok()) { + reset_into_safe_mode(HEAP_OVERWRITTEN); + } +} + +void stack_init(void) { + allocate_stack(); +} + +void stack_resize(void) { + if (stack_alloc == NULL) { + return; + } + if (next_stack_size == current_stack_size) { + *stack_alloc->ptr = STACK_CANARY_VALUE; + return; + } + free_memory(stack_alloc); + stack_alloc = NULL; + allocate_stack(); +} + +void set_next_stack_size(uint32_t size) { + next_stack_size = size; +} + +uint32_t get_current_stack_size(void) { + return current_stack_size; +} diff --git a/supervisor/shared/stack.h b/supervisor/shared/stack.h new file mode 100755 index 0000000000000..1fb43be573bb6 --- /dev/null +++ b/supervisor/shared/stack.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_STACK_H +#define MICROPY_INCLUDED_SUPERVISOR_STACK_H + +#include + +#include "supervisor/memory.h" + +extern supervisor_allocation* stack_alloc; + +void stack_init(void); +void stack_resize(void); +void set_next_stack_size(uint32_t size); +uint32_t get_current_stack_size(void); +bool stack_ok(void); + +// Use this after any calls into a library which may use a lot of stack. This will raise a Python +// exception when the stack has likely overwritten a portion of the heap. +void assert_heap_ok(void); + +#define STACK_CANARY_VALUE 0x017829ef + +#endif // MICROPY_INCLUDED_SUPERVISOR_STACK_H diff --git a/supervisor/shared/status_leds.c b/supervisor/shared/status_leds.c new file mode 100644 index 0000000000000..672242a963651 --- /dev/null +++ b/supervisor/shared/status_leds.c @@ -0,0 +1,64 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/status_leds.h" + +#if CIRCUITPY_DIGITALIO +#include "common-hal/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#endif + +#ifdef MICROPY_HW_LED_RX +digitalio_digitalinout_obj_t rx_led; +#endif + +#ifdef MICROPY_HW_LED_TX +digitalio_digitalinout_obj_t tx_led; +#endif + +void init_status_leds(void) { + #ifdef MICROPY_HW_LED_RX + common_hal_digitalio_digitalinout_construct(&rx_led, MICROPY_HW_LED_RX); + common_hal_digitalio_digitalinout_switch_to_output(&rx_led, true, DRIVE_MODE_PUSH_PULL); + #endif + #ifdef MICROPY_HW_LED_TX + common_hal_digitalio_digitalinout_construct(&tx_led, MICROPY_HW_LED_TX); + common_hal_digitalio_digitalinout_switch_to_output(&tx_led, true, DRIVE_MODE_PUSH_PULL); + #endif +} + +void toggle_rx_led(void) { + #ifdef MICROPY_HW_LED_RX + common_hal_digitalio_digitalinout_set_value(&rx_led, !common_hal_digitalio_digitalinout_get_value(&rx_led)); + #endif +} + + +void toggle_tx_led(void) { + #ifdef MICROPY_HW_LED_TX + common_hal_digitalio_digitalinout_set_value(&tx_led, !common_hal_digitalio_digitalinout_get_value(&tx_led)); + #endif +} diff --git a/supervisor/shared/status_leds.h b/supervisor/shared/status_leds.h new file mode 100644 index 0000000000000..30132753f39ff --- /dev/null +++ b/supervisor/shared/status_leds.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_STATUS_LEDS_H +#define MICROPY_INCLUDED_SUPERVISOR_STATUS_LEDS_H + +void init_status_leds(void); + +void toggle_rx_led(void); + +void toggle_tx_led(void); + +#endif // MICROPY_INCLUDED_SUPERVISOR_STATUS_LEDS_H diff --git a/supervisor/shared/tick.c b/supervisor/shared/tick.c new file mode 100644 index 0000000000000..5668f8fa101b4 --- /dev/null +++ b/supervisor/shared/tick.c @@ -0,0 +1,96 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/tick.h" + +#include "supervisor/linker.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/autoreload.h" + +static volatile uint64_t PLACE_IN_DTCM_BSS(ticks_ms); +static volatile uint32_t PLACE_IN_DTCM_BSS(background_ticks_ms32); + +#if CIRCUITPY_GAMEPAD +#include "shared-module/gamepad/__init__.h" +#endif + +#if CIRCUITPY_GAMEPADSHIFT +#include "shared-module/gamepadshift/__init__.h" +#endif + +#include "shared-bindings/microcontroller/__init__.h" + +void supervisor_tick(void) { + + ticks_ms ++; + +#if CIRCUITPY_FILESYSTEM_FLUSH_INTERVAL_MS > 0 + filesystem_tick(); +#endif +#ifdef CIRCUITPY_AUTORELOAD_DELAY_MS + autoreload_tick(); +#endif +#ifdef CIRCUITPY_GAMEPAD_TICKS + if (!(ticks_ms & CIRCUITPY_GAMEPAD_TICKS)) { + #if CIRCUITPY_GAMEPAD + gamepad_tick(); + #endif + #if CIRCUITPY_GAMEPADSHIFT + gamepadshift_tick(); + #endif + } +#endif +} + +uint64_t supervisor_ticks_ms64() { + uint64_t result; + common_hal_mcu_disable_interrupts(); + result = ticks_ms; + common_hal_mcu_enable_interrupts(); + return result; +} + +uint32_t supervisor_ticks_ms32() { + return ticks_ms; +} + +extern void run_background_tasks(void); + +void PLACE_IN_ITCM(supervisor_run_background_tasks_if_tick)() { + uint32_t now32 = ticks_ms; + + if (now32 == background_ticks_ms32) { + return; + } + background_ticks_ms32 = now32; + + run_background_tasks(); +} + +void supervisor_fake_tick() { + uint32_t now32 = ticks_ms; + background_ticks_ms32 = (now32 - 1); +} diff --git a/supervisor/shared/tick.h b/supervisor/shared/tick.h new file mode 100644 index 0000000000000..7ce8281ba9d7d --- /dev/null +++ b/supervisor/shared/tick.h @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __INCLUDED_SUPERVISOR_TICK_H +#define __INCLUDED_SUPERVISOR_TICK_H + +#include + +/** @brief To be called once every ms + * + * The port must call supervisor_tick once per millisecond to perform regular tasks. + * This is called from the SysTick interrupt or similar, and is safe to call in an + * interrupt context. + */ +extern void supervisor_tick(void); +/** @brief Cause background tasks to be called soon + * + * Normally, background tasks are only run once per tick. For other cases where + * an event noticed from an interrupt context needs to be completed by a background + * task activity, the interrupt can call supervisor_fake_tick. + */ +extern void supervisor_fake_tick(void); +/** @brief Get the lower 32 bits of the time in milliseconds + * + * This can be more efficient than supervisor_ticks_ms64, for sites where a wraparound + * of ~49.5 days is not harmful. + */ +extern uint32_t supervisor_ticks_ms32(void); +/** @brief Get the full time in milliseconds + * + * Because common ARM mcus cannot atomically work with 64-bit quantities, this + * function must briefly disable interrupts in order to return the value. If + * only relative durations of less than about ~49.5 days need to be considered, + * then it may be possible to use supervisor_ticks_ms64 instead. + */ +extern uint64_t supervisor_ticks_ms64(void); +/** @brief Run background ticks, but only about every millisecond. + * + * Normally, this is not called directly. Instead use the RUN_BACKGROUND_TASKS + * macro. + */ +extern void supervisor_run_background_if_tick(void); + +#endif diff --git a/supervisor/shared/translate.c b/supervisor/shared/translate.c new file mode 100644 index 0000000000000..187d5ff8a5b28 --- /dev/null +++ b/supervisor/shared/translate.c @@ -0,0 +1,107 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/translate.h" + +#include +#include +#include + +#ifndef NO_QSTR +#include "genhdr/compression.generated.h" +#endif + +#include "supervisor/serial.h" + +void serial_write_compressed(const compressed_string_t* compressed) { + char decompressed[compressed->length]; + decompress(compressed, decompressed); + serial_write(decompressed); +} + +STATIC int put_utf8(char *buf, int u) { + if(u <= 0x7f) { + *buf = u; + return 1; + } else if(u <= 0x07ff) { + *buf++ = 0b11000000 | (u >> 6); + *buf = 0b10000000 | (u & 0b00111111); + return 2; + } else { // u <= 0xffff) + *buf++ = 0b11000000 | (u >> 12); + *buf = 0b10000000 | ((u >> 6) & 0b00111111); + *buf = 0b10000000 | (u & 0b00111111); + return 3; + } +} + +char* decompress(const compressed_string_t* compressed, char* decompressed) { + uint8_t this_byte = 0; + uint8_t this_bit = 7; + uint8_t b = compressed->data[this_byte]; + // Stop one early because the last byte is always NULL. + for (uint16_t i = 0; i < compressed->length - 1;) { + uint32_t bits = 0; + uint8_t bit_length = 0; + uint32_t max_code = lengths[0]; + uint32_t searched_length = lengths[0]; + while (true) { + bits <<= 1; + if ((0x80 & b) != 0) { + bits |= 1; + } + b <<= 1; + bit_length += 1; + if (this_bit == 0) { + this_bit = 7; + this_byte += 1; + b = compressed->data[this_byte]; // This may read past the end but its never used. + } else { + this_bit -= 1; + } + if (max_code > 0 && bits < max_code) { + break; + } + max_code = (max_code << 1) + lengths[bit_length]; + searched_length += lengths[bit_length]; + } + i += put_utf8(decompressed + i, values[searched_length + bits - max_code]); + } + + decompressed[compressed->length-1] = '\0'; + return decompressed; +} + +inline __attribute__((always_inline)) const compressed_string_t* translate(const char* original) { + #ifndef NO_QSTR + #define QDEF(id, str) + #define TRANSLATION(id, len, compressed...) if (strcmp(original, id) == 0) { static const compressed_string_t v = {.length = len, .data = compressed}; return &v; } else + #include "genhdr/qstrdefs.generated.h" + #undef TRANSLATION + #undef QDEF + #endif + return NULL; +} diff --git a/supervisor/shared/translate.h b/supervisor/shared/translate.h new file mode 100644 index 0000000000000..5e8acbb6afacf --- /dev/null +++ b/supervisor/shared/translate.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_TRANSLATE_H +#define MICROPY_INCLUDED_SUPERVISOR_TRANSLATE_H + +#include + +typedef struct { + uint16_t length; + const uint8_t data[]; +} compressed_string_t; + +const compressed_string_t* translate(const char* c); +void serial_write_compressed(const compressed_string_t* compressed); +char* decompress(const compressed_string_t* compressed, char* decompressed); + +#endif // MICROPY_INCLUDED_SUPERVISOR_TRANSLATE_H diff --git a/supervisor/shared/usb/tusb_config.h b/supervisor/shared/usb/tusb_config.h new file mode 100644 index 0000000000000..ad5825b6c9361 --- /dev/null +++ b/supervisor/shared/usb/tusb_config.h @@ -0,0 +1,117 @@ +/**************************************************************************/ +/*! + @file tusb_config.h + @author hathach (tinyusb.org) + + @section LICENSE + + Software License Agreement (BSD License) + + Copyright (c) 2013, hathach (tinyusb.org) + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 3. Neither the name of the copyright holders nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ +/**************************************************************************/ + +#ifndef _TUSB_CONFIG_H_ +#define _TUSB_CONFIG_H_ + +#include "genhdr/autogen_usb_descriptor.h" + +#ifdef __cplusplus + extern "C" { +#endif + +//--------------------------------------------------------------------+ +// COMMON CONFIGURATION +//--------------------------------------------------------------------+ +#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE + +#define CFG_TUSB_DEBUG 0 + +/*------------- RTOS -------------*/ +#define CFG_TUSB_OS OPT_OS_NONE +//#define CFG_TUD_TASK_QUEUE_SZ 16 +//#define CFG_TUD_TASK_PRIO 0 +//#define CFG_TUD_TASK_STACK_SZ 150 + +//--------------------------------------------------------------------+ +// DEVICE CONFIGURATION +//--------------------------------------------------------------------+ + +#define CFG_TUD_ENDOINT0_SIZE 64 + +/*------------- Descriptors -------------*/ +/* Enable auto generated descriptor, tinyusb will try its best to create + * descriptor ( device, configuration, hid ) that matches enabled CFG_* in this file + * + * Note: All CFG_TUD_DESC_* are relevant only if CFG_TUD_DESC_AUTO is enabled + */ +#define CFG_TUD_DESC_AUTO 0 + +//------------- CLASS -------------// +#define CFG_TUD_CDC 1 +#define CFG_TUD_MSC 1 +#define CFG_TUD_HID 1 +#define CFG_TUD_MIDI 1 +#define CFG_TUD_CUSTOM_CLASS 0 + +/*------------------------------------------------------------------*/ +/* CLASS DRIVER + *------------------------------------------------------------------*/ + +/* TX is sent automatically on every Start of Frame event ~ 1ms. + * If not enabled, application must call tud_cdc_flush() periodically + * Note: Enabled this could overflow device task, if it does, define + * CFG_TUD_TASK_QUEUE_SZ with large value + */ +#define CFG_TUD_CDC_FLUSH_ON_SOF 0 + + +/*------------- MSC -------------*/ +// Number of supported Logical Unit Number (At least 1) +#define CFG_TUD_MSC_MAXLUN 1 + +// Number of Blocks +#define CFG_TUD_MSC_BLOCK_NUM (256*1024)/512 + + + +// Product revision string included in Inquiry response, max 4 bytes +#define CFG_TUD_MSC_PRODUCT_REV "1.0" + + +//--------------------------------------------------------------------+ +// USB RAM PLACEMENT +//--------------------------------------------------------------------+ +#define CFG_TUSB_ATTR_USBRAM +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) + + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_CONFIG_H_ */ diff --git a/supervisor/shared/usb/usb.c b/supervisor/shared/usb/usb.c new file mode 100644 index 0000000000000..a0178528d857c --- /dev/null +++ b/supervisor/shared/usb/usb.c @@ -0,0 +1,145 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" +#include "py/objstr.h" +#include "shared-bindings/microcontroller/Processor.h" +#include "shared-module/usb_midi/__init__.h" +#include "supervisor/port.h" +#include "supervisor/usb.h" +#include "lib/utils/interrupt_char.h" +#include "lib/mp-readline/readline.h" + +#include "tusb.h" + +// Serial number as hex characters. This writes directly to the USB +// descriptor. +extern uint16_t usb_serial_number[1 + COMMON_HAL_MCU_PROCESSOR_UID_LENGTH * 2]; + +void load_serial_number(void) { + // create serial number based on device unique id + uint8_t raw_id[COMMON_HAL_MCU_PROCESSOR_UID_LENGTH]; + common_hal_mcu_processor_get_uid(raw_id); + + for (int i = 0; i < COMMON_HAL_MCU_PROCESSOR_UID_LENGTH; i++) { + for (int j = 0; j < 2; j++) { + uint8_t nibble = (raw_id[i] >> (j * 4)) & 0xf; + // Strings are UTF-16-LE encoded. + usb_serial_number[1 + i * 2 + j] = nibble_to_hex_upper[nibble]; + } + } +} + +bool usb_enabled(void) { + return tusb_inited(); +} + +void usb_init(void) { + init_usb_hardware(); + load_serial_number(); + + tusb_init(); + +#if MICROPY_KBD_EXCEPTION + // Set Ctrl+C as wanted char, tud_cdc_rx_wanted_cb() callback will be invoked when Ctrl+C is received + // This callback always got invoked regardless of mp_interrupt_char value since we only set it once here + tud_cdc_set_wanted_char(CHAR_CTRL_C); +#endif + +#if CIRCUITPY_USB_MIDI + usb_midi_init(); +#endif +} + +void usb_background(void) { + if (usb_enabled()) { + tud_task(); + tud_cdc_write_flush(); + } +} + +//--------------------------------------------------------------------+ +// tinyusb callbacks +//--------------------------------------------------------------------+ + +// Invoked when device is mounted +void tud_mount_cb(void) { + usb_msc_mount(); +} + +// Invoked when device is unmounted +void tud_umount_cb(void) { + usb_msc_umount(); +} + +// Invoked when usb bus is suspended +// remote_wakeup_en : if host allows us to perform remote wakeup +// USB Specs: Within 7ms, device must draw an average current less than 2.5 mA from bus +void tud_suspend_cb(bool remote_wakeup_en) { +} + +// Invoked when usb bus is resumed +void tud_resume_cb(void) { +} + +// Invoked when cdc when line state changed e.g connected/disconnected +// Use to reset to DFU when disconnect with 1200 bps +void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) { + (void) itf; // interface ID, not used + + // DTR = false is counted as disconnected + if ( !dtr ) + { + cdc_line_coding_t coding; + tud_cdc_get_line_coding(&coding); + + if ( coding.bit_rate == 1200 ) + { + reset_to_bootloader(); + } + } +} + +#if MICROPY_KBD_EXCEPTION + +/** + * Callback invoked when received an "wanted" char. + * @param itf Interface index (for multiple cdc interfaces) + * @param wanted_char The wanted char (set previously) + */ +void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) +{ + (void) itf; // not used + + // Workaround for using lib/utils/interrupt_char.c + // Compare mp_interrupt_char with wanted_char and ignore if not matched + if (mp_interrupt_char == wanted_char) { + tud_cdc_read_flush(); // flush read fifo + mp_keyboard_interrupt(); + } +} + +#endif diff --git a/supervisor/shared/usb/usb_desc.c b/supervisor/shared/usb/usb_desc.c new file mode 100644 index 0000000000000..9b333d6fea30a --- /dev/null +++ b/supervisor/shared/usb/usb_desc.c @@ -0,0 +1,58 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "lib/tinyusb/src/tusb.h" +#include "shared-module/usb_hid/Device.h" + +#include "genhdr/autogen_usb_descriptor.h" + +// Invoked when received GET DEVICE DESCRIPTOR +// Application return pointer to descriptor +uint8_t const * tud_descriptor_device_cb(void) { + return usb_desc_dev; +} + +// Invoked when received GET CONFIGURATION DESCRIPTOR +// Application return pointer to descriptor +// Descriptor contents must exist long enough for transfer to complete +uint8_t const * tud_descriptor_configuration_cb(uint8_t index) { + (void) index; // for multiple configurations + return usb_desc_cfg; +} + +// Invoked when received GET HID REPORT DESCRIPTOR +// Application return pointer to descriptor +// Descriptor contents must exist long enough for transfer to complete +uint8_t const * tud_hid_descriptor_report_cb(void) { + return hid_report_descriptor; +} + +// Invoked when received GET STRING DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +uint16_t const* tud_descriptor_string_cb(uint8_t index) { + uint8_t const max_index = sizeof(string_desc_arr)/sizeof(string_desc_arr[0]); + return (index < max_index) ? string_desc_arr[index] : NULL; +} diff --git a/supervisor/shared/usb/usb_msc_flash.c b/supervisor/shared/usb/usb_msc_flash.c new file mode 100644 index 0000000000000..7532b6aead524 --- /dev/null +++ b/supervisor/shared/usb/usb_msc_flash.c @@ -0,0 +1,253 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tusb.h" +// // #include "supervisor/flash.h" + +// For updating fatfs's cache +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "lib/oofatfs/diskio.h" +#include "lib/oofatfs/ff.h" +#include "py/mpstate.h" + +#include "supervisor/filesystem.h" +#include "supervisor/shared/autoreload.h" + +#define MSC_FLASH_BLOCK_SIZE 512 + +static bool ejected[1] = {true}; + +void usb_msc_mount(void) { + // Reset the ejection tracking every time we're plugged into USB. This allows for us to battery + // power the device, eject, unplug and plug it back in to get the drive. + for (uint8_t i = 0; i < sizeof(ejected); i++) { + ejected[i] = false; + } +} + +void usb_msc_umount(void) { + +} + +bool usb_msc_ejected(void) { + bool all_ejected = true; + for (uint8_t i = 0; i < sizeof(ejected); i++) { + all_ejected &= ejected[i]; + } + return all_ejected; +} + +// The root FS is always at the end of the list. +static fs_user_mount_t* get_vfs(int lun) { + // TODO(tannewt): Return the mount which matches the lun where 0 is the end + // and is counted in reverse. + if (lun > 0) { + return NULL; + } + mp_vfs_mount_t* current_mount = MP_STATE_VM(vfs_mount_table); + if (current_mount == NULL) { + return NULL; + } + while (current_mount->next != NULL) { + current_mount = current_mount->next; + } + return current_mount->obj; +} + +// Callback invoked when received an SCSI command not in built-in list below +// - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, TEST_UNIT_READY, START_STOP_UNIT, MODE_SENSE6, REQUEST_SENSE +// - READ10 and WRITE10 have their own callbacks +int32_t tud_msc_scsi_cb (uint8_t lun, const uint8_t scsi_cmd[16], void* buffer, uint16_t bufsize) { + const void* response = NULL; + int32_t resplen = 0; + + switch ( scsi_cmd[0] ) { + case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL: + // Host is about to read/write etc ... better not to disconnect disk + resplen = 0; + break; + + default: + // Set Sense = Invalid Command Operation + tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00); + + // negative means error -> tinyusb could stall and/or response with failed status + resplen = -1; + break; + } + + // return len must not larger than bufsize + if ( resplen > bufsize ) { + resplen = bufsize; + } + + // copy response to stack's buffer if any + if ( response && (resplen > 0) ) { + memcpy(buffer, response, resplen); + } + + return resplen; +} + +void tud_msc_capacity_cb(uint8_t lun, uint32_t* block_count, uint16_t* block_size) { + fs_user_mount_t * vfs = get_vfs(lun); + disk_ioctl(vfs, GET_SECTOR_COUNT, block_count); + disk_ioctl(vfs, GET_SECTOR_SIZE, block_size); +} + +bool tud_msc_is_writable_cb(uint8_t lun) { + if (lun > 1) { + return false; + } + + fs_user_mount_t* vfs = get_vfs(lun); + if (vfs == NULL) { + return false; + } + if (vfs->writeblocks[0] == MP_OBJ_NULL || !filesystem_is_writable_by_usb(vfs)) { + return false; + } + return true; +} + +// Callback invoked when received READ10 command. +// Copy disk's data to buffer (up to bufsize) and return number of copied bytes. +int32_t tud_msc_read10_cb (uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize) { + (void) lun; + (void) offset; + + const uint32_t block_count = bufsize / MSC_FLASH_BLOCK_SIZE; + + fs_user_mount_t * vfs = get_vfs(lun); + disk_read(vfs, buffer, lba, block_count); + + return block_count * MSC_FLASH_BLOCK_SIZE; +} + +// Callback invoked when received WRITE10 command. +// Process data in buffer to disk's storage and return number of written bytes +int32_t tud_msc_write10_cb (uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) { + (void) lun; + (void) offset; + + const uint32_t block_count = bufsize / MSC_FLASH_BLOCK_SIZE; + + fs_user_mount_t * vfs = get_vfs(lun); + disk_write(vfs, buffer, lba, block_count); + // Since by getting here we assume the mount is read-only to + // MicroPython let's update the cached FatFs sector if it's the one + // we just wrote. + #if _MAX_SS != _MIN_SS + if (vfs->ssize == MSC_FLASH_BLOCK_SIZE) { + #else + // The compiler can optimize this away. + if (_MAX_SS == FILESYSTEM_BLOCK_SIZE) { + #endif + if (lba == vfs->fatfs.winsect && lba > 0) { + memcpy(vfs->fatfs.win, + buffer + MSC_FLASH_BLOCK_SIZE * (vfs->fatfs.winsect - lba), + MSC_FLASH_BLOCK_SIZE); + } + } + + return block_count * MSC_FLASH_BLOCK_SIZE; +} + +// Callback invoked when WRITE10 command is completed (status received and accepted by host). +// used to flush any pending cache. +void tud_msc_write10_complete_cb (uint8_t lun) { + (void) lun; + + // This write is complete, start the autoreload clock. + autoreload_start(); +} + +// Invoked when received SCSI_CMD_INQUIRY +// Application fill vendor id, product id and revision with string up to 8, 16, 4 characters respectively +void tud_msc_inquiry_cb(uint8_t lun, uint8_t vendor_id[8], uint8_t product_id[16], uint8_t product_rev[4]) { + (void) lun; + + memcpy(vendor_id , CFG_TUD_MSC_VENDOR , strlen(CFG_TUD_MSC_VENDOR)); + memcpy(product_id , CFG_TUD_MSC_PRODUCT , strlen(CFG_TUD_MSC_PRODUCT)); + memcpy(product_rev, CFG_TUD_MSC_PRODUCT_REV, strlen(CFG_TUD_MSC_PRODUCT_REV)); +} + +// Invoked when received Test Unit Ready command. +// return true allowing host to read/write this LUN e.g SD card inserted +bool tud_msc_test_unit_ready_cb(uint8_t lun) { + if (lun > 1) { + return false; + } + + fs_user_mount_t* current_mount = get_vfs(lun); + if (current_mount == NULL) { + return false; + } + if (ejected[lun]) { + // Set 0x3a for media not present. + tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00); + return false; + } + + return true; +} + +// Invoked when received Start Stop Unit command +// - Start = 0 : stopped power mode, if load_eject = 1 : unload disk storage +// - Start = 1 : active mode, if load_eject = 1 : load disk storage +bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject) { + if (lun > 1) { + return false; + } + fs_user_mount_t* current_mount = get_vfs(lun); + if (current_mount == NULL) { + return false; + } + if (load_eject) { + if (!start) { + // Eject but first flush. + if (disk_ioctl(current_mount, CTRL_SYNC, NULL) != RES_OK) { + return false; + } else { + ejected[lun] = true; + } + } else { + // We can only load if it hasn't been ejected. + return !ejected[lun]; + } + } else { + if (!start) { + // Stop the unit but don't eject. + if (disk_ioctl(current_mount, CTRL_SYNC, NULL) != RES_OK) { + return false; + } + } + // Always start the unit, even if ejected. Whether media is present is a separate check. + } + + return true; +} diff --git a/ports/atmel-samd/external_flash/spi_flash_api.h b/supervisor/spi_flash_api.h similarity index 82% rename from ports/atmel-samd/external_flash/spi_flash_api.h rename to supervisor/spi_flash_api.h index a6df0c4595d98..f59346e25a858 100644 --- a/ports/atmel-samd/external_flash/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,13 +23,17 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SPI_FLASH_H -#define MICROPY_INCLUDED_ATMEL_SAMD_SPI_FLASH_H +#ifndef MICROPY_INCLUDED_SUPERVISOR_SPI_FLASH_H +#define MICROPY_INCLUDED_SUPERVISOR_SPI_FLASH_H #include #include -#include "external_flash/devices.h" +#include "supervisor/shared/external_flash/devices.h" + +#include "shared-bindings/busio/SPI.h" + +extern busio_spi_obj_t supervisor_flash_spi_bus; //Used to share SPI bus on some boards // This API is implemented for both normal SPI peripherals and QSPI peripherals. @@ -42,4 +46,4 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t data_length); void spi_flash_init(void); void spi_flash_init_device(const external_flash_device* device); -#endif // MICROPY_INCLUDED_ATMEL_SAMD_SPI_FLASH_H +#endif // MICROPY_INCLUDED_SUPERVISOR_SPI_FLASH_H diff --git a/supervisor/stub/filesystem.c b/supervisor/stub/filesystem.c index 12fe9fb10951b..1c4a3e12dda83 100644 --- a/supervisor/stub/filesystem.c +++ b/supervisor/stub/filesystem.c @@ -26,13 +26,17 @@ #include "supervisor/filesystem.h" -void filesystem_init(void) { +void filesystem_init(bool create_allowed, bool force_create) { + (void) create_allowed; + (void) force_create; } void filesystem_flush(void) { } -void filesystem_writable_by_python(bool writable) { +bool filesystem_is_writable_by_python(fs_user_mount_t *vfs) { + (void) vfs; + return true; } bool filesystem_present(void) { diff --git a/supervisor/stub/internal_flash.c b/supervisor/stub/internal_flash.c new file mode 100644 index 0000000000000..5db6b5bc00792 --- /dev/null +++ b/supervisor/stub/internal_flash.c @@ -0,0 +1,66 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/internal_flash.h" + +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +void supervisor_flash_init(void) { +} + +uint32_t supervisor_flash_get_block_size(void) { + return 0; +} + +uint32_t supervisor_flash_get_block_count(void) { + return 0; +} + +void supervisor_flash_flush(void) { +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + return 0; // success +} + +bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { + return true; +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/supervisor/stub/safe_mode.c b/supervisor/stub/safe_mode.c new file mode 100644 index 0000000000000..1a792becd917e --- /dev/null +++ b/supervisor/stub/safe_mode.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/safe_mode.h" + +safe_mode_t wait_for_safe_mode_reset(void) { + return NO_SAFE_MODE; +} + +void reset_into_safe_mode(safe_mode_t reason) { + (void) reason; +} + +void print_safe_mode_message(safe_mode_t reason) { + (void) reason; +} diff --git a/supervisor/stub/serial.c b/supervisor/stub/serial.c index 4f0e11873a2db..9565519141c01 100644 --- a/supervisor/stub/serial.c +++ b/supervisor/stub/serial.c @@ -43,4 +43,5 @@ bool serial_bytes_available(void) { } void serial_write(const char* text) { + (void) text; } diff --git a/supervisor/stub/stack.c b/supervisor/stub/stack.c new file mode 100644 index 0000000000000..9a9ecd32f6f8e --- /dev/null +++ b/supervisor/stub/stack.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/stack.h" + +bool stack_ok(void) { + return true; +} + +void assert_heap_ok(void) { +} + +void stack_init(void) { +} + +void stack_resize(void) { +} + +void set_next_stack_size(uint32_t size) { + (void) size; +} + +uint32_t get_current_stack_size(void) { + return 0; +} diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index c56557197c37c..52d60b52b3aed 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -2,18 +2,197 @@ SRC_SUPERVISOR = \ main.c \ supervisor/port.c \ supervisor/shared/autoreload.c \ - supervisor/shared/rgb_led_status.c + supervisor/shared/board.c \ + supervisor/shared/display.c \ + supervisor/shared/filesystem.c \ + supervisor/shared/flash.c \ + supervisor/shared/micropython.c \ + supervisor/shared/rgb_led_status.c \ + supervisor/shared/safe_mode.c \ + supervisor/shared/stack.c \ + supervisor/shared/status_leds.c \ + supervisor/shared/tick.c \ + supervisor/shared/translate.c -ifeq ($(wildcard atmel-samd/supervisor/filesystem.c),) - SRC_SUPERVISOR += supervisor/filesystem.c +ifndef $(NO_USB) + NO_USB = $(wildcard supervisor/usb.c) +endif + +ifndef INTERNAL_FLASH_FILESYSTEM +INTERNAL_FLASH_FILESYSTEM = 0 +endif +CFLAGS += -DINTERNAL_FLASH_FILESYSTEM=$(INTERNAL_FLASH_FILESYSTEM) + +ifndef QSPI_FLASH_FILESYSTEM +QSPI_FLASH_FILESYSTEM = 0 +endif +CFLAGS += -DQSPI_FLASH_FILESYSTEM=$(QSPI_FLASH_FILESYSTEM) + +ifndef SPI_FLASH_FILESYSTEM +SPI_FLASH_FILESYSTEM = 0 +endif +CFLAGS += -DSPI_FLASH_FILESYSTEM=$(SPI_FLASH_FILESYSTEM) + +ifeq ($(CIRCUITPY_BLEIO),1) + SRC_SUPERVISOR += supervisor/shared/bluetooth.c +endif + +# Choose which flash filesystem impl to use. +# (Right now INTERNAL_FLASH_FILESYSTEM and (Q)SPI_FLASH_FILESYSTEM are mutually exclusive. +# But that might not be true in the future.) +ifdef EXTERNAL_FLASH_DEVICES + CFLAGS += -DEXTERNAL_FLASH_DEVICES=$(EXTERNAL_FLASH_DEVICES) \ + -DEXTERNAL_FLASH_DEVICE_COUNT=$(EXTERNAL_FLASH_DEVICE_COUNT) + + SRC_SUPERVISOR += supervisor/shared/external_flash/external_flash.c + ifeq ($(SPI_FLASH_FILESYSTEM),1) + SRC_SUPERVISOR += supervisor/shared/external_flash/spi_flash.c + else + endif + ifeq ($(QSPI_FLASH_FILESYSTEM),1) + SRC_SUPERVISOR += supervisor/qspi_flash.c supervisor/shared/external_flash/qspi_flash.c + endif else - SRC_SUPERVISOR += supervisor/stub/filesystem.c + ifeq ($(DISABLE_FILESYSTEM),1) + SRC_SUPERVISOR += supervisor/stub/internal_flash.c + else + SRC_SUPERVISOR += supervisor/internal_flash.c + endif endif -ifeq ($(wildcard atmel-samd/supervisor/serial.c),) - SRC_SUPERVISOR += supervisor/serial.c +ifeq ($(USB),FALSE) + ifeq ($(wildcard supervisor/serial.c),) + SRC_SUPERVISOR += supervisor/stub/serial.c + else + SRC_SUPERVISOR += supervisor/serial.c + endif else - SRC_SUPERVISOR += supervisor/stub/serial.c + SRC_SUPERVISOR += \ + lib/tinyusb/src/common/tusb_fifo.c \ + lib/tinyusb/src/device/usbd.c \ + lib/tinyusb/src/device/usbd_control.c \ + lib/tinyusb/src/class/msc/msc_device.c \ + lib/tinyusb/src/class/cdc/cdc_device.c \ + lib/tinyusb/src/class/hid/hid_device.c \ + lib/tinyusb/src/class/midi/midi_device.c \ + lib/tinyusb/src/tusb.c \ + supervisor/shared/serial.c \ + supervisor/usb.c \ + supervisor/shared/usb/usb_desc.c \ + supervisor/shared/usb/usb.c \ + supervisor/shared/usb/usb_msc_flash.c \ + shared-bindings/usb_hid/__init__.c \ + shared-bindings/usb_hid/Device.c \ + shared-bindings/usb_midi/__init__.c \ + shared-bindings/usb_midi/PortIn.c \ + shared-bindings/usb_midi/PortOut.c \ + shared-module/usb_hid/__init__.c \ + shared-module/usb_hid/Device.c \ + shared-module/usb_midi/__init__.c \ + shared-module/usb_midi/PortIn.c \ + shared-module/usb_midi/PortOut.c \ + $(BUILD)/autogen_usb_descriptor.c + + CFLAGS += -DUSB_AVAILABLE +endif + +ifndef USB_INTERFACE_NAME +USB_INTERFACE_NAME = "CircuitPython" +endif + +ifndef USB_DEVICES +USB_DEVICES = "CDC,MSC,AUDIO,HID" +endif + +ifndef USB_HID_DEVICES +USB_HID_DEVICES = "KEYBOARD,MOUSE,CONSUMER,GAMEPAD" +endif + +ifndef USB_MSC_MAX_PACKET_SIZE +USB_MSC_MAX_PACKET_SIZE = 64 +endif + +ifndef USB_CDC_EP_NUM_NOTIFICATION +USB_CDC_EP_NUM_NOTIFICATION = 0 +endif + +ifndef USB_CDC_EP_NUM_DATA_OUT +USB_CDC_EP_NUM_DATA_OUT = 0 endif -SUPERVISOR_O = $(addprefix $(BUILD)/, $(SRC_SUPERVISOR:.c=.o)) +ifndef USB_CDC_EP_NUM_DATA_IN +USB_CDC_EP_NUM_DATA_IN = 0 +endif + +ifndef USB_MSC_EP_NUM_OUT +USB_MSC_EP_NUM_OUT = 0 +endif + +ifndef USB_MSC_EP_NUM_IN +USB_MSC_EP_NUM_IN = 0 +endif + +ifndef USB_HID_EP_NUM_OUT +USB_HID_EP_NUM_OUT = 0 +endif + +ifndef USB_HID_EP_NUM_IN +USB_HID_EP_NUM_IN = 0 +endif + +ifndef USB_MIDI_EP_NUM_OUT +USB_MIDI_EP_NUM_OUT = 0 +endif + +ifndef USB_MIDI_EP_NUM_IN +USB_MIDI_EP_NUM_IN = 0 +endif + +USB_DESCRIPTOR_ARGS = \ + --manufacturer $(USB_MANUFACTURER)\ + --product $(USB_PRODUCT)\ + --vid $(USB_VID)\ + --pid $(USB_PID)\ + --serial_number_length $(USB_SERIAL_NUMBER_LENGTH)\ + --interface_name $(USB_INTERFACE_NAME)\ + --devices $(USB_DEVICES)\ + --hid_devices $(USB_HID_DEVICES)\ + --msc_max_packet_size $(USB_MSC_MAX_PACKET_SIZE)\ + --cdc_ep_num_notification $(USB_CDC_EP_NUM_NOTIFICATION)\ + --cdc_ep_num_data_out $(USB_CDC_EP_NUM_DATA_OUT)\ + --cdc_ep_num_data_in $(USB_CDC_EP_NUM_DATA_IN)\ + --msc_ep_num_out $(USB_MSC_EP_NUM_OUT)\ + --msc_ep_num_in $(USB_MSC_EP_NUM_IN)\ + --hid_ep_num_out $(USB_HID_EP_NUM_OUT)\ + --hid_ep_num_in $(USB_HID_EP_NUM_IN)\ + --midi_ep_num_out $(USB_MIDI_EP_NUM_OUT)\ + --midi_ep_num_in $(USB_MIDI_EP_NUM_IN)\ + --output_c_file $(BUILD)/autogen_usb_descriptor.c\ + --output_h_file $(BUILD)/genhdr/autogen_usb_descriptor.h + +ifeq ($(USB_RENUMBER_ENDPOINTS), 0) +USB_DESCRIPTOR_ARGS += --no-renumber_endpoints +endif + +SUPERVISOR_O = $(addprefix $(BUILD)/, $(SRC_SUPERVISOR:.c=.o)) $(BUILD)/autogen_display_resources.o + +$(BUILD)/supervisor/shared/translate.o: $(HEADER_BUILD)/qstrdefs.generated.h + +$(BUILD)/autogen_usb_descriptor.c $(BUILD)/genhdr/autogen_usb_descriptor.h: autogen_usb_descriptor.intermediate + +.INTERMEDIATE: autogen_usb_descriptor.intermediate + +autogen_usb_descriptor.intermediate: ../../tools/gen_usb_descriptor.py Makefile | $(HEADER_BUILD) + $(STEPECHO) "GEN $@" + $(Q)install -d $(BUILD)/genhdr + $(Q)$(PYTHON3) ../../tools/gen_usb_descriptor.py $(USB_DESCRIPTOR_ARGS) + +CIRCUITPY_DISPLAY_FONT ?= "../../tools/fonts/ter-u12n.bdf" + +$(BUILD)/autogen_display_resources.c: ../../tools/gen_display_resources.py $(HEADER_BUILD)/qstrdefs.generated.h Makefile | $(HEADER_BUILD) + $(STEPECHO) "GEN $@" + $(Q)install -d $(BUILD)/genhdr + $(Q)$(PYTHON3) ../../tools/gen_display_resources.py \ + --font $(CIRCUITPY_DISPLAY_FONT) \ + --sample_file $(HEADER_BUILD)/qstrdefs.generated.h \ + --output_c_file $(BUILD)/autogen_display_resources.c diff --git a/supervisor/usb.h b/supervisor/usb.h new file mode 100644 index 0000000000000..29280c725bb09 --- /dev/null +++ b/supervisor/usb.h @@ -0,0 +1,49 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 hathach for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_USB_H +#define MICROPY_INCLUDED_SUPERVISOR_USB_H + +#include + +// Ports must call this as frequently as they can in order to keep the USB connection +// alive and responsive. +void usb_background(void); + +// Only inits the USB peripheral clocks and pins. The peripheral will be initialized by +// TinyUSB. +void init_usb_hardware(void); + +// Shared implementation. +bool usb_enabled(void); +void usb_init(void); + +// Propagate plug/unplug events to the MSC logic. +void usb_msc_mount(void); +void usb_msc_umount(void); +bool usb_msc_ejected(void); + +#endif // MICROPY_INCLUDED_SUPERVISOR_USB_H diff --git a/tests/basics/bigint_array_overflow.py b/tests/basics/bigint_array_overflow.py new file mode 100644 index 0000000000000..0dd79c23d5925 --- /dev/null +++ b/tests/basics/bigint_array_overflow.py @@ -0,0 +1,28 @@ +import skip_if +skip_if.no_bigint() + +try: + from array import array +except ImportError: + print("SKIP") + raise SystemExit + +def test_array_overflow(typecode, val): + try: + print(array(typecode, [val])) + except OverflowError: + print('OverflowError') + +# big int -1 +test_array_overflow('Q', -2**64 // 2**64) +test_array_overflow('L', -2**64 // 2**64) +test_array_overflow('I', -2**64 // 2**64) +test_array_overflow('H', -2**64 // 2**64) +test_array_overflow('B', -2**64 // 2**64) + +# big int 2**63 +test_array_overflow('q', 2**63) +test_array_overflow('l', 2**63) +test_array_overflow('i', 2**63) +test_array_overflow('h', 2**63) +test_array_overflow('b', 2**63) diff --git a/tests/basics/builtin_abs_intbig.py b/tests/basics/builtin_abs_intbig.py index 3dd5ea89fae0f..8afb7fc691027 100644 --- a/tests/basics/builtin_abs_intbig.py +++ b/tests/basics/builtin_abs_intbig.py @@ -7,3 +7,7 @@ # edge cases for 32 and 64 bit archs (small int overflow when negating) print(abs(-0x3fffffff - 1)) print(abs(-0x3fffffffffffffff - 1)) + +# edge case for nan-boxing with 47-bit small int +i = -0x3fffffffffff +print(abs(i - 1)) diff --git a/tests/basics/builtin_compile.py b/tests/basics/builtin_compile.py index 32c6667d8b1af..bf272aca15d43 100644 --- a/tests/basics/builtin_compile.py +++ b/tests/basics/builtin_compile.py @@ -46,3 +46,4 @@ def test(): test() else: print("SKIP") + raise SystemExit diff --git a/tests/basics/builtin_dir.py b/tests/basics/builtin_dir.py index 16e7e669e42da..c15a76f4c6d30 100644 --- a/tests/basics/builtin_dir.py +++ b/tests/basics/builtin_dir.py @@ -17,3 +17,22 @@ def __init__(self): print('__init__' in dir(foo)) print('x' in dir(foo)) +# dir of subclass +class A: + def a(): + pass +class B(A): + def b(): + pass +d = dir(B()) +print(d.count('a'), d.count('b')) + +# dir of class with multiple bases and a common parent +class C(A): + def c(): + pass +class D(B, C): + def d(): + pass +d = dir(D()) +print(d.count('a'), d.count('b'), d.count('c'), d.count('d')) diff --git a/tests/basics/builtin_enumerate.py b/tests/basics/builtin_enumerate.py new file mode 100644 index 0000000000000..29b1dd46c40ea --- /dev/null +++ b/tests/basics/builtin_enumerate.py @@ -0,0 +1,17 @@ +print(list(enumerate([]))) +print(list(enumerate([1, 2, 3]))) +print(list(enumerate([1, 2, 3], 5))) +print(list(enumerate([1, 2, 3], -5))) +print(list(enumerate(range(100)))) + +# specifying args with keywords +print(list(enumerate([1, 2, 3], start=1))) +print(list(enumerate(iterable=[1, 2, 3]))) +print(list(enumerate(iterable=[1, 2, 3], start=1))) + +# check handling of extra positional args (exercises some logic in mp_arg_parse_all) +# don't print anything because it doesn't error with MICROPY_CPYTHON_COMPAT disabled +try: + enumerate([], 1, 2) +except TypeError: + pass diff --git a/tests/basics/builtin_eval.py b/tests/basics/builtin_eval.py index 8b9d02e61bcb2..9b49a2015f4f6 100644 --- a/tests/basics/builtin_eval.py +++ b/tests/basics/builtin_eval.py @@ -1,5 +1,11 @@ # builtin eval +try: + eval +except NameError: + print("SKIP") + raise SystemExit + eval('1 + 2') eval('1 + 2\n') eval('1 + 2\n\n#comment\n') diff --git a/tests/basics/builtin_eval_error.py b/tests/basics/builtin_eval_error.py index 671eedab659e4..ef0a32da0facb 100644 --- a/tests/basics/builtin_eval_error.py +++ b/tests/basics/builtin_eval_error.py @@ -1,5 +1,11 @@ # test if eval raises SyntaxError +try: + eval +except NameError: + print("SKIP") + raise SystemExit + try: print(eval("[1,,]")) except SyntaxError: diff --git a/tests/basics/builtin_exec.py b/tests/basics/builtin_exec.py index fd4e65c539b35..2e417a43a51a5 100644 --- a/tests/basics/builtin_exec.py +++ b/tests/basics/builtin_exec.py @@ -1,3 +1,11 @@ +# test builtin exec + +try: + exec +except NameError: + print("SKIP") + raise SystemExit + print(exec("def foo(): return 42")) print(foo()) diff --git a/tests/basics/filter.py b/tests/basics/builtin_filter.py similarity index 100% rename from tests/basics/filter.py rename to tests/basics/builtin_filter.py diff --git a/tests/basics/getattr1.py b/tests/basics/builtin_getattr.py similarity index 100% rename from tests/basics/getattr1.py rename to tests/basics/builtin_getattr.py diff --git a/tests/basics/builtin_hasattr.py b/tests/basics/builtin_hasattr.py new file mode 100644 index 0000000000000..c60033b963f8d --- /dev/null +++ b/tests/basics/builtin_hasattr.py @@ -0,0 +1,46 @@ +class A: + + var = 132 + + def __init__(self): + self.var2 = 34 + + def meth(self, i): + return 42 + i + + +a = A() +print(hasattr(a, "var")) +print(hasattr(a, "var2")) +print(hasattr(a, "meth")) +print(hasattr(a, "_none_such")) +print(hasattr(list, "foo")) + +class C: + + def __getattr__(self, attr): + if attr == "exists": + return attr + elif attr == "raise": + raise Exception(123) + raise AttributeError + +c = C() +print(hasattr(c, "exists")) +print(hasattr(c, "doesnt_exist")) + +# ensure that non-AttributeError exceptions propagate out of hasattr +try: + hasattr(c, "raise") +except Exception as er: + print(er) + +try: + hasattr(1, b'123') +except TypeError: + print('TypeError') + +try: + hasattr(1, 123) +except TypeError: + print('TypeError') diff --git a/tests/basics/builtin_hash_intbig.py b/tests/basics/builtin_hash_intbig.py index 0092c0f3ad322..df51f72abbd4d 100644 --- a/tests/basics/builtin_hash_intbig.py +++ b/tests/basics/builtin_hash_intbig.py @@ -8,3 +8,6 @@ class F: def __hash__(self): return 1 << 70 | 1 print(hash(F()) != 0) + +# this had a particular error with internal integer arithmetic of hash function +print(hash(6699999999999999999999999999999999999999999999999999999999999999999999) != 0) diff --git a/tests/basics/builtin_locals.py b/tests/basics/builtin_locals.py index 3689216ef671d..e60759a40e12e 100644 --- a/tests/basics/builtin_locals.py +++ b/tests/basics/builtin_locals.py @@ -2,3 +2,12 @@ x = 123 print(locals()['x']) + +class A: + y = 1 + def f(self): + pass + + print('x' in locals()) + print(locals()['y']) + print('f' in locals()) diff --git a/tests/basics/map.py b/tests/basics/builtin_map.py similarity index 100% rename from tests/basics/map.py rename to tests/basics/builtin_map.py diff --git a/tests/basics/builtin_pow3.py b/tests/basics/builtin_pow3.py index 69b57e54849d9..b9e0b8e04602c 100644 --- a/tests/basics/builtin_pow3.py +++ b/tests/basics/builtin_pow3.py @@ -7,6 +7,12 @@ print("SKIP") raise SystemExit +# test some edge cases +print(pow(1, 1, 1)) +print(pow(0, 1, 1)) +print(pow(1, 0, 1)) +print(pow(1, 0, 2)) + # 3 arg pow is defined to only work on integers try: print(pow("x", 5, 6)) @@ -22,3 +28,8 @@ print(pow(4, 5, "z")) except TypeError: print("TypeError expected") + +try: + print(pow(4, 5, 0)) +except ValueError: + print("ValueError expected") diff --git a/tests/basics/print.py b/tests/basics/builtin_print.py similarity index 100% rename from tests/basics/print.py rename to tests/basics/builtin_print.py diff --git a/tests/basics/builtin_property.py b/tests/basics/builtin_property.py index 89c3d49364e25..4b08ee9d3b5a0 100644 --- a/tests/basics/builtin_property.py +++ b/tests/basics/builtin_property.py @@ -105,3 +105,9 @@ class E: # not tested for because the other keyword arguments are not accepted # q = property(fget=lambda self: 21, doc="Half the truth.") print(E().p) + +# a property as an instance member should not be delegated to +class F: + def __init__(self): + self.prop_member = property() +print(type(F().prop_member)) diff --git a/tests/basics/builtin_property_inherit.py b/tests/basics/builtin_property_inherit.py new file mode 100644 index 0000000000000..27a0913935118 --- /dev/null +++ b/tests/basics/builtin_property_inherit.py @@ -0,0 +1,53 @@ +# test builtin property combined with inheritance +try: + property +except: + print("SKIP") + raise SystemExit + +# test property in a base class works for derived classes +class A: + @property + def x(self): + print('A x') + return 123 +class B(A): + pass +class C(B): + pass +class D: + pass +class E(C, D): + pass +print(A().x) +print(B().x) +print(C().x) +print(E().x) + +# test that we can add a property to base class after creation +class F: + pass +F.foo = property(lambda self: print('foo get')) +class G(F): + pass +F().foo +G().foo + +# should be able to add a property to already-subclassed class because it already has one +F.bar = property(lambda self: print('bar get')) +F().bar +G().bar + +# test case where class (H here) is already subclassed before adding attributes +class H: + pass +class I(H): + pass + +# should be able to add a normal member to already-subclassed class +H.val = 2 +print(I().val) + +# should be able to add a property to the derived class +I.baz = property(lambda self: print('baz get')) +I().baz diff --git a/tests/basics/builtin_range.py b/tests/basics/builtin_range.py index 0e2fabd82e39c..66226bad16a6d 100644 --- a/tests/basics/builtin_range.py +++ b/tests/basics/builtin_range.py @@ -38,6 +38,9 @@ print(range(100, 1, -5)[5:15:3]) print(range(100, 1, -5)[15:5:-3]) +# for this case uPy gives a different stop value but the listed elements are still correct +print(list(range(7, -2, -4)[2:-2:])) + # zero step try: range(1, 2, 0) diff --git a/tests/basics/builtin_range_binop.py b/tests/basics/builtin_range_binop.py new file mode 100644 index 0000000000000..e4e054c276350 --- /dev/null +++ b/tests/basics/builtin_range_binop.py @@ -0,0 +1,32 @@ +# test binary operations on range objects; (in)equality only + +# this "feature test" actually tests the implementation but is the best we can do +if range(1) != range(1): + print("SKIP") + raise SystemExit + +# basic (in)equality +print(range(1) == range(1)) +print(range(1) != range(1)) +print(range(1) != range(2)) + +# empty range +print(range(0) == range(0)) +print(range(1, 0) == range(0)) +print(range(1, 4, -1) == range(6, 3)) + +# 1 element range +print(range(1, 4, 10) == range(1, 4, 10)) +print(range(1, 4, 10) == range(1, 4, 20)) +print(range(1, 4, 10) == range(1, 8, 20)) + +# more than 1 element +print(range(0, 3, 2) == range(0, 3, 2)) +print(range(0, 3, 2) == range(0, 4, 2)) +print(range(0, 3, 2) == range(0, 5, 2)) + +# unsupported binary op +try: + range(1) + 10 +except TypeError: + print('TypeError') diff --git a/tests/basics/builtin_round_int.py b/tests/basics/builtin_round_int.py new file mode 100644 index 0000000000000..a2017622a74d7 --- /dev/null +++ b/tests/basics/builtin_round_int.py @@ -0,0 +1,18 @@ +# test round() with integer values and second arg + +# rounding integers is an optional feature so test for it +try: + round(1, -1) +except NotImplementedError: + print('SKIP') + raise SystemExit + +tests = [ + (1, False), (1, True), + (124, -1), (125, -1), (126, -1), + (5, -1), (15, -1), (25, -1), + (12345, 0), (12345, -1), (12345, 1), + (-1234, 0), (-1234, -1), (-1234, 1), +] +for t in tests: + print(round(*t)) diff --git a/tests/basics/builtin_round_intbig.py b/tests/basics/builtin_round_intbig.py new file mode 100644 index 0000000000000..adf9d29f2f10c --- /dev/null +++ b/tests/basics/builtin_round_intbig.py @@ -0,0 +1,17 @@ +# test round() with large integer values and second arg + +# rounding integers is an optional feature so test for it +try: + round(1, -1) +except NotImplementedError: + print('SKIP') + raise SystemExit + +i = 2**70 + +tests = [ + (i, 0), (i, -1), (i, -10), (i, 1), + (-i, 0), (-i, -1), (-i, -10), (-i, 1), +] +for t in tests: + print(round(*t)) diff --git a/tests/basics/builtin_setattr.py b/tests/basics/builtin_setattr.py new file mode 100644 index 0000000000000..e4acb14cac354 --- /dev/null +++ b/tests/basics/builtin_setattr.py @@ -0,0 +1,25 @@ +class A: + + var = 132 + + def __init__(self): + self.var2 = 34 + + +a = A() +setattr(a, "var", 123) +setattr(a, "var2", 56) +print(a.var) +print(a.var2) + +try: + setattr(a, b'var3', 1) +except TypeError: + print('TypeError') + +# try setattr on a built-in function +try: + setattr(int, 'to_bytes', 1) +except (AttributeError, TypeError): + # uPy raises AttributeError, CPython raises TypeError + print('AttributeError/TypeError') diff --git a/tests/basics/builtin_type.py b/tests/basics/builtin_type.py index 83c45c64b9ad8..c5fb36626cc0a 100644 --- a/tests/basics/builtin_type.py +++ b/tests/basics/builtin_type.py @@ -11,3 +11,21 @@ type(1, 2) except TypeError: print('TypeError') + +# second arg should be a tuple +try: + type('abc', None, None) +except TypeError: + print('TypeError') + +# third arg should be a dict +try: + type('abc', (), None) +except TypeError: + print('TypeError') + +# elements of second arg (the bases) should be types +try: + type('abc', (1,), {}) +except TypeError: + print('TypeError') diff --git a/tests/basics/zip.py b/tests/basics/builtin_zip.py similarity index 100% rename from tests/basics/zip.py rename to tests/basics/builtin_zip.py diff --git a/tests/basics/bytes.py b/tests/basics/bytes.py index 1d97e6b16f746..0b6b14fa55bb2 100644 --- a/tests/basics/bytes.py +++ b/tests/basics/bytes.py @@ -56,3 +56,9 @@ print(bytes([128, 255])) # For sequence of unknown len print(bytes(iter([128, 255]))) + +# Shouldn't be able to make bytes with negative length +try: + bytes(-1) +except ValueError: + print('ValueError') diff --git a/tests/basics/class_bytes.py b/tests/basics/class_bytes.py new file mode 100644 index 0000000000000..75e2e7244e739 --- /dev/null +++ b/tests/basics/class_bytes.py @@ -0,0 +1,9 @@ +class C1: + def __init__(self, value): + self.value = value + + def __bytes__(self): + return self.value + +c1 = C1(b"class 1") +print(bytes(c1)) diff --git a/tests/basics/class_descriptor.py b/tests/basics/class_descriptor.py index eb88ba7b9caec..54f386230fec1 100644 --- a/tests/basics/class_descriptor.py +++ b/tests/basics/class_descriptor.py @@ -27,8 +27,8 @@ class Main: r = m.Forward if 'Descriptor' in repr(r.__class__): print('SKIP') -else: - print(r) - m.Forward = 'a' - del m.Forward + raise SystemExit +print(r) +m.Forward = 'a' +del m.Forward diff --git a/tests/basics/class_inherit_mul.py b/tests/basics/class_inherit_mul.py index 23476132ba6ed..4a43a7f410045 100644 --- a/tests/basics/class_inherit_mul.py +++ b/tests/basics/class_inherit_mul.py @@ -1,3 +1,5 @@ +# test multiple inheritance of user classes + class A: def __init__(self, x): print('A init', x) @@ -30,6 +32,9 @@ def __init__(self): def g(self): print(self.x) +print(issubclass(Sub, A)) +print(issubclass(Sub, B)) + o = Sub() print(o.x) o.f() diff --git a/tests/basics/class_store_class.py b/tests/basics/class_store_class.py index 8f3e542d111e2..504f460a7d2e4 100644 --- a/tests/basics/class_store_class.py +++ b/tests/basics/class_store_class.py @@ -5,11 +5,8 @@ try: from collections import namedtuple except ImportError: - try: - from ucollections import namedtuple - except ImportError: - print("SKIP") - raise SystemExit + print("SKIP") + raise SystemExit import skip_if skip_if.no_cpython_compat() diff --git a/tests/basics/class_super.py b/tests/basics/class_super.py index 1338ef4523208..629b7ddb48604 100644 --- a/tests/basics/class_super.py +++ b/tests/basics/class_super.py @@ -34,3 +34,27 @@ def foo(self): print(super().bar) # accessing attribute after super() return super().foo().count(2) # calling a subsequent method print(B().foo()) + +try: + super(1, 1).x +except TypeError: + print(True) +else: + print(False) + +# first arg to super must be a type +try: + super(1, 1) +except TypeError: + print('TypeError') + +# store/delete of super attribute not allowed +assert hasattr(super(B, B()), 'foo') +try: + super(B, B()).foo = 1 +except AttributeError: + print('AttributeError') +try: + del super(B, B()).foo +except AttributeError: + print('AttributeError') diff --git a/tests/basics/class_super_multinherit.py b/tests/basics/class_super_multinherit.py new file mode 100644 index 0000000000000..642a73ce1aa0a --- /dev/null +++ b/tests/basics/class_super_multinherit.py @@ -0,0 +1,16 @@ +# test super with multiple inheritance + +class A: + def foo(self): + print('A.foo') + +class B: + def foo(self): + print('B.foo') + +class C(A, B): + def foo(self): + print('C.foo') + super().foo() + +C().foo() diff --git a/tests/basics/del_attr.py b/tests/basics/del_attr.py index bec7afb8483c7..8487b97e311d0 100644 --- a/tests/basics/del_attr.py +++ b/tests/basics/del_attr.py @@ -30,3 +30,10 @@ def f(): del c.x except AttributeError: print("AttributeError") + +# try to del an attribute of a built-in class +try: + del int.to_bytes +except (AttributeError, TypeError): + # uPy raises AttributeError, CPython raises TypeError + print('AttributeError/TypeError') diff --git a/tests/basics/deque1.py b/tests/basics/deque1.py new file mode 100644 index 0000000000000..19966fcb07871 --- /dev/null +++ b/tests/basics/deque1.py @@ -0,0 +1,68 @@ +try: + try: + from ucollections import deque + except ImportError: + from collections import deque +except ImportError: + print("SKIP") + raise SystemExit + + +d = deque((), 2) +print(len(d)) +print(bool(d)) + +try: + d.popleft() +except IndexError: + print("IndexError") + +print(d.append(1)) +print(len(d)) +print(bool(d)) +print(d.popleft()) +print(len(d)) + +d.append(2) +print(d.popleft()) + +d.append(3) +d.append(4) +print(len(d)) +print(d.popleft(), d.popleft()) +try: + d.popleft() +except IndexError: + print("IndexError") + +d.append(5) +d.append(6) +d.append(7) +print(len(d)) +print(d.popleft(), d.popleft()) +print(len(d)) +try: + d.popleft() +except IndexError: + print("IndexError") + +# Case where get index wraps around when appending to full deque +d = deque((), 2) +d.append(1) +d.append(2) +d.append(3) +d.append(4) +d.append(5) +print(d.popleft(), d.popleft()) + +# Negative maxlen is not allowed +try: + deque((), -1) +except ValueError: + print("ValueError") + +# Unsupported unary op +try: + ~d +except TypeError: + print("TypeError") diff --git a/tests/basics/deque2.py b/tests/basics/deque2.py new file mode 100644 index 0000000000000..22d370e943ba1 --- /dev/null +++ b/tests/basics/deque2.py @@ -0,0 +1,66 @@ +# Tests for deques with "check overflow" flag and other extensions +# wrt to CPython. +try: + try: + from ucollections import deque + except ImportError: + from collections import deque +except ImportError: + print("SKIP") + raise SystemExit + + +# Initial sequence is not supported +try: + deque([1, 2, 3], 10) +except ValueError: + print("ValueError") + +# Not even empty list, only empty tuple +try: + deque([], 10) +except ValueError: + print("ValueError") + +# Only fixed-size deques are supported, so length arg is mandatory +try: + deque(()) +except TypeError: + print("TypeError") + +d = deque((), 2, True) + +try: + d.popleft() +except IndexError: + print("IndexError") + +print(d.append(1)) +print(d.popleft()) + +d.append(2) +print(d.popleft()) + +d.append(3) +d.append(4) +print(d.popleft(), d.popleft()) +try: + d.popleft() +except IndexError as e: + print(repr(e)) + +d.append(5) +d.append(6) +print(len(d)) +try: + d.append(7) +except IndexError as e: + print(repr(e)) +print(len(d)) + +print(d.popleft(), d.popleft()) +print(len(d)) +try: + d.popleft() +except IndexError as e: + print(repr(e)) diff --git a/tests/basics/deque2.py.exp b/tests/basics/deque2.py.exp new file mode 100644 index 0000000000000..3df8acf405627 --- /dev/null +++ b/tests/basics/deque2.py.exp @@ -0,0 +1,15 @@ +ValueError +ValueError +TypeError +IndexError +None +1 +2 +3 4 +IndexError('empty',) +2 +IndexError('full',) +2 +5 6 +0 +IndexError('empty',) diff --git a/tests/basics/dict1.py b/tests/basics/dict1.py index 20fa9def31851..0cec51173ac18 100644 --- a/tests/basics/dict1.py +++ b/tests/basics/dict1.py @@ -27,7 +27,7 @@ try: {}[0] except KeyError as er: - print('KeyError', er, repr(er), er.args) + print('KeyError', er, er.args) # unsupported unary op try: diff --git a/tests/basics/dict_fixed.py b/tests/basics/dict_fixed.py new file mode 100644 index 0000000000000..4261a06557aae --- /dev/null +++ b/tests/basics/dict_fixed.py @@ -0,0 +1,48 @@ +# test that fixed dictionaries cannot be modified + +try: + import uerrno +except ImportError: + print("SKIP") + raise SystemExit + +# Save a copy of uerrno.errorcode, so we can check later +# that it hasn't been modified. +errorcode_copy = uerrno.errorcode.copy() + +try: + uerrno.errorcode.popitem() +except TypeError: + print("TypeError") + +try: + uerrno.errorcode.pop(0) +except TypeError: + print("TypeError") + +try: + uerrno.errorcode.setdefault(0, 0) +except TypeError: + print("TypeError") + +try: + uerrno.errorcode.update([(1, 2)]) +except TypeError: + print("TypeError") + +try: + del uerrno.errorcode[1] +except TypeError: + print("TypeError") + +try: + uerrno.errorcode[1] = 'foo' +except TypeError: + print("TypeError") + +try: + uerrno.errorcode.clear() +except TypeError: + print("TypeError") + +assert uerrno.errorcode == errorcode_copy diff --git a/tests/basics/dict_fixed.py.exp b/tests/basics/dict_fixed.py.exp new file mode 100644 index 0000000000000..ffaeb4085c3aa --- /dev/null +++ b/tests/basics/dict_fixed.py.exp @@ -0,0 +1,7 @@ +TypeError +TypeError +TypeError +TypeError +TypeError +TypeError +TypeError diff --git a/tests/basics/enumerate.py b/tests/basics/enumerate.py deleted file mode 100644 index 00595cb0f652d..0000000000000 --- a/tests/basics/enumerate.py +++ /dev/null @@ -1,10 +0,0 @@ -print(list(enumerate([]))) -print(list(enumerate([1, 2, 3]))) -print(list(enumerate([1, 2, 3], 5))) -print(list(enumerate([1, 2, 3], -5))) -print(list(enumerate(range(100)))) - -# specifying args with keywords -print(list(enumerate([1, 2, 3], start=1))) -print(list(enumerate(iterable=[1, 2, 3]))) -print(list(enumerate(iterable=[1, 2, 3], start=1))) diff --git a/tests/basics/errno1.py b/tests/basics/errno1.py index 63930b767ff8e..cef5326b4a6c7 100644 --- a/tests/basics/errno1.py +++ b/tests/basics/errno1.py @@ -11,7 +11,14 @@ # check that errors are rendered in a nice way msg = str(OSError(uerrno.EIO)) -print(msg[:7], msg[-5:]) +print(msg[:7], msg[msg.find(']'):]) + +msg = str(OSError(uerrno.ENOBUFS)) +print(msg[:7], msg[msg.find(']'):]) # check that unknown errno is still rendered print(str(OSError(9999))) + +# this tests a failed constant lookup in errno +errno = uerrno +print(errno.__name__) diff --git a/tests/basics/errno1.py.exp b/tests/basics/errno1.py.exp index c3703df4a26b3..b550468985fff 100644 --- a/tests/basics/errno1.py.exp +++ b/tests/basics/errno1.py.exp @@ -1,3 +1,5 @@ -[Errno ] EIO +[Errno ] Input/output error +[Errno ] ENOBUFS 9999 +uerrno diff --git a/tests/basics/exception1.py b/tests/basics/exception1.py index 739dd327537a1..d83764cb939cc 100644 --- a/tests/basics/exception1.py +++ b/tests/basics/exception1.py @@ -1,7 +1,6 @@ print(repr(IndexError())) print(str(IndexError())) -print(repr(IndexError("foo"))) print(str(IndexError("foo"))) a = IndexError(1, "test", [100, 200]) diff --git a/tests/basics/fun_calldblstar.py b/tests/basics/fun_calldblstar.py index aae9828cf7e02..d4816c5cd3d03 100644 --- a/tests/basics/fun_calldblstar.py +++ b/tests/basics/fun_calldblstar.py @@ -6,6 +6,11 @@ def f(a, b): f(1, **{'b':2}) f(1, **{'b':val for val in range(1)}) +try: + f(1, **{len:2}) +except TypeError: + print('TypeError') + # test calling a method with keywords given by **dict class A: @@ -15,3 +20,10 @@ def f(self, a, b): a = A() a.f(1, **{'b':2}) a.f(1, **{'b':val for val in range(1)}) + +try: + f(1, **{len: 1}) +except TypeError: + print(True) +else: + print(False) diff --git a/tests/basics/fun_calldblstar2.py b/tests/basics/fun_calldblstar2.py index cf982ef5b8a6d..8795eaf1597e2 100644 --- a/tests/basics/fun_calldblstar2.py +++ b/tests/basics/fun_calldblstar2.py @@ -1,5 +1,11 @@ # test passing a string object as the key for a keyword argument +try: + exec +except NameError: + print("SKIP") + raise SystemExit + # they key in this dict is a string object and is not interned args = {'thisisaverylongargumentname': 123} diff --git a/tests/basics/fun_error.py b/tests/basics/fun_error.py index 367fe0b7fa02e..3e79c727b34d6 100644 --- a/tests/basics/fun_error.py +++ b/tests/basics/fun_error.py @@ -1,31 +1,44 @@ # test errors from bad function calls -def test_exc(code, exc): - try: - exec(code) - print("no exception") - except exc: - print("right exception") - except: - print("wrong exception") - # function doesn't take keyword args -test_exc("[].append(x=1)", TypeError) +try: + [].append(x=1) +except TypeError: + print('TypeError') # function with variable number of positional args given too few -test_exc("round()", TypeError) +try: + round() +except TypeError: + print('TypeError') # function with variable number of positional args given too many -test_exc("round(1, 2, 3)", TypeError) +try: + round(1, 2, 3) +except TypeError: + print('TypeError') # function with fixed number of positional args given wrong number -test_exc("[].append(1, 2)", TypeError) +try: + [].append(1, 2) +except TypeError: + print('TypeError') # function with keyword args given extra positional args -test_exc("[].sort(1)", TypeError) +try: + [].sort(1) +except TypeError: + print('TypeError') # function with keyword args given extra keyword args -test_exc("[].sort(noexist=1)", TypeError) +try: + [].sort(noexist=1) +except TypeError: + print('TypeError') # kw given for positional, but a different positional is missing -test_exc("def f(x, y): pass\nf(x=1)", TypeError) +try: + def f(x, y): pass + f(x=1) +except TypeError: + print('TypeError') diff --git a/tests/basics/fun_error2.py b/tests/basics/fun_error2.py index 2a00396e65d84..39fd0af144a26 100644 --- a/tests/basics/fun_error2.py +++ b/tests/basics/fun_error2.py @@ -5,14 +5,8 @@ print("SKIP") raise SystemExit -def test_exc(code, exc): - try: - exec(code) - print("no exception") - except exc: - print("right exception") - except: - print("wrong exception") - # function with keyword args not given a specific keyword arg -test_exc("enumerate()", TypeError) +try: + enumerate() +except TypeError: + print('TypeError') diff --git a/tests/basics/fun_name.py b/tests/basics/fun_name.py index 7a84fc339098e..a724f41118084 100644 --- a/tests/basics/fun_name.py +++ b/tests/basics/fun_name.py @@ -14,3 +14,4 @@ def Fun(self): print(A().Fun.__name__) except AttributeError: print('SKIP') + raise SystemExit diff --git a/tests/basics/gc1.py b/tests/basics/gc1.py index dcbe0bfcf6678..332bf9744c072 100644 --- a/tests/basics/gc1.py +++ b/tests/basics/gc1.py @@ -27,3 +27,8 @@ assert(gc.threshold() == 0) assert(gc.threshold(-1) is None) assert(gc.threshold() == -1) + + # Setting a low threshold should trigger collection at the list alloc + gc.threshold(1) + [[], []] + gc.threshold(-1) diff --git a/tests/basics/gen_stack_overflow.py b/tests/basics/gen_stack_overflow.py new file mode 100644 index 0000000000000..5cba0e0549be4 --- /dev/null +++ b/tests/basics/gen_stack_overflow.py @@ -0,0 +1,7 @@ +def gen(): + yield from gen() + +try: + print(list(gen())) +except RuntimeError: + print("RuntimeError") diff --git a/tests/basics/gen_yield_from.py b/tests/basics/gen_yield_from.py index 5196b48d2b587..4e68aec63b9f2 100644 --- a/tests/basics/gen_yield_from.py +++ b/tests/basics/gen_yield_from.py @@ -40,3 +40,16 @@ def gen6(): g = gen6() print(list(g)) + +# StopIteration from within a Python function, within a native iterator (map), within a yield from +def gen7(x): + if x < 3: + return x + else: + raise StopIteration(444) + +def gen8(): + print((yield from map(gen7, range(100)))) + +g = gen8() +print(list(g)) diff --git a/tests/basics/gen_yield_from.py.exp b/tests/basics/gen_yield_from.py.exp new file mode 100644 index 0000000000000..507f2b9cafaea --- /dev/null +++ b/tests/basics/gen_yield_from.py.exp @@ -0,0 +1,14 @@ +here1 +3 +here2 +[1, 2] +here1 +None +here2 +[1, 2] +here1 +123 +here2 +[1, 2] +444 +[0, 1, 2] diff --git a/tests/basics/gen_yield_from_close.py.exp b/tests/basics/gen_yield_from_close.py.exp new file mode 100644 index 0000000000000..a44d1353dfbeb --- /dev/null +++ b/tests/basics/gen_yield_from_close.py.exp @@ -0,0 +1,20 @@ +-1 +1 +StopIteration +-1 +1 +2 +leaf caught GeneratorExit and swallowed it +delegating caught GeneratorExit +StopIteration +-1 +1 +2 +leaf caught GeneratorExit and raised StopIteration instead +delegating caught GeneratorExit +StopIteration +123 +RuntimeError +0 +1 +close diff --git a/tests/basics/gen_yield_from_executing.py b/tests/basics/gen_yield_from_executing.py new file mode 100644 index 0000000000000..cad0c769570f5 --- /dev/null +++ b/tests/basics/gen_yield_from_executing.py @@ -0,0 +1,15 @@ +# yielding from an already executing generator is not allowed + +def f(): + yield 1 + # g here is already executing so this will raise an exception + yield from g + +g = f() + +print(next(g)) + +try: + next(g) +except ValueError: + print('ValueError') diff --git a/tests/basics/gen_yield_from_throw.py.exp b/tests/basics/gen_yield_from_throw.py.exp new file mode 100644 index 0000000000000..6ce97ad86e21f --- /dev/null +++ b/tests/basics/gen_yield_from_throw.py.exp @@ -0,0 +1,6 @@ +1 +got ValueError from upstream! +str1 +got TypeError from downstream! +123 +got StopIteration from downstream! diff --git a/tests/basics/gen_yield_from_throw3.py b/tests/basics/gen_yield_from_throw3.py index 0f6c7c84290f6..85b6f71f99a81 100644 --- a/tests/basics/gen_yield_from_throw3.py +++ b/tests/basics/gen_yield_from_throw3.py @@ -28,3 +28,30 @@ def gen(): g = gen() print(next(g)) print(g.throw(ZeroDivisionError)) + +# this user-defined generator doesn't have a throw() method +class Iter2: + def __iter__(self): + return self + + def __next__(self): + return 1 + +def gen2(): + yield from Iter2() + +# the thrown ValueError is not intercepted by the user class +g = gen2() +print(next(g)) +try: + g.throw(ValueError) +except: + print('ValueError') + +# the thrown 123 is not an exception so raises a TypeError +g = gen2() +print(next(g)) +try: + g.throw(123) +except TypeError: + print('TypeError') diff --git a/tests/basics/generator_close.py.exp b/tests/basics/generator_close.py.exp new file mode 100644 index 0000000000000..fcd5839357d4e --- /dev/null +++ b/tests/basics/generator_close.py.exp @@ -0,0 +1,10 @@ +None +StopIteration +1 +None +StopIteration +[1, 2] +None +StopIteration +None +ValueError diff --git a/tests/basics/generator_pend_throw.py b/tests/basics/generator_pend_throw.py new file mode 100644 index 0000000000000..f00ff793b64fa --- /dev/null +++ b/tests/basics/generator_pend_throw.py @@ -0,0 +1,31 @@ +def gen(): + i = 0 + while 1: + yield i + i += 1 + +g = gen() + +try: + g.pend_throw +except AttributeError: + print("SKIP") + raise SystemExit + + +print(next(g)) +print(next(g)) +g.pend_throw(ValueError()) + +v = None +try: + v = next(g) +except Exception as e: + print("raised", repr(e)) + +print("ret was:", v) + +try: + gen().pend_throw(ValueError()) +except TypeError: + print("TypeError") diff --git a/tests/basics/generator_pend_throw.py.exp b/tests/basics/generator_pend_throw.py.exp new file mode 100644 index 0000000000000..ed4d8829580ad --- /dev/null +++ b/tests/basics/generator_pend_throw.py.exp @@ -0,0 +1,5 @@ +0 +1 +raised ValueError() +ret was: None +TypeError diff --git a/tests/basics/generator_return.py b/tests/basics/generator_return.py index a3ac88575ef66..5814ce8379cbb 100644 --- a/tests/basics/generator_return.py +++ b/tests/basics/generator_return.py @@ -7,4 +7,4 @@ def gen(): try: print(next(g)) except StopIteration as e: - print(repr(e)) + print(type(e), e.args) diff --git a/tests/basics/hasattr1.py b/tests/basics/hasattr1.py deleted file mode 100644 index 118a19e579793..0000000000000 --- a/tests/basics/hasattr1.py +++ /dev/null @@ -1,39 +0,0 @@ -class A: - - var = 132 - - def __init__(self): - self.var2 = 34 - - def meth(self, i): - return 42 + i - - -a = A() -print(hasattr(a, "var")) -print(hasattr(a, "var2")) -print(hasattr(a, "meth")) -print(hasattr(a, "_none_such")) -print(hasattr(list, "foo")) - -class C: - - def __getattr__(self, attr): - if attr == "exists": - return attr - raise AttributeError - -c = C() -print(hasattr(c, "exists")) -# TODO -#print(hasattr(c, "doesnt_exist")) - -try: - hasattr(1, b'123') -except TypeError: - print('TypeError') - -try: - hasattr(1, 123) -except TypeError: - print('TypeError') diff --git a/tests/basics/int_big1.py b/tests/basics/int_big1.py index 425bc21b67915..40d16c455bf38 100644 --- a/tests/basics/int_big1.py +++ b/tests/basics/int_big1.py @@ -75,6 +75,10 @@ print(int("123456789012345678901234567890abcdef")) except ValueError: print('ValueError'); +try: + print(int("123456789012345678901234567890\x01")) +except ValueError: + print('ValueError'); # test constant integer with more than 255 chars x = 0x84ce72aa8699df436059f052ac51b6398d2511e49631bcb7e71f89c499b9ee425dfbc13a5f6d408471b054f2655617cbbaf7937b7c80cd8865cf02c8487d30d2b0fbd8b2c4e102e16d828374bbc47b93852f212d5043c3ea720f086178ff798cc4f63f787b9c2e419efa033e7644ea7936f54462dc21a6c4580725f7f0e7d1aaaaaaa @@ -86,6 +90,11 @@ x = -1073741823 # small x = 1073741824 # big x = -1073741824 # big +# for nan-boxing with 47-bit small ints +print(int('0x3fffffffffff', 16)) # small +print(int('-0x3fffffffffff', 16)) # small +print(int('0x400000000000', 16)) # big +print(int('-0x400000000000', 16)) # big # for 64 bit archs x = 4611686018427387903 # small x = -4611686018427387903 # small @@ -95,3 +104,7 @@ # sys.maxsize is a constant mpz, so test it's compatible with dynamic ones import sys print(sys.maxsize + 1 - 1 == sys.maxsize) + +# test extraction of big int value via mp_obj_get_int_maybe +x = 1 << 70 +print('a' * (x + 4 - x)) diff --git a/tests/basics/int_big_add.py b/tests/basics/int_big_add.py index f0c3336d05d29..b64b76ff0bfda 100644 --- a/tests/basics/int_big_add.py +++ b/tests/basics/int_big_add.py @@ -5,6 +5,11 @@ print(i + i) print(-i + -i) +# 47-bit overflow +i = 0x3fffffffffff +print(i + i) +print(-i + -i) + # 63-bit overflow i = 0x3fffffffffffffff print(i + i) diff --git a/tests/basics/int_big_error.py b/tests/basics/int_big_error.py index e036525d1b2ec..79809aef1104c 100644 --- a/tests/basics/int_big_error.py +++ b/tests/basics/int_big_error.py @@ -17,9 +17,9 @@ except TypeError: print("TypeError") -# overflow because rhs of >> is being converted to machine int +# overflow because arg of bytearray is being converted to machine int try: - 1 >> i + bytearray(i) except OverflowError: print('OverflowError') diff --git a/tests/basics/int_big_rshift.py b/tests/basics/int_big_rshift.py index b2fecb36c9683..e6e2a669939b4 100644 --- a/tests/basics/int_big_rshift.py +++ b/tests/basics/int_big_rshift.py @@ -3,5 +3,7 @@ print(i >> 1000) # result needs rounding up -print(-(1<<70) >> 80) -print(-0xffffffffffffffff >> 32) +i = -(1 << 70) +print(i >> 80) +i = -0xffffffffffffffff +print(i >> 32) diff --git a/tests/basics/int_big_xor.py b/tests/basics/int_big_xor.py index 318db45e60589..cd1d9ae97fa75 100644 --- a/tests/basics/int_big_xor.py +++ b/tests/basics/int_big_xor.py @@ -19,7 +19,8 @@ print((-a) ^ (1 << 200)) print((-a) ^ a == 0) print(bool((-a) ^ a)) -print(-1 ^ 0xffffffffffffffff) # carry overflows to higher digit +i = -1 +print(i ^ 0xffffffffffffffff) # carry overflows to higher digit # test + - diff --git a/tests/basics/int_bytes.py b/tests/basics/int_bytes.py index 059c16d3fa00e..d42afac1fd4ec 100644 --- a/tests/basics/int_bytes.py +++ b/tests/basics/int_bytes.py @@ -1,6 +1,11 @@ print((10).to_bytes(1, "little")) +print((-10).to_bytes(1, "little", signed=True)) +# Test fitting in length that's not a power of two. +print((0x10000).to_bytes(3, 'little')) print((111111).to_bytes(4, "little")) +print((-111111).to_bytes(4, "little", signed=True)) print((100).to_bytes(10, "little")) +print((-100).to_bytes(10, "little", signed=True)) # check that extra zero bytes don't change the internal int value print(int.from_bytes(bytes(20), "little") == 0) @@ -8,7 +13,9 @@ # big-endian conversion print((10).to_bytes(1, "big")) +print((-10).to_bytes(1, "big", signed=True)) print((100).to_bytes(10, "big")) +print((-100).to_bytes(10, "big", signed=True)) print(int.from_bytes(b"\0\0\0\0\0\0\0\0\0\x01", "big")) print(int.from_bytes(b"\x01\0", "big")) @@ -17,3 +24,20 @@ (1).to_bytes(-1, "little") except ValueError: print("ValueError") + +# too small buffer should raise an error +try: + (256).to_bytes(1, "little") +except OverflowError: + print("OverflowError") + +# negative numbers should raise an error if signed=False +try: + (-256).to_bytes(2, "little") +except OverflowError: + print("OverflowError") + +try: + (-256).to_bytes(2, "little", signed=False) +except OverflowError: + print("OverflowError") diff --git a/tests/basics/int_bytes_intbig.py b/tests/basics/int_bytes_intbig.py index ce6fec40aec5e..a9f0699024626 100644 --- a/tests/basics/int_bytes_intbig.py +++ b/tests/basics/int_bytes_intbig.py @@ -2,7 +2,9 @@ skip_if.no_bigint() print((2**64).to_bytes(9, "little")) +print((-2**64).to_bytes(9, "little", signed=True)) print((2**64).to_bytes(9, "big")) +print((-2**64).to_bytes(9, "big", signed=True)) b = bytes(range(20)) @@ -15,3 +17,19 @@ # check that extra zero bytes don't change the internal int value print(int.from_bytes(b + bytes(10), "little") == int.from_bytes(b, "little")) + +# too small buffer should raise an error +try: + (2**64).to_bytes(8, "little") +except OverflowError: + print("OverflowError") + +# negative numbers should raise an error if signed=False +try: + (-2**64).to_bytes(9, "little") +except OverflowError: + print("OverflowError") +try: + (-2**64).to_bytes(9, "little", signed=False) +except OverflowError: + print("OverflowError") diff --git a/tests/basics/int_constfolding.py b/tests/basics/int_constfolding.py index 7bb53837858b3..158897f55335f 100644 --- a/tests/basics/int_constfolding.py +++ b/tests/basics/int_constfolding.py @@ -29,3 +29,9 @@ print(-123 // 7, -123 % 7) print(123 // -7, 123 % -7) print(-123 // -7, -123 % -7) + +# won't fold so an exception can be raised at runtime +try: + 1 << -1 +except ValueError: + print('ValueError') diff --git a/tests/basics/int_longint_bytes.py b/tests/basics/int_longint_bytes.py index 42e445f539d43..90cbff2f877cf 100644 --- a/tests/basics/int_longint_bytes.py +++ b/tests/basics/int_longint_bytes.py @@ -3,6 +3,7 @@ skip_if.no_bigint() print((2**64).to_bytes(9, "little")) +print((-2**64).to_bytes(9, "little", signed=True)) print(int.from_bytes(b"\x00\x01\0\0\0\0\0\0", "little")) print(int.from_bytes(b"\x01\0\0\0\0\0\0\0", "little")) print(int.from_bytes(b"\x00\x01\0\0\0\0\0\0", "little")) diff --git a/tests/basics/iter1.py b/tests/basics/iter1.py index 9117dfd2b7088..26e9a2ef257be 100644 --- a/tests/basics/iter1.py +++ b/tests/basics/iter1.py @@ -68,3 +68,12 @@ def __next__(self): for i in myiter(32): print(i) + +# repeat some of the above tests but use tuple() to walk the iterator (tests mp_iternext) +print(tuple(myiter(5))) +print(tuple(myiter(12))) +print(tuple(myiter(32))) +try: + tuple(myiter(22)) +except TypeError: + print('raised TypeError') diff --git a/tests/basics/lexer.py b/tests/basics/lexer.py index 244de8cb98cb5..181d62db1aadb 100644 --- a/tests/basics/lexer.py +++ b/tests/basics/lexer.py @@ -1,5 +1,12 @@ # test the lexer +try: + eval + exec +except NameError: + print("SKIP") + raise SystemExit + # __debug__ is a special symbol print(type(__debug__)) diff --git a/tests/basics/memoryerror.py b/tests/basics/memoryerror.py index ba145b7d4e383..18053f097aa5a 100644 --- a/tests/basics/memoryerror.py +++ b/tests/basics/memoryerror.py @@ -1,6 +1,13 @@ +# test out-of-memory with malloc l = list(range(1000)) try: 1000000000 * l except MemoryError: print('MemoryError') print(len(l), l[0], l[-1]) + +# test out-of-memory with realloc +try: + [].extend(range(1000000000)) +except MemoryError: + print('MemoryError') diff --git a/tests/basics/memoryerror.py.exp b/tests/basics/memoryerror.py.exp index c41e8c1a6ad41..3d6c7f0009563 100644 --- a/tests/basics/memoryerror.py.exp +++ b/tests/basics/memoryerror.py.exp @@ -1,2 +1,3 @@ MemoryError 1000 0 999 +MemoryError diff --git a/tests/basics/namedtuple1.py b/tests/basics/namedtuple1.py index 1b176b23212d5..63d9eddd4e38c 100644 --- a/tests/basics/namedtuple1.py +++ b/tests/basics/namedtuple1.py @@ -1,8 +1,5 @@ try: - try: - from collections import namedtuple - except ImportError: - from ucollections import namedtuple + from collections import namedtuple except ImportError: print("SKIP") raise SystemExit diff --git a/tests/basics/namedtuple1_cpython_compat.py b/tests/basics/namedtuple1_cpython_compat.py index a1b852d900146..061ae94e587d8 100644 --- a/tests/basics/namedtuple1_cpython_compat.py +++ b/tests/basics/namedtuple1_cpython_compat.py @@ -2,10 +2,7 @@ skip_if.no_cpython_compat() try: - try: - from collections import namedtuple - except ImportError: - from ucollections import namedtuple + from collections import namedtuple except ImportError: skip_if.skip() diff --git a/tests/basics/namedtuple_asdict.py b/tests/basics/namedtuple_asdict.py new file mode 100644 index 0000000000000..c5681376fd4cb --- /dev/null +++ b/tests/basics/namedtuple_asdict.py @@ -0,0 +1,20 @@ +try: + try: + from collections import namedtuple + except ImportError: + from ucollections import namedtuple +except ImportError: + print("SKIP") + raise SystemExit + +t = namedtuple("Tup", ["baz", "foo", "bar"])(3, 2, 5) + +try: + t._asdict +except AttributeError: + print("SKIP") + raise SystemExit + +d = t._asdict() +print(list(d.keys())) +print(list(d.values())) diff --git a/tests/basics/op_error.py b/tests/basics/op_error.py index b30b5f0a3575f..7b4f896e1410e 100644 --- a/tests/basics/op_error.py +++ b/tests/basics/op_error.py @@ -1,44 +1,89 @@ # test errors from bad operations (unary, binary, etc) -def test_exc(code, exc): - try: - exec(code) - print("no exception") - except exc: - print("right exception") - except: - print("wrong exception") - # unsupported unary operators -test_exc("~None", TypeError) -test_exc("~''", TypeError) -test_exc("~[]", TypeError) -test_exc("~bytearray()", TypeError) +try: + ~None +except TypeError: + print('TypeError') +try: + ~'' +except TypeError: + print('TypeError') +try: + ~[] +except TypeError: + print('TypeError') +try: + ~bytearray() +except TypeError: + print('TypeError') # unsupported binary operators -test_exc("False in True", TypeError) -test_exc("1 * {}", TypeError) -test_exc("1 in 1", TypeError) -test_exc("bytearray() // 2", TypeError) +try: + False in True +except TypeError: + print('TypeError') +try: + 1 * {} +except TypeError: + print('TypeError') +try: + 1 in 1 +except TypeError: + print('TypeError') +try: + bytearray() // 2 +except TypeError: + print('TypeError') # object with buffer protocol needed on rhs -test_exc("bytearray(1) + 1", TypeError) +try: + bytearray(1) + 1 +except TypeError: + print('TypeError') # unsupported subscription -test_exc("1[0]", TypeError) -test_exc("1[0] = 1", TypeError) -test_exc("''['']", TypeError) -test_exc("'a'[0] = 1", TypeError) -test_exc("del 1[0]", TypeError) +try: + 1[0] +except TypeError: + print('TypeError') +try: + 1[0] = 1 +except TypeError: + print('TypeError') +try: + ''[''] +except TypeError: + print('TypeError') +try: + 'a'[0] = 1 +except TypeError: + print('TypeError') +try: + del 1[0] +except TypeError: + print('TypeError') # not callable -test_exc("1()", TypeError) +try: + 1() +except TypeError: + print('TypeError') # not an iterator -test_exc("next(1)", TypeError) +try: + next(1) +except TypeError: + print('TypeError') # must be an exception type -test_exc("raise 1", TypeError) +try: + raise 1 +except TypeError: + print('TypeError') # no such name in import -test_exc("from sys import youcannotimportmebecauseidontexist", ImportError) +try: + from sys import youcannotimportmebecauseidontexist +except ImportError: + print('ImportError') diff --git a/tests/basics/op_error_intbig.py b/tests/basics/op_error_intbig.py index 432c05a9fe408..7def75b0c6c17 100644 --- a/tests/basics/op_error_intbig.py +++ b/tests/basics/op_error_intbig.py @@ -10,4 +10,7 @@ def test_exc(code, exc): print("wrong exception") # object with buffer protocol needed on rhs -test_exc("(1 << 70) in 1", TypeError) +try: + (1 << 70) in 1 +except TypeError: + print('TypeError') diff --git a/tests/basics/op_error_memoryview.py b/tests/basics/op_error_memoryview.py index 8d4403f777774..233f7f9ab7bfd 100644 --- a/tests/basics/op_error_memoryview.py +++ b/tests/basics/op_error_memoryview.py @@ -5,14 +5,9 @@ print("SKIP") raise SystemExit -def test_exc(code, exc): - try: - exec(code) - print("no exception") - except exc: - print("right exception") - except: - print("wrong exception") - # unsupported binary operators -test_exc("m = memoryview(bytearray())\nm += bytearray()", TypeError) +try: + m = memoryview(bytearray()) + m += bytearray() +except TypeError: + print('TypeError') diff --git a/tests/basics/ordereddict1.py b/tests/basics/ordereddict1.py index d1633f0bb0e1f..9c62b2d623334 100644 --- a/tests/basics/ordereddict1.py +++ b/tests/basics/ordereddict1.py @@ -1,11 +1,8 @@ try: from collections import OrderedDict except ImportError: - try: - from ucollections import OrderedDict - except ImportError: - print("SKIP") - raise SystemExit + print("SKIP") + raise SystemExit d = OrderedDict([(10, 20), ("b", 100), (1, 2)]) print(len(d)) diff --git a/tests/basics/ordereddict_eq.py b/tests/basics/ordereddict_eq.py index c69daf8802cc9..e103c867e237b 100644 --- a/tests/basics/ordereddict_eq.py +++ b/tests/basics/ordereddict_eq.py @@ -1,11 +1,8 @@ try: from collections import OrderedDict except ImportError: - try: - from ucollections import OrderedDict - except ImportError: - print("SKIP") - raise SystemExit + print("SKIP") + raise SystemExit x = OrderedDict() y = OrderedDict() diff --git a/tests/basics/parser.py.exp b/tests/basics/parser.py.exp new file mode 100644 index 0000000000000..4d9886a09c096 --- /dev/null +++ b/tests/basics/parser.py.exp @@ -0,0 +1,3 @@ +SyntaxError +SyntaxError +SyntaxError diff --git a/tests/basics/python34.py b/tests/basics/python34.py index d5cc59ad6c9c9..4030db143c4d7 100644 --- a/tests/basics/python34.py +++ b/tests/basics/python34.py @@ -1,4 +1,10 @@ -# tests that differ when running under Python 3.4 vs 3.5/3.6 +# tests that differ when running under Python 3.4 vs 3.5/3.6/3.7 + +try: + exec +except NameError: + print("SKIP") + raise SystemExit # from basics/fun_kwvarargs.py # test evaluation order of arguments (in 3.4 it's backwards, 3.5 it's fixed) @@ -30,3 +36,7 @@ def test_syntax(code): import sys print(sys.version[:3]) print(sys.version_info[0], sys.version_info[1]) + +# from basics/exception1.py +# in 3.7 no comma is printed if there is only 1 arg (in 3.4-3.6 one is printed) +print(repr(IndexError("foo"))) diff --git a/tests/basics/python34.py.exp b/tests/basics/python34.py.exp index 590fc364f4028..8480171307d14 100644 --- a/tests/basics/python34.py.exp +++ b/tests/basics/python34.py.exp @@ -11,3 +11,4 @@ SyntaxError SyntaxError 3.4 3 4 +IndexError('foo',) diff --git a/tests/basics/python36.py b/tests/basics/python36.py new file mode 100644 index 0000000000000..20ecd9227d42b --- /dev/null +++ b/tests/basics/python36.py @@ -0,0 +1,10 @@ +# tests for things that only Python 3.6 supports + +# underscores in numeric literals +print(100_000) +print(0b1010_0101) +print(0xff_ff) + +# underscore supported by int constructor +print(int('1_2_3')) +print(int('0o1_2_3', 8)) diff --git a/tests/basics/python36.py.exp b/tests/basics/python36.py.exp new file mode 100644 index 0000000000000..4b65daafa18fe --- /dev/null +++ b/tests/basics/python36.py.exp @@ -0,0 +1,5 @@ +100000 +165 +65535 +123 +83 diff --git a/tests/basics/set_binop.py b/tests/basics/set_binop.py index bc76533b1f984..bf55f87db58cd 100644 --- a/tests/basics/set_binop.py +++ b/tests/basics/set_binop.py @@ -60,6 +60,12 @@ print('TypeError') # unsupported operator +try: + set('abc') * set('abc') +except TypeError: + print('TypeError') + +# unsupported operator with RHS not a set try: set('abc') * 2 except TypeError: diff --git a/tests/basics/set_isfooset.py b/tests/basics/set_isfooset.py index ce7952cd2c5fc..27dedea00accb 100644 --- a/tests/basics/set_isfooset.py +++ b/tests/basics/set_isfooset.py @@ -1,5 +1,6 @@ sets = [set(), {1}, {1, 2, 3}, {3, 4, 5}, {5, 6, 7}] +args = sets + [[1], [1, 2], [1, 2 ,3]] for i in sets: - for j in sets: + for j in args: print(i.issubset(j)) print(i.issuperset(j)) diff --git a/tests/basics/set_pop.py b/tests/basics/set_pop.py index 5e1196c9f0611..e951ca5931f2a 100644 --- a/tests/basics/set_pop.py +++ b/tests/basics/set_pop.py @@ -15,4 +15,4 @@ print(s.pop()) # last pop() should trigger the optimisation for i in range(N): s.add(i) # check that we can add the numbers back to the set -print(list(s)) +print(sorted(s)) diff --git a/tests/basics/setattr1.py b/tests/basics/setattr1.py deleted file mode 100644 index 9693aca8196ad..0000000000000 --- a/tests/basics/setattr1.py +++ /dev/null @@ -1,18 +0,0 @@ -class A: - - var = 132 - - def __init__(self): - self.var2 = 34 - - -a = A() -setattr(a, "var", 123) -setattr(a, "var2", 56) -print(a.var) -print(a.var2) - -try: - setattr(a, b'var3', 1) -except TypeError: - print('TypeError') diff --git a/tests/basics/smallint_array_overflow.py b/tests/basics/smallint_array_overflow.py new file mode 100644 index 0000000000000..25b457cca1d97 --- /dev/null +++ b/tests/basics/smallint_array_overflow.py @@ -0,0 +1,52 @@ +try: + from array import array +except ImportError: + print("SKIP") + raise SystemExit + +def test_array_overflow(typecode, val): + try: + print(array(typecode, [val])) + except OverflowError: + print('OverflowError') + +def test_bytearray_overflow(val): + try: + print(bytearray([val])) + except (OverflowError, ValueError): + # CircuitPython always does OverflowError + print('(OverflowError, ValueError)') + + +# small int -1 +test_array_overflow('Q', -1) +test_array_overflow('L', -1) +test_array_overflow('I', -1) +test_array_overflow('H', -1) +test_array_overflow('B', -1) + +# 0 ok +test_array_overflow('Q', 0) +test_array_overflow('L', 0) +test_array_overflow('I', 0) +test_array_overflow('H', 0) +test_array_overflow('B', 0) + +# 1 ok +test_array_overflow('Q', 1) +test_array_overflow('L', 1) +test_array_overflow('I', 1) +test_array_overflow('H', 1) +test_array_overflow('B', 1) + +# truth value conversions +test_array_overflow('b', True) +test_array_overflow('b', False) + +# similar tests for bytearrays +test_bytearray_overflow(0) +test_bytearray_overflow(1) +test_bytearray_overflow(-1) +test_bytearray_overflow(256) +test_bytearray_overflow(True) +test_bytearray_overflow(False) diff --git a/tests/basics/special_methods2.py b/tests/basics/special_methods2.py index ba7cf27cda36d..c21618e93db91 100644 --- a/tests/basics/special_methods2.py +++ b/tests/basics/special_methods2.py @@ -94,6 +94,9 @@ def __isub__(self, other): print("__isub__ called") return self + def __dir__(self): + return ['a', 'b', 'c'] + cud1 = Cud() cud2 = Cud() @@ -112,33 +115,25 @@ def __isub__(self, other): cud2 // cud1 cud1 += cud2 cud1 -= cud2 +cud1 % 2 +cud1 ** 2 +cud1 | cud2 +cud1 & cud2 +cud1 ^ cud2 +cud1 << 1 +cud1 >> 1 + +# test that dir() delegates to __dir__ special method +print(dir(cud1)) + +# test that dir() does not delegate to __dir__ for the type +print('a' in dir(Cud)) # TODO: the following operations are not supported on every ports # # ne is not supported, !(eq) is called instead #cud1 != cud2 # -# binary and is not supported -# cud1 & cud2 -# -# binary lshift is not supported -# cud1<<1 -# -# modulus is not supported -# cud1 % 2 -# -# binary or is not supported -# cud1 | cud2 -# -# pow is not supported -# cud1**2 -# -# rshift is not suported -# cud1>>1 -# -# xor is not supported -# cud1^cud2 -# # in the followin test, cpython still calls __eq__ # cud3=cud1 # cud3==cud1 diff --git a/tests/basics/string_compare.py b/tests/basics/string_compare.py index f011ed363068a..6515809b3642d 100644 --- a/tests/basics/string_compare.py +++ b/tests/basics/string_compare.py @@ -53,3 +53,6 @@ # that does have a hash, but the lengths of the two strings are different import sys print(sys.version == 'a long string that has a hash') + +# this special string would have a hash of 0 but is incremented to 1 +print('Q+?' == 'Q' + '+?') diff --git a/tests/basics/string_find.py b/tests/basics/string_find.py index 4a206eb0e0526..f9fcad3e57904 100644 --- a/tests/basics/string_find.py +++ b/tests/basics/string_find.py @@ -21,6 +21,7 @@ print("0000".find('1', 3)) print("0000".find('1', 4)) print("0000".find('1', 5)) +print("aaaaaaaaaaa".find("bbb", 9, 2)) try: 'abc'.find(1) diff --git a/tests/basics/string_pep498_fstring.py b/tests/basics/string_pep498_fstring.py new file mode 100644 index 0000000000000..c645a730c6313 --- /dev/null +++ b/tests/basics/string_pep498_fstring.py @@ -0,0 +1,113 @@ +# Tests against https://www.python.org/dev/peps/pep-0498/ + +assert f'no interpolation' == 'no interpolation' +assert f"no interpolation" == 'no interpolation' + +# Quoth the PEP: +# Backslashes may not appear anywhere within expressions. Comments, using the +# '#' character, are not allowed inside an expression +# +# CPython (3.7.4 on Linux) raises a SyntaxError here: +# >>> f'{#}' +# File "", line 1 +# SyntaxError: f-string expression part cannot include '#' +# >>> f'{\}' +# File "", line 1 +# SyntaxError: f-string expression part cannot include a backslash +# >>> f'{\\}' +# File "", line 1 +# SyntaxError: f-string expression part cannot include a backslash +# >>> f'{\#}' +# File "", line 1 +# SyntaxError: f-string expression part cannot include a backslash + +# Backslashes and comments allowed outside expression +assert f"\\" == "\\" +assert f'#' == '#' + +## But not inside +try: + eval("f'{\}'") +except SyntaxError: + pass +else: + raise AssertionError('f-string with backslash in expression did not raise SyntaxError') + +try: + eval("f'{#}'") +except SyntaxError: + pass +else: + raise AssertionError('f-string with \'#\' in expression did not raise SyntaxError') + +# Quoth the PEP: +# While scanning the string for expressions, any doubled braces '{{' or '}}' +# inside literal portions of an f-string are replaced by the corresponding +# single brace. Doubled literal opening braces do not signify the start of an +# expression. A single closing curly brace '}' in the literal portion of a +# string is an error: literal closing curly braces must be doubled '}}' in +# order to represent a single closing brace. +# +# CPython (3.7.4 on Linux) raises a SyntaxError for the last case: +# >>> f'{{}' +# File "", line 1 +# SyntaxError: f-string: single '}' is not allowed + +assert f'{{}}' == '{}' + +try: + eval("f'{{}'") +except ValueError: + pass +else: + raise RuntimeError('Expected ValueError for invalid f-string literal bracing') + +x = 1 +assert f'{x}' == '1' + +# Quoth the PEP: +# The expressions that are extracted from the string are evaluated in the +# context where the f-string appeared. This means the expression has full +# access to local and global variables. Any valid Python expression can be +# used, including function and method calls. Because the f-strings are +# evaluated where the string appears in the source code, there is no additional +# expressiveness available with f-strings. There are also no additional +# security concerns: you could have also just written the same expression, not +# inside of an f-string: + +def foo(): + return 20 + +assert f'result={foo()}' == 'result=20' +assert f'result={foo()}' == 'result={}'.format(foo()) +assert f'result={foo()}' == 'result={result}'.format(result=foo()) + + +# Quoth the PEP: +# Adjacent f-strings and regular strings are concatenated. Regular strings are +# concatenated at compile time, and f-strings are concatenated at run time. For +# example, the expression: +# +# >>> x = 10 +# >>> y = 'hi' +# >>> 'a' 'b' f'{x}' '{c}' f'str<{y:^4}>' 'd' 'e' +# +# yields the value: 'ab10{c}str< hi >de' +# +# Because strings are concatenated at lexer time rather than parser time in +# MicroPython for mostly RAM efficiency reasons (see +# https://github.com/micropython/micropython/commit/534b7c368dc2af7720f3aaed0c936ef46d773957), +# and because f-strings here are implemented as a syntax translation +# (f'{something}' => '{}'.format(something)), this particular functionality is unimplemented, +# and in the above example, the '{c}' portion will trigger a KeyError on String.format() + +x = 10 +y = 'hi' +assert (f'h' f'i') == 'hi' +#assert (f'h' 'i') == 'hi' +#assert ('h' f'i') == 'hi' +assert f'{x:^4}' == ' 10 ' +#assert ('a' 'b' f'{x}' f'str<{y:^4}>' 'd' 'e') == 'ab10str< hi >de' + +# Other tests +assert f'{{{4*10}}}' == '{40}' diff --git a/tests/basics/string_pep498_fstring.py.exp b/tests/basics/string_pep498_fstring.py.exp new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/tests/basics/string_rfind.py b/tests/basics/string_rfind.py index 4d0e84018fe52..54269d6f5927b 100644 --- a/tests/basics/string_rfind.py +++ b/tests/basics/string_rfind.py @@ -21,3 +21,4 @@ print("0000".rfind('1', 3)) print("0000".rfind('1', 4)) print("0000".rfind('1', 5)) +print("aaaaaaaaaaa".rfind("bbb", 9, 2)) diff --git a/tests/basics/struct_overflow.py b/tests/basics/struct_overflow.py new file mode 100644 index 0000000000000..aee0c6b9dbfbf --- /dev/null +++ b/tests/basics/struct_overflow.py @@ -0,0 +1,47 @@ +import skip_if +skip_if.no_bigint() + +try: + import ustruct as struct +except: + try: + import struct + except ImportError: + print("SKIP") + raise SystemExit + +def test_struct_overflow(typecode, val): + try: + print(struct.pack(typecode, val)) + except OverflowError: + print('OverflowError') + except struct.error: + print('OverflowError') + +# small int -1 +test_struct_overflow('>Q', -1) +test_struct_overflow('>L', -1) +test_struct_overflow('>I', -1) +test_struct_overflow('>H', -1) +test_struct_overflow('>B', -1) + +# big int -1 +test_struct_overflow('>Q', -2**64 // 2**64) +test_struct_overflow('>L', -2**64 // 2**64) +test_struct_overflow('>I', -2**64 // 2**64) +test_struct_overflow('>H', -2**64 // 2**64) +test_struct_overflow('>B', -2**64 // 2**64) + +# possibly small ints +test_struct_overflow('>q', 2**63) +test_struct_overflow('>l', 2**31) +test_struct_overflow('>i', 2**31) +test_struct_overflow('>h', 2**15) +test_struct_overflow('>b', 2**7) + +# definitely big ints +test_struct_overflow('>q', 2**64 // 2**1) +test_struct_overflow('>l', 2**64 // 2**33) +test_struct_overflow('>i', 2**64 // 2**33) +test_struct_overflow('>h', 2**64 // 2**49) +test_struct_overflow('>b', 2**64 // 2**57) diff --git a/tests/basics/subclass_native3.py b/tests/basics/subclass_native3.py index bd99ab0d6a679..6745b77bb2836 100644 --- a/tests/basics/subclass_native3.py +++ b/tests/basics/subclass_native3.py @@ -7,12 +7,12 @@ class MyExc(Exception): print(e.args) try: - raise MyExc("Some error") + raise MyExc("Some error", 1) except MyExc as e: print("Caught exception:", repr(e)) try: - raise MyExc("Some error2") + raise MyExc("Some error2", 2) except Exception as e: print("Caught exception:", repr(e)) diff --git a/tests/basics/subclass_native_call.py b/tests/basics/subclass_native_call.py new file mode 100644 index 0000000000000..c645575225989 --- /dev/null +++ b/tests/basics/subclass_native_call.py @@ -0,0 +1,30 @@ +# test calling a subclass of a native class that supports calling + +# For this test we need a native class that can be subclassed (has make_new) +# and is callable (has call). The only one available is machine.Signal, which +# in turns needs PinBase. +try: + import umachine as machine +except ImportError: + import machine +try: + machine.PinBase + machine.Signal +except AttributeError: + print("SKIP") + raise SystemExit + +class Pin(machine.PinBase): + #def __init__(self): + # self.v = 0 + + def value(self, v=None): + return 42 + +class MySignal(machine.Signal): + pass + +s = MySignal(Pin()) + +# apply call to the subclass, which should call the native base +print(s()) diff --git a/tests/basics/subclass_native_call.py.exp b/tests/basics/subclass_native_call.py.exp new file mode 100644 index 0000000000000..d81cc0710eb6c --- /dev/null +++ b/tests/basics/subclass_native_call.py.exp @@ -0,0 +1 @@ +42 diff --git a/tests/basics/subclass_native_containment.py b/tests/basics/subclass_native_containment.py new file mode 100644 index 0000000000000..7400f7583e5b6 --- /dev/null +++ b/tests/basics/subclass_native_containment.py @@ -0,0 +1,22 @@ +# test containment operator on subclass of a native type + +class mylist(list): + pass + +class mydict(dict): + pass + +class mybytes(bytes): + pass + +l = mylist([1, 2, 3]) +print(0 in l) +print(1 in l) + +d = mydict({1:1, 2:2}) +print(0 in l) +print(1 in l) + +b = mybytes(b'1234') +print(0 in b) +print(b'1' in b) diff --git a/tests/basics/subclass_native_init.py b/tests/basics/subclass_native_init.py new file mode 100644 index 0000000000000..38d2f23ac3814 --- /dev/null +++ b/tests/basics/subclass_native_init.py @@ -0,0 +1,44 @@ +# test subclassing a native type and overriding __init__ + +# overriding list.__init__() +class L(list): + def __init__(self, a, b): + super().__init__([a, b]) +print(L(2, 3)) + +# inherits implicitly from object +class A: + def __init__(self): + print("A.__init__") + super().__init__() +A() + +# inherits explicitly from object +class B(object): + def __init__(self): + print("B.__init__") + super().__init__() +B() + +# multiple inheritance with object explicitly mentioned +class C: + pass +class D(C, object): + def __init__(self): + print('D.__init__') + super().__init__() + def reinit(self): + print('D.foo') + super().__init__() +a = D() +a.__init__() +a.reinit() + +# call __init__() after object is already init'd +class L(list): + def reinit(self): + super().__init__(range(2)) +a = L(range(5)) +print(a) +a.reinit() +print(a) diff --git a/tests/basics/subclass_native_iter.py b/tests/basics/subclass_native_iter.py new file mode 100644 index 0000000000000..0f6b369ad1a40 --- /dev/null +++ b/tests/basics/subclass_native_iter.py @@ -0,0 +1,7 @@ +# test subclassing a native type which can be iterated over + +class mymap(map): + pass + +m = mymap(lambda x: x + 10, range(4)) +print(list(m)) diff --git a/tests/basics/subscr_tuple.py b/tests/basics/subscr_tuple.py new file mode 100644 index 0000000000000..85d25366daf4d --- /dev/null +++ b/tests/basics/subscr_tuple.py @@ -0,0 +1,7 @@ +# subscripting a subclassed tuple +class Foo(tuple): + pass + +foo = Foo((1,2)) +foo[0] + diff --git a/tests/basics/syntaxerror.py b/tests/basics/syntaxerror.py index 4161de017b83d..8e706c6e23923 100644 --- a/tests/basics/syntaxerror.py +++ b/tests/basics/syntaxerror.py @@ -1,5 +1,11 @@ # test syntax errors +try: + exec +except NameError: + print("SKIP") + raise SystemExit + def test_syntax(code): try: exec(code) @@ -29,6 +35,10 @@ def test_syntax(code): # malformed integer literal (parser error) test_syntax("123z") +# input doesn't match the grammar (parser error) +test_syntax('1 or 2 or') +test_syntax('{1:') + # can't assign to literals test_syntax("1 = 2") test_syntax("'' = 1") diff --git a/tests/basics/sys_getsizeof.py b/tests/basics/sys_getsizeof.py new file mode 100644 index 0000000000000..fe1b403e04bbf --- /dev/null +++ b/tests/basics/sys_getsizeof.py @@ -0,0 +1,22 @@ +# test sys.getsizeof() function + +import sys +try: + sys.getsizeof +except AttributeError: + print('SKIP') + raise SystemExit + +print(sys.getsizeof([1, 2]) >= 2) +print(sys.getsizeof({1: 2}) >= 2) + +class A: + pass +print(sys.getsizeof(A()) > 0) + +# Only test deque if we have it +try: + from ucollections import deque + assert sys.getsizeof(deque((), 1)) > 0 +except ImportError: + pass diff --git a/tests/basics/try_as_var.py b/tests/basics/try_as_var.py index 0a92f1caeeae9..4f02f9c1061bb 100644 --- a/tests/basics/try_as_var.py +++ b/tests/basics/try_as_var.py @@ -1,7 +1,7 @@ try: raise ValueError(534) except ValueError as e: - print(repr(e)) + print(type(e), e.args) # Var bound in except block is automatically deleted try: diff --git a/tests/basics/try_return.py b/tests/basics/try_return.py new file mode 100644 index 0000000000000..492c18d95c3c0 --- /dev/null +++ b/tests/basics/try_return.py @@ -0,0 +1,11 @@ +# test use of return with try-except + +def f(l, i): + try: + return l[i] + except IndexError: + print('IndexError') + return -1 + +print(f([1], 0)) +print(f([], 0)) diff --git a/tests/basics/types3.py b/tests/basics/types3.py new file mode 100644 index 0000000000000..71f7906923b17 --- /dev/null +++ b/tests/basics/types3.py @@ -0,0 +1,20 @@ +try: + type('abc', None, None) +except TypeError: + print(True) +else: + print(False) + +try: + type('abc', (), None) +except TypeError: + print(True) +else: + print(False) + +try: + type('abc', (1,), {}) +except TypeError: + print(True) +else: + print(False) diff --git a/tests/bench/var-8-namedtuple-1st.py b/tests/bench/var-8-namedtuple-1st.py index d862480a517fe..90ae7209d881d 100644 --- a/tests/bench/var-8-namedtuple-1st.py +++ b/tests/bench/var-8-namedtuple-1st.py @@ -1,5 +1,5 @@ import bench -from ucollections import namedtuple +from collections import namedtuple T = namedtuple("Tup", ["num", "bar"]) diff --git a/tests/bench/var-8.1-namedtuple-5th.py b/tests/bench/var-8.1-namedtuple-5th.py index 0bcf66180320a..0d5789d2ed04a 100644 --- a/tests/bench/var-8.1-namedtuple-5th.py +++ b/tests/bench/var-8.1-namedtuple-5th.py @@ -1,5 +1,5 @@ import bench -from ucollections import namedtuple +from collections import namedtuple T = namedtuple("Tup", ["foo1", "foo2", "foo3", "foo4", "num"]) diff --git a/tests/cmdline/cmd_parsetree.py b/tests/cmdline/cmd_parsetree.py index 5f698eeae3891..da36c80703ce5 100644 --- a/tests/cmdline/cmd_parsetree.py +++ b/tests/cmdline/cmd_parsetree.py @@ -9,3 +9,4 @@ d = b'bytes' e = b'a very long bytes that will not be interned' f = 123456789012345678901234567890 +g = 123 diff --git a/tests/cmdline/cmd_parsetree.py.exp b/tests/cmdline/cmd_parsetree.py.exp index d9f81d8d4c858..c06ce4e31fd19 100644 --- a/tests/cmdline/cmd_parsetree.py.exp +++ b/tests/cmdline/cmd_parsetree.py.exp @@ -1,6 +1,6 @@ ---------------- -[ 4] rule(1) (n=8) - tok(4) +[ 4] rule(1) (n=9) + tok(10) [ 4] rule(22) (n=4) id(i) [ 4] rule(44) (n=1) @@ -9,7 +9,7 @@ NULL [ 6] rule(5) (n=2) id(a) - tok(14) + tok(20) [ 7] rule(5) (n=2) id(b) str(str) @@ -25,6 +25,9 @@ [ 11] rule(5) (n=2) id(f) [ 11] literal \.\+ +[ 12] rule(5) (n=2) + id(g) + int(123) ---------------- File cmdline/cmd_parsetree.py, code block '' (descriptor: \.\+, bytecode @\.\+ bytes) Raw bytecode (code_info_size=\\d\+, bytecode_size=\\d\+): @@ -42,6 +45,7 @@ arg names: bc=27 line=9 bc=32 line=10 bc=37 line=11 + bc=42 line=12 00 BUILD_TUPLE 0 02 GET_ITER_STACK 03 FOR_ITER 12 @@ -59,8 +63,10 @@ arg names: 34 STORE_NAME e 37 LOAD_CONST_OBJ \.\+ 39 STORE_NAME f -42 LOAD_CONST_NONE -43 RETURN_VALUE +42 LOAD_CONST_SMALL_INT 123 +45 STORE_NAME g +48 LOAD_CONST_NONE +49 RETURN_VALUE mem: total=\\d\+, current=\\d\+, peak=\\d\+ stack: \\d\+ out of \\d\+ GC: total: \\d\+, used: \\d\+, free: \\d\+ diff --git a/tests/cmdline/repl_autocomplete.py b/tests/cmdline/repl_autocomplete.py index a848cab0f6380..43c49cdc25eef 100644 --- a/tests/cmdline/repl_autocomplete.py +++ b/tests/cmdline/repl_autocomplete.py @@ -6,5 +6,7 @@ 1, x.isdi () i = str i.lowe ('ABC') -j = None -j.  +x = 5 +x.  +x._ +None.  diff --git a/tests/cmdline/repl_autocomplete.py.exp b/tests/cmdline/repl_autocomplete.py.exp index dfb998ff6e93d..7d160e7bf9bd5 100644 --- a/tests/cmdline/repl_autocomplete.py.exp +++ b/tests/cmdline/repl_autocomplete.py.exp @@ -10,6 +10,11 @@ Use \.\+ >>> i = str >>> i.lower('ABC') 'abc' ->>> j = None ->>> j. +>>> x = 5 +>>> x. +from_bytes to_bytes +>>> x. +>>> x.__class__ + +>>> None. >>> diff --git a/tests/cpydiff/builtin_next_arg2.py b/tests/cpydiff/builtin_next_arg2.py new file mode 100644 index 0000000000000..5df2d6e70f837 --- /dev/null +++ b/tests/cpydiff/builtin_next_arg2.py @@ -0,0 +1,12 @@ +""" +categories: Modules,builtins +description: Second argument to next() is not implemented +cause: MicroPython is optimised for code space. +workaround: Instead of ``val = next(it, deflt)`` use:: + + try: + val = next(it) + except StopIteration: + val = deflt +""" +print(next(iter(range(0)), 42)) diff --git a/tests/cpydiff/core_function_unpacking.py b/tests/cpydiff/core_function_unpacking.py deleted file mode 100644 index 01d25ee4d2fa3..0000000000000 --- a/tests/cpydiff/core_function_unpacking.py +++ /dev/null @@ -1,7 +0,0 @@ -""" -categories: Core,Functions -description: Unpacking function arguments in non-last position isn't detected as an error -cause: Unknown -workaround: The syntax below is invalid, never use it in applications. -""" -print(*(1, 2), 3) diff --git a/tests/cpydiff/types_exception_subclassinit.py b/tests/cpydiff/types_exception_subclassinit.py index 1770946462299..39cdaf45b80bd 100644 --- a/tests/cpydiff/types_exception_subclassinit.py +++ b/tests/cpydiff/types_exception_subclassinit.py @@ -1,8 +1,12 @@ """ categories: Types,Exception -description: Exception.__init__ raises TypeError if overridden and called by subclass -cause: Unknown -workaround: Unknown +description: Exception.__init__ method does not exist. +cause: Subclassing native classes is not fully supported in MicroPython. +workaround: Call using ``super()`` instead:: + + class A(Exception): + def __init__(self): + super().__init__() """ class A(Exception): def __init__(self): diff --git a/tests/cpydiff/types_float_rounding.py b/tests/cpydiff/types_float_rounding.py index 82a149d8595e0..c8d3cfbe882ad 100644 --- a/tests/cpydiff/types_float_rounding.py +++ b/tests/cpydiff/types_float_rounding.py @@ -5,5 +5,3 @@ workaround: Unknown """ print('%.1g' % -9.9) -print('%.1e' % 9.99) -print('%.1e' % 0.999) diff --git a/tests/cpydiff/types_int_tobytesfloat.py b/tests/cpydiff/types_int_tobytesfloat.py deleted file mode 100644 index 5d5b980fadd8a..0000000000000 --- a/tests/cpydiff/types_int_tobytesfloat.py +++ /dev/null @@ -1,10 +0,0 @@ -""" -categories: Types,int -description: Incorrect error message when passing float into to_bytes -cause: Unknown -workaround: Unknown -""" -try: - int('1').to_bytes(1.0) -except TypeError as e: - print(e) diff --git a/tests/cpydiff/types_str_decodeerror.py b/tests/cpydiff/types_str_decodeerror.py deleted file mode 100644 index 944db98fe21a9..0000000000000 --- a/tests/cpydiff/types_str_decodeerror.py +++ /dev/null @@ -1,11 +0,0 @@ -""" -categories: Types,str -description: UnicodeDecodeError not raised when expected -cause: Unknown -workaround: Unknown -""" -try: - print(repr(str(b"\xa1\x80", 'utf8'))) - print('Should not get here') -except UnicodeDecodeError: - print('UnicodeDecodeError') diff --git a/tests/cpydiff/types_str_ljust_rjust.py b/tests/cpydiff/types_str_ljust_rjust.py index 4985962059e7e..fa3f594c1fef4 100644 --- a/tests/cpydiff/types_str_ljust_rjust.py +++ b/tests/cpydiff/types_str_ljust_rjust.py @@ -2,6 +2,6 @@ categories: Types,str description: str.ljust() and str.rjust() not implemented cause: MicroPython is highly optimized for memory usage. Easy workarounds available. -workaround: Instead of `s.ljust(10)` use `"%-10s" % s`, instead of `s.rjust(10)` use `"% 10s" % s`. Alternatively, `"{:<10}".format(s)` or `"{:>10}".format(s)`. +workaround: Instead of ``s.ljust(10)`` use ``"%-10s" % s``, instead of ``s.rjust(10)`` use ``"% 10s" % s``. Alternatively, ``"{:<10}".format(s)`` or ``"{:>10}".format(s)``. """ print('abc'.ljust(10)) diff --git a/tests/extmod/framebuf2.py b/tests/extmod/framebuf2.py new file mode 100644 index 0000000000000..a313170eb5e42 --- /dev/null +++ b/tests/extmod/framebuf2.py @@ -0,0 +1,62 @@ +try: + import framebuf +except ImportError: + print("SKIP") + raise SystemExit + +def printbuf(): + print("--8<--") + for y in range(h): + for x in range(w): + print('%u' % ((buf[(x + y * w) // 4] >> ((x & 3) << 1)) & 3), end='') + print() + print("-->8--") + +w = 8 +h = 5 +buf = bytearray(w * h // 4) +fbuf = framebuf.FrameBuffer(buf, w, h, framebuf.GS2_HMSB) + +# fill +fbuf.fill(3) +printbuf() +fbuf.fill(0) +printbuf() + +# put pixel +fbuf.pixel(0, 0, 1) +fbuf.pixel(3, 0, 2) +fbuf.pixel(0, 4, 3) +fbuf.pixel(3, 4, 2) +printbuf() + +# get pixel +print(fbuf.pixel(0, 4), fbuf.pixel(1, 1)) + +# scroll +fbuf.fill(0) +fbuf.pixel(2, 2, 3) +printbuf() +fbuf.scroll(0, 1) +printbuf() +fbuf.scroll(1, 0) +printbuf() +fbuf.scroll(-1, -2) +printbuf() + +w2 = 2 +h2 = 3 +buf2 = bytearray(w2 * h2 // 4) +fbuf2 = framebuf.FrameBuffer(buf2, w2, h2, framebuf.GS2_HMSB) + +# blit +fbuf2.fill(0) +fbuf2.pixel(0, 0, 1) +fbuf2.pixel(0, 2, 2) +fbuf2.pixel(1, 0, 1) +fbuf2.pixel(1, 2, 2) +fbuf.fill(3) +fbuf.blit(fbuf2, 3, 3, 0) +fbuf.blit(fbuf2, -1, -1, 0) +fbuf.blit(fbuf2, 16, 16, 0) +printbuf() diff --git a/tests/extmod/framebuf2.py.exp b/tests/extmod/framebuf2.py.exp new file mode 100644 index 0000000000000..c53e518a6e92d --- /dev/null +++ b/tests/extmod/framebuf2.py.exp @@ -0,0 +1,57 @@ +--8<-- +33333333 +33333333 +33333333 +33333333 +33333333 +-->8-- +--8<-- +00000000 +00000000 +00000000 +00000000 +00000000 +-->8-- +--8<-- +10020000 +00000000 +00000000 +00000000 +30020000 +-->8-- +3 0 +--8<-- +00000000 +00000000 +00300000 +00000000 +00000000 +-->8-- +--8<-- +00000000 +00000000 +00000000 +00300000 +00000000 +-->8-- +--8<-- +00000000 +00000000 +00000000 +00030000 +00000000 +-->8-- +--8<-- +00000000 +00300000 +00000000 +00030000 +00000000 +-->8-- +--8<-- +33333333 +23333333 +33333333 +33311333 +33333333 +-->8-- diff --git a/tests/extmod/framebuf8.py b/tests/extmod/framebuf8.py new file mode 100644 index 0000000000000..b6899aae9122c --- /dev/null +++ b/tests/extmod/framebuf8.py @@ -0,0 +1,32 @@ +try: + import framebuf +except ImportError: + print("SKIP") + raise SystemExit + +def printbuf(): + print("--8<--") + for y in range(h): + for x in range(w): + print('%02x' % buf[(x + y * w)], end='') + print() + print("-->8--") + +w = 8 +h = 5 +buf = bytearray(w * h) +fbuf = framebuf.FrameBuffer(buf, w, h, framebuf.GS8) + +# fill +fbuf.fill(0x55) +printbuf() + +# put pixel +fbuf.pixel(0, 0, 0x11) +fbuf.pixel(w - 1, 0, 0x22) +fbuf.pixel(0, h - 1, 0x33) +fbuf.pixel(w - 1, h - 1, 0xff) +printbuf() + +# get pixel +print(hex(fbuf.pixel(0, h - 1)), hex(fbuf.pixel(1, 1))) diff --git a/tests/extmod/framebuf8.py.exp b/tests/extmod/framebuf8.py.exp new file mode 100644 index 0000000000000..01d8976fec941 --- /dev/null +++ b/tests/extmod/framebuf8.py.exp @@ -0,0 +1,15 @@ +--8<-- +5555555555555555 +5555555555555555 +5555555555555555 +5555555555555555 +5555555555555555 +-->8-- +--8<-- +1155555555555522 +5555555555555555 +5555555555555555 +5555555555555555 +33555555555555ff +-->8-- +0x33 0x55 diff --git a/tests/extmod/framebuf_subclass.py b/tests/extmod/framebuf_subclass.py new file mode 100644 index 0000000000000..6363c224fbb52 --- /dev/null +++ b/tests/extmod/framebuf_subclass.py @@ -0,0 +1,20 @@ +# test subclassing framebuf.FrameBuffer + +try: + import framebuf +except ImportError: + print('SKIP') + raise SystemExit + +class FB(framebuf.FrameBuffer): + def __init__(self, n): + self.n = n + super().__init__(bytearray(2 * n * n), n, n, framebuf.RGB565) + + def foo(self): + self.hline(0, 2, self.n, 0x0304) + +fb = FB(n=3) +fb.pixel(0, 0, 0x0102) +fb.foo() +print(bytes(fb)) diff --git a/tests/extmod/framebuf_subclass.py.exp b/tests/extmod/framebuf_subclass.py.exp new file mode 100644 index 0000000000000..23d53ccc62536 --- /dev/null +++ b/tests/extmod/framebuf_subclass.py.exp @@ -0,0 +1 @@ +b'\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x04\x03\x04\x03\x04\x03' diff --git a/tests/extmod/time_ms_us.py b/tests/extmod/time_ms_us.py index 31f07d31ba21a..135cf1e0967d6 100644 --- a/tests/extmod/time_ms_us.py +++ b/tests/extmod/time_ms_us.py @@ -7,5 +7,16 @@ utime.sleep_ms(1) utime.sleep_us(1) -print(utime.ticks_diff(utime.ticks_ms(), utime.ticks_ms()) <= 1) -print(utime.ticks_diff(utime.ticks_us(), utime.ticks_us()) <= 500) + +t0 = utime.ticks_ms() +t1 = utime.ticks_ms() +print(0 <= utime.ticks_diff(t1, t0) <= 1) + +t0 = utime.ticks_us() +t1 = utime.ticks_us() +print(0 <= utime.ticks_diff(t1, t0) <= 500) + +# ticks_cpu may not be implemented, at least make sure it doesn't decrease +t0 = utime.ticks_cpu() +t1 = utime.ticks_cpu() +print(utime.ticks_diff(t1, t0) >= 0) diff --git a/tests/extmod/time_ms_us.py.exp b/tests/extmod/time_ms_us.py.exp index dbde422651c9a..b8ca7e7ef092a 100644 --- a/tests/extmod/time_ms_us.py.exp +++ b/tests/extmod/time_ms_us.py.exp @@ -1,2 +1,3 @@ True True +True diff --git a/tests/extmod/ubinascii_a2b_base64.py b/tests/extmod/ubinascii_a2b_base64.py index 05a3169f3a815..5e642ec515a8f 100644 --- a/tests/extmod/ubinascii_a2b_base64.py +++ b/tests/extmod/ubinascii_a2b_base64.py @@ -28,6 +28,9 @@ print(binascii.a2b_base64(b'Zm9v===')) print(binascii.a2b_base64(b'Zm9v===YmFy')) +# Unicode strings can be decoded +print(binascii.a2b_base64(u'Zm9v===YmFy')) + try: print(binascii.a2b_base64(b'abc')) except ValueError: diff --git a/tests/extmod/ubinascii_b2a_base64.py b/tests/extmod/ubinascii_b2a_base64.py index f4bb69fe0c92a..283c3936d3dbc 100644 --- a/tests/extmod/ubinascii_b2a_base64.py +++ b/tests/extmod/ubinascii_b2a_base64.py @@ -20,3 +20,7 @@ print(binascii.b2a_base64(b'\x7f\x80\xff')) print(binascii.b2a_base64(b'1234ABCDabcd')) print(binascii.b2a_base64(b'\x00\x00>')) # convert into '+' +try: + print(binascii.b2a_base64('')) +except TypeError: + print("TypeError") diff --git a/tests/extmod/ubinascii_crc32.py b/tests/extmod/ubinascii_crc32.py index 89664a9b36517..a826662f116c2 100644 --- a/tests/extmod/ubinascii_crc32.py +++ b/tests/extmod/ubinascii_crc32.py @@ -22,3 +22,7 @@ print(hex(binascii.crc32(b'\x00' * 16, binascii.crc32(b'\x00' * 16)))) print(hex(binascii.crc32(b'\xff' * 16, binascii.crc32(b'\xff' * 16)))) print(hex(binascii.crc32(bytes(range(16, 32)), binascii.crc32(bytes(range(16)))))) +try: + binascii.crc32('') +except TypeError: + print("TypeError") diff --git a/tests/extmod/ubinascii_hexlify.py b/tests/extmod/ubinascii_hexlify.py index bc99287476fb9..dabc3c7e4ca8a 100644 --- a/tests/extmod/ubinascii_hexlify.py +++ b/tests/extmod/ubinascii_hexlify.py @@ -11,3 +11,7 @@ print(binascii.hexlify(b'\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f')) print(binascii.hexlify(b'\x7f\x80\xff')) print(binascii.hexlify(b'1234ABCDabcd')) +try: + binascii.hexlify('') +except TypeError: + print("TypeError") diff --git a/tests/extmod/ubinascii_unhexlify.py b/tests/extmod/ubinascii_unhexlify.py index 865abfe3a822e..41a1bd1b8f4a9 100644 --- a/tests/extmod/ubinascii_unhexlify.py +++ b/tests/extmod/ubinascii_unhexlify.py @@ -12,6 +12,9 @@ print(binascii.unhexlify(b'7f80ff')) print(binascii.unhexlify(b'313233344142434461626364')) +# Unicode strings can be decoded +print(binascii.unhexlify('313233344142434461626364')) + try: a = binascii.unhexlify(b'0') # odd buffer length except ValueError: diff --git a/tests/extmod/uctypes_bytearray.py b/tests/extmod/uctypes_bytearray.py index 61c7da271f10c..77c93c3766c40 100644 --- a/tests/extmod/uctypes_bytearray.py +++ b/tests/extmod/uctypes_bytearray.py @@ -17,3 +17,6 @@ print(S.arr) # But not INT8, because value range is different print(type(S.arr2)) + +# convert to buffer +print(bytearray(S)) diff --git a/tests/extmod/uctypes_bytearray.py.exp b/tests/extmod/uctypes_bytearray.py.exp index 294f8a5fa45a1..7c84edbb6db55 100644 --- a/tests/extmod/uctypes_bytearray.py.exp +++ b/tests/extmod/uctypes_bytearray.py.exp @@ -1,2 +1,3 @@ bytearray(b'01') +bytearray(b'0123') diff --git a/tests/extmod/uctypes_byteat.py b/tests/extmod/uctypes_byteat.py new file mode 100644 index 0000000000000..ab2535db8fe29 --- /dev/null +++ b/tests/extmod/uctypes_byteat.py @@ -0,0 +1,10 @@ +try: + import uctypes +except ImportError: + print("SKIP") + raise SystemExit + +data = bytearray(b'01234567') + +print(uctypes.bytes_at(uctypes.addressof(data), 4)) +print(uctypes.bytearray_at(uctypes.addressof(data), 4)) diff --git a/tests/extmod/uctypes_byteat.py.exp b/tests/extmod/uctypes_byteat.py.exp new file mode 100644 index 0000000000000..e1ae4d0534c95 --- /dev/null +++ b/tests/extmod/uctypes_byteat.py.exp @@ -0,0 +1,2 @@ +b'0123' +bytearray(b'0123') diff --git a/tests/extmod/uctypes_error.py b/tests/extmod/uctypes_error.py new file mode 100644 index 0000000000000..95ba0fad44e5f --- /dev/null +++ b/tests/extmod/uctypes_error.py @@ -0,0 +1,37 @@ +# test general errors with uctypes + +try: + import uctypes +except ImportError: + print("SKIP") + raise SystemExit + +data = bytearray(b"01234567") + +# del subscr not supported +S = uctypes.struct(uctypes.addressof(data), {}) +try: + del S[0] +except TypeError: + print('TypeError') + +# list is an invalid descriptor +S = uctypes.struct(uctypes.addressof(data), []) +try: + S.x +except TypeError: + print('TypeError') + +# can't access attribute with invalid descriptor +S = uctypes.struct(uctypes.addressof(data), {'x':[]}) +try: + S.x +except TypeError: + print('TypeError') + +# can't assign to aggregate +S = uctypes.struct(uctypes.addressof(data), {'x':(uctypes.ARRAY | 0, uctypes.INT8 | 2)}) +try: + S.x = 1 +except TypeError: + print('TypeError') diff --git a/tests/extmod/uctypes_error.py.exp b/tests/extmod/uctypes_error.py.exp new file mode 100644 index 0000000000000..802c260d2b76a --- /dev/null +++ b/tests/extmod/uctypes_error.py.exp @@ -0,0 +1,4 @@ +TypeError +TypeError +TypeError +TypeError diff --git a/tests/extmod/uctypes_sizeof.py b/tests/extmod/uctypes_sizeof.py index 5a6adb4376da5..e42e06c92469f 100644 --- a/tests/extmod/uctypes_sizeof.py +++ b/tests/extmod/uctypes_sizeof.py @@ -40,3 +40,8 @@ print(uctypes.sizeof(S.sub)) assert uctypes.sizeof(S.sub) == 1 +# invalid descriptor +try: + print(uctypes.sizeof([])) +except TypeError: + print("TypeError") diff --git a/tests/extmod/uctypes_sizeof.py.exp b/tests/extmod/uctypes_sizeof.py.exp index fb74def602b97..b35b11aa0cea9 100644 --- a/tests/extmod/uctypes_sizeof.py.exp +++ b/tests/extmod/uctypes_sizeof.py.exp @@ -4,3 +4,4 @@ TypeError 6 1 +TypeError diff --git a/tests/extmod/uctypes_sizeof_float.py b/tests/extmod/uctypes_sizeof_float.py new file mode 100644 index 0000000000000..1ba8871bdc62d --- /dev/null +++ b/tests/extmod/uctypes_sizeof_float.py @@ -0,0 +1,8 @@ +try: + import uctypes +except ImportError: + print("SKIP") + raise SystemExit + +print(uctypes.sizeof({'f':uctypes.FLOAT32})) +print(uctypes.sizeof({'f':uctypes.FLOAT64})) diff --git a/tests/extmod/uctypes_sizeof_float.py.exp b/tests/extmod/uctypes_sizeof_float.py.exp new file mode 100644 index 0000000000000..de78180725a82 --- /dev/null +++ b/tests/extmod/uctypes_sizeof_float.py.exp @@ -0,0 +1,2 @@ +4 +8 diff --git a/tests/extmod/uhashlib_sha1.py b/tests/extmod/uhashlib_sha1.py index 4f7066899aa11..9d6427b33ff9f 100644 --- a/tests/extmod/uhashlib_sha1.py +++ b/tests/extmod/uhashlib_sha1.py @@ -19,3 +19,10 @@ sha1 = hashlib.sha1(b'hello') sha1.update(b'world') print(sha1.digest()) + +sha1 = hashlib.sha1(b'hello') +try: + sha1.update(u'world') +except TypeError as e: + print("TypeError") +print(sha1.digest()) diff --git a/tests/extmod/uhashlib_sha256.py b/tests/extmod/uhashlib_sha256.py index 3200e8f5cd3d5..a793ea4930613 100644 --- a/tests/extmod/uhashlib_sha256.py +++ b/tests/extmod/uhashlib_sha256.py @@ -23,6 +23,16 @@ print(hashlib.sha256(b"\xff" * 64).digest()) +# 56 bytes is a boundary case in the algorithm +print(hashlib.sha256(b"\xff" * 56).digest()) + +sha256 = hashlib.sha256(b'hello') +try: + sha256.update(u'world') +except TypeError as e: + print("TypeError") +print(sha256.digest()) + # TODO: running .digest() several times in row is not supported() #h = hashlib.sha256(b'123') #print(h.digest()) diff --git a/tests/extmod/ujson_dump.py b/tests/extmod/ujson_dump.py new file mode 100644 index 0000000000000..b1cb4a9cbcdb2 --- /dev/null +++ b/tests/extmod/ujson_dump.py @@ -0,0 +1,30 @@ +try: + from uio import StringIO + import ujson as json +except: + try: + from io import StringIO + import json + except ImportError: + print("SKIP") + raise SystemExit + +s = StringIO() +json.dump(False, s) +print(s.getvalue()) + +s = StringIO() +json.dump({"a": (2, [3, None])}, s) +print(s.getvalue()) + +# dump to a small-int not allowed +try: + json.dump(123, 1) +except (AttributeError, OSError): # CPython and uPy have different errors + print('Exception') + +# dump to an object not allowed +try: + json.dump(123, {}) +except (AttributeError, OSError): # CPython and uPy have different errors + print('Exception') diff --git a/tests/extmod/ujson_dump_iobase.py b/tests/extmod/ujson_dump_iobase.py new file mode 100644 index 0000000000000..d30d1b561ee0c --- /dev/null +++ b/tests/extmod/ujson_dump_iobase.py @@ -0,0 +1,32 @@ +# test ujson.dump in combination with uio.IOBase + +try: + import uio as io + import ujson as json +except ImportError: + try: + import io, json + except ImportError: + print('SKIP') + raise SystemExit + +if not hasattr(io, 'IOBase'): + print('SKIP') + raise SystemExit + + +# a user stream that only has the write method +class S(io.IOBase): + def __init__(self): + self.buf = '' + def write(self, buf): + if type(buf) == bytearray: + # uPy passes a bytearray, CPython passes a str + buf = str(buf, 'ascii') + self.buf += buf + + +# dump to the user stream +s = S() +json.dump([123, {}], s) +print(s.buf) diff --git a/tests/extmod/ure1.py b/tests/extmod/ure1.py index 54471ed4f97c4..710720c8b6519 100644 --- a/tests/extmod/ure1.py +++ b/tests/extmod/ure1.py @@ -28,6 +28,19 @@ except IndexError: print("IndexError") +r = re.compile(r"\n") +m = r.match("\n") +print(m.group(0)) +m = r.match("\\") +print(m) +r = re.compile(r"[\n-\r]") +m = r.match("\n") +print(m.group(0)) +r = re.compile(r"[\]]") +m = r.match("]") +print(m.group(0)) +print("===") + r = re.compile("[a-cu-z]") m = r.match("a") print(m.group(0)) diff --git a/tests/extmod/ure_groups.py b/tests/extmod/ure_groups.py new file mode 100644 index 0000000000000..4fac896d7fdbb --- /dev/null +++ b/tests/extmod/ure_groups.py @@ -0,0 +1,33 @@ +# test match.groups() + +try: + import ure as re +except ImportError: + try: + import re + except ImportError: + print("SKIP") + raise SystemExit + +try: + m = re.match(".", "a") + m.groups +except AttributeError: + print('SKIP') + raise SystemExit + + +m = re.match(r'(([0-9]*)([a-z]*)[0-9]*)','1234hello567') +print(m.groups()) + +m = re.match(r'([0-9]*)(([a-z]*)([0-9]*))','1234hello567') +print(m.groups()) + +# optional group that matches +print(re.match(r'(a)?b(c)', 'abc').groups()) + +# optional group that doesn't match +print(re.match(r'(a)?b(c)', 'bc').groups()) + +# only a single match +print(re.match(r'abc', 'abc').groups()) diff --git a/tests/extmod/ure_span.py b/tests/extmod/ure_span.py new file mode 100644 index 0000000000000..50f44399ce714 --- /dev/null +++ b/tests/extmod/ure_span.py @@ -0,0 +1,40 @@ +# test match.span(), and nested spans + +try: + import ure as re +except ImportError: + try: + import re + except ImportError: + print("SKIP") + raise SystemExit + +try: + m = re.match(".", "a") + m.span +except AttributeError: + print('SKIP') + raise SystemExit + + +def print_spans(match): + print('----') + try: + i = 0 + while True: + print(match.span(i), match.start(i), match.end(i)) + i += 1 + except IndexError: + pass + +m = re.match(r'(([0-9]*)([a-z]*)[0-9]*)','1234hello567') +print_spans(m) + +m = re.match(r'([0-9]*)(([a-z]*)([0-9]*))','1234hello567') +print_spans(m) + +# optional span that matches +print_spans(re.match(r'(a)?b(c)', 'abc')) + +# optional span that doesn't match +print_spans(re.match(r'(a)?b(c)', 'bc')) diff --git a/tests/extmod/ure_sub.py b/tests/extmod/ure_sub.py new file mode 100644 index 0000000000000..4aeb8650a18e7 --- /dev/null +++ b/tests/extmod/ure_sub.py @@ -0,0 +1,61 @@ +try: + import ure as re +except ImportError: + try: + import re + except ImportError: + print('SKIP') + raise SystemExit + +try: + re.sub +except AttributeError: + print('SKIP') + raise SystemExit + + +def multiply(m): + return str(int(m.group(0)) * 2) + +print(re.sub("\d+", multiply, "10 20 30 40 50")) + +print(re.sub("\d+", lambda m: str(int(m.group(0)) // 2), "10 20 30 40 50")) + +def A(): + return "A" +print(re.sub('a', A(), 'aBCBABCDabcda.')) + +print( + re.sub( + r'def\s+([a-zA-Z_][a-zA-Z_0-9]*)\s*\(\s*\):', + 'static PyObject*\npy_\\1(void){\n return;\n}\n', + '\n\ndef myfunc():\n\ndef myfunc1():\n\ndef myfunc2():' + ) +) + +print( + re.compile( + '(calzino) (blu|bianco|verde) e (scarpa) (blu|bianco|verde)' + ).sub( + r'\g<1> colore \2 con \g<3> colore \4? ...', + 'calzino blu e scarpa verde' + ) +) + +# no matches at all +print(re.sub('a', 'b', 'c')) + +# with maximum substitution count specified +print(re.sub('a', 'b', '1a2a3a', 2)) + +# invalid group +try: + re.sub('(a)', 'b\\2', 'a') +except: + print('invalid group') + +# invalid group with very large number (to test overflow in uPy) +try: + re.sub('(a)', 'b\\199999999999999999999999999999999999999', 'a') +except: + print('invalid group') diff --git a/tests/extmod/ure_sub_unmatched.py b/tests/extmod/ure_sub_unmatched.py new file mode 100644 index 0000000000000..4795b3196f466 --- /dev/null +++ b/tests/extmod/ure_sub_unmatched.py @@ -0,0 +1,19 @@ +# test re.sub with unmatched groups, behaviour changed in CPython 3.5 + +try: + import ure as re +except ImportError: + try: + import re + except ImportError: + print('SKIP') + raise SystemExit + +try: + re.sub +except AttributeError: + print('SKIP') + raise SystemExit + +# first group matches, second optional group doesn't so is replaced with a blank +print(re.sub(r'(a)(b)?', r'\2-\1', '1a2')) diff --git a/tests/extmod/ure_sub_unmatched.py.exp b/tests/extmod/ure_sub_unmatched.py.exp new file mode 100644 index 0000000000000..1e5f0fda0554d --- /dev/null +++ b/tests/extmod/ure_sub_unmatched.py.exp @@ -0,0 +1 @@ +1-a2 diff --git a/tests/extmod/uzlib_decompress.py b/tests/extmod/uzlib_decompress.py index 63247955c9565..dd6e4876fa345 100644 --- a/tests/extmod/uzlib_decompress.py +++ b/tests/extmod/uzlib_decompress.py @@ -15,7 +15,9 @@ (bytes(range(64)), b'x\x9cc`dbfaec\xe7\xe0\xe4\xe2\xe6\xe1\xe5\xe3\x17\x10\x14\x12\x16\x11\x15\x13\x97\x90\x94\x92\x96\x91\x95\x93WPTRVQUS\xd7\xd0\xd4\xd2\xd6\xd1\xd5\xd370426153\xb7\xb0\xb4\xb2\xb6\xb1\xb5\xb3\x07\x00\xaa\xe0\x07\xe1'), (b'hello', b'x\x01\x01\x05\x00\xfa\xffhello\x06,\x02\x15'), # compression level 0 # adaptive/dynamic huffman tree - (b'13371813150|13764518736|12345678901', b'x\x9c\x05\xc1\x81\x01\x000\x04\x04\xb1\x95\\\x1f\xcfn\x86o\x82d\x06Qq\xc8\x9d\xc5X}I}\x00\x951D>I}\x00\x951D>I}\x00\x951D>I}\x00\x951D', b'x\x9c\x05\xc11\x01\x00\x00\x00\x010\x95\x14py\x84\x12C_\x9bR\x8cV\x8a\xd1J1Z)F\x1fw`\x089'), ] for unpacked, packed in PATTERNS: @@ -41,3 +43,9 @@ zlib.decompress(b'abc') except Exception: print("Exception") + +# invalid block type +try: + zlib.decompress(b'\x07', -15) # final-block, block-type=3 (invalid) +except Exception as er: + print('Exception') diff --git a/tests/extmod/vfs_basic.py b/tests/extmod/vfs_basic.py index 4fc67d34b227d..fbcc92bade711 100644 --- a/tests/extmod/vfs_basic.py +++ b/tests/extmod/vfs_basic.py @@ -1,11 +1,7 @@ # test VFS functionality without any particular filesystem type try: - try: - import uos_vfs as uos - open = uos.vfs_open - except ImportError: - import uos + import uos uos.mount except (ImportError, AttributeError): print("SKIP") diff --git a/tests/extmod/vfs_fat_fileio1.py b/tests/extmod/vfs_fat_fileio1.py index 8b9ff92eb8668..4635ca84b53ad 100644 --- a/tests/extmod/vfs_fat_fileio1.py +++ b/tests/extmod/vfs_fat_fileio1.py @@ -1,10 +1,6 @@ try: import uerrno - try: - import uos_vfs as uos - open = uos.vfs_open - except ImportError: - import uos + import uos except ImportError: print("SKIP") raise SystemExit @@ -27,11 +23,13 @@ def readblocks(self, n, buf): #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) for i in range(len(buf)): buf[i] = self.data[n * self.SEC_SIZE + i] + return 0 def writeblocks(self, n, buf): #print("writeblocks(%s, %x)" % (n, id(buf))) for i in range(len(buf)): self.data[n * self.SEC_SIZE + i] = buf[i] + return 0 def ioctl(self, op, arg): #print("ioctl(%d, %r)" % (op, arg)) @@ -113,3 +111,29 @@ def ioctl(self, op, arg): vfs.remove("foo_file.txt") print(list(vfs.ilistdir())) + +# Here we test that opening a file with the heap locked fails correctly. This +# is a special case because file objects use a finaliser and allocating with a +# finaliser is a different path to normal allocation. It would be better to +# test this in the core tests but there are no core objects that use finaliser. +import micropython +micropython.heap_lock() +try: + vfs.open('x', 'r') +except MemoryError: + print('MemoryError') +micropython.heap_unlock() + +# Here we test that the finaliser is actually called during a garbage collection. +import gc +N = 4 +for i in range(N): + n = 'x%d' % i + f = vfs.open(n, 'w') + f.write(n) + f = None # release f without closing + [0, 1, 2, 3] # use up Python stack so f is really gone +gc.collect() # should finalise all N files by closing them +for i in range(N): + with vfs.open('x%d' % i, 'r') as f: + print(f.read()) diff --git a/tests/extmod/vfs_fat_fileio1.py.exp b/tests/extmod/vfs_fat_fileio1.py.exp index a66f07605c574..4eb50402c45e9 100644 --- a/tests/extmod/vfs_fat_fileio1.py.exp +++ b/tests/extmod/vfs_fat_fileio1.py.exp @@ -10,4 +10,9 @@ e o d True -[('foo_dir', 16384, 0)] +[('foo_dir', 16384, 0, 0)] +MemoryError +x0 +x1 +x2 +x3 diff --git a/tests/extmod/vfs_fat_fileio2.py b/tests/extmod/vfs_fat_fileio2.py index b5adb75c96939..ab9623ddf8cd6 100644 --- a/tests/extmod/vfs_fat_fileio2.py +++ b/tests/extmod/vfs_fat_fileio2.py @@ -1,10 +1,6 @@ try: import uerrno - try: - import uos_vfs as uos - open = uos.vfs_open - except ImportError: - import uos + import uos except ImportError: print("SKIP") raise SystemExit @@ -27,11 +23,13 @@ def readblocks(self, n, buf): #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) for i in range(len(buf)): buf[i] = self.data[n * self.SEC_SIZE + i] + return 0 def writeblocks(self, n, buf): #print("writeblocks(%s, %x)" % (n, id(buf))) for i in range(len(buf)): self.data[n * self.SEC_SIZE + i] = buf[i] + return 0 def ioctl(self, op, arg): #print("ioctl(%d, %r)" % (op, arg)) diff --git a/tests/extmod/vfs_fat_fileio2.py.exp b/tests/extmod/vfs_fat_fileio2.py.exp index 118dee26b5458..2684053641a90 100644 --- a/tests/extmod/vfs_fat_fileio2.py.exp +++ b/tests/extmod/vfs_fat_fileio2.py.exp @@ -3,9 +3,9 @@ True True b'data in file' True -[('sub_file.txt', 32768, 0), ('file.txt', 32768, 0)] -[('foo_dir', 16384, 0), ('moved-to-root.txt', 32768, 0)] -[('foo_dir', 16384, 0), ('moved-to-root.txt', 32768, 0)] +[('sub_file.txt', 32768, 0, 11), ('file.txt', 32768, 0, 12)] +[('foo_dir', 16384, 0, 0), ('moved-to-root.txt', 32768, 0, 12)] +[('foo_dir', 16384, 0, 0), ('moved-to-root.txt', 32768, 0, 8)] new text -[('moved-to-root.txt', 32768, 0)] +[('moved-to-root.txt', 32768, 0, 8)] ENOSPC: True diff --git a/tests/extmod/vfs_fat_more.py b/tests/extmod/vfs_fat_more.py index baec96787bb45..8ddaf49fc255c 100644 --- a/tests/extmod/vfs_fat_more.py +++ b/tests/extmod/vfs_fat_more.py @@ -1,10 +1,6 @@ import uerrno try: - try: - import uos_vfs as uos - open = uos.vfs_open - except ImportError: - import uos + import uos except ImportError: print("SKIP") raise SystemExit @@ -27,11 +23,13 @@ def readblocks(self, n, buf): #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) for i in range(len(buf)): buf[i] = self.data[n * self.SEC_SIZE + i] + return 0 def writeblocks(self, n, buf): #print("writeblocks(%s, %x)" % (n, id(buf))) for i in range(len(buf)): self.data[n * self.SEC_SIZE + i] = buf[i] + return 0 def ioctl(self, op, arg): #print("ioctl(%d, %r)" % (op, arg)) @@ -114,3 +112,11 @@ def ioctl(self, op, arg): print(uos.getcwd()) print(uos.listdir()) print(uos.listdir('sys')) + +# test importing a file from a mounted FS +import sys +sys.path.clear() +sys.path.append('/sys') +with open('sys/test_module.py', 'w') as f: + f.write('print("test_module!")') +import test_module diff --git a/tests/extmod/vfs_fat_more.py.exp b/tests/extmod/vfs_fat_more.py.exp index aaca3cc75e6cb..24429ee09542e 100644 --- a/tests/extmod/vfs_fat_more.py.exp +++ b/tests/extmod/vfs_fat_more.py.exp @@ -26,3 +26,4 @@ mkdir OSError True / ['sys'] [] +test_module! diff --git a/tests/extmod/vfs_fat_oldproto.py b/tests/extmod/vfs_fat_oldproto.py index ef4f1da78ee53..b671f3db2b59e 100644 --- a/tests/extmod/vfs_fat_oldproto.py +++ b/tests/extmod/vfs_fat_oldproto.py @@ -1,9 +1,6 @@ try: import uerrno - try: - import uos_vfs as uos - except ImportError: - import uos + import uos except ImportError: print("SKIP") raise SystemExit @@ -25,11 +22,13 @@ def readblocks(self, n, buf): #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) for i in range(len(buf)): buf[i] = self.data[n * self.SEC_SIZE + i] + return 0 def writeblocks(self, n, buf): #print("writeblocks(%s, %x)" % (n, id(buf))) for i in range(len(buf)): self.data[n * self.SEC_SIZE + i] = buf[i] + return 0 def sync(self): pass diff --git a/tests/extmod/vfs_fat_oldproto.py.exp b/tests/extmod/vfs_fat_oldproto.py.exp index ab8338cbba35a..b974683167c17 100644 --- a/tests/extmod/vfs_fat_oldproto.py.exp +++ b/tests/extmod/vfs_fat_oldproto.py.exp @@ -1,3 +1,3 @@ -[('file.txt', 32768, 0)] +[('file.txt', 32768, 0, 6)] hello! [] diff --git a/tests/extmod/vfs_fat_ramdisk.py b/tests/extmod/vfs_fat_ramdisk.py index 801c697862043..30a94ec4e114d 100644 --- a/tests/extmod/vfs_fat_ramdisk.py +++ b/tests/extmod/vfs_fat_ramdisk.py @@ -1,9 +1,6 @@ try: import uerrno - try: - import uos_vfs as uos - except ImportError: - import uos + import uos except ImportError: print("SKIP") raise SystemExit @@ -26,11 +23,13 @@ def readblocks(self, n, buf): #print("readblocks(%s, %x(%d))" % (n, id(buf), len(buf))) for i in range(len(buf)): buf[i] = self.data[n * self.SEC_SIZE + i] + return 0 def writeblocks(self, n, buf): #print("writeblocks(%s, %x)" % (n, id(buf))) for i in range(len(buf)): self.data[n * self.SEC_SIZE + i] = buf[i] + return 0 def ioctl(self, op, arg): #print("ioctl(%d, %r)" % (op, arg)) @@ -54,6 +53,8 @@ def ioctl(self, op, arg): vfs = uos.VfsFat(bdev) uos.mount(vfs, "/ramdisk") +vfs.label = 'label test' +print("label:", vfs.label) print("statvfs:", vfs.statvfs("/ramdisk")) print("getcwd:", vfs.getcwd()) diff --git a/tests/extmod/vfs_fat_ramdisk.py.exp b/tests/extmod/vfs_fat_ramdisk.py.exp index ccd0f7134c801..704408cd0b231 100644 --- a/tests/extmod/vfs_fat_ramdisk.py.exp +++ b/tests/extmod/vfs_fat_ramdisk.py.exp @@ -1,10 +1,11 @@ True True +label: LABEL TEST statvfs: (512, 512, 16, 16, 16, 0, 0, 0, 0, 255) getcwd: / True -[('foo_file.txt', 32768, 0)] -stat root: (16384, 0, 0, 0, 0, 0, 0, 0, 0, 0) +[('foo_file.txt', 32768, 0, 6)] +stat root: (16384, 0, 0, 0, 0, 0, 0, 946684800, 946684800, 946684800) stat file: (32768, 0, 0, 0, 0, 0, 6) True True @@ -12,5 +13,5 @@ getcwd: /foo_dir [] True getcwd: / -[(b'foo_file.txt', 32768, 0), (b'foo_dir', 16384, 0)] +[(b'foo_file.txt', 32768, 0, 6), (b'foo_dir', 16384, 0, 0)] ENOENT: True diff --git a/tests/extmod/vfs_userfs.py b/tests/extmod/vfs_userfs.py new file mode 100644 index 0000000000000..e913f9748c1c7 --- /dev/null +++ b/tests/extmod/vfs_userfs.py @@ -0,0 +1,68 @@ +# test VFS functionality with a user-defined filesystem +# also tests parts of uio.IOBase implementation + +import sys, uio + +try: + uio.IOBase + import uos + uos.mount +except (ImportError, AttributeError): + print("SKIP") + raise SystemExit + + +class UserFile(uio.IOBase): + def __init__(self, data): + self.data = data + self.pos = 0 + def read(self): + return self.data + def readinto(self, buf): + n = 0 + while n < len(buf) and self.pos < len(self.data): + buf[n] = self.data[self.pos] + n += 1 + self.pos += 1 + return n + def ioctl(self, req, arg): + print('ioctl', req, arg) + return 0 + + +class UserFS: + def __init__(self, files): + self.files = files + def mount(self, readonly, mksfs): + pass + def umount(self): + pass + def stat(self, path): + print('stat', path) + if path in self.files: + return (32768, 0, 0, 0, 0, 0, 0, 0, 0, 0) + raise OSError + def open(self, path, mode): + print('open', path, mode) + return UserFile(self.files[path]) + + +# create and mount a user filesystem +user_files = { + '/data.txt': b"some data in a text file\n", + '/usermod1.py': b"print('in usermod1')\nimport usermod2", + '/usermod2.py': b"print('in usermod2')", +} +uos.mount(UserFS(user_files), '/userfs') + +# open and read a file +f = open('/userfs/data.txt') +print(f.read()) + +# import files from the user filesystem +sys.path.append('/userfs') +import usermod1 + +# unmount and undo path addition +uos.umount('/userfs') +sys.path.pop() diff --git a/tests/extmod/vfs_userfs.py.exp b/tests/extmod/vfs_userfs.py.exp new file mode 100644 index 0000000000000..6a4d925b91e8b --- /dev/null +++ b/tests/extmod/vfs_userfs.py.exp @@ -0,0 +1,12 @@ +open /data.txt r +b'some data in a text file\n' +stat /usermod1 +stat /usermod1.py +open /usermod1.py r +ioctl 4 0 +in usermod1 +stat /usermod2 +stat /usermod2.py +open /usermod2.py r +ioctl 4 0 +in usermod2 diff --git a/tests/float/builtin_float_hash.py b/tests/float/builtin_float_hash.py index ba6b639073d85..7a7e374010104 100644 --- a/tests/float/builtin_float_hash.py +++ b/tests/float/builtin_float_hash.py @@ -3,6 +3,7 @@ # these should hash to an integer with a specific value for val in ( '0.0', + '-0.0', '1.0', '2.0', '-12.0', @@ -15,6 +16,8 @@ '0.1', '-0.1', '10.3', + '0.4e3', + '1e16', 'inf', '-inf', 'nan', diff --git a/tests/float/builtin_float_pow.py b/tests/float/builtin_float_pow.py new file mode 100644 index 0000000000000..2de1b481763f3 --- /dev/null +++ b/tests/float/builtin_float_pow.py @@ -0,0 +1,11 @@ +# test builtin pow function with float args + +print(pow(0.0, 0.0)) +print(pow(0, 1.0)) +print(pow(1.0, 1)) +print(pow(2.0, 3.0)) +print(pow(2.0, -4.0)) + +print(pow(0.0, float('inf'))) +print(pow(0.0, float('-inf'))) +print(pow(0.0, float('nan'))) diff --git a/tests/float/float1.py b/tests/float/float1.py index c64f965a7d7cd..54807e5ac9c27 100644 --- a/tests/float/float1.py +++ b/tests/float/float1.py @@ -36,6 +36,10 @@ except ValueError: print("ValueError") +# construct from something with the buffer protocol +print(float(b"1.2")) +print(float(bytearray(b"3.4"))) + # unary operators print(bool(0.0)) print(bool(1.2)) diff --git a/tests/float/float_format.py b/tests/float/float_format.py new file mode 100644 index 0000000000000..d43535cf2ff4f --- /dev/null +++ b/tests/float/float_format.py @@ -0,0 +1,19 @@ +# test float formatting + +# general rounding +for val in (116, 1111, 1234, 5010, 11111): + print('%.0f' % val) + print('%.1f' % val) + print('%.3f' % val) + +# make sure rounding is done at the correct precision +for prec in range(8): + print(('%%.%df' % prec) % 6e-5) + +# check certain cases that had a digit value of 10 render as a ":" character +print('%.2e' % float('9' * 51 + 'e-39')) +print('%.2e' % float('9' * 40 + 'e-21')) + +# check a case that would render negative digit values, eg ")" characters +# the string is converted back to a float to check for no illegal characters +float('%.23e' % 1e-80) diff --git a/tests/float/float_parse.py b/tests/float/float_parse.py new file mode 100644 index 0000000000000..4b026de1c8103 --- /dev/null +++ b/tests/float/float_parse.py @@ -0,0 +1,32 @@ +# test parsing of floats + +inf = float('inf') + +# it shouldn't matter where the decimal point is if the exponent balances the value +print(float('1234') - float('0.1234e4')) +print(float('1.015625') - float('1015625e-6')) + +# very large integer part with a very negative exponent should cancel out +print('%.4e' % float('9' * 60 + 'e-60')) +print('%.4e' % float('9' * 60 + 'e-40')) + +# many fractional digits +print(float('.' + '9' * 70)) +print(float('.' + '9' * 70 + 'e20')) +print(float('.' + '9' * 70 + 'e-50') == float('1e-50')) + +# tiny fraction with large exponent +print(float('.' + '0' * 60 + '1e10') == float('1e-51')) +print(float('.' + '0' * 60 + '9e25') == float('9e-36')) +print(float('.' + '0' * 60 + '9e40') == float('9e-21')) + +# ensure that accuracy is retained when value is close to a subnormal +print(float('1.00000000000000000000e-37')) +print(float('10.0000000000000000000e-38')) +print(float('100.000000000000000000e-39')) + +# very large exponent literal +print(float('1e4294967301')) +print(float('1e-4294967301')) +print(float('1e18446744073709551621')) +print(float('1e-18446744073709551621')) diff --git a/tests/float/float_parse_doubleprec.py b/tests/float/float_parse_doubleprec.py new file mode 100644 index 0000000000000..dcc0dd5921544 --- /dev/null +++ b/tests/float/float_parse_doubleprec.py @@ -0,0 +1,21 @@ +# test parsing of floats, requiring double-precision + +# very large integer part with a very negative exponent should cancel out +print(float('9' * 400 + 'e-100')) +print(float('9' * 400 + 'e-200')) +print(float('9' * 400 + 'e-400')) + +# many fractional digits +print(float('.' + '9' * 400)) +print(float('.' + '9' * 400 + 'e100')) +print(float('.' + '9' * 400 + 'e-100')) + +# tiny fraction with large exponent +print('%.14e' % float('.' + '0' * 400 + '9e100')) +print('%.14e' % float('.' + '0' * 400 + '9e200')) +print('%.14e' % float('.' + '0' * 400 + '9e400')) + +# ensure that accuracy is retained when value is close to a subnormal +print(float('1.00000000000000000000e-307')) +print(float('10.0000000000000000000e-308')) +print(float('100.000000000000000000e-309')) diff --git a/tests/float/python36.py b/tests/float/python36.py new file mode 100644 index 0000000000000..6e8fb1f21385b --- /dev/null +++ b/tests/float/python36.py @@ -0,0 +1,10 @@ +# tests for things that only Python 3.6 supports, needing floats + +# underscores in numeric literals +print(1_000.1_8) +print('%.2g' % 1e1_2) + +# underscore supported by int/float constructors +print(float('1_2_3')) +print(float('1_2_3.4')) +print('%.2g' % float('1e1_3')) diff --git a/tests/float/python36.py.exp b/tests/float/python36.py.exp new file mode 100644 index 0000000000000..3febfed9a0974 --- /dev/null +++ b/tests/float/python36.py.exp @@ -0,0 +1,5 @@ +1000.18 +1e+12 +123.0 +123.4 +1e+13 diff --git a/tests/import/import_override.py.exp b/tests/import/import_override.py.exp new file mode 100644 index 0000000000000..365248da6d847 --- /dev/null +++ b/tests/import/import_override.py.exp @@ -0,0 +1,2 @@ +import import1b None 0 +456 diff --git a/tests/import/mpy_invalid.py b/tests/import/mpy_invalid.py new file mode 100644 index 0000000000000..b9dd99a4408f5 --- /dev/null +++ b/tests/import/mpy_invalid.py @@ -0,0 +1,67 @@ +# test importing of invalid .mpy files + +import sys, uio + +try: + uio.IOBase + import uos + uos.mount +except (ImportError, AttributeError): + print("SKIP") + raise SystemExit + + +class UserFile(uio.IOBase): + def __init__(self, data): + self.data = data + self.pos = 0 + def read(self): + return self.data + def readinto(self, buf): + n = 0 + while n < len(buf) and self.pos < len(self.data): + buf[n] = self.data[self.pos] + n += 1 + self.pos += 1 + return n + def ioctl(self, req, arg): + return 0 + + +class UserFS: + def __init__(self, files): + self.files = files + def mount(self, readonly, mksfs): + pass + def umount(self): + pass + def stat(self, path): + if path in self.files: + return (32768, 0, 0, 0, 0, 0, 0, 0, 0, 0) + raise OSError + def open(self, path, mode): + return UserFile(self.files[path]) + + +# these are the test .mpy files +user_files = { + '/mod0.mpy': b'', # empty file + '/mod1.mpy': b'M', # too short header + '/mod2.mpy': b'M\x00\x00\x00', # bad version +} + +# create and mount a user filesystem +uos.mount(UserFS(user_files), '/userfs') +sys.path.append('/userfs') + +# import .mpy files from the user filesystem +for i in range(len(user_files)): + mod = 'mod%u' % i + try: + __import__(mod) + except Exception as e: + print(mod, type(e).__name__, e) + +# unmount and undo path addition +uos.umount('/userfs') +sys.path.pop() diff --git a/tests/import/mpy_invalid.py.exp b/tests/import/mpy_invalid.py.exp new file mode 100644 index 0000000000000..197eb4f7b2f50 --- /dev/null +++ b/tests/import/mpy_invalid.py.exp @@ -0,0 +1,3 @@ +mod0 RuntimeError Corrupt .mpy file +mod1 RuntimeError Corrupt .mpy file +mod2 MpyError Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/mpy-update for more info. diff --git a/tests/io/builtin_print_file.py b/tests/io/builtin_print_file.py new file mode 100644 index 0000000000000..d9b8e2a960adb --- /dev/null +++ b/tests/io/builtin_print_file.py @@ -0,0 +1,17 @@ +# test builtin print function, using file= argument + +import sys + +try: + sys.stdout +except AttributeError: + print('SKIP') + raise SystemExit + +print(file=sys.stdout) +print('test', file=sys.stdout) + +try: + print(file=1) +except (AttributeError, OSError): # CPython and uPy differ in error message + print('Error') diff --git a/tests/io/bytesio_ext2.py b/tests/io/bytesio_ext2.py index c07ad900c9b18..8f624fd58c569 100644 --- a/tests/io/bytesio_ext2.py +++ b/tests/io/bytesio_ext2.py @@ -10,4 +10,4 @@ # CPython throws ValueError, but MicroPython has consistent stream # interface, so BytesIO raises the same error as a real file, which # is OSError(EINVAL). - print(repr(e)) + print(type(e), e.args[0] > 0) diff --git a/tests/io/bytesio_ext2.py.exp b/tests/io/bytesio_ext2.py.exp index b52e4978aa523..724aaf63a2733 100644 --- a/tests/io/bytesio_ext2.py.exp +++ b/tests/io/bytesio_ext2.py.exp @@ -1 +1 @@ -OSError(22,) + True diff --git a/tests/io/iobase.py b/tests/io/iobase.py new file mode 100644 index 0000000000000..6f554b00f082d --- /dev/null +++ b/tests/io/iobase.py @@ -0,0 +1,19 @@ +try: + import uio as io +except: + import io + +try: + io.IOBase +except AttributeError: + print('SKIP') + raise SystemExit + + +class MyIO(io.IOBase): + def write(self, buf): + # CPython and uPy pass in different types for buf (str vs bytearray) + print('write', len(buf)) + return len(buf) + +print('test', file=MyIO()) diff --git a/tests/micropython/extreme_exc.py b/tests/micropython/extreme_exc.py new file mode 100644 index 0000000000000..b9db9640681b4 --- /dev/null +++ b/tests/micropython/extreme_exc.py @@ -0,0 +1,85 @@ +# test some extreme cases of allocating exceptions and tracebacks + +import micropython + +# Check for stackless build, which can't call functions without +# allocating a frame on the heap. +try: + def stackless(): pass + micropython.heap_lock(); stackless(); micropython.heap_unlock() +except RuntimeError: + print("SKIP") + raise SystemExit + +# some ports need to allocate heap for the emergency exception +try: + micropython.alloc_emergency_exception_buf(256) +except AttributeError: + pass + +def main(): + # create an exception with many args while heap is locked + # should revert to empty tuple for args + micropython.heap_lock() + e = Exception(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) + micropython.heap_unlock() + print(repr(e)) + + # create an exception with a long formatted error message while heap is locked + # should use emergency exception buffer and truncate the message + def f(): + pass + micropython.heap_lock() + try: + f(abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz=1) + except Exception as er: + e = er + micropython.heap_unlock() + print(repr(e)[:10]) + + # create an exception with a long formatted error message while heap is low + # should use the heap and truncate the message + lst = [] + while 1: + try: + lst = [lst] + except MemoryError: + break + try: + f(abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz=1) + except Exception as er: + e = er + lst[0] = None + lst = None + print(repr(e)[:10]) + + # raise a deep exception with the heap locked + # should use emergency exception and be unable to resize traceback array + def g(): + g() + micropython.heap_lock() + try: + g() + except Exception as er: + e = er + micropython.heap_unlock() + print(repr(e)[:13]) + + # create an exception on the heap with some traceback on the heap, but then + # raise it with the heap locked so it can't allocate any more traceback + exc = Exception('my exception') + try: + raise exc + except: + pass + def h(e): + raise e + micropython.heap_lock() + try: + h(exc) + except Exception as er: + e = er + micropython.heap_unlock() + print(repr(e)) + +main() diff --git a/tests/micropython/extreme_exc.py.exp b/tests/micropython/extreme_exc.py.exp new file mode 100644 index 0000000000000..956257e4cde07 --- /dev/null +++ b/tests/micropython/extreme_exc.py.exp @@ -0,0 +1,5 @@ +Exception() +TypeError( +TypeError( +RuntimeError( +Exception('my exception',) diff --git a/tests/micropython/heap_lock.py b/tests/micropython/heap_lock.py index 0f0a70eff1bf8..ca3f5806a84eb 100644 --- a/tests/micropython/heap_lock.py +++ b/tests/micropython/heap_lock.py @@ -2,13 +2,24 @@ import micropython +l = [] +l2 = list(range(100)) + micropython.heap_lock() +# general allocation on the heap try: print([]) except MemoryError: print('MemoryError') +# expansion of a heap block +try: + l.extend(l2) +except MemoryError: + print('MemoryError') + micropython.heap_unlock() +# check that allocation works after an unlock print([]) diff --git a/tests/micropython/heap_lock.py.exp b/tests/micropython/heap_lock.py.exp index 67b208cfc5b37..819c32663471a 100644 --- a/tests/micropython/heap_lock.py.exp +++ b/tests/micropython/heap_lock.py.exp @@ -1,2 +1,3 @@ MemoryError +MemoryError [] diff --git a/tests/micropython/heapalloc.py b/tests/micropython/heapalloc.py index 62f26df6afd80..f74bb92c85533 100644 --- a/tests/micropython/heapalloc.py +++ b/tests/micropython/heapalloc.py @@ -2,6 +2,15 @@ import micropython +# Check for stackless build, which can't call functions without +# allocating a frame on heap. +try: + def stackless(): pass + micropython.heap_lock(); stackless(); micropython.heap_unlock() +except RuntimeError: + print("SKIP") + raise SystemExit + def f1(a): print(a) diff --git a/tests/micropython/heapalloc_exc_raise.py b/tests/micropython/heapalloc_exc_raise.py index d60e14ce5de6f..fb63a84bf367a 100644 --- a/tests/micropython/heapalloc_exc_raise.py +++ b/tests/micropython/heapalloc_exc_raise.py @@ -5,6 +5,7 @@ e = ValueError("error") def func(): + micropython.heap_lock() try: # This works as is because traceback is not allocated # if not possible (heap is locked, no memory). If heap @@ -16,8 +17,7 @@ def func(): raise e except Exception as e2: print(e2) + micropython.heap_unlock() -micropython.heap_lock() func() print("ok") -micropython.heap_unlock() diff --git a/tests/micropython/heapalloc_iter.py b/tests/micropython/heapalloc_iter.py index 79461f999afea..163e1721115dc 100644 --- a/tests/micropython/heapalloc_iter.py +++ b/tests/micropython/heapalloc_iter.py @@ -1,7 +1,8 @@ # test that iterating doesn't use the heap try: + frozenset import array -except ImportError: +except (NameError, ImportError): print("SKIP") raise SystemExit @@ -11,8 +12,10 @@ heap_lock = heap_unlock = lambda:0 def do_iter(l): + heap_lock() for i in l: print(i) + heap_unlock() def gen_func(): yield 1 @@ -55,7 +58,6 @@ def gen_func(): heap_unlock() # test iterating over collections with the heap locked -heap_lock() do_iter(b'123') do_iter(ba) do_iter(ar) @@ -66,4 +68,3 @@ def gen_func(): do_iter(fs) do_iter(g1) do_iter(g2) -heap_unlock() diff --git a/tests/micropython/heapalloc_super.py b/tests/micropython/heapalloc_super.py index 1cf5293d2d286..a8c23393e487d 100644 --- a/tests/micropython/heapalloc_super.py +++ b/tests/micropython/heapalloc_super.py @@ -1,6 +1,15 @@ # test super() operations which don't require allocation import micropython +# Check for stackless build, which can't call functions without +# allocating a frame on heap. +try: + def stackless(): pass + micropython.heap_lock(); stackless(); micropython.heap_unlock() +except RuntimeError: + print("SKIP") + raise SystemExit + class A: def foo(self): print('A foo') diff --git a/tests/micropython/heapalloc_traceback.py b/tests/micropython/heapalloc_traceback.py index f4212b6ce18e7..813dea4b2187c 100644 --- a/tests/micropython/heapalloc_traceback.py +++ b/tests/micropython/heapalloc_traceback.py @@ -16,17 +16,17 @@ pass def test(): + micropython.heap_lock() global global_exc global_exc.__traceback__ = None try: raise global_exc except StopIteration: print('StopIteration') + micropython.heap_unlock() # call test() with heap allocation disabled -micropython.heap_lock() test() -micropython.heap_unlock() # print the exception that was raised buf = uio.StringIO() diff --git a/tests/micropython/heapalloc_traceback.py.exp b/tests/micropython/heapalloc_traceback.py.exp index 291bbd697c4af..facd0af1379bc 100644 --- a/tests/micropython/heapalloc_traceback.py.exp +++ b/tests/micropython/heapalloc_traceback.py.exp @@ -1,5 +1,5 @@ StopIteration Traceback (most recent call last): - File , line 22, in test + File , line 23, in test StopIteration: diff --git a/tests/micropython/viper_error.py.exp b/tests/micropython/viper_error.py.exp index 96be5a590229d..3a8cb02994126 100644 --- a/tests/micropython/viper_error.py.exp +++ b/tests/micropython/viper_error.py.exp @@ -18,8 +18,8 @@ ViperTypeError('must raise an object',) ViperTypeError('unary op __pos__ not implemented',) ViperTypeError('unary op __neg__ not implemented',) ViperTypeError('unary op __invert__ not implemented',) -ViperTypeError('binary op __contains__ not implemented',) +ViperTypeError('binary op not implemented',) +NotImplementedError('native yield',) NotImplementedError('native yield',) -NotImplementedError('native yield from',) NotImplementedError('conversion to object',) NotImplementedError('casting',) diff --git a/tests/misc/non_compliant.py b/tests/misc/non_compliant.py index 8c2f4184b1c7a..99633416a4cc4 100644 --- a/tests/misc/non_compliant.py +++ b/tests/misc/non_compliant.py @@ -124,3 +124,28 @@ def f(): f.x = 1 except AttributeError: print('AttributeError') + +# can't call a function type (ie make new instances of a function) +try: + type(f)() +except TypeError: + print('TypeError') + +# test when object explicitly listed at not-last position in parent tuple +# this is not compliant with CPython because of illegal MRO +class A: + def foo(self): + print('A.foo') +class B(object, A): + pass +B().foo() + +# can't assign property (or other special accessors) to already-subclassed class +class A: + pass +class B(A): + pass +try: + A.bar = property() +except AttributeError: + print('AttributeError') diff --git a/tests/misc/non_compliant.py.exp b/tests/misc/non_compliant.py.exp index 9c157fd5bd879..3f15a14406092 100644 --- a/tests/misc/non_compliant.py.exp +++ b/tests/misc/non_compliant.py.exp @@ -18,3 +18,6 @@ b'\x01\x02' b'\x01\x00' NotImplementedError AttributeError +TypeError +A.foo +AttributeError diff --git a/tests/misc/print_exception.py b/tests/misc/print_exception.py index 9ab8e728b99d5..f120fe1e18dbc 100644 --- a/tests/misc/print_exception.py +++ b/tests/misc/print_exception.py @@ -56,3 +56,12 @@ def f(): f() except Exception as e: print_exc(e) + +# Test non-stream object passed as output object, only valid for uPy +if hasattr(sys, 'print_exception'): + try: + sys.print_exception(Exception, 1) + had_exception = False + except OSError: + had_exception = True + assert had_exception diff --git a/tests/misc/sys_exc_info.py b/tests/misc/sys_exc_info.py index 4bb2c61e89236..bf9438e462bac 100644 --- a/tests/misc/sys_exc_info.py +++ b/tests/misc/sys_exc_info.py @@ -9,7 +9,7 @@ def f(): print(sys.exc_info()[0:2]) try: - 1/0 + raise ValueError('value', 123) except: print(sys.exc_info()[0:2]) f() diff --git a/tests/net_hosted/connect_poll.py b/tests/net_hosted/connect_poll.py new file mode 100644 index 0000000000000..ece6aa0da9721 --- /dev/null +++ b/tests/net_hosted/connect_poll.py @@ -0,0 +1,32 @@ +# test that socket.connect() has correct polling behaviour before, during and after + +try: + import usocket as socket, uselect as select +except: + import socket, select + + +def test(peer_addr): + s = socket.socket() + poller = select.poll() + poller.register(s) + + # test poll before connect + # note: CPython can return POLLHUP, so use the IN|OUT mask + p = poller.poll(0) + print(len(p), p[0][-1] & (select.POLLIN | select.POLLOUT)) + + s.connect(peer_addr) + + # test poll during connection + print(len(poller.poll(0))) + + # test poll after connection is established + p = poller.poll(1000) + print(len(p), p[0][-1]) + + s.close() + + +if __name__ == "__main__": + test(socket.getaddrinfo('micropython.org', 80)[0][-1]) diff --git a/tests/net_hosted/connect_poll.py.exp b/tests/net_hosted/connect_poll.py.exp new file mode 100644 index 0000000000000..cdf520e090bb7 --- /dev/null +++ b/tests/net_hosted/connect_poll.py.exp @@ -0,0 +1,3 @@ +1 4 +1 +1 4 diff --git a/tests/pyb/adc.py b/tests/pyb/adc.py index 362ca326d22c5..0bd9b9d53a5ca 100644 --- a/tests/pyb/adc.py +++ b/tests/pyb/adc.py @@ -1,33 +1,62 @@ -from pyb import ADC -from pyb import Pin +from pyb import ADC, Timer -pin = Pin('X22', mode=Pin.IN, pull=Pin.PULL_DOWN) -adc = ADC('X22') -print(adc) +adct = ADC(16) # Temperature 930 -> 20C +print(adct) +adcv = ADC(17) # Voltage 1500 -> 3.3V +print(adcv) -# read single sample -val = adc.read() -assert val < 500 +# read single sample; 2.5V-5V is pass range +val = adcv.read() +assert val > 1000 and val < 2000 # timer for read_timed -tim = pyb.Timer(5, freq=500) +tim = Timer(5, freq=500) # read into bytearray -buf = bytearray(50) -adc.read_timed(buf, tim) +buf = bytearray(b'\xff' * 50) +adcv.read_timed(buf, tim) print(len(buf)) for i in buf: - assert i < 500 + assert i > 50 and i < 150 # read into arrays with different element sizes import array -ar = array.array('h', 25 * [0]) -adc.read_timed(ar, tim) -print(len(ar)) -for i in buf: - assert i < 500 -ar = array.array('i', 30 * [0]) -adc.read_timed(ar, tim) -print(len(ar)) -for i in buf: - assert i < 500 +arv = array.array('h', 25 * [0x7fff]) +adcv.read_timed(arv, tim) +print(len(arv)) +for i in arv: + assert i > 1000 and i < 2000 + +arv = array.array('i', 30 * [-1]) +adcv.read_timed(arv, tim) +print(len(arv)) +for i in arv: + assert i > 1000 and i < 2000 + +# Test read_timed_multi +arv = bytearray(b'\xff'*50) +art = bytearray(b'\xff'*50) +ADC.read_timed_multi((adcv, adct), (arv, art), tim) +for i in arv: + assert i > 60 and i < 125 +# Wide range: unsure of accuracy of temp sensor. +for i in art: + assert i > 15 and i < 200 + +arv = array.array('i', 25 * [-1]) +art = array.array('i', 25 * [-1]) +ADC.read_timed_multi((adcv, adct), (arv, art), tim) +for i in arv: + assert i > 1000 and i < 2000 +# Wide range: unsure of accuracy of temp sensor. +for i in art: + assert i > 50 and i < 2000 + +arv = array.array('h', 25 * [0x7fff]) +art = array.array('h', 25 * [0x7fff]) +ADC.read_timed_multi((adcv, adct), (arv, art), tim) +for i in arv: + assert i > 1000 and i < 2000 +# Wide range: unsure of accuracy of temp sensor. +for i in art: + assert i > 50 and i < 2000 diff --git a/tests/pyb/adc.py.exp b/tests/pyb/adc.py.exp index 76f3914b0310f..1aae16fb01771 100644 --- a/tests/pyb/adc.py.exp +++ b/tests/pyb/adc.py.exp @@ -1,4 +1,5 @@ - + + 50 25 30 diff --git a/tests/pyb/adcall.py b/tests/pyb/adcall.py new file mode 100644 index 0000000000000..cfe179a97b212 --- /dev/null +++ b/tests/pyb/adcall.py @@ -0,0 +1,31 @@ +from pyb import Pin, ADCAll + +pins = [Pin.cpu.A0, Pin.cpu.A1, Pin.cpu.A2, Pin.cpu.A3] + +# set pins to IN mode, init ADCAll, then check pins are ANALOG +for p in pins: + p.init(p.IN) +adc = ADCAll(12) +for p in pins: + print(p) + +# set pins to IN mode, init ADCAll with mask, then check some pins are ANALOG +for p in pins: + p.init(p.IN) +adc = ADCAll(12, 0x70003) +for p in pins: + print(p) + +# init all pins to ANALOG +adc = ADCAll(12) +print(adc) + +# read all channels +for c in range(19): + print(type(adc.read_channel(c))) + +# call special reading functions +print(0 < adc.read_core_temp() < 100) +print(0 < adc.read_core_vbat() < 4) +print(0 < adc.read_core_vref() < 2) +print(0 < adc.read_vref() < 4) diff --git a/tests/pyb/adcall.py.exp b/tests/pyb/adcall.py.exp new file mode 100644 index 0000000000000..5a85ba770e855 --- /dev/null +++ b/tests/pyb/adcall.py.exp @@ -0,0 +1,32 @@ +Pin(Pin.cpu.A0, mode=Pin.ANALOG) +Pin(Pin.cpu.A1, mode=Pin.ANALOG) +Pin(Pin.cpu.A2, mode=Pin.ANALOG) +Pin(Pin.cpu.A3, mode=Pin.ANALOG) +Pin(Pin.cpu.A0, mode=Pin.ANALOG) +Pin(Pin.cpu.A1, mode=Pin.ANALOG) +Pin(Pin.cpu.A2, mode=Pin.IN) +Pin(Pin.cpu.A3, mode=Pin.IN) + + + + + + + + + + + + + + + + + + + + +True +True +True +True diff --git a/tests/pyb/can.py b/tests/pyb/can.py index 0fd8c8368d321..8a08ea9a65b3c 100644 --- a/tests/pyb/can.py +++ b/tests/pyb/can.py @@ -4,6 +4,8 @@ print('SKIP') raise SystemExit +from array import array +import micropython import pyb # test we can correctly create by id or name @@ -19,15 +21,27 @@ can = CAN(1) print(can) +# Test state when de-init'd +print(can.state() == can.STOPPED) + can.init(CAN.LOOPBACK) print(can) print(can.any(0)) +# Test state when freshly created +print(can.state() == can.ERROR_ACTIVE) + +# Test that restart can be called +can.restart() + +# Test info returns a sensible value +print(can.info()) + # Catch all filter can.setfilter(0, CAN.MASK16, 0, (0, 0, 0, 0)) can.send('abcd', 123, timeout=5000) -print(can.any(0)) +print(can.any(0), can.info()) print(can.recv(0)) can.send('abcd', -1, timeout=5000) @@ -44,6 +58,77 @@ else: print('failed') +# Test that recv can work without allocating memory on the heap + +buf = bytearray(10) +l = [0, 0, 0, memoryview(buf)] +l2 = None + +micropython.heap_lock() + +can.send('', 42) +l2 = can.recv(0, l) +assert l is l2 +print(l, len(l[3]), buf) + +can.send('1234', 42) +l2 = can.recv(0, l) +assert l is l2 +print(l, len(l[3]), buf) + +can.send('01234567', 42) +l2 = can.recv(0, l) +assert l is l2 +print(l, len(l[3]), buf) + +can.send('abc', 42) +l2 = can.recv(0, l) +assert l is l2 +print(l, len(l[3]), buf) + +micropython.heap_unlock() + +# Test that recv can work with different arrays behind the memoryview +can.send('abc', 1) +print(bytes(can.recv(0, [0, 0, 0, memoryview(array('B', range(8)))])[3])) +can.send('def', 1) +print(bytes(can.recv(0, [0, 0, 0, memoryview(array('b', range(8)))])[3])) + +# Test for non-list passed as second arg to recv +can.send('abc', 1) +try: + can.recv(0, 1) +except TypeError: + print('TypeError') + +# Test for too-short-list passed as second arg to recv +can.send('abc', 1) +try: + can.recv(0, [0, 0, 0]) +except ValueError: + print('ValueError') + +# Test for non-memoryview passed as 4th element to recv +can.send('abc', 1) +try: + can.recv(0, [0, 0, 0, 0]) +except TypeError: + print('TypeError') + +# Test for read-only-memoryview passed as 4th element to recv +can.send('abc', 1) +try: + can.recv(0, [0, 0, 0, memoryview(bytes(8))]) +except ValueError: + print('ValueError') + +# Test for bad-typecode-memoryview passed as 4th element to recv +can.send('abc', 1) +try: + can.recv(0, [0, 0, 0, memoryview(array('i', range(8)))]) +except ValueError: + print('ValueError') + del can # Testing extended IDs diff --git a/tests/pyb/can.py.exp b/tests/pyb/can.py.exp index e25a0f406ec35..687935e7f45bc 100644 --- a/tests/pyb/can.py.exp +++ b/tests/pyb/can.py.exp @@ -7,14 +7,28 @@ CAN YA CAN YB ValueError YC CAN(1) -CAN(1, CAN.LOOPBACK, extframe=False) +True +CAN(1, CAN.LOOPBACK, extframe=False, auto_restart=False) False True +[0, 0, 0, 0, 0, 0, 0, 0] +True [0, 0, 0, 0, 0, 0, 1, 0] (123, False, 0, b'abcd') (2047, False, 0, b'abcd') (0, False, 0, b'abcd') passed -CAN(1, CAN.LOOPBACK, extframe=True) +[42, False, 0, ] 0 bytearray(b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +[42, False, 0, ] 4 bytearray(b'1234\x00\x00\x00\x00\x00\x00') +[42, False, 0, ] 8 bytearray(b'01234567\x00\x00') +[42, False, 0, ] 3 bytearray(b'abc34567\x00\x00') +b'abc' +b'def' +TypeError +ValueError +TypeError +ValueError +ValueError +CAN(1, CAN.LOOPBACK, extframe=True, auto_restart=False) passed ('0x8', '0x1c', '0xa', b'ok') ('0x800', '0x1c00', '0xa00', b'ok') diff --git a/tests/pyb/dac.py b/tests/pyb/dac.py index 6f03bbc64dfeb..ca68ec7098c5d 100644 --- a/tests/pyb/dac.py +++ b/tests/pyb/dac.py @@ -12,3 +12,7 @@ dac.write_timed(bytearray(10), 100, mode=pyb.DAC.NORMAL) pyb.delay(20) dac.write(0) + +# test buffering arg +dac = pyb.DAC(1, buffering=True) +dac.write(0) diff --git a/tests/pyb/dac.py.exp b/tests/pyb/dac.py.exp index ae245f2e61078..7ee99652a8460 100644 --- a/tests/pyb/dac.py.exp +++ b/tests/pyb/dac.py.exp @@ -1 +1 @@ - +DAC(1, bits=8) diff --git a/tests/pyb/i2c.py b/tests/pyb/i2c.py index a220f8e858bc7..6875e5a5aa024 100644 --- a/tests/pyb/i2c.py +++ b/tests/pyb/i2c.py @@ -19,7 +19,8 @@ accel_addr = 76 -pyb.Accel() # this will init the bus for us +pyb.Accel() # this will init the MMA for us +i2c.init(I2C.MASTER, baudrate=400000) print(i2c.scan()) print(i2c.is_ready(accel_addr)) diff --git a/tests/pyb/pyb1.py b/tests/pyb/pyb1.py index 184acbdc433f6..443722ca85970 100644 --- a/tests/pyb/pyb1.py +++ b/tests/pyb/pyb1.py @@ -29,8 +29,6 @@ print(pyb.have_cdc()) -pyb.hid((0, 0, 0, 0)) # won't do anything - pyb.sync() print(len(pyb.unique_id())) diff --git a/tests/pyb/spi.py b/tests/pyb/spi.py index b7a905d78cfed..88cc975bb6602 100644 --- a/tests/pyb/spi.py +++ b/tests/pyb/spi.py @@ -29,3 +29,5 @@ spi.send(1, timeout=100) print(spi.recv(1, timeout=100)) print(spi.send_recv(1, timeout=100)) + +spi.deinit() diff --git a/tests/pyboard.py b/tests/pyboard.py index 3a82f6a6a36db..616773a313a18 120000 --- a/tests/pyboard.py +++ b/tests/pyboard.py @@ -1 +1 @@ -../tools/pyboard.py \ No newline at end of file +../tools/cpboard.py \ No newline at end of file diff --git a/tests/run-tests b/tests/run-tests index f1035c4353e91..f6c727a8a657d 100755 --- a/tests/run-tests +++ b/tests/run-tests @@ -6,6 +6,9 @@ import sys import platform import argparse import re +import threading +import multiprocessing +from multiprocessing.pool import ThreadPool from glob import glob # Tests require at least CPython 3.3. If your default python3 executable @@ -50,7 +53,11 @@ def convert_regex_escapes(line): def run_micropython(pyb, args, test_file, is_special=False): - special_tests = ('micropython/meminfo.py', 'basics/bytes_compare3.py', 'basics/builtin_help.py', 'thread/thread_exc2.py') + special_tests = ( + 'micropython/meminfo.py', 'basics/bytes_compare3.py', + 'basics/builtin_help.py', 'thread/thread_exc2.py', + ) + had_crash = False if pyb is None: # run on PC if test_file.startswith(('cmdline/', 'feature_check/')) or test_file in special_tests: @@ -143,13 +150,14 @@ def run_micropython(pyb, args, test_file, is_special=False): try: output_mupy = pyb.execfile(test_file) except pyboard.PyboardError: + had_crash = True output_mupy = b'CRASH' # canonical form for all ports/platforms is to use \n for end-of-line output_mupy = output_mupy.replace(b'\r\n', b'\n') # don't try to convert the output if we should skip this test - if output_mupy in (b'SKIP\n', b'CRASH'): + if had_crash or output_mupy in (b'SKIP\n', b'CRASH'): return output_mupy if is_special or test_file in special_tests: @@ -197,13 +205,27 @@ def run_micropython(pyb, args, test_file, is_special=False): def run_feature_check(pyb, args, base_path, test_file): return run_micropython(pyb, args, base_path + "/feature_check/" + test_file, is_special=True) +class ThreadSafeCounter: + def __init__(self, start=0): + self._value = start + self._lock = threading.Lock() -def run_tests(pyb, tests, args, base_path="."): - test_count = 0 - testcase_count = 0 - passed_count = 0 - failed_tests = [] - skipped_tests = [] + def add(self, to_add): + with self._lock: self._value += to_add + + def append(self, arg): + self.add([arg]) + + @property + def value(self): + return self._value + +def run_tests(pyb, tests, args, base_path=".", num_threads=1): + test_count = ThreadSafeCounter() + testcase_count = ThreadSafeCounter() + passed_count = ThreadSafeCounter() + failed_tests = ThreadSafeCounter([]) + skipped_tests = ThreadSafeCounter([]) skip_tests = set() skip_native = False @@ -212,48 +234,56 @@ def run_tests(pyb, tests, args, base_path="."): skip_async = False skip_const = False skip_revops = False - - # Check if micropython.native is supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'native_check.py') - if output == b'CRASH': - skip_native = True - - # Check if arbitrary-precision integers are supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'int_big.py') - if output != b'1000000000000000000000000000000000000000000000\n': - skip_int_big = True - - # Check if set type (and set literals) is supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'set_check.py') - if output == b'CRASH': - skip_set_type = True - - # Check if async/await keywords are supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'async_check.py') - if output == b'CRASH': - skip_async = True - - # Check if const keyword (MicroPython extension) is supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'const.py') - if output == b'CRASH': - skip_const = True - - # Check if __rOP__ special methods are supported, and skip such tests if it's not - output = run_feature_check(pyb, args, base_path, 'reverse_ops.py') - if output == b'TypeError\n': - skip_revops = True - - # Check if emacs repl is supported, and skip such tests if it's not - t = run_feature_check(pyb, args, base_path, 'repl_emacs_check.py') - if not 'True' in str(t, 'ascii'): - skip_tests.add('cmdline/repl_emacs_keys.py') - - upy_byteorder = run_feature_check(pyb, args, base_path, 'byteorder.py') - upy_float_precision = int(run_feature_check(pyb, args, base_path, 'float.py')) - has_complex = run_feature_check(pyb, args, base_path, 'complex.py') == b'complex\n' - has_coverage = run_feature_check(pyb, args, base_path, 'coverage.py') == b'coverage\n' - cpy_byteorder = subprocess.check_output([CPYTHON3, base_path + '/feature_check/byteorder.py']) - skip_endian = (upy_byteorder != cpy_byteorder) + skip_endian = False + has_complex = True + has_coverage = False + + upy_float_precision = 32 + + # If we're asked to --list-tests, we can't assume that there's a + # connection to target, so we can't run feature checks usefully. + if not (args.list_tests or args.write_exp): + # Check if micropython.native is supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'native_check.py') + if output == b'CRASH': + skip_native = True + + # Check if arbitrary-precision integers are supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'int_big.py') + if output != b'1000000000000000000000000000000000000000000000\n': + skip_int_big = True + + # Check if set type (and set literals) is supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'set_check.py') + if output == b'CRASH': + skip_set_type = True + + # Check if async/await keywords are supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'async_check.py') + if output == b'CRASH': + skip_async = True + + # Check if const keyword (MicroPython extension) is supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'const.py') + if output == b'CRASH': + skip_const = True + + # Check if __rOP__ special methods are supported, and skip such tests if it's not + output = run_feature_check(pyb, args, base_path, 'reverse_ops.py') + if output == b'TypeError\n': + skip_revops = True + + # Check if emacs repl is supported, and skip such tests if it's not + t = run_feature_check(pyb, args, base_path, 'repl_emacs_check.py') + if not 'True' in str(t, 'ascii'): + skip_tests.add('cmdline/repl_emacs_keys.py') + + upy_byteorder = run_feature_check(pyb, args, base_path, 'byteorder.py') + upy_float_precision = int(run_feature_check(pyb, args, base_path, 'float.py')) + has_complex = run_feature_check(pyb, args, base_path, 'complex.py') == b'complex\n' + has_coverage = run_feature_check(pyb, args, base_path, 'coverage.py') == b'coverage\n' + cpy_byteorder = subprocess.check_output([CPYTHON3, base_path + '/feature_check/byteorder.py']) + skip_endian = (upy_byteorder != cpy_byteorder) # Some tests shouldn't be run under Travis CI if os.getenv('TRAVIS') == 'true': @@ -275,6 +305,7 @@ def run_tests(pyb, tests, args, base_path="."): if upy_float_precision < 64: skip_tests.add('float/float_divmod.py') # tested by float/float_divmod_relaxed.py instead skip_tests.add('float/float2int_doubleprec_intbig.py') + skip_tests.add('float/float_parse_doubleprec.py') if not has_complex: skip_tests.add('float/complex1.py') @@ -287,23 +318,20 @@ def run_tests(pyb, tests, args, base_path="."): skip_tests.add('cmdline/cmd_parsetree.py') # Some tests shouldn't be run on a PC - if pyb is None: + if args.target == 'unix': # unix build does not have the GIL so can't run thread mutation tests for t in tests: if t.startswith('thread/mutate_'): skip_tests.add(t) # Some tests shouldn't be run on pyboard - if pyb is not None: + if args.target != 'unix': skip_tests.add('basics/exception_chain.py') # warning is not printed skip_tests.add('micropython/meminfo.py') # output is very different to PC output skip_tests.add('extmod/machine_mem.py') # raw memory access not supported if args.target == 'wipy': skip_tests.add('misc/print_exception.py') # requires error reporting full - skip_tests.add('misc/recursion.py') # requires stack checking enabled - skip_tests.add('misc/recursive_data.py') # requires stack checking enabled - skip_tests.add('misc/recursive_iternext.py') # requires stack checking enabled skip_tests.update({'extmod/uctypes_%s.py' % t for t in 'bytearray le native_le ptr_le ptr_native_le sizeof sizeof_native array_assign_le array_assign_native_le'.split()}) # requires uctypes skip_tests.add('extmod/zlibd_decompress.py') # requires zlib skip_tests.add('extmod/uheapq1.py') # uheapq not supported by WiPy @@ -313,6 +341,7 @@ def run_tests(pyb, tests, args, base_path="."): skip_tests.add('misc/rge_sm.py') # too large elif args.target == 'minimal': skip_tests.add('basics/class_inplace_op.py') # all special methods not supported + skip_tests.add('basics/subclass_native_init.py')# native subclassing corner cases not support skip_tests.add('misc/rge_sm.py') # too large skip_tests.add('micropython/opt_level.py') # don't assume line numbers are stored @@ -327,8 +356,8 @@ def run_tests(pyb, tests, args, base_path="."): # Some tests are known to fail with native emitter # Remove them from the below when they work if args.emit == 'native': - skip_tests.update({'basics/%s.py' % t for t in 'gen_yield_from gen_yield_from_close gen_yield_from_ducktype gen_yield_from_exc gen_yield_from_iter gen_yield_from_send gen_yield_from_stopped gen_yield_from_throw gen_yield_from_throw2 gen_yield_from_throw3 generator1 generator2 generator_args generator_close generator_closure generator_exc generator_return generator_send'.split()}) # require yield - skip_tests.update({'basics/%s.py' % t for t in 'bytes_gen class_store_class globals_del string_join'.split()}) # require yield + skip_tests.update({'basics/%s.py' % t for t in 'gen_yield_from gen_yield_from_close gen_yield_from_ducktype gen_yield_from_exc gen_yield_from_executing gen_yield_from_iter gen_yield_from_send gen_yield_from_stopped gen_yield_from_throw gen_yield_from_throw2 gen_yield_from_throw3 generator1 generator2 generator_args generator_close generator_closure generator_exc generator_pend_throw generator_return generator_send'.split()}) # require yield + skip_tests.update({'basics/%s.py' % t for t in 'bytes_gen class_store_class globals_del string_join gen_stack_overflow'.split()}) # require yield skip_tests.update({'basics/async_%s.py' % t for t in 'def await await2 for for2 with with2'.split()}) # require yield skip_tests.update({'basics/%s.py' % t for t in 'try_reraise try_reraise2'.split()}) # require raise_varargs skip_tests.update({'basics/%s.py' % t for t in 'with_break with_continue with_return'.split()}) # require complete with support @@ -353,9 +382,22 @@ def run_tests(pyb, tests, args, base_path="."): skip_tests.add('micropython/heapalloc_traceback.py') # because native doesn't have proper traceback info skip_tests.add('micropython/heapalloc_iter.py') # requires generators skip_tests.add('micropython/schedule.py') # native code doesn't check pending events + skip_tests.add('stress/gc_trace.py') # requires yield + skip_tests.add('stress/recursive_gen.py') # requires yield + skip_tests.add('extmod/vfs_userfs.py') # because native doesn't properly handle globals across different modules - for test_file in tests: + def run_one_test(test_file): test_file = test_file.replace('\\', '/') + + if args.filters: + # Default verdict is the opposit of the first action + verdict = "include" if args.filters[0][0] == "exclude" else "exclude" + for action, pat in args.filters: + if pat.search(test_file): + verdict = action + if verdict == "exclude": + return + test_basename = os.path.basename(test_file) test_name = os.path.splitext(test_basename)[0] is_native = test_name.startswith("native_") or test_name.startswith("viper_") @@ -374,10 +416,15 @@ def run_tests(pyb, tests, args, base_path="."): skip_it |= skip_const and is_const skip_it |= skip_revops and test_name.startswith("class_reverse_op") + if args.list_tests: + if not skip_it: + print(test_file) + return + if skip_it: print("skip ", test_file) skipped_tests.append(test_name) - continue + return # get expected output test_file_expected = test_file + '.exp' @@ -405,7 +452,7 @@ def run_tests(pyb, tests, args, base_path="."): output_expected = output_expected.replace(b'\r\n', b'\n') if args.write_exp: - continue + return # run MicroPython output_mupy = run_micropython(pyb, args, test_file) @@ -413,16 +460,16 @@ def run_tests(pyb, tests, args, base_path="."): if output_mupy == b'SKIP\n': print("skip ", test_file) skipped_tests.append(test_name) - continue + return - testcase_count += len(output_expected.splitlines()) + testcase_count.add(len(output_expected.splitlines())) filename_expected = test_basename + ".exp" filename_mupy = test_basename + ".out" if output_expected == output_mupy: print("pass ", test_file) - passed_count += 1 + passed_count.add(1) rm_f(filename_expected) rm_f(filename_mupy) else: @@ -437,43 +484,84 @@ def run_tests(pyb, tests, args, base_path="."): print("FAIL ", test_file) failed_tests.append(test_name) - test_count += 1 + test_count.add(1) - print("{} tests performed ({} individual testcases)".format(test_count, testcase_count)) - print("{} tests passed".format(passed_count)) + if args.list_tests: + return True + + if num_threads > 1: + pool = ThreadPool(num_threads) + pool.map(run_one_test, tests) + else: + for test in tests: + run_one_test(test) - if len(skipped_tests) > 0: - print("{} tests skipped: {}".format(len(skipped_tests), ' '.join(skipped_tests))) - if len(failed_tests) > 0: - print("{} tests failed: {}".format(len(failed_tests), ' '.join(failed_tests))) + print("{} tests performed ({} individual testcases)".format(test_count.value, testcase_count.value)) + print("{} tests passed".format(passed_count.value)) + + if len(skipped_tests.value) > 0: + print("{} tests skipped: {}".format(len(skipped_tests.value), ' '.join(sorted(skipped_tests.value)))) + if len(failed_tests.value) > 0: + print("{} tests failed: {}".format(len(failed_tests.value), ' '.join(sorted(failed_tests.value)))) return False # all tests succeeded return True + +class append_filter(argparse.Action): + + def __init__(self, option_strings, dest, **kwargs): + super().__init__(option_strings, dest, default=[], **kwargs) + + def __call__(self, parser, args, value, option): + if not hasattr(args, self.dest): + args.filters = [] + if option.startswith(("-e", "--e")): + option = "exclude" + else: + option = "include" + args.filters.append((option, re.compile(value))) + + def main(): - cmd_parser = argparse.ArgumentParser(description='Run tests for MicroPython.') + cmd_parser = argparse.ArgumentParser( + formatter_class=argparse.RawDescriptionHelpFormatter, + description='Run and manage tests for MicroPython.', + epilog='''\ +Options -i and -e can be multiple and processed in the order given. Regex +"search" (vs "match") operation is used. An action (include/exclude) of +the last matching regex is used: + run-tests -i async - exclude all, then include tests containg "async" anywhere + run-tests -e '/big.+int' - include all, then exclude by regex + run-tests -e async -i async_foo - include all, exclude async, yet still include async_foo +''') cmd_parser.add_argument('--target', default='unix', help='the target platform') cmd_parser.add_argument('--device', default='/dev/ttyACM0', help='the serial device or the IP address of the pyboard') cmd_parser.add_argument('-b', '--baudrate', default=115200, help='the baud rate of the serial device') cmd_parser.add_argument('-u', '--user', default='micro', help='the telnet login username') cmd_parser.add_argument('-p', '--password', default='python', help='the telnet login password') cmd_parser.add_argument('-d', '--test-dirs', nargs='*', help='input test directories (if no files given)') + cmd_parser.add_argument('-e', '--exclude', action=append_filter, metavar='REGEX', dest='filters', help='exclude test by regex on path/name.py') + cmd_parser.add_argument('-i', '--include', action=append_filter, metavar='REGEX', dest='filters', help='include test by regex on path/name.py') cmd_parser.add_argument('--write-exp', action='store_true', help='save .exp files to run tests w/o CPython') + cmd_parser.add_argument('--list-tests', action='store_true', help='list tests instead of running them') cmd_parser.add_argument('--emit', default='bytecode', help='MicroPython emitter to use (bytecode or native)') cmd_parser.add_argument('--heapsize', help='heapsize to use (use default if not specified)') cmd_parser.add_argument('--via-mpy', action='store_true', help='compile .py files to .mpy first') cmd_parser.add_argument('--keep-path', action='store_true', help='do not clear MICROPYPATH when running tests') + cmd_parser.add_argument('-j', '--jobs', default=1, metavar='N', type=int, help='Number of tests to run simultaneously') + cmd_parser.add_argument('--auto-jobs', action='store_const', dest='jobs', const=multiprocessing.cpu_count(), help='Set the -j values to the CPU (thread) count') cmd_parser.add_argument('files', nargs='*', help='input test files') args = cmd_parser.parse_args() - EXTERNAL_TARGETS = ('pyboard', 'wipy', 'esp8266', 'minimal') - if args.target in EXTERNAL_TARGETS: + EXTERNAL_TARGETS = ('pyboard', 'wipy', 'esp8266', 'esp32', 'minimal') + if args.target == 'unix' or args.list_tests: + pyb = None + elif args.target in EXTERNAL_TARGETS: import pyboard pyb = pyboard.Pyboard(args.device, args.baudrate, args.user, args.password) pyb.enter_raw_repl() - elif args.target == 'unix': - pyb = None else: raise ValueError('target must be either %s or unix' % ", ".join(EXTERNAL_TARGETS)) @@ -482,14 +570,17 @@ def main(): if args.target == 'pyboard': # run pyboard tests test_dirs = ('basics', 'micropython', 'float', 'misc', 'stress', 'extmod', 'pyb', 'pybnative', 'inlineasm') - elif args.target in ('esp8266', 'minimal'): + elif args.target in ('esp8266', 'esp32', 'minimal'): test_dirs = ('basics', 'micropython', 'float', 'misc', 'extmod') elif args.target == 'wipy': # run WiPy tests test_dirs = ('basics', 'micropython', 'misc', 'extmod', 'wipy') else: # run PC tests - test_dirs = ('basics', 'micropython', 'float', 'import', 'io', 'misc', 'stress', 'unicode', 'extmod', 'unix', 'cmdline') + test_dirs = ( + 'basics', 'micropython', 'float', 'import', 'io', 'misc', + 'stress', 'unicode', 'extmod', '../extmod/ulab/tests', 'unix', 'cmdline', + ) else: # run tests from these directories test_dirs = args.test_dirs @@ -507,7 +598,7 @@ def main(): # run-tests script itself. base_path = os.path.dirname(sys.argv[0]) or "." try: - res = run_tests(pyb, tests, args, base_path) + res = run_tests(pyb, tests, args, base_path, args.jobs) finally: if pyb: pyb.close() diff --git a/tests/skip_if.py b/tests/skip_if.py index 8d0ed8f2145f9..7d6c5b2075338 100644 --- a/tests/skip_if.py +++ b/tests/skip_if.py @@ -68,10 +68,7 @@ def __init__(self, board): def no_cpython_compat(): try: - try: - from collections import namedtuple - except ImportError: - from ucollections import namedtuple + from collections import namedtuple except ImportError: skip() try: diff --git a/tests/stress/dict_create_max.py b/tests/stress/dict_create_max.py new file mode 100644 index 0000000000000..3c75db20da0c0 --- /dev/null +++ b/tests/stress/dict_create_max.py @@ -0,0 +1,13 @@ +# The aim with this test is to hit the maximum resize/rehash size of a dict, +# where there are no more primes in the table of growing allocation sizes. +# This value is 54907 items. + +d = {} +try: + for i in range(54908): + d[i] = i +except MemoryError: + pass + +# Just check the dict still has the first value +print(d[0]) diff --git a/tests/stress/gc_trace.py b/tests/stress/gc_trace.py new file mode 100644 index 0000000000000..72dc7b62769d7 --- /dev/null +++ b/tests/stress/gc_trace.py @@ -0,0 +1,17 @@ +# test that the GC can trace nested objects + +try: + import gc +except ImportError: + print("SKIP") + raise SystemExit + +# test a big shallow object pointing to many unique objects +lst = [[i] for i in range(200)] +gc.collect() +print(lst) + +# test a deep object +lst = [[[[[(i, j, k, l)] for i in range(3)] for j in range(3)] for k in range(3)] for l in range(3)] +gc.collect() +print(lst) diff --git a/tests/misc/recursion.py b/tests/stress/recursion.py similarity index 100% rename from tests/misc/recursion.py rename to tests/stress/recursion.py diff --git a/tests/misc/recursive_data.py b/tests/stress/recursive_data.py similarity index 100% rename from tests/misc/recursive_data.py rename to tests/stress/recursive_data.py diff --git a/tests/misc/recursive_data.py.exp b/tests/stress/recursive_data.py.exp similarity index 100% rename from tests/misc/recursive_data.py.exp rename to tests/stress/recursive_data.py.exp diff --git a/tests/stress/recursive_gen.py b/tests/stress/recursive_gen.py new file mode 100644 index 0000000000000..0e0d3914ee9d5 --- /dev/null +++ b/tests/stress/recursive_gen.py @@ -0,0 +1,18 @@ +# test deeply recursive generators + +# simple "yield from" recursion +def gen(): + yield from gen() +try: + list(gen()) +except RuntimeError: + print('RuntimeError') + +# recursion via an iterator over a generator +def gen2(): + for x in gen2(): + yield x +try: + next(gen2()) +except RuntimeError: + print('RuntimeError') diff --git a/tests/misc/recursive_iternext.py b/tests/stress/recursive_iternext.py similarity index 100% rename from tests/misc/recursive_iternext.py rename to tests/stress/recursive_iternext.py diff --git a/tests/misc/recursive_iternext.py.exp b/tests/stress/recursive_iternext.py.exp similarity index 100% rename from tests/misc/recursive_iternext.py.exp rename to tests/stress/recursive_iternext.py.exp diff --git a/tests/unix/extra_coverage.py b/tests/unix/extra_coverage.py index 7a496aa879a96..13721f1f479c3 100644 --- a/tests/unix/extra_coverage.py +++ b/tests/unix/extra_coverage.py @@ -38,11 +38,7 @@ stream.set_error(0) print(stream.ioctl(0, bytearray(10))) # successful ioctl call -stream2 = data[3] # is textio and sets .write = NULL -try: - print(stream2.write(b'1')) # attempt to call NULL implementation -except OSError: - print('OSError') +stream2 = data[3] # is textio print(stream2.read(1)) # read 1 byte encounters non-blocking error with textio stream # test BufferedWriter with stream errors @@ -71,3 +67,8 @@ import frzmpy2 except ZeroDivisionError: print('ZeroDivisionError') + +# test loading a resource from a frozen string +import uio +buf = uio.resource_stream('frzstr_pkg2', 'mod.py') +print(buf.read(21)) diff --git a/tests/unix/extra_coverage.py.exp b/tests/unix/extra_coverage.py.exp index 1db46ab8f4f3c..06b5d3790354d 100644 --- a/tests/unix/extra_coverage.py.exp +++ b/tests/unix/extra_coverage.py.exp @@ -2,6 +2,7 @@ -123 +123 123 -0123 123 +123 1ABCDEF ab abc @@ -12,6 +13,9 @@ false true 80000000 80000000 abc +# GC +0 +0 # vstr tests sts @@ -23,21 +27,29 @@ RuntimeError: # repl ame__ -__name__ path argv version -version_info implementation platform byteorder -maxsize exit stdin stdout -stderr modules exc_info getsizeof -print_exception +argv byteorder exc_info exit +getsizeof implementation maxsize modules +path platform print_exception +stderr stdin stdout version +version_info ementation # attrtuple (start=1, stop=2, step=3) # str 1 +# bytearray +data # mpz 1 12345678 0 0 +0 +0 +0 +1 +12345 +6 # runtime utils TypeError: unsupported type for __abs__: 'str' TypeError: unsupported types for __divmod__: 'str', 'str' @@ -47,8 +59,10 @@ Warning: test +1e+00 +1e+00 # binary -122 +123 456 +# VM +2 1 # scheduler sched(0)=1 sched(1)=1 @@ -76,7 +90,6 @@ b'123' b'123' OSError 0 -OSError None None frzstr1 @@ -90,3 +103,4 @@ frzstr_pkg2.mod frzmpy_pkg2.mod 1 ZeroDivisionError +b'# test frozen package' diff --git a/tools/Tecate-bitmap-fonts b/tools/Tecate-bitmap-fonts new file mode 160000 index 0000000000000..6f52a7ca08389 --- /dev/null +++ b/tools/Tecate-bitmap-fonts @@ -0,0 +1 @@ +Subproject commit 6f52a7ca0838967cc57e9a44d76c6e1f60e62842 diff --git a/tools/adabot b/tools/adabot new file mode 160000 index 0000000000000..393c2756714b5 --- /dev/null +++ b/tools/adabot @@ -0,0 +1 @@ +Subproject commit 393c2756714b5cccf028a82c23b873d36b2d9e8b diff --git a/tools/analyze_heap_dump.py b/tools/analyze_heap_dump.py old mode 100644 new mode 100755 index d5da884e482ae..b8f2bd0112e06 --- a/tools/analyze_heap_dump.py +++ b/tools/analyze_heap_dump.py @@ -56,8 +56,6 @@ help="Draw the heap layout") @click.option("--draw-heap-ownership/--no-draw-heap-ownership", default=False, help="Draw the ownership graph of blocks on the heap") -@click.option("--draw-heap-ownership/--no-draw-heap-ownership", default=False, - help="Draw the ownership graph of blocks on the heap") @click.option("--analyze-snapshots", default="last", type=click.Choice(['all', 'last'])) def do_all_the_things(ram_filename, bin_filename, map_filename, print_block_contents, print_unknown_types, print_block_state, print_conflicting_symbols, @@ -137,8 +135,11 @@ def add_symbol(name, address=None, size=None): ram_start = symbols["_srelocate"][0] ram_end = symbols["_estack"][0] ram_length = ram_end - ram_start + # print(ram_length, "ram length") + # print(len(ram_dump) // ram_length, "snapshots") if analyze_snapshots == "all": snapshots = range(len(ram_dump) // ram_length - 1, -1, -1) + #snapshots = range(4576, -1, -1) elif analyze_snapshots == "last": snapshots = range(len(ram_dump) // ram_length - 1, len(ram_dump) // ram_length - 2, -1) for snapshot_num in snapshots: @@ -161,7 +162,31 @@ def load(address, size=4): def load_pointer(address): return struct.unpack("0x{:08x}{}>".format(address, rows) ownership_graph.add_node(address, label=table, style="invisible", shape="plaintext") + print("add 0x{:08x}".format(address)) potential_type = None node = ownership_graph.get_node(address) node.attr["height"] = 0.25 * current_allocation + if address >= long_lived_start: + node.attr["fontcolor"] = "hotpink" + else: + node.attr["fontcolor"] = "black" block_data[address] = data for k in range(len(data) // 4): word = struct.unpack_from("" if potential_type == str_type and k == 3: @@ -283,7 +319,7 @@ def save_allocated_block(end, current_allocation): if k < 4: port = 0 ownership_graph.add_edge(address, word, tailport=str(port)+":_") - #print(" 0x{:08x}".format(word)) + print(" 0x{:08x}".format(word)) if address in qstr_pools: if k > 0: qstr_chunks.append(word) @@ -294,11 +330,11 @@ def save_allocated_block(end, current_allocation): if potential_type == dynamic_type: if k == 0: node.attr["fillcolor"] = "plum" - if k == 3 and 0x20000000 < word < 0x20040000: + if k == 3 and ram_start < word < ram_end: map_element_blocks.append(word) if potential_type in function_types: - if k == 2 and 0x20000000 < word < 0x20040000: + if k == 2 and ram_start < word < ram_end: bytecode_blocks.append(word) @@ -340,7 +376,12 @@ def find_qstr(qstr_index): pool_ptr = last_pool if not is_qstr(qstr_index): return "object" + + pool = block_data[pool_ptr] + prev, total_prev_len, alloc, length = struct.unpack_from(">= 3 + if qstr_index > total_prev_len + alloc: + return "invalid" while pool_ptr != 0: if pool_ptr > ram_start: if pool_ptr in block_data: @@ -352,7 +393,7 @@ def find_qstr(qstr_index): else: rom_offset = pool_ptr - rom_start prev, total_prev_len, alloc, length = struct.unpack_from("= total_prev_len: offset = (qstr_index - total_prev_len) * 4 + 16 @@ -414,6 +455,7 @@ def format(obj): node.attr["label"] = "<{}
0x{:08x}
>".format(block, rows) for node, degree in ownership_graph.in_degree_iter(): + print(node, degree) if degree == 0: address_bytes = struct.pack(" heap_start + heap_size: + source = "stack " + source ownership_graph.add_edge(source, node) for block in string_blocks: @@ -494,7 +538,10 @@ def format(obj): offset = len(data) continue offset += 2 + qstr_len + 1 - qstrs_in_chunk += " " + data[offset - qstr_len - 1: offset - 1].decode("utf-8") + try: + qstrs_in_chunk += " " + data[offset - qstr_len - 1: offset - 1].decode("utf-8") + except UnicodeDecodeError: + qstrs_in_chunk += " " + "░"*qstr_len printable_qstrs = "" for i in range(len(qstrs_in_chunk)): c = qstrs_in_chunk[i] @@ -507,7 +554,11 @@ def format(obj): wrapped.append(html.escape(printable_qstrs[i:i+16])) node = ownership_graph.get_node(block) node.attr["label"] = "<
0x{:08x}
{}
>".format(block, 18 * (len(wrapped) - 1), "
".join(wrapped)) - node.attr["fontname"] = "FiraCode-Medium" + node.attr["fontname"] = "FiraCode-Bold" + if block >= long_lived_start: + node.attr["fontcolor"] = "hotpink" + else: + node.attr["fontcolor"] = "black" node.attr["fontpath"] = "/Users/tannewt/Library/Fonts/" node.attr["fontsize"] = 8 @@ -517,20 +568,28 @@ def format(obj): # First render the graph of objects on the heap. if draw_heap_ownership: ownership_graph.layout(prog="dot") - fn = os.path.join(output_directory, "heap_ownership{:04d}.png".format(snapshot_num)) + fn = os.path.join(output_directory, "heap_ownership{:04d}.svg".format(snapshot_num)) print(fn) ownership_graph.draw(fn) + # Clear edge positioning from ownership graph layout. + if draw_heap_ownership: + for edge in ownership_graph.iteredges(): + del edge.attr["pos"] + else: + for edge in ownership_graph.edges(): + ownership_graph.delete_edge(edge) + # Second, render the heap layout in memory order. - for node in ownership_graph: + for node in ownership_graph.nodes(): try: address = int(node.name) except ValueError: - ownership_graph.remove_node(node) + ownership_graph.remove_node(node.name) continue block = (address - pool_start) // 16 - x = block // 64 - y = 64 - block % 64 + x = block // 128 + y = 128 - block % 128 try: height = float(node.attr["height"]) except: @@ -540,11 +599,6 @@ def format(obj): # print(hex(address), block, len(block_data[address]), x, y, height) node.attr["pos"] = "{},{}".format(x * 80, (y - (height - 0.25) * 2) * 18) # in inches - # Clear edge positioning from ownership graph layout. - if draw_heap_ownership: - for edge in ownership_graph.iteredges(): - del edge.attr["pos"] - # Reformat block nodes so they are the correct size and do not have keys in them. for block in sorted(map_element_blocks): try: @@ -567,9 +621,9 @@ def format(obj): else: #print(" {}, {}".format(format(key), format(value))) cells.append((key, "")) - if value in block_data: - edge = ownership_graph.get_edge(block, value) - edge.attr["tailport"] = str(key) + # if value in block_data: + # edge = ownership_graph.get_edge(block, value) + # edge.attr["tailport"] = str(key) rows = "" for i in range(len(cells) // 2): rows += "{}{}".format( @@ -588,6 +642,7 @@ def format(obj): if draw_heap_layout: fn = os.path.join(output_directory, "heap_layout{:04d}.png".format(snapshot_num)) print(fn) + #ownership_graph.write(fn+".dot") ownership_graph.draw(fn) if __name__ == "__main__": diff --git a/tools/bitmap_font b/tools/bitmap_font new file mode 160000 index 0000000000000..62dd78abdd0b8 --- /dev/null +++ b/tools/bitmap_font @@ -0,0 +1 @@ +Subproject commit 62dd78abdd0b823824fe15d1bab0611246145c23 diff --git a/tools/bootstrap_upip.sh b/tools/bootstrap_upip.sh index 667d0845a4687..2891775d7deac 100755 --- a/tools/bootstrap_upip.sh +++ b/tools/bootstrap_upip.sh @@ -17,7 +17,7 @@ fi # Remove any stale old version rm -rf micropython-upip-* -wget -nd -r -l1 https://pypi.python.org/pypi/micropython-upip/ --accept-regex ".*pypi.python.org/packages/source/.*.gz" --reject=html +wget -nd -rH -l1 -D files.pythonhosted.org https://pypi.org/project/micropython-upip/ --reject=html tar xfz micropython-upip-*.tar.gz tmpd="$PWD" diff --git a/tools/build_adafruit_bins.sh b/tools/build_adafruit_bins.sh deleted file mode 100755 index 34fae9d8539fa..0000000000000 --- a/tools/build_adafruit_bins.sh +++ /dev/null @@ -1,74 +0,0 @@ -rm -rf ports/atmel-samd/build* -rm -rf ports/esp8266/build* -rm -rf ports/nrf/build* - -ATMEL_BOARDS="arduino_zero circuitplayground_express feather_m0_basic feather_m0_adalogger itsybitsy_m0_express feather_m0_rfm69 feather_m0_rfm9x feather_m0_express feather_m4_express metro_m0_express metro_m4_express pirkey_m0 trinket_m0 gemma_m0 feather52" -ROSIE_SETUPS="rosie-ci" - -PARALLEL="-j 5" -if [ "$TRAVIS" == "true" ]; then - PARALLEL="-j 2" -fi - -if [ -z "$TRAVIS_BOARD" ]; then - boards=$ATMEL_BOARDS -else - boards=$TRAVIS_BOARD -fi - -for board in $boards; do - if [ $board == "feather52" ]; then - make $PARALLEL -C ports/nrf BOARD=feather52 - (( exit_status = exit_status || $? )) - else - make $PARALLEL -C ports/atmel-samd BOARD=$board - (( exit_status = exit_status || $? )) - fi -done -if [ -z "$TRAVIS" ]; then - make $PARALLEL -C ports/esp8266 BOARD=feather_huzzah - (( exit_status = exit_status || $? )) -fi - -version=`git describe --tags --exact-match` -if [ $? -ne 0 ]; then - version=`date +%Y%m%d`-`git rev-parse --short HEAD` -fi - - -if [ "$TRAVIS" == "true" ]; then - sha=$TRAVIS_COMMIT - if [ "$TRAVIS_PULL_REQUEST" != "false" ]; then - version=`date +%Y%m%d`-`echo $TRAVIS_PULL_REQUEST_SHA | cut -c1-7` - sha=$TRAVIS_PULL_REQUEST_SHA - fi -fi - -for board in $boards; do - mkdir -p bin/$board/ - if [ $board == "feather52" ]; then - cp ports/nrf/build-$board-s132/firmware.bin bin/$board/adafruit-circuitpython-$board-$version.bin - (( exit_status = exit_status || $? )) - else - cp ports/atmel-samd/build-$board/firmware.bin bin/$board/adafruit-circuitpython-$board-$version.bin - (( exit_status = exit_status || $? )) - cp ports/atmel-samd/build-$board/firmware.uf2 bin/$board/adafruit-circuitpython-$board-$version.uf2 - (( exit_status = exit_status || $? )) - fi - # Only upload to Rosie if its a pull request. - if [ "$TRAVIS" == "true" ]; then - for rosie in $ROSIE_SETUPS; do - echo "Uploading to https://$rosie.ngrok.io/upload/$sha" - curl -F "file=@bin/$board/adafruit-circuitpython-$board-$version.uf2" https://$rosie.ngrok.io/upload/$sha - done - fi -done - -# Skip ESP8266 on Travis -if [ -z "$TRAVIS" ]; then - mkdir -p bin/esp8266/ - cp ports/esp8266/build/firmware-combined.bin bin/esp8266/adafruit-circuitpython-feather_huzzah-$version.bin - (( exit_status = exit_status || $? )) -fi - -exit $exit_status diff --git a/tools/build_board_info.py b/tools/build_board_info.py new file mode 100644 index 0000000000000..543224faea6f3 --- /dev/null +++ b/tools/build_board_info.py @@ -0,0 +1,309 @@ +#!/usr/bin/env python3 + +import json +import os +import subprocess +import sys +import sh +import base64 +from datetime import date +from sh.contrib import git + +sys.path.append("adabot") +import adabot.github_requests as github + +SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm", "cxd56", "mimxrt10xx", "litex"] + +BIN = ('bin',) +UF2 = ('uf2',) +BIN_UF2 = ('bin', 'uf2') +HEX = ('hex',) +HEX_UF2 = ('hex', 'uf2') +SPK = ('spk',) +DFU = ('dfu',) +BIN_DFU = ('bin', 'dfu') + +# Example: +# https://downloads.circuitpython.org/bin/trinket_m0/en_US/adafruit-circuitpython-trinket_m0-en_US-5.0.0-rc.0.uf2 +DOWNLOAD_BASE_URL = "https://downloads.circuitpython.org/bin" + +# Default extensions +extension_by_port = { + "nrf": UF2, + "atmel-samd": UF2, + "stm": BIN, + "cxd56": SPK, + "mimxrt10xx": HEX_UF2, + "litex": DFU, +} + +# Per board overrides +extension_by_board = { + # samd + "arduino_mkr1300": BIN_UF2, + "arduino_mkrzero": BIN_UF2, + "arduino_nano_33_iot": BIN_UF2, + "arduino_zero": BIN_UF2, + "feather_m0_adalogger": BIN_UF2, + "feather_m0_basic": BIN_UF2, + "feather_m0_rfm69": BIN_UF2, + "feather_m0_rfm9x": BIN_UF2, + + # nRF52840 dev kits that may not have UF2 bootloaders, + "makerdiary_nrf52840_mdk": HEX, + "makerdiary_nrf52840_mdk_usb_dongle": HEX, + "pca10056": BIN_UF2, + "pca10059": BIN_UF2, + "electronut_labs_blip": HEX +} + +aliases_by_board = { + "circuitplayground_express": ["circuitplayground_express_4h", "circuitplayground_express_digikey_pycon2019"], + "pybadge": ["edgebadge"], + "pyportal": ["pyportal_pynt"], + "gemma_m0": ["gemma_m0_pycon2018"], + "pewpew10": ["pewpew13"] +} + +def get_languages(): + languages = [] + for f in os.scandir("../locale"): + if f.name.endswith(".po"): + languages.append(f.name[:-3]) + return languages + +def get_board_mapping(): + boards = {} + for port in SUPPORTED_PORTS: + board_path = os.path.join("../ports", port, "boards") + for board_path in os.scandir(board_path): + if board_path.is_dir(): + board_files = os.listdir(board_path.path) + board_id = board_path.name + extensions = extension_by_port[port] + extensions = extension_by_board.get(board_path.name, extensions) + aliases = aliases_by_board.get(board_path.name, []) + boards[board_id] = {"port": port, + "extensions": extensions, + "download_count": 0, + "aliases": aliases} + for alias in aliases: + boards[alias] = {"port": port, + "extensions": extensions, + "download_count": 0, + "alias": True, + "aliases": []} + return boards + +def get_version_info(): + version = None + sha = git("rev-parse", "--short", "HEAD").stdout.decode("utf-8") + try: + version = git("describe", "--tags", "--exact-match").stdout.decode("utf-8").strip() + except sh.ErrorReturnCode_128: + # No exact match + pass + + if "GITHUB_SHA" in os.environ: + sha = os.environ["GITHUB_SHA"] + + if not version: + version="{}-{}".format(date.today().strftime("%Y%m%d"), sha[:7]) + + return sha, version + +def get_current_info(): + response = github.get("/repos/adafruit/circuitpython-org/git/refs/heads/master") + if not response.ok: + print(response.text) + raise RuntimeError("cannot get master sha") + commit_sha = response.json()["object"]["sha"] + + response = github.get("/repos/adafruit/circuitpython-org/contents/_data/files.json?ref=" + commit_sha) + if not response.ok: + print(response.text) + raise RuntimeError("cannot get previous files.json") + + response = response.json() + + git_info = commit_sha, response["sha"] + current_list = json.loads(base64.b64decode(response["content"]).decode("utf-8")) + current_info = {} + for info in current_list: + current_info[info["id"]] = info + return git_info, current_info + +def create_pr(changes, updated, git_info, user): + commit_sha, original_blob_sha = git_info + branch_name = "new_release_" + changes["new_release"] + + # Convert the dictionary to a list of boards. Liquid templates only handle arrays. + updated_list = [] + all_ids = sorted(updated.keys()) + for id in all_ids: + info = updated[id] + info["id"] = id + updated_list.append(info) + + updated = json.dumps(updated_list, sort_keys=True, indent=4).encode("utf-8") + b"\n" + #print(updated.decode("utf-8")) + pr_title = "Automated website update for release {}".format(changes["new_release"]) + boards = "" + if changes["new_boards"]: + boards = "New boards:\n* " + "\n* ".join(changes["new_boards"]) + languages = "" + if changes["new_languages"]: + languages = "New languages:\n* " + "\n* ".join(changes["new_languages"]) + message = "Automated website update for release {} by Blinka.\n\n{}\n\n{}\n".format( + changes["new_release"], + boards, + languages + ) + + create_branch = { + "ref": "refs/heads/" + branch_name, + "sha": commit_sha + } + response = github.post("/repos/{}/circuitpython-org/git/refs".format(user), json=create_branch) + if not response.ok and response.json()["message"] != "Reference already exists": + print("unable to create branch") + print(response.text) + return + + update_file = { + "message": message, + "content": base64.b64encode(updated).decode("utf-8"), + "sha": original_blob_sha, + "branch": branch_name + } + + response = github.put("/repos/{}/circuitpython-org/contents/_data/files.json".format(user), json=update_file) + if not response.ok: + print("unable to post new file") + print(response.text) + return + pr_info = { + "title": pr_title, + "head": user + ":" + branch_name, + "base": "master", + "body": message, + "maintainer_can_modify": True + } + response = github.post("/repos/adafruit/circuitpython-org/pulls", json=pr_info) + if not response.ok: + print("unable to create pr") + print(response.text) + return + print(changes) + print(pr_info) + +def update_downloads(boards, release): + response = github.get("/repos/adafruit/circuitpython/releases/tags/{}".format(release)) + if not response.ok: + print(response.text) + raise RuntimeError("cannot get previous release info") + + assets = response.json()["assets"] + for asset in assets: + board_name = asset["name"].split("-")[2] + if board_name not in boards: + continue + boards[board_name]["download_count"] += asset["download_count"] + + +def print_active_user(): + response = github.get("/user") + if response.ok: + user = response.json()["login"] + print("Logged in as {}".format(user)) + return user + else: + print("Not logged in") + return None + +def generate_download_info(): + boards = {} + errors = [] + + new_tag = os.environ["RELEASE_TAG"] + + changes = { + "new_release": new_tag, + "new_boards": [], + "new_languages": [] + } + + user = print_active_user() + + sha, this_version = get_version_info() + + git_info, current_info = get_current_info() + + languages = get_languages() + + new_stable = "-" not in new_tag + + previous_releases = set() + previous_languages = set() + + # Delete the release we are replacing + for board in current_info: + info = current_info[board] + for version in info["versions"]: + previous_releases.add(version["version"]) + previous_languages.update(version["files"].keys()) + if version["stable"] == new_stable: + info["versions"].remove(version) + + board_mapping = get_board_mapping() + + for release in previous_releases: + update_downloads(board_mapping, release) + + for port in SUPPORTED_PORTS: + board_path = os.path.join("../ports", port, "boards") + for board_path in os.scandir(board_path): + if board_path.is_dir(): + board_files = os.listdir(board_path.path) + board_id = board_path.name + board_info = board_mapping[board_id] + + for alias in [board_id] + board_info["aliases"]: + alias_info = board_mapping[alias] + if alias not in current_info: + changes["new_boards"].append(alias) + current_info[alias] = {"downloads": 0, + "versions": []} + + new_version = { + "stable": new_stable, + "version": new_tag, + "files": {} + } + for language in languages: + files = [] + new_version["files"][language] = files + for extension in board_info["extensions"]: + files.append( + "{base_url}/{alias}/{language}/adafruit-circuitpython-{alias}-{language}-{tag}.{extension}" + .format( + base_url=DOWNLOAD_BASE_URL, + tag=new_tag, + alias=alias, + language=language, + extension=extension)) + current_info[alias]["downloads"] = alias_info["download_count"] + current_info[alias]["versions"].append(new_version) + + changes["new_languages"] = set(languages) - previous_languages + + if changes["new_release"] and user: + create_pr(changes, current_info, git_info, user) + else: + print("No new release to update") + +if __name__ == "__main__": + if "RELEASE_TAG" in os.environ and os.environ["RELEASE_TAG"]: + generate_download_info() + else: + print("skipping website update because this isn't a tag") diff --git a/tools/build_memory_info.py b/tools/build_memory_info.py index a8f84bbb6aa17..93b4c1e82f19f 100644 --- a/tools/build_memory_info.py +++ b/tools/build_memory_info.py @@ -41,6 +41,8 @@ bss = 0 # stdin is the linker output. for line in sys.stdin: + # Uncomment to see linker output. + # print(line) line = line.strip() if not line.startswith("text"): text, data, bss = map(int, line.split()[:3]) @@ -50,7 +52,7 @@ with open(sys.argv[1], "r") as f: for line in f: line = line.strip() - if line.startswith(("FLASH", "RAM")): + if line.startswith(("FLASH_FIRMWARE", "FLASH", "RAM")): regions[line.split()[0]] = line.split("=")[-1] for region in regions: @@ -59,12 +61,19 @@ space = space.split("/*")[0] space = K_PATTERN.sub(K_REPLACE, space) space = M_PATTERN.sub(M_REPLACE, space) - regions[region] = eval(space) + regions[region] = int(eval(space)) -free_flash = regions["FLASH"] - text - data -free_ram = regions["RAM"] - data - bss -print(free_flash, "bytes free in flash out of", regions["FLASH"], "bytes (", regions["FLASH"] / 1024, "kb ).") -print(free_ram, "bytes free in ram for stack out of", regions["RAM"], "bytes (", regions["RAM"] / 1024, "kb ).") +# TODO Remove check for both FLASH_FIRMWARE and FLASH after all ports are converted to use FLASH_FIRMWARE. +try: + firmware_region = regions["FLASH_FIRMWARE"] +except KeyError: + firmware_region = regions["FLASH"] +ram_region = regions["RAM"] + +free_flash = firmware_region - text - data +free_ram = ram_region - data - bss +print("{} bytes free in flash firmware space out of {} bytes ({}kB).".format(free_flash, firmware_region, firmware_region / 1024)) +print("{} bytes free in ram for stack and heap out of {} bytes ({}kB).".format(free_ram, ram_region, ram_region / 1024)) print() # Check that we have free flash space. GCC doesn't fail when the text + data diff --git a/tools/build_release_files.py b/tools/build_release_files.py new file mode 100755 index 0000000000000..09133e51fa3f1 --- /dev/null +++ b/tools/build_release_files.py @@ -0,0 +1,89 @@ +#! /usr/bin/env python3 + +import os +import sys +import subprocess +import shutil +import build_board_info as build_info +import time + +for port in build_info.SUPPORTED_PORTS: + result = subprocess.run("rm -rf ../ports/{port}/build*".format(port=port), shell=True) + +PARALLEL = "-j 5" +if "GITHUB_ACTION" in os.environ: + PARALLEL="-j 2" + +all_boards = build_info.get_board_mapping() +build_boards = list(all_boards.keys()) +if "BOARDS" in os.environ: + build_boards = os.environ["BOARDS"].split() + +sha, version = build_info.get_version_info() + +languages = build_info.get_languages() +exit_status = 0 +for board in build_boards: + bin_directory = "../bin/{}/".format(board) + os.makedirs(bin_directory, exist_ok=True) + board_info = all_boards[board] + + for language in languages: + bin_directory = "../bin/{board}/{language}".format(board=board, language=language) + os.makedirs(bin_directory, exist_ok=True) + start_time = time.monotonic() + + # Normally different language builds are all done based on the same set of compiled sources. + # But sometimes a particular language needs to be built from scratch, if, for instance, + # CFLAGS_INLINE_LIMIT is set for a particular language to make it fit. + clean_build_check_result = subprocess.run( + "make -C ../ports/{port} TRANSLATION={language} BOARD={board} check-release-needs-clean-build | fgrep 'RELEASE_NEEDS_CLEAN_BUILD = 1'".format( + port = board_info["port"], language=language, board=board), + shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + clean_build = clean_build_check_result.returncode == 0 + + build_dir = "build-{board}".format(board=board) + if clean_build: + build_dir += "-{language}".format(language=language) + + make_result = subprocess.run( + "make -C ../ports/{port} TRANSLATION={language} BOARD={board} BUILD={build}".format( + port = board_info["port"], language=language, board=board, build=build_dir), + shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + + build_duration = time.monotonic() - start_time + success = "\033[32msucceeded\033[0m" + if make_result.returncode != 0: + exit_status = make_result.returncode + success = "\033[31mfailed\033[0m" + + other_output = "" + + for extension in board_info["extensions"]: + temp_filename = "../ports/{port}/{build}/firmware.{extension}".format( + port=board_info["port"], build=build_dir, extension=extension) + for alias in board_info["aliases"] + [board]: + bin_directory = "../bin/{alias}/{language}".format( + alias=alias, language=language) + os.makedirs(bin_directory, exist_ok=True) + final_filename = "adafruit-circuitpython-{alias}-{language}-{version}.{extension}".format( + alias=alias, language=language, version=version, extension=extension) + final_filename = os.path.join(bin_directory, final_filename) + try: + shutil.copyfile(temp_filename, final_filename) + except FileNotFoundError: + other_output = "Cannot find file {}".format(temp_filename) + if exit_status == 0: + exit_status = 1 + + print("Build {board} for {language}{clean_build} took {build_duration:.2f}s and {success}".format( + board=board, language=language, clean_build=(" (clean_build)" if clean_build else ""), + build_duration=build_duration, success=success)) + + print(make_result.stdout.decode("utf-8")) + print(other_output) + + # Flush so we will see something before 10 minutes has passed. + print(flush=True) + +sys.exit(exit_status) diff --git a/tools/chart_code_size.py b/tools/chart_code_size.py new file mode 100644 index 0000000000000..0b55787fa4a34 --- /dev/null +++ b/tools/chart_code_size.py @@ -0,0 +1,454 @@ +# This script renders a graph of the CircuitPython rom image. +# It takes the single elf file and uses objdump to get its contents. + +import pygraphviz as pgv +import click +import sh + +# Replace dashes with underscores +objdump = sh.arm_none_eabi_objdump + +def parse_hex(h): + return int("0x" + h, 0) + +BAD_JUMPS = ["UNPREDICTABLE", "_etext"] + +SPECIAL_NODE_COLORS = { + "main": "pink", + "exception_table": "green" +} + +@click.command() +@click.argument("elf_filename") +def do_all_the_things(elf_filename): + symbol = None + last_address = 0 + all_symbols = {} + symbols_by_debug_address = {} + symbols_by_memory_address = {} + symbols_by_linkage_name = {} + # Gather type info so we know how to treat the disassembly + debug_dump = objdump("--dwarf=info", elf_filename) + debug_dump_lines = debug_dump.stdout.decode("utf-8").split("\n") + symbol_stack = [] + symbol = None + ignore = False + min_call_site_param = 0x20000000 + for line in debug_dump_lines: + if not line: + continue + parts = line.split() + if line[1] == "<": + if parts[-1] == "0": + symbol = symbol_stack.pop() + continue + debug_type = parts[-1].strip("()") + ignore = False + # skip info about function parameters + if debug_type == "DW_TAG_formal_parameter": + ignore = True + depth = int(parts[0].split(">")[0].strip("<")) + if len(symbol_stack) == (depth - 1) and depth > 0: + symbol_stack.append(symbol) + elif symbol and "name" in symbol: + if symbol["debug_type"] == "DW_TAG_variable": + if "start_address" not in symbol: + pass + else: + symbols_by_memory_address[symbol["start_address"]] = symbol + elif symbol["debug_type"] in ["DW_TAG_member", "DW_TAG_label", "DW_TAG_typedef", "DW_TAG_enumerator", "DW_TAG_enumeration_type", "DW_TAG_base_type", "DW_TAG_structure_type", "DW_TAG_compile_unit", "DW_TAG_union_type"]: + # skip symbols that don't end up in memory. the type info is available through the debug address map + pass + else: + if symbol["name"] in all_symbols: + # print(depth, symbol["name"]) + # print(symbol) + # print(all_symbols[symbol["name"]]) + # print() + pass + all_symbols[symbol["name"]] = symbol + elif symbol and symbol["debug_type"] == "DW_TAG_GNU_call_site_parameter" and "call_site_value" in symbol: + parent = -1 + while symbol_stack[parent]["debug_type"] != "DW_TAG_subprogram": + parent -= 1 + parent = symbol_stack[parent] + + # Only point to ROM + addr = symbol["call_site_value"] + if 0x2000 <= addr < 0x20000000: + if "outgoing_pointers" not in parent: + parent["outgoing_pointers"] = set() + parent["outgoing_pointers"].add(addr) + if addr not in symbols_by_memory_address: + symbols_by_memory_address[addr] = symbol + min_call_site_param = min(addr, min_call_site_param) + symbol["name"] = "name{:x}".format(addr) + address = parse_hex(parts[0].split("<")[-1].strip(">:")) + symbol = {"debug_address": address, "debug_type": debug_type, "other": []} + if debug_type == "DW_TAG_structure_type": + symbol["struct"] = {} + elif debug_type == "DW_TAG_array_type": + symbol["subtype"] = None + symbol["bound_count"] = 0 + symbol["maxlen"] = 0 + elif debug_type == "DW_TAG_subrange_type": + symbol_stack[-1]["subtype"] = symbol + symbols_by_debug_address[address] = symbol + elif ignore: + continue + elif line[:4] == " ": + tag = parts[1].strip(":") + if tag == "DW_AT_name": + symbol["name"] = parts[-1] + elif tag == "DW_AT_type": + symbol["type"] = int(parts[-1].strip("<>"), 0) + if symbol["debug_type"] == "DW_TAG_subrange_type": + if not symbol_stack[-1]["subtype"]: + symbol_stack[-1]["subtype"] = symbol + elif symbol_stack[-1]["subtype"]["type"] == symbol["type"]: + second_subtype = True + else: + raise RuntimeError() + elif tag == "DW_AT_upper_bound": + # Skip arrays with length defined by other variables + if parts[-1][0] != "<": + upper_bound = int(parts[-1]) + if symbol_stack[-1]["bound_count"] > 0: + symbol_stack[-1]["maxlen"] *= upper_bound + 1 + else: + symbol_stack[-1]["maxlen"] = upper_bound + 1 + symbol_stack[-1]["bound_count"] += 1 + elif tag == "DW_AT_byte_size": + symbol["size"] = int(parts[-1]) + elif tag == "DW_AT_inline": + symbol["inlined"] = True + elif tag == "DW_AT_low_pc": + addr = int(parts[-1], 0) + symbols_by_memory_address[addr] = symbol + elif tag == "DW_AT_location": + if parts[-2] == "(DW_OP_addr:": + addr = parse_hex(parts[-1].strip(")")) + if addr > 0: + symbol["start_address"] = addr + elif tag == "DW_AT_linkage_name": + symbol["linkage_name"] = parts[-1] + symbols_by_linkage_name[symbol["linkage_name"]] = symbol + elif tag == "DW_AT_data_member_location": + symbol_stack[-1]["struct"][int(parts[-1])] = symbol + elif tag == "DW_AT_GNU_call_site_value": + if parts[-2] == "(DW_OP_addr:": + symbol["call_site_value"] = parse_hex(parts[-1].strip(")")) + else: + symbol["other"].append(line) + #print(parts) + pass + else: + #print(line) + pass + + MEMORY_NONE = 0 + MEMORY_POINTER = 1 + MEMORY_PY_OBJECT = 2 + + def get_size(t): + if "size" in t: + return t["size"] + return get_size(symbols_by_debug_address[t["type"]]) + + def get_pointer_map(t, depth=0): + if t["debug_type"] == "DW_TAG_pointer_type": + return {0: MEMORY_POINTER} + elif t["debug_type"] in ["DW_TAG_const_type", "DW_TAG_typedef", "DW_TAG_member", "DW_TAG_subrange_type", "DW_TAG_volatile_type"]: + if "name" in t and t["name"] == "mp_rom_obj_t": + return {0: MEMORY_PY_OBJECT} + return get_pointer_map(symbols_by_debug_address[t["type"]], depth+1) + elif t["debug_type"] in ["DW_TAG_base_type", "DW_TAG_enumeration_type"]: + return {} + elif t["debug_type"] == "DW_TAG_union_type": + # skip for now + return {} + elif "struct" in t: + combined_map = {} + for offset in t["struct"]: + member = t["struct"][offset] + submap = get_pointer_map(member) + for suboffset in submap: + combined_map[offset + suboffset] = submap[suboffset] + return combined_map + elif "subtype" in t: + subtype = symbols_by_debug_address[t["type"]] + pmap = get_pointer_map(subtype, depth+1) + size = get_size(subtype) + expanded_map = {} + for i in range(t["maxlen"]): + for offset in pmap: + expanded_map[size * i + offset] = pmap[offset] + return expanded_map + else: + print("no recurse", t) + pass + return {} + + # Do a second pass to dereference the types + for symbol_address in symbols_by_memory_address: + symbol = symbols_by_memory_address[symbol_address] + if "type" in symbol: + if symbol["debug_type"] == "DW_TAG_variable": + symbol["pointer_map"] = get_pointer_map(symbols_by_debug_address[symbol["type"]]) + type_string = [] + t = symbol["type"] + offset = [] + while t != None: + t_symbol = symbols_by_debug_address[t] + t = t_symbol.get("type", None) + if "name" in t_symbol: + type_string.append(t_symbol["name"]) + elif t_symbol["debug_type"] == "DW_TAG_array_type": + type_string.append("[]") + elif t_symbol["debug_type"] == "DW_TAG_pointer_type": + type_string.append("*") + elif t_symbol["debug_type"] == "DW_TAG_const_type": + type_string.append("const") + elif t_symbol["debug_type"] == "DW_TAG_volatile_type": + type_string.append("volatile") + else: + #print(" ", t_symbol) + pass + type_string.reverse() + symbol["type_string"] = " ".join(type_string) + #print(symbol_name, symbol["debug_type"], symbol.get("type_string", "")) + + # print() + # print() + # print(all_symbols["mp_builtin_module_table"]) + # return + + # Gather size and call info + text_dump = objdump("-Dz", "-j", ".text", elf_filename) + text_dump_lines = text_dump.stdout.decode("utf-8").split("\n") + section = None + symbol = None + symbol_type = None + for line in text_dump_lines[4:]: + if line.startswith("Disassembly of section"): + section = line.split()[-1].strip(":") + elif not line: + if symbol and "end_address" not in symbol: + symbol["end_address"] = last_address + symbol["size"] = last_address - symbol["start_address"] + symbol = None + continue + elif line[0].isnumeric(): + symbol_address, symbol_name = line.split() + symbol_address = parse_hex(symbol_address) + symbol_name = symbol_name.strip("<>:") + if symbol_name in symbols_by_linkage_name: + linked_name = symbol_name + symbol = symbols_by_linkage_name[symbol_name] + if "name" in symbol: + non_linkage = symbol["name"] + if not non_linkage.startswith("__builtin"): + symbol_name = non_linkage + all_symbols[symbol_name] = symbol + if "name" not in symbol: + symbol["name"] = symbol_name + elif symbol_address in symbols_by_memory_address: + all_symbols[symbol_name] = symbols_by_memory_address[symbol_address] + if "name" not in all_symbols[symbol_name]: + all_symbols[symbol_name]["name"] = symbol_name + elif symbol_name not in all_symbols: + if symbol_name == "nlr_push_tail_var": + fake_type = all_symbols["mp_obj_get_type"]["type"] + symbol = {"debug_type": "DW_TAG_variable", "name": symbol_name, "type": fake_type} + else: + print(line) + print(symbol_name, symbol_address) + symbol = {"debug_type": "DW_TAG_subprogram", "name": symbol_name} + all_symbols[symbol_name] = symbol + #raise RuntimeError() + + symbol = all_symbols[symbol_name] + symbol["start_address"] = symbol_address + symbols_by_memory_address[symbol_address] = symbol + symbol["section"] = section + + if symbol["debug_type"] == "DW_TAG_subprogram": + symbol["outgoing_jumps"] = set() + symbol["incoming_jumps"] = set() + symbol_type = None + elif symbol["debug_type"] == "DW_TAG_variable": + symbol["outgoing_pointers"] = set() + symbol_type = symbols_by_debug_address[symbol["type"]] + all_symbols[symbol_name] = symbol + + elif line[0] == " ": + parts = line.strip().split() + last_address = parse_hex(parts[0].strip(":")) + + offset = last_address - symbol["start_address"] + if "pointer_map" in symbol: + if offset not in symbol["pointer_map"]: + #print(offset, symbol) + pass + else: + ref = parse_hex(parts[1]) + pointer_style = symbol["pointer_map"][offset] + if pointer_style == MEMORY_POINTER: + symbol["outgoing_pointers"].add(ref & 0xfffffffe) + elif pointer_style == MEMORY_PY_OBJECT and ref & 0x3 == 0: + symbol["outgoing_pointers"].add(ref) + if len(parts[1]) == 8 and parts[1][0] == "0": + addr = parse_hex(parts[1]) + if 0x2000 <= addr < 0x20000000: + if "outgoing_pointers" not in symbol: + symbol["outgoing_pointers"] = set() + symbol["outgoing_pointers"].add(addr) + elif "<" in line and symbol["debug_type"] == "DW_TAG_subprogram": + if line[-1] == ">": + jump_to = parts[-1].strip("<>").split("+")[0] + if "name" not in symbol: + print(jump_to) + print(symbol) + if jump_to != symbol["name"] and jump_to not in BAD_JUMPS: + symbol["outgoing_jumps"].add(jump_to) + #print(symbol_name, jump_to) + if jump_to == "_etext": + print(line) + elif "UNDEFINED" in line: + continue + elif parts[2] == "ldr": + continue + else: + print(line) + else: + #print(line) + pass + + # print() + print(hex(min_call_site_param)) + print(all_symbols["exception_table"]) + # return + + print("converting outgoing pointers to names") + + # Convert outgoing pointers to names from addresses + for symbol_name in all_symbols: + symbol = all_symbols[symbol_name] + if "outgoing_pointers" not in symbol: + continue + converted = set() + for outgoing in symbol["outgoing_pointers"]: + if outgoing in symbols_by_memory_address: + outgoing = symbols_by_memory_address[outgoing] + #print(outgoing) + if outgoing["debug_type"] in ["DW_TAG_GNU_call_site", "DW_TAG_lexical_block"]: + continue + if outgoing["name"] == "audioio_wavefile_type": + print(outgoing) + converted.add(outgoing["name"]) + symbol["outgoing_pointers"] = converted + + print("linking back") + # Link back + for symbol_name in all_symbols: + symbol = all_symbols[symbol_name] + if "outgoing_jumps" in symbol: + for outgoing in symbol["outgoing_jumps"]: + if outgoing not in all_symbols: + #print(outgoing, symbol_name) + continue + #print(all_symbols[outgoing], symbol_name) + + referenced_symbol = all_symbols[outgoing] + if "incoming_jumps" not in referenced_symbol: + #print(symbol_name, "->", outgoing) + referenced_symbol["incoming_jumps"] = set() + referenced_symbol["incoming_jumps"].add(symbol_name) + if "outgoing_pointers" in symbol: + for outgoing in symbol["outgoing_pointers"]: + if outgoing not in all_symbols: + #print(outgoing, symbol_name) + continue + #print(all_symbols[outgoing], symbol_name) + + referenced_symbol = all_symbols[outgoing] + if "incoming_pointers" not in referenced_symbol: + #print(symbol_name, "->", outgoing) + referenced_symbol["incoming_pointers"] = set() + referenced_symbol["incoming_pointers"].add(symbol_name) + + print(all_symbols["exception_table"]) + + # Chart it all + print("charting {} symbols".format(len(all_symbols))) + callgraph = pgv.AGraph(directed=True) + for i, symbol_name in enumerate(all_symbols): + symbol = all_symbols[symbol_name] + # print(i, symbol_name) + # if "outgoing_jumps" in symbol: + # print(" ", len(symbol["outgoing_jumps"]), "jumps") + # if "outgoing_pointers" in symbol: + # print(" ", len(symbol["outgoing_pointers"]), "ptrs") + # if i > 3000: + # break + if ("incoming_jumps" not in symbol or len(symbol["incoming_jumps"]) == 0) and ("incoming_pointers" not in symbol or len(symbol["incoming_pointers"]) == 0): + #print(symbol_name) + continue + if "start_address" not in symbol: + continue + callgraph.add_node(symbol_name) + if "outgoing_jumps" in symbol: + for outgoing in symbol["outgoing_jumps"]: + callgraph.add_edge(symbol_name, outgoing) + if "outgoing_pointers" in symbol: + for outgoing in symbol["outgoing_pointers"]: + callgraph.add_edge(symbol_name, outgoing, color="red") + #print(symbol_name, symbol) + + # Style all of the nodes + print("styling") + for node in callgraph.iternodes(): + if node.name not in all_symbols: + continue + symbol = all_symbols[node.name] + node.attr["shape"] = "box" + text_width_ish = len(node.name) * 0.1 + if "size" not in symbol: + print(symbol) + size = symbol["size"] / 8 + square_size = size ** 0.5 + if text_width_ish > square_size: + w = text_width_ish + h = size / text_width_ish + else: + w = square_size + h = square_size + node.attr["width"] = w + node.attr["height"] = h + node.attr["label"] = node.name + "\r\n" + str(symbol["size"]) + " bytes" + node.attr["style"] = "filled" + + incoming = 0 + if "incoming_jumps" in symbol: + incoming += len(symbol["incoming_jumps"]) + if "incoming_pointers" in symbol: + incoming += len(symbol["incoming_pointers"]) + + if node.name in SPECIAL_NODE_COLORS: + node.attr["color"] = SPECIAL_NODE_COLORS[node.name] + elif incoming == 1: + node.attr["color"] = "lightblue" + elif incoming > 25: + print("delete", node.name, "because it has {} incoming".format(incoming)) + callgraph.delete_node(node.name) + elif incoming > 15: + node.attr["color"] = "red" + + print("drawing") + callgraph.layout(prog="dot") + fn = "callgraph.svg" + print(fn) + callgraph.draw(fn) + +if __name__ == "__main__": + do_all_the_things() diff --git a/tools/check_translations.py b/tools/check_translations.py new file mode 100644 index 0000000000000..7c008d3da72b4 --- /dev/null +++ b/tools/check_translations.py @@ -0,0 +1,25 @@ +# Validate that all entries in the .pot are in every .po. Only the .pot is updated so we can detect +# if a translation was added to the source but isn't in a .po. This ensures translators can grab +# complete files to work on. + +import sys +import polib + + +template_filename = sys.argv[1] +po_filenames = sys.argv[2:] + +template = polib.pofile(template_filename) +all_ids = set([x.msgid for x in template]) +for po_filename in po_filenames: + print("Checking", po_filename) + po_file = polib.pofile(po_filename) + po_ids = set([x.msgid for x in po_file]) + + missing = all_ids - po_ids + if missing: + print("Missing message id. Please run `make translate`") + print(missing) + sys.exit(-1) + else: + print("ok") diff --git a/tools/ci_new_boards_check.py b/tools/ci_new_boards_check.py new file mode 100644 index 0000000000000..8bb8876fbcce2 --- /dev/null +++ b/tools/ci_new_boards_check.py @@ -0,0 +1,51 @@ +#! /usr/bin/env python3 + +import sys +import os +import json +import yaml + +import build_board_info + +workflow_file = '.github/workflows/build.yml' + +# Get boards in json format +boards_info_json = build_board_info.get_board_mapping() + +# Get all the boards out of the json format +info_boards = [board for board in boards_info_json.keys() if not boards_info_json[board].get("alias", False)] + +# We need to know the path of the workflow file +base_path = os.path.dirname(__file__) +yml_path = os.path.abspath(os.path.join(base_path, '..', workflow_file)) + +# Loading board list based on build jobs in the workflow file. +ci_boards = [] +with open(yml_path, "r") as f: + workflow = yaml.safe_load(f) + +ok = True +for job in workflow["jobs"]: + if not job.startswith("build"): + continue + job_boards = workflow["jobs"][job]["strategy"]["matrix"]["board"] + if job_boards != sorted(job_boards): + print("Boards for job \"{}\" not sorted. Must be:".format(job)) + print(" - \"" + "\"\n - \"".join(sorted(job_boards)) + "\"") + ok = False + ci_boards.extend(job_boards) + +# All the travis_boards elements must be on info_boards +info_boards.sort() +ci_boards.sort() + +missing_boards = set(info_boards) - set(ci_boards) + +if missing_boards: + ok = False + print('Boards missing in {}:'.format(workflow_file)) + for board in missing_boards: + print(board) + +if not ok: + sys.exit(1) diff --git a/tools/convert_release_notes.py b/tools/convert_release_notes.py new file mode 100644 index 0000000000000..87b7e444b7fc4 --- /dev/null +++ b/tools/convert_release_notes.py @@ -0,0 +1,62 @@ +import sys +import mistune + +print(sys.argv[1]) + +with open(sys.argv[1], "r") as source_file: + source = source_file.read() + +html = mistune.Markdown() + +print() +print("HTML") +print("=====================================") +print("From the GitHub release page:\n
") +print(html(source)) +print("
") + +class AdafruitBBCodeRenderer: + def __init__(self, **kwargs): + self.options = kwargs + + def placeholder(self): + return '' + + def paragraph(self, text): + return text + "\n\n" + + def text(self, text): + return text + + def link(self, link, title, text): + return "[url={}]{}[/url]".format(link, text) + + def autolink(self, link, is_email): + if not is_email: + return "[url={}]{}[/url]".format(link, link) + return link + + def header(self, text, level, raw): + return "[b][size=150]{}[/size][/b]\n".format(text) + + def codespan(self, text): + return "[color=#E74C3C][size=95]{}[/size][/color]".format(text) + + def list_item(self, text): + return "[*]{}[/*]\n".format(text.strip()) + + def list(self, body, ordered=True): + ordered_indicator = "=" if ordered else "" + return "[list{}]\n{}[/list]".format(ordered_indicator, body) + + def double_emphasis(self, text): + return "[b]{}[/b]".format(text) + +bbcode = mistune.Markdown(renderer=AdafruitBBCodeRenderer()) + +print() +print("BBCode") +print("=====================================") +print("From the [url=]GitHub release page[/url]:\n[quote]") +print(bbcode(source)) +print("[/quote]") diff --git a/tools/cpboard.py b/tools/cpboard.py new file mode 100644 index 0000000000000..0b9c43c6140e8 --- /dev/null +++ b/tools/cpboard.py @@ -0,0 +1,684 @@ +#!/usr/bin/env python3 +# +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +# Copyright (c) 2018 Noralf Trønnes +# +# Parts taken from pyboard.py: +# Copyright (c) 2014-2016 Damien P. George +# Copyright (c) 2017 Paul Sokolovsky +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +import os +import re +import serial +import sys +import time + +import serial.tools.list_ports +import sh +import shutil + +class CPboardError(BaseException): + pass + +# supervisor/messages/default.h: +MSG_NEWLINE = b"\r\n" +MSG_SAFE_MODE_CRASH = b"Looks like our core CircuitPython code crashed hard. Whoops!" +MSG_SAFE_MODE_BROWN_OUT_LINE_1 = b"The microcontroller's power dipped. Please make sure your power supply provides" +MSG_SAFE_MODE_BROWN_OUT_LINE_2 = b"enough power for the whole circuit and press reset (after ejecting CIRCUITPY)." +MSG_WAIT_BEFORE_REPL = b"Press any key to enter the REPL. Use CTRL-D to reload." + +class REPL: + CHAR_CTRL_A = b'\x01' + CHAR_CTRL_B = b'\x02' + CHAR_CTRL_C = b'\x03' + CHAR_CTRL_D = b'\x04' + + def __init__(self, board): + self.board = board + self.write_chunk_size = 32 + self.safe_mode = False + self.session = b'' + + def __enter__(self): + self.reset() + return self + + def __exit__(self, exception_type, exception_value, traceback): + pass + + @property + def serial(self): + return self.board.serial + + def read(self): + if self.serial.inWaiting(): + data = self.serial.read(self.serial.inWaiting()) + else: + data = b'' + self.session += data + return data + + def read_until(self, ending, timeout=10): + data = b'' + timeout_count = 0 + while True: + if data.endswith(ending): + break + elif self.serial.inWaiting() > 0: + new_data = self.serial.read(1) + data += new_data + self.session += new_data + timeout_count = 0 + else: + timeout_count += 1 + if timeout is not None and timeout_count >= 100 * timeout: + raise TimeoutError(110, "timeout waiting for", ending) + time.sleep(0.01) + return data + + def write(self, data, chunk_size=None): + if chunk_size is None: + chunk_size = self.write_chunk_size + if not isinstance(data, bytes): + data = bytes(data, encoding='utf8') + + for i in range(0, len(data), chunk_size): + chunk = data[i:min(i + chunk_size, len(data))] + self.session += chunk + self.serial.write(chunk) + time.sleep(0.01) + + def reset(self): + # Use read() since serial.reset_input_buffer() fails with termios.error now and then + self.read() + self.session = b'' + self.write(b'\r' + REPL.CHAR_CTRL_C + REPL.CHAR_CTRL_C) # interrupt any running program + self.write(b'\r' + REPL.CHAR_CTRL_B) # enter or reset friendly repl + data = self.read_until(b'>>> ') + + def execute(self, code, timeout=10, async=False): + self.read() # Throw away + + self.write(REPL.CHAR_CTRL_A) + self.read_until(b'\r\n>') + + self.write(code) + + self.write(REPL.CHAR_CTRL_D) + if async: + return b'', b'' + self.read_until(b'OK') + + output = self.read_until(b'\x04', timeout=timeout) + output = output[:-1] + + error = self.read_until(b'\x04') + error = error[:-1] + + return output, error + + def run(self): + if self.safe_mode: + raise RuntimeError("Can't run in safe mode") + + self.reset() + + self.write(REPL.CHAR_CTRL_D) + data = self.read_until(b' output:\r\n') + if b'Running in safe mode' in data: + self.safe_mode = True + raise RuntimeError("Can't run in safe mode") + + # TODO: MSG_SAFE_MODE_CRASH + # TODO: BROWNOUT + + marker = MSG_NEWLINE + MSG_WAIT_BEFORE_REPL + MSG_NEWLINE + data = self.read_until(marker) + data = data.split(marker)[0] + + # Haven't found out why we have to strip off this... + if data.endswith(b'\r\n\r\n'): + data = data[:-4] + return data + + +class Disk: + def __init__(self, dev): + self.dev = os.path.realpath(dev) + self.mountpoint = None + with open('/etc/mtab', 'r') as f: + mtab = f.read() + mount = [mount.split(' ') for mount in mtab.splitlines() if mount.startswith(self.dev)] + if mount: + self._path = mount[0][1] + else: + name = os.path.basename(dev) + sh.pmount("-tvfat", dev, name, _timeout=10) + self.mountpoint = "/media/" + name + self._path = self.mountpoint + + def __enter__(self): + return self + + def __exit__(self, exception_type, exception_value, traceback): + try: + self.close() + except: + pass + + @property + def path(self): + return self._path + + def close(self): + if not self.mountpoint: + return + mountpoint = self.mountpoint + self.mountpoint = None + + start_time = time.monotonic() + unmounted = False + while not unmounted and start_time - time.monotonic() < 30: + try: + sh.pumount(mountpoint) + unmounted = True + except sh.ErrorReturnCode_5: + time.sleep(0.1) + + def sync(self): + disk_device = os.path.basename(self.dev)[:-1] + os.sync() + # Monitor the block device so we know when the sync request is actually finished. + with open("/sys/block/" + disk_device + "/stat", "r") as f: + disk_inflight = 1 + last_wait_time = 0 + wait_time = 1 + while disk_inflight > 0 or wait_time > last_wait_time: + f.seek(0) + stats = f.read() + block_stats = stats.split() + disk_inflight = int(block_stats[8]) + last_wait_time = wait_time + wait_time = int(block_stats[9]) + + def copy(self, src, dst=None, sync=True): + if dst is None: + dst = os.path.basename(src) + shutil.copy(src, os.path.join(self.path, dst)) + if sync: + self.sync() + + +class Firmware: + def __init__(self, board): + self.board = board + + @property + def disk(self): + disks = self.board.get_disks() + if len(disks) != 1: + raise RuntimeError("Boot disk not found for: " + self.board.device) + return Disk(disks[0]) + + @property + def info(self): + with self.disk as disk: + fname = os.path.join(disk.path, 'INFO_UF2.TXT') + with open(fname, 'r') as f: + info = f.read() + lines = info.splitlines() + res = {} + res['header'] = lines[0] + for line in lines[1:]: + k, _, v = line.partition(':') + res[k.replace(':', '')] = v.strip() + return res + + def upload(self, fw): + with open(fw, 'rb') as f: + header = f.read(32) + if header[0:4] != b'UF2\n': + raise ValueError('Only UF2 files are supported') + self.board.close() + with self.disk as disk: + disk.copy(fw, sync=False) + + +class CPboard: + @classmethod + def from_try_all(cls, name, **kwargs): + try: + return CPboard.from_build_name(name, **kwargs) + except ValueError: + pass + + vendor, _, product = name.partition(':') + if vendor and product: + return CPboard.from_usb(**kwargs, idVendor=int(vendor, 16), idProduct=int(product, 16)) + + return CPboard(name, **kwargs) + + @classmethod + def from_build_name(cls, name, **kwargs): + boards = { + #'arduino_zero' + 'circuitplayground_express' : (0x239a, 0x8019), + #'feather_m0_adalogger' : (0x239a, ), + #'feather_m0_basic' : (0x239a, ), + 'feather_m0_express' : (0x239a, 0x8023), + #'feather_m0_rfm69' : (0x239a, ), + #'feather_m0_rfm9x' : (0x239a, ), + #'feather_m0_supersized' : (0x239a, ), + #'feather_m4_express' : (0x239a, ), + #'gemma_m0' : (0x239a, ), + #'itsybitsy_m0_express' : (0x239a, ), + #'itsybitsy_m4_express' : (0x239a, ), + 'metro_m0_express' : (0x239a, 0x8014), + 'metro_m4_express' : (0x239a, 0x8021), + #'metro_m4_express_revb' : (0x239a, ), + #'pirkey_m0' : (0x239a, ), + #'trinket_m0' : (0x239a, ), + #'trinket_m0_haxpress' : (0x239a, ), + #'ugame10' + } + + try: + vendor, product = boards[name] + except KeyError: + raise ValueError("Unknown build name: " + name) + + return CPboard.from_usb(**kwargs, idVendor=vendor, idProduct=product) + + @classmethod + def from_build_name_bootloader(cls, name, **kwargs): + boards = { + #'arduino_zero' + #'circuitplayground_express' : (0x239a, ), + #'feather_m0_adalogger' : (0x239a, ), + #'feather_m0_basic' : (0x239a, ), + 'feather_m0_express' : (0x239a, 0x001b), + #'feather_m0_rfm69' : (0x239a, ), + #'feather_m0_rfm9x' : (0x239a, ), + #'feather_m0_supersized' : (0x239a, ), + #'feather_m4_express' : (0x239a, ), + #'gemma_m0' : (0x239a, ), + #'itsybitsy_m0_express' : (0x239a, ), + #'itsybitsy_m4_express' : (0x239a, ), + #'metro_m0_express' : (0x239a, 0x8014), + 'metro_m4_express' : (0x239a, 0x0021), + #'metro_m4_express_revb' : (0x239a, ), + #'pirkey_m0' : (0x239a, ), + #'trinket_m0' : (0x239a, ), + #'trinket_m0_haxpress' : (0x239a, ), + #'ugame10' + } + + try: + vendor, product = boards[name] + except KeyError: + raise ValueError("Unknown build name: " + name) + + board = CPboard.from_usb(**kwargs, idVendor=vendor, idProduct=product) + board.bootloader = True + return board + + @classmethod + def from_usb(cls, baudrate=115200, wait=0, timeout=10, **kwargs): + import usb.core + dev = usb.core.find(**kwargs) + if not dev: + s = "Can't find USB device: " + args = [] + for x in kwargs.items(): + try: + args.append('%s=0x%x' % x) + except: + args.append('%s = %s' % x) + raise RuntimeError("Can't find USB device: " + ', '.join(args)) + return cls(dev, baudrate=baudrate, wait=wait, timeout=timeout) + + def __init__(self, device, baudrate=115200, wait=0, timeout=10): + self.device = device + self.usb_dev = None + try: + # Is it a usb.core.Device? + portstr = ':' + '.'.join(map(str, device.port_numbers)) + ':' + except: + pass + else: + serials = [serial for serial in os.listdir("/dev/serial/by-path") if portstr in serial] + if len(serials) != 1: + raise RuntimeError("Can't find excatly one matching usb serial device") + self.device = os.path.realpath("/dev/serial/by-path/" + serials[0]) + self.usb_dev = device + + self.baudrate = baudrate + self.wait = wait + self.timeout = timeout + self.debug = True + self.mount = None + self.serial = None + self.bootloader = False + self.repl = REPL(self) + + def __enter__(self): + self.open() + return self + + def __exit__(self, exception_type, exception_value, traceback): + self.close() + + def open(self, baudrate=None, wait=None): + if self.serial: + return + if baudrate is None: + baudrate = self.baudrate + if wait is None: + wait = self.wait + + delayed = False + for attempt in range(wait + 1): + try: + self.serial = serial.Serial(self.device, baudrate=self.baudrate, timeout=self.timeout, write_timeout=self.timeout, interCharTimeout=1) + break + except (OSError, IOError): # Py2 and Py3 have different errors + if wait == 0: + continue + if attempt == 0: + sys.stdout.write('Waiting {} seconds for board '.format(wait)) + delayed = True + time.sleep(1) + sys.stdout.write('.') + sys.stdout.flush() + else: + if delayed: + print('') + raise CPboardError('failed to access ' + self.device) + if delayed: + print('') + + def close(self): + if self.serial: + self.serial.close() + self.serial = None + + def exec(self, command, timeout=10, async=False): + with self.repl as repl: + try: + output, error = repl.execute(command, timeout=timeout, async=async) + except OSError as e: + if self.debug: + print('exec: session: ', self.repl.session) + raise CPboardError('timeout', e) + if error: + raise CPboardError('exception', output, error) + return output + + def eval(self, expression, timeout=10): + command = 'print({})'.format(expression) + with self.repl as repl: + output, error = repl.execute(command, timeout=timeout) + if error: + raise CPboardError('exception', output, error) + try: + res = eval(str(output, encoding='utf8')) + except: + raise CPboardError('failed to eval: %s' % output) + return res + + def _reset(self, mode='NORMAL'): + self.exec("import microcontroller;microcontroller.on_next_reset(microcontroller.RunMode.%s)" % mode) + try: + self.exec("import microcontroller;microcontroller.reset()", async=True) + except OSError: + pass + + def reset(self, safe_mode=False, delay=5, wait=10): + self._reset('SAFE_MODE' if safe_mode else 'NORMAL') + self.close() + time.sleep(delay) + self.open(wait) + time.sleep(delay) + + def reset_to_bootloader(self, repl=False): + if repl: + self._reset('BOOTLOADER') + self.close() + else: + self.close() + s = serial.Serial(self.device, 1200, write_timeout=4, timeout=4) + s.close() + + def get_port_info(self): + portinfo = None + for port_iter in serial.tools.list_ports.comports(): + if port_iter.device == self.device: + portinfo = port_iter + break + return portinfo + + @property + def serial_number(self): + try: # Permissions are needed to read the value + return self.usb_dev.serial_number + except: + pass + p = self.get_port_info() + return p.serial_number if p else None + + def get_disks(self): + if self.usb_dev: + portstr = ':' + '.'.join(map(str, self.usb_dev.port_numbers)) + ':' + return ["/dev/disk/by-path/" + disk for disk in os.listdir("/dev/disk/by-path") if portstr in disk] + serial = self.serial_number + if not serial: + raise RuntimeError("Serial number not found for: " + self.device) + return ["/dev/disk/by-id/" + disk for disk in os.listdir("/dev/disk/by-id") if serial in disk] + + @property + def disk(self): + disks = self.get_disks() + + part = [part for part in disks if 'part1' in part] + if not part: + raise RuntimeError("Disk not found for: " + self.device) + + return Disk(part[0]) + + @property + def firmware(self): + return Firmware(self) + + def execfile_disk(self, filename): + with self.disk as disk: + disk.copy(filename, 'code.py') + + with self.repl as repl: + try: + output = repl.run() + except OSError as e: + raise CPboardError('timeout', e) + except RuntimeError: + if self.repl.safe_mode: + raise PyboardError("Can't run in safe mode") + else: + raise + + return output + + def execfile(self, filename, timeout=10): + if os.environ.get('CPBOARD_EXEC_MODE') == 'disk': + return self.execfile_disk(filename) + else: + with open(filename, 'rb') as f: + pyfile = f.read() + return self.exec(pyfile, timeout=timeout) + + +# Implement just enough to make tests/run-tests work +PyboardError = CPboardError + +class Pyboard: + def __init__(self, device, baudrate=115200, user='micro', password='python', wait=0): + self.board = CPboard.from_try_all(device, baudrate=baudrate, wait=wait) + with self.board.disk as disk: + disk.copy('skip_if.py') + + def close(self): + self.board.close() + + def enter_raw_repl(self): + self.board.open() + + def execfile(self, filename): + return self.board.execfile(filename) + + +def eval_namedtuple(board, command): + from collections import namedtuple + s = board.exec("print(%s)" % command) + s = s.decode().strip() + items = [key.split('=') for key in s[1:-1].split(', ')] + keys = [item[0] for item in items] + vals = [item[1] for item in items] + nt = namedtuple('eval', keys) + res = nt(*[eval(val) for val in vals]) + return res + + +def os_uname(board): + return eval_namedtuple(board, "__import__('os').uname()") + +def print_verbose(cargs, *args, **kwargs): + if cargs.verbose: + print(*args, flush=True, **kwargs) + +def upload(args): + try: + board = CPboard.from_build_name_bootloader(args.board) + print_verbose(args, 'Board is already in the bootloader') + except (ValueError, RuntimeError): + board = CPboard.from_try_all(args.board) + + print_verbose(args, "Serial number :", board.serial_number) + + if not (args.quiet or board.bootloader): + board.open() + print('Current version:', os_uname(board).version, flush=True) + + if not board.bootloader: + print_verbose(args, 'Reset to bootloader...', end='') + board.reset_to_bootloader(repl=True) # Feather M0 Express doesn't respond to 1200 baud + time.sleep(5) + print_verbose(args, 'done') + + print_verbose(args, 'Bootloader:', board.firmware.info) + + print_verbose(args, 'Upload firmware...', end='') + board.firmware.upload(args.firmware) + print_verbose(args, 'done') + + print_verbose(args, 'Wait for board...', end='') + time.sleep(5) + print_verbose(args, 'done') + + if not args.quiet: + if board.bootloader: + board = CPboard.from_try_all(args.board) + board.open(wait=10) + print('New version:', os_uname(board).version, flush=True) + +def print_error_exit(args, e): + if args.debug: + return False + if not args.quiet: + print(e, file=sys.stderr) + sys.exit(1) + +def main(): + import argparse + cmd_parser = argparse.ArgumentParser(description='Circuit Python Board Tool') + cmd_parser.add_argument('board', help='build_name, vid:pid or /dev/tty') + cmd_parser.add_argument('-f', '--firmware', help='upload UF2 firmware file') + cmd_parser.add_argument('-c', '--command', help='program passed in as string') + cmd_parser.add_argument('--tty', action='store_true', help='print tty') + cmd_parser.add_argument('--verbose', '-v', action='count', default=0, help='be verbose') + cmd_parser.add_argument('-q', '--quiet', action='store_true', help='be quiet') + cmd_parser.add_argument('--debug', action='store_true', help='raise exceptions') + args = cmd_parser.parse_args() + + if args.quiet: + args.verbose = 0 + args.debug = False + + if args.firmware: + try: + upload(args) + except BaseException as e: + if not print_error_exit(args, e): + raise + sys.exit(0) + + try: + board = CPboard.from_try_all(args.board) + except BaseException as e: + if not print_error_exit(args, e): + raise + + if args.verbose: + exec_mode = os.environ.get('CPBOARD_EXEC_MODE') + if exec_mode: + print('CPBOARD_EXEC_MODE =', exec_mode) + + # Make sure we can open serial + try: + with board: + pass + except BaseException as e: + if not print_error_exit(args, e): + raise + + if args.tty: + print(board.device) + elif args.command: + with board as b: + print(b.eval(args.command)) + else: + with board as b: + print('Device: ', end='') + if b.usb_dev: + print('%04x:%04x on ' % (b.usb_dev.idVendor, b.usb_dev.idProduct), end='') + print(b.device) + print('Serial number:', b.serial_number) + uname = os_uname(b) + print('os.uname:') + print(' sysname:', uname.sysname) + print(' nodename:', uname.nodename) + print(' release:', uname.release) + print(' version:', uname.version) + print(' machine:', uname.machine) + +if __name__ == "__main__": + main() diff --git a/tools/dfu.py b/tools/dfu.py old mode 100755 new mode 100644 index 54b602438b381..dd6019235bd89 --- a/tools/dfu.py +++ b/tools/dfu.py @@ -1,6 +1,7 @@ #!/usr/bin/python # Written by Antonio Galea - 2010/11/18 +# Updated for DFU 1.1 by Sean Cross - 2020/03/31 # Distributed under Gnu LGPL 3.0 # see http://www.gnu.org/licenses/lgpl-3.0.txt @@ -23,30 +24,7 @@ def parse(file,dump_images=False): print ('File: "%s"' % file) data = open(file,'rb').read() crc = compute_crc(data[:-4]) - prefix, data = consume('<5sBIB',data,'signature version size targets') - print ('%(signature)s v%(version)d, image size: %(size)d, targets: %(targets)d' % prefix) - for t in range(prefix['targets']): - tprefix, data = consume('<6sBI255s2I',data,'signature altsetting named name size elements') - tprefix['num'] = t - if tprefix['named']: - tprefix['name'] = cstring(tprefix['name']) - else: - tprefix['name'] = '' - print ('%(signature)s %(num)d, alt setting: %(altsetting)s, name: "%(name)s", size: %(size)d, elements: %(elements)d' % tprefix) - tsize = tprefix['size'] - target, data = data[:tsize], data[tsize:] - for e in range(tprefix['elements']): - eprefix, target = consume('<2I',target,'address size') - eprefix['num'] = e - print (' %(num)d, address: 0x%(address)08x, size: %(size)d' % eprefix) - esize = eprefix['size'] - image, target = target[:esize], target[esize:] - if dump_images: - out = '%s.target%d.image%d.bin' % (file,t,e) - open(out,'wb').write(image) - print (' DUMPED IMAGE TO "%s"' % out) - if len(target): - print ("target %d: PARSE ERROR" % t) + data = data[len(data)-16:] suffix = named(struct.unpack('<4H3sBI',data[:16]),'device product vendor dfu ufd len crc') print ('usb: %(vendor)04x:%(product)04x, device: 0x%(device)04x, dfu: 0x%(dfu)04x, %(ufd)s, %(len)d, 0x%(crc)08x' % suffix) if crc != suffix['crc']: @@ -55,53 +33,49 @@ def parse(file,dump_images=False): if data: print ("PARSE ERROR") -def build(file,targets,device=DEFAULT_DEVICE): - data = b'' - for t,target in enumerate(targets): - tdata = b'' - for image in target: - tdata += struct.pack('<2I',image['address'],len(image['data']))+image['data'] - tdata = struct.pack('<6sBI255s2I',b'Target',0,1, b'ST...',len(tdata),len(target)) + tdata - data += tdata - data = struct.pack('<5sBIB',b'DfuSe',1,len(data)+11,len(targets)) + data +def build(file,data,device=DEFAULT_DEVICE): + # Parse the VID and PID from the `device` argument v,d=map(lambda x: int(x,0) & 0xFFFF, device.split(':',1)) - data += struct.pack('<4H3sB',0,d,v,0x011a,b'UFD',16) + + # Generate the DFU suffix, consisting of these fields: + # Field name | Length | Description + # ================+=========+================================ + # bcdDevice | 2 | The release number of this firmware (0xffff - don't care) + # idProduct | 2 | PID of this device + # idVendor | 2 | VID of this device + # bcdDFU | 2 | Version of this DFU spec (0x01 0x00) + # ucDfuSignature | 3 | The characters 'DFU', printed in reverse order + # bLength | 1 | The length of this suffix (16 bytes) + # dwCRC | 4 | A CRC32 of the data, including this suffix + data += struct.pack('<4H3sB',0xffff,d,v,0x0100,b'UFD',16) crc = compute_crc(data) + # Append the CRC32 of the entire block data += struct.pack(' 0: + action = "realloc" + current_heap[block] = {"start_block": block, "size": size, "start_trace": trace, "start_time": total_actions} + #change_root(trace, size) + else: + action = "free" + if trace[0][2] == "gc_sweep": + action = "sweep" + non_single_block_streak = 0 + if (trace[3][2] == "py_gc_collect" or (trace[3][2] == "gc_deinit" and count > 1)) and last_action != "sweep": + print(ticks_ms - last_ticks_ms, total_actions - last_total_actions, "gc.collect", max_nsbs) + print(actions) + print(block_sizes) + print(allocation_sources) + actions = {} + block_sizes = {} + allocation_sources = {} + if count % 2 == 0: + print() + count += 1 + last_total_actions = total_actions + last_ticks_ms = ticks_ms + max_nsbs = 0 + del current_heap[block] + alloc["end_cause"] = action + allocation_history.append(alloc) + if action not in actions: + actions[action] = 0 + actions[action] += 1 + last_action = action + #print(total_actions, non_single_block_streak, action, block, size) + total_actions += 1 +print(actions) +print(max_nsbs) +print() + +for alloc in current_heap.values(): + alloc["end_trace"] = "" + alloc["end_time"] = total_actions + allocation_history.append(alloc) + +def print_frame(frame, indent=0): + for key in sorted(frame): + if not frame[key]["blocks"] or key.startswith("../py/malloc.c") or key.startswith("../py/gc.c"): + continue + print(" " * (indent - 1), key, frame[key]["function"], frame[key]["blocks"], "blocks") + print_frame(frame[key]["subcalls"], indent + 2) + +# print_frame(root) +# total_blocks = 0 +# for key in sorted(root): +# total_blocks += root[key]["blocks"] +# print(total_blocks, "total blocks") + +# with open("allocation_history.json", "w") as f: +# json.dump(allocation_history, f) diff --git a/tools/gen-cpydiff.py b/tools/gen-cpydiff.py deleted file mode 100644 index aff5b56e7b092..0000000000000 --- a/tools/gen-cpydiff.py +++ /dev/null @@ -1,226 +0,0 @@ -# This file is part of the MicroPython project, http://micropython.org/ -# -# The MIT License (MIT) -# -# Copyright (c) 2016 Rami Ali -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" gen-cpydiff generates documentation which outlines operations that differ between MicroPython - and CPython. This script is called by the docs Makefile for html and Latex and may be run - manually using the command make gen-cpydiff. """ - -import os -import errno -import subprocess -import time -import re -from collections import namedtuple - -# MicroPython supports syntax of CPython 3.4 with some features from 3.5, and -# such version should be used to test for differences. If your default python3 -# executable is of lower version, you can point MICROPY_CPYTHON3 environment var -# to the correct executable. -if os.name == 'nt': - CPYTHON3 = os.getenv('MICROPY_CPYTHON3', 'python3.exe') - MICROPYTHON = os.getenv('MICROPY_MICROPYTHON', '../windows/micropython.exe') -else: - CPYTHON3 = os.getenv('MICROPY_CPYTHON3', 'python3') - MICROPYTHON = os.getenv('MICROPY_MICROPYTHON', '../unix/micropython') - -TESTPATH = '../tests/cpydiff/' -DOCPATH = '../docs/genrst/' -INDEXTEMPLATE = '../docs/differences/index_template.txt' -INDEX = 'index.rst' - -HEADER = '.. This document was generated by tools/gen-cpydiff.py\n\n' -UIMPORTLIST = {'struct', 'collections', 'json'} -CLASSMAP = {'Core': 'Core Language', 'Types': 'Builtin Types'} -INDEXPRIORITY = ['syntax', 'core_language', 'builtin_types', 'modules'] -RSTCHARS = ['=', '-', '~', '`', ':'] -SPLIT = '"""\n|categories: |description: |cause: |workaround: ' -TAB = ' ' - -Output = namedtuple('output', ['name', 'class_', 'desc', 'cause', 'workaround', 'code', - 'output_cpy', 'output_upy', 'status']) - -def readfiles(): - """ Reads test files """ - tests = list(filter(lambda x: x.endswith('.py'), os.listdir(TESTPATH))) - tests.sort() - files = [] - - for test in tests: - text = open(TESTPATH + test, 'r').read() - - try: - class_, desc, cause, workaround, code = [x.rstrip() for x in \ - list(filter(None, re.split(SPLIT, text)))] - output = Output(test, class_, desc, cause, workaround, code, '', '', '') - files.append(output) - except IndexError: - print('Incorrect format in file ' + TESTPATH + test) - - return files - -def uimports(code): - """ converts CPython module names into MicroPython equivalents """ - for uimport in UIMPORTLIST: - uimport = bytes(uimport, 'utf8') - code = code.replace(uimport, b'u' + uimport) - return code - -def run_tests(tests): - """ executes all tests """ - results = [] - for test in tests: - with open(TESTPATH + test.name, 'rb') as f: - input_cpy = f.read() - input_upy = uimports(input_cpy) - - process = subprocess.Popen(CPYTHON3, shell=True, stdout=subprocess.PIPE, stdin=subprocess.PIPE, stderr=subprocess.PIPE) - output_cpy = [com.decode('utf8') for com in process.communicate(input_cpy)] - - process = subprocess.Popen(MICROPYTHON, shell=True, stdout=subprocess.PIPE, stdin=subprocess.PIPE, stderr=subprocess.PIPE) - output_upy = [com.decode('utf8') for com in process.communicate(input_upy)] - - if output_cpy[0] == output_upy[0] and output_cpy[1] == output_upy[1]: - status = 'Supported' - print('Supported operation!\nFile: ' + TESTPATH + test.name) - else: - status = 'Unsupported' - - output = Output(test.name, test.class_, test.desc, test.cause, - test.workaround, test.code, output_cpy, output_upy, status) - results.append(output) - - results.sort(key=lambda x: x.class_) - return results - -def indent(block, spaces): - """ indents paragraphs of text for rst formatting """ - new_block = '' - for line in block.split('\n'): - new_block += spaces + line + '\n' - return new_block - -def gen_table(contents): - """ creates a table given any set of columns """ - xlengths = [] - ylengths = [] - for column in contents: - col_len = 0 - for entry in column: - lines = entry.split('\n') - for line in lines: - col_len = max(len(line) + 2, col_len) - xlengths.append(col_len) - for i in range(len(contents[0])): - ymax = 0 - for j in range(len(contents)): - ymax = max(ymax, len(contents[j][i].split('\n'))) - ylengths.append(ymax) - - table_divider = '+' + ''.join(['-' * i + '+' for i in xlengths]) + '\n' - table = table_divider - for i in range(len(ylengths)): - row = [column[i] for column in contents] - row = [entry + '\n' * (ylengths[i]-len(entry.split('\n'))) for entry in row] - row = [entry.split('\n') for entry in row] - for j in range(ylengths[i]): - k = 0 - for entry in row: - width = xlengths[k] - table += ''.join(['| {:{}}'.format(entry[j], width - 1)]) - k += 1 - table += '|\n' - table += table_divider - return table + '\n' - -def gen_rst(results): - """ creates restructured text documents to display tests """ - - # make sure the destination directory exists - try: - os.mkdir(DOCPATH) - except OSError as e: - if e.args[0] != errno.EEXIST and e.args[0] != errno.EISDIR: - raise - - toctree = [] - class_ = [] - for output in results: - section = output.class_.split(',') - for i in range(len(section)): - section[i] = section[i].rstrip() - if section[i] in CLASSMAP: - section[i] = CLASSMAP[section[i]] - if i >= len(class_) or section[i] != class_[i]: - if i == 0: - filename = section[i].replace(' ', '_').lower() - rst = open(DOCPATH + filename + '.rst', 'w') - rst.write(HEADER) - rst.write(section[i] + '\n') - rst.write(RSTCHARS[0] * len(section[i])) - rst.write(time.strftime("\nGenerated %a %d %b %Y %X UTC\n\n", time.gmtime())) - toctree.append(filename) - else: - rst.write(section[i] + '\n') - rst.write(RSTCHARS[min(i, len(RSTCHARS)-1)] * len(section[i])) - rst.write('\n\n') - class_ = section - rst.write('.. _cpydiff_%s:\n\n' % output.name.rsplit('.', 1)[0]) - rst.write(output.desc + '\n') - rst.write('~' * len(output.desc) + '\n\n') - if output.cause != 'Unknown': - rst.write('**Cause:** ' + output.cause + '\n\n') - if output.workaround != 'Unknown': - rst.write('**Workaround:** ' + output.workaround + '\n\n') - - rst.write('Sample code::\n\n' + indent(output.code, TAB) + '\n') - output_cpy = indent(''.join(output.output_cpy[0:2]), TAB).rstrip() - output_cpy = ('::\n\n' if output_cpy != '' else '') + output_cpy - output_upy = indent(''.join(output.output_upy[0:2]), TAB).rstrip() - output_upy = ('::\n\n' if output_upy != '' else '') + output_upy - table = gen_table([['CPy output:', output_cpy], ['uPy output:', output_upy]]) - rst.write(table) - - template = open(INDEXTEMPLATE, 'r') - index = open(DOCPATH + INDEX, 'w') - index.write(HEADER) - index.write(template.read()) - for section in INDEXPRIORITY: - if section in toctree: - index.write(indent(section + '.rst', TAB)) - toctree.remove(section) - for section in toctree: - index.write(indent(section + '.rst', TAB)) - -def main(): - """ Main function """ - - # set search path so that test scripts find the test modules (and no other ones) - os.environ['PYTHONPATH'] = TESTPATH - os.environ['MICROPYPATH'] = TESTPATH - - files = readfiles() - results = run_tests(files) - gen_rst(results) - -main() diff --git a/tools/gen_display_resources.py b/tools/gen_display_resources.py new file mode 100644 index 0000000000000..c08daf4776caa --- /dev/null +++ b/tools/gen_display_resources.py @@ -0,0 +1,199 @@ +import argparse + +import os +import struct +import sys + +sys.path.append("bitmap_font") +sys.path.append("../../tools/bitmap_font") + +from adafruit_bitmap_font import bitmap_font + +parser = argparse.ArgumentParser(description='Generate USB descriptors.') +parser.add_argument('--font', type=str, + help='Font path', required=True) +parser.add_argument('--extra_characters', type=str, + help='Unicode string of extra characters') +parser.add_argument('--sample_file', type=argparse.FileType('r'), + help='Text file that includes strings to support.') +parser.add_argument('--output_c_file', type=argparse.FileType('w'), required=True) + +args = parser.parse_args() + +class BitmapStub: + def __init__(self, width, height, color_depth): + self.width = width + self.rows = [b''] * height + + def _load_row(self, y, row): + self.rows[y] = bytes(row) + +f = bitmap_font.load_font(args.font, BitmapStub) + +# Load extra characters from the sample file. +sample_characters = set() +if args.sample_file: + for line in args.sample_file: + # Skip comments because we add additional characters in our huffman comments. + if line.startswith("//"): + continue + for c in line.strip(): + sample_characters.add(c) + +# Merge visible ascii, sample characters and extra characters. +visible_ascii = bytes(range(0x20, 0x7f)).decode("utf-8") +all_characters = visible_ascii +for c in sample_characters: + if c not in all_characters: + all_characters += c +if args.extra_characters: + all_characters.extend(args.extra_characters) +all_characters = "".join(sorted(set(all_characters))) +filtered_characters = all_characters + +# Try to pre-load all of the glyphs. Misses will still be slow later. +f.load_glyphs(set(ord(c) for c in all_characters)) + +# Get each glyph. +for c in set(all_characters): + if ord(c) not in f._glyphs: + print("Font missing character:", c, ord(c)) + filtered_characters = filtered_characters.replace(c, "") + continue + g = f.get_glyph(ord(c)) + if g["shift"][1] != 0: + raise RuntimeError("y shift") + +x, y, dx, dy = f.get_bounding_box() +tile_x, tile_y = x - dx, y - dy +total_bits = tile_x * len(all_characters) +total_bits += 32 - total_bits % 32 +bytes_per_row = total_bits // 8 +b = bytearray(bytes_per_row * tile_y) + +for x, c in enumerate(filtered_characters): + g = f.get_glyph(ord(c)) + start_bit = x * tile_x + g["bounds"][2] + start_y = (tile_y - 2) - (g["bounds"][1] + g["bounds"][3]) + for y, row in enumerate(g["bitmap"].rows): + for i in range(g["bounds"][0]): + byte = i // 8 + bit = i % 8 + if row[byte] & (1 << (7-bit)) != 0: + overall_bit = start_bit + (start_y + y) * bytes_per_row * 8 + i + b[overall_bit // 8] |= 1 << (7 - (overall_bit % 8)) + + +extra_characters = "" +for c in filtered_characters: + if c not in visible_ascii: + extra_characters += c + +c_file = args.output_c_file + +c_file.write("""\ + +#include "shared-bindings/displayio/Palette.h" +#include "supervisor/shared/display.h" + +""") + +c_file.write("""\ +_displayio_color_t terminal_colors[2] = { + { + .rgb888 = 0x000000, + .rgb565 = 0x0000, + .luma = 0x00, + .chroma = 0 + }, + { + .rgb888 = 0xffffff, + .rgb565 = 0xffff, + .luma = 0xff, + .chroma = 0 + }, +}; + +displayio_palette_t supervisor_terminal_color = { + .base = {.type = &displayio_palette_type }, + .colors = terminal_colors, + .color_count = 2, + .needs_refresh = false +}; +""") + +c_file.write("""\ +displayio_tilegrid_t supervisor_terminal_text_grid = {{ + .base = {{ .type = &displayio_tilegrid_type }}, + .bitmap = (displayio_bitmap_t*) &supervisor_terminal_font_bitmap, + .pixel_shader = &supervisor_terminal_color, + .x = 16, + .y = 0, + .pixel_width = {1}, + .pixel_height = {2}, + .bitmap_width_in_tiles = {0}, + .tiles_in_bitmap = {0}, + .width_in_tiles = 1, + .height_in_tiles = 1, + .tile_width = {1}, + .tile_height = {2}, + .tiles = NULL, + .partial_change = false, + .full_change = false, + .hidden = false, + .hidden_by_parent = false, + .moved = false, + .inline_tiles = false, + .in_group = true +}}; +""".format(len(all_characters), tile_x, tile_y)) + +c_file.write("""\ +const uint32_t font_bitmap_data[{}] = {{ +""".format(bytes_per_row * tile_y // 4)) + +for i, word in enumerate(struct.iter_unpack(">I", b)): + c_file.write("0x{:08x}, ".format(word[0])) + if (i + 1) % (bytes_per_row // 4) == 0: + c_file.write("\n") + +c_file.write("""\ +}; +""") + +c_file.write("""\ +displayio_bitmap_t supervisor_terminal_font_bitmap = {{ + .base = {{.type = &displayio_bitmap_type }}, + .width = {}, + .height = {}, + .data = (size_t*) font_bitmap_data, + .stride = {}, + .bits_per_value = 1, + .x_shift = 5, + .x_mask = 0x1f, + .bitmask = 0x1, + .read_only = true +}}; +""".format(len(all_characters) * tile_x, tile_y, bytes_per_row / 4)) + + +c_file.write("""\ +const fontio_builtinfont_t supervisor_terminal_font = {{ + .base = {{.type = &fontio_builtinfont_type }}, + .bitmap = &supervisor_terminal_font_bitmap, + .width = {}, + .height = {}, + .unicode_characters = (const uint8_t*) "{}", + .unicode_characters_len = {} +}}; +""".format(tile_x, tile_y, extra_characters, len(extra_characters.encode("utf-8")))) + +c_file.write("""\ +terminalio_terminal_obj_t supervisor_terminal = { + .base = { .type = &terminalio_terminal_type }, + .font = &supervisor_terminal_font, + .cursor_x = 0, + .cursor_y = 0, + .tilegrid = &supervisor_terminal_text_grid +}; +""") diff --git a/tools/gen_ld_files.py b/tools/gen_ld_files.py new file mode 100755 index 0000000000000..c2ac812bc9600 --- /dev/null +++ b/tools/gen_ld_files.py @@ -0,0 +1,60 @@ +#! /usr/bin/env python3 +import argparse + +import os +import os.path +import sys +import re +from string import Template + +parser = argparse.ArgumentParser(description='Apply #define values to .template.ld file.') +parser.add_argument('template_files', metavar='TEMPLATE_FILE', type=argparse.FileType('r'), + nargs='+', help="template filename: .template.ld") +parser.add_argument('--defines', type=argparse.FileType('r'), required=True) +parser.add_argument('--out_dir', required=True) + +args = parser.parse_args() + +defines = {} + +# +REMOVE_UL_RE = re.compile('([0-9]+)UL') +def remove_UL(s): + return REMOVE_UL_RE.sub(r'\1', s) + +# We skip all lines before +# // START_LD_DEFINES +# Then we look for lines like this: +# /*NAME_OF_VALUE=*/ NAME_OF_VALUE; +VALUE_LINE_RE = re.compile(r'^/\*\s*(\w+)\s*=\*/\s*(.*);\s*$') + +start_processing = False +for line in args.defines: + line = line.strip() + if line == '// START_LD_DEFINES': + start_processing = True + continue + if start_processing: + match = VALUE_LINE_RE.match(line) + if match: + name = match.group(1) + value = match.group(2).strip() + defines[name] = remove_UL(value) + +fail = False + +for template_file in args.template_files: + ld_template_basename = os.path.basename(template_file.name) + ld_pathname = os.path.join(args.out_dir, ld_template_basename.replace('.template.ld', '.ld')) + with open(ld_pathname, 'w') as output: + for k,v in defines.items(): + print('/*', k, '=', v, '*/', file=output) + print(file=output) + try: + output.write(Template(template_file.read()).substitute(defines)) + except KeyError as e: + print("ERROR: {}: No #define for '{}'".format(ld_pathname, e.args[0]), file=sys.stderr) + fail = True + +if fail: + sys.exit(1) diff --git a/tools/gen_usb_descriptor.py b/tools/gen_usb_descriptor.py new file mode 100644 index 0000000000000..5e25528f90a49 --- /dev/null +++ b/tools/gen_usb_descriptor.py @@ -0,0 +1,627 @@ +import argparse + +import os +import sys + +sys.path.append("../../tools/usb_descriptor") + +from adafruit_usb_descriptor import audio, audio10, cdc, hid, midi, msc, standard, util +import hid_report_descriptors + +DEFAULT_INTERFACE_NAME = 'CircuitPython' +ALL_DEVICES='CDC,MSC,AUDIO,HID' +ALL_DEVICES_SET=frozenset(ALL_DEVICES.split(',')) +DEFAULT_DEVICES='CDC,MSC,AUDIO,HID' + +ALL_HID_DEVICES='KEYBOARD,MOUSE,CONSUMER,SYS_CONTROL,GAMEPAD,DIGITIZER,XAC_COMPATIBLE_GAMEPAD,RAW' +ALL_HID_DEVICES_SET=frozenset(ALL_HID_DEVICES.split(',')) +# Digitizer works on Linux but conflicts with mouse, so omit it. +DEFAULT_HID_DEVICES='KEYBOARD,MOUSE,CONSUMER,GAMEPAD' + +parser = argparse.ArgumentParser(description='Generate USB descriptors.') +parser.add_argument('--manufacturer', type=str, + help='manufacturer of the device') +parser.add_argument('--product', type=str, + help='product name of the device') +parser.add_argument('--vid', type=lambda x: int(x, 16), + help='vendor id') +parser.add_argument('--pid', type=lambda x: int(x, 16), + help='product id') +parser.add_argument('--serial_number_length', type=int, default=32, + help='length needed for the serial number in digits') +parser.add_argument('--devices', type=lambda l: tuple(l.split(',')), default=DEFAULT_DEVICES, + help='devices to include in descriptor (AUDIO includes MIDI support)') +parser.add_argument('--hid_devices', type=lambda l: tuple(l.split(',')), default=DEFAULT_HID_DEVICES, + help='HID devices to include in HID report descriptor') +parser.add_argument('--interface_name', type=str, + help='The name/prefix to use in the interface descriptions', + default=DEFAULT_INTERFACE_NAME) +parser.add_argument('--msc_max_packet_size', type=int, default=64, + help='Max packet size for MSC') +parser.add_argument('--no-renumber_endpoints', dest='renumber_endpoints', action='store_false', + help='use to not renumber endpoint') +parser.add_argument('--cdc_ep_num_notification', type=int, default=0, + help='endpoint number of CDC NOTIFICATION') +parser.add_argument('--cdc_ep_num_data_out', type=int, default=0, + help='endpoint number of CDC DATA OUT') +parser.add_argument('--cdc_ep_num_data_in', type=int, default=0, + help='endpoint number of CDC DATA IN') +parser.add_argument('--msc_ep_num_out', type=int, default=0, + help='endpoint number of MSC OUT') +parser.add_argument('--msc_ep_num_in', type=int, default=0, + help='endpoint number of MSC IN') +parser.add_argument('--hid_ep_num_out', type=int, default=0, + help='endpoint number of HID OUT') +parser.add_argument('--hid_ep_num_in', type=int, default=0, + help='endpoint number of HID IN') +parser.add_argument('--midi_ep_num_out', type=int, default=0, + help='endpoint number of MIDI OUT') +parser.add_argument('--midi_ep_num_in', type=int, default=0, + help='endpoint number of MIDI IN') +parser.add_argument('--output_c_file', type=argparse.FileType('w'), required=True) +parser.add_argument('--output_h_file', type=argparse.FileType('w'), required=True) + +args = parser.parse_args() + +unknown_devices = list(frozenset(args.devices) - ALL_DEVICES_SET) +if unknown_devices: + raise ValueError("Unknown device(s)", unknown_devices) + +unknown_hid_devices = list(frozenset(args.hid_devices) - ALL_HID_DEVICES_SET) +if unknown_hid_devices: + raise ValueError("Unknown HID devices(s)", unknown_hid_devices) + +if not args.renumber_endpoints: + if 'CDC' in args.devices: + if args.cdc_ep_num_notification == 0: + raise ValueError("CDC notification endpoint number must not be 0") + elif args.cdc_ep_num_data_out == 0: + raise ValueError("CDC data OUT endpoint number must not be 0") + elif args.cdc_ep_num_data_in == 0: + raise ValueError("CDC data IN endpoint number must not be 0") + + if 'MSC' in args.devices: + if args.msc_ep_num_out == 0: + raise ValueError("MSC endpoint OUT number must not be 0") + elif args.msc_ep_num_in == 0: + raise ValueError("MSC endpoint IN number must not be 0") + + if 'HID' in args.devices: + if args.args.hid_ep_num_out == 0: + raise ValueError("HID endpoint OUT number must not be 0") + elif args.hid_ep_num_in == 0: + raise ValueError("HID endpoint IN number must not be 0") + + if 'AUDIO' in args.devices: + if args.args.midi_ep_num_out == 0: + raise ValueError("MIDI endpoint OUT number must not be 0") + elif args.midi_ep_num_in == 0: + raise ValueError("MIDI endpoint IN number must not be 0") + +class StringIndex: + """Assign a monotonically increasing index to each unique string. Start with 0.""" + string_to_index = {} + index_to_variable = {} + strings = [] + + @classmethod + def index(cls, string, *, variable_name = None): + if string in cls.string_to_index: + idx = cls.string_to_index[string] + if not cls.index_to_variable[idx]: + cls.index_to_variable[idx] = variable_name + return idx + else: + idx = len(cls.strings) + cls.string_to_index[string] = idx + cls.strings.append(string) + cls.index_to_variable[idx] = variable_name + return idx + + @classmethod + def strings_in_order(cls): + return cls.strings + + + +# langid must be the 0th string descriptor +LANGID_INDEX = StringIndex.index("\u0409", variable_name="language_id") +assert LANGID_INDEX == 0 +SERIAL_NUMBER_INDEX = StringIndex.index("S" * args.serial_number_length, variable_name="usb_serial_number") + +device = standard.DeviceDescriptor( + description="top", + idVendor=args.vid, + idProduct=args.pid, + iManufacturer=StringIndex.index(args.manufacturer), + iProduct=StringIndex.index(args.product), + iSerialNumber=SERIAL_NUMBER_INDEX) + +# Interface numbers are interface-set local and endpoints are interface local +# until util.join_interfaces renumbers them. + +cdc_union = cdc.Union( + description="CDC comm", + bMasterInterface=0x00, # Adjust this after interfaces are renumbered. + bSlaveInterface_list=[0x01]) # Adjust this after interfaces are renumbered. + +cdc_call_management = cdc.CallManagement( + description="CDC comm", + bmCapabilities=0x01, + bDataInterface=0x01) # Adjust this after interfaces are renumbered. + +cdc_comm_interface = standard.InterfaceDescriptor( + description="CDC comm", + bInterfaceClass=cdc.CDC_CLASS_COMM, # Communications Device Class + bInterfaceSubClass=cdc.CDC_SUBCLASS_ACM, # Abstract control model + bInterfaceProtocol=cdc.CDC_PROTOCOL_NONE, + iInterface=StringIndex.index("{} CDC control".format(args.interface_name)), + subdescriptors=[ + cdc.Header( + description="CDC comm", + bcdCDC=0x0110), + cdc_call_management, + cdc.AbstractControlManagement( + description="CDC comm", + bmCapabilities=0x02), + cdc_union, + standard.EndpointDescriptor( + description="CDC comm in", + bEndpointAddress=args.cdc_ep_num_notification | standard.EndpointDescriptor.DIRECTION_IN, + bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, + wMaxPacketSize=0x0040, + bInterval=0x10) + ]) + +cdc_data_interface = standard.InterfaceDescriptor( + description="CDC data", + bInterfaceClass=cdc.CDC_CLASS_DATA, + iInterface=StringIndex.index("{} CDC data".format(args.interface_name)), + subdescriptors=[ + standard.EndpointDescriptor( + description="CDC data out", + bEndpointAddress=args.cdc_ep_num_data_out | standard.EndpointDescriptor.DIRECTION_OUT, + bmAttributes=standard.EndpointDescriptor.TYPE_BULK), + standard.EndpointDescriptor( + description="CDC data in", + bEndpointAddress=args.cdc_ep_num_data_in | standard.EndpointDescriptor.DIRECTION_IN, + bmAttributes=standard.EndpointDescriptor.TYPE_BULK), + ]) + +cdc_interfaces = [cdc_comm_interface, cdc_data_interface] + +msc_interfaces = [ + standard.InterfaceDescriptor( + description="MSC", + bInterfaceClass=msc.MSC_CLASS, + bInterfaceSubClass=msc.MSC_SUBCLASS_TRANSPARENT, + bInterfaceProtocol=msc.MSC_PROTOCOL_BULK, + iInterface=StringIndex.index("{} Mass Storage".format(args.interface_name)), + subdescriptors=[ + standard.EndpointDescriptor( + description="MSC in", + bEndpointAddress=args.msc_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, + bmAttributes=standard.EndpointDescriptor.TYPE_BULK, + bInterval=0, + wMaxPacketSize=args.msc_max_packet_size), + standard.EndpointDescriptor( + description="MSC out", + bEndpointAddress=(args.msc_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT), + bmAttributes=standard.EndpointDescriptor.TYPE_BULK, + bInterval=0, + wMaxPacketSize=args.msc_max_packet_size) + ] + ) +] + +# When there's only one hid_device, it shouldn't have a report id. +# Otherwise, report ids are assigned sequentially: +# args.hid_devices[0] has report_id 1 +# args.hid_devices[1] has report_id 2 +# etc. + +report_ids = {} + +if len(args.hid_devices) == 1: + name = args.hid_devices[0] + combined_hid_report_descriptor = hid.ReportDescriptor( + description=name, + report_descriptor=bytes(hid_report_descriptors.REPORT_DESCRIPTOR_FUNCTIONS[name](0))) + report_ids[name] = 0 +else: + report_id = 1 + concatenated_descriptors = bytearray() + for name in args.hid_devices: + concatenated_descriptors.extend( + bytes(hid_report_descriptors.REPORT_DESCRIPTOR_FUNCTIONS[name](report_id))) + report_ids[name] = report_id + report_id += 1 + combined_hid_report_descriptor = hid.ReportDescriptor( + description="MULTIDEVICE", + report_descriptor=bytes(concatenated_descriptors)) + +# ASF4 expects keyboard and generic devices to have both in and out endpoints, +# and will fail (possibly silently) if both are not supplied. +hid_endpoint_in_descriptor = standard.EndpointDescriptor( + description="HID in", + bEndpointAddress=args.hid_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, + bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, + bInterval=8) + +hid_endpoint_out_descriptor = standard.EndpointDescriptor( + description="HID out", + bEndpointAddress=args.hid_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT, + bmAttributes=standard.EndpointDescriptor.TYPE_INTERRUPT, + bInterval=8) + +hid_interfaces = [ + standard.InterfaceDescriptor( + description="HID Multiple Devices", + bInterfaceClass=hid.HID_CLASS, + bInterfaceSubClass=hid.HID_SUBCLASS_NOBOOT, + bInterfaceProtocol=hid.HID_PROTOCOL_NONE, + iInterface=StringIndex.index("{} HID".format(args.interface_name)), + subdescriptors=[ + hid.HIDDescriptor( + description="HID", + wDescriptorLength=len(bytes(combined_hid_report_descriptor))), + hid_endpoint_in_descriptor, + hid_endpoint_out_descriptor, + ] + ), + ] + +# Audio! +# In and out here are relative to CircuitPython + +# USB OUT -> midi_in_jack_emb -> midi_out_jack_ext -> CircuitPython +midi_in_jack_emb = midi.InJackDescriptor( + description="MIDI PC -> {}".format(args.interface_name), + bJackType=midi.JACK_TYPE_EMBEDDED, + iJack=StringIndex.index("{} usb_midi.ports[0]".format(args.interface_name))) +midi_out_jack_ext = midi.OutJackDescriptor( + description="MIDI data out to user code.", + bJackType=midi.JACK_TYPE_EXTERNAL, + input_pins=[(midi_in_jack_emb, 1)], + iJack=0) + +# USB IN <- midi_out_jack_emb <- midi_in_jack_ext <- CircuitPython +midi_in_jack_ext = midi.InJackDescriptor( + description="MIDI data in from user code.", + bJackType=midi.JACK_TYPE_EXTERNAL, + iJack=0) +midi_out_jack_emb = midi.OutJackDescriptor( + description="MIDI PC <- {}".format(args.interface_name), + bJackType=midi.JACK_TYPE_EMBEDDED, + input_pins=[(midi_in_jack_ext, 1)], + iJack=StringIndex.index("{} usb_midi.ports[1]".format(args.interface_name))) + + +audio_midi_interface = standard.InterfaceDescriptor( + description="Midi goodness", + bInterfaceClass=audio.AUDIO_CLASS_DEVICE, + bInterfaceSubClass=audio.AUDIO_SUBCLASS_MIDI_STREAMING, + bInterfaceProtocol=audio.AUDIO_PROTOCOL_V1, + iInterface=StringIndex.index("{} MIDI".format(args.interface_name)), + subdescriptors=[ + midi.Header( + jacks_and_elements=[ + midi_in_jack_emb, + midi_in_jack_ext, + midi_out_jack_emb, + midi_out_jack_ext + ], + ), + standard.EndpointDescriptor( + description="MIDI data out to {}".format(args.interface_name), + bEndpointAddress=args.midi_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT, + bmAttributes=standard.EndpointDescriptor.TYPE_BULK), + midi.DataEndpointDescriptor(baAssocJack=[midi_in_jack_emb]), + standard.EndpointDescriptor( + description="MIDI data in from {}".format(args.interface_name), + bEndpointAddress=args.midi_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, + bmAttributes=standard.EndpointDescriptor.TYPE_BULK, + bInterval = 0x0), + midi.DataEndpointDescriptor(baAssocJack=[midi_out_jack_emb]), + ]) + +cs_ac_interface = audio10.AudioControlInterface( + description="Empty audio control", + audio_streaming_interfaces = [], + midi_streaming_interfaces = [ + audio_midi_interface + ] + ) + +audio_control_interface = standard.InterfaceDescriptor( + description="All the audio", + bInterfaceClass=audio.AUDIO_CLASS_DEVICE, + bInterfaceSubClass=audio.AUDIO_SUBCLASS_CONTROL, + bInterfaceProtocol=audio.AUDIO_PROTOCOL_V1, + iInterface=StringIndex.index("{} Audio".format(args.interface_name)), + subdescriptors=[ + cs_ac_interface, + ]) + +# Audio streaming interfaces must occur before MIDI ones. +audio_interfaces = [audio_control_interface] + cs_ac_interface.audio_streaming_interfaces + cs_ac_interface.midi_streaming_interfaces + +interfaces_to_join = [] + +if 'CDC' in args.devices: + interfaces_to_join.append(cdc_interfaces) + +if 'MSC' in args.devices: + interfaces_to_join.append(msc_interfaces) + +if 'HID' in args.devices: + interfaces_to_join.append(hid_interfaces) + +if 'AUDIO' in args.devices: + interfaces_to_join.append(audio_interfaces) + +# util.join_interfaces() will renumber the endpoints to make them unique across descriptors, +# and renumber the interfaces in order. But we still need to fix up certain +# interface cross-references. +interfaces = util.join_interfaces(interfaces_to_join, renumber_endpoints=args.renumber_endpoints) + +# Now adjust the CDC interface cross-references. + +cdc_union.bMasterInterface = cdc_comm_interface.bInterfaceNumber +cdc_union.bSlaveInterface_list = [cdc_data_interface.bInterfaceNumber] + +cdc_call_management.bDataInterface = cdc_data_interface.bInterfaceNumber + +cdc_iad = standard.InterfaceAssociationDescriptor( + description="CDC IAD", + bFirstInterface=cdc_comm_interface.bInterfaceNumber, + bInterfaceCount=len(cdc_interfaces), + bFunctionClass=cdc.CDC_CLASS_COMM, # Communications Device Class + bFunctionSubClass=cdc.CDC_SUBCLASS_ACM, # Abstract control model + bFunctionProtocol=cdc.CDC_PROTOCOL_NONE) + +descriptor_list = [] + +if 'CDC' in args.devices: + # Put the CDC IAD just before the CDC interfaces. + # There appears to be a bug in the Windows composite USB driver that requests the + # HID report descriptor with the wrong interface number if the HID interface is not given + # first. However, it still fetches the descriptor anyway. We could reorder the interfaces but + # the Windows 7 Adafruit_usbser.inf file thinks CDC is at Interface 0, so we'll leave it + # there for backwards compatibility. + descriptor_list.append(cdc_iad) + descriptor_list.extend(cdc_interfaces) + +if 'MSC' in args.devices: + descriptor_list.extend(msc_interfaces) + +if 'HID' in args.devices: + descriptor_list.extend(hid_interfaces) + +if 'AUDIO' in args.devices: + # Only add the control interface because other audio interfaces are managed by it to ensure the + # correct ordering. + descriptor_list.append(audio_control_interface) + +# Finally, build the composite descriptor. + +configuration = standard.ConfigurationDescriptor( + description="Composite configuration", + wTotalLength=(standard.ConfigurationDescriptor.bLength + + sum([len(bytes(x)) for x in descriptor_list])), + bNumInterfaces=len(interfaces)) +descriptor_list.insert(0, configuration) + +string_descriptors = [standard.StringDescriptor(string) for string in StringIndex.strings_in_order()] +serial_number_descriptor = string_descriptors[SERIAL_NUMBER_INDEX] + +c_file = args.output_c_file +h_file = args.output_h_file + + +c_file.write("""\ +#include + +#include "py/objtuple.h" +#include "shared-bindings/usb_hid/Device.h" +#include "{H_FILE_NAME}" + +""".format(H_FILE_NAME=h_file.name)) + +c_file.write("""\ +// {DESCRIPTION} : {CLASS} +""".format(DESCRIPTION=device.description, + CLASS=device.__class__)) + +c_file.write("""\ +const uint8_t usb_desc_dev[] = { +""") +for b in bytes(device): + c_file.write("0x{:02x}, ".format(b)) + +c_file.write("""\ +}; +""") + +c_file.write("""\ +const uint8_t usb_desc_cfg[] = { +""") + +# Write out all the regular descriptors as one long array (that's how ASF4 does it). +descriptor_length = 0 +for descriptor in descriptor_list: + c_file.write("""\ +// {DESCRIPTION} : {CLASS} +""".format(DESCRIPTION=descriptor.description, + CLASS=descriptor.__class__)) + + b = bytes(descriptor) + notes = descriptor.notes() + i = 0 + + # This prints each subdescriptor on a separate line. + n = 0 + while i < len(b): + length = b[i] + for j in range(length): + c_file.write("0x{:02x}, ".format(b[i + j])) + c_file.write("// " + notes[n]) + n += 1 + c_file.write("\n") + i += length + descriptor_length += len(b) + +c_file.write("""\ +}; +""") + +pointers_to_strings = [] + +for idx, descriptor in enumerate(string_descriptors): + c_file.write("""\ +// {DESCRIPTION} : {CLASS} +""".format(DESCRIPTION=descriptor.description, + CLASS=descriptor.__class__)) + + b = bytes(descriptor) + notes = descriptor.notes() + i = 0 + + # This prints each subdescriptor on a separate line. + variable_name = StringIndex.index_to_variable[idx] + if not variable_name: + variable_name = "string_descriptor{}".format(idx) + + const = "const " + if variable_name == "usb_serial_number": + const = "" + c_file.write("""\ +{const}uint16_t {NAME}[] = {{ +""".format(const=const, NAME=variable_name)) + pointers_to_strings.append("{name}".format(name=variable_name)) + n = 0 + while i < len(b): + length = b[i] + for j in range(length // 2): + c_file.write("0x{:04x}, ".format(b[i + 2*j + 1] << 8 | b[i + 2*j])) + n += 1 + c_file.write("\n") + i += length + c_file.write("""\ +}; +""") + +c_file.write("""\ +// array of pointer to string descriptors +uint16_t const * const string_desc_arr [] = +{ +""") +c_file.write(""",\ + +""".join(pointers_to_strings)) + +c_file.write(""" +}; +""") + +c_file.write("\n"); + +hid_descriptor_length = len(bytes(combined_hid_report_descriptor)) + +# Now we values we need for the .h file. +h_file.write("""\ +#ifndef MICROPY_INCLUDED_AUTOGEN_USB_DESCRIPTOR_H +#define MICROPY_INCLUDED_AUTOGEN_USB_DESCRIPTOR_H + +#include + +const uint8_t usb_desc_dev[{device_length}]; +// Make sure the control buffer is big enough to fit the descriptor. +#define CFG_TUD_ENUM_BUFFER_SIZE {max_configuration_length} +const uint8_t usb_desc_cfg[{configuration_length}]; +uint16_t usb_serial_number[{serial_number_length}]; +uint16_t const * const string_desc_arr [{string_descriptor_length}]; + +const uint8_t hid_report_descriptor[{hid_report_descriptor_length}]; + +#define USB_HID_NUM_DEVICES {hid_num_devices} + +// Vendor name included in Inquiry response, max 8 bytes +#define CFG_TUD_MSC_VENDOR "{msc_vendor}" + +// Product name included in Inquiry response, max 16 bytes +#define CFG_TUD_MSC_PRODUCT "{msc_product}" + +""" +.format(serial_number_length=len(bytes(serial_number_descriptor)) // 2, + device_length=len(bytes(device)), + configuration_length=descriptor_length, + max_configuration_length=max(hid_descriptor_length, descriptor_length), + string_descriptor_length=len(pointers_to_strings), + hid_report_descriptor_length=len(bytes(combined_hid_report_descriptor)), + hid_num_devices=len(args.hid_devices), + msc_vendor=args.manufacturer[:8], + msc_product=args.product[:16])) + +# Write out the report descriptor and info +c_file.write("""\ +const uint8_t hid_report_descriptor[{HID_DESCRIPTOR_LENGTH}] = {{ +""".format(HID_DESCRIPTOR_LENGTH=hid_descriptor_length)) + +for b in bytes(combined_hid_report_descriptor): + c_file.write("0x{:02x}, ".format(b)) +c_file.write("""\ +}; + +""") + +# Write out USB HID report buffer definitions. +for name in args.hid_devices: + c_file.write("""\ +static uint8_t {name}_report_buffer[{report_length}]; +""".format(name=name.lower(), report_length=hid_report_descriptors.HID_DEVICE_DATA[name].report_length)) + +# Write out table of device objects. +c_file.write(""" +usb_hid_device_obj_t usb_hid_devices[] = { +"""); +for name in args.hid_devices: + device_data = hid_report_descriptors.HID_DEVICE_DATA[name] + c_file.write("""\ + {{ + .base = {{ .type = &usb_hid_device_type }}, + .report_buffer = {name}_report_buffer, + .report_id = {report_id}, + .report_length = {report_length}, + .usage_page = {usage_page:#04x}, + .usage = {usage:#04x}, + }}, +""".format(name=name.lower(), report_id=report_ids[name], + report_length=device_data.report_length, + usage_page=device_data.usage_page, + usage=device_data.usage)) +c_file.write("""\ +}; +""") + +# Write out tuple of device objects. +c_file.write(""" +mp_obj_tuple_t common_hal_usb_hid_devices = {{ + .base = {{ + .type = &mp_type_tuple, + }}, + .len = {num_devices}, + .items = {{ +""".format(num_devices=len(args.hid_devices))) +for idx in range(len(args.hid_devices)): + c_file.write("""\ + (mp_obj_t) &usb_hid_devices[{idx}], +""".format(idx=idx)) +c_file.write("""\ + }, +}; +""") + +h_file.write("""\ +#endif // MICROPY_INCLUDED_AUTOGEN_USB_DESCRIPTOR_H +""") diff --git a/tools/git-checkout-latest-tag.sh b/tools/git-checkout-latest-tag.sh new file mode 100755 index 0000000000000..f6242a946de3d --- /dev/null +++ b/tools/git-checkout-latest-tag.sh @@ -0,0 +1,3 @@ +#!/bin/bash +git fetch --tags +git checkout $(git describe --tags `git rev-list --tags --max-count=1`) diff --git a/tools/hid_report_descriptors.py b/tools/hid_report_descriptors.py new file mode 100644 index 0000000000000..07ed26744f731 --- /dev/null +++ b/tools/hid_report_descriptors.py @@ -0,0 +1,312 @@ +# The MIT License (MIT) +# +# Copyright (c) 2018 Dan Halbert for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +import struct + +""" +HID specific descriptors +======================== + +* Author(s): Dan Halbert +""" + +from collections import namedtuple + +from adafruit_usb_descriptor import hid + +# Information about each kind of device +# report_length does not include report ID in first byte, if present when sent. +DeviceData = namedtuple('DeviceData', ('report_length', 'usage_page', 'usage')) +HID_DEVICE_DATA = { + "KEYBOARD" : DeviceData(report_length=8, usage_page=0x01, usage=0x06), # Generic Desktop, Keyboard + "MOUSE" : DeviceData(report_length=4, usage_page=0x01, usage=0x02), # Generic Desktop, Mouse + "CONSUMER" : DeviceData(report_length=2, usage_page=0x0C, usage=0x01), # Consumer, Consumer Control + "SYS_CONTROL" : DeviceData(report_length=1, usage_page=0x01, usage=0x80), # Generic Desktop, Sys Control + "GAMEPAD" : DeviceData(report_length=6, usage_page=0x01, usage=0x05), # Generic Desktop, Game Pad + "DIGITIZER" : DeviceData(report_length=5, usage_page=0x0D, usage=0x02), # Digitizers, Pen + "XAC_COMPATIBLE_GAMEPAD" : DeviceData(report_length=3, usage_page=0x01, usage=0x05), # Generic Desktop, Game Pad + "RAW" : DeviceData(report_length=64, usage_page=0xFFAF, usage=0xAF), # Vendor 0xFFAF "Adafruit", 0xAF + } + +def keyboard_hid_descriptor(report_id): + data = HID_DEVICE_DATA["KEYBOARD"] + return hid.ReportDescriptor( + description="KEYBOARD", + report_descriptor=bytes( + # Regular keyboard + (0x05, data.usage_page, # Usage Page (Generic Desktop) + 0x09, data.usage, # Usage (Keyboard) + 0xA1, 0x01, # Collection (Application) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x05, 0x07, # Usage Page (Keyboard) + 0x19, 224, # Usage Minimum (224) + 0x29, 231, # Usage Maximum (231) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0x01, # Logical Maximum (1) + 0x75, 0x01, # Report Size (1) + 0x95, 0x08, # Report Count (8) + 0x81, 0x02, # Input (Data, Variable, Absolute) + 0x81, 0x01, # Input (Constant) + 0x19, 0x00, # Usage Minimum (0) + 0x29, 0xDD, # Usage Maximum (221) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0xDD, # Logical Maximum (221) + 0x75, 0x08, # Report Size (8) + 0x95, 0x06, # Report Count (6) + 0x81, 0x00, # Input (Data, Array) + 0x05, 0x08, # Usage Page (LED) + 0x19, 0x01, # Usage Minimum (1) + 0x29, 0x05, # Usage Maximum (5) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0x01, # Logical Maximum (1) + 0x75, 0x01, # Report Size (1) + 0x95, 0x05, # Report Count (5) + 0x91, 0x02, # Output (Data, Variable, Absolute) + 0x95, 0x03, # Report Count (3) + 0x91, 0x01, # Output (Constant) + 0xC0, # End Collection + ))) + +def mouse_hid_descriptor(report_id): + data = HID_DEVICE_DATA["MOUSE"] + return hid.ReportDescriptor( + description="MOUSE", + report_descriptor=bytes( + # Regular mouse + (0x05, data.usage_page, # Usage Page (Generic Desktop) + 0x09, data.usage, # Usage (Mouse) + 0xA1, 0x01, # Collection (Application) + 0x09, 0x01, # Usage (Pointer) + 0xA1, 0x00, # Collection (Physical) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x05, 0x09, # Usage Page (Button) + 0x19, 0x01, # Usage Minimum (0x01) + 0x29, 0x05, # Usage Maximum (0x05) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0x01, # Logical Maximum (1) + 0x95, 0x05, # Report Count (5) + 0x75, 0x01, # Report Size (1) + 0x81, 0x02, # Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0x95, 0x01, # Report Count (1) + 0x75, 0x03, # Report Size (3) + 0x81, 0x01, # Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0x05, 0x01, # Usage Page (Generic Desktop Ctrls) + 0x09, 0x30, # Usage (X) + 0x09, 0x31, # Usage (Y) + 0x15, 0x81, # Logical Minimum (-127) + 0x25, 0x7F, # Logical Maximum (127) + 0x75, 0x08, # Report Size (8) + 0x95, 0x02, # Report Count (2) + 0x81, 0x06, # Input (Data,Var,Rel,No Wrap,Linear,Preferred State,No Null Position) + 0x09, 0x38, # Usage (Wheel) + 0x15, 0x81, # Logical Minimum (-127) + 0x25, 0x7F, # Logical Maximum (127) + 0x75, 0x08, # Report Size (8) + 0x95, 0x01, # Report Count (1) + 0x81, 0x06, # Input (Data,Var,Rel,No Wrap,Linear,Preferred State,No Null Position) + 0xC0, # End Collection + 0xC0, # End Collection + ))) + +def consumer_hid_descriptor(report_id): + data = HID_DEVICE_DATA["CONSUMER"] + return hid.ReportDescriptor( + description="CONSUMER", + report_descriptor=bytes( + # Consumer ("multimedia") keys + (0x05, data.usage_page, # Usage Page (Consumer) + 0x09, data.usage, # Usage (Consumer Control) + 0xA1, 0x01, # Collection (Application) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x75, 0x10, # Report Size (16) + 0x95, 0x01, # Report Count (1) + 0x15, 0x01, # Logical Minimum (1) + 0x26, 0x8C, 0x02, # Logical Maximum (652) + 0x19, 0x01, # Usage Minimum (Consumer Control) + 0x2A, 0x8C, 0x02, # Usage Maximum (AC Send) + 0x81, 0x00, # Input (Data,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0xC0, # End Collection + ))) + +def sys_control_hid_descriptor(report_id): + data = HID_DEVICE_DATA["SYS_CONTROL"] + return hid.ReportDescriptor( + description="SYS_CONTROL", + report_descriptor=bytes( + # Power controls + (0x05, data.usage_page, # Usage Page (Generic Desktop Ctrls) + 0x09, data.usage, # Usage (Sys Control) + 0xA1, 0x01, # Collection (Application) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x75, 0x02, # Report Size (2) + 0x95, 0x01, # Report Count (1) + 0x15, 0x01, # Logical Minimum (1) + 0x25, 0x03, # Logical Maximum (3) + 0x09, 0x82, # Usage (Sys Sleep) + 0x09, 0x81, # Usage (Sys Power Down) + 0x09, 0x83, # Usage (Sys Wake Up) + 0x81, 0x60, # Input (Data,Array,Abs,No Wrap,Linear,No Preferred State,Null State) + 0x75, 0x06, # Report Size (6) + 0x81, 0x03, # Input (Const,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0xC0, # End Collection + ))) + +def gamepad_hid_descriptor(report_id): + data = HID_DEVICE_DATA["GAMEPAD"] + return hid.ReportDescriptor( + description="GAMEPAD", + report_descriptor=bytes( + # Gamepad with 16 buttons and two joysticks + (0x05, data.usage_page, # Usage Page (Generic Desktop Ctrls) + 0x09, data.usage, # Usage (Game Pad) + 0xA1, 0x01, # Collection (Application) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x05, 0x09, # Usage Page (Button) + 0x19, 0x01, # Usage Minimum (Button 1) + 0x29, 0x10, # Usage Maximum (Button 16) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0x01, # Logical Maximum (1) + 0x75, 0x01, # Report Size (1) + 0x95, 0x10, # Report Count (16) + 0x81, 0x02, # Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0x05, 0x01, # Usage Page (Generic Desktop Ctrls) + 0x15, 0x81, # Logical Minimum (-127) + 0x25, 0x7F, # Logical Maximum (127) + 0x09, 0x30, # Usage (X) + 0x09, 0x31, # Usage (Y) + 0x09, 0x32, # Usage (Z) + 0x09, 0x35, # Usage (Rz) + 0x75, 0x08, # Report Size (8) + 0x95, 0x04, # Report Count (4) + 0x81, 0x02, # Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0xC0, # End Collection + ))) + +def digitizer_hid_descriptor(report_id): + data = HID_DEVICE_DATA["DIGITIZER"] + return hid.ReportDescriptor( + description="DIGITIZER", + report_descriptor=bytes( + # Digitizer (used as an absolute pointer) + (0x05, data.usage_page, # Usage Page (Digitizers) + 0x09, data.usage, # Usage (Pen) + 0xA1, 0x01, # Collection (Application) + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x09, 0x01, # Usage (Stylus) + 0xA1, 0x00, # Collection (Physical) + 0x09, 0x32, # Usage (In-Range) + 0x09, 0x42, # Usage (Tip Switch) + 0x09, 0x44, # Usage (Barrel Switch) + 0x09, 0x45, # Usage (Eraser Switch) + 0x15, 0x00, # Logical Minimum (0) + 0x25, 0x01, # Logical Maximum (1) + 0x75, 0x01, # Report Size (1) + 0x95, 0x04, # Report Count (4) + 0x81, 0x02, # Input (Data,Var,Abs) + 0x75, 0x04, # Report Size (4) -- Filler + 0x95, 0x01, # Report Count (1) -- Filler + 0x81, 0x01, # Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) + 0x05, 0x01, # Usage Page (Generic Desktop Ctrls) + 0x15, 0x00, # Logical Minimum (0) + 0x26, 0xff, 0x7f, # Logical Maximum (32767) + 0x09, 0x30, # Usage (X) + 0x09, 0x31, # Usage (Y) + 0x75, 0x10, # Report Size (16) + 0x95, 0x02, # Report Count (2) + 0x81, 0x02, # Input (Data,Var,Abs) + 0xC0, # End Collection + 0xC0, # End Collection + ))) + +def xac_compatible_gamepad_hid_descriptor(report_id): + data = HID_DEVICE_DATA["XAC_COMPATIBLE_GAMEPAD"] + return hid.ReportDescriptor( + description="XAC", + report_descriptor=bytes( + # This descriptor mimics the simple joystick from PDP that the XBox likes + (0x05, data.usage_page, # Usage Page (Desktop), + 0x09, data.usage, # Usage (Gamepad), + 0xA1, 0x01, # Collection (Application), + ) + + ((0x85, report_id) if report_id != 0 else ()) + + (0x15, 0x00, # Logical Minimum (0), + 0x25, 0x01, # Logical Maximum (1), + 0x35, 0x00, # Physical Minimum (0), + 0x45, 0x01, # Physical Maximum (1), + 0x75, 0x01, # Report Size (1), + 0x95, 0x08, # Report Count (8), + 0x05, 0x09, # Usage Page (Button), + 0x19, 0x01, # Usage Minimum (01h), + 0x29, 0x08, # Usage Maximum (08h), + 0x81, 0x02, # Input (Variable), + 0x05, 0x01, # Usage Page (Desktop), + 0x26, 0xFF, 0x00, # Logical Maximum (255), + 0x46, 0xFF, 0x00, # Physical Maximum (255), + 0x09, 0x30, # Usage (X), + 0x09, 0x31, # Usage (Y), + 0x75, 0x08, # Report Size (8), + 0x95, 0x02, # Report Count (2), + 0x81, 0x02, # Input (Variable), + 0xC0 # End Collection + ))) + +def raw_hid_descriptor(report_id): + if report_id != 0: + raise ValueError("raw hid must not have a report id") + data = HID_DEVICE_DATA["RAW"] + return hid.ReportDescriptor( + description="RAW", + report_descriptor=bytes( + # Provide vendor-defined + # This is a two-byte page value. + (0x06, data.usage_page & 0xff, (data.usage_page >> 8) & 0xff, # Usage Page (Vendor 0xFFAF "Adafruit"), + 0x09, data.usage, # Usage (AF), + 0xA1, 0x01, # Collection (Application), + 0x75, 0x08, # Report Size (8), + 0x15, 0x00, # Logical Minimum (0), + 0x26, 0xFF, 0x00, # Logical Maximum (255), + 0x95, 0x08, # Report Count (8), + 0x09, 0x01, # Usage(xxx) + 0x81, 0x02, # Input (Variable) + 0x95, 0x08, # Report Count (8), + 0x09, 0x02, # Usage(xxx) + 0x91, 0x02, # Input (Variable) + 0xC0 # End Collection + ))) + +# Function to call for each kind of HID descriptor. +REPORT_DESCRIPTOR_FUNCTIONS = { + "KEYBOARD" : keyboard_hid_descriptor, + "MOUSE" : mouse_hid_descriptor, + "CONSUMER" : consumer_hid_descriptor, + "SYS_CONTROL" : sys_control_hid_descriptor, + "GAMEPAD" : gamepad_hid_descriptor, + "DIGITIZER" : digitizer_hid_descriptor, + "XAC_COMPATIBLE_GAMEPAD" : xac_compatible_gamepad_hid_descriptor, + "RAW" : raw_hid_descriptor, +} diff --git a/tools/huffman b/tools/huffman new file mode 160000 index 0000000000000..27b1bba76198a --- /dev/null +++ b/tools/huffman @@ -0,0 +1 @@ +Subproject commit 27b1bba76198a0b343f694a6d680b5293d1c56aa diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py index ac7b2c1ccf0c4..5ce24061bc8de 100755 --- a/tools/mpy-tool.py +++ b/tools/mpy-tool.py @@ -78,6 +78,18 @@ class Config: MP_BC_LOAD_ATTR = 0x1e MP_BC_STORE_ATTR = 0x26 +# load opcode names +opcode_names = {} +with open("../../py/bc0.h") as f: + for line in f.readlines(): + if line.startswith("#define"): + s = line.split(maxsplit=3) + if len(s) < 3: + continue + _, name, value = s[:3] + opcode = int(value.strip("()"), 0) + opcode_names[opcode] = name + def make_opcode_format(): def OC4(a, b, c, d): return a | (b << 2) | (c << 4) | (d << 6) @@ -252,50 +264,70 @@ def freeze(self, parent_name): i += 1 RawCode.escaped_names.add(self.escaped_name) + sizes = {"bytecode": 0, "strings": 0, "raw_code_overhead": 0, "const_table_overhead": 0, "string_overhead": 0, "number_overhead": 0} # emit children first for rc in self.raw_codes: - rc.freeze(self.escaped_name + '_') + subsize = rc.freeze(self.escaped_name + '_') + for k in sizes: + sizes[k] += subsize[k] + # generate bytecode data print() print('// frozen bytecode for file %s, scope %s%s' % (self.source_file.str, parent_name, self.simple_name.str)) + print("// bytecode size", len(self.bytecode)) print('STATIC ', end='') if not config.MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE: print('const ', end='') print('byte bytecode_data_%s[%u] = {' % (self.escaped_name, len(self.bytecode))) + sizes["bytecode"] += len(self.bytecode) print(' ', end='') for i in range(self.ip2): print(' 0x%02x,' % self.bytecode[i], end='') print() + print(" // simple name") print(' ', self.simple_name.qstr_id, '& 0xff,', self.simple_name.qstr_id, '>> 8,') + print(" // source file") print(' ', self.source_file.qstr_id, '& 0xff,', self.source_file.qstr_id, '>> 8,') + print(" // code info") print(' ', end='') for i in range(self.ip2 + 4, self.ip): print(' 0x%02x,' % self.bytecode[i], end='') print() + print(" // bytecode") ip = self.ip while ip < len(self.bytecode): f, sz = mp_opcode_format(self.bytecode, ip) + opcode = self.bytecode[ip] + if opcode in opcode_names: + opcode = opcode_names[opcode] + else: + opcode = '0x%02x' % opcode if f == 1: qst = self._unpack_qstr(ip + 1).qstr_id - print(' ', '0x%02x,' % self.bytecode[ip], qst, '& 0xff,', qst, '>> 8,') + print(' {}, {} & 0xff, {} >> 8,'.format(opcode, qst, qst)) else: - print(' ', ''.join('0x%02x, ' % self.bytecode[ip + i] for i in range(sz))) + print(' {},{}'.format(opcode, ''.join(' 0x%02x,' % self.bytecode[ip + i] for i in range(1, sz)))) ip += sz print('};') # generate constant objects for i, obj in enumerate(self.objs): obj_name = 'const_obj_%s_%u' % (self.escaped_name, i) - if is_str_type(obj) or is_bytes_type(obj): + if obj is Ellipsis: + print('#define %s mp_const_ellipsis_obj' % obj_name) + elif is_str_type(obj) or is_bytes_type(obj): if is_str_type(obj): obj = bytes_cons(obj, 'utf8') obj_type = 'mp_type_str' else: obj_type = 'mp_type_bytes' - print('STATIC const mp_obj_str_t %s = {{&%s}, %u, %u, (const byte*)"%s"};' + print('STATIC const mp_obj_str_t %s = {{&%s}, %u, %u, (const byte*)"%s"}; // %s' % (obj_name, obj_type, qstrutil.compute_hash(obj, config.MICROPY_QSTR_BYTES_IN_HASH), - len(obj), ''.join(('\\x%02x' % b) for b in obj))) + len(obj), ''.join(('\\x%02x' % b) for b in obj), obj)) + sizes["strings"] += len(obj) + sizes["string_overhead"] += 16 + elif is_int_type(obj): if config.MICROPY_LONGINT_IMPL == config.MICROPY_LONGINT_IMPL_NONE: # TODO check if we can actually fit this long-int into a small-int @@ -319,16 +351,18 @@ def freeze(self, parent_name): print('STATIC const mp_obj_int_t %s = {{&mp_type_int}, ' '{.neg=%u, .fixed_dig=1, .alloc=%u, .len=%u, .dig=(uint%u_t[]){%s}}};' % (obj_name, neg, ndigs, ndigs, bits_per_dig, digs)) + sizes["number_overhead"] += 16 elif type(obj) is float: print('#if MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_A || MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_B') print('STATIC const mp_obj_float_t %s = {{&mp_type_float}, %.16g};' % (obj_name, obj)) print('#endif') + sizes["number_overhead"] += 8 elif type(obj) is complex: print('STATIC const mp_obj_complex_t %s = {{&mp_type_complex}, %.16g, %.16g};' % (obj_name, obj.real, obj.imag)) + sizes["number_overhead"] += 12 else: - # TODO raise FreezeError(self, 'freezing of object %r is not implemented' % (obj,)) # generate constant table, if it has any entries @@ -337,8 +371,10 @@ def freeze(self, parent_name): print('STATIC const mp_rom_obj_t const_table_data_%s[%u] = {' % (self.escaped_name, const_table_len)) for qst in self.qstrs: + sizes["const_table_overhead"] += 4 print(' MP_ROM_QSTR(%s),' % global_qstrs[qst].qstr_id) for i in range(len(self.objs)): + sizes["const_table_overhead"] += 4 if type(self.objs[i]) is float: print('#if MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_A || MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_B') print(' MP_ROM_PTR(&const_obj_%s_%u),' % (self.escaped_name, i)) @@ -352,6 +388,7 @@ def freeze(self, parent_name): else: print(' MP_ROM_PTR(&const_obj_%s_%u),' % (self.escaped_name, i)) for rc in self.raw_codes: + sizes["const_table_overhead"] += 4 print(' MP_ROM_PTR(&raw_code_%s),' % rc.escaped_name) print('};') @@ -375,6 +412,9 @@ def freeze(self, parent_name): print(' #endif') print(' },') print('};') + sizes["raw_code_overhead"] += 16 + + return sizes def read_uint(f): i = 0 @@ -466,6 +506,7 @@ def freeze_mpy(base_qstrs, raw_codes): new[q.qstr_esc] = (len(new), q.qstr_esc, q.str) new = sorted(new.values(), key=lambda x: x[0]) + print('#include "py/bc0.h"') print('#include "py/mpconfig.h"') print('#include "py/objint.h"') print('#include "py/objstr.h"') @@ -522,27 +563,45 @@ def freeze_mpy(base_qstrs, raw_codes): print(' %u, // allocated entries' % len(new)) print(' %u, // used entries' % len(new)) print(' {') + qstr_size = {"metadata": 0, "data": 0} for _, _, qstr in new: + qstr_size["metadata"] += config.MICROPY_QSTR_BYTES_IN_LEN + config.MICROPY_QSTR_BYTES_IN_HASH + qstr_size["data"] += len(qstr) print(' %s,' % qstrutil.make_bytes(config.MICROPY_QSTR_BYTES_IN_LEN, config.MICROPY_QSTR_BYTES_IN_HASH, qstr)) print(' },') print('};') + sizes = {} for rc in raw_codes: - rc.freeze(rc.source_file.str.replace('/', '_')[:-3] + '_') + sizes[rc.source_file.str] = rc.freeze(rc.source_file.str.replace('/', '_')[:-3] + '_') print() print('const char mp_frozen_mpy_names[] = {') + qstr_size["filenames"] = 1 for rc in raw_codes: module_name = rc.source_file.str print('"%s\\0"' % module_name) + qstr_size["filenames"] += len(module_name) + 1 print('"\\0"};') print('const mp_raw_code_t *const mp_frozen_mpy_content[] = {') for rc in raw_codes: print(' &raw_code_%s,' % rc.escaped_name) + size = sizes[rc.source_file.str] + print(' // Total size:', sum(size.values())) + for k in size: + print(" // {} {}".format(k, size[k])) print('};') + print() + print('// Total size:', sum([sum(x.values()) for x in sizes.values()]) + sum(qstr_size.values())) + for k in size: + total = sum([x[k] for x in sizes.values()]) + print("// {} {}".format(k, total)) + for k in qstr_size: + print("// qstr {} {}".format(k, qstr_size[k])) + def main(): import argparse cmd_parser = argparse.ArgumentParser(description='A tool to work with MicroPython .mpy files.') @@ -570,7 +629,7 @@ def main(): # set config values for qstrs, and get the existing base set of qstrs if args.qstr_header: - qcfgs, base_qstrs = qstrutil.parse_input_headers([args.qstr_header]) + qcfgs, base_qstrs, _ = qstrutil.parse_input_headers([args.qstr_header]) config.MICROPY_QSTR_BYTES_IN_LEN = int(qcfgs['BYTES_IN_LEN']) config.MICROPY_QSTR_BYTES_IN_HASH = int(qcfgs['BYTES_IN_HASH']) else: diff --git a/tools/output_gc_until_repl.txt b/tools/output_gc_until_repl.txt index 0e99626353e5a..1c124de801ee9 100644 --- a/tools/output_gc_until_repl.txt +++ b/tools/output_gc_until_repl.txt @@ -10,16 +10,23 @@ set logging on set remote hardware-breakpoint-limit 4 # gc log -break gc.c:103 +break gc.c:106 commands -backtrace p/x start_block p/x length -append binary memory ram.bin &_srelocate &_estack +p/x ticks_ms +# backtrace output redirect is currently broken in gdb so we use up instead. +# https://sourceware.org/bugzilla/show_bug.cgi?id=23439 +# backtrace +up +up +up +up +# append binary memory ram.bin &_srelocate &_estack continue end -break main.c:164 +break main.c:251 continue diff --git a/tools/preprocess_frozen_modules.py b/tools/preprocess_frozen_modules.py index d157deeee9fc2..7ae20c4d61ad9 100755 --- a/tools/preprocess_frozen_modules.py +++ b/tools/preprocess_frozen_modules.py @@ -32,8 +32,10 @@ def version_string(path=None, *, valid_semver=False): def copy_and_process(in_dir, out_dir): for root, subdirs, files in os.walk(in_dir): - # Skip library examples directories. - if Path(root).name in ['examples', 'docs']: + # Skip library examples directory and subfolders. + relative_path_parts = Path(root).relative_to(in_dir).parts + if relative_path_parts and relative_path_parts[0] in ['examples', 'docs', 'tests']: + del subdirs[:] continue for file in files: diff --git a/tools/print_status.py b/tools/print_status.py new file mode 100755 index 0000000000000..ed563fd68bd9f --- /dev/null +++ b/tools/print_status.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python3 + +import sys +if len(sys.argv) != 2: + print("""\ +Usage: print_status.py STATUS_FILENAME + STATUS_FILENAME contains one line with an integer status.""" + ) + sys.exit(1) +with open(sys.argv[1], 'r') as status_in: + status = int(status_in.readline()) + +print('{} with status {}'.format( + "\033[32msucceeded\033[0m" if status == 0 else "\033[31mfailed\033[0m", + status)) diff --git a/tools/pydfu.py b/tools/pydfu.py index 8c0220de8733e..a7adda37cc027 100755 --- a/tools/pydfu.py +++ b/tools/pydfu.py @@ -5,7 +5,7 @@ # details. """This module implements enough functionality to program the STM32F4xx over -DFU, without requiringdfu-util. +DFU, without requiring dfu-util. See app note AN3156 for a description of the DFU protocol. See document UM0391 for a dscription of the DFuse file. @@ -81,6 +81,7 @@ def init(): if len(devices) > 1: raise ValueError("Multiple DFU devices found") __dev = devices[0] + __dev.set_configuration() # Claim DFU interface usb.util.claim_interface(__dev, __DFU_INTERFACE) @@ -167,7 +168,7 @@ def write_memory(addr, buf, progress=None, progress_addr=0, progress_size=0): print ("Addr 0x%x %dKBs/%dKBs..." % (xfer_base + xfer_bytes, xfer_bytes // 1024, xfer_total // 1024)) - if progress and xfer_count % 256 == 0: + if progress and xfer_count % 2 == 0: progress(progress_addr, xfer_base + xfer_bytes - progress_addr, progress_size) @@ -175,7 +176,9 @@ def write_memory(addr, buf, progress=None, progress_addr=0, progress_size=0): set_address(xfer_base+xfer_bytes) # Send DNLOAD with fw data - chunk = min(64, xfer_total-xfer_bytes) + # the "2048" is the DFU transfer size supported by the ST DFU bootloader + # TODO: this number should be extracted from the USB config descriptor + chunk = min(2048, xfer_total-xfer_bytes) __dev.ctrl_transfer(0x21, __DFU_DNLOAD, 2, __DFU_INTERFACE, buf[xfer_bytes:xfer_bytes + chunk], __TIMEOUT) @@ -391,24 +394,25 @@ def get_memory_layout(device): intf = cfg[(0, 0)] mem_layout_str = get_string(device, intf.iInterface) mem_layout = mem_layout_str.split('/') - addr = int(mem_layout[1], 0) - segments = mem_layout[2].split(',') - seg_re = re.compile(r'(\d+)\*(\d+)(.)(.)') result = [] - for segment in segments: - seg_match = seg_re.match(segment) - num_pages = int(seg_match.groups()[0], 10) - page_size = int(seg_match.groups()[1], 10) - multiplier = seg_match.groups()[2] - if multiplier == 'K': - page_size *= 1024 - if multiplier == 'M': - page_size *= 1024 * 1024 - size = num_pages * page_size - last_addr = addr + size - 1 - result.append(named((addr, last_addr, size, num_pages, page_size), - "addr last_addr size num_pages page_size")) - addr += size + for mem_layout_index in range(1, len(mem_layout), 2): + addr = int(mem_layout[mem_layout_index], 0) + segments = mem_layout[mem_layout_index + 1].split(',') + seg_re = re.compile(r'(\d+)\*(\d+)(.)(.)') + for segment in segments: + seg_match = seg_re.match(segment) + num_pages = int(seg_match.groups()[0], 10) + page_size = int(seg_match.groups()[1], 10) + multiplier = seg_match.groups()[2] + if multiplier == 'K': + page_size *= 1024 + if multiplier == 'M': + page_size *= 1024 * 1024 + size = num_pages * page_size + last_addr = addr + size - 1 + result.append(named((addr, last_addr, size, num_pages, page_size), + "addr last_addr size num_pages page_size")) + addr += size return result diff --git a/tools/tinytest-codegen.py b/tools/tinytest-codegen.py index 0f9e628476569..7a48f8a9a7406 100755 --- a/tools/tinytest-codegen.py +++ b/tools/tinytest-codegen.py @@ -1,27 +1,30 @@ -#! /usr/bin/env python3 +#!/usr/bin/env python3 import os, sys from glob import glob from re import sub +import argparse + def escape(s): - lookup = { - '\0': '\\0', - '\t': '\\t', - '\n': '\\n\"\n\"', - '\r': '\\r', - '\\': '\\\\', - '\"': '\\\"', - } - return "\"\"\n\"{}\"".format(''.join([lookup[x] if x in lookup else x for x in s])) + s = s.decode() + lookup = { + '\0': '\\0', + '\t': '\\t', + '\n': '\\n\"\n\"', + '\r': '\\r', + '\\': '\\\\', + '\"': '\\\"', + } + return "\"\"\n\"{}\"".format(''.join([lookup[x] if x in lookup else x for x in s])) def chew_filename(t): - return { 'func': "test_{}_fn".format(sub(r'/|\.|-', '_', t)), 'desc': t.split('/')[1] } + return { 'func': "test_{}_fn".format(sub(r'/|\.|-', '_', t)), 'desc': t } -def script_to_map(t): - r = { 'name': chew_filename(t)['func'] } - with open(t) as test: - script = test.readlines() +def script_to_map(test_file): + r = {"name": chew_filename(test_file)["func"]} + with open(test_file, "rb") as test: + script = test.readlines() # Test for import skip_if and inject it into the test as needed. if "import skip_if\n" in script: @@ -36,13 +39,19 @@ def script_to_map(t): continue script.insert(index + total_lines, "\t" + line) total_lines += 1 - r['script'] = escape(''.join(script)) - return r + r['script'] = escape(b''.join(script)) + + with open(test_file + ".exp", "rb") as f: + r["output"] = escape(f.read()) + + return r test_function = ( "void {name}(void* data) {{\n" - " const char * pystr = {script};\n" - " do_str(pystr);\n" + " static const char pystr[] = {script};\n" + " static const char exp[] = {output};\n" + " upytest_set_expected_output(exp, sizeof(exp) - 1);\n" + " upytest_execute_test(pystr);\n" "}}" ) @@ -57,30 +66,62 @@ def script_to_map(t): "struct testgroup_t groups[] = {{\n{body}\n END_OF_GROUPS\n}};" ) testgroup_member = ( - " {{ \"{name}/\", {name}_tests }}," + " {{ \"{name}\", {name}_tests }}," ) ## XXX: may be we could have `--without ` argument... # currently these tests are selected because they pass on qemu-arm test_dirs = ('basics', 'micropython', 'float', 'extmod', 'inlineasm') # 'import', 'io', 'misc') exclude_tests = ( - 'float/float2int_doubleprec_intbig.py', # requires double precision floating point to work - 'inlineasm/asmfpaddsub.py', 'inlineasm/asmfpcmp.py', 'inlineasm/asmfpldrstr.py', 'inlineasm/asmfpmuldiv.py', 'inlineasm/asmfpsqrt.py', - 'extmod/ticks_diff.py', 'extmod/time_ms_us.py', 'extmod/uheapq_timeq.py', - 'extmod/vfs_fat_ramdisk.py', 'extmod/vfs_fat_fileio.py', 'extmod/vfs_fat_fsusermount.py', 'extmod/vfs_fat_oldproto.py', + # pattern matching in .exp + 'basics/bytes_compare3.py', + 'extmod/ticks_diff.py', + 'extmod/time_ms_us.py', + 'extmod/uheapq_timeq.py', + # unicode char issue + 'extmod/ujson_loads.py', + # doesn't output to python stdout + 'extmod/ure_debug.py', + 'extmod/vfs_basic.py', + 'extmod/vfs_fat_ramdisk.py', 'extmod/vfs_fat_fileio.py', + 'extmod/vfs_fat_fsusermount.py', 'extmod/vfs_fat_oldproto.py', + # rounding issues + 'float/float_divmod.py', + # requires double precision floating point to work + 'float/float2int_doubleprec_intbig.py', + 'float/float_parse_doubleprec.py', + # inline asm FP tests (require Cortex-M4) + 'inlineasm/asmfpaddsub.py', 'inlineasm/asmfpcmp.py', 'inlineasm/asmfpldrstr.py', + 'inlineasm/asmfpmuldiv.py','inlineasm/asmfpsqrt.py', + # different filename in output + 'micropython/emg_exc.py', + 'micropython/heapalloc_traceback.py', + # pattern matching in .exp + 'micropython/meminfo.py', ) output = [] +tests = [] + +argparser = argparse.ArgumentParser(description='Convert native MicroPython tests to tinytest/upytesthelper C code') +argparser.add_argument('--stdin', action="store_true", help='read list of tests from stdin') +args = argparser.parse_args() + +if not args.stdin: + for group in test_dirs: + tests += [test for test in glob('{}/*.py'.format(group)) if test not in exclude_tests] +else: + for l in sys.stdin: + tests.append(l.rstrip()) -for group in test_dirs: - tests = [test for test in glob('{}/*.py'.format(group)) if test not in exclude_tests] - output.extend([test_function.format(**script_to_map(test)) for test in tests]) - testcase_members = [testcase_member.format(**chew_filename(test)) for test in tests] - output.append(testcase_struct.format(name=group, body='\n'.join(testcase_members))) +output.extend([test_function.format(**script_to_map(test)) for test in tests]) +testcase_members = [testcase_member.format(**chew_filename(test)) for test in tests] +output.append(testcase_struct.format(name="", body='\n'.join(testcase_members))) -testgroup_members = [testgroup_member.format(name=group) for group in test_dirs] +testgroup_members = [testgroup_member.format(name=group) for group in [""]] output.append(testgroup_struct.format(body='\n'.join(testgroup_members))) ## XXX: may be we could have `--output ` argument... -print('\n\n'.join(output)) +# Don't depend on what system locale is set, use utf8 encoding. +sys.stdout.buffer.write('\n\n'.join(output).encode('utf8')) diff --git a/tools/uf2 b/tools/uf2 index 449f266738557..adbb8c7260f93 160000 --- a/tools/uf2 +++ b/tools/uf2 @@ -1 +1 @@ -Subproject commit 449f26673855736dbc0fc3f18d72403f25f62974 +Subproject commit adbb8c7260f938e810eb37f2287f8e1a055ff402 diff --git a/tools/upip.py b/tools/upip.py index 411da49e8cd8e..a400c317438e7 100644 --- a/tools/upip.py +++ b/tools/upip.py @@ -1,3 +1,10 @@ +# +# upip - Package manager for MicroPython +# +# Copyright (c) 2015-2018 Paul Sokolovsky +# +# Licensed under the MIT license. +# import sys import gc import uos as os @@ -110,16 +117,16 @@ def url_open(url): proto, _, host, urlpath = url.split('/', 3) try: - ai = usocket.getaddrinfo(host, 443) + ai = usocket.getaddrinfo(host, 443, 0, usocket.SOCK_STREAM) except OSError as e: fatal("Unable to resolve %s (no Internet?)" % host, e) #print("Address infos:", ai) - addr = ai[0][4] + ai = ai[0] - s = usocket.socket(ai[0][0]) + s = usocket.socket(ai[0], ai[1], ai[2]) try: #print("Connect address:", addr) - s.connect(addr) + s.connect(ai[-1]) if proto == "https:": s = ussl.wrap_socket(s, server_hostname=host) @@ -149,7 +156,7 @@ def url_open(url): def get_pkg_metadata(name): - f = url_open("https://pypi.python.org/pypi/%s/json" % name) + f = url_open("https://pypi.org/pypi/%s/json" % name) try: return json.load(f) finally: diff --git a/tools/usb_descriptor b/tools/usb_descriptor index a04341153b41b..701cafc50e2e5 160000 --- a/tools/usb_descriptor +++ b/tools/usb_descriptor @@ -1 +1 @@ -Subproject commit a04341153b41b4728f9b42a77cbd51c495362287 +Subproject commit 701cafc50e2e574dccaf7a340eedbd64a0b41a42